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authorBert Lange <b.lange@hzdr.de>2011-06-09 17:59:07 +0200
committerBert Lange <b.lange@hzdr.de>2011-08-02 13:35:26 +0200
commitb9ad801c86a4bf2f37be4972737b9c401335a49c (patch)
tree7b664e55dec382af385185674962769abf1a12e0 /zpu/hdl/example
parente6d9de6465aecf64a53b941bf80830280e95c040 (diff)
downloadzpu-b9ad801c86a4bf2f37be4972737b9c401335a49c.zip
zpu-b9ad801c86a4bf2f37be4972737b9c401335a49c.tar.gz
change: rename signal areset to reset
Diffstat (limited to 'zpu/hdl/example')
-rw-r--r--zpu/hdl/example/sim_small_fpga_top.vhd2
-rw-r--r--zpu/hdl/example/sim_small_fpga_top_noint.vhd2
2 files changed, 2 insertions, 2 deletions
diff --git a/zpu/hdl/example/sim_small_fpga_top.vhd b/zpu/hdl/example/sim_small_fpga_top.vhd
index e671460..8054489 100644
--- a/zpu/hdl/example/sim_small_fpga_top.vhd
+++ b/zpu/hdl/example/sim_small_fpga_top.vhd
@@ -115,7 +115,7 @@ begin
zpu: zpu_core port map (
clk => clk ,
- areset => areset,
+ reset => areset,
enable => enable,
in_mem_busy => mem_busy,
mem_read => mem_read,
diff --git a/zpu/hdl/example/sim_small_fpga_top_noint.vhd b/zpu/hdl/example/sim_small_fpga_top_noint.vhd
index 0edb8c7..1a83131 100644
--- a/zpu/hdl/example/sim_small_fpga_top_noint.vhd
+++ b/zpu/hdl/example/sim_small_fpga_top_noint.vhd
@@ -113,7 +113,7 @@ begin
zpu: zpu_core port map (
clk => clk ,
- areset => areset,
+ reset => areset,
enable => enable,
in_mem_busy => mem_busy,
mem_read => mem_read,
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