diff options
| author | Bert Lange <b.lange@fzd.de> | 2011-11-07 15:41:50 +0100 |
|---|---|---|
| committer | Bert Lange <b.lange@fzd.de> | 2011-11-07 15:41:50 +0100 |
| commit | d190f1c37139ec38667a3d6e566dbe1b0549f84d (patch) | |
| tree | 7885f39318cb7852afc24992dd08cb6bb953ac03 /uc_str912/prj_test_lcd/str91x_lib | |
| parent | acc2681723f43b3c8ccb29055bec9d63cb863c78 (diff) | |
| download | zpu-d190f1c37139ec38667a3d6e566dbe1b0549f84d.zip zpu-d190f1c37139ec38667a3d6e566dbe1b0549f84d.tar.gz | |
initial commit
Diffstat (limited to 'uc_str912/prj_test_lcd/str91x_lib')
| -rw-r--r-- | uc_str912/prj_test_lcd/str91x_lib/91x_ahbapb.c | 177 | ||||
| -rw-r--r-- | uc_str912/prj_test_lcd/str91x_lib/91x_fmi.c | 519 | ||||
| -rw-r--r-- | uc_str912/prj_test_lcd/str91x_lib/91x_gpio.c | 407 | ||||
| -rw-r--r-- | uc_str912/prj_test_lcd/str91x_lib/91x_lib.c | 281 | ||||
| -rw-r--r-- | uc_str912/prj_test_lcd/str91x_lib/91x_scu.c | 661 |
5 files changed, 2045 insertions, 0 deletions
diff --git a/uc_str912/prj_test_lcd/str91x_lib/91x_ahbapb.c b/uc_str912/prj_test_lcd/str91x_lib/91x_ahbapb.c new file mode 100644 index 0000000..41489ac --- /dev/null +++ b/uc_str912/prj_test_lcd/str91x_lib/91x_ahbapb.c @@ -0,0 +1,177 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_ahbapb.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the AHBAPB software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_ahbapb.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+#define AHBAPB_SplitCounter_Mask 0xFFE0FFFF
+#define AHBAPB_SetTimeOut_Mask 0xFFFFFFE0
+#define AHBAPB_Address_Mask 0xFEFFFFFF
+#define AHBAPB_FLAG_RW_Mask 0x01000000
+/*******************************************************************************
+* Function Name : AHBAPB_DeInit
+* Description : Deinitializes the AHBAPBx peripheral registers to their default
+* reset values.
+* Input : AHBAPBx: where x can be 0 or 1 to select the AHBAPB peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_DeInit(AHBAPB_TypeDef* AHBAPBx)
+{
+ AHBAPBx->BCR = 0x00000000;
+ AHBAPBx->BSR = 0x00000000;
+}
+/*******************************************************************************
+* Function Name : AHBAPB_Init
+* Description : Initializes the AHBAPBx peripheral according to the specified
+* parameters in the AHBAPB_InitStruct .
+* Input :- AHBAPBx: where x can be 0 or 1 to select the AHBAPB peripheral.
+* - AHBAPB_InitStruct: pointer to a AHBAPB_InitTypeDef structure that
+* contains the configuration information for the specified AHBAPB
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_Init(AHBAPB_TypeDef* AHBAPBx, AHBAPB_InitTypeDef* AHBAPB_InitStruct)
+{
+
+ if(AHBAPB_InitStruct->AHBAPB_Split == AHBAPB_Split_Enable)
+ {
+ /* Set SPLITEN bit;*/
+ AHBAPBx->BCR |= AHBAPB_Split_Enable;
+ /*Split_CNT bits[20:16]*/
+ AHBAPBx->BCR &= AHBAPB_SplitCounter_Mask;
+ AHBAPBx->BCR |= (AHBAPB_InitStruct->AHBAPB_SplitCounter)<<16;
+ }
+ else
+ {
+ /*/ Clear SPLITEN bit;*/
+ AHBAPBx->BCR &= AHBAPB_Split_Disable;
+ }
+ /*APB Time out*/
+ if(AHBAPB_InitStruct->AHBAPB_Error == AHBAPB_Error_Enable)
+ {
+ /* Set ERREN bit*/
+ AHBAPBx->BCR |= AHBAPB_Error_Enable;
+ /*Time ouit counter*/
+ AHBAPBx->BCR &= AHBAPB_SetTimeOut_Mask;
+ AHBAPBx->BCR |= AHBAPB_InitStruct->AHBAPB_SetTimeOut;
+ }
+ else
+ {
+ /* Clear ERREN bit*/
+ AHBAPBx->BCR &= AHBAPB_Error_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : AHBAPB_StructInit
+* Description : Initialize the AHBAPB Init Structure parameters
+* Input : AHBAPB_InitStruct : pointer to a AHBAPB_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_StructInit(AHBAPB_InitTypeDef* AHBAPB_InitStruct)
+{
+ /* Reset AHBAPB init structure parameters values */
+ AHBAPB_InitStruct->AHBAPB_Split = AHBAPB_Split_Enable;
+ AHBAPB_InitStruct->AHBAPB_SplitCounter = 0xFF;
+ AHBAPB_InitStruct->AHBAPB_Error = AHBAPB_Error_Enable;
+ AHBAPB_InitStruct->AHBAPB_SetTimeOut = 0xFF;
+
+}
+
+/*******************************************************************************
+* Function Name : AHBAPB_GetFlagStatus
+* Description : Checks whether the specified AHBAPB flag is set or not.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* - AHBAPB_FLAG: specifies the flag to check.
+* This parameter can be one of the following values:
+* - AHBAPB_FLAG_ERROR: error flag
+* - AHBAPB_FLAG_OUTM : Out of Memory flag
+* - AHBAPB_FLAG_APBT : APB Time-out flag
+* - AHBAPB_FLAG_RW : Access type flag
+* Output : None
+* Return : The new state of AHBAPB_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus AHBAPB_GetFlagStatus(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG)
+{
+ if(AHBAPB_FLAG == AHBAPB_FLAG_RW)
+ {
+ if ((AHBAPBx->PAER & AHBAPB_FLAG_RW_Mask) == RESET)
+ {
+ return RESET;
+ }
+ else
+ {
+ return SET;
+ }
+ }
+ else
+ {
+ if ((AHBAPBx->BSR & AHBAPB_FLAG) == RESET)
+ {
+ return RESET;
+ }
+ else
+ {
+ return SET;
+ }
+ }
+}
+/*******************************************************************************
+* Function Name : AHBAPB_ClearFlag
+* Description : Clears the AHBAPBx flags.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* - AHBAPB_FLAG: flags to clear. This parameter one of the
+* following values:
+* - AHBAPB_FLAG_ERROR: error flag
+* - AHBAPB_FLAG_OUTM : Out of Memory flag
+* - AHBAPB_FLAG_APBT : APB Time-out flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_ClearFlag(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG)
+{
+ /* Clear the flag */
+ AHBAPBx->BSR &= AHBAPB_FLAG;
+}
+/*******************************************************************************
+* Function Name : AHBAPB_GetPeriphAddrError
+* Description : Gets the AHBAPB error address peripherals.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* Output : None
+* Return : The Peropheral address error
+*******************************************************************************/
+u32 AHBAPB_GetPeriphAddrError(AHBAPB_TypeDef* AHBAPBx)
+{
+ u32 AHBAPB_Address = 0x00000000;
+
+ /*Return Oeripheral address without RW bit*/
+ AHBAPB_Address = (AHBAPBx->PAER)& AHBAPB_Address_Mask;
+ return (AHBAPB_Address);
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_test_lcd/str91x_lib/91x_fmi.c b/uc_str912/prj_test_lcd/str91x_lib/91x_fmi.c new file mode 100644 index 0000000..fb558ad --- /dev/null +++ b/uc_str912/prj_test_lcd/str91x_lib/91x_fmi.c @@ -0,0 +1,519 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_fmi.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the FMI software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_fmi.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+#define TIMEOUT 0xFFFFFF /* Timeout value */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+
+/*******************************************************************************
+* Function Name : FMI_BankRemapConfig
+* Description : Configure the addresses and sizes of bank 0 and bank 1.
+* Input1 : FMI_BootBankSize: specifies the boot bank size.
+* This parameter can be one of the following values:
+* - 0x0: 32KBytes.
+* - 0x1: 64KBytes.
+* - 0x2: 128KBytes.
+* - 0x3: 256KBytes.
+* - 0x4: 512KBytes.
+* ....
+* - 0xB: 64MBytes.
+* Input2 : FMI_NonBootBankSize: specifies the non boot bank size.
+* This parameter can be one of the following values:
+* - 0x0: 8KBytes.
+* - 0x1: 16KBytes.
+* - 0x2: 32KBytes.
+* - 0x3: 64KBytes.
+* ....
+* - 0xD: 64MBytes.
+* Input3 : FMI_BootBankAddress: specifies the address of the boot bank.
+* Input4 : FMI_NonBootBankAddress: specifies the address of the non
+* boot bank.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \
+ u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress)
+{
+ FMI->BBSR = FMI_BootBankSize;
+ FMI->NBBSR = FMI_NonBootBankSize;
+ FMI->BBADR = (FMI_BootBankAddress >> 2);
+ FMI->NBBADR = (FMI_NonBootBankAddress >> 2);
+ FMI->CR |= 0x18; /* Enable bank 1 */
+}
+
+/*******************************************************************************
+* Function Name : FMI_Config
+* Description : Configure the FMI.
+* Input1 : FMI_ReadWaitState: specifies the needed read wait states.
+* This parameter can be one of the following values:
+* - FMI_READ_WAIT_STATE_1: One read wait state.
+* - FMI_READ_WAIT_STATE_2: Two read wait states.
+* - FMI_READ_WAIT_STATE_3: Three read wait states.
+* Input2 : FMI_WriteWaitState: specifies the needed write wait states.
+* This parameter can be one of the following values:
+* - FMI_WRITE_WAIT_STATE_1: One write wait state.
+* - FMI_WRITE_WAIT_STATE_2: Two write wait states.
+* Input3 : FMI_PWD: specifies the power down mode status.
+* This parameter can be one of the following values:
+* - FMI_PWD_ENABLE: Enable the PWD.
+* - FMI_PWD_DISABLE: Disable the PWD.
+* Input4 : FMI_LVDEN: specifies the low voltage detector status.
+* This parameter can be one of the following values:
+* - FMI_LVD_ENABLE: Enable the LVD.
+* - FMI_LVD_DISABLE: Disable the LVD.
+* Input5 : FMI_FreqRange: specifies the working frequency range.
+* This parameter can be one of the following values:
+* - FMI_FREQ_LOW: Low working frequency (up to 66MHz).
+* - FMI_FREQ_HIGH: High working frequency (above 66MHz) .
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\
+ u16 FMI_LVDEN, u16 FMI_FreqRange)
+{
+ /* Configure the write wait state value */
+ if (FMI_WriteWaitState == FMI_WRITE_WAIT_STATE_1)
+ {
+ FMI->CR |= FMI_WRITE_WAIT_STATE_1;
+ }
+ else
+ {
+ FMI->CR &= FMI_WRITE_WAIT_STATE_0;
+ }
+
+ /* Write a write flash configuration register command */
+ *(vu16 *)FMI_BANK_1 = 0x60;
+
+ /* Configure the flash configuration register */
+ *(vu16 *)(FMI_BANK_1|FMI_ReadWaitState|FMI_PWD|FMI_LVDEN|FMI_FreqRange) = 0x03;
+}
+
+/*******************************************************************************
+* Function Name : FMI_EraseSector
+* Description : Erase the needed sector.
+* Input : FMI_Sector: specifies the sector to be erased.
+* This parameter can be one of the following values:
+* - FMI_B0S0: FMI bank 0 sector 0.
+* - FMI_B0S1: FMI bank 0 sector 1.
+* - FMI_B0S2: FMI bank 0 sector 2.
+* - FMI_B0S3: FMI bank 0 sector 3.
+* - FMI_B0S4: FMI bank 0 sector 4.
+* - FMI_B0S5: FMI bank 0 sector 5.
+* - FMI_B0S6: FMI bank 0 sector 6.
+* - FMI_B0S7: FMI bank 0 sector 7.
+* - FMI_B1S0: FMI bank 1 sector 0.
+* - FMI_B1S1: FMI bank 1 sector 1.
+* - FMI_B1S2: FMI bank 1 sector 2.
+* - FMI_B1S3: FMI bank 1 sector 3.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_EraseSector(vu32 FMI_Sector)
+{
+ /* Write an erase set-up command to the sector */
+ *(vu16 *)FMI_Sector = 0x20;
+
+ /* Write an erase confirm command to the sector */
+ *(vu16 *)FMI_Sector = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_EraseBank
+* Description : Erase the needed bank.
+* Input : FMI_Bank: specifies the bank to be erased.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_EraseBank(vu32 FMI_Bank)
+{
+ /* Write a bank erase set-up command to the bank */
+ *(vu16 *)FMI_Bank = 0x80;
+
+ /* Write an erase confirm command to the sector */
+ *(vu16 *)FMI_Bank = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteHalfWord
+* Description : Write a halfword to the needed Flash memory address.
+* Input 1 : FMI_Address: specifies the address offset where the data will
+* be written.
+* Input 2 : FMI_Data: the needed data.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data)
+{
+ /* Write a program command to the sector to be written */
+ *(vu16 *)(FMI_Address & 0xFFFFFFFC) = 0x40;
+
+ /* Write the halfword to the destination address */
+ *(vu16 *)FMI_Address = FMI_Data;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteOTPHalfWord
+* Description : Write a halfword to the needed OTP sector address.
+* Input 1 : FMI_OTPHWAddress: specifies the halfword address offset
+* where the data will be written.
+* This parameter can be one of the following values:
+* - FMI_OTP_LOW_HALFWORD_0: OTP Low halfword 0.
+* - FMI_OTP_HIGH_HALFWORD_0: OTP High halfword 0.
+* - FMI_OTP_LOW_HALFWORD_1: OTP Low halfword 1.
+* - FMI_OTP_HIGH_HALFWORD_1: OTP High halfword 1.
+* - FMI_OTP_LOW_HALFWORD_2: OTP Low halfword 2.
+* - FMI_OTP_HIGH_HALFWORD_2: OTP High halfword 2.
+* - FMI_OTP_LOW_HALFWORD_3: OTP Low halfword 3.
+* - FMI_OTP_HIGH_HALFWORD_3: OTP High halfword 3.
+* - FMI_OTP_LOW_HALFWORD_4: OTP Low halfword 4.
+* - FMI_OTP_HIGH_HALFWORD_4: OTP High halfword 4.
+* - FMI_OTP_LOW_HALFWORD_5: OTP Low halfword 5.
+* - FMI_OTP_HIGH_HALFWORD_5: OTP High halfword 5.
+* - FMI_OTP_LOW_HALFWORD_6: OTP Low halfword 6.
+* - FMI_OTP_HIGH_HALFWORD_6: OTP High halfword 6.
+* - FMI_OTP_LOW_HALFWORD_7: OTP Low halfword 7.
+* - FMI_OTP_HIGH_HALFWORD_7: OTP High halfword 7.
+* Input 2 : FMI_OTPData: The needed OTP data.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData)
+{
+ /* Write a write OTP command to the needed address */
+ *(vu16 *)(FMI_BANK_1) = 0xC0;
+
+ /* Write the halfword to the destination address */
+ *(vu16 *)(FMI_BANK_1 + FMI_OTPHWAddress) = FMI_OTPData;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ReadWord
+* Description : Read the correspondent data.
+* Input : FMI_Address: specifies the needed address.
+* Output : None
+* Return : The data contained in the specified address.
+*******************************************************************************/
+u32 FMI_ReadWord(u32 FMI_Address)
+{
+ return(*(u32*)FMI_Address);
+}
+
+/*******************************************************************************
+* Function Name : FMI_ReadOTPData
+* Description : Read data from the OTP sector.
+* Input : FMI_OTPAddress: specifies the address of the data to be read.
+* This parameter can be one of the following values:
+* - FMI_OTP_WORD_0: FMI bank 0 sector 0.
+* - FMI_OTP_WORD_1: FMI bank 0 sector 1.
+* - FMI_OTP_WORD_2: FMI bank 0 sector 2.
+* - FMI_OTP_WORD_3: FMI bank 0 sector 3.
+* - FMI_OTP_WORD_4: FMI bank 0 sector 4.
+* - FMI_OTP_WORD_5: FMI bank 0 sector 5.
+* - FMI_OTP_WORD_6: FMI bank 0 sector 6.
+* - FMI_OTP_WORD_7: FMI bank 0 sector 7.
+* Output : None
+* Return : The needed OTP words.
+*******************************************************************************/
+u32 FMI_ReadOTPData(u8 FMI_OTPAddress)
+{
+ u32 OTP_Data = 0x0;
+ /* write a read OTP sector command */
+ *(vu16 *)(FMI_BANK_1) = 0x98;
+
+ /* Read the correspondent data */
+ OTP_Data = (*(vu32*)(FMI_BANK_1 + FMI_OTPAddress));
+
+ /* Write a read array command */
+ *(vu16 *)(FMI_BANK_1) = 0xFF;
+
+ return OTP_Data;
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetFlagStatus
+* Description : Check whether the specified FMI flag is set or not.
+* Input1 : FMI_Flag: flag to check.
+* This parameter can be one of the following values:
+* - FMI_FLAG_SPS: Sector Protection Status Flag.
+* - FMI_FLAG_PSS: Program Suspend Status Flag.
+* - FMI_FLAG_PS: Program Status Flag.
+* - FMI_FLAG_ES: Erase Status Flag.
+* - FMI_FLAG_ESS: Erase Suspend Status Flag.
+* - FMI_FLAG_PECS: FPEC Status Flag.
+* Input2 : FMI_Bank: specifies the needed bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank)
+{
+ u16 FMI_Status_Register = 0;
+
+ /* Write a read status register command */
+ *(vu16 *)FMI_Bank = 0x70;
+
+ /* Wait until operation completion */
+ while(!((*(vu16 *)FMI_Bank) & 0x80));
+
+ /* Read the status register */
+ FMI_Status_Register = *(vu16 *)FMI_Bank;
+
+ /* Write a read array command */
+ *(vu16 *)FMI_Bank = 0xFF;
+
+ if((FMI_Status_Register & FMI_Flag) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetReadWaitStateValue
+* Description : Get the current Read wait state value.
+* Input : None
+* Output : None
+* Return : The current read wait states value.
+*******************************************************************************/
+u16 FMI_GetReadWaitStateValue(void)
+{
+ u16 FMI_Configuration_Register = 0;
+ /* Write a read flash configuration register command */
+ *(vu16 *)FMI_BANK_1 = 0x90;
+
+ /* Read the flash configuration register */
+ FMI_Configuration_Register = *(vu16 *)(FMI_BANK_1 + 0x14);
+
+ /* Write a read array command */
+ *(vu16 *)FMI_BANK_1 = 0xFF;
+
+ FMI_Configuration_Register = ((FMI_Configuration_Register>>11) + 1) & 0x3;
+
+ /* Return the wait states value */
+ return FMI_Configuration_Register;
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetWriteWaitStateValue
+* Description : Get the current write wait state value.
+* Input : None
+* Output : None
+* Return : The current write wait states value.
+*******************************************************************************/
+u16 FMI_GetWriteWaitStateValue(void)
+{
+ return ((u16)((FMI->CR & 0x100) >> 8));
+}
+
+/*******************************************************************************
+* Function Name : FMI_SuspendEnable
+* Description : Suspend command enable.
+* Input : FMI_Bank: specifies the bank to be suspended.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_SuspendEnable(vu32 FMI_Bank)
+{
+ /* Write a suspend command to the bank */
+ *(vu16 *)FMI_Bank = 0xB0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ResumeEnable
+* Description : Resume the suspended command.
+* Input : FMI_Bank: specifies the suspended bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_ResumeEnable(vu32 FMI_Bank)
+{
+ /* Write a resume command to the bank */
+ *(vu16 *)FMI_Bank = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ClearFlag
+* Description : Clear the FMI Flags on the correspondent bank.
+* Input : FMI_Bank: specifies the needed bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_ClearFlag(vu32 FMI_Bank)
+{
+ /* Write a clear status register command */
+ *(vu16 *)FMI_Bank = 0x50;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteProtectionCmd
+* Description : Enable or disable the write protection for the needed sector.
+* Input1 : FMI_Sector: specifies the sector to be protected or
+* unprotected.
+* This parameter can be one of the following values:
+* - FMI_B0S0: FMI bank 0 sector 0.
+* - FMI_B0S1: FMI bank 0 sector 1.
+* - FMI_B0S2: FMI bank 0 sector 2.
+* - FMI_B0S3: FMI bank 0 sector 3.
+* - FMI_B0S4: FMI bank 0 sector 4.
+* - FMI_B0S5: FMI bank 0 sector 5.
+* - FMI_B0S6: FMI bank 0 sector 6.
+* - FMI_B0S7: FMI bank 0 sector 7.
+* - FMI_B1S0: FMI bank 1 sector 0.
+* - FMI_B1S1: FMI bank 1 sector 1.
+* - FMI_B1S2: FMI bank 1 sector 2.
+* - FMI_B1S3: FMI bank 1 sector 3.
+* Input2 : FMI_NewState: specifies the protection status.
+* This parameter can be one of the following values:
+* - ENABLE: Enable the protection.
+* - DISABLE: Disable the protection.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState)
+{
+ if (FMI_NewState == ENABLE)
+ {
+ *(vu16*)FMI_Sector = 0x60;
+ *(vu16*)FMI_Sector = 0x01;
+ *(vu16*)FMI_Sector = 0xFF;
+ }
+ else /* DISABLE */
+ {
+ *(vu16*)FMI_Sector = 0x60;
+ *(vu16*)FMI_Sector = 0xD0;
+ *(vu16*)FMI_Sector = 0xFF;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetWriteProtectionStatus
+* Description : Get the write protection status for the needed sector.
+* Input : FMI_Sector_Mask: specifies the needed sector mask.
+* This parameter can be one of the following values:
+* - FMI_B0S0_MASK: FMI bank 0 sector 0.
+* - FMI_B0S1_MASK: FMI bank 0 sector 1.
+* - FMI_B0S2_MASK: FMI bank 0 sector 2.
+* - FMI_B0S3_MASK: FMI bank 0 sector 3.
+* - FMI_B0S4_MASK: FMI bank 0 sector 4.
+* - FMI_B0S5_MASK: FMI bank 0 sector 5.
+* - FMI_B0S6_MASK: FMI bank 0 sector 6.
+* - FMI_B0S7_MASK: FMI bank 0 sector 7.
+* - FMI_B1S0_MASK: FMI bank 1 sector 0.
+* - FMI_B1S1_MASK: FMI bank 1 sector 1.
+* - FMI_B1S2_MASK: FMI bank 1 sector 2.
+* - FMI_B1S3_MASK: FMI bank 1 sector 3.
+* Output : None
+* Return : The Protection Status of the needed sector.
+* - RESET: The needed sector is not write protected.
+* - SET : The needed sector is write protected.
+*******************************************************************************/
+FlagStatus FMI_GetWriteProtectionStatus(u32 FMI_Sector_Mask)
+{
+ u16 Protection_Level_1_Register = 0;
+ /* Write a read flash protection level 1 register command */
+ *(vu16 *)FMI_BANK_1 = 0x90;
+
+ /* Read the flash protection level 1 register */
+ Protection_Level_1_Register = *(vu16 *)(FMI_BANK_1 + 0x10);
+
+ /* Write a read array command */
+ *(vu16 *)FMI_BANK_1 = 0xFF;
+
+ if (Protection_Level_1_Register &= FMI_Sector_Mask)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_WaitForLastOperation
+* Description : Wait until the last operation (Write halfword, Write OTP
+* halfword, Erase sector and Erase bank) completion.
+* Input : FMI_Bank: specifies the bank where the operation is on going.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : The timeout status.
+* This parameter can be one of the following values:
+* - FMI_TIME_OUT_ERROR: Timeout error occurred.
+* - FMI_NO_TIME_OUT_ERROR: No timeout error.
+*******************************************************************************/
+u8 FMI_WaitForLastOperation(vu32 FMI_Bank)
+{
+ u32 Time_Out = 0;
+
+ /* Write a read status register command */
+ *(vu16 *)(FMI_Bank) = 0x70;
+
+ /* Wait until operation compeletion */
+ while((!((*(vu16 *)FMI_Bank) & 0x80))&&(Time_Out < TIMEOUT ))
+ {
+ Time_Out ++; /* Time Out */
+ }
+
+ /* Write a read array command */
+ *(vu16 *)FMI_Bank = 0xFF;
+
+ if (Time_Out == TIMEOUT)
+ {
+ return FMI_TIME_OUT_ERROR;
+ }
+ else
+ {
+ return FMI_NO_TIME_OUT_ERROR;
+ }
+}
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_test_lcd/str91x_lib/91x_gpio.c b/uc_str912/prj_test_lcd/str91x_lib/91x_gpio.c new file mode 100644 index 0000000..f2d0941 --- /dev/null +++ b/uc_str912/prj_test_lcd/str91x_lib/91x_gpio.c @@ -0,0 +1,407 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_gpio.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the GPIO software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_gpio.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+ static u8 GPIO_GetGPIONumber(GPIO_TypeDef* GPIOx);
+
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : GPIO_DeInit
+* Description : Deinitializes the GPIOx peripheral registers to their default
+* reset values.
+* Input : GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_DeInit(GPIO_TypeDef* GPIOx)
+{
+
+ /* Reset the GPIO registers values */
+ if(GPIOx == GPIO0)
+ {
+ SCU_APBPeriphReset(__GPIO0,ENABLE);
+ SCU_APBPeriphReset(__GPIO0,DISABLE);
+ SCU->GPIOTYPE[0x00] = 0x0000 ;
+ SCU->GPIOOUT[0x00] = 0x0000;
+ SCU->GPIOIN[0x00] = 0x0000;
+ }
+
+ if(GPIOx == GPIO1)
+ {
+ SCU_APBPeriphReset(__GPIO1,ENABLE);
+ SCU_APBPeriphReset(__GPIO1,DISABLE);
+ SCU->GPIOTYPE[0x01] = 0x0000 ;
+ SCU->GPIOOUT[0x01] = 0x0000;
+ SCU->GPIOIN[0x01] = 0x0000;
+ }
+
+ if(GPIOx == GPIO2)
+ {
+ SCU_APBPeriphReset(__GPIO2,ENABLE);
+ SCU_APBPeriphReset(__GPIO2,DISABLE);
+ SCU->GPIOTYPE[0x02] = 0x0000 ;
+ SCU->GPIOOUT[0x02] = 0x0000;
+ SCU->GPIOIN[0x02] = 0x0000;
+ }
+
+ if(GPIOx == GPIO3)
+ {
+ SCU_APBPeriphReset(__GPIO3,ENABLE);
+ SCU_APBPeriphReset(__GPIO3,DISABLE);
+ SCU->GPIOTYPE[0x03] = 0x0000 ;
+ SCU->GPIOOUT[0x03] = 0x0000;
+ SCU->GPIOIN[0x03] = 0x0000;
+ }
+
+ if(GPIOx == GPIO4)
+ {
+ SCU_APBPeriphReset(__GPIO4,ENABLE);
+ SCU_APBPeriphReset(__GPIO4,DISABLE);
+ SCU->GPIOTYPE[0x04] = 0x0000 ;
+ SCU->GPIOOUT[0x04] = 0x0000;
+ SCU->GPIOIN[0x04] = 0x0000;
+ SCU->GPIOANA = 0x00;
+ }
+
+ if(GPIOx == GPIO5)
+ {
+ SCU_APBPeriphReset(__GPIO5,ENABLE);
+ SCU_APBPeriphReset(__GPIO5,DISABLE);
+ SCU->GPIOTYPE[0x05] = 0x0000 ;
+ SCU->GPIOOUT[0x05] = 0x0000;
+ SCU->GPIOIN[0x05] = 0x0000;
+ }
+
+ if(GPIOx == GPIO6)
+ {
+ SCU_APBPeriphReset(__GPIO6,ENABLE);
+ SCU_APBPeriphReset(__GPIO6,DISABLE);
+ SCU->GPIOTYPE[0x06] = 0x0000 ;
+ SCU->GPIOOUT[0x06] = 0x0000;
+ SCU->GPIOIN[0x06] = 0x0000;
+ }
+
+ if(GPIOx == GPIO7)
+ {
+ SCU_APBPeriphReset(__GPIO7,ENABLE);
+ SCU_APBPeriphReset(__GPIO7,DISABLE);
+ SCU->GPIOOUT[0x07] = 0xAAAA;
+ SCU->GPIOOUT[0x07] = 0x0000;
+ SCU->GPIOIN[0x07] = 0x0000;
+ }
+
+ if(GPIOx == GPIO8)
+ {
+ SCU_APBPeriphReset(__GPIO8,ENABLE);
+ SCU_APBPeriphReset(__GPIO8,DISABLE);
+ SCU->GPIOEMI = 0x00;
+ }
+
+ if(GPIOx == GPIO9)
+ {
+ SCU_APBPeriphReset(__GPIO9,ENABLE);
+ SCU_APBPeriphReset(__GPIO9,DISABLE);
+ SCU->GPIOEMI = 0x00;
+ }
+}
+/*******************************************************************************
+* Function Name : GPIO_Init
+* Description : Initializes the GPIOx peripheral according to the specified
+* parameters in the GPIO_InitStruct .
+* Input :- GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
+* contains the configuration information for the specified GPIO
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
+{
+ /* Select pin direction */
+ u8 PinNumber = 0;
+ u8 Counter = 0;
+ u8 GPIO_Number = 0;
+
+ GPIO_Number = GPIO_GetGPIONumber(GPIOx);
+
+
+ if(GPIO_InitStruct->GPIO_Direction == GPIO_PinOutput)
+ {
+ GPIOx->DDR |= GPIO_InitStruct->GPIO_Pin;
+ }
+ else
+ {
+ GPIOx->DDR &= ~GPIO_InitStruct->GPIO_Pin;
+ }
+
+ for (Counter = 0; Counter < 8;Counter++)
+ {
+ /*Search pin number*/
+ PinNumber = (GPIO_InitStruct->GPIO_Pin & (1 <<Counter));
+ if((PinNumber >> Counter) == 1)
+ {
+ /*Output ALternate 0*/
+ SCU->GPIOOUT[GPIO_Number] &= ~(0x3 <<(Counter *2));
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt1)
+ {
+ /*Output ALternate 1*/
+ SCU->GPIOOUT[GPIO_Number] |= 1 << (Counter *2);
+ }
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt2)
+ {
+ /*Output ALternate 2*/
+ SCU->GPIOOUT[GPIO_Number] |= 0x2 << (Counter *2);
+ }
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt3)
+ {
+ /*Output ALternate 3*/
+ SCU->GPIOOUT[GPIO_Number] |= 0x3 << (Counter *2);
+ }
+
+ /*Type configuration: PushPull or Open Collector*/
+ SCU->GPIOTYPE[GPIO_Number] &= ~(0x1 << Counter) ;
+ if(GPIO_InitStruct->GPIO_Type == GPIO_Type_OpenCollector)
+ {
+ /*Open Drain configuration*/
+ SCU->GPIOTYPE[GPIO_Number] |= 0x1 << Counter;
+ }
+
+ /*IP Connected disable*/
+ SCU->GPIOIN[GPIO_Number] &= ~(0x1 << Counter) ;
+ if(GPIO_InitStruct->GPIO_IPConnected == GPIO_IPConnected_Enable)
+ {
+ /*IP Connected enable*/
+ SCU->GPIOIN[GPIO_Number] |= 0x1 << Counter;
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_StructInit
+* Description : Initialize the GPIO Init Structure parameters
+* Input : GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
+{
+ /* Reset GPIO init structure parameters values */
+ GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
+ GPIO_InitStruct->GPIO_Direction = GPIO_PinInput;
+ GPIO_InitStruct->GPIO_Type = GPIO_Type_PushPull;
+ GPIO_InitStruct->GPIO_IPConnected = GPIO_IPConnected_Disable;
+ GPIO_InitStruct->GPIO_Alternate = GPIO_InputAlt1;
+}
+
+/*******************************************************************************
+* Function Name : GPIO_ReadBit
+* Description : Reads the specified port pin
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* : - GPIO_Pin: the Pin number. This parameter can be GPIO_Pin_x
+* where x can be (0..7).
+* Output : None
+* Return : The port pin value
+*******************************************************************************/
+u8 GPIO_ReadBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin)
+{
+ if ((((GPIOx->DR[GPIO_Pin<<2])) & GPIO_Pin) != Bit_RESET )
+ {
+ return Bit_SET;
+ }
+ else
+ {
+ return Bit_RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_Read
+* Description : Reads the specified GPIO data port
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : GPIO data port word value.
+*******************************************************************************/
+u8 GPIO_Read(GPIO_TypeDef* GPIOx)
+{
+ return (GPIOx->DR[0x3FC]);
+}
+
+/*******************************************************************************
+* Function Name : GPIO_WriteBit
+* Description : Sets or clears the selected data port bit.
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - GPIO_Pin: the Pin number. This parameter can be GPIO_Pin_x
+* where x can be (0..7).
+* - BitVal: this parameter specifies the value to be written
+* to the selected bit.
+* BitVal must be one of the BitAction enum values:
+* - Bit_RESET: to clear the port pin
+* - Bit_SET: to set the port pin
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin, BitAction BitVal)
+{
+ if(BitVal == Bit_SET)
+ {
+ GPIOx->DR[GPIO_Pin <<2] = GPIO_Pin;
+ }
+ else
+ {
+ GPIOx->DR[GPIO_Pin <<2] = 0x00;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_Write
+* Description : Writes the passed value in the selected data GPIOx port
+* register.
+* Input :- GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - PortVal: the value to be written to the data port register.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_Write(GPIO_TypeDef* GPIOx, u8 PortVal)
+{
+ GPIOx->DR[0x3FC] = PortVal;
+}
+
+/*******************************************************************************
+* Function Name : GPIO_EMIConfig
+* Description : Enables or disables GPIO 8 and 9 in EMI mode.
+* Input : - NewState: new state of the EMI.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_EMIConfig(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ SCU->GPIOEMI = 0x01;
+ }
+ else
+ {
+ SCU->GPIOEMI = 0x00;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_ANAPinConfig
+* Description : Enables or disables pins from GPIO 4 in Analogue mode.
+* Input :- GPIO_ANAChannel: selects the ADC channel pin.
+* This parameter can be one of the following values:
+* GPIO_ANAChannel0
+* GPIO_ANAChannel1
+* GPIO_ANAChannel2
+* GPIO_ANAChannel3
+* GPIO_ANAChannel4
+* GPIO_ANAChannel5
+* GPIO_ANAChannel6
+* GPIO_ANAChannel7
+* GPIO_ANAChannelALL
+* - NewState: new state of the port pin.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_ANAPinConfig(u8 GPIO_ANAChannel, FunctionalState NewState)
+{
+
+ if(NewState == ENABLE)
+ {
+ if(GPIO_ANAChannel == GPIO_ANAChannelALL)
+ {
+ SCU->GPIOOUT[4] = 0x0000;
+ SCU->GPIOIN[4] = 0x00;
+ }
+ else
+ {
+ SCU->GPIOOUT[4] &= ~(0x3<<(GPIO_ANAChannel-1));
+ SCU->GPIOIN[4] &= ~GPIO_ANAChannel;
+ }
+ SCU->GPIOANA |= GPIO_ANAChannel;
+
+ }
+ else
+ {
+ SCU->GPIOANA &= ~GPIO_ANAChannel;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_GetGPIONumber
+* Description : searche the GPIO number.
+* Input : GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : GPIO number
+*******************************************************************************/
+u8 GPIO_GetGPIONumber(GPIO_TypeDef* GPIOx)
+{
+
+ if(GPIOx == GPIO1)
+ {
+ return 1;
+ }
+ if(GPIOx == GPIO2)
+ {
+ return 2;
+ }
+ if(GPIOx == GPIO3)
+ {
+ return 3;
+ }
+ if(GPIOx == GPIO4)
+ {
+ return 4;
+ }
+ if(GPIOx == GPIO5)
+ {
+ return 5;
+ }
+ if(GPIOx == GPIO6)
+ {
+ return 6;
+ }
+ if(GPIOx == GPIO7)
+ {
+ return 7;
+ }
+ if(GPIOx == GPIO8)
+ {
+ return 8;
+ }
+ if(GPIOx == GPIO9)
+ {
+ return 9;
+ }
+ return 0;
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_test_lcd/str91x_lib/91x_lib.c b/uc_str912/prj_test_lcd/str91x_lib/91x_lib.c new file mode 100644 index 0000000..c0eadbb --- /dev/null +++ b/uc_str912/prj_test_lcd/str91x_lib/91x_lib.c @@ -0,0 +1,281 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_lib.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all peripherals pointers
+ : initialization.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#define EXT
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_map.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+#ifdef DEBUG
+
+/*******************************************************************************
+* Function Name : debug
+* Description : this function initialize peripherals pointers
+* Input : no one
+* Output : no one
+* Return : no one
+*******************************************************************************/
+void debug(void)
+{
+
+
+/************************* DMA *************************/
+
+#ifdef _DMA
+ DMA = (DMA_TypeDef *)DMA_BASE;
+#endif /* _DMA */
+
+/************************* DMA *************************/
+
+
+#ifdef _DMA_Channel0
+ DMA_Channel0= (DMA_Channel_TypeDef *)DMA_Channel0_BASE;
+#endif /* _DMA_Channel0 */
+
+#ifdef _DMA_Channel1
+ DMA_Channel1= (DMA_Channel_TypeDef *)DMA_Channel1_BASE;
+#endif /* _DMA_Channel1 */
+
+#ifdef _DMA_Channel2
+ DMA_Channel2 = (DMA_Channel_TypeDef *)DMA_Channel2_BASE;
+#endif /* _DMA_Channel2 */
+
+#ifdef _DMA_Channel3
+ DMA_Channel3 = (DMA_Channel_TypeDef *)DMA_Channel3_BASE;
+#endif /* _DMA_Channel3 */
+
+#ifdef _DMA_Channel4
+ DMA_Channel4 = (DMA_Channel_TypeDef *)DMA_Channel4_BASE;
+#endif /* _DMA_Channel4 */
+
+#ifdef _DMA_Channel5
+ DMA_Channel5= (DMA_Channel_TypeDef *)DMA_Channel5_BASE;
+#endif /* _DMA_Channel5*/
+
+
+#ifdef _DMA_Channel6
+ DMA_Channel6 = (DMA_Channel_TypeDef *)DMA_Channel6_BASE;
+#endif /* _DMA_Channel6 */
+
+#ifdef _DMA_Channel7
+ DMA_Channel7 = (DMA_Channel_TypeDef *)DMA_Channel7_BASE;
+#endif /* _DMA_Channel7 */
+
+
+
+ /************************* EMI *************************/
+
+#ifdef _EMI_Bank0
+ EMI_Bank0= (EMI_Bank_TypeDef *)EMI_Bank0_BASE;
+#endif /* _EMI_Bank0 */
+
+#ifdef _EMI_Bank1
+ EMI_Bank1= (EMI_Bank_TypeDef *)EMI_Bank1_BASE;
+#endif /* _EMI_Bank1 */
+
+#ifdef _EMI_Bank2
+ EMI_Bank2 = (EMI_Bank_TypeDef *)EMI_Bank2_BASE;
+#endif /* _EMI_Bank2 */
+
+#ifdef _EMI_Bank3
+ EMI_Bank3 = (EMI_Bank_TypeDef *)EMI_Bank3_BASE;
+ #endif /* _EMI_Bank3 */
+
+
+
+/************************* AHBAPB *************************/
+
+#ifdef _AHBAPB0
+ AHBAPB0 = (AHBAPB_TypeDef *)AHBAPB0_BASE;
+#endif /* _AHBAPB0 */
+
+#ifdef _AHBAPB1
+ AHBAPB1 = (AHBAPB_TypeDef *)AHBAPB1_BASE;
+#endif /*_AHBAPB1 */
+
+
+
+/************************* FMI *************************/
+
+#ifdef _FMI
+ FMI = (FMI_TypeDef *)FMI_BASE;
+#endif /* _FMI */
+
+/************************* VIC *************************/
+
+#ifdef _VIC0
+ VIC0 = (VIC_TypeDef *)VIC0_BASE;
+#endif /* _VIC0 */
+
+#ifdef _VIC1
+ VIC1 = (VIC_TypeDef *)VIC1_BASE;
+#endif /* _VIC1 */
+
+/************************* WIU *************************/
+
+#ifdef _WIU
+ WIU = (WIU_TypeDef *)WIU_BASE;
+#endif /* _WIU */
+
+/************************* TIM *************************/
+
+#ifdef _TIM0
+ TIM0 = (TIM_TypeDef *)TIM0_BASE;
+#endif /* _TIM0 */
+
+#ifdef _TIM1
+ TIM1 = (TIM_TypeDef *)TIM1_BASE;
+#endif /* _TIM1 */
+
+#ifdef _TIM2
+ TIM2 = (TIM_TypeDef *)TIM2_BASE;
+#endif /* _TIM2 */
+
+#ifdef _TIM3
+ TIM3 = (TIM_TypeDef *)TIM3_BASE;
+#endif /* _TIM3 */
+
+/************************* GPIO ************************/
+
+#ifdef _GPIO0
+ GPIO0 = (GPIO_TypeDef *)GPIO0_BASE;
+#endif /* _GPIO0 */
+
+#ifdef _GPIO1
+ GPIO1 = (GPIO_TypeDef *)GPIO1_BASE;
+#endif /* _GPIO1 */
+
+#ifdef _GPIO2
+ GPIO2 = (GPIO_TypeDef *)GPIO2_BASE;
+#endif /* _GPIO2 */
+
+#ifdef _GPIO3
+ GPIO3 = (GPIO_TypeDef *)GPIO3_BASE;
+#endif /* _GPIO3 */
+
+#ifdef _GPIO4
+ GPIO4 = (GPIO_TypeDef *)GPIO4_BASE;
+#endif /* _GPIO4 */
+
+#ifdef _GPIO5
+ GPIO5 = (GPIO_TypeDef *)GPIO5_BASE;
+#endif /* _GPIO5 */
+
+#ifdef _GPIO6
+ GPIO6 = (GPIO_TypeDef *)GPIO6_BASE;
+#endif /* _GPIO6 */
+
+#ifdef _GPIO7
+ GPIO7 = (GPIO_TypeDef *)GPIO7_BASE;
+#endif /* _GPIO7 */
+
+#ifdef _GPIO8
+ GPIO8 = (GPIO_TypeDef *)GPIO8_BASE;
+#endif /* _GPIO8 */
+
+#ifdef _GPIO9
+ GPIO9 = (GPIO_TypeDef *)GPIO9_BASE;
+#endif /* _GPIO9 */
+
+/************************* RTC *************************/
+
+#ifdef _RTC
+ RTC = (RTC_TypeDef *)RTC_BASE;
+#endif /* _RTC */
+
+/************************* PRCCU ***********************/
+
+#ifdef _SCU
+ SCU = (SCU_TypeDef *)SCU_BASE;
+#endif /* _PRCCU */
+
+/************************** MC *************************/
+
+#ifdef _MC
+ MC = (MC_TypeDef *)MC_BASE;
+#endif /* _MC */
+
+/************************* UART ************************/
+
+#ifdef _UART0
+ UART0 = (UART_TypeDef *)UART0_BASE;
+#endif /* _UART0 */
+
+#ifdef _UART1
+ UART1 = (UART_TypeDef *)UART1_BASE;
+#endif /* _UART1 */
+
+#ifdef _UART2
+ UART2 = (UART_TypeDef *)UART2_BASE;
+#endif /* _UART2 */
+
+/************************* SSP *************************/
+
+#ifdef _SSP0
+ SSP0 = (SSP_TypeDef *)SSP0_BASE;
+#endif /* _SSP0 */
+
+#ifdef _SSP1
+ SSP1 = (SSP_TypeDef *)SSP1_BASE;
+#endif /* _SSP1 */
+
+/************************* CAN *************************/
+
+#ifdef _CAN
+ CAN = (CAN_TypeDef *)CAN_BASE;
+#endif /* _CAN */
+
+/************************* ADC *************************/
+
+#ifdef _ADC
+ ADC = (ADC_TypeDef *)ADC_BASE;
+#endif /* _ADC */
+
+/************************* WDG *************************/
+
+#ifdef _WDG
+ WDG = (WDG_TypeDef *)WDG_BASE;
+#endif /* _WDG */
+
+/************************* I2C *************************/
+
+#ifdef _I2C0
+ I2C0 = (I2C_TypeDef *)I2C0_BASE;
+#endif /* _I2C0 */
+
+#ifdef _I2C1
+ I2C1 = (I2C_TypeDef *)I2C1_BASE;
+#endif /* _I2C1 */
+/********************** ENET **************************/
+#ifdef _ENET
+ ENET_MAC = (ENET_MAC_TypeDef *)ENET_MAC_BASE;
+ ENET_DMA = (ENET_DMA_TypeDef *)ENET_DMA_BASE;
+#endif /* _ENET */
+}
+#endif /* DEBUG */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_test_lcd/str91x_lib/91x_scu.c b/uc_str912/prj_test_lcd/str91x_lib/91x_scu.c new file mode 100644 index 0000000..21116b2 --- /dev/null +++ b/uc_str912/prj_test_lcd/str91x_lib/91x_scu.c @@ -0,0 +1,661 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_scu.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides the SCU library software functions
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_scu.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define SCU_PLLEN 0x80000
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : SCU_MCLKSourceConfig
+* Description : Configures the MCLK source clock
+* Input : MCLK_Source = SCU_MCLK_OSC, SCU_MCLK_PLL or SCU_MCLK_RTC
+* Output : None
+* Return : ErrorStatus: SUCCESS or ERROR
+* Note : this function returns ERROR if trying to select the PLL as
+* clock source while the PLL is disabled or not locked.
+*******************************************************************************/
+ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source)
+{
+ u32 CLKCNTR_Value;
+
+ CLKCNTR_Value = SCU->CLKCNTR; /*get CLKCNTR register value*/
+ CLKCNTR_Value &=~0x3; /*clear field MCLKSEL*/
+ if (MCLK_Source == SCU_MCLK_PLL) /*PLL selected as clock source*/
+ {
+ /*check if PLL enabled & locked*/
+ if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
+ return ERROR;
+ }
+ else CLKCNTR_Value |=MCLK_Source; /*OSC or RTC selected as clock source*/
+ SCU->CLKCNTR = CLKCNTR_Value; /*Update CLKCNTR register value*/
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : SCU_PLLFactorsConfig
+* Description : Sets the PLL factors
+* Input : PLLN, PLLM and PLLP
+* Output : None
+* Return : ErrorStatus: ERROR or SUCCESS
+* Notes : -The PLL factors must respect the PLL specification requirements
+* -The function returns ERROR if trying to change PLL
+* factors while PLL is selected as Main Clock source (MCLK)
+* -This function disables the PLL, to enable the PLL use
+* function" SCU_PLLCmd(ENABLE)" after setting the PLL factors
+******************************************************************************/
+ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP)
+{
+ if (SCU_PLLCmd(DISABLE)==SUCCESS) /*Disable PLL*/
+ {
+ SCU->PLLCONF =0; /*clear PLLCONF register*/
+ SCU->PLLCONF |=(PLLN<<8); /*update PLLN field*/
+ SCU->PLLCONF |=PLLM; /*update PLLM field*/
+ SCU->PLLCONF |=PLLP<<16; /*update PLLP field*/
+ return SUCCESS;
+ }
+ return ERROR;
+}
+
+/*******************************************************************************
+* Function Name : SCU_PLLCmd
+* Description : Enable or Disable the PLL
+* Input : NewState = ENABLE or DISABLE
+* Output : None
+* Return : ErrorStatus: SUCCESS or ERROR
+* Note : -The function returns ERROR if:
+* *trying to disable the PLL while it is selected as the MCLK
+* *trying to enable the PLL while it is already enabled and
+* locked
+*******************************************************************************/
+ErrorStatus SCU_PLLCmd(FunctionalState NewState)
+{
+ vu32 i;
+ if (NewState==ENABLE)
+ {
+ if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
+ {
+ SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/
+ SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/
+ while(!SCU->SYSSTATUS&SCU_FLAG_LOCK); /*Wait PLL to lock*/
+ return SUCCESS;
+ }
+ else return ERROR;
+ }
+ else /*NewState = DISABLE*/
+ {
+ if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/
+ {
+ for(i=10;i>0;i--); /*delay before PLL disabling*/
+ SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/
+ return SUCCESS;
+ }
+ else return ERROR;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_RCLKDivisorConfig
+* Description : Sets the RCLK divisor value
+* Input : RCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_RCLKDivisorConfig(u32 RCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_RCLK_Div1; /*clear RCLKDIV[2:0] field*/
+ if (RCLK_Divisor!=SCU_RCLK_Div1)
+ SCU->CLKCNTR |= RCLK_Divisor; /*update field with RCLK divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_HCLKDivisorConfig
+* Description : Sets the HCLK divisor value
+* Input : HCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_HCLKDivisorConfig(u32 HCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_HCLK_Div1; /*clear AHBDIV[1:0] field*/
+ if (HCLK_Divisor!=SCU_HCLK_Div1)
+ SCU->CLKCNTR |= HCLK_Divisor; /*update field with HCLK divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_PCLKDivisorConfig
+* Description : Sets the PCLK divisor value
+* Input : PCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PCLKDivisorConfig(u32 PCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_PCLK_Div1; /*clear APBDIV[1:0] field*/
+ if (PCLK_Divisor!=SCU_PCLK_Div1)
+ SCU->CLKCNTR |= PCLK_Divisor; /*update field with PCLK Divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphClockConfig
+* Description : Enable the clock for an APB peripheral
+* Input : -APBPerip : APB peripherals(__RTC, __ADC ,...)
+* -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE) /*Enable clock for APB peripheral*/
+ SCU->PCGR1 |=APBPeriph;
+ else
+ SCU->PCGR1 &=~APBPeriph; /*Disable clock for APB peripheral*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphClockConfig
+* Description : Enable the clock for an AHB peripheral
+* Input : -AHBPerip: AHB peripherals(__USB, __DMA,...)
+* -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE) /*Enable clock for AHB peripheral*/
+ SCU->PCGRO |=AHBPeriph;
+ else
+ SCU->PCGRO &=~AHBPeriph; /*Disable clock for AHB peripheral*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphReset
+* Description : Assert or deassert Reset on APB peripheral
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==DISABLE) /*APB peripheral not held in Reset*/
+ SCU->PRR1 |=APBPeriph;
+ else
+ SCU->PRR1 &=~APBPeriph; /*APB peripheral held in Reset*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphReset
+* Description : Assert or deassert Reset on AHB peripheral
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==DISABLE)
+ SCU->PRR0 |=AHBPeriph; /*AHB peripheral not held in Reset*/
+ else
+ SCU->PRR0 &=~AHBPeriph; /*AHB peripheral held in Reset*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphIdleConfig
+* Description : Enable or Disable Periph Clock during Idle mode
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->MGR1 |=APBPeriph; /*APB peripheral clock enabled during Idle mode*/
+ else
+ SCU->MGR1 &=~APBPeriph; /*APB peripheral clock disabled during Idle mode*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphIdleConfig
+* Description : Enable or Disable Periph Clock during Idle mode
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->MGR0 |=AHBPeriph; /*AHB peripheral clock enabled during Idle mode*/
+ else
+ SCU->MGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during Idle mode*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphDebugConfig
+* Description : Enable or Disable Periph Clock during ARM debug state
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->PECGR1 |=APBPeriph; /*APB peripheral clock enabled during ARM debug state*/
+ else
+ SCU->PECGR1 &=~APBPeriph; /*APB peripheral clock disabled during ARM debug state*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphDebugConfig
+* Description : Enable or Disable Periph Clock during ARM debug state
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->PECGR0 |=AHBPeriph; /*AHB peripheral clock enabled during ARM debug state*/
+ else
+ SCU->PECGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during ARM debug state*/
+}
+/*******************************************************************************
+* Function Name : SCU_BRCLKDivisorConfig
+* Description : Sets the BRCLK divisor value
+* Input : BRCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_BRCLK_Div1; /*Clear BRSEL bit*/
+ if (BRCLK_Divisor!=SCU_BRCLK_Div1)
+ SCU->CLKCNTR |= SCU_BRCLK_Div2; /*set bit BRSEL*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_TIMCLKSourceConfig
+* Description : Sets the TIMx clock source
+* Input : - TIMx : SCU_TIM01 or SCU_TIM23
+* - TIMCLK_Source = SCU_TIMCLK_EXT or SCU_TIMCLK_INT
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_TIMCLKSourceConfig(u8 TIMx, u32 TIMCLK_Source)
+{
+ if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/
+ {
+ SCU->CLKCNTR &=0xFFFFDFFF;
+ if (TIMCLK_Source == SCU_TIMCLK_EXT)
+ SCU->CLKCNTR |=0x2000;
+ }
+ else
+ {
+ SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/
+ if (TIMCLK_Source == SCU_TIMCLK_EXT)
+ SCU->CLKCNTR |=0x4000;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_TIMPresConfig
+* Description : Sets the TIMx Prescaler Value
+* Input : - TIMx : SCU_TIM01 or SCU_TIM23
+* - Prescaler (16 bit value)
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_TIMPresConfig(u8 TIMx, u16 Prescaler)
+{
+ if (TIMx==SCU_TIM01) /*TIM01 Prescaler configuration*/
+ SCU->SCR1 = Prescaler&0xFFFF;
+ else
+ SCU->SCR2 = Prescaler&0xFFFF; /*TIM23 Prescaler configuration*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_USBCLKConfig
+* Description : Configures the clock source for the 48MHz USBCLK
+* Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_USBCLKConfig(u32 USBCLK_Source)
+{
+ SCU->CLKCNTR &=SCU_USBCLK_MCLK; /*clear USBSEL[1:0] field*/
+ if (USBCLK_Source!=SCU_USBCLK_MCLK)
+ SCU->CLKCNTR |= USBCLK_Source; /*update field with USBCLK_Source*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_PHYCLKConfig
+* Description : Enable or Disable PHY clock output
+* Input : NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PHYCLKConfig(FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->CLKCNTR |= 0x1000; /*enable MIIPHY clock*/
+ else
+ SCU->CLKCNTR &=~0x1000; /*disable MIIPHY clock*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_FMICLKDivisorConfig
+* Description : Set the FMI clock divisor
+* Input : FMICLK_Divisor: SCU_FMICLK_Div1 or SCU_FMICLK_DIV2
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_FMICLKDivisorConfig(u32 FMICLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_FMICLK_Div1; /*FMICLK = RCLK*/
+ if (FMICLK_Divisor!=SCU_FMICLK_Div1)
+ SCU->CLKCNTR |=SCU_FMICLK_Div2; /*FMICLK = RCLK/2 */
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIBCLKDivisorConfig
+* Description : Set the EMI Bus clock divisor: EMIBCLK = HCLK or HCLK/2
+* Input : SCU_EMICLK: SCU_EMIBCLK_Div1 , SCU_EMIBCLK_Div2
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIBCLKDivisorConfig(u32 SCU_EMIBCLK)
+{
+ SCU->CLKCNTR &=SCU_EMIBCLK_Div1; /*EMIBCLK = HCLK */
+ if (SCU_EMIBCLK!=SCU_EMIBCLK_Div1)
+ SCU->CLKCNTR |= SCU_EMIBCLK_Div2; /*EMIBCLK = HCLK/2 */
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIModeConfig
+* Description : Configure the EMI as Multiplexed or Demultiplexed
+* Input : SCU_EMIMODE : SCU_EMI_MUX or SCU_EMI_DEMUX
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIModeConfig(u32 SCU_EMIMODE)
+{
+ SCU->SCR0 &=SCU_EMI_MUX; /*EMI mode = Multiplexed*/
+ if (SCU_EMIMODE!=SCU_EMI_MUX)
+ SCU->SCR0 |= SCU_EMI_DEMUX; /*EMI mode = Demultiplexed*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIALEConfig
+* Description : Configure the ALE signal (length & polarity)
+* Input : -SCU_EMIALE_LEN : SCU_EMIALE_LEN1 or SCU_EMIALE_LEN2
+* -SCU_EMIALE_POL : SCU_EMIALE_POLLow or SCU_EMI_POLHigh
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIALEConfig(u32 SCU_EMIALE_LEN, u32 SCU_EMIALE_POL)
+{
+ /*Configure EMI ALE Length*/
+ SCU->SCR0 &=SCU_EMIALE_LEN1;
+ if (SCU_EMIALE_LEN!=SCU_EMIALE_LEN1)
+ SCU->SCR0 |= SCU_EMIALE_LEN2;
+
+ /*Configure EMI ALE POL*/
+ SCU->SCR0 &=SCU_EMIALE_POLLow;
+ if (SCU_EMIALE_POL!=SCU_EMIALE_POLLow)
+ SCU->SCR0 |= SCU_EMIALE_POLHigh;
+}
+
+/*******************************************************************************
+* Function Name : SCU_ITConfig
+* Description : ENBALE or DISABLE an SCU interrupt
+* Input : -SCU_IT: interrupt mask
+* -NewState: ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_ITConfig(u32 SCU_IT, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->ITCMSK&=~SCU_IT; /*IT enable */
+ else
+ SCU->ITCMSK|=SCU_IT; /*IT disable( mask)*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetFlagStatus
+* Description : Returns flag status
+* Input : SCU_Flag
+* Output : NONE
+* Return : SET or RESET
+*******************************************************************************/
+FlagStatus SCU_GetFlagStatus(u32 SCU_Flag)
+{
+ if (SCU->SYSSTATUS&SCU_Flag)
+ return SET;
+ else return RESET;
+}
+
+/*******************************************************************************
+* Function Name : SCU_ClearFlag
+* Description : Clears a SYSTATUS Flag
+* Input : SCU_Flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_ClearFlag(u32 SCU_Flag)
+{
+ SCU->SYSSTATUS = SCU_Flag;
+}
+/*******************************************************************************
+* Function Name : SCU_GetPLLfreqValue
+* Description : Gets the current PLL frequency
+* Input : None
+* Output : None
+* Return : PLL frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetPLLFreqValue(void)
+{
+ u8 PLL_M;
+ u8 PLL_N;
+ u8 PLL_P;
+
+ PLL_M = SCU->PLLCONF&0xFF;
+ PLL_N = (SCU->PLLCONF&0xFF00)>>8;
+ PLL_P = (SCU->PLLCONF&0x70000)>>16;
+
+ if ((PLL_M>0)&&(PLL_N>0))
+ return (u32)(((_Main_Crystal*2)*PLL_N)/(PLL_M<<PLL_P));
+
+ else return 0;
+}
+/*******************************************************************************
+* Function Name : SCU_GetMCLKFreqValue
+* Description : Gets the current MCLK frequency
+* Input : None
+* Output : None
+* Return : MCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetMCLKFreqValue(void)
+{
+ if ((SCU->CLKCNTR&0x3) == 0x2) return (u32)(_Main_Crystal);
+ if ((SCU->CLKCNTR&0x3) == 0x1) return (u32)(32);
+ else return (SCU_GetPLLFreqValue());
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetRCLKFreqValue
+* Description : Gets the current RCLK frequency
+* Input : None
+* Output : None
+* Return : RCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetRCLKFreqValue(void)
+{
+ u8 RCLK_Div;
+ RCLK_Div = (SCU->CLKCNTR&0x1C)>>2;
+ if (RCLK_Div==0x5) RCLK_Div=10;
+ return (u32)(SCU_GetMCLKFreqValue() >>RCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetHCLKFreqValue
+* Description : Gets the current PCLK frequency
+* Input : None
+* Output : None
+* Return : HCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetHCLKFreqValue(void)
+{
+ u8 HCLK_Div;
+ HCLK_Div = (SCU->CLKCNTR&0x60)>>5;
+ return (u32)(SCU_GetRCLKFreqValue() >>HCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetPCLKFreqValue
+* Description : Gets the current HCLK frequency
+* Input : None
+* Output : None
+* Return : PCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetPCLKFreqValue(void)
+{
+ u8 PCLK_Div;
+ PCLK_Div = (SCU->CLKCNTR&0x180)>>7;
+ return (u32)(SCU_GetRCLKFreqValue() >>PCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_WakeUpLineConfig
+* Description : Configures an External interrupt as WakeUp line
+* Input : EXTint : 0 -> 31
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_WakeUpLineConfig(u8 EXTint)
+{
+ if (EXTint < 8)
+ {
+ SCU->WKUPSEL&=~0x7;
+ SCU->WKUPSEL|=EXTint;
+ }
+ else if (EXTint<16)
+ {
+ SCU->WKUPSEL&=~0x38;
+ SCU->WKUPSEL|=(EXTint-8)<<3;
+ }
+ else if (EXTint<24)
+ {
+ SCU->WKUPSEL&=~0x1C0;
+ SCU->WKUPSEL|=(EXTint-16)<<6;
+ }
+ else
+ {
+ SCU->WKUPSEL&=~0xE00;
+ SCU->WKUPSEL|=(EXTint-24)<<9;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_SpecIntRunModeConfig
+* Description : Enables or Disables the Special Run mode
+* Input : newstate = ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_SpecIntRunModeConfig(FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ SCU->PWRMNG |=0x8;
+ else
+ SCU->PWRMNG &=~0x8;
+}
+/*******************************************************************************
+* Function Name : SCU_EnterIdleMode
+* Description : Enters in Idle mode
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EnterIdleMode(void)
+{
+ SCU->PWRMNG |=0x1;
+}
+/*******************************************************************************
+* Function Name : SCU_EnterSleepMode
+* Description : Enters in Sleep mode
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EnterSleepMode(void)
+{
+ SCU->PWRMNG |=0x2;
+}
+
+/*******************************************************************************
+* Function Name : SCU_UARTIrDAConfig
+* Description : Enable or Disable the Irda mode for UARTx
+* Input : - UARTx :x=0,1 or 2
+* - UART_IrDA_Mode : SCU_UARTMode_IrDA or SCU_UARTMode_UART
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_UARTIrDASelect(UART_TypeDef * UARTx, u8 UART_IrDA_Mode)
+{
+ if (UART_IrDA_Mode == SCU_UARTMode_IrDA)
+ {
+ if (UARTx== UART0) SCU->SCR0 |=0x400;
+ else if (UARTx==UART1) SCU->SCR0 |=0x800;
+ else SCU->SCR0 |=0x1000;
+ }
+ else
+ {
+ if (UARTx== UART0) SCU->SCR0 &=~0x400;
+ else if (UARTx==UART1) SCU->SCR0 &=~0x800;
+ else SCU->SCR0 &=~0x1000;
+ }
+}
+/*******************************************************************************
+* Function Name : SCU_PFQBCCmd
+* Description : Enable or Disable PFQBC
+* Input : NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PFQBCCmd(FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->SCR0 |=0x1;
+ else SCU->SCR0 &=~0x1;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
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