initial commit

15 files changed, 1149 insertions, 0 deletions

diff --git a/uc_str912/prj_main_add/Makefile b/uc_str912/prj_main_add/Makefile
new file mode 100644
index 0000000..96db3a9
--- /dev/null
+++ b/uc_str912/prj_main_add/Makefile
@@ -0,0 +1,146 @@
+#

+#       !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!    

+#

+##############################################################################################

+# 

+# On command line:

+#

+# make all = Create project

+#

+# make clean = Clean project files.

+#

+# To rebuild project do "make clean" and "make all".

+#

+

+##############################################################################################

+# Start of default section

+#

+

+TRGT = arm-none-eabi-

+CC   = $(TRGT)gcc

+CP   = $(TRGT)objcopy

+AS   = $(TRGT)gcc -x assembler-with-cpp

+BIN  = $(CP) -O ihex 

+

+MCU  = arm9e

+

+# List all default C defines here, like -D_DEBUG=1

+DDEFS = 

+

+# List all default ASM defines here, like -D_DEBUG=1

+DADEFS = 

+

+# List all default directories to look for include files here

+DINCDIR = 

+

+# List the default directory to look for the libraries here

+DLIBDIR =

+

+# List all default libraries here

+DLIBS = 

+

+#

+# End of default section

+##############################################################################################

+

+##############################################################################################

+# Start of user section

+#

+

+# Define project name here

+PROJECT = test

+

+# Define linker script file here

+LDSCRIPT_RAM = ./prj/str912_ram.ld

+LDSCRIPT_ROM = ./prj/str912_rom.ld

+

+# List all user C define here, like -D_DEBUG=1

+UDEFS = 

+

+# Define ASM defines here

+UADEFS = 

+

+# List C source files here

+SRC  = ./src/main.c

+

+# List ASM source files here

+ASRC = ./src/startup.s

+

+# List all user directories here

+UINCDIR = ./inc

+

+# List the user directory to look for the libraries here

+ULIBDIR =

+

+# List all user libraries here

+ULIBS = 

+

+# Define optimisation level here

+OPT = -O0

+

+#

+# End of user defines

+##############################################################################################

+

+

+INCDIR  = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))

+LIBDIR  = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))

+DEFS    = $(DDEFS) $(UDEFS)

+ADEFS   = $(DADEFS) $(UADEFS)

+OBJS    = $(ASRC:.s=.o) $(SRC:.c=.o)

+LIBS    = $(DLIBS) $(ULIBS)

+MCFLAGS = -mcpu=$(MCU)

+

+ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)

+CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)

+LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)

+LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)

+

+# Generate dependency information

+CPFLAGS += -MD -MP -MF .dep/$(@F).d

+

+#

+# makefile rules

+#

+

+all: RAM ROM

+

+RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex

+

+ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex

+

+%o : %c

+	$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@

+

+%o : %s

+	$(AS) -c $(ASFLAGS) $< -o $@

+

+%ram.elf: $(OBJS)

+	$(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@

+

+%rom.elf: $(OBJS)

+	$(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@

+

+%hex: %elf

+	$(BIN) $< $@

+

+clean:

+	-rm -f $(OBJS)

+	-rm -f $(PROJECT)_ram.elf

+	-rm -f $(PROJECT)_ram.map

+	-rm -f $(PROJECT)_ram.hex

+	-rm -f $(PROJECT)_rom.elf

+	-rm -f $(PROJECT)_rom.map

+	-rm -f $(PROJECT)_rom.hex

+	-rm -f $(SRC:.c=.c.bak)

+	-rm -f $(SRC:.c=.lst)

+	-rm -f $(ASRC:.s=.s.bak)

+	-rm -f $(ASRC:.s=.lst)

+	-rm -fR .dep

+

+# 

+# Include the dependency files, should be the last of the makefile

+#

+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)

+

+# *** EOF ***

diff --git a/uc_str912/prj_main_add/dram.bat b/uc_str912/prj_main_add/dram.bat
new file mode 100644
index 0000000..9f6bae9
--- /dev/null
+++ b/uc_str912/prj_main_add/dram.bat
@@ -0,0 +1 @@
+arm-elf-insight -x .\prj\str912_ram.gdb test_ram.elf
\ No newline at end of file
diff --git a/uc_str912/prj_main_add/inc/typedefs.h b/uc_str912/prj_main_add/inc/typedefs.h
new file mode 100644
index 0000000..a7201fd
--- /dev/null
+++ b/uc_str912/prj_main_add/inc/typedefs.h
@@ -0,0 +1,50 @@
+/****************************************************************************

+*  Copyright (c) 2006 by Michael Fischer. All rights reserved.

+*

+*  Redistribution and use in source and binary forms, with or without 

+*  modification, are permitted provided that the following conditions 

+*  are met:

+*  

+*  1. Redistributions of source code must retain the above copyright 

+*     notice, this list of conditions and the following disclaimer.

+*  2. Redistributions in binary form must reproduce the above copyright

+*     notice, this list of conditions and the following disclaimer in the 

+*     documentation and/or other materials provided with the distribution.

+*  3. Neither the name of the author nor the names of its contributors may 

+*     be used to endorse or promote products derived from this software 

+*     without specific prior written permission.

+*

+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 

+*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 

+*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 

+*  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 

+*  THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 

+*  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 

+*  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 

+*  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 

+*  AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 

+*  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 

+*  THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 

+*  SUCH DAMAGE.

+*

+****************************************************************************

+*  History:

+*

+*  30.03.06  mifi   First Version for Insight tutorial

+****************************************************************************/

+#ifndef __TYPEDEFS_H__

+#define __TYPEDEFS_H__

+

+/*

+ * Some types to use Windows like source

+ */

+typedef char            CHAR;    /* 8-bit signed data    */

+typedef unsigned char   BYTE;    /* 8-bit unsigned data  */

+typedef unsigned short  WORD;    /* 16-bit unsigned data */

+typedef long            LONG;    /* 32-bit signed data   */

+typedef unsigned long   ULONG;   /* 32-bit unsigned data */

+typedef unsigned long   DWORD;   /* 32-bit unsigned data */

+

+

+#endif /* !__TYPEDEFS_H__ */

+/*** EOF ***/

diff --git a/uc_str912/prj_main_add/prj/eclipse_ram.gdb b/uc_str912/prj_main_add/prj/eclipse_ram.gdb
new file mode 100644
index 0000000..0c72df4
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/eclipse_ram.gdb
@@ -0,0 +1,24 @@
+target remote localhost:3333

+monitor reset

+monitor sleep 500

+monitor poll

+monitor soft_reset_halt

+monitor arm7_9 sw_bkpts enable

+

+# Set SRAM size to 96 KB

+monitor mww 0x5C002034 0x0197

+monitor mdw 0x5C002034

+

+# Set Flash, Bank0 size to 512 KB

+monitor mww 0x54000000 0xf

+

+# needed for gdb 6.8 and higher

+set mem inaccessible-by-default off

+

+load

+break main

+continue

+

+

+

+

diff --git a/uc_str912/prj_main_add/prj/eclipse_rom.gdb b/uc_str912/prj_main_add/prj/eclipse_rom.gdb
new file mode 100644
index 0000000..3baf4fe
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/eclipse_rom.gdb
@@ -0,0 +1,24 @@
+target remote localhost:3333

+monitor reset

+monitor sleep 500

+monitor poll

+monitor soft_reset_halt

+monitor arm7_9 force_hw_bkpts enable

+

+# Set SRAM size to 96 KB

+monitor mww 0x5C002034 0x0197

+monitor mdw 0x5C002034

+

+# Set Flash, Bank0 size to 512 KB

+monitor mww 0x54000000 0xf

+

+# needed for gdb 6.8 and higher

+set mem inaccessible-by-default off

+

+load

+break main

+continue

+

+

+

+

diff --git a/uc_str912/prj_main_add/prj/jtagkey.cfg b/uc_str912/prj_main_add/prj/jtagkey.cfg
new file mode 100644
index 0000000..4a25c96
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/jtagkey.cfg
@@ -0,0 +1,59 @@
+# daemon configuration

+telnet_port 4444

+gdb_port 3333

+

+# tell gdb our flash memory map

+# and enable flash programming

+gdb_memory_map enable

+gdb_flash_program enable

+

+#

+# interface, if you want to use an other interface

+# you must replace this section here

+#

+#################### interface start ####################

+

+interface ft2232

+ft2232_device_desc "Amontec JTAGkey A"

+ft2232_layout jtagkey

+ft2232_vid_pid 0x0403 0xcff8

+

+##################### interface end #####################

+

+# jtag speed

+# start slow, speed up after reset

+jtag_khz 16 2000

+

+#delays on reset lines

+jtag_nsrst_delay 100

+jtag_ntrst_delay 100

+

+#use combined on interfaces or targets that can't set TRST/SRST separately

+reset_config trst_and_srst

+

+#jtag scan chain

+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)

+jtag_device 8 0x1 0x1 0xfe

+jtag_device 4 0x1 0xf 0xe

+jtag_device 5 0x1 0x1 0x1e

+

+#target configuration

+daemon_startup reset

+

+#target <type> <startup mode>

+#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>

+target arm966e little reset_halt 1 arm966e

+run_and_halt_time 0 30

+

+target_script 0 reset ./prj/str912_reset.script

+

+target_script 0 gdb_program_config ./prj/str912_program.script

+

+working_area 0 0x50000000 16384 nobackup

+

+#flash bank str9x <base> <size> 0 0 <target#> <variant>

+flash bank str9x 0x00000000 0x00080000 0 0 0

+flash bank str9x 0x00080000 0x00008000 0 0 0

+

+# For more information about the configuration files, take a 

+# look at the "Open On-Chip Debugger (openocd)" documentation.

diff --git a/uc_str912/prj_main_add/prj/str912_program.script b/uc_str912/prj_main_add/prj/str912_program.script
new file mode 100644
index 0000000..9f88149
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_program.script
@@ -0,0 +1,2 @@
+str9x flash_config 0 4 2 0 0x80000

+flash protect 0 0 7 off

diff --git a/uc_str912/prj_main_add/prj/str912_ram.gdb b/uc_str912/prj_main_add/prj/str912_ram.gdb
new file mode 100644
index 0000000..892f14b
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_ram.gdb
@@ -0,0 +1,22 @@
+target remote localhost:3333

+monitor reset

+monitor sleep 500

+monitor poll

+monitor soft_reset_halt

+monitor arm7_9 sw_bkpts enable

+

+# Set SRAM size to 96 KB

+monitor mww 0x5C002034 0x0197

+monitor mdw 0x5C002034

+

+# needed for gdb 6.8 and higher

+set mem inaccessible-by-default off

+

+load

+break main

+continue

+

+

+

+

+

diff --git a/uc_str912/prj_main_add/prj/str912_ram.ld b/uc_str912/prj_main_add/prj/str912_ram.ld
new file mode 100644
index 0000000..0974b39
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_ram.ld
@@ -0,0 +1,218 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author			: Spencer Oliver

+*	Web     		: www.anglia-designs.com

+*

+***********************************************************************************/

+

+/* Stack Sizes */

+

+	_STACKSIZE     = 1024;

+	_STACKSIZE_IRQ = 256;

+	_STACKSIZE_FIQ = 0;

+	_STACKSIZE_SVC = 1024;

+	_STACKSIZE_ABT = 0;

+	_STACKSIZE_UND = 0;

+	_HEAPSIZE      = 1024;

+

+/* Memory Definitions */

+

+MEMORY

+{

+	DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000

+}

+

+/* Section Definitions */

+

+SECTIONS

+{

+	/* first section is .text which is used for code */

+

+	.text :

+	{

+		KEEP(*(.vectors))

+		KEEP(*(.init))

+		*(.text .text.*)

+		*(.gnu.linkonce.t.*)

+		*(.glue_7t .glue_7)

+		KEEP(*(.fini))

+		*(.gcc_except_table)

+	} >DATA =0

+	. = ALIGN(4);

+

+	/* .ctors .dtors are used for c++ constructors/destructors */

+	

+	.ctors :

+	{

+		PROVIDE(__ctors_start__ = .);

+		KEEP(*(SORT(.ctors.*)))

+		KEEP(*(.ctors))

+		PROVIDE(__ctors_end__ = .);

+	} >DATA

+

+	.dtors :

+	{

+		PROVIDE(__dtors_start__ = .); 

+		KEEP(*(SORT(.dtors.*)))

+		KEEP(*(.dtors))

+		PROVIDE(__dtors_end__ = .);

+	} >DATA

+	

+	/* .rodata section which is used for read-only data (constants) */

+

+	.rodata :

+	{

+		*(.rodata .rodata.*)

+		*(.gnu.linkonce.r.*)

+	} >DATA

+	. = ALIGN(4);

+

+	_etext = .;

+	PROVIDE (etext = .);

+

+	/* .data section which is used for initialized data */

+

+	.data : AT (_etext)

+	{

+		*(.data .data.*)

+		*(.gnu.linkonce.d.*)

+		SORT(CONSTRUCTORS)

+	} >DATA

+	. = ALIGN(4);

+	

+	__data_start = .;

+	_edata = .;

+	PROVIDE (edata = .);

+

+	/* .bss section which is used for uninitialized data */

+

+	.bss :

+	{

+		__bss_start = .;

+		__bss_start__ = .;

+		*(.bss .bss.*)

+		*(.gnu.linkonce.b.*)

+		*(COMMON)

+		. = ALIGN(4);

+	} >DATA

+	. = ALIGN(4);

+	__bss_end__ = .;

+	

+	_end = .;

+	PROVIDE(end = .);

+

+	/* .heap section which is used for memory allocation */

+	

+	.heap (NOLOAD) :

+	{

+		__heap_start__ = .;

+		*(.heap)

+		. = MAX(__heap_start__ + _HEAPSIZE , .);

+	} >DATA

+	__heap_end__ = __heap_start__ + SIZEOF(.heap);

+	

+	/* .stack section - user mode stack */

+	

+	.stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_start__ = .;

+		*(.stack)

+		. = MAX(__stack_start__ + _STACKSIZE , .);

+	} >DATA

+	__stack_end__ = __stack_start__ + SIZEOF(.stack);

+

+	/* .stack_irq section */

+	

+	.stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_irq_start__ = .;

+		*(.stack_irq)

+		. = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);

+	} >DATA

+	__stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);

+

+	/* .stack_fiq section */

+	

+	.stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_fiq_start__ = .;

+		*(.stack_fiq)

+	    . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);

+	} >DATA

+	__stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);

+

+	/* .stack_svc section */

+	

+	.stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_svc_start__ = .;

+		*(.stack_svc)

+		. = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);

+	} >DATA

+	__stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);

+

+	/* .stack_abt section */

+	

+	.stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_abt_start__ = .;

+		*(.stack_abt)

+		. = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);

+	} >DATA

+	__stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);

+

+	/* .stack_und section */

+	

+	.stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_und_start__ = .;

+		*(.stack_und)

+    	. = MAX(__stack_und_start__ + _STACKSIZE_UND , .);

+	} >DATA

+	__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);

+	

+	/* Stabs debugging sections.  */

+	.stab          0 : { *(.stab) }

+	.stabstr       0 : { *(.stabstr) }

+	.stab.excl     0 : { *(.stab.excl) }

+	.stab.exclstr  0 : { *(.stab.exclstr) }

+	.stab.index    0 : { *(.stab.index) }

+	.stab.indexstr 0 : { *(.stab.indexstr) }

+	.comment       0 : { *(.comment) }

+	/* DWARF debug sections.

+		Symbols in the DWARF debugging sections are relative to the beginning

+		of the section so we begin them at 0.  */

+	/* DWARF 1 */

+	.debug          0 : { *(.debug) }

+	.line           0 : { *(.line) }

+	/* GNU DWARF 1 extensions */

+	.debug_srcinfo  0 : { *(.debug_srcinfo) }

+	.debug_sfnames  0 : { *(.debug_sfnames) }

+	/* DWARF 1.1 and DWARF 2 */

+	.debug_aranges  0 : { *(.debug_aranges) }

+	.debug_pubnames 0 : { *(.debug_pubnames) }

+	/* DWARF 2 */

+	.debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }

+	.debug_abbrev   0 : { *(.debug_abbrev) }

+	.debug_line     0 : { *(.debug_line) }

+	.debug_frame    0 : { *(.debug_frame) }

+	.debug_str      0 : { *(.debug_str) }

+	.debug_loc      0 : { *(.debug_loc) }

+	.debug_macinfo  0 : { *(.debug_macinfo) }

+	/* SGI/MIPS DWARF 2 extensions */

+	.debug_weaknames 0 : { *(.debug_weaknames) }

+	.debug_funcnames 0 : { *(.debug_funcnames) }

+	.debug_typenames 0 : { *(.debug_typenames) }

+	.debug_varnames  0 : { *(.debug_varnames) }	

+}

+

diff --git a/uc_str912/prj_main_add/prj/str912_reset.script b/uc_str912/prj_main_add/prj/str912_reset.script
new file mode 100644
index 0000000..8c222a8
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_reset.script
@@ -0,0 +1,2 @@
+# -- Enable 96K RAM */

+mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled

diff --git a/uc_str912/prj_main_add/prj/str912_rom.gdb b/uc_str912/prj_main_add/prj/str912_rom.gdb
new file mode 100644
index 0000000..4b2649c
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_rom.gdb
@@ -0,0 +1,22 @@
+target remote localhost:3333

+monitor reset

+monitor sleep 500

+monitor poll

+monitor soft_reset_halt

+monitor arm7_9 force_hw_bkpts enable

+

+# Set SRAM size to 96 KB

+monitor mww 0x5C002034 0x0197

+monitor mdw 0x5C002034

+

+# needed for gdb 6.8 and higher

+set mem inaccessible-by-default off

+

+load

+break main

+continue

+

+

+

+

+

diff --git a/uc_str912/prj_main_add/prj/str912_rom.ld b/uc_str912/prj_main_add/prj/str912_rom.ld
new file mode 100644
index 0000000..8cbb7f7
--- /dev/null
+++ b/uc_str912/prj_main_add/prj/str912_rom.ld
@@ -0,0 +1,249 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author			: Spencer Oliver

+*	Web     		: www.anglia-designs.com

+*

+***********************************************************************************/

+

+/* Stack Sizes */

+

+	_STACKSIZE     = 1024;

+	_STACKSIZE_IRQ = 256;

+	_STACKSIZE_FIQ = 0;

+	_STACKSIZE_SVC = 1024;

+	_STACKSIZE_ABT = 0;

+	_STACKSIZE_UND = 0;

+	_HEAPSIZE      = 1024;

+

+/* Memory Definitions */

+

+MEMORY

+{

+	CODE (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000

+	DATA (rw) : ORIGIN = 0x04000000, LENGTH = 0x00018000

+}

+

+/* Section Definitions */

+

+SECTIONS

+{

+	/* first section is .text which is used for code */

+

+	.text :

+	{

+		CREATE_OBJECT_SYMBOLS

+		KEEP(*(.vectors))

+		KEEP(*(.init))

+		*(.text .text.*)

+		*(.gnu.linkonce.t.*)

+		*(.glue_7t) *(.glue_7) *(.vfp11_veneer)

+		KEEP(*(.fini))

+		*(.gcc_except_table)

+	} >CODE =0

+	. = ALIGN(4);

+

+	/* .ctors .dtors are used for c++ constructors/destructors */

+	

+	.ctors :

+	{

+		PROVIDE(__ctors_start__ = .);

+		KEEP(*(SORT(.ctors.*)))

+		KEEP(*(.ctors))

+		PROVIDE(__ctors_end__ = .);

+	} >CODE

+

+	.dtors :

+	{

+		PROVIDE(__dtors_start__ = .); 

+		KEEP(*(SORT(.dtors.*)))

+		KEEP(*(.dtors))

+		PROVIDE(__dtors_end__ = .);

+	} >CODE

+	

+	/* .rodata section which is used for read-only data (constants) */

+

+	.rodata :

+	{

+		*(.rodata .rodata.*)

+		*(.gnu.linkonce.r.*)

+	} >CODE

+	. = ALIGN(4);

+

+	.init_array :

+	{

+		*(.init)

+        *(.fini)

+		PROVIDE_HIDDEN (__preinit_array_start = .);

+		KEEP (*(.preinit_array))

+		PROVIDE_HIDDEN (__preinit_array_end = .);

+		PROVIDE_HIDDEN (__init_array_start = .);

+		KEEP (*(SORT(.init_array.*)))

+		KEEP (*(.init_array))

+		PROVIDE_HIDDEN (__init_array_end = .);

+		PROVIDE_HIDDEN (__fini_array_start = .);

+		KEEP (*(.fini_array))

+		KEEP (*(SORT(.fini_array.*)))

+		PROVIDE_HIDDEN (__fini_array_end = .);

+	} >CODE

+

+	. = ALIGN(4);

+

+	/* .ARM.exidx is sorted, so has to go in its own output section.  */

+	__exidx_start = .;

+	.ARM.exidx :

+	{

+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)

+	} >CODE

+	__exidx_end = .;

+

+	_etext = .;

+	PROVIDE (etext = .);

+

+	/* .data section which is used for initialized data */

+

+	.data : AT (_etext)

+	{

+		__data_start = .;

+		*(.data .data.*)

+		*(.gnu.linkonce.d.*)

+		SORT(CONSTRUCTORS)

+		. = ALIGN(4);

+		*(.fastrun .fastrun.*)

+	} >DATA

+	. = ALIGN(4);

+	

+	_edata = .;

+	PROVIDE (edata = .);

+

+	/* .bss section which is used for uninitialized data */

+

+	.bss :

+	{

+		__bss_start = .;

+		__bss_start__ = .;

+		*(.bss .bss.*)

+		*(.gnu.linkonce.b.*)

+		*(COMMON)

+		. = ALIGN(4);

+	} >DATA

+	. = ALIGN(4);

+	__bss_end__ = .;

+	

+	_end = .;

+	PROVIDE(end = .);

+

+	/* .heap section which is used for memory allocation */

+	

+	.heap (NOLOAD) :

+	{

+		__heap_start__ = .;

+		*(.heap)

+		. = MAX(__heap_start__ + _HEAPSIZE , .);

+	} >DATA

+	__heap_end__ = __heap_start__ + SIZEOF(.heap);

+	

+	/* .stack section - user mode stack */

+	

+	.stack (__heap_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_start__ = .;

+		*(.stack)

+		. = MAX(__stack_start__ + _STACKSIZE , .);

+	} >DATA

+	__stack_end__ = __stack_start__ + SIZEOF(.stack);

+

+	/* .stack_irq section */

+	

+	.stack_irq (__stack_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_irq_start__ = .;

+		*(.stack_irq)

+		. = MAX(__stack_irq_start__ + _STACKSIZE_IRQ , .);

+	} >DATA

+	__stack_irq_end__ = __stack_irq_start__ + SIZEOF(.stack_irq);

+

+	/* .stack_fiq section */

+	

+	.stack_fiq (__stack_irq_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_fiq_start__ = .;

+		*(.stack_fiq)

+	    . = MAX(__stack_fiq_start__ + _STACKSIZE_FIQ , .);

+	} >DATA

+	__stack_fiq_end__ = __stack_fiq_start__ + SIZEOF(.stack_fiq);

+

+	/* .stack_svc section */

+	

+	.stack_svc (__stack_fiq_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_svc_start__ = .;

+		*(.stack_svc)

+		. = MAX(__stack_svc_start__ + _STACKSIZE_SVC , .);

+	} >DATA

+	__stack_svc_end__ = __stack_svc_start__ + SIZEOF(.stack_svc);

+

+	/* .stack_abt section */

+	

+	.stack_abt (__stack_svc_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_abt_start__ = .;

+		*(.stack_abt)

+		. = MAX(__stack_abt_start__ + _STACKSIZE_ABT , .);

+	} >DATA

+	__stack_abt_end__ = __stack_abt_start__ + SIZEOF(.stack_abt);

+

+	/* .stack_und section */

+	

+	.stack_und (__stack_abt_end__ + 3) / 4 * 4 (NOLOAD) :

+	{

+		__stack_und_start__ = .;

+		*(.stack_und)

+    	. = MAX(__stack_und_start__ + _STACKSIZE_UND , .);

+	} >DATA

+	__stack_und_end__ = __stack_und_start__ + SIZEOF(.stack_und);

+  

+	/* Stabs debugging sections.  */

+	.stab          0 : { *(.stab) }

+	.stabstr       0 : { *(.stabstr) }

+	.stab.excl     0 : { *(.stab.excl) }

+	.stab.exclstr  0 : { *(.stab.exclstr) }

+	.stab.index    0 : { *(.stab.index) }

+	.stab.indexstr 0 : { *(.stab.indexstr) }

+	.comment       0 : { *(.comment) }

+	/* DWARF debug sections.

+		Symbols in the DWARF debugging sections are relative to the beginning

+		of the section so we begin them at 0.  */

+	/* DWARF 1 */

+	.debug          0 : { *(.debug) }

+	.line           0 : { *(.line) }

+	/* GNU DWARF 1 extensions */

+	.debug_srcinfo  0 : { *(.debug_srcinfo) }

+	.debug_sfnames  0 : { *(.debug_sfnames) }

+	/* DWARF 1.1 and DWARF 2 */

+	.debug_aranges  0 : { *(.debug_aranges) }

+	.debug_pubnames 0 : { *(.debug_pubnames) }

+	/* DWARF 2 */

+	.debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }

+	.debug_abbrev   0 : { *(.debug_abbrev) }

+	.debug_line     0 : { *(.debug_line) }

+	.debug_frame    0 : { *(.debug_frame) }

+	.debug_str      0 : { *(.debug_str) }

+	.debug_loc      0 : { *(.debug_loc) }

+	.debug_macinfo  0 : { *(.debug_macinfo) }

+	/* SGI/MIPS DWARF 2 extensions */

+	.debug_weaknames 0 : { *(.debug_weaknames) }

+	.debug_funcnames 0 : { *(.debug_funcnames) }

+	.debug_typenames 0 : { *(.debug_typenames) }

+	.debug_varnames  0 : { *(.debug_varnames) }	

+}

+

diff --git a/uc_str912/prj_main_add/segger.gdb b/uc_str912/prj_main_add/segger.gdb
new file mode 100644
index 0000000..31f9031
--- /dev/null
+++ b/uc_str912/prj_main_add/segger.gdb
@@ -0,0 +1,17 @@
+set complaints 1
+set output-radix 16
+set input-radix 16
+set prompt (arm-gdb) 
+
+target remote localhost:2331
+
+monitor speed adaptive
+monitor endian little
+
+monitor reset
+monitor flash device = STR912FAW44
+monitor flash breakpoints = 1
+monitor flash download = 1
+monitor halt
+
+pwd
diff --git a/uc_str912/prj_main_add/src/main.c b/uc_str912/prj_main_add/src/main.c
new file mode 100644
index 0000000..b846536
--- /dev/null
+++ b/uc_str912/prj_main_add/src/main.c
@@ -0,0 +1,91 @@
+/****************************************************************************

+*  Copyright (c) 2006 by Michael Fischer. All rights reserved.

+*

+*  Redistribution and use in source and binary forms, with or without 

+*  modification, are permitted provided that the following conditions 

+*  are met:

+*  

+*  1. Redistributions of source code must retain the above copyright 

+*     notice, this list of conditions and the following disclaimer.

+*  2. Redistributions in binary form must reproduce the above copyright

+*     notice, this list of conditions and the following disclaimer in the 

+*     documentation and/or other materials provided with the distribution.

+*  3. Neither the name of the author nor the names of its contributors may 

+*     be used to endorse or promote products derived from this software 

+*     without specific prior written permission.

+*

+*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 

+*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 

+*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 

+*  FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 

+*  THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 

+*  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 

+*  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 

+*  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 

+*  AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 

+*  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF 

+*  THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 

+*  SUCH DAMAGE.

+*

+****************************************************************************

+*  History:

+*

+*  30.03.06  mifi   First Version for Insight tutorial

+*  26.01.08  mifi   Added variable "d" to test const variable.

+****************************************************************************/

+#define __MAIN_C__

+

+/*

+ * I use the include only, to show

+ * how to setup a include dir in the makefile

+ */

+#include "typedefs.h"

+

+/*=========================================================================*/

+/*  DEFINE: All Structures and Common Constants                            */

+/*=========================================================================*/

+

+/*=========================================================================*/

+/*  DEFINE: Prototypes                                                     */

+/*=========================================================================*/

+

+/*=========================================================================*/

+/*  DEFINE: Definition of all local Data                                   */

+/*=========================================================================*/

+static const DWORD d = 7;

+

+/*=========================================================================*/

+/*  DEFINE: Definition of all local Procedures                             */

+/*=========================================================================*/

+

+/*=========================================================================*/

+/*  DEFINE: All code exported                                              */

+/*=========================================================================*/

+/***************************************************************************/

+/*  main                                                                   */

+/***************************************************************************/

+int main (void)

+{

+  DWORD a = 1;

+  DWORD b = 2;

+  DWORD c = 0;

+  

+  a = a + d;

+    

+  while (1)

+  {

+    a++;

+    b++;

+    c = a + b;

+  }

+  

+  /*

+   * This return here make no sense.

+   * But to prevent the compiler warning:

+   * "return type of 'main' is not 'int'

+   * we use an int as return :-)

+   */ 

+  return(0);

+}

+

+/*** EOF ***/

diff --git a/uc_str912/prj_main_add/src/startup.s b/uc_str912/prj_main_add/src/startup.s
new file mode 100644
index 0000000..cdf2c44
--- /dev/null
+++ b/uc_str912/prj_main_add/src/startup.s
@@ -0,0 +1,222 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author	: Spencer Oliver

+*	Web     	: www.anglia-designs.com

+*

+*     mifi, 22.01.2008, small changes by the init of the C++ eabi constructors. 

+*                       Here I have replaced the eabi init by the normal init.

+*                       Thanks to Spen for the startup code. 

+***********************************************************************************/

+

+/**** Startup Code (executed after Reset) ****/

+

+/* Frequency values kHz */

+/* set to suit target hardware */

+

+	.equ	FOSC,			25000

+	

+/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */

+

+	.equ	Mode_USR,		0x10

+	.equ	Mode_FIQ,		0x11

+	.equ	Mode_IRQ,		0x12

+	.equ	Mode_SVC,		0x13

+	.equ	Mode_ABT,		0x17

+	.equ	Mode_UND,		0x1B

+	.equ	Mode_SYS,		0x1F			/* available on ARM Arch 4 and later */

+

+	.equ	I_Bit,			0x80			/* when I bit is set, IRQ is disabled */

+	.equ	F_Bit,			0x40			/* when F bit is set, FIQ is disabled */

+

+	.equ	SRAM32,			0x00

+	.equ	SRAM64,			0x08

+	.equ	SRAM96,			0x10

+

+/* --- System memory locations */

+

+	.equ	SCRO_AHB_UMB,		0x5C002034		/* System configuration register 0 (unbuffered) */

+

+	.equ	FMI_BASE_UMB,		0x54000000		/* Flash FMI base address (unbuffered) */

+	.equ	BBSR_off_addr,		0x00

+	.equ	NBBSR_off_addr,		0x04

+	.equ	BBADR_off_addr,		0x0C

+	.equ	NBBADR_off_addr,	0x10

+	.equ	CR_off_addr,		0x18

+

+.ifndef LIBUFF

+	.equ	LIBUFF, 0

+.endif

+

+/* Startup Code must be linked first at Address at which it expects to run. */

+

+	.text

+	.arm

+	.section .init, "ax"

+	

+	.global _start

+	.global _Main_Crystal

+

+/* After remap this will be our reset handler */

+

+_start:

+		LDR     pc, =NextInst

+NextInst:

+

+		NOP		/* Wait for OSC stabilization */

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+

+/* Enable buffered mode */

+

+.if LIBUFF

+		MRC		p15, 0, r0, c1, c0, 0		/* Read CP15 register 1 into r0 */

+		ORR		r0, r0, #0x8				/* Enable Write Buffer on AHB */

+		MCR		p15, 0, r0, c1, c0, 0 		/* Write CP15 register 1 */

+.endif

+

+/* Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, */

+/* when the bank 0 is the boot bank, then enable the Bank 1. */

+

+		LDR		r0, =FMI_BASE_UMB

+		LDR		r1, =0x4					/* configure 512KB Boot bank 0 */

+		STR		r1, [r0, #BBSR_off_addr]

+

+		LDR		r1, =0x2					/* configure 32KB Non Boot bank 1 */

+		STR		r1, [r0, #NBBSR_off_addr]

+

+		LDR		r1, =(0x00000000 >> 2)		/* Boot Bank Base Address */

+		STR		r1, [r0, #BBADR_off_addr]

+

+		LDR		r1, =(0x00080000 >> 2)		/* Non Boot Bank Base Address */

+		STR		r1, [r0, #NBBADR_off_addr]

+

+		LDR		r1, =0x18					/* Flash Banks 0 1 enabled */

+		STR		r1, [r0, #CR_off_addr]

+		

+/* Enable 96K RAM */

+

+		LDR		r0, =SCRO_AHB_UMB

+#		LDR		r1, =0x0196				/* prefetch disabled, default enabled */

+		LDR		r1, =0x0187|SRAM96

+		STR		r1, [r0]

+

+/* Set bits 17-18 (Instruction/Data TCM order) of the */

+/* Core Configuration Control Register */

+ 

+		MOV		r0, #0x60000

+		MCR		p15, 0x1, r0, c15, c1, 0

+  

+/* Setup Stack for each mode */

+

+/* Enter Abort Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_ABT|I_Bit|F_Bit

+		LDR		sp, =__stack_abt_end__

+

+/* Enter Undefined Instruction Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_UND|I_Bit|F_Bit

+		LDR		sp, =__stack_und_end__

+

+/* Enter Supervisor Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_SVC|I_Bit|F_Bit

+		LDR		sp, =__stack_svc_end__

+

+/* Enter FIQ Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_FIQ|I_Bit|F_Bit

+		LDR		sp, =__stack_fiq_end__

+

+/* Enter IRQ Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_IRQ|I_Bit|F_Bit

+		LDR		sp, =__stack_irq_end__

+

+/* Enter System/User Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_SYS

+		LDR		sp, =__stack_end__

+

+/* Setup a default Stack Limit (when compiled with "-mapcs-stack-check") */

+

+		LDR		sl, =__bss_end__

+

+/* Relocate .data section (Copy from ROM to RAM) */

+

+		LDR		r1, =_etext

+		LDR		r2, =__data_start

+		LDR		r3, =_edata

+LoopRel:

+		CMP		r2, r3

+		LDRLO	r0, [r1], #4

+		STRLO	r0, [r2], #4

+		BLO		LoopRel

+

+/* Clear .bss section (Zero init) */

+

+		MOV		r0, #0

+		LDR		r1, =__bss_start__

+		LDR		r2, =__bss_end__

+LoopZI:

+		CMP		r1, r2

+		STRLO	r0, [r1], #4

+		BLO		LoopZI

+  		

+/* Call C++ constructors */

+

+		LDR		r0, =__ctors_start__

+		LDR 		r1, =__ctors_end__

+ctor_loop:

+		CMP 		r0, r1

+		BEQ 		ctor_end

+		LDR 		r2, [r0], #4

+		STMFD 	sp!, {r0-r1}

+		BLX		r2

+		LDMFD		sp!, {r0-r1}

+		B 		ctor_loop

+ctor_end:

+

+/* Need to set up standard file handles */

+/* Only used under simulator, normally overide syscall.c */

+

+#		BL		initialise_monitor_handles

+

+/* if we use debug version of str9lib this will call the init function */

+		

+		BL		libdebug

+libdebug:		

+

+/* Enter the C code, use B instruction so as to never return */

+/* use BL main if you want to use c++ destructors below */

+

+		B		main

+

+/* Return from main, loop forever. */

+

+#exit_loop:

+#		B		exit_loop

+	

+/* Fosc values, used by libstr9 */

+

+_Main_Crystal:	.long	FOSC

+

+	.weak libdebug

+	

+	.end