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| author | Bert Lange <b.lange@fzd.de> | 2011-11-07 15:41:50 +0100 |
|---|---|---|
| committer | Bert Lange <b.lange@fzd.de> | 2011-11-07 15:41:50 +0100 |
| commit | d190f1c37139ec38667a3d6e566dbe1b0549f84d (patch) | |
| tree | 7885f39318cb7852afc24992dd08cb6bb953ac03 /uc_str912/prj_blinky_simple_startup/str91x_lib/src | |
| parent | acc2681723f43b3c8ccb29055bec9d63cb863c78 (diff) | |
| download | zpu-d190f1c37139ec38667a3d6e566dbe1b0549f84d.zip zpu-d190f1c37139ec38667a3d6e566dbe1b0549f84d.tar.gz | |
initial commit
Diffstat (limited to 'uc_str912/prj_blinky_simple_startup/str91x_lib/src')
18 files changed, 9761 insertions, 0 deletions
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_adc.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_adc.c new file mode 100644 index 0000000..a6a07d3 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_adc.c @@ -0,0 +1,590 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_adc.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the ADC software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_adc.h"
+#include "91x_scu.h"
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* ADC mask */
+#define ADC_FLAG_MASK 0x001F /* ADC Flag Mask */
+#define ADC_RESULT_MASK 0x03FF /* ADC Result Mask */
+#define ADC_SCAN_MODE_MASK 0x0020 /* ADC Sacn Mode Mask */
+#define ADC_STANDBY_MODE_MASK 0x0008 /* ADC Standby Mode Mask */
+#define ADC_CMD_MASK 0x0002 /* ADC Command Mask */
+#define ADC_CHANNEL_MASK 0xFE3F /* ADC Channel Select Mask */
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : ADC_DeInit
+* Description : Deinitialize the ADC module registers to their default reset
+* values
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_DeInit(void)
+{
+ /* Reset the ADC registers values */
+ SCU_APBPeriphReset(__ADC,ENABLE);
+ SCU_APBPeriphReset(__ADC,DISABLE);
+}
+
+/*******************************************************************************
+* Function Name : ADC_Init
+* Description : Initializes ADC peripheral according to the specified
+* parameters in the ADC_InitTypeDef structure.
+* Input : ADC_InitStruct: pointer to a ADC_InitTypeDef structure that
+* contains the configuration information for the specified
+* ADC peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_Init(ADC_InitTypeDef* ADC_InitStruct)
+{
+ /* Set the low threshold of the watchdog */
+ ADC->LTR = ADC_InitStruct->ADC_WDG_Low_Threshold;
+
+ /* Set the high threshold of the watchdog */
+ ADC->HTR = ADC_InitStruct->ADC_WDG_High_Threshold;
+
+
+ /* Channel 0 conversion mode */
+ ADC->CCR &= 0xFFFC;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_0_Mode;
+
+ /* Channel 1 conversion mode */
+ ADC->CCR &= 0xFFF3;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_1_Mode << 0x2;
+
+ /* Channel 2 conversion mode */
+ ADC->CCR &= 0xFFCF;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_2_Mode << 0x4;
+
+ /* Channel 3 conversion mode */
+ ADC->CCR &= 0xFF3F;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_3_Mode << 0x6;
+
+ /* Channel 4 conversion mode */
+ ADC->CCR &= 0xFCFF;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_4_Mode << 0x8;
+
+ /* Channel 5 conversion mode */
+ ADC->CCR &= 0xF3FF;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_5_Mode << 0xA;
+
+ /* Channel 6 conversion mode */
+ ADC->CCR &= 0xCFFF;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_6_Mode << 0xC;
+
+ /* Channel 7 conversion mode */
+ ADC->CCR &= 0x3FFF;
+ ADC->CCR |= ADC_InitStruct->ADC_Channel_7_Mode << 0xE;
+
+ /* Select the channel to be converted */
+ ADC->CR &= ADC_CHANNEL_MASK;
+ ADC->CR |= ADC_InitStruct->ADC_Select_Channel << 0x6;
+
+ /* Enable/disable the scan mode */
+ if (ADC_InitStruct->ADC_Scan_Mode == ENABLE)
+ {
+ /* Enable the scan mode */
+ ADC->CR |= ADC_SCAN_MODE_MASK;
+ }
+ else
+ {
+ /* Disable the scan mode */
+ ADC->CR &= ~ADC_SCAN_MODE_MASK;
+ }
+
+ /* Configure the conversion mode */
+ if (ADC_InitStruct->ADC_Conversion_Mode == ADC_Continuous_Mode)
+ {
+ /* ADC continuous mode */
+ ADC->CR |= ADC_Continuous_Mode;
+ }
+ else
+ {
+ /* ADC single mode */
+ ADC->CR &= ADC_Single_Mode;
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_StructInit
+* Description : Fills each ADC_InitStruct member with its reset value.
+* Input : ADC_InitStruct : pointer to a ADC_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
+{
+ ADC_InitStruct->ADC_WDG_High_Threshold = 0x0000;
+ ADC_InitStruct->ADC_WDG_Low_Threshold = 0x0000;
+ ADC_InitStruct->ADC_Channel_0_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_1_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_2_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_3_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_4_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_5_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_6_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Channel_7_Mode = ADC_No_Conversion;
+ ADC_InitStruct->ADC_Select_Channel = ADC_Channel_0;
+ ADC_InitStruct->ADC_Scan_Mode = DISABLE;
+ ADC_InitStruct->ADC_Conversion_Mode = ADC_Single_Mode;
+}
+
+/*******************************************************************************
+* Function Name : ADC_PrescalerConfig
+* Description : This routine is used to configure the ADC prescaler value.
+* Input : ADC_Prescaler: specifies the prescaler value. This parameter
+* can be a value from 0x0 to 0xFF.
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_PrescalerConfig(u8 ADC_Prescaler)
+{
+ ADC->PRS &= 0xFF00;
+ ADC->PRS |= ADC_Prescaler;
+
+}
+/*******************************************************************************
+* Function Name : ADC_GetPrescalerValue
+* Description : This routine is used to get the ADC prescaler value.
+* Input : None
+* Output : None
+* Return : The prescaler value.
+*******************************************************************************/
+u8 ADC_GetPrescalerValue(void)
+{
+ return ADC->PRS & 0x00FF;
+}
+/*******************************************************************************
+* Function Name : ADC_GetFlagStatus
+* Description : Checks whether the specified ADC flag is set or not.
+* Input : ADC_Flag: flag to check.
+* This parameter can be one of the following values:
+* - ADC_FLAG_OV_CH_0: Conversion overflow status for
+* channel 0.
+* - ADC_FLAG_OV_CH_1: Conversion overflow status for
+* channel 1.
+* - ADC_FLAG_OV_CH_2: Conversion overflow status for
+* channel 2.
+* - ADC_FLAG_OV_CH_3: Conversion overflow status for
+* channel 3.
+* - ADC_FLAG_OV_CH_4: Conversion overflow status for
+* channel 4.
+* - ADC_FLAG_OV_CH_5: Conversion overflow status for
+* channel 5.
+* - ADC_FLAG_OV_CH_6: Conversion overflow status for
+* channel 6.
+* - ADC_FLAG_OV_CH_7: Conversion overflow status for
+* channel 7.
+* - ADC_FLAG_ECV: End of conversion status.
+* - ADC_FLAG_AWD: Analog watchdog status.
+* Output : None
+* Return : The NewState of the ADC_Flag (SET or RESET).
+*******************************************************************************/
+FlagStatus ADC_GetFlagStatus(u16 ADC_Flag)
+{
+ u8 AdcReg = 0, FlagPos = 0;
+
+ /* Get the ADC register index */
+ AdcReg = ADC_Flag >> 5;
+
+ /* Get the flag position */
+ FlagPos = ADC_Flag & ADC_FLAG_MASK;
+
+ if(AdcReg == 1) /* The flag to check is in CR register */
+ {
+ if((ADC->CR & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 6) /* The flag to check is in DR0 register */
+ {
+ if((ADC->DR0 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 7) /* The flag to check is in DR1 register */
+ {
+ if((ADC->DR1 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 8) /* The flag to check is in DR2 register */
+ {
+ if((ADC->DR2 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 9) /* The flag to check is in DR3 register */
+ {
+ if((ADC->DR3 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+
+ else if(AdcReg == 0xA) /* The flag to check is in DR4 register */
+ {
+ if((ADC->DR4 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 0xB) /* The flag to check is in DR5 register */
+ {
+ if((ADC->DR5 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else if(AdcReg == 0xC) /* The flag to check is in DR6 register */
+ {
+ if((ADC->DR6 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+ else /* (AdcReg == 0xD), The flag to check is in DR7 register */
+ {
+ if((ADC->DR7 & (1<<FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_ClearFlag
+* Description : Clears the ADC Flag passed as a parameter.
+* Input : ADC_Flag: flag to clear.
+* This parameter can be one of the following values:
+* - ADC_FLAG_ECV: End of conversion status.
+* - ADC_FLAG_AWD: Analog watchdog status.
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_ClearFlag(u16 ADC_Flag)
+{
+ /* Clear the correspondent flag */
+ ADC->CR |= (1<<(ADC_Flag & ADC_FLAG_MASK));
+}
+
+/*******************************************************************************
+* Function Name : ADC_GetConversionValue
+* Description : Read the result of conversion from the appropriate data
+* register.
+* Input : ADC_Channel: the correspondent channel of the ADC peripheral.
+* This parameter can be one of the following values:
+* - ADC_Channel_0: ADC channel 0.
+* - ADC_Channel_1: ADC channel 1.
+* - ADC_Channel_2: ADC channel 2.
+* - ADC_Channel_3: ADC channel 3.
+* - ADC_Channel_4: ADC channel 4.
+* - ADC_Channel_5: ADC channel 5.
+* - ADC_Channel_6: ADC channel 6.
+* - ADC_Channel_7: ADC channel 7.
+* Output : None
+* Return : The result of the conversion for the specific channel.
+*******************************************************************************/
+u16 ADC_GetConversionValue(u16 ADC_Channel)
+{
+ u16 ADC_Conversion_Value = 0;
+
+ switch (ADC_Channel)
+ {
+ case (ADC_Channel_0):
+ /* Get the conversion value of the channel 0 */
+ ADC_Conversion_Value = ADC->DR0 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_1):
+ /* Get the conversion value of the channel 1 */
+ ADC_Conversion_Value = ADC->DR1 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_2):
+ /* Get the conversion value of the channel 2 */
+ ADC_Conversion_Value = ADC->DR2 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_3):
+ /* Get the conversion value of the channel 3 */
+ ADC_Conversion_Value = ADC->DR3 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_4):
+ /* Get the conversion value of the channel 4 */
+ ADC_Conversion_Value = ADC->DR4 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_5):
+ /* Get the conversion value of the channel 5 */
+ ADC_Conversion_Value = ADC->DR5 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_6):
+ /* Get the conversion value of the channel 6 */
+ ADC_Conversion_Value = ADC->DR6 & ADC_RESULT_MASK;
+ break;
+
+ case (ADC_Channel_7):
+ /* Get the conversion value of the channel 7 */
+ ADC_Conversion_Value = ADC->DR7 & ADC_RESULT_MASK;
+ break;
+
+ default:
+ break;
+ }
+
+ return(ADC_Conversion_Value);
+}
+
+/*******************************************************************************
+* Function Name : ADC_GetAnalogWatchdogResult
+* Description : Return the result of the comparaison on the selected Analog
+* Watchdog.
+* Input : ADC_Channel: the correspondent channel of the ADC peripheral.
+* This parameter can be one of the following values:
+* - ADC_Channel_0: ADC channel 0.
+* - ADC_Channel_1: ADC channel 1.
+* - ADC_Channel_2: ADC channel 2.
+* - ADC_Channel_3: ADC channel 3.
+* - ADC_Channel_4: ADC channel 4.
+* - ADC_Channel_5: ADC channel 5.
+* - ADC_Channel_6: ADC channel 6.
+* - ADC_Channel_7: ADC channel 7.
+* Output : None
+* Return : The state of the comparision (SET or RESET).
+*******************************************************************************/
+FlagStatus ADC_GetAnalogWatchdogResult(u16 ADC_Channel)
+{
+ if (ADC->CRR & (1<<ADC_Channel) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_ClearAnalogWatchdogResult
+* Description : Clear the result of the comparaison on the selected Analog
+* Watchdog.
+* Input : ADC_Channel: the correspondent channel of the ADC peripheral.
+* This parameter can be one of the following values:
+* - ADC_Channel_0: ADC channel 0.
+* - ADC_Channel_1: ADC channel 1.
+* - ADC_Channel_2: ADC channel 2.
+* - ADC_Channel_3: ADC channel 3.
+* - ADC_Channel_4: ADC channel 4.
+* - ADC_Channel_5: ADC channel 5.
+* - ADC_Channel_6: ADC channel 6.
+* - ADC_Channel_7: ADC channel 7.
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_ClearAnalogWatchdogResult(u16 ADC_Channel)
+{
+ /* Clear the correspondent watchdog result */
+ ADC->CRR = 1<<ADC_Channel;
+}
+
+/*******************************************************************************
+* Function Name : ADC_GetWatchdogThreshold
+* Description : Get the higher/lower thresholds values of the watchdog.
+* Input : ADC_Threshold: the lower or the higher threshold.
+* This parameter can be one of the following values:
+* - ADC_HigherThreshold: The higher threshold.
+* - ADC_LowerThreshold: The lower threshold.
+* Output : None
+* Return : The selected threshold value.
+*******************************************************************************/
+u16 ADC_GetWatchdogThreshold(ADC_ThresholdType ADC_Threshold)
+{
+ u16 ADC_Threshold_Value = 0;
+
+ switch (ADC_Threshold)
+ {
+ case ADC_LowThreshold:
+ /* Get the low threshold of the watchdog */
+ ADC_Threshold_Value = ADC->LTR;
+ break;
+
+ case ADC_HighThreshold:
+ /* Get the high threshol of the watchdog */
+ ADC_Threshold_Value = ADC->HTR;
+ break;
+
+ default:
+ break;
+ }
+
+ return(ADC_Threshold_Value);
+}
+
+/*******************************************************************************
+* Function Name : ADC_ITConfig
+* Description : Enables or disables the specified ADC interrupts.
+* Input : - ADC_IT: specifies the ADC interrupts sources to be enabled
+* or disabled.
+* This parameter can be one of the following values:
+* - ADC_IT_EndOfConversion: End of conversion interrupt.
+* - ADC_IT_AnalogWDG: Analog watchdog interrupt.
+* - ADC_NewState: new state of the specified ADC interrupts.
+* (ADC_Newstate can be ENABLE or DISABLE).
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_ITConfig(u16 ADC_IT, FunctionalState ADC_NewState)
+{
+ if (ADC_NewState == ENABLE)
+ {
+ /* Enable the interrupt */
+ ADC->CR |= ADC_IT;
+ }
+ else
+ {
+ /* Disable the interrupt */
+ ADC->CR &= ~ADC_IT;
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_StandbyModeCmd
+* Description : Enable or disable the standby mode.
+* Input : ADC_NewState: new state of the ADC standby mode.
+* (ADC_Newstate can be ENABLE or DISABLE).
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_StandbyModeCmd(FunctionalState ADC_NewState)
+{
+ if (ADC_NewState == ENABLE)
+ {
+ /* Enable the standby mode */
+ ADC->CR |= ADC_STANDBY_MODE_MASK;
+ }
+ else
+ {
+ /* Disable the standby mode */
+ ADC->CR &= ~ADC_STANDBY_MODE_MASK;
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_Cmd
+* Description : Power on or put in reset mode the ADC peripheral.
+* Input : ADC_NewState: new state of the ADC peripheral.
+* (ADC_Newstate can be ENABLE or DISABLE).
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_Cmd(FunctionalState ADC_NewState)
+{
+ if (ADC_NewState == ENABLE)
+ {
+ /* Enable the ADC */
+ ADC->CR |= ADC_CMD_MASK;
+ }
+ else
+ {
+ /* Disable the ADC */
+ ADC->CR &= ~ADC_CMD_MASK;
+ }
+}
+
+/*******************************************************************************
+* Function Name : ADC_ConversionCmd
+* Description : Start or stop the ADC conversion in the selected mode.
+* Input : ADC_Conversion: the conversion command.
+* This parameter can be one of the following values:
+* - ADC_Conversion_Start: Start the conversion.
+* - ADC_Conversion_Stop: Stop the Conversion.
+* Output : None
+* Return : None
+*******************************************************************************/
+void ADC_ConversionCmd(u16 ADC_Conversion)
+{
+ if (ADC_Conversion == ADC_Conversion_Start)
+ {
+ /* Start the ADC conversion */
+ ADC->CR |= ADC_Conversion_Start;
+ }
+ else
+ {
+ /* Stop the ADC conversion */
+ ADC->CR &= ADC_Conversion_Stop;
+ }
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ahbapb.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ahbapb.c new file mode 100644 index 0000000..41489ac --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ahbapb.c @@ -0,0 +1,177 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_ahbapb.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the AHBAPB software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_ahbapb.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+#define AHBAPB_SplitCounter_Mask 0xFFE0FFFF
+#define AHBAPB_SetTimeOut_Mask 0xFFFFFFE0
+#define AHBAPB_Address_Mask 0xFEFFFFFF
+#define AHBAPB_FLAG_RW_Mask 0x01000000
+/*******************************************************************************
+* Function Name : AHBAPB_DeInit
+* Description : Deinitializes the AHBAPBx peripheral registers to their default
+* reset values.
+* Input : AHBAPBx: where x can be 0 or 1 to select the AHBAPB peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_DeInit(AHBAPB_TypeDef* AHBAPBx)
+{
+ AHBAPBx->BCR = 0x00000000;
+ AHBAPBx->BSR = 0x00000000;
+}
+/*******************************************************************************
+* Function Name : AHBAPB_Init
+* Description : Initializes the AHBAPBx peripheral according to the specified
+* parameters in the AHBAPB_InitStruct .
+* Input :- AHBAPBx: where x can be 0 or 1 to select the AHBAPB peripheral.
+* - AHBAPB_InitStruct: pointer to a AHBAPB_InitTypeDef structure that
+* contains the configuration information for the specified AHBAPB
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_Init(AHBAPB_TypeDef* AHBAPBx, AHBAPB_InitTypeDef* AHBAPB_InitStruct)
+{
+
+ if(AHBAPB_InitStruct->AHBAPB_Split == AHBAPB_Split_Enable)
+ {
+ /* Set SPLITEN bit;*/
+ AHBAPBx->BCR |= AHBAPB_Split_Enable;
+ /*Split_CNT bits[20:16]*/
+ AHBAPBx->BCR &= AHBAPB_SplitCounter_Mask;
+ AHBAPBx->BCR |= (AHBAPB_InitStruct->AHBAPB_SplitCounter)<<16;
+ }
+ else
+ {
+ /*/ Clear SPLITEN bit;*/
+ AHBAPBx->BCR &= AHBAPB_Split_Disable;
+ }
+ /*APB Time out*/
+ if(AHBAPB_InitStruct->AHBAPB_Error == AHBAPB_Error_Enable)
+ {
+ /* Set ERREN bit*/
+ AHBAPBx->BCR |= AHBAPB_Error_Enable;
+ /*Time ouit counter*/
+ AHBAPBx->BCR &= AHBAPB_SetTimeOut_Mask;
+ AHBAPBx->BCR |= AHBAPB_InitStruct->AHBAPB_SetTimeOut;
+ }
+ else
+ {
+ /* Clear ERREN bit*/
+ AHBAPBx->BCR &= AHBAPB_Error_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : AHBAPB_StructInit
+* Description : Initialize the AHBAPB Init Structure parameters
+* Input : AHBAPB_InitStruct : pointer to a AHBAPB_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_StructInit(AHBAPB_InitTypeDef* AHBAPB_InitStruct)
+{
+ /* Reset AHBAPB init structure parameters values */
+ AHBAPB_InitStruct->AHBAPB_Split = AHBAPB_Split_Enable;
+ AHBAPB_InitStruct->AHBAPB_SplitCounter = 0xFF;
+ AHBAPB_InitStruct->AHBAPB_Error = AHBAPB_Error_Enable;
+ AHBAPB_InitStruct->AHBAPB_SetTimeOut = 0xFF;
+
+}
+
+/*******************************************************************************
+* Function Name : AHBAPB_GetFlagStatus
+* Description : Checks whether the specified AHBAPB flag is set or not.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* - AHBAPB_FLAG: specifies the flag to check.
+* This parameter can be one of the following values:
+* - AHBAPB_FLAG_ERROR: error flag
+* - AHBAPB_FLAG_OUTM : Out of Memory flag
+* - AHBAPB_FLAG_APBT : APB Time-out flag
+* - AHBAPB_FLAG_RW : Access type flag
+* Output : None
+* Return : The new state of AHBAPB_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus AHBAPB_GetFlagStatus(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG)
+{
+ if(AHBAPB_FLAG == AHBAPB_FLAG_RW)
+ {
+ if ((AHBAPBx->PAER & AHBAPB_FLAG_RW_Mask) == RESET)
+ {
+ return RESET;
+ }
+ else
+ {
+ return SET;
+ }
+ }
+ else
+ {
+ if ((AHBAPBx->BSR & AHBAPB_FLAG) == RESET)
+ {
+ return RESET;
+ }
+ else
+ {
+ return SET;
+ }
+ }
+}
+/*******************************************************************************
+* Function Name : AHBAPB_ClearFlag
+* Description : Clears the AHBAPBx flags.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* - AHBAPB_FLAG: flags to clear. This parameter one of the
+* following values:
+* - AHBAPB_FLAG_ERROR: error flag
+* - AHBAPB_FLAG_OUTM : Out of Memory flag
+* - AHBAPB_FLAG_APBT : APB Time-out flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void AHBAPB_ClearFlag(AHBAPB_TypeDef* AHBAPBx, u8 AHBAPB_FLAG)
+{
+ /* Clear the flag */
+ AHBAPBx->BSR &= AHBAPB_FLAG;
+}
+/*******************************************************************************
+* Function Name : AHBAPB_GetPeriphAddrError
+* Description : Gets the AHBAPB error address peripherals.
+* Input : - AHBAPB: where x can be 0 or 1 to select the AHBAPB peripheral
+* Output : None
+* Return : The Peropheral address error
+*******************************************************************************/
+u32 AHBAPB_GetPeriphAddrError(AHBAPB_TypeDef* AHBAPBx)
+{
+ u32 AHBAPB_Address = 0x00000000;
+
+ /*Return Oeripheral address without RW bit*/
+ AHBAPB_Address = (AHBAPBx->PAER)& AHBAPB_Address_Mask;
+ return (AHBAPB_Address);
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_can.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_can.c new file mode 100644 index 0000000..e560d03 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_can.c @@ -0,0 +1,768 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_can.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the CAN software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_can.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/*----------------------------------------------------------------------------*/
+/* Macro Name : xxx_ID_MSK, xxx_ID_ARB */
+/* Description : Form the Mask and Arbitration registers value to filter */
+/* a range of identifiers or a fixed identifier, for standard*/
+/* and extended IDs */
+/*----------------------------------------------------------------------------*/
+#define RANGE_ID_MSK(range_start, range_end) (~((range_end) - (range_start)))
+#define RANGE_ID_ARB(range_start, range_end) ((range_start) & (range_end))
+
+#define FIXED_ID_MSK(id) RANGE_ID_MSK((id), (id))
+#define FIXED_ID_ARB(id) RANGE_ID_ARB((id), (id))
+
+#define STD_RANGE_ID_MSK(range_start, range_end) ((u16)((RANGE_ID_MSK((range_start), (range_end)) & 0x7FF) << 2))
+#define STD_RANGE_ID_ARB(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) << 2))
+
+#define STD_FIXED_ID_MSK(id) ((u16)((FIXED_ID_MSK(id) & 0x7FF) << 2))
+#define STD_FIXED_ID_ARB(id) ((u16)(FIXED_ID_ARB(id) << 2))
+
+#define EXT_RANGE_ID_MSK_L(range_start, range_end) ((u16)(RANGE_ID_MSK((range_start), (range_end)) >> 11))
+#define EXT_RANGE_ID_MSK_H(range_start, range_end) ((u16)(STD_RANGE_ID_MSK((range_start), (range_end)) | ((RANGE_ID_MSK((range_start), (range_end)) >> 27) & 0x03)))
+#define EXT_RANGE_ID_ARB_L(range_start, range_end) ((u16)(RANGE_ID_ARB((range_start), (range_end)) >> 11))
+#define EXT_RANGE_ID_ARB_H(range_start, range_end) ((u16)(STD_RANGE_ID_ARB((range_start), (range_end)) | ((RANGE_ID_ARB((range_start), (range_end)) >> 27) & 0x03)))
+
+#define EXT_FIXED_ID_MSK_L(id) ((u16)(FIXED_ID_MSK(id) >> 11))
+#define EXT_FIXED_ID_MSK_H(id) ((u16)(STD_FIXED_ID_MSK(id) | ((FIXED_ID_MSK(id) >> 27) & 0x03)))
+#define EXT_FIXED_ID_ARB_L(id) ((u16)(FIXED_ID_ARB(id) >> 11))
+#define EXT_FIXED_ID_ARB_H(id) ((u16)(STD_FIXED_ID_ARB(id) | ((FIXED_ID_ARB(id) >> 27) & 0x03)))
+
+/* macro to format the timing register value from the timing parameters*/
+#define CAN_TIMING(tseg1, tseg2, sjw, brp) ((((tseg2-1) & 0x07) << 12) | (((tseg1-1) & 0x0F) << 8) | (((sjw-1) & 0x03) << 6) | ((brp-1) & 0x3F))
+
+/* Private variables ---------------------------------------------------------*/
+/* array of pre-defined timing parameters for standard bitrates*/
+u16 CanTimings[] = { /* value bitrate NTQ TSEG1 TSEG2 SJW BRP */
+ CAN_TIMING(11, 4, 4, 5), /* 0x3AC4 100 kbit/s 16 11 4 4 5 */
+ CAN_TIMING(11, 4, 4, 4), /* 0x3AC3 125 kbit/s 16 11 4 4 4 */
+ CAN_TIMING( 4, 3, 3, 4), /* 0x2383 250 kbit/s 8 4 3 3 4 */
+ CAN_TIMING(13, 2, 1, 1), /* 0x1C00 500 kbit/s 16 13 2 1 1 */
+ CAN_TIMING( 4, 3, 1, 1), /* 0x2300 1 Mbit/s 8 4 3 1 1 */
+};
+
+/* Private function prototypes -----------------------------------------------*/
+static u32 GetFreeIF(void);
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : CAN_DeInit
+* Description : Deinitializes the CAN peripheral registers to their default
+* reset values.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_DeInit (void)
+{
+ /* Reset the CAN registers values*/
+
+ SCU_APBPeriphReset(__CAN,ENABLE); /*CAN peripheral is under Reset */
+ SCU_APBPeriphReset(__CAN,DISABLE); /*CAN peripheral Reset off*/
+
+
+}
+
+/*******************************************************************************
+* Function Name : CAN_Init
+* Description : Initializes the CAN peripheral according to the specified
+* parameters in the CAN_InitStruct.
+* Input : CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
+* contains the configuration information for the CAN peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_Init(CAN_InitTypeDef* CAN_InitStruct)
+{
+ CAN_EnterInitMode(CAN_CR_CCE | CAN_InitStruct->CAN_ConfigParameters);
+ CAN_SetBitrate(CAN_InitStruct->CAN_Bitrate);
+ CAN_LeaveInitMode();
+ CAN_LeaveTestMode();
+}
+
+/*******************************************************************************
+* Function Name : CAN_StructInit
+* Description : Fills each CAN_InitStruct member with its reset value.
+* Input : CAN_InitStruct : pointer to a CAN_InitTypeDef structure which
+* will be initialized.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void CAN_StructInit(CAN_InitTypeDef* CAN_InitStruct)
+{
+/* Reset CAN init structure parameters values */
+ CAN_InitStruct->CAN_ConfigParameters = 0x0;
+ CAN_InitStruct->CAN_Bitrate = 0x2301;
+}
+
+/*******************************************************************************
+* Function Name : CAN_SetBitrate
+* Description : Setups a standard CAN bitrate.
+* Input : bitrate: specifies the bit rate.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_SetBitrate(u32 bitrate)
+{
+ CAN->BTR = CanTimings[bitrate]; /* write the predefined timing value */
+ CAN->BRPR = 0; /* clear the Extended Baud Rate Prescaler */
+}
+
+/*******************************************************************************
+* Function Name : CAN_SetTiming
+* Description : Setups the CAN timing with specific parameters
+* Input : - tseg1: specifies Time Segment before the sample point.
+* This parameter must be a number between 1 and 16.
+* - tseg2: Time Segment after the sample point. This parameter
+* must be a number between 1 and 8.
+* - sjw: Synchronisation Jump Width. This parameter must be
+* a number between 1 and 4.
+* - brp: Baud Rate Prescaler. This parameter must be a number
+* between 1 and 1024.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_SetTiming(u32 tseg1, u32 tseg2, u32 sjw, u32 brp)
+{
+ CAN->BTR = CAN_TIMING(tseg1, tseg2, sjw, brp);
+ CAN->BRPR = ((brp-1) >> 6) & 0x0F;
+}
+
+/*******************************************************************************
+* Function Name : GetFreeIF
+* Description : Searchs the first free message interface, starting from 0.
+* Input : None
+* Output : None
+* Return : A free message interface number (0 or 1) if found, else 2
+*******************************************************************************/
+static u32 GetFreeIF(void)
+{
+ if ((CAN->sMsgObj[0].CRR & CAN_CRR_BUSY) == 0)
+ return 0;
+ else if ((CAN->sMsgObj[1].CRR & CAN_CRR_BUSY) == 0)
+ return 1;
+ else
+ return 2;
+}
+
+/*******************************************************************************
+* Function Name : CAN_SetUnusedMsgObj
+* Description : Configures the message object as unused
+* Input : msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Interface to treat the message
+* - ERROR: No interface to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetUnusedMsgObj(u32 msgobj)
+{
+ u32 msg_if=0;
+
+ if ((msg_if = GetFreeIF()) == 2)
+ {
+ return ERROR;
+ }
+
+ CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+ | CAN_CMR_MASK
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ CAN->sMsgObj[msg_if].M1R = 0;
+ CAN->sMsgObj[msg_if].M2R = 0;
+
+ CAN->sMsgObj[msg_if].A1R = 0;
+ CAN->sMsgObj[msg_if].A2R = 0;
+
+ CAN->sMsgObj[msg_if].MCR = 0;
+
+ CAN->sMsgObj[msg_if].DA1R = 0;
+ CAN->sMsgObj[msg_if].DA2R = 0;
+ CAN->sMsgObj[msg_if].DB1R = 0;
+ CAN->sMsgObj[msg_if].DB2R = 0;
+
+ CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_SetTxMsgObj
+* Description : Configures the message object as TX.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* - idType: specifies the identifier type of the frames that
+* will be transmitted using this message object.
+* This parameter can be one of the following values:
+* - CAN_STD_ID (standard ID, 11-bit)
+* - CAN_EXT_ID (extended ID, 29-bit)
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Interface to treat the message
+* - ERROR: No interface to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetTxMsgObj(u32 msgobj, u32 idType)
+{
+ u32 msg_if=0;
+
+ if ((msg_if = GetFreeIF()) == 2)
+ {
+ return ERROR;
+ }
+
+ CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+ | CAN_CMR_MASK
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ CAN->sMsgObj[msg_if].M1R = 0;
+ CAN->sMsgObj[msg_if].A1R = 0;
+
+ if (idType == CAN_STD_ID)
+ {
+ CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR;
+ CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR;
+ }
+ else
+ {
+ CAN->sMsgObj[msg_if].M2R = CAN_M2R_MDIR | CAN_M2R_MXTD;
+ CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_DIR | CAN_A2R_XTD;
+ }
+
+ CAN->sMsgObj[msg_if].MCR = CAN_MCR_TXIE | CAN_MCR_EOB;
+
+ CAN->sMsgObj[msg_if].DA1R = 0;
+ CAN->sMsgObj[msg_if].DA2R = 0;
+ CAN->sMsgObj[msg_if].DB1R = 0;
+ CAN->sMsgObj[msg_if].DB2R = 0;
+
+ CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_SetRxMsgObj
+* Description : Configures the message object as RX.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* - idType: specifies the identifier type of the frames that
+* will be transmitted using this message object.
+* This parameter can be one of the following values:
+* - CAN_STD_ID (standard ID, 11-bit)
+* - CAN_EXT_ID (extended ID, 29-bit)
+* - idLow: specifies the low part of the identifier range used
+* for acceptance filtering.
+* - idHigh: specifies the high part of the identifier range
+* used for acceptance filtering.
+* - singleOrFifoLast: specifies the end-of-buffer indicator.
+* This parameter can be one of the following values:
+* - TRUE: for a single receive object or a FIFO receive
+* object that is the last one of the FIFO.
+* - FALSE: for a FIFO receive object that is not the
+* last one.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Interface to treat the message
+* - ERROR: No interface to treat the message
+*******************************************************************************/
+ErrorStatus CAN_SetRxMsgObj(u32 msgobj, u32 idType, u32 idLow, u32 idHigh, bool singleOrFifoLast)
+{
+ u32 msg_if=0;
+
+ if ((msg_if = GetFreeIF()) == 2)
+ {
+ return ERROR;
+ }
+
+ CAN->sMsgObj[msg_if].CMR = CAN_CMR_WRRD
+ | CAN_CMR_MASK
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ if (idType == CAN_STD_ID)
+ {
+ CAN->sMsgObj[msg_if].M1R = 0;
+ CAN->sMsgObj[msg_if].M2R = STD_RANGE_ID_MSK(idLow, idHigh);
+
+ CAN->sMsgObj[msg_if].A1R = 0;
+ CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | STD_RANGE_ID_ARB(idLow, idHigh);
+ }
+ else
+ {
+ CAN->sMsgObj[msg_if].M1R = EXT_RANGE_ID_MSK_L(idLow, idHigh);
+ CAN->sMsgObj[msg_if].M2R = CAN_M2R_MXTD | EXT_RANGE_ID_MSK_H(idLow, idHigh);
+
+ CAN->sMsgObj[msg_if].A1R = EXT_RANGE_ID_ARB_L(idLow, idHigh);
+ CAN->sMsgObj[msg_if].A2R = CAN_A2R_MSGVAL | CAN_A2R_XTD | EXT_RANGE_ID_ARB_H(idLow, idHigh);
+ }
+
+ CAN->sMsgObj[msg_if].MCR = CAN_MCR_RXIE | CAN_MCR_UMASK | (singleOrFifoLast ? CAN_MCR_EOB : 0);
+
+ CAN->sMsgObj[msg_if].DA1R = 0;
+ CAN->sMsgObj[msg_if].DA2R = 0;
+ CAN->sMsgObj[msg_if].DB1R = 0;
+ CAN->sMsgObj[msg_if].DB2R = 0;
+
+ CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_InvalidateAllMsgObj
+* Description : Configures all the message objects as unused.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_InvalidateAllMsgObj(void)
+{
+ u32 i=0;
+ for (i = 0; i < 32; i++)
+ CAN_SetUnusedMsgObj(i);
+}
+
+
+/*******************************************************************************
+* Function Name : CAN_ReleaseMessage
+* Description : Releases the message object
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Interface to treat the message
+* - ERROR: No interface to treat the message
+*******************************************************************************/
+ErrorStatus CAN_ReleaseMessage(u32 msgobj)
+{
+ u32 msg_if=0;
+
+ if ((msg_if = GetFreeIF()) == 2)
+ {
+ return ERROR;
+ }
+
+ CAN->sMsgObj[msg_if].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+ CAN->sMsgObj[msg_if].CRR = 1 + msgobj;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_SendMessage
+* Description : Start transmission of a message
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* : - pCanMsg: pointer to the message structure containing data
+* to transmit.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Transmission OK
+* - ERROR: No transmission
+*******************************************************************************/
+ErrorStatus CAN_SendMessage(u32 msgobj, canmsg* pCanMsg)
+{
+ if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
+ {
+ return ERROR;
+ }
+
+ CAN->SR &= ~CAN_SR_TXOK;
+
+ /* read the Arbitration and Message Control*/
+ CAN->sMsgObj[0].CMR = CAN_CMR_ARB | CAN_CMR_CONTROL;
+
+ CAN->sMsgObj[0].CRR = 1 + msgobj;
+
+ if (CAN->sMsgObj[0].CRR & CAN_CRR_BUSY)
+ {
+ return ERROR;
+ }
+
+ /* update the contents needed for transmission*/
+ CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ if ((CAN->sMsgObj[0].A2R & CAN_A2R_XTD) == 0)
+ {
+ /* standard ID*/
+ CAN->sMsgObj[0].A1R = 0;
+ CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
+ }
+ else
+ {
+ /* extended ID*/
+ CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
+ CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
+ }
+
+ CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFEF0) | CAN_MCR_NEWDAT | CAN_MCR_TXRQST | pCanMsg->Dlc;
+
+ CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
+ CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
+ CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
+ CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
+
+ CAN->sMsgObj[0].CRR = 1 + msgobj;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_ReceiveMessage
+* Description : Gets the message, if received.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* - release: specifies the message release indicator.
+* This parameter can be one of the following values:
+* - TRUE: the message object is released when getting
+* the data.
+* - FALSE: the message object is not released.
+* - pCanMsg: pointer to the message structure where received
+* data is copied.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Reception OK
+* - ERROR: No message pending
+*******************************************************************************/
+ErrorStatus CAN_ReceiveMessage(u32 msgobj, bool release, canmsg* pCanMsg)
+{
+ if (!CAN_IsMessageWaiting(msgobj))
+ {
+ return ERROR;
+ }
+
+ CAN->SR &= ~CAN_SR_RXOK;
+
+ /* read the message contents*/
+ CAN->sMsgObj[1].CMR = CAN_CMR_MASK
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_CLRINTPND
+ | (release ? CAN_CMR_TXRQSTNEWDAT : 0)
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ CAN->sMsgObj[1].CRR = 1 + msgobj;
+
+ if (CAN->sMsgObj[1].CRR & CAN_CRR_BUSY)
+ {
+ return ERROR;
+ }
+
+ if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
+ {
+ /* standard ID*/
+ pCanMsg->IdType = CAN_STD_ID;
+ pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
+ }
+ else
+ {
+ /* extended ID*/
+ pCanMsg->IdType = CAN_EXT_ID;
+ pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF);
+ pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
+ pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
+ }
+
+ pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
+
+ pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
+ pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
+ pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
+ pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
+ pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
+ pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
+ pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
+ pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_WaitEndOfTx
+* Description : Waits until current transmission is finished.
+* Input : None
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Transmission ended
+* - ERROR: Transmission did not occur yet
+*******************************************************************************/
+ErrorStatus CAN_WaitEndOfTx(void)
+{
+ if ((CAN->SR & CAN_SR_TXOK) == 0)
+ {
+ return ERROR;
+ }
+ CAN->SR &= ~CAN_SR_TXOK;
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_BasicSendMessage
+* Description : Starts transmission of a message in BASIC mode. This mode
+* does not use the message RAM.
+* Input : pCanMsg: Pointer to the message structure containing data to
+* transmit.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Transmission OK
+* - ERROR: No transmission
+*******************************************************************************/
+ErrorStatus CAN_BasicSendMessage(canmsg* pCanMsg)
+{
+ /* clear NewDat bit in IF2 to detect next reception*/
+ CAN->sMsgObj[1].MCR &= ~CAN_MCR_NEWDAT;
+
+ CAN->SR &= ~CAN_SR_TXOK;
+ CAN->sMsgObj[0].CMR = CAN_CMR_WRRD
+ | CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ if (pCanMsg->IdType == CAN_STD_ID)
+ {
+ /* standard ID*/
+ CAN->sMsgObj[0].A1R = 0;
+ CAN->sMsgObj[0].A2R = (CAN->sMsgObj[0].A2R & 0xE000) | STD_FIXED_ID_ARB(pCanMsg->Id);
+ }
+ else
+ {
+ /* extended ID*/
+ CAN->sMsgObj[0].A1R = EXT_FIXED_ID_ARB_L(pCanMsg->Id);
+ CAN->sMsgObj[0].A2R = ((CAN->sMsgObj[0].A2R) & 0xE000) | EXT_FIXED_ID_ARB_H(pCanMsg->Id);
+ }
+
+ CAN->sMsgObj[0].MCR = (CAN->sMsgObj[0].MCR & 0xFCF0) | pCanMsg->Dlc;
+
+ CAN->sMsgObj[0].DA1R = ((u16)pCanMsg->Data[1]<<8) | pCanMsg->Data[0];
+ CAN->sMsgObj[0].DA2R = ((u16)pCanMsg->Data[3]<<8) | pCanMsg->Data[2];
+ CAN->sMsgObj[0].DB1R = ((u16)pCanMsg->Data[5]<<8) | pCanMsg->Data[4];
+ CAN->sMsgObj[0].DB2R = ((u16)pCanMsg->Data[7]<<8) | pCanMsg->Data[6];
+
+ /* request transmission*/
+ if (CAN->sMsgObj[0].CRR == CAN_CRR_BUSY )
+ {
+ return ERROR;
+ }
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_BasicReceiveMessage
+* Description : Gets the message in BASIC mode, if received. This mode does
+* not use the message RAM.
+* Input : pCanMsg: pointer to the message structure where message is copied.
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Reception OK
+* - ERROR: No message pending
+*******************************************************************************/
+ErrorStatus CAN_BasicReceiveMessage(canmsg* pCanMsg)
+{
+ if ((CAN->sMsgObj[1].MCR & CAN_MCR_NEWDAT) == 0)
+ {
+ return ERROR;
+ }
+
+ CAN->SR &= ~CAN_SR_RXOK;
+
+ CAN->sMsgObj[1].CMR = CAN_CMR_ARB
+ | CAN_CMR_CONTROL
+ | CAN_CMR_DATAA
+ | CAN_CMR_DATAB;
+
+ if ((CAN->sMsgObj[1].A2R & CAN_A2R_XTD) == 0)
+ {
+ /* standard ID*/
+ pCanMsg->IdType = CAN_STD_ID;
+ pCanMsg->Id = (CAN->sMsgObj[1].A2R >> 2) & 0x07FF;
+ }
+ else
+ {
+ /* extended ID*/
+ pCanMsg->IdType = CAN_EXT_ID;
+ pCanMsg->Id = ((CAN->sMsgObj[1].A2R >> 2) & 0x07FF);
+ pCanMsg->Id |= ((u32)CAN->sMsgObj[1].A1R << 11);
+ pCanMsg->Id |= (((u32)CAN->sMsgObj[1].A2R & 0x0003) << 27);
+ }
+
+ pCanMsg->Dlc = CAN->sMsgObj[1].MCR & 0x0F;
+
+ pCanMsg->Data[0] = (u8) CAN->sMsgObj[1].DA1R;
+ pCanMsg->Data[1] = (u8)(CAN->sMsgObj[1].DA1R >> 8);
+ pCanMsg->Data[2] = (u8) CAN->sMsgObj[1].DA2R;
+ pCanMsg->Data[3] = (u8)(CAN->sMsgObj[1].DA2R >> 8);
+ pCanMsg->Data[4] = (u8) CAN->sMsgObj[1].DB1R;
+ pCanMsg->Data[5] = (u8)(CAN->sMsgObj[1].DB1R >> 8);
+ pCanMsg->Data[6] = (u8) CAN->sMsgObj[1].DB2R;
+ pCanMsg->Data[7] = (u8)(CAN->sMsgObj[1].DB2R >> 8);
+
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : CAN_EnterInitMode
+* Description : Switchs the CAN into initialization mode. This function must
+* be used in conjunction with CAN_LeaveInitMode().
+* Input : InitMask: specifies the CAN configuration in normal mode.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_EnterInitMode(u8 InitMask)
+{
+ CAN->CR = InitMask | CAN_CR_INIT;
+ CAN->SR = 0; /* reset the status*/
+}
+
+/*******************************************************************************
+* Function Name : CAN_LeaveInitMode
+* Description : Leaves the initialization mode (switch into normal mode).
+* This function must be used in conjunction with CAN_EnterInitMode().
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_LeaveInitMode(void)
+{
+ CAN->CR &= ~(CAN_CR_INIT | CAN_CR_CCE);
+}
+
+/*******************************************************************************
+* Function Name : CAN_EnterTestMode
+* Description : Switchs the CAN into test mode. This function must be used in
+* conjunction with CAN_LeaveTestMode().
+* Input : TestMask: specifies the configuration in test modes.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_EnterTestMode(u8 TestMask)
+{
+ CAN->CR |= CAN_CR_TEST;
+ CAN->TESTR |= TestMask;
+}
+
+/*******************************************************************************
+* Function Name : CAN_LeaveTestMode
+* Description : Leaves the current test mode (switch into normal mode).
+* This function must be used in conjunction with CAN_EnterTestMode().
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_LeaveTestMode(void)
+{
+ CAN->CR |= CAN_CR_TEST;
+ CAN->TESTR &= ~(CAN_TESTR_LBACK | CAN_TESTR_SILENT | CAN_TESTR_BASIC);
+ CAN->CR &= ~CAN_CR_TEST;
+}
+
+/*******************************************************************************
+* Function Name : CAN_ReleaseTxMessage
+* Description : Releases the transmit message object.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_ReleaseTxMessage(u32 msgobj)
+{
+ CAN->sMsgObj[0].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+ CAN->sMsgObj[0].CRR = 1 + msgobj;
+}
+
+/*******************************************************************************
+* Function Name : CAN_ReleaseRxMessage
+* Description : Releases the receive message object.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : None
+*******************************************************************************/
+void CAN_ReleaseRxMessage(u32 msgobj)
+{
+ CAN->sMsgObj[1].CMR = CAN_CMR_CLRINTPND | CAN_CMR_TXRQSTNEWDAT;
+ CAN->sMsgObj[1].CRR = 1 + msgobj;
+}
+
+/*******************************************************************************
+* Function Name : CAN_IsMessageWaiting
+* Description : Tests the waiting status of a received message.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : A non-zero value if the corresponding message object has
+* received a message waiting to be copied, else 0.
+*******************************************************************************/
+u32 CAN_IsMessageWaiting(u32 msgobj)
+{
+ return (msgobj < 16 ? CAN->ND1R & (1 << msgobj) : CAN->ND2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name : CAN_IsTransmitRequested
+* Description : Tests the request status of a transmitted message.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : A non-zero value if the corresponding message is requested
+* to transmit, else 0.
+*******************************************************************************/
+u32 CAN_IsTransmitRequested(u32 msgobj)
+{
+ return (msgobj < 16 ? CAN->TXR1R & (1 << msgobj) : CAN->TXR2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name : CAN_IsInterruptPending
+* Description : Tests the interrupt status of a message object.
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : A non-zero value if the corresponding message has an
+* interrupt pending, else 0.
+*******************************************************************************/
+u32 CAN_IsInterruptPending(u32 msgobj)
+{
+ return (msgobj < 16 ? CAN->IP1R & (1 << msgobj) : CAN->IP2R & (1 << (msgobj-16)));
+}
+
+/*******************************************************************************
+* Function Name : CAN_IsObjectValid
+* Description : Tests the validity of a message object (ready to use).
+* Input : - msgobj: specifies the Message object number, from 0 to 31.
+* Output : None
+* Return : A non-zero value if the corresponding message object is
+* valid, else 0.
+*******************************************************************************/
+u32 CAN_IsObjectValid(u32 msgobj)
+{
+ return (msgobj < 16 ? CAN->MV1R & (1 << msgobj) : CAN->MV2R & (1 << (msgobj-16)));
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_dma.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_dma.c new file mode 100644 index 0000000..db6ad6e --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_dma.c @@ -0,0 +1,1125 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_dma.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the DMA software functions
+* needed to access all DMA registers.
+********************************************************************************
+* History:v 1.0
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+
+# include"91x_dma.h"
+# include"91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+
+/* DMA Masks "used" only in this module */
+
+#define DMA_Width_DES_MASK 0xFF1FFFFF
+#define DMA_Width_SRC_MASK 0xFFE3FFFF
+#define DMA_Bst_DES_MASK 0xFFFC7FFF
+#define DMA_Bst_SRC_MASK 0xFFFF8FFF
+#define DMA_FlowCntrl_Mask 0xFFFFC7FF
+#define DMA_TrsfSisze_Mask 0xFFFFF000
+#define SRC_Mask 0xFFFFFFE1
+#define DES_Mask 0xFFFFFC3F
+#define DMA_TCIE 0x80000000
+#define DMA_ChannelDESInc 0x08000000
+#define DMA_ChannelSRCInc 0x04000000
+#define DMA_BufferChannel 0x20000000
+#define DMA_HaltChannel 0x00040000
+#define DMA_LockChannel 0x00010000
+#define DMA_CacheChannel 0x40000000
+#define DMA_ChannelActive 0x00020000
+#define DMA_Enable 0x00000001
+#define DMA_ChannelEnable 0x00000001
+
+
+
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : DMA_ITMaskConfig
+* Description : Enables or disables the specified DMA_Channelx Mask interrupt.
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -DMA_ITMask: specifies the DMA interrupt mask source to be enabled or disabled.
+* This parameter can be:
+* - DMA_ITMask_IE (Interrupt error mask).
+* - DMA_ITMask_ITC (Terminal count interrupt mask).
+* - DMA_ITMask_ALL ( All interrupts mask)
+*
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ITMaskConfig(DMA_Channel_TypeDef * DMA_Channelx, u16 DMA_ITMask , FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Mask the Interrupt */
+ {
+ DMA_Channelx-> CCNF |= DMA_ITMask ;
+ }
+
+ else /* Disable the Interrupt Mask*/
+ {
+ DMA_Channelx-> CCNF &= ~ DMA_ITMask ;
+ }
+}
+
+
+
+
+
+/*******************************************************************************
+* Function Name : DMA_ITConfig
+* Description : Enables or disables the DMA_Channelx Terminal Count interrupt.
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ITConfig(DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Enable the Terminal Count Interrupt */
+ {
+ DMA_Channelx->CC |= DMA_TCIE ;
+ }
+
+ else /* Disable the Terminal Count Interrupt */
+ {
+ DMA_Channelx-> CC &= ~ DMA_TCIE ;
+ }
+}
+
+
+/********************************************************************************
+* Function Name : DMA_SyncConfig
+* Description : Enables or disables synchronization logic for the corresponding DMA Request Signal.
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+*
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_SyncConfig(u16 SRCReq, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Enable the synchronization logic for the corresponding DMA Request Signal */
+ {
+
+ DMA->SYNR &= ~ SRCReq ;
+
+ }
+
+ else /* Disable the synchronization logic for the corresponding DMA Request Signal. */
+ {
+ DMA->SYNR |= SRCReq ;
+
+ }
+}
+
+
+/********************************************************************************
+* Function Name : DMA_SetSReq
+* Description : Set the DMA to generate a Single transfer request for the corresponding DMA Request Source.
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+*
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_SetSReq(u16 SRCReq)
+
+{ /* Set the DMA to generate a Single transfer request for the corresponding DMA Request Source */
+ DMA->SSRR |= SRCReq ;
+}
+
+
+
+
+/********************************************************************************
+* Function Name : DMA_SetLSReq
+* Description : Set the DMA to generate a Last Single transfer request for the corresponding DMA Request Source.
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+void DMA_SetLSReq(u16 SRCReq )
+{ /* Set the DMA to generate a Last Single transfer request for the corresponding DMA Request Source */
+ DMA->SLSRR |= SRCReq ;
+}
+
+
+/********************************************************************************
+* Function Name : DMA_SetBReq
+* Description : Set the DMA to generate a Burst transfer request for the corresponding DMA Request Source.
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_SetBReq(u16 SRCReq)
+
+{ /* Set the DMA to generate a Burst transfer request for the corresponding DMA Request Source */
+ DMA->SBRR |= SRCReq ;
+}
+
+
+
+/********************************************************************************
+* Function Name : DMA_SetLBReq
+* Description : Set the DMA to generate a Last Burst transfer request for the corresponding DMA Request Source.
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_SetLBReq(u16 SRCReq)
+
+{ /* Set the DMA to generate a Last Burst transfer request for the corresponding DMA Request Source */
+ DMA->SLBRR |= SRCReq ;
+}
+
+
+/********************************************************************************
+* Function Name : DMA_GetSReq
+* Description : Check for a specific source if it request a Single transfer .
+* Input :
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetSReq(u16 SRCReq)
+
+{ /* Check for a specific source if it request a Single transfer . */
+ if ( (DMA->SSRR & SRCReq )!= RESET )
+ {
+ return SET;
+ }
+
+ else
+ {
+ return RESET;
+ }
+}
+
+
+/********************************************************************************
+* Function Name : DMA_GetLSReq
+* Description : Check for a specific source if it request a Last Single transfer .
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetLSReq(u16 SRCReq)
+
+{ /* Check for a specific source if it request a Last Single transfer . */
+ if ( (DMA->SLSRR & SRCReq)!= RESET )
+ {
+ return SET;
+ }
+
+ else
+ {
+ return RESET;
+ }
+}
+
+/********************************************************************************
+* Function Name : DMA_GetBReq
+* Description : Check for a specific source if it request a Burst transfer .
+* Input :
+* -SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetBReq(u16 SRCReq)
+
+{ /* Check for a specific source if it request a Burst transfer . */
+ if (( DMA->SBRR & SRCReq ) != RESET )
+ {
+ return SET;
+ }
+
+ else
+ {
+ return RESET;
+ }
+}
+
+/********************************************************************************
+* Function Name : DMA_GetLSReq
+* Description : Check for a specific source if it request a Last Burst transfer .
+* Input :
+* Input :
+* - SRCReq:specifies the DMA Request Source.
+* This parameter can be:
+* -DMA_USB_RX_Mask
+* -DMA_USB_TX_Mask
+* -DMA_TIM0_Mask
+* -DMA_TIM1_Mask
+* -DMA_UART0_RX_Mask
+* -DMA_UART0_TX_Mask
+* -DMA_UART1_RX_Mask
+* -DMA_UART1_TX_Mask
+* -DMA_External_Req0_Mask
+* -DMA_External_Req1_Mask
+* -DMA_I2C0_Mask
+* -DMA_I2C1_Mask
+* -DMA_SSP0_RX_Mask
+* -DMA_SSP0_TX_Mask
+* -DMA_SSP1_RX_Mask
+* -DMA_SSP1_TX_Mask
+* Output : None.
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetLBReq(u16 SRCReq)
+
+{ /* Check for a specific source if it request a Last Burst transfer . */
+ if ( ( DMA->SLBRR & SRCReq ) != RESET )
+ {
+ return SET;
+ }
+
+ else
+ {
+ return RESET;
+ }
+}
+
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelHalt
+* Description : Enables DMA requests or ignore extra source DMA requests for
+ the specified channel.
+* Input :
+ -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+ -NewState: new state of the specified DMA_Channelx mask interrupt.
+ This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelHalt(DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Enables DMA requests */
+
+ {
+ DMA_Channelx->CCNF |= DMA_HaltChannel ;
+ }
+
+ else /* Ignore extra source DMA request */
+ {
+ DMA_Channelx->CCNF &= ~ DMA_HaltChannel ;
+ }
+}
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelLockTrsf
+* Description : Enables or disables the Locked Transfers Feature for the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelLockTrsf(DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Locked transfers enabled on channel x */
+
+ {
+ DMA_Channelx->CCNF |= DMA_LockChannel ;
+ }
+
+ else /* Locked transfers disabled on channel xt */
+ {
+ DMA_Channelx->CCNF &= ~ DMA_LockChannel;
+ }
+}
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelCache
+* Description : Enables or disables the cacheability Feature for the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelCache (DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Cacheability Feature enabled on channelx */
+
+ {
+ DMA_Channelx->CC |= DMA_CacheChannel ;
+ }
+
+ else /* Cacheability Feature disabled on channelx */
+ {
+ DMA_Channelx->CC &= ~ DMA_CacheChannel ;
+ }
+}
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelBuffering
+* Description : Enables or disables the Buffering Feature for the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelBuffering (DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Cacheability Feature enabled on channel x */
+
+ {
+ DMA_Channelx->CC |= DMA_BufferChannel ;
+ }
+
+ else /* Cacheability Feature disabled on channel xt */
+ {
+ DMA_Channelx->CC &= ~ DMA_BufferChannel ;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MA_ChannelProt0Mod
+* Description : Sets The User or Privileged mode for the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -Prot0Mode: Specifies the Privileged mode Or the User mode.
+* This parameter can be:
+* - DMA_PrevilegedMode
+* - DMA_UserMode
+*
+*
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelProt0Mode (DMA_Channel_TypeDef * DMA_Channelx, u32 Prot0Mode)
+
+{
+ if (Prot0Mode==DMA_PrevilegedMode) /* Privileged mode */
+ {
+ DMA_Channelx->CC |= DMA_PrevilegedMode ;
+ }
+
+ else /* User mode */
+ {
+ DMA_Channelx->CC &= DMA_UserMode ;
+ }
+}
+
+
+
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelSRCIncConfig
+* Description : Enables or disables the Source address incrementation after each transfer for
+* the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelSRCIncConfig (DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* The Source address is incremented after each transfer */
+
+ {
+ DMA_Channelx->CC |= DMA_ChannelSRCInc ;
+ }
+
+ else /* The Source address is not incremented after each Transfer */
+ {
+ DMA_Channelx->CC &= ~ DMA_ChannelSRCInc ;
+ }
+}
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelDESIncConfig
+* Description : Enables or disables the Destination address incrementation after each transfer for
+* the specified DMA_Channelx
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelDESIncConfig (DMA_Channel_TypeDef * DMA_Channelx, FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* The Destination address is incremented after each transfer */
+
+ {
+ DMA_Channelx->CC |= DMA_ChannelDESInc ;
+ }
+
+ else /* The Destination address is not incremented after each Transfer */
+ {
+ DMA_Channelx->CC &= ~ DMA_ChannelDESInc ;
+ }
+}
+
+
+
+/********************************************************************************
+* Function Name : DMA_GetChannelStatus
+* Description : Checks the status of DMA channelx ( Enabled or Disabled).
+* - ChannelIndx:specifies the DMA Channel to be checked.
+* This parameter can be:
+* - Channel0
+* - Channel1
+* - Channel2
+* - Channel3
+* - Channel4
+* - Channel5
+* - Channel6
+* - Channel7
+* Output : None.
+*
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetChannelStatus(u8 ChannelIndx )
+
+{
+
+ if ( ( DMA->ENCSR & (1 << ChannelIndx )) != RESET )
+ {
+ return SET; /* Channelx Enabled */
+ }
+
+ else
+
+ {
+
+ return RESET; /* Channelx Disabled */
+
+ }
+
+}
+
+
+
+/********************************************************************************
+* Function Name : DMA_GetITStatus
+* Description : Checks the status of Terminal Count and Error interrupts request after and before Masking.
+* Input :
+* - ChannelIndx:specifies the DMA Channel to be checked.
+* This parameter can be:
+* - Channel0
+* - Channel1
+* - Channel2
+* - Channel3
+* - Channel4
+* - Channel5
+* - Channel6
+* - Channel7
+*
+*. - DMA_ITReq: specifies the DMA interrupt request status to be checked.
+* This parameter can be:
+*
+* - DMA_IS
+* - DMA_TCS
+* - DMA_ES
+* - DMA_TCRS
+* - DMA_ERS.
+*
+* Output : None.
+*
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+ITStatus DMA_GetITStatus(u8 ChannelIndx,u8 DMA_ITReq)
+
+{
+ u32 DMAReg = 0;
+
+ switch(DMA_ITReq)
+
+ {
+
+ case (DMA_IS): /*The status of the interrupts after masking : logical or of all Interrupts after Masking*/
+ DMAReg = DMA->ISR;
+ break;
+
+
+
+ case (DMA_TCS): /* The status of the Terminal count request after masking */
+ DMAReg = DMA->TCISR;
+ break;
+
+
+ case (DMA_ES): /* The status of the error request after masking */
+ DMAReg = DMA->EISR;
+ break;
+
+
+ case (DMA_TCRS): /* Indicates if the DMA channel is requesting a transfer complete (terminal count Interrupt) prior to masking or Not. */
+ DMAReg = DMA->TCRISR;
+ break;
+
+ case (DMA_ERS): /* Indicates if the DMA channel is requesting an Error Interrupt prior to masking or Not. */
+ DMAReg = DMA->ERISR;
+ break;
+
+
+ }
+
+ if((DMAReg &(1 << ChannelIndx )) != RESET )
+
+ {
+ return SET;
+ }
+
+ else
+
+ {
+
+ return RESET;
+
+
+ }
+
+}
+
+
+/********************************************************************************
+* Function Name : DMA_ClearIT
+* Description : Clears The Interrupt pending bits for termnal count or Error interrupts for a specified DMA Channel.
+* - ChannelIndx:specifies the DMA Channel to be checked.
+* This parameter can be:
+* - Channel0
+* - Channel1
+* - Channel2
+* - Channel3
+* - Channel4
+* - Channel5
+* - Channel6
+* - Channel7
+* - DMA_ITClr : Specifies the DMA interrupt pending to be cleared.
+*. This parameter can be:
+* - DMA_TCC
+* - DMA_EC.
+*
+* Output : None.
+
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+void DMA_ClearIT(u8 ChannelIndx,u8 DMA_ITClr)
+
+{
+
+
+ switch(DMA_ITClr)
+
+ {
+
+ case (DMA_TCC): /* Clear The status of the Terminal count interrupt on the corresponding channel.*/
+ DMA->TCICR |=(1 << ChannelIndx );
+ break;
+
+
+
+ case (DMA_EC): /* Clear The status of the error interrupt on the corresponding channel.*/
+ DMA->EICR |=(1 << ChannelIndx );
+ break;
+
+
+
+ }
+
+
+
+}
+
+
+/*******************************************************************************
+* Function Name : DMA_Cmd(FunctionalState NewState)
+* Description : Enables or disables the DMA peripheral.
+*
+* Input :
+* -NewState: new state of the DMA.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_Cmd(FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* ENABLE the DMA peripheral */
+
+ {
+ DMA-> CNFR |= DMA_Enable ;
+ }
+
+ else /* DISABLE the DMA peripheral */
+ {
+ DMA-> CNFR &= ~ DMA_Enable ;
+ }
+}
+
+
+
+/*******************************************************************************
+* Function Name : DMA_ChannelCmd
+* Description : Enables or disables the specified DMA_Channelx
+*
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -NewState: new state of the specified DMA_Channelx mask interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None.
+* Return : None.
+*******************************************************************************/
+
+
+void DMA_ChannelCmd (DMA_Channel_TypeDef *DMA_Channelx,FunctionalState NewState)
+
+{
+ if (NewState==ENABLE) /* Enable The Channelx */
+
+ {
+ DMA_Channelx->CCNF |= DMA_ChannelEnable ;
+ }
+
+ else /* Disable The Channelx */
+ {
+ DMA_Channelx-> CCNF &= ~ DMA_ChannelEnable ;
+ }
+}
+
+
+
+/********************************************************************************
+* Function Name : DMA_GetChannelActiveStatus
+* Description : Checks The DMA_Channelx FIFO if it has data or not.
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+*
+*
+* Output : None.
+*
+* Return : SET or RESET.
+*******************************************************************************/
+
+
+FlagStatus DMA_GetChannelActiveStatus( DMA_Channel_TypeDef * DMA_Channelx )
+
+{
+
+ if ( ( DMA_Channelx->CCNF & DMA_ChannelActive) != RESET )
+ {
+ return SET; /* The DMA_Channelx FIFO has data */
+ }
+
+ else
+
+ {
+
+ return RESET; /* No data in the DMA_Channelx FIFO */
+
+
+ }
+
+}
+
+
+/********************************************************************************
+* Function Name : DMA_DeInit
+* Description : Initializes the DMA peripheral registers to their default reset values.
+*
+*
+* Input : None
+*
+* Output : None.
+*
+* Called Functions:
+*
+* - SCU_AHBPeriphReset: Function defined in the System clock Unit "scu.c".
+*
+*
+* Return : None
+*******************************************************************************/
+
+
+void DMA_DeInit(void)
+
+{
+
+ SCU_AHBPeriphReset(__DMA, ENABLE); /*DMA peripheral is under Reset " Reset on"*/
+ SCU_AHBPeriphReset(__DMA, DISABLE); /*DMA peripheral Reset off*/
+}
+
+
+
+/********************************************************************************
+* Function Name : DMA_StructInit
+* Description : Fills each DMA_InitStruct member with its reset value.
+* Input :
+* -DMA_InitStruct: pointer to a DMA_InitTypeDef structure which will be initialized.
+*
+* Output : None.
+*
+* Return : None
+*******************************************************************************/
+
+
+void DMA_StructInit(DMA_InitTypeDef * DMA_InitStruct)
+
+{
+
+ /* Initialize The current source address */
+ DMA_InitStruct-> DMA_Channel_SrcAdd =0x0000000;
+
+
+ /* Initialize The current Destination address */
+ DMA_InitStruct->DMA_Channel_DesAdd=0x00000000;
+
+
+
+ /* Initialize The Linked List Items */
+ DMA_InitStruct->DMA_Channel_LLstItm=0x00000000 ;
+
+
+
+ /* Initialize The Destination width */
+ DMA_InitStruct->DMA_Channel_DesWidth= DMA_DesWidth_Byte;
+
+
+
+ /* Initialize The source width */
+ DMA_InitStruct->DMA_Channel_SrcWidth= DMA_SrcWidth_Byte;
+
+
+ /* Initialize The Burst Size for the Destination */
+ DMA_InitStruct->DMA_Channel_DesBstSize= DMA_DesBst_1Data; /* 1 Data "one Data can be byte, halfword or word depending on the Destination width */
+
+
+
+ /* Initialize The Burst Size for the Source*/
+ DMA_InitStruct->DMA_Channel_SrcBstSize= DMA_SrcBst_1Data; /* 1 Data "one Data can be byte, halfword or word depending on the source width */
+
+ /* Initialize The Flow control and transfer type for the DMA transfer */
+ DMA_InitStruct->DMA_Channel_FlowCntrl=DMA_FlowCntrlt0_DMA; /* memory to memory transfer with DMA as flow controller */
+
+
+ /* Initialize The Transfer Size */
+ DMA_InitStruct->DMA_Channel_TrsfSize =0x00;
+
+
+
+ /* Initialize the DMA source request peripheral :"This field is ignored if the source of the transfer is from memory" */
+ DMA_InitStruct->DMA_Channel_Src =0x00;
+
+
+
+ /* Initialize the DMA Destination request peripheral :"This field is ignored if the destination of the transfer is to memory.*/
+
+ DMA_InitStruct->DMA_Channel_Des=0x00;
+
+
+}
+
+
+
+
+/********************************************************************************
+* Function Name : DMA_Init
+* Description : Initializes the DMA_Channelx according to the specified parameters
+* in the DMA_InitStruct .
+*
+* Input :
+* -DMA_Channelx: where x can be 0,1,2,3,4,5,6,or 7 to select the DMA Channel.
+* -DMA_InitStruct: pointer to a DMA_InitTypeDef structure
+* ( Structure Config to be load in DMA Registers). .
+*
+* Output : None.
+*
+* Return : None
+*******************************************************************************/
+
+
+void DMA_Init(DMA_Channel_TypeDef * DMA_Channelx, DMA_InitTypeDef * DMA_InitStruct)
+
+{
+
+
+
+ /* Select the DMA source peripheral request */
+ DMA_Channelx->CCNF &= SRC_Mask;
+ DMA_Channelx->CCNF |= DMA_InitStruct->DMA_Channel_Src;
+
+
+ /* Select the flow controller and the transfer type */
+ DMA_Channelx->CCNF &= DMA_FlowCntrl_Mask;
+ DMA_Channelx->CCNF |=DMA_InitStruct->DMA_Channel_FlowCntrl;
+
+
+ /* Select the DMA Destination peripheral request*/
+ DMA_Channelx->CCNF &= DES_Mask;
+ DMA_Channelx->CCNF |= DMA_InitStruct->DMA_Channel_Des;
+
+ /* Set the source address */
+ DMA_Channelx->SRC = DMA_InitStruct-> DMA_Channel_SrcAdd ;
+
+
+ /* Set the destination address */
+
+ DMA_Channelx->DES = DMA_InitStruct->DMA_Channel_DesAdd ;
+
+
+
+ /* Set the linked list Items address */
+ DMA_Channelx->LLI = DMA_InitStruct->DMA_Channel_LLstItm ;
+
+
+ /* Set The Destination width */
+ DMA_Channelx->CC &= DMA_Width_DES_MASK;
+ DMA_Channelx->CC |= DMA_InitStruct->DMA_Channel_DesWidth;
+
+
+ /* Set The Source width */
+ DMA_Channelx->CC &= DMA_Width_SRC_MASK;
+ DMA_Channelx->CC |= DMA_InitStruct->DMA_Channel_SrcWidth;
+
+ /* Set The Burst Size for the Destination */
+ DMA_Channelx->CC &= DMA_Bst_DES_MASK;
+ DMA_Channelx->CC |= DMA_InitStruct->DMA_Channel_DesBstSize;
+
+ /* Set The Burst Size for the Source */
+ DMA_Channelx->CC &= DMA_Bst_SRC_MASK;
+ DMA_Channelx->CC |=DMA_InitStruct->DMA_Channel_SrcBstSize;
+
+
+ /* Initialize The Transfer Size for the Source */
+ DMA_Channelx->CC &= DMA_TrsfSisze_Mask;
+ DMA_Channelx->CC |= DMA_InitStruct->DMA_Channel_TrsfSize;
+
+
+}
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_emi.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_emi.c new file mode 100644 index 0000000..deadae8 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_emi.c @@ -0,0 +1,167 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_emi.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the EMI software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_emi.h"
+#include "91x_scu.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* These constant variables are used as masks to handle the EMI registers. */
+
+#define EMI_PageModeRead_TL_Mask 0xFFFFF3FF
+#define EMI_PageModeRead_Sel_Mask 0xFFFFFEFF
+#define EMI_MemWidth_Mask 0xFFFFFFCF
+#define EMI_WriteProtect_Mask 0xFFFFFEF7
+
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Registers reset value */
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************
+* Function Name : EMI_DeInit
+* Description : Deinitializes the EMI peripheral registers to their default
+* reset values.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+
+void EMI_DeInit(void)
+{
+
+ SCU_AHBPeriphReset(__EMI, ENABLE); /* EMI peripheral under Reset */
+ SCU_AHBPeriphReset(__EMI,DISABLE ); /* EMI not under Reset */
+
+}
+
+/*******************************************************************************
+* Function Name : EMI_StructInit
+* Description : Fills the EMI_InitTypeDef structure member with its reset
+* value.
+* Input : EMI_InitStruct : pointer to a EMI_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+
+void EMI_StructInit( EMI_InitTypeDef *EMI_InitStruct)
+{
+
+ /* Number of bus turnaround cycles added between read and write accesses.*/
+ /*This member can be 0x01,0x02,0x03, ....0xF (Reset value:0xF "15 cycles"*/
+
+ EMI_InitStruct->EMI_Bank_IDCY =0xF;
+
+
+ /* Number of wait states for read accesses*/
+ /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/
+
+ EMI_InitStruct->EMI_Bank_WSTRD =0x1F;
+
+
+ /* Number of wait states for write accesses*/
+ /*This member can be: 0x01,0x02,0x03, ....0x1F (Reset value:0x1F "31 cycles"*/
+
+ EMI_InitStruct->EMI_Bank_WSTWR =0x1F;
+
+ /*Output enable assertion delay from chip select assertion*/
+ /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x01 "1 cycle"*/
+
+ EMI_InitStruct->EMI_Bank_WSTROEN =0x01;
+
+
+ /*Write enable assertion delay from chip select assertion*/
+ /*This member can be: 0x01,0x02,0x03, ....0xF (Reset value:0x00 "0 cycle"*/
+
+ EMI_InitStruct->EMI_Bank_WSTWEN =0x00;
+
+
+ /*This member Controls the memory width*/
+ /*This member can be :"EMI_Width_Byte" = 8 bits width or "EMI_Width_HalfWord" = 16 bits width*/
+
+ EMI_InitStruct->EMI_Bank_MemWidth = EMI_Width_Byte;
+
+
+ /*Write protection feature */
+ /*This member can be :"EMI_Bank_NonWriteProtect" = No write protection or "EMI_Bank_WriteProtect" = bank is write protected*/
+
+ EMI_InitStruct-> EMI_Bank_WriteProtection= EMI_Bank_NonWriteProtect;
+
+
+ /* page transfer length for page mode read */
+ /*This member can be :"EMI_4Data" = 4 transfers burst or "EMI_8Data" = 8 transfers burst*/
+
+ EMI_InitStruct->EMI_PageModeRead_TransferLength= EMI_4Data;
+
+ /*Select or deselect the page mode read*/
+ /*This member can be :"EMI_NormalMode" =Normal Mode or "EMI_PageModeRead" = Page Mode Read*/
+
+ EMI_InitStruct->EMI_PageModeRead_Selection = EMI_NormalMode;
+
+
+}
+
+/*******************************************************************************
+* Function Name : EMI_Init
+* Description : Initializes EMI peripheral according to the specified
+* parameters in the EMI_InitStruct.
+
+* Input : EMI_Bankx:where x can be 0,1,2 or 3 to select the EMI Bank.
+ EMI_InitStruct: pointer to a EMI_InitTypeDef structure
+ ( Structure Config to be loaded in EMI Registers). .
+
+* Output : None
+* Return : None
+*******************************************************************************/
+
+void EMI_Init( EMI_Bank_TypeDef* EMI_Bankx, EMI_InitTypeDef* EMI_InitStruct)
+
+{
+
+ EMI_Bankx->ICR = EMI_InitStruct-> EMI_Bank_IDCY ;
+
+ EMI_Bankx->RCR = EMI_InitStruct->EMI_Bank_WSTRD ;
+
+ EMI_Bankx->WCR = EMI_InitStruct->EMI_Bank_WSTWR ;
+
+ EMI_Bankx->OECR = EMI_InitStruct->EMI_Bank_WSTROEN;
+
+ EMI_Bankx->WECR = EMI_InitStruct->EMI_Bank_WSTWEN ;
+
+ EMI_Bankx->BCR &= EMI_MemWidth_Mask;
+ EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_MemWidth;
+
+ EMI_Bankx->BCR &= EMI_WriteProtect_Mask;
+ EMI_Bankx->BCR |= EMI_InitStruct->EMI_Bank_WriteProtection;
+
+ EMI_Bankx->BCR &= EMI_PageModeRead_TL_Mask;
+ EMI_Bankx->BCR |= EMI_InitStruct->EMI_PageModeRead_TransferLength;
+
+ EMI_Bankx->BCR &= EMI_PageModeRead_Sel_Mask;
+ EMI_Bankx->BCR |= EMI_InitStruct->EMI_PageModeRead_Selection;
+
+
+}
+
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_fmi.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_fmi.c new file mode 100644 index 0000000..fb558ad --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_fmi.c @@ -0,0 +1,519 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_fmi.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the FMI software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_fmi.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+#define TIMEOUT 0xFFFFFF /* Timeout value */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+
+/*******************************************************************************
+* Function Name : FMI_BankRemapConfig
+* Description : Configure the addresses and sizes of bank 0 and bank 1.
+* Input1 : FMI_BootBankSize: specifies the boot bank size.
+* This parameter can be one of the following values:
+* - 0x0: 32KBytes.
+* - 0x1: 64KBytes.
+* - 0x2: 128KBytes.
+* - 0x3: 256KBytes.
+* - 0x4: 512KBytes.
+* ....
+* - 0xB: 64MBytes.
+* Input2 : FMI_NonBootBankSize: specifies the non boot bank size.
+* This parameter can be one of the following values:
+* - 0x0: 8KBytes.
+* - 0x1: 16KBytes.
+* - 0x2: 32KBytes.
+* - 0x3: 64KBytes.
+* ....
+* - 0xD: 64MBytes.
+* Input3 : FMI_BootBankAddress: specifies the address of the boot bank.
+* Input4 : FMI_NonBootBankAddress: specifies the address of the non
+* boot bank.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_BankRemapConfig(u8 FMI_BootBankSize, u8 FMI_NonBootBankSize, \
+ u32 FMI_BootBankAddress, u32 FMI_NonBootBankAddress)
+{
+ FMI->BBSR = FMI_BootBankSize;
+ FMI->NBBSR = FMI_NonBootBankSize;
+ FMI->BBADR = (FMI_BootBankAddress >> 2);
+ FMI->NBBADR = (FMI_NonBootBankAddress >> 2);
+ FMI->CR |= 0x18; /* Enable bank 1 */
+}
+
+/*******************************************************************************
+* Function Name : FMI_Config
+* Description : Configure the FMI.
+* Input1 : FMI_ReadWaitState: specifies the needed read wait states.
+* This parameter can be one of the following values:
+* - FMI_READ_WAIT_STATE_1: One read wait state.
+* - FMI_READ_WAIT_STATE_2: Two read wait states.
+* - FMI_READ_WAIT_STATE_3: Three read wait states.
+* Input2 : FMI_WriteWaitState: specifies the needed write wait states.
+* This parameter can be one of the following values:
+* - FMI_WRITE_WAIT_STATE_1: One write wait state.
+* - FMI_WRITE_WAIT_STATE_2: Two write wait states.
+* Input3 : FMI_PWD: specifies the power down mode status.
+* This parameter can be one of the following values:
+* - FMI_PWD_ENABLE: Enable the PWD.
+* - FMI_PWD_DISABLE: Disable the PWD.
+* Input4 : FMI_LVDEN: specifies the low voltage detector status.
+* This parameter can be one of the following values:
+* - FMI_LVD_ENABLE: Enable the LVD.
+* - FMI_LVD_DISABLE: Disable the LVD.
+* Input5 : FMI_FreqRange: specifies the working frequency range.
+* This parameter can be one of the following values:
+* - FMI_FREQ_LOW: Low working frequency (up to 66MHz).
+* - FMI_FREQ_HIGH: High working frequency (above 66MHz) .
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_Config(u16 FMI_ReadWaitState, u32 FMI_WriteWaitState, u16 FMI_PWD,\
+ u16 FMI_LVDEN, u16 FMI_FreqRange)
+{
+ /* Configure the write wait state value */
+ if (FMI_WriteWaitState == FMI_WRITE_WAIT_STATE_1)
+ {
+ FMI->CR |= FMI_WRITE_WAIT_STATE_1;
+ }
+ else
+ {
+ FMI->CR &= FMI_WRITE_WAIT_STATE_0;
+ }
+
+ /* Write a write flash configuration register command */
+ *(vu16 *)FMI_BANK_1 = 0x60;
+
+ /* Configure the flash configuration register */
+ *(vu16 *)(FMI_BANK_1|FMI_ReadWaitState|FMI_PWD|FMI_LVDEN|FMI_FreqRange) = 0x03;
+}
+
+/*******************************************************************************
+* Function Name : FMI_EraseSector
+* Description : Erase the needed sector.
+* Input : FMI_Sector: specifies the sector to be erased.
+* This parameter can be one of the following values:
+* - FMI_B0S0: FMI bank 0 sector 0.
+* - FMI_B0S1: FMI bank 0 sector 1.
+* - FMI_B0S2: FMI bank 0 sector 2.
+* - FMI_B0S3: FMI bank 0 sector 3.
+* - FMI_B0S4: FMI bank 0 sector 4.
+* - FMI_B0S5: FMI bank 0 sector 5.
+* - FMI_B0S6: FMI bank 0 sector 6.
+* - FMI_B0S7: FMI bank 0 sector 7.
+* - FMI_B1S0: FMI bank 1 sector 0.
+* - FMI_B1S1: FMI bank 1 sector 1.
+* - FMI_B1S2: FMI bank 1 sector 2.
+* - FMI_B1S3: FMI bank 1 sector 3.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_EraseSector(vu32 FMI_Sector)
+{
+ /* Write an erase set-up command to the sector */
+ *(vu16 *)FMI_Sector = 0x20;
+
+ /* Write an erase confirm command to the sector */
+ *(vu16 *)FMI_Sector = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_EraseBank
+* Description : Erase the needed bank.
+* Input : FMI_Bank: specifies the bank to be erased.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_EraseBank(vu32 FMI_Bank)
+{
+ /* Write a bank erase set-up command to the bank */
+ *(vu16 *)FMI_Bank = 0x80;
+
+ /* Write an erase confirm command to the sector */
+ *(vu16 *)FMI_Bank = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteHalfWord
+* Description : Write a halfword to the needed Flash memory address.
+* Input 1 : FMI_Address: specifies the address offset where the data will
+* be written.
+* Input 2 : FMI_Data: the needed data.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteHalfWord(u32 FMI_Address, u16 FMI_Data)
+{
+ /* Write a program command to the sector to be written */
+ *(vu16 *)(FMI_Address & 0xFFFFFFFC) = 0x40;
+
+ /* Write the halfword to the destination address */
+ *(vu16 *)FMI_Address = FMI_Data;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteOTPHalfWord
+* Description : Write a halfword to the needed OTP sector address.
+* Input 1 : FMI_OTPHWAddress: specifies the halfword address offset
+* where the data will be written.
+* This parameter can be one of the following values:
+* - FMI_OTP_LOW_HALFWORD_0: OTP Low halfword 0.
+* - FMI_OTP_HIGH_HALFWORD_0: OTP High halfword 0.
+* - FMI_OTP_LOW_HALFWORD_1: OTP Low halfword 1.
+* - FMI_OTP_HIGH_HALFWORD_1: OTP High halfword 1.
+* - FMI_OTP_LOW_HALFWORD_2: OTP Low halfword 2.
+* - FMI_OTP_HIGH_HALFWORD_2: OTP High halfword 2.
+* - FMI_OTP_LOW_HALFWORD_3: OTP Low halfword 3.
+* - FMI_OTP_HIGH_HALFWORD_3: OTP High halfword 3.
+* - FMI_OTP_LOW_HALFWORD_4: OTP Low halfword 4.
+* - FMI_OTP_HIGH_HALFWORD_4: OTP High halfword 4.
+* - FMI_OTP_LOW_HALFWORD_5: OTP Low halfword 5.
+* - FMI_OTP_HIGH_HALFWORD_5: OTP High halfword 5.
+* - FMI_OTP_LOW_HALFWORD_6: OTP Low halfword 6.
+* - FMI_OTP_HIGH_HALFWORD_6: OTP High halfword 6.
+* - FMI_OTP_LOW_HALFWORD_7: OTP Low halfword 7.
+* - FMI_OTP_HIGH_HALFWORD_7: OTP High halfword 7.
+* Input 2 : FMI_OTPData: The needed OTP data.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteOTPHalfWord(u8 FMI_OTPHWAddress, u16 FMI_OTPData)
+{
+ /* Write a write OTP command to the needed address */
+ *(vu16 *)(FMI_BANK_1) = 0xC0;
+
+ /* Write the halfword to the destination address */
+ *(vu16 *)(FMI_BANK_1 + FMI_OTPHWAddress) = FMI_OTPData;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ReadWord
+* Description : Read the correspondent data.
+* Input : FMI_Address: specifies the needed address.
+* Output : None
+* Return : The data contained in the specified address.
+*******************************************************************************/
+u32 FMI_ReadWord(u32 FMI_Address)
+{
+ return(*(u32*)FMI_Address);
+}
+
+/*******************************************************************************
+* Function Name : FMI_ReadOTPData
+* Description : Read data from the OTP sector.
+* Input : FMI_OTPAddress: specifies the address of the data to be read.
+* This parameter can be one of the following values:
+* - FMI_OTP_WORD_0: FMI bank 0 sector 0.
+* - FMI_OTP_WORD_1: FMI bank 0 sector 1.
+* - FMI_OTP_WORD_2: FMI bank 0 sector 2.
+* - FMI_OTP_WORD_3: FMI bank 0 sector 3.
+* - FMI_OTP_WORD_4: FMI bank 0 sector 4.
+* - FMI_OTP_WORD_5: FMI bank 0 sector 5.
+* - FMI_OTP_WORD_6: FMI bank 0 sector 6.
+* - FMI_OTP_WORD_7: FMI bank 0 sector 7.
+* Output : None
+* Return : The needed OTP words.
+*******************************************************************************/
+u32 FMI_ReadOTPData(u8 FMI_OTPAddress)
+{
+ u32 OTP_Data = 0x0;
+ /* write a read OTP sector command */
+ *(vu16 *)(FMI_BANK_1) = 0x98;
+
+ /* Read the correspondent data */
+ OTP_Data = (*(vu32*)(FMI_BANK_1 + FMI_OTPAddress));
+
+ /* Write a read array command */
+ *(vu16 *)(FMI_BANK_1) = 0xFF;
+
+ return OTP_Data;
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetFlagStatus
+* Description : Check whether the specified FMI flag is set or not.
+* Input1 : FMI_Flag: flag to check.
+* This parameter can be one of the following values:
+* - FMI_FLAG_SPS: Sector Protection Status Flag.
+* - FMI_FLAG_PSS: Program Suspend Status Flag.
+* - FMI_FLAG_PS: Program Status Flag.
+* - FMI_FLAG_ES: Erase Status Flag.
+* - FMI_FLAG_ESS: Erase Suspend Status Flag.
+* - FMI_FLAG_PECS: FPEC Status Flag.
+* Input2 : FMI_Bank: specifies the needed bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+FlagStatus FMI_GetFlagStatus(u8 FMI_Flag, vu32 FMI_Bank)
+{
+ u16 FMI_Status_Register = 0;
+
+ /* Write a read status register command */
+ *(vu16 *)FMI_Bank = 0x70;
+
+ /* Wait until operation completion */
+ while(!((*(vu16 *)FMI_Bank) & 0x80));
+
+ /* Read the status register */
+ FMI_Status_Register = *(vu16 *)FMI_Bank;
+
+ /* Write a read array command */
+ *(vu16 *)FMI_Bank = 0xFF;
+
+ if((FMI_Status_Register & FMI_Flag) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetReadWaitStateValue
+* Description : Get the current Read wait state value.
+* Input : None
+* Output : None
+* Return : The current read wait states value.
+*******************************************************************************/
+u16 FMI_GetReadWaitStateValue(void)
+{
+ u16 FMI_Configuration_Register = 0;
+ /* Write a read flash configuration register command */
+ *(vu16 *)FMI_BANK_1 = 0x90;
+
+ /* Read the flash configuration register */
+ FMI_Configuration_Register = *(vu16 *)(FMI_BANK_1 + 0x14);
+
+ /* Write a read array command */
+ *(vu16 *)FMI_BANK_1 = 0xFF;
+
+ FMI_Configuration_Register = ((FMI_Configuration_Register>>11) + 1) & 0x3;
+
+ /* Return the wait states value */
+ return FMI_Configuration_Register;
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetWriteWaitStateValue
+* Description : Get the current write wait state value.
+* Input : None
+* Output : None
+* Return : The current write wait states value.
+*******************************************************************************/
+u16 FMI_GetWriteWaitStateValue(void)
+{
+ return ((u16)((FMI->CR & 0x100) >> 8));
+}
+
+/*******************************************************************************
+* Function Name : FMI_SuspendEnable
+* Description : Suspend command enable.
+* Input : FMI_Bank: specifies the bank to be suspended.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_SuspendEnable(vu32 FMI_Bank)
+{
+ /* Write a suspend command to the bank */
+ *(vu16 *)FMI_Bank = 0xB0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ResumeEnable
+* Description : Resume the suspended command.
+* Input : FMI_Bank: specifies the suspended bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_ResumeEnable(vu32 FMI_Bank)
+{
+ /* Write a resume command to the bank */
+ *(vu16 *)FMI_Bank = 0xD0;
+}
+
+/*******************************************************************************
+* Function Name : FMI_ClearFlag
+* Description : Clear the FMI Flags on the correspondent bank.
+* Input : FMI_Bank: specifies the needed bank.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_ClearFlag(vu32 FMI_Bank)
+{
+ /* Write a clear status register command */
+ *(vu16 *)FMI_Bank = 0x50;
+}
+
+/*******************************************************************************
+* Function Name : FMI_WriteProtectionCmd
+* Description : Enable or disable the write protection for the needed sector.
+* Input1 : FMI_Sector: specifies the sector to be protected or
+* unprotected.
+* This parameter can be one of the following values:
+* - FMI_B0S0: FMI bank 0 sector 0.
+* - FMI_B0S1: FMI bank 0 sector 1.
+* - FMI_B0S2: FMI bank 0 sector 2.
+* - FMI_B0S3: FMI bank 0 sector 3.
+* - FMI_B0S4: FMI bank 0 sector 4.
+* - FMI_B0S5: FMI bank 0 sector 5.
+* - FMI_B0S6: FMI bank 0 sector 6.
+* - FMI_B0S7: FMI bank 0 sector 7.
+* - FMI_B1S0: FMI bank 1 sector 0.
+* - FMI_B1S1: FMI bank 1 sector 1.
+* - FMI_B1S2: FMI bank 1 sector 2.
+* - FMI_B1S3: FMI bank 1 sector 3.
+* Input2 : FMI_NewState: specifies the protection status.
+* This parameter can be one of the following values:
+* - ENABLE: Enable the protection.
+* - DISABLE: Disable the protection.
+* Output : None
+* Return : None
+*******************************************************************************/
+void FMI_WriteProtectionCmd(vu32 FMI_Sector, FunctionalState FMI_NewState)
+{
+ if (FMI_NewState == ENABLE)
+ {
+ *(vu16*)FMI_Sector = 0x60;
+ *(vu16*)FMI_Sector = 0x01;
+ *(vu16*)FMI_Sector = 0xFF;
+ }
+ else /* DISABLE */
+ {
+ *(vu16*)FMI_Sector = 0x60;
+ *(vu16*)FMI_Sector = 0xD0;
+ *(vu16*)FMI_Sector = 0xFF;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_GetWriteProtectionStatus
+* Description : Get the write protection status for the needed sector.
+* Input : FMI_Sector_Mask: specifies the needed sector mask.
+* This parameter can be one of the following values:
+* - FMI_B0S0_MASK: FMI bank 0 sector 0.
+* - FMI_B0S1_MASK: FMI bank 0 sector 1.
+* - FMI_B0S2_MASK: FMI bank 0 sector 2.
+* - FMI_B0S3_MASK: FMI bank 0 sector 3.
+* - FMI_B0S4_MASK: FMI bank 0 sector 4.
+* - FMI_B0S5_MASK: FMI bank 0 sector 5.
+* - FMI_B0S6_MASK: FMI bank 0 sector 6.
+* - FMI_B0S7_MASK: FMI bank 0 sector 7.
+* - FMI_B1S0_MASK: FMI bank 1 sector 0.
+* - FMI_B1S1_MASK: FMI bank 1 sector 1.
+* - FMI_B1S2_MASK: FMI bank 1 sector 2.
+* - FMI_B1S3_MASK: FMI bank 1 sector 3.
+* Output : None
+* Return : The Protection Status of the needed sector.
+* - RESET: The needed sector is not write protected.
+* - SET : The needed sector is write protected.
+*******************************************************************************/
+FlagStatus FMI_GetWriteProtectionStatus(u32 FMI_Sector_Mask)
+{
+ u16 Protection_Level_1_Register = 0;
+ /* Write a read flash protection level 1 register command */
+ *(vu16 *)FMI_BANK_1 = 0x90;
+
+ /* Read the flash protection level 1 register */
+ Protection_Level_1_Register = *(vu16 *)(FMI_BANK_1 + 0x10);
+
+ /* Write a read array command */
+ *(vu16 *)FMI_BANK_1 = 0xFF;
+
+ if (Protection_Level_1_Register &= FMI_Sector_Mask)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : FMI_WaitForLastOperation
+* Description : Wait until the last operation (Write halfword, Write OTP
+* halfword, Erase sector and Erase bank) completion.
+* Input : FMI_Bank: specifies the bank where the operation is on going.
+* This parameter can be one of the following values:
+* - FMI_BANK_0: FMI bank 0.
+* - FMI_BANK_1: FMI bank 1.
+* Output : None
+* Return : The timeout status.
+* This parameter can be one of the following values:
+* - FMI_TIME_OUT_ERROR: Timeout error occurred.
+* - FMI_NO_TIME_OUT_ERROR: No timeout error.
+*******************************************************************************/
+u8 FMI_WaitForLastOperation(vu32 FMI_Bank)
+{
+ u32 Time_Out = 0;
+
+ /* Write a read status register command */
+ *(vu16 *)(FMI_Bank) = 0x70;
+
+ /* Wait until operation compeletion */
+ while((!((*(vu16 *)FMI_Bank) & 0x80))&&(Time_Out < TIMEOUT ))
+ {
+ Time_Out ++; /* Time Out */
+ }
+
+ /* Write a read array command */
+ *(vu16 *)FMI_Bank = 0xFF;
+
+ if (Time_Out == TIMEOUT)
+ {
+ return FMI_TIME_OUT_ERROR;
+ }
+ else
+ {
+ return FMI_NO_TIME_OUT_ERROR;
+ }
+}
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_gpio.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_gpio.c new file mode 100644 index 0000000..f2d0941 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_gpio.c @@ -0,0 +1,407 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_gpio.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the GPIO software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_gpio.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+ static u8 GPIO_GetGPIONumber(GPIO_TypeDef* GPIOx);
+
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : GPIO_DeInit
+* Description : Deinitializes the GPIOx peripheral registers to their default
+* reset values.
+* Input : GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_DeInit(GPIO_TypeDef* GPIOx)
+{
+
+ /* Reset the GPIO registers values */
+ if(GPIOx == GPIO0)
+ {
+ SCU_APBPeriphReset(__GPIO0,ENABLE);
+ SCU_APBPeriphReset(__GPIO0,DISABLE);
+ SCU->GPIOTYPE[0x00] = 0x0000 ;
+ SCU->GPIOOUT[0x00] = 0x0000;
+ SCU->GPIOIN[0x00] = 0x0000;
+ }
+
+ if(GPIOx == GPIO1)
+ {
+ SCU_APBPeriphReset(__GPIO1,ENABLE);
+ SCU_APBPeriphReset(__GPIO1,DISABLE);
+ SCU->GPIOTYPE[0x01] = 0x0000 ;
+ SCU->GPIOOUT[0x01] = 0x0000;
+ SCU->GPIOIN[0x01] = 0x0000;
+ }
+
+ if(GPIOx == GPIO2)
+ {
+ SCU_APBPeriphReset(__GPIO2,ENABLE);
+ SCU_APBPeriphReset(__GPIO2,DISABLE);
+ SCU->GPIOTYPE[0x02] = 0x0000 ;
+ SCU->GPIOOUT[0x02] = 0x0000;
+ SCU->GPIOIN[0x02] = 0x0000;
+ }
+
+ if(GPIOx == GPIO3)
+ {
+ SCU_APBPeriphReset(__GPIO3,ENABLE);
+ SCU_APBPeriphReset(__GPIO3,DISABLE);
+ SCU->GPIOTYPE[0x03] = 0x0000 ;
+ SCU->GPIOOUT[0x03] = 0x0000;
+ SCU->GPIOIN[0x03] = 0x0000;
+ }
+
+ if(GPIOx == GPIO4)
+ {
+ SCU_APBPeriphReset(__GPIO4,ENABLE);
+ SCU_APBPeriphReset(__GPIO4,DISABLE);
+ SCU->GPIOTYPE[0x04] = 0x0000 ;
+ SCU->GPIOOUT[0x04] = 0x0000;
+ SCU->GPIOIN[0x04] = 0x0000;
+ SCU->GPIOANA = 0x00;
+ }
+
+ if(GPIOx == GPIO5)
+ {
+ SCU_APBPeriphReset(__GPIO5,ENABLE);
+ SCU_APBPeriphReset(__GPIO5,DISABLE);
+ SCU->GPIOTYPE[0x05] = 0x0000 ;
+ SCU->GPIOOUT[0x05] = 0x0000;
+ SCU->GPIOIN[0x05] = 0x0000;
+ }
+
+ if(GPIOx == GPIO6)
+ {
+ SCU_APBPeriphReset(__GPIO6,ENABLE);
+ SCU_APBPeriphReset(__GPIO6,DISABLE);
+ SCU->GPIOTYPE[0x06] = 0x0000 ;
+ SCU->GPIOOUT[0x06] = 0x0000;
+ SCU->GPIOIN[0x06] = 0x0000;
+ }
+
+ if(GPIOx == GPIO7)
+ {
+ SCU_APBPeriphReset(__GPIO7,ENABLE);
+ SCU_APBPeriphReset(__GPIO7,DISABLE);
+ SCU->GPIOOUT[0x07] = 0xAAAA;
+ SCU->GPIOOUT[0x07] = 0x0000;
+ SCU->GPIOIN[0x07] = 0x0000;
+ }
+
+ if(GPIOx == GPIO8)
+ {
+ SCU_APBPeriphReset(__GPIO8,ENABLE);
+ SCU_APBPeriphReset(__GPIO8,DISABLE);
+ SCU->GPIOEMI = 0x00;
+ }
+
+ if(GPIOx == GPIO9)
+ {
+ SCU_APBPeriphReset(__GPIO9,ENABLE);
+ SCU_APBPeriphReset(__GPIO9,DISABLE);
+ SCU->GPIOEMI = 0x00;
+ }
+}
+/*******************************************************************************
+* Function Name : GPIO_Init
+* Description : Initializes the GPIOx peripheral according to the specified
+* parameters in the GPIO_InitStruct .
+* Input :- GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
+* contains the configuration information for the specified GPIO
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
+{
+ /* Select pin direction */
+ u8 PinNumber = 0;
+ u8 Counter = 0;
+ u8 GPIO_Number = 0;
+
+ GPIO_Number = GPIO_GetGPIONumber(GPIOx);
+
+
+ if(GPIO_InitStruct->GPIO_Direction == GPIO_PinOutput)
+ {
+ GPIOx->DDR |= GPIO_InitStruct->GPIO_Pin;
+ }
+ else
+ {
+ GPIOx->DDR &= ~GPIO_InitStruct->GPIO_Pin;
+ }
+
+ for (Counter = 0; Counter < 8;Counter++)
+ {
+ /*Search pin number*/
+ PinNumber = (GPIO_InitStruct->GPIO_Pin & (1 <<Counter));
+ if((PinNumber >> Counter) == 1)
+ {
+ /*Output ALternate 0*/
+ SCU->GPIOOUT[GPIO_Number] &= ~(0x3 <<(Counter *2));
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt1)
+ {
+ /*Output ALternate 1*/
+ SCU->GPIOOUT[GPIO_Number] |= 1 << (Counter *2);
+ }
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt2)
+ {
+ /*Output ALternate 2*/
+ SCU->GPIOOUT[GPIO_Number] |= 0x2 << (Counter *2);
+ }
+ if(GPIO_InitStruct->GPIO_Alternate == GPIO_OutputAlt3)
+ {
+ /*Output ALternate 3*/
+ SCU->GPIOOUT[GPIO_Number] |= 0x3 << (Counter *2);
+ }
+
+ /*Type configuration: PushPull or Open Collector*/
+ SCU->GPIOTYPE[GPIO_Number] &= ~(0x1 << Counter) ;
+ if(GPIO_InitStruct->GPIO_Type == GPIO_Type_OpenCollector)
+ {
+ /*Open Drain configuration*/
+ SCU->GPIOTYPE[GPIO_Number] |= 0x1 << Counter;
+ }
+
+ /*IP Connected disable*/
+ SCU->GPIOIN[GPIO_Number] &= ~(0x1 << Counter) ;
+ if(GPIO_InitStruct->GPIO_IPConnected == GPIO_IPConnected_Enable)
+ {
+ /*IP Connected enable*/
+ SCU->GPIOIN[GPIO_Number] |= 0x1 << Counter;
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_StructInit
+* Description : Initialize the GPIO Init Structure parameters
+* Input : GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
+{
+ /* Reset GPIO init structure parameters values */
+ GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
+ GPIO_InitStruct->GPIO_Direction = GPIO_PinInput;
+ GPIO_InitStruct->GPIO_Type = GPIO_Type_PushPull;
+ GPIO_InitStruct->GPIO_IPConnected = GPIO_IPConnected_Disable;
+ GPIO_InitStruct->GPIO_Alternate = GPIO_InputAlt1;
+}
+
+/*******************************************************************************
+* Function Name : GPIO_ReadBit
+* Description : Reads the specified port pin
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* : - GPIO_Pin: the Pin number. This parameter can be GPIO_Pin_x
+* where x can be (0..7).
+* Output : None
+* Return : The port pin value
+*******************************************************************************/
+u8 GPIO_ReadBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin)
+{
+ if ((((GPIOx->DR[GPIO_Pin<<2])) & GPIO_Pin) != Bit_RESET )
+ {
+ return Bit_SET;
+ }
+ else
+ {
+ return Bit_RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_Read
+* Description : Reads the specified GPIO data port
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : GPIO data port word value.
+*******************************************************************************/
+u8 GPIO_Read(GPIO_TypeDef* GPIOx)
+{
+ return (GPIOx->DR[0x3FC]);
+}
+
+/*******************************************************************************
+* Function Name : GPIO_WriteBit
+* Description : Sets or clears the selected data port bit.
+* Input : - GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - GPIO_Pin: the Pin number. This parameter can be GPIO_Pin_x
+* where x can be (0..7).
+* - BitVal: this parameter specifies the value to be written
+* to the selected bit.
+* BitVal must be one of the BitAction enum values:
+* - Bit_RESET: to clear the port pin
+* - Bit_SET: to set the port pin
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_WriteBit(GPIO_TypeDef* GPIOx, u8 GPIO_Pin, BitAction BitVal)
+{
+ if(BitVal == Bit_SET)
+ {
+ GPIOx->DR[GPIO_Pin <<2] = GPIO_Pin;
+ }
+ else
+ {
+ GPIOx->DR[GPIO_Pin <<2] = 0x00;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_Write
+* Description : Writes the passed value in the selected data GPIOx port
+* register.
+* Input :- GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* - PortVal: the value to be written to the data port register.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_Write(GPIO_TypeDef* GPIOx, u8 PortVal)
+{
+ GPIOx->DR[0x3FC] = PortVal;
+}
+
+/*******************************************************************************
+* Function Name : GPIO_EMIConfig
+* Description : Enables or disables GPIO 8 and 9 in EMI mode.
+* Input : - NewState: new state of the EMI.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_EMIConfig(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ SCU->GPIOEMI = 0x01;
+ }
+ else
+ {
+ SCU->GPIOEMI = 0x00;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_ANAPinConfig
+* Description : Enables or disables pins from GPIO 4 in Analogue mode.
+* Input :- GPIO_ANAChannel: selects the ADC channel pin.
+* This parameter can be one of the following values:
+* GPIO_ANAChannel0
+* GPIO_ANAChannel1
+* GPIO_ANAChannel2
+* GPIO_ANAChannel3
+* GPIO_ANAChannel4
+* GPIO_ANAChannel5
+* GPIO_ANAChannel6
+* GPIO_ANAChannel7
+* GPIO_ANAChannelALL
+* - NewState: new state of the port pin.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void GPIO_ANAPinConfig(u8 GPIO_ANAChannel, FunctionalState NewState)
+{
+
+ if(NewState == ENABLE)
+ {
+ if(GPIO_ANAChannel == GPIO_ANAChannelALL)
+ {
+ SCU->GPIOOUT[4] = 0x0000;
+ SCU->GPIOIN[4] = 0x00;
+ }
+ else
+ {
+ SCU->GPIOOUT[4] &= ~(0x3<<(GPIO_ANAChannel-1));
+ SCU->GPIOIN[4] &= ~GPIO_ANAChannel;
+ }
+ SCU->GPIOANA |= GPIO_ANAChannel;
+
+ }
+ else
+ {
+ SCU->GPIOANA &= ~GPIO_ANAChannel;
+ }
+}
+
+/*******************************************************************************
+* Function Name : GPIO_GetGPIONumber
+* Description : searche the GPIO number.
+* Input : GPIOx: where x can be (0..9) to select the GPIO peripheral.
+* Output : None
+* Return : GPIO number
+*******************************************************************************/
+u8 GPIO_GetGPIONumber(GPIO_TypeDef* GPIOx)
+{
+
+ if(GPIOx == GPIO1)
+ {
+ return 1;
+ }
+ if(GPIOx == GPIO2)
+ {
+ return 2;
+ }
+ if(GPIOx == GPIO3)
+ {
+ return 3;
+ }
+ if(GPIOx == GPIO4)
+ {
+ return 4;
+ }
+ if(GPIOx == GPIO5)
+ {
+ return 5;
+ }
+ if(GPIOx == GPIO6)
+ {
+ return 6;
+ }
+ if(GPIOx == GPIO7)
+ {
+ return 7;
+ }
+ if(GPIOx == GPIO8)
+ {
+ return 8;
+ }
+ if(GPIOx == GPIO9)
+ {
+ return 9;
+ }
+ return 0;
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_i2c.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_i2c.c new file mode 100644 index 0000000..9f15adb --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_i2c.c @@ -0,0 +1,616 @@ +/******************** (C) COPYRIGHT 2005 STMicroelectronics ********************
+* File Name : 91x_i2c.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the I2C software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_i2c.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* I2C IT enable */
+#define I2C_IT_Enable 0x01
+#define I2C_IT_Disable 0xFE
+
+/* I2C Peripheral Enable/Disable */
+#define I2C_PE_Set 0x20
+#define I2C_PE_Reset 0xDF
+
+/* Address direction bit */
+#define I2C_ADD0_Set 0x01
+#define I2C_ADD0_Reset 0xFE
+
+/* I2C START Enable/Disable */
+#define I2C_Start_Enable 0x08
+#define I2C_Start_Disable 0xF7
+
+/* I2C STOP Enable/Disable */
+#define I2C_Stop_Enable 0x02
+#define I2C_Stop_Disable 0xFD
+
+/* I2C Masks */
+#define I2C_Frequency_Mask 0x1F
+#define I2C_AddressHigh_Mask 0xF9
+#define I2C_OwnAddress_Mask 0x0300
+#define I2C_StandardMode_Mask 0x7f
+#define I2C_FastMode_Mask 0x80
+#define I2C_Event_Mask 0x3FFF
+#define I2C_HeaderSet_Mask 0xF1
+#define I2C_HeaderReset_Mask 0xFE
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/*******************************************************************************
+* Function Name : I2C_DeInit
+* Description : Deinitializes the I2C peripheral registers to their default
+* reset values.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C_DeInit(I2C_TypeDef* I2Cx)
+{
+ if (I2Cx == I2C0)
+ {
+ /* Reset the I2C0 registers values */
+ SCU_APBPeriphReset(__I2C0, ENABLE);
+ SCU_APBPeriphReset(__I2C0, DISABLE);
+ }
+ if (I2Cx == I2C1)
+ {
+ /* Reset the I2C1 registers values */
+ SCU_APBPeriphReset(__I2C1, ENABLE);
+ SCU_APBPeriphReset(__I2C1, DISABLE);
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_Init
+* Description : Initializes the I2C peripheral according to the specified
+* parameters in the I2C_InitTypeDef structure.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+*
+* - I2C_InitStruct: pointer to an I2C_InitTypeDef structure that
+* contains the configuration information for the specified I2C
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
+{
+ u16 wResult = 0x0F;
+ u32 dPCLK = 25000000;
+
+ /* Get PCLK frequency value */
+ dPCLK = SCU_GetPCLKFreqValue()*1000;
+ /* Disable I2C peripheral to set FR[2:0] bits */
+ I2C_Cmd (I2Cx, DISABLE);
+ /* Clear frequency FR[2:0] bits */
+ I2Cx->OAR2 &= I2C_Frequency_Mask;
+ /* Set frequency bits depending on PCLK value */
+ if ((dPCLK <1667000) & (dPCLK > 10000000))
+ I2Cx->OAR2 |= 0x20;
+ else if (dPCLK < 26670000)
+ I2Cx->OAR2 |= 0x40;
+ else if (dPCLK < 40000000)
+ I2Cx->OAR2 |= 0x60;
+ else if (dPCLK < 53330000)
+ I2Cx->OAR2 |= 0x80;
+ else if (dPCLK < 66000000)
+ I2Cx->OAR2 |= 0xA0;
+ else if (dPCLK < 80000000)
+ I2Cx->OAR2 |= 0xC0;
+ else if (dPCLK < 100000000)
+ I2Cx->OAR2 |= 0xE0;
+ I2C_Cmd (I2Cx, ENABLE);
+
+ /* Configure general call */
+ if (I2C_InitStruct->I2C_GeneralCall == I2C_GeneralCall_Enable)
+ {
+ /* Enable general call */
+ I2Cx->CR |= I2C_GeneralCall_Enable;
+ }
+ else
+ {
+ /* Disable general call */
+ I2Cx->CR &= I2C_GeneralCall_Disable;
+ }
+ /* Configure acknowledgement */
+ if (I2C_InitStruct->I2C_Ack == I2C_Ack_Enable)
+ {
+ /* Enable acknowledgement */
+ I2Cx->CR |= I2C_Ack_Enable;
+ }
+ else
+ {
+ /* Disable acknowledgement */
+ I2Cx->CR &= I2C_Ack_Disable;
+ }
+
+ /* Configure LSB own address */
+ I2Cx->OAR1 = I2C_InitStruct->I2C_OwnAddress;
+ /* Clear MSB own address ADD[9:8] bits */
+ I2Cx->OAR2 &= I2C_AddressHigh_Mask;
+ /* Set MSB own address value */
+ I2Cx->OAR2 |= (I2C_InitStruct->I2C_OwnAddress & I2C_OwnAddress_Mask)>>7;
+
+ /* Configure speed in standard mode */
+ if (I2C_InitStruct->I2C_CLKSpeed <= 100000)
+ {
+ /* Standard mode speed calculate */
+ wResult = ((dPCLK/I2C_InitStruct->I2C_CLKSpeed)-7)/2;
+ /* Set speed value and clear FM/SM bit for standard mode in LSB clock divider */
+ I2Cx->CCR = wResult & I2C_StandardMode_Mask;
+ }
+ /* Configure speed in fast mode */
+ else if (I2C_InitStruct->I2C_CLKSpeed <= 400000)
+ {
+ /* Fast mode speed calculate */
+ wResult = ((dPCLK/I2C_InitStruct->I2C_CLKSpeed)-9)/3;
+ /* Set speed value and set FM/SM bit for fast mode in LSB clock divider */
+ I2Cx->CCR = wResult | I2C_FastMode_Mask;
+ }
+ /* Set speed in MSB clock divider */
+ I2Cx->ECCR = wResult >>7;
+}
+
+/*******************************************************************************
+* Function Name : I2C_StructInit
+* Description : Initialize the I2C Init Structure parameters
+* Input : - I2C_InitStruct: pointer to an I2C_InitTypeDef structure
+ which will be initialized.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
+{
+ /* Initialize the I2C_CLKSpeed member */
+ I2C_InitStruct->I2C_CLKSpeed = 5000;
+
+ /* Initialize the I2C_OwnAddress member */
+ I2C_InitStruct->I2C_OwnAddress = 0x0;
+
+ /* Initialize the I2C_GeneralCall member */
+ I2C_InitStruct->I2C_GeneralCall = I2C_GeneralCall_Disable;
+
+ /* Initialize the I2C_Ack member */
+ I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
+}
+
+/*******************************************************************************
+* Function Name : I2C_Cmd
+* Description : Enables or disables the specified I2C peripheral.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - NewState: new state of the I2C peripheral. This parameter
+* can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Enable the I2C peripheral by setting twice the PE bit on the CR register */
+ I2Cx->CR |= I2C_PE_Set;
+ I2Cx->CR |= I2C_PE_Set;
+ }
+ else
+ {
+ /* Disable the I2C peripheral */
+ I2Cx->CR &= I2C_PE_Reset;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_GenerateSTART
+* Description : Generates I2C communication START condition.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+*
+* - NewState: new state of the Start condition. This parameter
+* can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_GenerateStart(I2C_TypeDef* I2Cx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Generate a START condition */
+ I2Cx->CR |= I2C_Start_Enable;
+ }
+ else
+ {
+ /* Disable the START condition generation */
+ I2Cx->CR &= I2C_Start_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_GenerateSTOP
+* Description : Generates I2C communication STOP condition.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+*
+* - NewState: new state of the Stop condition. This parameter
+* can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Generate a SIOP condition */
+ I2Cx->CR |= I2C_Stop_Enable;
+ }
+ else
+ {
+ /* Disable the STOP condition generation */
+ I2Cx->CR &= I2C_Stop_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_AcknowledgeConfig
+* Description : Enables or disables I2C acknowledge feature.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - NewState: new state of the Acknowledgement. This parameter
+* can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_AcknowledgeConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Enable the acknowledgement */
+ I2Cx->CR |= I2C_Ack_Enable;
+ }
+ else
+ {
+ /* Disable the acknowledgement */
+ I2Cx->CR &= I2C_Ack_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_ITConfig
+* Description : Enables or disables I2C interrupt feature.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - NewState: new state of the specified I2C interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_ITConfig(I2C_TypeDef *I2Cx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Enable the I2C interrupt */
+ I2Cx->CR |= I2C_IT_Enable;
+ }
+ else
+ {
+ /* Disable the I2C interrupt */
+ I2Cx->CR &= I2C_IT_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_ReadRegister
+* Description : Reads any I2C register and returns its value.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - I2C_Register: the I2C register to be read. This parameter
+* can be one of the following values:
+* - I2C_CR: CR register.
+* - I2C_SR1: SR1 register.
+* - I2C_SR2: SR2 register.
+* - I2C_CCR: CCR register.
+* - I2C_OAR1: OAR1 register.
+* - I2C_OAR2: OAR2 register.
+* - I2C_DR: DR register.
+* - I2C_ECCR: ECCR register.
+* Output : None
+* Return : The value of the register passed as parameter
+*******************************************************************************/
+u8 I2C_ReadRegister(I2C_TypeDef* I2Cx, u8 I2C_Register)
+{
+ /* Return the selected register value */
+ if (I2Cx == I2C0)
+ {
+ return (*(u8 *)(I2C0_BASE + I2C_Register));
+ }
+ if (I2Cx == I2C1)
+ {
+ return (*(u8 *)(I2C1_BASE + I2C_Register));
+ }
+ return 0;
+}
+
+/*******************************************************************************
+* Function Name : I2C_GetFlagStatus
+* Description : Checks whether the specified I2C flag is set or not.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - I2C_FLAG: flag to check. This parameter can be one of the
+* following values:
+* - I2C_FLAG_SB: Start bit flag
+* - I2C_FLAG_M_SL: Master/Slave flag
+* - I2C_FLAG_ADSL: Adress matched flag
+* - I2C_FLAG_BTF: Byte transfer finished flag
+* - I2C_FLAG_BUSY: Bus busy flag
+* - I2C_FLAG_TRA: Transmitter/Receiver flag
+* - I2C_FLAG_ADD10: 10-bit addressing in Master mode flag
+* - I2C_FLAG_EVF: Event flag
+* - I2C_FLAG_GCAL: General call flag
+* - I2C_FLAG_BERR: Bus error flag
+* - I2C_FLAG_ARLO: Arbitration lost flag
+* - I2C_FLAG_STOPF: Stop detection flag
+* - I2C_FLAG_AF: Acknowledge failure flag
+* - I2C_FLAG_ENDAD: End of address transmission flag
+* - I2C_FLAG_ACK: Acknowledge enable flag
+* Output : None
+* Return : The NewState of the I2C_Flag (SET or RESET).
+*******************************************************************************/
+FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, u16 I2C_FLAG)
+{
+ u16 wFlag1=0, wFlag2=0, wTmp=0;
+
+ wFlag1 = I2Cx->SR2;
+ wFlag1 = wFlag1<<8;
+ wFlag2 = I2Cx->CR & 0x04;
+
+ /* Get all the I2C flags in a unique register*/
+ wTmp = (((I2Cx->SR1 | (wFlag1)) & I2C_Event_Mask) | (wFlag2<<12));
+
+ /* Check the status of the specified I2C flag */
+ if((wTmp & I2C_FLAG) != RESET)
+ {
+ /* Return SET if I2C_FLAG is set */
+ return SET;
+ }
+ else
+ {
+ /* Return RESET if I2C_FLAG is reset */
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_ClearFlag
+* Description : Clears the I2C Flag passed as a parameter
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - I2C_FLAG: flag to check. This parameter can be one of the
+* following values:
+* - I2C_FLAG_SB: Start bit flag
+* - I2C_FLAG_M_SL: Master/Slave flag
+* - I2C_FLAG_ADSL: Adress matched flag
+* - I2C_FLAG_BTF: Byte transfer finished flag
+* - I2C_FLAG_BUSY: Bus busy flag
+* - I2C_FLAG_TRA: Transmitter/Receiver flag
+* - I2C_FLAG_ADD10: 10-bit addressing in Master mode flag
+* - I2C_FLAG_EVF: Event flag
+* - I2C_FLAG_GCAL: General call flag
+* - I2C_FLAG_BERR: Bus error flag
+* - I2C_FLAG_ARLO: Arbitration lost flag
+* - I2C_FLAG_STOPF: Stop detection flag
+* - I2C_FLAG_AF: Acknowledge failure flag
+* - I2C_FLAG_ENDAD: End of address transmission flag
+* - I2C_FLAG_ACK: Acknowledge enable flag
+* - parameter needed in the case that the flag to be cleared
+* need a write in one register
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_ClearFlag(I2C_TypeDef* I2Cx, u16 I2C_FLAG, ...)
+{
+ u8 bTmp = (u8)*((u32 *) & I2C_FLAG + sizeof(I2C_FLAG));
+
+ /* flags that need a read of the SR2 register to be cleared */
+ if ((I2C_FLAG==I2C_FLAG_ADD10) || (I2C_FLAG==I2C_FLAG_EVF) || (I2C_FLAG==I2C_FLAG_BERR) || (I2C_FLAG==I2C_FLAG_ARLO) |
+ (I2C_FLAG==I2C_FLAG_STOPF) ||(I2C_FLAG==I2C_FLAG_AF) || (I2C_FLAG==I2C_FLAG_ENDAD))
+ {
+ /* Read the SR2 register */
+ I2Cx->SR2;
+
+ /* Two flags need a second step to be cleared */
+ switch (I2C_FLAG)
+ {
+ case I2C_FLAG_ADD10:
+ /* Send the MSB 10bit address passed as second parameter */
+ I2Cx->DR = bTmp;
+ break;
+ case I2C_FLAG_ENDAD:
+ /* Write to the I2C_CR register by setting PE bit */
+ I2Cx->CR |= I2C_PE_Set;
+ break;
+ }
+ }
+
+ /* flags that need a read of the SR1 register to be cleared */
+ else if (I2C_FLAG==I2C_FLAG_SB || I2C_FLAG==I2C_FLAG_ADSL || I2C_FLAG==I2C_FLAG_BTF || I2C_FLAG==I2C_FLAG_TRA)
+ {
+ /* Read the SR1 register */
+ (void)I2Cx->SR1;
+
+ /* three flags need a second step to be cleared */
+ if (I2C_FLAG == I2C_FLAG_SB)
+ {
+ /* Send the address byte passed as second parameter */
+ I2Cx->DR = bTmp;
+ }
+ else if (I2C_FLAG==I2C_FLAG_BTF || I2C_FLAG==I2C_FLAG_TRA)
+ {
+ /* return the received byte in the variable passed as second parameter */
+ bTmp=I2Cx->DR;
+ }
+ }
+
+ /* flags that need to disable the I2C interface */
+ else if ( I2C_FLAG==I2C_FLAG_M_SL || I2C_FLAG==I2C_FLAG_GCAL)
+ {
+ I2C_Cmd(I2Cx, DISABLE);
+ I2C_Cmd(I2Cx, ENABLE);
+ }
+}
+
+/*******************************************************************************
+* Function Name : I2C_Send7bitAddress
+* Description : Transmits the address byte to select the slave device.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - Address: specifies the slave address which will be transmitted
+* - Direction: specifies whether the I2C device will be a
+* Transmitter or a Receiver. This parameter can be one of the
+* following values
+* - I2C_MODE_TRANSMITTER: Transmitter mode
+* - I2C_MODE_RECEIVER: Receiver mode
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_Send7bitAddress(I2C_TypeDef* I2Cx, u8 Address, u8 Direction)
+{
+ /* Test on the direction to define the read/write bit */
+ if (Direction == I2C_MODE_RECEIVER)
+ {
+ /* Set the address bit0 for read */
+ Address |= I2C_ADD0_Set;
+ }
+ else
+ {
+ /* Reset the address bit0 for write */
+ Address &= I2C_ADD0_Reset;
+ }
+ /* Send the address */
+ I2Cx->DR = Address;
+}
+
+/*******************************************************************************
+* Function Name : I2C_SendData
+* Description : Send a data byte.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - bData : the byte to be sent
+* Output : None
+* Return : None.
+*******************************************************************************/
+void I2C_SendData(I2C_TypeDef* I2Cx, u8 bData)
+{
+ /* Write in the DR register the byte to be sent */
+ I2Cx->DR = bData;
+}
+
+/*******************************************************************************
+* Function Name : I2C_ReceiveData
+* Description : Read the received byte.
+* Input : - I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* Output : None
+* Return : The received byte
+*******************************************************************************/
+u8 I2C_ReceiveData(I2C_TypeDef* I2Cx)
+{
+ /* Return from the DR register the received byte */
+ return I2Cx->DR;
+}
+
+/*******************************************************************************
+* Function Name : I2C_GetLastEvent
+* Description : Get the Last happened I2C Event.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* Output : None
+* Return : The Last happened Event.
+*******************************************************************************/
+u16 I2C_GetLastEvent(I2C_TypeDef* I2Cx)
+{
+ u16 wFlag1=0, wLastEvent=0;
+ wFlag1 = I2Cx->SR2;
+ wFlag1 = wFlag1<<8;
+ /* Get the last event value from I2C status register */
+ wLastEvent = (((I2Cx->SR1 | (wFlag1)) & I2C_Event_Mask));
+ /* Return the last event */
+ return wLastEvent;
+}
+
+/*******************************************************************************
+* Function Name : I2C_CheckEvent
+* Description : Checks whether the Last I2C Event is equal to the one passed
+* as parameter.
+* Input :- I2Cx: I2C peripheral can be:
+* - I2C0
+* - I2C1
+* - I2C_EVENT: the event to check. This parameter can be one of
+* the following values:
+* - I2C_EVENT_SLAVE_ADDRESS_MATCHED
+* - I2C_EVENT_SLAVE_BYTE_RECEIVED
+* - I2C_EVENT_SLAVE_BYTE_TRANSMITTED
+* - I2C_EVENT_MASTER_MODE_SELECT
+* - I2C_EVENT_MASTER_MODE_SELECTED
+* - I2C_EVENT_MASTER_BYTE_RECEIVED
+* - I2C_EVENT_MASTER_BYTE_TRANSMITTED
+* - I2C_EVENT_MASTER_MODE_ADDRESS10
+* - I2C_EVENT_SLAVE_STOP_DETECTED
+* - I2C_EVENT_SLAVE_ACK_FAILURE
+* Output : None
+* Return : An ErrorStatus enumuration value:
+* - SUCCESS: Last event is equal to the I2C_Event
+* - ERROR: Last event is different from the I2C_Event
+*******************************************************************************/
+ErrorStatus I2C_CheckEvent(I2C_TypeDef* I2Cx,u16 I2C_EVENT)
+{
+ u16 wLastEvent = I2C_GetLastEvent(I2Cx);
+
+ /* Check whther the last event is equal to I2C_EVENT */
+ if (wLastEvent == I2C_EVENT)
+ {
+ /* Return SUCCESS when last event is equal to I2C_EVENT */
+ return SUCCESS;
+ }
+ else
+ {
+ /* Return ERROR when last event is different from I2C_EVENT */
+ return ERROR;
+ }
+}
+
+/******************* (C) COPYRIGHT 2005 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_lib.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_lib.c new file mode 100644 index 0000000..3fab413 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_lib.c @@ -0,0 +1,281 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_lib.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all peripherals pointers
+ : initialization.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+#define EXT
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_map.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+#ifdef LIBDEBUG
+
+/*******************************************************************************
+* Function Name : debug
+* Description : this function initialize peripherals pointers
+* Input : no one
+* Output : no one
+* Return : no one
+*******************************************************************************/
+void libdebug(void)
+{
+
+
+/************************* DMA *************************/
+
+#ifdef _DMA
+ DMA = (DMA_TypeDef *)DMA_BASE;
+#endif /* _DMA */
+
+/************************* DMA *************************/
+
+
+#ifdef _DMA_Channel0
+ DMA_Channel0= (DMA_Channel_TypeDef *)DMA_Channel0_BASE;
+#endif /* _DMA_Channel0 */
+
+#ifdef _DMA_Channel1
+ DMA_Channel1= (DMA_Channel_TypeDef *)DMA_Channel1_BASE;
+#endif /* _DMA_Channel1 */
+
+#ifdef _DMA_Channel2
+ DMA_Channel2 = (DMA_Channel_TypeDef *)DMA_Channel2_BASE;
+#endif /* _DMA_Channel2 */
+
+#ifdef _DMA_Channel3
+ DMA_Channel3 = (DMA_Channel_TypeDef *)DMA_Channel3_BASE;
+#endif /* _DMA_Channel3 */
+
+#ifdef _DMA_Channel4
+ DMA_Channel4 = (DMA_Channel_TypeDef *)DMA_Channel4_BASE;
+#endif /* _DMA_Channel4 */
+
+#ifdef _DMA_Channel5
+ DMA_Channel5= (DMA_Channel_TypeDef *)DMA_Channel5_BASE;
+#endif /* _DMA_Channel5*/
+
+
+#ifdef _DMA_Channel6
+ DMA_Channel6 = (DMA_Channel_TypeDef *)DMA_Channel6_BASE;
+#endif /* _DMA_Channel6 */
+
+#ifdef _DMA_Channel7
+ DMA_Channel7 = (DMA_Channel_TypeDef *)DMA_Channel7_BASE;
+#endif /* _DMA_Channel7 */
+
+
+
+ /************************* EMI *************************/
+
+#ifdef _EMI_Bank0
+ EMI_Bank0= (EMI_Bank_TypeDef *)EMI_Bank0_BASE;
+#endif /* _EMI_Bank0 */
+
+#ifdef _EMI_Bank1
+ EMI_Bank1= (EMI_Bank_TypeDef *)EMI_Bank1_BASE;
+#endif /* _EMI_Bank1 */
+
+#ifdef _EMI_Bank2
+ EMI_Bank2 = (EMI_Bank_TypeDef *)EMI_Bank2_BASE;
+#endif /* _EMI_Bank2 */
+
+#ifdef _EMI_Bank3
+ EMI_Bank3 = (EMI_Bank_TypeDef *)EMI_Bank3_BASE;
+ #endif /* _EMI_Bank3 */
+
+
+
+/************************* AHBAPB *************************/
+
+#ifdef _AHBAPB0
+ AHBAPB0 = (AHBAPB_TypeDef *)AHBAPB0_BASE;
+#endif /* _AHBAPB0 */
+
+#ifdef _AHBAPB1
+ AHBAPB1 = (AHBAPB_TypeDef *)AHBAPB1_BASE;
+#endif /*_AHBAPB1 */
+
+
+
+/************************* FMI *************************/
+
+#ifdef _FMI
+ FMI = (FMI_TypeDef *)FMI_BASE;
+#endif /* _FMI */
+
+/************************* VIC *************************/
+
+#ifdef _VIC0
+ VIC0 = (VIC_TypeDef *)VIC0_BASE;
+#endif /* _VIC0 */
+
+#ifdef _VIC1
+ VIC1 = (VIC_TypeDef *)VIC1_BASE;
+#endif /* _VIC1 */
+
+/************************* WIU *************************/
+
+#ifdef _WIU
+ WIU = (WIU_TypeDef *)WIU_BASE;
+#endif /* _WIU */
+
+/************************* TIM *************************/
+
+#ifdef _TIM0
+ TIM0 = (TIM_TypeDef *)TIM0_BASE;
+#endif /* _TIM0 */
+
+#ifdef _TIM1
+ TIM1 = (TIM_TypeDef *)TIM1_BASE;
+#endif /* _TIM1 */
+
+#ifdef _TIM2
+ TIM2 = (TIM_TypeDef *)TIM2_BASE;
+#endif /* _TIM2 */
+
+#ifdef _TIM3
+ TIM3 = (TIM_TypeDef *)TIM3_BASE;
+#endif /* _TIM3 */
+
+/************************* GPIO ************************/
+
+#ifdef _GPIO0
+ GPIO0 = (GPIO_TypeDef *)GPIO0_BASE;
+#endif /* _GPIO0 */
+
+#ifdef _GPIO1
+ GPIO1 = (GPIO_TypeDef *)GPIO1_BASE;
+#endif /* _GPIO1 */
+
+#ifdef _GPIO2
+ GPIO2 = (GPIO_TypeDef *)GPIO2_BASE;
+#endif /* _GPIO2 */
+
+#ifdef _GPIO3
+ GPIO3 = (GPIO_TypeDef *)GPIO3_BASE;
+#endif /* _GPIO3 */
+
+#ifdef _GPIO4
+ GPIO4 = (GPIO_TypeDef *)GPIO4_BASE;
+#endif /* _GPIO4 */
+
+#ifdef _GPIO5
+ GPIO5 = (GPIO_TypeDef *)GPIO5_BASE;
+#endif /* _GPIO5 */
+
+#ifdef _GPIO6
+ GPIO6 = (GPIO_TypeDef *)GPIO6_BASE;
+#endif /* _GPIO6 */
+
+#ifdef _GPIO7
+ GPIO7 = (GPIO_TypeDef *)GPIO7_BASE;
+#endif /* _GPIO7 */
+
+#ifdef _GPIO8
+ GPIO8 = (GPIO_TypeDef *)GPIO8_BASE;
+#endif /* _GPIO8 */
+
+#ifdef _GPIO9
+ GPIO9 = (GPIO_TypeDef *)GPIO9_BASE;
+#endif /* _GPIO9 */
+
+/************************* RTC *************************/
+
+#ifdef _RTC
+ RTC = (RTC_TypeDef *)RTC_BASE;
+#endif /* _RTC */
+
+/************************* PRCCU ***********************/
+
+#ifdef _SCU
+ SCU = (SCU_TypeDef *)SCU_BASE;
+#endif /* _PRCCU */
+
+/************************** MC *************************/
+
+#ifdef _MC
+ MC = (MC_TypeDef *)MC_BASE;
+#endif /* _MC */
+
+/************************* UART ************************/
+
+#ifdef _UART0
+ UART0 = (UART_TypeDef *)UART0_BASE;
+#endif /* _UART0 */
+
+#ifdef _UART1
+ UART1 = (UART_TypeDef *)UART1_BASE;
+#endif /* _UART1 */
+
+#ifdef _UART2
+ UART2 = (UART_TypeDef *)UART2_BASE;
+#endif /* _UART2 */
+
+/************************* SSP *************************/
+
+#ifdef _SSP0
+ SSP0 = (SSP_TypeDef *)SSP0_BASE;
+#endif /* _SSP0 */
+
+#ifdef _SSP1
+ SSP1 = (SSP_TypeDef *)SSP1_BASE;
+#endif /* _SSP1 */
+
+/************************* CAN *************************/
+
+#ifdef _CAN
+ CAN = (CAN_TypeDef *)CAN_BASE;
+#endif /* _CAN */
+
+/************************* ADC *************************/
+
+#ifdef _ADC
+ ADC = (ADC_TypeDef *)ADC_BASE;
+#endif /* _ADC */
+
+/************************* WDG *************************/
+
+#ifdef _WDG
+ WDG = (WDG_TypeDef *)WDG_BASE;
+#endif /* _WDG */
+
+/************************* I2C *************************/
+
+#ifdef _I2C0
+ I2C0 = (I2C_TypeDef *)I2C0_BASE;
+#endif /* _I2C0 */
+
+#ifdef _I2C1
+ I2C1 = (I2C_TypeDef *)I2C1_BASE;
+#endif /* _I2C1 */
+/********************** ENET **************************/
+#ifdef _ENET
+ ENET_MAC = (ENET_MAC_TypeDef *)ENET_MAC_BASE;
+ ENET_DMA = (ENET_DMA_TypeDef *)ENET_DMA_BASE;
+#endif /* _ENET */
+}
+#endif /* LIBDEBUG */
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_mc.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_mc.c new file mode 100644 index 0000000..d3ca96a --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_mc.c @@ -0,0 +1,932 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_mc.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the MC software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_mc.h"
+#include "91x_scu.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+#define MC_ODCS_Set 0x0001
+#define MC_ODCS_Reset 0x00FE
+
+#define MC_CMS_Set 0x0004
+#define MC_CMS_Reset 0x00FB
+
+#define MC_CPC_Set 0x0008
+#define MC_CTC_Set 0x0010
+
+#define MC_PCE_Set 0x0020
+#define MC_PCE_Reset 0xFFDF
+
+#define MC_TCE_Set 0x0040
+#define MC_TCE_Reset 0x00BF
+
+#define MC_DTE_Set 0x0080
+#define MC_DTE_Reset 0x007F
+
+#define MC_TCB_Set 0x0004
+#define MC_TCB_Reset 0x00FB
+
+#define MC_STC_Set 0x0008
+
+#define MC_TES_Set 0x0010
+#define MC_TES_Reset 0x00EF
+
+#define MC_CCPT_Set 0x0020
+#define MC_CCPT_Reset 0x005F
+
+#define MC_DISEST_Set 0x0040
+#define MC_DISEST_Reset 0x003F
+
+#define MC_DTS_Set 0x0001
+#define MC_DTS_Reset 0x00FE
+
+#define MC_SDT_Set 0x0002
+
+#define MC_C0SE_Set 0x0004
+#define MC_C0SE_Reset 0x00FB
+
+#define MC_CUSE_Set 0x0008
+#define MC_CUSE_Reset 0x00F7
+
+#define MC_CVSE_Set 0x0010
+#define MC_CVSE_Reset 0x00EF
+
+#define MC_CWSE_Set 0x0020
+#define MC_CWSE_Reset 0x00D0
+
+#define MC_RSE_Set 0x0040
+#define MC_RSE_Reset 0x00BF
+
+#define MC_GPI_Set 0x0080
+#define MC_GPI_Reset 0x007F
+
+#define MC_PUH_Set 0x0020
+#define MC_PUH_Reset 0x005F
+#define MC_PUL_Set 0x0010
+#define MC_PUL_Reset 0x006F
+
+#define MC_PVH_Set 0x0008
+#define MC_PVH_Reset 0x0077
+#define MC_PVL_Set 0x0004
+#define MC_PVL_Reset 0x007B
+
+#define MC_PWH_Set 0x0002
+#define MC_PWH_Reset 0x007D
+#define MC_PWL_Set 0x0001
+#define MC_PWL_Reset 0x007E
+
+#define MC_ODS_Set 0x0040
+#define MC_ODS_Reset 0xFF3F
+
+#define MC_ESC_Clear 0x4321
+
+#define MC_PCR1_TIN_MASK 0xFFFC
+#define MC_OPR_Mask 0x0040
+#define MC_UDCS_Mask 0x0002
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/******************************************************************************
+* Function Name : MC_DeInit
+* Description : Deinitializes MC peripheral registers to their default reset
+* values.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_DeInit(void)
+{
+ /* MC peripheral is under Reset */
+ SCU_APBPeriphReset(__MC, ENABLE);
+
+ /* MC peripheral Reset off */
+ SCU_APBPeriphReset(__MC, DISABLE);
+}
+
+/*******************************************************************************
+* Function Name : MC_Init
+* Description : Initializes the MC peripheral according to the specified
+* parameters in the MC_InitStruct .
+* Input : IMC_InitStruct: pointer to a MC_InitTypeDef structure that
+* contains the configuration information for the MC peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_Init(MC_InitTypeDef* MC_InitStruct)
+{
+ /* Select the operating Mode */
+ if(MC_InitStruct->MC_OperatingMode == MC_SoftwareOperating_Mode)
+ {
+ /* Select the Data transfer Mode */
+ MC->PCR2 |= MC_DTS_Set;
+
+ /* Enable the registers Software Data Transfer */
+ MC->PCR2 |= MC_C0SE_Set | MC_CUSE_Set | MC_CVSE_Set | MC_CWSE_Set
+ |MC_RSE_Set;
+
+ }
+ else
+ {
+ /* Select the Data transfer Mode */
+ MC->PCR2 &= MC_DTS_Reset;
+
+ /* Disable the registers Software Data Transfer */
+ MC->PCR2 &= MC_C0SE_Reset | MC_CUSE_Reset | MC_CVSE_Reset | MC_CWSE_Reset
+ |MC_RSE_Reset;
+ }
+
+ /* Select the MC PWM counter Mode */
+ if(MC_InitStruct->MC_PWMMode == MC_PWMZeroCentered_Mode)
+ {
+ MC->PCR0 |= MC_CMS_Set;
+ }
+ else
+ {
+ MC->PCR0 &= MC_CMS_Reset;
+ }
+
+ /* Set the MC PWM counter Prescaler */
+ MC->CPRS = MC_InitStruct->MC_Prescaler;
+
+ /* Set the MC PWM Period */
+ MC->CMP0 = MC_InitStruct->MC_Period;
+
+ /* Set the MC PWM Repetition counter */
+ MC->REP = MC_InitStruct->MC_RepetitionCounter;
+
+ /* Set the Tacho Compare value */
+ MC->TCMP = MC_InitStruct->MC_TachoPeriod;
+
+ /* Set the Tacho Prescaler value */
+ MC->TPRS = MC_InitStruct->MC_TachoPrescaler;
+
+ /* Set the MC Tacho Input Polarity */
+ MC->PCR1 = (MC->PCR1 & MC_PCR1_TIN_MASK) | MC_InitStruct->MC_TachoPolarity;
+
+ /* Set the MC PWM Forced State */
+ MC->OPR |= MC_ODS_Set;
+ MC->OPR = (MC->OPR & MC_OPR_Mask) | MC_InitStruct->MC_ForcedPWMState;
+
+ /* Select the Tacho Mode */
+ if(MC_InitStruct->MC_TachoMode == MC_TachoOneShot_Mode)
+ {
+ MC->PCR1 |= MC_TCB_Set;
+ }
+ else
+ {
+ MC->PCR1 &= MC_TCB_Reset;
+ }
+
+ /* Select the Tacho Event Mode */
+ if(MC_InitStruct->MC_TachoEvent_Mode == MC_TachoEvent_Software_Mode)
+ {
+ MC->PCR1 |= MC_TES_Set;
+ }
+ else
+ {
+ MC->PCR1 &= MC_TES_Reset;
+ }
+
+ /* Enable or disable the emergency input */
+ if(MC_InitStruct->MC_Emergency == MC_Emergency_Enable)
+ {
+ MC->PCR1 &= MC_DISEST_Reset;
+ }
+ else
+ {
+ MC->PCR1 |= MC_DISEST_Set;
+ }
+
+/* Select the complementary Mode */
+ if(MC_InitStruct->MC_Complementary == MC_Complementary_Enable)
+ {
+ MC->DTG = MC_InitStruct->MC_DeadTime;
+ MC->PCR0 |= MC_ODCS_Set;
+ }
+ else
+ {
+ MC->PCR0 &= MC_ODCS_Reset;
+ }
+
+ /* Tacho Mode selection */
+ if(MC_InitStruct->MC_TachoMode == MC_TachoOneShot_Mode)
+ {
+ MC->PCR1 |= MC_TCB_Set;
+ }
+ else
+ {
+ MC->PCR1 &= MC_TCB_Reset;
+ }
+
+ switch(MC_InitStruct->MC_Channel)
+ {
+ /* Channel U configuration */
+ case MC_Channel_U:
+ {
+ MC->CMPU = MC_InitStruct->MC_PulseU;
+
+ if(MC_InitStruct->MC_PolarityUL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PUL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PUL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityUH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PUH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PUH_Reset;
+ }
+ break;
+ }
+
+ /* Channel V configuration */
+ case MC_Channel_V:
+ {
+ MC->CMPV = MC_InitStruct->MC_PulseV;
+
+ if(MC_InitStruct->MC_PolarityVL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PVL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PVL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityVH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PVH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PVH_Reset;
+ }
+ break;
+ }
+
+ /* Channel W configuration */
+ case MC_Channel_W:
+ {
+ MC->CMPW = MC_InitStruct->MC_PulseW;
+
+ if(MC_InitStruct->MC_PolarityWL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PWL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PWL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityWH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PWH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PWH_Reset;
+ }
+ break;
+ }
+ /* All Channel Configuration */
+ case MC_Channel_ALL:
+ {
+ MC->CMPU = MC_InitStruct->MC_PulseU;
+ MC->CMPV = MC_InitStruct->MC_PulseV;
+ MC->CMPW = MC_InitStruct->MC_PulseW;
+
+ if(MC_InitStruct->MC_PolarityUL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PUL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PUL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityUH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PUH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PUH_Reset;
+ }
+
+ if(MC_InitStruct->MC_PolarityVL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PVL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PVL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityVH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PVH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PVH_Reset;
+ }
+
+ if(MC_InitStruct->MC_PolarityWL == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PWL_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PWL_Reset;
+ }
+ if(MC_InitStruct->MC_PolarityWH == MC_Polarity_Inverted)
+ {
+ MC->PSR |= MC_PWH_Set;
+ }
+ else
+ {
+ MC->PSR &= MC_PWH_Reset;
+ }
+ }
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_StructInit
+* Description : Fills each MC_InitStruct member with its default value.
+* Input : MC_InitStruct : pointer to a MC_InitTypeDef structure which
+* will be initialized.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void MC_StructInit(MC_InitTypeDef* MC_InitStruct)
+{
+ MC_InitStruct->MC_OperatingMode = MC_HardwareOperating_Mode;
+ MC_InitStruct->MC_TachoMode = MC_TachoContinuous_Mode;
+ MC_InitStruct->MC_TachoEvent_Mode = MC_TachoEvent_Hardware_Mode;
+ MC_InitStruct->MC_Prescaler = 0x00;
+ MC_InitStruct->MC_TachoPrescaler = 0x0000;
+ MC_InitStruct->MC_PWMMode = MC_PWMClassical_Mode;
+ MC_InitStruct->MC_Complementary = MC_Complementary_Enable;
+ MC_InitStruct->MC_Emergency = MC_Emergency_Disable;
+ MC_InitStruct->MC_ForcedPWMState = 0x003F;
+ MC_InitStruct->MC_Period = 0x0000;
+ MC_InitStruct->MC_TachoPeriod = 0x00FF;
+ MC_InitStruct->MC_Channel = MC_Channel_ALL;
+ MC_InitStruct->MC_PulseU = 0x0000;
+ MC_InitStruct->MC_PulseV = 0x0000;
+ MC_InitStruct->MC_PulseW = 0x0000;
+ MC_InitStruct->MC_PolarityUL = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_PolarityUH = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_PolarityVL = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_PolarityVH = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_PolarityWL = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_PolarityWH = MC_Polarity_NonInverted;
+ MC_InitStruct->MC_TachoPolarity = MC_TachoEventEdge_RisingFalling;
+ MC_InitStruct->MC_DeadTime = 0x003F;
+ MC_InitStruct->MC_RepetitionCounter = 0x0000;
+}
+
+/*******************************************************************************
+* Function Name : MC_Cmd
+* Description : Enables or disables the MC peripheral.
+* Input : Newstate: new state of the MC peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_Cmd(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the PWM counter */
+ MC->PCR0 |= MC_PCE_Set;
+
+ /* Enable the Tacho counter */
+ MC->PCR0 |= MC_TCE_Set;
+
+ /* Enable the Dead Time counter */
+ MC->PCR0 |= MC_DTE_Set;
+ }
+ else
+ {
+ /* Disable the PWM counter */
+ MC->PCR0 &= MC_PCE_Reset;
+
+ /* Disable the Tacho counter */
+ MC->PCR0 &= MC_TCE_Reset;
+
+ /* Disable the Dead counter */
+ MC->PCR0 &= MC_DTE_Reset;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_ClearPWMCounter
+* Description : Clears the MC PWM counter.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ClearPWMCounter(void)
+{
+/* Clear the PWM counter */
+ MC->PCR0 |= MC_CPC_Set;
+}
+
+/*******************************************************************************
+* Function Name : MC_ClearTachoCounter
+* Description : Clears the MC Tacho counter.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ClearTachoCounter(void)
+{
+/* Clear the Tacho counter */
+ MC->PCR0 |= MC_CTC_Set;
+}
+
+/*******************************************************************************
+* Function Name : MC_CtrlPWMOutputs
+* Description : Enables or disables MC peripheral Main Outputs.
+* Input : Newstate: new state of the MC peripheral Main Outputs.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_CtrlPWMOutputs(FunctionalState Newstate)
+{
+ if(Newstate == ENABLE)
+ {
+ /* Enable the dead time generator data */
+ MC->OPR &= MC_ODS_Reset;
+ }
+ else
+ {
+ /* Enable the default state data */
+ MC->OPR |= MC_ODS_Set;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_ITConfig
+* Description : Enables or disables the MC interrupts.
+* Input : - MC_IT: specifies the MC interrupts sources to be enabled
+* or disabled.
+* This parameter can be any combination of the following values:
+* - MC_IT_CMPW: Compare W Interrupt.
+* - MC_IT_CMPV: Compare V Interrupt.
+* - MC_IT_CMPU: Compare U Interrupt.
+* - MC_IT_ZPC: Zero of PWM counter Interrupt.
+* - MC_IT_ADT: Automatic Data Transfer Interrupt.
+* - MC_IT_OTC: Overflow of Tacho counter Interrupt.
+* - MC_IT_CPT: Capture of Tacho counter Interrupt.
+* - MC_IT_CM0: Compare 0 Interrupt.
+* - Newstate: new state of IMC interrupts.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ITConfig(u16 MC_IT, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the specific interrupt source */
+ MC->IMR |= MC_IT;
+
+ /* Enable the global peripheral interrupt sources */
+ MC->PCR2 |= MC_GPI_Set;
+ }
+ else
+ {
+ /* Disable the specific interrupt source */
+ MC->IMR &= ~MC_IT;
+
+ /* Disable the global peripheral interrupt sources */
+ MC->PCR2 &= MC_GPI_Reset;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_SetPrescaler
+* Description : Sets the MC prescaler value.
+* Input : MC_Prescaler: MC prescaler new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetPrescaler(u8 MC_Prescaler)
+{
+/* Set the Prescaler Register value */
+ MC->CPRS = MC_Prescaler;
+}
+
+/*******************************************************************************
+* Function Name : MC_SetPeriod
+* Description : Sets the MC period value.
+* Input : MC_Period: MC period new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetPeriod(u16 MC_Period)
+{
+/* Set the Period Register value */
+ MC->CMP0 = MC_Period;
+}
+
+/*******************************************************************************
+* Function Name : MC_SetPulseU
+* Description : Sets the MC pulse U value.
+* Input : MC_PulseU: MC pulse U new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetPulseU(u16 MC_PulseU)
+{
+/* Set the Pulse U Register value */
+ MC->CMPU = MC_PulseU;
+}
+
+/*******************************************************************************
+* Function Name : MC_SetPulseV
+* Description : Sets the MC pulse V value.
+* Input : MC_PulseV: MC pulse V new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetPulseV(u16 MC_PulseV)
+{
+/* Set the Pulse V Register value */
+ MC->CMPV = MC_PulseV;
+}
+
+/*******************************************************************************
+* Function Name : MC_SetPulseW
+* Description : Sets the MC pulse W value.
+* Input : MC_PulseW: MC pulse W new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetPulseW(u16 MC_PulseW)
+{
+/* Set the Pulse W Register value */
+ MC->CMPW = MC_PulseW;
+}
+
+/*******************************************************************************
+* Function Name : MC_PWMModeConfig
+* Description : Selects the MC PWM counter Mode.
+* Input : MC_PWMMode: MC PWM counter Mode.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_PWMModeConfig(u16 MC_PWMMode)
+{
+ /* Select the MC PWM counter Mode */
+ if(MC_PWMMode == MC_PWMZeroCentered_Mode)
+ {
+ MC->PCR0 |= MC_CMS_Set;
+ }
+ else
+ {
+ MC->PCR0 &= MC_CMS_Reset;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_SetDeadTime
+* Description : Sets the MC dead time value.
+* Input : MC_DeadTime: MC dead time new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetDeadTime(u16 MC_DeadTime)
+{
+/* Set the dead time Register value */
+ MC->DTG = MC_DeadTime;
+}
+
+/*******************************************************************************
+* Function Name : MC_SetTachoCompare
+* Description : Sets the MC Tacho Compare Register value.
+* Input : MC_Compare: MC Tacho compare new value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SetTachoCompare(u8 MC_Compare)
+{
+ /* Sets the Tacho Compare Register value */
+ MC->TCMP = MC_Compare;
+}
+/*******************************************************************************
+* Function Name : MC_EmergencyCmd
+* Description : Enables or disables the MC emergency feauture.
+* Input : Newstate: new state of the MC peripheral Emergency.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_EmergencyCmd(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Reset the DISEST Bit in the PCR1 Register to enable the emergency stop input */
+ MC->PCR1 &= MC_DISEST_Reset;
+ }
+ else
+ {
+ /* Set the DISEST Bit in the PCR1 Register to disable the emergency stop input */
+ MC->PCR1 |= MC_DISEST_Reset;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_EmergencyClear
+* Description : Clears the MC Emergency Register.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_EmergencyClear(void)
+{
+/* Force PWM outputs in safe state (All OFF) */
+ MC->OPR |= MC_ODS_Set;
+
+/* Clear EST bit */
+ MC->ESC = MC_ESC_Clear;
+
+/* Re-enable protection */
+ MC->ESC = 0;
+
+/* Enables the Outputs */
+ MC->OPR &= MC_ODS_Reset;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetPeriod
+* Description : Gets the MC period value.
+* Input : None
+* Output : None
+* Return : MC period value.
+*******************************************************************************/
+u16 MC_GetPeriod(void)
+{
+/* Return the PWM signal period value */
+ return MC->CMP0;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetPulseU
+* Description : Gets the MC pulse U value.
+* Input : None
+* Output : None
+* Return : MC pulse U value.
+*******************************************************************************/
+u16 MC_GetPulseU(void)
+{
+/* Return the PWM pulse U Register value */
+ return MC->CMPU;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetPulseV
+* Description : Gets the MC pulse V value.
+* Input : None
+* Output : None
+* Return : MC pulse V value.
+*******************************************************************************/
+u16 MC_GetPulseV(void)
+{
+/* Return the PWM pulse V Register value */
+ return MC->CMPV;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetPulseW
+* Description : Gets the MC pulse W value.
+* Input : None
+* Output : None
+* Return : MC pulse W value.
+*******************************************************************************/
+u16 MC_GetPulseW(void)
+{
+/* Return the PWM pulse W Register value */
+ return MC->CMPW;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetTachoCapture
+* Description : Gets the MC Tacho period value.
+* Input : None
+* Output : None
+* Return : MC Tacho capture value.
+*******************************************************************************/
+u16 MC_GetTachoCapture(void)
+{
+/* Return the Tacho Capture Register value */
+ return MC->TCPT;
+}
+
+/*******************************************************************************
+* Function Name : MC_ClearOnTachoCapture
+* Description : Enables or disables the the Clear on capture of tacho counter.
+* Input : Newstate: new state of the CCPT bit.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ClearOnTachoCapture(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the Clear on capture of tacho counter */
+ MC->PCR1 |= MC_CCPT_Set;
+ }
+ else
+ {
+ /* Disable the Clear on capture of tacho counter */
+ MC->PCR1 &= MC_CCPT_Reset;
+ }
+}
+/*******************************************************************************
+* Function Name : MC_ForceDataTransfer
+* Description : Sets the MC Outputs default states.
+* Input : MC_ForcedData: MC outputs new states.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ForceDataTransfer(u8 MC_ForcedData)
+{
+ /* Set the MC PWM Forced State */
+ MC->OPR |= MC_ODS_Set;
+ MC->OPR = (MC->OPR & MC_OPR_Mask) | MC_ForcedData;
+}
+
+/*******************************************************************************
+* Function Name : MC_PreloadConfig
+* Description : Enables the Software Data Transfer.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SoftwarePreloadConfig(void)
+{
+ /* Set the SDT: Software Data Transfer bit */
+ MC->PCR2 |= MC_SDT_Set;
+}
+
+/*******************************************************************************
+* Function Name : MC_SoftwareTachoCapture
+* Description : Enables the Software Tacho Capture.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_SoftwareTachoCapture(void)
+{
+ /* Set the STC: Software Tacho Capture bit */
+ MC->PCR1 |= MC_STC_Set;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetCountingStatus
+* Description : Checks whether the PWM Counter is counting Up or Down.
+* Input : None
+* Output : None
+* Return : The new state of the PWM Counter(DOWN or UP).
+*******************************************************************************/
+CountingStatus MC_GetCountingStatus(void)
+{
+ if((MC->PCR0 & MC_UDCS_Mask) != DOWN)
+ {
+ return UP;
+ }
+ else
+ {
+ return DOWN;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_GetFlagStatus
+* Description : Checks whether the specified MC flag is set or not.
+* Input : MC_FLAG: specifies the flag to check.
+* This parameter can be one of the following values:
+* - MC_FLAG_CMPW: Compare W Flag.
+* - MC_FLAG_CMPV: Compare V Flag.
+* - MC_FLAG_CMPU: Compare U Flag.
+* - MC_FLAG_ZPC: Zero of PWM counter Flag.
+* - MC_FLAG_ADT: Automatic Data Transfer Flag.
+* - MC_FLAG_OTC: Overflow of Tacho counter Flag.
+* - MC_FLAG_CPT: Capture of Tacho counter Flag.
+* - MC_FLAG_CM0: Compare 0 Flag.
+* - MC_FLAG_EST: Emergency Stop Flag.
+* Output : None
+* Return : The new state of the MC_FLAG(SET or RESET).
+*******************************************************************************/
+FlagStatus MC_GetFlagStatus(u16 MC_FLAG)
+{
+ if((MC->IPR & MC_FLAG) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_ClearFlag
+* Description : Clears the MC’s pending flags.
+* Input : MC_FLAG: specifies the flag to clear.
+* This parameter can be any combination of the following values:
+* - MC_FLAG_CMPW: Compare W Flag.
+* - MC_FLAG_CMPV: Compare V Flag.
+* - MC_FLAG_CMPU: Compare U Flag.
+* - MC_FLAG_ZPC: Zero of PWM counter Flag.
+* - MC_FLAG_ADT: Automatic Data Transfer Flag.
+* - MC_FLAG_OTC: Overflow of Tacho counter Flag.
+* - MC_FLAG_CPT: Capture of Tacho counter Flag.
+* - MC_FLAG_CM0: Compare 0 Flag.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ClearFlag(u16 MC_FLAG)
+{
+/* Clear the corresponding Flag */
+ MC->IPR &= ~MC_FLAG;
+}
+
+/*******************************************************************************
+* Function Name : MC_GetITStatus
+* Description : Checks whether the MC interrupt has occurred or not.
+* Input : MC_IT: specifies the MC interrupt source to check.
+* This parameter can be one of the following values:
+* - MC_IT_CMPW: Compare W Interrupt.
+* - MC_IT_CMPV: Compare V Interrupt.
+* - MC_IT_CMPU: Compare U Interrupt.
+* - MC_IT_ZPC: Zero of PWM counter Interrupt.
+* - MC_IT_ADT: Automatic Data Transfer Interrupt.
+* - MC_IT_OTC: Overflow of Tacho counter Interrupt.
+* - MC_IT_CPT: Capture of Tacho counter Interrupt.
+* - MC_IT_CM0: Compare 0 Interrupt.
+* Output : None
+* Return : The new state of the MC_IT(SET or RESET).
+*******************************************************************************/
+ITStatus MC_GetITStatus(u16 MC_IT)
+{
+ if((MC->IPR & MC_IT) && (MC->IMR & MC_IT))
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : MC_ClearITPendingBit
+* Description : Clears the IMC's interrupt pending bits.
+* Input : MC_IT: specifies the pending bit to clear.
+* This parameter can be any combination of the following values:
+* - MC_IT_CMPW: Compare W Interrupt.
+* - MC_IT_CMPV: Compare V Interrupt.
+* - MC_IT_CMPU: Compare U Interrupt.
+* - MC_IT_ZPC: Zero of PWM counter Interrupt.
+* - MC_IT_ADT: Automatic Data Transfer Interrupt.
+* - MC_IT_OTC: Overflow of Tacho counter Interrupt.
+* - MC_IT_CPT: Capture of Tacho counter Interrupt.
+* - MC_IT_CM0: Compare 0 Interrupt.
+* Output : None
+* Return : None
+*******************************************************************************/
+void MC_ClearITPendingBit(u16 MC_IT)
+{
+/* Clear the corresponding interrupt pending bit */
+ MC->IPR &= ~MC_IT;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_rtc.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_rtc.c new file mode 100644 index 0000000..2d0751b --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_rtc.c @@ -0,0 +1,400 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_rtc.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides the RTC library software functions
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_rtc.h"
+#include "91x_scu.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+u8 BYTEToBCD2(u8 value);
+u16 WORDToBCD3(u16 value);
+u8 BCD2ToBYTE(u8 value);
+u16 BCD3ToBYTE(u16 value);
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : BYTEToBCD2
+* Description : Converts a 2 digit decimal to BCD format
+* Input : None
+* Output : None
+* Return : Converted byte
+*******************************************************************************/
+u8 BYTEToBCD2(u8 value)
+{
+ u8 bcdhigh = 0;
+ while (value >= 10)
+ {
+ bcdhigh++;
+ value -= 10;
+ }
+ return (bcdhigh << 4) | value;
+}
+/*******************************************************************************
+* Function Name : WORDToBCD3
+* Description : Converts a 3 digit decimal to BCD format
+* Input : None
+* Output : None
+* Return : Converted word
+*******************************************************************************/
+u16 WORDToBCD3(u16 value)
+{
+ u16 bcdhigh = 0;
+ while (value >= 100)
+ {
+ bcdhigh++;
+ value -= 100;
+ }
+ bcdhigh <<= 4;
+ while (value >= 10)
+ {
+ bcdhigh++;
+ value -= 10;
+ }
+ return (bcdhigh << 4) | value;
+}
+
+/*******************************************************************************
+* Function Name : BCD3ToWORD
+* Description : convert from 3 digit BCD to Binary
+* Input : None
+* Output : None
+* Return : Converted word
+*******************************************************************************/
+u16 BCD3ToWORD(u16 value)
+{
+ return (u16)((((value&0xF00)>>8)*100) + (((value&0x0F0)>>4)*10) + (value&0x0F));
+}
+
+/*******************************************************************************
+* Function Name : BCD2ToBYTE
+* Description : convert from 2 digit BCD to Binary
+* Input : None
+* Output : None
+* Return : Converted word
+*******************************************************************************/
+u8 BCD2ToBYTE(u8 value)
+{
+ u32 tmp;
+ tmp= ((value&0xF0)>>4)*10;
+ return (u8)(tmp+ (value&0x0F));
+}
+
+/*******************************************************************************
+* Function Name : RTC_DeInit
+* Description : Resets the RTC peripheral registers
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_DeInit(void)
+{
+ SCU_APBPeriphReset(__RTC,ENABLE);
+ SCU_APBPeriphReset(__RTC,DISABLE);
+}
+
+/*******************************************************************************
+* Function Name : RTC_SetDate
+* Description : Sets the Date register
+* Input : struct of type RTC_DATE
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_SetDate(RTC_DATE Date)
+{
+ u32 tmp = 0;
+
+ RTC->CR |=0x80; /*Enable write operation in DTR register*/
+ RTC->DTR = 0;
+ tmp = BYTEToBCD2(Date.century);
+ RTC->DTR|=tmp<<24;
+ tmp = BYTEToBCD2(Date.year);
+ RTC->DTR|=tmp<<16;
+ tmp = BYTEToBCD2(Date.month);
+ RTC->DTR|=tmp<<8;
+ tmp = BYTEToBCD2(Date.weekday);
+ RTC->DTR|=tmp;
+ RTC->TR &=0xFFFFFF;
+ tmp = BYTEToBCD2(Date.day);
+ RTC->TR|=tmp<<24;
+ RTC->CR &=~0x80; /*Disable write operation in DTR register*/
+}
+/*******************************************************************************
+* Function Name : RTC_SetTime
+* Description : Sets the Time register
+* Input : struct of type RTC_TIME
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_SetTime(RTC_TIME Time)
+{
+ u32 tmp = 0;
+
+ RTC->CR |=0x80; /*Enable write operation in TR register*/
+ RTC->TR &= 0xFF000000;
+ tmp = BYTEToBCD2(Time.hours);
+ RTC->TR|=tmp<<16;
+ tmp = BYTEToBCD2(Time.minutes);
+ RTC->TR|=tmp<<8;
+ tmp = BYTEToBCD2(Time.seconds);
+ RTC->TR|=tmp;
+ RTC->MILR = 0;
+ RTC->MILR |= WORDToBCD3(Time.milliseconds);
+ RTC->CR &=~0x80; /*Disable write operation in TR register*/
+}
+/*******************************************************************************
+* Function Name : RTC_SetAlarm
+* Description : Sets the Alarm register
+* Input : Struct of type RTC_ALARM
+* Output : Date
+* Return : None
+*******************************************************************************/
+void RTC_SetAlarm(RTC_ALARM Alarm)
+{
+ u32 tmp = 0;
+
+ RTC->CR |=0x80; /*Enable write operation in ATR register*/
+ RTC->ATR = 0;
+ tmp = BYTEToBCD2(Alarm.day);
+ RTC->ATR|=tmp<<24;
+ tmp = BYTEToBCD2(Alarm.hours);
+ RTC->ATR|=tmp<<16;
+ tmp = BYTEToBCD2(Alarm.minutes);
+ RTC->ATR|=tmp<<8;
+ tmp = BYTEToBCD2(Alarm.seconds);
+ RTC->ATR|=tmp;
+ RTC->CR &=~0x80; /*Disable write operation in ATR register*/
+}
+
+/*******************************************************************************
+* Function Name : RTC_GetDate
+* Description : Gets RTC date in BCD coded or BINARY code
+* Input : -Format: BCD or BINARY
+* -Date: pointer to structure of type RTC_DATE to be filled by function
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_GetDate(u8 Format, RTC_DATE * Date)
+{
+ Date->century = (u8)((RTC->DTR&0xFF000000)>>24);
+ Date->year = (u8)((RTC->DTR&0x00FF0000)>>16);
+ Date->month = (u8)((RTC->DTR&0x00001F00)>>8);
+ Date->day = (u8)((RTC->TR&0x3F000000)>>24);
+ Date->weekday = (u8)(RTC->DTR&0xF);
+ if (Format == BINARY)
+ {
+ Date->century = BCD2ToBYTE(Date->century);
+ Date->year = BCD2ToBYTE(Date->year);
+ Date->month = BCD2ToBYTE(Date->month);
+ Date->day = BCD2ToBYTE(Date->day);
+ Date->weekday = BCD2ToBYTE(Date->weekday);
+ }
+}
+
+/*******************************************************************************
+* Function Name : RTC_GetTime
+* Description : Gets TIME in BCD coded or BINARY code
+* Input : -Format: BCD or BINARY
+* -Time : pointer to structure of type RTC_TIME to be filled by function
+* Output : Time
+* Return : None
+*******************************************************************************/
+void RTC_GetTime(u8 Format, RTC_TIME * Time)
+{
+
+ Time->hours = (u8)((RTC->TR&0x003F0000)>>16);
+ Time->minutes = (u8)((RTC->TR&0x00007F00)>>8);
+ Time->seconds = (u8)(RTC->TR&0x7F);
+ Time->milliseconds =(u16)(RTC->MILR&0xFFF);
+ if (Format == BINARY)
+ {
+ Time->hours = BCD2ToBYTE(Time->hours);
+ Time->minutes = BCD2ToBYTE(Time->minutes);
+ Time->seconds = BCD2ToBYTE(Time->seconds);
+ Time->milliseconds = BCD3ToWORD(Time->milliseconds);
+ }
+}
+
+
+/*******************************************************************************
+* Function Name : RTC_GetAlarm
+* Description : Gets the RTC Alarm in BCD or BINARY code
+* Input : -Format: BCD or BINARY
+* -Alarm : pointer to structure of type RTC_ALARM to be filled by function
+* Output : Alarm
+* Return : None
+*******************************************************************************/
+void RTC_GetAlarm(u8 Format,RTC_ALARM * Alarm)
+{
+ Alarm->day = (u8)((RTC->ATR&0x3F000000)>>24);
+ Alarm->hours = (u8)((RTC->ATR&0x003F0000)>>16);
+ Alarm->minutes = (u8)((RTC->ATR&0x00007F00)>>8);
+ Alarm->seconds = (u8)((RTC->ATR)&0x7F);
+ if (Format == BINARY)
+ {
+ Alarm->day = BCD2ToBYTE(Alarm->day);
+ Alarm->hours = BCD2ToBYTE(Alarm->hours);
+ Alarm->minutes = BCD2ToBYTE(Alarm->minutes);
+ Alarm->seconds = BCD2ToBYTE(Alarm->seconds);
+ }
+}
+
+/*******************************************************************************
+* Function Name : RTC_TamperConfig
+* Description : configures the Tamper mode and tamper polarity
+* Input : -TamperMode: RTC_TamperMode_Edge or RTC_TamperMode_Level
+* -TamperPol : RTC_TamperPol_Low or RTC_TamperMode_High
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_TamperConfig(u32 TamperMode, u32 TamperPol)
+{
+ RTC->CR&=RTC_TamperMode_Edge;
+ if (TamperMode!=RTC_TamperMode_Edge)
+ RTC->CR|=RTC_TamperMode_Level;
+
+ RTC->CR&=RTC_TamperPol_Low;
+ if (TamperPol!=RTC_TamperPol_Low)
+ RTC->CR|=RTC_TamperPol_High;
+}
+
+/*******************************************************************************
+* Function Name : RTC_TamperCmd
+* Description : Enable or Disable Tamper
+* Input : NewState: ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_TamperCmd(FunctionalState NewState)
+{
+ RTC->CR&=0xFFFFFFFE;
+ if (NewState==ENABLE)
+ RTC->CR|=0x1;
+}
+
+/*******************************************************************************
+* Function Name : RTC_AlarmCmd
+* Description : Enable or Disable Alarm
+* Input : NewState: ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_AlarmCmd(FunctionalState NewState)
+{
+ RTC->CR&=~0x100000;
+ if (NewState==ENABLE)
+ RTC->CR|=0x100000;
+}
+
+/*******************************************************************************
+* Function Name : RTC_CalibClockCmd
+* Description : Enable or Disable RTC Calibration Clock Output
+* Input : NewState: ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_CalibClockCmd(FunctionalState NewState)
+{
+ RTC->CR&=~0x40;
+ if (NewState ==ENABLE)
+ RTC->CR|=0x40;
+}
+
+/*******************************************************************************
+* Function Name : SRAMBattPowerCmd
+* Description : Enable or Disable SRAM backup Power by VBATT
+* Input : NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_SRAMBattPowerCmd(FunctionalState NewState)
+{
+ RTC->CR&=~0x8;
+ if (NewState ==ENABLE)
+ RTC->CR|=0x8;
+}
+
+/*******************************************************************************
+* Function Name : RTC_PeridicIntConfig
+* Description : Select a Periodic CLock
+* Input : PeriodicClock
+* Output : None
+* Return : None
+* Note : When PeriodicClock = RTC_Per_DISABLE the Periodic clock generation
+* will be disabled.
+*******************************************************************************/
+void RTC_PeriodicIntConfig(u32 PeriodicClock)
+{
+ RTC->CR &=~0xF0000;
+ RTC->CR|=PeriodicClock;
+}
+
+/*******************************************************************************
+* Function Name : RTC_ITConfig
+* Description : Enable or Disable an interrupt
+* Input : -RTC_IT : RTC interrupt
+* -Newstate: Enable or Disable
+* Output : None
+* Return : None
+*******************************************************************************/
+void RTC_ITConfig(u32 RTC_IT, FunctionalState NewState)
+{
+ RTC->CR&=~RTC_IT;
+ if (NewState==ENABLE)
+ RTC->CR|=RTC_IT;
+}
+
+/*******************************************************************************
+* Function Name : RTC_GetFlagStatus
+* Description : Gets a RTC flag status
+* Input : RTC_FLAG
+* Output : None
+* Return : FlagStatus :SET or RESET
+*******************************************************************************/
+FlagStatus RTC_GetFlagStatus(u32 RTC_FLAG)
+{
+ if (RTC->SR&RTC_FLAG) return SET;
+ else return RESET;
+}
+
+/*******************************************************************************
+* Function Name : RTC_ClearFlag
+* Description : Clears a RTC flag
+* Input : RTC_FLAG
+* Output : None
+* Return : None
+* Note : Before clearing the RTC Periodic Flag you need to disable the
+* Periodic interrupt generation, to do this use function
+* RTC_PeriodicIntConfig(RTC_Per_DISABLE)
+*******************************************************************************/
+void RTC_ClearFlag(u32 RTC_FLAG)
+{
+ vu32 tmp=0;
+ if (RTC_FLAG == RTC_FLAG_Per) tmp=RTC->SR;
+ else if (RTC_FLAG == RTC_FLAG_Alarm) RTC->CR&=~0x100000;
+ else if (RTC_FLAG == RTC_FLAG_Tamper) RTC->CR&=~0x1;
+}
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_scu.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_scu.c new file mode 100644 index 0000000..21116b2 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_scu.c @@ -0,0 +1,661 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_scu.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides the SCU library software functions
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_scu.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define SCU_PLLEN 0x80000
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : SCU_MCLKSourceConfig
+* Description : Configures the MCLK source clock
+* Input : MCLK_Source = SCU_MCLK_OSC, SCU_MCLK_PLL or SCU_MCLK_RTC
+* Output : None
+* Return : ErrorStatus: SUCCESS or ERROR
+* Note : this function returns ERROR if trying to select the PLL as
+* clock source while the PLL is disabled or not locked.
+*******************************************************************************/
+ErrorStatus SCU_MCLKSourceConfig(u32 MCLK_Source)
+{
+ u32 CLKCNTR_Value;
+
+ CLKCNTR_Value = SCU->CLKCNTR; /*get CLKCNTR register value*/
+ CLKCNTR_Value &=~0x3; /*clear field MCLKSEL*/
+ if (MCLK_Source == SCU_MCLK_PLL) /*PLL selected as clock source*/
+ {
+ /*check if PLL enabled & locked*/
+ if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
+ return ERROR;
+ }
+ else CLKCNTR_Value |=MCLK_Source; /*OSC or RTC selected as clock source*/
+ SCU->CLKCNTR = CLKCNTR_Value; /*Update CLKCNTR register value*/
+ return SUCCESS;
+}
+
+/*******************************************************************************
+* Function Name : SCU_PLLFactorsConfig
+* Description : Sets the PLL factors
+* Input : PLLN, PLLM and PLLP
+* Output : None
+* Return : ErrorStatus: ERROR or SUCCESS
+* Notes : -The PLL factors must respect the PLL specification requirements
+* -The function returns ERROR if trying to change PLL
+* factors while PLL is selected as Main Clock source (MCLK)
+* -This function disables the PLL, to enable the PLL use
+* function" SCU_PLLCmd(ENABLE)" after setting the PLL factors
+******************************************************************************/
+ErrorStatus SCU_PLLFactorsConfig(u8 PLLN, u8 PLLM, u8 PLLP)
+{
+ if (SCU_PLLCmd(DISABLE)==SUCCESS) /*Disable PLL*/
+ {
+ SCU->PLLCONF =0; /*clear PLLCONF register*/
+ SCU->PLLCONF |=(PLLN<<8); /*update PLLN field*/
+ SCU->PLLCONF |=PLLM; /*update PLLM field*/
+ SCU->PLLCONF |=PLLP<<16; /*update PLLP field*/
+ return SUCCESS;
+ }
+ return ERROR;
+}
+
+/*******************************************************************************
+* Function Name : SCU_PLLCmd
+* Description : Enable or Disable the PLL
+* Input : NewState = ENABLE or DISABLE
+* Output : None
+* Return : ErrorStatus: SUCCESS or ERROR
+* Note : -The function returns ERROR if:
+* *trying to disable the PLL while it is selected as the MCLK
+* *trying to enable the PLL while it is already enabled and
+* locked
+*******************************************************************************/
+ErrorStatus SCU_PLLCmd(FunctionalState NewState)
+{
+ vu32 i;
+ if (NewState==ENABLE)
+ {
+ if (!((SCU->PLLCONF&SCU_PLLEN)&&(SCU->SYSSTATUS&SCU_FLAG_LOCK)))
+ {
+ SCU->SYSSTATUS|=SCU_FLAG_LOCK; /*clear LOCK bit*/
+ SCU->PLLCONF |=SCU_PLLEN; /*PLL Enable*/
+ while(!SCU->SYSSTATUS&SCU_FLAG_LOCK); /*Wait PLL to lock*/
+ return SUCCESS;
+ }
+ else return ERROR;
+ }
+ else /*NewState = DISABLE*/
+ {
+ if(SCU->CLKCNTR&0x3) /*check if PLL not sys CLK*/
+ {
+ for(i=10;i>0;i--); /*delay before PLL disabling*/
+ SCU->PLLCONF &=~SCU_PLLEN; /*PLL Disable*/
+ return SUCCESS;
+ }
+ else return ERROR;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_RCLKDivisorConfig
+* Description : Sets the RCLK divisor value
+* Input : RCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_RCLKDivisorConfig(u32 RCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_RCLK_Div1; /*clear RCLKDIV[2:0] field*/
+ if (RCLK_Divisor!=SCU_RCLK_Div1)
+ SCU->CLKCNTR |= RCLK_Divisor; /*update field with RCLK divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_HCLKDivisorConfig
+* Description : Sets the HCLK divisor value
+* Input : HCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_HCLKDivisorConfig(u32 HCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_HCLK_Div1; /*clear AHBDIV[1:0] field*/
+ if (HCLK_Divisor!=SCU_HCLK_Div1)
+ SCU->CLKCNTR |= HCLK_Divisor; /*update field with HCLK divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_PCLKDivisorConfig
+* Description : Sets the PCLK divisor value
+* Input : PCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PCLKDivisorConfig(u32 PCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_PCLK_Div1; /*clear APBDIV[1:0] field*/
+ if (PCLK_Divisor!=SCU_PCLK_Div1)
+ SCU->CLKCNTR |= PCLK_Divisor; /*update field with PCLK Divisor*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphClockConfig
+* Description : Enable the clock for an APB peripheral
+* Input : -APBPerip : APB peripherals(__RTC, __ADC ,...)
+* -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphClockConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE) /*Enable clock for APB peripheral*/
+ SCU->PCGR1 |=APBPeriph;
+ else
+ SCU->PCGR1 &=~APBPeriph; /*Disable clock for APB peripheral*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphClockConfig
+* Description : Enable the clock for an AHB peripheral
+* Input : -AHBPerip: AHB peripherals(__USB, __DMA,...)
+* -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphClockConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE) /*Enable clock for AHB peripheral*/
+ SCU->PCGRO |=AHBPeriph;
+ else
+ SCU->PCGRO &=~AHBPeriph; /*Disable clock for AHB peripheral*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphReset
+* Description : Assert or deassert Reset on APB peripheral
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphReset(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==DISABLE) /*APB peripheral not held in Reset*/
+ SCU->PRR1 |=APBPeriph;
+ else
+ SCU->PRR1 &=~APBPeriph; /*APB peripheral held in Reset*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphReset
+* Description : Assert or deassert Reset on AHB peripheral
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphReset(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==DISABLE)
+ SCU->PRR0 |=AHBPeriph; /*AHB peripheral not held in Reset*/
+ else
+ SCU->PRR0 &=~AHBPeriph; /*AHB peripheral held in Reset*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphIdleConfig
+* Description : Enable or Disable Periph Clock during Idle mode
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphIdleConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->MGR1 |=APBPeriph; /*APB peripheral clock enabled during Idle mode*/
+ else
+ SCU->MGR1 &=~APBPeriph; /*APB peripheral clock disabled during Idle mode*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphIdleConfig
+* Description : Enable or Disable Periph Clock during Idle mode
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphIdleConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->MGR0 |=AHBPeriph; /*AHB peripheral clock enabled during Idle mode*/
+ else
+ SCU->MGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during Idle mode*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_APBPeriphDebugConfig
+* Description : Enable or Disable Periph Clock during ARM debug state
+* Input : -APBPeriph: APB peripherals(__RTC, __ADC,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_APBPeriphDebugConfig(u32 APBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->PECGR1 |=APBPeriph; /*APB peripheral clock enabled during ARM debug state*/
+ else
+ SCU->PECGR1 &=~APBPeriph; /*APB peripheral clock disabled during ARM debug state*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_AHBPeriphDebugConfig
+* Description : Enable or Disable Periph Clock during ARM debug state
+* Input : -AHBPeriph: AHB peripherals(__USB, __DMA,...)
+ -NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_AHBPeriphDebugConfig(u32 AHBPeriph, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->PECGR0 |=AHBPeriph; /*AHB peripheral clock enabled during ARM debug state*/
+ else
+ SCU->PECGR0 &=~AHBPeriph; /*AHB peripheral clock disabled during ARM debug state*/
+}
+/*******************************************************************************
+* Function Name : SCU_BRCLKDivisorConfig
+* Description : Sets the BRCLK divisor value
+* Input : BRCLK_Divisor
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_BRCLKDivisorConfig(u32 BRCLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_BRCLK_Div1; /*Clear BRSEL bit*/
+ if (BRCLK_Divisor!=SCU_BRCLK_Div1)
+ SCU->CLKCNTR |= SCU_BRCLK_Div2; /*set bit BRSEL*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_TIMCLKSourceConfig
+* Description : Sets the TIMx clock source
+* Input : - TIMx : SCU_TIM01 or SCU_TIM23
+* - TIMCLK_Source = SCU_TIMCLK_EXT or SCU_TIMCLK_INT
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_TIMCLKSourceConfig(u8 TIMx, u32 TIMCLK_Source)
+{
+ if (TIMx== SCU_TIM01) /*TIM01 clock source configuration*/
+ {
+ SCU->CLKCNTR &=0xFFFFDFFF;
+ if (TIMCLK_Source == SCU_TIMCLK_EXT)
+ SCU->CLKCNTR |=0x2000;
+ }
+ else
+ {
+ SCU->CLKCNTR &=0xFFFFBFFF; /*TIM23 clock source configuration*/
+ if (TIMCLK_Source == SCU_TIMCLK_EXT)
+ SCU->CLKCNTR |=0x4000;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_TIMPresConfig
+* Description : Sets the TIMx Prescaler Value
+* Input : - TIMx : SCU_TIM01 or SCU_TIM23
+* - Prescaler (16 bit value)
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_TIMPresConfig(u8 TIMx, u16 Prescaler)
+{
+ if (TIMx==SCU_TIM01) /*TIM01 Prescaler configuration*/
+ SCU->SCR1 = Prescaler&0xFFFF;
+ else
+ SCU->SCR2 = Prescaler&0xFFFF; /*TIM23 Prescaler configuration*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_USBCLKConfig
+* Description : Configures the clock source for the 48MHz USBCLK
+* Input : USBCLK_Source: SCU_USBCLK_MCLK,SCU_USBCLK_MCLK2 or SCU_USBCLK_EXT
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_USBCLKConfig(u32 USBCLK_Source)
+{
+ SCU->CLKCNTR &=SCU_USBCLK_MCLK; /*clear USBSEL[1:0] field*/
+ if (USBCLK_Source!=SCU_USBCLK_MCLK)
+ SCU->CLKCNTR |= USBCLK_Source; /*update field with USBCLK_Source*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_PHYCLKConfig
+* Description : Enable or Disable PHY clock output
+* Input : NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PHYCLKConfig(FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->CLKCNTR |= 0x1000; /*enable MIIPHY clock*/
+ else
+ SCU->CLKCNTR &=~0x1000; /*disable MIIPHY clock*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_FMICLKDivisorConfig
+* Description : Set the FMI clock divisor
+* Input : FMICLK_Divisor: SCU_FMICLK_Div1 or SCU_FMICLK_DIV2
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_FMICLKDivisorConfig(u32 FMICLK_Divisor)
+{
+ SCU->CLKCNTR &=SCU_FMICLK_Div1; /*FMICLK = RCLK*/
+ if (FMICLK_Divisor!=SCU_FMICLK_Div1)
+ SCU->CLKCNTR |=SCU_FMICLK_Div2; /*FMICLK = RCLK/2 */
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIBCLKDivisorConfig
+* Description : Set the EMI Bus clock divisor: EMIBCLK = HCLK or HCLK/2
+* Input : SCU_EMICLK: SCU_EMIBCLK_Div1 , SCU_EMIBCLK_Div2
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIBCLKDivisorConfig(u32 SCU_EMIBCLK)
+{
+ SCU->CLKCNTR &=SCU_EMIBCLK_Div1; /*EMIBCLK = HCLK */
+ if (SCU_EMIBCLK!=SCU_EMIBCLK_Div1)
+ SCU->CLKCNTR |= SCU_EMIBCLK_Div2; /*EMIBCLK = HCLK/2 */
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIModeConfig
+* Description : Configure the EMI as Multiplexed or Demultiplexed
+* Input : SCU_EMIMODE : SCU_EMI_MUX or SCU_EMI_DEMUX
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIModeConfig(u32 SCU_EMIMODE)
+{
+ SCU->SCR0 &=SCU_EMI_MUX; /*EMI mode = Multiplexed*/
+ if (SCU_EMIMODE!=SCU_EMI_MUX)
+ SCU->SCR0 |= SCU_EMI_DEMUX; /*EMI mode = Demultiplexed*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_EMIALEConfig
+* Description : Configure the ALE signal (length & polarity)
+* Input : -SCU_EMIALE_LEN : SCU_EMIALE_LEN1 or SCU_EMIALE_LEN2
+* -SCU_EMIALE_POL : SCU_EMIALE_POLLow or SCU_EMI_POLHigh
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EMIALEConfig(u32 SCU_EMIALE_LEN, u32 SCU_EMIALE_POL)
+{
+ /*Configure EMI ALE Length*/
+ SCU->SCR0 &=SCU_EMIALE_LEN1;
+ if (SCU_EMIALE_LEN!=SCU_EMIALE_LEN1)
+ SCU->SCR0 |= SCU_EMIALE_LEN2;
+
+ /*Configure EMI ALE POL*/
+ SCU->SCR0 &=SCU_EMIALE_POLLow;
+ if (SCU_EMIALE_POL!=SCU_EMIALE_POLLow)
+ SCU->SCR0 |= SCU_EMIALE_POLHigh;
+}
+
+/*******************************************************************************
+* Function Name : SCU_ITConfig
+* Description : ENBALE or DISABLE an SCU interrupt
+* Input : -SCU_IT: interrupt mask
+* -NewState: ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_ITConfig(u32 SCU_IT, FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->ITCMSK&=~SCU_IT; /*IT enable */
+ else
+ SCU->ITCMSK|=SCU_IT; /*IT disable( mask)*/
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetFlagStatus
+* Description : Returns flag status
+* Input : SCU_Flag
+* Output : NONE
+* Return : SET or RESET
+*******************************************************************************/
+FlagStatus SCU_GetFlagStatus(u32 SCU_Flag)
+{
+ if (SCU->SYSSTATUS&SCU_Flag)
+ return SET;
+ else return RESET;
+}
+
+/*******************************************************************************
+* Function Name : SCU_ClearFlag
+* Description : Clears a SYSTATUS Flag
+* Input : SCU_Flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_ClearFlag(u32 SCU_Flag)
+{
+ SCU->SYSSTATUS = SCU_Flag;
+}
+/*******************************************************************************
+* Function Name : SCU_GetPLLfreqValue
+* Description : Gets the current PLL frequency
+* Input : None
+* Output : None
+* Return : PLL frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetPLLFreqValue(void)
+{
+ u8 PLL_M;
+ u8 PLL_N;
+ u8 PLL_P;
+
+ PLL_M = SCU->PLLCONF&0xFF;
+ PLL_N = (SCU->PLLCONF&0xFF00)>>8;
+ PLL_P = (SCU->PLLCONF&0x70000)>>16;
+
+ if ((PLL_M>0)&&(PLL_N>0))
+ return (u32)(((_Main_Crystal*2)*PLL_N)/(PLL_M<<PLL_P));
+
+ else return 0;
+}
+/*******************************************************************************
+* Function Name : SCU_GetMCLKFreqValue
+* Description : Gets the current MCLK frequency
+* Input : None
+* Output : None
+* Return : MCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetMCLKFreqValue(void)
+{
+ if ((SCU->CLKCNTR&0x3) == 0x2) return (u32)(_Main_Crystal);
+ if ((SCU->CLKCNTR&0x3) == 0x1) return (u32)(32);
+ else return (SCU_GetPLLFreqValue());
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetRCLKFreqValue
+* Description : Gets the current RCLK frequency
+* Input : None
+* Output : None
+* Return : RCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetRCLKFreqValue(void)
+{
+ u8 RCLK_Div;
+ RCLK_Div = (SCU->CLKCNTR&0x1C)>>2;
+ if (RCLK_Div==0x5) RCLK_Div=10;
+ return (u32)(SCU_GetMCLKFreqValue() >>RCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetHCLKFreqValue
+* Description : Gets the current PCLK frequency
+* Input : None
+* Output : None
+* Return : HCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetHCLKFreqValue(void)
+{
+ u8 HCLK_Div;
+ HCLK_Div = (SCU->CLKCNTR&0x60)>>5;
+ return (u32)(SCU_GetRCLKFreqValue() >>HCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_GetPCLKFreqValue
+* Description : Gets the current HCLK frequency
+* Input : None
+* Output : None
+* Return : PCLK frequency (KHz)
+*******************************************************************************/
+u32 SCU_GetPCLKFreqValue(void)
+{
+ u8 PCLK_Div;
+ PCLK_Div = (SCU->CLKCNTR&0x180)>>7;
+ return (u32)(SCU_GetRCLKFreqValue() >>PCLK_Div);
+}
+
+/*******************************************************************************
+* Function Name : SCU_WakeUpLineConfig
+* Description : Configures an External interrupt as WakeUp line
+* Input : EXTint : 0 -> 31
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_WakeUpLineConfig(u8 EXTint)
+{
+ if (EXTint < 8)
+ {
+ SCU->WKUPSEL&=~0x7;
+ SCU->WKUPSEL|=EXTint;
+ }
+ else if (EXTint<16)
+ {
+ SCU->WKUPSEL&=~0x38;
+ SCU->WKUPSEL|=(EXTint-8)<<3;
+ }
+ else if (EXTint<24)
+ {
+ SCU->WKUPSEL&=~0x1C0;
+ SCU->WKUPSEL|=(EXTint-16)<<6;
+ }
+ else
+ {
+ SCU->WKUPSEL&=~0xE00;
+ SCU->WKUPSEL|=(EXTint-24)<<9;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SCU_SpecIntRunModeConfig
+* Description : Enables or Disables the Special Run mode
+* Input : newstate = ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_SpecIntRunModeConfig(FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ SCU->PWRMNG |=0x8;
+ else
+ SCU->PWRMNG &=~0x8;
+}
+/*******************************************************************************
+* Function Name : SCU_EnterIdleMode
+* Description : Enters in Idle mode
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EnterIdleMode(void)
+{
+ SCU->PWRMNG |=0x1;
+}
+/*******************************************************************************
+* Function Name : SCU_EnterSleepMode
+* Description : Enters in Sleep mode
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_EnterSleepMode(void)
+{
+ SCU->PWRMNG |=0x2;
+}
+
+/*******************************************************************************
+* Function Name : SCU_UARTIrDAConfig
+* Description : Enable or Disable the Irda mode for UARTx
+* Input : - UARTx :x=0,1 or 2
+* - UART_IrDA_Mode : SCU_UARTMode_IrDA or SCU_UARTMode_UART
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_UARTIrDASelect(UART_TypeDef * UARTx, u8 UART_IrDA_Mode)
+{
+ if (UART_IrDA_Mode == SCU_UARTMode_IrDA)
+ {
+ if (UARTx== UART0) SCU->SCR0 |=0x400;
+ else if (UARTx==UART1) SCU->SCR0 |=0x800;
+ else SCU->SCR0 |=0x1000;
+ }
+ else
+ {
+ if (UARTx== UART0) SCU->SCR0 &=~0x400;
+ else if (UARTx==UART1) SCU->SCR0 &=~0x800;
+ else SCU->SCR0 &=~0x1000;
+ }
+}
+/*******************************************************************************
+* Function Name : SCU_PFQBCCmd
+* Description : Enable or Disable PFQBC
+* Input : NewState : ENABLE or DISABLE
+* Output : None
+* Return : None
+*******************************************************************************/
+void SCU_PFQBCCmd(FunctionalState NewState)
+{
+ if (NewState==ENABLE)
+ SCU->SCR0 |=0x1;
+ else SCU->SCR0 &=~0x1;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ssp.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ssp.c new file mode 100644 index 0000000..06bf30c --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_ssp.c @@ -0,0 +1,469 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_ssp.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the SSP software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_ssp.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+
+/* SSP peripheral Enable */
+#define SSP_Enable 0x0002
+#define SSP_Disable 0xFFFD
+
+/* SSP Loop Back Mode Enable */
+#define SSP_LoopBackMode_Enable 0x0001
+#define SSP_LoopBackMode_Disable 0xFFFE
+
+/* SSP Flag Mask */
+#define SSP_Flag_Mask 0x001F
+
+/* SSP DMA transmit/ receive enable/disable Masks */
+#define SSP_DMA_TransmitEnable 0x0002
+#define SSP_DMA_TransmitDisable 0xFFFD
+#define SSP_DMA_ReceiveEnable 0x0001
+#define SSP_DMA_ReceiveDisable 0xFFFE
+
+/* SSP Masks */
+#define SSP_FrameFormat_Mask 0xFFCF
+#define SSP_DataSize_Mask 0xFFF0
+#define SSP_ClockRate_Mask 0x00FF
+#define SSP_ClockPrescaler_Mask 0xFF00
+
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : SSP_DeInit
+* Description : Deinitializes the SSPx peripheral registers to their default
+* reset values.
+* Input : SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_DeInit(SSP_TypeDef* SSPx)
+{
+ if(SSPx == SSP0)
+ {
+ /* Reset the SSP0 registers values*/
+ SCU_APBPeriphReset(__SSP0,ENABLE);
+ SCU_APBPeriphReset(__SSP0,DISABLE);
+ }
+ else if (SSPx == SSP1)
+ {
+ /* Reset the SSP1 registers values*/
+ SCU_APBPeriphReset(__SSP1,ENABLE);
+ SCU_APBPeriphReset(__SSP1,DISABLE);
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_Init
+* Description : Initializes the SSPx peripheral according to the specified
+* parameters in the SSP_InitTypeDef structure.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_InitStruct: pointer to a SSP_InitTypeDef structure that
+* contains the configuration information for the specified SSP
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_Init(SSP_TypeDef* SSPx, SSP_InitTypeDef* SSP_InitStruct)
+{
+ if(SSP_InitStruct->SSP_FrameFormat == SSP_FrameFormat_Motorola)
+ {
+ /* Set the Motorola frame format */
+ SSPx->CR0 &= SSP_FrameFormat_Motorola;
+ /* Configure the Clock polarity */
+ if(SSP_InitStruct->SSP_CPOL == SSP_CPOL_High)
+ {
+ /* SCK is held high when no data is being transfered */
+ SSPx->CR0 |= SSP_CPOL_High;
+ }
+ else
+ {
+ /* SCK is held low when no data is being transfered */
+ SSPx->CR0 &= SSP_CPOL_Low;
+ }
+ /* Configure the Clock Phase */
+ if(SSP_InitStruct->SSP_CPHA == SSP_CPHA_2Edge)
+ {
+ /* Data captured on second clock edge */
+ SSPx->CR0 |= SSP_CPHA_2Edge;
+ }
+ else
+ {
+ /* Data captured on first clock edge */
+ SSPx->CR0 &= SSP_CPHA_1Edge;
+ }
+ }
+ /* Configure the Frame format */
+ else
+ {
+ /* Clear the FRF[1:0] bits */
+ SSPx->CR0 &= SSP_FrameFormat_Mask;
+ /* Set the TI frame format */
+ SSPx->CR0 |= SSP_InitStruct->SSP_FrameFormat;
+ }
+ /* Configure the Mode */
+ if(SSP_InitStruct->SSP_Mode == SSP_Mode_Slave)
+ {
+ /* Set the slave mode */
+ SSPx->CR1 |= SSP_Mode_Slave;
+ /* Configure the Slave output */
+ if(SSP_InitStruct->SSP_SlaveOutput == SSP_SlaveOutput_Disable)
+ {
+ /* Slave output disabled */
+ SSPx->CR1 |= SSP_SlaveOutput_Disable;
+ }
+ else
+ {
+ /* Slave output enabled */
+ SSPx->CR1 &= SSP_SlaveOutput_Enable;
+ }
+ }
+ else
+ {
+ /* Set the master mode */
+ SSPx->CR1 &= SSP_Mode_Master;
+ /* Clear clock rate SCR[7:0] bits */
+ SSPx->CR0 &= SSP_ClockRate_Mask;
+ /* Set the serial clock rate */
+ SSPx->CR0 |= (SSP_InitStruct->SSP_ClockRate<<8);
+ /* Clear clock prescaler CPSDVSR[7:0] bits */
+ SSPx->PR &= SSP_ClockPrescaler_Mask;
+ /* Set the serial clock prescaler */
+ SSPx->PR |= SSP_InitStruct->SSP_ClockPrescaler;
+ }
+
+ /* Clear data size DSS[3:0] bits */
+ SSPx->CR0 &= SSP_DataSize_Mask;
+ /* Set the data size */
+ SSPx->CR0 |= SSP_InitStruct->SSP_DataSize;
+}
+/*******************************************************************************
+* Function Name : SSP_StructInit
+* Description : Fills in a SSP_InitTypeDef structure with the reset value of
+* each parameter.
+* Input : SSP_InitStruct : pointer to a SSP_InitTypeDef structure
+ which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_StructInit(SSP_InitTypeDef* SSP_InitStruct)
+{
+ /* Initialize the SSP_FrameFormat member */
+ SSP_InitStruct->SSP_FrameFormat = SSP_FrameFormat_Motorola;
+
+ /* Initialize the SSP_Mode member */
+ SSP_InitStruct->SSP_Mode = SSP_Mode_Master;
+
+ /* Initialize the SSP_CPOL member */
+ SSP_InitStruct->SSP_CPOL = SSP_CPOL_Low;
+
+ /* Initialize the SSP_CPHA member */
+ SSP_InitStruct->SSP_CPHA = SSP_CPHA_1Edge;
+
+ /* Initialize the SSP_DataSize member */
+ SSP_InitStruct->SSP_DataSize = SSP_DataSize_8b;
+
+ /* Initialize the SSP_SlaveOutput member */
+ SSP_InitStruct->SSP_SlaveOutput = SSP_SlaveOutput_Enable;
+
+ /* Initialize the SSP_ClockRate member */
+ SSP_InitStruct->SSP_ClockRate = 0;
+
+ /* Initialize the SSP_ClockPrescaler member */
+ SSP_InitStruct->SSP_ClockPrescaler = 0;
+}
+
+/*******************************************************************************
+* Function Name : SSP_Cmd
+* Description : Enables or disables the specified SSP peripheral.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - NewState: new state of the SSPx peripheral. This parameter
+* can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_Cmd(SSP_TypeDef* SSPx, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the SSP peripheral */
+ SSPx->CR1 |= SSP_Enable;
+ }
+ else
+ {
+ /* Disable the SSP peripheral */
+ SSPx->CR1 &= SSP_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_ITConfig
+* Description : Enables or disables the specified SSP interrupts.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_IT: specifies the SSP interrupts sources to be enabled
+* or disabled. This parameter can be any combination of the
+* following values:
+* - SSP_IT_TxFifo: Transmit FIFO half empty or less interrupt
+* - SSP_IT_RxFifo: Receive FIFO half full or less interrupt
+* - SSP_IT_RxTimeOut: Receive timeout interrupt
+* - SSP_IT_RxOverrun: Receive overrun interrupt
+* - NewState: new state of the specified SSP interrupts.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_ITConfig(SSP_TypeDef* SSPx, u16 SSP_IT, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the selected SSP interrupts */
+ SSPx->IMSCR |= SSP_IT;
+ }
+ else
+ {
+ /* Disable the selected SSP interrupts */
+ SSPx->IMSCR &= ~SSP_IT;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_DMACmd
+* Description : Configures the SSP0 DMA interface.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_DMATransfert : specifies the DMA transfert to be
+* enabled or disabled. This parameter can be one of the
+* following values:
+* - SSP_DMA_Transmit: transmit Fifo DMA transfert
+* - SSP_DMA_Receive : receive Fifo DMA transfert
+* - NewState: new state of the DMA transfert.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_DMACmd(SSP_TypeDef* SSPx, u16 SSP_DMATransfert, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ if(SSP_DMATransfert == SSP_DMA_Transmit)
+ {
+ /* Enable DMA for the transmit FIFO */
+ SSPx->DMACR |= SSP_DMA_TransmitEnable;
+ }
+ else
+ {
+ /* Enable DMA for the receive FIFO */
+ SSPx->DMACR |= SSP_DMA_ReceiveEnable;
+ }
+ }
+ else
+ {
+ if(SSP_DMATransfert == SSP_DMA_Transmit)
+ {
+ /* Disable DMA for the transmit FIFO */
+ SSPx->DMACR &= SSP_DMA_TransmitDisable;
+ }
+ else
+ {
+ /* Disable DMA for the receive FIFO */
+ SSPx->DMACR &= SSP_DMA_ReceiveDisable;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_SendData.
+* Description : Transmits a Data through the SSP peripheral.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - Data : Data to be transmitted.
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_SendData(SSP_TypeDef* SSPx, u16 Data)
+{
+ /* Write in the DR register the data to be sent */
+ SSPx->DR = Data;
+}
+
+/*******************************************************************************
+* Function Name : SSP_ReceiveData.
+* Description : Returns the most recent received data by the SSP peripheral.
+* Input : SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* Output : None
+* Return : The value of the received data.
+*******************************************************************************/
+u16 SSP_ReceiveData(SSP_TypeDef* SSPx)
+{
+ /* Return the data in the DR register */
+ return SSPx->DR;
+}
+
+/*******************************************************************************
+* Function Name : SSP_LoopBackMode
+* Description : Enable or disable the Loop back mode for the selected SSPx peripheral.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - NewState: new state of the Loop Back mode.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void SSP_LoopBackMode(SSP_TypeDef* SSPx, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable loop back mode */
+ SSPx->CR1 |= SSP_LoopBackMode_Enable;
+ }
+ else
+ {
+ /* Disable loop back mode */
+ SSPx->CR1 &= SSP_LoopBackMode_Disable;
+ }
+}
+
+
+
+/*******************************************************************************
+* Function Name : SSP_GetFlagStatus
+* Description : Checks whether the specified SSP flag is set or not.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_FLAG: flag to check. This parameter can be one of the
+* following values:
+* - SSP_FLAG_Busy: busy flag
+* - SSP_FLAG_RxFifoFull: Receive FIFO full flag
+* - SSP_FLAG_RxFifoNotEmpty: Receive FIFO not empty flag
+* - SSP_FLAG_TxFifoNotFull: Transmit FIFO not full flag
+* - SSP_FLAG_TxFifoEmpty: Transmit FIFO empty flag
+* - SSP_FLAG_TxFifo: Transmit FIFO half empty or less flag
+* - SSP_FLAG_RxFifo: Receive FIFO half full or less flag
+* - SSP_FLAG_RxTimeOut: Receive timeout flag
+* - SSP_FLAG_RxOverrun: Receive overrun flag
+* Output : None
+* Return : The new state of SSP_Flag (SET or RESET).
+*******************************************************************************/
+FlagStatus SSP_GetFlagStatus(SSP_TypeDef* SSPx, u16 SSP_FLAG)
+{
+ u32 SSPReg = 0, FlagPos = 0;
+ u32 StatusReg = 0;
+
+ /* Get the SSP register index */
+ SSPReg = SSP_FLAG >> 5;
+
+ /* Get the flag position */
+ FlagPos = SSP_FLAG & SSP_Flag_Mask;
+
+ /* Find the register of the flag to check */
+ if(SSPReg == 1)
+ {
+ /* The flag to check is in SR register */
+ StatusReg = SSPx->SR;
+ }
+ else if (SSPReg == 2)
+ {
+ /* The flag to check is in RISR register */
+ StatusReg = SSPx->RISR;
+ }
+
+ /* Check the status of the specified SSP flag */
+ if((StatusReg & (1 << FlagPos)) != RESET)
+ {
+ /* Return SET if the SSP flag is set */
+ return SET;
+ }
+ else
+ {
+ /* Return RESET if the SSP flag is reset */
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_ClearFlag
+* Description : Clears the SSPx flags.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_FLAG: flags to clear. This parameter one of the
+* following values:
+* - SSP_FLAG_RxTimeOut: Receive timeout flag
+* - SSP_FLAG_RxOverrun: Receive overrun flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_ClearFlag(SSP_TypeDef* SSPx, u16 SSP_FLAG)
+{
+ u8 FlagPos = 0;
+
+ /* Get the flag position */
+ FlagPos = SSP_FLAG & SSP_Flag_Mask;
+
+ /* Clear the selected SSP flag */
+ SSPx->ICR = (1 << FlagPos);
+}
+
+/*******************************************************************************
+* Function Name : SSP_GetITStatus
+* Description : Checks whether the specified SSP interrupt flag is set or not.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_IT: interrupt flag to check. This parameter can be one
+* of the following values:
+* - SSP_IT_TxFifo: Transmit FIFO half empty or less interrupt
+* - SSP_IT_RxFifo: Receive FIFO half full or less interrupt
+* - SSP_IT_RxTimeOut: Receive timeout interrupt
+* - SSP_IT_RxOverrun: Receive overrun interrupt
+* Output : None
+* Return : The new state of SSP_IT flag (SET or RESET).
+*******************************************************************************/
+ITStatus SSP_GetITStatus(SSP_TypeDef* SSPx, u16 SSP_IT)
+{
+ /* Check the status of the specified interrupt flag */
+ if((SSPx->MISR & SSP_IT) != RESET)
+ {
+ /* Return SET if the SSP interrupt flag is set */
+ return SET;
+ }
+ else
+ {
+ /* Return RESET if SSP interrupt flag is reset */
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : SSP_ClearITPendingBit
+* Description : Clears the pending interrupt flags.
+* Input : - SSPx: where x can be 0 or 1 to select the SSP peripheral.
+* - SSP_IT: interrupts pending bits to clear. This parameter
+* can be any combination of the following values:
+* - SSP_IT_RxTimeOut: Receive timeout interrupt
+* - SSP_IT_RxOverrun: Receive overrun interrupt
+* Output : None
+* Return : None
+*******************************************************************************/
+void SSP_ClearITPendingBit(SSP_TypeDef* SSPx, u16 SSP_IT)
+{
+ /* Clear the selected SSP interrupts pending bits */
+ SSPx->ICR = SSP_IT;
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
+
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_tim.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_tim.c new file mode 100644 index 0000000..7957168 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_tim.c @@ -0,0 +1,694 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_tim.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the TIM software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_tim.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+/* TIM Bits Masks */
+
+#define TIM_PWM_MASK 0x0010
+#define TIM_OPM_MASK 0x0020
+#define TIM_OC1_ENABLE_MASK 0x0040
+#define TIM_OC1_DISABLE_MASK 0xFFBF
+#define TIM_OC2_ENABLE_MASK 0x0080
+#define TIM_OC2_DISABLE_MASK 0xFF7F
+
+#define TIM_OLVL1_SET_MASK 0x0100
+#define TIM_OLVL1_RESET_MASK 0xFEFF
+
+#define TIM_OLVL2_SET_MASK 0x0200
+#define TIM_OLVL2_RESET_MASK 0xFDFF
+
+#define TIM_ENABLE_MASK 0x8000
+#define TIM_DISABLE_MASK 0x7FFF
+
+#define TIM_DMA_CLEAR_MASK 0xCFFF
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/*******************************************************************************
+* Function Name : TIM_DeInit
+* Description : Initializes TIM peripheral control and registers to their
+* : default reset values.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_DeInit(TIM_TypeDef *TIMx)
+{
+ if((TIMx == TIM0)||(TIMx == TIM1))
+ {
+ SCU_APBPeriphReset(__TIM01, DISABLE); /* TIM0 & TIM1 Reset's off */
+ }
+ else
+ {
+ SCU_APBPeriphReset(__TIM23, DISABLE); /* TIM2 & TIM3 Reset's off */
+ }
+
+ /* Set all the TIMx registers to thier default values */
+ TIMx->OC1R = 0x8000;
+ TIMx->OC2R = 0x8000;
+ TIMx->CR1 = 0x0;
+ TIMx->CR2 = 0x1;
+ TIMx->CNTR = 0x1234;
+ TIMx->SR = 0x0;
+}
+
+/*******************************************************************************
+* Function Name : TIM_StructInit
+* Description : Fills in a TIM_InitTypeDef structure with the reset value of
+* each parameter.
+* Input : TIM_InitStruct : pointer to a TIM_InitTypeDef structure
+ which will be initialized.
+* Output : None
+* Return : None.
+*******************************************************************************/
+void TIM_StructInit(TIM_InitTypeDef *TIM_InitStruct)
+{
+ TIM_InitStruct->TIM_Mode = 0x0000;
+ TIM_InitStruct->TIM_OC1_Modes = 0x0000;
+ TIM_InitStruct->TIM_OC2_Modes = 0x0000;
+ TIM_InitStruct->TIM_Clock_Source = 0x0000;
+ TIM_InitStruct->TIM_Clock_Edge = 0x0000;
+ TIM_InitStruct->TIM_OPM_INPUT_Edge = 0x0000;
+ TIM_InitStruct->TIM_ICAP1_Edge = 0x0000;
+ TIM_InitStruct->TIM_ICAP2_Edge = 0x0000;
+ TIM_InitStruct->TIM_Prescaler = 0x0000;
+ TIM_InitStruct->TIM_Pulse_Level_1 = 0x0000;
+ TIM_InitStruct->TIM_Pulse_Level_2 = 0x0000;
+ TIM_InitStruct->TIM_Period_Level = 0x0000;
+ TIM_InitStruct->TIM_Pulse_Length_1 = 0x0000;
+ TIM_InitStruct->TIM_Pulse_Length_2 = 0x0000;
+ TIM_InitStruct->TIM_Full_Period = 0x0000;
+}
+
+/*******************************************************************************
+* Function Name : TIM_Init
+* Description : Initializes TIM peripheral according to the specified
+* parameters in the TIM_InitTypeDef structure.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_InitStruct: pointer to a TIM_InitTypeDef structure that
+* contains the configuration information for the specified
+* TIM peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+
+void TIM_Init(TIM_TypeDef *TIMx, TIM_InitTypeDef *TIM_InitStruct)
+{
+/***************************** Clock configuration ****************************/
+
+ if (TIM_InitStruct->TIM_Clock_Source == TIM_CLK_APB)
+ {
+ /* APB clock */
+ TIMx->CR1 &= TIM_CLK_APB;
+ }
+ else
+ {
+ /* External/SCU clock */
+ TIMx->CR1 |= TIM_CLK_EXTERNAL;
+ if (TIM_InitStruct->TIM_Clock_Edge == TIM_CLK_EDGE_RISING)
+ {
+ /* Clock rising edge */
+ TIMx->CR1 |= TIM_CLK_EDGE_RISING;
+ }
+ else
+ {
+ /* Clock falling edge */
+ TIMx->CR1 &= TIM_CLK_EDGE_FALLING;
+ }
+ }
+
+/************************** Prescaler configuration ***************************/
+
+ TIMx->CR2 =( TIMx->CR2 & 0xFF00 )|TIM_InitStruct->TIM_Prescaler ;
+
+/********************************** TIM Modes *********************************/
+
+ switch ( TIM_InitStruct->TIM_Mode)
+ {
+/******************************* PWM Input mode *******************************/
+
+ case TIM_PWMI:
+
+ /* Set the PWMI Bit */
+ TIMx->CR1 |= TIM_PWMI;
+
+ /* Set the first edge Level */
+ if ( TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;
+ }
+
+ /* Set the Second edge Level ( Opposite of the first level ) */
+ if ( TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)
+ {
+ TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;
+ }
+ else
+ {
+ TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;
+ }
+
+ break;
+
+/************************** Output compare channel 1 **************************/
+
+ case TIM_OCM_CHANNEL_1:
+
+ if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL1_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL1_RESET_MASK;
+ }
+
+ TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;
+
+ if (TIM_InitStruct->TIM_OC1_Modes == TIM_TIMING)
+ {
+ TIMx->CR1 &= TIM_OC1_DISABLE_MASK;
+ }
+ else
+ {
+ TIMx->CR1 |= TIM_OC1_ENABLE_MASK;
+ }
+
+ break;
+
+/************************** Output compare channel 2 **************************/
+
+ case TIM_OCM_CHANNEL_2:
+
+ if (TIM_InitStruct->TIM_Pulse_Level_2 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL2_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL2_RESET_MASK;
+ }
+
+ TIMx->OC2R = TIM_InitStruct->TIM_Pulse_Length_2;
+
+ if (TIM_InitStruct->TIM_OC2_Modes == TIM_TIMING)
+ {
+ TIMx->CR1 &= TIM_OC2_DISABLE_MASK;
+ }
+ else
+ {
+ TIMx->CR1 |= TIM_OC2_ENABLE_MASK;
+ }
+
+ break;
+
+/************************ Output compare channel 1 & 2 ************************/
+
+ case TIM_OCM_CHANNEL_12:
+
+ TIMx->OC2R = TIM_InitStruct->TIM_Pulse_Length_2;
+ TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;
+
+ if (TIM_InitStruct->TIM_OC2_Modes == TIM_TIMING)
+ {
+ TIMx->CR1 &= TIM_OC2_DISABLE_MASK;
+ }
+ else
+ {
+ TIMx->CR1 |= TIM_OC2_ENABLE_MASK;
+ }
+
+ if (TIM_InitStruct->TIM_OC1_Modes == TIM_TIMING)
+ {
+ TIMx->CR1 &= TIM_OC1_DISABLE_MASK;
+ }
+ else
+ {
+ TIMx->CR1 |= TIM_OC1_ENABLE_MASK;
+ }
+
+ if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL1_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL1_RESET_MASK;
+ }
+
+ if (TIM_InitStruct->TIM_Pulse_Level_2 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL2_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL2_RESET_MASK;
+ }
+
+ break;
+
+/********************************** PWM mode **********************************/
+
+ case TIM_PWM:
+
+ /* Set the Level During the pulse */
+ if ( TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL2_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL2_RESET_MASK;
+ }
+
+ /* Set the Level after the pulse */
+ if (TIM_InitStruct->TIM_Period_Level == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL1_SET_MASK;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_OLVL1_RESET_MASK;
+ }
+
+ /* Set the OCAE */
+ TIMx->CR1 |= TIM_OC1_ENABLE_MASK;
+
+ /* Set the PWM Bit */
+ TIMx->CR1 |= TIM_PWM_MASK;
+
+ /* Set the Duty Cycle value */
+ if ( TIM_InitStruct->TIM_Pulse_Length_1 < 5 )
+ {
+ TIM_InitStruct->TIM_Pulse_Length_1 = 4;
+ }
+
+ TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1 - 4;
+
+ /* Set the Full Period */
+ TIMx->OC2R = TIM_InitStruct->TIM_Full_Period - 4;
+
+ break;
+
+/******************************* One pulse mode *******************************/
+
+ case TIM_OPM:
+
+ /* Set the Level During the pulse */
+ if (TIM_InitStruct->TIM_Pulse_Level_1 == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL2_SET_MASK;
+ }
+
+ /* Set the Level after the pulse */
+ if (TIM_InitStruct->TIM_Period_Level == TIM_HIGH)
+ {
+ TIMx->CR1 |= TIM_OLVL1_SET_MASK;
+ }
+
+ /* Set the Activation Edge on the ICAP 1 */
+ if (TIM_InitStruct->TIM_OPM_INPUT_Edge == TIM_OPM_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_OPM_EDGE_RISING;
+ }
+
+ /* Set the Output Compare Function */
+ TIMx->CR1 |= TIM_OC1_ENABLE_MASK;
+
+ /* Set the One pulse mode */
+ TIMx->CR1 |= TIM_OPM_MASK;
+
+ /* Set the Pulse length */
+ TIMx->OC1R = TIM_InitStruct->TIM_Pulse_Length_1;
+
+ break;
+
+/*************************** Input capture channel 1 **************************/
+
+ case TIM_ICAP_CHANNEL_1:
+
+ if (TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;
+ }
+
+ break;
+
+/*************************** Input capture channel 2 **************************/
+
+ case TIM_ICAP_CHANNEL_2:
+
+ if (TIM_InitStruct->TIM_ICAP2_Edge == TIM_ICAP2_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;
+ }
+
+ break;
+
+/************************* Input capture channel 1 & 2 ************************/
+
+ case TIM_ICAP_CHANNEL_12:
+ if (TIM_InitStruct->TIM_ICAP2_Edge == TIM_ICAP2_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_ICAP2_EDGE_RISING;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_ICAP2_EDGE_FALLING;
+ }
+
+ if (TIM_InitStruct->TIM_ICAP1_Edge == TIM_ICAP1_EDGE_RISING)
+ {
+ TIMx->CR1 |= TIM_ICAP1_EDGE_RISING;
+ }
+ else
+ {
+ TIMx->CR1 &= TIM_ICAP1_EDGE_FALLING;
+ }
+
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name : TIM_CounterCmd
+* Description : Enables or disables TIMx Counter peripheral.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_operation: specifies the new state of the TIMx Counter.
+* This parameter can be one of the following values:
+* - TIM_START: Start the timer counter.
+* - TIM_STOP : Stop the timer counter.
+* - TIM_CLEAR: Clear the timer counter.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_CounterCmd(TIM_TypeDef *TIMx, TIM_CounterOperations TIM_operation)
+{
+ switch (TIM_operation)
+ {
+ case TIM_START:
+ TIMx->CR1 |= TIM_ENABLE_MASK;
+ break;
+
+ case TIM_STOP:
+ TIMx->CR1 &= TIM_DISABLE_MASK;
+ break;
+
+ case TIM_CLEAR:
+ TIMx->CNTR = 0x1234;
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*******************************************************************************
+* Function Name : TIM_PrescalerConfig
+* Description : This routine is used to configure the TIMx prescaler value
+* (when using the APB clock).
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_Prescaler: specifies the prescaler value. This parameter
+* can be a value from 0x0 to 0xFF.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_PrescalerConfig(TIM_TypeDef *TIMx, u8 TIM_Prescaler)
+{
+ TIMx->CR2 &= 0xFF00;
+ TIMx->CR2 |= TIM_Prescaler;
+
+}
+/*******************************************************************************
+* Function Name : TIM_GetPrescalerValue
+* Description : This routine is used to get the TIMx prescaler value
+* (when using the APB clock).
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The prescaler value.
+*******************************************************************************/
+u8 TIM_GetPrescalerValue(TIM_TypeDef *TIMx)
+{
+ return TIMx->CR2 & 0x00FF;
+}
+
+/*******************************************************************************
+* Function Name : TIM_GetCounterValue
+* Description : This routine is used to get the TIMx counter value.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The counter value.
+*******************************************************************************/
+u16 TIM_GetCounterValue(TIM_TypeDef *TIMx)
+{
+ return TIMx->CNTR;
+}
+
+/*******************************************************************************
+* Function Name : TIM_GetICAP1Value
+* Description : This routine is used to get the Input Capture 1 value.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The Input Capture 1 value.
+*******************************************************************************/
+u16 TIM_GetICAP1Value(TIM_TypeDef *TIMx)
+{
+ return TIMx->IC1R;
+}
+
+/*******************************************************************************
+* Function Name : TIM_GetICAP2Value
+* Description : This routine is used to get the Input Capture 2 value.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The Input Capture 2 value.
+*******************************************************************************/
+u16 TIM_GetICAP2Value(TIM_TypeDef *TIMx)
+{
+ return TIMx->IC2R;
+}
+
+/*******************************************************************************
+* Function Name : TIM_SetPulse
+* Description : This routine is used to set the pulse value.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_Channel: specifies the needed channel.
+* This parameter can be one of the following values:
+* - TIM_PWM_OC1_Channel: PWM/Output Compare 1 Channel
+* - TIM_OC2_Channel : Output Compare 2 Channel
+* Input3 : TIM_Pulse: specifies the new pulse value.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_SetPulse(TIM_TypeDef *TIMx,u16 TIM_Channel ,u16 TIM_Pulse)
+{
+ if (TIM_Channel == TIM_PWM_OC1_Channel)
+ {
+ TIMx->OC1R = TIM_Pulse;
+ }
+ else
+ {
+ TIMx->OC2R = TIM_Pulse;
+ }
+}
+/*******************************************************************************
+* Function Name : TIM_GetFlagStatus
+* Description : Checks whether the specified TIMx flag is set or not.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_Flag: specifies the flag to check.
+* This parameter can be one of the following values:
+* - TIM_FLAG_IC1: Input Capture Channel 1 Flag
+* - TIM_FLAG_IC2: Input Capture Channel 2 Flag
+* - TIM_FLAG_TO : Timer Overflow Flag
+* - TIM_FLAG_OC1: Output Compare Channel 1 Flag
+* - TIM_FLAG_OC2: Output Compare Channel 2 Flag
+* Output : None
+* Return : The NewState of the TIM_Flag (SET or RESET).
+*******************************************************************************/
+FlagStatus TIM_GetFlagStatus(TIM_TypeDef *TIMx, u16 TIM_Flag)
+{
+ if((TIMx->SR & TIM_Flag) == RESET)
+ {
+ return RESET;
+ }
+ else
+ {
+ return SET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : TIM_ClearFlag
+* Description : Clears the TIM Flag passed as a parameter.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_Flag: specifies the flag to clear.
+* This parameter can be one of the following values:
+* - TIM_FLAG_IC1: Input Capture Channel 1 Flag
+* - TIM_FLAG_IC2: Input Capture Channel 2 Flag
+* - TIM_FLAG_TO : Timer Overflow Flag
+* - TIM_FLAG_OC1: Output Compare Channel 1 Flag
+* - TIM_FLAG_OC2: Output Compare Channel 2 Flag
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_ClearFlag(TIM_TypeDef *TIMx, u16 TIM_Flag)
+{
+ /* Clear TIM_Flag */
+ TIMx->SR &= ~TIM_Flag;
+}
+
+/*******************************************************************************
+* Function Name : TIM_GetPWMIPulse
+* Description : This routine is used to get the Pulse value in PWMI Mode.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The pulse value.
+*******************************************************************************/
+u16 TIM_GetPWMIPulse(TIM_TypeDef *TIMx)
+{
+ return TIMx->IC2R;
+}
+
+/*******************************************************************************
+* Function Name : TIM_GetPWMIPeriod
+* Description : This routine is used to get the Period value in PWMI Mode.
+* Input : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Output : None
+* Return : The period value.
+*******************************************************************************/
+u16 TIM_GetPWMIPeriod(TIM_TypeDef *TIMx)
+{
+ return TIMx->IC1R;
+}
+
+/*******************************************************************************
+* Function Name : TIM_ITConfig
+* Description : Configures the Timer interrupt source.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_IT: specifies the TIM interrupt source to be enabled.
+* This parameter can be one of the following values:
+* - TIM_IT_IC1: Input Capture 1 Interrupt source.
+* - TIM_IT_OC1: Output Compare 1 Interrupt source.
+* - TIM_IT_TO : Timer Overflow Interrupt source.
+* - TIM_IT_IC2: Input Capture 2 Interrupt source.
+* - TIM_IT_OC2: Output Compare 2 Interrupt source.
+* Input3 : TIM_Newstate: specifies the new state of the TIMx IT.
+* This parameter can be one of the following values:
+* - ENABLE : Enable the needed interrupt.
+* - DISABLE: Disable the needed interrupt.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_ITConfig(TIM_TypeDef *TIMx, u16 TIM_IT, FunctionalState TIM_Newstate)
+{
+ if(TIM_Newstate == ENABLE)
+ {
+ TIMx->CR2 = (TIMx->CR2 & 0x00FF) | TIM_IT;
+ }
+ else
+ {
+ TIMx->CR2 &= ~TIM_IT;
+ }
+}
+
+/*******************************************************************************
+* Function Name : TIM_DMAConfig
+* Description : Configures the Timer DMA source.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_DMA_Souces: specifies the TIM DMA source to be selected.
+* This parameter can be one of the following values:
+* - TIM_DMA_IC1: Input Capture 1 DMA source.
+* - TIM_DMA_OCA1 Output Compare 1 DMA source.
+* - TIM_DMA_TO: Timer Overflow DMA source.
+* - TIM_DMA_IC2: Input Capture 2 DMA source.
+* - TIM_DMA_OC2: Output Compare 2 DMA source.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_DMAConfig(TIM_TypeDef *TIMx, u16 TIM_DMA_Sources)
+{
+ /* Reset the DMAS[1:0] bits */
+ TIMx->CR1 &= TIM_DMA_CLEAR_MASK;
+ /* Set the DMAS[1:0] bits according to TIM_DMA_Sources parameter */
+ TIMx->CR1 |= TIM_DMA_Sources;
+}
+
+/*******************************************************************************
+* Function Name : TIM_DMACmd
+* Description : Enables or disables TIMx DMA peripheral.
+* Input1 : TIMx: where x can be from 0 to 3 to select the TIM
+* peripheral.
+* Input2 : TIM_Newstate: new state of the TIMx DMA peripheral
+* This parameter can be one of the following values:
+* - ENABLE : Enable the TIMx DMA.
+* - DISABLE: Disable the TIMx DMA.
+* Output : None
+* Return : None
+*******************************************************************************/
+void TIM_DMACmd(TIM_TypeDef *TIMx, FunctionalState TIM_Newstate)
+{
+ if (TIM_Newstate == ENABLE)
+ {
+ TIMx->CR2 |= TIM_DMA_ENABLE;
+ }
+ else
+ {
+ TIMx->CR2 &= TIM_DMA_DISABLE;
+ }
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_uart.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_uart.c new file mode 100644 index 0000000..3c87216 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_uart.c @@ -0,0 +1,658 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_uart.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the UART software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_uart.h"
+#include "91x_scu.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* UART IrDA Mask */
+#define UART_IrDA_Disable_Mask 0xFFFD /* IrDA Disable Mask */
+#define UART_IrDA_Enable_Mask 0x0002 /* IrDA Enable Mask */
+#define IrDA_LowPower_Enable_Mask 0x0004 /*IrDA lower power mode enable*/
+#define IrDA_LowPower_Disable_Mask 0xFFFB /*IrDA lower power mode enable*/
+
+/* UART Mask */
+#define UART_Enable_Mask 0x0001 /* UART Enable Mask */
+#define UART_Disable_Mask 0xFFFE /* UART Disable Mask */
+
+/* UART LoopBack */
+#define UART_LoopBack_Disable_Mask 0xFF7F /* LoopBack Disable Mask */
+#define UART_LoopBack_Enable_Mask 0x0080 /* LoopBack Enable Mask */
+
+#define UART_WordLength_Mask 0xFF9F /* UART Word Length Mask */
+#define UART_Parity_Mask 0xFF79 /* UART Parity Mask */
+#define UART_HardwareFlowControl_Mask 0x3FFF /* UART Hardware Flow Control Mask */
+#define UART_TxRxFIFOLevel_Mask 0xFFC0 /* UART Tx Rx FIFO Level Mask */
+#define UART_BreakChar_Mask 0x0001 /* UART Break Character send Mask*/
+#define UART_FLAG_Mask 0x1F /* UART Flag Mask */
+#define UART_Mode_Mask 0xFCFF /* UART Mode Mask */
+#define UART_RTS_LowLevel_Mask 0x0800 /* RTS signal is low */
+#define UART_RTS_HighLevel_Mask 0xF7FF /* RTS signal is High */
+#define UART_DTR_LowLevel_Mask 0x0400 /* DTR signal is low */
+#define UART_DTR_HighLevel_Mask 0xFBFF /* DTR signal is High */
+#define UART_ClearFlag_Mask 0xAA /* Clear Flag Mask */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+ /*******************************************************************************
+* Function Name : UART_DeInit
+* Description : Deinitializes the UARTx peripheral registers
+* to their default reset values.
+* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_DeInit(UART_TypeDef* UARTx)
+{
+ /* Reset the UARTx registers values */
+ if(UARTx == UART0)
+ {
+ SCU_APBPeriphReset(__UART0,ENABLE);
+ SCU_APBPeriphReset(__UART0,DISABLE);
+ }
+ else if(UARTx == UART1)
+ {
+ SCU_APBPeriphReset(__UART1,ENABLE);
+ SCU_APBPeriphReset(__UART1,DISABLE);
+ }
+ else if(UARTx == UART2)
+ {
+ SCU_APBPeriphReset(__UART2,ENABLE);
+ SCU_APBPeriphReset(__UART2,DISABLE);
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_Init
+* Description : Initializes the UARTx peripheral according to the specified
+* parameters in the UART_InitStruct .
+* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
+* - UART_InitStruct: pointer to a UART_InitTypeDef structure
+* that contains the configuration information for the
+* specified UART peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_Init(UART_TypeDef* UARTx, UART_InitTypeDef* UART_InitStruct)
+{
+
+ u64 UART_MainClock = 0;
+ u32 IntegerDivider = 0;
+ u32 FractionalDivider = 0;
+
+ /* Clear the LCR[6:5] bits */
+ UARTx->LCR &= UART_WordLength_Mask;
+ /* Set the LCR[6:5] bits according to UART_WordLength value */
+ UARTx->LCR |= UART_InitStruct->UART_WordLength;
+
+ /* Choose Stop Bits */
+ if(UART_InitStruct->UART_StopBits == UART_StopBits_2)
+ {
+ /* 2 Stop Bit */
+ UARTx->LCR |= UART_StopBits_2;
+ }
+ else
+ {
+ /* One Stop Bits */
+ UARTx->LCR &= UART_StopBits_1;
+ }
+
+ /* Configure the Parity */
+ /* Clear the LCR[7]and LCR[2:1] bits */
+ UARTx->LCR &= UART_Parity_Mask;
+ /* Set the LCR[7]and LCR[2:1] bits according to UART_Parity value */
+ UARTx->LCR |= UART_InitStruct->UART_Parity;
+
+ /* Configure the BaudRate */
+ UART_MainClock = (SCU_GetMCLKFreqValue())*1000;
+ if((SCU->CLKCNTR & 0x200) != 0x200)
+ {
+ UART_MainClock = UART_MainClock/2;
+ }
+ /* Determine the integer part */
+ IntegerDivider = ((100) * (UART_MainClock) / (16 * (UART_InitStruct->UART_BaudRate)));
+ UARTx->IBRD = IntegerDivider / 100;
+
+ /* Determine the fractional part */
+ FractionalDivider = IntegerDivider - (100 * (UARTx->IBRD));
+ UARTx->FBRD = ((((FractionalDivider * 64) + 50) / 100));
+
+ /* Choose the Hardware Flow Control */
+ /* Clear the CR[15:14] bits */
+ UARTx->CR &= UART_HardwareFlowControl_Mask;
+ /* Set the CR[15:14] bits according to UART_HardwareFlowControl value */
+ UARTx->CR |= UART_InitStruct->UART_HardwareFlowControl;
+
+ /* Configure the UART mode */
+ /* Clear the CR[9:8] bits */
+ UARTx->CR &= UART_Mode_Mask;
+ /* Set the CR[9:8] bits according to UART_Mode value */
+ UARTx->CR |= UART_InitStruct->UART_Mode;
+
+ /* Enable or disable the FIFOs */
+ /* Set the FIFOs Levels */
+ if(UART_InitStruct->UART_FIFO == UART_FIFO_Enable)
+ {
+ /* Enable the FIFOs */
+ UARTx->LCR |= UART_FIFO_Enable;
+
+ /* Clear TXIFLSEL and RXIFLSEL bits */
+ UARTx->IFLS &= UART_TxRxFIFOLevel_Mask;
+
+ /* Set RXIFLSEL bits according to UART_RxFIFOLevel value */
+ UARTx->IFLS |= (UART_InitStruct->UART_RxFIFOLevel << 3);
+
+ /* Set TXIFLSEL bits according to UART_TxFIFOLevel value */
+ UARTx->IFLS |= UART_InitStruct->UART_TxFIFOLevel;
+ }
+ else
+ {
+ /* Disable the FIFOs */
+ UARTx->LCR &= UART_FIFO_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_StructInit
+* Description : Fills each UART_InitStruct member with its reset value.
+* Input : UART_InitStruct: pointer to a UART_InitTypeDef structure which
+* will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_StructInit(UART_InitTypeDef* UART_InitStruct)
+{
+ /* Reset the UART_InitStruct members */
+ UART_InitStruct->UART_WordLength = UART_WordLength_8D;
+ UART_InitStruct->UART_StopBits = UART_StopBits_1;
+ UART_InitStruct->UART_Parity = UART_Parity_Odd ;
+ UART_InitStruct->UART_BaudRate = 9600;
+ UART_InitStruct->UART_HardwareFlowControl = UART_HardwareFlowControl_None;
+ UART_InitStruct->UART_Mode = UART_Mode_Tx_Rx;
+ UART_InitStruct->UART_FIFO = UART_FIFO_Enable;
+ UART_InitStruct->UART_TxFIFOLevel = UART_FIFOLevel_1_2;
+ UART_InitStruct->UART_RxFIFOLevel = UART_FIFOLevel_1_2;
+}
+
+/*******************************************************************************
+* Function Name : UART_Cmd
+* Description : Enables or disables the specified UART peripheral.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
+* - NewState: new state of the UARTx peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_Cmd(UART_TypeDef* UARTx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Enable the selected UART by setting the UARTEN bit in the CR register */
+ UARTx->CR |= UART_Enable_Mask;
+ }
+ else
+ {
+ /* Disable the selected UART by clearing the UARTEN bit in the CR register */
+ UARTx->CR &= UART_Disable_Mask;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_ITConfig
+* Description : Enables or disables the specified UART interrupts.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
+* - UART_IT: specifies the UART interrupts sources to be
+* enabled or disabled. This parameter can be any combination
+* of the following values:
+* - UART_IT_OverrunError: Overrun Error interrupt
+* - UART_IT_BreakError: Break Error interrupt
+* - UART_IT_ParityError: Parity Error interrupt
+* - UART_IT_FrameError: Frame Error interrupt
+* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
+* - UART_IT_Transmit: Transmit interrupt
+* - UART_IT_Receive: Receive interrupt
+* - UART_IT_DSR: DSR interrupt
+* - UART_IT_DCD: DCD interrupt
+* - UART_IT_CTS: CTS interrupt
+* - UART_IT_RI: RI interrupt
+* - NewState: new state of the UARTx peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_ITConfig(UART_TypeDef* UARTx, u16 UART_IT, FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enables the selected interrupts */
+ UARTx->IMSC |= UART_IT;
+ }
+ else
+ {
+ /* Disables the selected interrupts */
+ UARTx->IMSC &= ~UART_IT;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_DMAConfig
+* Description : Configures the UARTx’s DMA interface.
+* Input : - UARTx: where x can be 1 or 2 to select the UART peripheral
+* - UART_DMAOnError: specifies the DMA on error request.
+* This parameter can be:
+* - UART_DMAOnError_Enable: DMA receive request enabled
+* when the UART error interrupt is asserted.
+* - UART_DMAOnError_Disable: DMA receive request disabled
+* when the UART error interrupt is asserted.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_DMAConfig(UART_TypeDef* UARTx, u16 UART_DMAOnError)
+{
+ if(UART_DMAOnError == UART_DMAOnError_Enable)
+ {
+ UARTx->DMACR &= UART_DMAOnError_Enable;
+ }
+ else
+ {
+ UARTx->DMACR |= UART_DMAOnError_Disable;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_DMACmd
+* Description : Enables or disables the UARTx’s DMA interface.
+* Input : - UARTx: where x can be 1 or 2 to select the UART peripheral
+* - UART_DMAReq: enables or disables the request of DMA from UART.
+* This parameter can be:
+* - UART_DMAReq_Tx: Transmit DMA Enable
+* - UART_DMAReq_Rx: Receive DMA Enable
+* - NewState: new state of the UARTx peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_DMACmd(UART_TypeDef* UARTx, u8 UART_DMAReq, FunctionalState NewState)
+{
+ if(UART_DMAReq == UART_DMAReq_Tx)
+ {
+ if(NewState == ENABLE)
+ {
+ UARTx->DMACR |= UART_DMAReq_Tx;
+ }
+ else
+ {
+ UARTx->DMACR &= ~UART_DMAReq_Tx;
+ }
+ }
+
+ if(UART_DMAReq == UART_DMAReq_Rx)
+ {
+ if(NewState == ENABLE)
+ {
+ UARTx->DMACR |= UART_DMAReq_Rx;
+ }
+ else
+ {
+ UARTx->DMACR &= ~UART_DMAReq_Rx;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_LoopBackConfig
+* Description : Enables or disables the LoopBack mode.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
+* - NewState: new state of the UARTx peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_LoopBackConfig(UART_TypeDef* UARTx, FunctionalState NewState)
+{
+ if (NewState == ENABLE)
+ {
+ /* Enable the LoopBack mode of the specified UART */
+ UARTx->CR |= UART_LoopBack_Enable_Mask;
+ }
+ else
+ {
+ /* Disable the LoopBack mode of the specified UART */
+ UARTx->CR &= UART_LoopBack_Disable_Mask;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_GetFlagStatus
+* Description : Checks whether the specified UART flag is set or not.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral
+* - UART_FLAG: specifies the flag to check.
+* This parameter can be one of the following values:
+* - UART_FLAG_OverrunError: Overrun error flag
+* - UART_FLAG_Break: break error flag
+* - UART_FLAG_ParityError: parity error flag
+* - UART_FLAG_FrameError: frame error flag
+* - UART_FLAG_RI: RI flag
+* - UART_FLAG_TxFIFOEmpty: Transmit FIFO Empty flag
+* - UART_FLAG_RxFIFOFull: Receive FIFO Full flag
+* - UART_FLAG_TxFIFOFull: Transmit FIFO Full flag
+* - UART_FLAG_RxFIFOEmpty: Receive FIFO Empty flag
+* - UART_FLAG_Busy: UART Busy flag
+* - UART_FLAG_CTS: CTS flag
+* - UART_FLAG_DCD: DCD flag
+* - UART_FLAG_DSR: DSR flag
+* - UART_RawIT_OverrunError: Overrun Error interrupt flag
+* - UART_RawIT_BreakError: Break Error interrupt flag
+* - UART_RawIT_ParityError: Parity Error interrupt flag
+* - UART_RawIT_FrameError: Frame Error interrupt flag
+* - UART_RawIT_ReceiveTimeOut: ReceiveTimeOut interrupt flag
+* - UART_RawIT_Transmit: Transmit interrupt flag
+* - UART_RawIT_Receive: Receive interrupt flag
+* - UART_RawIT_DSR: DSR interrupt flag
+* - UART_RawIT_DCD: DCD interrupt flag
+* - UART_RawIT_CTS: CTS interrupt flag
+* - UART_RawIT_RI: RI interrupt flag
+* Output : None
+* Return : The new state of UART_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus UART_GetFlagStatus(UART_TypeDef* UARTx, u16 UART_FLAG)
+{
+
+ u32 UARTReg = 0, FlagPos = 0;
+ u32 StatusReg = 0;
+
+ /* Get the UART register index */
+ UARTReg = UART_FLAG >> 5;
+
+ /* Get the flag position */
+ FlagPos = UART_FLAG & UART_FLAG_Mask;
+
+ if(UARTReg == 1) /* The flag to check is in RSR register */
+ {
+ StatusReg = UARTx->RSECR;
+ }
+ else if (UARTReg == 2) /* The flag to check is in FR register */
+ {
+ StatusReg = UARTx->FR;
+ }
+ else if(UARTReg == 3) /* The flag to check is in RIS register */
+ {
+ StatusReg = UARTx->RIS;
+ }
+
+ if((StatusReg & (1 << FlagPos))!= RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_ClearFlag
+* Description : Clears the UARTx’s flags(Frame, Parity, Break, Overrun error).
+* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_ClearFlag(UART_TypeDef* UARTx)
+{
+ /* Clear the flag */
+ UARTx->RSECR = UART_ClearFlag_Mask;
+}
+
+/*******************************************************************************
+* Function Name : UART_GetITStatus
+* Description : Checks whether the specified UART interrupt has occured or not.
+* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
+* - UART_IT: specifies the interrupt pending bit to be checked.
+* This parameter can be one of the following values:
+* - UART_IT_OverrunError: Overrun Error interrupt
+* - UART_IT_BreakError: Break Error interrupt
+* - UART_IT_ParityError: Parity Error interrupt
+* - UART_IT_FrameError: Frame Error interrupt
+* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
+* - UART_IT_Transmit: Transmit interrupt
+* - UART_IT_Receive: Receive interrupt
+* - UART_IT_DSR: DSR interrupt
+* - UART_IT_DCD: DCD interrupt
+* - UART_IT_CTS: CTS interrupt
+* - UART_IT_RI: RI interrupt
+* Output : None
+* Return : The new state of UART_IT (SET or RESET).
+*******************************************************************************/
+ITStatus UART_GetITStatus(UART_TypeDef* UARTx, u16 UART_IT)
+{
+ if((UARTx->MIS & UART_IT) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_ClearITPendingBit
+* Description : Clears the UARTx’s interrupt pending bits.
+* Input : - UARTx: where x can be 0,1or 2 to select the UART peripheral.
+* - UART_IT: specifies the interrupt pending bit to clear.
+* More than one interrupt can be cleared using the “|” operator.
+* This parameter can be:
+* - UART_IT_OverrunError: Overrun Error interrupt
+* - UART_IT_BreakError: Break Error interrupt
+* - UART_IT_ParityError: Parity Error interrupt
+* - UART_IT_FrameError: Frame Error interrupt
+* - UART_IT_ReceiveTimeOut: Receive Time Out interrupt
+* - UART_IT_Transmit: Transmit interrupt
+* - UART_IT_Receive: Receive interrupt
+* - UART_IT_DSR: DSR interrupt
+* - UART_IT_DCD: DCD interrupt
+* - UART_IT_CTS: CTS interrupt
+* - UART_IT_RI: RI interrupt
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_ClearITPendingBit(UART_TypeDef* UARTx, u16 UART_IT)
+{
+ /* Clear the specified interrupt */
+ UARTx->ICR = UART_IT;
+}
+
+/*******************************************************************************
+* Function Name : UART_IrDALowPowerConfig
+* Description : Sets the IrDA low power mode
+* Input : - IrDAx: where x can be 0,1 or 2 to select the UART/IrDA peripheral.
+* - NewState: new state of the UARTIrDA peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_IrDALowPowerConfig(u8 IrDAx, FunctionalState NewState)
+{
+ UART_TypeDef* UARTx;
+
+ switch(IrDAx)
+ {
+ case IrDA0: UARTx = UART0;
+ break;
+ case IrDA1: UARTx = UART1;
+ break;
+ case IrDA2: UARTx = UART2;
+ break;
+ }
+
+ if (NewState == ENABLE)
+ {
+ UARTx->CR |= IrDA_LowPower_Enable_Mask;
+ }
+ else
+ {
+ UARTx->CR &= IrDA_LowPower_Disable_Mask;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_IrDASetCounter
+* Description : Sets the IrDA counter divisor value.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART/IrDA peripheral.
+* - IrDA_Counter: IrDA counter divisor new value n low power mode(Hz).
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_IrDASetCounter(u8 IrDAx, u32 IrDA_Counter)
+{
+ UART_TypeDef* UARTx;
+ u32 APBClock;
+ switch(IrDAx)
+ {
+ case IrDA0: UARTx = UART0;
+ break;
+ case IrDA1: UARTx = UART1;
+ break;
+ case IrDA2: UARTx = UART2;
+ break;
+ }
+ /* Get the APB frequency */
+ APBClock = (SCU_GetPCLKFreqValue())*1000;
+ /* Determine the Counter Divisor part */
+ UARTx->ILPR = (((APBClock*10) / ( IrDA_Counter)) + 5 )/10;
+ }
+
+/*******************************************************************************
+* Function Name : UART_IrDACmd
+* Description : Enables or disables the UARTx’s IrDA interface.
+* Input : - IrDAx: where x can be 0,1 or 2 to select the UART/IrDA peripheral
+* - NewState: new state of the UARTx peripheral.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_IrDACmd(u8 IrDAx, FunctionalState NewState)
+{
+ UART_TypeDef* UARTx;
+
+ switch(IrDAx)
+ {
+ case IrDA0: UARTx = UART0;
+ break;
+ case IrDA1: UARTx = UART1;
+ break;
+ case IrDA2: UARTx = UART2;
+ break;
+ }
+ if(NewState == ENABLE)
+ {
+ /* Enable the IrDA mode of the specified UART */
+ UARTx->CR |= UART_IrDA_Enable_Mask;
+ }
+ else
+ {
+ /* Disable the IrDA mode of the specified UART */
+ UARTx->CR &= UART_IrDA_Disable_Mask;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_SendData
+* Description : Transmits signle Byte of data through the UARTx peripheral.
+* Input : - UARTx: where x can be 0,1 or 2 to select the UART peripheral.
+* - Data: the byte to transmit
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_SendData(UART_TypeDef* UARTx, u8 Data)
+{
+ /* Transmit one byte */
+ UARTx->DR = Data;
+}
+
+/*******************************************************************************
+* Function Name : UART_ReceiveData
+* Description : Returns the most recent received Byte by the UARTx peripheral.
+* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
+* Output : None
+* Return : The received data
+*******************************************************************************/
+u8 UART_ReceiveData(UART_TypeDef* UARTx)
+{
+ /* Receive one byte */
+ return ((u8)UARTx->DR);
+}
+
+/*******************************************************************************
+* Function Name : UART_SendBreak
+* Description : Transmits break characters.
+* Input : UARTx: where x can be 0,1 or 2 to select the UART peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_SendBreak(UART_TypeDef* UARTx)
+{
+ /* Send break characters */
+ UARTx->LCR |= UART_BreakChar_Mask;
+}
+
+/*******************************************************************************
+* Function Name : UART_RTSConfig
+* Description : Sets or Resets the RTS signal
+* Input : - LevelState: new state of the RTS signal for UART0 only.
+* This parameter can be: LowLevel or HighLevel
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_RTSConfig(UART_LevelTypeDef LevelState)
+{
+ if(LevelState == LowLevel)
+ {
+ UART0->CR |= UART_RTS_LowLevel_Mask;
+ }
+ else
+ {
+ UART0->CR &= UART_RTS_HighLevel_Mask;
+ }
+}
+
+/*******************************************************************************
+* Function Name : UART_DTRConfig
+* Description : Sets or Resets the DTR signal for UART0 only
+* Input : - LevelState: new state of the DTR signal.
+* This parameter can be: LowLevel or HighLevel
+* Output : None
+* Return : None
+*******************************************************************************/
+void UART_DTRConfig(UART_LevelTypeDef LevelState)
+{
+ if(LevelState == LowLevel)
+ {
+ UART0->CR |= UART_DTR_LowLevel_Mask;
+ }
+ else
+ {
+ UART0->CR &= UART_DTR_HighLevel_Mask;
+ }
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_vic.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_vic.c new file mode 100644 index 0000000..fecb890 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_vic.c @@ -0,0 +1,830 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_vic.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the VIC software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. AS
+* A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_vic.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+#define VIC_REGISTER_NUMBER 16
+#define VIC_PROTECTION_ENABLE_MASK 0x1
+#define VIC_PROTECTION_DISABLE_MASK 0xFFFFFFFE
+#define VIC_VECTOR_ENABLE_MASK 0x20
+#define VIC_IT_SOURCE_MASK 0xFFFFFFE0
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+
+static void VIC_ITModeConfig(u16 VIC_Source, VIC_ITLineMode VIC_LineMode);
+static void VIC_ISRVectAddConfig(u16 VIC_Source, u16 VIC_Priority, \
+ void (*VIC_VectAddress)(void));
+static void VIC_VectEnableConfig(u16 VIC_Source, u16 VIC_Priority);
+static void VIC_ITSourceConfig(u16 VIC_Source, u16 VIC_Priority);
+
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/*******************************************************************************
+* Function Name : VIC_DeInit
+* Description : Deinitialize the VIC module registers to their default reset
+* values.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void VIC_DeInit(void)
+{
+ SCU_AHBPeriphReset(__VIC, ENABLE); /* VIC peripheral is under Reset */
+ SCU_AHBPeriphReset(__VIC, DISABLE); /* VIC peripheral Reset off */
+}
+
+/*******************************************************************************
+* Function Name : VIC_GetIRQStatus
+* Description : Get the status of interrupts after IRQ masking.
+* Input : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Output : None
+* Return : The status of the IRQ interrupt after masking (SET or RESET).
+*******************************************************************************/
+FlagStatus VIC_GetIRQStatus(u16 VIC_Source)
+{
+ u32 VIC_Mask = 1;
+ if (VIC_Source < VIC_REGISTER_NUMBER)
+ {
+ if ((VIC0->ISR | VIC_Mask << VIC_Source) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+ else
+ {
+ if ((VIC1->ISR | VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER)) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_GetFIQStatus
+* Description : Get the status of interrupts after FIQ masking
+* Input : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Output : None
+* Return : The status of the FIQ interrupt after masking (SET or RESET)
+*******************************************************************************/
+FlagStatus VIC_GetFIQStatus(u16 VIC_Source)
+{
+ u32 VIC_Mask = 1;
+ if (VIC_Source < VIC_REGISTER_NUMBER)
+ {
+ if ((VIC0->RINTSR | VIC_Mask << VIC_Source) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+ else
+ {
+ if ((VIC1->RINTSR | VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER)) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_GetSourceITStatus
+* Description : Get the status of the source interrupts before masking.
+* Input : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Output : None
+* Return : The status of the source interrupt before masking
+*******************************************************************************/
+FlagStatus VIC_GetSourceITStatus(u16 VIC_Source)
+{
+ u32 VIC_Mask = 1;
+ if (VIC_Source < VIC_REGISTER_NUMBER)
+ {
+ if ((VIC0->FSR | VIC_Mask << VIC_Source) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+ else
+ {
+ if ((VIC1->FSR | VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER)) != RESET)
+ return SET;
+ else
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_ITModeConfig
+* Description : Select the type of interrupt (IRQ or FIQ)
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : VIC_LineMode :specifies the type of interrupt of the source
+* line. This parameter can be one of the following values:
+* - VIC_IRQ: the correspondent line is configured as IRQ.
+* - VIC_FIQ: the correspondent line is configured as FIQ.
+* Output : None
+* Return : None
+*******************************************************************************/
+static void VIC_ITModeConfig(u16 VIC_Source, VIC_ITLineMode VIC_LineMode)
+{
+ u32 VIC_Mask = 1;
+
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ {
+ if (VIC_LineMode == VIC_IRQ)
+ VIC0->INTSR &= ~(VIC_Mask << VIC_Source);
+ else /* VIC_LineMode == VIC_FIQ */
+ VIC0->INTSR |= (VIC_Mask << VIC_Source);
+ }
+ else /* VIC1 */
+ {
+ if (VIC_LineMode == VIC_IRQ)
+ VIC1->INTSR &= ~(VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ else /* VIC_LineMode == VIC_FIQ */
+ VIC1->INTSR |= (VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_ITCmd
+* Description : Enable or disable the interrupt request lines.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : FMI_NewState: specifies the line status.
+* This parameter can be one of the following values:
+* - ENABLE: The line is enabled.
+* - DISABLE: The line is disabled.
+* Output : None
+* Return : None
+*******************************************************************************/
+void VIC_ITCmd(u16 VIC_Source, FunctionalState VIC_NewState)
+{
+ u32 VIC_Mask = 1;
+
+ if (VIC_NewState == ENABLE)
+ {
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->INTER |= (VIC_Mask << VIC_Source);
+ else /* VIC1 */
+ VIC1->INTER |= (VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ }
+ else /* VIC_NewState == DISABLE */
+ {
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->INTECR |= (VIC_Mask << VIC_Source);
+ else /* VIC1 */
+ VIC1->INTECR |= (VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_SWITCmd
+* Description : Generate a software interrupt for the specific source
+* interrupt.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : FMI_NewState: specifies the software interrupt status.
+* This parameter can be one of the following values:
+* - ENABLE: The software interrupt is enabled.
+* - DISABLE: The software interrupt is disabled.
+* Output : None
+* Return : None
+*******************************************************************************/
+void VIC_SWITCmd(u16 VIC_Source, FunctionalState VIC_NewState)
+{
+ u32 VIC_Mask = 1;
+
+ if (VIC_NewState == ENABLE)
+ {
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->SWINTR |= (VIC_Mask << VIC_Source);
+ else /* VIC1 */
+ VIC1->SWINTR |= (VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ }
+ else /* VIC_NewState == DISABLE */
+ {
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->SWINTCR = (VIC_Mask << VIC_Source);
+ else /* VIC1 */
+ VIC1->SWINTCR = (VIC_Mask << (VIC_Source - VIC_REGISTER_NUMBER));
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_ProtectionCmd
+* Description : Enable or Disable the register access protection.
+* Input : FMI_NewState: specifies the protection status.
+* This parameter can be one of the following values:
+* - ENABLE: The protection is enabled.
+* - DISABLE: The protection is disabled.
+* Output : None
+* Return : None
+*******************************************************************************/
+void VIC_ProtectionCmd(FunctionalState VIC_NewState)
+{
+ if (VIC_NewState == ENABLE)
+ {
+ VIC0->PER |= VIC_PROTECTION_ENABLE_MASK;
+ VIC1->PER |= VIC_PROTECTION_ENABLE_MASK;
+ }
+ else
+ {
+ VIC0->PER &= VIC_PROTECTION_DISABLE_MASK;
+ VIC1->PER &= VIC_PROTECTION_DISABLE_MASK;
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_GetCurrentISRAdd
+* Description : Get the address of the current active ISR.
+* Input : VICx: specifies the VIC peripheral
+* This parameter can be one of the following values:
+* - VIC0: To select VIC0.
+* - VIC1: To select VIC1.
+* Output : None
+* Return : The Address of the active ISR.
+*******************************************************************************/
+u32 VIC_GetCurrentISRAdd(VIC_TypeDef* VICx)
+{
+ return VICx->VAR;
+}
+
+/*******************************************************************************
+* Function Name : VIC_ISRVectAddConfig
+* Description : Configuration of the ISR vector address.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : VIC_Priority: specifies the priority of the interrupt.
+* It can be a value from 0 to 15. 0 is the highest priority.
+* Input3 : void (*VIC_VectAddress)(void): specifies the ISR vector
+* address pointer.
+* Output : None
+* Return : None
+*******************************************************************************/
+static void VIC_ISRVectAddConfig(u16 VIC_Source, u16 VIC_Priority, \
+ void (*VIC_VectAddress)(void))
+{
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->VAiR[VIC_Priority] = (u32)VIC_VectAddress;
+ else /* VIC1 */
+ VIC1->VAiR[VIC_Priority] = (u32)VIC_VectAddress;
+}
+
+/*******************************************************************************
+* Function Name : VIC_GetISRVectAdd
+* Description : Get the ISR vector address of the correspondent line.
+* Input : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Output : None
+* Return : The correspondent ISR vector address.
+*******************************************************************************/
+u32 VIC_GetISRVectAdd(u16 VIC_Source)
+{
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ return VIC0->VAiR[VIC_Source];
+ else /* VIC1 */
+ return VIC1->VAiR[VIC_Source - VIC_REGISTER_NUMBER];
+}
+
+/*******************************************************************************
+* Function Name : VIC_VectEnableConfig
+* Description : Enable the vector interrupt.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : VIC_Priority: specifies the priority of the interrupt.
+* It can be a value from 0 to 15. 0 is the highest priority.
+* Output : None
+* Return : None
+*******************************************************************************/
+static void VIC_VectEnableConfig(u16 VIC_Source, u16 VIC_Priority)
+{
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ VIC0->VCiR[VIC_Priority] |= VIC_VECTOR_ENABLE_MASK;
+ else /* VIC1 */
+ VIC1->VCiR[VIC_Priority] |= VIC_VECTOR_ENABLE_MASK;
+}
+
+/*******************************************************************************
+* Function Name : VIC_ITSourceConfig
+* Description : Select the interrupt source.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : VIC_Priority: specifies the priority of the interrupt.
+* It can be a value from 0 to 15. 0 is the highest priority.
+* Output : None
+* Return : None
+*******************************************************************************/
+static void VIC_ITSourceConfig(u16 VIC_Source, u16 VIC_Priority)
+{
+ if (VIC_Source < VIC_REGISTER_NUMBER) /* VIC0 */
+ {
+ VIC0->VCiR[VIC_Priority] &= VIC_IT_SOURCE_MASK;
+ VIC0->VCiR[VIC_Priority] |= VIC_Source;
+ }
+ else /* VIC1 */
+ {
+ VIC1->VCiR[VIC_Priority] &= VIC_IT_SOURCE_MASK;
+ VIC1->VCiR[VIC_Priority] |= VIC_Source - VIC_REGISTER_NUMBER;
+ }
+}
+
+/*******************************************************************************
+* Function Name : VIC_Config
+* Description : Configure the ISR, the line, the mode and the priority for
+* each interrupt source line.
+* Input1 : VIC_Source: specifies the number of the source line.
+* This parameter can be one of the following values:
+* - WDG_ITLine : VIC source 0
+* - SW_ITLine : VIC source 1
+* - ARMRX_ITLine : VIC source 2
+* - ARMTX_ITLine : VIC source 3
+* - TIM0_ITLine : VIC source 4
+* - TIM1_ITLine : VIC source 5
+* - TIM2_ITLine : VIC source 6
+* - TIM3_ITLine : VIC source 7
+* - USBHP_ITLine : VIC source 8
+* - USBLP_ITLine : VIC source 9
+* - SCU_ITLine : VIC source 10
+* - ENET_ITLine : VIC source 11
+* - DMA_ITLine : VIC source 12
+* - CAN_ITLine : VIC source 13
+* - MC_ITLine : VIC source 14
+* - ADC_ITLine : VIC source 15
+* - UART0_ITLine : VIC source 16
+* - UART1_ITLine : VIC source 17
+* - UART2_ITLine : VIC source 18
+* - I2C0_ITLine : VIC source 19
+* - I2C1_ITLine : VIC source 20
+* - SSP0_ITLine : VIC source 21
+* - SSP1_ITLine : VIC source 22
+* - LVD_ITLine : VIC source 23
+* - RTC_ITLine : VIC source 24
+* - WIU_ITLine : VIC source 25
+* - EXTIT0_ITLine: VIC source 26
+* - EXTIT1_ITLine: VIC source 27
+* - EXTIT2_ITLine: VIC source 28
+* - EXTIT3_ITLine: VIC source 29
+* - USBWU_ITLine : VIC source 30
+* - PFQBC_ITLine : VIC source 31
+* Input2 : VIC_LineMode :specifies the type of interrupt of the source
+* line. This parameter can be one of the following values:
+* - VIC_IRQ: the correspondent line is configured as IRQ.
+* - VIC_FIQ: the correspondent line is configured as FIQ.
+* Input3 : VIC_Priority: specifies the priority of the interrupt.
+* It can be a value from 0 to 15. 0 is the highest priority.
+* Output : None
+* Return : None
+*******************************************************************************/
+void VIC_Config(u16 VIC_Source, VIC_ITLineMode VIC_LineMode, u8 VIC_Priority)
+{
+ switch (VIC_Source)
+ {
+ case 0: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, WDG_IRQHandler);
+ break;
+
+ case 1: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, SW_IRQHandler);
+ break;
+
+ case 2: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, ARMRX_IRQHandler);
+ break;
+
+ case 3: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, ARMTX_IRQHandler);
+ break;
+
+ case 4: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, TIM0_IRQHandler);
+ break;
+
+ case 5: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, TIM1_IRQHandler);
+ break;
+
+ case 6: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, TIM2_IRQHandler);
+ break;
+
+ case 7: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, TIM3_IRQHandler);
+ break;
+
+ case 8: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, USBHP_IRQHandler);
+ break;
+
+ case 9: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, USBLP_IRQHandler);
+ break;
+
+ case 10: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, SCU_IRQHandler);
+ break;
+
+ case 11: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, ENET_IRQHandler);
+ break;
+
+ case 12: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, DMA_IRQHandler);
+ break;
+
+ case 13: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, CAN_IRQHandler);
+ break;
+
+ case 14: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, MC_IRQHandler);
+ break;
+
+ case 15: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, ADC_IRQHandler);
+ break;
+
+ case 16: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, UART0_IRQHandler);
+ break;
+
+ case 17: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, UART1_IRQHandler);
+ break;
+
+ case 18: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, UART2_IRQHandler);
+ break;
+
+ case 19: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, I2C0_IRQHandler);
+ break;
+
+ case 20: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, I2C1_IRQHandler);
+ break;
+
+ case 21: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, SSP0_IRQHandler);
+ break;
+
+ case 22: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, SSP1_IRQHandler);
+ break;
+
+ case 23: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, LVD_IRQHandler);
+ break;
+
+ case 24: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, RTC_IRQHandler);
+ break;
+
+ case 25: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, WIU_IRQHandler);
+ break;
+
+ case 26: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, EXTIT0_IRQHandler);
+ break;
+
+ case 27: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, EXTIT1_IRQHandler);
+ break;
+
+ case 28: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, EXTIT2_IRQHandler);
+ break;
+
+ case 29: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, EXTIT3_IRQHandler);
+ break;
+
+ case 30: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, USBWU_IRQHandler);
+ break;
+
+ case 31: VIC_ISRVectAddConfig(VIC_Source, VIC_Priority, PFQBC_IRQHandler);
+ break;
+
+ default: break;
+ }
+ VIC_ITModeConfig(VIC_Source, VIC_LineMode);
+ VIC_VectEnableConfig(VIC_Source, VIC_Priority);
+ VIC_ITSourceConfig(VIC_Source, VIC_Priority);
+}
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wdg.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wdg.c new file mode 100644 index 0000000..f933635 --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wdg.c @@ -0,0 +1,277 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_wdg.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the WDG software functions.
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_wdg.h"
+#include "91x_scu.h"
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+
+
+/* WDG End of Count interrupt Flag */
+#define WDG_FLAG_EC 0x0001
+
+
+/* WDG End of Count interrupt request */
+#define WDG_IT_EC 0x0001
+
+
+
+/* WDG Start/Stop counter */
+#define WDG_Counter_Start 0x0002
+#define WDG_Counter_Stop 0xFFFD
+
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Registers reset value */
+/* Private function prototypes -----------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************
+* Function Name : WDG_DeInit
+* Description : Deinitializes the WDG peripheral registers to their default
+* reset values.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_DeInit(void)
+{
+
+ SCU_APBPeriphReset(__WDG, ENABLE); /*WDG peripheral under Reset */
+ SCU_APBPeriphReset(__WDG, DISABLE); /*WDG peripheral Reset off*/
+
+}
+
+/*******************************************************************************
+* Function Name : WDG_StructInit
+* Description : Fills the WDG_InitTypeDef structure member with its reset
+* value.
+* Input : WDG_InitStruct : pointer to a WDG_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_StructInit(WDG_InitTypeDef *WDG_InitStruct)
+{
+ /* Select the Watchdog running mode*/
+ WDG_InitStruct->WDG_Mode = WDG_Mode_Timer;
+
+ /* Select the source clock */
+ WDG_InitStruct-> WDG_ClockSource = WDG_ClockSource_Apb;
+
+ /* Initialize Prescaler */
+ WDG_InitStruct->WDG_Prescaler =0xFF;
+
+ /* Initialize Preload */
+ WDG_InitStruct->WDG_Preload =0xFFFF;
+
+
+}
+
+/*******************************************************************************
+* Function Name : WDG_Init
+* Description : Initializes WDG peripheral according to the specified
+* parameters in the WDG_InitStruct.
+* Input : WDG_InitStruct: pointer to a WDG_InitTypeDef structure that
+* contains the configuration information for the WDG peripheral.
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_Init(WDG_InitTypeDef* WDG_InitStruct)
+{
+
+
+ if(WDG_InitStruct->WDG_ClockSource == WDG_ClockSource_Apb)
+ {
+ /* Select The APB clock as clock source */
+ WDG->CR &= WDG_ClockSource_Apb;
+ }
+
+ else
+ {
+ /* Select the RTC clock as source */
+ WDG->CR |= WDG_ClockSource_Rtc ;
+ }
+
+
+ /* Configure WDG Prescaler register value */
+ WDG->PR = WDG_InitStruct->WDG_Prescaler;
+
+ /* Configure WDG Pre-load register value */
+ WDG->VR = WDG_InitStruct->WDG_Preload ;
+
+
+ if(WDG_InitStruct->WDG_Mode == WDG_Mode_Timer)
+ {
+ /* Select Timer mode */
+ WDG->CR &= WDG_Mode_Timer;
+ }
+ else
+ {
+ /* Select WDG mode */
+ WDG->CR |= WDG_Mode_Wdg ;
+ }
+
+
+}
+
+/*******************************************************************************
+* Function Name : WDG_Cmd
+* Description : Enables or disables the WDG peripheral.
+* Input : NewState: new state of the WDG peripheral (Newstate can be
+* ENABLE or DISABLE)
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_Cmd(FunctionalState NewState )
+{
+ if((WDG->CR & WDG_Mode_Wdg) == 0)
+ {
+ /* Timer mode */
+ if(NewState == ENABLE)
+ {
+ /* Start timer by setting SC bit in Control register */
+ WDG->CR |= WDG_Counter_Start;
+ }
+ else
+ {
+ /* Stop timer by clearning SC bit in Control register */
+ WDG->CR &= WDG_Counter_Stop;
+ }
+ }
+ else
+ {
+ /* Watchdog mode */
+ if(NewState == ENABLE)
+ {
+ WDG->KR = WDG_KeyValue1;
+ WDG->KR = WDG_KeyValue2;
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : WDG_ITConfig
+* Description : Enables or disables the WDG End of Count(EC) interrupt.
+* Input : Newstate: new state of the End of Count(EC) WDG interrupt.
+* This parameter can be: ENABLE or DISABLE.
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_ITConfig(FunctionalState NewState)
+{
+ if(NewState == ENABLE)
+ {
+ /* Enable the End of Count interrupt */
+ WDG->MR |= WDG_IT_EC;
+ }
+ else
+ {
+ /* Disable the End of Count interrupt */
+ WDG->MR &= ~WDG_IT_EC;
+ }
+}
+
+/*******************************************************************************
+* Function Name : WDG_GetCounter
+* Description : Gets the WDG’s current counter value.
+* Input : None
+* Output : None
+* Return : The WDG current counter value
+*******************************************************************************/
+u16 WDG_GetCounter(void)
+{
+ return WDG->CNT;
+}
+
+
+
+
+/*******************************************************************************
+* Function Name : WDG_GetITStatus
+* Description : Checks whether the WDG End of Count(EC) interrupt is occured or not.
+* Input : None
+* Output : None
+* Return : The new state of WDG_IT (SET or RESET).
+*******************************************************************************/
+ITStatus WDG_GetITStatus(void)
+{
+ if(((WDG->SR & WDG_IT_EC) != RESET )&&((WDG->MR & WDG_IT_EC) != RESET ))
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : WDG_ClearITPendingBit
+* Description : Clears the WDG's End of Count(EC) interrupt pending bit.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_ClearITPendingBit(void)
+{
+ /* Clear the EC pending bit */
+ WDG->SR &= ~WDG_IT_EC;
+
+}
+
+/*******************************************************************************
+* Function Name : WDG_ClearFlag
+* Description : Clears the WDG's End of Count(EC) Flag.
+* Input : None
+* Output : None
+* Return : None
+*******************************************************************************/
+void WDG_ClearFlag(void)
+{
+ /* Clear the EC Flag */
+
+ WDG->SR &= ~WDG_FLAG_EC;
+
+}
+
+
+/*******************************************************************************
+* Function Name : WDG_GetFlagStatus
+* Description : Checks whether the WDG End of Count(EC) flag is set or not.
+* Input : None
+* Output : None
+* Return : The new state of the WDG_FLAG (SET or RESET).
+*******************************************************************************/
+FlagStatus WDG_GetFlagStatus(void)
+{
+ if((WDG->SR & WDG_FLAG_EC) != RESET )
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
diff --git a/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wiu.c b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wiu.c new file mode 100644 index 0000000..3154a3c --- /dev/null +++ b/uc_str912/prj_blinky_simple_startup/str91x_lib/src/91x_wiu.c @@ -0,0 +1,190 @@ +/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name : 91x_wiu.c
+* Author : MCD Application Team
+* Date First Issued : 05/18/2006 : Version 1.0
+* Description : This file provides all the WIU software functions.
+**********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+**********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS WITH
+* CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, INDIRECT
+* OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT
+* OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
+* CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*********************************************************************************/
+
+/* Standard include ----------------------------------------------------------*/
+#include "91x_wiu.h"
+#include "91x_scu.h"
+
+/* Include of other module interface headers ---------------------------------*/
+/* Local includes ------------------------------------------------------------*/
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+/* Private function prototypes -----------------------------------------------*/
+/* Interface functions -------------------------------------------------------*/
+/* Private functions ---------------------------------------------------------*/
+/******************************************************************************
+* Function Name : WIU_Init
+* Description : Initializes the WIU unit according to the specified parameters
+* in the WIU_InitTypeDef structure.
+* Input : WIU_InitStruct: pointer to a WIU_InitTypeDef structure that
+* contains the configuration information for the WIU peripheral.
+* Output : None
+* Return : None
+******************************************************************************/
+void WIU_Init(WIU_InitTypeDef* WIU_InitStruct)
+{
+ /* select the Wake-up line to be used */
+ WIU->MR |= WIU_InitStruct->WIU_Line;
+
+ /* configure the triggering edge */
+ if(WIU_InitStruct->WIU_TriggerEdge == WIU_RisingEdge)
+ {
+ /* trigger on rising edge */
+ WIU->TR |= WIU_InitStruct->WIU_Line;
+ }
+ else
+ {
+ /* trigger on falling edge */
+ WIU->TR &= ~WIU_InitStruct->WIU_Line;
+ }
+
+ if(WIU_InitStruct->WIU_Mode == WIU_Mode_SWInterrupt)
+ {
+ /* enable interrupt mode */
+ WIU->CTRL |= WIU_Mode_Interrupt;
+
+ /* set the corresponding WUINT bit*/
+ WIU->INTR |= WIU_InitStruct->WIU_Line;
+ }
+ else
+ {
+ /* configure the WIU mode */
+ WIU->CTRL |= WIU_InitStruct->WIU_Mode;
+ }
+}
+
+/******************************************************************************
+* Function Name : WIU_DeInit
+* Description : Deinitializes the WIU registers to their default reset values.
+* Input : None
+* Output : None
+* Return : None
+******************************************************************************/
+void WIU_DeInit(void)
+{
+ /* initialize the WIU registers to their reset value */
+ SCU_APBPeriphReset(__WIU, ENABLE);
+ SCU_APBPeriphReset(__WIU, DISABLE);
+}
+
+/******************************************************************************
+* Function Name : WIU_StructInit
+* Description : Fills in a WIU_InitTypeDef structure with the reset value of
+* each parameter.
+* Input : WIU_InitStruct : pointer to a WIU_InitTypeDef structure
+* which will be initialized.
+* Output : None
+* Return : None
+******************************************************************************/
+void WIU_StructInit(WIU_InitTypeDef* WIU_InitStruct)
+{
+ /* initialize the WIU_InitStruct fields to their reset values */
+ WIU_InitStruct->WIU_Mode = 0x0 ;
+ WIU_InitStruct->WIU_Line = 0x0 ;
+ WIU_InitStruct->WIU_TriggerEdge = WIU_FallingEdge ;
+}
+
+
+/*******************************************************************************
+* Function Name : WIU_GenerateSWInterrupt
+* Description : Generates a Software interrupt.
+* Input : - WIU_Line: specifies the WIU lines to be enabled or
+* disabled. This parameter can be:
+* - WIU_Linex: External interrupt line x where x(0..31)
+* Output : None
+* Return : None
+*******************************************************************************/
+void WIU_GenerateSWInterrupt(u32 WIU_Line)
+{
+ WIU->INTR |= WIU_Line;
+}
+
+/*******************************************************************************
+* Function Name : WIU_GetFlagStatus
+* Description : Checks whether the specified WIU line flag is set or not.
+* Input : - WIU_Line: specifies the WIU lines flag to check.
+* This parameter can be:
+* - WIU_Linex: External interrupt line x where x(0..31)
+* Output : None
+* Return : The new state of WIU_Line (SET or RESET).
+*******************************************************************************/
+FlagStatus WIU_GetFlagStatus(u32 WIU_Line)
+{
+ if((WIU->PR & WIU_Line) != RESET)
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : WIU_ClearFlag
+* Description : Clears the WIU’s line pending flags.
+* Input : - WIU_Line: specifies the WIU lines flags to clear.
+* This parameter can be:
+* - WIU_Linex: External interrupt line x where x(0..31)
+* Output : None
+* Return : None
+*******************************************************************************/
+void WIU_ClearFlag(u32 WIU_Line)
+{
+ WIU->PR = WIU_Line;
+}
+
+/*******************************************************************************
+* Function Name : WIU_GetITStatus
+* Description : Checks whether the specified WIU line is asserted or not.
+* Input : - WIU_Line: specifies the WIU lines to check.
+* This parameter can be:
+* - WIU_Linex: External interrupt line x where x(0..31)
+* Output : None
+* Return : The new state of WIU_Line (SET or RESET).
+*******************************************************************************/
+ITStatus WIU_GetITStatus(u32 WIU_Line)
+{
+ if(((WIU->PR & WIU_Line) != RESET)&& ((WIU->MR & WIU_Line) != RESET))
+ {
+ return SET;
+ }
+ else
+ {
+ return RESET;
+ }
+}
+
+/*******************************************************************************
+* Function Name : WIU_ClearITPendingBit
+* Description : Clears the WIU’s line pending bits.
+* Input : - WIU_Line: specifies the WIU lines to clear.
+* This parameter can be:
+* - WIU_Linex: External interrupt line x where x(0..31)
+* Output : None
+* Return : None
+*******************************************************************************/
+void WIU_ClearITPendingBit(u32 WIU_Line)
+{
+ WIU->PR = WIU_Line;
+}
+
+
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
|
