initial commit

4 files changed, 999 insertions, 0 deletions

diff --git a/uc_str912/prj_blinky_simple_startup/src/main.c b/uc_str912/prj_blinky_simple_startup/src/main.c
new file mode 100644
index 0000000..61ab08c
--- /dev/null
+++ b/uc_str912/prj_blinky_simple_startup/src/main.c
@@ -0,0 +1,102 @@
+/******************** (C) COPYRIGHT 2006 STMicroelectronics ********************
+* File Name          : main.c
+* Author             : MCD Application Team
+* Date First Issued  : 05/18/2006 : Version 1.0
+* Description        : Main program body
+********************************************************************************
+* History:
+* 05/24/2006 : Version 1.1
+* 05/18/2006 : Version 1.0
+********************************************************************************
+* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+*******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "91x_lib.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+  GPIO_InitTypeDef GPIO_InitStructure;
+
+/* Private function prototypes -----------------------------------------------*/
+  void SCU_Configuration(void);
+  static void Delay(u32 nCount);
+
+/* Private functions ---------------------------------------------------------*/
+/*******************************************************************************
+* Function Name  : main
+* Description    : Main program
+* Input          : None
+* Output         : None
+* Return         : None
+*******************************************************************************/
+int main()
+{
+  /* Configure the system clocks */
+  SCU_Configuration();
+
+/* GPIO Configuration --------------------------------------------------------*/
+  GPIO_DeInit(GPIO8);
+  GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_2 | GPIO_Pin_4 | GPIO_Pin_6;
+  GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ;
+  GPIO_Init (GPIO8, &GPIO_InitStructure);
+
+  while(1)
+  {
+    /* Turn OFF leds connected to P9.0, P9.1, P9.2 and P9.3 pins */
+    GPIO_WriteBit(GPIO8, GPIO_Pin_0, Bit_SET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_2, Bit_SET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_4, Bit_SET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_6, Bit_SET);
+    Delay(0x7FFFF);
+    /* Turn ON leds connected to P9.0, P9.1, P9.2 and P9.3 pins */
+    GPIO_WriteBit(GPIO8, GPIO_Pin_0, Bit_RESET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_2, Bit_RESET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_4, Bit_RESET);
+    Delay(0x7FFFF);
+    GPIO_WriteBit(GPIO8, GPIO_Pin_6, Bit_RESET);
+    Delay(0x7FFFF);
+  }
+}
+
+/*******************************************************************************
+* Function Name  : SCU_Configuration
+* Description    : Configures the system clocks.
+* Input          : None
+* Output         : None
+* Return         : None
+*******************************************************************************/
+void SCU_Configuration(void)
+{
+  /* Enable the __GPIO9 */
+  SCU_APBPeriphClockConfig(__GPIO8 ,ENABLE);
+}
+
+/*******************************************************************************
+* Function Name  : Delay
+* Description    : Inserts a delay time.
+* Input          : nCount: specifies the delay time length.
+* Output         : None
+* Return         : None
+*******************************************************************************/
+static void Delay(u32 nCount)
+{
+  u32 j = 0;
+
+  for(j = nCount; j != 0; j--);
+}
+/******************* (C) COPYRIGHT 2006 STMicroelectronics *****END OF FILE****/
+
diff --git a/uc_str912/prj_blinky_simple_startup/src/startup.s b/uc_str912/prj_blinky_simple_startup/src/startup.s
new file mode 100644
index 0000000..cef54d8
--- /dev/null
+++ b/uc_str912/prj_blinky_simple_startup/src/startup.s
@@ -0,0 +1,233 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author			: Spencer Oliver

+*	Web     		: www.anglia-designs.com

+*

+***********************************************************************************/

+

+/**** Startup Code (executed after Reset) ****/

+

+/* Frequency values kHz */

+/* set to suit target hardware */

+

+	.equ	FOSC,			25000

+	

+/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */

+

+	.equ	Mode_USR,		0x10

+	.equ	Mode_FIQ,		0x11

+	.equ	Mode_IRQ,		0x12

+	.equ	Mode_SVC,		0x13

+	.equ	Mode_ABT,		0x17

+	.equ	Mode_UND,		0x1B

+	.equ	Mode_SYS,		0x1F			/* available on ARM Arch 4 and later */

+

+	.equ	I_Bit,			0x80			/* when I bit is set, IRQ is disabled */

+	.equ	F_Bit,			0x40			/* when F bit is set, FIQ is disabled */

+

+	.equ	SRAM32,			0x00

+	.equ	SRAM64,			0x08

+	.equ	SRAM96,			0x10

+

+/* --- System memory locations */

+

+	.equ	SCRO_AHB_UMB,		0x5C002034		/* System configuration register 0 (unbuffered) */

+

+	.equ	FMI_BASE_UMB,		0x54000000		/* Flash FMI base address (unbuffered) */

+	.equ	BBSR_off_addr,		0x00

+	.equ	NBBSR_off_addr,		0x04

+	.equ	BBADR_off_addr,		0x0C

+	.equ	NBBADR_off_addr,	0x10

+	.equ	CR_off_addr,		0x18

+

+.ifndef LIBUFF

+	.equ	LIBUFF, 0

+.endif

+

+/* Startup Code must be linked first at Address at which it expects to run. */

+

+	.text

+	.arm

+	.section .init, "ax"

+	

+	.global _start

+	.global _Main_Crystal

+

+/* After remap this will be our reset handler */

+

+_start:

+		LDR     pc, =NextInst

+NextInst:

+

+		NOP		/* Wait for OSC stabilization */

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+		NOP

+

+/* Enable buffered mode */

+

+.if LIBUFF

+		MRC		p15, 0, r0, c1, c0, 0		/* Read CP15 register 1 into r0 */

+		ORR		r0, r0, #0x8				/* Enable Write Buffer on AHB */

+		MCR		p15, 0, r0, c1, c0, 0 		/* Write CP15 register 1 */

+.endif

+

+/* Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, */

+/* when the bank 0 is the boot bank, then enable the Bank 1. */

+

+		LDR		r0, =FMI_BASE_UMB

+		LDR		r1, =0x4					/* configure 512KB Boot bank 0 */

+		STR		r1, [r0, #BBSR_off_addr]

+

+		LDR		r1, =0x2					/* configure 32KB Non Boot bank 1 */

+		STR		r1, [r0, #NBBSR_off_addr]

+

+		LDR		r1, =(0x00000000 >> 2)		/* Boot Bank Base Address */

+		STR		r1, [r0, #BBADR_off_addr]

+

+		LDR		r1, =(0x00080000 >> 2)		/* Non Boot Bank Base Address */

+		STR		r1, [r0, #NBBADR_off_addr]

+

+		LDR		r1, =0x18					/* Flash Banks 0 1 enabled */

+		STR		r1, [r0, #CR_off_addr]

+		

+/* Enable 96K RAM */

+

+		LDR		r0, =SCRO_AHB_UMB

+#		LDR		r1, =0x0196				/* prefetch disabled, default enabled */

+		LDR		r1, =0x0187|SRAM96

+		STR		r1, [r0]

+

+/* Set bits 17-18 (Instruction/Data TCM order) of the */

+/* Core Configuration Control Register */

+ 

+		MOV		r0, #0x60000

+		MCR		p15, 0x1, r0, c15, c1, 0

+  

+/* Setup Stack for each mode */

+

+/* Enter Abort Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_ABT|I_Bit|F_Bit

+		LDR		sp, =__stack_abt_end__

+

+/* Enter Undefined Instruction Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_UND|I_Bit|F_Bit

+		LDR		sp, =__stack_und_end__

+

+/* Enter Supervisor Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_SVC|I_Bit|F_Bit

+		LDR		sp, =__stack_svc_end__

+

+/* Enter FIQ Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_FIQ|I_Bit|F_Bit

+		LDR		sp, =__stack_fiq_end__

+

+/* Enter IRQ Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_IRQ|I_Bit|F_Bit

+		LDR		sp, =__stack_irq_end__

+

+/* Enter System/User Mode and set its Stack Pointer */

+

+		MSR		cpsr_c, #Mode_SYS

+		LDR		sp, =__stack_end__

+

+/* Setup a default Stack Limit (when compiled with "-mapcs-stack-check") */

+

+		LDR		sl, =__bss_end__

+

+/* Relocate .data section (Copy from ROM to RAM) */

+

+		LDR		r1, =_etext

+		LDR		r2, =__data_start

+		LDR		r3, =_edata

+LoopRel:

+		CMP		r2, r3

+		LDRLO	r0, [r1], #4

+		STRLO	r0, [r2], #4

+		BLO		LoopRel

+

+/* Clear .bss section (Zero init) */

+

+		MOV		r0, #0

+		LDR		r1, =__bss_start__

+		LDR		r2, =__bss_end__

+LoopZI:

+		CMP		r1, r2

+		STRLO	r0, [r1], #4

+		BLO		LoopZI

+  		

+/* Call C++ constructors */

+

+		LDR		r0, =__ctors_start__

+		LDR 	r1, =__ctors_end__

+ctor_loop:

+		CMP 	r0, r1

+		BEQ 	ctor_end

+		LDR 	r2, [r0], #4

+		STMFD 	sp!, {r0-r1}

+		BLX		r2

+		LDMFD	sp!, {r0-r1}

+		B 		ctor_loop

+ctor_end:

+

+/* Need to set up standard file handles */

+/* Only used under simulator, normally overide syscall.c */

+

+#		BL		initialise_monitor_handles

+

+/* if we use debug version of str9lib this will call the init function */

+		

+		BL		libdebug

+libdebug:		

+

+/* Enter the C code, use B instruction so as to never return */

+/* use BL main if you want to use c++ destructors below */

+

+		B		main

+

+/* Call destructors */

+

+#		LDR		r0, =__dtors_start__

+#		LDR		r1, =__dtors_end__

+#dtor_loop:

+#		CMP		r0, r1

+#		BEQ		dtor_end

+#		LDR		r2, [r0], #4

+#		STMFD	sp!, {r0-r1}

+#		BLX		r2

+#		LDMFD	sp!, {r0-r1}

+#		B		dtor_loop

+#dtor_end:

+

+/* Return from main, loop forever. */

+

+#exit_loop:

+#		B		exit_loop

+	

+/* Fosc values, used by libstr9 */

+

+_Main_Crystal:	.long	FOSC

+

+	.weak libdebug

+	

+	.end

diff --git a/uc_str912/prj_blinky_simple_startup/src/vector.s b/uc_str912/prj_blinky_simple_startup/src/vector.s
new file mode 100644
index 0000000..7708f54
--- /dev/null
+++ b/uc_str912/prj_blinky_simple_startup/src/vector.s
@@ -0,0 +1,202 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author			: Spencer Oliver

+*	Web     		: www.anglia-designs.com

+*

+***********************************************************************************/

+

+	.equ	VectorAddress,		0xFFFFF030	/* VIC Vector address register address. */

+	.equ	VectorAddressDaisy,	0xFC000030	/* Daisy VIC Vector address register */

+

+	.equ    Mode_USR,       0x10

+	.equ    Mode_FIQ,       0x11

+	.equ    Mode_IRQ,       0x12

+	.equ    Mode_SVC,       0x13

+	.equ    Mode_ABT,       0x17

+	.equ    Mode_UND,       0x1B

+	.equ    Mode_SYS,       0x1F			/* available on ARM Arch 4 and later */

+

+	.equ    I_Bit,          0x80			/* when I bit is set, IRQ is disabled */

+	.equ    F_Bit,          0x40			/* when F bit is set, FIQ is disabled */

+

+	.text

+	.arm

+	.section .vectors, "ax"

+

+	.global	Reset_Vec

+

+/* Note: LDR PC instructions are used here, though branch (B) instructions */

+/* could also be used, unless the ROM is at an address >32MB. */

+

+/*******************************************************************************

+                        Exception vectors

+*******************************************************************************/

+

+Reset_Vec:	LDR     pc, Reset_Addr		/* Reset Handler */

+Undef_Vec:	LDR     pc, Undefined_Addr

+SWI_Vec:	LDR     pc, SWI_Addr

+PAbt_Vec:	LDR     pc, Prefetch_Addr

+DAbt_Vec:	LDR     pc, Abort_Addr

+			NOP							/* Reserved vector */

+IRQ_Vec:	LDR     pc, IRQ_Addr

+FIQ_Vec:	LDR     pc, FIQ_Addr

+

+/*******************************************************************************

+               Exception handlers address table

+*******************************************************************************/

+

+Reset_Addr:		.word	_start

+Undefined_Addr:	.word	UndefinedHandler

+SWI_Addr:		.word	SWIHandler

+Prefetch_Addr:	.word	PrefetchHandler

+Abort_Addr:		.word	AbortHandler

+				.word	0				/* reserved */

+IRQ_Addr:		.word	IRQHandler

+FIQ_Addr:		.word	FIQHandler

+

+/*******************************************************************************

+                         Exception Handlers

+*******************************************************************************/

+

+/*******************************************************************************

+* Macro Name     : SaveContext

+* Description    : This macro used to save the context before entering

+                   an exception handler.

+* Input          : The range of registers to store.

+* Output         : none

+*******************************************************************************/

+

+.macro	SaveContext reg1 reg2

+		STMFD	sp!,{\reg1-\reg2,lr}	/* Save The workspace plus the current return */

+										/* address lr_ mode into the stack */

+		MRS		r1, spsr				/* Save the spsr_mode into r1 */

+		STMFD	sp!, {r1}				/* Save spsr */

+.endm

+

+/*******************************************************************************

+* Macro Name     : RestoreContext

+* Description    : This macro used to restore the context to return from

+                   an exception handler and continue the program execution.

+* Input          : The range of registers to restore.

+* Output         : none

+*******************************************************************************/

+

+.macro	RestoreContext reg1 reg2

+		LDMFD	sp!, {r1}				/* Restore the saved spsr_mode into r1 */

+		MSR		spsr_cxsf, r1			/* Restore spsr_mode */

+		LDMFD	sp!, {\reg1-\reg2,pc}^	/* Return to the instruction following */

+										/* the exception interrupt */

+.endm

+

+/*******************************************************************************

+* Function Name  : IRQHandler

+* Description    : This function called when IRQ exception is entered.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+IRQHandler:

+		SUB    lr, lr, #4				/* Update the link register */

+		SaveContext r0, r12				/* Save the workspace plus the current */

+										/* return address lr_irq and spsr_irq */

+		LDR    r0, =VectorAddress

+		LDR    r0, [r0]					/* Read the routine address */

+		LDR    r1, =VectorAddressDaisy

+		LDR    r1, [r1]

+		/* Padding between the acknowledge and re-enable of interrupts */

+		/* For more details, please refer to the following URL */

+		/* http://www.arm.com/support/faqip/3682.html */

+		NOP

+		NOP

+		MSR		cpsr_c, #Mode_SYS		/* Switch to SYS mode and enable IRQ */

+		STMFD	sp!, {lr}				/* Save the link register. */

+		LDR		lr, =ReturnAddress		/* Read the return address. */

+		MOV		pc, r0					/* Branch to the IRQ handler. */

+ReturnAddress:

+		LDMFD	sp!, {lr}						/* Restore the link register. */

+		MSR		cpsr_c, #Mode_IRQ|I_Bit|F_Bit	/* Switch to IRQ mode and disable IRQ */

+		LDR		r0, =VectorAddress				/* Write to the VectorAddress to clear the */

+		STR		r0, [r0]				/* respective interrupt in the internal interrupt */

+		LDR		r1, =VectorAddressDaisy	/* Write to the VectorAddressDaisy to clear the */

+		STR		r1, [r1]				/* respective interrupt in the internal interrupt */

+		RestoreContext r0, r12			/* Restore the context and return to the program execution. */

+

+/*******************************************************************************

+* Function Name  : SWIHandler

+* Description    : This function called when SWI instruction executed.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+SWIHandler:

+		SaveContext r0, r12			/* r0 holds swi number */

+		MOV 	r1, sp				/* load regs */

+		BL		SWI_Handler

+		RestoreContext r0, r12

+

+/*******************************************************************************

+* Function Name  : UndefinedHandler

+* Description    : This function called when undefined instruction

+                   exception is entered.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+UndefinedHandler:

+		SaveContext r0, r12

+		BL		Undefined_Handler

+		RestoreContext r0, r12

+

+/*******************************************************************************

+* Function Name  : PrefetchAbortHandler

+* Description    : This function called when Prefetch Abort

+                   exception is entered.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+PrefetchHandler:

+		SUB		lr, lr, #4			/* Update the link register. */

+		SaveContext r0, r12

+		BL		Prefetch_Handler

+		RestoreContext r0, r12

+

+/*******************************************************************************

+* Function Name  : DataAbortHandler

+* Description    : This function is called when Data Abort

+                   exception is entered.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+AbortHandler:

+		SUB		lr, lr, #8			/* Update the link register. */

+		SaveContext r0, r12

+		BL		Abort_Handler

+		RestoreContext r0, r12

+

+/*******************************************************************************

+* Function Name  : FIQHandler

+* Description    : This function is called when FIQ

+                   exception is entered.

+* Input          : none

+* Output         : none

+*******************************************************************************/

+

+FIQHandler:

+		SUB		lr, lr, #4			/* Update the link register. */

+		SaveContext r0, r7

+		BL		FIQ_Handler

+		RestoreContext r0, r7

+

+	.end

diff --git a/uc_str912/prj_blinky_simple_startup/src/vectors.c b/uc_str912/prj_blinky_simple_startup/src/vectors.c
new file mode 100644
index 0000000..4022391
--- /dev/null
+++ b/uc_str912/prj_blinky_simple_startup/src/vectors.c
@@ -0,0 +1,462 @@
+/***********************************************************************************

+*	Copyright 2005 Anglia Design

+*	This demo code and associated components are provided as is and has no warranty,

+*	implied or otherwise.  You are free to use/modify any of the provided

+*	code at your own risk in your applications with the expressed limitation

+*	of liability (see below)

+* 

+*	LIMITATION OF LIABILITY:   ANGLIA OR ANGLIA DESIGNS SHALL NOT BE LIABLE FOR ANY

+*	LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA, INTERRUPTION OF BUSINESS, NOR FOR

+*	INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER

+*	THIS AGREEMENT OR OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

+*

+*	Author			: Spencer Oliver

+*	Web     		: www.anglia-designs.com

+*

+***********************************************************************************/

+

+#include "vectors.h"

+

+/*******************************************************************************

+* Function Name  : Undefined_Handler

+* Description    : This function Undefined instruction exception.

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void Undefined_Handler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : SWI_Handler

+* Description    : This function handles SW exception.

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void SWI_Handler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : Prefetch_Handler

+* Description    : This function handles preftetch abort exception.

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void Prefetch_Handler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : Abort_Handler

+* Description    : This function handles data abort exception.

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void Abort_Handler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : FIQ_Handler

+* Description    : This function handles FIQ exception.

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void FIQ_Handler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : WDG_IRQHandler

+* Description    : This function handles the WDG interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void WDG_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : SW_IRQHandler

+* Description    : This function handles the SW interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void SW_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : ARMRX_IRQHandler

+* Description    : This function handles the ARMRX interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void ARMRX_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : ARMTX_IRQHandler

+* Description    : This function handles the ARMTX interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void ARMTX_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : TIM0_IRQHandler

+* Description    : This function handles the TIM0 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void TIM0_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : TIM1_IRQHandler

+* Description    : This function handles the TIM1 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void TIM1_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : TIM2_IRQHandler

+* Description    : This function handles the TIM2 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void TIM2_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : TIM3_IRQHandler

+* Description    : This function handles the TIM3 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void TIM3_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : USBHP_IRQHandler

+* Description    : This function handles the USBHP interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void USBHP_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : USBLP_IRQHandler

+* Description    : This function handles the USBLP interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void USBLP_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : SCU_IRQHandler

+* Description    : This function handles the SCU interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void SCU_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : ENET_IRQHandler

+* Description    : This function handles the ENET interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void ENET_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : DMA_IRQHandler

+* Description    : This function handles the DMA interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void DMA_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : CAN_IRQHandler

+* Description    : This function handles the CAN interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void CAN_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : MC_IRQHandler

+* Description    : This function handles the MC interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void MC_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : ADC_IRQHandler

+* Description    : This function handles the ADC interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void ADC_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : UART0_IRQHandler

+* Description    : This function handles the UART0 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void UART0_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : UART1_IRQHandler

+* Description    : This function handles the UART1 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void UART1_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : UART2_IRQHandler

+* Description    : This function handles the UART2 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void UART2_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : I2C0_IRQHandler

+* Description    : This function handles the I2C0 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void I2C0_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : I2C1_IRQHandler

+* Description    : This function handles the I2C1 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void I2C1_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : SSP0_IRQHandler

+* Description    : This function handles the SSP0 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void SSP0_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : SSP1_IRQHandler

+* Description    : This function handles the SSP1 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void SSP1_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : LVD_IRQHandler

+* Description    : This function handles the LVD interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void LVD_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : RTC_IRQHandler

+* Description    : This function handles the RTC interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void RTC_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : WIU_IRQHandler

+* Description    : This function handles the WIU interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void WIU_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : EXTIT0_IRQHandler

+* Description    : This function handles the EXTIT0 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void EXTIT0_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : EXTIT1_IRQHandler

+* Description    : This function handles the EXTIT1 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void EXTIT1_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : EXTIT2_IRQHandler

+* Description    : This function handles the EXTIT2 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void EXTIT2_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : EXTIT3_IRQHandler

+* Description    : This function handles the EXTIT3 interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void EXTIT3_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : USBWU_IRQHandler

+* Description    : This function handles the USBWU interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void USBWU_IRQHandler(void)

+{

+	while(1);

+}

+

+/*******************************************************************************

+* Function Name  : PFQBC_IRQHandler

+* Description    : This function handles the PFQBC interrupt request

+* Input          : None

+* Output         : None

+* Return         : None

+*******************************************************************************/

+void PFQBC_IRQHandler(void)

+{

+	while(1);

+}