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author | Bert Lange <b.lange@hzdr.de> | 2012-01-03 14:13:50 +0100 |
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committer | Bert Lange <b.lange@hzdr.de> | 2012-01-03 14:13:50 +0100 |
commit | cfbb9934d014c58a439f35d1483b34318f3a87c4 (patch) | |
tree | 3754bd761e9e9310267b2ca3a6e44baa5a7c50ba /test_rrobin_problem/rtl/led_control_ahb.vhd | |
parent | 2c4e72aebd5891c9df6d55aba7dfacccd4172047 (diff) | |
download | zpu-cfbb9934d014c58a439f35d1483b34318f3a87c4.zip zpu-cfbb9934d014c58a439f35d1483b34318f3a87c4.tar.gz |
initial commit for SP601
Diffstat (limited to 'test_rrobin_problem/rtl/led_control_ahb.vhd')
-rw-r--r-- | test_rrobin_problem/rtl/led_control_ahb.vhd | 132 |
1 files changed, 132 insertions, 0 deletions
diff --git a/test_rrobin_problem/rtl/led_control_ahb.vhd b/test_rrobin_problem/rtl/led_control_ahb.vhd new file mode 100644 index 0000000..4229af3 --- /dev/null +++ b/test_rrobin_problem/rtl/led_control_ahb.vhd @@ -0,0 +1,132 @@ + +library ieee; +use ieee.std_logic_1164.all; + +library grlib; +use grlib.amba.all; +use grlib.stdlib.all; +use grlib.devices.all; + +--pragma translate_off +--use std.textio.all; +--pragma translate_on + + +entity led_control_ahb is + generic( + hindex : integer := 0; + count : natural := 0; + gpio_data : std_logic_vector(31 downto 0) + ); + port ( + -- system + clk : in std_ulogic; + -- ahb + ahbi : in ahb_mst_in_type; + ahbo : out ahb_mst_out_type + ); +end entity led_control_ahb; + +architecture rtl of led_control_ahb is + + constant revision_c : integer := 0; + constant hconfig_c : ahb_config_type := ( + 0 => ahb_device_reg ( VENDOR_HZDR, 255, 0, revision_c, 0), + others => (others => '0') + ); + + constant gpio_addr_c : std_ulogic_vector(31 downto 0) := x"80000404"; + + constant default_ahb_mst_out_c : ahb_mst_out_type := ( + hbusreq => '0', + hlock => '0', + htrans => HTRANS_IDLE, + haddr => (others => '0'), + hwrite => '0', + hsize => HSIZE_WORD, + hburst => HBURST_SINGLE, + hprot => "0001", + hwdata => (others => '0'), + hirq => (others => '0'), + hconfig => hconfig_c, + hindex => hindex + ); + + type state_t is (IDLE, ADDR_PHASE, DATA_PHASE); + + type reg_t is record + state : state_t; + counter : natural; + ahbo : ahb_mst_out_type; + end record; + constant default_reg_c : reg_t := ( + state => IDLE, + counter => 0, + ahbo => default_ahb_mst_out_c + ); + + signal r : reg_t := default_reg_c; + signal r_in : reg_t; + +begin + + comb: process(r, ahbi) + variable v : reg_t; + begin + ahbo <= r.ahbo; + v := r; + + case v.state is + when IDLE => + -- have reach right time? + if v.counter < count then + v.counter := v.counter + 1; + else + -- bus write request + v.ahbo.hbusreq := '1'; + v.ahbo.htrans := HTRANS_NONSEQ; + v.ahbo.haddr := std_logic_vector( gpio_addr_c); + v.ahbo.hwrite := '1'; + -- have grant? + if ahbi.hgrant( hindex) = '1' then + v.state := ADDR_PHASE; + end if; + end if; + + when ADDR_PHASE => + v.ahbo.hbusreq := '0'; + v.ahbo.htrans := HTRANS_IDLE; + v.ahbo.haddr := (others => '0'); + v.ahbo.hwrite := '0'; + v.ahbo.hwdata := gpio_data; + v.state := DATA_PHASE; + + + when DATA_PHASE => + v.ahbo.hwdata := (others => '0'); + v.counter := 0; + v.state := IDLE; + + end case; + + r_in <= v; + end process comb; + + + seq: process + begin + wait until rising_edge( clk); + r <= r_in; + end process seq; + + + -- pragma translate_off + bootmsg : report_version + generic map ( + "led_control_ahb" & tost( hindex) & ": rev " & tost( revision_c) & ", gpio_data: " & tost( gpio_data) + ); + -- pragma translate_on + + +end architecture rtl; + |