change: to minimal zpu system

7 files changed, 648 insertions, 0 deletions

diff --git a/mig_test/software/include/common.h b/mig_test/software/include/common.h
new file mode 100644
index 0000000..9028a90
--- /dev/null
+++ b/mig_test/software/include/common.h
@@ -0,0 +1,23 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/common.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+#ifndef COMMON_H
+#define COMMON_H
+
+////////////////////////////////////////
+// specific stuff
+
+char          putchar  ( char c);
+void          putstr   ( const char *s);
+void          putbin   ( unsigned char dataType, unsigned long data);
+unsigned char puthex   ( unsigned char dataType, unsigned long data);
+unsigned char itoa     ( int z, char* Buffer );
+unsigned char putint   ( unsigned long data);
+unsigned char putuint  ( long data);
+void          putpfloat( unsigned long data);
+
+#endif // COMMON_H
diff --git a/mig_test/software/include/lcd-routines.h b/mig_test/software/include/lcd-routines.h
new file mode 100644
index 0000000..e3516cf
--- /dev/null
+++ b/mig_test/software/include/lcd-routines.h
@@ -0,0 +1,167 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/lcd-routines.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+// Ansteuerung eines HD44780 kompatiblen LCD im 4-Bit-Interfacemodus
+// http://www.mikrocontroller.net/articles/AVR-GCC-Tutorial/LCD-Ansteuerung
+//
+ 
+#ifndef LCD_ROUTINES_H
+#define LCD_ROUTINES_H
+
+#include "peripherie.h"
+
+////////////////////////////////////////////////////////////////////////////////
+// Hier die verwendete Taktfrequenz in Hz eintragen, wichtig!
+ 
+#ifndef F_CPU
+#define F_CPU 50000000
+#endif
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Pinbelegung für das LCD, an verwendete Pins anpassen
+// Alle LCD Pins müssen an einem Port angeschlossen sein und die 4
+// Datenleitungen müssen auf aufeinanderfolgenden Pins liegen
+ 
+//  LCD DB4-DB7 <-->  PORTD Bit PD0-PD3
+#define LCD_PORT      (gpio0->ioout)
+#define LCD_DDR       (gpio0->iodir)
+#define LCD_DB        (8)
+ 
+//  LCD RS      <-->  PORTD Bit PD4     (RS: 0=Data, 1=Command)
+#define LCD_RS        (14)
+ 
+//  LCD EN      <-->  PORTD Bit PD5     (EN: 1-Impuls für Daten)
+#define LCD_EN        (13)
+
+#define LCD_RW        (15)
+
+////////////////////////////////////////////////////////////////////////////////
+// LCD Ausführungszeiten (MS=Millisekunden, US=Mikrosekunden)
+ 
+#define LCD_BOOTUP_MS           15
+#define LCD_ENABLE_US           1
+#define LCD_WRITEDATA_US        46
+#define LCD_COMMAND_US          42
+ 
+#define LCD_SOFT_RESET_MS1      5
+#define LCD_SOFT_RESET_MS2      1
+#define LCD_SOFT_RESET_MS3      1
+#define LCD_SET_4BITMODE_MS     5
+ 
+#define LCD_CLEAR_DISPLAY_MS    2
+#define LCD_CURSOR_HOME_MS      2
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Zeilendefinitionen des verwendeten LCD
+// Die Einträge hier sollten für ein LCD mit einer Zeilenlänge von 16 Zeichen passen
+// Bei anderen Zeilenlängen müssen diese Einträge angepasst werden
+ 
+#define LCD_DDADR_LINE1         0x00
+#define LCD_DDADR_LINE2         0x40
+#define LCD_DDADR_LINE3         0x10
+#define LCD_DDADR_LINE4         0x50
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Initialisierung: muss ganz am Anfang des Programms aufgerufen werden.
+void lcd_init( void );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// LCD löschen
+void lcd_clear( void );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Cursor in die 1. Zeile, 0-te Spalte
+void lcd_home( void );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Cursor an eine beliebige Position 
+void lcd_setcursor( uint8_t spalte, uint8_t zeile );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Ausgabe eines einzelnen Zeichens an der aktuellen Cursorposition 
+void lcd_data( uint8_t data );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Ausgabe eines Strings an der aktuellen Cursorposition 
+void lcd_string( const char *data );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Definition eines benutzerdefinierten Sonderzeichens.
+// data muss auf ein Array[5] mit den Spaltencodes des zu definierenden Zeichens
+// zeigen
+void lcd_generatechar( uint8_t code, const uint8_t *data );
+ 
+////////////////////////////////////////////////////////////////////////////////
+// Ausgabe eines Kommandos an das LCD.
+void lcd_command( uint8_t data );
+ 
+ 
+////////////////////////////////////////////////////////////////////////////////
+// LCD Befehle und Argumente.
+// Zur Verwendung in lcd_command
+ 
+// Clear Display -------------- 0b00000001
+#define LCD_CLEAR_DISPLAY       0x01
+ 
+// Cursor Home ---------------- 0b0000001x
+#define LCD_CURSOR_HOME         0x02
+ 
+// Set Entry Mode ------------- 0b000001xx
+#define LCD_SET_ENTRY           0x04
+ 
+#define LCD_ENTRY_DECREASE      0x00
+#define LCD_ENTRY_INCREASE      0x02
+#define LCD_ENTRY_NOSHIFT       0x00
+#define LCD_ENTRY_SHIFT         0x01
+ 
+// Set Display ---------------- 0b00001xxx
+#define LCD_SET_DISPLAY         0x08
+ 
+#define LCD_DISPLAY_OFF         0x00
+#define LCD_DISPLAY_ON          0x04
+#define LCD_CURSOR_OFF          0x00
+#define LCD_CURSOR_ON           0x02
+#define LCD_BLINKING_OFF        0x00
+#define LCD_BLINKING_ON         0x01
+ 
+// Set Shift ------------------ 0b0001xxxx
+#define LCD_SET_SHIFT           0x10
+ 
+#define LCD_CURSOR_MOVE         0x00
+#define LCD_DISPLAY_SHIFT       0x08
+#define LCD_SHIFT_LEFT          0x00
+#define LCD_SHIFT_RIGHT         0x04
+ 
+// Set Function --------------- 0b001xxxxx
+#define LCD_SET_FUNCTION        0x20
+ 
+#define LCD_FUNCTION_4BIT       0x00
+#define LCD_FUNCTION_8BIT       0x10
+#define LCD_FUNCTION_1LINE      0x00
+#define LCD_FUNCTION_2LINE      0x08
+#define LCD_FUNCTION_5X7        0x00
+#define LCD_FUNCTION_5X10       0x04
+ 
+#define LCD_SOFT_RESET          0x30
+ 
+// Set CG RAM Address --------- 0b01xxxxxx  (Character Generator RAM)
+#define LCD_SET_CGADR           0x40
+ 
+#define LCD_GC_CHAR0            0
+#define LCD_GC_CHAR1            1
+#define LCD_GC_CHAR2            2
+#define LCD_GC_CHAR3            3
+#define LCD_GC_CHAR4            4
+#define LCD_GC_CHAR5            5
+#define LCD_GC_CHAR6            6
+#define LCD_GC_CHAR7            7
+ 
+// Set DD RAM Address --------- 0b1xxxxxxx  (Display Data RAM)
+#define LCD_SET_DDADR           0x80
+ 
+#endif 
diff --git a/mig_test/software/include/peripherie.h b/mig_test/software/include/peripherie.h
new file mode 100644
index 0000000..9734d4c
--- /dev/null
+++ b/mig_test/software/include/peripherie.h
@@ -0,0 +1,323 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/peripherie.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+#ifndef PERIPHERIE_H
+#define PERIPHERIE_H
+
+#include <types.h>
+
+////////////////////
+// hardware types
+
+// gpio
+typedef struct {
+    volatile uint32_t iodata;   // 000
+    volatile uint32_t ioout;    // 001
+    volatile uint32_t iodir;    // 010, for bidir port bits
+    volatile uint32_t irqmask;  // 011
+    volatile uint32_t irqpol;   // 100
+    volatile uint32_t irqedge;  // 101
+    volatile uint32_t bypass;   // 110
+} grgpio_t;
+
+
+// uart
+#define UART_STATUS_DATA_READY               (1<< 0)
+#define UART_STATUS_TX_SHREG_EMPTY           (1<< 1)
+#define UART_STATUS_TX_REG_EMPTY             (1<< 2)
+#define UART_STATUS_BREAK_RECEIVED           (1<< 3)
+#define UART_STATUS_OVERRUN                  (1<< 4)
+#define UART_STATUS_PARITY_ERROR             (1<< 5)
+#define UART_STATUS_FRAMING_ERROR            (1<< 6)
+#define UART_STATUS_TX_FIFO_HALF_FULL        (1<< 7)
+#define UART_STATUS_RX_FIFO_HALF_FULL        (1<< 8)
+#define UART_STATUS_TX_FIFO_FULL             (1<< 9)
+#define UART_STATUS_RX_FIFO_FULL             (1<<10)
+
+#define UART_CONTROL_RX_ENABLE               (1<< 0)
+#define UART_CONTROL_TX_ENABLE               (1<< 1)
+#define UART_CONTROL_RX_INT_ENABLE           (1<< 2)
+#define UART_CONTROL_TX_INT_ENABLE           (1<< 3)
+#define UART_CONTROL_PARITY_SELECT           (1<< 4)
+#define UART_CONTROL_PARITY_ENABLE           (1<< 5)
+#define UART_CONTROL_FLOW_CONTROL            (1<< 6)
+#define UART_CONTROL_LOOP_BACK               (1<< 7)
+#define UART_CONTROL_EXTERNAL_CLOCK          (1<< 8)
+#define UART_CONTROL_TX_FIFO_INT_ENABLE      (1<< 9)
+#define UART_CONTROL_RX_FIFO_INT_ENABLE      (1<<10)
+#define UART_CONTROL_FIFO_DEBUG_MODE         (1<<11)
+#define UART_CONTROL_BREAK_INT_ENABLE        (1<<12)
+#define UART_CONTROL_DELAYED_INT_ENABLE      (1<<13)
+#define UART_CONTROL_TX_REG_EMPTY_INT_ENABLE (1<<14)
+#define UART_CONTROL_FIFO_AVAILIBLE          (1<<31)
+
+typedef struct {
+    volatile uint32_t data;         // 000000
+    volatile uint32_t status;       // 000001 
+    volatile uint32_t ctrl;         // 000010 
+    volatile uint32_t scaler;       // 000011
+    volatile uint32_t fifo_debug;   // 000100
+} apbuart_t;
+
+
+// timer (grip.pdf p. 279)
+#define TIMER_ENABLE                (1<<0)
+#define TIMER_RESTART               (1<<1)
+#define TIMER_LOAD                  (1<<2)
+#define TIMER_INT_ENABLE            (1<<3)
+#define TIMER_INT_PENDING           (1<<4)
+#define TIMER_CHAIN                 (1<<5)
+#define TIMER_DEBUG_HALT            (1<<6)
+typedef struct {
+    volatile uint32_t value;
+    volatile uint32_t reload;
+    volatile uint32_t ctrl;
+    volatile uint32_t unused;
+} gptimer_element_t;
+
+#define TIMER_CONFIG_DISABLE_FREEZE (1<<8)
+typedef struct {
+    volatile uint32_t scaler;          // 00000
+    volatile uint32_t scaler_reload;   // 00001
+    volatile uint32_t config;          // 00010 ntimers, pirq
+    volatile uint32_t unused;          // 00011
+    gptimer_element_t e[8];
+} gptimer_t;
+
+#define CLOCKS_PER_SECOND         (1000)
+void usleep( uint32_t nsec);
+void msleep( uint32_t msec);
+void sleep( uint32_t sec);
+void timer_init( void);
+
+
+// i2c
+// control register
+#define I2C_CORE_ENABLE              (1<<7)
+#define I2C_INT_ENABLE               (1<<6)
+// command register
+#define I2C_START                    (1<<7)
+#define I2C_STOP                     (1<<6)
+#define I2C_READ                     (1<<5)
+#define I2C_WRITE                    (1<<4)
+#define I2C_ACK                      (1<<3)
+#define I2C_INT_ACK                  (1<<0)
+// status register
+#define I2C_RX_ACK                   (1<<7)
+#define I2C_BUSY                     (1<<6)
+#define I2C_ARB_LOST                 (1<<5)
+#define I2C_TIP                      (1<<1)
+#define I2C_INT                      (1<<0)
+
+typedef struct {
+    volatile uint32_t clock_prescaler;  // prer 0x00
+    volatile uint32_t control;          // ctr  0x04
+    volatile uint32_t data;             // xr   0x08 write -> transmit, read -> receive
+    volatile uint32_t command;          // csr  0x0c write -> command,  read -> status
+} i2cmst_t; // i2cmstregs
+
+
+// vga
+typedef struct {
+    volatile uint32_t data;
+    volatile uint32_t background_color;
+    volatile uint32_t foreground_color;
+} apbvga_t;
+
+
+// ethernet
+#define ETHER_DESCRIPTOR_ENABLE              (1<<11)
+#define ETHER_DESCRIPTOR_WRAP                (1<<12)
+#define ETHER_DESCRIPTOR_INT_ENABLE          (1<<13)
+#define ETHER_DESCRIPTOR_UNDERRUN_ERR        (1<<14)
+#define ETHER_DESCRIPTOR_ATTEMEPT_LIMIT_ERR  (1<<15)
+typedef struct {
+    volatile uint32_t control;
+    volatile uint32_t address;
+} greth_tx_descriptor_t;
+
+#define ETHER_CONTROL_TX_ENABLE              (1<< 0)
+#define ETHER_CONTROL_RX_ENABLE              (1<< 1)
+#define ETHER_CONTROL_TX_INT                 (1<< 2)
+#define ETHER_CONTROL_RX_INT                 (1<< 3)
+#define ETHER_CONTROL_FULL_DUPLEX            (1<< 4)
+#define ETHER_CONTROL_PROMISCUOUS_MODE       (1<< 5)
+#define ETHER_CONTROL_RESET                  (1<< 6)
+#define ETHER_CONTROL_SPEED                  (1<< 7)
+#define ETHER_CONTROL_EDCL_AVAILABLE         (1<<31)
+
+#define ETHER_STATUS_RX_ERROR                (1<< 0)
+#define ETHER_STATUS_TX_ERROR                (1<< 1)
+#define ETHER_STATUS_RX_INT                  (1<< 2)
+#define ETHER_STATUS_TX_INT                  (1<< 3)
+#define ETHER_STATUS_RX_AHB_ERROR            (1<< 4)
+#define ETHER_STATUS_TX_AHB_ERROR            (1<< 5)
+#define ETHER_STATUS_RX_TOO_SMALL            (1<< 6)
+#define ETHER_STATUS_INVALID_ADDRESS         (1<< 7)
+
+#define ETHER_MDIO_WR                        (1<< 0)
+#define ETHER_MDIO_RD                        (1<< 1)
+#define ETHER_MDIO_LINKFAIL                  (1<< 2)
+#define ETHER_MDIO_BUSY                      (1<< 3)
+#define ETHER_MDIO_NOT_VALID                 (1<< 4)
+
+typedef struct {
+    volatile uint32_t control;          // 0x00
+    volatile uint32_t status;           // 0x04
+    volatile uint32_t mac_msb;          // 0x08
+    volatile uint32_t mac_lsb;          // 0x0C
+    volatile uint32_t mdio_control;     // 0x10
+    volatile uint32_t tx_pointer;       // 0x14
+    volatile uint32_t rx_pointer;       // 0x18
+    volatile uint32_t edcl_ip;          // 0x1C
+    volatile uint32_t hash_msb;         // 0x20
+    volatile uint32_t hash_lsb;         // 0x24
+} greth_t;
+
+
+struct udp_header_st {
+    uint16_t source_port;
+    uint16_t dest_port;
+    uint16_t length;
+    uint16_t checksum;
+    uint8_t  data[1500];//[data_length];
+} __attribute((packed));
+
+typedef struct udp_header_st udp_header_t;
+
+
+//uint32_t data_length       = 64; // minimum size is 46 (w/o vlan tag) or 42 (with vlan tag)
+
+#define PROTOCOL_UDP   (17)
+#define FLAG_DF        (1<<14)
+#define FLAG_MF        (1<<15)
+struct ip_header_st {
+    uint8_t      version; // +ihl (ip header length)
+    uint8_t      tos;
+    uint16_t     length;
+    uint16_t     identification;
+    uint16_t     fragment_offset; // +flags
+    uint8_t      ttl;
+    uint8_t      protocol_id; // udp = 17, tcp = 6
+    uint16_t     checksum;
+    uint32_t     source_ip;
+    uint32_t     dest_ip;
+    udp_header_t udp_header;
+} __attribute((packed));
+
+typedef struct ip_header_st ip_header_t;
+
+#define ETHERTYPE_IPv4  (0x0800)
+#define ETHERTYPE_ARP   (0x0806)
+struct mac_header_st {
+    uint8_t     dest_mac[6];
+    uint8_t     source_mac[6];
+    uint16_t    ethertype; // length or eg. 0x800 IPv4, 0x0806 ARP, 0x8892 Profinet, 0x88a4 etherCat
+    ip_header_t ip_header;
+} __attribute((packed));
+typedef struct mac_header_st mac_header_t;
+
+
+// ddr control register set
+typedef struct {
+    volatile uint32_t sdram_control;
+    volatile uint32_t sdram_config;
+    volatile uint32_t sdram_power_saving;
+    volatile uint32_t reserved;
+    volatile uint32_t status_read;
+    volatile uint32_t phy_config_0;
+    volatile uint32_t phy_config_1;
+} ddrspa_t;
+
+
+// dcm control
+typedef struct {
+    volatile uint32_t psstatus;
+    volatile int32_t  psdec;
+    volatile int32_t  psinc;
+    volatile int32_t  psvalue;
+} dcm_ctrl_t;
+
+
+// debug console (for simulation)
+char debug_putchar( char c);
+
+// function pointer for putchar
+extern char (* stdout) ( char);
+
+
+// iqr
+typedef struct {
+    volatile uint32_t irq_level;   // 0x00
+    volatile uint32_t irq_pending; // 0x04
+    volatile uint32_t irq_force;   // 0x08
+    volatile uint32_t irq_clear;   // 0x0c
+    volatile uint32_t mp_status;   // 0x10
+    volatile uint32_t broadcast;   // 0x14 (NCPU > 1)
+    volatile uint32_t dummy[10];   // 0x18 - 0x3c
+    volatile uint32_t irq_mask;    // 0x40
+    // open: interrupt force, extended interrupt acknowledge
+} irqmp_t;
+
+
+// mctrl
+typedef struct {
+    volatile uint32_t mcfg1; // 0x00
+    volatile uint32_t mcfg2; // 0x04
+    volatile uint32_t mcfg3; // 0x08
+    volatile uint32_t mcfg4; // 0x0c
+} mctrl_t;
+
+
+////////////////////
+// hardware units
+
+// ZPU frequency
+#define F_CPU           (125000000)
+
+// set min prescaler to ntimers+1
+#define TIMER_PRESCALER (8)
+
+// scaler for uart
+#define UART_BAUD_RATE  (115200)
+//#define UART_BAUD_RATE  (9600)
+#define UART_SCALER     (F_CPU/(8 * UART_BAUD_RATE))
+#define UART_FIFOSIZE   (16)
+
+// scaler for i2c
+#define I2C_PRESCALER_100K  (F_CPU/(5 * 100000)-1)
+#define I2C_PRESCALER_400K  (F_CPU/(5 * 400000)-1)
+
+
+extern apbuart_t         *uart0;
+extern gptimer_t         *timer0;
+extern irqmp_t           *irqmp0;
+extern apbvga_t          *vga0;
+extern grgpio_t          *gpio0;
+extern greth_t           *ether0;
+extern mctrl_t           *mctrl0;
+volatile extern uint32_t *debug_con0;
+volatile extern uint32_t *reset_reg;
+extern ddrspa_t          *ddr0;
+
+extern i2cmst_t          *i2c_dvi;
+extern i2cmst_t          *i2c_fmc;
+
+//char       *debug_con0 = (char *)       0x80000000;
+//uint32_t   *reset_reg  = (uint32_t *)   0x80000004;
+//apbuart_t  *uart0      = (apbuart_t *)  0x80000100;
+//gptimer_t  *timer0     = (gptimer_t *)  0x80000200;
+//grgpio_t   *gpio0      = (grgpio_t *)   0x80000400;
+//apbvga_t   *vga0       = (apbvga_t *)   0x80000600;
+//i2cmst_t   *i2cmst0    = (i2cmst_t *)   0x80000700;
+
+//greth_t    *ether0     = (greth_t *)    0x80000c00;
+//dcm_ctrl_t *dcm_ctrl0  = (dcm_ctrl_t *) 0x80000e00;
+//ddrspa_t   *ddr0       = (ddrspa_t *)   0xfff00000;
+
+#endif // PERIPHERIE_H
diff --git a/mig_test/software/include/timer.h b/mig_test/software/include/timer.h
new file mode 100644
index 0000000..fa4875f
--- /dev/null
+++ b/mig_test/software/include/timer.h
@@ -0,0 +1,49 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/timer.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+#include "peripherie.h"
+
+#ifndef TIMER_H
+#define TIMER_H
+
+
+////////////////////////////////////////
+// timer functions
+
+
+// wait for a given time in micro seconds
+void usleep(uint32_t usec);
+
+// wait for given time in milli seconds
+void msleep(uint32_t msec);
+
+
+// wait for given time in seconds
+void sleep(uint32_t sec);
+
+
+// deliver the milli seconds from timer 0.1
+uint32_t msecs( void);
+
+// deliver the seconds from timer 0.2
+uint32_t seconds( void);
+
+// deliver the time (in seconds and fraction) from timer
+uint32_t get_time( void);
+
+// just a loop
+void wait( uint32_t value);
+
+
+// initialisation for the timer
+void timer_init( void);
+
+#define TIMER_STOP      timer0->e[1].ctrl   &= ~TIMER_ENABLE;
+#define TIMER_RUN       timer0->e[1].ctrl   |= TIMER_ENABLE;
+
+#endif // TIMER_H
diff --git a/mig_test/software/include/types.h b/mig_test/software/include/types.h
new file mode 100644
index 0000000..d8e6862
--- /dev/null
+++ b/mig_test/software/include/types.h
@@ -0,0 +1,43 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/types.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+#ifndef TYPES_H
+#define TYPES_H
+
+////////////////////
+// common types
+
+typedef signed char         int8_t;
+typedef unsigned char       uint8_t;
+                            
+typedef short               int16_t;
+typedef unsigned short      uint16_t;
+                            
+typedef long                int32_t;
+typedef unsigned long       uint32_t;
+
+typedef long long           int64_t;
+typedef unsigned long long  uint64_t;
+
+#define TRUE  (1==1)
+#define FALSE (1==0)
+
+
+////////////////////////////////////////
+// common defines
+
+#define set_bit(mem, bv)                  ((mem) |= bv)
+#define clear_bit(mem, bv)                ((mem) &= ~bv)
+#define toggle_bit(mem, bv)               ((mem) ^= bv)
+#define bit_is_set(mem, bv)               (mem & bv)
+#define bit_is_clear(mem, bv)             (!(mem & bv))
+#define loop_until_bit_is_set(mem, bv)    do {} while( bit_is_clear(mem, bv))
+#define loop_until_bit_is_clear(mem, bv)  do {} while( bit_is_set(mem, bv))
+
+
+#endif // TYPES_H
diff --git a/mig_test/software/include/uart.h b/mig_test/software/include/uart.h
new file mode 100644
index 0000000..ca040e4
--- /dev/null
+++ b/mig_test/software/include/uart.h
@@ -0,0 +1,25 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/uart.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+#ifndef UART_H
+#define UART_H
+
+
+////////////////////////////////////////
+// uart functions
+
+#define UART_HW_HANDSHAKE_ON    (uart0-> ctrl |= UART_CONTROL_FLOW_CONTROL)
+#define UART_HW_HANDSHAKE_OFF   (uart0-> ctrl &= ~UART_CONTROL_FLOW_CONTROL)
+
+void uart_init( void);
+unsigned int uart_check_receiver();
+char uart_getchar();
+void uart_putchar_raw( char c);
+char uart_putchar( char c);
+
+#endif // UART_H
diff --git a/mig_test/software/include/vga.h b/mig_test/software/include/vga.h
new file mode 100644
index 0000000..f4d3914
--- /dev/null
+++ b/mig_test/software/include/vga.h
@@ -0,0 +1,18 @@
+/*
+ * $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWKE/hw_sp605/bsp_zpuahb/software/include/vga.h $
+ * $Date$
+ * $Author$
+ * $Revision$
+ */
+
+
+#include "peripherie.h"
+
+
+extern uint8_t vga_line;
+extern uint8_t vga_column;
+
+void vga_init( void);
+void vga_clear( void);
+void vga_putchar( char c);
+