clean up

4 files changed, 0 insertions, 1220 deletions

diff --git a/mig_test/rtl/Makefile b/mig_test/rtl/Makefile
deleted file mode 100644
index 17336cd..0000000
--- a/mig_test/rtl/Makefile
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# $HeadURL: https://svn.fzd.de/repo/concast/FWF_Projects/FWF_Internals/FPGA/hw_sp601/bsp_zpuahb/rtl/Makefile $
-# $Date$
-# $Author$
-# $Revision$
-#
-
-
-DATE = $(shell date +"%b %e %Y  %X")
-DATELENGTH = $(shell expr length "$(DATE)")
-
-SVNREV = $(shell svnversion | awk '{printf "%-21s", $$0}')
-SVNLENGTH = $(shell expr length "$(SVNREV)")
-
-
-all: timestamp.vhd
-	
-timestamp.vhd:
-	@echo "updating $@ ($(DATE); $(SVNREV))"
-	@rm -f $@
-	@echo "package timestamp is"                                                       >> $@
-	@echo ""                                                                           >> $@
-	@echo "    constant version_time_c : string( 1 to $(DATELENGTH)) := \"$(DATE)\";"  >> $@
-	@echo "    constant svnrevision_c  : string( 1 to $(SVNLENGTH)) := \"$(SVNREV)\";" >> $@
-	@echo ""                                                                           >> $@
-	@echo "end package timestamp;"                                                     >> $@
-
-
-clean:
-	rm timestamp.vhd
diff --git a/mig_test/rtl/box.vhd b/mig_test/rtl/box.vhd
deleted file mode 100644
index 229954a..0000000
--- a/mig_test/rtl/box.vhd
+++ /dev/null
@@ -1,432 +0,0 @@
---------------------------------------------------------------------------------
--- $Date$
--- $Author$
--- $Revision$
---------------------------------------------------------------------------------
-
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_misc.or_reduce; -- by synopsis
-use ieee.numeric_std.all;
-
-library grlib;
-use grlib.amba.all;
-
-library gaisler;
-use gaisler.misc.all;    -- types
-use gaisler.uart.all;    -- types
-use gaisler.net.all;     -- types
-use gaisler.memctrl.all; -- spimctrl types + spmictrl component
-
--- components
-library gaisler;
-use gaisler.uart.apbuart;
-use gaisler.misc.ahbdpram;
-use gaisler.misc.gptimer;
-use gaisler.misc.grgpio;
-use gaisler.misc.apbvga;
-use gaisler.misc.ahbram;
-use gaisler.memoryctrl.mctrl;  -- original in esa lib
-use gaisler.net.greth;
-
-library techmap;
-use techmap.gencomp.all; -- constants
-
-library zpu;
-use zpu.zpu_wrapper_package.all; -- types
-use zpu.zpu_config.all;
-use zpu.zpupkg.all;
-use zpu.zpu_wrapper_package.zpu_ahb;
-use zpu.zpu_wrapper_package.dualport_ram_ahb_wrapper; -- for medium zpu
-
-library hzdr;
-use hzdr.component_package.debug_con_apb;
-
-library work;
-use work.timestamp.all;
-
-
-
-entity box is
-    generic (
-        system_frequency    : integer;
-        simulation_active   : std_ulogic 
-    );
-    port (
-        clk                 : in    std_ulogic;        -- clock
-        reset_n             : in    std_ulogic;        -- synchronous reset (low active)
-        break               : out   std_ulogic;        -- to stop simulation
-        --                  
-        uarti               : in    uart_in_type;      -- UART
-        uarto               : out   uart_out_type;
-        --                  
-        gpioi               : in    gpio_in_type;      -- GPIO (button, switches, LED, header pins)
-        gpioo               : out   gpio_out_type
-    );
-end entity box;
-
-
-
-
-architecture rtl of box is
-
-    signal box_reset                     : std_ulogic;
-    signal box_reset_n                   : std_ulogic;
-    --
-    signal debug_con_apb_i0_softreset    : std_ulogic;
-    --
-    signal ahbctrl_i0_msti               : ahb_mst_in_type;
-    signal ahbmo                         : ahb_mst_out_vector := (others => ahbm_none);
-    signal ahbctrl_i0_slvi               : ahb_slv_in_type;
-    signal ahbso                         : ahb_slv_out_vector := (others => ahbs_none);
-    signal apbctrl_i0_apbi               : apb_slv_in_type;
-    signal apbo                          : apb_slv_out_vector := (others => apb_none);
-    --
-    signal gpti                          : gptimer_in_type;
-    signal gptimer_i0_gpto               : gptimer_out_type;
-    --
-    signal grgpio_i0_gpioo               : gpio_out_type;
-    --
-    signal box_mctrl_wpo                 : wprot_out_type := (wprothit => '0');
-    --
-    -- put these signals in entity (later)
-    signal ethi                          : eth_in_type;         -- ethernet PHY
-    signal etho                          : eth_out_type;
-
-begin
-    
-    ---------------------------------------------------------------------
-    --  reset
-
-    box_reset   <= (not reset_n) or debug_con_apb_i0_softreset;
-    box_reset_n <= not box_reset;
-
-    ---------------------------------------------------------------------
-    --  AHB bus masters
-    ---------------------------------------------------------------------
-
-    ---------------------------------------------------------------------
-    --  zpu
-    
-    zpu_ahb_i0: zpu_ahb
-    generic map (
-        hindex    => 0,                            -- : integer := 0
-        zpu_small => false                         -- : boolean := true
-    )                                              
-    port map (                                     
-        clk    => clk,                             -- : in  std_ulogic;
-        reset  => box_reset,                       -- : in  std_ulogic;
-        ahbi   => ahbctrl_i0_msti,                 -- : in  ahb_mst_in_type; 
-        ahbo   => ahbmo(0),                        -- : out ahb_mst_out_type;
-        irq    => or_reduce(ahbctrl_i0_msti.hirq), -- : in  std_ulogic;
-        break  => break                            -- : out std_ulogic
-    );
-    ---------------------------------------------------------------------
-    
-
-    ---------------------------------------------------------------------
-    -- ethernet (ahb master + apb slave)
-
-    greth_i0: greth
-        generic map (
-            hindex      => 1, 
-            pindex      => 5,
-            paddr       => 5,
-            pirq        => 5,
-            memtech     => inferred,
-            mdcscaler   => 20,
-            enable_mdio => 1,
-            fifosize    => 32,
-            nsync       => 1,
-            phyrstadr   => 7         -- depends on used hardware
-        )
-        port map (
-            rst         => reset_n,
-            clk         => clk,
-            ahbmi       => ahbctrl_i0_msti,
-            ahbmo       => ahbmo(1),
-            apbi        => apbctrl_i0_apbi,
-            apbo        => apbo(5),
-            ethi        => ethi,
-            etho        => etho
-        );
-    ---------------------------------------------------------------------
-
-
-    ---------------------------------------------------------------------
-    --  AHB CONTROLLER
-
-    --ahbmo(0) <= (ahbm_none); -- zpu_ahb_i0
-    --ahbmo(1) <= (ahbm_none); -- greth_i0
-    ahbmo( 2) <= ahbm_none;
-    ahbmo( 3) <= ahbm_none;
-    ahbmo( 4) <= ahbm_none;
-    ahbmo( 5) <= ahbm_none;
-    ahbmo( 6) <= ahbm_none;
-    ahbmo( 7) <= ahbm_none;
-    ahbmo( 8) <= ahbm_none;
-    ahbmo( 9) <= ahbm_none;
-    ahbmo(10) <= ahbm_none;
-    ahbmo(11) <= ahbm_none;
-    ahbmo(12) <= ahbm_none;
-    ahbmo(13) <= ahbm_none;
-    ahbmo(14) <= ahbm_none;
-    ahbmo(15) <= ahbm_none;
-    --
-    --ahbso(0) <= (ahbs_none); -- apbctrl_i0
-    --ahbso(1) <= (ahbs_none); -- ahbram_i0
-    ahbso( 2) <= (ahbs_none);
-    --ahbso(3) <= (ahbs_none); -- dualport_ram_ahb_wrapper_i0
-    ahbso( 4) <= (ahbs_none); -- spimctrl
-    ahbso( 5) <= (ahbs_none);
-    ahbso( 6) <= (ahbs_none); 
-    ahbso( 7) <= (ahbs_none); 
-    ahbso( 8) <= (ahbs_none); 
-    ahbso( 9) <= (ahbs_none); 
-    ahbso(10) <= (ahbs_none); 
-    ahbso(11) <= (ahbs_none); 
-    ahbso(12) <= (ahbs_none); 
-    ahbso(13) <= (ahbs_none); 
-    ahbso(14) <= (ahbs_none); 
-    ahbso(15) <= (ahbs_none); 
-
-    ahbctrl_i0 : ahbctrl        -- AHB arbiter/multiplexer
-        generic map (
-            defmast    => 0,    -- default master
-            timeout    => 11,
-            disirq     => 0,    -- enable interrupt routing
-            enbusmon   => 0,    -- enable bus monitor
-            rrobin     => 0,
-            assertwarn => 1,    -- enable assertions for warnings
-            asserterr  => 1     -- enable assertions for errors
-        )
-        port map (
-            rst     => box_reset_n,      -- : in  std_ulogic;
-            clk     => clk,              -- : in  std_ulogic;
-            msti    => ahbctrl_i0_msti,  -- : out ahb_mst_in_type;
-            msto    => ahbmo,            -- : in  ahb_mst_out_vector;
-            slvi    => ahbctrl_i0_slvi,  -- : out ahb_slv_in_type;
-            slvo    => ahbso,            -- : in  ahb_slv_out_vector;
-            testen  => '0',
-            testrst => '1',
-            scanen  => '0',
-            testoen => '1'
-        );
-    ----------------------------------------------------------------------
-
-
-    ---------------------------------------------------------------------
-    --  AHB bus slaves
-    ---------------------------------------------------------------------
-
-
-    ---------------------------------------------------------------------
-    --  AHB RAM (internal 4k BRAM)
-
-    ahbram_i0 : ahbram
-        generic map (
-            hindex   => 1,
-            haddr    => 16#a00#,
-            hmask    => 16#FFF#,
-            tech     => inferred,
-            kbytes   => 4
-        )
-        port map (
-            rst    => box_reset_n,
-            clk    => clk,
-            ahbsi  => ahbctrl_i0_slvi,
-            ahbso  => ahbso(1)
-        );
-    ----------------------------------------------------------------------
-    
-
-    ---------------------------------------------------------------------
-    --  AHB ZPU memory (instruction + data memory)
-
-    dualport_ram_ahb_wrapper_i0 : dualport_ram_ahb_wrapper
-        generic map (
-            hindex   => 3,
-            haddr    => 16#000#
-        )
-        port map (
-            clk    => clk,
-            reset  => box_reset,
-            ahbsi  => ahbctrl_i0_slvi,
-            ahbso  => ahbso(3)
-        );
-    ----------------------------------------------------------------------
-
-
---  ---------------------------------------------------------------------
---  -- AHB SPI memory controller
---  -- for SPI X4 (Winbond W25Q64VSFIG) 64-Mbit flash memory 
---  spimctrl_i0 : spimctrl
---      generic map (
---          hindex     => 4,           -- : integer := 0;            -- AHB slave index
---          faddr      => 16#E00#,     -- : integer := 16#000#;      -- Flash map base address
---          fmask      => 16#FF8#,     -- : integer := 16#fff#;      -- Flash area mask
---          ioaddr     => 16#002#,     -- : integer := 16#000#;      -- I/O base address
---          iomask     => 16#fff#,     -- : integer := 16#fff#;      -- I/O mask
---          readcmd    => 16#3b#,      -- : integer range 0 to 255 := 16#0B#;  -- Mem. dev. READ command
---          dummybyte  => 1,           -- : integer range 0 to 1   := 1; -- Dummy byte after cmd
---          dualoutput => 1            -- : integer range 0 to 1   := 0; -- Enable dual output
---      )
---      port map (
---          rstn   => box_reset_n,     -- : in  std_ulogic;       
---          clk    => clk,             -- : in  std_ulogic;
---          ahbsi  => ahbctrl_i0_slvi, -- : in  ahb_slv_in_type;
---          ahbso  => ahbso(4),        -- : out ahb_slv_out_type;
---          spii   => spmi,            -- : in  spimctrl_in_type;
---          spio   => spmo             -- : out spimctrl_out_type
---      );
---  ---------------------------------------------------------------------
-
-
-
-
-    ---------------------------------------------------------------------
-    --  AHB/APB bridge
-
-    --apbo( 0) <= (apb_none); -- debug_con_apb_i0
-    --apbo( 1) <= (apb_none); -- apbuart_i0
-    --apbo( 2) <= (apb_none); -- gptimer_i0
-    apbo( 3) <= (apb_none);
-    --apbo( 4) <= (apb_none); -- grgpio_i0
-    --apbo( 5) <= (apb_none); -- greth_i0
-    apbo( 6) <= (apb_none);   -- no apbvga_i0
-    apbo( 7) <= (apb_none);   -- no i2cmst_i0
-    apbo( 8) <= (apb_none);
-    apbo( 9) <= (apb_none);
-    apbo(10) <= (apb_none);
-    apbo(11) <= (apb_none);
-    apbo(12) <= (apb_none);
-    apbo(13) <= (apb_none);
-    apbo(14) <= (apb_none);
-    apbo(15) <= (apb_none);
-
-    apbctrl_i0: apbctrl
-        generic map (
-            hindex      => 0,            -- : integer := 0;
-            haddr       => 16#800#,      -- : integer := 0;
-            nslaves     => 16,           -- : integer range 1 to NAPBSLV := NAPBSLV;
-            asserterr   => 1,    
-            assertwarn  => 1    
-        )                                
-        port map (                       
-            rst   => box_reset_n,        -- : in  std_ulogic;
-            clk   => clk,                -- : in  std_ulogic;
-            ahbi  => ahbctrl_i0_slvi,    -- : in  ahb_slv_in_type;
-            ahbo  => ahbso(0),           -- : out ahb_slv_out_type;
-            apbi  => apbctrl_i0_apbi,    -- : out apb_slv_in_type;
-            apbo  => apbo                -- : in  apb_slv_out_vector                
-        );
-    ----------------------------------------------------------------------
-    
-
-    ---------------------------------------------------------------------
-    --  APB bus slaves
-    ---------------------------------------------------------------------
-
-    
-    ---------------------------------------------------------------------
-    -- debug console (for fast simulation output)
-    debug_con_apb_i0: debug_con_apb
-        generic map (
-            pindex           => 0,                  -- : integer := 0;
-            paddr            => 0,                  -- : integer := 0;
-            -- values taken from timestamp.vhd:
-            svnrevision      => svnrevision_c,      -- : string( 1 to 21) := "unknown SVN revision ";
-            version_time     => version_time_c,     -- : string( 1 to 21) := "undefined version    "
-            system_frequency => system_frequency    -- : integer 
-        )
-        port map (
-            rst       => box_reset_n,               -- : in  std_ulogic;
-            clk       => clk,                       -- : in  std_ulogic;
-            apbi      => apbctrl_i0_apbi,           -- : in  apb_slv_in_type;
-            apbo      => apbo(0),                   -- : out apb_slv_out_type;
-            softreset => debug_con_apb_i0_softreset -- : out std_ulogic
-        );
-    ---------------------------------------------------------------------
-
-
-    ---------------------------------------------------------------------
-    -- uart
-    apbuart_i0: apbuart
-        generic map (
-            pindex     => 1,
-            paddr      => 1,
-            console    => 1, -- fast simulation output
-            parity     => 0, -- no parity
-            flow       => 1, -- hardware handshake
-            fifosize   => 16
-        )
-        port map (
-            rst   => box_reset_n,        -- : in  std_ulogic;
-            clk   => clk,                -- : in  std_ulogic;
-            apbi  => apbctrl_i0_apbi,    -- : in  apb_slv_in_type;
-            apbo  => apbo(1),            -- : out apb_slv_out_type;
-            uarti => uarti,              -- : in  uart_in_type;
-            uarto => uarto               -- : out uart_out_type);
-        );
-    ---------------------------------------------------------------------
-
-    
-    ---------------------------------------------------------------------
-    -- GP timer (grip.pdf p. 279)
-    
-    gpti.extclk <= '0'; -- alternativ timer clock
-    gpti.dhalt  <= '0'; -- debug halt
-    gpti.wdogen <= '0'; -- watchdog enable
-
-    gptimer_i0: gptimer
-        generic map (
-            pindex  => 2,
-            paddr   => 2,
-            pirq    => 3,
-            sepirq  => 0, -- use separate interupts for each timer
-            sbits   => 8, -- prescaler bits
-            ntimers => 2, -- number of timers
-            nbits   => 24 -- timer bits
-        )
-        port map (
-            rst     => box_reset_n,
-            clk     => clk,
-            apbi    => apbctrl_i0_apbi,
-            apbo    => apbo(2),
-            gpti    => gpti,
-            gpto    => gptimer_i0_gpto
-        );
-    ---------------------------------------------------------------------
-
-
-    ---------------------------------------------------------------------
-    -- GPIO
-    grgpio_i0: grgpio
-        generic map (
-            pindex  => 4, 
-            paddr   => 4, 
---          imask   => 16#00000FF0#, -- interrupt mask (+ enable per software)
-            syncrst => 1,            -- only synchronous reset
-            nbits   => 32            -- number of port bits
-        )
-        port map (
-            rst    => box_reset_n, 
-            clk    => clk, 
-            apbi   => apbctrl_i0_apbi, 
-            apbo   => apbo(4),
-            gpioi  => gpioi, 
-            gpioo  => grgpio_i0_gpioo
-        );
-    gpioo <= grgpio_i0_gpioo;
-    --          gpio.dout                         gpio.din
-    ---------------------------------------------------------------------
-    --  3 -  0  LED                               unused
-    --       4  MAC_DATA                          MAC_DATA
-    --       5  user_led                          unused
-    -- 15 -  8  unused                            unused
-    -- 30 - 16  unused                            unused
-    -- 31       unused                            simulation_active
-    ---------------------------------------------------------------------
-
-
-end architecture rtl;
diff --git a/mig_test/rtl/top.vhd b/mig_test/rtl/top.vhd
deleted file mode 100644
index 872af28..0000000
--- a/mig_test/rtl/top.vhd
+++ /dev/null
@@ -1,697 +0,0 @@
--- top-level beam position monitor
--- für Trenz TE0600
---
--- FPGA: LX45, LX100 or LX150
--- 10/100/1000 Gigabit Ethernet
--- 2*64 MByte DDR3 SDRAM
--- 8 MByte SPI Flash
--- 
--- enthält alle Buffer/Treiber für die FPGA-Pins
---
---
-
---------------------------------------------------------------------------------
--- $Date$
--- $Author$
--- $Revision$
---------------------------------------------------------------------------------
-
-library ieee;
-use ieee.std_logic_1164.all;
-
-entity top is
-    port (
-        -- pragma translate_off
-        simulation_break  : out   std_logic;
-        -- pragma translate_on
-        -- system stuff
-        CLK               : in    std_logic;  -- 125 MHz
-        --RESET_N                 : in    std_logic;
-        POWER_FAIL_N      : in    std_logic;
-        WATCHDOG          : out   std_logic;
-        REPROG_N          : out   std_logic;
-        -- user clock
-        USER_CLK          : in    std_logic;
-        --
-        -- DDR3 SDRAM
-        MCB1_DRAM_A       : out   std_logic_vector(14 downto 0);
-        MCB1_DRAM_BA      : out   std_logic_vector(2 downto 0);
-        MCB1_DRAM_CAS_B   : out   std_logic;
-        MCB1_DRAM_RAS_B   : out   std_logic;
-        MCB1_DRAM_WE_B    : out   std_logic;
-        MCB1_DRAM_CKE     : out   std_logic;
-        MCB1_DRAM_CK_N    : out   std_logic;
-        MCB1_DRAM_CK_P    : out   std_logic;
-        MCB1_DRAM_DQ      : inout std_logic_vector(15 downto 0);
-        MCB1_DRAM_LDM     : out   std_logic;
-        MCB1_DRAM_UDM     : out   std_logic;
-        MCB1_DRAM_DQS_N   : inout std_logic_vector(1 downto 0);
-        MCB1_DRAM_DQS_P   : inout std_logic_vector(1 downto 0);
-        MCB1_DRAM_ODT     : out   std_logic;
-        MCB1_DRAM_RESET_B : out   std_logic;
-        MCB1_RZQ          : inout std_logic;
-        MCB1_ZIO          : inout std_logic;
-        --
-        MCB3_DRAM_A       : out   std_logic_vector(14 downto 0);
-        MCB3_DRAM_BA      : out   std_logic_vector(2 downto 0);
-        MCB3_DRAM_CAS_B   : out   std_logic;
-        MCB3_DRAM_RAS_B   : out   std_logic;
-        MCB3_DRAM_WE_B    : out   std_logic;
-        MCB3_DRAM_CKE     : out   std_logic;
-        MCB3_DRAM_CK_N    : out   std_logic;
-        MCB3_DRAM_CK_P    : out   std_logic;
-        MCB3_DRAM_DQ      : inout std_logic_vector(15 downto 0);
-        MCB3_DRAM_LDM     : out   std_logic;
-        MCB3_DRAM_UDM     : out   std_logic;
-        MCB3_DRAM_DQS_N   : inout std_logic_vector(1 downto 0);
-        MCB3_DRAM_DQS_P   : inout std_logic_vector(1 downto 0);
-        MCB3_DRAM_ODT     : out   std_logic;
-        MCB3_DRAM_RESET_B : out   std_logic;
-        MCB3_RZQ          : inout std_logic;
-        MCB3_ZIO          : inout std_logic;
-        --
-        -- Ethernet PHY
-        -- phy address = 0b00111
-        -- config(0)   = '1'
-        -- config(1)   = '0'
-        -- config(2)   = '1'
-        -- config(3)   = PHY_L10
-        -- config(4)   = '1'
-        -- config(5)   = '1'
-        -- config(6)   = PHY_LED_RX
-        --PHY_125                 : in    std_logic; -- 125 MHz from phy, used as clk
-        PHY_MDIO          : inout std_logic;
-        PHY_MDC           : out   std_logic;
-        PHY_INT           : in    std_logic;
-        PHY_RESET_B       : out   std_logic;
-        PHY_CRS           : in    std_logic;
-        PHY_COL           : inout std_logic;
-        PHY_TXEN          : out   std_logic;
-        PHY_TXCLK         : in    std_logic;
-        PHY_TXER          : out   std_logic;
-        PHY_TXD           : out   std_logic_vector(7 downto 0);
-        PHY_GTXCLK        : out   std_logic;
-        PHY_RXCLK         : in    std_logic;
-        PHY_RXER          : in    std_logic;
-        PHY_RXDV          : in    std_logic;
-        PHY_RXD           : in    std_logic_vector(7 downto 0);
-        --
-        -- quad SPI Flash (W25Q64BV)
-        SPI_FLASH_CSO_B   : out   std_logic;
-        SPI_FLASH_CCLK    : out   std_logic;
-        SPI_FLASH_IO      : inout std_logic_vector(3 downto 0);  -- ( 0=di, 1=do, 2=wp_n, 3=hold_n)
-        --
-        -- EEPROM (48bit MAC address, DS2502-E48)
-        MAC_DATA          : inout std_logic;
-        --
-        -- B2B J1 user IO
-        B2B_B2_L57_N      : inout std_logic;
-        B2B_B2_L57_P      : inout std_logic;
-        B2B_B2_L49_N      : inout std_logic;
-        B2B_B2_L49_P      : inout std_logic;
-        B2B_B2_L48_N      : inout std_logic;
-        B2B_B2_L48_P      : inout std_logic;
-        B2B_B2_L45_N      : inout std_logic;
-        B2B_B2_L45_P      : inout std_logic;
-        B2B_B2_L43_N      : inout std_logic;
-        B2B_B2_L43_P      : inout std_logic;
-        B2B_B2_L41_N      : inout std_logic;
-        B2B_B2_L41_P      : inout std_logic;
-        B2B_B2_L21_P      : inout std_logic;
-        B2B_B2_L21_N      : inout std_logic;
-        B2B_B2_L15_P      : inout std_logic;
-        B2B_B2_L15_N      : inout std_logic;
-        B2B_B2_L31_N      : inout std_logic;  -- single ended
-        B2B_B2_L32_N      : inout std_logic;  -- single ended
-        B2B_B2_L60_P      : inout std_logic;
-        B2B_B2_L60_N      : inout std_logic;
-        B2B_B2_L59_N      : inout std_logic;
-        B2B_B2_L59_P      : inout std_logic;
-        B2B_B2_L44_N      : inout std_logic;
-        B2B_B2_L44_P      : inout std_logic;
-        B2B_B2_L42_N      : inout std_logic;
-        B2B_B2_L42_P      : inout std_logic;
-        B2B_B2_L18_P      : inout std_logic;
-        B2B_B2_L18_N      : inout std_logic;
-        B2B_B2_L8_N       : inout std_logic;
-        B2B_B2_L8_P       : inout std_logic;
-        B2B_B2_L11_P      : inout std_logic;
-        B2B_B2_L11_N      : inout std_logic;
-        B2B_B2_L6_P       : inout std_logic;
-        B2B_B2_L6_N       : inout std_logic;
-        B2B_B2_L5_P       : inout std_logic;
-        B2B_B2_L5_N       : inout std_logic;
-        B2B_B2_L9_N       : inout std_logic;
-        B2B_B2_L9_P       : inout std_logic;
-        B2B_B2_L4_N       : inout std_logic;
-        B2B_B2_L4_P       : inout std_logic;
-        B2B_B2_L29_N      : inout std_logic;  -- single ended 
-        B2B_B2_L10_N      : inout std_logic;
-        B2B_B2_L10_P      : inout std_logic;
-        B2B_B2_L2_N       : inout std_logic;
-        B2B_B2_L2_P       : inout std_logic;
-        --
-        -- B2B J2 user IO
-        B2B_B3_L60_N      : inout std_logic;
-        B2B_B3_L60_P      : inout std_logic;
-        B2B_B3_L9_N       : inout std_logic;
-        B2B_B3_L9_P       : inout std_logic;
-        B2B_B0_L3_P       : inout std_logic;
-        B2B_B0_L3_N       : inout std_logic;
-        B2B_B3_L59_P      : inout std_logic;
-        B2B_B3_L59_N      : inout std_logic;
-        B2B_B0_L32_P      : inout std_logic;
-        B2B_B0_L32_N      : inout std_logic;
-        B2B_B0_L7_N       : inout std_logic;
-        B2B_B0_L7_P       : inout std_logic;
-        B2B_B0_L33_N      : inout std_logic;
-        B2B_B0_L33_P      : inout std_logic;
-        B2B_B0_L36_P      : inout std_logic;
-        B2B_B0_L36_N      : inout std_logic;
-        B2B_B0_L49_P      : inout std_logic;
-        B2B_B0_L49_N      : inout std_logic;
-        B2B_B0_L62_P      : inout std_logic;
-        B2B_B0_L62_N      : inout std_logic;
-        B2B_B0_L66_P      : inout std_logic;
-        B2B_B0_L66_N      : inout std_logic;
-        B2B_B1_L10_P      : inout std_logic;
-        B2B_B1_L10_N      : inout std_logic;
-        B2B_B1_L9_P       : inout std_logic;
-        B2B_B1_L9_N       : inout std_logic;
-        B2B_B1_L21_N      : inout std_logic;
-        B2B_B1_L21_P      : inout std_logic;
-        B2B_B1_L61_P      : inout std_logic;
-        B2B_B1_L61_N      : inout std_logic;
-        B2B_B0_L1         : inout std_logic;  -- used as reset_n
-        B2B_B0_L2_P       : inout std_logic;
-        B2B_B0_L2_N       : inout std_logic;
-        B2B_B0_L4_N       : inout std_logic;
-        B2B_B0_L4_P       : inout std_logic;
-        B2B_B0_L5_N       : inout std_logic;
-        B2B_B0_L5_P       : inout std_logic;
-        B2B_B0_L6_N       : inout std_logic;
-        B2B_B0_L6_P       : inout std_logic;
-        B2B_B0_L8_N       : inout std_logic;
-        B2B_B0_L8_P       : inout std_logic;
-        B2B_B0_L34_N      : inout std_logic;
-        B2B_B0_L34_P      : inout std_logic;
-        B2B_B0_L35_N      : inout std_logic;
-        B2B_B0_L35_P      : inout std_logic;
-        B2B_B0_L37_N      : inout std_logic;
-        B2B_B0_L37_P      : inout std_logic;
-        B2B_B0_L38_N      : inout std_logic;
-        B2B_B0_L38_P      : inout std_logic;
-        B2B_B0_L50_N      : inout std_logic;
-        B2B_B0_L50_P      : inout std_logic;
-        B2B_B0_L51_N      : inout std_logic;
-        B2B_B0_L51_P      : inout std_logic;
-        B2B_B0_L63_N      : inout std_logic;
-        B2B_B0_L63_P      : inout std_logic;
-        B2B_B0_L64_N      : inout std_logic;
-        B2B_B0_L64_P      : inout std_logic;
-        B2B_B0_L65_N      : inout std_logic;
-        B2B_B0_L65_P      : inout std_logic;
-        B2B_B1_L20_P      : inout std_logic;
-        B2B_B1_L20_N      : inout std_logic;
-        B2B_B1_L19_P      : inout std_logic;
-        B2B_B1_L19_N      : inout std_logic;
-        B2B_B1_L59        : inout std_logic;
-        --
-        -- misc
-        USER_LED_N        : out   std_logic;
-        AV                : in    std_logic_vector(3 downto 0);
-        BR                : in    std_logic_vector(3 downto 0)
-        );
-end entity top;
-
-
-
-library ieee;
-use ieee.std_logic_1164.all;
-use ieee.numeric_std.all;
-
-library gaisler;
-use gaisler.misc.all;                   -- types
-use gaisler.uart.all;                   -- types
-use gaisler.net.all;                    -- types
-use gaisler.memctrl.all;                -- spimctrl types
-
-
-architecture Behavioral of top is
-
-    function simulation_active return std_ulogic is
-        variable result : std_ulogic;
-    begin
-        result := '0';
-        -- pragma translate_off
-        result := '1';
-        -- pragma translate_on
-        return result;
-    end function simulation_active;
-
-
-
-    alias CARRIER_LED0 : std_logic is B2B_B3_L59_N;
-    alias CARRIER_LED1 : std_logic is B2B_B3_L59_P;
-    alias CARRIER_LED2 : std_logic is B2B_B3_L9_P;
-    alias CARRIER_LED3 : std_logic is B2B_B3_L9_N;
-    --
-    alias UART_RX      : std_logic is B2B_B2_L9_N;
-    alias UART_TX      : std_logic is B2B_B2_L6_P;
-
-
-    constant system_frequency_c : natural := 125_000_000;
-
-    -- system signals
-    signal clk_box      : std_ulogic;
-    signal clk_ready    : std_ulogic                    := '1';
-    --
-    signal reset_shreg  : std_ulogic_vector(3 downto 0) := (others => '1');
-    signal reset        : std_ulogic                    := '1';
-    signal reset_n      : std_ulogic                    := '0';
-    --
-    -- io signals
-    signal box_i0_break : std_ulogic;
-    signal gpioi        : gpio_in_type;
-    signal uarti        : uart_in_type;
-    --                                        
-    signal box_i0_gpioo : gpio_out_type;
-    signal box_i0_uarto : uart_out_type;
-
-
-begin
-
-    -- default output drivers
-    -- for unused blocks
-    PHY_MDC     <= '1';
-    PHY_TXEN    <= '0';
-    PHY_TXER    <= '0';
-    PHY_TXD     <= (others => '1');
-    PHY_GTXCLK  <= '0';
-    PHY_RESET_B <= '0';
-    PHY_COL     <= 'Z';
-    PHY_MDIO    <= 'Z';
-
-    MCB1_DRAM_RESET_B <= '0';
-    MCB1_DRAM_A       <= (others => '1');
-    MCB1_DRAM_BA      <= (others => '1');
-    MCB1_DRAM_CAS_B   <= '1';
-    MCB1_DRAM_RAS_B   <= '1';
-    MCB1_DRAM_WE_B    <= '1';
-    MCB1_DRAM_CKE     <= '0';
-    MCB1_DRAM_CK_N    <= '0';
-    MCB1_DRAM_CK_P    <= '1';
-    MCB1_DRAM_LDM     <= '0';
-    MCB1_DRAM_UDM     <= '0';
-    MCB1_DRAM_ODT     <= '1';
-    MCB1_DRAM_DQS_N   <= (others => 'Z');
-    MCB1_DRAM_DQS_P   <= (others => 'Z');
-    MCB1_DRAM_DQ      <= (others => 'Z');
-
-    MCB3_DRAM_RESET_B <= '0';
-    MCB3_DRAM_A       <= (others => '1');
-    MCB3_DRAM_BA      <= (others => '1');
-    MCB3_DRAM_CAS_B   <= '1';
-    MCB3_DRAM_RAS_B   <= '1';
-    MCB3_DRAM_WE_B    <= '1';
-    MCB3_DRAM_CKE     <= '0';
-    MCB3_DRAM_CK_N    <= '0';
-    MCB3_DRAM_CK_P    <= '1';
-    MCB3_DRAM_LDM     <= '0';
-    MCB3_DRAM_UDM     <= '0';
-    MCB3_DRAM_ODT     <= '1';
-    MCB3_DRAM_DQS_N   <= (others => 'Z');
-    MCB3_DRAM_DQS_P   <= (others => 'Z');
-    MCB3_DRAM_DQ      <= (others => 'Z');
-
-    SPI_FLASH_CSO_B <= '1';
-    SPI_FLASH_CCLK  <= '1';
-    SPI_FLASH_IO    <= (others => 'Z');
-
-    WATCHDOG <= 'Z';                    -- disable watchdog
-    --REPROG_N          <= '1';
-
-    MAC_DATA <= 'Z';
-
-    -- B2B J1 user IO
-    B2B_B2_L57_N <= 'Z';
-    B2B_B2_L57_P <= 'Z';
-    B2B_B2_L49_N <= 'Z';
-    B2B_B2_L49_P <= 'Z';
-    B2B_B2_L48_N <= 'Z';
-    B2B_B2_L48_P <= 'Z';
-    B2B_B2_L45_N <= 'Z';
-    B2B_B2_L45_P <= 'Z';
-    B2B_B2_L43_N <= 'Z';
-    B2B_B2_L43_P <= 'Z';
-    B2B_B2_L41_N <= 'Z';
-    B2B_B2_L41_P <= 'Z';
-    B2B_B2_L21_P <= 'Z';
-    B2B_B2_L21_N <= 'Z';
-    B2B_B2_L15_P <= 'Z';
-    B2B_B2_L15_N <= 'Z';
-    B2B_B2_L31_N <= 'Z';
-    B2B_B2_L32_N <= 'Z';
-    B2B_B2_L60_P <= 'Z';
-    B2B_B2_L60_N <= 'Z';
-    B2B_B2_L59_N <= 'Z';
-    B2B_B2_L59_P <= 'Z';
-    B2B_B2_L44_N <= 'Z';
-    B2B_B2_L44_P <= 'Z';
-    B2B_B2_L42_N <= 'Z';
-    B2B_B2_L42_P <= 'Z';
-    B2B_B2_L18_P <= 'Z';
-    B2B_B2_L18_N <= 'Z';
-    B2B_B2_L8_N  <= 'Z';
-    B2B_B2_L8_P  <= 'Z';
-    B2B_B2_L11_P <= 'Z';
-    B2B_B2_L11_N <= 'Z';
-    B2B_B2_L6_P  <= 'Z';
-    B2B_B2_L6_N  <= 'Z';
-    B2B_B2_L5_P  <= 'Z';
-    B2B_B2_L5_N  <= 'Z';
-    B2B_B2_L9_N  <= 'Z';
-    B2B_B2_L9_P  <= 'Z';
-    B2B_B2_L4_N  <= 'Z';
-    B2B_B2_L4_P  <= 'Z';
-    B2B_B2_L29_N <= 'Z';
-    B2B_B2_L10_N <= 'Z';
-    B2B_B2_L10_P <= 'Z';
-    B2B_B2_L2_N  <= 'Z';
-    B2B_B2_L2_P  <= 'Z';
-    B2B_B3_L60_N <= 'Z';
-    B2B_B3_L60_P <= 'Z';
-    --B2B_B3_L9_N       <= 'Z';
-    --B2B_B3_L9_P       <= 'Z';
-    B2B_B0_L3_P  <= 'Z';
-    B2B_B0_L3_N  <= 'Z';
-
-    -- B2B J2 user IO
-    --B2B_B3_L59_P      <= 'Z';
-    --B2B_B3_L59_N      <= 'Z';
-    B2B_B0_L32_P <= 'Z';
-    B2B_B0_L32_N <= 'Z';
-    B2B_B0_L7_N  <= 'Z';
-    B2B_B0_L7_P  <= 'Z';
-    B2B_B0_L33_N <= 'Z';
-    B2B_B0_L33_P <= 'Z';
-    B2B_B0_L36_P <= 'Z';
-    B2B_B0_L36_N <= 'Z';
-    B2B_B0_L49_P <= 'Z';
-    B2B_B0_L49_N <= 'Z';
-    B2B_B0_L62_P <= 'Z';
-    B2B_B0_L62_N <= 'Z';
-    B2B_B0_L66_P <= 'Z';
-    B2B_B0_L66_N <= 'Z';
-    B2B_B1_L10_P <= 'Z';
-    B2B_B1_L10_N <= 'Z';
-    B2B_B1_L9_P  <= 'Z';
-    B2B_B1_L9_N  <= 'Z';
-    B2B_B1_L21_N <= 'Z';
-    B2B_B1_L21_P <= 'Z';
-    B2B_B1_L61_P <= 'Z';
-    B2B_B1_L61_N <= 'Z';
-    B2B_B0_L2_P  <= 'Z';
-    B2B_B0_L2_N  <= 'Z';
-    B2B_B0_L4_N  <= 'Z';
-    B2B_B0_L4_P  <= 'Z';
-    B2B_B0_L5_N  <= 'Z';
-    B2B_B0_L5_P  <= 'Z';
-    B2B_B0_L6_N  <= 'Z';
-    B2B_B0_L6_P  <= 'Z';
-    B2B_B0_L8_N  <= 'Z';
-    B2B_B0_L8_P  <= 'Z';
-    B2B_B0_L34_N <= 'Z';
-    B2B_B0_L34_P <= 'Z';
-    B2B_B0_L35_N <= 'Z';
-    B2B_B0_L35_P <= 'Z';
-    B2B_B0_L37_N <= 'Z';
-    B2B_B0_L37_P <= 'Z';
-    B2B_B0_L38_N <= 'Z';
-    B2B_B0_L38_P <= 'Z';
-    B2B_B0_L50_N <= 'Z';
-    B2B_B0_L50_P <= 'Z';
-    B2B_B0_L51_N <= 'Z';
-    B2B_B0_L51_P <= 'Z';
-    B2B_B0_L63_N <= 'Z';
-    B2B_B0_L63_P <= 'Z';
-    B2B_B0_L64_N <= 'Z';
-    B2B_B0_L64_P <= 'Z';
-    B2B_B0_L65_N <= 'Z';
-    B2B_B0_L65_P <= 'Z';
-    B2B_B1_L20_P <= 'Z';
-    B2B_B1_L20_N <= 'Z';
-    B2B_B1_L19_P <= 'Z';
-    B2B_B1_L19_N <= 'Z';
-    B2B_B1_L59   <= 'Z';
-
-
-    ------------------------------------------------------------ 
-    -- (internal) reset generation
-    -- with wait for locked DCM
-    reset_generator_p : process(clk_box, clk_ready)
-    begin
-        if clk_ready = '0' then
-            reset_shreg <= (others => '1');
-        elsif rising_edge(clk_box) then
-            reset_shreg <= reset_shreg(reset_shreg'left-1 downto 0) & '0';
-        end if;
-    end process;
-    reset   <= reset_shreg(reset_shreg'left);
-    reset_n <= not reset;
-
-
-    ------------------------------------------------------------ 
-    -- clock selection
-    clk_box <= CLK;                     -- 125 MHz 
-
-    -- used IOs
-    -- LEDs
-    gpioi.sig_in <= (others => '0');
-    gpioi.sig_en <= (others => '0');
-    gpioi.din <= (4      => MAC_DATA,
-                  31     => simulation_active,
-                  others => '0');
-    CARRIER_LED0 <= not box_i0_gpioo.dout(0);
-    CARRIER_LED1 <= not box_i0_gpioo.dout(1);
-    CARRIER_LED2 <= not box_i0_gpioo.dout(2);
-    CARRIER_LED3 <= not box_i0_gpioo.dout(3);
-    user_led_n   <= not box_i0_gpioo.dout(5);
-    MAC_DATA     <= box_i0_gpioo.dout(4) when box_i0_gpioo.oen(4) = '0' else 'Z';
-
-    -- uart i/o             
-    uarti.rxd    <= UART_RX;
-    uarti.ctsn   <= '0';
-    uarti.extclk <= '0';
-    --                      
-    UART_TX      <= box_i0_uarto.txd;
-
-
-    ------------------------------------------------------------ 
-    -- box system
-    box_i0 : entity work.box
-        generic map (
-            simulation_active => simulation_active,  --: std_ulogic;
-            system_frequency  => system_frequency_c  --: integer
-            )                                                         
-        port map (
-            clk     => clk_box,                      --: in    std_ulogic;
-            reset_n => reset_n,                      --: in    std_ulogic;
-            break   => box_i0_break,                 --: out   std_ulogic;
-            --                                                               
-            uarti   => uarti,                        --: in    uart_in_type;
-            uarto   => box_i0_uarto,                 --: out   uart_out_type;
-            --                                                               
-            gpioi   => gpioi,                        --: in    gpio_in_type;
-            gpioo   => box_i0_gpioo                  --: out   gpio_out_type;
-            );
-
-
-    ------------------------------------------------------------ 
-    -- break handling
-    --
-    -- pragma translate_off
-    simulation_break <= box_i0_break;
-    -- pragma translate_on
-
-    -- reboot FPGA for real
-    REPROG_N <= not box_i0_break;
-
-
-    ------------------------------------------------------------ 
-    -- MCB stuff
-    --
-    mcb_stuff_b : block
-
-    begin
-
-        memc1_tb_top_inst : memc1_tb_top
-            generic map (
-                C_SIMULATION             => C1_SIMULATION,
-                C_P0_MASK_SIZE           => C1_P0_MASK_SIZE,
-                C_P0_DATA_PORT_SIZE      => C1_P0_DATA_PORT_SIZE,
-                C_P1_MASK_SIZE           => C1_P1_MASK_SIZE,
-                C_P1_DATA_PORT_SIZE      => C1_P1_DATA_PORT_SIZE,
-                C_NUM_DQ_PINS            => C1_NUM_DQ_PINS,
-                C_MEM_BURST_LEN          => C1_MEM_BURST_LEN,
-                C_MEM_NUM_COL_BITS       => C1_MEM_NUM_COL_BITS,
-                C_p0_BEGIN_ADDRESS       => C1_p0_BEGIN_ADDRESS,
-                C_p0_DATA_MODE           => C1_p0_DATA_MODE,
-                C_p0_END_ADDRESS         => C1_p0_END_ADDRESS,
-                C_p0_PRBS_EADDR_MASK_POS => C1_p0_PRBS_EADDR_MASK_POS,
-                C_p0_PRBS_SADDR_MASK_POS => C1_p0_PRBS_SADDR_MASK_POS,
-                C_p1_BEGIN_ADDRESS       => C1_p1_BEGIN_ADDRESS,
-                C_p1_DATA_MODE           => C1_p1_DATA_MODE,
-                C_p1_END_ADDRESS         => C1_p1_END_ADDRESS,
-                C_p1_PRBS_EADDR_MASK_POS => C1_p1_PRBS_EADDR_MASK_POS,
-                C_p1_PRBS_SADDR_MASK_POS => C1_p1_PRBS_SADDR_MASK_POS,
-                C_p2_BEGIN_ADDRESS       => C1_p2_BEGIN_ADDRESS,
-                C_p2_DATA_MODE           => C1_p2_DATA_MODE,
-                C_p2_END_ADDRESS         => C1_p2_END_ADDRESS,
-                C_p2_PRBS_EADDR_MASK_POS => C1_p2_PRBS_EADDR_MASK_POS,
-                C_p2_PRBS_SADDR_MASK_POS => C1_p2_PRBS_SADDR_MASK_POS
-                )
-            port map (
-                error                 => c1_error,
-                calib_done            => c1_calib_done,
-                clk0                  => c1_clk0,
-                rst0                  => c1_rst0,
-                cmp_error             => c1_cmp_error,
-                cmp_data_valid        => c1_cmp_data_valid,
-                vio_modify_enable     => c1_vio_modify_enable,
-                error_status          => c1_error_status,
-                vio_data_mode_value   => c1_vio_data_mode_value,
-                vio_addr_mode_value   => c1_vio_addr_mode_value,
-                cmp_data              => c1_cmp_data,
-                p0_mcb_cmd_en_o       => c1_p0_cmd_en,
-                p0_mcb_cmd_instr_o    => c1_p0_cmd_instr,
-                p0_mcb_cmd_bl_o       => c1_p0_cmd_bl,
-                p0_mcb_cmd_addr_o     => c1_p0_cmd_byte_addr,
-                p0_mcb_cmd_full_i     => c1_p0_cmd_full,
-                p0_mcb_wr_en_o        => c1_p0_wr_en,
-                p0_mcb_wr_mask_o      => c1_p0_wr_mask,
-                p0_mcb_wr_data_o      => c1_p0_wr_data,
-                p0_mcb_wr_full_i      => c1_p0_wr_full,
-                p0_mcb_wr_fifo_counts => c1_p0_wr_count,
-                p0_mcb_rd_en_o        => c1_p0_rd_en,
-                p0_mcb_rd_data_i      => c1_p0_rd_data,
-                p0_mcb_rd_empty_i     => c1_p0_rd_empty,
-                p0_mcb_rd_fifo_counts => c1_p0_rd_count,
-                p1_mcb_cmd_en_o       => c1_p1_cmd_en,
-                p1_mcb_cmd_instr_o    => c1_p1_cmd_instr,
-                p1_mcb_cmd_bl_o       => c1_p1_cmd_bl,
-                p1_mcb_cmd_addr_o     => c1_p1_cmd_byte_addr,
-                p1_mcb_cmd_full_i     => c1_p1_cmd_full,
-                p1_mcb_wr_en_o        => c1_p1_wr_en,
-                p1_mcb_wr_mask_o      => c1_p1_wr_mask,
-                p1_mcb_wr_data_o      => c1_p1_wr_data,
-                p1_mcb_wr_full_i      => c1_p1_wr_full,
-                p1_mcb_wr_fifo_counts => c1_p1_wr_count,
-                p1_mcb_rd_en_o        => c1_p1_rd_en,
-                p1_mcb_rd_data_i      => c1_p1_rd_data,
-                p1_mcb_rd_empty_i     => c1_p1_rd_empty,
-                p1_mcb_rd_fifo_counts => c1_p1_rd_count,
-                p2_mcb_cmd_en_o       => c1_p2_cmd_en,
-                p2_mcb_cmd_instr_o    => c1_p2_cmd_instr,
-                p2_mcb_cmd_bl_o       => c1_p2_cmd_bl,
-                p2_mcb_cmd_addr_o     => c1_p2_cmd_byte_addr,
-                p2_mcb_cmd_full_i     => c1_p2_cmd_full,
-                p2_mcb_wr_en_o        => c1_p2_wr_en,
-                p2_mcb_wr_mask_o      => c1_p2_wr_mask,
-                p2_mcb_wr_data_o      => c1_p2_wr_data,
-                p2_mcb_wr_full_i      => c1_p2_wr_full,
-                p2_mcb_wr_fifo_counts => c1_p2_wr_count,
-                p2_mcb_rd_en_o        => c1_p2_rd_en,
-                p2_mcb_rd_data_i      => c1_p2_rd_data,
-                p2_mcb_rd_empty_i     => c1_p2_rd_empty,
-                p2_mcb_rd_fifo_counts => c1_p2_rd_count
-                );
-
-
-        memc3_tb_top_inst : memc3_tb_top
-            generic map (
-                C_SIMULATION             => C3_SIMULATION,
-                C_P0_MASK_SIZE           => C3_P0_MASK_SIZE,
-                C_P0_DATA_PORT_SIZE      => C3_P0_DATA_PORT_SIZE,
-                C_P1_MASK_SIZE           => C3_P1_MASK_SIZE,
-                C_P1_DATA_PORT_SIZE      => C3_P1_DATA_PORT_SIZE,
-                C_NUM_DQ_PINS            => C3_NUM_DQ_PINS,
-                C_MEM_BURST_LEN          => C3_MEM_BURST_LEN,
-                C_MEM_NUM_COL_BITS       => C3_MEM_NUM_COL_BITS,
-                C_p0_BEGIN_ADDRESS       => C3_p0_BEGIN_ADDRESS,
-                C_p0_DATA_MODE           => C3_p0_DATA_MODE,
-                C_p0_END_ADDRESS         => C3_p0_END_ADDRESS,
-                C_p0_PRBS_EADDR_MASK_POS => C3_p0_PRBS_EADDR_MASK_POS,
-                C_p0_PRBS_SADDR_MASK_POS => C3_p0_PRBS_SADDR_MASK_POS,
-                C_p1_BEGIN_ADDRESS       => C3_p1_BEGIN_ADDRESS,
-                C_p1_DATA_MODE           => C3_p1_DATA_MODE,
-                C_p1_END_ADDRESS         => C3_p1_END_ADDRESS,
-                C_p1_PRBS_EADDR_MASK_POS => C3_p1_PRBS_EADDR_MASK_POS,
-                C_p1_PRBS_SADDR_MASK_POS => C3_p1_PRBS_SADDR_MASK_POS,
-                C_p2_BEGIN_ADDRESS       => C3_p2_BEGIN_ADDRESS,
-                C_p2_DATA_MODE           => C3_p2_DATA_MODE,
-                C_p2_END_ADDRESS         => C3_p2_END_ADDRESS,
-                C_p2_PRBS_EADDR_MASK_POS => C3_p2_PRBS_EADDR_MASK_POS,
-                C_p2_PRBS_SADDR_MASK_POS => C3_p2_PRBS_SADDR_MASK_POS
-                )
-            port map (
-                error                 => c3_error,
-                calib_done            => c3_calib_done,
-                clk0                  => c3_clk0,
-                rst0                  => c3_rst0,
-                cmp_error             => c3_cmp_error,
-                cmp_data_valid        => c3_cmp_data_valid,
-                vio_modify_enable     => c3_vio_modify_enable,
-                error_status          => c3_error_status,
-                vio_data_mode_value   => c3_vio_data_mode_value,
-                vio_addr_mode_value   => c3_vio_addr_mode_value,
-                cmp_data              => c3_cmp_data,
-                p0_mcb_cmd_en_o       => c3_p0_cmd_en,
-                p0_mcb_cmd_instr_o    => c3_p0_cmd_instr,
-                p0_mcb_cmd_bl_o       => c3_p0_cmd_bl,
-                p0_mcb_cmd_addr_o     => c3_p0_cmd_byte_addr,
-                p0_mcb_cmd_full_i     => c3_p0_cmd_full,
-                p0_mcb_wr_en_o        => c3_p0_wr_en,
-                p0_mcb_wr_mask_o      => c3_p0_wr_mask,
-                p0_mcb_wr_data_o      => c3_p0_wr_data,
-                p0_mcb_wr_full_i      => c3_p0_wr_full,
-                p0_mcb_wr_fifo_counts => c3_p0_wr_count,
-                p0_mcb_rd_en_o        => c3_p0_rd_en,
-                p0_mcb_rd_data_i      => c3_p0_rd_data,
-                p0_mcb_rd_empty_i     => c3_p0_rd_empty,
-                p0_mcb_rd_fifo_counts => c3_p0_rd_count,
-                p1_mcb_cmd_en_o       => c3_p1_cmd_en,
-                p1_mcb_cmd_instr_o    => c3_p1_cmd_instr,
-                p1_mcb_cmd_bl_o       => c3_p1_cmd_bl,
-                p1_mcb_cmd_addr_o     => c3_p1_cmd_byte_addr,
-                p1_mcb_cmd_full_i     => c3_p1_cmd_full,
-                p1_mcb_wr_en_o        => c3_p1_wr_en,
-                p1_mcb_wr_mask_o      => c3_p1_wr_mask,
-                p1_mcb_wr_data_o      => c3_p1_wr_data,
-                p1_mcb_wr_full_i      => c3_p1_wr_full,
-                p1_mcb_wr_fifo_counts => c3_p1_wr_count,
-                p1_mcb_rd_en_o        => c3_p1_rd_en,
-                p1_mcb_rd_data_i      => c3_p1_rd_data,
-                p1_mcb_rd_empty_i     => c3_p1_rd_empty,
-                p1_mcb_rd_fifo_counts => c3_p1_rd_count,
-                p2_mcb_cmd_en_o       => c3_p2_cmd_en,
-                p2_mcb_cmd_instr_o    => c3_p2_cmd_instr,
-                p2_mcb_cmd_bl_o       => c3_p2_cmd_bl,
-                p2_mcb_cmd_addr_o     => c3_p2_cmd_byte_addr,
-                p2_mcb_cmd_full_i     => c3_p2_cmd_full,
-                p2_mcb_wr_en_o        => c3_p2_wr_en,
-                p2_mcb_wr_mask_o      => c3_p2_wr_mask,
-                p2_mcb_wr_data_o      => c3_p2_wr_data,
-                p2_mcb_wr_full_i      => c3_p2_wr_full,
-                p2_mcb_wr_fifo_counts => c3_p2_wr_count,
-                p2_mcb_rd_en_o        => c3_p2_rd_en,
-                p2_mcb_rd_data_i      => c3_p2_rd_data,
-                p2_mcb_rd_empty_i     => c3_p2_rd_empty,
-                p2_mcb_rd_fifo_counts => c3_p2_rd_count
-                );
-
-    end block mcb_stuff_b;
-
-
-end architecture Behavioral;
-
diff --git a/mig_test/rtl/zpu_config.vhd b/mig_test/rtl/zpu_config.vhd
deleted file mode 100644
index ae410e2..0000000
--- a/mig_test/rtl/zpu_config.vhd
+++ /dev/null
@@ -1,61 +0,0 @@
--- ZPU

---

--- Copyright 2004-2008 oharboe - Øyvind Harboe - oyvind.harboe@zylin.com

--- 

--- The FreeBSD license

--- 

--- Redistribution and use in source and binary forms, with or without

--- modification, are permitted provided that the following conditions

--- are met:

--- 

--- 1. Redistributions of source code must retain the above copyright

---    notice, this list of conditions and the following disclaimer.

--- 2. Redistributions in binary form must reproduce the above

---    copyright notice, this list of conditions and the following

---    disclaimer in the documentation and/or other materials

---    provided with the distribution.

--- 

--- THIS SOFTWARE IS PROVIDED BY THE ZPU PROJECT ``AS IS'' AND ANY

--- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,

--- THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A

--- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE

--- ZPU PROJECT OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,

--- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES

--- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS

--- OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)

--- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,

--- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)

--- ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF

--- ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

--- 

--- The views and conclusions contained in the software and documentation

--- are those of the authors and should not be interpreted as representing

--- official policies, either expressed or implied, of the ZPU Project.

-

-library ieee;

-use ieee.std_logic_1164.all;

-use ieee.numeric_std.all;

-

-package zpu_config is

-	-- generate trace output

-	constant	Generate_Trace		: boolean := false;

-	constant 	wordPower			: integer := 5;

-	-- during simulation, set this to '0' to get matching trace.txt 

-	constant	DontCareValue		: std_logic := '0';

-	-- Clock frequency in MHz.

-	constant	ZPU_Frequency		: std_ulogic_vector(7 downto 0) := std_ulogic_vector(to_unsigned(50, 8));

-	-- This is the msb address bit. bytes=2^(maxAddrBitIncIO+1)

-	constant 	maxAddrBitIncIO		: integer := 31; -- BLa: 31 -- was: 27

-	--constant 	maxAddrBitBRAM		: integer := 13; -- 16k

-	constant 	maxAddrBitBRAM		: integer := 14; -- 32k

-	--constant 	maxAddrBitBRAM		: integer := 16;

-		

-    --

-    -- derived constants

-    constant    bram_words          : integer := 2 ** (maxAddrBitBRAM - 1);

-

-	-- start byte address of stack. 

-	-- point to top of RAM - 2*words

-	constant 	spStart				: unsigned(maxAddrBitIncIO downto 0) :=

-				to_unsigned((4*bram_words)-8, maxAddrBitIncIO+1);

-end zpu_config;