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author | oharboe <oharboe> | 2008-10-10 07:07:57 +0000 |
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committer | oharboe <oharboe> | 2008-10-10 07:07:57 +0000 |
commit | 104c29feaeee40e94580b952b8cf793d54727612 (patch) | |
tree | bb484d2ccdc0e9e52395309087d1ba6215cef53c | |
parent | 07df0bc85fffae0e271cbad3fd43260b486baebc (diff) | |
download | zpu-104c29feaeee40e94580b952b8cf793d54727612.zip zpu-104c29feaeee40e94580b952b8cf793d54727612.tar.gz |
a few words about the ZY1000 ZPU JTAG debugger
-rw-r--r-- | zpu/docs/zpu_arch.html | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/zpu/docs/zpu_arch.html b/zpu/docs/zpu_arch.html index e7cf30c..7ddbea7 100644 --- a/zpu/docs/zpu_arch.html +++ b/zpu/docs/zpu_arch.html @@ -23,6 +23,7 @@ $id$ <li> <a href="#performance">Speeding up the ZPU</a> <li> <a href="#debuguart">Debug channel / UART</a> <li> <a href="#wishbone">Wishbone</a> +<li> <a href="#hwdebugger">JTAG/hardware debugger for GDB</a> <li> <a href="#zpu_core_small.vhd">About zpu_core_small.vhd</a> <li> <a href="#zpu_core.vhd">About zpu_core.vhd</a> <li> <a href="#zealot">Zealot: Implementing in FPGAs</a> @@ -1481,6 +1482,29 @@ of the ZPU, which differs slightly from <a href="../hdl/zpu4/core" target="_blan <p> The ZY2000 is a complete implementation of the ZPU including: DRAM, soft-MAC, wishbone bridges, GPIO subsystem, etc. This also included an eCos HAL w/TCP/IP support. + +<a name="hwdebugger"/> +<h1>JTAG/hardware debugger for GDB</h1> +The Zylin <a href="http://www.zylin.com/zy1000.html">ZY1000</a> JTAG debugger supports +the ZPU. Contact <a href="http://www.zylin.com">Zylin</a> for pricing and details. +<p> +There are two debug modes in which the ZY1000 can operate: +<ul> +<li>Classic. Here the ZY1000 controls the CPU and examines the state. The ZY1000 has a built in +GDB server that GDB talks to. +<li>Small footprint. If there isn't enough space on the device for the ZPU *and* the JTAG +controller, then the ZY1000 can run the ZPU externally. The JTAG communication channel is +then used to peek/poke peripherals and inside the FPGA instead of the ZPU there is then +a JTAG controller that peeks and pokes the peripherals of the ZPU. There are advantages +and disadvantages of this approach: it may be unfamiliar to embedded developers and +the timing is different from the "real" ZPU(interrupts are delayed, execution speed +differse, etc.) On the other hand there are other things +which are simpler: much more RAM can be available for the ZPU during development, +better debug consoles(faster), additional peripheral(timers, etc.) is available. This +approach is somewhat unique to the ZPU as the ZPU is simple enough that it can be +implemented efficiently in this manner. +</ul> + <a name="interrupts"/> <h1>Interrupts</h1> The ZPU supports interrupts. |