blob: 34b98f276ed03c0d758d50aef27e95e63c11d52d (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
/*
* Xilinx DMA Engine drivers support header file
*
* Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
*
* This is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __DMA_XILINX_DMA_H
#define __DMA_XILINX_DMA_H
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
/**
* struct xilinx_vdma_config - VDMA Configuration structure
* @frm_dly: Frame delay
* @gen_lock: Whether in gen-lock mode
* @master: Master that it syncs to
* @frm_cnt_en: Enable frame count enable
* @park: Whether wants to park
* @park_frm: Frame to park on
* @coalesc: Interrupt coalescing threshold
* @delay: Delay counter
* @reset: Reset Channel
* @ext_fsync: External Frame Sync source
*/
struct xilinx_vdma_config {
int frm_dly;
int gen_lock;
int master;
int frm_cnt_en;
int park;
int park_frm;
int coalesc;
int delay;
int reset;
int ext_fsync;
};
int xilinx_vdma_channel_set_config(struct dma_chan *dchan,
struct xilinx_vdma_config *cfg);
#endif
|
