summaryrefslogtreecommitdiffstats
path: root/include/asm-mips/asmmacro.h
blob: 2c42f6b00a49e2f171d09043395e35d39781e947 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
/*
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2003 Ralf Baechle
 */
#ifndef _ASM_ASMMACRO_H
#define _ASM_ASMMACRO_H

#include <asm/hazards.h>

#ifdef CONFIG_32BIT
#include <asm/asmmacro-32.h>
#endif
#ifdef CONFIG_64BIT
#include <asm/asmmacro-64.h>
#endif
#ifdef CONFIG_MIPS_MT_SMTC
#include <asm/mipsmtregs.h>
#endif

#ifdef CONFIG_MIPS_MT_SMTC
	.macro	local_irq_enable reg=t0
	mfc0	\reg, CP0_TCSTATUS
	ori	\reg, \reg, TCSTATUS_IXMT
	xori	\reg, \reg, TCSTATUS_IXMT
	mtc0	\reg, CP0_TCSTATUS
	ehb
	.endm

	.macro	local_irq_disable reg=t0
	mfc0	\reg, CP0_TCSTATUS
	ori	\reg, \reg, TCSTATUS_IXMT
	mtc0	\reg, CP0_TCSTATUS
	ehb
	.endm
#else
	.macro	local_irq_enable reg=t0
	mfc0	\reg, CP0_STATUS
	ori	\reg, \reg, 1
	mtc0	\reg, CP0_STATUS
	irq_enable_hazard
	.endm

	.macro	local_irq_disable reg=t0
	mfc0	\reg, CP0_STATUS
	ori	\reg, \reg, 1
	xori	\reg, \reg, 1
	mtc0	\reg, CP0_STATUS
	irq_disable_hazard
	.endm
#endif /* CONFIG_MIPS_MT_SMTC */

#ifdef CONFIG_CPU_SB1
	.macro	fpu_enable_hazard
	.set	push
	.set	noreorder
	.set	mips2
	SSNOP
	bnezl	$0, .+4
	 SSNOP
	.set	pop
	.endm
#else
	.macro	fpu_enable_hazard
	.endm
#endif

/*
 * Temporary until all gas have MT ASE support
 */
	.macro	DMT	reg=0
	.word	(0x41600bc1 | (\reg << 16))
	.endm

	.macro	EMT	reg=0
	.word	(0x41600be1 | (\reg << 16))
	.endm

	.macro	DVPE	reg=0
	.word	(0x41600001 | (\reg << 16))
	.endm

	.macro	EVPE	reg=0
	.word	(0x41600021 | (\reg << 16))
	.endm

	.macro	MFTR	rt=0, rd=0, u=0, sel=0
	 .word	(0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
	.endm

	.macro	MTTR	rt=0, rd=0, u=0, sel=0
	 .word	(0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel))
	.endm

#endif /* _ASM_ASMMACRO_H */
OpenPOWER on IntegriCloud