summaryrefslogtreecommitdiffstats
path: root/include/asm-arm26/system.h
blob: 71b89c4a3c320488471f138f95fb42c59a4b8a18 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
#ifndef __ASM_ARM_SYSTEM_H
#define __ASM_ARM_SYSTEM_H

#ifdef __KERNEL__

#include <linux/config.h>

/*
 * This is used to ensure the compiler did actually allocate the register we
 * asked it for some inline assembly sequences.  Apparently we can't trust
 * the compiler from one version to another so a bit of paranoia won't hurt.
 * This string is meant to be concatenated with the inline asm string and
 * will cause compilation to stop on mismatch. (From ARM32 - may come in handy)
 */
#define __asmeq(x, y)  ".ifnc " x "," y " ; .err ; .endif\n\t"

#ifndef __ASSEMBLY__

#include <linux/linkage.h>

struct thread_info;
struct task_struct;

#if 0
/* information about the system we're running on */
extern unsigned int system_rev;
extern unsigned int system_serial_low;
extern unsigned int system_serial_high;
extern unsigned int mem_fclk_21285;

FIXME - sort this
/*
 * We need to turn the caches off before calling the reset vector - RiscOS
 * messes up if we don't
 */
#define proc_hard_reset()       cpu_proc_fin()

#endif

struct pt_regs;

void die(const char *msg, struct pt_regs *regs, int err)
		__attribute__((noreturn));

void die_if_kernel(const char *str, struct pt_regs *regs, int err);

void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
				       struct pt_regs *),
		     int sig, const char *name);

#include <asm/proc-fns.h>

#define xchg(ptr,x) \
	((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))

#define tas(ptr) (xchg((ptr),1))

extern asmlinkage void __backtrace(void);

#define set_cr(x)					\
	__asm__ __volatile__(				\
	"mcr	p15, 0, %0, c1, c0, 0	@ set CR"	\
	: : "r" (x) : "cc")

#define get_cr()					\
	({						\
	unsigned int __val;				\
	__asm__ __volatile__(				\
	"mrc	p15, 0, %0, c1, c0, 0	@ get CR"	\
	: "=r" (__val) : : "cc");			\
	__val;						\
	})

extern unsigned long cr_no_alignment;	/* defined in entry-armv.S */
extern unsigned long cr_alignment;	/* defined in entry-armv.S */

#define UDBG_UNDEFINED	(1 << 0)
#define UDBG_SYSCALL	(1 << 1)
#define UDBG_BADABORT	(1 << 2)
#define UDBG_SEGV	(1 << 3)
#define UDBG_BUS	(1 << 4)

extern unsigned int user_debug;

#define vectors_base()	(0)

#define mb() __asm__ __volatile__ ("" : : : "memory")
#define rmb() mb()
#define wmb() mb()
#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");

#define read_barrier_depends() do { } while(0)
#define set_mb(var, value)  do { var = value; mb(); } while (0)
#define set_wmb(var, value) do { var = value; wmb(); } while (0)

/*
 * We assume knowledge of how
 * spin_unlock_irq() and friends are implemented.  This avoids
 * us needlessly decrementing and incrementing the preempt count.
 */
#define prepare_arch_switch(rq,next)	local_irq_enable()
#define finish_arch_switch(rq,prev)	spin_unlock(&(rq)->lock)

/*
 * switch_to(prev, next) should switch from task `prev' to `next'
 * `prev' will never be the same as `next'.  schedule() itself
 * contains the memory barrier to tell GCC not to cache `current'.
 */
extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *);

#define switch_to(prev,next,last)					\
do {									\
	last = __switch_to(prev,task_thread_info(prev),task_thread_info(next));	\
} while (0)

/*
 * On SMP systems, when the scheduler does migration-cost autodetection,
 * it needs a way to flush as much of the CPU's caches as possible.
 *
 * TODO: fill this in!
 */
static inline void sched_cacheflush(void)
{
}

/*
 * Save the current interrupt enable state & disable IRQs
 */
#define local_irq_save(x)                               \
        do {                                            \
          unsigned long temp;                           \
          __asm__ __volatile__(                         \
"       mov     %0, pc          @ save_flags_cli\n"     \
"       orr     %1, %0, #0x08000000\n"                  \
"       and     %0, %0, #0x0c000000\n"                  \
"       teqp    %1, #0\n"                               \
          : "=r" (x), "=r" (temp)                       \
          :                                             \
          : "memory");                                  \
        } while (0)

/*
 * Enable IRQs  (sti)
 */
#define local_irq_enable()                                      \
        do {                                    \
          unsigned long temp;                   \
          __asm__ __volatile__(                 \
"       mov     %0, pc          @ sti\n"        \
"       bic     %0, %0, #0x08000000\n"          \
"       teqp    %0, #0\n"                       \
          : "=r" (temp)                         \
          :                                     \
          : "memory");                          \
        } while(0)

/*
 * Disable IRQs (cli)
 */
#define local_irq_disable()                                     \
        do {                                    \
          unsigned long temp;                   \
          __asm__ __volatile__(                 \
"       mov     %0, pc          @ cli\n"        \
"       orr     %0, %0, #0x08000000\n"          \
"       teqp    %0, #0\n"                       \
          : "=r" (temp)                         \
          :                                     \
          : "memory");                          \
        } while(0)

/* Enable FIQs (stf) */

#define __stf() do {                            \
        unsigned long temp;                     \
        __asm__ __volatile__(                   \
"       mov     %0, pc          @ stf\n"        \
"       bic     %0, %0, #0x04000000\n"          \
"       teqp    %0, #0\n"                       \
        : "=r" (temp));                         \
    } while(0)

/* Disable FIQs  (clf) */

#define __clf() do {                            \
        unsigned long temp;                     \
        __asm__ __volatile__(                   \
"       mov     %0, pc          @ clf\n"        \
"       orr     %0, %0, #0x04000000\n"          \
"       teqp    %0, #0\n"                       \
        : "=r" (temp));                         \
    } while(0)


/*
 * Save the current interrupt enable state.
 */
#define local_save_flags(x)                             \
        do {                                    \
          __asm__ __volatile__(                 \
"       mov     %0, pc          @ save_flags\n" \
"       and     %0, %0, #0x0c000000\n"          \
          : "=r" (x));                          \
        } while (0)


/*
 * restore saved IRQ & FIQ state
 */
#define local_irq_restore(x)                            \
        do {                                            \
          unsigned long temp;                           \
          __asm__ __volatile__(                         \
"       mov     %0, pc          @ restore_flags\n"      \
"       bic     %0, %0, #0x0c000000\n"                  \
"       orr     %0, %0, %1\n"                           \
"       teqp    %0, #0\n"                               \
          : "=&r" (temp)                                \
          : "r" (x)                                     \
          : "memory");                                  \
        } while (0)


#ifdef CONFIG_SMP
#error SMP not supported
#endif

#define smp_mb()		barrier()
#define smp_rmb()		barrier()
#define smp_wmb()		barrier()
#define smp_read_barrier_depends()		do { } while(0)

#define clf()			__clf()
#define stf()			__stf()

#define irqs_disabled()			\
({					\
	unsigned long flags;		\
	local_save_flags(flags);	\
	flags & PSR_I_BIT;		\
})

static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
{
        extern void __bad_xchg(volatile void *, int);

        switch (size) {
                case 1: return cpu_xchg_1(x, ptr);
                case 4: return cpu_xchg_4(x, ptr);
                default: __bad_xchg(ptr, size);
        }
        return 0;
}

#endif /* __ASSEMBLY__ */

#define arch_align_stack(x) (x)

#endif /* __KERNEL__ */

#endif
OpenPOWER on IntegriCloud