blob: 424cfe9f3b2a286d17038bc85e00370b895ecc54 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
|
#ifndef ISP2401
/*
* Support for Intel Camera Imaging ISP subsystem.
* Copyright (c) 2015, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#else
/**
Support for Intel Camera Imaging ISP subsystem.
Copyright (c) 2010 - 2015, Intel Corporation.
This program is free software; you can redistribute it and/or modify it
under the terms and conditions of the GNU General Public License,
version 2, as published by the Free Software Foundation.
This program is distributed in the hope it will be useful, but WITHOUT
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
more details.
*/
#endif
#ifndef __IBUF_CTRL_RMGR_H_INCLUDED__
#define __IBUF_CTRL_RMGR_H_INCLUDED__
#define MAX_IBUF_HANDLES 24
#define MAX_INPUT_BUFFER_SIZE (64 * 1024)
#define IBUF_ALIGN 8
typedef struct ibuf_handle_s ibuf_handle_t;
struct ibuf_handle_s {
uint32_t start_addr;
uint32_t size;
bool active;
};
typedef struct ibuf_rsrc_s ibuf_rsrc_t;
struct ibuf_rsrc_s {
uint32_t free_start_addr;
uint32_t free_size;
uint16_t num_active;
uint16_t num_allocated;
ibuf_handle_t handles[MAX_IBUF_HANDLES];
};
#endif /* __IBUF_CTRL_RMGR_H_INCLUDED */
|
