summaryrefslogtreecommitdiffstats
path: root/arch/score/kernel/irq.c
blob: 47647dde09caef3eae17a8a58db399e0649a5367 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
/*
 * arch/score/kernel/irq.c
 *
 * Score Processor version.
 *
 * Copyright (C) 2009 Sunplus Core Technology Co., Ltd.
 *  Chen Liqin <liqin.chen@sunplusct.com>
 *  Lennox Wu <lennox.wu@sunplusct.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>

#include <asm/io.h>

/* the interrupt controller is hardcoded at this address */
#define SCORE_PIC		((u32 __iomem __force *)0x95F50000)

#define INT_PNDL		0
#define INT_PNDH		1
#define INT_PRIORITY_M		2
#define INT_PRIORITY_SG0	4
#define INT_PRIORITY_SG1	5
#define INT_PRIORITY_SG2	6
#define INT_PRIORITY_SG3	7
#define INT_MASKL		8
#define INT_MASKH		9

/*
 * handles all normal device IRQs
 */
asmlinkage void do_IRQ(int irq)
{
	irq_enter();
	generic_handle_irq(irq);
	irq_exit();
}

static void score_mask(unsigned int irq_nr)
{
	unsigned int irq_source = 63 - irq_nr;

	if (irq_source < 32)
		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \
			(1 << irq_source)), SCORE_PIC + INT_MASKL);
	else
		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \
			(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
}

static void score_unmask(unsigned int irq_nr)
{
	unsigned int irq_source = 63 - irq_nr;

	if (irq_source < 32)
		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \
			~(1 << irq_source)), SCORE_PIC + INT_MASKL);
	else
		__raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \
			~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH);
}

struct irq_chip score_irq_chip = {
	.name		= "Score7-level",
	.mask		= score_mask,
	.mask_ack	= score_mask,
	.unmask		= score_unmask,
};

/*
 * initialise the interrupt system
 */
void __init init_IRQ(void)
{
	int index;
	unsigned long target_addr;

	for (index = 0; index < NR_IRQS; ++index)
		set_irq_chip_and_handler(index, &score_irq_chip,
					 handle_level_irq);

	for (target_addr = IRQ_VECTOR_BASE_ADDR;
		target_addr <= IRQ_VECTOR_END_ADDR;
		target_addr += IRQ_VECTOR_SIZE)
		memcpy((void *)target_addr, \
			interrupt_exception_vector, IRQ_VECTOR_SIZE);

	__raw_writel(0xffffffff, SCORE_PIC + INT_MASKL);
	__raw_writel(0xffffffff, SCORE_PIC + INT_MASKH);

	__asm__ __volatile__(
		"mtcr	%0, cr3\n\t"
		: : "r" (EXCEPTION_VECTOR_BASE_ADDR | \
			VECTOR_ADDRESS_OFFSET_MODE16));
}

/*
 * Generic, controller-independent functions:
 */
int show_interrupts(struct seq_file *p, void *v)
{
	int i = *(loff_t *)v, cpu;
	struct irqaction *action;
	unsigned long flags;

	if (i == 0) {
		seq_puts(p, "           ");
		for_each_online_cpu(cpu)
			seq_printf(p, "CPU%d       ", cpu);
		seq_putc(p, '\n');
	}

	if (i < NR_IRQS) {
		spin_lock_irqsave(&irq_desc[i].lock, flags);
		action = irq_desc[i].action;
		if (!action)
			goto unlock;

		seq_printf(p, "%3d: ", i);
		seq_printf(p, "%10u ", kstat_irqs(i));
		seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
		seq_printf(p, "  %s", action->name);
		for (action = action->next; action; action = action->next)
			seq_printf(p, ", %s", action->name);

		seq_putc(p, '\n');
unlock:
		spin_unlock_irqrestore(&irq_desc[i].lock, flags);
	}

	return 0;
}
OpenPOWER on IntegriCloud