summaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/ksi8560.dts
blob: bdb7fc0fa3327c53e0ccfc8bf054a12684766a20 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
/*
 * Device Tree Source for Emerson KSI8560
 *
 * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
 *
 * Based on mpc8560ads.dts
 *
 * 2008 (c) MontaVista, Software, Inc.  This file is licensed under
 * the terms of the GNU General Public License version 2.  This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 *
 */

/dts-v1/;

/ {
	model = "KSI8560";
	compatible = "emerson,KSI8560";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &enet0;
		ethernet1 = &enet1;
		ethernet2 = &enet2;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8560@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <32>;
			i-cache-line-size = <32>;
			d-cache-size = <0x8000>;		/* L1, 32K */
			i-cache-size = <0x8000>;		/* L1, 32K */
			timebase-frequency = <0>;		/* From U-boot */
			bus-frequency = <0>;			/* From U-boot */
			clock-frequency = <0>;			/* From U-boot */
			next-level-cache = <&L2>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;			/* Fixed by bootwrapper */
	};

	soc@fdf00000 {
		#address-cells = <1>;
		#size-cells = <1>;
		device_type = "soc";
		ranges = <0x00000000 0xfdf00000 0x00100000>;
		bus-frequency = <0>;				/* Fixed by bootwrapper */

		ecm-law@0 {
			compatible = "fsl,ecm-law";
			reg = <0x0 0x1000>;
			fsl,num-laws = <8>;
		};

		ecm@1000 {
			compatible = "fsl,mpc8560-ecm", "fsl,ecm";
			reg = <0x1000 0x1000>;
			interrupts = <17 2>;
			interrupt-parent = <&mpic>;
		};

		memory-controller@2000 {
			compatible = "fsl,mpc8540-memory-controller";
			reg = <0x2000 0x1000>;
			interrupt-parent = <&mpic>;
			interrupts = <0x12 0x2>;
		};

		L2: l2-cache-controller@20000 {
			compatible = "fsl,mpc8540-l2-cache-controller";
			reg = <0x20000 0x1000>;
			cache-line-size = <0x20>;		/* 32 bytes */
			cache-size = <0x40000>;			/* L2, 256K */
			interrupt-parent = <&mpic>;
			interrupts = <0x10 0x2>;
		};

		i2c@3000 {
			#address-cells = <1>;
			#size-cells = <0>;
			cell-index = <0>;
			compatible = "fsl-i2c";
			reg = <0x3000 0x100>;
			interrupts = <0x2b 0x2>;
			interrupt-parent = <&mpic>;
			dfsrr;
		};

		dma@21300 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
			reg = <0x21300 0x4>;
			ranges = <0x0 0x21100 0x200>;
			cell-index = <0>;
			dma-channel@0 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x0 0x80>;
				cell-index = <0>;
				interrupt-parent = <&mpic>;
				interrupts = <20 2>;
			};
			dma-channel@80 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x80 0x80>;
				cell-index = <1>;
				interrupt-parent = <&mpic>;
				interrupts = <21 2>;
			};
			dma-channel@100 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x100 0x80>;
				cell-index = <2>;
				interrupt-parent = <&mpic>;
				interrupts = <22 2>;
			};
			dma-channel@180 {
				compatible = "fsl,mpc8560-dma-channel",
						"fsl,eloplus-dma-channel";
				reg = <0x180 0x80>;
				cell-index = <3>;
				interrupt-parent = <&mpic>;
				interrupts = <23 2>;
			};
		};

		enet0: ethernet@24000 {
			#address-cells = <1>;
			#size-cells = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x24000 0x1000>;
			ranges = <0x0 0x24000 0x1000>;
			/* Mac address filled in by bootwrapper */
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi0>;
			phy-handle = <&PHY1>;

			mdio@520 {					/* For TSECs */
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-mdio";
				reg = <0x520 0x20>;

				PHY1: ethernet-phy@1 {
					interrupt-parent = <&mpic>;
					reg = <0x1>;
					device_type = "ethernet-phy";
				};

				PHY2: ethernet-phy@2 {
					interrupt-parent = <&mpic>;
					reg = <0x2>;
					device_type = "ethernet-phy";
				};

				tbi0: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		enet1: ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <1>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <0x25000 0x1000>;
			ranges = <0x0 0x25000 0x1000>;
			/* Mac address filled in by bootwrapper */
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
			interrupt-parent = <&mpic>;
			tbi-handle = <&tbi1>;
			phy-handle = <&PHY2>;

			mdio@520 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,gianfar-tbi";
				reg = <0x520 0x20>;

				tbi1: tbi-phy@11 {
					reg = <0x11>;
					device_type = "tbi-phy";
				};
			};
		};

		mpic: pic@40000 {
			#address-cells = <0>;
			#interrupt-cells = <2>;
			interrupt-controller;
			reg = <0x40000 0x40000>;
			device_type = "open-pic";
		};

		cpm@919c0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
			reg = <0x919c0 0x30>;
			ranges;

			muram@80000 {
				#address-cells = <1>;
				#size-cells = <1>;
				ranges = <0x0 0x80000 0x10000>;

				data@0 {
					compatible = "fsl,cpm-muram-data";
					reg = <0x0 0x4000 0x9000 0x2000>;
				};
			};

			brg@919f0 {
				compatible = "fsl,mpc8560-brg",
					     "fsl,cpm2-brg",
					     "fsl,cpm-brg";
				reg = <0x919f0 0x10 0x915f0 0x10>;
				clock-frequency = <165000000>;	/* 166MHz */
			};

			CPMPIC: pic@90c00 {
				#address-cells = <0>;
				#interrupt-cells = <2>;
				interrupt-controller;
				interrupts = <0x2e 0x2>;
				interrupt-parent = <&mpic>;
				reg = <0x90c00 0x80>;
				compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
			};

			serial@91a00 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
					     "fsl,cpm2-scc-uart";
				reg = <0x91a00 0x20 0x88000 0x100>;
				fsl,cpm-brg = <1>;
				fsl,cpm-command = <0x800000>;
				current-speed = <0x1c200>;
				interrupts = <0x28 0x8>;
				interrupt-parent = <&CPMPIC>;
			};

			serial@91a20 {
				device_type = "serial";
				compatible = "fsl,mpc8560-scc-uart",
					     "fsl,cpm2-scc-uart";
				reg = <0x91a20 0x20 0x88100 0x100>;
				fsl,cpm-brg = <2>;
				fsl,cpm-command = <0x4a00000>;
				current-speed = <0x1c200>;
				interrupts = <0x29 0x8>;
				interrupt-parent = <&CPMPIC>;
			};

			mdio@90d00 {				/* For FCCs */
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,cpm2-mdio-bitbang";
				reg = <0x90d00 0x14>;
				fsl,mdio-pin = <24>;
				fsl,mdc-pin = <25>;

				PHY0: ethernet-phy@0 {
					interrupt-parent = <&mpic>;
					reg = <0x0>;
					device_type = "ethernet-phy";
				};
			};

			enet2: ethernet@91300 {
				device_type = "network";
				compatible = "fsl,mpc8560-fcc-enet",
					     "fsl,cpm2-fcc-enet";
				reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
				/* Mac address filled in by bootwrapper */
				local-mac-address = [ 00 00 00 00 00 00 ];
				fsl,cpm-command = <0x12000300>;
				interrupts = <0x20 0x8>;
				interrupt-parent = <&CPMPIC>;
				phy-handle = <&PHY0>;
			};
		};
	};

	localbus@fdf05000 {
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "fsl,mpc8560-localbus";
		reg = <0xfdf05000 0x68>;

		ranges = <0x0 0x0 0xe0000000 0x00800000
			  0x4 0x0 0xe8080000 0x00080000>;

		flash@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "jedec-flash";
			reg = <0x0 0x0 0x800000>;
			bank-width = <0x2>;

			partition@0 {
				label = "Primary Kernel";
				reg = <0x0 0x180000>;
			};
			partition@180000 {
				label = "Primary Filesystem";
				reg = <0x180000 0x580000>;
			};
			partition@700000 {
				label = "Monitor";
				reg = <0x300000 0x100000>;
				read-only;
			};
		};

		cpld@4,0 {
			compatible = "emerson,KSI8560-cpld";
			reg = <0x4 0x0 0x80000>;
		};
	};


	chosen {
		linux,stdout-path = "/soc/cpm/serial@91a00";
	};
};
OpenPOWER on IntegriCloud