summaryrefslogtreecommitdiffstats
path: root/arch/i386/lib/msr-on-cpu.c
blob: 7767962f25d34d90f35cb0b7aab64f61b1c454a6 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
#include <linux/module.h>
#include <linux/preempt.h>
#include <linux/smp.h>
#include <asm/msr.h>

struct msr_info {
	u32 msr_no;
	u32 l, h;
	int err;
};

static void __rdmsr_on_cpu(void *info)
{
	struct msr_info *rv = info;

	rdmsr(rv->msr_no, rv->l, rv->h);
}

static void __rdmsr_safe_on_cpu(void *info)
{
	struct msr_info *rv = info;

	rv->err = rdmsr_safe(rv->msr_no, &rv->l, &rv->h);
}

static int _rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h, int safe)
{
	int err = 0;
	preempt_disable();
	if (smp_processor_id() == cpu)
		if (safe)
			err = rdmsr_safe(msr_no, l, h);
		else
			rdmsr(msr_no, *l, *h);
	else {
		struct msr_info rv;

		rv.msr_no = msr_no;
		if (safe) {
			smp_call_function_single(cpu, __rdmsr_safe_on_cpu,
						 &rv, 0, 1);
			err = rv.err;
		} else {
			smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1);
		}
		*l = rv.l;
		*h = rv.h;
	}
	preempt_enable();
	return err;
}

static void __wrmsr_on_cpu(void *info)
{
	struct msr_info *rv = info;

	wrmsr(rv->msr_no, rv->l, rv->h);
}

static void __wrmsr_safe_on_cpu(void *info)
{
	struct msr_info *rv = info;

	rv->err = wrmsr_safe(rv->msr_no, rv->l, rv->h);
}

static int _wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h, int safe)
{
	int err = 0;
	preempt_disable();
	if (smp_processor_id() == cpu)
		if (safe)
			err = wrmsr_safe(msr_no, l, h);
		else
			wrmsr(msr_no, l, h);
	else {
		struct msr_info rv;

		rv.msr_no = msr_no;
		rv.l = l;
		rv.h = h;
		if (safe) {
			smp_call_function_single(cpu, __wrmsr_safe_on_cpu,
						 &rv, 0, 1);
			err = rv.err;
		} else {
			smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1);
		}
	}
	preempt_enable();
	return err;
}

void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
	_wrmsr_on_cpu(cpu, msr_no, l, h, 0);
}

void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
{
	_rdmsr_on_cpu(cpu, msr_no, l, h, 0);
}

/* These "safe" variants are slower and should be used when the target MSR
   may not actually exist. */
int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
	return _wrmsr_on_cpu(cpu, msr_no, l, h, 1);
}

int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
{
	return _rdmsr_on_cpu(cpu, msr_no, l, h, 1);
}

EXPORT_SYMBOL(rdmsr_on_cpu);
EXPORT_SYMBOL(wrmsr_on_cpu);
EXPORT_SYMBOL(rdmsr_safe_on_cpu);
EXPORT_SYMBOL(wrmsr_safe_on_cpu);
OpenPOWER on IntegriCloud