summaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-s3c24xx/gpiolib.c
blob: 6dd5211c9c6755c90cf050f0c8d09076a09e8cae (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
/* linux/arch/arm/plat-s3c24xx/gpiolib.c
 *
 * Copyright (c) 2008 Simtec Electronics
 *	http://armlinux.simtec.co.uk/
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * S3C24XX GPIOlib support
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License.
*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/io.h>
#include <linux/gpio.h>

#include <asm/arch/hardware.h>
#include <asm/irq.h>

#include <asm/arch/regs-gpio.h>

struct s3c24xx_gpio_chip {
	struct gpio_chip	chip;
	void __iomem		*base;
};

static inline struct s3c24xx_gpio_chip *to_s3c_chip(struct gpio_chip *gpc)
{
	return container_of(gpc, struct s3c24xx_gpio_chip, chip);
}

/* these routines are exported for use by other parts of the platform
 * and system support, but are not intended to be used directly by the
 * drivers themsevles.
 */

int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
{
	struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
	void __iomem *base = ourchip->base;
	unsigned long flags;
	unsigned long con;

	local_irq_save(flags);

	con = __raw_readl(base + 0x00);
	con &= ~(3 << (offset * 2));
	con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);

	__raw_writel(con, base + 0x00);

	local_irq_restore(flags);
	return 0;
}

int s3c24xx_gpiolib_output(struct gpio_chip *chip,
				  unsigned offset, int value)
{
	struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
	void __iomem *base = ourchip->base;
	unsigned long flags;
	unsigned long dat;
	unsigned long con;

	local_irq_save(flags);

	dat = __raw_readl(base + 0x04);
	dat &= ~(1 << offset);
	if (value)
		dat |= 1 << offset;
	__raw_writel(dat, base + 0x04);

	con = __raw_readl(base + 0x00);
	con &= ~(3 << (offset * 2));
	con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);

	__raw_writel(con, base + 0x00);
	__raw_writel(dat, base + 0x04);

	local_irq_restore(flags);
	return 0;
}

void s3c24xx_gpiolib_set(struct gpio_chip *chip, unsigned offset, int value)
{
	struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
	void __iomem *base = ourchip->base;
	unsigned long flags;
	unsigned long dat;

	local_irq_save(flags);

	dat = __raw_readl(base + 0x04);
	dat &= ~(1 << offset);
	if (value)
		dat |= 1 << offset;
	__raw_writel(dat, base + 0x04);

	local_irq_restore(flags);
}

int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset)
{
	struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
	unsigned long val;

	val = __raw_readl(ourchip->base + 0x04);
	val >>= offset;
	val &= 1;

	return val;
}

static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
{
	return -EINVAL;
}

static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
					unsigned offset, int value)
{
	struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
	void __iomem *base = ourchip->base;
	unsigned long flags;
	unsigned long dat;
	unsigned long con;

	local_irq_save(flags);

	con = __raw_readl(base + 0x00);
	dat = __raw_readl(base + 0x04);

	dat &= ~(1 << offset);
	if (value)
		dat |= 1 << offset;

	__raw_writel(dat, base + 0x04);

	con &= ~(1 << offset);

	__raw_writel(con, base + 0x00);
	__raw_writel(dat, base + 0x04);

	local_irq_restore(flags);
	return 0;
}


struct s3c24xx_gpio_chip gpios[] = {
	[0] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPA0),
		.chip	= {
			.base			= S3C2410_GPA0,
			.owner			= THIS_MODULE,
			.label			= "GPIOA",
			.ngpio			= 24,
			.direction_input	= s3c24xx_gpiolib_banka_input,
			.direction_output	= s3c24xx_gpiolib_banka_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[1] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPB0),
		.chip	= {
			.base			= S3C2410_GPB0,
			.owner			= THIS_MODULE,
			.label			= "GPIOB",
			.ngpio			= 16,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[2] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPC0),
		.chip	= {
			.base			= S3C2410_GPC0,
			.owner			= THIS_MODULE,
			.label			= "GPIOC",
			.ngpio			= 16,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[3] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPD0),
		.chip	= {
			.base			= S3C2410_GPD0,
			.owner			= THIS_MODULE,
			.label			= "GPIOD",
			.ngpio			= 16,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[4] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPE0),
		.chip	= {
			.base			= S3C2410_GPE0,
			.label			= "GPIOE",
			.owner			= THIS_MODULE,
			.ngpio			= 16,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[5] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPF0),
		.chip	= {
			.base			= S3C2410_GPF0,
			.owner			= THIS_MODULE,
			.label			= "GPIOF",
			.ngpio			= 8,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
	[6] = {
		.base	= S3C24XX_GPIO_BASE(S3C2410_GPG0),
		.chip	= {
			.base			= S3C2410_GPG0,
			.owner			= THIS_MODULE,
			.label			= "GPIOG",
			.ngpio			= 10,
			.direction_input	= s3c24xx_gpiolib_input,
			.direction_output	= s3c24xx_gpiolib_output,
			.set			= s3c24xx_gpiolib_set,
			.get			= s3c24xx_gpiolib_get,
		},
	},
};

static __init int s3c24xx_gpiolib_init(void)
{
	struct s3c24xx_gpio_chip *chip = gpios;
	int gpn;

	for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++)
		gpiochip_add(&chip->chip);

	return 0;
}

arch_initcall(s3c24xx_gpiolib_init);
OpenPOWER on IntegriCloud