1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
|
/*
* arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
*
* Marvell Orion-VoIP FXO Reference Design Setup
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
#include <asm/leds.h>
#include <asm/mach/arch.h>
#include <asm/mach/pci.h>
#include <mach/orion5x.h>
#include "common.h"
#include "mpp.h"
/*****************************************************************************
* RD-88F5181L FXO Info
****************************************************************************/
/*
* 8M NOR flash Device bus boot chip select
*/
#define RD88F5181L_FXO_NOR_BOOT_BASE 0xff800000
#define RD88F5181L_FXO_NOR_BOOT_SIZE SZ_8M
/*****************************************************************************
* 8M NOR Flash on Device bus Boot chip select
****************************************************************************/
static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
.width = 1,
};
static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
.flags = IORESOURCE_MEM,
.start = RD88F5181L_FXO_NOR_BOOT_BASE,
.end = RD88F5181L_FXO_NOR_BOOT_BASE +
RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
};
static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
.name = "physmap-flash",
.id = 0,
.dev = {
.platform_data = &rd88f5181l_fxo_nor_boot_flash_data,
},
.num_resources = 1,
.resource = &rd88f5181l_fxo_nor_boot_flash_resource,
};
/*****************************************************************************
* General Setup
****************************************************************************/
static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
MPP0_GPIO, /* LED1 CardBus LED (front panel) */
MPP1_GPIO, /* PCI_intA */
MPP2_GPIO, /* Hard Reset / Factory Init*/
MPP3_GPIO, /* FXS or DAA select */
MPP4_GPIO, /* LED6 - phone LED (front panel) */
MPP5_GPIO, /* LED5 - phone LED (front panel) */
MPP6_PCI_CLK, /* CPU PCI refclk */
MPP7_PCI_CLK, /* PCI/PCIe refclk */
MPP8_GPIO, /* CardBus reset */
MPP9_GPIO, /* GE_RXERR */
MPP10_GPIO, /* LED2 MiniPCI LED (front panel) */
MPP11_GPIO, /* Lifeline control */
MPP12_GIGE, /* GE_TXD[4] */
MPP13_GIGE, /* GE_TXD[5] */
MPP14_GIGE, /* GE_TXD[6] */
MPP15_GIGE, /* GE_TXD[7] */
MPP16_GIGE, /* GE_RXD[4] */
MPP17_GIGE, /* GE_RXD[5] */
MPP18_GIGE, /* GE_RXD[6] */
MPP19_GIGE, /* GE_RXD[7] */
0,
};
static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
.phy_addr = MV643XX_ETH_PHY_NONE,
.speed = SPEED_1000,
.duplex = DUPLEX_FULL,
};
static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
.port_names[0] = "lan2",
.port_names[1] = "lan1",
.port_names[2] = "wan",
.port_names[3] = "cpu",
.port_names[5] = "lan4",
.port_names[7] = "lan3",
};
static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
.nr_chips = 1,
.chip = &rd88f5181l_fxo_switch_chip_data,
};
static void __init rd88f5181l_fxo_init(void)
{
/*
* Setup basic Orion functions. Need to be called early.
*/
orion5x_init();
orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
/*
* Configure peripherals.
*/
orion5x_ehci0_init();
orion5x_eth_init(&rd88f5181l_fxo_eth_data);
orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
orion5x_uart0_init();
orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
RD88F5181L_FXO_NOR_BOOT_SIZE);
platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
}
static int __init
rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
int irq;
/*
* Check for devices with hard-wired IRQs.
*/
irq = orion5x_pci_map_irq(dev, slot, pin);
if (irq != -1)
return irq;
/*
* Mini-PCI / Cardbus slot.
*/
return gpio_to_irq(1);
}
static struct hw_pci rd88f5181l_fxo_pci __initdata = {
.nr_controllers = 2,
.swizzle = pci_std_swizzle,
.setup = orion5x_pci_sys_setup,
.scan = orion5x_pci_sys_scan_bus,
.map_irq = rd88f5181l_fxo_pci_map_irq,
};
static int __init rd88f5181l_fxo_pci_init(void)
{
if (machine_is_rd88f5181l_fxo()) {
orion5x_pci_set_cardbus_mode();
pci_common_init(&rd88f5181l_fxo_pci);
}
return 0;
}
subsys_initcall(rd88f5181l_fxo_pci_init);
MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
/* Maintainer: Nicolas Pitre <nico@marvell.com> */
.atag_offset = 0x100,
.init_machine = rd88f5181l_fxo_init,
.map_io = orion5x_map_io,
.init_early = orion5x_init_early,
.init_irq = orion5x_init_irq,
.timer = &orion5x_timer,
.fixup = tag_fixup_mem32,
MACHINE_END
|
