summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/exynos5410-smdk5410.dts
blob: be3e02530b42881b2cbe6e35d7d16f0a4f547b77 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
/*
 * SAMSUNG SMDK5410 board device tree source
 *
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

/dts-v1/;
#include "exynos5410.dtsi"
/ {
	model = "Samsung SMDK5410 board based on EXYNOS5410";
	compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5";

	memory {
		reg = <0x40000000 0x80000000>;
	};

	chosen {
		bootargs = "console=ttySAC2,115200";
	};

	fin_pll: xxti {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "fin_pll";
		#clock-cells = <0>;
	};

	firmware@02037000 {
		compatible = "samsung,secure-firmware";
		reg = <0x02037000 0x1000>;
	};

};

&mmc_0 {
	status = "okay";
	num-slots = <1>;
	cap-mmc-highspeed;
	broken-cd;
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <2 3>;
	samsung,dw-mshc-ddr-timing = <1 2>;
	bus-width = <8>;
};

&mmc_2 {
	status = "okay";
	num-slots = <1>;
	cap-sd-highspeed;
	card-detect-delay = <200>;
	samsung,dw-mshc-ciu-div = <3>;
	samsung,dw-mshc-sdr-timing = <2 3>;
	samsung,dw-mshc-ddr-timing = <1 2>;
	bus-width = <4>;
	disable-wp;
};

&uart0 {
		status = "okay";
};

&uart1 {
		status = "okay";
};

&uart2 {
		status = "okay";
};
OpenPOWER on IntegriCloud