summaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/armada-xp.dtsi
blob: 281c6447e87272c0df44f89da6489876b8c9ade8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
/*
 * Device Tree Include file for Marvell Armada XP family SoC
 *
 * Copyright (C) 2012 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 * Ben Dooks <ben.dooks@codethink.co.uk>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 *
 * Contains definitions specific to the Armada XP SoC that are not
 * common to all Armada SoCs.
 */

#include "armada-370-xp.dtsi"

/ {
	model = "Marvell Armada XP family SoC";
	compatible = "marvell,armadaxp", "marvell,armada-370-xp";

	aliases {
		eth2 = &eth2;
	};

	soc {
		compatible = "marvell,armadaxp-mbus", "simple-bus";

		bootrom {
			compatible = "marvell,bootrom";
			reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
		};

		internal-regs {
			L2: l2-cache {
				compatible = "marvell,aurora-system-cache";
				reg = <0x08000 0x1000>;
				cache-id-part = <0x100>;
				wt-override;
			};

			interrupt-controller@20000 {
			      reg = <0x20a00 0x2d0>, <0x21070 0x58>;
			};

			armada-370-xp-pmsu@22000 {
				compatible = "marvell,armada-370-xp-pmsu";
				reg = <0x22100 0x430>, <0x20800 0x20>;
			};

			serial@12200 {
				compatible = "snps,dw-apb-uart";
				reg = <0x12200 0x100>;
				reg-shift = <2>;
				interrupts = <43>;
				reg-io-width = <1>;
				status = "disabled";
			};
			serial@12300 {
				compatible = "snps,dw-apb-uart";
				reg = <0x12300 0x100>;
				reg-shift = <2>;
				interrupts = <44>;
				reg-io-width = <1>;
				status = "disabled";
			};

			timer@20300 {
				compatible = "marvell,armada-xp-timer";
				clocks = <&coreclk 2>, <&refclk>;
				clock-names = "nbclk", "fixed";
			};

			coreclk: mvebu-sar@18230 {
				compatible = "marvell,armada-xp-core-clock";
				reg = <0x18230 0x08>;
				#clock-cells = <1>;
			};

			cpuclk: clock-complex@18700 {
				#clock-cells = <1>;
				compatible = "marvell,armada-xp-cpu-clock";
				reg = <0x18700 0xA0>;
				clocks = <&coreclk 1>;
			};

			gateclk: clock-gating-control@18220 {
				compatible = "marvell,armada-xp-gating-clock";
				reg = <0x18220 0x4>;
				clocks = <&coreclk 0>;
				#clock-cells = <1>;
			};

			system-controller@18200 {
				compatible = "marvell,armada-370-xp-system-controller";
				reg = <0x18200 0x500>;
			};

			eth2: ethernet@30000 {
				compatible = "marvell,armada-370-neta";
				reg = <0x30000 0x4000>;
				interrupts = <12>;
				clocks = <&gateclk 2>;
				status = "disabled";
			};

			xor@60900 {
				compatible = "marvell,orion-xor";
				reg = <0x60900 0x100
				       0x60b00 0x100>;
				clocks = <&gateclk 22>;
				status = "okay";

				xor10 {
					interrupts = <51>;
					dmacap,memcpy;
					dmacap,xor;
				};
				xor11 {
					interrupts = <52>;
					dmacap,memcpy;
					dmacap,xor;
					dmacap,memset;
				};
			};

			xor@f0900 {
				compatible = "marvell,orion-xor";
				reg = <0xF0900 0x100
				       0xF0B00 0x100>;
				clocks = <&gateclk 28>;
				status = "okay";

				xor00 {
					interrupts = <94>;
					dmacap,memcpy;
					dmacap,xor;
				};
				xor01 {
					interrupts = <95>;
					dmacap,memcpy;
					dmacap,xor;
					dmacap,memset;
				};
			};

			i2c0: i2c@11000 {
				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
				reg = <0x11000 0x100>;
			};

			i2c1: i2c@11100 {
				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
				reg = <0x11100 0x100>;
			};

			usb@50000 {
				clocks = <&gateclk 18>;
			};

			usb@51000 {
				clocks = <&gateclk 19>;
			};

			usb@52000 {
				compatible = "marvell,orion-ehci";
				reg = <0x52000 0x500>;
				interrupts = <47>;
				clocks = <&gateclk 20>;
				status = "disabled";
			};

			thermal@182b0 {
				compatible = "marvell,armadaxp-thermal";
				reg = <0x182b0 0x4
					0x184d0 0x4>;
				status = "okay";
			};
		};
	};

	clocks {
		/* 25 MHz reference crystal */
		refclk: oscillator {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <25000000>;
		};
	};
};
OpenPOWER on IntegriCloud