summaryrefslogtreecommitdiffstats
path: root/Documentation/powerpc/dts-bindings/fsl/esdhc.txt
blob: 60084655776384b8ffbf210b18d71896c5c04c4d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
* Freescale Enhanced Secure Digital Host Controller (eSDHC)

The Enhanced Secure Digital Host Controller provides an interface
for MMC, SD, and SDIO types of memory cards.

Required properties:
  - compatible : should be
    "fsl,<chip>-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors.
    "fsl,<chip>-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors.
  - reg : should contain eSDHC registers location and length.
  - interrupts : should contain eSDHC interrupt.
  - interrupt-parent : interrupt source phandle.
  - clock-frequency : specifies eSDHC base clock frequency.

Example:

sdhci@2e000 {
	compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc";
	reg = <0x2e000 0x1000>;
	interrupts = <42 0x8>;
	interrupt-parent = <&ipic>;
	/* Filled in by U-Boot */
	clock-frequency = <0>;
};
OpenPOWER on IntegriCloud