/* * arch/xtensa/kernel/vmlinux.lds.S * * Xtensa linker script * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2001 - 2005 Tensilica Inc. * * Chris Zankel * Marc Gauthier * Joe Taylor */ #include #include #define _NOCLANGUAGE #include #include OUTPUT_ARCH(xtensa) ENTRY(_start) #if XCHAL_MEMORY_ORDER == XTHAL_BIGENDIAN jiffies = jiffies_64 + 4; #else jiffies = jiffies_64; #endif #define KERNELOFFSET 0x1000 /* Note: In the following macros, it would be nice to specify only the vector name and section kind and construct "sym" and "section" using CPP concatenation, but that does not work reliably. Concatenating a string with "." produces an invalid token. CPP will not print a warning because it thinks this is an assembly file, but it leaves them as multiple tokens and there may or may not be whitespace between them. */ /* Macro for a relocation entry */ #define RELOCATE_ENTRY(sym, section) \ LONG(sym ## _start); \ LONG(sym ## _end); \ LONG(LOADADDR(section)) /* Macro to define a section for a vector. * * Use of the MIN function catches the types of errors illustrated in * the following example: * * Assume the section .DoubleExceptionVector.literal is completely * full. Then a programmer adds code to .DoubleExceptionVector.text * that produces another literal. The final literal position will * overlay onto the first word of the adjacent code section * .DoubleExceptionVector.text. (In practice, the literals will * overwrite the code, and the first few instructions will be * garbage.) */ #define SECTION_VECTOR(sym, section, addr, max_prevsec_size, prevsec) \ section addr : AT((MIN(LOADADDR(prevsec) + max_prevsec_size, \ LOADADDR(prevsec) + SIZEOF(prevsec)) + 3) & ~ 3) \ { \ . = ALIGN(4); \ sym ## _start = ABSOLUTE(.); \ *(section) \ sym ## _end = ABSOLUTE(.); \ } /* * Mapping of input sections to output sections when linking. */ SECTIONS { . = XCHAL_KSEG_CACHED_VADDR + KERNELOFFSET; /* .text section */ _text = .; _stext = .; _ftext = .; .text : { /* The .head.text section must be the first section! */ *(.head.text) *(.literal .text) *(.srom.text) VMLINUX_SYMBOL(__sched_text_start) = .; *(.sched.literal .sched.text) VMLINUX_SYMBOL(__sched_text_end) = .; VMLINUX_SYMBOL(__lock_text_start) = .; *(.spinlock.literal .spinlock.text) VMLINUX_SYMBOL(__lock_text_end) = .; } _etext = .; . = ALIGN(16); RODATA /* Relocation table */ . = ALIGN(16); __boot_reloc_table_start = ABSOLUTE(.); __relocate : { RELOCATE_ENTRY(_WindowVectors_text, .WindowVectors.text); #if 0 RELOCATE_ENTRY(_KernelExceptionVector_literal, .KernelExceptionVector.literal); #endif RELOCATE_ENTRY(_KernelExceptionVector_text, .KernelExceptionVector.text); #if 0 RELOCATE_ENTRY(_UserExceptionVector_literal, .UserExceptionVector.literal); #endif RELOCATE_ENTRY(_UserExceptionVector_text, .UserExceptionVector.text); RELOCATE_ENTRY(_DoubleExceptionVector_literal, .DoubleExceptionVector.literal); RELOCATE_ENTRY(_DoubleExceptionVector_text, .DoubleExceptionVector.text); } __boot_reloc_table_end = ABSOLUTE(.) ; .fixup : { *(.fixup) } . = ALIGN(16); __ex_table : { __start___ex_table = .; *(__ex_table) __stop___ex_table = .; } /* Data section */ . = ALIGN(XCHAL_ICACHE_LINESIZE); _fdata = .; .data : { *(.data) CONSTRUCTORS . = ALIGN(XCHAL_ICACHE_LINESIZE); *(.data.cacheline_aligned) } _edata = .; /* The initial task */ . = ALIGN(8192); .data.init_task : { *(.data.init_task) } /* Initialization code and data: */ . = ALIGN(1<