/* * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. * * Copyright (C) 2000, 2001 Keith M Wesolowski */ #include <linux/kernel.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/types.h> #include <asm/pci.h> #include <asm/ip32/mace.h> #if 0 # define DPRINTK(args...) printk(args); #else # define DPRINTK(args...) #endif /* * O2 has up to 5 PCI devices connected into the MACE bridge. The device * map looks like this: * * 0 aic7xxx 0 * 1 aic7xxx 1 * 2 expansion slot * 3 N/C * 4 N/C */ #define chkslot(_bus,_devfn) \ do { \ if ((_bus)->number > 0 || PCI_SLOT (_devfn) < 1 \ || PCI_SLOT (_devfn) > 3) \ return PCIBIOS_DEVICE_NOT_FOUND; \ } while (0) #define mkaddr(_devfn, _reg) \ ((((_devfn) & 0xffUL) << 8) | ((_reg) & 0xfcUL)) static int mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 *val) { chkslot(bus, devfn); mace->pci.config_addr = mkaddr(devfn, reg); switch (size) { case 1: *val = mace->pci.config_data.b[(reg & 3) ^ 3]; break; case 2: *val = mace->pci.config_data.w[((reg >> 1) & 1) ^ 1]; break; case 4: *val = mace->pci.config_data.l; break; } DPRINTK("read%d: reg=%08x,val=%02x\n", size * 8, reg, *val); return PCIBIOS_SUCCESSFUL; } static int mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) { chkslot(bus, devfn); mace->pci.config_addr = mkaddr(devfn, reg); switch (size) { case 1: mace->pci.config_data.b[(reg & 3) ^ 3] = val; break; case 2: mace->pci.config_data.w[((reg >> 1) & 1) ^ 1] = val; break; case 4: mace->pci.config_data.l = val; break; } DPRINTK("write%d: reg=%08x,val=%02x\n", size * 8, reg, val); return PCIBIOS_SUCCESSFUL; } struct pci_ops mace_pci_ops = { .read = mace_pci_read_config, .write = mace_pci_write_config, };