From 8e552c36d90c03d2cabf5373788998966751b609 Mon Sep 17 00:00:00 2001 From: Andres Salomon Date: Mon, 12 May 2008 21:46:29 -0400 Subject: power_supply: add CHARGE_COUNTER property and olpc_battery support for it This adds PROP_CHARGE_COUNTER to the power supply class (documenting it as well). The OLPC battery driver uses this for spitting out its ACR values (in uAh). We have some rounding errors (the data sheet claims 416.7, the math actually works out to 416.666667, so we're forced to choose between overflows or precision loss. I chose precision loss, and stuck w/ data sheet values), but I don't think anyone will care that much. Signed-off-by: Andres Salomon Signed-off-by: Anton Vorontsov --- include/linux/power_supply.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/power_supply.h b/include/linux/power_supply.h index 68ed19c..ea96ead 100644 --- a/include/linux/power_supply.h +++ b/include/linux/power_supply.h @@ -78,6 +78,7 @@ enum power_supply_property { POWER_SUPPLY_PROP_CHARGE_EMPTY, POWER_SUPPLY_PROP_CHARGE_NOW, POWER_SUPPLY_PROP_CHARGE_AVG, + POWER_SUPPLY_PROP_CHARGE_COUNTER, POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN, POWER_SUPPLY_PROP_ENERGY_EMPTY_DESIGN, POWER_SUPPLY_PROP_ENERGY_FULL, -- cgit v1.1 From a29ccf6f823a84d89e1c7aaaf221cf7282022024 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Tue, 3 Jun 2008 14:59:40 +0100 Subject: Make console charset translation optional By turning off the new CONSOLE_TRANSLATIONS option and dropping the associated code and tables from the kernel, we can save about 7KiB. Taken from linux-tiny project by Tim Bird and mangled further by dwmw2. Signed-off-by: Tim Bird Signed-off-by: David Woodhouse --- include/linux/consolemap.h | 14 ++++++++++++++ include/linux/vt_kern.h | 19 +++++++++++++++++++ 2 files changed, 33 insertions(+) (limited to 'include') diff --git a/include/linux/consolemap.h b/include/linux/consolemap.h index e2bf7e5..c4811da 100644 --- a/include/linux/consolemap.h +++ b/include/linux/consolemap.h @@ -3,6 +3,9 @@ * * Interface between console.c, selection.c and consolemap.c */ +#ifndef __LINUX_CONSOLEMAP_H__ +#define __LINUX_CONSOLEMAP_H__ + #define LAT1_MAP 0 #define GRAF_MAP 1 #define IBMPC_MAP 2 @@ -10,6 +13,7 @@ #include +#ifdef CONFIG_CONSOLE_TRANSLATIONS struct vc_data; extern u16 inverse_translate(struct vc_data *conp, int glyph, int use_unicode); @@ -18,3 +22,13 @@ extern int conv_uni_to_pc(struct vc_data *conp, long ucs); extern u32 conv_8bit_to_uni(unsigned char c); extern int conv_uni_to_8bit(u32 uni); void console_map_init(void); +#else +#define inverse_translate(conp, glyph, uni) ((uint16_t)glyph) +#define set_translate(m, vc) ((unsigned short *)NULL) +#define conv_uni_to_pc(conp, ucs) ((int) (ucs > 0xff ? -1: ucs)) +#define conv_8bit_to_uni(c) ((uint32_t)(c)) +#define conv_uni_to_8bit(c) ((int) ((c) & 0xff)) +#define console_map_init(c) do { ; } while (0) +#endif /* CONFIG_CONSOLE_TRANSLATIONS */ + +#endif /* __LINUX_CONSOLEMAP_H__ */ diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h index 9448ffb..14c0e91 100644 --- a/include/linux/vt_kern.h +++ b/include/linux/vt_kern.h @@ -12,6 +12,7 @@ #include #include #include +#include /* * Presently, a lot of graphics programs do not restore the contents of @@ -54,6 +55,7 @@ void redraw_screen(struct vc_data *vc, int is_switch); struct tty_struct; int tioclinux(struct tty_struct *tty, unsigned long arg); +#ifdef CONFIG_CONSOLE_TRANSLATIONS /* consolemap.c */ struct unimapinit; @@ -71,6 +73,23 @@ void con_free_unimap(struct vc_data *vc); void con_protect_unimap(struct vc_data *vc, int rdonly); int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc); +#define vc_translate(vc, c) ((vc)->vc_translate[(c) | \ + (vc)->vc_toggle_meta ? 0x80 : 0]) +#else +#define con_set_trans_old(arg) (0) +#define con_get_trans_old(arg) (-EINVAL) +#define con_set_trans_new(arg) (0) +#define con_get_trans_new(arg) (-EINVAL) +#define con_clear_unimap(vc, ui) (0) +#define con_set_unimap(vc, ct, list) (0) +#define con_set_default_unimap(vc) (0) +#define con_copy_unimap(d, s) (0) +#define con_get_unimap(vc, ct, uct, list) (-EINVAL) +#define con_free_unimap(vc) do { ; } while (0) + +#define vc_translate(vc, c) (c) +#endif + /* vt.c */ int vt_waitactive(int vt); void change_console(struct vc_data *new_vc); -- cgit v1.1 From 59018b6d2acabb114ab58637e6ab95ba424a89d0 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Tue, 20 May 2008 01:03:52 +0300 Subject: MTD/JFFS2: remove CVS keywords Once upon a time, the MTD repository was using CVS. This patch therefore removes all usages of the no longer updated CVS keywords from the MTD code. This also includes code that printed them to the user. Signed-off-by: Adrian Bunk Signed-off-by: David Woodhouse --- include/linux/jffs2.h | 3 --- include/linux/mtd/blktrans.h | 2 -- include/linux/mtd/cfi.h | 1 - include/linux/mtd/cfi_endian.h | 5 ----- include/linux/mtd/concat.h | 2 -- include/linux/mtd/doc2000.h | 2 -- include/linux/mtd/flashchip.h | 3 --- include/linux/mtd/ftl.h | 2 -- include/linux/mtd/gen_probe.h | 1 - include/linux/mtd/inftl.h | 4 ---- include/linux/mtd/map.h | 1 - include/linux/mtd/mtd.h | 2 -- include/linux/mtd/nand.h | 2 -- include/linux/mtd/nand_ecc.h | 2 -- include/linux/mtd/nftl.h | 2 -- include/linux/mtd/partitions.h | 2 -- include/linux/mtd/physmap.h | 2 -- include/linux/mtd/plat-ram.h | 2 -- include/linux/mtd/pmc551.h | 4 +--- include/linux/mtd/xip.h | 2 -- include/mtd/inftl-user.h | 2 -- include/mtd/jffs2-user.h | 2 -- include/mtd/mtd-abi.h | 2 -- include/mtd/mtd-user.h | 2 -- include/mtd/nftl-user.h | 2 -- 25 files changed, 1 insertion(+), 55 deletions(-) (limited to 'include') diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h index 6b563ca..da720bc 100644 --- a/include/linux/jffs2.h +++ b/include/linux/jffs2.h @@ -7,9 +7,6 @@ * * For licensing information, see the file 'LICENCE' in the * jffs2 directory. - * - * $Id: jffs2.h,v 1.38 2005/09/26 11:37:23 havasi Exp $ - * */ #ifndef __LINUX_JFFS2_H__ diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h index 9a6e2f9..310e616 100644 --- a/include/linux/mtd/blktrans.h +++ b/include/linux/mtd/blktrans.h @@ -1,6 +1,4 @@ /* - * $Id: blktrans.h,v 1.6 2005/11/07 11:14:54 gleixner Exp $ - * * (C) 2003 David Woodhouse * * Interface to Linux block layer for MTD 'translation layers'. diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index b0ddf4b..d6fb115 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -1,7 +1,6 @@ /* Common Flash Interface structures * See http://support.intel.com/design/flash/technote/index.htm - * $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $ */ #ifndef __MTD_CFI_H__ diff --git a/include/linux/mtd/cfi_endian.h b/include/linux/mtd/cfi_endian.h index 25724f7..d802f77 100644 --- a/include/linux/mtd/cfi_endian.h +++ b/include/linux/mtd/cfi_endian.h @@ -1,8 +1,3 @@ -/* - * $Id: cfi_endian.h,v 1.11 2002/01/30 23:20:48 awozniak Exp $ - * - */ - #include #ifndef CONFIG_MTD_CFI_ADV_OPTIONS diff --git a/include/linux/mtd/concat.h b/include/linux/mtd/concat.h index ed8dc67..c02f3d2 100644 --- a/include/linux/mtd/concat.h +++ b/include/linux/mtd/concat.h @@ -4,8 +4,6 @@ * (C) 2002 Robert Kaiser * * This code is GPL - * - * $Id: concat.h,v 1.1 2002/03/08 16:34:36 rkaiser Exp $ */ #ifndef MTD_CONCAT_H diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h index 9addd07..0a6d516 100644 --- a/include/linux/mtd/doc2000.h +++ b/include/linux/mtd/doc2000.h @@ -6,8 +6,6 @@ * Copyright (C) 2002-2003 Greg Ungerer * Copyright (C) 2002-2003 SnapGear Inc * - * $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $ - * * Released under GPL */ diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index 39e7d2a..08dd131 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -5,9 +5,6 @@ * Contains information about the location and state of a given flash device * * (C) 2000 Red Hat. GPLd. - * - * $Id: flashchip.h,v 1.18 2005/11/07 11:14:54 gleixner Exp $ - * */ #ifndef __MTD_FLASHCHIP_H__ diff --git a/include/linux/mtd/ftl.h b/include/linux/mtd/ftl.h index d996091..0be442f 100644 --- a/include/linux/mtd/ftl.h +++ b/include/linux/mtd/ftl.h @@ -1,6 +1,4 @@ /* - * $Id: ftl.h,v 1.7 2005/11/07 11:14:54 gleixner Exp $ - * * Derived from (and probably identical to): * ftl.h 1.7 1999/10/25 20:23:17 * diff --git a/include/linux/mtd/gen_probe.h b/include/linux/mtd/gen_probe.h index 256e734..df362dd 100644 --- a/include/linux/mtd/gen_probe.h +++ b/include/linux/mtd/gen_probe.h @@ -1,7 +1,6 @@ /* * (C) 2001, 2001 Red Hat, Inc. * GPL'd - * $Id: gen_probe.h,v 1.4 2005/11/07 11:14:54 gleixner Exp $ */ #ifndef __LINUX_MTD_GEN_PROBE_H__ diff --git a/include/linux/mtd/inftl.h b/include/linux/mtd/inftl.h index 85fd041..64ee53c 100644 --- a/include/linux/mtd/inftl.h +++ b/include/linux/mtd/inftl.h @@ -2,8 +2,6 @@ * inftl.h -- defines to support the Inverse NAND Flash Translation Layer * * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) - * - * $Id: inftl.h,v 1.7 2005/06/13 13:08:45 sean Exp $ */ #ifndef __MTD_INFTL_H__ @@ -52,8 +50,6 @@ struct INFTLrecord { int INFTL_mount(struct INFTLrecord *s); int INFTL_formatblock(struct INFTLrecord *s, int block); -extern char inftlmountrev[]; - void INFTL_dumptables(struct INFTLrecord *s); void INFTL_dumpVUchains(struct INFTLrecord *s); diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index a9fae03..85e3939 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -1,6 +1,5 @@ /* Overhauled routines for dealing with different mmap regions of flash */ -/* $Id: map.h,v 1.54 2005/11/07 11:14:54 gleixner Exp $ */ #ifndef __LINUX_MTD_MAP_H__ #define __LINUX_MTD_MAP_H__ diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 245f909..31ed234 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -1,6 +1,4 @@ /* - * $Id: mtd.h,v 1.61 2005/11/07 11:14:54 gleixner Exp $ - * * Copyright (C) 1999-2003 David Woodhouse et al. * * Released under GPL diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index c42bc7f..1288be7 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -5,8 +5,6 @@ * Steven J. Hill * Thomas Gleixner * - * $Id: nand.h,v 1.74 2005/09/15 13:58:50 vwool Exp $ - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. diff --git a/include/linux/mtd/nand_ecc.h b/include/linux/mtd/nand_ecc.h index 12c5bc3..090da50 100644 --- a/include/linux/mtd/nand_ecc.h +++ b/include/linux/mtd/nand_ecc.h @@ -3,8 +3,6 @@ * * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) * - * $Id: nand_ecc.h,v 1.4 2004/06/17 02:35:02 dbrown Exp $ - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h index 001eec5..dcaf611e 100644 --- a/include/linux/mtd/nftl.h +++ b/include/linux/mtd/nftl.h @@ -1,6 +1,4 @@ /* - * $Id: nftl.h,v 1.16 2004/06/30 14:49:00 dbrown Exp $ - * * (C) 1999-2003 David Woodhouse */ diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h index 7c37d7e..5014f7a 100644 --- a/include/linux/mtd/partitions.h +++ b/include/linux/mtd/partitions.h @@ -4,8 +4,6 @@ * (C) 2000 Nicolas Pitre * * This code is GPL - * - * $Id: partitions.h,v 1.17 2005/11/07 11:14:55 gleixner Exp $ */ #ifndef MTD_PARTITIONS_H diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index 0dc07d5..c8e63a5 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h @@ -2,8 +2,6 @@ * For boards with physically mapped flash and using * drivers/mtd/maps/physmap.c mapping driver. * - * $Id: physmap.h,v 1.4 2005/11/07 11:14:55 gleixner Exp $ - * * Copyright (C) 2003 MontaVista Software Inc. * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net * diff --git a/include/linux/mtd/plat-ram.h b/include/linux/mtd/plat-ram.h index 0e37ad0..e07890a 100644 --- a/include/linux/mtd/plat-ram.h +++ b/include/linux/mtd/plat-ram.h @@ -6,8 +6,6 @@ * * Generic platform device based RAM map * - * $Id: plat-ram.h,v 1.2 2005/01/24 00:37:40 bjd Exp $ - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. diff --git a/include/linux/mtd/pmc551.h b/include/linux/mtd/pmc551.h index 5cc070c..27ad40a 100644 --- a/include/linux/mtd/pmc551.h +++ b/include/linux/mtd/pmc551.h @@ -1,6 +1,4 @@ /* - * $Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $ - * * PMC551 PCI Mezzanine Ram Device * * Author: @@ -17,7 +15,7 @@ #include -#define PMC551_VERSION "$Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $\n"\ +#define PMC551_VERSION \ "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n" /* diff --git a/include/linux/mtd/xip.h b/include/linux/mtd/xip.h index e9d40bd..36efcba 100644 --- a/include/linux/mtd/xip.h +++ b/include/linux/mtd/xip.h @@ -11,8 +11,6 @@ * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. - * - * $Id: xip.h,v 1.5 2005/11/07 11:14:55 gleixner Exp $ */ #ifndef __LINUX_MTD_XIP_H__ diff --git a/include/mtd/inftl-user.h b/include/mtd/inftl-user.h index 9b1e252..e17eda3 100644 --- a/include/mtd/inftl-user.h +++ b/include/mtd/inftl-user.h @@ -1,6 +1,4 @@ /* - * $Id: inftl-user.h,v 1.2 2005/11/07 11:14:56 gleixner Exp $ - * * Parts of INFTL headers shared with userspace * */ diff --git a/include/mtd/jffs2-user.h b/include/mtd/jffs2-user.h index d508ef0..001685d 100644 --- a/include/mtd/jffs2-user.h +++ b/include/mtd/jffs2-user.h @@ -1,6 +1,4 @@ /* - * $Id: jffs2-user.h,v 1.1 2004/05/05 11:57:54 dwmw2 Exp $ - * * JFFS2 definitions for use in user space only */ diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h index 615072c..c6c61cd 100644 --- a/include/mtd/mtd-abi.h +++ b/include/mtd/mtd-abi.h @@ -1,6 +1,4 @@ /* - * $Id: mtd-abi.h,v 1.13 2005/11/07 11:14:56 gleixner Exp $ - * * Portions of MTD ABI definition which are shared by kernel and user space */ diff --git a/include/mtd/mtd-user.h b/include/mtd/mtd-user.h index 713f34d..170ceca 100644 --- a/include/mtd/mtd-user.h +++ b/include/mtd/mtd-user.h @@ -1,6 +1,4 @@ /* - * $Id: mtd-user.h,v 1.2 2004/05/05 14:44:57 dwmw2 Exp $ - * * MTD ABI header for use by user space only. */ diff --git a/include/mtd/nftl-user.h b/include/mtd/nftl-user.h index b2bca18..390d21c 100644 --- a/include/mtd/nftl-user.h +++ b/include/mtd/nftl-user.h @@ -1,6 +1,4 @@ /* - * $Id: nftl-user.h,v 1.2 2005/11/07 11:14:56 gleixner Exp $ - * * Parts of NFTL headers shared with userspace * */ -- cgit v1.1 From d4f4c0aa8e36f69e46360b3d3569dc15d6099894 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?H=C3=A5vard=20Skinnemoen?= Date: Fri, 6 Jun 2008 18:04:52 +0200 Subject: [MTD] [NAND] rename at91_nand -> atmel_nand: file names and Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The AT91 NAND driver needs just a few tiny modifications to work on AVR32 as well. Rename it atmel_nand to reflect this. Also move the ECC register definitions into drivers/mtd/nand since they are only useful to the atmel_nand driver, and get rid of the useless filename at the top of each file. Signed-off-by: Håvard Skinnemoen Signed-off-by: David Woodhouse --- include/asm-arm/arch-at91/at91_ecc.h | 38 ------------------------------------ 1 file changed, 38 deletions(-) delete mode 100644 include/asm-arm/arch-at91/at91_ecc.h (limited to 'include') diff --git a/include/asm-arm/arch-at91/at91_ecc.h b/include/asm-arm/arch-at91/at91_ecc.h deleted file mode 100644 index 1e5a8ca..0000000 --- a/include/asm-arm/arch-at91/at91_ecc.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_ecc.h - * - * Error Corrected Code Controller (ECC) - System peripherals regsters. - * Based on AT91SAM9260 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef AT91_ECC_H -#define AT91_ECC_H - -#define AT91_ECC_CR 0x00 /* Control register */ -#define AT91_ECC_RST (1 << 0) /* Reset parity */ - -#define AT91_ECC_MR 0x04 /* Mode register */ -#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */ -#define AT91_ECC_PAGESIZE_528 (0) -#define AT91_ECC_PAGESIZE_1056 (1) -#define AT91_ECC_PAGESIZE_2112 (2) -#define AT91_ECC_PAGESIZE_4224 (3) - -#define AT91_ECC_SR 0x08 /* Status register */ -#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */ -#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ -#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */ - -#define AT91_ECC_PR 0x0c /* Parity register */ -#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */ -#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ - -#define AT91_ECC_NPR 0x10 /* NParity register */ -#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */ - -#endif -- cgit v1.1 From 3c3796cc32b6e53653a5eb868dc959b8c2779db9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?H=C3=A5vard=20Skinnemoen?= Date: Fri, 6 Jun 2008 18:04:53 +0200 Subject: [MTD] [NAND] rename at91_nand -> atmel_nand: internal symbols MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is basically s/at91_nand/atmel_nand/g with some manual inspection. Signed-off-by: Håvard Skinnemoen Signed-off-by: David Woodhouse --- include/asm-arm/arch-at91/board.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h index dc189f0..6296922 100644 --- a/include/asm-arm/arch-at91/board.h +++ b/include/asm-arm/arch-at91/board.h @@ -85,7 +85,7 @@ struct at91_usbh_data { extern void __init at91_add_device_usbh(struct at91_usbh_data *data); /* NAND / SmartMedia */ -struct at91_nand_data { +struct atmel_nand_data { u8 enable_pin; /* chip enable */ u8 det_pin; /* card detect */ u8 rdy_pin; /* ready/busy */ @@ -94,7 +94,7 @@ struct at91_nand_data { u8 bus_width_16; /* buswidth is 16 bit */ struct mtd_partition* (*partition_info)(int, int*); }; -extern void __init at91_add_device_nand(struct at91_nand_data *data); +extern void __init at91_add_device_nand(struct atmel_nand_data *data); /* I2C*/ extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices); -- cgit v1.1 From 62090a08aba579e6c69319fac4d4a1f806f26400 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?H=C3=A5vard=20Skinnemoen?= Date: Fri, 6 Jun 2008 18:04:56 +0200 Subject: [MTD] [NAND] avr32: atmel_nand platform code for AT32AP700x MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This function initializes and adds a platform_device for a NAND flash interface on SMC chip select 3. Signed-off-by: Håvard Skinnemoen Signed-off-by: David Woodhouse --- include/asm-avr32/arch-at32ap/board.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'include') diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h index a4e2d28..cc5906c 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h @@ -85,4 +85,17 @@ struct platform_device * at32_add_device_cf(unsigned int id, unsigned int extint, struct cf_platform_data *data); +/* NAND / SmartMedia */ +struct atmel_nand_data { + int enable_pin; /* chip enable */ + int det_pin; /* card detect */ + int rdy_pin; /* ready/busy */ + u8 ale; /* address line number connected to ALE */ + u8 cle; /* address line number connected to CLE */ + u8 bus_width_16; /* buswidth is 16 bit */ + struct mtd_partition *(*partition_info)(int size, int *num_partitions); +}; +struct platform_device * +at32_add_device_nand(unsigned int id, struct atmel_nand_data *data); + #endif /* __ASM_ARCH_BOARD_H */ -- cgit v1.1 From ee7e5516be4f2107535ad5a3d47d9c79f93661a2 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 29 Jun 2008 14:18:46 +0400 Subject: generic: per-device coherent dma allocator Currently x86_32, sh and cris-v32 provide per-device coherent dma memory allocator. However their implementation is nearly identical. Refactor out common code to be reused by them. Signed-off-by: Dmitry Baryshkov Signed-off-by: Ingo Molnar --- include/asm-generic/dma-coherent.h | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 include/asm-generic/dma-coherent.h (limited to 'include') diff --git a/include/asm-generic/dma-coherent.h b/include/asm-generic/dma-coherent.h new file mode 100644 index 0000000..85a3ffa --- /dev/null +++ b/include/asm-generic/dma-coherent.h @@ -0,0 +1,32 @@ +#ifndef DMA_COHERENT_H +#define DMA_COHERENT_H + +#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT +/* + * These two functions are only for dma allocator. + * Don't use them in device drivers. + */ +int dma_alloc_from_coherent(struct device *dev, ssize_t size, + dma_addr_t *dma_handle, void **ret); +int dma_release_from_coherent(struct device *dev, int order, void *vaddr); + +/* + * Standard interface + */ +#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY +extern int +dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, + dma_addr_t device_addr, size_t size, int flags); + +extern void +dma_release_declared_memory(struct device *dev); + +extern void * +dma_mark_declared_memory_occupied(struct device *dev, + dma_addr_t device_addr, size_t size); +#else +#define dma_alloc_from_coherent(dev, size, handle, ret) (0) +#define dma_release_from_coherent(dev, order, vaddr) (0) +#endif + +#endif -- cgit v1.1 From 323ec001c6bb98eeabb5abbdbb8c8055d9496554 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 29 Jun 2008 14:19:31 +0400 Subject: x86: use generic per-device dma coherent allocator Signed-off-by: Dmitry Baryshkov Signed-off-by: Ingo Molnar --- include/asm-x86/dma-mapping.h | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) (limited to 'include') diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h index a1a4dc7..c68f360 100644 --- a/include/asm-x86/dma-mapping.h +++ b/include/asm-x86/dma-mapping.h @@ -213,25 +213,5 @@ static inline int dma_get_cache_alignment(void) #define dma_is_consistent(d, h) (1) -#ifdef CONFIG_X86_32 -# define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY -struct dma_coherent_mem { - void *virt_base; - u32 device_base; - int size; - int flags; - unsigned long *bitmap; -}; - -extern int -dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, - dma_addr_t device_addr, size_t size, int flags); - -extern void -dma_release_declared_memory(struct device *dev); - -extern void * -dma_mark_declared_memory_occupied(struct device *dev, - dma_addr_t device_addr, size_t size); -#endif /* CONFIG_X86_32 */ +#include #endif -- cgit v1.1 From 68e2fc78e5055740126df8eab0d31005495756c9 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Mon, 14 Jul 2008 16:51:57 +0800 Subject: Blackfin arch: Fix bug - Kernel does not boot if re-program clocks Don't write conflicting data to EBIU_SDBCTL after the SDRAM is configured. This can cause data corruption, since we might change SDRAM row and column addressing modes. Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf527/mem_init.h | 27 --------------------------- include/asm-blackfin/mach-bf533/mem_init.h | 27 --------------------------- include/asm-blackfin/mach-bf537/mem_init.h | 27 --------------------------- include/asm-blackfin/mach-bf561/mem_init.h | 27 --------------------------- 4 files changed, 108 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf527/mem_init.h b/include/asm-blackfin/mach-bf527/mem_init.h index 008ca66..cbe03f4 100644 --- a/include/asm-blackfin/mach-bf527/mem_init.h +++ b/include/asm-blackfin/mach-bf527/mem_init.h @@ -146,33 +146,6 @@ #define SDRAM_CL CL_3 #endif -#if (CONFIG_MEM_SIZE == 128) -#define SDRAM_SIZE EBSZ_128 -#endif -#if (CONFIG_MEM_SIZE == 64) -#define SDRAM_SIZE EBSZ_64 -#endif -#if (CONFIG_MEM_SIZE == 32) -#define SDRAM_SIZE EBSZ_32 -#endif -#if (CONFIG_MEM_SIZE == 16) -#define SDRAM_SIZE EBSZ_16 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 11) -#define SDRAM_WIDTH EBCAW_11 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 10) -#define SDRAM_WIDTH EBCAW_10 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 9) -#define SDRAM_WIDTH EBCAW_9 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 8) -#define SDRAM_WIDTH EBCAW_8 -#endif - -#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE) - /* Equation from section 17 (p17-46) of BF533 HRM */ #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) diff --git a/include/asm-blackfin/mach-bf533/mem_init.h b/include/asm-blackfin/mach-bf533/mem_init.h index f8f3190..995c06b 100644 --- a/include/asm-blackfin/mach-bf533/mem_init.h +++ b/include/asm-blackfin/mach-bf533/mem_init.h @@ -133,33 +133,6 @@ #define SDRAM_CL CL_3 #endif -#if (CONFIG_MEM_SIZE == 128) -#define SDRAM_SIZE EBSZ_128 -#endif -#if (CONFIG_MEM_SIZE == 64) -#define SDRAM_SIZE EBSZ_64 -#endif -#if (CONFIG_MEM_SIZE == 32) -#define SDRAM_SIZE EBSZ_32 -#endif -#if (CONFIG_MEM_SIZE == 16) -#define SDRAM_SIZE EBSZ_16 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 11) -#define SDRAM_WIDTH EBCAW_11 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 10) -#define SDRAM_WIDTH EBCAW_10 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 9) -#define SDRAM_WIDTH EBCAW_9 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 8) -#define SDRAM_WIDTH EBCAW_8 -#endif - -#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE) - /* Equation from section 17 (p17-46) of BF533 HRM */ #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) diff --git a/include/asm-blackfin/mach-bf537/mem_init.h b/include/asm-blackfin/mach-bf537/mem_init.h index 9ad979d..f67698f 100644 --- a/include/asm-blackfin/mach-bf537/mem_init.h +++ b/include/asm-blackfin/mach-bf537/mem_init.h @@ -139,33 +139,6 @@ #define SDRAM_CL CL_3 #endif -#if (CONFIG_MEM_SIZE == 128) -#define SDRAM_SIZE EBSZ_128 -#endif -#if (CONFIG_MEM_SIZE == 64) -#define SDRAM_SIZE EBSZ_64 -#endif -#if (CONFIG_MEM_SIZE == 32) -#define SDRAM_SIZE EBSZ_32 -#endif -#if (CONFIG_MEM_SIZE == 16) -#define SDRAM_SIZE EBSZ_16 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 11) -#define SDRAM_WIDTH EBCAW_11 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 10) -#define SDRAM_WIDTH EBCAW_10 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 9) -#define SDRAM_WIDTH EBCAW_9 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 8) -#define SDRAM_WIDTH EBCAW_8 -#endif - -#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EBE) - /* Equation from section 17 (p17-46) of BF533 HRM */ #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) diff --git a/include/asm-blackfin/mach-bf561/mem_init.h b/include/asm-blackfin/mach-bf561/mem_init.h index 439a589..e163260 100644 --- a/include/asm-blackfin/mach-bf561/mem_init.h +++ b/include/asm-blackfin/mach-bf561/mem_init.h @@ -131,33 +131,6 @@ #define SDRAM_CL CL_3 #endif -#if (CONFIG_MEM_SIZE == 128) -#define SDRAM_SIZE EB0_SZ_128 -#endif -#if (CONFIG_MEM_SIZE == 64) -#define SDRAM_SIZE EB0_SZ_64 -#endif -#if ( CONFIG_MEM_SIZE == 32) -#define SDRAM_SIZE EB0_SZ_32 -#endif -#if (CONFIG_MEM_SIZE == 16) -#define SDRAM_SIZE EB0_SZ_16 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 11) -#define SDRAM_WIDTH EB0_CAW_11 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 10) -#define SDRAM_WIDTH EB0_CAW_10 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 9) -#define SDRAM_WIDTH EB0_CAW_9 -#endif -#if (CONFIG_MEM_ADD_WIDTH == 8) -#define SDRAM_WIDTH EB0_CAW_8 -#endif - -#define mem_SDBCTL (SDRAM_WIDTH | SDRAM_SIZE | EB0_E) - /* Equation from section 17 (p17-46) of BF533 HRM */ #define mem_SDRRC (((CONFIG_SCLK_HZ / 1000) * SDRAM_Tref) / SDRAM_NRA) - (SDRAM_tRAS_num + SDRAM_tRP_num) -- cgit v1.1 From 1c0d20cd29aec11a3580cedf0bccec25052e8d4c Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Tue, 15 Jul 2008 12:08:50 +0800 Subject: Blackfin arch: add TXDWA definition to enable new feature Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf527/anomaly.h | 2 ++ include/asm-blackfin/mach-bf527/defBF527.h | 1 + include/asm-blackfin/mach-bf537/defBF537.h | 1 + 3 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf527/anomaly.h b/include/asm-blackfin/mach-bf527/anomaly.h index 4725268..b7b166f 100644 --- a/include/asm-blackfin/mach-bf527/anomaly.h +++ b/include/asm-blackfin/mach-bf527/anomaly.h @@ -23,6 +23,8 @@ #define ANOMALY_05000245 (1) /* Sensitivity To Noise with Slow Input Edge Rates on External SPORT TX and RX Clocks */ #define ANOMALY_05000265 (1) +/* New Feature: EMAC TX DMA Word Alignment */ +#define ANOMALY_05000285 (1) /* Errors when SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted */ #define ANOMALY_05000312 (1) /* Incorrect Access of OTP_STATUS During otp_write() Function */ diff --git a/include/asm-blackfin/mach-bf527/defBF527.h b/include/asm-blackfin/mach-bf527/defBF527.h index 82134f5..f1a70db 100644 --- a/include/asm-blackfin/mach-bf527/defBF527.h +++ b/include/asm-blackfin/mach-bf527/defBF527.h @@ -302,6 +302,7 @@ #define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */ #define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */ #define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */ +#define TXDWA 0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */ #define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */ #define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */ diff --git a/include/asm-blackfin/mach-bf537/defBF537.h b/include/asm-blackfin/mach-bf537/defBF537.h index 3f45590..abde24c 100644 --- a/include/asm-blackfin/mach-bf537/defBF537.h +++ b/include/asm-blackfin/mach-bf537/defBF537.h @@ -290,6 +290,7 @@ #define PHYIE 0x00000001 /* PHY_INT Interrupt Enable */ #define RXDWA 0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */ #define RXCKS 0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */ +#define TXDWA 0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */ #define MDCDIV 0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */ #define SET_MDCDIV(x) (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */ -- cgit v1.1 From 1efc80b53eb54770139219f99657abd92595fc86 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Sat, 19 Jul 2008 16:57:32 +0800 Subject: Blackfin arch: Functional power management support Enable: PM_SUSPEND_MEM -> Blackfin Hibernate to SDRAM This feature requires a special bootloader (u-boot) supporting return from hibernate. Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/dma.h | 8 ++++ include/asm-blackfin/dpmc.h | 82 +++++++++++++--------------------- include/asm-blackfin/gpio.h | 19 +++----- include/asm-blackfin/mach-bf548/gpio.h | 8 ++++ 4 files changed, 54 insertions(+), 63 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/dma.h b/include/asm-blackfin/dma.h index c0d5259..3cd4b52 100644 --- a/include/asm-blackfin/dma.h +++ b/include/asm-blackfin/dma.h @@ -144,8 +144,16 @@ struct dma_channel { void *data; unsigned int dma_enable_flag; unsigned int loopback_flag; +#ifdef CONFIG_PM + unsigned short saved_peripheral_map; +#endif }; +#ifdef CONFIG_PM +int blackfin_dma_suspend(void); +void blackfin_dma_resume(void); +#endif + /******************************************************************************* * DMA API's *******************************************************************************/ diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h index 7f34cd3..de28e6e 100644 --- a/include/asm-blackfin/dpmc.h +++ b/include/asm-blackfin/dpmc.h @@ -7,63 +7,18 @@ #ifndef _BLACKFIN_DPMC_H_ #define _BLACKFIN_DPMC_H_ -#define SLEEP_MODE 1 -#define DEEP_SLEEP_MODE 2 -#define ACTIVE_PLL_DISABLED 3 -#define FULLON_MODE 4 -#define ACTIVE_PLL_ENABLED 5 -#define HIBERNATE_MODE 6 - -#define IOCTL_FULL_ON_MODE _IO('s', 0xA0) -#define IOCTL_ACTIVE_MODE _IO('s', 0xA1) -#define IOCTL_SLEEP_MODE _IO('s', 0xA2) -#define IOCTL_DEEP_SLEEP_MODE _IO('s', 0xA3) -#define IOCTL_HIBERNATE_MODE _IO('s', 0xA4) -#define IOCTL_CHANGE_FREQUENCY _IOW('s', 0xA5, unsigned long) -#define IOCTL_CHANGE_VOLTAGE _IOW('s', 0xA6, unsigned long) -#define IOCTL_SET_CCLK _IOW('s', 0xA7, unsigned long) -#define IOCTL_SET_SCLK _IOW('s', 0xA8, unsigned long) -#define IOCTL_GET_PLLSTATUS _IOW('s', 0xA9, unsigned long) -#define IOCTL_GET_CORECLOCK _IOW('s', 0xAA, unsigned long) -#define IOCTL_GET_SYSTEMCLOCK _IOW('s', 0xAB, unsigned long) -#define IOCTL_GET_VCO _IOW('s', 0xAC, unsigned long) -#define IOCTL_DISABLE_WDOG_TIMER _IO('s', 0xAD) -#define IOCTL_UNMASK_WDOG_WAKEUP_EVENT _IO('s',0xAE) -#define IOCTL_PROGRAM_WDOG_TIMER _IOW('s',0xAF,unsigned long) -#define IOCTL_CLEAR_WDOG_WAKEUP_EVENT _IO('s',0xB0) -#define IOCTL_SLEEP_DEEPER_MODE _IO('s',0xB1) - -#define DPMC_MINOR 254 - -#define ON 0 -#define OFF 1 - #ifdef __KERNEL__ +#ifndef __ASSEMBLY__ -unsigned long calc_volt(void); -int calc_vlev(int vlt); -unsigned long change_voltage(unsigned long volt); -int calc_msel(int vco_hz); -unsigned long change_frequency(unsigned long vco_mhz); -int set_pll_div(unsigned short sel, unsigned char flag); -int get_vco(void); -unsigned long change_system_clock(unsigned long clock); -unsigned long change_core_clock(unsigned long clock); -unsigned long get_pll_status(void); -void change_baud(int baud); -void fullon_mode(void); -void active_mode(void); void sleep_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void deep_sleep(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void hibernate_mode(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); void sleep_deeper(u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2); -void program_wdog_timer(unsigned long); -void unmask_wdog_wakeup_evt(void); -void clear_wdog_wakeup_evt(void); -void disable_wdog_timer(void); +void do_hibernate(int wakeup); +void set_dram_srfs(void); +void unset_dram_srfs(void); -extern unsigned long get_cclk(void); -extern unsigned long get_sclk(void); +#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16)) struct bfin_dpmc_platform_data { const unsigned int *tuple_tab; @@ -71,8 +26,33 @@ struct bfin_dpmc_platform_data { unsigned short vr_settling_time; /* in us */ }; -#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16)) +#else + +#define PM_PUSH(x) \ + R0 = [P0 + (x - SRAM_BASE_ADDRESS)];\ + [--SP] = R0;\ + +#define PM_POP(x) \ + R0 = [SP++];\ + [P0 + (x - SRAM_BASE_ADDRESS)] = R0;\ + +#define PM_SYS_PUSH(x) \ + R0 = [P0 + (x - PLL_CTL)];\ + [--SP] = R0;\ + +#define PM_SYS_POP(x) \ + R0 = [SP++];\ + [P0 + (x - PLL_CTL)] = R0;\ + +#define PM_SYS_PUSH16(x) \ + R0 = w[P0 + (x - PLL_CTL)];\ + [--SP] = R0;\ + +#define PM_SYS_POP16(x) \ + R0 = [SP++];\ + w[P0 + (x - PLL_CTL)] = R0;\ +#endif #endif /* __KERNEL__ */ #endif /*_BLACKFIN_DPMC_H_*/ diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h index ff95e9d..168f125 100644 --- a/include/asm-blackfin/gpio.h +++ b/include/asm-blackfin/gpio.h @@ -376,8 +376,12 @@ struct gpio_port_t { #endif #ifdef CONFIG_PM -unsigned int bfin_pm_setup(void); -void bfin_pm_restore(void); + +unsigned int bfin_pm_standby_setup(void); +void bfin_pm_standby_restore(void); + +void bfin_gpio_pm_hibernate_restore(void); +void bfin_gpio_pm_hibernate_suspend(void); #ifndef CONFIG_BF54x #define PM_WAKE_RISING 0x1 @@ -392,17 +396,8 @@ void gpio_pm_wakeup_free(unsigned gpio); struct gpio_port_s { unsigned short data; - unsigned short data_clear; - unsigned short data_set; - unsigned short toggle; unsigned short maska; - unsigned short maska_clear; - unsigned short maska_set; - unsigned short maska_toggle; unsigned short maskb; - unsigned short maskb_clear; - unsigned short maskb_set; - unsigned short maskb_toggle; unsigned short dir; unsigned short polar; unsigned short edge; @@ -411,10 +406,10 @@ struct gpio_port_s { unsigned short fer; unsigned short reserved; + unsigned short mux; }; #endif /*CONFIG_BF54x*/ #endif /*CONFIG_PM*/ - /*********************************************************** * * FUNCTIONS: Blackfin GPIO Driver diff --git a/include/asm-blackfin/mach-bf548/gpio.h b/include/asm-blackfin/mach-bf548/gpio.h index cb8b0f1..bba82dc 100644 --- a/include/asm-blackfin/mach-bf548/gpio.h +++ b/include/asm-blackfin/mach-bf548/gpio.h @@ -209,3 +209,11 @@ struct gpio_port_t { unsigned short dummy7; unsigned int port_mux; }; + +struct gpio_port_s { + unsigned short fer; + unsigned short data; + unsigned short dir; + unsigned short inen; + unsigned int mux; +}; -- cgit v1.1 From 1fe532685a1984dc9f2603ed20bd5e630ba79709 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Jul 2008 13:30:14 +0400 Subject: ARM: support generic per-device coherent dma mem Signed-off-by: Dmitry Baryshkov Cc: Jesse Barnes Cc: Russell King Signed-off-by: Ingo Molnar --- include/asm-arm/dma-mapping.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index e99406a..943f23b 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -7,6 +7,8 @@ #include +#include + /* * DMA-consistent mapping functions. These allocate/free a region of * uncached, unwrite-buffered mapped memory space for use with DMA -- cgit v1.1 From 9de90ac27d752bc0177baf2699ab483888de0743 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 18 Jul 2008 13:30:31 +0400 Subject: Sh: use generic per-device coherent dma allocator Signed-off-by: Dmitry Baryshkov Cc: Jesse Barnes Cc: Paul Mundt Signed-off-by: Ingo Molnar --- include/asm-sh/dma-mapping.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index 22cc419..5956c5d 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -5,6 +5,7 @@ #include #include #include +#include extern struct bus_type pci_bus_type; -- cgit v1.1 From 262c3825a9f3eb0f4f30ebb4b1ee57397bcb3ffc Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Sat, 19 Jul 2008 15:42:41 +0800 Subject: Blackfin arch: Extend sram malloc to handle L2 SRAM. Extend system call to alloc L2 SRAM in application. Automatically move following sections to L2 SRAM: 1. kernel built-in l2 attribute section 2. kernel module l2 attribute section 3. elf-fdpic application l2 attribute section Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- include/asm-blackfin/bfin-global.h | 8 +++++++- include/asm-blackfin/elf.h | 2 ++ include/asm-blackfin/module.h | 5 +++-- 3 files changed, 12 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h index 7603383..320aa5e 100644 --- a/include/asm-blackfin/bfin-global.h +++ b/include/asm-blackfin/bfin-global.h @@ -92,16 +92,20 @@ extern void *l1_data_B_sram_alloc(size_t); extern void *l1_inst_sram_alloc(size_t); extern void *l1_data_sram_alloc(size_t); extern void *l1_data_sram_zalloc(size_t); +extern void *l2_sram_alloc(size_t); +extern void *l2_sram_zalloc(size_t); extern int l1_data_A_sram_free(const void*); extern int l1_data_B_sram_free(const void*); extern int l1_inst_sram_free(const void*); extern int l1_data_sram_free(const void*); +extern int l2_sram_free(const void *); extern int sram_free(const void*); #define L1_INST_SRAM 0x00000001 #define L1_DATA_A_SRAM 0x00000002 #define L1_DATA_B_SRAM 0x00000004 #define L1_DATA_SRAM 0x00000006 +#define L2_SRAM 0x00000008 extern void *sram_alloc_with_lsl(size_t, unsigned long); extern int sram_free_with_lsl(const void*); @@ -114,7 +118,9 @@ extern struct file_operations dpmc_fops; extern unsigned long _ramstart, _ramend, _rambase; extern unsigned long memory_start, memory_end, physical_mem_end; extern char _stext_l1[], _etext_l1[], _sdata_l1[], _edata_l1[], _sbss_l1[], - _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _ebss_b_l1[]; + _ebss_l1[], _l1_lma_start[], _sdata_b_l1[], _ebss_b_l1[], + _stext_l2[], _etext_l2[], _sdata_l2[], _edata_l2[], _sbss_l2[], + _ebss_l2[], _l2_lma_start[]; #ifdef CONFIG_MTD_UCLINUX extern unsigned long memory_mtd_start, memory_mtd_end, mtd_size; diff --git a/include/asm-blackfin/elf.h b/include/asm-blackfin/elf.h index 30303fc..67a03a8a 100644 --- a/include/asm-blackfin/elf.h +++ b/include/asm-blackfin/elf.h @@ -15,6 +15,8 @@ #define EF_BFIN_FDPIC 0x00000002 /* -mfdpic */ #define EF_BFIN_CODE_IN_L1 0x00000010 /* --code-in-l1 */ #define EF_BFIN_DATA_IN_L1 0x00000020 /* --data-in-l1 */ +#define EF_BFIN_CODE_IN_L2 0x00000040 /* --code-in-l2 */ +#define EF_BFIN_DATA_IN_L2 0x00000080 /* --data-in-l2 */ typedef unsigned long elf_greg_t; diff --git a/include/asm-blackfin/module.h b/include/asm-blackfin/module.h index 3c7ce16..e3128df 100644 --- a/include/asm-blackfin/module.h +++ b/include/asm-blackfin/module.h @@ -6,8 +6,6 @@ #define Elf_Shdr Elf32_Shdr #define Elf_Sym Elf32_Sym #define Elf_Ehdr Elf32_Ehdr -#define FLG_CODE_IN_L1 0x10 -#define FLG_DATA_IN_L1 0x20 struct mod_arch_specific { Elf_Shdr *text_l1; @@ -15,5 +13,8 @@ struct mod_arch_specific { Elf_Shdr *bss_a_l1; Elf_Shdr *data_b_l1; Elf_Shdr *bss_b_l1; + Elf_Shdr *text_l2; + Elf_Shdr *data_l2; + Elf_Shdr *bss_l2; }; #endif /* _ASM_BFIN_MODULE_H */ -- cgit v1.1 From aa3348f461da1df5c583f9916ab80298ddd68eff Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Sat, 19 Jul 2008 15:54:10 +0800 Subject: Blackfin arch: Add return value check in bfin_sir_probe(), remove SSYNC(). Signed-off-by: Graf Yang Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf527/bfin_sir.h | 21 ++++++++++++----- include/asm-blackfin/mach-bf533/bfin_sir.h | 13 +++++++---- include/asm-blackfin/mach-bf537/bfin_sir.h | 21 ++++++++++++----- include/asm-blackfin/mach-bf548/bfin_sir.h | 37 ++++++++++++++++++++++-------- include/asm-blackfin/mach-bf561/bfin_sir.h | 13 +++++++---- 5 files changed, 75 insertions(+), 30 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf527/bfin_sir.h b/include/asm-blackfin/mach-bf527/bfin_sir.h index 0612d0c..cfd8ad4 100644 --- a/include/asm-blackfin/mach-bf527/bfin_sir.h +++ b/include/asm-blackfin/mach-bf527/bfin_sir.h @@ -118,16 +118,25 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port) #define DRIVER_NAME "bfin_sir" -static void bfin_sir_hw_init(void) +static int bfin_sir_hw_init(void) { + int ret = -ENODEV; #ifdef CONFIG_BFIN_SIR0 - peripheral_request(P_UART0_TX, DRIVER_NAME); - peripheral_request(P_UART0_RX, DRIVER_NAME); + ret = peripheral_request(P_UART0_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART0_RX, DRIVER_NAME); + if (ret) + return ret; #endif #ifdef CONFIG_BFIN_SIR1 - peripheral_request(P_UART1_TX, DRIVER_NAME); - peripheral_request(P_UART1_RX, DRIVER_NAME); + ret = peripheral_request(P_UART1_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART1_RX, DRIVER_NAME); + if (ret) + return ret; #endif - SSYNC(); + return ret; } diff --git a/include/asm-blackfin/mach-bf533/bfin_sir.h b/include/asm-blackfin/mach-bf533/bfin_sir.h index cefcf8b..9bb87e9 100644 --- a/include/asm-blackfin/mach-bf533/bfin_sir.h +++ b/include/asm-blackfin/mach-bf533/bfin_sir.h @@ -110,11 +110,16 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port) #define DRIVER_NAME "bfin_sir" -static void bfin_sir_hw_init(void) +static int bfin_sir_hw_init(void) { + int ret = -ENODEV; #ifdef CONFIG_BFIN_SIR0 - peripheral_request(P_UART0_TX, DRIVER_NAME); - peripheral_request(P_UART0_RX, DRIVER_NAME); + ret = peripheral_request(P_UART0_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART0_RX, DRIVER_NAME); + if (ret) + return ret; #endif - SSYNC(); + return ret; } diff --git a/include/asm-blackfin/mach-bf537/bfin_sir.h b/include/asm-blackfin/mach-bf537/bfin_sir.h index 0612d0c..cfd8ad4 100644 --- a/include/asm-blackfin/mach-bf537/bfin_sir.h +++ b/include/asm-blackfin/mach-bf537/bfin_sir.h @@ -118,16 +118,25 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port) #define DRIVER_NAME "bfin_sir" -static void bfin_sir_hw_init(void) +static int bfin_sir_hw_init(void) { + int ret = -ENODEV; #ifdef CONFIG_BFIN_SIR0 - peripheral_request(P_UART0_TX, DRIVER_NAME); - peripheral_request(P_UART0_RX, DRIVER_NAME); + ret = peripheral_request(P_UART0_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART0_RX, DRIVER_NAME); + if (ret) + return ret; #endif #ifdef CONFIG_BFIN_SIR1 - peripheral_request(P_UART1_TX, DRIVER_NAME); - peripheral_request(P_UART1_RX, DRIVER_NAME); + ret = peripheral_request(P_UART1_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART1_RX, DRIVER_NAME); + if (ret) + return ret; #endif - SSYNC(); + return ret; } diff --git a/include/asm-blackfin/mach-bf548/bfin_sir.h b/include/asm-blackfin/mach-bf548/bfin_sir.h index 5e94271..c41f9cf 100644 --- a/include/asm-blackfin/mach-bf548/bfin_sir.h +++ b/include/asm-blackfin/mach-bf548/bfin_sir.h @@ -124,26 +124,43 @@ struct bfin_sir_self { #define DRIVER_NAME "bfin_sir" -static void bfin_sir_hw_init(void) +static int bfin_sir_hw_init(void) { + int ret = -ENODEV; #ifdef CONFIG_BFIN_SIR0 - peripheral_request(P_UART0_TX, DRIVER_NAME); - peripheral_request(P_UART0_RX, DRIVER_NAME); + ret = peripheral_request(P_UART0_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART0_RX, DRIVER_NAME); + if (ret) + return ret; #endif #ifdef CONFIG_BFIN_SIR1 - peripheral_request(P_UART1_TX, DRIVER_NAME); - peripheral_request(P_UART1_RX, DRIVER_NAME); + ret = peripheral_request(P_UART1_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART1_RX, DRIVER_NAME); + if (ret) + return ret; #endif #ifdef CONFIG_BFIN_SIR2 - peripheral_request(P_UART2_TX, DRIVER_NAME); - peripheral_request(P_UART2_RX, DRIVER_NAME); + ret = peripheral_request(P_UART2_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART2_RX, DRIVER_NAME); + if (ret) + return ret; #endif #ifdef CONFIG_BFIN_SIR3 - peripheral_request(P_UART3_TX, DRIVER_NAME); - peripheral_request(P_UART3_RX, DRIVER_NAME); + ret = peripheral_request(P_UART3_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART3_RX, DRIVER_NAME); + if (ret) + return ret; #endif - SSYNC(); + return ret; } diff --git a/include/asm-blackfin/mach-bf561/bfin_sir.h b/include/asm-blackfin/mach-bf561/bfin_sir.h index cefcf8b..9bb87e9 100644 --- a/include/asm-blackfin/mach-bf561/bfin_sir.h +++ b/include/asm-blackfin/mach-bf561/bfin_sir.h @@ -110,11 +110,16 @@ static inline void SIR_UART_CLEAR_LSR(struct bfin_sir_port *port) #define DRIVER_NAME "bfin_sir" -static void bfin_sir_hw_init(void) +static int bfin_sir_hw_init(void) { + int ret = -ENODEV; #ifdef CONFIG_BFIN_SIR0 - peripheral_request(P_UART0_TX, DRIVER_NAME); - peripheral_request(P_UART0_RX, DRIVER_NAME); + ret = peripheral_request(P_UART0_TX, DRIVER_NAME); + if (ret) + return ret; + ret = peripheral_request(P_UART0_RX, DRIVER_NAME); + if (ret) + return ret; #endif - SSYNC(); + return ret; } -- cgit v1.1 From 0138da6101fa3cdfea7f470d014c2f13cc03e7a9 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Sat, 19 Jul 2008 16:56:53 +0800 Subject: Blackfin arch: fix bug - detect 0.1 silicon revision BF527-EZKIT as 0.0 version Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/processor.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-blackfin/processor.h b/include/asm-blackfin/processor.h index 1c00407..6f3995b 100644 --- a/include/asm-blackfin/processor.h +++ b/include/asm-blackfin/processor.h @@ -112,7 +112,26 @@ unsigned long get_wchan(struct task_struct *p); static inline uint32_t __pure bfin_revid(void) { /* stored in the upper 4 bits */ - return bfin_read_CHIPID() >> 28; + uint32_t revid = bfin_read_CHIPID() >> 28; + +#ifdef CONFIG_BF52x + /* ANOMALY_05000357 + * Incorrect Revision Number in DSPID Register + */ + if (revid == 0) + switch (bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI)) { + case 0x0010: + revid = 0; + break; + case 0x2796: + revid = 1; + break; + default: + revid = 0xFFFF; + break; + } +#endif + return revid; } static inline uint32_t __pure bfin_compiled_revid(void) -- cgit v1.1 From 8fa8b9fbab90c74139e8e868fe5b30b6a9f6be65 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 20 Jul 2008 15:00:32 +0400 Subject: Cris: convert to using generic dma-coherent mem allocator Signed-off-by: Dmitry Baryshkov Cc: Jesse Barnes Cc: Jesper Nilsson Signed-off-by: Ingo Molnar --- include/asm-cris/dma-mapping.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h index edc8d1b..4f58670c 100644 --- a/include/asm-cris/dma-mapping.h +++ b/include/asm-cris/dma-mapping.h @@ -14,6 +14,8 @@ #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #ifdef CONFIG_PCI +#include + void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t flag); -- cgit v1.1 From 6a4a636fad018500c5db7a2b56a00caeb21cbb2c Mon Sep 17 00:00:00 2001 From: Jon Smirl Date: Sun, 20 Jul 2008 11:27:22 -0400 Subject: powerpc/mpc5200: Add AC97 register definitions for the MPC52xx PSC Needed by the PSC AC97 sound driver Signed-off-by: Jon Smirl Signed-off-by: Grant Likely --- include/asm-powerpc/mpc52xx_psc.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h index 710c5d3..5467c2c 100644 --- a/include/asm-powerpc/mpc52xx_psc.h +++ b/include/asm-powerpc/mpc52xx_psc.h @@ -132,8 +132,12 @@ struct mpc52xx_psc { u8 reserved5[3]; u8 ctlr; /* PSC + 0x1c */ u8 reserved6[3]; - u16 ccr; /* PSC + 0x20 */ - u8 reserved7[14]; + /* BitClkDiv field of CCR is byte swapped in + * the hardware for mpc5200/b compatibility */ + u32 ccr; /* PSC + 0x20 */ + u32 ac97_slots; /* PSC + 0x24 */ + u32 ac97_cmd; /* PSC + 0x28 */ + u32 ac97_data; /* PSC + 0x2c */ u8 ivr; /* PSC + 0x30 */ u8 reserved8[3]; u8 ip; /* PSC + 0x34 */ -- cgit v1.1 From a19dd1bd7df839c52a668abcf288c2239442c3c9 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Tue, 22 Jul 2008 01:13:54 -0600 Subject: powerpc/mpc5200: add PSC SICR bit definitions Required by the PSC I2S audio driver. Signed-off-by: Grant Likely --- include/asm-powerpc/mpc52xx_psc.h | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h index 5467c2c..8917ed6 100644 --- a/include/asm-powerpc/mpc52xx_psc.h +++ b/include/asm-powerpc/mpc52xx_psc.h @@ -60,10 +60,12 @@ #define MPC52xx_PSC_RXTX_FIFO_ALARM 0x0002 #define MPC52xx_PSC_RXTX_FIFO_EMPTY 0x0001 -/* PSC interrupt mask bits */ +/* PSC interrupt status/mask bits */ #define MPC52xx_PSC_IMR_TXRDY 0x0100 #define MPC52xx_PSC_IMR_RXRDY 0x0200 #define MPC52xx_PSC_IMR_DB 0x0400 +#define MPC52xx_PSC_IMR_TXEMP 0x0800 +#define MPC52xx_PSC_IMR_ORERR 0x1000 #define MPC52xx_PSC_IMR_IPC 0x8000 /* PSC input port change bit */ @@ -92,6 +94,34 @@ #define MPC52xx_PSC_RFNUM_MASK 0x01ff +#define MPC52xx_PSC_SICR_DTS1 (1 << 29) +#define MPC52xx_PSC_SICR_SHDR (1 << 28) +#define MPC52xx_PSC_SICR_SIM_MASK (0xf << 24) +#define MPC52xx_PSC_SICR_SIM_UART (0x0 << 24) +#define MPC52xx_PSC_SICR_SIM_UART_DCD (0x8 << 24) +#define MPC52xx_PSC_SICR_SIM_CODEC_8 (0x1 << 24) +#define MPC52xx_PSC_SICR_SIM_CODEC_16 (0x2 << 24) +#define MPC52xx_PSC_SICR_SIM_AC97 (0x3 << 24) +#define MPC52xx_PSC_SICR_SIM_SIR (0x8 << 24) +#define MPC52xx_PSC_SICR_SIM_SIR_DCD (0xc << 24) +#define MPC52xx_PSC_SICR_SIM_MIR (0x5 << 24) +#define MPC52xx_PSC_SICR_SIM_FIR (0x6 << 24) +#define MPC52xx_PSC_SICR_SIM_CODEC_24 (0x7 << 24) +#define MPC52xx_PSC_SICR_SIM_CODEC_32 (0xf << 24) +#define MPC52xx_PSC_SICR_GENCLK (1 << 23) +#define MPC52xx_PSC_SICR_I2S (1 << 22) +#define MPC52xx_PSC_SICR_CLKPOL (1 << 21) +#define MPC52xx_PSC_SICR_SYNCPOL (1 << 20) +#define MPC52xx_PSC_SICR_CELLSLAVE (1 << 19) +#define MPC52xx_PSC_SICR_CELL2XCLK (1 << 18) +#define MPC52xx_PSC_SICR_ESAI (1 << 17) +#define MPC52xx_PSC_SICR_ENAC97 (1 << 16) +#define MPC52xx_PSC_SICR_SPI (1 << 15) +#define MPC52xx_PSC_SICR_MSTR (1 << 14) +#define MPC52xx_PSC_SICR_CPOL (1 << 13) +#define MPC52xx_PSC_SICR_CPHA (1 << 12) +#define MPC52xx_PSC_SICR_USEEOF (1 << 11) +#define MPC52xx_PSC_SICR_DISABLEEOF (1 << 10) /* Structure of the hardware registers */ struct mpc52xx_psc { -- cgit v1.1 From a822bea7962b500b0bcab41bf3500f7c40ae56b5 Mon Sep 17 00:00:00 2001 From: Dmitry Torokhov Date: Fri, 6 Jun 2008 01:34:00 -0400 Subject: Input: serio - mark serio_register_driver() __must_check Also remove extra declaration of serio_register_driver(). Signed-off-by: Dmitry Torokhov --- include/linux/serio.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/serio.h b/include/linux/serio.h index e72716c..25641d9 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -87,11 +87,10 @@ void serio_unregister_port(struct serio *serio); void serio_unregister_child_port(struct serio *serio); int __serio_register_driver(struct serio_driver *drv, struct module *owner, const char *mod_name); -static inline int serio_register_driver(struct serio_driver *drv) +static inline int __must_check serio_register_driver(struct serio_driver *drv) { return __serio_register_driver(drv, THIS_MODULE, KBUILD_MODNAME); } -int serio_register_driver(struct serio_driver *drv); void serio_unregister_driver(struct serio_driver *drv); static inline int serio_write(struct serio *serio, unsigned char data) -- cgit v1.1 From 5e85e732f0ed56aa97a3ba26ac2b93ffe597a208 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sun, 20 Jul 2008 06:31:39 -0300 Subject: V4L/DVB (8428): videodev: rename 'dev' to 'parent' The field 'dev' is not the video device, but the parent of the video device. Rename accordingly. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 33f379b..5ae261f 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -89,7 +89,7 @@ struct video_device /* sysfs */ struct device class_dev; /* v4l device */ - struct device *dev; /* device parent */ + struct device *parent; /* device parent */ /* device info */ char name[32]; -- cgit v1.1 From 22a04f106346c3af019135f2de3cabf9ac41c3ba Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sun, 20 Jul 2008 06:35:02 -0300 Subject: V4L/DVB (8429): videodev: renamed 'class_dev' to 'dev' The class_dev field is a normal device, not a class device. This is very confusing and now that the old 'dev' field has been renamed to 'parent' we can rename 'class_dev' to just 'dev'. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 5ae261f..185372f 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -88,18 +88,18 @@ struct video_device const struct file_operations *fops; /* sysfs */ - struct device class_dev; /* v4l device */ + struct device dev; /* v4l device */ struct device *parent; /* device parent */ /* device info */ char name[32]; - int type; /* v4l1 */ - int type2; /* v4l2 */ + int type; /* v4l1 */ + int type2; /* v4l2 */ int minor; /* attribute to diferentiate multiple indexs on one physical device */ int index; - int debug; /* Activates debug level*/ + int debug; /* Activates debug level*/ /* Video standard vars */ v4l2_std_id tvnorms; /* Supported tv norms */ @@ -345,7 +345,7 @@ void *priv; }; /* Class-dev to video-device */ -#define to_video_device(cd) container_of(cd, struct video_device, class_dev) +#define to_video_device(cd) container_of(cd, struct video_device, dev) /* Version 2 functions */ extern int video_register_device(struct video_device *vfd, int type, int nr); @@ -373,7 +373,7 @@ static inline int __must_check video_device_create_file(struct video_device *vfd, struct device_attribute *attr) { - int ret = device_create_file(&vfd->class_dev, attr); + int ret = device_create_file(&vfd->dev, attr); if (ret < 0) printk(KERN_WARNING "%s error: %d\n", __func__, ret); return ret; @@ -382,7 +382,7 @@ static inline void video_device_remove_file(struct video_device *vfd, struct device_attribute *attr) { - device_remove_file(&vfd->class_dev, attr); + device_remove_file(&vfd->dev, attr); } #endif /* CONFIG_VIDEO_V4L1_COMPAT */ -- cgit v1.1 From d8e64406a037a64444175730294e449c9e21f5ec Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Wed, 23 Jul 2008 13:09:48 -0700 Subject: md: delay notification of 'active_idle' to the recovery thread sysfs_notify might sleep, so do not call it from md_safemode_timeout. Signed-off-by: Dan Williams --- include/linux/raid/md_k.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h index 9f2549a..c200b9a 100644 --- a/include/linux/raid/md_k.h +++ b/include/linux/raid/md_k.h @@ -128,6 +128,7 @@ struct mddev_s #define MD_CHANGE_DEVS 0 /* Some device status has changed */ #define MD_CHANGE_CLEAN 1 /* transition to or from 'clean' */ #define MD_CHANGE_PENDING 2 /* superblock update in progress */ +#define MD_NOTIFY_ARRAY_STATE 3 /* atomic context wants to notify userspace */ int ro; -- cgit v1.1 From efa415840d462caf30002d259db20338b546a94b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Krzysztof=20Ha=C5=82asa?= Date: Tue, 1 Jul 2008 15:28:10 +0200 Subject: Remove bogus variables from syncppp.[ch] MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Krzysztof Hałasa --- include/net/syncppp.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/net/syncppp.h b/include/net/syncppp.h index e43f407..9e306f7 100644 --- a/include/net/syncppp.h +++ b/include/net/syncppp.h @@ -43,8 +43,6 @@ struct sppp u32 pp_rseq; /* remote sequence number */ struct slcp lcp; /* LCP params */ struct sipcp ipcp; /* IPCP params */ - u32 ibytes,obytes; /* Bytes in/out */ - u32 ipkts,opkts; /* Packets in/out */ struct timer_list pp_timer; struct net_device *pp_if; char pp_link_state; /* Link status */ -- cgit v1.1 From 35ea11ff84719b1bfab2909903a9640a86552fd1 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sun, 20 Jul 2008 08:12:02 -0300 Subject: V4L/DVB (8430): videodev: move some functions from v4l2-dev.h to v4l2-common.h or v4l2-ioctl.h The functions in a header should not belong to another module. The prio functions belong to v4l2-common.c, so move them to v4l2-common.h. The ioctl functions belong to v4l2-ioctl.c, so create a new v4l2-ioctl.h header and move those functions to it. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/saa7146_vv.h | 1 + include/media/v4l2-common.h | 15 ++++++++++++ include/media/v4l2-dev.h | 45 ----------------------------------- include/media/v4l2-ioctl.h | 57 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 73 insertions(+), 45 deletions(-) create mode 100644 include/media/v4l2-ioctl.h (limited to 'include') diff --git a/include/media/saa7146_vv.h b/include/media/saa7146_vv.h index 89c442e..1d10409 100644 --- a/include/media/saa7146_vv.h +++ b/include/media/saa7146_vv.h @@ -2,6 +2,7 @@ #define __SAA7146_VV__ #include +#include #include #include diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index 020d057..8bbb526 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h @@ -79,6 +79,21 @@ /* ------------------------------------------------------------------------- */ +/* Priority helper functions */ + +struct v4l2_prio_state { + atomic_t prios[4]; +}; +int v4l2_prio_init(struct v4l2_prio_state *global); +int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local, + enum v4l2_priority new); +int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local); +int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local); +enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global); +int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local); + +/* ------------------------------------------------------------------------- */ + /* Control helper functions */ int v4l2_ctrl_check(struct v4l2_ext_control *ctrl, struct v4l2_queryctrl *qctrl, diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 185372f..ad62d32 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -39,43 +39,6 @@ #define VFL_TYPE_RADIO 2 #define VFL_TYPE_VTX 3 -/* Video standard functions */ -extern const char *v4l2_norm_to_name(v4l2_std_id id); -extern int v4l2_video_std_construct(struct v4l2_standard *vs, - int id, const char *name); -/* Prints the ioctl in a human-readable format */ -extern void v4l_printk_ioctl(unsigned int cmd); - -/* prority handling */ -struct v4l2_prio_state { - atomic_t prios[4]; -}; -int v4l2_prio_init(struct v4l2_prio_state *global); -int v4l2_prio_change(struct v4l2_prio_state *global, enum v4l2_priority *local, - enum v4l2_priority new); -int v4l2_prio_open(struct v4l2_prio_state *global, enum v4l2_priority *local); -int v4l2_prio_close(struct v4l2_prio_state *global, enum v4l2_priority *local); -enum v4l2_priority v4l2_prio_max(struct v4l2_prio_state *global); -int v4l2_prio_check(struct v4l2_prio_state *global, enum v4l2_priority *local); - -/* names for fancy debug output */ -extern const char *v4l2_field_names[]; -extern const char *v4l2_type_names[]; - -/* Compatibility layer interface -- v4l1-compat module */ -typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file, - unsigned int cmd, void *arg); -#ifdef CONFIG_VIDEO_V4L1_COMPAT -int v4l_compat_translate_ioctl(struct inode *inode, struct file *file, - int cmd, void *arg, v4l2_kioctl driver_ioctl); -#else -#define v4l_compat_translate_ioctl(inode,file,cmd,arg,ioctl) -EINVAL -#endif - -/* 32 Bits compatibility layer for 64 bits processors */ -extern long v4l_compat_ioctl32(struct file *file, unsigned int cmd, - unsigned long arg); - /* * Newer version of video_device, handled by videodev2.c * This version moves redundant code from video device code to @@ -352,20 +315,12 @@ extern int video_register_device(struct video_device *vfd, int type, int nr); int video_register_device_index(struct video_device *vfd, int type, int nr, int index); void video_unregister_device(struct video_device *); -extern int video_ioctl2(struct inode *inode, struct file *file, - unsigned int cmd, unsigned long arg); /* helper functions to alloc / release struct video_device, the later can be used for video_device->release() */ struct video_device *video_device_alloc(void); void video_device_release(struct video_device *vfd); -/* Include support for obsoleted stuff */ -extern int video_usercopy(struct inode *inode, struct file *file, - unsigned int cmd, unsigned long arg, - int (*func)(struct inode *inode, struct file *file, - unsigned int cmd, void *arg)); - #ifdef CONFIG_VIDEO_V4L1_COMPAT #include diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h new file mode 100644 index 0000000..685b1b6 --- /dev/null +++ b/include/media/v4l2-ioctl.h @@ -0,0 +1,57 @@ +/* + * + * V 4 L 2 D R I V E R H E L P E R A P I + * + * Moved from videodev2.h + * + * Some commonly needed functions for drivers (v4l2-common.o module) + */ +#ifndef _V4L2_IOCTL_H +#define _V4L2_IOCTL_H + +#include +#include +#include +#include +#include /* need __user */ +#ifdef CONFIG_VIDEO_V4L1_COMPAT +#include +#else +#include +#endif + +/* Video standard functions */ +extern const char *v4l2_norm_to_name(v4l2_std_id id); +extern int v4l2_video_std_construct(struct v4l2_standard *vs, + int id, const char *name); +/* Prints the ioctl in a human-readable format */ +extern void v4l_printk_ioctl(unsigned int cmd); + +/* names for fancy debug output */ +extern const char *v4l2_field_names[]; +extern const char *v4l2_type_names[]; + +/* Compatibility layer interface -- v4l1-compat module */ +typedef int (*v4l2_kioctl)(struct inode *inode, struct file *file, + unsigned int cmd, void *arg); +#ifdef CONFIG_VIDEO_V4L1_COMPAT +int v4l_compat_translate_ioctl(struct inode *inode, struct file *file, + int cmd, void *arg, v4l2_kioctl driver_ioctl); +#else +#define v4l_compat_translate_ioctl(inode, file, cmd, arg, ioctl) (-EINVAL) +#endif + +/* 32 Bits compatibility layer for 64 bits processors */ +extern long v4l_compat_ioctl32(struct file *file, unsigned int cmd, + unsigned long arg); + +extern int video_ioctl2(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg); + +/* Include support for obsoleted stuff */ +extern int video_usercopy(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg, + int (*func)(struct inode *inode, struct file *file, + unsigned int cmd, void *arg)); + +#endif /* _V4L2_IOCTL_H */ -- cgit v1.1 From 2864462eaf027ff10c1df1ce57d3518332e9083c Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 20 Jul 2008 20:26:54 -0300 Subject: V4L/DVB (8434): Fix x86_64 compilation and move some macros to v4l2-ioctl.h Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-common.h | 22 ---------------------- include/media/v4l2-ioctl.h | 21 +++++++++++++++++++++ 2 files changed, 21 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-common.h b/include/media/v4l2-common.h index 8bbb526..07d3a9a 100644 --- a/include/media/v4l2-common.h +++ b/include/media/v4l2-common.h @@ -28,12 +28,6 @@ #include -/* v4l debugging and diagnostics */ - -/* Debug bitmask flags to be used on V4L2 */ -#define V4L2_DEBUG_IOCTL 0x01 -#define V4L2_DEBUG_IOCTL_ARG 0x02 - /* Common printk constucts for v4l-i2c drivers. These macros create a unique prefix consisting of the driver name, the adapter number and the i2c address. */ @@ -61,22 +55,6 @@ v4l_client_printk(KERN_DEBUG, client, fmt , ## arg); \ } while (0) - -/* Use this macro for non-I2C drivers. Pass the driver name as the first arg. */ -#define v4l_print_ioctl(name, cmd) \ - do { \ - printk(KERN_DEBUG "%s: ", name); \ - v4l_printk_ioctl(cmd); \ - } while (0) - -/* Use this macro in I2C drivers where 'client' is the struct i2c_client - pointer */ -#define v4l_i2c_print_ioctl(client, cmd) \ - do { \ - v4l_client_printk(KERN_DEBUG, client, ""); \ - v4l_printk_ioctl(cmd); \ - } while (0) - /* ------------------------------------------------------------------------- */ /* Priority helper functions */ diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h index 685b1b6..e319d1f 100644 --- a/include/media/v4l2-ioctl.h +++ b/include/media/v4l2-ioctl.h @@ -20,6 +20,27 @@ #include #endif +/* v4l debugging and diagnostics */ + +/* Debug bitmask flags to be used on V4L2 */ +#define V4L2_DEBUG_IOCTL 0x01 +#define V4L2_DEBUG_IOCTL_ARG 0x02 + +/* Use this macro for non-I2C drivers. Pass the driver name as the first arg. */ +#define v4l_print_ioctl(name, cmd) \ + do { \ + printk(KERN_DEBUG "%s: ", name); \ + v4l_printk_ioctl(cmd); \ + } while (0) + +/* Use this macro in I2C drivers where 'client' is the struct i2c_client + pointer */ +#define v4l_i2c_print_ioctl(client, cmd) \ + do { \ + v4l_client_printk(KERN_DEBUG, client, ""); \ + v4l_printk_ioctl(cmd); \ + } while (0) + /* Video standard functions */ extern const char *v4l2_norm_to_name(v4l2_std_id id); extern int v4l2_video_std_construct(struct v4l2_standard *vs, -- cgit v1.1 From a5bf6190417cbbf80443a9f71c65b653e13e9982 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Thu, 10 Jul 2008 18:38:33 +0300 Subject: UBI: add ubi_sync() interface To flush MTD device caches. Signed-off-by: Artem Bityutskiy --- include/linux/mtd/ubi.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index f71201d..83302bb 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -152,6 +152,7 @@ int ubi_leb_erase(struct ubi_volume_desc *desc, int lnum); int ubi_leb_unmap(struct ubi_volume_desc *desc, int lnum); int ubi_leb_map(struct ubi_volume_desc *desc, int lnum, int dtype); int ubi_is_mapped(struct ubi_volume_desc *desc, int lnum); +int ubi_sync(int ubi_num); /* * This function is the same as the 'ubi_leb_read()' function, but it does not -- cgit v1.1 From 85c6e6e28259e9b58b8984db536c45bc3161f40c Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Wed, 16 Jul 2008 10:25:56 +0300 Subject: UBI: amend commentaries Hch asked not to use "unit" for sub-systems, let it be so. Also some other commentaries modifications. Signed-off-by: Artem Bityutskiy --- include/linux/mtd/ubi.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index 83302bb..6316faf 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -45,13 +45,13 @@ enum { * @size: how many physical eraseblocks are reserved for this volume * @used_bytes: how many bytes of data this volume contains * @used_ebs: how many physical eraseblocks of this volume actually contain any - * data + * data * @vol_type: volume type (%UBI_DYNAMIC_VOLUME or %UBI_STATIC_VOLUME) * @corrupted: non-zero if the volume is corrupted (static volumes only) * @upd_marker: non-zero if the volume has update marker set * @alignment: volume alignment * @usable_leb_size: how many bytes are available in logical eraseblocks of - * this volume + * this volume * @name_len: volume name length * @name: volume name * @cdev: UBI volume character device major and minor numbers -- cgit v1.1 From f40ac9cdf6991287f19bdafe9b0752ee40137908 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Sun, 13 Jul 2008 21:47:47 +0300 Subject: UBI: implement multiple volumes rename Quite useful ioctl which allows to make atomic system upgrades. The idea belongs to Richard Titmuss Signed-off-by: Artem Bityutskiy --- include/mtd/ubi-user.h | 60 +++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 57 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h index a7421f1..e8e57c3 100644 --- a/include/mtd/ubi-user.h +++ b/include/mtd/ubi-user.h @@ -58,6 +58,13 @@ * device should be used. A &struct ubi_rsvol_req object has to be properly * filled and a pointer to it has to be passed to the IOCTL. * + * UBI volumes re-name + * ~~~~~~~~~~~~~~~~~~~ + * + * To re-name several volumes atomically at one go, the %UBI_IOCRNVOL command + * of the UBI character device should be used. A &struct ubi_rnvol_req object + * has to be properly filled and a pointer to it has to be passed to the IOCTL. + * * UBI volume update * ~~~~~~~~~~~~~~~~~ * @@ -104,6 +111,8 @@ #define UBI_IOCRMVOL _IOW(UBI_IOC_MAGIC, 1, int32_t) /* Re-size an UBI volume */ #define UBI_IOCRSVOL _IOW(UBI_IOC_MAGIC, 2, struct ubi_rsvol_req) +/* Re-name volumes */ +#define UBI_IOCRNVOL _IOW(UBI_IOC_MAGIC, 3, struct ubi_rnvol_req) /* IOCTL commands of the UBI control character device */ @@ -128,6 +137,9 @@ /* Maximum MTD device name length supported by UBI */ #define MAX_UBI_MTD_NAME_LEN 127 +/* Maximum amount of UBI volumes that can be re-named at one go */ +#define UBI_MAX_RNVOL 32 + /* * UBI data type hint constants. * @@ -189,7 +201,7 @@ struct ubi_attach_req { int32_t ubi_num; int32_t mtd_num; int32_t vid_hdr_offset; - uint8_t padding[12]; + int8_t padding[12]; }; /** @@ -251,6 +263,48 @@ struct ubi_rsvol_req { } __attribute__ ((packed)); /** + * struct ubi_rnvol_req - volumes re-name request. + * @count: count of volumes to re-name + * @padding1: reserved for future, not used, has to be zeroed + * @vol_id: ID of the volume to re-name + * @name_len: name length + * @padding2: reserved for future, not used, has to be zeroed + * @name: new volume name + * + * UBI allows to re-name up to %32 volumes at one go. The count of volumes to + * re-name is specified in the @count field. The ID of the volumes to re-name + * and the new names are specified in the @vol_id and @name fields. + * + * The UBI volume re-name operation is atomic, which means that should power cut + * happen, the volumes will have either old name or new name. So the possible + * use-cases of this command is atomic upgrade. Indeed, to upgrade, say, volumes + * A and B one may create temporary volumes %A1 and %B1 with the new contents, + * then atomically re-name A1->A and B1->B, in which case old %A and %B will + * be removed. + * + * If it is not desirable to remove old A and B, the re-name request has to + * contain 4 entries: A1->A, A->A1, B1->B, B->B1, in which case old A1 and B1 + * become A and B, and old A and B will become A1 and B1. + * + * It is also OK to request: A1->A, A1->X, B1->B, B->Y, in which case old A1 + * and B1 become A and B, and old A and B become X and Y. + * + * In other words, in case of re-naming into an existing volume name, the + * existing volume is removed, unless it is re-named as well at the same + * re-name request. + */ +struct ubi_rnvol_req { + int32_t count; + int8_t padding1[12]; + struct { + int32_t vol_id; + int16_t name_len; + int8_t padding2[2]; + char name[UBI_MAX_VOLUME_NAME + 1]; + } ents[UBI_MAX_RNVOL]; +} __attribute__ ((packed)); + +/** * struct ubi_leb_change_req - a data structure used in atomic logical * eraseblock change requests. * @lnum: logical eraseblock number to change @@ -261,8 +315,8 @@ struct ubi_rsvol_req { struct ubi_leb_change_req { int32_t lnum; int32_t bytes; - uint8_t dtype; - uint8_t padding[7]; + int8_t dtype; + int8_t padding[7]; } __attribute__ ((packed)); #endif /* __UBI_USER_H__ */ -- cgit v1.1 From 9c9ec147709e63e4e8ac6a037c6bb50688ff8e9c Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Fri, 18 Jul 2008 13:19:52 +0300 Subject: UBI: fix checkpatch.pl errors and warnings Just out or curiousity ran checkpatch.pl for whole UBI, and discovered there are quite a few of stylistic issues. Fix them. Signed-off-by: Artem Bityutskiy --- include/mtd/ubi-user.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h index e8e57c3..ccdc562 100644 --- a/include/mtd/ubi-user.h +++ b/include/mtd/ubi-user.h @@ -188,14 +188,14 @@ enum { * it will be 512 in case of a 2KiB page NAND flash with 4 512-byte sub-pages. * * But in rare cases, if this optimizes things, the VID header may be placed to - * a different offset. For example, the boot-loader might do things faster if the - * VID header sits at the end of the first 2KiB NAND page with 4 sub-pages. As - * the boot-loader would not normally need to read EC headers (unless it needs - * UBI in RW mode), it might be faster to calculate ECC. This is weird example, - * but it real-life example. So, in this example, @vid_hdr_offer would be - * 2KiB-64 bytes = 1984. Note, that this position is not even 512-bytes - * aligned, which is OK, as UBI is clever enough to realize this is 4th sub-page - * of the first page and add needed padding. + * a different offset. For example, the boot-loader might do things faster if + * the VID header sits at the end of the first 2KiB NAND page with 4 sub-pages. + * As the boot-loader would not normally need to read EC headers (unless it + * needs UBI in RW mode), it might be faster to calculate ECC. This is weird + * example, but it real-life example. So, in this example, @vid_hdr_offer would + * be 2KiB-64 bytes = 1984. Note, that this position is not even 512-bytes + * aligned, which is OK, as UBI is clever enough to realize this is 4th + * sub-page of the first page and add needed padding. */ struct ubi_attach_req { int32_t ubi_num; -- cgit v1.1 From 218df4a25a9b828df4bb44c86e35febe40c82e62 Mon Sep 17 00:00:00 2001 From: Hans-Christian Egtvedt Date: Tue, 1 Jul 2008 14:26:45 +0200 Subject: avr32: Add platform data for AC97C platform device This patch adds platform data to the AC97C platform device. This will let the board add a GPIO line which is connected to the external codecs reset line. The platform data, ac97c_platform_data, must also contain the DMA controller ID, RX channel ID and TX channel ID. Tested with Wolfson WM9712 and AP7000. Signed-off-by: Hans-Christian Egtvedt Signed-off-by: Haavard Skinnemoen --- include/asm-avr32/arch-at32ap/board.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h index a378386..203cb4e 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h @@ -82,7 +82,15 @@ struct mci_platform_data; struct platform_device * at32_add_device_mci(unsigned int id, struct mci_platform_data *data); -struct platform_device *at32_add_device_ac97c(unsigned int id); +struct ac97c_platform_data { + unsigned short dma_rx_periph_id; + unsigned short dma_tx_periph_id; + unsigned short dma_controller_id; + int reset_pin; +}; +struct platform_device * +at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data); + struct platform_device *at32_add_device_abdac(unsigned int id); struct platform_device *at32_add_device_psif(unsigned int id); -- cgit v1.1 From 674bfc23c585b34c42263d73fb51710d49762a23 Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 25 Jul 2008 12:06:03 -0500 Subject: virtio: clarify that ABI is usable by any implementations We want others to implement and use virtio, so it makes sense to BSD license the non-__KERNEL__ parts of the headers to make this crystal clear. Signed-off-by: Rusty Russell Acked-by: Christian Borntraeger Acked-by: Mark McLoughlin Acked-by: Ryan Harper Acked-by: Eric Van Hensbergen Acked-by: Anthony Liguori --- include/linux/virtio_9p.h | 2 ++ include/linux/virtio_balloon.h | 2 ++ include/linux/virtio_blk.h | 2 ++ include/linux/virtio_config.h | 3 +++ include/linux/virtio_console.h | 2 ++ include/linux/virtio_net.h | 2 ++ include/linux/virtio_pci.h | 5 ++--- include/linux/virtio_rng.h | 2 ++ 8 files changed, 17 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/virtio_9p.h b/include/linux/virtio_9p.h index 8eff0b5..b3c4a60 100644 --- a/include/linux/virtio_9p.h +++ b/include/linux/virtio_9p.h @@ -1,5 +1,7 @@ #ifndef _LINUX_VIRTIO_9P_H #define _LINUX_VIRTIO_9P_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #include /* The ID for virtio console */ diff --git a/include/linux/virtio_balloon.h b/include/linux/virtio_balloon.h index 979524e..c30c7bf 100644 --- a/include/linux/virtio_balloon.h +++ b/include/linux/virtio_balloon.h @@ -1,5 +1,7 @@ #ifndef _LINUX_VIRTIO_BALLOON_H #define _LINUX_VIRTIO_BALLOON_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #include /* The ID for virtio_balloon */ diff --git a/include/linux/virtio_blk.h b/include/linux/virtio_blk.h index 5f79a5f..6a66c7f 100644 --- a/include/linux/virtio_blk.h +++ b/include/linux/virtio_blk.h @@ -1,5 +1,7 @@ #ifndef _LINUX_VIRTIO_BLK_H #define _LINUX_VIRTIO_BLK_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #include /* The ID for virtio_block */ diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h index f364bbf..7eb4b34 100644 --- a/include/linux/virtio_config.h +++ b/include/linux/virtio_config.h @@ -1,5 +1,8 @@ #ifndef _LINUX_VIRTIO_CONFIG_H #define _LINUX_VIRTIO_CONFIG_H +/* This header, excluding the #ifdef __KERNEL__ part, is BSD licensed so + * anyone can use the definitions to implement compatible drivers/servers. */ + /* Virtio devices use a standardized configuration space to define their * features and pass configuration information, but each implementation can * store and access that space differently. */ diff --git a/include/linux/virtio_console.h b/include/linux/virtio_console.h index ed2d4ea..19a0da0 100644 --- a/include/linux/virtio_console.h +++ b/include/linux/virtio_console.h @@ -1,6 +1,8 @@ #ifndef _LINUX_VIRTIO_CONSOLE_H #define _LINUX_VIRTIO_CONSOLE_H #include +/* This header, excluding the #ifdef __KERNEL__ part, is BSD licensed so + * anyone can use the definitions to implement compatible drivers/servers. */ /* The ID for virtio console */ #define VIRTIO_ID_CONSOLE 3 diff --git a/include/linux/virtio_net.h b/include/linux/virtio_net.h index 38c0571..5e33761 100644 --- a/include/linux/virtio_net.h +++ b/include/linux/virtio_net.h @@ -1,5 +1,7 @@ #ifndef _LINUX_VIRTIO_NET_H #define _LINUX_VIRTIO_NET_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #include /* The ID for virtio_net */ diff --git a/include/linux/virtio_pci.h b/include/linux/virtio_pci.h index b315165..cdef357 100644 --- a/include/linux/virtio_pci.h +++ b/include/linux/virtio_pci.h @@ -9,9 +9,8 @@ * Authors: * Anthony Liguori * - * This work is licensed under the terms of the GNU GPL, version 2 or later. - * See the COPYING file in the top-level directory. - * + * This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #ifndef _LINUX_VIRTIO_PCI_H diff --git a/include/linux/virtio_rng.h b/include/linux/virtio_rng.h index 331afb6..1a85dab 100644 --- a/include/linux/virtio_rng.h +++ b/include/linux/virtio_rng.h @@ -1,5 +1,7 @@ #ifndef _LINUX_VIRTIO_RNG_H #define _LINUX_VIRTIO_RNG_H +/* This header is BSD licensed so anyone can use the definitions to implement + * compatible drivers/servers. */ #include /* The ID for virtio_rng */ -- cgit v1.1 From 066f4d82a67f621ddd547bfa4b9c94631d8457b0 Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Thu, 29 May 2008 11:08:26 +0200 Subject: virtio_blk: check for hardsector size from host Currently virtio_blk assumes a 512 byte hard sector size. This can cause trouble / performance issues if the backing has a different block size (like a file on an ext3 file system formatted with 4k block size or a dasd). Lets add a feature flag that tells the guest to use a different hard sector size than 512 byte. Signed-off-by: Christian Borntraeger Signed-off-by: Rusty Russell --- include/linux/virtio_blk.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/virtio_blk.h b/include/linux/virtio_blk.h index 6a66c7f..c1aef85 100644 --- a/include/linux/virtio_blk.h +++ b/include/linux/virtio_blk.h @@ -13,6 +13,7 @@ #define VIRTIO_BLK_F_SEG_MAX 2 /* Indicates maximum # of segments */ #define VIRTIO_BLK_F_GEOMETRY 4 /* Legacy geometry available */ #define VIRTIO_BLK_F_RO 5 /* Disk is read-only */ +#define VIRTIO_BLK_F_BLK_SIZE 6 /* Block size of disk is available*/ struct virtio_blk_config { @@ -28,6 +29,8 @@ struct virtio_blk_config __u8 heads; __u8 sectors; } geometry; + /* block size of device (if VIRTIO_BLK_F_BLK_SIZE) */ + __u32 blk_size; } __attribute__((packed)); /* These two define direction. */ -- cgit v1.1 From faeba830b086bc9e58748869054e994cb09693cd Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Fri, 20 Jun 2008 15:24:18 +0200 Subject: s390: use virtio_console for KVM on s390 This patch enables virtio_console as the default console on kvm for s390. We currently use the same notify hack as lguest for early console output. I will try to address this for lguest and s390 later. Signed-off-by: Christian Borntraeger Signed-off-by: Rusty Russell --- include/asm-s390/kvm_virtio.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-s390/kvm_virtio.h b/include/asm-s390/kvm_virtio.h index 5c871a9..1461002 100644 --- a/include/asm-s390/kvm_virtio.h +++ b/include/asm-s390/kvm_virtio.h @@ -50,4 +50,14 @@ struct kvm_vqconfig { #define KVM_S390_VIRTIO_RESET 1 #define KVM_S390_VIRTIO_SET_STATUS 2 +#ifdef __KERNEL__ +/* early virtio console setup */ +#ifdef CONFIG_VIRTIO_CONSOLE +extern void s390_virtio_console_init(void); +#else +static inline void s390_virtio_console_init(void) +{ +} +#endif /* CONFIG_VIRTIO_CONSOLE */ +#endif /* __KERNEL__ */ #endif -- cgit v1.1 From dd7c7bc46211785a1aa7d70feb15830f62682b3c Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 25 Jul 2008 12:06:07 -0500 Subject: virtio: Formally reserve bits 28-31 to be 'transport' features. We assign feature bits as required, but it makes sense to reserve some for the particular transport, rather than the particular device. Signed-off-by: Rusty Russell --- include/linux/virtio_config.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h index 7eb4b34..5a30cfb 100644 --- a/include/linux/virtio_config.h +++ b/include/linux/virtio_config.h @@ -18,6 +18,12 @@ /* We've given up on this device. */ #define VIRTIO_CONFIG_S_FAILED 0x80 +/* Some virtio feature bits (currently bits 28 through 31) are reserved for the + * transport being used (eg. virtio_ring), the rest are per-device feature + * bits. */ +#define VIRTIO_TRANSPORT_F_START 28 +#define VIRTIO_TRANSPORT_F_END 32 + /* Do we get callbacks when the ring is completely used, even if we've * suppressed them? */ #define VIRTIO_F_NOTIFY_ON_EMPTY 24 -- cgit v1.1 From c624896e488ba2bff5ae497782cfb265c8b00646 Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 25 Jul 2008 12:06:07 -0500 Subject: virtio: Rename set_features to finalize_features Rather than explicitly handing the features to the lower-level, we just hand the virtio_device and have it set the features. This make it clear that it has the chance to manipulate the features of the device at this point (and that all feature negotiation is already done). Signed-off-by: Rusty Russell --- include/linux/virtio_config.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h index 5a30cfb..bf8ec28 100644 --- a/include/linux/virtio_config.h +++ b/include/linux/virtio_config.h @@ -61,9 +61,10 @@ * @get_features: get the array of feature bits for this device. * vdev: the virtio_device * Returns the first 32 feature bits (all we currently need). - * @set_features: confirm what device features we'll be using. + * @finalize_features: confirm what device features we'll be using. * vdev: the virtio_device - * feature: the first 32 feature bits + * This gives the final feature bits for the device: it can change + * the dev->feature bits if it wants. */ struct virtio_config_ops { @@ -79,7 +80,7 @@ struct virtio_config_ops void (*callback)(struct virtqueue *)); void (*del_vq)(struct virtqueue *vq); u32 (*get_features)(struct virtio_device *vdev); - void (*set_features)(struct virtio_device *vdev, u32 features); + void (*finalize_features)(struct virtio_device *vdev); }; /* If driver didn't advertise the feature, it will never appear. */ -- cgit v1.1 From e34f87256794b87e7f4a8f1812538be7b7b5214c Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 25 Jul 2008 12:06:13 -0500 Subject: virtio: Add transport feature handling stub for virtio_ring. To prepare for virtio_ring transport feature bits, hook in a call in all the users to manipulate them. This currently just clears all the bits, since it doesn't understand any features. Signed-off-by: Rusty Russell --- include/linux/virtio_ring.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/virtio_ring.h b/include/linux/virtio_ring.h index abe481e..c4a598f 100644 --- a/include/linux/virtio_ring.h +++ b/include/linux/virtio_ring.h @@ -120,6 +120,8 @@ struct virtqueue *vring_new_virtqueue(unsigned int num, void (*notify)(struct virtqueue *vq), void (*callback)(struct virtqueue *vq)); void vring_del_virtqueue(struct virtqueue *vq); +/* Filter out transport-specific feature bits. */ +void vring_transport_features(struct virtio_device *vdev); irqreturn_t vring_interrupt(int irq, void *_vq); #endif /* __KERNEL__ */ -- cgit v1.1 From ed9559d38a87a44e3bda87d73a50aab92471d7dc Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 25 Jul 2008 12:11:09 +1000 Subject: Label kthread_create() with printf attribute tag. Obvious misc patch been in my queue (& linux-next) for over a cycle. Signed-off-by: Rusty Russell Signed-off-by: Linus Torvalds --- include/linux/kthread.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/kthread.h b/include/linux/kthread.h index 00dd957..aabc8a1 100644 --- a/include/linux/kthread.h +++ b/include/linux/kthread.h @@ -6,7 +6,8 @@ struct task_struct *kthread_create(int (*threadfn)(void *data), void *data, - const char namefmt[], ...); + const char namefmt[], ...) + __attribute__((format(printf, 3, 4))); /** * kthread_run - create and wake a thread. -- cgit v1.1 From 483fad1c3fa1060d7e6710e84a065ad514571739 Mon Sep 17 00:00:00 2001 From: Nathan Lynch Date: Tue, 22 Jul 2008 04:48:46 +1000 Subject: ELF loader support for auxvec base platform string Some IBM POWER-based platforms have the ability to run in a mode which mostly appears to the OS as a different processor from the actual hardware. For example, a Power6 system may appear to be a Power5+, which makes the AT_PLATFORM value "power5+". This means that programs are restricted to the ISA supported by Power5+; Power6-specific instructions are treated as illegal. However, some applications (virtual machines, optimized libraries) can benefit from knowledge of the underlying CPU model. A new aux vector entry, AT_BASE_PLATFORM, will denote the actual hardware. For example, on a Power6 system in Power5+ compatibility mode, AT_PLATFORM will be "power5+" and AT_BASE_PLATFORM will be "power6". The idea is that AT_PLATFORM indicates the instruction set supported, while AT_BASE_PLATFORM indicates the underlying microarchitecture. If the architecture has defined ELF_BASE_PLATFORM, copy that value to the user stack in the same manner as ELF_PLATFORM. Signed-off-by: Nathan Lynch Acked-by: Andrew Morton Signed-off-by: Benjamin Herrenschmidt --- include/linux/auxvec.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/auxvec.h b/include/linux/auxvec.h index 0da17d1..d7afa9d 100644 --- a/include/linux/auxvec.h +++ b/include/linux/auxvec.h @@ -26,9 +26,13 @@ #define AT_SECURE 23 /* secure mode boolean */ +#define AT_BASE_PLATFORM 24 /* string identifying real platform, may + * differ from AT_PLATFORM. */ + #define AT_EXECFN 31 /* filename of program */ + #ifdef __KERNEL__ -#define AT_VECTOR_SIZE_BASE 17 /* NEW_AUX_ENT entries in auxiliary table */ +#define AT_VECTOR_SIZE_BASE 18 /* NEW_AUX_ENT entries in auxiliary table */ /* number of "#define AT_.*" above, minus {AT_NULL, AT_IGNORE, AT_NOTELF} */ #endif -- cgit v1.1 From 9115d13453dee22473a1e8cacc90a8d64a9c4bc9 Mon Sep 17 00:00:00 2001 From: Nathan Lynch Date: Wed, 16 Jul 2008 09:58:51 +1000 Subject: powerpc: Enable AT_BASE_PLATFORM aux vector Stash the first platform string matched by identify_cpu() in powerpc_base_platform, and supply that to the ELF loader for the value of AT_BASE_PLATFORM. Signed-off-by: Nathan Lynch Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/cputable.h | 2 ++ include/asm-powerpc/elf.h | 8 ++++++++ 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 2a3e907..ef8a248 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -127,6 +127,8 @@ extern struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr); extern void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end); +extern const char *powerpc_base_platform; + #endif /* __ASSEMBLY__ */ /* CPU kernel features */ diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h index 8966467..80d1f39 100644 --- a/include/asm-powerpc/elf.h +++ b/include/asm-powerpc/elf.h @@ -217,6 +217,14 @@ typedef elf_vrregset_t elf_fpxregset_t; #define ELF_PLATFORM (cur_cpu_spec->platform) +/* While ELF_PLATFORM indicates the ISA supported by the platform, it + * may not accurately reflect the underlying behavior of the hardware + * (as in the case of running in Power5+ compatibility mode on a + * Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries + * that are tuned for the real hardware. + */ +#define ELF_BASE_PLATFORM (powerpc_base_platform) + #ifdef __powerpc64__ # define ELF_PLAT_INIT(_r, load_addr) do { \ _r->gpr[2] = load_addr; \ -- cgit v1.1 From d6a61bfc06d6f2248f3e75f208d64e794082013c Mon Sep 17 00:00:00 2001 From: Luis Machado Date: Thu, 24 Jul 2008 02:10:41 +1000 Subject: powerpc: BookE hardware watchpoint support This patch implements support for HW based watchpoint via the DBSR_DAC (Data Address Compare) facility of the BookE processors. It does so by interfacing with the existing DABR breakpoint code and adding the necessary bits and pieces for the new bits to be properly set or cleared Signed-off-by: Luis Machado Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/system.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index e6e25e2..d6648c143 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -110,6 +110,8 @@ static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } #endif extern int set_dabr(unsigned long dabr); +extern void do_dabr(struct pt_regs *regs, unsigned long address, + unsigned long error_code); extern void print_backtrace(unsigned long *); extern void show_regs(struct pt_regs * regs); extern void flush_instruction_cache(void); -- cgit v1.1 From dfc3403f0e5ffb94ee29942f313b87d4061d951b Mon Sep 17 00:00:00 2001 From: Nathan Fontenot Date: Thu, 24 Jul 2008 04:27:30 +1000 Subject: powerpc/pseries: Add memory entitlement capabilities to /proc/ppc64/lparcfg Update /proc/ppc64/lparcfg to display Cooperative Memory Overcommitment statistics as reported by the H_GET_MPP hcall. This also updates the lparcfg interface to allow setting memory entitlement and weight. Signed-off-by: Nathan Fontenot Signed-off-by: Robert Jennings Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/hvcall.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h index bf6cd7c..46e7645 100644 --- a/include/asm-powerpc/hvcall.h +++ b/include/asm-powerpc/hvcall.h @@ -210,7 +210,9 @@ #define H_JOIN 0x298 #define H_VASI_STATE 0x2A4 #define H_ENABLE_CRQ 0x2B0 -#define MAX_HCALL_OPCODE H_ENABLE_CRQ +#define H_SET_MPP 0x2D0 +#define H_GET_MPP 0x2D4 +#define MAX_HCALL_OPCODE H_GET_MPP #ifndef __ASSEMBLY__ @@ -270,6 +272,20 @@ struct hcall_stats { }; #define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1) +struct hvcall_mpp_data { + unsigned long entitled_mem; + unsigned long mapped_mem; + unsigned short group_num; + unsigned short pool_num; + unsigned char mem_weight; + unsigned char unallocated_mem_weight; + unsigned long unallocated_entitlement; /* value in bytes */ + unsigned long pool_size; + signed long loan_request; + unsigned long backing_mem; +}; + +int h_get_mpp(struct hvcall_mpp_data *); #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_HVCALL_H */ -- cgit v1.1 From e46de429cb954d30a5642fba81d516ede518c65e Mon Sep 17 00:00:00 2001 From: Robert Jennings Date: Thu, 24 Jul 2008 04:29:03 +1000 Subject: powerpc/pseries: Enable CMO feature during platform setup For Cooperative Memory Overcommitment (CMO), set the FW_FEATURE_CMO flag in powerpc_firmware_features from the rtas ibm,get-system-parameters table prior to calling iommu_init_early_pSeries. With this, any CMO specific functionality can be controlled by checking: firmware_has_feature(FW_FEATURE_CMO) Signed-off-by: Robert Jennings Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/firmware.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h index ef32899..3a17982 100644 --- a/include/asm-powerpc/firmware.h +++ b/include/asm-powerpc/firmware.h @@ -46,6 +46,7 @@ #define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) #define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) #define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000002000000) +#define FW_FEATURE_CMO ASM_CONST(0x0000000004000000) #ifndef __ASSEMBLY__ @@ -58,7 +59,7 @@ enum { FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ | FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN | FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE | - FW_FEATURE_SPLPAR | FW_FEATURE_LPAR, + FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | FW_FEATURE_CMO, FW_FEATURE_PSERIES_ALWAYS = 0, FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, -- cgit v1.1 From 86630a32320f83736c4c24e2c8bae218e4c56c7c Mon Sep 17 00:00:00 2001 From: Brian King Date: Thu, 24 Jul 2008 04:29:16 +1000 Subject: powerpc/pseries: Utilities to set firmware page state Newer versions of firmware support page states, which are used by the collaborative memory manager (future patch) to "loan" pages to the hypervisor for use by other partitions. Signed-off-by: Brian King Signed-off-by: Robert Jennings Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/hvcall.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h index 46e7645..fbe2932 100644 --- a/include/asm-powerpc/hvcall.h +++ b/include/asm-powerpc/hvcall.h @@ -92,6 +92,11 @@ #define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ #define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ #define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */ +#define H_PAGE_STATE_CHANGE (1UL<<(63-28)) +#define H_PAGE_UNUSED ((1UL<<(63-29)) | (1UL<<(63-30))) +#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) +#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1UL<<(63-31))) +#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE #define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */ #define H_ANDCOND (1UL<<(63-33)) #define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ -- cgit v1.1 From ffa5abbd0c399b32fc13a1b4718d87ee7a716999 Mon Sep 17 00:00:00 2001 From: Brian King Date: Thu, 24 Jul 2008 04:30:58 +1000 Subject: powerpc/pseries: Add CMO paging statistics With the addition of Cooperative Memory Overcommitment (CMO) support for IBM Power Systems, two fields have been added to the VPA to report paging statistics. Add support in lparcfg to report them to userspace. Signed-off-by: Brian King Signed-off-by: Robert Jennings Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/lppaca.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h index 567ed92..2fe268b 100644 --- a/include/asm-powerpc/lppaca.h +++ b/include/asm-powerpc/lppaca.h @@ -125,7 +125,10 @@ struct lppaca { // NOTE: This value will ALWAYS be zero for dedicated processors and // will NEVER be zero for shared processors (ie, initialized to a 1). volatile u32 yield_count; // PLIC increments each dispatchx00-x03 - u8 reserved6[124]; // Reserved x04-x7F + u32 reserved6; + volatile u64 cmo_faults; // CMO page fault count x08-x0F + volatile u64 cmo_fault_time; // CMO page fault time x10-x17 + u8 reserved7[104]; // Reserved x18-x7F //============================================================================= // CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data -- cgit v1.1 From 6490c4903d12f242bec4454301f76f6a7520e399 Mon Sep 17 00:00:00 2001 From: Robert Jennings Date: Thu, 24 Jul 2008 04:31:16 +1000 Subject: powerpc/pseries: iommu enablement for CMO To support Cooperative Memory Overcommitment (CMO), we need to check for failure from some of the tce hcalls. These changes for the pseries platform affect the powerpc architecture; patches for the other affected platforms are included in this patch. pSeries platform IOMMU code changes: * platform TCE functions must handle H_NOT_ENOUGH_RESOURCES errors and return an error. Architecture IOMMU code changes: * Calls to ppc_md.tce_build need to check return values and return DMA_MAPPING_ERROR for transient errors. Architecture changes: * struct machdep_calls for tce_build*_pSeriesLP functions need to change to indicate failure. * all other platforms will need updates to iommu functions to match the new calling semantics; they will return 0 on success. The other platforms default configs have been built, but no further testing was performed. Signed-off-by: Robert Jennings Acked-by: Olof Johansson Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/machdep.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h index 1233d73..893aafd 100644 --- a/include/asm-powerpc/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -76,7 +76,7 @@ struct machdep_calls { * destroyed as well */ void (*hpte_clear_all)(void); - void (*tce_build)(struct iommu_table * tbl, + int (*tce_build)(struct iommu_table *tbl, long index, long npages, unsigned long uaddr, -- cgit v1.1 From a90ab95a9576d35de0d05f9f4fc435edcccafaa9 Mon Sep 17 00:00:00 2001 From: Robert Jennings Date: Thu, 24 Jul 2008 04:31:33 +1000 Subject: powerpc/pseries: vio bus support for CMO This is a large patch but the normal code path is not affected. For non-pSeries platforms the code is ifdef'ed out and for non-CMO enabled pSeries systems this does not affect the normal code path. Devices that do not perform DMA operations do not need modification with this patch. The function get_desired_dma was renamed from get_io_entitlement for clarity. Overview Cooperative Memory Overcommitment (CMO) allows for a set of OS partitions to be run with less RAM than the aggregate needs of the group of partitions. The firmware will balance memory between the partitions and page in/out memory as needed. Based on the number and type of IO adpaters preset each partition is allocated an amount of memory for DMA operations and this allocation will be guaranteed to the partition; this is referred to as the partition's 'entitlement'. Partitions running in a CMO environment can only have virtual IO devices present. The VIO bus layer will manage the IO entitlement for the system. Accounting, at a system and per-device level, is tracked in the VIO bus code and exposed via sysfs. A set of dma_ops functions are added to the bus to allow for this accounting. Bus initialization At initialization, the bus will calculate the minimum needs of the system based on providing each device present with a standard minimum entitlement along with a spare allocation for the bus to handle hotplug events. If the minimum needs can not be met the system boot will be halted. Device changes The significant changes for devices while running under CMO are that the devices must specify how much dedicated IO entitlement they desire and must also handle DMA mapping errors that can occur due to constrained IO memory. The virtual IO drivers are modified to silence errors when DMA mappings fail for CMO and handle these failures gracefully. Each devices will be guaranteed a minimum entitlement that can always be mapped. Devices will specify how much entitlement they desire and the VIO bus will attempt to provide for this. Devices can change their desired entitlement level at any point in time to address particular needs (via vio_cmo_set_dev_desired()), not just at device probe time. VIO bus changes The system will have a particular entitlement level available from which it can provide memory to the devices. The bus defines two pools of memory within this entitlement, the reserved and excess pools. Each device is provided with it's own entitlement no less than a system defined minimum entitlement and no greater than what the device has specified as it's desired entitlement. The entitlement provided to devices comes from the reserve pool. The reserve pool can also contain a spare allocation as large as the system defined minimum entitlement which is used for device hotplug events. Any entitlement not needed to fulfill the needs of a reserve pool is placed in the excess pool. Each device is guaranteed that it can map up to it's entitled level; additional mapping are possible as long as there is unmapped memory in the excess pool. Bus probe As the system starts, each device is given an entitlement equal only to the system defined minimum entitlement. The reserve pool is equal to the sum of these entitlements, plus a spare allocation. The VIO bus also tracks the aggregate desired entitlement of all the devices. If the system desired entitlement is greater than the size of the reserve pool, when devices unmap IO memory it will be reserved and a balance operation will be scheduled for some time in the future. Entitlement balancing The balance function tries to fairly distribute entitlement between the devices in the system with the goal of providing each device with it's desired amount of entitlement. Devices using more than what would be ideal will have their entitled set-point adjusted; this will effectively set a goal for lower IO memory usage as future mappings can fail and deallocations will trigger a balance operation to distribute the newly unmapped memory. A fair distribution of entitlement can take several balance operations to achieve. Entitlement changes and device DLPAR events will alter the state of CMO and will trigger balance operations. Hotplug events The VIO bus allows for changes in system entitlement at run-time via 'vio_cmo_entitlement_update()'. When devices are added the hotplug device event will be preceded by a system entitlement increase and this is reversed when devices are removed. The following changes are made that the VIO bus layer for CMO: * add IO memory accounting per device structure. * add IO memory entitlement query function to driver structure. * during vio bus probe, if CMO is enabled, check that driver has memory entitlement query function defined. Fail if function not defined. * fail to register driver if io entitlement function not defined. * create set of dma_ops at vio level for CMO that will track allocations and return DMA failures once entitlement is reached. Entitlement will limited by overall system entitlement. Devices will have a reserved quantity of memory that is guaranteed, the rest can be used as available. * expose entitlement, current allocation, desired allocation, and the allocation error counter for devices to the user through sysfs * provide mechanism for changing a device's desired entitlement at run time for devices as an exported function and sysfs tunable * track any DMA failures for entitled IO memory for each vio device. * check entitlement against available system entitlement on device add * track entitlement metrics (high water mark, current usage) * provide function to reset high water mark * provide minimum and desired entitlement numbers at a bus level * provide drivers with a minimum guaranteed entitlement * balance available entitlement between devices to satisfy their needs * handle system entitlement changes and device hotplug Signed-off-by: Robert Jennings Acked-by: Paul Mackerras Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/vio.h | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h index 56512a9..0a290a1 100644 --- a/include/asm-powerpc/vio.h +++ b/include/asm-powerpc/vio.h @@ -39,16 +39,32 @@ #define VIO_IRQ_DISABLE 0UL #define VIO_IRQ_ENABLE 1UL +/* + * VIO CMO minimum entitlement for all devices and spare entitlement + */ +#define VIO_CMO_MIN_ENT 1562624 + struct iommu_table; -/* - * The vio_dev structure is used to describe virtual I/O devices. +/** + * vio_dev - This structure is used to describe virtual I/O devices. + * + * @desired: set from return of driver's get_desired_dma() function + * @entitled: bytes of IO data that has been reserved for this device. + * @allocated: bytes of IO data currently in use by the device. + * @allocs_failed: number of DMA failures due to insufficient entitlement. */ struct vio_dev { const char *name; const char *type; uint32_t unit_address; unsigned int irq; + struct { + size_t desired; + size_t entitled; + size_t allocated; + atomic_t allocs_failed; + } cmo; struct device dev; }; @@ -56,12 +72,19 @@ struct vio_driver { const struct vio_device_id *id_table; int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); int (*remove)(struct vio_dev *dev); + /* A driver must have a get_desired_dma() function to + * be loaded in a CMO environment if it uses DMA. + */ + unsigned long (*get_desired_dma)(struct vio_dev *dev); struct device_driver driver; }; extern int vio_register_driver(struct vio_driver *drv); extern void vio_unregister_driver(struct vio_driver *drv); +extern int vio_cmo_entitlement_update(size_t); +extern void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired); + extern void __devinit vio_unregister_device(struct vio_dev *dev); struct device_node; -- cgit v1.1 From 1e3519f8e1baec0b733cd42684fcd3d9681662f1 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 25 Jul 2008 16:21:11 +1000 Subject: Move update_mmu_cache() declaration from tlbflush.h to pgtable.h where it belongs. This fixes some build problems on some configs Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/pgtable.h | 13 +++++++++++++ include/asm-powerpc/tlbflush.h | 11 ----------- 2 files changed, 13 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h index d18ffe7..dbb8ca1 100644 --- a/include/asm-powerpc/pgtable.h +++ b/include/asm-powerpc/pgtable.h @@ -38,6 +38,19 @@ extern void paging_init(void); remap_pfn_range(vma, vaddr, pfn, size, prot) #include + + +/* + * This gets called at the end of handling a page fault, when + * the kernel has put a new PTE into the page table for the process. + * We use it to ensure coherency between the i-cache and d-cache + * for the page which has just been mapped in. + * On machines which use an MMU hash table, we use this to put a + * corresponding HPTE into the hash table ahead of time, instead of + * waiting for the inevitable extra hash-table miss exception. + */ +extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h index 5c91081..361cd5c 100644 --- a/include/asm-powerpc/tlbflush.h +++ b/include/asm-powerpc/tlbflush.h @@ -162,16 +162,5 @@ extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start, #endif -/* - * This gets called at the end of handling a page fault, when - * the kernel has put a new PTE into the page table for the process. - * We use it to ensure coherency between the i-cache and d-cache - * for the page which has just been mapped in. - * On machines which use an MMU hash table, we use this to put a - * corresponding HPTE into the hash table ahead of time, instead of - * waiting for the inevitable extra hash-table miss exception. - */ -extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); - #endif /*__KERNEL__ */ #endif /* _ASM_POWERPC_TLBFLUSH_H */ -- cgit v1.1 From 973b7d83ebeb1e34b8bee69208916e5f0e2353c3 Mon Sep 17 00:00:00 2001 From: Tony Breeds Date: Fri, 25 Jul 2008 16:21:51 +1000 Subject: powerpc: Wireup new syscalls signalfd4, eventfd2, epoll_create1, dup3, pipe2 and inotify_init1 Signed-off-by: Tony Breeds Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/syscalls.h | 1 + include/asm-powerpc/systbl.h | 6 ++++++ include/asm-powerpc/unistd.h | 8 +++++++- 3 files changed, 14 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/syscalls.h b/include/asm-powerpc/syscalls.h index 2b8a458..eb8eb40 100644 --- a/include/asm-powerpc/syscalls.h +++ b/include/asm-powerpc/syscalls.h @@ -31,6 +31,7 @@ asmlinkage int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, unsigned long p4, unsigned long p5, unsigned long p6, struct pt_regs *regs); asmlinkage long sys_pipe(int __user *fildes); +asmlinkage long sys_pipe2(int __user *fildes, int flags); asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, struct sigaction __user *oact, size_t sigsetsize); diff --git a/include/asm-powerpc/systbl.h b/include/asm-powerpc/systbl.h index ae7085c..e084272 100644 --- a/include/asm-powerpc/systbl.h +++ b/include/asm-powerpc/systbl.h @@ -316,3 +316,9 @@ COMPAT_SYS(fallocate) SYSCALL(subpage_prot) COMPAT_SYS_SPU(timerfd_settime) COMPAT_SYS_SPU(timerfd_gettime) +COMPAT_SYS_SPU(signalfd4) +SYSCALL_SPU(eventfd2) +SYSCALL_SPU(epoll_create1) +SYSCALL_SPU(dup3) +SYSCALL_SPU(pipe2) +SYSCALL(inotify_init1) diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h index ce91bb6..e07d0c7 100644 --- a/include/asm-powerpc/unistd.h +++ b/include/asm-powerpc/unistd.h @@ -335,10 +335,16 @@ #define __NR_subpage_prot 310 #define __NR_timerfd_settime 311 #define __NR_timerfd_gettime 312 +#define __NR_signalfd4 313 +#define __NR_eventfd2 314 +#define __NR_epoll_create1 315 +#define __NR_dup3 316 +#define __NR_pipe2 317 +#define __NR_inotify_init1 318 #ifdef __KERNEL__ -#define __NR_syscalls 313 +#define __NR_syscalls 319 #define __NR__exit __NR_exit #define NR_syscalls __NR_syscalls -- cgit v1.1 From 6fccab671f2f0a24b799f29a4ec878f62d34656c Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Fri, 25 Jul 2008 02:54:40 -0700 Subject: ipsec: ipcomp - Merge IPComp implementations This patch merges the IPv4/IPv6 IPComp implementations since most of the code is identical. As a result future enhancements will no longer need to be duplicated. Signed-off-by: Herbert Xu Signed-off-by: David S. Miller --- include/net/ipcomp.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/net/ipcomp.h b/include/net/ipcomp.h index 330b74e..2a1092a 100644 --- a/include/net/ipcomp.h +++ b/include/net/ipcomp.h @@ -14,6 +14,12 @@ struct ipcomp_data { struct ip_comp_hdr; struct sk_buff; +struct xfrm_state; + +int ipcomp_input(struct xfrm_state *x, struct sk_buff *skb); +int ipcomp_output(struct xfrm_state *x, struct sk_buff *skb); +void ipcomp_destroy(struct xfrm_state *x); +int ipcomp_init_state(struct xfrm_state *x); static inline struct ip_comp_hdr *ip_comp_hdr(const struct sk_buff *skb) { -- cgit v1.1 From 95984f62c9b0bf6d89ef4f514b1afe73623481de Mon Sep 17 00:00:00 2001 From: Stefan Richter Date: Tue, 22 Jul 2008 18:41:10 +0200 Subject: firewire: fw-ohci: TSB43AB22/A dualbuffer workaround Isochronous reception in dualbuffer mode is reportedly broken with TI TSB43AB22A on x86-64. Descriptor addresses above 2G have been determined as the trigger: https://bugzilla.redhat.com/show_bug.cgi?id=435550 Two fixes are possible: - pci_set_consistent_dma_mask(pdev, DMA_31BIT_MASK); at least when IR descriptors are allocated, or - simply don't use dualbuffer. This fix implements the latter workaround. But we keep using dualbuffer on x86-32 which won't give us highmen (and thus physical addresses outside the 31bit range) in coherent DMA memory allocations. Right now we could for example also whitelist PPC32, but DMA mapping implementation details are expected to change there. Signed-off-by: Stefan Richter Signed-off-by: Jarod Wilson --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 6595382..720d675 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -748,6 +748,7 @@ #define PCI_VENDOR_ID_TI 0x104c #define PCI_DEVICE_ID_TI_TVP4020 0x3d07 #define PCI_DEVICE_ID_TI_4450 0x8011 +#define PCI_DEVICE_ID_TI_TSB43AB22 0x8023 #define PCI_DEVICE_ID_TI_XX21_XX11 0x8031 #define PCI_DEVICE_ID_TI_XX21_XX11_FM 0x8033 #define PCI_DEVICE_ID_TI_XX21_XX11_SD 0x8034 -- cgit v1.1 From 3d45955962496879dead8d4dd70bb9a23b07154b Mon Sep 17 00:00:00 2001 From: Alexey Korolev Date: Thu, 15 May 2008 17:23:18 +0100 Subject: [MTD] [NAND] subpage read feature as a way to increase performance. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch enables NAND subpage read functionality. If upper layer drivers are requesting to read non page aligned data NAND subpage-read functionality reads the only whose ECC regions which include requested data when original code reads whole page. This significantly improves performance in many cases. Here are some digits : UBI volume mount time No subpage reads: 5.75 seconds Subpage read patch: 2.42 seconds Open/stat time for files on JFFS2 volume: No subpage read 0m 5.36s Subpage read 0m 2.88s Signed-off-by Alexey Korolev Acked-by: Artem Bityutskiy Acked-by: Jörn Engel Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 863e22a..83f6787 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -177,6 +177,7 @@ typedef enum { #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) +#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT)) /* Mask to zero out the chip options, which come from the id table */ #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) @@ -274,6 +275,10 @@ struct nand_ecc_ctrl { int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, uint8_t *buf); + int (*read_subpage)(struct mtd_info *mtd, + struct nand_chip *chip, + uint32_t offs, uint32_t len, + uint8_t *buf); void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf); -- cgit v1.1 From 3d6f4a20cc287a8980c6186624834cf10a70752b Mon Sep 17 00:00:00 2001 From: David Miller Date: Thu, 24 Jul 2008 23:38:31 -0700 Subject: endian: Always evaluate arguments. Changeset 7fa897b91a3ea0f16c2873b869d7a0eef05acff4 ("ide: trivial sparse annotations") created an IDE bootup regression on big-endian systems. In drivers/ide/ide-iops.c, function ide_fixstring() we now have the loop: for (p = end ; p != s;) be16_to_cpus((u16 *)(p -= 2)); which will never terminate on big-endian because in such a configuration be16_to_cpus() evaluates to "do { } while (0)" Therefore, always evaluate the arguments to nop endian transformation operations. Signed-off-by: David S. Miller Signed-off-by: Linus Torvalds --- include/linux/byteorder/big_endian.h | 12 ++++++------ include/linux/byteorder/little_endian.h | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/byteorder/big_endian.h b/include/linux/byteorder/big_endian.h index 961ed4b..44f95b9 100644 --- a/include/linux/byteorder/big_endian.h +++ b/include/linux/byteorder/big_endian.h @@ -94,12 +94,12 @@ static inline __u16 __be16_to_cpup(const __be16 *p) #define __le32_to_cpus(x) __swab32s((x)) #define __cpu_to_le16s(x) __swab16s((x)) #define __le16_to_cpus(x) __swab16s((x)) -#define __cpu_to_be64s(x) do {} while (0) -#define __be64_to_cpus(x) do {} while (0) -#define __cpu_to_be32s(x) do {} while (0) -#define __be32_to_cpus(x) do {} while (0) -#define __cpu_to_be16s(x) do {} while (0) -#define __be16_to_cpus(x) do {} while (0) +#define __cpu_to_be64s(x) do { (void)(x); } while (0) +#define __be64_to_cpus(x) do { (void)(x); } while (0) +#define __cpu_to_be32s(x) do { (void)(x); } while (0) +#define __be32_to_cpus(x) do { (void)(x); } while (0) +#define __cpu_to_be16s(x) do { (void)(x); } while (0) +#define __be16_to_cpus(x) do { (void)(x); } while (0) #ifdef __KERNEL__ #include diff --git a/include/linux/byteorder/little_endian.h b/include/linux/byteorder/little_endian.h index 05dc7c3..4cc170a 100644 --- a/include/linux/byteorder/little_endian.h +++ b/include/linux/byteorder/little_endian.h @@ -88,12 +88,12 @@ static inline __u16 __be16_to_cpup(const __be16 *p) { return __swab16p((__u16 *)p); } -#define __cpu_to_le64s(x) do {} while (0) -#define __le64_to_cpus(x) do {} while (0) -#define __cpu_to_le32s(x) do {} while (0) -#define __le32_to_cpus(x) do {} while (0) -#define __cpu_to_le16s(x) do {} while (0) -#define __le16_to_cpus(x) do {} while (0) +#define __cpu_to_le64s(x) do { (void)(x); } while (0) +#define __le64_to_cpus(x) do { (void)(x); } while (0) +#define __cpu_to_le32s(x) do { (void)(x); } while (0) +#define __le32_to_cpus(x) do { (void)(x); } while (0) +#define __cpu_to_le16s(x) do { (void)(x); } while (0) +#define __le16_to_cpus(x) do { (void)(x); } while (0) #define __cpu_to_be64s(x) __swab64s((x)) #define __be64_to_cpus(x) __swab64s((x)) #define __cpu_to_be32s(x) __swab32s((x)) -- cgit v1.1 From 3e4d0cab61c88a9ae3e61151a857960397e26403 Mon Sep 17 00:00:00 2001 From: Tony Luck Date: Fri, 25 Jul 2008 10:10:28 -0700 Subject: [IA64] Wire up new system calls Six new system calls: signalfd4, eventfd2, epoll_create1, dup3, pipe2 and inotify_init1. Signed-off-by: Tony Luck --- include/asm-ia64/unistd.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h index e603147..d535833 100644 --- a/include/asm-ia64/unistd.h +++ b/include/asm-ia64/unistd.h @@ -302,11 +302,17 @@ #define __NR_timerfd_create 1310 #define __NR_timerfd_settime 1311 #define __NR_timerfd_gettime 1312 +#define __NR_signalfd4 1313 +#define __NR_eventfd2 1314 +#define __NR_epoll_create1 1315 +#define __NR_dup3 1316 +#define __NR_pipe2 1317 +#define __NR_inotify_init1 1318 #ifdef __KERNEL__ -#define NR_syscalls 289 /* length of syscall table */ +#define NR_syscalls 295 /* length of syscall table */ /* * The following defines stop scripts/checksyscalls.sh from complaining about -- cgit v1.1 From 25c94d010a8ae8605dc4d5453e0c82fa97da5d12 Mon Sep 17 00:00:00 2001 From: Yevgeny Petrilin Date: Fri, 25 Jul 2008 10:30:06 -0700 Subject: mlx4_core: Add VLAN tag field to WQE control segment struct Add fields for VLAN tag and insert VLAN tag flag to the control section struct. These fields will be used for sending ethernet packets. Signed-off-by: Yevgeny Petrilin Signed-off-by: Roland Dreier --- include/linux/mlx4/qp.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h index e27082c..bf8f119 100644 --- a/include/linux/mlx4/qp.h +++ b/include/linux/mlx4/qp.h @@ -164,11 +164,13 @@ enum { MLX4_WQE_CTRL_SOLICITED = 1 << 1, MLX4_WQE_CTRL_IP_CSUM = 1 << 4, MLX4_WQE_CTRL_TCP_UDP_CSUM = 1 << 5, + MLX4_WQE_CTRL_INS_VLAN = 1 << 6, }; struct mlx4_wqe_ctrl_seg { __be32 owner_opcode; - u8 reserved2[3]; + __be16 vlan_tag; + u8 ins_vlan; u8 fence_size; /* * High 24 bits are SRC remote buffer; low 8 bits are flags: -- cgit v1.1 From e0deaff470900a4c3222ca7139f6c9639e26a2f5 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Fri, 25 Jul 2008 01:45:24 -0700 Subject: split the typecheck macros out of include/linux/kernel.h Needed to fix up a recursive include snafu in locking-add-typecheck-on-irqsave-and-friends-for-correct-flags.patch Cc: Steven Rostedt Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kernel.h | 21 +-------------------- include/linux/typecheck.h | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+), 20 deletions(-) create mode 100644 include/linux/typecheck.h (limited to 'include') diff --git a/include/linux/kernel.h b/include/linux/kernel.h index f9cd7a5..5c4b125 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -441,26 +442,6 @@ static inline char *pack_hex_byte(char *buf, u8 byte) const typeof( ((type *)0)->member ) *__mptr = (ptr); \ (type *)( (char *)__mptr - offsetof(type,member) );}) -/* - * Check at compile time that something is of a particular type. - * Always evaluates to 1 so you may use it easily in comparisons. - */ -#define typecheck(type,x) \ -({ type __dummy; \ - typeof(x) __dummy2; \ - (void)(&__dummy == &__dummy2); \ - 1; \ -}) - -/* - * Check at compile time that 'function' is a certain type, or is a pointer - * to that type (needs to use typedef for the function type.) - */ -#define typecheck_fn(type,function) \ -({ typeof(type) __tmp = function; \ - (void)__tmp; \ -}) - struct sysinfo; extern int do_sysinfo(struct sysinfo *info); diff --git a/include/linux/typecheck.h b/include/linux/typecheck.h new file mode 100644 index 0000000..eb5b74a --- /dev/null +++ b/include/linux/typecheck.h @@ -0,0 +1,24 @@ +#ifndef TYPECHECK_H_INCLUDED +#define TYPECHECK_H_INCLUDED + +/* + * Check at compile time that something is of a particular type. + * Always evaluates to 1 so you may use it easily in comparisons. + */ +#define typecheck(type,x) \ +({ type __dummy; \ + typeof(x) __dummy2; \ + (void)(&__dummy == &__dummy2); \ + 1; \ +}) + +/* + * Check at compile time that 'function' is a certain type, or is a pointer + * to that type (needs to use typedef for the function type.) + */ +#define typecheck_fn(type,function) \ +({ typeof(type) __tmp = function; \ + (void)__tmp; \ +}) + +#endif /* TYPECHECK_H_INCLUDED */ -- cgit v1.1 From 3f307891ce0e7b0438c432af1aacd656a092ff45 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Fri, 25 Jul 2008 01:45:25 -0700 Subject: locking: add typecheck on irqsave and friends for correct flags There haave been several areas in the kernel where an int has been used for flags in local_irq_save() and friends instead of a long. This can cause some hard to debug problems on some architectures. This patch adds a typecheck inside the irqsave and restore functions to flag these cases. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: build fix] Signed-off-by: Steven Rostedt Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/irqflags.h | 54 ++++++++++++++++++++++++++---------- include/linux/spinlock.h | 72 +++++++++++++++++++++++++++++++++++++----------- 2 files changed, 95 insertions(+), 31 deletions(-) (limited to 'include') diff --git a/include/linux/irqflags.h b/include/linux/irqflags.h index 2b1c2e5..74bde13 100644 --- a/include/linux/irqflags.h +++ b/include/linux/irqflags.h @@ -11,6 +11,8 @@ #ifndef _LINUX_TRACE_IRQFLAGS_H #define _LINUX_TRACE_IRQFLAGS_H +#include + #ifdef CONFIG_TRACE_IRQFLAGS extern void trace_softirqs_on(unsigned long ip); extern void trace_softirqs_off(unsigned long ip); @@ -58,18 +60,24 @@ do { trace_hardirqs_on(); raw_local_irq_enable(); } while (0) #define local_irq_disable() \ do { raw_local_irq_disable(); trace_hardirqs_off(); } while (0) -#define local_irq_save(flags) \ - do { raw_local_irq_save(flags); trace_hardirqs_off(); } while (0) +#define local_irq_save(flags) \ + do { \ + typecheck(unsigned long, flags); \ + raw_local_irq_save(flags); \ + trace_hardirqs_off(); \ + } while (0) -#define local_irq_restore(flags) \ - do { \ - if (raw_irqs_disabled_flags(flags)) { \ - raw_local_irq_restore(flags); \ - trace_hardirqs_off(); \ - } else { \ - trace_hardirqs_on(); \ - raw_local_irq_restore(flags); \ - } \ + +#define local_irq_restore(flags) \ + do { \ + typecheck(unsigned long, flags); \ + if (raw_irqs_disabled_flags(flags)) { \ + raw_local_irq_restore(flags); \ + trace_hardirqs_off(); \ + } else { \ + trace_hardirqs_on(); \ + raw_local_irq_restore(flags); \ + } \ } while (0) #else /* !CONFIG_TRACE_IRQFLAGS_SUPPORT */ /* @@ -78,8 +86,16 @@ */ # define raw_local_irq_disable() local_irq_disable() # define raw_local_irq_enable() local_irq_enable() -# define raw_local_irq_save(flags) local_irq_save(flags) -# define raw_local_irq_restore(flags) local_irq_restore(flags) +# define raw_local_irq_save(flags) \ + do { \ + typecheck(unsigned long, flags); \ + local_irq_save(flags); \ + } while (0) +# define raw_local_irq_restore(flags) \ + do { \ + typecheck(unsigned long, flags); \ + local_irq_restore(flags); \ + } while (0) #endif /* CONFIG_TRACE_IRQFLAGS_SUPPORT */ #ifdef CONFIG_TRACE_IRQFLAGS_SUPPORT @@ -89,7 +105,11 @@ raw_safe_halt(); \ } while (0) -#define local_save_flags(flags) raw_local_save_flags(flags) +#define local_save_flags(flags) \ + do { \ + typecheck(unsigned long, flags); \ + raw_local_save_flags(flags); \ + } while (0) #define irqs_disabled() \ ({ \ @@ -99,7 +119,11 @@ raw_irqs_disabled_flags(_flags); \ }) -#define irqs_disabled_flags(flags) raw_irqs_disabled_flags(flags) +#define irqs_disabled_flags(flags) \ +({ \ + typecheck(unsigned long, flags); \ + raw_irqs_disabled_flags(flags); \ +}) #endif /* CONFIG_X86 */ #endif diff --git a/include/linux/spinlock.h b/include/linux/spinlock.h index d311a09..61e5610 100644 --- a/include/linux/spinlock.h +++ b/include/linux/spinlock.h @@ -46,6 +46,7 @@ * linux/spinlock.h: builds the final spin_*() APIs. */ +#include #include #include #include @@ -191,23 +192,53 @@ do { \ #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) -#define spin_lock_irqsave(lock, flags) flags = _spin_lock_irqsave(lock) -#define read_lock_irqsave(lock, flags) flags = _read_lock_irqsave(lock) -#define write_lock_irqsave(lock, flags) flags = _write_lock_irqsave(lock) +#define spin_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + flags = _spin_lock_irqsave(lock); \ + } while (0) +#define read_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + flags = _read_lock_irqsave(lock); \ + } while (0) +#define write_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + flags = _write_lock_irqsave(lock); \ + } while (0) #ifdef CONFIG_DEBUG_LOCK_ALLOC -#define spin_lock_irqsave_nested(lock, flags, subclass) \ - flags = _spin_lock_irqsave_nested(lock, subclass) +#define spin_lock_irqsave_nested(lock, flags, subclass) \ + do { \ + typecheck(unsigned long, flags); \ + flags = _spin_lock_irqsave_nested(lock, subclass); \ + } while (0) #else -#define spin_lock_irqsave_nested(lock, flags, subclass) \ - flags = _spin_lock_irqsave(lock) +#define spin_lock_irqsave_nested(lock, flags, subclass) \ + do { \ + typecheck(unsigned long, flags); \ + flags = _spin_lock_irqsave(lock); \ + } while (0) #endif #else -#define spin_lock_irqsave(lock, flags) _spin_lock_irqsave(lock, flags) -#define read_lock_irqsave(lock, flags) _read_lock_irqsave(lock, flags) -#define write_lock_irqsave(lock, flags) _write_lock_irqsave(lock, flags) +#define spin_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _spin_lock_irqsave(lock, flags); \ + } while (0) +#define read_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _read_lock_irqsave(lock, flags); \ + } while (0) +#define write_lock_irqsave(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _write_lock_irqsave(lock, flags); \ + } while (0) #define spin_lock_irqsave_nested(lock, flags, subclass) \ spin_lock_irqsave(lock, flags) @@ -260,16 +291,25 @@ do { \ } while (0) #endif -#define spin_unlock_irqrestore(lock, flags) \ - _spin_unlock_irqrestore(lock, flags) +#define spin_unlock_irqrestore(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _spin_unlock_irqrestore(lock, flags); \ + } while (0) #define spin_unlock_bh(lock) _spin_unlock_bh(lock) -#define read_unlock_irqrestore(lock, flags) \ - _read_unlock_irqrestore(lock, flags) +#define read_unlock_irqrestore(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _read_unlock_irqrestore(lock, flags); \ + } while (0) #define read_unlock_bh(lock) _read_unlock_bh(lock) -#define write_unlock_irqrestore(lock, flags) \ - _write_unlock_irqrestore(lock, flags) +#define write_unlock_irqrestore(lock, flags) \ + do { \ + typecheck(unsigned long, flags); \ + _write_unlock_irqrestore(lock, flags); \ + } while (0) #define write_unlock_bh(lock) _write_unlock_bh(lock) #define spin_trylock_bh(lock) __cond_lock(lock, _spin_trylock_bh(lock)) -- cgit v1.1 From 8b5ac31e27135a6f2c210c40d03bf8f1b3a86b77 Mon Sep 17 00:00:00 2001 From: Harvey Harrison Date: Fri, 25 Jul 2008 01:45:26 -0700 Subject: include: use get/put_unaligned_* helpers Signed-off-by: Harvey Harrison Cc: "John W. Linville" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/reiserfs_fs.h | 4 ++-- include/linux/smb_fs.h | 19 +++++++------------ include/net/ieee80211_radiotap.h | 2 +- 3 files changed, 10 insertions(+), 15 deletions(-) (limited to 'include') diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h index 4aacaee..e9963af 100644 --- a/include/linux/reiserfs_fs.h +++ b/include/linux/reiserfs_fs.h @@ -526,8 +526,8 @@ struct item_head { ** p is the array of __u32, i is the index into the array, v is the value ** to store there. */ -#define get_block_num(p, i) le32_to_cpu(get_unaligned((p) + (i))) -#define put_block_num(p, i, v) put_unaligned(cpu_to_le32(v), (p) + (i)) +#define get_block_num(p, i) get_unaligned_le32((p) + (i)) +#define put_block_num(p, i, v) put_unaligned_le32((v), (p) + (i)) // // in old version uniqueness field shows key type diff --git a/include/linux/smb_fs.h b/include/linux/smb_fs.h index 2c5cd55..923cd8a 100644 --- a/include/linux/smb_fs.h +++ b/include/linux/smb_fs.h @@ -43,18 +43,13 @@ static inline struct smb_inode_info *SMB_I(struct inode *inode) } /* macro names are short for word, double-word, long value (?) */ -#define WVAL(buf,pos) \ - (le16_to_cpu(get_unaligned((__le16 *)((u8 *)(buf) + (pos))))) -#define DVAL(buf,pos) \ - (le32_to_cpu(get_unaligned((__le32 *)((u8 *)(buf) + (pos))))) -#define LVAL(buf,pos) \ - (le64_to_cpu(get_unaligned((__le64 *)((u8 *)(buf) + (pos))))) -#define WSET(buf,pos,val) \ - put_unaligned(cpu_to_le16((u16)(val)), (__le16 *)((u8 *)(buf) + (pos))) -#define DSET(buf,pos,val) \ - put_unaligned(cpu_to_le32((u32)(val)), (__le32 *)((u8 *)(buf) + (pos))) -#define LSET(buf,pos,val) \ - put_unaligned(cpu_to_le64((u64)(val)), (__le64 *)((u8 *)(buf) + (pos))) +#define WVAL(buf, pos) (get_unaligned_le16((u8 *)(buf) + (pos))) +#define DVAL(buf, pos) (get_unaligned_le32((u8 *)(buf) + (pos))) +#define LVAL(buf, pos) (get_unaligned_le64((u8 *)(buf) + (pos))) + +#define WSET(buf, pos, val) put_unaligned_le16((val), (u8 *)(buf) + (pos)) +#define DSET(buf, pos, val) put_unaligned_le32((val), (u8 *)(buf) + (pos)) +#define LSET(buf, pos, val) put_unaligned_le64((val), (u8 *)(buf) + (pos)) /* where to find the base of the SMB packet proper */ #define smb_base(buf) ((u8 *)(((u8 *)(buf))+4)) diff --git a/include/net/ieee80211_radiotap.h b/include/net/ieee80211_radiotap.h index dfd8bf6..d364fd5 100644 --- a/include/net/ieee80211_radiotap.h +++ b/include/net/ieee80211_radiotap.h @@ -262,7 +262,7 @@ static inline int ieee80211_get_radiotap_len(unsigned char *data) struct ieee80211_radiotap_header *hdr = (struct ieee80211_radiotap_header *)data; - return le16_to_cpu(get_unaligned(&hdr->it_len)); + return get_unaligned_le16(&hdr->it_len); } #endif /* IEEE80211_RADIOTAP_H */ -- cgit v1.1 From b39c08cb692cb8898c30e0d8187c7cbe27cc905c Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Fri, 25 Jul 2008 01:45:29 -0700 Subject: Remove apparently unused fd1772.h header file. This header file has been unused for quite some time, and the corresponding source files appear to have been removed back in commit 99eb8a550dbccc0e1f6c7e866fe421810e0585f6 ("Remove the arm26 port") Signed-off-by: Robert P. J. Day Cc: Adrian Bunk Cc: Ian Molton Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/fd1772.h | 80 -------------------------------------------------- 1 file changed, 80 deletions(-) delete mode 100644 include/linux/fd1772.h (limited to 'include') diff --git a/include/linux/fd1772.h b/include/linux/fd1772.h deleted file mode 100644 index 871d6e4..0000000 --- a/include/linux/fd1772.h +++ /dev/null @@ -1,80 +0,0 @@ -#ifndef _LINUX_FD1772REG_H -#define _LINUX_FD1772REG_H - -/* -** WD1772 stuff - originally from the M68K Linux - * Modified for Archimedes by Dave Gilbert (gilbertd@cs.man.ac.uk) - */ - -/* register codes */ - -#define FDC1772SELREG_STP (0x80) /* command/status register */ -#define FDC1772SELREG_TRA (0x82) /* track register */ -#define FDC1772SELREG_SEC (0x84) /* sector register */ -#define FDC1772SELREG_DTA (0x86) /* data register */ - -/* register names for FDC1772_READ/WRITE macros */ - -#define FDC1772REG_CMD 0 -#define FDC1772REG_STATUS 0 -#define FDC1772REG_TRACK 2 -#define FDC1772REG_SECTOR 4 -#define FDC1772REG_DATA 6 - -/* command opcodes */ - -#define FDC1772CMD_RESTORE (0x00) /* - */ -#define FDC1772CMD_SEEK (0x10) /* | */ -#define FDC1772CMD_STEP (0x20) /* | TYP 1 Commands */ -#define FDC1772CMD_STIN (0x40) /* | */ -#define FDC1772CMD_STOT (0x60) /* - */ -#define FDC1772CMD_RDSEC (0x80) /* - TYP 2 Commands */ -#define FDC1772CMD_WRSEC (0xa0) /* - " */ -#define FDC1772CMD_RDADR (0xc0) /* - */ -#define FDC1772CMD_RDTRA (0xe0) /* | TYP 3 Commands */ -#define FDC1772CMD_WRTRA (0xf0) /* - */ -#define FDC1772CMD_FORCI (0xd0) /* - TYP 4 Command */ - -/* command modifier bits */ - -#define FDC1772CMDADD_SR6 (0x00) /* step rate settings */ -#define FDC1772CMDADD_SR12 (0x01) -#define FDC1772CMDADD_SR2 (0x02) -#define FDC1772CMDADD_SR3 (0x03) -#define FDC1772CMDADD_V (0x04) /* verify */ -#define FDC1772CMDADD_H (0x08) /* wait for spin-up */ -#define FDC1772CMDADD_U (0x10) /* update track register */ -#define FDC1772CMDADD_M (0x10) /* multiple sector access */ -#define FDC1772CMDADD_E (0x04) /* head settling flag */ -#define FDC1772CMDADD_P (0x02) /* precompensation */ -#define FDC1772CMDADD_A0 (0x01) /* DAM flag */ - -/* status register bits */ - -#define FDC1772STAT_MOTORON (0x80) /* motor on */ -#define FDC1772STAT_WPROT (0x40) /* write protected (FDC1772CMD_WR*) */ -#define FDC1772STAT_SPINUP (0x20) /* motor speed stable (Type I) */ -#define FDC1772STAT_DELDAM (0x20) /* sector has deleted DAM (Type II+III) */ -#define FDC1772STAT_RECNF (0x10) /* record not found */ -#define FDC1772STAT_CRC (0x08) /* CRC error */ -#define FDC1772STAT_TR00 (0x04) /* Track 00 flag (Type I) */ -#define FDC1772STAT_LOST (0x04) /* Lost Data (Type II+III) */ -#define FDC1772STAT_IDX (0x02) /* Index status (Type I) */ -#define FDC1772STAT_DRQ (0x02) /* DRQ status (Type II+III) */ -#define FDC1772STAT_BUSY (0x01) /* FDC1772 is busy */ - - -/* PSG Port A Bit Nr 0 .. Side Sel .. 0 -> Side 1 1 -> Side 2 */ -#define DSKSIDE (0x01) - -#define DSKDRVNONE (0x06) -#define DSKDRV0 (0x02) -#define DSKDRV1 (0x04) - -/* step rates */ -#define FDC1772STEP_6 0x00 -#define FDC1772STEP_12 0x01 -#define FDC1772STEP_2 0x02 -#define FDC1772STEP_3 0x03 - -#endif -- cgit v1.1 From e0ce0da9fefcc723dc006c35a7f91a32750abd40 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Fri, 25 Jul 2008 01:45:32 -0700 Subject: lists: remove a redundant conditional definition of list_add() Remove the conditional surrounding the definition of list_add() from list.h since, if you define CONFIG_DEBUG_LIST, the definition you will subsequently pick up from lib/list_debug.c will be absolutely identical, at which point you can remove that redundant definition from list_debug.c as well. Signed-off-by: Robert P. J. Day Cc: Dave Jones Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/list.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/linux/list.h b/include/linux/list.h index 139ec41..453916b 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -61,14 +61,10 @@ extern void __list_add(struct list_head *new, * Insert a new entry after the specified head. * This is good for implementing stacks. */ -#ifndef CONFIG_DEBUG_LIST static inline void list_add(struct list_head *new, struct list_head *head) { __list_add(new, head, head->next); } -#else -extern void list_add(struct list_head *new, struct list_head *head); -#endif /** -- cgit v1.1 From b03f6489f9f27dc519a4c60ebf39cc7b8a58eae7 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:45:35 -0700 Subject: build kernel/profile.o only when requested Build kernel/profile.o only if CONFIG_PROFILING is enabled. This makes CONFIG_PROFILING=n kernels smaller. As a bonus, some profile_tick() calls and one branch from schedule() are now eliminated with CONFIG_PROFILING=n (but I doubt these are measurable effects). This patch changes the effects of CONFIG_PROFILING=n, but I don't think having more than two choices would be the better choice. This patch also adds the name of the first parameter to the prototypes of profile_{hits,tick}() since I anyway had to add them for the dummy functions. Signed-off-by: Adrian Bunk Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/profile.h | 56 ++++++++++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/linux/profile.h b/include/linux/profile.h index 05c1cc7..4081fa3 100644 --- a/include/linux/profile.h +++ b/include/linux/profile.h @@ -8,8 +8,6 @@ #include -extern int prof_on __read_mostly; - #define CPU_PROFILING 1 #define SCHED_PROFILING 2 #define SLEEP_PROFILING 3 @@ -19,14 +17,29 @@ struct proc_dir_entry; struct pt_regs; struct notifier_block; +#if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS) +void create_prof_cpu_mask(struct proc_dir_entry *); +#else +#define create_prof_cpu_mask(x) do { (void)(x); } while (0) +#endif + +enum profile_type { + PROFILE_TASK_EXIT, + PROFILE_MUNMAP +}; + +#ifdef CONFIG_PROFILING + +extern int prof_on __read_mostly; + /* init basic kernel profiler */ void __init profile_init(void); -void profile_tick(int); +void profile_tick(int type); /* * Add multiple profiler hits to a given address: */ -void profile_hits(int, void *ip, unsigned int nr_hits); +void profile_hits(int type, void *ip, unsigned int nr_hits); /* * Single profiler hit: @@ -40,19 +53,6 @@ static inline void profile_hit(int type, void *ip) profile_hits(type, ip, 1); } -#ifdef CONFIG_PROC_FS -void create_prof_cpu_mask(struct proc_dir_entry *); -#else -#define create_prof_cpu_mask(x) do { (void)(x); } while (0) -#endif - -enum profile_type { - PROFILE_TASK_EXIT, - PROFILE_MUNMAP -}; - -#ifdef CONFIG_PROFILING - struct task_struct; struct mm_struct; @@ -80,6 +80,28 @@ struct pt_regs; #else +#define prof_on 0 + +static inline void profile_init(void) +{ + return; +} + +static inline void profile_tick(int type) +{ + return; +} + +static inline void profile_hits(int type, void *ip, unsigned int nr_hits) +{ + return; +} + +static inline void profile_hit(int type, void *ip) +{ + return; +} + static inline int task_handoff_register(struct notifier_block * n) { return -ENOSYS; -- cgit v1.1 From cebbd3fb803603b12408458ba17c29ce1e15a5f2 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Fri, 25 Jul 2008 01:45:35 -0700 Subject: build-kernel-profileo-only-when-requested-cleanups Cc: Adrian Bunk Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/profile.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/profile.h b/include/linux/profile.h index 4081fa3..7e70872 100644 --- a/include/linux/profile.h +++ b/include/linux/profile.h @@ -18,9 +18,11 @@ struct pt_regs; struct notifier_block; #if defined(CONFIG_PROFILING) && defined(CONFIG_PROC_FS) -void create_prof_cpu_mask(struct proc_dir_entry *); +void create_prof_cpu_mask(struct proc_dir_entry *de); #else -#define create_prof_cpu_mask(x) do { (void)(x); } while (0) +static inline void create_prof_cpu_mask(struct proc_dir_entry *de) +{ +} #endif enum profile_type { -- cgit v1.1 From f16695f4ac088cf7593e113574046d2d7e5af5eb Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:45:36 -0700 Subject: asm-generic/int-ll64.h: always provide __{s,u}64 Several compilers offer "long long" without claiming to support C99. Considering how frequent __s64/__u64 are used our userspace headers are anyway unusable without __s64/__u64 available. Always offer __s64/__u64 to non-gcc non-C99 compilers - if they provide "long long" that makes the headers compiling and if they don't they are anyway screwed. Signed-off-by: Adrian Bunk Acked-by: H. Peter Anvin Cc: Harvey Harrison Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/int-ll64.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-generic/int-ll64.h b/include/asm-generic/int-ll64.h index 2609489..f9bc9ac 100644 --- a/include/asm-generic/int-ll64.h +++ b/include/asm-generic/int-ll64.h @@ -26,7 +26,7 @@ typedef unsigned int __u32; #ifdef __GNUC__ __extension__ typedef __signed__ long long __s64; __extension__ typedef unsigned long long __u64; -#elif defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L +#else typedef __signed__ long long __s64; typedef unsigned long long __u64; #endif -- cgit v1.1 From ac331d158e198d2a91a5b0a3ec4ca9991fdb57af Mon Sep 17 00:00:00 2001 From: KOSAKI Motohiro Date: Fri, 25 Jul 2008 01:45:38 -0700 Subject: call_usermodehelper(): increase reliability Presently call_usermodehelper_setup() uses GFP_ATOMIC. but it can return NULL _very_ easily. GFP_ATOMIC is needed only when we can't sleep. and, GFP_KERNEL is robust and better. thus, I add gfp_mask argument to call_usermodehelper_setup(). So, its callers pass the gfp_t as below: call_usermodehelper() and call_usermodehelper_keys(): depend on 'wait' argument. call_usermodehelper_pipe(): always GFP_KERNEL because always run under process context. orderly_poweroff(): pass to GFP_ATOMIC because may run under interrupt context. Signed-off-by: KOSAKI Motohiro Cc: "Paul Menage" Reviewed-by: Li Zefan Acked-by: Jeremy Fitzhardinge Cc: Rusty Russell Cc: Andi Kleen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kmod.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/kmod.h b/include/linux/kmod.h index 0509c4c..a1a9157 100644 --- a/include/linux/kmod.h +++ b/include/linux/kmod.h @@ -19,6 +19,7 @@ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ +#include #include #include #include @@ -41,8 +42,8 @@ struct file; struct subprocess_info; /* Allocate a subprocess_info structure */ -struct subprocess_info *call_usermodehelper_setup(char *path, - char **argv, char **envp); +struct subprocess_info *call_usermodehelper_setup(char *path, char **argv, + char **envp, gfp_t gfp_mask); /* Set various pieces of state into the subprocess_info structure */ void call_usermodehelper_setkeys(struct subprocess_info *info, @@ -69,8 +70,9 @@ static inline int call_usermodehelper(char *path, char **argv, char **envp, enum umh_wait wait) { struct subprocess_info *info; + gfp_t gfp_mask = (wait == UMH_NO_WAIT) ? GFP_ATOMIC : GFP_KERNEL; - info = call_usermodehelper_setup(path, argv, envp); + info = call_usermodehelper_setup(path, argv, envp, gfp_mask); if (info == NULL) return -ENOMEM; return call_usermodehelper_exec(info, wait); @@ -81,8 +83,9 @@ call_usermodehelper_keys(char *path, char **argv, char **envp, struct key *session_keyring, enum umh_wait wait) { struct subprocess_info *info; + gfp_t gfp_mask = (wait == UMH_NO_WAIT) ? GFP_ATOMIC : GFP_KERNEL; - info = call_usermodehelper_setup(path, argv, envp); + info = call_usermodehelper_setup(path, argv, envp, gfp_mask); if (info == NULL) return -ENOMEM; -- cgit v1.1 From b69c49b78457f681ecfb3147bd968434ee6559c1 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Fri, 25 Jul 2008 01:45:40 -0700 Subject: clean up duplicated alloc/free_thread_info We duplicate alloc/free_thread_info defines on many platforms (the majority uses __get_free_pages/free_pages). This patch defines common defines and removes these duplicated defines. __HAVE_ARCH_THREAD_INFO_ALLOCATOR is introduced for platforms that do something different. Signed-off-by: FUJITA Tomonori Acked-by: Russell King Cc: Pekka Enberg Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-alpha/thread_info.h | 4 +--- include/asm-arm/thread_info.h | 13 ------------- include/asm-avr32/thread_info.h | 4 ---- include/asm-blackfin/thread_info.h | 5 +---- include/asm-cris/thread_info.h | 2 ++ include/asm-frv/thread_info.h | 2 ++ include/asm-h8300/thread_info.h | 5 +---- include/asm-ia64/thread_info.h | 2 ++ include/asm-m32r/thread_info.h | 2 ++ include/asm-m68k/thread_info.h | 8 +------- include/asm-m68knommu/thread_info.h | 4 ---- include/asm-mips/thread_info.h | 2 ++ include/asm-mn10300/thread_info.h | 2 ++ include/asm-parisc/thread_info.h | 10 +++------- include/asm-powerpc/thread_info.h | 14 +++----------- include/asm-s390/thread_info.h | 5 +---- include/asm-sh/thread_info.h | 2 ++ include/asm-sparc/thread_info_32.h | 2 ++ include/asm-sparc/thread_info_64.h | 2 ++ include/asm-um/thread_info.h | 16 +--------------- include/asm-x86/thread_info.h | 2 ++ include/asm-xtensa/thread_info.h | 5 +---- 22 files changed, 33 insertions(+), 80 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/thread_info.h b/include/asm-alpha/thread_info.h index fb31851..15fda43 100644 --- a/include/asm-alpha/thread_info.h +++ b/include/asm-alpha/thread_info.h @@ -50,10 +50,8 @@ register struct thread_info *__current_thread_info __asm__("$8"); #define current_thread_info() __current_thread_info /* Thread information allocation. */ +#define THREAD_SIZE_ORDER 1 #define THREAD_SIZE (2*PAGE_SIZE) -#define alloc_thread_info(tsk) \ - ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) #endif /* __ASSEMBLY__ */ diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h index f5a6647..d4be2d6 100644 --- a/include/asm-arm/thread_info.h +++ b/include/asm-arm/thread_info.h @@ -97,19 +97,6 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); } -/* thread information allocation */ -#ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, \ - THREAD_SIZE_ORDER)) -#else -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER)) -#endif - -#define free_thread_info(info) \ - free_pages((unsigned long)info, THREAD_SIZE_ORDER); - #define thread_saved_pc(tsk) \ ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc))) #define thread_saved_fp(tsk) \ diff --git a/include/asm-avr32/thread_info.h b/include/asm-avr32/thread_info.h index df68631..294b25f 100644 --- a/include/asm-avr32/thread_info.h +++ b/include/asm-avr32/thread_info.h @@ -61,10 +61,6 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)addr; } -/* thread information allocation */ -#define alloc_thread_info(ti) \ - ((struct thread_info *) __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER)) -#define free_thread_info(ti) free_pages((unsigned long)(ti), 1) #define get_thread_info(ti) get_task_struct((ti)->task) #define put_thread_info(ti) put_task_struct((ti)->task) diff --git a/include/asm-blackfin/thread_info.h b/include/asm-blackfin/thread_info.h index bc2fe5a..6427693 100644 --- a/include/asm-blackfin/thread_info.h +++ b/include/asm-blackfin/thread_info.h @@ -42,6 +42,7 @@ /* * Size of kernel stack for each process. This must be a power of 2... */ +#define THREAD_SIZE_ORDER 1 #define THREAD_SIZE 8192 /* 2 pages */ #ifndef __ASSEMBLY__ @@ -94,10 +95,6 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)((long)ti & ~((long)THREAD_SIZE-1)); } -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL, 1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) #endif /* __ASSEMBLY__ */ /* diff --git a/include/asm-cris/thread_info.h b/include/asm-cris/thread_info.h index 784668a..7efe100 100644 --- a/include/asm-cris/thread_info.h +++ b/include/asm-cris/thread_info.h @@ -11,6 +11,8 @@ #ifdef __KERNEL__ +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + #ifndef __ASSEMBLY__ #include #include diff --git a/include/asm-frv/thread_info.h b/include/asm-frv/thread_info.h index 348b8f1..b7ac6bf 100644 --- a/include/asm-frv/thread_info.h +++ b/include/asm-frv/thread_info.h @@ -82,6 +82,8 @@ register struct thread_info *__current_thread_info asm("gr15"); #define current_thread_info() ({ __current_thread_info; }) +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ diff --git a/include/asm-h8300/thread_info.h b/include/asm-h8300/thread_info.h index 27bb95e..aafd4d3 100644 --- a/include/asm-h8300/thread_info.h +++ b/include/asm-h8300/thread_info.h @@ -49,6 +49,7 @@ struct thread_info { /* * Size of kernel stack for each process. This must be a power of 2... */ +#define THREAD_SIZE_ORDER 1 #define THREAD_SIZE 8192 /* 2 pages */ @@ -65,10 +66,6 @@ static inline struct thread_info *current_thread_info(void) return ti; } -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL, 1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) #endif /* __ASSEMBLY__ */ /* diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h index 2422ac6..7c60fcd 100644 --- a/include/asm-ia64/thread_info.h +++ b/include/asm-ia64/thread_info.h @@ -54,6 +54,8 @@ struct thread_info { }, \ } +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + #ifndef ASM_OFFSETS_C /* how to get the thread information struct from C */ #define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) diff --git a/include/asm-m32r/thread_info.h b/include/asm-m32r/thread_info.h index 1effcd0..8589d46 100644 --- a/include/asm-m32r/thread_info.h +++ b/include/asm-m32r/thread_info.h @@ -94,6 +94,8 @@ static inline struct thread_info *current_thread_info(void) return ti; } +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ diff --git a/include/asm-m68k/thread_info.h b/include/asm-m68k/thread_info.h index d635a37..abc0027 100644 --- a/include/asm-m68k/thread_info.h +++ b/include/asm-m68k/thread_info.h @@ -25,13 +25,7 @@ struct thread_info { } /* THREAD_SIZE should be 8k, so handle differently for 4k and 8k machines */ -#if PAGE_SHIFT == 13 /* 8k machines */ -#define alloc_thread_info(tsk) ((struct thread_info *)__get_free_pages(GFP_KERNEL,0)) -#define free_thread_info(ti) free_pages((unsigned long)(ti),0) -#else /* otherwise assume 4k pages */ -#define alloc_thread_info(tsk) ((struct thread_info *)__get_free_pages(GFP_KERNEL,1)) -#define free_thread_info(ti) free_pages((unsigned long)(ti),1) -#endif /* PAGE_SHIFT == 13 */ +#define THREAD_SIZE_ORDER (13 - PAGE_SHIFT) #define init_thread_info (init_task.thread.info) #define init_stack (init_thread_union.stack) diff --git a/include/asm-m68knommu/thread_info.h b/include/asm-m68knommu/thread_info.h index 95996d9..0c9bc09 100644 --- a/include/asm-m68knommu/thread_info.h +++ b/include/asm-m68knommu/thread_info.h @@ -71,10 +71,6 @@ static inline struct thread_info *current_thread_info(void) return ti; } -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_SIZE_ORDER) #endif /* __ASSEMBLY__ */ #define PREEMPT_ACTIVE 0x4000000 diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index b2772df..bb30606 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -82,6 +82,8 @@ register struct thread_info *__current_thread_info __asm__("$28"); #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) #define THREAD_MASK (THREAD_SIZE - 1UL) +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ ({ \ diff --git a/include/asm-mn10300/thread_info.h b/include/asm-mn10300/thread_info.h index e397e71..78a3881 100644 --- a/include/asm-mn10300/thread_info.h +++ b/include/asm-mn10300/thread_info.h @@ -112,6 +112,8 @@ static inline unsigned long current_stack_pointer(void) return sp; } +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) kzalloc(THREAD_SIZE, GFP_KERNEL) diff --git a/include/asm-parisc/thread_info.h b/include/asm-parisc/thread_info.h index 2d9c750..9f81274 100644 --- a/include/asm-parisc/thread_info.h +++ b/include/asm-parisc/thread_info.h @@ -34,15 +34,11 @@ struct thread_info { /* thread information allocation */ -#define THREAD_ORDER 2 +#define THREAD_SIZE_ORDER 2 /* Be sure to hunt all references to this down when you change the size of * the kernel stack */ -#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) -#define THREAD_SHIFT (PAGE_SHIFT + THREAD_ORDER) - -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL, THREAD_ORDER)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_ORDER) +#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) +#define THREAD_SHIFT (PAGE_SHIFT + THREAD_SIZE_ORDER) /* how to get the thread information struct from C */ #define current_thread_info() ((struct thread_info *)mfctl(30)) diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index b705c2a..a9db562 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -66,20 +66,12 @@ struct thread_info { #if THREAD_SHIFT >= PAGE_SHIFT -#define THREAD_ORDER (THREAD_SHIFT - PAGE_SHIFT) - -#ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL | \ - __GFP_ZERO, THREAD_ORDER)) -#else -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL, THREAD_ORDER)) -#endif -#define free_thread_info(ti) free_pages((unsigned long)ti, THREAD_ORDER) +#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) #else /* THREAD_SHIFT < PAGE_SHIFT */ +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + extern struct thread_info *alloc_thread_info(struct task_struct *tsk); extern void free_thread_info(struct thread_info *ti); diff --git a/include/asm-s390/thread_info.h b/include/asm-s390/thread_info.h index 99bbed9..91a8f93 100644 --- a/include/asm-s390/thread_info.h +++ b/include/asm-s390/thread_info.h @@ -78,10 +78,7 @@ static inline struct thread_info *current_thread_info(void) return (struct thread_info *)((*(unsigned long *) __LC_KERNEL_STACK)-THREAD_SIZE); } -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) \ - __get_free_pages(GFP_KERNEL,THREAD_ORDER)) -#define free_thread_info(ti) free_pages((unsigned long) (ti),THREAD_ORDER) +#define THREAD_SIZE_ORDER THREAD_ORDER #endif diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index c50e5d3..5131e39 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -92,6 +92,8 @@ static inline struct thread_info *current_thread_info(void) return ti; } +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + /* thread information allocation */ #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) diff --git a/include/asm-sparc/thread_info_32.h b/include/asm-sparc/thread_info_32.h index 91b9f58..2cf9db0 100644 --- a/include/asm-sparc/thread_info_32.h +++ b/include/asm-sparc/thread_info_32.h @@ -86,6 +86,8 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define THREAD_INFO_ORDER 1 #endif +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) #define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() diff --git a/include/asm-sparc/thread_info_64.h b/include/asm-sparc/thread_info_64.h index c6d2e6c..960969d 100644 --- a/include/asm-sparc/thread_info_64.h +++ b/include/asm-sparc/thread_info_64.h @@ -155,6 +155,8 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define __THREAD_INFO_ORDER 0 #endif /* PAGE_SHIFT == 13 */ +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + #ifdef CONFIG_DEBUG_STACK_USAGE #define alloc_thread_info(tsk) \ ({ \ diff --git a/include/asm-um/thread_info.h b/include/asm-um/thread_info.h index 356b83e..e07e728 100644 --- a/include/asm-um/thread_info.h +++ b/include/asm-um/thread_info.h @@ -53,21 +53,7 @@ static inline struct thread_info *current_thread_info(void) return ti; } -#ifdef CONFIG_DEBUG_STACK_USAGE - -#define alloc_thread_info(tsk) \ - ((struct thread_info *) __get_free_pages(GFP_KERNEL | __GFP_ZERO, \ - CONFIG_KERNEL_STACK_ORDER)) -#else - -/* thread information allocation */ -#define alloc_thread_info(tsk) \ - ((struct thread_info *) __get_free_pages(GFP_KERNEL, \ - CONFIG_KERNEL_STACK_ORDER)) -#endif - -#define free_thread_info(ti) \ - free_pages((unsigned long)(ti),CONFIG_KERNEL_STACK_ORDER) +#define THREAD_SIZE_ORDER CONFIG_KERNEL_STACK_ORDER #endif diff --git a/include/asm-x86/thread_info.h b/include/asm-x86/thread_info.h index 3f2de10..da0a675 100644 --- a/include/asm-x86/thread_info.h +++ b/include/asm-x86/thread_info.h @@ -152,6 +152,8 @@ struct thread_info { #define THREAD_FLAGS GFP_KERNEL #endif +#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR + #define alloc_thread_info(tsk) \ ((struct thread_info *)__get_free_pages(THREAD_FLAGS, THREAD_ORDER)) diff --git a/include/asm-xtensa/thread_info.h b/include/asm-xtensa/thread_info.h index a2c6406..7e4131d 100644 --- a/include/asm-xtensa/thread_info.h +++ b/include/asm-xtensa/thread_info.h @@ -111,10 +111,6 @@ static inline struct thread_info *current_thread_info(void) return ti; } -/* thread information allocation */ -#define alloc_thread_info(tsk) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1)) -#define free_thread_info(ti) free_pages((unsigned long) (ti), 1) - #else /* !__ASSEMBLY__ */ /* how to get the thread information struct from ASM */ @@ -160,6 +156,7 @@ static inline struct thread_info *current_thread_info(void) #define TS_USEDFPU 0x0001 /* FPU was used by this task this quantum (SMP) */ #define THREAD_SIZE 8192 //(2*PAGE_SIZE) +#define THREAD_SIZE_ORDER 1 #endif /* __KERNEL__ */ #endif /* _XTENSA_THREAD_INFO */ -- cgit v1.1 From 4500d067eeb3d00679335d9cf5c6536e79cd3ef4 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Fri, 25 Jul 2008 01:45:49 -0700 Subject: init.h: remove obsolete content Remove apparently obsolete content from init.h referring to gcc 2.9x and to "no_module_init". Signed-off-by: Robert P. J. Day Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/init.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'include') diff --git a/include/linux/init.h b/include/linux/init.h index 21d658c..42ae954 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -275,13 +275,7 @@ void __init parse_early_param(void); #define security_initcall(fn) module_init(fn) -/* These macros create a dummy inline: gcc 2.9x does not count alias - as usage, hence the `unused function' warning when __init functions - are declared static. We use the dummy __*_module_inline functions - both to kill the warning and check the type of the init/cleanup - function. */ - -/* Each module must use one module_init(), or one no_module_init */ +/* Each module must use one module_init(). */ #define module_init(initfn) \ static inline initcall_t __inittest(void) \ { return initfn; } \ -- cgit v1.1 From b6c63937001889af6fe431aaba97e59d04e028e7 Mon Sep 17 00:00:00 2001 From: Arjan van de Ven Date: Fri, 25 Jul 2008 01:45:52 -0700 Subject: Rename WARN() to WARNING() to clear the namespace We want to use WARN() as a variant of WARN_ON(), however a few drivers are using WARN() internally. This patch renames these to WARNING() to avoid the namespace clash. A few cases were defining but not using the thing, for those cases I just deleted the definition. Signed-off-by: Arjan van de Ven Acked-by: Greg KH Cc: Karsten Keil Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/usb/composite.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/usb/composite.h b/include/linux/usb/composite.h index 747c3a4..c932390 100644 --- a/include/linux/usb/composite.h +++ b/include/linux/usb/composite.h @@ -330,7 +330,7 @@ extern int usb_string_id(struct usb_composite_dev *c); dev_vdbg(&(d)->gadget->dev , fmt , ## args) #define ERROR(d, fmt, args...) \ dev_err(&(d)->gadget->dev , fmt , ## args) -#define WARN(d, fmt, args...) \ +#define WARNING(d, fmt, args...) \ dev_warn(&(d)->gadget->dev , fmt , ## args) #define INFO(d, fmt, args...) \ dev_info(&(d)->gadget->dev , fmt , ## args) -- cgit v1.1 From a8f18b909c0a3f22630846207035c8b84bb252b8 Mon Sep 17 00:00:00 2001 From: Arjan van de Ven Date: Fri, 25 Jul 2008 01:45:53 -0700 Subject: Add a WARN() macro; this is WARN_ON() + printk arguments Add a WARN() macro that acts like WARN_ON(), with the added feature that it takes a printk like argument that is printed as part of the warning message. [akpm@linux-foundation.org: fix printk arguments] [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Arjan van de Ven Cc: Greg KH Cc: Jiri Slaby Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/bug.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'include') diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index 2632328..a346e74 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -34,9 +34,14 @@ struct bug_entry { #ifndef __WARN #ifndef __ASSEMBLY__ extern void warn_on_slowpath(const char *file, const int line); +extern void warn_slowpath(const char *file, const int line, + const char *fmt, ...) __attribute__((format(printf, 3, 4))); #define WANT_WARN_ON_SLOWPATH #endif #define __WARN() warn_on_slowpath(__FILE__, __LINE__) +#define __WARN_printf(arg...) warn_slowpath(__FILE__, __LINE__, arg) +#else +#define __WARN_printf(arg...) __WARN() #endif #ifndef WARN_ON @@ -48,6 +53,15 @@ extern void warn_on_slowpath(const char *file, const int line); }) #endif +#ifndef WARN +#define WARN(condition, format...) ({ \ + int __ret_warn_on = !!(condition); \ + if (unlikely(__ret_warn_on)) \ + __WARN_printf(format); \ + unlikely(__ret_warn_on); \ +}) +#endif + #else /* !CONFIG_BUG */ #ifndef HAVE_ARCH_BUG #define BUG() @@ -63,6 +77,14 @@ extern void warn_on_slowpath(const char *file, const int line); unlikely(__ret_warn_on); \ }) #endif + +#ifndef WARN +#define WARN(condition, format...) ({ \ + int __ret_warn_on = !!(condition); \ + unlikely(__ret_warn_on); \ +}) +#endif + #endif #define WARN_ON_ONCE(condition) ({ \ -- cgit v1.1 From 2711b793eb62a5873a0ba583a69252040aef176e Mon Sep 17 00:00:00 2001 From: Vegard Nossum Date: Fri, 25 Jul 2008 01:45:56 -0700 Subject: kallsyms: unify 32- and 64-bit code Use the %p format string which already accounts for the padding you need with a pointer type on a particular architecture. Also replace the macro with a static inline function to match the rest of the file. Cc: Heiko Carstens Cc: Arjan van de Ven Signed-off-by: Vegard Nossum Cc: Sam Ravnborg Cc: Randy Dunlap Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kallsyms.h | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h index 00c1801..57aefa1 100644 --- a/include/linux/kallsyms.h +++ b/include/linux/kallsyms.h @@ -6,6 +6,7 @@ #define _LINUX_KALLSYMS_H #include +#include #include #define KSYM_NAME_LEN 128 @@ -105,18 +106,10 @@ static inline void print_fn_descriptor_symbol(const char *fmt, void *addr) print_symbol(fmt, (unsigned long)addr); } -#ifndef CONFIG_64BIT -#define print_ip_sym(ip) \ -do { \ - printk("[<%08lx>]", ip); \ - print_symbol(" %s\n", ip); \ -} while(0) -#else -#define print_ip_sym(ip) \ -do { \ - printk("[<%016lx>]", ip); \ - print_symbol(" %s\n", ip); \ -} while(0) -#endif +static inline void print_ip_sym(unsigned long ip) +{ + printk("[<%p>]", (void *) ip); + print_symbol(" %s\n", ip); +} #endif /*_LINUX_KALLSYMS_H*/ -- cgit v1.1 From 717115e1a5856b57af0f71e1df7149108294fc10 Mon Sep 17 00:00:00 2001 From: Dave Young Date: Fri, 25 Jul 2008 01:45:58 -0700 Subject: printk ratelimiting rewrite All ratelimit user use same jiffies and burst params, so some messages (callbacks) will be lost. For example: a call printk_ratelimit(5 * HZ, 1) b call printk_ratelimit(5 * HZ, 1) before the 5*HZ timeout of a, then b will will be supressed. - rewrite __ratelimit, and use a ratelimit_state as parameter. Thanks for hints from andrew. - Add WARN_ON_RATELIMIT, update rcupreempt.h - remove __printk_ratelimit - use __ratelimit in net_ratelimit Signed-off-by: Dave Young Cc: "David S. Miller" Cc: "Paul E. McKenney" Cc: Dave Young Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/bug.h | 3 +++ include/linux/kernel.h | 8 ++------ include/linux/net.h | 3 +-- include/linux/ratelimit.h | 27 +++++++++++++++++++++++++++ include/linux/rcupreempt.h | 9 +++++++-- 5 files changed, 40 insertions(+), 10 deletions(-) create mode 100644 include/linux/ratelimit.h (limited to 'include') diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h index a346e74..a3f738c 100644 --- a/include/asm-generic/bug.h +++ b/include/asm-generic/bug.h @@ -97,6 +97,9 @@ extern void warn_slowpath(const char *file, const int line, unlikely(__ret_warn_once); \ }) +#define WARN_ON_RATELIMIT(condition, state) \ + WARN_ON((condition) && __ratelimit(state)) + #ifdef CONFIG_SMP # define WARN_ON_SMP(x) WARN_ON(x) #else diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 5c4b125..fdbbf72 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -189,11 +190,8 @@ asmlinkage int vprintk(const char *fmt, va_list args) asmlinkage int printk(const char * fmt, ...) __attribute__ ((format (printf, 1, 2))) __cold; -extern int printk_ratelimit_jiffies; -extern int printk_ratelimit_burst; +extern struct ratelimit_state printk_ratelimit_state; extern int printk_ratelimit(void); -extern int __ratelimit(int ratelimit_jiffies, int ratelimit_burst); -extern int __printk_ratelimit(int ratelimit_jiffies, int ratelimit_burst); extern bool printk_timed_ratelimit(unsigned long *caller_jiffies, unsigned int interval_msec); #else @@ -204,8 +202,6 @@ static inline int printk(const char *s, ...) __attribute__ ((format (printf, 1, 2))); static inline int __cold printk(const char *s, ...) { return 0; } static inline int printk_ratelimit(void) { return 0; } -static inline int __printk_ratelimit(int ratelimit_jiffies, \ - int ratelimit_burst) { return 0; } static inline bool printk_timed_ratelimit(unsigned long *caller_jiffies, \ unsigned int interval_msec) \ { return false; } diff --git a/include/linux/net.h b/include/linux/net.h index 2f999fb..4a9a30f 100644 --- a/include/linux/net.h +++ b/include/linux/net.h @@ -351,8 +351,7 @@ static const struct proto_ops name##_ops = { \ #ifdef CONFIG_SYSCTL #include -extern int net_msg_cost; -extern int net_msg_burst; +extern struct ratelimit_state net_ratelimit_state; #endif #endif /* __KERNEL__ */ diff --git a/include/linux/ratelimit.h b/include/linux/ratelimit.h new file mode 100644 index 0000000..18a5b9b --- /dev/null +++ b/include/linux/ratelimit.h @@ -0,0 +1,27 @@ +#ifndef _LINUX_RATELIMIT_H +#define _LINUX_RATELIMIT_H +#include + +#define DEFAULT_RATELIMIT_INTERVAL (5 * HZ) +#define DEFAULT_RATELIMIT_BURST 10 + +struct ratelimit_state { + int interval; + int burst; + int printed; + int missed; + unsigned long begin; +}; + +#define DEFINE_RATELIMIT_STATE(name, interval, burst) \ + struct ratelimit_state name = {interval, burst,} + +extern int __ratelimit(struct ratelimit_state *rs); + +static inline int ratelimit(void) +{ + static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, + DEFAULT_RATELIMIT_BURST); + return __ratelimit(&rs); +} +#endif diff --git a/include/linux/rcupreempt.h b/include/linux/rcupreempt.h index f04b64e..0967f03 100644 --- a/include/linux/rcupreempt.h +++ b/include/linux/rcupreempt.h @@ -115,16 +115,21 @@ DECLARE_PER_CPU(struct rcu_dyntick_sched, rcu_dyntick_sched); static inline void rcu_enter_nohz(void) { + static DEFINE_RATELIMIT_STATE(rs, 10 * HZ, 1); + smp_mb(); /* CPUs seeing ++ must see prior RCU read-side crit sects */ __get_cpu_var(rcu_dyntick_sched).dynticks++; - WARN_ON(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1); + WARN_ON_RATELIMIT(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1, &rs); } static inline void rcu_exit_nohz(void) { + static DEFINE_RATELIMIT_STATE(rs, 10 * HZ, 1); + smp_mb(); /* CPUs seeing ++ must see later RCU read-side crit sects */ __get_cpu_var(rcu_dyntick_sched).dynticks++; - WARN_ON(!(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1)); + WARN_ON_RATELIMIT(!(__get_cpu_var(rcu_dyntick_sched).dynticks & 0x1), + &rs); } #else /* CONFIG_NO_HZ */ -- cgit v1.1 From 472dba7d117844c746be97db6be26c2810d79b62 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 25 Jul 2008 01:45:58 -0700 Subject: sm501: add power control callback Add callback to get or set the power control if the device has the sleep connected to some form of GPIO. Signed-off-by: Ben Dooks Cc: Arnaud Patard Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sm501.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/linux/sm501.h b/include/linux/sm501.h index b530fa6..145405b 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -157,6 +157,8 @@ struct sm501_init_gpio { struct sm501_reg_init gpio_ddr_high; }; +#define SM501_FLAG_SUSPEND_OFF (1<<4) + /* sm501_platdata * * This is passed with the platform device to allow the board @@ -170,6 +172,11 @@ struct sm501_platdata { struct sm501_init_gpio *init_gpiop; struct sm501_platdata_fb *fb; + int flags; + + int (*get_power)(struct device *dev); + int (*set_power)(struct device *dev, unsigned int on); + struct sm501_platdata_gpio_i2c *gpio_i2c; unsigned int gpio_i2c_nr; }; -- cgit v1.1 From f61be273d3699d174bc1438e6804f9f9e52bb932 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 25 Jul 2008 01:45:59 -0700 Subject: sm501: add gpiolib support Add support for exporting the GPIOs on the SM501 via gpiolib. Signed-off-by: Ben Dooks Cc: Arnaud Patard Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sm501.h | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/include/linux/sm501.h b/include/linux/sm501.h index 145405b..6ea3900 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -46,24 +46,6 @@ extern unsigned long sm501_modify_reg(struct device *dev, unsigned long set, unsigned long clear); -/* sm501_gpio_set - * - * set the state of the given GPIO line -*/ - -extern void sm501_gpio_set(struct device *dev, - unsigned long gpio, - unsigned int to, - unsigned int dir); - -/* sm501_gpio_get - * - * get the state of the given GPIO line -*/ - -extern unsigned long sm501_gpio_get(struct device *dev, - unsigned long gpio); - /* Platform data definitions */ @@ -131,6 +113,7 @@ struct sm501_reg_init { #define SM501_USE_FBACCEL (1<<6) #define SM501_USE_AC97 (1<<7) #define SM501_USE_I2S (1<<8) +#define SM501_USE_GPIO (1<<9) #define SM501_USE_ALL (0xffffffff) @@ -173,6 +156,7 @@ struct sm501_platdata { struct sm501_platdata_fb *fb; int flags; + unsigned gpio_base; int (*get_power)(struct device *dev); int (*set_power)(struct device *dev, unsigned int on); -- cgit v1.1 From 60e540d617b40eb3d37f1dd99c97af588ff9b70b Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Fri, 25 Jul 2008 01:46:00 -0700 Subject: sm501: gpio dynamic registration for PCI devices The SM501 PCI card requires a dyanmic gpio allocation as the number of cards is not known at compile time. Fixup the platform data and registration to deal with this. Acked-by: Ben Dooks Signed-off-by: Arnaud Patard Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sm501.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sm501.h b/include/linux/sm501.h index 6ea3900..a8d02f36 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -156,7 +156,7 @@ struct sm501_platdata { struct sm501_platdata_fb *fb; int flags; - unsigned gpio_base; + int gpio_base; int (*get_power)(struct device *dev); int (*set_power)(struct device *dev, unsigned int on); -- cgit v1.1 From 42cd2366fb9b58cdfc1855be32b31a78e40b2079 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 25 Jul 2008 01:46:01 -0700 Subject: sm501: gpio I2C support Add support for adding the GPIO based I2C resources. Signed-off-by: Ben Dooks Cc: Arnaud Patard Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sm501.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sm501.h b/include/linux/sm501.h index a8d02f36..214f932 100644 --- a/include/linux/sm501.h +++ b/include/linux/sm501.h @@ -86,11 +86,19 @@ struct sm501_platdata_fb { struct sm501_platdata_fbsub *fb_pnl; }; -/* gpio i2c */ +/* gpio i2c + * + * Note, we have to pass in the bus number, as the number used will be + * passed to the i2c-gpio driver's platform_device.id, subsequently used + * to register the i2c bus. +*/ struct sm501_platdata_gpio_i2c { + unsigned int bus_num; unsigned int pin_sda; unsigned int pin_scl; + int udelay; + int timeout; }; /* sm501_initdata -- cgit v1.1 From ef53d9c5e4da147ecaa43c44c5e5945eb83970a2 Mon Sep 17 00:00:00 2001 From: Srinivasa D S Date: Fri, 25 Jul 2008 01:46:04 -0700 Subject: kprobes: improve kretprobe scalability with hashed locking Currently list of kretprobe instances are stored in kretprobe object (as used_instances,free_instances) and in kretprobe hash table. We have one global kretprobe lock to serialise the access to these lists. This causes only one kretprobe handler to execute at a time. Hence affects system performance, particularly on SMP systems and when return probe is set on lot of functions (like on all systemcalls). Solution proposed here gives fine-grain locks that performs better on SMP system compared to present kretprobe implementation. Solution: 1) Instead of having one global lock to protect kretprobe instances present in kretprobe object and kretprobe hash table. We will have two locks, one lock for protecting kretprobe hash table and another lock for kretporbe object. 2) We hold lock present in kretprobe object while we modify kretprobe instance in kretprobe object and we hold per-hash-list lock while modifying kretprobe instances present in that hash list. To prevent deadlock, we never grab a per-hash-list lock while holding a kretprobe lock. 3) We can remove used_instances from struct kretprobe, as we can track used instances of kretprobe instances using kretprobe hash table. Time duration for kernel compilation ("make -j 8") on a 8-way ppc64 system with return probes set on all systemcalls looks like this. cacheline non-cacheline Un-patched kernel aligned patch aligned patch =============================================================================== real 9m46.784s 9m54.412s 10m2.450s user 40m5.715s 40m7.142s 40m4.273s sys 2m57.754s 2m58.583s 3m17.430s =========================================================== Time duration for kernel compilation ("make -j 8) on the same system, when kernel is not probed. ========================= real 9m26.389s user 40m8.775s sys 2m7.283s ========================= Signed-off-by: Srinivasa DS Signed-off-by: Jim Keniston Acked-by: Ananth N Mavinakayanahalli Cc: Anil S Keshavamurthy Cc: David S. Miller Cc: Masami Hiramatsu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kprobes.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/kprobes.h b/include/linux/kprobes.h index 04a3556..0be7795 100644 --- a/include/linux/kprobes.h +++ b/include/linux/kprobes.h @@ -157,11 +157,10 @@ struct kretprobe { int nmissed; size_t data_size; struct hlist_head free_instances; - struct hlist_head used_instances; + spinlock_t lock; }; struct kretprobe_instance { - struct hlist_node uflist; /* either on free list or used list */ struct hlist_node hlist; struct kretprobe *rp; kprobe_opcode_t *ret_addr; @@ -201,7 +200,6 @@ static inline int init_test_probes(void) } #endif /* CONFIG_KPROBES_SANITY_TEST */ -extern spinlock_t kretprobe_lock; extern struct mutex kprobe_mutex; extern int arch_prepare_kprobe(struct kprobe *p); extern void arch_arm_kprobe(struct kprobe *p); @@ -214,6 +212,9 @@ extern void kprobes_inc_nmissed_count(struct kprobe *p); /* Get the kprobe at this addr (if any) - called with preemption disabled */ struct kprobe *get_kprobe(void *addr); +void kretprobe_hash_lock(struct task_struct *tsk, + struct hlist_head **head, unsigned long *flags); +void kretprobe_hash_unlock(struct task_struct *tsk, unsigned long *flags); struct hlist_head * kretprobe_inst_table_head(struct task_struct *tsk); /* kprobe_running() will just return the current_kprobe on this CPU */ -- cgit v1.1 From d8f388d8dc8d4f36539dd37c1fff62cc404ea0fc Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 25 Jul 2008 01:46:07 -0700 Subject: gpio: sysfs interface This adds a simple sysfs interface for GPIOs. /sys/class/gpio /export ... asks the kernel to export a GPIO to userspace /unexport ... to return a GPIO to the kernel /gpioN ... for each exported GPIO #N /value ... always readable, writes fail for input GPIOs /direction ... r/w as: in, out (default low); write high, low /gpiochipN ... for each gpiochip; #N is its first GPIO /base ... (r/o) same as N /label ... (r/o) descriptive, not necessarily unique /ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1) GPIOs claimed by kernel code may be exported by its owner using a new gpio_export() call, which should be most useful for driver debugging. Such exports may optionally be done without a "direction" attribute. Userspace may ask to take over a GPIO by writing to a sysfs control file, helping to cope with incomplete board support or other "one-off" requirements that don't merit full kernel support: echo 23 > /sys/class/gpio/export ... will gpio_request(23, "sysfs") and gpio_export(23); use /sys/class/gpio/gpio-23/direction to (re)configure it, when that GPIO can be used as both input and output. echo 23 > /sys/class/gpio/unexport ... will gpio_free(23), when it was exported as above The extra D-space footprint is a few hundred bytes, except for the sysfs resources associated with each exported GPIO. The additional I-space footprint is about two thirds of the current size of gpiolib (!). Since no /dev node creation is involved, no "udev" support is needed. Related changes: * This adds a device pointer to "struct gpio_chip". When GPIO providers initialize that, sysfs gpio class devices become children of that device instead of being "virtual" devices. * The (few) gpio_chip providers which have such a device node have been updated. * Some gpio_chip drivers also needed to update their module "owner" field ... for which missing kerneldoc was added. * Some gpio_chips don't support input GPIOs. Those GPIOs are now flagged appropriately when the chip is registered. Based on previous patches, and discussion both on and off LKML. A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this merges to mainline. [akpm@linux-foundation.org: a few maintenance build fixes] Signed-off-by: David Brownell Cc: Guennadi Liakhovetski Cc: Greg KH Cc: Kay Sievers Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/gpio.h | 33 +++++++++++++++++++++++++++++++-- include/linux/gpio.h | 13 +++++++++++++ 2 files changed, 44 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 6be061d..1beff51 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -32,6 +32,8 @@ struct module; /** * struct gpio_chip - abstract a GPIO controller * @label: for diagnostics + * @dev: optional device providing the GPIOs + * @owner: helps prevent removal of modules exporting active GPIOs * @direction_input: configures signal "offset" as input, or returns error * @get: returns value for signal "offset"; for output signals this * returns either the value actually sensed, or zero @@ -59,6 +61,7 @@ struct module; */ struct gpio_chip { char *label; + struct device *dev; struct module *owner; int (*direction_input)(struct gpio_chip *chip, @@ -74,6 +77,7 @@ struct gpio_chip { int base; u16 ngpio; unsigned can_sleep:1; + unsigned exported:1; }; extern const char *gpiochip_is_requested(struct gpio_chip *chip, @@ -108,7 +112,18 @@ extern void __gpio_set_value(unsigned gpio, int value); extern int __gpio_cansleep(unsigned gpio); -#else +#ifdef CONFIG_GPIO_SYSFS + +/* + * A sysfs interface can be exported by individual drivers if they want, + * but more typically is configured entirely from userspace. + */ +extern int gpio_export(unsigned gpio, bool direction_may_change); +extern void gpio_unexport(unsigned gpio); + +#endif /* CONFIG_GPIO_SYSFS */ + +#else /* !CONFIG_HAVE_GPIO_LIB */ static inline int gpio_is_valid(int number) { @@ -137,6 +152,20 @@ static inline void gpio_set_value_cansleep(unsigned gpio, int value) gpio_set_value(gpio, value); } -#endif +#endif /* !CONFIG_HAVE_GPIO_LIB */ + +#ifndef CONFIG_GPIO_SYSFS + +/* sysfs support is only available with gpiolib, where it's optional */ + +static inline int gpio_export(unsigned gpio, bool direction_may_change) +{ + return -ENOSYS; +} + +static inline void gpio_unexport(unsigned gpio) +{ +} +#endif /* CONFIG_GPIO_SYSFS */ #endif /* _ASM_GENERIC_GPIO_H */ diff --git a/include/linux/gpio.h b/include/linux/gpio.h index 98be6c5..730a20b 100644 --- a/include/linux/gpio.h +++ b/include/linux/gpio.h @@ -79,6 +79,19 @@ static inline void gpio_set_value_cansleep(unsigned gpio, int value) WARN_ON(1); } +static inline int gpio_export(unsigned gpio, bool direction_may_change) +{ + /* GPIO can never have been requested or set as {in,out}put */ + WARN_ON(1); + return -EINVAL; +} + +static inline void gpio_unexport(unsigned gpio) +{ + /* GPIO can never have been exported */ + WARN_ON(1); +} + static inline int gpio_to_irq(unsigned gpio) { /* GPIO can never have been requested or set as input */ -- cgit v1.1 From 8f1cc3b10e6ee0c5c7c8ed27f8771c4f252b4862 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Fri, 25 Jul 2008 01:46:09 -0700 Subject: gpio: mcp23s08 handles multiple chips per chipselect Teach the mcp23s08 driver about a curious feature of these chips: up to four of them can share the same chipselect, with the SPI signals wired in parallel, by matching two bits in the first protocol byte against two address lines on the chip. This is handled by three software changes: * Platform data now holds an array of per-chip structs, not just one chip's address and pullup configuration. * Probe() and remove() now use another level of structure, wrapping an instance of the original structure for each mcp23s08 chip sharing that chipselect. * The HAEN bit is set, so that the hardware address bits can no longer be ignored (boot firmware may not have enabled them). The "one struct per chip" preserves the guts of the current code, but platform_data will need minor changes. OLD: /* incorrect "slave" ID may not have mattered */ .slave = 3, .pullups = BIT(3) | BIT(1) | BIT(0), NEW: /* slave address _must_ match chip's wiring */ .chip[3] = { .is_present = true, .pullups = BIT(3) | BIT(1) | BIT(0), }, There's no change in how things _behave_ for spi_device nodes with a single mcp23s08 chip. New multi-chip configurations assign GPIOs in sequence, without holes. The spi_device just resembles a bigger controller, but internally it has multiple gpio_chip instances. Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/spi/mcp23s08.h | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/spi/mcp23s08.h b/include/linux/spi/mcp23s08.h index 835ddf4..22ef107 100644 --- a/include/linux/spi/mcp23s08.h +++ b/include/linux/spi/mcp23s08.h @@ -1,18 +1,25 @@ -/* FIXME driver should be able to handle all four slaves that - * can be hooked up to each chipselect, as well as IRQs... - */ +/* FIXME driver should be able to handle IRQs... */ + +struct mcp23s08_chip_info { + bool is_present; /* true iff populated */ + u8 pullups; /* BIT(x) means enable pullup x */ +}; struct mcp23s08_platform_data { - /* four slaves can share one SPI chipselect */ - u8 slave; + /* Four slaves (numbered 0..3) can share one SPI chipselect, and + * will provide 8..32 GPIOs using 1..4 gpio_chip instances. + */ + struct mcp23s08_chip_info chip[4]; - /* number assigned to the first GPIO */ + /* "base" is the number of the first GPIO. Dynamic assignment is + * not currently supported, and even if there are gaps in chip + * addressing the GPIO numbers are sequential .. so for example + * if only slaves 0 and 3 are present, their GPIOs range from + * base to base+15. + */ unsigned base; - /* pins with pullups */ - u8 pullups; - void *context; /* param to setup/teardown */ int (*setup)(struct spi_device *spi, -- cgit v1.1 From 7444a72effa632fcd8edc566f880d96fe213c73b Mon Sep 17 00:00:00 2001 From: Michael Buesch Date: Fri, 25 Jul 2008 01:46:11 -0700 Subject: gpiolib: allow user-selection This patch adds functionality to the gpio-lib subsystem to make it possible to enable the gpio-lib code even if the architecture code didn't request to get it built in. The archtitecture code does still need to implement the gpiolib accessor functions in its asm/gpio.h file. This patch adds the implementations for x86 and PPC. With these changes it is possible to run generic GPIO expansion cards on every architecture that implements the trivial wrapper functions. Support for more architectures can easily be added. Signed-off-by: Michael Buesch Cc: Benjamin Herrenschmidt Cc: Stephen Rothwell Cc: David Brownell Cc: Russell King Cc: Haavard Skinnemoen Cc: Jesper Nilsson Cc: Ralf Baechle Cc: Paul Mackerras Cc: Benjamin Herrenschmidt Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Jean Delvare Cc: Samuel Ortiz Cc: Kumar Gala Cc: Sam Ravnborg Cc: Adrian Bunk Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/gpio.h | 2 +- include/asm-mips/mach-generic/gpio.h | 2 +- include/asm-powerpc/gpio.h | 4 +-- include/asm-x86/gpio.h | 56 ++++++++++++++++++++++++++++++++++++ 4 files changed, 60 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 1beff51..a3034d2 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -3,7 +3,7 @@ #include -#ifdef CONFIG_HAVE_GPIO_LIB +#ifdef CONFIG_GPIOLIB #include diff --git a/include/asm-mips/mach-generic/gpio.h b/include/asm-mips/mach-generic/gpio.h index e6b376b..b4e7020 100644 --- a/include/asm-mips/mach-generic/gpio.h +++ b/include/asm-mips/mach-generic/gpio.h @@ -1,7 +1,7 @@ #ifndef __ASM_MACH_GENERIC_GPIO_H #define __ASM_MACH_GENERIC_GPIO_H -#ifdef CONFIG_HAVE_GPIO_LIB +#ifdef CONFIG_GPIOLIB #define gpio_get_value __gpio_get_value #define gpio_set_value __gpio_set_value #define gpio_cansleep __gpio_cansleep diff --git a/include/asm-powerpc/gpio.h b/include/asm-powerpc/gpio.h index 77ad3a8..ea04632 100644 --- a/include/asm-powerpc/gpio.h +++ b/include/asm-powerpc/gpio.h @@ -17,7 +17,7 @@ #include #include -#ifdef CONFIG_HAVE_GPIO_LIB +#ifdef CONFIG_GPIOLIB /* * We don't (yet) implement inlined/rapid versions for on-chip gpios. @@ -51,6 +51,6 @@ static inline int irq_to_gpio(unsigned int irq) return -EINVAL; } -#endif /* CONFIG_HAVE_GPIO_LIB */ +#endif /* CONFIG_GPIOLIB */ #endif /* __ASM_POWERPC_GPIO_H */ diff --git a/include/asm-x86/gpio.h b/include/asm-x86/gpio.h index ff87fca..116e914 100644 --- a/include/asm-x86/gpio.h +++ b/include/asm-x86/gpio.h @@ -1,6 +1,62 @@ +/* + * Generic GPIO API implementation for x86. + * + * Derived from the generic GPIO API for powerpc: + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + #ifndef _ASM_I386_GPIO_H #define _ASM_I386_GPIO_H +#ifdef CONFIG_X86_RDC321X #include +#else /* CONFIG_X86_RDC321X */ + +#include + +#ifdef CONFIG_GPIOLIB + +/* + * Just call gpiolib. + */ +static inline int gpio_get_value(unsigned int gpio) +{ + return __gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned int gpio, int value) +{ + __gpio_set_value(gpio, value); +} + +static inline int gpio_cansleep(unsigned int gpio) +{ + return __gpio_cansleep(gpio); +} + +/* + * Not implemented, yet. + */ +static inline int gpio_to_irq(unsigned int gpio) +{ + return -ENOSYS; +} + +static inline int irq_to_gpio(unsigned int irq) +{ + return -EINVAL; +} + +#endif /* CONFIG_GPIOLIB */ + +#endif /* CONFIG_X86_RDC321X */ #endif /* _ASM_I386_GPIO_H */ -- cgit v1.1 From bbcd6d543de335bf81e96477f46a60a8bf51039c Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Fri, 25 Jul 2008 01:46:14 -0700 Subject: gpio: max732x driver This adds a driver supporting a family of I2C port expanders from Maxim, which includes the MAX7319 and MAX7320-7327 chips. [dbrownell@users.sourceforge.net: minor fixes] Signed-off-by: Jack Ren Signed-off-by: Eric Miao Acked-by: Jean Delvare Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/i2c/max732x.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/linux/i2c/max732x.h (limited to 'include') diff --git a/include/linux/i2c/max732x.h b/include/linux/i2c/max732x.h new file mode 100644 index 0000000..e103366 --- /dev/null +++ b/include/linux/i2c/max732x.h @@ -0,0 +1,19 @@ +#ifndef __LINUX_I2C_MAX732X_H +#define __LINUX_I2C_MAX732X_H + +/* platform data for the MAX732x 8/16-bit I/O expander driver */ + +struct max732x_platform_data { + /* number of the first GPIO */ + unsigned gpio_base; + + void *context; /* param to setup/teardown */ + + int (*setup)(struct i2c_client *client, + unsigned gpio, unsigned ngpio, + void *context); + int (*teardown)(struct i2c_client *client, + unsigned gpio, unsigned ngpio, + void *context); +}; +#endif /* __LINUX_I2C_MAX732X_H */ -- cgit v1.1 From 50c33a84db4aa5082e3af8d873b22344ae2ebea8 Mon Sep 17 00:00:00 2001 From: Samuel Thibault Date: Fri, 25 Jul 2008 01:46:16 -0700 Subject: ext2: fix typo in Hurd part of include/linux/ext2_fs.h Fix typo in Hurd part of include/linux/ext2_fs.h The ';' here is redundant or can even pose problem. This is actually not used by the Linux kernel, but it is exposed in GNU/Hurd. Signed-off-by: Samuel Thibault Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ext2_fs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/ext2_fs.h b/include/linux/ext2_fs.h index 84cec2a..2efe7b8 100644 --- a/include/linux/ext2_fs.h +++ b/include/linux/ext2_fs.h @@ -284,8 +284,8 @@ struct ext2_inode { #ifdef __hurd__ #define i_translator osd1.hurd1.h_i_translator -#define i_frag osd2.hurd2.h_i_frag; -#define i_fsize osd2.hurd2.h_i_fsize; +#define i_frag osd2.hurd2.h_i_frag +#define i_fsize osd2.hurd2.h_i_fsize #define i_uid_high osd2.hurd2.h_i_uid_high #define i_gid_high osd2.hurd2.h_i_gid_high #define i_author osd2.hurd2.h_i_author -- cgit v1.1 From ae76dd9a6b5bbe5315fb7028e03f68f75b8538f3 Mon Sep 17 00:00:00 2001 From: Duane Griffin Date: Fri, 25 Jul 2008 01:46:23 -0700 Subject: ext3: handle corrupted orphan list at mount If the orphan node list includes valid, untruncatable nodes with nlink > 0 the ext3_orphan_cleanup loop which attempts to delete them will not do so, causing it to loop forever. Fix by checking for such nodes in the ext3_orphan_get function. This patch fixes the second case (image hdb.20000009.softlockup.gz) reported in http://bugzilla.kernel.org/show_bug.cgi?id=10882. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: printk warning fix] Signed-off-by: Duane Griffin Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ext3_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/ext3_fs.h b/include/linux/ext3_fs.h index 36c5403..80171ee 100644 --- a/include/linux/ext3_fs.h +++ b/include/linux/ext3_fs.h @@ -832,6 +832,7 @@ extern void ext3_discard_reservation (struct inode *); extern void ext3_dirty_inode(struct inode *); extern int ext3_change_inode_journal_flag(struct inode *, int); extern int ext3_get_inode_loc(struct inode *, struct ext3_iloc *); +extern int ext3_can_truncate(struct inode *inode); extern void ext3_truncate (struct inode *); extern void ext3_set_inode_flags(struct inode *); extern void ext3_get_inode_flags(struct ext3_inode_info *); -- cgit v1.1 From de0ca06a99c33df8333955642843331ab6b6e7ff Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:46:34 -0700 Subject: coda: remove CODA_FS_OLD_API While fixing CONFIG_ leakages to the userspace kernel headers I ran into CODA_FS_OLD_API. After five years, are there still people using the old API left? Especially considering that you have to choose at compile time which API to support in the kernel (and distributions tend to offer the new API for some time). Jan: "The old API can definitely go. Around the time the new interface went in there were some non-Coda userspace file system implementations that took a while longer to convert to the new API, but by now they all switched to the new interface or in some cases to a FUSE-based solution." Signed-off-by: Adrian Bunk Acked-by: Jan Harkes Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/coda.h | 43 ------------------------------------------- 1 file changed, 43 deletions(-) (limited to 'include') diff --git a/include/linux/coda.h b/include/linux/coda.h index b5cf078..96c8769 100644 --- a/include/linux/coda.h +++ b/include/linux/coda.h @@ -199,28 +199,6 @@ typedef u_int32_t vuid_t; typedef u_int32_t vgid_t; #endif /*_VUID_T_ */ -#ifdef CONFIG_CODA_FS_OLD_API -struct CodaFid { - u_int32_t opaque[3]; -}; - -static __inline__ ino_t coda_f2i(struct CodaFid *fid) -{ - if ( ! fid ) - return 0; - if (fid->opaque[1] == 0xfffffffe || fid->opaque[1] == 0xffffffff) - return ((fid->opaque[0] << 20) | (fid->opaque[2] & 0xfffff)); - else - return (fid->opaque[2] + (fid->opaque[1]<<10) + (fid->opaque[0]<<20)); -} - -struct coda_cred { - vuid_t cr_uid, cr_euid, cr_suid, cr_fsuid; /* Real, efftve, set, fs uid*/ - vgid_t cr_groupid, cr_egid, cr_sgid, cr_fsgid; /* same for groups */ -}; - -#else /* not defined(CONFIG_CODA_FS_OLD_API) */ - struct CodaFid { u_int32_t opaque[4]; }; @@ -228,8 +206,6 @@ struct CodaFid { #define coda_f2i(fid)\ (fid ? (fid->opaque[3] ^ (fid->opaque[2]<<10) ^ (fid->opaque[1]<<20) ^ fid->opaque[0]) : 0) -#endif - #ifndef _VENUS_VATTR_T_ #define _VENUS_VATTR_T_ /* @@ -313,15 +289,7 @@ struct coda_statfs { #define CIOC_KERNEL_VERSION _IOWR('c', 10, size_t) -#if 0 -#define CODA_KERNEL_VERSION 0 /* don't care about kernel version number */ -#define CODA_KERNEL_VERSION 1 /* The old venus 4.6 compatible interface */ -#endif -#ifdef CONFIG_CODA_FS_OLD_API -#define CODA_KERNEL_VERSION 2 /* venus_lookup got an extra parameter */ -#else #define CODA_KERNEL_VERSION 3 /* 128-bit file identifiers */ -#endif /* * Venus <-> Coda RPC arguments @@ -329,16 +297,9 @@ struct coda_statfs { struct coda_in_hdr { u_int32_t opcode; u_int32_t unique; /* Keep multiple outstanding msgs distinct */ -#ifdef CONFIG_CODA_FS_OLD_API - u_int16_t pid; /* Common to all */ - u_int16_t pgid; /* Common to all */ - u_int16_t sid; /* Common to all */ - struct coda_cred cred; /* Common to all */ -#else pid_t pid; pid_t pgid; vuid_t uid; -#endif }; /* Really important that opcode and unique are 1st two fields! */ @@ -613,11 +574,7 @@ struct coda_vget_out { /* CODA_PURGEUSER is a venus->kernel call */ struct coda_purgeuser_out { struct coda_out_hdr oh; -#ifdef CONFIG_CODA_FS_OLD_API - struct coda_cred cred; -#else vuid_t uid; -#endif }; /* coda_zapfile: */ -- cgit v1.1 From f68215c4640a38d66429014e524a627bf572d26a Mon Sep 17 00:00:00 2001 From: Jeff Mahoney Date: Fri, 25 Jul 2008 01:46:38 -0700 Subject: reiserfs: convert j_lock to mutex j_lock is a semaphore but uses it as if it were a mutex. This patch converts it to a mutex. Signed-off-by: Jeff Mahoney Cc: Matthew Wilcox Cc: Chris Mason Cc: Edward Shishkin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/reiserfs_fs_sb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h index 336ee43..49b639b 100644 --- a/include/linux/reiserfs_fs_sb.h +++ b/include/linux/reiserfs_fs_sb.h @@ -193,7 +193,7 @@ struct reiserfs_journal { struct buffer_head *j_header_bh; time_t j_trans_start_time; /* time this transaction started */ - struct semaphore j_lock; + struct mutex j_mutex; struct semaphore j_flush_sem; wait_queue_head_t j_join_wait; /* wait for current transaction to finish before starting new one */ atomic_t j_jlock; /* lock for j_join_wait */ -- cgit v1.1 From afe70259076fff0446001eaa1a287f615241a357 Mon Sep 17 00:00:00 2001 From: Jeff Mahoney Date: Fri, 25 Jul 2008 01:46:39 -0700 Subject: reiserfs: convert j_flush_sem to mutex j_flush_sem is a semaphore but uses it as if it were a mutex. This patch converts it to a mutex. [akpm@linux-foundation.org: fix mutex_trylock retval treatment] Signed-off-by: Jeff Mahoney Cc: Matthew Wilcox Cc: Chris Mason Cc: Edward Shishkin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/reiserfs_fs_sb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h index 49b639b..c075172 100644 --- a/include/linux/reiserfs_fs_sb.h +++ b/include/linux/reiserfs_fs_sb.h @@ -194,7 +194,7 @@ struct reiserfs_journal { time_t j_trans_start_time; /* time this transaction started */ struct mutex j_mutex; - struct semaphore j_flush_sem; + struct mutex j_flush_mutex; wait_queue_head_t j_join_wait; /* wait for current transaction to finish before starting new one */ atomic_t j_jlock; /* lock for j_join_wait */ int j_list_bitmap_index; /* number of next list bitmap to use */ -- cgit v1.1 From 90415deac75a761a25239af6f56381546f8d2201 Mon Sep 17 00:00:00 2001 From: Jeff Mahoney Date: Fri, 25 Jul 2008 01:46:40 -0700 Subject: reiserfs: convert j_commit_lock to mutex j_commit_lock is a semaphore but uses it as if it were a mutex. This patch converts it to a mutex. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Jeff Mahoney Cc: Matthew Wilcox Cc: Chris Mason Cc: Edward Shishkin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/reiserfs_fs_sb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/reiserfs_fs_sb.h b/include/linux/reiserfs_fs_sb.h index c075172..315517e 100644 --- a/include/linux/reiserfs_fs_sb.h +++ b/include/linux/reiserfs_fs_sb.h @@ -152,7 +152,7 @@ struct reiserfs_journal_list { atomic_t j_nonzerolen; atomic_t j_commit_left; atomic_t j_older_commits_done; /* all commits older than this on disk */ - struct semaphore j_commit_lock; + struct mutex j_commit_mutex; unsigned long j_trans_id; time_t j_timestamp; struct reiserfs_list_bitmap *j_list_bitmap; -- cgit v1.1 From 4596c8aaf96e8634ca755c9f34b91420a39bebd4 Mon Sep 17 00:00:00 2001 From: OGAWA Hirofumi Date: Fri, 25 Jul 2008 01:46:42 -0700 Subject: fat: fix VFAT_IOCTL_READDIR_xxx and cleanup for userland "struct dirent" is a kernel type here, but is a **different type** in userspace! This means both the structure and the IOCTL number is wrong! So, this adds new "struct __fat_dirent" to generate correct IOCTL number. And kernel stuff moves to under __KERNEL__. Signed-off-by: OGAWA Hirofumi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/msdos_fs.h | 47 +++++++++++++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h index 81cd36b..5161394 100644 --- a/include/linux/msdos_fs.h +++ b/include/linux/msdos_fs.h @@ -2,11 +2,11 @@ #define _LINUX_MSDOS_FS_H #include +#include /* * The MS-DOS filesystem constants/structures */ -#include #define SECTOR_SIZE 512 /* sector size (bytes) */ #define SECTOR_BITS 9 /* log2(SECTOR_SIZE) */ @@ -89,24 +89,22 @@ #define IS_FSINFO(x) (le32_to_cpu((x)->signature1) == FAT_FSINFO_SIG1 \ && le32_to_cpu((x)->signature2) == FAT_FSINFO_SIG2) +struct __fat_dirent { + long d_ino; + __kernel_off_t d_off; + unsigned short d_reclen; + char d_name[256]; /* We must not include limits.h! */ +}; + /* * ioctl commands */ -#define VFAT_IOCTL_READDIR_BOTH _IOR('r', 1, struct dirent [2]) -#define VFAT_IOCTL_READDIR_SHORT _IOR('r', 2, struct dirent [2]) +#define VFAT_IOCTL_READDIR_BOTH _IOR('r', 1, struct __fat_dirent[2]) +#define VFAT_IOCTL_READDIR_SHORT _IOR('r', 2, struct __fat_dirent[2]) /* has used 0x72 ('r') in collision, so skip a few */ #define FAT_IOCTL_GET_ATTRIBUTES _IOR('r', 0x10, __u32) #define FAT_IOCTL_SET_ATTRIBUTES _IOW('r', 0x11, __u32) -/* - * vfat shortname flags - */ -#define VFAT_SFN_DISPLAY_LOWER 0x0001 /* convert to lowercase for display */ -#define VFAT_SFN_DISPLAY_WIN95 0x0002 /* emulate win95 rule for display */ -#define VFAT_SFN_DISPLAY_WINNT 0x0004 /* emulate winnt rule for display */ -#define VFAT_SFN_CREATE_WIN95 0x0100 /* emulate win95 rule for create */ -#define VFAT_SFN_CREATE_WINNT 0x0200 /* emulate winnt rule for create */ - struct fat_boot_sector { __u8 ignored[3]; /* Boot strap short or near jump */ __u8 system_id[8]; /* Name - can be used to special case @@ -168,14 +166,6 @@ struct msdos_dir_slot { __u8 name11_12[4]; /* last 2 characters in name */ }; -struct fat_slot_info { - loff_t i_pos; /* on-disk position of directory entry */ - loff_t slot_off; /* offset for slot or de start */ - int nr_slots; /* number of slots + 1(de) in filename */ - struct msdos_dir_entry *de; - struct buffer_head *bh; -}; - #ifdef __KERNEL__ #include @@ -184,6 +174,15 @@ struct fat_slot_info { #include #include +/* + * vfat shortname flags + */ +#define VFAT_SFN_DISPLAY_LOWER 0x0001 /* convert to lowercase for display */ +#define VFAT_SFN_DISPLAY_WIN95 0x0002 /* emulate win95 rule for display */ +#define VFAT_SFN_DISPLAY_WINNT 0x0004 /* emulate winnt rule for display */ +#define VFAT_SFN_CREATE_WIN95 0x0100 /* emulate win95 rule for create */ +#define VFAT_SFN_CREATE_WINNT 0x0200 /* emulate winnt rule for create */ + struct fat_mount_options { uid_t fs_uid; gid_t fs_gid; @@ -267,6 +266,14 @@ struct msdos_inode_info { struct inode vfs_inode; }; +struct fat_slot_info { + loff_t i_pos; /* on-disk position of directory entry */ + loff_t slot_off; /* offset for slot or de start */ + int nr_slots; /* number of slots + 1(de) in filename */ + struct msdos_dir_entry *de; + struct buffer_head *bh; +}; + static inline struct msdos_sb_info *MSDOS_SB(struct super_block *sb) { return sb->s_fs_info; -- cgit v1.1 From 7557bc66be629d19a402e752673708bfbb8b5e86 Mon Sep 17 00:00:00 2001 From: Rene Scharfe Date: Fri, 25 Jul 2008 01:46:45 -0700 Subject: msdos fs: remove unsettable atari option It has been impossible to set the option 'atari' of the MSDOS filesystem for several years. Since nobody seems to have missed it, let's remove its remains. Signed-off-by: Rene Scharfe Acked-by: OGAWA Hirofumi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/msdos_fs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h index 5161394..3346c9c 100644 --- a/include/linux/msdos_fs.h +++ b/include/linux/msdos_fs.h @@ -201,7 +201,6 @@ struct fat_mount_options { utf8:1, /* Use of UTF-8 character set (Default) */ unicode_xlate:1, /* create escape sequences for unhandled Unicode */ numtail:1, /* Does first alias have a numeric '~1' type tail? */ - atari:1, /* Use Atari GEMDOS variation of MS-DOS fs */ flush:1, /* write things quickly */ nocase:1, /* Does this need case conversion? 0=need case conversion*/ usefree:1; /* Use free_clusters for FAT32 */ -- cgit v1.1 From cf6ae8b50e0ee3f764392dadd1970e3f03c40773 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:46:46 -0700 Subject: remove the in-kernel struct dirent{,64} The kernel struct dirent{,64} were different from the ones in userspace. Even worse, we exported the kernel ones to userspace. But after the fat usages are fixed we can remove the conflicting kernel versions. Reviewed-by: H. Peter Anvin Signed-off-by: Adrian Bunk Cc: OGAWA Hirofumi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/Kbuild | 1 - include/linux/dirent.h | 20 -------------------- 2 files changed, 21 deletions(-) (limited to 'include') diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 71d70d1..a18008c 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -189,7 +189,6 @@ unifdef-y += connector.h unifdef-y += cuda.h unifdef-y += cyclades.h unifdef-y += dccp.h -unifdef-y += dirent.h unifdef-y += dlm.h unifdef-y += dlm_plock.h unifdef-y += edd.h diff --git a/include/linux/dirent.h b/include/linux/dirent.h index 5d6023b..f072fb8 100644 --- a/include/linux/dirent.h +++ b/include/linux/dirent.h @@ -1,23 +1,6 @@ #ifndef _LINUX_DIRENT_H #define _LINUX_DIRENT_H -struct dirent { - long d_ino; - __kernel_off_t d_off; - unsigned short d_reclen; - char d_name[256]; /* We must not include limits.h! */ -}; - -struct dirent64 { - __u64 d_ino; - __s64 d_off; - unsigned short d_reclen; - unsigned char d_type; - char d_name[256]; -}; - -#ifdef __KERNEL__ - struct linux_dirent64 { u64 d_ino; s64 d_off; @@ -26,7 +9,4 @@ struct linux_dirent64 { char d_name[0]; }; -#endif /* __KERNEL__ */ - - #endif -- cgit v1.1 From e8938a62a85d1f487e02c3b01955b47c9598f6d2 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:46:46 -0700 Subject: remove unused #include 's Remove some unused #include 's. Signed-off-by: Adrian Bunk Cc: Ralf Baechle Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/nfsd/nfsd.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfsd/nfsd.h b/include/linux/nfsd/nfsd.h index a2861d9..108f47e 100644 --- a/include/linux/nfsd/nfsd.h +++ b/include/linux/nfsd/nfsd.h @@ -12,7 +12,6 @@ #include #include -#include #include #include #include -- cgit v1.1 From b271e067c896ad4082b15e96077675d08db40625 Mon Sep 17 00:00:00 2001 From: Joe Peterson Date: Fri, 25 Jul 2008 01:46:47 -0700 Subject: fatfs: add UTC timestamp option Provide a new mount option ("tz=UTC") for DOS (vfat/msdos) filesystems, allowing timestamps to be in coordinated universal time (UTC) rather than local time in applications where doing this is advantageous. In particular, portable devices that use fat/vfat (such as digital cameras) can benefit from using UTC in their internal clocks, thus avoiding daylight saving time errors and general time ambiguity issues. The user of the device does not have to worry about changing the time when moving from place or when daylight saving changes. The new mount option, when set, disables the counter-adjustment that Linux currently makes to FAT timestamp info in anticipation of the normal userspace time zone correction. When used in this new mode, all daylight saving time and time zone handling is done in userspace as is normal for many other filesystems (like ext3). The default mode, which remains unchanged, is still appropriate when mounting volumes written in Windows (because of its use of local time). I originally based this patch on one submitted last year by Paul Collins, but I updated it to work with current source and changed variable/option naming. Ogawa Hirofumi (who maintains these filesystems) and I discussed this patch at length on lkml, and he suggested using the option name in the attached version of the patch. Barry Bouwsma pointed out a good addition to the patch as well. Signed-off-by: Joe Peterson Signed-off-by: Paul Collins Acked-by: OGAWA Hirofumi Cc: Barry Bouwsma Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/msdos_fs.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/msdos_fs.h b/include/linux/msdos_fs.h index 3346c9c..ba63858 100644 --- a/include/linux/msdos_fs.h +++ b/include/linux/msdos_fs.h @@ -203,7 +203,8 @@ struct fat_mount_options { numtail:1, /* Does first alias have a numeric '~1' type tail? */ flush:1, /* write things quickly */ nocase:1, /* Does this need case conversion? 0=need case conversion*/ - usefree:1; /* Use free_clusters for FAT32 */ + usefree:1, /* Use free_clusters for FAT32 */ + tz_utc:1; /* Filesystem timestamps are in UTC */ }; #define FAT_HASH_BITS 8 @@ -434,8 +435,9 @@ extern int fat_flush_inodes(struct super_block *sb, struct inode *i1, extern void fat_fs_panic(struct super_block *s, const char *fmt, ...); extern void fat_clusters_flush(struct super_block *sb); extern int fat_chain_add(struct inode *inode, int new_dclus, int nr_cluster); -extern int date_dos2unix(unsigned short time, unsigned short date); -extern void fat_date_unix2dos(int unix_date, __le16 *time, __le16 *date); +extern int date_dos2unix(unsigned short time, unsigned short date, int tz_utc); +extern void fat_date_unix2dos(int unix_date, __le16 *time, __le16 *date, + int tz_utc); extern int fat_sync_bhs(struct buffer_head **bhs, int nr_bhs); int fat_cache_init(void); -- cgit v1.1 From b85f4b87a511bea86dac68c4f0fabaee2cac6c4c Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Fri, 25 Jul 2008 01:46:50 -0700 Subject: quota: rename quota functions from upper case, make bigger ones non-inline Cleanup quotaops.h: Rename functions from uppercase to lowercase (and define backward compatibility macros), move larger functions to dquot.c and make them non-inline. Signed-off-by: Jan Kara Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/quotaops.h | 226 ++++++++++++++++++++++------------------------- 1 file changed, 107 insertions(+), 119 deletions(-) (limited to 'include') diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index f867020..0c8f9fe 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -19,34 +19,38 @@ /* * declaration of quota_function calls in kernel. */ -extern void sync_dquots(struct super_block *sb, int type); - -extern int dquot_initialize(struct inode *inode, int type); -extern int dquot_drop(struct inode *inode); - -extern int dquot_alloc_space(struct inode *inode, qsize_t number, int prealloc); -extern int dquot_alloc_inode(const struct inode *inode, unsigned long number); - -extern int dquot_free_space(struct inode *inode, qsize_t number); -extern int dquot_free_inode(const struct inode *inode, unsigned long number); - -extern int dquot_transfer(struct inode *inode, struct iattr *iattr); -extern int dquot_commit(struct dquot *dquot); -extern int dquot_acquire(struct dquot *dquot); -extern int dquot_release(struct dquot *dquot); -extern int dquot_commit_info(struct super_block *sb, int type); -extern int dquot_mark_dquot_dirty(struct dquot *dquot); - -extern int vfs_quota_on(struct super_block *sb, int type, int format_id, - char *path, int remount); -extern int vfs_quota_on_mount(struct super_block *sb, char *qf_name, - int format_id, int type); -extern int vfs_quota_off(struct super_block *sb, int type, int remount); -extern int vfs_quota_sync(struct super_block *sb, int type); -extern int vfs_get_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); -extern int vfs_set_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); -extern int vfs_get_dqblk(struct super_block *sb, int type, qid_t id, struct if_dqblk *di); -extern int vfs_set_dqblk(struct super_block *sb, int type, qid_t id, struct if_dqblk *di); +void sync_dquots(struct super_block *sb, int type); + +int dquot_initialize(struct inode *inode, int type); +int dquot_drop(struct inode *inode); + +int dquot_alloc_space(struct inode *inode, qsize_t number, int prealloc); +int dquot_alloc_inode(const struct inode *inode, unsigned long number); + +int dquot_free_space(struct inode *inode, qsize_t number); +int dquot_free_inode(const struct inode *inode, unsigned long number); + +int dquot_transfer(struct inode *inode, struct iattr *iattr); +int dquot_commit(struct dquot *dquot); +int dquot_acquire(struct dquot *dquot); +int dquot_release(struct dquot *dquot); +int dquot_commit_info(struct super_block *sb, int type); +int dquot_mark_dquot_dirty(struct dquot *dquot); + +int vfs_quota_on(struct super_block *sb, int type, int format_id, + char *path, int remount); +int vfs_quota_on_mount(struct super_block *sb, char *qf_name, + int format_id, int type); +int vfs_quota_off(struct super_block *sb, int type, int remount); +int vfs_quota_sync(struct super_block *sb, int type); +int vfs_get_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); +int vfs_set_dqinfo(struct super_block *sb, int type, struct if_dqinfo *ii); +int vfs_get_dqblk(struct super_block *sb, int type, qid_t id, struct if_dqblk *di); +int vfs_set_dqblk(struct super_block *sb, int type, qid_t id, struct if_dqblk *di); + +void vfs_dq_drop(struct inode *inode); +int vfs_dq_transfer(struct inode *inode, struct iattr *iattr); +int vfs_dq_quota_on_remount(struct super_block *sb); /* * Operations supported for diskquotas. @@ -59,38 +63,16 @@ extern struct quotactl_ops vfs_quotactl_ops; /* It is better to call this function outside of any transaction as it might * need a lot of space in journal for dquot structure allocation. */ -static inline void DQUOT_INIT(struct inode *inode) +static inline void vfs_dq_init(struct inode *inode) { BUG_ON(!inode->i_sb); if (sb_any_quota_enabled(inode->i_sb) && !IS_NOQUOTA(inode)) inode->i_sb->dq_op->initialize(inode, -1); } -/* The same as with DQUOT_INIT */ -static inline void DQUOT_DROP(struct inode *inode) -{ - /* Here we can get arbitrary inode from clear_inode() so we have - * to be careful. OTOH we don't need locking as quota operations - * are allowed to change only at mount time */ - if (!IS_NOQUOTA(inode) && inode->i_sb && inode->i_sb->dq_op - && inode->i_sb->dq_op->drop) { - int cnt; - /* Test before calling to rule out calls from proc and such - * where we are not allowed to block. Note that this is - * actually reliable test even without the lock - the caller - * must assure that nobody can come after the DQUOT_DROP and - * add quota pointers back anyway */ - for (cnt = 0; cnt < MAXQUOTAS; cnt++) - if (inode->i_dquot[cnt] != NODQUOT) - break; - if (cnt < MAXQUOTAS) - inode->i_sb->dq_op->drop(inode); - } -} - /* The following allocation/freeing/transfer functions *must* be called inside * a transaction (deadlocks possible otherwise) */ -static inline int DQUOT_PREALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_space_nodirty(struct inode *inode, qsize_t nr) { if (sb_any_quota_enabled(inode->i_sb)) { /* Used space is updated in alloc_space() */ @@ -102,15 +84,15 @@ static inline int DQUOT_PREALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) return 0; } -static inline int DQUOT_PREALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_space(struct inode *inode, qsize_t nr) { int ret; - if (!(ret = DQUOT_PREALLOC_SPACE_NODIRTY(inode, nr))) + if (!(ret = vfs_dq_prealloc_space_nodirty(inode, nr))) mark_inode_dirty(inode); return ret; } -static inline int DQUOT_ALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_space_nodirty(struct inode *inode, qsize_t nr) { if (sb_any_quota_enabled(inode->i_sb)) { /* Used space is updated in alloc_space() */ @@ -122,25 +104,25 @@ static inline int DQUOT_ALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) return 0; } -static inline int DQUOT_ALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_space(struct inode *inode, qsize_t nr) { int ret; - if (!(ret = DQUOT_ALLOC_SPACE_NODIRTY(inode, nr))) + if (!(ret = vfs_dq_alloc_space_nodirty(inode, nr))) mark_inode_dirty(inode); return ret; } -static inline int DQUOT_ALLOC_INODE(struct inode *inode) +static inline int vfs_dq_alloc_inode(struct inode *inode) { if (sb_any_quota_enabled(inode->i_sb)) { - DQUOT_INIT(inode); + vfs_dq_init(inode); if (inode->i_sb->dq_op->alloc_inode(inode, 1) == NO_QUOTA) return 1; } return 0; } -static inline void DQUOT_FREE_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_space_nodirty(struct inode *inode, qsize_t nr) { if (sb_any_quota_enabled(inode->i_sb)) inode->i_sb->dq_op->free_space(inode, nr); @@ -148,35 +130,25 @@ static inline void DQUOT_FREE_SPACE_NODIRTY(struct inode *inode, qsize_t nr) inode_sub_bytes(inode, nr); } -static inline void DQUOT_FREE_SPACE(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_space(struct inode *inode, qsize_t nr) { - DQUOT_FREE_SPACE_NODIRTY(inode, nr); + vfs_dq_free_space_nodirty(inode, nr); mark_inode_dirty(inode); } -static inline void DQUOT_FREE_INODE(struct inode *inode) +static inline void vfs_dq_free_inode(struct inode *inode) { if (sb_any_quota_enabled(inode->i_sb)) inode->i_sb->dq_op->free_inode(inode, 1); } -static inline int DQUOT_TRANSFER(struct inode *inode, struct iattr *iattr) -{ - if (sb_any_quota_enabled(inode->i_sb) && !IS_NOQUOTA(inode)) { - DQUOT_INIT(inode); - if (inode->i_sb->dq_op->transfer(inode, iattr) == NO_QUOTA) - return 1; - } - return 0; -} - /* The following two functions cannot be called inside a transaction */ -static inline void DQUOT_SYNC(struct super_block *sb) +static inline void vfs_dq_sync(struct super_block *sb) { sync_dquots(sb, -1); } -static inline int DQUOT_OFF(struct super_block *sb, int remount) +static inline int vfs_dq_off(struct super_block *sb, int remount) { int ret = -ENOSYS; @@ -185,21 +157,6 @@ static inline int DQUOT_OFF(struct super_block *sb, int remount) return ret; } -static inline int DQUOT_ON_REMOUNT(struct super_block *sb) -{ - int cnt; - int ret = 0, err; - - if (!sb->s_qcop || !sb->s_qcop->quota_on) - return -ENOSYS; - for (cnt = 0; cnt < MAXQUOTAS; cnt++) { - err = sb->s_qcop->quota_on(sb, cnt, 0, NULL, 1); - if (err < 0 && !ret) - ret = err; - } - return ret; -} - #else /* @@ -208,113 +165,144 @@ static inline int DQUOT_ON_REMOUNT(struct super_block *sb) #define sb_dquot_ops (NULL) #define sb_quotactl_ops (NULL) -static inline void DQUOT_INIT(struct inode *inode) +static inline void vfs_dq_init(struct inode *inode) { } -static inline void DQUOT_DROP(struct inode *inode) +static inline void vfs_dq_drop(struct inode *inode) { } -static inline int DQUOT_ALLOC_INODE(struct inode *inode) +static inline int vfs_dq_alloc_inode(struct inode *inode) { return 0; } -static inline void DQUOT_FREE_INODE(struct inode *inode) +static inline void vfs_dq_free_inode(struct inode *inode) { } -static inline void DQUOT_SYNC(struct super_block *sb) +static inline void vfs_dq_sync(struct super_block *sb) { } -static inline int DQUOT_OFF(struct super_block *sb, int remount) +static inline int vfs_dq_off(struct super_block *sb, int remount) { return 0; } -static inline int DQUOT_ON_REMOUNT(struct super_block *sb) +static inline int vfs_dq_quota_on_remount(struct super_block *sb) { return 0; } -static inline int DQUOT_TRANSFER(struct inode *inode, struct iattr *iattr) +static inline int vfs_dq_transfer(struct inode *inode, struct iattr *iattr) { return 0; } -static inline int DQUOT_PREALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_space_nodirty(struct inode *inode, qsize_t nr) { inode_add_bytes(inode, nr); return 0; } -static inline int DQUOT_PREALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_space(struct inode *inode, qsize_t nr) { - DQUOT_PREALLOC_SPACE_NODIRTY(inode, nr); + vfs_dq_prealloc_space_nodirty(inode, nr); mark_inode_dirty(inode); return 0; } -static inline int DQUOT_ALLOC_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_space_nodirty(struct inode *inode, qsize_t nr) { inode_add_bytes(inode, nr); return 0; } -static inline int DQUOT_ALLOC_SPACE(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_space(struct inode *inode, qsize_t nr) { - DQUOT_ALLOC_SPACE_NODIRTY(inode, nr); + vfs_dq_alloc_space_nodirty(inode, nr); mark_inode_dirty(inode); return 0; } -static inline void DQUOT_FREE_SPACE_NODIRTY(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_space_nodirty(struct inode *inode, qsize_t nr) { inode_sub_bytes(inode, nr); } -static inline void DQUOT_FREE_SPACE(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_space(struct inode *inode, qsize_t nr) { - DQUOT_FREE_SPACE_NODIRTY(inode, nr); + vfs_dq_free_space_nodirty(inode, nr); mark_inode_dirty(inode); } #endif /* CONFIG_QUOTA */ -static inline int DQUOT_PREALLOC_BLOCK_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_block_nodirty(struct inode *inode, qsize_t nr) { - return DQUOT_PREALLOC_SPACE_NODIRTY(inode, + return vfs_dq_prealloc_space_nodirty(inode, nr << inode->i_sb->s_blocksize_bits); } -static inline int DQUOT_PREALLOC_BLOCK(struct inode *inode, qsize_t nr) +static inline int vfs_dq_prealloc_block(struct inode *inode, qsize_t nr) { - return DQUOT_PREALLOC_SPACE(inode, + return vfs_dq_prealloc_space(inode, nr << inode->i_sb->s_blocksize_bits); } -static inline int DQUOT_ALLOC_BLOCK_NODIRTY(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_block_nodirty(struct inode *inode, qsize_t nr) { - return DQUOT_ALLOC_SPACE_NODIRTY(inode, + return vfs_dq_alloc_space_nodirty(inode, nr << inode->i_sb->s_blocksize_bits); } -static inline int DQUOT_ALLOC_BLOCK(struct inode *inode, qsize_t nr) +static inline int vfs_dq_alloc_block(struct inode *inode, qsize_t nr) { - return DQUOT_ALLOC_SPACE(inode, + return vfs_dq_alloc_space(inode, nr << inode->i_sb->s_blocksize_bits); } -static inline void DQUOT_FREE_BLOCK_NODIRTY(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_block_nodirty(struct inode *inode, qsize_t nr) { - DQUOT_FREE_SPACE_NODIRTY(inode, nr << inode->i_sb->s_blocksize_bits); + vfs_dq_free_space_nodirty(inode, nr << inode->i_sb->s_blocksize_bits); } -static inline void DQUOT_FREE_BLOCK(struct inode *inode, qsize_t nr) +static inline void vfs_dq_free_block(struct inode *inode, qsize_t nr) { - DQUOT_FREE_SPACE(inode, nr << inode->i_sb->s_blocksize_bits); + vfs_dq_free_space(inode, nr << inode->i_sb->s_blocksize_bits); } +/* + * Define uppercase equivalents for compatibility with old function names + * Can go away when we think all users have been converted (15/04/2008) + */ +#define DQUOT_INIT(inode) vfs_dq_init(inode) +#define DQUOT_DROP(inode) vfs_dq_drop(inode) +#define DQUOT_PREALLOC_SPACE_NODIRTY(inode, nr) \ + vfs_dq_prealloc_space_nodirty(inode, nr) +#define DQUOT_PREALLOC_SPACE(inode, nr) vfs_dq_prealloc_space(inode, nr) +#define DQUOT_ALLOC_SPACE_NODIRTY(inode, nr) \ + vfs_dq_alloc_space_nodirty(inode, nr) +#define DQUOT_ALLOC_SPACE(inode, nr) vfs_dq_alloc_space(inode, nr) +#define DQUOT_PREALLOC_BLOCK_NODIRTY(inode, nr) \ + vfs_dq_prealloc_block_nodirty(inode, nr) +#define DQUOT_PREALLOC_BLOCK(inode, nr) vfs_dq_prealloc_block(inode, nr) +#define DQUOT_ALLOC_BLOCK_NODIRTY(inode, nr) \ + vfs_dq_alloc_block_nodirty(inode, nr) +#define DQUOT_ALLOC_BLOCK(inode, nr) vfs_dq_alloc_block(inode, nr) +#define DQUOT_ALLOC_INODE(inode) vfs_dq_alloc_inode(inode) +#define DQUOT_FREE_SPACE_NODIRTY(inode, nr) \ + vfs_dq_free_space_nodirty(inode, nr) +#define DQUOT_FREE_SPACE(inode, nr) vfs_dq_free_space(inode, nr) +#define DQUOT_FREE_BLOCK_NODIRTY(inode, nr) \ + vfs_dq_free_block_nodirty(inode, nr) +#define DQUOT_FREE_BLOCK(inode, nr) vfs_dq_free_block(inode, nr) +#define DQUOT_FREE_INODE(inode) vfs_dq_free_inode(inode) +#define DQUOT_TRANSFER(inode, iattr) vfs_dq_transfer(inode, iattr) +#define DQUOT_SYNC(sb) vfs_dq_sync(sb) +#define DQUOT_OFF(sb, remount) vfs_dq_off(sb, remount) +#define DQUOT_ON_REMOUNT(sb) vfs_dq_quota_on_remount(sb) + #endif /* _LINUX_QUOTAOPS_ */ -- cgit v1.1 From 02a55ca87185e114e5d298a8d00608501dbabf67 Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Fri, 25 Jul 2008 01:46:50 -0700 Subject: quota: cleanup loop in sync_dquots() Make loop in sync_dquots() checking whether there's something to write more readable, remove useless variable and macro info_any_dirty() which is used only in this place. Signed-off-by: Jan Kara Cc: "Vegard Nossum" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/quota.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/quota.h b/include/linux/quota.h index dcddfb2..6f1d97d 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -224,8 +224,6 @@ struct super_block; extern void mark_info_dirty(struct super_block *sb, int type); #define info_dirty(info) test_bit(DQF_INFO_DIRTY_B, &(info)->dqi_flags) -#define info_any_dquot_dirty(info) (!list_empty(&(info)->dqi_dirty_list)) -#define info_any_dirty(info) (info_dirty(info) || info_any_dquot_dirty(info)) #define sb_dqopt(sb) (&(sb)->s_dquot) #define sb_dqinfo(sb, type) (sb_dqopt(sb)->info+(type)) -- cgit v1.1 From 74abb9890dafb12a50dc140de215ed477beb1b88 Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Fri, 25 Jul 2008 01:46:51 -0700 Subject: quota: move function-macros from quota.h to quotaops.h Move declarations of some macros, which should be in fact functions to quotaops.h. This way they can be later converted to inline functions because we can now use declarations from quota.h. Also add necessary includes of quotaops.h to a few files. [akpm@linux-foundation.org: fix JFS build] [akpm@linux-foundation.org: fix UFS build] [vegard.nossum@gmail.com: fix QUOTA=n build] Signed-off-by: Jan Kara Cc: Vegard Nossum Cc: Arjen Pool Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/quota.h | 22 +++------------------- include/linux/quotaops.h | 26 ++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 19 deletions(-) (limited to 'include') diff --git a/include/linux/quota.h b/include/linux/quota.h index 6f1d97d..f9983ea 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -41,9 +41,6 @@ #define __DQUOT_VERSION__ "dquot_6.5.1" #define __DQUOT_NUM_VERSION__ 6*10000+5*100+1 -typedef __kernel_uid32_t qid_t; /* Type in which we store ids in memory */ -typedef __u64 qsize_t; /* Type in which we store sizes */ - /* Size of blocks in which are counted size limits */ #define QUOTABLOCK_BITS 10 #define QUOTABLOCK_SIZE (1 << QUOTABLOCK_BITS) @@ -172,6 +169,9 @@ enum { #include +typedef __kernel_uid32_t qid_t; /* Type in which we store ids in memory */ +typedef __u64 qsize_t; /* Type in which we store sizes */ + extern spinlock_t dq_data_lock; /* Maximal numbers of writes for quota operation (insert/delete/update) @@ -225,9 +225,6 @@ struct super_block; extern void mark_info_dirty(struct super_block *sb, int type); #define info_dirty(info) test_bit(DQF_INFO_DIRTY_B, &(info)->dqi_flags) -#define sb_dqopt(sb) (&(sb)->s_dquot) -#define sb_dqinfo(sb, type) (sb_dqopt(sb)->info+(type)) - struct dqstats { int lookups; int drops; @@ -335,19 +332,6 @@ struct quota_info { struct quota_format_ops *ops[MAXQUOTAS]; /* Operations for each type */ }; -#define sb_has_quota_enabled(sb, type) ((type)==USRQUOTA ? \ - (sb_dqopt(sb)->flags & DQUOT_USR_ENABLED) : (sb_dqopt(sb)->flags & DQUOT_GRP_ENABLED)) - -#define sb_any_quota_enabled(sb) (sb_has_quota_enabled(sb, USRQUOTA) | \ - sb_has_quota_enabled(sb, GRPQUOTA)) - -#define sb_has_quota_suspended(sb, type) \ - ((type) == USRQUOTA ? (sb_dqopt(sb)->flags & DQUOT_USR_SUSPENDED) : \ - (sb_dqopt(sb)->flags & DQUOT_GRP_SUSPENDED)) - -#define sb_any_quota_suspended(sb) (sb_has_quota_suspended(sb, USRQUOTA) | \ - sb_has_quota_suspended(sb, GRPQUOTA)) - int register_quota_format(struct quota_format_type *fmt); void unregister_quota_format(struct quota_format_type *fmt); diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index 0c8f9fe..38218c1 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -14,6 +14,8 @@ #include +#define sb_dqopt(sb) (&(sb)->s_dquot) + #if defined(CONFIG_QUOTA) /* @@ -52,6 +54,25 @@ void vfs_dq_drop(struct inode *inode); int vfs_dq_transfer(struct inode *inode, struct iattr *iattr); int vfs_dq_quota_on_remount(struct super_block *sb); +#define sb_dqinfo(sb, type) (sb_dqopt(sb)->info+(type)) + +/* + * Functions for checking status of quota + */ + +#define sb_has_quota_enabled(sb, type) ((type)==USRQUOTA ? \ + (sb_dqopt(sb)->flags & DQUOT_USR_ENABLED) : (sb_dqopt(sb)->flags & DQUOT_GRP_ENABLED)) + +#define sb_any_quota_enabled(sb) (sb_has_quota_enabled(sb, USRQUOTA) | \ + sb_has_quota_enabled(sb, GRPQUOTA)) + +#define sb_has_quota_suspended(sb, type) \ + ((type) == USRQUOTA ? (sb_dqopt(sb)->flags & DQUOT_USR_SUSPENDED) : \ + (sb_dqopt(sb)->flags & DQUOT_GRP_SUSPENDED)) + +#define sb_any_quota_suspended(sb) (sb_has_quota_suspended(sb, USRQUOTA) | \ + sb_has_quota_suspended(sb, GRPQUOTA)) + /* * Operations supported for diskquotas. */ @@ -159,6 +180,11 @@ static inline int vfs_dq_off(struct super_block *sb, int remount) #else +#define sb_has_quota_enabled(sb, type) 0 +#define sb_any_quota_enabled(sb) 0 +#define sb_has_quota_suspended(sb, type) 0 +#define sb_any_quota_suspended(sb) 0 + /* * NO-OP when quota not configured. */ -- cgit v1.1 From 03b063436ca1076301de58d9d628f610ab5404ad Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Fri, 25 Jul 2008 01:46:52 -0700 Subject: quota: convert macros to inline functions Signed-off-by: Jan Kara Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/quota.h | 5 +++- include/linux/quotaops.h | 65 ++++++++++++++++++++++++++++++++++++------------ 2 files changed, 53 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/linux/quota.h b/include/linux/quota.h index f9983ea..4e004fe 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -223,7 +223,10 @@ struct super_block; #define DQF_INFO_DIRTY (1 << DQF_INFO_DIRTY_B) /* Is info dirty? */ extern void mark_info_dirty(struct super_block *sb, int type); -#define info_dirty(info) test_bit(DQF_INFO_DIRTY_B, &(info)->dqi_flags) +static inline int info_dirty(struct mem_dqinfo *info) +{ + return test_bit(DQF_INFO_DIRTY_B, &info->dqi_flags); +} struct dqstats { int lookups; diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index 38218c1..742187f 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -11,10 +11,12 @@ #define _LINUX_QUOTAOPS_ #include - #include -#define sb_dqopt(sb) (&(sb)->s_dquot) +static inline struct quota_info *sb_dqopt(struct super_block *sb) +{ + return &sb->s_dquot; +} #if defined(CONFIG_QUOTA) @@ -54,24 +56,40 @@ void vfs_dq_drop(struct inode *inode); int vfs_dq_transfer(struct inode *inode, struct iattr *iattr); int vfs_dq_quota_on_remount(struct super_block *sb); -#define sb_dqinfo(sb, type) (sb_dqopt(sb)->info+(type)) +static inline struct mem_dqinfo *sb_dqinfo(struct super_block *sb, int type) +{ + return sb_dqopt(sb)->info + type; +} /* * Functions for checking status of quota */ -#define sb_has_quota_enabled(sb, type) ((type)==USRQUOTA ? \ - (sb_dqopt(sb)->flags & DQUOT_USR_ENABLED) : (sb_dqopt(sb)->flags & DQUOT_GRP_ENABLED)) +static inline int sb_has_quota_enabled(struct super_block *sb, int type) +{ + if (type == USRQUOTA) + return sb_dqopt(sb)->flags & DQUOT_USR_ENABLED; + return sb_dqopt(sb)->flags & DQUOT_GRP_ENABLED; +} -#define sb_any_quota_enabled(sb) (sb_has_quota_enabled(sb, USRQUOTA) | \ - sb_has_quota_enabled(sb, GRPQUOTA)) +static inline int sb_any_quota_enabled(struct super_block *sb) +{ + return sb_has_quota_enabled(sb, USRQUOTA) || + sb_has_quota_enabled(sb, GRPQUOTA); +} -#define sb_has_quota_suspended(sb, type) \ - ((type) == USRQUOTA ? (sb_dqopt(sb)->flags & DQUOT_USR_SUSPENDED) : \ - (sb_dqopt(sb)->flags & DQUOT_GRP_SUSPENDED)) +static inline int sb_has_quota_suspended(struct super_block *sb, int type) +{ + if (type == USRQUOTA) + return sb_dqopt(sb)->flags & DQUOT_USR_SUSPENDED; + return sb_dqopt(sb)->flags & DQUOT_GRP_SUSPENDED; +} -#define sb_any_quota_suspended(sb) (sb_has_quota_suspended(sb, USRQUOTA) | \ - sb_has_quota_suspended(sb, GRPQUOTA)) +static inline int sb_any_quota_suspended(struct super_block *sb) +{ + return sb_has_quota_suspended(sb, USRQUOTA) || + sb_has_quota_suspended(sb, GRPQUOTA); +} /* * Operations supported for diskquotas. @@ -180,10 +198,25 @@ static inline int vfs_dq_off(struct super_block *sb, int remount) #else -#define sb_has_quota_enabled(sb, type) 0 -#define sb_any_quota_enabled(sb) 0 -#define sb_has_quota_suspended(sb, type) 0 -#define sb_any_quota_suspended(sb) 0 +static inline int sb_has_quota_enabled(struct super_block *sb, int type) +{ + return 0; +} + +static inline int sb_any_quota_enabled(struct super_block *sb) +{ + return 0; +} + +static inline int sb_has_quota_suspended(struct super_block *sb, int type) +{ + return 0; +} + +static inline int sb_any_quota_suspended(struct super_block *sb) +{ + return 0; +} /* * NO-OP when quota not configured. -- cgit v1.1 From 657d3bfa98e542271b449f8cd84c7501ae2b2255 Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Fri, 25 Jul 2008 01:46:52 -0700 Subject: quota: implement sending information via netlink about user below quota Sometimes it may be useful for userspace to know (e.g. for some hosting guys) that some user stopped exceeding his hardlimit or softlimit in quotas. Implement sending of such events to userspace via quota netlink protocol so that they don't have to poll for such events. Based on idea and initial implementation by Vladislav Bogdanov. Cc: Vladislav Bogdanov Signed-off-by: Jan Kara Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/quota.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/quota.h b/include/linux/quota.h index 4e004fe..376a050 100644 --- a/include/linux/quota.h +++ b/include/linux/quota.h @@ -135,6 +135,10 @@ struct if_dqinfo { #define QUOTA_NL_BHARDWARN 4 /* Block hardlimit reached */ #define QUOTA_NL_BSOFTLONGWARN 5 /* Block grace time expired */ #define QUOTA_NL_BSOFTWARN 6 /* Block softlimit reached */ +#define QUOTA_NL_IHARDBELOW 7 /* Usage got below inode hardlimit */ +#define QUOTA_NL_ISOFTBELOW 8 /* Usage got below inode softlimit */ +#define QUOTA_NL_BHARDBELOW 9 /* Usage got below block hardlimit */ +#define QUOTA_NL_BSOFTBELOW 10 /* Usage got below block softlimit */ enum { QUOTA_NL_C_UNSPEC, -- cgit v1.1 From f2992db2a4f7ae10f61d5bc68c7c1528cec639e2 Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:46:55 -0700 Subject: Mark res_counter_charge(_locked) with __must_check Ignoring their return values may result in counter underflow in the future - when the value charged will be uncharged (or in "leaks" - when the value is not uncharged). This also prevents from using charging routines to decrement the counter value (i.e. uncharge it) ;) (Current code works OK with res_counter, however :) ) Signed-off-by: Pavel Emelyanov Cc: Balbir Singh Cc: Paul Menage Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/res_counter.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/res_counter.h b/include/linux/res_counter.h index 6d9e1fc..125660e 100644 --- a/include/linux/res_counter.h +++ b/include/linux/res_counter.h @@ -95,8 +95,10 @@ void res_counter_init(struct res_counter *counter); * counter->limit _locked call expects the counter->lock to be taken */ -int res_counter_charge_locked(struct res_counter *counter, unsigned long val); -int res_counter_charge(struct res_counter *counter, unsigned long val); +int __must_check res_counter_charge_locked(struct res_counter *counter, + unsigned long val); +int __must_check res_counter_charge(struct res_counter *counter, + unsigned long val); /* * uncharge - tell that some portion of the resource is released -- cgit v1.1 From ce16b49d37e748574f7fabc2726268d542d0aa1a Mon Sep 17 00:00:00 2001 From: Paul Menage Date: Fri, 25 Jul 2008 01:46:57 -0700 Subject: cgroup files: clean up whitespace in struct cftype This patch removes some extraneous spaces from method declarations in struct cftype, to fit in with conventional kernel style. Signed-off-by: Paul Menage Cc: Paul Jackson Cc: Pavel Emelyanov Cc: Balbir Singh Cc: Serge Hallyn Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cgroup.h | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index e155aa7..88a734e 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -205,48 +205,48 @@ struct cftype { * subsystem, followed by a period */ char name[MAX_CFTYPE_NAME]; int private; - int (*open) (struct inode *inode, struct file *file); - ssize_t (*read) (struct cgroup *cgrp, struct cftype *cft, - struct file *file, - char __user *buf, size_t nbytes, loff_t *ppos); + int (*open)(struct inode *inode, struct file *file); + ssize_t (*read)(struct cgroup *cgrp, struct cftype *cft, + struct file *file, + char __user *buf, size_t nbytes, loff_t *ppos); /* * read_u64() is a shortcut for the common case of returning a * single integer. Use it in place of read() */ - u64 (*read_u64) (struct cgroup *cgrp, struct cftype *cft); + u64 (*read_u64)(struct cgroup *cgrp, struct cftype *cft); /* * read_s64() is a signed version of read_u64() */ - s64 (*read_s64) (struct cgroup *cgrp, struct cftype *cft); + s64 (*read_s64)(struct cgroup *cgrp, struct cftype *cft); /* * read_map() is used for defining a map of key/value * pairs. It should call cb->fill(cb, key, value) for each * entry. The key/value pairs (and their ordering) should not * change between reboots. */ - int (*read_map) (struct cgroup *cont, struct cftype *cft, - struct cgroup_map_cb *cb); + int (*read_map)(struct cgroup *cont, struct cftype *cft, + struct cgroup_map_cb *cb); /* * read_seq_string() is used for outputting a simple sequence * using seqfile. */ - int (*read_seq_string) (struct cgroup *cont, struct cftype *cft, - struct seq_file *m); + int (*read_seq_string)(struct cgroup *cont, struct cftype *cft, + struct seq_file *m); - ssize_t (*write) (struct cgroup *cgrp, struct cftype *cft, - struct file *file, - const char __user *buf, size_t nbytes, loff_t *ppos); + ssize_t (*write)(struct cgroup *cgrp, struct cftype *cft, + struct file *file, + const char __user *buf, size_t nbytes, loff_t *ppos); /* * write_u64() is a shortcut for the common case of accepting * a single integer (as parsed by simple_strtoull) from * userspace. Use in place of write(); return 0 or error. */ - int (*write_u64) (struct cgroup *cgrp, struct cftype *cft, u64 val); + int (*write_u64)(struct cgroup *cgrp, struct cftype *cft, u64 val); /* * write_s64() is a signed version of write_u64() */ - int (*write_s64) (struct cgroup *cgrp, struct cftype *cft, s64 val); + int (*write_s64)(struct cgroup *cgrp, struct cftype *cft, s64 val); /* * trigger() callback can be used to get some kick from the @@ -256,7 +256,7 @@ struct cftype { */ int (*trigger)(struct cgroup *cgrp, unsigned int event); - int (*release) (struct inode *inode, struct file *file); + int (*release)(struct inode *inode, struct file *file); }; struct cgroup_scanner { -- cgit v1.1 From db3b14978abc02041046ed8353f0899cb58ffffc Mon Sep 17 00:00:00 2001 From: Paul Menage Date: Fri, 25 Jul 2008 01:46:58 -0700 Subject: cgroup files: add write_string cgroup control file method This patch adds a write_string() method for cgroups control files. The semantics are that a buffer is copied from userspace to kernelspace and the handler function invoked on that buffer. The buffer is guaranteed to be nul-terminated, and no longer than max_write_len (defaulting to 64 bytes if unspecified). Later patches will convert existing raw file write handlers in control group subsystems to use this method. Signed-off-by: Paul Menage Cc: Paul Jackson Cc: Pavel Emelyanov Acked-by: Balbir Singh Acked-by: Serge Hallyn Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cgroup.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index 88a734e..f537945 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -205,6 +205,13 @@ struct cftype { * subsystem, followed by a period */ char name[MAX_CFTYPE_NAME]; int private; + + /* + * If non-zero, defines the maximum length of string that can + * be passed to write_string; defaults to 64 + */ + size_t max_write_len; + int (*open)(struct inode *inode, struct file *file); ssize_t (*read)(struct cgroup *cgrp, struct cftype *cft, struct file *file, @@ -249,6 +256,13 @@ struct cftype { int (*write_s64)(struct cgroup *cgrp, struct cftype *cft, s64 val); /* + * write_string() is passed a nul-terminated kernelspace + * buffer of maximum length determined by max_write_len. + * Returns 0 or -ve error code. + */ + int (*write_string)(struct cgroup *cgrp, struct cftype *cft, + const char *buffer); + /* * trigger() callback can be used to get some kick from the * userspace, when the actual string written is not important * at all. The private field can be used to determine the -- cgit v1.1 From e788e066c651b1bbf4a927dc95395c1aa13be436 Mon Sep 17 00:00:00 2001 From: Paul Menage Date: Fri, 25 Jul 2008 01:46:59 -0700 Subject: cgroup files: move the release_agent file to use typed handlers Adds cgroup_release_agent_write() and cgroup_release_agent_show() methods to handle writing/reading the path to a cgroup hierarchy's release agent. As a result, cgroup_common_file_read() is now unnecessary. As part of the change, a previously-tolerated race in cgroup_release_agent() is avoided by copying the current release_agent_path prior to calling call_usermode_helper(). Signed-off-by: Paul Menage Cc: Paul Jackson Cc: Pavel Emelyanov Cc: Balbir Singh Acked-by: Serge Hallyn Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cgroup.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index f537945..e78377a 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -295,6 +295,8 @@ int cgroup_add_files(struct cgroup *cgrp, int cgroup_is_removed(const struct cgroup *cgrp); +int cgroup_lock_live_group(struct cgroup *cgrp); + int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen); int cgroup_task_count(const struct cgroup *cgrp); -- cgit v1.1 From 84eea842886ac35020be6043e04748ed22014359 Mon Sep 17 00:00:00 2001 From: Paul Menage Date: Fri, 25 Jul 2008 01:47:00 -0700 Subject: cgroups: misc cleanups to write_string patchset This patch contains cleanups suggested by reviewers for the recent write_string() patchset: - pair cgroup_lock_live_group() with cgroup_unlock() in cgroup.c for clarity, rather than directly unlocking cgroup_mutex. - make the return type of cgroup_lock_live_group() a bool - use a #define'd constant for the local buffer size in read/write functions Signed-off-by: Paul Menage Cc: Paul Jackson Cc: Pavel Emelyanov Cc: Balbir Singh Acked-by: Serge Hallyn Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cgroup.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index e78377a..cc59d3a 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -21,11 +21,13 @@ struct cgroupfs_root; struct cgroup_subsys; struct inode; +struct cgroup; extern int cgroup_init_early(void); extern int cgroup_init(void); extern void cgroup_init_smp(void); extern void cgroup_lock(void); +extern bool cgroup_lock_live_group(struct cgroup *cgrp); extern void cgroup_unlock(void); extern void cgroup_fork(struct task_struct *p); extern void cgroup_fork_callbacks(struct task_struct *p); @@ -295,8 +297,6 @@ int cgroup_add_files(struct cgroup *cgrp, int cgroup_is_removed(const struct cgroup *cgrp); -int cgroup_lock_live_group(struct cgroup *cgrp); - int cgroup_path(const struct cgroup *cgrp, char *buf, int buflen); int cgroup_task_count(const struct cgroup *cgrp); -- cgit v1.1 From 856c13aa1ff6136c1968414fdea5938ea9d5ebf2 Mon Sep 17 00:00:00 2001 From: Paul Menage Date: Fri, 25 Jul 2008 01:47:04 -0700 Subject: cgroup files: convert res_counter_write() to be a cgroups write_string() handler Currently res_counter_write() is a raw file handler even though it's ultimately taking a number, since in some cases it wants to pre-process the string when converting it to a number. This patch converts res_counter_write() from a raw file handler to a write_string() handler; this allows some of the boilerplate copying/locking/checking to be removed, and simplies the cleanup path, since these functions are now performed by the cgroups framework. [lizf@cn.fujitsu.com: build fix] Signed-off-by: Paul Menage Cc: Paul Jackson Cc: Pavel Emelyanov Cc: Balbir Singh Cc: Serge Hallyn Cc: KAMEZAWA Hiroyuki Signed-off-by: Li Zefan Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/res_counter.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/res_counter.h b/include/linux/res_counter.h index 125660e..290205d 100644 --- a/include/linux/res_counter.h +++ b/include/linux/res_counter.h @@ -63,9 +63,14 @@ u64 res_counter_read_u64(struct res_counter *counter, int member); ssize_t res_counter_read(struct res_counter *counter, int member, const char __user *buf, size_t nbytes, loff_t *pos, int (*read_strategy)(unsigned long long val, char *s)); -ssize_t res_counter_write(struct res_counter *counter, int member, - const char __user *buf, size_t nbytes, loff_t *pos, - int (*write_strategy)(char *buf, unsigned long long *val)); + +typedef int (*write_strategy_fn)(const char *buf, unsigned long long *val); + +int res_counter_memparse_write_strategy(const char *buf, + unsigned long long *res); + +int res_counter_write(struct res_counter *counter, int member, + const char *buffer, write_strategy_fn write_strategy); /* * the field descriptors. one for each member of res_counter -- cgit v1.1 From e885dcde75685e09f23cffae1f6d5169c105b8a0 Mon Sep 17 00:00:00 2001 From: "Serge E. Hallyn" Date: Fri, 25 Jul 2008 01:47:06 -0700 Subject: cgroup_clone: use pid of newly created task for new cgroup cgroup_clone creates a new cgroup with the pid of the task. This works correctly for unshare, but for clone cgroup_clone is called from copy_namespaces inside copy_process, which happens before the new pid is created. As a result, the new cgroup was created with current's pid. This patch: 1. Moves the call inside copy_process to after the new pid is created 2. Passes the struct pid into ns_cgroup_clone (as it is not yet attached to the task) 3. Passes a name from ns_cgroup_clone() into cgroup_clone() so as to keep cgroup_clone() itself simpler 4. Uses pid_vnr() to get the process id value, so that the pid used to name the new cgroup is always the pid as it would be known to the task which did the cloning or unsharing. I think that is the most intuitive thing to do. This way, task t1 does clone(CLONE_NEWPID) to get t2, which does clone(CLONE_NEWPID) to get t3, then the cgroup for t3 will be named for the pid by which t2 knows t3. (Thanks to Dan Smith for finding the main bug) Changelog: June 11: Incorporate Paul Menage's feedback: don't pass NULL to ns_cgroup_clone from unshare, and reduce patch size by using 'nodename' in cgroup_clone. June 10: Original version [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Serge Hallyn Acked-by: Paul Menage Tested-by: Dan Smith Cc: Balbir Singh Cc: KAMEZAWA Hiroyuki Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cgroup.h | 3 ++- include/linux/nsproxy.h | 7 +++++-- 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h index cc59d3a..c98dd7c 100644 --- a/include/linux/cgroup.h +++ b/include/linux/cgroup.h @@ -364,7 +364,8 @@ static inline struct cgroup* task_cgroup(struct task_struct *task, return task_subsys_state(task, subsys_id)->cgroup; } -int cgroup_clone(struct task_struct *tsk, struct cgroup_subsys *ss); +int cgroup_clone(struct task_struct *tsk, struct cgroup_subsys *ss, + char *nodename); /* A cgroup_iter should be treated as an opaque object */ struct cgroup_iter { diff --git a/include/linux/nsproxy.h b/include/linux/nsproxy.h index 0e66b57..c8a768e 100644 --- a/include/linux/nsproxy.h +++ b/include/linux/nsproxy.h @@ -82,9 +82,12 @@ static inline void get_nsproxy(struct nsproxy *ns) } #ifdef CONFIG_CGROUP_NS -int ns_cgroup_clone(struct task_struct *tsk); +int ns_cgroup_clone(struct task_struct *tsk, struct pid *pid); #else -static inline int ns_cgroup_clone(struct task_struct *tsk) { return 0; } +static inline int ns_cgroup_clone(struct task_struct *tsk, struct pid *pid) +{ + return 0; +} #endif #endif -- cgit v1.1 From e8589cc189f96b87348ae83ea4db38eaac624135 Mon Sep 17 00:00:00 2001 From: KAMEZAWA Hiroyuki Date: Fri, 25 Jul 2008 01:47:10 -0700 Subject: memcg: better migration handling This patch changes page migration under memory controller to use a different algorithm. (thanks to Christoph for new idea.) Before: - page_cgroup is migrated from an old page to a new page. After: - a new page is accounted , no reuse of page_cgroup. Pros: - We can avoid compliated lock depndencies and races in migration. Cons: - new param to mem_cgroup_charge_common(). - mem_cgroup_getref() is added for handling ref_cnt ping-pong. This version simplifies complicated lock dependency in page migraiton under memory resource controller. new refcnt sequence is following. a mapped page: prepage_migration() ..... +1 to NEW page try_to_unmap() ..... all refs to OLD page is gone. move_pages() ..... +1 to NEW page if page cache. remap... ..... all refs from *map* is added to NEW one. end_migration() ..... -1 to New page. page's mapcount + (page_is_cache) refs are added to NEW one. Signed-off-by: KAMEZAWA Hiroyuki Cc: Balbir Singh Cc: Pavel Emelyanov Cc: Li Zefan Cc: YAMAMOTO Takashi Cc: Hugh Dickins Cc: Christoph Lameter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/memcontrol.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index e660877..84ead2a 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h @@ -50,9 +50,10 @@ extern struct mem_cgroup *mem_cgroup_from_task(struct task_struct *p); #define mm_match_cgroup(mm, cgroup) \ ((cgroup) == mem_cgroup_from_task((mm)->owner)) -extern int mem_cgroup_prepare_migration(struct page *page); +extern int +mem_cgroup_prepare_migration(struct page *page, struct page *newpage); extern void mem_cgroup_end_migration(struct page *page); -extern void mem_cgroup_page_migration(struct page *page, struct page *newpage); +extern int mem_cgroup_getref(struct page *page); /* * For memory reclaim. @@ -112,7 +113,8 @@ static inline int task_in_mem_cgroup(struct task_struct *task, return 1; } -static inline int mem_cgroup_prepare_migration(struct page *page) +static inline int +mem_cgroup_prepare_migration(struct page *page, struct page *newpage) { return 0; } @@ -121,8 +123,7 @@ static inline void mem_cgroup_end_migration(struct page *page) { } -static inline void -mem_cgroup_page_migration(struct page *page, struct page *newpage) +static inline void mem_cgroup_getref(struct page *page) { } -- cgit v1.1 From 69029cd550284e32de13d6dd2f77b723c8a0e444 Mon Sep 17 00:00:00 2001 From: KAMEZAWA Hiroyuki Date: Fri, 25 Jul 2008 01:47:14 -0700 Subject: memcg: remove refcnt from page_cgroup memcg: performance improvements Patch Description 1/5 ... remove refcnt fron page_cgroup patch (shmem handling is fixed) 2/5 ... swapcache handling patch 3/5 ... add helper function for shmem's memory reclaim patch 4/5 ... optimize by likely/unlikely ppatch 5/5 ... remove redundunt check patch (shmem handling is fixed.) Unix bench result. == 2.6.26-rc2-mm1 + memory resource controller Execl Throughput 2915.4 lps (29.6 secs, 3 samples) C Compiler Throughput 1019.3 lpm (60.0 secs, 3 samples) Shell Scripts (1 concurrent) 5796.0 lpm (60.0 secs, 3 samples) Shell Scripts (8 concurrent) 1097.7 lpm (60.0 secs, 3 samples) Shell Scripts (16 concurrent) 565.3 lpm (60.0 secs, 3 samples) File Read 1024 bufsize 2000 maxblocks 1022128.0 KBps (30.0 secs, 3 samples) File Write 1024 bufsize 2000 maxblocks 544057.0 KBps (30.0 secs, 3 samples) File Copy 1024 bufsize 2000 maxblocks 346481.0 KBps (30.0 secs, 3 samples) File Read 256 bufsize 500 maxblocks 319325.0 KBps (30.0 secs, 3 samples) File Write 256 bufsize 500 maxblocks 148788.0 KBps (30.0 secs, 3 samples) File Copy 256 bufsize 500 maxblocks 99051.0 KBps (30.0 secs, 3 samples) File Read 4096 bufsize 8000 maxblocks 2058917.0 KBps (30.0 secs, 3 samples) File Write 4096 bufsize 8000 maxblocks 1606109.0 KBps (30.0 secs, 3 samples) File Copy 4096 bufsize 8000 maxblocks 854789.0 KBps (30.0 secs, 3 samples) Dc: sqrt(2) to 99 decimal places 126145.2 lpm (30.0 secs, 3 samples) INDEX VALUES TEST BASELINE RESULT INDEX Execl Throughput 43.0 2915.4 678.0 File Copy 1024 bufsize 2000 maxblocks 3960.0 346481.0 875.0 File Copy 256 bufsize 500 maxblocks 1655.0 99051.0 598.5 File Copy 4096 bufsize 8000 maxblocks 5800.0 854789.0 1473.8 Shell Scripts (8 concurrent) 6.0 1097.7 1829.5 ========= FINAL SCORE 991.3 == 2.6.26-rc2-mm1 + this set == Execl Throughput 3012.9 lps (29.9 secs, 3 samples) C Compiler Throughput 981.0 lpm (60.0 secs, 3 samples) Shell Scripts (1 concurrent) 5872.0 lpm (60.0 secs, 3 samples) Shell Scripts (8 concurrent) 1120.3 lpm (60.0 secs, 3 samples) Shell Scripts (16 concurrent) 578.0 lpm (60.0 secs, 3 samples) File Read 1024 bufsize 2000 maxblocks 1003993.0 KBps (30.0 secs, 3 samples) File Write 1024 bufsize 2000 maxblocks 550452.0 KBps (30.0 secs, 3 samples) File Copy 1024 bufsize 2000 maxblocks 347159.0 KBps (30.0 secs, 3 samples) File Read 256 bufsize 500 maxblocks 314644.0 KBps (30.0 secs, 3 samples) File Write 256 bufsize 500 maxblocks 151852.0 KBps (30.0 secs, 3 samples) File Copy 256 bufsize 500 maxblocks 101000.0 KBps (30.0 secs, 3 samples) File Read 4096 bufsize 8000 maxblocks 2033256.0 KBps (30.0 secs, 3 samples) File Write 4096 bufsize 8000 maxblocks 1611814.0 KBps (30.0 secs, 3 samples) File Copy 4096 bufsize 8000 maxblocks 847979.0 KBps (30.0 secs, 3 samples) Dc: sqrt(2) to 99 decimal places 128148.7 lpm (30.0 secs, 3 samples) INDEX VALUES TEST BASELINE RESULT INDEX Execl Throughput 43.0 3012.9 700.7 File Copy 1024 bufsize 2000 maxblocks 3960.0 347159.0 876.7 File Copy 256 bufsize 500 maxblocks 1655.0 101000.0 610.3 File Copy 4096 bufsize 8000 maxblocks 5800.0 847979.0 1462.0 Shell Scripts (8 concurrent) 6.0 1120.3 1867.2 ========= FINAL SCORE 1004.6 This patch: Remove refcnt from page_cgroup(). After this, * A page is charged only when !page_mapped() && no page_cgroup is assigned. * Anon page is newly mapped. * File page is added to mapping->tree. * A page is uncharged only when * Anon page is fully unmapped. * File page is removed from LRU. There is no change in behavior from user's view. This patch also removes unnecessary calls in rmap.c which was used only for refcnt mangement. [akpm@linux-foundation.org: fix warning] [hugh@veritas.com: fix shmem_unuse_inode charging] Signed-off-by: KAMEZAWA Hiroyuki Cc: Balbir Singh Cc: "Eric W. Biederman" Cc: Pavel Emelyanov Cc: Li Zefan Cc: Hugh Dickins Cc: YAMAMOTO Takashi Cc: Paul Menage Cc: David Rientjes Signed-off-by: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/memcontrol.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index 84ead2a..b4980b8 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h @@ -35,6 +35,7 @@ extern int mem_cgroup_charge(struct page *page, struct mm_struct *mm, extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm, gfp_t gfp_mask); extern void mem_cgroup_uncharge_page(struct page *page); +extern void mem_cgroup_uncharge_cache_page(struct page *page); extern void mem_cgroup_move_lists(struct page *page, bool active); extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan, struct list_head *dst, @@ -53,7 +54,6 @@ extern struct mem_cgroup *mem_cgroup_from_task(struct task_struct *p); extern int mem_cgroup_prepare_migration(struct page *page, struct page *newpage); extern void mem_cgroup_end_migration(struct page *page); -extern int mem_cgroup_getref(struct page *page); /* * For memory reclaim. @@ -98,6 +98,10 @@ static inline void mem_cgroup_uncharge_page(struct page *page) { } +static inline void mem_cgroup_uncharge_cache_page(struct page *page) +{ +} + static inline void mem_cgroup_move_lists(struct page *page, bool active) { } @@ -123,10 +127,6 @@ static inline void mem_cgroup_end_migration(struct page *page) { } -static inline void mem_cgroup_getref(struct page *page) -{ -} - static inline int mem_cgroup_calc_mapped_ratio(struct mem_cgroup *mem) { return 0; -- cgit v1.1 From c9b0ed51483cc2fc42bb801b6675c4231b0e4634 Mon Sep 17 00:00:00 2001 From: KAMEZAWA Hiroyuki Date: Fri, 25 Jul 2008 01:47:15 -0700 Subject: memcg: helper function for relcaim from shmem. A new call, mem_cgroup_shrink_usage() is added for shmem handling and relacing non-standard usage of mem_cgroup_charge/uncharge. Now, shmem calls mem_cgroup_charge() just for reclaim some pages from mem_cgroup. In general, shmem is used by some process group and not for global resource (like file caches). So, it's reasonable to reclaim pages from mem_cgroup where shmem is mainly used. [hugh@veritas.com: shmem_getpage release page sooner] [hugh@veritas.com: mem_cgroup_shrink_usage css_put] Signed-off-by: KAMEZAWA Hiroyuki Cc: Balbir Singh Cc: "Eric W. Biederman" Cc: Pavel Emelyanov Cc: Li Zefan Cc: YAMAMOTO Takashi Cc: Paul Menage Cc: David Rientjes Signed-off-by: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/memcontrol.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/linux/memcontrol.h b/include/linux/memcontrol.h index b4980b8..fdf3967 100644 --- a/include/linux/memcontrol.h +++ b/include/linux/memcontrol.h @@ -37,6 +37,8 @@ extern int mem_cgroup_cache_charge(struct page *page, struct mm_struct *mm, extern void mem_cgroup_uncharge_page(struct page *page); extern void mem_cgroup_uncharge_cache_page(struct page *page); extern void mem_cgroup_move_lists(struct page *page, bool active); +extern int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask); + extern unsigned long mem_cgroup_isolate_pages(unsigned long nr_to_scan, struct list_head *dst, unsigned long *scanned, int order, @@ -102,6 +104,11 @@ static inline void mem_cgroup_uncharge_cache_page(struct page *page) { } +static inline int mem_cgroup_shrink_usage(struct mm_struct *mm, gfp_t gfp_mask) +{ + return 0; +} + static inline void mem_cgroup_move_lists(struct page *page, bool active) { } -- cgit v1.1 From 12b9804419cfb1c1bdac413f6c373af3b88d154b Mon Sep 17 00:00:00 2001 From: KAMEZAWA Hiroyuki Date: Fri, 25 Jul 2008 01:47:19 -0700 Subject: res_counter: limit change support ebusy Add an interface to set limit. This is necessary to memory resource controller because it shrinks usage at set limit. Other controllers may not need this interface to shrink usage because shrinking is not necessary or impossible. Acked-by: Balbir Singh Acked-by: Pavel Emelyanov Signed-off-by: KAMEZAWA Hiroyuki Cc: Paul Menage Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/res_counter.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/linux/res_counter.h b/include/linux/res_counter.h index 290205d..fdeadd9 100644 --- a/include/linux/res_counter.h +++ b/include/linux/res_counter.h @@ -158,4 +158,20 @@ static inline void res_counter_reset_failcnt(struct res_counter *cnt) cnt->failcnt = 0; spin_unlock_irqrestore(&cnt->lock, flags); } + +static inline int res_counter_set_limit(struct res_counter *cnt, + unsigned long long limit) +{ + unsigned long flags; + int ret = -EBUSY; + + spin_lock_irqsave(&cnt->lock, flags); + if (cnt->usage < limit) { + cnt->limit = limit; + ret = 0; + } + spin_unlock_irqrestore(&cnt->lock, flags); + return ret; +} + #endif -- cgit v1.1 From f22ab814a24e654b1de24db0c5f8b57b5ab2026a Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:47:34 -0700 Subject: include/asm/ptrace.h userspace headers cleanup This patch contains the following cleanups for the asm/ptrace.h userspace headers: - include/asm-generic/Kbuild.asm already lists ptrace.h, remove the superfluous listings in the Kbuild files of the following architectures: - cris - frv - powerpc - x86 - don't expose function prototypes and macros to userspace: - arm - blackfin - cris - mn10300 - parisc - remove #ifdef CONFIG_'s around #define's: - blackfin - m68knommu - sh: AFAIK __SH5__ should work in both kernel and userspace, no need to leak CONFIG_SUPERH64 to userspace - xtensa: cosmetical change to remove empty #ifndef __ASSEMBLY__ #else #endif from the userspace headers Not changed by this patch is the fact that the following architectures have a different struct pt_regs depending on CONFIG_ variables: - h8300 - m68knommu - mips This does not work in userspace. Signed-off-by: Adrian Bunk Cc: Cc: Roland McGrath Cc: Oleg Nesterov Acked-by: Greg Ungerer Acked-by: Paul Mundt Acked-by: Grant Grundler Acked-by: Jesper Nilsson Acked-by: Chris Zankel Acked-by: David Howells Acked-by: Paul Mackerras Acked-by: Russell King Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/ptrace.h | 6 ++---- include/asm-blackfin/ptrace.h | 6 ++++-- include/asm-cris/arch-v10/Kbuild | 1 - include/asm-cris/arch-v10/ptrace.h | 4 ++++ include/asm-cris/arch-v32/Kbuild | 1 - include/asm-cris/arch-v32/ptrace.h | 4 ++++ include/asm-cris/ptrace.h | 4 +++- include/asm-frv/Kbuild | 1 - include/asm-m68knommu/ptrace.h | 2 -- include/asm-mn10300/ptrace.h | 8 ++++++-- include/asm-parisc/ptrace.h | 4 +++- include/asm-powerpc/Kbuild | 1 - include/asm-sh/ptrace.h | 2 +- include/asm-x86/Kbuild | 1 - include/asm-xtensa/ptrace.h | 10 +++++----- 15 files changed, 32 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 7aaa206..8382b75 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -139,8 +139,6 @@ static inline int valid_user_regs(struct pt_regs *regs) return 0; } -#endif /* __KERNEL__ */ - #define pc_pointer(v) \ ((v) & ~PCMASK) @@ -153,10 +151,10 @@ extern unsigned long profile_pc(struct pt_regs *regs); #define profile_pc(regs) instruction_pointer(regs) #endif -#ifdef __KERNEL__ #define predicate(x) ((x) & 0xf0000000) #define PREDICATE_ALWAYS 0xe0000000 -#endif + +#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ diff --git a/include/asm-blackfin/ptrace.h b/include/asm-blackfin/ptrace.h index b8346cd..a45a80e 100644 --- a/include/asm-blackfin/ptrace.h +++ b/include/asm-blackfin/ptrace.h @@ -83,14 +83,14 @@ struct pt_regs { #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 /* ptrace signal */ -#ifdef CONFIG_BINFMT_ELF_FDPIC #define PTRACE_GETFDPIC 31 #define PTRACE_GETFDPIC_EXEC 0 #define PTRACE_GETFDPIC_INTERP 1 -#endif #define PS_S (0x0002) +#ifdef __KERNEL__ + /* user_mode returns true if only one bit is set in IPEND, other than the master interrupt enable. */ #define user_mode(regs) (!(((regs)->ipend & ~0x10) & (((regs)->ipend & ~0x10) - 1))) @@ -98,6 +98,8 @@ struct pt_regs { #define profile_pc(regs) instruction_pointer(regs) extern void show_regs(struct pt_regs *); +#endif /* __KERNEL__ */ + #endif /* __ASSEMBLY__ */ /* diff --git a/include/asm-cris/arch-v10/Kbuild b/include/asm-cris/arch-v10/Kbuild index 60e7e1b..7a192e1 100644 --- a/include/asm-cris/arch-v10/Kbuild +++ b/include/asm-cris/arch-v10/Kbuild @@ -1,4 +1,3 @@ -header-y += ptrace.h header-y += user.h header-y += svinto.h header-y += sv_addr_ag.h diff --git a/include/asm-cris/arch-v10/ptrace.h b/include/asm-cris/arch-v10/ptrace.h index fb14c5e..2f464ea 100644 --- a/include/asm-cris/arch-v10/ptrace.h +++ b/include/asm-cris/arch-v10/ptrace.h @@ -106,10 +106,14 @@ struct switch_stack { unsigned long return_ip; /* ip that _resume will return to */ }; +#ifdef __KERNEL__ + /* bit 8 is user-mode flag */ #define user_mode(regs) (((regs)->dccr & 0x100) != 0) #define instruction_pointer(regs) ((regs)->irp) #define profile_pc(regs) instruction_pointer(regs) extern void show_regs(struct pt_regs *); +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-cris/arch-v32/Kbuild b/include/asm-cris/arch-v32/Kbuild index a0ec545..35f2fc4 100644 --- a/include/asm-cris/arch-v32/Kbuild +++ b/include/asm-cris/arch-v32/Kbuild @@ -1,3 +1,2 @@ -header-y += ptrace.h header-y += user.h header-y += cryptocop.h diff --git a/include/asm-cris/arch-v32/ptrace.h b/include/asm-cris/arch-v32/ptrace.h index 516cc70..41f4e86 100644 --- a/include/asm-cris/arch-v32/ptrace.h +++ b/include/asm-cris/arch-v32/ptrace.h @@ -106,9 +106,13 @@ struct switch_stack { unsigned long return_ip; /* ip that _resume will return to */ }; +#ifdef __KERNEL__ + #define user_mode(regs) (((regs)->ccs & (1 << (U_CCS_BITNR + CCS_SHIFT))) != 0) #define instruction_pointer(regs) ((regs)->erp) extern void show_regs(struct pt_regs *); #define profile_pc(regs) instruction_pointer(regs) +#endif /* __KERNEL__ */ + #endif diff --git a/include/asm-cris/ptrace.h b/include/asm-cris/ptrace.h index 1ec69a7..d910925 100644 --- a/include/asm-cris/ptrace.h +++ b/include/asm-cris/ptrace.h @@ -4,11 +4,13 @@ #include #ifdef __KERNEL__ + /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 -#endif #define profile_pc(regs) instruction_pointer(regs) +#endif /* __KERNEL__ */ + #endif /* _CRIS_PTRACE_H */ diff --git a/include/asm-frv/Kbuild b/include/asm-frv/Kbuild index bc3f12c..0f8956d 100644 --- a/include/asm-frv/Kbuild +++ b/include/asm-frv/Kbuild @@ -3,4 +3,3 @@ include include/asm-generic/Kbuild.asm header-y += registers.h unifdef-y += termios.h -unifdef-y += ptrace.h diff --git a/include/asm-m68knommu/ptrace.h b/include/asm-m68knommu/ptrace.h index 47258e8..8c9194b 100644 --- a/include/asm-m68knommu/ptrace.h +++ b/include/asm-m68knommu/ptrace.h @@ -68,10 +68,8 @@ struct switch_stack { /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 -#ifdef CONFIG_FPU #define PTRACE_GETFPREGS 14 #define PTRACE_SETFPREGS 15 -#endif #ifdef __KERNEL__ diff --git a/include/asm-mn10300/ptrace.h b/include/asm-mn10300/ptrace.h index b368468..7b06cc6 100644 --- a/include/asm-mn10300/ptrace.h +++ b/include/asm-mn10300/ptrace.h @@ -88,12 +88,16 @@ extern struct pt_regs *__frame; /* current frame pointer */ /* options set using PTRACE_SETOPTIONS */ #define PTRACE_O_TRACESYSGOOD 0x00000001 -#if defined(__KERNEL__) && !defined(__ASSEMBLY__) +#if defined(__KERNEL__) + +#if !defined(__ASSEMBLY__) #define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL) #define instruction_pointer(regs) ((regs)->pc) extern void show_regs(struct pt_regs *); -#endif +#endif /* !__ASSEMBLY */ #define profile_pc(regs) ((regs)->pc) +#endif /* __KERNEL__ */ + #endif /* _ASM_PTRACE_H */ diff --git a/include/asm-parisc/ptrace.h b/include/asm-parisc/ptrace.h index 93f990e..3e94c5d 100644 --- a/include/asm-parisc/ptrace.h +++ b/include/asm-parisc/ptrace.h @@ -33,7 +33,6 @@ struct pt_regs { unsigned long ipsw; /* CR22 */ }; -#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS)) /* * The numbers chosen here are somewhat arbitrary but absolutely MUST * not overlap with any of the number assigned in . @@ -43,8 +42,11 @@ struct pt_regs { * since we have taken branch traps too) */ #define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */ + #ifdef __KERNEL__ +#define task_regs(task) ((struct pt_regs *) ((char *)(task) + TASK_REGS)) + /* XXX should we use iaoq[1] or iaoq[0] ? */ #define user_mode(regs) (((regs)->iaoq[0] & 3) ? 1 : 0) #define user_space(regs) (((regs)->iasq[1] != 0) ? 1 : 0) diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild index 04ce8f8..5ab7d7f 100644 --- a/include/asm-powerpc/Kbuild +++ b/include/asm-powerpc/Kbuild @@ -29,7 +29,6 @@ unifdef-y += elf.h unifdef-y += nvram.h unifdef-y += param.h unifdef-y += posix_types.h -unifdef-y += ptrace.h unifdef-y += seccomp.h unifdef-y += signal.h unifdef-y += spu_info.h diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h index 8d6c92b..7d36dc3 100644 --- a/include/asm-sh/ptrace.h +++ b/include/asm-sh/ptrace.h @@ -5,7 +5,7 @@ * Copyright (C) 1999, 2000 Niibe Yutaka * */ -#if defined(__SH5__) || defined(CONFIG_SUPERH64) +#if defined(__SH5__) struct pt_regs { unsigned long long pc; unsigned long long sr; diff --git a/include/asm-x86/Kbuild b/include/asm-x86/Kbuild index 1e35545..00473f7 100644 --- a/include/asm-x86/Kbuild +++ b/include/asm-x86/Kbuild @@ -19,7 +19,6 @@ unifdef-y += msr.h unifdef-y += mtrr.h unifdef-y += posix_types_32.h unifdef-y += posix_types_64.h -unifdef-y += ptrace.h unifdef-y += unistd_32.h unifdef-y += unistd_64.h unifdef-y += vm86.h diff --git a/include/asm-xtensa/ptrace.h b/include/asm-xtensa/ptrace.h index 422c73e..089b0db 100644 --- a/include/asm-xtensa/ptrace.h +++ b/include/asm-xtensa/ptrace.h @@ -73,10 +73,10 @@ #define PTRACE_GETXTREGS 18 #define PTRACE_SETXTREGS 19 -#ifndef __ASSEMBLY__ - #ifdef __KERNEL__ +#ifndef __ASSEMBLY__ + /* * This struct defines the way the registers are stored on the * kernel stack during a system call or other kernel entry. @@ -122,14 +122,14 @@ extern void show_regs(struct pt_regs *); # ifndef CONFIG_SMP # define profile_pc(regs) instruction_pointer(regs) # endif -#endif /* __KERNEL__ */ #else /* __ASSEMBLY__ */ -#ifdef __KERNEL__ # include #define PT_REGS_OFFSET (KERNEL_STACK_SIZE - PT_USER_SIZE) -#endif #endif /* !__ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + #endif /* _XTENSA_PTRACE_H */ -- cgit v1.1 From 364d3c13c17f45da6d638011078d4c4d3070d719 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:36 -0700 Subject: ptrace: give more respect to SIGKILL ptrace_stop() has some complicated checks to prevent the scheduling in the TASK_TRACED state with the pending SIGKILL, but these checks are racy, and they depend on arch_ptrace_stop_needed(). This patch assumes that the traced task should die asap if it was killed by SIGKILL, in that case schedule()->signal_pending_state() has no reason to ignore the TASK_WAKEKILL part of TASK_TRACED, and we can kill this nasty special case. Note: do_exit()->ptrace_notify() is special, the killed task can already dequeue SIGKILL at this point. Another indication that fatal_signal_pending() is not exactly right. Signed-off-by: Oleg Nesterov Cc: Ingo Molnar Cc: Matthew Wilcox Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 6aca4a1..79e749d 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2054,9 +2054,6 @@ static inline int signal_pending_state(long state, struct task_struct *p) if (!signal_pending(p)) return 0; - if (state & (__TASK_STOPPED | __TASK_TRACED)) - return 0; - return (state & TASK_INTERRUPTIBLE) || __fatal_signal_pending(p); } -- cgit v1.1 From 7b34e4283c685f5cc6ba6d30e939906eee0d4bcf Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:37 -0700 Subject: introduce PF_KTHREAD flag Introduce the new PF_KTHREAD flag to mark the kernel threads. It is set by INIT_TASK() and copied to the forked childs (we could set it in kthreadd() along with PF_NOFREEZE instead). daemonize() was changed as well. In that case testing of PF_KTHREAD is racy, but daemonize() is hopeless anyway. This flag is cleared in do_execve(), before search_binary_handler(). Probably not the best place, we can do this in exec_mmap() or in start_thread(), or clear it along with PF_FORKNOEXEC. But I think this doesn't matter in practice, and if do_execve() fails kthread should die soon. Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/init_task.h | 2 +- include/linux/sched.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 93c45ac..021d8e7 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h @@ -122,7 +122,7 @@ extern struct group_info init_groups; .state = 0, \ .stack = &init_thread_info, \ .usage = ATOMIC_INIT(2), \ - .flags = 0, \ + .flags = PF_KTHREAD, \ .lock_depth = -1, \ .prio = MAX_PRIO-20, \ .static_prio = MAX_PRIO-20, \ diff --git a/include/linux/sched.h b/include/linux/sched.h index 79e749d..eec64a4 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1483,6 +1483,7 @@ static inline void put_task_struct(struct task_struct *t) #define PF_EXITING 0x00000004 /* getting shut down */ #define PF_EXITPIDONE 0x00000008 /* pi exit done on shut down */ #define PF_VCPU 0x00000010 /* I'm a virtual CPU */ +#define PF_KTHREAD 0x00000020 /* I am a kernel thread */ #define PF_FORKNOEXEC 0x00000040 /* forked but didn't exec */ #define PF_SUPERPRIV 0x00000100 /* used super-user privileges */ #define PF_DUMPCORE 0x00000200 /* dumped core */ -- cgit v1.1 From 246bb0b1deb29726990620d8b5e55ca29f331362 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:38 -0700 Subject: kill PF_BORROWED_MM in favour of PF_KTHREAD Kill PF_BORROWED_MM. Change use_mm/unuse_mm to not play with ->flags, and do s/PF_BORROWED_MM/PF_KTHREAD/ for a couple of other users. No functional changes yet. But this allows us to do further fixes/cleanups. oom_kill/ptrace/etc often check "p->mm != NULL" to filter out the kthreads, this is wrong because of use_mm(). The problem with PF_BORROWED_MM is that we need task_lock() to avoid races. With this patch we can check PF_KTHREAD directly, or use a simple lockless helper: /* The result must not be dereferenced !!! */ struct mm_struct *__get_task_mm(struct task_struct *tsk) { if (tsk->flags & PF_KTHREAD) return NULL; return tsk->mm; } Note also ecard_task(). It runs with ->mm != NULL, but it's the kernel thread without PF_BORROWED_MM. Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index eec64a4..0560999 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1483,7 +1483,6 @@ static inline void put_task_struct(struct task_struct *t) #define PF_EXITING 0x00000004 /* getting shut down */ #define PF_EXITPIDONE 0x00000008 /* pi exit done on shut down */ #define PF_VCPU 0x00000010 /* I'm a virtual CPU */ -#define PF_KTHREAD 0x00000020 /* I am a kernel thread */ #define PF_FORKNOEXEC 0x00000040 /* forked but didn't exec */ #define PF_SUPERPRIV 0x00000100 /* used super-user privileges */ #define PF_DUMPCORE 0x00000200 /* dumped core */ @@ -1497,7 +1496,7 @@ static inline void put_task_struct(struct task_struct *t) #define PF_KSWAPD 0x00040000 /* I am kswapd */ #define PF_SWAPOFF 0x00080000 /* I am in swapoff */ #define PF_LESS_THROTTLE 0x00100000 /* Throttle me less: I clean memory */ -#define PF_BORROWED_MM 0x00200000 /* I am a kthread doing use_mm */ +#define PF_KTHREAD 0x00200000 /* I am a kernel thread */ #define PF_RANDOMIZE 0x00400000 /* randomize virtual address space */ #define PF_SWAPWRITE 0x00800000 /* Allowed to write to swap */ #define PF_SPREAD_PAGE 0x01000000 /* Spread page cache over cpuset */ -- cgit v1.1 From 32ecb1f26dd50eeaac4e3f4dea4541c97848e459 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:41 -0700 Subject: coredump: turn mm->core_startup_done into the pointer to struct core_state mm->core_startup_done points to "struct completion startup_done" allocated on the coredump_wait()'s stack. Introduce the new structure, core_state, which holds this "struct completion". This way we can add more info visible to the threads participating in coredump without enlarging mm_struct. No changes in affected .o files. Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 02a27ae..97819ef 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -159,6 +159,10 @@ struct vm_area_struct { #endif }; +struct core_state { + struct completion startup; +}; + struct mm_struct { struct vm_area_struct * mmap; /* list of VMAs */ struct rb_root mm_rb; @@ -220,7 +224,8 @@ struct mm_struct { unsigned long flags; /* Must use atomic bitops to access the bits */ /* coredumping support */ - struct completion *core_startup_done, core_done; + struct core_state *core_state; + struct completion core_done; /* aio bits */ rwlock_t ioctx_list_lock; /* aio lock */ -- cgit v1.1 From 999d9fc1670bc082928b93b11d1f2e0e417d973c Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:41 -0700 Subject: coredump: move mm->core_waiters into struct core_state Move mm->core_waiters into "struct core_state" allocated on stack. This shrinks mm_struct a little bit and allows further changes. This patch mostly does s/core_waiters/core_state. The only essential change is that coredump_wait() must clear mm->core_state before return. The coredump_wait()'s path is uglified and .text grows by 30 bytes, this is fixed by the next patch. Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 97819ef..c0b1747 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -160,6 +160,7 @@ struct vm_area_struct { }; struct core_state { + int nr_threads; struct completion startup; }; @@ -179,7 +180,6 @@ struct mm_struct { atomic_t mm_users; /* How many users with user space? */ atomic_t mm_count; /* How many references to "struct mm_struct" (users count as 1) */ int map_count; /* number of VMAs */ - int core_waiters; struct rw_semaphore mmap_sem; spinlock_t page_table_lock; /* Protects page tables and some counters */ -- cgit v1.1 From c5f1cc8c1828486a61ab3e575da6e2c62b34d399 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:42 -0700 Subject: coredump: turn core_state->nr_threads into atomic_t Turn core_state->nr_threads into atomic_t and kill now unneeded down_write(&mm->mmap_sem) in exit_mm(). Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index c0b1747..ae99a28 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -160,7 +160,7 @@ struct vm_area_struct { }; struct core_state { - int nr_threads; + atomic_t nr_threads; struct completion startup; }; -- cgit v1.1 From b564daf806d492dd4f7afe9b6c83b8d35d137669 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:44 -0700 Subject: coredump: construct the list of coredumping threads at startup time binfmt->core_dump() has to iterate over the all threads in system in order to find the coredumping threads and construct the list using the GFP_ATOMIC allocations. With this patch each thread allocates the list node on exit_mm()'s stack and adds itself to the list. This allows us to do further changes: - simplify ->core_dump() - change exit_mm() to clear ->mm first, then wait for ->core_done. this makes the coredumping process visible to oom_kill - kill mm->core_done Signed-off-by: Oleg Nesterov Acked-by: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index ae99a28..4d0d0ab 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -159,8 +159,14 @@ struct vm_area_struct { #endif }; +struct core_thread { + struct task_struct *task; + struct core_thread *next; +}; + struct core_state { atomic_t nr_threads; + struct core_thread dumper; struct completion startup; }; -- cgit v1.1 From a94e2d408eaedbd85aae259621d46fafc10479a2 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:46 -0700 Subject: coredump: kill mm->core_done Now that we have core_state->dumper list we can use it to wake up the sub-threads waiting for the coredump completion. This uglifies the code and .text grows by 47 bytes, but otoh mm_struct lessens by sizeof(struct completion). Also, with this change we can decouple exit_mm() from the coredumping code. Signed-off-by: Oleg Nesterov Cc: Roland McGrath Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 4d0d0ab..746f975 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -229,9 +229,7 @@ struct mm_struct { unsigned long flags; /* Must use atomic bitops to access the bits */ - /* coredumping support */ - struct core_state *core_state; - struct completion core_done; + struct core_state *core_state; /* coredumping support */ /* aio bits */ rwlock_t ioctx_list_lock; /* aio lock */ -- cgit v1.1 From db700897224b5ebdf852f2d38920ce428940d059 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:49 -0700 Subject: workqueues: implement flush_work() Most of users of flush_workqueue() can be changed to use cancel_work_sync(), but sometimes we really need to wait for the completion and cancelling is not an option. schedule_on_each_cpu() is good example. Add the new helper, flush_work(work), which waits for the completion of the specific work_struct. More precisely, it "flushes" the result of of the last queue_work() which is visible to the caller. For example, this code queue_work(wq, work); /* WINDOW */ queue_work(wq, work); flush_work(work); doesn't necessary work "as expected". What can happen in the WINDOW above is - wq starts the execution of work->func() - the caller migrates to another CPU now, after the 2nd queue_work() this work is active on the previous CPU, and at the same time it is queued on another. In this case flush_work(work) may return before the first work->func() completes. It is trivial to add another helper int flush_work_sync(struct work_struct *work) { return flush_work(work) || wait_on_work(work); } which works "more correctly", but it has to iterate over all CPUs and thus it much slower than flush_work(). Signed-off-by: Oleg Nesterov Acked-by: Max Krasnyansky Acked-by: Jarek Poplawski Cc: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/workqueue.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h index 14d4712..5c158c4 100644 --- a/include/linux/workqueue.h +++ b/include/linux/workqueue.h @@ -201,6 +201,8 @@ extern int keventd_up(void); extern void init_workqueues(void); int execute_in_process_context(work_func_t fn, struct execute_work *); +extern int flush_work(struct work_struct *work); + extern int cancel_work_sync(struct work_struct *work); /* -- cgit v1.1 From 3da1c84c00c7e5fa8348336bd8c342f9128b0f14 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Fri, 25 Jul 2008 01:47:50 -0700 Subject: workqueues: make get_online_cpus() useable for work->func() workqueue_cpu_callback(CPU_DEAD) flushes cwq->thread under cpu_maps_update_begin(). This means that the multithreaded workqueues can't use get_online_cpus() due to the possible deadlock, very bad and very old problem. Introduce the new state, CPU_POST_DEAD, which is called after cpu_hotplug_done() but before cpu_maps_update_done(). Change workqueue_cpu_callback() to use CPU_POST_DEAD instead of CPU_DEAD. This means that create/destroy functions can't rely on get_online_cpus() any longer and should take cpu_add_remove_lock instead. [akpm@linux-foundation.org: fix CONFIG_SMP=n] Signed-off-by: Oleg Nesterov Acked-by: Gautham R Shenoy Cc: Heiko Carstens Cc: Max Krasnyansky Cc: Paul Jackson Cc: Paul Menage Cc: Peter Zijlstra Cc: Vegard Nossum Cc: Martin Schwidefsky Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cpu.h | 15 +++++++++++---- include/linux/notifier.h | 2 ++ 2 files changed, 13 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/cpu.h b/include/linux/cpu.h index 7464ba3..d7faf88 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -69,10 +69,11 @@ static inline void unregister_cpu_notifier(struct notifier_block *nb) #endif int cpu_up(unsigned int cpu); - extern void cpu_hotplug_init(void); +extern void cpu_maps_update_begin(void); +extern void cpu_maps_update_done(void); -#else +#else /* CONFIG_SMP */ static inline int register_cpu_notifier(struct notifier_block *nb) { @@ -87,10 +88,16 @@ static inline void cpu_hotplug_init(void) { } +static inline void cpu_maps_update_begin(void) +{ +} + +static inline void cpu_maps_update_done(void) +{ +} + #endif /* CONFIG_SMP */ extern struct sysdev_class cpu_sysdev_class; -extern void cpu_maps_update_begin(void); -extern void cpu_maps_update_done(void); #ifdef CONFIG_HOTPLUG_CPU /* Stop CPUs going up and down. */ diff --git a/include/linux/notifier.h b/include/linux/notifier.h index bd3d72d..da2698b 100644 --- a/include/linux/notifier.h +++ b/include/linux/notifier.h @@ -214,6 +214,8 @@ static inline int notifier_to_errno(int ret) #define CPU_DEAD 0x0007 /* CPU (unsigned)v dead */ #define CPU_DYING 0x0008 /* CPU (unsigned)v not running any task, * not handling interrupts, soon dead */ +#define CPU_POST_DEAD 0x0009 /* CPU (unsigned)v dead, cpu_hotplug + * lock is dropped */ /* Used for CPU hotplug events occuring while tasks are frozen due to a suspend * operation in progress -- cgit v1.1 From 95b68dec0d52c7b8fea3698b3938cf3ab936436b Mon Sep 17 00:00:00 2001 From: Chandru Date: Fri, 25 Jul 2008 01:47:55 -0700 Subject: calgary iommu: use the first kernels TCE tables in kdump kdump kernel fails to boot with calgary iommu and aacraid driver on a x366 box. The ongoing dma's of aacraid from the first kernel continue to exist until the driver is loaded in the kdump kernel. Calgary is initialized prior to aacraid and creation of new tce tables causes wrong dma's to occur. Here we try to get the tce tables of the first kernel in kdump kernel and use them. While in the kdump kernel we do not allocate new tce tables but instead read the base address register contents of calgary iommu and use the tables that the registers point to. With these changes the kdump kernel and hence aacraid now boots normally. Signed-off-by: Chandru Siddalingappa Acked-by: Muli Ben-Yehuda Cc: Ingo Molnar Cc: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/crash_dump.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h index 22c7ac5..6cd39a9 100644 --- a/include/linux/crash_dump.h +++ b/include/linux/crash_dump.h @@ -22,5 +22,13 @@ extern struct proc_dir_entry *proc_vmcore; #define vmcore_elf_check_arch(x) (elf_check_arch(x) || vmcore_elf_check_arch_cross(x)) +static inline int is_kdump_kernel(void) +{ + return (elfcorehdr_addr != ELFCORE_ADDR_MAX) ? 1 : 0; +} +#else /* !CONFIG_CRASH_DUMP */ +static inline int is_kdump_kernel(void) { return 0; } #endif /* CONFIG_CRASH_DUMP */ + +extern unsigned long saved_max_pfn; #endif /* LINUX_CRASHDUMP_H */ -- cgit v1.1 From 2027d1abc25ff770cc3bc936abd33570ce85d85a Mon Sep 17 00:00:00 2001 From: Nadia Derbey Date: Fri, 25 Jul 2008 01:47:57 -0700 Subject: idr: change the idr structure After scalability problems have been detected when using the sysV ipcs, I have proposed to use an RCU based implementation of the IDR api instead (see threads http://lkml.org/lkml/2008/4/11/212 and http://lkml.org/lkml/2008/4/29/295). This resulted in many people asking to convert the idr API and make it rcu safe (because most of the code was duplicated and thus unmaintanable and unreviewable). So here is a first attempt. The important change wrt to the idr API itself is during idr removes: idr layers are freed after a grace period, instead of being moved to the free list. The important change wrt to ipcs, is that idr_find() can now be called locklessly inside a rcu read critical section. Here are the results I've got for the pmsg test sent by Manfred: 2.6.25-rc3-mm1 2.6.25-rc3-mm1+ 2.6.25-mm1 Patched 2.6.25-mm1 1 1168441 1064021 876000 947488 2 1094264 921059 1549592 1730685 3 2082520 1738165 1694370 2324880 4 2079929 1695521 404553 2400408 5 2898758 406566 391283 3246580 6 2921417 261275 263249 3752148 7 3308761 126056 191742 4243142 8 3329456 100129 141722 4275780 1st column: stock 2.6.25-rc3-mm1 2nd column: 2.6.25-rc3-mm1 + ipc patches (store ipcs into idrs) 3nd column: stock 2.6.25-mm1 4th column: 2.6.25-mm1 + this pacth series. This patch: Add an rcu_head to the idr_layer structure in order to free it after a grace period. Signed-off-by: Nadia Derbey Reviewed-by: "Paul E. McKenney" Cc: Manfred Spraul Cc: Jim Houston Cc: Pierre Peiffer Acked-by: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/idr.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/idr.h b/include/linux/idr.h index 9a2d762..1af61d2 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -15,6 +15,7 @@ #include #include #include +#include #if BITS_PER_LONG == 32 # define IDR_BITS 5 @@ -51,6 +52,7 @@ struct idr_layer { unsigned long bitmap; /* A zero bit means "space here" */ struct idr_layer *ary[1< Date: Fri, 25 Jul 2008 01:47:59 -0700 Subject: idr: error checking factorization Do some code factorization in the return code analysis. Signed-off-by: Nadia Derbey Cc: "Paul E. McKenney" Cc: Manfred Spraul Cc: Jim Houston Cc: Pierre Peiffer Acked-by: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/idr.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/idr.h b/include/linux/idr.h index 1af61d2..762c3f2c 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -73,6 +73,12 @@ struct idr { } #define DEFINE_IDR(name) struct idr name = IDR_INIT(name) +/* Actions to be taken after a call to _idr_sub_alloc */ +#define IDR_NEED_TO_GROW -2 +#define IDR_NOMORE_SPACE -3 + +#define _idr_rc_to_errno(rc) ((rc) == -1 ? -EAGAIN : -ENOSPC) + /* * This is what we export. */ -- cgit v1.1 From f9c46d6ea5ce138a886c3a0f10a46130afab75f5 Mon Sep 17 00:00:00 2001 From: Nadia Derbey Date: Fri, 25 Jul 2008 01:48:01 -0700 Subject: idr: make idr_find rcu-safe Make idr_find rcu-safe: it can now be called inside an rcu_read critical section. Signed-off-by: Nadia Derbey Reviewed-by: "Paul E. McKenney" Cc: Manfred Spraul Cc: Jim Houston Cc: Pierre Peiffer Acked-by: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/idr.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/linux/idr.h b/include/linux/idr.h index 762c3f2c..fa035f9 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -79,6 +79,22 @@ struct idr { #define _idr_rc_to_errno(rc) ((rc) == -1 ? -EAGAIN : -ENOSPC) +/** + * idr synchronization (stolen from radix-tree.h) + * + * idr_find() is able to be called locklessly, using RCU. The caller must + * ensure calls to this function are made within rcu_read_lock() regions. + * Other readers (lock-free or otherwise) and modifications may be running + * concurrently. + * + * It is still required that the caller manage the synchronization and + * lifetimes of the items. So if RCU lock-free lookups are used, typically + * this would mean that the items have their own locks, or are amenable to + * lock-free access; and that the items are freed by RCU (or only freed after + * having been deleted from the idr tree *and* a synchronize_rcu() grace + * period). + */ + /* * This is what we export. */ -- cgit v1.1 From 4daa28f6d8f5cda8ea0f55048e3c8811c384cbdd Mon Sep 17 00:00:00 2001 From: Manfred Spraul Date: Fri, 25 Jul 2008 01:48:04 -0700 Subject: ipc/sem.c: convert undo structures to struct list_head The undo structures contain two linked lists, the attached patch replaces them with generic struct list_head lists. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Manfred Spraul Cc: Nadia Derbey Cc: Pierre Peiffer Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sem.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/sem.h b/include/linux/sem.h index c8eaad9..6a1af1b 100644 --- a/include/linux/sem.h +++ b/include/linux/sem.h @@ -95,7 +95,7 @@ struct sem_array { struct sem *sem_base; /* ptr to first semaphore in array */ struct sem_queue *sem_pending; /* pending operations to be processed */ struct sem_queue **sem_pending_last; /* last pending operation */ - struct sem_undo *undo; /* undo requests on this array */ + struct list_head list_id; /* undo requests on this array */ unsigned long sem_nsems; /* no. of semaphores in array */ }; @@ -118,8 +118,8 @@ struct sem_queue { * when the process exits. */ struct sem_undo { - struct sem_undo * proc_next; /* next entry on this process */ - struct sem_undo * id_next; /* next entry on this semaphore set */ + struct list_head list_proc; /* per-process list: all undos from one process */ + struct list_head list_id; /* per semaphore array list: all undos for one array */ int semid; /* semaphore set identifier */ short * semadj; /* array of adjustments, one per semaphore */ }; @@ -128,9 +128,9 @@ struct sem_undo { * that may be shared among all a CLONE_SYSVSEM task group. */ struct sem_undo_list { - atomic_t refcnt; - spinlock_t lock; - struct sem_undo *proc_list; + atomic_t refcnt; + spinlock_t lock; + struct list_head list_proc; }; struct sysv_sem { -- cgit v1.1 From 2c0c29d414087f3b021059673c20a7088f5f1fff Mon Sep 17 00:00:00 2001 From: Manfred Spraul Date: Fri, 25 Jul 2008 01:48:05 -0700 Subject: ipc/sem.c: remove unused entries from struct sem_queue sem_queue.sma and sem_queue.id were never used, the attached patch removes them. Signed-off-by: Manfred Spraul Reviewed-by: Nadia Derbey Cc: Pierre Peiffer Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sem.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/sem.h b/include/linux/sem.h index 6a1af1b..87756ef 100644 --- a/include/linux/sem.h +++ b/include/linux/sem.h @@ -107,8 +107,6 @@ struct sem_queue { struct sem_undo * undo; /* undo structure */ int pid; /* process id of requesting process */ int status; /* completion status of operation */ - struct sem_array * sma; /* semaphore array for operations */ - int id; /* internal sem id */ struct sembuf * sops; /* array of pending operations */ int nsops; /* number of operations */ int alter; /* does the operation alter the array? */ -- cgit v1.1 From a1193f8ec091cd8fd309cc2982abe4499f6f2b4d Mon Sep 17 00:00:00 2001 From: Manfred Spraul Date: Fri, 25 Jul 2008 01:48:06 -0700 Subject: ipc/sem.c: convert sem_array.sem_pending to struct list_head sem_array.sem_pending is a double linked list, the attached patch converts it to struct list_head. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Manfred Spraul Reviewed-by: Nadia Derbey Cc: Pierre Peiffer Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sem.h | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/linux/sem.h b/include/linux/sem.h index 87756ef..d425993 100644 --- a/include/linux/sem.h +++ b/include/linux/sem.h @@ -93,21 +93,19 @@ struct sem_array { time_t sem_otime; /* last semop time */ time_t sem_ctime; /* last change time */ struct sem *sem_base; /* ptr to first semaphore in array */ - struct sem_queue *sem_pending; /* pending operations to be processed */ - struct sem_queue **sem_pending_last; /* last pending operation */ + struct list_head sem_pending; /* pending operations to be processed */ struct list_head list_id; /* undo requests on this array */ unsigned long sem_nsems; /* no. of semaphores in array */ }; /* One queue for each sleeping process in the system. */ struct sem_queue { - struct sem_queue * next; /* next entry in the queue */ - struct sem_queue ** prev; /* previous entry in the queue, *(q->prev) == q */ - struct task_struct* sleeper; /* this process */ - struct sem_undo * undo; /* undo structure */ + struct list_head list; /* queue of pending operations */ + struct task_struct *sleeper; /* this process */ + struct sem_undo *undo; /* undo structure */ int pid; /* process id of requesting process */ int status; /* completion status of operation */ - struct sembuf * sops; /* array of pending operations */ + struct sembuf *sops; /* array of pending operations */ int nsops; /* number of operations */ int alter; /* does the operation alter the array? */ }; -- cgit v1.1 From 380af1b33b3ff92df5cda96329b58f5d1b6b5a53 Mon Sep 17 00:00:00 2001 From: Manfred Spraul Date: Fri, 25 Jul 2008 01:48:06 -0700 Subject: ipc/sem.c: rewrite undo list locking The attached patch: - reverses the locking order of ulp->lock and sem_lock: Previously, it was first ulp->lock, then inside sem_lock. Now it's the other way around. - converts the undo structure to rcu. Benefits: - With the old locking order, IPC_RMID could not kfree the undo structures. The stale entries remained in the linked lists and were released later. - The patch fixes a a race in semtimedop(): if both IPC_RMID and a semget() that recreates exactly the same id happen between find_alloc_undo() and sem_lock, then semtimedop() would access already kfree'd memory. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Manfred Spraul Reviewed-by: Nadia Derbey Cc: Pierre Peiffer Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sem.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sem.h b/include/linux/sem.h index d425993..1b191c1 100644 --- a/include/linux/sem.h +++ b/include/linux/sem.h @@ -78,6 +78,7 @@ struct seminfo { #ifdef __KERNEL__ #include +#include struct task_struct; @@ -114,7 +115,10 @@ struct sem_queue { * when the process exits. */ struct sem_undo { - struct list_head list_proc; /* per-process list: all undos from one process */ + struct list_head list_proc; /* per-process list: all undos from one process. */ + /* rcu protected */ + struct rcu_head rcu; /* rcu struct for sem_undo() */ + struct sem_undo_list *ulp; /* sem_undo_list for the process */ struct list_head list_id; /* per semaphore array list: all undos for one array */ int semid; /* semaphore set identifier */ short * semadj; /* array of adjustments, one per semaphore */ -- cgit v1.1 From 9eefe520c814f6f62c5d36a2ddcd3fb99dfdb30e Mon Sep 17 00:00:00 2001 From: Nadia Derbey Date: Fri, 25 Jul 2008 01:48:08 -0700 Subject: ipc: do not use a negative value to re-enable msgmni automatic recomputing This patch proposes an alternative to the "magical positive-versus-negative number trick" Andrew complained about last week in http://lkml.org/lkml/2008/6/24/418. This had been introduced with the patches that scale msgmni to the amount of lowmem. With these patches, msgmni has a registered notification routine that recomputes msgmni value upon memory add/remove or ipc namespace creation/ removal. When msgmni is changed from user space (i.e. value written to the proc file), that notification routine is unregistered, and the way to make it registered back is to write a negative value into the proc file. This is the "magical positive-versus-negative number trick". To fix this, a new proc file is introduced: /proc/sys/kernel/auto_msgmni. This file acts as ON/OFF for msgmni automatic recomputing. With this patch, the process is the following: 1) kernel boots in "automatic recomputing mode" /proc/sys/kernel/msgmni contains the value that has been computed (depends on lowmem) /proc/sys/kernel/automatic_msgmni contains "1" 2) echo > /proc/sys/kernel/msgmni . sets msg_ctlmni to . de-activates automatic recomputing (i.e. if, say, some memory is added msgmni won't be recomputed anymore) . /proc/sys/kernel/automatic_msgmni now contains "0" 3) echo "0" > /proc/sys/kernel/automatic_msgmni . de-activates msgmni automatic recomputing this has the same effect as 2) except that msg_ctlmni's value stays blocked at its current value) 3) echo "1" > /proc/sys/kernel/automatic_msgmni . recomputes msgmni's value based on the current available memory size and number of ipc namespaces . re-activates automatic recomputing for msgmni. Signed-off-by: Nadia Derbey Cc: Solofo Ramangalahy Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ipc_namespace.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/ipc_namespace.h b/include/linux/ipc_namespace.h index ea6c18a..ea330f9 100644 --- a/include/linux/ipc_namespace.h +++ b/include/linux/ipc_namespace.h @@ -36,6 +36,7 @@ struct ipc_namespace { int msg_ctlmni; atomic_t msg_bytes; atomic_t msg_hdrs; + int auto_msgmni; size_t shm_ctlmax; size_t shm_ctlall; @@ -53,7 +54,7 @@ extern atomic_t nr_ipc_ns; extern int register_ipcns_notifier(struct ipc_namespace *); extern int cond_register_ipcns_notifier(struct ipc_namespace *); -extern int unregister_ipcns_notifier(struct ipc_namespace *); +extern void unregister_ipcns_notifier(struct ipc_namespace *); extern int ipcns_notify(unsigned long); #else /* CONFIG_SYSVIPC */ -- cgit v1.1 From 79885b227740b9c7d3057f2de556f4098d37cc8f Mon Sep 17 00:00:00 2001 From: "Edgar E. Iglesias" Date: Fri, 25 Jul 2008 01:48:10 -0700 Subject: elf: use ELF_CORE_EFLAGS for kcore ELF header flags ELF_CORE_EFLAGS is already used by the binfmt_elf coredumper to set correct arch specific ELF header flags on coredumps. Use it for kcore dumps as well. At the moment, this affects the CRIS and the H8300 arch. Signed-off-by: Edgar E. Iglesias Cc: Mikael Starvik Cc: Yoshinori Sato Cc: Ralf Baechle Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-h8300/elf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-h8300/elf.h b/include/asm-h8300/elf.h index 26bfc7e..a8b57d1f 100644 --- a/include/asm-h8300/elf.h +++ b/include/asm-h8300/elf.h @@ -26,10 +26,10 @@ typedef unsigned long elf_fpregset_t; #define ELF_DATA ELFDATA2MSB #define ELF_ARCH EM_H8_300 #if defined(__H8300H__) -#define ELF_FLAGS 0x810000 +#define ELF_CORE_EFLAGS 0x810000 #endif #if defined(__H8300S__) -#define ELF_FLAGS 0x820000 +#define ELF_CORE_EFLAGS 0x820000 #endif #define ELF_PLAT_INIT(_r) _r->er1 = 0 -- cgit v1.1 From d805dda412346225a50af2d399d958a4bc676c38 Mon Sep 17 00:00:00 2001 From: Abdel Benamrouche Date: Fri, 25 Jul 2008 01:48:25 -0700 Subject: fs/partition/check.c: fix return value warning fs/partitions/check.c:381: warning: ignoring return value of ___device_add___, declared with attribute warn_unused_result [akpm@linux-foundation.org: multiple-return-statements-per-function are evil] Signed-off-by: Abdel Benamrouche Cc: Jens Axboe Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/genhd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/genhd.h b/include/linux/genhd.h index e878741..118216f 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -541,7 +541,7 @@ extern dev_t blk_lookup_devt(const char *name, int part); extern char *disk_name (struct gendisk *hd, int part, char *buf); extern int rescan_partitions(struct gendisk *disk, struct block_device *bdev); -extern void add_partition(struct gendisk *, int, sector_t, sector_t, int); +extern int __must_check add_partition(struct gendisk *, int, sector_t, sector_t, int); extern void delete_partition(struct gendisk *, int); extern void printk_all_partitions(void); -- cgit v1.1 From 6e644c3126149b65460610fe5a00d8a162092abe Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:48:28 -0700 Subject: move proc_kmsg_operations to fs/proc/internal.h This patch moves the extern of struct proc_kmsg_operations to fs/proc/internal.h and adds an #include "internal.h" to fs/proc/kmsg.c so that the latter sees the former. Signed-off-by: Adrian Bunk Cc: Alexey Dobriyan Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/proc_fs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index 15a9eaf..cdabc2f 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -138,7 +138,6 @@ extern int proc_readdir(struct file *, void *, filldir_t); extern struct dentry *proc_lookup(struct inode *, struct dentry *, struct nameidata *); extern const struct file_operations proc_kcore_operations; -extern const struct file_operations proc_kmsg_operations; extern const struct file_operations ppc_htab_operations; extern int pid_ns_prepare_proc(struct pid_namespace *ns); -- cgit v1.1 From 881adb85358309ea9c6f707394002719982ec607 Mon Sep 17 00:00:00 2001 From: Alexey Dobriyan Date: Fri, 25 Jul 2008 01:48:29 -0700 Subject: proc: always do ->release Current two-stage scheme of removing PDE emphasizes one bug in proc: open rmmod remove_proc_entry close ->release won't be called because ->proc_fops were cleared. In simple cases it's small memory leak. For every ->open, ->release has to be done. List of openers is introduced which is traversed at remove_proc_entry() if neeeded. Discussions with Al long ago (sigh). Signed-off-by: Alexey Dobriyan Cc: Al Viro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/proc_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index cdabc2f..f560d17 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -79,6 +79,7 @@ struct proc_dir_entry { int pde_users; /* number of callers into module in progress */ spinlock_t pde_unload_lock; /* proc_fops checks and pde_users bumps */ struct completion *pde_unload_completion; + struct list_head pde_openers; /* who did ->open, but not ->release */ }; struct kcore_list { -- cgit v1.1 From 3ae4eed34be0177a8e003411a84e4ee212adbced Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 01:48:34 -0700 Subject: proper pid{hash,map}_init() prototypes This patch adds proper prototypes for pid{hash,map}_init() in include/linux/pid_namespace.h Signed-off-by: Adrian Bunk Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pid_namespace.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h index caff528..1a49ab5 100644 --- a/include/linux/pid_namespace.h +++ b/include/linux/pid_namespace.h @@ -85,4 +85,7 @@ static inline struct task_struct *task_child_reaper(struct task_struct *tsk) return tsk->nsproxy->pid_ns->child_reaper; } +void pidhash_init(void); +void pidmap_init(void); + #endif /* _LINUX_PID_NS_H */ -- cgit v1.1 From 33166b1ffca5e1945246bcaa77d72a22b0d3e531 Mon Sep 17 00:00:00 2001 From: Richard Kennedy Date: Fri, 25 Jul 2008 01:48:35 -0700 Subject: shrink struct pid by removing padding on 64 bit builds When struct pid is built on a 64 bit platform gcc has to insert padding to maintain the correct alignment, by simply reordering its members the memory usage shrinks from 88 bytes to 80. I've successfully run with this patch on my desktop AMD64 machine. There are no significant kernel size changes to a default config.X86_64 on the latest git v2.6.26-rc1 text data bss dec hex filename 5404828 976760 734280 7115868 6c945c vmlinux 5404811 976760 734280 7115851 6c944b vmlinux.pid-patch Acked-by: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pid.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pid.h b/include/linux/pid.h index c21c7e8..6f084b9 100644 --- a/include/linux/pid.h +++ b/include/linux/pid.h @@ -57,10 +57,10 @@ struct upid { struct pid { atomic_t count; + unsigned int level; /* lists of tasks that use this pid */ struct hlist_head tasks[PIDTYPE_MAX]; struct rcu_head rcu; - unsigned int level; struct upid numbers[1]; }; -- cgit v1.1 From 19b0cfcca41dd772065671ad0584e1cea0f3fd13 Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:48:35 -0700 Subject: pidns: remove now unused kill_proc function This function operated on a pid_t to kill a task, which is no longer valid in a containerized system. It has finally lost all its users and we can safely remove it from the tree. Signed-off-by: Pavel Emelyanov Cc: Oleg Nesterov Cc: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 0560999..134cb5c 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1800,7 +1800,6 @@ extern void force_sig(int, struct task_struct *); extern void force_sig_specific(int, struct task_struct *); extern int send_sig(int, struct task_struct *, int); extern void zap_other_threads(struct task_struct *p); -extern int kill_proc(pid_t, int, int); extern struct sigqueue *sigqueue_alloc(void); extern void sigqueue_free(struct sigqueue *); extern int send_sigqueue(struct sigqueue *, struct task_struct *, int group); -- cgit v1.1 From e49859e71e0318b564de1546bdc30fab738f9deb Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:48:36 -0700 Subject: pidns: remove now unused find_pid function. This one had the only users so far - the kill_proc, which is removed, so drop this (invalid in namespaced world) call too. And of course - erase all references on it from comments. Signed-off-by: Pavel Emelyanov Cc: Oleg Nesterov Cc: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pid.h | 4 +--- include/linux/sched.h | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/pid.h b/include/linux/pid.h index 6f084b9..ff1b2a5 100644 --- a/include/linux/pid.h +++ b/include/linux/pid.h @@ -48,7 +48,7 @@ enum pid_type */ struct upid { - /* Try to keep pid_chain in the same cacheline as nr for find_pid */ + /* Try to keep pid_chain in the same cacheline as nr for find_vpid */ int nr; struct pid_namespace *ns; struct hlist_node pid_chain; @@ -105,14 +105,12 @@ extern struct pid_namespace init_pid_ns; * or rcu_read_lock() held. * * find_pid_ns() finds the pid in the namespace specified - * find_pid() find the pid by its global id, i.e. in the init namespace * find_vpid() finr the pid by its virtual id, i.e. in the current namespace * * see also find_task_by_pid() set in include/linux/sched.h */ extern struct pid *find_pid_ns(int nr, struct pid_namespace *ns); extern struct pid *find_vpid(int nr); -extern struct pid *find_pid(int nr); /* * Lookup a PID in the hash table, and return with it's count elevated. diff --git a/include/linux/sched.h b/include/linux/sched.h index 134cb5c..182da15 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1718,7 +1718,7 @@ extern struct pid_namespace init_pid_ns; * find_task_by_pid(): * finds a task by its global pid * - * see also find_pid() etc in include/linux/pid.h + * see also find_vpid() etc in include/linux/pid.h */ extern struct task_struct *find_task_by_pid_type_ns(int type, int pid, -- cgit v1.1 From dbda0de52618d13d1b927c7ba7bb839cfddc4e8c Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:48:37 -0700 Subject: pidns: remove find_task_by_pid, unused for a long time It seems to me that it was a mistake marking this function as deprecated and scheduling it for removal, rather than resolutely removing it after the last caller's death. Anyway - better late, then never. Signed-off-by: Pavel Emelyanov Cc: Oleg Nesterov Cc: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pid.h | 2 +- include/linux/sched.h | 6 ------ 2 files changed, 1 insertion(+), 7 deletions(-) (limited to 'include') diff --git a/include/linux/pid.h b/include/linux/pid.h index ff1b2a5..22921ac 100644 --- a/include/linux/pid.h +++ b/include/linux/pid.h @@ -107,7 +107,7 @@ extern struct pid_namespace init_pid_ns; * find_pid_ns() finds the pid in the namespace specified * find_vpid() finr the pid by its virtual id, i.e. in the current namespace * - * see also find_task_by_pid() set in include/linux/sched.h + * see also find_task_by_vpid() set in include/linux/sched.h */ extern struct pid *find_pid_ns(int nr, struct pid_namespace *ns); extern struct pid *find_vpid(int nr); diff --git a/include/linux/sched.h b/include/linux/sched.h index 182da15..354ef47 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1715,8 +1715,6 @@ extern struct pid_namespace init_pid_ns; * finds a task by its pid in the specified namespace * find_task_by_vpid(): * finds a task by its virtual pid - * find_task_by_pid(): - * finds a task by its global pid * * see also find_vpid() etc in include/linux/pid.h */ @@ -1724,10 +1722,6 @@ extern struct pid_namespace init_pid_ns; extern struct task_struct *find_task_by_pid_type_ns(int type, int pid, struct pid_namespace *ns); -static inline struct task_struct *__deprecated find_task_by_pid(pid_t nr) -{ - return find_task_by_pid_type_ns(PIDTYPE_PID, nr, &init_pid_ns); -} extern struct task_struct *find_task_by_vpid(pid_t nr); extern struct task_struct *find_task_by_pid_ns(pid_t nr, struct pid_namespace *ns); -- cgit v1.1 From 49b5cf34727a6c1be1568ab28e89a2d9a6bf51e0 Mon Sep 17 00:00:00 2001 From: Jonathan Lim Date: Fri, 25 Jul 2008 01:48:40 -0700 Subject: accounting: account for user time when updating memory integrals Adapt acct_update_integrals() to include user time when calculating the time difference. The units of acct_rss_mem1 and acct_vm_mem1 are also changed from pages-jiffies to pages-usecs to avoid calling jiffies_to_usecs() in xacct_add_tsk() which might overflow. Signed-off-by: Jonathan Lim Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 354ef47..af780f2 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1257,7 +1257,7 @@ struct task_struct { #if defined(CONFIG_TASK_XACCT) u64 acct_rss_mem1; /* accumulated rss usage */ u64 acct_vm_mem1; /* accumulated virtual memory usage */ - cputime_t acct_stimexpd;/* stime since last update */ + cputime_t acct_timexpd; /* stime + utime since last update */ #endif #ifdef CONFIG_CPUSETS nodemask_t mems_allowed; -- cgit v1.1 From 20fad13ac66ac001c19220d3d08b4de5b6cca6e1 Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:48:43 -0700 Subject: pidns: add the struct bsd_acct_struct pointer on pid_namespace struct All the bsdacct-related info will be stored in the area, pointer by this one. It will be NULL automatically for all new namespaces. Signed-off-by: Pavel Emelyanov Cc: Balbir Singh Cc: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pid_namespace.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/pid_namespace.h b/include/linux/pid_namespace.h index 1a49ab5..1af82c4 100644 --- a/include/linux/pid_namespace.h +++ b/include/linux/pid_namespace.h @@ -14,6 +14,8 @@ struct pidmap { #define PIDMAP_ENTRIES ((PID_MAX_LIMIT + 8*PAGE_SIZE - 1)/PAGE_SIZE/8) +struct bsd_acct_struct; + struct pid_namespace { struct kref kref; struct pidmap pidmap[PIDMAP_ENTRIES]; @@ -25,6 +27,9 @@ struct pid_namespace { #ifdef CONFIG_PROC_FS struct vfsmount *proc_mnt; #endif +#ifdef CONFIG_BSD_PROCESS_ACCT + struct bsd_acct_struct *bacct; +#endif }; extern struct pid_namespace init_pid_ns; -- cgit v1.1 From 0b6b030fc30d169bb406b34b4fc60d99dde4a9c6 Mon Sep 17 00:00:00 2001 From: Pavel Emelyanov Date: Fri, 25 Jul 2008 01:48:47 -0700 Subject: bsdacct: switch from global bsd_acct_struct instance to per-pidns one Allocate the structure on the first call to sys_acct(). After this each namespace, that ordered the accounting, will live with this structure till its own death. Two notes - routines, that close the accounting on fs umount time use the init_pid_ns's acct by now; - accounting routine accounts to dying task's namespace (also by now). Signed-off-by: Pavel Emelyanov Cc: Balbir Singh Cc: "Eric W. Biederman" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/acct.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/acct.h b/include/linux/acct.h index e8cae54..882dc72 100644 --- a/include/linux/acct.h +++ b/include/linux/acct.h @@ -120,17 +120,20 @@ struct acct_v3 struct vfsmount; struct super_block; struct pacct_struct; +struct pid_namespace; extern void acct_auto_close_mnt(struct vfsmount *m); extern void acct_auto_close(struct super_block *sb); extern void acct_init_pacct(struct pacct_struct *pacct); extern void acct_collect(long exitcode, int group_dead); extern void acct_process(void); +extern void acct_exit_ns(struct pid_namespace *); #else #define acct_auto_close_mnt(x) do { } while (0) #define acct_auto_close(x) do { } while (0) #define acct_init_pacct(x) do { } while (0) #define acct_collect(x,y) do { } while (0) #define acct_process() do { } while (0) +#define acct_exit_ns(ns) do { } while (0) #endif /* -- cgit v1.1 From 297c5d92634c809cef23d73e7b2556f2528ff7e2 Mon Sep 17 00:00:00 2001 From: Andrea Righi Date: Fri, 25 Jul 2008 01:48:49 -0700 Subject: task IO accounting: provide distinct tgid/tid I/O statistics Report per-thread I/O statistics in /proc/pid/task/tid/io and aggregate parent I/O statistics in /proc/pid/io. This approach follows the same model used to account per-process and per-thread CPU times. As a practial application, this allows for example to quickly find the top I/O consumer when a process spawns many child threads that perform the actual I/O work, because the aggregated I/O statistics can always be found in /proc/pid/io. [ Oleg Nesterov points out that we should check that the task is still alive before we iterate over the threads, but also says that we can do that fixup on top of this later. - Linus ] Acked-by: Balbir Singh Signed-off-by: Andrea Righi Cc: Matt Heaton Cc: Shailabh Nagar Acked-by-with-comments: Oleg Nesterov Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index af780f2..d22ffe0 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -506,6 +506,10 @@ struct signal_struct { unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt; unsigned long inblock, oublock, cinblock, coublock; +#ifdef CONFIG_TASK_XACCT + u64 rchar, wchar, syscr, syscw; +#endif + struct task_io_accounting ioac; /* * Cumulative ns of scheduled CPU time for dead threads in the -- cgit v1.1 From 873b47717732c2f33a4b14de02571a4295a02f0c Mon Sep 17 00:00:00 2001 From: Keika Kobayashi Date: Fri, 25 Jul 2008 01:48:52 -0700 Subject: per-task-delay-accounting: add memory reclaim delay Sometimes, application responses become bad under heavy memory load. Applications take a bit time to reclaim memory. The statistics, how long memory reclaim takes, will be useful to measure memory usage. This patch adds accounting memory reclaim to per-task-delay-accounting for accounting the time of do_try_to_free_pages(). - When System is under low memory load, memory reclaim may not occur. $ free total used free shared buffers cached Mem: 8197800 1577300 6620500 0 4808 1516724 -/+ buffers/cache: 55768 8142032 Swap: 16386292 0 16386292 $ vmstat 1 procs -----------memory---------- ---swap-- -----io---- -system-- ----cpu---- r b swpd free buff cache si so bi bo in cs us sy id wa 0 0 0 5069748 10612 3014060 0 0 0 0 3 26 0 0 100 0 0 0 0 5069748 10612 3014060 0 0 0 0 4 22 0 0 100 0 0 0 0 5069748 10612 3014060 0 0 0 0 3 18 0 0 100 0 Measure the time of tar command. $ ls -s test.dat 1501472 test.dat $ time tar cvf test.tar test.dat real 0m13.388s user 0m0.116s sys 0m5.304s $ ./delayget -d -p CPU count real total virtual total delay total 428 5528345500 5477116080 62749891 IO count delay total 338 8078977189 SWAP count delay total 0 0 RECLAIM count delay total 0 0 - When system is under heavy memory load memory reclaim may occur. $ vmstat 1 procs -----------memory---------- ---swap-- -----io---- -system-- ----cpu---- r b swpd free buff cache si so bi bo in cs us sy id wa 0 0 7159032 49724 1812 3012 0 0 0 0 3 24 0 0 100 0 0 0 7159032 49724 1812 3012 0 0 0 0 4 24 0 0 100 0 0 0 7159032 49848 1812 3012 0 0 0 0 3 22 0 0 100 0 In this case, one process uses more 8G memory by execution of malloc() and memset(). $ time tar cvf test.tar test.dat real 1m38.563s <- increased by 85 sec user 0m0.140s sys 0m7.060s $ ./delayget -d -p CPU count real total virtual total delay total 9021 7140446250 7315277975 923201824 IO count delay total 8965 90466349669 SWAP count delay total 3 21036367 RECLAIM count delay total 740 61011951153 In the later case, the value of RECLAIM is increasing. So, taskstats can show how much memory reclaim influences TAT. Signed-off-by: Keika Kobayashi Acked-by: Balbir Singh Acked-by: KOSAKI Motohiro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/delayacct.h | 19 +++++++++++++++++++ include/linux/sched.h | 4 ++++ 2 files changed, 23 insertions(+) (limited to 'include') diff --git a/include/linux/delayacct.h b/include/linux/delayacct.h index ab94bc0..f352f06 100644 --- a/include/linux/delayacct.h +++ b/include/linux/delayacct.h @@ -39,6 +39,8 @@ extern void __delayacct_blkio_start(void); extern void __delayacct_blkio_end(void); extern int __delayacct_add_tsk(struct taskstats *, struct task_struct *); extern __u64 __delayacct_blkio_ticks(struct task_struct *); +extern void __delayacct_freepages_start(void); +extern void __delayacct_freepages_end(void); static inline int delayacct_is_task_waiting_on_io(struct task_struct *p) { @@ -107,6 +109,18 @@ static inline __u64 delayacct_blkio_ticks(struct task_struct *tsk) return 0; } +static inline void delayacct_freepages_start(void) +{ + if (current->delays) + __delayacct_freepages_start(); +} + +static inline void delayacct_freepages_end(void) +{ + if (current->delays) + __delayacct_freepages_end(); +} + #else static inline void delayacct_set_flag(int flag) {} @@ -129,6 +143,11 @@ static inline __u64 delayacct_blkio_ticks(struct task_struct *tsk) { return 0; } static inline int delayacct_is_task_waiting_on_io(struct task_struct *p) { return 0; } +static inline void delayacct_freepages_start(void) +{} +static inline void delayacct_freepages_end(void) +{} + #endif /* CONFIG_TASK_DELAY_ACCT */ #endif diff --git a/include/linux/sched.h b/include/linux/sched.h index d22ffe0..42036ff 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -672,6 +672,10 @@ struct task_delay_info { /* io operations performed */ u32 swapin_count; /* total count of the number of swapin block */ /* io operations performed */ + + struct timespec freepages_start, freepages_end; + u64 freepages_delay; /* wait for memory reclaim */ + u32 freepages_count; /* total count of memory reclaim */ }; #endif /* CONFIG_TASK_DELAY_ACCT */ -- cgit v1.1 From 016ae219b920c4e606088761d3d6070cdf8ba706 Mon Sep 17 00:00:00 2001 From: Keika Kobayashi Date: Fri, 25 Jul 2008 01:48:53 -0700 Subject: per-task-delay-accounting: update taskstats for memory reclaim delay Add members for memory reclaim delay to taskstats, and accumulate them in __delayacct_add_tsk() . Signed-off-by: Keika Kobayashi Cc: Hiroshi Shimamoto Cc: Balbir Singh Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/taskstats.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/taskstats.h b/include/linux/taskstats.h index 5d69c07..18269e9 100644 --- a/include/linux/taskstats.h +++ b/include/linux/taskstats.h @@ -31,7 +31,7 @@ */ -#define TASKSTATS_VERSION 6 +#define TASKSTATS_VERSION 7 #define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN * in linux/sched.h */ @@ -157,6 +157,10 @@ struct taskstats { __u64 ac_utimescaled; /* utime scaled on frequency etc */ __u64 ac_stimescaled; /* stime scaled on frequency etc */ __u64 cpu_scaled_run_real_total; /* scaled cpu_run_real_total */ + + /* Delay waiting for memory reclaim */ + __u64 freepages_count; + __u64 freepages_delay_total; }; -- cgit v1.1 From bde74e4bc64415b142e556a34d295a52a1b7da9d Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Fri, 25 Jul 2008 01:48:57 -0700 Subject: locks: add special return value for asynchronous locks Use a special error value FILE_LOCK_DEFERRED to mean that a locking operation returned asynchronously. This is returned by posix_lock_file() for sleeping locks to mean that the lock has been queued on the block list, and will be woken up when it might become available and needs to be retried (either fl_lmops->fl_notify() is called or fl_wait is woken up). f_op->lock() to mean either the above, or that the filesystem will call back with fl_lmops->fl_grant() when the result of the locking operation is known. The filesystem can do this for sleeping as well as non-sleeping locks. This is to make sure, that return values of -EAGAIN and -EINPROGRESS by filesystems are not mistaken to mean an asynchronous locking. This also makes error handling in fs/locks.c and lockd/svclock.c slightly cleaner. Signed-off-by: Miklos Szeredi Cc: Trond Myklebust Cc: "J. Bruce Fields" Cc: Matthew Wilcox Cc: David Teigland Cc: Christoph Hellwig Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/fs.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 4b86f80..49d8eb7 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -886,6 +886,12 @@ static inline int file_check_writeable(struct file *filp) #define FL_SLEEP 128 /* A blocking lock */ /* + * Special return value from posix_lock_file() and vfs_lock_file() for + * asynchronous locking. + */ +#define FILE_LOCK_DEFERRED 1 + +/* * The POSIX file lock owner is determined by * the "struct files_struct" in the thread group * (or NULL for no owner - BSD locks). -- cgit v1.1 From 33670fa296860283f04a7975b8c790f101e43a6e Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Fri, 25 Jul 2008 01:49:02 -0700 Subject: fuse: nfs export special lookups Implement the get_parent export operation by sending a LOOKUP request with ".." as the name. Implement looking up an inode by node ID after it has been evicted from the cache. This is done by seding a LOOKUP request with "." as the name (for all file types, not just directories). The filesystem can set the FUSE_EXPORT_SUPPORT flag in the INIT reply, to indicate that it supports these special lookups. Thanks to John Muir for the original implementation of this feature. Signed-off-by: Miklos Szeredi Cc: "J. Bruce Fields" Cc: Trond Myklebust Cc: Matthew Wilcox Cc: David Teigland Cc: Christoph Hellwig Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/fuse.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/fuse.h b/include/linux/fuse.h index d482821..265635d 100644 --- a/include/linux/fuse.h +++ b/include/linux/fuse.h @@ -104,11 +104,14 @@ struct fuse_file_lock { /** * INIT request/reply flags + * + * FUSE_EXPORT_SUPPORT: filesystem handles lookups of "." and ".." */ #define FUSE_ASYNC_READ (1 << 0) #define FUSE_POSIX_LOCKS (1 << 1) #define FUSE_FILE_OPS (1 << 2) #define FUSE_ATOMIC_O_TRUNC (1 << 3) +#define FUSE_EXPORT_SUPPORT (1 << 4) #define FUSE_BIG_WRITES (1 << 5) /** -- cgit v1.1 From 8f421c595a9145959d8aab09172743132abdffdb Mon Sep 17 00:00:00 2001 From: Arthur Jones Date: Fri, 25 Jul 2008 01:49:04 -0700 Subject: edac: i5100 new intel chipset driver Preliminary support for the Intel 5100 MCH. CE and UE errors are reported along with the current DIMM label information and other memory parameters. Reasons why this is preliminary: 1) This chip has 2 independent memory controllers which, for best perforance, use interleaved accesses to the DDR2 memory. This architecture does not map very well to the current edac data structures which depend on symmetric channel access to the interleaved data. Without core changes, the best I could do for now is to map both memory controllers to different csrows (first all ranks of controller 0, then all ranks of controller 1). Someone much more familiar with the edac core than I will probably need to come up with a more general data structure to handle the interleaving and de-interleaving of the two memory controllers. 2) I have not yet tackled the de-interleaving of the rank/controller address space into the physical address space of the CPU. There is nothing fundamentally missing, it is just ending up to be a lot of code, and I'd rather keep it separate for now, esp since it doesn't work yet... 3) The code depends on a particular i5100 chip select to DIMM mainboard chip select mapping. This mapping seems obvious to me in order to support dual and single ranked memory, but it is not unique and DIMM labels could be wrong on other mainboards. There is no way to query this mapping that I know of. 4) The code requires that the i5100 is in 32GB mode. Only 4 ranks per controller, 2 ranks per DIMM are supported. I do not have hardware (nor do I expect to have hardware anytime soon) for the 48GB (6 ranks per controller) mode. 5) The serial presence detect code should be broken out into a "real" i2c driver so that decode-dimms.pl can work. Signed-off-by: Arthur Jones Signed-off-by: Doug Thompson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pci_ids.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 119ae7b..c3b1761 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2400,6 +2400,9 @@ #define PCI_DEVICE_ID_INTEL_ICH10_4 0x3a30 #define PCI_DEVICE_ID_INTEL_ICH10_5 0x3a60 #define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f +#define PCI_DEVICE_ID_INTEL_5100_16 0x65f0 +#define PCI_DEVICE_ID_INTEL_5100_21 0x65f5 +#define PCI_DEVICE_ID_INTEL_5100_22 0x65f6 #define PCI_DEVICE_ID_INTEL_5400_ERR 0x4030 #define PCI_DEVICE_ID_INTEL_5400_FBD0 0x4035 #define PCI_DEVICE_ID_INTEL_5400_FBD1 0x4036 -- cgit v1.1 From 7dcf2a9fced59e58e4694cdcf15850c01fdba89b Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Tue, 1 Jul 2008 19:27:16 +0300 Subject: remove dummy asm/kvm.h files This patch removes the dummy asm/kvm.h files on architectures not (yet) supporting KVM and uses the same conditional headers installation as already used for a.out.h . Also removed are superfluous install rules in the s390 and x86 Kbuild files (they are already in Kbuild.asm). Signed-off-by: Adrian Bunk Acked-by: Sam Ravnborg Signed-off-by: David Woodhouse --- include/asm-alpha/kvm.h | 6 ------ include/asm-arm/kvm.h | 6 ------ include/asm-avr32/kvm.h | 6 ------ include/asm-blackfin/kvm.h | 6 ------ include/asm-cris/kvm.h | 6 ------ include/asm-frv/kvm.h | 6 ------ include/asm-generic/Kbuild.asm | 2 ++ include/asm-h8300/kvm.h | 6 ------ include/asm-m32r/kvm.h | 6 ------ include/asm-m68k/kvm.h | 6 ------ include/asm-m68knommu/kvm.h | 6 ------ include/asm-mips/kvm.h | 6 ------ include/asm-mn10300/kvm.h | 6 ------ include/asm-parisc/kvm.h | 6 ------ include/asm-s390/Kbuild | 1 - include/asm-sh/kvm.h | 6 ------ include/asm-sparc/kvm.h | 6 ------ include/asm-sparc64/kvm.h | 1 - include/asm-um/kvm.h | 6 ------ include/asm-x86/Kbuild | 1 - include/asm-xtensa/kvm.h | 6 ------ include/linux/Kbuild | 2 ++ 22 files changed, 4 insertions(+), 105 deletions(-) delete mode 100644 include/asm-alpha/kvm.h delete mode 100644 include/asm-arm/kvm.h delete mode 100644 include/asm-avr32/kvm.h delete mode 100644 include/asm-blackfin/kvm.h delete mode 100644 include/asm-cris/kvm.h delete mode 100644 include/asm-frv/kvm.h delete mode 100644 include/asm-h8300/kvm.h delete mode 100644 include/asm-m32r/kvm.h delete mode 100644 include/asm-m68k/kvm.h delete mode 100644 include/asm-m68knommu/kvm.h delete mode 100644 include/asm-mips/kvm.h delete mode 100644 include/asm-mn10300/kvm.h delete mode 100644 include/asm-parisc/kvm.h delete mode 100644 include/asm-sh/kvm.h delete mode 100644 include/asm-sparc/kvm.h delete mode 100644 include/asm-sparc64/kvm.h delete mode 100644 include/asm-um/kvm.h delete mode 100644 include/asm-xtensa/kvm.h (limited to 'include') diff --git a/include/asm-alpha/kvm.h b/include/asm-alpha/kvm.h deleted file mode 100644 index b9daec4..0000000 --- a/include/asm-alpha/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_ALPHA_H -#define __LINUX_KVM_ALPHA_H - -/* alpha does not support KVM */ - -#endif diff --git a/include/asm-arm/kvm.h b/include/asm-arm/kvm.h deleted file mode 100644 index cb3c08c..0000000 --- a/include/asm-arm/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_ARM_H -#define __LINUX_KVM_ARM_H - -/* arm does not support KVM */ - -#endif diff --git a/include/asm-avr32/kvm.h b/include/asm-avr32/kvm.h deleted file mode 100644 index 8c57770..0000000 --- a/include/asm-avr32/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_AVR32_H -#define __LINUX_KVM_AVR32_H - -/* avr32 does not support KVM */ - -#endif diff --git a/include/asm-blackfin/kvm.h b/include/asm-blackfin/kvm.h deleted file mode 100644 index e3477d7..0000000 --- a/include/asm-blackfin/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_BLACKFIN_H -#define __LINUX_KVM_BLACKFIN_H - -/* blackfin does not support KVM */ - -#endif diff --git a/include/asm-cris/kvm.h b/include/asm-cris/kvm.h deleted file mode 100644 index c860f51..0000000 --- a/include/asm-cris/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_CRIS_H -#define __LINUX_KVM_CRIS_H - -/* cris does not support KVM */ - -#endif diff --git a/include/asm-frv/kvm.h b/include/asm-frv/kvm.h deleted file mode 100644 index 9c8a4f0..0000000 --- a/include/asm-frv/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_FRV_H -#define __LINUX_KVM_FRV_H - -/* frv does not support KVM */ - -#endif diff --git a/include/asm-generic/Kbuild.asm b/include/asm-generic/Kbuild.asm index 7cd25b8..1170dc6 100644 --- a/include/asm-generic/Kbuild.asm +++ b/include/asm-generic/Kbuild.asm @@ -1,4 +1,6 @@ +ifneq ($(wildcard $(srctree)/include/asm-$(SRCARCH)/kvm.h),) header-y += kvm.h +endif ifneq ($(wildcard $(srctree)/include/asm-$(SRCARCH)/a.out.h),) unifdef-y += a.out.h diff --git a/include/asm-h8300/kvm.h b/include/asm-h8300/kvm.h deleted file mode 100644 index bdbed7b..0000000 --- a/include/asm-h8300/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_H8300_H -#define __LINUX_KVM_H8300_H - -/* h8300 does not support KVM */ - -#endif diff --git a/include/asm-m32r/kvm.h b/include/asm-m32r/kvm.h deleted file mode 100644 index 99a40515..0000000 --- a/include/asm-m32r/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_M32R_H -#define __LINUX_KVM_M32R_H - -/* m32r does not support KVM */ - -#endif diff --git a/include/asm-m68k/kvm.h b/include/asm-m68k/kvm.h deleted file mode 100644 index 7ed27fc..0000000 --- a/include/asm-m68k/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_M68K_H -#define __LINUX_KVM_M68K_H - -/* m68k does not support KVM */ - -#endif diff --git a/include/asm-m68knommu/kvm.h b/include/asm-m68knommu/kvm.h deleted file mode 100644 index b49d425..0000000 --- a/include/asm-m68knommu/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_M68KNOMMU_H -#define __LINUX_KVM_M68KNOMMU_H - -/* m68knommu does not support KVM */ - -#endif diff --git a/include/asm-mips/kvm.h b/include/asm-mips/kvm.h deleted file mode 100644 index 093a5b7..0000000 --- a/include/asm-mips/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_MIPS_H -#define __LINUX_KVM_MIPS_H - -/* mips does not support KVM */ - -#endif diff --git a/include/asm-mn10300/kvm.h b/include/asm-mn10300/kvm.h deleted file mode 100644 index f6b609f..0000000 --- a/include/asm-mn10300/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_MN10300_H -#define __LINUX_KVM_MN10300_H - -/* mn10300 does not support KVM */ - -#endif diff --git a/include/asm-parisc/kvm.h b/include/asm-parisc/kvm.h deleted file mode 100644 index 00cc458..0000000 --- a/include/asm-parisc/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_PARISC_H -#define __LINUX_KVM_PARISC_H - -/* parisc does not support KVM */ - -#endif diff --git a/include/asm-s390/Kbuild b/include/asm-s390/Kbuild index bb5e9ed..63a2341 100644 --- a/include/asm-s390/Kbuild +++ b/include/asm-s390/Kbuild @@ -7,7 +7,6 @@ header-y += tape390.h header-y += ucontext.h header-y += vtoc.h header-y += zcrypt.h -header-y += kvm.h header-y += chsc.h unifdef-y += cmb.h diff --git a/include/asm-sh/kvm.h b/include/asm-sh/kvm.h deleted file mode 100644 index 6af51db..0000000 --- a/include/asm-sh/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_SH_H -#define __LINUX_KVM_SH_H - -/* sh does not support KVM */ - -#endif diff --git a/include/asm-sparc/kvm.h b/include/asm-sparc/kvm.h deleted file mode 100644 index 2e5478da..0000000 --- a/include/asm-sparc/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_SPARC_H -#define __LINUX_KVM_SPARC_H - -/* sparc does not support KVM */ - -#endif diff --git a/include/asm-sparc64/kvm.h b/include/asm-sparc64/kvm.h deleted file mode 100644 index 53564ad..0000000 --- a/include/asm-sparc64/kvm.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-um/kvm.h b/include/asm-um/kvm.h deleted file mode 100644 index 66aa770..0000000 --- a/include/asm-um/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_UM_H -#define __LINUX_KVM_UM_H - -/* um does not support KVM */ - -#endif diff --git a/include/asm-x86/Kbuild b/include/asm-x86/Kbuild index 1e35545..811e982 100644 --- a/include/asm-x86/Kbuild +++ b/include/asm-x86/Kbuild @@ -3,7 +3,6 @@ include include/asm-generic/Kbuild.asm header-y += boot.h header-y += bootparam.h header-y += debugreg.h -header-y += kvm.h header-y += ldt.h header-y += msr-index.h header-y += prctl.h diff --git a/include/asm-xtensa/kvm.h b/include/asm-xtensa/kvm.h deleted file mode 100644 index bda4e33..0000000 --- a/include/asm-xtensa/kvm.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __LINUX_KVM_XTENSA_H -#define __LINUX_KVM_XTENSA_H - -/* xtensa does not support KVM */ - -#endif diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 71d70d1..402c8f5 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -256,7 +256,9 @@ unifdef-y += kd.h unifdef-y += kernelcapi.h unifdef-y += kernel.h unifdef-y += keyboard.h +ifneq ($(wildcard $(srctree)/include/asm-$(SRCARCH)/kvm.h),) unifdef-y += kvm.h +endif unifdef-y += llc.h unifdef-y += loop.h unifdef-y += lp.h -- cgit v1.1 From c6af5e9f8a57467df2e55e428316a43480174521 Mon Sep 17 00:00:00 2001 From: Johannes Weiner Date: Fri, 25 Jul 2008 15:48:04 +0200 Subject: bootmem: Move node allocation macros back to !HAVE_ARCH_BOOTMEM_NODE These got unintentionally moved, put them back as x86 provides its own versions. Signed-off-by: Johannes Weiner Signed-off-by: Linus Torvalds --- include/linux/bootmem.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h index 4ddf292..652470b 100644 --- a/include/linux/bootmem.h +++ b/include/linux/bootmem.h @@ -103,17 +103,16 @@ extern void *__alloc_bootmem_low_node(pg_data_t *pgdat, __alloc_bootmem(x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_low_pages(x) \ __alloc_bootmem_low(x, PAGE_SIZE, 0) -#endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */ - -extern int reserve_bootmem_generic(unsigned long addr, unsigned long size, - int flags); - #define alloc_bootmem_node(pgdat, x) \ __alloc_bootmem_node(pgdat, x, SMP_CACHE_BYTES, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_pages_node(pgdat, x) \ __alloc_bootmem_node(pgdat, x, PAGE_SIZE, __pa(MAX_DMA_ADDRESS)) #define alloc_bootmem_low_pages_node(pgdat, x) \ __alloc_bootmem_low_node(pgdat, x, PAGE_SIZE, 0) +#endif /* !CONFIG_HAVE_ARCH_BOOTMEM_NODE */ + +extern int reserve_bootmem_generic(unsigned long addr, unsigned long size, + int flags); extern void *alloc_bootmem_section(unsigned long size, unsigned long section_nr); -- cgit v1.1 From 88181ec30f58a28cd78b26aaac38bef4062b23dc Mon Sep 17 00:00:00 2001 From: Sam Ravnborg Date: Mon, 9 Jun 2008 21:24:28 +0200 Subject: kbuild: only one call for include/ in make headers_* Move it to the top-level file to decide if we install/check the generic headers or the arch specific headers. This revealed a long standing bug where "make headers_check_all" relied on the files in asm/ for the current architecture. So make headers_check_all is now broken by this commit. In addition: o add a simpler way to detect if an arch support exporting header files. o add 'set -e;' so we error out early if make headers_check_all fails. o add sparc64 and cris to arch we do not process in make headers_*_all because: sparc64 - use sparc to export headers cris - is know seriously broken Includes suggestions from: David Woodhouse . Signed-off-by: Sam Ravnborg Cc: David Woodhouse --- include/Kbuild | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/Kbuild b/include/Kbuild index bdca155..d8c3e3c 100644 --- a/include/Kbuild +++ b/include/Kbuild @@ -1,3 +1,6 @@ +# Top-level Makefile calls into asm-$(ARCH) +# List only non-arch directories below + header-y += asm-generic/ header-y += linux/ header-y += sound/ @@ -5,5 +8,3 @@ header-y += mtd/ header-y += rdma/ header-y += video/ header-y += drm/ - -header-y += asm-$(ARCH)/ -- cgit v1.1 From fb5e2b379732e1a6ea32392980bb42e0212db842 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 18 Jun 2008 12:36:01 +0100 Subject: vmlinux.lds: move __attribute__((__cold__)) functions back into final .text section Due to the addition of __attribute__((__cold__)) to a few symbols without adjusting the linker scripts, those symbols currently may end up outside the [_stext,_etext) range, as they get placed in .text.unlikely by (at least) gcc 4.3.0. This may confuse code not only outside of the kernel, symbol_put_addr()'s BUG() could also trigger. Hence we need to add .text.unlikely (and for future uses of __attribute__((__hot__)) also .text.hot) to the TEXT_TEXT() macro. Issue observed by Lukas Lipavsky. Signed-off-by: Jan Beulich Tested-by: Lukas Lipavsky Cc: Signed-off-by: Sam Ravnborg --- include/asm-generic/vmlinux.lds.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 729f6b0..bd2be5f 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -221,6 +221,7 @@ * during second ld run in second ld pass when generating System.map */ #define TEXT_TEXT \ ALIGN_FUNCTION(); \ + *(.text.hot) \ *(.text) \ *(.ref.text) \ *(.text.init.refok) \ @@ -230,7 +231,8 @@ CPU_KEEP(init.text) \ CPU_KEEP(exit.text) \ MEM_KEEP(init.text) \ - MEM_KEEP(exit.text) + MEM_KEEP(exit.text) \ + *(.text.unlikely) /* sched.text is aling to function alignment to secure we have same -- cgit v1.1 From f1373da87be917e5b2356af44764620487376a07 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Fri, 25 Jul 2008 15:18:31 -0700 Subject: sparc: Wire up new system calls. This wires up the recently added Wire up signalfd4, eventfd2, epoll_create1, dup3, pipe2, and inotify_init1 system calls. Signed-off-by: David S. Miller --- include/asm-sparc/unistd_32.h | 8 +++++++- include/asm-sparc/unistd_64.h | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-sparc/unistd_32.h b/include/asm-sparc/unistd_32.h index 2338a02..648643a 100644 --- a/include/asm-sparc/unistd_32.h +++ b/include/asm-sparc/unistd_32.h @@ -332,8 +332,14 @@ #define __NR_fallocate 314 #define __NR_timerfd_settime 315 #define __NR_timerfd_gettime 316 +#define __NR_signalfd4 317 +#define __NR_eventfd2 318 +#define __NR_epoll_create1 319 +#define __NR_dup3 320 +#define __NR_pipe2 321 +#define __NR_inotify_init1 322 -#define NR_SYSCALLS 317 +#define NR_SYSCALLS 323 /* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, * it never had the plain ones and there is no value to adding those diff --git a/include/asm-sparc/unistd_64.h b/include/asm-sparc/unistd_64.h index 13be445..c5cc0e0 100644 --- a/include/asm-sparc/unistd_64.h +++ b/include/asm-sparc/unistd_64.h @@ -334,8 +334,14 @@ #define __NR_fallocate 314 #define __NR_timerfd_settime 315 #define __NR_timerfd_gettime 316 +#define __NR_signalfd4 317 +#define __NR_eventfd2 318 +#define __NR_epoll_create1 319 +#define __NR_dup3 320 +#define __NR_pipe2 321 +#define __NR_inotify_init1 322 -#define NR_SYSCALLS 317 +#define NR_SYSCALLS 323 #ifdef __KERNEL__ #define __ARCH_WANT_IPC_PARSE_VERSION -- cgit v1.1 From b4615e69b6c6353878b734a8202b65efbc554df4 Mon Sep 17 00:00:00 2001 From: Harvey Harrison Date: Fri, 25 Jul 2008 13:19:22 -0700 Subject: sys_paccept definition missing __user annotation Introduced by commit aaca0bdca573f3f51ea03139f9c7289541e7bca3 ("flag parameters: paccept"): net/socket.c:1515:17: error: symbol 'sys_paccept' redeclared with different type (originally declared at include/linux/syscalls.h:413) - incompatible argument 4 (different address spaces) Signed-off-by: Harvey Harrison Signed-off-by: Linus Torvalds --- include/linux/syscalls.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h index 06f2bf7..d6ff145 100644 --- a/include/linux/syscalls.h +++ b/include/linux/syscalls.h @@ -411,7 +411,7 @@ asmlinkage long sys_bind(int, struct sockaddr __user *, int); asmlinkage long sys_connect(int, struct sockaddr __user *, int); asmlinkage long sys_accept(int, struct sockaddr __user *, int __user *); asmlinkage long sys_paccept(int, struct sockaddr __user *, int __user *, - const sigset_t *, size_t, int); + const __user sigset_t *, size_t, int); asmlinkage long sys_getsockname(int, struct sockaddr __user *, int __user *); asmlinkage long sys_getpeername(int, struct sockaddr __user *, int __user *); asmlinkage long sys_send(int, void __user *, size_t, unsigned); -- cgit v1.1 From 3f07af494dfa6de43137dae430431c9fbf929c0c Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Fri, 25 Jul 2008 22:25:13 -0400 Subject: of: adapt of_find_i2c_driver() to be usable by SPI also SPI has a similar problem as I2C in that it needs to determine an appropriate modalias value for each device node. This patch adapts the of_i2c of_find_i2c_driver() function to be usable by of_spi also. Signed-off-by: Grant Likely --- include/linux/of.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/of.h b/include/linux/of.h index 59a61bd..79886ad 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -70,5 +70,6 @@ extern int of_n_addr_cells(struct device_node *np); extern int of_n_size_cells(struct device_node *np); extern const struct of_device_id *of_match_node( const struct of_device_id *matches, const struct device_node *node); +extern int of_modalias_node(struct device_node *node, char *modalias, int len); #endif /* _LINUX_OF_H */ -- cgit v1.1 From dc87c98e8f635a718f1abb2c3e15fc77c0001651 Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Thu, 15 May 2008 16:50:22 -0600 Subject: spi: split up spi_new_device() to allow two stage registration. spi_new_device() allocates and registers an spi device all in one swoop. If the driver needs to add extra data to the spi_device before it is registered, then this causes problems. This is needed for OF device tree support so that the SPI device tree helper can add a pointer to the device node after the device is allocated, but before the device is registered. OF aware SPI devices can then retrieve data out of the device node to populate a platform data structure. This patch splits the allocation and registration portions of code out of spi_new_device() and creates two new functions; spi_alloc_device() and spi_register_device(). spi_new_device() is modified to use the new functions for allocation and registration. None of the existing users of spi_new_device() should be affected by this change. Drivers using the new API can forego the use of spi_board_info structure to describe the device layout and populate data into the spi_device structure directly. This change is in preparation for adding an OF device tree parser to generate spi_devices based on data in the device tree. Signed-off-by: Grant Likely Acked-by: David Brownell --- include/linux/spi/spi.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index a9cc29d..4be01bb 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -778,8 +778,20 @@ spi_register_board_info(struct spi_board_info const *info, unsigned n) * use spi_new_device() to describe each device. You can also call * spi_unregister_device() to start making that device vanish, but * normally that would be handled by spi_unregister_master(). + * + * You can also use spi_alloc_device() and spi_add_device() to use a two + * stage registration sequence for each spi_device. This gives the caller + * some more control over the spi_device structure before it is registered, + * but requires that caller to initialize fields that would otherwise + * be defined using the board info. */ extern struct spi_device * +spi_alloc_device(struct spi_master *master); + +extern int +spi_add_device(struct spi_device *spi); + +extern struct spi_device * spi_new_device(struct spi_master *, struct spi_board_info *); static inline void -- cgit v1.1 From 284b01897340974000bcc84de87a4e1becc8a83d Mon Sep 17 00:00:00 2001 From: Grant Likely Date: Fri, 16 May 2008 11:37:09 -0600 Subject: spi: Add OF binding support for SPI busses This patch adds support for populating an SPI bus based on data in the OF device tree. This is useful for powerpc platforms which use the device tree instead of discrete code for describing platform layout. Signed-off-by: Grant Likely --- include/linux/of_spi.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 include/linux/of_spi.h (limited to 'include') diff --git a/include/linux/of_spi.h b/include/linux/of_spi.h new file mode 100644 index 0000000..5f71ee8 --- /dev/null +++ b/include/linux/of_spi.h @@ -0,0 +1,18 @@ +/* + * OpenFirmware SPI support routines + * Copyright (C) 2008 Secret Lab Technologies Ltd. + * + * Support routines for deriving SPI device attachments from the device + * tree. + */ + +#ifndef __LINUX_OF_SPI_H +#define __LINUX_OF_SPI_H + +#include +#include + +extern void of_register_spi_devices(struct spi_master *master, + struct device_node *np); + +#endif /* __LINUX_OF_SPI */ -- cgit v1.1 From 547b792cac0a038b9dbf958d3c120df3740b5572 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Fri, 25 Jul 2008 21:43:18 -0700 Subject: net: convert BUG_TRAP to generic WARN_ON MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Removes legacy reinvent-the-wheel type thing. The generic machinery integrates much better to automated debugging aids such as kerneloops.org (and others), and is unambiguous due to better naming. Non-intuively BUG_TRAP() is actually equal to WARN_ON() rather than BUG_ON() though some might actually be promoted to BUG_ON() but I left that to future. I could make at least one BUILD_BUG_ON conversion. Signed-off-by: Ilpo Järvinen Signed-off-by: David S. Miller --- include/net/request_sock.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/request_sock.h b/include/net/request_sock.h index 0c96e7b..8d6e991 100644 --- a/include/net/request_sock.h +++ b/include/net/request_sock.h @@ -18,6 +18,7 @@ #include #include #include +#include #include @@ -170,7 +171,7 @@ static inline struct request_sock *reqsk_queue_remove(struct request_sock_queue { struct request_sock *req = queue->rskq_accept_head; - BUG_TRAP(req != NULL); + WARN_ON(req == NULL); queue->rskq_accept_head = req->dl_next; if (queue->rskq_accept_head == NULL) @@ -185,7 +186,7 @@ static inline struct sock *reqsk_queue_get_child(struct request_sock_queue *queu struct request_sock *req = reqsk_queue_remove(queue); struct sock *child = req->sk; - BUG_TRAP(child != NULL); + WARN_ON(child == NULL); sk_acceptq_removed(parent); __reqsk_free(req); -- cgit v1.1 From ec34c702ca8b7d6f0aa54379c3b0d0ec10b8ff23 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Fri, 25 Jul 2008 21:45:49 -0700 Subject: net: drop unused BUG_TRAP() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Ilpo Järvinen Signed-off-by: David S. Miller --- include/linux/rtnetlink.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include') diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index f4d386c..ca643b1 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -755,13 +755,6 @@ extern void __rtnl_unlock(void); } \ } while(0) -#define BUG_TRAP(x) do { \ - if (unlikely(!(x))) { \ - printk(KERN_ERR "KERNEL: assertion (%s) failed at %s (%d)\n", \ - #x, __FILE__ , __LINE__); \ - } \ -} while(0) - static inline u32 rtm_get_table(struct rtattr **rta, u8 table) { return RTA_GET_U32(rta[RTA_TABLE-1]); -- cgit v1.1 From 36ac26171afa8dbf29226199699fe955d4a0b6f6 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Sat, 26 Jul 2008 11:22:33 +0200 Subject: crashdump: fix undefined reference to `elfcorehdr_addr' fix build bug introduced by 95b68dec0d5 "calgary iommu: use the first kernels TCE tables in kdump": arch/x86/kernel/built-in.o: In function `calgary_iommu_init': (.init.text+0x8399): undefined reference to `elfcorehdr_addr' arch/x86/kernel/built-in.o: In function `calgary_iommu_init': (.init.text+0x856c): undefined reference to `elfcorehdr_addr' arch/x86/kernel/built-in.o: In function `detect_calgary': (.init.text+0x8c68): undefined reference to `elfcorehdr_addr' arch/x86/kernel/built-in.o: In function `detect_calgary': (.init.text+0x8d0c): undefined reference to `elfcorehdr_addr' make elfcorehdr_addr a generally available symbol. Signed-off-by: Ingo Molnar --- include/linux/crash_dump.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/crash_dump.h b/include/linux/crash_dump.h index 6cd39a9..025e4f5 100644 --- a/include/linux/crash_dump.h +++ b/include/linux/crash_dump.h @@ -8,7 +8,13 @@ #include #define ELFCORE_ADDR_MAX (-1ULL) + +#ifdef CONFIG_PROC_VMCORE extern unsigned long long elfcorehdr_addr; +#else +static const unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; +#endif + extern ssize_t copy_oldmem_page(unsigned long, char *, size_t, unsigned long, int); extern const struct file_operations proc_vmcore_operations; -- cgit v1.1 From 071375bc76ee86e58592f4682030c81d410ddfd9 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Sat, 26 Jul 2008 14:52:26 +0200 Subject: x86, RDC321x: remove gpio.h complications Remove the include/asm-x86/gpio.h specials, just use the generic version. Signed-off-by: Ingo Molnar --- include/asm-x86/gpio.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/asm-x86/gpio.h b/include/asm-x86/gpio.h index 116e914..c4c91b3 100644 --- a/include/asm-x86/gpio.h +++ b/include/asm-x86/gpio.h @@ -16,10 +16,6 @@ #ifndef _ASM_I386_GPIO_H #define _ASM_I386_GPIO_H -#ifdef CONFIG_X86_RDC321X -#include -#else /* CONFIG_X86_RDC321X */ - #include #ifdef CONFIG_GPIOLIB @@ -57,6 +53,4 @@ static inline int irq_to_gpio(unsigned int irq) #endif /* CONFIG_GPIOLIB */ -#endif /* CONFIG_X86_RDC321X */ - #endif /* _ASM_I386_GPIO_H */ -- cgit v1.1 From 1ca9fda4b2f3413e4bc748b983f5585629ca0560 Mon Sep 17 00:00:00 2001 From: Chris McDermott Date: Thu, 24 Jul 2008 19:06:09 -0700 Subject: x86: fix IBM Summit based systems' phys_cpu_present_map on 32-bit kernels x86 kernels on IBM Summit based systems will only online 1 CPU because the phys_cpu_present_map is not set up correctly. Patch below applied to 2.6.26-git10. Signed-off-by: Chris McDermott Tested-by: Tim Pepper Signed-off-by: Ingo Molnar --- include/asm-x86/mach-summit/mach_apic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-x86/mach-summit/mach_apic.h b/include/asm-x86/mach-summit/mach_apic.h index 75d2c950..c47e2ab 100644 --- a/include/asm-x86/mach-summit/mach_apic.h +++ b/include/asm-x86/mach-summit/mach_apic.h @@ -122,7 +122,7 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map) static inline physid_mask_t apicid_to_cpu_present(int apicid) { - return physid_mask_of_physid(0); + return physid_mask_of_physid(apicid); } static inline void setup_portio_remap(void) -- cgit v1.1 From 3bc9f79ee1ddc913be0a6d3592036683ef8a3148 Mon Sep 17 00:00:00 2001 From: Joerg Roedel Date: Fri, 25 Jul 2008 14:57:58 +0200 Subject: iommu: add iommu_num_pages helper function Calculating the number of pages from given address and length numbers is a task required in multiple IOMMU implementations. So implement this as a generic function into the IOMMU helper code. Signed-off-by: Joerg Roedel Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: robert.richter@amd.com Cc: FUJITA Tomonori Signed-off-by: Ingo Molnar --- include/linux/iommu-helper.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h index c975caf..f8598f5 100644 --- a/include/linux/iommu-helper.h +++ b/include/linux/iommu-helper.h @@ -8,3 +8,4 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, unsigned long align_mask); extern void iommu_area_free(unsigned long *map, unsigned long start, unsigned int nr); +extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len); -- cgit v1.1 From 0c65f459ce6c8bd873a61b3ae1e57858ab1debf3 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Wed, 23 Jul 2008 15:35:22 -0700 Subject: [ARM] fix fls() for 64-bit arguments arm's fls() is implemented as a macro, causing it to misbehave when passed 64-bit arguments. Fix. Cc: Nickolay Vinogradov Tested-by: Krzysztof Halasa Cc: Signed-off-by: Andrew Morton Signed-off-by: Russell King --- include/asm-arm/bitops.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 5c60bfc..9a1db20 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -277,9 +277,16 @@ static inline int constant_fls(int x) * the clz instruction for much better code efficiency. */ -#define fls(x) \ +#define __fls(x) \ ( __builtin_constant_p(x) ? constant_fls(x) : \ ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) + +/* Implement fls() in C so that 64-bit args are suitably truncated */ +static inline int fls(int x) +{ + return __fls(x); +} + #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) #define __ffs(x) (ffs(x) - 1) #define ffz(x) __ffs( ~(x) ) -- cgit v1.1 From dd438e77f01d024919a8ae81d0cf2e4c6cda79cc Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 25 Jul 2008 20:55:52 +0100 Subject: [ARM] pci: provide dummy pci_get_legacy_ide_irq() This fixes footbridge_defconfig: drivers/pnp/resource.c: In function 'pci_dev_uses_irq': drivers/pnp/resource.c:317: error: implicit declaration of function 'pci_get_legacy_ide_irq' Signed-off-by: Russell King --- include/asm-arm/pci.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index 75feb15..2d84792 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -78,6 +78,14 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) return root; } +/* + * Dummy implementation; always return 0. + */ +static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) +{ + return 0; +} + #endif /* __KERNEL__ */ #endif -- cgit v1.1 From b8d317d10cca76cabe6b03ebfeb23cc99118b731 Mon Sep 17 00:00:00 2001 From: Mike Travis Date: Thu, 24 Jul 2008 18:21:29 -0700 Subject: cpumask: make cpumask_of_cpu_map generic If an arch doesn't define cpumask_of_cpu_map, create a generic statically-initialized one for them. This allows removal of the buggy cpumask_of_cpu() macro (&cpumask_of_cpu() gives address of out-of-scope var). An arch with NR_CPUS of 4096 probably wants to allocate this itself based on the actual number of CPUs, since otherwise they're using 2MB of rodata (1024 cpus means 128k). That's what CONFIG_HAVE_CPUMASK_OF_CPU_MAP is for (only x86/64 does so at the moment). In future as we support more CPUs, we'll need to resort to a get_cpu_map()/put_cpu_map() allocation scheme. Signed-off-by: Mike Travis Signed-off-by: Rusty Russell Cc: Andrew Morton Cc: Jack Steiner Signed-off-by: Ingo Molnar --- include/linux/cpumask.h | 41 +++-------------------------------------- 1 file changed, 3 insertions(+), 38 deletions(-) (limited to 'include') diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index 1b5c98e..8fa3b6d 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -62,15 +62,7 @@ * int next_cpu_nr(cpu, mask) Next cpu past 'cpu', or nr_cpu_ids * * cpumask_t cpumask_of_cpu(cpu) Return cpumask with bit 'cpu' set - *ifdef CONFIG_HAS_CPUMASK_OF_CPU - * cpumask_of_cpu_ptr_declare(v) Declares cpumask_t *v - * cpumask_of_cpu_ptr_next(v, cpu) Sets v = &cpumask_of_cpu_map[cpu] - * cpumask_of_cpu_ptr(v, cpu) Combines above two operations - *else - * cpumask_of_cpu_ptr_declare(v) Declares cpumask_t _v and *v = &_v - * cpumask_of_cpu_ptr_next(v, cpu) Sets _v = cpumask_of_cpu(cpu) - * cpumask_of_cpu_ptr(v, cpu) Combines above two operations - *endif + * (can be used as an lvalue) * CPU_MASK_ALL Initializer - all bits set * CPU_MASK_NONE Initializer - no bits set * unsigned long *cpus_addr(mask) Array of unsigned long's in mask @@ -274,36 +266,9 @@ static inline void __cpus_shift_left(cpumask_t *dstp, } -#ifdef CONFIG_HAVE_CPUMASK_OF_CPU_MAP -extern cpumask_t *cpumask_of_cpu_map; +/* cpumask_of_cpu_map[] is in kernel/cpu.c */ +extern const cpumask_t *cpumask_of_cpu_map; #define cpumask_of_cpu(cpu) (cpumask_of_cpu_map[cpu]) -#define cpumask_of_cpu_ptr(v, cpu) \ - const cpumask_t *v = &cpumask_of_cpu(cpu) -#define cpumask_of_cpu_ptr_declare(v) \ - const cpumask_t *v -#define cpumask_of_cpu_ptr_next(v, cpu) \ - v = &cpumask_of_cpu(cpu) -#else -#define cpumask_of_cpu(cpu) \ -({ \ - typeof(_unused_cpumask_arg_) m; \ - if (sizeof(m) == sizeof(unsigned long)) { \ - m.bits[0] = 1UL<<(cpu); \ - } else { \ - cpus_clear(m); \ - cpu_set((cpu), m); \ - } \ - m; \ -}) -#define cpumask_of_cpu_ptr(v, cpu) \ - cpumask_t _##v = cpumask_of_cpu(cpu); \ - const cpumask_t *v = &_##v -#define cpumask_of_cpu_ptr_declare(v) \ - cpumask_t _##v; \ - const cpumask_t *v = &_##v -#define cpumask_of_cpu_ptr_next(v, cpu) \ - _##v = cpumask_of_cpu(cpu) -#endif #define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS) -- cgit v1.1 From 38f9d308597fe3f8d52bfa30e7ed6c742b85a1db Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Wed, 23 Jul 2008 05:09:15 -0300 Subject: V4L/DVB (8477): v4l: remove obsolete audiochip.h Converted the last users of audiochip.h to the v4l2-chip-ident.h header and remove the now unused audiochip.h header. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/audiochip.h | 26 -------------------------- include/media/v4l2-chip-ident.h | 7 +++++-- 2 files changed, 5 insertions(+), 28 deletions(-) (limited to 'include') diff --git a/include/media/audiochip.h b/include/media/audiochip.h index db8823d..e69de29 100644 --- a/include/media/audiochip.h +++ b/include/media/audiochip.h @@ -1,26 +0,0 @@ -/* - */ - -#ifndef AUDIOCHIP_H -#define AUDIOCHIP_H - -enum audiochip { - AUDIO_CHIP_NONE, - AUDIO_CHIP_UNKNOWN, - /* Provided by video chip */ - AUDIO_CHIP_INTERNAL, - /* Provided by tvaudio.c */ - AUDIO_CHIP_TDA8425, - AUDIO_CHIP_TEA6300, - AUDIO_CHIP_TEA6420, - AUDIO_CHIP_TDA9840, - AUDIO_CHIP_TDA985X, - AUDIO_CHIP_TDA9874, - AUDIO_CHIP_PIC16C54, - /* Provided by msp3400.c */ - AUDIO_CHIP_MSP34XX, - /* Provided by wm8775.c */ - AUDIO_CHIP_WM8775 -}; - -#endif /* AUDIOCHIP_H */ diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h index 2a52774..41b509b 100644 --- a/include/media/v4l2-chip-ident.h +++ b/include/media/v4l2-chip-ident.h @@ -90,7 +90,10 @@ enum { /* module m52790: just ident 52790 */ V4L2_IDENT_M52790 = 52790, - /* module msp34xx: reserved range 34000-34999 */ + /* module msp3400: reserved range 34000-34999 and 44000-44999 */ + V4L2_IDENT_MSPX4XX = 34000, /* generic MSPX4XX identifier, only + use internally (tveeprom.c). */ + V4L2_IDENT_MSP3400B = 34002, V4L2_IDENT_MSP3410B = 34102, @@ -142,7 +145,7 @@ enum { V4L2_IDENT_MSP3457G = 34577, V4L2_IDENT_MSP3467G = 34677, - /* module msp44xx: reserved range 44000-44999 */ + /* module msp3400: reserved range 34000-34999 and 44000-44999 */ V4L2_IDENT_MSP4400G = 44007, V4L2_IDENT_MSP4410G = 44107, V4L2_IDENT_MSP4420G = 44207, -- cgit v1.1 From b654fcdc0ea3b6e5724c9873ae062bdfe7f28efe Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Tue, 22 Jul 2008 15:50:31 -0300 Subject: V4L/DVB (8479): tveeprom/ivtv: fix usage of has_ir field has_ir was set to and compared to -1 in several cases, even though it is an u32. ivtv also contained a FIXME for an old kernel that could be removed. Thanks to Roel Kluin for creating an initial patch for this. Although I chose a different solution here it did help in pointing out the problem. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/tveeprom.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/media/tveeprom.h b/include/media/tveeprom.h index 5660ea2..a8ad75a 100644 --- a/include/media/tveeprom.h +++ b/include/media/tveeprom.h @@ -3,7 +3,12 @@ struct tveeprom { u32 has_radio; - u32 has_ir; /* bit 0: IR receiver present, bit 1: IR transmitter (blaster) present. -1 == unknown */ + /* If has_ir == 0, then it is unknown what the IR capabilities are, + otherwise: + bit 0: 1 (= IR capabilities are known) + bit 1: IR receiver present + bit 2: IR transmitter (blaster) present */ + u32 has_ir; u32 has_MAC_address; /* 0: no MAC, 1: MAC present, 2: unknown */ u32 tuner_type; -- cgit v1.1 From a399810ca69d9d4bd30ab8c1678c7439e567f90b Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Mon, 21 Jul 2008 02:57:38 -0300 Subject: V4L/DVB (8482): videodev: move all ioctl callbacks to a new v4l2_ioctl_ops struct All ioctl callbacks are now stored in a new v4l2_ioctl_ops struct. Drivers fill in a const struct v4l2_ioctl_ops and video_device just contains a const pointer to it. This ensures a clean separation between the const ops struct and the non-const video_device struct. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 222 +------------------------------------------- include/media/v4l2-ioctl.h | 223 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 226 insertions(+), 219 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index ad62d32..d9149cd 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -39,6 +39,8 @@ #define VFL_TYPE_RADIO 2 #define VFL_TYPE_VTX 3 +struct v4l2_ioctl_callbacks; + /* * Newer version of video_device, handled by videodev2.c * This version moves redundant code from video device code to @@ -72,225 +74,7 @@ struct video_device void (*release)(struct video_device *vfd); /* ioctl callbacks */ - - /* VIDIOC_QUERYCAP handler */ - int (*vidioc_querycap)(struct file *file, void *fh, struct v4l2_capability *cap); - - /* Priority handling */ - int (*vidioc_g_priority) (struct file *file, void *fh, - enum v4l2_priority *p); - int (*vidioc_s_priority) (struct file *file, void *fh, - enum v4l2_priority p); - - /* VIDIOC_ENUM_FMT handlers */ - int (*vidioc_enum_fmt_vid_cap) (struct file *file, void *fh, - struct v4l2_fmtdesc *f); - int (*vidioc_enum_fmt_vid_overlay) (struct file *file, void *fh, - struct v4l2_fmtdesc *f); - int (*vidioc_enum_fmt_vid_out) (struct file *file, void *fh, - struct v4l2_fmtdesc *f); -#if 1 - /* deprecated, will be removed in 2.6.28 */ - int (*vidioc_enum_fmt_vbi_cap) (struct file *file, void *fh, - struct v4l2_fmtdesc *f); -#endif - int (*vidioc_enum_fmt_type_private)(struct file *file, void *fh, - struct v4l2_fmtdesc *f); - - /* VIDIOC_G_FMT handlers */ - int (*vidioc_g_fmt_vid_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_vid_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_vid_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_vid_out_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_vbi_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_vbi_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_sliced_vbi_cap)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_sliced_vbi_out)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_g_fmt_type_private)(struct file *file, void *fh, - struct v4l2_format *f); - - /* VIDIOC_S_FMT handlers */ - int (*vidioc_s_fmt_vid_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_vid_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_vid_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_vid_out_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_vbi_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_vbi_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_sliced_vbi_cap)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_sliced_vbi_out)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_s_fmt_type_private)(struct file *file, void *fh, - struct v4l2_format *f); - - /* VIDIOC_TRY_FMT handlers */ - int (*vidioc_try_fmt_vid_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_vid_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_vid_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_vid_out_overlay)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_vbi_cap) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_vbi_out) (struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_sliced_vbi_cap)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_sliced_vbi_out)(struct file *file, void *fh, - struct v4l2_format *f); - int (*vidioc_try_fmt_type_private)(struct file *file, void *fh, - struct v4l2_format *f); - - /* Buffer handlers */ - int (*vidioc_reqbufs) (struct file *file, void *fh, struct v4l2_requestbuffers *b); - int (*vidioc_querybuf)(struct file *file, void *fh, struct v4l2_buffer *b); - int (*vidioc_qbuf) (struct file *file, void *fh, struct v4l2_buffer *b); - int (*vidioc_dqbuf) (struct file *file, void *fh, struct v4l2_buffer *b); - - - int (*vidioc_overlay) (struct file *file, void *fh, unsigned int i); -#ifdef CONFIG_VIDEO_V4L1_COMPAT - /* buffer type is struct vidio_mbuf * */ - int (*vidiocgmbuf) (struct file *file, void *fh, struct video_mbuf *p); -#endif - int (*vidioc_g_fbuf) (struct file *file, void *fh, - struct v4l2_framebuffer *a); - int (*vidioc_s_fbuf) (struct file *file, void *fh, - struct v4l2_framebuffer *a); - - /* Stream on/off */ - int (*vidioc_streamon) (struct file *file, void *fh, enum v4l2_buf_type i); - int (*vidioc_streamoff)(struct file *file, void *fh, enum v4l2_buf_type i); - - /* Standard handling - ENUMSTD is handled by videodev.c - */ - int (*vidioc_g_std) (struct file *file, void *fh, v4l2_std_id *norm); - int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id *norm); - int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a); - - /* Input handling */ - int (*vidioc_enum_input)(struct file *file, void *fh, - struct v4l2_input *inp); - int (*vidioc_g_input) (struct file *file, void *fh, unsigned int *i); - int (*vidioc_s_input) (struct file *file, void *fh, unsigned int i); - - /* Output handling */ - int (*vidioc_enum_output) (struct file *file, void *fh, - struct v4l2_output *a); - int (*vidioc_g_output) (struct file *file, void *fh, unsigned int *i); - int (*vidioc_s_output) (struct file *file, void *fh, unsigned int i); - - /* Control handling */ - int (*vidioc_queryctrl) (struct file *file, void *fh, - struct v4l2_queryctrl *a); - int (*vidioc_g_ctrl) (struct file *file, void *fh, - struct v4l2_control *a); - int (*vidioc_s_ctrl) (struct file *file, void *fh, - struct v4l2_control *a); - int (*vidioc_g_ext_ctrls) (struct file *file, void *fh, - struct v4l2_ext_controls *a); - int (*vidioc_s_ext_ctrls) (struct file *file, void *fh, - struct v4l2_ext_controls *a); - int (*vidioc_try_ext_ctrls) (struct file *file, void *fh, - struct v4l2_ext_controls *a); - int (*vidioc_querymenu) (struct file *file, void *fh, - struct v4l2_querymenu *a); - - /* Audio ioctls */ - int (*vidioc_enumaudio) (struct file *file, void *fh, - struct v4l2_audio *a); - int (*vidioc_g_audio) (struct file *file, void *fh, - struct v4l2_audio *a); - int (*vidioc_s_audio) (struct file *file, void *fh, - struct v4l2_audio *a); - - /* Audio out ioctls */ - int (*vidioc_enumaudout) (struct file *file, void *fh, - struct v4l2_audioout *a); - int (*vidioc_g_audout) (struct file *file, void *fh, - struct v4l2_audioout *a); - int (*vidioc_s_audout) (struct file *file, void *fh, - struct v4l2_audioout *a); - int (*vidioc_g_modulator) (struct file *file, void *fh, - struct v4l2_modulator *a); - int (*vidioc_s_modulator) (struct file *file, void *fh, - struct v4l2_modulator *a); - /* Crop ioctls */ - int (*vidioc_cropcap) (struct file *file, void *fh, - struct v4l2_cropcap *a); - int (*vidioc_g_crop) (struct file *file, void *fh, - struct v4l2_crop *a); - int (*vidioc_s_crop) (struct file *file, void *fh, - struct v4l2_crop *a); - /* Compression ioctls */ - int (*vidioc_g_jpegcomp) (struct file *file, void *fh, - struct v4l2_jpegcompression *a); - int (*vidioc_s_jpegcomp) (struct file *file, void *fh, - struct v4l2_jpegcompression *a); - int (*vidioc_g_enc_index) (struct file *file, void *fh, - struct v4l2_enc_idx *a); - int (*vidioc_encoder_cmd) (struct file *file, void *fh, - struct v4l2_encoder_cmd *a); - int (*vidioc_try_encoder_cmd) (struct file *file, void *fh, - struct v4l2_encoder_cmd *a); - - /* Stream type-dependent parameter ioctls */ - int (*vidioc_g_parm) (struct file *file, void *fh, - struct v4l2_streamparm *a); - int (*vidioc_s_parm) (struct file *file, void *fh, - struct v4l2_streamparm *a); - - /* Tuner ioctls */ - int (*vidioc_g_tuner) (struct file *file, void *fh, - struct v4l2_tuner *a); - int (*vidioc_s_tuner) (struct file *file, void *fh, - struct v4l2_tuner *a); - int (*vidioc_g_frequency) (struct file *file, void *fh, - struct v4l2_frequency *a); - int (*vidioc_s_frequency) (struct file *file, void *fh, - struct v4l2_frequency *a); - - /* Sliced VBI cap */ - int (*vidioc_g_sliced_vbi_cap) (struct file *file, void *fh, - struct v4l2_sliced_vbi_cap *a); - - /* Log status ioctl */ - int (*vidioc_log_status) (struct file *file, void *fh); - - int (*vidioc_s_hw_freq_seek) (struct file *file, void *fh, - struct v4l2_hw_freq_seek *a); - - /* Debugging ioctls */ -#ifdef CONFIG_VIDEO_ADV_DEBUG - int (*vidioc_g_register) (struct file *file, void *fh, - struct v4l2_register *reg); - int (*vidioc_s_register) (struct file *file, void *fh, - struct v4l2_register *reg); -#endif - int (*vidioc_g_chip_ident) (struct file *file, void *fh, - struct v4l2_chip_ident *chip); - - /* For other private ioctls */ - int (*vidioc_default) (struct file *file, void *fh, - int cmd, void *arg); - + const struct v4l2_ioctl_ops *ioctl_ops; #ifdef OBSOLETE_OWNER /* to be removed soon */ /* obsolete -- fops->owner is used instead */ diff --git a/include/media/v4l2-ioctl.h b/include/media/v4l2-ioctl.h index e319d1f..dc64046 100644 --- a/include/media/v4l2-ioctl.h +++ b/include/media/v4l2-ioctl.h @@ -20,6 +20,229 @@ #include #endif +struct v4l2_ioctl_ops { + /* ioctl callbacks */ + + /* VIDIOC_QUERYCAP handler */ + int (*vidioc_querycap)(struct file *file, void *fh, struct v4l2_capability *cap); + + /* Priority handling */ + int (*vidioc_g_priority) (struct file *file, void *fh, + enum v4l2_priority *p); + int (*vidioc_s_priority) (struct file *file, void *fh, + enum v4l2_priority p); + + /* VIDIOC_ENUM_FMT handlers */ + int (*vidioc_enum_fmt_vid_cap) (struct file *file, void *fh, + struct v4l2_fmtdesc *f); + int (*vidioc_enum_fmt_vid_overlay) (struct file *file, void *fh, + struct v4l2_fmtdesc *f); + int (*vidioc_enum_fmt_vid_out) (struct file *file, void *fh, + struct v4l2_fmtdesc *f); +#if 1 + /* deprecated, will be removed in 2.6.28 */ + int (*vidioc_enum_fmt_vbi_cap) (struct file *file, void *fh, + struct v4l2_fmtdesc *f); +#endif + int (*vidioc_enum_fmt_type_private)(struct file *file, void *fh, + struct v4l2_fmtdesc *f); + + /* VIDIOC_G_FMT handlers */ + int (*vidioc_g_fmt_vid_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_vid_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_vid_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_vid_out_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_vbi_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_vbi_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_sliced_vbi_cap)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_sliced_vbi_out)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_g_fmt_type_private)(struct file *file, void *fh, + struct v4l2_format *f); + + /* VIDIOC_S_FMT handlers */ + int (*vidioc_s_fmt_vid_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_vid_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_vid_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_vid_out_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_vbi_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_vbi_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_sliced_vbi_cap)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_sliced_vbi_out)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_s_fmt_type_private)(struct file *file, void *fh, + struct v4l2_format *f); + + /* VIDIOC_TRY_FMT handlers */ + int (*vidioc_try_fmt_vid_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_vid_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_vid_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_vid_out_overlay)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_vbi_cap) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_vbi_out) (struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_sliced_vbi_cap)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_sliced_vbi_out)(struct file *file, void *fh, + struct v4l2_format *f); + int (*vidioc_try_fmt_type_private)(struct file *file, void *fh, + struct v4l2_format *f); + + /* Buffer handlers */ + int (*vidioc_reqbufs) (struct file *file, void *fh, struct v4l2_requestbuffers *b); + int (*vidioc_querybuf)(struct file *file, void *fh, struct v4l2_buffer *b); + int (*vidioc_qbuf) (struct file *file, void *fh, struct v4l2_buffer *b); + int (*vidioc_dqbuf) (struct file *file, void *fh, struct v4l2_buffer *b); + + + int (*vidioc_overlay) (struct file *file, void *fh, unsigned int i); +#ifdef CONFIG_VIDEO_V4L1_COMPAT + /* buffer type is struct vidio_mbuf * */ + int (*vidiocgmbuf) (struct file *file, void *fh, struct video_mbuf *p); +#endif + int (*vidioc_g_fbuf) (struct file *file, void *fh, + struct v4l2_framebuffer *a); + int (*vidioc_s_fbuf) (struct file *file, void *fh, + struct v4l2_framebuffer *a); + + /* Stream on/off */ + int (*vidioc_streamon) (struct file *file, void *fh, enum v4l2_buf_type i); + int (*vidioc_streamoff)(struct file *file, void *fh, enum v4l2_buf_type i); + + /* Standard handling + ENUMSTD is handled by videodev.c + */ + int (*vidioc_g_std) (struct file *file, void *fh, v4l2_std_id *norm); + int (*vidioc_s_std) (struct file *file, void *fh, v4l2_std_id *norm); + int (*vidioc_querystd) (struct file *file, void *fh, v4l2_std_id *a); + + /* Input handling */ + int (*vidioc_enum_input)(struct file *file, void *fh, + struct v4l2_input *inp); + int (*vidioc_g_input) (struct file *file, void *fh, unsigned int *i); + int (*vidioc_s_input) (struct file *file, void *fh, unsigned int i); + + /* Output handling */ + int (*vidioc_enum_output) (struct file *file, void *fh, + struct v4l2_output *a); + int (*vidioc_g_output) (struct file *file, void *fh, unsigned int *i); + int (*vidioc_s_output) (struct file *file, void *fh, unsigned int i); + + /* Control handling */ + int (*vidioc_queryctrl) (struct file *file, void *fh, + struct v4l2_queryctrl *a); + int (*vidioc_g_ctrl) (struct file *file, void *fh, + struct v4l2_control *a); + int (*vidioc_s_ctrl) (struct file *file, void *fh, + struct v4l2_control *a); + int (*vidioc_g_ext_ctrls) (struct file *file, void *fh, + struct v4l2_ext_controls *a); + int (*vidioc_s_ext_ctrls) (struct file *file, void *fh, + struct v4l2_ext_controls *a); + int (*vidioc_try_ext_ctrls) (struct file *file, void *fh, + struct v4l2_ext_controls *a); + int (*vidioc_querymenu) (struct file *file, void *fh, + struct v4l2_querymenu *a); + + /* Audio ioctls */ + int (*vidioc_enumaudio) (struct file *file, void *fh, + struct v4l2_audio *a); + int (*vidioc_g_audio) (struct file *file, void *fh, + struct v4l2_audio *a); + int (*vidioc_s_audio) (struct file *file, void *fh, + struct v4l2_audio *a); + + /* Audio out ioctls */ + int (*vidioc_enumaudout) (struct file *file, void *fh, + struct v4l2_audioout *a); + int (*vidioc_g_audout) (struct file *file, void *fh, + struct v4l2_audioout *a); + int (*vidioc_s_audout) (struct file *file, void *fh, + struct v4l2_audioout *a); + int (*vidioc_g_modulator) (struct file *file, void *fh, + struct v4l2_modulator *a); + int (*vidioc_s_modulator) (struct file *file, void *fh, + struct v4l2_modulator *a); + /* Crop ioctls */ + int (*vidioc_cropcap) (struct file *file, void *fh, + struct v4l2_cropcap *a); + int (*vidioc_g_crop) (struct file *file, void *fh, + struct v4l2_crop *a); + int (*vidioc_s_crop) (struct file *file, void *fh, + struct v4l2_crop *a); + /* Compression ioctls */ + int (*vidioc_g_jpegcomp) (struct file *file, void *fh, + struct v4l2_jpegcompression *a); + int (*vidioc_s_jpegcomp) (struct file *file, void *fh, + struct v4l2_jpegcompression *a); + int (*vidioc_g_enc_index) (struct file *file, void *fh, + struct v4l2_enc_idx *a); + int (*vidioc_encoder_cmd) (struct file *file, void *fh, + struct v4l2_encoder_cmd *a); + int (*vidioc_try_encoder_cmd) (struct file *file, void *fh, + struct v4l2_encoder_cmd *a); + + /* Stream type-dependent parameter ioctls */ + int (*vidioc_g_parm) (struct file *file, void *fh, + struct v4l2_streamparm *a); + int (*vidioc_s_parm) (struct file *file, void *fh, + struct v4l2_streamparm *a); + + /* Tuner ioctls */ + int (*vidioc_g_tuner) (struct file *file, void *fh, + struct v4l2_tuner *a); + int (*vidioc_s_tuner) (struct file *file, void *fh, + struct v4l2_tuner *a); + int (*vidioc_g_frequency) (struct file *file, void *fh, + struct v4l2_frequency *a); + int (*vidioc_s_frequency) (struct file *file, void *fh, + struct v4l2_frequency *a); + + /* Sliced VBI cap */ + int (*vidioc_g_sliced_vbi_cap) (struct file *file, void *fh, + struct v4l2_sliced_vbi_cap *a); + + /* Log status ioctl */ + int (*vidioc_log_status) (struct file *file, void *fh); + + int (*vidioc_s_hw_freq_seek) (struct file *file, void *fh, + struct v4l2_hw_freq_seek *a); + + /* Debugging ioctls */ +#ifdef CONFIG_VIDEO_ADV_DEBUG + int (*vidioc_g_register) (struct file *file, void *fh, + struct v4l2_register *reg); + int (*vidioc_s_register) (struct file *file, void *fh, + struct v4l2_register *reg); +#endif + int (*vidioc_g_chip_ident) (struct file *file, void *fh, + struct v4l2_chip_ident *chip); + + /* For other private ioctls */ + int (*vidioc_default) (struct file *file, void *fh, + int cmd, void *arg); +}; + + /* v4l debugging and diagnostics */ /* Debug bitmask flags to be used on V4L2 */ -- cgit v1.1 From 9c39d7eafa366b807067697f7fc5b14d8b865179 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Mon, 21 Jul 2008 07:51:45 -0300 Subject: V4L/DVB (8483): Remove obsolete owner field from video_device struct. According to an old comment this should have been removed in 2.6.15. Better late than never... Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index d9149cd..ae2b1e6 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -9,7 +9,6 @@ #ifndef _V4L2_DEV_H #define _V4L2_DEV_H -#define OBSOLETE_OWNER 1 /* to be removed soon */ #define OBSOLETE_DEVDATA 1 /* to be removed soon */ #include @@ -76,14 +75,12 @@ struct video_device /* ioctl callbacks */ const struct v4l2_ioctl_ops *ioctl_ops; -#ifdef OBSOLETE_OWNER /* to be removed soon */ -/* obsolete -- fops->owner is used instead */ -struct module *owner; -/* dev->driver_data will be used instead some day. - * Use the video_{get|set}_drvdata() helper functions, - * so the switch over will be transparent for you. - * Or use {pci|usb}_{get|set}_drvdata() directly. */ -void *priv; +#ifdef OBSOLETE_DEVDATA /* to be removed soon */ + /* dev->driver_data will be used instead some day. + * Use the video_{get|set}_drvdata() helper functions, + * so the switch over will be transparent for you. + * Or use {pci|usb}_{get|set}_drvdata() directly. */ + void *priv; #endif /* for videodev.c intenal usage -- please don't touch */ @@ -126,7 +123,7 @@ video_device_remove_file(struct video_device *vfd, #endif /* CONFIG_VIDEO_V4L1_COMPAT */ -#ifdef OBSOLETE_OWNER /* to be removed soon */ +#ifdef OBSOLETE_DEVDATA /* to be removed soon */ /* helper functions to access driver private data. */ static inline void *video_get_drvdata(struct video_device *dev) { @@ -138,9 +135,6 @@ static inline void video_set_drvdata(struct video_device *dev, void *data) dev->priv = data; } -#endif - -#ifdef OBSOLETE_DEVDATA /* to be removed soon */ /* Obsolete stuff - Still needed for radio devices and obsolete drivers */ extern struct video_device* video_devdata(struct file*); extern int video_exclusive_open(struct inode *inode, struct file *file); -- cgit v1.1 From f894dfd735237548d282d6fd55b6ebb4b2fd9ef2 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Fri, 25 Jul 2008 07:39:54 -0300 Subject: V4L/DVB (8488): videodev: remove some CONFIG_VIDEO_V4L1_COMPAT code from v4l2-dev.h The video_device_create_file and video_device_remove_file functions can be removed from v4l2-dev.h, removing the dependency on videodev.h in v4l2-dev.h. Also removed a few more videodev.h includes that should have been videodev2.h. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 25 ------------------------- 1 file changed, 25 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index ae2b1e6..2fe3885 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -16,11 +16,7 @@ #include #include #include /* need __user */ -#ifdef CONFIG_VIDEO_V4L1_COMPAT -#include -#else #include -#endif #define VIDEO_MAJOR 81 /* Minor device allocation */ @@ -102,27 +98,6 @@ void video_unregister_device(struct video_device *); struct video_device *video_device_alloc(void); void video_device_release(struct video_device *vfd); -#ifdef CONFIG_VIDEO_V4L1_COMPAT -#include - -static inline int __must_check -video_device_create_file(struct video_device *vfd, - struct device_attribute *attr) -{ - int ret = device_create_file(&vfd->dev, attr); - if (ret < 0) - printk(KERN_WARNING "%s error: %d\n", __func__, ret); - return ret; -} -static inline void -video_device_remove_file(struct video_device *vfd, - struct device_attribute *attr) -{ - device_remove_file(&vfd->dev, attr); -} - -#endif /* CONFIG_VIDEO_V4L1_COMPAT */ - #ifdef OBSOLETE_DEVDATA /* to be removed soon */ /* helper functions to access driver private data. */ static inline void *video_get_drvdata(struct video_device *dev) -- cgit v1.1 From fdd2a7e2dac56a3384068802be46b822f2aed703 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 26 Jul 2008 13:25:25 -0300 Subject: V4L/DVB (8500a): videotext.h: whitespace cleanup Signed-off-by: Mauro Carvalho Chehab --- include/linux/videotext.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/videotext.h b/include/linux/videotext.h index 018f920..3e68c8d 100644 --- a/include/linux/videotext.h +++ b/include/linux/videotext.h @@ -45,10 +45,10 @@ #define VTXIOCCLRCACHE_OLD 0x710b /* clear cache on VTX-interface (if avail.) */ #define VTXIOCSETVIRT_OLD 0x710c /* turn on virtual mode (this disables TV-display) */ -/* +/* * Definitions for VTXIOCGETINFO */ - + #define SAA5243 0 #define SAA5246 1 #define SAA5249 2 @@ -57,10 +57,10 @@ typedef struct { int version_major, version_minor; /* version of driver; if version_major changes, driver */ - /* is not backward compatible!!! CHECK THIS!!! */ + /* is not backward compatible!!! CHECK THIS!!! */ int numpages; /* number of page-buffers of vtx-chipset */ int cct_type; /* type of vtx-chipset (SAA5243, SAA5246, SAA5248 or - * SAA5249) */ + * SAA5249) */ } vtx_info_t; @@ -81,7 +81,7 @@ vtx_info_t; #define PGMASK_HOUR (HR_TEN | HR_UNIT) #define PGMASK_MINUTE (MIN_TEN | MIN_UNIT) -typedef struct +typedef struct { int page; /* number of requested page (hexadecimal) */ int hour; /* requested hour (hexadecimal) */ @@ -98,11 +98,11 @@ vtx_pagereq_t; /* * Definitions for VTXIOC{GETSTAT,PUTSTAT} */ - + #define VTX_PAGESIZE (40 * 24) #define VTX_VIRTUALSIZE (40 * 49) -typedef struct +typedef struct { int pagenum; /* number of page (hexadecimal) */ int hour; /* hour (hexadecimal) */ @@ -121,5 +121,5 @@ typedef struct unsigned hamming : 1; /* hamming-error occurred */ } vtx_pageinfo_t; - + #endif /* _VTX_H */ -- cgit v1.1 From 87a9f704658a40940e740b1d73d861667e9164d3 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 23:03:48 +0300 Subject: include/video/atmel_lcdc.h must #include This patch fixes the following compile error caused by commit d22579b837358cbef12ccca5adaf7e93ae09ab7a (atmel_lcdfb: FIFO underflow management): <-- snip --> ... CC arch/avr32/boards/atstk1000/atstk1004.o In file included from /home/bunk/linux/kernel-2.6/git/linux-2.6/arch/avr32/boards/atstk1000/atstk1004.c:21: /home/bunk/linux/kernel-2.6/git/linux-2.6/include/video/atmel_lcdc.h:40: error: field 'task' has incomplete type make[2]: *** [arch/avr32/boards/atstk1000/atstk1004.o] Error 1 <-- snip --> Reported-by: Adrian Bunk Signed-off-by: Adrian Bunk Signed-off-by: Haavard Skinnemoen --- include/video/atmel_lcdc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h index ed64862..dc934e8 100644 --- a/include/video/atmel_lcdc.h +++ b/include/video/atmel_lcdc.h @@ -22,6 +22,7 @@ #ifndef __ATMEL_LCDC_H__ #define __ATMEL_LCDC_H__ +#include /* Way LCD wires are connected to the chip: * Some Atmel chips use BGR color mode (instead of standard RGB) -- cgit v1.1 From 4c920de37d29284d4cb65d76a97a567247c2ac32 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 26 Jul 2008 12:55:09 -0500 Subject: powerpc: Fix 8xx build failure The 'powerpc ioremap_prot' broke 8xx builds: include2/asm/pgtable-ppc32.h:555: error: '_PAGE_WRITETHRU' undeclared (first use in this function) include2/asm/pgtable-ppc32.h:555: error: (Each undeclared identifier is reported only once include2/asm/pgtable-ppc32.h:555: error: for each function it appears in.) Signed-off-by: Kumar Gala --- include/asm-powerpc/pgtable-ppc32.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index bdbab72..6fe39e3 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -401,6 +401,9 @@ extern int icache_44x_need_flush; #ifndef _PAGE_COHERENT #define _PAGE_COHERENT 0 #endif +#ifndef _PAGE_WRITETHRU +#define _PAGE_WRITETHRU 0 +#endif #ifndef _PMD_PRESENT_MASK #define _PMD_PRESENT_MASK _PMD_PRESENT #endif -- cgit v1.1 From 16d69265b930f7e2fa9eea381715696f780718f4 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Fri, 25 Jul 2008 19:44:36 -0700 Subject: uninline arch_pick_mmap_layout() Fix this, on avr32: include/linux/utsname.h:35, from init/main.c:20: include/linux/sched.h: In function 'arch_pick_mmap_layout': include/linux/sched.h:2149: error: implicit declaration of function 'PAGE_ALIGN' Reported-by: Adrian Bunk Cc: Haavard Skinnemoen Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 42036ff..3260a5c 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2139,16 +2139,7 @@ static inline void set_task_cpu(struct task_struct *p, unsigned int cpu) #endif /* CONFIG_SMP */ -#ifdef HAVE_ARCH_PICK_MMAP_LAYOUT extern void arch_pick_mmap_layout(struct mm_struct *mm); -#else -static inline void arch_pick_mmap_layout(struct mm_struct *mm) -{ - mm->mmap_base = TASK_UNMAPPED_BASE; - mm->get_unmapped_area = arch_get_unmapped_area; - mm->unmap_area = arch_unmap_area; -} -#endif #ifdef CONFIG_TRACING extern void -- cgit v1.1 From 44ccac13c7f4728cf2992d49384671a176db74dd Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:44:38 -0700 Subject: include/video/atmel_lcdc.h must #include This patch fixes the following compile error caused by commit d22579b837358cbef12ccca5adaf7e93ae09ab7a ("atmel_lcdfb: FIFO underflow management"): In file included from arch/avr32/boards/atstk1000/atstk1004.c:21: include/video/atmel_lcdc.h:40: error: field 'task' has incomplete type Signed-off-by: Adrian Bunk Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/video/atmel_lcdc.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h index 1ccf462..613173b 100644 --- a/include/video/atmel_lcdc.h +++ b/include/video/atmel_lcdc.h @@ -22,6 +22,7 @@ #ifndef __ATMEL_LCDC_H__ #define __ATMEL_LCDC_H__ +#include /* Way LCD wires are connected to the chip: * Some Atmel chips use BGR color mode (instead of standard RGB) -- cgit v1.1 From 8d8bb39b9eba32dd70e87fd5ad5c5dd4ba118e06 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Fri, 25 Jul 2008 19:44:49 -0700 Subject: dma-mapping: add the device argument to dma_mapping_error() Add per-device dma_mapping_ops support for CONFIG_X86_64 as POWER architecture does: This enables us to cleanly fix the Calgary IOMMU issue that some devices are not behind the IOMMU (http://lkml.org/lkml/2008/5/8/423). I think that per-device dma_mapping_ops support would be also helpful for KVM people to support PCI passthrough but Andi thinks that this makes it difficult to support the PCI passthrough (see the above thread). So I CC'ed this to KVM camp. Comments are appreciated. A pointer to dma_mapping_ops to struct dev_archdata is added. If the pointer is non NULL, DMA operations in asm/dma-mapping.h use it. If it's NULL, the system-wide dma_ops pointer is used as before. If it's useful for KVM people, I plan to implement a mechanism to register a hook called when a new pci (or dma capable) device is created (it works with hot plugging). It enables IOMMUs to set up an appropriate dma_mapping_ops per device. The major obstacle is that dma_mapping_error doesn't take a pointer to the device unlike other DMA operations. So x86 can't have dma_mapping_ops per device. Note all the POWER IOMMUs use the same dma_mapping_error function so this is not a problem for POWER but x86 IOMMUs use different dma_mapping_error functions. The first patch adds the device argument to dma_mapping_error. The patch is trivial but large since it touches lots of drivers and dma-mapping.h in all the architecture. This patch: dma_mapping_error() doesn't take a pointer to the device unlike other DMA operations. So we can't have dma_mapping_ops per device. Note that POWER already has dma_mapping_ops per device but all the POWER IOMMUs use the same dma_mapping_error function. x86 IOMMUs use device argument. [akpm@linux-foundation.org: fix sge] [akpm@linux-foundation.org: fix svc_rdma] [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: fix bnx2x] [akpm@linux-foundation.org: fix s2io] [akpm@linux-foundation.org: fix pasemi_mac] [akpm@linux-foundation.org: fix sdhci] [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: fix sparc] [akpm@linux-foundation.org: fix ibmvscsi] Signed-off-by: FUJITA Tomonori Cc: Muli Ben-Yehuda Cc: Andi Kleen Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Avi Kivity Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-alpha/dma-mapping.h | 6 +- include/asm-alpha/pci.h | 2 +- include/asm-arm/dma-mapping.h | 2 +- include/asm-avr32/dma-mapping.h | 2 +- include/asm-cris/dma-mapping.h | 2 +- include/asm-frv/dma-mapping.h | 2 +- include/asm-generic/dma-mapping-broken.h | 2 +- include/asm-generic/dma-mapping.h | 4 +- include/asm-generic/pci-dma-compat.h | 4 +- include/asm-ia64/machvec.h | 2 +- include/asm-m68k/dma-mapping.h | 2 +- include/asm-mips/dma-mapping.h | 2 +- include/asm-mn10300/dma-mapping.h | 2 +- include/asm-parisc/dma-mapping.h | 2 +- include/asm-powerpc/dma-mapping.h | 2 +- include/asm-sh/dma-mapping.h | 2 +- include/asm-sparc/dma-mapping_64.h | 2 +- include/asm-sparc/pci_32.h | 3 +- include/asm-sparc/pci_64.h | 5 +- include/asm-x86/device.h | 3 + include/asm-x86/dma-mapping.h | 99 ++++++++++++++++++++++---------- include/asm-x86/swiotlb.h | 2 +- include/asm-xtensa/dma-mapping.h | 2 +- include/linux/i2o.h | 2 +- include/linux/ssb/ssb.h | 4 +- include/rdma/ib_verbs.h | 2 +- 26 files changed, 103 insertions(+), 61 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/dma-mapping.h b/include/asm-alpha/dma-mapping.h index db351d1..a5801ae 100644 --- a/include/asm-alpha/dma-mapping.h +++ b/include/asm-alpha/dma-mapping.h @@ -24,8 +24,8 @@ pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir) #define dma_supported(dev, mask) \ pci_dma_supported(alpha_gendev_to_pci(dev), mask) -#define dma_mapping_error(addr) \ - pci_dma_mapping_error(addr) +#define dma_mapping_error(dev, addr) \ + pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr) #else /* no PCI - no IOMMU. */ @@ -45,7 +45,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, #define dma_unmap_page(dev, addr, size, dir) ((void)0) #define dma_unmap_sg(dev, sg, nents, dir) ((void)0) -#define dma_mapping_error(addr) (0) +#define dma_mapping_error(dev, addr) (0) #endif /* !CONFIG_PCI */ diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h index d31fd49..2a14302 100644 --- a/include/asm-alpha/pci.h +++ b/include/asm-alpha/pci.h @@ -106,7 +106,7 @@ extern dma_addr_t pci_map_page(struct pci_dev *, struct page *, /* Test for pci_map_single or pci_map_page having generated an error. */ static inline int -pci_dma_mapping_error(dma_addr_t dma_addr) +pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr) { return dma_addr == 0; } diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index e99406a..f41335b 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -56,7 +56,7 @@ static inline int dma_is_consistent(struct device *dev, dma_addr_t handle) /* * DMA errors are defined by all-bits-set in the DMA address. */ -static inline int dma_mapping_error(dma_addr_t dma_addr) +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return dma_addr == ~0; } diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h index 57dc672..0399359 100644 --- a/include/asm-avr32/dma-mapping.h +++ b/include/asm-avr32/dma-mapping.h @@ -35,7 +35,7 @@ static inline int dma_set_mask(struct device *dev, u64 dma_mask) /* * dma_map_single can't fail as it is implemented now. */ -static inline int dma_mapping_error(dma_addr_t addr) +static inline int dma_mapping_error(struct device *dev, dma_addr_t addr) { return 0; } diff --git a/include/asm-cris/dma-mapping.h b/include/asm-cris/dma-mapping.h index edc8d1b..cb2fb25 100644 --- a/include/asm-cris/dma-mapping.h +++ b/include/asm-cris/dma-mapping.h @@ -120,7 +120,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, } static inline int -dma_mapping_error(dma_addr_t dma_addr) +dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return 0; } diff --git a/include/asm-frv/dma-mapping.h b/include/asm-frv/dma-mapping.h index 2e8966c..b289887 100644 --- a/include/asm-frv/dma-mapping.h +++ b/include/asm-frv/dma-mapping.h @@ -126,7 +126,7 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele } static inline -int dma_mapping_error(dma_addr_t dma_addr) +int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return 0; } diff --git a/include/asm-generic/dma-mapping-broken.h b/include/asm-generic/dma-mapping-broken.h index e2468f8..82cd0cb 100644 --- a/include/asm-generic/dma-mapping-broken.h +++ b/include/asm-generic/dma-mapping-broken.h @@ -61,7 +61,7 @@ dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, #define dma_sync_sg_for_device dma_sync_sg_for_cpu extern int -dma_mapping_error(dma_addr_t dma_addr); +dma_mapping_error(struct device *dev, dma_addr_t dma_addr); extern int dma_supported(struct device *dev, u64 mask); diff --git a/include/asm-generic/dma-mapping.h b/include/asm-generic/dma-mapping.h index 783ab99..189486c 100644 --- a/include/asm-generic/dma-mapping.h +++ b/include/asm-generic/dma-mapping.h @@ -144,9 +144,9 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, } static inline int -dma_mapping_error(dma_addr_t dma_addr) +dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { - return pci_dma_mapping_error(dma_addr); + return pci_dma_mapping_error(to_pci_dev(dev), dma_addr); } diff --git a/include/asm-generic/pci-dma-compat.h b/include/asm-generic/pci-dma-compat.h index 25c10e9..37b3706 100644 --- a/include/asm-generic/pci-dma-compat.h +++ b/include/asm-generic/pci-dma-compat.h @@ -99,9 +99,9 @@ pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, } static inline int -pci_dma_mapping_error(dma_addr_t dma_addr) +pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr) { - return dma_mapping_error(dma_addr); + return dma_mapping_error(&pdev->dev, dma_addr); } #endif diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h index 0721a5e..a6d50c7 100644 --- a/include/asm-ia64/machvec.h +++ b/include/asm-ia64/machvec.h @@ -54,7 +54,7 @@ typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_ typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int); typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int); typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int); -typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr); +typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr); typedef int ia64_mv_dma_supported (struct device *, u64); typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *); diff --git a/include/asm-m68k/dma-mapping.h b/include/asm-m68k/dma-mapping.h index a26cdeb..91f7944 100644 --- a/include/asm-m68k/dma-mapping.h +++ b/include/asm-m68k/dma-mapping.h @@ -84,7 +84,7 @@ static inline void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *s { } -static inline int dma_mapping_error(dma_addr_t handle) +static inline int dma_mapping_error(struct device *dev, dma_addr_t handle) { return 0; } diff --git a/include/asm-mips/dma-mapping.h b/include/asm-mips/dma-mapping.h index 230b3f1..c64afb4 100644 --- a/include/asm-mips/dma-mapping.h +++ b/include/asm-mips/dma-mapping.h @@ -42,7 +42,7 @@ extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, enum dma_data_direction direction); -extern int dma_mapping_error(dma_addr_t dma_addr); +extern int dma_mapping_error(struct device *dev, dma_addr_t dma_addr); extern int dma_supported(struct device *dev, u64 mask); static inline int diff --git a/include/asm-mn10300/dma-mapping.h b/include/asm-mn10300/dma-mapping.h index 7c882fc..ccae8f6 100644 --- a/include/asm-mn10300/dma-mapping.h +++ b/include/asm-mn10300/dma-mapping.h @@ -182,7 +182,7 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, } static inline -int dma_mapping_error(dma_addr_t dma_addr) +int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return 0; } diff --git a/include/asm-parisc/dma-mapping.h b/include/asm-parisc/dma-mapping.h index c6c0e9f..53af696 100644 --- a/include/asm-parisc/dma-mapping.h +++ b/include/asm-parisc/dma-mapping.h @@ -248,6 +248,6 @@ void * sba_get_iommu(struct parisc_device *dev); #endif /* At the moment, we panic on error for IOMMU resource exaustion */ -#define dma_mapping_error(x) 0 +#define dma_mapping_error(dev, x) 0 #endif diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h index 74c5497..c7ca45f 100644 --- a/include/asm-powerpc/dma-mapping.h +++ b/include/asm-powerpc/dma-mapping.h @@ -415,7 +415,7 @@ static inline void dma_sync_sg_for_device(struct device *dev, __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); } -static inline int dma_mapping_error(dma_addr_t dma_addr) +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { #ifdef CONFIG_PPC64 return (dma_addr == DMA_ERROR_CODE); diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h index 22cc419..6c0b8a2 100644 --- a/include/asm-sh/dma-mapping.h +++ b/include/asm-sh/dma-mapping.h @@ -171,7 +171,7 @@ static inline int dma_get_cache_alignment(void) return L1_CACHE_BYTES; } -static inline int dma_mapping_error(dma_addr_t dma_addr) +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return dma_addr == 0; } diff --git a/include/asm-sparc/dma-mapping_64.h b/include/asm-sparc/dma-mapping_64.h index 38cbec7..bfa64f9 100644 --- a/include/asm-sparc/dma-mapping_64.h +++ b/include/asm-sparc/dma-mapping_64.h @@ -135,7 +135,7 @@ static inline void dma_sync_sg_for_device(struct device *dev, /* No flushing needed to sync cpu writes to the device. */ } -static inline int dma_mapping_error(dma_addr_t dma_addr) +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return (dma_addr == DMA_ERROR_CODE); } diff --git a/include/asm-sparc/pci_32.h b/include/asm-sparc/pci_32.h index b93b6c7..0ee949d 100644 --- a/include/asm-sparc/pci_32.h +++ b/include/asm-sparc/pci_32.h @@ -154,7 +154,8 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) -static inline int pci_dma_mapping_error(dma_addr_t dma_addr) +static inline int pci_dma_mapping_error(struct pci_dev *pdev, + dma_addr_t dma_addr) { return (dma_addr == PCI_DMA_ERROR_CODE); } diff --git a/include/asm-sparc/pci_64.h b/include/asm-sparc/pci_64.h index f59f257..4f79a54 100644 --- a/include/asm-sparc/pci_64.h +++ b/include/asm-sparc/pci_64.h @@ -140,9 +140,10 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) #define PCI64_ADDR_BASE 0xfffc000000000000UL -static inline int pci_dma_mapping_error(dma_addr_t dma_addr) +static inline int pci_dma_mapping_error(struct pci_dev *pdev, + dma_addr_t dma_addr) { - return dma_mapping_error(dma_addr); + return dma_mapping_error(&pdev->dev, dma_addr); } #ifdef CONFIG_PCI diff --git a/include/asm-x86/device.h b/include/asm-x86/device.h index 87a7153..3c034f4 100644 --- a/include/asm-x86/device.h +++ b/include/asm-x86/device.h @@ -5,6 +5,9 @@ struct dev_archdata { #ifdef CONFIG_ACPI void *acpi_handle; #endif +#ifdef CONFIG_X86_64 +struct dma_mapping_ops *dma_ops; +#endif #ifdef CONFIG_DMAR void *iommu; /* hook for IOMMU specific extension */ #endif diff --git a/include/asm-x86/dma-mapping.h b/include/asm-x86/dma-mapping.h index c2ddd3d..0eaa9bf 100644 --- a/include/asm-x86/dma-mapping.h +++ b/include/asm-x86/dma-mapping.h @@ -17,7 +17,8 @@ extern int panic_on_overflow; extern int force_iommu; struct dma_mapping_ops { - int (*mapping_error)(dma_addr_t dma_addr); + int (*mapping_error)(struct device *dev, + dma_addr_t dma_addr); void* (*alloc_coherent)(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp); void (*free_coherent)(struct device *dev, size_t size, @@ -56,14 +57,32 @@ struct dma_mapping_ops { int is_phys; }; -extern const struct dma_mapping_ops *dma_ops; +extern struct dma_mapping_ops *dma_ops; -static inline int dma_mapping_error(dma_addr_t dma_addr) +static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) { - if (dma_ops->mapping_error) - return dma_ops->mapping_error(dma_addr); +#ifdef CONFIG_X86_32 + return dma_ops; +#else + if (unlikely(!dev) || !dev->archdata.dma_ops) + return dma_ops; + else + return dev->archdata.dma_ops; +#endif +} + +/* Make sure we keep the same behaviour */ +static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) +{ +#ifdef CONFIG_X86_32 + return 0; +#else + struct dma_mapping_ops *ops = get_dma_ops(dev); + if (ops->mapping_error) + return ops->mapping_error(dev, dma_addr); return (dma_addr == bad_dma_address); +#endif } #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) @@ -83,44 +102,53 @@ static inline dma_addr_t dma_map_single(struct device *hwdev, void *ptr, size_t size, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - return dma_ops->map_single(hwdev, virt_to_phys(ptr), size, direction); + return ops->map_single(hwdev, virt_to_phys(ptr), size, direction); } static inline void dma_unmap_single(struct device *dev, dma_addr_t addr, size_t size, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(dev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->unmap_single) - dma_ops->unmap_single(dev, addr, size, direction); + if (ops->unmap_single) + ops->unmap_single(dev, addr, size, direction); } static inline int dma_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - return dma_ops->map_sg(hwdev, sg, nents, direction); + return ops->map_sg(hwdev, sg, nents, direction); } static inline void dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->unmap_sg) - dma_ops->unmap_sg(hwdev, sg, nents, direction); + if (ops->unmap_sg) + ops->unmap_sg(hwdev, sg, nents, direction); } static inline void dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle, size_t size, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_single_for_cpu) - dma_ops->sync_single_for_cpu(hwdev, dma_handle, size, - direction); + if (ops->sync_single_for_cpu) + ops->sync_single_for_cpu(hwdev, dma_handle, size, direction); flush_write_buffers(); } @@ -128,10 +156,11 @@ static inline void dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle, size_t size, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_single_for_device) - dma_ops->sync_single_for_device(hwdev, dma_handle, size, - direction); + if (ops->sync_single_for_device) + ops->sync_single_for_device(hwdev, dma_handle, size, direction); flush_write_buffers(); } @@ -139,11 +168,12 @@ static inline void dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle, unsigned long offset, size_t size, int direction) { - BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_single_range_for_cpu) - dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, - size, direction); + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); + if (ops->sync_single_range_for_cpu) + ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, + size, direction); flush_write_buffers(); } @@ -152,11 +182,12 @@ dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle, unsigned long offset, size_t size, int direction) { - BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_single_range_for_device) - dma_ops->sync_single_range_for_device(hwdev, dma_handle, - offset, size, direction); + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); + if (ops->sync_single_range_for_device) + ops->sync_single_range_for_device(hwdev, dma_handle, + offset, size, direction); flush_write_buffers(); } @@ -164,9 +195,11 @@ static inline void dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, int nelems, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_sg_for_cpu) - dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction); + if (ops->sync_sg_for_cpu) + ops->sync_sg_for_cpu(hwdev, sg, nelems, direction); flush_write_buffers(); } @@ -174,9 +207,11 @@ static inline void dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, int nelems, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(hwdev); + BUG_ON(!valid_dma_direction(direction)); - if (dma_ops->sync_sg_for_device) - dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction); + if (ops->sync_sg_for_device) + ops->sync_sg_for_device(hwdev, sg, nelems, direction); flush_write_buffers(); } @@ -185,9 +220,11 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, size_t offset, size_t size, int direction) { + struct dma_mapping_ops *ops = get_dma_ops(dev); + BUG_ON(!valid_dma_direction(direction)); - return dma_ops->map_single(dev, page_to_phys(page)+offset, - size, direction); + return ops->map_single(dev, page_to_phys(page) + offset, + size, direction); } static inline void dma_unmap_page(struct device *dev, dma_addr_t addr, diff --git a/include/asm-x86/swiotlb.h b/include/asm-x86/swiotlb.h index c706a74..2730b35 100644 --- a/include/asm-x86/swiotlb.h +++ b/include/asm-x86/swiotlb.h @@ -35,7 +35,7 @@ extern int swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction); extern void swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction); -extern int swiotlb_dma_mapping_error(dma_addr_t dma_addr); +extern int swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr); extern void swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); extern int swiotlb_dma_supported(struct device *hwdev, u64 mask); diff --git a/include/asm-xtensa/dma-mapping.h b/include/asm-xtensa/dma-mapping.h index 3c7d537..51882ae 100644 --- a/include/asm-xtensa/dma-mapping.h +++ b/include/asm-xtensa/dma-mapping.h @@ -139,7 +139,7 @@ dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, consistent_sync(sg_virt(sg), sg->length, dir); } static inline int -dma_mapping_error(dma_addr_t dma_addr) +dma_mapping_error(struct device *dev, dma_addr_t dma_addr) { return 0; } diff --git a/include/linux/i2o.h b/include/linux/i2o.h index 7d51cbc..75ae6d8 100644 --- a/include/linux/i2o.h +++ b/include/linux/i2o.h @@ -758,7 +758,7 @@ static inline dma_addr_t i2o_dma_map_single(struct i2o_controller *c, void *ptr, } dma_addr = dma_map_single(&c->pdev->dev, ptr, size, direction); - if (!dma_mapping_error(dma_addr)) { + if (!dma_mapping_error(&c->pdev->dev, dma_addr)) { #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64 if ((sizeof(dma_addr_t) > 4) && c->pae_support) { *mptr++ = cpu_to_le32(0x7C020002); diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h index 4bf8cad..e530026 100644 --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h @@ -427,9 +427,9 @@ static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr) { switch (dev->bus->bustype) { case SSB_BUSTYPE_PCI: - return pci_dma_mapping_error(addr); + return pci_dma_mapping_error(dev->bus->host_pci, addr); case SSB_BUSTYPE_SSB: - return dma_mapping_error(addr); + return dma_mapping_error(dev->dev, addr); default: __ssb_dma_not_implemented(dev); } diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h index 90b529f..936e333 100644 --- a/include/rdma/ib_verbs.h +++ b/include/rdma/ib_verbs.h @@ -1590,7 +1590,7 @@ static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr) { if (dev->dma_ops) return dev->dma_ops->mapping_error(dev, dma_addr); - return dma_mapping_error(dma_addr); + return dma_mapping_error(dev->dma_device, dma_addr); } /** -- cgit v1.1 From 1956a96de488feb05e95c08c9d5e80f63a4be2b1 Mon Sep 17 00:00:00 2001 From: Alexis Bruemmer Date: Fri, 25 Jul 2008 19:44:51 -0700 Subject: x86 calgary: fix handling of devices that aren't behind the Calgary The calgary code can give drivers addresses above 4GB which is very bad for hardware that is only 32bit DMA addressable. With this patch, the calgary code sets the global dma_ops to swiotlb or nommu properly, and the dma_ops of devices behind the Calgary/CalIOC2 to calgary_dma_ops. So the calgary code can handle devices safely that aren't behind the Calgary/CalIOC2. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Alexis Bruemmer Signed-off-by: FUJITA Tomonori Cc: Muli Ben-Yehuda Cc: Ingo Molnar Cc: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-x86/iommu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h index d63166f..ecc8061 100644 --- a/include/asm-x86/iommu.h +++ b/include/asm-x86/iommu.h @@ -3,6 +3,7 @@ extern void pci_iommu_shutdown(void); extern void no_iommu_init(void); +extern struct dma_mapping_ops nommu_dma_ops; extern int force_iommu, no_iommu; extern int iommu_detected; -- cgit v1.1 From 929dfb24fbcd60e2544b2de7bfb4a68da4dfc747 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:44:54 -0700 Subject: parport/share.c: proper externs This patch adds proper externs for parport_default_timeslice and parport_default_spintime in include/linux/parport.h Signed-off-by: Adrian Bunk Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/parport.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/parport.h b/include/linux/parport.h index dcb9e01..6a0d7cd 100644 --- a/include/linux/parport.h +++ b/include/linux/parport.h @@ -560,5 +560,8 @@ extern int parport_device_proc_unregister(struct pardevice *device); #endif /* !CONFIG_PARPORT_NOT_PC */ +extern unsigned long parport_default_timeslice; +extern int parport_default_spintime; + #endif /* __KERNEL__ */ #endif /* _PARPORT_H_ */ -- cgit v1.1 From b77899985bdfd85a8e5a6e485033a9b4713d2471 Mon Sep 17 00:00:00 2001 From: Alex Dubov Date: Fri, 25 Jul 2008 19:45:00 -0700 Subject: memstick: allow "set_param" method to return an error code Some controllers (Jmicron, for instance) can report temporal failure condition during power-on. It is desirable to account for this using a return value of "set_param" device method. The return value can also be handy to distinguish between supported and unsupported device parameters in run time. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Alex Dubov Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/memstick.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/memstick.h b/include/linux/memstick.h index 37a5cdb..2fe599c 100644 --- a/include/linux/memstick.h +++ b/include/linux/memstick.h @@ -284,7 +284,7 @@ struct memstick_host { /* Notify the host that some requests are pending. */ void (*request)(struct memstick_host *host); /* Set host IO parameters (power, clock, etc). */ - void (*set_param)(struct memstick_host *host, + int (*set_param)(struct memstick_host *host, enum memstick_param param, int value); unsigned long private[0] ____cacheline_aligned; -- cgit v1.1 From 17017d8d2c005734d7088d8281ce2daab8fcb097 Mon Sep 17 00:00:00 2001 From: Alex Dubov Date: Fri, 25 Jul 2008 19:45:01 -0700 Subject: memstick: add "start" and "stop" methods to memstick device In some cases it may be desirable to ensure that associated driver is not going to access the media in some period of time. "start" and "stop" methods are provided therefore to allow it. Signed-off-by: Alex Dubov Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/memstick.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/memstick.h b/include/linux/memstick.h index 2fe599c..a9f998a 100644 --- a/include/linux/memstick.h +++ b/include/linux/memstick.h @@ -263,6 +263,10 @@ struct memstick_dev { /* Get next request from the media driver. */ int (*next_request)(struct memstick_dev *card, struct memstick_request **mrq); + /* Tell the media driver to stop doing things */ + void (*stop)(struct memstick_dev *card); + /* Allow the media driver to continue */ + void (*start)(struct memstick_dev *card); struct device dev; }; -- cgit v1.1 From 3ab83521378268044a448113c6aa9a9e245f4d2f Mon Sep 17 00:00:00 2001 From: Huang Ying Date: Fri, 25 Jul 2008 19:45:07 -0700 Subject: kexec jump This patch provides an enhancement to kexec/kdump. It implements the following features: - Backup/restore memory used by the original kernel before/after kexec. - Save/restore CPU state before/after kexec. The features of this patch can be used as a general method to call program in physical mode (paging turning off). This can be used to call BIOS code under Linux. kexec-tools needs to be patched to support kexec jump. The patches and the precompiled kexec can be download from the following URL: source: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-src_git_kh10.tar.bz2 patches: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-patches_git_kh10.tar.bz2 binary: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec_git_kh10 Usage example of calling some physical mode code and return: 1. Compile and install patched kernel with following options selected: CONFIG_X86_32=y CONFIG_KEXEC=y CONFIG_PM=y CONFIG_KEXEC_JUMP=y 2. Build patched kexec-tool or download the pre-built one. 3. Build some physical mode executable named such as "phy_mode" 4. Boot kernel compiled in step 1. 5. Load physical mode executable with /sbin/kexec. The shell command line can be as follow: /sbin/kexec --load-preserve-context --args-none phy_mode 6. Call physical mode executable with following shell command line: /sbin/kexec -e Implementation point: To support jumping without reserving memory. One shadow backup page (source page) is allocated for each page used by kexeced code image (destination page). When do kexec_load, the image of kexeced code is loaded into source pages, and before executing, the destination pages and the source pages are swapped, so the contents of destination pages are backupped. Before jumping to the kexeced code image and after jumping back to the original kernel, the destination pages and the source pages are swapped too. C ABI (calling convention) is used as communication protocol between kernel and called code. A flag named KEXEC_PRESERVE_CONTEXT for sys_kexec_load is added to indicate that the loaded kernel image is used for jumping back. Now, only the i386 architecture is supported. Signed-off-by: Huang Ying Acked-by: Vivek Goyal Cc: "Eric W. Biederman" Cc: Pavel Machek Cc: Nigel Cunningham Cc: "Rafael J. Wysocki" Cc: Ingo Molnar Cc: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-x86/kexec.h | 18 ++++++++++-------- include/linux/kexec.h | 17 +++++++++++++---- 2 files changed, 23 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/asm-x86/kexec.h b/include/asm-x86/kexec.h index 8f855a1..c0e52a1 100644 --- a/include/asm-x86/kexec.h +++ b/include/asm-x86/kexec.h @@ -10,14 +10,15 @@ # define VA_PTE_0 5 # define PA_PTE_1 6 # define VA_PTE_1 7 +# define PA_SWAP_PAGE 8 # ifdef CONFIG_X86_PAE -# define PA_PMD_0 8 -# define VA_PMD_0 9 -# define PA_PMD_1 10 -# define VA_PMD_1 11 -# define PAGES_NR 12 +# define PA_PMD_0 9 +# define VA_PMD_0 10 +# define PA_PMD_1 11 +# define VA_PMD_1 12 +# define PAGES_NR 13 # else -# define PAGES_NR 8 +# define PAGES_NR 9 # endif #else # define PA_CONTROL_PAGE 0 @@ -152,11 +153,12 @@ static inline void crash_setup_regs(struct pt_regs *newregs, } #ifdef CONFIG_X86_32 -asmlinkage NORET_TYPE void +asmlinkage unsigned long relocate_kernel(unsigned long indirection_page, unsigned long control_page, unsigned long start_address, - unsigned int has_pae) ATTRIB_NORET; + unsigned int has_pae, + unsigned int preserve_context); #else NORET_TYPE void relocate_kernel(unsigned long indirection_page, diff --git a/include/linux/kexec.h b/include/linux/kexec.h index 3265968..82f88a8 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h @@ -83,6 +83,7 @@ struct kimage { unsigned long start; struct page *control_code_page; + struct page *swap_page; unsigned long nr_segments; struct kexec_segment segment[KEXEC_SEGMENT_MAX]; @@ -98,18 +99,20 @@ struct kimage { unsigned int type : 1; #define KEXEC_TYPE_DEFAULT 0 #define KEXEC_TYPE_CRASH 1 + unsigned int preserve_context : 1; }; /* kexec interface functions */ -extern NORET_TYPE void machine_kexec(struct kimage *image) ATTRIB_NORET; +extern void machine_kexec(struct kimage *image); extern int machine_kexec_prepare(struct kimage *image); extern void machine_kexec_cleanup(struct kimage *image); extern asmlinkage long sys_kexec_load(unsigned long entry, unsigned long nr_segments, struct kexec_segment __user *segments, unsigned long flags); +extern int kernel_kexec(void); #ifdef CONFIG_COMPAT extern asmlinkage long compat_sys_kexec_load(unsigned long entry, unsigned long nr_segments, @@ -156,8 +159,9 @@ extern struct kimage *kexec_crash_image; #define kexec_flush_icache_page(page) #endif -#define KEXEC_ON_CRASH 0x00000001 -#define KEXEC_ARCH_MASK 0xffff0000 +#define KEXEC_ON_CRASH 0x00000001 +#define KEXEC_PRESERVE_CONTEXT 0x00000002 +#define KEXEC_ARCH_MASK 0xffff0000 /* These values match the ELF architecture values. * Unless there is a good reason that should continue to be the case. @@ -174,7 +178,12 @@ extern struct kimage *kexec_crash_image; #define KEXEC_ARCH_MIPS_LE (10 << 16) #define KEXEC_ARCH_MIPS ( 8 << 16) -#define KEXEC_FLAGS (KEXEC_ON_CRASH) /* List of defined/legal kexec flags */ +/* List of defined/legal kexec flags */ +#ifndef CONFIG_KEXEC_JUMP +#define KEXEC_FLAGS KEXEC_ON_CRASH +#else +#define KEXEC_FLAGS (KEXEC_ON_CRASH | KEXEC_PRESERVE_CONTEXT) +#endif #define VMCOREINFO_BYTES (4096) #define VMCOREINFO_NOTE_NAME "VMCOREINFO" -- cgit v1.1 From 89081d17f7bb81d89fa1aa9b70f821c5cf4d39e9 Mon Sep 17 00:00:00 2001 From: Huang Ying Date: Fri, 25 Jul 2008 19:45:10 -0700 Subject: kexec jump: save/restore device state This patch implements devices state save/restore before after kexec. This patch together with features in kexec_jump patch can be used for following: - A simple hibernation implementation without ACPI support. You can kexec a hibernating kernel, save the memory image of original system and shutdown the system. When resuming, you restore the memory image of original system via ordinary kexec load then jump back. - Kernel/system debug through making system snapshot. You can make system snapshot, jump back, do some thing and make another system snapshot. - Cooperative multi-kernel/system. With kexec jump, you can switch between several kernels/systems quickly without boot process except the first time. This appears like swap a whole kernel/system out/in. - A general method to call program in physical mode (paging turning off). This can be used to invoke BIOS code under Linux. The following user-space tools can be used with kexec jump: - kexec-tools needs to be patched to support kexec jump. The patches and the precompiled kexec can be download from the following URL: source: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-src_git_kh10.tar.bz2 patches: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-patches_git_kh10.tar.bz2 binary: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec_git_kh10 - makedumpfile with patches are used as memory image saving tool, it can exclude free pages from original kernel memory image file. The patches and the precompiled makedumpfile can be download from the following URL: source: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-src_cvs_kh10.tar.bz2 patches: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-patches_cvs_kh10.tar.bz2 binary: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile_cvs_kh10 - An initramfs image can be used as the root file system of kexeced kernel. An initramfs image built with "BuildRoot" can be downloaded from the following URL: initramfs image: http://khibernation.sourceforge.net/download/release_v10/initramfs/rootfs_cvs_kh10.gz All user space tools above are included in the initramfs image. Usage example of simple hibernation: 1. Compile and install patched kernel with following options selected: CONFIG_X86_32=y CONFIG_RELOCATABLE=y CONFIG_KEXEC=y CONFIG_CRASH_DUMP=y CONFIG_PM=y CONFIG_HIBERNATION=y CONFIG_KEXEC_JUMP=y 2. Build an initramfs image contains kexec-tool and makedumpfile, or download the pre-built initramfs image, called rootfs.gz in following text. 3. Prepare a partition to save memory image of original kernel, called hibernating partition in following text. 4. Boot kernel compiled in step 1 (kernel A). 5. In the kernel A, load kernel compiled in step 1 (kernel B) with /sbin/kexec. The shell command line can be as follow: /sbin/kexec --load-preserve-context /boot/bzImage --mem-min=0x100000 --mem-max=0xffffff --initrd=rootfs.gz 6. Boot the kernel B with following shell command line: /sbin/kexec -e 7. The kernel B will boot as normal kexec. In kernel B the memory image of kernel A can be saved into hibernating partition as follow: jump_back_entry=`cat /proc/cmdline | tr ' ' '\n' | grep kexec_jump_back_entry | cut -d '='` echo $jump_back_entry > kexec_jump_back_entry cp /proc/vmcore dump.elf Then you can shutdown the machine as normal. 8. Boot kernel compiled in step 1 (kernel C). Use the rootfs.gz as root file system. 9. In kernel C, load the memory image of kernel A as follow: /sbin/kexec -l --args-none --entry=`cat kexec_jump_back_entry` dump.elf 10. Jump back to the kernel A as follow: /sbin/kexec -e Then, kernel A is resumed. Implementation point: To support jumping between two kernels, before jumping to (executing) the new kernel and jumping back to the original kernel, the devices are put into quiescent state, and the state of devices and CPU is saved. After jumping back from kexeced kernel and jumping to the new kernel, the state of devices and CPU are restored accordingly. The devices/CPU state save/restore code of software suspend is called to implement corresponding function. Known issues: - Because the segment number supported by sys_kexec_load is limited, hibernation image with many segments may not be load. This is planned to be eliminated by adding a new flag to sys_kexec_load to make a image can be loaded with multiple sys_kexec_load invoking. Now, only the i386 architecture is supported. Signed-off-by: Huang Ying Acked-by: Vivek Goyal Cc: "Eric W. Biederman" Cc: Pavel Machek Cc: Nigel Cunningham Cc: "Rafael J. Wysocki" Cc: Ingo Molnar Cc: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/suspend.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/suspend.h b/include/linux/suspend.h index e8e6915..c634350 100644 --- a/include/linux/suspend.h +++ b/include/linux/suspend.h @@ -278,4 +278,6 @@ static inline void register_nosave_region_late(unsigned long b, unsigned long e) } #endif +extern struct mutex pm_mutex; + #endif /* _LINUX_SUSPEND_H */ -- cgit v1.1 From c2147a5092cfe13dbf3210e54e8a622015edeecc Mon Sep 17 00:00:00 2001 From: Eduard - Gabriel Munteanu Date: Fri, 25 Jul 2008 19:45:11 -0700 Subject: Better interface for hooking early initcalls Added early initcall (pre-SMP) support, using an identical interface to that of regular initcalls. Functions called from do_pre_smp_initcalls() could be converted to use this cleaner interface. This is required by CPU hotplug, because early users have to register notifiers before going SMP. One such CPU hotplug user is the relay interface with buffer-only channels, which needs to register such a notifier, to be usable in early code. This in turn is used by kmemtrace. Signed-off-by: Eduard - Gabriel Munteanu Cc: Tom Zanussi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/vmlinux.lds.h | 2 ++ include/linux/init.h | 7 +++++++ 2 files changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 729f6b0..9cd44b1 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -359,6 +359,8 @@ } #define INITCALLS \ + *(.initcallearly.init) \ + __early_initcall_end = .; \ *(.initcall0.init) \ *(.initcall0s.init) \ *(.initcall1.init) \ diff --git a/include/linux/init.h b/include/linux/init.h index 42ae954..11b84e1 100644 --- a/include/linux/init.h +++ b/include/linux/init.h @@ -170,6 +170,13 @@ extern void (*late_time_init)(void); __attribute__((__section__(".initcall" level ".init"))) = fn /* + * Early initcalls run before initializing SMP. + * + * Only for built-in code, not modules. + */ +#define early_initcall(fn) __define_initcall("early",fn,early) + +/* * A "pure" initcall has no dependencies on anything else, and purely * initializes variables that couldn't be statically initialized. * -- cgit v1.1 From 7babe8db99d305340cf4828ce1f5a1481d5622ef Mon Sep 17 00:00:00 2001 From: Eduard - Gabriel Munteanu Date: Fri, 25 Jul 2008 19:45:11 -0700 Subject: Full conversion to early_initcall() interface, remove old interface A previous patch added the early_initcall(), to allow a cleaner hooking of pre-SMP initcalls. Now we remove the older interface, converting all existing users to the new one. [akpm@linux-foundation.org: cleanups] [akpm@linux-foundation.org: build fix] [kosaki.motohiro@jp.fujitsu.com: warning fix] [kosaki.motohiro@jp.fujitsu.com: warning fix] Signed-off-by: Eduard - Gabriel Munteanu Cc: Tom Zanussi Signed-off-by: KOSAKI Motohiro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 9 --------- include/linux/smp.h | 5 ----- 2 files changed, 14 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 3260a5c..adb8077 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -292,7 +292,6 @@ extern void sched_show_task(struct task_struct *p); #ifdef CONFIG_DETECT_SOFTLOCKUP extern void softlockup_tick(void); -extern void spawn_softlockup_task(void); extern void touch_softlockup_watchdog(void); extern void touch_all_softlockup_watchdogs(void); extern unsigned int softlockup_panic; @@ -2222,14 +2221,6 @@ static inline void inc_syscw(struct task_struct *tsk) } #endif -#ifdef CONFIG_SMP -void migration_init(void); -#else -static inline void migration_init(void) -{ -} -#endif - #ifndef TASK_SIZE_OF #define TASK_SIZE_OF(tsk) TASK_SIZE #endif diff --git a/include/linux/smp.h b/include/linux/smp.h index 48262f8..66484d4 100644 --- a/include/linux/smp.h +++ b/include/linux/smp.h @@ -74,15 +74,10 @@ void __smp_call_function_single(int cpuid, struct call_single_data *data); #ifdef CONFIG_USE_GENERIC_SMP_HELPERS void generic_smp_call_function_single_interrupt(void); void generic_smp_call_function_interrupt(void); -void init_call_single_data(void); void ipi_call_lock(void); void ipi_call_unlock(void); void ipi_call_lock_irq(void); void ipi_call_unlock_irq(void); -#else -static inline void init_call_single_data(void) -{ -} #endif /* -- cgit v1.1 From 20d8b67c06fa5e74f44e80b0a0fd68c8327f7c6a Mon Sep 17 00:00:00 2001 From: Eduard - Gabriel Munteanu Date: Fri, 25 Jul 2008 19:45:12 -0700 Subject: relay: add buffer-only channels; useful for early logging Allows one to create and use a channel with no associated files. Files can be initialized later. This is useful in scenarios such as logging in early code, before VFS is up. Therefore, such channels can be created and used as soon as kmem_cache_init() completed. This is needed by kmemtrace to do tracing in early kernel code. [kosaki.motohiro@jp.fujitsu.com: build fix] Signed-off-by: Eduard - Gabriel Munteanu Cc: Tom Zanussi Signed-off-by: KOSAKI Motohiro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/relay.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/relay.h b/include/linux/relay.h index 6cd8c44..953fc05 100644 --- a/include/linux/relay.h +++ b/include/linux/relay.h @@ -48,6 +48,7 @@ struct rchan_buf size_t *padding; /* padding counts per sub-buffer */ size_t prev_padding; /* temporary variable */ size_t bytes_consumed; /* bytes consumed in cur read subbuf */ + size_t early_bytes; /* bytes consumed before VFS inited */ unsigned int cpu; /* this buf's cpu */ } ____cacheline_aligned; @@ -68,6 +69,7 @@ struct rchan int is_global; /* One global buffer ? */ struct list_head list; /* for channel list */ struct dentry *parent; /* parent dentry passed to open */ + int has_base_filename; /* has a filename associated? */ char base_filename[NAME_MAX]; /* saved base filename */ }; @@ -169,6 +171,9 @@ struct rchan *relay_open(const char *base_filename, size_t n_subbufs, struct rchan_callbacks *cb, void *private_data); +extern int relay_late_setup_files(struct rchan *chan, + const char *base_filename, + struct dentry *parent); extern void relay_close(struct rchan *chan); extern void relay_flush(struct rchan *chan); extern void relay_subbufs_consumed(struct rchan *chan, -- cgit v1.1 From 080ccd4573607a930367c2128fc709814b2ade5d Mon Sep 17 00:00:00 2001 From: Huang Weiyi Date: Fri, 25 Jul 2008 19:45:13 -0700 Subject: include/linux/aio.h: removed duplicated include Removed duplicated include in include/linux/aio.h Signed-off-by: Huang Weiyi Signed-off-by: Benjamin LaHaise Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/aio.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/aio.h b/include/linux/aio.h index b51ddd2..09b276c 100644 --- a/include/linux/aio.h +++ b/include/linux/aio.h @@ -7,7 +7,6 @@ #include #include -#include #define AIO_MAXSEGS 4 #define AIO_KIOGRP_NR_ATOMIC 8 -- cgit v1.1 From a0a8f5364a5ad248aec6cb705e0092ff563edc2f Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:20 -0700 Subject: x86: implement pte_special Implement the pte_special bit for x86. This is required to support lockless get_user_pages, because we need to know whether or not we can refcount a particular page given only its pte (and no vma). [hugh@veritas.com: fix a BUG] Signed-off-by: Nick Piggin Cc: Dave Kleikamp Cc: Andy Whitcroft Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Andi Kleen Cc: Dave Kleikamp Cc: Badari Pulavarty Cc: Zach Brown Cc: Jens Axboe Reviewed-by: Peter Zijlstra Signed-off-by: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-x86/pgtable.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h index 3e5dbc4..04caa2f 100644 --- a/include/asm-x86/pgtable.h +++ b/include/asm-x86/pgtable.h @@ -18,6 +18,7 @@ #define _PAGE_BIT_UNUSED2 10 #define _PAGE_BIT_UNUSED3 11 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */ +#define _PAGE_BIT_SPECIAL _PAGE_BIT_UNUSED1 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */ #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT) @@ -34,6 +35,8 @@ #define _PAGE_UNUSED3 (_AT(pteval_t, 1) << _PAGE_BIT_UNUSED3) #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT) #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE) +#define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL) +#define __HAVE_ARCH_PTE_SPECIAL #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX) @@ -54,7 +57,7 @@ /* Set of bits not changed in pte_modify */ #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \ - _PAGE_ACCESSED | _PAGE_DIRTY) + _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY) #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) #define _PAGE_CACHE_WB (0) @@ -180,7 +183,7 @@ static inline int pte_exec(pte_t pte) static inline int pte_special(pte_t pte) { - return 0; + return pte_val(pte) & _PAGE_SPECIAL; } static inline int pmd_large(pmd_t pte) @@ -246,7 +249,7 @@ static inline pte_t pte_clrglobal(pte_t pte) static inline pte_t pte_mkspecial(pte_t pte) { - return pte; + return __pte(pte_val(pte) | _PAGE_SPECIAL); } extern pteval_t __supported_pte_mask; -- cgit v1.1 From 21cc199baa815d7b3f1ace4be20b9558cbddc00f Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:22 -0700 Subject: mm: introduce get_user_pages_fast Introduce a new get_user_pages_fast mm API, which is basically a get_user_pages with a less general API (but still tends to be suited to the common case): - task and mm are always current and current->mm - force is always 0 - pages is always non-NULL - don't pass back vmas This restricted API can be implemented in a much more scalable way on many architectures when the ptes are present, by walking the page tables locklessly (no mmap_sem or page table locks). When the ptes are not populated, get_user_pages_fast() could be slower. This is implemented locklessly on x86, and used in some key direct IO call sites, in later patches, which provides nearly 10% performance improvement on a threaded database workload. Lots of other code could use this too, depending on use cases (eg. grep drivers/). And it might inspire some new and clever ways to use it. [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Nick Piggin Cc: Dave Kleikamp Cc: Andy Whitcroft Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Andi Kleen Cc: Dave Kleikamp Cc: Badari Pulavarty Cc: Zach Brown Cc: Jens Axboe Reviewed-by: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'include') diff --git a/include/linux/mm.h b/include/linux/mm.h index d87a5a5..f3fd70d 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -833,6 +833,39 @@ extern int mprotect_fixup(struct vm_area_struct *vma, struct vm_area_struct **pprev, unsigned long start, unsigned long end, unsigned long newflags); +#ifdef CONFIG_HAVE_GET_USER_PAGES_FAST +/* + * get_user_pages_fast provides equivalent functionality to get_user_pages, + * operating on current and current->mm (force=0 and doesn't return any vmas). + * + * get_user_pages_fast may take mmap_sem and page tables, so no assumptions + * can be made about locking. get_user_pages_fast is to be implemented in a + * way that is advantageous (vs get_user_pages()) when the user memory area is + * already faulted in and present in ptes. However if the pages have to be + * faulted in, it may turn out to be slightly slower). + */ +int get_user_pages_fast(unsigned long start, int nr_pages, int write, + struct page **pages); + +#else +/* + * Should probably be moved to asm-generic, and architectures can include it if + * they don't implement their own get_user_pages_fast. + */ +#define get_user_pages_fast(start, nr_pages, write, pages) \ +({ \ + struct mm_struct *mm = current->mm; \ + int ret; \ + \ + down_read(&mm->mmap_sem); \ + ret = get_user_pages(current, mm, start, nr_pages, \ + write, 0, pages, NULL); \ + up_read(&mm->mmap_sem); \ + \ + ret; \ +}) +#endif + /* * A callback you can register to apply pressure to ageable caches. * -- cgit v1.1 From 8174c430e445a93016ef18f717fe570214fa38bf Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:24 -0700 Subject: x86: lockless get_user_pages_fast() Implement get_user_pages_fast without locking in the fastpath on x86. Do an optimistic lockless pagetable walk, without taking mmap_sem or any page table locks or even mmap_sem. Page table existence is guaranteed by turning interrupts off (combined with the fact that we're always looking up the current mm, means we can do the lockless page table walk within the constraints of the TLB shootdown design). Basically we can do this lockless pagetable walk in a similar manner to the way the CPU's pagetable walker does not have to take any locks to find present ptes. This patch (combined with the subsequent ones to convert direct IO to use it) was found to give about 10% performance improvement on a 2 socket 8 core Intel Xeon system running an OLTP workload on DB2 v9.5 "To test the effects of the patch, an OLTP workload was run on an IBM x3850 M2 server with 2 processors (quad-core Intel Xeon processors at 2.93 GHz) using IBM DB2 v9.5 running Linux 2.6.24rc7 kernel. Comparing runs with and without the patch resulted in an overall performance benefit of ~9.8%. Correspondingly, oprofiles showed that samples from __up_read and __down_read routines that is seen during thread contention for system resources was reduced from 2.8% down to .05%. Monitoring the /proc/vmstat output from the patched run showed that the counter for fast_gup contained a very high number while the fast_gup_slow value was zero." (fast_gup is the old name for get_user_pages_fast, fast_gup_slow is a counter we had for the number of times the slowpath was invoked). The main reason for the improvement is that DB2 has multiple threads each issuing direct-IO. Direct-IO uses get_user_pages, and thus the threads contend the mmap_sem cacheline, and can also contend on page table locks. I would anticipate larger performance gains on larger systems, however I think DB2 uses an adaptive mix of threads and processes, so it could be that thread contention remains pretty constant as machine size increases. In which case, we stuck with "only" a 10% gain. The downside of using get_user_pages_fast is that if there is not a pte with the correct permissions for the access, we end up falling back to get_user_pages and so the get_user_pages_fast is a bit of extra work. However this should not be the common case in most performance critical code. [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: build fix] [akpm@linux-foundation.org: Kconfig fix] [akpm@linux-foundation.org: Makefile fix/cleanup] [akpm@linux-foundation.org: warning fix] Signed-off-by: Nick Piggin Cc: Dave Kleikamp Cc: Andy Whitcroft Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Andi Kleen Cc: Dave Kleikamp Cc: Badari Pulavarty Cc: Zach Brown Cc: Jens Axboe Reviewed-by: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-x86/uaccess.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-x86/uaccess.h b/include/asm-x86/uaccess.h index f6fa4d8..5f702d1 100644 --- a/include/asm-x86/uaccess.h +++ b/include/asm-x86/uaccess.h @@ -451,3 +451,4 @@ extern struct movsl_mask { #endif #endif + -- cgit v1.1 From 47feff2c8eefe85099f87c43d3096855f0085ca0 Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:29 -0700 Subject: radix-tree: add gang_lookup_slot, gang_lookup_slot_tag Introduce gang_lookup_slot() and gang_lookup_slot_tag() functions, which are used by lockless pagecache. Signed-off-by: Nick Piggin Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Hugh Dickins Cc: "Paul E. McKenney" Reviewed-by: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/radix-tree.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/radix-tree.h b/include/linux/radix-tree.h index b8ce2b4..a916c66 100644 --- a/include/linux/radix-tree.h +++ b/include/linux/radix-tree.h @@ -99,12 +99,15 @@ do { \ * * The notable exceptions to this rule are the following functions: * radix_tree_lookup + * radix_tree_lookup_slot * radix_tree_tag_get * radix_tree_gang_lookup + * radix_tree_gang_lookup_slot * radix_tree_gang_lookup_tag + * radix_tree_gang_lookup_tag_slot * radix_tree_tagged * - * The first 4 functions are able to be called locklessly, using RCU. The + * The first 7 functions are able to be called locklessly, using RCU. The * caller must ensure calls to these functions are made within rcu_read_lock() * regions. Other readers (lock-free or otherwise) and modifications may be * running concurrently. @@ -159,6 +162,9 @@ void *radix_tree_delete(struct radix_tree_root *, unsigned long); unsigned int radix_tree_gang_lookup(struct radix_tree_root *root, void **results, unsigned long first_index, unsigned int max_items); +unsigned int +radix_tree_gang_lookup_slot(struct radix_tree_root *root, void ***results, + unsigned long first_index, unsigned int max_items); unsigned long radix_tree_next_hole(struct radix_tree_root *root, unsigned long index, unsigned long max_scan); int radix_tree_preload(gfp_t gfp_mask); @@ -173,6 +179,10 @@ unsigned int radix_tree_gang_lookup_tag(struct radix_tree_root *root, void **results, unsigned long first_index, unsigned int max_items, unsigned int tag); +unsigned int +radix_tree_gang_lookup_tag_slot(struct radix_tree_root *root, void ***results, + unsigned long first_index, unsigned int max_items, + unsigned int tag); int radix_tree_tagged(struct radix_tree_root *root, unsigned int tag); static inline void radix_tree_preload_end(void) -- cgit v1.1 From e286781d5f2e9c846e012a39653a166e9d31777d Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:30 -0700 Subject: mm: speculative page references If we can be sure that elevating the page_count on a pagecache page will pin it, we can speculatively run this operation, and subsequently check to see if we hit the right page rather than relying on holding a lock or otherwise pinning a reference to the page. This can be done if get_page/put_page behaves consistently throughout the whole tree (ie. if we "get" the page after it has been used for something else, we must be able to free it with a put_page). Actually, there is a period where the count behaves differently: when the page is free or if it is a constituent page of a compound page. We need an atomic_inc_not_zero operation to ensure we don't try to grab the page in either case. This patch introduces the core locking protocol to the pagecache (ie. adds page_cache_get_speculative, and tweaks some update-side code to make it work). Thanks to Hugh for pointing out an improvement to the algorithm setting page_count to zero when we have control of all references, in order to hold off speculative getters. [kamezawa.hiroyu@jp.fujitsu.com: fix migration_entry_wait()] [hugh@veritas.com: fix add_to_page_cache] [akpm@linux-foundation.org: repair a comment] Signed-off-by: Nick Piggin Cc: Jeff Garzik Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Hugh Dickins Cc: "Paul E. McKenney" Reviewed-by: Peter Zijlstra Signed-off-by: Daisuke Nishimura Signed-off-by: KAMEZAWA Hiroyuki Signed-off-by: KOSAKI Motohiro Signed-off-by: Hugh Dickins Acked-by: Nick Piggin Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pagemap.h | 111 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 110 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index ee1ec2c..a81d818 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -12,6 +12,7 @@ #include #include #include +#include /* for in_interrupt() */ /* * Bits in mapping->flags. The lower __GFP_BITS_SHIFT bits are the page @@ -62,6 +63,98 @@ static inline void mapping_set_gfp_mask(struct address_space *m, gfp_t mask) #define page_cache_release(page) put_page(page) void release_pages(struct page **pages, int nr, int cold); +/* + * speculatively take a reference to a page. + * If the page is free (_count == 0), then _count is untouched, and 0 + * is returned. Otherwise, _count is incremented by 1 and 1 is returned. + * + * This function must be called inside the same rcu_read_lock() section as has + * been used to lookup the page in the pagecache radix-tree (or page table): + * this allows allocators to use a synchronize_rcu() to stabilize _count. + * + * Unless an RCU grace period has passed, the count of all pages coming out + * of the allocator must be considered unstable. page_count may return higher + * than expected, and put_page must be able to do the right thing when the + * page has been finished with, no matter what it is subsequently allocated + * for (because put_page is what is used here to drop an invalid speculative + * reference). + * + * This is the interesting part of the lockless pagecache (and lockless + * get_user_pages) locking protocol, where the lookup-side (eg. find_get_page) + * has the following pattern: + * 1. find page in radix tree + * 2. conditionally increment refcount + * 3. check the page is still in pagecache (if no, goto 1) + * + * Remove-side that cares about stability of _count (eg. reclaim) has the + * following (with tree_lock held for write): + * A. atomically check refcount is correct and set it to 0 (atomic_cmpxchg) + * B. remove page from pagecache + * C. free the page + * + * There are 2 critical interleavings that matter: + * - 2 runs before A: in this case, A sees elevated refcount and bails out + * - A runs before 2: in this case, 2 sees zero refcount and retries; + * subsequently, B will complete and 1 will find no page, causing the + * lookup to return NULL. + * + * It is possible that between 1 and 2, the page is removed then the exact same + * page is inserted into the same position in pagecache. That's OK: the + * old find_get_page using tree_lock could equally have run before or after + * such a re-insertion, depending on order that locks are granted. + * + * Lookups racing against pagecache insertion isn't a big problem: either 1 + * will find the page or it will not. Likewise, the old find_get_page could run + * either before the insertion or afterwards, depending on timing. + */ +static inline int page_cache_get_speculative(struct page *page) +{ + VM_BUG_ON(in_interrupt()); + +#if !defined(CONFIG_SMP) && defined(CONFIG_CLASSIC_RCU) +# ifdef CONFIG_PREEMPT + VM_BUG_ON(!in_atomic()); +# endif + /* + * Preempt must be disabled here - we rely on rcu_read_lock doing + * this for us. + * + * Pagecache won't be truncated from interrupt context, so if we have + * found a page in the radix tree here, we have pinned its refcount by + * disabling preempt, and hence no need for the "speculative get" that + * SMP requires. + */ + VM_BUG_ON(page_count(page) == 0); + atomic_inc(&page->_count); + +#else + if (unlikely(!get_page_unless_zero(page))) { + /* + * Either the page has been freed, or will be freed. + * In either case, retry here and the caller should + * do the right thing (see comments above). + */ + return 0; + } +#endif + VM_BUG_ON(PageTail(page)); + + return 1; +} + +static inline int page_freeze_refs(struct page *page, int count) +{ + return likely(atomic_cmpxchg(&page->_count, count, 0) == count); +} + +static inline void page_unfreeze_refs(struct page *page, int count) +{ + VM_BUG_ON(page_count(page) != 0); + VM_BUG_ON(count == 0); + + atomic_set(&page->_count, count); +} + #ifdef CONFIG_NUMA extern struct page *__page_cache_alloc(gfp_t gfp); #else @@ -133,7 +226,7 @@ static inline struct page *read_mapping_page(struct address_space *mapping, return read_cache_page(mapping, index, filler, data); } -int add_to_page_cache(struct page *page, struct address_space *mapping, +int add_to_page_cache_locked(struct page *page, struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); int add_to_page_cache_lru(struct page *page, struct address_space *mapping, pgoff_t index, gfp_t gfp_mask); @@ -141,6 +234,22 @@ extern void remove_from_page_cache(struct page *page); extern void __remove_from_page_cache(struct page *page); /* + * Like add_to_page_cache_locked, but used to add newly allocated pages: + * the page is new, so we can just run SetPageLocked() against it. + */ +static inline int add_to_page_cache(struct page *page, + struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) +{ + int error; + + SetPageLocked(page); + error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); + if (unlikely(error)) + ClearPageLocked(page); + return error; +} + +/* * Return byte-offset into filesystem object for page. */ static inline loff_t page_offset(struct page *page) -- cgit v1.1 From 19fd6231279be3c3bdd02ed99f9b0eb195978064 Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Fri, 25 Jul 2008 19:45:32 -0700 Subject: mm: spinlock tree_lock mapping->tree_lock has no read lockers. convert the lock from an rwlock to a spinlock. Signed-off-by: Nick Piggin Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Hugh Dickins Cc: "Paul E. McKenney" Reviewed-by: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/cacheflush.h | 4 ++-- include/asm-parisc/cacheflush.h | 4 ++-- include/linux/fs.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 70b0fe7..03cf1ee 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -424,9 +424,9 @@ static inline void flush_anon_page(struct vm_area_struct *vma, } #define flush_dcache_mmap_lock(mapping) \ - write_lock_irq(&(mapping)->tree_lock) + spin_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ - write_unlock_irq(&(mapping)->tree_lock) + spin_unlock_irq(&(mapping)->tree_lock) #define flush_icache_user_range(vma,page,addr,len) \ flush_dcache_page(page) diff --git a/include/asm-parisc/cacheflush.h b/include/asm-parisc/cacheflush.h index 2f1e1b0..b7ca6dc 100644 --- a/include/asm-parisc/cacheflush.h +++ b/include/asm-parisc/cacheflush.h @@ -45,9 +45,9 @@ void flush_cache_mm(struct mm_struct *mm); extern void flush_dcache_page(struct page *page); #define flush_dcache_mmap_lock(mapping) \ - write_lock_irq(&(mapping)->tree_lock) + spin_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ - write_unlock_irq(&(mapping)->tree_lock) + spin_unlock_irq(&(mapping)->tree_lock) #define flush_icache_page(vma,page) do { \ flush_kernel_dcache_page(page); \ diff --git a/include/linux/fs.h b/include/linux/fs.h index 49d8eb7..53d2edb 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -499,7 +499,7 @@ struct backing_dev_info; struct address_space { struct inode *host; /* owner: inode, block_device */ struct radix_tree_root page_tree; /* radix tree of all pages */ - rwlock_t tree_lock; /* and rwlock protecting it */ + spinlock_t tree_lock; /* and lock protecting it */ unsigned int i_mmap_writable;/* count VM_SHARED mappings */ struct prio_tree_root i_mmap; /* tree of private and shared mappings */ struct list_head i_mmap_nonlinear;/*list VM_NONLINEAR mappings */ -- cgit v1.1 From 51cc50685a4275c6a02653670af9f108a64e01cf Mon Sep 17 00:00:00 2001 From: Alexey Dobriyan Date: Fri, 25 Jul 2008 19:45:34 -0700 Subject: SL*B: drop kmem cache argument from constructor Kmem cache passed to constructor is only needed for constructors that are themselves multiplexeres. Nobody uses this "feature", nor does anybody uses passed kmem cache in non-trivial way, so pass only pointer to object. Non-trivial places are: arch/powerpc/mm/init_64.c arch/powerpc/mm/hugetlbpage.c This is flag day, yes. Signed-off-by: Alexey Dobriyan Acked-by: Pekka Enberg Acked-by: Christoph Lameter Cc: Jon Tollefson Cc: Nick Piggin Cc: Matt Mackall [akpm@linux-foundation.org: fix arch/powerpc/mm/hugetlbpage.c] [akpm@linux-foundation.org: fix mm/slab.c] [akpm@linux-foundation.org: fix ubifs] Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/slab.h | 2 +- include/linux/slub_def.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/slab.h b/include/linux/slab.h index 4110391..9ff8e84 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -58,7 +58,7 @@ int slab_is_available(void); struct kmem_cache *kmem_cache_create(const char *, size_t, size_t, unsigned long, - void (*)(struct kmem_cache *, void *)); + void (*)(void *)); void kmem_cache_destroy(struct kmem_cache *); int kmem_cache_shrink(struct kmem_cache *); void kmem_cache_free(struct kmem_cache *, void *); diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h index d117ea2..5bad61a 100644 --- a/include/linux/slub_def.h +++ b/include/linux/slub_def.h @@ -85,7 +85,7 @@ struct kmem_cache { struct kmem_cache_order_objects min; gfp_t allocflags; /* gfp flags to use on each alloc */ int refcount; /* Refcount for slab cache destroy */ - void (*ctor)(struct kmem_cache *, void *); + void (*ctor)(void *); int inuse; /* Offset to metadata */ int align; /* Alignment */ const char *name; /* Name (only for display!) */ -- cgit v1.1 From 88ac2921a71f788ed693bcd44731dd6bc1994640 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:43 -0700 Subject: tracehook: add linux/tracehook.h This patch series introduces the "tracehook" interface layer of inlines in . There are more details in the log entry for patch 01/23 and in the header file comments inside that patch. Most of these changes move code around with little or no change, and they should not break anything or change any behavior. This sets a new standard for uniform arch support to enable clean arch-independent implementations of new debugging and tracing stuff, denoted by CONFIG_HAVE_ARCH_TRACEHOOK. Patch 20/23 adds that symbol to arch/Kconfig, with comments listing everything an arch has to do before setting "select HAVE_ARCH_TRACEHOOK". These are elaborted a bit at: http://sourceware.org/systemtap/wiki/utrace/arch/HowTo The new inlines that arch code must define or call have detailed kerneldoc comments in the generic header files that say what is required. No arch is obligated to do any work, and no arch's build should be broken by these changes. There are several steps that each arch should take so it can set HAVE_ARCH_TRACEHOOK. Most of these are simple. Providing this support will let new things people add for doing debugging and tracing of user-level threads "just work" for your arch in the future. For an arch that does not provide HAVE_ARCH_TRACEHOOK, some new options for such features will not be available for config. I have done some arch work and will submit this to the arch maintainers after the generic tracehook series settles in. For now, that work is available in my GIT repositories, and in patch and mbox-of-patches form at http://people.redhat.com/roland/utrace/2.6-current/ This paves the way for my "utrace" work, to be submitted later. But it is not innately tied to that. I hope that the tracehook series can go in soon regardless of what eventually does or doesn't go on top of it. For anyone implementing any kind of new tracing/debugging plan, or just understanding all the context of the existing ptrace implementation, having tracehook.h makes things much easier to find and understand. This patch: This adds the new kernel-internal header file . This is not yet used at all. The comments in the header introduce what the following series of patches is about. The aim is to formalize and consolidate all the places that the core kernel code and the arch code now ties into the ptrace implementation. These patches mostly don't cause any functional change. They just move the details of ptrace logic out of core code into tracehook.h inlines, where they are mostly compiled away to the same as before. All that changes is that everything is thoroughly documented and any future reworking of ptrace, or addition of something new, would not have to touch core code all over, just change the tracehook.h inlines. The new linux/ptrace.h inlines are used by the following patches in the new tracehook_*() inlines. Using these helpers for the ptrace event stops makes it simple to change or disable the old ptrace implementation of these stops conditionally later. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ptrace.h | 33 ++++++++++++++++++++++++++++++ include/linux/tracehook.h | 52 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) create mode 100644 include/linux/tracehook.h (limited to 'include') diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index c6f5f9d..c74abfc 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -121,6 +121,39 @@ static inline void ptrace_unlink(struct task_struct *child) int generic_ptrace_peekdata(struct task_struct *tsk, long addr, long data); int generic_ptrace_pokedata(struct task_struct *tsk, long addr, long data); +/** + * task_ptrace - return %PT_* flags that apply to a task + * @task: pointer to &task_struct in question + * + * Returns the %PT_* flags that apply to @task. + */ +static inline int task_ptrace(struct task_struct *task) +{ + return task->ptrace; +} + +/** + * ptrace_event - possibly stop for a ptrace event notification + * @mask: %PT_* bit to check in @current->ptrace + * @event: %PTRACE_EVENT_* value to report if @mask is set + * @message: value for %PTRACE_GETEVENTMSG to return + * + * This checks the @mask bit to see if ptrace wants stops for this event. + * If so we stop, reporting @event and @message to the ptrace parent. + * + * Returns nonzero if we did a ptrace notification, zero if not. + * + * Called without locks. + */ +static inline int ptrace_event(int mask, int event, unsigned long message) +{ + if (mask && likely(!(current->ptrace & mask))) + return 0; + current->ptrace_message = message; + ptrace_notify((event << 8) | SIGTRAP); + return 1; +} + #ifndef force_successful_syscall_return /* * System call handlers that, upon successful completion, need to return a diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h new file mode 100644 index 0000000..bea0f3e --- /dev/null +++ b/include/linux/tracehook.h @@ -0,0 +1,52 @@ +/* + * Tracing hooks + * + * Copyright (C) 2008 Red Hat, Inc. All rights reserved. + * + * This copyrighted material is made available to anyone wishing to use, + * modify, copy, or redistribute it subject to the terms and conditions + * of the GNU General Public License v.2. + * + * This file defines hook entry points called by core code where + * user tracing/debugging support might need to do something. These + * entry points are called tracehook_*(). Each hook declared below + * has a detailed kerneldoc comment giving the context (locking et + * al) from which it is called, and the meaning of its return value. + * + * Each function here typically has only one call site, so it is ok + * to have some nontrivial tracehook_*() inlines. In all cases, the + * fast path when no tracing is enabled should be very short. + * + * The purpose of this file and the tracehook_* layer is to consolidate + * the interface that the kernel core and arch code uses to enable any + * user debugging or tracing facility (such as ptrace). The interfaces + * here are carefully documented so that maintainers of core and arch + * code do not need to think about the implementation details of the + * tracing facilities. Likewise, maintainers of the tracing code do not + * need to understand all the calling core or arch code in detail, just + * documented circumstances of each call, such as locking conditions. + * + * If the calling core code changes so that locking is different, then + * it is ok to change the interface documented here. The maintainer of + * core code changing should notify the maintainers of the tracing code + * that they need to work out the change. + * + * Some tracehook_*() inlines take arguments that the current tracing + * implementations might not necessarily use. These function signatures + * are chosen to pass in all the information that is on hand in the + * caller and might conceivably be relevant to a tracer, so that the + * core code won't have to be updated when tracing adds more features. + * If a call site changes so that some of those parameters are no longer + * already on hand without extra work, then the tracehook_* interface + * can change so there is no make-work burden on the core code. The + * maintainer of core code changing should notify the maintainers of the + * tracing code that they need to work out the change. + */ + +#ifndef _LINUX_TRACEHOOK_H +#define _LINUX_TRACEHOOK_H 1 + +#include +#include + +#endif /* */ -- cgit v1.1 From 6341c393fcc37d58727865f1ee2f65e632e9d4f0 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:44 -0700 Subject: tracehook: exec This moves all the ptrace hooks related to exec into tracehook.h inlines. This also lifts the calls for tracing out of the binfmt load_binary hooks into search_binary_handler() after it calls into the binfmt module. This change has no effect, since all the binfmt modules' load_binary functions did the call at the end on success, and now search_binary_handler() does it immediately after return if successful. We consolidate the repeated code, and binfmt modules no longer need to import ptrace_notify(). Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index bea0f3e..6276353 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -48,5 +48,51 @@ #include #include +#include +struct linux_binprm; + +/** + * tracehook_unsafe_exec - check for exec declared unsafe due to tracing + * @task: current task doing exec + * + * Return %LSM_UNSAFE_* bits applied to an exec because of tracing. + * + * Called with task_lock() held on @task. + */ +static inline int tracehook_unsafe_exec(struct task_struct *task) +{ + int unsafe = 0; + int ptrace = task_ptrace(task); + if (ptrace & PT_PTRACED) { + if (ptrace & PT_PTRACE_CAP) + unsafe |= LSM_UNSAFE_PTRACE_CAP; + else + unsafe |= LSM_UNSAFE_PTRACE; + } + return unsafe; +} + +/** + * tracehook_report_exec - a successful exec was completed + * @fmt: &struct linux_binfmt that performed the exec + * @bprm: &struct linux_binprm containing exec details + * @regs: user-mode register state + * + * An exec just completed, we are shortly going to return to user mode. + * The freshly initialized register state can be seen and changed in @regs. + * The name, file and other pointers in @bprm are still on hand to be + * inspected, but will be freed as soon as this returns. + * + * Called with no locks, but with some kernel resources held live + * and a reference on @fmt->module. + */ +static inline void tracehook_report_exec(struct linux_binfmt *fmt, + struct linux_binprm *bprm, + struct pt_regs *regs) +{ + if (!ptrace_event(PT_TRACE_EXEC, PTRACE_EVENT_EXEC, 0) && + unlikely(task_ptrace(current) & PT_PTRACED)) + send_sig(SIGTRAP, current, 0); +} #endif /* */ -- cgit v1.1 From 30199f5a46aee204bf437a4f5b0740f3efe448b7 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:46 -0700 Subject: tracehook: exit This moves the PTRACE_EVENT_EXIT tracing into a tracehook.h inline, tracehook_report_exec(). The change has no effect, just clean-up. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 6276353..967ab47 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -95,4 +95,19 @@ static inline void tracehook_report_exec(struct linux_binfmt *fmt, send_sig(SIGTRAP, current, 0); } +/** + * tracehook_report_exit - task has begun to exit + * @exit_code: pointer to value destined for @current->exit_code + * + * @exit_code points to the value passed to do_exit(), which tracing + * might change here. This is almost the first thing in do_exit(), + * before freeing any resources or setting the %PF_EXITING flag. + * + * Called with no locks held. + */ +static inline void tracehook_report_exit(long *exit_code) +{ + ptrace_event(PT_TRACE_EXIT, PTRACE_EVENT_EXIT, *exit_code); +} + #endif /* */ -- cgit v1.1 From 09a05394fe2448a4139b014936330af23fa7ec83 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:47 -0700 Subject: tracehook: clone This moves all the ptrace initialization and tracing logic for task creation into tracehook.h and ptrace.h inlines. It reorganizes the code slightly, but should not change any behavior. There are four tracehook entry points, at each important stage of task creation. This keeps the interface from the core fork.c code fairly clean, while supporting the complex setup required for ptrace or something like it. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ptrace.h | 22 ++++++++++ include/linux/tracehook.h | 100 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 122 insertions(+) (limited to 'include') diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index c74abfc..dae6d85 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -154,6 +154,28 @@ static inline int ptrace_event(int mask, int event, unsigned long message) return 1; } +/** + * ptrace_init_task - initialize ptrace state for a new child + * @child: new child task + * @ptrace: true if child should be ptrace'd by parent's tracer + * + * This is called immediately after adding @child to its parent's children + * list. @ptrace is false in the normal case, and true to ptrace @child. + * + * Called with current's siglock and write_lock_irq(&tasklist_lock) held. + */ +static inline void ptrace_init_task(struct task_struct *child, bool ptrace) +{ + INIT_LIST_HEAD(&child->ptrace_entry); + INIT_LIST_HEAD(&child->ptraced); + child->parent = child->real_parent; + child->ptrace = 0; + if (unlikely(ptrace)) { + child->ptrace = current->ptrace; + __ptrace_link(child, current->parent); + } +} + #ifndef force_successful_syscall_return /* * System call handlers that, upon successful completion, need to return a diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 967ab47..3ebc58b 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -110,4 +110,104 @@ static inline void tracehook_report_exit(long *exit_code) ptrace_event(PT_TRACE_EXIT, PTRACE_EVENT_EXIT, *exit_code); } +/** + * tracehook_prepare_clone - prepare for new child to be cloned + * @clone_flags: %CLONE_* flags from clone/fork/vfork system call + * + * This is called before a new user task is to be cloned. + * Its return value will be passed to tracehook_finish_clone(). + * + * Called with no locks held. + */ +static inline int tracehook_prepare_clone(unsigned clone_flags) +{ + if (clone_flags & CLONE_UNTRACED) + return 0; + + if (clone_flags & CLONE_VFORK) { + if (current->ptrace & PT_TRACE_VFORK) + return PTRACE_EVENT_VFORK; + } else if ((clone_flags & CSIGNAL) != SIGCHLD) { + if (current->ptrace & PT_TRACE_CLONE) + return PTRACE_EVENT_CLONE; + } else if (current->ptrace & PT_TRACE_FORK) + return PTRACE_EVENT_FORK; + + return 0; +} + +/** + * tracehook_finish_clone - new child created and being attached + * @child: new child task + * @clone_flags: %CLONE_* flags from clone/fork/vfork system call + * @trace: return value from tracehook_clone_prepare() + * + * This is called immediately after adding @child to its parent's children list. + * The @trace value is that returned by tracehook_prepare_clone(). + * + * Called with current's siglock and write_lock_irq(&tasklist_lock) held. + */ +static inline void tracehook_finish_clone(struct task_struct *child, + unsigned long clone_flags, int trace) +{ + ptrace_init_task(child, (clone_flags & CLONE_PTRACE) || trace); +} + +/** + * tracehook_report_clone - in parent, new child is about to start running + * @trace: return value from tracehook_clone_prepare() + * @regs: parent's user register state + * @clone_flags: flags from parent's system call + * @pid: new child's PID in the parent's namespace + * @child: new child task + * + * Called after a child is set up, but before it has been started running. + * The @trace value is that returned by tracehook_clone_prepare(). + * This is not a good place to block, because the child has not started yet. + * Suspend the child here if desired, and block in tracehook_clone_complete(). + * This must prevent the child from self-reaping if tracehook_clone_complete() + * uses the @child pointer; otherwise it might have died and been released by + * the time tracehook_report_clone_complete() is called. + * + * Called with no locks held, but the child cannot run until this returns. + */ +static inline void tracehook_report_clone(int trace, struct pt_regs *regs, + unsigned long clone_flags, + pid_t pid, struct task_struct *child) +{ + if (unlikely(trace)) { + /* + * The child starts up with an immediate SIGSTOP. + */ + sigaddset(&child->pending.signal, SIGSTOP); + set_tsk_thread_flag(child, TIF_SIGPENDING); + } +} + +/** + * tracehook_report_clone_complete - new child is running + * @trace: return value from tracehook_clone_prepare() + * @regs: parent's user register state + * @clone_flags: flags from parent's system call + * @pid: new child's PID in the parent's namespace + * @child: child task, already running + * + * This is called just after the child has started running. This is + * just before the clone/fork syscall returns, or blocks for vfork + * child completion if @clone_flags has the %CLONE_VFORK bit set. + * The @child pointer may be invalid if a self-reaping child died and + * tracehook_report_clone() took no action to prevent it from self-reaping. + * + * Called with no locks held. + */ +static inline void tracehook_report_clone_complete(int trace, + struct pt_regs *regs, + unsigned long clone_flags, + pid_t pid, + struct task_struct *child) +{ + if (unlikely(trace)) + ptrace_event(0, trace, pid); +} + #endif /* */ -- cgit v1.1 From daded34be96b1975ff8539ff62ad8b158ce7d842 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:47 -0700 Subject: tracehook: vfork-done This moves the PTRACE_EVENT_VFORK_DONE tracing into a tracehook.h inline, tracehook_report_vfork_done(). The change has no effect, just clean-up. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 3ebc58b..830e6e1 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -210,4 +210,22 @@ static inline void tracehook_report_clone_complete(int trace, ptrace_event(0, trace, pid); } +/** + * tracehook_report_vfork_done - vfork parent's child has exited or exec'd + * @child: child task, already running + * @pid: new child's PID in the parent's namespace + * + * Called after a %CLONE_VFORK parent has waited for the child to complete. + * The clone/vfork system call will return immediately after this. + * The @child pointer may be invalid if a self-reaping child died and + * tracehook_report_clone() took no action to prevent it from self-reaping. + * + * Called with no locks held. + */ +static inline void tracehook_report_vfork_done(struct task_struct *child, + pid_t pid) +{ + ptrace_event(PT_TRACE_VFORK_DONE, PTRACE_EVENT_VFORK_DONE, pid); +} + #endif /* */ -- cgit v1.1 From dae33574dcf5211e1f43c7e45fa29f73ba3e00cb Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:48 -0700 Subject: tracehook: release_task This moves the ptrace-related logic from release_task into tracehook.h and ptrace.h inlines. It provides clean hooks both before and after locking tasklist_lock, for future tracing logic to do more cleanup without the lock. This also changes release_task() itself in the rare "zap_leader" case to set the leader to EXIT_DEAD before iterating. This maintains the invariant that release_task() only ever handles a task in EXIT_DEAD. This is a common-sense invariant that is already always true except in this one arcane case of zombie leader whose parent ignores SIGCHLD. This change is harmless and only costs one store in this one rare case. It keeps the expected state more consisently sane, which is nicer when debugging weirdness in release_task(). It also lets some future code in the tracehook entry points rely on this invariant for bookkeeping. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ptrace.h | 13 +++++++++++++ include/linux/tracehook.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) (limited to 'include') diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index dae6d85..ed69c03 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -176,6 +176,19 @@ static inline void ptrace_init_task(struct task_struct *child, bool ptrace) } } +/** + * ptrace_release_task - final ptrace-related cleanup of a zombie being reaped + * @task: task in %EXIT_DEAD state + * + * Called with write_lock(&tasklist_lock) held. + */ +static inline void ptrace_release_task(struct task_struct *task) +{ + BUG_ON(!list_empty(&task->ptraced)); + ptrace_unlink(task); + BUG_ON(!list_empty(&task->ptrace_entry)); +} + #ifndef force_successful_syscall_return /* * System call handlers that, upon successful completion, need to return a diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 830e6e1..9a5b3be 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -228,4 +228,32 @@ static inline void tracehook_report_vfork_done(struct task_struct *child, ptrace_event(PT_TRACE_VFORK_DONE, PTRACE_EVENT_VFORK_DONE, pid); } +/** + * tracehook_prepare_release_task - task is being reaped, clean up tracing + * @task: task in %EXIT_DEAD state + * + * This is called in release_task() just before @task gets finally reaped + * and freed. This would be the ideal place to remove and clean up any + * tracing-related state for @task. + * + * Called with no locks held. + */ +static inline void tracehook_prepare_release_task(struct task_struct *task) +{ +} + +/** + * tracehook_finish_release_task - task is being reaped, clean up tracing + * @task: task in %EXIT_DEAD state + * + * This is called in release_task() when @task is being in the middle of + * being reaped. After this, there must be no tracing entanglements. + * + * Called with write_lock_irq(&tasklist_lock) held. + */ +static inline void tracehook_finish_release_task(struct task_struct *task) +{ + ptrace_release_task(task); +} + #endif /* */ -- cgit v1.1 From 0d094efeb1e98010c6b99923f1eb7e17bf1e3a74 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:49 -0700 Subject: tracehook: tracehook_tracer_task This adds the tracehook_tracer_task() hook to consolidate all forms of "Who is using ptrace on me?" logic. This is used for "TracerPid:" in /proc and for permission checks. We also clean up the selinux code the called an identical accessor. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 9a5b3be..6468ca0 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -73,6 +73,24 @@ static inline int tracehook_unsafe_exec(struct task_struct *task) } /** + * tracehook_tracer_task - return the task that is tracing the given task + * @tsk: task to consider + * + * Returns NULL if noone is tracing @task, or the &struct task_struct + * pointer to its tracer. + * + * Must called under rcu_read_lock(). The pointer returned might be kept + * live only by RCU. During exec, this may be called with task_lock() + * held on @task, still held from when tracehook_unsafe_exec() was called. + */ +static inline struct task_struct *tracehook_tracer_task(struct task_struct *tsk) +{ + if (task_ptrace(tsk) & PT_PTRACED) + return rcu_dereference(tsk->parent); + return NULL; +} + +/** * tracehook_report_exec - a successful exec was completed * @fmt: &struct linux_binfmt that performed the exec * @bprm: &struct linux_binprm containing exec details -- cgit v1.1 From fa8e26ccd485216fc45c8c2dd1ec3b7ef1a0a2f8 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:50 -0700 Subject: tracehook: tracehook_expect_breakpoints This adds tracehook_expect_breakpoints() as a formal hook for the nommu code to use for its, "Is text-poking likely?" check at mmap time. This names the actual semantics the code means to test, and documents it. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 6468ca0..e113e09 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -52,6 +52,21 @@ struct linux_binprm; /** + * tracehook_expect_breakpoints - guess if task memory might be touched + * @task: current task, making a new mapping + * + * Return nonzero if @task is expected to want breakpoint insertion in + * its memory at some point. A zero return is no guarantee it won't + * be done, but this is a hint that it's known to be likely. + * + * May be called with @task->mm->mmap_sem held for writing. + */ +static inline int tracehook_expect_breakpoints(struct task_struct *task) +{ + return (task_ptrace(task) & PT_PTRACED) != 0; +} + +/** * tracehook_unsafe_exec - check for exec declared unsafe due to tracing * @task: current task doing exec * -- cgit v1.1 From c45aea27617d6a1e0aacddc3b0233f704222fcbd Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:50 -0700 Subject: tracehook: tracehook_signal_handler This defines tracehook_signal_handler() as a hook for the arch signal handling code to call. It gives ptrace the opportunity to stop for a pseudo-single-step trap immediately after signal handler setup is done. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index e113e09..2d1426f 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -289,4 +289,27 @@ static inline void tracehook_finish_release_task(struct task_struct *task) ptrace_release_task(task); } +/** + * tracehook_signal_handler - signal handler setup is complete + * @sig: number of signal being delivered + * @info: siginfo_t of signal being delivered + * @ka: sigaction setting that chose the handler + * @regs: user register state + * @stepping: nonzero if debugger single-step or block-step in use + * + * Called by the arch code after a signal handler has been set up. + * Register and stack state reflects the user handler about to run. + * Signal mask changes have already been made. + * + * Called without locks, shortly before returning to user mode + * (or handling more signals). + */ +static inline void tracehook_signal_handler(int sig, siginfo_t *info, + const struct k_sigaction *ka, + struct pt_regs *regs, int stepping) +{ + if (stepping) + ptrace_notify(SIGTRAP); +} + #endif /* */ -- cgit v1.1 From 35de254dc60f91004b3b5ebb1fc7b2c3093d6032 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:51 -0700 Subject: tracehook: tracehook_consider_ignored_signal This defines tracehook_consider_ignored_signal() has a fine-grained hook for deciding to prevent the normal short-circuit of sending an ignored signal, as ptrace does. There is no change, only cleanup. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 2d1426f..8cffd34 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -312,4 +312,23 @@ static inline void tracehook_signal_handler(int sig, siginfo_t *info, ptrace_notify(SIGTRAP); } +/** + * tracehook_consider_ignored_signal - suppress short-circuit of ignored signal + * @task: task receiving the signal + * @sig: signal number being sent + * @handler: %SIG_IGN or %SIG_DFL + * + * Return zero iff tracing doesn't care to examine this ignored signal, + * so it can short-circuit normal delivery and never even get queued. + * Either @handler is %SIG_DFL and @sig's default is ignore, or it's %SIG_IGN. + * + * Called with @task->sighand->siglock held. + */ +static inline int tracehook_consider_ignored_signal(struct task_struct *task, + int sig, + void __user *handler) +{ + return (task_ptrace(task) & PT_PTRACED) != 0; +} + #endif /* */ -- cgit v1.1 From 445a91d2fe3667fb8fc251433645f686933cf56a Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:52 -0700 Subject: tracehook: tracehook_consider_fatal_signal This defines tracehook_consider_fatal_signal() has a fine-grained hook for deciding to skip the special cases for a fatal signal, as ptrace does. There is no change, only cleanup. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 8cffd34..8b4c15e 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -331,4 +331,25 @@ static inline int tracehook_consider_ignored_signal(struct task_struct *task, return (task_ptrace(task) & PT_PTRACED) != 0; } +/** + * tracehook_consider_fatal_signal - suppress special handling of fatal signal + * @task: task receiving the signal + * @sig: signal number being sent + * @handler: %SIG_DFL or %SIG_IGN + * + * Return nonzero to prevent special handling of this termination signal. + * Normally @handler is %SIG_DFL. It can be %SIG_IGN if @sig is ignored, + * in which case force_sig() is about to reset it to %SIG_DFL. + * When this returns zero, this signal might cause a quick termination + * that does not give the debugger a chance to intercept the signal. + * + * Called with or without @task->sighand->siglock held. + */ +static inline int tracehook_consider_fatal_signal(struct task_struct *task, + int sig, + void __user *handler) +{ + return (task_ptrace(task) & PT_PTRACED) != 0; +} + #endif /* */ -- cgit v1.1 From 283d7559e7712f95a05331eb0a85394c6368101b Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:52 -0700 Subject: tracehook: syscall This adds standard tracehook.h inlines for arch code to call when TIF_SYSCALL_TRACE has been set. This replaces having each arch implement the ptrace guts for its syscall tracing support. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 70 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 8b4c15e..3548694 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -66,6 +66,76 @@ static inline int tracehook_expect_breakpoints(struct task_struct *task) return (task_ptrace(task) & PT_PTRACED) != 0; } +/* + * ptrace report for syscall entry and exit looks identical. + */ +static inline void ptrace_report_syscall(struct pt_regs *regs) +{ + int ptrace = task_ptrace(current); + + if (!(ptrace & PT_PTRACED)) + return; + + ptrace_notify(SIGTRAP | ((ptrace & PT_TRACESYSGOOD) ? 0x80 : 0)); + + /* + * this isn't the same as continuing with a signal, but it will do + * for normal use. strace only continues with a signal if the + * stopping signal is not SIGTRAP. -brl + */ + if (current->exit_code) { + send_sig(current->exit_code, current, 1); + current->exit_code = 0; + } +} + +/** + * tracehook_report_syscall_entry - task is about to attempt a system call + * @regs: user register state of current task + * + * This will be called if %TIF_SYSCALL_TRACE has been set, when the + * current task has just entered the kernel for a system call. + * Full user register state is available here. Changing the values + * in @regs can affect the system call number and arguments to be tried. + * It is safe to block here, preventing the system call from beginning. + * + * Returns zero normally, or nonzero if the calling arch code should abort + * the system call. That must prevent normal entry so no system call is + * made. If @task ever returns to user mode after this, its register state + * is unspecified, but should be something harmless like an %ENOSYS error + * return. + * + * Called without locks, just after entering kernel mode. + */ +static inline __must_check int tracehook_report_syscall_entry( + struct pt_regs *regs) +{ + ptrace_report_syscall(regs); + return 0; +} + +/** + * tracehook_report_syscall_exit - task has just finished a system call + * @regs: user register state of current task + * @step: nonzero if simulating single-step or block-step + * + * This will be called if %TIF_SYSCALL_TRACE has been set, when the + * current task has just finished an attempted system call. Full + * user register state is available here. It is safe to block here, + * preventing signals from being processed. + * + * If @step is nonzero, this report is also in lieu of the normal + * trap that would follow the system call instruction because + * user_enable_block_step() or user_enable_single_step() was used. + * In this case, %TIF_SYSCALL_TRACE might not be set. + * + * Called without locks, just before checking for pending signals. + */ +static inline void tracehook_report_syscall_exit(struct pt_regs *regs, int step) +{ + ptrace_report_syscall(regs); +} + /** * tracehook_unsafe_exec - check for exec declared unsafe due to tracing * @task: current task doing exec -- cgit v1.1 From 7bcf6a2ca5f639b038c48711ebe6c4eca2036641 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:53 -0700 Subject: tracehook: get_signal_to_deliver This defines the tracehook_get_signal() hook to allow tracing code to slip in before normal signal dequeuing. This lays the groundwork for new tracing features that can inject synthetic signals outside the normal queue or control the disposition of delivered signals. The calling convention lets tracehook_get_signal() decide both exactly what will happen and what signal number to report in the handler/exit. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 3548694..42a0d7b 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -422,4 +422,33 @@ static inline int tracehook_consider_fatal_signal(struct task_struct *task, return (task_ptrace(task) & PT_PTRACED) != 0; } +/** + * tracehook_get_signal - deliver synthetic signal to traced task + * @task: @current + * @regs: task_pt_regs(@current) + * @info: details of synthetic signal + * @return_ka: sigaction for synthetic signal + * + * Return zero to check for a real pending signal normally. + * Return -1 after releasing the siglock to repeat the check. + * Return a signal number to induce an artifical signal delivery, + * setting *@info and *@return_ka to specify its details and behavior. + * + * The @return_ka->sa_handler value controls the disposition of the + * signal, no matter the signal number. For %SIG_DFL, the return value + * is a representative signal to indicate the behavior (e.g. %SIGTERM + * for death, %SIGQUIT for core dump, %SIGSTOP for job control stop, + * %SIGTSTP for stop unless in an orphaned pgrp), but the signal number + * reported will be @info->si_signo instead. + * + * Called with @task->sighand->siglock held, before dequeuing pending signals. + */ +static inline int tracehook_get_signal(struct task_struct *task, + struct pt_regs *regs, + siginfo_t *info, + struct k_sigaction *return_ka) +{ + return 0; +} + #endif /* */ -- cgit v1.1 From fa00b80b3c41a845b3d56f866fb40a2e98754c51 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:54 -0700 Subject: tracehook: job control This defines the tracehook_notify_jctl() hook to formalize the ptrace effects on the job control notifications. There is no change, only cleanup. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 42a0d7b..6dc428d 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -451,4 +451,24 @@ static inline int tracehook_get_signal(struct task_struct *task, return 0; } +/** + * tracehook_notify_jctl - report about job control stop/continue + * @notify: nonzero if this is the last thread in the group to stop + * @why: %CLD_STOPPED or %CLD_CONTINUED + * + * This is called when we might call do_notify_parent_cldstop(). + * It's called when about to stop for job control; we are already in + * %TASK_STOPPED state, about to call schedule(). It's also called when + * a delayed %CLD_STOPPED or %CLD_CONTINUED report is ready to be made. + * + * Return nonzero to generate a %SIGCHLD with @why, which is + * normal if @notify is nonzero. + * + * Called with no locks held. + */ +static inline int tracehook_notify_jctl(int notify, int why) +{ + return notify || (current->ptrace & PT_PTRACED); +} + #endif /* */ -- cgit v1.1 From 2b2a1ff64afbadac842bbc58c5166962cf4f7664 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:54 -0700 Subject: tracehook: death This moves the ptrace logic in task death (exit_notify) into tracehook.h inlines. Some code is rearranged slightly to make things nicer. There is no change, only cleanup. There is one hook called with the tasklist_lock write-locked, as ptrace needs. There is also a new hook called after exit_state changes and without locks. This is a better place for tracing work to be in the future, since it doesn't delay the whole system with locking. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 2 +- include/linux/tracehook.h | 52 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index adb8077..a95d84d 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1796,7 +1796,7 @@ extern int kill_pid_info_as_uid(int, struct siginfo *, struct pid *, uid_t, uid_ extern int kill_pgrp(struct pid *pid, int sig, int priv); extern int kill_pid(struct pid *pid, int sig, int priv); extern int kill_proc_info(int, struct siginfo *, pid_t); -extern void do_notify_parent(struct task_struct *, int); +extern int do_notify_parent(struct task_struct *, int); extern void force_sig(int, struct task_struct *); extern void force_sig_specific(int, struct task_struct *); extern int send_sig(int, struct task_struct *, int); diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 6dc428d..4c50e1b 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -471,4 +471,56 @@ static inline int tracehook_notify_jctl(int notify, int why) return notify || (current->ptrace & PT_PTRACED); } +/** + * tracehook_notify_death - task is dead, ready to notify parent + * @task: @current task now exiting + * @death_cookie: value to pass to tracehook_report_death() + * @group_dead: nonzero if this was the last thread in the group to die + * + * Return the signal number to send our parent with do_notify_parent(), or + * zero to send no signal and leave a zombie, or -1 to self-reap right now. + * + * Called with write_lock_irq(&tasklist_lock) held. + */ +static inline int tracehook_notify_death(struct task_struct *task, + void **death_cookie, int group_dead) +{ + if (task->exit_signal == -1) + return task->ptrace ? SIGCHLD : -1; + + /* + * If something other than our normal parent is ptracing us, then + * send it a SIGCHLD instead of honoring exit_signal. exit_signal + * only has special meaning to our real parent. + */ + if (thread_group_empty(task) && !ptrace_reparented(task)) + return task->exit_signal; + + return task->ptrace ? SIGCHLD : 0; +} + +/** + * tracehook_report_death - task is dead and ready to be reaped + * @task: @current task now exiting + * @signal: signal number sent to parent, or 0 or -1 + * @death_cookie: value passed back from tracehook_notify_death() + * @group_dead: nonzero if this was the last thread in the group to die + * + * Thread has just become a zombie or is about to self-reap. If positive, + * @signal is the signal number just sent to the parent (usually %SIGCHLD). + * If @signal is -1, this thread will self-reap. If @signal is 0, this is + * a delayed_group_leader() zombie. The @death_cookie was passed back by + * tracehook_notify_death(). + * + * If normal reaping is not inhibited, @task->exit_state might be changing + * in parallel. + * + * Called without locks. + */ +static inline void tracehook_report_death(struct task_struct *task, + int signal, void *death_cookie, + int group_dead) +{ +} + #endif /* */ -- cgit v1.1 From b787f7ba677840da16a2228c16571ce8a1fcb799 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:55 -0700 Subject: tracehook: force signal_pending() This defines a new hook tracehook_force_sigpending() that lets tracing code decide to force TIF_SIGPENDING on in recalc_sigpending(). This is not used yet, so it compiles away to nothing for now. It lays the groundwork for new tracing code that can interrupt a task synthetically without actually sending a signal. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 4c50e1b..43bc51b 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -423,6 +423,20 @@ static inline int tracehook_consider_fatal_signal(struct task_struct *task, } /** + * tracehook_force_sigpending - let tracing force signal_pending(current) on + * + * Called when recomputing our signal_pending() flag. Return nonzero + * to force the signal_pending() flag on, so that tracehook_get_signal() + * will be called before the next return to user mode. + * + * Called with @current->sighand->siglock held. + */ +static inline int tracehook_force_sigpending(void) +{ + return 0; +} + +/** * tracehook_get_signal - deliver synthetic signal to traced task * @task: @current * @regs: task_pt_regs(@current) -- cgit v1.1 From 64b1208d5b0ef8859fd52ea7ae286a3eb994669b Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:56 -0700 Subject: tracehook: TIF_NOTIFY_RESUME This adds tracehook.h inlines to enable a new arch feature in support of user debugging/tracing. This is not used yet, but it lays the groundwork for a debugger to be able to wrangle a task that's possibly running, without interrupting its syscalls in progress. Each arch should define TIF_NOTIFY_RESUME, and in their entry.S code treat it much like TIF_SIGPENDING. That is, it causes you to take the slow path when returning to user mode, where you get the full user-mode state accessible as for signal handling or ptrace. The arch code should check TIF_NOTIFY_RESUME after handling TIF_SIGPENDING. When it's set, clear it and then call tracehook_notify_resume(). In future, tracing code will call set_notify_resume() when it wants to get a callback in tracehook_notify_resume(). Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 43bc51b..32867ab 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -537,4 +537,38 @@ static inline void tracehook_report_death(struct task_struct *task, { } +#ifdef TIF_NOTIFY_RESUME +/** + * set_notify_resume - cause tracehook_notify_resume() to be called + * @task: task that will call tracehook_notify_resume() + * + * Calling this arranges that @task will call tracehook_notify_resume() + * before returning to user mode. If it's already running in user mode, + * it will enter the kernel and call tracehook_notify_resume() soon. + * If it's blocked, it will not be woken. + */ +static inline void set_notify_resume(struct task_struct *task) +{ + if (!test_and_set_tsk_thread_flag(task, TIF_NOTIFY_RESUME)) + kick_process(task); +} + +/** + * tracehook_notify_resume - report when about to return to user mode + * @regs: user-mode registers of @current task + * + * This is called when %TIF_NOTIFY_RESUME has been set. Now we are + * about to return to user mode, and the user state in @regs can be + * inspected or adjusted. The caller in arch code has cleared + * %TIF_NOTIFY_RESUME before the call. If the flag gets set again + * asynchronously, this will be called again before we return to + * user mode. + * + * Called without locks. + */ +static inline void tracehook_notify_resume(struct pt_regs *regs) +{ +} +#endif /* TIF_NOTIFY_RESUME */ + #endif /* */ -- cgit v1.1 From 828c365cc8b8d38c346fccb19fa80d28f2240831 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:57 -0700 Subject: tracehook: asm/syscall.h This adds asm-generic/syscall.h, which documents what a real asm-ARCH/syscall.h file should define. This is not used yet, but will provide all the machine-dependent details of examining a user system call about to begin, in progress, or just ended. Each arch should add an asm-ARCH/syscall.h that defines all the entry points documented in asm-generic/syscall.h, as short inlines if possible. This lets us write new tracing code that understands user system call registers, without any new arch-specific work. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/syscall.h | 141 ++++++++++++++++++++++++++++++++++++++++++ include/linux/tracehook.h | 3 +- 2 files changed, 143 insertions(+), 1 deletion(-) create mode 100644 include/asm-generic/syscall.h (limited to 'include') diff --git a/include/asm-generic/syscall.h b/include/asm-generic/syscall.h new file mode 100644 index 0000000..abcf34c --- /dev/null +++ b/include/asm-generic/syscall.h @@ -0,0 +1,141 @@ +/* + * Access to user system call parameters and results + * + * Copyright (C) 2008 Red Hat, Inc. All rights reserved. + * + * This copyrighted material is made available to anyone wishing to use, + * modify, copy, or redistribute it subject to the terms and conditions + * of the GNU General Public License v.2. + * + * This file is a stub providing documentation for what functions + * asm-ARCH/syscall.h files need to define. Most arch definitions + * will be simple inlines. + * + * All of these functions expect to be called with no locks, + * and only when the caller is sure that the task of interest + * cannot return to user mode while we are looking at it. + */ + +#ifndef _ASM_SYSCALL_H +#define _ASM_SYSCALL_H 1 + +struct task_struct; +struct pt_regs; + +/** + * syscall_get_nr - find what system call a task is executing + * @task: task of interest, must be blocked + * @regs: task_pt_regs() of @task + * + * If @task is executing a system call or is at system call + * tracing about to attempt one, returns the system call number. + * If @task is not executing a system call, i.e. it's blocked + * inside the kernel for a fault or signal, returns -1. + * + * It's only valid to call this when @task is known to be blocked. + */ +long syscall_get_nr(struct task_struct *task, struct pt_regs *regs); + +/** + * syscall_rollback - roll back registers after an aborted system call + * @task: task of interest, must be in system call exit tracing + * @regs: task_pt_regs() of @task + * + * It's only valid to call this when @task is stopped for system + * call exit tracing (due to TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT), + * after tracehook_report_syscall_entry() returned nonzero to prevent + * the system call from taking place. + * + * This rolls back the register state in @regs so it's as if the + * system call instruction was a no-op. The registers containing + * the system call number and arguments are as they were before the + * system call instruction. This may not be the same as what the + * register state looked like at system call entry tracing. + */ +void syscall_rollback(struct task_struct *task, struct pt_regs *regs); + +/** + * syscall_get_error - check result of traced system call + * @task: task of interest, must be blocked + * @regs: task_pt_regs() of @task + * + * Returns 0 if the system call succeeded, or -ERRORCODE if it failed. + * + * It's only valid to call this when @task is stopped for tracing on exit + * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT. + */ +long syscall_get_error(struct task_struct *task, struct pt_regs *regs); + +/** + * syscall_get_return_value - get the return value of a traced system call + * @task: task of interest, must be blocked + * @regs: task_pt_regs() of @task + * + * Returns the return value of the successful system call. + * This value is meaningless if syscall_get_error() returned nonzero. + * + * It's only valid to call this when @task is stopped for tracing on exit + * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT. + */ +long syscall_get_return_value(struct task_struct *task, struct pt_regs *regs); + +/** + * syscall_set_return_value - change the return value of a traced system call + * @task: task of interest, must be blocked + * @regs: task_pt_regs() of @task + * @error: negative error code, or zero to indicate success + * @val: user return value if @error is zero + * + * This changes the results of the system call that user mode will see. + * If @error is zero, the user sees a successful system call with a + * return value of @val. If @error is nonzero, it's a negated errno + * code; the user sees a failed system call with this errno code. + * + * It's only valid to call this when @task is stopped for tracing on exit + * from a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT. + */ +void syscall_set_return_value(struct task_struct *task, struct pt_regs *regs, + int error, long val); + +/** + * syscall_get_arguments - extract system call parameter values + * @task: task of interest, must be blocked + * @regs: task_pt_regs() of @task + * @i: argument index [0,5] + * @n: number of arguments; n+i must be [1,6]. + * @args: array filled with argument values + * + * Fetches @n arguments to the system call starting with the @i'th argument + * (from 0 through 5). Argument @i is stored in @args[0], and so on. + * An arch inline version is probably optimal when @i and @n are constants. + * + * It's only valid to call this when @task is stopped for tracing on + * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT. + * It's invalid to call this with @i + @n > 6; we only support system calls + * taking up to 6 arguments. + */ +void syscall_get_arguments(struct task_struct *task, struct pt_regs *regs, + unsigned int i, unsigned int n, unsigned long *args); + +/** + * syscall_set_arguments - change system call parameter value + * @task: task of interest, must be in system call entry tracing + * @regs: task_pt_regs() of @task + * @i: argument index [0,5] + * @n: number of arguments; n+i must be [1,6]. + * @args: array of argument values to store + * + * Changes @n arguments to the system call starting with the @i'th argument. + * @n'th argument to @val. Argument @i gets value @args[0], and so on. + * An arch inline version is probably optimal when @i and @n are constants. + * + * It's only valid to call this when @task is stopped for tracing on + * entry to a system call, due to %TIF_SYSCALL_TRACE or %TIF_SYSCALL_AUDIT. + * It's invalid to call this with @i + @n > 6; we only support system calls + * taking up to 6 arguments. + */ +void syscall_set_arguments(struct task_struct *task, struct pt_regs *regs, + unsigned int i, unsigned int n, + const unsigned long *args); + +#endif /* _ASM_SYSCALL_H */ diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 32867ab..589f429 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -103,7 +103,8 @@ static inline void ptrace_report_syscall(struct pt_regs *regs) * the system call. That must prevent normal entry so no system call is * made. If @task ever returns to user mode after this, its register state * is unspecified, but should be something harmless like an %ENOSYS error - * return. + * return. It should preserve enough information so that syscall_rollback() + * can work (see asm-generic/syscall.h). * * Called without locks, just after entering kernel mode. */ -- cgit v1.1 From 85ba2d862e521375a8ee01526c5c46b1f24bb4af Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:58 -0700 Subject: tracehook: wait_task_inactive This extends wait_task_inactive() with a new argument so it can be used in a "soft" mode where it will check for the task changing state unexpectedly and back off. There is no change to existing callers. This lays the groundwork to allow robust, noninvasive tracing that can try to sample a blocked thread but back off safely if it wakes up. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/sched.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index a95d84d..f59318a 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1882,9 +1882,13 @@ extern void set_task_comm(struct task_struct *tsk, char *from); extern char *get_task_comm(char *to, struct task_struct *tsk); #ifdef CONFIG_SMP -extern void wait_task_inactive(struct task_struct * p); +extern unsigned long wait_task_inactive(struct task_struct *, long match_state); #else -#define wait_task_inactive(p) do { } while (0) +static inline unsigned long wait_task_inactive(struct task_struct *p, + long match_state) +{ + return 1; +} #endif #define next_task(p) list_entry(rcu_dereference((p)->tasks.next), struct task_struct, tasks) -- cgit v1.1 From bbc698636ed48b6fcd323964e0f847a6a796325d Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Fri, 25 Jul 2008 19:45:59 -0700 Subject: task_current_syscall This adds the new function task_current_syscall() on machines where the asm/syscall.h interface is supported (CONFIG_HAVE_ARCH_TRACEHOOK). It's exported for modules to use in the future. This function safely samples the state of a blocked thread to collect what system call it is blocked in, and the six system call argument registers. Signed-off-by: Roland McGrath Cc: Oleg Nesterov Reviewed-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ptrace.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index ed69c03..fd31756 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -314,6 +314,10 @@ static inline void user_enable_block_step(struct task_struct *task) #define arch_ptrace_stop(code, info) do { } while (0) #endif +extern int task_current_syscall(struct task_struct *target, long *callno, + unsigned long args[6], unsigned int maxargs, + unsigned long *sp, unsigned long *pc); + #endif #endif -- cgit v1.1 From 9d8fddfb17aaee4ffc5e3d0560620d0fa8b50a42 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:46:23 -0700 Subject: mm/allocpercpu.c: make 4 functions static This patch makes the following needlessly global functions static: - percpu_depopulate() - __percpu_depopulate_mask() - percpu_populate() - __percpu_populate_mask() Signed-off-by: Adrian Bunk Acked-by: Christoph Lameter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/percpu.h | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'include') diff --git a/include/linux/percpu.h b/include/linux/percpu.h index 4cdd393..fac3337 100644 --- a/include/linux/percpu.h +++ b/include/linux/percpu.h @@ -74,11 +74,6 @@ struct percpu_data { (__typeof__(ptr))__p->ptrs[(cpu)]; \ }) -extern void *percpu_populate(void *__pdata, size_t size, gfp_t gfp, int cpu); -extern void percpu_depopulate(void *__pdata, int cpu); -extern int __percpu_populate_mask(void *__pdata, size_t size, gfp_t gfp, - cpumask_t *mask); -extern void __percpu_depopulate_mask(void *__pdata, cpumask_t *mask); extern void *__percpu_alloc_mask(size_t size, gfp_t gfp, cpumask_t *mask); extern void percpu_free(void *__pdata); @@ -86,26 +81,6 @@ extern void percpu_free(void *__pdata); #define percpu_ptr(ptr, cpu) ({ (void)(cpu); (ptr); }) -static inline void percpu_depopulate(void *__pdata, int cpu) -{ -} - -static inline void __percpu_depopulate_mask(void *__pdata, cpumask_t *mask) -{ -} - -static inline void *percpu_populate(void *__pdata, size_t size, gfp_t gfp, - int cpu) -{ - return percpu_ptr(__pdata, cpu); -} - -static inline int __percpu_populate_mask(void *__pdata, size_t size, gfp_t gfp, - cpumask_t *mask) -{ - return 0; -} - static __always_inline void *__percpu_alloc_mask(size_t size, gfp_t gfp, cpumask_t *mask) { return kzalloc(size, gfp); @@ -118,10 +93,6 @@ static inline void percpu_free(void *__pdata) #endif /* CONFIG_SMP */ -#define percpu_populate_mask(__pdata, size, gfp, mask) \ - __percpu_populate_mask((__pdata), (size), (gfp), &(mask)) -#define percpu_depopulate_mask(__pdata, mask) \ - __percpu_depopulate_mask((__pdata), &(mask)) #define percpu_alloc_mask(size, gfp, mask) \ __percpu_alloc_mask((size), (gfp), &(mask)) -- cgit v1.1 From 15f59adae001766a2c7f7fe4f196387bb04bcff5 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:46:23 -0700 Subject: make mm/memory.c:print_bad_pte() static This patch makes the needlessly global print_bad_pte() static. Signed-off-by: Adrian Bunk Reviewed-by: KOSAKI Motohiro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/mm.h b/include/linux/mm.h index f3fd70d..6e695ea 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -810,7 +810,6 @@ extern int access_process_vm(struct task_struct *tsk, unsigned long addr, void * int get_user_pages(struct task_struct *tsk, struct mm_struct *mm, unsigned long start, int len, int write, int force, struct page **pages, struct vm_area_struct **vmas); -void print_bad_pte(struct vm_area_struct *, pte_t, unsigned long); extern int try_to_release_page(struct page * page, gfp_t gfp_mask); extern void do_invalidatepage(struct page *page, unsigned long offset); -- cgit v1.1 From 7c363b8c6536f26934172d3c46f0bbec01a97c61 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:46:24 -0700 Subject: mm/swapfile.c: make code static This patch makes the following needlessly global code static: - swap_lock - nr_swapfiles - struct swap_list Signed-off-by: Adrian Bunk Reviewed-by: KOSAKI Motohiro Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/swap.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/linux/swap.h b/include/linux/swap.h index 0b33776..de40f169a 100644 --- a/include/linux/swap.h +++ b/include/linux/swap.h @@ -237,7 +237,6 @@ extern struct page *swapin_readahead(swp_entry_t, gfp_t, /* linux/mm/swapfile.c */ extern long total_swap_pages; -extern unsigned int nr_swapfiles; extern void si_swapinfo(struct sysinfo *); extern swp_entry_t get_swap_page(void); extern swp_entry_t get_swap_page_of_type(int); @@ -254,8 +253,6 @@ extern int can_share_swap_page(struct page *); extern int remove_exclusive_swap_page(struct page *); struct backing_dev_info; -extern spinlock_t swap_lock; - /* linux/mm/thrash.c */ extern struct mm_struct * swap_token_mm; extern void grab_swap_token(void); -- cgit v1.1 From 9580d85f9cdb076c4bfb467bc6c0d3c5e499957a Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Fri, 25 Jul 2008 19:46:25 -0700 Subject: drivers/char/rtc.c: make 2 functions static The following functions can now become static: - rtc_interrupt() - rtc_get_rtc_time() Signed-off-by: Adrian Bunk Acked-by: Bernhard Walle Acked-by: Paul Gortmaker Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/rtc.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/rtc.h b/include/linux/rtc.h index b01fe00..91f597a 100644 --- a/include/linux/rtc.h +++ b/include/linux/rtc.h @@ -225,8 +225,6 @@ typedef struct rtc_task { int rtc_register(rtc_task_t *task); int rtc_unregister(rtc_task_t *task); int rtc_control(rtc_task_t *t, unsigned int cmd, unsigned long arg); -void rtc_get_rtc_time(struct rtc_time *rtc_tm); -irqreturn_t rtc_interrupt(int irq, void *dev_id); #endif /* __KERNEL__ */ -- cgit v1.1 From 6d49f63b415ca02223e01e187076cb69a5a38eaf Mon Sep 17 00:00:00 2001 From: Matthew Wilcox Date: Tue, 15 Jul 2008 14:54:16 -0600 Subject: [SCSI] Make host_no an unsigned int Daniel Debonzi reports that he has managed to wrap host_no. Increasing the number of host numbers available to 32-bit from 16-bit allows the problem to be evaded for another hundred years. Signed-off-by: Matthew Wilcox Signed-off-by: James Bottomley --- include/scsi/scsi_host.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index a594bac..d3b1e06 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -547,7 +547,7 @@ struct Scsi_Host { unsigned int host_failed; /* commands that failed. */ unsigned int host_eh_scheduled; /* EH scheduled without command */ - unsigned short host_no; /* Used for IOCTL_GET_IDLUN, /proc/scsi et al. */ + unsigned int host_no; /* Used for IOCTL_GET_IDLUN, /proc/scsi et al. */ int resetting; /* if set, it means that last_reset is a valid value */ unsigned long last_reset; -- cgit v1.1 From 765cbc6dad16b87724803e359d6be792ddf08614 Mon Sep 17 00:00:00 2001 From: Hannes Reinecke Date: Thu, 17 Jul 2008 16:52:51 -0700 Subject: [SCSI] scsi_dh: Implement common device table handling Instead of having each and every driver implement its own device table scanning code we should rather implement a common routine and scan the device tables there. This allows us also to implement a general notifier chain callback for all device handler instead for one per handler. [sekharan: Fix rejections caused by conflicting bug fix] Signed-off-by: Hannes Reinecke Signed-off-by: Chandra Seetharaman Signed-off-by: James Bottomley --- include/scsi/scsi_device.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 6467f78..4deb934 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -167,15 +167,22 @@ struct scsi_device { unsigned long sdev_data[0]; } __attribute__((aligned(sizeof(unsigned long)))); +struct scsi_dh_devlist { + char *vendor; + char *model; +}; + struct scsi_device_handler { /* Used by the infrastructure */ struct list_head list; /* list of scsi_device_handlers */ - struct notifier_block nb; /* Filled by the hardware handler */ struct module *module; const char *name; + const struct scsi_dh_devlist *devlist; int (*check_sense)(struct scsi_device *, struct scsi_sense_hdr *); + int (*attach)(struct scsi_device *); + void (*detach)(struct scsi_device *); int (*activate)(struct scsi_device *); int (*prep_fn)(struct scsi_device *, struct request *); }; -- cgit v1.1 From b6ff1b14cdf4b4cb5403f3af2c3272f7e609a241 Mon Sep 17 00:00:00 2001 From: Hannes Reinecke Date: Thu, 17 Jul 2008 16:53:03 -0700 Subject: [SCSI] scsi_dh: Update EMC handler This patch converts the EMC device handler to use a proper state machine. We now also parse the extended INQUIRY information to determine if long trespass commands are supported. And we're now using the long trespass command correctly. And finally there's now an check at init time to refuse to attach to devices not supporting EMC-specific VPD pages. Signed-off-by: Hannes Reinecke Signed-off-by: Chandra Seetharaman Signed-off-by: James Bottomley --- include/scsi/scsi_dh.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/scsi/scsi_dh.h b/include/scsi/scsi_dh.h index 3ad2303..e15e2aa 100644 --- a/include/scsi/scsi_dh.h +++ b/include/scsi/scsi_dh.h @@ -32,6 +32,7 @@ enum { */ SCSI_DH_DEV_FAILED, /* generic device error */ SCSI_DH_DEV_TEMP_BUSY, + SCSI_DH_DEV_UNSUPP, /* device handler not supported */ SCSI_DH_DEVICE_MAX, /* max device blkerr definition */ /* -- cgit v1.1 From 057ea7c9683c3d684128cced796f03c179ecf1c2 Mon Sep 17 00:00:00 2001 From: Hannes Reinecke Date: Thu, 17 Jul 2008 16:53:21 -0700 Subject: [SCSI] scsi_dh: add generic SPC-3 alua handler Signed-off-by: Hannes Reinecke Signed-off-by: Chandra Seetharaman Signed-off-by: James Bottomley --- include/scsi/scsi.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi.h b/include/scsi/scsi.h index 00137a7..5c40cc5 100644 --- a/include/scsi/scsi.h +++ b/include/scsi/scsi.h @@ -106,6 +106,7 @@ #define VARIABLE_LENGTH_CMD 0x7f #define REPORT_LUNS 0xa0 #define MAINTENANCE_IN 0xa3 +#define MAINTENANCE_OUT 0xa4 #define MOVE_MEDIUM 0xa5 #define EXCHANGE_MEDIUM 0xa6 #define READ_12 0xa8 @@ -125,6 +126,8 @@ #define SAI_READ_CAPACITY_16 0x10 /* values for maintenance in */ #define MI_REPORT_TARGET_PGS 0x0a +/* values for maintenance out */ +#define MO_SET_TARGET_PGS 0x0a /* Values for T10/04-262r7 */ #define ATA_16 0x85 /* 16-byte pass-thru */ -- cgit v1.1 From ae11b1b36da726a8a93409b896704edc6b4f3402 Mon Sep 17 00:00:00 2001 From: Hannes Reinecke Date: Thu, 17 Jul 2008 17:49:02 -0700 Subject: [SCSI] scsi_dh: attach to hardware handler from dm-mpath multipath keeps a separate device table which may be more current than the built-in one. So we should make sure to always call ->attach whenever a multipath map with hardware handler is instantiated. And we should call ->detach on removal, too. [sekharan: update as per comments from agk] Signed-off-by: Hannes Reinecke Signed-off-by: Chandra Seetharaman Signed-off-by: James Bottomley --- include/scsi/scsi_dh.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_dh.h b/include/scsi/scsi_dh.h index e15e2aa..33efce2 100644 --- a/include/scsi/scsi_dh.h +++ b/include/scsi/scsi_dh.h @@ -58,6 +58,8 @@ enum { #if defined(CONFIG_SCSI_DH) || defined(CONFIG_SCSI_DH_MODULE) extern int scsi_dh_activate(struct request_queue *); extern int scsi_dh_handler_exist(const char *); +extern int scsi_dh_attach(struct request_queue *, const char *); +extern void scsi_dh_detach(struct request_queue *); #else static inline int scsi_dh_activate(struct request_queue *req) { @@ -67,4 +69,12 @@ static inline int scsi_dh_handler_exist(const char *name) { return 0; } +static inline int scsi_dh_attach(struct request_queue *req, const char *name) +{ + return SCSI_DH_NOSYS; +} +static inline void scsi_dh_detach(struct request_queue *q) +{ + return; +} #endif -- cgit v1.1 From 4469f9878059f1707f021512e6b34252c4096ee7 Mon Sep 17 00:00:00 2001 From: "Martin K. Petersen" Date: Thu, 17 Jul 2008 04:28:30 -0400 Subject: [SCSI] Host protection capabilities Controllers that support protection information must indicate this to the SCSI midlayer so that the ULD can prepare scsi_cmnds accordingly. This patch implements a host mask and various types of protection: - DIF Type 1-3 (between HBA and disk) - DIX Type 0-3 (between OS and HBA) The patch also allows the HBA to set the guard type to something different than the T10-mandated CRC. Signed-off-by: Martin K. Petersen Signed-off-by: James Bottomley --- include/scsi/scsi_host.h | 84 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index d3b1e06..44a55d1 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -636,6 +636,10 @@ struct Scsi_Host { */ unsigned int max_host_blocked; + /* Protection Information */ + unsigned int prot_capabilities; + unsigned char prot_guard_type; + /* * q used for scsi_tgt msgs, async events or any other requests that * need to be processed in userspace @@ -756,6 +760,86 @@ extern struct request_queue *__scsi_alloc_queue(struct Scsi_Host *shost, extern void scsi_free_host_dev(struct scsi_device *); extern struct scsi_device *scsi_get_host_dev(struct Scsi_Host *); +/* + * DIF defines the exchange of protection information between + * initiator and SBC block device. + * + * DIX defines the exchange of protection information between OS and + * initiator. + */ +enum scsi_host_prot_capabilities { + SHOST_DIF_TYPE1_PROTECTION = 1 << 0, /* T10 DIF Type 1 */ + SHOST_DIF_TYPE2_PROTECTION = 1 << 1, /* T10 DIF Type 2 */ + SHOST_DIF_TYPE3_PROTECTION = 1 << 2, /* T10 DIF Type 3 */ + + SHOST_DIX_TYPE0_PROTECTION = 1 << 3, /* DIX between OS and HBA only */ + SHOST_DIX_TYPE1_PROTECTION = 1 << 4, /* DIX with DIF Type 1 */ + SHOST_DIX_TYPE2_PROTECTION = 1 << 5, /* DIX with DIF Type 2 */ + SHOST_DIX_TYPE3_PROTECTION = 1 << 6, /* DIX with DIF Type 3 */ +}; + +/* + * SCSI hosts which support the Data Integrity Extensions must + * indicate their capabilities by setting the prot_capabilities using + * this call. + */ +static inline void scsi_host_set_prot(struct Scsi_Host *shost, unsigned int mask) +{ + shost->prot_capabilities = mask; +} + +static inline unsigned int scsi_host_get_prot(struct Scsi_Host *shost) +{ + return shost->prot_capabilities; +} + +static inline unsigned int scsi_host_dif_capable(struct Scsi_Host *shost, unsigned int target_type) +{ + switch (target_type) { + case 1: return shost->prot_capabilities & SHOST_DIF_TYPE1_PROTECTION; + case 2: return shost->prot_capabilities & SHOST_DIF_TYPE2_PROTECTION; + case 3: return shost->prot_capabilities & SHOST_DIF_TYPE3_PROTECTION; + } + + return 0; +} + +static inline unsigned int scsi_host_dix_capable(struct Scsi_Host *shost, unsigned int target_type) +{ + switch (target_type) { + case 0: return shost->prot_capabilities & SHOST_DIX_TYPE0_PROTECTION; + case 1: return shost->prot_capabilities & SHOST_DIX_TYPE1_PROTECTION; + case 2: return shost->prot_capabilities & SHOST_DIX_TYPE2_PROTECTION; + case 3: return shost->prot_capabilities & SHOST_DIX_TYPE3_PROTECTION; + } + + return 0; +} + +/* + * All DIX-capable initiators must support the T10-mandated CRC + * checksum. Controllers can optionally implement the IP checksum + * scheme which has much lower impact on system performance. Note + * that the main rationale for the checksum is to match integrity + * metadata with data. Detecting bit errors are a job for ECC memory + * and buses. + */ + +enum scsi_host_guard_type { + SHOST_DIX_GUARD_CRC = 1 << 0, + SHOST_DIX_GUARD_IP = 1 << 1, +}; + +static inline void scsi_host_set_guard(struct Scsi_Host *shost, unsigned char type) +{ + shost->prot_guard_type = type; +} + +static inline unsigned char scsi_host_get_guard(struct Scsi_Host *shost) +{ + return shost->prot_guard_type; +} + /* legacy interfaces */ extern struct Scsi_Host *scsi_register(struct scsi_host_template *, int); extern void scsi_unregister(struct Scsi_Host *); -- cgit v1.1 From db007fc5e20c00b356e9ffe2d0e007398c65c837 Mon Sep 17 00:00:00 2001 From: "Martin K. Petersen" Date: Thu, 17 Jul 2008 04:28:31 -0400 Subject: [SCSI] Command protection operation Controllers that support DMA of protection information must be told explicitly how to handle the I/O. The controller has no knowledge of the protection capabilities of the target device so this information must be passed in the scsi_cmnd. - The protection operation tells the HBA whether to generate, strip or verify protection information. - The protection type tells the HBA which layout the target is formatted with. This is necessary because the controller must be able to correctly interpret the included protection information in order to verify it. - When a scsi_cmnd is reused for error handling the protection operation must be cleared and saved while error handling is in progress. - prot_op and prot_type are placed in an existing hole in scsi_cmnd and don't cause the structure to grow. Signed-off-by: Martin K. Petersen Signed-off-by: James Bottomley --- include/scsi/scsi_cmnd.h | 66 ++++++++++++++++++++++++++++++++++++++++++++++++ include/scsi/scsi_eh.h | 1 + 2 files changed, 67 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index 66c9448..402c107 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -77,6 +77,9 @@ struct scsi_cmnd { int allowed; int timeout_per_command; + unsigned char prot_op; + unsigned char prot_type; + unsigned short cmd_len; enum dma_data_direction sc_data_direction; @@ -208,4 +211,67 @@ static inline int scsi_sg_copy_to_buffer(struct scsi_cmnd *cmd, buf, buflen); } +/* + * The operations below are hints that tell the controller driver how + * to handle I/Os with DIF or similar types of protection information. + */ +enum scsi_prot_operations { + /* Normal I/O */ + SCSI_PROT_NORMAL = 0, + + /* OS-HBA: Protected, HBA-Target: Unprotected */ + SCSI_PROT_READ_INSERT, + SCSI_PROT_WRITE_STRIP, + + /* OS-HBA: Unprotected, HBA-Target: Protected */ + SCSI_PROT_READ_STRIP, + SCSI_PROT_WRITE_INSERT, + + /* OS-HBA: Protected, HBA-Target: Protected */ + SCSI_PROT_READ_PASS, + SCSI_PROT_WRITE_PASS, + + /* OS-HBA: Protected, HBA-Target: Protected, checksum conversion */ + SCSI_PROT_READ_CONVERT, + SCSI_PROT_WRITE_CONVERT, +}; + +static inline void scsi_set_prot_op(struct scsi_cmnd *scmd, unsigned char op) +{ + scmd->prot_op = op; +} + +static inline unsigned char scsi_get_prot_op(struct scsi_cmnd *scmd) +{ + return scmd->prot_op; +} + +/* + * The controller usually does not know anything about the target it + * is communicating with. However, when DIX is enabled the controller + * must be know target type so it can verify the protection + * information passed along with the I/O. + */ +enum scsi_prot_target_type { + SCSI_PROT_DIF_TYPE0 = 0, + SCSI_PROT_DIF_TYPE1, + SCSI_PROT_DIF_TYPE2, + SCSI_PROT_DIF_TYPE3, +}; + +static inline void scsi_set_prot_type(struct scsi_cmnd *scmd, unsigned char type) +{ + scmd->prot_type = type; +} + +static inline unsigned char scsi_get_prot_type(struct scsi_cmnd *scmd) +{ + return scmd->prot_type; +} + +static inline sector_t scsi_get_lba(struct scsi_cmnd *scmd) +{ + return scmd->request->sector; +} + #endif /* _SCSI_SCSI_CMND_H */ diff --git a/include/scsi/scsi_eh.h b/include/scsi/scsi_eh.h index 2a9add2..e5499ed 100644 --- a/include/scsi/scsi_eh.h +++ b/include/scsi/scsi_eh.h @@ -75,6 +75,7 @@ struct scsi_eh_save { int result; enum dma_data_direction data_direction; unsigned char cmd_len; + unsigned char prot_op; unsigned char *cmnd; struct scsi_data_buffer sdb; struct request *next_rq; -- cgit v1.1 From 7027ad72a689797475973c6feb5f0b673382f779 Mon Sep 17 00:00:00 2001 From: "Martin K. Petersen" Date: Thu, 17 Jul 2008 17:08:48 -0400 Subject: [SCSI] Support devices with protection information Implement support for DMA of protection information for devices that are data integrity capable. - Add support for mapping an extra scatter-gather list containing the protection information. - Allocate protection scsi_data_buffer if host is DIX (integrity DMA) capable. - Accessor function for checking whether a device has protection enabled. Signed-off-by: Martin K. Petersen Signed-off-by: James Bottomley --- include/scsi/scsi_cmnd.h | 20 ++++++++++++++++++++ include/scsi/scsi_device.h | 5 +++++ 2 files changed, 25 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index 402c107..f9f6e79 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -90,6 +90,8 @@ struct scsi_cmnd { /* These elements define the operation we ultimately want to perform */ struct scsi_data_buffer sdb; + struct scsi_data_buffer *prot_sdb; + unsigned underflow; /* Return error if less than this amount is transferred */ @@ -274,4 +276,22 @@ static inline sector_t scsi_get_lba(struct scsi_cmnd *scmd) return scmd->request->sector; } +static inline unsigned scsi_prot_sg_count(struct scsi_cmnd *cmd) +{ + return cmd->prot_sdb ? cmd->prot_sdb->table.nents : 0; +} + +static inline struct scatterlist *scsi_prot_sglist(struct scsi_cmnd *cmd) +{ + return cmd->prot_sdb ? cmd->prot_sdb->table.sgl : NULL; +} + +static inline struct scsi_data_buffer *scsi_prot(struct scsi_cmnd *cmd) +{ + return cmd->prot_sdb; +} + +#define scsi_for_each_prot_sg(cmd, sg, nseg, __i) \ + for_each_sg(scsi_prot_sglist(cmd), sg, nseg, __i) + #endif /* _SCSI_SCSI_CMND_H */ diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 4deb934..9cecc40 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -423,6 +423,11 @@ static inline int scsi_device_enclosure(struct scsi_device *sdev) return sdev->inquiry[6] & (1<<6); } +static inline int scsi_device_protection(struct scsi_device *sdev) +{ + return sdev->inquiry[5] & (1<<0); +} + #define MODULE_ALIAS_SCSI_DEVICE(type) \ MODULE_ALIAS("scsi:t-" __stringify(type) "*") #define SCSI_DEVICE_MODALIAS_FMT "scsi:t-0x%02x" -- cgit v1.1 From 12265709ac6e197f4d40d9ec1fd3af97b4196a35 Mon Sep 17 00:00:00 2001 From: Alan Stern Date: Mon, 21 Jul 2008 10:25:52 -0400 Subject: [SCSI] scsi_eh_prep_cmnd should save scmd->underflow This patch (as1116) fixes a bug in scsi_eh_prep_cmnd() and scsi_eh_restore_cmnd(). These routines are supposed to save any values they change and restore them later, but someone forgot to save & restore scmd->underflow. This fixes part of the problem reported in Bugzilla #9638. [jejb: fix up rejections around DIF/DIX] Signed-off-by: Alan Stern Signed-off-by: James Bottomley --- include/scsi/scsi_eh.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/scsi/scsi_eh.h b/include/scsi/scsi_eh.h index e5499ed..06a8790 100644 --- a/include/scsi/scsi_eh.h +++ b/include/scsi/scsi_eh.h @@ -74,6 +74,7 @@ struct scsi_eh_save { /* saved state */ int result; enum dma_data_direction data_direction; + unsigned underflow; unsigned char cmd_len; unsigned char prot_op; unsigned char *cmnd; -- cgit v1.1 From aafe0ad81d7458b6c61eeb39068432683c70c9a9 Mon Sep 17 00:00:00 2001 From: Ian Molton Date: Sat, 12 Jul 2008 11:55:42 +0100 Subject: [ARM] pxa: PXA25x UDC - Fix warning during build Fixes an unterminated ' warning building PXA25X UDC. Signed-off-by: Ian Molton --- include/asm-arm/arch-pxa/pxa25x-udc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h index 8403059..1b80a48 100644 --- a/include/asm-arm/arch-pxa/pxa25x-udc.h +++ b/include/asm-arm/arch-pxa/pxa25x-udc.h @@ -2,7 +2,7 @@ #define _ASM_ARCH_PXA25X_UDC_H #ifdef _ASM_ARCH_PXA27X_UDC_H -#error You can't include both PXA25x and PXA27x UDC support +#error "You can't include both PXA25x and PXA27x UDC support" #endif #define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ -- cgit v1.1 From a9906a19193db69ad0158f289f839edf8aaf103f Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Sat, 26 Jul 2008 14:41:26 -0700 Subject: tracehook: comment fixes This fixes some typos and errors in comments. No code changes. Signed-off-by: Roland McGrath --- include/linux/tracehook.h | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 589f429..b187558 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -244,7 +244,7 @@ static inline int tracehook_prepare_clone(unsigned clone_flags) * tracehook_finish_clone - new child created and being attached * @child: new child task * @clone_flags: %CLONE_* flags from clone/fork/vfork system call - * @trace: return value from tracehook_clone_prepare() + * @trace: return value from tracehook_prepare_clone() * * This is called immediately after adding @child to its parent's children list. * The @trace value is that returned by tracehook_prepare_clone(). @@ -259,19 +259,20 @@ static inline void tracehook_finish_clone(struct task_struct *child, /** * tracehook_report_clone - in parent, new child is about to start running - * @trace: return value from tracehook_clone_prepare() + * @trace: return value from tracehook_prepare_clone() * @regs: parent's user register state * @clone_flags: flags from parent's system call * @pid: new child's PID in the parent's namespace * @child: new child task * - * Called after a child is set up, but before it has been started running. - * The @trace value is that returned by tracehook_clone_prepare(). - * This is not a good place to block, because the child has not started yet. - * Suspend the child here if desired, and block in tracehook_clone_complete(). - * This must prevent the child from self-reaping if tracehook_clone_complete() - * uses the @child pointer; otherwise it might have died and been released by - * the time tracehook_report_clone_complete() is called. + * Called after a child is set up, but before it has been started + * running. @trace is the value returned by tracehook_prepare_clone(). + * This is not a good place to block, because the child has not started + * yet. Suspend the child here if desired, and then block in + * tracehook_report_clone_complete(). This must prevent the child from + * self-reaping if tracehook_report_clone_complete() uses the @child + * pointer; otherwise it might have died and been released by the time + * tracehook_report_report_clone_complete() is called. * * Called with no locks held, but the child cannot run until this returns. */ @@ -290,7 +291,7 @@ static inline void tracehook_report_clone(int trace, struct pt_regs *regs, /** * tracehook_report_clone_complete - new child is running - * @trace: return value from tracehook_clone_prepare() + * @trace: return value from tracehook_prepare_clone() * @regs: parent's user register state * @clone_flags: flags from parent's system call * @pid: new child's PID in the parent's namespace @@ -347,7 +348,7 @@ static inline void tracehook_prepare_release_task(struct task_struct *task) } /** - * tracehook_finish_release_task - task is being reaped, clean up tracing + * tracehook_finish_release_task - final tracing clean-up * @task: task in %EXIT_DEAD state * * This is called in release_task() when @task is being in the middle of -- cgit v1.1 From 6edd8ee60ac9b974bd6ec3b1bcb2aab02762fa8c Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 24 Jul 2008 14:18:57 +0200 Subject: mmc: Export internal host state through debugfs When CONFIG_DEBUG_FS is set, create a few files under /sys/kernel/debug containing information about an mmc host's internal state. Currently, just a single file is created, "ios", which contains information about the current operating parameters for the bus (clock speed, bus width, etc.) Host drivers can add additional files and directories under the host's root directory by passing the debugfs_root field in struct mmc_host as the 'parent' parameter to debugfs_create_*. Signed-off-by: Haavard Skinnemoen Signed-off-by: Pierre Ossman --- include/linux/mmc/host.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 10a2080..9c288c9 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -157,6 +157,8 @@ struct mmc_host { struct led_trigger *led; /* activity led */ #endif + struct dentry *debugfs_root; + unsigned long private[0] ____cacheline_aligned; }; -- cgit v1.1 From f4b7f927b531ca350cfc4ca1bdc3377dac7f9a32 Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Thu, 24 Jul 2008 14:18:58 +0200 Subject: mmc: Add per-card debugfs support For each card successfully added to the bus, create a subdirectory under the host's debugfs root with information about the card. At the moment, only a single file is added to the card directory for all cards: "state". It reflects the "state" field in struct mmc_card, indicating whether the card is present, readonly, etc. For MMC and SD cards (not SDIO), another file is added: "status". Reading this file will ask the card about its current status and return it. This can be useful if the card just refuses to respond to any commands, which might indicate that the card state is not what the MMC core thinks it is (due to a missing stop command, for example.) Signed-off-by: Haavard Skinnemoen Signed-off-by: Pierre Ossman --- include/linux/mmc/card.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index 0d508ac..ee6e822 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -111,6 +111,8 @@ struct mmc_card { unsigned num_info; /* number of info strings */ const char **info; /* info strings */ struct sdio_func_tuple *tuples; /* unknown common tuples */ + + struct dentry *debugfs_root; }; #define mmc_card_mmc(c) ((c)->type == MMC_TYPE_MMC) -- cgit v1.1 From 04578dd330f1ec6bc9c4233833bee0d0ca73ff09 Mon Sep 17 00:00:00 2001 From: Karsten Keil Date: Sat, 26 Jul 2008 18:52:34 +0200 Subject: Define AF_ISDN and PF_ISDN Define the address and protocol family value for mISDN. Signed-off-by: Karsten Keil --- include/linux/socket.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/socket.h b/include/linux/socket.h index 950af63..dc5086f 100644 --- a/include/linux/socket.h +++ b/include/linux/socket.h @@ -189,7 +189,8 @@ struct ucred { #define AF_BLUETOOTH 31 /* Bluetooth sockets */ #define AF_IUCV 32 /* IUCV sockets */ #define AF_RXRPC 33 /* RxRPC sockets */ -#define AF_MAX 34 /* For now.. */ +#define AF_ISDN 34 /* mISDN sockets */ +#define AF_MAX 35 /* For now.. */ /* Protocol families, same as address families. */ #define PF_UNSPEC AF_UNSPEC @@ -225,6 +226,7 @@ struct ucred { #define PF_BLUETOOTH AF_BLUETOOTH #define PF_IUCV AF_IUCV #define PF_RXRPC AF_RXRPC +#define PF_ISDN AF_ISDN #define PF_MAX AF_MAX /* Maximum queue length specifiable by listen. */ -- cgit v1.1 From 1b2b03f8e514e4f68e293846ba511a948b80243c Mon Sep 17 00:00:00 2001 From: Karsten Keil Date: Sun, 27 Jul 2008 01:54:58 +0200 Subject: Add mISDN core files Add mISDN core files Signed-off-by: Karsten Keil --- include/linux/mISDNhw.h | 193 +++++++++++++++++++ include/linux/mISDNif.h | 487 ++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 680 insertions(+) create mode 100644 include/linux/mISDNhw.h create mode 100644 include/linux/mISDNif.h (limited to 'include') diff --git a/include/linux/mISDNhw.h b/include/linux/mISDNhw.h new file mode 100644 index 0000000..e794dfb --- /dev/null +++ b/include/linux/mISDNhw.h @@ -0,0 +1,193 @@ +/* + * + * Author Karsten Keil + * + * Basic declarations for the mISDN HW channels + * + * Copyright 2008 by Karsten Keil + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef MISDNHW_H +#define MISDNHW_H +#include +#include + +/* + * HW DEBUG 0xHHHHGGGG + * H - hardware driver specific bits + * G - for all drivers + */ + +#define DEBUG_HW 0x00000001 +#define DEBUG_HW_OPEN 0x00000002 +#define DEBUG_HW_DCHANNEL 0x00000100 +#define DEBUG_HW_DFIFO 0x00000200 +#define DEBUG_HW_BCHANNEL 0x00001000 +#define DEBUG_HW_BFIFO 0x00002000 + +#define MAX_DFRAME_LEN_L1 300 +#define MAX_MON_FRAME 32 +#define MAX_LOG_SPACE 2048 +#define MISDN_COPY_SIZE 32 + +/* channel->Flags bit field */ +#define FLG_TX_BUSY 0 /* tx_buf in use */ +#define FLG_TX_NEXT 1 /* next_skb in use */ +#define FLG_L1_BUSY 2 /* L1 is permanent busy */ +#define FLG_L2_ACTIVATED 3 /* activated from L2 */ +#define FLG_OPEN 5 /* channel is in use */ +#define FLG_ACTIVE 6 /* channel is activated */ +#define FLG_BUSY_TIMER 7 +/* channel type */ +#define FLG_DCHANNEL 8 /* channel is D-channel */ +#define FLG_BCHANNEL 9 /* channel is B-channel */ +#define FLG_ECHANNEL 10 /* channel is E-channel */ +#define FLG_TRANSPARENT 12 /* channel use transparent data */ +#define FLG_HDLC 13 /* channel use hdlc data */ +#define FLG_L2DATA 14 /* channel use L2 DATA primitivs */ +#define FLG_ORIGIN 15 /* channel is on origin site */ +/* channel specific stuff */ +/* arcofi specific */ +#define FLG_ARCOFI_TIMER 16 +#define FLG_ARCOFI_ERROR 17 +/* isar specific */ +#define FLG_INITIALIZED 16 +#define FLG_DLEETX 17 +#define FLG_LASTDLE 18 +#define FLG_FIRST 19 +#define FLG_LASTDATA 20 +#define FLG_NMD_DATA 21 +#define FLG_FTI_RUN 22 +#define FLG_LL_OK 23 +#define FLG_LL_CONN 24 +#define FLG_DTMFSEND 25 + +/* workq events */ +#define FLG_RECVQUEUE 30 +#define FLG_PHCHANGE 31 + +#define schedule_event(s, ev) do { \ + test_and_set_bit(ev, &((s)->Flags)); \ + schedule_work(&((s)->workq)); \ + } while (0) + +struct dchannel { + struct mISDNdevice dev; + u_long Flags; + struct work_struct workq; + void (*phfunc) (struct dchannel *); + u_int state; + void *l1; + /* HW access */ + u_char (*read_reg) (void *, u_char); + void (*write_reg) (void *, u_char, u_char); + void (*read_fifo) (void *, u_char *, int); + void (*write_fifo) (void *, u_char *, int); + void *hw; + int slot; /* multiport card channel slot */ + struct timer_list timer; + /* receive data */ + struct sk_buff *rx_skb; + int maxlen; + /* send data */ + struct sk_buff_head squeue; + struct sk_buff_head rqueue; + struct sk_buff *tx_skb; + int tx_idx; + int debug; + /* statistics */ + int err_crc; + int err_tx; + int err_rx; +}; + +typedef int (dchannel_l1callback)(struct dchannel *, u_int); +extern int create_l1(struct dchannel *, dchannel_l1callback *); + +/* private L1 commands */ +#define INFO0 0x8002 +#define INFO1 0x8102 +#define INFO2 0x8202 +#define INFO3_P8 0x8302 +#define INFO3_P10 0x8402 +#define INFO4_P8 0x8502 +#define INFO4_P10 0x8602 +#define LOSTFRAMING 0x8702 +#define ANYSIGNAL 0x8802 +#define HW_POWERDOWN 0x8902 +#define HW_RESET_REQ 0x8a02 +#define HW_POWERUP_REQ 0x8b02 +#define HW_DEACT_REQ 0x8c02 +#define HW_ACTIVATE_REQ 0x8e02 +#define HW_D_NOBLOCKED 0x8f02 +#define HW_RESET_IND 0x9002 +#define HW_POWERUP_IND 0x9102 +#define HW_DEACT_IND 0x9202 +#define HW_ACTIVATE_IND 0x9302 +#define HW_DEACT_CNF 0x9402 +#define HW_TESTLOOP 0x9502 +#define HW_TESTRX_RAW 0x9602 +#define HW_TESTRX_HDLC 0x9702 +#define HW_TESTRX_OFF 0x9802 + +struct layer1; +extern int l1_event(struct layer1 *, u_int); + + +struct bchannel { + struct mISDNchannel ch; + int nr; + u_long Flags; + struct work_struct workq; + u_int state; + /* HW access */ + u_char (*read_reg) (void *, u_char); + void (*write_reg) (void *, u_char, u_char); + void (*read_fifo) (void *, u_char *, int); + void (*write_fifo) (void *, u_char *, int); + void *hw; + int slot; /* multiport card channel slot */ + struct timer_list timer; + /* receive data */ + struct sk_buff *rx_skb; + int maxlen; + /* send data */ + struct sk_buff *next_skb; + struct sk_buff *tx_skb; + struct sk_buff_head rqueue; + int rcount; + int tx_idx; + int debug; + /* statistics */ + int err_crc; + int err_tx; + int err_rx; +}; + +extern int mISDN_initdchannel(struct dchannel *, int, void *); +extern int mISDN_initbchannel(struct bchannel *, int); +extern int mISDN_freedchannel(struct dchannel *); +extern int mISDN_freebchannel(struct bchannel *); +extern void queue_ch_frame(struct mISDNchannel *, u_int, + int, struct sk_buff *); +extern int dchannel_senddata(struct dchannel *, struct sk_buff *); +extern int bchannel_senddata(struct bchannel *, struct sk_buff *); +extern void recv_Dchannel(struct dchannel *); +extern void recv_Bchannel(struct bchannel *); +extern void recv_Dchannel_skb(struct dchannel *, struct sk_buff *); +extern void recv_Bchannel_skb(struct bchannel *, struct sk_buff *); +extern void confirm_Bsend(struct bchannel *bch); +extern int get_next_bframe(struct bchannel *); +extern int get_next_dframe(struct dchannel *); + +#endif diff --git a/include/linux/mISDNif.h b/include/linux/mISDNif.h new file mode 100644 index 0000000..5c948f3 --- /dev/null +++ b/include/linux/mISDNif.h @@ -0,0 +1,487 @@ +/* + * + * Author Karsten Keil + * + * Copyright 2008 by Karsten Keil + * + * This code is free software; you can redistribute it and/or modify + * it under the terms of the GNU LESSER GENERAL PUBLIC LICENSE + * version 2.1 as published by the Free Software Foundation. + * + * This code is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU LESSER GENERAL PUBLIC LICENSE for more details. + * + */ + +#ifndef mISDNIF_H +#define mISDNIF_H + +#include +#include +#include +#include + +/* + * ABI Version 32 bit + * + * <8 bit> Major version + * - changed if any interface become backwards incompatible + * + * <8 bit> Minor version + * - changed if any interface is extended but backwards compatible + * + * <16 bit> Release number + * - should be incremented on every checkin + */ +#define MISDN_MAJOR_VERSION 1 +#define MISDN_MINOR_VERSION 0 +#define MISDN_RELEASE 18 + +/* primitives for information exchange + * generell format + * <16 bit 0 > + * <8 bit command> + * BIT 8 = 1 LAYER private + * BIT 7 = 1 answer + * BIT 6 = 1 DATA + * <8 bit target layer mask> + * + * Layer = 00 is reserved for general commands + Layer = 01 L2 -> HW + Layer = 02 HW -> L2 + Layer = 04 L3 -> L2 + Layer = 08 L2 -> L3 + * Layer = FF is reserved for broadcast commands + */ + +#define MISDN_CMDMASK 0xff00 +#define MISDN_LAYERMASK 0x00ff + +/* generell commands */ +#define OPEN_CHANNEL 0x0100 +#define CLOSE_CHANNEL 0x0200 +#define CONTROL_CHANNEL 0x0300 +#define CHECK_DATA 0x0400 + +/* layer 2 -> layer 1 */ +#define PH_ACTIVATE_REQ 0x0101 +#define PH_DEACTIVATE_REQ 0x0201 +#define PH_DATA_REQ 0x2001 +#define MPH_ACTIVATE_REQ 0x0501 +#define MPH_DEACTIVATE_REQ 0x0601 +#define MPH_INFORMATION_REQ 0x0701 +#define PH_CONTROL_REQ 0x0801 + +/* layer 1 -> layer 2 */ +#define PH_ACTIVATE_IND 0x0102 +#define PH_ACTIVATE_CNF 0x4102 +#define PH_DEACTIVATE_IND 0x0202 +#define PH_DEACTIVATE_CNF 0x4202 +#define PH_DATA_IND 0x2002 +#define MPH_ACTIVATE_IND 0x0502 +#define MPH_DEACTIVATE_IND 0x0602 +#define MPH_INFORMATION_IND 0x0702 +#define PH_DATA_CNF 0x6002 +#define PH_CONTROL_IND 0x0802 +#define PH_CONTROL_CNF 0x4802 + +/* layer 3 -> layer 2 */ +#define DL_ESTABLISH_REQ 0x1004 +#define DL_RELEASE_REQ 0x1104 +#define DL_DATA_REQ 0x3004 +#define DL_UNITDATA_REQ 0x3104 +#define DL_INFORMATION_REQ 0x0004 + +/* layer 2 -> layer 3 */ +#define DL_ESTABLISH_IND 0x1008 +#define DL_ESTABLISH_CNF 0x5008 +#define DL_RELEASE_IND 0x1108 +#define DL_RELEASE_CNF 0x5108 +#define DL_DATA_IND 0x3008 +#define DL_UNITDATA_IND 0x3108 +#define DL_INFORMATION_IND 0x0008 + +/* intern layer 2 managment */ +#define MDL_ASSIGN_REQ 0x1804 +#define MDL_ASSIGN_IND 0x1904 +#define MDL_REMOVE_REQ 0x1A04 +#define MDL_REMOVE_IND 0x1B04 +#define MDL_STATUS_UP_IND 0x1C04 +#define MDL_STATUS_DOWN_IND 0x1D04 +#define MDL_STATUS_UI_IND 0x1E04 +#define MDL_ERROR_IND 0x1F04 +#define MDL_ERROR_RSP 0x5F04 + +/* DL_INFORMATION_IND types */ +#define DL_INFO_L2_CONNECT 0x0001 +#define DL_INFO_L2_REMOVED 0x0002 + +/* PH_CONTROL types */ +/* TOUCH TONE IS 0x20XX XX "0"..."9", "A","B","C","D","*","#" */ +#define DTMF_TONE_VAL 0x2000 +#define DTMF_TONE_MASK 0x007F +#define DTMF_TONE_START 0x2100 +#define DTMF_TONE_STOP 0x2200 +#define DTMF_HFC_COEF 0x4000 +#define DSP_CONF_JOIN 0x2403 +#define DSP_CONF_SPLIT 0x2404 +#define DSP_RECEIVE_OFF 0x2405 +#define DSP_RECEIVE_ON 0x2406 +#define DSP_ECHO_ON 0x2407 +#define DSP_ECHO_OFF 0x2408 +#define DSP_MIX_ON 0x2409 +#define DSP_MIX_OFF 0x240a +#define DSP_DELAY 0x240b +#define DSP_JITTER 0x240c +#define DSP_TXDATA_ON 0x240d +#define DSP_TXDATA_OFF 0x240e +#define DSP_TX_DEJITTER 0x240f +#define DSP_TX_DEJ_OFF 0x2410 +#define DSP_TONE_PATT_ON 0x2411 +#define DSP_TONE_PATT_OFF 0x2412 +#define DSP_VOL_CHANGE_TX 0x2413 +#define DSP_VOL_CHANGE_RX 0x2414 +#define DSP_BF_ENABLE_KEY 0x2415 +#define DSP_BF_DISABLE 0x2416 +#define DSP_BF_ACCEPT 0x2416 +#define DSP_BF_REJECT 0x2417 +#define DSP_PIPELINE_CFG 0x2418 +#define HFC_VOL_CHANGE_TX 0x2601 +#define HFC_VOL_CHANGE_RX 0x2602 +#define HFC_SPL_LOOP_ON 0x2603 +#define HFC_SPL_LOOP_OFF 0x2604 + +/* DSP_TONE_PATT_ON parameter */ +#define TONE_OFF 0x0000 +#define TONE_GERMAN_DIALTONE 0x0001 +#define TONE_GERMAN_OLDDIALTONE 0x0002 +#define TONE_AMERICAN_DIALTONE 0x0003 +#define TONE_GERMAN_DIALPBX 0x0004 +#define TONE_GERMAN_OLDDIALPBX 0x0005 +#define TONE_AMERICAN_DIALPBX 0x0006 +#define TONE_GERMAN_RINGING 0x0007 +#define TONE_GERMAN_OLDRINGING 0x0008 +#define TONE_AMERICAN_RINGPBX 0x000b +#define TONE_GERMAN_RINGPBX 0x000c +#define TONE_GERMAN_OLDRINGPBX 0x000d +#define TONE_AMERICAN_RINGING 0x000e +#define TONE_GERMAN_BUSY 0x000f +#define TONE_GERMAN_OLDBUSY 0x0010 +#define TONE_AMERICAN_BUSY 0x0011 +#define TONE_GERMAN_HANGUP 0x0012 +#define TONE_GERMAN_OLDHANGUP 0x0013 +#define TONE_AMERICAN_HANGUP 0x0014 +#define TONE_SPECIAL_INFO 0x0015 +#define TONE_GERMAN_GASSENBESETZT 0x0016 +#define TONE_GERMAN_AUFSCHALTTON 0x0016 + +/* MPH_INFORMATION_IND */ +#define L1_SIGNAL_LOS_OFF 0x0010 +#define L1_SIGNAL_LOS_ON 0x0011 +#define L1_SIGNAL_AIS_OFF 0x0012 +#define L1_SIGNAL_AIS_ON 0x0013 +#define L1_SIGNAL_RDI_OFF 0x0014 +#define L1_SIGNAL_RDI_ON 0x0015 +#define L1_SIGNAL_SLIP_RX 0x0020 +#define L1_SIGNAL_SLIP_TX 0x0021 + +/* + * protocol ids + * D channel 1-31 + * B channel 33 - 63 + */ + +#define ISDN_P_NONE 0 +#define ISDN_P_BASE 0 +#define ISDN_P_TE_S0 0x01 +#define ISDN_P_NT_S0 0x02 +#define ISDN_P_TE_E1 0x03 +#define ISDN_P_NT_E1 0x04 +#define ISDN_P_LAPD_TE 0x10 +#define ISDN_P_LAPD_NT 0x11 + +#define ISDN_P_B_MASK 0x1f +#define ISDN_P_B_START 0x20 + +#define ISDN_P_B_RAW 0x21 +#define ISDN_P_B_HDLC 0x22 +#define ISDN_P_B_X75SLP 0x23 +#define ISDN_P_B_L2DTMF 0x24 +#define ISDN_P_B_L2DSP 0x25 +#define ISDN_P_B_L2DSPHDLC 0x26 + +#define OPTION_L2_PMX 1 +#define OPTION_L2_PTP 2 +#define OPTION_L2_FIXEDTEI 3 +#define OPTION_L2_CLEANUP 4 + +/* should be in sync with linux/kobject.h:KOBJ_NAME_LEN */ +#define MISDN_MAX_IDLEN 20 + +struct mISDNhead { + unsigned int prim; + unsigned int id; +} __attribute__((packed)); + +#define MISDN_HEADER_LEN sizeof(struct mISDNhead) +#define MAX_DATA_SIZE 2048 +#define MAX_DATA_MEM (MAX_DATA_SIZE + MISDN_HEADER_LEN) +#define MAX_DFRAME_LEN 260 + +#define MISDN_ID_ADDR_MASK 0xFFFF +#define MISDN_ID_TEI_MASK 0xFF00 +#define MISDN_ID_SAPI_MASK 0x00FF +#define MISDN_ID_TEI_ANY 0x7F00 + +#define MISDN_ID_ANY 0xFFFF +#define MISDN_ID_NONE 0xFFFE + +#define GROUP_TEI 127 +#define TEI_SAPI 63 +#define CTRL_SAPI 0 + +#define MISDN_CHMAP_SIZE 4 + +#define SOL_MISDN 0 + +struct sockaddr_mISDN { + sa_family_t family; + unsigned char dev; + unsigned char channel; + unsigned char sapi; + unsigned char tei; +}; + +/* timer device ioctl */ +#define IMADDTIMER _IOR('I', 64, int) +#define IMDELTIMER _IOR('I', 65, int) +/* socket ioctls */ +#define IMGETVERSION _IOR('I', 66, int) +#define IMGETCOUNT _IOR('I', 67, int) +#define IMGETDEVINFO _IOR('I', 68, int) +#define IMCTRLREQ _IOR('I', 69, int) +#define IMCLEAR_L2 _IOR('I', 70, int) + +struct mISDNversion { + unsigned char major; + unsigned char minor; + unsigned short release; +}; + +struct mISDN_devinfo { + u_int id; + u_int Dprotocols; + u_int Bprotocols; + u_int protocol; + u_long channelmap[MISDN_CHMAP_SIZE]; + u_int nrbchan; + char name[MISDN_MAX_IDLEN]; +}; + +/* CONTROL_CHANNEL parameters */ +#define MISDN_CTRL_GETOP 0x0000 +#define MISDN_CTRL_LOOP 0x0001 +#define MISDN_CTRL_CONNECT 0x0002 +#define MISDN_CTRL_DISCONNECT 0x0004 +#define MISDN_CTRL_PCMCONNECT 0x0010 +#define MISDN_CTRL_PCMDISCONNECT 0x0020 +#define MISDN_CTRL_SETPEER 0x0040 +#define MISDN_CTRL_UNSETPEER 0x0080 +#define MISDN_CTRL_RX_OFF 0x0100 +#define MISDN_CTRL_HW_FEATURES_OP 0x2000 +#define MISDN_CTRL_HW_FEATURES 0x2001 +#define MISDN_CTRL_HFC_OP 0x4000 +#define MISDN_CTRL_HFC_PCM_CONN 0x4001 +#define MISDN_CTRL_HFC_PCM_DISC 0x4002 +#define MISDN_CTRL_HFC_CONF_JOIN 0x4003 +#define MISDN_CTRL_HFC_CONF_SPLIT 0x4004 +#define MISDN_CTRL_HFC_RECEIVE_OFF 0x4005 +#define MISDN_CTRL_HFC_RECEIVE_ON 0x4006 +#define MISDN_CTRL_HFC_ECHOCAN_ON 0x4007 +#define MISDN_CTRL_HFC_ECHOCAN_OFF 0x4008 + + +/* socket options */ +#define MISDN_TIME_STAMP 0x0001 + +struct mISDN_ctrl_req { + int op; + int channel; + int p1; + int p2; +}; + +/* muxer options */ +#define MISDN_OPT_ALL 1 +#define MISDN_OPT_TEIMGR 2 + +#ifdef __KERNEL__ +#include +#include +#include +#include +#include + +#define DEBUG_CORE 0x000000ff +#define DEBUG_CORE_FUNC 0x00000002 +#define DEBUG_SOCKET 0x00000004 +#define DEBUG_MANAGER 0x00000008 +#define DEBUG_SEND_ERR 0x00000010 +#define DEBUG_MSG_THREAD 0x00000020 +#define DEBUG_QUEUE_FUNC 0x00000040 +#define DEBUG_L1 0x0000ff00 +#define DEBUG_L1_FSM 0x00000200 +#define DEBUG_L2 0x00ff0000 +#define DEBUG_L2_FSM 0x00020000 +#define DEBUG_L2_CTRL 0x00040000 +#define DEBUG_L2_RECV 0x00080000 +#define DEBUG_L2_TEI 0x00100000 +#define DEBUG_L2_TEIFSM 0x00200000 +#define DEBUG_TIMER 0x01000000 + +#define mISDN_HEAD_P(s) ((struct mISDNhead *)&s->cb[0]) +#define mISDN_HEAD_PRIM(s) (((struct mISDNhead *)&s->cb[0])->prim) +#define mISDN_HEAD_ID(s) (((struct mISDNhead *)&s->cb[0])->id) + +/* socket states */ +#define MISDN_OPEN 1 +#define MISDN_BOUND 2 +#define MISDN_CLOSED 3 + +struct mISDNchannel; +struct mISDNdevice; +struct mISDNstack; + +struct channel_req { + u_int protocol; + struct sockaddr_mISDN adr; + struct mISDNchannel *ch; +}; + +typedef int (ctrl_func_t)(struct mISDNchannel *, u_int, void *); +typedef int (send_func_t)(struct mISDNchannel *, struct sk_buff *); +typedef int (create_func_t)(struct channel_req *); + +struct Bprotocol { + struct list_head list; + char *name; + u_int Bprotocols; + create_func_t *create; +}; + +struct mISDNchannel { + struct list_head list; + u_int protocol; + u_int nr; + u_long opt; + u_int addr; + struct mISDNstack *st; + struct mISDNchannel *peer; + send_func_t *send; + send_func_t *recv; + ctrl_func_t *ctrl; +}; + +struct mISDN_sock_list { + struct hlist_head head; + rwlock_t lock; +}; + +struct mISDN_sock { + struct sock sk; + struct mISDNchannel ch; + u_int cmask; + struct mISDNdevice *dev; +}; + + + +struct mISDNdevice { + struct mISDNchannel D; + u_int id; + char name[MISDN_MAX_IDLEN]; + u_int Dprotocols; + u_int Bprotocols; + u_int nrbchan; + u_long channelmap[MISDN_CHMAP_SIZE]; + struct list_head bchannels; + struct mISDNchannel *teimgr; + struct device dev; +}; + +struct mISDNstack { + u_long status; + struct mISDNdevice *dev; + struct task_struct *thread; + struct completion *notify; + wait_queue_head_t workq; + struct sk_buff_head msgq; + struct list_head layer2; + struct mISDNchannel *layer1; + struct mISDNchannel own; + struct mutex lmutex; /* protect lists */ + struct mISDN_sock_list l1sock; +#ifdef MISDN_MSG_STATS + u_int msg_cnt; + u_int sleep_cnt; + u_int stopped_cnt; +#endif +}; + +/* global alloc/queue dunctions */ + +static inline struct sk_buff * +mI_alloc_skb(unsigned int len, gfp_t gfp_mask) +{ + struct sk_buff *skb; + + skb = alloc_skb(len + MISDN_HEADER_LEN, gfp_mask); + if (likely(skb)) + skb_reserve(skb, MISDN_HEADER_LEN); + return skb; +} + +static inline struct sk_buff * +_alloc_mISDN_skb(u_int prim, u_int id, u_int len, void *dp, gfp_t gfp_mask) +{ + struct sk_buff *skb = mI_alloc_skb(len, gfp_mask); + struct mISDNhead *hh; + + if (!skb) + return NULL; + if (len) + memcpy(skb_put(skb, len), dp, len); + hh = mISDN_HEAD_P(skb); + hh->prim = prim; + hh->id = id; + return skb; +} + +static inline void +_queue_data(struct mISDNchannel *ch, u_int prim, + u_int id, u_int len, void *dp, gfp_t gfp_mask) +{ + struct sk_buff *skb; + + if (!ch->peer) + return; + skb = _alloc_mISDN_skb(prim, id, len, dp, gfp_mask); + if (!skb) + return; + if (ch->recv(ch->peer, skb)) + dev_kfree_skb(skb); +} + +/* global register/unregister functions */ + +extern int mISDN_register_device(struct mISDNdevice *, char *name); +extern void mISDN_unregister_device(struct mISDNdevice *); +extern int mISDN_register_Bprotocol(struct Bprotocol *); +extern void mISDN_unregister_Bprotocol(struct Bprotocol *); + +extern void set_channel_address(struct mISDNchannel *, u_int, u_int); + +#endif /* __KERNEL__ */ +#endif /* mISDNIF_H */ -- cgit v1.1 From 960366cf8dbb3359afaca30cf7fdbf69a6d6dda7 Mon Sep 17 00:00:00 2001 From: Karsten Keil Date: Sun, 27 Jul 2008 01:56:38 +0200 Subject: Add mISDN DSP Enable support for digital audio processing capability. This module may be used for special applications that require cross connecting of bchannels, conferencing, dtmf decoding echo cancelation, tone generation, and Blowfish encryption and decryption. It may use hardware features if available. Signed-off-by: Karsten Keil --- include/linux/mISDNdsp.h | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 include/linux/mISDNdsp.h (limited to 'include') diff --git a/include/linux/mISDNdsp.h b/include/linux/mISDNdsp.h new file mode 100644 index 0000000..6b71d2d --- /dev/null +++ b/include/linux/mISDNdsp.h @@ -0,0 +1,37 @@ +#ifndef __mISDNdsp_H__ +#define __mISDNdsp_H__ + +struct mISDN_dsp_element_arg { + char *name; + char *def; + char *desc; +}; + +struct mISDN_dsp_element { + char *name; + void *(*new)(const char *arg); + void (*free)(void *p); + void (*process_tx)(void *p, unsigned char *data, int len); + void (*process_rx)(void *p, unsigned char *data, int len); + int num_args; + struct mISDN_dsp_element_arg + *args; +}; + +extern int mISDN_dsp_element_register(struct mISDN_dsp_element *elem); +extern void mISDN_dsp_element_unregister(struct mISDN_dsp_element *elem); + +struct dsp_features { + int hfc_id; /* unique id to identify the chip (or -1) */ + int hfc_dtmf; /* set if HFCmulti card supports dtmf */ + int hfc_loops; /* set if card supports tone loops */ + int hfc_echocanhw; /* set if card supports echocancelation*/ + int pcm_id; /* unique id to identify the pcm bus (or -1) */ + int pcm_slots; /* number of slots on the pcm bus */ + int pcm_banks; /* number of IO banks of pcm bus */ + int unclocked; /* data is not clocked (has jitter/loss) */ + int unordered; /* data is unordered (packets have index) */ +}; + +#endif + -- cgit v1.1 From af69fb3a8ffa37e986db00ed93099dc44babeef4 Mon Sep 17 00:00:00 2001 From: Karsten Keil Date: Sun, 27 Jul 2008 02:00:43 +0200 Subject: Add mISDN HFC multiport driver Enable support for cards with Cologne Chip AG's HFC multiport chip. Signed-off-by: Karsten Keil --- include/linux/pci_ids.h | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index c3b1761..ffe479b 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1832,7 +1832,13 @@ #define PCI_DEVICE_ID_MOXA_C320 0x3200 #define PCI_VENDOR_ID_CCD 0x1397 +#define PCI_DEVICE_ID_CCD_HFC4S 0x08B4 +#define PCI_SUBDEVICE_ID_CCD_PMX2S 0x1234 +#define PCI_DEVICE_ID_CCD_HFC8S 0x16B8 #define PCI_DEVICE_ID_CCD_2BD0 0x2bd0 +#define PCI_DEVICE_ID_CCD_HFCE1 0x30B1 +#define PCI_SUBDEVICE_ID_CCD_SPD4S 0x3136 +#define PCI_SUBDEVICE_ID_CCD_SPDE1 0x3137 #define PCI_DEVICE_ID_CCD_B000 0xb000 #define PCI_DEVICE_ID_CCD_B006 0xb006 #define PCI_DEVICE_ID_CCD_B007 0xb007 @@ -1842,8 +1848,32 @@ #define PCI_DEVICE_ID_CCD_B00B 0xb00b #define PCI_DEVICE_ID_CCD_B00C 0xb00c #define PCI_DEVICE_ID_CCD_B100 0xb100 +#define PCI_SUBDEVICE_ID_CCD_IOB4ST 0xB520 +#define PCI_SUBDEVICE_ID_CCD_IOB8STR 0xB521 +#define PCI_SUBDEVICE_ID_CCD_IOB8ST 0xB522 +#define PCI_SUBDEVICE_ID_CCD_IOB1E1 0xB523 +#define PCI_SUBDEVICE_ID_CCD_SWYX4S 0xB540 +#define PCI_SUBDEVICE_ID_CCD_JH4S20 0xB550 +#define PCI_SUBDEVICE_ID_CCD_IOB8ST_1 0xB552 +#define PCI_SUBDEVICE_ID_CCD_BN4S 0xB560 +#define PCI_SUBDEVICE_ID_CCD_BN8S 0xB562 +#define PCI_SUBDEVICE_ID_CCD_BNE1 0xB563 +#define PCI_SUBDEVICE_ID_CCD_BNE1D 0xB564 +#define PCI_SUBDEVICE_ID_CCD_BNE1DP 0xB565 +#define PCI_SUBDEVICE_ID_CCD_BN2S 0xB566 +#define PCI_SUBDEVICE_ID_CCD_BN1SM 0xB567 +#define PCI_SUBDEVICE_ID_CCD_BN4SM 0xB568 +#define PCI_SUBDEVICE_ID_CCD_BN2SM 0xB569 +#define PCI_SUBDEVICE_ID_CCD_BNE1M 0xB56A +#define PCI_SUBDEVICE_ID_CCD_BN8SP 0xB56B +#define PCI_SUBDEVICE_ID_CCD_HFC4S 0xB620 +#define PCI_SUBDEVICE_ID_CCD_HFC8S 0xB622 #define PCI_DEVICE_ID_CCD_B700 0xb700 #define PCI_DEVICE_ID_CCD_B701 0xb701 +#define PCI_SUBDEVICE_ID_CCD_HFCE1 0xC523 +#define PCI_SUBDEVICE_ID_CCD_OV2S 0xE884 +#define PCI_SUBDEVICE_ID_CCD_OV4S 0xE888 +#define PCI_SUBDEVICE_ID_CCD_OV8S 0xE998 #define PCI_VENDOR_ID_EXAR 0x13a8 #define PCI_DEVICE_ID_EXAR_XR17C152 0x0152 @@ -2523,6 +2553,9 @@ #define PCI_VENDOR_ID_3COM_2 0xa727 +#define PCI_VENDOR_ID_DIGIUM 0xd161 +#define PCI_DEVICE_ID_DIGIUM_HFC4S 0xb410 + #define PCI_SUBVENDOR_ID_EXSYS 0xd84d #define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 #define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 -- cgit v1.1 From 93bc4e89c260d91576840c4881d1066d84ccd422 Mon Sep 17 00:00:00 2001 From: Pekka Enberg Date: Sat, 26 Jul 2008 17:49:33 -0700 Subject: netfilter: fix double-free and use-after free As suggested by Patrick McHardy, introduce a __krealloc() that doesn't free the original buffer to fix a double-free and use-after-free bug introduced by me in netfilter that uses RCU. Reported-by: Patrick McHardy Signed-off-by: Pekka Enberg Tested-by: Dieter Ries Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/slab.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/slab.h b/include/linux/slab.h index 9aa90a6..be6f1d4 100644 --- a/include/linux/slab.h +++ b/include/linux/slab.h @@ -96,6 +96,7 @@ int kmem_ptr_validate(struct kmem_cache *cachep, const void *ptr); /* * Common kmalloc functions provided by all allocators */ +void * __must_check __krealloc(const void *, size_t, gfp_t); void * __must_check krealloc(const void *, size_t, gfp_t); void kfree(const void *); size_t ksize(const void *); -- cgit v1.1 From d2d9648ec6858e19d16a0b16da62534e85888653 Mon Sep 17 00:00:00 2001 From: Denys Vlasenko Date: Tue, 1 Jul 2008 14:16:09 +0200 Subject: [PATCH] reuse xxx_fifo_fops for xxx_pipe_fops Merge fifo and pipe file_operations. Signed-off-by: Denys Vlasenko Signed-off-by: Al Viro --- include/linux/fs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 53d2edb..7721a2a 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1696,9 +1696,9 @@ extern void init_special_inode(struct inode *, umode_t, dev_t); extern void make_bad_inode(struct inode *); extern int is_bad_inode(struct inode *); -extern const struct file_operations read_fifo_fops; -extern const struct file_operations write_fifo_fops; -extern const struct file_operations rdwr_fifo_fops; +extern const struct file_operations read_pipefifo_fops; +extern const struct file_operations write_pipefifo_fops; +extern const struct file_operations rdwr_pipefifo_fops; extern int fs_may_remount_ro(struct super_block *); -- cgit v1.1 From 734550921e9b7ab924a43aa3d0bd4239dac4fbf1 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Mon, 14 Jul 2008 21:22:20 -0400 Subject: [PATCH] beginning of sysctl cleanup - ctl_table_set New object: set of sysctls [currently - root and per-net-ns]. Contains: pointer to parent set, list of tables and "should I see this set?" method (->is_seen(set)). Current lists of tables are subsumed by that; net-ns contains such a beast. ->lookup() for ctl_table_root returns pointer to ctl_table_set instead of that to ->list of that ctl_table_set. [folded compile fixes by rdd for configs without sysctl] Signed-off-by: Al Viro --- include/linux/sysctl.h | 15 +++++++++++++-- include/net/net_namespace.h | 4 +++- 2 files changed, 16 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 24141b4..c1e0cf4 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -947,6 +947,16 @@ struct ctl_table; struct nsproxy; struct ctl_table_root; +struct ctl_table_set { + struct list_head list; + struct ctl_table_set *parent; + int (*is_seen)(struct ctl_table_set *); +}; + +extern void setup_sysctl_set(struct ctl_table_set *p, + struct ctl_table_set *parent, + int (*is_seen)(struct ctl_table_set *)); + extern struct ctl_table_header *sysctl_head_next(struct ctl_table_header *prev); extern struct ctl_table_header *__sysctl_head_next(struct nsproxy *namespaces, struct ctl_table_header *prev); @@ -1049,8 +1059,8 @@ struct ctl_table struct ctl_table_root { struct list_head root_list; - struct list_head header_list; - struct list_head *(*lookup)(struct ctl_table_root *root, + struct ctl_table_set default_set; + struct ctl_table_set *(*lookup)(struct ctl_table_root *root, struct nsproxy *namespaces); int (*permissions)(struct ctl_table_root *root, struct nsproxy *namespaces, struct ctl_table *table); @@ -1066,6 +1076,7 @@ struct ctl_table_header struct completion *unregistering; struct ctl_table *ctl_table_arg; struct ctl_table_root *root; + struct ctl_table_set *set; }; /* struct ctl_path describes where in the hierarchy a table is added */ diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h index 3855620..a8eb43c 100644 --- a/include/net/net_namespace.h +++ b/include/net/net_namespace.h @@ -38,7 +38,9 @@ struct net { struct proc_dir_entry *proc_net; struct proc_dir_entry *proc_net_stat; - struct list_head sysctl_table_headers; +#ifdef CONFIG_SYSCTL + struct ctl_table_set sysctls; +#endif struct net_device *loopback_dev; /* The loopback */ -- cgit v1.1 From f7e6ced4061da509f737541ca4dbd44d83a6e82f Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 15 Jul 2008 01:44:23 -0400 Subject: [PATCH] allow delayed freeing of ctl_table_header Refcount the sucker; instead of freeing it by the end of unregistration just drop the refcount and free only when it hits zero. Make sure that we _always_ make ->unregistering non-NULL in start_unregistering(). That allows anybody to get a reference to such puppy, preventing its freeing and reuse. It does *not* block unregistration. Anybody who holds such a reference can * try to grab a "use" reference (ctl_head_grab()); that will succeeds if and only if it hadn't entered unregistration yet. If it succeeds, we can use it in all normal ways until we release the "use" reference (with ctl_head_finish()). Note that this relies on having ->unregistering become non-NULL in all cases when one starts to unregister the sucker. * keep pointers to ctl_table entries; they *can* be freed if the entire thing is unregistered. However, if ctl_head_grab() succeeds, we know that unregistration had not happened (and will not happen until ctl_head_finish()) and such pointers can be used safely. IOW, now we can have inodes under /proc/sys keep references to ctl_table entries, protecting them with references to ctl_table_header and grabbing the latter for the duration of operations that require access to ctl_table. That won't cause deadlocks, since unregistration will not be stopped by mere keeping a reference to ctl_table_header. Signed-off-by: Al Viro --- include/linux/sysctl.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index c1e0cf4..956264d 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -957,6 +957,11 @@ extern void setup_sysctl_set(struct ctl_table_set *p, struct ctl_table_set *parent, int (*is_seen)(struct ctl_table_set *)); +struct ctl_table_header; + +extern void sysctl_head_get(struct ctl_table_header *); +extern void sysctl_head_put(struct ctl_table_header *); +extern struct ctl_table_header *sysctl_head_grab(struct ctl_table_header *); extern struct ctl_table_header *sysctl_head_next(struct ctl_table_header *prev); extern struct ctl_table_header *__sysctl_head_next(struct nsproxy *namespaces, struct ctl_table_header *prev); @@ -1073,6 +1078,7 @@ struct ctl_table_header struct ctl_table *ctl_table; struct list_head ctl_entry; int used; + int count; struct completion *unregistering; struct ctl_table *ctl_table_arg; struct ctl_table_root *root; -- cgit v1.1 From bd7b1533cd6a68c734062aa69394bec7e2b1718e Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 15 Jul 2008 16:00:59 -0400 Subject: [PATCH] sysctl: make sure that /proc/sys/net/ipv4 appears before per-ns ones Massage ipv4 initialization - make sure that net.ipv4 appears as non-per-net-namespace before it shows up in per-net-namespace sysctls. That's the only change outside of sysctl.c needed to get sane ordering rules and data structures for sysctls (esp. for procfs side of that mess). Signed-off-by: Al Viro --- include/net/ip.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/net/ip.h b/include/net/ip.h index b5862b9..250e6ef 100644 --- a/include/net/ip.h +++ b/include/net/ip.h @@ -188,6 +188,8 @@ extern int sysctl_ip_dynaddr; extern void ipfrag_init(void); +extern void ip_static_sysctl_init(void); + #ifdef CONFIG_INET #include -- cgit v1.1 From ae7edecc9b8810770a8e5cb9a466ea4bdcfa8401 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 15 Jul 2008 06:33:31 -0400 Subject: [PATCH] sysctl: keep track of tree relationships In a sense, that's the heart of the series. It's based on the following property of the trees we are actually asked to add: they can be split into stem that is already covered by registered trees and crown that is entirely new. IOW, if a/b and a/c/d are introduced by our tree, then a/c is also introduced by it. That allows to associate tree and table entry with each node in the union; while directory nodes might be covered by many trees, only one will cover the node by its crown. And that will allow much saner logics for /proc/sys in the next patches. This patch introduces the data structures needed to keep track of that. When adding a sysctl table, we find a "parent" one. Which is to say, find the deepest node on its stem that already is present in one of the tables from our table set or its ancestor sets. That table will be our parent and that node in it - attachment point. Add our table to list anchored in parent, have it refer the parent and contents of attachment point. Also remember where its crown lives. Signed-off-by: Al Viro --- include/linux/sysctl.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 956264d..3f6599a 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -1083,6 +1083,9 @@ struct ctl_table_header struct ctl_table *ctl_table_arg; struct ctl_table_root *root; struct ctl_table_set *set; + struct ctl_table *attached_by; + struct ctl_table *attached_to; + struct ctl_table_header *parent; }; /* struct ctl_path describes where in the hierarchy a table is added */ -- cgit v1.1 From 9043476f726802f4b00c96d0c4f418dde48d1304 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 15 Jul 2008 08:54:06 -0400 Subject: [PATCH] sanitize proc_sysctl * keep references to ctl_table_head and ctl_table in /proc/sys inodes * grab the former during operations, use the latter for access to entry if that succeeds * have ->d_compare() check if table should be seen for one who does lookup; that allows us to avoid flipping inodes - if we have the same name resolve to different things, we'll just keep several dentries and ->d_compare() will reject the wrong ones. * have ->lookup() and ->readdir() scan the table of our inode first, then walk all ctl_table_header and scan ->attached_by for those that are attached to our directory. * implement ->getattr(). * get rid of insane amounts of tree-walking * get rid of the need to know dentry in ->permission() and of the contortions induced by that. Signed-off-by: Al Viro --- include/linux/proc_fs.h | 5 +++++ include/linux/sysctl.h | 1 + 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h index f560d17..fb61850 100644 --- a/include/linux/proc_fs.h +++ b/include/linux/proc_fs.h @@ -282,11 +282,16 @@ union proc_op { struct task_struct *task); }; +struct ctl_table_header; +struct ctl_table; + struct proc_inode { struct pid *pid; int fd; union proc_op op; struct proc_dir_entry *pde; + struct ctl_table_header *sysctl; + struct ctl_table *sysctl_entry; struct inode vfs_inode; }; diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h index 3f6599a..d0437f3 100644 --- a/include/linux/sysctl.h +++ b/include/linux/sysctl.h @@ -961,6 +961,7 @@ struct ctl_table_header; extern void sysctl_head_get(struct ctl_table_header *); extern void sysctl_head_put(struct ctl_table_header *); +extern int sysctl_is_seen(struct ctl_table_header *); extern struct ctl_table_header *sysctl_head_grab(struct ctl_table_header *); extern struct ctl_table_header *sysctl_head_next(struct ctl_table_header *prev); extern struct ctl_table_header *__sysctl_head_next(struct nsproxy *namespaces, -- cgit v1.1 From e6305c43eda10ebfd2ad9e35d6e172ccc7bb3695 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 15 Jul 2008 21:03:57 -0400 Subject: [PATCH] sanitize ->permission() prototype * kill nameidata * argument; map the 3 bits in ->flags anybody cares about to new MAY_... ones and pass with the mask. * kill redundant gfs2_iop_permission() * sanitize ecryptfs_permission() * fix remaining places where ->permission() instances might barf on new MAY_... found in mask. The obvious next target in that direction is permission(9) folded fix for nfs_permission() breakage from Miklos Szeredi Signed-off-by: Al Viro --- include/linux/coda_linux.h | 2 +- include/linux/fs.h | 5 ++++- include/linux/nfs_fs.h | 2 +- include/linux/reiserfs_xattr.h | 2 +- include/linux/shmem_fs.h | 2 +- 5 files changed, 8 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/coda_linux.h b/include/linux/coda_linux.h index 31b7531..dcc228a 100644 --- a/include/linux/coda_linux.h +++ b/include/linux/coda_linux.h @@ -37,7 +37,7 @@ extern const struct file_operations coda_ioctl_operations; /* operations shared over more than one file */ int coda_open(struct inode *i, struct file *f); int coda_release(struct inode *i, struct file *f); -int coda_permission(struct inode *inode, int mask, struct nameidata *nd); +int coda_permission(struct inode *inode, int mask); int coda_revalidate_inode(struct dentry *); int coda_getattr(struct vfsmount *, struct dentry *, struct kstat *); int coda_setattr(struct dentry *, struct iattr *); diff --git a/include/linux/fs.h b/include/linux/fs.h index 7721a2a..6c923c9 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -60,6 +60,9 @@ extern int dir_notify_enable; #define MAY_WRITE 2 #define MAY_READ 4 #define MAY_APPEND 8 +#define MAY_ACCESS 16 +#define MAY_CHDIR 32 +#define MAY_OPEN 64 #define FMODE_READ 1 #define FMODE_WRITE 2 @@ -1272,7 +1275,7 @@ struct inode_operations { void * (*follow_link) (struct dentry *, struct nameidata *); void (*put_link) (struct dentry *, struct nameidata *, void *); void (*truncate) (struct inode *); - int (*permission) (struct inode *, int, struct nameidata *); + int (*permission) (struct inode *, int); int (*setattr) (struct dentry *, struct iattr *); int (*getattr) (struct vfsmount *mnt, struct dentry *, struct kstat *); int (*setxattr) (struct dentry *, const char *,const void *,size_t,int); diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 29d2619..f08f9ca 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -332,7 +332,7 @@ extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *); extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr); extern int nfs_getattr(struct vfsmount *, struct dentry *, struct kstat *); -extern int nfs_permission(struct inode *, int, struct nameidata *); +extern int nfs_permission(struct inode *, int); extern int nfs_open(struct inode *, struct file *); extern int nfs_release(struct inode *, struct file *); extern int nfs_attribute_timeout(struct inode *inode); diff --git a/include/linux/reiserfs_xattr.h b/include/linux/reiserfs_xattr.h index 66a9681..af135ae 100644 --- a/include/linux/reiserfs_xattr.h +++ b/include/linux/reiserfs_xattr.h @@ -55,7 +55,7 @@ int reiserfs_removexattr(struct dentry *dentry, const char *name); int reiserfs_delete_xattrs(struct inode *inode); int reiserfs_chown_xattrs(struct inode *inode, struct iattr *attrs); int reiserfs_xattr_init(struct super_block *sb, int mount_flags); -int reiserfs_permission(struct inode *inode, int mask, struct nameidata *nd); +int reiserfs_permission(struct inode *inode, int mask); int reiserfs_xattr_del(struct inode *, const char *); int reiserfs_xattr_get(const struct inode *, const char *, void *, size_t); diff --git a/include/linux/shmem_fs.h b/include/linux/shmem_fs.h index f2d12d5..fd83f25 100644 --- a/include/linux/shmem_fs.h +++ b/include/linux/shmem_fs.h @@ -43,7 +43,7 @@ static inline struct shmem_inode_info *SHMEM_I(struct inode *inode) } #ifdef CONFIG_TMPFS_POSIX_ACL -int shmem_permission(struct inode *, int, struct nameidata *); +int shmem_permission(struct inode *, int); int shmem_acl_init(struct inode *, struct inode *); void shmem_acl_destroy_inode(struct inode *); -- cgit v1.1 From 2f1936b87783a3a56c9441b27b9ba7a747f11e8e Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Tue, 24 Jun 2008 16:50:14 +0200 Subject: [patch 3/5] vfs: change remove_suid() to file_remove_suid() All calls to remove_suid() are made with a file pointer, because (similarly to file_update_time) it is called when the file is written. Clean up callers by passing in a file instead of a dentry. Signed-off-by: Miklos Szeredi --- include/linux/fs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 6c923c9..1a3546e 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1834,7 +1834,7 @@ extern void clear_inode(struct inode *); extern void destroy_inode(struct inode *); extern struct inode *new_inode(struct super_block *); extern int should_remove_suid(struct dentry *); -extern int remove_suid(struct dentry *); +extern int file_remove_suid(struct file *); extern void __insert_inode_hash(struct inode *, unsigned long hashval); extern void remove_inode_hash(struct inode *); -- cgit v1.1 From db2e747b14991a4c6a5c98b0e5f552a193237c03 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Tue, 24 Jun 2008 16:50:16 +0200 Subject: [patch 5/5] vfs: remove mode parameter from vfs_symlink() Remove the unused mode parameter from vfs_symlink and callers. Thanks to Tetsuo Handa for noticing. CC: Tetsuo Handa Signed-off-by: Miklos Szeredi --- include/linux/fs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 1a3546e..25998e8 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1139,7 +1139,7 @@ extern int vfs_permission(struct nameidata *, int); extern int vfs_create(struct inode *, struct dentry *, int, struct nameidata *); extern int vfs_mkdir(struct inode *, struct dentry *, int); extern int vfs_mknod(struct inode *, struct dentry *, int, dev_t); -extern int vfs_symlink(struct inode *, struct dentry *, const char *, int); +extern int vfs_symlink(struct inode *, struct dentry *, const char *); extern int vfs_link(struct dentry *, struct inode *, struct dentry *); extern int vfs_rmdir(struct inode *, struct dentry *); extern int vfs_unlink(struct inode *, struct dentry *); -- cgit v1.1 From 8bb79224b87aab92071e94d46e70bd160d89bf34 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Wed, 16 Jul 2008 09:51:03 -0400 Subject: [PATCH] permission checks for chdir need special treatment only on the last step ... so we ought to pass MAY_CHDIR to vfs_permission() instead of having it triggered on every step of preceding pathname resolution. LOOKUP_CHDIR is killed by that. Signed-off-by: Al Viro --- include/linux/namei.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/namei.h b/include/linux/namei.h index 24d88e9..3cf62d2 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -55,7 +55,6 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_OPEN (0x0100) #define LOOKUP_CREATE (0x0200) #define LOOKUP_ACCESS (0x0400) -#define LOOKUP_CHDIR (0x0800) extern int __user_walk(const char __user *, unsigned, struct nameidata *); extern int __user_walk_fd(int dfd, const char __user *, unsigned, struct nameidata *); -- cgit v1.1 From 7f2da1e7d0330395e5e9e350b879b98a1ea495df Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 10 May 2008 20:44:54 -0400 Subject: [PATCH] kill altroot long overdue... Signed-off-by: Al Viro --- include/asm-alpha/namei.h | 17 ----------------- include/asm-arm/namei.h | 25 ------------------------- include/asm-avr32/namei.h | 7 ------- include/asm-blackfin/namei.h | 19 ------------------- include/asm-cris/namei.h | 17 ----------------- include/asm-frv/namei.h | 18 ------------------ include/asm-h8300/namei.h | 17 ----------------- include/asm-ia64/namei.h | 25 ------------------------- include/asm-m32r/namei.h | 17 ----------------- include/asm-m68k/namei.h | 17 ----------------- include/asm-m68knommu/namei.h | 1 - include/asm-mips/namei.h | 11 ----------- include/asm-mn10300/namei.h | 22 ---------------------- include/asm-parisc/namei.h | 17 ----------------- include/asm-powerpc/namei.h | 20 -------------------- include/asm-s390/namei.h | 21 --------------------- include/asm-sh/namei.h | 17 ----------------- include/asm-sparc/namei.h | 8 -------- include/asm-sparc64/namei.h | 1 - include/asm-um/namei.h | 6 ------ include/asm-v850/namei.h | 17 ----------------- include/asm-x86/namei.h | 11 ----------- include/asm-xtensa/namei.h | 26 -------------------------- include/linux/fs_struct.h | 3 +-- include/linux/namei.h | 1 - 25 files changed, 1 insertion(+), 360 deletions(-) delete mode 100644 include/asm-alpha/namei.h delete mode 100644 include/asm-arm/namei.h delete mode 100644 include/asm-avr32/namei.h delete mode 100644 include/asm-blackfin/namei.h delete mode 100644 include/asm-cris/namei.h delete mode 100644 include/asm-frv/namei.h delete mode 100644 include/asm-h8300/namei.h delete mode 100644 include/asm-ia64/namei.h delete mode 100644 include/asm-m32r/namei.h delete mode 100644 include/asm-m68k/namei.h delete mode 100644 include/asm-m68knommu/namei.h delete mode 100644 include/asm-mips/namei.h delete mode 100644 include/asm-mn10300/namei.h delete mode 100644 include/asm-parisc/namei.h delete mode 100644 include/asm-powerpc/namei.h delete mode 100644 include/asm-s390/namei.h delete mode 100644 include/asm-sh/namei.h delete mode 100644 include/asm-sparc/namei.h delete mode 100644 include/asm-sparc64/namei.h delete mode 100644 include/asm-um/namei.h delete mode 100644 include/asm-v850/namei.h delete mode 100644 include/asm-x86/namei.h delete mode 100644 include/asm-xtensa/namei.h (limited to 'include') diff --git a/include/asm-alpha/namei.h b/include/asm-alpha/namei.h deleted file mode 100644 index 5cc9bb3..0000000 --- a/include/asm-alpha/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $ - * linux/include/asm-alpha/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __ALPHA_NAMEI_H -#define __ALPHA_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __ALPHA_NAMEI_H */ diff --git a/include/asm-arm/namei.h b/include/asm-arm/namei.h deleted file mode 100644 index a402d3b..0000000 --- a/include/asm-arm/namei.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * linux/include/asm-arm/namei.h - * - * Routines to handle famous /usr/gnemul - * Derived from the Sparc version of this file - * - * Included from linux/fs/namei.c - */ - -#ifndef __ASMARM_NAMEI_H -#define __ASMARM_NAMEI_H - -#define ARM_BSD_EMUL "usr/gnemul/bsd/" - -static inline char *__emul_prefix(void) -{ - switch (current->personality) { - case PER_BSD: - return ARM_BSD_EMUL; - default: - return NULL; - } -} - -#endif /* __ASMARM_NAMEI_H */ diff --git a/include/asm-avr32/namei.h b/include/asm-avr32/namei.h deleted file mode 100644 index f0a26de..0000000 --- a/include/asm-avr32/namei.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_AVR32_NAMEI_H -#define __ASM_AVR32_NAMEI_H - -/* This dummy routine may be changed to something useful */ -#define __emul_prefix() NULL - -#endif /* __ASM_AVR32_NAMEI_H */ diff --git a/include/asm-blackfin/namei.h b/include/asm-blackfin/namei.h deleted file mode 100644 index 8b89a2d..0000000 --- a/include/asm-blackfin/namei.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm/namei.h - * - * Included from linux/fs/namei.c - * - * Changes made by Lineo Inc. May 2001 - */ - -#ifndef __BFIN_NAMEI_H -#define __BFIN_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif diff --git a/include/asm-cris/namei.h b/include/asm-cris/namei.h deleted file mode 100644 index 8a3be7a..0000000 --- a/include/asm-cris/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* $Id: namei.h,v 1.1 2000/07/10 16:32:31 bjornw Exp $ - * linux/include/asm-cris/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __CRIS_NAMEI_H -#define __CRIS_NAMEI_H - -/* used to find file-system prefixes for doing emulations - * see for example asm-sparc/namei.h - * we don't use it... - */ - -#define __emul_prefix() NULL - -#endif /* __CRIS_NAMEI_H */ diff --git a/include/asm-frv/namei.h b/include/asm-frv/namei.h deleted file mode 100644 index 4ea5717..0000000 --- a/include/asm-frv/namei.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * include/asm-frv/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __ASM_NAMEI_H -#define __ASM_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif - diff --git a/include/asm-h8300/namei.h b/include/asm-h8300/namei.h deleted file mode 100644 index ab6f196..0000000 --- a/include/asm-h8300/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * linux/include/asm-h8300/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __H8300_NAMEI_H -#define __H8300_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif diff --git a/include/asm-ia64/namei.h b/include/asm-ia64/namei.h deleted file mode 100644 index 78e7680..0000000 --- a/include/asm-ia64/namei.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_IA64_NAMEI_H -#define _ASM_IA64_NAMEI_H - -/* - * Modified 1998, 1999, 2001 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include -#include - -#define EMUL_PREFIX_LINUX_IA32 "/emul/ia32-linux/" - -static inline char * -__emul_prefix (void) -{ - switch (current->personality) { - case PER_LINUX32: - return EMUL_PREFIX_LINUX_IA32; - default: - return NULL; - } -} - -#endif /* _ASM_IA64_NAMEI_H */ diff --git a/include/asm-m32r/namei.h b/include/asm-m32r/namei.h deleted file mode 100644 index 210f805..0000000 --- a/include/asm-m32r/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _ASM_M32R_NAMEI_H -#define _ASM_M32R_NAMEI_H - -/* - * linux/include/asm-m32r/namei.h - * - * Included from linux/fs/namei.c - */ - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* _ASM_M32R_NAMEI_H */ diff --git a/include/asm-m68k/namei.h b/include/asm-m68k/namei.h deleted file mode 100644 index f33f243..0000000 --- a/include/asm-m68k/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * linux/include/asm-m68k/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __M68K_NAMEI_H -#define __M68K_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif diff --git a/include/asm-m68knommu/namei.h b/include/asm-m68knommu/namei.h deleted file mode 100644 index 31a85d2..0000000 --- a/include/asm-m68knommu/namei.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-mips/namei.h b/include/asm-mips/namei.h deleted file mode 100644 index a6605a7..0000000 --- a/include/asm-mips/namei.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_NAMEI_H -#define _ASM_NAMEI_H - -/* - * This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - */ - -#define __emul_prefix() NULL - -#endif /* _ASM_NAMEI_H */ diff --git a/include/asm-mn10300/namei.h b/include/asm-mn10300/namei.h deleted file mode 100644 index bd9ce94..0000000 --- a/include/asm-mn10300/namei.h +++ /dev/null @@ -1,22 +0,0 @@ -/* Emulation stuff - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ - -#ifndef _ASM_NAMEI_H -#define _ASM_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* _ASM_NAMEI_H */ diff --git a/include/asm-parisc/namei.h b/include/asm-parisc/namei.h deleted file mode 100644 index 8d29b3d..0000000 --- a/include/asm-parisc/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $ - * linux/include/asm-parisc/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __PARISC_NAMEI_H -#define __PARISC_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __PARISC_NAMEI_H */ diff --git a/include/asm-powerpc/namei.h b/include/asm-powerpc/namei.h deleted file mode 100644 index 6574434..0000000 --- a/include/asm-powerpc/namei.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_POWERPC_NAMEI_H -#define _ASM_POWERPC_NAMEI_H - -#ifdef __KERNEL__ - -/* - * Adapted from include/asm-alpha/namei.h - * - * Included from fs/namei.c - */ - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_NAMEI_H */ diff --git a/include/asm-s390/namei.h b/include/asm-s390/namei.h deleted file mode 100644 index 3e286bd..0000000 --- a/include/asm-s390/namei.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-s390/namei.h - * - * S390 version - * - * Derived from "include/asm-i386/namei.h" - * - * Included from linux/fs/namei.c - */ - -#ifndef __S390_NAMEI_H -#define __S390_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __S390_NAMEI_H */ diff --git a/include/asm-sh/namei.h b/include/asm-sh/namei.h deleted file mode 100644 index 338a5d9..0000000 --- a/include/asm-sh/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* $Id: namei.h,v 1.3 2000/07/04 06:24:49 gniibe Exp $ - * linux/include/asm-sh/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __ASM_SH_NAMEI_H -#define __ASM_SH_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __ASM_SH_NAMEI_H */ diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h deleted file mode 100644 index eff944b..0000000 --- a/include/asm-sparc/namei.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_NAMEI_H -#define ___ASM_SPARC_NAMEI_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc64/namei.h b/include/asm-sparc64/namei.h deleted file mode 100644 index 1344a91..0000000 --- a/include/asm-sparc64/namei.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-um/namei.h b/include/asm-um/namei.h deleted file mode 100644 index 002984d..0000000 --- a/include/asm-um/namei.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_NAMEI_H -#define __UM_NAMEI_H - -#include "asm/arch/namei.h" - -#endif diff --git a/include/asm-v850/namei.h b/include/asm-v850/namei.h deleted file mode 100644 index ee8339b..0000000 --- a/include/asm-v850/namei.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * linux/include/asm-v850/namei.h - * - * Included from linux/fs/namei.c - */ - -#ifndef __V850_NAMEI_H__ -#define __V850_NAMEI_H__ - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __V850_NAMEI_H__ */ diff --git a/include/asm-x86/namei.h b/include/asm-x86/namei.h deleted file mode 100644 index 415ef5d..0000000 --- a/include/asm-x86/namei.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_X86_NAMEI_H -#define _ASM_X86_NAMEI_H - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* _ASM_X86_NAMEI_H */ diff --git a/include/asm-xtensa/namei.h b/include/asm-xtensa/namei.h deleted file mode 100644 index 3fdff03..0000000 --- a/include/asm-xtensa/namei.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-xtensa/namei.h - * - * Included from linux/fs/namei.c - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2001 - 2005 Tensilica Inc. - */ - -#ifndef _XTENSA_NAMEI_H -#define _XTENSA_NAMEI_H - -#ifdef __KERNEL__ - -/* This dummy routine maybe changed to something useful - * for /usr/gnemul/ emulation stuff. - * Look at asm-sparc/namei.h for details. - */ - -#define __emul_prefix() NULL - -#endif /* __KERNEL__ */ -#endif /* _XTENSA_NAMEI_H */ diff --git a/include/linux/fs_struct.h b/include/linux/fs_struct.h index 282f542..9e5a06e 100644 --- a/include/linux/fs_struct.h +++ b/include/linux/fs_struct.h @@ -7,7 +7,7 @@ struct fs_struct { atomic_t count; rwlock_t lock; int umask; - struct path root, pwd, altroot; + struct path root, pwd; }; #define INIT_FS { \ @@ -19,7 +19,6 @@ struct fs_struct { extern struct kmem_cache *fs_cachep; extern void exit_fs(struct task_struct *); -extern void set_fs_altroot(void); extern void set_fs_root(struct fs_struct *, struct path *); extern void set_fs_pwd(struct fs_struct *, struct path *); extern struct fs_struct *copy_fs_struct(struct fs_struct *); diff --git a/include/linux/namei.h b/include/linux/namei.h index 3cf62d2..768773d 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -47,7 +47,6 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_DIRECTORY 2 #define LOOKUP_CONTINUE 4 #define LOOKUP_PARENT 16 -#define LOOKUP_NOALT 32 #define LOOKUP_REVAL 64 /* * Intent data -- cgit v1.1 From a110343f0d6d41f68b7cf8c00b57a3172c67f816 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Thu, 17 Jul 2008 09:19:08 -0400 Subject: [PATCH] fix MAY_CHDIR/MAY_ACCESS/LOOKUP_ACCESS mess * MAY_CHDIR is redundant - it's an equivalent of MAY_ACCESS * MAY_ACCESS on fuse should affect only the last step of pathname resolution * fchdir() and chroot() should pass MAY_ACCESS, for the same reason why chdir() needs that. * now that we pass MAY_ACCESS explicitly in all cases, LOOKUP_ACCESS can be removed; it has no business being in nameidata. Signed-off-by: Al Viro --- include/linux/fs.h | 3 +-- include/linux/namei.h | 1 - 2 files changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 25998e8..d8721e8 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -61,8 +61,7 @@ extern int dir_notify_enable; #define MAY_READ 4 #define MAY_APPEND 8 #define MAY_ACCESS 16 -#define MAY_CHDIR 32 -#define MAY_OPEN 64 +#define MAY_OPEN 32 #define FMODE_READ 1 #define FMODE_WRITE 2 diff --git a/include/linux/namei.h b/include/linux/namei.h index 768773d..60e35a0 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -53,7 +53,6 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; */ #define LOOKUP_OPEN (0x0100) #define LOOKUP_CREATE (0x0200) -#define LOOKUP_ACCESS (0x0400) extern int __user_walk(const char __user *, unsigned, struct nameidata *); extern int __user_walk_fd(int dfd, const char __user *, unsigned, struct nameidata *); -- cgit v1.1 From b77b0646ef4efe31a7449bb3d9360fd00f95433d Mon Sep 17 00:00:00 2001 From: Al Viro Date: Thu, 17 Jul 2008 09:37:02 -0400 Subject: [PATCH] pass MAY_OPEN to vfs_permission() explicitly ... and get rid of the last "let's deduce mask from nameidata->flags" bit. Signed-off-by: Al Viro --- include/linux/security.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/security.h b/include/linux/security.h index f0e9adb..fd96e7f 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -1362,7 +1362,7 @@ struct security_operations { struct inode *new_dir, struct dentry *new_dentry); int (*inode_readlink) (struct dentry *dentry); int (*inode_follow_link) (struct dentry *dentry, struct nameidata *nd); - int (*inode_permission) (struct inode *inode, int mask, struct nameidata *nd); + int (*inode_permission) (struct inode *inode, int mask); int (*inode_setattr) (struct dentry *dentry, struct iattr *attr); int (*inode_getattr) (struct vfsmount *mnt, struct dentry *dentry); void (*inode_delete) (struct inode *inode); @@ -1628,7 +1628,7 @@ int security_inode_rename(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry); int security_inode_readlink(struct dentry *dentry); int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd); -int security_inode_permission(struct inode *inode, int mask, struct nameidata *nd); +int security_inode_permission(struct inode *inode, int mask); int security_inode_setattr(struct dentry *dentry, struct iattr *attr); int security_inode_getattr(struct vfsmount *mnt, struct dentry *dentry); void security_inode_delete(struct inode *inode); @@ -2021,8 +2021,7 @@ static inline int security_inode_follow_link(struct dentry *dentry, return 0; } -static inline int security_inode_permission(struct inode *inode, int mask, - struct nameidata *nd) +static inline int security_inode_permission(struct inode *inode, int mask) { return 0; } -- cgit v1.1 From 88b387824fdaecb6ba0f471acf0aadf7d24739fd Mon Sep 17 00:00:00 2001 From: Li Zefan Date: Mon, 21 Jul 2008 18:06:36 +0800 Subject: [PATCH] vfs: use kstrdup() and check failing allocation - use kstrdup() instead of kmalloc() + memcpy() - return NULL if allocating ->mnt_devname failed - mnt_devname should be const Signed-off-by: Li Zefan Acked-by: Cyrill Gorcunov Signed-off-by: Al Viro --- include/linux/mount.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mount.h b/include/linux/mount.h index 4374d1a..b5efaa2 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -47,7 +47,7 @@ struct vfsmount { struct list_head mnt_child; /* and going through their mnt_child */ int mnt_flags; /* 4 bytes hole on 64bits arches */ - char *mnt_devname; /* Name of device e.g. /dev/dsk/hda1 */ + const char *mnt_devname; /* Name of device e.g. /dev/dsk/hda1 */ struct list_head mnt_list; struct list_head mnt_expire; /* link in fs-specific expiry list */ struct list_head mnt_share; /* circular list of shared mounts */ -- cgit v1.1 From 9767d74957450da6365c363d69e3d02d605d7375 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Tue, 1 Jul 2008 15:01:26 +0200 Subject: [patch 1/4] vfs: utimes: move owner check into inode_change_ok() Add a new ia_valid flag: ATTR_TIMES_SET, to handle the UTIMES_OMIT/UTIMES_NOW and UTIMES_NOW/UTIMES_OMIT cases. In these cases neither ATTR_MTIME_SET nor ATTR_ATIME_SET is in the flags, yet the POSIX draft specifies that permission checking is performed the same way as if one or both of the times was explicitly set to a timestamp. See the path "vfs: utimensat(): fix error checking for {UTIME_NOW,UTIME_OMIT} case" by Michael Kerrisk for the patch introducing this behavior. This is a cleanup, as well as allowing filesystems (NFS/fuse/...) to perform their own permission checking instead of the default. CC: Ulrich Drepper CC: Michael Kerrisk Signed-off-by: Miklos Szeredi Signed-off-by: Al Viro --- include/linux/fs.h | 33 +++++++++++++++++---------------- 1 file changed, 17 insertions(+), 16 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index d8721e8..527b9e4 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -320,22 +320,23 @@ typedef void (dio_iodone_t)(struct kiocb *iocb, loff_t offset, * Attribute flags. These should be or-ed together to figure out what * has been changed! */ -#define ATTR_MODE 1 -#define ATTR_UID 2 -#define ATTR_GID 4 -#define ATTR_SIZE 8 -#define ATTR_ATIME 16 -#define ATTR_MTIME 32 -#define ATTR_CTIME 64 -#define ATTR_ATIME_SET 128 -#define ATTR_MTIME_SET 256 -#define ATTR_FORCE 512 /* Not a change, but a change it */ -#define ATTR_ATTR_FLAG 1024 -#define ATTR_KILL_SUID 2048 -#define ATTR_KILL_SGID 4096 -#define ATTR_FILE 8192 -#define ATTR_KILL_PRIV 16384 -#define ATTR_OPEN 32768 /* Truncating from open(O_TRUNC) */ +#define ATTR_MODE (1 << 0) +#define ATTR_UID (1 << 1) +#define ATTR_GID (1 << 2) +#define ATTR_SIZE (1 << 3) +#define ATTR_ATIME (1 << 4) +#define ATTR_MTIME (1 << 5) +#define ATTR_CTIME (1 << 6) +#define ATTR_ATIME_SET (1 << 7) +#define ATTR_MTIME_SET (1 << 8) +#define ATTR_FORCE (1 << 9) /* Not a change, but a change it */ +#define ATTR_ATTR_FLAG (1 << 10) +#define ATTR_KILL_SUID (1 << 11) +#define ATTR_KILL_SGID (1 << 12) +#define ATTR_FILE (1 << 13) +#define ATTR_KILL_PRIV (1 << 14) +#define ATTR_OPEN (1 << 15) /* Truncating from open(O_TRUNC) */ +#define ATTR_TIMES_SET (1 << 16) /* * This is the Inode Attributes structure, used for notify_change(). It -- cgit v1.1 From f419a2e3b64def707e1384ee38abb77f99af5f6d Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 22 Jul 2008 00:07:17 -0400 Subject: [PATCH] kill nameidata passing to permission(), rename to inode_permission() Incidentally, the name that gives hundreds of false positives on grep is not a good idea... Signed-off-by: Al Viro --- include/linux/fs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 527b9e4..9d2de4c 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1770,7 +1770,7 @@ extern int do_remount_sb(struct super_block *sb, int flags, extern sector_t bmap(struct inode *, sector_t); #endif extern int notify_change(struct dentry *, struct iattr *); -extern int permission(struct inode *, int, struct nameidata *); +extern int inode_permission(struct inode *, int); extern int generic_permission(struct inode *, int, int (*check_acl)(struct inode *, int)); -- cgit v1.1 From 2d8f30380ab8c706f4e0a8f1aaa22b5886e9ac8a Mon Sep 17 00:00:00 2001 From: Al Viro Date: Tue, 22 Jul 2008 09:59:21 -0400 Subject: [PATCH] sanitize __user_walk_fd() et.al. * do not pass nameidata; struct path is all the callers want. * switch to new helpers: user_path_at(dfd, pathname, flags, &path) user_path(pathname, &path) user_lpath(pathname, &path) user_path_dir(pathname, &path) (fail if not a directory) The last 3 are trivial macro wrappers for the first one. * remove nameidata in callers. Signed-off-by: Al Viro --- include/linux/namei.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/namei.h b/include/linux/namei.h index 60e35a0..00888ff 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -54,12 +54,13 @@ enum {LAST_NORM, LAST_ROOT, LAST_DOT, LAST_DOTDOT, LAST_BIND}; #define LOOKUP_OPEN (0x0100) #define LOOKUP_CREATE (0x0200) -extern int __user_walk(const char __user *, unsigned, struct nameidata *); -extern int __user_walk_fd(int dfd, const char __user *, unsigned, struct nameidata *); -#define user_path_walk(name,nd) \ - __user_walk_fd(AT_FDCWD, name, LOOKUP_FOLLOW, nd) -#define user_path_walk_link(name,nd) \ - __user_walk_fd(AT_FDCWD, name, 0, nd) +extern int user_path_at(int, const char __user *, unsigned, struct path *); + +#define user_path(name, path) user_path_at(AT_FDCWD, name, LOOKUP_FOLLOW, path) +#define user_lpath(name, path) user_path_at(AT_FDCWD, name, 0, path) +#define user_path_dir(name, path) \ + user_path_at(AT_FDCWD, name, LOOKUP_FOLLOW | LOOKUP_DIRECTORY, path) + extern int path_lookup(const char *, unsigned, struct nameidata *); extern int vfs_path_lookup(struct dentry *, struct vfsmount *, const char *, unsigned int, struct nameidata *); -- cgit v1.1 From 516e0cc5646f377ab80fcc2ee639892eccb99853 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 26 Jul 2008 00:39:17 -0400 Subject: [PATCH] f_count may wrap around make it atomic_long_t; while we are at it, get rid of useless checks in affs, hfs and hpfs - ->open() always has it equal to 1, ->release() - to 0. Signed-off-by: Al Viro --- include/linux/fs.h | 6 +++--- include/net/af_unix.h | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 9d2de4c..7676fa1 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -795,7 +795,7 @@ struct file { #define f_dentry f_path.dentry #define f_vfsmnt f_path.mnt const struct file_operations *f_op; - atomic_t f_count; + atomic_long_t f_count; unsigned int f_flags; mode_t f_mode; loff_t f_pos; @@ -824,8 +824,8 @@ extern spinlock_t files_lock; #define file_list_lock() spin_lock(&files_lock); #define file_list_unlock() spin_unlock(&files_lock); -#define get_file(x) atomic_inc(&(x)->f_count) -#define file_count(x) atomic_read(&(x)->f_count) +#define get_file(x) atomic_long_inc(&(x)->f_count) +#define file_count(x) atomic_long_read(&(x)->f_count) #ifdef CONFIG_DEBUG_WRITECOUNT static inline void file_take_write(struct file *f) diff --git a/include/net/af_unix.h b/include/net/af_unix.h index 2dfa96b..7dd29b7 100644 --- a/include/net/af_unix.h +++ b/include/net/af_unix.h @@ -51,7 +51,7 @@ struct unix_sock { struct sock *peer; struct sock *other; struct list_head link; - atomic_t inflight; + atomic_long_t inflight; spinlock_t lock; unsigned int gc_candidate : 1; wait_queue_head_t peer_wait; -- cgit v1.1 From 964bd183624c03680796b63b4ab97ee3905a806a Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 26 Jul 2008 03:33:14 -0400 Subject: [PATCH] get rid of __user_path_lookup_open Signed-off-by: Al Viro --- include/linux/namei.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/namei.h b/include/linux/namei.h index 00888ff..68f8c32 100644 --- a/include/linux/namei.h +++ b/include/linux/namei.h @@ -65,7 +65,6 @@ extern int path_lookup(const char *, unsigned, struct nameidata *); extern int vfs_path_lookup(struct dentry *, struct vfsmount *, const char *, unsigned int, struct nameidata *); -extern int __user_path_lookup_open(const char __user *, unsigned lookup_flags, struct nameidata *nd, int open_flags); extern int path_lookup_open(int dfd, const char *name, unsigned lookup_flags, struct nameidata *, int open_flags); extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry, int (*open)(struct inode *, struct file *)); -- cgit v1.1 From 3f8206d496e9e9495afb1d4e70d29712b4d403c9 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 26 Jul 2008 03:46:43 -0400 Subject: [PATCH] get rid of indirect users of namei.h fs.h needs path.h, not namei.h; nfs_fs.h doesn't need it at all. Several places in the tree needed direct include. Signed-off-by: Al Viro --- include/linux/fs.h | 2 +- include/linux/nfs_fs.h | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 7676fa1..8252b04 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -279,7 +279,7 @@ extern int dir_notify_enable; #include #include #include -#include +#include #include #include #include diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index f08f9ca..78a5922 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -42,7 +42,6 @@ #include #include #include -#include #include #include #include -- cgit v1.1 From 4cc38a1b383f0c6c65a3fef4ff8144e8000e4ec3 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sat, 26 Jul 2008 03:48:26 -0400 Subject: [PATCH] remove remaining namei_{32,64}.h crap Signed-off-by: Al Viro --- include/asm-sparc/namei_32.h | 13 ------------- include/asm-sparc/namei_64.h | 13 ------------- 2 files changed, 26 deletions(-) delete mode 100644 include/asm-sparc/namei_32.h delete mode 100644 include/asm-sparc/namei_64.h (limited to 'include') diff --git a/include/asm-sparc/namei_32.h b/include/asm-sparc/namei_32.h deleted file mode 100644 index 0646102..0000000 --- a/include/asm-sparc/namei_32.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-sparc/namei.h - * - * Routines to handle famous /usr/gnemul/s*. - * Included from linux/fs/namei.c - */ - -#ifndef __SPARC_NAMEI_H -#define __SPARC_NAMEI_H - -#define __emul_prefix() NULL - -#endif /* __SPARC_NAMEI_H */ diff --git a/include/asm-sparc/namei_64.h b/include/asm-sparc/namei_64.h deleted file mode 100644 index cbc1b4c..0000000 --- a/include/asm-sparc/namei_64.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-sparc64/namei.h - * - * Routines to handle famous /usr/gnemul/s*. - * Included from linux/fs/namei.c - */ - -#ifndef __SPARC64_NAMEI_H -#define __SPARC64_NAMEI_H - -#define __emul_prefix() NULL - -#endif /* __SPARC64_NAMEI_H */ -- cgit v1.1 From 6a9436d0c3cbe8941b1acd5b0736d355295cad98 Mon Sep 17 00:00:00 2001 From: Michael Buesch Date: Sat, 26 Jul 2008 15:22:26 -0700 Subject: gpiolib: fix typo in comment This fixes an off-by-one error in a comment. Signed-off-by: Michael Buesch Cc: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index a3034d2..c764a8f 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -13,7 +13,7 @@ * * While the GPIO programming interface defines valid GPIO numbers * to be in the range 0..MAX_INT, this library restricts them to the - * smaller range 0..ARCH_NR_GPIOS. + * smaller range 0..ARCH_NR_GPIOS-1. */ #ifndef ARCH_NR_GPIOS -- cgit v1.1 From 510a35d4a47802f4a0028aa6bd2ca2170da5e32f Mon Sep 17 00:00:00 2001 From: Andrea Righi Date: Sat, 26 Jul 2008 15:22:27 -0700 Subject: hugetlb: remove unused variable warning Remove the following warning when CONFIG_HUGETLB_PAGE is not set: ipc/shm.c: In function `shm_get_stat': ipc/shm.c:565: warning: unused variable `h' [akpm@linux-foundation.org: use tabs, not spaces] Signed-off-by: Andrea Righi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/hugetlb.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h index 9a71d4c..32e0ef0 100644 --- a/include/linux/hugetlb.h +++ b/include/linux/hugetlb.h @@ -273,7 +273,10 @@ struct hstate {}; #define huge_page_mask(h) PAGE_MASK #define huge_page_order(h) 0 #define huge_page_shift(h) PAGE_SHIFT -#define pages_per_huge_page(h) 1 +static inline unsigned int pages_per_huge_page(struct hstate *h) +{ + return 1; +} #endif #endif /* _LINUX_HUGETLB_H */ -- cgit v1.1 From 5f4cb662a0a2533b45656607471571460310a5ca Mon Sep 17 00:00:00 2001 From: Joerg Roedel Date: Mon, 14 Jul 2008 20:36:36 +0200 Subject: KVM: SVM: allow enabling/disabling NPT by reloading only the architecture module If NPT is enabled after loading both KVM modules on AMD and it should be disabled, both KVM modules must be reloaded. If only the architecture module is reloaded the behavior is undefined. With this patch it is possible to disable NPT only by reloading the kvm_amd module. Signed-off-by: Joerg Roedel Signed-off-by: Avi Kivity --- include/asm-x86/kvm_host.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h index fdde0be..bc34dc2 100644 --- a/include/asm-x86/kvm_host.h +++ b/include/asm-x86/kvm_host.h @@ -556,6 +556,7 @@ int kvm_fix_hypercall(struct kvm_vcpu *vcpu); int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); void kvm_enable_tdp(void); +void kvm_disable_tdp(void); int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); int complete_pio(struct kvm_vcpu *vcpu); -- cgit v1.1 From 0096369daa9eaaef1a309e5d8167b023af3f998d Mon Sep 17 00:00:00 2001 From: Martin Schwidefsky Date: Fri, 25 Jul 2008 15:51:00 +0200 Subject: KVM: s390: Change guestaddr type in gaccess All registers are unsigned long types. This patch changes all occurences of guestaddr in gaccess from u64 to unsigned long. Signed-off-by: Martin Schwidefsky Signed-off-by: Christian Borntraeger Signed-off-by: Avi Kivity --- include/asm-s390/kvm_host.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h index 3234dd5..6583c0d 100644 --- a/include/asm-s390/kvm_host.h +++ b/include/asm-s390/kvm_host.h @@ -231,5 +231,5 @@ struct kvm_arch{ struct kvm_s390_float_interrupt float_int; }; -extern int sie64a(struct kvm_s390_sie_block *, __u64 *); +extern int sie64a(struct kvm_s390_sie_block *, unsigned long *); #endif -- cgit v1.1 From f5e10b09a5f8fc40666c95fe0cd6bcc2b8f11437 Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Fri, 25 Jul 2008 15:52:44 +0200 Subject: KVM: s390: Fix instruction naming for lctlg Lets fix the name for the lctlg instruction... Signed-off-by: Christian Borntraeger Signed-off-by: Avi Kivity --- include/asm-s390/kvm_host.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h index 6583c0d..3c55e41 100644 --- a/include/asm-s390/kvm_host.h +++ b/include/asm-s390/kvm_host.h @@ -111,7 +111,7 @@ struct kvm_vcpu_stat { u32 exit_validity; u32 exit_instruction; u32 instruction_lctl; - u32 instruction_lctg; + u32 instruction_lctlg; u32 exit_program_interruption; u32 exit_instr_and_program; u32 deliver_emergency_signal; -- cgit v1.1 From 6cab48602996cdbcb277375a8107d53e21e8c9b9 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Sun, 27 Jul 2008 04:23:31 +0100 Subject: [ARM] 5179/1: Replace obsolete IRQT_* and __IRQT_* values with IRQ_TYPE_* IRQT_* and __IRQT_* were obsoleted long ago by patch [3692/1]. Remove them completely. Sed script for the reference: s/__IRQT_RISEDGE/IRQ_TYPE_EDGE_RISING/g s/__IRQT_FALEDGE/IRQ_TYPE_EDGE_FALLING/g s/__IRQT_LOWLVL/IRQ_TYPE_LEVEL_LOW/g s/__IRQT_HIGHLVL/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_RISING/IRQ_TYPE_EDGE_RISING/g s/IRQT_FALLING/IRQ_TYPE_EDGE_FALLING/g s/IRQT_BOTHEDGE/IRQ_TYPE_EDGE_BOTH/g s/IRQT_LOW/IRQ_TYPE_LEVEL_LOW/g s/IRQT_HIGH/IRQ_TYPE_LEVEL_HIGH/g s/IRQT_PROBE/IRQ_TYPE_PROBE/g s/IRQT_NOEDGE/IRQ_TYPE_NONE/g Signed-off-by: Dmitry Baryshkov Signed-off-by: Russell King --- include/asm-arm/arch-pnx4008/irqs.h | 48 ++++++++++++++--------------- include/asm-arm/arch-pxa/idp.h | 10 +++--- include/asm-arm/arch-pxa/pcm990_baseboard.h | 14 ++++----- include/asm-arm/arch-sa1100/ide.h | 2 +- include/asm-arm/irq.h | 17 ---------- 5 files changed, 37 insertions(+), 54 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h index 13ec7ed..a25d18f 100644 --- a/include/asm-arm/arch-pnx4008/irqs.h +++ b/include/asm-arm/arch-pnx4008/irqs.h @@ -135,30 +135,30 @@ #define PNX4008_IRQ_TYPES \ { /*IRQ #'s: */ \ -IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \ -IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \ -IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \ -IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \ -IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \ +IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \ +IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \ +IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \ +IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \ } /* Start Enable Pin Interrupts - table 58 page 66 */ diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h index b695253..21aa8ac 100644 --- a/include/asm-arm/arch-pxa/idp.h +++ b/include/asm-arm/arch-pxa/idp.h @@ -138,18 +138,18 @@ #define TOUCH_PANEL_IRQ IRQ_GPIO(5) #define IDE_IRQ IRQ_GPIO(21) -#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING +#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING #define ETHERNET_IRQ IRQ_GPIO(4) -#define ETHERNET_IRQ_EDGE IRQT_RISING +#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define IDE_IRQ_EDGE IRQT_RISING +#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCMCIA_S0_CD_VALID IRQ_GPIO(7) -#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE +#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH #define PCMCIA_S1_CD_VALID IRQ_GPIO(8) -#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE +#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH #define PCMCIA_S0_RDYINT IRQ_GPIO(19) #define PCMCIA_S1_RDYINT IRQ_GPIO(22) diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h index b699d0d..2e20131 100644 --- a/include/asm-arm/arch-pxa/pcm990_baseboard.h +++ b/include/asm-arm/arch-pxa/pcm990_baseboard.h @@ -29,14 +29,14 @@ /* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ #define PCM990_CTRL_INT_IRQ_GPIO 9 #define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) -#define PCM990_CTRL_INT_IRQ_EDGE IRQT_RISING +#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ #define PCM990_CTRL_BASE 0xea000000 #define PCM990_CTRL_SIZE (1*1024*1024) #define PCM990_CTRL_PWR_IRQ_GPIO 14 #define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) -#define PCM990_CTRL_PWR_IRQ_EDGE IRQT_RISING +#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING /* visible CPLD (U7) registers */ #define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ @@ -133,7 +133,7 @@ */ #define PCM990_IDE_IRQ_GPIO 13 #define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) -#define PCM990_IDE_IRQ_EDGE IRQT_RISING +#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ #define PCM990_IDE_PLD_BASE 0xee000000 #define PCM990_IDE_PLD_SIZE (1*1024*1024) @@ -189,11 +189,11 @@ */ #define PCM990_CF_IRQ_GPIO 11 #define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) -#define PCM990_CF_IRQ_EDGE IRQT_RISING +#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CF_CD_GPIO 12 #define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) -#define PCM990_CF_CD_EDGE IRQT_RISING +#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING #define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ #define PCM990_CF_PLD_BASE 0xef000000 @@ -259,14 +259,14 @@ */ #define PCM990_AC97_IRQ_GPIO 10 #define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) -#define PCM990_AC97_IRQ_EDGE IRQT_RISING +#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING /* * MMC phyCORE */ #define PCM990_MMC0_IRQ_GPIO 9 #define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) -#define PCM990_MMC0_IRQ_EDGE IRQT_FALLING +#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING /* * USB phyCore diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index b14cbda..193f6c1 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -61,7 +61,7 @@ ide_init_default_hwifs(void) /* Enable GPIO as interrupt line */ GPDR &= ~LART_GPIO_IDE; - set_irq_type(LART_IRQ_IDE, IRQT_RISING); + set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING); /* set PCMCIA interface timing */ MECR = 0x00060006; diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 1b882a2..9cb0190 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -19,23 +19,6 @@ #define NO_IRQ ((unsigned int)(-1)) #endif - -/* - * Migration helpers - */ -#define __IRQT_FALEDGE IRQ_TYPE_EDGE_FALLING -#define __IRQT_RISEDGE IRQ_TYPE_EDGE_RISING -#define __IRQT_LOWLVL IRQ_TYPE_LEVEL_LOW -#define __IRQT_HIGHLVL IRQ_TYPE_LEVEL_HIGH - -#define IRQT_NOEDGE (0) -#define IRQT_RISING (__IRQT_RISEDGE) -#define IRQT_FALLING (__IRQT_FALEDGE) -#define IRQT_BOTHEDGE (__IRQT_RISEDGE|__IRQT_FALEDGE) -#define IRQT_LOW (__IRQT_LOWLVL) -#define IRQT_HIGH (__IRQT_HIGHLVL) -#define IRQT_PROBE IRQ_TYPE_PROBE - #ifndef __ASSEMBLY__ struct irqaction; extern void migrate_irqs(void); -- cgit v1.1 From cc04454fa81e93b5f1b5133950331639d2f59f85 Mon Sep 17 00:00:00 2001 From: Hollis Blanchard Date: Fri, 25 Jul 2008 13:54:50 -0500 Subject: KVM: ppc: fix invalidation of large guest pages When guest invalidates a large tlb map, there may be more than one corresponding shadow tlb maps that need to be invalidated. Use eaddr and eend to find these shadow tlb maps. Signed-off-by: Liu Yu Signed-off-by: Hollis Blanchard Signed-off-by: Avi Kivity --- include/asm-powerpc/kvm_ppc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/kvm_ppc.h b/include/asm-powerpc/kvm_ppc.h index 5a21115..a8b0687 100644 --- a/include/asm-powerpc/kvm_ppc.h +++ b/include/asm-powerpc/kvm_ppc.h @@ -61,7 +61,8 @@ extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu); extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, u64 asid, u32 flags); -extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, u64 eaddr, u64 asid); +extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr, + gva_t eend, u32 asid); extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu); -- cgit v1.1 From daf93dd55c48b65ab2f1907e0fc5ef994896c787 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 27 Jul 2008 10:10:58 +0100 Subject: [ARM] fix VIPT/VIVT macro optimisations, add comments cacheflush.h was doing: ... VIVT only stuff ... VIPT only stuff ... VIVT or VIPT stuff which is clearly bogus - we would only ever use the "VIVT or VIPT" case when both VIVT and VIPT are not selected. Fix this. Add comments to each case, including noting the impossibility of correctly detecting the cache type of ARM926 and ARMv6 cores from the cache type register in the "VIVT or VIPT" case. Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 03cf1ee..e68a1cb 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -459,15 +459,19 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, #define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0) #if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) - +/* + * VIVT caches only + */ #define cache_is_vivt() 1 #define cache_is_vipt() 0 #define cache_is_vipt_nonaliasing() 0 #define cache_is_vipt_aliasing() 0 #define icache_is_vivt_asid_tagged() 0 -#elif defined(CONFIG_CPU_CACHE_VIPT) - +#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT) +/* + * VIPT caches only + */ #define cache_is_vivt() 0 #define cache_is_vipt() 1 #define cache_is_vipt_nonaliasing() \ @@ -489,7 +493,12 @@ static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, }) #else - +/* + * VIVT or VIPT caches. Note that this is unreliable since ARM926 + * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test. + * There's no way to tell from the CacheType register what type (!) + * the cache is. + */ #define cache_is_vivt() \ ({ \ unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ -- cgit v1.1 From 9993e51c0c47ec69dce1f26c2321af6bb9165e9e Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sat, 26 Jul 2008 13:53:46 -0300 Subject: V4L/DVB (8502): videodev2.h: CodingStyle cleanups Signed-off-by: Mauro Carvalho Chehab --- include/linux/videodev2.h | 378 ++++++++++++++++++++-------------------------- 1 file changed, 166 insertions(+), 212 deletions(-) (limited to 'include') diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index 2e66a95..cc0c895 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -91,8 +91,8 @@ */ /* Four-character-code (FOURCC) */ -#define v4l2_fourcc(a,b,c,d)\ - (((__u32)(a)<<0)|((__u32)(b)<<8)|((__u32)(c)<<16)|((__u32)(d)<<24)) +#define v4l2_fourcc(a, b, c, d)\ + ((__u32)(a) | ((__u32)(b) << 8) | ((__u32)(c) << 16) | ((__u32)(d) << 24)) /* * E N U M S @@ -226,8 +226,7 @@ struct v4l2_fract { /* * D R I V E R C A P A B I L I T I E S */ -struct v4l2_capability -{ +struct v4l2_capability { __u8 driver[16]; /* i.e. "bttv" */ __u8 card[32]; /* i.e. "Hauppauge WinTV" */ __u8 bus_info[32]; /* "PCI:" + pci_name(pci_dev) */ @@ -259,8 +258,7 @@ struct v4l2_capability /* * V I D E O I M A G E F O R M A T */ -struct v4l2_pix_format -{ +struct v4l2_pix_format { __u32 width; __u32 height; __u32 pixelformat; @@ -272,68 +270,67 @@ struct v4l2_pix_format }; /* Pixel format FOURCC depth Description */ -#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R','G','B','1') /* 8 RGB-3-3-2 */ -#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R','4','4','4') /* 16 xxxxrrrr ggggbbbb */ -#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R','G','B','O') /* 16 RGB-5-5-5 */ -#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R','G','B','P') /* 16 RGB-5-6-5 */ -#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R','G','B','Q') /* 16 RGB-5-5-5 BE */ -#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R','G','B','R') /* 16 RGB-5-6-5 BE */ -#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B','G','R','3') /* 24 BGR-8-8-8 */ -#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R','G','B','3') /* 24 RGB-8-8-8 */ -#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B','G','R','4') /* 32 BGR-8-8-8-8 */ -#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R','G','B','4') /* 32 RGB-8-8-8-8 */ -#define V4L2_PIX_FMT_GREY v4l2_fourcc('G','R','E','Y') /* 8 Greyscale */ -#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y','1','6',' ') /* 16 Greyscale */ -#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P','A','L','8') /* 8 8-bit palette */ -#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y','V','U','9') /* 9 YVU 4:1:0 */ -#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y','V','1','2') /* 12 YVU 4:2:0 */ -#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y','U','Y','V') /* 16 YUV 4:2:2 */ -#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U','Y','V','Y') /* 16 YUV 4:2:2 */ -#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4','2','2','P') /* 16 YVU422 planar */ -#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4','1','1','P') /* 16 YVU411 planar */ -#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y','4','1','P') /* 12 YUV 4:1:1 */ -#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y','4','4','4') /* 16 xxxxyyyy uuuuvvvv */ -#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y','U','V','O') /* 16 YUV-5-5-5 */ -#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y','U','V','P') /* 16 YUV-5-6-5 */ -#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y','U','V','4') /* 32 YUV-8-8-8-8 */ +#define V4L2_PIX_FMT_RGB332 v4l2_fourcc('R', 'G', 'B', '1') /* 8 RGB-3-3-2 */ +#define V4L2_PIX_FMT_RGB444 v4l2_fourcc('R', '4', '4', '4') /* 16 xxxxrrrr ggggbbbb */ +#define V4L2_PIX_FMT_RGB555 v4l2_fourcc('R', 'G', 'B', 'O') /* 16 RGB-5-5-5 */ +#define V4L2_PIX_FMT_RGB565 v4l2_fourcc('R', 'G', 'B', 'P') /* 16 RGB-5-6-5 */ +#define V4L2_PIX_FMT_RGB555X v4l2_fourcc('R', 'G', 'B', 'Q') /* 16 RGB-5-5-5 BE */ +#define V4L2_PIX_FMT_RGB565X v4l2_fourcc('R', 'G', 'B', 'R') /* 16 RGB-5-6-5 BE */ +#define V4L2_PIX_FMT_BGR24 v4l2_fourcc('B', 'G', 'R', '3') /* 24 BGR-8-8-8 */ +#define V4L2_PIX_FMT_RGB24 v4l2_fourcc('R', 'G', 'B', '3') /* 24 RGB-8-8-8 */ +#define V4L2_PIX_FMT_BGR32 v4l2_fourcc('B', 'G', 'R', '4') /* 32 BGR-8-8-8-8 */ +#define V4L2_PIX_FMT_RGB32 v4l2_fourcc('R', 'G', 'B', '4') /* 32 RGB-8-8-8-8 */ +#define V4L2_PIX_FMT_GREY v4l2_fourcc('G', 'R', 'E', 'Y') /* 8 Greyscale */ +#define V4L2_PIX_FMT_Y16 v4l2_fourcc('Y', '1', '6', ' ') /* 16 Greyscale */ +#define V4L2_PIX_FMT_PAL8 v4l2_fourcc('P', 'A', 'L', '8') /* 8 8-bit palette */ +#define V4L2_PIX_FMT_YVU410 v4l2_fourcc('Y', 'V', 'U', '9') /* 9 YVU 4:1:0 */ +#define V4L2_PIX_FMT_YVU420 v4l2_fourcc('Y', 'V', '1', '2') /* 12 YVU 4:2:0 */ +#define V4L2_PIX_FMT_YUYV v4l2_fourcc('Y', 'U', 'Y', 'V') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_UYVY v4l2_fourcc('U', 'Y', 'V', 'Y') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_YUV422P v4l2_fourcc('4', '2', '2', 'P') /* 16 YVU422 planar */ +#define V4L2_PIX_FMT_YUV411P v4l2_fourcc('4', '1', '1', 'P') /* 16 YVU411 planar */ +#define V4L2_PIX_FMT_Y41P v4l2_fourcc('Y', '4', '1', 'P') /* 12 YUV 4:1:1 */ +#define V4L2_PIX_FMT_YUV444 v4l2_fourcc('Y', '4', '4', '4') /* 16 xxxxyyyy uuuuvvvv */ +#define V4L2_PIX_FMT_YUV555 v4l2_fourcc('Y', 'U', 'V', 'O') /* 16 YUV-5-5-5 */ +#define V4L2_PIX_FMT_YUV565 v4l2_fourcc('Y', 'U', 'V', 'P') /* 16 YUV-5-6-5 */ +#define V4L2_PIX_FMT_YUV32 v4l2_fourcc('Y', 'U', 'V', '4') /* 32 YUV-8-8-8-8 */ /* two planes -- one Y, one Cr + Cb interleaved */ -#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N','V','1','2') /* 12 Y/CbCr 4:2:0 */ -#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N','V','2','1') /* 12 Y/CrCb 4:2:0 */ +#define V4L2_PIX_FMT_NV12 v4l2_fourcc('N', 'V', '1', '2') /* 12 Y/CbCr 4:2:0 */ +#define V4L2_PIX_FMT_NV21 v4l2_fourcc('N', 'V', '2', '1') /* 12 Y/CrCb 4:2:0 */ /* The following formats are not defined in the V4L2 specification */ -#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y','U','V','9') /* 9 YUV 4:1:0 */ -#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y','U','1','2') /* 12 YUV 4:2:0 */ -#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y','Y','U','V') /* 16 YUV 4:2:2 */ -#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H','I','2','4') /* 8 8-bit color */ -#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H','M','1','2') /* 8 YUV 4:2:0 16x16 macroblocks */ +#define V4L2_PIX_FMT_YUV410 v4l2_fourcc('Y', 'U', 'V', '9') /* 9 YUV 4:1:0 */ +#define V4L2_PIX_FMT_YUV420 v4l2_fourcc('Y', 'U', '1', '2') /* 12 YUV 4:2:0 */ +#define V4L2_PIX_FMT_YYUV v4l2_fourcc('Y', 'Y', 'U', 'V') /* 16 YUV 4:2:2 */ +#define V4L2_PIX_FMT_HI240 v4l2_fourcc('H', 'I', '2', '4') /* 8 8-bit color */ +#define V4L2_PIX_FMT_HM12 v4l2_fourcc('H', 'M', '1', '2') /* 8 YUV 4:2:0 16x16 macroblocks */ /* see http://www.siliconimaging.com/RGB%20Bayer.htm */ -#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B','A','8','1') /* 8 BGBG.. GRGR.. */ -#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G','B','R','G') /* 8 GBGB.. RGRG.. */ -#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B','Y','R','2') /* 16 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ +#define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ +#define V4L2_PIX_FMT_SBGGR16 v4l2_fourcc('B', 'Y', 'R', '2') /* 16 BGBG.. GRGR.. */ /* compressed formats */ -#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M','J','P','G') /* Motion-JPEG */ -#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J','P','E','G') /* JFIF JPEG */ -#define V4L2_PIX_FMT_DV v4l2_fourcc('d','v','s','d') /* 1394 */ -#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M','P','E','G') /* MPEG-1/2/4 */ +#define V4L2_PIX_FMT_MJPEG v4l2_fourcc('M', 'J', 'P', 'G') /* Motion-JPEG */ +#define V4L2_PIX_FMT_JPEG v4l2_fourcc('J', 'P', 'E', 'G') /* JFIF JPEG */ +#define V4L2_PIX_FMT_DV v4l2_fourcc('d', 'v', 's', 'd') /* 1394 */ +#define V4L2_PIX_FMT_MPEG v4l2_fourcc('M', 'P', 'E', 'G') /* MPEG-1/2/4 */ /* Vendor-specific formats */ -#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W','N','V','A') /* Winnov hw compress */ -#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S','9','1','0') /* SN9C10x compression */ -#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P','W','C','1') /* pwc older webcam */ -#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P','W','C','2') /* pwc newer webcam */ -#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E','6','2','5') /* ET61X251 compression */ -#define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S','5','0','1') /* YUYV per line */ -#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S','5','6','1') /* compressed GBRG bayer */ -#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P','2','0','7') /* compressed BGGR bayer */ +#define V4L2_PIX_FMT_WNVA v4l2_fourcc('W', 'N', 'V', 'A') /* Winnov hw compress */ +#define V4L2_PIX_FMT_SN9C10X v4l2_fourcc('S', '9', '1', '0') /* SN9C10x compression */ +#define V4L2_PIX_FMT_PWC1 v4l2_fourcc('P', 'W', 'C', '1') /* pwc older webcam */ +#define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */ +#define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */ +#define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */ +#define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ +#define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ /* * F O R M A T E N U M E R A T I O N */ -struct v4l2_fmtdesc -{ +struct v4l2_fmtdesc { __u32 index; /* Format number */ enum v4l2_buf_type type; /* buffer type */ __u32 flags; @@ -349,21 +346,18 @@ struct v4l2_fmtdesc /* * F R A M E S I Z E E N U M E R A T I O N */ -enum v4l2_frmsizetypes -{ +enum v4l2_frmsizetypes { V4L2_FRMSIZE_TYPE_DISCRETE = 1, V4L2_FRMSIZE_TYPE_CONTINUOUS = 2, V4L2_FRMSIZE_TYPE_STEPWISE = 3, }; -struct v4l2_frmsize_discrete -{ +struct v4l2_frmsize_discrete { __u32 width; /* Frame width [pixel] */ __u32 height; /* Frame height [pixel] */ }; -struct v4l2_frmsize_stepwise -{ +struct v4l2_frmsize_stepwise { __u32 min_width; /* Minimum frame width [pixel] */ __u32 max_width; /* Maximum frame width [pixel] */ __u32 step_width; /* Frame width step size [pixel] */ @@ -372,8 +366,7 @@ struct v4l2_frmsize_stepwise __u32 step_height; /* Frame height step size [pixel] */ }; -struct v4l2_frmsizeenum -{ +struct v4l2_frmsizeenum { __u32 index; /* Frame size number */ __u32 pixel_format; /* Pixel format */ __u32 type; /* Frame size type the device supports. */ @@ -389,22 +382,19 @@ struct v4l2_frmsizeenum /* * F R A M E R A T E E N U M E R A T I O N */ -enum v4l2_frmivaltypes -{ +enum v4l2_frmivaltypes { V4L2_FRMIVAL_TYPE_DISCRETE = 1, V4L2_FRMIVAL_TYPE_CONTINUOUS = 2, V4L2_FRMIVAL_TYPE_STEPWISE = 3, }; -struct v4l2_frmival_stepwise -{ +struct v4l2_frmival_stepwise { struct v4l2_fract min; /* Minimum frame interval [s] */ struct v4l2_fract max; /* Maximum frame interval [s] */ struct v4l2_fract step; /* Frame interval step size [s] */ }; -struct v4l2_frmivalenum -{ +struct v4l2_frmivalenum { __u32 index; /* Frame format index */ __u32 pixel_format; /* Pixel format */ __u32 width; /* Frame width */ @@ -423,8 +413,7 @@ struct v4l2_frmivalenum /* * T I M E C O D E */ -struct v4l2_timecode -{ +struct v4l2_timecode { __u32 type; __u32 flags; __u8 frames; @@ -449,8 +438,7 @@ struct v4l2_timecode #define V4L2_TC_USERBITS_8BITCHARS 0x0008 /* The above is based on SMPTE timecodes */ -struct v4l2_jpegcompression -{ +struct v4l2_jpegcompression { int quality; int APPn; /* Number of APP segment to be written, @@ -482,16 +470,14 @@ struct v4l2_jpegcompression /* * M E M O R Y - M A P P I N G B U F F E R S */ -struct v4l2_requestbuffers -{ +struct v4l2_requestbuffers { __u32 count; enum v4l2_buf_type type; enum v4l2_memory memory; __u32 reserved[2]; }; -struct v4l2_buffer -{ +struct v4l2_buffer { __u32 index; enum v4l2_buf_type type; __u32 bytesused; @@ -525,13 +511,12 @@ struct v4l2_buffer /* * O V E R L A Y P R E V I E W */ -struct v4l2_framebuffer -{ +struct v4l2_framebuffer { __u32 capability; __u32 flags; /* FIXME: in theory we should pass something like PCI device + memory * region + offset instead of some physical address */ - void* base; + void *base; struct v4l2_pix_format fmt; }; /* Flags for the 'capability' field. Read only */ @@ -550,14 +535,12 @@ struct v4l2_framebuffer #define V4L2_FBUF_FLAG_GLOBAL_ALPHA 0x0010 #define V4L2_FBUF_FLAG_LOCAL_INV_ALPHA 0x0020 -struct v4l2_clip -{ +struct v4l2_clip { struct v4l2_rect c; struct v4l2_clip __user *next; }; -struct v4l2_window -{ +struct v4l2_window { struct v4l2_rect w; enum v4l2_field field; __u32 chromakey; @@ -570,8 +553,7 @@ struct v4l2_window /* * C A P T U R E P A R A M E T E R S */ -struct v4l2_captureparm -{ +struct v4l2_captureparm { __u32 capability; /* Supported modes */ __u32 capturemode; /* Current mode */ struct v4l2_fract timeperframe; /* Time per frame in .1us units */ @@ -584,8 +566,7 @@ struct v4l2_captureparm #define V4L2_MODE_HIGHQUALITY 0x0001 /* High quality imaging mode */ #define V4L2_CAP_TIMEPERFRAME 0x1000 /* timeperframe field is supported */ -struct v4l2_outputparm -{ +struct v4l2_outputparm { __u32 capability; /* Supported modes */ __u32 outputmode; /* Current mode */ struct v4l2_fract timeperframe; /* Time per frame in seconds */ @@ -702,8 +683,7 @@ typedef __u64 v4l2_std_id; #define V4L2_STD_ALL (V4L2_STD_525_60 |\ V4L2_STD_625_50) -struct v4l2_standard -{ +struct v4l2_standard { __u32 index; v4l2_std_id id; __u8 name[24]; @@ -715,8 +695,7 @@ struct v4l2_standard /* * V I D E O I N P U T S */ -struct v4l2_input -{ +struct v4l2_input { __u32 index; /* Which input */ __u8 name[32]; /* Label */ __u32 type; /* Type of input */ @@ -753,8 +732,7 @@ struct v4l2_input /* * V I D E O O U T P U T S */ -struct v4l2_output -{ +struct v4l2_output { __u32 index; /* Which output */ __u8 name[32]; /* Label */ __u32 type; /* Type of output */ @@ -771,14 +749,12 @@ struct v4l2_output /* * C O N T R O L S */ -struct v4l2_control -{ +struct v4l2_control { __u32 id; __s32 value; }; -struct v4l2_ext_control -{ +struct v4l2_ext_control { __u32 id; __u32 reserved2[2]; union { @@ -788,8 +764,7 @@ struct v4l2_ext_control }; } __attribute__ ((packed)); -struct v4l2_ext_controls -{ +struct v4l2_ext_controls { __u32 ctrl_class; __u32 count; __u32 error_idx; @@ -807,8 +782,7 @@ struct v4l2_ext_controls #define V4L2_CTRL_DRIVER_PRIV(id) (((id) & 0xffff) >= 0x1000) /* Used in the VIDIOC_QUERYCTRL ioctl for querying controls */ -struct v4l2_queryctrl -{ +struct v4l2_queryctrl { __u32 id; enum v4l2_ctrl_type type; __u8 name[32]; /* Whatever */ @@ -821,8 +795,7 @@ struct v4l2_queryctrl }; /* Used in the VIDIOC_QUERYMENU ioctl for querying menu items */ -struct v4l2_querymenu -{ +struct v4l2_querymenu { __u32 id; __u32 index; __u8 name[32]; /* Whatever */ @@ -1104,8 +1077,7 @@ enum v4l2_exposure_auto_type { /* * T U N I N G */ -struct v4l2_tuner -{ +struct v4l2_tuner { __u32 index; __u8 name[32]; enum v4l2_tuner_type type; @@ -1119,8 +1091,7 @@ struct v4l2_tuner __u32 reserved[4]; }; -struct v4l2_modulator -{ +struct v4l2_modulator { __u32 index; __u8 name[32]; __u32 capability; @@ -1153,8 +1124,7 @@ struct v4l2_modulator #define V4L2_TUNER_MODE_LANG1 0x0003 #define V4L2_TUNER_MODE_LANG1_LANG2 0x0004 -struct v4l2_frequency -{ +struct v4l2_frequency { __u32 tuner; enum v4l2_tuner_type type; __u32 frequency; @@ -1172,8 +1142,7 @@ struct v4l2_hw_freq_seek { /* * A U D I O */ -struct v4l2_audio -{ +struct v4l2_audio { __u32 index; __u8 name[32]; __u32 capability; @@ -1188,8 +1157,7 @@ struct v4l2_audio /* Flags for the 'mode' field */ #define V4L2_AUDMODE_AVL 0x00001 -struct v4l2_audioout -{ +struct v4l2_audioout { __u32 index; __u8 name[32]; __u32 capability; @@ -1253,8 +1221,7 @@ struct v4l2_encoder_cmd { */ /* Raw VBI */ -struct v4l2_vbi_format -{ +struct v4l2_vbi_format { __u32 sampling_rate; /* in 1 Hz */ __u32 offset; __u32 samples_per_line; @@ -1266,8 +1233,8 @@ struct v4l2_vbi_format }; /* VBI flags */ -#define V4L2_VBI_UNSYNC (1<< 0) -#define V4L2_VBI_INTERLACED (1<< 1) +#define V4L2_VBI_UNSYNC (1 << 0) +#define V4L2_VBI_INTERLACED (1 << 1) /* Sliced VBI * @@ -1276,8 +1243,7 @@ struct v4l2_vbi_format * notice in the definitive implementation. */ -struct v4l2_sliced_vbi_format -{ +struct v4l2_sliced_vbi_format { __u16 service_set; /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field @@ -1301,8 +1267,7 @@ struct v4l2_sliced_vbi_format #define V4L2_SLICED_VBI_525 (V4L2_SLICED_CAPTION_525) #define V4L2_SLICED_VBI_625 (V4L2_SLICED_TELETEXT_B | V4L2_SLICED_VPS | V4L2_SLICED_WSS_625) -struct v4l2_sliced_vbi_cap -{ +struct v4l2_sliced_vbi_cap { __u16 service_set; /* service_lines[0][...] specifies lines 0-23 (1-23 used) of the first field service_lines[1][...] specifies lines 0-23 (1-23 used) of the second field @@ -1313,8 +1278,7 @@ struct v4l2_sliced_vbi_cap __u32 reserved[3]; /* must be 0 */ }; -struct v4l2_sliced_vbi_data -{ +struct v4l2_sliced_vbi_data { __u32 id; __u32 field; /* 0: first field, 1: second field */ __u32 line; /* 1-23 */ @@ -1328,27 +1292,23 @@ struct v4l2_sliced_vbi_data /* Stream data format */ -struct v4l2_format -{ +struct v4l2_format { enum v4l2_buf_type type; - union - { - struct v4l2_pix_format pix; // V4L2_BUF_TYPE_VIDEO_CAPTURE - struct v4l2_window win; // V4L2_BUF_TYPE_VIDEO_OVERLAY - struct v4l2_vbi_format vbi; // V4L2_BUF_TYPE_VBI_CAPTURE - struct v4l2_sliced_vbi_format sliced; // V4L2_BUF_TYPE_SLICED_VBI_CAPTURE - __u8 raw_data[200]; // user-defined + union { + struct v4l2_pix_format pix; /* V4L2_BUF_TYPE_VIDEO_CAPTURE */ + struct v4l2_window win; /* V4L2_BUF_TYPE_VIDEO_OVERLAY */ + struct v4l2_vbi_format vbi; /* V4L2_BUF_TYPE_VBI_CAPTURE */ + struct v4l2_sliced_vbi_format sliced; /* V4L2_BUF_TYPE_SLICED_VBI_CAPTURE */ + __u8 raw_data[200]; /* user-defined */ } fmt; }; /* Stream type-dependent parameters */ -struct v4l2_streamparm -{ +struct v4l2_streamparm { enum v4l2_buf_type type; - union - { + union { struct v4l2_captureparm capture; struct v4l2_outputparm output; __u8 raw_data[200]; /* user-defined */ @@ -1386,92 +1346,86 @@ struct v4l2_chip_ident { * I O C T L C O D E S F O R V I D E O D E V I C E S * */ -#define VIDIOC_QUERYCAP _IOR ('V', 0, struct v4l2_capability) -#define VIDIOC_RESERVED _IO ('V', 1) -#define VIDIOC_ENUM_FMT _IOWR ('V', 2, struct v4l2_fmtdesc) -#define VIDIOC_G_FMT _IOWR ('V', 4, struct v4l2_format) -#define VIDIOC_S_FMT _IOWR ('V', 5, struct v4l2_format) -#define VIDIOC_REQBUFS _IOWR ('V', 8, struct v4l2_requestbuffers) -#define VIDIOC_QUERYBUF _IOWR ('V', 9, struct v4l2_buffer) -#define VIDIOC_G_FBUF _IOR ('V', 10, struct v4l2_framebuffer) -#define VIDIOC_S_FBUF _IOW ('V', 11, struct v4l2_framebuffer) -#define VIDIOC_OVERLAY _IOW ('V', 14, int) -#define VIDIOC_QBUF _IOWR ('V', 15, struct v4l2_buffer) -#define VIDIOC_DQBUF _IOWR ('V', 17, struct v4l2_buffer) -#define VIDIOC_STREAMON _IOW ('V', 18, int) -#define VIDIOC_STREAMOFF _IOW ('V', 19, int) -#define VIDIOC_G_PARM _IOWR ('V', 21, struct v4l2_streamparm) -#define VIDIOC_S_PARM _IOWR ('V', 22, struct v4l2_streamparm) -#define VIDIOC_G_STD _IOR ('V', 23, v4l2_std_id) -#define VIDIOC_S_STD _IOW ('V', 24, v4l2_std_id) -#define VIDIOC_ENUMSTD _IOWR ('V', 25, struct v4l2_standard) -#define VIDIOC_ENUMINPUT _IOWR ('V', 26, struct v4l2_input) -#define VIDIOC_G_CTRL _IOWR ('V', 27, struct v4l2_control) -#define VIDIOC_S_CTRL _IOWR ('V', 28, struct v4l2_control) -#define VIDIOC_G_TUNER _IOWR ('V', 29, struct v4l2_tuner) -#define VIDIOC_S_TUNER _IOW ('V', 30, struct v4l2_tuner) -#define VIDIOC_G_AUDIO _IOR ('V', 33, struct v4l2_audio) -#define VIDIOC_S_AUDIO _IOW ('V', 34, struct v4l2_audio) -#define VIDIOC_QUERYCTRL _IOWR ('V', 36, struct v4l2_queryctrl) -#define VIDIOC_QUERYMENU _IOWR ('V', 37, struct v4l2_querymenu) -#define VIDIOC_G_INPUT _IOR ('V', 38, int) -#define VIDIOC_S_INPUT _IOWR ('V', 39, int) -#define VIDIOC_G_OUTPUT _IOR ('V', 46, int) -#define VIDIOC_S_OUTPUT _IOWR ('V', 47, int) -#define VIDIOC_ENUMOUTPUT _IOWR ('V', 48, struct v4l2_output) -#define VIDIOC_G_AUDOUT _IOR ('V', 49, struct v4l2_audioout) -#define VIDIOC_S_AUDOUT _IOW ('V', 50, struct v4l2_audioout) -#define VIDIOC_G_MODULATOR _IOWR ('V', 54, struct v4l2_modulator) -#define VIDIOC_S_MODULATOR _IOW ('V', 55, struct v4l2_modulator) -#define VIDIOC_G_FREQUENCY _IOWR ('V', 56, struct v4l2_frequency) -#define VIDIOC_S_FREQUENCY _IOW ('V', 57, struct v4l2_frequency) -#define VIDIOC_CROPCAP _IOWR ('V', 58, struct v4l2_cropcap) -#define VIDIOC_G_CROP _IOWR ('V', 59, struct v4l2_crop) -#define VIDIOC_S_CROP _IOW ('V', 60, struct v4l2_crop) -#define VIDIOC_G_JPEGCOMP _IOR ('V', 61, struct v4l2_jpegcompression) -#define VIDIOC_S_JPEGCOMP _IOW ('V', 62, struct v4l2_jpegcompression) -#define VIDIOC_QUERYSTD _IOR ('V', 63, v4l2_std_id) -#define VIDIOC_TRY_FMT _IOWR ('V', 64, struct v4l2_format) -#define VIDIOC_ENUMAUDIO _IOWR ('V', 65, struct v4l2_audio) -#define VIDIOC_ENUMAUDOUT _IOWR ('V', 66, struct v4l2_audioout) -#define VIDIOC_G_PRIORITY _IOR ('V', 67, enum v4l2_priority) -#define VIDIOC_S_PRIORITY _IOW ('V', 68, enum v4l2_priority) -#define VIDIOC_G_SLICED_VBI_CAP _IOWR ('V', 69, struct v4l2_sliced_vbi_cap) -#define VIDIOC_LOG_STATUS _IO ('V', 70) -#define VIDIOC_G_EXT_CTRLS _IOWR ('V', 71, struct v4l2_ext_controls) -#define VIDIOC_S_EXT_CTRLS _IOWR ('V', 72, struct v4l2_ext_controls) -#define VIDIOC_TRY_EXT_CTRLS _IOWR ('V', 73, struct v4l2_ext_controls) +#define VIDIOC_QUERYCAP _IOR('V', 0, struct v4l2_capability) +#define VIDIOC_RESERVED _IO('V', 1) +#define VIDIOC_ENUM_FMT _IOWR('V', 2, struct v4l2_fmtdesc) +#define VIDIOC_G_FMT _IOWR('V', 4, struct v4l2_format) +#define VIDIOC_S_FMT _IOWR('V', 5, struct v4l2_format) +#define VIDIOC_REQBUFS _IOWR('V', 8, struct v4l2_requestbuffers) +#define VIDIOC_QUERYBUF _IOWR('V', 9, struct v4l2_buffer) +#define VIDIOC_G_FBUF _IOR('V', 10, struct v4l2_framebuffer) +#define VIDIOC_S_FBUF _IOW('V', 11, struct v4l2_framebuffer) +#define VIDIOC_OVERLAY _IOW('V', 14, int) +#define VIDIOC_QBUF _IOWR('V', 15, struct v4l2_buffer) +#define VIDIOC_DQBUF _IOWR('V', 17, struct v4l2_buffer) +#define VIDIOC_STREAMON _IOW('V', 18, int) +#define VIDIOC_STREAMOFF _IOW('V', 19, int) +#define VIDIOC_G_PARM _IOWR('V', 21, struct v4l2_streamparm) +#define VIDIOC_S_PARM _IOWR('V', 22, struct v4l2_streamparm) +#define VIDIOC_G_STD _IOR('V', 23, v4l2_std_id) +#define VIDIOC_S_STD _IOW('V', 24, v4l2_std_id) +#define VIDIOC_ENUMSTD _IOWR('V', 25, struct v4l2_standard) +#define VIDIOC_ENUMINPUT _IOWR('V', 26, struct v4l2_input) +#define VIDIOC_G_CTRL _IOWR('V', 27, struct v4l2_control) +#define VIDIOC_S_CTRL _IOWR('V', 28, struct v4l2_control) +#define VIDIOC_G_TUNER _IOWR('V', 29, struct v4l2_tuner) +#define VIDIOC_S_TUNER _IOW('V', 30, struct v4l2_tuner) +#define VIDIOC_G_AUDIO _IOR('V', 33, struct v4l2_audio) +#define VIDIOC_S_AUDIO _IOW('V', 34, struct v4l2_audio) +#define VIDIOC_QUERYCTRL _IOWR('V', 36, struct v4l2_queryctrl) +#define VIDIOC_QUERYMENU _IOWR('V', 37, struct v4l2_querymenu) +#define VIDIOC_G_INPUT _IOR('V', 38, int) +#define VIDIOC_S_INPUT _IOWR('V', 39, int) +#define VIDIOC_G_OUTPUT _IOR('V', 46, int) +#define VIDIOC_S_OUTPUT _IOWR('V', 47, int) +#define VIDIOC_ENUMOUTPUT _IOWR('V', 48, struct v4l2_output) +#define VIDIOC_G_AUDOUT _IOR('V', 49, struct v4l2_audioout) +#define VIDIOC_S_AUDOUT _IOW('V', 50, struct v4l2_audioout) +#define VIDIOC_G_MODULATOR _IOWR('V', 54, struct v4l2_modulator) +#define VIDIOC_S_MODULATOR _IOW('V', 55, struct v4l2_modulator) +#define VIDIOC_G_FREQUENCY _IOWR('V', 56, struct v4l2_frequency) +#define VIDIOC_S_FREQUENCY _IOW('V', 57, struct v4l2_frequency) +#define VIDIOC_CROPCAP _IOWR('V', 58, struct v4l2_cropcap) +#define VIDIOC_G_CROP _IOWR('V', 59, struct v4l2_crop) +#define VIDIOC_S_CROP _IOW('V', 60, struct v4l2_crop) +#define VIDIOC_G_JPEGCOMP _IOR('V', 61, struct v4l2_jpegcompression) +#define VIDIOC_S_JPEGCOMP _IOW('V', 62, struct v4l2_jpegcompression) +#define VIDIOC_QUERYSTD _IOR('V', 63, v4l2_std_id) +#define VIDIOC_TRY_FMT _IOWR('V', 64, struct v4l2_format) +#define VIDIOC_ENUMAUDIO _IOWR('V', 65, struct v4l2_audio) +#define VIDIOC_ENUMAUDOUT _IOWR('V', 66, struct v4l2_audioout) +#define VIDIOC_G_PRIORITY _IOR('V', 67, enum v4l2_priority) +#define VIDIOC_S_PRIORITY _IOW('V', 68, enum v4l2_priority) +#define VIDIOC_G_SLICED_VBI_CAP _IOWR('V', 69, struct v4l2_sliced_vbi_cap) +#define VIDIOC_LOG_STATUS _IO('V', 70) +#define VIDIOC_G_EXT_CTRLS _IOWR('V', 71, struct v4l2_ext_controls) +#define VIDIOC_S_EXT_CTRLS _IOWR('V', 72, struct v4l2_ext_controls) +#define VIDIOC_TRY_EXT_CTRLS _IOWR('V', 73, struct v4l2_ext_controls) #if 1 -#define VIDIOC_ENUM_FRAMESIZES _IOWR ('V', 74, struct v4l2_frmsizeenum) -#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR ('V', 75, struct v4l2_frmivalenum) -#define VIDIOC_G_ENC_INDEX _IOR ('V', 76, struct v4l2_enc_idx) -#define VIDIOC_ENCODER_CMD _IOWR ('V', 77, struct v4l2_encoder_cmd) -#define VIDIOC_TRY_ENCODER_CMD _IOWR ('V', 78, struct v4l2_encoder_cmd) +#define VIDIOC_ENUM_FRAMESIZES _IOWR('V', 74, struct v4l2_frmsizeenum) +#define VIDIOC_ENUM_FRAMEINTERVALS _IOWR('V', 75, struct v4l2_frmivalenum) +#define VIDIOC_G_ENC_INDEX _IOR('V', 76, struct v4l2_enc_idx) +#define VIDIOC_ENCODER_CMD _IOWR('V', 77, struct v4l2_encoder_cmd) +#define VIDIOC_TRY_ENCODER_CMD _IOWR('V', 78, struct v4l2_encoder_cmd) /* Experimental, only implemented if CONFIG_VIDEO_ADV_DEBUG is defined */ -#define VIDIOC_DBG_S_REGISTER _IOW ('V', 79, struct v4l2_register) -#define VIDIOC_DBG_G_REGISTER _IOWR ('V', 80, struct v4l2_register) +#define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_register) +#define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_register) -#define VIDIOC_G_CHIP_IDENT _IOWR ('V', 81, struct v4l2_chip_ident) +#define VIDIOC_G_CHIP_IDENT _IOWR('V', 81, struct v4l2_chip_ident) #endif -#define VIDIOC_S_HW_FREQ_SEEK _IOW ('V', 82, struct v4l2_hw_freq_seek) +#define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) #ifdef __OLD_VIDIOC_ /* for compatibility, will go away some day */ -#define VIDIOC_OVERLAY_OLD _IOWR ('V', 14, int) -#define VIDIOC_S_PARM_OLD _IOW ('V', 22, struct v4l2_streamparm) -#define VIDIOC_S_CTRL_OLD _IOW ('V', 28, struct v4l2_control) -#define VIDIOC_G_AUDIO_OLD _IOWR ('V', 33, struct v4l2_audio) -#define VIDIOC_G_AUDOUT_OLD _IOWR ('V', 49, struct v4l2_audioout) -#define VIDIOC_CROPCAP_OLD _IOR ('V', 58, struct v4l2_cropcap) +#define VIDIOC_OVERLAY_OLD _IOWR('V', 14, int) +#define VIDIOC_S_PARM_OLD _IOW('V', 22, struct v4l2_streamparm) +#define VIDIOC_S_CTRL_OLD _IOW('V', 28, struct v4l2_control) +#define VIDIOC_G_AUDIO_OLD _IOWR('V', 33, struct v4l2_audio) +#define VIDIOC_G_AUDOUT_OLD _IOWR('V', 49, struct v4l2_audioout) +#define VIDIOC_CROPCAP_OLD _IOR('V', 58, struct v4l2_cropcap) #endif #define BASE_VIDIOC_PRIVATE 192 /* 192-255 are private */ #endif /* __LINUX_VIDEODEV2_H */ - -/* - * Local variables: - * c-basic-offset: 8 - * End: - */ -- cgit v1.1 From 1250ac6d4ab716dafe0ac245fd31cd3a7cbc0a98 Mon Sep 17 00:00:00 2001 From: Jean-Francois Moine Date: Sat, 26 Jul 2008 08:02:47 -0300 Subject: V4L/DVB (8518): gspca: Remove the remaining frame decoding functions from the subdrivers. SPCA505 and SPCA508 added in the pixel formats. Decode functions and associated resources removed in spca505, 506 and 508. The decode routines are now found in the V4L library. Signed-off-by: Jean-Francois Moine Signed-off-by: Mauro Carvalho Chehab --- include/linux/videodev2.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index cc0c895..7d9ac04 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -324,6 +324,8 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */ #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */ #define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */ +#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S','5','0','5') /* YYUV per line */ +#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S','5','0','8') /* YUVY per line */ #define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ #define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ -- cgit v1.1 From 0ea6bc8d43c9ee3c5384bea184eab020927a5b2c Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sat, 26 Jul 2008 08:26:43 -0300 Subject: V4L/DVB (8523): v4l2-dev: remove unused type and type2 field from video_device The type and type2 fields were unused and so could be removed. Instead add a vfl_type field that contains the type of the video device. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 2fe3885..21419da 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -53,8 +53,7 @@ struct video_device /* device info */ char name[32]; - int type; /* v4l1 */ - int type2; /* v4l2 */ + int vfl_type; int minor; /* attribute to diferentiate multiple indexs on one physical device */ int index; -- cgit v1.1 From c1d7f4f1648cb8efd87f1b9560c40af2297e7c05 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sat, 26 Jul 2008 08:33:47 -0300 Subject: V4L/DVB (8524): videodev: copy the VID_TYPE defines to videodev.h The VID_TYPE defines are V4L1 specific, so copy them back to videodev.h. In videodev2.h ensure that they are not used in the kernel (you need to include videodev.h instead) and mark them are deprecated. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/linux/videodev.h | 15 +++++++++++++++ include/linux/videodev2.h | 6 ++++++ 2 files changed, 21 insertions(+) (limited to 'include') diff --git a/include/linux/videodev.h b/include/linux/videodev.h index 9385a56..15a653d 100644 --- a/include/linux/videodev.h +++ b/include/linux/videodev.h @@ -17,6 +17,21 @@ #if defined(CONFIG_VIDEO_V4L1_COMPAT) || !defined (__KERNEL__) +#define VID_TYPE_CAPTURE 1 /* Can capture */ +#define VID_TYPE_TUNER 2 /* Can tune */ +#define VID_TYPE_TELETEXT 4 /* Does teletext */ +#define VID_TYPE_OVERLAY 8 /* Overlay onto frame buffer */ +#define VID_TYPE_CHROMAKEY 16 /* Overlay by chromakey */ +#define VID_TYPE_CLIPPING 32 /* Can clip */ +#define VID_TYPE_FRAMERAM 64 /* Uses the frame buffer memory */ +#define VID_TYPE_SCALES 128 /* Scalable */ +#define VID_TYPE_MONOCHROME 256 /* Monochrome only */ +#define VID_TYPE_SUBCAPTURE 512 /* Can capture subareas of the image */ +#define VID_TYPE_MPEG_DECODER 1024 /* Can decode MPEG streams */ +#define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */ +#define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */ +#define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */ + struct video_capability { char name[32]; diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index 7d9ac04..f719535 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -71,6 +71,11 @@ */ #define VIDEO_MAX_FRAME 32 +#ifndef __KERNEL__ + +/* These defines are V4L1 specific and should not be used with the V4L2 API! + They will be removed from this header in the future. */ + #define VID_TYPE_CAPTURE 1 /* Can capture */ #define VID_TYPE_TUNER 2 /* Can tune */ #define VID_TYPE_TELETEXT 4 /* Does teletext */ @@ -85,6 +90,7 @@ #define VID_TYPE_MPEG_ENCODER 2048 /* Can encode MPEG streams */ #define VID_TYPE_MJPEG_DECODER 4096 /* Can decode MJPEG streams */ #define VID_TYPE_MJPEG_ENCODER 8192 /* Can encode MJPEG streams */ +#endif /* * M I S C E L L A N E O U S -- cgit v1.1 From de1e575db21a341b77b296af7dd87f163ebf6020 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Sat, 26 Jul 2008 08:37:58 -0300 Subject: V4L/DVB (8525): fix a few assorted spelling mistakes. Signed-off-by: Hans Verkuil Signed-off-by: Mauro Carvalho Chehab --- include/media/v4l2-dev.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h index 21419da..2745e1a 100644 --- a/include/media/v4l2-dev.h +++ b/include/media/v4l2-dev.h @@ -55,7 +55,7 @@ struct video_device char name[32]; int vfl_type; int minor; - /* attribute to diferentiate multiple indexs on one physical device */ + /* attribute to differentiate multiple indices on one physical device */ int index; int debug; /* Activates debug level*/ @@ -78,7 +78,7 @@ struct video_device void *priv; #endif - /* for videodev.c intenal usage -- please don't touch */ + /* for videodev.c internal usage -- please don't touch */ int users; /* video_exclusive_{open|close} ... */ struct mutex lock; /* ... helper function uses these */ }; -- cgit v1.1 From 2b142900784c6e38c8d39fa57d5f95ef08e735d8 Mon Sep 17 00:00:00 2001 From: Alan Jenkins Date: Sun, 27 Jul 2008 09:38:42 +0100 Subject: [SCSI] extend the last_sector_bug flag to cover more sectors The last_sector_bug flag was added to work around a bug in certain usb cardreaders, where they would crash if a multiple sector read included the last sector. The original implementation avoids this by e.g. splitting an 8 sector read which includes the last sector into a 7 sector read, and a single sector read for the last sector. The flag is enabled for all USB devices. This revealed a second bug in other usb cardreaders, which crash when they get a multiple sector read which stops 1 sector short of the last sector. Affected hardware includes the Kingston "MobileLite" external USB cardreader and the internal USB cardreader on the Asus EeePC. Extend the last_sector_bug workaround to ensure that any access which touches the last 8 hardware sectors of the device is a single sector long. Requests are shrunk as necessary to meet this constraint. This gives us a safety margin against potential unknown or future bugs affecting multi-sector access to the end of the device. The two known bugs only affect the last 2 sectors. However, they suggest that these devices are prone to fencepost errors and that multi-sector access to the end of the device is not well tested. Popular OS's use multi-sector accesses, but they rarely read the last few sectors. Linux (with udev & vol_id) automatically reads sectors from the end of the device on insertion. It is assumed that single sector accesses are more thoroughly tested during development. Signed-off-by: Alan Jenkins Tested-by: Alan Jenkins Signed-off-by: James Bottomley --- include/scsi/scsi_device.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 9cecc40..291d56a 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -140,7 +140,8 @@ struct scsi_device { unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ unsigned guess_capacity:1; /* READ_CAPACITY might be too high by 1 */ unsigned retry_hwerror:1; /* Retry HARDWARE_ERROR */ - unsigned last_sector_bug:1; /* Always read last sector in a 1 sector read */ + unsigned last_sector_bug:1; /* do not use multisector accesses on + SD_LAST_BUGGY_SECTORS */ DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */ struct list_head event_list; /* asserted events */ -- cgit v1.1 From 9fa0f6db3a201bef49f28e69f80802559a38586b Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Sun, 27 Jul 2008 08:55:17 -0300 Subject: V4L/DVB (8522): videodev2: Fix merge conflict Signed-off-by: Mauro Carvalho Chehab --- include/linux/videodev2.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index f719535..e466bd5 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h @@ -330,8 +330,8 @@ struct v4l2_pix_format { #define V4L2_PIX_FMT_PWC2 v4l2_fourcc('P', 'W', 'C', '2') /* pwc newer webcam */ #define V4L2_PIX_FMT_ET61X251 v4l2_fourcc('E', '6', '2', '5') /* ET61X251 compression */ #define V4L2_PIX_FMT_SPCA501 v4l2_fourcc('S', '5', '0', '1') /* YUYV per line */ -#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S','5','0','5') /* YYUV per line */ -#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S','5','0','8') /* YUVY per line */ +#define V4L2_PIX_FMT_SPCA505 v4l2_fourcc('S', '5', '0', '5') /* YYUV per line */ +#define V4L2_PIX_FMT_SPCA508 v4l2_fourcc('S', '5', '0', '8') /* YUVY per line */ #define V4L2_PIX_FMT_SPCA561 v4l2_fourcc('S', '5', '6', '1') /* compressed GBRG bayer */ #define V4L2_PIX_FMT_PAC207 v4l2_fourcc('P', '2', '0', '7') /* compressed BGGR bayer */ -- cgit v1.1 From eeb61f719c00c626115852bbc91189dc3011a844 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 27 Jul 2008 08:59:33 +0100 Subject: missing bits of net-namespace / sysctl Piss-poor sysctl registration API strikes again, film at 11... What we really need is _pathname_ required to be present in already registered table, so that kernel could warn about bad order. That's the next target for sysctl stuff (and generally saner and more explicit order of initialization of ipv[46] internals wouldn't hurt either). For the time being, here are full fixups required by ..._rotable() stuff; we make per-net sysctl sets descendents of "ro" one and make sure that sufficient skeleton is there before we start registering per-net sysctls. Signed-off-by: Al Viro Signed-off-by: Linus Torvalds --- include/net/ipv6.h | 2 ++ include/net/route.h | 2 -- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/ipv6.h b/include/net/ipv6.h index 2d5c185..113028f 100644 --- a/include/net/ipv6.h +++ b/include/net/ipv6.h @@ -608,6 +608,8 @@ extern struct ctl_table *ipv6_icmp_sysctl_init(struct net *net); extern struct ctl_table *ipv6_route_sysctl_init(struct net *net); extern int ipv6_sysctl_register(void); extern void ipv6_sysctl_unregister(void); +extern int ipv6_static_sysctl_register(void); +extern void ipv6_static_sysctl_unregister(void); #endif #endif /* __KERNEL__ */ diff --git a/include/net/route.h b/include/net/route.h index 3140cc5..4f0d8c1 100644 --- a/include/net/route.h +++ b/include/net/route.h @@ -204,6 +204,4 @@ static inline struct inet_peer *rt_get_peer(struct rtable *rt) return rt->peer; } -extern ctl_table ipv4_route_table[]; - #endif /* _ROUTE_H */ -- cgit v1.1 From 5995477ab7f3522c497c9c4a1c55373e9d655574 Mon Sep 17 00:00:00 2001 From: Andrea Righi Date: Sun, 27 Jul 2008 17:29:15 +0200 Subject: task IO accounting: improve code readability Put all i/o statistics in struct proc_io_accounting and use inline functions to initialize and increment statistics, removing a lot of single variable assignments. This also reduces the kernel size as following (with CONFIG_TASK_XACCT=y and CONFIG_TASK_IO_ACCOUNTING=y). text data bss dec hex filename 11651 0 0 11651 2d83 kernel/exit.o.before 11619 0 0 11619 2d63 kernel/exit.o.after 10886 132 136 11154 2b92 kernel/fork.o.before 10758 132 136 11026 2b12 kernel/fork.o.after 3082029 807968 4818600 8708597 84e1f5 vmlinux.o.before 3081869 807968 4818600 8708437 84e155 vmlinux.o.after Signed-off-by: Andrea Righi Acked-by: Oleg Nesterov Signed-off-by: Linus Torvalds --- include/linux/sched.h | 19 ++++-------- include/linux/task_io_accounting.h | 27 ++++++++++++++-- include/linux/task_io_accounting_ops.h | 56 ++++++++++++++++++++++++++++------ 3 files changed, 76 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index f59318a..034c1ca 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -505,10 +505,7 @@ struct signal_struct { unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt; unsigned long inblock, oublock, cinblock, coublock; -#ifdef CONFIG_TASK_XACCT - u64 rchar, wchar, syscr, syscw; -#endif - struct task_io_accounting ioac; + struct proc_io_accounting ioac; /* * Cumulative ns of scheduled CPU time for dead threads in the @@ -1256,11 +1253,7 @@ struct task_struct { unsigned long ptrace_message; siginfo_t *last_siginfo; /* For ptrace use. */ -#ifdef CONFIG_TASK_XACCT -/* i/o counters(bytes read/written, #syscalls */ - u64 rchar, wchar, syscr, syscw; -#endif - struct task_io_accounting ioac; + struct proc_io_accounting ioac; #if defined(CONFIG_TASK_XACCT) u64 acct_rss_mem1; /* accumulated rss usage */ u64 acct_vm_mem1; /* accumulated virtual memory usage */ @@ -2190,22 +2183,22 @@ extern long sched_group_rt_period(struct task_group *tg); #ifdef CONFIG_TASK_XACCT static inline void add_rchar(struct task_struct *tsk, ssize_t amt) { - tsk->rchar += amt; + tsk->ioac.chr.rchar += amt; } static inline void add_wchar(struct task_struct *tsk, ssize_t amt) { - tsk->wchar += amt; + tsk->ioac.chr.wchar += amt; } static inline void inc_syscr(struct task_struct *tsk) { - tsk->syscr++; + tsk->ioac.chr.syscr++; } static inline void inc_syscw(struct task_struct *tsk) { - tsk->syscw++; + tsk->ioac.chr.syscw++; } #else static inline void add_rchar(struct task_struct *tsk, ssize_t amt) diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h index 44d00e9..165390f 100644 --- a/include/linux/task_io_accounting.h +++ b/include/linux/task_io_accounting.h @@ -1,5 +1,5 @@ /* - * task_io_accounting: a structure which is used for recording a single task's + * proc_io_accounting: a structure which is used for recording a single task's * IO statistics. * * Don't include this header file directly - it is designed to be dragged in via @@ -8,6 +8,22 @@ * Blame akpm@osdl.org for all this. */ +#ifdef CONFIG_TASK_XACCT +struct task_chr_io_accounting { + /* bytes read */ + u64 rchar; + /* bytes written */ + u64 wchar; + /* # of read syscalls */ + u64 syscr; + /* # of write syscalls */ + u64 syscw; +}; +#else /* CONFIG_TASK_XACCT */ +struct task_chr_io_accounting { +}; +#endif /* CONFIG_TASK_XACCT */ + #ifdef CONFIG_TASK_IO_ACCOUNTING struct task_io_accounting { /* @@ -31,7 +47,12 @@ struct task_io_accounting { */ u64 cancelled_write_bytes; }; -#else +#else /* CONFIG_TASK_IO_ACCOUNTING */ struct task_io_accounting { }; -#endif +#endif /* CONFIG_TASK_IO_ACCOUNTING */ + +struct proc_io_accounting { + struct task_chr_io_accounting chr; + struct task_io_accounting blk; +}; diff --git a/include/linux/task_io_accounting_ops.h b/include/linux/task_io_accounting_ops.h index ff46c6f..e6f958e 100644 --- a/include/linux/task_io_accounting_ops.h +++ b/include/linux/task_io_accounting_ops.h @@ -9,7 +9,7 @@ #ifdef CONFIG_TASK_IO_ACCOUNTING static inline void task_io_account_read(size_t bytes) { - current->ioac.read_bytes += bytes; + current->ioac.blk.read_bytes += bytes; } /* @@ -18,12 +18,12 @@ static inline void task_io_account_read(size_t bytes) */ static inline unsigned long task_io_get_inblock(const struct task_struct *p) { - return p->ioac.read_bytes >> 9; + return p->ioac.blk.read_bytes >> 9; } static inline void task_io_account_write(size_t bytes) { - current->ioac.write_bytes += bytes; + current->ioac.blk.write_bytes += bytes; } /* @@ -32,17 +32,25 @@ static inline void task_io_account_write(size_t bytes) */ static inline unsigned long task_io_get_oublock(const struct task_struct *p) { - return p->ioac.write_bytes >> 9; + return p->ioac.blk.write_bytes >> 9; } static inline void task_io_account_cancelled_write(size_t bytes) { - current->ioac.cancelled_write_bytes += bytes; + current->ioac.blk.cancelled_write_bytes += bytes; } -static inline void task_io_accounting_init(struct task_struct *tsk) +static inline void task_io_accounting_init(struct proc_io_accounting *ioac) { - memset(&tsk->ioac, 0, sizeof(tsk->ioac)); + memset(ioac, 0, sizeof(*ioac)); +} + +static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, + struct proc_io_accounting *src) +{ + dst->blk.read_bytes += src->blk.read_bytes; + dst->blk.write_bytes += src->blk.write_bytes; + dst->blk.cancelled_write_bytes += src->blk.cancelled_write_bytes; } #else @@ -69,9 +77,37 @@ static inline void task_io_account_cancelled_write(size_t bytes) { } -static inline void task_io_accounting_init(struct task_struct *tsk) +static inline void task_io_accounting_init(struct proc_io_accounting *ioac) +{ +} + +static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, + struct proc_io_accounting *src) { } -#endif /* CONFIG_TASK_IO_ACCOUNTING */ -#endif /* __TASK_IO_ACCOUNTING_OPS_INCLUDED */ +#endif /* CONFIG_TASK_IO_ACCOUNTING */ + +#ifdef CONFIG_TASK_XACCT +static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, + struct proc_io_accounting *src) +{ + dst->chr.rchar += src->chr.rchar; + dst->chr.wchar += src->chr.wchar; + dst->chr.syscr += src->chr.syscr; + dst->chr.syscw += src->chr.syscw; +} +#else +static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, + struct proc_io_accounting *src) +{ +} +#endif /* CONFIG_TASK_XACCT */ + +static inline void task_io_accounting_add(struct proc_io_accounting *dst, + struct proc_io_accounting *src) +{ + task_chr_io_accounting_add(dst, src); + task_blk_io_accounting_add(dst, src); +} +#endif /* __TASK_IO_ACCOUNTING_OPS_INCLUDED */ -- cgit v1.1 From a439fe51a1f8eb087c22dd24d69cebae4a3addac Mon Sep 17 00:00:00 2001 From: Sam Ravnborg Date: Sun, 27 Jul 2008 23:00:59 +0200 Subject: sparc, sparc64: use arch/sparc/include The majority of this patch was created by the following script: *** ASM=arch/sparc/include/asm mkdir -p $ASM git mv include/asm-sparc64/ftrace.h $ASM git rm include/asm-sparc64/* git mv include/asm-sparc/* $ASM sed -ie 's/asm-sparc64/asm/g' $ASM/* sed -ie 's/asm-sparc/asm/g' $ASM/* *** The rest was an update of the top-level Makefile to use sparc for header files when sparc64 is being build. And a small fixlet to pick up the correct unistd.h from sparc64 code. Signed-off-by: Sam Ravnborg --- include/asm-sparc/Kbuild | 1 - include/asm-sparc/agp.h | 20 - include/asm-sparc/apb.h | 36 - include/asm-sparc/apc.h | 64 - include/asm-sparc/asi.h | 262 --- include/asm-sparc/asmmacro.h | 45 - include/asm-sparc/atomic.h | 8 - include/asm-sparc/atomic_32.h | 165 -- include/asm-sparc/atomic_64.h | 128 -- include/asm-sparc/auxio.h | 8 - include/asm-sparc/auxio_32.h | 89 - include/asm-sparc/auxio_64.h | 100 -- include/asm-sparc/auxvec.h | 4 - include/asm-sparc/backoff.h | 31 - include/asm-sparc/bbc.h | 225 --- include/asm-sparc/bitext.h | 27 - include/asm-sparc/bitops.h | 8 - include/asm-sparc/bitops_32.h | 111 -- include/asm-sparc/bitops_64.h | 107 -- include/asm-sparc/bpp.h | 73 - include/asm-sparc/btfixup.h | 208 --- include/asm-sparc/bug.h | 22 - include/asm-sparc/bugs.h | 24 - include/asm-sparc/byteorder.h | 57 - include/asm-sparc/cache.h | 138 -- include/asm-sparc/cacheflush.h | 8 - include/asm-sparc/cacheflush_32.h | 85 - include/asm-sparc/cacheflush_64.h | 76 - include/asm-sparc/chafsr.h | 241 --- include/asm-sparc/checksum.h | 8 - include/asm-sparc/checksum_32.h | 241 --- include/asm-sparc/checksum_64.h | 167 -- include/asm-sparc/chmctrl.h | 183 -- include/asm-sparc/clock.h | 11 - include/asm-sparc/cmt.h | 59 - include/asm-sparc/compat.h | 243 --- include/asm-sparc/compat_signal.h | 29 - include/asm-sparc/contregs.h | 53 - include/asm-sparc/cpudata.h | 8 - include/asm-sparc/cpudata_32.h | 27 - include/asm-sparc/cpudata_64.h | 240 --- include/asm-sparc/cputime.h | 6 - include/asm-sparc/current.h | 34 - include/asm-sparc/cypress.h | 79 - include/asm-sparc/dcr.h | 14 - include/asm-sparc/dcu.h | 27 - include/asm-sparc/delay.h | 8 - include/asm-sparc/delay_32.h | 34 - include/asm-sparc/delay_64.h | 17 - include/asm-sparc/device.h | 23 - include/asm-sparc/display7seg.h | 79 - include/asm-sparc/div64.h | 1 - include/asm-sparc/dma-mapping.h | 8 - include/asm-sparc/dma-mapping_32.h | 11 - include/asm-sparc/dma-mapping_64.h | 154 -- include/asm-sparc/dma.h | 8 - include/asm-sparc/dma_32.h | 288 --- include/asm-sparc/dma_64.h | 205 --- include/asm-sparc/ebus.h | 8 - include/asm-sparc/ebus_32.h | 99 -- include/asm-sparc/ebus_64.h | 94 - include/asm-sparc/ecc.h | 122 -- include/asm-sparc/eeprom.h | 9 - include/asm-sparc/elf.h | 8 - include/asm-sparc/elf_32.h | 145 -- include/asm-sparc/elf_64.h | 217 --- include/asm-sparc/emergency-restart.h | 6 - include/asm-sparc/envctrl.h | 103 -- include/asm-sparc/errno.h | 113 -- include/asm-sparc/estate.h | 49 - include/asm-sparc/fb.h | 29 - include/asm-sparc/fbio.h | 330 ---- include/asm-sparc/fcntl.h | 40 - include/asm-sparc/fhc.h | 121 -- include/asm-sparc/fixmap.h | 110 -- include/asm-sparc/floppy.h | 8 - include/asm-sparc/floppy_32.h | 388 ---- include/asm-sparc/floppy_64.h | 782 -------- include/asm-sparc/fpumacro.h | 33 - include/asm-sparc/futex.h | 8 - include/asm-sparc/futex_32.h | 6 - include/asm-sparc/futex_64.h | 110 -- include/asm-sparc/hardirq.h | 8 - include/asm-sparc/hardirq_32.h | 23 - include/asm-sparc/hardirq_64.h | 19 - include/asm-sparc/head.h | 8 - include/asm-sparc/head_32.h | 102 -- include/asm-sparc/head_64.h | 76 - include/asm-sparc/highmem.h | 81 - include/asm-sparc/hugetlb.h | 85 - include/asm-sparc/hvtramp.h | 37 - include/asm-sparc/hw_irq.h | 6 - include/asm-sparc/hypervisor.h | 2949 ------------------------------- include/asm-sparc/ide.h | 97 - include/asm-sparc/idprom.h | 25 - include/asm-sparc/intr_queue.h | 15 - include/asm-sparc/io-unit.h | 62 - include/asm-sparc/io.h | 8 - include/asm-sparc/io_32.h | 326 ---- include/asm-sparc/io_64.h | 511 ------ include/asm-sparc/ioctl.h | 67 - include/asm-sparc/ioctls.h | 136 -- include/asm-sparc/iommu.h | 8 - include/asm-sparc/iommu_32.h | 121 -- include/asm-sparc/iommu_64.h | 62 - include/asm-sparc/ipcbuf.h | 8 - include/asm-sparc/ipcbuf_32.h | 31 - include/asm-sparc/ipcbuf_64.h | 28 - include/asm-sparc/irq.h | 8 - include/asm-sparc/irq_32.h | 15 - include/asm-sparc/irq_64.h | 93 - include/asm-sparc/irq_regs.h | 1 - include/asm-sparc/irqflags.h | 8 - include/asm-sparc/irqflags_32.h | 39 - include/asm-sparc/irqflags_64.h | 89 - include/asm-sparc/jsflash.h | 39 - include/asm-sparc/kdebug.h | 8 - include/asm-sparc/kdebug_32.h | 73 - include/asm-sparc/kdebug_64.h | 19 - include/asm-sparc/kgdb.h | 38 - include/asm-sparc/kmap_types.h | 25 - include/asm-sparc/kprobes.h | 49 - include/asm-sparc/ldc.h | 138 -- include/asm-sparc/linkage.h | 6 - include/asm-sparc/lmb.h | 10 - include/asm-sparc/local.h | 6 - include/asm-sparc/lsu.h | 19 - include/asm-sparc/machines.h | 67 - include/asm-sparc/mbus.h | 100 -- include/asm-sparc/mc146818rtc.h | 8 - include/asm-sparc/mc146818rtc_32.h | 29 - include/asm-sparc/mc146818rtc_64.h | 34 - include/asm-sparc/mdesc.h | 78 - include/asm-sparc/memreg.h | 51 - include/asm-sparc/mman.h | 31 - include/asm-sparc/mmu.h | 8 - include/asm-sparc/mmu_32.h | 7 - include/asm-sparc/mmu_64.h | 123 -- include/asm-sparc/mmu_context.h | 8 - include/asm-sparc/mmu_context_32.h | 42 - include/asm-sparc/mmu_context_64.h | 155 -- include/asm-sparc/mmzone.h | 17 - include/asm-sparc/module.h | 8 - include/asm-sparc/module_32.h | 7 - include/asm-sparc/module_64.h | 7 - include/asm-sparc/mostek.h | 8 - include/asm-sparc/mostek_32.h | 171 -- include/asm-sparc/mostek_64.h | 143 -- include/asm-sparc/mpmbox.h | 67 - include/asm-sparc/msgbuf.h | 38 - include/asm-sparc/msi.h | 31 - include/asm-sparc/mutex.h | 9 - include/asm-sparc/mxcc.h | 137 -- include/asm-sparc/ns87303.h | 118 -- include/asm-sparc/obio.h | 249 --- include/asm-sparc/of_device.h | 38 - include/asm-sparc/of_platform.h | 8 - include/asm-sparc/of_platform_32.h | 24 - include/asm-sparc/of_platform_64.h | 25 - include/asm-sparc/openprom.h | 8 - include/asm-sparc/openprom_32.h | 255 --- include/asm-sparc/openprom_64.h | 280 --- include/asm-sparc/openpromio.h | 69 - include/asm-sparc/oplib.h | 8 - include/asm-sparc/oplib_32.h | 272 --- include/asm-sparc/oplib_64.h | 322 ---- include/asm-sparc/page.h | 8 - include/asm-sparc/page_32.h | 160 -- include/asm-sparc/page_64.h | 135 -- include/asm-sparc/param.h | 22 - include/asm-sparc/parport.h | 246 --- include/asm-sparc/pbm.h | 47 - include/asm-sparc/pci.h | 8 - include/asm-sparc/pci_32.h | 171 -- include/asm-sparc/pci_64.h | 210 --- include/asm-sparc/pcic.h | 123 -- include/asm-sparc/percpu.h | 8 - include/asm-sparc/percpu_32.h | 6 - include/asm-sparc/percpu_64.h | 28 - include/asm-sparc/perfctr.h | 173 -- include/asm-sparc/pgalloc.h | 8 - include/asm-sparc/pgalloc_32.h | 68 - include/asm-sparc/pgalloc_64.h | 81 - include/asm-sparc/pgtable.h | 8 - include/asm-sparc/pgtable_32.h | 480 ----- include/asm-sparc/pgtable_64.h | 775 -------- include/asm-sparc/pgtsrmmu.h | 298 ---- include/asm-sparc/pgtsun4.h | 171 -- include/asm-sparc/pgtsun4c.h | 172 -- include/asm-sparc/pil.h | 22 - include/asm-sparc/poll.h | 12 - include/asm-sparc/posix_types.h | 8 - include/asm-sparc/posix_types_32.h | 118 -- include/asm-sparc/posix_types_64.h | 122 -- include/asm-sparc/processor.h | 8 - include/asm-sparc/processor_32.h | 128 -- include/asm-sparc/processor_64.h | 237 --- include/asm-sparc/prom.h | 108 -- include/asm-sparc/psr.h | 93 - include/asm-sparc/psrcompat.h | 45 - include/asm-sparc/pstate.h | 91 - include/asm-sparc/ptrace.h | 8 - include/asm-sparc/ptrace_32.h | 175 -- include/asm-sparc/ptrace_64.h | 346 ---- include/asm-sparc/reboot.h | 6 - include/asm-sparc/reg.h | 8 - include/asm-sparc/reg_32.h | 79 - include/asm-sparc/reg_64.h | 56 - include/asm-sparc/resource.h | 30 - include/asm-sparc/ross.h | 191 -- include/asm-sparc/rtc.h | 26 - include/asm-sparc/rwsem-const.h | 12 - include/asm-sparc/rwsem.h | 84 - include/asm-sparc/sbi.h | 115 -- include/asm-sparc/sbus.h | 8 - include/asm-sparc/sbus_32.h | 153 -- include/asm-sparc/sbus_64.h | 190 -- include/asm-sparc/scatterlist.h | 8 - include/asm-sparc/scatterlist_32.h | 26 - include/asm-sparc/scatterlist_64.h | 27 - include/asm-sparc/scratchpad.h | 14 - include/asm-sparc/seccomp.h | 21 - include/asm-sparc/sections.h | 8 - include/asm-sparc/sections_32.h | 6 - include/asm-sparc/sections_64.h | 9 - include/asm-sparc/sembuf.h | 31 - include/asm-sparc/setup.h | 14 - include/asm-sparc/sfafsr.h | 82 - include/asm-sparc/sfp-machine.h | 8 - include/asm-sparc/sfp-machine_32.h | 212 --- include/asm-sparc/sfp-machine_64.h | 93 - include/asm-sparc/shmbuf.h | 50 - include/asm-sparc/shmparam.h | 8 - include/asm-sparc/shmparam_32.h | 11 - include/asm-sparc/shmparam_64.h | 10 - include/asm-sparc/sigcontext.h | 8 - include/asm-sparc/sigcontext_32.h | 62 - include/asm-sparc/sigcontext_64.h | 87 - include/asm-sparc/siginfo.h | 8 - include/asm-sparc/siginfo_32.h | 17 - include/asm-sparc/siginfo_64.h | 32 - include/asm-sparc/signal.h | 8 - include/asm-sparc/signal_32.h | 207 --- include/asm-sparc/signal_64.h | 194 -- include/asm-sparc/smp.h | 8 - include/asm-sparc/smp_32.h | 173 -- include/asm-sparc/smp_64.h | 67 - include/asm-sparc/smpprim.h | 54 - include/asm-sparc/socket.h | 58 - include/asm-sparc/sockios.h | 14 - include/asm-sparc/sparsemem.h | 12 - include/asm-sparc/spinlock.h | 8 - include/asm-sparc/spinlock_32.h | 192 -- include/asm-sparc/spinlock_64.h | 250 --- include/asm-sparc/spinlock_types.h | 20 - include/asm-sparc/spitfire.h | 342 ---- include/asm-sparc/sstate.h | 13 - include/asm-sparc/stacktrace.h | 6 - include/asm-sparc/starfire.h | 21 - include/asm-sparc/stat.h | 8 - include/asm-sparc/stat_32.h | 76 - include/asm-sparc/stat_64.h | 47 - include/asm-sparc/statfs.h | 8 - include/asm-sparc/statfs_32.h | 6 - include/asm-sparc/statfs_64.h | 54 - include/asm-sparc/string.h | 8 - include/asm-sparc/string_32.h | 205 --- include/asm-sparc/string_64.h | 83 - include/asm-sparc/sun4paddr.h | 56 - include/asm-sparc/sun4prom.h | 83 - include/asm-sparc/sunbpp.h | 80 - include/asm-sparc/swift.h | 106 -- include/asm-sparc/syscalls.h | 13 - include/asm-sparc/sysen.h | 15 - include/asm-sparc/system.h | 8 - include/asm-sparc/system_32.h | 288 --- include/asm-sparc/system_64.h | 355 ---- include/asm-sparc/termbits.h | 266 --- include/asm-sparc/termios.h | 186 -- include/asm-sparc/thread_info.h | 8 - include/asm-sparc/thread_info_32.h | 153 -- include/asm-sparc/thread_info_64.h | 279 --- include/asm-sparc/timer.h | 8 - include/asm-sparc/timer_32.h | 107 -- include/asm-sparc/timer_64.h | 30 - include/asm-sparc/timex.h | 8 - include/asm-sparc/timex_32.h | 15 - include/asm-sparc/timex_64.h | 19 - include/asm-sparc/tlb.h | 8 - include/asm-sparc/tlb_32.h | 24 - include/asm-sparc/tlb_64.h | 111 -- include/asm-sparc/tlbflush.h | 8 - include/asm-sparc/tlbflush_32.h | 60 - include/asm-sparc/tlbflush_64.h | 44 - include/asm-sparc/topology.h | 8 - include/asm-sparc/topology_32.h | 6 - include/asm-sparc/topology_64.h | 86 - include/asm-sparc/traps.h | 140 -- include/asm-sparc/tsb.h | 283 --- include/asm-sparc/tsunami.h | 64 - include/asm-sparc/ttable.h | 658 ------- include/asm-sparc/turbosparc.h | 125 -- include/asm-sparc/types.h | 62 - include/asm-sparc/uaccess.h | 8 - include/asm-sparc/uaccess_32.h | 336 ---- include/asm-sparc/uaccess_64.h | 273 --- include/asm-sparc/uctx.h | 71 - include/asm-sparc/unaligned.h | 10 - include/asm-sparc/unistd.h | 8 - include/asm-sparc/unistd_32.h | 384 ---- include/asm-sparc/unistd_64.h | 379 ---- include/asm-sparc/upa.h | 109 -- include/asm-sparc/user.h | 6 - include/asm-sparc/utrap.h | 51 - include/asm-sparc/vac-ops.h | 134 -- include/asm-sparc/vaddrs.h | 64 - include/asm-sparc/vfc_ioctls.h | 58 - include/asm-sparc/vga.h | 33 - include/asm-sparc/viking.h | 253 --- include/asm-sparc/vio.h | 406 ----- include/asm-sparc/visasm.h | 62 - include/asm-sparc/watchdog.h | 31 - include/asm-sparc/winmacro.h | 135 -- include/asm-sparc/xor.h | 8 - include/asm-sparc/xor_32.h | 269 --- include/asm-sparc/xor_64.h | 70 - include/asm-sparc64/Kbuild | 1 - include/asm-sparc64/agp.h | 1 - include/asm-sparc64/apb.h | 1 - include/asm-sparc64/asi.h | 1 - include/asm-sparc64/atomic.h | 1 - include/asm-sparc64/auxio.h | 1 - include/asm-sparc64/auxvec.h | 1 - include/asm-sparc64/backoff.h | 1 - include/asm-sparc64/bbc.h | 1 - include/asm-sparc64/bitops.h | 1 - include/asm-sparc64/bpp.h | 1 - include/asm-sparc64/bug.h | 1 - include/asm-sparc64/bugs.h | 1 - include/asm-sparc64/byteorder.h | 1 - include/asm-sparc64/cache.h | 1 - include/asm-sparc64/cacheflush.h | 1 - include/asm-sparc64/chafsr.h | 1 - include/asm-sparc64/checksum.h | 1 - include/asm-sparc64/chmctrl.h | 1 - include/asm-sparc64/cmt.h | 1 - include/asm-sparc64/compat.h | 1 - include/asm-sparc64/compat_signal.h | 1 - include/asm-sparc64/cpudata.h | 1 - include/asm-sparc64/cputime.h | 1 - include/asm-sparc64/current.h | 1 - include/asm-sparc64/dcr.h | 1 - include/asm-sparc64/dcu.h | 1 - include/asm-sparc64/delay.h | 1 - include/asm-sparc64/device.h | 1 - include/asm-sparc64/display7seg.h | 1 - include/asm-sparc64/div64.h | 1 - include/asm-sparc64/dma-mapping.h | 1 - include/asm-sparc64/dma.h | 1 - include/asm-sparc64/ebus.h | 1 - include/asm-sparc64/elf.h | 1 - include/asm-sparc64/emergency-restart.h | 1 - include/asm-sparc64/envctrl.h | 1 - include/asm-sparc64/errno.h | 1 - include/asm-sparc64/estate.h | 1 - include/asm-sparc64/fb.h | 1 - include/asm-sparc64/fbio.h | 1 - include/asm-sparc64/fcntl.h | 1 - include/asm-sparc64/fhc.h | 1 - include/asm-sparc64/floppy.h | 1 - include/asm-sparc64/fpumacro.h | 1 - include/asm-sparc64/ftrace.h | 14 - include/asm-sparc64/futex.h | 1 - include/asm-sparc64/hardirq.h | 1 - include/asm-sparc64/head.h | 1 - include/asm-sparc64/hugetlb.h | 1 - include/asm-sparc64/hvtramp.h | 1 - include/asm-sparc64/hw_irq.h | 1 - include/asm-sparc64/hypervisor.h | 1 - include/asm-sparc64/ide.h | 1 - include/asm-sparc64/idprom.h | 1 - include/asm-sparc64/intr_queue.h | 1 - include/asm-sparc64/io.h | 1 - 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delete mode 100644 include/asm-sparc64/unaligned.h delete mode 100644 include/asm-sparc64/unistd.h delete mode 100644 include/asm-sparc64/upa.h delete mode 100644 include/asm-sparc64/user.h delete mode 100644 include/asm-sparc64/utrap.h delete mode 100644 include/asm-sparc64/vga.h delete mode 100644 include/asm-sparc64/vio.h delete mode 100644 include/asm-sparc64/visasm.h delete mode 100644 include/asm-sparc64/watchdog.h delete mode 100644 include/asm-sparc64/xor.h (limited to 'include') diff --git a/include/asm-sparc/Kbuild b/include/asm-sparc/Kbuild deleted file mode 100644 index 6cdaf9d..0000000 --- a/include/asm-sparc/Kbuild +++ /dev/null @@ -1 +0,0 @@ -# dummy file to avoid breaking make headers_install diff --git a/include/asm-sparc/agp.h b/include/asm-sparc/agp.h deleted file mode 100644 index c245687..0000000 --- a/include/asm-sparc/agp.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef AGP_H -#define AGP_H 1 - -/* dummy for now */ - -#define map_page_into_agp(page) -#define unmap_page_from_agp(page) -#define flush_agp_cache() mb() - -/* Convert a physical address to an address suitable for the GART. */ -#define phys_to_gart(x) (x) -#define gart_to_phys(x) (x) - -/* GATT allocation. Returns/accepts GATT kernel virtual address. */ -#define alloc_gatt_pages(order) \ - ((char *)__get_free_pages(GFP_KERNEL, (order))) -#define free_gatt_pages(table, order) \ - free_pages((unsigned long)(table), (order)) - -#endif diff --git a/include/asm-sparc/apb.h b/include/asm-sparc/apb.h deleted file mode 100644 index 8f3b57d..0000000 --- a/include/asm-sparc/apb.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * apb.h: Advanced PCI Bridge Configuration Registers and Bits - * - * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef _SPARC64_APB_H -#define _SPARC64_APB_H - -#define APB_TICK_REGISTER 0xb0 -#define APB_INT_ACK 0xb8 -#define APB_PRIMARY_MASTER_RETRY_LIMIT 0xc0 -#define APB_DMA_ASFR 0xc8 -#define APB_DMA_AFAR 0xd0 -#define APB_PIO_TARGET_RETRY_LIMIT 0xd8 -#define APB_PIO_TARGET_LATENCY_TIMER 0xd9 -#define APB_DMA_TARGET_RETRY_LIMIT 0xda -#define APB_DMA_TARGET_LATENCY_TIMER 0xdb -#define APB_SECONDARY_MASTER_RETRY_LIMIT 0xdc -#define APB_SECONDARY_CONTROL 0xdd -#define APB_IO_ADDRESS_MAP 0xde -#define APB_MEM_ADDRESS_MAP 0xdf - -#define APB_PCI_CONTROL_LOW 0xe0 -# define APB_PCI_CTL_LOW_ARB_PARK (1 << 21) -# define APB_PCI_CTL_LOW_ERRINT_EN (1 << 8) - -#define APB_PCI_CONTROL_HIGH 0xe4 -# define APB_PCI_CTL_HIGH_SERR (1 << 2) -# define APB_PCI_CTL_HIGH_ARBITER_EN (1 << 0) - -#define APB_PIO_ASFR 0xe8 -#define APB_PIO_AFAR 0xf0 -#define APB_DIAG_REGISTER 0xf8 - -#endif /* !(_SPARC64_APB_H) */ diff --git a/include/asm-sparc/apc.h b/include/asm-sparc/apc.h deleted file mode 100644 index 24e9a7d..0000000 --- a/include/asm-sparc/apc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* apc - Driver definitions for power management functions - * of Aurora Personality Chip (APC) on SPARCstation-4/5 and - * derivatives - * - * Copyright (c) 2001 Eric Brower (ebrower@usa.net) - * - */ - -#ifndef _SPARC_APC_H -#define _SPARC_APC_H - -#include - -#define APC_IOC 'A' - -#define APCIOCGFANCTL _IOR(APC_IOC, 0x00, int) /* Get fan speed */ -#define APCIOCSFANCTL _IOW(APC_IOC, 0x01, int) /* Set fan speed */ - -#define APCIOCGCPWR _IOR(APC_IOC, 0x02, int) /* Get CPOWER state */ -#define APCIOCSCPWR _IOW(APC_IOC, 0x03, int) /* Set CPOWER state */ - -#define APCIOCGBPORT _IOR(APC_IOC, 0x04, int) /* Get BPORT state */ -#define APCIOCSBPORT _IOW(APC_IOC, 0x05, int) /* Set BPORT state */ - -/* - * Register offsets - */ -#define APC_IDLE_REG 0x00 -#define APC_FANCTL_REG 0x20 -#define APC_CPOWER_REG 0x24 -#define APC_BPORT_REG 0x30 - -#define APC_REGMASK 0x01 -#define APC_BPMASK 0x03 - -/* - * IDLE - CPU standby values (set to initiate standby) - */ -#define APC_IDLE_ON 0x01 - -/* - * FANCTL - Fan speed control state values - */ -#define APC_FANCTL_HI 0x00 /* Fan speed high */ -#define APC_FANCTL_LO 0x01 /* Fan speed low */ - -/* - * CPWR - Convenience power outlet state values - */ -#define APC_CPOWER_ON 0x00 /* Conv power on */ -#define APC_CPOWER_OFF 0x01 /* Conv power off */ - -/* - * BPA/BPB - Read-Write "Bit Ports" state values (reset to 0 at power-on) - * - * WARNING: Internal usage of bit ports is platform dependent-- - * don't modify BPORT settings unless you know what you are doing. - * - * On SS5 BPA seems to toggle onboard ethernet loopback... -E - */ -#define APC_BPORT_A 0x01 /* Bit Port A */ -#define APC_BPORT_B 0x02 /* Bit Port B */ - -#endif /* !(_SPARC_APC_H) */ diff --git a/include/asm-sparc/asi.h b/include/asm-sparc/asi.h deleted file mode 100644 index 74703c5..0000000 --- a/include/asm-sparc/asi.h +++ /dev/null @@ -1,262 +0,0 @@ -#ifndef _SPARC_ASI_H -#define _SPARC_ASI_H - -/* asi.h: Address Space Identifier values for the sparc. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - * - * Pioneer work for sun4m: Paul Hatchman (paul@sfe.com.au) - * Joint edition for sun4c+sun4m: Pete A. Zaitcev - */ - -/* The first batch are for the sun4c. */ - -#define ASI_NULL1 0x00 -#define ASI_NULL2 0x01 - -/* sun4c and sun4 control registers and mmu/vac ops */ -#define ASI_CONTROL 0x02 -#define ASI_SEGMAP 0x03 -#define ASI_PTE 0x04 -#define ASI_HWFLUSHSEG 0x05 -#define ASI_HWFLUSHPAGE 0x06 -#define ASI_REGMAP 0x06 -#define ASI_HWFLUSHCONTEXT 0x07 - -#define ASI_USERTXT 0x08 -#define ASI_KERNELTXT 0x09 -#define ASI_USERDATA 0x0a -#define ASI_KERNELDATA 0x0b - -/* VAC Cache flushing on sun4c and sun4 */ -#define ASI_FLUSHSEG 0x0c -#define ASI_FLUSHPG 0x0d -#define ASI_FLUSHCTX 0x0e - -/* SPARCstation-5: only 6 bits are decoded. */ -/* wo = Write Only, rw = Read Write; */ -/* ss = Single Size, as = All Sizes; */ -#define ASI_M_RES00 0x00 /* Don't touch... */ -#define ASI_M_UNA01 0x01 /* Same here... */ -#define ASI_M_MXCC 0x02 /* Access to TI VIKING MXCC registers */ -#define ASI_M_FLUSH_PROBE 0x03 /* Reference MMU Flush/Probe; rw, ss */ -#define ASI_M_MMUREGS 0x04 /* MMU Registers; rw, ss */ -#define ASI_M_TLBDIAG 0x05 /* MMU TLB only Diagnostics */ -#define ASI_M_DIAGS 0x06 /* Reference MMU Diagnostics */ -#define ASI_M_IODIAG 0x07 /* MMU I/O TLB only Diagnostics */ -#define ASI_M_USERTXT 0x08 /* Same as ASI_USERTXT; rw, as */ -#define ASI_M_KERNELTXT 0x09 /* Same as ASI_KERNELTXT; rw, as */ -#define ASI_M_USERDATA 0x0A /* Same as ASI_USERDATA; rw, as */ -#define ASI_M_KERNELDATA 0x0B /* Same as ASI_KERNELDATA; rw, as */ -#define ASI_M_TXTC_TAG 0x0C /* Instruction Cache Tag; rw, ss */ -#define ASI_M_TXTC_DATA 0x0D /* Instruction Cache Data; rw, ss */ -#define ASI_M_DATAC_TAG 0x0E /* Data Cache Tag; rw, ss */ -#define ASI_M_DATAC_DATA 0x0F /* Data Cache Data; rw, ss */ - -/* The following cache flushing ASIs work only with the 'sta' - * instruction. Results are unpredictable for 'swap' and 'ldstuba', - * so don't do it. - */ - -/* These ASI flushes affect external caches too. */ -#define ASI_M_FLUSH_PAGE 0x10 /* Flush I&D Cache Line (page); wo, ss */ -#define ASI_M_FLUSH_SEG 0x11 /* Flush I&D Cache Line (seg); wo, ss */ -#define ASI_M_FLUSH_REGION 0x12 /* Flush I&D Cache Line (region); wo, ss */ -#define ASI_M_FLUSH_CTX 0x13 /* Flush I&D Cache Line (context); wo, ss */ -#define ASI_M_FLUSH_USER 0x14 /* Flush I&D Cache Line (user); wo, ss */ - -/* Block-copy operations are available only on certain V8 cpus. */ -#define ASI_M_BCOPY 0x17 /* Block copy */ - -/* These affect only the ICACHE and are Ross HyperSparc and TurboSparc specific. */ -#define ASI_M_IFLUSH_PAGE 0x18 /* Flush I Cache Line (page); wo, ss */ -#define ASI_M_IFLUSH_SEG 0x19 /* Flush I Cache Line (seg); wo, ss */ -#define ASI_M_IFLUSH_REGION 0x1A /* Flush I Cache Line (region); wo, ss */ -#define ASI_M_IFLUSH_CTX 0x1B /* Flush I Cache Line (context); wo, ss */ -#define ASI_M_IFLUSH_USER 0x1C /* Flush I Cache Line (user); wo, ss */ - -/* Block-fill operations are available on certain V8 cpus */ -#define ASI_M_BFILL 0x1F - -/* This allows direct access to main memory, actually 0x20 to 0x2f are - * the available ASI's for physical ram pass-through, but I don't have - * any idea what the other ones do.... - */ - -#define ASI_M_BYPASS 0x20 /* Reference MMU bypass; rw, as */ -#define ASI_M_FBMEM 0x29 /* Graphics card frame buffer access */ -#define ASI_M_VMEUS 0x2A /* VME user 16-bit access */ -#define ASI_M_VMEPS 0x2B /* VME priv 16-bit access */ -#define ASI_M_VMEUT 0x2C /* VME user 32-bit access */ -#define ASI_M_VMEPT 0x2D /* VME priv 32-bit access */ -#define ASI_M_SBUS 0x2E /* Direct SBus access */ -#define ASI_M_CTL 0x2F /* Control Space (ECC and MXCC are here) */ - - -/* This is ROSS HyperSparc only. */ -#define ASI_M_FLUSH_IWHOLE 0x31 /* Flush entire ICACHE; wo, ss */ - -/* Tsunami/Viking/TurboSparc i/d cache flash clear. */ -#define ASI_M_IC_FLCLEAR 0x36 -#define ASI_M_DC_FLCLEAR 0x37 - -#define ASI_M_DCDR 0x39 /* Data Cache Diagnostics Register rw, ss */ - -#define ASI_M_VIKING_TMP1 0x40 /* Emulation temporary 1 on Viking */ -/* only available on SuperSparc I */ -/* #define ASI_M_VIKING_TMP2 0x41 */ /* Emulation temporary 2 on Viking */ - -#define ASI_M_ACTION 0x4c /* Breakpoint Action Register (GNU/Viking) */ - -/* V9 Architecture mandary ASIs. */ -#define ASI_N 0x04 /* Nucleus */ -#define ASI_NL 0x0c /* Nucleus, little endian */ -#define ASI_AIUP 0x10 /* Primary, user */ -#define ASI_AIUS 0x11 /* Secondary, user */ -#define ASI_AIUPL 0x18 /* Primary, user, little endian */ -#define ASI_AIUSL 0x19 /* Secondary, user, little endian */ -#define ASI_P 0x80 /* Primary, implicit */ -#define ASI_S 0x81 /* Secondary, implicit */ -#define ASI_PNF 0x82 /* Primary, no fault */ -#define ASI_SNF 0x83 /* Secondary, no fault */ -#define ASI_PL 0x88 /* Primary, implicit, l-endian */ -#define ASI_SL 0x89 /* Secondary, implicit, l-endian */ -#define ASI_PNFL 0x8a /* Primary, no fault, l-endian */ -#define ASI_SNFL 0x8b /* Secondary, no fault, l-endian */ - -/* SpitFire and later extended ASIs. The "(III)" marker designates - * UltraSparc-III and later specific ASIs. The "(CMT)" marker designates - * Chip Multi Threading specific ASIs. "(NG)" designates Niagara specific - * ASIs, "(4V)" designates SUN4V specific ASIs. - */ -#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ -#define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ -#define ASI_BLK_AIUP_4V 0x16 /* (4V) Prim, user, block ld/st */ -#define ASI_BLK_AIUS_4V 0x17 /* (4V) Sec, user, block ld/st */ -#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ -#define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ -#define ASI_BLK_AIUP_L_4V 0x1e /* (4V) Prim, user, block, l-endian*/ -#define ASI_BLK_AIUS_L_4V 0x1f /* (4V) Sec, user, block, l-endian */ -#define ASI_SCRATCHPAD 0x20 /* (4V) Scratch Pad Registers */ -#define ASI_MMU 0x21 /* (4V) MMU Context Registers */ -#define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load, - * secondary, user - */ -#define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cachable, qword load */ -#define ASI_QUEUE 0x25 /* (4V) Interrupt Queue Registers */ -#define ASI_QUAD_LDD_PHYS_4V 0x26 /* (4V) Physical, qword load */ -#define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cachable, qword load, l-endian */ -#define ASI_QUAD_LDD_PHYS_L_4V 0x2e /* (4V) Phys, qword load, l-endian */ -#define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ -#define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ -#define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */ -#define ASI_PCACHE_SNOOP_TAG 0x33 /* (III) PCache snoop tag RAM diag */ -#define ASI_QUAD_LDD_PHYS 0x34 /* (III+) PADDR, qword load */ -#define ASI_WCACHE_VALID_BITS 0x38 /* (III) WCache Valid Bits diag */ -#define ASI_WCACHE_DATA 0x39 /* (III) WCache data RAM diag */ -#define ASI_WCACHE_TAG 0x3a /* (III) WCache tag RAM diag */ -#define ASI_WCACHE_SNOOP_TAG 0x3b /* (III) WCache snoop tag RAM diag */ -#define ASI_QUAD_LDD_PHYS_L 0x3c /* (III+) PADDR, qw-load, l-endian */ -#define ASI_SRAM_FAST_INIT 0x40 /* (III+) Fast SRAM init */ -#define ASI_CORE_AVAILABLE 0x41 /* (CMT) LP Available */ -#define ASI_CORE_ENABLE_STAT 0x41 /* (CMT) LP Enable Status */ -#define ASI_CORE_ENABLE 0x41 /* (CMT) LP Enable RW */ -#define ASI_XIR_STEERING 0x41 /* (CMT) XIR Steering RW */ -#define ASI_CORE_RUNNING_RW 0x41 /* (CMT) LP Running RW */ -#define ASI_CORE_RUNNING_W1S 0x41 /* (CMT) LP Running Write-One Set */ -#define ASI_CORE_RUNNING_W1C 0x41 /* (CMT) LP Running Write-One Clr */ -#define ASI_CORE_RUNNING_STAT 0x41 /* (CMT) LP Running Status */ -#define ASI_CMT_ERROR_STEERING 0x41 /* (CMT) Error Steering RW */ -#define ASI_DCACHE_INVALIDATE 0x42 /* (III) DCache Invalidate diag */ -#define ASI_DCACHE_UTAG 0x43 /* (III) DCache uTag diag */ -#define ASI_DCACHE_SNOOP_TAG 0x44 /* (III) DCache snoop tag RAM diag */ -#define ASI_LSU_CONTROL 0x45 /* Load-store control unit */ -#define ASI_DCU_CONTROL_REG 0x45 /* (III) DCache Unit Control reg */ -#define ASI_DCACHE_DATA 0x46 /* DCache data-ram diag access */ -#define ASI_DCACHE_TAG 0x47 /* Dcache tag/valid ram diag access*/ -#define ASI_INTR_DISPATCH_STAT 0x48 /* IRQ vector dispatch status */ -#define ASI_INTR_RECEIVE 0x49 /* IRQ vector receive status */ -#define ASI_UPA_CONFIG 0x4a /* UPA config space */ -#define ASI_JBUS_CONFIG 0x4a /* (IIIi) JBUS Config Register */ -#define ASI_SAFARI_CONFIG 0x4a /* (III) Safari Config Register */ -#define ASI_SAFARI_ADDRESS 0x4a /* (III) Safari Address Register */ -#define ASI_ESTATE_ERROR_EN 0x4b /* E-cache error enable space */ -#define ASI_AFSR 0x4c /* Async fault status register */ -#define ASI_AFAR 0x4d /* Async fault address register */ -#define ASI_EC_TAG_DATA 0x4e /* E-cache tag/valid ram diag acc */ -#define ASI_IMMU 0x50 /* Insn-MMU main register space */ -#define ASI_IMMU_TSB_8KB_PTR 0x51 /* Insn-MMU 8KB TSB pointer reg */ -#define ASI_IMMU_TSB_64KB_PTR 0x52 /* Insn-MMU 64KB TSB pointer reg */ -#define ASI_ITLB_DATA_IN 0x54 /* Insn-MMU TLB data in reg */ -#define ASI_ITLB_DATA_ACCESS 0x55 /* Insn-MMU TLB data access reg */ -#define ASI_ITLB_TAG_READ 0x56 /* Insn-MMU TLB tag read reg */ -#define ASI_IMMU_DEMAP 0x57 /* Insn-MMU TLB demap */ -#define ASI_DMMU 0x58 /* Data-MMU main register space */ -#define ASI_DMMU_TSB_8KB_PTR 0x59 /* Data-MMU 8KB TSB pointer reg */ -#define ASI_DMMU_TSB_64KB_PTR 0x5a /* Data-MMU 16KB TSB pointer reg */ -#define ASI_DMMU_TSB_DIRECT_PTR 0x5b /* Data-MMU TSB direct pointer reg */ -#define ASI_DTLB_DATA_IN 0x5c /* Data-MMU TLB data in reg */ -#define ASI_DTLB_DATA_ACCESS 0x5d /* Data-MMU TLB data access reg */ -#define ASI_DTLB_TAG_READ 0x5e /* Data-MMU TLB tag read reg */ -#define ASI_DMMU_DEMAP 0x5f /* Data-MMU TLB demap */ -#define ASI_IIU_INST_TRAP 0x60 /* (III) Instruction Breakpoint */ -#define ASI_INTR_ID 0x63 /* (CMT) Interrupt ID register */ -#define ASI_CORE_ID 0x63 /* (CMT) LP ID register */ -#define ASI_CESR_ID 0x63 /* (CMT) CESR ID register */ -#define ASI_IC_INSTR 0x66 /* Insn cache instrucion ram diag */ -#define ASI_IC_TAG 0x67 /* Insn cache tag/valid ram diag */ -#define ASI_IC_STAG 0x68 /* (III) Insn cache snoop tag ram */ -#define ASI_IC_PRE_DECODE 0x6e /* Insn cache pre-decode ram diag */ -#define ASI_IC_NEXT_FIELD 0x6f /* Insn cache next-field ram diag */ -#define ASI_BRPRED_ARRAY 0x6f /* (III) Branch Prediction RAM diag*/ -#define ASI_BLK_AIUP 0x70 /* Primary, user, block load/store */ -#define ASI_BLK_AIUS 0x71 /* Secondary, user, block ld/st */ -#define ASI_MCU_CTRL_REG 0x72 /* (III) Memory controller regs */ -#define ASI_EC_DATA 0x74 /* (III) E-cache data staging reg */ -#define ASI_EC_CTRL 0x75 /* (III) E-cache control reg */ -#define ASI_EC_W 0x76 /* E-cache diag write access */ -#define ASI_UDB_ERROR_W 0x77 /* External UDB error regs W */ -#define ASI_UDB_CONTROL_W 0x77 /* External UDB control regs W */ -#define ASI_INTR_W 0x77 /* IRQ vector dispatch write */ -#define ASI_INTR_DATAN_W 0x77 /* (III) Out irq vector data reg N */ -#define ASI_INTR_DISPATCH_W 0x77 /* (III) Interrupt vector dispatch */ -#define ASI_BLK_AIUPL 0x78 /* Primary, user, little, blk ld/st*/ -#define ASI_BLK_AIUSL 0x79 /* Secondary, user, little, blk ld/st*/ -#define ASI_EC_R 0x7e /* E-cache diag read access */ -#define ASI_UDBH_ERROR_R 0x7f /* External UDB error regs rd hi */ -#define ASI_UDBL_ERROR_R 0x7f /* External UDB error regs rd low */ -#define ASI_UDBH_CONTROL_R 0x7f /* External UDB control regs rd hi */ -#define ASI_UDBL_CONTROL_R 0x7f /* External UDB control regs rd low*/ -#define ASI_INTR_R 0x7f /* IRQ vector dispatch read */ -#define ASI_INTR_DATAN_R 0x7f /* (III) In irq vector data reg N */ -#define ASI_PST8_P 0xc0 /* Primary, 8 8-bit, partial */ -#define ASI_PST8_S 0xc1 /* Secondary, 8 8-bit, partial */ -#define ASI_PST16_P 0xc2 /* Primary, 4 16-bit, partial */ -#define ASI_PST16_S 0xc3 /* Secondary, 4 16-bit, partial */ -#define ASI_PST32_P 0xc4 /* Primary, 2 32-bit, partial */ -#define ASI_PST32_S 0xc5 /* Secondary, 2 32-bit, partial */ -#define ASI_PST8_PL 0xc8 /* Primary, 8 8-bit, partial, L */ -#define ASI_PST8_SL 0xc9 /* Secondary, 8 8-bit, partial, L */ -#define ASI_PST16_PL 0xca /* Primary, 4 16-bit, partial, L */ -#define ASI_PST16_SL 0xcb /* Secondary, 4 16-bit, partial, L */ -#define ASI_PST32_PL 0xcc /* Primary, 2 32-bit, partial, L */ -#define ASI_PST32_SL 0xcd /* Secondary, 2 32-bit, partial, L */ -#define ASI_FL8_P 0xd0 /* Primary, 1 8-bit, fpu ld/st */ -#define ASI_FL8_S 0xd1 /* Secondary, 1 8-bit, fpu ld/st */ -#define ASI_FL16_P 0xd2 /* Primary, 1 16-bit, fpu ld/st */ -#define ASI_FL16_S 0xd3 /* Secondary, 1 16-bit, fpu ld/st */ -#define ASI_FL8_PL 0xd8 /* Primary, 1 8-bit, fpu ld/st, L */ -#define ASI_FL8_SL 0xd9 /* Secondary, 1 8-bit, fpu ld/st, L*/ -#define ASI_FL16_PL 0xda /* Primary, 1 16-bit, fpu ld/st, L */ -#define ASI_FL16_SL 0xdb /* Secondary, 1 16-bit, fpu ld/st,L*/ -#define ASI_BLK_COMMIT_P 0xe0 /* Primary, blk store commit */ -#define ASI_BLK_COMMIT_S 0xe1 /* Secondary, blk store commit */ -#define ASI_BLK_INIT_QUAD_LDD_P 0xe2 /* (NG) init-store, twin load, - * primary, implicit - */ -#define ASI_BLK_P 0xf0 /* Primary, blk ld/st */ -#define ASI_BLK_S 0xf1 /* Secondary, blk ld/st */ -#define ASI_BLK_PL 0xf8 /* Primary, blk ld/st, little */ -#define ASI_BLK_SL 0xf9 /* Secondary, blk ld/st, little */ - -#endif /* _SPARC_ASI_H */ diff --git a/include/asm-sparc/asmmacro.h b/include/asm-sparc/asmmacro.h deleted file mode 100644 index a619a4d..0000000 --- a/include/asm-sparc/asmmacro.h +++ /dev/null @@ -1,45 +0,0 @@ -/* asmmacro.h: Assembler macros. - * - * Copyright (C) 1996 David S. Miller (davem@caipfs.rutgers.edu) - */ - -#ifndef _SPARC_ASMMACRO_H -#define _SPARC_ASMMACRO_H - -#include -#include - -#define GET_PROCESSOR4M_ID(reg) \ - rd %tbr, %reg; \ - srl %reg, 12, %reg; \ - and %reg, 3, %reg; - -#define GET_PROCESSOR4D_ID(reg) \ - lda [%g0] ASI_M_VIKING_TMP1, %reg; - -/* All trap entry points _must_ begin with this macro or else you - * lose. It makes sure the kernel has a proper window so that - * c-code can be called. - */ -#define SAVE_ALL_HEAD \ - sethi %hi(trap_setup), %l4; \ - jmpl %l4 + %lo(trap_setup), %l6; -#define SAVE_ALL \ - SAVE_ALL_HEAD \ - nop; - -/* All traps low-level code here must end with this macro. */ -#define RESTORE_ALL b ret_trap_entry; clr %l6; - -/* sun4 probably wants half word accesses to ASI_SEGMAP, while sun4c+ - likes byte accesses. These are to avoid ifdef mania. */ - -#ifdef CONFIG_SUN4 -#define lduXa lduha -#define stXa stha -#else -#define lduXa lduba -#define stXa stba -#endif - -#endif /* !(_SPARC_ASMMACRO_H) */ diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h deleted file mode 100644 index 66d8166..0000000 --- a/include/asm-sparc/atomic.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_ATOMIC_H -#define ___ASM_SPARC_ATOMIC_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/atomic_32.h b/include/asm-sparc/atomic_32.h deleted file mode 100644 index 5c944b5..0000000 --- a/include/asm-sparc/atomic_32.h +++ /dev/null @@ -1,165 +0,0 @@ -/* atomic.h: These still suck, but the I-cache hit rate is higher. - * - * Copyright (C) 1996 David S. Miller (davem@davemloft.net) - * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) - * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org) - * - * Additions by Keith M Wesolowski (wesolows@foobazco.org) based - * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf . - */ - -#ifndef __ARCH_SPARC_ATOMIC__ -#define __ARCH_SPARC_ATOMIC__ - -#include - -typedef struct { volatile int counter; } atomic_t; - -#ifdef __KERNEL__ - -#define ATOMIC_INIT(i) { (i) } - -extern int __atomic_add_return(int, atomic_t *); -extern int atomic_cmpxchg(atomic_t *, int, int); -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -extern int atomic_add_unless(atomic_t *, int, int); -extern void atomic_set(atomic_t *, int); - -#define atomic_read(v) ((v)->counter) - -#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) -#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) -#define atomic_inc(v) ((void)__atomic_add_return( 1, (v))) -#define atomic_dec(v) ((void)__atomic_add_return( -1, (v))) - -#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v))) -#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v))) -#define atomic_inc_return(v) (__atomic_add_return( 1, (v))) -#define atomic_dec_return(v) (__atomic_add_return( -1, (v))) - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) -#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -/* This is the old 24-bit implementation. It's still used internally - * by some sparc-specific code, notably the semaphore implementation. - */ -typedef struct { volatile int counter; } atomic24_t; - -#ifndef CONFIG_SMP - -#define ATOMIC24_INIT(i) { (i) } -#define atomic24_read(v) ((v)->counter) -#define atomic24_set(v, i) (((v)->counter) = i) - -#else -/* We do the bulk of the actual work out of line in two common - * routines in assembler, see arch/sparc/lib/atomic.S for the - * "fun" details. - * - * For SMP the trick is you embed the spin lock byte within - * the word, use the low byte so signedness is easily retained - * via a quick arithmetic shift. It looks like this: - * - * ---------------------------------------- - * | signed 24-bit counter value | lock | atomic_t - * ---------------------------------------- - * 31 8 7 0 - */ - -#define ATOMIC24_INIT(i) { ((i) << 8) } - -static inline int atomic24_read(const atomic24_t *v) -{ - int ret = v->counter; - - while(ret & 0xff) - ret = v->counter; - - return ret >> 8; -} - -#define atomic24_set(v, i) (((v)->counter) = ((i) << 8)) -#endif - -static inline int __atomic24_add(int i, atomic24_t *v) -{ - register volatile int *ptr asm("g1"); - register int increment asm("g2"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g7"); - - ptr = &v->counter; - increment = i; - - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___atomic24_add\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) - : "0" (increment), "r" (ptr) - : "memory", "cc"); - - return increment; -} - -static inline int __atomic24_sub(int i, atomic24_t *v) -{ - register volatile int *ptr asm("g1"); - register int increment asm("g2"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g7"); - - ptr = &v->counter; - increment = i; - - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___atomic24_sub\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) - : "0" (increment), "r" (ptr) - : "memory", "cc"); - - return increment; -} - -#define atomic24_add(i, v) ((void)__atomic24_add((i), (v))) -#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v))) - -#define atomic24_dec_return(v) __atomic24_sub(1, (v)) -#define atomic24_inc_return(v) __atomic24_add(1, (v)) - -#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0) -#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0) - -#define atomic24_inc(v) ((void)__atomic24_add(1, (v))) -#define atomic24_dec(v) ((void)__atomic24_sub(1, (v))) - -#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0) - -/* Atomic operations are already serializing */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#endif /* !(__KERNEL__) */ - -#include -#endif /* !(__ARCH_SPARC_ATOMIC__) */ diff --git a/include/asm-sparc/atomic_64.h b/include/asm-sparc/atomic_64.h deleted file mode 100644 index 2c71ec4a..0000000 --- a/include/asm-sparc/atomic_64.h +++ /dev/null @@ -1,128 +0,0 @@ -/* atomic.h: Thankfully the V9 is at least reasonable for this - * stuff. - * - * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) - */ - -#ifndef __ARCH_SPARC64_ATOMIC__ -#define __ARCH_SPARC64_ATOMIC__ - -#include -#include - -typedef struct { volatile int counter; } atomic_t; -typedef struct { volatile __s64 counter; } atomic64_t; - -#define ATOMIC_INIT(i) { (i) } -#define ATOMIC64_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic64_read(v) ((v)->counter) - -#define atomic_set(v, i) (((v)->counter) = i) -#define atomic64_set(v, i) (((v)->counter) = i) - -extern void atomic_add(int, atomic_t *); -extern void atomic64_add(int, atomic64_t *); -extern void atomic_sub(int, atomic_t *); -extern void atomic64_sub(int, atomic64_t *); - -extern int atomic_add_ret(int, atomic_t *); -extern int atomic64_add_ret(int, atomic64_t *); -extern int atomic_sub_ret(int, atomic_t *); -extern int atomic64_sub_ret(int, atomic64_t *); - -#define atomic_dec_return(v) atomic_sub_ret(1, v) -#define atomic64_dec_return(v) atomic64_sub_ret(1, v) - -#define atomic_inc_return(v) atomic_add_ret(1, v) -#define atomic64_inc_return(v) atomic64_add_ret(1, v) - -#define atomic_sub_return(i, v) atomic_sub_ret(i, v) -#define atomic64_sub_return(i, v) atomic64_sub_ret(i, v) - -#define atomic_add_return(i, v) atomic_add_ret(i, v) -#define atomic64_add_return(i, v) atomic64_add_ret(i, v) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) -#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) - -#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) -#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) - -#define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0) -#define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0) - -#define atomic_inc(v) atomic_add(1, v) -#define atomic64_inc(v) atomic64_add(1, v) - -#define atomic_dec(v) atomic_sub(1, v) -#define atomic64_dec(v) atomic64_sub(1, v) - -#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) -#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) - -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic64_cmpxchg(v, o, n) \ - ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -static inline int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - long c, old; - c = atomic64_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic64_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -/* Atomic operations are already serializing */ -#ifdef CONFIG_SMP -#define smp_mb__before_atomic_dec() membar_storeload_loadload(); -#define smp_mb__after_atomic_dec() membar_storeload_storestore(); -#define smp_mb__before_atomic_inc() membar_storeload_loadload(); -#define smp_mb__after_atomic_inc() membar_storeload_storestore(); -#else -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() -#endif - -#include -#endif /* !(__ARCH_SPARC64_ATOMIC__) */ diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h deleted file mode 100644 index 24c6f3c..0000000 --- a/include/asm-sparc/auxio.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_AUXIO_H -#define ___ASM_SPARC_AUXIO_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/auxio_32.h b/include/asm-sparc/auxio_32.h deleted file mode 100644 index 4db8f23..0000000 --- a/include/asm-sparc/auxio_32.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * auxio.h: Definitions and code for the Auxiliary I/O register. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_AUXIO_H -#define _SPARC_AUXIO_H - -#include -#include - -/* This register is an unsigned char in IO space. It does two things. - * First, it is used to control the front panel LED light on machines - * that have it (good for testing entry points to trap handlers and irq's) - * Secondly, it controls various floppy drive parameters. - */ -#define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ -#define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ -#define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ -#define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ -#define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ -#define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ -#define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ - -/* Set the following to one, then zero, after doing a pseudo DMA transfer. */ -#define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ - -/* Set the following to zero to eject the floppy. */ -#define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ -#define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ - -#ifndef __ASSEMBLY__ - -/* - * NOTE: these routines are implementation dependent-- - * understand the hardware you are querying! - */ -extern void set_auxio(unsigned char bits_on, unsigned char bits_off); -extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */ - -/* - * The following routines are provided for driver-compatibility - * with sparc64 (primarily sunlance.c) - */ - -#define AUXIO_LTE_ON 1 -#define AUXIO_LTE_OFF 0 - -/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) - * - * on - AUXIO_LTE_ON or AUXIO_LTE_OFF - */ -#define auxio_set_lte(on) \ -do { \ - if(on) { \ - set_auxio(AUXIO_LINK_TEST, 0); \ - } else { \ - set_auxio(0, AUXIO_LINK_TEST); \ - } \ -} while (0) - -#define AUXIO_LED_ON 1 -#define AUXIO_LED_OFF 0 - -/* auxio_set_led - Set system front panel LED - * - * on - AUXIO_LED_ON or AUXIO_LED_OFF - */ -#define auxio_set_led(on) \ -do { \ - if(on) { \ - set_auxio(AUXIO_LED, 0); \ - } else { \ - set_auxio(0, AUXIO_LED); \ - } \ -} while (0) - -#endif /* !(__ASSEMBLY__) */ - - -/* AUXIO2 (Power Off Control) */ -extern __volatile__ unsigned char * auxio_power_register; - -#define AUXIO_POWER_DETECT_FAILURE 32 -#define AUXIO_POWER_CLEAR_FAILURE 2 -#define AUXIO_POWER_OFF 1 - - -#endif /* !(_SPARC_AUXIO_H) */ diff --git a/include/asm-sparc/auxio_64.h b/include/asm-sparc/auxio_64.h deleted file mode 100644 index f61cd1e..0000000 --- a/include/asm-sparc/auxio_64.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * auxio.h: Definitions and code for the Auxiliary I/O registers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * - * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) - */ -#ifndef _SPARC64_AUXIO_H -#define _SPARC64_AUXIO_H - -/* AUXIO implementations: - * sbus-based NCR89C105 "Slavio" - * LED/Floppy (AUX1) register - * Power (AUX2) register - * - * ebus-based auxio on PCIO - * LED Auxio Register - * Power Auxio Register - * - * Register definitions from NCR _NCR89C105 Chip Specification_ - * - * SLAVIO AUX1 @ 0x1900000 - * ------------------------------------------------- - * | (R) | (R) | D | (R) | E | M | T | L | - * ------------------------------------------------- - * (R) - bit 7:6,4 are reserved and should be masked in s/w - * D - Floppy Density Sense (1=high density) R/O - * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin - * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin - * T - Terminal Count: sends TC pulse to 82077 floppy controller - * L - System LED on front panel (0=off, 1=on) - */ -#define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ -#define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ -#define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ -#define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ -#define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ -#define AUXIO_AUX1_LED 0x01 /* System LED */ - -/* SLAVIO AUX2 @ 0x1910000 - * ------------------------------------------------- - * | (R) | (R) | D | (R) | (R) | (R) | C | F | - * ------------------------------------------------- - * (R) - bits 7:6,4:2 are reserved and should be masked in s/w - * D - Power Failure Detect (1=power fail) - * C - Clear Power Failure Detect Int (1=clear) - * F - Power Off (1=power off) - */ -#define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ -#define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ -#define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ -#define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ - -/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 - * - * PCIO LED Auxio @ 0x726000 - * ------------------------------------------------- - * | 31:1 Unused | LED | - * ------------------------------------------------- - * Bits 31:1 unused - * LED - System LED on front panel (0=off, 1=on) - */ -#define AUXIO_PCIO_LED 0x01 /* System LED */ - -/* PCIO Power Auxio @ 0x724000 - * ------------------------------------------------- - * | 31:2 Unused | CPO | SPO | - * ------------------------------------------------- - * Bits 31:2 unused - * CPO - Courtesy Power Off (1=off) - * SPO - System Power Off (1=off) - */ -#define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ -#define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ - -#ifndef __ASSEMBLY__ - -extern void __iomem *auxio_register; - -#define AUXIO_LTE_ON 1 -#define AUXIO_LTE_OFF 0 - -/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) - * - * on - AUXIO_LTE_ON or AUXIO_LTE_OFF - */ -extern void auxio_set_lte(int on); - -#define AUXIO_LED_ON 1 -#define AUXIO_LED_OFF 0 - -/* auxio_set_led - Set system front panel LED - * - * on - AUXIO_LED_ON or AUXIO_LED_OFF - */ -extern void auxio_set_led(int on); - -#endif /* ifndef __ASSEMBLY__ */ - -#endif /* !(_SPARC64_AUXIO_H) */ diff --git a/include/asm-sparc/auxvec.h b/include/asm-sparc/auxvec.h deleted file mode 100644 index ad6f360..0000000 --- a/include/asm-sparc/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMSPARC_AUXVEC_H -#define __ASMSPARC_AUXVEC_H - -#endif /* !(__ASMSPARC_AUXVEC_H) */ diff --git a/include/asm-sparc/backoff.h b/include/asm-sparc/backoff.h deleted file mode 100644 index fa1fdf6..0000000 --- a/include/asm-sparc/backoff.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _SPARC64_BACKOFF_H -#define _SPARC64_BACKOFF_H - -#define BACKOFF_LIMIT (4 * 1024) - -#ifdef CONFIG_SMP - -#define BACKOFF_SETUP(reg) \ - mov 1, reg - -#define BACKOFF_SPIN(reg, tmp, label) \ - mov reg, tmp; \ -88: brnz,pt tmp, 88b; \ - sub tmp, 1, tmp; \ - set BACKOFF_LIMIT, tmp; \ - cmp reg, tmp; \ - bg,pn %xcc, label; \ - nop; \ - ba,pt %xcc, label; \ - sllx reg, 1, reg; - -#else - -#define BACKOFF_SETUP(reg) -#define BACKOFF_SPIN(reg, tmp, label) \ - ba,pt %xcc, label; \ - nop; - -#endif - -#endif /* _SPARC64_BACKOFF_H */ diff --git a/include/asm-sparc/bbc.h b/include/asm-sparc/bbc.h deleted file mode 100644 index 423a858..0000000 --- a/include/asm-sparc/bbc.h +++ /dev/null @@ -1,225 +0,0 @@ -/* - * bbc.h: Defines for BootBus Controller found on UltraSPARC-III - * systems. - * - * Copyright (C) 2000 David S. Miller (davem@redhat.com) - */ - -#ifndef _SPARC64_BBC_H -#define _SPARC64_BBC_H - -/* Register sizes are indicated by "B" (Byte, 1-byte), - * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or - * "Q" (Quad, 8 bytes) inside brackets. - */ - -#define BBC_AID 0x00 /* [B] Agent ID */ -#define BBC_DEVP 0x01 /* [B] Device Present */ -#define BBC_ARB 0x02 /* [B] Arbitration */ -#define BBC_QUIESCE 0x03 /* [B] Quiesce */ -#define BBC_WDACTION 0x04 /* [B] Watchdog Action */ -#define BBC_SPG 0x06 /* [B] Soft POR Gen */ -#define BBC_SXG 0x07 /* [B] Soft XIR Gen */ -#define BBC_PSRC 0x08 /* [W] POR Source */ -#define BBC_XSRC 0x0c /* [B] XIR Source */ -#define BBC_CSC 0x0d /* [B] Clock Synthesizers Control*/ -#define BBC_ES_CTRL 0x0e /* [H] Energy Star Control */ -#define BBC_ES_ACT 0x10 /* [W] E* Assert Change Time */ -#define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */ -#define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */ -#define BBC_ES_ABT 0x16 /* [H] E* Assert Bypass Time */ -#define BBC_ES_PST 0x18 /* [W] E* PLL Settle Time */ -#define BBC_ES_FSL 0x1c /* [W] E* Frequency Switch Latency*/ -#define BBC_EBUST 0x20 /* [Q] EBUS Timing */ -#define BBC_JTAG_CMD 0x28 /* [W] JTAG+ Command */ -#define BBC_JTAG_CTRL 0x2c /* [B] JTAG+ Control */ -#define BBC_I2C_SEL 0x2d /* [B] I2C Selection */ -#define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */ -#define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/ -#define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */ -#define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/ -#define BBC_KBD_BEEP 0x32 /* [B] Keyboard Beep */ -#define BBC_KBD_BCNT 0x34 /* [W] Keyboard Beep Counter */ - -#define BBC_REGS_SIZE 0x40 - -/* There is a 2K scratch ram area at offset 0x80000 but I doubt - * we will use it for anything. - */ - -/* Agent ID register. This register shows the Safari Agent ID - * for the processors. The value returned depends upon which - * cpu is reading the register. - */ -#define BBC_AID_ID 0x07 /* Safari ID */ -#define BBC_AID_RESV 0xf8 /* Reserved */ - -/* Device Present register. One can determine which cpus are actually - * present in the machine by interrogating this register. - */ -#define BBC_DEVP_CPU0 0x01 /* Processor 0 present */ -#define BBC_DEVP_CPU1 0x02 /* Processor 1 present */ -#define BBC_DEVP_CPU2 0x04 /* Processor 2 present */ -#define BBC_DEVP_CPU3 0x08 /* Processor 3 present */ -#define BBC_DEVP_RESV 0xf0 /* Reserved */ - -/* Arbitration register. This register is used to block access to - * the BBC from a particular cpu. - */ -#define BBC_ARB_CPU0 0x01 /* Enable cpu 0 BBC arbitratrion */ -#define BBC_ARB_CPU1 0x02 /* Enable cpu 1 BBC arbitratrion */ -#define BBC_ARB_CPU2 0x04 /* Enable cpu 2 BBC arbitratrion */ -#define BBC_ARB_CPU3 0x08 /* Enable cpu 3 BBC arbitratrion */ -#define BBC_ARB_RESV 0xf0 /* Reserved */ - -/* Quiesce register. Bus and BBC segments for cpus can be disabled - * with this register, ie. for hot plugging. - */ -#define BBC_QUIESCE_S02 0x01 /* Quiesce Safari segment for cpu 0 and 2 */ -#define BBC_QUIESCE_S13 0x02 /* Quiesce Safari segment for cpu 1 and 3 */ -#define BBC_QUIESCE_B02 0x04 /* Quiesce BBC segment for cpu 0 and 2 */ -#define BBC_QUIESCE_B13 0x08 /* Quiesce BBC segment for cpu 1 and 3 */ -#define BBC_QUIESCE_FD0 0x10 /* Disable Fatal_Error[0] reporting */ -#define BBC_QUIESCE_FD1 0x20 /* Disable Fatal_Error[1] reporting */ -#define BBC_QUIESCE_FD2 0x40 /* Disable Fatal_Error[2] reporting */ -#define BBC_QUIESCE_FD3 0x80 /* Disable Fatal_Error[3] reporting */ - -/* Watchdog Action register. When the watchdog device timer expires - * a line is enabled to the BBC. The action BBC takes when this line - * is asserted can be controlled by this regiser. - */ -#define BBC_WDACTION_RST 0x01 /* When set, watchdog causes system reset. - * When clear, BBC ignores watchdog signal. - */ -#define BBC_WDACTION_RESV 0xfe /* Reserved */ - -/* Soft_POR_GEN register. The POR (Power On Reset) signal may be asserted - * for specific processors or all processors via this register. - */ -#define BBC_SPG_CPU0 0x01 /* Assert POR for processor 0 */ -#define BBC_SPG_CPU1 0x02 /* Assert POR for processor 1 */ -#define BBC_SPG_CPU2 0x04 /* Assert POR for processor 2 */ -#define BBC_SPG_CPU3 0x08 /* Assert POR for processor 3 */ -#define BBC_SPG_CPUALL 0x10 /* Reset all processors and reset - * the entire system. - */ -#define BBC_SPG_RESV 0xe0 /* Reserved */ - -/* Soft_XIR_GEN register. The XIR (eXternally Initiated Reset) signal - * may be asserted to specific processors via this register. - */ -#define BBC_SXG_CPU0 0x01 /* Assert XIR for processor 0 */ -#define BBC_SXG_CPU1 0x02 /* Assert XIR for processor 1 */ -#define BBC_SXG_CPU2 0x04 /* Assert XIR for processor 2 */ -#define BBC_SXG_CPU3 0x08 /* Assert XIR for processor 3 */ -#define BBC_SXG_RESV 0xf0 /* Reserved */ - -/* POR Source register. One may identify the cause of the most recent - * reset by reading this register. - */ -#define BBC_PSRC_SPG0 0x0001 /* CPU 0 reset via BBC_SPG register */ -#define BBC_PSRC_SPG1 0x0002 /* CPU 1 reset via BBC_SPG register */ -#define BBC_PSRC_SPG2 0x0004 /* CPU 2 reset via BBC_SPG register */ -#define BBC_PSRC_SPG3 0x0008 /* CPU 3 reset via BBC_SPG register */ -#define BBC_PSRC_SPGSYS 0x0010 /* System reset via BBC_SPG register */ -#define BBC_PSRC_JTAG 0x0020 /* System reset via JTAG+ */ -#define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle */ -#define BBC_PSRC_PWRUP 0x0080 /* System reset via power-up */ -#define BBC_PSRC_FE0 0x0100 /* CPU 0 reported Fatal_Error */ -#define BBC_PSRC_FE1 0x0200 /* CPU 1 reported Fatal_Error */ -#define BBC_PSRC_FE2 0x0400 /* CPU 2 reported Fatal_Error */ -#define BBC_PSRC_FE3 0x0800 /* CPU 3 reported Fatal_Error */ -#define BBC_PSRC_FE4 0x1000 /* Schizo reported Fatal_Error */ -#define BBC_PSRC_FE5 0x2000 /* Safari device 5 reported Fatal_Error */ -#define BBC_PSRC_FE6 0x4000 /* CPMS reported Fatal_Error */ -#define BBC_PSRC_SYNTH 0x8000 /* System reset when on-board clock synthesizers - * were updated. - */ -#define BBC_PSRC_WDT 0x10000 /* System reset via Super I/O watchdog */ -#define BBC_PSRC_RSC 0x20000 /* System reset via RSC remote monitoring - * device - */ - -/* XIR Source register. The source of an XIR event sent to a processor may - * be determined via this register. - */ -#define BBC_XSRC_SXG0 0x01 /* CPU 0 received XIR via Soft_XIR_GEN reg */ -#define BBC_XSRC_SXG1 0x02 /* CPU 1 received XIR via Soft_XIR_GEN reg */ -#define BBC_XSRC_SXG2 0x04 /* CPU 2 received XIR via Soft_XIR_GEN reg */ -#define BBC_XSRC_SXG3 0x08 /* CPU 3 received XIR via Soft_XIR_GEN reg */ -#define BBC_XSRC_JTAG 0x10 /* All CPUs received XIR via JTAG+ */ -#define BBC_XSRC_W_OR_B 0x20 /* All CPUs received XIR either because: - * a) Super I/O watchdog fired, or - * b) XIR push button was activated - */ -#define BBC_XSRC_RESV 0xc0 /* Reserved */ - -/* Clock Synthesizers Control register. This register provides the big-bang - * programming interface to the two clock synthesizers of the machine. - */ -#define BBC_CSC_SLOAD 0x01 /* Directly connected to S_LOAD pins */ -#define BBC_CSC_SDATA 0x02 /* Directly connected to S_DATA pins */ -#define BBC_CSC_SCLOCK 0x04 /* Directly connected to S_CLOCK pins */ -#define BBC_CSC_RESV 0x78 /* Reserved */ -#define BBC_CSC_RST 0x80 /* Generate system reset when S_LOAD==1 */ - -/* Energy Star Control register. This register is used to generate the - * clock frequency change trigger to the main system devices (Schizo and - * the processors). The transition occurs when bits in this register - * go from 0 to 1, only one bit must be set at once else no action - * occurs. Basically the sequence of events is: - * a) Choose new frequency: full, 1/2 or 1/32 - * b) Program this desired frequency into the cpus and Schizo. - * c) Set the same value in this register. - * d) 16 system clocks later, clear this register. - */ -#define BBC_ES_CTRL_1_1 0x01 /* Full frequency */ -#define BBC_ES_CTRL_1_2 0x02 /* 1/2 frequency */ -#define BBC_ES_CTRL_1_32 0x20 /* 1/32 frequency */ -#define BBC_ES_RESV 0xdc /* Reserved */ - -/* Energy Star Assert Change Time register. This determines the number - * of BBC clock cycles (which is half the system frequency) between - * the detection of FREEZE_ACK being asserted and the assertion of - * the CLK_CHANGE_L[2:0] signals. - */ -#define BBC_ES_ACT_VAL 0xff - -/* Energy Star Assert Bypass Time register. This determines the number - * of BBC clock cycles (which is half the system frequency) between - * the assertion of the CLK_CHANGE_L[2:0] signals and the assertion of - * the ESTAR_PLL_BYPASS signal. - */ -#define BBC_ES_ABT_VAL 0xffff - -/* Energy Star PLL Settle Time register. This determines the number of - * BBC clock cycles (which is half the system frequency) between the - * de-assertion of CLK_CHANGE_L[2:0] and the de-assertion of the FREEZE_L - * signal. - */ -#define BBC_ES_PST_VAL 0xffffffff - -/* Energy Star Frequency Switch Latency register. This is the number of - * BBC clocks between the de-assertion of CLK_CHANGE_L[2:0] and the first - * edge of the Safari clock at the new frequency. - */ -#define BBC_ES_FSL_VAL 0xffffffff - -/* Keyboard Beep control register. This is a simple enabler for the audio - * beep sound. - */ -#define BBC_KBD_BEEP_ENABLE 0x01 /* Enable beep */ -#define BBC_KBD_BEEP_RESV 0xfe /* Reserved */ - -/* Keyboard Beep Counter register. There is a free-running counter inside - * the BBC which runs at half the system clock. The bit set in this register - * determines when the audio sound is generated. So for example if bit - * 10 is set, the audio beep will oscillate at 1/(2**12). The keyboard beep - * generator automatically selects a different bit to use if the system clock - * is changed via Energy Star. - */ -#define BBC_KBD_BCNT_BITS 0x0007fc00 -#define BBC_KBC_BCNT_RESV 0xfff803ff - -#endif /* _SPARC64_BBC_H */ - diff --git a/include/asm-sparc/bitext.h b/include/asm-sparc/bitext.h deleted file mode 100644 index 297b2f2..0000000 --- a/include/asm-sparc/bitext.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * bitext.h: Bit string operations on the sparc, specific to architecture. - * - * Copyright 2002 Pete Zaitcev - */ - -#ifndef _SPARC_BITEXT_H -#define _SPARC_BITEXT_H - -#include - -struct bit_map { - spinlock_t lock; - unsigned long *map; - int size; - int used; - int last_off; - int last_size; - int first_free; - int num_colors; -}; - -extern int bit_map_string_get(struct bit_map *t, int len, int align); -extern void bit_map_clear(struct bit_map *t, int offset, int len); -extern void bit_map_init(struct bit_map *t, unsigned long *map, int size); - -#endif /* defined(_SPARC_BITEXT_H) */ diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h deleted file mode 100644 index 1a2949d..0000000 --- a/include/asm-sparc/bitops.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_BITOPS_H -#define ___ASM_SPARC_BITOPS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/bitops_32.h b/include/asm-sparc/bitops_32.h deleted file mode 100644 index 68b98a7e..0000000 --- a/include/asm-sparc/bitops_32.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * bitops.h: Bit string operations on the Sparc. - * - * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright 1996 Eddie C. Dost (ecd@skynet.be) - * Copyright 2001 Anton Blanchard (anton@samba.org) - */ - -#ifndef _SPARC_BITOPS_H -#define _SPARC_BITOPS_H - -#include -#include - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); -extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); -extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); - -/* - * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' - * is in the highest of the four bytes and bit '31' is the high bit - * within the first byte. Sparc is BIG-Endian. Unless noted otherwise - * all bit-ops return 0 if bit was previously clear and != 0 otherwise. - */ -static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___set_bit(ADDR, mask) != 0; -} - -static inline void set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___set_bit(ADDR, mask); -} - -static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___clear_bit(ADDR, mask) != 0; -} - -static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___clear_bit(ADDR, mask); -} - -static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___change_bit(ADDR, mask) != 0; -} - -static inline void change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___change_bit(ADDR, mask); -} - -#include - -#define smp_mb__before_clear_bit() do { } while(0) -#define smp_mb__after_clear_bit() do { } while(0) - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#endif /* __KERNEL__ */ - -#endif /* defined(_SPARC_BITOPS_H) */ diff --git a/include/asm-sparc/bitops_64.h b/include/asm-sparc/bitops_64.h deleted file mode 100644 index bb87b80..0000000 --- a/include/asm-sparc/bitops_64.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * bitops.h: Bit string operations on the V9. - * - * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC64_BITOPS_H -#define _SPARC64_BITOPS_H - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include - -extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr); -extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); -extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr); -extern void set_bit(unsigned long nr, volatile unsigned long *addr); -extern void clear_bit(unsigned long nr, volatile unsigned long *addr); -extern void change_bit(unsigned long nr, volatile unsigned long *addr); - -#include - -#ifdef CONFIG_SMP -#define smp_mb__before_clear_bit() membar_storeload_loadload() -#define smp_mb__after_clear_bit() membar_storeload_storestore() -#else -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() -#endif - -#include -#include -#include -#include -#include - -#ifdef __KERNEL__ - -#include -#include - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ - -#ifdef ULTRA_HAS_POPULATION_COUNT - -static inline unsigned int hweight64(unsigned long w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w)); - return res; -} - -static inline unsigned int hweight32(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff)); - return res; -} - -static inline unsigned int hweight16(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff)); - return res; -} - -static inline unsigned int hweight8(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff)); - return res; -} - -#else - -#include - -#endif -#include -#endif /* __KERNEL__ */ - -#include - -#ifdef __KERNEL__ - -#include - -#define ext2_set_bit_atomic(lock,nr,addr) \ - test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) -#define ext2_clear_bit_atomic(lock,nr,addr) \ - test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) - -#include - -#endif /* __KERNEL__ */ - -#endif /* defined(_SPARC64_BITOPS_H) */ diff --git a/include/asm-sparc/bpp.h b/include/asm-sparc/bpp.h deleted file mode 100644 index 31f515e..0000000 --- a/include/asm-sparc/bpp.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef _SPARC_BPP_H -#define _SPARC_BPP_H - -/* - * Copyright (c) 1995 Picture Elements - * Stephen Williams - * Gus Baldauf - * - * Linux/SPARC port by Peter Zaitcev. - * Integration into SPARC tree by Tom Dyas. - */ - -#include - -/* - * This is a driver that supports IEEE Std 1284-1994 communications - * with compliant or compatible devices. It will use whatever features - * the device supports, prefering those that are typically faster. - * - * When the device is opened, it is left in COMPATIBILITY mode, and - * writes work like any printer device. The driver only attempt to - * negotiate 1284 modes when needed so that plugs can be pulled, - * switch boxes switched, etc., without disrupting things. It will - * also leave the device in compatibility mode when closed. - */ - - - -/* - * This driver also supplies ioctls to manually manipulate the - * pins. This is great for testing devices, or writing code to deal - * with bizzarro-mode of the ACME Special TurboThingy Plus. - * - * NOTE: These ioctl currently do not interact well with - * read/write. Caveat emptor. - * - * PUT_PINS allows us to assign the sense of all the pins, including - * the data pins if being driven by the host. The GET_PINS returns the - * pins that the peripheral drives, including data if appropriate. - */ - -# define BPP_PUT_PINS _IOW('B', 1, int) -# define BPP_GET_PINS _IOR('B', 2, char) /* that's bogus - should've been _IO */ -# define BPP_PUT_DATA _IOW('B', 3, int) -# define BPP_GET_DATA _IOR('B', 4, char) /* ditto */ - -/* - * Set the data bus to input mode. Disengage the data bin driver and - * be prepared to read values from the peripheral. If the arg is 0, - * then revert the bus to output mode. - */ -# define BPP_SET_INPUT _IOW('B', 5, int) - -/* - * These bits apply to the PUT operation... - */ -# define BPP_PP_nStrobe 0x0001 -# define BPP_PP_nAutoFd 0x0002 -# define BPP_PP_nInit 0x0004 -# define BPP_PP_nSelectIn 0x0008 - -/* - * These apply to the GET operation, which also reads the current value - * of the previously put values. A bit mask of these will be returned - * as a bit mask in the return code of the ioctl(). - */ -# define BPP_GP_nAck 0x0100 -# define BPP_GP_Busy 0x0200 -# define BPP_GP_PError 0x0400 -# define BPP_GP_Select 0x0800 -# define BPP_GP_nFault 0x1000 - -#endif diff --git a/include/asm-sparc/btfixup.h b/include/asm-sparc/btfixup.h deleted file mode 100644 index 08277e6..0000000 --- a/include/asm-sparc/btfixup.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * asm-sparc/btfixup.h: Macros for boot time linking. - * - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef _SPARC_BTFIXUP_H -#define _SPARC_BTFIXUP_H - -#include - -#ifndef __ASSEMBLY__ - -#ifdef MODULE -extern unsigned int ___illegal_use_of_BTFIXUP_SIMM13_in_module(void); -extern unsigned int ___illegal_use_of_BTFIXUP_SETHI_in_module(void); -extern unsigned int ___illegal_use_of_BTFIXUP_HALF_in_module(void); -extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void); - -#define BTFIXUP_SIMM13(__name) ___illegal_use_of_BTFIXUP_SIMM13_in_module() -#define BTFIXUP_HALF(__name) ___illegal_use_of_BTFIXUP_HALF_in_module() -#define BTFIXUP_SETHI(__name) ___illegal_use_of_BTFIXUP_SETHI_in_module() -#define BTFIXUP_INT(__name) ___illegal_use_of_BTFIXUP_INT_in_module() -#define BTFIXUP_BLACKBOX(__name) ___illegal_use_of_BTFIXUP_BLACKBOX_in_module - -#else - -#define BTFIXUP_SIMM13(__name) ___sf_##__name() -#define BTFIXUP_HALF(__name) ___af_##__name() -#define BTFIXUP_SETHI(__name) ___hf_##__name() -#define BTFIXUP_INT(__name) ((unsigned int)&___i_##__name) -/* This must be written in assembly and present in a sethi */ -#define BTFIXUP_BLACKBOX(__name) ___b_##__name -#endif /* MODULE */ - -/* Fixup call xx */ - -#define BTFIXUPDEF_CALL(__type, __name, __args...) \ - extern __type ___f_##__name(__args); \ - extern unsigned ___fs_##__name[3]; -#define BTFIXUPDEF_CALL_CONST(__type, __name, __args...) \ - extern __type ___f_##__name(__args) __attribute_const__; \ - extern unsigned ___fs_##__name[3]; -#define BTFIXUP_CALL(__name) ___f_##__name - -#define BTFIXUPDEF_BLACKBOX(__name) \ - extern unsigned ___bs_##__name[2]; - -/* Put bottom 13bits into some register variable */ - -#define BTFIXUPDEF_SIMM13(__name) \ - static inline unsigned int ___sf_##__name(void) __attribute_const__; \ - extern unsigned ___ss_##__name[2]; \ - static inline unsigned int ___sf_##__name(void) { \ - unsigned int ret; \ - __asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret)); \ - return ret; \ - } -#define BTFIXUPDEF_SIMM13_INIT(__name,__val) \ - static inline unsigned int ___sf_##__name(void) __attribute_const__; \ - extern unsigned ___ss_##__name[2]; \ - static inline unsigned int ___sf_##__name(void) { \ - unsigned int ret; \ - __asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ - return ret; \ - } - -/* Put either bottom 13 bits, or upper 22 bits into some register variable - * (depending on the value, this will lead into sethi FIX, reg; or - * mov FIX, reg; ) - */ - -#define BTFIXUPDEF_HALF(__name) \ - static inline unsigned int ___af_##__name(void) __attribute_const__; \ - extern unsigned ___as_##__name[2]; \ - static inline unsigned int ___af_##__name(void) { \ - unsigned int ret; \ - __asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret)); \ - return ret; \ - } -#define BTFIXUPDEF_HALF_INIT(__name,__val) \ - static inline unsigned int ___af_##__name(void) __attribute_const__; \ - extern unsigned ___as_##__name[2]; \ - static inline unsigned int ___af_##__name(void) { \ - unsigned int ret; \ - __asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\ - return ret; \ - } - -/* Put upper 22 bits into some register variable */ - -#define BTFIXUPDEF_SETHI(__name) \ - static inline unsigned int ___hf_##__name(void) __attribute_const__; \ - extern unsigned ___hs_##__name[2]; \ - static inline unsigned int ___hf_##__name(void) { \ - unsigned int ret; \ - __asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret)); \ - return ret; \ - } -#define BTFIXUPDEF_SETHI_INIT(__name,__val) \ - static inline unsigned int ___hf_##__name(void) __attribute_const__; \ - extern unsigned ___hs_##__name[2]; \ - static inline unsigned int ___hf_##__name(void) { \ - unsigned int ret; \ - __asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : \ - "=r"(ret)); \ - return ret; \ - } - -/* Put a full 32bit integer into some register variable */ - -#define BTFIXUPDEF_INT(__name) \ - extern unsigned char ___i_##__name; \ - extern unsigned ___is_##__name[2]; - -#define BTFIXUPCALL_NORM 0x00000000 /* Always call */ -#define BTFIXUPCALL_NOP 0x01000000 /* Possibly optimize to nop */ -#define BTFIXUPCALL_RETINT(i) (0x90102000|((i) & 0x1fff)) /* Possibly optimize to mov i, %o0 */ -#define BTFIXUPCALL_ORINT(i) (0x90122000|((i) & 0x1fff)) /* Possibly optimize to or %o0, i, %o0 */ -#define BTFIXUPCALL_RETO0 0x01000000 /* Return first parameter, actually a nop */ -#define BTFIXUPCALL_ANDNINT(i) (0x902a2000|((i) & 0x1fff)) /* Possibly optimize to andn %o0, i, %o0 */ -#define BTFIXUPCALL_SWAPO0O1 0xd27a0000 /* Possibly optimize to swap [%o0],%o1 */ -#define BTFIXUPCALL_SWAPO0G0 0xc07a0000 /* Possibly optimize to swap [%o0],%g0 */ -#define BTFIXUPCALL_SWAPG1G2 0xc4784000 /* Possibly optimize to swap [%g1],%g2 */ -#define BTFIXUPCALL_STG0O0 0xc0220000 /* Possibly optimize to st %g0,[%o0] */ -#define BTFIXUPCALL_STO1O0 0xd2220000 /* Possibly optimize to st %o1,[%o0] */ - -#define BTFIXUPSET_CALL(__name, __addr, __insn) \ - do { \ - ___fs_##__name[0] |= 1; \ - ___fs_##__name[1] = (unsigned long)__addr; \ - ___fs_##__name[2] = __insn; \ - } while (0) - -#define BTFIXUPSET_BLACKBOX(__name, __func) \ - do { \ - ___bs_##__name[0] |= 1; \ - ___bs_##__name[1] = (unsigned long)__func; \ - } while (0) - -#define BTFIXUPCOPY_CALL(__name, __from) \ - do { \ - ___fs_##__name[0] |= 1; \ - ___fs_##__name[1] = ___fs_##__from[1]; \ - ___fs_##__name[2] = ___fs_##__from[2]; \ - } while (0) - -#define BTFIXUPSET_SIMM13(__name, __val) \ - do { \ - ___ss_##__name[0] |= 1; \ - ___ss_##__name[1] = (unsigned)__val; \ - } while (0) - -#define BTFIXUPCOPY_SIMM13(__name, __from) \ - do { \ - ___ss_##__name[0] |= 1; \ - ___ss_##__name[1] = ___ss_##__from[1]; \ - } while (0) - -#define BTFIXUPSET_HALF(__name, __val) \ - do { \ - ___as_##__name[0] |= 1; \ - ___as_##__name[1] = (unsigned)__val; \ - } while (0) - -#define BTFIXUPCOPY_HALF(__name, __from) \ - do { \ - ___as_##__name[0] |= 1; \ - ___as_##__name[1] = ___as_##__from[1]; \ - } while (0) - -#define BTFIXUPSET_SETHI(__name, __val) \ - do { \ - ___hs_##__name[0] |= 1; \ - ___hs_##__name[1] = (unsigned)__val; \ - } while (0) - -#define BTFIXUPCOPY_SETHI(__name, __from) \ - do { \ - ___hs_##__name[0] |= 1; \ - ___hs_##__name[1] = ___hs_##__from[1]; \ - } while (0) - -#define BTFIXUPSET_INT(__name, __val) \ - do { \ - ___is_##__name[0] |= 1; \ - ___is_##__name[1] = (unsigned)__val; \ - } while (0) - -#define BTFIXUPCOPY_INT(__name, __from) \ - do { \ - ___is_##__name[0] |= 1; \ - ___is_##__name[1] = ___is_##__from[1]; \ - } while (0) - -#define BTFIXUPVAL_CALL(__name) \ - ((unsigned long)___fs_##__name[1]) - -extern void btfixup(void); - -#else /* __ASSEMBLY__ */ - -#define BTFIXUP_SETHI(__name) %hi(___h_ ## __name) -#define BTFIXUP_SETHI_INIT(__name,__val) %hi(___h_ ## __name ## __btset_ ## __val) - -#endif /* __ASSEMBLY__ */ - -#endif /* !(_SPARC_BTFIXUP_H) */ diff --git a/include/asm-sparc/bug.h b/include/asm-sparc/bug.h deleted file mode 100644 index 8a59e5a..0000000 --- a/include/asm-sparc/bug.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _SPARC_BUG_H -#define _SPARC_BUG_H - -#ifdef CONFIG_BUG -#include - -#ifdef CONFIG_DEBUG_BUGVERBOSE -extern void do_BUG(const char *file, int line); -#define BUG() do { \ - do_BUG(__FILE__, __LINE__); \ - __builtin_trap(); \ -} while (0) -#else -#define BUG() __builtin_trap() -#endif - -#define HAVE_ARCH_BUG -#endif - -#include - -#endif diff --git a/include/asm-sparc/bugs.h b/include/asm-sparc/bugs.h deleted file mode 100644 index 2dfc07b..0000000 --- a/include/asm-sparc/bugs.h +++ /dev/null @@ -1,24 +0,0 @@ -/* include/asm-sparc/bugs.h: Sparc probes for various bugs. - * - * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifdef CONFIG_SPARC32 -#include -#endif - -#ifdef CONFIG_SPARC64 -#include -#endif - -extern unsigned long loops_per_jiffy; - -static void __init check_bugs(void) -{ -#if defined(CONFIG_SPARC32) && !defined(CONFIG_SMP) - cpu_data(0).udelay_val = loops_per_jiffy; -#endif -#ifdef CONFIG_SPARC64 - sstate_running(); -#endif -} diff --git a/include/asm-sparc/byteorder.h b/include/asm-sparc/byteorder.h deleted file mode 100644 index bcd83aa..0000000 --- a/include/asm-sparc/byteorder.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef _SPARC_BYTEORDER_H -#define _SPARC_BYTEORDER_H - -#include -#include - -#ifdef __GNUC__ - -#ifdef CONFIG_SPARC32 -#define __SWAB_64_THRU_32__ -#endif - -#ifdef CONFIG_SPARC64 - -static inline __u16 ___arch__swab16p(const __u16 *addr) -{ - __u16 ret; - - __asm__ __volatile__ ("lduha [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PL)); - return ret; -} - -static inline __u32 ___arch__swab32p(const __u32 *addr) -{ - __u32 ret; - - __asm__ __volatile__ ("lduwa [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PL)); - return ret; -} - -static inline __u64 ___arch__swab64p(const __u64 *addr) -{ - __u64 ret; - - __asm__ __volatile__ ("ldxa [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PL)); - return ret; -} - -#define __arch__swab16p(x) ___arch__swab16p(x) -#define __arch__swab32p(x) ___arch__swab32p(x) -#define __arch__swab64p(x) ___arch__swab64p(x) - -#endif /* CONFIG_SPARC64 */ - -#define __BYTEORDER_HAS_U64__ - -#endif - -#include - -#endif /* _SPARC_BYTEORDER_H */ diff --git a/include/asm-sparc/cache.h b/include/asm-sparc/cache.h deleted file mode 100644 index 41f85ae..0000000 --- a/include/asm-sparc/cache.h +++ /dev/null @@ -1,138 +0,0 @@ -/* cache.h: Cache specific code for the Sparc. These include flushing - * and direct tag/data line access. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC_CACHE_H -#define _SPARC_CACHE_H - -#define L1_CACHE_SHIFT 5 -#define L1_CACHE_BYTES 32 -#define L1_CACHE_ALIGN(x) ((((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))) - -#ifdef CONFIG_SPARC32 -#define SMP_CACHE_BYTES_SHIFT 5 -#else -#define SMP_CACHE_BYTES_SHIFT 6 -#endif - -#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) - -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) - -#ifdef CONFIG_SPARC32 -#include - -/* Direct access to the instruction cache is provided through and - * alternate address space. The IDC bit must be off in the ICCR on - * HyperSparcs for these accesses to work. The code below does not do - * any checking, the caller must do so. These routines are for - * diagnostics only, but could end up being useful. Use with care. - * Also, you are asking for trouble if you execute these in one of the - * three instructions following a %asr/%psr access or modification. - */ - -/* First, cache-tag access. */ -static inline unsigned int get_icache_tag(int setnum, int tagnum) -{ - unsigned int vaddr, retval; - - vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5); - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (vaddr), "i" (ASI_M_TXTC_TAG)); - return retval; -} - -static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry) -{ - unsigned int vaddr; - - vaddr = ((setnum&1) << 12) | ((tagnum&0x7f) << 5); - __asm__ __volatile__("sta %0, [%1] %2\n\t" : : - "r" (entry), "r" (vaddr), "i" (ASI_M_TXTC_TAG) : - "memory"); -} - -/* Second cache-data access. The data is returned two-32bit quantities - * at a time. - */ -static inline void get_icache_data(int setnum, int tagnum, int subblock, - unsigned int *data) -{ - unsigned int value1, value2, vaddr; - - vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) | - ((subblock&0x3) << 3); - __asm__ __volatile__("ldda [%2] %3, %%g2\n\t" - "or %%g0, %%g2, %0\n\t" - "or %%g0, %%g3, %1\n\t" : - "=r" (value1), "=r" (value2) : - "r" (vaddr), "i" (ASI_M_TXTC_DATA) : - "g2", "g3"); - data[0] = value1; data[1] = value2; -} - -static inline void put_icache_data(int setnum, int tagnum, int subblock, - unsigned int *data) -{ - unsigned int value1, value2, vaddr; - - vaddr = ((setnum&0x1) << 12) | ((tagnum&0x7f) << 5) | - ((subblock&0x3) << 3); - value1 = data[0]; value2 = data[1]; - __asm__ __volatile__("or %%g0, %0, %%g2\n\t" - "or %%g0, %1, %%g3\n\t" - "stda %%g2, [%2] %3\n\t" : : - "r" (value1), "r" (value2), - "r" (vaddr), "i" (ASI_M_TXTC_DATA) : - "g2", "g3", "memory" /* no joke */); -} - -/* Different types of flushes with the ICACHE. Some of the flushes - * affect both the ICACHE and the external cache. Others only clear - * the ICACHE entries on the cpu itself. V8's (most) allow - * granularity of flushes on the packet (element in line), whole line, - * and entire cache (ie. all lines) level. The ICACHE only flushes are - * ROSS HyperSparc specific and are in ross.h - */ - -/* Flushes which clear out both the on-chip and external caches */ -static inline void flush_ei_page(unsigned int addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_PAGE) : - "memory"); -} - -static inline void flush_ei_seg(unsigned int addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_SEG) : - "memory"); -} - -static inline void flush_ei_region(unsigned int addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_REGION) : - "memory"); -} - -static inline void flush_ei_ctx(unsigned int addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_CTX) : - "memory"); -} - -static inline void flush_ei_user(unsigned int addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_USER) : - "memory"); -} -#endif /* CONFIG_SPARC32 */ - -#endif /* !(_SPARC_CACHE_H) */ diff --git a/include/asm-sparc/cacheflush.h b/include/asm-sparc/cacheflush.h deleted file mode 100644 index 2b6a379..0000000 --- a/include/asm-sparc/cacheflush.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_CACHEFLUSH_H -#define ___ASM_SPARC_CACHEFLUSH_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/cacheflush_32.h b/include/asm-sparc/cacheflush_32.h deleted file mode 100644 index 68ac109..0000000 --- a/include/asm-sparc/cacheflush_32.h +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef _SPARC_CACHEFLUSH_H -#define _SPARC_CACHEFLUSH_H - -#include /* Common for other includes */ -// #include from pgalloc.h -// #include from pgalloc.h - -// #include -#include - -/* - * Fine grained cache flushing. - */ -#ifdef CONFIG_SMP - -BTFIXUPDEF_CALL(void, local_flush_cache_all, void) -BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long) - -#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)() -#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm) -#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end) -#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr) - -BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long) - -#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr) -#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr) - -extern void smp_flush_cache_all(void); -extern void smp_flush_cache_mm(struct mm_struct *mm); -extern void smp_flush_cache_range(struct vm_area_struct *vma, - unsigned long start, - unsigned long end); -extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page); - -extern void smp_flush_page_to_ram(unsigned long page); -extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); - -#endif /* CONFIG_SMP */ - -BTFIXUPDEF_CALL(void, flush_cache_all, void) -BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long) - -#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)() -#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) -#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) -#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end) -#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma, pg) do { } while (0) - -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - } while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - } while (0) - -BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long) -BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long) - -#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr) -#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr) - -extern void sparc_flush_page_to_ram(struct page *page); - -#define flush_dcache_page(page) sparc_flush_page_to_ram(page) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() - -#endif /* _SPARC_CACHEFLUSH_H */ diff --git a/include/asm-sparc/cacheflush_64.h b/include/asm-sparc/cacheflush_64.h deleted file mode 100644 index c433217..0000000 --- a/include/asm-sparc/cacheflush_64.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _SPARC64_CACHEFLUSH_H -#define _SPARC64_CACHEFLUSH_H - -#include - -#ifndef __ASSEMBLY__ - -#include - -/* Cache flush operations. */ - -/* These are the same regardless of whether this is an SMP kernel or not. */ -#define flush_cache_mm(__mm) \ - do { if ((__mm) == current->mm) flushw_user(); } while(0) -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -#define flush_cache_range(vma, start, end) \ - flush_cache_mm((vma)->vm_mm) -#define flush_cache_page(vma, page, pfn) \ - flush_cache_mm((vma)->vm_mm) - -/* - * On spitfire, the icache doesn't snoop local stores and we don't - * use block commit stores (which invalidate icache lines) during - * module load, so we need this. - */ -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void __flush_icache_page(unsigned long); - -extern void __flush_dcache_page(void *addr, int flush_icache); -extern void flush_dcache_page_impl(struct page *page); -#ifdef CONFIG_SMP -extern void smp_flush_dcache_page_impl(struct page *page, int cpu); -extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page); -#else -#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page) -#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page) -#endif - -extern void __flush_dcache_range(unsigned long start, unsigned long end); -extern void flush_dcache_page(struct page *page); - -#define flush_icache_page(vma, pg) do { } while(0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -extern void flush_ptrace_access(struct vm_area_struct *, struct page *, - unsigned long uaddr, void *kaddr, - unsigned long len, int write); - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ - flush_ptrace_access(vma, page, vaddr, src, len, 0); \ - } while (0) - -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ - flush_ptrace_access(vma, page, vaddr, dst, len, 1); \ - } while (0) - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#endif /* !__ASSEMBLY__ */ - -#endif /* _SPARC64_CACHEFLUSH_H */ diff --git a/include/asm-sparc/chafsr.h b/include/asm-sparc/chafsr.h deleted file mode 100644 index 85c69b3..0000000 --- a/include/asm-sparc/chafsr.h +++ /dev/null @@ -1,241 +0,0 @@ -#ifndef _SPARC64_CHAFSR_H -#define _SPARC64_CHAFSR_H - -/* Cheetah Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */ - -/* Comments indicate which processor variants on which the bit definition - * is valid. Codes are: - * ch --> cheetah - * ch+ --> cheetah plus - * jp --> jalapeno - */ - -/* All bits of this register except M_SYNDROME and E_SYNDROME are - * read, write 1 to clear. M_SYNDROME and E_SYNDROME are read-only. - */ - -/* Software bit set by linux trap handlers to indicate that the trap was - * signalled at %tl >= 1. - */ -#define CHAFSR_TL1 (1UL << 63UL) /* n/a */ - -/* Unmapped error from system bus for prefetch queue or - * store queue read operation - */ -#define CHPAFSR_DTO (1UL << 59UL) /* ch+ */ - -/* Bus error from system bus for prefetch queue or store queue - * read operation - */ -#define CHPAFSR_DBERR (1UL << 58UL) /* ch+ */ - -/* Hardware corrected E-cache Tag ECC error */ -#define CHPAFSR_THCE (1UL << 57UL) /* ch+ */ -/* System interface protocol error, hw timeout caused */ -#define JPAFSR_JETO (1UL << 57UL) /* jp */ - -/* SW handled correctable E-cache Tag ECC error */ -#define CHPAFSR_TSCE (1UL << 56UL) /* ch+ */ -/* Parity error on system snoop results */ -#define JPAFSR_SCE (1UL << 56UL) /* jp */ - -/* Uncorrectable E-cache Tag ECC error */ -#define CHPAFSR_TUE (1UL << 55UL) /* ch+ */ -/* System interface protocol error, illegal command detected */ -#define JPAFSR_JEIC (1UL << 55UL) /* jp */ - -/* Uncorrectable system bus data ECC error due to prefetch - * or store fill request - */ -#define CHPAFSR_DUE (1UL << 54UL) /* ch+ */ -/* System interface protocol error, illegal ADTYPE detected */ -#define JPAFSR_JEIT (1UL << 54UL) /* jp */ - -/* Multiple errors of the same type have occurred. This bit is set when - * an uncorrectable error or a SW correctable error occurs and the status - * bit to report that error is already set. When multiple errors of - * different types are indicated by setting multiple status bits. - * - * This bit is not set if multiple HW corrected errors with the same - * status bit occur, only uncorrectable and SW correctable ones have - * this behavior. - * - * This bit is not set when multiple ECC errors happen within a single - * 64-byte system bus transaction. Only the first ECC error in a 16-byte - * subunit will be logged. All errors in subsequent 16-byte subunits - * from the same 64-byte transaction are ignored. - */ -#define CHAFSR_ME (1UL << 53UL) /* ch,ch+,jp */ - -/* Privileged state error has occurred. This is a capture of PSTATE.PRIV - * at the time the error is detected. - */ -#define CHAFSR_PRIV (1UL << 52UL) /* ch,ch+,jp */ - -/* The following bits 51 (CHAFSR_PERR) to 33 (CHAFSR_CE) are sticky error - * bits and record the most recently detected errors. Bits accumulate - * errors that have been detected since the last write to clear the bit. - */ - -/* System interface protocol error. The processor asserts its' ERROR - * pin when this event occurs and it also logs a specific cause code - * into a JTAG scannable flop. - */ -#define CHAFSR_PERR (1UL << 51UL) /* ch,ch+,jp */ - -/* Internal processor error. The processor asserts its' ERROR - * pin when this event occurs and it also logs a specific cause code - * into a JTAG scannable flop. - */ -#define CHAFSR_IERR (1UL << 50UL) /* ch,ch+,jp */ - -/* System request parity error on incoming address */ -#define CHAFSR_ISAP (1UL << 49UL) /* ch,ch+,jp */ - -/* HW Corrected system bus MTAG ECC error */ -#define CHAFSR_EMC (1UL << 48UL) /* ch,ch+ */ -/* Parity error on L2 cache tag SRAM */ -#define JPAFSR_ETP (1UL << 48UL) /* jp */ - -/* Uncorrectable system bus MTAG ECC error */ -#define CHAFSR_EMU (1UL << 47UL) /* ch,ch+ */ -/* Out of range memory error has occurred */ -#define JPAFSR_OM (1UL << 47UL) /* jp */ - -/* HW Corrected system bus data ECC error for read of interrupt vector */ -#define CHAFSR_IVC (1UL << 46UL) /* ch,ch+ */ -/* Error due to unsupported store */ -#define JPAFSR_UMS (1UL << 46UL) /* jp */ - -/* Uncorrectable system bus data ECC error for read of interrupt vector */ -#define CHAFSR_IVU (1UL << 45UL) /* ch,ch+,jp */ - -/* Unmapped error from system bus */ -#define CHAFSR_TO (1UL << 44UL) /* ch,ch+,jp */ - -/* Bus error response from system bus */ -#define CHAFSR_BERR (1UL << 43UL) /* ch,ch+,jp */ - -/* SW Correctable E-cache ECC error for instruction fetch or data access - * other than block load. - */ -#define CHAFSR_UCC (1UL << 42UL) /* ch,ch+,jp */ - -/* Uncorrectable E-cache ECC error for instruction fetch or data access - * other than block load. - */ -#define CHAFSR_UCU (1UL << 41UL) /* ch,ch+,jp */ - -/* Copyout HW Corrected ECC error */ -#define CHAFSR_CPC (1UL << 40UL) /* ch,ch+,jp */ - -/* Copyout Uncorrectable ECC error */ -#define CHAFSR_CPU (1UL << 39UL) /* ch,ch+,jp */ - -/* HW Corrected ECC error from E-cache for writeback */ -#define CHAFSR_WDC (1UL << 38UL) /* ch,ch+,jp */ - -/* Uncorrectable ECC error from E-cache for writeback */ -#define CHAFSR_WDU (1UL << 37UL) /* ch,ch+,jp */ - -/* HW Corrected ECC error from E-cache for store merge or block load */ -#define CHAFSR_EDC (1UL << 36UL) /* ch,ch+,jp */ - -/* Uncorrectable ECC error from E-cache for store merge or block load */ -#define CHAFSR_EDU (1UL << 35UL) /* ch,ch+,jp */ - -/* Uncorrectable system bus data ECC error for read of memory or I/O */ -#define CHAFSR_UE (1UL << 34UL) /* ch,ch+,jp */ - -/* HW Corrected system bus data ECC error for read of memory or I/O */ -#define CHAFSR_CE (1UL << 33UL) /* ch,ch+,jp */ - -/* Uncorrectable ECC error from remote cache/memory */ -#define JPAFSR_RUE (1UL << 32UL) /* jp */ - -/* Correctable ECC error from remote cache/memory */ -#define JPAFSR_RCE (1UL << 31UL) /* jp */ - -/* JBUS parity error on returned read data */ -#define JPAFSR_BP (1UL << 30UL) /* jp */ - -/* JBUS parity error on data for writeback or block store */ -#define JPAFSR_WBP (1UL << 29UL) /* jp */ - -/* Foreign read to DRAM incurring correctable ECC error */ -#define JPAFSR_FRC (1UL << 28UL) /* jp */ - -/* Foreign read to DRAM incurring uncorrectable ECC error */ -#define JPAFSR_FRU (1UL << 27UL) /* jp */ - -#define CHAFSR_ERRORS (CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \ - CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \ - CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \ - CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \ - CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE) -#define CHPAFSR_ERRORS (CHPAFSR_DTO | CHPAFSR_DBERR | CHPAFSR_THCE | \ - CHPAFSR_TSCE | CHPAFSR_TUE | CHPAFSR_DUE | \ - CHAFSR_PERR | CHAFSR_IERR | CHAFSR_ISAP | CHAFSR_EMC | \ - CHAFSR_EMU | CHAFSR_IVC | CHAFSR_IVU | CHAFSR_TO | \ - CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | CHAFSR_CPC | \ - CHAFSR_CPU | CHAFSR_WDC | CHAFSR_WDU | CHAFSR_EDC | \ - CHAFSR_EDU | CHAFSR_UE | CHAFSR_CE) -#define JPAFSR_ERRORS (JPAFSR_JETO | JPAFSR_SCE | JPAFSR_JEIC | \ - JPAFSR_JEIT | CHAFSR_PERR | CHAFSR_IERR | \ - CHAFSR_ISAP | JPAFSR_ETP | JPAFSR_OM | \ - JPAFSR_UMS | CHAFSR_IVU | CHAFSR_TO | \ - CHAFSR_BERR | CHAFSR_UCC | CHAFSR_UCU | \ - CHAFSR_CPC | CHAFSR_CPU | CHAFSR_WDC | \ - CHAFSR_WDU | CHAFSR_EDC | CHAFSR_EDU | \ - CHAFSR_UE | CHAFSR_CE | JPAFSR_RUE | \ - JPAFSR_RCE | JPAFSR_BP | JPAFSR_WBP | \ - JPAFSR_FRC | JPAFSR_FRU) - -/* Active JBUS request signal when error occurred */ -#define JPAFSR_JBREQ (0x7UL << 24UL) /* jp */ -#define JPAFSR_JBREQ_SHIFT 24UL - -/* L2 cache way information */ -#define JPAFSR_ETW (0x3UL << 22UL) /* jp */ -#define JPAFSR_ETW_SHIFT 22UL - -/* System bus MTAG ECC syndrome. This field captures the status of the - * first occurrence of the highest-priority error according to the M_SYND - * overwrite policy. After the AFSR sticky bit, corresponding to the error - * for which the M_SYND is reported, is cleared, the contents of the M_SYND - * field will be unchanged by will be unfrozen for further error capture. - */ -#define CHAFSR_M_SYNDROME (0xfUL << 16UL) /* ch,ch+,jp */ -#define CHAFSR_M_SYNDROME_SHIFT 16UL - -/* Agenid Id of the foreign device causing the UE/CE errors */ -#define JPAFSR_AID (0x1fUL << 9UL) /* jp */ -#define JPAFSR_AID_SHIFT 9UL - -/* System bus or E-cache data ECC syndrome. This field captures the status - * of the first occurrence of the highest-priority error according to the - * E_SYND overwrite policy. After the AFSR sticky bit, corresponding to the - * error for which the E_SYND is reported, is cleare, the contents of the E_SYND - * field will be unchanged but will be unfrozen for further error capture. - */ -#define CHAFSR_E_SYNDROME (0x1ffUL << 0UL) /* ch,ch+,jp */ -#define CHAFSR_E_SYNDROME_SHIFT 0UL - -/* The AFSR must be explicitly cleared by software, it is not cleared automatically - * by a read. Writes to bits <51:33> with bits set will clear the corresponding - * bits in the AFSR. Bits associated with disrupting traps must be cleared before - * interrupts are re-enabled to prevent multiple traps for the same error. I.e. - * PSTATE.IE and AFSR bits control delivery of disrupting traps. - * - * Since there is only one AFAR, when multiple events have been logged by the - * bits in the AFSR, at most one of these events will have its status captured - * in the AFAR. The highest priority of those event bits will get AFAR logging. - * The AFAR will be unlocked and available to capture the address of another event - * as soon as the one bit in AFSR that corresponds to the event logged in AFAR is - * cleared. For example, if AFSR.CE is detected, then AFSR.UE (which overwrites - * the AFAR), and AFSR.UE is cleared by not AFSR.CE, then the AFAR will be unlocked - * and ready for another event, even though AFSR.CE is still set. The same rules - * also apply to the M_SYNDROME and E_SYNDROME fields of the AFSR. - */ - -#endif /* _SPARC64_CHAFSR_H */ diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h deleted file mode 100644 index 4e3553d..0000000 --- a/include/asm-sparc/checksum.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_CHECKSUM_H -#define ___ASM_SPARC_CHECKSUM_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/checksum_32.h b/include/asm-sparc/checksum_32.h deleted file mode 100644 index bdbda14..0000000 --- a/include/asm-sparc/checksum_32.h +++ /dev/null @@ -1,241 +0,0 @@ -#ifndef __SPARC_CHECKSUM_H -#define __SPARC_CHECKSUM_H - -/* checksum.h: IP/UDP/TCP checksum routines on the Sparc. - * - * Copyright(C) 1995 Linus Torvalds - * Copyright(C) 1995 Miguel de Icaza - * Copyright(C) 1996 David S. Miller - * Copyright(C) 1996 Eddie C. Dost - * Copyright(C) 1997 Jakub Jelinek - * - * derived from: - * Alpha checksum c-code - * ix86 inline assembly - * RFC1071 Computing the Internet Checksum - */ - -#include -#include - -/* computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* the same as csum_partial, but copies from fs:src while it - * checksums - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); - -static inline __wsum -csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) -{ - register unsigned int ret asm("o0") = (unsigned int)src; - register char *d asm("o1") = dst; - register int l asm("g1") = len; - - __asm__ __volatile__ ( - "call __csum_partial_copy_sparc_generic\n\t" - " mov %6, %%g7\n" - : "=&r" (ret), "=&r" (d), "=&r" (l) - : "0" (ret), "1" (d), "2" (l), "r" (sum) - : "o2", "o3", "o4", "o5", "o7", - "g2", "g3", "g4", "g5", "g7", - "memory", "cc"); - return (__force __wsum)ret; -} - -static inline __wsum -csum_partial_copy_from_user(const void __user *src, void *dst, int len, - __wsum sum, int *err) - { - register unsigned long ret asm("o0") = (unsigned long)src; - register char *d asm("o1") = dst; - register int l asm("g1") = len; - register __wsum s asm("g7") = sum; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,2\n\t" - ".previous\n" - "1:\n\t" - "call __csum_partial_copy_sparc_generic\n\t" - " st %8, [%%sp + 64]\n" - : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) - : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) - : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", - "cc", "memory"); - return (__force __wsum)ret; -} - -static inline __wsum -csum_partial_copy_to_user(const void *src, void __user *dst, int len, - __wsum sum, int *err) -{ - if (!access_ok (VERIFY_WRITE, dst, len)) { - *err = -EFAULT; - return sum; - } else { - register unsigned long ret asm("o0") = (unsigned long)src; - register char __user *d asm("o1") = dst; - register int l asm("g1") = len; - register __wsum s asm("g7") = sum; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,1\n\t" - ".previous\n" - "1:\n\t" - "call __csum_partial_copy_sparc_generic\n\t" - " st %8, [%%sp + 64]\n" - : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) - : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) - : "o2", "o3", "o4", "o5", "o7", - "g2", "g3", "g4", "g5", - "cc", "memory"); - return (__force __wsum)ret; - } -} - -#define HAVE_CSUM_COPY_USER -#define csum_and_copy_to_user csum_partial_copy_to_user - -/* ihl is always 5 or greater, almost always is 5, and iph is word aligned - * the majority of the time. - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - __sum16 sum; - - /* Note: We must read %2 before we touch %0 for the first time, - * because GCC can legitimately use the same register for - * both operands. - */ - __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" - "ld\t[%1 + 0x00], %0\n\t" - "ld\t[%1 + 0x04], %%g2\n\t" - "ld\t[%1 + 0x08], %%g3\n\t" - "addcc\t%%g2, %0, %0\n\t" - "addxcc\t%%g3, %0, %0\n\t" - "ld\t[%1 + 0x0c], %%g2\n\t" - "ld\t[%1 + 0x10], %%g3\n\t" - "addxcc\t%%g2, %0, %0\n\t" - "addx\t%0, %%g0, %0\n" - "1:\taddcc\t%%g3, %0, %0\n\t" - "add\t%1, 4, %1\n\t" - "addxcc\t%0, %%g0, %0\n\t" - "subcc\t%%g4, 1, %%g4\n\t" - "be,a\t2f\n\t" - "sll\t%0, 16, %%g2\n\t" - "b\t1b\n\t" - "ld\t[%1 + 0x10], %%g3\n" - "2:\taddcc\t%0, %%g2, %%g2\n\t" - "srl\t%%g2, 16, %0\n\t" - "addx\t%0, %%g0, %0\n\t" - "xnor\t%%g0, %0, %0" - : "=r" (sum), "=&r" (iph) - : "r" (ihl), "1" (iph) - : "g2", "g3", "g4", "cc", "memory"); - return sum; -} - -/* Fold a partial checksum without adding pseudo headers. */ -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - __asm__ __volatile__("addcc\t%0, %1, %1\n\t" - "srl\t%1, 16, %1\n\t" - "addx\t%1, %%g0, %1\n\t" - "xnor\t%%g0, %1, %0" - : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" ((__force u32)sum<<16) - : "cc"); - return (__force __sum16)sum; -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__("addcc\t%1, %0, %0\n\t" - "addxcc\t%2, %0, %0\n\t" - "addxcc\t%3, %0, %0\n\t" - "addx\t%0, %%g0, %0\n\t" - : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" (proto + len), "0" (sum), - "1" (saddr) - : "cc"); - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -#define _HAVE_ARCH_IPV6_CSUM - -static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__ ( - "addcc %3, %4, %%g4\n\t" - "addxcc %5, %%g4, %%g4\n\t" - "ld [%2 + 0x0c], %%g2\n\t" - "ld [%2 + 0x08], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%2 + 0x04], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%2 + 0x00], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%1 + 0x0c], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%1 + 0x08], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%1 + 0x04], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%1 + 0x00], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "addxcc %%g3, %%g4, %0\n\t" - "addx 0, %0, %0\n" - : "=&r" (sum) - : "r" (saddr), "r" (daddr), - "r"(htonl(len)), "r"(htonl(proto)), "r"(sum) - : "g2", "g3", "g4", "cc"); - - return csum_fold(sum); -} - -/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* !(__SPARC_CHECKSUM_H) */ diff --git a/include/asm-sparc/checksum_64.h b/include/asm-sparc/checksum_64.h deleted file mode 100644 index 019b961..0000000 --- a/include/asm-sparc/checksum_64.h +++ /dev/null @@ -1,167 +0,0 @@ -#ifndef __SPARC64_CHECKSUM_H -#define __SPARC64_CHECKSUM_H - -/* checksum.h: IP/UDP/TCP checksum routines on the V9. - * - * Copyright(C) 1995 Linus Torvalds - * Copyright(C) 1995 Miguel de Icaza - * Copyright(C) 1996 David S. Miller - * Copyright(C) 1996 Eddie C. Dost - * Copyright(C) 1997 Jakub Jelinek - * - * derived from: - * Alpha checksum c-code - * ix86 inline assembly - * RFC1071 Computing the Internet Checksum - */ - -#include -#include - -/* computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void * buff, int len, __wsum sum); - -/* the same as csum_partial, but copies from user space while it - * checksums - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ -extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum); - -extern long __csum_partial_copy_from_user(const void __user *src, - void *dst, int len, - __wsum sum); - -static inline __wsum -csum_partial_copy_from_user(const void __user *src, - void *dst, int len, - __wsum sum, int *err) -{ - long ret = __csum_partial_copy_from_user(src, dst, len, sum); - if (ret < 0) - *err = -EFAULT; - return (__force __wsum) ret; -} - -/* - * Copy and checksum to user - */ -#define HAVE_CSUM_COPY_USER -extern long __csum_partial_copy_to_user(const void *src, - void __user *dst, int len, - __wsum sum); - -static inline __wsum -csum_and_copy_to_user(const void *src, - void __user *dst, int len, - __wsum sum, int *err) -{ - long ret = __csum_partial_copy_to_user(src, dst, len, sum); - if (ret < 0) - *err = -EFAULT; - return (__force __wsum) ret; -} - -/* ihl is always 5 or greater, almost always is 5, and iph is word aligned - * the majority of the time. - */ -extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -/* Fold a partial checksum without adding pseudo headers. */ -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - __asm__ __volatile__( -" addcc %0, %1, %1\n" -" srl %1, 16, %1\n" -" addc %1, %%g0, %1\n" -" xnor %%g0, %1, %0\n" - : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" ((__force u32)sum<<16) - : "cc"); - return (__force __sum16)sum; -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned int len, - unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__( -" addcc %1, %0, %0\n" -" addccc %2, %0, %0\n" -" addccc %3, %0, %0\n" -" addc %0, %%g0, %0\n" - : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) - : "cc"); - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -#define _HAVE_ARCH_IPV6_CSUM - -static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__ ( -" addcc %3, %4, %%g7\n" -" addccc %5, %%g7, %%g7\n" -" lduw [%2 + 0x0c], %%g2\n" -" lduw [%2 + 0x08], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%2 + 0x04], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%2 + 0x00], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%1 + 0x0c], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%1 + 0x08], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%1 + 0x04], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%1 + 0x00], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" addccc %%g3, %%g7, %0\n" -" addc 0, %0, %0\n" - : "=&r" (sum) - : "r" (saddr), "r" (daddr), "r"(htonl(len)), - "r"(htonl(proto)), "r"(sum) - : "g2", "g3", "g7", "cc"); - - return csum_fold(sum); -} - -/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* !(__SPARC64_CHECKSUM_H) */ diff --git a/include/asm-sparc/chmctrl.h b/include/asm-sparc/chmctrl.h deleted file mode 100644 index 859b4a4..0000000 --- a/include/asm-sparc/chmctrl.h +++ /dev/null @@ -1,183 +0,0 @@ -#ifndef _SPARC64_CHMCTRL_H -#define _SPARC64_CHMCTRL_H - -/* Cheetah memory controller programmable registers. */ -#define CHMCTRL_TCTRL1 0x00 /* Memory Timing Control I */ -#define CHMCTRL_TCTRL2 0x08 /* Memory Timing Control II */ -#define CHMCTRL_TCTRL3 0x38 /* Memory Timing Control III */ -#define CHMCTRL_TCTRL4 0x40 /* Memory Timing Control IV */ -#define CHMCTRL_DECODE1 0x10 /* Memory Address Decode I */ -#define CHMCTRL_DECODE2 0x18 /* Memory Address Decode II */ -#define CHMCTRL_DECODE3 0x20 /* Memory Address Decode III */ -#define CHMCTRL_DECODE4 0x28 /* Memory Address Decode IV */ -#define CHMCTRL_MACTRL 0x30 /* Memory Address Control */ - -/* Memory Timing Control I */ -#define TCTRL1_SDRAMCTL_DLY 0xf000000000000000UL -#define TCTRL1_SDRAMCTL_DLY_SHIFT 60 -#define TCTRL1_SDRAMCLK_DLY 0x0e00000000000000UL -#define TCTRL1_SDRAMCLK_DLY_SHIFT 57 -#define TCTRL1_R 0x0100000000000000UL -#define TCTRL1_R_SHIFT 56 -#define TCTRL1_AUTORFR_CYCLE 0x00fe000000000000UL -#define TCTRL1_AUTORFR_CYCLE_SHIFT 49 -#define TCTRL1_RD_WAIT 0x0001f00000000000UL -#define TCTRL1_RD_WAIT_SHIFT 44 -#define TCTRL1_PC_CYCLE 0x00000fc000000000UL -#define TCTRL1_PC_CYCLE_SHIFT 38 -#define TCTRL1_WR_MORE_RAS_PW 0x0000003f00000000UL -#define TCTRL1_WR_MORE_RAS_PW_SHIFT 32 -#define TCTRL1_RD_MORE_RAW_PW 0x00000000fc000000UL -#define TCTRL1_RD_MORE_RAS_PW_SHIFT 26 -#define TCTRL1_ACT_WR_DLY 0x0000000003f00000UL -#define TCTRL1_ACT_WR_DLY_SHIFT 20 -#define TCTRL1_ACT_RD_DLY 0x00000000000fc000UL -#define TCTRL1_ACT_RD_DLY_SHIFT 14 -#define TCTRL1_BANK_PRESENT 0x0000000000003000UL -#define TCTRL1_BANK_PRESENT_SHIFT 12 -#define TCTRL1_RFR_INT 0x0000000000000ff8UL -#define TCTRL1_RFR_INT_SHIFT 3 -#define TCTRL1_SET_MODE_REG 0x0000000000000004UL -#define TCTRL1_SET_MODE_REG_SHIFT 2 -#define TCTRL1_RFR_ENABLE 0x0000000000000002UL -#define TCTRL1_RFR_ENABLE_SHIFT 1 -#define TCTRL1_PRECHG_ALL 0x0000000000000001UL -#define TCTRL1_PRECHG_ALL_SHIFT 0 - -/* Memory Timing Control II */ -#define TCTRL2_WR_MSEL_DLY 0xfc00000000000000UL -#define TCTRL2_WR_MSEL_DLY_SHIFT 58 -#define TCTRL2_RD_MSEL_DLY 0x03f0000000000000UL -#define TCTRL2_RD_MSEL_DLY_SHIFT 52 -#define TCTRL2_WRDATA_THLD 0x000c000000000000UL -#define TCTRL2_WRDATA_THLD_SHIFT 50 -#define TCTRL2_RDWR_RD_TI_DLY 0x0003f00000000000UL -#define TCTRL2_RDWR_RD_TI_DLY_SHIFT 44 -#define TCTRL2_AUTOPRECHG_ENBL 0x0000080000000000UL -#define TCTRL2_AUTOPRECHG_ENBL_SHIFT 43 -#define TCTRL2_RDWR_PI_MORE_DLY 0x000007c000000000UL -#define TCTRL2_RDWR_PI_MORE_DLY_SHIFT 38 -#define TCTRL2_RDWR_1_DLY 0x0000003f00000000UL -#define TCTRL2_RDWR_1_DLY_SHIFT 32 -#define TCTRL2_WRWR_PI_MORE_DLY 0x00000000f8000000UL -#define TCTRL2_WRWR_PI_MORE_DLY_SHIFT 27 -#define TCTRL2_WRWR_1_DLY 0x0000000007e00000UL -#define TCTRL2_WRWR_1_DLY_SHIFT 21 -#define TCTRL2_RDWR_RD_PI_MORE_DLY 0x00000000001f0000UL -#define TCTRL2_RDWR_RD_PI_MORE_DLY_SHIFT 16 -#define TCTRL2_R 0x0000000000008000UL -#define TCTRL2_R_SHIFT 15 -#define TCTRL2_SDRAM_MODE_REG_DATA 0x0000000000007fffUL -#define TCTRL2_SDRAM_MODE_REG_DATA_SHIFT 0 - -/* Memory Timing Control III */ -#define TCTRL3_SDRAM_CTL_DLY 0xf000000000000000UL -#define TCTRL3_SDRAM_CTL_DLY_SHIFT 60 -#define TCTRL3_SDRAM_CLK_DLY 0x0e00000000000000UL -#define TCTRL3_SDRAM_CLK_DLY_SHIFT 57 -#define TCTRL3_R 0x0100000000000000UL -#define TCTRL3_R_SHIFT 56 -#define TCTRL3_AUTO_RFR_CYCLE 0x00fe000000000000UL -#define TCTRL3_AUTO_RFR_CYCLE_SHIFT 49 -#define TCTRL3_RD_WAIT 0x0001f00000000000UL -#define TCTRL3_RD_WAIT_SHIFT 44 -#define TCTRL3_PC_CYCLE 0x00000fc000000000UL -#define TCTRL3_PC_CYCLE_SHIFT 38 -#define TCTRL3_WR_MORE_RAW_PW 0x0000003f00000000UL -#define TCTRL3_WR_MORE_RAW_PW_SHIFT 32 -#define TCTRL3_RD_MORE_RAW_PW 0x00000000fc000000UL -#define TCTRL3_RD_MORE_RAW_PW_SHIFT 26 -#define TCTRL3_ACT_WR_DLY 0x0000000003f00000UL -#define TCTRL3_ACT_WR_DLY_SHIFT 20 -#define TCTRL3_ACT_RD_DLY 0x00000000000fc000UL -#define TCTRL3_ACT_RD_DLY_SHIFT 14 -#define TCTRL3_BANK_PRESENT 0x0000000000003000UL -#define TCTRL3_BANK_PRESENT_SHIFT 12 -#define TCTRL3_RFR_INT 0x0000000000000ff8UL -#define TCTRL3_RFR_INT_SHIFT 3 -#define TCTRL3_SET_MODE_REG 0x0000000000000004UL -#define TCTRL3_SET_MODE_REG_SHIFT 2 -#define TCTRL3_RFR_ENABLE 0x0000000000000002UL -#define TCTRL3_RFR_ENABLE_SHIFT 1 -#define TCTRL3_PRECHG_ALL 0x0000000000000001UL -#define TCTRL3_PRECHG_ALL_SHIFT 0 - -/* Memory Timing Control IV */ -#define TCTRL4_WR_MSEL_DLY 0xfc00000000000000UL -#define TCTRL4_WR_MSEL_DLY_SHIFT 58 -#define TCTRL4_RD_MSEL_DLY 0x03f0000000000000UL -#define TCTRL4_RD_MSEL_DLY_SHIFT 52 -#define TCTRL4_WRDATA_THLD 0x000c000000000000UL -#define TCTRL4_WRDATA_THLD_SHIFT 50 -#define TCTRL4_RDWR_RD_RI_DLY 0x0003f00000000000UL -#define TCTRL4_RDWR_RD_RI_DLY_SHIFT 44 -#define TCTRL4_AUTO_PRECHG_ENBL 0x0000080000000000UL -#define TCTRL4_AUTO_PRECHG_ENBL_SHIFT 43 -#define TCTRL4_RD_WR_PI_MORE_DLY 0x000007c000000000UL -#define TCTRL4_RD_WR_PI_MORE_DLY_SHIFT 38 -#define TCTRL4_RD_WR_TI_DLY 0x0000003f00000000UL -#define TCTRL4_RD_WR_TI_DLY_SHIFT 32 -#define TCTRL4_WR_WR_PI_MORE_DLY 0x00000000f8000000UL -#define TCTRL4_WR_WR_PI_MORE_DLY_SHIFT 27 -#define TCTRL4_WR_WR_TI_DLY 0x0000000007e00000UL -#define TCTRL4_WR_WR_TI_DLY_SHIFT 21 -#define TCTRL4_RDWR_RD_PI_MORE_DLY 0x00000000001f000UL0 -#define TCTRL4_RDWR_RD_PI_MORE_DLY_SHIFT 16 -#define TCTRL4_R 0x0000000000008000UL -#define TCTRL4_R_SHIFT 15 -#define TCTRL4_SDRAM_MODE_REG_DATA 0x0000000000007fffUL -#define TCTRL4_SDRAM_MODE_REG_DATA_SHIFT 0 - -/* All 4 memory address decoding registers have the - * same layout. - */ -#define MEM_DECODE_VALID 0x8000000000000000UL /* Valid */ -#define MEM_DECODE_VALID_SHIFT 63 -#define MEM_DECODE_UK 0x001ffe0000000000UL /* Upper mask */ -#define MEM_DECODE_UK_SHIFT 41 -#define MEM_DECODE_UM 0x0000001ffff00000UL /* Upper match */ -#define MEM_DECODE_UM_SHIFT 20 -#define MEM_DECODE_LK 0x000000000003c000UL /* Lower mask */ -#define MEM_DECODE_LK_SHIFT 14 -#define MEM_DECODE_LM 0x0000000000000f00UL /* Lower match */ -#define MEM_DECODE_LM_SHIFT 8 - -#define PA_UPPER_BITS 0x000007fffc000000UL -#define PA_UPPER_BITS_SHIFT 26 -#define PA_LOWER_BITS 0x00000000000003c0UL -#define PA_LOWER_BITS_SHIFT 6 - -#define MACTRL_R0 0x8000000000000000UL -#define MACTRL_R0_SHIFT 63 -#define MACTRL_ADDR_LE_PW 0x7000000000000000UL -#define MACTRL_ADDR_LE_PW_SHIFT 60 -#define MACTRL_CMD_PW 0x0f00000000000000UL -#define MACTRL_CMD_PW_SHIFT 56 -#define MACTRL_HALF_MODE_WR_MSEL_DLY 0x00fc000000000000UL -#define MACTRL_HALF_MODE_WR_MSEL_DLY_SHIFT 50 -#define MACTRL_HALF_MODE_RD_MSEL_DLY 0x0003f00000000000UL -#define MACTRL_HALF_MODE_RD_MSEL_DLY_SHIFT 44 -#define MACTRL_HALF_MODE_SDRAM_CTL_DLY 0x00000f0000000000UL -#define MACTRL_HALF_MODE_SDRAM_CTL_DLY_SHIFT 40 -#define MACTRL_HALF_MODE_SDRAM_CLK_DLY 0x000000e000000000UL -#define MACTRL_HALF_MODE_SDRAM_CLK_DLY_SHIFT 37 -#define MACTRL_R1 0x0000001000000000UL -#define MACTRL_R1_SHIFT 36 -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3 0x0000000f00000000UL -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B3_SHIFT 32 -#define MACTRL_ENC_INTLV_B3 0x00000000f8000000UL -#define MACTRL_ENC_INTLV_B3_SHIFT 27 -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2 0x0000000007800000UL -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B2_SHIFT 23 -#define MACTRL_ENC_INTLV_B2 0x00000000007c0000UL -#define MACTRL_ENC_INTLV_B2_SHIFT 18 -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1 0x000000000003c000UL -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B1_SHIFT 14 -#define MACTRL_ENC_INTLV_B1 0x0000000000003e00UL -#define MACTRL_ENC_INTLV_B1_SHIFT 9 -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0 0x00000000000001e0UL -#define MACTRL_BANKSEL_N_ROWADDR_SIZE_B0_SHIFT 5 -#define MACTRL_ENC_INTLV_B0 0x000000000000001fUL -#define MACTRL_ENC_INTLV_B0_SHIFT 0 - -#endif /* _SPARC64_CHMCTRL_H */ diff --git a/include/asm-sparc/clock.h b/include/asm-sparc/clock.h deleted file mode 100644 index 2cf99da..0000000 --- a/include/asm-sparc/clock.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * clock.h: Definitions for clock operations on the Sparc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_CLOCK_H -#define _SPARC_CLOCK_H - -/* Foo for now. */ - -#endif /* !(_SPARC_CLOCK_H) */ diff --git a/include/asm-sparc/cmt.h b/include/asm-sparc/cmt.h deleted file mode 100644 index 870db59..0000000 --- a/include/asm-sparc/cmt.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _SPARC64_CMT_H -#define _SPARC64_CMT_H - -/* cmt.h: Chip Multi-Threading register definitions - * - * Copyright (C) 2004 David S. Miller (davem@redhat.com) - */ - -/* ASI_CORE_ID - private */ -#define LP_ID 0x0000000000000010UL -#define LP_ID_MAX 0x00000000003f0000UL -#define LP_ID_ID 0x000000000000003fUL - -/* ASI_INTR_ID - private */ -#define LP_INTR_ID 0x0000000000000000UL -#define LP_INTR_ID_ID 0x00000000000003ffUL - -/* ASI_CESR_ID - private */ -#define CESR_ID 0x0000000000000040UL -#define CESR_ID_ID 0x00000000000000ffUL - -/* ASI_CORE_AVAILABLE - shared */ -#define LP_AVAIL 0x0000000000000000UL -#define LP_AVAIL_1 0x0000000000000002UL -#define LP_AVAIL_0 0x0000000000000001UL - -/* ASI_CORE_ENABLE_STATUS - shared */ -#define LP_ENAB_STAT 0x0000000000000010UL -#define LP_ENAB_STAT_1 0x0000000000000002UL -#define LP_ENAB_STAT_0 0x0000000000000001UL - -/* ASI_CORE_ENABLE - shared */ -#define LP_ENAB 0x0000000000000020UL -#define LP_ENAB_1 0x0000000000000002UL -#define LP_ENAB_0 0x0000000000000001UL - -/* ASI_CORE_RUNNING - shared */ -#define LP_RUNNING_RW 0x0000000000000050UL -#define LP_RUNNING_W1S 0x0000000000000060UL -#define LP_RUNNING_W1C 0x0000000000000068UL -#define LP_RUNNING_1 0x0000000000000002UL -#define LP_RUNNING_0 0x0000000000000001UL - -/* ASI_CORE_RUNNING_STAT - shared */ -#define LP_RUN_STAT 0x0000000000000058UL -#define LP_RUN_STAT_1 0x0000000000000002UL -#define LP_RUN_STAT_0 0x0000000000000001UL - -/* ASI_XIR_STEERING - shared */ -#define LP_XIR_STEER 0x0000000000000030UL -#define LP_XIR_STEER_1 0x0000000000000002UL -#define LP_XIR_STEER_0 0x0000000000000001UL - -/* ASI_CMT_ERROR_STEERING - shared */ -#define CMT_ER_STEER 0x0000000000000040UL -#define CMT_ER_STEER_1 0x0000000000000002UL -#define CMT_ER_STEER_0 0x0000000000000001UL - -#endif /* _SPARC64_CMT_H */ diff --git a/include/asm-sparc/compat.h b/include/asm-sparc/compat.h deleted file mode 100644 index f260b58..0000000 --- a/include/asm-sparc/compat.h +++ /dev/null @@ -1,243 +0,0 @@ -#ifndef _ASM_SPARC64_COMPAT_H -#define _ASM_SPARC64_COMPAT_H -/* - * Architecture specific compatibility types - */ -#include - -#define COMPAT_USER_HZ 100 - -typedef u32 compat_size_t; -typedef s32 compat_ssize_t; -typedef s32 compat_time_t; -typedef s32 compat_clock_t; -typedef s32 compat_pid_t; -typedef u16 __compat_uid_t; -typedef u16 __compat_gid_t; -typedef u32 __compat_uid32_t; -typedef u32 __compat_gid32_t; -typedef u16 compat_mode_t; -typedef u32 compat_ino_t; -typedef u16 compat_dev_t; -typedef s32 compat_off_t; -typedef s64 compat_loff_t; -typedef s16 compat_nlink_t; -typedef u16 compat_ipc_pid_t; -typedef s32 compat_daddr_t; -typedef u32 compat_caddr_t; -typedef __kernel_fsid_t compat_fsid_t; -typedef s32 compat_key_t; -typedef s32 compat_timer_t; - -typedef s32 compat_int_t; -typedef s32 compat_long_t; -typedef s64 compat_s64; -typedef u32 compat_uint_t; -typedef u32 compat_ulong_t; -typedef u64 compat_u64; - -struct compat_timespec { - compat_time_t tv_sec; - s32 tv_nsec; -}; - -struct compat_timeval { - compat_time_t tv_sec; - s32 tv_usec; -}; - -struct compat_stat { - compat_dev_t st_dev; - compat_ino_t st_ino; - compat_mode_t st_mode; - compat_nlink_t st_nlink; - __compat_uid_t st_uid; - __compat_gid_t st_gid; - compat_dev_t st_rdev; - compat_off_t st_size; - compat_time_t st_atime; - compat_ulong_t st_atime_nsec; - compat_time_t st_mtime; - compat_ulong_t st_mtime_nsec; - compat_time_t st_ctime; - compat_ulong_t st_ctime_nsec; - compat_off_t st_blksize; - compat_off_t st_blocks; - u32 __unused4[2]; -}; - -struct compat_stat64 { - unsigned long long st_dev; - - unsigned long long st_ino; - - unsigned int st_mode; - unsigned int st_nlink; - - unsigned int st_uid; - unsigned int st_gid; - - unsigned long long st_rdev; - - unsigned char __pad3[8]; - - long long st_size; - unsigned int st_blksize; - - unsigned char __pad4[8]; - unsigned int st_blocks; - - unsigned int st_atime; - unsigned int st_atime_nsec; - - unsigned int st_mtime; - unsigned int st_mtime_nsec; - - unsigned int st_ctime; - unsigned int st_ctime_nsec; - - unsigned int __unused4; - unsigned int __unused5; -}; - -struct compat_flock { - short l_type; - short l_whence; - compat_off_t l_start; - compat_off_t l_len; - compat_pid_t l_pid; - short __unused; -}; - -#define F_GETLK64 12 -#define F_SETLK64 13 -#define F_SETLKW64 14 - -struct compat_flock64 { - short l_type; - short l_whence; - compat_loff_t l_start; - compat_loff_t l_len; - compat_pid_t l_pid; - short __unused; -}; - -struct compat_statfs { - int f_type; - int f_bsize; - int f_blocks; - int f_bfree; - int f_bavail; - int f_files; - int f_ffree; - compat_fsid_t f_fsid; - int f_namelen; /* SunOS ignores this field. */ - int f_frsize; - int f_spare[5]; -}; - -#define COMPAT_RLIM_INFINITY 0x7fffffff - -typedef u32 compat_old_sigset_t; - -#define _COMPAT_NSIG 64 -#define _COMPAT_NSIG_BPW 32 - -typedef u32 compat_sigset_word; - -#define COMPAT_OFF_T_MAX 0x7fffffff -#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL - -/* - * A pointer passed in from user mode. This should not - * be used for syscall parameters, just declare them - * as pointers because the syscall entry code will have - * appropriately converted them already. - */ -typedef u32 compat_uptr_t; - -static inline void __user *compat_ptr(compat_uptr_t uptr) -{ - return (void __user *)(unsigned long)uptr; -} - -static inline compat_uptr_t ptr_to_compat(void __user *uptr) -{ - return (u32)(unsigned long)uptr; -} - -static inline void __user *compat_alloc_user_space(long len) -{ - struct pt_regs *regs = current_thread_info()->kregs; - unsigned long usp = regs->u_regs[UREG_I6]; - - if (!(test_thread_flag(TIF_32BIT))) - usp += STACK_BIAS; - else - usp &= 0xffffffffUL; - - usp -= len; - usp &= ~0x7UL; - - return (void __user *) usp; -} - -struct compat_ipc64_perm { - compat_key_t key; - __compat_uid32_t uid; - __compat_gid32_t gid; - __compat_uid32_t cuid; - __compat_gid32_t cgid; - unsigned short __pad1; - compat_mode_t mode; - unsigned short __pad2; - unsigned short seq; - unsigned long __unused1; /* yes they really are 64bit pads */ - unsigned long __unused2; -}; - -struct compat_semid64_ds { - struct compat_ipc64_perm sem_perm; - unsigned int __pad1; - compat_time_t sem_otime; - unsigned int __pad2; - compat_time_t sem_ctime; - u32 sem_nsems; - u32 __unused1; - u32 __unused2; -}; - -struct compat_msqid64_ds { - struct compat_ipc64_perm msg_perm; - unsigned int __pad1; - compat_time_t msg_stime; - unsigned int __pad2; - compat_time_t msg_rtime; - unsigned int __pad3; - compat_time_t msg_ctime; - unsigned int msg_cbytes; - unsigned int msg_qnum; - unsigned int msg_qbytes; - compat_pid_t msg_lspid; - compat_pid_t msg_lrpid; - unsigned int __unused1; - unsigned int __unused2; -}; - -struct compat_shmid64_ds { - struct compat_ipc64_perm shm_perm; - unsigned int __pad1; - compat_time_t shm_atime; - unsigned int __pad2; - compat_time_t shm_dtime; - unsigned int __pad3; - compat_time_t shm_ctime; - compat_size_t shm_segsz; - compat_pid_t shm_cpid; - compat_pid_t shm_lpid; - unsigned int shm_nattch; - unsigned int __unused1; - unsigned int __unused2; -}; - -#endif /* _ASM_SPARC64_COMPAT_H */ diff --git a/include/asm-sparc/compat_signal.h b/include/asm-sparc/compat_signal.h deleted file mode 100644 index b759eab..0000000 --- a/include/asm-sparc/compat_signal.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _COMPAT_SIGNAL_H -#define _COMPAT_SIGNAL_H - -#include -#include - -#ifdef CONFIG_COMPAT -struct __new_sigaction32 { - unsigned sa_handler; - unsigned int sa_flags; - unsigned sa_restorer; /* not used by Linux/SPARC yet */ - compat_sigset_t sa_mask; -}; - -struct __old_sigaction32 { - unsigned sa_handler; - compat_old_sigset_t sa_mask; - unsigned int sa_flags; - unsigned sa_restorer; /* not used by Linux/SPARC yet */ -}; - -typedef struct sigaltstack32 { - u32 ss_sp; - int ss_flags; - compat_size_t ss_size; -} stack_t32; -#endif - -#endif /* !(_COMPAT_SIGNAL_H) */ diff --git a/include/asm-sparc/contregs.h b/include/asm-sparc/contregs.h deleted file mode 100644 index 48fa8a4..0000000 --- a/include/asm-sparc/contregs.h +++ /dev/null @@ -1,53 +0,0 @@ -#ifndef _SPARC_CONTREGS_H -#define _SPARC_CONTREGS_H - -/* contregs.h: Addresses of registers in the ASI_CONTROL alternate address - * space. These are for the mmu's context register, etc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -/* 3=sun3 - 4=sun4 (as in sun4 sysmaint student book) - c=sun4c (according to davem) */ - -#define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */ -#define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */ -#define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */ -#define AC_CONTEXT 0x30000000 /* 34c current mmu-context */ -#define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/ -#define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */ -#define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */ -#define AC_SYNC_ERR 0x60000000 /* c fault type */ -#define AC_SYNC_VA 0x60000004 /* c fault virtual address */ -#define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */ -#define AC_ASYNC_VA 0x6000000c /* c async fault virtual address */ -#define AC_LEDS 0x70000000 /* 34 Zero turns on LEDs, byte */ -#define AC_CACHETAGS 0x80000000 /* 34c direct access to the VAC tags */ -#define AC_CACHEDDATA 0x90000000 /* 3 c direct access to the VAC data */ -#define AC_UDVMA_MAP 0xD0000000 /* 4 Not used on Sun boards, byte */ -#define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */ -#define AC_BOOT_SCC 0xF0000000 /* 34 bypass to access Zilog 8530. byte.*/ - -/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ -#define AC_M_PCR 0x0000 /* shv Processor Control Reg */ -#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ -#define AC_M_CXR 0x0200 /* shv Context Register */ -#define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */ -#define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */ -#define AC_M_AFSR 0x0500 /* hv Asynchronous Fault Status Reg */ -#define AC_M_AFAR 0x0600 /* hv Asynchronous Fault Address Reg */ -#define AC_M_RESET 0x0700 /* hv Reset Reg */ -#define AC_M_RPR 0x1000 /* hv Root Pointer Reg */ -#define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */ -#define AC_M_IAPTP 0x1100 /* hv Instruction Access PTP */ -#define AC_M_DAPTP 0x1200 /* hv Data Access PTP */ -#define AC_M_ITR 0x1300 /* hv Index Tag Register */ -#define AC_M_TRCR 0x1400 /* hv TLB Replacement Control Reg */ -#define AC_M_SFSRX 0x1300 /* s Synch Fault Status Reg prim */ -#define AC_M_SFARX 0x1400 /* s Synch Fault Address Reg prim */ -#define AC_M_RPR1 0x1500 /* h Root Pointer Reg (entry 2) */ -#define AC_M_IAPTP1 0x1600 /* h Instruction Access PTP (entry 2) */ -#define AC_M_DAPTP1 0x1700 /* h Data Access PTP (entry 2) */ - -#endif /* _SPARC_CONTREGS_H */ diff --git a/include/asm-sparc/cpudata.h b/include/asm-sparc/cpudata.h deleted file mode 100644 index b76fac0..0000000 --- a/include/asm-sparc/cpudata.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_CPUDATA_H -#define ___ASM_SPARC_CPUDATA_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/cpudata_32.h b/include/asm-sparc/cpudata_32.h deleted file mode 100644 index a2c4d51..0000000 --- a/include/asm-sparc/cpudata_32.h +++ /dev/null @@ -1,27 +0,0 @@ -/* cpudata.h: Per-cpu parameters. - * - * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) - * - * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h - * both (C) David S. Miller. - */ - -#ifndef _SPARC_CPUDATA_H -#define _SPARC_CPUDATA_H - -#include - -typedef struct { - unsigned long udelay_val; - unsigned long clock_tick; - unsigned int multiplier; - unsigned int counter; - int prom_node; - int mid; - int next; -} cpuinfo_sparc; - -DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); -#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) - -#endif /* _SPARC_CPUDATA_H */ diff --git a/include/asm-sparc/cpudata_64.h b/include/asm-sparc/cpudata_64.h deleted file mode 100644 index 532975e..0000000 --- a/include/asm-sparc/cpudata_64.h +++ /dev/null @@ -1,240 +0,0 @@ -/* cpudata.h: Per-cpu parameters. - * - * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_CPUDATA_H -#define _SPARC64_CPUDATA_H - -#include -#include - -#ifndef __ASSEMBLY__ - -#include -#include - -typedef struct { - /* Dcache line 1 */ - unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ - unsigned int __pad0; - unsigned long clock_tick; /* %tick's per second */ - unsigned long __pad; - unsigned int __pad1; - unsigned int __pad2; - - /* Dcache line 2, rarely used */ - unsigned int dcache_size; - unsigned int dcache_line_size; - unsigned int icache_size; - unsigned int icache_line_size; - unsigned int ecache_size; - unsigned int ecache_line_size; - int core_id; - int proc_id; -} cpuinfo_sparc; - -DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); -#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) -#define local_cpu_data() __get_cpu_var(__cpu_data) - -/* Trap handling code needs to get at a few critical values upon - * trap entry and to process TSB misses. These cannot be in the - * per_cpu() area as we really need to lock them into the TLB and - * thus make them part of the main kernel image. As a result we - * try to make this as small as possible. - * - * This is padded out and aligned to 64-bytes to avoid false sharing - * on SMP. - */ - -/* If you modify the size of this structure, please update - * TRAP_BLOCK_SZ_SHIFT below. - */ -struct thread_info; -struct trap_per_cpu { -/* D-cache line 1: Basic thread information, cpu and device mondo queues */ - struct thread_info *thread; - unsigned long pgd_paddr; - unsigned long cpu_mondo_pa; - unsigned long dev_mondo_pa; - -/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */ - unsigned long resum_mondo_pa; - unsigned long resum_kernel_buf_pa; - unsigned long nonresum_mondo_pa; - unsigned long nonresum_kernel_buf_pa; - -/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */ - struct hv_fault_status fault_info; - -/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ - unsigned long cpu_mondo_block_pa; - unsigned long cpu_list_pa; - unsigned long tsb_huge; - unsigned long tsb_huge_temp; - -/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ - unsigned long irq_worklist_pa; - unsigned int cpu_mondo_qmask; - unsigned int dev_mondo_qmask; - unsigned int resum_qmask; - unsigned int nonresum_qmask; - void *hdesc; -} __attribute__((aligned(64))); -extern struct trap_per_cpu trap_block[NR_CPUS]; -extern void init_cur_cpu_trap(struct thread_info *); -extern void setup_tba(void); -extern int ncpus_probed; -extern void __init cpu_probe(void); -extern const struct seq_operations cpuinfo_op; - -extern unsigned long real_hard_smp_processor_id(void); - -struct cpuid_patch_entry { - unsigned int addr; - unsigned int cheetah_safari[4]; - unsigned int cheetah_jbus[4]; - unsigned int starfire[4]; - unsigned int sun4v[4]; -}; -extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end; - -struct sun4v_1insn_patch_entry { - unsigned int addr; - unsigned int insn; -}; -extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch, - __sun4v_1insn_patch_end; - -struct sun4v_2insn_patch_entry { - unsigned int addr; - unsigned int insns[2]; -}; -extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, - __sun4v_2insn_patch_end; - -#endif /* !(__ASSEMBLY__) */ - -#define TRAP_PER_CPU_THREAD 0x00 -#define TRAP_PER_CPU_PGD_PADDR 0x08 -#define TRAP_PER_CPU_CPU_MONDO_PA 0x10 -#define TRAP_PER_CPU_DEV_MONDO_PA 0x18 -#define TRAP_PER_CPU_RESUM_MONDO_PA 0x20 -#define TRAP_PER_CPU_RESUM_KBUF_PA 0x28 -#define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x30 -#define TRAP_PER_CPU_NONRESUM_KBUF_PA 0x38 -#define TRAP_PER_CPU_FAULT_INFO 0x40 -#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 -#define TRAP_PER_CPU_CPU_LIST_PA 0xc8 -#define TRAP_PER_CPU_TSB_HUGE 0xd0 -#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 -#define TRAP_PER_CPU_IRQ_WORKLIST_PA 0xe0 -#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe8 -#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xec -#define TRAP_PER_CPU_RESUM_QMASK 0xf0 -#define TRAP_PER_CPU_NONRESUM_QMASK 0xf4 - -#define TRAP_BLOCK_SZ_SHIFT 8 - -#include - -#define __GET_CPUID(REG) \ - /* Spitfire implementation (default). */ \ -661: ldxa [%g0] ASI_UPA_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x1f, REG; \ - nop; \ - .section .cpuid_patch, "ax"; \ - /* Instruction location. */ \ - .word 661b; \ - /* Cheetah Safari implementation. */ \ - ldxa [%g0] ASI_SAFARI_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x3ff, REG; \ - nop; \ - /* Cheetah JBUS implementation. */ \ - ldxa [%g0] ASI_JBUS_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x1f, REG; \ - nop; \ - /* Starfire implementation. */ \ - sethi %hi(0x1fff40000d0 >> 9), REG; \ - sllx REG, 9, REG; \ - or REG, 0xd0, REG; \ - lduwa [REG] ASI_PHYS_BYPASS_EC_E, REG;\ - /* sun4v implementation. */ \ - mov SCRATCHPAD_CPUID, REG; \ - ldxa [REG] ASI_SCRATCHPAD, REG; \ - nop; \ - nop; \ - .previous; - -#ifdef CONFIG_SMP - -#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - __GET_CPUID(TMP) \ - sethi %hi(trap_block), DEST; \ - sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ - or DEST, %lo(trap_block), DEST; \ - add DEST, TMP, DEST; \ - -/* Clobbers TMP, current address space PGD phys address into DEST. */ -#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; - -/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ -#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; - -/* Clobbers TMP, loads DEST with current thread info pointer. */ -#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_THREAD], DEST; - -/* Given the current thread info pointer in THR, load the per-cpu - * area base of the current processor into DEST. REG1, REG2, and REG3 are - * clobbered. - * - * You absolutely cannot use DEST as a temporary in this code. The - * reason is that traps can happen during execution, and return from - * trap will load the fully resolved DEST per-cpu base. This can corrupt - * the calculations done by the macro mid-stream. - */ -#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ - lduh [THR + TI_CPU], REG1; \ - sethi %hi(__per_cpu_shift), REG3; \ - sethi %hi(__per_cpu_base), REG2; \ - ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ - ldx [REG2 + %lo(__per_cpu_base)], REG2; \ - sllx REG1, REG3, REG3; \ - add REG3, REG2, DEST; - -#else - -#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - sethi %hi(trap_block), DEST; \ - or DEST, %lo(trap_block), DEST; \ - -/* Uniprocessor versions, we know the cpuid is zero. */ -#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; - -/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ -#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; - -#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_THREAD], DEST; - -/* No per-cpu areas on uniprocessor, so no need to load DEST. */ -#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) - -#endif /* !(CONFIG_SMP) */ - -#endif /* _SPARC64_CPUDATA_H */ diff --git a/include/asm-sparc/cputime.h b/include/asm-sparc/cputime.h deleted file mode 100644 index 1a642b8..0000000 --- a/include/asm-sparc/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __SPARC_CPUTIME_H -#define __SPARC_CPUTIME_H - -#include - -#endif /* __SPARC_CPUTIME_H */ diff --git a/include/asm-sparc/current.h b/include/asm-sparc/current.h deleted file mode 100644 index 8a1d9d6..0000000 --- a/include/asm-sparc/current.h +++ /dev/null @@ -1,34 +0,0 @@ -/* include/asm-sparc/current.h - * - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Copyright (C) 2002 Pete Zaitcev (zaitcev@yahoo.com) - * Copyright (C) 2007 David S. Miller (davem@davemloft.net) - * - * Derived from "include/asm-s390/current.h" by - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * Derived from "include/asm-i386/current.h" -*/ -#ifndef _SPARC_CURRENT_H -#define _SPARC_CURRENT_H - -#include - -#ifdef CONFIG_SPARC64 -register struct task_struct *current asm("g4"); -#endif - -#ifdef CONFIG_SPARC32 -/* We might want to consider using %g4 like sparc64 to shave a few cycles. - * - * Two stage process (inline + #define) for type-checking. - * We also obfuscate get_current() to check if anyone used that by mistake. - */ -struct task_struct; -static inline struct task_struct *__get_current(void) -{ - return current_thread_info()->task; -} -#define current __get_current() -#endif - -#endif /* !(_SPARC_CURRENT_H) */ diff --git a/include/asm-sparc/cypress.h b/include/asm-sparc/cypress.h deleted file mode 100644 index 95e9772..0000000 --- a/include/asm-sparc/cypress.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * cypress.h: Cypress module specific definitions and defines. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_CYPRESS_H -#define _SPARC_CYPRESS_H - -/* Cypress chips have %psr 'impl' of '0001' and 'vers' of '0001'. */ - -/* The MMU control register fields on the Sparc Cypress 604/605 MMU's. - * - * --------------------------------------------------------------- - * |implvers| MCA | MCM |MV| MID |BM| C|RSV|MR|CM|CL|CE|RSV|NF|ME| - * --------------------------------------------------------------- - * 31 24 23-22 21-20 19 18-15 14 13 12 11 10 9 8 7-2 1 0 - * - * MCA: MultiChip Access -- Used for configuration of multiple - * CY7C604/605 cache units. - * MCM: MultiChip Mask -- Again, for multiple cache unit config. - * MV: MultiChip Valid -- Indicates MCM and MCA have valid settings. - * MID: ModuleID -- Unique processor ID for MBus transactions. (605 only) - * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode - * C: Cacheable -- Indicates whether accesses are cacheable while - * the MMU is off. 0=no 1=yes - * MR: MemoryReflection -- Indicates whether the bus attached to the - * MBus supports memory reflection. 0=no 1=yes (605 only) - * CM: CacheMode -- Indicates whether the cache is operating in write - * through or copy-back mode. 0=write-through 1=copy-back - * CL: CacheLock -- Indicates if the entire cache is locked or not. - * 0=not-locked 1=locked (604 only) - * CE: CacheEnable -- Is the virtual cache on? 0=no 1=yes - * NF: NoFault -- Do faults generate traps? 0=yes 1=no - * ME: MmuEnable -- Is the MMU doing translations? 0=no 1=yes - */ - -#define CYPRESS_MCA 0x00c00000 -#define CYPRESS_MCM 0x00300000 -#define CYPRESS_MVALID 0x00080000 -#define CYPRESS_MIDMASK 0x00078000 /* Only on 605 */ -#define CYPRESS_BMODE 0x00004000 -#define CYPRESS_ACENABLE 0x00002000 -#define CYPRESS_MRFLCT 0x00000800 /* Only on 605 */ -#define CYPRESS_CMODE 0x00000400 -#define CYPRESS_CLOCK 0x00000200 /* Only on 604 */ -#define CYPRESS_CENABLE 0x00000100 -#define CYPRESS_NFAULT 0x00000002 -#define CYPRESS_MENABLE 0x00000001 - -static inline void cypress_flush_page(unsigned long page) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (page), "i" (ASI_M_FLUSH_PAGE)); -} - -static inline void cypress_flush_segment(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_SEG)); -} - -static inline void cypress_flush_region(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : : - "r" (addr), "i" (ASI_M_FLUSH_REGION)); -} - -static inline void cypress_flush_context(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : : - "i" (ASI_M_FLUSH_CTX)); -} - -/* XXX Displacement flushes for buggy chips and initial testing - * XXX go here. - */ - -#endif /* !(_SPARC_CYPRESS_H) */ diff --git a/include/asm-sparc/dcr.h b/include/asm-sparc/dcr.h deleted file mode 100644 index 620c9ba..0000000 --- a/include/asm-sparc/dcr.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _SPARC64_DCR_H -#define _SPARC64_DCR_H - -/* UltraSparc-III/III+ Dispatch Control Register, ASR 0x12 */ -#define DCR_DPE 0x0000000000001000 /* III+: D$ Parity Error Enable */ -#define DCR_OBS 0x0000000000000fc0 /* Observability Bus Controls */ -#define DCR_BPE 0x0000000000000020 /* Branch Predict Enable */ -#define DCR_RPE 0x0000000000000010 /* Return Address Prediction Enable */ -#define DCR_SI 0x0000000000000008 /* Single Instruction Disable */ -#define DCR_IPE 0x0000000000000004 /* III+: I$ Parity Error Enable */ -#define DCR_IFPOE 0x0000000000000002 /* IRQ FP Operation Enable */ -#define DCR_MS 0x0000000000000001 /* Multi-Scalar dispatch */ - -#endif /* _SPARC64_DCR_H */ diff --git a/include/asm-sparc/dcu.h b/include/asm-sparc/dcu.h deleted file mode 100644 index 0f704e10..0000000 --- a/include/asm-sparc/dcu.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _SPARC64_DCU_H -#define _SPARC64_DCU_H - -#include - -/* UltraSparc-III Data Cache Unit Control Register */ -#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */ -#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */ -#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */ -#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */ -#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */ -#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */ -#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */ -#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/ -#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */ -#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */ -#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */ -#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */ -#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/ -#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */ -#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/ -#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */ -#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */ -#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */ -#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */ - -#endif /* _SPARC64_DCU_H */ diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h deleted file mode 100644 index 6210a3c..0000000 --- a/include/asm-sparc/delay.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_DELAY_H -#define ___ASM_SPARC_DELAY_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/delay_32.h b/include/asm-sparc/delay_32.h deleted file mode 100644 index bc9aba2..0000000 --- a/include/asm-sparc/delay_32.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * delay.h: Linux delay routines on the Sparc. - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu). - */ - -#ifndef __SPARC_DELAY_H -#define __SPARC_DELAY_H - -#include - -static inline void __delay(unsigned long loops) -{ - __asm__ __volatile__("cmp %0, 0\n\t" - "1: bne 1b\n\t" - "subcc %0, 1, %0\n" : - "=&r" (loops) : - "0" (loops) : - "cc"); -} - -/* This is too messy with inline asm on the Sparc. */ -extern void __udelay(unsigned long usecs, unsigned long lpj); -extern void __ndelay(unsigned long nsecs, unsigned long lpj); - -#ifdef CONFIG_SMP -#define __udelay_val cpu_data(smp_processor_id()).udelay_val -#else /* SMP */ -#define __udelay_val loops_per_jiffy -#endif /* SMP */ -#define udelay(__usecs) __udelay(__usecs, __udelay_val) -#define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val) - -#endif /* defined(__SPARC_DELAY_H) */ diff --git a/include/asm-sparc/delay_64.h b/include/asm-sparc/delay_64.h deleted file mode 100644 index a77aa62..0000000 --- a/include/asm-sparc/delay_64.h +++ /dev/null @@ -1,17 +0,0 @@ -/* delay.h: Linux delay routines on sparc64. - * - * Copyright (C) 1996, 2004, 2007 David S. Miller (davem@davemloft.net). - */ - -#ifndef _SPARC64_DELAY_H -#define _SPARC64_DELAY_H - -#ifndef __ASSEMBLY__ - -extern void __delay(unsigned long loops); -extern void udelay(unsigned long usecs); -#define mdelay(n) udelay((n) * 1000) - -#endif /* !__ASSEMBLY__ */ - -#endif /* _SPARC64_DELAY_H */ diff --git a/include/asm-sparc/device.h b/include/asm-sparc/device.h deleted file mode 100644 index 19790eb..0000000 --- a/include/asm-sparc/device.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#ifndef _ASM_SPARC_DEVICE_H -#define _ASM_SPARC_DEVICE_H - -struct device_node; -struct of_device; - -struct dev_archdata { - void *iommu; - void *stc; - void *host_controller; - - struct device_node *prom_node; - struct of_device *op; - - int numa_node; -}; - -#endif /* _ASM_SPARC_DEVICE_H */ diff --git a/include/asm-sparc/display7seg.h b/include/asm-sparc/display7seg.h deleted file mode 100644 index 86d4a90..0000000 --- a/include/asm-sparc/display7seg.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * - * display7seg - Driver interface for the 7-segment display - * present on Sun Microsystems CP1400 and CP1500 - * - * Copyright (c) 2000 Eric Brower - * - */ - -#ifndef __display7seg_h__ -#define __display7seg_h__ - -#define D7S_IOC 'p' - -#define D7SIOCRD _IOR(D7S_IOC, 0x45, int) /* Read device state */ -#define D7SIOCWR _IOW(D7S_IOC, 0x46, int) /* Write device state */ -#define D7SIOCTM _IO (D7S_IOC, 0x47) /* Translate mode (FLIP)*/ - -/* - * ioctl flag definitions - * - * POINT - Toggle decimal point (0=absent 1=present) - * ALARM - Toggle alarm LED (0=green 1=red) - * FLIP - Toggle inverted mode (0=normal 1=flipped) - * bits 0-4 - Character displayed (see definitions below) - * - * Display segments are defined as follows, - * subject to D7S_FLIP register state: - * - * a - * --- - * f| |b - * -g- - * e| |c - * --- - * d - */ - -#define D7S_POINT (1 << 7) /* Decimal point*/ -#define D7S_ALARM (1 << 6) /* Alarm LED */ -#define D7S_FLIP (1 << 5) /* Flip display */ - -#define D7S_0 0x00 /* Numerals 0-9 */ -#define D7S_1 0x01 -#define D7S_2 0x02 -#define D7S_3 0x03 -#define D7S_4 0x04 -#define D7S_5 0x05 -#define D7S_6 0x06 -#define D7S_7 0x07 -#define D7S_8 0x08 -#define D7S_9 0x09 -#define D7S_A 0x0A /* Letters A-F, H, L, P */ -#define D7S_B 0x0B -#define D7S_C 0x0C -#define D7S_D 0x0D -#define D7S_E 0x0E -#define D7S_F 0x0F -#define D7S_H 0x10 -#define D7S_E2 0x11 -#define D7S_L 0x12 -#define D7S_P 0x13 -#define D7S_SEGA 0x14 /* Individual segments */ -#define D7S_SEGB 0x15 -#define D7S_SEGC 0x16 -#define D7S_SEGD 0x17 -#define D7S_SEGE 0x18 -#define D7S_SEGF 0x19 -#define D7S_SEGG 0x1A -#define D7S_SEGABFG 0x1B /* Segment groupings */ -#define D7S_SEGCDEG 0x1C -#define D7S_SEGBCEF 0x1D -#define D7S_SEGADG 0x1E -#define D7S_BLANK 0x1F /* Clear all segments */ - -#define D7S_MIN_VAL 0x0 -#define D7S_MAX_VAL 0x1F - -#endif /* ifndef __display7seg_h__ */ diff --git a/include/asm-sparc/div64.h b/include/asm-sparc/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-sparc/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc/dma-mapping.h b/include/asm-sparc/dma-mapping.h deleted file mode 100644 index 7483504..0000000 --- a/include/asm-sparc/dma-mapping.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_DMA_MAPPING_H -#define ___ASM_SPARC_DMA_MAPPING_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/dma-mapping_32.h b/include/asm-sparc/dma-mapping_32.h deleted file mode 100644 index f3a641e..0000000 --- a/include/asm-sparc/dma-mapping_32.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_SPARC_DMA_MAPPING_H -#define _ASM_SPARC_DMA_MAPPING_H - - -#ifdef CONFIG_PCI -#include -#else -#include -#endif /* PCI */ - -#endif /* _ASM_SPARC_DMA_MAPPING_H */ diff --git a/include/asm-sparc/dma-mapping_64.h b/include/asm-sparc/dma-mapping_64.h deleted file mode 100644 index bfa64f9..0000000 --- a/include/asm-sparc/dma-mapping_64.h +++ /dev/null @@ -1,154 +0,0 @@ -#ifndef _ASM_SPARC64_DMA_MAPPING_H -#define _ASM_SPARC64_DMA_MAPPING_H - -#include -#include - -#define DMA_ERROR_CODE (~(dma_addr_t)0x0) - -struct dma_ops { - void *(*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); - void (*free_coherent)(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle); - dma_addr_t (*map_single)(struct device *dev, void *cpu_addr, - size_t size, - enum dma_data_direction direction); - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction); - int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction); - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, - int nhwentries, - enum dma_data_direction direction); - void (*sync_single_for_cpu)(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction); - void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, - int nelems, - enum dma_data_direction direction); -}; -extern const struct dma_ops *dma_ops; - -extern int dma_supported(struct device *dev, u64 mask); -extern int dma_set_mask(struct device *dev, u64 dma_mask); - -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) -{ - return dma_ops->alloc_coherent(dev, size, dma_handle, flag); -} - -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) -{ - dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); -} - -static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, - enum dma_data_direction direction) -{ - return dma_ops->map_single(dev, cpu_addr, size, direction); -} - -static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction) -{ - dma_ops->unmap_single(dev, dma_addr, size, direction); -} - -static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - return dma_ops->map_single(dev, page_address(page) + offset, - size, direction); -} - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, - enum dma_data_direction direction) -{ - dma_ops->unmap_single(dev, dma_address, size, direction); -} - -static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - return dma_ops->map_sg(dev, sg, nents, direction); -} - -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - dma_ops->unmap_sg(dev, sg, nents, direction); -} - -static inline void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction); -} - -static inline void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, - size_t size, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void dma_sync_single_range_for_cpu(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); -} - -static inline void dma_sync_single_range_for_device(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - - -static inline void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction); -} - -static inline void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ - return (dma_addr == DMA_ERROR_CODE); -} - -static inline int dma_get_cache_alignment(void) -{ - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -} - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d, h) (1) - -#endif /* _ASM_SPARC64_DMA_MAPPING_H */ diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h deleted file mode 100644 index 8cc69bf..0000000 --- a/include/asm-sparc/dma.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_DMA_H -#define ___ASM_SPARC_DMA_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/dma_32.h b/include/asm-sparc/dma_32.h deleted file mode 100644 index 959d6c8..0000000 --- a/include/asm-sparc/dma_32.h +++ /dev/null @@ -1,288 +0,0 @@ -/* include/asm-sparc/dma.h - * - * Copyright 1995 (C) David S. Miller (davem@davemloft.net) - */ - -#ifndef _ASM_SPARC_DMA_H -#define _ASM_SPARC_DMA_H - -#include -#include - -#include /* for invalidate's, etc. */ -#include -#include -#include -#include -#include -#include - -struct page; -extern spinlock_t dma_spin_lock; - -static inline unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static inline void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* These are irrelevant for Sparc DMA, but we leave it in so that - * things can compile. - */ -#define MAX_DMA_CHANNELS 8 -#define MAX_DMA_ADDRESS (~0UL) -#define DMA_MODE_READ 1 -#define DMA_MODE_WRITE 2 - -/* Useful constants */ -#define SIZE_16MB (16*1024*1024) -#define SIZE_64K (64*1024) - -/* SBUS DMA controller reg offsets */ -#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ -#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ -#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ -#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ - -/* DVMA chip revisions */ -enum dvma_rev { - dvmarev0, - dvmaesc1, - dvmarev1, - dvmarev2, - dvmarev3, - dvmarevplus, - dvmahme -}; - -#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) - -/* Linux DMA information structure, filled during probe. */ -struct sbus_dma { - struct sbus_dma *next; - struct sbus_dev *sdev; - void __iomem *regs; - - /* Status, misc info */ - int node; /* Prom node for this DMA device */ - int running; /* Are we doing DMA now? */ - int allocated; /* Are we "owned" by anyone yet? */ - - /* Transfer information. */ - unsigned long addr; /* Start address of current transfer */ - int nbytes; /* Size of current transfer */ - int realbytes; /* For splitting up large transfers, etc. */ - - /* DMA revision */ - enum dvma_rev revision; -}; - -extern struct sbus_dma *dma_chain; - -/* Broken hardware... */ -#ifdef CONFIG_SUN4 -/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? - * Or is rev0 present only on sun4 boxes? -jj */ -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) -#else -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) -#endif -#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) - -/* Main routines in dma.c */ -extern void dvma_init(struct sbus_bus *); - -/* Fields in the cond_reg register */ -/* First, the version identification bits */ -#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ -#define DMA_VERS0 0x00000000 /* Sunray DMA version */ -#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ -#define DMA_VERS1 0x80000000 /* DMA rev 1 */ -#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ -#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ -#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ - -#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ -#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ -#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ -#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ -#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ -#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ -#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ -#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ -#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ -#define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ -#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ -#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ -#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ -#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ -#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ -#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ -#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ -#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ -#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ -#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ -#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ -#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ -#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ -#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ -#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ -#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ -#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ -#define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ -#define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ -#define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ -#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ -#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ -#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ -#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ -#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ -#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ -#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ -#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ -#define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ -#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ -#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ -#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ -#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ - -/* Values describing the burst-size property from the PROM */ -#define DMA_BURST1 0x01 -#define DMA_BURST2 0x02 -#define DMA_BURST4 0x04 -#define DMA_BURST8 0x08 -#define DMA_BURST16 0x10 -#define DMA_BURST32 0x20 -#define DMA_BURST64 0x40 -#define DMA_BURSTBITS 0x7f - -/* Determine highest possible final transfer address given a base */ -#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) - -/* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) -#define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) -#define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) -#define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) -#define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) -#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) -#define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) -#define DMA_BEGINDMA_W(regs) \ - ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) -#define DMA_BEGINDMA_R(regs) \ - ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) - -/* For certain DMA chips, we need to disable ints upon irq entry - * and turn them back on when we are done. So in any ESP interrupt - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT - * when leaving the handler. You have been warned... - */ -#define DMA_IRQ_ENTRY(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ - } while (0) - -#define DMA_IRQ_EXIT(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ - } while(0) - -#if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ -/* Pause until counter runs out or BIT isn't set in the DMA condition - * register. - */ -static inline void sparc_dma_pause(struct sparc_dma_registers *regs, - unsigned long bit) -{ - int ctr = 50000; /* Let's find some bugs ;) */ - - /* Busy wait until the bit is not set any more */ - while((regs->cond_reg&bit) && (ctr>0)) { - ctr--; - __delay(5); - } - - /* Check for bogus outcome. */ - if(!ctr) - panic("DMA timeout"); -} - -/* Reset the friggin' thing... */ -#define DMA_RESET(dma) do { \ - struct sparc_dma_registers *regs = dma->regs; \ - /* Let the current FIFO drain itself */ \ - sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ - /* Reset the logic */ \ - regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ - __delay(400); /* let the bits set ;) */ \ - regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ - sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ - /* Enable FAST transfers if available */ \ - if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ - dma->running = 0; \ -} while(0) -#endif - -#define for_each_dvma(dma) \ - for((dma) = dma_chain; (dma); (dma) = (dma)->next) - -extern int get_dma_list(char *); -extern int request_dma(unsigned int, __const__ char *); -extern void free_dma(unsigned int); - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -/* Routines for data transfer buffers. */ -BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) -BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) - -#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) -#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) - -/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ -BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) - -#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) -#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) -#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) -#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) - -/* - * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. - * - * The mmu_map_dma_area establishes two mappings in one go. - * These mappings point to pages normally mapped at 'va' (linear address). - * First mapping is for CPU visible address at 'a', uncached. - * This is an alias, but it works because it is an uncached mapping. - * Second mapping is for device visible address, or "bus" address. - * The bus address is returned at '*pba'. - * - * These functions seem distinct, but are hard to split. On sun4c, - * at least for now, 'a' is equal to bus address, and retured in *pba. - * On sun4m, page attributes depend on the CPU type, so we have to - * know if we are mapping RAM or I/O, so it has to be an additional argument - * to a separate mapping function for CPU visible mappings. - */ -BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) -BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) -BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) - -#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) -#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) -#define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) - -#endif /* !(_ASM_SPARC_DMA_H) */ diff --git a/include/asm-sparc/dma_64.h b/include/asm-sparc/dma_64.h deleted file mode 100644 index 9d4c024..0000000 --- a/include/asm-sparc/dma_64.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * include/asm-sparc64/dma.h - * - * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _ASM_SPARC64_DMA_H -#define _ASM_SPARC64_DMA_H - -#include -#include -#include - -#include -#include -#include - -/* These are irrelevant for Sparc DMA, but we leave it in so that - * things can compile. - */ -#define MAX_DMA_CHANNELS 8 -#define DMA_MODE_READ 1 -#define DMA_MODE_WRITE 2 -#define MAX_DMA_ADDRESS (~0UL) - -/* Useful constants */ -#define SIZE_16MB (16*1024*1024) -#define SIZE_64K (64*1024) - -/* SBUS DMA controller reg offsets */ -#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ -#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ -#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ -#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ - -/* DVMA chip revisions */ -enum dvma_rev { - dvmarev0, - dvmaesc1, - dvmarev1, - dvmarev2, - dvmarev3, - dvmarevplus, - dvmahme -}; - -#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) - -/* Linux DMA information structure, filled during probe. */ -struct sbus_dma { - struct sbus_dma *next; - struct sbus_dev *sdev; - void __iomem *regs; - - /* Status, misc info */ - int node; /* Prom node for this DMA device */ - int running; /* Are we doing DMA now? */ - int allocated; /* Are we "owned" by anyone yet? */ - - /* Transfer information. */ - u32 addr; /* Start address of current transfer */ - int nbytes; /* Size of current transfer */ - int realbytes; /* For splitting up large transfers, etc. */ - - /* DMA revision */ - enum dvma_rev revision; -}; - -extern struct sbus_dma *dma_chain; - -/* Broken hardware... */ -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) -#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) - -/* Main routines in dma.c */ -extern void dvma_init(struct sbus_bus *); - -/* Fields in the cond_reg register */ -/* First, the version identification bits */ -#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ -#define DMA_VERS0 0x00000000 /* Sunray DMA version */ -#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ -#define DMA_VERS1 0x80000000 /* DMA rev 1 */ -#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ -#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ -#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ - -#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ -#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ -#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ -#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ -#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ -#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ -#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ -#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ -#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ -#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ -#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ -#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ -#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ -#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ -#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ -#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ -#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ -#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ -#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ -#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ -#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ -#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ -#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ -#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ -#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ -#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ -#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ -#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ -#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ -#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ -#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ -#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ -#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ -#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ -#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ -#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ -#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ -#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ -#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ -#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ -#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ - -/* Values describing the burst-size property from the PROM */ -#define DMA_BURST1 0x01 -#define DMA_BURST2 0x02 -#define DMA_BURST4 0x04 -#define DMA_BURST8 0x08 -#define DMA_BURST16 0x10 -#define DMA_BURST32 0x20 -#define DMA_BURST64 0x40 -#define DMA_BURSTBITS 0x7f - -/* Determine highest possible final transfer address given a base */ -#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) - -/* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) -#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) -#define DMA_OFF(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp &= ~DMA_ENABLE; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_INTSOFF(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp &= ~DMA_INT_ENAB; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_INTSON(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= DMA_INT_ENAB; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_PUNTFIFO(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= DMA_FIFO_INV; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_SETSTART(__regs, __addr) \ - sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); -#define DMA_BEGINDMA_W(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_BEGINDMA_R(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ - tmp &= ~DMA_ST_WRITE; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) - -/* For certain DMA chips, we need to disable ints upon irq entry - * and turn them back on when we are done. So in any ESP interrupt - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT - * when leaving the handler. You have been warned... - */ -#define DMA_IRQ_ENTRY(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ - } while (0) - -#define DMA_IRQ_EXIT(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ - } while(0) - -#define for_each_dvma(dma) \ - for((dma) = dma_chain; (dma); (dma) = (dma)->next) - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* !(_ASM_SPARC64_DMA_H) */ diff --git a/include/asm-sparc/ebus.h b/include/asm-sparc/ebus.h deleted file mode 100644 index a5da2d0..0000000 --- a/include/asm-sparc/ebus.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_EBUS_H -#define ___ASM_SPARC_EBUS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/ebus_32.h b/include/asm-sparc/ebus_32.h deleted file mode 100644 index 29cb7df..0000000 --- a/include/asm-sparc/ebus_32.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * ebus.h: PCI to Ebus pseudo driver software state. - * - * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) - * - * Adopted for sparc by V. Roganov and G. Raiko. - */ - -#ifndef __SPARC_EBUS_H -#define __SPARC_EBUS_H - -#ifndef _LINUX_IOPORT_H -#include -#endif -#include -#include -#include - -struct linux_ebus_child { - struct linux_ebus_child *next; - struct linux_ebus_device *parent; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; - -struct linux_ebus_device { - struct of_device ofdev; - struct linux_ebus_device *next; - struct linux_ebus_child *children; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; -#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) - -struct linux_ebus { - struct of_device ofdev; - struct linux_ebus *next; - struct linux_ebus_device *devices; - struct linux_pbm_info *parent; - struct pci_dev *self; - struct device_node *prom_node; -}; -#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) - -struct linux_ebus_dma { - unsigned int dcsr; - unsigned int dacr; - unsigned int dbcr; -}; - -#define EBUS_DCSR_INT_PEND 0x00000001 -#define EBUS_DCSR_ERR_PEND 0x00000002 -#define EBUS_DCSR_DRAIN 0x00000004 -#define EBUS_DCSR_INT_EN 0x00000010 -#define EBUS_DCSR_RESET 0x00000080 -#define EBUS_DCSR_WRITE 0x00000100 -#define EBUS_DCSR_EN_DMA 0x00000200 -#define EBUS_DCSR_CYC_PEND 0x00000400 -#define EBUS_DCSR_DIAG_RD_DONE 0x00000800 -#define EBUS_DCSR_DIAG_WR_DONE 0x00001000 -#define EBUS_DCSR_EN_CNT 0x00002000 -#define EBUS_DCSR_TC 0x00004000 -#define EBUS_DCSR_DIS_CSR_DRN 0x00010000 -#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000 -#define EBUS_DCSR_BURST_SZ_1 0x00080000 -#define EBUS_DCSR_BURST_SZ_4 0x00000000 -#define EBUS_DCSR_BURST_SZ_8 0x00040000 -#define EBUS_DCSR_BURST_SZ_16 0x000c0000 -#define EBUS_DCSR_DIAG_EN 0x00100000 -#define EBUS_DCSR_DIS_ERR_PEND 0x00400000 -#define EBUS_DCSR_TCI_DIS 0x00800000 -#define EBUS_DCSR_EN_NEXT 0x01000000 -#define EBUS_DCSR_DMA_ON 0x02000000 -#define EBUS_DCSR_A_LOADED 0x04000000 -#define EBUS_DCSR_NA_LOADED 0x08000000 -#define EBUS_DCSR_DEV_ID_MASK 0xf0000000 - -extern struct linux_ebus *ebus_chain; - -extern void ebus_init(void); - -#define for_each_ebus(bus) \ - for((bus) = ebus_chain; (bus); (bus) = (bus)->next) - -#define for_each_ebusdev(dev, bus) \ - for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) - -#define for_each_edevchild(dev, child) \ - for((child) = (dev)->children; (child); (child) = (child)->next) - -#endif /* !(__SPARC_EBUS_H) */ diff --git a/include/asm-sparc/ebus_64.h b/include/asm-sparc/ebus_64.h deleted file mode 100644 index fcc62b9..0000000 --- a/include/asm-sparc/ebus_64.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * ebus.h: PCI to Ebus pseudo driver software state. - * - * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) - * Copyright (C) 1999 David S. Miller (davem@redhat.com) - */ - -#ifndef __SPARC64_EBUS_H -#define __SPARC64_EBUS_H - -#include -#include -#include - -struct linux_ebus_child { - struct linux_ebus_child *next; - struct linux_ebus_device *parent; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; - -struct linux_ebus_device { - struct of_device ofdev; - struct linux_ebus_device *next; - struct linux_ebus_child *children; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; -#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) - -struct linux_ebus { - struct of_device ofdev; - struct linux_ebus *next; - struct linux_ebus_device *devices; - struct pci_dev *self; - int index; - int is_rio; - struct device_node *prom_node; -}; -#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) - -struct ebus_dma_info { - spinlock_t lock; - void __iomem *regs; - - unsigned int flags; -#define EBUS_DMA_FLAG_USE_EBDMA_HANDLER 0x00000001 -#define EBUS_DMA_FLAG_TCI_DISABLE 0x00000002 - - /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is - * set. - */ - void (*callback)(struct ebus_dma_info *p, int event, void *cookie); - void *client_cookie; - unsigned int irq; -#define EBUS_DMA_EVENT_ERROR 1 -#define EBUS_DMA_EVENT_DMA 2 -#define EBUS_DMA_EVENT_DEVICE 4 - - unsigned char name[64]; -}; - -extern int ebus_dma_register(struct ebus_dma_info *p); -extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on); -extern void ebus_dma_unregister(struct ebus_dma_info *p); -extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, - size_t len); -extern void ebus_dma_prepare(struct ebus_dma_info *p, int write); -extern unsigned int ebus_dma_residue(struct ebus_dma_info *p); -extern unsigned int ebus_dma_addr(struct ebus_dma_info *p); -extern void ebus_dma_enable(struct ebus_dma_info *p, int on); - -extern struct linux_ebus *ebus_chain; - -extern void ebus_init(void); - -#define for_each_ebus(bus) \ - for((bus) = ebus_chain; (bus); (bus) = (bus)->next) - -#define for_each_ebusdev(dev, bus) \ - for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) - -#define for_each_edevchild(dev, child) \ - for((child) = (dev)->children; (child); (child) = (child)->next) - -#endif /* !(__SPARC64_EBUS_H) */ diff --git a/include/asm-sparc/ecc.h b/include/asm-sparc/ecc.h deleted file mode 100644 index ccb84b6..0000000 --- a/include/asm-sparc/ecc.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * ecc.h: Definitions and defines for the external cache/memory - * controller on the sun4m. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_ECC_H -#define _SPARC_ECC_H - -/* These registers are accessed through the SRMMU passthrough ASI 0x20 */ -#define ECC_ENABLE 0x00000000 /* ECC enable register */ -#define ECC_FSTATUS 0x00000008 /* ECC fault status register */ -#define ECC_FADDR 0x00000010 /* ECC fault address register */ -#define ECC_DIGNOSTIC 0x00000018 /* ECC diagnostics register */ -#define ECC_MBAENAB 0x00000020 /* MBus arbiter enable register */ -#define ECC_DMESG 0x00001000 /* Diagnostic message passing area */ - -/* ECC MBus Arbiter Enable register: - * - * ---------------------------------------- - * | |SBUS|MOD3|MOD2|MOD1|RSV| - * ---------------------------------------- - * 31 5 4 3 2 1 0 - * - * SBUS: Enable MBus Arbiter on the SBus 0=off 1=on - * MOD3: Enable MBus Arbiter on MBus module 3 0=off 1=on - * MOD2: Enable MBus Arbiter on MBus module 2 0=off 1=on - * MOD1: Enable MBus Arbiter on MBus module 1 0=off 1=on - */ - -#define ECC_MBAE_SBUS 0x00000010 -#define ECC_MBAE_MOD3 0x00000008 -#define ECC_MBAE_MOD2 0x00000004 -#define ECC_MBAE_MOD1 0x00000002 - -/* ECC Fault Control Register layout: - * - * ----------------------------- - * | RESV | ECHECK | EINT | - * ----------------------------- - * 31 2 1 0 - * - * ECHECK: Enable ECC checking. 0=off 1=on - * EINT: Enable Interrupts for correctable errors. 0=off 1=on - */ -#define ECC_FCR_CHECK 0x00000002 -#define ECC_FCR_INTENAB 0x00000001 - -/* ECC Fault Address Register Zero layout: - * - * ----------------------------------------------------- - * | MID | S | RSV | VA | BM |AT| C| SZ |TYP| PADDR | - * ----------------------------------------------------- - * 31-28 27 26-22 21-14 13 12 11 10-8 7-4 3-0 - * - * MID: ModuleID of the faulting processor. ie. who did it? - * S: Supervisor/Privileged access? 0=no 1=yes - * VA: Bits 19-12 of the virtual faulting address, these are the - * superset bits in the virtual cache and can be used for - * a flush operation if necessary. - * BM: Boot mode? 0=no 1=yes This is just like the SRMMU boot - * mode bit. - * AT: Did this fault happen during an atomic instruction? 0=no - * 1=yes. This means either an 'ldstub' or 'swap' instruction - * was in progress (but not finished) when this fault happened. - * This indicated whether the bus was locked when the fault - * occurred. - * C: Did the pte for this access indicate that it was cacheable? - * 0=no 1=yes - * SZ: The size of the transaction. - * TYP: The transaction type. - * PADDR: Bits 35-32 of the physical address for the fault. - */ -#define ECC_FADDR0_MIDMASK 0xf0000000 -#define ECC_FADDR0_S 0x08000000 -#define ECC_FADDR0_VADDR 0x003fc000 -#define ECC_FADDR0_BMODE 0x00002000 -#define ECC_FADDR0_ATOMIC 0x00001000 -#define ECC_FADDR0_CACHE 0x00000800 -#define ECC_FADDR0_SIZE 0x00000700 -#define ECC_FADDR0_TYPE 0x000000f0 -#define ECC_FADDR0_PADDR 0x0000000f - -/* ECC Fault Address Register One layout: - * - * ------------------------------------- - * | Physical Address 31-0 | - * ------------------------------------- - * 31 0 - * - * You get the upper 4 bits of the physical address from the - * PADDR field in ECC Fault Address Zero register. - */ - -/* ECC Fault Status Register layout: - * - * ---------------------------------------------- - * | RESV|C2E|MULT|SYNDROME|DWORD|UNC|TIMEO|BS|C| - * ---------------------------------------------- - * 31-18 17 16 15-8 7-4 3 2 1 0 - * - * C2E: A C2 graphics error occurred. 0=no 1=yes (SS10 only) - * MULT: Multiple errors occurred ;-O 0=no 1=prom_panic(yes) - * SYNDROME: Controller is mentally unstable. - * DWORD: - * UNC: Uncorrectable error. 0=no 1=yes - * TIMEO: Timeout occurred. 0=no 1=yes - * BS: C2 graphics bad slot access. 0=no 1=yes (SS10 only) - * C: Correctable error? 0=no 1=yes - */ - -#define ECC_FSR_C2ERR 0x00020000 -#define ECC_FSR_MULT 0x00010000 -#define ECC_FSR_SYND 0x0000ff00 -#define ECC_FSR_DWORD 0x000000f0 -#define ECC_FSR_UNC 0x00000008 -#define ECC_FSR_TIMEO 0x00000004 -#define ECC_FSR_BADSLOT 0x00000002 -#define ECC_FSR_C 0x00000001 - -#endif /* !(_SPARC_ECC_H) */ diff --git a/include/asm-sparc/eeprom.h b/include/asm-sparc/eeprom.h deleted file mode 100644 index e17beec..0000000 --- a/include/asm-sparc/eeprom.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * eeprom.h: Definitions for the Sun eeprom. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -/* The EEPROM and the Mostek Mk48t02 use the same IO address space - * for their registers/data areas. The IDPROM lives here too. - */ diff --git a/include/asm-sparc/elf.h b/include/asm-sparc/elf.h deleted file mode 100644 index f035c45..0000000 --- a/include/asm-sparc/elf.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_ELF_H -#define ___ASM_SPARC_ELF_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/elf_32.h b/include/asm-sparc/elf_32.h deleted file mode 100644 index d043f80..0000000 --- a/include/asm-sparc/elf_32.h +++ /dev/null @@ -1,145 +0,0 @@ -#ifndef __ASMSPARC_ELF_H -#define __ASMSPARC_ELF_H - -/* - * ELF register definitions.. - */ - -#include - -/* - * Sparc section types - */ -#define STT_REGISTER 13 - -/* - * Sparc ELF relocation types - */ -#define R_SPARC_NONE 0 -#define R_SPARC_8 1 -#define R_SPARC_16 2 -#define R_SPARC_32 3 -#define R_SPARC_DISP8 4 -#define R_SPARC_DISP16 5 -#define R_SPARC_DISP32 6 -#define R_SPARC_WDISP30 7 -#define R_SPARC_WDISP22 8 -#define R_SPARC_HI22 9 -#define R_SPARC_22 10 -#define R_SPARC_13 11 -#define R_SPARC_LO10 12 -#define R_SPARC_GOT10 13 -#define R_SPARC_GOT13 14 -#define R_SPARC_GOT22 15 -#define R_SPARC_PC10 16 -#define R_SPARC_PC22 17 -#define R_SPARC_WPLT30 18 -#define R_SPARC_COPY 19 -#define R_SPARC_GLOB_DAT 20 -#define R_SPARC_JMP_SLOT 21 -#define R_SPARC_RELATIVE 22 -#define R_SPARC_UA32 23 -#define R_SPARC_PLT32 24 -#define R_SPARC_HIPLT22 25 -#define R_SPARC_LOPLT10 26 -#define R_SPARC_PCPLT32 27 -#define R_SPARC_PCPLT22 28 -#define R_SPARC_PCPLT10 29 -#define R_SPARC_10 30 -#define R_SPARC_11 31 -#define R_SPARC_64 32 -#define R_SPARC_OLO10 33 -#define R_SPARC_WDISP16 40 -#define R_SPARC_WDISP19 41 -#define R_SPARC_7 43 -#define R_SPARC_5 44 -#define R_SPARC_6 45 - -/* Bits present in AT_HWCAP, primarily for Sparc32. */ - -#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ -#define HWCAP_SPARC_STBAR 2 -#define HWCAP_SPARC_SWAP 4 -#define HWCAP_SPARC_MULDIV 8 -#define HWCAP_SPARC_V9 16 -#define HWCAP_SPARC_ULTRA3 32 - -#define CORE_DUMP_USE_REGSET - -/* Format is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * PSR, PC, nPC, Y, WIM, TBR - */ -typedef unsigned long elf_greg_t; -#define ELF_NGREG 38 -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct { - union { - unsigned long pr_regs[32]; - double pr_dregs[16]; - } pr_fr; - unsigned long __unused; - unsigned long pr_fsr; - unsigned char pr_qcnt; - unsigned char pr_q_entrysize; - unsigned char pr_en; - unsigned int pr_q[64]; -} elf_fpregset_t; - -#include - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_SPARC) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_ARCH EM_SPARC -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB - -#define USE_ELF_CORE_DUMP -#ifndef CONFIG_SUN4 -#define ELF_EXEC_PAGESIZE 4096 -#else -#define ELF_EXEC_PAGESIZE 8192 -#endif - - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. This can NOT be done in userspace - on Sparc. */ - -/* Sun4c has none of the capabilities, most sun4m's have them all. - * XXX This is gross, set some global variable at boot time. -DaveM - */ -#define ELF_HWCAP ((ARCH_SUN4C_SUN4) ? 0 : \ - (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ - HWCAP_SPARC_SWAP | \ - ((srmmu_modtype != Cypress && \ - srmmu_modtype != Cypress_vE && \ - srmmu_modtype != Cypress_vD) ? \ - HWCAP_SPARC_MULDIV : 0))) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) - -#endif /* !(__ASMSPARC_ELF_H) */ diff --git a/include/asm-sparc/elf_64.h b/include/asm-sparc/elf_64.h deleted file mode 100644 index 0818a13..0000000 --- a/include/asm-sparc/elf_64.h +++ /dev/null @@ -1,217 +0,0 @@ -#ifndef __ASM_SPARC64_ELF_H -#define __ASM_SPARC64_ELF_H - -/* - * ELF register definitions.. - */ - -#include -#include -#include -#include - -/* - * Sparc section types - */ -#define STT_REGISTER 13 - -/* - * Sparc ELF relocation types - */ -#define R_SPARC_NONE 0 -#define R_SPARC_8 1 -#define R_SPARC_16 2 -#define R_SPARC_32 3 -#define R_SPARC_DISP8 4 -#define R_SPARC_DISP16 5 -#define R_SPARC_DISP32 6 -#define R_SPARC_WDISP30 7 -#define R_SPARC_WDISP22 8 -#define R_SPARC_HI22 9 -#define R_SPARC_22 10 -#define R_SPARC_13 11 -#define R_SPARC_LO10 12 -#define R_SPARC_GOT10 13 -#define R_SPARC_GOT13 14 -#define R_SPARC_GOT22 15 -#define R_SPARC_PC10 16 -#define R_SPARC_PC22 17 -#define R_SPARC_WPLT30 18 -#define R_SPARC_COPY 19 -#define R_SPARC_GLOB_DAT 20 -#define R_SPARC_JMP_SLOT 21 -#define R_SPARC_RELATIVE 22 -#define R_SPARC_UA32 23 -#define R_SPARC_PLT32 24 -#define R_SPARC_HIPLT22 25 -#define R_SPARC_LOPLT10 26 -#define R_SPARC_PCPLT32 27 -#define R_SPARC_PCPLT22 28 -#define R_SPARC_PCPLT10 29 -#define R_SPARC_10 30 -#define R_SPARC_11 31 -#define R_SPARC_64 32 -#define R_SPARC_OLO10 33 -#define R_SPARC_WDISP16 40 -#define R_SPARC_WDISP19 41 -#define R_SPARC_7 43 -#define R_SPARC_5 44 -#define R_SPARC_6 45 - -/* Bits present in AT_HWCAP, primarily for Sparc32. */ - -#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ -#define HWCAP_SPARC_STBAR 2 -#define HWCAP_SPARC_SWAP 4 -#define HWCAP_SPARC_MULDIV 8 -#define HWCAP_SPARC_V9 16 -#define HWCAP_SPARC_ULTRA3 32 -#define HWCAP_SPARC_BLKINIT 64 -#define HWCAP_SPARC_N2 128 - -#define CORE_DUMP_USE_REGSET - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_ARCH EM_SPARCV9 -#define ELF_CLASS ELFCLASS64 -#define ELF_DATA ELFDATA2MSB - -/* Format of 64-bit elf_gregset_t is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * TSTATE - * TPC - * TNPC - * Y - */ -typedef unsigned long elf_greg_t; -#define ELF_NGREG 36 -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct { - unsigned long pr_regs[32]; - unsigned long pr_fsr; - unsigned long pr_gsr; - unsigned long pr_fprs; -} elf_fpregset_t; - -/* Format of 32-bit elf_gregset_t is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * PSR, PC, nPC, Y, WIM, TBR - */ -typedef unsigned int compat_elf_greg_t; -#define COMPAT_ELF_NGREG 38 -typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; - -typedef struct { - union { - unsigned int pr_regs[32]; - unsigned long pr_dregs[16]; - } pr_fr; - unsigned int __unused; - unsigned int pr_fsr; - unsigned char pr_qcnt; - unsigned char pr_q_entrysize; - unsigned char pr_en; - unsigned int pr_q[64]; -} compat_elf_fpregset_t; - -/* UltraSparc extensions. Still unused, but will be eventually. */ -typedef struct { - unsigned int pr_type; - unsigned int pr_align; - union { - struct { - union { - unsigned int pr_regs[32]; - unsigned long pr_dregs[16]; - long double pr_qregs[8]; - } pr_xfr; - } pr_v8p; - unsigned int pr_xfsr; - unsigned int pr_fprs; - unsigned int pr_xg[8]; - unsigned int pr_xo[8]; - unsigned long pr_tstate; - unsigned int pr_filler[8]; - } pr_un; -} elf_xregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) -#define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \ - (x)->e_machine == EM_SPARC32PLUS) -#define compat_start_thread start_thread32 - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE PAGE_SIZE - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE 0x0000010000000000UL -#define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL - - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ - -/* On Ultra, we support all of the v8 capabilities. */ -static inline unsigned int sparc64_elf_hwcap(void) -{ - unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | - HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | - HWCAP_SPARC_V9); - - if (tlb_type == cheetah || tlb_type == cheetah_plus) - cap |= HWCAP_SPARC_ULTRA3; - else if (tlb_type == hypervisor) { - if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || - sun4v_chip_type == SUN4V_CHIP_NIAGARA2) - cap |= HWCAP_SPARC_BLKINIT; - if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2) - cap |= HWCAP_SPARC_N2; - } - - return cap; -} - -#define ELF_HWCAP sparc64_elf_hwcap(); - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) \ -do { unsigned long new_flags = current_thread_info()->flags; \ - new_flags &= _TIF_32BIT; \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - new_flags |= _TIF_32BIT; \ - else \ - new_flags &= ~_TIF_32BIT; \ - if ((current_thread_info()->flags & _TIF_32BIT) \ - != new_flags) \ - set_thread_flag(TIF_ABI_PENDING); \ - else \ - clear_thread_flag(TIF_ABI_PENDING); \ - /* flush_thread will update pgd cache */ \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ - set_personality(PER_LINUX); \ -} while (0) - -#endif /* !(__ASM_SPARC64_ELF_H) */ diff --git a/include/asm-sparc/emergency-restart.h b/include/asm-sparc/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-sparc/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sparc/envctrl.h b/include/asm-sparc/envctrl.h deleted file mode 100644 index 624fa7e..0000000 --- a/include/asm-sparc/envctrl.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * - * envctrl.h: Definitions for access to the i2c environment - * monitoring on Ultrasparc systems. - * - * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) - * Copyright (C) 2000 Vinh Truong (vinh.truong@eng.sun.com) - * VT - Add all ioctl commands and environment status definitions - * VT - Add application note - */ -#ifndef _SPARC64_ENVCTRL_H -#define _SPARC64_ENVCTRL_H 1 - -#include - -/* Application note: - * - * The driver supports 4 operations: open(), close(), ioctl(), read() - * The device name is /dev/envctrl. - * Below is sample usage: - * - * fd = open("/dev/envtrl", O_RDONLY); - * if (ioctl(fd, ENVCTRL_READ_SHUTDOWN_TEMPERATURE, 0) < 0) - * printf("error\n"); - * ret = read(fd, buf, 10); - * close(fd); - * - * Notice in the case of cpu voltage and temperature, the default is - * cpu0. If we need to know the info of cpu1, cpu2, cpu3, we need to - * pass in cpu number in ioctl() last parameter. For example, to - * get the voltage of cpu2: - * - * ioctlbuf[0] = 2; - * if (ioctl(fd, ENVCTRL_READ_CPU_VOLTAGE, ioctlbuf) < 0) - * printf("error\n"); - * ret = read(fd, buf, 10); - * - * All the return values are in ascii. So check read return value - * and do appropriate conversions in your application. - */ - -/* IOCTL commands */ - -/* Note: these commands reflect possible monitor features. - * Some boards choose to support some of the features only. - */ -#define ENVCTRL_RD_CPU_TEMPERATURE _IOR('p', 0x40, int) -#define ENVCTRL_RD_CPU_VOLTAGE _IOR('p', 0x41, int) -#define ENVCTRL_RD_FAN_STATUS _IOR('p', 0x42, int) -#define ENVCTRL_RD_WARNING_TEMPERATURE _IOR('p', 0x43, int) -#define ENVCTRL_RD_SHUTDOWN_TEMPERATURE _IOR('p', 0x44, int) -#define ENVCTRL_RD_VOLTAGE_STATUS _IOR('p', 0x45, int) -#define ENVCTRL_RD_SCSI_TEMPERATURE _IOR('p', 0x46, int) -#define ENVCTRL_RD_ETHERNET_TEMPERATURE _IOR('p', 0x47, int) -#define ENVCTRL_RD_MTHRBD_TEMPERATURE _IOR('p', 0x48, int) - -#define ENVCTRL_RD_GLOBALADDRESS _IOR('p', 0x49, int) - -/* Read return values for a voltage status request. */ -#define ENVCTRL_VOLTAGE_POWERSUPPLY_GOOD 0x01 -#define ENVCTRL_VOLTAGE_BAD 0x02 -#define ENVCTRL_POWERSUPPLY_BAD 0x03 -#define ENVCTRL_VOLTAGE_POWERSUPPLY_BAD 0x04 - -/* Read return values for a fan status request. - * A failure match means either the fan fails or - * the fan is not connected. Some boards have optional - * connectors to connect extra fans. - * - * There are maximum 8 monitor fans. Some are cpu fans - * some are system fans. The mask below only indicates - * fan by order number. - * Below is a sample application: - * - * if (ioctl(fd, ENVCTRL_READ_FAN_STATUS, 0) < 0) { - * printf("ioctl fan failed\n"); - * } - * if (read(fd, rslt, 1) <= 0) { - * printf("error or fan not monitored\n"); - * } else { - * if (rslt[0] == ENVCTRL_ALL_FANS_GOOD) { - * printf("all fans good\n"); - * } else if (rslt[0] == ENVCTRL_ALL_FANS_BAD) { - * printf("all fans bad\n"); - * } else { - * if (rslt[0] & ENVCTRL_FAN0_FAILURE_MASK) { - * printf("fan 0 failed or not connected\n"); - * } - * ...... - */ - -#define ENVCTRL_ALL_FANS_GOOD 0x00 -#define ENVCTRL_FAN0_FAILURE_MASK 0x01 -#define ENVCTRL_FAN1_FAILURE_MASK 0x02 -#define ENVCTRL_FAN2_FAILURE_MASK 0x04 -#define ENVCTRL_FAN3_FAILURE_MASK 0x08 -#define ENVCTRL_FAN4_FAILURE_MASK 0x10 -#define ENVCTRL_FAN5_FAILURE_MASK 0x20 -#define ENVCTRL_FAN6_FAILURE_MASK 0x40 -#define ENVCTRL_FAN7_FAILURE_MASK 0x80 -#define ENVCTRL_ALL_FANS_BAD 0xFF - -#endif /* !(_SPARC64_ENVCTRL_H) */ diff --git a/include/asm-sparc/errno.h b/include/asm-sparc/errno.h deleted file mode 100644 index a9ef172..0000000 --- a/include/asm-sparc/errno.h +++ /dev/null @@ -1,113 +0,0 @@ -#ifndef _SPARC_ERRNO_H -#define _SPARC_ERRNO_H - -/* These match the SunOS error numbering scheme. */ - -#include - -#define EWOULDBLOCK EAGAIN /* Operation would block */ -#define EINPROGRESS 36 /* Operation now in progress */ -#define EALREADY 37 /* Operation already in progress */ -#define ENOTSOCK 38 /* Socket operation on non-socket */ -#define EDESTADDRREQ 39 /* Destination address required */ -#define EMSGSIZE 40 /* Message too long */ -#define EPROTOTYPE 41 /* Protocol wrong type for socket */ -#define ENOPROTOOPT 42 /* Protocol not available */ -#define EPROTONOSUPPORT 43 /* Protocol not supported */ -#define ESOCKTNOSUPPORT 44 /* Socket type not supported */ -#define EOPNOTSUPP 45 /* Op not supported on transport endpoint */ -#define EPFNOSUPPORT 46 /* Protocol family not supported */ -#define EAFNOSUPPORT 47 /* Address family not supported by protocol */ -#define EADDRINUSE 48 /* Address already in use */ -#define EADDRNOTAVAIL 49 /* Cannot assign requested address */ -#define ENETDOWN 50 /* Network is down */ -#define ENETUNREACH 51 /* Network is unreachable */ -#define ENETRESET 52 /* Net dropped connection because of reset */ -#define ECONNABORTED 53 /* Software caused connection abort */ -#define ECONNRESET 54 /* Connection reset by peer */ -#define ENOBUFS 55 /* No buffer space available */ -#define EISCONN 56 /* Transport endpoint is already connected */ -#define ENOTCONN 57 /* Transport endpoint is not connected */ -#define ESHUTDOWN 58 /* No send after transport endpoint shutdown */ -#define ETOOMANYREFS 59 /* Too many references: cannot splice */ -#define ETIMEDOUT 60 /* Connection timed out */ -#define ECONNREFUSED 61 /* Connection refused */ -#define ELOOP 62 /* Too many symbolic links encountered */ -#define ENAMETOOLONG 63 /* File name too long */ -#define EHOSTDOWN 64 /* Host is down */ -#define EHOSTUNREACH 65 /* No route to host */ -#define ENOTEMPTY 66 /* Directory not empty */ -#define EPROCLIM 67 /* SUNOS: Too many processes */ -#define EUSERS 68 /* Too many users */ -#define EDQUOT 69 /* Quota exceeded */ -#define ESTALE 70 /* Stale NFS file handle */ -#define EREMOTE 71 /* Object is remote */ -#define ENOSTR 72 /* Device not a stream */ -#define ETIME 73 /* Timer expired */ -#define ENOSR 74 /* Out of streams resources */ -#define ENOMSG 75 /* No message of desired type */ -#define EBADMSG 76 /* Not a data message */ -#define EIDRM 77 /* Identifier removed */ -#define EDEADLK 78 /* Resource deadlock would occur */ -#define ENOLCK 79 /* No record locks available */ -#define ENONET 80 /* Machine is not on the network */ -#define ERREMOTE 81 /* SunOS: Too many lvls of remote in path */ -#define ENOLINK 82 /* Link has been severed */ -#define EADV 83 /* Advertise error */ -#define ESRMNT 84 /* Srmount error */ -#define ECOMM 85 /* Communication error on send */ -#define EPROTO 86 /* Protocol error */ -#define EMULTIHOP 87 /* Multihop attempted */ -#define EDOTDOT 88 /* RFS specific error */ -#define EREMCHG 89 /* Remote address changed */ -#define ENOSYS 90 /* Function not implemented */ - -/* The rest have no SunOS equivalent. */ -#define ESTRPIPE 91 /* Streams pipe error */ -#define EOVERFLOW 92 /* Value too large for defined data type */ -#define EBADFD 93 /* File descriptor in bad state */ -#define ECHRNG 94 /* Channel number out of range */ -#define EL2NSYNC 95 /* Level 2 not synchronized */ -#define EL3HLT 96 /* Level 3 halted */ -#define EL3RST 97 /* Level 3 reset */ -#define ELNRNG 98 /* Link number out of range */ -#define EUNATCH 99 /* Protocol driver not attached */ -#define ENOCSI 100 /* No CSI structure available */ -#define EL2HLT 101 /* Level 2 halted */ -#define EBADE 102 /* Invalid exchange */ -#define EBADR 103 /* Invalid request descriptor */ -#define EXFULL 104 /* Exchange full */ -#define ENOANO 105 /* No anode */ -#define EBADRQC 106 /* Invalid request code */ -#define EBADSLT 107 /* Invalid slot */ -#define EDEADLOCK 108 /* File locking deadlock error */ -#define EBFONT 109 /* Bad font file format */ -#define ELIBEXEC 110 /* Cannot exec a shared library directly */ -#define ENODATA 111 /* No data available */ -#define ELIBBAD 112 /* Accessing a corrupted shared library */ -#define ENOPKG 113 /* Package not installed */ -#define ELIBACC 114 /* Can not access a needed shared library */ -#define ENOTUNIQ 115 /* Name not unique on network */ -#define ERESTART 116 /* Interrupted syscall should be restarted */ -#define EUCLEAN 117 /* Structure needs cleaning */ -#define ENOTNAM 118 /* Not a XENIX named type file */ -#define ENAVAIL 119 /* No XENIX semaphores available */ -#define EISNAM 120 /* Is a named type file */ -#define EREMOTEIO 121 /* Remote I/O error */ -#define EILSEQ 122 /* Illegal byte sequence */ -#define ELIBMAX 123 /* Atmpt to link in too many shared libs */ -#define ELIBSCN 124 /* .lib section in a.out corrupted */ - -#define ENOMEDIUM 125 /* No medium found */ -#define EMEDIUMTYPE 126 /* Wrong medium type */ -#define ECANCELED 127 /* Operation Cancelled */ -#define ENOKEY 128 /* Required key not available */ -#define EKEYEXPIRED 129 /* Key has expired */ -#define EKEYREVOKED 130 /* Key has been revoked */ -#define EKEYREJECTED 131 /* Key was rejected by service */ - -/* for robust mutexes */ -#define EOWNERDEAD 132 /* Owner died */ -#define ENOTRECOVERABLE 133 /* State not recoverable */ - -#endif diff --git a/include/asm-sparc/estate.h b/include/asm-sparc/estate.h deleted file mode 100644 index 520c085..0000000 --- a/include/asm-sparc/estate.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef _SPARC64_ESTATE_H -#define _SPARC64_ESTATE_H - -/* UltraSPARC-III E-cache Error Enable */ -#define ESTATE_ERROR_FMT 0x0000000000040000 /* Force MTAG ECC */ -#define ESTATE_ERROR_FMESS 0x000000000003c000 /* Forced MTAG ECC val */ -#define ESTATE_ERROR_FMD 0x0000000000002000 /* Force DATA ECC */ -#define ESTATE_ERROR_FDECC 0x0000000000001ff0 /* Forced DATA ECC val */ -#define ESTATE_ERROR_UCEEN 0x0000000000000008 /* See below */ -#define ESTATE_ERROR_NCEEN 0x0000000000000002 /* See below */ -#define ESTATE_ERROR_CEEN 0x0000000000000001 /* See below */ - -/* UCEEN enables the fast_ECC_error trap for: 1) software correctable E-cache - * errors 2) uncorrectable E-cache errors. Such events only occur on reads - * of the E-cache by the local processor for: 1) data loads 2) instruction - * fetches 3) atomic operations. Such events _cannot_ occur for: 1) merge - * 2) writeback 2) copyout. The AFSR bits associated with these traps are - * UCC and UCU. - */ - -/* NCEEN enables instruction_access_error, data_access_error, and ECC_error traps - * for uncorrectable ECC errors and system errors. - * - * Uncorrectable system bus data error or MTAG ECC error, system bus TimeOUT, - * or system bus BusERR: - * 1) As the result of an instruction fetch, will generate instruction_access_error - * 2) As the result of a load etc. will generate data_access_error. - * 3) As the result of store merge completion, writeback, or copyout will - * generate a disrupting ECC_error trap. - * 4) As the result of such errors on instruction vector fetch can generate any - * of the 3 trap types. - * - * The AFSR bits associated with these traps are EMU, EDU, WDU, CPU, IVU, UE, - * BERR, and TO. - */ - -/* CEEN enables the ECC_error trap for hardware corrected ECC errors. System bus - * reads resulting in a hardware corrected data or MTAG ECC error will generate an - * ECC_error disrupting trap with this bit enabled. - * - * This same trap will also be generated when a hardware corrected ECC error results - * during store merge, writeback, and copyout operations. - */ - -/* In general, if the trap enable bits above are disabled the AFSR bits will still - * log the events even though the trap will not be generated by the processor. - */ - -#endif /* _SPARC64_ESTATE_H */ diff --git a/include/asm-sparc/fb.h b/include/asm-sparc/fb.h deleted file mode 100644 index b83e447..0000000 --- a/include/asm-sparc/fb.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _SPARC_FB_H_ -#define _SPARC_FB_H_ -#include -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ -#ifdef CONFIG_SPARC64 - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); -#endif -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - struct device *dev = info->device; - struct device_node *node; - - node = dev->archdata.prom_node; - if (node && - node == of_console_device) - return 1; - - return 0; -} - -#endif /* _SPARC_FB_H_ */ diff --git a/include/asm-sparc/fbio.h b/include/asm-sparc/fbio.h deleted file mode 100644 index b9215a0..0000000 --- a/include/asm-sparc/fbio.h +++ /dev/null @@ -1,330 +0,0 @@ -#ifndef __LINUX_FBIO_H -#define __LINUX_FBIO_H - -#include -#include - -/* Constants used for fbio SunOS compatibility */ -/* (C) 1996 Miguel de Icaza */ - -/* Frame buffer types */ -#define FBTYPE_NOTYPE -1 -#define FBTYPE_SUN1BW 0 /* mono */ -#define FBTYPE_SUN1COLOR 1 -#define FBTYPE_SUN2BW 2 -#define FBTYPE_SUN2COLOR 3 -#define FBTYPE_SUN2GP 4 -#define FBTYPE_SUN5COLOR 5 -#define FBTYPE_SUN3COLOR 6 -#define FBTYPE_MEMCOLOR 7 -#define FBTYPE_SUN4COLOR 8 - -#define FBTYPE_NOTSUN1 9 -#define FBTYPE_NOTSUN2 10 -#define FBTYPE_NOTSUN3 11 - -#define FBTYPE_SUNFAST_COLOR 12 /* cg6 */ -#define FBTYPE_SUNROP_COLOR 13 -#define FBTYPE_SUNFB_VIDEO 14 -#define FBTYPE_SUNGIFB 15 -#define FBTYPE_SUNGPLAS 16 -#define FBTYPE_SUNGP3 17 -#define FBTYPE_SUNGT 18 -#define FBTYPE_SUNLEO 19 /* zx Leo card */ -#define FBTYPE_MDICOLOR 20 /* cg14 */ -#define FBTYPE_TCXCOLOR 21 /* SUNW,tcx card */ - -#define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */ - -/* Does not seem to be listed in the Sun file either */ -#define FBTYPE_CREATOR 22 -#define FBTYPE_PCI_IGA1682 23 -#define FBTYPE_P9100COLOR 24 - -#define FBTYPE_PCI_GENERIC 1000 -#define FBTYPE_PCI_MACH64 1001 - -/* fbio ioctls */ -/* Returned by FBIOGTYPE */ -struct fbtype { - int fb_type; /* fb type, see above */ - int fb_height; /* pixels */ - int fb_width; /* pixels */ - int fb_depth; - int fb_cmsize; /* color map entries */ - int fb_size; /* fb size in bytes */ -}; -#define FBIOGTYPE _IOR('F', 0, struct fbtype) - -struct fbcmap { - int index; /* first element (0 origin) */ - int count; - unsigned char __user *red; - unsigned char __user *green; - unsigned char __user *blue; -}; - -#ifdef __KERNEL__ -#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap) -#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap) -#else -#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap) -#define FBIOGETCMAP _IOW('F', 4, struct fbcmap) -#endif - -/* # of device specific values */ -#define FB_ATTR_NDEVSPECIFIC 8 -/* # of possible emulations */ -#define FB_ATTR_NEMUTYPES 4 - -struct fbsattr { - int flags; - int emu_type; /* -1 if none */ - int dev_specific[FB_ATTR_NDEVSPECIFIC]; -}; - -struct fbgattr { - int real_type; /* real frame buffer type */ - int owner; /* unknown */ - struct fbtype fbtype; /* real frame buffer fbtype */ - struct fbsattr sattr; - int emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */ -}; -#define FBIOSATTR _IOW('F', 5, struct fbgattr) /* Unsupported: */ -#define FBIOGATTR _IOR('F', 6, struct fbgattr) /* supported */ - -#define FBIOSVIDEO _IOW('F', 7, int) -#define FBIOGVIDEO _IOR('F', 8, int) - -struct fbcursor { - short set; /* what to set, choose from the list above */ - short enable; /* cursor on/off */ - struct fbcurpos pos; /* cursor position */ - struct fbcurpos hot; /* cursor hot spot */ - struct fbcmap cmap; /* color map info */ - struct fbcurpos size; /* cursor bit map size */ - char __user *image; /* cursor image bits */ - char __user *mask; /* cursor mask bits */ -}; - -/* set/get cursor attributes/shape */ -#define FBIOSCURSOR _IOW('F', 24, struct fbcursor) -#define FBIOGCURSOR _IOWR('F', 25, struct fbcursor) - -/* set/get cursor position */ -#define FBIOSCURPOS _IOW('F', 26, struct fbcurpos) -#define FBIOGCURPOS _IOW('F', 27, struct fbcurpos) - -/* get max cursor size */ -#define FBIOGCURMAX _IOR('F', 28, struct fbcurpos) - -/* wid manipulation */ -struct fb_wid_alloc { -#define FB_WID_SHARED_8 0 -#define FB_WID_SHARED_24 1 -#define FB_WID_DBL_8 2 -#define FB_WID_DBL_24 3 - __u32 wa_type; - __s32 wa_index; /* Set on return */ - __u32 wa_count; -}; -struct fb_wid_item { - __u32 wi_type; - __s32 wi_index; - __u32 wi_attrs; - __u32 wi_values[32]; -}; -struct fb_wid_list { - __u32 wl_flags; - __u32 wl_count; - struct fb_wid_item *wl_list; -}; - -#define FBIO_WID_ALLOC _IOWR('F', 30, struct fb_wid_alloc) -#define FBIO_WID_FREE _IOW('F', 31, struct fb_wid_alloc) -#define FBIO_WID_PUT _IOW('F', 32, struct fb_wid_list) -#define FBIO_WID_GET _IOWR('F', 33, struct fb_wid_list) - -/* Creator ioctls */ -#define FFB_IOCTL ('F'<<8) -#define FFB_SYS_INFO (FFB_IOCTL|80) -#define FFB_CLUTREAD (FFB_IOCTL|81) -#define FFB_CLUTPOST (FFB_IOCTL|82) -#define FFB_SETDIAGMODE (FFB_IOCTL|83) -#define FFB_GETMONITORID (FFB_IOCTL|84) -#define FFB_GETVIDEOMODE (FFB_IOCTL|85) -#define FFB_SETVIDEOMODE (FFB_IOCTL|86) -#define FFB_SETSERVER (FFB_IOCTL|87) -#define FFB_SETOVCTL (FFB_IOCTL|88) -#define FFB_GETOVCTL (FFB_IOCTL|89) -#define FFB_GETSAXNUM (FFB_IOCTL|90) -#define FFB_FBDEBUG (FFB_IOCTL|91) - -/* Cg14 ioctls */ -#define MDI_IOCTL ('M'<<8) -#define MDI_RESET (MDI_IOCTL|1) -#define MDI_GET_CFGINFO (MDI_IOCTL|2) -#define MDI_SET_PIXELMODE (MDI_IOCTL|3) -# define MDI_32_PIX 32 -# define MDI_16_PIX 16 -# define MDI_8_PIX 8 - -struct mdi_cfginfo { - int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ - int mdi_type; /* FBTYPE name */ - int mdi_height; /* height */ - int mdi_width; /* widht */ - int mdi_size; /* available ram */ - int mdi_mode; /* 8bpp, 16bpp or 32bpp */ - int mdi_pixfreq; /* pixel clock (from PROM) */ -}; - -/* SparcLinux specific ioctl for the MDI, should be replaced for - * the SET_XLUT/SET_CLUTn ioctls instead - */ -#define MDI_CLEAR_XLUT (MDI_IOCTL|9) - -/* leo & ffb ioctls */ -struct fb_clut_alloc { - __u32 clutid; /* Set on return */ - __u32 flag; - __u32 index; -}; - -struct fb_clut { -#define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */ - __u32 flag; - __u32 clutid; - __u32 offset; - __u32 count; - char * red; - char * green; - char * blue; -}; - -struct fb_clut32 { - __u32 flag; - __u32 clutid; - __u32 offset; - __u32 count; - __u32 red; - __u32 green; - __u32 blue; -}; - -#define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc) -#define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc) -#define LEO_CLUTREAD _IOW('L', 55, struct fb_clut) -#define LEO_CLUTPOST _IOW('L', 56, struct fb_clut) -#define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */ -#define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */ - -#ifdef __KERNEL__ -/* Addresses on the fd of a cgsix that are mappable */ -#define CG6_FBC 0x70000000 -#define CG6_TEC 0x70001000 -#define CG6_BTREGS 0x70002000 -#define CG6_FHC 0x70004000 -#define CG6_THC 0x70005000 -#define CG6_ROM 0x70006000 -#define CG6_RAM 0x70016000 -#define CG6_DHC 0x80000000 - -#define CG3_MMAP_OFFSET 0x4000000 - -/* Addresses on the fd of a tcx that are mappable */ -#define TCX_RAM8BIT 0x00000000 -#define TCX_RAM24BIT 0x01000000 -#define TCX_UNK3 0x10000000 -#define TCX_UNK4 0x20000000 -#define TCX_CONTROLPLANE 0x28000000 -#define TCX_UNK6 0x30000000 -#define TCX_UNK7 0x38000000 -#define TCX_TEC 0x70000000 -#define TCX_BTREGS 0x70002000 -#define TCX_THC 0x70004000 -#define TCX_DHC 0x70008000 -#define TCX_ALT 0x7000a000 -#define TCX_SYNC 0x7000e000 -#define TCX_UNK2 0x70010000 - -/* CG14 definitions */ - -/* Offsets into the OBIO space: */ -#define CG14_REGS 0 /* registers */ -#define CG14_CURSORREGS 0x1000 /* cursor registers */ -#define CG14_DACREGS 0x2000 /* DAC registers */ -#define CG14_XLUT 0x3000 /* X Look Up Table -- ??? */ -#define CG14_CLUT1 0x4000 /* Color Look Up Table */ -#define CG14_CLUT2 0x5000 /* Color Look Up Table */ -#define CG14_CLUT3 0x6000 /* Color Look Up Table */ -#define CG14_AUTO 0xf000 - -#endif /* KERNEL */ - -/* These are exported to userland for applications to use */ -/* Mappable offsets for the cg14: control registers */ -#define MDI_DIRECT_MAP 0x10000000 -#define MDI_CTLREG_MAP 0x20000000 -#define MDI_CURSOR_MAP 0x30000000 -#define MDI_SHDW_VRT_MAP 0x40000000 - -/* Mappable offsets for the cg14: frame buffer resolutions */ -/* 32 bits */ -#define MDI_CHUNKY_XBGR_MAP 0x50000000 -#define MDI_CHUNKY_BGR_MAP 0x60000000 - -/* 16 bits */ -#define MDI_PLANAR_X16_MAP 0x70000000 -#define MDI_PLANAR_C16_MAP 0x80000000 - -/* 8 bit is done as CG3 MMAP offset */ -/* 32 bits, planar */ -#define MDI_PLANAR_X32_MAP 0x90000000 -#define MDI_PLANAR_B32_MAP 0xa0000000 -#define MDI_PLANAR_G32_MAP 0xb0000000 -#define MDI_PLANAR_R32_MAP 0xc0000000 - -/* Mappable offsets on leo */ -#define LEO_SS0_MAP 0x00000000 -#define LEO_LC_SS0_USR_MAP 0x00800000 -#define LEO_LD_SS0_MAP 0x00801000 -#define LEO_LX_CURSOR_MAP 0x00802000 -#define LEO_SS1_MAP 0x00803000 -#define LEO_LC_SS1_USR_MAP 0x01003000 -#define LEO_LD_SS1_MAP 0x01004000 -#define LEO_UNK_MAP 0x01005000 -#define LEO_LX_KRN_MAP 0x01006000 -#define LEO_LC_SS0_KRN_MAP 0x01007000 -#define LEO_LC_SS1_KRN_MAP 0x01008000 -#define LEO_LD_GBL_MAP 0x01009000 -#define LEO_UNK2_MAP 0x0100a000 - -#ifdef __KERNEL__ -struct fbcmap32 { - int index; /* first element (0 origin) */ - int count; - u32 red; - u32 green; - u32 blue; -}; - -#define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32) -#define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32) - -struct fbcursor32 { - short set; /* what to set, choose from the list above */ - short enable; /* cursor on/off */ - struct fbcurpos pos; /* cursor position */ - struct fbcurpos hot; /* cursor hot spot */ - struct fbcmap32 cmap; /* color map info */ - struct fbcurpos size; /* cursor bit map size */ - u32 image; /* cursor image bits */ - u32 mask; /* cursor mask bits */ -}; - -#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32) -#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32) -#endif - -#endif /* __LINUX_FBIO_H */ diff --git a/include/asm-sparc/fcntl.h b/include/asm-sparc/fcntl.h deleted file mode 100644 index d4d9c9d..0000000 --- a/include/asm-sparc/fcntl.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef _SPARC_FCNTL_H -#define _SPARC_FCNTL_H - -/* open/fcntl - O_SYNC is only implemented on blocks devices and on files - located on an ext2 file system */ -#define O_APPEND 0x0008 -#define FASYNC 0x0040 /* fcntl, for BSD compatibility */ -#define O_CREAT 0x0200 /* not fcntl */ -#define O_TRUNC 0x0400 /* not fcntl */ -#define O_EXCL 0x0800 /* not fcntl */ -#define O_SYNC 0x2000 -#define O_NONBLOCK 0x4000 -#if defined(__sparc__) && defined(__arch64__) -#define O_NDELAY 0x0004 -#else -#define O_NDELAY (0x0004 | O_NONBLOCK) -#endif -#define O_NOCTTY 0x8000 /* not fcntl */ -#define O_LARGEFILE 0x40000 -#define O_DIRECT 0x100000 /* direct disk access hint */ -#define O_NOATIME 0x200000 -#define O_CLOEXEC 0x400000 - -#define F_GETOWN 5 /* for sockets. */ -#define F_SETOWN 6 /* for sockets. */ -#define F_GETLK 7 -#define F_SETLK 8 -#define F_SETLKW 9 - -/* for posix fcntl() and lockf() */ -#define F_RDLCK 1 -#define F_WRLCK 2 -#define F_UNLCK 3 - -#define __ARCH_FLOCK_PAD short __unused; -#define __ARCH_FLOCK64_PAD short __unused; - -#include - -#endif diff --git a/include/asm-sparc/fhc.h b/include/asm-sparc/fhc.h deleted file mode 100644 index 788cbc4..0000000 --- a/include/asm-sparc/fhc.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * fhc.h: Structures for central/fhc pseudo driver on Sunfire/Starfire/Wildfire. - * - * Copyright (C) 1997, 1999 David S. Miller (davem@redhat.com) - */ - -#ifndef _SPARC64_FHC_H -#define _SPARC64_FHC_H - -#include - -#include -#include -#include - -struct linux_fhc; - -/* Clock board register offsets. */ -#define CLOCK_CTRL 0x00UL /* Main control */ -#define CLOCK_STAT1 0x10UL /* Status one */ -#define CLOCK_STAT2 0x20UL /* Status two */ -#define CLOCK_PWRSTAT 0x30UL /* Power status */ -#define CLOCK_PWRPRES 0x40UL /* Power presence */ -#define CLOCK_TEMP 0x50UL /* Temperature */ -#define CLOCK_IRQDIAG 0x60UL /* IRQ diagnostics */ -#define CLOCK_PWRSTAT2 0x70UL /* Power status two */ - -#define CLOCK_CTRL_LLED 0x04 /* Left LED, 0 == on */ -#define CLOCK_CTRL_MLED 0x02 /* Mid LED, 1 == on */ -#define CLOCK_CTRL_RLED 0x01 /* RIght LED, 1 == on */ - -struct linux_central { - struct linux_fhc *child; - unsigned long cfreg; - unsigned long clkregs; - unsigned long clkver; - int slots; - struct device_node *prom_node; - - struct linux_prom_ranges central_ranges[PROMREG_MAX]; - int num_central_ranges; -}; - -/* Firehose controller register offsets */ -struct fhc_regs { - unsigned long pregs; /* FHC internal regs */ -#define FHC_PREGS_ID 0x00UL /* FHC ID */ -#define FHC_ID_VERS 0xf0000000 /* Version of this FHC */ -#define FHC_ID_PARTID 0x0ffff000 /* Part ID code (0x0f9f == FHC) */ -#define FHC_ID_MANUF 0x0000007e /* Manufacturer (0x3e == SUN's JEDEC)*/ -#define FHC_ID_RESV 0x00000001 /* Read as one */ -#define FHC_PREGS_RCS 0x10UL /* FHC Reset Control/Status Register */ -#define FHC_RCS_POR 0x80000000 /* Last reset was a power cycle */ -#define FHC_RCS_SPOR 0x40000000 /* Last reset was sw power on reset */ -#define FHC_RCS_SXIR 0x20000000 /* Last reset was sw XIR reset */ -#define FHC_RCS_BPOR 0x10000000 /* Last reset was due to POR button */ -#define FHC_RCS_BXIR 0x08000000 /* Last reset was due to XIR button */ -#define FHC_RCS_WEVENT 0x04000000 /* CPU reset was due to wakeup event */ -#define FHC_RCS_CFATAL 0x02000000 /* Centerplane Fatal Error signalled */ -#define FHC_RCS_FENAB 0x01000000 /* Fatal errors elicit system reset */ -#define FHC_PREGS_CTRL 0x20UL /* FHC Control Register */ -#define FHC_CONTROL_ICS 0x00100000 /* Ignore Centerplane Signals */ -#define FHC_CONTROL_FRST 0x00080000 /* Fatal Error Reset Enable */ -#define FHC_CONTROL_LFAT 0x00040000 /* AC/DC signalled a local error */ -#define FHC_CONTROL_SLINE 0x00010000 /* Firmware Synchronization Line */ -#define FHC_CONTROL_DCD 0x00008000 /* DC-->DC Converter Disable */ -#define FHC_CONTROL_POFF 0x00004000 /* AC/DC Controller PLL Disable */ -#define FHC_CONTROL_FOFF 0x00002000 /* FHC Controller PLL Disable */ -#define FHC_CONTROL_AOFF 0x00001000 /* CPU A SRAM/SBD Low Power Mode */ -#define FHC_CONTROL_BOFF 0x00000800 /* CPU B SRAM/SBD Low Power Mode */ -#define FHC_CONTROL_PSOFF 0x00000400 /* Turns off this FHC's power supply */ -#define FHC_CONTROL_IXIST 0x00000200 /* 0=FHC tells clock board it exists */ -#define FHC_CONTROL_XMSTR 0x00000100 /* 1=Causes this FHC to be XIR master*/ -#define FHC_CONTROL_LLED 0x00000040 /* 0=Left LED ON */ -#define FHC_CONTROL_MLED 0x00000020 /* 1=Middle LED ON */ -#define FHC_CONTROL_RLED 0x00000010 /* 1=Right LED */ -#define FHC_CONTROL_BPINS 0x00000003 /* Spare Bidirectional Pins */ -#define FHC_PREGS_BSR 0x30UL /* FHC Board Status Register */ -#define FHC_BSR_DA64 0x00040000 /* Port A: 0=128bit 1=64bit data path */ -#define FHC_BSR_DB64 0x00020000 /* Port B: 0=128bit 1=64bit data path */ -#define FHC_BSR_BID 0x0001e000 /* Board ID */ -#define FHC_BSR_SA 0x00001c00 /* Port A UPA Speed (from the pins) */ -#define FHC_BSR_SB 0x00000380 /* Port B UPA Speed (from the pins) */ -#define FHC_BSR_NDIAG 0x00000040 /* Not in Diag Mode */ -#define FHC_BSR_NTBED 0x00000020 /* Not in TestBED Mode */ -#define FHC_BSR_NIA 0x0000001c /* Jumper, bit 18 in PROM space */ -#define FHC_BSR_SI 0x00000001 /* Spare input pin value */ -#define FHC_PREGS_ECC 0x40UL /* FHC ECC Control Register (16 bits) */ -#define FHC_PREGS_JCTRL 0xf0UL /* FHC JTAG Control Register */ -#define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */ -#define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */ -#define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */ - unsigned long ireg; /* FHC IGN reg */ -#define FHC_IREG_IGN 0x00UL /* This FHC's IGN */ - unsigned long ffregs; /* FHC fanfail regs */ -#define FHC_FFREGS_IMAP 0x00UL /* FHC Fanfail IMAP */ -#define FHC_FFREGS_ICLR 0x10UL /* FHC Fanfail ICLR */ - unsigned long sregs; /* FHC system regs */ -#define FHC_SREGS_IMAP 0x00UL /* FHC System IMAP */ -#define FHC_SREGS_ICLR 0x10UL /* FHC System ICLR */ - unsigned long uregs; /* FHC uart regs */ -#define FHC_UREGS_IMAP 0x00UL /* FHC Uart IMAP */ -#define FHC_UREGS_ICLR 0x10UL /* FHC Uart ICLR */ - unsigned long tregs; /* FHC TOD regs */ -#define FHC_TREGS_IMAP 0x00UL /* FHC TOD IMAP */ -#define FHC_TREGS_ICLR 0x10UL /* FHC TOD ICLR */ -}; - -struct linux_fhc { - struct linux_fhc *next; - struct linux_central *parent; /* NULL if not central FHC */ - struct fhc_regs fhc_regs; - int board; - int jtag_master; - struct device_node *prom_node; - - struct linux_prom_ranges fhc_ranges[PROMREG_MAX]; - int num_fhc_ranges; -}; - -#endif /* !(_SPARC64_FHC_H) */ diff --git a/include/asm-sparc/fixmap.h b/include/asm-sparc/fixmap.h deleted file mode 100644 index f18fc07..0000000 --- a/include/asm-sparc/fixmap.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * fixmap.h: compile-time virtual memory allocation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1998 Ingo Molnar - * - * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 - */ - -#ifndef _ASM_FIXMAP_H -#define _ASM_FIXMAP_H - -#include -#include -#ifdef CONFIG_HIGHMEM -#include -#include -#endif - -/* - * Here we define all the compile-time 'special' virtual - * addresses. The point is to have a constant address at - * compile time, but to set the physical address only - * in the boot process. We allocate these special addresses - * from the top of unused virtual memory (0xfd000000 - 1 page) backwards. - * Also this lets us do fail-safe vmalloc(), we - * can guarantee that these special addresses and - * vmalloc()-ed addresses never overlap. - * - * these 'compile-time allocated' memory buffers are - * fixed-size 4k pages. (or larger if used with an increment - * highger than 1) use fixmap_set(idx,phys) to associate - * physical memory with fixmap indices. - * - * TLB entries of such buffers will not be flushed across - * task switches. - */ - -/* - * on UP currently we will have no trace of the fixmap mechanism, - * no page table allocations, etc. This might change in the - * future, say framebuffers for the console driver(s) could be - * fix-mapped? - */ -enum fixed_addresses { - FIX_HOLE, -#ifdef CONFIG_HIGHMEM - FIX_KMAP_BEGIN, - FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, -#endif - __end_of_fixed_addresses -}; - -extern void __set_fixmap (enum fixed_addresses idx, - unsigned long phys, pgprot_t flags); - -#define set_fixmap(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL) -/* - * Some hardware wants to get fixmapped without caching. - */ -#define set_fixmap_nocache(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) -/* - * used by vmalloc.c. - * - * Leave one empty page between IO pages at 0xfd000000 and - * the start of the fixmap. - */ -#define FIXADDR_TOP (0xfcfff000UL) -#define FIXADDR_SIZE ((__end_of_fixed_addresses) << PAGE_SHIFT) -#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) - -#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) -#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) - -extern void __this_fixmap_does_not_exist(void); - -/* - * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference - * kernel oops. Illegal ranges of incoming indices are caught too. - */ -static inline unsigned long fix_to_virt(const unsigned int idx) -{ - /* - * this branch gets completely eliminated after inlining, - * except when someone tries to use fixaddr indices in an - * illegal way. (such as mixing up address types or using - * out-of-range indices). - * - * If it doesn't get removed, the linker will complain - * loudly with a reasonably clear error message.. - */ - if (idx >= __end_of_fixed_addresses) - __this_fixmap_does_not_exist(); - - return __fix_to_virt(idx); -} - -static inline unsigned long virt_to_fix(const unsigned long vaddr) -{ - BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); - return __virt_to_fix(vaddr); -} - -#endif diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h deleted file mode 100644 index 6c628ba..0000000 --- a/include/asm-sparc/floppy.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_FLOPPY_H -#define ___ASM_SPARC_FLOPPY_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/floppy_32.h b/include/asm-sparc/floppy_32.h deleted file mode 100644 index acdd06e..0000000 --- a/include/asm-sparc/floppy_32.h +++ /dev/null @@ -1,388 +0,0 @@ -/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver. - * - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) - */ - -#ifndef __ASM_SPARC_FLOPPY_H -#define __ASM_SPARC_FLOPPY_H - -#include -#include -#include -#include -#include -#include -#include -#include - -/* We don't need no stinkin' I/O port allocation crap. */ -#undef release_region -#undef request_region -#define release_region(X, Y) do { } while(0) -#define request_region(X, Y, Z) (1) - -/* References: - * 1) Netbsd Sun floppy driver. - * 2) NCR 82077 controller manual - * 3) Intel 82077 controller manual - */ -struct sun_flpy_controller { - volatile unsigned char status_82072; /* Main Status reg. */ -#define dcr_82072 status_82072 /* Digital Control reg. */ -#define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ - - volatile unsigned char data_82072; /* Data fifo. */ -#define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ - - volatile unsigned char dor_82077; /* Digital Output reg. */ - volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ - - volatile unsigned char status_82077; /* Main Status Register. */ -#define drs_82077 status_82077 /* Digital Rate Select reg. */ - - volatile unsigned char data_82077; /* Data fifo. */ - volatile unsigned char ___unused; - volatile unsigned char dir_82077; /* Digital Input reg. */ -#define dcr_82077 dir_82077 /* Config Control reg. */ -}; - -/* You'll only ever find one controller on a SparcStation anyways. */ -static struct sun_flpy_controller *sun_fdc = NULL; -extern volatile unsigned char *fdc_status; - -struct sun_floppy_ops { - unsigned char (*fd_inb)(int port); - void (*fd_outb)(unsigned char value, int port); -}; - -static struct sun_floppy_ops sun_fdops; - -#define fd_inb(port) sun_fdops.fd_inb(port) -#define fd_outb(value,port) sun_fdops.fd_outb(value,port) -#define fd_enable_dma() sun_fd_enable_dma() -#define fd_disable_dma() sun_fd_disable_dma() -#define fd_request_dma() (0) /* nothing... */ -#define fd_free_dma() /* nothing... */ -#define fd_clear_dma_ff() /* nothing... */ -#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) -#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) -#define fd_set_dma_count(count) sun_fd_set_dma_count(count) -#define fd_enable_irq() /* nothing... */ -#define fd_disable_irq() /* nothing... */ -#define fd_cacheflush(addr, size) /* nothing... */ -#define fd_request_irq() sun_fd_request_irq() -#define fd_free_irq() /* nothing... */ -#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ -#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) -#define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) -#endif - -/* XXX This isn't really correct. XXX */ -#define get_dma_residue(x) (0) - -#define FLOPPY0_TYPE 4 -#define FLOPPY1_TYPE 0 - -/* Super paranoid... */ -#undef HAVE_DISABLE_HLT - -/* Here is where we catch the floppy driver trying to initialize, - * therefore this is where we call the PROM device tree probing - * routine etc. on the Sparc. - */ -#define FDC1 sun_floppy_init() - -#define N_FDC 1 -#define N_DRIVE 8 - -/* No 64k boundary crossing problems on the Sparc. */ -#define CROSS_64KB(a,s) (0) - -/* Routines unique to each controller type on a Sun. */ -static void sun_set_dor(unsigned char value, int fdc_82077) -{ - if (sparc_cpu_model == sun4c) { - unsigned int bits = 0; - if (value & 0x10) - bits |= AUXIO_FLPY_DSEL; - if ((value & 0x80) == 0) - bits |= AUXIO_FLPY_EJCT; - set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); - } - if (fdc_82077) { - sun_fdc->dor_82077 = value; - } -} - -static unsigned char sun_read_dir(void) -{ - if (sparc_cpu_model == sun4c) - return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; - else - return sun_fdc->dir_82077; -} - -static unsigned char sun_82072_fd_inb(int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 4: /* FD_STATUS */ - return sun_fdc->status_82072 & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sun_fdc->data_82072; - case 7: /* FD_DIR */ - return sun_read_dir(); - }; - panic("sun_82072_fd_inb: How did I get here?"); -} - -static void sun_82072_fd_outb(unsigned char value, int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - sun_set_dor(value, 0); - break; - case 5: /* FD_DATA */ - sun_fdc->data_82072 = value; - break; - case 7: /* FD_DCR */ - sun_fdc->dcr_82072 = value; - break; - case 4: /* FD_STATUS */ - sun_fdc->status_82072 = value; - break; - }; - return; -} - -static unsigned char sun_82077_fd_inb(int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 0: /* FD_STATUS_0 */ - return sun_fdc->status1_82077; - case 1: /* FD_STATUS_1 */ - return sun_fdc->status2_82077; - case 2: /* FD_DOR */ - return sun_fdc->dor_82077; - case 3: /* FD_TDR */ - return sun_fdc->tapectl_82077; - case 4: /* FD_STATUS */ - return sun_fdc->status_82077 & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sun_fdc->data_82077; - case 7: /* FD_DIR */ - return sun_read_dir(); - }; - panic("sun_82077_fd_inb: How did I get here?"); -} - -static void sun_82077_fd_outb(unsigned char value, int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - sun_set_dor(value, 1); - break; - case 5: /* FD_DATA */ - sun_fdc->data_82077 = value; - break; - case 7: /* FD_DCR */ - sun_fdc->dcr_82077 = value; - break; - case 4: /* FD_STATUS */ - sun_fdc->status_82077 = value; - break; - case 3: /* FD_TDR */ - sun_fdc->tapectl_82077 = value; - break; - }; - return; -} - -/* For pseudo-dma (Sun floppy drives have no real DMA available to - * them so we must eat the data fifo bytes directly ourselves) we have - * three state variables. doing_pdma tells our inline low-level - * assembly floppy interrupt entry point whether it should sit and eat - * bytes from the fifo or just transfer control up to the higher level - * floppy interrupt c-code. I tried very hard but I could not get the - * pseudo-dma to work in c-code without getting many overruns and - * underruns. If non-zero, doing_pdma encodes the direction of - * the transfer for debugging. 1=read 2=write - */ -extern char *pdma_vaddr; -extern unsigned long pdma_size; -extern volatile int doing_pdma; - -/* This is software state */ -extern char *pdma_base; -extern unsigned long pdma_areasize; - -/* Common routines to all controller types on the Sparc. */ -static inline void virtual_dma_init(void) -{ - /* nothing... */ -} - -static inline void sun_fd_disable_dma(void) -{ - doing_pdma = 0; - if (pdma_base) { - mmu_unlockarea(pdma_base, pdma_areasize); - pdma_base = NULL; - } -} - -static inline void sun_fd_set_dma_mode(int mode) -{ - switch(mode) { - case DMA_MODE_READ: - doing_pdma = 1; - break; - case DMA_MODE_WRITE: - doing_pdma = 2; - break; - default: - printk("Unknown dma mode %d\n", mode); - panic("floppy: Giving up..."); - } -} - -static inline void sun_fd_set_dma_addr(char *buffer) -{ - pdma_vaddr = buffer; -} - -static inline void sun_fd_set_dma_count(int length) -{ - pdma_size = length; -} - -static inline void sun_fd_enable_dma(void) -{ - pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); - pdma_base = pdma_vaddr; - pdma_areasize = pdma_size; -} - -/* Our low-level entry point in arch/sparc/kernel/entry.S */ -extern int sparc_floppy_request_irq(int irq, unsigned long flags, - irq_handler_t irq_handler); - -static int sun_fd_request_irq(void) -{ - static int once = 0; - int error; - - if(!once) { - once = 1; - error = sparc_floppy_request_irq(FLOPPY_IRQ, - IRQF_DISABLED, - floppy_interrupt); - return ((error == 0) ? 0 : -1); - } else return 0; -} - -static struct linux_prom_registers fd_regs[2]; - -static int sun_floppy_init(void) -{ - char state[128]; - int tnode, fd_node, num_regs; - struct resource r; - - use_virtual_dma = 1; - - FLOPPY_IRQ = 11; - /* Forget it if we aren't on a machine that could possibly - * ever have a floppy drive. - */ - if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || - ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || - (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { - /* We certainly don't have a floppy controller. */ - goto no_sun_fdc; - } - /* Well, try to find one. */ - tnode = prom_getchild(prom_root_node); - fd_node = prom_searchsiblings(tnode, "obio"); - if(fd_node != 0) { - tnode = prom_getchild(fd_node); - fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); - } else { - fd_node = prom_searchsiblings(tnode, "fd"); - } - if(fd_node == 0) { - goto no_sun_fdc; - } - - /* The sun4m lets us know if the controller is actually usable. */ - if(sparc_cpu_model == sun4m && - prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { - if(!strcmp(state, "disabled")) { - goto no_sun_fdc; - } - } - num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); - num_regs = (num_regs / sizeof(fd_regs[0])); - prom_apply_obio_ranges(fd_regs, num_regs); - memset(&r, 0, sizeof(r)); - r.flags = fd_regs[0].which_io; - r.start = fd_regs[0].phys_addr; - sun_fdc = (struct sun_flpy_controller *) - sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); - - /* Last minute sanity check... */ - if(sun_fdc->status_82072 == 0xff) { - sun_fdc = NULL; - goto no_sun_fdc; - } - - sun_fdops.fd_inb = sun_82077_fd_inb; - sun_fdops.fd_outb = sun_82077_fd_outb; - fdc_status = &sun_fdc->status_82077; - - if (sun_fdc->dor_82077 == 0x80) { - sun_fdc->dor_82077 = 0x02; - if (sun_fdc->dor_82077 == 0x80) { - sun_fdops.fd_inb = sun_82072_fd_inb; - sun_fdops.fd_outb = sun_82072_fd_outb; - fdc_status = &sun_fdc->status_82072; - } - } - - /* Success... */ - allowed_drive_mask = 0x01; - return (int) sun_fdc; - -no_sun_fdc: - return -1; -} - -static int sparc_eject(void) -{ - set_dor(0x00, 0xff, 0x90); - udelay(500); - set_dor(0x00, 0x6f, 0x00); - udelay(500); - return 0; -} - -#define fd_eject(drive) sparc_eject() - -#define EXTRA_FLOPPY_PARAMS - -#endif /* !(__ASM_SPARC_FLOPPY_H) */ diff --git a/include/asm-sparc/floppy_64.h b/include/asm-sparc/floppy_64.h deleted file mode 100644 index c39db10..0000000 --- a/include/asm-sparc/floppy_64.h +++ /dev/null @@ -1,782 +0,0 @@ -/* floppy.h: Sparc specific parts of the Floppy driver. - * - * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - * - * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef __ASM_SPARC64_FLOPPY_H -#define __ASM_SPARC64_FLOPPY_H - -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include - - -/* - * Define this to enable exchanging drive 0 and 1 if only drive 1 is - * probed on PCI machines. - */ -#undef PCI_FDC_SWAP_DRIVES - - -/* References: - * 1) Netbsd Sun floppy driver. - * 2) NCR 82077 controller manual - * 3) Intel 82077 controller manual - */ -struct sun_flpy_controller { - volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */ - volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */ - volatile unsigned char dor_82077; /* Digital Output reg. */ - volatile unsigned char tapectl_82077; /* Tape Control reg */ - volatile unsigned char status_82077; /* Main Status Register. */ -#define drs_82077 status_82077 /* Digital Rate Select reg. */ - volatile unsigned char data_82077; /* Data fifo. */ - volatile unsigned char ___unused; - volatile unsigned char dir_82077; /* Digital Input reg. */ -#define dcr_82077 dir_82077 /* Config Control reg. */ -}; - -/* You'll only ever find one controller on an Ultra anyways. */ -static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1; -unsigned long fdc_status; -static struct sbus_dev *floppy_sdev = NULL; - -struct sun_floppy_ops { - unsigned char (*fd_inb) (unsigned long port); - void (*fd_outb) (unsigned char value, unsigned long port); - void (*fd_enable_dma) (void); - void (*fd_disable_dma) (void); - void (*fd_set_dma_mode) (int); - void (*fd_set_dma_addr) (char *); - void (*fd_set_dma_count) (int); - unsigned int (*get_dma_residue) (void); - int (*fd_request_irq) (void); - void (*fd_free_irq) (void); - int (*fd_eject) (int); -}; - -static struct sun_floppy_ops sun_fdops; - -#define fd_inb(port) sun_fdops.fd_inb(port) -#define fd_outb(value,port) sun_fdops.fd_outb(value,port) -#define fd_enable_dma() sun_fdops.fd_enable_dma() -#define fd_disable_dma() sun_fdops.fd_disable_dma() -#define fd_request_dma() (0) /* nothing... */ -#define fd_free_dma() /* nothing... */ -#define fd_clear_dma_ff() /* nothing... */ -#define fd_set_dma_mode(mode) sun_fdops.fd_set_dma_mode(mode) -#define fd_set_dma_addr(addr) sun_fdops.fd_set_dma_addr(addr) -#define fd_set_dma_count(count) sun_fdops.fd_set_dma_count(count) -#define get_dma_residue(x) sun_fdops.get_dma_residue() -#define fd_cacheflush(addr, size) /* nothing... */ -#define fd_request_irq() sun_fdops.fd_request_irq() -#define fd_free_irq() sun_fdops.fd_free_irq() -#define fd_eject(drive) sun_fdops.fd_eject(drive) - -/* Super paranoid... */ -#undef HAVE_DISABLE_HLT - -static int sun_floppy_types[2] = { 0, 0 }; - -/* Here is where we catch the floppy driver trying to initialize, - * therefore this is where we call the PROM device tree probing - * routine etc. on the Sparc. - */ -#define FLOPPY0_TYPE sun_floppy_init() -#define FLOPPY1_TYPE sun_floppy_types[1] - -#define FDC1 ((unsigned long)sun_fdc) - -#define N_FDC 1 -#define N_DRIVE 8 - -/* No 64k boundary crossing problems on the Sparc. */ -#define CROSS_64KB(a,s) (0) - -static unsigned char sun_82077_fd_inb(unsigned long port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %lx\n", port); - panic("floppy: Port bolixed."); - case 4: /* FD_STATUS */ - return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sbus_readb(&sun_fdc->data_82077); - case 7: /* FD_DIR */ - /* XXX: Is DCL on 0x80 in sun4m? */ - return sbus_readb(&sun_fdc->dir_82077); - }; - panic("sun_82072_fd_inb: How did I get here?"); -} - -static void sun_82077_fd_outb(unsigned char value, unsigned long port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %lx\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - /* Happily, the 82077 has a real DOR register. */ - sbus_writeb(value, &sun_fdc->dor_82077); - break; - case 5: /* FD_DATA */ - sbus_writeb(value, &sun_fdc->data_82077); - break; - case 7: /* FD_DCR */ - sbus_writeb(value, &sun_fdc->dcr_82077); - break; - case 4: /* FD_STATUS */ - sbus_writeb(value, &sun_fdc->status_82077); - break; - }; - return; -} - -/* For pseudo-dma (Sun floppy drives have no real DMA available to - * them so we must eat the data fifo bytes directly ourselves) we have - * three state variables. doing_pdma tells our inline low-level - * assembly floppy interrupt entry point whether it should sit and eat - * bytes from the fifo or just transfer control up to the higher level - * floppy interrupt c-code. I tried very hard but I could not get the - * pseudo-dma to work in c-code without getting many overruns and - * underruns. If non-zero, doing_pdma encodes the direction of - * the transfer for debugging. 1=read 2=write - */ -unsigned char *pdma_vaddr; -unsigned long pdma_size; -volatile int doing_pdma = 0; - -/* This is software state */ -char *pdma_base = NULL; -unsigned long pdma_areasize; - -/* Common routines to all controller types on the Sparc. */ -static void sun_fd_disable_dma(void) -{ - doing_pdma = 0; - if (pdma_base) { - mmu_unlockarea(pdma_base, pdma_areasize); - pdma_base = NULL; - } -} - -static void sun_fd_set_dma_mode(int mode) -{ - switch(mode) { - case DMA_MODE_READ: - doing_pdma = 1; - break; - case DMA_MODE_WRITE: - doing_pdma = 2; - break; - default: - printk("Unknown dma mode %d\n", mode); - panic("floppy: Giving up..."); - } -} - -static void sun_fd_set_dma_addr(char *buffer) -{ - pdma_vaddr = buffer; -} - -static void sun_fd_set_dma_count(int length) -{ - pdma_size = length; -} - -static void sun_fd_enable_dma(void) -{ - pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); - pdma_base = pdma_vaddr; - pdma_areasize = pdma_size; -} - -irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie) -{ - if (likely(doing_pdma)) { - void __iomem *stat = (void __iomem *) fdc_status; - unsigned char *vaddr = pdma_vaddr; - unsigned long size = pdma_size; - u8 val; - - while (size) { - val = readb(stat); - if (unlikely(!(val & 0x80))) { - pdma_vaddr = vaddr; - pdma_size = size; - return IRQ_HANDLED; - } - if (unlikely(!(val & 0x20))) { - pdma_vaddr = vaddr; - pdma_size = size; - doing_pdma = 0; - goto main_interrupt; - } - if (val & 0x40) { - /* read */ - *vaddr++ = readb(stat + 1); - } else { - unsigned char data = *vaddr++; - - /* write */ - writeb(data, stat + 1); - } - size--; - } - - pdma_vaddr = vaddr; - pdma_size = size; - - /* Send Terminal Count pulse to floppy controller. */ - val = readb(auxio_register); - val |= AUXIO_AUX1_FTCNT; - writeb(val, auxio_register); - val &= ~AUXIO_AUX1_FTCNT; - writeb(val, auxio_register); - - doing_pdma = 0; - } - -main_interrupt: - return floppy_interrupt(irq, dev_cookie); -} - -static int sun_fd_request_irq(void) -{ - static int once = 0; - int error; - - if(!once) { - once = 1; - - error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, - IRQF_DISABLED, "floppy", NULL); - - return ((error == 0) ? 0 : -1); - } - return 0; -} - -static void sun_fd_free_irq(void) -{ -} - -static unsigned int sun_get_dma_residue(void) -{ - /* XXX This isn't really correct. XXX */ - return 0; -} - -static int sun_fd_eject(int drive) -{ - set_dor(0x00, 0xff, 0x90); - udelay(500); - set_dor(0x00, 0x6f, 0x00); - udelay(500); - return 0; -} - -#ifdef CONFIG_PCI -#include -#include - -static struct ebus_dma_info sun_pci_fd_ebus_dma; -static struct pci_dev *sun_pci_ebus_dev; -static int sun_pci_broken_drive = -1; - -struct sun_pci_dma_op { - unsigned int addr; - int len; - int direction; - char *buf; -}; -static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL}; -static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL}; - -extern irqreturn_t floppy_interrupt(int irq, void *dev_id); - -static unsigned char sun_pci_fd_inb(unsigned long port) -{ - udelay(5); - return inb(port); -} - -static void sun_pci_fd_outb(unsigned char val, unsigned long port) -{ - udelay(5); - outb(val, port); -} - -static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port) -{ - udelay(5); - /* - * XXX: Due to SUN's broken floppy connector on AX and AXi - * we need to turn on MOTOR_0 also, if the floppy is - * jumpered to DS1 (like most PC floppies are). I hope - * this does not hurt correct hardware like the AXmp. - * (Eddie, Sep 12 1998). - */ - if (port == ((unsigned long)sun_fdc) + 2) { - if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) { - val |= 0x10; - } - } - outb(val, port); -} - -#ifdef PCI_FDC_SWAP_DRIVES -static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port) -{ - udelay(5); - /* - * XXX: Due to SUN's broken floppy connector on AX and AXi - * we need to turn on MOTOR_0 also, if the floppy is - * jumpered to DS1 (like most PC floppies are). I hope - * this does not hurt correct hardware like the AXmp. - * (Eddie, Sep 12 1998). - */ - if (port == ((unsigned long)sun_fdc) + 2) { - if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) { - val &= ~(0x03); - val |= 0x21; - } - } - outb(val, port); -} -#endif /* PCI_FDC_SWAP_DRIVES */ - -static void sun_pci_fd_enable_dma(void) -{ - BUG_ON((NULL == sun_pci_dma_pending.buf) || - (0 == sun_pci_dma_pending.len) || - (0 == sun_pci_dma_pending.direction)); - - sun_pci_dma_current.buf = sun_pci_dma_pending.buf; - sun_pci_dma_current.len = sun_pci_dma_pending.len; - sun_pci_dma_current.direction = sun_pci_dma_pending.direction; - - sun_pci_dma_pending.buf = NULL; - sun_pci_dma_pending.len = 0; - sun_pci_dma_pending.direction = 0; - sun_pci_dma_pending.addr = -1U; - - sun_pci_dma_current.addr = - pci_map_single(sun_pci_ebus_dev, - sun_pci_dma_current.buf, - sun_pci_dma_current.len, - sun_pci_dma_current.direction); - - ebus_dma_enable(&sun_pci_fd_ebus_dma, 1); - - if (ebus_dma_request(&sun_pci_fd_ebus_dma, - sun_pci_dma_current.addr, - sun_pci_dma_current.len)) - BUG(); -} - -static void sun_pci_fd_disable_dma(void) -{ - ebus_dma_enable(&sun_pci_fd_ebus_dma, 0); - if (sun_pci_dma_current.addr != -1U) - pci_unmap_single(sun_pci_ebus_dev, - sun_pci_dma_current.addr, - sun_pci_dma_current.len, - sun_pci_dma_current.direction); - sun_pci_dma_current.addr = -1U; -} - -static void sun_pci_fd_set_dma_mode(int mode) -{ - if (mode == DMA_MODE_WRITE) - sun_pci_dma_pending.direction = PCI_DMA_TODEVICE; - else - sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE; - - ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE); -} - -static void sun_pci_fd_set_dma_count(int length) -{ - sun_pci_dma_pending.len = length; -} - -static void sun_pci_fd_set_dma_addr(char *buffer) -{ - sun_pci_dma_pending.buf = buffer; -} - -static unsigned int sun_pci_get_dma_residue(void) -{ - return ebus_dma_residue(&sun_pci_fd_ebus_dma); -} - -static int sun_pci_fd_request_irq(void) -{ - return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1); -} - -static void sun_pci_fd_free_irq(void) -{ - ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0); -} - -static int sun_pci_fd_eject(int drive) -{ - return -EINVAL; -} - -void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie) -{ - floppy_interrupt(0, NULL); -} - -/* - * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, - * even if this is configured using DS1, thus looks like /dev/fd1 with - * the cabling used in Ultras. - */ -#define DOR (port + 2) -#define MSR (port + 4) -#define FIFO (port + 5) - -static void sun_pci_fd_out_byte(unsigned long port, unsigned char val, - unsigned long reg) -{ - unsigned char status; - int timeout = 1000; - - while (!((status = inb(MSR)) & 0x80) && --timeout) - udelay(100); - outb(val, reg); -} - -static unsigned char sun_pci_fd_sensei(unsigned long port) -{ - unsigned char result[2] = { 0x70, 0x00 }; - unsigned char status; - int i = 0; - - sun_pci_fd_out_byte(port, 0x08, FIFO); - do { - int timeout = 1000; - - while (!((status = inb(MSR)) & 0x80) && --timeout) - udelay(100); - - if (!timeout) - break; - - if ((status & 0xf0) == 0xd0) - result[i++] = inb(FIFO); - else - break; - } while (i < 2); - - return result[0]; -} - -static void sun_pci_fd_reset(unsigned long port) -{ - unsigned char mask = 0x00; - unsigned char status; - int timeout = 10000; - - outb(0x80, MSR); - do { - status = sun_pci_fd_sensei(port); - if ((status & 0xc0) == 0xc0) - mask |= 1 << (status & 0x03); - else - udelay(100); - } while ((mask != 0x0f) && --timeout); -} - -static int sun_pci_fd_test_drive(unsigned long port, int drive) -{ - unsigned char status, data; - int timeout = 1000; - int ready; - - sun_pci_fd_reset(port); - - data = (0x10 << drive) | 0x0c | drive; - sun_pci_fd_out_byte(port, data, DOR); - - sun_pci_fd_out_byte(port, 0x07, FIFO); - sun_pci_fd_out_byte(port, drive & 0x03, FIFO); - - do { - udelay(100); - status = sun_pci_fd_sensei(port); - } while (((status & 0xc0) == 0x80) && --timeout); - - if (!timeout) - ready = 0; - else - ready = (status & 0x10) ? 0 : 1; - - sun_pci_fd_reset(port); - return ready; -} -#undef FIFO -#undef MSR -#undef DOR - -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_PCI -static int __init ebus_fdthree_p(struct linux_ebus_device *edev) -{ - if (!strcmp(edev->prom_node->name, "fdthree")) - return 1; - if (!strcmp(edev->prom_node->name, "floppy")) { - const char *compat; - - compat = of_get_property(edev->prom_node, - "compatible", NULL); - if (compat && !strcmp(compat, "fdthree")) - return 1; - } - return 0; -} -#endif - -static unsigned long __init sun_floppy_init(void) -{ - char state[128]; - struct sbus_bus *bus; - struct sbus_dev *sdev = NULL; - static int initialized = 0; - - if (initialized) - return sun_floppy_types[0]; - initialized = 1; - - for_all_sbusdev (sdev, bus) { - if (!strcmp(sdev->prom_name, "SUNW,fdtwo")) - break; - } - if(sdev) { - floppy_sdev = sdev; - FLOPPY_IRQ = sdev->irqs[0]; - } else { -#ifdef CONFIG_PCI - struct linux_ebus *ebus; - struct linux_ebus_device *edev = NULL; - unsigned long config = 0; - void __iomem *auxio_reg; - const char *state_prop; - - for_each_ebus(ebus) { - for_each_ebusdev(edev, ebus) { - if (ebus_fdthree_p(edev)) - goto ebus_done; - } - } - ebus_done: - if (!edev) - return 0; - - state_prop = of_get_property(edev->prom_node, "status", NULL); - if (state_prop && !strncmp(state_prop, "disabled", 8)) - return 0; - - FLOPPY_IRQ = edev->irqs[0]; - - /* Make sure the high density bit is set, some systems - * (most notably Ultra5/Ultra10) come up with it clear. - */ - auxio_reg = (void __iomem *) edev->resource[2].start; - writel(readl(auxio_reg)|0x2, auxio_reg); - - sun_pci_ebus_dev = ebus->self; - - spin_lock_init(&sun_pci_fd_ebus_dma.lock); - - /* XXX ioremap */ - sun_pci_fd_ebus_dma.regs = (void __iomem *) - edev->resource[1].start; - if (!sun_pci_fd_ebus_dma.regs) - return 0; - - sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER | - EBUS_DMA_FLAG_TCI_DISABLE); - sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; - sun_pci_fd_ebus_dma.client_cookie = NULL; - sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; - strcpy(sun_pci_fd_ebus_dma.name, "floppy"); - if (ebus_dma_register(&sun_pci_fd_ebus_dma)) - return 0; - - /* XXX ioremap */ - sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start; - - sun_fdops.fd_inb = sun_pci_fd_inb; - sun_fdops.fd_outb = sun_pci_fd_outb; - - can_use_virtual_dma = use_virtual_dma = 0; - sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma; - sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma; - sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode; - sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr; - sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count; - sun_fdops.get_dma_residue = sun_pci_get_dma_residue; - - sun_fdops.fd_request_irq = sun_pci_fd_request_irq; - sun_fdops.fd_free_irq = sun_pci_fd_free_irq; - - sun_fdops.fd_eject = sun_pci_fd_eject; - - fdc_status = (unsigned long) &sun_fdc->status_82077; - - /* - * XXX: Find out on which machines this is really needed. - */ - if (1) { - sun_pci_broken_drive = 1; - sun_fdops.fd_outb = sun_pci_fd_broken_outb; - } - - allowed_drive_mask = 0; - if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0)) - sun_floppy_types[0] = 4; - if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1)) - sun_floppy_types[1] = 4; - - /* - * Find NS87303 SuperIO config registers (through ecpp). - */ - for_each_ebus(ebus) { - for_each_ebusdev(edev, ebus) { - if (!strcmp(edev->prom_node->name, "ecpp")) { - config = edev->resource[1].start; - goto config_done; - } - } - } - config_done: - - /* - * Sanity check, is this really the NS87303? - */ - switch (config & 0x3ff) { - case 0x02e: - case 0x15c: - case 0x26e: - case 0x398: - break; - default: - config = 0; - } - - if (!config) - return sun_floppy_types[0]; - - /* Enable PC-AT mode. */ - ns87303_modify(config, ASC, 0, 0xc0); - -#ifdef PCI_FDC_SWAP_DRIVES - /* - * If only Floppy 1 is present, swap drives. - */ - if (!sun_floppy_types[0] && sun_floppy_types[1]) { - /* - * Set the drive exchange bit in FCR on NS87303, - * make sure other bits are sane before doing so. - */ - ns87303_modify(config, FER, FER_EDM, 0); - ns87303_modify(config, ASC, ASC_DRV2_SEL, 0); - ns87303_modify(config, FCR, 0, FCR_LDE); - - config = sun_floppy_types[0]; - sun_floppy_types[0] = sun_floppy_types[1]; - sun_floppy_types[1] = config; - - if (sun_pci_broken_drive != -1) { - sun_pci_broken_drive = 1 - sun_pci_broken_drive; - sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb; - } - } -#endif /* PCI_FDC_SWAP_DRIVES */ - - return sun_floppy_types[0]; -#else - return 0; -#endif - } - prom_getproperty(sdev->prom_node, "status", state, sizeof(state)); - if(!strncmp(state, "disabled", 8)) - return 0; - - /* - * We cannot do sbus_ioremap here: it does request_region, - * which the generic floppy driver tries to do once again. - * But we must use the sdev resource values as they have - * had parent ranges applied. - */ - sun_fdc = (struct sun_flpy_controller *) - (sdev->resource[0].start + - ((sdev->resource[0].flags & 0x1ffUL) << 32UL)); - - /* Last minute sanity check... */ - if(sbus_readb(&sun_fdc->status1_82077) == 0xff) { - sun_fdc = (struct sun_flpy_controller *)-1; - return 0; - } - - sun_fdops.fd_inb = sun_82077_fd_inb; - sun_fdops.fd_outb = sun_82077_fd_outb; - - can_use_virtual_dma = use_virtual_dma = 1; - sun_fdops.fd_enable_dma = sun_fd_enable_dma; - sun_fdops.fd_disable_dma = sun_fd_disable_dma; - sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode; - sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr; - sun_fdops.fd_set_dma_count = sun_fd_set_dma_count; - sun_fdops.get_dma_residue = sun_get_dma_residue; - - sun_fdops.fd_request_irq = sun_fd_request_irq; - sun_fdops.fd_free_irq = sun_fd_free_irq; - - sun_fdops.fd_eject = sun_fd_eject; - - fdc_status = (unsigned long) &sun_fdc->status_82077; - - /* Success... */ - allowed_drive_mask = 0x01; - sun_floppy_types[0] = 4; - sun_floppy_types[1] = 0; - - return sun_floppy_types[0]; -} - -#define EXTRA_FLOPPY_PARAMS - -static DEFINE_SPINLOCK(dma_spin_lock); - -#define claim_dma_lock() \ -({ unsigned long flags; \ - spin_lock_irqsave(&dma_spin_lock, flags); \ - flags; \ -}) - -#define release_dma_lock(__flags) \ - spin_unlock_irqrestore(&dma_spin_lock, __flags); - -#endif /* !(__ASM_SPARC64_FLOPPY_H) */ diff --git a/include/asm-sparc/fpumacro.h b/include/asm-sparc/fpumacro.h deleted file mode 100644 index cc463fe..0000000 --- a/include/asm-sparc/fpumacro.h +++ /dev/null @@ -1,33 +0,0 @@ -/* fpumacro.h: FPU related macros. - * - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC64_FPUMACRO_H -#define _SPARC64_FPUMACRO_H - -#include -#include - -struct fpustate { - u32 regs[64]; -}; - -#define FPUSTATE (struct fpustate *)(current_thread_info()->fpregs) - -static inline unsigned long fprs_read(void) -{ - unsigned long retval; - - __asm__ __volatile__("rd %%fprs, %0" : "=r" (retval)); - - return retval; -} - -static inline void fprs_write(unsigned long val) -{ - __asm__ __volatile__("wr %0, 0x0, %%fprs" : : "r" (val)); -} - -#endif /* !(_SPARC64_FPUMACRO_H) */ diff --git a/include/asm-sparc/futex.h b/include/asm-sparc/futex.h deleted file mode 100644 index c6a9f03..0000000 --- a/include/asm-sparc/futex.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_FUTEX_H -#define ___ASM_SPARC_FUTEX_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/futex_32.h b/include/asm-sparc/futex_32.h deleted file mode 100644 index 6a332a9..0000000 --- a/include/asm-sparc/futex_32.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include - -#endif diff --git a/include/asm-sparc/futex_64.h b/include/asm-sparc/futex_64.h deleted file mode 100644 index d837893..0000000 --- a/include/asm-sparc/futex_64.h +++ /dev/null @@ -1,110 +0,0 @@ -#ifndef _SPARC64_FUTEX_H -#define _SPARC64_FUTEX_H - -#include -#include -#include -#include - -#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \ - __asm__ __volatile__( \ - "\n1: lduwa [%3] %%asi, %2\n" \ - " " insn "\n" \ - "2: casa [%3] %%asi, %2, %1\n" \ - " cmp %2, %1\n" \ - " bne,pn %%icc, 1b\n" \ - " mov 0, %0\n" \ - "3:\n" \ - " .section .fixup,#alloc,#execinstr\n" \ - " .align 4\n" \ - "4: sethi %%hi(3b), %0\n" \ - " jmpl %0 + %%lo(3b), %%g0\n" \ - " mov %5, %0\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .word 1b, 4b\n" \ - " .word 2b, 4b\n" \ - " .previous\n" \ - : "=&r" (ret), "=&r" (oldval), "=&r" (tem) \ - : "r" (uaddr), "r" (oparg), "i" (-EFAULT) \ - : "memory") - -static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret, tem; - - if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))) - return -EFAULT; - if (unlikely((((unsigned long) uaddr) & 0x3UL))) - return -EINVAL; - - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: - __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ADD: - __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_OR: - __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ANDN: - __futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_XOR: - __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - default: - ret = -ENOSYS; - } - - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) -{ - __asm__ __volatile__( - "\n1: casa [%3] %%asi, %2, %0\n" - "2:\n" - " .section .fixup,#alloc,#execinstr\n" - " .align 4\n" - "3: sethi %%hi(2b), %0\n" - " jmpl %0 + %%lo(2b), %%g0\n" - " mov %4, %0\n" - " .previous\n" - " .section __ex_table,\"a\"\n" - " .align 4\n" - " .word 1b, 3b\n" - " .previous\n" - : "=r" (newval) - : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT) - : "memory"); - - return newval; -} - -#endif /* !(_SPARC64_FUTEX_H) */ diff --git a/include/asm-sparc/hardirq.h b/include/asm-sparc/hardirq.h deleted file mode 100644 index 1564787..0000000 --- a/include/asm-sparc/hardirq.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_HARDIRQ_H -#define ___ASM_SPARC_HARDIRQ_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/hardirq_32.h b/include/asm-sparc/hardirq_32.h deleted file mode 100644 index 4f63ed8..0000000 --- a/include/asm-sparc/hardirq_32.h +++ /dev/null @@ -1,23 +0,0 @@ -/* hardirq.h: 32-bit Sparc hard IRQ support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org) - */ - -#ifndef __SPARC_HARDIRQ_H -#define __SPARC_HARDIRQ_H - -#include -#include -#include - -/* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */ -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -#include /* Standard mappings for irq_cpustat_t above */ - -#define HARDIRQ_BITS 8 - -#endif /* __SPARC_HARDIRQ_H */ diff --git a/include/asm-sparc/hardirq_64.h b/include/asm-sparc/hardirq_64.h deleted file mode 100644 index 7c29fd1..0000000 --- a/include/asm-sparc/hardirq_64.h +++ /dev/null @@ -1,19 +0,0 @@ -/* hardirq.h: 64-bit Sparc hard IRQ support. - * - * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net) - */ - -#ifndef __SPARC64_HARDIRQ_H -#define __SPARC64_HARDIRQ_H - -#include - -#define __ARCH_IRQ_STAT -#define local_softirq_pending() \ - (local_cpu_data().__softirq_pending) - -void ack_bad_irq(unsigned int irq); - -#define HARDIRQ_BITS 8 - -#endif /* !(__SPARC64_HARDIRQ_H) */ diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h deleted file mode 100644 index 14652ab..0000000 --- a/include/asm-sparc/head.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_HEAD_H -#define ___ASM_SPARC_HEAD_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/head_32.h b/include/asm-sparc/head_32.h deleted file mode 100644 index 7c35491..0000000 --- a/include/asm-sparc/head_32.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef __SPARC_HEAD_H -#define __SPARC_HEAD_H - -#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */ -#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */ -#define SUN4C_SEGSZ (1 << 18) -#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */ -#define INTS_ENAB 0x01 /* entry.S uses this. */ - -#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */ - -#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */ -#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */ - -/* Here are some trap goodies */ - -/* Generic trap entry. */ -#define TRAP_ENTRY(type, label) \ - rd %psr, %l0; b label; rd %wim, %l3; nop; - -/* Data/text faults. Defaults to sun4c version at boot time. */ -#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7; -#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7; -#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; -#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; - -/* This is for traps we should NEVER get. */ -#define BAD_TRAP(num) \ - rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; - -/* This is for traps when we want just skip the instruction which caused it */ -#define SKIP_TRAP(type, name) \ - jmpl %l2, %g0; rett %l2 + 4; nop; nop; - -/* Notice that for the system calls we pull a trick. We load up a - * different pointer to the system call vector table in %l7, but call - * the same generic system call low-level entry point. The trap table - * entry sequences are also HyperSparc pipeline friendly ;-) - */ - -/* Software trap for Linux system calls. */ -#define LINUX_SYSCALL_TRAP \ - sethi %hi(sys_call_table), %l7; \ - or %l7, %lo(sys_call_table), %l7; \ - b linux_sparc_syscall; \ - rd %psr, %l0; - -#define BREAKPOINT_TRAP \ - b breakpoint_trap; \ - rd %psr,%l0; \ - nop; \ - nop; - -#ifdef CONFIG_KGDB -#define KGDB_TRAP(num) \ - b kgdb_trap_low; \ - rd %psr,%l0; \ - nop; \ - nop; -#else -#define KGDB_TRAP(num) \ - BAD_TRAP(num) -#endif - -/* The Get Condition Codes software trap for userland. */ -#define GETCC_TRAP \ - b getcc_trap_handler; mov %psr, %l0; nop; nop; - -/* The Set Condition Codes software trap for userland. */ -#define SETCC_TRAP \ - b setcc_trap_handler; mov %psr, %l0; nop; nop; - -/* The Get PSR software trap for userland. */ -#define GETPSR_TRAP \ - mov %psr, %i0; jmp %l2; rett %l2 + 4; nop; - -/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and - * gets handled with another macro. - */ -#define TRAP_ENTRY_INTERRUPT(int_level) \ - mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; - -/* NMI's (Non Maskable Interrupts) are special, you can't keep them - * from coming in, and basically if you get one, the shows over. ;( - * On the sun4c they are usually asynchronous memory errors, on the - * the sun4m they could be either due to mem errors or a software - * initiated interrupt from the prom/kern on an SMP box saying "I - * command you to do CPU tricks, read your mailbox for more info." - */ -#define NMI_TRAP \ - rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop; - -/* Window overflows/underflows are special and we need to try to be as - * efficient as possible here.... - */ -#define WINDOW_SPILL \ - rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; - -#define WINDOW_FILL \ - rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; - -#endif /* __SPARC_HEAD_H */ diff --git a/include/asm-sparc/head_64.h b/include/asm-sparc/head_64.h deleted file mode 100644 index 10e9dab..0000000 --- a/include/asm-sparc/head_64.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _SPARC64_HEAD_H -#define _SPARC64_HEAD_H - -#include - - /* wrpr %g0, val, %gl */ -#define SET_GL(val) \ - .word 0xa1902000 | val - - /* rdpr %gl, %gN */ -#define GET_GL_GLOBAL(N) \ - .word 0x81540000 | (N << 25) - -#define KERNBASE 0x400000 - -#define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ) - -#define __CHEETAH_ID 0x003e0014 -#define __JALAPENO_ID 0x003e0016 -#define __SERRANO_ID 0x003e0022 - -#define CHEETAH_MANUF 0x003e -#define CHEETAH_IMPL 0x0014 /* Ultra-III */ -#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ -#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ -#define JAGUAR_IMPL 0x0018 /* Ultra-IV */ -#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ -#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ - -#define BRANCH_IF_SUN4V(tmp1,label) \ - sethi %hi(is_sun4v), %tmp1; \ - lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \ - brnz,pn %tmp1, label; \ - nop - -#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - sethi %hi(__CHEETAH_ID), %tmp2; \ - srlx %tmp1, 32, %tmp1; \ - or %tmp2, %lo(__CHEETAH_ID), %tmp2;\ - cmp %tmp1, %tmp2; \ - be,pn %icc, label; \ - nop; - -#define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - sethi %hi(__JALAPENO_ID), %tmp2; \ - srlx %tmp1, 32, %tmp1; \ - or %tmp2, %lo(__JALAPENO_ID), %tmp2;\ - cmp %tmp1, %tmp2; \ - be,pn %icc, label; \ - nop; - -#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_MANUF; \ - bne,pt %xcc, 99f; \ - sllx %tmp1, 16, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_PLUS_IMPL; \ - bgeu,pt %xcc, label; \ -99: nop; - -#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_MANUF; \ - bne,pt %xcc, 99f; \ - sllx %tmp1, 16, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_IMPL; \ - bgeu,pt %xcc, label; \ -99: nop; - -#endif /* !(_SPARC64_HEAD_H) */ diff --git a/include/asm-sparc/highmem.h b/include/asm-sparc/highmem.h deleted file mode 100644 index 3de42e7..0000000 --- a/include/asm-sparc/highmem.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * highmem.h: virtual kernel memory mappings for high memory - * - * Used in CONFIG_HIGHMEM systems for memory pages which - * are not addressable by direct kernel virtual addresses. - * - * Copyright (C) 1999 Gerhard Wichert, Siemens AG - * Gerhard.Wichert@pdb.siemens.de - * - * - * Redesigned the x86 32-bit VM architecture to deal with - * up to 16 Terrabyte physical memory. With current x86 CPUs - * we now support up to 64 Gigabytes physical RAM. - * - * Copyright (C) 1999 Ingo Molnar - */ - -#ifndef _ASM_HIGHMEM_H -#define _ASM_HIGHMEM_H - -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -/* declarations for highmem.c */ -extern unsigned long highstart_pfn, highend_pfn; - -extern pte_t *kmap_pte; -extern pgprot_t kmap_prot; -extern pte_t *pkmap_page_table; - -extern void kmap_init(void) __init; - -/* - * Right now we initialize only a single pte table. It can be extended - * easily, subsequent pte tables have to be allocated in one physical - * chunk of RAM. Currently the simplest way to do this is to align the - * pkmap region on a pagetable boundary (4MB). - */ -#define LAST_PKMAP 1024 -#define PKMAP_SIZE (LAST_PKMAP << PAGE_SHIFT) -#define PKMAP_BASE PMD_ALIGN(SRMMU_NOCACHE_VADDR + (SRMMU_MAX_NOCACHE_PAGES << PAGE_SHIFT)) - -#define LAST_PKMAP_MASK (LAST_PKMAP - 1) -#define PKMAP_NR(virt) ((virt - PKMAP_BASE) >> PAGE_SHIFT) -#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) - -#define PKMAP_END (PKMAP_ADDR(LAST_PKMAP)) - -extern void *kmap_high(struct page *page); -extern void kunmap_high(struct page *page); - -static inline void *kmap(struct page *page) -{ - BUG_ON(in_interrupt()); - if (!PageHighMem(page)) - return page_address(page); - return kmap_high(page); -} - -static inline void kunmap(struct page *page) -{ - BUG_ON(in_interrupt()); - if (!PageHighMem(page)) - return; - kunmap_high(page); -} - -extern void *kmap_atomic(struct page *page, enum km_type type); -extern void kunmap_atomic(void *kvaddr, enum km_type type); -extern struct page *kmap_atomic_to_page(void *vaddr); - -#define flush_cache_kmaps() flush_cache_all() - -#endif /* __KERNEL__ */ - -#endif /* _ASM_HIGHMEM_H */ diff --git a/include/asm-sparc/hugetlb.h b/include/asm-sparc/hugetlb.h deleted file mode 100644 index 1770610..0000000 --- a/include/asm-sparc/hugetlb.h +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef _ASM_SPARC64_HUGETLB_H -#define _ASM_SPARC64_HUGETLB_H - -#include - - -void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte); - -pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, - pte_t *ptep); - -void hugetlb_prefault_arch_hook(struct mm_struct *mm); - -static inline int is_hugepage_only_range(struct mm_struct *mm, - unsigned long addr, - unsigned long len) { - return 0; -} - -/* - * If the arch doesn't supply something else, assume that hugepage - * size aligned regions are ok without further preparation. - */ -static inline int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len) -{ - if (len & ~HPAGE_MASK) - return -EINVAL; - if (addr & ~HPAGE_MASK) - return -EINVAL; - return 0; -} - -static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb, - unsigned long addr, unsigned long end, - unsigned long floor, - unsigned long ceiling) -{ - free_pgd_range(tlb, addr, end, floor, ceiling); -} - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -} - -static inline int huge_pte_none(pte_t pte) -{ - return pte_none(pte); -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - return pte_wrprotect(pte); -} - -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - ptep_set_wrprotect(mm, addr, ptep); -} - -static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); -} - -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - return *ptep; -} - -static inline int arch_prepare_hugepage(struct page *page) -{ - return 0; -} - -static inline void arch_release_hugepage(struct page *page) -{ -} - -#endif /* _ASM_SPARC64_HUGETLB_H */ diff --git a/include/asm-sparc/hvtramp.h b/include/asm-sparc/hvtramp.h deleted file mode 100644 index b2b9b94..0000000 --- a/include/asm-sparc/hvtramp.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef _SPARC64_HVTRAP_H -#define _SPARC64_HVTRAP_H - -#ifndef __ASSEMBLY__ - -#include - -struct hvtramp_mapping { - __u64 vaddr; - __u64 tte; -}; - -struct hvtramp_descr { - __u32 cpu; - __u32 num_mappings; - __u64 fault_info_va; - __u64 fault_info_pa; - __u64 thread_reg; - struct hvtramp_mapping maps[1]; -}; - -extern void hv_cpu_startup(unsigned long hvdescr_pa); - -#endif - -#define HVTRAMP_DESCR_CPU 0x00 -#define HVTRAMP_DESCR_NUM_MAPPINGS 0x04 -#define HVTRAMP_DESCR_FAULT_INFO_VA 0x08 -#define HVTRAMP_DESCR_FAULT_INFO_PA 0x10 -#define HVTRAMP_DESCR_THREAD_REG 0x18 -#define HVTRAMP_DESCR_MAPS 0x20 - -#define HVTRAMP_MAPPING_VADDR 0x00 -#define HVTRAMP_MAPPING_TTE 0x08 -#define HVTRAMP_MAPPING_SIZE 0x10 - -#endif /* _SPARC64_HVTRAP_H */ diff --git a/include/asm-sparc/hw_irq.h b/include/asm-sparc/hw_irq.h deleted file mode 100644 index 8d30a76..0000000 --- a/include/asm-sparc/hw_irq.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SPARC_HW_IRQ_H -#define __ASM_SPARC_HW_IRQ_H - -/* Dummy include. */ - -#endif diff --git a/include/asm-sparc/hypervisor.h b/include/asm-sparc/hypervisor.h deleted file mode 100644 index 109ae24..0000000 --- a/include/asm-sparc/hypervisor.h +++ /dev/null @@ -1,2949 +0,0 @@ -#ifndef _SPARC64_HYPERVISOR_H -#define _SPARC64_HYPERVISOR_H - -/* Sun4v hypervisor interfaces and defines. - * - * Hypervisor calls are made via traps to software traps number 0x80 - * and above. Registers %o0 to %o5 serve as argument, status, and - * return value registers. - * - * There are two kinds of these traps. First there are the normal - * "fast traps" which use software trap 0x80 and encode the function - * to invoke by number in register %o5. Argument and return value - * handling is as follows: - * - * ----------------------------------------------- - * | %o5 | function number | undefined | - * | %o0 | argument 0 | return status | - * | %o1 | argument 1 | return value 1 | - * | %o2 | argument 2 | return value 2 | - * | %o3 | argument 3 | return value 3 | - * | %o4 | argument 4 | return value 4 | - * ----------------------------------------------- - * - * The second type are "hyper-fast traps" which encode the function - * number in the software trap number itself. So these use trap - * numbers > 0x80. The register usage for hyper-fast traps is as - * follows: - * - * ----------------------------------------------- - * | %o0 | argument 0 | return status | - * | %o1 | argument 1 | return value 1 | - * | %o2 | argument 2 | return value 2 | - * | %o3 | argument 3 | return value 3 | - * | %o4 | argument 4 | return value 4 | - * ----------------------------------------------- - * - * Registers providing explicit arguments to the hypervisor calls - * are volatile across the call. Upon return their values are - * undefined unless explicitly specified as containing a particular - * return value by the specific call. The return status is always - * returned in register %o0, zero indicates a successful execution of - * the hypervisor call and other values indicate an error status as - * defined below. So, for example, if a hyper-fast trap takes - * arguments 0, 1, and 2, then %o0, %o1, and %o2 are volatile across - * the call and %o3, %o4, and %o5 would be preserved. - * - * If the hypervisor trap is invalid, or the fast trap function number - * is invalid, HV_EBADTRAP will be returned in %o0. Also, all 64-bits - * of the argument and return values are significant. - */ - -/* Trap numbers. */ -#define HV_FAST_TRAP 0x80 -#define HV_MMU_MAP_ADDR_TRAP 0x83 -#define HV_MMU_UNMAP_ADDR_TRAP 0x84 -#define HV_TTRACE_ADDENTRY_TRAP 0x85 -#define HV_CORE_TRAP 0xff - -/* Error codes. */ -#define HV_EOK 0 /* Successful return */ -#define HV_ENOCPU 1 /* Invalid CPU id */ -#define HV_ENORADDR 2 /* Invalid real address */ -#define HV_ENOINTR 3 /* Invalid interrupt id */ -#define HV_EBADPGSZ 4 /* Invalid pagesize encoding */ -#define HV_EBADTSB 5 /* Invalid TSB description */ -#define HV_EINVAL 6 /* Invalid argument */ -#define HV_EBADTRAP 7 /* Invalid function number */ -#define HV_EBADALIGN 8 /* Invalid address alignment */ -#define HV_EWOULDBLOCK 9 /* Cannot complete w/o blocking */ -#define HV_ENOACCESS 10 /* No access to resource */ -#define HV_EIO 11 /* I/O error */ -#define HV_ECPUERROR 12 /* CPU in error state */ -#define HV_ENOTSUPPORTED 13 /* Function not supported */ -#define HV_ENOMAP 14 /* No mapping found */ -#define HV_ETOOMANY 15 /* Too many items specified */ -#define HV_ECHANNEL 16 /* Invalid LDC channel */ -#define HV_EBUSY 17 /* Resource busy */ - -/* mach_exit() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_EXIT - * ARG0: exit code - * ERRORS: This service does not return. - * - * Stop all CPUs in the virtual domain and place them into the stopped - * state. The 64-bit exit code may be passed to a service entity as - * the domain's exit status. On systems without a service entity, the - * domain will undergo a reset, and the boot firmware will be - * reloaded. - * - * This function will never return to the guest that invokes it. - * - * Note: By convention an exit code of zero denotes a successful exit by - * the guest code. A non-zero exit code denotes a guest specific - * error indication. - * - */ -#define HV_FAST_MACH_EXIT 0x00 - -#ifndef __ASSEMBLY__ -extern void sun4v_mach_exit(unsigned long exit_code); -#endif - -/* Domain services. */ - -/* mach_desc() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_DESC - * ARG0: buffer - * ARG1: length - * RET0: status - * RET1: length - * ERRORS: HV_EBADALIGN Buffer is badly aligned - * HV_ENORADDR Buffer is to an illegal real address. - * HV_EINVAL Buffer length is too small for complete - * machine description. - * - * Copy the most current machine description into the buffer indicated - * by the real address in ARG0. The buffer provided must be 16 byte - * aligned. Upon success or HV_EINVAL, this service returns the - * actual size of the machine description in the RET1 return value. - * - * Note: A method of determining the appropriate buffer size for the - * machine description is to first call this service with a buffer - * length of 0 bytes. - */ -#define HV_FAST_MACH_DESC 0x01 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mach_desc(unsigned long buffer_pa, - unsigned long buf_len, - unsigned long *real_buf_len); -#endif - -/* mach_sir() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_SIR - * ERRORS: This service does not return. - * - * Perform a software initiated reset of the virtual machine domain. - * All CPUs are captured as soon as possible, all hardware devices are - * returned to the entry default state, and the domain is restarted at - * the SIR (trap type 0x04) real trap table (RTBA) entry point on one - * of the CPUs. The single CPU restarted is selected as determined by - * platform specific policy. Memory is preserved across this - * operation. - */ -#define HV_FAST_MACH_SIR 0x02 - -#ifndef __ASSEMBLY__ -extern void sun4v_mach_sir(void); -#endif - -/* mach_set_watchdog() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_SET_WATCHDOG - * ARG0: timeout in milliseconds - * RET0: status - * RET1: time remaining in milliseconds - * - * A guest uses this API to set a watchdog timer. Once the gues has set - * the timer, it must call the timer service again either to disable or - * postpone the expiration. If the timer expires before being reset or - * disabled, then the hypervisor take a platform specific action leading - * to guest termination within a bounded time period. The platform action - * may include recovery actions such as reporting the expiration to a - * Service Processor, and/or automatically restarting the gues. - * - * The 'timeout' parameter is specified in milliseconds, however the - * implementated granularity is given by the 'watchdog-resolution' - * property in the 'platform' node of the guest's machine description. - * The largest allowed timeout value is specified by the - * 'watchdog-max-timeout' property of the 'platform' node. - * - * If the 'timeout' argument is not zero, the watchdog timer is set to - * expire after a minimum of 'timeout' milliseconds. - * - * If the 'timeout' argument is zero, the watchdog timer is disabled. - * - * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout' - * property, the hypervisor leaves the watchdog timer state unchanged, - * and returns a status of EINVAL. - * - * The 'time remaining' return value is valid regardless of whether the - * return status is EOK or EINVAL. A non-zero return value indicates the - * number of milliseconds that were remaining until the timer was to expire. - * If less than one millisecond remains, the return value is '1'. If the - * watchdog timer was disabled at the time of the call, the return value is - * zero. - * - * If the hypervisor cannot support the exact timeout value requested, but - * can support a larger timeout value, the hypervisor may round the actual - * timeout to a value larger than the requested timeout, consequently the - * 'time remaining' return value may be larger than the previously requested - * timeout value. - * - * Any guest OS debugger should be aware that the watchdog service may be in - * use. Consequently, it is recommended that the watchdog service is - * disabled upon debugger entry (e.g. reaching a breakpoint), and then - * re-enabled upon returning to normal execution. The API has been designed - * with this in mind, and the 'time remaining' result of the disable call may - * be used directly as the timeout argument of the re-enable call. - */ -#define HV_FAST_MACH_SET_WATCHDOG 0x05 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout, - unsigned long *orig_timeout); -#endif - -/* CPU services. - * - * CPUs represent devices that can execute software threads. A single - * chip that contains multiple cores or strands is represented as - * multiple CPUs with unique CPU identifiers. CPUs are exported to - * OBP via the machine description (and to the OS via the OBP device - * tree). CPUs are always in one of three states: stopped, running, - * or error. - * - * A CPU ID is a pre-assigned 16-bit value that uniquely identifies a - * CPU within a logical domain. Operations that are to be performed - * on multiple CPUs specify them via a CPU list. A CPU list is an - * array in real memory, of which each 16-bit word is a CPU ID. CPU - * lists are passed through the API as two arguments. The first is - * the number of entries (16-bit words) in the CPU list, and the - * second is the (real address) pointer to the CPU ID list. - */ - -/* cpu_start() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_START - * ARG0: CPU ID - * ARG1: PC - * ARG2: RTBA - * ARG3: target ARG0 - * RET0: status - * ERRORS: ENOCPU Invalid CPU ID - * EINVAL Target CPU ID is not in the stopped state - * ENORADDR Invalid PC or RTBA real address - * EBADALIGN Unaligned PC or unaligned RTBA - * EWOULDBLOCK Starting resources are not available - * - * Start CPU with given CPU ID with PC in %pc and with a real trap - * base address value of RTBA. The indicated CPU must be in the - * stopped state. The supplied RTBA must be aligned on a 256 byte - * boundary. On successful completion, the specified CPU will be in - * the running state and will be supplied with "target ARG0" in %o0 - * and RTBA in %tba. - */ -#define HV_FAST_CPU_START 0x10 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_cpu_start(unsigned long cpuid, - unsigned long pc, - unsigned long rtba, - unsigned long arg0); -#endif - -/* cpu_stop() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_STOP - * ARG0: CPU ID - * RET0: status - * ERRORS: ENOCPU Invalid CPU ID - * EINVAL Target CPU ID is the current cpu - * EINVAL Target CPU ID is not in the running state - * EWOULDBLOCK Stopping resources are not available - * ENOTSUPPORTED Not supported on this platform - * - * The specified CPU is stopped. The indicated CPU must be in the - * running state. On completion, it will be in the stopped state. It - * is not legal to stop the current CPU. - * - * Note: As this service cannot be used to stop the current cpu, this service - * may not be used to stop the last running CPU in a domain. To stop - * and exit a running domain, a guest must use the mach_exit() service. - */ -#define HV_FAST_CPU_STOP 0x11 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_cpu_stop(unsigned long cpuid); -#endif - -/* cpu_yield() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_YIELD - * RET0: status - * ERRORS: No possible error. - * - * Suspend execution on the current CPU. Execution will resume when - * an interrupt (device, %stick_compare, or cross-call) is targeted to - * the CPU. On some CPUs, this API may be used by the hypervisor to - * save power by disabling hardware strands. - */ -#define HV_FAST_CPU_YIELD 0x12 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_cpu_yield(void); -#endif - -/* cpu_qconf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_QCONF - * ARG0: queue - * ARG1: base real address - * ARG2: number of entries - * RET0: status - * ERRORS: ENORADDR Invalid base real address - * EINVAL Invalid queue or number of entries is less - * than 2 or too large. - * EBADALIGN Base real address is not correctly aligned - * for size. - * - * Configure the given queue to be placed at the given base real - * address, with the given number of entries. The number of entries - * must be a power of 2. The base real address must be aligned - * exactly to match the queue size. Each queue entry is 64 bytes - * long, so for example a 32 entry queue must be aligned on a 2048 - * byte real address boundary. - * - * The specified queue is unconfigured if the number of entries is given - * as zero. - * - * For the current version of this API service, the argument queue is defined - * as follows: - * - * queue description - * ----- ------------------------- - * 0x3c cpu mondo queue - * 0x3d device mondo queue - * 0x3e resumable error queue - * 0x3f non-resumable error queue - * - * Note: The maximum number of entries for each queue for a specific cpu may - * be determined from the machine description. - */ -#define HV_FAST_CPU_QCONF 0x14 -#define HV_CPU_QUEUE_CPU_MONDO 0x3c -#define HV_CPU_QUEUE_DEVICE_MONDO 0x3d -#define HV_CPU_QUEUE_RES_ERROR 0x3e -#define HV_CPU_QUEUE_NONRES_ERROR 0x3f - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_cpu_qconf(unsigned long type, - unsigned long queue_paddr, - unsigned long num_queue_entries); -#endif - -/* cpu_qinfo() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_QINFO - * ARG0: queue - * RET0: status - * RET1: base real address - * RET1: number of entries - * ERRORS: EINVAL Invalid queue - * - * Return the configuration info for the given queue. The base real - * address and number of entries of the defined queue are returned. - * The queue argument values are the same as for cpu_qconf() above. - * - * If the specified queue is a valid queue number, but no queue has - * been defined, the number of entries will be set to zero and the - * base real address returned is undefined. - */ -#define HV_FAST_CPU_QINFO 0x15 - -/* cpu_mondo_send() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_MONDO_SEND - * ARG0-1: CPU list - * ARG2: data real address - * RET0: status - * ERRORS: EBADALIGN Mondo data is not 64-byte aligned or CPU list - * is not 2-byte aligned. - * ENORADDR Invalid data mondo address, or invalid cpu list - * address. - * ENOCPU Invalid cpu in CPU list - * EWOULDBLOCK Some or all of the listed CPUs did not receive - * the mondo - * ECPUERROR One or more of the listed CPUs are in error - * state, use HV_FAST_CPU_STATE to see which ones - * EINVAL CPU list includes caller's CPU ID - * - * Send a mondo interrupt to the CPUs in the given CPU list with the - * 64-bytes at the given data real address. The data must be 64-byte - * aligned. The mondo data will be delivered to the cpu_mondo queues - * of the recipient CPUs. - * - * In all cases, error or not, the CPUs in the CPU list to which the - * mondo has been successfully delivered will be indicated by having - * their entry in CPU list updated with the value 0xffff. - */ -#define HV_FAST_CPU_MONDO_SEND 0x42 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_cpu_mondo_send(unsigned long cpu_count, unsigned long cpu_list_pa, unsigned long mondo_block_pa); -#endif - -/* cpu_myid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_MYID - * RET0: status - * RET1: CPU ID - * ERRORS: No errors defined. - * - * Return the hypervisor ID handle for the current CPU. Use by a - * virtual CPU to discover it's own identity. - */ -#define HV_FAST_CPU_MYID 0x16 - -/* cpu_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_STATE - * ARG0: CPU ID - * RET0: status - * RET1: state - * ERRORS: ENOCPU Invalid CPU ID - * - * Retrieve the current state of the CPU with the given CPU ID. - */ -#define HV_FAST_CPU_STATE 0x17 -#define HV_CPU_STATE_STOPPED 0x01 -#define HV_CPU_STATE_RUNNING 0x02 -#define HV_CPU_STATE_ERROR 0x03 - -#ifndef __ASSEMBLY__ -extern long sun4v_cpu_state(unsigned long cpuid); -#endif - -/* cpu_set_rtba() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_SET_RTBA - * ARG0: RTBA - * RET0: status - * RET1: previous RTBA - * ERRORS: ENORADDR Invalid RTBA real address - * EBADALIGN RTBA is incorrectly aligned for a trap table - * - * Set the real trap base address of the local cpu to the given RTBA. - * The supplied RTBA must be aligned on a 256 byte boundary. Upon - * success the previous value of the RTBA is returned in RET1. - * - * Note: This service does not affect %tba - */ -#define HV_FAST_CPU_SET_RTBA 0x18 - -/* cpu_set_rtba() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CPU_GET_RTBA - * RET0: status - * RET1: previous RTBA - * ERRORS: No possible error. - * - * Returns the current value of RTBA in RET1. - */ -#define HV_FAST_CPU_GET_RTBA 0x19 - -/* MMU services. - * - * Layout of a TSB description for mmu_tsb_ctx{,non}0() calls. - */ -#ifndef __ASSEMBLY__ -struct hv_tsb_descr { - unsigned short pgsz_idx; - unsigned short assoc; - unsigned int num_ttes; /* in TTEs */ - unsigned int ctx_idx; - unsigned int pgsz_mask; - unsigned long tsb_base; - unsigned long resv; -}; -#endif -#define HV_TSB_DESCR_PGSZ_IDX_OFFSET 0x00 -#define HV_TSB_DESCR_ASSOC_OFFSET 0x02 -#define HV_TSB_DESCR_NUM_TTES_OFFSET 0x04 -#define HV_TSB_DESCR_CTX_IDX_OFFSET 0x08 -#define HV_TSB_DESCR_PGSZ_MASK_OFFSET 0x0c -#define HV_TSB_DESCR_TSB_BASE_OFFSET 0x10 -#define HV_TSB_DESCR_RESV_OFFSET 0x18 - -/* Page size bitmask. */ -#define HV_PGSZ_MASK_8K (1 << 0) -#define HV_PGSZ_MASK_64K (1 << 1) -#define HV_PGSZ_MASK_512K (1 << 2) -#define HV_PGSZ_MASK_4MB (1 << 3) -#define HV_PGSZ_MASK_32MB (1 << 4) -#define HV_PGSZ_MASK_256MB (1 << 5) -#define HV_PGSZ_MASK_2GB (1 << 6) -#define HV_PGSZ_MASK_16GB (1 << 7) - -/* Page size index. The value given in the TSB descriptor must correspond - * to the smallest page size specified in the pgsz_mask page size bitmask. - */ -#define HV_PGSZ_IDX_8K 0 -#define HV_PGSZ_IDX_64K 1 -#define HV_PGSZ_IDX_512K 2 -#define HV_PGSZ_IDX_4MB 3 -#define HV_PGSZ_IDX_32MB 4 -#define HV_PGSZ_IDX_256MB 5 -#define HV_PGSZ_IDX_2GB 6 -#define HV_PGSZ_IDX_16GB 7 - -/* MMU fault status area. - * - * MMU related faults have their status and fault address information - * placed into a memory region made available by privileged code. Each - * virtual processor must make a mmu_fault_area_conf() call to tell the - * hypervisor where that processor's fault status should be stored. - * - * The fault status block is a multiple of 64-bytes and must be aligned - * on a 64-byte boundary. - */ -#ifndef __ASSEMBLY__ -struct hv_fault_status { - unsigned long i_fault_type; - unsigned long i_fault_addr; - unsigned long i_fault_ctx; - unsigned long i_reserved[5]; - unsigned long d_fault_type; - unsigned long d_fault_addr; - unsigned long d_fault_ctx; - unsigned long d_reserved[5]; -}; -#endif -#define HV_FAULT_I_TYPE_OFFSET 0x00 -#define HV_FAULT_I_ADDR_OFFSET 0x08 -#define HV_FAULT_I_CTX_OFFSET 0x10 -#define HV_FAULT_D_TYPE_OFFSET 0x40 -#define HV_FAULT_D_ADDR_OFFSET 0x48 -#define HV_FAULT_D_CTX_OFFSET 0x50 - -#define HV_FAULT_TYPE_FAST_MISS 1 -#define HV_FAULT_TYPE_FAST_PROT 2 -#define HV_FAULT_TYPE_MMU_MISS 3 -#define HV_FAULT_TYPE_INV_RA 4 -#define HV_FAULT_TYPE_PRIV_VIOL 5 -#define HV_FAULT_TYPE_PROT_VIOL 6 -#define HV_FAULT_TYPE_NFO 7 -#define HV_FAULT_TYPE_NFO_SEFF 8 -#define HV_FAULT_TYPE_INV_VA 9 -#define HV_FAULT_TYPE_INV_ASI 10 -#define HV_FAULT_TYPE_NC_ATOMIC 11 -#define HV_FAULT_TYPE_PRIV_ACT 12 -#define HV_FAULT_TYPE_RESV1 13 -#define HV_FAULT_TYPE_UNALIGNED 14 -#define HV_FAULT_TYPE_INV_PGSZ 15 -/* Values 16 --> -2 are reserved. */ -#define HV_FAULT_TYPE_MULTIPLE -1 - -/* Flags argument for mmu_{map,unmap}_addr(), mmu_demap_{page,context,all}(), - * and mmu_{map,unmap}_perm_addr(). - */ -#define HV_MMU_DMMU 0x01 -#define HV_MMU_IMMU 0x02 -#define HV_MMU_ALL (HV_MMU_DMMU | HV_MMU_IMMU) - -/* mmu_map_addr() - * TRAP: HV_MMU_MAP_ADDR_TRAP - * ARG0: virtual address - * ARG1: mmu context - * ARG2: TTE - * ARG3: flags (HV_MMU_{IMMU,DMMU}) - * ERRORS: EINVAL Invalid virtual address, mmu context, or flags - * EBADPGSZ Invalid page size value - * ENORADDR Invalid real address in TTE - * - * Create a non-permanent mapping using the given TTE, virtual - * address, and mmu context. The flags argument determines which - * (data, or instruction, or both) TLB the mapping gets loaded into. - * - * The behavior is undefined if the valid bit is clear in the TTE. - * - * Note: This API call is for privileged code to specify temporary translation - * mappings without the need to create and manage a TSB. - */ - -/* mmu_unmap_addr() - * TRAP: HV_MMU_UNMAP_ADDR_TRAP - * ARG0: virtual address - * ARG1: mmu context - * ARG2: flags (HV_MMU_{IMMU,DMMU}) - * ERRORS: EINVAL Invalid virtual address, mmu context, or flags - * - * Demaps the given virtual address in the given mmu context on this - * CPU. This function is intended to be used to demap pages mapped - * with mmu_map_addr. This service is equivalent to invoking - * mmu_demap_page() with only the current CPU in the CPU list. The - * flags argument determines which (data, or instruction, or both) TLB - * the mapping gets unmapped from. - * - * Attempting to perform an unmap operation for a previously defined - * permanent mapping will have undefined results. - */ - -/* mmu_tsb_ctx0() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_TSB_CTX0 - * ARG0: number of TSB descriptions - * ARG1: TSB descriptions pointer - * RET0: status - * ERRORS: ENORADDR Invalid TSB descriptions pointer or - * TSB base within a descriptor - * EBADALIGN TSB descriptions pointer is not aligned - * to an 8-byte boundary, or TSB base - * within a descriptor is not aligned for - * the given TSB size - * EBADPGSZ Invalid page size in a TSB descriptor - * EBADTSB Invalid associativity or size in a TSB - * descriptor - * EINVAL Invalid number of TSB descriptions, or - * invalid context index in a TSB - * descriptor, or index page size not - * equal to smallest page size in page - * size bitmask field. - * - * Configures the TSBs for the current CPU for virtual addresses with - * context zero. The TSB descriptions pointer is a pointer to an - * array of the given number of TSB descriptions. - * - * Note: The maximum number of TSBs available to a virtual CPU is given by the - * mmu-max-#tsbs property of the cpu's corresponding "cpu" node in the - * machine description. - */ -#define HV_FAST_MMU_TSB_CTX0 0x20 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, - unsigned long tsb_desc_ra); -#endif - -/* mmu_tsb_ctxnon0() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_TSB_CTXNON0 - * ARG0: number of TSB descriptions - * ARG1: TSB descriptions pointer - * RET0: status - * ERRORS: Same as for mmu_tsb_ctx0() above. - * - * Configures the TSBs for the current CPU for virtual addresses with - * non-zero contexts. The TSB descriptions pointer is a pointer to an - * array of the given number of TSB descriptions. - * - * Note: A maximum of 16 TSBs may be specified in the TSB description list. - */ -#define HV_FAST_MMU_TSB_CTXNON0 0x21 - -/* mmu_demap_page() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_DEMAP_PAGE - * ARG0: reserved, must be zero - * ARG1: reserved, must be zero - * ARG2: virtual address - * ARG3: mmu context - * ARG4: flags (HV_MMU_{IMMU,DMMU}) - * RET0: status - * ERRORS: EINVAL Invalid virutal address, context, or - * flags value - * ENOTSUPPORTED ARG0 or ARG1 is non-zero - * - * Demaps any page mapping of the given virtual address in the given - * mmu context for the current virtual CPU. Any virtually tagged - * caches are guaranteed to be kept consistent. The flags argument - * determines which TLB (instruction, or data, or both) participate in - * the operation. - * - * ARG0 and ARG1 are both reserved and must be set to zero. - */ -#define HV_FAST_MMU_DEMAP_PAGE 0x22 - -/* mmu_demap_ctx() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_DEMAP_CTX - * ARG0: reserved, must be zero - * ARG1: reserved, must be zero - * ARG2: mmu context - * ARG3: flags (HV_MMU_{IMMU,DMMU}) - * RET0: status - * ERRORS: EINVAL Invalid context or flags value - * ENOTSUPPORTED ARG0 or ARG1 is non-zero - * - * Demaps all non-permanent virtual page mappings previously specified - * for the given context for the current virtual CPU. Any virtual - * tagged caches are guaranteed to be kept consistent. The flags - * argument determines which TLB (instruction, or data, or both) - * participate in the operation. - * - * ARG0 and ARG1 are both reserved and must be set to zero. - */ -#define HV_FAST_MMU_DEMAP_CTX 0x23 - -/* mmu_demap_all() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_DEMAP_ALL - * ARG0: reserved, must be zero - * ARG1: reserved, must be zero - * ARG2: flags (HV_MMU_{IMMU,DMMU}) - * RET0: status - * ERRORS: EINVAL Invalid flags value - * ENOTSUPPORTED ARG0 or ARG1 is non-zero - * - * Demaps all non-permanent virtual page mappings previously specified - * for the current virtual CPU. Any virtual tagged caches are - * guaranteed to be kept consistent. The flags argument determines - * which TLB (instruction, or data, or both) participate in the - * operation. - * - * ARG0 and ARG1 are both reserved and must be set to zero. - */ -#define HV_FAST_MMU_DEMAP_ALL 0x24 - -#ifndef __ASSEMBLY__ -extern void sun4v_mmu_demap_all(void); -#endif - -/* mmu_map_perm_addr() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_MAP_PERM_ADDR - * ARG0: virtual address - * ARG1: reserved, must be zero - * ARG2: TTE - * ARG3: flags (HV_MMU_{IMMU,DMMU}) - * RET0: status - * ERRORS: EINVAL Invalid virutal address or flags value - * EBADPGSZ Invalid page size value - * ENORADDR Invalid real address in TTE - * ETOOMANY Too many mappings (max of 8 reached) - * - * Create a permanent mapping using the given TTE and virtual address - * for context 0 on the calling virtual CPU. A maximum of 8 such - * permanent mappings may be specified by privileged code. Mappings - * may be removed with mmu_unmap_perm_addr(). - * - * The behavior is undefined if a TTE with the valid bit clear is given. - * - * Note: This call is used to specify address space mappings for which - * privileged code does not expect to receive misses. For example, - * this mechanism can be used to map kernel nucleus code and data. - */ -#define HV_FAST_MMU_MAP_PERM_ADDR 0x25 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr, - unsigned long set_to_zero, - unsigned long tte, - unsigned long flags); -#endif - -/* mmu_fault_area_conf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF - * ARG0: real address - * RET0: status - * RET1: previous mmu fault area real address - * ERRORS: ENORADDR Invalid real address - * EBADALIGN Invalid alignment for fault area - * - * Configure the MMU fault status area for the calling CPU. A 64-byte - * aligned real address specifies where MMU fault status information - * is placed. The return value is the previously specified area, or 0 - * for the first invocation. Specifying a fault area at real address - * 0 is not allowed. - */ -#define HV_FAST_MMU_FAULT_AREA_CONF 0x26 - -/* mmu_enable() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_ENABLE - * ARG0: enable flag - * ARG1: return target address - * RET0: status - * ERRORS: ENORADDR Invalid real address when disabling - * translation. - * EBADALIGN The return target address is not - * aligned to an instruction. - * EINVAL The enable flag request the current - * operating mode (e.g. disable if already - * disabled) - * - * Enable or disable virtual address translation for the calling CPU - * within the virtual machine domain. If the enable flag is zero, - * translation is disabled, any non-zero value will enable - * translation. - * - * When this function returns, the newly selected translation mode - * will be active. If the mmu is being enabled, then the return - * target address is a virtual address else it is a real address. - * - * Upon successful completion, control will be returned to the given - * return target address (ie. the cpu will jump to that address). On - * failure, the previous mmu mode remains and the trap simply returns - * as normal with the appropriate error code in RET0. - */ -#define HV_FAST_MMU_ENABLE 0x27 - -/* mmu_unmap_perm_addr() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_UNMAP_PERM_ADDR - * ARG0: virtual address - * ARG1: reserved, must be zero - * ARG2: flags (HV_MMU_{IMMU,DMMU}) - * RET0: status - * ERRORS: EINVAL Invalid virutal address or flags value - * ENOMAP Specified mapping was not found - * - * Demaps any permanent page mapping (established via - * mmu_map_perm_addr()) at the given virtual address for context 0 on - * the current virtual CPU. Any virtual tagged caches are guaranteed - * to be kept consistent. - */ -#define HV_FAST_MMU_UNMAP_PERM_ADDR 0x28 - -/* mmu_tsb_ctx0_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_TSB_CTX0_INFO - * ARG0: max TSBs - * ARG1: buffer pointer - * RET0: status - * RET1: number of TSBs - * ERRORS: EINVAL Supplied buffer is too small - * EBADALIGN The buffer pointer is badly aligned - * ENORADDR Invalid real address for buffer pointer - * - * Return the TSB configuration as previous defined by mmu_tsb_ctx0() - * into the provided buffer. The size of the buffer is given in ARG1 - * in terms of the number of TSB description entries. - * - * Upon return, RET1 always contains the number of TSB descriptions - * previously configured. If zero TSBs were configured, EOK is - * returned with RET1 containing 0. - */ -#define HV_FAST_MMU_TSB_CTX0_INFO 0x29 - -/* mmu_tsb_ctxnon0_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_TSB_CTXNON0_INFO - * ARG0: max TSBs - * ARG1: buffer pointer - * RET0: status - * RET1: number of TSBs - * ERRORS: EINVAL Supplied buffer is too small - * EBADALIGN The buffer pointer is badly aligned - * ENORADDR Invalid real address for buffer pointer - * - * Return the TSB configuration as previous defined by - * mmu_tsb_ctxnon0() into the provided buffer. The size of the buffer - * is given in ARG1 in terms of the number of TSB description entries. - * - * Upon return, RET1 always contains the number of TSB descriptions - * previously configured. If zero TSBs were configured, EOK is - * returned with RET1 containing 0. - */ -#define HV_FAST_MMU_TSB_CTXNON0_INFO 0x2a - -/* mmu_fault_area_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMU_FAULT_AREA_INFO - * RET0: status - * RET1: fault area real address - * ERRORS: No errors defined. - * - * Return the currently defined MMU fault status area for the current - * CPU. The real address of the fault status area is returned in - * RET1, or 0 is returned in RET1 if no fault status area is defined. - * - * Note: mmu_fault_area_conf() may be called with the return value (RET1) - * from this service if there is a need to save and restore the fault - * area for a cpu. - */ -#define HV_FAST_MMU_FAULT_AREA_INFO 0x2b - -/* Cache and Memory services. */ - -/* mem_scrub() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MEM_SCRUB - * ARG0: real address - * ARG1: length - * RET0: status - * RET1: length scrubbed - * ERRORS: ENORADDR Invalid real address - * EBADALIGN Start address or length are not correctly - * aligned - * EINVAL Length is zero - * - * Zero the memory contents in the range real address to real address - * plus length minus 1. Also, valid ECC will be generated for that - * memory address range. Scrubbing is started at the given real - * address, but may not scrub the entire given length. The actual - * length scrubbed will be returned in RET1. - * - * The real address and length must be aligned on an 8K boundary, or - * contain the start address and length from a sun4v error report. - * - * Note: There are two uses for this function. The first use is to block clear - * and initialize memory and the second is to scrub an u ncorrectable - * error reported via a resumable or non-resumable trap. The second - * use requires the arguments to be equal to the real address and length - * provided in a sun4v memory error report. - */ -#define HV_FAST_MEM_SCRUB 0x31 - -/* mem_sync() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MEM_SYNC - * ARG0: real address - * ARG1: length - * RET0: status - * RET1: length synced - * ERRORS: ENORADDR Invalid real address - * EBADALIGN Start address or length are not correctly - * aligned - * EINVAL Length is zero - * - * Force the next access within the real address to real address plus - * length minus 1 to be fetches from main system memory. Less than - * the given length may be synced, the actual amount synced is - * returned in RET1. The real address and length must be aligned on - * an 8K boundary. - */ -#define HV_FAST_MEM_SYNC 0x32 - -/* Time of day services. - * - * The hypervisor maintains the time of day on a per-domain basis. - * Changing the time of day in one domain does not affect the time of - * day on any other domain. - * - * Time is described by a single unsigned 64-bit word which is the - * number of seconds since the UNIX Epoch (00:00:00 UTC, January 1, - * 1970). - */ - -/* tod_get() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TOD_GET - * RET0: status - * RET1: TOD - * ERRORS: EWOULDBLOCK TOD resource is temporarily unavailable - * ENOTSUPPORTED If TOD not supported on this platform - * - * Return the current time of day. May block if TOD access is - * temporarily not possible. - */ -#define HV_FAST_TOD_GET 0x50 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_tod_get(unsigned long *time); -#endif - -/* tod_set() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TOD_SET - * ARG0: TOD - * RET0: status - * ERRORS: EWOULDBLOCK TOD resource is temporarily unavailable - * ENOTSUPPORTED If TOD not supported on this platform - * - * The current time of day is set to the value specified in ARG0. May - * block if TOD access is temporarily not possible. - */ -#define HV_FAST_TOD_SET 0x51 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_tod_set(unsigned long time); -#endif - -/* Console services */ - -/* con_getchar() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CONS_GETCHAR - * RET0: status - * RET1: character - * ERRORS: EWOULDBLOCK No character available. - * - * Returns a character from the console device. If no character is - * available then an EWOULDBLOCK error is returned. If a character is - * available, then the returned status is EOK and the character value - * is in RET1. - * - * A virtual BREAK is represented by the 64-bit value -1. - * - * A virtual HUP signal is represented by the 64-bit value -2. - */ -#define HV_FAST_CONS_GETCHAR 0x60 - -/* con_putchar() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CONS_PUTCHAR - * ARG0: character - * RET0: status - * ERRORS: EINVAL Illegal character - * EWOULDBLOCK Output buffer currently full, would block - * - * Send a character to the console device. Only character values - * between 0 and 255 may be used. Values outside this range are - * invalid except for the 64-bit value -1 which is used to send a - * virtual BREAK. - */ -#define HV_FAST_CONS_PUTCHAR 0x61 - -/* con_read() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CONS_READ - * ARG0: buffer real address - * ARG1: buffer size in bytes - * RET0: status - * RET1: bytes read or BREAK or HUP - * ERRORS: EWOULDBLOCK No character available. - * - * Reads characters into a buffer from the console device. If no - * character is available then an EWOULDBLOCK error is returned. - * If a character is available, then the returned status is EOK - * and the number of bytes read into the given buffer is provided - * in RET1. - * - * A virtual BREAK is represented by the 64-bit RET1 value -1. - * - * A virtual HUP signal is represented by the 64-bit RET1 value -2. - * - * If BREAK or HUP are indicated, no bytes were read into buffer. - */ -#define HV_FAST_CONS_READ 0x62 - -/* con_write() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_CONS_WRITE - * ARG0: buffer real address - * ARG1: buffer size in bytes - * RET0: status - * RET1: bytes written - * ERRORS: EWOULDBLOCK Output buffer currently full, would block - * - * Send a characters in buffer to the console device. Breaks must be - * sent using con_putchar(). - */ -#define HV_FAST_CONS_WRITE 0x63 - -#ifndef __ASSEMBLY__ -extern long sun4v_con_getchar(long *status); -extern long sun4v_con_putchar(long c); -extern long sun4v_con_read(unsigned long buffer, - unsigned long size, - unsigned long *bytes_read); -extern unsigned long sun4v_con_write(unsigned long buffer, - unsigned long size, - unsigned long *bytes_written); -#endif - -/* mach_set_soft_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE - * ARG0: software state - * ARG1: software state description pointer - * RET0: status - * ERRORS: EINVAL software state not valid or software state - * description is not NULL terminated - * ENORADDR software state description pointer is not a - * valid real address - * EBADALIGNED software state description is not correctly - * aligned - * - * This allows the guest to report it's soft state to the hypervisor. There - * are two primary components to this state. The first part states whether - * the guest software is running or not. The second containts optional - * details specific to the software. - * - * The software state argument is defined below in HV_SOFT_STATE_*, and - * indicates whether the guest is operating normally or in a transitional - * state. - * - * The software state description argument is a real address of a data buffer - * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL - * terminated 7-bit ASCII string of up to 31 characters not including the - * NULL termination. - */ -#define HV_FAST_MACH_SET_SOFT_STATE 0x70 -#define HV_SOFT_STATE_NORMAL 0x01 -#define HV_SOFT_STATE_TRANSITION 0x02 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state, - unsigned long msg_string_ra); -#endif - -/* mach_get_soft_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE - * ARG0: software state description pointer - * RET0: status - * RET1: software state - * ERRORS: ENORADDR software state description pointer is not a - * valid real address - * EBADALIGNED software state description is not correctly - * aligned - * - * Retrieve the current value of the guest's software state. The rules - * for the software state pointer are the same as for mach_set_soft_state() - * above. - */ -#define HV_FAST_MACH_GET_SOFT_STATE 0x71 - -/* svc_send() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SVC_SEND - * ARG0: service ID - * ARG1: buffer real address - * ARG2: buffer size - * RET0: STATUS - * RET1: sent_bytes - * - * Be careful, all output registers are clobbered by this operation, - * so for example it is not possible to save away a value in %o4 - * across the trap. - */ -#define HV_FAST_SVC_SEND 0x80 - -/* svc_recv() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SVC_RECV - * ARG0: service ID - * ARG1: buffer real address - * ARG2: buffer size - * RET0: STATUS - * RET1: recv_bytes - * - * Be careful, all output registers are clobbered by this operation, - * so for example it is not possible to save away a value in %o4 - * across the trap. - */ -#define HV_FAST_SVC_RECV 0x81 - -/* svc_getstatus() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SVC_GETSTATUS - * ARG0: service ID - * RET0: STATUS - * RET1: status bits - */ -#define HV_FAST_SVC_GETSTATUS 0x82 - -/* svc_setstatus() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SVC_SETSTATUS - * ARG0: service ID - * ARG1: bits to set - * RET0: STATUS - */ -#define HV_FAST_SVC_SETSTATUS 0x83 - -/* svc_clrstatus() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SVC_CLRSTATUS - * ARG0: service ID - * ARG1: bits to clear - * RET0: STATUS - */ -#define HV_FAST_SVC_CLRSTATUS 0x84 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_svc_send(unsigned long svc_id, - unsigned long buffer, - unsigned long buffer_size, - unsigned long *sent_bytes); -extern unsigned long sun4v_svc_recv(unsigned long svc_id, - unsigned long buffer, - unsigned long buffer_size, - unsigned long *recv_bytes); -extern unsigned long sun4v_svc_getstatus(unsigned long svc_id, - unsigned long *status_bits); -extern unsigned long sun4v_svc_setstatus(unsigned long svc_id, - unsigned long status_bits); -extern unsigned long sun4v_svc_clrstatus(unsigned long svc_id, - unsigned long status_bits); -#endif - -/* Trap trace services. - * - * The hypervisor provides a trap tracing capability for privileged - * code running on each virtual CPU. Privileged code provides a - * round-robin trap trace queue within which the hypervisor writes - * 64-byte entries detailing hyperprivileged traps taken n behalf of - * privileged code. This is provided as a debugging capability for - * privileged code. - * - * The trap trace control structure is 64-bytes long and placed at the - * start (offset 0) of the trap trace buffer, and is described as - * follows: - */ -#ifndef __ASSEMBLY__ -struct hv_trap_trace_control { - unsigned long head_offset; - unsigned long tail_offset; - unsigned long __reserved[0x30 / sizeof(unsigned long)]; -}; -#endif -#define HV_TRAP_TRACE_CTRL_HEAD_OFFSET 0x00 -#define HV_TRAP_TRACE_CTRL_TAIL_OFFSET 0x08 - -/* The head offset is the offset of the most recently completed entry - * in the trap-trace buffer. The tail offset is the offset of the - * next entry to be written. The control structure is owned and - * modified by the hypervisor. A guest may not modify the control - * structure contents. Attempts to do so will result in undefined - * behavior for the guest. - * - * Each trap trace buffer entry is layed out as follows: - */ -#ifndef __ASSEMBLY__ -struct hv_trap_trace_entry { - unsigned char type; /* Hypervisor or guest entry? */ - unsigned char hpstate; /* Hyper-privileged state */ - unsigned char tl; /* Trap level */ - unsigned char gl; /* Global register level */ - unsigned short tt; /* Trap type */ - unsigned short tag; /* Extended trap identifier */ - unsigned long tstate; /* Trap state */ - unsigned long tick; /* Tick */ - unsigned long tpc; /* Trap PC */ - unsigned long f1; /* Entry specific */ - unsigned long f2; /* Entry specific */ - unsigned long f3; /* Entry specific */ - unsigned long f4; /* Entry specific */ -}; -#endif -#define HV_TRAP_TRACE_ENTRY_TYPE 0x00 -#define HV_TRAP_TRACE_ENTRY_HPSTATE 0x01 -#define HV_TRAP_TRACE_ENTRY_TL 0x02 -#define HV_TRAP_TRACE_ENTRY_GL 0x03 -#define HV_TRAP_TRACE_ENTRY_TT 0x04 -#define HV_TRAP_TRACE_ENTRY_TAG 0x06 -#define HV_TRAP_TRACE_ENTRY_TSTATE 0x08 -#define HV_TRAP_TRACE_ENTRY_TICK 0x10 -#define HV_TRAP_TRACE_ENTRY_TPC 0x18 -#define HV_TRAP_TRACE_ENTRY_F1 0x20 -#define HV_TRAP_TRACE_ENTRY_F2 0x28 -#define HV_TRAP_TRACE_ENTRY_F3 0x30 -#define HV_TRAP_TRACE_ENTRY_F4 0x38 - -/* The type field is encoded as follows. */ -#define HV_TRAP_TYPE_UNDEF 0x00 /* Entry content undefined */ -#define HV_TRAP_TYPE_HV 0x01 /* Hypervisor trap entry */ -#define HV_TRAP_TYPE_GUEST 0xff /* Added via ttrace_addentry() */ - -/* ttrace_buf_conf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TTRACE_BUF_CONF - * ARG0: real address - * ARG1: number of entries - * RET0: status - * RET1: number of entries - * ERRORS: ENORADDR Invalid real address - * EINVAL Size is too small - * EBADALIGN Real address not aligned on 64-byte boundary - * - * Requests hypervisor trap tracing and declares a virtual CPU's trap - * trace buffer to the hypervisor. The real address supplies the real - * base address of the trap trace queue and must be 64-byte aligned. - * Specifying a value of 0 for the number of entries disables trap - * tracing for the calling virtual CPU. The buffer allocated must be - * sized for a power of two number of 64-byte trap trace entries plus - * an initial 64-byte control structure. - * - * This may be invoked any number of times so that a virtual CPU may - * relocate a trap trace buffer or create "snapshots" of information. - * - * If the real address is illegal or badly aligned, then trap tracing - * is disabled and an error is returned. - * - * Upon failure with EINVAL, this service call returns in RET1 the - * minimum number of buffer entries required. Upon other failures - * RET1 is undefined. - */ -#define HV_FAST_TTRACE_BUF_CONF 0x90 - -/* ttrace_buf_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TTRACE_BUF_INFO - * RET0: status - * RET1: real address - * RET2: size - * ERRORS: None defined. - * - * Returns the size and location of the previously declared trap-trace - * buffer. In the event that no buffer was previously defined, or the - * buffer is disabled, this call will return a size of zero bytes. - */ -#define HV_FAST_TTRACE_BUF_INFO 0x91 - -/* ttrace_enable() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TTRACE_ENABLE - * ARG0: enable - * RET0: status - * RET1: previous enable state - * ERRORS: EINVAL No trap trace buffer currently defined - * - * Enable or disable trap tracing, and return the previous enabled - * state in RET1. Future systems may define various flags for the - * enable argument (ARG0), for the moment a guest should pass - * "(uint64_t) -1" to enable, and "(uint64_t) 0" to disable all - * tracing - which will ensure future compatability. - */ -#define HV_FAST_TTRACE_ENABLE 0x92 - -/* ttrace_freeze() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_TTRACE_FREEZE - * ARG0: freeze - * RET0: status - * RET1: previous freeze state - * ERRORS: EINVAL No trap trace buffer currently defined - * - * Freeze or unfreeze trap tracing, returning the previous freeze - * state in RET1. A guest should pass a non-zero value to freeze and - * a zero value to unfreeze all tracing. The returned previous state - * is 0 for not frozen and 1 for frozen. - */ -#define HV_FAST_TTRACE_FREEZE 0x93 - -/* ttrace_addentry() - * TRAP: HV_TTRACE_ADDENTRY_TRAP - * ARG0: tag (16-bits) - * ARG1: data word 0 - * ARG2: data word 1 - * ARG3: data word 2 - * ARG4: data word 3 - * RET0: status - * ERRORS: EINVAL No trap trace buffer currently defined - * - * Add an entry to the trap trace buffer. Upon return only ARG0/RET0 - * is modified - none of the other registers holding arguments are - * volatile across this hypervisor service. - */ - -/* Core dump services. - * - * Since the hypervisor viraulizes and thus obscures a lot of the - * physical machine layout and state, traditional OS crash dumps can - * be difficult to diagnose especially when the problem is a - * configuration error of some sort. - * - * The dump services provide an opaque buffer into which the - * hypervisor can place it's internal state in order to assist in - * debugging such situations. The contents are opaque and extremely - * platform and hypervisor implementation specific. The guest, during - * a core dump, requests that the hypervisor update any information in - * the dump buffer in preparation to being dumped as part of the - * domain's memory image. - */ - -/* dump_buf_update() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_DUMP_BUF_UPDATE - * ARG0: real address - * ARG1: size - * RET0: status - * RET1: required size of dump buffer - * ERRORS: ENORADDR Invalid real address - * EBADALIGN Real address is not aligned on a 64-byte - * boundary - * EINVAL Size is non-zero but less than minimum size - * required - * ENOTSUPPORTED Operation not supported on current logical - * domain - * - * Declare a domain dump buffer to the hypervisor. The real address - * provided for the domain dump buffer must be 64-byte aligned. The - * size specifies the size of the dump buffer and may be larger than - * the minimum size specified in the machine description. The - * hypervisor will fill the dump buffer with opaque data. - * - * Note: A guest may elect to include dump buffer contents as part of a crash - * dump to assist with debugging. This function may be called any number - * of times so that a guest may relocate a dump buffer, or create - * "snapshots" of any dump-buffer information. Each call to - * dump_buf_update() atomically declares the new dump buffer to the - * hypervisor. - * - * A specified size of 0 unconfigures the dump buffer. If the real - * address is illegal or badly aligned, then any currently active dump - * buffer is disabled and an error is returned. - * - * In the event that the call fails with EINVAL, RET1 contains the - * minimum size requires by the hypervisor for a valid dump buffer. - */ -#define HV_FAST_DUMP_BUF_UPDATE 0x94 - -/* dump_buf_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_DUMP_BUF_INFO - * RET0: status - * RET1: real address of current dump buffer - * RET2: size of current dump buffer - * ERRORS: No errors defined. - * - * Return the currently configures dump buffer description. A - * returned size of 0 bytes indicates an undefined dump buffer. In - * this case the return address in RET1 is undefined. - */ -#define HV_FAST_DUMP_BUF_INFO 0x95 - -/* Device interrupt services. - * - * Device interrupts are allocated to system bus bridges by the hypervisor, - * and described to OBP in the machine description. OBP then describes - * these interrupts to the OS via properties in the device tree. - * - * Terminology: - * - * cpuid Unique opaque value which represents a target cpu. - * - * devhandle Device handle. It uniquely identifies a device, and - * consistes of the lower 28-bits of the hi-cell of the - * first entry of the device's "reg" property in the - * OBP device tree. - * - * devino Device interrupt number. Specifies the relative - * interrupt number within the device. The unique - * combination of devhandle and devino are used to - * identify a specific device interrupt. - * - * Note: The devino value is the same as the values in the - * "interrupts" property or "interrupt-map" property - * in the OBP device tree for that device. - * - * sysino System interrupt number. A 64-bit unsigned interger - * representing a unique interrupt within a virtual - * machine. - * - * intr_state A flag representing the interrupt state for a given - * sysino. The state values are defined below. - * - * intr_enabled A flag representing the 'enabled' state for a given - * sysino. The enable values are defined below. - */ - -#define HV_INTR_STATE_IDLE 0 /* Nothing pending */ -#define HV_INTR_STATE_RECEIVED 1 /* Interrupt received by hardware */ -#define HV_INTR_STATE_DELIVERED 2 /* Interrupt delivered to queue */ - -#define HV_INTR_DISABLED 0 /* sysino not enabled */ -#define HV_INTR_ENABLED 1 /* sysino enabled */ - -/* intr_devino_to_sysino() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_DEVINO2SYSINO - * ARG0: devhandle - * ARG1: devino - * RET0: status - * RET1: sysino - * ERRORS: EINVAL Invalid devhandle/devino - * - * Converts a device specific interrupt number of the given - * devhandle/devino into a system specific ino (sysino). - */ -#define HV_FAST_INTR_DEVINO2SYSINO 0xa0 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_devino_to_sysino(unsigned long devhandle, - unsigned long devino); -#endif - -/* intr_getenabled() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_GETENABLED - * ARG0: sysino - * RET0: status - * RET1: intr_enabled (HV_INTR_{DISABLED,ENABLED}) - * ERRORS: EINVAL Invalid sysino - * - * Returns interrupt enabled state in RET1 for the interrupt defined - * by the given sysino. - */ -#define HV_FAST_INTR_GETENABLED 0xa1 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_getenabled(unsigned long sysino); -#endif - -/* intr_setenabled() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_SETENABLED - * ARG0: sysino - * ARG1: intr_enabled (HV_INTR_{DISABLED,ENABLED}) - * RET0: status - * ERRORS: EINVAL Invalid sysino or intr_enabled value - * - * Set the 'enabled' state of the interrupt sysino. - */ -#define HV_FAST_INTR_SETENABLED 0xa2 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_setenabled(unsigned long sysino, unsigned long intr_enabled); -#endif - -/* intr_getstate() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_GETSTATE - * ARG0: sysino - * RET0: status - * RET1: intr_state (HV_INTR_STATE_*) - * ERRORS: EINVAL Invalid sysino - * - * Returns current state of the interrupt defined by the given sysino. - */ -#define HV_FAST_INTR_GETSTATE 0xa3 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_getstate(unsigned long sysino); -#endif - -/* intr_setstate() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_SETSTATE - * ARG0: sysino - * ARG1: intr_state (HV_INTR_STATE_*) - * RET0: status - * ERRORS: EINVAL Invalid sysino or intr_state value - * - * Sets the current state of the interrupt described by the given sysino - * value. - * - * Note: Setting the state to HV_INTR_STATE_IDLE clears any pending - * interrupt for sysino. - */ -#define HV_FAST_INTR_SETSTATE 0xa4 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state); -#endif - -/* intr_gettarget() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_GETTARGET - * ARG0: sysino - * RET0: status - * RET1: cpuid - * ERRORS: EINVAL Invalid sysino - * - * Returns CPU that is the current target of the interrupt defined by - * the given sysino. The CPU value returned is undefined if the target - * has not been set via intr_settarget(). - */ -#define HV_FAST_INTR_GETTARGET 0xa5 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_gettarget(unsigned long sysino); -#endif - -/* intr_settarget() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_INTR_SETTARGET - * ARG0: sysino - * ARG1: cpuid - * RET0: status - * ERRORS: EINVAL Invalid sysino - * ENOCPU Invalid cpuid - * - * Set the target CPU for the interrupt defined by the given sysino. - */ -#define HV_FAST_INTR_SETTARGET 0xa6 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); -#endif - -/* vintr_get_cookie() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_GET_COOKIE - * ARG0: device handle - * ARG1: device ino - * RET0: status - * RET1: cookie - */ -#define HV_FAST_VINTR_GET_COOKIE 0xa7 - -/* vintr_set_cookie() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_SET_COOKIE - * ARG0: device handle - * ARG1: device ino - * ARG2: cookie - * RET0: status - */ -#define HV_FAST_VINTR_SET_COOKIE 0xa8 - -/* vintr_get_valid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_GET_VALID - * ARG0: device handle - * ARG1: device ino - * RET0: status - * RET1: valid state - */ -#define HV_FAST_VINTR_GET_VALID 0xa9 - -/* vintr_set_valid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_SET_VALID - * ARG0: device handle - * ARG1: device ino - * ARG2: valid state - * RET0: status - */ -#define HV_FAST_VINTR_SET_VALID 0xaa - -/* vintr_get_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_GET_STATE - * ARG0: device handle - * ARG1: device ino - * RET0: status - * RET1: state - */ -#define HV_FAST_VINTR_GET_STATE 0xab - -/* vintr_set_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_SET_STATE - * ARG0: device handle - * ARG1: device ino - * ARG2: state - * RET0: status - */ -#define HV_FAST_VINTR_SET_STATE 0xac - -/* vintr_get_target() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_GET_TARGET - * ARG0: device handle - * ARG1: device ino - * RET0: status - * RET1: cpuid - */ -#define HV_FAST_VINTR_GET_TARGET 0xad - -/* vintr_set_target() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_VINTR_SET_TARGET - * ARG0: device handle - * ARG1: device ino - * ARG2: cpuid - * RET0: status - */ -#define HV_FAST_VINTR_SET_TARGET 0xae - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long *cookie); -extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long cookie); -extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long *valid); -extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long valid); -extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long *state); -extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long state); -extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long *cpuid); -extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle, - unsigned long dev_ino, - unsigned long cpuid); -#endif - -/* PCI IO services. - * - * See the terminology descriptions in the device interrupt services - * section above as those apply here too. Here are terminology - * definitions specific to these PCI IO services: - * - * tsbnum TSB number. Indentifies which io-tsb is used. - * For this version of the specification, tsbnum - * must be zero. - * - * tsbindex TSB index. Identifies which entry in the TSB - * is used. The first entry is zero. - * - * tsbid A 64-bit aligned data structure which contains - * a tsbnum and a tsbindex. Bits 63:32 contain the - * tsbnum and bits 31:00 contain the tsbindex. - * - * Use the HV_PCI_TSBID() macro to construct such - * values. - * - * io_attributes IO attributes for IOMMU mappings. One of more - * of the attritbute bits are stores in a 64-bit - * value. The values are defined below. - * - * r_addr 64-bit real address - * - * pci_device PCI device address. A PCI device address identifies - * a specific device on a specific PCI bus segment. - * A PCI device address ia a 32-bit unsigned integer - * with the following format: - * - * 00000000.bbbbbbbb.dddddfff.00000000 - * - * Use the HV_PCI_DEVICE_BUILD() macro to construct - * such values. - * - * pci_config_offset - * PCI configureation space offset. For conventional - * PCI a value between 0 and 255. For extended - * configuration space, a value between 0 and 4095. - * - * Note: For PCI configuration space accesses, the offset - * must be aligned to the access size. - * - * error_flag A return value which specifies if the action succeeded - * or failed. 0 means no error, non-0 means some error - * occurred while performing the service. - * - * io_sync_direction - * Direction definition for pci_dma_sync(), defined - * below in HV_PCI_SYNC_*. - * - * io_page_list A list of io_page_addresses, an io_page_address is - * a real address. - * - * io_page_list_p A pointer to an io_page_list. - * - * "size based byte swap" - Some functions do size based byte swapping - * which allows sw to access pointers and - * counters in native form when the processor - * operates in a different endianness than the - * IO bus. Size-based byte swapping converts a - * multi-byte field between big-endian and - * little-endian format. - */ - -#define HV_PCI_MAP_ATTR_READ 0x01 -#define HV_PCI_MAP_ATTR_WRITE 0x02 - -#define HV_PCI_DEVICE_BUILD(b,d,f) \ - ((((b) & 0xff) << 16) | \ - (((d) & 0x1f) << 11) | \ - (((f) & 0x07) << 8)) - -#define HV_PCI_TSBID(__tsb_num, __tsb_index) \ - ((((u64)(__tsb_num)) << 32UL) | ((u64)(__tsb_index))) - -#define HV_PCI_SYNC_FOR_DEVICE 0x01 -#define HV_PCI_SYNC_FOR_CPU 0x02 - -/* pci_iommu_map() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_IOMMU_MAP - * ARG0: devhandle - * ARG1: tsbid - * ARG2: #ttes - * ARG3: io_attributes - * ARG4: io_page_list_p - * RET0: status - * RET1: #ttes mapped - * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex/io_attributes - * EBADALIGN Improperly aligned real address - * ENORADDR Invalid real address - * - * Create IOMMU mappings in the sun4v device defined by the given - * devhandle. The mappings are created in the TSB defined by the - * tsbnum component of the given tsbid. The first mapping is created - * in the TSB i ndex defined by the tsbindex component of the given tsbid. - * The call creates up to #ttes mappings, the first one at tsbnum, tsbindex, - * the second at tsbnum, tsbindex + 1, etc. - * - * All mappings are created with the attributes defined by the io_attributes - * argument. The page mapping addresses are described in the io_page_list - * defined by the given io_page_list_p, which is a pointer to the io_page_list. - * The first entry in the io_page_list is the address for the first iotte, the - * 2nd for the 2nd iotte, and so on. - * - * Each io_page_address in the io_page_list must be appropriately aligned. - * #ttes must be greater than zero. For this version of the spec, the tsbnum - * component of the given tsbid must be zero. - * - * Returns the actual number of mappings creates, which may be less than - * or equal to the argument #ttes. If the function returns a value which - * is less than the #ttes, the caller may continus to call the function with - * an updated tsbid, #ttes, io_page_list_p arguments until all pages are - * mapped. - * - * Note: This function does not imply an iotte cache flush. The guest must - * demap an entry before re-mapping it. - */ -#define HV_FAST_PCI_IOMMU_MAP 0xb0 - -/* pci_iommu_demap() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_IOMMU_DEMAP - * ARG0: devhandle - * ARG1: tsbid - * ARG2: #ttes - * RET0: status - * RET1: #ttes demapped - * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex - * - * Demap and flush IOMMU mappings in the device defined by the given - * devhandle. Demaps up to #ttes entries in the TSB defined by the tsbnum - * component of the given tsbid, starting at the TSB index defined by the - * tsbindex component of the given tsbid. - * - * For this version of the spec, the tsbnum of the given tsbid must be zero. - * #ttes must be greater than zero. - * - * Returns the actual number of ttes demapped, which may be less than or equal - * to the argument #ttes. If #ttes demapped is less than #ttes, the caller - * may continue to call this function with updated tsbid and #ttes arguments - * until all pages are demapped. - * - * Note: Entries do not have to be mapped to be demapped. A demap of an - * unmapped page will flush the entry from the tte cache. - */ -#define HV_FAST_PCI_IOMMU_DEMAP 0xb1 - -/* pci_iommu_getmap() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_IOMMU_GETMAP - * ARG0: devhandle - * ARG1: tsbid - * RET0: status - * RET1: io_attributes - * RET2: real address - * ERRORS: EINVAL Invalid devhandle/tsbnum/tsbindex - * ENOMAP Mapping is not valid, no translation exists - * - * Read and return the mapping in the device described by the given devhandle - * and tsbid. If successful, the io_attributes shall be returned in RET1 - * and the page address of the mapping shall be returned in RET2. - * - * For this version of the spec, the tsbnum component of the given tsbid - * must be zero. - */ -#define HV_FAST_PCI_IOMMU_GETMAP 0xb2 - -/* pci_iommu_getbypass() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_IOMMU_GETBYPASS - * ARG0: devhandle - * ARG1: real address - * ARG2: io_attributes - * RET0: status - * RET1: io_addr - * ERRORS: EINVAL Invalid devhandle/io_attributes - * ENORADDR Invalid real address - * ENOTSUPPORTED Function not supported in this implementation. - * - * Create a "special" mapping in the device described by the given devhandle, - * for the given real address and attributes. Return the IO address in RET1 - * if successful. - */ -#define HV_FAST_PCI_IOMMU_GETBYPASS 0xb3 - -/* pci_config_get() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_CONFIG_GET - * ARG0: devhandle - * ARG1: pci_device - * ARG2: pci_config_offset - * ARG3: size - * RET0: status - * RET1: error_flag - * RET2: data - * ERRORS: EINVAL Invalid devhandle/pci_device/offset/size - * EBADALIGN pci_config_offset not size aligned - * ENOACCESS Access to this offset is not permitted - * - * Read PCI configuration space for the adapter described by the given - * devhandle. Read size (1, 2, or 4) bytes of data from the given - * pci_device, at pci_config_offset from the beginning of the device's - * configuration space. If there was no error, RET1 is set to zero and - * RET2 is set to the data read. Insignificant bits in RET2 are not - * guarenteed to have any specific value and therefore must be ignored. - * - * The data returned in RET2 is size based byte swapped. - * - * If an error occurs during the read, set RET1 to a non-zero value. The - * given pci_config_offset must be 'size' aligned. - */ -#define HV_FAST_PCI_CONFIG_GET 0xb4 - -/* pci_config_put() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_CONFIG_PUT - * ARG0: devhandle - * ARG1: pci_device - * ARG2: pci_config_offset - * ARG3: size - * ARG4: data - * RET0: status - * RET1: error_flag - * ERRORS: EINVAL Invalid devhandle/pci_device/offset/size - * EBADALIGN pci_config_offset not size aligned - * ENOACCESS Access to this offset is not permitted - * - * Write PCI configuration space for the adapter described by the given - * devhandle. Write size (1, 2, or 4) bytes of data in a single operation, - * at pci_config_offset from the beginning of the device's configuration - * space. The data argument contains the data to be written to configuration - * space. Prior to writing, the data is size based byte swapped. - * - * If an error occurs during the write access, do not generate an error - * report, do set RET1 to a non-zero value. Otherwise RET1 is zero. - * The given pci_config_offset must be 'size' aligned. - * - * This function is permitted to read from offset zero in the configuration - * space described by the given pci_device if necessary to ensure that the - * write access to config space completes. - */ -#define HV_FAST_PCI_CONFIG_PUT 0xb5 - -/* pci_peek() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_PEEK - * ARG0: devhandle - * ARG1: real address - * ARG2: size - * RET0: status - * RET1: error_flag - * RET2: data - * ERRORS: EINVAL Invalid devhandle or size - * EBADALIGN Improperly aligned real address - * ENORADDR Bad real address - * ENOACCESS Guest access prohibited - * - * Attempt to read the IO address given by the given devhandle, real address, - * and size. Size must be 1, 2, 4, or 8. The read is performed as a single - * access operation using the given size. If an error occurs when reading - * from the given location, do not generate an error report, but return a - * non-zero value in RET1. If the read was successful, return zero in RET1 - * and return the actual data read in RET2. The data returned is size based - * byte swapped. - * - * Non-significant bits in RET2 are not guarenteed to have any specific value - * and therefore must be ignored. If RET1 is returned as non-zero, the data - * value is not guarenteed to have any specific value and should be ignored. - * - * The caller must have permission to read from the given devhandle, real - * address, which must be an IO address. The argument real address must be a - * size aligned address. - * - * The hypervisor implementation of this function must block access to any - * IO address that the guest does not have explicit permission to access. - */ -#define HV_FAST_PCI_PEEK 0xb6 - -/* pci_poke() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_POKE - * ARG0: devhandle - * ARG1: real address - * ARG2: size - * ARG3: data - * ARG4: pci_device - * RET0: status - * RET1: error_flag - * ERRORS: EINVAL Invalid devhandle, size, or pci_device - * EBADALIGN Improperly aligned real address - * ENORADDR Bad real address - * ENOACCESS Guest access prohibited - * ENOTSUPPORTED Function is not supported by implementation - * - * Attempt to write data to the IO address given by the given devhandle, - * real address, and size. Size must be 1, 2, 4, or 8. The write is - * performed as a single access operation using the given size. Prior to - * writing the data is size based swapped. - * - * If an error occurs when writing to the given location, do not generate an - * error report, but return a non-zero value in RET1. If the write was - * successful, return zero in RET1. - * - * pci_device describes the configuration address of the device being - * written to. The implementation may safely read from offset 0 with - * the configuration space of the device described by devhandle and - * pci_device in order to guarantee that the write portion of the operation - * completes - * - * Any error that occurs due to the read shall be reported using the normal - * error reporting mechanisms .. the read error is not suppressed. - * - * The caller must have permission to write to the given devhandle, real - * address, which must be an IO address. The argument real address must be a - * size aligned address. The caller must have permission to read from - * the given devhandle, pci_device cofiguration space offset 0. - * - * The hypervisor implementation of this function must block access to any - * IO address that the guest does not have explicit permission to access. - */ -#define HV_FAST_PCI_POKE 0xb7 - -/* pci_dma_sync() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_DMA_SYNC - * ARG0: devhandle - * ARG1: real address - * ARG2: size - * ARG3: io_sync_direction - * RET0: status - * RET1: #synced - * ERRORS: EINVAL Invalid devhandle or io_sync_direction - * ENORADDR Bad real address - * - * Synchronize a memory region described by the given real address and size, - * for the device defined by the given devhandle using the direction(s) - * defined by the given io_sync_direction. The argument size is the size of - * the memory region in bytes. - * - * Return the actual number of bytes synchronized in the return value #synced, - * which may be less than or equal to the argument size. If the return - * value #synced is less than size, the caller must continue to call this - * function with updated real address and size arguments until the entire - * memory region is synchronized. - */ -#define HV_FAST_PCI_DMA_SYNC 0xb8 - -/* PCI MSI services. */ - -#define HV_MSITYPE_MSI32 0x00 -#define HV_MSITYPE_MSI64 0x01 - -#define HV_MSIQSTATE_IDLE 0x00 -#define HV_MSIQSTATE_ERROR 0x01 - -#define HV_MSIQ_INVALID 0x00 -#define HV_MSIQ_VALID 0x01 - -#define HV_MSISTATE_IDLE 0x00 -#define HV_MSISTATE_DELIVERED 0x01 - -#define HV_MSIVALID_INVALID 0x00 -#define HV_MSIVALID_VALID 0x01 - -#define HV_PCIE_MSGTYPE_PME_MSG 0x18 -#define HV_PCIE_MSGTYPE_PME_ACK_MSG 0x1b -#define HV_PCIE_MSGTYPE_CORR_MSG 0x30 -#define HV_PCIE_MSGTYPE_NONFATAL_MSG 0x31 -#define HV_PCIE_MSGTYPE_FATAL_MSG 0x33 - -#define HV_MSG_INVALID 0x00 -#define HV_MSG_VALID 0x01 - -/* pci_msiq_conf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_CONF - * ARG0: devhandle - * ARG1: msiqid - * ARG2: real address - * ARG3: number of entries - * RET0: status - * ERRORS: EINVAL Invalid devhandle, msiqid or nentries - * EBADALIGN Improperly aligned real address - * ENORADDR Bad real address - * - * Configure the MSI queue given by the devhandle and msiqid arguments, - * and to be placed at the given real address and be of the given - * number of entries. The real address must be aligned exactly to match - * the queue size. Each queue entry is 64-bytes long, so f.e. a 32 entry - * queue must be aligned on a 2048 byte real address boundary. The MSI-EQ - * Head and Tail are initialized so that the MSI-EQ is 'empty'. - * - * Implementation Note: Certain implementations have fixed sized queues. In - * that case, number of entries must contain the correct - * value. - */ -#define HV_FAST_PCI_MSIQ_CONF 0xc0 - -/* pci_msiq_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_INFO - * ARG0: devhandle - * ARG1: msiqid - * RET0: status - * RET1: real address - * RET2: number of entries - * ERRORS: EINVAL Invalid devhandle or msiqid - * - * Return the configuration information for the MSI queue described - * by the given devhandle and msiqid. The base address of the queue - * is returned in ARG1 and the number of entries is returned in ARG2. - * If the queue is unconfigured, the real address is undefined and the - * number of entries will be returned as zero. - */ -#define HV_FAST_PCI_MSIQ_INFO 0xc1 - -/* pci_msiq_getvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_GETVALID - * ARG0: devhandle - * ARG1: msiqid - * RET0: status - * RET1: msiqvalid (HV_MSIQ_VALID or HV_MSIQ_INVALID) - * ERRORS: EINVAL Invalid devhandle or msiqid - * - * Get the valid state of the MSI-EQ described by the given devhandle and - * msiqid. - */ -#define HV_FAST_PCI_MSIQ_GETVALID 0xc2 - -/* pci_msiq_setvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_SETVALID - * ARG0: devhandle - * ARG1: msiqid - * ARG2: msiqvalid (HV_MSIQ_VALID or HV_MSIQ_INVALID) - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msiqid or msiqvalid - * value or MSI EQ is uninitialized - * - * Set the valid state of the MSI-EQ described by the given devhandle and - * msiqid to the given msiqvalid. - */ -#define HV_FAST_PCI_MSIQ_SETVALID 0xc3 - -/* pci_msiq_getstate() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_GETSTATE - * ARG0: devhandle - * ARG1: msiqid - * RET0: status - * RET1: msiqstate (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR) - * ERRORS: EINVAL Invalid devhandle or msiqid - * - * Get the state of the MSI-EQ described by the given devhandle and - * msiqid. - */ -#define HV_FAST_PCI_MSIQ_GETSTATE 0xc4 - -/* pci_msiq_getvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_GETVALID - * ARG0: devhandle - * ARG1: msiqid - * ARG2: msiqstate (HV_MSIQSTATE_IDLE or HV_MSIQSTATE_ERROR) - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msiqid or msiqstate - * value or MSI EQ is uninitialized - * - * Set the state of the MSI-EQ described by the given devhandle and - * msiqid to the given msiqvalid. - */ -#define HV_FAST_PCI_MSIQ_SETSTATE 0xc5 - -/* pci_msiq_gethead() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_GETHEAD - * ARG0: devhandle - * ARG1: msiqid - * RET0: status - * RET1: msiqhead - * ERRORS: EINVAL Invalid devhandle or msiqid - * - * Get the current MSI EQ queue head for the MSI-EQ described by the - * given devhandle and msiqid. - */ -#define HV_FAST_PCI_MSIQ_GETHEAD 0xc6 - -/* pci_msiq_sethead() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_SETHEAD - * ARG0: devhandle - * ARG1: msiqid - * ARG2: msiqhead - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msiqid or msiqhead, - * or MSI EQ is uninitialized - * - * Set the current MSI EQ queue head for the MSI-EQ described by the - * given devhandle and msiqid. - */ -#define HV_FAST_PCI_MSIQ_SETHEAD 0xc7 - -/* pci_msiq_gettail() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSIQ_GETTAIL - * ARG0: devhandle - * ARG1: msiqid - * RET0: status - * RET1: msiqtail - * ERRORS: EINVAL Invalid devhandle or msiqid - * - * Get the current MSI EQ queue tail for the MSI-EQ described by the - * given devhandle and msiqid. - */ -#define HV_FAST_PCI_MSIQ_GETTAIL 0xc8 - -/* pci_msi_getvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_GETVALID - * ARG0: devhandle - * ARG1: msinum - * RET0: status - * RET1: msivalidstate - * ERRORS: EINVAL Invalid devhandle or msinum - * - * Get the current valid/enabled state for the MSI defined by the - * given devhandle and msinum. - */ -#define HV_FAST_PCI_MSI_GETVALID 0xc9 - -/* pci_msi_setvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_SETVALID - * ARG0: devhandle - * ARG1: msinum - * ARG2: msivalidstate - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msinum or msivalidstate - * - * Set the current valid/enabled state for the MSI defined by the - * given devhandle and msinum. - */ -#define HV_FAST_PCI_MSI_SETVALID 0xca - -/* pci_msi_getmsiq() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_GETMSIQ - * ARG0: devhandle - * ARG1: msinum - * RET0: status - * RET1: msiqid - * ERRORS: EINVAL Invalid devhandle or msinum or MSI is unbound - * - * Get the MSI EQ that the MSI defined by the given devhandle and - * msinum is bound to. - */ -#define HV_FAST_PCI_MSI_GETMSIQ 0xcb - -/* pci_msi_setmsiq() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_SETMSIQ - * ARG0: devhandle - * ARG1: msinum - * ARG2: msitype - * ARG3: msiqid - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msinum or msiqid - * - * Set the MSI EQ that the MSI defined by the given devhandle and - * msinum is bound to. - */ -#define HV_FAST_PCI_MSI_SETMSIQ 0xcc - -/* pci_msi_getstate() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_GETSTATE - * ARG0: devhandle - * ARG1: msinum - * RET0: status - * RET1: msistate - * ERRORS: EINVAL Invalid devhandle or msinum - * - * Get the state of the MSI defined by the given devhandle and msinum. - * If not initialized, return HV_MSISTATE_IDLE. - */ -#define HV_FAST_PCI_MSI_GETSTATE 0xcd - -/* pci_msi_setstate() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSI_SETSTATE - * ARG0: devhandle - * ARG1: msinum - * ARG2: msistate - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msinum or msistate - * - * Set the state of the MSI defined by the given devhandle and msinum. - */ -#define HV_FAST_PCI_MSI_SETSTATE 0xce - -/* pci_msg_getmsiq() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSG_GETMSIQ - * ARG0: devhandle - * ARG1: msgtype - * RET0: status - * RET1: msiqid - * ERRORS: EINVAL Invalid devhandle or msgtype - * - * Get the MSI EQ of the MSG defined by the given devhandle and msgtype. - */ -#define HV_FAST_PCI_MSG_GETMSIQ 0xd0 - -/* pci_msg_setmsiq() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSG_SETMSIQ - * ARG0: devhandle - * ARG1: msgtype - * ARG2: msiqid - * RET0: status - * ERRORS: EINVAL Invalid devhandle, msgtype, or msiqid - * - * Set the MSI EQ of the MSG defined by the given devhandle and msgtype. - */ -#define HV_FAST_PCI_MSG_SETMSIQ 0xd1 - -/* pci_msg_getvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSG_GETVALID - * ARG0: devhandle - * ARG1: msgtype - * RET0: status - * RET1: msgvalidstate - * ERRORS: EINVAL Invalid devhandle or msgtype - * - * Get the valid/enabled state of the MSG defined by the given - * devhandle and msgtype. - */ -#define HV_FAST_PCI_MSG_GETVALID 0xd2 - -/* pci_msg_setvalid() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_PCI_MSG_SETVALID - * ARG0: devhandle - * ARG1: msgtype - * ARG2: msgvalidstate - * RET0: status - * ERRORS: EINVAL Invalid devhandle or msgtype or msgvalidstate - * - * Set the valid/enabled state of the MSG defined by the given - * devhandle and msgtype. - */ -#define HV_FAST_PCI_MSG_SETVALID 0xd3 - -/* Logical Domain Channel services. */ - -#define LDC_CHANNEL_DOWN 0 -#define LDC_CHANNEL_UP 1 -#define LDC_CHANNEL_RESETTING 2 - -/* ldc_tx_qconf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_TX_QCONF - * ARG0: channel ID - * ARG1: real address base of queue - * ARG2: num entries in queue - * RET0: status - * - * Configure transmit queue for the LDC endpoint specified by the - * given channel ID, to be placed at the given real address, and - * be of the given num entries. Num entries must be a power of two. - * The real address base of the queue must be aligned on the queue - * size. Each queue entry is 64-bytes, so for example, a 32 entry - * queue must be aligned on a 2048 byte real address boundary. - * - * Upon configuration of a valid transmit queue the head and tail - * pointers are set to a hypervisor specific identical value indicating - * that the queue initially is empty. - * - * The endpoint's transmit queue is un-configured if num entries is zero. - * - * The maximum number of entries for each queue for a specific cpu may be - * determined from the machine description. A transmit queue may be - * specified even in the event that the LDC is down (peer endpoint has no - * receive queue specified). Transmission will begin as soon as the peer - * endpoint defines a receive queue. - * - * It is recommended that a guest wait for a transmit queue to empty prior - * to reconfiguring it, or un-configuring it. Re or un-configuring of a - * non-empty transmit queue behaves exactly as defined above, however it - * is undefined as to how many of the pending entries in the original queue - * will be delivered prior to the re-configuration taking effect. - * Furthermore, as the queue configuration causes a reset of the head and - * tail pointers there is no way for a guest to determine how many entries - * have been sent after the configuration operation. - */ -#define HV_FAST_LDC_TX_QCONF 0xe0 - -/* ldc_tx_qinfo() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_TX_QINFO - * ARG0: channel ID - * RET0: status - * RET1: real address base of queue - * RET2: num entries in queue - * - * Return the configuration info for the transmit queue of LDC endpoint - * defined by the given channel ID. The real address is the currently - * defined real address base of the defined queue, and num entries is the - * size of the queue in terms of number of entries. - * - * If the specified channel ID is a valid endpoint number, but no transmit - * queue has been defined this service will return success, but with num - * entries set to zero and the real address will have an undefined value. - */ -#define HV_FAST_LDC_TX_QINFO 0xe1 - -/* ldc_tx_get_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_TX_GET_STATE - * ARG0: channel ID - * RET0: status - * RET1: head offset - * RET2: tail offset - * RET3: channel state - * - * Return the transmit state, and the head and tail queue pointers, for - * the transmit queue of the LDC endpoint defined by the given channel ID. - * The head and tail values are the byte offset of the head and tail - * positions of the transmit queue for the specified endpoint. - */ -#define HV_FAST_LDC_TX_GET_STATE 0xe2 - -/* ldc_tx_set_qtail() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_TX_SET_QTAIL - * ARG0: channel ID - * ARG1: tail offset - * RET0: status - * - * Update the tail pointer for the transmit queue associated with the LDC - * endpoint defined by the given channel ID. The tail offset specified - * must be aligned on a 64 byte boundary, and calculated so as to increase - * the number of pending entries on the transmit queue. Any attempt to - * decrease the number of pending transmit queue entires is considered - * an invalid tail offset and will result in an EINVAL error. - * - * Since the tail of the transmit queue may not be moved backwards, the - * transmit queue may be flushed by configuring a new transmit queue, - * whereupon the hypervisor will configure the initial transmit head and - * tail pointers to be equal. - */ -#define HV_FAST_LDC_TX_SET_QTAIL 0xe3 - -/* ldc_rx_qconf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_RX_QCONF - * ARG0: channel ID - * ARG1: real address base of queue - * ARG2: num entries in queue - * RET0: status - * - * Configure receive queue for the LDC endpoint specified by the - * given channel ID, to be placed at the given real address, and - * be of the given num entries. Num entries must be a power of two. - * The real address base of the queue must be aligned on the queue - * size. Each queue entry is 64-bytes, so for example, a 32 entry - * queue must be aligned on a 2048 byte real address boundary. - * - * The endpoint's transmit queue is un-configured if num entries is zero. - * - * If a valid receive queue is specified for a local endpoint the LDC is - * in the up state for the purpose of transmission to this endpoint. - * - * The maximum number of entries for each queue for a specific cpu may be - * determined from the machine description. - * - * As receive queue configuration causes a reset of the queue's head and - * tail pointers there is no way for a gues to determine how many entries - * have been received between a preceeding ldc_get_rx_state() API call - * and the completion of the configuration operation. It should be noted - * that datagram delivery is not guarenteed via domain channels anyway, - * and therefore any higher protocol should be resilient to datagram - * loss if necessary. However, to overcome this specific race potential - * it is recommended, for example, that a higher level protocol be employed - * to ensure either retransmission, or ensure that no datagrams are pending - * on the peer endpoint's transmit queue prior to the configuration process. - */ -#define HV_FAST_LDC_RX_QCONF 0xe4 - -/* ldc_rx_qinfo() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_RX_QINFO - * ARG0: channel ID - * RET0: status - * RET1: real address base of queue - * RET2: num entries in queue - * - * Return the configuration info for the receive queue of LDC endpoint - * defined by the given channel ID. The real address is the currently - * defined real address base of the defined queue, and num entries is the - * size of the queue in terms of number of entries. - * - * If the specified channel ID is a valid endpoint number, but no receive - * queue has been defined this service will return success, but with num - * entries set to zero and the real address will have an undefined value. - */ -#define HV_FAST_LDC_RX_QINFO 0xe5 - -/* ldc_rx_get_state() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_RX_GET_STATE - * ARG0: channel ID - * RET0: status - * RET1: head offset - * RET2: tail offset - * RET3: channel state - * - * Return the receive state, and the head and tail queue pointers, for - * the receive queue of the LDC endpoint defined by the given channel ID. - * The head and tail values are the byte offset of the head and tail - * positions of the receive queue for the specified endpoint. - */ -#define HV_FAST_LDC_RX_GET_STATE 0xe6 - -/* ldc_rx_set_qhead() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_RX_SET_QHEAD - * ARG0: channel ID - * ARG1: head offset - * RET0: status - * - * Update the head pointer for the receive queue associated with the LDC - * endpoint defined by the given channel ID. The head offset specified - * must be aligned on a 64 byte boundary, and calculated so as to decrease - * the number of pending entries on the receive queue. Any attempt to - * increase the number of pending receive queue entires is considered - * an invalid head offset and will result in an EINVAL error. - * - * The receive queue may be flushed by setting the head offset equal - * to the current tail offset. - */ -#define HV_FAST_LDC_RX_SET_QHEAD 0xe7 - -/* LDC Map Table Entry. Each slot is defined by a translation table - * entry, as specified by the LDC_MTE_* bits below, and a 64-bit - * hypervisor invalidation cookie. - */ -#define LDC_MTE_PADDR 0x0fffffffffffe000 /* pa[55:13] */ -#define LDC_MTE_COPY_W 0x0000000000000400 /* copy write access */ -#define LDC_MTE_COPY_R 0x0000000000000200 /* copy read access */ -#define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */ -#define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access */ -#define LDC_MTE_EXEC 0x0000000000000040 /* execute */ -#define LDC_MTE_WRITE 0x0000000000000020 /* read */ -#define LDC_MTE_READ 0x0000000000000010 /* write */ -#define LDC_MTE_SZALL 0x000000000000000f /* page size bits */ -#define LDC_MTE_SZ16GB 0x0000000000000007 /* 16GB page */ -#define LDC_MTE_SZ2GB 0x0000000000000006 /* 2GB page */ -#define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page */ -#define LDC_MTE_SZ32MB 0x0000000000000004 /* 32MB page */ -#define LDC_MTE_SZ4MB 0x0000000000000003 /* 4MB page */ -#define LDC_MTE_SZ512K 0x0000000000000002 /* 512K page */ -#define LDC_MTE_SZ64K 0x0000000000000001 /* 64K page */ -#define LDC_MTE_SZ8K 0x0000000000000000 /* 8K page */ - -#ifndef __ASSEMBLY__ -struct ldc_mtable_entry { - unsigned long mte; - unsigned long cookie; -}; -#endif - -/* ldc_set_map_table() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_SET_MAP_TABLE - * ARG0: channel ID - * ARG1: table real address - * ARG2: num entries - * RET0: status - * - * Register the MTE table at the given table real address, with the - * specified num entries, for the LDC indicated by the given channel - * ID. - */ -#define HV_FAST_LDC_SET_MAP_TABLE 0xea - -/* ldc_get_map_table() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_GET_MAP_TABLE - * ARG0: channel ID - * RET0: status - * RET1: table real address - * RET2: num entries - * - * Return the configuration of the current mapping table registered - * for the given channel ID. - */ -#define HV_FAST_LDC_GET_MAP_TABLE 0xeb - -#define LDC_COPY_IN 0 -#define LDC_COPY_OUT 1 - -/* ldc_copy() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_COPY - * ARG0: channel ID - * ARG1: LDC_COPY_* direction code - * ARG2: target real address - * ARG3: local real address - * ARG4: length in bytes - * RET0: status - * RET1: actual length in bytes - */ -#define HV_FAST_LDC_COPY 0xec - -#define LDC_MEM_READ 1 -#define LDC_MEM_WRITE 2 -#define LDC_MEM_EXEC 4 - -/* ldc_mapin() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_MAPIN - * ARG0: channel ID - * ARG1: cookie - * RET0: status - * RET1: real address - * RET2: LDC_MEM_* permissions - */ -#define HV_FAST_LDC_MAPIN 0xed - -/* ldc_unmap() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_UNMAP - * ARG0: real address - * RET0: status - */ -#define HV_FAST_LDC_UNMAP 0xee - -/* ldc_revoke() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_LDC_REVOKE - * ARG0: channel ID - * ARG1: cookie - * ARG2: ldc_mtable_entry cookie - * RET0: status - */ -#define HV_FAST_LDC_REVOKE 0xef - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel, - unsigned long ra, - unsigned long num_entries); -extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel, - unsigned long *ra, - unsigned long *num_entries); -extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel, - unsigned long *head_off, - unsigned long *tail_off, - unsigned long *chan_state); -extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel, - unsigned long tail_off); -extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel, - unsigned long ra, - unsigned long num_entries); -extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel, - unsigned long *ra, - unsigned long *num_entries); -extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel, - unsigned long *head_off, - unsigned long *tail_off, - unsigned long *chan_state); -extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel, - unsigned long head_off); -extern unsigned long sun4v_ldc_set_map_table(unsigned long channel, - unsigned long ra, - unsigned long num_entries); -extern unsigned long sun4v_ldc_get_map_table(unsigned long channel, - unsigned long *ra, - unsigned long *num_entries); -extern unsigned long sun4v_ldc_copy(unsigned long channel, - unsigned long dir_code, - unsigned long tgt_raddr, - unsigned long lcl_raddr, - unsigned long len, - unsigned long *actual_len); -extern unsigned long sun4v_ldc_mapin(unsigned long channel, - unsigned long cookie, - unsigned long *ra, - unsigned long *perm); -extern unsigned long sun4v_ldc_unmap(unsigned long ra); -extern unsigned long sun4v_ldc_revoke(unsigned long channel, - unsigned long cookie, - unsigned long mte_cookie); -#endif - -/* Performance counter services. */ - -#define HV_PERF_JBUS_PERF_CTRL_REG 0x00 -#define HV_PERF_JBUS_PERF_CNT_REG 0x01 -#define HV_PERF_DRAM_PERF_CTRL_REG_0 0x02 -#define HV_PERF_DRAM_PERF_CNT_REG_0 0x03 -#define HV_PERF_DRAM_PERF_CTRL_REG_1 0x04 -#define HV_PERF_DRAM_PERF_CNT_REG_1 0x05 -#define HV_PERF_DRAM_PERF_CTRL_REG_2 0x06 -#define HV_PERF_DRAM_PERF_CNT_REG_2 0x07 -#define HV_PERF_DRAM_PERF_CTRL_REG_3 0x08 -#define HV_PERF_DRAM_PERF_CNT_REG_3 0x09 - -/* get_perfreg() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_GET_PERFREG - * ARG0: performance reg number - * RET0: status - * RET1: performance reg value - * ERRORS: EINVAL Invalid performance register number - * ENOACCESS No access allowed to performance counters - * - * Read the value of the given DRAM/JBUS performance counter/control register. - */ -#define HV_FAST_GET_PERFREG 0x100 - -/* set_perfreg() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_SET_PERFREG - * ARG0: performance reg number - * ARG1: performance reg value - * RET0: status - * ERRORS: EINVAL Invalid performance register number - * ENOACCESS No access allowed to performance counters - * - * Write the given performance reg value to the given DRAM/JBUS - * performance counter/control register. - */ -#define HV_FAST_SET_PERFREG 0x101 - -/* MMU statistics services. - * - * The hypervisor maintains MMU statistics and privileged code provides - * a buffer where these statistics can be collected. It is continually - * updated once configured. The layout is as follows: - */ -#ifndef __ASSEMBLY__ -struct hv_mmu_statistics { - unsigned long immu_tsb_hits_ctx0_8k_tte; - unsigned long immu_tsb_ticks_ctx0_8k_tte; - unsigned long immu_tsb_hits_ctx0_64k_tte; - unsigned long immu_tsb_ticks_ctx0_64k_tte; - unsigned long __reserved1[2]; - unsigned long immu_tsb_hits_ctx0_4mb_tte; - unsigned long immu_tsb_ticks_ctx0_4mb_tte; - unsigned long __reserved2[2]; - unsigned long immu_tsb_hits_ctx0_256mb_tte; - unsigned long immu_tsb_ticks_ctx0_256mb_tte; - unsigned long __reserved3[4]; - unsigned long immu_tsb_hits_ctxnon0_8k_tte; - unsigned long immu_tsb_ticks_ctxnon0_8k_tte; - unsigned long immu_tsb_hits_ctxnon0_64k_tte; - unsigned long immu_tsb_ticks_ctxnon0_64k_tte; - unsigned long __reserved4[2]; - unsigned long immu_tsb_hits_ctxnon0_4mb_tte; - unsigned long immu_tsb_ticks_ctxnon0_4mb_tte; - unsigned long __reserved5[2]; - unsigned long immu_tsb_hits_ctxnon0_256mb_tte; - unsigned long immu_tsb_ticks_ctxnon0_256mb_tte; - unsigned long __reserved6[4]; - unsigned long dmmu_tsb_hits_ctx0_8k_tte; - unsigned long dmmu_tsb_ticks_ctx0_8k_tte; - unsigned long dmmu_tsb_hits_ctx0_64k_tte; - unsigned long dmmu_tsb_ticks_ctx0_64k_tte; - unsigned long __reserved7[2]; - unsigned long dmmu_tsb_hits_ctx0_4mb_tte; - unsigned long dmmu_tsb_ticks_ctx0_4mb_tte; - unsigned long __reserved8[2]; - unsigned long dmmu_tsb_hits_ctx0_256mb_tte; - unsigned long dmmu_tsb_ticks_ctx0_256mb_tte; - unsigned long __reserved9[4]; - unsigned long dmmu_tsb_hits_ctxnon0_8k_tte; - unsigned long dmmu_tsb_ticks_ctxnon0_8k_tte; - unsigned long dmmu_tsb_hits_ctxnon0_64k_tte; - unsigned long dmmu_tsb_ticks_ctxnon0_64k_tte; - unsigned long __reserved10[2]; - unsigned long dmmu_tsb_hits_ctxnon0_4mb_tte; - unsigned long dmmu_tsb_ticks_ctxnon0_4mb_tte; - unsigned long __reserved11[2]; - unsigned long dmmu_tsb_hits_ctxnon0_256mb_tte; - unsigned long dmmu_tsb_ticks_ctxnon0_256mb_tte; - unsigned long __reserved12[4]; -}; -#endif - -/* mmustat_conf() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMUSTAT_CONF - * ARG0: real address - * RET0: status - * RET1: real address - * ERRORS: ENORADDR Invalid real address - * EBADALIGN Real address not aligned on 64-byte boundary - * EBADTRAP API not supported on this processor - * - * Enable MMU statistic gathering using the buffer at the given real - * address on the current virtual CPU. The new buffer real address - * is given in ARG1, and the previously specified buffer real address - * is returned in RET1, or is returned as zero for the first invocation. - * - * If the passed in real address argument is zero, this will disable - * MMU statistic collection on the current virtual CPU. If an error is - * returned then no statistics are collected. - * - * The buffer contents should be initialized to all zeros before being - * given to the hypervisor or else the statistics will be meaningless. - */ -#define HV_FAST_MMUSTAT_CONF 0x102 - -/* mmustat_info() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_MMUSTAT_INFO - * RET0: status - * RET1: real address - * ERRORS: EBADTRAP API not supported on this processor - * - * Return the current state and real address of the currently configured - * MMU statistics buffer on the current virtual CPU. - */ -#define HV_FAST_MMUSTAT_INFO 0x103 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_mmustat_conf(unsigned long ra, unsigned long *orig_ra); -extern unsigned long sun4v_mmustat_info(unsigned long *ra); -#endif - -/* NCS crypto services */ - -/* ncs_request() sub-function numbers */ -#define HV_NCS_QCONF 0x01 -#define HV_NCS_QTAIL_UPDATE 0x02 - -#ifndef __ASSEMBLY__ -struct hv_ncs_queue_entry { - /* MAU Control Register */ - unsigned long mau_control; -#define MAU_CONTROL_INV_PARITY 0x0000000000002000 -#define MAU_CONTROL_STRAND 0x0000000000001800 -#define MAU_CONTROL_BUSY 0x0000000000000400 -#define MAU_CONTROL_INT 0x0000000000000200 -#define MAU_CONTROL_OP 0x00000000000001c0 -#define MAU_CONTROL_OP_SHIFT 6 -#define MAU_OP_LOAD_MA_MEMORY 0x0 -#define MAU_OP_STORE_MA_MEMORY 0x1 -#define MAU_OP_MODULAR_MULT 0x2 -#define MAU_OP_MODULAR_REDUCE 0x3 -#define MAU_OP_MODULAR_EXP_LOOP 0x4 -#define MAU_CONTROL_LEN 0x000000000000003f -#define MAU_CONTROL_LEN_SHIFT 0 - - /* Real address of bytes to load or store bytes - * into/out-of the MAU. - */ - unsigned long mau_mpa; - - /* Modular Arithmetic MA Offset Register. */ - unsigned long mau_ma; - - /* Modular Arithmetic N Prime Register. */ - unsigned long mau_np; -}; - -struct hv_ncs_qconf_arg { - unsigned long mid; /* MAU ID, 1 per core on Niagara */ - unsigned long base; /* Real address base of queue */ - unsigned long end; /* Real address end of queue */ - unsigned long num_ents; /* Number of entries in queue */ -}; - -struct hv_ncs_qtail_update_arg { - unsigned long mid; /* MAU ID, 1 per core on Niagara */ - unsigned long tail; /* New tail index to use */ - unsigned long syncflag; /* only SYNCFLAG_SYNC is implemented */ -#define HV_NCS_SYNCFLAG_SYNC 0x00 -#define HV_NCS_SYNCFLAG_ASYNC 0x01 -}; -#endif - -/* ncs_request() - * TRAP: HV_FAST_TRAP - * FUNCTION: HV_FAST_NCS_REQUEST - * ARG0: NCS sub-function - * ARG1: sub-function argument real address - * ARG2: size in bytes of sub-function argument - * RET0: status - * - * The MAU chip of the Niagara processor is not directly accessible - * to privileged code, instead it is programmed indirectly via this - * hypervisor API. - * - * The interfaces defines a queue of MAU operations to perform. - * Privileged code registers a queue with the hypervisor by invoking - * this HVAPI with the HV_NCS_QCONF sub-function, which defines the - * base, end, and number of entries of the queue. Each queue entry - * contains a MAU register struct block. - * - * The privileged code then proceeds to add entries to the queue and - * then invoke the HV_NCS_QTAIL_UPDATE sub-function. Since only - * synchronous operations are supported by the current hypervisor, - * HV_NCS_QTAIL_UPDATE will run all the pending queue entries to - * completion and return HV_EOK, or return an error code. - * - * The real address of the sub-function argument must be aligned on at - * least an 8-byte boundary. - * - * The tail argument of HV_NCS_QTAIL_UPDATE is an index, not a byte - * offset, into the queue and must be less than or equal the 'num_ents' - * argument given in the HV_NCS_QCONF call. - */ -#define HV_FAST_NCS_REQUEST 0x110 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_ncs_request(unsigned long request, - unsigned long arg_ra, - unsigned long arg_size); -#endif - -#define HV_FAST_FIRE_GET_PERFREG 0x120 -#define HV_FAST_FIRE_SET_PERFREG 0x121 - -/* Function numbers for HV_CORE_TRAP. */ -#define HV_CORE_SET_VER 0x00 -#define HV_CORE_PUTCHAR 0x01 -#define HV_CORE_EXIT 0x02 -#define HV_CORE_GET_VER 0x03 - -/* Hypervisor API groups for use with HV_CORE_SET_VER and - * HV_CORE_GET_VER. - */ -#define HV_GRP_SUN4V 0x0000 -#define HV_GRP_CORE 0x0001 -#define HV_GRP_INTR 0x0002 -#define HV_GRP_SOFT_STATE 0x0003 -#define HV_GRP_PCI 0x0100 -#define HV_GRP_LDOM 0x0101 -#define HV_GRP_SVC_CHAN 0x0102 -#define HV_GRP_NCS 0x0103 -#define HV_GRP_RNG 0x0104 -#define HV_GRP_NIAG_PERF 0x0200 -#define HV_GRP_FIRE_PERF 0x0201 -#define HV_GRP_N2_CPU 0x0202 -#define HV_GRP_NIU 0x0204 -#define HV_GRP_VF_CPU 0x0205 -#define HV_GRP_DIAG 0x0300 - -#ifndef __ASSEMBLY__ -extern unsigned long sun4v_get_version(unsigned long group, - unsigned long *major, - unsigned long *minor); -extern unsigned long sun4v_set_version(unsigned long group, - unsigned long major, - unsigned long minor, - unsigned long *actual_minor); - -extern int sun4v_hvapi_register(unsigned long group, unsigned long major, - unsigned long *minor); -extern void sun4v_hvapi_unregister(unsigned long group); -extern int sun4v_hvapi_get(unsigned long group, - unsigned long *major, - unsigned long *minor); -extern void sun4v_hvapi_init(void); -#endif - -#endif /* !(_SPARC64_HYPERVISOR_H) */ diff --git a/include/asm-sparc/ide.h b/include/asm-sparc/ide.h deleted file mode 100644 index b7af3d6..0000000 --- a/include/asm-sparc/ide.h +++ /dev/null @@ -1,97 +0,0 @@ -/* ide.h: SPARC PCI specific IDE glue. - * - * Copyright (C) 1997 David S. Miller (davem@davemloft.net) - * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) - * Adaptation from sparc64 version to sparc by Pete Zaitcev. - */ - -#ifndef _SPARC_IDE_H -#define _SPARC_IDE_H - -#ifdef __KERNEL__ - -#include -#ifdef CONFIG_SPARC64 -#include -#include -#include -#include -#else -#include -#include -#endif - -#define __ide_insl(data_reg, buffer, wcount) \ - __ide_insw(data_reg, buffer, (wcount)<<1) -#define __ide_outsl(data_reg, buffer, wcount) \ - __ide_outsw(data_reg, buffer, (wcount)<<1) - -/* On sparc, I/O ports and MMIO registers are accessed identically. */ -#define __ide_mm_insw __ide_insw -#define __ide_mm_insl __ide_insl -#define __ide_mm_outsw __ide_outsw -#define __ide_mm_outsl __ide_outsl - -static inline void __ide_insw(void __iomem *port, void *dst, u32 count) -{ -#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) - unsigned long end = (unsigned long)dst + (count << 1); -#endif - u16 *ps = dst; - u32 *pi; - - if(((unsigned long)ps) & 0x2) { - *ps++ = __raw_readw(port); - count--; - } - pi = (u32 *)ps; - while(count >= 2) { - u32 w; - - w = __raw_readw(port) << 16; - w |= __raw_readw(port); - *pi++ = w; - count -= 2; - } - ps = (u16 *)pi; - if(count) - *ps++ = __raw_readw(port); - -#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) - __flush_dcache_range((unsigned long)dst, end); -#endif -} - -static inline void __ide_outsw(void __iomem *port, const void *src, u32 count) -{ -#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) - unsigned long end = (unsigned long)src + (count << 1); -#endif - const u16 *ps = src; - const u32 *pi; - - if(((unsigned long)src) & 0x2) { - __raw_writew(*ps++, port); - count--; - } - pi = (const u32 *)ps; - while(count >= 2) { - u32 w; - - w = *pi++; - __raw_writew((w >> 16), port); - __raw_writew(w, port); - count -= 2; - } - ps = (const u16 *)pi; - if(count) - __raw_writew(*ps, port); - -#if defined(CONFIG_SPARC64) && defined(DCACHE_ALIASING_POSSIBLE) - __flush_dcache_range((unsigned long)src, end); -#endif -} - -#endif /* __KERNEL__ */ - -#endif /* _SPARC_IDE_H */ diff --git a/include/asm-sparc/idprom.h b/include/asm-sparc/idprom.h deleted file mode 100644 index 6976aa2..0000000 --- a/include/asm-sparc/idprom.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * idprom.h: Macros and defines for idprom routines - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_IDPROM_H -#define _SPARC_IDPROM_H - -#include - -struct idprom { - u8 id_format; /* Format identifier (always 0x01) */ - u8 id_machtype; /* Machine type */ - u8 id_ethaddr[6]; /* Hardware ethernet address */ - s32 id_date; /* Date of manufacture */ - u32 id_sernum:24; /* Unique serial number */ - u8 id_cksum; /* Checksum - xor of the data bytes */ - u8 reserved[16]; -}; - -extern struct idprom *idprom; -extern void idprom_init(void); - -#endif /* !(_SPARC_IDPROM_H) */ diff --git a/include/asm-sparc/intr_queue.h b/include/asm-sparc/intr_queue.h deleted file mode 100644 index 206077d..0000000 --- a/include/asm-sparc/intr_queue.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _SPARC64_INTR_QUEUE_H -#define _SPARC64_INTR_QUEUE_H - -/* Sun4v interrupt queue registers, accessed via ASI_QUEUE. */ - -#define INTRQ_CPU_MONDO_HEAD 0x3c0 /* CPU mondo head */ -#define INTRQ_CPU_MONDO_TAIL 0x3c8 /* CPU mondo tail */ -#define INTRQ_DEVICE_MONDO_HEAD 0x3d0 /* Device mondo head */ -#define INTRQ_DEVICE_MONDO_TAIL 0x3d8 /* Device mondo tail */ -#define INTRQ_RESUM_MONDO_HEAD 0x3e0 /* Resumable error mondo head */ -#define INTRQ_RESUM_MONDO_TAIL 0x3e8 /* Resumable error mondo tail */ -#define INTRQ_NONRESUM_MONDO_HEAD 0x3f0 /* Non-resumable error mondo head */ -#define INTRQ_NONRESUM_MONDO_TAIL 0x3f8 /* Non-resumable error mondo head */ - -#endif /* !(_SPARC64_INTR_QUEUE_H) */ diff --git a/include/asm-sparc/io-unit.h b/include/asm-sparc/io-unit.h deleted file mode 100644 index 96823b4..0000000 --- a/include/asm-sparc/io-unit.h +++ /dev/null @@ -1,62 +0,0 @@ -/* io-unit.h: Definitions for the sun4d IO-UNIT. - * - * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ -#ifndef _SPARC_IO_UNIT_H -#define _SPARC_IO_UNIT_H - -#include -#include -#include - -/* The io-unit handles all virtual to physical address translations - * that occur between the SBUS and physical memory. Access by - * the cpu to IO registers and similar go over the xdbus so are - * translated by the on chip SRMMU. The io-unit and the srmmu do - * not need to have the same translations at all, in fact most - * of the time the translations they handle are a disjunct set. - * Basically the io-unit handles all dvma sbus activity. - */ - -/* AIEEE, unlike the nice sun4m, these monsters have - fixed DMA range 64M */ - -#define IOUNIT_DMA_BASE 0xfc000000 /* TOP - 64M */ -#define IOUNIT_DMA_SIZE 0x04000000 /* 64M */ -/* We use last 1M for sparc_dvma_malloc */ -#define IOUNIT_DVMA_SIZE 0x00100000 /* 1M */ - -/* The format of an iopte in the external page tables */ -#define IOUPTE_PAGE 0xffffff00 /* Physical page number (PA[35:12]) */ -#define IOUPTE_CACHE 0x00000080 /* Cached (in Viking/MXCC) */ -/* XXX Jakub, find out how to program SBUS streaming cache on XDBUS/sun4d. - * XXX Actually, all you should need to do is find out where the registers - * XXX are and copy over the sparc64 implementation I wrote. There may be - * XXX some horrible hwbugs though, so be careful. -DaveM - */ -#define IOUPTE_STREAM 0x00000040 /* Translation can use streaming cache */ -#define IOUPTE_INTRA 0x00000008 /* SBUS direct slot->slot transfer */ -#define IOUPTE_WRITE 0x00000004 /* Writeable */ -#define IOUPTE_VALID 0x00000002 /* IOPTE is valid */ -#define IOUPTE_PARITY 0x00000001 /* Parity is checked during DVMA */ - -struct iounit_struct { - unsigned long bmap[(IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 3)) / sizeof(unsigned long)]; - spinlock_t lock; - iopte_t *page_table; - unsigned long rotor[3]; - unsigned long limit[4]; -}; - -#define IOUNIT_BMAP1_START 0x00000000 -#define IOUNIT_BMAP1_END (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 1)) -#define IOUNIT_BMAP2_START IOUNIT_BMAP1_END -#define IOUNIT_BMAP2_END IOUNIT_BMAP2_START + (IOUNIT_DMA_SIZE >> (PAGE_SHIFT + 2)) -#define IOUNIT_BMAPM_START IOUNIT_BMAP2_END -#define IOUNIT_BMAPM_END ((IOUNIT_DMA_SIZE - IOUNIT_DVMA_SIZE) >> PAGE_SHIFT) - -extern __u32 iounit_map_dma_init(struct sbus_bus *, int); -#define iounit_map_dma_finish(sbus, addr, len) mmu_release_scsi_one(addr, len, sbus) -extern __u32 iounit_map_dma_page(__u32, void *, struct sbus_bus *); - -#endif /* !(_SPARC_IO_UNIT_H) */ diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h deleted file mode 100644 index fc9024d..0000000 --- a/include/asm-sparc/io.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_IO_H -#define ___ASM_SPARC_IO_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/io_32.h b/include/asm-sparc/io_32.h deleted file mode 100644 index 10d7da4..0000000 --- a/include/asm-sparc/io_32.h +++ /dev/null @@ -1,326 +0,0 @@ -#ifndef __SPARC_IO_H -#define __SPARC_IO_H - -#include -#include -#include /* struct resource */ - -#include /* IO address mapping routines need this */ -#include - -#define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) - -static inline u32 flip_dword (u32 l) -{ - return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); -} - -static inline u16 flip_word (u16 w) -{ - return ((w&0xff) << 8) | ((w>>8)&0xff); -} - -#define mmiowb() - -/* - * Memory mapped I/O to PCI - */ - -static inline u8 __raw_readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 __raw_readw(const volatile void __iomem *addr) -{ - return *(__force volatile u16 *)addr; -} - -static inline u32 __raw_readl(const volatile void __iomem *addr) -{ - return *(__force volatile u32 *)addr; -} - -static inline void __raw_writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void __raw_writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = w; -} - -static inline void __raw_writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = l; -} - -static inline u8 __readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 __readw(const volatile void __iomem *addr) -{ - return flip_word(*(__force volatile u16 *)addr); -} - -static inline u32 __readl(const volatile void __iomem *addr) -{ - return flip_dword(*(__force volatile u32 *)addr); -} - -static inline void __writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void __writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = flip_word(w); -} - -static inline void __writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = flip_dword(l); -} - -#define readb(__addr) __readb(__addr) -#define readw(__addr) __readw(__addr) -#define readl(__addr) __readl(__addr) -#define readb_relaxed(__addr) readb(__addr) -#define readw_relaxed(__addr) readw(__addr) -#define readl_relaxed(__addr) readl(__addr) - -#define writeb(__b, __addr) __writeb((__b),(__addr)) -#define writew(__w, __addr) __writew((__w),(__addr)) -#define writel(__l, __addr) __writel((__l),(__addr)) - -/* - * I/O space operations - * - * Arrangement on a Sun is somewhat complicated. - * - * First of all, we want to use standard Linux drivers - * for keyboard, PC serial, etc. These drivers think - * they access I/O space and use inb/outb. - * On the other hand, EBus bridge accepts PCI *memory* - * cycles and converts them into ISA *I/O* cycles. - * Ergo, we want inb & outb to generate PCI memory cycles. - * - * If we want to issue PCI *I/O* cycles, we do this - * with a low 64K fixed window in PCIC. This window gets - * mapped somewhere into virtual kernel space and we - * can use inb/outb again. - */ -#define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) -#define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) -#define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) -#define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) - -#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) -#define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) -#define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) -#define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) - -#define inb_p(__addr) inb(__addr) -#define outb_p(__b, __addr) outb(__b, __addr) -#define inw_p(__addr) inw(__addr) -#define outw_p(__w, __addr) outw(__w, __addr) -#define inl_p(__addr) inl(__addr) -#define outl_p(__l, __addr) outl(__l, __addr) - -void outsb(unsigned long addr, const void *src, unsigned long cnt); -void outsw(unsigned long addr, const void *src, unsigned long cnt); -void outsl(unsigned long addr, const void *src, unsigned long cnt); -void insb(unsigned long addr, void *dst, unsigned long count); -void insw(unsigned long addr, void *dst, unsigned long count); -void insl(unsigned long addr, void *dst, unsigned long count); - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * SBus accessors. - * - * SBus has only one, memory mapped, I/O space. - * We do not need to flip bytes for SBus of course. - */ -static inline u8 _sbus_readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 _sbus_readw(const volatile void __iomem *addr) -{ - return *(__force volatile u16 *)addr; -} - -static inline u32 _sbus_readl(const volatile void __iomem *addr) -{ - return *(__force volatile u32 *)addr; -} - -static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void _sbus_writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = w; -} - -static inline void _sbus_writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = l; -} - -/* - * The only reason for #define's is to hide casts to unsigned long. - */ -#define sbus_readb(__addr) _sbus_readb(__addr) -#define sbus_readw(__addr) _sbus_readw(__addr) -#define sbus_readl(__addr) _sbus_readl(__addr) -#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) -#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) -#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) - -static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) -{ - while(n--) { - sbus_writeb(c, __dst); - __dst++; - } -} - -static inline void -_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - volatile void __iomem *d = dst; - - while (n--) { - writeb(c, d); - d++; - } -} - -#define memset_io(d,c,sz) _memset_io(d,c,sz) - -static inline void -_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) -{ - char *d = dst; - - while (n--) { - char tmp = readb(src); - *d++ = tmp; - src++; - } -} - -#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) - -static inline void -_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) -{ - const char *s = src; - volatile void __iomem *d = dst; - - while (n--) { - char tmp = *s++; - writeb(tmp, d); - d++; - } -} - -#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) - -#ifdef __KERNEL__ - -/* - * Bus number may be embedded in the higher bits of the physical address. - * This is why we have no bus number argument to ioremap(). - */ -extern void __iomem *ioremap(unsigned long offset, unsigned long size); -#define ioremap_nocache(X,Y) ioremap((X),(Y)) -#define ioremap_wc(X,Y) ioremap((X),(Y)) -extern void iounmap(volatile void __iomem *addr); - -#define ioread8(X) readb(X) -#define ioread16(X) readw(X) -#define ioread32(X) readl(X) -#define iowrite8(val,X) writeb(val,X) -#define iowrite16(val,X) writew(val,X) -#define iowrite32(val,X) writel(val,X) - -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) -{ - insb((unsigned long __force)port, buf, count); -} -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) -{ - insw((unsigned long __force)port, buf, count); -} - -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) -{ - insl((unsigned long __force)port, buf, count); -} - -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsb((unsigned long __force)port, buf, count); -} - -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsw((unsigned long __force)port, buf, count); -} - -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsl((unsigned long __force)port, buf, count); -} - -/* Create a virtual mapping cookie for an IO port range */ -extern void __iomem *ioport_map(unsigned long port, unsigned int nr); -extern void ioport_unmap(void __iomem *); - -/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ -struct pci_dev; -extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); -extern void pci_iounmap(struct pci_dev *dev, void __iomem *); - -/* - * Bus number may be in res->flags... somewhere. - */ -extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, - unsigned long size, char *name); -extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); - - -/* - * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, - * so rtc_port is static in it. This should not change unless a new - * hardware pops up. - */ -#define RTC_PORT(x) (rtc_port + (x)) -#define RTC_ALWAYS_BCD 0 - -#endif - -#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* !(__SPARC_IO_H) */ diff --git a/include/asm-sparc/io_64.h b/include/asm-sparc/io_64.h deleted file mode 100644 index 0bff078..0000000 --- a/include/asm-sparc/io_64.h +++ /dev/null @@ -1,511 +0,0 @@ -#ifndef __SPARC64_IO_H -#define __SPARC64_IO_H - -#include -#include -#include - -#include /* IO address mapping routines need this */ -#include -#include - -/* PC crapola... */ -#define __SLOW_DOWN_IO do { } while (0) -#define SLOW_DOWN_IO do { } while (0) - -/* BIO layer definitions. */ -extern unsigned long kern_base, kern_size; -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -static inline u8 _inb(unsigned long addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u16 _inw(unsigned long addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u32 _inl(unsigned long addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline void _outb(u8 b, unsigned long addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _outw(u16 w, unsigned long addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _outl(u32 l, unsigned long addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -#define inb(__addr) (_inb((unsigned long)(__addr))) -#define inw(__addr) (_inw((unsigned long)(__addr))) -#define inl(__addr) (_inl((unsigned long)(__addr))) -#define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr))) -#define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr))) -#define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr))) - -#define inb_p(__addr) inb(__addr) -#define outb_p(__b, __addr) outb(__b, __addr) -#define inw_p(__addr) inw(__addr) -#define outw_p(__w, __addr) outw(__w, __addr) -#define inl_p(__addr) inl(__addr) -#define outl_p(__l, __addr) outl(__l, __addr) - -extern void outsb(unsigned long, const void *, unsigned long); -extern void outsw(unsigned long, const void *, unsigned long); -extern void outsl(unsigned long, const void *, unsigned long); -extern void insb(unsigned long, void *, unsigned long); -extern void insw(unsigned long, void *, unsigned long); -extern void insl(unsigned long, void *, unsigned long); - -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) -{ - insb((unsigned long __force)port, buf, count); -} -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) -{ - insw((unsigned long __force)port, buf, count); -} - -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) -{ - insl((unsigned long __force)port, buf, count); -} - -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsb((unsigned long __force)port, buf, count); -} - -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsw((unsigned long __force)port, buf, count); -} - -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsl((unsigned long __force)port, buf, count); -} - -/* Memory functions, same as I/O accesses on Ultra. */ -static inline u8 _readb(const volatile void __iomem *addr) -{ u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - return ret; -} - -static inline u16 _readw(const volatile void __iomem *addr) -{ u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u32 _readl(const volatile void __iomem *addr) -{ u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u64 _readq(const volatile void __iomem *addr) -{ u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline void _writeb(u8 b, volatile void __iomem *addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writew(u16 w, volatile void __iomem *addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writel(u32 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writeq(u64 q, volatile void __iomem *addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" - : /* no outputs */ - : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -#define readb(__addr) _readb(__addr) -#define readw(__addr) _readw(__addr) -#define readl(__addr) _readl(__addr) -#define readq(__addr) _readq(__addr) -#define readb_relaxed(__addr) _readb(__addr) -#define readw_relaxed(__addr) _readw(__addr) -#define readl_relaxed(__addr) _readl(__addr) -#define readq_relaxed(__addr) _readq(__addr) -#define writeb(__b, __addr) _writeb(__b, __addr) -#define writew(__w, __addr) _writew(__w, __addr) -#define writel(__l, __addr) _writel(__l, __addr) -#define writeq(__q, __addr) _writeq(__q, __addr) - -/* Now versions without byte-swapping. */ -static inline u8 _raw_readb(unsigned long addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u16 _raw_readw(unsigned long addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u32 _raw_readl(unsigned long addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u64 _raw_readq(unsigned long addr) -{ - u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline void _raw_writeb(u8 b, unsigned long addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writew(u16 w, unsigned long addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writel(u32 l, unsigned long addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writeq(u64 q, unsigned long addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" - : /* no outputs */ - : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -#define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr))) -#define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr))) -#define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr))) -#define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr))) -#define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr))) -#define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr))) -#define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr))) -#define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr))) - -/* Valid I/O Space regions are anywhere, because each PCI bus supported - * can live in an arbitrary area of the physical address range. - */ -#define IO_SPACE_LIMIT 0xffffffffffffffffUL - -/* Now, SBUS variants, only difference from PCI is that we do - * not use little-endian ASIs. - */ -static inline u8 _sbus_readb(const volatile void __iomem *addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u16 _sbus_readw(const volatile void __iomem *addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u32 _sbus_readl(const volatile void __iomem *addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u64 _sbus_readq(const volatile void __iomem *addr) -{ - u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writew(u16 w, volatile void __iomem *addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writel(u32 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -#define sbus_readb(__addr) _sbus_readb(__addr) -#define sbus_readw(__addr) _sbus_readw(__addr) -#define sbus_readl(__addr) _sbus_readl(__addr) -#define sbus_readq(__addr) _sbus_readq(__addr) -#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) -#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) -#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) -#define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr) - -static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - while(n--) { - sbus_writeb(c, dst); - dst++; - } -} - -#define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz) - -static inline void -_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - volatile void __iomem *d = dst; - - while (n--) { - writeb(c, d); - d++; - } -} - -#define memset_io(d,c,sz) _memset_io(d,c,sz) - -static inline void -_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) -{ - char *d = dst; - - while (n--) { - char tmp = readb(src); - *d++ = tmp; - src++; - } -} - -#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) - -static inline void -_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) -{ - const char *s = src; - volatile void __iomem *d = dst; - - while (n--) { - char tmp = *s++; - writeb(tmp, d); - d++; - } -} - -#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) - -#define mmiowb() - -#ifdef __KERNEL__ - -/* On sparc64 we have the whole physical IO address space accessible - * using physically addressed loads and stores, so this does nothing. - */ -static inline void __iomem *ioremap(unsigned long offset, unsigned long size) -{ - return (void __iomem *)offset; -} - -#define ioremap_nocache(X,Y) ioremap((X),(Y)) -#define ioremap_wc(X,Y) ioremap((X),(Y)) - -static inline void iounmap(volatile void __iomem *addr) -{ -} - -#define ioread8(X) readb(X) -#define ioread16(X) readw(X) -#define ioread32(X) readl(X) -#define iowrite8(val,X) writeb(val,X) -#define iowrite16(val,X) writew(val,X) -#define iowrite32(val,X) writel(val,X) - -/* Create a virtual mapping cookie for an IO port range */ -extern void __iomem *ioport_map(unsigned long port, unsigned int nr); -extern void ioport_unmap(void __iomem *); - -/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ -struct pci_dev; -extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); -extern void pci_iounmap(struct pci_dev *dev, void __iomem *); - -/* Similarly for SBUS. */ -#define sbus_ioremap(__res, __offset, __size, __name) \ -({ unsigned long __ret; \ - __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \ - __ret += (unsigned long) (__offset); \ - if (! request_region((__ret), (__size), (__name))) \ - __ret = 0UL; \ - (void __iomem *) __ret; \ -}) - -#define sbus_iounmap(__addr, __size) \ - release_region((unsigned long)(__addr), (__size)) - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif - -#endif /* !(__SPARC64_IO_H) */ diff --git a/include/asm-sparc/ioctl.h b/include/asm-sparc/ioctl.h deleted file mode 100644 index 7d6bd51..0000000 --- a/include/asm-sparc/ioctl.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef _SPARC_IOCTL_H -#define _SPARC_IOCTL_H - -/* - * Our DIR and SIZE overlap in order to simulteneously provide - * a non-zero _IOC_NONE (for binary compatibility) and - * 14 bits of size as on i386. Here's the layout: - * - * 0xE0000000 DIR - * 0x80000000 DIR = WRITE - * 0x40000000 DIR = READ - * 0x20000000 DIR = NONE - * 0x3FFF0000 SIZE (overlaps NONE bit) - * 0x0000FF00 TYPE - * 0x000000FF NR (CMD) - */ - -#define _IOC_NRBITS 8 -#define _IOC_TYPEBITS 8 -#define _IOC_SIZEBITS 13 /* Actually 14, see below. */ -#define _IOC_DIRBITS 3 - -#define _IOC_NRMASK ((1 << _IOC_NRBITS)-1) -#define _IOC_TYPEMASK ((1 << _IOC_TYPEBITS)-1) -#define _IOC_SIZEMASK ((1 << _IOC_SIZEBITS)-1) -#define _IOC_XSIZEMASK ((1 << (_IOC_SIZEBITS+1))-1) -#define _IOC_DIRMASK ((1 << _IOC_DIRBITS)-1) - -#define _IOC_NRSHIFT 0 -#define _IOC_TYPESHIFT (_IOC_NRSHIFT + _IOC_NRBITS) -#define _IOC_SIZESHIFT (_IOC_TYPESHIFT + _IOC_TYPEBITS) -#define _IOC_DIRSHIFT (_IOC_SIZESHIFT + _IOC_SIZEBITS) - -#define _IOC_NONE 1U -#define _IOC_READ 2U -#define _IOC_WRITE 4U - -#define _IOC(dir,type,nr,size) \ - (((dir) << _IOC_DIRSHIFT) | \ - ((type) << _IOC_TYPESHIFT) | \ - ((nr) << _IOC_NRSHIFT) | \ - ((size) << _IOC_SIZESHIFT)) - -#define _IO(type,nr) _IOC(_IOC_NONE,(type),(nr),0) -#define _IOR(type,nr,size) _IOC(_IOC_READ,(type),(nr),sizeof(size)) -#define _IOW(type,nr,size) _IOC(_IOC_WRITE,(type),(nr),sizeof(size)) -#define _IOWR(type,nr,size) _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),sizeof(size)) - -/* Used to decode ioctl numbers in drivers despite the leading underscore... */ -#define _IOC_DIR(nr) \ - ( (((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) != 0)? \ - (((nr) >> _IOC_DIRSHIFT) & (_IOC_WRITE|_IOC_READ)): \ - (((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) ) -#define _IOC_TYPE(nr) (((nr) >> _IOC_TYPESHIFT) & _IOC_TYPEMASK) -#define _IOC_NR(nr) (((nr) >> _IOC_NRSHIFT) & _IOC_NRMASK) -#define _IOC_SIZE(nr) \ - ((((((nr) >> _IOC_DIRSHIFT) & _IOC_DIRMASK) & (_IOC_WRITE|_IOC_READ)) == 0)? \ - 0: (((nr) >> _IOC_SIZESHIFT) & _IOC_XSIZEMASK)) - -/* ...and for the PCMCIA and sound. */ -#define IOC_IN (_IOC_WRITE << _IOC_DIRSHIFT) -#define IOC_OUT (_IOC_READ << _IOC_DIRSHIFT) -#define IOC_INOUT ((_IOC_WRITE|_IOC_READ) << _IOC_DIRSHIFT) -#define IOCSIZE_MASK (_IOC_XSIZEMASK << _IOC_SIZESHIFT) -#define IOCSIZE_SHIFT (_IOC_SIZESHIFT) - -#endif /* !(_SPARC_IOCTL_H) */ diff --git a/include/asm-sparc/ioctls.h b/include/asm-sparc/ioctls.h deleted file mode 100644 index 1fe6855..0000000 --- a/include/asm-sparc/ioctls.h +++ /dev/null @@ -1,136 +0,0 @@ -#ifndef _ASM_SPARC_IOCTLS_H -#define _ASM_SPARC_IOCTLS_H - -#include - -/* Big T */ -#define TCGETA _IOR('T', 1, struct termio) -#define TCSETA _IOW('T', 2, struct termio) -#define TCSETAW _IOW('T', 3, struct termio) -#define TCSETAF _IOW('T', 4, struct termio) -#define TCSBRK _IO('T', 5) -#define TCXONC _IO('T', 6) -#define TCFLSH _IO('T', 7) -#define TCGETS _IOR('T', 8, struct termios) -#define TCSETS _IOW('T', 9, struct termios) -#define TCSETSW _IOW('T', 10, struct termios) -#define TCSETSF _IOW('T', 11, struct termios) -#define TCGETS2 _IOR('T', 12, struct termios2) -#define TCSETS2 _IOW('T', 13, struct termios2) -#define TCSETSW2 _IOW('T', 14, struct termios2) -#define TCSETSF2 _IOW('T', 15, struct termios2) - -/* Note that all the ioctls that are not available in Linux have a - * double underscore on the front to: a) avoid some programs to - * think we support some ioctls under Linux (autoconfiguration stuff) - */ -/* Little t */ -#define TIOCGETD _IOR('t', 0, int) -#define TIOCSETD _IOW('t', 1, int) -#define __TIOCHPCL _IO('t', 2) /* SunOS Specific */ -#define __TIOCMODG _IOR('t', 3, int) /* SunOS Specific */ -#define __TIOCMODS _IOW('t', 4, int) /* SunOS Specific */ -#define __TIOCGETP _IOR('t', 8, struct sgttyb) /* SunOS Specific */ -#define __TIOCSETP _IOW('t', 9, struct sgttyb) /* SunOS Specific */ -#define __TIOCSETN _IOW('t', 10, struct sgttyb) /* SunOS Specific */ -#define TIOCEXCL _IO('t', 13) -#define TIOCNXCL _IO('t', 14) -#define __TIOCFLUSH _IOW('t', 16, int) /* SunOS Specific */ -#define __TIOCSETC _IOW('t', 17, struct tchars) /* SunOS Specific */ -#define __TIOCGETC _IOR('t', 18, struct tchars) /* SunOS Specific */ -#define __TIOCTCNTL _IOW('t', 32, int) /* SunOS Specific */ -#define __TIOCSIGNAL _IOW('t', 33, int) /* SunOS Specific */ -#define __TIOCSETX _IOW('t', 34, int) /* SunOS Specific */ -#define __TIOCGETX _IOR('t', 35, int) /* SunOS Specific */ -#define TIOCCONS _IO('t', 36) -#define TIOCGSOFTCAR _IOR('t', 100, int) -#define TIOCSSOFTCAR _IOW('t', 101, int) -#define __TIOCUCNTL _IOW('t', 102, int) /* SunOS Specific */ -#define TIOCSWINSZ _IOW('t', 103, struct winsize) -#define TIOCGWINSZ _IOR('t', 104, struct winsize) -#define __TIOCREMOTE _IOW('t', 105, int) /* SunOS Specific */ -#define TIOCMGET _IOR('t', 106, int) -#define TIOCMBIC _IOW('t', 107, int) -#define TIOCMBIS _IOW('t', 108, int) -#define TIOCMSET _IOW('t', 109, int) -#define TIOCSTART _IO('t', 110) -#define TIOCSTOP _IO('t', 111) -#define TIOCPKT _IOW('t', 112, int) -#define TIOCNOTTY _IO('t', 113) -#define TIOCSTI _IOW('t', 114, char) -#define TIOCOUTQ _IOR('t', 115, int) -#define __TIOCGLTC _IOR('t', 116, struct ltchars) /* SunOS Specific */ -#define __TIOCSLTC _IOW('t', 117, struct ltchars) /* SunOS Specific */ -/* 118 is the non-posix setpgrp tty ioctl */ -/* 119 is the non-posix getpgrp tty ioctl */ -#define __TIOCCDTR _IO('t', 120) /* SunOS Specific */ -#define __TIOCSDTR _IO('t', 121) /* SunOS Specific */ -#define TIOCCBRK _IO('t', 122) -#define TIOCSBRK _IO('t', 123) -#define __TIOCLGET _IOW('t', 124, int) /* SunOS Specific */ -#define __TIOCLSET _IOW('t', 125, int) /* SunOS Specific */ -#define __TIOCLBIC _IOW('t', 126, int) /* SunOS Specific */ -#define __TIOCLBIS _IOW('t', 127, int) /* SunOS Specific */ -#define __TIOCISPACE _IOR('t', 128, int) /* SunOS Specific */ -#define __TIOCISIZE _IOR('t', 129, int) /* SunOS Specific */ -#define TIOCSPGRP _IOW('t', 130, int) -#define TIOCGPGRP _IOR('t', 131, int) -#define TIOCSCTTY _IO('t', 132) -#define TIOCGSID _IOR('t', 133, int) -/* Get minor device of a pty master's FD -- Solaris equiv is ISPTM */ -#define TIOCGPTN _IOR('t', 134, unsigned int) /* Get Pty Number */ -#define TIOCSPTLCK _IOW('t', 135, int) /* Lock/unlock PTY */ - -/* Little f */ -#define FIOCLEX _IO('f', 1) -#define FIONCLEX _IO('f', 2) -#define FIOASYNC _IOW('f', 125, int) -#define FIONBIO _IOW('f', 126, int) -#define FIONREAD _IOR('f', 127, int) -#define TIOCINQ FIONREAD -#define FIOQSIZE _IOR('f', 128, loff_t) - -/* SCARY Rutgers local SunOS kernel hackery, perhaps I will support it - * someday. This is completely bogus, I know... - */ -#define __TCGETSTAT _IO('T', 200) /* Rutgers specific */ -#define __TCSETSTAT _IO('T', 201) /* Rutgers specific */ - -/* Linux specific, no SunOS equivalent. */ -#define TIOCLINUX 0x541C -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TCSBRKP 0x5425 -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ -#define TIOCMIWAIT 0x545C /* Wait for change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* Read serial port inline interrupt counts */ - -/* Kernel definitions */ -#ifdef __KERNEL__ -#define TIOCGETC __TIOCGETC -#define TIOCGETP __TIOCGETP -#define TIOCGLTC __TIOCGLTC -#define TIOCSLTC __TIOCSLTC -#define TIOCSETP __TIOCSETP -#define TIOCSETN __TIOCSETN -#define TIOCSETC __TIOCSETC -#endif - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -#endif /* !(_ASM_SPARC_IOCTLS_H) */ diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h deleted file mode 100644 index 91b072b..0000000 --- a/include/asm-sparc/iommu.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_IOMMU_H -#define ___ASM_SPARC_IOMMU_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/iommu_32.h b/include/asm-sparc/iommu_32.h deleted file mode 100644 index 70c589c..0000000 --- a/include/asm-sparc/iommu_32.h +++ /dev/null @@ -1,121 +0,0 @@ -/* iommu.h: Definitions for the sun4m IOMMU. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_IOMMU_H -#define _SPARC_IOMMU_H - -#include -#include - -/* The iommu handles all virtual to physical address translations - * that occur between the SBUS and physical memory. Access by - * the cpu to IO registers and similar go over the mbus so are - * translated by the on chip SRMMU. The iommu and the srmmu do - * not need to have the same translations at all, in fact most - * of the time the translations they handle are a disjunct set. - * Basically the iommu handles all dvma sbus activity. - */ - -/* The IOMMU registers occupy three pages in IO space. */ -struct iommu_regs { - /* First page */ - volatile unsigned long control; /* IOMMU control */ - volatile unsigned long base; /* Physical base of iopte page table */ - volatile unsigned long _unused1[3]; - volatile unsigned long tlbflush; /* write only */ - volatile unsigned long pageflush; /* write only */ - volatile unsigned long _unused2[1017]; - /* Second page */ - volatile unsigned long afsr; /* Async-fault status register */ - volatile unsigned long afar; /* Async-fault physical address */ - volatile unsigned long _unused3[2]; - volatile unsigned long sbuscfg0; /* SBUS configuration registers, per-slot */ - volatile unsigned long sbuscfg1; - volatile unsigned long sbuscfg2; - volatile unsigned long sbuscfg3; - volatile unsigned long mfsr; /* Memory-fault status register */ - volatile unsigned long mfar; /* Memory-fault physical address */ - volatile unsigned long _unused4[1014]; - /* Third page */ - volatile unsigned long mid; /* IOMMU module-id */ -}; - -#define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */ -#define IOMMU_CTRL_VERS 0x0f000000 /* Version */ -#define IOMMU_CTRL_RNGE 0x0000001c /* Mapping RANGE */ -#define IOMMU_RNGE_16MB 0x00000000 /* 0xff000000 -> 0xffffffff */ -#define IOMMU_RNGE_32MB 0x00000004 /* 0xfe000000 -> 0xffffffff */ -#define IOMMU_RNGE_64MB 0x00000008 /* 0xfc000000 -> 0xffffffff */ -#define IOMMU_RNGE_128MB 0x0000000c /* 0xf8000000 -> 0xffffffff */ -#define IOMMU_RNGE_256MB 0x00000010 /* 0xf0000000 -> 0xffffffff */ -#define IOMMU_RNGE_512MB 0x00000014 /* 0xe0000000 -> 0xffffffff */ -#define IOMMU_RNGE_1GB 0x00000018 /* 0xc0000000 -> 0xffffffff */ -#define IOMMU_RNGE_2GB 0x0000001c /* 0x80000000 -> 0xffffffff */ -#define IOMMU_CTRL_ENAB 0x00000001 /* IOMMU Enable */ - -#define IOMMU_AFSR_ERR 0x80000000 /* LE, TO, or BE asserted */ -#define IOMMU_AFSR_LE 0x40000000 /* SBUS reports error after transaction */ -#define IOMMU_AFSR_TO 0x20000000 /* Write access took more than 12.8 us. */ -#define IOMMU_AFSR_BE 0x10000000 /* Write access received error acknowledge */ -#define IOMMU_AFSR_SIZE 0x0e000000 /* Size of transaction causing error */ -#define IOMMU_AFSR_S 0x01000000 /* Sparc was in supervisor mode */ -#define IOMMU_AFSR_RESV 0x00f00000 /* Reserver, forced to 0x8 by hardware */ -#define IOMMU_AFSR_ME 0x00080000 /* Multiple errors occurred */ -#define IOMMU_AFSR_RD 0x00040000 /* A read operation was in progress */ -#define IOMMU_AFSR_FAV 0x00020000 /* IOMMU afar has valid contents */ - -#define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when bypass enabled */ -#define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */ -#define IOMMU_SBCFG_BA8 0x00000002 /* Slave supports 8 byte bursts */ -#define IOMMU_SBCFG_BYPASS 0x00000001 /* Bypass IOMMU, treat all addresses - produced by this device as pure - physical. */ - -#define IOMMU_MFSR_ERR 0x80000000 /* One or more of PERR1 or PERR0 */ -#define IOMMU_MFSR_S 0x01000000 /* Sparc was in supervisor mode */ -#define IOMMU_MFSR_CPU 0x00800000 /* CPU transaction caused parity error */ -#define IOMMU_MFSR_ME 0x00080000 /* Multiple parity errors occurred */ -#define IOMMU_MFSR_PERR 0x00006000 /* high bit indicates parity error occurred - on the even word of the access, low bit - indicated odd word caused the parity error */ -#define IOMMU_MFSR_BM 0x00001000 /* Error occurred while in boot mode */ -#define IOMMU_MFSR_C 0x00000800 /* Address causing error was marked cacheable */ -#define IOMMU_MFSR_RTYP 0x000000f0 /* Memory request transaction type */ - -#define IOMMU_MID_SBAE 0x001f0000 /* SBus arbitration enable */ -#define IOMMU_MID_SE 0x00100000 /* Enables SCSI/ETHERNET arbitration */ -#define IOMMU_MID_SB3 0x00080000 /* Enable SBUS device 3 arbitration */ -#define IOMMU_MID_SB2 0x00040000 /* Enable SBUS device 2 arbitration */ -#define IOMMU_MID_SB1 0x00020000 /* Enable SBUS device 1 arbitration */ -#define IOMMU_MID_SB0 0x00010000 /* Enable SBUS device 0 arbitration */ -#define IOMMU_MID_MID 0x0000000f /* Module-id, hardcoded to 0x8 */ - -/* The format of an iopte in the page tables */ -#define IOPTE_PAGE 0x07ffff00 /* Physical page number (PA[30:12]) */ -#define IOPTE_CACHE 0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */ -#define IOPTE_WRITE 0x00000004 /* Writeable */ -#define IOPTE_VALID 0x00000002 /* IOPTE is valid */ -#define IOPTE_WAZ 0x00000001 /* Write as zeros */ - -struct iommu_struct { - struct iommu_regs *regs; - iopte_t *page_table; - /* For convenience */ - unsigned long start; /* First managed virtual address */ - unsigned long end; /* Last managed virtual address */ - - struct bit_map usemap; -}; - -static inline void iommu_invalidate(struct iommu_regs *regs) -{ - regs->tlbflush = 0; -} - -static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) -{ - regs->pageflush = (ba & PAGE_MASK); -} - -#endif /* !(_SPARC_IOMMU_H) */ diff --git a/include/asm-sparc/iommu_64.h b/include/asm-sparc/iommu_64.h deleted file mode 100644 index d7b9afc..0000000 --- a/include/asm-sparc/iommu_64.h +++ /dev/null @@ -1,62 +0,0 @@ -/* iommu.h: Definitions for the sun5 IOMMU. - * - * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) - */ -#ifndef _SPARC64_IOMMU_H -#define _SPARC64_IOMMU_H - -/* The format of an iopte in the page tables. */ -#define IOPTE_VALID 0x8000000000000000UL -#define IOPTE_64K 0x2000000000000000UL -#define IOPTE_STBUF 0x1000000000000000UL -#define IOPTE_INTRA 0x0800000000000000UL -#define IOPTE_CONTEXT 0x07ff800000000000UL -#define IOPTE_PAGE 0x00007fffffffe000UL -#define IOPTE_CACHE 0x0000000000000010UL -#define IOPTE_WRITE 0x0000000000000002UL - -#define IOMMU_NUM_CTXS 4096 - -struct iommu_arena { - unsigned long *map; - unsigned int hint; - unsigned int limit; -}; - -struct iommu { - spinlock_t lock; - struct iommu_arena arena; - void (*flush_all)(struct iommu *); - iopte_t *page_table; - u32 page_table_map_base; - unsigned long iommu_control; - unsigned long iommu_tsbbase; - unsigned long iommu_flush; - unsigned long iommu_flushinv; - unsigned long iommu_tags; - unsigned long iommu_ctxflush; - unsigned long write_complete_reg; - unsigned long dummy_page; - unsigned long dummy_page_pa; - unsigned long ctx_lowest_free; - DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS); - u32 dma_addr_mask; -}; - -struct strbuf { - int strbuf_enabled; - unsigned long strbuf_control; - unsigned long strbuf_pflush; - unsigned long strbuf_fsync; - unsigned long strbuf_ctxflush; - unsigned long strbuf_ctxmatch_base; - unsigned long strbuf_flushflag_pa; - volatile unsigned long *strbuf_flushflag; - volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)]; -}; - -extern int iommu_table_init(struct iommu *iommu, int tsbsize, - u32 dma_offset, u32 dma_addr_mask, - int numa_node); - -#endif /* !(_SPARC64_IOMMU_H) */ diff --git a/include/asm-sparc/ipcbuf.h b/include/asm-sparc/ipcbuf.h deleted file mode 100644 index 037605d..0000000 --- a/include/asm-sparc/ipcbuf.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_IPCBUF_H -#define ___ASM_SPARC_IPCBUF_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/ipcbuf_32.h b/include/asm-sparc/ipcbuf_32.h deleted file mode 100644 index 6387209..0000000 --- a/include/asm-sparc/ipcbuf_32.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _SPARC_IPCBUF_H -#define _SPARC_IPCBUF_H - -/* - * The ipc64_perm structure for sparc architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode - * - 32-bit seq - * - 2 miscellaneous 64-bit values (so that this structure matches - * sparc64 ipc64_perm) - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - unsigned short __pad1; - __kernel_mode_t mode; - unsigned short __pad2; - unsigned short seq; - unsigned long long __unused1; - unsigned long long __unused2; -}; - -#endif /* _SPARC_IPCBUF_H */ diff --git a/include/asm-sparc/ipcbuf_64.h b/include/asm-sparc/ipcbuf_64.h deleted file mode 100644 index a44b855..0000000 --- a/include/asm-sparc/ipcbuf_64.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _SPARC64_IPCBUF_H -#define _SPARC64_IPCBUF_H - -/* - * The ipc64_perm structure for sparc64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit seq - * - 2 miscellaneous 64-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* _SPARC64_IPCBUF_H */ diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h deleted file mode 100644 index 7af6bb4..0000000 --- a/include/asm-sparc/irq.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_IRQ_H -#define ___ASM_SPARC_IRQ_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/irq_32.h b/include/asm-sparc/irq_32.h deleted file mode 100644 index fe205cc..0000000 --- a/include/asm-sparc/irq_32.h +++ /dev/null @@ -1,15 +0,0 @@ -/* irq.h: IRQ registers on the Sparc. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC_IRQ_H -#define _SPARC_IRQ_H - -#include - -#define NR_IRQS 16 - -#define irq_canonicalize(irq) (irq) - -#endif diff --git a/include/asm-sparc/irq_64.h b/include/asm-sparc/irq_64.h deleted file mode 100644 index 0bb9bf5..0000000 --- a/include/asm-sparc/irq_64.h +++ /dev/null @@ -1,93 +0,0 @@ -/* irq.h: IRQ registers on the 64-bit Sparc. - * - * Copyright (C) 1996 David S. Miller (davem@davemloft.net) - * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) - */ - -#ifndef _SPARC64_IRQ_H -#define _SPARC64_IRQ_H - -#include -#include -#include -#include -#include -#include - -/* IMAP/ICLR register defines */ -#define IMAP_VALID 0x80000000UL /* IRQ Enabled */ -#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */ -#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */ -#define IMAP_TID_SHIFT 26 -#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */ -#define IMAP_AID_SHIFT 26 -#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */ -#define IMAP_NID_SHIFT 21 -#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */ -#define IMAP_INO 0x0000003fUL /* IRQ Number */ -#define IMAP_INR 0x000007ffUL /* Full interrupt number*/ - -#define ICLR_IDLE 0x00000000UL /* Idle state */ -#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */ -#define ICLR_PENDING 0x00000003UL /* Pending state */ - -/* The largest number of unique interrupt sources we support. - * If this needs to ever be larger than 255, you need to change - * the type of ino_bucket->virt_irq as appropriate. - * - * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq(). - */ -#define NR_IRQS 255 - -extern void irq_install_pre_handler(int virt_irq, - void (*func)(unsigned int, void *, void *), - void *arg1, void *arg2); -#define irq_canonicalize(irq) (irq) -extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); -extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); -extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino); -extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, - unsigned int msi_devino_start, - unsigned int msi_devino_end); -extern void sun4v_destroy_msi(unsigned int virt_irq); -extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p, - unsigned int msi_devino_start, - unsigned int msi_devino_end, - unsigned long imap_base, - unsigned long iclr_base); -extern void sun4u_destroy_msi(unsigned int virt_irq); -extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); - -extern unsigned char virt_irq_alloc(unsigned int dev_handle, - unsigned int dev_ino); -#ifdef CONFIG_PCI_MSI -extern void virt_irq_free(unsigned int virt_irq); -#endif - -extern void __init init_IRQ(void); -extern void fixup_irqs(void); - -static inline void set_softint(unsigned long bits) -{ - __asm__ __volatile__("wr %0, 0x0, %%set_softint" - : /* No outputs */ - : "r" (bits)); -} - -static inline void clear_softint(unsigned long bits) -{ - __asm__ __volatile__("wr %0, 0x0, %%clear_softint" - : /* No outputs */ - : "r" (bits)); -} - -static inline unsigned long get_softint(void) -{ - unsigned long retval; - - __asm__ __volatile__("rd %%softint, %0" - : "=r" (retval)); - return retval; -} - -#endif diff --git a/include/asm-sparc/irq_regs.h b/include/asm-sparc/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-sparc/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc/irqflags.h b/include/asm-sparc/irqflags.h deleted file mode 100644 index c6402b1..0000000 --- a/include/asm-sparc/irqflags.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_IRQFLAGS_H -#define ___ASM_SPARC_IRQFLAGS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/irqflags_32.h b/include/asm-sparc/irqflags_32.h deleted file mode 100644 index db398fb..0000000 --- a/include/asm-sparc/irqflags_32.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-sparc/irqflags.h - * - * IRQ flags handling - * - * This file gets included from lowlevel asm headers too, to provide - * wrapped versions of the local_irq_*() APIs, based on the - * raw_local_irq_*() functions from the lowlevel headers. - */ -#ifndef _ASM_IRQFLAGS_H -#define _ASM_IRQFLAGS_H - -#ifndef __ASSEMBLY__ - -extern void raw_local_irq_restore(unsigned long); -extern unsigned long __raw_local_irq_save(void); -extern void raw_local_irq_enable(void); - -static inline unsigned long getipl(void) -{ - unsigned long retval; - - __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); - return retval; -} - -#define raw_local_save_flags(flags) ((flags) = getipl()) -#define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) -#define raw_local_irq_disable() ((void) __raw_local_irq_save()) -#define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return ((flags & PSR_PIL) != 0); -} - -#endif /* (__ASSEMBLY__) */ - -#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc/irqflags_64.h b/include/asm-sparc/irqflags_64.h deleted file mode 100644 index 024fc54..0000000 --- a/include/asm-sparc/irqflags_64.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * include/asm-sparc64/irqflags.h - * - * IRQ flags handling - * - * This file gets included from lowlevel asm headers too, to provide - * wrapped versions of the local_irq_*() APIs, based on the - * raw_local_irq_*() functions from the lowlevel headers. - */ -#ifndef _ASM_IRQFLAGS_H -#define _ASM_IRQFLAGS_H - -#ifndef __ASSEMBLY__ - -static inline unsigned long __raw_local_save_flags(void) -{ - unsigned long flags; - - __asm__ __volatile__( - "rdpr %%pil, %0" - : "=r" (flags) - ); - - return flags; -} - -#define raw_local_save_flags(flags) \ - do { (flags) = __raw_local_save_flags(); } while (0) - -static inline void raw_local_irq_restore(unsigned long flags) -{ - __asm__ __volatile__( - "wrpr %0, %%pil" - : /* no output */ - : "r" (flags) - : "memory" - ); -} - -static inline void raw_local_irq_disable(void) -{ - __asm__ __volatile__( - "wrpr 15, %%pil" - : /* no outputs */ - : /* no inputs */ - : "memory" - ); -} - -static inline void raw_local_irq_enable(void) -{ - __asm__ __volatile__( - "wrpr 0, %%pil" - : /* no outputs */ - : /* no inputs */ - : "memory" - ); -} - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return (flags > 0); -} - -static inline int raw_irqs_disabled(void) -{ - unsigned long flags = __raw_local_save_flags(); - - return raw_irqs_disabled_flags(flags); -} - -/* - * For spinlocks, etc: - */ -static inline unsigned long __raw_local_irq_save(void) -{ - unsigned long flags = __raw_local_save_flags(); - - raw_local_irq_disable(); - - return flags; -} - -#define raw_local_irq_save(flags) \ - do { (flags) = __raw_local_irq_save(); } while (0) - -#endif /* (__ASSEMBLY__) */ - -#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc/jsflash.h b/include/asm-sparc/jsflash.h deleted file mode 100644 index 3457f29..0000000 --- a/include/asm-sparc/jsflash.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * jsflash.h: OS Flash SIMM support for JavaStations. - * - * Copyright (C) 1999 Pete Zaitcev - */ - -#ifndef _SPARC_JSFLASH_H -#define _SPARC_JSFLASH_H - -#ifndef _SPARC_TYPES_H -#include -#endif - -/* - * Semantics of the offset is a full address. - * Hardcode it or get it from probe ioctl. - * - * We use full bus address, so that we would be - * automatically compatible with possible future systems. - */ - -#define JSFLASH_IDENT (('F'<<8)|54) -struct jsflash_ident_arg { - __u64 off; /* 0x20000000 is included */ - __u32 size; - char name[32]; /* With trailing zero */ -}; - -#define JSFLASH_ERASE (('F'<<8)|55) -/* Put 0 as argument, may be flags or sector number... */ - -#define JSFLASH_PROGRAM (('F'<<8)|56) -struct jsflash_program_arg { - __u64 data; /* char* for sparc and sparc64 */ - __u64 off; - __u32 size; -}; - -#endif /* _SPARC_JSFLASH_H */ diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h deleted file mode 100644 index fe07d00..0000000 --- a/include/asm-sparc/kdebug.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_KDEBUG_H -#define ___ASM_SPARC_KDEBUG_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/kdebug_32.h b/include/asm-sparc/kdebug_32.h deleted file mode 100644 index f69fe7d..0000000 --- a/include/asm-sparc/kdebug_32.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * kdebug.h: Defines and definitions for debugging the Linux kernel - * under various kernel debuggers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_KDEBUG_H -#define _SPARC_KDEBUG_H - -#include -#include - -/* Breakpoints are enter through trap table entry 126. So in sparc assembly - * if you want to drop into the debugger you do: - * - * t DEBUG_BP_TRAP - */ - -#define DEBUG_BP_TRAP 126 - -#ifndef __ASSEMBLY__ -/* The debug vector is passed in %o1 at boot time. It is a pointer to - * a structure in the debuggers address space. Here is its format. - */ - -typedef unsigned int (*debugger_funct)(void); - -struct kernel_debug { - /* First the entry point into the debugger. You jump here - * to give control over to the debugger. - */ - unsigned long kdebug_entry; - unsigned long kdebug_trapme; /* Figure out later... */ - /* The following is the number of pages that the debugger has - * taken from to total pool. - */ - unsigned long *kdebug_stolen_pages; - /* Ok, after you remap yourself and/or change the trap table - * from what you were left with at boot time you have to call - * this synchronization function so the debugger can check out - * what you have done. - */ - debugger_funct teach_debugger; -}; /* I think that is it... */ - -extern struct kernel_debug *linux_dbvec; - -/* Use this macro in C-code to enter the debugger. */ -static inline void sp_enter_debugger(void) -{ - __asm__ __volatile__("jmpl %0, %%o7\n\t" - "nop\n\t" : : - "r" (linux_dbvec) : "o7", "memory"); -} - -#define SP_ENTER_DEBUGGER do { \ - if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \ - sp_enter_debugger(); \ - } while(0) - -enum die_val { - DIE_UNUSED, -}; - -#endif /* !(__ASSEMBLY__) */ - -/* Some nice offset defines for assembler code. */ -#define KDEBUG_ENTRY_OFF 0x0 -#define KDEBUG_DUNNO_OFF 0x4 -#define KDEBUG_DUNNO2_OFF 0x8 -#define KDEBUG_TEACH_OFF 0xc - -#endif /* !(_SPARC_KDEBUG_H) */ diff --git a/include/asm-sparc/kdebug_64.h b/include/asm-sparc/kdebug_64.h deleted file mode 100644 index f905b77..0000000 --- a/include/asm-sparc/kdebug_64.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _SPARC64_KDEBUG_H -#define _SPARC64_KDEBUG_H - -struct pt_regs; - -extern void bad_trap(struct pt_regs *, long); - -/* Grossly misnamed. */ -enum die_val { - DIE_OOPS = 1, - DIE_DEBUG, /* ta 0x70 */ - DIE_DEBUG_2, /* ta 0x71 */ - DIE_DIE, - DIE_TRAP, - DIE_TRAP_TL1, - DIE_CALL, -}; - -#endif diff --git a/include/asm-sparc/kgdb.h b/include/asm-sparc/kgdb.h deleted file mode 100644 index b6ef301..0000000 --- a/include/asm-sparc/kgdb.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _SPARC_KGDB_H -#define _SPARC_KGDB_H - -#ifdef CONFIG_SPARC32 -#define BUFMAX 2048 -#else -#define BUFMAX 4096 -#endif - -enum regnames { - GDB_G0, GDB_G1, GDB_G2, GDB_G3, GDB_G4, GDB_G5, GDB_G6, GDB_G7, - GDB_O0, GDB_O1, GDB_O2, GDB_O3, GDB_O4, GDB_O5, GDB_SP, GDB_O7, - GDB_L0, GDB_L1, GDB_L2, GDB_L3, GDB_L4, GDB_L5, GDB_L6, GDB_L7, - GDB_I0, GDB_I1, GDB_I2, GDB_I3, GDB_I4, GDB_I5, GDB_FP, GDB_I7, - GDB_F0, - GDB_F31 = GDB_F0 + 31, -#ifdef CONFIG_SPARC32 - GDB_Y, GDB_PSR, GDB_WIM, GDB_TBR, GDB_PC, GDB_NPC, - GDB_FSR, GDB_CSR, -#else - GDB_F32 = GDB_F0 + 32, - GDB_F62 = GDB_F32 + 15, - GDB_PC, GDB_NPC, GDB_STATE, GDB_FSR, GDB_FPRS, GDB_Y, -#endif -}; - -#ifdef CONFIG_SPARC32 -#define NUMREGBYTES ((GDB_CSR + 1) * 4) -#else -#define NUMREGBYTES ((GDB_Y + 1) * 8) -#endif - -extern void arch_kgdb_breakpoint(void); - -#define BREAK_INSTR_SIZE 4 -#define CACHE_FLUSH_IS_SAFE 1 - -#endif /* _SPARC_KGDB_H */ diff --git a/include/asm-sparc/kmap_types.h b/include/asm-sparc/kmap_types.h deleted file mode 100644 index 602f5e0..0000000 --- a/include/asm-sparc/kmap_types.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_KMAP_TYPES_H -#define _ASM_KMAP_TYPES_H - -/* Dummy header just to define km_type. None of this - * is actually used on sparc. -DaveM - */ - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif diff --git a/include/asm-sparc/kprobes.h b/include/asm-sparc/kprobes.h deleted file mode 100644 index 5879d71..0000000 --- a/include/asm-sparc/kprobes.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef _SPARC64_KPROBES_H -#define _SPARC64_KPROBES_H - -#include -#include - -typedef u32 kprobe_opcode_t; - -#define BREAKPOINT_INSTRUCTION 0x91d02070 /* ta 0x70 */ -#define BREAKPOINT_INSTRUCTION_2 0x91d02071 /* ta 0x71 */ -#define MAX_INSN_SIZE 2 - -#define kretprobe_blacklist_size 0 - -#define arch_remove_kprobe(p) do {} while (0) - -#define flush_insn_slot(p) \ -do { flushi(&(p)->ainsn.insn[0]); \ - flushi(&(p)->ainsn.insn[1]); \ -} while (0) - -void kretprobe_trampoline(void); - -/* Architecture specific copy of original instruction*/ -struct arch_specific_insn { - /* copy of the original instruction */ - kprobe_opcode_t insn[MAX_INSN_SIZE]; -}; - -struct prev_kprobe { - struct kprobe *kp; - unsigned long status; - unsigned long orig_tnpc; - unsigned long orig_tstate_pil; -}; - -/* per-cpu kprobe control block */ -struct kprobe_ctlblk { - unsigned long kprobe_status; - unsigned long kprobe_orig_tnpc; - unsigned long kprobe_orig_tstate_pil; - struct pt_regs jprobe_saved_regs; - struct prev_kprobe prev_kprobe; -}; - -extern int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); -extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr); -#endif /* _SPARC64_KPROBES_H */ diff --git a/include/asm-sparc/ldc.h b/include/asm-sparc/ldc.h deleted file mode 100644 index bdb524a..0000000 --- a/include/asm-sparc/ldc.h +++ /dev/null @@ -1,138 +0,0 @@ -#ifndef _SPARC64_LDC_H -#define _SPARC64_LDC_H - -#include - -extern int ldom_domaining_enabled; -extern void ldom_set_var(const char *var, const char *value); -extern void ldom_reboot(const char *boot_command); -extern void ldom_power_off(void); - -/* The event handler will be evoked when link state changes - * or data becomes available on the receive side. - * - * For non-RAW links, if the LDC_EVENT_RESET event arrives the - * driver should reset all of it's internal state and reinvoke - * ldc_connect() to try and bring the link up again. - * - * For RAW links, ldc_connect() is not used. Instead the driver - * just waits for the LDC_EVENT_UP event. - */ -struct ldc_channel_config { - void (*event)(void *arg, int event); - - u32 mtu; - unsigned int rx_irq; - unsigned int tx_irq; - u8 mode; -#define LDC_MODE_RAW 0x00 -#define LDC_MODE_UNRELIABLE 0x01 -#define LDC_MODE_RESERVED 0x02 -#define LDC_MODE_STREAM 0x03 - - u8 debug; -#define LDC_DEBUG_HS 0x01 -#define LDC_DEBUG_STATE 0x02 -#define LDC_DEBUG_RX 0x04 -#define LDC_DEBUG_TX 0x08 -#define LDC_DEBUG_DATA 0x10 -}; - -#define LDC_EVENT_RESET 0x01 -#define LDC_EVENT_UP 0x02 -#define LDC_EVENT_DATA_READY 0x04 - -#define LDC_STATE_INVALID 0x00 -#define LDC_STATE_INIT 0x01 -#define LDC_STATE_BOUND 0x02 -#define LDC_STATE_READY 0x03 -#define LDC_STATE_CONNECTED 0x04 - -struct ldc_channel; - -/* Allocate state for a channel. */ -extern struct ldc_channel *ldc_alloc(unsigned long id, - const struct ldc_channel_config *cfgp, - void *event_arg); - -/* Shut down and free state for a channel. */ -extern void ldc_free(struct ldc_channel *lp); - -/* Register TX and RX queues of the link with the hypervisor. */ -extern int ldc_bind(struct ldc_channel *lp, const char *name); - -/* For non-RAW protocols we need to complete a handshake before - * communication can proceed. ldc_connect() does that, if the - * handshake completes successfully, an LDC_EVENT_UP event will - * be sent up to the driver. - */ -extern int ldc_connect(struct ldc_channel *lp); -extern int ldc_disconnect(struct ldc_channel *lp); - -extern int ldc_state(struct ldc_channel *lp); - -/* Read and write operations. Only valid when the link is up. */ -extern int ldc_write(struct ldc_channel *lp, const void *buf, - unsigned int size); -extern int ldc_read(struct ldc_channel *lp, void *buf, unsigned int size); - -#define LDC_MAP_SHADOW 0x01 -#define LDC_MAP_DIRECT 0x02 -#define LDC_MAP_IO 0x04 -#define LDC_MAP_R 0x08 -#define LDC_MAP_W 0x10 -#define LDC_MAP_X 0x20 -#define LDC_MAP_RW (LDC_MAP_R | LDC_MAP_W) -#define LDC_MAP_RWX (LDC_MAP_R | LDC_MAP_W | LDC_MAP_X) -#define LDC_MAP_ALL 0x03f - -struct ldc_trans_cookie { - u64 cookie_addr; - u64 cookie_size; -}; - -struct scatterlist; -extern int ldc_map_sg(struct ldc_channel *lp, - struct scatterlist *sg, int num_sg, - struct ldc_trans_cookie *cookies, int ncookies, - unsigned int map_perm); - -extern int ldc_map_single(struct ldc_channel *lp, - void *buf, unsigned int len, - struct ldc_trans_cookie *cookies, int ncookies, - unsigned int map_perm); - -extern void ldc_unmap(struct ldc_channel *lp, struct ldc_trans_cookie *cookies, - int ncookies); - -extern int ldc_copy(struct ldc_channel *lp, int copy_dir, - void *buf, unsigned int len, unsigned long offset, - struct ldc_trans_cookie *cookies, int ncookies); - -static inline int ldc_get_dring_entry(struct ldc_channel *lp, - void *buf, unsigned int len, - unsigned long offset, - struct ldc_trans_cookie *cookies, - int ncookies) -{ - return ldc_copy(lp, LDC_COPY_IN, buf, len, offset, cookies, ncookies); -} - -static inline int ldc_put_dring_entry(struct ldc_channel *lp, - void *buf, unsigned int len, - unsigned long offset, - struct ldc_trans_cookie *cookies, - int ncookies) -{ - return ldc_copy(lp, LDC_COPY_OUT, buf, len, offset, cookies, ncookies); -} - -extern void *ldc_alloc_exp_dring(struct ldc_channel *lp, unsigned int len, - struct ldc_trans_cookie *cookies, - int *ncookies, unsigned int map_perm); - -extern void ldc_free_exp_dring(struct ldc_channel *lp, void *buf, - unsigned int len, - struct ldc_trans_cookie *cookies, int ncookies); - -#endif /* _SPARC64_LDC_H */ diff --git a/include/asm-sparc/linkage.h b/include/asm-sparc/linkage.h deleted file mode 100644 index 291c2d0..0000000 --- a/include/asm-sparc/linkage.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -/* Nothing to see here... */ - -#endif diff --git a/include/asm-sparc/lmb.h b/include/asm-sparc/lmb.h deleted file mode 100644 index 6a352cb..0000000 --- a/include/asm-sparc/lmb.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _SPARC64_LMB_H -#define _SPARC64_LMB_H - -#include - -#define LMB_DBG(fmt...) prom_printf(fmt) - -#define LMB_REAL_LIMIT 0 - -#endif /* !(_SPARC64_LMB_H) */ diff --git a/include/asm-sparc/local.h b/include/asm-sparc/local.h deleted file mode 100644 index bc80815..0000000 --- a/include/asm-sparc/local.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC_LOCAL_H -#define _SPARC_LOCAL_H - -#include - -#endif diff --git a/include/asm-sparc/lsu.h b/include/asm-sparc/lsu.h deleted file mode 100644 index 7190f8d..0000000 --- a/include/asm-sparc/lsu.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _SPARC64_LSU_H -#define _SPARC64_LSU_H - -#include - -/* LSU Control Register */ -#define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/ -#define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/ -#define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/ -#define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/ -#define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/ -#define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/ -#define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */ -#define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */ -#define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */ -#define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */ -#define LSU_CONTROL_IC _AC(0x0000000000000001,UL) /* Instruction cache enable.*/ - -#endif /* !(_SPARC64_LSU_H) */ diff --git a/include/asm-sparc/machines.h b/include/asm-sparc/machines.h deleted file mode 100644 index c28c2f2..0000000 --- a/include/asm-sparc/machines.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * machines.h: Defines for taking apart the machine type value in the - * idprom and determining the kind of machine we are on. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_MACHINES_H -#define _SPARC_MACHINES_H - -struct Sun_Machine_Models { - char *name; - unsigned char id_machtype; -}; - -/* Current number of machines we know about that has an IDPROM - * machtype entry including one entry for the 0x80 OBP machines. - */ -#define NUM_SUN_MACHINES 15 - -/* The machine type in the idprom area looks like this: - * - * --------------- - * | ARCH | MACH | - * --------------- - * 7 4 3 0 - * - * The ARCH field determines the architecture line (sun4, sun4c, etc). - * The MACH field determines the machine make within that architecture. - */ - -#define SM_ARCH_MASK 0xf0 -#define SM_SUN4 0x20 -#define SM_SUN4C 0x50 -#define SM_SUN4M 0x70 -#define SM_SUN4M_OBP 0x80 - -#define SM_TYP_MASK 0x0f -/* Sun4 machines */ -#define SM_4_260 0x01 /* Sun 4/200 series */ -#define SM_4_110 0x02 /* Sun 4/100 series */ -#define SM_4_330 0x03 /* Sun 4/300 series */ -#define SM_4_470 0x04 /* Sun 4/400 series */ - -/* Sun4c machines Full Name - PROM NAME */ -#define SM_4C_SS1 0x01 /* Sun4c SparcStation 1 - Sun 4/60 */ -#define SM_4C_IPC 0x02 /* Sun4c SparcStation IPC - Sun 4/40 */ -#define SM_4C_SS1PLUS 0x03 /* Sun4c SparcStation 1+ - Sun 4/65 */ -#define SM_4C_SLC 0x04 /* Sun4c SparcStation SLC - Sun 4/20 */ -#define SM_4C_SS2 0x05 /* Sun4c SparcStation 2 - Sun 4/75 */ -#define SM_4C_ELC 0x06 /* Sun4c SparcStation ELC - Sun 4/25 */ -#define SM_4C_IPX 0x07 /* Sun4c SparcStation IPX - Sun 4/50 */ - -/* Sun4m machines, these predate the OpenBoot. These values only mean - * something if the value in the ARCH field is SM_SUN4M, if it is - * SM_SUN4M_OBP then you have the following situation: - * 1) You either have a sun4d, a sun4e, or a recently made sun4m. - * 2) You have to consult OpenBoot to determine which machine this is. - */ -#define SM_4M_SS60 0x01 /* Sun4m SparcSystem 600 */ -#define SM_4M_SS50 0x02 /* Sun4m SparcStation 10 */ -#define SM_4M_SS40 0x03 /* Sun4m SparcStation 5 */ - -/* Sun4d machines -- N/A */ -/* Sun4e machines -- N/A */ -/* Sun4u machines -- N/A */ - -#endif /* !(_SPARC_MACHINES_H) */ diff --git a/include/asm-sparc/mbus.h b/include/asm-sparc/mbus.h deleted file mode 100644 index 69f07a0..0000000 --- a/include/asm-sparc/mbus.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * mbus.h: Various defines for MBUS modules. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_MBUS_H -#define _SPARC_MBUS_H - -#include /* HyperSparc stuff */ -#include /* Cypress Chips */ -#include /* Ugh, bug city... */ - -enum mbus_module { - HyperSparc = 0, - Cypress = 1, - Cypress_vE = 2, - Cypress_vD = 3, - Swift_ok = 4, - Swift_bad_c = 5, - Swift_lots_o_bugs = 6, - Tsunami = 7, - Viking_12 = 8, - Viking_2x = 9, - Viking_30 = 10, - Viking_35 = 11, - Viking_new = 12, - TurboSparc = 13, - SRMMU_INVAL_MOD = 14, -}; - -extern enum mbus_module srmmu_modtype; -extern unsigned int viking_rev, swift_rev, cypress_rev; - -/* HW Mbus module bugs we have to deal with */ -#define HWBUG_COPYBACK_BROKEN 0x00000001 -#define HWBUG_ASIFLUSH_BROKEN 0x00000002 -#define HWBUG_VACFLUSH_BITROT 0x00000004 -#define HWBUG_KERN_ACCBROKEN 0x00000008 -#define HWBUG_KERN_CBITBROKEN 0x00000010 -#define HWBUG_MODIFIED_BITROT 0x00000020 -#define HWBUG_PC_BADFAULT_ADDR 0x00000040 -#define HWBUG_SUPERSCALAR_BAD 0x00000080 -#define HWBUG_PACINIT_BITROT 0x00000100 - -/* First the module type values. To find out which you have, just load - * the mmu control register from ASI_M_MMUREG alternate address space and - * shift the value right 28 bits. - */ -/* IMPL field means the company which produced the chip. */ -#define MBUS_VIKING 0x4 /* bleech, Texas Instruments Module */ -#define MBUS_LSI 0x3 /* LSI Logics */ -#define MBUS_ROSS 0x1 /* Ross is nice */ -#define MBUS_FMI 0x0 /* Fujitsu Microelectronics/Swift */ - -/* Ross Module versions */ -#define ROSS_604_REV_CDE 0x0 /* revisions c, d, and e */ -#define ROSS_604_REV_F 0x1 /* revision f */ -#define ROSS_605 0xf /* revision a, a.1, and a.2 */ -#define ROSS_605_REV_B 0xe /* revision b */ - -/* TI Viking Module versions */ -#define VIKING_REV_12 0x1 /* Version 1.2 or SPARCclassic's CPU */ -#define VIKING_REV_2 0x2 /* Version 2.1, 2.2, 2.3, and 2.4 */ -#define VIKING_REV_30 0x3 /* Version 3.0 */ -#define VIKING_REV_35 0x4 /* Version 3.5 */ - -/* LSI Logics. */ -#define LSI_L64815 0x0 - -/* Fujitsu */ -#define FMI_AURORA 0x4 /* MB8690x, a Swift module... */ -#define FMI_TURBO 0x5 /* MB86907, a TurboSparc module... */ - -/* For multiprocessor support we need to be able to obtain the CPU id and - * the MBUS Module id. - */ - -/* The CPU ID is encoded in the trap base register, 20 bits to the left of - * bit zero, with 2 bits being significant. - */ -#define TBR_ID_SHIFT 20 - -static inline int get_cpuid(void) -{ - register int retval; - __asm__ __volatile__("rd %%tbr, %0\n\t" - "srl %0, %1, %0\n\t" : - "=r" (retval) : - "i" (TBR_ID_SHIFT)); - return (retval & 3); -} - -static inline int get_modid(void) -{ - return (get_cpuid() | 0x8); -} - - -#endif /* !(_SPARC_MBUS_H) */ diff --git a/include/asm-sparc/mc146818rtc.h b/include/asm-sparc/mc146818rtc.h deleted file mode 100644 index 9ab65c2..0000000 --- a/include/asm-sparc/mc146818rtc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_MC146818RTC_H -#define ___ASM_SPARC_MC146818RTC_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/mc146818rtc_32.h b/include/asm-sparc/mc146818rtc_32.h deleted file mode 100644 index fa7eac9..0000000 --- a/include/asm-sparc/mc146818rtc_32.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef __ASM_SPARC_MC146818RTC_H -#define __ASM_SPARC_MC146818RTC_H - -#include - -#ifndef RTC_PORT -#define RTC_PORT(x) (0x70 + (x)) -#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ -#endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#define RTC_IRQ 8 - -#endif /* __ASM_SPARC_MC146818RTC_H */ diff --git a/include/asm-sparc/mc146818rtc_64.h b/include/asm-sparc/mc146818rtc_64.h deleted file mode 100644 index e9c0fcc..0000000 --- a/include/asm-sparc/mc146818rtc_64.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef __ASM_SPARC64_MC146818RTC_H -#define __ASM_SPARC64_MC146818RTC_H - -#include - -#ifndef RTC_PORT -#ifdef CONFIG_PCI -extern unsigned long ds1287_regs; -#else -#define ds1287_regs (0UL) -#endif -#define RTC_PORT(x) (ds1287_regs + (x)) -#define RTC_ALWAYS_BCD 0 -#endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#define RTC_IRQ 8 - -#endif /* __ASM_SPARC64_MC146818RTC_H */ diff --git a/include/asm-sparc/mdesc.h b/include/asm-sparc/mdesc.h deleted file mode 100644 index 1acc727..0000000 --- a/include/asm-sparc/mdesc.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef _SPARC64_MDESC_H -#define _SPARC64_MDESC_H - -#include -#include -#include - -struct mdesc_handle; - -/* Machine description operations are to be surrounded by grab and - * release calls. The mdesc_handle returned from the grab is - * the first argument to all of the operational calls that work - * on mdescs. - */ -extern struct mdesc_handle *mdesc_grab(void); -extern void mdesc_release(struct mdesc_handle *); - -#define MDESC_NODE_NULL (~(u64)0) - -extern u64 mdesc_node_by_name(struct mdesc_handle *handle, - u64 from_node, const char *name); -#define mdesc_for_each_node_by_name(__hdl, __node, __name) \ - for (__node = mdesc_node_by_name(__hdl, MDESC_NODE_NULL, __name); \ - (__node) != MDESC_NODE_NULL; \ - __node = mdesc_node_by_name(__hdl, __node, __name)) - -/* Access to property values returned from mdesc_get_property() are - * only valid inside of a mdesc_grab()/mdesc_release() sequence. - * Once mdesc_release() is called, the memory backed up by these - * pointers may reference freed up memory. - * - * Therefore callers must make copies of any property values - * they need. - * - * These same rules apply to mdesc_node_name(). - */ -extern const void *mdesc_get_property(struct mdesc_handle *handle, - u64 node, const char *name, int *lenp); -extern const char *mdesc_node_name(struct mdesc_handle *hp, u64 node); - -/* MD arc iteration, the standard sequence is: - * - * unsigned long arc; - * mdesc_for_each_arc(arc, handle, node, MDESC_ARC_TYPE_{FWD,BACK}) { - * unsigned long target = mdesc_arc_target(handle, arc); - * ... - * } - */ - -#define MDESC_ARC_TYPE_FWD "fwd" -#define MDESC_ARC_TYPE_BACK "back" - -extern u64 mdesc_next_arc(struct mdesc_handle *handle, u64 from, - const char *arc_type); -#define mdesc_for_each_arc(__arc, __hdl, __node, __type) \ - for (__arc = mdesc_next_arc(__hdl, __node, __type); \ - (__arc) != MDESC_NODE_NULL; \ - __arc = mdesc_next_arc(__hdl, __arc, __type)) - -extern u64 mdesc_arc_target(struct mdesc_handle *hp, u64 arc); - -extern void mdesc_update(void); - -struct mdesc_notifier_client { - void (*add)(struct mdesc_handle *handle, u64 node); - void (*remove)(struct mdesc_handle *handle, u64 node); - - const char *node_name; - struct mdesc_notifier_client *next; -}; - -extern void mdesc_register_notifier(struct mdesc_notifier_client *client); - -extern void mdesc_fill_in_cpu_data(cpumask_t mask); - -extern void sun4v_mdesc_init(void); - -#endif diff --git a/include/asm-sparc/memreg.h b/include/asm-sparc/memreg.h deleted file mode 100644 index 845ad2b..0000000 --- a/include/asm-sparc/memreg.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _SPARC_MEMREG_H -#define _SPARC_MEMREG_H -/* memreg.h: Definitions of the values found in the synchronous - * and asynchronous memory error registers when a fault - * occurs on the sun4c. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -/* First the synchronous error codes, these are usually just - * normal page faults. - */ - -#define SUN4C_SYNC_WDRESET 0x0001 /* watchdog reset */ -#define SUN4C_SYNC_SIZE 0x0002 /* bad access size? whuz this? */ -#define SUN4C_SYNC_PARITY 0x0008 /* bad ram chips caused a parity error */ -#define SUN4C_SYNC_SBUS 0x0010 /* the SBUS had some problems... */ -#define SUN4C_SYNC_NOMEM 0x0020 /* translation to non-existent ram */ -#define SUN4C_SYNC_PROT 0x0040 /* access violated pte protections */ -#define SUN4C_SYNC_NPRESENT 0x0080 /* pte said that page was not present */ -#define SUN4C_SYNC_BADWRITE 0x8000 /* while writing something went bogus */ - -#define SUN4C_SYNC_BOLIXED \ - (SUN4C_SYNC_WDRESET | SUN4C_SYNC_SIZE | SUN4C_SYNC_SBUS | \ - SUN4C_SYNC_NOMEM | SUN4C_SYNC_PARITY) - -/* Now the asynchronous error codes, these are almost always produced - * by the cache writing things back to memory and getting a bad translation. - * Bad DVMA transactions can cause these faults too. - */ - -#define SUN4C_ASYNC_BADDVMA 0x0010 /* error during DVMA access */ -#define SUN4C_ASYNC_NOMEM 0x0020 /* write back pointed to bad phys addr */ -#define SUN4C_ASYNC_BADWB 0x0080 /* write back points to non-present page */ - -/* Memory parity error register with associated bit constants. */ -#ifndef __ASSEMBLY__ -extern __volatile__ unsigned long __iomem *sun4c_memerr_reg; -#endif - -#define SUN4C_MPE_ERROR 0x80 /* Parity error detected. (ro) */ -#define SUN4C_MPE_MULTI 0x40 /* Multiple parity errors detected. (ro) */ -#define SUN4C_MPE_TEST 0x20 /* Write inverse parity. (rw) */ -#define SUN4C_MPE_CHECK 0x10 /* Enable parity checking. (rw) */ -#define SUN4C_MPE_ERR00 0x08 /* Parity error in bits 0-7. (ro) */ -#define SUN4C_MPE_ERR08 0x04 /* Parity error in bits 8-15. (ro) */ -#define SUN4C_MPE_ERR16 0x02 /* Parity error in bits 16-23. (ro) */ -#define SUN4C_MPE_ERR24 0x01 /* Parity error in bits 24-31. (ro) */ -#define SUN4C_MPE_ERRS 0x0F /* Bit mask for the error bits. (ro) */ - -#endif /* !(_SPARC_MEMREG_H) */ diff --git a/include/asm-sparc/mman.h b/include/asm-sparc/mman.h deleted file mode 100644 index fdfbbf0..0000000 --- a/include/asm-sparc/mman.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __SPARC_MMAN_H__ -#define __SPARC_MMAN_H__ - -#include - -/* SunOS'ified... */ - -#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */ -#define MAP_NORESERVE 0x40 /* don't reserve swap pages */ -#define MAP_INHERIT 0x80 /* SunOS doesn't do this, but... */ -#define MAP_LOCKED 0x100 /* lock the mapping */ -#define _MAP_NEW 0x80000000 /* Binary compatibility is fun... */ - -#define MAP_GROWSDOWN 0x0200 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ - -#define MCL_CURRENT 0x2000 /* lock all currently mapped pages */ -#define MCL_FUTURE 0x4000 /* lock all additions to address space */ - -#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len) -int sparc_mmap_check(unsigned long addr, unsigned long len); -#endif -#endif - -#endif /* __SPARC_MMAN_H__ */ diff --git a/include/asm-sparc/mmu.h b/include/asm-sparc/mmu.h deleted file mode 100644 index ee66bf6..0000000 --- a/include/asm-sparc/mmu.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_MMU_H -#define ___ASM_SPARC_MMU_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/mmu_32.h b/include/asm-sparc/mmu_32.h deleted file mode 100644 index ccd36d2..0000000 --- a/include/asm-sparc/mmu_32.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_t; - -#endif diff --git a/include/asm-sparc/mmu_64.h b/include/asm-sparc/mmu_64.h deleted file mode 100644 index 9067dc5..0000000 --- a/include/asm-sparc/mmu_64.h +++ /dev/null @@ -1,123 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -#include -#include -#include - -#define CTX_NR_BITS 13 - -#define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) - -/* UltraSPARC-III+ and later have a feature whereby you can - * select what page size the various Data-TLB instances in the - * chip. In order to gracefully support this, we put the version - * field in a spot outside of the areas of the context register - * where this parameter is specified. - */ -#define CTX_VERSION_SHIFT 22 -#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT) - -#define CTX_PGSZ_8KB _AC(0x0,UL) -#define CTX_PGSZ_64KB _AC(0x1,UL) -#define CTX_PGSZ_512KB _AC(0x2,UL) -#define CTX_PGSZ_4MB _AC(0x3,UL) -#define CTX_PGSZ_BITS _AC(0x7,UL) -#define CTX_PGSZ0_NUC_SHIFT 61 -#define CTX_PGSZ1_NUC_SHIFT 58 -#define CTX_PGSZ0_SHIFT 16 -#define CTX_PGSZ1_SHIFT 19 -#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ - (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) - -#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) -#define CTX_PGSZ_BASE CTX_PGSZ_8KB -#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) -#define CTX_PGSZ_BASE CTX_PGSZ_64KB -#else -#error No page size specified in kernel configuration -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define CTX_PGSZ_HUGE CTX_PGSZ_4MB -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define CTX_PGSZ_HUGE CTX_PGSZ_512KB -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define CTX_PGSZ_HUGE CTX_PGSZ_64KB -#endif - -#define CTX_PGSZ_KERN CTX_PGSZ_4MB - -/* Thus, when running on UltraSPARC-III+ and later, we use the following - * PRIMARY_CONTEXT register values for the kernel context. - */ -#define CTX_CHEETAH_PLUS_NUC \ - ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \ - (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT)) - -#define CTX_CHEETAH_PLUS_CTX0 \ - ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \ - (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT)) - -/* If you want "the TLB context number" use CTX_NR_MASK. If you - * want "the bits I program into the context registers" use - * CTX_HW_MASK. - */ -#define CTX_NR_MASK TAG_CONTEXT_BITS -#define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) - -#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) -#define CTX_VALID(__ctx) \ - (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) -#define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) -#define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) - -#ifndef __ASSEMBLY__ - -#define TSB_ENTRY_ALIGNMENT 16 - -struct tsb { - unsigned long tag; - unsigned long pte; -} __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); - -extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); -extern void tsb_flush(unsigned long ent, unsigned long tag); -extern void tsb_init(struct tsb *tsb, unsigned long size); - -struct tsb_config { - struct tsb *tsb; - unsigned long tsb_rss_limit; - unsigned long tsb_nentries; - unsigned long tsb_reg_val; - unsigned long tsb_map_vaddr; - unsigned long tsb_map_pte; -}; - -#define MM_TSB_BASE 0 - -#ifdef CONFIG_HUGETLB_PAGE -#define MM_TSB_HUGE 1 -#define MM_NUM_TSBS 2 -#else -#define MM_NUM_TSBS 1 -#endif - -typedef struct { - spinlock_t lock; - unsigned long sparc64_ctx_val; - unsigned long huge_pte_count; - struct tsb_config tsb_block[MM_NUM_TSBS]; - struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; -} mm_context_t; - -#endif /* !__ASSEMBLY__ */ - -#define TSB_CONFIG_TSB 0x00 -#define TSB_CONFIG_RSS_LIMIT 0x08 -#define TSB_CONFIG_NENTRIES 0x10 -#define TSB_CONFIG_REG_VAL 0x18 -#define TSB_CONFIG_MAP_VADDR 0x20 -#define TSB_CONFIG_MAP_PTE 0x28 - -#endif /* __MMU_H */ diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h deleted file mode 100644 index e14efb9..0000000 --- a/include/asm-sparc/mmu_context.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_MMU_CONTEXT_H -#define ___ASM_SPARC_MMU_CONTEXT_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/mmu_context_32.h b/include/asm-sparc/mmu_context_32.h deleted file mode 100644 index 671a997b..0000000 --- a/include/asm-sparc/mmu_context_32.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef __SPARC_MMU_CONTEXT_H -#define __SPARC_MMU_CONTEXT_H - -#include - -#ifndef __ASSEMBLY__ - -#include - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -/* - * Initialize a new mmu context. This is invoked when a new - * address space instance (unique or shared) is instantiated. - */ -#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) - -/* - * Destroy a dead context. This occurs when mmput drops the - * mm_users count to zero, the mmaps have been released, and - * all the page tables have been flushed. Our job is to destroy - * any remaining processor-specific state. - */ -BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *) - -#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm) - -/* Switch the current MM context. */ -BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *) - -#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk) - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* Activate a new MM instance for the current task. */ -#define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL) - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC_MMU_CONTEXT_H) */ diff --git a/include/asm-sparc/mmu_context_64.h b/include/asm-sparc/mmu_context_64.h deleted file mode 100644 index 5693ab4..0000000 --- a/include/asm-sparc/mmu_context_64.h +++ /dev/null @@ -1,155 +0,0 @@ -#ifndef __SPARC64_MMU_CONTEXT_H -#define __SPARC64_MMU_CONTEXT_H - -/* Derived heavily from Linus's Alpha/AXP ASN code... */ - -#ifndef __ASSEMBLY__ - -#include -#include -#include -#include - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -extern spinlock_t ctx_alloc_lock; -extern unsigned long tlb_context_cache; -extern unsigned long mmu_context_bmap[]; - -extern void get_new_mmu_context(struct mm_struct *mm); -#ifdef CONFIG_SMP -extern void smp_new_mmu_context_version(void); -#else -#define smp_new_mmu_context_version() do { } while (0) -#endif - -extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); -extern void destroy_context(struct mm_struct *mm); - -extern void __tsb_context_switch(unsigned long pgd_pa, - struct tsb_config *tsb_base, - struct tsb_config *tsb_huge, - unsigned long tsb_descr_pa); - -static inline void tsb_context_switch(struct mm_struct *mm) -{ - __tsb_context_switch(__pa(mm->pgd), - &mm->context.tsb_block[0], -#ifdef CONFIG_HUGETLB_PAGE - (mm->context.tsb_block[1].tsb ? - &mm->context.tsb_block[1] : - NULL) -#else - NULL -#endif - , __pa(&mm->context.tsb_descr[0])); -} - -extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss); -#ifdef CONFIG_SMP -extern void smp_tsb_sync(struct mm_struct *mm); -#else -#define smp_tsb_sync(__mm) do { } while (0) -#endif - -/* Set MMU context in the actual hardware. */ -#define load_secondary_context(__mm) \ - __asm__ __volatile__( \ - "\n661: stxa %0, [%1] %2\n" \ - " .section .sun4v_1insn_patch, \"ax\"\n" \ - " .word 661b\n" \ - " stxa %0, [%1] %3\n" \ - " .previous\n" \ - " flush %%g6\n" \ - : /* No outputs */ \ - : "r" (CTX_HWBITS((__mm)->context)), \ - "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU)) - -extern void __flush_tlb_mm(unsigned long, unsigned long); - -/* Switch the current MM context. Interrupts are disabled. */ -static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) -{ - unsigned long ctx_valid, flags; - int cpu; - - if (unlikely(mm == &init_mm)) - return; - - spin_lock_irqsave(&mm->context.lock, flags); - ctx_valid = CTX_VALID(mm->context); - if (!ctx_valid) - get_new_mmu_context(mm); - - /* We have to be extremely careful here or else we will miss - * a TSB grow if we switch back and forth between a kernel - * thread and an address space which has it's TSB size increased - * on another processor. - * - * It is possible to play some games in order to optimize the - * switch, but the safest thing to do is to unconditionally - * perform the secondary context load and the TSB context switch. - * - * For reference the bad case is, for address space "A": - * - * CPU 0 CPU 1 - * run address space A - * set cpu0's bits in cpu_vm_mask - * switch to kernel thread, borrow - * address space A via entry_lazy_tlb - * run address space A - * set cpu1's bit in cpu_vm_mask - * flush_tlb_pending() - * reset cpu_vm_mask to just cpu1 - * TSB grow - * run address space A - * context was valid, so skip - * TSB context switch - * - * At that point cpu0 continues to use a stale TSB, the one from - * before the TSB grow performed on cpu1. cpu1 did not cross-call - * cpu0 to update it's TSB because at that point the cpu_vm_mask - * only had cpu1 set in it. - */ - load_secondary_context(mm); - tsb_context_switch(mm); - - /* Any time a processor runs a context on an address space - * for the first time, we must flush that context out of the - * local TLB. - */ - cpu = smp_processor_id(); - if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { - cpu_set(cpu, mm->cpu_vm_mask); - __flush_tlb_mm(CTX_HWBITS(mm->context), - SECONDARY_CONTEXT); - } - spin_unlock_irqrestore(&mm->context.lock, flags); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* Activate a new MM instance for the current task. */ -static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) -{ - unsigned long flags; - int cpu; - - spin_lock_irqsave(&mm->context.lock, flags); - if (!CTX_VALID(mm->context)) - get_new_mmu_context(mm); - cpu = smp_processor_id(); - if (!cpu_isset(cpu, mm->cpu_vm_mask)) - cpu_set(cpu, mm->cpu_vm_mask); - - load_secondary_context(mm); - __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); - tsb_context_switch(mm); - spin_unlock_irqrestore(&mm->context.lock, flags); -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_MMU_CONTEXT_H) */ diff --git a/include/asm-sparc/mmzone.h b/include/asm-sparc/mmzone.h deleted file mode 100644 index ebf5986..0000000 --- a/include/asm-sparc/mmzone.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _SPARC64_MMZONE_H -#define _SPARC64_MMZONE_H - -#ifdef CONFIG_NEED_MULTIPLE_NODES - -extern struct pglist_data *node_data[]; - -#define NODE_DATA(nid) (node_data[nid]) -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn) - -extern int numa_cpu_lookup_table[]; -extern cpumask_t numa_cpumask_lookup_table[]; - -#endif /* CONFIG_NEED_MULTIPLE_NODES */ - -#endif /* _SPARC64_MMZONE_H */ diff --git a/include/asm-sparc/module.h b/include/asm-sparc/module.h deleted file mode 100644 index 516138f..0000000 --- a/include/asm-sparc/module.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_MODULE_H -#define ___ASM_SPARC_MODULE_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/module_32.h b/include/asm-sparc/module_32.h deleted file mode 100644 index cbd9e67..0000000 --- a/include/asm-sparc/module_32.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_SPARC_MODULE_H -#define _ASM_SPARC_MODULE_H -struct mod_arch_specific { }; -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr -#endif /* _ASM_SPARC_MODULE_H */ diff --git a/include/asm-sparc/module_64.h b/include/asm-sparc/module_64.h deleted file mode 100644 index 3d77ba4..0000000 --- a/include/asm-sparc/module_64.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_SPARC64_MODULE_H -#define _ASM_SPARC64_MODULE_H -struct mod_arch_specific { }; -#define Elf_Shdr Elf64_Shdr -#define Elf_Sym Elf64_Sym -#define Elf_Ehdr Elf64_Ehdr -#endif /* _ASM_SPARC64_MODULE_H */ diff --git a/include/asm-sparc/mostek.h b/include/asm-sparc/mostek.h deleted file mode 100644 index 5b9f7fe..0000000 --- a/include/asm-sparc/mostek.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_MOSTEK_H -#define ___ASM_SPARC_MOSTEK_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/mostek_32.h b/include/asm-sparc/mostek_32.h deleted file mode 100644 index a99590c..0000000 --- a/include/asm-sparc/mostek_32.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * mostek.h: Describes the various Mostek time of day clock registers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca) - */ - -#ifndef _SPARC_MOSTEK_H -#define _SPARC_MOSTEK_H - -#include -#include - -/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) - * - * Data - * Address Function - * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 - * 7ff - - - - - - - - Year 00-99 - * 7fe 0 0 0 - - - - - Month 01-12 - * 7fd 0 0 - - - - - - Date 01-31 - * 7fc 0 FT 0 0 0 - - - Day 01-07 - * 7fb KS 0 - - - - - - Hours 00-23 - * 7fa 0 - - - - - - - Minutes 00-59 - * 7f9 ST - - - - - - - Seconds 00-59 - * 7f8 W R S - - - - - Control - * - * * ST is STOP BIT - * * W is WRITE BIT - * * R is READ BIT - * * S is SIGN BIT - * * FT is FREQ TEST BIT - * * KS is KICK START BIT - */ - -/* The Mostek 48t02 real time clock and NVRAM chip. The registers - * other than the control register are in binary coded decimal. Some - * control bits also live outside the control register. - */ -#define mostek_read(_addr) readb(_addr) -#define mostek_write(_addr,_val) writeb(_val, _addr) -#define MOSTEK_EEPROM 0x0000UL -#define MOSTEK_IDPROM 0x07d8UL -#define MOSTEK_CREG 0x07f8UL -#define MOSTEK_SEC 0x07f9UL -#define MOSTEK_MIN 0x07faUL -#define MOSTEK_HOUR 0x07fbUL -#define MOSTEK_DOW 0x07fcUL -#define MOSTEK_DOM 0x07fdUL -#define MOSTEK_MONTH 0x07feUL -#define MOSTEK_YEAR 0x07ffUL - -struct mostek48t02 { - volatile char eeprom[2008]; /* This is the eeprom, don't touch! */ - struct idprom idprom; /* The idprom lives here. */ - volatile unsigned char creg; /* Control register */ - volatile unsigned char sec; /* Seconds (0-59) */ - volatile unsigned char min; /* Minutes (0-59) */ - volatile unsigned char hour; /* Hour (0-23) */ - volatile unsigned char dow; /* Day of the week (1-7) */ - volatile unsigned char dom; /* Day of the month (1-31) */ - volatile unsigned char month; /* Month of year (1-12) */ - volatile unsigned char year; /* Year (0-99) */ -}; - -extern spinlock_t mostek_lock; -extern void __iomem *mstk48t02_regs; - -/* Control register values. */ -#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ -#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ -#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ - -/* Control bits that live in the other registers. */ -#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ -#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ -#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ - -#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ -#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) - -/* Masks that define how much space each value takes up. */ -#define MSTK_SEC_MASK 0x7f -#define MSTK_MIN_MASK 0x7f -#define MSTK_HOUR_MASK 0x3f -#define MSTK_DOW_MASK 0x07 -#define MSTK_DOM_MASK 0x3f -#define MSTK_MONTH_MASK 0x1f -#define MSTK_YEAR_MASK 0xffU - -/* Binary coded decimal conversion macros. */ -#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) -#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) - -/* Generic register set and get macros for internal use. */ -#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK)) -#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0) - -/* Macros to make register access easier on our fingers. These give you - * the decimal value of the register requested if applicable. You pass - * the a pointer to a 'struct mostek48t02'. - */ -#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg) -#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC) -#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN) -#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR) -#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW) -#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM) -#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH) -#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR) - -#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC) -#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN) -#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR) -#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW) -#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM) -#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH) -#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR) - - -/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the - * same (basically) layout of the 48t02 chip except for the extra - * NVRAM on board (8 KB against the 48t02's 2 KB). - */ -struct mostek48t08 { - char offset[6*1024]; /* Magic things may be here, who knows? */ - struct mostek48t02 regs; /* Here is what we are interested in. */ -}; - -#ifdef CONFIG_SUN4 -enum sparc_clock_type { MSTK48T02, MSTK48T08, \ -INTERSIL, MSTK_INVALID }; -#else -enum sparc_clock_type { MSTK48T02, MSTK48T08, \ -MSTK_INVALID }; -#endif - -#ifdef CONFIG_SUN4 -/* intersil on a sun 4/260 code data from harris doc */ -struct intersil_dt { - volatile unsigned char int_csec; - volatile unsigned char int_hour; - volatile unsigned char int_min; - volatile unsigned char int_sec; - volatile unsigned char int_month; - volatile unsigned char int_day; - volatile unsigned char int_year; - volatile unsigned char int_dow; -}; - -struct intersil { - struct intersil_dt clk; - struct intersil_dt cmp; - volatile unsigned char int_intr_reg; - volatile unsigned char int_cmd_reg; -}; - -#define INTERSIL_STOP 0x0 -#define INTERSIL_START 0x8 -#define INTERSIL_INTR_DISABLE 0x0 -#define INTERSIL_INTR_ENABLE 0x10 -#define INTERSIL_32K 0x0 -#define INTERSIL_NORMAL 0x0 -#define INTERSIL_24H 0x4 -#define INTERSIL_INT_100HZ 0x2 - -/* end of intersil info */ -#endif - -#endif /* !(_SPARC_MOSTEK_H) */ diff --git a/include/asm-sparc/mostek_64.h b/include/asm-sparc/mostek_64.h deleted file mode 100644 index c5652de..0000000 --- a/include/asm-sparc/mostek_64.h +++ /dev/null @@ -1,143 +0,0 @@ -/* mostek.h: Describes the various Mostek time of day clock registers. - * - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - */ - -#ifndef _SPARC64_MOSTEK_H -#define _SPARC64_MOSTEK_H - -#include - -/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) - * - * Data - * Address Function - * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 - * 7ff - - - - - - - - Year 00-99 - * 7fe 0 0 0 - - - - - Month 01-12 - * 7fd 0 0 - - - - - - Date 01-31 - * 7fc 0 FT 0 0 0 - - - Day 01-07 - * 7fb KS 0 - - - - - - Hours 00-23 - * 7fa 0 - - - - - - - Minutes 00-59 - * 7f9 ST - - - - - - - Seconds 00-59 - * 7f8 W R S - - - - - Control - * - * * ST is STOP BIT - * * W is WRITE BIT - * * R is READ BIT - * * S is SIGN BIT - * * FT is FREQ TEST BIT - * * KS is KICK START BIT - */ - -/* The Mostek 48t02 real time clock and NVRAM chip. The registers - * other than the control register are in binary coded decimal. Some - * control bits also live outside the control register. - * - * We now deal with physical addresses for I/O to the chip. -DaveM - */ -static inline u8 mostek_read(void __iomem *addr) -{ - u8 ret; - - __asm__ __volatile__("lduba [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - return ret; -} - -static inline void mostek_write(void __iomem *addr, u8 val) -{ - __asm__ __volatile__("stba %0, [%1] %2" - : /* no outputs */ - : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -#define MOSTEK_EEPROM 0x0000UL -#define MOSTEK_IDPROM 0x07d8UL -#define MOSTEK_CREG 0x07f8UL -#define MOSTEK_SEC 0x07f9UL -#define MOSTEK_MIN 0x07faUL -#define MOSTEK_HOUR 0x07fbUL -#define MOSTEK_DOW 0x07fcUL -#define MOSTEK_DOM 0x07fdUL -#define MOSTEK_MONTH 0x07feUL -#define MOSTEK_YEAR 0x07ffUL - -extern spinlock_t mostek_lock; -extern void __iomem *mstk48t02_regs; - -/* Control register values. */ -#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ -#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ -#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ - -/* Control bits that live in the other registers. */ -#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ -#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ -#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ - -#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ -#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) - -/* Masks that define how much space each value takes up. */ -#define MSTK_SEC_MASK 0x7f -#define MSTK_MIN_MASK 0x7f -#define MSTK_HOUR_MASK 0x3f -#define MSTK_DOW_MASK 0x07 -#define MSTK_DOM_MASK 0x3f -#define MSTK_MONTH_MASK 0x1f -#define MSTK_YEAR_MASK 0xffU - -/* Binary coded decimal conversion macros. */ -#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) -#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) - -/* Generic register set and get macros for internal use. */ -#define MSTK_GET(regs,name) \ - (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK)) -#define MSTK_SET(regs,name,value) \ -do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \ - __val &= ~(MSTK_ ## name ## _MASK); \ - __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \ - (MSTK_ ## name ## _MASK)); \ - mostek_write(regs + MOSTEK_ ## name, __val); \ -} while(0) - -/* Macros to make register access easier on our fingers. These give you - * the decimal value of the register requested if applicable. You pass - * the a pointer to a 'struct mostek48t02'. - */ -#define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG)) -#define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC) -#define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN) -#define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR) -#define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW) -#define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM) -#define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH) -#define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR) - -#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value) -#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value) -#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value) -#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value) -#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value) -#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value) -#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value) - - -/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the - * same (basically) layout of the 48t02 chip except for the extra - * NVRAM on board (8 KB against the 48t02's 2 KB). - */ -#define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */ -#define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */ - -/* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older - * clock chip definitions around just in case. - */ -#define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */ -#define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */ - -#endif /* !(_SPARC64_MOSTEK_H) */ diff --git a/include/asm-sparc/mpmbox.h b/include/asm-sparc/mpmbox.h deleted file mode 100644 index f842303..0000000 --- a/include/asm-sparc/mpmbox.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * mpmbox.h: Interface and defines for the OpenProm mailbox - * facilities for MP machines under Linux. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_MPMBOX_H -#define _SPARC_MPMBOX_H - -/* The prom allocates, for each CPU on the machine an unsigned - * byte in physical ram. You probe the device tree prom nodes - * for these values. The purpose of this byte is to be able to - * pass messages from one cpu to another. - */ - -/* These are the main message types we have to look for in our - * Cpu mailboxes, based upon these values we decide what course - * of action to take. - */ - -/* The CPU is executing code in the kernel. */ -#define MAILBOX_ISRUNNING 0xf0 - -/* Another CPU called romvec->pv_exit(), you should call - * prom_stopcpu() when you see this in your mailbox. - */ -#define MAILBOX_EXIT 0xfb - -/* Another CPU called romvec->pv_enter(), you should call - * prom_cpuidle() when this is seen. - */ -#define MAILBOX_GOSPIN 0xfc - -/* Another CPU has hit a breakpoint either into kadb or the prom - * itself. Just like MAILBOX_GOSPIN, you should call prom_cpuidle() - * at this point. - */ -#define MAILBOX_BPT_SPIN 0xfd - -/* Oh geese, some other nitwit got a damn watchdog reset. The party's - * over so go call prom_stopcpu(). - */ -#define MAILBOX_WDOG_STOP 0xfe - -#ifndef __ASSEMBLY__ - -/* Handy macro's to determine a cpu's state. */ - -/* Is the cpu still in Power On Self Test? */ -#define MBOX_POST_P(letter) ((letter) >= 0x00 && (letter) <= 0x7f) - -/* Is the cpu at the 'ok' prompt of the PROM? */ -#define MBOX_PROMPROMPT_P(letter) ((letter) >= 0x80 && (letter) <= 0x8f) - -/* Is the cpu spinning in the PROM? */ -#define MBOX_PROMSPIN_P(letter) ((letter) >= 0x90 && (letter) <= 0xef) - -/* Sanity check... This is junk mail, throw it out. */ -#define MBOX_BOGON_P(letter) ((letter) >= 0xf1 && (letter) <= 0xfa) - -/* Is the cpu actively running an application/kernel-code? */ -#define MBOX_RUNNING_P(letter) ((letter) == MAILBOX_ISRUNNING) - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC_MPMBOX_H) */ diff --git a/include/asm-sparc/msgbuf.h b/include/asm-sparc/msgbuf.h deleted file mode 100644 index efc7cbe9..0000000 --- a/include/asm-sparc/msgbuf.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _SPARC_MSGBUF_H -#define _SPARC_MSGBUF_H - -/* - * The msqid64_ds structure for sparc64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -#if defined(__sparc__) && defined(__arch64__) -# define PADDING(x) -#else -# define PADDING(x) unsigned int x; -#endif - - -struct msqid64_ds { - struct ipc64_perm msg_perm; - PADDING(__pad1) - __kernel_time_t msg_stime; /* last msgsnd time */ - PADDING(__pad2) - __kernel_time_t msg_rtime; /* last msgrcv time */ - PADDING(__pad3) - __kernel_time_t msg_ctime; /* last change time */ - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused1; - unsigned long __unused2; -}; -#undef PADDING -#endif /* _SPARC_MSGBUF_H */ diff --git a/include/asm-sparc/msi.h b/include/asm-sparc/msi.h deleted file mode 100644 index 724ca56..0000000 --- a/include/asm-sparc/msi.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * msi.h: Defines specific to the MBus - Sbus - Interface. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef _SPARC_MSI_H -#define _SPARC_MSI_H - -/* - * Locations of MSI Registers. - */ -#define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */ - -/* - * Useful bits in the MSI Registers. - */ -#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */ - - -static inline void msi_set_sync(void) -{ - __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t" - "andn %%g3, %2, %%g3\n\t" - "sta %%g3, [%0] %1\n\t" : : - "r" (MSI_MBUS_ARBEN), - "i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3"); -} - -#endif /* !(_SPARC_MSI_H) */ diff --git a/include/asm-sparc/mutex.h b/include/asm-sparc/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-sparc/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-sparc/mxcc.h b/include/asm-sparc/mxcc.h deleted file mode 100644 index c0517bd..0000000 --- a/include/asm-sparc/mxcc.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * mxcc.h: Definitions of the Viking MXCC registers - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_MXCC_H -#define _SPARC_MXCC_H - -/* These registers are accessed through ASI 0x2. */ -#define MXCC_DATSTREAM 0x1C00000 /* Data stream register */ -#define MXCC_SRCSTREAM 0x1C00100 /* Source stream register */ -#define MXCC_DESSTREAM 0x1C00200 /* Destination stream register */ -#define MXCC_RMCOUNT 0x1C00300 /* Count of references and misses */ -#define MXCC_STEST 0x1C00804 /* Internal self-test */ -#define MXCC_CREG 0x1C00A04 /* Control register */ -#define MXCC_SREG 0x1C00B00 /* Status register */ -#define MXCC_RREG 0x1C00C04 /* Reset register */ -#define MXCC_EREG 0x1C00E00 /* Error code register */ -#define MXCC_PREG 0x1C00F04 /* Address port register */ - -/* Some MXCC constants. */ -#define MXCC_STREAM_SIZE 0x20 /* Size in bytes of one stream r/w */ - -/* The MXCC Control Register: - * - * ---------------------------------------------------------------------- - * | | RRC | RSV |PRE|MCE|PARE|ECE|RSV| - * ---------------------------------------------------------------------- - * 31 10 9 8-6 5 4 3 2 1-0 - * - * RRC: Controls what you read from MXCC_RMCOUNT reg. - * 0=Misses 1=References - * PRE: Prefetch enable - * MCE: Multiple Command Enable - * PARE: Parity enable - * ECE: External cache enable - */ - -#define MXCC_CTL_RRC 0x00000200 -#define MXCC_CTL_PRE 0x00000020 -#define MXCC_CTL_MCE 0x00000010 -#define MXCC_CTL_PARE 0x00000008 -#define MXCC_CTL_ECE 0x00000004 - -/* The MXCC Error Register: - * - * -------------------------------------------------------- - * |ME| RSV|CE|PEW|PEE|ASE|EIV| MOPC|ECODE|PRIV|RSV|HPADDR| - * -------------------------------------------------------- - * 31 30 29 28 27 26 25 24-15 14-7 6 5-3 2-0 - * - * ME: Multiple Errors have occurred - * CE: Cache consistency Error - * PEW: Parity Error during a Write operation - * PEE: Parity Error involving the External cache - * ASE: ASynchronous Error - * EIV: This register is toast - * MOPC: MXCC Operation Code for instance causing error - * ECODE: The Error CODE - * PRIV: A privileged mode error? 0=no 1=yes - * HPADDR: High PhysicalADDRess bits (35-32) - */ - -#define MXCC_ERR_ME 0x80000000 -#define MXCC_ERR_CE 0x20000000 -#define MXCC_ERR_PEW 0x10000000 -#define MXCC_ERR_PEE 0x08000000 -#define MXCC_ERR_ASE 0x04000000 -#define MXCC_ERR_EIV 0x02000000 -#define MXCC_ERR_MOPC 0x01FF8000 -#define MXCC_ERR_ECODE 0x00007F80 -#define MXCC_ERR_PRIV 0x00000040 -#define MXCC_ERR_HPADDR 0x0000000f - -/* The MXCC Port register: - * - * ----------------------------------------------------- - * | | MID | | - * ----------------------------------------------------- - * 31 21 20-18 17 0 - * - * MID: The moduleID of the cpu your read this from. - */ - -#ifndef __ASSEMBLY__ - -static inline void mxcc_set_stream_src(unsigned long *paddr) -{ - unsigned long data0 = paddr[0]; - unsigned long data1 = paddr[1]; - - __asm__ __volatile__ ("or %%g0, %0, %%g2\n\t" - "or %%g0, %1, %%g3\n\t" - "stda %%g2, [%2] %3\n\t" : : - "r" (data0), "r" (data1), - "r" (MXCC_SRCSTREAM), - "i" (ASI_M_MXCC) : "g2", "g3"); -} - -static inline void mxcc_set_stream_dst(unsigned long *paddr) -{ - unsigned long data0 = paddr[0]; - unsigned long data1 = paddr[1]; - - __asm__ __volatile__ ("or %%g0, %0, %%g2\n\t" - "or %%g0, %1, %%g3\n\t" - "stda %%g2, [%2] %3\n\t" : : - "r" (data0), "r" (data1), - "r" (MXCC_DESSTREAM), - "i" (ASI_M_MXCC) : "g2", "g3"); -} - -static inline unsigned long mxcc_get_creg(void) -{ - unsigned long mxcc_control; - - __asm__ __volatile__("set 0xffffffff, %%g2\n\t" - "set 0xffffffff, %%g3\n\t" - "stda %%g2, [%1] %2\n\t" - "lda [%3] %2, %0\n\t" : - "=r" (mxcc_control) : - "r" (MXCC_EREG), "i" (ASI_M_MXCC), - "r" (MXCC_CREG) : "g2", "g3"); - return mxcc_control; -} - -static inline void mxcc_set_creg(unsigned long mxcc_control) -{ - __asm__ __volatile__("sta %0, [%1] %2\n\t" : : - "r" (mxcc_control), "r" (MXCC_CREG), - "i" (ASI_M_MXCC)); -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* !(_SPARC_MXCC_H) */ diff --git a/include/asm-sparc/ns87303.h b/include/asm-sparc/ns87303.h deleted file mode 100644 index 686defe..0000000 --- a/include/asm-sparc/ns87303.h +++ /dev/null @@ -1,118 +0,0 @@ -/* ns87303.h: Configuration Register Description for the - * National Semiconductor PC87303 (SuperIO). - * - * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef _SPARC_NS87303_H -#define _SPARC_NS87303_H 1 - -/* - * Control Register Index Values - */ -#define FER 0x00 -#define FAR 0x01 -#define PTR 0x02 -#define FCR 0x03 -#define PCR 0x04 -#define KRR 0x05 -#define PMC 0x06 -#define TUP 0x07 -#define SID 0x08 -#define ASC 0x09 -#define CS0CF0 0x0a -#define CS0CF1 0x0b -#define CS1CF0 0x0c -#define CS1CF1 0x0d - -/* Function Enable Register (FER) bits */ -#define FER_EDM 0x10 /* Encoded Drive and Motor pin information */ - -/* Function Address Register (FAR) bits */ -#define FAR_LPT_MASK 0x03 -#define FAR_LPTB 0x00 -#define FAR_LPTA 0x01 -#define FAR_LPTC 0x02 - -/* Power and Test Register (PTR) bits */ -#define PTR_LPTB_IRQ7 0x08 -#define PTR_LEVEL_IRQ 0x80 /* When not ECP/EPP: Use level IRQ */ -#define PTR_LPT_REG_DIR 0x80 /* When ECP/EPP: LPT CTR controlls direction */ - /* of the parallel port */ - -/* Function Control Register (FCR) bits */ -#define FCR_LDE 0x10 /* Logical Drive Exchange */ -#define FCR_ZWS_ENA 0x20 /* Enable short host read/write in ECP/EPP */ - -/* Printer Control Register (PCR) bits */ -#define PCR_EPP_ENABLE 0x01 -#define PCR_EPP_IEEE 0x02 /* Enable EPP Version 1.9 (IEEE 1284) */ -#define PCR_ECP_ENABLE 0x04 -#define PCR_ECP_CLK_ENA 0x08 /* If 0 ECP Clock is stopped on Power down */ -#define PCR_IRQ_POLAR 0x20 /* If 0 IRQ is level high or negative pulse, */ - /* if 1 polarity is inverted */ -#define PCR_IRQ_ODRAIN 0x40 /* If 1, IRQ is open drain */ - -/* Tape UARTs and Parallel Port Config Register (TUP) bits */ -#define TUP_EPP_TIMO 0x02 /* Enable EPP timeout IRQ */ - -/* Advanced SuperIO Config Register (ASC) bits */ -#define ASC_LPT_IRQ7 0x01 /* Always use IRQ7 for LPT */ -#define ASC_DRV2_SEL 0x02 /* Logical Drive Exchange controlled by TDR */ - -#define FER_RESERVED 0x00 -#define FAR_RESERVED 0x00 -#define PTR_RESERVED 0x73 -#define FCR_RESERVED 0xc4 -#define PCR_RESERVED 0x10 -#define KRR_RESERVED 0x00 -#define PMC_RESERVED 0x98 -#define TUP_RESERVED 0xfb -#define SIP_RESERVED 0x00 -#define ASC_RESERVED 0x18 -#define CS0CF0_RESERVED 0x00 -#define CS0CF1_RESERVED 0x08 -#define CS1CF0_RESERVED 0x00 -#define CS1CF1_RESERVED 0x08 - -#ifdef __KERNEL__ - -#include - -#include -#include - -extern spinlock_t ns87303_lock; - -static inline int ns87303_modify(unsigned long port, unsigned int index, - unsigned char clr, unsigned char set) -{ - static unsigned char reserved[] = { - FER_RESERVED, FAR_RESERVED, PTR_RESERVED, FCR_RESERVED, - PCR_RESERVED, KRR_RESERVED, PMC_RESERVED, TUP_RESERVED, - SIP_RESERVED, ASC_RESERVED, CS0CF0_RESERVED, CS0CF1_RESERVED, - CS1CF0_RESERVED, CS1CF1_RESERVED - }; - unsigned long flags; - unsigned char value; - - if (index > 0x0d) - return -EINVAL; - - spin_lock_irqsave(&ns87303_lock, flags); - - outb(index, port); - value = inb(port + 1); - value &= ~(reserved[index] | clr); - value |= set; - outb(value, port + 1); - outb(value, port + 1); - - spin_unlock_irqrestore(&ns87303_lock, flags); - - return 0; -} - -#endif /* __KERNEL__ */ - -#endif /* !(_SPARC_NS87303_H) */ diff --git a/include/asm-sparc/obio.h b/include/asm-sparc/obio.h deleted file mode 100644 index 1a7544c..0000000 --- a/include/asm-sparc/obio.h +++ /dev/null @@ -1,249 +0,0 @@ -/* - * obio.h: Some useful locations in 0xFXXXXXXXX PA obio space on sun4d. - * - * Copyright (C) 1997 Jakub Jelinek - */ - -#ifndef _SPARC_OBIO_H -#define _SPARC_OBIO_H - -#include - -/* This weird monster likes to use the very upper parts of - 36bit PA for these things :) */ - -/* CSR space (for each XDBUS) - * ------------------------------------------------------------------------ - * | 0xFE | DEVID | | XDBUS ID | | - * ------------------------------------------------------------------------ - * 35 28 27 20 19 10 9 8 7 0 - */ - -#define CSR_BASE_ADDR 0xe0000000 -#define CSR_CPU_SHIFT (32 - 4 - 5) -#define CSR_XDBUS_SHIFT 8 - -#define CSR_BASE(cpu) (((CSR_BASE_ADDR >> CSR_CPU_SHIFT) + cpu) << CSR_CPU_SHIFT) - -/* ECSR space (not for each XDBUS) - * ------------------------------------------------------------------------ - * | 0xF | DEVID[7:1] | | - * ------------------------------------------------------------------------ - * 35 32 31 25 24 0 - */ - -#define ECSR_BASE_ADDR 0x00000000 -#define ECSR_CPU_SHIFT (32 - 5) -#define ECSR_DEV_SHIFT (32 - 8) - -#define ECSR_BASE(cpu) ((cpu) << ECSR_CPU_SHIFT) -#define ECSR_DEV_BASE(devid) ((devid) << ECSR_DEV_SHIFT) - -/* Bus Watcher */ -#define BW_LOCAL_BASE 0xfff00000 - -#define BW_CID 0x00000000 -#define BW_DBUS_CTRL 0x00000008 -#define BW_DBUS_DATA 0x00000010 -#define BW_CTRL 0x00001000 -#define BW_INTR_TABLE 0x00001040 -#define BW_INTR_TABLE_CLEAR 0x00001080 -#define BW_PRESCALER 0x000010c0 -#define BW_PTIMER_LIMIT 0x00002000 -#define BW_PTIMER_COUNTER2 0x00002004 -#define BW_PTIMER_NDLIMIT 0x00002008 -#define BW_PTIMER_CTRL 0x0000200c -#define BW_PTIMER_COUNTER 0x00002010 -#define BW_TIMER_LIMIT 0x00003000 -#define BW_TIMER_COUNTER2 0x00003004 -#define BW_TIMER_NDLIMIT 0x00003008 -#define BW_TIMER_CTRL 0x0000300c -#define BW_TIMER_COUNTER 0x00003010 - -/* BW Control */ -#define BW_CTRL_USER_TIMER 0x00000004 /* Is User Timer Free run enabled */ - -/* Boot Bus */ -#define BB_LOCAL_BASE 0xf0000000 - -#define BB_STAT1 0x00100000 -#define BB_STAT2 0x00120000 -#define BB_STAT3 0x00140000 -#define BB_LEDS 0x002e0000 - -/* Bits in BB_STAT2 */ -#define BB_STAT2_AC_INTR 0x04 /* Aiee! 5ms and power is gone... */ -#define BB_STAT2_TMP_INTR 0x10 /* My Penguins are burning. Are you able to smell it? */ -#define BB_STAT2_FAN_INTR 0x20 /* My fan refuses to work */ -#define BB_STAT2_PWR_INTR 0x40 /* On SC2000, one of the two ACs died. Ok, we go on... */ -#define BB_STAT2_MASK (BB_STAT2_AC_INTR|BB_STAT2_TMP_INTR|BB_STAT2_FAN_INTR|BB_STAT2_PWR_INTR) - -/* Cache Controller */ -#define CC_BASE 0x1F00000 -#define CC_DATSTREAM 0x1F00000 /* Data stream register */ -#define CC_DATSIZE 0x1F0003F /* Size */ -#define CC_SRCSTREAM 0x1F00100 /* Source stream register */ -#define CC_DESSTREAM 0x1F00200 /* Destination stream register */ -#define CC_RMCOUNT 0x1F00300 /* Count of references and misses */ -#define CC_IPEN 0x1F00406 /* Pending Interrupts */ -#define CC_IMSK 0x1F00506 /* Interrupt Mask */ -#define CC_ICLR 0x1F00606 /* Clear pending Interrupts */ -#define CC_IGEN 0x1F00704 /* Generate Interrupt register */ -#define CC_STEST 0x1F00804 /* Internal self-test */ -#define CC_CREG 0x1F00A04 /* Control register */ -#define CC_SREG 0x1F00B00 /* Status register */ -#define CC_RREG 0x1F00C04 /* Reset register */ -#define CC_EREG 0x1F00E00 /* Error code register */ -#define CC_CID 0x1F00F04 /* Component ID */ - -#ifndef __ASSEMBLY__ - -static inline int bw_get_intr_mask(int sbus_level) -{ - int mask; - - __asm__ __volatile__ ("lduha [%1] %2, %0" : - "=r" (mask) : - "r" (BW_LOCAL_BASE + BW_INTR_TABLE + (sbus_level << 3)), - "i" (ASI_M_CTL)); - return mask; -} - -static inline void bw_clear_intr_mask(int sbus_level, int mask) -{ - __asm__ __volatile__ ("stha %0, [%1] %2" : : - "r" (mask), - "r" (BW_LOCAL_BASE + BW_INTR_TABLE_CLEAR + (sbus_level << 3)), - "i" (ASI_M_CTL)); -} - -static inline unsigned bw_get_prof_limit(int cpu) -{ - unsigned limit; - - __asm__ __volatile__ ("lda [%1] %2, %0" : - "=r" (limit) : - "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), - "i" (ASI_M_CTL)); - return limit; -} - -static inline void bw_set_prof_limit(int cpu, unsigned limit) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (limit), - "r" (CSR_BASE(cpu) + BW_PTIMER_LIMIT), - "i" (ASI_M_CTL)); -} - -static inline unsigned bw_get_ctrl(int cpu) -{ - unsigned ctrl; - - __asm__ __volatile__ ("lda [%1] %2, %0" : - "=r" (ctrl) : - "r" (CSR_BASE(cpu) + BW_CTRL), - "i" (ASI_M_CTL)); - return ctrl; -} - -static inline void bw_set_ctrl(int cpu, unsigned ctrl) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (ctrl), - "r" (CSR_BASE(cpu) + BW_CTRL), - "i" (ASI_M_CTL)); -} - -extern unsigned char cpu_leds[32]; - -static inline void show_leds(int cpuid) -{ - cpuid &= 0x1e; - __asm__ __volatile__ ("stba %0, [%1] %2" : : - "r" ((cpu_leds[cpuid] << 4) | cpu_leds[cpuid+1]), - "r" (ECSR_BASE(cpuid) | BB_LEDS), - "i" (ASI_M_CTL)); -} - -static inline unsigned cc_get_ipen(void) -{ - unsigned pending; - - __asm__ __volatile__ ("lduha [%1] %2, %0" : - "=r" (pending) : - "r" (CC_IPEN), - "i" (ASI_M_MXCC)); - return pending; -} - -static inline void cc_set_iclr(unsigned clear) -{ - __asm__ __volatile__ ("stha %0, [%1] %2" : : - "r" (clear), - "r" (CC_ICLR), - "i" (ASI_M_MXCC)); -} - -static inline unsigned cc_get_imsk(void) -{ - unsigned mask; - - __asm__ __volatile__ ("lduha [%1] %2, %0" : - "=r" (mask) : - "r" (CC_IMSK), - "i" (ASI_M_MXCC)); - return mask; -} - -static inline void cc_set_imsk(unsigned mask) -{ - __asm__ __volatile__ ("stha %0, [%1] %2" : : - "r" (mask), - "r" (CC_IMSK), - "i" (ASI_M_MXCC)); -} - -static inline unsigned cc_get_imsk_other(int cpuid) -{ - unsigned mask; - - __asm__ __volatile__ ("lduha [%1] %2, %0" : - "=r" (mask) : - "r" (ECSR_BASE(cpuid) | CC_IMSK), - "i" (ASI_M_CTL)); - return mask; -} - -static inline void cc_set_imsk_other(int cpuid, unsigned mask) -{ - __asm__ __volatile__ ("stha %0, [%1] %2" : : - "r" (mask), - "r" (ECSR_BASE(cpuid) | CC_IMSK), - "i" (ASI_M_CTL)); -} - -static inline void cc_set_igen(unsigned gen) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (gen), - "r" (CC_IGEN), - "i" (ASI_M_MXCC)); -} - -/* +-------+-------------+-----------+------------------------------------+ - * | bcast | devid | sid | levels mask | - * +-------+-------------+-----------+------------------------------------+ - * 31 30 23 22 15 14 0 - */ -#define IGEN_MESSAGE(bcast, devid, sid, levels) \ - (((bcast) << 31) | ((devid) << 23) | ((sid) << 15) | (levels)) - -static inline void sun4d_send_ipi(int cpu, int level) -{ - cc_set_igen(IGEN_MESSAGE(0, cpu << 3, 6 + ((level >> 1) & 7), 1 << (level - 1))); -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* !(_SPARC_OBIO_H) */ diff --git a/include/asm-sparc/of_device.h b/include/asm-sparc/of_device.h deleted file mode 100644 index e5f5aed..0000000 --- a/include/asm-sparc/of_device.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _ASM_SPARC_OF_DEVICE_H -#define _ASM_SPARC_OF_DEVICE_H -#ifdef __KERNEL__ - -#include -#include -#include -#include - -/* - * The of_device is a kind of "base class" that is a superset of - * struct device for use by devices attached to an OF node and - * probed using OF properties. - */ -struct of_device -{ - struct device_node *node; - struct device dev; - struct resource resource[PROMREG_MAX]; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; - - void *sysdata; - - int slot; - int portid; - int clock_freq; -}; - -extern void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name); -extern void of_iounmap(struct resource *res, void __iomem *base, unsigned long size); - -/* These are just here during the transition */ -#include -#include - -#endif /* __KERNEL__ */ -#endif /* _ASM_SPARC_OF_DEVICE_H */ diff --git a/include/asm-sparc/of_platform.h b/include/asm-sparc/of_platform.h deleted file mode 100644 index 851eb84..0000000 --- a/include/asm-sparc/of_platform.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_OF_PLATFORM_H -#define ___ASM_SPARC_OF_PLATFORM_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/of_platform_32.h b/include/asm-sparc/of_platform_32.h deleted file mode 100644 index 3833435..0000000 --- a/include/asm-sparc/of_platform_32.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASM_SPARC_OF_PLATFORM_H -#define _ASM_SPARC_OF_PLATFORM_H -/* - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. - * - * Modified for Sparc by merging parts of asm-sparc/of_device.h - * by Stephen Rothwell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -/* This is just here during the transition */ -#include - -extern struct bus_type ebus_bus_type; -extern struct bus_type sbus_bus_type; - -#define of_bus_type of_platform_bus_type /* for compatibility */ - -#endif /* _ASM_SPARC_OF_PLATFORM_H */ diff --git a/include/asm-sparc/of_platform_64.h b/include/asm-sparc/of_platform_64.h deleted file mode 100644 index 78aa032..0000000 --- a/include/asm-sparc/of_platform_64.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_SPARC64_OF_PLATFORM_H -#define _ASM_SPARC64_OF_PLATFORM_H -/* - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. - * - * Modified for Sparc by merging parts of asm-sparc/of_device.h - * by Stephen Rothwell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -/* This is just here during the transition */ -#include - -extern struct bus_type isa_bus_type; -extern struct bus_type ebus_bus_type; -extern struct bus_type sbus_bus_type; - -#define of_bus_type of_platform_bus_type /* for compatibility */ - -#endif /* _ASM_SPARC64_OF_PLATFORM_H */ diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h deleted file mode 100644 index 8c349f0..0000000 --- a/include/asm-sparc/openprom.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_OPENPROM_H -#define ___ASM_SPARC_OPENPROM_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/openprom_32.h b/include/asm-sparc/openprom_32.h deleted file mode 100644 index 8b1649f..0000000 --- a/include/asm-sparc/openprom_32.h +++ /dev/null @@ -1,255 +0,0 @@ -#ifndef __SPARC_OPENPROM_H -#define __SPARC_OPENPROM_H - -/* openprom.h: Prom structures and defines for access to the OPENBOOT - * prom routines and data areas. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -/* Empirical constants... */ -#define LINUX_OPPROM_MAGIC 0x10010407 - -#ifndef __ASSEMBLY__ -/* V0 prom device operations. */ -struct linux_dev_v0_funcs { - int (*v0_devopen)(char *device_str); - int (*v0_devclose)(int dev_desc); - int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_seekdev)(int dev_desc, long logical_offst, int from); -}; - -/* V2 and later prom device operations. */ -struct linux_dev_v2_funcs { - int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ - char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); - void (*v2_dumb_mem_free)(char *va, unsigned sz); - - /* To map devices into virtual I/O space. */ - char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); - void (*v2_dumb_munmap)(char *virta, unsigned size); - - int (*v2_dev_open)(char *devpath); - void (*v2_dev_close)(int d); - int (*v2_dev_read)(int d, char *buf, int nbytes); - int (*v2_dev_write)(int d, char *buf, int nbytes); - int (*v2_dev_seek)(int d, int hi, int lo); - - /* Never issued (multistage load support) */ - void (*v2_wheee2)(void); - void (*v2_wheee3)(void); -}; - -struct linux_mlist_v0 { - struct linux_mlist_v0 *theres_more; - char *start_adr; - unsigned num_bytes; -}; - -struct linux_mem_v0 { - struct linux_mlist_v0 **v0_totphys; - struct linux_mlist_v0 **v0_prommap; - struct linux_mlist_v0 **v0_available; /* What we can use */ -}; - -/* Arguments sent to the kernel from the boot prompt. */ -struct linux_arguments_v0 { - char *argv[8]; - char args[100]; - char boot_dev[2]; - int boot_dev_ctrl; - int boot_dev_unit; - int dev_partition; - char *kernel_file_name; - void *aieee1; /* XXX */ -}; - -/* V2 and up boot things. */ -struct linux_bootargs_v2 { - char **bootpath; - char **bootargs; - int *fd_stdin; - int *fd_stdout; -}; - -/* The top level PROM vector. */ -struct linux_romvec { - /* Version numbers. */ - unsigned int pv_magic_cookie; - unsigned int pv_romvers; - unsigned int pv_plugin_revision; - unsigned int pv_printrev; - - /* Version 0 memory descriptors. */ - struct linux_mem_v0 pv_v0mem; - - /* Node operations. */ - struct linux_nodeops *pv_nodeops; - - char **pv_bootstr; - struct linux_dev_v0_funcs pv_v0devops; - - char *pv_stdin; - char *pv_stdout; -#define PROMDEV_KBD 0 /* input from keyboard */ -#define PROMDEV_SCREEN 0 /* output to screen */ -#define PROMDEV_TTYA 1 /* in/out to ttya */ -#define PROMDEV_TTYB 2 /* in/out to ttyb */ - - /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ - int (*pv_getchar)(void); - void (*pv_putchar)(int ch); - - /* Non-blocking variants. */ - int (*pv_nbgetchar)(void); - int (*pv_nbputchar)(int ch); - - void (*pv_putstr)(char *str, int len); - - /* Miscellany. */ - void (*pv_reboot)(char *bootstr); - void (*pv_printf)(__const__ char *fmt, ...); - void (*pv_abort)(void); - __volatile__ int *pv_ticks; - void (*pv_halt)(void); - void (**pv_synchook)(void); - - /* Evaluate a forth string, not different proto for V0 and V2->up. */ - union { - void (*v0_eval)(int len, char *str); - void (*v2_eval)(char *str); - } pv_fortheval; - - struct linux_arguments_v0 **pv_v0bootargs; - - /* Get ether address. */ - unsigned int (*pv_enaddr)(int d, char *enaddr); - - struct linux_bootargs_v2 pv_v2bootargs; - struct linux_dev_v2_funcs pv_v2devops; - - int filler[15]; - - /* This one is sun4c/sun4 only. */ - void (*pv_setctxt)(int ctxt, char *va, int pmeg); - - /* Prom version 3 Multiprocessor routines. This stuff is crazy. - * No joke. Calling these when there is only one cpu probably - * crashes the machine, have to test this. :-) - */ - - /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context - * 'thiscontext' executing at address 'prog_counter' - */ - int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, - int thiscontext, char *prog_counter); - - /* v3_cpustop() will cause cpu 'whichcpu' to stop executing - * until a resume cpu call is made. - */ - int (*v3_cpustop)(unsigned int whichcpu); - - /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or - * resume cpu call is made. - */ - int (*v3_cpuidle)(unsigned int whichcpu); - - /* v3_cpuresume() will resume processor 'whichcpu' executing - * starting with whatever 'pc' and 'npc' were left at the - * last 'idle' or 'stop' call. - */ - int (*v3_cpuresume)(unsigned int whichcpu); -}; - -/* Routines for traversing the prom device tree. */ -struct linux_nodeops { - int (*no_nextnode)(int node); - int (*no_child)(int node); - int (*no_proplen)(int node, char *name); - int (*no_getprop)(int node, char *name, char *val); - int (*no_setprop)(int node, char *name, char *val, int len); - char * (*no_nextprop)(int node, char *name); -}; - -/* More fun PROM structures for device probing. */ -#define PROMREG_MAX 16 -#define PROMVADDR_MAX 16 -#define PROMINTR_MAX 15 - -struct linux_prom_registers { - unsigned int which_io; /* is this in OBIO space? */ - unsigned int phys_addr; /* The physical address of this register */ - unsigned int reg_size; /* How many bytes does this register take up? */ -}; - -struct linux_prom_irqs { - int pri; /* IRQ priority */ - int vector; /* This is foobar, what does it do? */ -}; - -/* Element of the "ranges" vector */ -struct linux_prom_ranges { - unsigned int ot_child_space; - unsigned int ot_child_base; /* Bus feels this */ - unsigned int ot_parent_space; - unsigned int ot_parent_base; /* CPU looks from here */ - unsigned int or_size; -}; - -/* Ranges and reg properties are a bit different for PCI. */ -struct linux_prom_pci_registers { - /* - * We don't know what information this field contain. - * We guess, PCI device function is in bits 15:8 - * So, ... - */ - unsigned int which_io; /* Let it be which_io */ - - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_ranges { - unsigned int child_phys_hi; /* Only certain bits are encoded here. */ - unsigned int child_phys_mid; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_assigned_addresses { - unsigned int which_io; - - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_ebus_ranges { - unsigned int child_phys_hi; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_mid; - unsigned int parent_phys_lo; - - unsigned int size; -}; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC_OPENPROM_H) */ diff --git a/include/asm-sparc/openprom_64.h b/include/asm-sparc/openprom_64.h deleted file mode 100644 index b69e4a8..0000000 --- a/include/asm-sparc/openprom_64.h +++ /dev/null @@ -1,280 +0,0 @@ -#ifndef __SPARC64_OPENPROM_H -#define __SPARC64_OPENPROM_H - -/* openprom.h: Prom structures and defines for access to the OPENBOOT - * prom routines and data areas. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASSEMBLY__ -/* V0 prom device operations. */ -struct linux_dev_v0_funcs { - int (*v0_devopen)(char *device_str); - int (*v0_devclose)(int dev_desc); - int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_seekdev)(int dev_desc, long logical_offst, int from); -}; - -/* V2 and later prom device operations. */ -struct linux_dev_v2_funcs { - int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ - char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); - void (*v2_dumb_mem_free)(char *va, unsigned sz); - - /* To map devices into virtual I/O space. */ - char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); - void (*v2_dumb_munmap)(char *virta, unsigned size); - - int (*v2_dev_open)(char *devpath); - void (*v2_dev_close)(int d); - int (*v2_dev_read)(int d, char *buf, int nbytes); - int (*v2_dev_write)(int d, char *buf, int nbytes); - int (*v2_dev_seek)(int d, int hi, int lo); - - /* Never issued (multistage load support) */ - void (*v2_wheee2)(void); - void (*v2_wheee3)(void); -}; - -struct linux_mlist_v0 { - struct linux_mlist_v0 *theres_more; - unsigned start_adr; - unsigned num_bytes; -}; - -struct linux_mem_v0 { - struct linux_mlist_v0 **v0_totphys; - struct linux_mlist_v0 **v0_prommap; - struct linux_mlist_v0 **v0_available; /* What we can use */ -}; - -/* Arguments sent to the kernel from the boot prompt. */ -struct linux_arguments_v0 { - char *argv[8]; - char args[100]; - char boot_dev[2]; - int boot_dev_ctrl; - int boot_dev_unit; - int dev_partition; - char *kernel_file_name; - void *aieee1; /* XXX */ -}; - -/* V2 and up boot things. */ -struct linux_bootargs_v2 { - char **bootpath; - char **bootargs; - int *fd_stdin; - int *fd_stdout; -}; - -/* The top level PROM vector. */ -struct linux_romvec { - /* Version numbers. */ - unsigned int pv_magic_cookie; - unsigned int pv_romvers; - unsigned int pv_plugin_revision; - unsigned int pv_printrev; - - /* Version 0 memory descriptors. */ - struct linux_mem_v0 pv_v0mem; - - /* Node operations. */ - struct linux_nodeops *pv_nodeops; - - char **pv_bootstr; - struct linux_dev_v0_funcs pv_v0devops; - - char *pv_stdin; - char *pv_stdout; -#define PROMDEV_KBD 0 /* input from keyboard */ -#define PROMDEV_SCREEN 0 /* output to screen */ -#define PROMDEV_TTYA 1 /* in/out to ttya */ -#define PROMDEV_TTYB 2 /* in/out to ttyb */ - - /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ - int (*pv_getchar)(void); - void (*pv_putchar)(int ch); - - /* Non-blocking variants. */ - int (*pv_nbgetchar)(void); - int (*pv_nbputchar)(int ch); - - void (*pv_putstr)(char *str, int len); - - /* Miscellany. */ - void (*pv_reboot)(char *bootstr); - void (*pv_printf)(__const__ char *fmt, ...); - void (*pv_abort)(void); - __volatile__ int *pv_ticks; - void (*pv_halt)(void); - void (**pv_synchook)(void); - - /* Evaluate a forth string, not different proto for V0 and V2->up. */ - union { - void (*v0_eval)(int len, char *str); - void (*v2_eval)(char *str); - } pv_fortheval; - - struct linux_arguments_v0 **pv_v0bootargs; - - /* Get ether address. */ - unsigned int (*pv_enaddr)(int d, char *enaddr); - - struct linux_bootargs_v2 pv_v2bootargs; - struct linux_dev_v2_funcs pv_v2devops; - - int filler[15]; - - /* This one is sun4c/sun4 only. */ - void (*pv_setctxt)(int ctxt, char *va, int pmeg); - - /* Prom version 3 Multiprocessor routines. This stuff is crazy. - * No joke. Calling these when there is only one cpu probably - * crashes the machine, have to test this. :-) - */ - - /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context - * 'thiscontext' executing at address 'prog_counter' - */ - int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, - int thiscontext, char *prog_counter); - - /* v3_cpustop() will cause cpu 'whichcpu' to stop executing - * until a resume cpu call is made. - */ - int (*v3_cpustop)(unsigned int whichcpu); - - /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or - * resume cpu call is made. - */ - int (*v3_cpuidle)(unsigned int whichcpu); - - /* v3_cpuresume() will resume processor 'whichcpu' executing - * starting with whatever 'pc' and 'npc' were left at the - * last 'idle' or 'stop' call. - */ - int (*v3_cpuresume)(unsigned int whichcpu); -}; - -/* Routines for traversing the prom device tree. */ -struct linux_nodeops { - int (*no_nextnode)(int node); - int (*no_child)(int node); - int (*no_proplen)(int node, char *name); - int (*no_getprop)(int node, char *name, char *val); - int (*no_setprop)(int node, char *name, char *val, int len); - char * (*no_nextprop)(int node, char *name); -}; - -/* More fun PROM structures for device probing. */ -#define PROMREG_MAX 24 -#define PROMVADDR_MAX 16 -#define PROMINTR_MAX 32 - -struct linux_prom_registers { - unsigned which_io; /* hi part of physical address */ - unsigned phys_addr; /* The physical address of this register */ - int reg_size; /* How many bytes does this register take up? */ -}; - -struct linux_prom64_registers { - unsigned long phys_addr; - unsigned long reg_size; -}; - -struct linux_prom_irqs { - int pri; /* IRQ priority */ - int vector; /* This is foobar, what does it do? */ -}; - -/* Element of the "ranges" vector */ -struct linux_prom_ranges { - unsigned int ot_child_space; - unsigned int ot_child_base; /* Bus feels this */ - unsigned int ot_parent_space; - unsigned int ot_parent_base; /* CPU looks from here */ - unsigned int or_size; -}; - -struct linux_prom64_ranges { - unsigned long ot_child_base; /* Bus feels this */ - unsigned long ot_parent_base; /* CPU looks from here */ - unsigned long or_size; -}; - -/* Ranges and reg properties are a bit different for PCI. */ -struct linux_prom_pci_registers { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_ranges { - unsigned int child_phys_hi; /* Only certain bits are encoded here. */ - unsigned int child_phys_mid; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_intmap { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - - unsigned int interrupt; - - int cnode; - unsigned int cinterrupt; -}; - -struct linux_prom_pci_intmask { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - unsigned int interrupt; -}; - -struct linux_prom_ebus_ranges { - unsigned int child_phys_hi; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_mid; - unsigned int parent_phys_lo; - - unsigned int size; -}; - -struct linux_prom_ebus_intmap { - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int interrupt; - - int cnode; - unsigned int cinterrupt; -}; - -struct linux_prom_ebus_intmask { - unsigned int phys_hi; - unsigned int phys_lo; - unsigned int interrupt; -}; -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_OPENPROM_H) */ diff --git a/include/asm-sparc/openpromio.h b/include/asm-sparc/openpromio.h deleted file mode 100644 index 917fb8e..0000000 --- a/include/asm-sparc/openpromio.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef _SPARC_OPENPROMIO_H -#define _SPARC_OPENPROMIO_H - -#include -#include -#include - -/* - * SunOS and Solaris /dev/openprom definitions. The ioctl values - * were chosen to be exactly equal to the SunOS equivalents. - */ - -struct openpromio -{ - u_int oprom_size; /* Actual size of the oprom_array. */ - char oprom_array[1]; /* Holds property names and values. */ -}; - -#define OPROMMAXPARAM 4096 /* Maximum size of oprom_array. */ - -#define OPROMGETOPT 0x20004F01 -#define OPROMSETOPT 0x20004F02 -#define OPROMNXTOPT 0x20004F03 -#define OPROMSETOPT2 0x20004F04 -#define OPROMNEXT 0x20004F05 -#define OPROMCHILD 0x20004F06 -#define OPROMGETPROP 0x20004F07 -#define OPROMNXTPROP 0x20004F08 -#define OPROMU2P 0x20004F09 -#define OPROMGETCONS 0x20004F0A -#define OPROMGETFBNAME 0x20004F0B -#define OPROMGETBOOTARGS 0x20004F0C -/* Linux extensions */ /* Arguments in oprom_array: */ -#define OPROMSETCUR 0x20004FF0 /* int node - Sets current node */ -#define OPROMPCI2NODE 0x20004FF1 /* int pci_bus, pci_devfn - Sets current node to PCI device's node */ -#define OPROMPATH2NODE 0x20004FF2 /* char path[] - Set current node from fully qualified PROM path */ - -/* - * Return values from OPROMGETCONS: - */ - -#define OPROMCONS_NOT_WSCONS 0 -#define OPROMCONS_STDIN_IS_KBD 0x1 /* stdin device is kbd */ -#define OPROMCONS_STDOUT_IS_FB 0x2 /* stdout is a framebuffer */ -#define OPROMCONS_OPENPROM 0x4 /* supports openboot */ - - -/* - * NetBSD/OpenBSD /dev/openprom definitions. - */ - -struct opiocdesc -{ - int op_nodeid; /* PROM Node ID (value-result) */ - int op_namelen; /* Length of op_name. */ - char __user *op_name; /* Pointer to the property name. */ - int op_buflen; /* Length of op_buf (value-result) */ - char __user *op_buf; /* Pointer to buffer. */ -}; - -#define OPIOCGET _IOWR('O', 1, struct opiocdesc) -#define OPIOCSET _IOW('O', 2, struct opiocdesc) -#define OPIOCNEXTPROP _IOWR('O', 3, struct opiocdesc) -#define OPIOCGETOPTNODE _IOR('O', 4, int) -#define OPIOCGETNEXT _IOWR('O', 5, int) -#define OPIOCGETCHILD _IOWR('O', 6, int) - -#endif /* _SPARC_OPENPROMIO_H */ - diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h deleted file mode 100644 index e88d7c0..0000000 --- a/include/asm-sparc/oplib.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_OPLIB_H -#define ___ASM_SPARC_OPLIB_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/oplib_32.h b/include/asm-sparc/oplib_32.h deleted file mode 100644 index b2631da..0000000 --- a/include/asm-sparc/oplib_32.h +++ /dev/null @@ -1,272 +0,0 @@ -/* - * oplib.h: Describes the interface and available routines in the - * Linux Prom library. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC_OPLIB_H -#define __SPARC_OPLIB_H - -#include -#include -#include - -/* The master romvec pointer... */ -extern struct linux_romvec *romvec; - -/* Enumeration to describe the prom major version we have detected. */ -enum prom_major_version { - PROM_V0, /* Original sun4c V0 prom */ - PROM_V2, /* sun4c and early sun4m V2 prom */ - PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */ - PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */ - PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */ -}; - -extern enum prom_major_version prom_vers; -/* Revision, and firmware revision. */ -extern unsigned int prom_rev, prom_prev; - -/* Root node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_root_node; - -/* Pointer to prom structure containing the device tree traversal - * and usage utility functions. Only prom-lib should use these, - * users use the interface defined by the library only! - */ -extern struct linux_nodeops *prom_nodeops; - -/* The functions... */ - -/* You must call prom_init() before using any of the library services, - * preferably as early as possible. Pass it the romvec pointer. - */ -extern void prom_init(struct linux_romvec *rom_ptr); - -/* Boot argument acquisition, returns the boot command line string. */ -extern char *prom_getbootargs(void); - -/* Device utilities. */ - -/* Map and unmap devices in IO space at virtual addresses. Note that the - * virtual address you pass is a request and the prom may put your mappings - * somewhere else, so check your return value as that is where your new - * mappings really are! - * - * Another note, these are only available on V2 or higher proms! - */ -extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); -extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); - -/* Device operations. */ - -/* Open the device described by the passed string. Note, that the format - * of the string is different on V0 vs. V2->higher proms. The caller must - * know what he/she is doing! Returns the device descriptor, an int. - */ -extern int prom_devopen(char *device_string); - -/* Close a previously opened device described by the passed integer - * descriptor. - */ -extern int prom_devclose(int device_handle); - -/* Do a seek operation on the device described by the passed integer - * descriptor. - */ -extern void prom_seek(int device_handle, unsigned int seek_hival, - unsigned int seek_lowval); - -/* Miscellaneous routines, don't really fit in any category per se. */ - -/* Reboot the machine with the command line passed. */ -extern void prom_reboot(char *boot_command); - -/* Evaluate the forth string passed. */ -extern void prom_feval(char *forth_string); - -/* Enter the prom, with possibility of continuation with the 'go' - * command in newer proms. - */ -extern void prom_cmdline(void); - -/* Enter the prom, with no chance of continuation for the stand-alone - * which calls this. - */ -extern void prom_halt(void) __attribute__ ((noreturn)); - -/* Set the PROM 'sync' callback function to the passed function pointer. - * When the user gives the 'sync' command at the prom prompt while the - * kernel is still active, the prom will call this routine. - * - * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX - */ -typedef void (*sync_func_t)(void); -extern void prom_setsync(sync_func_t func_ptr); - -/* Acquire the IDPROM of the root node in the prom device tree. This - * gets passed a buffer where you would like it stuffed. The return value - * is the format type of this idprom or 0xff on error. - */ -extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); - -/* Get the prom major version. */ -extern int prom_version(void); - -/* Get the prom plugin revision. */ -extern int prom_getrev(void); - -/* Get the prom firmware revision. */ -extern int prom_getprev(void); - -/* Character operations to/from the console.... */ - -/* Non-blocking get character from console. */ -extern int prom_nbgetchar(void); - -/* Non-blocking put character to console. */ -extern int prom_nbputchar(char character); - -/* Blocking get character from console. */ -extern char prom_getchar(void); - -/* Blocking put character to console. */ -extern void prom_putchar(char character); - -/* Prom's internal routines, don't use in kernel/boot code. */ -extern void prom_printf(char *fmt, ...); -extern void prom_write(const char *buf, unsigned int len); - -/* Multiprocessor operations... */ - -/* Start the CPU with the given device tree node, context table, and context - * at the passed program counter. - */ -extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, - int context, char *program_counter); - -/* Stop the CPU with the passed device tree node. */ -extern int prom_stopcpu(int cpunode); - -/* Idle the CPU with the passed device tree node. */ -extern int prom_idlecpu(int cpunode); - -/* Re-Start the CPU with the passed device tree node. */ -extern int prom_restartcpu(int cpunode); - -/* PROM memory allocation facilities... */ - -/* Allocated at possibly the given virtual address a chunk of the - * indicated size. - */ -extern char *prom_alloc(char *virt_hint, unsigned int size); - -/* Free a previously allocated chunk. */ -extern void prom_free(char *virt_addr, unsigned int size); - -/* Sun4/sun4c specific memory-management startup hook. */ - -/* Map the passed segment in the given context at the passed - * virtual address. - */ -extern void prom_putsegment(int context, unsigned long virt_addr, - int physical_segment); - - -/* PROM device tree traversal functions... */ - -#ifdef PROMLIB_INTERNAL - -/* Internal version of prom_getchild. */ -extern int __prom_getchild(int parent_node); - -/* Internal version of prom_getsibling. */ -extern int __prom_getsibling(int node); - -#endif - - -/* Get the child node of the given node, or zero if no child exists. */ -extern int prom_getchild(int parent_node); - -/* Get the next sibling node of the given node, or zero if no further - * siblings exist. - */ -extern int prom_getsibling(int node); - -/* Get the length, at the passed node, of the given property type. - * Returns -1 on error (ie. no such property at this node). - */ -extern int prom_getproplen(int thisnode, char *property); - -/* Fetch the requested property using the given buffer. Returns - * the number of bytes the prom put into your buffer or -1 on error. - */ -extern int __must_check prom_getproperty(int thisnode, char *property, - char *prop_buffer, int propbuf_size); - -/* Acquire an integer property. */ -extern int prom_getint(int node, char *property); - -/* Acquire an integer property, with a default value. */ -extern int prom_getintdefault(int node, char *property, int defval); - -/* Acquire a boolean property, 0=FALSE 1=TRUE. */ -extern int prom_getbool(int node, char *prop); - -/* Acquire a string property, null string on error. */ -extern void prom_getstring(int node, char *prop, char *buf, int bufsize); - -/* Does the passed node have the given "name"? YES=1 NO=0 */ -extern int prom_nodematch(int thisnode, char *name); - -/* Search all siblings starting at the passed node for "name" matching - * the given string. Returns the node on success, zero on failure. - */ -extern int prom_searchsiblings(int node_start, char *name); - -/* Return the first property type, as a string, for the given node. - * Returns a null string on error. - */ -extern char *prom_firstprop(int node, char *buffer); - -/* Returns the next property after the passed property for the given - * node. Returns null string on failure. - */ -extern char *prom_nextprop(int node, char *prev_property, char *buffer); - -/* Returns phandle of the path specified */ -extern int prom_finddevice(char *name); - -/* Returns 1 if the specified node has given property. */ -extern int prom_node_has_property(int node, char *property); - -/* Set the indicated property at the given node with the passed value. - * Returns the number of bytes of your value that the prom took. - */ -extern int prom_setprop(int node, char *prop_name, char *prop_value, - int value_size); - -extern int prom_pathtoinode(char *path); -extern int prom_inst2pkg(int); - -/* Dorking with Bus ranges... */ - -/* Apply promlib probes OBIO ranges to registers. */ -extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs); - -/* Apply ranges of any prom node (and optionally parent node as well) to registers. */ -extern void prom_apply_generic_ranges(int node, int parent, - struct linux_prom_registers *sbusregs, int nregs); - -/* CPU probing helpers. */ -int cpu_find_by_instance(int instance, int *prom_node, int *mid); -int cpu_find_by_mid(int mid, int *prom_node); -int cpu_get_hwmid(int prom_node); - -extern spinlock_t prom_lock; - -#endif /* !(__SPARC_OPLIB_H) */ diff --git a/include/asm-sparc/oplib_64.h b/include/asm-sparc/oplib_64.h deleted file mode 100644 index 6d2c2ca..0000000 --- a/include/asm-sparc/oplib_64.h +++ /dev/null @@ -1,322 +0,0 @@ -/* oplib.h: Describes the interface and available routines in the - * Linux Prom library. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __SPARC64_OPLIB_H -#define __SPARC64_OPLIB_H - -#include - -/* OBP version string. */ -extern char prom_version[]; - -/* Root node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_root_node; - -/* PROM stdin and stdout */ -extern int prom_stdin, prom_stdout; - -/* /chosen node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_chosen_node; - -/* Helper values and strings in arch/sparc64/kernel/head.S */ -extern const char prom_peer_name[]; -extern const char prom_compatible_name[]; -extern const char prom_root_compatible[]; -extern const char prom_cpu_compatible[]; -extern const char prom_finddev_name[]; -extern const char prom_chosen_path[]; -extern const char prom_cpu_path[]; -extern const char prom_getprop_name[]; -extern const char prom_mmu_name[]; -extern const char prom_callmethod_name[]; -extern const char prom_translate_name[]; -extern const char prom_map_name[]; -extern const char prom_unmap_name[]; -extern int prom_mmu_ihandle_cache; -extern unsigned int prom_boot_mapped_pc; -extern unsigned int prom_boot_mapping_mode; -extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low; - -struct linux_mlist_p1275 { - struct linux_mlist_p1275 *theres_more; - unsigned long start_adr; - unsigned long num_bytes; -}; - -struct linux_mem_p1275 { - struct linux_mlist_p1275 **p1275_totphys; - struct linux_mlist_p1275 **p1275_prommap; - struct linux_mlist_p1275 **p1275_available; /* What we can use */ -}; - -/* The functions... */ - -/* You must call prom_init() before using any of the library services, - * preferably as early as possible. Pass it the romvec pointer. - */ -extern void prom_init(void *cif_handler, void *cif_stack); - -/* Boot argument acquisition, returns the boot command line string. */ -extern char *prom_getbootargs(void); - -/* Device utilities. */ - -/* Device operations. */ - -/* Open the device described by the passed string. Note, that the format - * of the string is different on V0 vs. V2->higher proms. The caller must - * know what he/she is doing! Returns the device descriptor, an int. - */ -extern int prom_devopen(const char *device_string); - -/* Close a previously opened device described by the passed integer - * descriptor. - */ -extern int prom_devclose(int device_handle); - -/* Do a seek operation on the device described by the passed integer - * descriptor. - */ -extern void prom_seek(int device_handle, unsigned int seek_hival, - unsigned int seek_lowval); - -/* Miscellaneous routines, don't really fit in any category per se. */ - -/* Reboot the machine with the command line passed. */ -extern void prom_reboot(const char *boot_command); - -/* Evaluate the forth string passed. */ -extern void prom_feval(const char *forth_string); - -/* Enter the prom, with possibility of continuation with the 'go' - * command in newer proms. - */ -extern void prom_cmdline(void); - -/* Enter the prom, with no chance of continuation for the stand-alone - * which calls this. - */ -extern void prom_halt(void) __attribute__ ((noreturn)); - -/* Halt and power-off the machine. */ -extern void prom_halt_power_off(void) __attribute__ ((noreturn)); - -/* Set the PROM 'sync' callback function to the passed function pointer. - * When the user gives the 'sync' command at the prom prompt while the - * kernel is still active, the prom will call this routine. - * - */ -typedef int (*callback_func_t)(long *cmd); -extern void prom_setcallback(callback_func_t func_ptr); - -/* Acquire the IDPROM of the root node in the prom device tree. This - * gets passed a buffer where you would like it stuffed. The return value - * is the format type of this idprom or 0xff on error. - */ -extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); - -/* Character operations to/from the console.... */ - -/* Non-blocking get character from console. */ -extern int prom_nbgetchar(void); - -/* Non-blocking put character to console. */ -extern int prom_nbputchar(char character); - -/* Blocking get character from console. */ -extern char prom_getchar(void); - -/* Blocking put character to console. */ -extern void prom_putchar(char character); - -/* Prom's internal routines, don't use in kernel/boot code. */ -extern void prom_printf(const char *fmt, ...); -extern void prom_write(const char *buf, unsigned int len); - -/* Multiprocessor operations... */ -#ifdef CONFIG_SMP -/* Start the CPU with the given device tree node at the passed program - * counter with the given arg passed in via register %o0. - */ -extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg); - -/* Start the CPU with the given cpu ID at the passed program - * counter with the given arg passed in via register %o0. - */ -extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg); - -/* Stop the CPU with the given cpu ID. */ -extern void prom_stopcpu_cpuid(int cpuid); - -/* Stop the current CPU. */ -extern void prom_stopself(void); - -/* Idle the current CPU. */ -extern void prom_idleself(void); - -/* Resume the CPU with the passed device tree node. */ -extern void prom_resumecpu(int cpunode); -#endif - -/* Power management interfaces. */ - -/* Put the current CPU to sleep. */ -extern void prom_sleepself(void); - -/* Put the entire system to sleep. */ -extern int prom_sleepsystem(void); - -/* Initiate a wakeup event. */ -extern int prom_wakeupsystem(void); - -/* MMU and memory related OBP interfaces. */ - -/* Get unique string identifying SIMM at given physical address. */ -extern int prom_getunumber(int syndrome_code, - unsigned long phys_addr, - char *buf, int buflen); - -/* Retain physical memory to the caller across soft resets. */ -extern unsigned long prom_retain(const char *name, - unsigned long pa_low, unsigned long pa_high, - long size, long align); - -/* Load explicit I/D TLB entries into the calling processor. */ -extern long prom_itlb_load(unsigned long index, - unsigned long tte_data, - unsigned long vaddr); - -extern long prom_dtlb_load(unsigned long index, - unsigned long tte_data, - unsigned long vaddr); - -/* Map/Unmap client program address ranges. First the format of - * the mapping mode argument. - */ -#define PROM_MAP_WRITE 0x0001 /* Writable */ -#define PROM_MAP_READ 0x0002 /* Readable - sw */ -#define PROM_MAP_EXEC 0x0004 /* Executable - sw */ -#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */ -#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */ -#define PROM_MAP_SE 0x0040 /* Side-Effects */ -#define PROM_MAP_GLOB 0x0080 /* Global */ -#define PROM_MAP_IE 0x0100 /* Invert-Endianness */ -#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED) - -extern int prom_map(int mode, unsigned long size, - unsigned long vaddr, unsigned long paddr); -extern void prom_unmap(unsigned long size, unsigned long vaddr); - - -/* PROM device tree traversal functions... */ - -#ifdef PROMLIB_INTERNAL - -/* Internal version of prom_getchild. */ -extern int __prom_getchild(int parent_node); - -/* Internal version of prom_getsibling. */ -extern int __prom_getsibling(int node); - -#endif - -/* Get the child node of the given node, or zero if no child exists. */ -extern int prom_getchild(int parent_node); - -/* Get the next sibling node of the given node, or zero if no further - * siblings exist. - */ -extern int prom_getsibling(int node); - -/* Get the length, at the passed node, of the given property type. - * Returns -1 on error (ie. no such property at this node). - */ -extern int prom_getproplen(int thisnode, const char *property); - -/* Fetch the requested property using the given buffer. Returns - * the number of bytes the prom put into your buffer or -1 on error. - */ -extern int prom_getproperty(int thisnode, const char *property, - char *prop_buffer, int propbuf_size); - -/* Acquire an integer property. */ -extern int prom_getint(int node, const char *property); - -/* Acquire an integer property, with a default value. */ -extern int prom_getintdefault(int node, const char *property, int defval); - -/* Acquire a boolean property, 0=FALSE 1=TRUE. */ -extern int prom_getbool(int node, const char *prop); - -/* Acquire a string property, null string on error. */ -extern void prom_getstring(int node, const char *prop, char *buf, int bufsize); - -/* Does the passed node have the given "name"? YES=1 NO=0 */ -extern int prom_nodematch(int thisnode, const char *name); - -/* Search all siblings starting at the passed node for "name" matching - * the given string. Returns the node on success, zero on failure. - */ -extern int prom_searchsiblings(int node_start, const char *name); - -/* Return the first property type, as a string, for the given node. - * Returns a null string on error. Buffer should be at least 32B long. - */ -extern char *prom_firstprop(int node, char *buffer); - -/* Returns the next property after the passed property for the given - * node. Returns null string on failure. Buffer should be at least 32B long. - */ -extern char *prom_nextprop(int node, const char *prev_property, char *buffer); - -/* Returns 1 if the specified node has given property. */ -extern int prom_node_has_property(int node, const char *property); - -/* Returns phandle of the path specified */ -extern int prom_finddevice(const char *name); - -/* Set the indicated property at the given node with the passed value. - * Returns the number of bytes of your value that the prom took. - */ -extern int prom_setprop(int node, const char *prop_name, char *prop_value, - int value_size); - -extern int prom_pathtoinode(const char *path); -extern int prom_inst2pkg(int); -extern int prom_service_exists(const char *service_name); -extern void prom_sun4v_guest_soft_state(void); - -extern int prom_ihandle2path(int handle, char *buffer, int bufsize); - -/* Client interface level routines. */ -extern long p1275_cmd(const char *, long, ...); - -#if 0 -#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x)) -#else -#define P1275_SIZE(x) x -#endif - -/* We support at most 16 input and 1 output argument */ -#define P1275_ARG_NUMBER 0 -#define P1275_ARG_IN_STRING 1 -#define P1275_ARG_OUT_BUF 2 -#define P1275_ARG_OUT_32B 3 -#define P1275_ARG_IN_FUNCTION 4 -#define P1275_ARG_IN_BUF 5 -#define P1275_ARG_IN_64B 6 - -#define P1275_IN(x) ((x) & 0xf) -#define P1275_OUT(x) (((x) << 4) & 0xf0) -#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o)) -#define P1275_ARG(n,x) ((x) << ((n)*3 + 8)) - -#endif /* !(__SPARC64_OPLIB_H) */ diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h deleted file mode 100644 index f32f49f..0000000 --- a/include/asm-sparc/page.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PAGE_H -#define ___ASM_SPARC_PAGE_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/page_32.h b/include/asm-sparc/page_32.h deleted file mode 100644 index cf5fb70..0000000 --- a/include/asm-sparc/page_32.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * page.h: Various defines and such for MMU operations on the Sparc for - * the Linux kernel. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_PAGE_H -#define _SPARC_PAGE_H - -#ifdef CONFIG_SUN4 -#define PAGE_SHIFT 13 -#else -#define PAGE_SHIFT 12 -#endif -#ifndef __ASSEMBLY__ -/* I have my suspicions... -DaveM */ -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#else -#define PAGE_SIZE (1 << PAGE_SHIFT) -#endif -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#include - -#ifndef __ASSEMBLY__ - -#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) -#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) -#define clear_user_page(addr, vaddr, page) \ - do { clear_page(addr); \ - sparc_flush_page_to_ram(page); \ - } while (0) -#define copy_user_page(to, from, vaddr, page) \ - do { copy_page(to, from); \ - sparc_flush_page_to_ram(page); \ - } while (0) - -/* The following structure is used to hold the physical - * memory configuration of the machine. This is filled in - * prom_meminit() and is later used by mem_init() to set up - * mem_map[]. We statically allocate SPARC_PHYS_BANKS+1 of - * these structs, this is arbitrary. The entry after the - * last valid one has num_bytes==0. - */ -struct sparc_phys_banks { - unsigned long base_addr; - unsigned long num_bytes; -}; - -#define SPARC_PHYS_BANKS 32 - -extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; - -/* Cache alias structure. Entry is valid if context != -1. */ -struct cache_palias { - unsigned long vaddr; - int context; -}; - -/* passing structs on the Sparc slow us down tremendously... */ - -/* #define STRICT_MM_TYPECHECKS */ - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking.. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long iopte; } iopte_t; -typedef struct { unsigned long pmdv[16]; } pmd_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long ctxd; } ctxd_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct { unsigned long iopgprot; } iopgprot_t; - -#define pte_val(x) ((x).pte) -#define iopte_val(x) ((x).iopte) -#define pmd_val(x) ((x).pmdv[0]) -#define pgd_val(x) ((x).pgd) -#define ctxd_val(x) ((x).ctxd) -#define pgprot_val(x) ((x).pgprot) -#define iopgprot_val(x) ((x).iopgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __iopte(x) ((iopte_t) { (x) } ) -/* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */ -#define __pgd(x) ((pgd_t) { (x) } ) -#define __ctxd(x) ((ctxd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) -#define __iopgprot(x) ((iopgprot_t) { (x) } ) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef unsigned long pte_t; -typedef unsigned long iopte_t; -typedef struct { unsigned long pmdv[16]; } pmd_t; -typedef unsigned long pgd_t; -typedef unsigned long ctxd_t; -typedef unsigned long pgprot_t; -typedef unsigned long iopgprot_t; - -#define pte_val(x) (x) -#define iopte_val(x) (x) -#define pmd_val(x) ((x).pmdv[0]) -#define pgd_val(x) (x) -#define ctxd_val(x) (x) -#define pgprot_val(x) (x) -#define iopgprot_val(x) (x) - -#define __pte(x) (x) -#define __iopte(x) (x) -/* #define __pmd(x) (x) */ /* XXX later */ -#define __pgd(x) (x) -#define __ctxd(x) (x) -#define __pgprot(x) (x) -#define __iopgprot(x) (x) - -#endif - -typedef struct page *pgtable_t; - -extern unsigned long sparc_unmapped_base; - -BTFIXUPDEF_SETHI(sparc_unmapped_base) - -#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) - -#else /* !(__ASSEMBLY__) */ - -#define __pgprot(x) (x) - -#endif /* !(__ASSEMBLY__) */ - -#define PAGE_OFFSET 0xf0000000 -#ifndef __ASSEMBLY__ -extern unsigned long phys_base; -extern unsigned long pfn_base; -#endif -#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) -#define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) - -#define virt_to_phys __pa -#define phys_to_virt __va - -#define ARCH_PFN_OFFSET (pfn_base) -#define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) - -#define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) -#define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include -#include - -#endif /* _SPARC_PAGE_H */ diff --git a/include/asm-sparc/page_64.h b/include/asm-sparc/page_64.h deleted file mode 100644 index b579b91..0000000 --- a/include/asm-sparc/page_64.h +++ /dev/null @@ -1,135 +0,0 @@ -#ifndef _SPARC64_PAGE_H -#define _SPARC64_PAGE_H - -#include - -#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) -#define PAGE_SHIFT 13 -#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) -#define PAGE_SHIFT 16 -#else -#error No page size specified in kernel configuration -#endif - -#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -/* Flushing for D-cache alias handling is only needed if - * the page size is smaller than 16K. - */ -#if PAGE_SHIFT < 14 -#define DCACHE_ALIASING_POSSIBLE -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define HPAGE_SHIFT 22 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define HPAGE_SHIFT 19 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define HPAGE_SHIFT 16 -#endif - -#ifdef CONFIG_HUGETLB_PAGE -#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) -#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA -#endif - -#ifndef __ASSEMBLY__ - -extern void _clear_page(void *page); -#define clear_page(X) _clear_page((void *)(X)) -struct page; -extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); -#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) -extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); - -/* Unlike sparc32, sparc64's parameter passing API is more - * sane in that structures which as small enough are passed - * in registers instead of on the stack. Thus, setting - * STRICT_MM_TYPECHECKS does not generate worse code so - * let's enable it to get the type checking. - */ - -#define STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* These are used to make use of C type-checking.. */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long iopte; } iopte_t; -typedef struct { unsigned int pmd; } pmd_t; -typedef struct { unsigned int pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define iopte_val(x) ((x).iopte) -#define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __iopte(x) ((iopte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgd(x) ((pgd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -#else -/* .. while these make it easier on the compiler */ -typedef unsigned long pte_t; -typedef unsigned long iopte_t; -typedef unsigned int pmd_t; -typedef unsigned int pgd_t; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define iopte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) (x) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __iopte(x) (x) -#define __pmd(x) (x) -#define __pgd(x) (x) -#define __pgprot(x) (x) - -#endif /* (STRICT_MM_TYPECHECKS) */ - -typedef struct page *pgtable_t; - -#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ - (_AC(0x0000000070000000,UL)) : \ - (_AC(0xfffff80000000000,UL) + (1UL << 32UL))) - -#include - -#endif /* !(__ASSEMBLY__) */ - -/* We used to stick this into a hard-coded global register (%g4) - * but that does not make sense anymore. - */ -#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL) - -#ifndef __ASSEMBLY__ - -#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) - -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) - -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define virt_to_phys __pa -#define phys_to_virt __va - -#endif /* !(__ASSEMBLY__) */ - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include - -#endif /* _SPARC64_PAGE_H */ diff --git a/include/asm-sparc/param.h b/include/asm-sparc/param.h deleted file mode 100644 index 9836d9a..0000000 --- a/include/asm-sparc/param.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASMSPARC_PARAM_H -#define _ASMSPARC_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ /* Internal kernel timer frequency */ -# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) -#endif - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 8192 /* Thanks for sun4's we carry baggage... */ - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif diff --git a/include/asm-sparc/parport.h b/include/asm-sparc/parport.h deleted file mode 100644 index 7818b25..0000000 --- a/include/asm-sparc/parport.h +++ /dev/null @@ -1,246 +0,0 @@ -/* parport.h: sparc64 specific parport initialization and dma. - * - * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef _ASM_SPARC64_PARPORT_H -#define _ASM_SPARC64_PARPORT_H 1 - -#include -#include -#include -#include - -#define PARPORT_PC_MAX_PORTS PARPORT_MAX - -/* - * While sparc64 doesn't have an ISA DMA API, we provide something that looks - * close enough to make parport_pc happy - */ -#define HAS_DMA - -static DEFINE_SPINLOCK(dma_spin_lock); - -#define claim_dma_lock() \ -({ unsigned long flags; \ - spin_lock_irqsave(&dma_spin_lock, flags); \ - flags; \ -}) - -#define release_dma_lock(__flags) \ - spin_unlock_irqrestore(&dma_spin_lock, __flags); - -static struct sparc_ebus_info { - struct ebus_dma_info info; - unsigned int addr; - unsigned int count; - int lock; - - struct parport *port; -} sparc_ebus_dmas[PARPORT_PC_MAX_PORTS]; - -static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); - -static inline int request_dma(unsigned int dmanr, const char *device_id) -{ - if (dmanr >= PARPORT_PC_MAX_PORTS) - return -EINVAL; - if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0) - return -EBUSY; - return 0; -} - -static inline void free_dma(unsigned int dmanr) -{ - if (dmanr >= PARPORT_PC_MAX_PORTS) { - printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); - return; - } - if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) { - printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr); - return; - } -} - -static inline void enable_dma(unsigned int dmanr) -{ - ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); - - if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, - sparc_ebus_dmas[dmanr].addr, - sparc_ebus_dmas[dmanr].count)) - BUG(); -} - -static inline void disable_dma(unsigned int dmanr) -{ - ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); -} - -static inline void clear_dma_ff(unsigned int dmanr) -{ - /* nothing */ -} - -static inline void set_dma_mode(unsigned int dmanr, char mode) -{ - ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); -} - -static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) -{ - sparc_ebus_dmas[dmanr].addr = addr; -} - -static inline void set_dma_count(unsigned int dmanr, unsigned int count) -{ - sparc_ebus_dmas[dmanr].count = count; -} - -static inline unsigned int get_dma_residue(unsigned int dmanr) -{ - return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); -} - -static int __devinit ecpp_probe(struct of_device *op, const struct of_device_id *match) -{ - unsigned long base = op->resource[0].start; - unsigned long config = op->resource[1].start; - unsigned long d_base = op->resource[2].start; - unsigned long d_len; - struct device_node *parent; - struct parport *p; - int slot, err; - - parent = op->node->parent; - if (!strcmp(parent->name, "dma")) { - p = parport_pc_probe_port(base, base + 0x400, - op->irqs[0], PARPORT_DMA_NOFIFO, - op->dev.parent->parent); - if (!p) - return -ENOMEM; - dev_set_drvdata(&op->dev, p); - return 0; - } - - for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { - if (!test_and_set_bit(slot, dma_slot_map)) - break; - } - err = -ENODEV; - if (slot >= PARPORT_PC_MAX_PORTS) - goto out_err; - - spin_lock_init(&sparc_ebus_dmas[slot].info.lock); - - d_len = (op->resource[2].end - d_base) + 1UL; - sparc_ebus_dmas[slot].info.regs = - of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA"); - - if (!sparc_ebus_dmas[slot].info.regs) - goto out_clear_map; - - sparc_ebus_dmas[slot].info.flags = 0; - sparc_ebus_dmas[slot].info.callback = NULL; - sparc_ebus_dmas[slot].info.client_cookie = NULL; - sparc_ebus_dmas[slot].info.irq = 0xdeadbeef; - strcpy(sparc_ebus_dmas[slot].info.name, "parport"); - if (ebus_dma_register(&sparc_ebus_dmas[slot].info)) - goto out_unmap_regs; - - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1); - - /* Configure IRQ to Push Pull, Level Low */ - /* Enable ECP, set bit 2 of the CTR first */ - outb(0x04, base + 0x02); - ns87303_modify(config, PCR, - PCR_EPP_ENABLE | - PCR_IRQ_ODRAIN, - PCR_ECP_ENABLE | - PCR_ECP_CLK_ENA | - PCR_IRQ_POLAR); - - /* CTR bit 5 controls direction of port */ - ns87303_modify(config, PTR, - 0, PTR_LPT_REG_DIR); - - p = parport_pc_probe_port(base, base + 0x400, - op->irqs[0], - slot, - op->dev.parent); - err = -ENOMEM; - if (!p) - goto out_disable_irq; - - dev_set_drvdata(&op->dev, p); - - return 0; - -out_disable_irq: - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); - ebus_dma_unregister(&sparc_ebus_dmas[slot].info); - -out_unmap_regs: - of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len); - -out_clear_map: - clear_bit(slot, dma_slot_map); - -out_err: - return err; -} - -static int __devexit ecpp_remove(struct of_device *op) -{ - struct parport *p = dev_get_drvdata(&op->dev); - int slot = p->dma; - - parport_pc_unregister_port(p); - - if (slot != PARPORT_DMA_NOFIFO) { - unsigned long d_base = op->resource[2].start; - unsigned long d_len; - - d_len = (op->resource[2].end - d_base) + 1UL; - - ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); - ebus_dma_unregister(&sparc_ebus_dmas[slot].info); - of_iounmap(&op->resource[2], - sparc_ebus_dmas[slot].info.regs, - d_len); - clear_bit(slot, dma_slot_map); - } - - return 0; -} - -static struct of_device_id ecpp_match[] = { - { - .name = "ecpp", - }, - { - .name = "parallel", - .compatible = "ecpp", - }, - { - .name = "parallel", - .compatible = "ns87317-ecpp", - }, - {}, -}; - -static struct of_platform_driver ecpp_driver = { - .name = "ecpp", - .match_table = ecpp_match, - .probe = ecpp_probe, - .remove = __devexit_p(ecpp_remove), -}; - -static int parport_pc_find_nonpci_ports(int autoirq, int autodma) -{ - of_register_driver(&ecpp_driver, &of_bus_type); - - return 0; -} - -#endif /* !(_ASM_SPARC64_PARPORT_H */ diff --git a/include/asm-sparc/pbm.h b/include/asm-sparc/pbm.h deleted file mode 100644 index 458a491..0000000 --- a/include/asm-sparc/pbm.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * - * pbm.h: PCI bus module pseudo driver software state - * Adopted from sparc64 by V. Roganov and G. Raiko - * - * Original header: - * pbm.h: U2P PCI bus module pseudo driver software state. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - * - * To put things into perspective, consider sparc64 with a few PCI controllers. - * Each type would have an own structure, with instances related one to one. - * We have only pcic on sparc, but we want to be compatible with sparc64 pbm.h. - * All three represent different abstractions. - * pci_bus - Linux PCI subsystem view of a PCI bus (including bridged buses) - * pbm - Arch-specific view of a PCI bus (sparc or sparc64) - * pcic - Chip-specific information for PCIC. - */ - -#ifndef __SPARC_PBM_H -#define __SPARC_PBM_H - -#include -#include -#include - -struct linux_pbm_info { - int prom_node; - char prom_name[64]; - /* struct linux_prom_pci_ranges pbm_ranges[PROMREG_MAX]; */ - /* int num_pbm_ranges; */ - - /* Now things for the actual PCI bus probes. */ - unsigned int pci_first_busno; /* Can it be nonzero? */ - struct pci_bus *pci_bus; /* Was inline, MJ allocs now */ -}; - -/* PCI devices which are not bridges have this placed in their pci_dev - * sysdata member. This makes OBP aware PCI device drivers easier to - * code. - */ -struct pcidev_cookie { - struct linux_pbm_info *pbm; - struct device_node *prom_node; -}; - -#endif /* !(__SPARC_PBM_H) */ diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h deleted file mode 100644 index b807d52..0000000 --- a/include/asm-sparc/pci.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PCI_H -#define ___ASM_SPARC_PCI_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/pci_32.h b/include/asm-sparc/pci_32.h deleted file mode 100644 index 0ee949d..0000000 --- a/include/asm-sparc/pci_32.h +++ /dev/null @@ -1,171 +0,0 @@ -#ifndef __SPARC_PCI_H -#define __SPARC_PCI_H - -#ifdef __KERNEL__ - -/* Can be used to override the logic in pci_scan_bus for skipping - * already-configured bus numbers - to be used for buggy BIOSes - * or architectures with incomplete PCI setup by the loader. - */ -#define pcibios_assign_all_busses() 0 -#define pcibios_scan_all_fns(a, b) 0 - -#define PCIBIOS_MIN_IO 0UL -#define PCIBIOS_MIN_MEM 0UL - -#define PCI_IRQ_NONE 0xffffffff - -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* Dynamic DMA mapping stuff. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -#include - -struct pci_dev; - -/* Allocate and map kernel buffer using consistent mode DMA for a device. - * hwdev should be valid struct pci_dev pointer for PCI devices. - */ -extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); - -/* Free and unmap a consistent DMA buffer. - * cpu_addr is what was returned from pci_alloc_consistent, - * size must be the same as what as passed into pci_alloc_consistent, - * and likewise dma_addr must be the same as what *dma_addrp was set to. - * - * References to the memory and mappings assosciated with cpu_addr/dma_addr - * past this call are illegal. - */ -extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); - -/* Map a single buffer of the indicated size for DMA in streaming mode. - * The 32-bit bus address to use is returned. - * - * Once the device is given the dma address, the device owns this memory - * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. - */ -extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); - -/* Unmap a single streaming mode DMA translation. The dma_addr and size - * must match what was provided for in a previous pci_map_single call. All - * other usages are undefined. - * - * After this call, reads by the cpu to the buffer are guaranteed to see - * whatever the device wrote there. - */ -extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); - -/* pci_unmap_{single,page} is not a nop, thus... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -/* - * Same as above, only with pages instead of mapped addresses. - */ -extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, - unsigned long offset, size_t size, int direction); -extern void pci_unmap_page(struct pci_dev *hwdev, - dma_addr_t dma_address, size_t size, int direction); - -/* Map a set of buffers described by scatterlist in streaming - * mode for DMA. This is the scather-gather version of the - * above pci_map_single interface. Here the scatter gather list - * elements are each tagged with the appropriate dma address - * and length. They are obtained via sg_dma_{address,length}(SG). - * - * NOTE: An implementation may be able to use a smaller number of - * DMA address/length pairs than there are SG table elements. - * (for example via virtual mapping capabilities) - * The routine returns the number of addr/length pairs actually - * used, at most nents. - * - * Device ownership issues as mentioned above for pci_map_single are - * the same here. - */ -extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); - -/* Unmap a set of streaming mode DMA translations. - * Again, cpu read rules concerning calls here are the same as for - * pci_unmap_single() above. - */ -extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); - -/* Make physical memory consistent for a single - * streaming mode DMA translation after a transfer. - * - * If you perform a pci_map_single() but wish to interrogate the - * buffer using the cpu, yet do not wish to teardown the PCI dma - * mapping, you must call this function before doing so. At the - * next point you give the PCI dma address back to the card, you - * must first perform a pci_dma_sync_for_device, and then the device - * again owns the buffer. - */ -extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); -extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); - -/* Make physical memory consistent for a set of streaming - * mode DMA translations after a transfer. - * - * The same as pci_dma_sync_single_* but for a scatter-gather list, - * same rules and usage. - */ -extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); -extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); - -/* Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) -{ - return 1; -} - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif - -#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) - -static inline int pci_dma_mapping_error(struct pci_dev *pdev, - dma_addr_t dma_addr) -{ - return (dma_addr == PCI_DMA_ERROR_CODE); -} - -struct device_node; -extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); - -#endif /* __KERNEL__ */ - -/* generic pci stuff */ -#include - -#endif /* __SPARC_PCI_H */ diff --git a/include/asm-sparc/pci_64.h b/include/asm-sparc/pci_64.h deleted file mode 100644 index 4f79a54..0000000 --- a/include/asm-sparc/pci_64.h +++ /dev/null @@ -1,210 +0,0 @@ -#ifndef __SPARC64_PCI_H -#define __SPARC64_PCI_H - -#ifdef __KERNEL__ - -#include - -/* Can be used to override the logic in pci_scan_bus for skipping - * already-configured bus numbers - to be used for buggy BIOSes - * or architectures with incomplete PCI setup by the loader. - */ -#define pcibios_assign_all_busses() 0 -#define pcibios_scan_all_fns(a, b) 0 - -#define PCIBIOS_MIN_IO 0UL -#define PCIBIOS_MIN_MEM 0UL - -#define PCI_IRQ_NONE 0xffffffff - -#define PCI_CACHE_LINE_BYTES 64 - -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* The PCI address space does not equal the physical memory - * address space. The networking and block device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, - dma_addr_t *dma_handle) -{ - return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); -} - -static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); -} - -static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, - size_t size, int direction) -{ - return dma_map_single(&pdev->dev, ptr, size, - (enum dma_data_direction) direction); -} - -static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, - size_t size, int direction) -{ - dma_unmap_single(&pdev->dev, dma_addr, size, - (enum dma_data_direction) direction); -} - -#define pci_map_page(dev, page, off, size, dir) \ - pci_map_single(dev, (page_address(page) + (off)), size, dir) -#define pci_unmap_page(dev,addr,sz,dir) \ - pci_unmap_single(dev,addr,sz,dir) - -/* pci_unmap_{single,page} is not a nop, thus... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, - int nents, int direction) -{ - return dma_map_sg(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, - int nents, int direction) -{ - dma_unmap_sg(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, - struct scatterlist *sg, - int nents, int direction) -{ - dma_sync_sg_for_cpu(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, - struct scatterlist *sg, - int nelems, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -/* Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); - -/* PCI IOMMU mapping bypass support. */ - -/* PCI 64-bit addressing works for all slots on all controller - * types on sparc64. However, it requires that the device - * can drive enough of the 64 bits. - */ -#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) -#define PCI64_ADDR_BASE 0xfffc000000000000UL - -static inline int pci_dma_mapping_error(struct pci_dev *pdev, - dma_addr_t dma_addr) -{ - return dma_mapping_error(&pdev->dev, dma_addr); -} - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - unsigned long cacheline_size; - u8 byte; - - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); - if (byte == 0) - cacheline_size = 1024; - else - cacheline_size = (int) byte * 4; - - *strat = PCI_DMA_BURST_BOUNDARY; - *strategy_parameter = cacheline_size; -} -#endif - -/* Return the index of the PCI controller for device PDEV. */ - -extern int pci_domain_nr(struct pci_bus *bus); -static inline int pci_proc_domain(struct pci_bus *bus) -{ - return 1; -} - -/* Platform support for /proc/bus/pci/X/Y mmap()s. */ - -#define HAVE_PCI_MMAP -#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA -#define get_pci_unmapped_area get_fb_unmapped_area - -extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, - int write_combine); - -extern void -pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, - struct resource *res); - -extern void -pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, - struct pci_bus_region *region); - -extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); - -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) -{ - return PCI_IRQ_NONE; -} - -struct device_node; -extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); - -#define HAVE_ARCH_PCI_RESOURCE_TO_USER -extern void pci_resource_to_user(const struct pci_dev *dev, int bar, - const struct resource *rsrc, - resource_size_t *start, resource_size_t *end); -#endif /* __KERNEL__ */ - -#endif /* __SPARC64_PCI_H */ diff --git a/include/asm-sparc/pcic.h b/include/asm-sparc/pcic.h deleted file mode 100644 index f20ef56..0000000 --- a/include/asm-sparc/pcic.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * pcic.h: JavaEngine 1 specific PCI definitions. - * - * Copyright (C) 1998 V. Roganov and G. Raiko - */ - -#ifndef __SPARC_PCIC_H -#define __SPARC_PCIC_H - -#ifndef __ASSEMBLY__ - -#include -#include -#include -#include -#include - -struct linux_pcic { - void __iomem *pcic_regs; - unsigned long pcic_io; - void __iomem *pcic_config_space_addr; - void __iomem *pcic_config_space_data; - struct resource pcic_res_regs; - struct resource pcic_res_io; - struct resource pcic_res_cfg_addr; - struct resource pcic_res_cfg_data; - struct linux_pbm_info pbm; - struct pcic_ca2irq *pcic_imap; - int pcic_imdim; -}; - -extern int pcic_probe(void); -/* Erm... MJ redefined pcibios_present() so that it does not work early. */ -extern int pcic_present(void); -extern void sun4m_pci_init_IRQ(void); - -#endif - -/* Size of PCI I/O space which we relocate. */ -#define PCI_SPACE_SIZE 0x1000000 /* 16 MB */ - -/* PCIC Register Set. */ -#define PCI_DIAGNOSTIC_0 0x40 /* 32 bits */ -#define PCI_SIZE_0 0x44 /* 32 bits */ -#define PCI_SIZE_1 0x48 /* 32 bits */ -#define PCI_SIZE_2 0x4c /* 32 bits */ -#define PCI_SIZE_3 0x50 /* 32 bits */ -#define PCI_SIZE_4 0x54 /* 32 bits */ -#define PCI_SIZE_5 0x58 /* 32 bits */ -#define PCI_PIO_CONTROL 0x60 /* 8 bits */ -#define PCI_DVMA_CONTROL 0x62 /* 8 bits */ -#define PCI_DVMA_CONTROL_INACTIVITY_REQ (1<<0) -#define PCI_DVMA_CONTROL_IOTLB_ENABLE (1<<0) -#define PCI_DVMA_CONTROL_IOTLB_DISABLE 0 -#define PCI_DVMA_CONTROL_INACTIVITY_ACK (1<<4) -#define PCI_INTERRUPT_CONTROL 0x63 /* 8 bits */ -#define PCI_CPU_INTERRUPT_PENDING 0x64 /* 32 bits */ -#define PCI_DIAGNOSTIC_1 0x68 /* 16 bits */ -#define PCI_SOFTWARE_INT_CLEAR 0x6a /* 16 bits */ -#define PCI_SOFTWARE_INT_SET 0x6e /* 16 bits */ -#define PCI_SYS_INT_PENDING 0x70 /* 32 bits */ -#define PCI_SYS_INT_PENDING_PIO 0x40000000 -#define PCI_SYS_INT_PENDING_DMA 0x20000000 -#define PCI_SYS_INT_PENDING_PCI 0x10000000 -#define PCI_SYS_INT_PENDING_APSR 0x08000000 -#define PCI_SYS_INT_TARGET_MASK 0x74 /* 32 bits */ -#define PCI_SYS_INT_TARGET_MASK_CLEAR 0x78 /* 32 bits */ -#define PCI_SYS_INT_TARGET_MASK_SET 0x7c /* 32 bits */ -#define PCI_SYS_INT_PENDING_CLEAR 0x83 /* 8 bits */ -#define PCI_SYS_INT_PENDING_CLEAR_ALL 0x80 -#define PCI_SYS_INT_PENDING_CLEAR_PIO 0x40 -#define PCI_SYS_INT_PENDING_CLEAR_DMA 0x20 -#define PCI_SYS_INT_PENDING_CLEAR_PCI 0x10 -#define PCI_IOTLB_CONTROL 0x84 /* 8 bits */ -#define PCI_INT_SELECT_LO 0x88 /* 16 bits */ -#define PCI_ARBITRATION_SELECT 0x8a /* 16 bits */ -#define PCI_INT_SELECT_HI 0x8c /* 16 bits */ -#define PCI_HW_INT_OUTPUT 0x8e /* 16 bits */ -#define PCI_IOTLB_RAM_INPUT 0x90 /* 32 bits */ -#define PCI_IOTLB_CAM_INPUT 0x94 /* 32 bits */ -#define PCI_IOTLB_RAM_OUTPUT 0x98 /* 32 bits */ -#define PCI_IOTLB_CAM_OUTPUT 0x9c /* 32 bits */ -#define PCI_SMBAR0 0xa0 /* 8 bits */ -#define PCI_MSIZE0 0xa1 /* 8 bits */ -#define PCI_PMBAR0 0xa2 /* 8 bits */ -#define PCI_SMBAR1 0xa4 /* 8 bits */ -#define PCI_MSIZE1 0xa5 /* 8 bits */ -#define PCI_PMBAR1 0xa6 /* 8 bits */ -#define PCI_SIBAR 0xa8 /* 8 bits */ -#define PCI_SIBAR_ADDRESS_MASK 0xf -#define PCI_ISIZE 0xa9 /* 8 bits */ -#define PCI_ISIZE_16M 0xf -#define PCI_ISIZE_32M 0xe -#define PCI_ISIZE_64M 0xc -#define PCI_ISIZE_128M 0x8 -#define PCI_ISIZE_256M 0x0 -#define PCI_PIBAR 0xaa /* 8 bits */ -#define PCI_CPU_COUNTER_LIMIT_HI 0xac /* 32 bits */ -#define PCI_CPU_COUNTER_LIMIT_LO 0xb0 /* 32 bits */ -#define PCI_CPU_COUNTER_LIMIT 0xb4 /* 32 bits */ -#define PCI_SYS_LIMIT 0xb8 /* 32 bits */ -#define PCI_SYS_COUNTER 0xbc /* 32 bits */ -#define PCI_SYS_COUNTER_OVERFLOW (1<<31) /* Limit reached */ -#define PCI_SYS_LIMIT_PSEUDO 0xc0 /* 32 bits */ -#define PCI_USER_TIMER_CONTROL 0xc4 /* 8 bits */ -#define PCI_USER_TIMER_CONFIG 0xc5 /* 8 bits */ -#define PCI_COUNTER_IRQ 0xc6 /* 8 bits */ -#define PCI_COUNTER_IRQ_SET(sys_irq, cpu_irq) ((((sys_irq) & 0xf) << 4) | \ - ((cpu_irq) & 0xf)) -#define PCI_COUNTER_IRQ_SYS(v) (((v) >> 4) & 0xf) -#define PCI_COUNTER_IRQ_CPU(v) ((v) & 0xf) -#define PCI_PIO_ERROR_COMMAND 0xc7 /* 8 bits */ -#define PCI_PIO_ERROR_ADDRESS 0xc8 /* 32 bits */ -#define PCI_IOTLB_ERROR_ADDRESS 0xcc /* 32 bits */ -#define PCI_SYS_STATUS 0xd0 /* 8 bits */ -#define PCI_SYS_STATUS_RESET_ENABLE (1<<0) -#define PCI_SYS_STATUS_RESET (1<<1) -#define PCI_SYS_STATUS_WATCHDOG_RESET (1<<4) -#define PCI_SYS_STATUS_PCI_RESET (1<<5) -#define PCI_SYS_STATUS_PCI_RESET_ENABLE (1<<6) -#define PCI_SYS_STATUS_PCI_SATTELITE_MODE (1<<7) - -#endif /* !(__SPARC_PCIC_H) */ diff --git a/include/asm-sparc/percpu.h b/include/asm-sparc/percpu.h deleted file mode 100644 index d98ed6c..0000000 --- a/include/asm-sparc/percpu.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PERCPU_H -#define ___ASM_SPARC_PERCPU_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/percpu_32.h b/include/asm-sparc/percpu_32.h deleted file mode 100644 index 06066a7..0000000 --- a/include/asm-sparc/percpu_32.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARCH_SPARC_PERCPU__ -#define __ARCH_SPARC_PERCPU__ - -#include - -#endif /* __ARCH_SPARC_PERCPU__ */ diff --git a/include/asm-sparc/percpu_64.h b/include/asm-sparc/percpu_64.h deleted file mode 100644 index bee6459..0000000 --- a/include/asm-sparc/percpu_64.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ARCH_SPARC64_PERCPU__ -#define __ARCH_SPARC64_PERCPU__ - -#include - -register unsigned long __local_per_cpu_offset asm("g5"); - -#ifdef CONFIG_SMP - -extern void real_setup_per_cpu_areas(void); - -extern unsigned long __per_cpu_base; -extern unsigned long __per_cpu_shift; -#define __per_cpu_offset(__cpu) \ - (__per_cpu_base + ((unsigned long)(__cpu) << __per_cpu_shift)) -#define per_cpu_offset(x) (__per_cpu_offset(x)) - -#define __my_cpu_offset __local_per_cpu_offset - -#else /* ! SMP */ - -#define real_setup_per_cpu_areas() do { } while (0) - -#endif /* SMP */ - -#include - -#endif /* __ARCH_SPARC64_PERCPU__ */ diff --git a/include/asm-sparc/perfctr.h b/include/asm-sparc/perfctr.h deleted file mode 100644 index 8368730..0000000 --- a/include/asm-sparc/perfctr.h +++ /dev/null @@ -1,173 +0,0 @@ -/*---------------------------------------- - PERFORMANCE INSTRUMENTATION - Guillaume Thouvenin 08/10/98 - David S. Miller 10/06/98 - ---------------------------------------*/ -#ifndef PERF_COUNTER_API -#define PERF_COUNTER_API - -/* sys_perfctr() interface. First arg is operation code - * from enumeration below. The meaning of further arguments - * are determined by the operation code. - * - * int sys_perfctr(int opcode, unsigned long arg0, - * unsigned long arg1, unsigned long arg2) - * - * Pointers which are passed by the user are pointers to 64-bit - * integers. - * - * Once enabled, performance counter state is retained until the - * process either exits or performs an exec. That is, performance - * counters remain enabled for fork/clone children. - */ -enum perfctr_opcode { - /* Enable UltraSparc performance counters, ARG0 is pointer - * to 64-bit accumulator for D0 counter in PIC, ARG1 is pointer - * to 64-bit accumulator for D1 counter. ARG2 is a pointer to - * the initial PCR register value to use. - */ - PERFCTR_ON, - - /* Disable UltraSparc performance counters. The PCR is written - * with zero and the user counter accumulator pointers and - * working PCR register value are forgotten. - */ - PERFCTR_OFF, - - /* Add current D0 and D1 PIC values into user pointers given - * in PERFCTR_ON operation. The PIC is cleared before returning. - */ - PERFCTR_READ, - - /* Clear the PIC register. */ - PERFCTR_CLRPIC, - - /* Begin using a new PCR value, the pointer to which is passed - * in ARG0. The PIC is also cleared after the new PCR value is - * written. - */ - PERFCTR_SETPCR, - - /* Store in pointer given in ARG0 the current PCR register value - * being used. - */ - PERFCTR_GETPCR -}; - -/* I don't want the kernel's namespace to be polluted with this - * stuff when this file is included. --DaveM - */ -#ifndef __KERNEL__ - -#define PRIV 0x00000001 -#define SYS 0x00000002 -#define USR 0x00000004 - -/* Pic.S0 Selection Bit Field Encoding, Ultra-I/II */ -#define CYCLE_CNT 0x00000000 -#define INSTR_CNT 0x00000010 -#define DISPATCH0_IC_MISS 0x00000020 -#define DISPATCH0_STOREBUF 0x00000030 -#define IC_REF 0x00000080 -#define DC_RD 0x00000090 -#define DC_WR 0x000000A0 -#define LOAD_USE 0x000000B0 -#define EC_REF 0x000000C0 -#define EC_WRITE_HIT_RDO 0x000000D0 -#define EC_SNOOP_INV 0x000000E0 -#define EC_RD_HIT 0x000000F0 - -/* Pic.S0 Selection Bit Field Encoding, Ultra-III */ -#define US3_CYCLE_CNT 0x00000000 -#define US3_INSTR_CNT 0x00000010 -#define US3_DISPATCH0_IC_MISS 0x00000020 -#define US3_DISPATCH0_BR_TGT 0x00000030 -#define US3_DISPATCH0_2ND_BR 0x00000040 -#define US3_RSTALL_STOREQ 0x00000050 -#define US3_RSTALL_IU_USE 0x00000060 -#define US3_IC_REF 0x00000080 -#define US3_DC_RD 0x00000090 -#define US3_DC_WR 0x000000a0 -#define US3_EC_REF 0x000000c0 -#define US3_EC_WR_HIT_RTO 0x000000d0 -#define US3_EC_SNOOP_INV 0x000000e0 -#define US3_EC_RD_MISS 0x000000f0 -#define US3_PC_PORT0_RD 0x00000100 -#define US3_SI_SNOOP 0x00000110 -#define US3_SI_CIQ_FLOW 0x00000120 -#define US3_SI_OWNED 0x00000130 -#define US3_SW_COUNT_0 0x00000140 -#define US3_IU_BR_MISS_TAKEN 0x00000150 -#define US3_IU_BR_COUNT_TAKEN 0x00000160 -#define US3_DISP_RS_MISPRED 0x00000170 -#define US3_FA_PIPE_COMPL 0x00000180 -#define US3_MC_READS_0 0x00000200 -#define US3_MC_READS_1 0x00000210 -#define US3_MC_READS_2 0x00000220 -#define US3_MC_READS_3 0x00000230 -#define US3_MC_STALLS_0 0x00000240 -#define US3_MC_STALLS_2 0x00000250 - -/* Pic.S1 Selection Bit Field Encoding, Ultra-I/II */ -#define CYCLE_CNT_D1 0x00000000 -#define INSTR_CNT_D1 0x00000800 -#define DISPATCH0_IC_MISPRED 0x00001000 -#define DISPATCH0_FP_USE 0x00001800 -#define IC_HIT 0x00004000 -#define DC_RD_HIT 0x00004800 -#define DC_WR_HIT 0x00005000 -#define LOAD_USE_RAW 0x00005800 -#define EC_HIT 0x00006000 -#define EC_WB 0x00006800 -#define EC_SNOOP_CB 0x00007000 -#define EC_IT_HIT 0x00007800 - -/* Pic.S1 Selection Bit Field Encoding, Ultra-III */ -#define US3_CYCLE_CNT_D1 0x00000000 -#define US3_INSTR_CNT_D1 0x00000800 -#define US3_DISPATCH0_MISPRED 0x00001000 -#define US3_IC_MISS_CANCELLED 0x00001800 -#define US3_RE_ENDIAN_MISS 0x00002000 -#define US3_RE_FPU_BYPASS 0x00002800 -#define US3_RE_DC_MISS 0x00003000 -#define US3_RE_EC_MISS 0x00003800 -#define US3_IC_MISS 0x00004000 -#define US3_DC_RD_MISS 0x00004800 -#define US3_DC_WR_MISS 0x00005000 -#define US3_RSTALL_FP_USE 0x00005800 -#define US3_EC_MISSES 0x00006000 -#define US3_EC_WB 0x00006800 -#define US3_EC_SNOOP_CB 0x00007000 -#define US3_EC_IC_MISS 0x00007800 -#define US3_RE_PC_MISS 0x00008000 -#define US3_ITLB_MISS 0x00008800 -#define US3_DTLB_MISS 0x00009000 -#define US3_WC_MISS 0x00009800 -#define US3_WC_SNOOP_CB 0x0000a000 -#define US3_WC_SCRUBBED 0x0000a800 -#define US3_WC_WB_WO_READ 0x0000b000 -#define US3_PC_SOFT_HIT 0x0000c000 -#define US3_PC_SNOOP_INV 0x0000c800 -#define US3_PC_HARD_HIT 0x0000d000 -#define US3_PC_PORT1_RD 0x0000d800 -#define US3_SW_COUNT_1 0x0000e000 -#define US3_IU_STAT_BR_MIS_UNTAKEN 0x0000e800 -#define US3_IU_STAT_BR_COUNT_UNTAKEN 0x0000f000 -#define US3_PC_MS_MISSES 0x0000f800 -#define US3_MC_WRITES_0 0x00010800 -#define US3_MC_WRITES_1 0x00011000 -#define US3_MC_WRITES_2 0x00011800 -#define US3_MC_WRITES_3 0x00012000 -#define US3_MC_STALLS_1 0x00012800 -#define US3_MC_STALLS_3 0x00013000 -#define US3_RE_RAW_MISS 0x00013800 -#define US3_FM_PIPE_COMPLETION 0x00014000 - -struct vcounter_struct { - unsigned long long vcnt0; - unsigned long long vcnt1; -}; - -#endif /* !(__KERNEL__) */ - -#endif /* !(PERF_COUNTER_API) */ diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h deleted file mode 100644 index 7fa02b5..0000000 --- a/include/asm-sparc/pgalloc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PGALLOC_H -#define ___ASM_SPARC_PGALLOC_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/pgalloc_32.h b/include/asm-sparc/pgalloc_32.h deleted file mode 100644 index 681582d..0000000 --- a/include/asm-sparc/pgalloc_32.h +++ /dev/null @@ -1,68 +0,0 @@ -#ifndef _SPARC_PGALLOC_H -#define _SPARC_PGALLOC_H - -#include -#include - -#include -#include - -struct page; - -extern struct pgtable_cache_struct { - unsigned long *pgd_cache; - unsigned long *pte_cache; - unsigned long pgtable_cache_sz; - unsigned long pgd_cache_sz; -} pgt_quicklists; -#define pgd_quicklist (pgt_quicklists.pgd_cache) -#define pmd_quicklist ((unsigned long *)0) -#define pte_quicklist (pgt_quicklists.pte_cache) -#define pgtable_cache_size (pgt_quicklists.pgtable_cache_sz) -#define pgd_cache_size (pgt_quicklists.pgd_cache_sz) - -extern void check_pgt_cache(void); -BTFIXUPDEF_CALL(void, do_check_pgt_cache, int, int) -#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high) - -BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void) -#define get_pgd_fast() BTFIXUP_CALL(get_pgd_fast)() - -BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *) -#define free_pgd_fast(pgd) BTFIXUP_CALL(free_pgd_fast)(pgd) - -#define pgd_free(mm, pgd) free_pgd_fast(pgd) -#define pgd_alloc(mm) get_pgd_fast() - -BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *) -#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp) -#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) - -BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long) -#define pmd_alloc_one(mm, address) BTFIXUP_CALL(pmd_alloc_one)(mm, address) - -BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *) -#define free_pmd_fast(pmd) BTFIXUP_CALL(free_pmd_fast)(pmd) - -#define pmd_free(mm, pmd) free_pmd_fast(pmd) -#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) - -BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *) -#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE) -#define pmd_pgtable(pmd) pmd_page(pmd) -BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *) -#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE) - -BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long) -#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address) -BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long) -#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr) - -BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *) -#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte) - -BTFIXUPDEF_CALL(void, pte_free, pgtable_t ) -#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte) -#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) - -#endif /* _SPARC_PGALLOC_H */ diff --git a/include/asm-sparc/pgalloc_64.h b/include/asm-sparc/pgalloc_64.h deleted file mode 100644 index 5bdfa2c..0000000 --- a/include/asm-sparc/pgalloc_64.h +++ /dev/null @@ -1,81 +0,0 @@ -#ifndef _SPARC64_PGALLOC_H -#define _SPARC64_PGALLOC_H - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -/* Page table allocation/freeing. */ - -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(0, NULL, pgd); -} - -#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) - -static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) -{ - quicklist_free(0, NULL, pmd); -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, - unsigned long address) -{ - struct page *page; - void *pg; - - pg = quicklist_alloc(0, GFP_KERNEL, NULL); - if (!pg) - return NULL; - page = virt_to_page(pg); - pgtable_page_ctor(page); - return page; -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - quicklist_free(0, NULL, pte); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) -{ - pgtable_page_dtor(ptepage); - quicklist_free_page(0, NULL, ptepage); -} - - -#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) -#define pmd_populate(MM,PMD,PTE_PAGE) \ - pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) -#define pmd_pgtable(pmd) pmd_page(pmd) - -static inline void check_pgt_cache(void) -{ - quicklist_trim(0, NULL, 25, 16); -} - -#endif /* _SPARC64_PGALLOC_H */ diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h deleted file mode 100644 index 63cdef5..0000000 --- a/include/asm-sparc/pgtable.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PGTABLE_H -#define ___ASM_SPARC_PGTABLE_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/pgtable_32.h b/include/asm-sparc/pgtable_32.h deleted file mode 100644 index 781bd46..0000000 --- a/include/asm-sparc/pgtable_32.h +++ /dev/null @@ -1,480 +0,0 @@ -#ifndef _SPARC_PGTABLE_H -#define _SPARC_PGTABLE_H - -/* asm-sparc/pgtable.h: Defines and functions used to work - * with Sparc page tables. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __ASSEMBLY__ -#include - -#include -#include -#include -#ifdef CONFIG_SUN4 -#include -#else -#include -#endif -#include -#include -#include -#include -#include - - -struct vm_area_struct; -struct page; - -extern void load_mmu(void); -extern unsigned long calc_highpages(void); - -BTFIXUPDEF_SIMM13(pgdir_shift) -BTFIXUPDEF_SETHI(pgdir_size) -BTFIXUPDEF_SETHI(pgdir_mask) - -BTFIXUPDEF_SIMM13(ptrs_per_pmd) -BTFIXUPDEF_SIMM13(ptrs_per_pgd) -BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) - -#define pte_ERROR(e) __builtin_trap() -#define pmd_ERROR(e) __builtin_trap() -#define pgd_ERROR(e) __builtin_trap() - -BTFIXUPDEF_INT(page_none) -BTFIXUPDEF_INT(page_copy) -BTFIXUPDEF_INT(page_readonly) -BTFIXUPDEF_INT(page_kernel) - -#define PMD_SHIFT SUN4C_PMD_SHIFT -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) -#define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) -#define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) -#define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) -#define PTRS_PER_PTE 1024 -#define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) -#define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) -#define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) -#define FIRST_USER_ADDRESS 0 -#define PTE_SIZE (PTRS_PER_PTE*4) - -#define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) -extern pgprot_t PAGE_SHARED; -#define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) -#define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) - -extern unsigned long page_kernel; - -#ifdef MODULE -#define PAGE_KERNEL page_kernel -#else -#define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) -#endif - -/* Top-level page directory */ -extern pgd_t swapper_pg_dir[1024]; - -extern void paging_init(void); - -/* Page table for 0-4MB for everybody, on the Sparc this - * holds the same as on the i386. - */ -extern pte_t pg0[1024]; -extern pte_t pg1[1024]; -extern pte_t pg2[1024]; -extern pte_t pg3[1024]; - -extern unsigned long ptr_in_current_pgd; - -/* Here is a trick, since mmap.c need the initializer elements for - * protection_map[] to be constant at compile time, I set the following - * to all zeros. I set it to the real values after I link in the - * appropriate MMU page table routines at boot time. - */ -#define __P000 __pgprot(0) -#define __P001 __pgprot(0) -#define __P010 __pgprot(0) -#define __P011 __pgprot(0) -#define __P100 __pgprot(0) -#define __P101 __pgprot(0) -#define __P110 __pgprot(0) -#define __P111 __pgprot(0) - -#define __S000 __pgprot(0) -#define __S001 __pgprot(0) -#define __S010 __pgprot(0) -#define __S011 __pgprot(0) -#define __S100 __pgprot(0) -#define __S101 __pgprot(0) -#define __S110 __pgprot(0) -#define __S111 __pgprot(0) - -extern int num_contexts; - -/* First physical page can be anywhere, the following is needed so that - * va-->pa and vice versa conversions work properly without performance - * hit for all __pa()/__va() operations. - */ -extern unsigned long phys_base; -extern unsigned long pfn_base; - -/* - * BAD_PAGETABLE is used when we need a bogus page-table, while - * BAD_PAGE is used for a bogus page. - * - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern pte_t * __bad_pagetable(void); -extern pte_t __bad_page(void); -extern unsigned long empty_zero_page; - -#define BAD_PAGETABLE __bad_pagetable() -#define BAD_PAGE __bad_page() -#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) - -/* - */ -BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) -BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) - -#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) -#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) - -BTFIXUPDEF_SETHI(none_mask) -BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) -BTFIXUPDEF_CALL(void, pte_clear, pte_t *) - -static inline int pte_none(pte_t pte) -{ - return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); -} - -#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) -#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) - -BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) -BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) -BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) - -static inline int pmd_none(pmd_t pmd) -{ - return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); -} - -#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) -#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) -#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) - -BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) -BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) -BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) -BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) - -#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) -#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) -#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) -#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -BTFIXUPDEF_HALF(pte_writei) -BTFIXUPDEF_HALF(pte_dirtyi) -BTFIXUPDEF_HALF(pte_youngi) - -static int pte_write(pte_t pte) __attribute_const__; -static inline int pte_write(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_writei); -} - -static int pte_dirty(pte_t pte) __attribute_const__; -static inline int pte_dirty(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); -} - -static int pte_young(pte_t pte) __attribute_const__; -static inline int pte_young(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_youngi); -} - -/* - * The following only work if pte_present() is not true. - */ -BTFIXUPDEF_HALF(pte_filei) - -static int pte_file(pte_t pte) __attribute_const__; -static inline int pte_file(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_filei); -} - -static inline int pte_special(pte_t pte) -{ - return 0; -} - -/* - */ -BTFIXUPDEF_HALF(pte_wrprotecti) -BTFIXUPDEF_HALF(pte_mkcleani) -BTFIXUPDEF_HALF(pte_mkoldi) - -static pte_t pte_wrprotect(pte_t pte) __attribute_const__; -static inline pte_t pte_wrprotect(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); -} - -static pte_t pte_mkclean(pte_t pte) __attribute_const__; -static inline pte_t pte_mkclean(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); -} - -static pte_t pte_mkold(pte_t pte) __attribute_const__; -static inline pte_t pte_mkold(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); -} - -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) - -#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) -#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) -#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) - -#define pte_mkspecial(pte) (pte) - -#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) - -BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) -#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) -#define pte_page(pte) pfn_to_page(pte_pfn(pte)) - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) - -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) -BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) - -#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) -#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) -#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) - -#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) - -BTFIXUPDEF_INT(pte_modify_mask) - -static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | - pgprot_val(newprot)); -} - -#define pgd_index(address) ((address) >> PGDIR_SHIFT) - -/* to find an entry in a page-table-directory */ -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the second-level page table.. */ -BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) -#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) - -/* Find an entry in the third-level page table.. */ -BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) -#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) - -/* - * This shortcut works on sun4m (and sun4d) because the nocache area is static, - * and sun4c is guaranteed to have no highmem anyway. - */ -#define pte_offset_map(d, a) pte_offset_kernel(d,a) -#define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) - -#define pte_unmap(pte) do{}while(0) -#define pte_unmap_nested(pte) do{}while(0) - -/* Certain architectures need to do special things when pte's - * within a page table are directly modified. Thus, the following - * hook is made available. - */ - -BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) - -#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -struct seq_file; -BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) - -#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) - -/* Fault handler stuff... */ -#define FAULT_CODE_PROT 0x1 -#define FAULT_CODE_WRITE 0x2 -#define FAULT_CODE_USER 0x4 - -BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) - -#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) - -BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, - unsigned long, unsigned int) -BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) -#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) -#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) - -extern int invalid_segment; - -/* Encode and de-code a swap entry */ -BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) -BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) -BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) - -#define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) -#define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) -#define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) - -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* file-offset-in-pte helpers */ -BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); -BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); - -#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) -#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) - -/* - * This is made a constant because mm/fremap.c required a constant. - * Note that layout of these bits is different between sun4c.c and srmmu.c. - */ -#define PTE_FILE_MAX_BITS 24 - -/* - */ -struct ctx_list { - struct ctx_list *next; - struct ctx_list *prev; - unsigned int ctx_number; - struct mm_struct *ctx_mm; -}; - -extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ -extern struct ctx_list ctx_free; /* Head of free list */ -extern struct ctx_list ctx_used; /* Head of used contexts list */ - -#define NO_CONTEXT -1 - -static inline void remove_from_ctx_list(struct ctx_list *entry) -{ - entry->next->prev = entry->prev; - entry->prev->next = entry->next; -} - -static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) -{ - entry->next = head; - (entry->prev = head->prev)->next = entry; - head->prev = entry; -} -#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) -#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) - -static inline unsigned long -__get_phys (unsigned long addr) -{ - switch (sparc_cpu_model){ - case sun4: - case sun4c: - return sun4c_get_pte (addr) << PAGE_SHIFT; - case sun4m: - case sun4d: - return ((srmmu_get_pte (addr) & 0xffffff00) << 4); - default: - return 0; - } -} - -static inline int -__get_iospace (unsigned long addr) -{ - switch (sparc_cpu_model){ - case sun4: - case sun4c: - return -1; /* Don't check iospace on sun4c */ - case sun4m: - case sun4d: - return (srmmu_get_pte (addr) >> 28); - default: - return -1; - } -} - -extern unsigned long *sparc_valid_addr_bitmap; - -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -#define kern_addr_valid(addr) \ - (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) - -extern int io_remap_pfn_range(struct vm_area_struct *vma, - unsigned long from, unsigned long pfn, - unsigned long size, pgprot_t prot); - -/* - * For sparc32&64, the pfn in io_remap_pfn_range() carries in - * its high 4 bits. These macros/functions put it there or get it from there. - */ -#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) -#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) -#define GET_PFN(pfn) (pfn & 0x0fffffffUL) - -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ - flush_tlb_page(__vma, __address); \ - } \ - (sparc_cpu_model == sun4c) || __changed; \ -}) - -#include - -#endif /* !(__ASSEMBLY__) */ - -#define VMALLOC_START 0xfe600000 -/* XXX Alter this when I get around to fixing sun4c - Anton */ -#define VMALLOC_END 0xffc00000 - - -/* We provide our own get_unmapped_area to cope with VA holes for userland */ -#define HAVE_ARCH_UNMAPPED_AREA - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -#endif /* !(_SPARC_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtable_64.h b/include/asm-sparc/pgtable_64.h deleted file mode 100644 index bb9ec2c..0000000 --- a/include/asm-sparc/pgtable_64.h +++ /dev/null @@ -1,775 +0,0 @@ -/* - * pgtable.h: SpitFire page table operations. - * - * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef _SPARC64_PGTABLE_H -#define _SPARC64_PGTABLE_H - -/* This file contains the functions and defines necessary to modify and use - * the SpitFire page tables. - */ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). - * The page copy blockops can use 0x6000000 to 0x8000000. - * The TSB is mapped in the 0x8000000 to 0xa000000 range. - * The PROM resides in an area spanning 0xf0000000 to 0x100000000. - * The vmalloc area spans 0x100000000 to 0x200000000. - * Since modules need to be in the lowest 32-bits of the address space, - * we place them right before the OBP area from 0x10000000 to 0xf0000000. - * There is a single static kernel PMD which maps from 0x0 to address - * 0x400000000. - */ -#define TLBTEMP_BASE _AC(0x0000000006000000,UL) -#define TSBMAP_BASE _AC(0x0000000008000000,UL) -#define MODULES_VADDR _AC(0x0000000010000000,UL) -#define MODULES_LEN _AC(0x00000000e0000000,UL) -#define MODULES_END _AC(0x00000000f0000000,UL) -#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) -#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) -#define VMALLOC_START _AC(0x0000000100000000,UL) -#define VMALLOC_END _AC(0x0000000200000000,UL) -#define VMEMMAP_BASE _AC(0x0000000200000000,UL) - -#define vmemmap ((struct page *)VMEMMAP_BASE) - -/* XXX All of this needs to be rethought so we can take advantage - * XXX cheetah's full 64-bit virtual address space, ie. no more hole - * XXX in the middle like on spitfire. -DaveM - */ -/* - * Given a virtual address, the lowest PAGE_SHIFT bits determine offset - * into the page; the next higher PAGE_SHIFT-3 bits determine the pte# - * in the proper pagetable (the -3 is from the 8 byte ptes, and each page - * table is a single page long). The next higher PMD_BITS determine pmd# - * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) - * since the pmd entries are 4 bytes, and each pmd page is a single page - * long). Finally, the higher few bits determine pgde#. - */ - -/* PMD_SHIFT determines the size of the area a second-level page - * table can map - */ -#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) -#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PMD_BITS (PAGE_SHIFT - 2) - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS) -#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) -#define PGDIR_BITS (PAGE_SHIFT - 2) - -#ifndef __ASSEMBLY__ - -#include - -/* Entries per page directory level. */ -#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) -#define PTRS_PER_PMD (1UL << PMD_BITS) -#define PTRS_PER_PGD (1UL << PGDIR_BITS) - -/* Kernel has a separate 44bit address space. */ -#define FIRST_USER_ADDRESS 0 - -#define pte_ERROR(e) __builtin_trap() -#define pmd_ERROR(e) __builtin_trap() -#define pgd_ERROR(e) __builtin_trap() - -#endif /* !(__ASSEMBLY__) */ - -/* PTE bits which are the same in SUN4U and SUN4V format. */ -#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ -#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ - -/* SUN4U pte bits... */ -#define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ -#define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */ -#define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */ -#define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */ -#define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ -#define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ -#define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ -#define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ -#define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ -#define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */ -#define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ -#define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */ -#define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */ -#define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */ -#define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */ -#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */ -#define _PAGE_FILE_4U _AC(0x0000000000000800,UL) /* Pagecache page */ -#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ -#define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */ -#define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */ -#define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */ -#define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */ -#define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ -#define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ -#define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */ -#define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */ -#define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */ - -/* SUN4V pte bits... */ -#define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */ -#define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */ -#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ -#define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ -#define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ -#define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ -#define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ -#define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ -#define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */ -#define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */ -#define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */ -#define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */ -#define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */ -#define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */ -#define _PAGE_FILE_4V _AC(0x0000000000000020,UL) /* Pagecache page */ -#define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */ -#define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */ -#define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */ -#define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */ -#define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */ -#define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */ -#define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */ -#define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */ -#define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */ -#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ -#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ - -#if PAGE_SHIFT == 13 -#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U -#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V -#elif PAGE_SHIFT == 16 -#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U -#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V -#else -#error Wrong PAGE_SHIFT specified -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V -#endif - -/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */ -#define __P000 __pgprot(0) -#define __P001 __pgprot(0) -#define __P010 __pgprot(0) -#define __P011 __pgprot(0) -#define __P100 __pgprot(0) -#define __P101 __pgprot(0) -#define __P110 __pgprot(0) -#define __P111 __pgprot(0) - -#define __S000 __pgprot(0) -#define __S001 __pgprot(0) -#define __S010 __pgprot(0) -#define __S011 __pgprot(0) -#define __S100 __pgprot(0) -#define __S101 __pgprot(0) -#define __S110 __pgprot(0) -#define __S111 __pgprot(0) - -#ifndef __ASSEMBLY__ - -extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long); - -extern unsigned long pte_sz_bits(unsigned long size); - -extern pgprot_t PAGE_KERNEL; -extern pgprot_t PAGE_KERNEL_LOCKED; -extern pgprot_t PAGE_COPY; -extern pgprot_t PAGE_SHARED; - -/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */ -extern unsigned long _PAGE_IE; -extern unsigned long _PAGE_E; -extern unsigned long _PAGE_CACHE; - -extern unsigned long pg_iobits; -extern unsigned long _PAGE_ALL_SZ_BITS; -extern unsigned long _PAGE_SZBITS; - -extern struct page *mem_map_zero; -#define ZERO_PAGE(vaddr) (mem_map_zero) - -/* PFNs are real physical page numbers. However, mem_map only begins to record - * per-page information starting at pfn_base. This is to handle systems where - * the first physical page in the machine is at some huge physical address, - * such as 4GB. This is common on a partitioned E10000, for example. - */ -static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) -{ - unsigned long paddr = pfn << PAGE_SHIFT; - unsigned long sz_bits; - - sz_bits = 0UL; - if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) { - __asm__ __volatile__( - "\n661: sethi %%uhi(%1), %0\n" - " sllx %0, 32, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " nop\n" - " .previous\n" - : "=r" (sz_bits) - : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V)); - } - return __pte(paddr | sz_bits | pgprot_val(prot)); -} -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -/* This one can be done with two shifts. */ -static inline unsigned long pte_pfn(pte_t pte) -{ - unsigned long ret; - - __asm__ __volatile__( - "\n661: sllx %1, %2, %0\n" - " srlx %0, %3, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sllx %1, %4, %0\n" - " srlx %0, %5, %0\n" - " .previous\n" - : "=r" (ret) - : "r" (pte_val(pte)), - "i" (21), "i" (21 + PAGE_SHIFT), - "i" (8), "i" (8 + PAGE_SHIFT)); - - return ret; -} -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -static inline pte_t pte_modify(pte_t pte, pgprot_t prot) -{ - unsigned long mask, tmp; - - /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347) - * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8) - * - * Even if we use negation tricks the result is still a 6 - * instruction sequence, so don't try to play fancy and just - * do the most straightforward implementation. - * - * Note: We encode this into 3 sun4v 2-insn patch sequences. - */ - - __asm__ __volatile__( - "\n661: sethi %%uhi(%2), %1\n" - " sethi %%hi(%2), %0\n" - "\n662: or %1, %%ulo(%2), %1\n" - " or %0, %%lo(%2), %0\n" - "\n663: sllx %1, 32, %1\n" - " or %0, %1, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%3), %1\n" - " sethi %%hi(%3), %0\n" - " .word 662b\n" - " or %1, %%ulo(%3), %1\n" - " or %0, %%lo(%3), %0\n" - " .word 663b\n" - " sllx %1, 32, %1\n" - " or %0, %1, %0\n" - " .previous\n" - : "=r" (mask), "=r" (tmp) - : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | - _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | - _PAGE_SZBITS_4U), - "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | - _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | - _PAGE_SZBITS_4V)); - - return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); -} - -static inline pte_t pgoff_to_pte(unsigned long off) -{ - off <<= PAGE_SHIFT; - - __asm__ __volatile__( - "\n661: or %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " or %0, %3, %0\n" - " .previous\n" - : "=r" (off) - : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - - return __pte(off); -} - -static inline pgprot_t pgprot_noncached(pgprot_t prot) -{ - unsigned long val = pgprot_val(prot); - - __asm__ __volatile__( - "\n661: andn %0, %2, %0\n" - " or %0, %3, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " andn %0, %4, %0\n" - " or %0, %5, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), - "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V)); - - return __pgprot(val); -} -/* Various pieces of code check for platform support by ifdef testing - * on "pgprot_noncached". That's broken and should be fixed, but for - * now... - */ -#define pgprot_noncached pgprot_noncached - -#ifdef CONFIG_HUGETLB_PAGE -static inline pte_t pte_mkhuge(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: sethi %%uhi(%1), %0\n" - " sllx %0, 32, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " nop\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V)); - - return __pte(pte_val(pte) | mask); -} -#endif - -static inline pte_t pte_mkdirty(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: or %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " or %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), - "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkclean(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: andn %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " andn %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), - "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkwrite(pte_t pte) -{ - unsigned long val = pte_val(pte), mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); - - return __pte(val | mask); -} - -static inline pte_t pte_wrprotect(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: andn %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " andn %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), - "i" (_PAGE_WRITE_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkold(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - mask |= _PAGE_R; - - return __pte(pte_val(pte) & ~mask); -} - -static inline pte_t pte_mkyoung(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - mask |= _PAGE_R; - - return __pte(pte_val(pte) | mask); -} - -static inline pte_t pte_mkspecial(pte_t pte) -{ - return pte; -} - -static inline unsigned long pte_young(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_dirty(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_write(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_exec(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: sethi %%hi(%1), %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_file(pte_t pte) -{ - unsigned long val = pte_val(pte); - - __asm__ __volatile__( - "\n661: and %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " and %0, %3, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - - return val; -} - -static inline unsigned long pte_present(pte_t pte) -{ - unsigned long val = pte_val(pte); - - __asm__ __volatile__( - "\n661: and %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " and %0, %3, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); - - return val; -} - -static inline int pte_special(pte_t pte) -{ - return 0; -} - -#define pmd_set(pmdp, ptep) \ - (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL)) -#define pud_set(pudp, pmdp) \ - (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL)) -#define __pmd_page(pmd) \ - ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL))) -#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) -#define pud_page_vaddr(pud) \ - ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL))) -#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) (0) -#define pmd_present(pmd) (pmd_val(pmd) != 0U) -#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U) -#define pud_none(pud) (!pud_val(pud)) -#define pud_bad(pud) (0) -#define pud_present(pud) (pud_val(pud) != 0U) -#define pud_clear(pudp) (pud_val(*(pudp)) = 0U) - -/* Same in both SUN4V and SUN4U. */ -#define pte_none(pte) (!pte_val(pte)) - -/* to find an entry in a page-table-directory. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(pudp, address) \ - ((pmd_t *) pud_page_vaddr(*(pudp)) + \ - (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))) - -/* Find an entry in the third-level page table.. */ -#define pte_index(dir, address) \ - ((pte_t *) __pmd_page(*(dir)) + \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) -#define pte_offset_kernel pte_index -#define pte_offset_map pte_index -#define pte_offset_map_nested pte_index -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -/* Actual page table PTE updates. */ -extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig); - -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) -{ - pte_t orig = *ptep; - - *ptep = pte; - - /* It is more efficient to let flush_tlb_kernel_range() - * handle init_mm tlb flushes. - * - * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U - * and SUN4V pte layout, so this inline test is fine. - */ - if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID)) - tlb_batch_add(mm, addr, ptep, orig); -} - -#define pte_clear(mm,addr,ptep) \ - set_pte_at((mm), (addr), (ptep), __pte(0UL)) - -#ifdef DCACHE_ALIASING_POSSIBLE -#define __HAVE_ARCH_MOVE_PTE -#define move_pte(pte, prot, old_addr, new_addr) \ -({ \ - pte_t newpte = (pte); \ - if (tlb_type != hypervisor && pte_present(pte)) { \ - unsigned long this_pfn = pte_pfn(pte); \ - \ - if (pfn_valid(this_pfn) && \ - (((old_addr) ^ (new_addr)) & (1 << 13))) \ - flush_dcache_page_all(current->mm, \ - pfn_to_page(this_pfn)); \ - } \ - newpte; \ -}) -#endif - -extern pgd_t swapper_pg_dir[2048]; -extern pmd_t swapper_low_pmd_dir[2048]; - -extern void paging_init(void); -extern unsigned long find_ecache_flush_span(unsigned long size); - -/* These do nothing with the way I have things setup. */ -#define mmu_lockarea(vaddr, len) (vaddr) -#define mmu_unlockarea(vaddr, len) do { } while(0) - -struct vm_area_struct; -extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); - -/* Encode and de-code a swap entry */ -#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) -#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) -#define __swp_entry(type, offset) \ - ( (swp_entry_t) \ - { \ - (((long)(type) << PAGE_SHIFT) | \ - ((long)(offset) << (PAGE_SHIFT + 8UL))) \ - } ) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* File offset in PTE support. */ -extern unsigned long pte_file(pte_t); -#define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT) -extern pte_t pgoff_to_pte(unsigned long); -#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) - -extern unsigned long *sparc64_valid_addr_bitmap; - -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -#define kern_addr_valid(addr) \ - (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) - -extern int page_in_phys_avail(unsigned long paddr); - -extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, - unsigned long pfn, - unsigned long size, pgprot_t prot); - -/* - * For sparc32&64, the pfn in io_remap_pfn_range() carries in - * its high 4 bits. These macros/functions put it there or get it from there. - */ -#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) -#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) -#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) - -#include - -/* We provide our own get_unmapped_area to cope with VA holes and - * SHM area cache aliasing for userland. - */ -#define HAVE_ARCH_UNMAPPED_AREA -#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN - -/* We provide a special get_unmapped_area for framebuffer mmaps to try and use - * the largest alignment possible such that larget PTEs can be used. - */ -extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, - unsigned long, unsigned long, - unsigned long); -#define HAVE_ARCH_FB_UNMAPPED_AREA - -extern void pgtable_cache_init(void); -extern void sun4v_register_fault_status(void); -extern void sun4v_ktsb_register(void); -extern void __init cheetah_ecache_flush_init(void); -extern void sun4v_patch_tlb_handlers(void); - -extern unsigned long cmdline_memory_size; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC64_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtsrmmu.h b/include/asm-sparc/pgtsrmmu.h deleted file mode 100644 index 808555f..0000000 --- a/include/asm-sparc/pgtsrmmu.h +++ /dev/null @@ -1,298 +0,0 @@ -/* - * pgtsrmmu.h: SRMMU page table defines and code. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_PGTSRMMU_H -#define _SPARC_PGTSRMMU_H - -#include - -#ifdef __ASSEMBLY__ -#include /* TI_UWINMASK for WINDOW_FLUSH */ -#endif - -/* Number of contexts is implementation-dependent; 64k is the most we support */ -#define SRMMU_MAX_CONTEXTS 65536 - -/* PMD_SHIFT determines the size of the area a second-level page table entry can map */ -#define SRMMU_REAL_PMD_SHIFT 18 -#define SRMMU_REAL_PMD_SIZE (1UL << SRMMU_REAL_PMD_SHIFT) -#define SRMMU_REAL_PMD_MASK (~(SRMMU_REAL_PMD_SIZE-1)) -#define SRMMU_REAL_PMD_ALIGN(__addr) (((__addr)+SRMMU_REAL_PMD_SIZE-1)&SRMMU_REAL_PMD_MASK) - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define SRMMU_PGDIR_SHIFT 24 -#define SRMMU_PGDIR_SIZE (1UL << SRMMU_PGDIR_SHIFT) -#define SRMMU_PGDIR_MASK (~(SRMMU_PGDIR_SIZE-1)) -#define SRMMU_PGDIR_ALIGN(addr) (((addr)+SRMMU_PGDIR_SIZE-1)&SRMMU_PGDIR_MASK) - -#define SRMMU_REAL_PTRS_PER_PTE 64 -#define SRMMU_REAL_PTRS_PER_PMD 64 -#define SRMMU_PTRS_PER_PGD 256 - -#define SRMMU_REAL_PTE_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PTE*4) -#define SRMMU_PMD_TABLE_SIZE (SRMMU_REAL_PTRS_PER_PMD*4) -#define SRMMU_PGD_TABLE_SIZE (SRMMU_PTRS_PER_PGD*4) - -/* - * To support pagetables in highmem, Linux introduces APIs which - * return struct page* and generally manipulate page tables when - * they are not mapped into kernel space. Our hardware page tables - * are smaller than pages. We lump hardware tabes into big, page sized - * software tables. - * - * PMD_SHIFT determines the size of the area a second-level page table entry - * can map, and our pmd_t is 16 times larger than normal. The values which - * were once defined here are now generic for 4c and srmmu, so they're - * found in pgtable.h. - */ -#define SRMMU_PTRS_PER_PMD 4 - -/* Definition of the values in the ET field of PTD's and PTE's */ -#define SRMMU_ET_MASK 0x3 -#define SRMMU_ET_INVALID 0x0 -#define SRMMU_ET_PTD 0x1 -#define SRMMU_ET_PTE 0x2 -#define SRMMU_ET_REPTE 0x3 /* AIEEE, SuperSparc II reverse endian page! */ - -/* Physical page extraction from PTP's and PTE's. */ -#define SRMMU_CTX_PMASK 0xfffffff0 -#define SRMMU_PTD_PMASK 0xfffffff0 -#define SRMMU_PTE_PMASK 0xffffff00 - -/* The pte non-page bits. Some notes: - * 1) cache, dirty, valid, and ref are frobbable - * for both supervisor and user pages. - * 2) exec and write will only give the desired effect - * on user pages - * 3) use priv and priv_readonly for changing the - * characteristics of supervisor ptes - */ -#define SRMMU_CACHE 0x80 -#define SRMMU_DIRTY 0x40 -#define SRMMU_REF 0x20 -#define SRMMU_NOREAD 0x10 -#define SRMMU_EXEC 0x08 -#define SRMMU_WRITE 0x04 -#define SRMMU_VALID 0x02 /* SRMMU_ET_PTE */ -#define SRMMU_PRIV 0x1c -#define SRMMU_PRIV_RDONLY 0x18 - -#define SRMMU_FILE 0x40 /* Implemented in software */ - -#define SRMMU_PTE_FILE_SHIFT 8 /* == 32-PTE_FILE_MAX_BITS */ - -#define SRMMU_CHG_MASK (0xffffff00 | SRMMU_REF | SRMMU_DIRTY) - -/* SRMMU swap entry encoding - * - * We use 5 bits for the type and 19 for the offset. This gives us - * 32 swapfiles of 4GB each. Encoding looks like: - * - * oooooooooooooooooootttttRRRRRRRR - * fedcba9876543210fedcba9876543210 - * - * The bottom 8 bits are reserved for protection and status bits, especially - * FILE and PRESENT. - */ -#define SRMMU_SWP_TYPE_MASK 0x1f -#define SRMMU_SWP_TYPE_SHIFT SRMMU_PTE_FILE_SHIFT -#define SRMMU_SWP_OFF_MASK 0x7ffff -#define SRMMU_SWP_OFF_SHIFT (SRMMU_PTE_FILE_SHIFT + 5) - -/* Some day I will implement true fine grained access bits for - * user pages because the SRMMU gives us the capabilities to - * enforce all the protection levels that vma's can have. - * XXX But for now... - */ -#define SRMMU_PAGE_NONE __pgprot(SRMMU_CACHE | \ - SRMMU_PRIV | SRMMU_REF) -#define SRMMU_PAGE_SHARED __pgprot(SRMMU_VALID | SRMMU_CACHE | \ - SRMMU_EXEC | SRMMU_WRITE | SRMMU_REF) -#define SRMMU_PAGE_COPY __pgprot(SRMMU_VALID | SRMMU_CACHE | \ - SRMMU_EXEC | SRMMU_REF) -#define SRMMU_PAGE_RDONLY __pgprot(SRMMU_VALID | SRMMU_CACHE | \ - SRMMU_EXEC | SRMMU_REF) -#define SRMMU_PAGE_KERNEL __pgprot(SRMMU_VALID | SRMMU_CACHE | SRMMU_PRIV | \ - SRMMU_DIRTY | SRMMU_REF) - -/* SRMMU Register addresses in ASI 0x4. These are valid for all - * current SRMMU implementations that exist. - */ -#define SRMMU_CTRL_REG 0x00000000 -#define SRMMU_CTXTBL_PTR 0x00000100 -#define SRMMU_CTX_REG 0x00000200 -#define SRMMU_FAULT_STATUS 0x00000300 -#define SRMMU_FAULT_ADDR 0x00000400 - -#define WINDOW_FLUSH(tmp1, tmp2) \ - mov 0, tmp1; \ -98: ld [%g6 + TI_UWINMASK], tmp2; \ - orcc %g0, tmp2, %g0; \ - add tmp1, 1, tmp1; \ - bne 98b; \ - save %sp, -64, %sp; \ -99: subcc tmp1, 1, tmp1; \ - bne 99b; \ - restore %g0, %g0, %g0; - -#ifndef __ASSEMBLY__ - -/* This makes sense. Honest it does - Anton */ -/* XXX Yes but it's ugly as sin. FIXME. -KMW */ -extern void *srmmu_nocache_pool; -#define __nocache_pa(VADDR) (((unsigned long)VADDR) - SRMMU_NOCACHE_VADDR + __pa((unsigned long)srmmu_nocache_pool)) -#define __nocache_va(PADDR) (__va((unsigned long)PADDR) - (unsigned long)srmmu_nocache_pool + SRMMU_NOCACHE_VADDR) -#define __nocache_fix(VADDR) __va(__nocache_pa(VADDR)) - -/* Accessing the MMU control register. */ -static inline unsigned int srmmu_get_mmureg(void) -{ - unsigned int retval; - __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : - "=r" (retval) : - "i" (ASI_M_MMUREGS)); - return retval; -} - -static inline void srmmu_set_mmureg(unsigned long regval) -{ - __asm__ __volatile__("sta %0, [%%g0] %1\n\t" : : - "r" (regval), "i" (ASI_M_MMUREGS) : "memory"); - -} - -static inline void srmmu_set_ctable_ptr(unsigned long paddr) -{ - paddr = ((paddr >> 4) & SRMMU_CTX_PMASK); - __asm__ __volatile__("sta %0, [%1] %2\n\t" : : - "r" (paddr), "r" (SRMMU_CTXTBL_PTR), - "i" (ASI_M_MMUREGS) : - "memory"); -} - -static inline unsigned long srmmu_get_ctable_ptr(void) -{ - unsigned int retval; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (SRMMU_CTXTBL_PTR), - "i" (ASI_M_MMUREGS)); - return (retval & SRMMU_CTX_PMASK) << 4; -} - -static inline void srmmu_set_context(int context) -{ - __asm__ __volatile__("sta %0, [%1] %2\n\t" : : - "r" (context), "r" (SRMMU_CTX_REG), - "i" (ASI_M_MMUREGS) : "memory"); -} - -static inline int srmmu_get_context(void) -{ - register int retval; - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (SRMMU_CTX_REG), - "i" (ASI_M_MMUREGS)); - return retval; -} - -static inline unsigned int srmmu_get_fstatus(void) -{ - unsigned int retval; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (SRMMU_FAULT_STATUS), "i" (ASI_M_MMUREGS)); - return retval; -} - -static inline unsigned int srmmu_get_faddr(void) -{ - unsigned int retval; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (SRMMU_FAULT_ADDR), "i" (ASI_M_MMUREGS)); - return retval; -} - -/* This is guaranteed on all SRMMU's. */ -static inline void srmmu_flush_whole_tlb(void) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : - "r" (0x400), /* Flush entire TLB!! */ - "i" (ASI_M_FLUSH_PROBE) : "memory"); - -} - -/* These flush types are not available on all chips... */ -static inline void srmmu_flush_tlb_ctx(void) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : - "r" (0x300), /* Flush TLB ctx.. */ - "i" (ASI_M_FLUSH_PROBE) : "memory"); - -} - -static inline void srmmu_flush_tlb_region(unsigned long addr) -{ - addr &= SRMMU_PGDIR_MASK; - __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : - "r" (addr | 0x200), /* Flush TLB region.. */ - "i" (ASI_M_FLUSH_PROBE) : "memory"); - -} - - -static inline void srmmu_flush_tlb_segment(unsigned long addr) -{ - addr &= SRMMU_REAL_PMD_MASK; - __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : - "r" (addr | 0x100), /* Flush TLB segment.. */ - "i" (ASI_M_FLUSH_PROBE) : "memory"); - -} - -static inline void srmmu_flush_tlb_page(unsigned long page) -{ - page &= PAGE_MASK; - __asm__ __volatile__("sta %%g0, [%0] %1\n\t": : - "r" (page), /* Flush TLB page.. */ - "i" (ASI_M_FLUSH_PROBE) : "memory"); - -} - -static inline unsigned long srmmu_hwprobe(unsigned long vaddr) -{ - unsigned long retval; - - vaddr &= PAGE_MASK; - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (retval) : - "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); - - return retval; -} - -static inline int -srmmu_get_pte (unsigned long addr) -{ - register unsigned long entry; - - __asm__ __volatile__("\n\tlda [%1] %2,%0\n\t" : - "=r" (entry): - "r" ((addr & 0xfffff000) | 0x400), "i" (ASI_M_FLUSH_PROBE)); - return entry; -} - -extern unsigned long (*srmmu_read_physical)(unsigned long paddr); -extern void (*srmmu_write_physical)(unsigned long paddr, unsigned long word); - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC_PGTSRMMU_H) */ diff --git a/include/asm-sparc/pgtsun4.h b/include/asm-sparc/pgtsun4.h deleted file mode 100644 index 5a0d661..0000000 --- a/include/asm-sparc/pgtsun4.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * pgtsun4.h: Sun4 specific pgtable.h defines and code. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ -#ifndef _SPARC_PGTSUN4C_H -#define _SPARC_PGTSUN4C_H - -#include - -/* PMD_SHIFT determines the size of the area a second-level page table can map */ -#define SUN4C_PMD_SHIFT 23 - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define SUN4C_PGDIR_SHIFT 23 -#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) -#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) -#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) - -/* To represent how the sun4c mmu really lays things out. */ -#define SUN4C_REAL_PGDIR_SHIFT 18 -#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) -#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) -#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) - -/* 19 bit PFN on sun4 */ -#define SUN4C_PFN_MASK 0x7ffff - -/* Don't increase these unless the structures in sun4c.c are fixed */ -#define SUN4C_MAX_SEGMAPS 256 -#define SUN4C_MAX_CONTEXTS 16 - -/* - * To be efficient, and not have to worry about allocating such - * a huge pgd, we make the kernel sun4c tables each hold 1024 - * entries and the pgd similarly just like the i386 tables. - */ -#define SUN4C_PTRS_PER_PTE 1024 -#define SUN4C_PTRS_PER_PMD 1 -#define SUN4C_PTRS_PER_PGD 1024 - -/* - * Sparc SUN4C pte fields. - */ -#define _SUN4C_PAGE_VALID 0x80000000 -#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ -#define _SUN4C_PAGE_DIRTY 0x40000000 -#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ -#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ -#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ -#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ -#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ -#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ -#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ -#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ -#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ -#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ - -#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ - _SUN4C_PAGE_ACCESSED) -#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ - _SUN4C_PAGE_MODIFIED) - -#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) - -#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) -#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ - _SUN4C_PAGE_WRITE) -#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) -#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) -#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ - _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) - -/* SUN4C swap entry encoding - * - * We use 5 bits for the type and 19 for the offset. This gives us - * 32 swapfiles of 4GB each. Encoding looks like: - * - * RRRRRRRRooooooooooooooooooottttt - * fedcba9876543210fedcba9876543210 - * - * The top 8 bits are reserved for protection and status bits, especially - * FILE and PRESENT. - */ -#define SUN4C_SWP_TYPE_MASK 0x1f -#define SUN4C_SWP_OFF_MASK 0x7ffff -#define SUN4C_SWP_OFF_SHIFT 5 - -#ifndef __ASSEMBLY__ - -static inline unsigned long sun4c_get_synchronous_error(void) -{ - unsigned long sync_err; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (sync_err) : - "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); - return sync_err; -} - -static inline unsigned long sun4c_get_synchronous_address(void) -{ - unsigned long sync_addr; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (sync_addr) : - "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); - return sync_addr; -} - -/* SUN4 pte, segmap, and context manipulation */ -static inline unsigned long sun4c_get_segmap(unsigned long addr) -{ - register unsigned long entry; - - __asm__ __volatile__("\n\tlduha [%1] %2, %0\n\t" : - "=r" (entry) : - "r" (addr), "i" (ASI_SEGMAP)); - return entry; -} - -static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry) -{ - __asm__ __volatile__("\n\tstha %1, [%0] %2; nop; nop; nop;\n\t" : : - "r" (addr), "r" (entry), - "i" (ASI_SEGMAP) - : "memory"); -} - -static inline unsigned long sun4c_get_pte(unsigned long addr) -{ - register unsigned long entry; - - __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : - "=r" (entry) : - "r" (addr), "i" (ASI_PTE)); - return entry; -} - -static inline void sun4c_put_pte(unsigned long addr, unsigned long entry) -{ - __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : - "r" (addr), - "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE) - : "memory"); -} - -static inline int sun4c_get_context(void) -{ - register int ctx; - - __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : - "=r" (ctx) : - "r" (AC_CONTEXT), "i" (ASI_CONTROL)); - - return ctx; -} - -static inline int sun4c_set_context(int ctx) -{ - __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : - "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL) - : "memory"); - - return ctx; -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC_PGTSUN4_H) */ diff --git a/include/asm-sparc/pgtsun4c.h b/include/asm-sparc/pgtsun4c.h deleted file mode 100644 index aeb25e9..0000000 --- a/include/asm-sparc/pgtsun4c.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * pgtsun4c.h: Sun4c specific pgtable.h defines and code. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_PGTSUN4C_H -#define _SPARC_PGTSUN4C_H - -#include - -/* PMD_SHIFT determines the size of the area a second-level page table can map */ -#define SUN4C_PMD_SHIFT 22 - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define SUN4C_PGDIR_SHIFT 22 -#define SUN4C_PGDIR_SIZE (1UL << SUN4C_PGDIR_SHIFT) -#define SUN4C_PGDIR_MASK (~(SUN4C_PGDIR_SIZE-1)) -#define SUN4C_PGDIR_ALIGN(addr) (((addr)+SUN4C_PGDIR_SIZE-1)&SUN4C_PGDIR_MASK) - -/* To represent how the sun4c mmu really lays things out. */ -#define SUN4C_REAL_PGDIR_SHIFT 18 -#define SUN4C_REAL_PGDIR_SIZE (1UL << SUN4C_REAL_PGDIR_SHIFT) -#define SUN4C_REAL_PGDIR_MASK (~(SUN4C_REAL_PGDIR_SIZE-1)) -#define SUN4C_REAL_PGDIR_ALIGN(addr) (((addr)+SUN4C_REAL_PGDIR_SIZE-1)&SUN4C_REAL_PGDIR_MASK) - -/* 16 bit PFN on sun4c */ -#define SUN4C_PFN_MASK 0xffff - -/* Don't increase these unless the structures in sun4c.c are fixed */ -#define SUN4C_MAX_SEGMAPS 256 -#define SUN4C_MAX_CONTEXTS 16 - -/* - * To be efficient, and not have to worry about allocating such - * a huge pgd, we make the kernel sun4c tables each hold 1024 - * entries and the pgd similarly just like the i386 tables. - */ -#define SUN4C_PTRS_PER_PTE 1024 -#define SUN4C_PTRS_PER_PMD 1 -#define SUN4C_PTRS_PER_PGD 1024 - -/* - * Sparc SUN4C pte fields. - */ -#define _SUN4C_PAGE_VALID 0x80000000 -#define _SUN4C_PAGE_SILENT_READ 0x80000000 /* synonym */ -#define _SUN4C_PAGE_DIRTY 0x40000000 -#define _SUN4C_PAGE_SILENT_WRITE 0x40000000 /* synonym */ -#define _SUN4C_PAGE_PRIV 0x20000000 /* privileged page */ -#define _SUN4C_PAGE_NOCACHE 0x10000000 /* non-cacheable page */ -#define _SUN4C_PAGE_PRESENT 0x08000000 /* implemented in software */ -#define _SUN4C_PAGE_IO 0x04000000 /* I/O page */ -#define _SUN4C_PAGE_FILE 0x02000000 /* implemented in software */ -#define _SUN4C_PAGE_READ 0x00800000 /* implemented in software */ -#define _SUN4C_PAGE_WRITE 0x00400000 /* implemented in software */ -#define _SUN4C_PAGE_ACCESSED 0x00200000 /* implemented in software */ -#define _SUN4C_PAGE_MODIFIED 0x00100000 /* implemented in software */ - -#define _SUN4C_READABLE (_SUN4C_PAGE_READ|_SUN4C_PAGE_SILENT_READ|\ - _SUN4C_PAGE_ACCESSED) -#define _SUN4C_WRITEABLE (_SUN4C_PAGE_WRITE|_SUN4C_PAGE_SILENT_WRITE|\ - _SUN4C_PAGE_MODIFIED) - -#define _SUN4C_PAGE_CHG_MASK (0xffff|_SUN4C_PAGE_ACCESSED|_SUN4C_PAGE_MODIFIED) - -#define SUN4C_PAGE_NONE __pgprot(_SUN4C_PAGE_PRESENT) -#define SUN4C_PAGE_SHARED __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE|\ - _SUN4C_PAGE_WRITE) -#define SUN4C_PAGE_COPY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) -#define SUN4C_PAGE_READONLY __pgprot(_SUN4C_PAGE_PRESENT|_SUN4C_READABLE) -#define SUN4C_PAGE_KERNEL __pgprot(_SUN4C_READABLE|_SUN4C_WRITEABLE|\ - _SUN4C_PAGE_DIRTY|_SUN4C_PAGE_PRIV) - -/* SUN4C swap entry encoding - * - * We use 5 bits for the type and 19 for the offset. This gives us - * 32 swapfiles of 4GB each. Encoding looks like: - * - * RRRRRRRRooooooooooooooooooottttt - * fedcba9876543210fedcba9876543210 - * - * The top 8 bits are reserved for protection and status bits, especially - * FILE and PRESENT. - */ -#define SUN4C_SWP_TYPE_MASK 0x1f -#define SUN4C_SWP_OFF_MASK 0x7ffff -#define SUN4C_SWP_OFF_SHIFT 5 - -#ifndef __ASSEMBLY__ - -static inline unsigned long sun4c_get_synchronous_error(void) -{ - unsigned long sync_err; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (sync_err) : - "r" (AC_SYNC_ERR), "i" (ASI_CONTROL)); - return sync_err; -} - -static inline unsigned long sun4c_get_synchronous_address(void) -{ - unsigned long sync_addr; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" : - "=r" (sync_addr) : - "r" (AC_SYNC_VA), "i" (ASI_CONTROL)); - return sync_addr; -} - -/* SUN4C pte, segmap, and context manipulation */ -static inline unsigned long sun4c_get_segmap(unsigned long addr) -{ - register unsigned long entry; - - __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : - "=r" (entry) : - "r" (addr), "i" (ASI_SEGMAP)); - - return entry; -} - -static inline void sun4c_put_segmap(unsigned long addr, unsigned long entry) -{ - - __asm__ __volatile__("\n\tstba %1, [%0] %2; nop; nop; nop;\n\t" : : - "r" (addr), "r" (entry), - "i" (ASI_SEGMAP) - : "memory"); -} - -static inline unsigned long sun4c_get_pte(unsigned long addr) -{ - register unsigned long entry; - - __asm__ __volatile__("\n\tlda [%1] %2, %0\n\t" : - "=r" (entry) : - "r" (addr), "i" (ASI_PTE)); - return entry; -} - -static inline void sun4c_put_pte(unsigned long addr, unsigned long entry) -{ - __asm__ __volatile__("\n\tsta %1, [%0] %2; nop; nop; nop;\n\t" : : - "r" (addr), - "r" ((entry & ~(_SUN4C_PAGE_PRESENT))), "i" (ASI_PTE) - : "memory"); -} - -static inline int sun4c_get_context(void) -{ - register int ctx; - - __asm__ __volatile__("\n\tlduba [%1] %2, %0\n\t" : - "=r" (ctx) : - "r" (AC_CONTEXT), "i" (ASI_CONTROL)); - - return ctx; -} - -static inline int sun4c_set_context(int ctx) -{ - __asm__ __volatile__("\n\tstba %0, [%1] %2; nop; nop; nop;\n\t" : : - "r" (ctx), "r" (AC_CONTEXT), "i" (ASI_CONTROL) - : "memory"); - - return ctx; -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC_PGTSUN4C_H) */ diff --git a/include/asm-sparc/pil.h b/include/asm-sparc/pil.h deleted file mode 100644 index 71819bb..0000000 --- a/include/asm-sparc/pil.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _SPARC64_PIL_H -#define _SPARC64_PIL_H - -/* To avoid some locking problems, we hard allocate certain PILs - * for SMP cross call messages that must do a etrap/rtrap. - * - * A local_irq_disable() does not block the cross call delivery, so - * when SMP locking is an issue we reschedule the event into a PIL - * interrupt which is blocked by local_irq_disable(). - * - * In fact any XCALL which has to etrap/rtrap has a problem because - * it is difficult to prevent rtrap from running BH's, and that would - * need to be done if the XCALL arrived while %pil==15. - */ -#define PIL_SMP_CALL_FUNC 1 -#define PIL_SMP_RECEIVE_SIGNAL 2 -#define PIL_SMP_CAPTURE 3 -#define PIL_SMP_CTX_NEW_VERSION 4 -#define PIL_DEVICE_IRQ 5 -#define PIL_SMP_CALL_FUNC_SNGL 6 - -#endif /* !(_SPARC64_PIL_H) */ diff --git a/include/asm-sparc/poll.h b/include/asm-sparc/poll.h deleted file mode 100644 index 091d3ad..0000000 --- a/include/asm-sparc/poll.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __SPARC_POLL_H -#define __SPARC_POLL_H - -#define POLLWRNORM POLLOUT -#define POLLWRBAND 256 -#define POLLMSG 512 -#define POLLREMOVE 1024 -#define POLLRDHUP 2048 - -#include - -#endif diff --git a/include/asm-sparc/posix_types.h b/include/asm-sparc/posix_types.h deleted file mode 100644 index 58c820d..0000000 --- a/include/asm-sparc/posix_types.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_POSIX_TYPES_H -#define ___ASM_SPARC_POSIX_TYPES_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/posix_types_32.h b/include/asm-sparc/posix_types_32.h deleted file mode 100644 index 6bb6eb1..0000000 --- a/include/asm-sparc/posix_types_32.h +++ /dev/null @@ -1,118 +0,0 @@ -#ifndef __ARCH_SPARC_POSIX_TYPES_H -#define __ARCH_SPARC_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef long int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_umode_t; -typedef short __kernel_nlink_t; -typedef long __kernel_daddr_t; -typedef long __kernel_off_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; -typedef int __kernel_clockid_t; -typedef int __kernel_timer_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant cases (8 or 32 longs, - * for 256 and 1024-bit fd_sets respectively) - */ -#undef __FD_ZERO -static inline void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 32: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; - tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; - tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; - tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; - return; - case 16: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - return; - case 8: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - return; - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ diff --git a/include/asm-sparc/posix_types_64.h b/include/asm-sparc/posix_types_64.h deleted file mode 100644 index ba8f932..0000000 --- a/include/asm-sparc/posix_types_64.h +++ /dev/null @@ -1,122 +0,0 @@ -#ifndef __ARCH_SPARC64_POSIX_TYPES_H -#define __ARCH_SPARC64_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; -typedef long __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_clock_t; -typedef int __kernel_pid_t; -typedef int __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef unsigned short __kernel_umode_t; -typedef unsigned int __kernel_nlink_t; -typedef int __kernel_daddr_t; -typedef long __kernel_off_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef int __kernel_clockid_t; -typedef int __kernel_timer_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef __kernel_uid_t __kernel_uid32_t; -typedef __kernel_gid_t __kernel_gid32_t; - -typedef unsigned int __kernel_old_dev_t; - -/* Note this piece of asymmetry from the v9 ABI. */ -typedef int __kernel_suseconds_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant cases (8 or 32 longs, - * for 256 and 1024-bit fd_sets respectively) - */ -#undef __FD_ZERO -static inline void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 32: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; - tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; - tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; - tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; - return; - case 16: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - return; - case 8: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - return; - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */ diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h deleted file mode 100644 index 11a66bb..0000000 --- a/include/asm-sparc/processor.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PROCESSOR_H -#define ___ASM_SPARC_PROCESSOR_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/processor_32.h b/include/asm-sparc/processor_32.h deleted file mode 100644 index 562c0d6..0000000 --- a/include/asm-sparc/processor_32.h +++ /dev/null @@ -1,128 +0,0 @@ -/* include/asm-sparc/processor.h - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASM_SPARC_PROCESSOR_H -#define __ASM_SPARC_PROCESSOR_H - -/* - * Sparc32 implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) - -#include -#include -#include -#include -#include -#include - -/* - * The sparc has no problems with write protection - */ -#define wp_works_ok 1 -#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ - -/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... - * That one page is used to protect kernel from intruders, so that - * we can make our access_ok test faster - */ -#define TASK_SIZE PAGE_OFFSET -#ifdef __KERNEL__ -#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) -#define STACK_TOP_MAX STACK_TOP -#endif /* __KERNEL__ */ - -struct task_struct; - -#ifdef __KERNEL__ -struct fpq { - unsigned long *insn_addr; - unsigned long insn; -}; -#endif - -typedef struct { - int seg; -} mm_segment_t; - -/* The Sparc processor specific thread struct. */ -struct thread_struct { - struct pt_regs *kregs; - unsigned int _pad1; - - /* Special child fork kpsr/kwim values. */ - unsigned long fork_kpsr __attribute__ ((aligned (8))); - unsigned long fork_kwim; - - /* Floating point regs */ - unsigned long float_regs[32] __attribute__ ((aligned (8))); - unsigned long fsr; - unsigned long fpqdepth; - struct fpq fpqueue[16]; - unsigned long flags; - mm_segment_t current_ds; -}; - -#define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ -#define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ - -#define INIT_THREAD { \ - .flags = SPARC_FLAG_KTHREAD, \ - .current_ds = KERNEL_DS, \ -} - -/* Return saved PC of a blocked thread. */ -extern unsigned long thread_saved_pc(struct task_struct *t); - -/* Do necessary setup to start up a newly executed thread. */ -static inline void start_thread(struct pt_regs * regs, unsigned long pc, - unsigned long sp) -{ - register unsigned long zero asm("g1"); - - regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; - regs->pc = ((pc & (~3)) - 4); - regs->npc = regs->pc + 4; - regs->y = 0; - zero = 0; - __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" - "std\t%%g0, [%0 + %3 + 0x08]\n\t" - "std\t%%g0, [%0 + %3 + 0x10]\n\t" - "std\t%%g0, [%0 + %3 + 0x18]\n\t" - "std\t%%g0, [%0 + %3 + 0x20]\n\t" - "std\t%%g0, [%0 + %3 + 0x28]\n\t" - "std\t%%g0, [%0 + %3 + 0x30]\n\t" - "st\t%1, [%0 + %3 + 0x38]\n\t" - "st\t%%g0, [%0 + %3 + 0x3c]" - : /* no outputs */ - : "r" (regs), - "r" (sp - sizeof(struct reg_window)), - "r" (zero), - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) - : "memory"); -} - -/* Free all resources held by a thread. */ -#define release_thread(tsk) do { } while(0) -extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -extern unsigned long get_wchan(struct task_struct *); - -#define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) -#define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) - -#ifdef __KERNEL__ - -extern struct task_struct *last_task_used_math; - -#define cpu_relax() barrier() - -#endif - -#endif /* __ASM_SPARC_PROCESSOR_H */ diff --git a/include/asm-sparc/processor_64.h b/include/asm-sparc/processor_64.h deleted file mode 100644 index 70d4280..0000000 --- a/include/asm-sparc/processor_64.h +++ /dev/null @@ -1,237 +0,0 @@ -/* - * include/asm-sparc64/processor.h - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASM_SPARC64_PROCESSOR_H -#define __ASM_SPARC64_PROCESSOR_H - -/* - * Sparc64 implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) - -#include -#include -#include -#include - -/* The sparc has no problems with write protection */ -#define wp_works_ok 1 -#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ - -/* - * User lives in his very own context, and cannot reference us. Note - * that TASK_SIZE is a misnomer, it really gives maximum user virtual - * address that the kernel will allocate out. - * - * XXX No longer using virtual page tables, kill this upper limit... - */ -#define VA_BITS 44 -#ifndef __ASSEMBLY__ -#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) -#else -#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) -#endif - -#define TASK_SIZE ((unsigned long)-VPTE_SIZE) -#define TASK_SIZE_OF(tsk) \ - (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ - (1UL << 32UL) : TASK_SIZE) -#ifdef __KERNEL__ - -#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) -#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) - -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ - STACK_TOP32 : STACK_TOP64) - -#define STACK_TOP_MAX STACK_TOP64 - -#endif - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned char seg; -} mm_segment_t; - -/* The Sparc processor specific thread struct. */ -/* XXX This should die, everything can go into thread_info now. */ -struct thread_struct { -#ifdef CONFIG_DEBUG_SPINLOCK - /* How many spinlocks held by this thread. - * Used with spin lock debugging to catch tasks - * sleeping illegally with locks held. - */ - int smp_lock_count; - unsigned int smp_lock_pc; -#else - int dummy; /* f'in gcc bug... */ -#endif -}; - -#endif /* !(__ASSEMBLY__) */ - -#ifndef CONFIG_DEBUG_SPINLOCK -#define INIT_THREAD { \ - 0, \ -} -#else /* CONFIG_DEBUG_SPINLOCK */ -#define INIT_THREAD { \ -/* smp_lock_count, smp_lock_pc, */ \ - 0, 0, \ -} -#endif /* !(CONFIG_DEBUG_SPINLOCK) */ - -#ifndef __ASSEMBLY__ - -#include - -/* Return saved PC of a blocked thread. */ -struct task_struct; -extern unsigned long thread_saved_pc(struct task_struct *); - -/* On Uniprocessor, even in RMO processes see TSO semantics */ -#ifdef CONFIG_SMP -#define TSTATE_INITIAL_MM TSTATE_TSO -#else -#define TSTATE_INITIAL_MM TSTATE_RMO -#endif - -/* Do necessary setup to start up a newly executed thread. */ -#define start_thread(regs, pc, sp) \ -do { \ - unsigned long __asi = ASI_PNF; \ - regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ - regs->tpc = ((pc & (~3)) - 4); \ - regs->tnpc = regs->tpc + 4; \ - regs->y = 0; \ - set_thread_wstate(1 << 3); \ - if (current_thread_info()->utraps) { \ - if (*(current_thread_info()->utraps) < 2) \ - kfree(current_thread_info()->utraps); \ - else \ - (*(current_thread_info()->utraps))--; \ - current_thread_info()->utraps = NULL; \ - } \ - __asm__ __volatile__( \ - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ - "stx %1, [%0 + %2 + 0x70]\n\t" \ - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ - "wrpr %%g0, (1 << 3), %%wstate\n\t" \ - : \ - : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ -} while (0) - -#define start_thread32(regs, pc, sp) \ -do { \ - unsigned long __asi = ASI_PNF; \ - pc &= 0x00000000ffffffffUL; \ - sp &= 0x00000000ffffffffUL; \ - regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ - regs->tpc = ((pc & (~3)) - 4); \ - regs->tnpc = regs->tpc + 4; \ - regs->y = 0; \ - set_thread_wstate(2 << 3); \ - if (current_thread_info()->utraps) { \ - if (*(current_thread_info()->utraps) < 2) \ - kfree(current_thread_info()->utraps); \ - else \ - (*(current_thread_info()->utraps))--; \ - current_thread_info()->utraps = NULL; \ - } \ - __asm__ __volatile__( \ - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ - "stx %1, [%0 + %2 + 0x70]\n\t" \ - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ - "wrpr %%g0, (2 << 3), %%wstate\n\t" \ - : \ - : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ -} while (0) - -/* Free all resources held by a thread. */ -#define release_thread(tsk) do { } while (0) - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -extern unsigned long get_wchan(struct task_struct *task); - -#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) -#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) -#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) - -#define cpu_relax() barrier() - -/* Prefetch support. This is tuned for UltraSPARC-III and later. - * UltraSPARC-I will treat these as nops, and UltraSPARC-II has - * a shallower prefetch queue than later chips. - */ -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH - -static inline void prefetch(const void *x) -{ - /* We do not use the read prefetch mnemonic because that - * prefetches into the prefetch-cache which only is accessible - * by floating point operations in UltraSPARC-III and later. - * By contrast, "#one_write" prefetches into the L2 cache - * in shared state. - */ - __asm__ __volatile__("prefetch [%0], #one_write" - : /* no outputs */ - : "r" (x)); -} - -static inline void prefetchw(const void *x) -{ - /* The most optimal prefetch to use for writes is - * "#n_writes". This brings the cacheline into the - * L2 cache in "owned" state. - */ - __asm__ __volatile__("prefetch [%0], #n_writes" - : /* no outputs */ - : "r" (x)); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -#define HAVE_ARCH_PICK_MMAP_LAYOUT - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ diff --git a/include/asm-sparc/prom.h b/include/asm-sparc/prom.h deleted file mode 100644 index fd55522..0000000 --- a/include/asm-sparc/prom.h +++ /dev/null @@ -1,108 +0,0 @@ -#ifndef _SPARC_PROM_H -#define _SPARC_PROM_H -#ifdef __KERNEL__ - -/* - * Definitions for talking to the Open Firmware PROM on - * Power Macintosh computers. - * - * Copyright (C) 1996-2005 Paul Mackerras. - * - * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp. - * Updates for SPARC by David S. Miller - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include -#include - -#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 2 -#define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 - -#define of_compat_cmp(s1, s2, l) strncmp((s1), (s2), (l)) -#define of_prop_cmp(s1, s2) strcasecmp((s1), (s2)) -#define of_node_cmp(s1, s2) strcmp((s1), (s2)) - -typedef u32 phandle; -typedef u32 ihandle; - -struct property { - char *name; - int length; - void *value; - struct property *next; - unsigned long _flags; - unsigned int unique_id; -}; - -struct of_irq_controller; -struct device_node { - const char *name; - const char *type; - phandle node; - char *path_component_name; - char *full_name; - - struct property *properties; - struct property *deadprops; /* removed properties */ - struct device_node *parent; - struct device_node *child; - struct device_node *sibling; - struct device_node *next; /* next device of same type */ - struct device_node *allnext; /* next in list of all nodes */ - struct proc_dir_entry *pde; /* this node's proc directory */ - struct kref kref; - unsigned long _flags; - void *data; - unsigned int unique_id; - - struct of_irq_controller *irq_trans; -}; - -struct of_irq_controller { - unsigned int (*irq_build)(struct device_node *, unsigned int, void *); - void *data; -}; - -#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) -#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) - -extern struct device_node *of_find_node_by_cpuid(int cpuid); -extern int of_set_property(struct device_node *node, const char *name, void *val, int len); -extern int of_getintprop_default(struct device_node *np, - const char *name, - int def); -extern int of_find_in_proplist(const char *list, const char *match, int len); -#ifdef CONFIG_NUMA -extern int of_node_to_nid(struct device_node *dp); -#else -#define of_node_to_nid(dp) (-1) -#endif - -extern void prom_build_devicetree(void); - -/* Dummy ref counting routines - to be implemented later */ -static inline struct device_node *of_node_get(struct device_node *node) -{ - return node; -} -static inline void of_node_put(struct device_node *node) -{ -} - -/* - * NB: This is here while we transition from using asm/prom.h - * to linux/of.h - */ -#include - -extern struct device_node *of_console_device; -extern char *of_console_path; -extern char *of_console_options; - -#endif /* __KERNEL__ */ -#endif /* _SPARC_PROM_H */ diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h deleted file mode 100644 index b8c0e5f..0000000 --- a/include/asm-sparc/psr.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * psr.h: This file holds the macros for masking off various parts of - * the processor status register on the Sparc. This is valid - * for Version 8. On the V9 this is renamed to the PSTATE - * register and its members are accessed as fields like - * PSTATE.PRIV for the current CPU privilege level. - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __LINUX_SPARC_PSR_H -#define __LINUX_SPARC_PSR_H - -/* The Sparc PSR fields are laid out as the following: - * - * ------------------------------------------------------------------------ - * | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP | - * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 | - * ------------------------------------------------------------------------ - */ -#define PSR_CWP 0x0000001f /* current window pointer */ -#define PSR_ET 0x00000020 /* enable traps field */ -#define PSR_PS 0x00000040 /* previous privilege level */ -#define PSR_S 0x00000080 /* current privilege level */ -#define PSR_PIL 0x00000f00 /* processor interrupt level */ -#define PSR_EF 0x00001000 /* enable floating point */ -#define PSR_EC 0x00002000 /* enable co-processor */ -#define PSR_SYSCALL 0x00004000 /* inside of a syscall */ -#define PSR_LE 0x00008000 /* SuperSparcII little-endian */ -#define PSR_ICC 0x00f00000 /* integer condition codes */ -#define PSR_C 0x00100000 /* carry bit */ -#define PSR_V 0x00200000 /* overflow bit */ -#define PSR_Z 0x00400000 /* zero bit */ -#define PSR_N 0x00800000 /* negative bit */ -#define PSR_VERS 0x0f000000 /* cpu-version field */ -#define PSR_IMPL 0xf0000000 /* cpu-implementation field */ - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ -/* Get the %psr register. */ -static inline unsigned int get_psr(void) -{ - unsigned int psr; - __asm__ __volatile__( - "rd %%psr, %0\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : "=r" (psr) - : /* no inputs */ - : "memory"); - - return psr; -} - -static inline void put_psr(unsigned int new_psr) -{ - __asm__ __volatile__( - "wr %0, 0x0, %%psr\n\t" - "nop\n\t" - "nop\n\t" - "nop\n\t" - : /* no outputs */ - : "r" (new_psr) - : "memory", "cc"); -} - -/* Get the %fsr register. Be careful, make sure the floating point - * enable bit is set in the %psr when you execute this or you will - * incur a trap. - */ - -extern unsigned int fsr_storage; - -static inline unsigned int get_fsr(void) -{ - unsigned int fsr = 0; - - __asm__ __volatile__( - "st %%fsr, %1\n\t" - "ld %1, %0\n\t" - : "=r" (fsr) - : "m" (fsr_storage)); - - return fsr; -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* (__KERNEL__) */ - -#endif /* !(__LINUX_SPARC_PSR_H) */ diff --git a/include/asm-sparc/psrcompat.h b/include/asm-sparc/psrcompat.h deleted file mode 100644 index 44b6327..0000000 --- a/include/asm-sparc/psrcompat.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef _SPARC64_PSRCOMPAT_H -#define _SPARC64_PSRCOMPAT_H - -#include - -/* Old 32-bit PSR fields for the compatibility conversion code. */ -#define PSR_CWP 0x0000001f /* current window pointer */ -#define PSR_ET 0x00000020 /* enable traps field */ -#define PSR_PS 0x00000040 /* previous privilege level */ -#define PSR_S 0x00000080 /* current privilege level */ -#define PSR_PIL 0x00000f00 /* processor interrupt level */ -#define PSR_EF 0x00001000 /* enable floating point */ -#define PSR_EC 0x00002000 /* enable co-processor */ -#define PSR_SYSCALL 0x00004000 /* inside of a syscall */ -#define PSR_LE 0x00008000 /* SuperSparcII little-endian */ -#define PSR_ICC 0x00f00000 /* integer condition codes */ -#define PSR_C 0x00100000 /* carry bit */ -#define PSR_V 0x00200000 /* overflow bit */ -#define PSR_Z 0x00400000 /* zero bit */ -#define PSR_N 0x00800000 /* negative bit */ -#define PSR_VERS 0x0f000000 /* cpu-version field */ -#define PSR_IMPL 0xf0000000 /* cpu-implementation field */ - -#define PSR_V8PLUS 0xff000000 /* fake impl/ver, meaning a 64bit CPU is present */ -#define PSR_XCC 0x000f0000 /* if PSR_V8PLUS, this is %xcc */ - -static inline unsigned int tstate_to_psr(unsigned long tstate) -{ - return ((tstate & TSTATE_CWP) | - PSR_S | - ((tstate & TSTATE_ICC) >> 12) | - ((tstate & TSTATE_XCC) >> 20) | - ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) | - PSR_V8PLUS); -} - -static inline unsigned long psr_to_tstate_icc(unsigned int psr) -{ - unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12; - if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS) - tstate |= ((unsigned long)(psr & PSR_XCC)) << 20; - return tstate; -} - -#endif /* !(_SPARC64_PSRCOMPAT_H) */ diff --git a/include/asm-sparc/pstate.h b/include/asm-sparc/pstate.h deleted file mode 100644 index a26a537..0000000 --- a/include/asm-sparc/pstate.h +++ /dev/null @@ -1,91 +0,0 @@ -#ifndef _SPARC64_PSTATE_H -#define _SPARC64_PSTATE_H - -#include - -/* The V9 PSTATE Register (with SpitFire extensions). - * - * ----------------------------------------------------------------------- - * | Resv | IG | MG | CLE | TLE | MM | RED | PEF | AM | PRIV | IE | AG | - * ----------------------------------------------------------------------- - * 63 12 11 10 9 8 7 6 5 4 3 2 1 0 - */ -#define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */ -#define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */ -#define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/ -#define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */ -#define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */ -#define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */ -#define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */ -#define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/ -#define PSTATE_RED _AC(0x0000000000000020,UL) /* Reset Error Debug. */ -#define PSTATE_PEF _AC(0x0000000000000010,UL) /* Floating Point Enable.*/ -#define PSTATE_AM _AC(0x0000000000000008,UL) /* Address Mask. */ -#define PSTATE_PRIV _AC(0x0000000000000004,UL) /* Privilege. */ -#define PSTATE_IE _AC(0x0000000000000002,UL) /* Interrupt Enable. */ -#define PSTATE_AG _AC(0x0000000000000001,UL) /* Alternate Globals. */ - -/* The V9 TSTATE Register (with SpitFire and Linux extensions). - * - * --------------------------------------------------------------------- - * | Resv | GL | CCR | ASI | %pil | PSTATE | Resv | CWP | - * --------------------------------------------------------------------- - * 63 43 42 40 39 32 31 24 23 20 19 8 7 5 4 0 - */ -#define TSTATE_GL _AC(0x0000070000000000,UL) /* Global reg level */ -#define TSTATE_CCR _AC(0x000000ff00000000,UL) /* Condition Codes. */ -#define TSTATE_XCC _AC(0x000000f000000000,UL) /* Condition Codes. */ -#define TSTATE_XNEG _AC(0x0000008000000000,UL) /* %xcc Negative. */ -#define TSTATE_XZERO _AC(0x0000004000000000,UL) /* %xcc Zero. */ -#define TSTATE_XOVFL _AC(0x0000002000000000,UL) /* %xcc Overflow. */ -#define TSTATE_XCARRY _AC(0x0000001000000000,UL) /* %xcc Carry. */ -#define TSTATE_ICC _AC(0x0000000f00000000,UL) /* Condition Codes. */ -#define TSTATE_INEG _AC(0x0000000800000000,UL) /* %icc Negative. */ -#define TSTATE_IZERO _AC(0x0000000400000000,UL) /* %icc Zero. */ -#define TSTATE_IOVFL _AC(0x0000000200000000,UL) /* %icc Overflow. */ -#define TSTATE_ICARRY _AC(0x0000000100000000,UL) /* %icc Carry. */ -#define TSTATE_ASI _AC(0x00000000ff000000,UL) /* AddrSpace ID. */ -#define TSTATE_PIL _AC(0x0000000000f00000,UL) /* %pil (Linux traps)*/ -#define TSTATE_PSTATE _AC(0x00000000000fff00,UL) /* PSTATE. */ -#define TSTATE_IG _AC(0x0000000000080000,UL) /* Interrupt Globals.*/ -#define TSTATE_MG _AC(0x0000000000040000,UL) /* MMU Globals. */ -#define TSTATE_CLE _AC(0x0000000000020000,UL) /* CurrLittleEndian. */ -#define TSTATE_TLE _AC(0x0000000000010000,UL) /* TrapLittleEndian. */ -#define TSTATE_MM _AC(0x000000000000c000,UL) /* Memory Model. */ -#define TSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TSO */ -#define TSTATE_PSO _AC(0x0000000000004000,UL) /* MM: PSO */ -#define TSTATE_RMO _AC(0x0000000000008000,UL) /* MM: RMO */ -#define TSTATE_RED _AC(0x0000000000002000,UL) /* Reset Error Debug.*/ -#define TSTATE_PEF _AC(0x0000000000001000,UL) /* FPU Enable. */ -#define TSTATE_AM _AC(0x0000000000000800,UL) /* Address Mask. */ -#define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */ -#define TSTATE_IE _AC(0x0000000000000200,UL) /* Interrupt Enable. */ -#define TSTATE_AG _AC(0x0000000000000100,UL) /* Alternate Globals.*/ -#define TSTATE_SYSCALL _AC(0x0000000000000020,UL) /* in syscall trap */ -#define TSTATE_CWP _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */ - -/* Floating-Point Registers State Register. - * - * -------------------------------- - * | Resv | FEF | DU | DL | - * -------------------------------- - * 63 3 2 1 0 - */ -#define FPRS_FEF _AC(0x0000000000000004,UL) /* FPU Enable. */ -#define FPRS_DU _AC(0x0000000000000002,UL) /* Dirty Upper. */ -#define FPRS_DL _AC(0x0000000000000001,UL) /* Dirty Lower. */ - -/* Version Register. - * - * ------------------------------------------------------ - * | MANUF | IMPL | MASK | Resv | MAXTL | Resv | MAXWIN | - * ------------------------------------------------------ - * 63 48 47 32 31 24 23 16 15 8 7 5 4 0 - */ -#define VERS_MANUF _AC(0xffff000000000000,UL) /* Manufacturer. */ -#define VERS_IMPL _AC(0x0000ffff00000000,UL) /* Implementation. */ -#define VERS_MASK _AC(0x00000000ff000000,UL) /* Mask Set Revision.*/ -#define VERS_MAXTL _AC(0x000000000000ff00,UL) /* Max Trap Level. */ -#define VERS_MAXWIN _AC(0x000000000000001f,UL) /* Max RegWindow Idx.*/ - -#endif /* !(_SPARC64_PSTATE_H) */ diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h deleted file mode 100644 index f36ab6c..0000000 --- a/include/asm-sparc/ptrace.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_PTRACE_H -#define ___ASM_SPARC_PTRACE_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/ptrace_32.h b/include/asm-sparc/ptrace_32.h deleted file mode 100644 index 0401cc7..0000000 --- a/include/asm-sparc/ptrace_32.h +++ /dev/null @@ -1,175 +0,0 @@ -#ifndef _SPARC_PTRACE_H -#define _SPARC_PTRACE_H - -#include - -/* This struct defines the way the registers are stored on the - * stack during a system call and basically all traps. - */ - -#ifndef __ASSEMBLY__ - -#include - -struct pt_regs { - unsigned long psr; - unsigned long pc; - unsigned long npc; - unsigned long y; - unsigned long u_regs[16]; /* globals and ins */ -}; - -#define UREG_G0 0 -#define UREG_G1 1 -#define UREG_G2 2 -#define UREG_G3 3 -#define UREG_G4 4 -#define UREG_G5 5 -#define UREG_G6 6 -#define UREG_G7 7 -#define UREG_I0 8 -#define UREG_I1 9 -#define UREG_I2 10 -#define UREG_I3 11 -#define UREG_I4 12 -#define UREG_I5 13 -#define UREG_I6 14 -#define UREG_I7 15 -#define UREG_WIM UREG_G0 -#define UREG_FADDR UREG_G0 -#define UREG_FP UREG_I6 -#define UREG_RETPC UREG_I7 - -static inline bool pt_regs_is_syscall(struct pt_regs *regs) -{ - return (regs->psr & PSR_SYSCALL); -} - -static inline bool pt_regs_clear_syscall(struct pt_regs *regs) -{ - return (regs->psr &= ~PSR_SYSCALL); -} - -/* A register window */ -struct reg_window { - unsigned long locals[8]; - unsigned long ins[8]; -}; - -/* A Sparc stack frame */ -struct sparc_stackf { - unsigned long locals[8]; - unsigned long ins[6]; - struct sparc_stackf *fp; - unsigned long callers_pc; - char *structptr; - unsigned long xargs[6]; - unsigned long xxargs[1]; -}; - -#define TRACEREG_SZ sizeof(struct pt_regs) -#define STACKFRAME_SZ sizeof(struct sparc_stackf) - -#ifdef __KERNEL__ - -#define user_mode(regs) (!((regs)->psr & PSR_PS)) -#define instruction_pointer(regs) ((regs)->pc) -unsigned long profile_pc(struct pt_regs *); -extern void show_regs(struct pt_regs *); -#endif - -#else /* __ASSEMBLY__ */ -/* For assembly code. */ -#define TRACEREG_SZ 0x50 -#define STACKFRAME_SZ 0x60 -#endif - -/* - * The asm-offsets.h is a generated file, so we cannot include it. - * It may be OK for glibc headers, but it's utterly pointless for C code. - * The assembly code using those offsets has to include it explicitly. - */ -/* #include */ - -/* These are for pt_regs. */ -#define PT_PSR 0x0 -#define PT_PC 0x4 -#define PT_NPC 0x8 -#define PT_Y 0xc -#define PT_G0 0x10 -#define PT_WIM PT_G0 -#define PT_G1 0x14 -#define PT_G2 0x18 -#define PT_G3 0x1c -#define PT_G4 0x20 -#define PT_G5 0x24 -#define PT_G6 0x28 -#define PT_G7 0x2c -#define PT_I0 0x30 -#define PT_I1 0x34 -#define PT_I2 0x38 -#define PT_I3 0x3c -#define PT_I4 0x40 -#define PT_I5 0x44 -#define PT_I6 0x48 -#define PT_FP PT_I6 -#define PT_I7 0x4c - -/* Reg_window offsets */ -#define RW_L0 0x00 -#define RW_L1 0x04 -#define RW_L2 0x08 -#define RW_L3 0x0c -#define RW_L4 0x10 -#define RW_L5 0x14 -#define RW_L6 0x18 -#define RW_L7 0x1c -#define RW_I0 0x20 -#define RW_I1 0x24 -#define RW_I2 0x28 -#define RW_I3 0x2c -#define RW_I4 0x30 -#define RW_I5 0x34 -#define RW_I6 0x38 -#define RW_I7 0x3c - -/* Stack_frame offsets */ -#define SF_L0 0x00 -#define SF_L1 0x04 -#define SF_L2 0x08 -#define SF_L3 0x0c -#define SF_L4 0x10 -#define SF_L5 0x14 -#define SF_L6 0x18 -#define SF_L7 0x1c -#define SF_I0 0x20 -#define SF_I1 0x24 -#define SF_I2 0x28 -#define SF_I3 0x2c -#define SF_I4 0x30 -#define SF_I5 0x34 -#define SF_FP 0x38 -#define SF_PC 0x3c -#define SF_RETP 0x40 -#define SF_XARG0 0x44 -#define SF_XARG1 0x48 -#define SF_XARG2 0x4c -#define SF_XARG3 0x50 -#define SF_XARG4 0x54 -#define SF_XARG5 0x58 -#define SF_XXARG 0x5c - -/* Stuff for the ptrace system call */ -#define PTRACE_SPARC_DETACH 11 -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_READDATA 16 -#define PTRACE_WRITEDATA 17 -#define PTRACE_READTEXT 18 -#define PTRACE_WRITETEXT 19 -#define PTRACE_GETFPAREGS 20 -#define PTRACE_SETFPAREGS 21 - -#endif /* !(_SPARC_PTRACE_H) */ diff --git a/include/asm-sparc/ptrace_64.h b/include/asm-sparc/ptrace_64.h deleted file mode 100644 index a682e66..0000000 --- a/include/asm-sparc/ptrace_64.h +++ /dev/null @@ -1,346 +0,0 @@ -#ifndef _SPARC64_PTRACE_H -#define _SPARC64_PTRACE_H - -#include - -/* This struct defines the way the registers are stored on the - * stack during a system call and basically all traps. - */ - -/* This magic value must have the low 9 bits clear, - * as that is where we encode the %tt value, see below. - */ -#define PT_REGS_MAGIC 0x57ac6c00 - -#ifndef __ASSEMBLY__ - -#include - -struct pt_regs { - unsigned long u_regs[16]; /* globals and ins */ - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned int y; - - /* We encode a magic number, PT_REGS_MAGIC, along - * with the %tt (trap type) register value at trap - * entry time. The magic number allows us to identify - * accurately a trap stack frame in the stack - * unwinder, and the %tt value allows us to test - * things like "in a system call" etc. for an arbitray - * process. - * - * The PT_REGS_MAGIC is choosen such that it can be - * loaded completely using just a sethi instruction. - */ - unsigned int magic; -}; - -static inline int pt_regs_trap_type(struct pt_regs *regs) -{ - return regs->magic & 0x1ff; -} - -static inline bool pt_regs_is_syscall(struct pt_regs *regs) -{ - return (regs->tstate & TSTATE_SYSCALL); -} - -static inline bool pt_regs_clear_syscall(struct pt_regs *regs) -{ - return (regs->tstate &= ~TSTATE_SYSCALL); -} - -struct pt_regs32 { - unsigned int psr; - unsigned int pc; - unsigned int npc; - unsigned int y; - unsigned int u_regs[16]; /* globals and ins */ -}; - -#define UREG_G0 0 -#define UREG_G1 1 -#define UREG_G2 2 -#define UREG_G3 3 -#define UREG_G4 4 -#define UREG_G5 5 -#define UREG_G6 6 -#define UREG_G7 7 -#define UREG_I0 8 -#define UREG_I1 9 -#define UREG_I2 10 -#define UREG_I3 11 -#define UREG_I4 12 -#define UREG_I5 13 -#define UREG_I6 14 -#define UREG_I7 15 -#define UREG_FP UREG_I6 -#define UREG_RETPC UREG_I7 - -/* A V9 register window */ -struct reg_window { - unsigned long locals[8]; - unsigned long ins[8]; -}; - -/* A 32-bit register window. */ -struct reg_window32 { - unsigned int locals[8]; - unsigned int ins[8]; -}; - -/* A V9 Sparc stack frame */ -struct sparc_stackf { - unsigned long locals[8]; - unsigned long ins[6]; - struct sparc_stackf *fp; - unsigned long callers_pc; - char *structptr; - unsigned long xargs[6]; - unsigned long xxargs[1]; -}; - -/* A 32-bit Sparc stack frame */ -struct sparc_stackf32 { - unsigned int locals[8]; - unsigned int ins[6]; - unsigned int fp; - unsigned int callers_pc; - unsigned int structptr; - unsigned int xargs[6]; - unsigned int xxargs[1]; -}; - -struct sparc_trapf { - unsigned long locals[8]; - unsigned long ins[8]; - unsigned long _unused; - struct pt_regs *regs; -}; - -#define TRACEREG_SZ sizeof(struct pt_regs) -#define STACKFRAME_SZ sizeof(struct sparc_stackf) - -#define TRACEREG32_SZ sizeof(struct pt_regs32) -#define STACKFRAME32_SZ sizeof(struct sparc_stackf32) - -#ifdef __KERNEL__ - -struct global_reg_snapshot { - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned long o7; - unsigned long i7; - struct thread_info *thread; - unsigned long pad1; - unsigned long pad2; -}; - -#define __ARCH_WANT_COMPAT_SYS_PTRACE - -#define force_successful_syscall_return() \ -do { current_thread_info()->syscall_noerror = 1; \ -} while (0) -#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) -#define instruction_pointer(regs) ((regs)->tpc) -#define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) -#ifdef CONFIG_SMP -extern unsigned long profile_pc(struct pt_regs *); -#else -#define profile_pc(regs) instruction_pointer(regs) -#endif -extern void show_regs(struct pt_regs *); -extern void __show_regs(struct pt_regs *); -#endif - -#else /* __ASSEMBLY__ */ -/* For assembly code. */ -#define TRACEREG_SZ 0xa0 -#define STACKFRAME_SZ 0xc0 - -#define TRACEREG32_SZ 0x50 -#define STACKFRAME32_SZ 0x60 -#endif - -#ifdef __KERNEL__ -#define STACK_BIAS 2047 -#endif - -/* These are for pt_regs. */ -#define PT_V9_G0 0x00 -#define PT_V9_G1 0x08 -#define PT_V9_G2 0x10 -#define PT_V9_G3 0x18 -#define PT_V9_G4 0x20 -#define PT_V9_G5 0x28 -#define PT_V9_G6 0x30 -#define PT_V9_G7 0x38 -#define PT_V9_I0 0x40 -#define PT_V9_I1 0x48 -#define PT_V9_I2 0x50 -#define PT_V9_I3 0x58 -#define PT_V9_I4 0x60 -#define PT_V9_I5 0x68 -#define PT_V9_I6 0x70 -#define PT_V9_FP PT_V9_I6 -#define PT_V9_I7 0x78 -#define PT_V9_TSTATE 0x80 -#define PT_V9_TPC 0x88 -#define PT_V9_TNPC 0x90 -#define PT_V9_Y 0x98 -#define PT_V9_MAGIC 0x9c -#define PT_TSTATE PT_V9_TSTATE -#define PT_TPC PT_V9_TPC -#define PT_TNPC PT_V9_TNPC - -/* These for pt_regs32. */ -#define PT_PSR 0x0 -#define PT_PC 0x4 -#define PT_NPC 0x8 -#define PT_Y 0xc -#define PT_G0 0x10 -#define PT_WIM PT_G0 -#define PT_G1 0x14 -#define PT_G2 0x18 -#define PT_G3 0x1c -#define PT_G4 0x20 -#define PT_G5 0x24 -#define PT_G6 0x28 -#define PT_G7 0x2c -#define PT_I0 0x30 -#define PT_I1 0x34 -#define PT_I2 0x38 -#define PT_I3 0x3c -#define PT_I4 0x40 -#define PT_I5 0x44 -#define PT_I6 0x48 -#define PT_FP PT_I6 -#define PT_I7 0x4c - -/* Reg_window offsets */ -#define RW_V9_L0 0x00 -#define RW_V9_L1 0x08 -#define RW_V9_L2 0x10 -#define RW_V9_L3 0x18 -#define RW_V9_L4 0x20 -#define RW_V9_L5 0x28 -#define RW_V9_L6 0x30 -#define RW_V9_L7 0x38 -#define RW_V9_I0 0x40 -#define RW_V9_I1 0x48 -#define RW_V9_I2 0x50 -#define RW_V9_I3 0x58 -#define RW_V9_I4 0x60 -#define RW_V9_I5 0x68 -#define RW_V9_I6 0x70 -#define RW_V9_I7 0x78 - -#define RW_L0 0x00 -#define RW_L1 0x04 -#define RW_L2 0x08 -#define RW_L3 0x0c -#define RW_L4 0x10 -#define RW_L5 0x14 -#define RW_L6 0x18 -#define RW_L7 0x1c -#define RW_I0 0x20 -#define RW_I1 0x24 -#define RW_I2 0x28 -#define RW_I3 0x2c -#define RW_I4 0x30 -#define RW_I5 0x34 -#define RW_I6 0x38 -#define RW_I7 0x3c - -/* Stack_frame offsets */ -#define SF_V9_L0 0x00 -#define SF_V9_L1 0x08 -#define SF_V9_L2 0x10 -#define SF_V9_L3 0x18 -#define SF_V9_L4 0x20 -#define SF_V9_L5 0x28 -#define SF_V9_L6 0x30 -#define SF_V9_L7 0x38 -#define SF_V9_I0 0x40 -#define SF_V9_I1 0x48 -#define SF_V9_I2 0x50 -#define SF_V9_I3 0x58 -#define SF_V9_I4 0x60 -#define SF_V9_I5 0x68 -#define SF_V9_FP 0x70 -#define SF_V9_PC 0x78 -#define SF_V9_RETP 0x80 -#define SF_V9_XARG0 0x88 -#define SF_V9_XARG1 0x90 -#define SF_V9_XARG2 0x98 -#define SF_V9_XARG3 0xa0 -#define SF_V9_XARG4 0xa8 -#define SF_V9_XARG5 0xb0 -#define SF_V9_XXARG 0xb8 - -#define SF_L0 0x00 -#define SF_L1 0x04 -#define SF_L2 0x08 -#define SF_L3 0x0c -#define SF_L4 0x10 -#define SF_L5 0x14 -#define SF_L6 0x18 -#define SF_L7 0x1c -#define SF_I0 0x20 -#define SF_I1 0x24 -#define SF_I2 0x28 -#define SF_I3 0x2c -#define SF_I4 0x30 -#define SF_I5 0x34 -#define SF_FP 0x38 -#define SF_PC 0x3c -#define SF_RETP 0x40 -#define SF_XARG0 0x44 -#define SF_XARG1 0x48 -#define SF_XARG2 0x4c -#define SF_XARG3 0x50 -#define SF_XARG4 0x54 -#define SF_XARG5 0x58 -#define SF_XXARG 0x5c - -#ifdef __KERNEL__ - -/* global_reg_snapshot offsets */ -#define GR_SNAP_TSTATE 0x00 -#define GR_SNAP_TPC 0x08 -#define GR_SNAP_TNPC 0x10 -#define GR_SNAP_O7 0x18 -#define GR_SNAP_I7 0x20 -#define GR_SNAP_THREAD 0x28 -#define GR_SNAP_PAD1 0x30 -#define GR_SNAP_PAD2 0x38 - -#endif /* __KERNEL__ */ - -/* Stuff for the ptrace system call */ -#define PTRACE_SPARC_DETACH 11 -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_READDATA 16 -#define PTRACE_WRITEDATA 17 -#define PTRACE_READTEXT 18 -#define PTRACE_WRITETEXT 19 -#define PTRACE_GETFPAREGS 20 -#define PTRACE_SETFPAREGS 21 - -/* There are for debugging 64-bit processes, either from a 32 or 64 bit - * parent. Thus their complements are for debugging 32-bit processes only. - */ - -#define PTRACE_GETREGS64 22 -#define PTRACE_SETREGS64 23 -/* PTRACE_SYSCALL is 24 */ -#define PTRACE_GETFPREGS64 25 -#define PTRACE_SETFPREGS64 26 - -#endif /* !(_SPARC64_PTRACE_H) */ diff --git a/include/asm-sparc/reboot.h b/include/asm-sparc/reboot.h deleted file mode 100644 index 3f3f43f..0000000 --- a/include/asm-sparc/reboot.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC64_REBOOT_H -#define _SPARC64_REBOOT_H - -extern void machine_alt_power_off(void); - -#endif /* _SPARC64_REBOOT_H */ diff --git a/include/asm-sparc/reg.h b/include/asm-sparc/reg.h deleted file mode 100644 index cb34b0a..0000000 --- a/include/asm-sparc/reg.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_REG_H -#define ___ASM_SPARC_REG_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/reg_32.h b/include/asm-sparc/reg_32.h deleted file mode 100644 index 42fecfc..0000000 --- a/include/asm-sparc/reg_32.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * linux/include/asm-sparc/reg.h - * Layout of the registers as expected by gdb on the Sparc - * we should replace the user.h definitions with those in - * this file, we don't even use the other - * -miguel - * - * The names of the structures, constants and aliases in this file - * have the same names as the sunos ones, some programs rely on these - * names (gdb for example). - * - */ - -#ifndef __SPARC_REG_H -#define __SPARC_REG_H - -struct regs { - int r_psr; -#define r_ps r_psr - int r_pc; - int r_npc; - int r_y; - int r_g1; - int r_g2; - int r_g3; - int r_g4; - int r_g5; - int r_g6; - int r_g7; - int r_o0; - int r_o1; - int r_o2; - int r_o3; - int r_o4; - int r_o5; - int r_o6; - int r_o7; -}; - -struct fpq { - unsigned long *addr; - unsigned long instr; -}; - -struct fq { - union { - double whole; - struct fpq fpq; - } FQu; -}; - -#define FPU_REGS_TYPE unsigned int -#define FPU_FSR_TYPE unsigned - -struct fp_status { - union { - FPU_REGS_TYPE Fpu_regs[32]; - double Fpu_dregs[16]; - } fpu_fr; - FPU_FSR_TYPE Fpu_fsr; - unsigned Fpu_flags; - unsigned Fpu_extra; - unsigned Fpu_qcnt; - struct fq Fpu_q[16]; -}; - -#define fpu_regs f_fpstatus.fpu_fr.Fpu_regs -#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs -#define fpu_fsr f_fpstatus.Fpu_fsr -#define fpu_flags f_fpstatus.Fpu_flags -#define fpu_extra f_fpstatus.Fpu_extra -#define fpu_q f_fpstatus.Fpu_q -#define fpu_qcnt f_fpstatus.Fpu_qcnt - -struct fpu { - struct fp_status f_fpstatus; -}; - -#endif /* __SPARC_REG_H */ diff --git a/include/asm-sparc/reg_64.h b/include/asm-sparc/reg_64.h deleted file mode 100644 index eb24a07..0000000 --- a/include/asm-sparc/reg_64.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * linux/asm-sparc64/reg.h - * Layout of the registers as expected by gdb on the Sparc - * we should replace the user.h definitions with those in - * this file, we don't even use the other - * -miguel - * - * The names of the structures, constants and aliases in this file - * have the same names as the sunos ones, some programs rely on these - * names (gdb for example). - * - */ - -#ifndef __SPARC64_REG_H -#define __SPARC64_REG_H - -struct regs { - unsigned long r_g1; - unsigned long r_g2; - unsigned long r_g3; - unsigned long r_g4; - unsigned long r_g5; - unsigned long r_g6; - unsigned long r_g7; - unsigned long r_o0; - unsigned long r_o1; - unsigned long r_o2; - unsigned long r_o3; - unsigned long r_o4; - unsigned long r_o5; - unsigned long r_o6; - unsigned long r_o7; - unsigned long __pad; - unsigned long r_tstate; - unsigned long r_tpc; - unsigned long r_tnpc; - unsigned int r_y; - unsigned int r_fprs; -}; - -#define FPU_REGS_TYPE unsigned int -#define FPU_FSR_TYPE unsigned long - -struct fp_status { - unsigned long fpu_fr[32]; - unsigned long Fpu_fsr; -}; - -struct fpu { - struct fp_status f_fpstatus; -}; - -#define fpu_regs f_fpstatus.fpu_fr -#define fpu_fsr f_fpstatus.Fpu_fsr - -#endif /* __SPARC64_REG_H */ diff --git a/include/asm-sparc/resource.h b/include/asm-sparc/resource.h deleted file mode 100644 index fe163ca..0000000 --- a/include/asm-sparc/resource.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * resource.h: Resource definitions. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_RESOURCE_H -#define _SPARC_RESOURCE_H - -/* - * These two resource limit IDs have a Sparc/Linux-specific ordering, - * the rest comes from the generic header: - */ -#define RLIMIT_NOFILE 6 /* max number of open files */ -#define RLIMIT_NPROC 7 /* max number of processes */ - -#if defined(__sparc__) && defined(__arch64__) -/* Use generic version */ -#else -/* - * SuS says limits have to be unsigned. - * We make this unsigned, but keep the - * old value for compatibility: - */ -#define RLIM_INFINITY 0x7fffffff -#endif - -#include - -#endif /* !(_SPARC_RESOURCE_H) */ diff --git a/include/asm-sparc/ross.h b/include/asm-sparc/ross.h deleted file mode 100644 index ecb6e81..0000000 --- a/include/asm-sparc/ross.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - * ross.h: Ross module specific definitions and defines. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_ROSS_H -#define _SPARC_ROSS_H - -#include -#include - -/* Ross made Hypersparcs have a %psr 'impl' field of '0001'. The 'vers' - * field has '1111'. - */ - -/* The MMU control register fields on the HyperSparc. - * - * ----------------------------------------------------------------- - * |implvers| RSV |CWR|SE|WBE| MID |BM| C|CS|MR|CM|RSV|CE|RSV|NF|ME| - * ----------------------------------------------------------------- - * 31 24 23-22 21 20 19 18-15 14 13 12 11 10 9 8 7-2 1 0 - * - * Phew, lots of fields there ;-) - * - * CWR: Cache Wrapping Enabled, if one cache wrapping is on. - * SE: Snoop Enable, turns on bus snooping for cache activity if one. - * WBE: Write Buffer Enable, one turns it on. - * MID: The ModuleID of the chip for MBus transactions. - * BM: Boot-Mode. One indicates the MMU is in boot mode. - * C: Indicates whether accesses are cachable while the MMU is - * disabled. - * CS: Cache Size -- 0 = 128k, 1 = 256k - * MR: Memory Reflection, one indicates that the memory bus connected - * to the MBus supports memory reflection. - * CM: Cache Mode -- 0 = write-through, 1 = copy-back - * CE: Cache Enable -- 0 = no caching, 1 = cache is on - * NF: No Fault -- 0 = faults trap the CPU from supervisor mode - * 1 = faults from supervisor mode do not generate traps - * ME: MMU Enable -- 0 = MMU is off, 1 = MMU is on - */ - -#define HYPERSPARC_CWENABLE 0x00200000 -#define HYPERSPARC_SBENABLE 0x00100000 -#define HYPERSPARC_WBENABLE 0x00080000 -#define HYPERSPARC_MIDMASK 0x00078000 -#define HYPERSPARC_BMODE 0x00004000 -#define HYPERSPARC_ACENABLE 0x00002000 -#define HYPERSPARC_CSIZE 0x00001000 -#define HYPERSPARC_MRFLCT 0x00000800 -#define HYPERSPARC_CMODE 0x00000400 -#define HYPERSPARC_CENABLE 0x00000100 -#define HYPERSPARC_NFAULT 0x00000002 -#define HYPERSPARC_MENABLE 0x00000001 - - -/* The ICCR instruction cache register on the HyperSparc. - * - * ----------------------------------------------- - * | | FTD | ICE | - * ----------------------------------------------- - * 31 1 0 - * - * This register is accessed using the V8 'wrasr' and 'rdasr' - * opcodes, since not all assemblers understand them and those - * that do use different semantics I will just hard code the - * instruction with a '.word' statement. - * - * FTD: If set to one flush instructions executed during an - * instruction cache hit occurs, the corresponding line - * for said cache-hit is invalidated. If FTD is zero, - * an unimplemented 'flush' trap will occur when any - * flush is executed by the processor. - * - * ICE: If set to one, the instruction cache is enabled. If - * zero, the cache will not be used for instruction fetches. - * - * All other bits are read as zeros, and writes to them have no - * effect. - * - * Wheee, not many assemblers understand the %iccr register nor - * the generic asr r/w instructions. - * - * 1000 0011 0100 0111 1100 0000 0000 0000 ! rd %iccr, %g1 - * - * 0x 8 3 4 7 c 0 0 0 ! 0x8347c000 - * - * 1011 1111 1000 0000 0110 0000 0000 0000 ! wr %g1, 0x0, %iccr - * - * 0x b f 8 0 6 0 0 0 ! 0xbf806000 - * - */ - -#define HYPERSPARC_ICCR_FTD 0x00000002 -#define HYPERSPARC_ICCR_ICE 0x00000001 - -#ifndef __ASSEMBLY__ - -static inline unsigned int get_ross_icr(void) -{ - unsigned int icreg; - - __asm__ __volatile__(".word 0x8347c000\n\t" /* rd %iccr, %g1 */ - "mov %%g1, %0\n\t" - : "=r" (icreg) - : /* no inputs */ - : "g1", "memory"); - - return icreg; -} - -static inline void put_ross_icr(unsigned int icreg) -{ - __asm__ __volatile__("or %%g0, %0, %%g1\n\t" - ".word 0xbf806000\n\t" /* wr %g1, 0x0, %iccr */ - "nop\n\t" - "nop\n\t" - "nop\n\t" - : /* no outputs */ - : "r" (icreg) - : "g1", "memory"); - - return; -} - -/* HyperSparc specific cache flushing. */ - -/* This is for the on-chip instruction cache. */ -static inline void hyper_flush_whole_icache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_FLUSH_IWHOLE) - : "memory"); - return; -} - -extern int vac_cache_size; -extern int vac_line_size; - -static inline void hyper_clear_all_tags(void) -{ - unsigned long addr; - - for(addr = 0; addr < vac_cache_size; addr += vac_line_size) - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_DATAC_TAG) - : "memory"); -} - -static inline void hyper_flush_unconditional_combined(void) -{ - unsigned long addr; - - for (addr = 0; addr < vac_cache_size; addr += vac_line_size) - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_FLUSH_CTX) - : "memory"); -} - -static inline void hyper_flush_cache_user(void) -{ - unsigned long addr; - - for (addr = 0; addr < vac_cache_size; addr += vac_line_size) - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_FLUSH_USER) - : "memory"); -} - -static inline void hyper_flush_cache_page(unsigned long page) -{ - unsigned long end; - - page &= PAGE_MASK; - end = page + PAGE_SIZE; - while (page < end) { - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (page), "i" (ASI_M_FLUSH_PAGE) - : "memory"); - page += vac_line_size; - } -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC_ROSS_H) */ diff --git a/include/asm-sparc/rtc.h b/include/asm-sparc/rtc.h deleted file mode 100644 index f9ecb1f..0000000 --- a/include/asm-sparc/rtc.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * rtc.h: Definitions for access to the Mostek real time clock - * - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - */ - -#ifndef _RTC_H -#define _RTC_H - -#include - -struct rtc_time -{ - int sec; /* Seconds (0-59) */ - int min; /* Minutes (0-59) */ - int hour; /* Hour (0-23) */ - int dow; /* Day of the week (1-7) */ - int dom; /* Day of the month (1-31) */ - int month; /* Month of year (1-12) */ - int year; /* Year (0-99) */ -}; - -#define RTCGET _IOR('p', 20, struct rtc_time) -#define RTCSET _IOW('p', 21, struct rtc_time) - -#endif diff --git a/include/asm-sparc/rwsem-const.h b/include/asm-sparc/rwsem-const.h deleted file mode 100644 index a303c9d..0000000 --- a/include/asm-sparc/rwsem-const.h +++ /dev/null @@ -1,12 +0,0 @@ -/* rwsem-const.h: RW semaphore counter constants. */ -#ifndef _SPARC64_RWSEM_CONST_H -#define _SPARC64_RWSEM_CONST_H - -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS 0xffff0000 -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - -#endif /* _SPARC64_RWSEM_CONST_H */ diff --git a/include/asm-sparc/rwsem.h b/include/asm-sparc/rwsem.h deleted file mode 100644 index 1dc129a..0000000 --- a/include/asm-sparc/rwsem.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * rwsem.h: R/W semaphores implemented using CAS - * - * Written by David S. Miller (davem@redhat.com), 2001. - * Derived from asm-i386/rwsem.h - */ -#ifndef _SPARC64_RWSEM_H -#define _SPARC64_RWSEM_H - -#ifndef _LINUX_RWSEM_H -#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" -#endif - -#ifdef __KERNEL__ - -#include -#include -#include - -struct rwsem_waiter; - -struct rw_semaphore { - signed int count; - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ -{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ -do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ -} while (0) - -extern void __down_read(struct rw_semaphore *sem); -extern int __down_read_trylock(struct rw_semaphore *sem); -extern void __down_write(struct rw_semaphore *sem); -extern int __down_write_trylock(struct rw_semaphore *sem); -extern void __up_read(struct rw_semaphore *sem); -extern void __up_write(struct rw_semaphore *sem); -extern void __downgrade_write(struct rw_semaphore *sem); - -static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) -{ - __down_write(sem); -} - -static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -{ - return atomic_add_return(delta, (atomic_t *)(&sem->count)); -} - -static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -{ - atomic_add(delta, (atomic_t *)(&sem->count)); -} - -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - -#endif /* __KERNEL__ */ - -#endif /* _SPARC64_RWSEM_H */ diff --git a/include/asm-sparc/sbi.h b/include/asm-sparc/sbi.h deleted file mode 100644 index 5eb7f19..0000000 --- a/include/asm-sparc/sbi.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * sbi.h: SBI (Sbus Interface on sun4d) definitions - * - * Copyright (C) 1997 Jakub Jelinek - */ - -#ifndef _SPARC_SBI_H -#define _SPARC_SBI_H - -#include - -/* SBI */ -struct sbi_regs { -/* 0x0000 */ u32 cid; /* Component ID */ -/* 0x0004 */ u32 ctl; /* Control */ -/* 0x0008 */ u32 status; /* Status */ - u32 _unused1; - -/* 0x0010 */ u32 cfg0; /* Slot0 config reg */ -/* 0x0014 */ u32 cfg1; /* Slot1 config reg */ -/* 0x0018 */ u32 cfg2; /* Slot2 config reg */ -/* 0x001c */ u32 cfg3; /* Slot3 config reg */ - -/* 0x0020 */ u32 stb0; /* Streaming buf control for slot 0 */ -/* 0x0024 */ u32 stb1; /* Streaming buf control for slot 1 */ -/* 0x0028 */ u32 stb2; /* Streaming buf control for slot 2 */ -/* 0x002c */ u32 stb3; /* Streaming buf control for slot 3 */ - -/* 0x0030 */ u32 intr_state; /* Interrupt state */ -/* 0x0034 */ u32 intr_tid; /* Interrupt target ID */ -/* 0x0038 */ u32 intr_diag; /* Interrupt diagnostics */ -}; - -#define SBI_CID 0x02800000 -#define SBI_CTL 0x02800004 -#define SBI_STATUS 0x02800008 -#define SBI_CFG0 0x02800010 -#define SBI_CFG1 0x02800014 -#define SBI_CFG2 0x02800018 -#define SBI_CFG3 0x0280001c -#define SBI_STB0 0x02800020 -#define SBI_STB1 0x02800024 -#define SBI_STB2 0x02800028 -#define SBI_STB3 0x0280002c -#define SBI_INTR_STATE 0x02800030 -#define SBI_INTR_TID 0x02800034 -#define SBI_INTR_DIAG 0x02800038 - -/* Burst bits for 8, 16, 32, 64 are in cfgX registers at bits 2, 3, 4, 5 respectively */ -#define SBI_CFG_BURST_MASK 0x0000001e - -/* How to make devid from sbi no */ -#define SBI2DEVID(sbino) ((sbino<<4)|2) - -/* intr_state has 4 bits for slots 0 .. 3 and these bits are repeated for each sbus irq level - * - * +-------+-------+-------+-------+-------+-------+-------+-------+ - * SBUS IRQ LEVEL | 7 | 6 | 5 | 4 | 3 | 2 | 1 | | - * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Reser | - * SLOT # |3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0|3|2|1|0| ved | - * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-------+ - * Bits 31 27 23 19 15 11 7 3 0 - */ - - -#ifndef __ASSEMBLY__ - -static inline int acquire_sbi(int devid, int mask) -{ - __asm__ __volatile__ ("swapa [%2] %3, %0" : - "=r" (mask) : - "0" (mask), - "r" (ECSR_DEV_BASE(devid) | SBI_INTR_STATE), - "i" (ASI_M_CTL)); - return mask; -} - -static inline void release_sbi(int devid, int mask) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (mask), - "r" (ECSR_DEV_BASE(devid) | SBI_INTR_STATE), - "i" (ASI_M_CTL)); -} - -static inline void set_sbi_tid(int devid, int targetid) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (targetid), - "r" (ECSR_DEV_BASE(devid) | SBI_INTR_TID), - "i" (ASI_M_CTL)); -} - -static inline int get_sbi_ctl(int devid, int cfgno) -{ - int cfg; - - __asm__ __volatile__ ("lda [%1] %2, %0" : - "=r" (cfg) : - "r" ((ECSR_DEV_BASE(devid) | SBI_CFG0) + (cfgno<<2)), - "i" (ASI_M_CTL)); - return cfg; -} - -static inline void set_sbi_ctl(int devid, int cfgno, int cfg) -{ - __asm__ __volatile__ ("sta %0, [%1] %2" : : - "r" (cfg), - "r" ((ECSR_DEV_BASE(devid) | SBI_CFG0) + (cfgno<<2)), - "i" (ASI_M_CTL)); -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* !(_SPARC_SBI_H) */ diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h deleted file mode 100644 index 8f29a19..0000000 --- a/include/asm-sparc/sbus.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SBUS_H -#define ___ASM_SPARC_SBUS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/sbus_32.h b/include/asm-sparc/sbus_32.h deleted file mode 100644 index 77b5d3a..0000000 --- a/include/asm-sparc/sbus_32.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * sbus.h: Defines for the Sun SBus. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SBUS_H -#define _SPARC_SBUS_H - -#include -#include - -#include -#include -#include -#include - -/* We scan which devices are on the SBus using the PROM node device - * tree. SBus devices are described in two different ways. You can - * either get an absolute address at which to access the device, or - * you can get a SBus 'slot' number and an offset within that slot. - */ - -/* The base address at which to calculate device OBIO addresses. */ -#define SUN_SBUS_BVADDR 0xf8000000 -#define SBUS_OFF_MASK 0x01ffffff - -/* These routines are used to calculate device address from slot - * numbers + offsets, and vice versa. - */ - -static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) -{ - return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); -} - -static inline int sbus_dev_slot(unsigned long dev_addr) -{ - return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); -} - -struct sbus_bus; - -/* Linux SBUS device tables */ -struct sbus_dev { - struct of_device ofdev; - struct sbus_bus *bus; - struct sbus_dev *next; - struct sbus_dev *child; - struct sbus_dev *parent; - int prom_node; - char prom_name[64]; - int slot; - - struct resource resource[PROMREG_MAX]; - - struct linux_prom_registers reg_addrs[PROMREG_MAX]; - int num_registers; - - struct linux_prom_ranges device_ranges[PROMREG_MAX]; - int num_device_ranges; - - unsigned int irqs[4]; - int num_irqs; -}; -#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) - -/* This struct describes the SBus(s) found on this machine. */ -struct sbus_bus { - struct of_device ofdev; - struct sbus_dev *devices; /* Link to devices on this SBus */ - struct sbus_bus *next; /* next SBus, if more than one SBus */ - int prom_node; /* PROM device tree node for this SBus */ - char prom_name[64]; /* Usually "sbus" or "sbi" */ - int clock_freq; - - struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; - int num_sbus_ranges; - - int devid; - int board; -}; -#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) - -extern struct sbus_bus *sbus_root; - -static inline int -sbus_is_slave(struct sbus_dev *dev) -{ - /* XXX Have to write this for sun4c's */ - return 0; -} - -/* Device probing routines could find these handy */ -#define for_each_sbus(bus) \ - for((bus) = sbus_root; (bus); (bus)=(bus)->next) - -#define for_each_sbusdev(device, bus) \ - for((device) = (bus)->devices; (device); (device)=(device)->next) - -#define for_all_sbusdev(device, bus) \ - for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ - for ((device) = (bus)->devices; (device); (device) = (device)->next) - -/* Driver DVMA interfaces. */ -#define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */ -#define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */ -extern void sbus_set_sbus64(struct sbus_dev *, int); -extern void sbus_fill_device_irq(struct sbus_dev *); - -/* These yield IOMMU mappings in consistent mode. */ -extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp); -extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32); -void prom_adjust_ranges(struct linux_prom_ranges *, int, - struct linux_prom_ranges *, int); - -#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL -#define SBUS_DMA_TODEVICE DMA_TO_DEVICE -#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE -#define SBUS_DMA_NONE DMA_NONE - -/* All the rest use streaming mode mappings. */ -extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); -extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); -extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); -extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); - -/* Finally, allow explicit synchronization of streamable mappings. */ -extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); -#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu -extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); -extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); -#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu -extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); - -/* Eric Brower (ebrower@usa.net) - * Translate SBus interrupt levels to ino values-- - * this is used when converting sbus "interrupts" OBP - * node values to "intr" node values, and is platform - * dependent. If only we could call OBP with - * "sbus-intr>cpu (sbint -- ino)" from kernel... - * See .../drivers/sbus/sbus.c for details. - */ -BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int) -#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint) - -extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); -extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); -extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); -extern int sbus_arch_preinit(void); -extern void sbus_arch_postinit(void); - -#endif /* !(_SPARC_SBUS_H) */ diff --git a/include/asm-sparc/sbus_64.h b/include/asm-sparc/sbus_64.h deleted file mode 100644 index 0e16b6d..0000000 --- a/include/asm-sparc/sbus_64.h +++ /dev/null @@ -1,190 +0,0 @@ -/* sbus.h: Defines for the Sun SBus. - * - * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_SBUS_H -#define _SPARC64_SBUS_H - -#include -#include - -#include -#include -#include -#include -#include - -/* We scan which devices are on the SBus using the PROM node device - * tree. SBus devices are described in two different ways. You can - * either get an absolute address at which to access the device, or - * you can get a SBus 'slot' number and an offset within that slot. - */ - -/* The base address at which to calculate device OBIO addresses. */ -#define SUN_SBUS_BVADDR 0x00000000 -#define SBUS_OFF_MASK 0x0fffffff - -/* These routines are used to calculate device address from slot - * numbers + offsets, and vice versa. - */ - -static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) -{ - return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); -} - -static inline int sbus_dev_slot(unsigned long dev_addr) -{ - return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); -} - -struct sbus_bus; - -/* Linux SBUS device tables */ -struct sbus_dev { - struct of_device ofdev; - struct sbus_bus *bus; - struct sbus_dev *next; - struct sbus_dev *child; - struct sbus_dev *parent; - int prom_node; - char prom_name[64]; - int slot; - - struct resource resource[PROMREG_MAX]; - - struct linux_prom_registers reg_addrs[PROMREG_MAX]; - int num_registers; - - struct linux_prom_ranges device_ranges[PROMREG_MAX]; - int num_device_ranges; - - unsigned int irqs[4]; - int num_irqs; -}; -#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) - -/* This struct describes the SBus(s) found on this machine. */ -struct sbus_bus { - struct of_device ofdev; - struct sbus_dev *devices; /* Tree of SBUS devices */ - struct sbus_bus *next; /* Next SBUS in system */ - int prom_node; /* OBP node of SBUS */ - char prom_name[64]; /* Usually "sbus" or "sbi" */ - int clock_freq; - - struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; - int num_sbus_ranges; - - int portid; -}; -#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) - -extern struct sbus_bus *sbus_root; - -/* Device probing routines could find these handy */ -#define for_each_sbus(bus) \ - for((bus) = sbus_root; (bus); (bus)=(bus)->next) - -#define for_each_sbusdev(device, bus) \ - for((device) = (bus)->devices; (device); (device)=(device)->next) - -#define for_all_sbusdev(device, bus) \ - for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ - for ((device) = (bus)->devices; (device); (device) = (device)->next) - -/* Driver DVMA interfaces. */ -#define sbus_can_dma_64bit(sdev) (1) -#define sbus_can_burst64(sdev) (1) -extern void sbus_set_sbus64(struct sbus_dev *, int); -extern void sbus_fill_device_irq(struct sbus_dev *); - -static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size, - dma_addr_t *dma_handle) -{ - return dma_alloc_coherent(&sdev->ofdev.dev, size, - dma_handle, GFP_ATOMIC); -} - -static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle); -} - -#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL -#define SBUS_DMA_TODEVICE DMA_TO_DEVICE -#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE -#define SBUS_DMA_NONE DMA_NONE - -/* All the rest use streaming mode mappings. */ -static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, - size_t size, int direction) -{ - return dma_map_single(&sdev->ofdev.dev, ptr, size, - (enum dma_data_direction) direction); -} - -static inline void sbus_unmap_single(struct sbus_dev *sdev, - dma_addr_t dma_addr, size_t size, - int direction) -{ - dma_unmap_single(&sdev->ofdev.dev, dma_addr, size, - (enum dma_data_direction) direction); -} - -static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, - int nents, int direction) -{ - return dma_map_sg(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, - int nents, int direction) -{ - dma_unmap_sg(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} - -/* Finally, allow explicit synchronization of streamable mappings. */ -static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size, - (enum dma_data_direction) direction); -} -#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu - -static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, - struct scatterlist *sg, - int nents, int direction) -{ - dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} -#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu - -static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, - struct scatterlist *sg, - int nents, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); -extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); -extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); -extern int sbus_arch_preinit(void); -extern void sbus_arch_postinit(void); - -#endif /* !(_SPARC64_SBUS_H) */ diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h deleted file mode 100644 index b1a0e31..0000000 --- a/include/asm-sparc/scatterlist.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SCATTERLIST_H -#define ___ASM_SPARC_SCATTERLIST_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/scatterlist_32.h b/include/asm-sparc/scatterlist_32.h deleted file mode 100644 index c82609c..0000000 --- a/include/asm-sparc/scatterlist_32.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _SPARC_SCATTERLIST_H -#define _SPARC_SCATTERLIST_H - -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - - unsigned int length; - - __u32 dvma_address; /* A place to hang host-specific addresses at. */ - __u32 dvma_length; -}; - -#define sg_dma_address(sg) ((sg)->dvma_address) -#define sg_dma_len(sg) ((sg)->dvma_length) - -#define ISA_DMA_THRESHOLD (~0UL) - -#define ARCH_HAS_SG_CHAIN - -#endif /* !(_SPARC_SCATTERLIST_H) */ diff --git a/include/asm-sparc/scatterlist_64.h b/include/asm-sparc/scatterlist_64.h deleted file mode 100644 index 81bd058..0000000 --- a/include/asm-sparc/scatterlist_64.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _SPARC64_SCATTERLIST_H -#define _SPARC64_SCATTERLIST_H - -#include -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - - unsigned int length; - - dma_addr_t dma_address; - __u32 dma_length; -}; - -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->dma_length) - -#define ISA_DMA_THRESHOLD (~0UL) - -#define ARCH_HAS_SG_CHAIN - -#endif /* !(_SPARC64_SCATTERLIST_H) */ diff --git a/include/asm-sparc/scratchpad.h b/include/asm-sparc/scratchpad.h deleted file mode 100644 index 5e8b01f..0000000 --- a/include/asm-sparc/scratchpad.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _SPARC64_SCRATCHPAD_H -#define _SPARC64_SCRATCHPAD_H - -/* Sun4v scratchpad registers, accessed via ASI_SCRATCHPAD. */ - -#define SCRATCHPAD_MMU_MISS 0x00 /* Shared with OBP - set by OBP */ -#define SCRATCHPAD_CPUID 0x08 /* Shared with OBP - set by hypervisor */ -#define SCRATCHPAD_UTSBREG1 0x10 -#define SCRATCHPAD_UTSBREG2 0x18 - /* 0x20 and 0x28, hypervisor only... */ -#define SCRATCHPAD_UNUSED1 0x30 -#define SCRATCHPAD_UNUSED2 0x38 /* Reserved for OBP */ - -#endif /* !(_SPARC64_SCRATCHPAD_H) */ diff --git a/include/asm-sparc/seccomp.h b/include/asm-sparc/seccomp.h deleted file mode 100644 index 7fcd996..0000000 --- a/include/asm-sparc/seccomp.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_SECCOMP_H - -#include /* already defines TIF_32BIT */ - -#ifndef TIF_32BIT -#error "unexpected TIF_32BIT on sparc64" -#endif - -#include - -#define __NR_seccomp_read __NR_read -#define __NR_seccomp_write __NR_write -#define __NR_seccomp_exit __NR_exit -#define __NR_seccomp_sigreturn __NR_rt_sigreturn - -#define __NR_seccomp_read_32 __NR_read -#define __NR_seccomp_write_32 __NR_write -#define __NR_seccomp_exit_32 __NR_exit -#define __NR_seccomp_sigreturn_32 __NR_sigreturn - -#endif /* _ASM_SECCOMP_H */ diff --git a/include/asm-sparc/sections.h b/include/asm-sparc/sections.h deleted file mode 100644 index cbd0191..0000000 --- a/include/asm-sparc/sections.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SECTIONS_H -#define ___ASM_SPARC_SECTIONS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/sections_32.h b/include/asm-sparc/sections_32.h deleted file mode 100644 index 6832841..0000000 --- a/include/asm-sparc/sections_32.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC_SECTIONS_H -#define _SPARC_SECTIONS_H - -#include - -#endif diff --git a/include/asm-sparc/sections_64.h b/include/asm-sparc/sections_64.h deleted file mode 100644 index 3f4b9fd..0000000 --- a/include/asm-sparc/sections_64.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _SPARC64_SECTIONS_H -#define _SPARC64_SECTIONS_H - -/* nothing to see, move along */ -#include - -extern char _start[]; - -#endif diff --git a/include/asm-sparc/sembuf.h b/include/asm-sparc/sembuf.h deleted file mode 100644 index faee1be..0000000 --- a/include/asm-sparc/sembuf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _SPARC_SEMBUF_H -#define _SPARC_SEMBUF_H - -/* - * The semid64_ds structure for sparc architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ -#if defined(__sparc__) && defined(__arch64__) -# define PADDING(x) -#else -# define PADDING(x) unsigned int x; -#endif - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - PADDING(__pad1) - __kernel_time_t sem_otime; /* last semop time */ - PADDING(__pad2) - __kernel_time_t sem_ctime; /* last change time */ - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused1; - unsigned long __unused2; -}; -#undef PADDING - -#endif /* _SPARC64_SEMBUF_H */ diff --git a/include/asm-sparc/setup.h b/include/asm-sparc/setup.h deleted file mode 100644 index 2643c62..0000000 --- a/include/asm-sparc/setup.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Just a place holder. - */ - -#ifndef _SPARC_SETUP_H -#define _SPARC_SETUP_H - -#if defined(__sparc__) && defined(__arch64__) -# define COMMAND_LINE_SIZE 2048 -#else -# define COMMAND_LINE_SIZE 256 -#endif - -#endif /* _SPARC_SETUP_H */ diff --git a/include/asm-sparc/sfafsr.h b/include/asm-sparc/sfafsr.h deleted file mode 100644 index e96137b..0000000 --- a/include/asm-sparc/sfafsr.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef _SPARC64_SFAFSR_H -#define _SPARC64_SFAFSR_H - -#include - -/* Spitfire Asynchronous Fault Status register, ASI=0x4C VA<63:0>=0x0 */ - -#define SFAFSR_ME (_AC(1,UL) << SFAFSR_ME_SHIFT) -#define SFAFSR_ME_SHIFT 32 -#define SFAFSR_PRIV (_AC(1,UL) << SFAFSR_PRIV_SHIFT) -#define SFAFSR_PRIV_SHIFT 31 -#define SFAFSR_ISAP (_AC(1,UL) << SFAFSR_ISAP_SHIFT) -#define SFAFSR_ISAP_SHIFT 30 -#define SFAFSR_ETP (_AC(1,UL) << SFAFSR_ETP_SHIFT) -#define SFAFSR_ETP_SHIFT 29 -#define SFAFSR_IVUE (_AC(1,UL) << SFAFSR_IVUE_SHIFT) -#define SFAFSR_IVUE_SHIFT 28 -#define SFAFSR_TO (_AC(1,UL) << SFAFSR_TO_SHIFT) -#define SFAFSR_TO_SHIFT 27 -#define SFAFSR_BERR (_AC(1,UL) << SFAFSR_BERR_SHIFT) -#define SFAFSR_BERR_SHIFT 26 -#define SFAFSR_LDP (_AC(1,UL) << SFAFSR_LDP_SHIFT) -#define SFAFSR_LDP_SHIFT 25 -#define SFAFSR_CP (_AC(1,UL) << SFAFSR_CP_SHIFT) -#define SFAFSR_CP_SHIFT 24 -#define SFAFSR_WP (_AC(1,UL) << SFAFSR_WP_SHIFT) -#define SFAFSR_WP_SHIFT 23 -#define SFAFSR_EDP (_AC(1,UL) << SFAFSR_EDP_SHIFT) -#define SFAFSR_EDP_SHIFT 22 -#define SFAFSR_UE (_AC(1,UL) << SFAFSR_UE_SHIFT) -#define SFAFSR_UE_SHIFT 21 -#define SFAFSR_CE (_AC(1,UL) << SFAFSR_CE_SHIFT) -#define SFAFSR_CE_SHIFT 20 -#define SFAFSR_ETS (_AC(0xf,UL) << SFAFSR_ETS_SHIFT) -#define SFAFSR_ETS_SHIFT 16 -#define SFAFSR_PSYND (_AC(0xffff,UL) << SFAFSR_PSYND_SHIFT) -#define SFAFSR_PSYND_SHIFT 0 - -/* UDB Error Register, ASI=0x7f VA<63:0>=0x0(High),0x18(Low) for read - * ASI=0x77 VA<63:0>=0x0(High),0x18(Low) for write - */ - -#define UDBE_UE (_AC(1,UL) << 9) -#define UDBE_CE (_AC(1,UL) << 8) -#define UDBE_E_SYNDR (_AC(0xff,UL) << 0) - -/* The trap handlers for asynchronous errors encode the AFSR and - * other pieces of information into a 64-bit argument for C code - * encoded as follows: - * - * ----------------------------------------------- - * | UDB_H | UDB_L | TL>1 | TT | AFSR | - * ----------------------------------------------- - * 63 54 53 44 42 41 33 32 0 - * - * The AFAR is passed in unchanged. - */ -#define SFSTAT_UDBH_MASK (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT) -#define SFSTAT_UDBH_SHIFT 54 -#define SFSTAT_UDBL_MASK (_AC(0x3ff,UL) << SFSTAT_UDBH_SHIFT) -#define SFSTAT_UDBL_SHIFT 44 -#define SFSTAT_TL_GT_ONE (_AC(1,UL) << SFSTAT_TL_GT_ONE_SHIFT) -#define SFSTAT_TL_GT_ONE_SHIFT 42 -#define SFSTAT_TRAP_TYPE (_AC(0x1FF,UL) << SFSTAT_TRAP_TYPE_SHIFT) -#define SFSTAT_TRAP_TYPE_SHIFT 33 -#define SFSTAT_AFSR_MASK (_AC(0x1ffffffff,UL) << SFSTAT_AFSR_SHIFT) -#define SFSTAT_AFSR_SHIFT 0 - -/* ESTATE Error Enable Register, ASI=0x4b VA<63:0>=0x0 */ -#define ESTATE_ERR_CE 0x1 /* Correctable errors */ -#define ESTATE_ERR_NCE 0x2 /* TO, BERR, LDP, ETP, EDP, WP, UE, IVUE */ -#define ESTATE_ERR_ISAP 0x4 /* System address parity error */ -#define ESTATE_ERR_ALL (ESTATE_ERR_CE | \ - ESTATE_ERR_NCE | \ - ESTATE_ERR_ISAP) - -/* The various trap types that report using the above state. */ -#define TRAP_TYPE_IAE 0x09 /* Instruction Access Error */ -#define TRAP_TYPE_DAE 0x32 /* Data Access Error */ -#define TRAP_TYPE_CEE 0x63 /* Correctable ECC Error */ - -#endif /* _SPARC64_SFAFSR_H */ diff --git a/include/asm-sparc/sfp-machine.h b/include/asm-sparc/sfp-machine.h deleted file mode 100644 index c676fcc..0000000 --- a/include/asm-sparc/sfp-machine.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SFP_MACHINE_H -#define ___ASM_SPARC_SFP_MACHINE_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/sfp-machine_32.h b/include/asm-sparc/sfp-machine_32.h deleted file mode 100644 index 01d9c3b..0000000 --- a/include/asm-sparc/sfp-machine_32.h +++ /dev/null @@ -1,212 +0,0 @@ -/* Machine-dependent software floating-point definitions. - Sparc userland (_Q_*) version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz), - David S. Miller (davem@redhat.com) and - Peter Maydell (pmaydell@chiark.greenend.org.uk). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - - -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -/* For _Qp_* and _Q_*, this should prefer X, for - * CPU instruction emulation this should prefer Y. - * (see SPAMv9 B.2.2 section). - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - else \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -/* Some assembly to speed things up. */ -#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ - __asm__ ("addcc %r7,%8,%2\n\t" \ - "addxcc %r5,%6,%1\n\t" \ - "addx %r3,%4,%0\n" \ - : "=r" ((USItype)(r2)), \ - "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc") - -#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ - __asm__ ("subcc %r7,%8,%2\n\t" \ - "subxcc %r5,%6,%1\n\t" \ - "subx %r3,%4,%0\n" \ - : "=r" ((USItype)(r2)), \ - "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc") - -#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ - do { \ - /* We need to fool gcc, as we need to pass more than 10 \ - input/outputs. */ \ - register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ - __asm__ __volatile__ ( \ - "addcc %r8,%9,%1\n\t" \ - "addxcc %r6,%7,%0\n\t" \ - "addxcc %r4,%5,%%g2\n\t" \ - "addx %r2,%3,%%g1\n\t" \ - : "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x3)), \ - "rI" ((USItype)(y3)), \ - "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc", "g1", "g2"); \ - __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ - r3 = _t1; r2 = _t2; \ - } while (0) - -#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ - do { \ - /* We need to fool gcc, as we need to pass more than 10 \ - input/outputs. */ \ - register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ - __asm__ __volatile__ ( \ - "subcc %r8,%9,%1\n\t" \ - "subxcc %r6,%7,%0\n\t" \ - "subxcc %r4,%5,%%g2\n\t" \ - "subx %r2,%3,%%g1\n\t" \ - : "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x3)), \ - "rI" ((USItype)(y3)), \ - "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc", "g1", "g2"); \ - __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ - r3 = _t1; r2 = _t2; \ - } while (0) - -#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) - -#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0) - -#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ - __asm__ ("addcc %3,%4,%3\n\t" \ - "addxcc %2,%%g0,%2\n\t" \ - "addxcc %1,%%g0,%1\n\t" \ - "addx %0,%%g0,%0\n\t" \ - : "=&r" ((USItype)(x3)), \ - "=&r" ((USItype)(x2)), \ - "=&r" ((USItype)(x1)), \ - "=&r" ((USItype)(x0)) \ - : "rI" ((USItype)(i)), \ - "0" ((USItype)(x3)), \ - "1" ((USItype)(x2)), \ - "2" ((USItype)(x1)), \ - "3" ((USItype)(x0)) \ - : "cc") - -#ifndef CONFIG_SMP -extern struct task_struct *last_task_used_math; -#endif - -/* Obtain the current rounding mode. */ -#ifndef FP_ROUNDMODE -#ifdef CONFIG_SMP -#define FP_ROUNDMODE ((current->thread.fsr >> 30) & 0x3) -#else -#define FP_ROUNDMODE ((last_task_used_math->thread.fsr >> 30) & 0x3) -#endif -#endif - -/* Exception flags. */ -#define FP_EX_INVALID (1 << 4) -#define FP_EX_OVERFLOW (1 << 3) -#define FP_EX_UNDERFLOW (1 << 2) -#define FP_EX_DIVZERO (1 << 1) -#define FP_EX_INEXACT (1 << 0) - -#define FP_HANDLE_EXCEPTIONS return _fex - -#ifdef CONFIG_SMP -#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex) -#else -#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex) -#endif - -#ifdef CONFIG_SMP -#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f) -#else -#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f) -#endif - -#endif diff --git a/include/asm-sparc/sfp-machine_64.h b/include/asm-sparc/sfp-machine_64.h deleted file mode 100644 index ca913ef..0000000 --- a/include/asm-sparc/sfp-machine_64.h +++ /dev/null @@ -1,93 +0,0 @@ -/* Machine-dependent software floating-point definitions. - Sparc64 kernel version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz) and - David S. Miller (davem@redhat.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - -#define _FP_W_TYPE_SIZE 64 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -/* For _Qp_* and _Q_*, this should prefer X, for - * CPU instruction emulation this should prefer Y. - * (see SPAMv9 B.2.2 section). - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - else \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -/* Obtain the current rounding mode. */ -#ifndef FP_ROUNDMODE -#define FP_ROUNDMODE ((current_thread_info()->xfsr[0] >> 30) & 0x3) -#endif - -/* Exception flags. */ -#define FP_EX_INVALID (1 << 4) -#define FP_EX_OVERFLOW (1 << 3) -#define FP_EX_UNDERFLOW (1 << 2) -#define FP_EX_DIVZERO (1 << 1) -#define FP_EX_INEXACT (1 << 0) - -#define FP_HANDLE_EXCEPTIONS return _fex - -#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex) - -#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f) - -#endif diff --git a/include/asm-sparc/shmbuf.h b/include/asm-sparc/shmbuf.h deleted file mode 100644 index 83a1605..0000000 --- a/include/asm-sparc/shmbuf.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef _SPARC_SHMBUF_H -#define _SPARC_SHMBUF_H - -/* - * The shmid64_ds structure for sparc architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -#if defined(__sparc__) && defined(__arch64__) -# define PADDING(x) -#else -# define PADDING(x) unsigned int x; -#endif - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - PADDING(__pad1) - __kernel_time_t shm_atime; /* last attach time */ - PADDING(__pad2) - __kernel_time_t shm_dtime; /* last detach time */ - PADDING(__pad3) - __kernel_time_t shm_ctime; /* last change time */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused1; - unsigned long __unused2; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#undef PADDING - -#endif /* _SPARC_SHMBUF_H */ diff --git a/include/asm-sparc/shmparam.h b/include/asm-sparc/shmparam.h deleted file mode 100644 index 16fda7e..0000000 --- a/include/asm-sparc/shmparam.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SHMPARAM_H -#define ___ASM_SPARC_SHMPARAM_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/shmparam_32.h b/include/asm-sparc/shmparam_32.h deleted file mode 100644 index 59a1243..0000000 --- a/include/asm-sparc/shmparam_32.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASMSPARC_SHMPARAM_H -#define _ASMSPARC_SHMPARAM_H - -#define __ARCH_FORCE_SHMLBA 1 - -extern int vac_cache_size; -#define SHMLBA (vac_cache_size ? vac_cache_size : \ - (sparc_cpu_model == sun4c ? (64 * 1024) : \ - (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE))) - -#endif /* _ASMSPARC_SHMPARAM_H */ diff --git a/include/asm-sparc/shmparam_64.h b/include/asm-sparc/shmparam_64.h deleted file mode 100644 index 1ed0d67..0000000 --- a/include/asm-sparc/shmparam_64.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _ASMSPARC64_SHMPARAM_H -#define _ASMSPARC64_SHMPARAM_H - -#include - -#define __ARCH_FORCE_SHMLBA 1 -/* attach addr a multiple of this */ -#define SHMLBA ((PAGE_SIZE > L1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE) - -#endif /* _ASMSPARC64_SHMPARAM_H */ diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h deleted file mode 100644 index 82fc7d5..0000000 --- a/include/asm-sparc/sigcontext.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SIGCONTEXT_H -#define ___ASM_SPARC_SIGCONTEXT_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/sigcontext_32.h b/include/asm-sparc/sigcontext_32.h deleted file mode 100644 index c5fb60d..0000000 --- a/include/asm-sparc/sigcontext_32.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __SPARC_SIGCONTEXT_H -#define __SPARC_SIGCONTEXT_H - -#ifdef __KERNEL__ -#include - -#ifndef __ASSEMBLY__ - -#define __SUNOS_MAXWIN 31 - -/* This is what SunOS does, so shall I. */ -struct sigcontext { - int sigc_onstack; /* state to restore */ - int sigc_mask; /* sigmask to restore */ - int sigc_sp; /* stack pointer */ - int sigc_pc; /* program counter */ - int sigc_npc; /* next program counter */ - int sigc_psr; /* for condition codes etc */ - int sigc_g1; /* User uses these two registers */ - int sigc_o0; /* within the trampoline code. */ - - /* Now comes information regarding the users window set - * at the time of the signal. - */ - int sigc_oswins; /* outstanding windows */ - - /* stack ptrs for each regwin buf */ - char *sigc_spbuf[__SUNOS_MAXWIN]; - - /* Windows to restore after signal */ - struct { - unsigned long locals[8]; - unsigned long ins[8]; - } sigc_wbuf[__SUNOS_MAXWIN]; -}; - -typedef struct { - struct { - unsigned long psr; - unsigned long pc; - unsigned long npc; - unsigned long y; - unsigned long u_regs[16]; /* globals and ins */ - } si_regs; - int si_mask; -} __siginfo_t; - -typedef struct { - unsigned long si_float_regs [32]; - unsigned long si_fsr; - unsigned long si_fpqdepth; - struct { - unsigned long *insn_addr; - unsigned long insn; - } si_fpqueue [16]; -} __siginfo_fpu_t; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* (__KERNEL__) */ - -#endif /* !(__SPARC_SIGCONTEXT_H) */ diff --git a/include/asm-sparc/sigcontext_64.h b/include/asm-sparc/sigcontext_64.h deleted file mode 100644 index 1c868d6..0000000 --- a/include/asm-sparc/sigcontext_64.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef __SPARC64_SIGCONTEXT_H -#define __SPARC64_SIGCONTEXT_H - -#ifdef __KERNEL__ -#include -#endif - -#ifndef __ASSEMBLY__ - -#ifdef __KERNEL__ - -#define __SUNOS_MAXWIN 31 - -/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */ -struct sigcontext32 { - int sigc_onstack; /* state to restore */ - int sigc_mask; /* sigmask to restore */ - int sigc_sp; /* stack pointer */ - int sigc_pc; /* program counter */ - int sigc_npc; /* next program counter */ - int sigc_psr; /* for condition codes etc */ - int sigc_g1; /* User uses these two registers */ - int sigc_o0; /* within the trampoline code. */ - - /* Now comes information regarding the users window set - * at the time of the signal. - */ - int sigc_oswins; /* outstanding windows */ - - /* stack ptrs for each regwin buf */ - unsigned sigc_spbuf[__SUNOS_MAXWIN]; - - /* Windows to restore after signal */ - struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN]; -}; - -#endif - -#ifdef __KERNEL__ - -/* This is what we use for 32bit new non-rt signals. */ - -typedef struct { - struct { - unsigned int psr; - unsigned int pc; - unsigned int npc; - unsigned int y; - unsigned int u_regs[16]; /* globals and ins */ - } si_regs; - int si_mask; -} __siginfo32_t; - -#endif - -typedef struct { - unsigned int si_float_regs [64]; - unsigned long si_fsr; - unsigned long si_gsr; - unsigned long si_fprs; -} __siginfo_fpu_t; - -/* This is what SunOS doesn't, so we have to write this alone - and do it properly. */ -struct sigcontext { - /* The size of this array has to match SI_MAX_SIZE from siginfo.h */ - char sigc_info[128]; - struct { - unsigned long u_regs[16]; /* globals and ins */ - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned int y; - unsigned int fprs; - } sigc_regs; - __siginfo_fpu_t * sigc_fpu_save; - struct { - void * ss_sp; - int ss_flags; - unsigned long ss_size; - } sigc_stack; - unsigned long sigc_mask; -}; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_SIGCONTEXT_H) */ diff --git a/include/asm-sparc/siginfo.h b/include/asm-sparc/siginfo.h deleted file mode 100644 index 2c9fccf..0000000 --- a/include/asm-sparc/siginfo.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SIGINFO_H -#define ___ASM_SPARC_SIGINFO_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/siginfo_32.h b/include/asm-sparc/siginfo_32.h deleted file mode 100644 index 3c71af1..0000000 --- a/include/asm-sparc/siginfo_32.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _SPARC_SIGINFO_H -#define _SPARC_SIGINFO_H - -#define __ARCH_SI_UID_T unsigned int -#define __ARCH_SI_TRAPNO - -#include - -#define SI_NOINFO 32767 /* no information in siginfo_t */ - -/* - * SIGEMT si_codes - */ -#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ -#define NSIGEMT 1 - -#endif /* !(_SPARC_SIGINFO_H) */ diff --git a/include/asm-sparc/siginfo_64.h b/include/asm-sparc/siginfo_64.h deleted file mode 100644 index c96e6c3..0000000 --- a/include/asm-sparc/siginfo_64.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _SPARC64_SIGINFO_H -#define _SPARC64_SIGINFO_H - -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) - -#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) -#define __ARCH_SI_TRAPNO -#define __ARCH_SI_BAND_T int - -#include - -#ifdef __KERNEL__ - -#include - -#ifdef CONFIG_COMPAT - -struct compat_siginfo; - -#endif /* CONFIG_COMPAT */ - -#endif /* __KERNEL__ */ - -#define SI_NOINFO 32767 /* no information in siginfo_t */ - -/* - * SIGEMT si_codes - */ -#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ -#define NSIGEMT 1 - -#endif diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h deleted file mode 100644 index 36f5f9e..0000000 --- a/include/asm-sparc/signal.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SIGNAL_H -#define ___ASM_SPARC_SIGNAL_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/signal_32.h b/include/asm-sparc/signal_32.h deleted file mode 100644 index 96a60ab..0000000 --- a/include/asm-sparc/signal_32.h +++ /dev/null @@ -1,207 +0,0 @@ -#ifndef _ASMSPARC_SIGNAL_H -#define _ASMSPARC_SIGNAL_H - -#include -#include - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#include -#include -#endif -#endif - -/* On the Sparc the signal handlers get passed a 'sub-signal' code - * for certain signal types, which we document here. - */ -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SUBSIG_STACK 0 -#define SUBSIG_ILLINST 2 -#define SUBSIG_PRIVINST 3 -#define SUBSIG_BADTRAP(t) (0x80 + (t)) - -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 - -#define SIGEMT 7 -#define SUBSIG_TAG 10 - -#define SIGFPE 8 -#define SUBSIG_FPDISABLED 0x400 -#define SUBSIG_FPERROR 0x404 -#define SUBSIG_FPINTOVFL 0x001 -#define SUBSIG_FPSTSIG 0x002 -#define SUBSIG_IDIVZERO 0x014 -#define SUBSIG_FPINEXACT 0x0c4 -#define SUBSIG_FPDIVZERO 0x0c8 -#define SUBSIG_FPUNFLOW 0x0cc -#define SUBSIG_FPOPERROR 0x0d0 -#define SUBSIG_FPOVFLOW 0x0d4 - -#define SIGKILL 9 -#define SIGBUS 10 -#define SUBSIG_BUSTIMEOUT 1 -#define SUBSIG_ALIGNMENT 2 -#define SUBSIG_MISCERROR 5 - -#define SIGSEGV 11 -#define SUBSIG_NOMAPPING 3 -#define SUBSIG_PROTECTION 4 -#define SUBSIG_SEGERROR 5 - -#define SIGSYS 12 - -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGURG 16 - -/* SunOS values which deviate from the Linux/i386 ones */ -#define SIGSTOP 17 -#define SIGTSTP 18 -#define SIGCONT 19 -#define SIGCHLD 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGIO 23 -#define SIGPOLL SIGIO /* SysV name for SIGIO */ -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGLOST 29 -#define SIGPWR SIGLOST -#define SIGUSR1 30 -#define SIGUSR2 31 - -/* Most things should be clean enough to redefine this at will, if care - * is taken to make libc match. - */ - -#define __OLD_NSIG 32 -#define __NEW_NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) - -#define SIGRTMIN 32 -#define SIGRTMAX __NEW_NSIG - -#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) -#define _NSIG __NEW_NSIG -#define __new_sigset_t sigset_t -#define __new_sigaction sigaction -#define __old_sigset_t old_sigset_t -#define __old_sigaction old_sigaction -#else -#define _NSIG __OLD_NSIG -#define __old_sigset_t sigset_t -#define __old_sigaction sigaction -#endif - -#ifndef __ASSEMBLY__ - -typedef unsigned long __old_sigset_t; - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} __new_sigset_t; - - -#ifdef __KERNEL__ -/* A SunOS sigstack */ -struct sigstack { - char *the_stack; - int cur_status; -}; -#endif - -/* Sigvec flags */ -#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ -#define _SV_INTR 2u /* Sig return should not restart system call */ -#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ -#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ - -/* - * sa_flags values: SA_STACK is not currently supported, but will allow the - * usage of signal stacks by using the (now obsolete) sa_restorer field in - * the sigaction structure as a stack pointer. This is now possible due to - * the changes in signal handling. LBT 010493. - * SA_RESTART flag to get restarting signals (which were the default long ago) - */ -#define SA_NOCLDSTOP _SV_IGNCHILD -#define SA_STACK _SV_SSTACK -#define SA_ONSTACK _SV_SSTACK -#define SA_RESTART _SV_INTR -#define SA_ONESHOT _SV_RESET -#define SA_NOMASK 0x20u -#define SA_NOCLDWAIT 0x100u -#define SA_SIGINFO 0x200u - -#define SIG_BLOCK 0x01 /* for blocking signals */ -#define SIG_UNBLOCK 0x02 /* for unblocking signals */ -#define SIG_SETMASK 0x04 /* for setting the signal mask */ - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 4096 -#define SIGSTKSZ 16384 - -#ifdef __KERNEL__ -/* - * DJHR - * SA_STATIC_ALLOC is used for the SPARC system to indicate that this - * interrupt handler's irq structure should be statically allocated - * by the request_irq routine. - * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge - * of interrupt usage and that sucks. Also without a flag like this - * it may be possible for the free_irq routine to attempt to free - * statically allocated data.. which is NOT GOOD. - * - */ -#define SA_STATIC_ALLOC 0x8000 -#endif - -#include - -#ifdef __KERNEL__ -struct __new_sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); /* Not used by Linux/SPARC */ - __new_sigset_t sa_mask; -}; - -struct k_sigaction { - struct __new_sigaction sa; - void __user *ka_restorer; -}; - -struct __old_sigaction { - __sighandler_t sa_handler; - __old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer) (void); /* not used by Linux/SPARC */ -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* !(__KERNEL__) */ - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_ASMSPARC_SIGNAL_H) */ diff --git a/include/asm-sparc/signal_64.h b/include/asm-sparc/signal_64.h deleted file mode 100644 index ab1509a..0000000 --- a/include/asm-sparc/signal_64.h +++ /dev/null @@ -1,194 +0,0 @@ -#ifndef _ASMSPARC64_SIGNAL_H -#define _ASMSPARC64_SIGNAL_H - -#include - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#include -#include -#endif -#endif - -/* On the Sparc the signal handlers get passed a 'sub-signal' code - * for certain signal types, which we document here. - */ -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SUBSIG_STACK 0 -#define SUBSIG_ILLINST 2 -#define SUBSIG_PRIVINST 3 -#define SUBSIG_BADTRAP(t) (0x80 + (t)) - -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 - -#define SIGEMT 7 -#define SUBSIG_TAG 10 - -#define SIGFPE 8 -#define SUBSIG_FPDISABLED 0x400 -#define SUBSIG_FPERROR 0x404 -#define SUBSIG_FPINTOVFL 0x001 -#define SUBSIG_FPSTSIG 0x002 -#define SUBSIG_IDIVZERO 0x014 -#define SUBSIG_FPINEXACT 0x0c4 -#define SUBSIG_FPDIVZERO 0x0c8 -#define SUBSIG_FPUNFLOW 0x0cc -#define SUBSIG_FPOPERROR 0x0d0 -#define SUBSIG_FPOVFLOW 0x0d4 - -#define SIGKILL 9 -#define SIGBUS 10 -#define SUBSIG_BUSTIMEOUT 1 -#define SUBSIG_ALIGNMENT 2 -#define SUBSIG_MISCERROR 5 - -#define SIGSEGV 11 -#define SUBSIG_NOMAPPING 3 -#define SUBSIG_PROTECTION 4 -#define SUBSIG_SEGERROR 5 - -#define SIGSYS 12 - -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGURG 16 - -/* SunOS values which deviate from the Linux/i386 ones */ -#define SIGSTOP 17 -#define SIGTSTP 18 -#define SIGCONT 19 -#define SIGCHLD 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGIO 23 -#define SIGPOLL SIGIO /* SysV name for SIGIO */ -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGLOST 29 -#define SIGPWR SIGLOST -#define SIGUSR1 30 -#define SIGUSR2 31 - -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define __OLD_NSIG 32 -#define __NEW_NSIG 64 -#define _NSIG_BPW 64 -#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) - -#define SIGRTMIN 32 -#define SIGRTMAX __NEW_NSIG - -#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) -#define _NSIG __NEW_NSIG -#define __new_sigset_t sigset_t -#define __new_sigaction sigaction -#define __new_sigaction32 sigaction32 -#define __old_sigset_t old_sigset_t -#define __old_sigaction old_sigaction -#define __old_sigaction32 old_sigaction32 -#else -#define _NSIG __OLD_NSIG -#define NSIG _NSIG -#define __old_sigset_t sigset_t -#define __old_sigaction sigaction -#define __old_sigaction32 sigaction32 -#endif - -#ifndef __ASSEMBLY__ - -typedef unsigned long __old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} __new_sigset_t; - -/* A SunOS sigstack */ -struct sigstack { - /* XXX 32-bit pointers pinhead XXX */ - char *the_stack; - int cur_status; -}; - -/* Sigvec flags */ -#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ -#define _SV_INTR 2u /* Sig return should not restart system call */ -#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ -#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ - -/* - * sa_flags values: SA_STACK is not currently supported, but will allow the - * usage of signal stacks by using the (now obsolete) sa_restorer field in - * the sigaction structure as a stack pointer. This is now possible due to - * the changes in signal handling. LBT 010493. - * SA_RESTART flag to get restarting signals (which were the default long ago) - */ -#define SA_NOCLDSTOP _SV_IGNCHILD -#define SA_STACK _SV_SSTACK -#define SA_ONSTACK _SV_SSTACK -#define SA_RESTART _SV_INTR -#define SA_ONESHOT _SV_RESET -#define SA_NOMASK 0x20u -#define SA_NOCLDWAIT 0x100u -#define SA_SIGINFO 0x200u - - -#define SIG_BLOCK 0x01 /* for blocking signals */ -#define SIG_UNBLOCK 0x02 /* for unblocking signals */ -#define SIG_SETMASK 0x04 /* for setting the signal mask */ - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 4096 -#define SIGSTKSZ 16384 - -#include - -struct __new_sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; /* not used by Linux/SPARC yet */ - __new_sigset_t sa_mask; -}; - -struct __old_sigaction { - __sighandler_t sa_handler; - __old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); /* not used by Linux/SPARC yet */ -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - -struct k_sigaction { - struct __new_sigaction sa; - void __user *ka_restorer; -}; - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* !(__KERNEL__) */ - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_ASMSPARC64_SIGNAL_H) */ diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h deleted file mode 100644 index 1f9dedf..0000000 --- a/include/asm-sparc/smp.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SMP_H -#define ___ASM_SPARC_SMP_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/smp_32.h b/include/asm-sparc/smp_32.h deleted file mode 100644 index 7201752..0000000 --- a/include/asm-sparc/smp_32.h +++ /dev/null @@ -1,173 +0,0 @@ -/* smp.h: Sparc specific SMP stuff. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SMP_H -#define _SPARC_SMP_H - -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_SMP - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -/* - * Private routines/data - */ - -extern unsigned char boot_cpu_id; -extern cpumask_t phys_cpu_present_map; -#define cpu_possible_map phys_cpu_present_map - -typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long); - -/* - * General functions that each host system must provide. - */ - -void sun4m_init_smp(void); -void sun4d_init_smp(void); - -void smp_callin(void); -void smp_boot_cpus(void); -void smp_store_cpu_info(int); - -struct seq_file; -void smp_bogo(struct seq_file *); -void smp_info(struct seq_file *); - -BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) -BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) -BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) -BTFIXUPDEF_BLACKBOX(load_current) - -#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) - -static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } -static inline void xc1(smpfunc_t func, unsigned long arg1) -{ smp_cross_call(func, arg1, 0, 0, 0, 0); } -static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) -{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } -static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3) -{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } -static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4) -{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } -static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, unsigned long arg5) -{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } - -static inline int smp_call_function(void (*func)(void *info), void *info, int wait) -{ - xc1((smpfunc_t)func, (unsigned long)info); - return 0; -} - -static inline int cpu_logical_map(int cpu) -{ - return cpu; -} - -static inline int hard_smp4m_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("rd %%tbr, %0\n\t" - "srl %0, 12, %0\n\t" - "and %0, 3, %0\n\t" : - "=&r" (cpuid)); - return cpuid; -} - -static inline int hard_smp4d_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : - "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1)); - return cpuid; -} - -#ifndef MODULE -static inline int hard_smp_processor_id(void) -{ - int cpuid; - - /* Black box - sun4m - __asm__ __volatile__("rd %%tbr, %0\n\t" - "srl %0, 12, %0\n\t" - "and %0, 3, %0\n\t" : - "=&r" (cpuid)); - - sun4d - __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t" - "nop; nop" : - "=&r" (cpuid)); - See btfixup.h and btfixupprep.c to understand how a blackbox works. - */ - __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t" - "sethi %%hi(boot_cpu_id), %0\n\t" - "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" : - "=&r" (cpuid)); - return cpuid; -} -#else -static inline int hard_smp_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("mov %%o7, %%g1\n\t" - "call ___f___hard_smp_processor_id\n\t" - " nop\n\t" - "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2"); - return cpuid; -} -#endif - -#define raw_smp_processor_id() (current_thread_info()->cpu) - -#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier -#define prof_counter(__cpu) cpu_data(__cpu).counter - -void smp_setup_cpu_possible_map(void); - -#endif /* !(__ASSEMBLY__) */ - -/* Sparc specific messages. */ -#define MSG_CROSS_CALL 0x0005 /* run func on cpus */ - -/* Empirical PROM processor mailbox constants. If the per-cpu mailbox - * contains something other than one of these then the ipi is from - * Linux's active_kernel_processor. This facility exists so that - * the boot monitor can capture all the other cpus when one catches - * a watchdog reset or the user enters the monitor using L1-A keys. - */ -#define MBOX_STOPCPU 0xFB -#define MBOX_IDLECPU 0xFC -#define MBOX_IDLECPU2 0xFD -#define MBOX_STOPCPU2 0xFE - -#else /* SMP */ - -#define hard_smp_processor_id() 0 -#define smp_setup_cpu_possible_map() do { } while (0) - -#endif /* !(SMP) */ - -#define NO_PROC_ID 0xFF - -#endif /* !(_SPARC_SMP_H) */ diff --git a/include/asm-sparc/smp_64.h b/include/asm-sparc/smp_64.h deleted file mode 100644 index 57224dd..0000000 --- a/include/asm-sparc/smp_64.h +++ /dev/null @@ -1,67 +0,0 @@ -/* smp.h: Sparc64 specific SMP stuff. - * - * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_SMP_H -#define _SPARC64_SMP_H - -#include -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include -#include - -#endif /* !(__ASSEMBLY__) */ - -#ifdef CONFIG_SMP - -#ifndef __ASSEMBLY__ - -/* - * Private routines/data - */ - -#include -#include -#include - -DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); -extern cpumask_t cpu_core_map[NR_CPUS]; -extern int sparc64_multi_core; - -extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); - -/* - * General functions that each host system must provide. - */ - -extern int hard_smp_processor_id(void); -#define raw_smp_processor_id() (current_thread_info()->cpu) - -extern void smp_fill_in_sib_core_maps(void); -extern void cpu_play_dead(void); - -extern void smp_fetch_global_regs(void); - -#ifdef CONFIG_HOTPLUG_CPU -extern int __cpu_disable(void); -extern void __cpu_die(unsigned int cpu); -#endif - -#endif /* !(__ASSEMBLY__) */ - -#else - -#define hard_smp_processor_id() 0 -#define smp_fill_in_sib_core_maps() do { } while (0) -#define smp_fetch_global_regs() do { } while (0) - -#endif /* !(CONFIG_SMP) */ - -#endif /* !(_SPARC64_SMP_H) */ diff --git a/include/asm-sparc/smpprim.h b/include/asm-sparc/smpprim.h deleted file mode 100644 index eb849d8..0000000 --- a/include/asm-sparc/smpprim.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * smpprim.h: SMP locking primitives on the Sparc - * - * God knows we won't be actually using this code for some time - * but I thought I'd write it since I knew how. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC_SMPPRIM_H -#define __SPARC_SMPPRIM_H - -/* Test and set the unsigned byte at ADDR to 1. Returns the previous - * value. On the Sparc we use the ldstub instruction since it is - * atomic. - */ - -static inline __volatile__ char test_and_set(void *addr) -{ - char state = 0; - - __asm__ __volatile__("ldstub [%0], %1 ! test_and_set\n\t" - "=r" (addr), "=r" (state) : - "0" (addr), "1" (state) : "memory"); - - return state; -} - -/* Initialize a spin-lock. */ -static inline __volatile__ smp_initlock(void *spinlock) -{ - /* Unset the lock. */ - *((unsigned char *) spinlock) = 0; - - return; -} - -/* This routine spins until it acquires the lock at ADDR. */ -static inline __volatile__ smp_lock(void *addr) -{ - while(test_and_set(addr) == 0xff) - ; - - /* We now have the lock */ - return; -} - -/* This routine releases the lock at ADDR. */ -static inline __volatile__ smp_unlock(void *addr) -{ - *((unsigned char *) addr) = 0; -} - -#endif /* !(__SPARC_SMPPRIM_H) */ diff --git a/include/asm-sparc/socket.h b/include/asm-sparc/socket.h deleted file mode 100644 index bf50d0c..0000000 --- a/include/asm-sparc/socket.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef _ASM_SOCKET_H -#define _ASM_SOCKET_H - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 0xffff - -#define SO_DEBUG 0x0001 -#define SO_PASSCRED 0x0002 -#define SO_REUSEADDR 0x0004 -#define SO_KEEPALIVE 0x0008 -#define SO_DONTROUTE 0x0010 -#define SO_BROADCAST 0x0020 -#define SO_PEERCRED 0x0040 -#define SO_LINGER 0x0080 -#define SO_OOBINLINE 0x0100 -/* To add :#define SO_REUSEPORT 0x0200 */ -#define SO_BSDCOMPAT 0x0400 -#define SO_RCVLOWAT 0x0800 -#define SO_SNDLOWAT 0x1000 -#define SO_RCVTIMEO 0x2000 -#define SO_SNDTIMEO 0x4000 -#define SO_ACCEPTCONN 0x8000 - -#define SO_SNDBUF 0x1001 -#define SO_RCVBUF 0x1002 -#define SO_SNDBUFFORCE 0x100a -#define SO_RCVBUFFORCE 0x100b -#define SO_ERROR 0x1007 -#define SO_TYPE 0x1008 - -/* Linux specific, keep the same. */ -#define SO_NO_CHECK 0x000b -#define SO_PRIORITY 0x000c - -#define SO_BINDTODEVICE 0x000d - -#define SO_ATTACH_FILTER 0x001a -#define SO_DETACH_FILTER 0x001b - -#define SO_PEERNAME 0x001c -#define SO_TIMESTAMP 0x001d -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_PEERSEC 0x001e -#define SO_PASSSEC 0x001f -#define SO_TIMESTAMPNS 0x0021 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 0x0022 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 0x5001 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 0x5002 -#define SO_SECURITY_ENCRYPTION_NETWORK 0x5004 - -#endif /* _ASM_SOCKET_H */ diff --git a/include/asm-sparc/sockios.h b/include/asm-sparc/sockios.h deleted file mode 100644 index 990ea74..0000000 --- a/include/asm-sparc/sockios.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _ASM_SPARC_SOCKIOS_H -#define _ASM_SPARC_SOCKIOS_H - -/* Socket-level I/O control calls. */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif /* !(_ASM_SPARC_SOCKIOS_H) */ - diff --git a/include/asm-sparc/sparsemem.h b/include/asm-sparc/sparsemem.h deleted file mode 100644 index b99d4e4..0000000 --- a/include/asm-sparc/sparsemem.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _SPARC64_SPARSEMEM_H -#define _SPARC64_SPARSEMEM_H - -#ifdef __KERNEL__ - -#define SECTION_SIZE_BITS 30 -#define MAX_PHYSADDR_BITS 42 -#define MAX_PHYSMEM_BITS 42 - -#endif /* !(__KERNEL__) */ - -#endif /* !(_SPARC64_SPARSEMEM_H) */ diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h deleted file mode 100644 index 3b71c50..0000000 --- a/include/asm-sparc/spinlock.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SPINLOCK_H -#define ___ASM_SPARC_SPINLOCK_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/spinlock_32.h b/include/asm-sparc/spinlock_32.h deleted file mode 100644 index de2249b..0000000 --- a/include/asm-sparc/spinlock_32.h +++ /dev/null @@ -1,192 +0,0 @@ -/* spinlock.h: 32-bit Sparc spinlock support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC_SPINLOCK_H -#define __SPARC_SPINLOCK_H - -#include /* For NR_CPUS */ - -#ifndef __ASSEMBLY__ - -#include - -#define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) - -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - __asm__ __volatile__( - "\n1:\n\t" - "ldstub [%0], %%g2\n\t" - "orcc %%g2, 0x0, %%g0\n\t" - "bne,a 2f\n\t" - " ldub [%0], %%g2\n\t" - ".subsection 2\n" - "2:\n\t" - "orcc %%g2, 0x0, %%g0\n\t" - "bne,a 2b\n\t" - " ldub [%0], %%g2\n\t" - "b,a 1b\n\t" - ".previous\n" - : /* no outputs */ - : "r" (lock) - : "g2", "memory", "cc"); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned int result; - __asm__ __volatile__("ldstub [%1], %0" - : "=r" (result) - : "r" (lock) - : "memory"); - return (result == 0); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); -} - -/* Read-write spinlocks, allowing multiple readers - * but only one writer. - * - * NOTE! it is quite common to have readers in interrupts - * but no interrupt writers. For those circumstances we - * can "mix" irq-safe locks - any writer needs to get a - * irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - * - * XXX This might create some problems with my dual spinlock - * XXX scheme, deadlocks etc. -DaveM - * - * Sort of like atomic_t's on Sparc, but even more clever. - * - * ------------------------------------ - * | 24-bit counter | wlock | raw_rwlock_t - * ------------------------------------ - * 31 8 7 0 - * - * wlock signifies the one writer is in or somebody is updating - * counter. For a writer, if he successfully acquires the wlock, - * but counter is non-zero, he has to release the lock and wait, - * till both counter and wlock are zero. - * - * Unfortunately this scheme limits us to ~16,000,000 cpus. - */ -static inline void __read_lock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_enter\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); -} - -#define __raw_read_lock(lock) \ -do { unsigned long flags; \ - local_irq_save(flags); \ - __read_lock(lock); \ - local_irq_restore(flags); \ -} while(0) - -static inline void __read_unlock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_exit\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); -} - -#define __raw_read_unlock(lock) \ -do { unsigned long flags; \ - local_irq_save(flags); \ - __read_unlock(lock); \ - local_irq_restore(flags); \ -} while(0) - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_write_enter\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); - *(volatile __u32 *)&lp->lock = ~0U; -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - unsigned int val; - - __asm__ __volatile__("ldstub [%1 + 3], %0" - : "=r" (val) - : "r" (&rw->lock) - : "memory"); - - if (val == 0) { - val = rw->lock & ~0xff; - if (val) - ((volatile u8*)&rw->lock)[3] = 0; - else - *(volatile u32*)&rw->lock = ~0U; - } - - return (val == 0); -} - -static inline int __read_trylock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - register int res asm("o0"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_try\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : "=r" (res) - : "r" (lp) - : "g2", "g4", "memory", "cc"); - return res; -} - -#define __raw_read_trylock(lock) \ -({ unsigned long flags; \ - int res; \ - local_irq_save(flags); \ - res = __read_trylock(lock); \ - local_irq_restore(flags); \ - res; \ -}) - -#define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) - -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) -#define __raw_write_can_lock(rw) (!(rw)->lock) - -#endif /* !(__ASSEMBLY__) */ - -#endif /* __SPARC_SPINLOCK_H */ diff --git a/include/asm-sparc/spinlock_64.h b/include/asm-sparc/spinlock_64.h deleted file mode 100644 index 0006fe9..0000000 --- a/include/asm-sparc/spinlock_64.h +++ /dev/null @@ -1,250 +0,0 @@ -/* spinlock.h: 64-bit Sparc spinlock support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC64_SPINLOCK_H -#define __SPARC64_SPINLOCK_H - -#include /* For NR_CPUS */ - -#ifndef __ASSEMBLY__ - -/* To get debugging spinlocks which detect and catch - * deadlock situations, set CONFIG_DEBUG_SPINLOCK - * and rebuild your kernel. - */ - -/* All of these locking primitives are expected to work properly - * even in an RMO memory model, which currently is what the kernel - * runs in. - * - * There is another issue. Because we play games to save cycles - * in the non-contention case, we need to be extra careful about - * branch targets into the "spinning" code. They live in their - * own section, but the newer V9 branches have a shorter range - * than the traditional 32-bit sparc branch variants. The rule - * is that the branches that go into and out of the spinner sections - * must be pre-V9 branches. - */ - -#define __raw_spin_is_locked(lp) ((lp)->lock != 0) - -#define __raw_spin_unlock_wait(lp) \ - do { rmb(); \ - } while((lp)->lock) - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldstub [%1], %0\n" -" membar #StoreLoad | #StoreStore\n" -" brnz,pn %0, 2f\n" -" nop\n" -" .subsection 2\n" -"2: ldub [%1], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 1b\n" -" .previous" - : "=&r" (tmp) - : "r" (lock) - : "memory"); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned long result; - - __asm__ __volatile__( -" ldstub [%1], %0\n" -" membar #StoreLoad | #StoreStore" - : "=r" (result) - : "r" (lock) - : "memory"); - - return (result == 0UL); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - __asm__ __volatile__( -" membar #StoreStore | #LoadStore\n" -" stb %%g0, [%0]" - : /* No outputs */ - : "r" (lock) - : "memory"); -} - -static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -"1: ldstub [%2], %0\n" -" membar #StoreLoad | #StoreStore\n" -" brnz,pn %0, 2f\n" -" nop\n" -" .subsection 2\n" -"2: rdpr %%pil, %1\n" -" wrpr %3, %%pil\n" -"3: ldub [%2], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 3b\n" -" nop\n" -" ba,pt %%xcc, 1b\n" -" wrpr %1, %%pil\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r"(lock), "r"(flags) - : "memory"); -} - -/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */ - -static void inline __read_lock(raw_rwlock_t *lock) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__ ( -"1: ldsw [%2], %0\n" -" brlz,pn %0, 2f\n" -"4: add %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" .subsection 2\n" -"2: ldsw [%2], %0\n" -" membar #LoadLoad\n" -" brlz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 4b\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); -} - -static int inline __read_trylock(raw_rwlock_t *lock) -{ - int tmp1, tmp2; - - __asm__ __volatile__ ( -"1: ldsw [%2], %0\n" -" brlz,a,pn %0, 2f\n" -" mov 0, %0\n" -" add %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" mov 1, %0\n" -"2:" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); - - return tmp1; -} - -static void inline __read_unlock(raw_rwlock_t *lock) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -"1: lduw [%2], %0\n" -" sub %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" bne,pn %%xcc, 1b\n" -" nop" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); -} - -static void inline __write_lock(raw_rwlock_t *lock) -{ - unsigned long mask, tmp1, tmp2; - - mask = 0x80000000UL; - - __asm__ __volatile__( -"1: lduw [%2], %0\n" -" brnz,pn %0, 2f\n" -"4: or %0, %3, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" .subsection 2\n" -"2: lduw [%2], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 4b\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock), "r" (mask) - : "memory"); -} - -static void inline __write_unlock(raw_rwlock_t *lock) -{ - __asm__ __volatile__( -" membar #LoadStore | #StoreStore\n" -" stw %%g0, [%0]" - : /* no outputs */ - : "r" (lock) - : "memory"); -} - -static int inline __write_trylock(raw_rwlock_t *lock) -{ - unsigned long mask, tmp1, tmp2, result; - - mask = 0x80000000UL; - - __asm__ __volatile__( -" mov 0, %2\n" -"1: lduw [%3], %0\n" -" brnz,pn %0, 2f\n" -" or %0, %4, %1\n" -" cas [%3], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" mov 1, %2\n" -"2:" - : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result) - : "r" (lock), "r" (mask) - : "memory"); - - return result; -} - -#define __raw_read_lock(p) __read_lock(p) -#define __raw_read_trylock(p) __read_trylock(p) -#define __raw_read_unlock(p) __read_unlock(p) -#define __raw_write_lock(p) __write_lock(p) -#define __raw_write_unlock(p) __write_unlock(p) -#define __raw_write_trylock(p) __write_trylock(p) - -#define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) -#define __raw_write_can_lock(rw) (!(rw)->lock) - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_SPINLOCK_H) */ diff --git a/include/asm-sparc/spinlock_types.h b/include/asm-sparc/spinlock_types.h deleted file mode 100644 index 37cbe01..0000000 --- a/include/asm-sparc/spinlock_types.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __SPARC_SPINLOCK_TYPES_H -#define __SPARC_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned char lock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile unsigned int lock; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0 } - -#endif diff --git a/include/asm-sparc/spitfire.h b/include/asm-sparc/spitfire.h deleted file mode 100644 index 985ea7e..0000000 --- a/include/asm-sparc/spitfire.h +++ /dev/null @@ -1,342 +0,0 @@ -/* spitfire.h: SpitFire/BlackBird/Cheetah inline MMU operations. - * - * Copyright (C) 1996 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_SPITFIRE_H -#define _SPARC64_SPITFIRE_H - -#include - -/* The following register addresses are accessible via ASI_DMMU - * and ASI_IMMU, that is there is a distinct and unique copy of - * each these registers for each TLB. - */ -#define TSB_TAG_TARGET 0x0000000000000000 /* All chips */ -#define TLB_SFSR 0x0000000000000018 /* All chips */ -#define TSB_REG 0x0000000000000028 /* All chips */ -#define TLB_TAG_ACCESS 0x0000000000000030 /* All chips */ -#define VIRT_WATCHPOINT 0x0000000000000038 /* All chips */ -#define PHYS_WATCHPOINT 0x0000000000000040 /* All chips */ -#define TSB_EXTENSION_P 0x0000000000000048 /* Ultra-III and later */ -#define TSB_EXTENSION_S 0x0000000000000050 /* Ultra-III and later, D-TLB only */ -#define TSB_EXTENSION_N 0x0000000000000058 /* Ultra-III and later */ -#define TLB_TAG_ACCESS_EXT 0x0000000000000060 /* Ultra-III+ and later */ - -/* These registers only exist as one entity, and are accessed - * via ASI_DMMU only. - */ -#define PRIMARY_CONTEXT 0x0000000000000008 -#define SECONDARY_CONTEXT 0x0000000000000010 -#define DMMU_SFAR 0x0000000000000020 -#define VIRT_WATCHPOINT 0x0000000000000038 -#define PHYS_WATCHPOINT 0x0000000000000040 - -#define SPITFIRE_HIGHEST_LOCKED_TLBENT (64 - 1) -#define CHEETAH_HIGHEST_LOCKED_TLBENT (16 - 1) - -#define L1DCACHE_SIZE 0x4000 - -#define SUN4V_CHIP_INVALID 0x00 -#define SUN4V_CHIP_NIAGARA1 0x01 -#define SUN4V_CHIP_NIAGARA2 0x02 -#define SUN4V_CHIP_UNKNOWN 0xff - -#ifndef __ASSEMBLY__ - -enum ultra_tlb_layout { - spitfire = 0, - cheetah = 1, - cheetah_plus = 2, - hypervisor = 3, -}; - -extern enum ultra_tlb_layout tlb_type; - -extern int sun4v_chip_type; - -extern int cheetah_pcache_forced_on; -extern void cheetah_enable_pcache(void); - -#define sparc64_highest_locked_tlbent() \ - (tlb_type == spitfire ? \ - SPITFIRE_HIGHEST_LOCKED_TLBENT : \ - CHEETAH_HIGHEST_LOCKED_TLBENT) - -extern int num_kernel_image_mappings; - -/* The data cache is write through, so this just invalidates the - * specified line. - */ -static inline void spitfire_put_dcache_tag(unsigned long addr, unsigned long tag) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (tag), "r" (addr), "i" (ASI_DCACHE_TAG)); -} - -/* The instruction cache lines are flushed with this, but note that - * this does not flush the pipeline. It is possible for a line to - * get flushed but stale instructions to still be in the pipeline, - * a flush instruction (to any address) is sufficient to handle - * this issue after the line is invalidated. - */ -static inline void spitfire_put_icache_tag(unsigned long addr, unsigned long tag) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (tag), "r" (addr), "i" (ASI_IC_TAG)); -} - -static inline unsigned long spitfire_get_dtlb_data(int entry) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (data) - : "r" (entry << 3), "i" (ASI_DTLB_DATA_ACCESS)); - - /* Clear TTE diag bits. */ - data &= ~0x0003fe0000000000UL; - - return data; -} - -static inline unsigned long spitfire_get_dtlb_tag(int entry) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" (entry << 3), "i" (ASI_DTLB_TAG_READ)); - return tag; -} - -static inline void spitfire_put_dtlb_data(int entry, unsigned long data) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), "r" (entry << 3), - "i" (ASI_DTLB_DATA_ACCESS)); -} - -static inline unsigned long spitfire_get_itlb_data(int entry) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (data) - : "r" (entry << 3), "i" (ASI_ITLB_DATA_ACCESS)); - - /* Clear TTE diag bits. */ - data &= ~0x0003fe0000000000UL; - - return data; -} - -static inline unsigned long spitfire_get_itlb_tag(int entry) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" (entry << 3), "i" (ASI_ITLB_TAG_READ)); - return tag; -} - -static inline void spitfire_put_itlb_data(int entry, unsigned long data) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), "r" (entry << 3), - "i" (ASI_ITLB_DATA_ACCESS)); -} - -static inline void spitfire_flush_dtlb_nucleus_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page | 0x20), "i" (ASI_DMMU_DEMAP)); -} - -static inline void spitfire_flush_itlb_nucleus_page(unsigned long page) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (page | 0x20), "i" (ASI_IMMU_DEMAP)); -} - -/* Cheetah has "all non-locked" tlb flushes. */ -static inline void cheetah_flush_dtlb_all(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x80), "i" (ASI_DMMU_DEMAP)); -} - -static inline void cheetah_flush_itlb_all(void) -{ - __asm__ __volatile__("stxa %%g0, [%0] %1\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (0x80), "i" (ASI_IMMU_DEMAP)); -} - -/* Cheetah has a 4-tlb layout so direct access is a bit different. - * The first two TLBs are fully assosciative, hold 16 entries, and are - * used only for locked and >8K sized translations. One exists for - * data accesses and one for instruction accesses. - * - * The third TLB is for data accesses to 8K non-locked translations, is - * 2 way assosciative, and holds 512 entries. The fourth TLB is for - * instruction accesses to 8K non-locked translations, is 2 way - * assosciative, and holds 128 entries. - * - * Cheetah has some bug where bogus data can be returned from - * ASI_{D,I}TLB_DATA_ACCESS loads, doing the load twice fixes - * the problem for me. -DaveM - */ -static inline unsigned long cheetah_get_ldtlb_data(int entry) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" - "ldxa [%1] %2, %0" - : "=r" (data) - : "r" ((0 << 16) | (entry << 3)), - "i" (ASI_DTLB_DATA_ACCESS)); - - return data; -} - -static inline unsigned long cheetah_get_litlb_data(int entry) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" - "ldxa [%1] %2, %0" - : "=r" (data) - : "r" ((0 << 16) | (entry << 3)), - "i" (ASI_ITLB_DATA_ACCESS)); - - return data; -} - -static inline unsigned long cheetah_get_ldtlb_tag(int entry) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" ((0 << 16) | (entry << 3)), - "i" (ASI_DTLB_TAG_READ)); - - return tag; -} - -static inline unsigned long cheetah_get_litlb_tag(int entry) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" ((0 << 16) | (entry << 3)), - "i" (ASI_ITLB_TAG_READ)); - - return tag; -} - -static inline void cheetah_put_ldtlb_data(int entry, unsigned long data) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), - "r" ((0 << 16) | (entry << 3)), - "i" (ASI_DTLB_DATA_ACCESS)); -} - -static inline void cheetah_put_litlb_data(int entry, unsigned long data) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), - "r" ((0 << 16) | (entry << 3)), - "i" (ASI_ITLB_DATA_ACCESS)); -} - -static inline unsigned long cheetah_get_dtlb_data(int entry, int tlb) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" - "ldxa [%1] %2, %0" - : "=r" (data) - : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_DATA_ACCESS)); - - return data; -} - -static inline unsigned long cheetah_get_dtlb_tag(int entry, int tlb) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" ((tlb << 16) | (entry << 3)), "i" (ASI_DTLB_TAG_READ)); - return tag; -} - -static inline void cheetah_put_dtlb_data(int entry, unsigned long data, int tlb) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), - "r" ((tlb << 16) | (entry << 3)), - "i" (ASI_DTLB_DATA_ACCESS)); -} - -static inline unsigned long cheetah_get_itlb_data(int entry) -{ - unsigned long data; - - __asm__ __volatile__("ldxa [%1] %2, %%g0\n\t" - "ldxa [%1] %2, %0" - : "=r" (data) - : "r" ((2 << 16) | (entry << 3)), - "i" (ASI_ITLB_DATA_ACCESS)); - - return data; -} - -static inline unsigned long cheetah_get_itlb_tag(int entry) -{ - unsigned long tag; - - __asm__ __volatile__("ldxa [%1] %2, %0" - : "=r" (tag) - : "r" ((2 << 16) | (entry << 3)), "i" (ASI_ITLB_TAG_READ)); - return tag; -} - -static inline void cheetah_put_itlb_data(int entry, unsigned long data) -{ - __asm__ __volatile__("stxa %0, [%1] %2\n\t" - "membar #Sync" - : /* No outputs */ - : "r" (data), "r" ((2 << 16) | (entry << 3)), - "i" (ASI_ITLB_DATA_ACCESS)); -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC64_SPITFIRE_H) */ diff --git a/include/asm-sparc/sstate.h b/include/asm-sparc/sstate.h deleted file mode 100644 index a7c35db..0000000 --- a/include/asm-sparc/sstate.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _SPARC64_SSTATE_H -#define _SPARC64_SSTATE_H - -extern void sstate_booting(void); -extern void sstate_running(void); -extern void sstate_halt(void); -extern void sstate_poweroff(void); -extern void sstate_panic(void); -extern void sstate_reboot(void); - -extern void sun4v_sstate_init(void); - -#endif /* _SPARC64_SSTATE_H */ diff --git a/include/asm-sparc/stacktrace.h b/include/asm-sparc/stacktrace.h deleted file mode 100644 index 6cee39a..0000000 --- a/include/asm-sparc/stacktrace.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC64_STACKTRACE_H -#define _SPARC64_STACKTRACE_H - -extern void stack_trace_flush(void); - -#endif /* _SPARC64_STACKTRACE_H */ diff --git a/include/asm-sparc/starfire.h b/include/asm-sparc/starfire.h deleted file mode 100644 index 07bafd3..0000000 --- a/include/asm-sparc/starfire.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * starfire.h: Group all starfire specific code together. - * - * Copyright (C) 2000 Anton Blanchard (anton@samba.org) - */ - -#ifndef _SPARC64_STARFIRE_H -#define _SPARC64_STARFIRE_H - -#ifndef __ASSEMBLY__ - -extern int this_is_starfire; - -extern void check_if_starfire(void); -extern void starfire_cpu_setup(void); -extern int starfire_hard_smp_processor_id(void); -extern void starfire_hookup(int); -extern unsigned int starfire_translate(unsigned long imap, unsigned int upaid); - -#endif -#endif diff --git a/include/asm-sparc/stat.h b/include/asm-sparc/stat.h deleted file mode 100644 index 9fdcaf8..0000000 --- a/include/asm-sparc/stat.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_STAT_H -#define ___ASM_SPARC_STAT_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/stat_32.h b/include/asm-sparc/stat_32.h deleted file mode 100644 index 2299e1d5..0000000 --- a/include/asm-sparc/stat_32.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _SPARC_STAT_H -#define _SPARC_STAT_H - -#include - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -struct stat { - unsigned short st_dev; - unsigned long st_ino; - unsigned short st_mode; - short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - long st_size; - long st_atime; - unsigned long st_atime_nsec; - long st_mtime; - unsigned long st_mtime_nsec; - long st_ctime; - unsigned long st_ctime_nsec; - long st_blksize; - long st_blocks; - unsigned long __unused4[2]; -}; - -#define STAT_HAVE_NSEC 1 - -struct stat64 { - unsigned long long st_dev; - - unsigned long long st_ino; - - unsigned int st_mode; - unsigned int st_nlink; - - unsigned int st_uid; - unsigned int st_gid; - - unsigned long long st_rdev; - - unsigned char __pad3[8]; - - long long st_size; - unsigned int st_blksize; - - unsigned char __pad4[8]; - unsigned int st_blocks; - - unsigned int st_atime; - unsigned int st_atime_nsec; - - unsigned int st_mtime; - unsigned int st_mtime_nsec; - - unsigned int st_ctime; - unsigned int st_ctime_nsec; - - unsigned int __unused4; - unsigned int __unused5; -}; - -#endif diff --git a/include/asm-sparc/stat_64.h b/include/asm-sparc/stat_64.h deleted file mode 100644 index 9650fde..0000000 --- a/include/asm-sparc/stat_64.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef _SPARC64_STAT_H -#define _SPARC64_STAT_H - -#include - -struct stat { - unsigned st_dev; - ino_t st_ino; - mode_t st_mode; - short st_nlink; - uid_t st_uid; - gid_t st_gid; - unsigned st_rdev; - off_t st_size; - time_t st_atime; - time_t st_mtime; - time_t st_ctime; - off_t st_blksize; - off_t st_blocks; - unsigned long __unused4[2]; -}; - -struct stat64 { - unsigned long st_dev; - unsigned long st_ino; - unsigned long st_nlink; - - unsigned int st_mode; - unsigned int st_uid; - unsigned int st_gid; - unsigned int __pad0; - - unsigned long st_rdev; - long st_size; - long st_blksize; - long st_blocks; - - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - long __unused[3]; -}; - -#endif diff --git a/include/asm-sparc/statfs.h b/include/asm-sparc/statfs.h deleted file mode 100644 index a70cc52..0000000 --- a/include/asm-sparc/statfs.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_STATFS_H -#define ___ASM_SPARC_STATFS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/statfs_32.h b/include/asm-sparc/statfs_32.h deleted file mode 100644 index 304520f..0000000 --- a/include/asm-sparc/statfs_32.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC_STATFS_H -#define _SPARC_STATFS_H - -#include - -#endif diff --git a/include/asm-sparc/statfs_64.h b/include/asm-sparc/statfs_64.h deleted file mode 100644 index 79b3c89..0000000 --- a/include/asm-sparc/statfs_64.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef _SPARC64_STATFS_H -#define _SPARC64_STATFS_H - -#ifndef __KERNEL_STRICT_NAMES - -#include - -typedef __kernel_fsid_t fsid_t; - -#endif - -struct statfs { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct statfs64 { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct compat_statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; - -#endif diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h deleted file mode 100644 index 14c04c7..0000000 --- a/include/asm-sparc/string.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_STRING_H -#define ___ASM_SPARC_STRING_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/string_32.h b/include/asm-sparc/string_32.h deleted file mode 100644 index 6c5fddb..0000000 --- a/include/asm-sparc/string_32.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * string.h: External definitions for optimized assembly string - * routines for the Linux Kernel. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __SPARC_STRING_H__ -#define __SPARC_STRING_H__ - -#include - -/* Really, userland/ksyms should not see any of this stuff. */ - -#ifdef __KERNEL__ - -extern void __memmove(void *,const void *,__kernel_size_t); -extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); -extern __kernel_size_t __memset(void *,int,__kernel_size_t); - -#ifndef EXPORT_SYMTAB_STROPS - -/* First the mem*() things. */ -#define __HAVE_ARCH_MEMMOVE -#undef memmove -#define memmove(_to, _from, _n) \ -({ \ - void *_t = (_to); \ - __memmove(_t, (_from), (_n)); \ - _t; \ -}) - -#define __HAVE_ARCH_MEMCPY - -static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) -{ - extern void __copy_1page(void *, const void *); - - if(n <= 32) { - __builtin_memcpy(to, from, n); - } else if (((unsigned int) to & 7) != 0) { - /* Destination is not aligned on the double-word boundary */ - __memcpy(to, from, n); - } else { - switch(n) { - case PAGE_SIZE: - __copy_1page(to, from); - break; - default: - __memcpy(to, from, n); - break; - } - } - return to; -} - -static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n) -{ - __memcpy(to, from, n); - return to; -} - -#undef memcpy -#define memcpy(t, f, n) \ -(__builtin_constant_p(n) ? \ - __constant_memcpy((t),(f),(n)) : \ - __nonconstant_memcpy((t),(f),(n))) - -#define __HAVE_ARCH_MEMSET - -static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) -{ - extern void bzero_1page(void *); - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if(!c) { - if(count == PAGE_SIZE) - bzero_1page(s); - else - __bzero(s, count); - } else { - __memset(s, c, count); - } - return s; -} - -static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) -{ - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if(!c) - __bzero(s, count); - else - __memset(s, c, count); - return s; -} - -static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) -{ - __memset(s, c, count); - return s; -} - -#undef memset -#define memset(s, c, count) \ -(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ - __constant_c_and_count_memset((s), (c), (count)) : \ - __constant_c_memset((s), (c), (count))) \ - : __nonconstant_memset((s), (c), (count))) - -#define __HAVE_ARCH_MEMSCAN - -#undef memscan -#define memscan(__arg0, __char, __arg2) \ -({ \ - extern void *__memscan_zero(void *, size_t); \ - extern void *__memscan_generic(void *, int, size_t); \ - void *__retval, *__addr = (__arg0); \ - size_t __size = (__arg2); \ - \ - if(__builtin_constant_p(__char) && !(__char)) \ - __retval = __memscan_zero(__addr, __size); \ - else \ - __retval = __memscan_generic(__addr, (__char), __size); \ - \ - __retval; \ -}) - -#define __HAVE_ARCH_MEMCMP -extern int memcmp(const void *,const void *,__kernel_size_t); - -/* Now the str*() stuff... */ -#define __HAVE_ARCH_STRLEN -extern __kernel_size_t strlen(const char *); - -#define __HAVE_ARCH_STRNCMP - -extern int __strncmp(const char *, const char *, __kernel_size_t); - -static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count) -{ - register int retval; - switch(count) { - case 0: return 0; - case 1: return (src[0] - dest[0]); - case 2: retval = (src[0] - dest[0]); - if(!retval && src[0]) - retval = (src[1] - dest[1]); - return retval; - case 3: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) - retval = (src[2] - dest[2]); - } - return retval; - case 4: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if (!retval && src[2]) - retval = (src[3] - dest[3]); - } - } - return retval; - case 5: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if (!retval && src[2]) { - retval = (src[3] - dest[3]); - if (!retval && src[3]) - retval = (src[4] - dest[4]); - } - } - } - return retval; - default: - retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if(!retval && src[2]) - retval = __strncmp(src+3,dest+3,count-3); - } - } - return retval; - } -} - -#undef strncmp -#define strncmp(__arg0, __arg1, __arg2) \ -(__builtin_constant_p(__arg2) ? \ - __constant_strncmp(__arg0, __arg1, __arg2) : \ - __strncmp(__arg0, __arg1, __arg2)) - -#endif /* !EXPORT_SYMTAB_STROPS */ - -#endif /* __KERNEL__ */ - -#endif /* !(__SPARC_STRING_H__) */ diff --git a/include/asm-sparc/string_64.h b/include/asm-sparc/string_64.h deleted file mode 100644 index 43161f2..0000000 --- a/include/asm-sparc/string_64.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * string.h: External definitions for optimized assembly string - * routines for the Linux Kernel. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997,1999 Jakub Jelinek (jakub@redhat.com) - */ - -#ifndef __SPARC64_STRING_H__ -#define __SPARC64_STRING_H__ - -/* Really, userland/ksyms should not see any of this stuff. */ - -#ifdef __KERNEL__ - -#include - -extern void *__memset(void *,int,__kernel_size_t); - -#ifndef EXPORT_SYMTAB_STROPS - -/* First the mem*() things. */ -#define __HAVE_ARCH_MEMMOVE -extern void *memmove(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMCPY -extern void *memcpy(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMSET -extern void *__builtin_memset(void *,int,__kernel_size_t); - -static inline void *__constant_memset(void *s, int c, __kernel_size_t count) -{ - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if (!c) { - __bzero(s, count); - return s; - } else - return __memset(s, c, count); -} - -#undef memset -#define memset(s, c, count) \ -((__builtin_constant_p(count) && (count) <= 32) ? \ - __builtin_memset((s), (c), (count)) : \ - (__builtin_constant_p(c) ? \ - __constant_memset((s), (c), (count)) : \ - __memset((s), (c), (count)))) - -#define __HAVE_ARCH_MEMSCAN - -#undef memscan -#define memscan(__arg0, __char, __arg2) \ -({ \ - extern void *__memscan_zero(void *, size_t); \ - extern void *__memscan_generic(void *, int, size_t); \ - void *__retval, *__addr = (__arg0); \ - size_t __size = (__arg2); \ - \ - if(__builtin_constant_p(__char) && !(__char)) \ - __retval = __memscan_zero(__addr, __size); \ - else \ - __retval = __memscan_generic(__addr, (__char), __size); \ - \ - __retval; \ -}) - -#define __HAVE_ARCH_MEMCMP -extern int memcmp(const void *,const void *,__kernel_size_t); - -/* Now the str*() stuff... */ -#define __HAVE_ARCH_STRLEN -extern __kernel_size_t strlen(const char *); - -#define __HAVE_ARCH_STRNCMP -extern int strncmp(const char *, const char *, __kernel_size_t); - -#endif /* !EXPORT_SYMTAB_STROPS */ - -#endif /* __KERNEL__ */ - -#endif /* !(__SPARC64_STRING_H__) */ diff --git a/include/asm-sparc/sun4paddr.h b/include/asm-sparc/sun4paddr.h deleted file mode 100644 index d52985f..0000000 --- a/include/asm-sparc/sun4paddr.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * sun4paddr.h: Various physical addresses on sun4 machines - * - * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au) - * Copyright (C) 1998 Chris Davis (cdavis@cois.on.ca) - * - * Now supports more sun4's - */ - -#ifndef _SPARC_SUN4PADDR_H -#define _SPARC_SUN4PADDR_H - -#define SUN4_IE_PHYSADDR 0xf5000000 -#define SUN4_UNUSED_PHYSADDR 0 - -/* these work for me */ -#define SUN4_200_MEMREG_PHYSADDR 0xf4000000 -#define SUN4_200_CLOCK_PHYSADDR 0xf3000000 -#define SUN4_200_BWTWO_PHYSADDR 0xfd000000 -#define SUN4_200_ETH_PHYSADDR 0xf6000000 -#define SUN4_200_SI_PHYSADDR 0xff200000 - -/* these were here before */ -#define SUN4_300_MEMREG_PHYSADDR 0xf4000000 -#define SUN4_300_CLOCK_PHYSADDR 0xf2000000 -#define SUN4_300_TIMER_PHYSADDR 0xef000000 -#define SUN4_300_ETH_PHYSADDR 0xf9000000 -#define SUN4_300_BWTWO_PHYSADDR 0xfb400000 -#define SUN4_300_DMA_PHYSADDR 0xfa001000 -#define SUN4_300_ESP_PHYSADDR 0xfa000000 - -/* Are these right? */ -#define SUN4_400_MEMREG_PHYSADDR 0xf4000000 -#define SUN4_400_CLOCK_PHYSADDR 0xf2000000 -#define SUN4_400_TIMER_PHYSADDR 0xef000000 -#define SUN4_400_ETH_PHYSADDR 0xf9000000 -#define SUN4_400_BWTWO_PHYSADDR 0xfb400000 -#define SUN4_400_DMA_PHYSADDR 0xfa001000 -#define SUN4_400_ESP_PHYSADDR 0xfa000000 - -/* - these are the actual values set and used in the code. Unused items set - to SUN_UNUSED_PHYSADDR - */ - -extern int sun4_memreg_physaddr; /* memory register (ecc?) */ -extern int sun4_clock_physaddr; /* system clock */ -extern int sun4_timer_physaddr; /* timer, where applicable */ -extern int sun4_eth_physaddr; /* onboard ethernet (ie/le) */ -extern int sun4_si_physaddr; /* sun3 scsi adapter */ -extern int sun4_bwtwo_physaddr; /* onboard bw2 */ -extern int sun4_dma_physaddr; /* scsi dma */ -extern int sun4_esp_physaddr; /* esp scsi */ -extern int sun4_ie_physaddr; /* interrupt enable */ - -#endif /* !(_SPARC_SUN4PADDR_H) */ diff --git a/include/asm-sparc/sun4prom.h b/include/asm-sparc/sun4prom.h deleted file mode 100644 index 9c8b4cb..0000000 --- a/include/asm-sparc/sun4prom.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * sun4prom.h -- interface to sun4 PROM monitor. We don't use most of this, - * so most of these are just placeholders. - */ - -#ifndef _SUN4PROM_H_ -#define _SUN4PROM_H_ - -/* - * Although this looks similar to an romvec for a OpenProm machine, it is - * actually closer to what was used in the Sun2 and Sun3. - * - * V2 entries exist only in version 2 PROMs and later, V3 in version 3 and later. - * - * Many of the function prototypes are guesses. Some are certainly wrong. - * Use with care. - */ - -typedef struct { - char *initSP; /* Initial system stack ptr */ - void (*startmon)(void); /* Initial PC for hardware */ - int *diagberr; /* Bus err handler for diags */ - struct linux_arguments_v0 **bootParam; /* Info for bootstrapped pgm */ - unsigned int *memorysize; /* Usable memory in bytes */ - unsigned char (*getchar)(void); /* Get char from input device */ - void (*putchar)(char); /* Put char to output device */ - int (*mayget)(void); /* Maybe get char, or -1 */ - int (*mayput)(int); /* Maybe put char, or -1 */ - unsigned char *echo; /* Should getchar echo? */ - unsigned char *insource; /* Input source selector */ - unsigned char *outsink; /* Output sink selector */ - int (*getkey)(void); /* Get next key if one exists */ - void (*initgetkey)(void); /* Initialize get key */ - unsigned int *translation; /* Kbd translation selector */ - unsigned char *keybid; /* Keyboard ID byte */ - int *screen_x; /* V2: Screen x pos (r/o) */ - int *screen_y; /* V2: Screen y pos (r/o) */ - struct keybuf *keybuf; /* Up/down keycode buffer */ - char *monid; /* Monitor version ID */ - void (*fbwritechar)(char); /* Write a character to FB */ - int *fbAddr; /* Address of frame buffer */ - char **font; /* Font table for FB */ - void (*fbwritestr)(char *); /* Write string to FB */ - void (*reboot)(char *); /* e.g. reboot("sd()vmlinux") */ - unsigned char *linebuf; /* The line input buffer */ - unsigned char **lineptr; /* Cur pointer into linebuf */ - int *linesize; /* length of line in linebuf */ - void (*getline)(char *); /* Get line from user */ - unsigned char (*getnextchar)(void); /* Get next char from linebuf */ - unsigned char (*peeknextchar)(void); /* Peek at next char */ - int *fbthere; /* =1 if frame buffer there */ - int (*getnum)(void); /* Grab hex num from line */ - int (*printf)(char *, ...); /* See prom_printf() instead */ - void (*printhex)(int); /* Format N digits in hex */ - unsigned char *leds; /* RAM copy of LED register */ - void (*setLEDs)(unsigned char *); /* Sets LED's and RAM copy */ - void (*NMIaddr)(void *); /* Addr for level 7 vector */ - void (*abortentry)(void); /* Entry for keyboard abort */ - int *nmiclock; /* Counts up in msec */ - int *FBtype; /* Frame buffer type */ - unsigned int romvecversion; /* Version number for this romvec */ - struct globram *globram; /* monitor global variables ??? */ - void * kbdaddr; /* Addr of keyboard in use */ - int *keyrinit; /* ms before kbd repeat */ - unsigned char *keyrtick; /* ms between repetitions */ - unsigned int *memoryavail; /* V1: Main mem usable size */ - long *resetaddr; /* where to jump on a reset */ - long *resetmap; /* pgmap entry for resetaddr */ - void (*exittomon)(void); /* Exit from user program */ - unsigned char **memorybitmap; /* V1: &{0 or &bits} */ - void (*setcxsegmap)(int ctxt, char *va, int pmeg); /* Set seg in any context */ - void (**vector_cmd)(void *); /* V2: Handler for 'v' cmd */ - unsigned long *expectedtrapsig; /* V3: Location of the expected trap signal */ - unsigned long *trapvectorbasetable; /* V3: Address of the trap vector table */ - int unused1; - int unused2; - int unused3; - int unused4; -} linux_sun4_romvec; - -extern linux_sun4_romvec *sun4_romvec; - -#endif /* _SUN4PROM_H_ */ diff --git a/include/asm-sparc/sunbpp.h b/include/asm-sparc/sunbpp.h deleted file mode 100644 index 92ee1a8..0000000 --- a/include/asm-sparc/sunbpp.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * include/asm-sparc/sunbpp.h - */ - -#ifndef _ASM_SPARC_SUNBPP_H -#define _ASM_SPARC_SUNBPP_H - -struct bpp_regs { - /* DMA registers */ - __volatile__ __u32 p_csr; /* DMA Control/Status Register */ - __volatile__ __u32 p_addr; /* Address Register */ - __volatile__ __u32 p_bcnt; /* Byte Count Register */ - __volatile__ __u32 p_tst_csr; /* Test Control/Status (DMA2 only) */ - /* Parallel Port registers */ - __volatile__ __u16 p_hcr; /* Hardware Configuration Register */ - __volatile__ __u16 p_ocr; /* Operation Configuration Register */ - __volatile__ __u8 p_dr; /* Parallel Data Register */ - __volatile__ __u8 p_tcr; /* Transfer Control Register */ - __volatile__ __u8 p_or; /* Output Register */ - __volatile__ __u8 p_ir; /* Input Register */ - __volatile__ __u16 p_icr; /* Interrupt Control Register */ -}; - -/* P_HCR. Time is in increments of SBus clock. */ -#define P_HCR_TEST 0x8000 /* Allows buried counters to be read */ -#define P_HCR_DSW 0x7f00 /* Data strobe width (in ticks) */ -#define P_HCR_DDS 0x007f /* Data setup before strobe (in ticks) */ - -/* P_OCR. */ -#define P_OCR_MEM_CLR 0x8000 -#define P_OCR_DATA_SRC 0x4000 /* ) */ -#define P_OCR_DS_DSEL 0x2000 /* ) Bidirectional */ -#define P_OCR_BUSY_DSEL 0x1000 /* ) selects */ -#define P_OCR_ACK_DSEL 0x0800 /* ) */ -#define P_OCR_EN_DIAG 0x0400 -#define P_OCR_BUSY_OP 0x0200 /* Busy operation */ -#define P_OCR_ACK_OP 0x0100 /* Ack operation */ -#define P_OCR_SRST 0x0080 /* Reset state machines. Not selfcleaning. */ -#define P_OCR_IDLE 0x0008 /* PP data transfer state machine is idle */ -#define P_OCR_V_ILCK 0x0002 /* Versatec faded. Zebra only. */ -#define P_OCR_EN_VER 0x0001 /* Enable Versatec (0 - enable). Zebra only. */ - -/* P_TCR */ -#define P_TCR_DIR 0x08 -#define P_TCR_BUSY 0x04 -#define P_TCR_ACK 0x02 -#define P_TCR_DS 0x01 /* Strobe */ - -/* P_OR */ -#define P_OR_V3 0x20 /* ) */ -#define P_OR_V2 0x10 /* ) on Zebra only */ -#define P_OR_V1 0x08 /* ) */ -#define P_OR_INIT 0x04 -#define P_OR_AFXN 0x02 /* Auto Feed */ -#define P_OR_SLCT_IN 0x01 - -/* P_IR */ -#define P_IR_PE 0x04 -#define P_IR_SLCT 0x02 -#define P_IR_ERR 0x01 - -/* P_ICR */ -#define P_DS_IRQ 0x8000 /* RW1 */ -#define P_ACK_IRQ 0x4000 /* RW1 */ -#define P_BUSY_IRQ 0x2000 /* RW1 */ -#define P_PE_IRQ 0x1000 /* RW1 */ -#define P_SLCT_IRQ 0x0800 /* RW1 */ -#define P_ERR_IRQ 0x0400 /* RW1 */ -#define P_DS_IRQ_EN 0x0200 /* RW Always on rising edge */ -#define P_ACK_IRQ_EN 0x0100 /* RW Always on rising edge */ -#define P_BUSY_IRP 0x0080 /* RW 1= rising edge */ -#define P_BUSY_IRQ_EN 0x0040 /* RW */ -#define P_PE_IRP 0x0020 /* RW 1= rising edge */ -#define P_PE_IRQ_EN 0x0010 /* RW */ -#define P_SLCT_IRP 0x0008 /* RW 1= rising edge */ -#define P_SLCT_IRQ_EN 0x0004 /* RW */ -#define P_ERR_IRP 0x0002 /* RW1 1= rising edge */ -#define P_ERR_IRQ_EN 0x0001 /* RW */ - -#endif /* !(_ASM_SPARC_SUNBPP_H) */ diff --git a/include/asm-sparc/swift.h b/include/asm-sparc/swift.h deleted file mode 100644 index e535061..0000000 --- a/include/asm-sparc/swift.h +++ /dev/null @@ -1,106 +0,0 @@ -/* swift.h: Specific definitions for the _broken_ Swift SRMMU - * MMU module. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SWIFT_H -#define _SPARC_SWIFT_H - -/* Swift is so brain damaged, here is the mmu control register. */ -#define SWIFT_ST 0x00800000 /* SW tablewalk enable */ -#define SWIFT_WP 0x00400000 /* Watchpoint enable */ - -/* Branch folding (buggy, disable on production systems!) */ -#define SWIFT_BF 0x00200000 -#define SWIFT_PMC 0x00180000 /* Page mode control */ -#define SWIFT_PE 0x00040000 /* Parity enable */ -#define SWIFT_PC 0x00020000 /* Parity control */ -#define SWIFT_AP 0x00010000 /* Graphics page mode control (TCX/SX) */ -#define SWIFT_AC 0x00008000 /* Alternate Cacheability (see viking.h) */ -#define SWIFT_BM 0x00004000 /* Boot mode */ -#define SWIFT_RC 0x00003c00 /* DRAM refresh control */ -#define SWIFT_IE 0x00000200 /* Instruction cache enable */ -#define SWIFT_DE 0x00000100 /* Data cache enable */ -#define SWIFT_SA 0x00000080 /* Store Allocate */ -#define SWIFT_NF 0x00000002 /* No fault mode */ -#define SWIFT_EN 0x00000001 /* MMU enable */ - -/* Bits [13:5] select one of 512 instruction cache tags */ -static inline void swift_inv_insn_tag(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_TXTC_TAG) - : "memory"); -} - -/* Bits [12:4] select one of 512 data cache tags */ -static inline void swift_inv_data_tag(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_DATAC_TAG) - : "memory"); -} - -static inline void swift_flush_dcache(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x2000; addr += 0x10) - swift_inv_data_tag(addr); -} - -static inline void swift_flush_icache(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x4000; addr += 0x20) - swift_inv_insn_tag(addr); -} - -static inline void swift_idflash_clear(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x2000; addr += 0x10) { - swift_inv_insn_tag(addr<<1); - swift_inv_data_tag(addr); - } -} - -/* Swift is so broken, it isn't even safe to use the following. */ -static inline void swift_flush_page(unsigned long page) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (page), "i" (ASI_M_FLUSH_PAGE) - : "memory"); -} - -static inline void swift_flush_segment(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_FLUSH_SEG) - : "memory"); -} - -static inline void swift_flush_region(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_FLUSH_REGION) - : "memory"); -} - -static inline void swift_flush_context(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_FLUSH_CTX) - : "memory"); -} - -#endif /* !(_SPARC_SWIFT_H) */ diff --git a/include/asm-sparc/syscalls.h b/include/asm-sparc/syscalls.h deleted file mode 100644 index 45a43f6..0000000 --- a/include/asm-sparc/syscalls.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _SPARC64_SYSCALLS_H -#define _SPARC64_SYSCALLS_H - -struct pt_regs; - -extern asmlinkage long sparc_do_fork(unsigned long clone_flags, - unsigned long stack_start, - struct pt_regs *regs, - unsigned long stack_size); - -extern asmlinkage int sparc_execve(struct pt_regs *regs); - -#endif /* _SPARC64_SYSCALLS_H */ diff --git a/include/asm-sparc/sysen.h b/include/asm-sparc/sysen.h deleted file mode 100644 index 6af34ab..0000000 --- a/include/asm-sparc/sysen.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * sysen.h: Bit fields within the "System Enable" register accessed via - * the ASI_CONTROL address space at address AC_SYSENABLE. - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SYSEN_H -#define _SPARC_SYSEN_H - -#define SENABLE_DVMA 0x20 /* enable dvma transfers */ -#define SENABLE_CACHE 0x10 /* enable VAC cache */ -#define SENABLE_RESET 0x04 /* reset whole machine, danger Will Robinson */ - -#endif /* _SPARC_SYSEN_H */ diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h deleted file mode 100644 index 15e2a3b..0000000 --- a/include/asm-sparc/system.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_SYSTEM_H -#define ___ASM_SPARC_SYSTEM_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/system_32.h b/include/asm-sparc/system_32.h deleted file mode 100644 index b4b0244..0000000 --- a/include/asm-sparc/system_32.h +++ /dev/null @@ -1,288 +0,0 @@ -#ifndef __SPARC_SYSTEM_H -#define __SPARC_SYSTEM_H - -#include -#include /* NR_CPUS */ -#include - -#include -#include -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include - -/* - * Sparc (general) CPU types - */ -enum sparc_cpu { - sun4 = 0x00, - sun4c = 0x01, - sun4m = 0x02, - sun4d = 0x03, - sun4e = 0x04, - sun4u = 0x05, /* V8 ploos ploos */ - sun_unknown = 0x06, - ap1000 = 0x07, /* almost a sun4m */ -}; - -/* Really, userland should not be looking at any of this... */ -#ifdef __KERNEL__ - -extern enum sparc_cpu sparc_cpu_model; - -#ifndef CONFIG_SUN4 -#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c) -#define ARCH_SUN4 0 -#else -#define ARCH_SUN4C_SUN4 1 -#define ARCH_SUN4 1 -#endif - -#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ - -extern char reboot_command[]; - -extern struct thread_info *current_set[NR_CPUS]; - -extern unsigned long empty_bad_page; -extern unsigned long empty_bad_page_table; -extern unsigned long empty_zero_page; - -extern void sun_do_break(void); -extern int serial_console; -extern int stop_a_enabled; - -static inline int con_is_present(void) -{ - return serial_console ? 0 : 1; -} - -/* When a context switch happens we must flush all user windows so that - * the windows of the current process are flushed onto its stack. This - * way the windows are all clean for the next process and the stack - * frames are up to date. - */ -extern void flush_user_windows(void); -extern void kill_user_windows(void); -extern void synchronize_user_stack(void); -extern void fpsave(unsigned long *fpregs, unsigned long *fsr, - void *fpqueue, unsigned long *fpqdepth); - -#ifdef CONFIG_SMP -#define SWITCH_ENTER(prv) \ - do { \ - if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \ - put_psr(get_psr() | PSR_EF); \ - fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \ - &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \ - clear_tsk_thread_flag(prv, TIF_USEDFPU); \ - (prv)->thread.kregs->psr &= ~PSR_EF; \ - } \ - } while(0) - -#define SWITCH_DO_LAZY_FPU(next) /* */ -#else -#define SWITCH_ENTER(prv) /* */ -#define SWITCH_DO_LAZY_FPU(nxt) \ - do { \ - if (last_task_used_math != (nxt)) \ - (nxt)->thread.kregs->psr&=~PSR_EF; \ - } while(0) -#endif - -extern void flushw_all(void); - -/* - * Flush windows so that the VM switch which follows - * would not pull the stack from under us. - * - * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) - * XXX WTF is the above comment? Found in late teen 2.4.x. - */ -#define prepare_arch_switch(next) do { \ - __asm__ __volatile__( \ - ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \ - "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ - "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ - "save %sp, -0x40, %sp\n\t" \ - "restore; restore; restore; restore; restore; restore; restore"); \ -} while(0) - - /* Much care has gone into this code, do not touch it. - * - * We need to loadup regs l0/l1 for the newly forked child - * case because the trap return path relies on those registers - * holding certain values, gcc is told that they are clobbered. - * Gcc needs registers for 3 values in and 1 value out, so we - * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM - * - * Hey Dave, that do not touch sign is too much of an incentive - * - Anton & Pete - */ -#define switch_to(prev, next, last) do { \ - SWITCH_ENTER(prev); \ - SWITCH_DO_LAZY_FPU(next); \ - cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ - __asm__ __volatile__( \ - "sethi %%hi(here - 0x8), %%o7\n\t" \ - "mov %%g6, %%g3\n\t" \ - "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ - "rd %%psr, %%g4\n\t" \ - "std %%sp, [%%g6 + %4]\n\t" \ - "rd %%wim, %%g5\n\t" \ - "wr %%g4, 0x20, %%psr\n\t" \ - "nop\n\t" \ - "std %%g4, [%%g6 + %3]\n\t" \ - "ldd [%2 + %3], %%g4\n\t" \ - "mov %2, %%g6\n\t" \ - ".globl patchme_store_new_current\n" \ -"patchme_store_new_current:\n\t" \ - "st %2, [%1]\n\t" \ - "wr %%g4, 0x20, %%psr\n\t" \ - "nop\n\t" \ - "nop\n\t" \ - "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ - "ldd [%%g6 + %4], %%sp\n\t" \ - "wr %%g5, 0x0, %%wim\n\t" \ - "ldd [%%sp + 0x00], %%l0\n\t" \ - "ldd [%%sp + 0x38], %%i6\n\t" \ - "wr %%g4, 0x0, %%psr\n\t" \ - "nop\n\t" \ - "nop\n\t" \ - "jmpl %%o7 + 0x8, %%g0\n\t" \ - " ld [%%g3 + %5], %0\n\t" \ - "here:\n" \ - : "=&r" (last) \ - : "r" (&(current_set[hard_smp_processor_id()])), \ - "r" (task_thread_info(next)), \ - "i" (TI_KPSR), \ - "i" (TI_KSP), \ - "i" (TI_TASK) \ - : "g1", "g2", "g3", "g4", "g5", "g7", \ - "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ - "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3", "o7"); \ - } while(0) - -/* XXX Change this if we ever use a PSO mode kernel. */ -#define mb() __asm__ __volatile__ ("" : : : "memory") -#define rmb() mb() -#define wmb() mb() -#define read_barrier_depends() do { } while(0) -#define set_mb(__var, __value) do { __var = __value; mb(); } while(0) -#define smp_mb() __asm__ __volatile__("":::"memory") -#define smp_rmb() __asm__ __volatile__("":::"memory") -#define smp_wmb() __asm__ __volatile__("":::"memory") -#define smp_read_barrier_depends() do { } while(0) - -#define nop() __asm__ __volatile__ ("nop") - -/* This has special calling conventions */ -#ifndef CONFIG_SMP -BTFIXUPDEF_CALL(void, ___xchg32, void) -#endif - -static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) -{ -#ifdef CONFIG_SMP - __asm__ __volatile__("swap [%2], %0" - : "=&r" (val) - : "0" (val), "r" (m) - : "memory"); - return val; -#else - register unsigned long *ptr asm("g1"); - register unsigned long ret asm("g2"); - - ptr = (unsigned long *) m; - ret = val; - - /* Note: this is magic and the nop there is - really needed. */ - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___f____xchg32\n\t" - " nop\n\t" - : "=&r" (ret) - : "0" (ret), "r" (ptr) - : "g3", "g4", "g7", "memory", "cc"); - - return ret; -#endif -} - -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) -{ - switch (size) { - case 4: - return xchg_u32(ptr, x); - }; - __xchg_called_with_bad_pointer(); - return x; -} - -/* Emulate cmpxchg() the same way we emulate atomics, - * by hashing the object address and indexing into an array - * of spinlocks to get a bit of performance... - * - * See arch/sparc/lib/atomic32.c for implementation. - * - * Cribbed from - */ -#define __HAVE_ARCH_CMPXCHG 1 - -/* bug catcher for when unsupported size is used - won't link */ -extern void __cmpxchg_called_with_bad_pointer(void); -/* we only need to support cmpxchg of a u32 on sparc */ -extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); - -/* don't worry...optimizer will get rid of most of this */ -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_); - default: - __cmpxchg_called_with_bad_pointer(); - break; - } - return old; -} - -#define cmpxchg(ptr, o, n) \ -({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ -}) - -#include - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - -extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#define arch_align_stack(x) (x) - -#endif /* !(__SPARC_SYSTEM_H) */ diff --git a/include/asm-sparc/system_64.h b/include/asm-sparc/system_64.h deleted file mode 100644 index db9e742..0000000 --- a/include/asm-sparc/system_64.h +++ /dev/null @@ -1,355 +0,0 @@ -#ifndef __SPARC64_SYSTEM_H -#define __SPARC64_SYSTEM_H - -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#include -#include - -/* - * Sparc (general) CPU types - */ -enum sparc_cpu { - sun4 = 0x00, - sun4c = 0x01, - sun4m = 0x02, - sun4d = 0x03, - sun4e = 0x04, - sun4u = 0x05, /* V8 ploos ploos */ - sun_unknown = 0x06, - ap1000 = 0x07, /* almost a sun4m */ -}; - -#define sparc_cpu_model sun4u - -/* This cannot ever be a sun4c nor sun4 :) That's just history. */ -#define ARCH_SUN4C_SUN4 0 -#define ARCH_SUN4 0 - -extern char reboot_command[]; - -/* These are here in an effort to more fully work around Spitfire Errata - * #51. Essentially, if a memory barrier occurs soon after a mispredicted - * branch, the chip can stop executing instructions until a trap occurs. - * Therefore, if interrupts are disabled, the chip can hang forever. - * - * It used to be believed that the memory barrier had to be right in the - * delay slot, but a case has been traced recently wherein the memory barrier - * was one instruction after the branch delay slot and the chip still hung. - * The offending sequence was the following in sym_wakeup_done() of the - * sym53c8xx_2 driver: - * - * call sym_ccb_from_dsa, 0 - * movge %icc, 0, %l0 - * brz,pn %o0, .LL1303 - * mov %o0, %l2 - * membar #LoadLoad - * - * The branch has to be mispredicted for the bug to occur. Therefore, we put - * the memory barrier explicitly into a "branch always, predicted taken" - * delay slot to avoid the problem case. - */ -#define membar_safe(type) \ -do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ - " membar " type "\n" \ - "1:\n" \ - : : : "memory"); \ -} while (0) - -#define mb() \ - membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad") -#define rmb() \ - membar_safe("#LoadLoad") -#define wmb() \ - membar_safe("#StoreStore") -#define membar_storeload() \ - membar_safe("#StoreLoad") -#define membar_storeload_storestore() \ - membar_safe("#StoreLoad | #StoreStore") -#define membar_storeload_loadload() \ - membar_safe("#StoreLoad | #LoadLoad") -#define membar_storestore_loadstore() \ - membar_safe("#StoreStore | #LoadStore") - -#endif - -#define nop() __asm__ __volatile__ ("nop") - -#define read_barrier_depends() do { } while(0) -#define set_mb(__var, __value) \ - do { __var = __value; membar_storeload_storestore(); } while(0) - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() __asm__ __volatile__("":::"memory") -#define smp_rmb() __asm__ __volatile__("":::"memory") -#define smp_wmb() __asm__ __volatile__("":::"memory") -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory") - -#define flushw_all() __asm__ __volatile__("flushw") - -/* Performance counter register access. */ -#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p)) -#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p)) -#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p)) - -/* Blackbird errata workaround. See commentary in - * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt() - * for more information. - */ -#define reset_pic() \ - __asm__ __volatile__("ba,pt %xcc, 99f\n\t" \ - ".align 64\n" \ - "99:wr %g0, 0x0, %pic\n\t" \ - "rd %pic, %g0") - -#ifndef __ASSEMBLY__ - -extern void sun_do_break(void); -extern int stop_a_enabled; - -extern void fault_in_user_windows(void); -extern void synchronize_user_stack(void); - -extern void __flushw_user(void); -#define flushw_user() __flushw_user() - -#define flush_user_windows flushw_user -#define flush_register_windows flushw_all - -/* Don't hold the runqueue lock over context switch */ -#define __ARCH_WANT_UNLOCKED_CTXSW -#define prepare_arch_switch(next) \ -do { \ - flushw_all(); \ -} while (0) - - /* See what happens when you design the chip correctly? - * - * We tell gcc we clobber all non-fixed-usage registers except - * for l0/l1. It will use one for 'next' and the other to hold - * the output value of 'last'. 'next' is not referenced again - * past the invocation of switch_to in the scheduler, so we need - * not preserve it's value. Hairy, but it lets us remove 2 loads - * and 2 stores in this critical code path. -DaveM - */ -#define switch_to(prev, next, last) \ -do { if (test_thread_flag(TIF_PERFCTR)) { \ - unsigned long __tmp; \ - read_pcr(__tmp); \ - current_thread_info()->pcr_reg = __tmp; \ - read_pic(__tmp); \ - current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\ - current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \ - } \ - flush_tlb_pending(); \ - save_and_clear_fpu(); \ - /* If you are tempted to conditionalize the following */ \ - /* so that ASI is only written if it changes, think again. */ \ - __asm__ __volatile__("wr %%g0, %0, %%asi" \ - : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\ - trap_block[current_thread_info()->cpu].thread = \ - task_thread_info(next); \ - __asm__ __volatile__( \ - "mov %%g4, %%g7\n\t" \ - "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ - "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ - "rdpr %%wstate, %%o5\n\t" \ - "stx %%o6, [%%g6 + %6]\n\t" \ - "stb %%o5, [%%g6 + %5]\n\t" \ - "rdpr %%cwp, %%o5\n\t" \ - "stb %%o5, [%%g6 + %8]\n\t" \ - "mov %4, %%g6\n\t" \ - "ldub [%4 + %8], %%g1\n\t" \ - "wrpr %%g1, %%cwp\n\t" \ - "ldx [%%g6 + %6], %%o6\n\t" \ - "ldub [%%g6 + %5], %%o5\n\t" \ - "ldub [%%g6 + %7], %%o7\n\t" \ - "wrpr %%o5, 0x0, %%wstate\n\t" \ - "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ - "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ - "ldx [%%g6 + %9], %%g4\n\t" \ - "brz,pt %%o7, switch_to_pc\n\t" \ - " mov %%g7, %0\n\t" \ - "sethi %%hi(ret_from_syscall), %%g1\n\t" \ - "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ - " nop\n\t" \ - ".globl switch_to_pc\n\t" \ - "switch_to_pc:\n\t" \ - : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ - "=r" (__local_per_cpu_offset) \ - : "0" (task_thread_info(next)), \ - "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ - "i" (TI_CWP), "i" (TI_TASK) \ - : "cc", \ - "g1", "g2", "g3", "g7", \ - "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ - "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ - /* If you fuck with this, update ret_from_syscall code too. */ \ - if (test_thread_flag(TIF_PERFCTR)) { \ - write_pcr(current_thread_info()->pcr_reg); \ - reset_pic(); \ - } \ -} while(0) - -static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -" mov %0, %1\n" -"1: lduw [%4], %2\n" -" cas [%4], %2, %0\n" -" cmp %2, %0\n" -" bne,a,pn %%icc, 1b\n" -" mov %1, %0\n" -" membar #StoreLoad | #StoreStore\n" - : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) - : "0" (val), "r" (m) - : "cc", "memory"); - return val; -} - -static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -" mov %0, %1\n" -"1: ldx [%4], %2\n" -" casx [%4], %2, %0\n" -" cmp %2, %0\n" -" bne,a,pn %%xcc, 1b\n" -" mov %1, %0\n" -" membar #StoreLoad | #StoreStore\n" - : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) - : "0" (val), "r" (m) - : "cc", "memory"); - return val; -} - -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, - int size) -{ - switch (size) { - case 4: - return xchg32(ptr, x); - case 8: - return xchg64(ptr, x); - }; - __xchg_called_with_bad_pointer(); - return x; -} - -extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); - -/* - * Atomic compare and exchange. Compare OLD with MEM, if identical, - * store NEW in MEM. Return the initial value in MEM. Success is - * indicated by comparing RETURN with OLD. - */ - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long -__cmpxchg_u32(volatile int *m, int old, int new) -{ - __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" - "cas [%2], %3, %0\n\t" - "membar #StoreLoad | #StoreStore" - : "=&r" (new) - : "0" (new), "r" (m), "r" (old) - : "memory"); - - return new; -} - -static inline unsigned long -__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) -{ - __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" - "casx [%2], %3, %0\n\t" - "membar #StoreLoad | #StoreStore" - : "=&r" (new) - : "0" (new), "r" (m), "r" (old) - : "memory"); - - return new; -} - -/* This function doesn't exist, so you'll get a linker error - if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - case 8: - return __cmpxchg_u64(ptr, old, new); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - case 8: return __cmpxchg(ptr, old, new, size); - default: - return __cmpxchg_local_generic(ptr, old, new, size); - } - - return old; -} - -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) - -#endif /* !(__ASSEMBLY__) */ - -#define arch_align_stack(x) (x) - -#endif /* !(__SPARC64_SYSTEM_H) */ diff --git a/include/asm-sparc/termbits.h b/include/asm-sparc/termbits.h deleted file mode 100644 index d6ca3e2..0000000 --- a/include/asm-sparc/termbits.h +++ /dev/null @@ -1,266 +0,0 @@ -#ifndef _SPARC_TERMBITS_H -#define _SPARC_TERMBITS_H - -#include - -typedef unsigned char cc_t; -typedef unsigned int speed_t; - -#if defined(__sparc__) && defined(__arch64__) -typedef unsigned int tcflag_t; -#else -typedef unsigned long tcflag_t; -#endif - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -#define NCCS 17 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -#ifdef __KERNEL__ -#define SIZEOF_USER_TERMIOS sizeof (struct termios) - (2*sizeof (cc_t)) - cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ -#endif -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - cc_t _x_cc[2]; /* padding to match ktermios */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - cc_t _x_cc[2]; /* We need them to hold vmin/vtime */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VEOL 5 -#define VEOL2 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 - - - -#define VSUSP 10 -#define VDSUSP 11 /* SunOS POSIX nicety I do believe... */ -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 - -/* Kernel keeps vmin/vtime separated, user apps assume vmin/vtime is - * shared with eof/eol - */ -#ifdef __KERNEL__ -#define VMIN 16 -#define VTIME 17 -#else -#define VMIN VEOF -#define VTIME VEOL -#endif - -/* c_iflag bits */ -#define IGNBRK 0x00000001 -#define BRKINT 0x00000002 -#define IGNPAR 0x00000004 -#define PARMRK 0x00000008 -#define INPCK 0x00000010 -#define ISTRIP 0x00000020 -#define INLCR 0x00000040 -#define IGNCR 0x00000080 -#define ICRNL 0x00000100 -#define IUCLC 0x00000200 -#define IXON 0x00000400 -#define IXANY 0x00000800 -#define IXOFF 0x00001000 -#define IMAXBEL 0x00002000 -#define IUTF8 0x00004000 - -/* c_oflag bits */ -#define OPOST 0x00000001 -#define OLCUC 0x00000002 -#define ONLCR 0x00000004 -#define OCRNL 0x00000008 -#define ONOCR 0x00000010 -#define ONLRET 0x00000020 -#define OFILL 0x00000040 -#define OFDEL 0x00000080 -#define NLDLY 0x00000100 -#define NL0 0x00000000 -#define NL1 0x00000100 -#define CRDLY 0x00000600 -#define CR0 0x00000000 -#define CR1 0x00000200 -#define CR2 0x00000400 -#define CR3 0x00000600 -#define TABDLY 0x00001800 -#define TAB0 0x00000000 -#define TAB1 0x00000800 -#define TAB2 0x00001000 -#define TAB3 0x00001800 -#define XTABS 0x00001800 -#define BSDLY 0x00002000 -#define BS0 0x00000000 -#define BS1 0x00002000 -#define VTDLY 0x00004000 -#define VT0 0x00000000 -#define VT1 0x00004000 -#define FFDLY 0x00008000 -#define FF0 0x00000000 -#define FF1 0x00008000 -#define PAGEOUT 0x00010000 /* SUNOS specific */ -#define WRAP 0x00020000 /* SUNOS specific */ - -/* c_cflag bit meaning */ -#define CBAUD 0x0000100f -#define B0 0x00000000 /* hang up */ -#define B50 0x00000001 -#define B75 0x00000002 -#define B110 0x00000003 -#define B134 0x00000004 -#define B150 0x00000005 -#define B200 0x00000006 -#define B300 0x00000007 -#define B600 0x00000008 -#define B1200 0x00000009 -#define B1800 0x0000000a -#define B2400 0x0000000b -#define B4800 0x0000000c -#define B9600 0x0000000d -#define B19200 0x0000000e -#define B38400 0x0000000f -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0x00000030 -#define CS5 0x00000000 -#define CS6 0x00000010 -#define CS7 0x00000020 -#define CS8 0x00000030 -#define CSTOPB 0x00000040 -#define CREAD 0x00000080 -#define PARENB 0x00000100 -#define PARODD 0x00000200 -#define HUPCL 0x00000400 -#define CLOCAL 0x00000800 -#define CBAUDEX 0x00001000 -/* We'll never see these speeds with the Zilogs, but for completeness... */ -#define BOTHER 0x00001000 -#define B57600 0x00001001 -#define B115200 0x00001002 -#define B230400 0x00001003 -#define B460800 0x00001004 -/* This is what we can do with the Zilogs. */ -#define B76800 0x00001005 -/* This is what we can do with the SAB82532. */ -#define B153600 0x00001006 -#define B307200 0x00001007 -#define B614400 0x00001008 -#define B921600 0x00001009 -/* And these are the rest... */ -#define B500000 0x0000100a -#define B576000 0x0000100b -#define B1000000 0x0000100c -#define B1152000 0x0000100d -#define B1500000 0x0000100e -#define B2000000 0x0000100f -/* These have totally bogus values and nobody uses them - so far. Later on we'd have to use say 0x10000x and - adjust CBAUD constant and drivers accordingly. -#define B2500000 0x00001010 -#define B3000000 0x00001011 -#define B3500000 0x00001012 -#define B4000000 0x00001013 */ -#define CIBAUD 0x100f0000 /* input baud rate (not used) */ -#define CMSPAR 0x40000000 /* mark or space (stick) parity */ -#define CRTSCTS 0x80000000 /* flow control */ - -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -/* c_lflag bits */ -#define ISIG 0x00000001 -#define ICANON 0x00000002 -#define XCASE 0x00000004 -#define ECHO 0x00000008 -#define ECHOE 0x00000010 -#define ECHOK 0x00000020 -#define ECHONL 0x00000040 -#define NOFLSH 0x00000080 -#define TOSTOP 0x00000100 -#define ECHOCTL 0x00000200 -#define ECHOPRT 0x00000400 -#define ECHOKE 0x00000800 -#define DEFECHO 0x00001000 /* SUNOS thing, what is it? */ -#define FLUSHO 0x00002000 -#define PENDIN 0x00004000 -#define IEXTEN 0x00008000 - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* !(_SPARC_TERMBITS_H) */ diff --git a/include/asm-sparc/termios.h b/include/asm-sparc/termios.h deleted file mode 100644 index e8ba953..0000000 --- a/include/asm-sparc/termios.h +++ /dev/null @@ -1,186 +0,0 @@ -#ifndef _SPARC_TERMIOS_H -#define _SPARC_TERMIOS_H - -#include -#include - -#if defined(__KERNEL__) || defined(__DEFINE_BSD_TERMIOS) -struct sgttyb { - char sg_ispeed; - char sg_ospeed; - char sg_erase; - char sg_kill; - short sg_flags; -}; - -struct tchars { - char t_intrc; - char t_quitc; - char t_startc; - char t_stopc; - char t_eofc; - char t_brkc; -}; - -struct ltchars { - char t_suspc; - char t_dsuspc; - char t_rprntc; - char t_flushc; - char t_werasc; - char t_lnextc; -}; -#endif /* __KERNEL__ */ - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#ifdef __KERNEL__ -#include - -/* - * c_cc characters in the termio structure. Oh, how I love being - * backwardly compatible. Notice that character 4 and 5 are - * interpreted differently depending on whether ICANON is set in - * c_lflag. If it's set, they are used as _VEOF and _VEOL, otherwise - * as _VMIN and V_TIME. This is for compatibility with OSF/1 (which - * is compatible with sysV)... - */ -#define _VMIN 4 -#define _VTIME 5 - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D eol=\0 eol2=\0 sxtc=\0 - start=^Q stop=^S susp=^Z dsusp=^Y - reprint=^R discard=^U werase=^W lnext=^V - vmin=\1 vtime=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\000\000\000\021\023\032\031\022\025\027\026\001" - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - unsigned short tmp; \ - int err; \ - err = get_user(tmp, &(termio)->c_iflag); \ - (termios)->c_iflag = (0xffff0000 & ((termios)->c_iflag)) | tmp; \ - err |= get_user(tmp, &(termio)->c_oflag); \ - (termios)->c_oflag = (0xffff0000 & ((termios)->c_oflag)) | tmp; \ - err |= get_user(tmp, &(termio)->c_cflag); \ - (termios)->c_cflag = (0xffff0000 & ((termios)->c_cflag)) | tmp; \ - err |= get_user(tmp, &(termio)->c_lflag); \ - (termios)->c_lflag = (0xffff0000 & ((termios)->c_lflag)) | tmp; \ - err |= copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ - err; \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - * - * Note the "fun" _VMIN overloading. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - int err; \ - err = put_user((termios)->c_iflag, &(termio)->c_iflag); \ - err |= put_user((termios)->c_oflag, &(termio)->c_oflag); \ - err |= put_user((termios)->c_cflag, &(termio)->c_cflag); \ - err |= put_user((termios)->c_lflag, &(termio)->c_lflag); \ - err |= put_user((termios)->c_line, &(termio)->c_line); \ - err |= copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ - if (!((termios)->c_lflag & ICANON)) { \ - err |= put_user((termios)->c_cc[VMIN], &(termio)->c_cc[_VMIN]); \ - err |= put_user((termios)->c_cc[VTIME], &(termio)->c_cc[_VTIME]); \ - } \ - err; \ -}) - -#define user_termios_to_kernel_termios(k, u) \ -({ \ - int err; \ - err = get_user((k)->c_iflag, &(u)->c_iflag); \ - err |= get_user((k)->c_oflag, &(u)->c_oflag); \ - err |= get_user((k)->c_cflag, &(u)->c_cflag); \ - err |= get_user((k)->c_lflag, &(u)->c_lflag); \ - err |= get_user((k)->c_line, &(u)->c_line); \ - err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ - if ((k)->c_lflag & ICANON) { \ - err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ - err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ - } else { \ - err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ - err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ - } \ - err |= get_user((k)->c_ispeed, &(u)->c_ispeed); \ - err |= get_user((k)->c_ospeed, &(u)->c_ospeed); \ - err; \ -}) - -#define kernel_termios_to_user_termios(u, k) \ -({ \ - int err; \ - err = put_user((k)->c_iflag, &(u)->c_iflag); \ - err |= put_user((k)->c_oflag, &(u)->c_oflag); \ - err |= put_user((k)->c_cflag, &(u)->c_cflag); \ - err |= put_user((k)->c_lflag, &(u)->c_lflag); \ - err |= put_user((k)->c_line, &(u)->c_line); \ - err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ - if (!((k)->c_lflag & ICANON)) { \ - err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ - err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ - } else { \ - err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ - err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ - } \ - err |= put_user((k)->c_ispeed, &(u)->c_ispeed); \ - err |= put_user((k)->c_ospeed, &(u)->c_ospeed); \ - err; \ -}) - -#define user_termios_to_kernel_termios_1(k, u) \ -({ \ - int err; \ - err = get_user((k)->c_iflag, &(u)->c_iflag); \ - err |= get_user((k)->c_oflag, &(u)->c_oflag); \ - err |= get_user((k)->c_cflag, &(u)->c_cflag); \ - err |= get_user((k)->c_lflag, &(u)->c_lflag); \ - err |= get_user((k)->c_line, &(u)->c_line); \ - err |= copy_from_user((k)->c_cc, (u)->c_cc, NCCS); \ - if ((k)->c_lflag & ICANON) { \ - err |= get_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ - err |= get_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ - } else { \ - err |= get_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ - err |= get_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ - } \ - err; \ -}) - -#define kernel_termios_to_user_termios_1(u, k) \ -({ \ - int err; \ - err = put_user((k)->c_iflag, &(u)->c_iflag); \ - err |= put_user((k)->c_oflag, &(u)->c_oflag); \ - err |= put_user((k)->c_cflag, &(u)->c_cflag); \ - err |= put_user((k)->c_lflag, &(u)->c_lflag); \ - err |= put_user((k)->c_line, &(u)->c_line); \ - err |= copy_to_user((u)->c_cc, (k)->c_cc, NCCS); \ - if (!((k)->c_lflag & ICANON)) { \ - err |= put_user((k)->c_cc[VMIN], &(u)->c_cc[_VMIN]); \ - err |= put_user((k)->c_cc[VTIME], &(u)->c_cc[_VTIME]); \ - } else { \ - err |= put_user((k)->c_cc[VEOF], &(u)->c_cc[VEOF]); \ - err |= put_user((k)->c_cc[VEOL], &(u)->c_cc[VEOL]); \ - } \ - err; \ -}) - -#endif /* __KERNEL__ */ - -#endif /* _SPARC_TERMIOS_H */ diff --git a/include/asm-sparc/thread_info.h b/include/asm-sparc/thread_info.h deleted file mode 100644 index 64155cf..0000000 --- a/include/asm-sparc/thread_info.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_THREAD_INFO_H -#define ___ASM_SPARC_THREAD_INFO_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/thread_info_32.h b/include/asm-sparc/thread_info_32.h deleted file mode 100644 index 2cf9db0..0000000 --- a/include/asm-sparc/thread_info_32.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * thread_info.h: sparc low-level thread information - * adapted from the ppc version by Pete Zaitcev, which was - * adapted from the i386 version by Paul Mackerras - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -/* - * Low level task data. - * - * If you change this, change the TI_* offsets below to match. - */ -#define NSWINS 8 -struct thread_info { - unsigned long uwinmask; - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, - <0 => BUG */ - int softirq_count; - int hardirq_count; - - /* Context switch saved kernel state. */ - unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ - unsigned long kpc; - unsigned long kpsr; - unsigned long kwim; - - /* A place to store user windows and stack pointers - * when the stack needs inspection. - */ - struct reg_window reg_window[NSWINS]; /* align for ldd! */ - unsigned long rwbuf_stkptrs[NSWINS]; - unsigned long w_saved; - - struct restart_block restart_block; -}; - -/* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. - */ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .uwinmask = 0, \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the thread information struct from C */ -register struct thread_info *current_thread_info_reg asm("g6"); -#define current_thread_info() (current_thread_info_reg) - -/* - * thread information allocation - */ -#if PAGE_SHIFT == 13 -#define THREAD_INFO_ORDER 0 -#else /* PAGE_SHIFT */ -#define THREAD_INFO_ORDER 1 -#endif - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) -#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() - -BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) -#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) - -#endif /* __ASSEMBLY__ */ - -/* - * Size of kernel stack for each process. - * Observe the order of get_free_pages() in alloc_thread_info(). - * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. - */ -#define THREAD_SIZE 8192 - -/* - * Offsets in thread_info structure, used in assembly code - * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. - */ -#define TI_UWINMASK 0x00 /* uwinmask */ -#define TI_TASK 0x04 -#define TI_EXECDOMAIN 0x08 /* exec_domain */ -#define TI_FLAGS 0x0c -#define TI_CPU 0x10 -#define TI_PREEMPT 0x14 /* preempt_count */ -#define TI_SOFTIRQ 0x18 /* softirq_count */ -#define TI_HARDIRQ 0x1c /* hardirq_count */ -#define TI_KSP 0x20 /* ksp */ -#define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ -#define TI_KPSR 0x28 /* kpsr */ -#define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ -#define TI_REG_WINDOW 0x30 -#define TI_RWIN_SPTRS 0x230 -#define TI_W_SAVED 0x250 -/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ - -#define PREEMPT_ACTIVE 0x4000000 - -/* - * thread information flag bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -/* flag bit 1 is available */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ -#define TIF_USEDFPU 8 /* FPU was used by this task - * this quantum (SMP) */ -#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling - * TIF_NEED_RESCHED */ -#define TIF_MEMDIE 10 - -/* as above, but as bit values */ -#define _TIF_SYSCALL_TRACE (1< - -#ifndef __ASSEMBLY__ - -#include -#include - -struct task_struct; -struct exec_domain; - -struct thread_info { - /* D$ line 1 */ - struct task_struct *task; - unsigned long flags; - __u8 fpsaved[7]; - __u8 status; - unsigned long ksp; - - /* D$ line 2 */ - unsigned long fault_address; - struct pt_regs *kregs; - struct exec_domain *exec_domain; - int preempt_count; /* 0 => preemptable, <0 => BUG */ - __u8 new_child; - __u8 syscall_noerror; - __u16 cpu; - - unsigned long *utraps; - - struct reg_window reg_window[NSWINS]; - unsigned long rwbuf_stkptrs[NSWINS]; - - unsigned long gsr[7]; - unsigned long xfsr[7]; - - __u64 __user *user_cntd0; - __u64 __user *user_cntd1; - __u64 kernel_cntd0, kernel_cntd1; - __u64 pcr_reg; - - struct restart_block restart_block; - - struct pt_regs *kern_una_regs; - unsigned int kern_una_insn; - - unsigned long fpregs[0] __attribute__ ((aligned(64))); -}; - -#endif /* !(__ASSEMBLY__) */ - -/* offsets into the thread_info struct for assembly code access */ -#define TI_TASK 0x00000000 -#define TI_FLAGS 0x00000008 -#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) -#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) -#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) -#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) -#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) -#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) -#define TI_FPSAVED 0x00000010 -#define TI_KSP 0x00000018 -#define TI_FAULT_ADDR 0x00000020 -#define TI_KREGS 0x00000028 -#define TI_EXEC_DOMAIN 0x00000030 -#define TI_PRE_COUNT 0x00000038 -#define TI_NEW_CHILD 0x0000003c -#define TI_SYS_NOERROR 0x0000003d -#define TI_CPU 0x0000003e -#define TI_UTRAPS 0x00000040 -#define TI_REG_WINDOW 0x00000048 -#define TI_RWIN_SPTRS 0x000003c8 -#define TI_GSR 0x00000400 -#define TI_XFSR 0x00000438 -#define TI_USER_CNTD0 0x00000470 -#define TI_USER_CNTD1 0x00000478 -#define TI_KERN_CNTD0 0x00000480 -#define TI_KERN_CNTD1 0x00000488 -#define TI_PCR 0x00000490 -#define TI_RESTART_BLOCK 0x00000498 -#define TI_KUNA_REGS 0x000004c0 -#define TI_KUNA_INSN 0x000004c8 -#define TI_FPREGS 0x00000500 - -/* We embed this in the uppermost byte of thread_info->flags */ -#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ -#define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ -#define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ -#define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ -#define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ - -#if PAGE_SHIFT == 13 -#define THREAD_SIZE (2*PAGE_SIZE) -#define THREAD_SHIFT (PAGE_SHIFT + 1) -#else /* PAGE_SHIFT == 13 */ -#define THREAD_SIZE PAGE_SIZE -#define THREAD_SHIFT PAGE_SHIFT -#endif /* PAGE_SHIFT == 13 */ - -#define PREEMPT_ACTIVE 0x4000000 - -/* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. - */ -#ifndef __ASSEMBLY__ - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ - .exec_domain = &default_exec_domain, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the thread information struct from C */ -register struct thread_info *current_thread_info_reg asm("g6"); -#define current_thread_info() (current_thread_info_reg) - -/* thread information allocation */ -#if PAGE_SHIFT == 13 -#define __THREAD_INFO_ORDER 1 -#else /* PAGE_SHIFT == 13 */ -#define __THREAD_INFO_ORDER 0 -#endif /* PAGE_SHIFT == 13 */ - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -#ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ -({ \ - struct thread_info *ret; \ - \ - ret = (struct thread_info *) \ - __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ - if (ret) \ - memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ - ret; \ -}) -#else -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) -#endif - -#define free_thread_info(ti) \ - free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) - -#define __thread_flag_byte_ptr(ti) \ - ((unsigned char *)(&((ti)->flags))) -#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) - -#define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) -#define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) -#define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) -#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) -#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) -#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) -#define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) -#define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) -#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) -#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) -#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) -#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) - -#endif /* !(__ASSEMBLY__) */ - -/* - * Thread information flags, only 16 bits are available as we encode - * other values into the upper 6 bytes. - * - * On trap return we need to test several values: - * - * user: need_resched, notify_resume, sigpending, wsaved, perfctr - * kernel: fpdepth - * - * So to check for work in the kernel case we simply load the fpdepth - * byte out of the flags and test it. For the user case we encode the - * lower 3 bytes of flags as follows: - * ---------------------------------------- - * | wsaved | flags byte 1 | flags byte 2 | - * ---------------------------------------- - * This optimizes the user test into: - * ldx [%g6 + TI_FLAGS], REG1 - * sethi %hi(_TIF_USER_WORK_MASK), REG2 - * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 - * andcc REG1, REG2, %g0 - * be,pt no_work_to_do - * nop - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -/* flags bit 1 is available */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_PERFCTR 4 /* performance counters active */ -#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ -/* flag bit 6 is available */ -#define TIF_32BIT 7 /* 32-bit binary */ -/* flag bit 8 is available */ -#define TIF_SECCOMP 9 /* secure computing */ -#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ -/* flag bit 11 is available */ -/* NOTE: Thread flags >= 12 should be ones we have no interest - * in using in assembly, else we can't use the mask as - * an immediate value in instructions such as andcc. - */ -#define TIF_ABI_PENDING 12 -#define TIF_MEMDIE 13 -#define TIF_POLLING_NRFLAG 14 - -#define _TIF_SYSCALL_TRACE (1<status |= TS_RESTORE_SIGMASK; - set_bit(TIF_SIGPENDING, &ti->flags); -} -#endif /* !__ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_THREAD_INFO_H */ diff --git a/include/asm-sparc/timer.h b/include/asm-sparc/timer.h deleted file mode 100644 index 475baa0..0000000 --- a/include/asm-sparc/timer.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_TIMER_H -#define ___ASM_SPARC_TIMER_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/timer_32.h b/include/asm-sparc/timer_32.h deleted file mode 100644 index 361e538..0000000 --- a/include/asm-sparc/timer_32.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * timer.h: Definitions for the timer chips on the Sparc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - - -#ifndef _SPARC_TIMER_H -#define _SPARC_TIMER_H - -#include /* For SUN4M_NCPUS */ -#include -#include - -/* Timer structures. The interrupt timer has two properties which - * are the counter (which is handled in do_timer in sched.c) and the limit. - * This limit is where the timer's counter 'wraps' around. Oddly enough, - * the sun4c timer when it hits the limit wraps back to 1 and not zero - * thus when calculating the value at which it will fire a microsecond you - * must adjust by one. Thanks SUN for designing such great hardware ;( - */ - -/* Note that I am only going to use the timer that interrupts at - * Sparc IRQ 10. There is another one available that can fire at - * IRQ 14. Currently it is left untouched, we keep the PROM's limit - * register value and let the prom take these interrupts. This allows - * L1-A to work. - */ - -struct sun4c_timer_info { - __volatile__ unsigned int cur_count10; - __volatile__ unsigned int timer_limit10; - __volatile__ unsigned int cur_count14; - __volatile__ unsigned int timer_limit14; -}; - -#define SUN4C_TIMER_PHYSADDR 0xf3000000 -#ifdef CONFIG_SUN4 -#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR -#else -#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR -#endif - -/* A sun4m has two blocks of registers which are probably of the same - * structure. LSI Logic's L64851 is told to _decrement_ from the limit - * value. Aurora behaves similarly but its limit value is compacted in - * other fashion (it's wider). Documented fields are defined here. - */ - -/* As with the interrupt register, we have two classes of timer registers - * which are per-cpu and master. Per-cpu timers only hit that cpu and are - * only level 14 ticks, master timer hits all cpus and is level 10. - */ - -#define SUN4M_PRM_CNT_L 0x80000000 -#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 - -struct sun4m_timer_percpu_info { - __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ - __volatile__ unsigned int l14_cur_count; - - /* This register appears to be write only and/or inaccessible - * on Uni-Processor sun4m machines. - */ - __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ - - __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ - __volatile__ unsigned char space[PAGE_SIZE - 16]; -}; - -struct sun4m_timer_regs { - struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; - volatile unsigned int l10_timer_limit; - volatile unsigned int l10_cur_count; - - /* Again, this appears to be write only and/or inaccessible - * on uni-processor sun4m machines. - */ - volatile unsigned int l10_limit_noclear; - - /* This register too, it must be magic. */ - volatile unsigned int foobar; - - volatile unsigned int cfg; /* equals zero at boot time... */ -}; - -#define SUN4D_PRM_CNT_L 0x80000000 -#define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 - -struct sun4d_timer_regs { - volatile unsigned int l10_timer_limit; - volatile unsigned int l10_cur_countx; - volatile unsigned int l10_limit_noclear; - volatile unsigned int ctrl; - volatile unsigned int l10_cur_count; -}; - -extern struct sun4d_timer_regs *sun4d_timers; - -extern __volatile__ unsigned int *master_l10_counter; -extern __volatile__ unsigned int *master_l10_limit; - -/* FIXME: Make do_[gs]ettimeofday btfixup calls */ -BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) -#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) - -#endif /* !(_SPARC_TIMER_H) */ diff --git a/include/asm-sparc/timer_64.h b/include/asm-sparc/timer_64.h deleted file mode 100644 index 5b779fd..0000000 --- a/include/asm-sparc/timer_64.h +++ /dev/null @@ -1,30 +0,0 @@ -/* timer.h: System timer definitions for sun5. - * - * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_TIMER_H -#define _SPARC64_TIMER_H - -#include -#include - -struct sparc64_tick_ops { - unsigned long (*get_tick)(void); - int (*add_compare)(unsigned long); - unsigned long softint_mask; - void (*disable_irq)(void); - - void (*init_tick)(void); - unsigned long (*add_tick)(unsigned long); - - char *name; -}; - -extern struct sparc64_tick_ops *tick_ops; - -extern unsigned long sparc64_get_clock_tick(unsigned int cpu); -extern void __devinit setup_sparc64_timer(void); -extern void __init time_init(void); - -#endif /* _SPARC64_TIMER_H */ diff --git a/include/asm-sparc/timex.h b/include/asm-sparc/timex.h deleted file mode 100644 index 01d9f19..0000000 --- a/include/asm-sparc/timex.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_TIMEX_H -#define ___ASM_SPARC_TIMEX_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/timex_32.h b/include/asm-sparc/timex_32.h deleted file mode 100644 index 71b45c9..0000000 --- a/include/asm-sparc/timex_32.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * linux/include/asm-sparc/timex.h - * - * sparc architecture timex specifications - */ -#ifndef _ASMsparc_TIMEX_H -#define _ASMsparc_TIMEX_H - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -/* XXX Maybe do something better at some point... -DaveM */ -typedef unsigned long cycles_t; -#define get_cycles() (0) - -#endif diff --git a/include/asm-sparc/timex_64.h b/include/asm-sparc/timex_64.h deleted file mode 100644 index c622535..0000000 --- a/include/asm-sparc/timex_64.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-sparc64/timex.h - * - * sparc64 architecture timex specifications - */ -#ifndef _ASMsparc64_TIMEX_H -#define _ASMsparc64_TIMEX_H - -#include - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -/* Getting on the cycle counter on sparc64. */ -typedef unsigned long cycles_t; -#define get_cycles() tick_ops->get_tick() - -#define ARCH_HAS_READ_CURRENT_TIMER - -#endif diff --git a/include/asm-sparc/tlb.h b/include/asm-sparc/tlb.h deleted file mode 100644 index a821057..0000000 --- a/include/asm-sparc/tlb.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_TLB_H -#define ___ASM_SPARC_TLB_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/tlb_32.h b/include/asm-sparc/tlb_32.h deleted file mode 100644 index 6d02d1c..0000000 --- a/include/asm-sparc/tlb_32.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _SPARC_TLB_H -#define _SPARC_TLB_H - -#define tlb_start_vma(tlb, vma) \ -do { \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - -#define tlb_end_vma(tlb, vma) \ -do { \ - flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - -#define __tlb_remove_tlb_entry(tlb, pte, address) \ - do { } while (0) - -#define tlb_flush(tlb) \ -do { \ - flush_tlb_mm((tlb)->mm); \ -} while (0) - -#include - -#endif /* _SPARC_TLB_H */ diff --git a/include/asm-sparc/tlb_64.h b/include/asm-sparc/tlb_64.h deleted file mode 100644 index ec81cde..0000000 --- a/include/asm-sparc/tlb_64.h +++ /dev/null @@ -1,111 +0,0 @@ -#ifndef _SPARC64_TLB_H -#define _SPARC64_TLB_H - -#include -#include -#include -#include -#include - -#define TLB_BATCH_NR 192 - -/* - * For UP we don't need to worry about TLB flush - * and page free order so much.. - */ -#ifdef CONFIG_SMP - #define FREE_PTE_NR 506 - #define tlb_fast_mode(bp) ((bp)->pages_nr == ~0U) -#else - #define FREE_PTE_NR 1 - #define tlb_fast_mode(bp) 1 -#endif - -struct mmu_gather { - struct mm_struct *mm; - unsigned int pages_nr; - unsigned int need_flush; - unsigned int fullmm; - unsigned int tlb_nr; - unsigned long vaddrs[TLB_BATCH_NR]; - struct page *pages[FREE_PTE_NR]; -}; - -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - -#ifdef CONFIG_SMP -extern void smp_flush_tlb_pending(struct mm_struct *, - unsigned long, unsigned long *); -#endif - -extern void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *); -extern void flush_tlb_pending(void); - -static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) -{ - struct mmu_gather *mp = &get_cpu_var(mmu_gathers); - - BUG_ON(mp->tlb_nr); - - mp->mm = mm; - mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U; - mp->fullmm = full_mm_flush; - - return mp; -} - - -static inline void tlb_flush_mmu(struct mmu_gather *mp) -{ - if (mp->need_flush) { - free_pages_and_swap_cache(mp->pages, mp->pages_nr); - mp->pages_nr = 0; - mp->need_flush = 0; - } - -} - -#ifdef CONFIG_SMP -extern void smp_flush_tlb_mm(struct mm_struct *mm); -#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm) -#else -#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT) -#endif - -static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end) -{ - tlb_flush_mmu(mp); - - if (mp->fullmm) - mp->fullmm = 0; - else - flush_tlb_pending(); - - /* keep the page table cache within bounds */ - check_pgt_cache(); - - put_cpu_var(mmu_gathers); -} - -static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page) -{ - if (tlb_fast_mode(mp)) { - free_page_and_swap_cache(page); - return; - } - mp->need_flush = 1; - mp->pages[mp->pages_nr++] = page; - if (mp->pages_nr >= FREE_PTE_NR) - tlb_flush_mmu(mp); -} - -#define tlb_remove_tlb_entry(mp,ptep,addr) do { } while (0) -#define pte_free_tlb(mp, ptepage) pte_free((mp)->mm, ptepage) -#define pmd_free_tlb(mp, pmdp) pmd_free((mp)->mm, pmdp) -#define pud_free_tlb(tlb,pudp) __pud_free_tlb(tlb,pudp) - -#define tlb_migrate_finish(mm) do { } while (0) -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) - -#endif /* _SPARC64_TLB_H */ diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h deleted file mode 100644 index 6e6bc12..0000000 --- a/include/asm-sparc/tlbflush.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_TLBFLUSH_H -#define ___ASM_SPARC_TLBFLUSH_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/tlbflush_32.h b/include/asm-sparc/tlbflush_32.h deleted file mode 100644 index fe0a71a..0000000 --- a/include/asm-sparc/tlbflush_32.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef _SPARC_TLBFLUSH_H -#define _SPARC_TLBFLUSH_H - -#include -// #include - -/* - * TLB flushing: - * - * - flush_tlb() flushes the current mm struct TLBs XXX Exists? - * - flush_tlb_all() flushes all processes TLBs - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - */ - -#ifdef CONFIG_SMP - -BTFIXUPDEF_CALL(void, local_flush_tlb_all, void) -BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long) - -#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)() -#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm) -#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end) -#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr) - -extern void smp_flush_tlb_all(void); -extern void smp_flush_tlb_mm(struct mm_struct *mm); -extern void smp_flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, - unsigned long end); -extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); - -#endif /* CONFIG_SMP */ - -BTFIXUPDEF_CALL(void, flush_tlb_all, void) -BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) - -#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() -#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) -#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) -#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr) - -// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */ - -/* - * This is a kludge, until I know better. --zaitcev XXX - */ -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ - flush_tlb_all(); -} - -#endif /* _SPARC_TLBFLUSH_H */ diff --git a/include/asm-sparc/tlbflush_64.h b/include/asm-sparc/tlbflush_64.h deleted file mode 100644 index fbb675d..0000000 --- a/include/asm-sparc/tlbflush_64.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef _SPARC64_TLBFLUSH_H -#define _SPARC64_TLBFLUSH_H - -#include -#include - -/* TSB flush operations. */ -struct mmu_gather; -extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); -extern void flush_tsb_user(struct mmu_gather *mp); - -/* TLB flush operations. */ - -extern void flush_tlb_pending(void); - -#define flush_tlb_range(vma,start,end) \ - do { (void)(start); flush_tlb_pending(); } while (0) -#define flush_tlb_page(vma,addr) flush_tlb_pending() -#define flush_tlb_mm(mm) flush_tlb_pending() - -/* Local cpu only. */ -extern void __flush_tlb_all(void); - -extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#ifndef CONFIG_SMP - -#define flush_tlb_kernel_range(start,end) \ -do { flush_tsb_kernel_range(start,end); \ - __flush_tlb_kernel_range(start,end); \ -} while (0) - -#else /* CONFIG_SMP */ - -extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#define flush_tlb_kernel_range(start, end) \ -do { flush_tsb_kernel_range(start,end); \ - smp_flush_tlb_kernel_range(start, end); \ -} while (0) - -#endif /* ! CONFIG_SMP */ - -#endif /* _SPARC64_TLBFLUSH_H */ diff --git a/include/asm-sparc/topology.h b/include/asm-sparc/topology.h deleted file mode 100644 index ed13630..0000000 --- a/include/asm-sparc/topology.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_TOPOLOGY_H -#define ___ASM_SPARC_TOPOLOGY_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/topology_32.h b/include/asm-sparc/topology_32.h deleted file mode 100644 index ee5ac9c..0000000 --- a/include/asm-sparc/topology_32.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_SPARC_TOPOLOGY_H -#define _ASM_SPARC_TOPOLOGY_H - -#include - -#endif /* _ASM_SPARC_TOPOLOGY_H */ diff --git a/include/asm-sparc/topology_64.h b/include/asm-sparc/topology_64.h deleted file mode 100644 index 001c040..0000000 --- a/include/asm-sparc/topology_64.h +++ /dev/null @@ -1,86 +0,0 @@ -#ifndef _ASM_SPARC64_TOPOLOGY_H -#define _ASM_SPARC64_TOPOLOGY_H - -#ifdef CONFIG_NUMA - -#include - -static inline int cpu_to_node(int cpu) -{ - return numa_cpu_lookup_table[cpu]; -} - -#define parent_node(node) (node) - -static inline cpumask_t node_to_cpumask(int node) -{ - return numa_cpumask_lookup_table[node]; -} - -/* Returns a pointer to the cpumask of CPUs on Node 'node'. */ -#define node_to_cpumask_ptr(v, node) \ - cpumask_t *v = &(numa_cpumask_lookup_table[node]) - -#define node_to_cpumask_ptr_next(v, node) \ - v = &(numa_cpumask_lookup_table[node]) - -static inline int node_to_first_cpu(int node) -{ - cpumask_t tmp; - tmp = node_to_cpumask(node); - return first_cpu(tmp); -} - -struct pci_bus; -#ifdef CONFIG_PCI -extern int pcibus_to_node(struct pci_bus *pbus); -#else -static inline int pcibus_to_node(struct pci_bus *pbus) -{ - return -1; -} -#endif - -#define pcibus_to_cpumask(bus) \ - (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus))) - -#define SD_NODE_INIT (struct sched_domain) { \ - .min_interval = 8, \ - .max_interval = 32, \ - .busy_factor = 32, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 3, \ - .idle_idx = 2, \ - .newidle_idx = 0, \ - .wake_idx = 1, \ - .forkexec_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_FORK \ - | SD_BALANCE_EXEC \ - | SD_SERIALIZE \ - | SD_WAKE_BALANCE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ -} - -#else /* CONFIG_NUMA */ - -#include - -#endif /* !(CONFIG_NUMA) */ - -#ifdef CONFIG_SMP -#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id) -#define topology_core_id(cpu) (cpu_data(cpu).core_id) -#define topology_core_siblings(cpu) (cpu_core_map[cpu]) -#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) -#define mc_capable() (sparc64_multi_core) -#define smt_capable() (sparc64_multi_core) -#endif /* CONFIG_SMP */ - -#define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) - -#endif /* _ASM_SPARC64_TOPOLOGY_H */ diff --git a/include/asm-sparc/traps.h b/include/asm-sparc/traps.h deleted file mode 100644 index bebdbf8..0000000 --- a/include/asm-sparc/traps.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * traps.h: Format of entries for the Sparc trap table. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_TRAPS_H -#define _SPARC_TRAPS_H - -#define NUM_SPARC_TRAPS 255 - -#ifndef __ASSEMBLY__ - -/* This is for V8 compliant Sparc CPUS */ -struct tt_entry { - unsigned long inst_one; - unsigned long inst_two; - unsigned long inst_three; - unsigned long inst_four; -}; - -/* We set this to _start in system setup. */ -extern struct tt_entry *sparc_ttable; - -static inline unsigned long get_tbr(void) -{ - unsigned long tbr; - - __asm__ __volatile__("rd %%tbr, %0\n\t" : "=r" (tbr)); - return tbr; -} - -#endif /* !(__ASSEMBLY__) */ - -/* For patching the trap table at boot time, we need to know how to - * form various common Sparc instructions. Thus these macros... - */ - -#define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff)) - -/* The following assumes that the branch lies before the place we - * are branching to. This is the case for a trap vector... - * You have been warned. - */ -#define SPARC_BRANCH(dest_addr, inst_addr) \ - (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff)) - -#define SPARC_RD_PSR_L0 (0xa1480000) -#define SPARC_RD_WIM_L3 (0xa7500000) -#define SPARC_NOP (0x01000000) - -/* Various interesting trap levels. */ -/* First, hardware traps. */ -#define SP_TRAP_TFLT 0x1 /* Text fault */ -#define SP_TRAP_II 0x2 /* Illegal Instruction */ -#define SP_TRAP_PI 0x3 /* Privileged Instruction */ -#define SP_TRAP_FPD 0x4 /* Floating Point Disabled */ -#define SP_TRAP_WOVF 0x5 /* Window Overflow */ -#define SP_TRAP_WUNF 0x6 /* Window Underflow */ -#define SP_TRAP_MNA 0x7 /* Memory Address Unaligned */ -#define SP_TRAP_FPE 0x8 /* Floating Point Exception */ -#define SP_TRAP_DFLT 0x9 /* Data Fault */ -#define SP_TRAP_TOF 0xa /* Tag Overflow */ -#define SP_TRAP_WDOG 0xb /* Watchpoint Detected */ -#define SP_TRAP_IRQ1 0x11 /* IRQ level 1 */ -#define SP_TRAP_IRQ2 0x12 /* IRQ level 2 */ -#define SP_TRAP_IRQ3 0x13 /* IRQ level 3 */ -#define SP_TRAP_IRQ4 0x14 /* IRQ level 4 */ -#define SP_TRAP_IRQ5 0x15 /* IRQ level 5 */ -#define SP_TRAP_IRQ6 0x16 /* IRQ level 6 */ -#define SP_TRAP_IRQ7 0x17 /* IRQ level 7 */ -#define SP_TRAP_IRQ8 0x18 /* IRQ level 8 */ -#define SP_TRAP_IRQ9 0x19 /* IRQ level 9 */ -#define SP_TRAP_IRQ10 0x1a /* IRQ level 10 */ -#define SP_TRAP_IRQ11 0x1b /* IRQ level 11 */ -#define SP_TRAP_IRQ12 0x1c /* IRQ level 12 */ -#define SP_TRAP_IRQ13 0x1d /* IRQ level 13 */ -#define SP_TRAP_IRQ14 0x1e /* IRQ level 14 */ -#define SP_TRAP_IRQ15 0x1f /* IRQ level 15 Non-maskable */ -#define SP_TRAP_RACC 0x20 /* Register Access Error ??? */ -#define SP_TRAP_IACC 0x21 /* Instruction Access Error */ -#define SP_TRAP_CPDIS 0x24 /* Co-Processor Disabled */ -#define SP_TRAP_BADFL 0x25 /* Unimplemented Flush Instruction */ -#define SP_TRAP_CPEXP 0x28 /* Co-Processor Exception */ -#define SP_TRAP_DACC 0x29 /* Data Access Error */ -#define SP_TRAP_DIVZ 0x2a /* Divide By Zero */ -#define SP_TRAP_DSTORE 0x2b /* Data Store Error ??? */ -#define SP_TRAP_DMM 0x2c /* Data Access MMU Miss ??? */ -#define SP_TRAP_IMM 0x3c /* Instruction Access MMU Miss ??? */ - -/* Now the Software Traps... */ -#define SP_TRAP_SUNOS 0x80 /* SunOS System Call */ -#define SP_TRAP_SBPT 0x81 /* Software Breakpoint */ -#define SP_TRAP_SDIVZ 0x82 /* Software Divide-by-Zero trap */ -#define SP_TRAP_FWIN 0x83 /* Flush Windows */ -#define SP_TRAP_CWIN 0x84 /* Clean Windows */ -#define SP_TRAP_RCHK 0x85 /* Range Check */ -#define SP_TRAP_FUNA 0x86 /* Fix Unaligned Access */ -#define SP_TRAP_IOWFL 0x87 /* Integer Overflow */ -#define SP_TRAP_SOLARIS 0x88 /* Solaris System Call */ -#define SP_TRAP_NETBSD 0x89 /* NetBSD System Call */ -#define SP_TRAP_LINUX 0x90 /* Linux System Call */ - -/* Names used for compatibility with SunOS */ -#define ST_SYSCALL 0x00 -#define ST_BREAKPOINT 0x01 -#define ST_DIV0 0x02 -#define ST_FLUSH_WINDOWS 0x03 -#define ST_CLEAN_WINDOWS 0x04 -#define ST_RANGE_CHECK 0x05 -#define ST_FIX_ALIGN 0x06 -#define ST_INT_OVERFLOW 0x07 - -/* Special traps... */ -#define SP_TRAP_KBPT1 0xfe /* KADB/PROM Breakpoint one */ -#define SP_TRAP_KBPT2 0xff /* KADB/PROM Breakpoint two */ - -/* Handy Macros */ -/* Is this a trap we never expect to get? */ -#define BAD_TRAP_P(level) \ - ((level > SP_TRAP_WDOG && level < SP_TRAP_IRQ1) || \ - (level > SP_TRAP_IACC && level < SP_TRAP_CPDIS) || \ - (level > SP_TRAP_BADFL && level < SP_TRAP_CPEXP) || \ - (level > SP_TRAP_DMM && level < SP_TRAP_IMM) || \ - (level > SP_TRAP_IMM && level < SP_TRAP_SUNOS) || \ - (level > SP_TRAP_LINUX && level < SP_TRAP_KBPT1)) - -/* Is this a Hardware trap? */ -#define HW_TRAP_P(level) ((level > 0) && (level < SP_TRAP_SUNOS)) - -/* Is this a Software trap? */ -#define SW_TRAP_P(level) ((level >= SP_TRAP_SUNOS) && (level <= SP_TRAP_KBPT2)) - -/* Is this a system call for some OS we know about? */ -#define SCALL_TRAP_P(level) ((level == SP_TRAP_SUNOS) || \ - (level == SP_TRAP_SOLARIS) || \ - (level == SP_TRAP_NETBSD) || \ - (level == SP_TRAP_LINUX)) - -#endif /* !(_SPARC_TRAPS_H) */ diff --git a/include/asm-sparc/tsb.h b/include/asm-sparc/tsb.h deleted file mode 100644 index 76e4299..0000000 --- a/include/asm-sparc/tsb.h +++ /dev/null @@ -1,283 +0,0 @@ -#ifndef _SPARC64_TSB_H -#define _SPARC64_TSB_H - -/* The sparc64 TSB is similar to the powerpc hashtables. It's a - * power-of-2 sized table of TAG/PTE pairs. The cpu precomputes - * pointers into this table for 8K and 64K page sizes, and also a - * comparison TAG based upon the virtual address and context which - * faults. - * - * TLB miss trap handler software does the actual lookup via something - * of the form: - * - * ldxa [%g0] ASI_{D,I}MMU_TSB_8KB_PTR, %g1 - * ldxa [%g0] ASI_{D,I}MMU, %g6 - * sllx %g6, 22, %g6 - * srlx %g6, 22, %g6 - * ldda [%g1] ASI_NUCLEUS_QUAD_LDD, %g4 - * cmp %g4, %g6 - * bne,pn %xcc, tsb_miss_{d,i}tlb - * mov FAULT_CODE_{D,I}TLB, %g3 - * stxa %g5, [%g0] ASI_{D,I}TLB_DATA_IN - * retry - * - * - * Each 16-byte slot of the TSB is the 8-byte tag and then the 8-byte - * PTE. The TAG is of the same layout as the TLB TAG TARGET mmu - * register which is: - * - * ------------------------------------------------- - * | - | CONTEXT | - | VADDR bits 63:22 | - * ------------------------------------------------- - * 63 61 60 48 47 42 41 0 - * - * But actually, since we use per-mm TSB's, we zero out the CONTEXT - * field. - * - * Like the powerpc hashtables we need to use locking in order to - * synchronize while we update the entries. PTE updates need locking - * as well. - * - * We need to carefully choose a lock bits for the TSB entry. We - * choose to use bit 47 in the tag. Also, since we never map anything - * at page zero in context zero, we use zero as an invalid tag entry. - * When the lock bit is set, this forces a tag comparison failure. - */ - -#define TSB_TAG_LOCK_BIT 47 -#define TSB_TAG_LOCK_HIGH (1 << (TSB_TAG_LOCK_BIT - 32)) - -#define TSB_TAG_INVALID_BIT 46 -#define TSB_TAG_INVALID_HIGH (1 << (TSB_TAG_INVALID_BIT - 32)) - -#define TSB_MEMBAR membar #StoreStore - -/* Some cpus support physical address quad loads. We want to use - * those if possible so we don't need to hard-lock the TSB mapping - * into the TLB. We encode some instruction patching in order to - * support this. - * - * The kernel TSB is locked into the TLB by virtue of being in the - * kernel image, so we don't play these games for swapper_tsb access. - */ -#ifndef __ASSEMBLY__ -struct tsb_ldquad_phys_patch_entry { - unsigned int addr; - unsigned int sun4u_insn; - unsigned int sun4v_insn; -}; -extern struct tsb_ldquad_phys_patch_entry __tsb_ldquad_phys_patch, - __tsb_ldquad_phys_patch_end; - -struct tsb_phys_patch_entry { - unsigned int addr; - unsigned int insn; -}; -extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end; -#endif -#define TSB_LOAD_QUAD(TSB, REG) \ -661: ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; \ - .section .tsb_ldquad_phys_patch, "ax"; \ - .word 661b; \ - ldda [TSB] ASI_QUAD_LDD_PHYS, REG; \ - ldda [TSB] ASI_QUAD_LDD_PHYS_4V, REG; \ - .previous - -#define TSB_LOAD_TAG_HIGH(TSB, REG) \ -661: lduwa [TSB] ASI_N, REG; \ - .section .tsb_phys_patch, "ax"; \ - .word 661b; \ - lduwa [TSB] ASI_PHYS_USE_EC, REG; \ - .previous - -#define TSB_LOAD_TAG(TSB, REG) \ -661: ldxa [TSB] ASI_N, REG; \ - .section .tsb_phys_patch, "ax"; \ - .word 661b; \ - ldxa [TSB] ASI_PHYS_USE_EC, REG; \ - .previous - -#define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \ -661: casa [TSB] ASI_N, REG1, REG2; \ - .section .tsb_phys_patch, "ax"; \ - .word 661b; \ - casa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ - .previous - -#define TSB_CAS_TAG(TSB, REG1, REG2) \ -661: casxa [TSB] ASI_N, REG1, REG2; \ - .section .tsb_phys_patch, "ax"; \ - .word 661b; \ - casxa [TSB] ASI_PHYS_USE_EC, REG1, REG2; \ - .previous - -#define TSB_STORE(ADDR, VAL) \ -661: stxa VAL, [ADDR] ASI_N; \ - .section .tsb_phys_patch, "ax"; \ - .word 661b; \ - stxa VAL, [ADDR] ASI_PHYS_USE_EC; \ - .previous - -#define TSB_LOCK_TAG(TSB, REG1, REG2) \ -99: TSB_LOAD_TAG_HIGH(TSB, REG1); \ - sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ - andcc REG1, REG2, %g0; \ - bne,pn %icc, 99b; \ - nop; \ - TSB_CAS_TAG_HIGH(TSB, REG1, REG2); \ - cmp REG1, REG2; \ - bne,pn %icc, 99b; \ - nop; \ - TSB_MEMBAR - -#define TSB_WRITE(TSB, TTE, TAG) \ - add TSB, 0x8, TSB; \ - TSB_STORE(TSB, TTE); \ - sub TSB, 0x8, TSB; \ - TSB_MEMBAR; \ - TSB_STORE(TSB, TAG); - -#define KTSB_LOAD_QUAD(TSB, REG) \ - ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG; - -#define KTSB_STORE(ADDR, VAL) \ - stxa VAL, [ADDR] ASI_N; - -#define KTSB_LOCK_TAG(TSB, REG1, REG2) \ -99: lduwa [TSB] ASI_N, REG1; \ - sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\ - andcc REG1, REG2, %g0; \ - bne,pn %icc, 99b; \ - nop; \ - casa [TSB] ASI_N, REG1, REG2;\ - cmp REG1, REG2; \ - bne,pn %icc, 99b; \ - nop; \ - TSB_MEMBAR - -#define KTSB_WRITE(TSB, TTE, TAG) \ - add TSB, 0x8, TSB; \ - stxa TTE, [TSB] ASI_N; \ - sub TSB, 0x8, TSB; \ - TSB_MEMBAR; \ - stxa TAG, [TSB] ASI_N; - - /* Do a kernel page table walk. Leaves physical PTE pointer in - * REG1. Jumps to FAIL_LABEL on early page table walk termination. - * VADDR will not be clobbered, but REG2 will. - */ -#define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL) \ - sethi %hi(swapper_pg_dir), REG1; \ - or REG1, %lo(swapper_pg_dir), REG1; \ - sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - andn REG2, 0x3, REG2; \ - lduw [REG1 + REG2], REG1; \ - brz,pn REG1, FAIL_LABEL; \ - sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - sllx REG1, 11, REG1; \ - andn REG2, 0x3, REG2; \ - lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ - brz,pn REG1, FAIL_LABEL; \ - sllx VADDR, 64 - PMD_SHIFT, REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - sllx REG1, 11, REG1; \ - andn REG2, 0x7, REG2; \ - add REG1, REG2, REG1; - - /* Do a user page table walk in MMU globals. Leaves physical PTE - * pointer in REG1. Jumps to FAIL_LABEL on early page table walk - * termination. Physical base of page tables is in PHYS_PGD which - * will not be modified. - * - * VADDR will not be clobbered, but REG1 and REG2 will. - */ -#define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL) \ - sllx VADDR, 64 - (PGDIR_SHIFT + PGDIR_BITS), REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - andn REG2, 0x3, REG2; \ - lduwa [PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \ - brz,pn REG1, FAIL_LABEL; \ - sllx VADDR, 64 - (PMD_SHIFT + PMD_BITS), REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - sllx REG1, 11, REG1; \ - andn REG2, 0x3, REG2; \ - lduwa [REG1 + REG2] ASI_PHYS_USE_EC, REG1; \ - brz,pn REG1, FAIL_LABEL; \ - sllx VADDR, 64 - PMD_SHIFT, REG2; \ - srlx REG2, 64 - PAGE_SHIFT, REG2; \ - sllx REG1, 11, REG1; \ - andn REG2, 0x7, REG2; \ - add REG1, REG2, REG1; - -/* Lookup a OBP mapping on VADDR in the prom_trans[] table at TL>0. - * If no entry is found, FAIL_LABEL will be branched to. On success - * the resulting PTE value will be left in REG1. VADDR is preserved - * by this routine. - */ -#define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \ - sethi %hi(prom_trans), REG1; \ - or REG1, %lo(prom_trans), REG1; \ -97: ldx [REG1 + 0x00], REG2; \ - brz,pn REG2, FAIL_LABEL; \ - nop; \ - ldx [REG1 + 0x08], REG3; \ - add REG2, REG3, REG3; \ - cmp REG2, VADDR; \ - bgu,pt %xcc, 98f; \ - cmp VADDR, REG3; \ - bgeu,pt %xcc, 98f; \ - ldx [REG1 + 0x10], REG3; \ - sub VADDR, REG2, REG2; \ - ba,pt %xcc, 99f; \ - add REG3, REG2, REG1; \ -98: ba,pt %xcc, 97b; \ - add REG1, (3 * 8), REG1; \ -99: - - /* We use a 32K TSB for the whole kernel, this allows to - * handle about 16MB of modules and vmalloc mappings without - * incurring many hash conflicts. - */ -#define KERNEL_TSB_SIZE_BYTES (32 * 1024) -#define KERNEL_TSB_NENTRIES \ - (KERNEL_TSB_SIZE_BYTES / 16) -#define KERNEL_TSB4M_NENTRIES 4096 - - /* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL - * on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries - * and the found TTE will be left in REG1. REG3 and REG4 must - * be an even/odd pair of registers. - * - * VADDR and TAG will be preserved and not clobbered by this macro. - */ -#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ - sethi %hi(swapper_tsb), REG1; \ - or REG1, %lo(swapper_tsb), REG1; \ - srlx VADDR, PAGE_SHIFT, REG2; \ - and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \ - sllx REG2, 4, REG2; \ - add REG1, REG2, REG2; \ - KTSB_LOAD_QUAD(REG2, REG3); \ - cmp REG3, TAG; \ - be,a,pt %xcc, OK_LABEL; \ - mov REG4, REG1; - -#ifndef CONFIG_DEBUG_PAGEALLOC - /* This version uses a trick, the TAG is already (VADDR >> 22) so - * we can make use of that for the index computation. - */ -#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ - sethi %hi(swapper_4m_tsb), REG1; \ - or REG1, %lo(swapper_4m_tsb), REG1; \ - and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \ - sllx REG2, 4, REG2; \ - add REG1, REG2, REG2; \ - KTSB_LOAD_QUAD(REG2, REG3); \ - cmp REG3, TAG; \ - be,a,pt %xcc, OK_LABEL; \ - mov REG4, REG1; -#endif - -#endif /* !(_SPARC64_TSB_H) */ diff --git a/include/asm-sparc/tsunami.h b/include/asm-sparc/tsunami.h deleted file mode 100644 index 5bbd1d5..0000000 --- a/include/asm-sparc/tsunami.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * tsunami.h: Module specific definitions for Tsunami V8 Sparcs - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_TSUNAMI_H -#define _SPARC_TSUNAMI_H - -#include - -/* The MMU control register on the Tsunami: - * - * ----------------------------------------------------------------------- - * | implvers |SW|AV|DV|MV| RSV |PC|ITD|ALC| RSV |PE| RC |IE|DE|RSV|NF|ME| - * ----------------------------------------------------------------------- - * 31 24 23 22 21 20 19-18 17 16 14 13-12 11 10-9 8 7 6-2 1 0 - * - * SW: Enable Software Table Walks 0=off 1=on - * AV: Address View bit - * DV: Data View bit - * MV: Memory View bit - * PC: Parity Control - * ITD: ITBR disable - * ALC: Alternate Cacheable - * PE: Parity Enable 0=off 1=on - * RC: Refresh Control - * IE: Instruction cache Enable 0=off 1=on - * DE: Data cache Enable 0=off 1=on - * NF: No Fault, same as all other SRMMUs - * ME: MMU Enable, same as all other SRMMUs - */ - -#define TSUNAMI_SW 0x00800000 -#define TSUNAMI_AV 0x00400000 -#define TSUNAMI_DV 0x00200000 -#define TSUNAMI_MV 0x00100000 -#define TSUNAMI_PC 0x00020000 -#define TSUNAMI_ITD 0x00010000 -#define TSUNAMI_ALC 0x00008000 -#define TSUNAMI_PE 0x00001000 -#define TSUNAMI_RCMASK 0x00000C00 -#define TSUNAMI_IENAB 0x00000200 -#define TSUNAMI_DENAB 0x00000100 -#define TSUNAMI_NF 0x00000002 -#define TSUNAMI_ME 0x00000001 - -static inline void tsunami_flush_icache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_IC_FLCLEAR) - : "memory"); -} - -static inline void tsunami_flush_dcache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_DC_FLCLEAR) - : "memory"); -} - -#endif /* !(_SPARC_TSUNAMI_H) */ diff --git a/include/asm-sparc/ttable.h b/include/asm-sparc/ttable.h deleted file mode 100644 index 5708ba2..0000000 --- a/include/asm-sparc/ttable.h +++ /dev/null @@ -1,658 +0,0 @@ -#ifndef _SPARC64_TTABLE_H -#define _SPARC64_TTABLE_H - -#include - -#ifdef __ASSEMBLY__ -#include -#endif - -#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop; - -/* We need a "cleaned" instruction... */ -#define CLEAN_WINDOW \ - rdpr %cleanwin, %l0; add %l0, 1, %l0; \ - wrpr %l0, 0x0, %cleanwin; \ - clr %o0; clr %o1; clr %o2; clr %o3; \ - clr %o4; clr %o5; clr %o6; clr %o7; \ - clr %l0; clr %l1; clr %l2; clr %l3; \ - clr %l4; clr %l5; clr %l6; clr %l7; \ - retry; \ - nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop; - -#define TRAP(routine) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etrap; \ -109: or %g7, %lo(109b), %g7; \ - call routine; \ - add %sp, PTREGS_OFF, %o0; \ - ba,pt %xcc, rtrap; \ - nop; \ - nop; - -#define TRAP_7INSNS(routine) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etrap; \ -109: or %g7, %lo(109b), %g7; \ - call routine; \ - add %sp, PTREGS_OFF, %o0; \ - ba,pt %xcc, rtrap; \ - nop; - -#define TRAP_SAVEFPU(routine) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, do_fptrap; \ -109: or %g7, %lo(109b), %g7; \ - call routine; \ - add %sp, PTREGS_OFF, %o0; \ - ba,pt %xcc, rtrap; \ - nop; \ - nop; - -#define TRAP_NOSAVE(routine) \ - ba,pt %xcc, routine; \ - nop; \ - nop; nop; nop; nop; nop; nop; - -#define TRAP_NOSAVE_7INSNS(routine) \ - ba,pt %xcc, routine; \ - nop; \ - nop; nop; nop; nop; nop; - -#define TRAPTL1(routine) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etraptl1; \ -109: or %g7, %lo(109b), %g7; \ - call routine; \ - add %sp, PTREGS_OFF, %o0; \ - ba,pt %xcc, rtrap; \ - nop; \ - nop; - -#define TRAP_ARG(routine, arg) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etrap; \ -109: or %g7, %lo(109b), %g7; \ - add %sp, PTREGS_OFF, %o0; \ - call routine; \ - mov arg, %o1; \ - ba,pt %xcc, rtrap; \ - nop; - -#define TRAPTL1_ARG(routine, arg) \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etraptl1; \ -109: or %g7, %lo(109b), %g7; \ - add %sp, PTREGS_OFF, %o0; \ - call routine; \ - mov arg, %o1; \ - ba,pt %xcc, rtrap; \ - nop; - -#define SYSCALL_TRAP(routine, systbl) \ - rdpr %pil, %g2; \ - mov TSTATE_SYSCALL, %g3; \ - sethi %hi(109f), %g7; \ - ba,pt %xcc, etrap_syscall; \ -109: or %g7, %lo(109b), %g7; \ - sethi %hi(systbl), %l7; \ - ba,pt %xcc, routine; \ - or %l7, %lo(systbl), %l7; - -#define TRAP_UTRAP(handler,lvl) \ - mov handler, %g3; \ - ba,pt %xcc, utrap_trap; \ - mov lvl, %g4; \ - nop; \ - nop; \ - nop; \ - nop; \ - nop; - -#ifdef CONFIG_COMPAT -#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32) -#else -#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110) -#endif -#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64) -#define GETCC_TRAP TRAP(getcc) -#define SETCC_TRAP TRAP(setcc) -#define BREAKPOINT_TRAP TRAP(breakpoint_trap) - -#ifdef CONFIG_TRACE_IRQFLAGS - -#define TRAP_IRQ(routine, level) \ - rdpr %pil, %g2; \ - wrpr %g0, 15, %pil; \ - sethi %hi(1f-4), %g7; \ - ba,pt %xcc, etrap_irq; \ - or %g7, %lo(1f-4), %g7; \ - nop; \ - nop; \ - nop; \ - .subsection 2; \ -1: call trace_hardirqs_off; \ - nop; \ - mov level, %o0; \ - call routine; \ - add %sp, PTREGS_OFF, %o1; \ - ba,a,pt %xcc, rtrap_irq; \ - .previous; - -#else - -#define TRAP_IRQ(routine, level) \ - rdpr %pil, %g2; \ - wrpr %g0, 15, %pil; \ - ba,pt %xcc, etrap_irq; \ - rd %pc, %g7; \ - mov level, %o0; \ - call routine; \ - add %sp, PTREGS_OFF, %o1; \ - ba,a,pt %xcc, rtrap_irq; - -#endif - -#define TRAP_IVEC TRAP_NOSAVE(do_ivec) - -#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl) - -#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl) - -#define FLUSH_WINDOW_TRAP \ - ba,pt %xcc, etrap; \ - rd %pc, %g7; \ - flushw; \ - ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \ - add %l1, 4, %l2; \ - stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \ - ba,pt %xcc, rtrap; \ - stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC]; - -#ifdef CONFIG_KPROBES -#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl) -#else -#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl) -#endif - -#ifdef CONFIG_KGDB -#define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl) -#else -#define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl) -#endif - -#define SUN4V_ITSB_MISS \ - ldxa [%g0] ASI_SCRATCHPAD, %g2; \ - ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \ - ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \ - srlx %g4, 22, %g6; \ - ba,pt %xcc, sun4v_itsb_miss; \ - nop; \ - nop; \ - nop; - -#define SUN4V_DTSB_MISS \ - ldxa [%g0] ASI_SCRATCHPAD, %g2; \ - ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \ - ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \ - srlx %g4, 22, %g6; \ - ba,pt %xcc, sun4v_dtsb_miss; \ - nop; \ - nop; \ - nop; - -/* Before touching these macros, you owe it to yourself to go and - * see how arch/sparc64/kernel/winfixup.S works... -DaveM - * - * For the user cases we used to use the %asi register, but - * it turns out that the "wr xxx, %asi" costs ~5 cycles, so - * now we use immediate ASI loads and stores instead. Kudos - * to Greg Onufer for pointing out this performance anomaly. - * - * Further note that we cannot use the g2, g4, g5, and g7 alternate - * globals in the spill routines, check out the save instruction in - * arch/sparc64/kernel/etrap.S to see what I mean about g2, and - * g4/g5 are the globals which are preserved by etrap processing - * for the caller of it. The g7 register is the return pc for - * etrap. Finally, g6 is the current thread register so we cannot - * us it in the spill handlers either. Most of these rules do not - * apply to fill processing, only g6 is not usable. - */ - -/* Normal kernel spill */ -#define SPILL_0_NORMAL \ - stx %l0, [%sp + STACK_BIAS + 0x00]; \ - stx %l1, [%sp + STACK_BIAS + 0x08]; \ - stx %l2, [%sp + STACK_BIAS + 0x10]; \ - stx %l3, [%sp + STACK_BIAS + 0x18]; \ - stx %l4, [%sp + STACK_BIAS + 0x20]; \ - stx %l5, [%sp + STACK_BIAS + 0x28]; \ - stx %l6, [%sp + STACK_BIAS + 0x30]; \ - stx %l7, [%sp + STACK_BIAS + 0x38]; \ - stx %i0, [%sp + STACK_BIAS + 0x40]; \ - stx %i1, [%sp + STACK_BIAS + 0x48]; \ - stx %i2, [%sp + STACK_BIAS + 0x50]; \ - stx %i3, [%sp + STACK_BIAS + 0x58]; \ - stx %i4, [%sp + STACK_BIAS + 0x60]; \ - stx %i5, [%sp + STACK_BIAS + 0x68]; \ - stx %i6, [%sp + STACK_BIAS + 0x70]; \ - stx %i7, [%sp + STACK_BIAS + 0x78]; \ - saved; retry; nop; nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; nop; nop; nop; - -#define SPILL_0_NORMAL_ETRAP \ -etrap_kernel_spill: \ - stx %l0, [%sp + STACK_BIAS + 0x00]; \ - stx %l1, [%sp + STACK_BIAS + 0x08]; \ - stx %l2, [%sp + STACK_BIAS + 0x10]; \ - stx %l3, [%sp + STACK_BIAS + 0x18]; \ - stx %l4, [%sp + STACK_BIAS + 0x20]; \ - stx %l5, [%sp + STACK_BIAS + 0x28]; \ - stx %l6, [%sp + STACK_BIAS + 0x30]; \ - stx %l7, [%sp + STACK_BIAS + 0x38]; \ - stx %i0, [%sp + STACK_BIAS + 0x40]; \ - stx %i1, [%sp + STACK_BIAS + 0x48]; \ - stx %i2, [%sp + STACK_BIAS + 0x50]; \ - stx %i3, [%sp + STACK_BIAS + 0x58]; \ - stx %i4, [%sp + STACK_BIAS + 0x60]; \ - stx %i5, [%sp + STACK_BIAS + 0x68]; \ - stx %i6, [%sp + STACK_BIAS + 0x70]; \ - stx %i7, [%sp + STACK_BIAS + 0x78]; \ - saved; \ - sub %g1, 2, %g1; \ - ba,pt %xcc, etrap_save; \ - wrpr %g1, %cwp; \ - nop; nop; nop; nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; - -/* Normal 64bit spill */ -#define SPILL_1_GENERIC(ASI) \ - add %sp, STACK_BIAS + 0x00, %g1; \ - stxa %l0, [%g1 + %g0] ASI; \ - mov 0x08, %g3; \ - stxa %l1, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %l2, [%g1 + %g0] ASI; \ - stxa %l3, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %l4, [%g1 + %g0] ASI; \ - stxa %l5, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %l6, [%g1 + %g0] ASI; \ - stxa %l7, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %i0, [%g1 + %g0] ASI; \ - stxa %i1, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %i2, [%g1 + %g0] ASI; \ - stxa %i3, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %i4, [%g1 + %g0] ASI; \ - stxa %i5, [%g1 + %g3] ASI; \ - add %g1, 0x10, %g1; \ - stxa %i6, [%g1 + %g0] ASI; \ - stxa %i7, [%g1 + %g3] ASI; \ - saved; \ - retry; nop; nop; \ - b,a,pt %xcc, spill_fixup_dax; \ - b,a,pt %xcc, spill_fixup_mna; \ - b,a,pt %xcc, spill_fixup; - -#define SPILL_1_GENERIC_ETRAP \ -etrap_user_spill_64bit: \ - stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \ - stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \ - stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \ - stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \ - stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \ - stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \ - stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \ - stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \ - stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \ - stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \ - stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \ - stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \ - stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \ - stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \ - stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \ - stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \ - saved; \ - sub %g1, 2, %g1; \ - ba,pt %xcc, etrap_save; \ - wrpr %g1, %cwp; \ - nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - ba,a,pt %xcc, etrap_spill_fixup_64bit; \ - ba,a,pt %xcc, etrap_spill_fixup_64bit; \ - ba,a,pt %xcc, etrap_spill_fixup_64bit; - -#define SPILL_1_GENERIC_ETRAP_FIXUP \ -etrap_spill_fixup_64bit: \ - ldub [%g6 + TI_WSAVED], %g1; \ - sll %g1, 3, %g3; \ - add %g6, %g3, %g3; \ - stx %sp, [%g3 + TI_RWIN_SPTRS]; \ - sll %g1, 7, %g3; \ - add %g6, %g3, %g3; \ - stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \ - stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \ - stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \ - stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \ - stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \ - stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \ - stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \ - stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \ - stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \ - stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \ - stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \ - stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \ - stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \ - stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \ - stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \ - stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \ - add %g1, 1, %g1; \ - stb %g1, [%g6 + TI_WSAVED]; \ - saved; \ - rdpr %cwp, %g1; \ - sub %g1, 2, %g1; \ - ba,pt %xcc, etrap_save; \ - wrpr %g1, %cwp; \ - nop; nop; nop - -/* Normal 32bit spill */ -#define SPILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ - stwa %l0, [%sp + %g0] ASI; \ - mov 0x04, %g3; \ - stwa %l1, [%sp + %g3] ASI; \ - add %sp, 0x08, %g1; \ - stwa %l2, [%g1 + %g0] ASI; \ - stwa %l3, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %l4, [%g1 + %g0] ASI; \ - stwa %l5, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %l6, [%g1 + %g0] ASI; \ - stwa %l7, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %i0, [%g1 + %g0] ASI; \ - stwa %i1, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %i2, [%g1 + %g0] ASI; \ - stwa %i3, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %i4, [%g1 + %g0] ASI; \ - stwa %i5, [%g1 + %g3] ASI; \ - add %g1, 0x08, %g1; \ - stwa %i6, [%g1 + %g0] ASI; \ - stwa %i7, [%g1 + %g3] ASI; \ - saved; \ - retry; nop; nop; \ - b,a,pt %xcc, spill_fixup_dax; \ - b,a,pt %xcc, spill_fixup_mna; \ - b,a,pt %xcc, spill_fixup; - -#define SPILL_2_GENERIC_ETRAP \ -etrap_user_spill_32bit: \ - srl %sp, 0, %sp; \ - stwa %l0, [%sp + 0x00] %asi; \ - stwa %l1, [%sp + 0x04] %asi; \ - stwa %l2, [%sp + 0x08] %asi; \ - stwa %l3, [%sp + 0x0c] %asi; \ - stwa %l4, [%sp + 0x10] %asi; \ - stwa %l5, [%sp + 0x14] %asi; \ - stwa %l6, [%sp + 0x18] %asi; \ - stwa %l7, [%sp + 0x1c] %asi; \ - stwa %i0, [%sp + 0x20] %asi; \ - stwa %i1, [%sp + 0x24] %asi; \ - stwa %i2, [%sp + 0x28] %asi; \ - stwa %i3, [%sp + 0x2c] %asi; \ - stwa %i4, [%sp + 0x30] %asi; \ - stwa %i5, [%sp + 0x34] %asi; \ - stwa %i6, [%sp + 0x38] %asi; \ - stwa %i7, [%sp + 0x3c] %asi; \ - saved; \ - sub %g1, 2, %g1; \ - ba,pt %xcc, etrap_save; \ - wrpr %g1, %cwp; \ - nop; nop; nop; nop; \ - nop; nop; nop; nop; \ - ba,a,pt %xcc, etrap_spill_fixup_32bit; \ - ba,a,pt %xcc, etrap_spill_fixup_32bit; \ - ba,a,pt %xcc, etrap_spill_fixup_32bit; - -#define SPILL_2_GENERIC_ETRAP_FIXUP \ -etrap_spill_fixup_32bit: \ - ldub [%g6 + TI_WSAVED], %g1; \ - sll %g1, 3, %g3; \ - add %g6, %g3, %g3; \ - stx %sp, [%g3 + TI_RWIN_SPTRS]; \ - sll %g1, 7, %g3; \ - add %g6, %g3, %g3; \ - stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \ - stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \ - stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \ - stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \ - stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \ - stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \ - stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \ - stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \ - stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \ - stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \ - stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \ - stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \ - stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \ - stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \ - stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \ - stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \ - add %g1, 1, %g1; \ - stb %g1, [%g6 + TI_WSAVED]; \ - saved; \ - rdpr %cwp, %g1; \ - sub %g1, 2, %g1; \ - ba,pt %xcc, etrap_save; \ - wrpr %g1, %cwp; \ - nop; nop; nop - -#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP) -#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP) -#define SPILL_3_NORMAL SPILL_0_NORMAL -#define SPILL_4_NORMAL SPILL_0_NORMAL -#define SPILL_5_NORMAL SPILL_0_NORMAL -#define SPILL_6_NORMAL SPILL_0_NORMAL -#define SPILL_7_NORMAL SPILL_0_NORMAL - -#define SPILL_0_OTHER SPILL_0_NORMAL -#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS) -#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS) -#define SPILL_3_OTHER SPILL_3_NORMAL -#define SPILL_4_OTHER SPILL_4_NORMAL -#define SPILL_5_OTHER SPILL_5_NORMAL -#define SPILL_6_OTHER SPILL_6_NORMAL -#define SPILL_7_OTHER SPILL_7_NORMAL - -/* Normal kernel fill */ -#define FILL_0_NORMAL \ - ldx [%sp + STACK_BIAS + 0x00], %l0; \ - ldx [%sp + STACK_BIAS + 0x08], %l1; \ - ldx [%sp + STACK_BIAS + 0x10], %l2; \ - ldx [%sp + STACK_BIAS + 0x18], %l3; \ - ldx [%sp + STACK_BIAS + 0x20], %l4; \ - ldx [%sp + STACK_BIAS + 0x28], %l5; \ - ldx [%sp + STACK_BIAS + 0x30], %l6; \ - ldx [%sp + STACK_BIAS + 0x38], %l7; \ - ldx [%sp + STACK_BIAS + 0x40], %i0; \ - ldx [%sp + STACK_BIAS + 0x48], %i1; \ - ldx [%sp + STACK_BIAS + 0x50], %i2; \ - ldx [%sp + STACK_BIAS + 0x58], %i3; \ - ldx [%sp + STACK_BIAS + 0x60], %i4; \ - ldx [%sp + STACK_BIAS + 0x68], %i5; \ - ldx [%sp + STACK_BIAS + 0x70], %i6; \ - ldx [%sp + STACK_BIAS + 0x78], %i7; \ - restored; retry; nop; nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; nop; nop; nop; - -#define FILL_0_NORMAL_RTRAP \ -kern_rtt_fill: \ - rdpr %cwp, %g1; \ - sub %g1, 1, %g1; \ - wrpr %g1, %cwp; \ - ldx [%sp + STACK_BIAS + 0x00], %l0; \ - ldx [%sp + STACK_BIAS + 0x08], %l1; \ - ldx [%sp + STACK_BIAS + 0x10], %l2; \ - ldx [%sp + STACK_BIAS + 0x18], %l3; \ - ldx [%sp + STACK_BIAS + 0x20], %l4; \ - ldx [%sp + STACK_BIAS + 0x28], %l5; \ - ldx [%sp + STACK_BIAS + 0x30], %l6; \ - ldx [%sp + STACK_BIAS + 0x38], %l7; \ - ldx [%sp + STACK_BIAS + 0x40], %i0; \ - ldx [%sp + STACK_BIAS + 0x48], %i1; \ - ldx [%sp + STACK_BIAS + 0x50], %i2; \ - ldx [%sp + STACK_BIAS + 0x58], %i3; \ - ldx [%sp + STACK_BIAS + 0x60], %i4; \ - ldx [%sp + STACK_BIAS + 0x68], %i5; \ - ldx [%sp + STACK_BIAS + 0x70], %i6; \ - ldx [%sp + STACK_BIAS + 0x78], %i7; \ - restored; \ - add %g1, 1, %g1; \ - ba,pt %xcc, kern_rtt_restore; \ - wrpr %g1, %cwp; \ - nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; - - -/* Normal 64bit fill */ -#define FILL_1_GENERIC(ASI) \ - add %sp, STACK_BIAS + 0x00, %g1; \ - ldxa [%g1 + %g0] ASI, %l0; \ - mov 0x08, %g2; \ - mov 0x10, %g3; \ - ldxa [%g1 + %g2] ASI, %l1; \ - mov 0x18, %g5; \ - ldxa [%g1 + %g3] ASI, %l2; \ - ldxa [%g1 + %g5] ASI, %l3; \ - add %g1, 0x20, %g1; \ - ldxa [%g1 + %g0] ASI, %l4; \ - ldxa [%g1 + %g2] ASI, %l5; \ - ldxa [%g1 + %g3] ASI, %l6; \ - ldxa [%g1 + %g5] ASI, %l7; \ - add %g1, 0x20, %g1; \ - ldxa [%g1 + %g0] ASI, %i0; \ - ldxa [%g1 + %g2] ASI, %i1; \ - ldxa [%g1 + %g3] ASI, %i2; \ - ldxa [%g1 + %g5] ASI, %i3; \ - add %g1, 0x20, %g1; \ - ldxa [%g1 + %g0] ASI, %i4; \ - ldxa [%g1 + %g2] ASI, %i5; \ - ldxa [%g1 + %g3] ASI, %i6; \ - ldxa [%g1 + %g5] ASI, %i7; \ - restored; \ - retry; nop; nop; nop; nop; \ - b,a,pt %xcc, fill_fixup_dax; \ - b,a,pt %xcc, fill_fixup_mna; \ - b,a,pt %xcc, fill_fixup; - -#define FILL_1_GENERIC_RTRAP \ -user_rtt_fill_64bit: \ - ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \ - ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \ - ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \ - ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \ - ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \ - ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \ - ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \ - ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \ - ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \ - ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \ - ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \ - ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \ - ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \ - ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \ - ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \ - ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \ - ba,pt %xcc, user_rtt_pre_restore; \ - restored; \ - nop; nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; \ - ba,a,pt %xcc, user_rtt_fill_fixup; \ - ba,a,pt %xcc, user_rtt_fill_fixup; \ - ba,a,pt %xcc, user_rtt_fill_fixup; - - -/* Normal 32bit fill */ -#define FILL_2_GENERIC(ASI) \ - srl %sp, 0, %sp; \ - lduwa [%sp + %g0] ASI, %l0; \ - mov 0x04, %g2; \ - mov 0x08, %g3; \ - lduwa [%sp + %g2] ASI, %l1; \ - mov 0x0c, %g5; \ - lduwa [%sp + %g3] ASI, %l2; \ - lduwa [%sp + %g5] ASI, %l3; \ - add %sp, 0x10, %g1; \ - lduwa [%g1 + %g0] ASI, %l4; \ - lduwa [%g1 + %g2] ASI, %l5; \ - lduwa [%g1 + %g3] ASI, %l6; \ - lduwa [%g1 + %g5] ASI, %l7; \ - add %g1, 0x10, %g1; \ - lduwa [%g1 + %g0] ASI, %i0; \ - lduwa [%g1 + %g2] ASI, %i1; \ - lduwa [%g1 + %g3] ASI, %i2; \ - lduwa [%g1 + %g5] ASI, %i3; \ - add %g1, 0x10, %g1; \ - lduwa [%g1 + %g0] ASI, %i4; \ - lduwa [%g1 + %g2] ASI, %i5; \ - lduwa [%g1 + %g3] ASI, %i6; \ - lduwa [%g1 + %g5] ASI, %i7; \ - restored; \ - retry; nop; nop; nop; nop; \ - b,a,pt %xcc, fill_fixup_dax; \ - b,a,pt %xcc, fill_fixup_mna; \ - b,a,pt %xcc, fill_fixup; - -#define FILL_2_GENERIC_RTRAP \ -user_rtt_fill_32bit: \ - srl %sp, 0, %sp; \ - lduwa [%sp + 0x00] %asi, %l0; \ - lduwa [%sp + 0x04] %asi, %l1; \ - lduwa [%sp + 0x08] %asi, %l2; \ - lduwa [%sp + 0x0c] %asi, %l3; \ - lduwa [%sp + 0x10] %asi, %l4; \ - lduwa [%sp + 0x14] %asi, %l5; \ - lduwa [%sp + 0x18] %asi, %l6; \ - lduwa [%sp + 0x1c] %asi, %l7; \ - lduwa [%sp + 0x20] %asi, %i0; \ - lduwa [%sp + 0x24] %asi, %i1; \ - lduwa [%sp + 0x28] %asi, %i2; \ - lduwa [%sp + 0x2c] %asi, %i3; \ - lduwa [%sp + 0x30] %asi, %i4; \ - lduwa [%sp + 0x34] %asi, %i5; \ - lduwa [%sp + 0x38] %asi, %i6; \ - lduwa [%sp + 0x3c] %asi, %i7; \ - ba,pt %xcc, user_rtt_pre_restore; \ - restored; \ - nop; nop; nop; nop; nop; \ - nop; nop; nop; nop; nop; \ - ba,a,pt %xcc, user_rtt_fill_fixup; \ - ba,a,pt %xcc, user_rtt_fill_fixup; \ - ba,a,pt %xcc, user_rtt_fill_fixup; - - -#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP) -#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP) -#define FILL_3_NORMAL FILL_0_NORMAL -#define FILL_4_NORMAL FILL_0_NORMAL -#define FILL_5_NORMAL FILL_0_NORMAL -#define FILL_6_NORMAL FILL_0_NORMAL -#define FILL_7_NORMAL FILL_0_NORMAL - -#define FILL_0_OTHER FILL_0_NORMAL -#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS) -#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS) -#define FILL_3_OTHER FILL_3_NORMAL -#define FILL_4_OTHER FILL_4_NORMAL -#define FILL_5_OTHER FILL_5_NORMAL -#define FILL_6_OTHER FILL_6_NORMAL -#define FILL_7_OTHER FILL_7_NORMAL - -#endif /* !(_SPARC64_TTABLE_H) */ diff --git a/include/asm-sparc/turbosparc.h b/include/asm-sparc/turbosparc.h deleted file mode 100644 index 17c7328..0000000 --- a/include/asm-sparc/turbosparc.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * turbosparc.h: Defines specific to the TurboSparc module. - * This is SRMMU stuff. - * - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ -#ifndef _SPARC_TURBOSPARC_H -#define _SPARC_TURBOSPARC_H - -#include -#include - -/* Bits in the SRMMU control register for TurboSparc modules. - * - * ------------------------------------------------------------------- - * |impl-vers| RSV| PMC |PE|PC| RSV |BM| RFR |IC|DC|PSO|RSV|ICS|NF|ME| - * ------------------------------------------------------------------- - * 31 24 23-21 20-19 18 17 16-15 14 13-10 9 8 7 6-3 2 1 0 - * - * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode - * - * This indicates whether the TurboSparc is in boot-mode or not. - * - * IC: Instruction Cache -- 0 = off, 1 = on - * DC: Data Cache -- 0 = off, 1 = 0n - * - * These bits enable the on-cpu TurboSparc split I/D caches. - * - * ICS: ICache Snooping -- 0 = disable, 1 = enable snooping of icache - * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap - * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating - * - */ - -#define TURBOSPARC_MMUENABLE 0x00000001 -#define TURBOSPARC_NOFAULT 0x00000002 -#define TURBOSPARC_ICSNOOP 0x00000004 -#define TURBOSPARC_PSO 0x00000080 -#define TURBOSPARC_DCENABLE 0x00000100 /* Enable data cache */ -#define TURBOSPARC_ICENABLE 0x00000200 /* Enable instruction cache */ -#define TURBOSPARC_BMODE 0x00004000 -#define TURBOSPARC_PARITYODD 0x00020000 /* Parity odd, if enabled */ -#define TURBOSPARC_PCENABLE 0x00040000 /* Enable parity checking */ - -/* Bits in the CPU configuration register for TurboSparc modules. - * - * ------------------------------------------------------- - * |IOClk|SNP|AXClk| RAH | WS | RSV |SBC|WT|uS2|SE|SCC| - * ------------------------------------------------------- - * 31 30 29-28 27-26 25-23 22-8 7-6 5 4 3 2-0 - * - */ - -#define TURBOSPARC_SCENABLE 0x00000008 /* Secondary cache enable */ -#define TURBOSPARC_uS2 0x00000010 /* Swift compatibility mode */ -#define TURBOSPARC_WTENABLE 0x00000020 /* Write thru for dcache */ -#define TURBOSPARC_SNENABLE 0x40000000 /* DVMA snoop enable */ - -#ifndef __ASSEMBLY__ - -/* Bits [13:5] select one of 512 instruction cache tags */ -static inline void turbosparc_inv_insn_tag(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_TXTC_TAG) - : "memory"); -} - -/* Bits [13:5] select one of 512 data cache tags */ -static inline void turbosparc_inv_data_tag(unsigned long addr) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (addr), "i" (ASI_M_DATAC_TAG) - : "memory"); -} - -static inline void turbosparc_flush_icache(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x4000; addr += 0x20) - turbosparc_inv_insn_tag(addr); -} - -static inline void turbosparc_flush_dcache(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x4000; addr += 0x20) - turbosparc_inv_data_tag(addr); -} - -static inline void turbosparc_idflash_clear(void) -{ - unsigned long addr; - - for (addr = 0; addr < 0x4000; addr += 0x20) { - turbosparc_inv_insn_tag(addr); - turbosparc_inv_data_tag(addr); - } -} - -static inline void turbosparc_set_ccreg(unsigned long regval) -{ - __asm__ __volatile__("sta %0, [%1] %2\n\t" - : /* no outputs */ - : "r" (regval), "r" (0x600), "i" (ASI_M_MMUREGS) - : "memory"); -} - -static inline unsigned long turbosparc_get_ccreg(void) -{ - unsigned long regval; - - __asm__ __volatile__("lda [%1] %2, %0\n\t" - : "=r" (regval) - : "r" (0x600), "i" (ASI_M_MMUREGS)); - return regval; -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* !(_SPARC_TURBOSPARC_H) */ diff --git a/include/asm-sparc/types.h b/include/asm-sparc/types.h deleted file mode 100644 index 8c28fde..0000000 --- a/include/asm-sparc/types.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef _SPARC_TYPES_H -#define _SPARC_TYPES_H -/* - * This file is never included by application software unless - * explicitly requested (e.g., via linux/types.h) in which case the - * application is Linux specific so (user-) name space pollution is - * not a major issue. However, for interoperability, libraries still - * need to be careful to avoid a name clashes. - */ - -#if defined(__sparc__) && defined(__arch64__) - -/*** SPARC 64 bit ***/ -#include - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ - -#define BITS_PER_LONG 64 - -#ifndef __ASSEMBLY__ - -/* Dma addresses come in generic and 64-bit flavours. */ - -typedef u32 dma_addr_t; -typedef u64 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ -#else - -/*** SPARC 32 bit ***/ -#include - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -typedef u32 dma_addr_t; -typedef u32 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* defined(__sparc__) && defined(__arch64__) */ - -#endif /* defined(_SPARC_TYPES_H) */ diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h deleted file mode 100644 index 424facc..0000000 --- a/include/asm-sparc/uaccess.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_UACCESS_H -#define ___ASM_SPARC_UACCESS_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/uaccess_32.h b/include/asm-sparc/uaccess_32.h deleted file mode 100644 index 47d5619..0000000 --- a/include/asm-sparc/uaccess_32.h +++ /dev/null @@ -1,336 +0,0 @@ -/* - * uaccess.h: User space memore access functions. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ -#ifndef _ASM_UACCESS_H -#define _ASM_UACCESS_H - -#ifdef __KERNEL__ -#include -#include -#include -#include -#include -#endif - -#ifndef __ASSEMBLY__ - -/* Sparc is not segmented, however we need to be able to fool access_ok() - * when doing system calls from kernel mode legitimately. - * - * "For historical reasons, these macros are grossly misnamed." -Linus - */ - -#define KERNEL_DS ((mm_segment_t) { 0 }) -#define USER_DS ((mm_segment_t) { -1 }) - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.current_ds) -#define set_fs(val) ((current->thread.current_ds) = (val)) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -/* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test - * can be fairly lightweight. - * No one can read/write anything from userland in the kernel space by setting - * large size and address near to PAGE_OFFSET - a fault will break his intentions. - */ -#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; }) -#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS)) -#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size))) -#define access_ok(type, addr, size) \ - ({ (void)(type); __access_ok((unsigned long)(addr), size); }) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - * - * There is a special way how to put a range of potentially faulting - * insns (like twenty ldd/std's with now intervening other instructions) - * You specify address of first in insn and 0 in fixup and in the next - * exception_table_entry you specify last potentially faulting insn + 1 - * and in fixup the routine which should handle the fault. - * That fixup code will get - * (faulting_insn_address - first_insn_in_the_range_address)/4 - * in %g2 (ie. index of the faulting instruction in the range). - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -/* Returns 0 if exception not found and fixup otherwise. */ -extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2); - -extern void __ret_efault(void); - -/* Uh, these should become the main single-value transfer routines.. - * They automatically use the right size if we just have the right - * pointer type.. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - */ -#define put_user(x,ptr) ({ \ -unsigned long __pu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) - -#define get_user(x,ptr) ({ \ -unsigned long __gu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the user has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) ((struct __large_struct __user *)(x)) - -#define __put_user_check(x,addr,size) ({ \ -register int __pu_ret; \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(x,,addr,__pu_ret); break; \ -case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} } else { __pu_ret = -EFAULT; } __pu_ret; }) - -#define __put_user_nocheck(x,addr,size) ({ \ -register int __pu_ret; \ -switch (size) { \ -case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(x,,addr,__pu_ret); break; \ -case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} __pu_ret; }) - -#define __put_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Put user asm, inline. */\n" \ -"1:\t" "st"#size " %1, %2\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "b 2b\n\t" \ - " mov %3, %0\n\t" \ - ".previous\n\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\t" \ - ".previous\n\n\t" \ - : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ - "i" (-EFAULT)) - -extern int __put_user_bad(void); - -#define __get_user_check(x,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; }) - -#define __get_user_check_ret(x,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} x = (type) __gu_val; } else return retval; }) - -#define __get_user_nocheck(x,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} x = (type) __gu_val; __gu_ret; }) - -#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} x = (type) __gu_val; }) - -#define __get_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user asm, inline. */\n" \ -"1:\t" "ld"#size " %2, %1\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "clr %1\n\t" \ - "b 2b\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ - "i" (-EFAULT)) - -#define __get_user_asm_ret(x,size,addr,retval) \ -if (__builtin_constant_p(retval) && retval == -EFAULT) \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size " %1, %0\n\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b,__ret_efault\n\n\t" \ - ".previous\n\t" \ - : "=&r" (x) : "m" (*__m(addr))); \ -else \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size " %1, %0\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "ret\n\t" \ - " restore %%g0, %2, %%o0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=&r" (x) : "m" (*__m(addr)), "i" (retval)) - -extern int __get_user_bad(void); - -extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size); - -static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) -{ - if (n && __access_ok((unsigned long) to, n)) - return __copy_user(to, (__force void __user *) from, n); - else - return n; -} - -static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return __copy_user(to, (__force void __user *) from, n); -} - -static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) -{ - if (n && __access_ok((unsigned long) from, n)) - return __copy_user((__force void __user *) to, from, n); - else - return n; -} - -static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return __copy_user((__force void __user *) to, from, n); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -static inline unsigned long __clear_user(void __user *addr, unsigned long size) -{ - unsigned long ret; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,3\n\t" - ".previous\n\t" - "mov %2, %%o1\n" - "1:\n\t" - "call __bzero\n\t" - " mov %1, %%o0\n\t" - "mov %%o0, %0\n" - : "=r" (ret) : "r" (addr), "r" (size) : - "o0", "o1", "o2", "o3", "o4", "o5", "o7", - "g1", "g2", "g3", "g4", "g5", "g7", "cc"); - - return ret; -} - -static inline unsigned long clear_user(void __user *addr, unsigned long n) -{ - if (n && __access_ok((unsigned long) addr, n)) - return __clear_user(addr, n); - else - return n; -} - -extern long __strncpy_from_user(char *dest, const char __user *src, long count); - -static inline long strncpy_from_user(char *dest, const char __user *src, long count) -{ - if (__access_ok((unsigned long) src, count)) - return __strncpy_from_user(dest, src, count); - else - return -EFAULT; -} - -extern long __strlen_user(const char __user *); -extern long __strnlen_user(const char __user *, long len); - -static inline long strlen_user(const char __user *str) -{ - if (!access_ok(VERIFY_READ, str, 0)) - return 0; - else - return __strlen_user(str); -} - -static inline long strnlen_user(const char __user *str, long len) -{ - if (!access_ok(VERIFY_READ, str, 0)) - return 0; - else - return __strnlen_user(str, len); -} - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/uaccess_64.h b/include/asm-sparc/uaccess_64.h deleted file mode 100644 index 296ef30..0000000 --- a/include/asm-sparc/uaccess_64.h +++ /dev/null @@ -1,273 +0,0 @@ -#ifndef _ASM_UACCESS_H -#define _ASM_UACCESS_H - -/* - * User space memory access functions - */ - -#ifdef __KERNEL__ -#include -#include -#include -#include -#include -#include -#include -#endif - -#ifndef __ASSEMBLY__ - -/* - * Sparc64 is segmented, though more like the M68K than the I386. - * We use the secondary ASI to address user memory, which references a - * completely different VM map, thus there is zero chance of the user - * doing something queer and tricking us into poking kernel memory. - * - * What is left here is basically what is needed for the other parts of - * the kernel that expect to be able to manipulate, erum, "segments". - * Or perhaps more properly, permissions. - * - * "For historical reasons, these macros are grossly misnamed." -Linus - */ - -#define KERNEL_DS ((mm_segment_t) { ASI_P }) -#define USER_DS ((mm_segment_t) { ASI_AIUS }) /* har har har */ - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define get_fs() ((mm_segment_t) { get_thread_current_ds() }) -#define get_ds() (KERNEL_DS) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#define set_fs(val) \ -do { \ - set_thread_current_ds((val).seg); \ - __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \ -} while(0) - -static inline int __access_ok(const void __user * addr, unsigned long size) -{ - return 1; -} - -static inline int access_ok(int type, const void __user * addr, unsigned long size) -{ - return 1; -} - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry { - unsigned int insn, fixup; -}; - -extern void __ret_efault(void); -extern void __retl_efault(void); - -/* Uh, these should become the main single-value transfer routines.. - * They automatically use the right size if we just have the right - * pointer type.. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - */ -#define put_user(x,ptr) ({ \ -unsigned long __pu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) - -#define get_user(x,ptr) ({ \ -unsigned long __gu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) - -#define __put_user(x,ptr) put_user(x,ptr) -#define __get_user(x,ptr) get_user(x,ptr) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) ((struct __large_struct *)(x)) - -#define __put_user_nocheck(data,addr,size) ({ \ -register int __pu_ret; \ -switch (size) { \ -case 1: __put_user_asm(data,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(data,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(data,w,addr,__pu_ret); break; \ -case 8: __put_user_asm(data,x,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} __pu_ret; }) - -#define __put_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Put user asm, inline. */\n" \ -"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "sethi %%hi(2b), %0\n\t" \ - "jmpl %0 + %%lo(2b), %%g0\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\t" \ - ".previous\n\n\t" \ - : "=r" (ret) : "r" (x), "r" (__m(addr)), \ - "i" (-EFAULT)) - -extern int __put_user_bad(void); - -#define __get_user_nocheck(data,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} data = (type) __gu_val; __gu_ret; }) - -#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} data = (type) __gu_val; }) - -#define __get_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user asm, inline. */\n" \ -"1:\t" "ld"#size "a [%2] %%asi, %1\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "sethi %%hi(2b), %0\n\t" \ - "clr %1\n\t" \ - "jmpl %0 + %%lo(2b), %%g0\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=r" (ret), "=r" (x) : "r" (__m(addr)), \ - "i" (-EFAULT)) - -#define __get_user_asm_ret(x,size,addr,retval) \ -if (__builtin_constant_p(retval) && retval == -EFAULT) \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b,__ret_efault\n\n\t" \ - ".previous\n\t" \ - : "=r" (x) : "r" (__m(addr))); \ -else \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "ret\n\t" \ - " restore %%g0, %2, %%o0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=r" (x) : "r" (__m(addr)), "i" (retval)) - -extern int __get_user_bad(void); - -extern unsigned long __must_check ___copy_from_user(void *to, - const void __user *from, - unsigned long size); -extern unsigned long copy_from_user_fixup(void *to, const void __user *from, - unsigned long size); -static inline unsigned long __must_check -copy_from_user(void *to, const void __user *from, unsigned long size) -{ - unsigned long ret = ___copy_from_user(to, from, size); - - if (unlikely(ret)) - ret = copy_from_user_fixup(to, from, size); - return ret; -} -#define __copy_from_user copy_from_user - -extern unsigned long __must_check ___copy_to_user(void __user *to, - const void *from, - unsigned long size); -extern unsigned long copy_to_user_fixup(void __user *to, const void *from, - unsigned long size); -static inline unsigned long __must_check -copy_to_user(void __user *to, const void *from, unsigned long size) -{ - unsigned long ret = ___copy_to_user(to, from, size); - - if (unlikely(ret)) - ret = copy_to_user_fixup(to, from, size); - return ret; -} -#define __copy_to_user copy_to_user - -extern unsigned long __must_check ___copy_in_user(void __user *to, - const void __user *from, - unsigned long size); -extern unsigned long copy_in_user_fixup(void __user *to, void __user *from, - unsigned long size); -static inline unsigned long __must_check -copy_in_user(void __user *to, void __user *from, unsigned long size) -{ - unsigned long ret = ___copy_in_user(to, from, size); - - if (unlikely(ret)) - ret = copy_in_user_fixup(to, from, size); - return ret; -} -#define __copy_in_user copy_in_user - -extern unsigned long __must_check __clear_user(void __user *, unsigned long); - -#define clear_user __clear_user - -extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count); - -#define strncpy_from_user __strncpy_from_user - -extern long __strlen_user(const char __user *); -extern long __strnlen_user(const char __user *, long len); - -#define strlen_user __strlen_user -#define strnlen_user __strnlen_user -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/uctx.h b/include/asm-sparc/uctx.h deleted file mode 100644 index dc937c7..0000000 --- a/include/asm-sparc/uctx.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * uctx.h: Sparc64 {set,get}context() register state layouts. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC64_UCTX_H -#define __SPARC64_UCTX_H - -#define MC_TSTATE 0 -#define MC_PC 1 -#define MC_NPC 2 -#define MC_Y 3 -#define MC_G1 4 -#define MC_G2 5 -#define MC_G3 6 -#define MC_G4 7 -#define MC_G5 8 -#define MC_G6 9 -#define MC_G7 10 -#define MC_O0 11 -#define MC_O1 12 -#define MC_O2 13 -#define MC_O3 14 -#define MC_O4 15 -#define MC_O5 16 -#define MC_O6 17 -#define MC_O7 18 -#define MC_NGREG 19 - -typedef unsigned long mc_greg_t; -typedef mc_greg_t mc_gregset_t[MC_NGREG]; - -#define MC_MAXFPQ 16 -struct mc_fq { - unsigned long *mcfq_addr; - unsigned int mcfq_insn; -}; - -struct mc_fpu { - union { - unsigned int sregs[32]; - unsigned long dregs[32]; - long double qregs[16]; - } mcfpu_fregs; - unsigned long mcfpu_fsr; - unsigned long mcfpu_fprs; - unsigned long mcfpu_gsr; - struct mc_fq *mcfpu_fq; - unsigned char mcfpu_qcnt; - unsigned char mcfpu_qentsz; - unsigned char mcfpu_enab; -}; -typedef struct mc_fpu mc_fpu_t; - -typedef struct { - mc_gregset_t mc_gregs; - mc_greg_t mc_fp; - mc_greg_t mc_i7; - mc_fpu_t mc_fpregs; -} mcontext_t; - -struct ucontext { - struct ucontext *uc_link; - unsigned long uc_flags; - sigset_t uc_sigmask; - mcontext_t uc_mcontext; -}; -typedef struct ucontext ucontext_t; - -#endif /* __SPARC64_UCTX_H */ diff --git a/include/asm-sparc/unaligned.h b/include/asm-sparc/unaligned.h deleted file mode 100644 index 11d2d5f..0000000 --- a/include/asm-sparc/unaligned.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _ASM_SPARC_UNALIGNED_H -#define _ASM_SPARC_UNALIGNED_H - -#include -#include -#include -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif /* _ASM_SPARC_UNALIGNED_H */ diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h deleted file mode 100644 index 3c26096..0000000 --- a/include/asm-sparc/unistd.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_UNISTD_H -#define ___ASM_SPARC_UNISTD_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/unistd_32.h b/include/asm-sparc/unistd_32.h deleted file mode 100644 index 648643a..0000000 --- a/include/asm-sparc/unistd_32.h +++ /dev/null @@ -1,384 +0,0 @@ -#ifndef _SPARC_UNISTD_H -#define _SPARC_UNISTD_H - -/* - * System calls under the Sparc. - * - * Don't be scared by the ugly clobbers, it is the only way I can - * think of right now to force the arguments into fixed registers - * before the trap into the system call with gcc 'asm' statements. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * - * SunOS compatibility based upon preliminary work which is: - * - * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) - */ - -#define __NR_restart_syscall 0 /* Linux Specific */ -#define __NR_exit 1 /* Common */ -#define __NR_fork 2 /* Common */ -#define __NR_read 3 /* Common */ -#define __NR_write 4 /* Common */ -#define __NR_open 5 /* Common */ -#define __NR_close 6 /* Common */ -#define __NR_wait4 7 /* Common */ -#define __NR_creat 8 /* Common */ -#define __NR_link 9 /* Common */ -#define __NR_unlink 10 /* Common */ -#define __NR_execv 11 /* SunOS Specific */ -#define __NR_chdir 12 /* Common */ -#define __NR_chown 13 /* Common */ -#define __NR_mknod 14 /* Common */ -#define __NR_chmod 15 /* Common */ -#define __NR_lchown 16 /* Common */ -#define __NR_brk 17 /* Common */ -#define __NR_perfctr 18 /* Performance counter operations */ -#define __NR_lseek 19 /* Common */ -#define __NR_getpid 20 /* Common */ -#define __NR_capget 21 /* Linux Specific */ -#define __NR_capset 22 /* Linux Specific */ -#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ -#define __NR_getuid 24 /* Common */ -#define __NR_vmsplice 25 /* ENOSYS under SunOS */ -#define __NR_ptrace 26 /* Common */ -#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ -#define __NR_sigaltstack 28 /* Common */ -#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ -#define __NR_utime 30 /* Implemented via utimes() under SunOS */ -#define __NR_lchown32 31 /* Linux sparc32 specific */ -#define __NR_fchown32 32 /* Linux sparc32 specific */ -#define __NR_access 33 /* Common */ -#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ -#define __NR_chown32 35 /* Linux sparc32 specific */ -#define __NR_sync 36 /* Common */ -#define __NR_kill 37 /* Common */ -#define __NR_stat 38 /* Common */ -#define __NR_sendfile 39 /* Linux Specific */ -#define __NR_lstat 40 /* Common */ -#define __NR_dup 41 /* Common */ -#define __NR_pipe 42 /* Common */ -#define __NR_times 43 /* Implemented via getrusage() in SunOS */ -#define __NR_getuid32 44 /* Linux sparc32 specific */ -#define __NR_umount2 45 /* Linux Specific */ -#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ -#define __NR_getgid 47 /* Common */ -#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ -#define __NR_geteuid 49 /* SunOS calls getuid() */ -#define __NR_getegid 50 /* SunOS calls getgid() */ -#define __NR_acct 51 /* Common */ -/* #define __NR_memory_ordering 52 Linux sparc64 specific */ -#define __NR_getgid32 53 /* Linux sparc32 specific */ -#define __NR_ioctl 54 /* Common */ -#define __NR_reboot 55 /* Common */ -#define __NR_mmap2 56 /* Linux sparc32 Specific */ -#define __NR_symlink 57 /* Common */ -#define __NR_readlink 58 /* Common */ -#define __NR_execve 59 /* Common */ -#define __NR_umask 60 /* Common */ -#define __NR_chroot 61 /* Common */ -#define __NR_fstat 62 /* Common */ -#define __NR_fstat64 63 /* Linux Specific */ -#define __NR_getpagesize 64 /* Common */ -#define __NR_msync 65 /* Common in newer 1.3.x revs... */ -#define __NR_vfork 66 /* Common */ -#define __NR_pread64 67 /* Linux Specific */ -#define __NR_pwrite64 68 /* Linux Specific */ -#define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */ -#define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */ -#define __NR_mmap 71 /* Common */ -#define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */ -#define __NR_munmap 73 /* Common */ -#define __NR_mprotect 74 /* Common */ -#define __NR_madvise 75 /* Common */ -#define __NR_vhangup 76 /* Common */ -#define __NR_truncate64 77 /* Linux sparc32 Specific */ -#define __NR_mincore 78 /* Common */ -#define __NR_getgroups 79 /* Common */ -#define __NR_setgroups 80 /* Common */ -#define __NR_getpgrp 81 /* Common */ -#define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */ -#define __NR_setitimer 83 /* Common */ -#define __NR_ftruncate64 84 /* Linux sparc32 Specific */ -#define __NR_swapon 85 /* Common */ -#define __NR_getitimer 86 /* Common */ -#define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */ -#define __NR_sethostname 88 /* Common */ -#define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */ -#define __NR_dup2 90 /* Common */ -#define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */ -#define __NR_fcntl 92 /* Common */ -#define __NR_select 93 /* Common */ -#define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */ -#define __NR_fsync 95 /* Common */ -#define __NR_setpriority 96 /* Common */ -#define __NR_socket 97 /* Common */ -#define __NR_connect 98 /* Common */ -#define __NR_accept 99 /* Common */ -#define __NR_getpriority 100 /* Common */ -#define __NR_rt_sigreturn 101 /* Linux Specific */ -#define __NR_rt_sigaction 102 /* Linux Specific */ -#define __NR_rt_sigprocmask 103 /* Linux Specific */ -#define __NR_rt_sigpending 104 /* Linux Specific */ -#define __NR_rt_sigtimedwait 105 /* Linux Specific */ -#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ -#define __NR_rt_sigsuspend 107 /* Linux Specific */ -#define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */ -#define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */ -#define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */ -#define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */ -#define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */ -#define __NR_recvmsg 113 /* Common */ -#define __NR_sendmsg 114 /* Common */ -#define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */ -#define __NR_gettimeofday 116 /* Common */ -#define __NR_getrusage 117 /* Common */ -#define __NR_getsockopt 118 /* Common */ -#define __NR_getcwd 119 /* Linux Specific */ -#define __NR_readv 120 /* Common */ -#define __NR_writev 121 /* Common */ -#define __NR_settimeofday 122 /* Common */ -#define __NR_fchown 123 /* Common */ -#define __NR_fchmod 124 /* Common */ -#define __NR_recvfrom 125 /* Common */ -#define __NR_setreuid 126 /* Common */ -#define __NR_setregid 127 /* Common */ -#define __NR_rename 128 /* Common */ -#define __NR_truncate 129 /* Common */ -#define __NR_ftruncate 130 /* Common */ -#define __NR_flock 131 /* Common */ -#define __NR_lstat64 132 /* Linux Specific */ -#define __NR_sendto 133 /* Common */ -#define __NR_shutdown 134 /* Common */ -#define __NR_socketpair 135 /* Common */ -#define __NR_mkdir 136 /* Common */ -#define __NR_rmdir 137 /* Common */ -#define __NR_utimes 138 /* SunOS Specific */ -#define __NR_stat64 139 /* Linux Specific */ -#define __NR_sendfile64 140 /* adjtime under SunOS */ -#define __NR_getpeername 141 /* Common */ -#define __NR_futex 142 /* gethostid under SunOS */ -#define __NR_gettid 143 /* ENOSYS under SunOS */ -#define __NR_getrlimit 144 /* Common */ -#define __NR_setrlimit 145 /* Common */ -#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ -#define __NR_prctl 147 /* ENOSYS under SunOS */ -#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ -#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ -#define __NR_getsockname 150 /* Common */ -#define __NR_inotify_init 151 /* Linux specific */ -#define __NR_inotify_add_watch 152 /* Linux specific */ -#define __NR_poll 153 /* Common */ -#define __NR_getdents64 154 /* Linux specific */ -#define __NR_fcntl64 155 /* Linux sparc32 Specific */ -#define __NR_inotify_rm_watch 156 /* Linux specific */ -#define __NR_statfs 157 /* Common */ -#define __NR_fstatfs 158 /* Common */ -#define __NR_umount 159 /* Common */ -#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ -#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ -#define __NR_getdomainname 162 /* SunOS Specific */ -#define __NR_setdomainname 163 /* Common */ -/* #define __NR_utrap_install 164 Linux sparc64 specific */ -#define __NR_quotactl 165 /* Common */ -#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ -#define __NR_mount 167 /* Common */ -#define __NR_ustat 168 /* Common */ -#define __NR_setxattr 169 /* SunOS: semsys */ -#define __NR_lsetxattr 170 /* SunOS: msgsys */ -#define __NR_fsetxattr 171 /* SunOS: shmsys */ -#define __NR_getxattr 172 /* SunOS: auditsys */ -#define __NR_lgetxattr 173 /* SunOS: rfssys */ -#define __NR_getdents 174 /* Common */ -#define __NR_setsid 175 /* Common */ -#define __NR_fchdir 176 /* Common */ -#define __NR_fgetxattr 177 /* SunOS: fchroot */ -#define __NR_listxattr 178 /* SunOS: vpixsys */ -#define __NR_llistxattr 179 /* SunOS: aioread */ -#define __NR_flistxattr 180 /* SunOS: aiowrite */ -#define __NR_removexattr 181 /* SunOS: aiowait */ -#define __NR_lremovexattr 182 /* SunOS: aiocancel */ -#define __NR_sigpending 183 /* Common */ -#define __NR_query_module 184 /* Linux Specific */ -#define __NR_setpgid 185 /* Common */ -#define __NR_fremovexattr 186 /* SunOS: pathconf */ -#define __NR_tkill 187 /* SunOS: fpathconf */ -#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ -#define __NR_uname 189 /* Linux Specific */ -#define __NR_init_module 190 /* Linux Specific */ -#define __NR_personality 191 /* Linux Specific */ -#define __NR_remap_file_pages 192 /* Linux Specific */ -#define __NR_epoll_create 193 /* Linux Specific */ -#define __NR_epoll_ctl 194 /* Linux Specific */ -#define __NR_epoll_wait 195 /* Linux Specific */ -#define __NR_ioprio_set 196 /* Linux Specific */ -#define __NR_getppid 197 /* Linux Specific */ -#define __NR_sigaction 198 /* Linux Specific */ -#define __NR_sgetmask 199 /* Linux Specific */ -#define __NR_ssetmask 200 /* Linux Specific */ -#define __NR_sigsuspend 201 /* Linux Specific */ -#define __NR_oldlstat 202 /* Linux Specific */ -#define __NR_uselib 203 /* Linux Specific */ -#define __NR_readdir 204 /* Linux Specific */ -#define __NR_readahead 205 /* Linux Specific */ -#define __NR_socketcall 206 /* Linux Specific */ -#define __NR_syslog 207 /* Linux Specific */ -#define __NR_lookup_dcookie 208 /* Linux Specific */ -#define __NR_fadvise64 209 /* Linux Specific */ -#define __NR_fadvise64_64 210 /* Linux Specific */ -#define __NR_tgkill 211 /* Linux Specific */ -#define __NR_waitpid 212 /* Linux Specific */ -#define __NR_swapoff 213 /* Linux Specific */ -#define __NR_sysinfo 214 /* Linux Specific */ -#define __NR_ipc 215 /* Linux Specific */ -#define __NR_sigreturn 216 /* Linux Specific */ -#define __NR_clone 217 /* Linux Specific */ -#define __NR_ioprio_get 218 /* Linux Specific */ -#define __NR_adjtimex 219 /* Linux Specific */ -#define __NR_sigprocmask 220 /* Linux Specific */ -#define __NR_create_module 221 /* Linux Specific */ -#define __NR_delete_module 222 /* Linux Specific */ -#define __NR_get_kernel_syms 223 /* Linux Specific */ -#define __NR_getpgid 224 /* Linux Specific */ -#define __NR_bdflush 225 /* Linux Specific */ -#define __NR_sysfs 226 /* Linux Specific */ -#define __NR_afs_syscall 227 /* Linux Specific */ -#define __NR_setfsuid 228 /* Linux Specific */ -#define __NR_setfsgid 229 /* Linux Specific */ -#define __NR__newselect 230 /* Linux Specific */ -#define __NR_time 231 /* Linux Specific */ -#define __NR_splice 232 /* Linux Specific */ -#define __NR_stime 233 /* Linux Specific */ -#define __NR_statfs64 234 /* Linux Specific */ -#define __NR_fstatfs64 235 /* Linux Specific */ -#define __NR__llseek 236 /* Linux Specific */ -#define __NR_mlock 237 -#define __NR_munlock 238 -#define __NR_mlockall 239 -#define __NR_munlockall 240 -#define __NR_sched_setparam 241 -#define __NR_sched_getparam 242 -#define __NR_sched_setscheduler 243 -#define __NR_sched_getscheduler 244 -#define __NR_sched_yield 245 -#define __NR_sched_get_priority_max 246 -#define __NR_sched_get_priority_min 247 -#define __NR_sched_rr_get_interval 248 -#define __NR_nanosleep 249 -#define __NR_mremap 250 -#define __NR__sysctl 251 -#define __NR_getsid 252 -#define __NR_fdatasync 253 -#define __NR_nfsservctl 254 -#define __NR_sync_file_range 255 -#define __NR_clock_settime 256 -#define __NR_clock_gettime 257 -#define __NR_clock_getres 258 -#define __NR_clock_nanosleep 259 -#define __NR_sched_getaffinity 260 -#define __NR_sched_setaffinity 261 -#define __NR_timer_settime 262 -#define __NR_timer_gettime 263 -#define __NR_timer_getoverrun 264 -#define __NR_timer_delete 265 -#define __NR_timer_create 266 -/* #define __NR_vserver 267 Reserved for VSERVER */ -#define __NR_io_setup 268 -#define __NR_io_destroy 269 -#define __NR_io_submit 270 -#define __NR_io_cancel 271 -#define __NR_io_getevents 272 -#define __NR_mq_open 273 -#define __NR_mq_unlink 274 -#define __NR_mq_timedsend 275 -#define __NR_mq_timedreceive 276 -#define __NR_mq_notify 277 -#define __NR_mq_getsetattr 278 -#define __NR_waitid 279 -#define __NR_tee 280 -#define __NR_add_key 281 -#define __NR_request_key 282 -#define __NR_keyctl 283 -#define __NR_openat 284 -#define __NR_mkdirat 285 -#define __NR_mknodat 286 -#define __NR_fchownat 287 -#define __NR_futimesat 288 -#define __NR_fstatat64 289 -#define __NR_unlinkat 290 -#define __NR_renameat 291 -#define __NR_linkat 292 -#define __NR_symlinkat 293 -#define __NR_readlinkat 294 -#define __NR_fchmodat 295 -#define __NR_faccessat 296 -#define __NR_pselect6 297 -#define __NR_ppoll 298 -#define __NR_unshare 299 -#define __NR_set_robust_list 300 -#define __NR_get_robust_list 301 -#define __NR_migrate_pages 302 -#define __NR_mbind 303 -#define __NR_get_mempolicy 304 -#define __NR_set_mempolicy 305 -#define __NR_kexec_load 306 -#define __NR_move_pages 307 -#define __NR_getcpu 308 -#define __NR_epoll_pwait 309 -#define __NR_utimensat 310 -#define __NR_signalfd 311 -#define __NR_timerfd_create 312 -#define __NR_eventfd 313 -#define __NR_fallocate 314 -#define __NR_timerfd_settime 315 -#define __NR_timerfd_gettime 316 -#define __NR_signalfd4 317 -#define __NR_eventfd2 318 -#define __NR_epoll_create1 319 -#define __NR_dup3 320 -#define __NR_pipe2 321 -#define __NR_inotify_init1 322 - -#define NR_SYSCALLS 323 - -/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, - * it never had the plain ones and there is no value to adding those - * old versions into the syscall table. - */ -#define __IGNORE_setresuid -#define __IGNORE_getresuid -#define __IGNORE_setresgid -#define __IGNORE_getresgid - -#ifdef __KERNEL__ -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _SPARC_UNISTD_H */ diff --git a/include/asm-sparc/unistd_64.h b/include/asm-sparc/unistd_64.h deleted file mode 100644 index c5cc0e0..0000000 --- a/include/asm-sparc/unistd_64.h +++ /dev/null @@ -1,379 +0,0 @@ -#ifndef _SPARC64_UNISTD_H -#define _SPARC64_UNISTD_H - -/* - * System calls under the Sparc. - * - * Don't be scared by the ugly clobbers, it is the only way I can - * think of right now to force the arguments into fixed registers - * before the trap into the system call with gcc 'asm' statements. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * - * SunOS compatibility based upon preliminary work which is: - * - * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) - */ - -#define __NR_restart_syscall 0 /* Linux Specific */ -#define __NR_exit 1 /* Common */ -#define __NR_fork 2 /* Common */ -#define __NR_read 3 /* Common */ -#define __NR_write 4 /* Common */ -#define __NR_open 5 /* Common */ -#define __NR_close 6 /* Common */ -#define __NR_wait4 7 /* Common */ -#define __NR_creat 8 /* Common */ -#define __NR_link 9 /* Common */ -#define __NR_unlink 10 /* Common */ -#define __NR_execv 11 /* SunOS Specific */ -#define __NR_chdir 12 /* Common */ -#define __NR_chown 13 /* Common */ -#define __NR_mknod 14 /* Common */ -#define __NR_chmod 15 /* Common */ -#define __NR_lchown 16 /* Common */ -#define __NR_brk 17 /* Common */ -#define __NR_perfctr 18 /* Performance counter operations */ -#define __NR_lseek 19 /* Common */ -#define __NR_getpid 20 /* Common */ -#define __NR_capget 21 /* Linux Specific */ -#define __NR_capset 22 /* Linux Specific */ -#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ -#define __NR_getuid 24 /* Common */ -#define __NR_vmsplice 25 /* ENOSYS under SunOS */ -#define __NR_ptrace 26 /* Common */ -#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ -#define __NR_sigaltstack 28 /* Common */ -#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ -#define __NR_utime 30 /* Implemented via utimes() under SunOS */ -/* #define __NR_lchown32 31 Linux sparc32 specific */ -/* #define __NR_fchown32 32 Linux sparc32 specific */ -#define __NR_access 33 /* Common */ -#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ -/* #define __NR_chown32 35 Linux sparc32 specific */ -#define __NR_sync 36 /* Common */ -#define __NR_kill 37 /* Common */ -#define __NR_stat 38 /* Common */ -#define __NR_sendfile 39 /* Linux Specific */ -#define __NR_lstat 40 /* Common */ -#define __NR_dup 41 /* Common */ -#define __NR_pipe 42 /* Common */ -#define __NR_times 43 /* Implemented via getrusage() in SunOS */ -/* #define __NR_getuid32 44 Linux sparc32 specific */ -#define __NR_umount2 45 /* Linux Specific */ -#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ -#define __NR_getgid 47 /* Common */ -#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ -#define __NR_geteuid 49 /* SunOS calls getuid() */ -#define __NR_getegid 50 /* SunOS calls getgid() */ -#define __NR_acct 51 /* Common */ -#define __NR_memory_ordering 52 /* Linux Specific */ -/* #define __NR_getgid32 53 Linux sparc32 specific */ -#define __NR_ioctl 54 /* Common */ -#define __NR_reboot 55 /* Common */ -/* #define __NR_mmap2 56 Linux sparc32 Specific */ -#define __NR_symlink 57 /* Common */ -#define __NR_readlink 58 /* Common */ -#define __NR_execve 59 /* Common */ -#define __NR_umask 60 /* Common */ -#define __NR_chroot 61 /* Common */ -#define __NR_fstat 62 /* Common */ -#define __NR_fstat64 63 /* Linux Specific */ -#define __NR_getpagesize 64 /* Common */ -#define __NR_msync 65 /* Common in newer 1.3.x revs... */ -#define __NR_vfork 66 /* Common */ -#define __NR_pread64 67 /* Linux Specific */ -#define __NR_pwrite64 68 /* Linux Specific */ -/* #define __NR_geteuid32 69 Linux sparc32, sbrk under SunOS */ -/* #define __NR_getegid32 70 Linux sparc32, sstk under SunOS */ -#define __NR_mmap 71 /* Common */ -/* #define __NR_setreuid32 72 Linux sparc32, vadvise under SunOS */ -#define __NR_munmap 73 /* Common */ -#define __NR_mprotect 74 /* Common */ -#define __NR_madvise 75 /* Common */ -#define __NR_vhangup 76 /* Common */ -/* #define __NR_truncate64 77 Linux sparc32 Specific */ -#define __NR_mincore 78 /* Common */ -#define __NR_getgroups 79 /* Common */ -#define __NR_setgroups 80 /* Common */ -#define __NR_getpgrp 81 /* Common */ -/* #define __NR_setgroups32 82 Linux sparc32, setpgrp under SunOS */ -#define __NR_setitimer 83 /* Common */ -/* #define __NR_ftruncate64 84 Linux sparc32 Specific */ -#define __NR_swapon 85 /* Common */ -#define __NR_getitimer 86 /* Common */ -/* #define __NR_setuid32 87 Linux sparc32, gethostname under SunOS */ -#define __NR_sethostname 88 /* Common */ -/* #define __NR_setgid32 89 Linux sparc32, getdtablesize under SunOS */ -#define __NR_dup2 90 /* Common */ -/* #define __NR_setfsuid32 91 Linux sparc32, getdopt under SunOS */ -#define __NR_fcntl 92 /* Common */ -#define __NR_select 93 /* Common */ -/* #define __NR_setfsgid32 94 Linux sparc32, setdopt under SunOS */ -#define __NR_fsync 95 /* Common */ -#define __NR_setpriority 96 /* Common */ -#define __NR_socket 97 /* Common */ -#define __NR_connect 98 /* Common */ -#define __NR_accept 99 /* Common */ -#define __NR_getpriority 100 /* Common */ -#define __NR_rt_sigreturn 101 /* Linux Specific */ -#define __NR_rt_sigaction 102 /* Linux Specific */ -#define __NR_rt_sigprocmask 103 /* Linux Specific */ -#define __NR_rt_sigpending 104 /* Linux Specific */ -#define __NR_rt_sigtimedwait 105 /* Linux Specific */ -#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ -#define __NR_rt_sigsuspend 107 /* Linux Specific */ -#define __NR_setresuid 108 /* Linux Specific, sigvec under SunOS */ -#define __NR_getresuid 109 /* Linux Specific, sigblock under SunOS */ -#define __NR_setresgid 110 /* Linux Specific, sigsetmask under SunOS */ -#define __NR_getresgid 111 /* Linux Specific, sigpause under SunOS */ -/* #define __NR_setregid32 75 Linux sparc32, sigstack under SunOS */ -#define __NR_recvmsg 113 /* Common */ -#define __NR_sendmsg 114 /* Common */ -/* #define __NR_getgroups32 115 Linux sparc32, vtrace under SunOS */ -#define __NR_gettimeofday 116 /* Common */ -#define __NR_getrusage 117 /* Common */ -#define __NR_getsockopt 118 /* Common */ -#define __NR_getcwd 119 /* Linux Specific */ -#define __NR_readv 120 /* Common */ -#define __NR_writev 121 /* Common */ -#define __NR_settimeofday 122 /* Common */ -#define __NR_fchown 123 /* Common */ -#define __NR_fchmod 124 /* Common */ -#define __NR_recvfrom 125 /* Common */ -#define __NR_setreuid 126 /* Common */ -#define __NR_setregid 127 /* Common */ -#define __NR_rename 128 /* Common */ -#define __NR_truncate 129 /* Common */ -#define __NR_ftruncate 130 /* Common */ -#define __NR_flock 131 /* Common */ -#define __NR_lstat64 132 /* Linux Specific */ -#define __NR_sendto 133 /* Common */ -#define __NR_shutdown 134 /* Common */ -#define __NR_socketpair 135 /* Common */ -#define __NR_mkdir 136 /* Common */ -#define __NR_rmdir 137 /* Common */ -#define __NR_utimes 138 /* SunOS Specific */ -#define __NR_stat64 139 /* Linux Specific */ -#define __NR_sendfile64 140 /* adjtime under SunOS */ -#define __NR_getpeername 141 /* Common */ -#define __NR_futex 142 /* gethostid under SunOS */ -#define __NR_gettid 143 /* ENOSYS under SunOS */ -#define __NR_getrlimit 144 /* Common */ -#define __NR_setrlimit 145 /* Common */ -#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ -#define __NR_prctl 147 /* ENOSYS under SunOS */ -#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ -#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ -#define __NR_getsockname 150 /* Common */ -#define __NR_inotify_init 151 /* Linux specific */ -#define __NR_inotify_add_watch 152 /* Linux specific */ -#define __NR_poll 153 /* Common */ -#define __NR_getdents64 154 /* Linux specific */ -/* #define __NR_fcntl64 155 Linux sparc32 Specific */ -#define __NR_inotify_rm_watch 156 /* Linux specific */ -#define __NR_statfs 157 /* Common */ -#define __NR_fstatfs 158 /* Common */ -#define __NR_umount 159 /* Common */ -#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ -#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ -#define __NR_getdomainname 162 /* SunOS Specific */ -#define __NR_setdomainname 163 /* Common */ -#define __NR_utrap_install 164 /* SYSV ABI/v9 required */ -#define __NR_quotactl 165 /* Common */ -#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ -#define __NR_mount 167 /* Common */ -#define __NR_ustat 168 /* Common */ -#define __NR_setxattr 169 /* SunOS: semsys */ -#define __NR_lsetxattr 170 /* SunOS: msgsys */ -#define __NR_fsetxattr 171 /* SunOS: shmsys */ -#define __NR_getxattr 172 /* SunOS: auditsys */ -#define __NR_lgetxattr 173 /* SunOS: rfssys */ -#define __NR_getdents 174 /* Common */ -#define __NR_setsid 175 /* Common */ -#define __NR_fchdir 176 /* Common */ -#define __NR_fgetxattr 177 /* SunOS: fchroot */ -#define __NR_listxattr 178 /* SunOS: vpixsys */ -#define __NR_llistxattr 179 /* SunOS: aioread */ -#define __NR_flistxattr 180 /* SunOS: aiowrite */ -#define __NR_removexattr 181 /* SunOS: aiowait */ -#define __NR_lremovexattr 182 /* SunOS: aiocancel */ -#define __NR_sigpending 183 /* Common */ -#define __NR_query_module 184 /* Linux Specific */ -#define __NR_setpgid 185 /* Common */ -#define __NR_fremovexattr 186 /* SunOS: pathconf */ -#define __NR_tkill 187 /* SunOS: fpathconf */ -#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ -#define __NR_uname 189 /* Linux Specific */ -#define __NR_init_module 190 /* Linux Specific */ -#define __NR_personality 191 /* Linux Specific */ -#define __NR_remap_file_pages 192 /* Linux Specific */ -#define __NR_epoll_create 193 /* Linux Specific */ -#define __NR_epoll_ctl 194 /* Linux Specific */ -#define __NR_epoll_wait 195 /* Linux Specific */ -#define __NR_ioprio_set 196 /* Linux Specific */ -#define __NR_getppid 197 /* Linux Specific */ -#define __NR_sigaction 198 /* Linux Specific */ -#define __NR_sgetmask 199 /* Linux Specific */ -#define __NR_ssetmask 200 /* Linux Specific */ -#define __NR_sigsuspend 201 /* Linux Specific */ -#define __NR_oldlstat 202 /* Linux Specific */ -#define __NR_uselib 203 /* Linux Specific */ -#define __NR_readdir 204 /* Linux Specific */ -#define __NR_readahead 205 /* Linux Specific */ -#define __NR_socketcall 206 /* Linux Specific */ -#define __NR_syslog 207 /* Linux Specific */ -#define __NR_lookup_dcookie 208 /* Linux Specific */ -#define __NR_fadvise64 209 /* Linux Specific */ -#define __NR_fadvise64_64 210 /* Linux Specific */ -#define __NR_tgkill 211 /* Linux Specific */ -#define __NR_waitpid 212 /* Linux Specific */ -#define __NR_swapoff 213 /* Linux Specific */ -#define __NR_sysinfo 214 /* Linux Specific */ -#define __NR_ipc 215 /* Linux Specific */ -#define __NR_sigreturn 216 /* Linux Specific */ -#define __NR_clone 217 /* Linux Specific */ -#define __NR_ioprio_get 218 /* Linux Specific */ -#define __NR_adjtimex 219 /* Linux Specific */ -#define __NR_sigprocmask 220 /* Linux Specific */ -#define __NR_create_module 221 /* Linux Specific */ -#define __NR_delete_module 222 /* Linux Specific */ -#define __NR_get_kernel_syms 223 /* Linux Specific */ -#define __NR_getpgid 224 /* Linux Specific */ -#define __NR_bdflush 225 /* Linux Specific */ -#define __NR_sysfs 226 /* Linux Specific */ -#define __NR_afs_syscall 227 /* Linux Specific */ -#define __NR_setfsuid 228 /* Linux Specific */ -#define __NR_setfsgid 229 /* Linux Specific */ -#define __NR__newselect 230 /* Linux Specific */ -#ifdef __KERNEL__ -#define __NR_time 231 /* Linux sparc32 */ -#endif -#define __NR_splice 232 /* Linux Specific */ -#define __NR_stime 233 /* Linux Specific */ -#define __NR_statfs64 234 /* Linux Specific */ -#define __NR_fstatfs64 235 /* Linux Specific */ -#define __NR__llseek 236 /* Linux Specific */ -#define __NR_mlock 237 -#define __NR_munlock 238 -#define __NR_mlockall 239 -#define __NR_munlockall 240 -#define __NR_sched_setparam 241 -#define __NR_sched_getparam 242 -#define __NR_sched_setscheduler 243 -#define __NR_sched_getscheduler 244 -#define __NR_sched_yield 245 -#define __NR_sched_get_priority_max 246 -#define __NR_sched_get_priority_min 247 -#define __NR_sched_rr_get_interval 248 -#define __NR_nanosleep 249 -#define __NR_mremap 250 -#define __NR__sysctl 251 -#define __NR_getsid 252 -#define __NR_fdatasync 253 -#define __NR_nfsservctl 254 -#define __NR_sync_file_range 255 -#define __NR_clock_settime 256 -#define __NR_clock_gettime 257 -#define __NR_clock_getres 258 -#define __NR_clock_nanosleep 259 -#define __NR_sched_getaffinity 260 -#define __NR_sched_setaffinity 261 -#define __NR_timer_settime 262 -#define __NR_timer_gettime 263 -#define __NR_timer_getoverrun 264 -#define __NR_timer_delete 265 -#define __NR_timer_create 266 -/* #define __NR_vserver 267 Reserved for VSERVER */ -#define __NR_io_setup 268 -#define __NR_io_destroy 269 -#define __NR_io_submit 270 -#define __NR_io_cancel 271 -#define __NR_io_getevents 272 -#define __NR_mq_open 273 -#define __NR_mq_unlink 274 -#define __NR_mq_timedsend 275 -#define __NR_mq_timedreceive 276 -#define __NR_mq_notify 277 -#define __NR_mq_getsetattr 278 -#define __NR_waitid 279 -#define __NR_tee 280 -#define __NR_add_key 281 -#define __NR_request_key 282 -#define __NR_keyctl 283 -#define __NR_openat 284 -#define __NR_mkdirat 285 -#define __NR_mknodat 286 -#define __NR_fchownat 287 -#define __NR_futimesat 288 -#define __NR_fstatat64 289 -#define __NR_unlinkat 290 -#define __NR_renameat 291 -#define __NR_linkat 292 -#define __NR_symlinkat 293 -#define __NR_readlinkat 294 -#define __NR_fchmodat 295 -#define __NR_faccessat 296 -#define __NR_pselect6 297 -#define __NR_ppoll 298 -#define __NR_unshare 299 -#define __NR_set_robust_list 300 -#define __NR_get_robust_list 301 -#define __NR_migrate_pages 302 -#define __NR_mbind 303 -#define __NR_get_mempolicy 304 -#define __NR_set_mempolicy 305 -#define __NR_kexec_load 306 -#define __NR_move_pages 307 -#define __NR_getcpu 308 -#define __NR_epoll_pwait 309 -#define __NR_utimensat 310 -#define __NR_signalfd 311 -#define __NR_timerfd_create 312 -#define __NR_eventfd 313 -#define __NR_fallocate 314 -#define __NR_timerfd_settime 315 -#define __NR_timerfd_gettime 316 -#define __NR_signalfd4 317 -#define __NR_eventfd2 318 -#define __NR_epoll_create1 319 -#define __NR_dup3 320 -#define __NR_pipe2 321 -#define __NR_inotify_init1 322 - -#define NR_SYSCALLS 323 - -#ifdef __KERNEL__ -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_COMPAT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGSUSPEND -#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _SPARC64_UNISTD_H */ diff --git a/include/asm-sparc/upa.h b/include/asm-sparc/upa.h deleted file mode 100644 index 5b16332..0000000 --- a/include/asm-sparc/upa.h +++ /dev/null @@ -1,109 +0,0 @@ -#ifndef _SPARC64_UPA_H -#define _SPARC64_UPA_H - -#include - -/* UPA level registers and defines. */ - -/* UPA Config Register */ -#define UPA_CONFIG_RESV 0xffffffffc0000000 /* Reserved. */ -#define UPA_CONFIG_PCON 0x000000003fc00000 /* Depth of various sys queues. */ -#define UPA_CONFIG_MID 0x00000000003e0000 /* Module ID. */ -#define UPA_CONFIG_PCAP 0x000000000001ffff /* Port Capabilities. */ - -/* UPA Port ID Register */ -#define UPA_PORTID_FNP 0xff00000000000000 /* Hardcoded to 0xfc on ultra. */ -#define UPA_PORTID_RESV 0x00fffff800000000 /* Reserved. */ -#define UPA_PORTID_ECCVALID 0x0000000400000000 /* Zero if mod can generate ECC */ -#define UPA_PORTID_ONEREAD 0x0000000200000000 /* Set if mod generates P_RASB */ -#define UPA_PORTID_PINTRDQ 0x0000000180000000 /* # outstanding P_INT_REQ's */ -#define UPA_PORTID_PREQDQ 0x000000007e000000 /* slave-wr's to mod supported */ -#define UPA_PORTID_PREQRD 0x0000000001e00000 /* # incoming P_REQ's supported */ -#define UPA_PORTID_UPACAP 0x00000000001f0000 /* UPA capabilities of mod */ -#define UPA_PORTID_ID 0x000000000000ffff /* Module Identification bits */ - -/* UPA I/O space accessors */ -#if defined(__KERNEL__) && !defined(__ASSEMBLY__) -static inline unsigned char _upa_readb(unsigned long addr) -{ - unsigned char ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* upa_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline unsigned short _upa_readw(unsigned long addr) -{ - unsigned short ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* upa_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline unsigned int _upa_readl(unsigned long addr) -{ - unsigned int ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* upa_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline unsigned long _upa_readq(unsigned long addr) -{ - unsigned long ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* upa_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline void _upa_writeb(unsigned char b, unsigned long addr) -{ - __asm__ __volatile__("stba\t%0, [%1] %2\t/* upa_writeb */" - : /* no outputs */ - : "r" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _upa_writew(unsigned short w, unsigned long addr) -{ - __asm__ __volatile__("stha\t%0, [%1] %2\t/* upa_writew */" - : /* no outputs */ - : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _upa_writel(unsigned int l, unsigned long addr) -{ - __asm__ __volatile__("stwa\t%0, [%1] %2\t/* upa_writel */" - : /* no outputs */ - : "r" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _upa_writeq(unsigned long q, unsigned long addr) -{ - __asm__ __volatile__("stxa\t%0, [%1] %2\t/* upa_writeq */" - : /* no outputs */ - : "r" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -#define upa_readb(__addr) (_upa_readb((unsigned long)(__addr))) -#define upa_readw(__addr) (_upa_readw((unsigned long)(__addr))) -#define upa_readl(__addr) (_upa_readl((unsigned long)(__addr))) -#define upa_readq(__addr) (_upa_readq((unsigned long)(__addr))) -#define upa_writeb(__b, __addr) (_upa_writeb((__b), (unsigned long)(__addr))) -#define upa_writew(__w, __addr) (_upa_writew((__w), (unsigned long)(__addr))) -#define upa_writel(__l, __addr) (_upa_writel((__l), (unsigned long)(__addr))) -#define upa_writeq(__q, __addr) (_upa_writeq((__q), (unsigned long)(__addr))) -#endif /* __KERNEL__ && !__ASSEMBLY__ */ - -#endif /* !(_SPARC64_UPA_H) */ diff --git a/include/asm-sparc/user.h b/include/asm-sparc/user.h deleted file mode 100644 index 3400ea8..0000000 --- a/include/asm-sparc/user.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _SPARC_USER_H -#define _SPARC_USER_H - -/* Nothing to define. */ - -#endif /* !(_SPARC_USER_H) */ diff --git a/include/asm-sparc/utrap.h b/include/asm-sparc/utrap.h deleted file mode 100644 index 9da37ba..0000000 --- a/include/asm-sparc/utrap.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * include/asm-sparc64/utrap.h - * - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __ASM_SPARC64_UTRAP_H -#define __ASM_SPARC64_UTRAP_H - -#define UT_INSTRUCTION_EXCEPTION 1 -#define UT_INSTRUCTION_ERROR 2 -#define UT_INSTRUCTION_PROTECTION 3 -#define UT_ILLTRAP_INSTRUCTION 4 -#define UT_ILLEGAL_INSTRUCTION 5 -#define UT_PRIVILEGED_OPCODE 6 -#define UT_FP_DISABLED 7 -#define UT_FP_EXCEPTION_IEEE_754 8 -#define UT_FP_EXCEPTION_OTHER 9 -#define UT_TAG_OVERVIEW 10 -#define UT_DIVISION_BY_ZERO 11 -#define UT_DATA_EXCEPTION 12 -#define UT_DATA_ERROR 13 -#define UT_DATA_PROTECTION 14 -#define UT_MEM_ADDRESS_NOT_ALIGNED 15 -#define UT_PRIVILEGED_ACTION 16 -#define UT_ASYNC_DATA_ERROR 17 -#define UT_TRAP_INSTRUCTION_16 18 -#define UT_TRAP_INSTRUCTION_17 19 -#define UT_TRAP_INSTRUCTION_18 20 -#define UT_TRAP_INSTRUCTION_19 21 -#define UT_TRAP_INSTRUCTION_20 22 -#define UT_TRAP_INSTRUCTION_21 23 -#define UT_TRAP_INSTRUCTION_22 24 -#define UT_TRAP_INSTRUCTION_23 25 -#define UT_TRAP_INSTRUCTION_24 26 -#define UT_TRAP_INSTRUCTION_25 27 -#define UT_TRAP_INSTRUCTION_26 28 -#define UT_TRAP_INSTRUCTION_27 29 -#define UT_TRAP_INSTRUCTION_28 30 -#define UT_TRAP_INSTRUCTION_29 31 -#define UT_TRAP_INSTRUCTION_30 32 -#define UT_TRAP_INSTRUCTION_31 33 - -#define UTH_NOCHANGE (-1) - -#ifndef __ASSEMBLY__ -typedef int utrap_entry_t; -typedef void *utrap_handler_t; -#endif /* __ASSEMBLY__ */ - -#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ diff --git a/include/asm-sparc/vac-ops.h b/include/asm-sparc/vac-ops.h deleted file mode 100644 index d105276..0000000 --- a/include/asm-sparc/vac-ops.h +++ /dev/null @@ -1,134 +0,0 @@ -#ifndef _SPARC_VAC_OPS_H -#define _SPARC_VAC_OPS_H - -/* vac-ops.h: Inline assembly routines to do operations on the Sparc - * VAC (virtual address cache) for the sun4c. - * - * Copyright (C) 1994, David S. Miller (davem@caip.rutgers.edu) - */ - -#include -#include -#include - -/* The SUN4C models have a virtually addressed write-through - * cache. - * - * The cache tags are directly accessible through an ASI and - * each have the form: - * - * ------------------------------------------------------------ - * | MBZ | CONTEXT | WRITE | PRIV | VALID | MBZ | TagID | MBZ | - * ------------------------------------------------------------ - * 31 25 24 22 21 20 19 18 16 15 2 1 0 - * - * MBZ: These bits are either unused and/or reserved and should - * be written as zeroes. - * - * CONTEXT: Records the context to which this cache line belongs. - * - * WRITE: A copy of the writable bit from the mmu pte access bits. - * - * PRIV: A copy of the privileged bit from the pte access bits. - * - * VALID: If set, this line is valid, else invalid. - * - * TagID: Fourteen bits of tag ID. - * - * Every virtual address is seen by the cache like this: - * - * ---------------------------------------- - * | RESV | TagID | LINE | BYTE-in-LINE | - * ---------------------------------------- - * 31 30 29 16 15 4 3 0 - * - * RESV: Unused/reserved. - * - * TagID: Used to match the Tag-ID in that vac tags. - * - * LINE: Which line within the cache - * - * BYTE-in-LINE: Which byte within the cache line. - */ - -/* Sun4c VAC Tags */ -#define S4CVACTAG_CID 0x01c00000 -#define S4CVACTAG_W 0x00200000 -#define S4CVACTAG_P 0x00100000 -#define S4CVACTAG_V 0x00080000 -#define S4CVACTAG_TID 0x0000fffc - -/* Sun4c VAC Virtual Address */ -/* These aren't used, why bother? (Anton) */ -#if 0 -#define S4CVACVA_TID 0x3fff0000 -#define S4CVACVA_LINE 0x0000fff0 -#define S4CVACVA_BIL 0x0000000f -#endif - -/* The indexing of cache lines creates a problem. Because the line - * field of a virtual address extends past the page offset within - * the virtual address it is possible to have what are called - * 'bad aliases' which will create inconsistencies. So we must make - * sure that within a context that if a physical page is mapped - * more than once, that 'extra' line bits are the same. If this is - * not the case, and thus is a 'bad alias' we must turn off the - * cacheable bit in the pte's of all such pages. - */ - -#ifdef CONFIG_SUN4 -#define S4CVAC_BADBITS 0x0001e000 -#else -#define S4CVAC_BADBITS 0x0000f000 -#endif - -/* The following is true if vaddr1 and vaddr2 would cause - * a 'bad alias'. - */ -#define S4CVAC_BADALIAS(vaddr1, vaddr2) \ - ((((unsigned long) (vaddr1)) ^ ((unsigned long) (vaddr2))) & \ - (S4CVAC_BADBITS)) - -/* The following structure describes the characteristics of a sun4c - * VAC as probed from the prom during boot time. - */ -struct sun4c_vac_props { - unsigned int num_bytes; /* Size of the cache */ - unsigned int num_lines; /* Number of cache lines */ - unsigned int do_hwflushes; /* Hardware flushing available? */ - enum { VAC_NONE, VAC_WRITE_THROUGH, - VAC_WRITE_BACK } type; /* What type of VAC? */ - unsigned int linesize; /* Size of each line in bytes */ - unsigned int log2lsize; /* log2(linesize) */ - unsigned int on; /* VAC is enabled */ -}; - -extern struct sun4c_vac_props sun4c_vacinfo; - -/* sun4c_enable_vac() enables the sun4c virtual address cache. */ -static inline void sun4c_enable_vac(void) -{ - __asm__ __volatile__("lduba [%0] %1, %%g1\n\t" - "or %%g1, %2, %%g1\n\t" - "stba %%g1, [%0] %1\n\t" - : /* no outputs */ - : "r" ((unsigned int) AC_SENABLE), - "i" (ASI_CONTROL), "i" (SENABLE_CACHE) - : "g1", "memory"); - sun4c_vacinfo.on = 1; -} - -/* sun4c_disable_vac() disables the virtual address cache. */ -static inline void sun4c_disable_vac(void) -{ - __asm__ __volatile__("lduba [%0] %1, %%g1\n\t" - "andn %%g1, %2, %%g1\n\t" - "stba %%g1, [%0] %1\n\t" - : /* no outputs */ - : "r" ((unsigned int) AC_SENABLE), - "i" (ASI_CONTROL), "i" (SENABLE_CACHE) - : "g1", "memory"); - sun4c_vacinfo.on = 0; -} - -#endif /* !(_SPARC_VAC_OPS_H) */ diff --git a/include/asm-sparc/vaddrs.h b/include/asm-sparc/vaddrs.h deleted file mode 100644 index a22fed5..0000000 --- a/include/asm-sparc/vaddrs.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef _SPARC_VADDRS_H -#define _SPARC_VADDRS_H - -#include - -/* - * asm-sparc/vaddrs.h: Here we define the virtual addresses at - * which important things will be mapped. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 2000 Anton Blanchard (anton@samba.org) - */ - -#define SRMMU_MAXMEM 0x0c000000 - -#define SRMMU_NOCACHE_VADDR (KERNBASE + SRMMU_MAXMEM) - /* = 0x0fc000000 */ -/* XXX Empiricals - this needs to go away - KMW */ -#define SRMMU_MIN_NOCACHE_PAGES (550) -#define SRMMU_MAX_NOCACHE_PAGES (1280) - -/* The following constant is used in mm/srmmu.c::srmmu_nocache_calcsize() - * to determine the amount of memory that will be reserved as nocache: - * - * 256 pages will be taken as nocache per each - * SRMMU_NOCACHE_ALCRATIO MB of system memory. - * - * limits enforced: nocache minimum = 256 pages - * nocache maximum = 1280 pages - */ -#define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ - -#define SUN4M_IOBASE_VADDR 0xfd000000 /* Base for mapping pages */ -#define IOBASE_VADDR 0xfe000000 -#define IOBASE_END 0xfe600000 - -/* - * On the sun4/4c we need a place - * to reliably map locked down kernel data. This includes the - * task_struct and kernel stack pages of each process plus the - * scsi buffers during dvma IO transfers, also the floppy buffers - * during pseudo dma which runs with traps off (no faults allowed). - * Some quick calculations yield: - * NR_TASKS <512> * (3 * PAGE_SIZE) == 0x600000 - * Subtract this from 0xc00000 and you get 0x927C0 of vm left - * over to map SCSI dvma + floppy pseudo-dma buffers. So be - * careful if you change NR_TASKS or else there won't be enough - * room for it all. - */ -#define SUN4C_LOCK_VADDR 0xff000000 -#define SUN4C_LOCK_END 0xffc00000 - -#define KADB_DEBUGGER_BEGVM 0xffc00000 /* Where kern debugger is in virt-mem */ -#define KADB_DEBUGGER_ENDVM 0xffd00000 -#define DEBUG_FIRSTVADDR KADB_DEBUGGER_BEGVM -#define DEBUG_LASTVADDR KADB_DEBUGGER_ENDVM - -#define LINUX_OPPROM_BEGVM 0xffd00000 -#define LINUX_OPPROM_ENDVM 0xfff00000 - -#define DVMA_VADDR 0xfff00000 /* Base area of the DVMA on suns */ -#define DVMA_END 0xfffc0000 - -#endif /* !(_SPARC_VADDRS_H) */ diff --git a/include/asm-sparc/vfc_ioctls.h b/include/asm-sparc/vfc_ioctls.h deleted file mode 100644 index af8b690..0000000 --- a/include/asm-sparc/vfc_ioctls.h +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright (c) 1996 by Manish Vachharajani */ - -#ifndef _LINUX_VFC_IOCTLS_H_ -#define _LINUX_VFC_IOCTLS_H_ - - /* IOCTLs */ -#define VFC_IOCTL(a) (('j' << 8) | a) -#define VFCGCTRL (VFC_IOCTL (0)) /* get vfc attributes */ -#define VFCSCTRL (VFC_IOCTL (1)) /* set vfc attributes */ -#define VFCGVID (VFC_IOCTL (2)) /* get video decoder attributes */ -#define VFCSVID (VFC_IOCTL (3)) /* set video decoder attributes */ -#define VFCHUE (VFC_IOCTL (4)) /* set hue */ -#define VFCPORTCHG (VFC_IOCTL (5)) /* change port */ -#define VFCRDINFO (VFC_IOCTL (6)) /* read info */ - - /* Options for setting the vfc attributes and status */ -#define MEMPRST 0x1 /* reset FIFO ptr. */ -#define CAPTRCMD 0x2 /* start capture and wait */ -#define DIAGMODE 0x3 /* diag mode */ -#define NORMMODE 0x4 /* normal mode */ -#define CAPTRSTR 0x5 /* start capture */ -#define CAPTRWAIT 0x6 /* wait for capture to finish */ - - - /* Options for the decoder */ -#define STD_NTSC 0x1 /* NTSC mode */ -#define STD_PAL 0x2 /* PAL mode */ -#define COLOR_ON 0x3 /* force color ON */ -#define MONO 0x4 /* force color OFF */ - - /* Values returned by ioctl 2 */ - -#define NO_LOCK 1 -#define NTSC_COLOR 2 -#define NTSC_NOCOLOR 3 -#define PAL_COLOR 4 -#define PAL_NOCOLOR 5 - -/* Not too sure what this does yet */ - /* Options for setting Field number */ -#define ODD_FIELD 0x1 -#define EVEN_FIELD 0x0 -#define ACTIVE_ONLY 0x2 -#define NON_ACTIVE 0x0 - -/* Debug options */ -#define VFC_I2C_SEND 0 -#define VFC_I2C_RECV 1 - -struct vfc_debug_inout -{ - unsigned long addr; - unsigned long ret; - unsigned long len; - unsigned char __user *buffer; -}; - -#endif /* _LINUX_VFC_IOCTLS_H_ */ diff --git a/include/asm-sparc/vga.h b/include/asm-sparc/vga.h deleted file mode 100644 index c69d5b2..0000000 --- a/include/asm-sparc/vga.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Access to VGA videoram - * - * (c) 1998 Martin Mares - */ - -#ifndef _LINUX_ASM_VGA_H_ -#define _LINUX_ASM_VGA_H_ - -#include - -#define VT_BUF_HAVE_RW - -#undef scr_writew -#undef scr_readw - -static inline void scr_writew(u16 val, u16 *addr) -{ - BUG_ON((long) addr >= 0); - - *addr = val; -} - -static inline u16 scr_readw(const u16 *addr) -{ - BUG_ON((long) addr >= 0); - - return *addr; -} - -#define VGA_MAP_MEM(x,s) (x) - -#endif diff --git a/include/asm-sparc/viking.h b/include/asm-sparc/viking.h deleted file mode 100644 index 989930a..0000000 --- a/include/asm-sparc/viking.h +++ /dev/null @@ -1,253 +0,0 @@ -/* - * viking.h: Defines specific to the GNU/Viking MBUS module. - * This is SRMMU stuff. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_VIKING_H -#define _SPARC_VIKING_H - -#include -#include -#include - -/* Bits in the SRMMU control register for GNU/Viking modules. - * - * ----------------------------------------------------------- - * |impl-vers| RSV |TC|AC|SP|BM|PC|MBM|SB|IC|DC|PSO|RSV|NF|ME| - * ----------------------------------------------------------- - * 31 24 23-17 16 15 14 13 12 11 10 9 8 7 6-2 1 0 - * - * TC: Tablewalk Cacheable -- 0 = Twalks are not cacheable in E-cache - * 1 = Twalks are cacheable in E-cache - * - * GNU/Viking will only cache tablewalks in the E-cache (mxcc) if present - * and never caches them internally (or so states the docs). Therefore - * for machines lacking an E-cache (ie. in MBUS mode) this bit must - * remain cleared. - * - * AC: Alternate Cacheable -- 0 = Passthru physical accesses not cacheable - * 1 = Passthru physical accesses cacheable - * - * This indicates whether accesses are cacheable when no cachable bit - * is present in the pte when the processor is in boot-mode or the - * access does not need pte's for translation (ie. pass-thru ASI's). - * "Cachable" is only referring to E-cache (if present) and not the - * on chip split I/D caches of the GNU/Viking. - * - * SP: SnooP Enable -- 0 = bus snooping off, 1 = bus snooping on - * - * This enables snooping on the GNU/Viking bus. This must be on - * for the hardware cache consistency mechanisms of the GNU/Viking - * to work at all. On non-mxcc GNU/Viking modules the split I/D - * caches will snoop regardless of whether they are enabled, this - * takes care of the case where the I or D or both caches are turned - * off yet still contain valid data. Note also that this bit does - * not affect GNU/Viking store-buffer snoops, those happen if the - * store-buffer is enabled no matter what. - * - * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode - * - * This indicates whether the GNU/Viking is in boot-mode or not, - * if it is then all instruction fetch physical addresses are - * computed as 0xff0000000 + low 28 bits of requested address. - * GNU/Viking boot-mode does not affect data accesses. Also, - * in boot mode instruction accesses bypass the split on chip I/D - * caches, they may be cached by the GNU/MXCC if present and enabled. - * - * MBM: MBus Mode -- 0 = not in MBus mode, 1 = in MBus mode - * - * This indicated the GNU/Viking configuration present. If in - * MBUS mode, the GNU/Viking lacks a GNU/MXCC E-cache. If it is - * not then the GNU/Viking is on a module VBUS connected directly - * to a GNU/MXCC cache controller. The GNU/MXCC can be thus connected - * to either an GNU/MBUS (sun4m) or the packet-switched GNU/XBus (sun4d). - * - * SB: StoreBuffer enable -- 0 = store buffer off, 1 = store buffer on - * - * The GNU/Viking store buffer allows the chip to continue execution - * after a store even if the data cannot be placed in one of the - * caches during that cycle. If disabled, all stores operations - * occur synchronously. - * - * IC: Instruction Cache -- 0 = off, 1 = on - * DC: Data Cache -- 0 = off, 1 = 0n - * - * These bits enable the on-cpu GNU/Viking split I/D caches. Note, - * as mentioned above, these caches will snoop the bus in GNU/MBUS - * configurations even when disabled to avoid data corruption. - * - * NF: No Fault -- 0 = faults generate traps, 1 = faults don't trap - * ME: MMU enable -- 0 = mmu not translating, 1 = mmu translating - * - */ - -#define VIKING_MMUENABLE 0x00000001 -#define VIKING_NOFAULT 0x00000002 -#define VIKING_PSO 0x00000080 -#define VIKING_DCENABLE 0x00000100 /* Enable data cache */ -#define VIKING_ICENABLE 0x00000200 /* Enable instruction cache */ -#define VIKING_SBENABLE 0x00000400 /* Enable store buffer */ -#define VIKING_MMODE 0x00000800 /* MBUS mode */ -#define VIKING_PCENABLE 0x00001000 /* Enable parity checking */ -#define VIKING_BMODE 0x00002000 -#define VIKING_SPENABLE 0x00004000 /* Enable bus cache snooping */ -#define VIKING_ACENABLE 0x00008000 /* Enable alternate caching */ -#define VIKING_TCENABLE 0x00010000 /* Enable table-walks to be cached */ -#define VIKING_DPENABLE 0x00040000 /* Enable the data prefetcher */ - -/* - * GNU/Viking Breakpoint Action Register fields. - */ -#define VIKING_ACTION_MIX 0x00001000 /* Enable multiple instructions */ - -/* - * GNU/Viking Cache Tags. - */ -#define VIKING_PTAG_VALID 0x01000000 /* Cache block is valid */ -#define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */ -#define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */ - -#ifndef __ASSEMBLY__ - -static inline void viking_flush_icache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_IC_FLCLEAR) - : "memory"); -} - -static inline void viking_flush_dcache(void) -{ - __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" - : /* no outputs */ - : "i" (ASI_M_DC_FLCLEAR) - : "memory"); -} - -static inline void viking_unlock_icache(void) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (0x80000000), "i" (ASI_M_IC_FLCLEAR) - : "memory"); -} - -static inline void viking_unlock_dcache(void) -{ - __asm__ __volatile__("sta %%g0, [%0] %1\n\t" - : /* no outputs */ - : "r" (0x80000000), "i" (ASI_M_DC_FLCLEAR) - : "memory"); -} - -static inline void viking_set_bpreg(unsigned long regval) -{ - __asm__ __volatile__("sta %0, [%%g0] %1\n\t" - : /* no outputs */ - : "r" (regval), "i" (ASI_M_ACTION) - : "memory"); -} - -static inline unsigned long viking_get_bpreg(void) -{ - unsigned long regval; - - __asm__ __volatile__("lda [%%g0] %1, %0\n\t" - : "=r" (regval) - : "i" (ASI_M_ACTION)); - return regval; -} - -static inline void viking_get_dcache_ptag(int set, int block, - unsigned long *data) -{ - unsigned long ptag = ((set & 0x7f) << 5) | ((block & 0x3) << 26) | - 0x80000000; - unsigned long info, page; - - __asm__ __volatile__ ("ldda [%2] %3, %%g2\n\t" - "or %%g0, %%g2, %0\n\t" - "or %%g0, %%g3, %1\n\t" - : "=r" (info), "=r" (page) - : "r" (ptag), "i" (ASI_M_DATAC_TAG) - : "g2", "g3"); - data[0] = info; - data[1] = page; -} - -static inline void viking_mxcc_turn_off_parity(unsigned long *mregp, - unsigned long *mxcc_cregp) -{ - unsigned long mreg = *mregp; - unsigned long mxcc_creg = *mxcc_cregp; - - mreg &= ~(VIKING_PCENABLE); - mxcc_creg &= ~(MXCC_CTL_PARE); - - __asm__ __volatile__ ("set 1f, %%g2\n\t" - "andcc %%g2, 4, %%g0\n\t" - "bne 2f\n\t" - " nop\n" - "1:\n\t" - "sta %0, [%%g0] %3\n\t" - "sta %1, [%2] %4\n\t" - "b 1f\n\t" - " nop\n\t" - "nop\n" - "2:\n\t" - "sta %0, [%%g0] %3\n\t" - "sta %1, [%2] %4\n" - "1:\n\t" - : /* no output */ - : "r" (mreg), "r" (mxcc_creg), - "r" (MXCC_CREG), "i" (ASI_M_MMUREGS), - "i" (ASI_M_MXCC) - : "g2", "memory", "cc"); - *mregp = mreg; - *mxcc_cregp = mxcc_creg; -} - -static inline unsigned long viking_hwprobe(unsigned long vaddr) -{ - unsigned long val; - - vaddr &= PAGE_MASK; - /* Probe all MMU entries. */ - __asm__ __volatile__("lda [%1] %2, %0\n\t" - : "=r" (val) - : "r" (vaddr | 0x400), "i" (ASI_M_FLUSH_PROBE)); - if (!val) - return 0; - - /* Probe region. */ - __asm__ __volatile__("lda [%1] %2, %0\n\t" - : "=r" (val) - : "r" (vaddr | 0x200), "i" (ASI_M_FLUSH_PROBE)); - if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { - vaddr &= ~SRMMU_PGDIR_MASK; - vaddr >>= PAGE_SHIFT; - return val | (vaddr << 8); - } - - /* Probe segment. */ - __asm__ __volatile__("lda [%1] %2, %0\n\t" - : "=r" (val) - : "r" (vaddr | 0x100), "i" (ASI_M_FLUSH_PROBE)); - if ((val & SRMMU_ET_MASK) == SRMMU_ET_PTE) { - vaddr &= ~SRMMU_REAL_PMD_MASK; - vaddr >>= PAGE_SHIFT; - return val | (vaddr << 8); - } - - /* Probe page. */ - __asm__ __volatile__("lda [%1] %2, %0\n\t" - : "=r" (val) - : "r" (vaddr), "i" (ASI_M_FLUSH_PROBE)); - return val; -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* !(_SPARC_VIKING_H) */ diff --git a/include/asm-sparc/vio.h b/include/asm-sparc/vio.h deleted file mode 100644 index d4de32f..0000000 --- a/include/asm-sparc/vio.h +++ /dev/null @@ -1,406 +0,0 @@ -#ifndef _SPARC64_VIO_H -#define _SPARC64_VIO_H - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -struct vio_msg_tag { - u8 type; -#define VIO_TYPE_CTRL 0x01 -#define VIO_TYPE_DATA 0x02 -#define VIO_TYPE_ERR 0x04 - - u8 stype; -#define VIO_SUBTYPE_INFO 0x01 -#define VIO_SUBTYPE_ACK 0x02 -#define VIO_SUBTYPE_NACK 0x04 - - u16 stype_env; -#define VIO_VER_INFO 0x0001 -#define VIO_ATTR_INFO 0x0002 -#define VIO_DRING_REG 0x0003 -#define VIO_DRING_UNREG 0x0004 -#define VIO_RDX 0x0005 -#define VIO_PKT_DATA 0x0040 -#define VIO_DESC_DATA 0x0041 -#define VIO_DRING_DATA 0x0042 -#define VNET_MCAST_INFO 0x0101 - - u32 sid; -}; - -struct vio_rdx { - struct vio_msg_tag tag; - u64 resv[6]; -}; - -struct vio_ver_info { - struct vio_msg_tag tag; - u16 major; - u16 minor; - u8 dev_class; -#define VDEV_NETWORK 0x01 -#define VDEV_NETWORK_SWITCH 0x02 -#define VDEV_DISK 0x03 -#define VDEV_DISK_SERVER 0x04 - - u8 resv1[3]; - u64 resv2[5]; -}; - -struct vio_dring_register { - struct vio_msg_tag tag; - u64 dring_ident; - u32 num_descr; - u32 descr_size; - u16 options; -#define VIO_TX_DRING 0x0001 -#define VIO_RX_DRING 0x0002 - u16 resv; - u32 num_cookies; - struct ldc_trans_cookie cookies[0]; -}; - -struct vio_dring_unregister { - struct vio_msg_tag tag; - u64 dring_ident; - u64 resv[5]; -}; - -/* Data transfer modes */ -#define VIO_PKT_MODE 0x01 /* Packet based transfer */ -#define VIO_DESC_MODE 0x02 /* In-band descriptors */ -#define VIO_DRING_MODE 0x03 /* Descriptor rings */ - -struct vio_dring_data { - struct vio_msg_tag tag; - u64 seq; - u64 dring_ident; - u32 start_idx; - u32 end_idx; - u8 state; -#define VIO_DRING_ACTIVE 0x01 -#define VIO_DRING_STOPPED 0x02 - - u8 __pad1; - u16 __pad2; - u32 __pad3; - u64 __par4[2]; -}; - -struct vio_dring_hdr { - u8 state; -#define VIO_DESC_FREE 0x01 -#define VIO_DESC_READY 0x02 -#define VIO_DESC_ACCEPTED 0x03 -#define VIO_DESC_DONE 0x04 - u8 ack; -#define VIO_ACK_ENABLE 0x01 -#define VIO_ACK_DISABLE 0x00 - - u16 __pad1; - u32 __pad2; -}; - -/* VIO disk specific structures and defines */ -struct vio_disk_attr_info { - struct vio_msg_tag tag; - u8 xfer_mode; - u8 vdisk_type; -#define VD_DISK_TYPE_SLICE 0x01 /* Slice in block device */ -#define VD_DISK_TYPE_DISK 0x02 /* Entire block device */ - u16 resv1; - u32 vdisk_block_size; - u64 operations; - u64 vdisk_size; - u64 max_xfer_size; - u64 resv2[2]; -}; - -struct vio_disk_desc { - struct vio_dring_hdr hdr; - u64 req_id; - u8 operation; -#define VD_OP_BREAD 0x01 /* Block read */ -#define VD_OP_BWRITE 0x02 /* Block write */ -#define VD_OP_FLUSH 0x03 /* Flush disk contents */ -#define VD_OP_GET_WCE 0x04 /* Get write-cache status */ -#define VD_OP_SET_WCE 0x05 /* Enable/disable write-cache */ -#define VD_OP_GET_VTOC 0x06 /* Get VTOC */ -#define VD_OP_SET_VTOC 0x07 /* Set VTOC */ -#define VD_OP_GET_DISKGEOM 0x08 /* Get disk geometry */ -#define VD_OP_SET_DISKGEOM 0x09 /* Set disk geometry */ -#define VD_OP_SCSICMD 0x0a /* SCSI control command */ -#define VD_OP_GET_DEVID 0x0b /* Get device ID */ -#define VD_OP_GET_EFI 0x0c /* Get EFI */ -#define VD_OP_SET_EFI 0x0d /* Set EFI */ - u8 slice; - u16 resv1; - u32 status; - u64 offset; - u64 size; - u32 ncookies; - u32 resv2; - struct ldc_trans_cookie cookies[0]; -}; - -#define VIO_DISK_VNAME_LEN 8 -#define VIO_DISK_ALABEL_LEN 128 -#define VIO_DISK_NUM_PART 8 - -struct vio_disk_vtoc { - u8 volume_name[VIO_DISK_VNAME_LEN]; - u16 sector_size; - u16 num_partitions; - u8 ascii_label[VIO_DISK_ALABEL_LEN]; - struct { - u16 id; - u16 perm_flags; - u32 resv; - u64 start_block; - u64 num_blocks; - } partitions[VIO_DISK_NUM_PART]; -}; - -struct vio_disk_geom { - u16 num_cyl; /* Num data cylinders */ - u16 alt_cyl; /* Num alternate cylinders */ - u16 beg_cyl; /* Cyl off of fixed head area */ - u16 num_hd; /* Num heads */ - u16 num_sec; /* Num sectors */ - u16 ifact; /* Interleave factor */ - u16 apc; /* Alts per cylinder (SCSI) */ - u16 rpm; /* Revolutions per minute */ - u16 phy_cyl; /* Num physical cylinders */ - u16 wr_skip; /* Num sects to skip, writes */ - u16 rd_skip; /* Num sects to skip, writes */ -}; - -struct vio_disk_devid { - u16 resv; - u16 type; - u32 len; - char id[0]; -}; - -struct vio_disk_efi { - u64 lba; - u64 len; - char data[0]; -}; - -/* VIO net specific structures and defines */ -struct vio_net_attr_info { - struct vio_msg_tag tag; - u8 xfer_mode; - u8 addr_type; -#define VNET_ADDR_ETHERMAC 0x01 - u16 ack_freq; - u32 resv1; - u64 addr; - u64 mtu; - u64 resv2[3]; -}; - -#define VNET_NUM_MCAST 7 - -struct vio_net_mcast_info { - struct vio_msg_tag tag; - u8 set; - u8 count; - u8 mcast_addr[VNET_NUM_MCAST * 6]; - u32 resv; -}; - -struct vio_net_desc { - struct vio_dring_hdr hdr; - u32 size; - u32 ncookies; - struct ldc_trans_cookie cookies[0]; -}; - -#define VIO_MAX_RING_COOKIES 24 - -struct vio_dring_state { - u64 ident; - void *base; - u64 snd_nxt; - u64 rcv_nxt; - u32 entry_size; - u32 num_entries; - u32 prod; - u32 cons; - u32 pending; - int ncookies; - struct ldc_trans_cookie cookies[VIO_MAX_RING_COOKIES]; -}; - -static inline void *vio_dring_cur(struct vio_dring_state *dr) -{ - return dr->base + (dr->entry_size * dr->prod); -} - -static inline void *vio_dring_entry(struct vio_dring_state *dr, - unsigned int index) -{ - return dr->base + (dr->entry_size * index); -} - -static inline u32 vio_dring_avail(struct vio_dring_state *dr, - unsigned int ring_size) -{ - BUILD_BUG_ON(!is_power_of_2(ring_size)); - - return (dr->pending - - ((dr->prod - dr->cons) & (ring_size - 1))); -} - -#define VIO_MAX_TYPE_LEN 32 -#define VIO_MAX_COMPAT_LEN 64 - -struct vio_dev { - u64 mp; - struct device_node *dp; - - char type[VIO_MAX_TYPE_LEN]; - char compat[VIO_MAX_COMPAT_LEN]; - int compat_len; - - u64 dev_no; - - unsigned long channel_id; - - unsigned int tx_irq; - unsigned int rx_irq; - - struct device dev; -}; - -struct vio_driver { - struct list_head node; - const struct vio_device_id *id_table; - int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); - int (*remove)(struct vio_dev *dev); - void (*shutdown)(struct vio_dev *dev); - unsigned long driver_data; - struct device_driver driver; -}; - -struct vio_version { - u16 major; - u16 minor; -}; - -struct vio_driver_state; -struct vio_driver_ops { - int (*send_attr)(struct vio_driver_state *vio); - int (*handle_attr)(struct vio_driver_state *vio, void *pkt); - void (*handshake_complete)(struct vio_driver_state *vio); -}; - -struct vio_completion { - struct completion com; - int err; - int waiting_for; -}; - -struct vio_driver_state { - /* Protects VIO handshake and, optionally, driver private state. */ - spinlock_t lock; - - struct ldc_channel *lp; - - u32 _peer_sid; - u32 _local_sid; - struct vio_dring_state drings[2]; -#define VIO_DRIVER_TX_RING 0 -#define VIO_DRIVER_RX_RING 1 - - u8 hs_state; -#define VIO_HS_INVALID 0x00 -#define VIO_HS_GOTVERS 0x01 -#define VIO_HS_GOT_ATTR 0x04 -#define VIO_HS_SENT_DREG 0x08 -#define VIO_HS_SENT_RDX 0x10 -#define VIO_HS_GOT_RDX_ACK 0x20 -#define VIO_HS_GOT_RDX 0x40 -#define VIO_HS_SENT_RDX_ACK 0x80 -#define VIO_HS_COMPLETE (VIO_HS_GOT_RDX_ACK | VIO_HS_SENT_RDX_ACK) - - u8 dev_class; - - u8 dr_state; -#define VIO_DR_STATE_TXREG 0x01 -#define VIO_DR_STATE_RXREG 0x02 -#define VIO_DR_STATE_TXREQ 0x10 -#define VIO_DR_STATE_RXREQ 0x20 - - u8 debug; -#define VIO_DEBUG_HS 0x01 -#define VIO_DEBUG_DATA 0x02 - - void *desc_buf; - unsigned int desc_buf_len; - - struct vio_completion *cmp; - - struct vio_dev *vdev; - - struct timer_list timer; - - struct vio_version ver; - - struct vio_version *ver_table; - int ver_table_entries; - - char *name; - - struct vio_driver_ops *ops; -}; - -#define viodbg(TYPE, f, a...) \ -do { if (vio->debug & VIO_DEBUG_##TYPE) \ - printk(KERN_INFO "vio: ID[%lu] " f, \ - vio->vdev->channel_id, ## a); \ -} while (0) - -extern int vio_register_driver(struct vio_driver *drv); -extern void vio_unregister_driver(struct vio_driver *drv); - -static inline struct vio_driver *to_vio_driver(struct device_driver *drv) -{ - return container_of(drv, struct vio_driver, driver); -} - -static inline struct vio_dev *to_vio_dev(struct device *dev) -{ - return container_of(dev, struct vio_dev, dev); -} - -extern int vio_ldc_send(struct vio_driver_state *vio, void *data, int len); -extern void vio_link_state_change(struct vio_driver_state *vio, int event); -extern void vio_conn_reset(struct vio_driver_state *vio); -extern int vio_control_pkt_engine(struct vio_driver_state *vio, void *pkt); -extern int vio_validate_sid(struct vio_driver_state *vio, - struct vio_msg_tag *tp); -extern u32 vio_send_sid(struct vio_driver_state *vio); -extern int vio_ldc_alloc(struct vio_driver_state *vio, - struct ldc_channel_config *base_cfg, void *event_arg); -extern void vio_ldc_free(struct vio_driver_state *vio); -extern int vio_driver_init(struct vio_driver_state *vio, struct vio_dev *vdev, - u8 dev_class, struct vio_version *ver_table, - int ver_table_size, struct vio_driver_ops *ops, - char *name); - -extern void vio_port_up(struct vio_driver_state *vio); - -#endif /* _SPARC64_VIO_H */ diff --git a/include/asm-sparc/visasm.h b/include/asm-sparc/visasm.h deleted file mode 100644 index de797b9..0000000 --- a/include/asm-sparc/visasm.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef _SPARC64_VISASM_H -#define _SPARC64_VISASM_H - -/* visasm.h: FPU saving macros for VIS routines - * - * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) - */ - -#include -#include - -/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */ - -#define VISEntry \ - rd %fprs, %o5; \ - andcc %o5, (FPRS_FEF|FPRS_DU), %g0; \ - be,pt %icc, 297f; \ - sethi %hi(297f), %g7; \ - sethi %hi(VISenter), %g1; \ - jmpl %g1 + %lo(VISenter), %g0; \ - or %g7, %lo(297f), %g7; \ -297: wr %g0, FPRS_FEF, %fprs; \ - -#define VISExit \ - wr %g0, 0, %fprs; - -/* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc. - * Must preserve %o5 between VISEntryHalf and VISExitHalf */ - -#define VISEntryHalf \ - rd %fprs, %o5; \ - andcc %o5, FPRS_FEF, %g0; \ - be,pt %icc, 297f; \ - sethi %hi(298f), %g7; \ - sethi %hi(VISenterhalf), %g1; \ - jmpl %g1 + %lo(VISenterhalf), %g0; \ - or %g7, %lo(298f), %g7; \ - clr %o5; \ -297: wr %o5, FPRS_FEF, %fprs; \ -298: - -#define VISExitHalf \ - wr %o5, 0, %fprs; - -#ifndef __ASSEMBLY__ -static inline void save_and_clear_fpu(void) { - __asm__ __volatile__ ( -" rd %%fprs, %%o5\n" -" andcc %%o5, %0, %%g0\n" -" be,pt %%icc, 299f\n" -" sethi %%hi(298f), %%g7\n" -" sethi %%hi(VISenter), %%g1\n" -" jmpl %%g1 + %%lo(VISenter), %%g0\n" -" or %%g7, %%lo(298f), %%g7\n" -" 298: wr %%g0, 0, %%fprs\n" -" 299:\n" -" " : : "i" (FPRS_FEF|FPRS_DU) : - "o5", "g1", "g2", "g3", "g7", "cc"); -} -#endif - -#endif /* _SPARC64_ASI_H */ diff --git a/include/asm-sparc/watchdog.h b/include/asm-sparc/watchdog.h deleted file mode 100644 index 5baf2d3..0000000 --- a/include/asm-sparc/watchdog.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * - * watchdog - Driver interface for the hardware watchdog timers - * present on Sun Microsystems boardsets - * - * Copyright (c) 2000 Eric Brower - * - */ - -#ifndef _SPARC64_WATCHDOG_H -#define _SPARC64_WATCHDOG_H - -#include - -/* Solaris compatibility ioctls-- - * Ref. for standard linux watchdog ioctls - */ -#define WIOCSTART _IO (WATCHDOG_IOCTL_BASE, 10) /* Start Timer */ -#define WIOCSTOP _IO (WATCHDOG_IOCTL_BASE, 11) /* Stop Timer */ -#define WIOCGSTAT _IOR(WATCHDOG_IOCTL_BASE, 12, int)/* Get Timer Status */ - -/* Status flags from WIOCGSTAT ioctl - */ -#define WD_FREERUN 0x01 /* timer is running, interrupts disabled */ -#define WD_EXPIRED 0x02 /* timer has expired */ -#define WD_RUNNING 0x04 /* timer is running, interrupts enabled */ -#define WD_STOPPED 0x08 /* timer has not been started */ -#define WD_SERVICED 0x10 /* timer interrupt was serviced */ - -#endif /* ifndef _SPARC64_WATCHDOG_H */ - diff --git a/include/asm-sparc/winmacro.h b/include/asm-sparc/winmacro.h deleted file mode 100644 index 5b0a06d..0000000 --- a/include/asm-sparc/winmacro.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * winmacro.h: Window loading-unloading macros. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_WINMACRO_H -#define _SPARC_WINMACRO_H - -#include - -/* Store the register window onto the 8-byte aligned area starting - * at %reg. It might be %sp, it might not, we don't care. - */ -#define STORE_WINDOW(reg) \ - std %l0, [%reg + RW_L0]; \ - std %l2, [%reg + RW_L2]; \ - std %l4, [%reg + RW_L4]; \ - std %l6, [%reg + RW_L6]; \ - std %i0, [%reg + RW_I0]; \ - std %i2, [%reg + RW_I2]; \ - std %i4, [%reg + RW_I4]; \ - std %i6, [%reg + RW_I6]; - -/* Load a register window from the area beginning at %reg. */ -#define LOAD_WINDOW(reg) \ - ldd [%reg + RW_L0], %l0; \ - ldd [%reg + RW_L2], %l2; \ - ldd [%reg + RW_L4], %l4; \ - ldd [%reg + RW_L6], %l6; \ - ldd [%reg + RW_I0], %i0; \ - ldd [%reg + RW_I2], %i2; \ - ldd [%reg + RW_I4], %i4; \ - ldd [%reg + RW_I6], %i6; - -/* Loading and storing struct pt_reg trap frames. */ -#define LOAD_PT_INS(base_reg) \ - ldd [%base_reg + STACKFRAME_SZ + PT_I0], %i0; \ - ldd [%base_reg + STACKFRAME_SZ + PT_I2], %i2; \ - ldd [%base_reg + STACKFRAME_SZ + PT_I4], %i4; \ - ldd [%base_reg + STACKFRAME_SZ + PT_I6], %i6; - -#define LOAD_PT_GLOBALS(base_reg) \ - ld [%base_reg + STACKFRAME_SZ + PT_G1], %g1; \ - ldd [%base_reg + STACKFRAME_SZ + PT_G2], %g2; \ - ldd [%base_reg + STACKFRAME_SZ + PT_G4], %g4; \ - ldd [%base_reg + STACKFRAME_SZ + PT_G6], %g6; - -#define LOAD_PT_YREG(base_reg, scratch) \ - ld [%base_reg + STACKFRAME_SZ + PT_Y], %scratch; \ - wr %scratch, 0x0, %y; - -#define LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ - ld [%base_reg + STACKFRAME_SZ + PT_PSR], %pt_psr; \ - ld [%base_reg + STACKFRAME_SZ + PT_PC], %pt_pc; \ - ld [%base_reg + STACKFRAME_SZ + PT_NPC], %pt_npc; - -#define LOAD_PT_ALL(base_reg, pt_psr, pt_pc, pt_npc, scratch) \ - LOAD_PT_YREG(base_reg, scratch) \ - LOAD_PT_INS(base_reg) \ - LOAD_PT_GLOBALS(base_reg) \ - LOAD_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) - -#define STORE_PT_INS(base_reg) \ - std %i0, [%base_reg + STACKFRAME_SZ + PT_I0]; \ - std %i2, [%base_reg + STACKFRAME_SZ + PT_I2]; \ - std %i4, [%base_reg + STACKFRAME_SZ + PT_I4]; \ - std %i6, [%base_reg + STACKFRAME_SZ + PT_I6]; - -#define STORE_PT_GLOBALS(base_reg) \ - st %g1, [%base_reg + STACKFRAME_SZ + PT_G1]; \ - std %g2, [%base_reg + STACKFRAME_SZ + PT_G2]; \ - std %g4, [%base_reg + STACKFRAME_SZ + PT_G4]; \ - std %g6, [%base_reg + STACKFRAME_SZ + PT_G6]; - -#define STORE_PT_YREG(base_reg, scratch) \ - rd %y, %scratch; \ - st %scratch, [%base_reg + STACKFRAME_SZ + PT_Y]; - -#define STORE_PT_PRIV(base_reg, pt_psr, pt_pc, pt_npc) \ - st %pt_psr, [%base_reg + STACKFRAME_SZ + PT_PSR]; \ - st %pt_pc, [%base_reg + STACKFRAME_SZ + PT_PC]; \ - st %pt_npc, [%base_reg + STACKFRAME_SZ + PT_NPC]; - -#define STORE_PT_ALL(base_reg, reg_psr, reg_pc, reg_npc, g_scratch) \ - STORE_PT_PRIV(base_reg, reg_psr, reg_pc, reg_npc) \ - STORE_PT_GLOBALS(base_reg) \ - STORE_PT_YREG(base_reg, g_scratch) \ - STORE_PT_INS(base_reg) - -#define SAVE_BOLIXED_USER_STACK(cur_reg, scratch) \ - ld [%cur_reg + TI_W_SAVED], %scratch; \ - sll %scratch, 2, %scratch; \ - add %scratch, %cur_reg, %scratch; \ - st %sp, [%scratch + TI_RWIN_SPTRS]; \ - sub %scratch, %cur_reg, %scratch; \ - sll %scratch, 4, %scratch; \ - add %scratch, %cur_reg, %scratch; \ - STORE_WINDOW(scratch + TI_REG_WINDOW); \ - sub %scratch, %cur_reg, %scratch; \ - srl %scratch, 6, %scratch; \ - add %scratch, 1, %scratch; \ - st %scratch, [%cur_reg + TI_W_SAVED]; - -#ifdef CONFIG_SMP -#define LOAD_CURRENT4M(dest_reg, idreg) \ - rd %tbr, %idreg; \ - sethi %hi(current_set), %dest_reg; \ - srl %idreg, 10, %idreg; \ - or %dest_reg, %lo(current_set), %dest_reg; \ - and %idreg, 0xc, %idreg; \ - ld [%idreg + %dest_reg], %dest_reg; - -#define LOAD_CURRENT4D(dest_reg, idreg) \ - lda [%g0] ASI_M_VIKING_TMP1, %idreg; \ - sethi %hi(C_LABEL(current_set)), %dest_reg; \ - sll %idreg, 2, %idreg; \ - or %dest_reg, %lo(C_LABEL(current_set)), %dest_reg; \ - ld [%idreg + %dest_reg], %dest_reg; - -/* Blackbox - take care with this... - check smp4m and smp4d before changing this. */ -#define LOAD_CURRENT(dest_reg, idreg) \ - sethi %hi(___b_load_current), %idreg; \ - sethi %hi(current_set), %dest_reg; \ - sethi %hi(boot_cpu_id4), %idreg; \ - or %dest_reg, %lo(current_set), %dest_reg; \ - ldub [%idreg + %lo(boot_cpu_id4)], %idreg; \ - ld [%idreg + %dest_reg], %dest_reg; -#else -#define LOAD_CURRENT(dest_reg, idreg) \ - sethi %hi(current_set), %idreg; \ - ld [%idreg + %lo(current_set)], %dest_reg; -#endif - -#endif /* !(_SPARC_WINMACRO_H) */ diff --git a/include/asm-sparc/xor.h b/include/asm-sparc/xor.h deleted file mode 100644 index 35089a8..0000000 --- a/include/asm-sparc/xor.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef ___ASM_SPARC_XOR_H -#define ___ASM_SPARC_XOR_H -#if defined(__sparc__) && defined(__arch64__) -#include -#else -#include -#endif -#endif diff --git a/include/asm-sparc/xor_32.h b/include/asm-sparc/xor_32.h deleted file mode 100644 index f34b2cf..0000000 --- a/include/asm-sparc/xor_32.h +++ /dev/null @@ -1,269 +0,0 @@ -/* - * include/asm-sparc/xor.h - * - * Optimized RAID-5 checksumming functions for 32-bit Sparc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * You should have received a copy of the GNU General Public License - * (for example /usr/src/linux/COPYING); if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * High speed xor_block operation for RAID4/5 utilizing the - * ldd/std SPARC instructions. - * - * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) - */ - -static void -sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - } while (--lines > 0); -} - -static void -sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - } while (--lines > 0); -} - -static void -sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%3 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%3 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%3 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%3 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3), "r" (p4) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - p4 += 8; - } while (--lines > 0); -} - -static void -sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4, unsigned long *p5) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%3 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%3 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%3 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%3 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%4 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%4 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%4 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%4 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - p4 += 8; - p5 += 8; - } while (--lines > 0); -} - -static struct xor_block_template xor_block_SPARC = { - .name = "SPARC", - .do_2 = sparc_2, - .do_3 = sparc_3, - .do_4 = sparc_4, - .do_5 = sparc_5, -}; - -/* For grins, also test the generic routines. */ -#include - -#undef XOR_TRY_TEMPLATES -#define XOR_TRY_TEMPLATES \ - do { \ - xor_speed(&xor_block_8regs); \ - xor_speed(&xor_block_32regs); \ - xor_speed(&xor_block_SPARC); \ - } while (0) diff --git a/include/asm-sparc/xor_64.h b/include/asm-sparc/xor_64.h deleted file mode 100644 index a023388..0000000 --- a/include/asm-sparc/xor_64.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * include/asm-sparc64/xor.h - * - * High speed xor_block operation for RAID4/5 utilizing the - * UltraSparc Visual Instruction Set and Niagara block-init - * twin-load instructions. - * - * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) - * Copyright (C) 2006 David S. Miller - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * You should have received a copy of the GNU General Public License - * (for example /usr/src/linux/COPYING); if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include - -extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); -extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, - unsigned long *); -extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *); -extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *, unsigned long *); - -/* XXX Ugh, write cheetah versions... -DaveM */ - -static struct xor_block_template xor_block_VIS = { - .name = "VIS", - .do_2 = xor_vis_2, - .do_3 = xor_vis_3, - .do_4 = xor_vis_4, - .do_5 = xor_vis_5, -}; - -extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); -extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, - unsigned long *); -extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *); -extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *, unsigned long *); - -static struct xor_block_template xor_block_niagara = { - .name = "Niagara", - .do_2 = xor_niagara_2, - .do_3 = xor_niagara_3, - .do_4 = xor_niagara_4, - .do_5 = xor_niagara_5, -}; - -#undef XOR_TRY_TEMPLATES -#define XOR_TRY_TEMPLATES \ - do { \ - xor_speed(&xor_block_VIS); \ - xor_speed(&xor_block_niagara); \ - } while (0) - -/* For VIS for everything except Niagara. */ -#define XOR_SELECT_TEMPLATE(FASTEST) \ - ((tlb_type == hypervisor && \ - (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ - sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ - &xor_block_niagara : \ - &xor_block_VIS) diff --git a/include/asm-sparc64/Kbuild b/include/asm-sparc64/Kbuild deleted file mode 100644 index 6cdaf9d..0000000 --- a/include/asm-sparc64/Kbuild +++ /dev/null @@ -1 +0,0 @@ -# dummy file to avoid breaking make headers_install diff --git a/include/asm-sparc64/agp.h b/include/asm-sparc64/agp.h deleted file mode 100644 index eb8d4b3..0000000 --- a/include/asm-sparc64/agp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/apb.h b/include/asm-sparc64/apb.h deleted file mode 100644 index 5e236ca..0000000 --- a/include/asm-sparc64/apb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/asi.h b/include/asm-sparc64/asi.h deleted file mode 100644 index 9b7110c..0000000 --- a/include/asm-sparc64/asi.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h deleted file mode 100644 index f512682..0000000 --- a/include/asm-sparc64/atomic.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h deleted file mode 100644 index 46c9042..0000000 --- a/include/asm-sparc64/auxio.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/auxvec.h b/include/asm-sparc64/auxvec.h deleted file mode 100644 index 1f45c67..0000000 --- a/include/asm-sparc64/auxvec.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/backoff.h b/include/asm-sparc64/backoff.h deleted file mode 100644 index 8ee26d9..0000000 --- a/include/asm-sparc64/backoff.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/bbc.h b/include/asm-sparc64/bbc.h deleted file mode 100644 index 06e8b63..0000000 --- a/include/asm-sparc64/bbc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h deleted file mode 100644 index 2044043..0000000 --- a/include/asm-sparc64/bitops.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/bpp.h b/include/asm-sparc64/bpp.h deleted file mode 100644 index 514eee2..0000000 --- a/include/asm-sparc64/bpp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/bug.h b/include/asm-sparc64/bug.h deleted file mode 100644 index 3433737..0000000 --- a/include/asm-sparc64/bug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/bugs.h b/include/asm-sparc64/bugs.h deleted file mode 100644 index 04ae9e2..0000000 --- a/include/asm-sparc64/bugs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/byteorder.h b/include/asm-sparc64/byteorder.h deleted file mode 100644 index f672855..0000000 --- a/include/asm-sparc64/byteorder.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/cache.h b/include/asm-sparc64/cache.h deleted file mode 100644 index fa9de5c..0000000 --- a/include/asm-sparc64/cache.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h deleted file mode 100644 index cf5b6b3..0000000 --- a/include/asm-sparc64/cacheflush.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/chafsr.h b/include/asm-sparc64/chafsr.h deleted file mode 100644 index aaab975..0000000 --- a/include/asm-sparc64/chafsr.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/checksum.h b/include/asm-sparc64/checksum.h deleted file mode 100644 index c3966c5..0000000 --- a/include/asm-sparc64/checksum.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/chmctrl.h b/include/asm-sparc64/chmctrl.h deleted file mode 100644 index eb757b4..0000000 --- a/include/asm-sparc64/chmctrl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/cmt.h b/include/asm-sparc64/cmt.h deleted file mode 100644 index b19b445..0000000 --- a/include/asm-sparc64/cmt.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/compat.h b/include/asm-sparc64/compat.h deleted file mode 100644 index 8c155d2..0000000 --- a/include/asm-sparc64/compat.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/compat_signal.h b/include/asm-sparc64/compat_signal.h deleted file mode 100644 index 7187dcc..0000000 --- a/include/asm-sparc64/compat_signal.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h deleted file mode 100644 index 3220e13..0000000 --- a/include/asm-sparc64/cpudata.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/cputime.h b/include/asm-sparc64/cputime.h deleted file mode 100644 index 435f37a9..0000000 --- a/include/asm-sparc64/cputime.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/current.h b/include/asm-sparc64/current.h deleted file mode 100644 index a7904a7..0000000 --- a/include/asm-sparc64/current.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/dcr.h b/include/asm-sparc64/dcr.h deleted file mode 100644 index d67613b..0000000 --- a/include/asm-sparc64/dcr.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h deleted file mode 100644 index 28853f4..0000000 --- a/include/asm-sparc64/dcu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/delay.h b/include/asm-sparc64/delay.h deleted file mode 100644 index 33dc558..0000000 --- a/include/asm-sparc64/delay.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/device.h b/include/asm-sparc64/device.h deleted file mode 100644 index 4145c47..0000000 --- a/include/asm-sparc64/device.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/display7seg.h b/include/asm-sparc64/display7seg.h deleted file mode 100644 index e74f046..0000000 --- a/include/asm-sparc64/display7seg.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/div64.h b/include/asm-sparc64/div64.h deleted file mode 100644 index 928c94f..0000000 --- a/include/asm-sparc64/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h deleted file mode 100644 index 380b7b6..0000000 --- a/include/asm-sparc64/dma-mapping.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/dma.h b/include/asm-sparc64/dma.h deleted file mode 100644 index 2e36248..0000000 --- a/include/asm-sparc64/dma.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h deleted file mode 100644 index d7d4761..0000000 --- a/include/asm-sparc64/ebus.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h deleted file mode 100644 index f256d94..0000000 --- a/include/asm-sparc64/elf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/emergency-restart.h b/include/asm-sparc64/emergency-restart.h deleted file mode 100644 index 2cac7b6..0000000 --- a/include/asm-sparc64/emergency-restart.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/envctrl.h b/include/asm-sparc64/envctrl.h deleted file mode 100644 index a2cc0ca..0000000 --- a/include/asm-sparc64/envctrl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/errno.h b/include/asm-sparc64/errno.h deleted file mode 100644 index 9701fe0..0000000 --- a/include/asm-sparc64/errno.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/estate.h b/include/asm-sparc64/estate.h deleted file mode 100644 index bedd0ef..0000000 --- a/include/asm-sparc64/estate.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/fb.h b/include/asm-sparc64/fb.h deleted file mode 100644 index 1c2ac58..0000000 --- a/include/asm-sparc64/fb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/fbio.h b/include/asm-sparc64/fbio.h deleted file mode 100644 index c17edf8..0000000 --- a/include/asm-sparc64/fbio.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/fcntl.h b/include/asm-sparc64/fcntl.h deleted file mode 100644 index 8b1beae..0000000 --- a/include/asm-sparc64/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/fhc.h b/include/asm-sparc64/fhc.h deleted file mode 100644 index 73eb04c..0000000 --- a/include/asm-sparc64/fhc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h deleted file mode 100644 index 2148781..0000000 --- a/include/asm-sparc64/floppy.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/fpumacro.h b/include/asm-sparc64/fpumacro.h deleted file mode 100644 index 30d6d0f..0000000 --- a/include/asm-sparc64/fpumacro.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ftrace.h b/include/asm-sparc64/ftrace.h deleted file mode 100644 index d27716c..0000000 --- a/include/asm-sparc64/ftrace.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _ASM_SPARC64_FTRACE -#define _ASM_SPARC64_FTRACE - -#ifdef CONFIG_MCOUNT -#define MCOUNT_ADDR ((long)(_mcount)) -#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ - -#ifndef __ASSEMBLY__ -extern void _mcount(void); -#endif - -#endif - -#endif /* _ASM_SPARC64_FTRACE */ diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h deleted file mode 100644 index 1ceb0bb..0000000 --- a/include/asm-sparc64/futex.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h deleted file mode 100644 index 63dca3d..0000000 --- a/include/asm-sparc64/hardirq.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h deleted file mode 100644 index 2254c09..0000000 --- a/include/asm-sparc64/head.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/hugetlb.h b/include/asm-sparc64/hugetlb.h deleted file mode 100644 index 21d8f0a..0000000 --- a/include/asm-sparc64/hugetlb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/hvtramp.h b/include/asm-sparc64/hvtramp.h deleted file mode 100644 index fb46bfe..0000000 --- a/include/asm-sparc64/hvtramp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/hw_irq.h b/include/asm-sparc64/hw_irq.h deleted file mode 100644 index 16920a2..0000000 --- a/include/asm-sparc64/hw_irq.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h deleted file mode 100644 index fe7e51a..0000000 --- a/include/asm-sparc64/hypervisor.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h deleted file mode 100644 index 7125317..0000000 --- a/include/asm-sparc64/ide.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/idprom.h b/include/asm-sparc64/idprom.h deleted file mode 100644 index c22f9c3..0000000 --- a/include/asm-sparc64/idprom.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/intr_queue.h b/include/asm-sparc64/intr_queue.h deleted file mode 100644 index f722501..0000000 --- a/include/asm-sparc64/intr_queue.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h deleted file mode 100644 index 25ff258..0000000 --- a/include/asm-sparc64/io.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ioctl.h b/include/asm-sparc64/ioctl.h deleted file mode 100644 index 18fc562..0000000 --- a/include/asm-sparc64/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ioctls.h b/include/asm-sparc64/ioctls.h deleted file mode 100644 index dcd5540..0000000 --- a/include/asm-sparc64/ioctls.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h deleted file mode 100644 index 76252bb..0000000 --- a/include/asm-sparc64/iommu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ipcbuf.h b/include/asm-sparc64/ipcbuf.h deleted file mode 100644 index 41dfaf1..0000000 --- a/include/asm-sparc64/ipcbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h deleted file mode 100644 index b2102e6..0000000 --- a/include/asm-sparc64/irq.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/irq_regs.h b/include/asm-sparc64/irq_regs.h deleted file mode 100644 index 1e2b8a1..0000000 --- a/include/asm-sparc64/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/irqflags.h b/include/asm-sparc64/irqflags.h deleted file mode 100644 index 27b091f..0000000 --- a/include/asm-sparc64/irqflags.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h deleted file mode 100644 index 78cfd5d..0000000 --- a/include/asm-sparc64/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/kgdb.h b/include/asm-sparc64/kgdb.h deleted file mode 100644 index aa6532f..0000000 --- a/include/asm-sparc64/kgdb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/kmap_types.h b/include/asm-sparc64/kmap_types.h deleted file mode 100644 index 276530c..0000000 --- a/include/asm-sparc64/kmap_types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/kprobes.h b/include/asm-sparc64/kprobes.h deleted file mode 100644 index c55e43e..0000000 --- a/include/asm-sparc64/kprobes.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ldc.h b/include/asm-sparc64/ldc.h deleted file mode 100644 index 40f3f23..0000000 --- a/include/asm-sparc64/ldc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/linkage.h b/include/asm-sparc64/linkage.h deleted file mode 100644 index 3ea4fd1..0000000 --- a/include/asm-sparc64/linkage.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/lmb.h b/include/asm-sparc64/lmb.h deleted file mode 100644 index 3d04981..0000000 --- a/include/asm-sparc64/lmb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/local.h b/include/asm-sparc64/local.h deleted file mode 100644 index c11c530..0000000 --- a/include/asm-sparc64/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/lsu.h b/include/asm-sparc64/lsu.h deleted file mode 100644 index 4e3d8b1..0000000 --- a/include/asm-sparc64/lsu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mc146818rtc.h b/include/asm-sparc64/mc146818rtc.h deleted file mode 100644 index 97842e6..0000000 --- a/include/asm-sparc64/mc146818rtc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mdesc.h b/include/asm-sparc64/mdesc.h deleted file mode 100644 index 165a193..0000000 --- a/include/asm-sparc64/mdesc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mman.h b/include/asm-sparc64/mman.h deleted file mode 100644 index 17ddb17..0000000 --- a/include/asm-sparc64/mman.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h deleted file mode 100644 index e677a64..0000000 --- a/include/asm-sparc64/mmu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h deleted file mode 100644 index 877fee9..0000000 --- a/include/asm-sparc64/mmu_context.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mmzone.h b/include/asm-sparc64/mmzone.h deleted file mode 100644 index 43a710f..0000000 --- a/include/asm-sparc64/mmzone.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/module.h b/include/asm-sparc64/module.h deleted file mode 100644 index a9606db..0000000 --- a/include/asm-sparc64/module.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h deleted file mode 100644 index 95a752f..0000000 --- a/include/asm-sparc64/mostek.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/msgbuf.h b/include/asm-sparc64/msgbuf.h deleted file mode 100644 index 5b33cc9..0000000 --- a/include/asm-sparc64/msgbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/mutex.h b/include/asm-sparc64/mutex.h deleted file mode 100644 index c0c0f8f..0000000 --- a/include/asm-sparc64/mutex.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ns87303.h b/include/asm-sparc64/ns87303.h deleted file mode 100644 index 5f369d4..0000000 --- a/include/asm-sparc64/ns87303.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/of_device.h b/include/asm-sparc64/of_device.h deleted file mode 100644 index a769fdb..0000000 --- a/include/asm-sparc64/of_device.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/of_platform.h b/include/asm-sparc64/of_platform.h deleted file mode 100644 index f7c427b..0000000 --- a/include/asm-sparc64/of_platform.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h deleted file mode 100644 index acf4b23..0000000 --- a/include/asm-sparc64/openprom.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/openpromio.h b/include/asm-sparc64/openpromio.h deleted file mode 100644 index 122fabd..0000000 --- a/include/asm-sparc64/openpromio.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h deleted file mode 100644 index d93e44e..0000000 --- a/include/asm-sparc64/oplib.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h deleted file mode 100644 index f46c1fb..0000000 --- a/include/asm-sparc64/page.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/param.h b/include/asm-sparc64/param.h deleted file mode 100644 index 40c6dc1..0000000 --- a/include/asm-sparc64/param.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/parport.h b/include/asm-sparc64/parport.h deleted file mode 100644 index b4e4ca8..0000000 --- a/include/asm-sparc64/parport.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h deleted file mode 100644 index da54c4d..0000000 --- a/include/asm-sparc64/pci.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h deleted file mode 100644 index 292729b..0000000 --- a/include/asm-sparc64/percpu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/perfctr.h b/include/asm-sparc64/perfctr.h deleted file mode 100644 index 52073a9..0000000 --- a/include/asm-sparc64/perfctr.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h deleted file mode 100644 index bec3164..0000000 --- a/include/asm-sparc64/pgalloc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h deleted file mode 100644 index 9decbd9..0000000 --- a/include/asm-sparc64/pgtable.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/pil.h b/include/asm-sparc64/pil.h deleted file mode 100644 index d805f33..0000000 --- a/include/asm-sparc64/pil.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/poll.h b/include/asm-sparc64/poll.h deleted file mode 100644 index 8e2f31b..0000000 --- a/include/asm-sparc64/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h deleted file mode 100644 index 8cee992..0000000 --- a/include/asm-sparc64/posix_types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h deleted file mode 100644 index 21de6cc..0000000 --- a/include/asm-sparc64/processor.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/prom.h b/include/asm-sparc64/prom.h deleted file mode 100644 index 5fa166e..0000000 --- a/include/asm-sparc64/prom.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/psrcompat.h b/include/asm-sparc64/psrcompat.h deleted file mode 100644 index 587846f..0000000 --- a/include/asm-sparc64/psrcompat.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/pstate.h b/include/asm-sparc64/pstate.h deleted file mode 100644 index 3ccf0be..0000000 --- a/include/asm-sparc64/pstate.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h deleted file mode 100644 index 1a55b9f..0000000 --- a/include/asm-sparc64/ptrace.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/reboot.h b/include/asm-sparc64/reboot.h deleted file mode 100644 index 0d72eb8..0000000 --- a/include/asm-sparc64/reboot.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/reg.h b/include/asm-sparc64/reg.h deleted file mode 100644 index 495bab2..0000000 --- a/include/asm-sparc64/reg.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/resource.h b/include/asm-sparc64/resource.h deleted file mode 100644 index 46e3bc0..0000000 --- a/include/asm-sparc64/resource.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/rtc.h b/include/asm-sparc64/rtc.h deleted file mode 100644 index e49a968..0000000 --- a/include/asm-sparc64/rtc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/rwsem-const.h b/include/asm-sparc64/rwsem-const.h deleted file mode 100644 index 2a1de31..0000000 --- a/include/asm-sparc64/rwsem-const.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/rwsem.h b/include/asm-sparc64/rwsem.h deleted file mode 100644 index 6943c56..0000000 --- a/include/asm-sparc64/rwsem.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h deleted file mode 100644 index 0cab0e8..0000000 --- a/include/asm-sparc64/sbus.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/scatterlist.h b/include/asm-sparc64/scatterlist.h deleted file mode 100644 index b7fef95..0000000 --- a/include/asm-sparc64/scatterlist.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/scratchpad.h b/include/asm-sparc64/scratchpad.h deleted file mode 100644 index 23675f6..0000000 --- a/include/asm-sparc64/scratchpad.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/seccomp.h b/include/asm-sparc64/seccomp.h deleted file mode 100644 index f22f02a..0000000 --- a/include/asm-sparc64/seccomp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sections.h b/include/asm-sparc64/sections.h deleted file mode 100644 index 721496f..0000000 --- a/include/asm-sparc64/sections.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sembuf.h b/include/asm-sparc64/sembuf.h deleted file mode 100644 index c55b952..0000000 --- a/include/asm-sparc64/sembuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/setup.h b/include/asm-sparc64/setup.h deleted file mode 100644 index 7143d06..0000000 --- a/include/asm-sparc64/setup.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sfafsr.h b/include/asm-sparc64/sfafsr.h deleted file mode 100644 index 8036fc3..0000000 --- a/include/asm-sparc64/sfafsr.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sfp-machine.h b/include/asm-sparc64/sfp-machine.h deleted file mode 100644 index 7bbc4fe..0000000 --- a/include/asm-sparc64/sfp-machine.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/shmbuf.h b/include/asm-sparc64/shmbuf.h deleted file mode 100644 index 0c54a2d..0000000 --- a/include/asm-sparc64/shmbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/shmparam.h b/include/asm-sparc64/shmparam.h deleted file mode 100644 index 5fa3a9b..0000000 --- a/include/asm-sparc64/shmparam.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sigcontext.h b/include/asm-sparc64/sigcontext.h deleted file mode 100644 index 5b16dcc..0000000 --- a/include/asm-sparc64/sigcontext.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/siginfo.h b/include/asm-sparc64/siginfo.h deleted file mode 100644 index 8ffd6eb..0000000 --- a/include/asm-sparc64/siginfo.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h deleted file mode 100644 index 79705e5..0000000 --- a/include/asm-sparc64/signal.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h deleted file mode 100644 index 5095a2c..0000000 --- a/include/asm-sparc64/smp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/socket.h b/include/asm-sparc64/socket.h deleted file mode 100644 index 13e0d5d..0000000 --- a/include/asm-sparc64/socket.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sockios.h b/include/asm-sparc64/sockios.h deleted file mode 100644 index 2cb4b64..0000000 --- a/include/asm-sparc64/sockios.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sparsemem.h b/include/asm-sparc64/sparsemem.h deleted file mode 100644 index e681f22..0000000 --- a/include/asm-sparc64/sparsemem.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h deleted file mode 100644 index 0115b81..0000000 --- a/include/asm-sparc64/spinlock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/spinlock_types.h b/include/asm-sparc64/spinlock_types.h deleted file mode 100644 index 48d81c8..0000000 --- a/include/asm-sparc64/spinlock_types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h deleted file mode 100644 index 4430d2f..0000000 --- a/include/asm-sparc64/spitfire.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sstate.h b/include/asm-sparc64/sstate.h deleted file mode 100644 index 97720ce..0000000 --- a/include/asm-sparc64/sstate.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/stacktrace.h b/include/asm-sparc64/stacktrace.h deleted file mode 100644 index adc9b92c..0000000 --- a/include/asm-sparc64/stacktrace.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/starfire.h b/include/asm-sparc64/starfire.h deleted file mode 100644 index db97daa..0000000 --- a/include/asm-sparc64/starfire.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/stat.h b/include/asm-sparc64/stat.h deleted file mode 100644 index b108a86..0000000 --- a/include/asm-sparc64/stat.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/statfs.h b/include/asm-sparc64/statfs.h deleted file mode 100644 index 5503d6a..0000000 --- a/include/asm-sparc64/statfs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h deleted file mode 100644 index 5018cd8..0000000 --- a/include/asm-sparc64/string.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/sunbpp.h b/include/asm-sparc64/sunbpp.h deleted file mode 100644 index 9632be2..0000000 --- a/include/asm-sparc64/sunbpp.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/syscalls.h b/include/asm-sparc64/syscalls.h deleted file mode 100644 index 3477b16..0000000 --- a/include/asm-sparc64/syscalls.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h deleted file mode 100644 index be2603c..0000000 --- a/include/asm-sparc64/system.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/termbits.h b/include/asm-sparc64/termbits.h deleted file mode 100644 index e03f975..0000000 --- a/include/asm-sparc64/termbits.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/termios.h b/include/asm-sparc64/termios.h deleted file mode 100644 index 940495e..0000000 --- a/include/asm-sparc64/termios.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h deleted file mode 100644 index 92bed79..0000000 --- a/include/asm-sparc64/thread_info.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h deleted file mode 100644 index 88026d8..0000000 --- a/include/asm-sparc64/timer.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/timex.h b/include/asm-sparc64/timex.h deleted file mode 100644 index 8dd59ee..0000000 --- a/include/asm-sparc64/timex.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/tlb.h b/include/asm-sparc64/tlb.h deleted file mode 100644 index ae92fce..0000000 --- a/include/asm-sparc64/tlb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/tlbflush.h b/include/asm-sparc64/tlbflush.h deleted file mode 100644 index a43979a..0000000 --- a/include/asm-sparc64/tlbflush.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h deleted file mode 100644 index 46999b6..0000000 --- a/include/asm-sparc64/topology.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h deleted file mode 100644 index 3677a30..0000000 --- a/include/asm-sparc64/tsb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h deleted file mode 100644 index a550f1b..0000000 --- a/include/asm-sparc64/ttable.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/types.h b/include/asm-sparc64/types.h deleted file mode 100644 index cfbfad5..0000000 --- a/include/asm-sparc64/types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h deleted file mode 100644 index 2872d22..0000000 --- a/include/asm-sparc64/uaccess.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/uctx.h b/include/asm-sparc64/uctx.h deleted file mode 100644 index 9e1b579..0000000 --- a/include/asm-sparc64/uctx.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/unaligned.h b/include/asm-sparc64/unaligned.h deleted file mode 100644 index 19fbf95..0000000 --- a/include/asm-sparc64/unaligned.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h deleted file mode 100644 index ad86e0b..0000000 --- a/include/asm-sparc64/unistd.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/upa.h b/include/asm-sparc64/upa.h deleted file mode 100644 index aab7293..0000000 --- a/include/asm-sparc64/upa.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/user.h b/include/asm-sparc64/user.h deleted file mode 100644 index 29fc6e9..0000000 --- a/include/asm-sparc64/user.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/utrap.h b/include/asm-sparc64/utrap.h deleted file mode 100644 index b030a41..0000000 --- a/include/asm-sparc64/utrap.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/vga.h b/include/asm-sparc64/vga.h deleted file mode 100644 index fbf4d58..0000000 --- a/include/asm-sparc64/vga.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/vio.h b/include/asm-sparc64/vio.h deleted file mode 100644 index 299b26a..0000000 --- a/include/asm-sparc64/vio.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/visasm.h b/include/asm-sparc64/visasm.h deleted file mode 100644 index 837a122..0000000 --- a/include/asm-sparc64/visasm.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/watchdog.h b/include/asm-sparc64/watchdog.h deleted file mode 100644 index b0f2857..0000000 --- a/include/asm-sparc64/watchdog.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sparc64/xor.h b/include/asm-sparc64/xor.h deleted file mode 100644 index ef187cc..0000000 --- a/include/asm-sparc64/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include -- cgit v1.1 From 940389b8afad6495211614c13eb91ef7001773ec Mon Sep 17 00:00:00 2001 From: Andrea Righi Date: Mon, 28 Jul 2008 00:48:12 +0200 Subject: task IO accounting: move all IO statistics in struct task_io_accounting Simplify the code of include/linux/task_io_accounting.h. It is also more reasonable to have all the task i/o-related statistics in a single struct (task_io_accounting). Signed-off-by: Andrea Righi Signed-off-by: Oleg Nesterov Signed-off-by: Linus Torvalds --- include/linux/sched.h | 12 ++++----- include/linux/task_io_accounting.h | 17 ++---------- include/linux/task_io_accounting_ops.h | 48 +++++++++++++++++----------------- 3 files changed, 32 insertions(+), 45 deletions(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 034c1ca..5270d44 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -505,7 +505,7 @@ struct signal_struct { unsigned long nvcsw, nivcsw, cnvcsw, cnivcsw; unsigned long min_flt, maj_flt, cmin_flt, cmaj_flt; unsigned long inblock, oublock, cinblock, coublock; - struct proc_io_accounting ioac; + struct task_io_accounting ioac; /* * Cumulative ns of scheduled CPU time for dead threads in the @@ -1253,7 +1253,7 @@ struct task_struct { unsigned long ptrace_message; siginfo_t *last_siginfo; /* For ptrace use. */ - struct proc_io_accounting ioac; + struct task_io_accounting ioac; #if defined(CONFIG_TASK_XACCT) u64 acct_rss_mem1; /* accumulated rss usage */ u64 acct_vm_mem1; /* accumulated virtual memory usage */ @@ -2183,22 +2183,22 @@ extern long sched_group_rt_period(struct task_group *tg); #ifdef CONFIG_TASK_XACCT static inline void add_rchar(struct task_struct *tsk, ssize_t amt) { - tsk->ioac.chr.rchar += amt; + tsk->ioac.rchar += amt; } static inline void add_wchar(struct task_struct *tsk, ssize_t amt) { - tsk->ioac.chr.wchar += amt; + tsk->ioac.wchar += amt; } static inline void inc_syscr(struct task_struct *tsk) { - tsk->ioac.chr.syscr++; + tsk->ioac.syscr++; } static inline void inc_syscw(struct task_struct *tsk) { - tsk->ioac.chr.syscw++; + tsk->ioac.syscw++; } #else static inline void add_rchar(struct task_struct *tsk, ssize_t amt) diff --git a/include/linux/task_io_accounting.h b/include/linux/task_io_accounting.h index 165390f..5e88afc 100644 --- a/include/linux/task_io_accounting.h +++ b/include/linux/task_io_accounting.h @@ -1,5 +1,5 @@ /* - * proc_io_accounting: a structure which is used for recording a single task's + * task_io_accounting: a structure which is used for recording a single task's * IO statistics. * * Don't include this header file directly - it is designed to be dragged in via @@ -8,8 +8,8 @@ * Blame akpm@osdl.org for all this. */ +struct task_io_accounting { #ifdef CONFIG_TASK_XACCT -struct task_chr_io_accounting { /* bytes read */ u64 rchar; /* bytes written */ @@ -18,14 +18,9 @@ struct task_chr_io_accounting { u64 syscr; /* # of write syscalls */ u64 syscw; -}; -#else /* CONFIG_TASK_XACCT */ -struct task_chr_io_accounting { -}; #endif /* CONFIG_TASK_XACCT */ #ifdef CONFIG_TASK_IO_ACCOUNTING -struct task_io_accounting { /* * The number of bytes which this task has caused to be read from * storage. @@ -46,13 +41,5 @@ struct task_io_accounting { * information loss in doing that. */ u64 cancelled_write_bytes; -}; -#else /* CONFIG_TASK_IO_ACCOUNTING */ -struct task_io_accounting { -}; #endif /* CONFIG_TASK_IO_ACCOUNTING */ - -struct proc_io_accounting { - struct task_chr_io_accounting chr; - struct task_io_accounting blk; }; diff --git a/include/linux/task_io_accounting_ops.h b/include/linux/task_io_accounting_ops.h index e6f958e..4d090f9 100644 --- a/include/linux/task_io_accounting_ops.h +++ b/include/linux/task_io_accounting_ops.h @@ -9,7 +9,7 @@ #ifdef CONFIG_TASK_IO_ACCOUNTING static inline void task_io_account_read(size_t bytes) { - current->ioac.blk.read_bytes += bytes; + current->ioac.read_bytes += bytes; } /* @@ -18,12 +18,12 @@ static inline void task_io_account_read(size_t bytes) */ static inline unsigned long task_io_get_inblock(const struct task_struct *p) { - return p->ioac.blk.read_bytes >> 9; + return p->ioac.read_bytes >> 9; } static inline void task_io_account_write(size_t bytes) { - current->ioac.blk.write_bytes += bytes; + current->ioac.write_bytes += bytes; } /* @@ -32,25 +32,25 @@ static inline void task_io_account_write(size_t bytes) */ static inline unsigned long task_io_get_oublock(const struct task_struct *p) { - return p->ioac.blk.write_bytes >> 9; + return p->ioac.write_bytes >> 9; } static inline void task_io_account_cancelled_write(size_t bytes) { - current->ioac.blk.cancelled_write_bytes += bytes; + current->ioac.cancelled_write_bytes += bytes; } -static inline void task_io_accounting_init(struct proc_io_accounting *ioac) +static inline void task_io_accounting_init(struct task_io_accounting *ioac) { memset(ioac, 0, sizeof(*ioac)); } -static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, - struct proc_io_accounting *src) +static inline void task_blk_io_accounting_add(struct task_io_accounting *dst, + struct task_io_accounting *src) { - dst->blk.read_bytes += src->blk.read_bytes; - dst->blk.write_bytes += src->blk.write_bytes; - dst->blk.cancelled_write_bytes += src->blk.cancelled_write_bytes; + dst->read_bytes += src->read_bytes; + dst->write_bytes += src->write_bytes; + dst->cancelled_write_bytes += src->cancelled_write_bytes; } #else @@ -77,35 +77,35 @@ static inline void task_io_account_cancelled_write(size_t bytes) { } -static inline void task_io_accounting_init(struct proc_io_accounting *ioac) +static inline void task_io_accounting_init(struct task_io_accounting *ioac) { } -static inline void task_blk_io_accounting_add(struct proc_io_accounting *dst, - struct proc_io_accounting *src) +static inline void task_blk_io_accounting_add(struct task_io_accounting *dst, + struct task_io_accounting *src) { } #endif /* CONFIG_TASK_IO_ACCOUNTING */ #ifdef CONFIG_TASK_XACCT -static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, - struct proc_io_accounting *src) +static inline void task_chr_io_accounting_add(struct task_io_accounting *dst, + struct task_io_accounting *src) { - dst->chr.rchar += src->chr.rchar; - dst->chr.wchar += src->chr.wchar; - dst->chr.syscr += src->chr.syscr; - dst->chr.syscw += src->chr.syscw; + dst->rchar += src->rchar; + dst->wchar += src->wchar; + dst->syscr += src->syscr; + dst->syscw += src->syscw; } #else -static inline void task_chr_io_accounting_add(struct proc_io_accounting *dst, - struct proc_io_accounting *src) +static inline void task_chr_io_accounting_add(struct task_io_accounting *dst, + struct task_io_accounting *src) { } #endif /* CONFIG_TASK_XACCT */ -static inline void task_io_accounting_add(struct proc_io_accounting *dst, - struct proc_io_accounting *src) +static inline void task_io_accounting_add(struct task_io_accounting *dst, + struct task_io_accounting *src) { task_chr_io_accounting_add(dst, src); task_blk_io_accounting_add(dst, src); -- cgit v1.1 From 5c2aed622571ac7c3c6ec182d6d3c318e4b45c8b Mon Sep 17 00:00:00 2001 From: Jason Baron Date: Thu, 28 Feb 2008 11:33:03 -0500 Subject: stop_machine: add ALL_CPUS option -allow stop_mahcine_run() to call a function on all cpus. Calling stop_machine_run() with a 'ALL_CPUS' invokes this new behavior. stop_machine_run() proceeds as normal until the calling cpu has invoked 'fn'. Then, we tell all the other cpus to call 'fn'. Signed-off-by: Jason Baron Signed-off-by: Mathieu Desnoyers Signed-off-by: Rusty Russell CC: Adrian Bunk CC: Andi Kleen CC: Alexey Dobriyan CC: Christoph Hellwig CC: mingo@elte.hu CC: akpm@osdl.org --- include/linux/stop_machine.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h index 5bfc553..18af011 100644 --- a/include/linux/stop_machine.h +++ b/include/linux/stop_machine.h @@ -8,11 +8,17 @@ #include #if defined(CONFIG_STOP_MACHINE) && defined(CONFIG_SMP) + +#define ALL_CPUS ~0U + /** * stop_machine_run: freeze the machine on all CPUs and run this function * @fn: the function to run * @data: the data ptr for the @fn() - * @cpu: the cpu to run @fn() on (or any, if @cpu == NR_CPUS. + * @cpu: if @cpu == n, run @fn() on cpu n + * if @cpu == NR_CPUS, run @fn() on any cpu + * if @cpu == ALL_CPUS, run @fn() first on the calling cpu, and then + * concurrently on all the other cpus * * Description: This causes a thread to be scheduled on every other cpu, * each of which disables interrupts, and finally interrupts are disabled -- cgit v1.1 From ffdb5976c47609c862917d4c186ecbb5706d2dda Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Mon, 28 Jul 2008 12:16:28 -0500 Subject: Simplify stop_machine stop_machine creates a kthread which creates kernel threads. We can create those threads directly and simplify things a little. Some care must be taken with CPU hotunplug, which has special needs, but that code seems more robust than it was in the past. Signed-off-by: Rusty Russell Acked-by: Christian Borntraeger --- include/linux/stop_machine.h | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h index 18af011..36c2c72 100644 --- a/include/linux/stop_machine.h +++ b/include/linux/stop_machine.h @@ -17,13 +17,12 @@ * @data: the data ptr for the @fn() * @cpu: if @cpu == n, run @fn() on cpu n * if @cpu == NR_CPUS, run @fn() on any cpu - * if @cpu == ALL_CPUS, run @fn() first on the calling cpu, and then - * concurrently on all the other cpus + * if @cpu == ALL_CPUS, run @fn() on every online CPU. * - * Description: This causes a thread to be scheduled on every other cpu, - * each of which disables interrupts, and finally interrupts are disabled - * on the current CPU. The result is that noone is holding a spinlock - * or inside any other preempt-disabled region when @fn() runs. + * Description: This causes a thread to be scheduled on every cpu, + * each of which disables interrupts. The result is that noone is + * holding a spinlock or inside any other preempt-disabled region when + * @fn() runs. * * This can be thought of as a very heavy write lock, equivalent to * grabbing every spinlock in the kernel. */ @@ -35,13 +34,10 @@ int stop_machine_run(int (*fn)(void *), void *data, unsigned int cpu); * @data: the data ptr for the @fn * @cpu: the cpu to run @fn on (or any, if @cpu == NR_CPUS. * - * Description: This is a special version of the above, which returns the - * thread which has run @fn(): kthread_stop will return the return value - * of @fn(). Used by hotplug cpu. + * Description: This is a special version of the above, which assumes cpus + * won't come or go while it's being called. Used by hotplug cpu. */ -struct task_struct *__stop_machine_run(int (*fn)(void *), void *data, - unsigned int cpu); - +int __stop_machine_run(int (*fn)(void *), void *data, unsigned int cpu); #else static inline int stop_machine_run(int (*fn)(void *), void *data, -- cgit v1.1 From eeec4fad963490821348a331cca6102ae1c4a7a3 Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Mon, 28 Jul 2008 12:16:30 -0500 Subject: stop_machine(): stop_machine_run() changed to use cpu mask Instead of a "cpu" arg with magic values NR_CPUS (any cpu) and ~0 (all cpus), pass a cpumask_t. Allow NULL for the common case (where we don't care which CPU the function is run on): temporary cpumask_t's are usually considered bad for stack space. This deprecates stop_machine_run, to be removed soon when all the callers are dead. Signed-off-by: Rusty Russell --- include/linux/stop_machine.h | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/linux/stop_machine.h b/include/linux/stop_machine.h index 36c2c72..f1cb0ba 100644 --- a/include/linux/stop_machine.h +++ b/include/linux/stop_machine.h @@ -5,19 +5,19 @@ (and more). So the "read" side to such a lock is anything which diables preeempt. */ #include +#include #include #if defined(CONFIG_STOP_MACHINE) && defined(CONFIG_SMP) +/* Deprecated, but useful for transition. */ #define ALL_CPUS ~0U /** - * stop_machine_run: freeze the machine on all CPUs and run this function + * stop_machine: freeze the machine on all CPUs and run this function * @fn: the function to run * @data: the data ptr for the @fn() - * @cpu: if @cpu == n, run @fn() on cpu n - * if @cpu == NR_CPUS, run @fn() on any cpu - * if @cpu == ALL_CPUS, run @fn() on every online CPU. + * @cpus: the cpus to run the @fn() on (NULL = any online cpu) * * Description: This causes a thread to be scheduled on every cpu, * each of which disables interrupts. The result is that noone is @@ -26,22 +26,22 @@ * * This can be thought of as a very heavy write lock, equivalent to * grabbing every spinlock in the kernel. */ -int stop_machine_run(int (*fn)(void *), void *data, unsigned int cpu); +int stop_machine(int (*fn)(void *), void *data, const cpumask_t *cpus); /** - * __stop_machine_run: freeze the machine on all CPUs and run this function + * __stop_machine: freeze the machine on all CPUs and run this function * @fn: the function to run * @data: the data ptr for the @fn - * @cpu: the cpu to run @fn on (or any, if @cpu == NR_CPUS. + * @cpus: the cpus to run the @fn() on (NULL = any online cpu) * * Description: This is a special version of the above, which assumes cpus * won't come or go while it's being called. Used by hotplug cpu. */ -int __stop_machine_run(int (*fn)(void *), void *data, unsigned int cpu); +int __stop_machine(int (*fn)(void *), void *data, const cpumask_t *cpus); #else -static inline int stop_machine_run(int (*fn)(void *), void *data, - unsigned int cpu) +static inline int stop_machine(int (*fn)(void *), void *data, + const cpumask_t *cpus) { int ret; local_irq_disable(); @@ -50,4 +50,18 @@ static inline int stop_machine_run(int (*fn)(void *), void *data, return ret; } #endif /* CONFIG_SMP */ + +static inline int __deprecated stop_machine_run(int (*fn)(void *), void *data, + unsigned int cpu) +{ + /* If they don't care which cpu fn runs on, just pick one. */ + if (cpu == NR_CPUS) + return stop_machine(fn, data, NULL); + else if (cpu == ~0U) + return stop_machine(fn, data, &cpu_possible_map); + else { + cpumask_t cpus = cpumask_of_cpu(cpu); + return stop_machine(fn, data, &cpus); + } +} #endif /* _LINUX_STOP_MACHINE */ -- cgit v1.1 From ff8dc7698c904f2a911e89b3d54e7c4a74f5575d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sun, 27 Jul 2008 03:57:30 +1000 Subject: powerpc: Fix 8xx build failure The 'powerpc ioremap_prot' broke 8xx builds: include2/asm/pgtable-ppc32.h:555: error: '_PAGE_WRITETHRU' undeclared (first use in this function) include2/asm/pgtable-ppc32.h:555: error: (Each undeclared identifier is reported only once include2/asm/pgtable-ppc32.h:555: error: for each function it appears in.) Signed-off-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/pgtable-ppc32.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index bdbab72..6fe39e3 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -401,6 +401,9 @@ extern int icache_44x_need_flush; #ifndef _PAGE_COHERENT #define _PAGE_COHERENT 0 #endif +#ifndef _PAGE_WRITETHRU +#define _PAGE_WRITETHRU 0 +#endif #ifndef _PMD_PRESENT_MASK #define _PMD_PRESENT_MASK _PMD_PRESENT #endif -- cgit v1.1 From f1ba12856b7a7d43e495e216bc91e6bbf7aac383 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Sun, 27 Jul 2008 16:51:35 +1000 Subject: powerpc: Add asm/syscall.h with the tracehook entry points Add asm/syscall.h for powerpc with all the required entry points. This will allow arch-independent tracing code for system calls. BenH: Fixed up use of regs->trap to properly mask low bit Signed-off-by: Roland McGrath Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/ptrace.h | 1 + include/asm-powerpc/syscall.h | 84 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 85 insertions(+) create mode 100644 include/asm-powerpc/syscall.h (limited to 'include') diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h index 3d6e310..734e075 100644 --- a/include/asm-powerpc/ptrace.h +++ b/include/asm-powerpc/ptrace.h @@ -84,6 +84,7 @@ struct pt_regs { #ifndef __ASSEMBLY__ #define instruction_pointer(regs) ((regs)->nip) +#define user_stack_pointer(regs) ((regs)->gpr[1]) #define regs_return_value(regs) ((regs)->gpr[3]) #ifdef CONFIG_SMP diff --git a/include/asm-powerpc/syscall.h b/include/asm-powerpc/syscall.h new file mode 100644 index 0000000..efa7f0b --- /dev/null +++ b/include/asm-powerpc/syscall.h @@ -0,0 +1,84 @@ +/* + * Access to user system call parameters and results + * + * Copyright (C) 2008 Red Hat, Inc. All rights reserved. + * + * This copyrighted material is made available to anyone wishing to use, + * modify, copy, or redistribute it subject to the terms and conditions + * of the GNU General Public License v.2. + * + * See asm-generic/syscall.h for descriptions of what we must do here. + */ + +#ifndef _ASM_SYSCALL_H +#define _ASM_SYSCALL_H 1 + +#include + +static inline long syscall_get_nr(struct task_struct *task, + struct pt_regs *regs) +{ + return TRAP(regs) == 0xc00 ? regs->gpr[0] : -1L; +} + +static inline void syscall_rollback(struct task_struct *task, + struct pt_regs *regs) +{ + regs->gpr[3] = regs->orig_gpr3; +} + +static inline long syscall_get_error(struct task_struct *task, + struct pt_regs *regs) +{ + return (regs->ccr & 0x1000) ? -regs->gpr[3] : 0; +} + +static inline long syscall_get_return_value(struct task_struct *task, + struct pt_regs *regs) +{ + return regs->gpr[3]; +} + +static inline void syscall_set_return_value(struct task_struct *task, + struct pt_regs *regs, + int error, long val) +{ + if (error) { + regs->ccr |= 0x1000L; + regs->gpr[3] = -error; + } else { + regs->ccr &= ~0x1000L; + regs->gpr[3] = val; + } +} + +static inline void syscall_get_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned int i, unsigned int n, + unsigned long *args) +{ + BUG_ON(i + n > 6); +#ifdef CONFIG_PPC64 + if (test_tsk_thread_flag(task, TIF_32BIT)) { + /* + * Zero-extend 32-bit argument values. The high bits are + * garbage ignored by the actual syscall dispatch. + */ + while (n-- > 0) + args[n] = (u32) regs->gpr[3 + i + n]; + return; + } +#endif + memcpy(args, ®s->gpr[3 + i], n * sizeof(args[0])); +} + +static inline void syscall_set_arguments(struct task_struct *task, + struct pt_regs *regs, + unsigned int i, unsigned int n, + const unsigned long *args) +{ + BUG_ON(i + n > 6); + memcpy(®s->gpr[3 + i], args, n * sizeof(args[0])); +} + +#endif /* _ASM_SYSCALL_H */ -- cgit v1.1 From 7d6d637dac2050f30a1b57b0a3dc5de4a10616ba Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Sun, 27 Jul 2008 16:52:52 +1000 Subject: powerpc: Add TIF_NOTIFY_RESUME support for tracehook This adds TIF_NOTIFY_RESUME support for powerpc. When set, we call tracehook_notify_resume() on the way to user mode. This overloads do_signal() to do the work, but changes its arguments to it has the TIF_* bits handy in a register and drops the useless first argument that was always zero. Signed-off-by: Roland McGrath Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/signal.h | 3 +-- include/asm-powerpc/thread_info.h | 5 ++++- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/signal.h b/include/asm-powerpc/signal.h index a8c7bab..a7360cd 100644 --- a/include/asm-powerpc/signal.h +++ b/include/asm-powerpc/signal.h @@ -122,8 +122,7 @@ typedef struct sigaltstack { #ifdef __KERNEL__ struct pt_regs; -extern int do_signal(sigset_t *oldset, struct pt_regs *regs); -extern int do_signal32(sigset_t *oldset, struct pt_regs *regs); +extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags); #define ptrace_signal_deliver(regs, cookie) do { } while (0) #endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index a9db562..9665a26 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -108,6 +108,7 @@ static inline struct thread_info *current_thread_info(void) #define TIF_SECCOMP 10 /* secure computing */ #define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ #define TIF_NOERROR 12 /* Force successful syscall return */ +#define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ #define TIF_FREEZE 14 /* Freezing for suspend */ #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ #define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ @@ -125,12 +126,14 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_SECCOMP (1< Date: Sun, 27 Jul 2008 15:24:53 +1000 Subject: powerpc: Make core sibling information available to userspace Implement the notion of "core siblings" for powerpc. This makes /sys/devices/system/cpu/cpu*/topology/core_siblings present sensible values, indicating online CPUs which share an L2 cache. BenH: Made cpu_to_l2cache() use of_find_node_by_phandle() instead of IBM-specific open coded search Signed-off-by: Nathan Lynch Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/smp.h | 1 + include/asm-powerpc/topology.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h index 416d4c2..32e9100 100644 --- a/include/asm-powerpc/smp.h +++ b/include/asm-powerpc/smp.h @@ -62,6 +62,7 @@ extern int smp_hw_index[]; #endif DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); +DECLARE_PER_CPU(cpumask_t, cpu_core_map); /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. * diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h index 100c6fb..f00e8e5 100644 --- a/include/asm-powerpc/topology.h +++ b/include/asm-powerpc/topology.h @@ -108,6 +108,7 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev, #include #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) +#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) #endif #endif -- cgit v1.1 From e9efed3b80a83e44b98fc626f3268ae072550b84 Mon Sep 17 00:00:00 2001 From: Nathan Lynch Date: Sun, 27 Jul 2008 15:24:54 +1000 Subject: powerpc: Make core id information available to userspace Existing Open Firmware practice is to report each processor core as a separate node in the device tree. Report the value of the "reg" OF property corresponding to a logical CPU's device node as the core_id attribute in /sys/devices/system/cpu/cpu*/topology/core_id. Signed-off-by: Nathan Lynch Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/smp.h | 1 + include/asm-powerpc/topology.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h index 32e9100..4d28e1e 100644 --- a/include/asm-powerpc/smp.h +++ b/include/asm-powerpc/smp.h @@ -63,6 +63,7 @@ extern int smp_hw_index[]; DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); DECLARE_PER_CPU(cpumask_t, cpu_core_map); +extern int cpu_to_core_id(int cpu); /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. * diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h index f00e8e5..c32da6f 100644 --- a/include/asm-powerpc/topology.h +++ b/include/asm-powerpc/topology.h @@ -109,6 +109,7 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev, #define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) #define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) +#define topology_core_id(cpu) (cpu_to_core_id(cpu)) #endif #endif -- cgit v1.1 From 83ac6a1ed40bfbe185cf2bac5505d8d97aad8b1d Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Sun, 27 Jul 2008 20:28:03 -0700 Subject: powerpc/mm: Implement _PAGE_SPECIAL & pte_special() for 64-bit Implement _PAGE_SPECIAL and pte_special() for 64-bit powerpc. This bit will be used by the fast get_user_pages() to differenciate PTEs that correspond to a valid struct page from special mappings that don't such as IO mappings obtained via io_remap_pfn_ranges(). Signed-off-by: Nick Piggin Acked-by: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Hugh Dickins Cc: "Paul E. McKenney" Reviewed-by: Peter Zijlstra Signed-off-by: Andrew Morton Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/pgtable-4k.h | 2 ++ include/asm-powerpc/pgtable-64k.h | 2 ++ include/asm-powerpc/pgtable-ppc64.h | 4 ++-- 3 files changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h index c9601df..6b18ba9 100644 --- a/include/asm-powerpc/pgtable-4k.h +++ b/include/asm-powerpc/pgtable-4k.h @@ -46,6 +46,8 @@ #define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ #define _PAGE_F_SECOND _PAGE_SECONDARY #define _PAGE_F_GIX _PAGE_GROUP_IX +#define _PAGE_SPECIAL 0x10000 /* software: special page */ +#define __HAVE_ARCH_PTE_SPECIAL /* PTE flags to conserve for HPTE identification */ #define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \ diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h index 7e54adb..07b0d8f 100644 --- a/include/asm-powerpc/pgtable-64k.h +++ b/include/asm-powerpc/pgtable-64k.h @@ -70,6 +70,8 @@ static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) #define PGDIR_MASK (~(PGDIR_SIZE-1)) /* Additional PTE bits (don't change without checking asm in hash_low.S) */ +#define __HAVE_ARCH_PTE_SPECIAL +#define _PAGE_SPECIAL 0x00000400 /* software: special page */ #define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ #define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ #define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */ diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index ba80003..5fc78c0 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h @@ -245,7 +245,7 @@ static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;} static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;} static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;} static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;} -static inline int pte_special(pte_t pte) { return 0; } +static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } @@ -265,7 +265,7 @@ static inline pte_t pte_mkyoung(pte_t pte) { static inline pte_t pte_mkhuge(pte_t pte) { return pte; } static inline pte_t pte_mkspecial(pte_t pte) { - return pte; } + pte_val(pte) |= _PAGE_SPECIAL; return pte; } static inline unsigned long pte_pgprot(pte_t pte) { return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; -- cgit v1.1 From 9403540c0653122ca34884a180439ddbfcbcb524 Mon Sep 17 00:00:00 2001 From: Barry Naujok Date: Wed, 21 May 2008 16:50:46 +1000 Subject: dcache: Add case-insensitive support d_ci_add() routine This add a dcache entry to the dcache for lookup, but changing the name that is associated with the entry rather than the one passed in to the lookup routine. First, it sees if the case-exact match already exists in the dcache and uses it if one exists. Otherwise, it allocates a new node with the new name and splices it into the dcache. Original code from ntfs_lookup in fs/ntfs/namei.c by Anton Altaparmakov. Signed-off-by: Barry Naujok Signed-off-by: Anton Altaparmakov Acked-by: Christoph Hellwig --- include/linux/dcache.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/dcache.h b/include/linux/dcache.h index 98202c6..07aa198 100644 --- a/include/linux/dcache.h +++ b/include/linux/dcache.h @@ -230,6 +230,7 @@ extern void d_delete(struct dentry *); extern struct dentry * d_alloc(struct dentry *, const struct qstr *); extern struct dentry * d_alloc_anon(struct inode *); extern struct dentry * d_splice_alias(struct inode *, struct dentry *); +extern struct dentry * d_add_ci(struct inode *, struct dentry *, struct qstr *); extern void shrink_dcache_sb(struct super_block *); extern void shrink_dcache_parent(struct dentry *); extern void shrink_dcache_for_umount(struct super_block *); -- cgit v1.1 From 82706b8f7bd1365e50478d3d0f6090f22e4571c7 Mon Sep 17 00:00:00 2001 From: Khem Raj Date: Thu, 3 Jul 2008 19:02:41 +0900 Subject: sh: Prevent leaking of CONFIG_SUPERH32 to userspace in asm/unistd.h. CONFIG_SUPERH32 is currently trickling into userspace unistd.h. Attached patch uses __SH5__ define in userspace. Signed-off-by: Khem Raj Signed-off-by: Paul Mundt --- include/asm-sh/unistd.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h index 4b21f36..65be656 100644 --- a/include/asm-sh/unistd.h +++ b/include/asm-sh/unistd.h @@ -1,5 +1,13 @@ -#ifdef CONFIG_SUPERH32 -# include "unistd_32.h" +#ifdef __KERNEL__ +# ifdef CONFIG_SUPERH32 +# include "unistd_32.h" +# else +# include "unistd_64.h" +# endif #else -# include "unistd_64.h" +# ifdef __SH5__ +# include "unistd_64.h" +# else +# include "unistd_32.h" +# endif #endif -- cgit v1.1 From 3bc24a1a5441ef621daf737ec93b0a10e8999d59 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 19 May 2008 13:40:12 +0900 Subject: sh: Initial ELF FDPIC support. This adds initial support for ELF FDPIC on MMU-less SH, as per version 0.2 of the ABI definition at: http://www.codesourcery.com/public/docs/sh-fdpic/sh-fdpic-abi.txt Signed-off-by: Paul Mundt --- include/asm-sh/elf.h | 53 ++++++++++++++++++++++++++++++++++++++++++++++++- include/asm-sh/mmu.h | 4 ++++ include/asm-sh/ptrace.h | 5 +++++ 3 files changed, 61 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h index 05092da..f01449a 100644 --- a/include/asm-sh/elf.h +++ b/include/asm-sh/elf.h @@ -1,10 +1,15 @@ #ifndef __ASM_SH_ELF_H #define __ASM_SH_ELF_H +#include #include #include #include +/* ELF header e_flags defines */ +#define EF_SH_PIC 0x100 /* -fpic */ +#define EF_SH_FDPIC 0x8000 /* -mfdpic */ + /* SH (particularly SHcompact) relocation types */ #define R_SH_NONE 0 #define R_SH_DIR32 1 @@ -43,6 +48,28 @@ #define R_SH_RELATIVE 165 #define R_SH_GOTOFF 166 #define R_SH_GOTPC 167 + +/* FDPIC relocs */ +#define R_SH_GOT20 70 +#define R_SH_GOTOFF20 71 +#define R_SH_GOTFUNCDESC 72 +#define R_SH_GOTFUNCDESC20 73 +#define R_SH_GOTOFFFUNCDESC 74 +#define R_SH_GOTOFFFUNCDESC20 75 +#define R_SH_FUNCDESC 76 +#define R_SH_FUNCDESC_VALUE 77 + +#if 0 /* XXX - later .. */ +#define R_SH_GOT20 198 +#define R_SH_GOTOFF20 199 +#define R_SH_GOTFUNCDESC 200 +#define R_SH_GOTFUNCDESC20 201 +#define R_SH_GOTOFFFUNCDESC 202 +#define R_SH_GOTOFFFUNCDESC20 203 +#define R_SH_FUNCDESC 204 +#define R_SH_FUNCDESC_VALUE 205 +#endif + /* SHmedia relocs */ #define R_SH_IMM_LOW16 246 #define R_SH_IMM_LOW16_PCREL 247 @@ -77,9 +104,12 @@ typedef struct user_fpu_struct elf_fpregset_t; /* * This is used to ensure we don't load something for the wrong architecture. */ -#define elf_check_arch(x) ( (x)->e_machine == EM_SH ) +#define elf_check_arch(x) ((x)->e_machine == EM_SH) +#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) +#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) #define USE_ELF_CORE_DUMP +#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC #define ELF_EXEC_PAGESIZE PAGE_SIZE /* This is the location that an ET_DYN program is loaded if exec'ed. Typical @@ -136,6 +166,27 @@ typedef struct user_fpu_struct elf_fpregset_t; _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \ _r->sr = SR_FD; } while (0) + +#define ELF_FDPIC_PLAT_INIT(_r, _exec_map_addr, _interp_map_addr, \ + _dynamic_addr) \ +do { \ + _r->regs[0] = 0; \ + _r->regs[1] = 0; \ + _r->regs[2] = 0; \ + _r->regs[3] = 0; \ + _r->regs[4] = 0; \ + _r->regs[5] = 0; \ + _r->regs[6] = 0; \ + _r->regs[7] = 0; \ + _r->regs[8] = _exec_map_addr; \ + _r->regs[9] = _interp_map_addr; \ + _r->regs[10] = _dynamic_addr; \ + _r->regs[11] = 0; \ + _r->regs[12] = 0; \ + _r->regs[13] = 0; \ + _r->regs[14] = 0; \ + _r->sr = SR_FD; \ +} while (0) #endif #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h index eb0358c..fdcb93b 100644 --- a/include/asm-sh/mmu.h +++ b/include/asm-sh/mmu.h @@ -12,6 +12,10 @@ typedef struct { struct vm_list_struct *vmlist; unsigned long end_brk; #endif +#ifdef CONFIG_BINFMT_ELF_FDPIC + unsigned long exec_fdpic_loadmap; + unsigned long interp_fdpic_loadmap; +#endif } mm_context_t; /* diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h index 7d36dc3..643ab5a 100644 --- a/include/asm-sh/ptrace.h +++ b/include/asm-sh/ptrace.h @@ -87,6 +87,11 @@ struct pt_dspregs { unsigned long mod; }; +#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ + +#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ +#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ + #define PTRACE_GETDSPREGS 55 #define PTRACE_SETDSPREGS 56 #endif -- cgit v1.1 From 02f7e627f9248a478cf790112a07ae2c612b895a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 3 Jun 2008 18:48:54 +0900 Subject: sh: Consolidate segment modifiers across mmu/nommu systems. This moves get_fs/set_fs() and friends in to asm/segment.h. The mm_segment_t definition is likewise consolidated from the _32/_64 split. This is prepatory groundwork for using the generic address space limit and verification routines across mmu/nommu configs. Signed-off-by: Paul Mundt --- include/asm-sh/processor.h | 1 + include/asm-sh/processor_32.h | 4 ---- include/asm-sh/processor_64.h | 4 ---- include/asm-sh/segment.h | 30 +++++++++++++++++++++++++++++- include/asm-sh/uaccess_32.h | 33 +++------------------------------ 5 files changed, 33 insertions(+), 39 deletions(-) (limited to 'include') diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index b7c7ce8..15d9f92 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -2,6 +2,7 @@ #define __ASM_SH_PROCESSOR_H #include +#include #ifndef __ASSEMBLY__ /* diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h index c09305d..81628f1 100644 --- a/include/asm-sh/processor_32.h +++ b/include/asm-sh/processor_32.h @@ -113,10 +113,6 @@ struct thread_struct { union sh_fpu_union fpu; }; -typedef struct { - unsigned long seg; -} mm_segment_t; - /* Count of active tasks with UBC settings */ extern int ubc_usercnt; diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h index 88a2edf..fc7fc68 100644 --- a/include/asm-sh/processor_64.h +++ b/include/asm-sh/processor_64.h @@ -166,10 +166,6 @@ struct thread_struct { union sh_fpu_union fpu; }; -typedef struct { - unsigned long seg; -} mm_segment_t; - #define INIT_MMAP \ { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } diff --git a/include/asm-sh/segment.h b/include/asm-sh/segment.h index e417eab..5e2725f 100644 --- a/include/asm-sh/segment.h +++ b/include/asm-sh/segment.h @@ -1,6 +1,34 @@ #ifndef __ASM_SH_SEGMENT_H #define __ASM_SH_SEGMENT_H -/* Only here because we have some old header files that expect it.. */ +#ifndef __ASSEMBLY__ +typedef struct { + unsigned long seg; +} mm_segment_t; + +#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) + +/* + * The fs value determines whether argument validity checking should be + * performed or not. If get_fs() == USER_DS, checking is performed, with + * get_fs() == KERNEL_DS, checking is bypassed. + * + * For historical reasons, these macros are grossly misnamed. + */ +#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) +#ifdef CONFIG_MMU +#define USER_DS MAKE_MM_SEG(PAGE_OFFSET) +#else +#define USER_DS KERNEL_DS +#endif + +#define segment_eq(a,b) ((a).seg == (b).seg) + +#define get_ds() (KERNEL_DS) + +#define get_fs() (current_thread_info()->addr_limit) +#define set_fs(x) (current_thread_info()->addr_limit = (x)) + +#endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_SEGMENT_H */ diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h index 1e41fda..0795ee5 100644 --- a/include/asm-sh/uaccess_32.h +++ b/include/asm-sh/uaccess_32.h @@ -1,9 +1,8 @@ -/* $Id: uaccess.h,v 1.11 2003/10/13 07:21:20 lethal Exp $ - * +/* * User space memory access functions * * Copyright (C) 1999, 2002 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt + * Copyright (C) 2003 - 2008 Paul Mundt * * Based on: * MIPS implementation version 1.15 by @@ -15,40 +14,16 @@ #include #include +#include #define VERIFY_READ 0 #define VERIFY_WRITE 1 -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons (Data Segment Register?), these macros are misnamed. - */ - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) - -#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) -#define USER_DS MAKE_MM_SEG(PAGE_OFFSET) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#define get_ds() (KERNEL_DS) #if !defined(CONFIG_MMU) /* NOMMU is always true */ #define __addr_ok(addr) (1) -static inline mm_segment_t get_fs(void) -{ - return USER_DS; -} - -static inline void set_fs(mm_segment_t s) -{ -} - /* * __access_ok: Check if address with size is OK or not. * @@ -64,8 +39,6 @@ static inline int __access_ok(unsigned long addr, unsigned long size) #define __addr_ok(addr) \ ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) -#define get_fs() (current_thread_info()->addr_limit) -#define set_fs(x) (current_thread_info()->addr_limit = (x)) /* * __access_ok: Check if address with size is OK or not. -- cgit v1.1 From 66dfe18114839a7297f56f43f03125f4121de79b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 3 Jun 2008 18:54:02 +0900 Subject: sh: Add support for 16kB PAGE_SIZE. 16kB is a useful size on nommu, while 64kB still tends to be too big to be useful. Newer MMUs are likely to support this as well, so plug it in in anticipation of those, too. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 2 ++ include/asm-sh/pgtable_32.h | 4 +++- include/asm-sh/thread_info.h | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 5dc01d2..77fb8bf 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -12,6 +12,8 @@ # define PAGE_SHIFT 12 #elif defined(CONFIG_PAGE_SIZE_8KB) # define PAGE_SHIFT 13 +#elif defined(CONFIG_PAGE_SIZE_16KB) +# define PAGE_SHIFT 14 #elif defined(CONFIG_PAGE_SIZE_64KB) # define PAGE_SHIFT 16 #else diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h index cbc731d..72ea209 100644 --- a/include/asm-sh/pgtable_32.h +++ b/include/asm-sh/pgtable_32.h @@ -102,7 +102,9 @@ #define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) /* Hardware flags, page size encoding */ -#if defined(CONFIG_X2TLB) +#if !defined(CONFIG_MMU) +# define _PAGE_FLAGS_HARD 0ULL +#elif defined(CONFIG_X2TLB) # if defined(CONFIG_PAGE_SIZE_4KB) # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) # elif defined(CONFIG_PAGE_SIZE_8KB) diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h index 5131e39..eeb4c74 100644 --- a/include/asm-sh/thread_info.h +++ b/include/asm-sh/thread_info.h @@ -38,6 +38,8 @@ struct thread_info { #define THREAD_SIZE_ORDER (1) #elif defined(CONFIG_PAGE_SIZE_8KB) #define THREAD_SIZE_ORDER (1) +#elif defined(CONFIG_PAGE_SIZE_16KB) +#define THREAD_SIZE_ORDER (0) #elif defined(CONFIG_PAGE_SIZE_64KB) #define THREAD_SIZE_ORDER (0) #else -- cgit v1.1 From 85247285ea6f6e2087193b2a720404690e9cb1b3 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 3 Jun 2008 19:37:35 +0900 Subject: sh: Use the common segment definitions for the _64 uaccess routines. Signed-off-by: Paul Mundt --- include/asm-sh/uaccess_64.h | 19 ------------------- 1 file changed, 19 deletions(-) (limited to 'include') diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h index a9b68d0..5833754 100644 --- a/include/asm-sh/uaccess_64.h +++ b/include/asm-sh/uaccess_64.h @@ -26,25 +26,6 @@ #define VERIFY_READ 0 #define VERIFY_WRITE 1 -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons (Data Segment Register?), these macros are misnamed. - */ - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) - -#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) -#define USER_DS MAKE_MM_SEG(0x80000000) - -#define get_ds() (KERNEL_DS) -#define get_fs() (current_thread_info()->addr_limit) -#define set_fs(x) (current_thread_info()->addr_limit=(x)) - -#define segment_eq(a,b) ((a).seg == (b).seg) - #define __addr_ok(addr) ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) /* -- cgit v1.1 From 31f6a11fe764dc580b645d7aa878854fa9e85a06 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 3 Jun 2008 19:38:22 +0900 Subject: sh: Consolidate addr/access_ok across mmu/nommu on 32bit. Signed-off-by: Paul Mundt --- include/asm-sh/uaccess_32.h | 39 +++------------------------------------ 1 file changed, 3 insertions(+), 36 deletions(-) (limited to 'include') diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h index 0795ee5..44abd16 100644 --- a/include/asm-sh/uaccess_32.h +++ b/include/asm-sh/uaccess_32.h @@ -19,26 +19,8 @@ #define VERIFY_READ 0 #define VERIFY_WRITE 1 - -#if !defined(CONFIG_MMU) -/* NOMMU is always true */ -#define __addr_ok(addr) (1) - -/* - * __access_ok: Check if address with size is OK or not. - * - * If we don't have an MMU (or if its disabled) the only thing we really have - * to look out for is if the address resides somewhere outside of what - * available RAM we have. - */ -static inline int __access_ok(unsigned long addr, unsigned long size) -{ - return 1; -} -#else /* CONFIG_MMU */ #define __addr_ok(addr) \ - ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) - + ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) /* * __access_ok: Check if address with size is OK or not. @@ -48,23 +30,8 @@ static inline int __access_ok(unsigned long addr, unsigned long size) * sum := addr + size; carry? --> flag = true; * if (sum >= addr_limit) flag = true; */ -static inline int __access_ok(unsigned long addr, unsigned long size) -{ - unsigned long flag, sum; - - __asm__("clrt\n\t" - "addc %3, %1\n\t" - "movt %0\n\t" - "cmp/hi %4, %1\n\t" - "rotcl %0" - :"=&r" (flag), "=r" (sum) - :"1" (addr), "r" (size), - "r" (current_thread_info()->addr_limit.seg) - :"t"); - return flag == 0; -} -#endif /* CONFIG_MMU */ - +#define __access_ok(addr, size) \ + (__addr_ok((addr) + (size))) #define access_ok(type, addr, size) \ (__chk_user_ptr(addr), \ __access_ok((unsigned long __force)(addr), (size))) -- cgit v1.1 From 42fd3b142d8867f5b58d6fb75592cd20fd654c1b Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 3 Jun 2008 20:05:39 +0900 Subject: sh: Initial consolidation of the _32/_64 uaccess split. This consolidates everything but the bare assembly routines, which we will sync up in a follow-up patch. Signed-off-by: Paul Mundt --- include/asm-sh/uaccess.h | 222 +++++++++++++++++++++++++++++++++++ include/asm-sh/uaccess_32.h | 277 ++++++++------------------------------------ include/asm-sh/uaccess_64.h | 187 ------------------------------ 3 files changed, 270 insertions(+), 416 deletions(-) (limited to 'include') diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h index b3440c3..45c2c9b 100644 --- a/include/asm-sh/uaccess.h +++ b/include/asm-sh/uaccess.h @@ -1,12 +1,171 @@ #ifndef __ASM_SH_UACCESS_H #define __ASM_SH_UACCESS_H +#include +#include +#include + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +#define __addr_ok(addr) \ + ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) + +/* + * __access_ok: Check if address with size is OK or not. + * + * Uhhuh, this needs 33-bit arithmetic. We have a carry.. + * + * sum := addr + size; carry? --> flag = true; + * if (sum >= addr_limit) flag = true; + */ +#define __access_ok(addr, size) \ + (__addr_ok((addr) + (size))) +#define access_ok(type, addr, size) \ + (__chk_user_ptr(addr), \ + __access_ok((unsigned long __force)(addr), (size))) + +/* + * Uh, these should become the main single-value transfer routines ... + * They automatically use the right size if we just have the right + * pointer type ... + * + * As SuperH uses the same address space for kernel and user data, we + * can just do these as direct assignments. + * + * Careful to not + * (a) re-use the arguments for side effects (sizeof is ok) + * (b) require any knowledge of processes at this stage + */ +#define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) +#define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) + +/* + * The "__xxx" versions do not do address space checking, useful when + * doing multiple accesses to the same area (the user has to do the + * checks by hand with "access_ok()") + */ +#define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) +#define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) + +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) (*(struct __large_struct __user *)(x)) + +#define __get_user_nocheck(x,ptr,size) \ +({ \ + long __gu_err; \ + unsigned long __gu_val; \ + const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ + __chk_user_ptr(ptr); \ + __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#define __get_user_check(x,ptr,size) \ +({ \ + long __gu_err = -EFAULT; \ + unsigned long __gu_val = 0; \ + const __typeof__(*(ptr)) *__gu_addr = (ptr); \ + if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ + __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ + (x) = (__typeof__(*(ptr)))__gu_val; \ + __gu_err; \ +}) + +#define __put_user_nocheck(x,ptr,size) \ +({ \ + long __pu_err; \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ + __chk_user_ptr(ptr); \ + __put_user_size((x), __pu_addr, (size), __pu_err); \ + __pu_err; \ +}) + +#define __put_user_check(x,ptr,size) \ +({ \ + long __pu_err = -EFAULT; \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ + if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ + __put_user_size((x), __pu_addr, (size), \ + __pu_err); \ + __pu_err; \ +}) + #ifdef CONFIG_SUPERH32 # include "uaccess_32.h" #else # include "uaccess_64.h" #endif +/* Generic arbitrary sized copy. */ +/* Return the number of bytes NOT copied */ +__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); + +static __always_inline unsigned long +__copy_from_user(void *to, const void __user *from, unsigned long n) +{ + return __copy_user(to, (__force void *)from, n); +} + +static __always_inline unsigned long __must_check +__copy_to_user(void __user *to, const void *from, unsigned long n) +{ + return __copy_user((__force void *)to, from, n); +} + +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + +/* + * Clear the area and return remaining number of bytes + * (on failure. Usually it's 0.) + */ +__kernel_size_t __clear_user(void *addr, __kernel_size_t size); + +#define clear_user(addr,n) \ +({ \ + void __user * __cl_addr = (addr); \ + unsigned long __cl_size = (n); \ + \ + if (__cl_size && access_ok(VERIFY_WRITE, \ + ((unsigned long)(__cl_addr)), __cl_size)) \ + __cl_size = __clear_user(__cl_addr, __cl_size); \ + \ + __cl_size; \ +}) + +/** + * strncpy_from_user: - Copy a NUL terminated string from userspace. + * @dst: Destination address, in kernel space. This buffer must be at + * least @count bytes long. + * @src: Source address, in user space. + * @count: Maximum number of bytes to copy, including the trailing NUL. + * + * Copies a NUL-terminated string from userspace to kernel space. + * + * On success, returns the length of the string (not including the trailing + * NUL). + * + * If access to userspace fails, returns -EFAULT (some data may have been + * copied). + * + * If @count is smaller than the length of the string, copies @count bytes + * and returns @count. + */ +#define strncpy_from_user(dest,src,count) \ +({ \ + unsigned long __sfu_src = (unsigned long)(src); \ + int __sfu_count = (int)(count); \ + long __sfu_res = -EFAULT; \ + \ + if (__access_ok(__sfu_src, __sfu_count)) \ + __sfu_res = __strncpy_from_user((unsigned long)(dest), \ + __sfu_src, __sfu_count); \ + \ + __sfu_res; \ +}) + static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) { @@ -31,4 +190,67 @@ copy_to_user(void __user *to, const void *from, unsigned long n) return __copy_size; } +/** + * strnlen_user: - Get the size of a string in user space. + * @s: The string to measure. + * @n: The maximum valid length + * + * Context: User context only. This function may sleep. + * + * Get the size of a NUL-terminated string in user space. + * + * Returns the size of the string INCLUDING the terminating NUL. + * On exception, returns 0. + * If the string is too long, returns a value greater than @n. + */ +static inline long strnlen_user(const char __user *s, long n) +{ + if (!__addr_ok(s)) + return 0; + else + return __strnlen_user(s, n); +} + +/** + * strlen_user: - Get the size of a string in user space. + * @str: The string to measure. + * + * Context: User context only. This function may sleep. + * + * Get the size of a NUL-terminated string in user space. + * + * Returns the size of the string INCLUDING the terminating NUL. + * On exception, returns 0. + * + * If there is a limit on the length of a valid string, you may wish to + * consider using strnlen_user() instead. + */ +#define strlen_user(str) strnlen_user(str, ~0UL >> 1) + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ +struct exception_table_entry { + unsigned long insn, fixup; +}; + +#if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) +#define ARCH_HAS_SEARCH_EXTABLE +#endif + +int fixup_exception(struct pt_regs *regs); +/* Returns 0 if exception not found and fixup.unit otherwise. */ +unsigned long search_exception_table(unsigned long addr); +const struct exception_table_entry *search_exception_tables(unsigned long addr); + + #endif /* __ASM_SH_UACCESS_H */ diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h index 44abd16..ae0d24f 100644 --- a/include/asm-sh/uaccess_32.h +++ b/include/asm-sh/uaccess_32.h @@ -12,56 +12,6 @@ #ifndef __ASM_SH_UACCESS_32_H #define __ASM_SH_UACCESS_32_H -#include -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define __addr_ok(addr) \ - ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) - -/* - * __access_ok: Check if address with size is OK or not. - * - * Uhhuh, this needs 33-bit arithmetic. We have a carry.. - * - * sum := addr + size; carry? --> flag = true; - * if (sum >= addr_limit) flag = true; - */ -#define __access_ok(addr, size) \ - (__addr_ok((addr) + (size))) -#define access_ok(type, addr, size) \ - (__chk_user_ptr(addr), \ - __access_ok((unsigned long __force)(addr), (size))) - -/* - * Uh, these should become the main single-value transfer routines ... - * They automatically use the right size if we just have the right - * pointer type ... - * - * As SuperH uses the same address space for kernel and user data, we - * can just do these as direct assignments. - * - * Careful to not - * (a) re-use the arguments for side effects (sizeof is ok) - * (b) require any knowledge of processes at this stage - */ -#define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) -#define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the user has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) (*(struct __large_struct __user *)(x)) - #define __get_user_size(x,ptr,size,retval) \ do { \ retval = 0; \ @@ -81,28 +31,7 @@ do { \ } \ } while (0) -#define __get_user_nocheck(x,ptr,size) \ -({ \ - long __gu_err; \ - unsigned long __gu_val; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x,ptr,size) \ -({ \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ - const __typeof__(*(ptr)) *__gu_addr = (ptr); \ - if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - +#ifdef CONFIG_MMU #define __get_user_asm(x, addr, err, insn) \ ({ \ __asm__ __volatile__( \ @@ -123,6 +52,16 @@ __asm__ __volatile__( \ ".previous" \ :"=&r" (err), "=&r" (x) \ :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) +#else +#define __get_user_asm(x, addr, err, insn) \ +do { \ + __asm__ __volatile__ ( \ + "mov." insn " %1, %0\n\t" \ + : "=&r" (x) \ + : "m" (__m(addr)) \ + ); \ +} while (0) +#endif /* CONFIG_MMU */ extern void __get_user_unknown(void); @@ -147,45 +86,41 @@ do { \ } \ } while (0) -#define __put_user_nocheck(x,ptr,size) \ -({ \ - long __pu_err; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __put_user_size((x), __pu_addr, (size), __pu_err); \ - __pu_err; \ -}) - -#define __put_user_check(x,ptr,size) \ -({ \ - long __pu_err = -EFAULT; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ - __put_user_size((x), __pu_addr, (size), \ - __pu_err); \ - __pu_err; \ -}) - -#define __put_user_asm(x, addr, err, insn) \ -({ \ -__asm__ __volatile__( \ - "1:\n\t" \ - "mov." insn " %1, %2\n\t" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3:\n\t" \ - "mov.l 4f, %0\n\t" \ - "jmp @%0\n\t" \ - " mov %3, %0\n\t" \ - ".balign 4\n" \ - "4: .long 2b\n\t" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n\t" \ - ".long 1b, 3b\n\t" \ - ".previous" \ - :"=&r" (err) \ - :"r" (x), "m" (__m(addr)), "i" (-EFAULT), "0" (err) \ - :"memory"); }) +#ifdef CONFIG_MMU +#define __put_user_asm(x, addr, err, insn) \ +do { \ + __asm__ __volatile__ ( \ + "1:\n\t" \ + "mov." insn " %1, %2\n\t" \ + "2:\n" \ + ".section .fixup,\"ax\"\n" \ + "3:\n\t" \ + "mov.l 4f, %0\n\t" \ + "jmp @%0\n\t" \ + " mov %3, %0\n\t" \ + ".balign 4\n" \ + "4: .long 2b\n\t" \ + ".previous\n" \ + ".section __ex_table,\"a\"\n\t" \ + ".long 1b, 3b\n\t" \ + ".previous" \ + : "=&r" (err) \ + : "r" (x), "m" (__m(addr)), "i" (-EFAULT), \ + "0" (err) \ + : "memory" \ + ); \ +} while (0) +#else +#define __put_user_asm(x, addr, err, insn) \ +do { \ + __asm__ __volatile__ ( \ + "mov." insn " %0, %1\n\t" \ + : /* no outputs */ \ + : "r" (x), "m" (__m(addr)) \ + : "memory" \ + ); \ +} while (0) +#endif /* CONFIG_MMU */ #if defined(CONFIG_CPU_LITTLE_ENDIAN) #define __put_user_u64(val,addr,retval) \ @@ -235,40 +170,7 @@ __asm__ __volatile__( \ extern void __put_user_unknown(void); -/* Generic arbitrary sized copy. */ -/* Return the number of bytes NOT copied */ -__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); - - -static __always_inline unsigned long -__copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return __copy_user(to, (__force void *)from, n); -} - -static __always_inline unsigned long __must_check -__copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return __copy_user((__force void *)to, from, n); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -/* - * Clear the area and return remaining number of bytes - * (on failure. Usually it's 0.) - */ -extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size); - -#define clear_user(addr,n) ({ \ -void * __cl_addr = (addr); \ -unsigned long __cl_size = (n); \ -if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \ -__cl_size = __clear_user(__cl_addr, __cl_size); \ -__cl_size; }) - -static __inline__ int +static inline int __strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) { __kernel_size_t res; @@ -307,37 +209,11 @@ __strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __coun return res; } -/** - * strncpy_from_user: - Copy a NUL terminated string from userspace. - * @dst: Destination address, in kernel space. This buffer must be at - * least @count bytes long. - * @src: Source address, in user space. - * @count: Maximum number of bytes to copy, including the trailing NUL. - * - * Copies a NUL-terminated string from userspace to kernel space. - * - * On success, returns the length of the string (not including the trailing - * NUL). - * - * If access to userspace fails, returns -EFAULT (some data may have been - * copied). - * - * If @count is smaller than the length of the string, copies @count bytes - * and returns @count. - */ -#define strncpy_from_user(dest,src,count) ({ \ -unsigned long __sfu_src = (unsigned long) (src); \ -int __sfu_count = (int) (count); \ -long __sfu_res = -EFAULT; \ -if(__access_ok(__sfu_src, __sfu_count)) { \ -__sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \ -} __sfu_res; }) - /* * Return the size of a string (including the ending 0 even when we have * exceeded the maximum string length). */ -static __inline__ long __strnlen_user(const char __user *__s, long __n) +static inline long __strnlen_user(const char __user *__s, long __n) { unsigned long res; unsigned long __dummy; @@ -369,61 +245,4 @@ static __inline__ long __strnlen_user(const char __user *__s, long __n) return res; } -/** - * strnlen_user: - Get the size of a string in user space. - * @s: The string to measure. - * @n: The maximum valid length - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * If the string is too long, returns a value greater than @n. - */ -static __inline__ long strnlen_user(const char __user *s, long n) -{ - if (!__addr_ok(s)) - return 0; - else - return __strnlen_user(s, n); -} - -/** - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * - * If there is a limit on the length of a valid string, you may wish to - * consider using strnlen_user() instead. - */ -#define strlen_user(str) strnlen_user(str, ~0UL >> 1) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -extern int fixup_exception(struct pt_regs *regs); - #endif /* __ASM_SH_UACCESS_32_H */ diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h index 5833754..81b3d51 100644 --- a/include/asm-sh/uaccess_64.h +++ b/include/asm-sh/uaccess_64.h @@ -20,68 +20,6 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define __addr_ok(addr) ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) - -/* - * Uhhuh, this needs 33-bit arithmetic. We have a carry.. - * - * sum := addr + size; carry? --> flag = true; - * if (sum >= addr_limit) flag = true; - */ -#define __range_ok(addr,size) (((unsigned long) (addr) + (size) < (current_thread_info()->addr_limit.seg)) ? 0 : 1) - -#define access_ok(type,addr,size) (__range_ok(addr,size) == 0) -#define __access_ok(addr,size) (__range_ok(addr,size) == 0) - -/* - * Uh, these should become the main single-value transfer routines ... - * They automatically use the right size if we just have the right - * pointer type ... - * - * As MIPS uses the same address space for kernel and user data, we - * can just do these as direct assignments. - * - * Careful to not - * (a) re-use the arguments for side effects (sizeof is ok) - * (b) require any knowledge of processes at this stage - */ -#define put_user(x,ptr) __put_user_check((x),(ptr),sizeof(*(ptr))) -#define get_user(x,ptr) __get_user_check((x),(ptr),sizeof(*(ptr))) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the user has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr))) - -/* - * The "xxx_ret" versions return constant specified in third argument, if - * something bad happens. These macros can be optimized for the - * case of just returning from the function xxx_ret is used. - */ - -#define put_user_ret(x,ptr,ret) ({ \ -if (put_user(x,ptr)) return ret; }) - -#define get_user_ret(x,ptr,ret) ({ \ -if (get_user(x,ptr)) return ret; }) - -#define __put_user_ret(x,ptr,ret) ({ \ -if (__put_user(x,ptr)) return ret; }) - -#define __get_user_ret(x,ptr,ret) ({ \ -if (__get_user(x,ptr)) return ret; }) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) (*(struct __large_struct *)(x)) #define __get_user_size(x,ptr,size,retval) \ do { \ @@ -105,26 +43,6 @@ do { \ } \ } while (0) -#define __get_user_nocheck(x,ptr,size) \ -({ \ - long __gu_err, __gu_val; \ - __get_user_size((void *)&__gu_val, (long)(ptr), \ - (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x,ptr,size) \ -({ \ - long __gu_addr = (long)(ptr); \ - long __gu_err = -EFAULT, __gu_val; \ - if (__access_ok(__gu_addr, (size))) \ - __get_user_size((void *)&__gu_val, __gu_addr, \ - (size), __gu_err); \ - (x) = (__typeof__(*(ptr))) __gu_val; \ - __gu_err; \ -}) - extern long __get_user_asm_b(void *, long); extern long __get_user_asm_w(void *, long); extern long __get_user_asm_l(void *, long); @@ -152,115 +70,10 @@ do { \ } \ } while (0) -#define __put_user_nocheck(x,ptr,size) \ -({ \ - long __pu_err; \ - __typeof__(*(ptr)) __pu_val = (x); \ - __put_user_size((void *)&__pu_val, (long)(ptr), (size), __pu_err); \ - __pu_err; \ -}) - -#define __put_user_check(x,ptr,size) \ -({ \ - long __pu_err = -EFAULT; \ - long __pu_addr = (long)(ptr); \ - __typeof__(*(ptr)) __pu_val = (x); \ - \ - if (__access_ok(__pu_addr, (size))) \ - __put_user_size((void *)&__pu_val, __pu_addr, (size), __pu_err);\ - __pu_err; \ -}) - extern long __put_user_asm_b(void *, long); extern long __put_user_asm_w(void *, long); extern long __put_user_asm_l(void *, long); extern long __put_user_asm_q(void *, long); extern void __put_user_unknown(void); - -/* Generic arbitrary sized copy. */ -/* Return the number of bytes NOT copied */ -/* XXX: should be such that: 4byte and the rest. */ -extern __kernel_size_t __copy_user(void *__to, const void *__from, __kernel_size_t __n); - -#define copy_to_user_ret(to,from,n,retval) ({ \ -if (copy_to_user(to,from,n)) \ - return retval; \ -}) - -#define __copy_to_user(to,from,n) \ - __copy_user((void *)(to), \ - (void *)(from), n) - -#define __copy_to_user_ret(to,from,n,retval) ({ \ -if (__copy_to_user(to,from,n)) \ - return retval; \ -}) - -#define copy_from_user_ret(to,from,n,retval) ({ \ -if (copy_from_user(to,from,n)) \ - return retval; \ -}) - -#define __copy_from_user(to,from,n) \ - __copy_user((void *)(to), \ - (void *)(from), n) - -#define __copy_from_user_ret(to,from,n,retval) ({ \ -if (__copy_from_user(to,from,n)) \ - return retval; \ -}) - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -/* XXX: Not sure it works well.. - should be such that: 4byte clear and the rest. */ -extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size); - -#define clear_user(addr,n) ({ \ -void * __cl_addr = (addr); \ -unsigned long __cl_size = (n); \ -if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \ -__cl_size = __clear_user(__cl_addr, __cl_size); \ -__cl_size; }) - -extern int __strncpy_from_user(unsigned long __dest, unsigned long __src, int __count); - -#define strncpy_from_user(dest,src,count) ({ \ -unsigned long __sfu_src = (unsigned long) (src); \ -int __sfu_count = (int) (count); \ -long __sfu_res = -EFAULT; \ -if(__access_ok(__sfu_src, __sfu_count)) { \ -__sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \ -} __sfu_res; }) - -#define strlen_user(str) strnlen_user(str, ~0UL >> 1) - -/* - * Return the size of a string (including the ending 0!) - */ -extern long __strnlen_user(const char *__s, long __n); - -static inline long strnlen_user(const char *s, long n) -{ - if (!__addr_ok(s)) - return 0; - else - return __strnlen_user(s, n); -} - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -#ifdef CONFIG_MMU -#define ARCH_HAS_SEARCH_EXTABLE -#endif - -/* Returns 0 if exception not found and fixup.unit otherwise. */ -extern unsigned long search_exception_table(unsigned long addr); -extern const struct exception_table_entry *search_exception_tables (unsigned long addr); - #endif /* __ASM_SH_UACCESS_64_H */ -- cgit v1.1 From 4cec1a37ba7d9dce6ed5d8259b95272100a98b1f Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 6 Jun 2008 17:04:56 +0900 Subject: sh: Renesas Solutions SH7763RDP board support This patch adds basic support for the SH7763RDP board. This supports a basic stuff provided in SH7763, like SCIF, NOR Flash and USB host. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- include/asm-sh/sh7763rdp.h | 54 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 include/asm-sh/sh7763rdp.h (limited to 'include') diff --git a/include/asm-sh/sh7763rdp.h b/include/asm-sh/sh7763rdp.h new file mode 100644 index 0000000..8750cc8 --- /dev/null +++ b/include/asm-sh/sh7763rdp.h @@ -0,0 +1,54 @@ +#ifndef __ASM_SH_SH7763RDP_H +#define __ASM_SH_SH7763RDP_H + +/* + * linux/include/asm-sh/sh7763drp.h + * + * Copyright (C) 2008 Renesas Solutions + * Copyright (C) 2008 Nobuhiro Iwamatsu + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + */ +#include + +/* clock control */ +#define MSTPCR1 0xFFC80038 + +/* PORT */ +#define PORT_PSEL0 0xFFEF0070 +#define PORT_PSEL1 0xFFEF0072 +#define PORT_PSEL2 0xFFEF0074 +#define PORT_PSEL3 0xFFEF0076 +#define PORT_PSEL4 0xFFEF0078 + +#define PORT_PACR 0xFFEF0000 +#define PORT_PCCR 0xFFEF0004 +#define PORT_PFCR 0xFFEF000A +#define PORT_PGCR 0xFFEF000C +#define PORT_PHCR 0xFFEF000E +#define PORT_PICR 0xFFEF0010 +#define PORT_PJCR 0xFFEF0012 +#define PORT_PKCR 0xFFEF0014 +#define PORT_PLCR 0xFFEF0016 +#define PORT_PMCR 0xFFEF0018 +#define PORT_PNCR 0xFFEF001A + +/* FPGA */ +#define CPLD_BOARD_ID_ERV_REG 0xB1000000 +#define CPLD_CPLD_CMD_REG 0xB1000006 + +/* + * USB SH7763RDP board can use Host only. + */ +#define USB_USBHSC 0xFFEC80f0 + +/* arch/sh/boards/renesas/sh7763rdp/irq.c */ +void init_sh7763rdp_IRQ(void); +int sh7763rdp_irq_demux(int irq); +#define __IO_PREFIX sh7763rdp +#include + +#endif /* __ASM_SH_SH7763RDP_H */ -- cgit v1.1 From 306cfd630a4d121cf4e08b894d8b4c4cf106e57e Mon Sep 17 00:00:00 2001 From: Adrian McMenamin Date: Sun, 15 Jun 2008 20:48:09 +0100 Subject: maple: tidy maple_driver code by removing redundant connect/disconnect The connect and disconnect functions are unnecessary - everything they do can be accomplished in the initial probe - so remove them. Signed-off-by: Adrian McMenamin Signed-off-by: Paul Mundt --- include/linux/maple.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/maple.h b/include/linux/maple.h index d31e36e..523a286 100644 --- a/include/linux/maple.h +++ b/include/linux/maple.h @@ -61,8 +61,6 @@ struct maple_device { struct maple_driver { unsigned long function; - int (*connect) (struct maple_device * dev); - void (*disconnect) (struct maple_device * dev); struct device_driver drv; }; -- cgit v1.1 From 4c1cfab1e0f9a41246cfdcca78f3700fb67f0a5c Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Wed, 18 Jun 2008 03:36:50 +0300 Subject: sh/kernel/ cleanups This patch contains the following cleanups: - make the following needlessly global code static: - cf-enabler.c: cf_init() - cpu/clock.c: __clk_enable() - cpu/clock.c: __clk_disable() - process_32.c: default_idle() - time_32.c: struct clocksource_sh - timers/timer-tmu.c: struct tmu_timer_ops - remove the following unused functions (no CONFIG_BLK_DEV_FD on sh): - process_{32,64}.c: disable_hlt() - process_{32,64}.c: enable_hlt() Signed-off-by: Adrian Bunk Signed-off-by: Paul Mundt --- include/asm-sh/clock.h | 3 --- include/asm-sh/system.h | 8 -------- include/asm-sh/timer.h | 1 - 3 files changed, 12 deletions(-) (limited to 'include') diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index b550a27..608fda5 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -41,9 +41,6 @@ void arch_init_clk_ops(struct clk_ops **, int type); /* arch/sh/kernel/cpu/clock.c */ int clk_init(void); -int __clk_enable(struct clk *); -void __clk_disable(struct clk *); - void clk_recalc_rate(struct clk *); int clk_register(struct clk *); diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index e65b6b8..056d68c 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -148,14 +148,6 @@ extern unsigned long cached_to_uncached; extern struct dentry *sh_debugfs_root; -/* XXX - * disable hlt during certain critical i/o operations - */ -#define HAVE_DISABLE_HLT -void disable_hlt(void); -void enable_hlt(void); - -void default_idle(void); void per_cpu_trap_init(void); asmlinkage void break_point_trap(void); diff --git a/include/asm-sh/timer.h b/include/asm-sh/timer.h index 701ba84..327f7eb 100644 --- a/include/asm-sh/timer.h +++ b/include/asm-sh/timer.h @@ -40,6 +40,5 @@ struct sys_timer *get_sys_timer(void); /* arch/sh/kernel/time.c */ void handle_timer_tick(void); extern unsigned long sh_hpt_frequency; -extern struct clocksource clocksource_sh; #endif /* __ASM_SH_TIMER_H */ -- cgit v1.1 From ffb91ad2751723bcc9925cd38e37013e2169e256 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 18 Jun 2008 18:29:06 +0900 Subject: sh: Solution Enginge 7710/7712 SH-Ether support Add support SH-Ether for Hitachi Solution Engine. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- include/asm-sh/se.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h index bd2596c..0e2f720 100644 --- a/include/asm-sh/se.h +++ b/include/asm-sh/se.h @@ -76,6 +76,21 @@ #define IRQ_CFCARD 7 #endif +/* SH Ether support (SH7710/SH7712) */ +/* Base address */ +#define SH_ETH0_BASE 0xA7000000 +#define SH_ETH1_BASE 0xA7000400 +/* PHY ID */ +#if defined(CONFIG_CPU_SUBTYPE_SH7710) +# define PHY_ID 0x00 +#elif defined(CONFIG_CPU_SUBTYPE_SH7712) +# define PHY_ID 0x01 +#endif +/* Ether IRQ */ +#define SH_ETH0_IRQ 80 +#define SH_ETH1_IRQ 81 +#define SH_TSU_IRQ 82 + #define __IO_PREFIX se #include -- cgit v1.1 From 787d9d7e89c3952db12d9e4bb02ba5c5a85f6b7f Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Wed, 18 Jun 2008 18:32:03 +0900 Subject: sh: Clean up code of Solution Engine 770x Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- include/asm-sh/se.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h index 0e2f720..eb23000 100644 --- a/include/asm-sh/se.h +++ b/include/asm-sh/se.h @@ -91,6 +91,8 @@ #define SH_ETH1_IRQ 81 #define SH_TSU_IRQ 82 +void init_se_IRQ(void); + #define __IO_PREFIX se #include -- cgit v1.1 From 3611ee7acc113e5e482b7d20d5133935226f3129 Mon Sep 17 00:00:00 2001 From: Stuart Menefy Date: Wed, 2 Jul 2008 15:15:09 +0900 Subject: sh: Stub in silicon cut in CPU info. Signed-off-by: Stuart Menefy Signed-off-by: Paul Mundt --- include/asm-sh/processor_32.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h index 81628f1..c6583f2 100644 --- a/include/asm-sh/processor_32.h +++ b/include/asm-sh/processor_32.h @@ -28,6 +28,7 @@ struct sh_cpuinfo { unsigned int type; + int cut_major, cut_minor; unsigned long loops_per_jiffy; unsigned long asid_cache; -- cgit v1.1 From 09b5a10c1944214a6008712bfa92b29f00b84a1a Mon Sep 17 00:00:00 2001 From: Chris Smith Date: Wed, 2 Jul 2008 15:17:11 +0900 Subject: sh: Optimized flush_icache_range() implementation. Add implementation of flush_icache_range() suitable for signal handler and kprobes. Remove flush_cache_sigtramp() and change signal.c to use flush_icache_range(). Signed-off-by: Chris Smith Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/cacheflush.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h index 5fd5c89..065306d 100644 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ b/include/asm-sh/cpu-sh4/cacheflush.h @@ -30,7 +30,6 @@ void flush_dcache_page(struct page *pg); #define flush_dcache_mmap_unlock(mapping) do { } while (0) void flush_icache_range(unsigned long start, unsigned long end); -void flush_cache_sigtramp(unsigned long addr); void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, unsigned long addr, int len); -- cgit v1.1 From 6bdfb22a8e1ffa37ae4ad35b87cb02958d1901e5 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Fri, 4 Jul 2008 12:37:12 +0900 Subject: sh: add interrupt ack code to sh4a This patch is based on interrupt acknowledge code for external interrupt sources on sh3 processors and adds on sh4a processors. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 7438d1e..d557b00 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -79,7 +79,7 @@ struct intc_desc { struct intc_sense_reg *sense_regs; unsigned int nr_sense_regs; char *name; -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) struct intc_mask_reg *ack_regs; unsigned int nr_ack_regs; #endif @@ -95,7 +95,7 @@ struct intc_desc symbol __initdata = { \ chipname, \ } -#ifdef CONFIG_CPU_SH3 +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ mask_regs, prio_regs, sense_regs, ack_regs) \ struct intc_desc symbol __initdata = { \ -- cgit v1.1 From a4e1d08491b06b17eb77c92caacd40b330ca8146 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Jul 2008 21:11:51 +0900 Subject: sh: update sh7343 code updated the following codes for SH7343: - add register_intc_controller() - add EARLY_SCIF_CONSOLE_PORT - add define of CPG register Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/freq.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index da46e67..a898105 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -12,6 +12,7 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ defined(CONFIG_CPU_SUBTYPE_SH7723) || \ + defined(CONFIG_CPU_SUBTYPE_SH7343) || \ defined(CONFIG_CPU_SUBTYPE_SH7366) #define FRQCR 0xa4150000 #define VCLKCR 0xa4150004 -- cgit v1.1 From cafd63b0076b78bc8f114abbeb724c7e5f5bfe5d Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Mon, 7 Jul 2008 21:11:54 +0900 Subject: sh: update Solution Engine 7343 updated the following codes for Solution Endine 7343: - fix compile error in arch/sh/boards/se/7343/irq.c - add nor flash physmaps - update defconfig Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- include/asm-sh/se7343.h | 97 ++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 84 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h index e7914a5..8d2af77 100644 --- a/include/asm-sh/se7343.h +++ b/include/asm-sh/se7343.h @@ -59,24 +59,95 @@ #define PA_LCD1 0xb8000000 #define PA_LCD2 0xb8800000 +#define PORT_PACR 0xA4050100 +#define PORT_PBCR 0xA4050102 +#define PORT_PCCR 0xA4050104 +#define PORT_PDCR 0xA4050106 +#define PORT_PECR 0xA4050108 +#define PORT_PFCR 0xA405010A +#define PORT_PGCR 0xA405010C +#define PORT_PHCR 0xA405010E +#define PORT_PJCR 0xA4050110 +#define PORT_PKCR 0xA4050112 +#define PORT_PLCR 0xA4050114 +#define PORT_PMCR 0xA4050116 +#define PORT_PNCR 0xA4050118 +#define PORT_PQCR 0xA405011A +#define PORT_PRCR 0xA405011C +#define PORT_PSCR 0xA405011E +#define PORT_PTCR 0xA4050140 +#define PORT_PUCR 0xA4050142 +#define PORT_PVCR 0xA4050144 +#define PORT_PWCR 0xA4050146 +#define PORT_PYCR 0xA4050148 +#define PORT_PZCR 0xA405014A + +#define PORT_PSELA 0xA405014C +#define PORT_PSELB 0xA405014E +#define PORT_PSELC 0xA4050150 +#define PORT_PSELD 0xA4050152 +#define PORT_PSELE 0xA4050154 + +#define PORT_HIZCRA 0xA4050156 +#define PORT_HIZCRB 0xA4050158 +#define PORT_HIZCRC 0xA405015C + +#define PORT_DRVCR 0xA4050180 + +#define PORT_PADR 0xA4050120 +#define PORT_PBDR 0xA4050122 +#define PORT_PCDR 0xA4050124 +#define PORT_PDDR 0xA4050126 +#define PORT_PEDR 0xA4050128 +#define PORT_PFDR 0xA405012A +#define PORT_PGDR 0xA405012C +#define PORT_PHDR 0xA405012E +#define PORT_PJDR 0xA4050130 +#define PORT_PKDR 0xA4050132 +#define PORT_PLDR 0xA4050134 +#define PORT_PMDR 0xA4050136 +#define PORT_PNDR 0xA4050138 +#define PORT_PQDR 0xA405013A +#define PORT_PRDR 0xA405013C +#define PORT_PTDR 0xA4050160 +#define PORT_PUDR 0xA4050162 +#define PORT_PVDR 0xA4050164 +#define PORT_PWDR 0xA4050166 +#define PORT_PYDR 0xA4050168 + +#define MSTPCR0 0xA4150030 +#define MSTPCR1 0xA4150034 +#define MSTPCR2 0xA4150038 + +#define FPGA_IN 0xb1400000 +#define FPGA_OUT 0xb1400002 + #define __IO_PREFIX sh7343se #include -/* External Multiplexed interrupts */ -#define PC_IRQ0 OFFCHIP_IRQ_BASE -#define PC_IRQ1 (PC_IRQ0 + 1) -#define PC_IRQ2 (PC_IRQ1 + 1) -#define PC_IRQ3 (PC_IRQ2 + 1) +#define IRQ0_IRQ 32 +#define IRQ1_IRQ 33 +#define IRQ4_IRQ 36 +#define IRQ5_IRQ 37 + +#define SE7343_FPGA_IRQ_MRSHPC0 0 +#define SE7343_FPGA_IRQ_MRSHPC1 1 +#define SE7343_FPGA_IRQ_MRSHPC2 2 +#define SE7343_FPGA_IRQ_MRSHPC3 3 +#define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ +#define SE7343_FPGA_IRQ_USB 8 -#define EXT_IRQ0 (PC_IRQ3 + 1) -#define EXT_IRQ1 (EXT_IRQ0 + 1) -#define EXT_IRQ2 (EXT_IRQ1 + 1) -#define EXT_IRQ3 (EXT_IRQ2 + 1) +#define SE7343_FPGA_IRQ_NR 11 +#define SE7343_FPGA_IRQ_BASE 120 -#define USB_IRQ0 (EXT_IRQ3 + 1) -#define USB_IRQ1 (USB_IRQ0 + 1) +#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) +#define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2) +#define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1) +#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) +#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) +#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) -#define UART_IRQ0 (USB_IRQ1 + 1) -#define UART_IRQ1 (UART_IRQ0 + 1) +/* arch/sh/boards/se/7343/irq.c */ +void init_7343se_IRQ(void); #endif /* __ASM_SH_HITACHI_SE7343_H */ -- cgit v1.1 From 1eca5c92729a83f64826d15a9ecb1652dda54bcb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 16 Jul 2008 19:02:54 +0900 Subject: sh: Add memory chunks to SH-Mobile UIO devices This patch adds physically contiguous memory chunks to the UIO devices. The same strategy can be used in the future for the CEU as well. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/device.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-sh/device.h b/include/asm-sh/device.h index d8f9872..efd511d 100644 --- a/include/asm-sh/device.h +++ b/include/asm-sh/device.h @@ -5,3 +5,8 @@ */ #include +struct platform_device; +/* allocate contiguous memory chunk and fill in struct resource */ +int platform_resource_setup_memory(struct platform_device *pdev, + char *name, unsigned long memsize); + -- cgit v1.1 From cbe9da029d9cc4fff59d559789885079a84a0af8 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 16 Jul 2008 20:21:09 +0900 Subject: sh: Renesas R0P7785LC0011RL board support This adds initial support for the Renesas R0P7785LC0011RL board. This patch supports 29bit address mode only. Signed-off-by: Yoshihiro Shimoda Signed-off-by: Paul Mundt --- include/asm-sh/sh7785lcr.h | 55 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/asm-sh/sh7785lcr.h (limited to 'include') diff --git a/include/asm-sh/sh7785lcr.h b/include/asm-sh/sh7785lcr.h new file mode 100644 index 0000000..1ce27d5 --- /dev/null +++ b/include/asm-sh/sh7785lcr.h @@ -0,0 +1,55 @@ +#ifndef __ASM_SH_RENESAS_SH7785LCR_H +#define __ASM_SH_RENESAS_SH7785LCR_H + +/* + * This board has 2 physical memory maps. + * It can be changed with DIP switch(S2-5). + * + * phys address | S2-5 = OFF | S2-5 = ON + * -----------------------------+---------------+--------------- + * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash + * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD + * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C + * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM + * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM + * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 + * 0x14000000 - 0x17ffffff(CS5) | I2C | USB + * 0x18000000 - 0x1bffffff(CS6) | reserved | SD + * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) + * + */ + +#define NOR_FLASH_ADDR 0x00000000 +#define NOR_FLASH_SIZE 0x04000000 + +#define PLD_BASE_ADDR 0x04000000 +#define PLD_PCICR (PLD_BASE_ADDR + 0x00) +#define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02) +#define PLD_LOCALCR (PLD_BASE_ADDR + 0x04) +#define PLD_POFCR (PLD_BASE_ADDR + 0x06) +#define PLD_LEDCR (PLD_BASE_ADDR + 0x08) +#define PLD_SWSR (PLD_BASE_ADDR + 0x0a) +#define PLD_VERSR (PLD_BASE_ADDR + 0x0c) +#define PLD_MMSR (PLD_BASE_ADDR + 0x0e) + +#define SM107_MEM_ADDR 0x10000000 +#define SM107_MEM_SIZE 0x00e00000 +#define SM107_REG_ADDR 0x13e00000 +#define SM107_REG_SIZE 0x00200000 + +#if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) +#define R8A66597_ADDR 0x14000000 /* USB */ +#define CG200_ADDR 0x18000000 /* SD */ +#define PCA9564_ADDR 0x06000000 /* I2C */ +#else +#define R8A66597_ADDR 0x08000000 +#define CG200_ADDR 0x0c000000 +#define PCA9564_ADDR 0x14000000 +#endif + +#define R8A66597_SIZE 0x00000100 +#define CG200_SIZE 0x00010000 +#define PCA9564_SIZE 0x00000100 + +#endif /* __ASM_SH_RENESAS_SH7785LCR_H */ + -- cgit v1.1 From 5c8f9d94fea98596db255a579f5d02a0195abda7 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Jul 2008 18:48:57 +0900 Subject: sh: Add arch_flags to struct clk Add arch_flags to struct clk so we can keep per-clock private data somewhere and share code between multiple clocks. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/clock.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index 608fda5..252f155 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -30,6 +30,7 @@ struct clk { unsigned long rate; unsigned long flags; + unsigned long arch_flags; }; #define CLK_ALWAYS_ENABLED (1 << 0) -- cgit v1.1 From aea167cbb5c9056295109e5e171d27e30e2be5bc Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Jul 2008 18:56:15 +0900 Subject: sh: Add SuperH Mobile MSTPCR bits to clock framework Handle module stop clock bits in MSTPCRn through the clock framework. The clocks are named after the bits in the data sheet. The association between bit number and hardware block is processor specific. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh4/freq.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index a898105..c23af81 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -19,6 +19,9 @@ #define SCLKACR 0xa4150008 #define SCLKBCR 0xa415000c #define IrDACLKCR 0xa4150010 +#define MSTPCR0 0xa4150030 +#define MSTPCR1 0xa4150034 +#define MSTPCR2 0xa4150038 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ defined(CONFIG_CPU_SUBTYPE_SH7780) #define FRQCR 0xffc80000 -- cgit v1.1 From de9254263b8c8b1809520a1009dd516e41976519 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Jul 2008 19:09:51 +0900 Subject: sh: Introduce clk_always_enable() function Add SuperH specific funcion clk_always_enable(), useful to enable MSTPCR bits in processor or board specific code. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/clock.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h index 252f155..720dfab 100644 --- a/include/asm-sh/clock.h +++ b/include/asm-sh/clock.h @@ -5,6 +5,7 @@ #include #include #include +#include struct clk; @@ -47,6 +48,22 @@ void clk_recalc_rate(struct clk *); int clk_register(struct clk *); void clk_unregister(struct clk *); +static inline int clk_always_enable(const char *id) +{ + struct clk *clk; + int ret; + + clk = clk_get(NULL, id); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + ret = clk_enable(clk); + if (ret) + clk_put(clk); + + return ret; +} + /* the exported API, in addition to clk_set_rate */ /** * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter -- cgit v1.1 From 6c7d826cf6ff05264f9af04410aee82a08edfb9f Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Jul 2008 19:16:11 +0900 Subject: sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722 Use clk_always_enable() on the sh7722 processor and in the board code for Migo-R and Solution Engine 7722. Remove duplicate MSTPCR register definitions. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/migor.h | 4 ---- include/asm-sh/se7722.h | 4 ---- 2 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h index 2329363..4c409a6 100644 --- a/include/asm-sh/migor.h +++ b/include/asm-sh/migor.h @@ -16,10 +16,6 @@ #include /* GPIO */ -#define MSTPCR0 0xa4150030 -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 - #define PORT_PACR 0xa4050100 #define PORT_PDCR 0xa4050106 #define PORT_PECR 0xa4050108 diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h index 3690fe5..e971d9a 100644 --- a/include/asm-sh/se7722.h +++ b/include/asm-sh/se7722.h @@ -55,10 +55,6 @@ #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ /* GPIO */ -#define MSTPCR0 0xA4150030UL -#define MSTPCR1 0xA4150034UL -#define MSTPCR2 0xA4150038UL - #define FPGA_IN 0xb1840000UL #define FPGA_OUT 0xb1840004UL -- cgit v1.1 From 8fa509ab915f668093c270151f884220232bfb25 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 17 Jul 2008 19:18:24 +0900 Subject: sh: Use clk_always_enable() on sh7343 / SE77343 Use clk_always_enable() on the sh7343 processor and in the board code for Solution Engine 7343. Remove duplicate MSTPCR register definitions. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/se7343.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h index 8d2af77..9845846 100644 --- a/include/asm-sh/se7343.h +++ b/include/asm-sh/se7343.h @@ -115,10 +115,6 @@ #define PORT_PWDR 0xA4050166 #define PORT_PYDR 0xA4050168 -#define MSTPCR0 0xA4150030 -#define MSTPCR1 0xA4150034 -#define MSTPCR2 0xA4150038 - #define FPGA_IN 0xb1400000 #define FPGA_OUT 0xb1400002 -- cgit v1.1 From 44f95989525c48f6c79fe1c6ad07860765f987cd Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 28 Jul 2008 18:34:45 +0900 Subject: sh: Wire up new syscalls. This wires up the signalfd4, eventfd2, epoll_create1, dup3, pipe2, and inotify_init1 syscalls. Signed-off-by: Paul Mundt --- include/asm-sh/unistd_32.h | 8 +++++++- include/asm-sh/unistd_64.h | 8 +++++++- 2 files changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-sh/unistd_32.h b/include/asm-sh/unistd_32.h index 0b07212..d52c000 100644 --- a/include/asm-sh/unistd_32.h +++ b/include/asm-sh/unistd_32.h @@ -335,8 +335,14 @@ #define __NR_fallocate 324 #define __NR_timerfd_settime 325 #define __NR_timerfd_gettime 326 +#define __NR_signalfd4 327 +#define __NR_eventfd2 328 +#define __NR_epoll_create1 329 +#define __NR_dup3 330 +#define __NR_pipe2 331 +#define __NR_inotify_init1 332 -#define NR_syscalls 327 +#define NR_syscalls 333 #ifdef __KERNEL__ diff --git a/include/asm-sh/unistd_64.h b/include/asm-sh/unistd_64.h index 9d21eab..7c54e91 100644 --- a/include/asm-sh/unistd_64.h +++ b/include/asm-sh/unistd_64.h @@ -375,10 +375,16 @@ #define __NR_fallocate 352 #define __NR_timerfd_settime 353 #define __NR_timerfd_gettime 354 +#define __NR_signalfd4 355 +#define __NR_eventfd2 356 +#define __NR_epoll_create1 357 +#define __NR_dup3 358 +#define __NR_pipe2 359 +#define __NR_inotify_init1 360 #ifdef __KERNEL__ -#define NR_syscalls 353 +#define NR_syscalls 361 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR -- cgit v1.1 From 2b4b2bb42137c779ef0084de5df66ff21b4cd86e Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Mon, 28 Jul 2008 18:36:13 +0900 Subject: sh: Workaround for __put_user_asm() bug with gcc 4.x on big-endian. I think this problem is GCC(4.1.2) bug. Syscall "getdents" returned "dirent->d_off" is always 0. I think other EB enviroment have same problem. Problem code 0c03c954 : : c03c97a: 58 f7 mov.l @(28,r15),r8 !-> offset (high) c03c97c: 59 f8 mov.l @(32,r15),r9 !-> offset (low) c03c97e: 53 f9 mov.l @(36,r15),r3 c03c980: 54 fa mov.l @(40,r15),r4 : c03c9a0: 21 82 mov.l r8,@r1 !offset(high) -> dirent->d_off It's workaround patch. Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt --- include/asm-sh/uaccess_32.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h index ae0d24f..892fd6d 100644 --- a/include/asm-sh/uaccess_32.h +++ b/include/asm-sh/uaccess_32.h @@ -76,7 +76,8 @@ do { \ __put_user_asm(x, ptr, retval, "w"); \ break; \ case 4: \ - __put_user_asm(x, ptr, retval, "l"); \ + __put_user_asm((u32)x, ptr, \ + retval, "l"); \ break; \ case 8: \ __put_user_u64(x, ptr, retval); \ -- cgit v1.1 From 761656e6beecb38c723f207d7408c753d3103ba8 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 28 Jul 2008 18:39:25 +0900 Subject: sh: Move asid_cache() out of ifdef to fix SH-3/4 nommu build. Signed-off-by: Paul Mundt --- include/asm-sh/mmu_context.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index 87e812f..8589a50 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -27,8 +27,9 @@ /* ASID is 8-bit value, so it can't be 0x100 */ #define MMU_NO_ASID 0x100 -#ifdef CONFIG_MMU #define asid_cache(cpu) (cpu_data[cpu].asid_cache) + +#ifdef CONFIG_MMU #define cpu_context(cpu, mm) ((mm)->context.id[cpu]) #define cpu_asid(cpu, mm) \ -- cgit v1.1 From 8b1285f1c192e7e84ba28cc25eb0e9bcf2dadb17 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 28 Jul 2008 18:47:30 +0900 Subject: sh: Add SuperH Mobile LCDC platform data for Migo-R Add WVGA and QVGA LCD panel support to Migo-R. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/migor.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h index 4c409a6..e9f8e9b 100644 --- a/include/asm-sh/migor.h +++ b/include/asm-sh/migor.h @@ -30,6 +30,7 @@ #define PORT_PYCR 0xa405014a #define PORT_PZCR 0xa405014c #define PORT_PADR 0xa4050120 +#define PORT_PHDR 0xa405012e #define PORT_PWDR 0xa4050166 #define PORT_HIZCRA 0xa4050158 @@ -51,4 +52,9 @@ #define BSC_CS6ABCR 0xfec1001c +#include + +int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops); + #endif /* __ASM_SH_MIGOR_H */ -- cgit v1.1 From 1765534c23596794385f309609c09642f33846e4 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 28 Jul 2008 18:51:01 +0900 Subject: sh: Add SuperH Mobile CEU platform data for Migo-R Add Migo-R specific platform data for on-chip sh7722 CEU and ov772x camera. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/migor.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h index e9f8e9b..10016e0 100644 --- a/include/asm-sh/migor.h +++ b/include/asm-sh/migor.h @@ -25,12 +25,16 @@ #define PORT_PLCR 0xa4050114 #define PORT_PMCR 0xa4050116 #define PORT_PRCR 0xa405011c +#define PORT_PTCR 0xa4050140 +#define PORT_PUCR 0xa4050142 +#define PORT_PVCR 0xa4050144 #define PORT_PWCR 0xa4050146 #define PORT_PXCR 0xa4050148 #define PORT_PYCR 0xa405014a #define PORT_PZCR 0xa405014c #define PORT_PADR 0xa4050120 #define PORT_PHDR 0xa405012e +#define PORT_PTDR 0xa4050160 #define PORT_PWDR 0xa4050166 #define PORT_HIZCRA 0xa4050158 @@ -45,6 +49,7 @@ #define PORT_PSELB 0xa4050150 #define PORT_PSELC 0xa4050152 #define PORT_PSELD 0xa4050154 +#define PORT_PSELE 0xa4050156 #define PORT_HIZCRA 0xa4050158 #define PORT_HIZCRB 0xa405015a -- cgit v1.1 From 399dee2371787825a1845de87c0cbee7b7c30ad6 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 28 Jul 2008 12:04:06 +0100 Subject: i2c: S3C2410: Pass the I2C bus number via drivers platform data Allow the platform data to specify the bus bumber that the new I2C bus will be given. This is to allow the use of the board registration mechanism to specify the new style of I2C device registration which allows boards to provide a list of attached devices. Note, as discussed on the mailing list, we have dropped backwards compatibility of adding an dynamic bus number as it should not affect most boards to have the bus pinned to 0 if they have either not specified platform data for driver. Any board supplying platform data will automatically have the bus_num field set to 0, and anyone who needs the driver on a different bus number can supply platform data to set bus_num. Signed-off-by: Ben Dooks --- include/asm-arm/plat-s3c/iic.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-arm/plat-s3c/iic.h b/include/asm-arm/plat-s3c/iic.h index 71211c8..d08a1f2 100644 --- a/include/asm-arm/plat-s3c/iic.h +++ b/include/asm-arm/plat-s3c/iic.h @@ -21,6 +21,7 @@ */ struct s3c2410_platform_i2c { + int bus_num; /* bus number to use */ unsigned int flags; unsigned int slave_addr; /* slave address for controller */ unsigned long bus_freq; /* standard bus frequency */ -- cgit v1.1 From e193325e3e3de188ae2aa5207adc7129aacc5c9d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Mon, 28 Jul 2008 10:43:22 +0200 Subject: cpm2: Implement GPIO LIB API on CPM2 Freescale SoC. This patch implement GPIO LIB support for the CPM2 GPIOs. The code can also be used for CPM1 GPIO port E, as both cores are compatible at the register level. Based on earlier work by Laurent Pinchart. Signed-off-by: Jochen Friedrich Cc: Laurent Pinchart Signed-off-by: Kumar Gala --- include/asm-powerpc/cpm.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h index 63a5533..24d79e3 100644 --- a/include/asm-powerpc/cpm.h +++ b/include/asm-powerpc/cpm.h @@ -3,6 +3,7 @@ #include #include +#include /* Opcodes common to CPM1 and CPM2 */ @@ -100,4 +101,6 @@ unsigned long cpm_muram_offset(void __iomem *addr); dma_addr_t cpm_muram_dma(void __iomem *addr); int cpm_command(u32 command, u8 opcode); +int cpm2_gpiochip_add32(struct device_node *np); + #endif -- cgit v1.1 From dddb8d311157d054da5441385f681b8cc0e5a94b Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 22 Jul 2008 18:00:43 +0200 Subject: cpm2: Rework baud rate generators configuration to support external clocks. The CPM2 BRG setup functions cpm_setbrg and cpm2_fastbrg don't support external clocks. This patch adds a new exported __cpm2_setbrg function that takes the clock rate and clock source as extra parameters, and moves cpm_setbrg and cpm2_fastbrg to include/asm-powerpc/cpm2.h where they become inline wrappers around __cpm2_setbrg. Signed-off-by: Laurent Pinchart Signed-off-by: Kumar Gala --- include/asm-powerpc/cpm2.h | 46 +++++++++++++++++++++++++++++++++------------- 1 file changed, 33 insertions(+), 13 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h index 2c7fd9c..2a6fa01 100644 --- a/include/asm-powerpc/cpm2.h +++ b/include/asm-powerpc/cpm2.h @@ -12,6 +12,7 @@ #include #include +#include #ifdef CONFIG_PPC_85xx #define CPM_MAP_ADDR (get_immrbase() + 0x80000) @@ -93,10 +94,40 @@ extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */ #define cpm_dpfree cpm_muram_free #define cpm_dpram_addr cpm_muram_addr -extern void cpm_setbrg(uint brg, uint rate); -extern void cpm2_fastbrg(uint brg, uint rate, int div16); extern void cpm2_reset(void); +/* Baud rate generators. +*/ +#define CPM_BRG_RST ((uint)0x00020000) +#define CPM_BRG_EN ((uint)0x00010000) +#define CPM_BRG_EXTC_INT ((uint)0x00000000) +#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000) +#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000) +#define CPM_BRG_ATB ((uint)0x00002000) +#define CPM_BRG_CD_MASK ((uint)0x00001ffe) +#define CPM_BRG_DIV16 ((uint)0x00000001) + +#define CPM2_BRG_INT_CLK (get_brgfreq()) +#define CPM2_BRG_UART_CLK (CPM2_BRG_INT_CLK/16) + +extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src); + +/* This function is used by UARTS, or anything else that uses a 16x + * oversampled clock. + */ +static inline void cpm_setbrg(uint brg, uint rate) +{ + __cpm2_setbrg(brg, rate, CPM2_BRG_UART_CLK, 0, CPM_BRG_EXTC_INT); +} + +/* This function is used to set high speed synchronous baud rate + * clocks. + */ +static inline void cpm2_fastbrg(uint brg, uint rate, int div16) +{ + __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); +} + /* Function code bits, usually generic to devices. */ #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ @@ -195,17 +226,6 @@ typedef struct smc_uart { #define SMCM_TX ((unsigned char)0x02) #define SMCM_RX ((unsigned char)0x01) -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - /* SCCs. */ #define SCC_GSMRH_IRP ((uint)0x00040000) -- cgit v1.1 From 7f71ac9374fec066e428892a68db158946cee1fb Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 28 Jul 2008 18:29:09 +0200 Subject: mfd: Coding style fixes Fix some coding style fixes in the mfd core driver. Signed-off-by: Ben Dooks Signed-off-by: Samuel Ortiz --- include/linux/mfd/core.h | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index bb3dd054..b7cbb99 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -1,5 +1,3 @@ -#ifndef MFD_CORE_H -#define MFD_CORE_H /* * drivers/mfd/mfd-core.h * @@ -13,6 +11,9 @@ * */ +#ifndef MFD_CORE_H +#define MFD_CORE_H + #include /* @@ -38,17 +39,15 @@ struct mfd_cell { const struct resource *resources; }; -static inline struct mfd_cell * -mfd_get_cell(struct platform_device *pdev) +static inline struct mfd_cell *mfd_get_cell(struct platform_device *pdev) { return (struct mfd_cell *)pdev->dev.platform_data; } -extern int mfd_add_devices( - struct platform_device *parent, - const struct mfd_cell *cells, int n_devs, - struct resource *mem_base, - int irq_base); +extern int mfd_add_devices(struct platform_device *parent, + const struct mfd_cell *cells, int n_devs, + struct resource *mem_base, + int irq_base); extern void mfd_remove_devices(struct platform_device *parent); -- cgit v1.1 From e56b3bc7942982ac2589c942fb345e38bc7a341a Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 28 Jul 2008 11:32:33 -0700 Subject: cpu masks: optimize and clean up cpumask_of_cpu() Clean up and optimize cpumask_of_cpu(), by sharing all the zero words. Instead of stupidly generating all possible i=0...NR_CPUS 2^i patterns creating a huge array of constant bitmasks, realize that the zero words can be shared. In other words, on a 64-bit architecture, we only ever need 64 of these arrays - with a different bit set in one single world (with enough zero words around it so that we can create any bitmask by just offsetting in that big array). And then we just put enough zeroes around it that we can point every single cpumask to be one of those things. So when we have 4k CPU's, instead of having 4k arrays (of 4k bits each, with one bit set in each array - 2MB memory total), we have exactly 64 arrays instead, each 8k bits in size (64kB total). And then we just point cpumask(n) to the right position (which we can calculate dynamically). Once we have the right arrays, getting "cpumask(n)" ends up being: static inline const cpumask_t *get_cpu_mask(unsigned int cpu) { const unsigned long *p = cpu_bit_bitmap[1 + cpu % BITS_PER_LONG]; p -= cpu / BITS_PER_LONG; return (const cpumask_t *)p; } This brings other advantages and simplifications as well: - we are not wasting memory that is just filled with a single bit in various different places - we don't need all those games to re-create the arrays in some dense format, because they're already going to be dense enough. if we compile a kernel for up to 4k CPU's, "wasting" that 64kB of memory is a non-issue (especially since by doing this "overlapping" trick we probably get better cache behaviour anyway). [ mingo@elte.hu: Converted Linus's mails into a commit. See: http://lkml.org/lkml/2008/7/27/156 http://lkml.org/lkml/2008/7/28/320 Also applied a family filter - which also has the side-effect of leaving out the bits where Linus calls me an idio... Oh, never mind ;-) ] Signed-off-by: Ingo Molnar Cc: Rusty Russell Cc: Andrew Morton Cc: Al Viro Cc: Mike Travis Signed-off-by: Ingo Molnar --- include/linux/cpumask.h | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index 8fa3b6d..96d0509 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -265,10 +265,30 @@ static inline void __cpus_shift_left(cpumask_t *dstp, bitmap_shift_left(dstp->bits, srcp->bits, n, nbits); } +/* + * Special-case data structure for "single bit set only" constant CPU masks. + * + * We pre-generate all the 64 (or 32) possible bit positions, with enough + * padding to the left and the right, and return the constant pointer + * appropriately offset. + */ +extern const unsigned long + cpu_bit_bitmap[BITS_PER_LONG+1][BITS_TO_LONGS(NR_CPUS)]; + +static inline const cpumask_t *get_cpu_mask(unsigned int cpu) +{ + const unsigned long *p = cpu_bit_bitmap[1 + cpu % BITS_PER_LONG]; + p -= cpu / BITS_PER_LONG; + return (const cpumask_t *)p; +} + +/* + * In cases where we take the address of the cpumask immediately, + * gcc optimizes it out (it's a constant) and there's no huge stack + * variable created: + */ +#define cpumask_of_cpu(cpu) ({ *get_cpu_mask(cpu); }) -/* cpumask_of_cpu_map[] is in kernel/cpu.c */ -extern const cpumask_t *cpumask_of_cpu_map; -#define cpumask_of_cpu(cpu) (cpumask_of_cpu_map[cpu]) #define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS) -- cgit v1.1 From 103340cc36384c1afee4453b65a784d8b20d9d8d Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 28 Jul 2008 22:32:03 +0900 Subject: sh: Fix up unaligned current_text_addr(). As noted by Adrian: Commit 3ab83521378268044a448113c6aa9a9e245f4d2f (kexec jump) causes the following build error on sh: <-- snip --> ... CC kernel/kexec.o {standard input}: Assembler messages: {standard input}:1518: Error: offset to unaligned destination make[2]: *** [kernel/kexec.o] Error 1 <-- snip --> If I understand the assembler correctly it fails at include/asm-sh/kexec.h:59 The issue here is that the mova reference lacks an explicit alignment, and previous code paths would end up with this on a 16-bit boundary, so we make the alignment explicit. Reported-by: Adrian Bunk Signed-off-by: Paul Mundt --- include/asm-sh/processor_32.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h index c6583f2..0dadd75 100644 --- a/include/asm-sh/processor_32.h +++ b/include/asm-sh/processor_32.h @@ -19,7 +19,7 @@ * Default implementation of macro that returns current * instruction pointer ("program counter"). */ -#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; }) +#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) /* Core Processor Version Register */ #define CCN_PVR 0xff000030 -- cgit v1.1 From 5fde244d39b88625ac578d83e6625138714de031 Mon Sep 17 00:00:00 2001 From: Shaohua Li Date: Wed, 23 Jul 2008 10:32:24 +0800 Subject: PCI: disable ASPM per ACPI FADT setting The ACPI FADT table includes an ASPM control bit. If the bit is set, do not enable ASPM since it may indicate that the platform doesn't actually support the feature. Tested-by: Jack Howarth Signed-off-by: Shaohua Li Signed-off-by: Jesse Barnes --- include/acpi/actbl.h | 1 + include/linux/pci-aspm.h | 5 +++++ 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h index 1ebbe88..13a3d9a 100644 --- a/include/acpi/actbl.h +++ b/include/acpi/actbl.h @@ -277,6 +277,7 @@ enum acpi_prefered_pm_profiles { #define BAF_LEGACY_DEVICES 0x0001 #define BAF_8042_KEYBOARD_CONTROLLER 0x0002 #define BAF_MSI_NOT_SUPPORTED 0x0008 +#define BAF_PCIE_ASPM_CONTROL 0x0010 #define FADT2_REVISION_ID 3 #define FADT2_MINUS_REVISION_ID 2 diff --git a/include/linux/pci-aspm.h b/include/linux/pci-aspm.h index a1a1e61..91ba0b3 100644 --- a/include/linux/pci-aspm.h +++ b/include/linux/pci-aspm.h @@ -27,6 +27,7 @@ extern void pcie_aspm_init_link_state(struct pci_dev *pdev); extern void pcie_aspm_exit_link_state(struct pci_dev *pdev); extern void pcie_aspm_pm_state_change(struct pci_dev *pdev); extern void pci_disable_link_state(struct pci_dev *pdev, int state); +extern void pcie_no_aspm(void); #else static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { @@ -40,6 +41,10 @@ static inline void pcie_aspm_pm_state_change(struct pci_dev *pdev) static inline void pci_disable_link_state(struct pci_dev *pdev, int state) { } + +static inline void pcie_no_aspm(void) +{ +} #endif #ifdef CONFIG_PCIEASPM_DEBUG /* this depends on CONFIG_PCIEASPM */ -- cgit v1.1 From 149e16372a2066c5474d8a8db9b252afd57eb427 Mon Sep 17 00:00:00 2001 From: Shaohua Li Date: Wed, 23 Jul 2008 10:32:31 +0800 Subject: PCI: disable ASPM on pre-1.1 PCIe devices Disable ASPM on pre-1.1 PCIe devices, as many of them don't implement it correctly. Tested-by: Jack Howarth Signed-off-by: Shaohua Li Signed-off-by: Jesse Barnes --- include/linux/pci_regs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 19958b9..450684f 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h @@ -374,6 +374,7 @@ #define PCI_EXP_DEVCAP_ATN_BUT 0x1000 /* Attention Button Present */ #define PCI_EXP_DEVCAP_ATN_IND 0x2000 /* Attention Indicator Present */ #define PCI_EXP_DEVCAP_PWR_IND 0x4000 /* Power Indicator Present */ +#define PCI_EXP_DEVCAP_RBER 0x8000 /* Role-Based Error Reporting */ #define PCI_EXP_DEVCAP_PWR_VAL 0x3fc0000 /* Slot Power Limit Value */ #define PCI_EXP_DEVCAP_PWR_SCL 0xc000000 /* Slot Power Limit Scale */ #define PCI_EXP_DEVCTL 8 /* Device Control */ -- cgit v1.1 From 979b1791e5b8f8b556faeec4c48339e7ed63af9f Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Thu, 24 Jul 2008 17:18:38 +0100 Subject: PCI: add D3 power state avoidance quirk Libata has some hacks to deal with certain controllers going silly in D3 state. The right way to handle this is to keep a PCI device flag for such devices. That can then be generalised for no ATA devices with power problems. Signed-off-by: Alan Cox Signed-off-by: Jesse Barnes --- include/linux/pci.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 1d296d3..825be38 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -124,6 +124,8 @@ enum pci_dev_flags { * generation too. */ PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, + /* Device configuration is irrevocably lost if disabled into D3 */ + PCI_DEV_FLAGS_NO_D3 = (__force pci_dev_flags_t) 2, }; typedef unsigned short __bitwise pci_bus_flags_t; -- cgit v1.1 From f15cbe6f1a4b4d9df59142fc8e4abb973302cf44 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 29 Jul 2008 08:09:44 +0900 Subject: sh: migrate to arch/sh/include/ This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg Signed-off-by: Paul Mundt --- include/asm-sh/.gitignore | 3 - include/asm-sh/Kbuild | 8 - include/asm-sh/a.out.h | 20 -- include/asm-sh/adc.h | 13 - include/asm-sh/addrspace.h | 53 ---- include/asm-sh/atomic-grb.h | 169 ----------- include/asm-sh/atomic-irq.h | 71 ----- include/asm-sh/atomic-llsc.h | 107 ------- include/asm-sh/atomic.h | 89 ------ include/asm-sh/auxvec.h | 36 --- include/asm-sh/bitops-grb.h | 169 ----------- include/asm-sh/bitops-irq.h | 91 ------ include/asm-sh/bitops.h | 103 ------- include/asm-sh/bug.h | 79 ------ include/asm-sh/bugs.h | 73 ----- include/asm-sh/byteorder.h | 70 ----- include/asm-sh/cache.h | 51 ---- include/asm-sh/cacheflush.h | 81 ------ include/asm-sh/checksum.h | 5 - include/asm-sh/checksum_32.h | 215 -------------- include/asm-sh/checksum_64.h | 78 ------ include/asm-sh/clock.h | 97 ------- include/asm-sh/cmpxchg-grb.h | 70 ----- include/asm-sh/cmpxchg-irq.h | 40 --- include/asm-sh/cpu-features.h | 25 -- include/asm-sh/cpu-sh2/addrspace.h | 19 -- include/asm-sh/cpu-sh2/cache.h | 41 --- include/asm-sh/cpu-sh2/cacheflush.h | 44 --- include/asm-sh/cpu-sh2/dma.h | 23 -- include/asm-sh/cpu-sh2/freq.h | 18 -- include/asm-sh/cpu-sh2/mmu_context.h | 16 -- include/asm-sh/cpu-sh2/rtc.h | 8 - include/asm-sh/cpu-sh2/sigcontext.h | 17 -- include/asm-sh/cpu-sh2/timer.h | 6 - include/asm-sh/cpu-sh2/ubc.h | 32 --- include/asm-sh/cpu-sh2/watchdog.h | 69 ----- include/asm-sh/cpu-sh2a/addrspace.h | 10 - include/asm-sh/cpu-sh2a/cache.h | 40 --- include/asm-sh/cpu-sh2a/cacheflush.h | 1 - include/asm-sh/cpu-sh2a/dma.h | 1 - include/asm-sh/cpu-sh2a/freq.h | 16 -- include/asm-sh/cpu-sh2a/mmu_context.h | 1 - include/asm-sh/cpu-sh2a/rtc.h | 8 - include/asm-sh/cpu-sh2a/timer.h | 1 - include/asm-sh/cpu-sh2a/ubc.h | 1 - include/asm-sh/cpu-sh2a/watchdog.h | 1 - include/asm-sh/cpu-sh3/adc.h | 28 -- include/asm-sh/cpu-sh3/addrspace.h | 19 -- include/asm-sh/cpu-sh3/cache.h | 43 --- include/asm-sh/cpu-sh3/cacheflush.h | 70 ----- include/asm-sh/cpu-sh3/dac.h | 41 --- include/asm-sh/cpu-sh3/dma.h | 51 ---- include/asm-sh/cpu-sh3/freq.h | 27 -- include/asm-sh/cpu-sh3/gpio.h | 67 ----- include/asm-sh/cpu-sh3/mmu_context.h | 44 --- include/asm-sh/cpu-sh3/rtc.h | 8 - include/asm-sh/cpu-sh3/sigcontext.h | 17 -- include/asm-sh/cpu-sh3/timer.h | 67 ----- include/asm-sh/cpu-sh3/ubc.h | 42 --- include/asm-sh/cpu-sh3/watchdog.h | 25 -- include/asm-sh/cpu-sh4/addrspace.h | 35 --- include/asm-sh/cpu-sh4/cache.h | 42 --- include/asm-sh/cpu-sh4/cacheflush.h | 43 --- include/asm-sh/cpu-sh4/dma-sh7780.h | 39 --- include/asm-sh/cpu-sh4/dma.h | 65 ----- include/asm-sh/cpu-sh4/fpu.h | 32 --- include/asm-sh/cpu-sh4/freq.h | 44 --- include/asm-sh/cpu-sh4/mmu_context.h | 63 ----- include/asm-sh/cpu-sh4/rtc.h | 13 - include/asm-sh/cpu-sh4/sigcontext.h | 24 -- include/asm-sh/cpu-sh4/sq.h | 35 --- include/asm-sh/cpu-sh4/timer.h | 60 ---- include/asm-sh/cpu-sh4/ubc.h | 64 ----- include/asm-sh/cpu-sh4/watchdog.h | 25 -- include/asm-sh/cpu-sh5/addrspace.h | 11 - include/asm-sh/cpu-sh5/cache.h | 97 ------- include/asm-sh/cpu-sh5/cacheflush.h | 33 --- include/asm-sh/cpu-sh5/dma.h | 6 - include/asm-sh/cpu-sh5/irq.h | 117 -------- include/asm-sh/cpu-sh5/mmu_context.h | 21 -- include/asm-sh/cpu-sh5/registers.h | 106 ------- include/asm-sh/cpu-sh5/rtc.h | 8 - include/asm-sh/cpu-sh5/timer.h | 4 - include/asm-sh/cputime.h | 6 - include/asm-sh/current.h | 20 -- include/asm-sh/delay.h | 26 -- include/asm-sh/device.h | 12 - include/asm-sh/div64.h | 1 - include/asm-sh/dma-mapping.h | 192 ------------- include/asm-sh/dma.h | 166 ----------- include/asm-sh/dmabrg.h | 23 -- include/asm-sh/dreamcast/dma.h | 34 --- include/asm-sh/dreamcast/maple.h | 37 --- include/asm-sh/dreamcast/pci.h | 25 -- include/asm-sh/dreamcast/sysasic.h | 43 --- include/asm-sh/edosk7705.h | 30 -- include/asm-sh/elf.h | 244 ---------------- include/asm-sh/emergency-restart.h | 6 - include/asm-sh/entry-macros.S | 33 --- include/asm-sh/errno.h | 6 - include/asm-sh/fb.h | 19 -- include/asm-sh/fcntl.h | 1 - include/asm-sh/fixmap.h | 117 -------- include/asm-sh/flat.h | 24 -- include/asm-sh/fpu.h | 55 ---- include/asm-sh/freq.h | 18 -- include/asm-sh/futex-irq.h | 111 -------- include/asm-sh/futex.h | 77 ----- include/asm-sh/gpio.h | 19 -- include/asm-sh/hardirq.h | 16 -- include/asm-sh/hd64461.h | 250 ----------------- include/asm-sh/hd64465/gpio.h | 46 --- include/asm-sh/hd64465/hd64465.h | 256 ----------------- include/asm-sh/hd64465/io.h | 44 --- include/asm-sh/heartbeat.h | 17 -- include/asm-sh/hp6xx.h | 58 ---- include/asm-sh/hugetlb.h | 92 ------ include/asm-sh/hw_irq.h | 123 -------- include/asm-sh/i2c-sh7760.h | 22 -- include/asm-sh/ilsel.h | 45 --- include/asm-sh/io.h | 366 ------------------------ include/asm-sh/io_generic.h | 49 ---- include/asm-sh/io_trapped.h | 58 ---- include/asm-sh/ioctl.h | 1 - include/asm-sh/ioctls.h | 103 ------- include/asm-sh/ipcbuf.h | 29 -- include/asm-sh/irq.h | 57 ---- include/asm-sh/irq_regs.h | 1 - include/asm-sh/irqflags.h | 34 --- include/asm-sh/irqflags_32.h | 99 ------- include/asm-sh/irqflags_64.h | 85 ------ include/asm-sh/kdebug.h | 9 - include/asm-sh/kexec.h | 62 ----- include/asm-sh/kgdb.h | 69 ----- include/asm-sh/kmap_types.h | 32 --- include/asm-sh/landisk/gio.h | 37 --- include/asm-sh/landisk/iodata_landisk.h | 42 --- include/asm-sh/lboxre2.h | 27 -- include/asm-sh/linkage.h | 7 - include/asm-sh/local.h | 7 - include/asm-sh/machvec.h | 70 ----- include/asm-sh/magicpanelr2.h | 67 ----- include/asm-sh/mc146818rtc.h | 7 - include/asm-sh/microdev.h | 80 ------ include/asm-sh/migor.h | 65 ----- include/asm-sh/mman.h | 17 -- include/asm-sh/mmu.h | 76 ----- include/asm-sh/mmu_context.h | 185 ------------ include/asm-sh/mmu_context_32.h | 47 ---- include/asm-sh/mmu_context_64.h | 78 ------ include/asm-sh/mmzone.h | 48 ---- include/asm-sh/module.h | 44 --- include/asm-sh/msgbuf.h | 31 --- include/asm-sh/mutex.h | 9 - include/asm-sh/page.h | 183 ------------ include/asm-sh/param.h | 22 -- include/asm-sh/parport.h | 16 -- include/asm-sh/pci.h | 144 ---------- include/asm-sh/percpu.h | 6 - include/asm-sh/pgalloc.h | 96 ------- include/asm-sh/pgtable.h | 152 ---------- include/asm-sh/pgtable_32.h | 479 -------------------------------- include/asm-sh/pgtable_64.h | 314 --------------------- include/asm-sh/pm.h | 17 -- include/asm-sh/poll.h | 1 - include/asm-sh/posix_types.h | 13 - include/asm-sh/posix_types_32.h | 122 -------- include/asm-sh/posix_types_64.h | 131 --------- include/asm-sh/processor.h | 66 ----- include/asm-sh/processor_32.h | 216 -------------- include/asm-sh/processor_64.h | 275 ------------------ include/asm-sh/ptrace.h | 130 --------- include/asm-sh/push-switch.h | 31 --- include/asm-sh/r7780rp.h | 198 ------------- include/asm-sh/resource.h | 6 - include/asm-sh/rtc.h | 16 -- include/asm-sh/rts7751r2d.h | 70 ----- include/asm-sh/rwsem.h | 188 ------------- include/asm-sh/scatterlist.h | 27 -- include/asm-sh/sdk7780.h | 81 ------ include/asm-sh/se.h | 99 ------- include/asm-sh/se7206.h | 13 - include/asm-sh/se7343.h | 149 ---------- include/asm-sh/se7721.h | 70 ----- include/asm-sh/se7722.h | 112 -------- include/asm-sh/se7751.h | 73 ----- include/asm-sh/se7780.h | 108 ------- include/asm-sh/sections.h | 11 - include/asm-sh/segment.h | 34 --- include/asm-sh/sembuf.h | 25 -- include/asm-sh/serial.h | 36 --- include/asm-sh/setup.h | 27 -- include/asm-sh/sfp-machine.h | 84 ------ include/asm-sh/sh03/io.h | 25 -- include/asm-sh/sh03/sh03.h | 18 -- include/asm-sh/sh7760fb.h | 197 ------------- include/asm-sh/sh7763rdp.h | 54 ---- include/asm-sh/sh7785lcr.h | 55 ---- include/asm-sh/sh_bios.h | 19 -- include/asm-sh/sh_keysc.h | 13 - include/asm-sh/sh_mobile_lcdc.h | 66 ----- include/asm-sh/shmbuf.h | 42 --- include/asm-sh/shmin.h | 9 - include/asm-sh/shmparam.h | 22 -- include/asm-sh/sigcontext.h | 40 --- include/asm-sh/siginfo.h | 6 - include/asm-sh/signal.h | 160 ----------- include/asm-sh/smc37c93x.h | 190 ------------- include/asm-sh/smp.h | 50 ---- include/asm-sh/snapgear.h | 71 ----- include/asm-sh/socket.h | 57 ---- include/asm-sh/sockios.h | 14 - include/asm-sh/sparsemem.h | 16 -- include/asm-sh/spi.h | 13 - include/asm-sh/spinlock.h | 223 --------------- include/asm-sh/spinlock_types.h | 21 -- include/asm-sh/stat.h | 138 --------- include/asm-sh/statfs.h | 6 - include/asm-sh/string.h | 5 - include/asm-sh/string_32.h | 131 --------- include/asm-sh/string_64.h | 17 -- include/asm-sh/system.h | 190 ------------- include/asm-sh/system_32.h | 102 ------- include/asm-sh/system_64.h | 40 --- include/asm-sh/systemh7751.h | 71 ----- include/asm-sh/termbits.h | 198 ------------- include/asm-sh/termios.h | 90 ------ include/asm-sh/thread_info.h | 141 ---------- include/asm-sh/timer.h | 44 --- include/asm-sh/timex.h | 18 -- include/asm-sh/titan.h | 17 -- include/asm-sh/tlb.h | 27 -- include/asm-sh/tlb_64.h | 77 ----- include/asm-sh/tlbflush.h | 49 ---- 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delete mode 100644 include/asm-sh/unistd_32.h delete mode 100644 include/asm-sh/unistd_64.h delete mode 100644 include/asm-sh/user.h delete mode 100644 include/asm-sh/vga.h delete mode 100644 include/asm-sh/watchdog.h delete mode 100644 include/asm-sh/xor.h (limited to 'include') diff --git a/include/asm-sh/.gitignore b/include/asm-sh/.gitignore deleted file mode 100644 index 9218ef8..0000000 --- a/include/asm-sh/.gitignore +++ /dev/null @@ -1,3 +0,0 @@ -cpu -mach -machtypes.h diff --git a/include/asm-sh/Kbuild b/include/asm-sh/Kbuild deleted file mode 100644 index 43910cd..0000000 --- a/include/asm-sh/Kbuild +++ /dev/null @@ -1,8 +0,0 @@ -include include/asm-generic/Kbuild.asm - -header-y += cpu-features.h - -unifdef-y += unistd_32.h -unifdef-y += unistd_64.h -unifdef-y += posix_types_32.h -unifdef-y += posix_types_64.h diff --git a/include/asm-sh/a.out.h b/include/asm-sh/a.out.h deleted file mode 100644 index 1f93130..0000000 --- a/include/asm-sh/a.out.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_SH_A_OUT_H -#define __ASM_SH_A_OUT_H - -struct exec -{ - unsigned long a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#endif /* __ASM_SH_A_OUT_H */ diff --git a/include/asm-sh/adc.h b/include/asm-sh/adc.h deleted file mode 100644 index 5f85cf7..0000000 --- a/include/asm-sh/adc.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_ADC_H -#define __ASM_ADC_H -#ifdef __KERNEL__ -/* - * Copyright (C) 2004 Andriy Skulysh - */ - -#include - -int adc_single(unsigned int channel); - -#endif /* __KERNEL__ */ -#endif /* __ASM_ADC_H */ diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h deleted file mode 100644 index fa544fc..0000000 --- a/include/asm-sh/addrspace.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999 by Kaz Kojima - * - * Defitions for the address spaces of the SH CPUs. - */ -#ifndef __ASM_SH_ADDRSPACE_H -#define __ASM_SH_ADDRSPACE_H - -#ifdef __KERNEL__ - -#include - -/* If this CPU supports segmentation, hook up the helpers */ -#ifdef P1SEG - -/* - [ P0/U0 (virtual) ] 0x00000000 <------ User space - [ P1 (fixed) cached ] 0x80000000 <------ Kernel space - [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access - [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area - [ P4 control ] 0xE0000000 - */ - -/* Returns the privileged segment base of a given address */ -#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) - -/* Returns the physical address of a PnSEG (n=1,2) address */ -#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) - -#ifdef CONFIG_29BIT -/* - * Map an address to a certain privileged segment - */ -#define P1SEGADDR(a) \ - ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) -#define P2SEGADDR(a) \ - ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) -#define P3SEGADDR(a) \ - ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) -#define P4SEGADDR(a) \ - ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) -#endif /* 29BIT */ -#endif /* P1SEG */ - -/* Check if an address can be reached in 29 bits */ -#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000) - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_ADDRSPACE_H */ diff --git a/include/asm-sh/atomic-grb.h b/include/asm-sh/atomic-grb.h deleted file mode 100644 index 4c5b7db..0000000 --- a/include/asm-sh/atomic-grb.h +++ /dev/null @@ -1,169 +0,0 @@ -#ifndef __ASM_SH_ATOMIC_GRB_H -#define __ASM_SH_ATOMIC_GRB_H - -static inline void atomic_add(int i, atomic_t *v) -{ - int tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " add %2, %0 \n\t" /* add */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (i) - : "memory" , "r0", "r1"); -} - -static inline void atomic_sub(int i, atomic_t *v) -{ - int tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " sub %2, %0 \n\t" /* sub */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (i) - : "memory" , "r0", "r1"); -} - -static inline int atomic_add_return(int i, atomic_t *v) -{ - int tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " add %2, %0 \n\t" /* add */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (i) - : "memory" , "r0", "r1"); - - return tmp; -} - -static inline int atomic_sub_return(int i, atomic_t *v) -{ - int tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " sub %2, %0 \n\t" /* sub */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (i) - : "memory", "r0", "r1"); - - return tmp; -} - -static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) -{ - int tmp; - unsigned int _mask = ~mask; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " and %2, %0 \n\t" /* add */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (_mask) - : "memory" , "r0", "r1"); -} - -static inline void atomic_set_mask(unsigned int mask, atomic_t *v) -{ - int tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " or %2, %0 \n\t" /* or */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (v) - : "r" (mask) - : "memory" , "r0", "r1"); -} - -static inline int atomic_cmpxchg(atomic_t *v, int old, int new) -{ - int ret; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" - " nop \n\t" - " mov r15, r1 \n\t" - " mov #-8, r15 \n\t" - " mov.l @%1, %0 \n\t" - " cmp/eq %2, %0 \n\t" - " bf 1f \n\t" - " mov.l %3, @%1 \n\t" - "1: mov r1, r15 \n\t" - : "=&r" (ret) - : "r" (v), "r" (old), "r" (new) - : "memory" , "r0", "r1" , "t"); - - return ret; -} - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int ret; - unsigned long tmp; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" - " nop \n\t" - " mov r15, r1 \n\t" - " mov #-12, r15 \n\t" - " mov.l @%2, %1 \n\t" - " mov %1, %0 \n\t" - " cmp/eq %4, %0 \n\t" - " bt/s 1f \n\t" - " add %3, %1 \n\t" - " mov.l %1, @%2 \n\t" - "1: mov r1, r15 \n\t" - : "=&r" (ret), "=&r" (tmp) - : "r" (v), "r" (a), "r" (u) - : "memory" , "r0", "r1" , "t"); - - return ret != u; -} -#endif /* __ASM_SH_ATOMIC_GRB_H */ diff --git a/include/asm-sh/atomic-irq.h b/include/asm-sh/atomic-irq.h deleted file mode 100644 index 74f7943..0000000 --- a/include/asm-sh/atomic-irq.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef __ASM_SH_ATOMIC_IRQ_H -#define __ASM_SH_ATOMIC_IRQ_H - -/* - * To get proper branch prediction for the main line, we must branch - * forward to code at the end of this object's .text section, then - * branch back to restart the operation. - */ -static inline void atomic_add(int i, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - *(long *)v += i; - local_irq_restore(flags); -} - -static inline void atomic_sub(int i, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - *(long *)v -= i; - local_irq_restore(flags); -} - -static inline int atomic_add_return(int i, atomic_t *v) -{ - unsigned long temp, flags; - - local_irq_save(flags); - temp = *(long *)v; - temp += i; - *(long *)v = temp; - local_irq_restore(flags); - - return temp; -} - -static inline int atomic_sub_return(int i, atomic_t *v) -{ - unsigned long temp, flags; - - local_irq_save(flags); - temp = *(long *)v; - temp -= i; - *(long *)v = temp; - local_irq_restore(flags); - - return temp; -} - -static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - *(long *)v &= ~mask; - local_irq_restore(flags); -} - -static inline void atomic_set_mask(unsigned int mask, atomic_t *v) -{ - unsigned long flags; - - local_irq_save(flags); - *(long *)v |= mask; - local_irq_restore(flags); -} - -#endif /* __ASM_SH_ATOMIC_IRQ_H */ diff --git a/include/asm-sh/atomic-llsc.h b/include/asm-sh/atomic-llsc.h deleted file mode 100644 index 4b00b78..0000000 --- a/include/asm-sh/atomic-llsc.h +++ /dev/null @@ -1,107 +0,0 @@ -#ifndef __ASM_SH_ATOMIC_LLSC_H -#define __ASM_SH_ATOMIC_LLSC_H - -/* - * To get proper branch prediction for the main line, we must branch - * forward to code at the end of this object's .text section, then - * branch back to restart the operation. - */ -static inline void atomic_add(int i, atomic_t *v) -{ - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_add \n" -" add %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" - : "=&z" (tmp) - : "r" (i), "r" (&v->counter) - : "t"); -} - -static inline void atomic_sub(int i, atomic_t *v) -{ - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_sub \n" -" sub %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" - : "=&z" (tmp) - : "r" (i), "r" (&v->counter) - : "t"); -} - -/* - * SH-4A note: - * - * We basically get atomic_xxx_return() for free compared with - * atomic_xxx(). movli.l/movco.l require r0 due to the instruction - * encoding, so the retval is automatically set without having to - * do any special work. - */ -static inline int atomic_add_return(int i, atomic_t *v) -{ - unsigned long temp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_add_return \n" -" add %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" -" synco \n" - : "=&z" (temp) - : "r" (i), "r" (&v->counter) - : "t"); - - return temp; -} - -static inline int atomic_sub_return(int i, atomic_t *v) -{ - unsigned long temp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_sub_return \n" -" sub %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" -" synco \n" - : "=&z" (temp) - : "r" (i), "r" (&v->counter) - : "t"); - - return temp; -} - -static inline void atomic_clear_mask(unsigned int mask, atomic_t *v) -{ - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_clear_mask \n" -" and %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" - : "=&z" (tmp) - : "r" (~mask), "r" (&v->counter) - : "t"); -} - -static inline void atomic_set_mask(unsigned int mask, atomic_t *v) -{ - unsigned long tmp; - - __asm__ __volatile__ ( -"1: movli.l @%2, %0 ! atomic_set_mask \n" -" or %1, %0 \n" -" movco.l %0, @%2 \n" -" bf 1b \n" - : "=&z" (tmp) - : "r" (mask), "r" (&v->counter) - : "t"); -} - -#endif /* __ASM_SH_ATOMIC_LLSC_H */ diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h deleted file mode 100644 index c043ef0..0000000 --- a/include/asm-sh/atomic.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef __ASM_SH_ATOMIC_H -#define __ASM_SH_ATOMIC_H - -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc.. - * - */ - -typedef struct { volatile int counter; } atomic_t; - -#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v,i) ((v)->counter = (i)) - -#include -#include - -#if defined(CONFIG_GUSA_RB) -#include -#elif defined(CONFIG_CPU_SH4A) -#include -#else -#include -#endif - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -#define atomic_dec_return(v) atomic_sub_return(1,(v)) -#define atomic_inc_return(v) atomic_add_return(1,(v)) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) - -#define atomic_inc(v) atomic_add(1,(v)) -#define atomic_dec(v) atomic_sub(1,(v)) - -#ifndef CONFIG_GUSA_RB -static inline int atomic_cmpxchg(atomic_t *v, int old, int new) -{ - int ret; - unsigned long flags; - - local_irq_save(flags); - ret = v->counter; - if (likely(ret == old)) - v->counter = new; - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int ret; - unsigned long flags; - - local_irq_save(flags); - ret = v->counter; - if (ret != u) - v->counter += a; - local_irq_restore(flags); - - return ret != u; -} -#endif - -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -/* Atomic operations are already serializing on SH */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#include -#endif /* __ASM_SH_ATOMIC_H */ diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h deleted file mode 100644 index a6b9d4f..0000000 --- a/include/asm-sh/auxvec.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef __ASM_SH_AUXVEC_H -#define __ASM_SH_AUXVEC_H - -/* - * Architecture-neutral AT_ values in 0-17, leave some room - * for more of them. - */ - -/* - * This entry gives some information about the FPU initialization - * performed by the kernel. - */ -#define AT_FPUCW 18 /* Used FPU control word. */ - -#ifdef CONFIG_VSYSCALL -/* - * Only define this in the vsyscall case, the entry point to - * the vsyscall page gets placed here. The kernel will attempt - * to build a gate VMA we don't care about otherwise.. - */ -#define AT_SYSINFO_EHDR 33 -#endif - -/* - * More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the - * value is -1, then the cache doesn't exist. Otherwise: - * - * bit 0-3: Cache set-associativity; 0 means fully associative. - * bit 4-7: Log2 of cacheline size. - * bit 8-31: Size of the entire cache >> 8. - */ -#define AT_L1I_CACHESHAPE 34 -#define AT_L1D_CACHESHAPE 35 -#define AT_L2_CACHESHAPE 36 - -#endif /* __ASM_SH_AUXVEC_H */ diff --git a/include/asm-sh/bitops-grb.h b/include/asm-sh/bitops-grb.h deleted file mode 100644 index a5907b9..0000000 --- a/include/asm-sh/bitops-grb.h +++ /dev/null @@ -1,169 +0,0 @@ -#ifndef __ASM_SH_BITOPS_GRB_H -#define __ASM_SH_BITOPS_GRB_H - -static inline void set_bit(int nr, volatile void * addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " or %2, %0 \n\t" /* or */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (a) - : "r" (mask) - : "memory" , "r0", "r1"); -} - -static inline void clear_bit(int nr, volatile void * addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = ~(1 << (nr & 0x1f)); - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " and %2, %0 \n\t" /* and */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (a) - : "r" (mask) - : "memory" , "r0", "r1"); -} - -static inline void change_bit(int nr, volatile void * addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%1, %0 \n\t" /* load old value */ - " xor %2, %0 \n\t" /* xor */ - " mov.l %0, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "+r" (a) - : "r" (mask) - : "memory" , "r0", "r1"); -} - -static inline int test_and_set_bit(int nr, volatile void * addr) -{ - int mask, retval; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-14, r15 \n\t" /* LOGIN: r15 = size */ - " mov.l @%2, %0 \n\t" /* load old value */ - " mov %0, %1 \n\t" - " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ - " mov #-1, %1 \n\t" /* retvat = -1 */ - " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ - " or %3, %0 \n\t" - " mov.l %0, @%2 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "=&r" (retval), - "+r" (a) - : "r" (mask) - : "memory" , "r0", "r1" ,"t"); - - return retval; -} - -static inline int test_and_clear_bit(int nr, volatile void * addr) -{ - int mask, retval,not_mask; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - - not_mask = ~mask; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-14, r15 \n\t" /* LOGIN */ - " mov.l @%2, %0 \n\t" /* load old value */ - " mov %0, %1 \n\t" /* %1 = *a */ - " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ - " mov #-1, %1 \n\t" /* retvat = -1 */ - " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ - " and %4, %0 \n\t" - " mov.l %0, @%2 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "=&r" (retval), - "+r" (a) - : "r" (mask), - "r" (not_mask) - : "memory" , "r0", "r1", "t"); - - return retval; -} - -static inline int test_and_change_bit(int nr, volatile void * addr) -{ - int mask, retval; - volatile unsigned int *a = addr; - unsigned long tmp; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-14, r15 \n\t" /* LOGIN */ - " mov.l @%2, %0 \n\t" /* load old value */ - " mov %0, %1 \n\t" /* %1 = *a */ - " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */ - " mov #-1, %1 \n\t" /* retvat = -1 */ - " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */ - " xor %3, %0 \n\t" - " mov.l %0, @%2 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (tmp), - "=&r" (retval), - "+r" (a) - : "r" (mask) - : "memory" , "r0", "r1", "t"); - - return retval; -} -#endif /* __ASM_SH_BITOPS_GRB_H */ diff --git a/include/asm-sh/bitops-irq.h b/include/asm-sh/bitops-irq.h deleted file mode 100644 index 653a127..0000000 --- a/include/asm-sh/bitops-irq.h +++ /dev/null @@ -1,91 +0,0 @@ -#ifndef __ASM_SH_BITOPS_IRQ_H -#define __ASM_SH_BITOPS_IRQ_H - -static inline void set_bit(int nr, volatile void *addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - *a |= mask; - local_irq_restore(flags); -} - -static inline void clear_bit(int nr, volatile void *addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - *a &= ~mask; - local_irq_restore(flags); -} - -static inline void change_bit(int nr, volatile void *addr) -{ - int mask; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - *a ^= mask; - local_irq_restore(flags); -} - -static inline int test_and_set_bit(int nr, volatile void *addr) -{ - int mask, retval; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - retval = (mask & *a) != 0; - *a |= mask; - local_irq_restore(flags); - - return retval; -} - -static inline int test_and_clear_bit(int nr, volatile void *addr) -{ - int mask, retval; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - retval = (mask & *a) != 0; - *a &= ~mask; - local_irq_restore(flags); - - return retval; -} - -static inline int test_and_change_bit(int nr, volatile void *addr) -{ - int mask, retval; - volatile unsigned int *a = addr; - unsigned long flags; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - local_irq_save(flags); - retval = (mask & *a) != 0; - *a ^= mask; - local_irq_restore(flags); - - return retval; -} - -#endif /* __ASM_SH_BITOPS_IRQ_H */ diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h deleted file mode 100644 index d7d382f..0000000 --- a/include/asm-sh/bitops.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef __ASM_SH_BITOPS_H -#define __ASM_SH_BITOPS_H - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -/* For __swab32 */ -#include - -#ifdef CONFIG_GUSA_RB -#include -#else -#include -#endif - - -/* - * clear_bit() doesn't provide any barrier for the compiler. - */ -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() - -#include - -#ifdef CONFIG_SUPERH32 -static inline unsigned long ffz(unsigned long word) -{ - unsigned long result; - - __asm__("1:\n\t" - "shlr %1\n\t" - "bt/s 1b\n\t" - " add #1, %0" - : "=r" (result), "=r" (word) - : "0" (~0L), "1" (word) - : "t"); - return result; -} - -/** - * __ffs - find first bit in word. - * @word: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static inline unsigned long __ffs(unsigned long word) -{ - unsigned long result; - - __asm__("1:\n\t" - "shlr %1\n\t" - "bf/s 1b\n\t" - " add #1, %0" - : "=r" (result), "=r" (word) - : "0" (~0L), "1" (word) - : "t"); - return result; -} -#else -static inline unsigned long ffz(unsigned long word) -{ - unsigned long result, __d2, __d3; - - __asm__("gettr tr0, %2\n\t" - "pta $+32, tr0\n\t" - "andi %1, 1, %3\n\t" - "beq %3, r63, tr0\n\t" - "pta $+4, tr0\n" - "0:\n\t" - "shlri.l %1, 1, %1\n\t" - "addi %0, 1, %0\n\t" - "andi %1, 1, %3\n\t" - "beqi %3, 1, tr0\n" - "1:\n\t" - "ptabs %2, tr0\n\t" - : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3) - : "0" (0L), "1" (word)); - - return result; -} - -#include -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_BITOPS_H */ diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h deleted file mode 100644 index c017180..0000000 --- a/include/asm-sh/bug.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef __ASM_SH_BUG_H -#define __ASM_SH_BUG_H - -#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ - -#ifdef CONFIG_GENERIC_BUG -#define HAVE_ARCH_BUG -#define HAVE_ARCH_WARN_ON - -/** - * _EMIT_BUG_ENTRY - * %1 - __FILE__ - * %2 - __LINE__ - * %3 - trap type - * %4 - sizeof(struct bug_entry) - * - * The trapa opcode itself sits in %0. - * The %O notation is used to avoid # generation. - * - * The offending file and line are encoded in the __bug_table section. - */ -#ifdef CONFIG_DEBUG_BUGVERBOSE -#define _EMIT_BUG_ENTRY \ - "\t.pushsection __bug_table,\"a\"\n" \ - "2:\t.long 1b, %O1\n" \ - "\t.short %O2, %O3\n" \ - "\t.org 2b+%O4\n" \ - "\t.popsection\n" -#else -#define _EMIT_BUG_ENTRY \ - "\t.pushsection __bug_table,\"a\"\n" \ - "2:\t.long 1b\n" \ - "\t.short %O3\n" \ - "\t.org 2b+%O4\n" \ - "\t.popsection\n" -#endif - -#define BUG() \ -do { \ - __asm__ __volatile__ ( \ - "1:\t.short %O0\n" \ - _EMIT_BUG_ENTRY \ - : \ - : "n" (TRAPA_BUG_OPCODE), \ - "i" (__FILE__), \ - "i" (__LINE__), "i" (0), \ - "i" (sizeof(struct bug_entry))); \ -} while (0) - -#define __WARN() \ -do { \ - __asm__ __volatile__ ( \ - "1:\t.short %O0\n" \ - _EMIT_BUG_ENTRY \ - : \ - : "n" (TRAPA_BUG_OPCODE), \ - "i" (__FILE__), \ - "i" (__LINE__), \ - "i" (BUGFLAG_WARNING), \ - "i" (sizeof(struct bug_entry))); \ -} while (0) - -#define WARN_ON(x) ({ \ - int __ret_warn_on = !!(x); \ - if (__builtin_constant_p(__ret_warn_on)) { \ - if (__ret_warn_on) \ - __WARN(); \ - } else { \ - if (unlikely(__ret_warn_on)) \ - __WARN(); \ - } \ - unlikely(__ret_warn_on); \ -}) - -#endif /* CONFIG_GENERIC_BUG */ - -#include - -#endif /* __ASM_SH_BUG_H */ diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h deleted file mode 100644 index 121b2ec..0000000 --- a/include/asm-sh/bugs.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef __ASM_SH_BUGS_H -#define __ASM_SH_BUGS_H - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -/* - * I don't know of any Super-H bugs yet. - */ - -#include - -static void __init check_bugs(void) -{ - extern unsigned long loops_per_jiffy; - char *p = &init_utsname()->machine[2]; /* "sh" */ - - current_cpu_data.loops_per_jiffy = loops_per_jiffy; - - switch (current_cpu_data.type) { - case CPU_SH7619: - *p++ = '2'; - break; - case CPU_SH7203 ... CPU_MXG: - *p++ = '2'; - *p++ = 'a'; - break; - case CPU_SH7705 ... CPU_SH7729: - *p++ = '3'; - break; - case CPU_SH7750 ... CPU_SH4_501: - *p++ = '4'; - break; - case CPU_SH7763 ... CPU_SHX3: - *p++ = '4'; - *p++ = 'a'; - break; - case CPU_SH7343 ... CPU_SH7366: - *p++ = '4'; - *p++ = 'a'; - *p++ = 'l'; - *p++ = '-'; - *p++ = 'd'; - *p++ = 's'; - *p++ = 'p'; - break; - case CPU_SH5_101 ... CPU_SH5_103: - *p++ = '6'; - *p++ = '4'; - break; - case CPU_SH_NONE: - /* - * Specifically use CPU_SH_NONE rather than default:, - * so we're able to have the compiler whine about - * unhandled enumerations. - */ - break; - } - - printk("CPU: %s\n", get_cpu_subtype(¤t_cpu_data)); - -#ifndef __LITTLE_ENDIAN__ - /* 'eb' means 'Endian Big' */ - *p++ = 'e'; - *p++ = 'b'; -#endif - *p = '\0'; -} -#endif /* __ASM_SH_BUGS_H */ diff --git a/include/asm-sh/byteorder.h b/include/asm-sh/byteorder.h deleted file mode 100644 index 4c13e61..0000000 --- a/include/asm-sh/byteorder.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef __ASM_SH_BYTEORDER_H -#define __ASM_SH_BYTEORDER_H - -/* - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2000, 2001 Paolo Alberelli - */ -#include -#include - -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) -{ - __asm__( -#ifdef __SH5__ - "byterev %0, %0\n\t" - "shari %0, 32, %0" -#else - "swap.b %0, %0\n\t" - "swap.w %0, %0\n\t" - "swap.b %0, %0" -#endif - : "=r" (x) - : "0" (x)); - - return x; -} - -static inline __attribute_const__ __u16 ___arch__swab16(__u16 x) -{ - __asm__( -#ifdef __SH5__ - "byterev %0, %0\n\t" - "shari %0, 32, %0" -#else - "swap.b %0, %0" -#endif - : "=r" (x) - : "0" (x)); - - return x; -} - -static inline __u64 ___arch__swab64(__u64 val) -{ - union { - struct { __u32 a,b; } s; - __u64 u; - } v, w; - v.u = val; - w.s.b = ___arch__swab32(v.s.a); - w.s.a = ___arch__swab32(v.s.b); - return w.u; -} - -#define __arch__swab64(x) ___arch__swab64(x) -#define __arch__swab32(x) ___arch__swab32(x) -#define __arch__swab16(x) ___arch__swab16(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __LITTLE_ENDIAN__ -#include -#else -#include -#endif - -#endif /* __ASM_SH_BYTEORDER_H */ diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h deleted file mode 100644 index 083419f4..0000000 --- a/include/asm-sh/cache.h +++ /dev/null @@ -1,51 +0,0 @@ -/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $ - * - * include/asm-sh/cache.h - * - * Copyright 1999 (C) Niibe Yutaka - * Copyright 2002, 2003 (C) Paul Mundt - */ -#ifndef __ASM_SH_CACHE_H -#define __ASM_SH_CACHE_H -#ifdef __KERNEL__ - -#include -#include - -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) - -#ifndef __ASSEMBLY__ -struct cache_info { - unsigned int ways; /* Number of cache ways */ - unsigned int sets; /* Number of cache sets */ - unsigned int linesz; /* Cache line size (bytes) */ - - unsigned int way_size; /* sets * line size */ - - /* - * way_incr is the address offset for accessing the next way - * in memory mapped cache array ops. - */ - unsigned int way_incr; - unsigned int entry_shift; - unsigned int entry_mask; - - /* - * Compute a mask which selects the address bits which overlap between - * 1. those used to select the cache set during indexing - * 2. those in the physical page number. - */ - unsigned int alias_mask; - - unsigned int n_aliases; /* Number of aliases */ - - unsigned long flags; -}; - -int __init detect_cpu_and_cache_system(void); - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_CACHE_H */ diff --git a/include/asm-sh/cacheflush.h b/include/asm-sh/cacheflush.h deleted file mode 100644 index e034c36..0000000 --- a/include/asm-sh/cacheflush.h +++ /dev/null @@ -1,81 +0,0 @@ -#ifndef __ASM_SH_CACHEFLUSH_H -#define __ASM_SH_CACHEFLUSH_H - -#ifdef __KERNEL__ - -#ifdef CONFIG_CACHE_OFF -/* - * Nothing to do when the cache is disabled, initial flush and explicit - * disabling is handled at CPU init time. - * - * See arch/sh/kernel/cpu/init.c:cache_init(). - */ -#define p3_cache_init() do { } while (0) -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define __flush_wback_region(start, size) do { (void)(start); } while (0) -#define __flush_purge_region(start, size) do { (void)(start); } while (0) -#define __flush_invalidate_region(start, size) do { (void)(start); } while (0) -#else -#include - -/* - * Consistent DMA requires that the __flush_xxx() primitives must be set - * for any of the enabled non-coherent caches (most of the UP CPUs), - * regardless of PIPT or VIPT cache configurations. - */ - -/* Flush (write-back only) a region (smaller than a page) */ -extern void __flush_wback_region(void *start, int size); -/* Flush (write-back & invalidate) a region (smaller than a page) */ -extern void __flush_purge_region(void *start, int size); -/* Flush (invalidate only) a region (smaller than a page) */ -extern void __flush_invalidate_region(void *start, int size); -#endif - -#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE -static inline void flush_kernel_dcache_page(struct page *page) -{ - flush_dcache_page(page); -} - -#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_CACHE_OFF) -extern void copy_to_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len); - -extern void copy_from_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len); -#else -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - flush_icache_user_range(vma, page, vaddr, len); \ - } while (0) - -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - } while (0) -#endif - -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() - -#define HAVE_ARCH_UNMAPPED_AREA - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_CACHEFLUSH_H */ diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h deleted file mode 100644 index 67496ab..0000000 --- a/include/asm-sh/checksum.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifdef CONFIG_SUPERH32 -# include "checksum_32.h" -#else -# include "checksum_64.h" -#endif diff --git a/include/asm-sh/checksum_32.h b/include/asm-sh/checksum_32.h deleted file mode 100644 index 14b7ac2..0000000 --- a/include/asm-sh/checksum_32.h +++ /dev/null @@ -1,215 +0,0 @@ -#ifndef __ASM_SH_CHECKSUM_H -#define __ASM_SH_CHECKSUM_H - -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999 by Kaz Kojima & Niibe Yutaka - */ - -#include - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * the same as csum_partial, but copies from src while it - * checksums, and handles user-space pointer exceptions correctly, when needed. - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst, - int len, __wsum sum, - int *src_err_ptr, int *dst_err_ptr); - -/* - * Note: when you get a NULL pointer exception here this means someone - * passed in an incorrect kernel address to one of these functions. - * - * If you use these functions directly please don't forget the - * access_ok(). - */ -static inline -__wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum) -{ - return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); -} - -static inline -__wsum csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, int *err_ptr) -{ - return csum_partial_copy_generic((__force const void *)src, dst, - len, sum, err_ptr, NULL); -} - -/* - * Fold a partial checksum - */ - -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int __dummy; - __asm__("swap.w %0, %1\n\t" - "extu.w %0, %0\n\t" - "extu.w %1, %1\n\t" - "add %1, %0\n\t" - "swap.w %0, %1\n\t" - "add %1, %0\n\t" - "not %0, %0\n\t" - : "=r" (sum), "=&r" (__dummy) - : "0" (sum) - : "t"); - return (__force __sum16)sum; -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - * - * i386 version by Jorge Cwik , adapted - * for linux by * Arnt Gulbrandsen. - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - unsigned int sum, __dummy0, __dummy1; - - __asm__ __volatile__( - "mov.l @%1+, %0\n\t" - "mov.l @%1+, %3\n\t" - "add #-2, %2\n\t" - "clrt\n\t" - "1:\t" - "addc %3, %0\n\t" - "movt %4\n\t" - "mov.l @%1+, %3\n\t" - "dt %2\n\t" - "bf/s 1b\n\t" - " cmp/eq #1, %4\n\t" - "addc %3, %0\n\t" - "addc %2, %0" /* Here %2 is 0, add carry-bit */ - /* Since the input registers which are loaded with iph and ihl - are modified, we must also specify them as outputs, or gcc - will assume they contain their original values. */ - : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (__dummy0), "=&z" (__dummy1) - : "1" (iph), "2" (ihl) - : "t", "memory"); - - return csum_fold(sum); -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ -#ifdef __LITTLE_ENDIAN__ - unsigned long len_proto = (proto + len) << 8; -#else - unsigned long len_proto = proto + len; -#endif - __asm__("clrt\n\t" - "addc %0, %1\n\t" - "addc %2, %1\n\t" - "addc %3, %1\n\t" - "movt %0\n\t" - "add %1, %0" - : "=r" (sum), "=r" (len_proto) - : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum) - : "t"); - - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#define _HAVE_ARCH_IPV6_CSUM -static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - unsigned int __dummy; - __asm__("clrt\n\t" - "mov.l @(0,%2), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(4,%2), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(8,%2), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(12,%2), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(0,%3), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(4,%3), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(8,%3), %1\n\t" - "addc %1, %0\n\t" - "mov.l @(12,%3), %1\n\t" - "addc %1, %0\n\t" - "addc %4, %0\n\t" - "addc %5, %0\n\t" - "movt %1\n\t" - "add %1, %0\n" - : "=r" (sum), "=&r" (__dummy) - : "r" (saddr), "r" (daddr), - "r" (htonl(len)), "r" (htonl(proto)), "0" (sum) - : "t"); - - return csum_fold(sum); -} - -/* - * Copy and checksum to user - */ -#define HAVE_CSUM_COPY_USER -static inline __wsum csum_and_copy_to_user(const void *src, - void __user *dst, - int len, __wsum sum, - int *err_ptr) -{ - if (access_ok(VERIFY_WRITE, dst, len)) - return csum_partial_copy_generic((__force const void *)src, - dst, len, sum, NULL, err_ptr); - - if (len) - *err_ptr = -EFAULT; - - return (__force __wsum)-1; /* invalid checksum */ -} -#endif /* __ASM_SH_CHECKSUM_H */ diff --git a/include/asm-sh/checksum_64.h b/include/asm-sh/checksum_64.h deleted file mode 100644 index 9c62a03..0000000 --- a/include/asm-sh/checksum_64.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef __ASM_SH_CHECKSUM_64_H -#define __ASM_SH_CHECKSUM_64_H - -/* - * include/asm-sh/checksum_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * Note: when you get a NULL pointer exception here this means someone - * passed in an incorrect kernel address to one of these functions. - * - * If you use these functions directly please don't forget the - * access_ok(). - */ - - -__wsum csum_partial_copy_nocheck(const void *src, void *dst, int len, - __wsum sum); - -__wsum csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, int *err_ptr); - -static inline __sum16 csum_fold(__wsum csum) -{ - u32 sum = (__force u32)csum; - sum = (sum & 0xffff) + (sum >> 16); - sum = (sum & 0xffff) + (sum >> 16); - return (__force __sum16)~sum; -} - -__sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -__wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, unsigned short proto, - __wsum sum); - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* __ASM_SH_CHECKSUM_64_H */ diff --git a/include/asm-sh/clock.h b/include/asm-sh/clock.h deleted file mode 100644 index 720dfab..0000000 --- a/include/asm-sh/clock.h +++ /dev/null @@ -1,97 +0,0 @@ -#ifndef __ASM_SH_CLOCK_H -#define __ASM_SH_CLOCK_H - -#include -#include -#include -#include -#include - -struct clk; - -struct clk_ops { - void (*init)(struct clk *clk); - void (*enable)(struct clk *clk); - void (*disable)(struct clk *clk); - void (*recalc)(struct clk *clk); - int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id); - long (*round_rate)(struct clk *clk, unsigned long rate); -}; - -struct clk { - struct list_head node; - const char *name; - int id; - struct module *owner; - - struct clk *parent; - struct clk_ops *ops; - - struct kref kref; - - unsigned long rate; - unsigned long flags; - unsigned long arch_flags; -}; - -#define CLK_ALWAYS_ENABLED (1 << 0) -#define CLK_RATE_PROPAGATES (1 << 1) - -/* Should be defined by processor-specific code */ -void arch_init_clk_ops(struct clk_ops **, int type); - -/* arch/sh/kernel/cpu/clock.c */ -int clk_init(void); - -void clk_recalc_rate(struct clk *); - -int clk_register(struct clk *); -void clk_unregister(struct clk *); - -static inline int clk_always_enable(const char *id) -{ - struct clk *clk; - int ret; - - clk = clk_get(NULL, id); - if (IS_ERR(clk)) - return PTR_ERR(clk); - - ret = clk_enable(clk); - if (ret) - clk_put(clk); - - return ret; -} - -/* the exported API, in addition to clk_set_rate */ -/** - * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter - * @clk: clock source - * @rate: desired clock rate in Hz - * @algo_id: algorithm id to be passed down to ops->set_rate - * - * Returns success (0) or negative errno. - */ -int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); - -enum clk_sh_algo_id { - NO_CHANGE = 0, - - IUS_N1_N1, - IUS_322, - IUS_522, - IUS_N11, - - SB_N1, - - SB3_N1, - SB3_32, - SB3_43, - SB3_54, - - BP_N1, - - IP_N1, -}; -#endif /* __ASM_SH_CLOCK_H */ diff --git a/include/asm-sh/cmpxchg-grb.h b/include/asm-sh/cmpxchg-grb.h deleted file mode 100644 index e2681ab..0000000 --- a/include/asm-sh/cmpxchg-grb.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef __ASM_SH_CMPXCHG_GRB_H -#define __ASM_SH_CMPXCHG_GRB_H - -static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) -{ - unsigned long retval; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " nop \n\t" - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-4, r15 \n\t" /* LOGIN */ - " mov.l @%1, %0 \n\t" /* load old value */ - " mov.l %2, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (retval), - "+r" (m) - : "r" (val) - : "memory", "r0", "r1"); - - return retval; -} - -static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) -{ - unsigned long retval; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-6, r15 \n\t" /* LOGIN */ - " mov.b @%1, %0 \n\t" /* load old value */ - " extu.b %0, %0 \n\t" /* extend as unsigned */ - " mov.b %2, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (retval), - "+r" (m) - : "r" (val) - : "memory" , "r0", "r1"); - - return retval; -} - -static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, - unsigned long new) -{ - unsigned long retval; - - __asm__ __volatile__ ( - " .align 2 \n\t" - " mova 1f, r0 \n\t" /* r0 = end point */ - " nop \n\t" - " mov r15, r1 \n\t" /* r1 = saved sp */ - " mov #-8, r15 \n\t" /* LOGIN */ - " mov.l @%1, %0 \n\t" /* load old value */ - " cmp/eq %0, %2 \n\t" - " bf 1f \n\t" /* if not equal */ - " mov.l %2, @%1 \n\t" /* store new value */ - "1: mov r1, r15 \n\t" /* LOGOUT */ - : "=&r" (retval), - "+r" (m) - : "r" (new) - : "memory" , "r0", "r1", "t"); - - return retval; -} - -#endif /* __ASM_SH_CMPXCHG_GRB_H */ diff --git a/include/asm-sh/cmpxchg-irq.h b/include/asm-sh/cmpxchg-irq.h deleted file mode 100644 index 43049ec..0000000 --- a/include/asm-sh/cmpxchg-irq.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __ASM_SH_CMPXCHG_IRQ_H -#define __ASM_SH_CMPXCHG_IRQ_H - -static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val) -{ - unsigned long flags, retval; - - local_irq_save(flags); - retval = *m; - *m = val; - local_irq_restore(flags); - return retval; -} - -static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val) -{ - unsigned long flags, retval; - - local_irq_save(flags); - retval = *m; - *m = val & 0xff; - local_irq_restore(flags); - return retval; -} - -static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, - unsigned long new) -{ - __u32 retval; - unsigned long flags; - - local_irq_save(flags); - retval = *m; - if (retval == old) - *m = new; - local_irq_restore(flags); /* implies memory barrier */ - return retval; -} - -#endif /* __ASM_SH_CMPXCHG_IRQ_H */ diff --git a/include/asm-sh/cpu-features.h b/include/asm-sh/cpu-features.h deleted file mode 100644 index 86308aa..0000000 --- a/include/asm-sh/cpu-features.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __ASM_SH_CPU_FEATURES_H -#define __ASM_SH_CPU_FEATURES_H - -/* - * Processor flags - * - * Note: When adding a new flag, keep cpu_flags[] in - * arch/sh/kernel/setup.c in sync so symbolic name - * mapping of the processor flags has a chance of being - * reasonably accurate. - * - * These flags are also available through the ELF - * auxiliary vector as AT_HWCAP. - */ -#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */ -#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */ -#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */ -#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */ -#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */ -#define CPU_HAS_PTEA 0x0020 /* PTEA register */ -#define CPU_HAS_LLSC 0x0040 /* movli.l/movco.l */ -#define CPU_HAS_L2_CACHE 0x0080 /* Secondary cache / URAM */ -#define CPU_HAS_OP32 0x0100 /* 32-bit instruction support */ - -#endif /* __ASM_SH_CPU_FEATURES_H */ diff --git a/include/asm-sh/cpu-sh2/addrspace.h b/include/asm-sh/cpu-sh2/addrspace.h deleted file mode 100644 index 2b9ab93..0000000 --- a/include/asm-sh/cpu-sh2/addrspace.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Definitions for the address spaces of the SH-2 CPUs. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_ADDRSPACE_H -#define __ASM_CPU_SH2_ADDRSPACE_H - -#define P0SEG 0x00000000 -#define P1SEG 0x80000000 -#define P2SEG 0xa0000000 -#define P3SEG 0xc0000000 -#define P4SEG 0xe0000000 - -#endif /* __ASM_CPU_SH2_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h deleted file mode 100644 index 4e0b165..0000000 --- a/include/asm-sh/cpu-sh2/cache.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/cache.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_CACHE_H -#define __ASM_CPU_SH2_CACHE_H - -#define L1_CACHE_SHIFT 4 - -#define SH_CACHE_VALID 1 -#define SH_CACHE_UPDATED 2 -#define SH_CACHE_COMBINED 4 -#define SH_CACHE_ASSOC 8 - -#if defined(CONFIG_CPU_SUBTYPE_SH7619) -#define CCR 0xffffffec - -#define CCR_CACHE_CE 0x01 /* Cache enable */ -#define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ - /* 0x00000000-0x7fffffff: Write-through */ - /* 0x80000000-0x9fffffff: Write-back */ - /* 0xc0000000-0xdfffffff: Write-through */ -#define CCR_CACHE_CB 0x00 /* CCR[bit1=0,bit2=0] */ - /* 0x00000000-0x7fffffff: Write-back */ - /* 0x80000000-0x9fffffff: Write-through */ - /* 0xc0000000-0xdfffffff: Write-back */ -#define CCR_CACHE_CF 0x08 /* Cache invalidate */ - -#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_OC_DATA_ARRAY 0xf1000000 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CF -#endif - -#endif /* __ASM_CPU_SH2_CACHE_H */ diff --git a/include/asm-sh/cpu-sh2/cacheflush.h b/include/asm-sh/cpu-sh2/cacheflush.h deleted file mode 100644 index 2979efb..0000000 --- a/include/asm-sh/cpu-sh2/cacheflush.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/cacheflush.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_CACHEFLUSH_H -#define __ASM_CPU_SH2_CACHEFLUSH_H - -/* - * Cache flushing: - * - * - flush_cache_all() flushes entire cache - * - flush_cache_mm(mm) flushes the specified mm context's cache lines - * - flush_cache_dup mm(mm) handles cache flushing when forking - * - flush_cache_page(mm, vmaddr, pfn) flushes a single page - * - flush_cache_range(vma, start, end) flushes a range of pages - * - * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache - * - flush_icache_range(start, end) flushes(invalidates) a range for icache - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache - * - * Caches are indexed (effectively) by physical address on SH-2, so - * we don't need them. - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) - -#define p3_cache_init() do { } while (0) -#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ - diff --git a/include/asm-sh/cpu-sh2/dma.h b/include/asm-sh/cpu-sh2/dma.h deleted file mode 100644 index d66b43c..0000000 --- a/include/asm-sh/cpu-sh2/dma.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Definitions for the SH-2 DMAC. - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_DMA_H -#define __ASM_CPU_SH2_DMA_H - -#define SH_MAX_DMA_CHANNELS 2 - -#define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) -#define DAR ((unsigned long[]){ 0xffffff84, 0xffffff94 }) -#define DMATCR ((unsigned long[]){ 0xffffff88, 0xffffff98 }) -#define CHCR ((unsigned long[]){ 0xfffffffc, 0xffffff9c }) - -#define DMAOR 0xffffffb0 - -#endif /* __ASM_CPU_SH2_DMA_H */ - diff --git a/include/asm-sh/cpu-sh2/freq.h b/include/asm-sh/cpu-sh2/freq.h deleted file mode 100644 index 31de475..0000000 --- a/include/asm-sh/cpu-sh2/freq.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/freq.h - * - * Copyright (C) 2006 Yoshinori Sato - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_FREQ_H -#define __ASM_CPU_SH2_FREQ_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7619) -#define FREQCR 0xf815ff80 -#endif - -#endif /* __ASM_CPU_SH2_FREQ_H */ - diff --git a/include/asm-sh/cpu-sh2/mmu_context.h b/include/asm-sh/cpu-sh2/mmu_context.h deleted file mode 100644 index beeb299..0000000 --- a/include/asm-sh/cpu-sh2/mmu_context.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/mmu_context.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_MMU_CONTEXT_H -#define __ASM_CPU_SH2_MMU_CONTEXT_H - -/* No MMU */ - -#endif /* __ASM_CPU_SH2_MMU_CONTEXT_H */ - diff --git a/include/asm-sh/cpu-sh2/rtc.h b/include/asm-sh/cpu-sh2/rtc.h deleted file mode 100644 index 39e2d6e..0000000 --- a/include/asm-sh/cpu-sh2/rtc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_CPU_SH2_RTC_H -#define __ASM_SH_CPU_SH2_RTC_H - -#define rtc_reg_size sizeof(u16) -#define RTC_BIT_INVERTED 0 -#define RTC_DEF_CAPABILITIES 0UL - -#endif /* __ASM_SH_CPU_SH2_RTC_H */ diff --git a/include/asm-sh/cpu-sh2/sigcontext.h b/include/asm-sh/cpu-sh2/sigcontext.h deleted file mode 100644 index fe5c15d..0000000 --- a/include/asm-sh/cpu-sh2/sigcontext.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_CPU_SH2_SIGCONTEXT_H -#define __ASM_CPU_SH2_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; -}; - -#endif /* __ASM_CPU_SH2_SIGCONTEXT_H */ diff --git a/include/asm-sh/cpu-sh2/timer.h b/include/asm-sh/cpu-sh2/timer.h deleted file mode 100644 index a39c241..0000000 --- a/include/asm-sh/cpu-sh2/timer.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_CPU_SH2_TIMER_H -#define __ASM_CPU_SH2_TIMER_H - -/* Nothing needed yet */ - -#endif /* __ASM_CPU_SH2_TIMER_H */ diff --git a/include/asm-sh/cpu-sh2/ubc.h b/include/asm-sh/cpu-sh2/ubc.h deleted file mode 100644 index ba0e87f..0000000 --- a/include/asm-sh/cpu-sh2/ubc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/ubc.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_UBC_H -#define __ASM_CPU_SH2_UBC_H - -#define UBC_BARA 0xffffff40 -#define UBC_BAMRA 0xffffff44 -#define UBC_BBRA 0xffffff48 -#define UBC_BARB 0xffffff60 -#define UBC_BAMRB 0xffffff64 -#define UBC_BBRB 0xffffff68 -#define UBC_BDRB 0xffffff70 -#define UBC_BDMRB 0xffffff74 -#define UBC_BRCR 0xffffff78 - -/* - * We don't have any ASID changes to make in the UBC on the SH-2. - * - * Make these purposely invalid to track misuse. - */ -#define UBC_BASRA 0x00000000 -#define UBC_BASRB 0x00000000 - -#endif /* __ASM_CPU_SH2_UBC_H */ - diff --git a/include/asm-sh/cpu-sh2/watchdog.h b/include/asm-sh/cpu-sh2/watchdog.h deleted file mode 100644 index 393161c..0000000 --- a/include/asm-sh/cpu-sh2/watchdog.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * include/asm-sh/cpu-sh2/watchdog.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2_WATCHDOG_H -#define __ASM_CPU_SH2_WATCHDOG_H - -/* - * More SH-2 brilliance .. its not good enough that we can't read - * and write the same sizes to WTCNT, now we have to read and write - * with different sizes at different addresses for WTCNT _and_ RSTCSR. - * - * At least on the bright side no one has managed to screw over WTCSR - * in this fashion .. yet. - */ -/* Register definitions */ -#define WTCNT 0xfffffe80 -#define WTCSR 0xfffffe80 -#define RSTCSR 0xfffffe82 - -#define WTCNT_R (WTCNT + 1) -#define RSTCSR_R (RSTCSR + 1) - -/* Bit definitions */ -#define WTCSR_IOVF 0x80 -#define WTCSR_WT 0x40 -#define WTCSR_TME 0x20 -#define WTCSR_RSTS 0x00 - -#define RSTCSR_RSTS 0x20 - -/** - * sh_wdt_read_rstcsr - Read from Reset Control/Status Register - * - * Reads back the RSTCSR value. - */ -static inline __u8 sh_wdt_read_rstcsr(void) -{ - /* - * Same read/write brain-damage as for WTCNT here.. - */ - return ctrl_inb(RSTCSR_R); -} - -/** - * sh_wdt_write_csr - Write to Reset Control/Status Register - * - * @val: Value to write - * - * Writes the given value @val to the lower byte of the control/status - * register. The upper byte is set manually on each write. - */ -static inline void sh_wdt_write_rstcsr(__u8 val) -{ - /* - * Note: Due to the brain-damaged nature of this register, - * we can't presently touch the WOVF bit, since the upper byte - * has to be swapped for this. So just leave it alone.. - */ - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, RSTCSR); -} - -#endif /* __ASM_CPU_SH2_WATCHDOG_H */ - diff --git a/include/asm-sh/cpu-sh2a/addrspace.h b/include/asm-sh/cpu-sh2a/addrspace.h deleted file mode 100644 index 795ddd6..0000000 --- a/include/asm-sh/cpu-sh2a/addrspace.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H -#define __ASM_SH_CPU_SH2A_ADDRSPACE_H - -#define P0SEG 0x00000000 -#define P1SEG 0x00000000 -#define P2SEG 0x20000000 -#define P3SEG 0x00000000 -#define P4SEG 0x80000000 - -#endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh2a/cache.h b/include/asm-sh/cpu-sh2a/cache.h deleted file mode 100644 index afe228b..0000000 --- a/include/asm-sh/cpu-sh2a/cache.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * include/asm-sh/cpu-sh2a/cache.h - * - * Copyright (C) 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2A_CACHE_H -#define __ASM_CPU_SH2A_CACHE_H - -#define L1_CACHE_SHIFT 4 - -#define SH_CACHE_VALID 1 -#define SH_CACHE_UPDATED 2 -#define SH_CACHE_COMBINED 4 -#define SH_CACHE_ASSOC 8 - -#define CCR 0xfffc1000 /* CCR1 */ -#define CCR2 0xfffc1004 - -/* - * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not - * listed here are reserved. - */ -#define CCR_CACHE_CB 0x0000 /* Hack */ -#define CCR_CACHE_OCE 0x0001 -#define CCR_CACHE_WT 0x0002 -#define CCR_CACHE_OCI 0x0008 /* OCF */ -#define CCR_CACHE_ICE 0x0100 -#define CCR_CACHE_ICI 0x0800 /* ICF */ - -#define CACHE_IC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_OC_ADDRESS_ARRAY 0xf0800000 - -#define CCR_CACHE_ENABLE (CCR_CACHE_OCE | CCR_CACHE_ICE) -#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) - -#endif /* __ASM_CPU_SH2A_CACHE_H */ diff --git a/include/asm-sh/cpu-sh2a/cacheflush.h b/include/asm-sh/cpu-sh2a/cacheflush.h deleted file mode 100644 index fa3186c..0000000 --- a/include/asm-sh/cpu-sh2a/cacheflush.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh2a/dma.h b/include/asm-sh/cpu-sh2a/dma.h deleted file mode 100644 index 0d5ad85..0000000 --- a/include/asm-sh/cpu-sh2a/dma.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh2a/freq.h b/include/asm-sh/cpu-sh2a/freq.h deleted file mode 100644 index 830fd43..0000000 --- a/include/asm-sh/cpu-sh2a/freq.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-sh/cpu-sh2a/freq.h - * - * Copyright (C) 2006 Yoshinori Sato - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH2A_FREQ_H -#define __ASM_CPU_SH2A_FREQ_H - -#define FREQCR 0xfffe0010 - -#endif /* __ASM_CPU_SH2A_FREQ_H */ - diff --git a/include/asm-sh/cpu-sh2a/mmu_context.h b/include/asm-sh/cpu-sh2a/mmu_context.h deleted file mode 100644 index cd2387f..0000000 --- a/include/asm-sh/cpu-sh2a/mmu_context.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh2a/rtc.h b/include/asm-sh/cpu-sh2a/rtc.h deleted file mode 100644 index afb511e..0000000 --- a/include/asm-sh/cpu-sh2a/rtc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_CPU_SH2A_RTC_H -#define __ASM_SH_CPU_SH2A_RTC_H - -#define rtc_reg_size sizeof(u16) -#define RTC_BIT_INVERTED 0 -#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR - -#endif /* __ASM_SH_CPU_SH2A_RTC_H */ diff --git a/include/asm-sh/cpu-sh2a/timer.h b/include/asm-sh/cpu-sh2a/timer.h deleted file mode 100644 index fee504a..0000000 --- a/include/asm-sh/cpu-sh2a/timer.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh2a/ubc.h b/include/asm-sh/cpu-sh2a/ubc.h deleted file mode 100644 index cf28062..0000000 --- a/include/asm-sh/cpu-sh2a/ubc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh2a/watchdog.h b/include/asm-sh/cpu-sh2a/watchdog.h deleted file mode 100644 index c1b3e24..0000000 --- a/include/asm-sh/cpu-sh2a/watchdog.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/cpu-sh3/adc.h b/include/asm-sh/cpu-sh3/adc.h deleted file mode 100644 index b289e3c..0000000 --- a/include/asm-sh/cpu-sh3/adc.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ASM_CPU_SH3_ADC_H -#define __ASM_CPU_SH3_ADC_H - -/* - * Copyright (C) 2004 Andriy Skulysh - */ - - -#define ADDRAH 0xa4000080 -#define ADDRAL 0xa4000082 -#define ADDRBH 0xa4000084 -#define ADDRBL 0xa4000086 -#define ADDRCH 0xa4000088 -#define ADDRCL 0xa400008a -#define ADDRDH 0xa400008c -#define ADDRDL 0xa400008e -#define ADCSR 0xa4000090 - -#define ADCSR_ADF 0x80 -#define ADCSR_ADIE 0x40 -#define ADCSR_ADST 0x20 -#define ADCSR_MULTI 0x10 -#define ADCSR_CKS 0x08 -#define ADCSR_CH_MASK 0x07 - -#define ADCR 0xa4000092 - -#endif /* __ASM_CPU_SH3_ADC_H */ diff --git a/include/asm-sh/cpu-sh3/addrspace.h b/include/asm-sh/cpu-sh3/addrspace.h deleted file mode 100644 index 0f94726..0000000 --- a/include/asm-sh/cpu-sh3/addrspace.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999 by Kaz Kojima - * - * Defitions for the address spaces of the SH-3 CPUs. - */ -#ifndef __ASM_CPU_SH3_ADDRSPACE_H -#define __ASM_CPU_SH3_ADDRSPACE_H - -#define P0SEG 0x00000000 -#define P1SEG 0x80000000 -#define P2SEG 0xa0000000 -#define P3SEG 0xc0000000 -#define P4SEG 0xe0000000 - -#endif /* __ASM_CPU_SH3_ADDRSPACE_H */ diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h deleted file mode 100644 index bee2d81..0000000 --- a/include/asm-sh/cpu-sh3/cache.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/cache.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_CACHE_H -#define __ASM_CPU_SH3_CACHE_H - -#define L1_CACHE_SHIFT 4 - -#define SH_CACHE_VALID 1 -#define SH_CACHE_UPDATED 2 -#define SH_CACHE_COMBINED 4 -#define SH_CACHE_ASSOC 8 - -#define CCR 0xffffffec /* Address of Cache Control Register */ - -#define CCR_CACHE_CE 0x01 /* Cache Enable */ -#define CCR_CACHE_WT 0x02 /* Write-Through (for P0,U0,P3) (else writeback) */ -#define CCR_CACHE_CB 0x04 /* Write-Back (for P1) (else writethrough) */ -#define CCR_CACHE_CF 0x08 /* Cache Flush */ -#define CCR_CACHE_ORA 0x20 /* RAM mode */ - -#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_PHYSADDR_MASK 0x1ffffc00 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CF - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) || \ - defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define CCR3_REG 0xa40000b4 -#define CCR_CACHE_16KB 0x00010000 -#define CCR_CACHE_32KB 0x00020000 -#endif - -#endif /* __ASM_CPU_SH3_CACHE_H */ diff --git a/include/asm-sh/cpu-sh3/cacheflush.h b/include/asm-sh/cpu-sh3/cacheflush.h deleted file mode 100644 index f70d8ef7..0000000 --- a/include/asm-sh/cpu-sh3/cacheflush.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/cacheflush.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_CACHEFLUSH_H -#define __ASM_CPU_SH3_CACHEFLUSH_H - -/* - * Cache flushing: - * - * - flush_cache_all() flushes entire cache - * - flush_cache_mm(mm) flushes the specified mm context's cache lines - * - flush_cache_dup mm(mm) handles cache flushing when forking - * - flush_cache_page(mm, vmaddr, pfn) flushes a single page - * - flush_cache_range(vma, start, end) flushes a range of pages - * - * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache - * - flush_icache_range(start, end) flushes(invalidates) a range for icache - * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache - * - * Caches are indexed (effectively) by physical address on SH-3, so - * we don't need them. - */ - -#if defined(CONFIG_SH7705_CACHE_32KB) - -/* SH7705 is an SH3 processor with 32KB cache. This has alias issues like the - * SH4. Unlike the SH4 this is a unified cache so we need to do some work - * in mmap when 'exec'ing a new binary - */ - /* 32KB cache, 4kb PAGE sizes need to check bit 12 */ -#define CACHE_ALIAS 0x00001000 - -#define PG_mapped PG_arch_1 - -void flush_cache_all(void); -void flush_cache_mm(struct mm_struct *mm); -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn); -void flush_dcache_page(struct page *pg); -void flush_icache_range(unsigned long start, unsigned long end); -void flush_icache_page(struct vm_area_struct *vma, struct page *page); -#else -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#endif - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -/* SH3 has unified cache so no special action needed here */ -#define flush_cache_sigtramp(vaddr) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -#define p3_cache_init() do { } while (0) - -#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh3/dac.h b/include/asm-sh/cpu-sh3/dac.h deleted file mode 100644 index 05fda83..0000000 --- a/include/asm-sh/cpu-sh3/dac.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef __ASM_CPU_SH3_DAC_H -#define __ASM_CPU_SH3_DAC_H - -/* - * Copyright (C) 2003 Andriy Skulysh - */ - - -#define DADR0 0xa40000a0 -#define DADR1 0xa40000a2 -#define DACR 0xa40000a4 -#define DACR_DAOE1 0x80 -#define DACR_DAOE0 0x40 -#define DACR_DAE 0x20 - - -static __inline__ void sh_dac_enable(int channel) -{ - unsigned char v; - v = ctrl_inb(DACR); - if(channel) v |= DACR_DAOE1; - else v |= DACR_DAOE0; - ctrl_outb(v,DACR); -} - -static __inline__ void sh_dac_disable(int channel) -{ - unsigned char v; - v = ctrl_inb(DACR); - if(channel) v &= ~DACR_DAOE1; - else v &= ~DACR_DAOE0; - ctrl_outb(v,DACR); -} - -static __inline__ void sh_dac_output(u8 value, int channel) -{ - if(channel) ctrl_outb(value,DADR1); - else ctrl_outb(value,DADR0); -} - -#endif /* __ASM_CPU_SH3_DAC_H */ diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h deleted file mode 100644 index 6813c32..0000000 --- a/include/asm-sh/cpu-sh3/dma.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef __ASM_CPU_SH3_DMA_H -#define __ASM_CPU_SH3_DMA_H - - -#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define SH_DMAC_BASE 0xa4010020 -#else -#define SH_DMAC_BASE 0xa4000020 -#endif - -#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) -#define DMTE0_IRQ 48 -#define DMTE1_IRQ 49 -#define DMTE2_IRQ 50 -#define DMTE3_IRQ 51 -#define DMTE4_IRQ 76 -#define DMTE5_IRQ 77 -#endif - -/* Definitions for the SuperH DMAC */ -#define TM_BURST 0x00000020 -#define TS_8 0x00000000 -#define TS_16 0x00000008 -#define TS_32 0x00000010 -#define TS_128 0x00000018 - -#define CHCR_TS_MASK 0x18 -#define CHCR_TS_SHIFT 3 - -#define DMAOR_INIT DMAOR_DME - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - */ -enum { - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_128BIT, -}; - -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_128BIT] = 4, -}; - -#endif /* __ASM_CPU_SH3_DMA_H */ diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h deleted file mode 100644 index 53c6230..0000000 --- a/include/asm-sh/cpu-sh3/freq.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/freq.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_FREQ_H -#define __ASM_CPU_SH3_FREQ_H - -#ifdef CONFIG_CPU_SUBTYPE_SH7712 -#define FRQCR 0xA415FF80 -#else -#define FRQCR 0xffffff80 -#endif - -#define MIN_DIVISOR_NR 0 -#define MAX_DIVISOR_NR 4 - -#define FRQCR_CKOEN 0x0100 -#define FRQCR_PLLEN 0x0080 -#define FRQCR_PSTBY 0x0040 - -#endif /* __ASM_CPU_SH3_FREQ_H */ - diff --git a/include/asm-sh/cpu-sh3/gpio.h b/include/asm-sh/cpu-sh3/gpio.h deleted file mode 100644 index 4e53eb3..0000000 --- a/include/asm-sh/cpu-sh3/gpio.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/gpio.h - * - * Copyright (C) 2007 Markus Brunner, Mark Jonas - * - * Addresses for the Pin Function Controller - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef _CPU_SH3_GPIO_H -#define _CPU_SH3_GPIO_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) - -/* Control registers */ -#define PORT_PACR 0xA4050100UL -#define PORT_PBCR 0xA4050102UL -#define PORT_PCCR 0xA4050104UL -#define PORT_PDCR 0xA4050106UL -#define PORT_PECR 0xA4050108UL -#define PORT_PFCR 0xA405010AUL -#define PORT_PGCR 0xA405010CUL -#define PORT_PHCR 0xA405010EUL -#define PORT_PJCR 0xA4050110UL -#define PORT_PKCR 0xA4050112UL -#define PORT_PLCR 0xA4050114UL -#define PORT_PMCR 0xA4050116UL -#define PORT_PPCR 0xA4050118UL -#define PORT_PRCR 0xA405011AUL -#define PORT_PSCR 0xA405011CUL -#define PORT_PTCR 0xA405011EUL -#define PORT_PUCR 0xA4050120UL -#define PORT_PVCR 0xA4050122UL - -/* Data registers */ -#define PORT_PADR 0xA4050140UL -/* Address of PORT_PBDR is wrong in the datasheet, see errata 2005-09-21 */ -#define PORT_PBDR 0xA4050142UL -#define PORT_PCDR 0xA4050144UL -#define PORT_PDDR 0xA4050146UL -#define PORT_PEDR 0xA4050148UL -#define PORT_PFDR 0xA405014AUL -#define PORT_PGDR 0xA405014CUL -#define PORT_PHDR 0xA405014EUL -#define PORT_PJDR 0xA4050150UL -#define PORT_PKDR 0xA4050152UL -#define PORT_PLDR 0xA4050154UL -#define PORT_PMDR 0xA4050156UL -#define PORT_PPDR 0xA4050158UL -#define PORT_PRDR 0xA405015AUL -#define PORT_PSDR 0xA405015CUL -#define PORT_PTDR 0xA405015EUL -#define PORT_PUDR 0xA4050160UL -#define PORT_PVDR 0xA4050162UL - -/* Pin Select Registers */ -#define PORT_PSELA 0xA4050124UL -#define PORT_PSELB 0xA4050126UL -#define PORT_PSELC 0xA4050128UL -#define PORT_PSELD 0xA405012AUL - -#endif - -#endif diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h deleted file mode 100644 index ab09da7..0000000 --- a/include/asm-sh/cpu-sh3/mmu_context.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/mmu_context.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_MMU_CONTEXT_H -#define __ASM_CPU_SH3_MMU_CONTEXT_H - -#define MMU_PTEH 0xFFFFFFF0 /* Page table entry register HIGH */ -#define MMU_PTEL 0xFFFFFFF4 /* Page table entry register LOW */ -#define MMU_TTB 0xFFFFFFF8 /* Translation table base register */ -#define MMU_TEA 0xFFFFFFFC /* TLB Exception Address */ - -#define MMUCR 0xFFFFFFE0 /* MMU Control Register */ - -#define MMU_TLB_ADDRESS_ARRAY 0xF2000000 -#define MMU_PAGE_ASSOC_BIT 0x80 - -#define MMU_NTLB_ENTRIES 128 /* for 7708 */ -#define MMU_NTLB_WAYS 4 -#define MMU_CONTROL_INIT 0x007 /* SV=0, TF=1, IX=1, AT=1 */ - -#define TRA 0xffffffd0 -#define EXPEVT 0xffffffd4 - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ - defined(CONFIG_CPU_SUBTYPE_SH7706) || \ - defined(CONFIG_CPU_SUBTYPE_SH7707) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) || \ - defined(CONFIG_CPU_SUBTYPE_SH7710) || \ - defined(CONFIG_CPU_SUBTYPE_SH7712) || \ - defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ -#else -#define INTEVT 0xffffffd8 -#endif - -#endif /* __ASM_CPU_SH3_MMU_CONTEXT_H */ - diff --git a/include/asm-sh/cpu-sh3/rtc.h b/include/asm-sh/cpu-sh3/rtc.h deleted file mode 100644 index 319404a..0000000 --- a/include/asm-sh/cpu-sh3/rtc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_CPU_SH3_RTC_H -#define __ASM_SH_CPU_SH3_RTC_H - -#define rtc_reg_size sizeof(u16) -#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */ -#define RTC_DEF_CAPABILITIES 0UL - -#endif /* __ASM_SH_CPU_SH3_RTC_H */ diff --git a/include/asm-sh/cpu-sh3/sigcontext.h b/include/asm-sh/cpu-sh3/sigcontext.h deleted file mode 100644 index 17310dc..0000000 --- a/include/asm-sh/cpu-sh3/sigcontext.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_CPU_SH3_SIGCONTEXT_H -#define __ASM_CPU_SH3_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; -}; - -#endif /* __ASM_CPU_SH3_SIGCONTEXT_H */ diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h deleted file mode 100644 index 793acf1..0000000 --- a/include/asm-sh/cpu-sh3/timer.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/timer.h - * - * Copyright (C) 2004 Lineo Solutions, Inc. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_TIMER_H -#define __ASM_CPU_SH3_TIMER_H - -/* - * --------------------------------------------------------------------------- - * TMU Common definitions for SH3 processors - * SH7706 - * SH7709S - * SH7727 - * SH7729R - * SH7710 - * SH7720 - * SH7710 - * --------------------------------------------------------------------------- - */ - -#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) -#define TMU_TOCR 0xfffffe90 /* Byte access */ -#endif - -#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ - defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define TMU_012_TSTR 0xa412fe92 /* Byte access */ - -#define TMU0_TCOR 0xa412fe94 /* Long access */ -#define TMU0_TCNT 0xa412fe98 /* Long access */ -#define TMU0_TCR 0xa412fe9c /* Word access */ - -#define TMU1_TCOR 0xa412fea0 /* Long access */ -#define TMU1_TCNT 0xa412fea4 /* Long access */ -#define TMU1_TCR 0xa412fea8 /* Word access */ - -#define TMU2_TCOR 0xa412feac /* Long access */ -#define TMU2_TCNT 0xa412feb0 /* Long access */ -#define TMU2_TCR 0xa412feb4 /* Word access */ - -#else -#define TMU_012_TSTR 0xfffffe92 /* Byte access */ - -#define TMU0_TCOR 0xfffffe94 /* Long access */ -#define TMU0_TCNT 0xfffffe98 /* Long access */ -#define TMU0_TCR 0xfffffe9c /* Word access */ - -#define TMU1_TCOR 0xfffffea0 /* Long access */ -#define TMU1_TCNT 0xfffffea4 /* Long access */ -#define TMU1_TCR 0xfffffea8 /* Word access */ - -#define TMU2_TCOR 0xfffffeac /* Long access */ -#define TMU2_TCNT 0xfffffeb0 /* Long access */ -#define TMU2_TCR 0xfffffeb4 /* Word access */ -#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721) -#define TMU2_TCPR2 0xfffffeb8 /* Long access */ -#endif -#endif - -#endif /* __ASM_CPU_SH3_TIMER_H */ - diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h deleted file mode 100644 index 4e6381d..0000000 --- a/include/asm-sh/cpu-sh3/ubc.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_UBC_H -#define __ASM_CPU_SH3_UBC_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ - defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) -#define UBC_BARA 0xa4ffffb0 -#define UBC_BAMRA 0xa4ffffb4 -#define UBC_BBRA 0xa4ffffb8 -#define UBC_BASRA 0xffffffe4 -#define UBC_BARB 0xa4ffffa0 -#define UBC_BAMRB 0xa4ffffa4 -#define UBC_BBRB 0xa4ffffa8 -#define UBC_BASRB 0xffffffe8 -#define UBC_BDRB 0xa4ffff90 -#define UBC_BDMRB 0xa4ffff94 -#define UBC_BRCR 0xa4ffff98 -#else -#define UBC_BARA 0xffffffb0 -#define UBC_BAMRA 0xffffffb4 -#define UBC_BBRA 0xffffffb8 -#define UBC_BASRA 0xffffffe4 -#define UBC_BARB 0xffffffa0 -#define UBC_BAMRB 0xffffffa4 -#define UBC_BBRB 0xffffffa8 -#define UBC_BASRB 0xffffffe8 -#define UBC_BDRB 0xffffff90 -#define UBC_BDMRB 0xffffff94 -#define UBC_BRCR 0xffffff98 -#endif - -#endif /* __ASM_CPU_SH3_UBC_H */ diff --git a/include/asm-sh/cpu-sh3/watchdog.h b/include/asm-sh/cpu-sh3/watchdog.h deleted file mode 100644 index 4ee0347..0000000 --- a/include/asm-sh/cpu-sh3/watchdog.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-sh/cpu-sh3/watchdog.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH3_WATCHDOG_H -#define __ASM_CPU_SH3_WATCHDOG_H - -/* Register definitions */ -#define WTCNT 0xffffff84 -#define WTCSR 0xffffff86 - -/* Bit definitions */ -#define WTCSR_TME 0x80 -#define WTCSR_WT 0x40 -#define WTCSR_RSTS 0x20 -#define WTCSR_WOVF 0x10 -#define WTCSR_IOVF 0x08 - -#endif /* __ASM_CPU_SH3_WATCHDOG_H */ - diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h deleted file mode 100644 index a3fa733..0000000 --- a/include/asm-sh/cpu-sh4/addrspace.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999 by Kaz Kojima - * - * Defitions for the address spaces of the SH-4 CPUs. - */ -#ifndef __ASM_CPU_SH4_ADDRSPACE_H -#define __ASM_CPU_SH4_ADDRSPACE_H - -#define P0SEG 0x00000000 -#define P1SEG 0x80000000 -#define P2SEG 0xa0000000 -#define P3SEG 0xc0000000 -#define P4SEG 0xe0000000 - -/* Detailed P4SEG */ -#define P4SEG_STORE_QUE (P4SEG) -#define P4SEG_IC_ADDR 0xf0000000 -#define P4SEG_IC_DATA 0xf1000000 -#define P4SEG_ITLB_ADDR 0xf2000000 -#define P4SEG_ITLB_DATA 0xf3000000 -#define P4SEG_OC_ADDR 0xf4000000 -#define P4SEG_OC_DATA 0xf5000000 -#define P4SEG_TLB_ADDR 0xf6000000 -#define P4SEG_TLB_DATA 0xf7000000 -#define P4SEG_REG_BASE 0xff000000 - -#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */ -#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */ - -#endif /* __ASM_CPU_SH4_ADDRSPACE_H */ - diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h deleted file mode 100644 index 1c61ebf..0000000 --- a/include/asm-sh/cpu-sh4/cache.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/cache.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_CACHE_H -#define __ASM_CPU_SH4_CACHE_H - -#define L1_CACHE_SHIFT 5 - -#define SH_CACHE_VALID 1 -#define SH_CACHE_UPDATED 2 -#define SH_CACHE_COMBINED 4 -#define SH_CACHE_ASSOC 8 - -#define CCR 0xff00001c /* Address of Cache Control Register */ -#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ -#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ -#define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */ -#define CCR_CACHE_OCI 0x0008 /* OC Invalidate */ -#define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */ -#define CCR_CACHE_OIX 0x0080 /* OC Index Enable */ -#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ -#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ -#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ -#ifndef CONFIG_CPU_SH4A -#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ -#endif - -/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ -#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) -#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI|CCR_CACHE_ICI) - -#define CACHE_IC_ADDRESS_ARRAY 0xf0000000 -#define CACHE_OC_ADDRESS_ARRAY 0xf4000000 - -#endif /* __ASM_CPU_SH4_CACHE_H */ - diff --git a/include/asm-sh/cpu-sh4/cacheflush.h b/include/asm-sh/cpu-sh4/cacheflush.h deleted file mode 100644 index 065306d..0000000 --- a/include/asm-sh/cpu-sh4/cacheflush.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/cacheflush.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_CACHEFLUSH_H -#define __ASM_CPU_SH4_CACHEFLUSH_H - -/* - * Caches are broken on SH-4 (unless we use write-through - * caching; in which case they're only semi-broken), - * so we need them. - */ -void flush_cache_all(void); -void flush_dcache_all(void); -void flush_cache_mm(struct mm_struct *mm); -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, - unsigned long pfn); -void flush_dcache_page(struct page *pg); - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -void flush_icache_range(unsigned long start, unsigned long end); -void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, - unsigned long addr, int len); - -#define flush_icache_page(vma,pg) do { } while (0) - -/* Initialization of P3 area for copy_user_page */ -void p3_cache_init(void); - -#define PG_mapped PG_arch_1 - -#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ diff --git a/include/asm-sh/cpu-sh4/dma-sh7780.h b/include/asm-sh/cpu-sh4/dma-sh7780.h deleted file mode 100644 index 71b426a..0000000 --- a/include/asm-sh/cpu-sh4/dma-sh7780.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H -#define __ASM_SH_CPU_SH4_DMA_SH7780_H - -#define REQ_HE 0x000000C0 -#define REQ_H 0x00000080 -#define REQ_LE 0x00000040 -#define TM_BURST 0x0000020 -#define TS_8 0x00000000 -#define TS_16 0x00000008 -#define TS_32 0x00000010 -#define TS_16BLK 0x00000018 -#define TS_32BLK 0x00100000 - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - * - * Defaults to a 64-bit transfer size. - */ -enum { - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_128BIT, - XMIT_SZ_256BIT, -}; - -/* - * The DMA count is defined as the number of bytes to transfer. - */ -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_128BIT] = 4, - [XMIT_SZ_256BIT] = 5, -}; - -#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */ diff --git a/include/asm-sh/cpu-sh4/dma.h b/include/asm-sh/cpu-sh4/dma.h deleted file mode 100644 index aaf71b0..0000000 --- a/include/asm-sh/cpu-sh4/dma.h +++ /dev/null @@ -1,65 +0,0 @@ -#ifndef __ASM_CPU_SH4_DMA_H -#define __ASM_CPU_SH4_DMA_H - -#define DMAOR_INIT ( 0x8000 | DMAOR_DME ) - -/* SH7751/7760/7780 DMA IRQ sources */ -#define DMTE0_IRQ 34 -#define DMTE1_IRQ 35 -#define DMTE2_IRQ 36 -#define DMTE3_IRQ 37 -#define DMTE4_IRQ 44 -#define DMTE5_IRQ 45 -#define DMTE6_IRQ 46 -#define DMTE7_IRQ 47 -#define DMAE_IRQ 38 - -#ifdef CONFIG_CPU_SH4A -#define SH_DMAC_BASE 0xfc808020 - -#define CHCR_TS_MASK 0x18 -#define CHCR_TS_SHIFT 3 - -#include -#else -#define SH_DMAC_BASE 0xffa00000 - -/* Definitions for the SuperH DMAC */ -#define TM_BURST 0x0000080 -#define TS_8 0x00000010 -#define TS_16 0x00000020 -#define TS_32 0x00000030 -#define TS_64 0x00000000 - -#define CHCR_TS_MASK 0x70 -#define CHCR_TS_SHIFT 4 - -#define DMAOR_COD 0x00000008 - -/* - * The SuperH DMAC supports a number of transmit sizes, we list them here, - * with their respective values as they appear in the CHCR registers. - * - * Defaults to a 64-bit transfer size. - */ -enum { - XMIT_SZ_64BIT, - XMIT_SZ_8BIT, - XMIT_SZ_16BIT, - XMIT_SZ_32BIT, - XMIT_SZ_256BIT, -}; - -/* - * The DMA count is defined as the number of bytes to transfer. - */ -static unsigned int ts_shift[] __maybe_unused = { - [XMIT_SZ_64BIT] = 3, - [XMIT_SZ_8BIT] = 0, - [XMIT_SZ_16BIT] = 1, - [XMIT_SZ_32BIT] = 2, - [XMIT_SZ_256BIT] = 5, -}; -#endif - -#endif /* __ASM_CPU_SH4_DMA_H */ diff --git a/include/asm-sh/cpu-sh4/fpu.h b/include/asm-sh/cpu-sh4/fpu.h deleted file mode 100644 index febef73..0000000 --- a/include/asm-sh/cpu-sh4/fpu.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/arch/sh/kernel/cpu/sh4/sh4_fpu.h - * - * Copyright (C) 2006 STMicroelectronics Limited - * Author: Carl Shaw - * - * May be copied or modified under the terms of the GNU General Public - * License Version 2. See linux/COPYING for more information. - * - * Definitions for SH4 FPU operations - */ - -#ifndef __CPU_SH4_FPU_H -#define __CPU_SH4_FPU_H - -#define FPSCR_ENABLE_MASK 0x00000f80UL - -#define FPSCR_FMOV_DOUBLE (1<<1) - -#define FPSCR_CAUSE_INEXACT (1<<12) -#define FPSCR_CAUSE_UNDERFLOW (1<<13) -#define FPSCR_CAUSE_OVERFLOW (1<<14) -#define FPSCR_CAUSE_DIVZERO (1<<15) -#define FPSCR_CAUSE_INVALID (1<<16) -#define FPSCR_CAUSE_ERROR (1<<17) - -#define FPSCR_DBL_PRECISION (1<<19) -#define FPSCR_ROUNDING_MODE(x) ((x >> 20) & 3) -#define FPSCR_RM_NEAREST (0) -#define FPSCR_RM_ZERO (1) - -#endif diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h deleted file mode 100644 index c23af81..0000000 --- a/include/asm-sh/cpu-sh4/freq.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/freq.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_FREQ_H -#define __ASM_CPU_SH4_FREQ_H - -#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ - defined(CONFIG_CPU_SUBTYPE_SH7723) || \ - defined(CONFIG_CPU_SUBTYPE_SH7343) || \ - defined(CONFIG_CPU_SUBTYPE_SH7366) -#define FRQCR 0xa4150000 -#define VCLKCR 0xa4150004 -#define SCLKACR 0xa4150008 -#define SCLKBCR 0xa415000c -#define IrDACLKCR 0xa4150010 -#define MSTPCR0 0xa4150030 -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 -#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ - defined(CONFIG_CPU_SUBTYPE_SH7780) -#define FRQCR 0xffc80000 -#elif defined(CONFIG_CPU_SUBTYPE_SH7785) -#define FRQCR0 0xffc80000 -#define FRQCR1 0xffc80004 -#define FRQMR1 0xffc80014 -#elif defined(CONFIG_CPU_SUBTYPE_SHX3) -#define FRQCR 0xffc00014 -#else -#define FRQCR 0xffc00000 -#define FRQCR_PSTBY 0x0200 -#define FRQCR_PLLEN 0x0400 -#define FRQCR_CKOEN 0x0800 -#endif -#define MIN_DIVISOR_NR 0 -#define MAX_DIVISOR_NR 3 - -#endif /* __ASM_CPU_SH4_FREQ_H */ - diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h deleted file mode 100644 index 9ea8eb2..0000000 --- a/include/asm-sh/cpu-sh4/mmu_context.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/mmu_context.h - * - * Copyright (C) 1999 Niibe Yutaka - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_MMU_CONTEXT_H -#define __ASM_CPU_SH4_MMU_CONTEXT_H - -#define MMU_PTEH 0xFF000000 /* Page table entry register HIGH */ -#define MMU_PTEL 0xFF000004 /* Page table entry register LOW */ -#define MMU_TTB 0xFF000008 /* Translation table base register */ -#define MMU_TEA 0xFF00000C /* TLB Exception Address */ -#define MMU_PTEA 0xFF000034 /* Page table entry assistance register */ - -#define MMUCR 0xFF000010 /* MMU Control Register */ - -#define MMU_ITLB_ADDRESS_ARRAY 0xF2000000 -#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 -#define MMU_PAGE_ASSOC_BIT 0x80 - -#define MMUCR_TI (1<<2) - -#ifdef CONFIG_X2TLB -#define MMUCR_ME (1 << 7) -#else -#define MMUCR_ME (0) -#endif - -#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) -#define MMUCR_SE (1 << 4) -#else -#define MMUCR_SE (0) -#endif - -#ifdef CONFIG_SH_STORE_QUEUES -#define MMUCR_SQMD (1 << 9) -#else -#define MMUCR_SQMD (0) -#endif - -#define MMU_NTLB_ENTRIES 64 -#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE) - -#define MMU_ITLB_DATA_ARRAY 0xF3000000 -#define MMU_UTLB_DATA_ARRAY 0xF7000000 - -#define MMU_UTLB_ENTRIES 64 -#define MMU_U_ENTRY_SHIFT 8 -#define MMU_UTLB_VALID 0x100 -#define MMU_ITLB_ENTRIES 4 -#define MMU_I_ENTRY_SHIFT 8 -#define MMU_ITLB_VALID 0x100 - -#define TRA 0xff000020 -#define EXPEVT 0xff000024 -#define INTEVT 0xff000028 - -#endif /* __ASM_CPU_SH4_MMU_CONTEXT_H */ - diff --git a/include/asm-sh/cpu-sh4/rtc.h b/include/asm-sh/cpu-sh4/rtc.h deleted file mode 100644 index 25b1e6a..0000000 --- a/include/asm-sh/cpu-sh4/rtc.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_SH_CPU_SH4_RTC_H -#define __ASM_SH_CPU_SH4_RTC_H - -#ifdef CONFIG_CPU_SUBTYPE_SH7723 -#define rtc_reg_size sizeof(u16) -#else -#define rtc_reg_size sizeof(u32) -#endif - -#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */ -#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR - -#endif /* __ASM_SH_CPU_SH4_RTC_H */ diff --git a/include/asm-sh/cpu-sh4/sigcontext.h b/include/asm-sh/cpu-sh4/sigcontext.h deleted file mode 100644 index ab392f1..0000000 --- a/include/asm-sh/cpu-sh4/sigcontext.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef __ASM_CPU_SH4_SIGCONTEXT_H -#define __ASM_CPU_SH4_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; - - /* FPU registers */ - unsigned long sc_fpregs[16]; - unsigned long sc_xfpregs[16]; - unsigned int sc_fpscr; - unsigned int sc_fpul; - unsigned int sc_ownedfp; -}; - -#endif /* __ASM_CPU_SH4_SIGCONTEXT_H */ diff --git a/include/asm-sh/cpu-sh4/sq.h b/include/asm-sh/cpu-sh4/sq.h deleted file mode 100644 index 586d649..0000000 --- a/include/asm-sh/cpu-sh4/sq.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/sq.h - * - * Copyright (C) 2001, 2002, 2003 Paul Mundt - * Copyright (C) 2001, 2002 M. R. Brown - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_SQ_H -#define __ASM_CPU_SH4_SQ_H - -#include - -/* - * Store queues range from e0000000-e3fffffc, allowing approx. 64MB to be - * mapped to any physical address space. Since data is written (and aligned) - * to 32-byte boundaries, we need to be sure that all allocations are aligned. - */ -#define SQ_SIZE 32 -#define SQ_ALIGN_MASK (~(SQ_SIZE - 1)) -#define SQ_ALIGN(addr) (((addr)+SQ_SIZE-1) & SQ_ALIGN_MASK) - -#define SQ_QACR0 (P4SEG_REG_BASE + 0x38) -#define SQ_QACR1 (P4SEG_REG_BASE + 0x3c) -#define SQ_ADDRMAX (P4SEG_STORE_QUE + 0x04000000) - -/* arch/sh/kernel/cpu/sh4/sq.c */ -unsigned long sq_remap(unsigned long phys, unsigned int size, - const char *name, unsigned long flags); -void sq_unmap(unsigned long vaddr); -void sq_flush_range(unsigned long start, unsigned int len); - -#endif /* __ASM_CPU_SH4_SQ_H */ diff --git a/include/asm-sh/cpu-sh4/timer.h b/include/asm-sh/cpu-sh4/timer.h deleted file mode 100644 index d1e796b..0000000 --- a/include/asm-sh/cpu-sh4/timer.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/timer.h - * - * Copyright (C) 2004 Lineo Solutions, Inc. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_TIMER_H -#define __ASM_CPU_SH4_TIMER_H - -/* - * --------------------------------------------------------------------------- - * TMU Common definitions for SH4 processors - * SH7750S/SH7750R - * SH7751/SH7751R - * SH7760 - * SH-X3 - * --------------------------------------------------------------------------- - */ -#ifdef CONFIG_CPU_SUBTYPE_SHX3 -#define TMU_012_BASE 0xffc10000 -#define TMU_345_BASE 0xffc20000 -#else -#define TMU_012_BASE 0xffd80000 -#define TMU_345_BASE 0xfe100000 -#endif - -#define TMU_TOCR TMU_012_BASE /* Not supported on all CPUs */ - -#define TMU_012_TSTR (TMU_012_BASE + 0x04) -#define TMU_345_TSTR (TMU_345_BASE + 0x04) - -#define TMU0_TCOR (TMU_012_BASE + 0x08) -#define TMU0_TCNT (TMU_012_BASE + 0x0c) -#define TMU0_TCR (TMU_012_BASE + 0x10) - -#define TMU1_TCOR (TMU_012_BASE + 0x14) -#define TMU1_TCNT (TMU_012_BASE + 0x18) -#define TMU1_TCR (TMU_012_BASE + 0x1c) - -#define TMU2_TCOR (TMU_012_BASE + 0x20) -#define TMU2_TCNT (TMU_012_BASE + 0x24) -#define TMU2_TCR (TMU_012_BASE + 0x28) -#define TMU2_TCPR (TMU_012_BASE + 0x2c) - -#define TMU3_TCOR (TMU_345_BASE + 0x08) -#define TMU3_TCNT (TMU_345_BASE + 0x0c) -#define TMU3_TCR (TMU_345_BASE + 0x10) - -#define TMU4_TCOR (TMU_345_BASE + 0x14) -#define TMU4_TCNT (TMU_345_BASE + 0x18) -#define TMU4_TCR (TMU_345_BASE + 0x1c) - -#define TMU5_TCOR (TMU_345_BASE + 0x20) -#define TMU5_TCNT (TMU_345_BASE + 0x24) -#define TMU5_TCR (TMU_345_BASE + 0x28) - -#endif /* __ASM_CPU_SH4_TIMER_H */ diff --git a/include/asm-sh/cpu-sh4/ubc.h b/include/asm-sh/cpu-sh4/ubc.h deleted file mode 100644 index c86e170..0000000 --- a/include/asm-sh/cpu-sh4/ubc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2006 Lineo Solutions Inc. support SH4A UBC - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_UBC_H -#define __ASM_CPU_SH4_UBC_H - -#if defined(CONFIG_CPU_SH4A) -#define UBC_CBR0 0xff200000 -#define UBC_CRR0 0xff200004 -#define UBC_CAR0 0xff200008 -#define UBC_CAMR0 0xff20000c -#define UBC_CBR1 0xff200020 -#define UBC_CRR1 0xff200024 -#define UBC_CAR1 0xff200028 -#define UBC_CAMR1 0xff20002c -#define UBC_CDR1 0xff200030 -#define UBC_CDMR1 0xff200034 -#define UBC_CETR1 0xff200038 -#define UBC_CCMFR 0xff200600 -#define UBC_CBCR 0xff200620 - -/* CBR */ -#define UBC_CBR_AIE (0x01<<30) -#define UBC_CBR_ID_INST (0x01<<4) -#define UBC_CBR_RW_READ (0x01<<1) -#define UBC_CBR_CE (0x01) - -#define UBC_CBR_AIV_MASK (0x00FF0000) -#define UBC_CBR_AIV_SHIFT (16) -#define UBC_CBR_AIV_SET(asid) (((asid)<| - * +-----------------------------+-----------------+------+----------+------+ - * | | | ways |set index |offset| - * +-----------------------------+-----------------+------+----------+------+ - * ^ 2 bits 8 bits 5 bits - * +- Bit 31 - * - * Cacheline size is based on offset: 5 bits = 32 bytes per line - * A cache line is identified by a tag + set but OCACHETAG/ICACHETAG - * have a broader space for registers. These are outlined by - * CACHE_?C_*_STEP below. - * - */ - -/* Instruction cache */ -#define CACHE_IC_ADDRESS_ARRAY 0x01000000 - -/* Operand Cache */ -#define CACHE_OC_ADDRESS_ARRAY 0x01800000 - -/* These declarations relate to cache 'synonyms' in the operand cache. A - 'synonym' occurs where effective address bits overlap between those used for - indexing the cache sets and those passed to the MMU for translation. In the - case of SH5-101 & SH5-103, only bit 12 is affected for 4k pages. */ - -#define CACHE_OC_N_SYNBITS 1 /* Number of synonym bits */ -#define CACHE_OC_SYN_SHIFT 12 -/* Mask to select synonym bit(s) */ -#define CACHE_OC_SYN_MASK (((1UL<). -** Assigns symbolic names to control & target registers. -*/ - -/* - * Define some useful aliases for control registers. - */ -#define SR cr0 -#define SSR cr1 -#define PSSR cr2 - /* cr3 UNDEFINED */ -#define INTEVT cr4 -#define EXPEVT cr5 -#define PEXPEVT cr6 -#define TRA cr7 -#define SPC cr8 -#define PSPC cr9 -#define RESVEC cr10 -#define VBR cr11 - /* cr12 UNDEFINED */ -#define TEA cr13 - /* cr14-cr15 UNDEFINED */ -#define DCR cr16 -#define KCR0 cr17 -#define KCR1 cr18 - /* cr19-cr31 UNDEFINED */ - /* cr32-cr61 RESERVED */ -#define CTC cr62 -#define USR cr63 - -/* - * ABI dependent registers (general purpose set) - */ -#define RET r2 -#define ARG1 r2 -#define ARG2 r3 -#define ARG3 r4 -#define ARG4 r5 -#define ARG5 r6 -#define ARG6 r7 -#define SP r15 -#define LINK r18 -#define ZERO r63 - -/* - * Status register defines: used only by assembly sources (and - * syntax independednt) - */ -#define SR_RESET_VAL 0x0000000050008000 -#define SR_HARMLESS 0x00000000500080f0 /* Write ignores for most */ -#define SR_ENABLE_FPU 0xffffffffffff7fff /* AND with this */ - -#if defined (CONFIG_SH64_SR_WATCH) -#define SR_ENABLE_MMU 0x0000000084000000 /* OR with this */ -#else -#define SR_ENABLE_MMU 0x0000000080000000 /* OR with this */ -#endif - -#define SR_UNBLOCK_EXC 0xffffffffefffffff /* AND with this */ -#define SR_BLOCK_EXC 0x0000000010000000 /* OR with this */ - -#else /* Not __ASSEMBLY__ syntax */ - -/* -** Stringify reg. name -*/ -#define __str(x) #x - -/* Stringify control register names for use in inline assembly */ -#define __SR __str(SR) -#define __SSR __str(SSR) -#define __PSSR __str(PSSR) -#define __INTEVT __str(INTEVT) -#define __EXPEVT __str(EXPEVT) -#define __PEXPEVT __str(PEXPEVT) -#define __TRA __str(TRA) -#define __SPC __str(SPC) -#define __PSPC __str(PSPC) -#define __RESVEC __str(RESVEC) -#define __VBR __str(VBR) -#define __TEA __str(TEA) -#define __DCR __str(DCR) -#define __KCR0 __str(KCR0) -#define __KCR1 __str(KCR1) -#define __CTC __str(CTC) -#define __USR __str(USR) - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_CPU_SH5_REGISTERS_H */ diff --git a/include/asm-sh/cpu-sh5/rtc.h b/include/asm-sh/cpu-sh5/rtc.h deleted file mode 100644 index 12ea0ed..0000000 --- a/include/asm-sh/cpu-sh5/rtc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_SH_CPU_SH5_RTC_H -#define __ASM_SH_CPU_SH5_RTC_H - -#define rtc_reg_size sizeof(u32) -#define RTC_BIT_INVERTED 0 /* The SH-5 RTC is surprisingly sane! */ -#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR - -#endif /* __ASM_SH_CPU_SH5_RTC_H */ diff --git a/include/asm-sh/cpu-sh5/timer.h b/include/asm-sh/cpu-sh5/timer.h deleted file mode 100644 index 88da9b3..0000000 --- a/include/asm-sh/cpu-sh5/timer.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASM_SH_CPU_SH5_TIMER_H -#define __ASM_SH_CPU_SH5_TIMER_H - -#endif /* __ASM_SH_CPU_SH5_TIMER_H */ diff --git a/include/asm-sh/cputime.h b/include/asm-sh/cputime.h deleted file mode 100644 index 6ca395d..0000000 --- a/include/asm-sh/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __SH_CPUTIME_H -#define __SH_CPUTIME_H - -#include - -#endif /* __SH_CPUTIME_H */ diff --git a/include/asm-sh/current.h b/include/asm-sh/current.h deleted file mode 100644 index 62b6388..0000000 --- a/include/asm-sh/current.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_SH_CURRENT_H -#define __ASM_SH_CURRENT_H - -/* - * Copyright (C) 1999 Niibe Yutaka - * - */ - -#include - -struct task_struct; - -static __inline__ struct task_struct * get_current(void) -{ - return current_thread_info()->task; -} - -#define current get_current() - -#endif /* __ASM_SH_CURRENT_H */ diff --git a/include/asm-sh/delay.h b/include/asm-sh/delay.h deleted file mode 100644 index 4b16bf9..0000000 --- a/include/asm-sh/delay.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __ASM_SH_DELAY_H -#define __ASM_SH_DELAY_H - -/* - * Copyright (C) 1993 Linus Torvalds - * - * Delay routines calling functions in arch/sh/lib/delay.c - */ - -extern void __bad_udelay(void); -extern void __bad_ndelay(void); - -extern void __udelay(unsigned long usecs); -extern void __ndelay(unsigned long nsecs); -extern void __const_udelay(unsigned long xloops); -extern void __delay(unsigned long loops); - -#define udelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ - __udelay(n)) - -#define ndelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ - __ndelay(n)) - -#endif /* __ASM_SH_DELAY_H */ diff --git a/include/asm-sh/device.h b/include/asm-sh/device.h deleted file mode 100644 index efd511d..0000000 --- a/include/asm-sh/device.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include - -struct platform_device; -/* allocate contiguous memory chunk and fill in struct resource */ -int platform_resource_setup_memory(struct platform_device *pdev, - char *name, unsigned long memsize); - diff --git a/include/asm-sh/div64.h b/include/asm-sh/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-sh/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h deleted file mode 100644 index 6c0b8a2..0000000 --- a/include/asm-sh/dma-mapping.h +++ /dev/null @@ -1,192 +0,0 @@ -#ifndef __ASM_SH_DMA_MAPPING_H -#define __ASM_SH_DMA_MAPPING_H - -#include -#include -#include -#include - -extern struct bus_type pci_bus_type; - -#define dma_supported(dev, mask) (1) - -static inline int dma_set_mask(struct device *dev, u64 mask) -{ - if (!dev->dma_mask || !dma_supported(dev, mask)) - return -EIO; - - *dev->dma_mask = mask; - - return 0; -} - -void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); - -void dma_free_coherent(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); - -void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction dir); - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d, h) (1) - -static inline dma_addr_t dma_map_single(struct device *dev, - void *ptr, size_t size, - enum dma_data_direction dir) -{ -#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) - if (dev->bus == &pci_bus_type) - return virt_to_phys(ptr); -#endif - dma_cache_sync(dev, ptr, size, dir); - - return virt_to_phys(ptr); -} - -#define dma_unmap_single(dev, addr, size, dir) do { } while (0) - -static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++) { -#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) - dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); -#endif - sg[i].dma_address = sg_phys(&sg[i]); - } - - return nents; -} - -#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0) - -static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction dir) -{ - return dma_map_single(dev, page_address(page) + offset, size, dir); -} - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, enum dma_data_direction dir) -{ - dma_unmap_single(dev, dma_address, size, dir); -} - -static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction dir) -{ -#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) - if (dev->bus == &pci_bus_type) - return; -#endif - dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir); -} - -static inline void dma_sync_single_range(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction dir) -{ -#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT) - if (dev->bus == &pci_bus_type) - return; -#endif - dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir); -} - -static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg, - int nelems, enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nelems; i++) { -#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT) - dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir); -#endif - sg[i].dma_address = sg_phys(&sg[i]); - } -} - -static inline void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction dir) -{ - dma_sync_single(dev, dma_handle, size, dir); -} - -static inline void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, - size_t size, - enum dma_data_direction dir) -{ - dma_sync_single(dev, dma_handle, size, dir); -} - -static inline void dma_sync_single_range_for_cpu(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); -} - -static inline void dma_sync_single_range_for_device(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - dma_sync_single_for_device(dev, dma_handle+offset, size, direction); -} - - -static inline void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) -{ - dma_sync_sg(dev, sg, nelems, dir); -} - -static inline void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction dir) -{ - dma_sync_sg(dev, sg, nelems, dir); -} - - -static inline int dma_get_cache_alignment(void) -{ - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -} - -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ - return dma_addr == 0; -} - -#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY - -extern int -dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, - dma_addr_t device_addr, size_t size, int flags); - -extern void -dma_release_declared_memory(struct device *dev); - -extern void * -dma_mark_declared_memory_occupied(struct device *dev, - dma_addr_t device_addr, size_t size); - -#endif /* __ASM_SH_DMA_MAPPING_H */ diff --git a/include/asm-sh/dma.h b/include/asm-sh/dma.h deleted file mode 100644 index a65b02f..0000000 --- a/include/asm-sh/dma.h +++ /dev/null @@ -1,166 +0,0 @@ -/* - * include/asm-sh/dma.h - * - * Copyright (C) 2003, 2004 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_DMA_H -#define __ASM_SH_DMA_H -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -/* The maximum address that we can perform a DMA transfer to on this platform */ -/* Don't define MAX_DMA_ADDRESS; it's useless on the SuperH and any - occurrence should be flagged as an error. */ -/* But... */ -/* XXX: This is not applicable to SuperH, just needed for alloc_bootmem */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) - -#ifdef CONFIG_NR_DMA_CHANNELS -# define MAX_DMA_CHANNELS (CONFIG_NR_DMA_CHANNELS) -#else -# define MAX_DMA_CHANNELS (CONFIG_NR_ONCHIP_DMA_CHANNELS) -#endif - -/* - * Read and write modes can mean drastically different things depending on the - * channel configuration. Consult your DMAC documentation and module - * implementation for further clues. - */ -#define DMA_MODE_READ 0x00 -#define DMA_MODE_WRITE 0x01 -#define DMA_MODE_MASK 0x01 - -#define DMA_AUTOINIT 0x10 - -/* - * DMAC (dma_info) flags - */ -enum { - DMAC_CHANNELS_CONFIGURED = 0x01, - DMAC_CHANNELS_TEI_CAPABLE = 0x02, /* Transfer end interrupt */ -}; - -/* - * DMA channel capabilities / flags - */ -enum { - DMA_CONFIGURED = 0x01, - - /* - * Transfer end interrupt, inherited from DMAC. - * wait_queue used in dma_wait_for_completion. - */ - DMA_TEI_CAPABLE = 0x02, -}; - -extern spinlock_t dma_spin_lock; - -struct dma_channel; - -struct dma_ops { - int (*request)(struct dma_channel *chan); - void (*free)(struct dma_channel *chan); - - int (*get_residue)(struct dma_channel *chan); - int (*xfer)(struct dma_channel *chan); - int (*configure)(struct dma_channel *chan, unsigned long flags); - int (*extend)(struct dma_channel *chan, unsigned long op, void *param); -}; - -struct dma_channel { - char dev_id[16]; /* unique name per DMAC of channel */ - - unsigned int chan; /* DMAC channel number */ - unsigned int vchan; /* Virtual channel number */ - - unsigned int mode; - unsigned int count; - - unsigned long sar; - unsigned long dar; - - const char **caps; - - unsigned long flags; - atomic_t busy; - - wait_queue_head_t wait_queue; - - struct sys_device dev; - void *priv_data; -}; - -struct dma_info { - struct platform_device *pdev; - - const char *name; - unsigned int nr_channels; - unsigned long flags; - - struct dma_ops *ops; - struct dma_channel *channels; - - struct list_head list; - int first_channel_nr; - int first_vchannel_nr; -}; - -struct dma_chan_caps { - int ch_num; - const char **caplist; -}; - -#define to_dma_channel(channel) container_of(channel, struct dma_channel, dev) - -/* arch/sh/drivers/dma/dma-api.c */ -extern int dma_xfer(unsigned int chan, unsigned long from, - unsigned long to, size_t size, unsigned int mode); - -#define dma_write(chan, from, to, size) \ - dma_xfer(chan, from, to, size, DMA_MODE_WRITE) -#define dma_write_page(chan, from, to) \ - dma_write(chan, from, to, PAGE_SIZE) - -#define dma_read(chan, from, to, size) \ - dma_xfer(chan, from, to, size, DMA_MODE_READ) -#define dma_read_page(chan, from, to) \ - dma_read(chan, from, to, PAGE_SIZE) - -extern int request_dma_bycap(const char **dmac, const char **caps, - const char *dev_id); -extern int request_dma(unsigned int chan, const char *dev_id); -extern void free_dma(unsigned int chan); -extern int get_dma_residue(unsigned int chan); -extern struct dma_info *get_dma_info(unsigned int chan); -extern struct dma_channel *get_dma_channel(unsigned int chan); -extern void dma_wait_for_completion(unsigned int chan); -extern void dma_configure_channel(unsigned int chan, unsigned long flags); - -extern int register_dmac(struct dma_info *info); -extern void unregister_dmac(struct dma_info *info); -extern struct dma_info *get_dma_info_by_name(const char *dmac_name); - -extern int dma_extend(unsigned int chan, unsigned long op, void *param); -extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist); - -/* arch/sh/drivers/dma/dma-sysfs.c */ -extern int dma_create_sysfs_files(struct dma_channel *, struct dma_info *); -extern void dma_remove_sysfs_files(struct dma_channel *, struct dma_info *); - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_DMA_H */ diff --git a/include/asm-sh/dmabrg.h b/include/asm-sh/dmabrg.h deleted file mode 100644 index c5edba2..0000000 --- a/include/asm-sh/dmabrg.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * SH7760 DMABRG (USB/Audio) support - */ - -#ifndef _DMABRG_H_ -#define _DMABRG_H_ - -/* IRQ sources */ -#define DMABRGIRQ_USBDMA 0 -#define DMABRGIRQ_USBDMAERR 1 -#define DMABRGIRQ_A0TXF 2 -#define DMABRGIRQ_A0TXH 3 -#define DMABRGIRQ_A0RXF 4 -#define DMABRGIRQ_A0RXH 5 -#define DMABRGIRQ_A1TXF 6 -#define DMABRGIRQ_A1TXH 7 -#define DMABRGIRQ_A1RXF 8 -#define DMABRGIRQ_A1RXH 9 - -extern int dmabrg_request_irq(unsigned int, void(*)(void *), void *); -extern void dmabrg_free_irq(unsigned int); - -#endif diff --git a/include/asm-sh/dreamcast/dma.h b/include/asm-sh/dreamcast/dma.h deleted file mode 100644 index ddd68e7..0000000 --- a/include/asm-sh/dreamcast/dma.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * include/asm-sh/dreamcast/dma.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_DREAMCAST_DMA_H -#define __ASM_SH_DREAMCAST_DMA_H - -/* Number of DMA channels */ -#define ONCHIP_NR_DMA_CHANNELS 4 -#define G2_NR_DMA_CHANNELS 4 -#define PVR2_NR_DMA_CHANNELS 1 - -/* Channels for cascading */ -#define PVR2_CASCADE_CHAN 2 -#define G2_CASCADE_CHAN 3 - -/* PVR2 DMA Registers */ -#define PVR2_DMA_BASE 0xa05f6800 -#define PVR2_DMA_ADDR (PVR2_DMA_BASE + 0) -#define PVR2_DMA_COUNT (PVR2_DMA_BASE + 4) -#define PVR2_DMA_MODE (PVR2_DMA_BASE + 8) -#define PVR2_DMA_LMMODE0 (PVR2_DMA_BASE + 132) -#define PVR2_DMA_LMMODE1 (PVR2_DMA_BASE + 136) - -/* G2 DMA Register */ -#define G2_DMA_BASE 0xa05f7800 - -#endif /* __ASM_SH_DREAMCAST_DMA_H */ - diff --git a/include/asm-sh/dreamcast/maple.h b/include/asm-sh/dreamcast/maple.h deleted file mode 100644 index 51f6a87..0000000 --- a/include/asm-sh/dreamcast/maple.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef __ASM_MAPLE_H -#define __ASM_MAPLE_H - -#define MAPLE_PORTS 4 -#define MAPLE_PNP_INTERVAL HZ -#define MAPLE_MAXPACKETS 8 -#define MAPLE_DMA_ORDER 14 -#define MAPLE_DMA_SIZE (1 << MAPLE_DMA_ORDER) -#define MAPLE_DMA_PAGES ((MAPLE_DMA_ORDER > PAGE_SHIFT) ? \ - MAPLE_DMA_ORDER - PAGE_SHIFT : 0) - -/* Maple Bus registers */ -#define MAPLE_BASE 0xa05f6c00 -#define MAPLE_DMAADDR (MAPLE_BASE+0x04) -#define MAPLE_TRIGTYPE (MAPLE_BASE+0x10) -#define MAPLE_ENABLE (MAPLE_BASE+0x14) -#define MAPLE_STATE (MAPLE_BASE+0x18) -#define MAPLE_SPEED (MAPLE_BASE+0x80) -#define MAPLE_RESET (MAPLE_BASE+0x8c) - -#define MAPLE_MAGIC 0x6155404f -#define MAPLE_2MBPS 0 -#define MAPLE_TIMEOUT(n) ((n)<<15) - -/* Function codes */ -#define MAPLE_FUNC_CONTROLLER 0x001 -#define MAPLE_FUNC_MEMCARD 0x002 -#define MAPLE_FUNC_LCD 0x004 -#define MAPLE_FUNC_CLOCK 0x008 -#define MAPLE_FUNC_MICROPHONE 0x010 -#define MAPLE_FUNC_ARGUN 0x020 -#define MAPLE_FUNC_KEYBOARD 0x040 -#define MAPLE_FUNC_LIGHTGUN 0x080 -#define MAPLE_FUNC_PURUPURU 0x100 -#define MAPLE_FUNC_MOUSE 0x200 - -#endif /* __ASM_MAPLE_H */ diff --git a/include/asm-sh/dreamcast/pci.h b/include/asm-sh/dreamcast/pci.h deleted file mode 100644 index e401b24..0000000 --- a/include/asm-sh/dreamcast/pci.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-sh/dreamcast/pci.h - * - * Copyright (C) 2001, 2002 M. R. Brown - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_DREAMCAST_PCI_H -#define __ASM_SH_DREAMCAST_PCI_H - -#include - -#define GAPSPCI_REGS 0x01001400 -#define GAPSPCI_DMA_BASE 0x01840000 -#define GAPSPCI_DMA_SIZE 32768 -#define GAPSPCI_BBA_CONFIG 0x01001600 -#define GAPSPCI_BBA_CONFIG_SIZE 0x2000 - -#define GAPSPCI_IRQ HW_EVENT_EXTERNAL - -#endif /* __ASM_SH_DREAMCAST_PCI_H */ - diff --git a/include/asm-sh/dreamcast/sysasic.h b/include/asm-sh/dreamcast/sysasic.h deleted file mode 100644 index f334266..0000000 --- a/include/asm-sh/dreamcast/sysasic.h +++ /dev/null @@ -1,43 +0,0 @@ -/* include/asm-sh/dreamcast/sysasic.h - * - * Definitions for the Dreamcast System ASIC and related peripherals. - * - * Copyright (c) 2001 M. R. Brown - * Copyright (C) 2003 Paul Mundt - * - * This file is part of the LinuxDC project (www.linuxdc.org) - * - * Released under the terms of the GNU GPL v2.0. - * - */ -#ifndef __ASM_SH_DREAMCAST_SYSASIC_H -#define __ASM_SH_DREAMCAST_SYSASIC_H - -#include - -/* Hardware events - - - Each of these events correspond to a bit within the Event Mask Registers/ - Event Status Registers. Because of the virtual IRQ numbering scheme, a - base offset must be used when calculating the virtual IRQ that each event - takes. -*/ - -#define HW_EVENT_IRQ_BASE 48 - -/* IRQ 13 */ -#define HW_EVENT_VSYNC (HW_EVENT_IRQ_BASE + 5) /* VSync */ -#define HW_EVENT_MAPLE_DMA (HW_EVENT_IRQ_BASE + 12) /* Maple DMA complete */ -#define HW_EVENT_GDROM_DMA (HW_EVENT_IRQ_BASE + 14) /* GD-ROM DMA complete */ -#define HW_EVENT_G2_DMA (HW_EVENT_IRQ_BASE + 15) /* G2 DMA complete */ -#define HW_EVENT_PVR2_DMA (HW_EVENT_IRQ_BASE + 19) /* PVR2 DMA complete */ - -/* IRQ 11 */ -#define HW_EVENT_GDROM_CMD (HW_EVENT_IRQ_BASE + 32) /* GD-ROM cmd. complete */ -#define HW_EVENT_AICA_SYS (HW_EVENT_IRQ_BASE + 33) /* AICA-related */ -#define HW_EVENT_EXTERNAL (HW_EVENT_IRQ_BASE + 35) /* Ext. (expansion) */ - -#define HW_EVENT_IRQ_MAX (HW_EVENT_IRQ_BASE + 95) - -#endif /* __ASM_SH_DREAMCAST_SYSASIC_H */ - diff --git a/include/asm-sh/edosk7705.h b/include/asm-sh/edosk7705.h deleted file mode 100644 index 5bdc9d9..0000000 --- a/include/asm-sh/edosk7705.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * include/asm-sh/edosk7705.h - * - * Modified version of io_se.h for the EDOSK7705 specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an Hitachi EDOSK7705 development board - */ - -#ifndef __ASM_SH_EDOSK7705_IO_H -#define __ASM_SH_EDOSK7705_IO_H - -#include - -extern unsigned char sh_edosk7705_inb(unsigned long port); -extern unsigned int sh_edosk7705_inl(unsigned long port); - -extern void sh_edosk7705_outb(unsigned char value, unsigned long port); -extern void sh_edosk7705_outl(unsigned int value, unsigned long port); - -extern void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count); -extern void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count); -extern void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count); -extern void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count); - -extern unsigned long sh_edosk7705_isa_port2addr(unsigned long offset); - -#endif /* __ASM_SH_EDOSK7705_IO_H */ diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h deleted file mode 100644 index f01449a..0000000 --- a/include/asm-sh/elf.h +++ /dev/null @@ -1,244 +0,0 @@ -#ifndef __ASM_SH_ELF_H -#define __ASM_SH_ELF_H - -#include -#include -#include -#include - -/* ELF header e_flags defines */ -#define EF_SH_PIC 0x100 /* -fpic */ -#define EF_SH_FDPIC 0x8000 /* -mfdpic */ - -/* SH (particularly SHcompact) relocation types */ -#define R_SH_NONE 0 -#define R_SH_DIR32 1 -#define R_SH_REL32 2 -#define R_SH_DIR8WPN 3 -#define R_SH_IND12W 4 -#define R_SH_DIR8WPL 5 -#define R_SH_DIR8WPZ 6 -#define R_SH_DIR8BP 7 -#define R_SH_DIR8W 8 -#define R_SH_DIR8L 9 -#define R_SH_SWITCH16 25 -#define R_SH_SWITCH32 26 -#define R_SH_USES 27 -#define R_SH_COUNT 28 -#define R_SH_ALIGN 29 -#define R_SH_CODE 30 -#define R_SH_DATA 31 -#define R_SH_LABEL 32 -#define R_SH_SWITCH8 33 -#define R_SH_GNU_VTINHERIT 34 -#define R_SH_GNU_VTENTRY 35 -#define R_SH_TLS_GD_32 144 -#define R_SH_TLS_LD_32 145 -#define R_SH_TLS_LDO_32 146 -#define R_SH_TLS_IE_32 147 -#define R_SH_TLS_LE_32 148 -#define R_SH_TLS_DTPMOD32 149 -#define R_SH_TLS_DTPOFF32 150 -#define R_SH_TLS_TPOFF32 151 -#define R_SH_GOT32 160 -#define R_SH_PLT32 161 -#define R_SH_COPY 162 -#define R_SH_GLOB_DAT 163 -#define R_SH_JMP_SLOT 164 -#define R_SH_RELATIVE 165 -#define R_SH_GOTOFF 166 -#define R_SH_GOTPC 167 - -/* FDPIC relocs */ -#define R_SH_GOT20 70 -#define R_SH_GOTOFF20 71 -#define R_SH_GOTFUNCDESC 72 -#define R_SH_GOTFUNCDESC20 73 -#define R_SH_GOTOFFFUNCDESC 74 -#define R_SH_GOTOFFFUNCDESC20 75 -#define R_SH_FUNCDESC 76 -#define R_SH_FUNCDESC_VALUE 77 - -#if 0 /* XXX - later .. */ -#define R_SH_GOT20 198 -#define R_SH_GOTOFF20 199 -#define R_SH_GOTFUNCDESC 200 -#define R_SH_GOTFUNCDESC20 201 -#define R_SH_GOTOFFFUNCDESC 202 -#define R_SH_GOTOFFFUNCDESC20 203 -#define R_SH_FUNCDESC 204 -#define R_SH_FUNCDESC_VALUE 205 -#endif - -/* SHmedia relocs */ -#define R_SH_IMM_LOW16 246 -#define R_SH_IMM_LOW16_PCREL 247 -#define R_SH_IMM_MEDLOW16 248 -#define R_SH_IMM_MEDLOW16_PCREL 249 -/* Keep this the last entry. */ -#define R_SH_NUM 256 - -/* - * ELF register definitions.. - */ - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fpu_struct elf_fpregset_t; - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#ifdef __LITTLE_ENDIAN__ -#define ELF_DATA ELFDATA2LSB -#else -#define ELF_DATA ELFDATA2MSB -#endif -#define ELF_ARCH EM_SH - -#ifdef __KERNEL__ -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_SH) -#define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) -#define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) - -#define USE_ELF_CORE_DUMP -#define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC -#define ELF_EXEC_PAGESIZE PAGE_SIZE - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - -#define ELF_CORE_COPY_REGS(_dest,_regs) \ - memcpy((char *) &_dest, (char *) _regs, \ - sizeof(struct pt_regs)); - -/* This yields a mask that user programs can use to figure out what - instruction set this CPU supports. This could be done in user space, - but it's not easy, and we've already done it here. */ - -#define ELF_HWCAP (boot_cpu_data.flags) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. - - For the moment, we have only optimizations for the Intel generations, - but that could change... */ - -#define ELF_PLATFORM (utsname()->machine) - -#ifdef __SH5__ -#define ELF_PLAT_INIT(_r, load_addr) \ - do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ - _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ - _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ - _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \ - _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \ - _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \ - _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \ - _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \ - _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \ - _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \ - _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \ - _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \ - _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \ - _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \ - _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \ - _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \ - _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \ - _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \ - _r->sr = SR_FD | SR_MMU; } while (0) -#else -#define ELF_PLAT_INIT(_r, load_addr) \ - do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ - _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ - _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ - _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \ - _r->sr = SR_FD; } while (0) - -#define ELF_FDPIC_PLAT_INIT(_r, _exec_map_addr, _interp_map_addr, \ - _dynamic_addr) \ -do { \ - _r->regs[0] = 0; \ - _r->regs[1] = 0; \ - _r->regs[2] = 0; \ - _r->regs[3] = 0; \ - _r->regs[4] = 0; \ - _r->regs[5] = 0; \ - _r->regs[6] = 0; \ - _r->regs[7] = 0; \ - _r->regs[8] = _exec_map_addr; \ - _r->regs[9] = _interp_map_addr; \ - _r->regs[10] = _dynamic_addr; \ - _r->regs[11] = 0; \ - _r->regs[12] = 0; \ - _r->regs[13] = 0; \ - _r->regs[14] = 0; \ - _r->sr = SR_FD; \ -} while (0) -#endif - -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) -struct task_struct; -extern int dump_task_regs (struct task_struct *, elf_gregset_t *); -extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); - -#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) -#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) - -#ifdef CONFIG_VSYSCALL -/* vDSO has arch_setup_additional_pages */ -#define ARCH_HAS_SETUP_ADDITIONAL_PAGES -struct linux_binprm; -extern int arch_setup_additional_pages(struct linux_binprm *bprm, - int executable_stack); - -extern unsigned int vdso_enabled; -extern void __kernel_vsyscall; - -#define VDSO_BASE ((unsigned long)current->mm->context.vdso) -#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) - -#define VSYSCALL_AUX_ENT \ - if (vdso_enabled) \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); -#else -#define VSYSCALL_AUX_ENT -#endif /* CONFIG_VSYSCALL */ - -#ifdef CONFIG_SH_FPU -#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT) -#else -#define FPU_AUX_ENT -#endif - -extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape; - -/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */ -#define ARCH_DLINFO \ -do { \ - /* Optional FPU initialization */ \ - FPU_AUX_ENT; \ - \ - /* Optional vsyscall entry */ \ - VSYSCALL_AUX_ENT; \ - \ - /* Cache desc */ \ - NEW_AUX_ENT(AT_L1I_CACHESHAPE, l1i_cache_shape); \ - NEW_AUX_ENT(AT_L1D_CACHESHAPE, l1d_cache_shape); \ - NEW_AUX_ENT(AT_L2_CACHESHAPE, l2_cache_shape); \ -} while (0) - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_ELF_H */ diff --git a/include/asm-sh/emergency-restart.h b/include/asm-sh/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-sh/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-sh/entry-macros.S b/include/asm-sh/entry-macros.S deleted file mode 100644 index 2dab0b8..0000000 --- a/include/asm-sh/entry-macros.S +++ /dev/null @@ -1,33 +0,0 @@ -! entry.S macro define - - .macro cli - stc sr, r0 - or #0xf0, r0 - ldc r0, sr - .endm - - .macro sti - mov #0xf0, r11 - extu.b r11, r11 - not r11, r11 - stc sr, r10 - and r11, r10 -#ifdef CONFIG_CPU_HAS_SR_RB - stc k_g_imask, r11 - or r11, r10 -#endif - ldc r10, sr - .endm - - .macro get_current_thread_info, ti, tmp -#ifdef CONFIG_CPU_HAS_SR_RB - stc r7_bank, \ti -#else - mov #((THREAD_SIZE - 1) >> 10) ^ 0xff, \tmp - shll8 \tmp - shll2 \tmp - mov r15, \ti - and \tmp, \ti -#endif - .endm - diff --git a/include/asm-sh/errno.h b/include/asm-sh/errno.h deleted file mode 100644 index 51cf6f9..0000000 --- a/include/asm-sh/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_ERRNO_H -#define __ASM_SH_ERRNO_H - -#include - -#endif /* __ASM_SH_ERRNO_H */ diff --git a/include/asm-sh/fb.h b/include/asm-sh/fb.h deleted file mode 100644 index d92e99c..0000000 --- a/include/asm-sh/fb.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-sh/fcntl.h b/include/asm-sh/fcntl.h deleted file mode 100644 index 46ab12d..0000000 --- a/include/asm-sh/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h deleted file mode 100644 index 721fcc4..0000000 --- a/include/asm-sh/fixmap.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * fixmap.h: compile-time virtual memory allocation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1998 Ingo Molnar - * - * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999 - */ - -#ifndef _ASM_FIXMAP_H -#define _ASM_FIXMAP_H - -#include -#include -#ifdef CONFIG_HIGHMEM -#include -#include -#endif - -/* - * Here we define all the compile-time 'special' virtual - * addresses. The point is to have a constant address at - * compile time, but to set the physical address only - * in the boot process. We allocate these special addresses - * from the end of P3 backwards. - * Also this lets us do fail-safe vmalloc(), we - * can guarantee that these special addresses and - * vmalloc()-ed addresses never overlap. - * - * these 'compile-time allocated' memory buffers are - * fixed-size 4k pages. (or larger if used with an increment - * highger than 1) use fixmap_set(idx,phys) to associate - * physical memory with fixmap indices. - * - * TLB entries of such buffers will not be flushed across - * task switches. - */ - -/* - * on UP currently we will have no trace of the fixmap mechanizm, - * no page table allocations, etc. This might change in the - * future, say framebuffers for the console driver(s) could be - * fix-mapped? - */ -enum fixed_addresses { -#define FIX_N_COLOURS 16 - FIX_CMAP_BEGIN, - FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, - FIX_UNCACHED, -#ifdef CONFIG_HIGHMEM - FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ - FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, -#endif - __end_of_fixed_addresses -}; - -extern void __set_fixmap(enum fixed_addresses idx, - unsigned long phys, pgprot_t flags); - -#define set_fixmap(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL) -/* - * Some hardware wants to get fixmapped without caching. - */ -#define set_fixmap_nocache(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) -/* - * used by vmalloc.c. - * - * Leave one empty page between vmalloc'ed areas and - * the start of the fixmap, and leave one page empty - * at the top of mem.. - */ -#ifdef CONFIG_SUPERH32 -#define FIXADDR_TOP (P4SEG - PAGE_SIZE) -#else -#define FIXADDR_TOP (0xff000000 - PAGE_SIZE) -#endif -#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) -#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) - -#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) -#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) - -extern void __this_fixmap_does_not_exist(void); - -/* - * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference - * kernel oops. Illegal ranges of incoming indices are caught too. - */ -static inline unsigned long fix_to_virt(const unsigned int idx) -{ - /* - * this branch gets completely eliminated after inlining, - * except when someone tries to use fixaddr indices in an - * illegal way. (such as mixing up address types or using - * out-of-range indices). - * - * If it doesn't get removed, the linker will complain - * loudly with a reasonably clear error message.. - */ - if (idx >= __end_of_fixed_addresses) - __this_fixmap_does_not_exist(); - - return __fix_to_virt(idx); -} - -static inline unsigned long virt_to_fix(const unsigned long vaddr) -{ - BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); - return __virt_to_fix(vaddr); -} -#endif diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h deleted file mode 100644 index 0cc8002..0000000 --- a/include/asm-sh/flat.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * include/asm-sh/flat.h - * - * uClinux flat-format executables - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive for - * more details. - */ -#ifndef __ASM_SH_FLAT_H -#define __ASM_SH_FLAT_H - -#define flat_stack_align(sp) /* nothing needed */ -#define flat_argvp_envp_on_stack() 0 -#define flat_old_ram_flag(flags) (flags) -#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp) -#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) -#define flat_get_relocate_addr(rel) (rel) -#define flat_set_persistent(relval, p) ({ (void)p; 0; }) - -#endif /* __ASM_SH_FLAT_H */ diff --git a/include/asm-sh/fpu.h b/include/asm-sh/fpu.h deleted file mode 100644 index 91462fe..0000000 --- a/include/asm-sh/fpu.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef __ASM_SH_FPU_H -#define __ASM_SH_FPU_H - -#ifndef __ASSEMBLY__ -#include -#include - -#ifdef CONFIG_SH_FPU -static inline void release_fpu(struct pt_regs *regs) -{ - regs->sr |= SR_FD; -} - -static inline void grab_fpu(struct pt_regs *regs) -{ - regs->sr &= ~SR_FD; -} - -struct task_struct; - -extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); -#else - -#define release_fpu(regs) do { } while (0) -#define grab_fpu(regs) do { } while (0) - -static inline void save_fpu(struct task_struct *tsk, struct pt_regs *regs) -{ - clear_tsk_thread_flag(tsk, TIF_USEDFPU); -} -#endif - -extern int do_fpu_inst(unsigned short, struct pt_regs *); - -static inline void unlazy_fpu(struct task_struct *tsk, struct pt_regs *regs) -{ - preempt_disable(); - if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) - save_fpu(tsk, regs); - preempt_enable(); -} - -static inline void clear_fpu(struct task_struct *tsk, struct pt_regs *regs) -{ - preempt_disable(); - if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { - clear_tsk_thread_flag(tsk, TIF_USEDFPU); - release_fpu(regs); - } - preempt_enable(); -} - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_SH_FPU_H */ diff --git a/include/asm-sh/freq.h b/include/asm-sh/freq.h deleted file mode 100644 index 39c0e09..0000000 --- a/include/asm-sh/freq.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * include/asm-sh/freq.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __ASM_SH_FREQ_H -#define __ASM_SH_FREQ_H -#ifdef __KERNEL__ - -#include - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_FREQ_H */ diff --git a/include/asm-sh/futex-irq.h b/include/asm-sh/futex-irq.h deleted file mode 100644 index a9f16a7..0000000 --- a/include/asm-sh/futex-irq.h +++ /dev/null @@ -1,111 +0,0 @@ -#ifndef __ASM_SH_FUTEX_IRQ_H -#define __ASM_SH_FUTEX_IRQ_H - -#include - -static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, - int *oldval) -{ - unsigned long flags; - int ret; - - local_irq_save(flags); - - ret = get_user(*oldval, uaddr); - if (!ret) - ret = put_user(oparg, uaddr); - - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, - int *oldval) -{ - unsigned long flags; - int ret; - - local_irq_save(flags); - - ret = get_user(*oldval, uaddr); - if (!ret) - ret = put_user(*oldval + oparg, uaddr); - - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, - int *oldval) -{ - unsigned long flags; - int ret; - - local_irq_save(flags); - - ret = get_user(*oldval, uaddr); - if (!ret) - ret = put_user(*oldval | oparg, uaddr); - - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, - int *oldval) -{ - unsigned long flags; - int ret; - - local_irq_save(flags); - - ret = get_user(*oldval, uaddr); - if (!ret) - ret = put_user(*oldval & oparg, uaddr); - - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, - int *oldval) -{ - unsigned long flags; - int ret; - - local_irq_save(flags); - - ret = get_user(*oldval, uaddr); - if (!ret) - ret = put_user(*oldval ^ oparg, uaddr); - - local_irq_restore(flags); - - return ret; -} - -static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, - int oldval, int newval) -{ - unsigned long flags; - int ret, prev = 0; - - local_irq_save(flags); - - ret = get_user(prev, uaddr); - if (!ret && oldval == prev) - ret = put_user(newval, uaddr); - - local_irq_restore(flags); - - if (ret) - return ret; - - return prev; -} - -#endif /* __ASM_SH_FUTEX_IRQ_H */ diff --git a/include/asm-sh/futex.h b/include/asm-sh/futex.h deleted file mode 100644 index 68256ec..0000000 --- a/include/asm-sh/futex.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef __ASM_SH_FUTEX_H -#define __ASM_SH_FUTEX_H - -#ifdef __KERNEL__ - -#include -#include -#include - -/* XXX: UP variants, fix for SH-4A and SMP.. */ -#include - -static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret; - - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: - ret = atomic_futex_op_xchg_set(oparg, uaddr, &oldval); - break; - case FUTEX_OP_ADD: - ret = atomic_futex_op_xchg_add(oparg, uaddr, &oldval); - break; - case FUTEX_OP_OR: - ret = atomic_futex_op_xchg_or(oparg, uaddr, &oldval); - break; - case FUTEX_OP_ANDN: - ret = atomic_futex_op_xchg_and(~oparg, uaddr, &oldval); - break; - case FUTEX_OP_XOR: - ret = atomic_futex_op_xchg_xor(oparg, uaddr, &oldval); - break; - default: - ret = -ENOSYS; - break; - } - - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - - return ret; -} - -static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) -{ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - return atomic_futex_op_cmpxchg_inatomic(uaddr, oldval, newval); -} - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_FUTEX_H */ diff --git a/include/asm-sh/gpio.h b/include/asm-sh/gpio.h deleted file mode 100644 index 9bb27e0..0000000 --- a/include/asm-sh/gpio.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-sh/gpio.h - * - * Copyright (C) 2007 Markus Brunner, Mark Jonas - * - * Addresses for the Pin Function Controller - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_GPIO_H -#define __ASM_SH_GPIO_H - -#if defined(CONFIG_CPU_SH3) -#include -#endif - -#endif /* __ASM_SH_GPIO_H */ diff --git a/include/asm-sh/hardirq.h b/include/asm-sh/hardirq.h deleted file mode 100644 index 715ee23..0000000 --- a/include/asm-sh/hardirq.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef __ASM_SH_HARDIRQ_H -#define __ASM_SH_HARDIRQ_H - -#include -#include - -/* entry.S is sensitive to the offsets of these fields */ -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -#include /* Standard mappings for irq_cpustat_t above */ - -extern void ack_bad_irq(unsigned int irq); - -#endif /* __ASM_SH_HARDIRQ_H */ diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h deleted file mode 100644 index 8c1353b..0000000 --- a/include/asm-sh/hd64461.h +++ /dev/null @@ -1,250 +0,0 @@ -#ifndef __ASM_SH_HD64461 -#define __ASM_SH_HD64461 -/* - * Copyright (C) 2007 Kristoffer Ericson - * Copyright (C) 2004 Paul Mundt - * Copyright (C) 2000 YAEGASHI Takeshi - * - * Hitachi HD64461 companion chip support - * (please note manual reference 0x10000000 = 0xb0000000) - */ - -/* Constants for PCMCIA mappings */ -#define HD64461_PCC_WINDOW 0x01000000 - -/* Area 6 - Slot 0 - memory and/or IO card */ -#define HD64461_PCC0_BASE (CONFIG_HD64461_IOBASE + 0x8000000) -#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) /* 0xb80000000 */ -#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) /* 0xb90000000 */ -#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) /* 0xba0000000 */ - -/* Area 5 - Slot 1 - memory card only */ -#define HD64461_PCC1_BASE (CONFIG_HD64461_IOBASE + 0x4000000) -#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) /* 0xb4000000 */ -#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) /* 0xb5000000 */ - -/* Standby Control Register for HD64461 */ -#define HD64461_STBCR CONFIG_HD64461_IOBASE -#define HD64461_STBCR_CKIO_STBY 0x2000 -#define HD64461_STBCR_SAFECKE_IST 0x1000 -#define HD64461_STBCR_SLCKE_IST 0x0800 -#define HD64461_STBCR_SAFECKE_OST 0x0400 -#define HD64461_STBCR_SLCKE_OST 0x0200 -#define HD64461_STBCR_SMIAST 0x0100 -#define HD64461_STBCR_SLCDST 0x0080 -#define HD64461_STBCR_SPC0ST 0x0040 -#define HD64461_STBCR_SPC1ST 0x0020 -#define HD64461_STBCR_SAFEST 0x0010 -#define HD64461_STBCR_STM0ST 0x0008 -#define HD64461_STBCR_STM1ST 0x0004 -#define HD64461_STBCR_SIRST 0x0002 -#define HD64461_STBCR_SURTST 0x0001 - -/* System Configuration Register */ -#define HD64461_SYSCR (CONFIG_HD64461_IOBASE + 0x02) - -/* CPU Data Bus Control Register */ -#define HD64461_SCPUCR (CONFIG_HD64461_IOBASE + 0x04) - -/* Base Address Register */ -#define HD64461_LCDCBAR (CONFIG_HD64461_IOBASE + 0x1000) - -/* Line increment address */ -#define HD64461_LCDCLOR (CONFIG_HD64461_IOBASE + 0x1002) - -/* Controls LCD controller */ -#define HD64461_LCDCCR (CONFIG_HD64461_IOBASE + 0x1004) - -/* LCCDR control bits */ -#define HD64461_LCDCCR_STBACK 0x0400 /* Standby Back */ -#define HD64461_LCDCCR_STREQ 0x0100 /* Standby Request */ -#define HD64461_LCDCCR_MOFF 0x0080 /* Memory Off */ -#define HD64461_LCDCCR_REFSEL 0x0040 /* Refresh Select */ -#define HD64461_LCDCCR_EPON 0x0020 /* End Power On */ -#define HD64461_LCDCCR_SPON 0x0010 /* Start Power On */ - -/* Controls LCD (1) */ -#define HD64461_LDR1 (CONFIG_HD64461_IOBASE + 0x1010) -#define HD64461_LDR1_DON 0x01 /* Display On */ -#define HD64461_LDR1_DINV 0x80 /* Display Invert */ - -/* Controls LCD (2) */ -#define HD64461_LDR2 (CONFIG_HD64461_IOBASE + 0x1012) -#define HD64461_LDHNCR (CONFIG_HD64461_IOBASE + 0x1014) /* Number of horizontal characters */ -#define HD64461_LDHNSR (CONFIG_HD64461_IOBASE + 0x1016) /* Specify output start position + width of CL1 */ -#define HD64461_LDVNTR (CONFIG_HD64461_IOBASE + 0x1018) /* Specify total vertical lines */ -#define HD64461_LDVNDR (CONFIG_HD64461_IOBASE + 0x101a) /* specify number of display vertical lines */ -#define HD64461_LDVSPR (CONFIG_HD64461_IOBASE + 0x101c) /* specify vertical synchronization pos and AC nr */ - -/* Controls LCD (3) */ -#define HD64461_LDR3 (CONFIG_HD64461_IOBASE + 0x101e) - -/* Palette Registers */ -#define HD64461_CPTWAR (CONFIG_HD64461_IOBASE + 0x1030) /* Color Palette Write Address Register */ -#define HD64461_CPTWDR (CONFIG_HD64461_IOBASE + 0x1032) /* Color Palette Write Data Register */ -#define HD64461_CPTRAR (CONFIG_HD64461_IOBASE + 0x1034) /* Color Palette Read Address Register */ -#define HD64461_CPTRDR (CONFIG_HD64461_IOBASE + 0x1036) /* Color Palette Read Data Register */ - -#define HD64461_GRDOR (CONFIG_HD64461_IOBASE + 0x1040) /* Display Resolution Offset Register */ -#define HD64461_GRSCR (CONFIG_HD64461_IOBASE + 0x1042) /* Solid Color Register */ -#define HD64461_GRCFGR (CONFIG_HD64461_IOBASE + 0x1044) /* Accelerator Configuration Register */ - -#define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */ -#define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */ -#define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */ -#define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */ -#define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */ -#define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */ - -/* Line Drawing Registers */ -#define HD64461_LNSARH (CONFIG_HD64461_IOBASE + 0x1046) /* Line Start Address Register (H) */ -#define HD64461_LNSARL (CONFIG_HD64461_IOBASE + 0x1048) /* Line Start Address Register (L) */ -#define HD64461_LNAXLR (CONFIG_HD64461_IOBASE + 0x104a) /* Axis Pixel Length Register */ -#define HD64461_LNDGR (CONFIG_HD64461_IOBASE + 0x104c) /* Diagonal Register */ -#define HD64461_LNAXR (CONFIG_HD64461_IOBASE + 0x104e) /* Axial Register */ -#define HD64461_LNERTR (CONFIG_HD64461_IOBASE + 0x1050) /* Start Error Term Register */ -#define HD64461_LNMDR (CONFIG_HD64461_IOBASE + 0x1052) /* Line Mode Register */ - -/* BitBLT Registers */ -#define HD64461_BBTSSARH (CONFIG_HD64461_IOBASE + 0x1054) /* Source Start Address Register (H) */ -#define HD64461_BBTSSARL (CONFIG_HD64461_IOBASE + 0x1056) /* Source Start Address Register (L) */ -#define HD64461_BBTDSARH (CONFIG_HD64461_IOBASE + 0x1058) /* Destination Start Address Register (H) */ -#define HD64461_BBTDSARL (CONFIG_HD64461_IOBASE + 0x105a) /* Destination Start Address Register (L) */ -#define HD64461_BBTDWR (CONFIG_HD64461_IOBASE + 0x105c) /* Destination Block Width Register */ -#define HD64461_BBTDHR (CONFIG_HD64461_IOBASE + 0x105e) /* Destination Block Height Register */ -#define HD64461_BBTPARH (CONFIG_HD64461_IOBASE + 0x1060) /* Pattern Start Address Register (H) */ -#define HD64461_BBTPARL (CONFIG_HD64461_IOBASE + 0x1062) /* Pattern Start Address Register (L) */ -#define HD64461_BBTMARH (CONFIG_HD64461_IOBASE + 0x1064) /* Mask Start Address Register (H) */ -#define HD64461_BBTMARL (CONFIG_HD64461_IOBASE + 0x1066) /* Mask Start Address Register (L) */ -#define HD64461_BBTROPR (CONFIG_HD64461_IOBASE + 0x1068) /* ROP Register */ -#define HD64461_BBTMDR (CONFIG_HD64461_IOBASE + 0x106a) /* BitBLT Mode Register */ - -/* PC Card Controller Registers */ -/* Maps to Physical Area 6 */ -#define HD64461_PCC0ISR (CONFIG_HD64461_IOBASE + 0x2000) /* socket 0 interface status */ -#define HD64461_PCC0GCR (CONFIG_HD64461_IOBASE + 0x2002) /* socket 0 general control */ -#define HD64461_PCC0CSCR (CONFIG_HD64461_IOBASE + 0x2004) /* socket 0 card status change */ -#define HD64461_PCC0CSCIER (CONFIG_HD64461_IOBASE + 0x2006) /* socket 0 card status change interrupt enable */ -#define HD64461_PCC0SCR (CONFIG_HD64461_IOBASE + 0x2008) /* socket 0 software control */ -/* Maps to Physical Area 5 */ -#define HD64461_PCC1ISR (CONFIG_HD64461_IOBASE + 0x2010) /* socket 1 interface status */ -#define HD64461_PCC1GCR (CONFIG_HD64461_IOBASE + 0x2012) /* socket 1 general control */ -#define HD64461_PCC1CSCR (CONFIG_HD64461_IOBASE + 0x2014) /* socket 1 card status change */ -#define HD64461_PCC1CSCIER (CONFIG_HD64461_IOBASE + 0x2016) /* socket 1 card status change interrupt enable */ -#define HD64461_PCC1SCR (CONFIG_HD64461_IOBASE + 0x2018) /* socket 1 software control */ - -/* PCC Interface Status Register */ -#define HD64461_PCCISR_READY 0x80 /* card ready */ -#define HD64461_PCCISR_MWP 0x40 /* card write-protected */ -#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ -#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ -#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ -#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ -#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ -#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ - -#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ -#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ -#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ -#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ -#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ -#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ - -/* PCC General Control Register */ -#define HD64461_PCCGCR_DRVE 0x80 /* output drive */ -#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ -#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ -#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ -#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ -#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ -#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ -#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ - -/* PCC Card Status Change Register */ -#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ -#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ -#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ -#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ -#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ -#define HD64461_PCCCSCR_RC 0x04 /* READY change */ -#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ -#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ - -/* PCC Card Status Change Interrupt Enable Register */ -#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ -#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ -#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ -#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ -#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ -#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ - -#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ -#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ -#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ -#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ -#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ - -/* PCC Software Control Register */ -#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ -#define HD64461_PCCSCR_SWP 0x01 /* write protect */ - -/* PCC0 Output Pins Control Register */ -#define HD64461_P0OCR (CONFIG_HD64461_IOBASE + 0x202a) - -/* PCC1 Output Pins Control Register */ -#define HD64461_P1OCR (CONFIG_HD64461_IOBASE + 0x202c) - -/* PC Card General Control Register */ -#define HD64461_PGCR (CONFIG_HD64461_IOBASE + 0x202e) - -/* Port Control Registers */ -#define HD64461_GPACR (CONFIG_HD64461_IOBASE + 0x4000) /* Port A - Handles IRDA/TIMER */ -#define HD64461_GPBCR (CONFIG_HD64461_IOBASE + 0x4002) /* Port B - Handles UART */ -#define HD64461_GPCCR (CONFIG_HD64461_IOBASE + 0x4004) /* Port C - Handles PCMCIA 1 */ -#define HD64461_GPDCR (CONFIG_HD64461_IOBASE + 0x4006) /* Port D - Handles PCMCIA 1 */ - -/* Port Control Data Registers */ -#define HD64461_GPADR (CONFIG_HD64461_IOBASE + 0x4010) /* A */ -#define HD64461_GPBDR (CONFIG_HD64461_IOBASE + 0x4012) /* B */ -#define HD64461_GPCDR (CONFIG_HD64461_IOBASE + 0x4014) /* C */ -#define HD64461_GPDDR (CONFIG_HD64461_IOBASE + 0x4016) /* D */ - -/* Interrupt Control Registers */ -#define HD64461_GPAICR (CONFIG_HD64461_IOBASE + 0x4020) /* A */ -#define HD64461_GPBICR (CONFIG_HD64461_IOBASE + 0x4022) /* B */ -#define HD64461_GPCICR (CONFIG_HD64461_IOBASE + 0x4024) /* C */ -#define HD64461_GPDICR (CONFIG_HD64461_IOBASE + 0x4026) /* D */ - -/* Interrupt Status Registers */ -#define HD64461_GPAISR (CONFIG_HD64461_IOBASE + 0x4040) /* A */ -#define HD64461_GPBISR (CONFIG_HD64461_IOBASE + 0x4042) /* B */ -#define HD64461_GPCISR (CONFIG_HD64461_IOBASE + 0x4044) /* C */ -#define HD64461_GPDISR (CONFIG_HD64461_IOBASE + 0x4046) /* D */ - -/* Interrupt Request Register & Interrupt Mask Register */ -#define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000) -#define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002) - -#define HD64461_IRQBASE OFFCHIP_IRQ_BASE -#define OFFCHIP_IRQ_BASE 64 -#define HD64461_IRQ_NUM 16 - -#define HD64461_IRQ_UART (HD64461_IRQBASE+5) -#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) -#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) -#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) -#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) -#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) -#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) -#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) - -#define __IO_PREFIX hd64461 -#include - -/* arch/sh/cchips/hd6446x/hd64461/setup.c */ -int hd64461_irq_demux(int irq); -void hd64461_register_irq_demux(int irq, - int (*demux) (int irq, void *dev), void *dev); -void hd64461_unregister_irq_demux(int irq); - -#endif diff --git a/include/asm-sh/hd64465/gpio.h b/include/asm-sh/hd64465/gpio.h deleted file mode 100644 index a3cdca2..0000000 --- a/include/asm-sh/hd64465/gpio.h +++ /dev/null @@ -1,46 +0,0 @@ -#ifndef _ASM_SH_HD64465_GPIO_ -#define _ASM_SH_HD64465_GPIO_ 1 -/* - * $Id: gpio.h,v 1.3 2003/05/04 19:30:14 lethal Exp $ - * - * Hitachi HD64465 companion chip: General Purpose IO pins support. - * This layer enables other device drivers to configure GPIO - * pins, get and set their values, and register an interrupt - * routine for when input pins change in hardware. - * - * by Greg Banks - * (c) 2000 PocketPenguins Inc. - */ -#include - -/* Macro to construct a portpin number (used in all - * subsequent functions) from a port letter and a pin - * number, e.g. HD64465_GPIO_PORTPIN('A', 5). - */ -#define HD64465_GPIO_PORTPIN(port,pin) (((port)-'A')<<3|(pin)) - -/* Pin configuration constants for _configure() */ -#define HD64465_GPIO_FUNCTION2 0 /* use the pin's *other* function */ -#define HD64465_GPIO_OUT 1 /* output */ -#define HD64465_GPIO_IN_PULLUP 2 /* input, pull-up MOS on */ -#define HD64465_GPIO_IN 3 /* input */ - -/* Configure a pin's direction */ -extern void hd64465_gpio_configure(int portpin, int direction); - -/* Get, set value */ -extern void hd64465_gpio_set_pin(int portpin, unsigned int value); -extern unsigned int hd64465_gpio_get_pin(int portpin); -extern void hd64465_gpio_set_port(int port, unsigned int value); -extern unsigned int hd64465_gpio_get_port(int port); - -/* mode constants for _register_irq() */ -#define HD64465_GPIO_FALLING 0 -#define HD64465_GPIO_RISING 1 - -/* Interrupt on external value change */ -extern void hd64465_gpio_register_irq(int portpin, int mode, - void (*handler)(int portpin, void *dev), void *dev); -extern void hd64465_gpio_unregister_irq(int portpin); - -#endif /* _ASM_SH_HD64465_GPIO_ */ diff --git a/include/asm-sh/hd64465/hd64465.h b/include/asm-sh/hd64465/hd64465.h deleted file mode 100644 index cfd0e80..0000000 --- a/include/asm-sh/hd64465/hd64465.h +++ /dev/null @@ -1,256 +0,0 @@ -#ifndef _ASM_SH_HD64465_ -#define _ASM_SH_HD64465_ 1 -/* - * $Id: hd64465.h,v 1.3 2003/05/04 19:30:15 lethal Exp $ - * - * Hitachi HD64465 companion chip support - * - * by Greg Banks - * (c) 2000 PocketPenguins Inc. - * - * Derived from which bore the message: - * Copyright (C) 2000 YAEGASHI Takeshi - */ -#include -#include - -/* - * Note that registers are defined here as virtual port numbers, - * which have no meaning except to get translated by hd64465_isa_port2addr() - * to an address in the range 0xb0000000-0xb3ffffff. Note that - * this translation happens to consist of adding the lower 16 bits - * of the virtual port number to 0xb0000000. Note also that the manual - * shows addresses as absolute physical addresses starting at 0x10000000, - * so e.g. the NIRR register is listed as 0x15000 here, 0x10005000 in the - * manual, and accessed using address 0xb0005000 - Greg. - */ - -/* System registers */ -#define HD64465_REG_SRR 0x1000c /* System Revision Register */ -#define HD64465_REG_SDID 0x10010 /* System Device ID Reg */ -#define HD64465_SDID 0x8122 /* 64465 device ID */ - -/* Power Management registers */ -#define HD64465_REG_SMSCR 0x10000 /* System Module Standby Control Reg */ -#define HD64465_SMSCR_PS2ST 0x4000 /* PS/2 Standby */ -#define HD64465_SMSCR_ADCST 0x1000 /* ADC Standby */ -#define HD64465_SMSCR_UARTST 0x0800 /* UART Standby */ -#define HD64465_SMSCR_SCDIST 0x0200 /* Serial Codec Standby */ -#define HD64465_SMSCR_PPST 0x0100 /* Parallel Port Standby */ -#define HD64465_SMSCR_PC0ST 0x0040 /* PCMCIA0 Standby */ -#define HD64465_SMSCR_PC1ST 0x0020 /* PCMCIA1 Standby */ -#define HD64465_SMSCR_AFEST 0x0010 /* AFE Standby */ -#define HD64465_SMSCR_TM0ST 0x0008 /* Timer0 Standby */ -#define HD64465_SMSCR_TM1ST 0x0004 /* Timer1 Standby */ -#define HD64465_SMSCR_IRDAST 0x0002 /* IRDA Standby */ -#define HD64465_SMSCR_KBCST 0x0001 /* Keyboard Controller Standby */ - -/* Interrupt Controller registers */ -#define HD64465_REG_NIRR 0x15000 /* Interrupt Request Register */ -#define HD64465_REG_NIMR 0x15002 /* Interrupt Mask Register */ -#define HD64465_REG_NITR 0x15004 /* Interrupt Trigger Mode Register */ - -/* Timer registers */ -#define HD64465_REG_TCVR1 0x16000 /* Timer 1 constant value register */ -#define HD64465_REG_TCVR0 0x16002 /* Timer 0 constant value register */ -#define HD64465_REG_TRVR1 0x16004 /* Timer 1 read value register */ -#define HD64465_REG_TRVR0 0x16006 /* Timer 0 read value register */ -#define HD64465_REG_TCR1 0x16008 /* Timer 1 control register */ -#define HD64465_REG_TCR0 0x1600A /* Timer 0 control register */ -#define HD64465_TCR_EADT 0x10 /* Enable ADTRIG# signal */ -#define HD64465_TCR_ETMO 0x08 /* Enable TMO signal */ -#define HD64465_TCR_PST_MASK 0x06 /* Clock Prescale */ -#define HD64465_TCR_PST_1 0x06 /* 1:1 */ -#define HD64465_TCR_PST_4 0x04 /* 1:4 */ -#define HD64465_TCR_PST_8 0x02 /* 1:8 */ -#define HD64465_TCR_PST_16 0x00 /* 1:16 */ -#define HD64465_TCR_TSTP 0x01 /* Start/Stop timer */ -#define HD64465_REG_TIRR 0x1600C /* Timer interrupt request register */ -#define HD64465_REG_TIDR 0x1600E /* Timer interrupt disable register */ -#define HD64465_REG_PWM1CS 0x16010 /* PWM 1 clock scale register */ -#define HD64465_REG_PWM1LPC 0x16012 /* PWM 1 low pulse width counter register */ -#define HD64465_REG_PWM1HPC 0x16014 /* PWM 1 high pulse width counter register */ -#define HD64465_REG_PWM0CS 0x16018 /* PWM 0 clock scale register */ -#define HD64465_REG_PWM0LPC 0x1601A /* PWM 0 low pulse width counter register */ -#define HD64465_REG_PWM0HPC 0x1601C /* PWM 0 high pulse width counter register */ - -/* Analog/Digital Converter registers */ -#define HD64465_REG_ADDRA 0x1E000 /* A/D data register A */ -#define HD64465_REG_ADDRB 0x1E002 /* A/D data register B */ -#define HD64465_REG_ADDRC 0x1E004 /* A/D data register C */ -#define HD64465_REG_ADDRD 0x1E006 /* A/D data register D */ -#define HD64465_REG_ADCSR 0x1E008 /* A/D control/status register */ -#define HD64465_ADCSR_ADF 0x80 /* A/D End Flag */ -#define HD64465_ADCSR_ADST 0x40 /* A/D Start Flag */ -#define HD64465_ADCSR_ADIS 0x20 /* A/D Interrupt Status */ -#define HD64465_ADCSR_TRGE 0x10 /* A/D Trigger Enable */ -#define HD64465_ADCSR_ADIE 0x08 /* A/D Interrupt Enable */ -#define HD64465_ADCSR_SCAN 0x04 /* A/D Scan Mode */ -#define HD64465_ADCSR_CH_MASK 0x03 /* A/D Channel */ -#define HD64465_REG_ADCALCR 0x1E00A /* A/D calibration sample control */ -#define HD64465_REG_ADCAL 0x1E00C /* A/D calibration data register */ - - -/* General Purpose I/O ports registers */ -#define HD64465_REG_GPACR 0x14000 /* Port A Control Register */ -#define HD64465_REG_GPBCR 0x14002 /* Port B Control Register */ -#define HD64465_REG_GPCCR 0x14004 /* Port C Control Register */ -#define HD64465_REG_GPDCR 0x14006 /* Port D Control Register */ -#define HD64465_REG_GPECR 0x14008 /* Port E Control Register */ -#define HD64465_REG_GPADR 0x14010 /* Port A Data Register */ -#define HD64465_REG_GPBDR 0x14012 /* Port B Data Register */ -#define HD64465_REG_GPCDR 0x14014 /* Port C Data Register */ -#define HD64465_REG_GPDDR 0x14016 /* Port D Data Register */ -#define HD64465_REG_GPEDR 0x14018 /* Port E Data Register */ -#define HD64465_REG_GPAICR 0x14020 /* Port A Interrupt Control Register */ -#define HD64465_REG_GPBICR 0x14022 /* Port B Interrupt Control Register */ -#define HD64465_REG_GPCICR 0x14024 /* Port C Interrupt Control Register */ -#define HD64465_REG_GPDICR 0x14026 /* Port D Interrupt Control Register */ -#define HD64465_REG_GPEICR 0x14028 /* Port E Interrupt Control Register */ -#define HD64465_REG_GPAISR 0x14040 /* Port A Interrupt Status Register */ -#define HD64465_REG_GPBISR 0x14042 /* Port B Interrupt Status Register */ -#define HD64465_REG_GPCISR 0x14044 /* Port C Interrupt Status Register */ -#define HD64465_REG_GPDISR 0x14046 /* Port D Interrupt Status Register */ -#define HD64465_REG_GPEISR 0x14048 /* Port E Interrupt Status Register */ - -/* PCMCIA bridge interface */ -#define HD64465_REG_PCC0ISR 0x12000 /* socket 0 interface status */ -#define HD64465_PCCISR_PREADY 0x80 /* mem card ready / io card IREQ */ -#define HD64465_PCCISR_PIREQ 0x80 -#define HD64465_PCCISR_PMWP 0x40 /* mem card write-protected */ -#define HD64465_PCCISR_PVS2 0x20 /* voltage select pin 2 */ -#define HD64465_PCCISR_PVS1 0x10 /* voltage select pin 1 */ -#define HD64465_PCCISR_PCD_MASK 0x0c /* card detect */ -#define HD64465_PCCISR_PBVD_MASK 0x03 /* battery voltage */ -#define HD64465_PCCISR_PBVD_BATGOOD 0x03 /* battery good */ -#define HD64465_PCCISR_PBVD_BATWARN 0x01 /* battery low warning */ -#define HD64465_PCCISR_PBVD_BATDEAD1 0x02 /* battery dead */ -#define HD64465_PCCISR_PBVD_BATDEAD2 0x00 /* battery dead */ -#define HD64465_REG_PCC0GCR 0x12002 /* socket 0 general control */ -#define HD64465_PCCGCR_PDRV 0x80 /* output drive */ -#define HD64465_PCCGCR_PCCR 0x40 /* PC card reset */ -#define HD64465_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ -#define HD64465_PCCGCR_PVCC0 0x10 /* voltage control pin VCC0SEL0 */ -#define HD64465_PCCGCR_PMMOD 0x08 /* memory mode */ -#define HD64465_PCCGCR_PPA25 0x04 /* pin A25 */ -#define HD64465_PCCGCR_PPA24 0x02 /* pin A24 */ -#define HD64465_PCCGCR_PREG 0x01 /* ping PCC0REG# */ -#define HD64465_REG_PCC0CSCR 0x12004 /* socket 0 card status change */ -#define HD64465_PCCCSCR_PSCDI 0x80 /* sw card detect intr */ -#define HD64465_PCCCSCR_PSWSEL 0x40 /* power select */ -#define HD64465_PCCCSCR_PIREQ 0x20 /* IREQ intr req */ -#define HD64465_PCCCSCR_PSC 0x10 /* STSCHG (status change) pin */ -#define HD64465_PCCCSCR_PCDC 0x08 /* CD (card detect) change */ -#define HD64465_PCCCSCR_PRC 0x04 /* ready change */ -#define HD64465_PCCCSCR_PBW 0x02 /* battery warning change */ -#define HD64465_PCCCSCR_PBD 0x01 /* battery dead change */ -#define HD64465_REG_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ -#define HD64465_PCCCSCIER_PCRE 0x80 /* change reset enable */ -#define HD64465_PCCCSCIER_PIREQE_MASK 0x60 /* IREQ enable */ -#define HD64465_PCCCSCIER_PIREQE_DISABLED 0x00 /* IREQ disabled */ -#define HD64465_PCCCSCIER_PIREQE_LEVEL 0x20 /* IREQ level-triggered */ -#define HD64465_PCCCSCIER_PIREQE_FALLING 0x40 /* IREQ falling-edge-trig */ -#define HD64465_PCCCSCIER_PIREQE_RISING 0x60 /* IREQ rising-edge-trig */ -#define HD64465_PCCCSCIER_PSCE 0x10 /* status change enable */ -#define HD64465_PCCCSCIER_PCDE 0x08 /* card detect change enable */ -#define HD64465_PCCCSCIER_PRE 0x04 /* ready change enable */ -#define HD64465_PCCCSCIER_PBWE 0x02 /* battery warn change enable */ -#define HD64465_PCCCSCIER_PBDE 0x01 /* battery dead change enable*/ -#define HD64465_REG_PCC0SCR 0x12008 /* socket 0 software control */ -#define HD64465_PCCSCR_SHDN 0x10 /* TPS2206 SHutDowN pin */ -#define HD64465_PCCSCR_SWP 0x01 /* write protect */ -#define HD64465_REG_PCCPSR 0x1200A /* serial power switch control */ -#define HD64465_REG_PCC1ISR 0x12010 /* socket 1 interface status */ -#define HD64465_REG_PCC1GCR 0x12012 /* socket 1 general control */ -#define HD64465_REG_PCC1CSCR 0x12014 /* socket 1 card status change */ -#define HD64465_REG_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ -#define HD64465_REG_PCC1SCR 0x12018 /* socket 1 software control */ - - -/* PS/2 Keyboard and mouse controller -- *not* register compatible */ -#define HD64465_REG_KBCSR 0x1dc00 /* Keyboard Control/Status reg */ -#define HD64465_KBCSR_KBCIE 0x8000 /* KBCK Input Enable */ -#define HD64465_KBCSR_KBCOE 0x4000 /* KBCK Output Enable */ -#define HD64465_KBCSR_KBDOE 0x2000 /* KB DATA Output Enable */ -#define HD64465_KBCSR_KBCD 0x1000 /* KBCK Driven */ -#define HD64465_KBCSR_KBDD 0x0800 /* KB DATA Driven */ -#define HD64465_KBCSR_KBCS 0x0400 /* KBCK pin Status */ -#define HD64465_KBCSR_KBDS 0x0200 /* KB DATA pin Status */ -#define HD64465_KBCSR_KBDP 0x0100 /* KB DATA Parity bit */ -#define HD64465_KBCSR_KBD_MASK 0x00ff /* KD DATA shift reg */ -#define HD64465_REG_KBISR 0x1dc04 /* Keyboard Interrupt Status reg */ -#define HD64465_KBISR_KBRDF 0x0001 /* KB Received Data Full */ -#define HD64465_REG_MSCSR 0x1dc10 /* Mouse Control/Status reg */ -#define HD64465_REG_MSISR 0x1dc14 /* Mouse Interrupt Status reg */ - - -/* - * Logical address at which the HD64465 is mapped. Note that this - * should always be in the P2 segment (uncached and untranslated). - */ -#ifndef CONFIG_HD64465_IOBASE -#define CONFIG_HD64465_IOBASE 0xb0000000 -#endif -/* - * The HD64465 multiplexes all its modules' interrupts onto - * this single interrupt. - */ -#ifndef CONFIG_HD64465_IRQ -#define CONFIG_HD64465_IRQ 5 -#endif - - -#define _HD64465_IO_MASK 0xf8000000 -#define is_hd64465_addr(addr) \ - ((addr & _HD64465_IO_MASK) == (CONFIG_HD64465_IOBASE & _HD64465_IO_MASK)) - -/* - * A range of 16 virtual interrupts generated by - * demuxing the HD64465 muxed interrupt. - */ -#define HD64465_IRQ_BASE OFFCHIP_IRQ_BASE -#define HD64465_IRQ_NUM 16 -#define HD64465_IRQ_ADC (HD64465_IRQ_BASE+0) -#define HD64465_IRQ_USB (HD64465_IRQ_BASE+1) -#define HD64465_IRQ_SCDI (HD64465_IRQ_BASE+2) -#define HD64465_IRQ_PARALLEL (HD64465_IRQ_BASE+3) -/* bit 4 is reserved */ -#define HD64465_IRQ_UART (HD64465_IRQ_BASE+5) -#define HD64465_IRQ_IRDA (HD64465_IRQ_BASE+6) -#define HD64465_IRQ_PS2MOUSE (HD64465_IRQ_BASE+7) -#define HD64465_IRQ_KBC (HD64465_IRQ_BASE+8) -#define HD64465_IRQ_TIMER1 (HD64465_IRQ_BASE+9) -#define HD64465_IRQ_TIMER0 (HD64465_IRQ_BASE+10) -#define HD64465_IRQ_GPIO (HD64465_IRQ_BASE+11) -#define HD64465_IRQ_AFE (HD64465_IRQ_BASE+12) -#define HD64465_IRQ_PCMCIA1 (HD64465_IRQ_BASE+13) -#define HD64465_IRQ_PCMCIA0 (HD64465_IRQ_BASE+14) -#define HD64465_IRQ_PS2KBD (HD64465_IRQ_BASE+15) - -/* Constants for PCMCIA mappings */ -#define HD64465_PCC_WINDOW 0x01000000 - -#define HD64465_PCC0_BASE 0xb8000000 /* area 6 */ -#define HD64465_PCC0_ATTR (HD64465_PCC0_BASE) -#define HD64465_PCC0_COMM (HD64465_PCC0_BASE+HD64465_PCC_WINDOW) -#define HD64465_PCC0_IO (HD64465_PCC0_BASE+2*HD64465_PCC_WINDOW) - -#define HD64465_PCC1_BASE 0xb4000000 /* area 5 */ -#define HD64465_PCC1_ATTR (HD64465_PCC1_BASE) -#define HD64465_PCC1_COMM (HD64465_PCC1_BASE+HD64465_PCC_WINDOW) -#define HD64465_PCC1_IO (HD64465_PCC1_BASE+2*HD64465_PCC_WINDOW) - -/* - * Base of USB controller interface (as memory) - */ -#define HD64465_USB_BASE (CONFIG_HD64465_IOBASE+0xb000) -#define HD64465_USB_LEN 0x1000 -/* - * Base of embedded SRAM, used for USB controller. - */ -#define HD64465_SRAM_BASE (CONFIG_HD64465_IOBASE+0x9000) -#define HD64465_SRAM_LEN 0x1000 - - - -#endif /* _ASM_SH_HD64465_ */ diff --git a/include/asm-sh/hd64465/io.h b/include/asm-sh/hd64465/io.h deleted file mode 100644 index 139f147..0000000 --- a/include/asm-sh/hd64465/io.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-sh/hd64465/io.h - * - * By Greg Banks - * (c) 2000 PocketPenguins Inc. - * - * Derived from io_hd64461.h, which bore the message: - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for an HD64465 "Windows CE Intelligent Peripheral Controller". - */ - -#ifndef _ASM_SH_IO_HD64465_H -#define _ASM_SH_IO_HD64465_H - -extern unsigned char hd64465_inb(unsigned long port); -extern unsigned short hd64465_inw(unsigned long port); -extern unsigned int hd64465_inl(unsigned long port); - -extern void hd64465_outb(unsigned char value, unsigned long port); -extern void hd64465_outw(unsigned short value, unsigned long port); -extern void hd64465_outl(unsigned int value, unsigned long port); - -extern unsigned char hd64465_inb_p(unsigned long port); -extern void hd64465_outb_p(unsigned char value, unsigned long port); - -extern unsigned long hd64465_isa_port2addr(unsigned long offset); -extern int hd64465_irq_demux(int irq); -/* Provision for generic secondary demux step -- used by PCMCIA code */ -extern void hd64465_register_irq_demux(int irq, - int (*demux)(int irq, void *dev), void *dev); -extern void hd64465_unregister_irq_demux(int irq); -/* Set this variable to 1 to see port traffic */ -extern int hd64465_io_debug; -/* Map a range of ports to a range of kernel virtual memory. - */ -extern void hd64465_port_map(unsigned short baseport, unsigned int nports, - unsigned long addr, unsigned char shift); -extern void hd64465_port_unmap(unsigned short baseport, unsigned int nports); - -#endif /* _ASM_SH_IO_HD64465_H */ diff --git a/include/asm-sh/heartbeat.h b/include/asm-sh/heartbeat.h deleted file mode 100644 index 724a43e..0000000 --- a/include/asm-sh/heartbeat.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_SH_HEARTBEAT_H -#define __ASM_SH_HEARTBEAT_H - -#include - -#define HEARTBEAT_INVERTED (1 << 0) - -struct heartbeat_data { - void __iomem *base; - unsigned char *bit_pos; - unsigned int nr_bits; - struct timer_list timer; - unsigned int regsize; - unsigned long flags; -}; - -#endif /* __ASM_SH_HEARTBEAT_H */ diff --git a/include/asm-sh/hp6xx.h b/include/asm-sh/hp6xx.h deleted file mode 100644 index 0d4165a..0000000 --- a/include/asm-sh/hp6xx.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef __ASM_SH_HP6XX_H -#define __ASM_SH_HP6XX_H - -/* - * Copyright (C) 2003, 2004, 2005 Andriy Skulysh - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#define HP680_BTN_IRQ 32 /* IRQ0_IRQ */ -#define HP680_TS_IRQ 35 /* IRQ3_IRQ */ -#define HP680_HD64461_IRQ 36 /* IRQ4_IRQ */ - -#define DAC_LCD_BRIGHTNESS 0 -#define DAC_SPEAKER_VOLUME 1 - -#define PGDR_OPENED 0x01 -#define PGDR_MAIN_BATTERY_OUT 0x04 -#define PGDR_PLAY_BUTTON 0x08 -#define PGDR_REWIND_BUTTON 0x10 -#define PGDR_RECORD_BUTTON 0x20 - -#define PHDR_TS_PEN_DOWN 0x08 - -#define PJDR_LED_BLINK 0x02 - -#define PKDR_LED_GREEN 0x10 - -#define SCPDR_TS_SCAN_ENABLE 0x20 -#define SCPDR_TS_SCAN_Y 0x02 -#define SCPDR_TS_SCAN_X 0x01 - -#define SCPCR_TS_ENABLE 0x405 -#define SCPCR_TS_MASK 0xc0f - -#define ADC_CHANNEL_TS_Y 1 -#define ADC_CHANNEL_TS_X 2 -#define ADC_CHANNEL_BATTERY 3 -#define ADC_CHANNEL_BACKUP 4 -#define ADC_CHANNEL_CHARGE 5 - -#define HD64461_GPADR_SPEAKER 0x01 -#define HD64461_GPADR_PCMCIA0 (0x02|0x08) - -#define HD64461_GPBDR_LCDOFF 0x01 -#define HD64461_GPBDR_LCD_CONTRAST_MASK 0x78 -#define HD64461_GPBDR_LED_RED 0x80 - -#include -#include - -#define PJDR 0xa4000130 -#define PKDR 0xa4000132 - -#endif /* __ASM_SH_HP6XX_H */ diff --git a/include/asm-sh/hugetlb.h b/include/asm-sh/hugetlb.h deleted file mode 100644 index 967068f..0000000 --- a/include/asm-sh/hugetlb.h +++ /dev/null @@ -1,92 +0,0 @@ -#ifndef _ASM_SH_HUGETLB_H -#define _ASM_SH_HUGETLB_H - -#include - - -static inline int is_hugepage_only_range(struct mm_struct *mm, - unsigned long addr, - unsigned long len) { - return 0; -} - -/* - * If the arch doesn't supply something else, assume that hugepage - * size aligned regions are ok without further preparation. - */ -static inline int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len) -{ - if (len & ~HPAGE_MASK) - return -EINVAL; - if (addr & ~HPAGE_MASK) - return -EINVAL; - return 0; -} - -static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) { -} - -static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb, - unsigned long addr, unsigned long end, - unsigned long floor, - unsigned long ceiling) -{ - free_pgd_range(tlb, addr, end, floor, ceiling); -} - -static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ - set_pte_at(mm, addr, ptep, pte); -} - -static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - return ptep_get_and_clear(mm, addr, ptep); -} - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -} - -static inline int huge_pte_none(pte_t pte) -{ - return pte_none(pte); -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - return pte_wrprotect(pte); -} - -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - ptep_set_wrprotect(mm, addr, ptep); -} - -static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); -} - -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - return *ptep; -} - -static inline int arch_prepare_hugepage(struct page *page) -{ - return 0; -} - -static inline void arch_release_hugepage(struct page *page) -{ -} - -#endif /* _ASM_SH_HUGETLB_H */ diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h deleted file mode 100644 index d557b00..0000000 --- a/include/asm-sh/hw_irq.h +++ /dev/null @@ -1,123 +0,0 @@ -#ifndef __ASM_SH_HW_IRQ_H -#define __ASM_SH_HW_IRQ_H - -#include -#include - -extern atomic_t irq_err_count; - -struct ipr_data { - unsigned char irq; - unsigned char ipr_idx; /* Index for the IPR registered */ - unsigned char shift; /* Number of bits to shift the data */ - unsigned char priority; /* The priority */ -}; - -struct ipr_desc { - unsigned long *ipr_offsets; - unsigned int nr_offsets; - struct ipr_data *ipr_data; - unsigned int nr_irqs; - struct irq_chip chip; -}; - -void register_ipr_controller(struct ipr_desc *); - -typedef unsigned char intc_enum; - -struct intc_vect { - intc_enum enum_id; - unsigned short vect; -}; - -#define INTC_VECT(enum_id, vect) { enum_id, vect } -#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) - -struct intc_group { - intc_enum enum_id; - intc_enum enum_ids[32]; -}; - -#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } - -struct intc_mask_reg { - unsigned long set_reg, clr_reg, reg_width; - intc_enum enum_ids[32]; -#ifdef CONFIG_SMP - unsigned long smp; -#endif -}; - -struct intc_prio_reg { - unsigned long set_reg, clr_reg, reg_width, field_width; - intc_enum enum_ids[16]; -#ifdef CONFIG_SMP - unsigned long smp; -#endif -}; - -struct intc_sense_reg { - unsigned long reg, reg_width, field_width; - intc_enum enum_ids[16]; -}; - -#ifdef CONFIG_SMP -#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) -#else -#define INTC_SMP(stride, nr) -#endif - -struct intc_desc { - struct intc_vect *vectors; - unsigned int nr_vectors; - struct intc_group *groups; - unsigned int nr_groups; - struct intc_mask_reg *mask_regs; - unsigned int nr_mask_regs; - struct intc_prio_reg *prio_regs; - unsigned int nr_prio_regs; - struct intc_sense_reg *sense_regs; - unsigned int nr_sense_regs; - char *name; -#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) - struct intc_mask_reg *ack_regs; - unsigned int nr_ack_regs; -#endif -}; - -#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) -#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ - mask_regs, prio_regs, sense_regs) \ -struct intc_desc symbol __initdata = { \ - _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ - _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ - _INTC_ARRAY(sense_regs), \ - chipname, \ -} - -#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) -#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ - mask_regs, prio_regs, sense_regs, ack_regs) \ -struct intc_desc symbol __initdata = { \ - _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ - _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ - _INTC_ARRAY(sense_regs), \ - chipname, \ - _INTC_ARRAY(ack_regs), \ -} -#endif - -void __init register_intc_controller(struct intc_desc *desc); -int intc_set_priority(unsigned int irq, unsigned int prio); - -void __init plat_irq_setup(void); -#ifdef CONFIG_CPU_SH3 -void __init plat_irq_setup_sh3(void); -#endif - -enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, - IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, - IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 }; -void __init plat_irq_setup_pins(int mode); - -#endif /* __ASM_SH_HW_IRQ_H */ diff --git a/include/asm-sh/i2c-sh7760.h b/include/asm-sh/i2c-sh7760.h deleted file mode 100644 index 2418211..0000000 --- a/include/asm-sh/i2c-sh7760.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * MMIO/IRQ and platform data for SH7760 I2C channels - */ - -#ifndef _I2C_SH7760_H_ -#define _I2C_SH7760_H_ - -#define SH7760_I2C_DEVNAME "sh7760-i2c" - -#define SH7760_I2C0_MMIO 0xFE140000 -#define SH7760_I2C0_MMIOEND 0xFE14003B -#define SH7760_I2C0_IRQ 62 - -#define SH7760_I2C1_MMIO 0xFE150000 -#define SH7760_I2C1_MMIOEND 0xFE15003B -#define SH7760_I2C1_IRQ 63 - -struct sh7760_i2c_platdata { - unsigned int speed_khz; -}; - -#endif diff --git a/include/asm-sh/ilsel.h b/include/asm-sh/ilsel.h deleted file mode 100644 index e3d304b..0000000 --- a/include/asm-sh/ilsel.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef __ASM_SH_ILSEL_H -#define __ASM_SH_ILSEL_H - -typedef enum { - ILSEL_NONE, - ILSEL_LAN, - ILSEL_USBH_I, - ILSEL_USBH_S, - ILSEL_USBH_V, - ILSEL_RTC, - ILSEL_USBP_I, - ILSEL_USBP_S, - ILSEL_USBP_V, - ILSEL_KEY, - - /* - * ILSEL Aliases - corner cases for interleaved level tables. - * - * Someone thought this was a good idea and less hassle than - * demuxing a shared vector, really. - */ - - /* ILSEL0 and 2 */ - ILSEL_FPGA0, - ILSEL_FPGA1, - ILSEL_EX1, - ILSEL_EX2, - ILSEL_EX3, - ILSEL_EX4, - - /* ILSEL1 and 3 */ - ILSEL_FPGA2 = ILSEL_FPGA0, - ILSEL_FPGA3 = ILSEL_FPGA1, - ILSEL_EX5 = ILSEL_EX1, - ILSEL_EX6 = ILSEL_EX2, - ILSEL_EX7 = ILSEL_EX3, - ILSEL_EX8 = ILSEL_EX4, -} ilsel_source_t; - -/* arch/sh/boards/renesas/x3proto/ilsel.c */ -int ilsel_enable(ilsel_source_t set); -int ilsel_enable_fixed(ilsel_source_t set, unsigned int level); -void ilsel_disable(unsigned int irq); - -#endif /* __ASM_SH_ILSEL_H */ diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h deleted file mode 100644 index a4fbf0c..0000000 --- a/include/asm-sh/io.h +++ /dev/null @@ -1,366 +0,0 @@ -#ifndef __ASM_SH_IO_H -#define __ASM_SH_IO_H - -/* - * Convention: - * read{b,w,l}/write{b,w,l} are for PCI, - * while in{b,w,l}/out{b,w,l} are for ISA - * These may (will) be platform specific function. - * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p - * and 'string' versions: ins{b,w,l}/outs{b,w,l} - * For read{b,w,l} and write{b,w,l} there are also __raw versions, which - * do not have a memory barrier after them. - * - * In addition, we have - * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O. - * which are processor specific. - */ - -/* - * We follow the Alpha convention here: - * __inb expands to an inline function call (which calls via the mv) - * _inb is a real function call (note ___raw fns are _ version of __raw) - * inb by default expands to _inb, but the machine specific code may - * define it to __inb if it chooses. - */ -#include -#include -#include -#include -#include -#include - -#ifdef __KERNEL__ - -/* - * Depending on which platform we are running on, we need different - * I/O functions. - */ -#define __IO_PREFIX generic -#include -#include - -#define maybebadio(port) \ - printk(KERN_ERR "bad PC-like io %s:%u for port 0x%lx at 0x%08x\n", \ - __FUNCTION__, __LINE__, (port), (u32)__builtin_return_address(0)) - -/* - * Since boards are able to define their own set of I/O routines through - * their respective machine vector, we always wrap through the mv. - * - * Also, in the event that a board hasn't provided its own definition for - * a given routine, it will be wrapped to generic code at run-time. - */ - -#define __inb(p) sh_mv.mv_inb((p)) -#define __inw(p) sh_mv.mv_inw((p)) -#define __inl(p) sh_mv.mv_inl((p)) -#define __outb(x,p) sh_mv.mv_outb((x),(p)) -#define __outw(x,p) sh_mv.mv_outw((x),(p)) -#define __outl(x,p) sh_mv.mv_outl((x),(p)) - -#define __inb_p(p) sh_mv.mv_inb_p((p)) -#define __inw_p(p) sh_mv.mv_inw_p((p)) -#define __inl_p(p) sh_mv.mv_inl_p((p)) -#define __outb_p(x,p) sh_mv.mv_outb_p((x),(p)) -#define __outw_p(x,p) sh_mv.mv_outw_p((x),(p)) -#define __outl_p(x,p) sh_mv.mv_outl_p((x),(p)) - -#define __insb(p,b,c) sh_mv.mv_insb((p), (b), (c)) -#define __insw(p,b,c) sh_mv.mv_insw((p), (b), (c)) -#define __insl(p,b,c) sh_mv.mv_insl((p), (b), (c)) -#define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c)) -#define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c)) -#define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c)) - -#define __readb(a) sh_mv.mv_readb((a)) -#define __readw(a) sh_mv.mv_readw((a)) -#define __readl(a) sh_mv.mv_readl((a)) -#define __writeb(v,a) sh_mv.mv_writeb((v),(a)) -#define __writew(v,a) sh_mv.mv_writew((v),(a)) -#define __writel(v,a) sh_mv.mv_writel((v),(a)) - -#define inb __inb -#define inw __inw -#define inl __inl -#define outb __outb -#define outw __outw -#define outl __outl - -#define inb_p __inb_p -#define inw_p __inw_p -#define inl_p __inl_p -#define outb_p __outb_p -#define outw_p __outw_p -#define outl_p __outl_p - -#define insb __insb -#define insw __insw -#define insl __insl -#define outsb __outsb -#define outsw __outsw -#define outsl __outsl - -#define __raw_readb(a) __readb((void __iomem *)(a)) -#define __raw_readw(a) __readw((void __iomem *)(a)) -#define __raw_readl(a) __readl((void __iomem *)(a)) -#define __raw_writeb(v, a) __writeb(v, (void __iomem *)(a)) -#define __raw_writew(v, a) __writew(v, (void __iomem *)(a)) -#define __raw_writel(v, a) __writel(v, (void __iomem *)(a)) - -void __raw_writesl(unsigned long addr, const void *data, int longlen); -void __raw_readsl(unsigned long addr, void *data, int longlen); - -/* - * The platform header files may define some of these macros to use - * the inlined versions where appropriate. These macros may also be - * redefined by userlevel programs. - */ -#ifdef __readb -# define readb(a) ({ unsigned int r_ = __raw_readb(a); mb(); r_; }) -#endif -#ifdef __raw_readw -# define readw(a) ({ unsigned int r_ = __raw_readw(a); mb(); r_; }) -#endif -#ifdef __raw_readl -# define readl(a) ({ unsigned int r_ = __raw_readl(a); mb(); r_; }) -#endif - -#ifdef __raw_writeb -# define writeb(v,a) ({ __raw_writeb((v),(a)); mb(); }) -#endif -#ifdef __raw_writew -# define writew(v,a) ({ __raw_writew((v),(a)); mb(); }) -#endif -#ifdef __raw_writel -# define writel(v,a) ({ __raw_writel((v),(a)); mb(); }) -#endif - -#define __BUILD_MEMORY_STRING(bwlq, type) \ - \ -static inline void writes##bwlq(volatile void __iomem *mem, \ - const void *addr, unsigned int count) \ -{ \ - const volatile type *__addr = addr; \ - \ - while (count--) { \ - __raw_write##bwlq(*__addr, mem); \ - __addr++; \ - } \ -} \ - \ -static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ - unsigned int count) \ -{ \ - volatile type *__addr = addr; \ - \ - while (count--) { \ - *__addr = __raw_read##bwlq(mem); \ - __addr++; \ - } \ -} - -__BUILD_MEMORY_STRING(b, u8) -__BUILD_MEMORY_STRING(w, u16) -#define writesl __raw_writesl -#define readsl __raw_readsl - -#define readb_relaxed(a) readb(a) -#define readw_relaxed(a) readw(a) -#define readl_relaxed(a) readl(a) - -/* Simple MMIO */ -#define ioread8(a) readb(a) -#define ioread16(a) readw(a) -#define ioread16be(a) be16_to_cpu(__raw_readw((a))) -#define ioread32(a) readl(a) -#define ioread32be(a) be32_to_cpu(__raw_readl((a))) - -#define iowrite8(v,a) writeb((v),(a)) -#define iowrite16(v,a) writew((v),(a)) -#define iowrite16be(v,a) __raw_writew(cpu_to_be16((v)),(a)) -#define iowrite32(v,a) writel((v),(a)) -#define iowrite32be(v,a) __raw_writel(cpu_to_be32((v)),(a)) - -#define ioread8_rep(a, d, c) readsb((a), (d), (c)) -#define ioread16_rep(a, d, c) readsw((a), (d), (c)) -#define ioread32_rep(a, d, c) readsl((a), (d), (c)) - -#define iowrite8_rep(a, s, c) writesb((a), (s), (c)) -#define iowrite16_rep(a, s, c) writesw((a), (s), (c)) -#define iowrite32_rep(a, s, c) writesl((a), (s), (c)) - -#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * This function provides a method for the generic case where a board-specific - * ioport_map simply needs to return the port + some arbitrary port base. - * - * We use this at board setup time to implicitly set the port base, and - * as a result, we can use the generic ioport_map. - */ -static inline void __set_io_port_base(unsigned long pbase) -{ - extern unsigned long generic_io_base; - - generic_io_base = pbase; -} - -#define __ioport_map(p, n) sh_mv.mv_ioport_map((p), (n)) - -/* We really want to try and get these to memcpy etc */ -extern void memcpy_fromio(void *, volatile void __iomem *, unsigned long); -extern void memcpy_toio(volatile void __iomem *, const void *, unsigned long); -extern void memset_io(volatile void __iomem *, int, unsigned long); - -/* SuperH on-chip I/O functions */ -static inline unsigned char ctrl_inb(unsigned long addr) -{ - return *(volatile unsigned char*)addr; -} - -static inline unsigned short ctrl_inw(unsigned long addr) -{ - return *(volatile unsigned short*)addr; -} - -static inline unsigned int ctrl_inl(unsigned long addr) -{ - return *(volatile unsigned long*)addr; -} - -static inline unsigned long long ctrl_inq(unsigned long addr) -{ - return *(volatile unsigned long long*)addr; -} - -static inline void ctrl_outb(unsigned char b, unsigned long addr) -{ - *(volatile unsigned char*)addr = b; -} - -static inline void ctrl_outw(unsigned short b, unsigned long addr) -{ - *(volatile unsigned short*)addr = b; -} - -static inline void ctrl_outl(unsigned int b, unsigned long addr) -{ - *(volatile unsigned long*)addr = b; -} - -static inline void ctrl_outq(unsigned long long b, unsigned long addr) -{ - *(volatile unsigned long long*)addr = b; -} - -static inline void ctrl_delay(void) -{ -#ifdef P2SEG - ctrl_inw(P2SEG); -#endif -} - -/* Quad-word real-mode I/O, don't ask.. */ -unsigned long long peek_real_address_q(unsigned long long addr); -unsigned long long poke_real_address_q(unsigned long long addr, - unsigned long long val); - -#if !defined(CONFIG_MMU) -#define virt_to_phys(address) ((unsigned long)(address)) -#define phys_to_virt(address) ((void *)(address)) -#else -#define virt_to_phys(address) (__pa(address)) -#define phys_to_virt(address) (__va(address)) -#endif - -/* - * On 32-bit SH, we traditionally have the whole physical address space - * mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do - * not need to do anything but place the address in the proper segment. - * This is true for P1 and P2 addresses, as well as some P3 ones. - * However, most of the P3 addresses and newer cores using extended - * addressing need to map through page tables, so the ioremap() - * implementation becomes a bit more complicated. - * - * See arch/sh/mm/ioremap.c for additional notes on this. - * - * We cheat a bit and always return uncachable areas until we've fixed - * the drivers to handle caching properly. - * - * On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply - * doesn't exist, so everything must go through page tables. - */ -#ifdef CONFIG_MMU -void __iomem *__ioremap(unsigned long offset, unsigned long size, - unsigned long flags); -void __iounmap(void __iomem *addr); - -/* arch/sh/mm/ioremap_64.c */ -unsigned long onchip_remap(unsigned long addr, unsigned long size, - const char *name); -extern void onchip_unmap(unsigned long vaddr); -#else -#define __ioremap(offset, size, flags) ((void __iomem *)(offset)) -#define __iounmap(addr) do { } while (0) -#define onchip_remap(addr, size, name) (addr) -#define onchip_unmap(addr) do { } while (0) -#endif /* CONFIG_MMU */ - -static inline void __iomem * -__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) -{ -#ifdef CONFIG_SUPERH32 - unsigned long last_addr = offset + size - 1; -#endif - void __iomem *ret; - - ret = __ioremap_trapped(offset, size); - if (ret) - return ret; - -#ifdef CONFIG_SUPERH32 - /* - * For P1 and P2 space this is trivial, as everything is already - * mapped. Uncached access for P1 addresses are done through P2. - * In the P3 case or for addresses outside of the 29-bit space, - * mapping must be done by the PMB or by using page tables. - */ - if (likely(PXSEG(offset) < P3SEG && PXSEG(last_addr) < P3SEG)) { - if (unlikely(flags & _PAGE_CACHABLE)) - return (void __iomem *)P1SEGADDR(offset); - - return (void __iomem *)P2SEGADDR(offset); - } -#endif - - return __ioremap(offset, size, flags); -} - -#define ioremap(offset, size) \ - __ioremap_mode((offset), (size), 0) -#define ioremap_nocache(offset, size) \ - __ioremap_mode((offset), (size), 0) -#define ioremap_cache(offset, size) \ - __ioremap_mode((offset), (size), _PAGE_CACHABLE) -#define p3_ioremap(offset, size, flags) \ - __ioremap((offset), (size), (flags)) -#define iounmap(addr) \ - __iounmap((addr)) - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_IO_H */ diff --git a/include/asm-sh/io_generic.h b/include/asm-sh/io_generic.h deleted file mode 100644 index 92fc607..0000000 --- a/include/asm-sh/io_generic.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Trivial I/O routine definitions, intentionally meant to be included - * multiple times. Ugly I/O routine concatenation helpers taken from - * alpha. Must be included _before_ io.h to avoid preprocessor-induced - * routine mismatch. - */ -#define IO_CONCAT(a,b) _IO_CONCAT(a,b) -#define _IO_CONCAT(a,b) a ## _ ## b - -#ifndef __IO_PREFIX -#error "Don't include this header without a valid system prefix" -#endif - -u8 IO_CONCAT(__IO_PREFIX,inb)(unsigned long); -u16 IO_CONCAT(__IO_PREFIX,inw)(unsigned long); -u32 IO_CONCAT(__IO_PREFIX,inl)(unsigned long); - -void IO_CONCAT(__IO_PREFIX,outb)(u8, unsigned long); -void IO_CONCAT(__IO_PREFIX,outw)(u16, unsigned long); -void IO_CONCAT(__IO_PREFIX,outl)(u32, unsigned long); - -u8 IO_CONCAT(__IO_PREFIX,inb_p)(unsigned long); -u16 IO_CONCAT(__IO_PREFIX,inw_p)(unsigned long); -u32 IO_CONCAT(__IO_PREFIX,inl_p)(unsigned long); -void IO_CONCAT(__IO_PREFIX,outb_p)(u8, unsigned long); -void IO_CONCAT(__IO_PREFIX,outw_p)(u16, unsigned long); -void IO_CONCAT(__IO_PREFIX,outl_p)(u32, unsigned long); - -void IO_CONCAT(__IO_PREFIX,insb)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,insw)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,insl)(unsigned long, void *dst, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsb)(unsigned long, const void *src, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsw)(unsigned long, const void *src, unsigned long count); -void IO_CONCAT(__IO_PREFIX,outsl)(unsigned long, const void *src, unsigned long count); - -u8 IO_CONCAT(__IO_PREFIX,readb)(void __iomem *); -u16 IO_CONCAT(__IO_PREFIX,readw)(void __iomem *); -u32 IO_CONCAT(__IO_PREFIX,readl)(void __iomem *); -void IO_CONCAT(__IO_PREFIX,writeb)(u8, void __iomem *); -void IO_CONCAT(__IO_PREFIX,writew)(u16, void __iomem *); -void IO_CONCAT(__IO_PREFIX,writel)(u32, void __iomem *); - -void *IO_CONCAT(__IO_PREFIX,ioremap)(unsigned long offset, unsigned long size); -void IO_CONCAT(__IO_PREFIX,iounmap)(void *addr); - -void __iomem *IO_CONCAT(__IO_PREFIX,ioport_map)(unsigned long addr, unsigned int size); -void IO_CONCAT(__IO_PREFIX,ioport_unmap)(void __iomem *addr); - -#undef __IO_PREFIX diff --git a/include/asm-sh/io_trapped.h b/include/asm-sh/io_trapped.h deleted file mode 100644 index f1251d4..0000000 --- a/include/asm-sh/io_trapped.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef __ASM_SH_IO_TRAPPED_H -#define __ASM_SH_IO_TRAPPED_H - -#include -#include -#include - -#define IO_TRAPPED_MAGIC 0xfeedbeef - -struct trapped_io { - unsigned int magic; - struct resource *resource; - unsigned int num_resources; - unsigned int minimum_bus_width; - struct list_head list; - void __iomem *virt_base; -} __aligned(PAGE_SIZE); - -#ifdef CONFIG_IO_TRAPPED -int register_trapped_io(struct trapped_io *tiop); -int handle_trapped_io(struct pt_regs *regs, unsigned long address); - -void __iomem *match_trapped_io_handler(struct list_head *list, - unsigned long offset, - unsigned long size); - -#ifdef CONFIG_HAS_IOMEM -extern struct list_head trapped_mem; - -static inline void __iomem * -__ioremap_trapped(unsigned long offset, unsigned long size) -{ - return match_trapped_io_handler(&trapped_mem, offset, size); -} -#else -#define __ioremap_trapped(offset, size) NULL -#endif - -#ifdef CONFIG_HAS_IOPORT -extern struct list_head trapped_io; - -static inline void __iomem * -__ioport_map_trapped(unsigned long offset, unsigned long size) -{ - return match_trapped_io_handler(&trapped_io, offset, size); -} -#else -#define __ioport_map_trapped(offset, size) NULL -#endif - -#else -#define register_trapped_io(tiop) (-1) -#define handle_trapped_io(tiop, address) 0 -#define __ioremap_trapped(offset, size) NULL -#define __ioport_map_trapped(offset, size) NULL -#endif - -#endif /* __ASM_SH_IO_TRAPPED_H */ diff --git a/include/asm-sh/ioctl.h b/include/asm-sh/ioctl.h deleted file mode 100644 index b279fe0..0000000 --- a/include/asm-sh/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/ioctls.h b/include/asm-sh/ioctls.h deleted file mode 100644 index c212c37..0000000 --- a/include/asm-sh/ioctls.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef __ASM_SH_IOCTLS_H -#define __ASM_SH_IOCTLS_H - -#include - -#define FIOCLEX _IO('f', 1) -#define FIONCLEX _IO('f', 2) -#define FIOASYNC _IOW('f', 125, int) -#define FIONBIO _IOW('f', 126, int) -#define FIONREAD _IOR('f', 127, int) -#define TIOCINQ FIONREAD -#define FIOQSIZE _IOR('f', 128, loff_t) - -#define TCGETS 0x5401 -#define TCSETS 0x5402 -#define TCSETSW 0x5403 -#define TCSETSF 0x5404 - -#define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */ -#define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */ -#define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */ -#define TCSETAF 0x4012741C /* _IOW('t', 28, struct termio) */ - -#define TCSBRK _IO('t', 29) -#define TCXONC _IO('t', 30) -#define TCFLSH _IO('t', 31) - -#define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */ -#define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */ -#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ -#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ -#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ - -#define TIOCSPGRP _IOW('t', 118, int) -#define TIOCGPGRP _IOR('t', 119, int) - -#define TIOCEXCL _IO('T', 12) /* 0x540C */ -#define TIOCNXCL _IO('T', 13) /* 0x540D */ -#define TIOCSCTTY _IO('T', 14) /* 0x540E */ - -#define TIOCSTI _IOW('T', 18, char) /* 0x5412 */ -#define TIOCMGET _IOR('T', 21, unsigned int) /* 0x5415 */ -#define TIOCMBIS _IOW('T', 22, unsigned int) /* 0x5416 */ -#define TIOCMBIC _IOW('T', 23, unsigned int) /* 0x5417 */ -#define TIOCMSET _IOW('T', 24, unsigned int) /* 0x5418 */ -# define TIOCM_LE 0x001 -# define TIOCM_DTR 0x002 -# define TIOCM_RTS 0x004 -# define TIOCM_ST 0x008 -# define TIOCM_SR 0x010 -# define TIOCM_CTS 0x020 -# define TIOCM_CAR 0x040 -# define TIOCM_RNG 0x080 -# define TIOCM_DSR 0x100 -# define TIOCM_CD TIOCM_CAR -# define TIOCM_RI TIOCM_RNG - -#define TIOCGSOFTCAR _IOR('T', 25, unsigned int) /* 0x5419 */ -#define TIOCSSOFTCAR _IOW('T', 26, unsigned int) /* 0x541A */ -#define TIOCLINUX _IOW('T', 28, char) /* 0x541C */ -#define TIOCCONS _IO('T', 29) /* 0x541D */ -#define TIOCGSERIAL 0x803C541E /* _IOR('T', 30, struct serial_struct) 0x541E */ -#define TIOCSSERIAL 0x403C541F /* _IOW('T', 31, struct serial_struct) 0x541F */ -#define TIOCPKT _IOW('T', 32, int) /* 0x5420 */ -# define TIOCPKT_DATA 0 -# define TIOCPKT_FLUSHREAD 1 -# define TIOCPKT_FLUSHWRITE 2 -# define TIOCPKT_STOP 4 -# define TIOCPKT_START 8 -# define TIOCPKT_NOSTOP 16 -# define TIOCPKT_DOSTOP 32 - - -#define TIOCNOTTY _IO('T', 34) /* 0x5422 */ -#define TIOCSETD _IOW('T', 35, int) /* 0x5423 */ -#define TIOCGETD _IOR('T', 36, int) /* 0x5424 */ -#define TCSBRKP _IOW('T', 37, int) /* 0x5425 */ /* Needed for POSIX tcsendbreak() */ -#define TIOCSBRK _IO('T', 39) /* 0x5427 */ /* BSD compatibility */ -#define TIOCCBRK _IO('T', 40) /* 0x5428 */ /* BSD compatibility */ -#define TIOCGSID _IOR('T', 41, pid_t) /* 0x5429 */ /* Return the session ID of FD */ -#define TCGETS2 _IOR('T', 42, struct termios2) -#define TCSETS2 _IOW('T', 43, struct termios2) -#define TCSETSW2 _IOW('T', 44, struct termios2) -#define TCSETSF2 _IOW('T', 45, struct termios2) -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ -#define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ -#define TIOCSERSWILD _IOW('T', 85, int) /* 0x5455 */ -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x80d85458 /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */ -#define TIOCSERGETLSR _IOR('T', 89, unsigned int) /* 0x5459 */ /* Get line status register */ - /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ -# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ -#define TIOCSERGETMULTI 0x80A8545A /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */ -#define TIOCSERSETMULTI 0x40A8545B /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */ - -#define TIOCMIWAIT _IO('T', 92) /* 0x545C */ /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ - -#endif /* __ASM_SH_IOCTLS_H */ diff --git a/include/asm-sh/ipcbuf.h b/include/asm-sh/ipcbuf.h deleted file mode 100644 index 5ffc997..0000000 --- a/include/asm-sh/ipcbuf.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASM_SH_IPCBUF_H__ -#define __ASM_SH_IPCBUF_H__ - -/* - * The ipc64_perm structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode_t and seq - * - 2 miscellaneous 32-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __ASM_SH_IPCBUF_H__ */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h deleted file mode 100644 index ca66e5d..0000000 --- a/include/asm-sh/irq.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef __ASM_SH_IRQ_H -#define __ASM_SH_IRQ_H - -#include - -/* - * A sane default based on a reasonable vector table size, platforms are - * advised to cap this at the hard limit that they're interested in - * through the machvec. - */ -#define NR_IRQS 256 - -/* - * Convert back and forth between INTEVT and IRQ values. - */ -#ifdef CONFIG_CPU_HAS_INTEVT -#define evt2irq(evt) (((evt) >> 5) - 16) -#define irq2evt(irq) (((irq) + 16) << 5) -#else -#define evt2irq(evt) (evt) -#define irq2evt(irq) (irq) -#endif - -/* - * Simple Mask Register Support - */ -extern void make_maskreg_irq(unsigned int irq); -extern unsigned short *irq_mask_register; - -/* - * PINT IRQs - */ -void init_IRQ_pint(void); -void make_imask_irq(unsigned int irq); - -static inline int generic_irq_demux(int irq) -{ - return irq; -} - -#define irq_canonicalize(irq) (irq) -#define irq_demux(irq) sh_mv.mv_irq_demux(irq) - -#ifdef CONFIG_IRQSTACKS -extern void irq_ctx_init(int cpu); -extern void irq_ctx_exit(int cpu); -# define __ARCH_HAS_DO_SOFTIRQ -#else -# define irq_ctx_init(cpu) do { } while (0) -# define irq_ctx_exit(cpu) do { } while (0) -#endif - -#ifdef CONFIG_CPU_SH5 -#include -#endif - -#endif /* __ASM_SH_IRQ_H */ diff --git a/include/asm-sh/irq_regs.h b/include/asm-sh/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-sh/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h deleted file mode 100644 index 46e71da..0000000 --- a/include/asm-sh/irqflags.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ASM_SH_IRQFLAGS_H -#define __ASM_SH_IRQFLAGS_H - -#ifdef CONFIG_SUPERH32 -#include "irqflags_32.h" -#else -#include "irqflags_64.h" -#endif - -#define raw_local_save_flags(flags) \ - do { (flags) = __raw_local_save_flags(); } while (0) - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return (flags != 0); -} - -static inline int raw_irqs_disabled(void) -{ - unsigned long flags = __raw_local_save_flags(); - - return raw_irqs_disabled_flags(flags); -} - -#define raw_local_irq_save(flags) \ - do { (flags) = __raw_local_irq_save(); } while (0) - -static inline void raw_local_irq_restore(unsigned long flags) -{ - if ((flags & 0xf0) != 0xf0) - raw_local_irq_enable(); -} - -#endif /* __ASM_SH_IRQFLAGS_H */ diff --git a/include/asm-sh/irqflags_32.h b/include/asm-sh/irqflags_32.h deleted file mode 100644 index 60218f5..0000000 --- a/include/asm-sh/irqflags_32.h +++ /dev/null @@ -1,99 +0,0 @@ -#ifndef __ASM_SH_IRQFLAGS_32_H -#define __ASM_SH_IRQFLAGS_32_H - -static inline void raw_local_irq_enable(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and %1, %0\n\t" -#ifdef CONFIG_CPU_HAS_SR_RB - "stc r6_bank, %1\n\t" - "or %1, %0\n\t" -#endif - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x000000f0) - : "memory" - ); -} - -static inline void raw_local_irq_disable(void) -{ - unsigned long flags; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "or #0xf0, %0\n\t" - "ldc %0, sr\n\t" - : "=&z" (flags) - : /* no inputs */ - : "memory" - ); -} - -static inline void set_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "or %2, %0\n\t" - "and %3, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "r" (0x10000000), "r" (0xffffff0f) - : "memory" - ); -} - -static inline void clear_bl_bit(void) -{ - unsigned long __dummy0, __dummy1; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and %2, %0\n\t" - "ldc %0, sr\n\t" - : "=&r" (__dummy0), "=r" (__dummy1) - : "1" (~0x10000000) - : "memory" - ); -} - -static inline unsigned long __raw_local_save_flags(void) -{ - unsigned long flags; - - __asm__ __volatile__ ( - "stc sr, %0\n\t" - "and #0xf0, %0\n\t" - : "=&z" (flags) - : /* no inputs */ - : "memory" - ); - - return flags; -} - -static inline unsigned long __raw_local_irq_save(void) -{ - unsigned long flags, __dummy; - - __asm__ __volatile__ ( - "stc sr, %1\n\t" - "mov %1, %0\n\t" - "or #0xf0, %0\n\t" - "ldc %0, sr\n\t" - "mov %1, %0\n\t" - "and #0xf0, %0\n\t" - : "=&z" (flags), "=&r" (__dummy) - : /* no inputs */ - : "memory" - ); - - return flags; -} - -#endif /* __ASM_SH_IRQFLAGS_32_H */ diff --git a/include/asm-sh/irqflags_64.h b/include/asm-sh/irqflags_64.h deleted file mode 100644 index 4f6b8a5..0000000 --- a/include/asm-sh/irqflags_64.h +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef __ASM_SH_IRQFLAGS_64_H -#define __ASM_SH_IRQFLAGS_64_H - -#include - -#define SR_MASK_LL 0x00000000000000f0LL -#define SR_BL_LL 0x0000000010000000LL - -static inline void raw_local_irq_enable(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -static inline void raw_local_irq_disable(void) -{ - unsigned long long __dummy0, __dummy1 = SR_MASK_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -static inline void set_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); - -} - -static inline void clear_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -static inline unsigned long __raw_local_save_flags(void) -{ - unsigned long long __dummy = SR_MASK_LL; - unsigned long flags; - - __asm__ __volatile__ ( - "getcon " __SR ", %0\n\t" - "and %0, %1, %0" - : "=&r" (flags) - : "r" (__dummy)); - - return flags; -} - -static inline unsigned long __raw_local_irq_save(void) -{ - unsigned long long __dummy0, __dummy1 = SR_MASK_LL; - unsigned long flags; - - __asm__ __volatile__ ( - "getcon " __SR ", %1\n\t" - "or %1, r63, %0\n\t" - "or %1, %2, %1\n\t" - "putcon %1, " __SR "\n\t" - "and %0, %2, %0" - : "=&r" (flags), "=&r" (__dummy0) - : "r" (__dummy1)); - - return flags; -} - -#endif /* __ASM_SH_IRQFLAGS_64_H */ diff --git a/include/asm-sh/kdebug.h b/include/asm-sh/kdebug.h deleted file mode 100644 index 49cd690..0000000 --- a/include/asm-sh/kdebug.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_SH_KDEBUG_H -#define __ASM_SH_KDEBUG_H - -/* Grossly misnamed. */ -enum die_val { - DIE_TRAP, -}; - -#endif /* __ASM_SH_KDEBUG_H */ diff --git a/include/asm-sh/kexec.h b/include/asm-sh/kexec.h deleted file mode 100644 index 00f4260..0000000 --- a/include/asm-sh/kexec.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef __ASM_SH_KEXEC_H -#define __ASM_SH_KEXEC_H - -#include -#include - -/* - * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. - * I.e. Maximum page that is mapped directly into kernel memory, - * and kmap is not required. - * - * Someone correct me if FIXADDR_START - PAGEOFFSET is not the correct - * calculation for the amount of memory directly mappable into the - * kernel memory space. - */ - -/* Maximum physical address we can use pages from */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) -/* Maximum address we can reach in physical address mode */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) -/* Maximum address we can use for the control code buffer */ -#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE - -#define KEXEC_CONTROL_CODE_SIZE 4096 - -/* The native architecture */ -#define KEXEC_ARCH KEXEC_ARCH_SH - -static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) -{ - if (oldregs) - memcpy(newregs, oldregs, sizeof(*newregs)); - else { - __asm__ __volatile__ ("mov r0, %0" : "=r" (newregs->regs[0])); - __asm__ __volatile__ ("mov r1, %0" : "=r" (newregs->regs[1])); - __asm__ __volatile__ ("mov r2, %0" : "=r" (newregs->regs[2])); - __asm__ __volatile__ ("mov r3, %0" : "=r" (newregs->regs[3])); - __asm__ __volatile__ ("mov r4, %0" : "=r" (newregs->regs[4])); - __asm__ __volatile__ ("mov r5, %0" : "=r" (newregs->regs[5])); - __asm__ __volatile__ ("mov r6, %0" : "=r" (newregs->regs[6])); - __asm__ __volatile__ ("mov r7, %0" : "=r" (newregs->regs[7])); - __asm__ __volatile__ ("mov r8, %0" : "=r" (newregs->regs[8])); - __asm__ __volatile__ ("mov r9, %0" : "=r" (newregs->regs[9])); - __asm__ __volatile__ ("mov r10, %0" : "=r" (newregs->regs[10])); - __asm__ __volatile__ ("mov r11, %0" : "=r" (newregs->regs[11])); - __asm__ __volatile__ ("mov r12, %0" : "=r" (newregs->regs[12])); - __asm__ __volatile__ ("mov r13, %0" : "=r" (newregs->regs[13])); - __asm__ __volatile__ ("mov r14, %0" : "=r" (newregs->regs[14])); - __asm__ __volatile__ ("mov r15, %0" : "=r" (newregs->regs[15])); - - __asm__ __volatile__ ("sts pr, %0" : "=r" (newregs->pr)); - __asm__ __volatile__ ("sts macl, %0" : "=r" (newregs->macl)); - __asm__ __volatile__ ("sts mach, %0" : "=r" (newregs->mach)); - - __asm__ __volatile__ ("stc gbr, %0" : "=r" (newregs->gbr)); - __asm__ __volatile__ ("stc sr, %0" : "=r" (newregs->sr)); - - newregs->pc = (unsigned long)current_text_addr(); - } -} -#endif /* __ASM_SH_KEXEC_H */ diff --git a/include/asm-sh/kgdb.h b/include/asm-sh/kgdb.h deleted file mode 100644 index 24e4207..0000000 --- a/include/asm-sh/kgdb.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Based on original code by Glenn Engel, Jim Kingdon, - * David Grothe , Tigran Aivazian, and - * Amit S. Kale - * - * Super-H port based on sh-stub.c (Ben Lee and Steve Chamberlain) by - * Henry Bell - * - * Header file for low-level support for remote debug using GDB. - * - */ - -#ifndef __KGDB_H -#define __KGDB_H - -#include - -/* Same as pt_regs but has vbr in place of syscall_nr */ -struct kgdb_regs { - unsigned long regs[16]; - unsigned long pc; - unsigned long pr; - unsigned long sr; - unsigned long gbr; - unsigned long mach; - unsigned long macl; - unsigned long vbr; -}; - -/* State info */ -extern char kgdb_in_gdb_mode; -extern int kgdb_nofault; /* Ignore bus errors (in gdb mem access) */ -extern char in_nmi; /* Debounce flag to prevent NMI reentry*/ - -/* SCI */ -extern int kgdb_portnum; -extern int kgdb_baud; -extern char kgdb_parity; -extern char kgdb_bits; - -/* Init and interface stuff */ -extern int kgdb_init(void); -extern int (*kgdb_getchar)(void); -extern void (*kgdb_putchar)(int); - -/* Trap functions */ -typedef void (kgdb_debug_hook_t)(struct pt_regs *regs); -typedef void (kgdb_bus_error_hook_t)(void); -extern kgdb_debug_hook_t *kgdb_debug_hook; -extern kgdb_bus_error_hook_t *kgdb_bus_err_hook; - -/* Console */ -struct console; -void kgdb_console_write(struct console *co, const char *s, unsigned count); -extern int kgdb_console_setup(struct console *, char *); - -/* Prototypes for jmp fns */ -#define _JBLEN 9 -typedef int jmp_buf[_JBLEN]; -extern void longjmp(jmp_buf __jmpb, int __retval); -extern int setjmp(jmp_buf __jmpb); - -/* Forced breakpoint */ -#define breakpoint() __asm__ __volatile__("trapa #0x3c") - -#endif diff --git a/include/asm-sh/kmap_types.h b/include/asm-sh/kmap_types.h deleted file mode 100644 index 84d565c..0000000 --- a/include/asm-sh/kmap_types.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef __SH_KMAP_TYPES_H -#define __SH_KMAP_TYPES_H - -/* Dummy header just to define km_type. */ - - -#ifdef CONFIG_DEBUG_HIGHMEM -# define D(n) __KM_FENCE_##n , -#else -# define D(n) -#endif - -enum km_type { -D(0) KM_BOUNCE_READ, -D(1) KM_SKB_SUNRPC_DATA, -D(2) KM_SKB_DATA_SOFTIRQ, -D(3) KM_USER0, -D(4) KM_USER1, -D(5) KM_BIO_SRC_IRQ, -D(6) KM_BIO_DST_IRQ, -D(7) KM_PTE0, -D(8) KM_PTE1, -D(9) KM_IRQ0, -D(10) KM_IRQ1, -D(11) KM_SOFTIRQ0, -D(12) KM_SOFTIRQ1, -D(13) KM_TYPE_NR -}; - -#undef D - -#endif diff --git a/include/asm-sh/landisk/gio.h b/include/asm-sh/landisk/gio.h deleted file mode 100644 index 35d7368..0000000 --- a/include/asm-sh/landisk/gio.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef __ASM_SH_LANDISK_GIO_H -#define __ASM_SH_LANDISK_GIO_H - -#include - -/* version */ -#define VERSION_STR "1.00" - -/* Driver name */ -#define GIO_DRIVER_NAME "/dev/giodrv" - -/* Use 'k' as magic number */ -#define GIODRV_IOC_MAGIC 'k' - -#define GIODRV_IOCRESET _IO(GIODRV_IOC_MAGIC, 0) -/* - * S means "Set" through a ptr, - * T means "Tell" directly - * G means "Get" (to a pointed var) - * Q means "Query", response is on the return value - * X means "eXchange": G and S atomically - * H means "sHift": T and Q atomically - */ -#define GIODRV_IOCSGIODATA1 _IOW(GIODRV_IOC_MAGIC, 1, unsigned char *) -#define GIODRV_IOCGGIODATA1 _IOR(GIODRV_IOC_MAGIC, 2, unsigned char *) -#define GIODRV_IOCSGIODATA2 _IOW(GIODRV_IOC_MAGIC, 3, unsigned short *) -#define GIODRV_IOCGGIODATA2 _IOR(GIODRV_IOC_MAGIC, 4, unsigned short *) -#define GIODRV_IOCSGIODATA4 _IOW(GIODRV_IOC_MAGIC, 5, unsigned long *) -#define GIODRV_IOCGGIODATA4 _IOR(GIODRV_IOC_MAGIC, 6, unsigned long *) -#define GIODRV_IOCSGIOSETADDR _IOW(GIODRV_IOC_MAGIC, 7, unsigned long *) -#define GIODRV_IOCHARDRESET _IO(GIODRV_IOC_MAGIC, 8) /* debugging tool */ -#define GIODRV_IOC_MAXNR 8 - -#define GIO_READ 0x00000000 -#define GIO_WRITE 0x00000001 - -#endif /* __ASM_SH_LANDISK_GIO_H */ diff --git a/include/asm-sh/landisk/iodata_landisk.h b/include/asm-sh/landisk/iodata_landisk.h deleted file mode 100644 index 6fb04ab..0000000 --- a/include/asm-sh/landisk/iodata_landisk.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef __ASM_SH_IODATA_LANDISK_H -#define __ASM_SH_IODATA_LANDISK_H - -/* - * linux/include/asm-sh/landisk/iodata_landisk.h - * - * Copyright (C) 2000 Atom Create Engineering Co., Ltd. - * - * IO-DATA LANDISK support - */ - -/* Box specific addresses. */ - -#define PA_USB 0xa4000000 /* USB Controller M66590 */ - -#define PA_ATARST 0xb0000000 /* ATA/FATA Access Control Register */ -#define PA_LED 0xb0000001 /* LED Control Register */ -#define PA_STATUS 0xb0000002 /* Switch Status Register */ -#define PA_SHUTDOWN 0xb0000003 /* Shutdown Control Register */ -#define PA_PCIPME 0xb0000004 /* PCI PME Status Register */ -#define PA_IMASK 0xb0000005 /* Interrupt Mask Register */ -/* 2003.10.31 I-O DATA NSD NWG add. for shutdown port clear */ -#define PA_PWRINT_CLR 0xb0000006 /* Shutdown Interrupt clear Register */ - -#define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */ -#define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */ - -#define IRQ_PCIINTA 5 /* PCI INTA IRQ */ -#define IRQ_PCIINTB 6 /* PCI INTB IRQ */ -#define IRQ_PCIINDC 7 /* PCI INTC IRQ */ -#define IRQ_PCIINTD 8 /* PCI INTD IRQ */ -#define IRQ_ATA 9 /* ATA IRQ */ -#define IRQ_FATA 10 /* FATA IRQ */ -#define IRQ_POWER 11 /* Power Switch IRQ */ -#define IRQ_BUTTON 12 /* USL-5P Button IRQ */ -#define IRQ_FAULT 13 /* USL-5P Fault IRQ */ - -#define __IO_PREFIX landisk -#include - -#endif /* __ASM_SH_IODATA_LANDISK_H */ - diff --git a/include/asm-sh/lboxre2.h b/include/asm-sh/lboxre2.h deleted file mode 100644 index e6d1605..0000000 --- a/include/asm-sh/lboxre2.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_SH_LBOXRE2_H -#define __ASM_SH_LBOXRE2_H - -/* - * Copyright (C) 2007 Nobuhiro Iwamatsu - * - * NTT COMWARE L-BOX RE2 support - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#define IRQ_CF1 9 /* CF1 */ -#define IRQ_CF0 10 /* CF0 */ -#define IRQ_INTD 11 /* INTD */ -#define IRQ_ETH1 12 /* Ether1 */ -#define IRQ_ETH0 13 /* Ether0 */ -#define IRQ_INTA 14 /* INTA */ - -void init_lboxre2_IRQ(void); - -#define __IO_PREFIX lboxre2 -#include - -#endif /* __ASM_SH_LBOXRE2_H */ diff --git a/include/asm-sh/linkage.h b/include/asm-sh/linkage.h deleted file mode 100644 index 3565a4f..0000000 --- a/include/asm-sh/linkage.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -#define __ALIGN .balign 4 -#define __ALIGN_STR ".balign 4" - -#endif diff --git a/include/asm-sh/local.h b/include/asm-sh/local.h deleted file mode 100644 index 9ed9b9c..0000000 --- a/include/asm-sh/local.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_SH_LOCAL_H -#define __ASM_SH_LOCAL_H - -#include - -#endif /* __ASM_SH_LOCAL_H */ - diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h deleted file mode 100644 index b2e4124..0000000 --- a/include/asm-sh/machvec.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * include/asm-sh/machvec.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - */ - -#ifndef _ASM_SH_MACHVEC_H -#define _ASM_SH_MACHVEC_H - -#include -#include -#include - -struct device; - -struct sh_machine_vector { - void (*mv_setup)(char **cmdline_p); - const char *mv_name; - int mv_nr_irqs; - - u8 (*mv_inb)(unsigned long); - u16 (*mv_inw)(unsigned long); - u32 (*mv_inl)(unsigned long); - void (*mv_outb)(u8, unsigned long); - void (*mv_outw)(u16, unsigned long); - void (*mv_outl)(u32, unsigned long); - - u8 (*mv_inb_p)(unsigned long); - u16 (*mv_inw_p)(unsigned long); - u32 (*mv_inl_p)(unsigned long); - void (*mv_outb_p)(u8, unsigned long); - void (*mv_outw_p)(u16, unsigned long); - void (*mv_outl_p)(u32, unsigned long); - - void (*mv_insb)(unsigned long, void *dst, unsigned long count); - void (*mv_insw)(unsigned long, void *dst, unsigned long count); - void (*mv_insl)(unsigned long, void *dst, unsigned long count); - void (*mv_outsb)(unsigned long, const void *src, unsigned long count); - void (*mv_outsw)(unsigned long, const void *src, unsigned long count); - void (*mv_outsl)(unsigned long, const void *src, unsigned long count); - - u8 (*mv_readb)(void __iomem *); - u16 (*mv_readw)(void __iomem *); - u32 (*mv_readl)(void __iomem *); - void (*mv_writeb)(u8, void __iomem *); - void (*mv_writew)(u16, void __iomem *); - void (*mv_writel)(u32, void __iomem *); - - int (*mv_irq_demux)(int irq); - - void (*mv_init_irq)(void); - void (*mv_init_pci)(void); - - void (*mv_heartbeat)(void); - - void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); - void (*mv_ioport_unmap)(void __iomem *); -}; - -extern struct sh_machine_vector sh_mv; - -#define get_system_type() sh_mv.mv_name - -#define __initmv \ - __used __section(.machvec.init) - -#endif /* _ASM_SH_MACHVEC_H */ diff --git a/include/asm-sh/magicpanelr2.h b/include/asm-sh/magicpanelr2.h deleted file mode 100644 index c644a77..0000000 --- a/include/asm-sh/magicpanelr2.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * include/asm-sh/magicpanelr2.h - * - * Copyright (C) 2007 Markus Brunner, Mark Jonas - * - * I/O addresses and bitmasks for Magic Panel Release 2 board - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#ifndef __ASM_SH_MAGICPANELR2_H -#define __ASM_SH_MAGICPANELR2_H - -#include - -#define __IO_PREFIX mpr2 -#include - - -#define SETBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) | mask, reg) -#define SETBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) | mask, reg) -#define SETBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) | mask, reg) -#define CLRBITS_OUTB(mask, reg) ctrl_outb(ctrl_inb(reg) & ~mask, reg) -#define CLRBITS_OUTW(mask, reg) ctrl_outw(ctrl_inw(reg) & ~mask, reg) -#define CLRBITS_OUTL(mask, reg) ctrl_outl(ctrl_inl(reg) & ~mask, reg) - - -#define PA_LED PORT_PADR /* LED */ - - -/* BSC */ -#define CMNCR 0xA4FD0000UL -#define CS0BCR 0xA4FD0004UL -#define CS2BCR 0xA4FD0008UL -#define CS3BCR 0xA4FD000CUL -#define CS4BCR 0xA4FD0010UL -#define CS5ABCR 0xA4FD0014UL -#define CS5BBCR 0xA4FD0018UL -#define CS6ABCR 0xA4FD001CUL -#define CS6BBCR 0xA4FD0020UL -#define CS0WCR 0xA4FD0024UL -#define CS2WCR 0xA4FD0028UL -#define CS3WCR 0xA4FD002CUL -#define CS4WCR 0xA4FD0030UL -#define CS5AWCR 0xA4FD0034UL -#define CS5BWCR 0xA4FD0038UL -#define CS6AWCR 0xA4FD003CUL -#define CS6BWCR 0xA4FD0040UL - - -/* usb */ - -#define PORT_UTRCTL 0xA405012CUL -#define PORT_UCLKCR_W 0xA40A0008UL - -#define INTC_ICR0 0xA414FEE0UL -#define INTC_ICR1 0xA4140010UL -#define INTC_ICR2 0xA4140012UL - -/* MTD */ - -#define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL -#define MPR2_MTD_KERNEL_SIZE 0x00200000UL - -#endif /* __ASM_SH_MAGICPANELR2_H */ diff --git a/include/asm-sh/mc146818rtc.h b/include/asm-sh/mc146818rtc.h deleted file mode 100644 index 0aee96a..0000000 --- a/include/asm-sh/mc146818rtc.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef _ASM_MC146818RTC_H -#define _ASM_MC146818RTC_H - -#endif /* _ASM_MC146818RTC_H */ diff --git a/include/asm-sh/microdev.h b/include/asm-sh/microdev.h deleted file mode 100644 index 1aed158..0000000 --- a/include/asm-sh/microdev.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * linux/include/asm-sh/microdev.h - * - * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com) - * - * Definitions for the SuperH SH4-202 MicroDev board. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - */ -#ifndef __ASM_SH_MICRODEV_H -#define __ASM_SH_MICRODEV_H - -extern void init_microdev_irq(void); -extern void microdev_print_fpga_intc_status(void); - -/* - * The following are useful macros for manipulating the interrupt - * controller (INTC) on the CPU-board FPGA. should be noted that there - * is an INTC on the FPGA, and a separate INTC on the SH4-202 core - - * these are two different things, both of which need to be prorammed to - * correctly route - unfortunately, they have the same name and - * abbreviations! - */ -#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ -#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ -#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ -#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */ -#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ -#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ -#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ -#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */ -#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */ - - -/* - * The following are the IRQ numbers for the Linux Kernel for external - * interrupts. i.e. the numbers seen by 'cat /proc/interrupt'. - */ -#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ -#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */ -#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */ -#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ -#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */ -#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ -#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */ -#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */ - -/* - * The following are the IRQ numbers for the INTC on the FPGA for - * external interrupts. i.e. the bits in the INTC registers in the - * FPGA. - */ -#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */ -#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */ -#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */ -#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */ -#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */ -#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */ -#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */ -#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */ - -#define MICRODEV_IRQ_PCI_INTA 8 -#define MICRODEV_IRQ_PCI_INTB 9 -#define MICRODEV_IRQ_PCI_INTC 10 -#define MICRODEV_IRQ_PCI_INTD 11 - -#define __IO_PREFIX microdev -#include - -#if defined(CONFIG_PCI) -unsigned char microdev_pci_inb(unsigned long port); -unsigned short microdev_pci_inw(unsigned long port); -unsigned long microdev_pci_inl(unsigned long port); -void microdev_pci_outb(unsigned char data, unsigned long port); -void microdev_pci_outw(unsigned short data, unsigned long port); -void microdev_pci_outl(unsigned long data, unsigned long port); -#endif - -#endif /* __ASM_SH_MICRODEV_H */ diff --git a/include/asm-sh/migor.h b/include/asm-sh/migor.h deleted file mode 100644 index 10016e0..0000000 --- a/include/asm-sh/migor.h +++ /dev/null @@ -1,65 +0,0 @@ -#ifndef __ASM_SH_MIGOR_H -#define __ASM_SH_MIGOR_H - -/* - * linux/include/asm-sh/migor.h - * - * Copyright (C) 2008 Renesas Solutions - * - * Portions Copyright (C) 2007 Nobuhiro Iwamatsu - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ -#include - -/* GPIO */ -#define PORT_PACR 0xa4050100 -#define PORT_PDCR 0xa4050106 -#define PORT_PECR 0xa4050108 -#define PORT_PHCR 0xa405010e -#define PORT_PJCR 0xa4050110 -#define PORT_PKCR 0xa4050112 -#define PORT_PLCR 0xa4050114 -#define PORT_PMCR 0xa4050116 -#define PORT_PRCR 0xa405011c -#define PORT_PTCR 0xa4050140 -#define PORT_PUCR 0xa4050142 -#define PORT_PVCR 0xa4050144 -#define PORT_PWCR 0xa4050146 -#define PORT_PXCR 0xa4050148 -#define PORT_PYCR 0xa405014a -#define PORT_PZCR 0xa405014c -#define PORT_PADR 0xa4050120 -#define PORT_PHDR 0xa405012e -#define PORT_PTDR 0xa4050160 -#define PORT_PWDR 0xa4050166 - -#define PORT_HIZCRA 0xa4050158 -#define PORT_HIZCRC 0xa405015c - -#define PORT_MSELCRB 0xa4050182 - -#define MSTPCR1 0xa4150034 -#define MSTPCR2 0xa4150038 - -#define PORT_PSELA 0xa405014e -#define PORT_PSELB 0xa4050150 -#define PORT_PSELC 0xa4050152 -#define PORT_PSELD 0xa4050154 -#define PORT_PSELE 0xa4050156 - -#define PORT_HIZCRA 0xa4050158 -#define PORT_HIZCRB 0xa405015a -#define PORT_HIZCRC 0xa405015c - -#define BSC_CS6ABCR 0xfec1001c - -#include - -int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, - struct sh_mobile_lcdc_sys_bus_ops *sys_ops); - -#endif /* __ASM_SH_MIGOR_H */ diff --git a/include/asm-sh/mman.h b/include/asm-sh/mman.h deleted file mode 100644 index 156eb02..0000000 --- a/include/asm-sh/mman.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_SH_MMAN_H -#define __ASM_SH_MMAN_H - -#include - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ -#define MAP_LOCKED 0x2000 /* pages are locked */ -#define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#endif /* __ASM_SH_MMAN_H */ diff --git a/include/asm-sh/mmu.h b/include/asm-sh/mmu.h deleted file mode 100644 index fdcb93b..0000000 --- a/include/asm-sh/mmu.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_id_t[NR_CPUS]; - -typedef struct { -#ifdef CONFIG_MMU - mm_context_id_t id; - void *vdso; -#else - struct vm_list_struct *vmlist; - unsigned long end_brk; -#endif -#ifdef CONFIG_BINFMT_ELF_FDPIC - unsigned long exec_fdpic_loadmap; - unsigned long interp_fdpic_loadmap; -#endif -} mm_context_t; - -/* - * Privileged Space Mapping Buffer (PMB) definitions - */ -#define PMB_PASCR 0xff000070 -#define PMB_IRMCR 0xff000078 - -#define PMB_ADDR 0xf6100000 -#define PMB_DATA 0xf7100000 -#define PMB_ENTRY_MAX 16 -#define PMB_E_MASK 0x0000000f -#define PMB_E_SHIFT 8 - -#define PMB_SZ_16M 0x00000000 -#define PMB_SZ_64M 0x00000010 -#define PMB_SZ_128M 0x00000080 -#define PMB_SZ_512M 0x00000090 -#define PMB_SZ_MASK PMB_SZ_512M -#define PMB_C 0x00000008 -#define PMB_WT 0x00000001 -#define PMB_UB 0x00000200 -#define PMB_V 0x00000100 - -#define PMB_NO_ENTRY (-1) - -struct pmb_entry; - -struct pmb_entry { - unsigned long vpn; - unsigned long ppn; - unsigned long flags; - - /* - * 0 .. NR_PMB_ENTRIES for specific entry selection, or - * PMB_NO_ENTRY to search for a free one - */ - int entry; - - struct pmb_entry *next; - /* Adjacent entry link for contiguous multi-entry mappings */ - struct pmb_entry *link; -}; - -/* arch/sh/mm/pmb.c */ -int __set_pmb_entry(unsigned long vpn, unsigned long ppn, - unsigned long flags, int *entry); -int set_pmb_entry(struct pmb_entry *pmbe); -void clear_pmb_entry(struct pmb_entry *pmbe); -struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn, - unsigned long flags); -void pmb_free(struct pmb_entry *pmbe); -long pmb_remap(unsigned long virt, unsigned long phys, - unsigned long size, unsigned long flags); -void pmb_unmap(unsigned long addr); - -#endif /* __MMU_H */ - diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h deleted file mode 100644 index 8589a50..0000000 --- a/include/asm-sh/mmu_context.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 - 2007 Paul Mundt - * - * ASID handling idea taken from MIPS implementation. - */ -#ifndef __ASM_SH_MMU_CONTEXT_H -#define __ASM_SH_MMU_CONTEXT_H - -#ifdef __KERNEL__ -#include -#include -#include -#include -#include - -/* - * The MMU "context" consists of two things: - * (a) TLB cache version (or round, cycle whatever expression you like) - * (b) ASID (Address Space IDentifier) - */ -#define MMU_CONTEXT_ASID_MASK 0x000000ff -#define MMU_CONTEXT_VERSION_MASK 0xffffff00 -#define MMU_CONTEXT_FIRST_VERSION 0x00000100 -#define NO_CONTEXT 0 - -/* ASID is 8-bit value, so it can't be 0x100 */ -#define MMU_NO_ASID 0x100 - -#define asid_cache(cpu) (cpu_data[cpu].asid_cache) - -#ifdef CONFIG_MMU -#define cpu_context(cpu, mm) ((mm)->context.id[cpu]) - -#define cpu_asid(cpu, mm) \ - (cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK) - -/* - * Virtual Page Number mask - */ -#define MMU_VPN_MASK 0xfffff000 - -#if defined(CONFIG_SUPERH32) -#include "mmu_context_32.h" -#else -#include "mmu_context_64.h" -#endif - -/* - * Get MMU context if needed. - */ -static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) -{ - unsigned long asid = asid_cache(cpu); - - /* Check if we have old version of context. */ - if (((cpu_context(cpu, mm) ^ asid) & MMU_CONTEXT_VERSION_MASK) == 0) - /* It's up to date, do nothing */ - return; - - /* It's old, we need to get new context with new version. */ - if (!(++asid & MMU_CONTEXT_ASID_MASK)) { - /* - * We exhaust ASID of this version. - * Flush all TLB and start new cycle. - */ - flush_tlb_all(); - -#ifdef CONFIG_SUPERH64 - /* - * The SH-5 cache uses the ASIDs, requiring both the I and D - * cache to be flushed when the ASID is exhausted. Weak. - */ - flush_cache_all(); -#endif - - /* - * Fix version; Note that we avoid version #0 - * to distingush NO_CONTEXT. - */ - if (!asid) - asid = MMU_CONTEXT_FIRST_VERSION; - } - - cpu_context(cpu, mm) = asid_cache(cpu) = asid; -} - -/* - * Initialize the context related info for a new mm_struct - * instance. - */ -static inline int init_new_context(struct task_struct *tsk, - struct mm_struct *mm) -{ - int i; - - for (i = 0; i < num_online_cpus(); i++) - cpu_context(i, mm) = NO_CONTEXT; - - return 0; -} - -/* - * After we have set current->mm to a new value, this activates - * the context for the new mm so we see the new mappings. - */ -static inline void activate_context(struct mm_struct *mm, unsigned int cpu) -{ - get_mmu_context(mm, cpu); - set_asid(cpu_asid(cpu, mm)); -} - -static inline void switch_mm(struct mm_struct *prev, - struct mm_struct *next, - struct task_struct *tsk) -{ - unsigned int cpu = smp_processor_id(); - - if (likely(prev != next)) { - cpu_set(cpu, next->cpu_vm_mask); - set_TTB(next->pgd); - activate_context(next, cpu); - } else - if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) - activate_context(next, cpu); -} -#else -#define get_mmu_context(mm) do { } while (0) -#define init_new_context(tsk,mm) (0) -#define destroy_context(mm) do { } while (0) -#define set_asid(asid) do { } while (0) -#define get_asid() (0) -#define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) -#define switch_and_save_asid(asid) (0) -#define set_TTB(pgd) do { } while (0) -#define get_TTB() (0) -#define activate_context(mm,cpu) do { } while (0) -#define switch_mm(prev,next,tsk) do { } while (0) -#endif /* CONFIG_MMU */ - -#define activate_mm(prev, next) switch_mm((prev),(next),NULL) -#define deactivate_mm(tsk,mm) do { } while (0) -#define enter_lazy_tlb(mm,tsk) do { } while (0) - -#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) -/* - * If this processor has an MMU, we need methods to turn it off/on .. - * paging_init() will also have to be updated for the processor in - * question. - */ -static inline void enable_mmu(void) -{ - unsigned int cpu = smp_processor_id(); - - /* Enable MMU */ - ctrl_outl(MMU_CONTROL_INIT, MMUCR); - ctrl_barrier(); - - if (asid_cache(cpu) == NO_CONTEXT) - asid_cache(cpu) = MMU_CONTEXT_FIRST_VERSION; - - set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK); -} - -static inline void disable_mmu(void) -{ - unsigned long cr; - - cr = ctrl_inl(MMUCR); - cr &= ~MMU_CONTROL_INIT; - ctrl_outl(cr, MMUCR); - - ctrl_barrier(); -} -#else -/* - * MMU control handlers for processors lacking memory - * management hardware. - */ -#define enable_mmu() do { } while (0) -#define disable_mmu() do { } while (0) -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_MMU_CONTEXT_H */ diff --git a/include/asm-sh/mmu_context_32.h b/include/asm-sh/mmu_context_32.h deleted file mode 100644 index f4f9aeb..0000000 --- a/include/asm-sh/mmu_context_32.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef __ASM_SH_MMU_CONTEXT_32_H -#define __ASM_SH_MMU_CONTEXT_32_H - -/* - * Destroy context related info for an mm_struct that is about - * to be put to rest. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - /* Do nothing */ -} - -static inline void set_asid(unsigned long asid) -{ - unsigned long __dummy; - - __asm__ __volatile__ ("mov.l %2, %0\n\t" - "and %3, %0\n\t" - "or %1, %0\n\t" - "mov.l %0, %2" - : "=&r" (__dummy) - : "r" (asid), "m" (__m(MMU_PTEH)), - "r" (0xffffff00)); -} - -static inline unsigned long get_asid(void) -{ - unsigned long asid; - - __asm__ __volatile__ ("mov.l %1, %0" - : "=r" (asid) - : "m" (__m(MMU_PTEH))); - asid &= MMU_CONTEXT_ASID_MASK; - return asid; -} - -/* MMU_TTB is used for optimizing the fault handling. */ -static inline void set_TTB(pgd_t *pgd) -{ - ctrl_outl((unsigned long)pgd, MMU_TTB); -} - -static inline pgd_t *get_TTB(void) -{ - return (pgd_t *)ctrl_inl(MMU_TTB); -} -#endif /* __ASM_SH_MMU_CONTEXT_32_H */ diff --git a/include/asm-sh/mmu_context_64.h b/include/asm-sh/mmu_context_64.h deleted file mode 100644 index 9649f1c..0000000 --- a/include/asm-sh/mmu_context_64.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef __ASM_SH_MMU_CONTEXT_64_H -#define __ASM_SH_MMU_CONTEXT_64_H - -/* - * sh64-specific mmu_context interface. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 - 2007 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include - -#define SR_ASID_MASK 0xffffffffff00ffffULL -#define SR_ASID_SHIFT 16 - -/* - * Destroy context related info for an mm_struct that is about - * to be put to rest. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - /* Well, at least free TLB entries */ - flush_tlb_mm(mm); -} - -static inline unsigned long get_asid(void) -{ - unsigned long long sr; - - asm volatile ("getcon " __SR ", %0\n\t" - : "=r" (sr)); - - sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; - return (unsigned long) sr; -} - -/* Set ASID into SR */ -static inline void set_asid(unsigned long asid) -{ - unsigned long long sr, pc; - - asm volatile ("getcon " __SR ", %0" : "=r" (sr)); - - sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); - - /* - * It is possible that this function may be inlined and so to avoid - * the assembler reporting duplicate symbols we make use of the - * gas trick of generating symbols using numerics and forward - * reference. - */ - asm volatile ("movi 1, %1\n\t" - "shlli %1, 28, %1\n\t" - "or %0, %1, %1\n\t" - "putcon %1, " __SR "\n\t" - "putcon %0, " __SSR "\n\t" - "movi 1f, %1\n\t" - "ori %1, 1 , %1\n\t" - "putcon %1, " __SPC "\n\t" - "rte\n" - "1:\n\t" - : "=r" (sr), "=r" (pc) : "0" (sr)); -} - -/* arch/sh/kernel/cpu/sh5/entry.S */ -extern unsigned long switch_and_save_asid(unsigned long new_asid); - -/* No spare register to twiddle, so use a software cache */ -extern pgd_t *mmu_pdtp_cache; - -#define set_TTB(pgd) (mmu_pdtp_cache = (pgd)) -#define get_TTB() (mmu_pdtp_cache) - -#endif /* __ASM_SH_MMU_CONTEXT_64_H */ diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h deleted file mode 100644 index 2969253..0000000 --- a/include/asm-sh/mmzone.h +++ /dev/null @@ -1,48 +0,0 @@ -#ifndef __ASM_SH_MMZONE_H -#define __ASM_SH_MMZONE_H - -#ifdef __KERNEL__ - -#ifdef CONFIG_NEED_MULTIPLE_NODES -extern struct pglist_data *node_data[]; -#define NODE_DATA(nid) (node_data[nid]) - -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ - NODE_DATA(nid)->node_spanned_pages) - -static inline int pfn_to_nid(unsigned long pfn) -{ - int nid; - - for (nid = 0; nid < MAX_NUMNODES; nid++) - if (pfn >= node_start_pfn(nid) && pfn <= node_end_pfn(nid)) - break; - - return nid; -} - -static inline struct pglist_data *pfn_to_pgdat(unsigned long pfn) -{ - return NODE_DATA(pfn_to_nid(pfn)); -} - -/* arch/sh/mm/numa.c */ -void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end); -#else -static inline void -setup_bootmem_node(int nid, unsigned long start, unsigned long end) -{ -} -#endif /* CONFIG_NEED_MULTIPLE_NODES */ - -/* Platform specific mem init */ -void __init plat_mem_setup(void); - -/* arch/sh/kernel/setup.c */ -void __init setup_bootmem_allocator(unsigned long start_pfn); -void __init __add_active_range(unsigned int nid, unsigned long start_pfn, - unsigned long end_pfn); - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_MMZONE_H */ diff --git a/include/asm-sh/module.h b/include/asm-sh/module.h deleted file mode 100644 index 46eccd3..0000000 --- a/include/asm-sh/module.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef _ASM_SH_MODULE_H -#define _ASM_SH_MODULE_H - -/* - * This file contains the SH architecture specific module code. - */ - -struct mod_arch_specific { - /* Nothing to see here .. */ -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -#ifdef CONFIG_CPU_LITTLE_ENDIAN -# ifdef CONFIG_CPU_SH2 -# define MODULE_PROC_FAMILY "SH2LE " -# elif defined CONFIG_CPU_SH3 -# define MODULE_PROC_FAMILY "SH3LE " -# elif defined CONFIG_CPU_SH4 -# define MODULE_PROC_FAMILY "SH4LE " -# elif defined CONFIG_CPU_SH5 -# define MODULE_PROC_FAMILY "SH5LE " -# else -# error unknown processor family -# endif -#else -# ifdef CONFIG_CPU_SH2 -# define MODULE_PROC_FAMILY "SH2BE " -# elif defined CONFIG_CPU_SH3 -# define MODULE_PROC_FAMILY "SH3BE " -# elif defined CONFIG_CPU_SH4 -# define MODULE_PROC_FAMILY "SH4BE " -# elif defined CONFIG_CPU_SH5 -# define MODULE_PROC_FAMILY "SH5BE " -# else -# error unknown processor family -# endif -#endif - -#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY - -#endif /* _ASM_SH_MODULE_H */ diff --git a/include/asm-sh/msgbuf.h b/include/asm-sh/msgbuf.h deleted file mode 100644 index 5174323..0000000 --- a/include/asm-sh/msgbuf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __ASM_SH_MSGBUF_H -#define __ASM_SH_MSGBUF_H - -/* - * The msqid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ - unsigned long __unused1; - __kernel_time_t msg_rtime; /* last msgrcv time */ - unsigned long __unused2; - __kernel_time_t msg_ctime; /* last change time */ - unsigned long __unused3; - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* __ASM_SH_MSGBUF_H */ diff --git a/include/asm-sh/mutex.h b/include/asm-sh/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-sh/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h deleted file mode 100644 index 77fb8bf..0000000 --- a/include/asm-sh/page.h +++ /dev/null @@ -1,183 +0,0 @@ -#ifndef __ASM_SH_PAGE_H -#define __ASM_SH_PAGE_H - -/* - * Copyright (C) 1999 Niibe Yutaka - */ - -#include - -/* PAGE_SHIFT determines the page size */ -#if defined(CONFIG_PAGE_SIZE_4KB) -# define PAGE_SHIFT 12 -#elif defined(CONFIG_PAGE_SIZE_8KB) -# define PAGE_SHIFT 13 -#elif defined(CONFIG_PAGE_SIZE_16KB) -# define PAGE_SHIFT 14 -#elif defined(CONFIG_PAGE_SIZE_64KB) -# define PAGE_SHIFT 16 -#else -# error "Bogus kernel page size?" -#endif - -#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) -#define PTE_MASK PAGE_MASK - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define HPAGE_SHIFT 16 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) -#define HPAGE_SHIFT 18 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -#define HPAGE_SHIFT 20 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define HPAGE_SHIFT 22 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) -#define HPAGE_SHIFT 26 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) -#define HPAGE_SHIFT 29 -#endif - -#ifdef CONFIG_HUGETLB_PAGE -#define HPAGE_SIZE (1UL << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE-1)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT) -#endif - -#ifndef __ASSEMBLY__ - -extern unsigned long shm_align_mask; -extern unsigned long max_low_pfn, min_low_pfn; -extern unsigned long memory_start, memory_end; - -extern void clear_page(void *to); -extern void copy_page(void *to, void *from); - -#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ - (defined(CONFIG_CPU_SH5) || defined(CONFIG_CPU_SH4) || \ - defined(CONFIG_SH7705_CACHE_32KB)) -struct page; -struct vm_area_struct; -extern void clear_user_page(void *to, unsigned long address, struct page *page); -extern void copy_user_page(void *to, void *from, unsigned long address, - struct page *page); -#if defined(CONFIG_CPU_SH4) -extern void copy_user_highpage(struct page *to, struct page *from, - unsigned long vaddr, struct vm_area_struct *vma); -#define __HAVE_ARCH_COPY_USER_HIGHPAGE -#endif -#else -#define clear_user_page(page, vaddr, pg) clear_page(page) -#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) -#endif - -/* - * These are used to make use of C type-checking.. - */ -#ifdef CONFIG_X2TLB -typedef struct { unsigned long pte_low, pte_high; } pte_t; -typedef struct { unsigned long long pgprot; } pgprot_t; -typedef struct { unsigned long long pgd; } pgd_t; -#define pte_val(x) \ - ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) -#define __pte(x) \ - ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) -#elif defined(CONFIG_SUPERH32) -typedef struct { unsigned long pte_low; } pte_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct { unsigned long pgd; } pgd_t; -#define pte_val(x) ((x).pte_low) -#define __pte(x) ((pte_t) { (x) } ) -#else -typedef struct { unsigned long long pte_low; } pte_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct { unsigned long pgd; } pgd_t; -#define pte_val(x) ((x).pte_low) -#define __pte(x) ((pte_t) { (x) } ) -#endif - -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pgd(x) ((pgd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -typedef struct page *pgtable_t; - -#endif /* !__ASSEMBLY__ */ - -/* - * __MEMORY_START and SIZE are the physical addresses and size of RAM. - */ -#define __MEMORY_START CONFIG_MEMORY_START -#define __MEMORY_SIZE CONFIG_MEMORY_SIZE - -/* - * PAGE_OFFSET is the virtual address of the start of kernel address - * space. - */ -#define PAGE_OFFSET CONFIG_PAGE_OFFSET - -/* - * Virtual to physical RAM address translation. - * - * In 29 bit mode, the physical offset of RAM from address 0 is visible in - * the kernel virtual address space, and thus we don't have to take - * this into account when translating. However in 32 bit mode this offset - * is not visible (it is part of the PMB mapping) and so needs to be - * added or subtracted as required. - */ -#ifdef CONFIG_32BIT -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START)) -#else -#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET)) -#endif - -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -/* - * PFN = physical frame number (ie PFN 0 == physical address 0) - * PFN_START is the PFN of the first page of RAM. By defining this we - * don't have struct page entries for the portion of address space - * between physical address 0 and the start of RAM. - */ -#define PFN_START (__MEMORY_START >> PAGE_SHIFT) -#define ARCH_PFN_OFFSET (PFN_START) -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#ifdef CONFIG_FLATMEM -#define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) -#endif -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include -#include - -/* vDSO support */ -#ifdef CONFIG_VSYSCALL -#define __HAVE_ARCH_GATE_AREA -#endif - -/* - * Some drivers need to perform DMA into kmalloc'ed buffers - * and so we have to increase the kmalloc minalign for this. - */ -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES - -#ifdef CONFIG_SUPERH64 -/* - * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still - * happily generate {ld/st}.q pairs, requiring us to have 8-byte - * alignment to avoid traps. The kmalloc alignment is gauranteed by - * virtue of L1_CACHE_BYTES, requiring this to only be special cased - * for slab caches. - */ -#define ARCH_SLAB_MINALIGN 8 -#endif - -#endif /* __ASM_SH_PAGE_H */ diff --git a/include/asm-sh/param.h b/include/asm-sh/param.h deleted file mode 100644 index ae245af..0000000 --- a/include/asm-sh/param.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef __ASM_SH_PARAM_H -#define __ASM_SH_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ -# define USER_HZ 100 /* User interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ -#endif - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif /* __ASM_SH_PARAM_H */ diff --git a/include/asm-sh/parport.h b/include/asm-sh/parport.h deleted file mode 100644 index f67ba60..0000000 --- a/include/asm-sh/parport.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (C) 1999, 2000 Tim Waugh - * - * This file should only be included by drivers/parport/parport_pc.c. - */ -#ifndef __ASM_SH_PARPORT_H -#define __ASM_SH_PARPORT_H - -static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma); - -static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma) -{ - return parport_pc_find_isa_ports(autoirq, autodma); -} - -#endif /* __ASM_SH_PARPORT_H */ diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h deleted file mode 100644 index df1d383..0000000 --- a/include/asm-sh/pci.h +++ /dev/null @@ -1,144 +0,0 @@ -#ifndef __ASM_SH_PCI_H -#define __ASM_SH_PCI_H - -#ifdef __KERNEL__ - -#include - -/* Can be used to override the logic in pci_scan_bus for skipping - already-configured bus numbers - to be used for buggy BIOSes - or architectures with incomplete PCI setup by the loader */ - -#define pcibios_assign_all_busses() 1 -#define pcibios_scan_all_fns(a, b) 0 - -/* - * A board can define one or more PCI channels that represent built-in (or - * external) PCI controllers. - */ -struct pci_channel { - struct pci_ops *pci_ops; - struct resource *io_resource; - struct resource *mem_resource; - int first_devfn; - int last_devfn; -}; - -/* - * Each board initializes this array and terminates it with a NULL entry. - */ -extern struct pci_channel board_pci_channels[]; - -#define PCIBIOS_MIN_IO board_pci_channels->io_resource->start -#define PCIBIOS_MIN_MEM board_pci_channels->mem_resource->start - -/* - * I/O routine helpers - */ -#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) -#define PCI_IO_AREA 0xFE400000 -#define PCI_IO_SIZE 0x00400000 -#elif defined(CONFIG_CPU_SH5) -extern unsigned long PCI_IO_AREA; -#define PCI_IO_SIZE 0x00010000 -#else -#define PCI_IO_AREA 0xFE240000 -#define PCI_IO_SIZE 0x00040000 -#endif - -#define PCI_MEM_SIZE 0x01000000 - -#define SH4_PCIIOBR_MASK 0xFFFC0000 -#define pci_ioaddr(addr) (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK)) - -#if defined(CONFIG_PCI) -#define is_pci_ioaddr(port) \ - (((port) >= PCIBIOS_MIN_IO) && \ - ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE))) -#define is_pci_memaddr(port) \ - (((port) >= PCIBIOS_MIN_MEM) && \ - ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE))) -#else -#define is_pci_ioaddr(port) (0) -#define is_pci_memaddr(port) (0) -#endif - -struct pci_dev; - -extern void pcibios_set_master(struct pci_dev *dev); - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* Dynamic DMA mapping stuff. - * SuperH has everything mapped statically like x86. - */ - -/* The PCI address space does equal the physical memory - * address space. The networking and block device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (1) - -#include -#include -#include -#include -#include - -/* pci_unmap_{single,page} being a nop depends upon the - * configuration. - */ -#ifdef CONFIG_SH_PCIDMA_NONCOHERENT -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) -#else -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) -#define pci_unmap_addr(PTR, ADDR_NAME) (0) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) -#define pci_unmap_len(PTR, LEN_NAME) (0) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -#endif - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif - -/* Board-specific fixup routines. */ -void pcibios_fixup(void); -int pcibios_init_platform(void); -int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); - -#ifdef CONFIG_PCI_AUTO -int pciauto_assign_resources(int busno, struct pci_channel *hose); -#endif - -#endif /* __KERNEL__ */ - -/* generic pci stuff */ -#include - -/* generic DMA-mapping stuff */ -#include - -#endif /* __ASM_SH_PCI_H */ - diff --git a/include/asm-sh/percpu.h b/include/asm-sh/percpu.h deleted file mode 100644 index 4db4b39..0000000 --- a/include/asm-sh/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARCH_SH_PERCPU -#define __ARCH_SH_PERCPU - -#include - -#endif /* __ARCH_SH_PERCPU */ diff --git a/include/asm-sh/pgalloc.h b/include/asm-sh/pgalloc.h deleted file mode 100644 index 84dd2db..0000000 --- a/include/asm-sh/pgalloc.h +++ /dev/null @@ -1,96 +0,0 @@ -#ifndef __ASM_SH_PGALLOC_H -#define __ASM_SH_PGALLOC_H - -#include -#include - -#define QUICK_PGD 0 /* We preserve special mappings over free */ -#define QUICK_PT 1 /* Other page table pages that are zero on free */ - -static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, - pte_t *pte) -{ - set_pmd(pmd, __pmd((unsigned long)pte)); -} - -static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, - pgtable_t pte) -{ - set_pmd(pmd, __pmd((unsigned long)page_address(pte))); -} -#define pmd_pgtable(pmd) pmd_page(pmd) - -static inline void pgd_ctor(void *x) -{ - pgd_t *pgd = x; - - memcpy(pgd + USER_PTRS_PER_PGD, - swapper_pg_dir + USER_PTRS_PER_PGD, - (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); -} - -/* - * Allocate and free page tables. - */ -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(QUICK_PGD, NULL, pgd); -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) -{ - return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, - unsigned long address) -{ - struct page *page; - void *pg; - - pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); - if (!pg) - return NULL; - page = virt_to_page(pg); - pgtable_page_ctor(page); - return page; -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - quicklist_free(QUICK_PT, NULL, pte); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t pte) -{ - pgtable_page_dtor(pte); - quicklist_free_page(QUICK_PT, NULL, pte); -} - -#define __pte_free_tlb(tlb,pte) \ -do { \ - pgtable_page_dtor(pte); \ - tlb_remove_page((tlb), (pte)); \ -} while (0) - -/* - * allocating and freeing a pmd is trivial: the 1-entry pmd is - * inside the pgd, so has no extra memory associated with it. - */ - -#define pmd_free(mm, x) do { } while (0) -#define __pmd_free_tlb(tlb,x) do { } while (0) - -static inline void check_pgt_cache(void) -{ - quicklist_trim(QUICK_PGD, NULL, 25, 16); - quicklist_trim(QUICK_PT, NULL, 25, 16); -} - -#endif /* __ASM_SH_PGALLOC_H */ diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h deleted file mode 100644 index a4a8f8b..0000000 --- a/include/asm-sh/pgtable.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * This file contains the functions and defines necessary to modify and - * use the SuperH page table tree. - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002 - 2007 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file "COPYING" in the main directory of this - * archive for more details. - */ -#ifndef __ASM_SH_PGTABLE_H -#define __ASM_SH_PGTABLE_H - -#include -#include - -#ifndef __ASSEMBLY__ -#include -#include - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; -#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) - -#endif /* !__ASSEMBLY__ */ - -/* - * Effective and physical address definitions, to aid with sign - * extension. - */ -#define NEFF 32 -#define NEFF_SIGN (1LL << (NEFF - 1)) -#define NEFF_MASK (-1LL << NEFF) - -#ifdef CONFIG_29BIT -#define NPHYS 29 -#else -#define NPHYS 32 -#endif - -#define NPHYS_SIGN (1LL << (NPHYS - 1)) -#define NPHYS_MASK (-1LL << NPHYS) - -/* - * traditional two-level paging structure - */ -/* PTE bits */ -#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64) -# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ -#else -# define PTE_MAGNITUDE 2 /* 32-bit PTEs */ -#endif -#define PTE_SHIFT PAGE_SHIFT -#define PTE_BITS (PTE_SHIFT - PTE_MAGNITUDE) - -/* PGD bits */ -#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* Entries per level */ -#define PTRS_PER_PTE (PAGE_SIZE / (1 << PTE_MAGNITUDE)) -#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t)) - -#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) -#define FIRST_USER_ADDRESS 0 - -#ifdef CONFIG_32BIT -#define PHYS_ADDR_MASK 0xffffffff -#else -#define PHYS_ADDR_MASK 0x1fffffff -#endif - -#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK) - -#ifdef CONFIG_SUPERH32 -#define VMALLOC_START (P3SEG) -#else -#define VMALLOC_START (0xf0000000) -#endif -#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) - -#if defined(CONFIG_SUPERH32) -#include -#else -#include -#endif - -/* - * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page - * protection for execute, and considers it the same as a read. Also, write - * permission implies read permission. This is the closest we can get.. - * - * SH-X2 (SH7785) and later parts take this to the opposite end of the extreme, - * not only supporting separate execute, read, and write bits, but having - * completely separate permission bits for user and kernel space. - */ - /*xwr*/ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY -#define __P100 PAGE_EXECREAD -#define __P101 PAGE_EXECREAD -#define __P110 PAGE_COPY -#define __P111 PAGE_COPY - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_WRITEONLY -#define __S011 PAGE_SHARED -#define __S100 PAGE_EXECREAD -#define __S101 PAGE_EXECREAD -#define __S110 PAGE_RWX -#define __S111 PAGE_RWX - -typedef pte_t *pte_addr_t; - -#define kern_addr_valid(addr) (1) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - -#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT))) - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ - defined(CONFIG_SH7705_CACHE_32KB)) -struct mm_struct; -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); -#endif - -struct vm_area_struct; -extern void update_mmu_cache(struct vm_area_struct * vma, - unsigned long address, pte_t pte); -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -extern void paging_init(void); -extern void page_table_range_init(unsigned long start, unsigned long end, - pgd_t *pgd); - -#include - -#endif /* __ASM_SH_PGTABLE_H */ diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h deleted file mode 100644 index 72ea209..0000000 --- a/include/asm-sh/pgtable_32.h +++ /dev/null @@ -1,479 +0,0 @@ -#ifndef __ASM_SH_PGTABLE_32_H -#define __ASM_SH_PGTABLE_32_H - -/* - * Linux PTEL encoding. - * - * Hardware and software bit definitions for the PTEL value (see below for - * notes on SH-X2 MMUs and 64-bit PTEs): - * - * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4). - * - * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the - * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set, - * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT). - * - * In order to keep this relatively clean, do not use these for defining - * SH-3 specific flags until all of the other unused bits have been - * exhausted. - * - * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. - * - * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. - * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. - * - * - On 29 bit platforms, bits 31 to 29 are used for the space attributes - * and timing control which (together with bit 0) are moved into the - * old-style PTEA on the parts that support it. - * - * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day. - * - * SH-X2 MMUs and extended PTEs - * - * SH-X2 supports an extended mode TLB with split data arrays due to the - * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and - * SZ bit placeholders still exist in data array 1, but are implemented as - * reserved bits, with the real logic existing in data array 2. - * - * The downside to this is that we can no longer fit everything in to a 32-bit - * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus - * side, this gives us quite a few spare bits to play with for future usage. - */ -/* Legacy and compat mode bits */ -#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */ -#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */ -#define _PAGE_DIRTY 0x004 /* D-bit : page changed */ -#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */ -#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */ -#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */ -#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/ -#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */ -#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */ -#define _PAGE_PROTNONE 0x200 /* software: if not present */ -#define _PAGE_ACCESSED 0x400 /* software: page referenced */ -#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ - -#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) -#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) - -/* Extended mode bits */ -#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */ -#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */ -#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */ -#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */ - -#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */ -#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */ -#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */ - -#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */ -#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */ -#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */ - -/* Wrapper for extended mode pgprot twiddling */ -#define _PAGE_EXT(x) ((unsigned long long)(x) << 32) - -/* software: moves to PTEA.TC (Timing Control) */ -#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */ -#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */ - -/* software: moves to PTEA.SA[2:0] (Space Attributes) */ -#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */ -#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */ -#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */ -#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */ -#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */ -#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */ -#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */ - -/* Mask which drops unused bits from the PTEL value */ -#if defined(CONFIG_CPU_SH3) -#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \ - _PAGE_FILE | _PAGE_SZ1 | \ - _PAGE_HW_SHARED) -#elif defined(CONFIG_X2TLB) -/* Get rid of the legacy PR/SZ bits when using extended mode */ -#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \ - _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK) -#else -#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) -#endif - -#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) - -/* Hardware flags, page size encoding */ -#if !defined(CONFIG_MMU) -# define _PAGE_FLAGS_HARD 0ULL -#elif defined(CONFIG_X2TLB) -# if defined(CONFIG_PAGE_SIZE_4KB) -# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) -# elif defined(CONFIG_PAGE_SIZE_8KB) -# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1) -# elif defined(CONFIG_PAGE_SIZE_64KB) -# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2) -# endif -#else -# if defined(CONFIG_PAGE_SIZE_4KB) -# define _PAGE_FLAGS_HARD _PAGE_SZ0 -# elif defined(CONFIG_PAGE_SIZE_64KB) -# define _PAGE_FLAGS_HARD _PAGE_SZ1 -# endif -#endif - -#if defined(CONFIG_X2TLB) -# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2) -# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) -# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2) -# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2) -# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3) -# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) -# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3) -# endif -#else -# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -# define _PAGE_SZHUGE (_PAGE_SZ1) -# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1) -# endif -#endif - -/* - * Stub out _PAGE_SZHUGE if we don't have a good definition for it, - * to make pte_mkhuge() happy. - */ -#ifndef _PAGE_SZHUGE -# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) -#endif - -#define _PAGE_CHG_MASK \ - (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) - -#ifndef __ASSEMBLY__ - -#if defined(CONFIG_X2TLB) /* SH-X2 TLB */ -#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD) - -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_USER_READ | \ - _PAGE_EXT_USER_WRITE)) - -#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \ - _PAGE_EXT_KERN_READ | \ - _PAGE_EXT_USER_EXEC | \ - _PAGE_EXT_USER_READ)) - -#define PAGE_COPY PAGE_EXECREAD - -#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_USER_READ)) - -#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_USER_WRITE)) - -#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_EXEC | \ - _PAGE_EXT_USER_WRITE | \ - _PAGE_EXT_USER_READ | \ - _PAGE_EXT_USER_EXEC)) - -#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ - _PAGE_DIRTY | _PAGE_ACCESSED | \ - _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_KERN_EXEC)) - -#define PAGE_KERNEL_NOCACHE \ - __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ - _PAGE_ACCESSED | _PAGE_HW_SHARED | \ - _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_KERN_EXEC)) - -#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ - _PAGE_DIRTY | _PAGE_ACCESSED | \ - _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_EXEC)) - -#define PAGE_KERNEL_PCC(slot, type) \ - __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ - _PAGE_EXT(_PAGE_EXT_KERN_READ | \ - _PAGE_EXT_KERN_WRITE | \ - _PAGE_EXT_KERN_EXEC) \ - (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ - (type)) - -#elif defined(CONFIG_MMU) /* SH-X TLB */ -#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD) - -#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \ - _PAGE_CACHABLE | _PAGE_ACCESSED | \ - _PAGE_FLAGS_HARD) - -#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD) - -#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD) - -#define PAGE_EXECREAD PAGE_READONLY -#define PAGE_RWX PAGE_SHARED -#define PAGE_WRITEONLY PAGE_SHARED - -#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \ - _PAGE_DIRTY | _PAGE_ACCESSED | \ - _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) - -#define PAGE_KERNEL_NOCACHE \ - __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ - _PAGE_ACCESSED | _PAGE_HW_SHARED | \ - _PAGE_FLAGS_HARD) - -#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \ - _PAGE_DIRTY | _PAGE_ACCESSED | \ - _PAGE_HW_SHARED | _PAGE_FLAGS_HARD) - -#define PAGE_KERNEL_PCC(slot, type) \ - __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \ - _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \ - (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \ - (type)) -#else /* no mmu */ -#define PAGE_NONE __pgprot(0) -#define PAGE_SHARED __pgprot(0) -#define PAGE_COPY __pgprot(0) -#define PAGE_EXECREAD __pgprot(0) -#define PAGE_RWX __pgprot(0) -#define PAGE_READONLY __pgprot(0) -#define PAGE_WRITEONLY __pgprot(0) -#define PAGE_KERNEL __pgprot(0) -#define PAGE_KERNEL_NOCACHE __pgprot(0) -#define PAGE_KERNEL_RO __pgprot(0) - -#define PAGE_KERNEL_PCC(slot, type) \ - __pgprot(0) -#endif - -#endif /* __ASSEMBLY__ */ - -#ifndef __ASSEMBLY__ - -/* - * Certain architectures need to do special things when PTEs - * within a page table are directly modified. Thus, the following - * hook is made available. - */ -#ifdef CONFIG_X2TLB -static inline void set_pte(pte_t *ptep, pte_t pte) -{ - ptep->pte_high = pte.pte_high; - smp_wmb(); - ptep->pte_low = pte.pte_low; -} -#else -#define set_pte(pteptr, pteval) (*(pteptr) = pteval) -#endif - -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -/* - * (pmds are folded into pgds so this doesn't get actually called, - * but the define is needed for a generic inline function.) - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) - -#define pfn_pte(pfn, prot) \ - __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pfn_pmd(pfn, prot) \ - __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot)) - -#define pte_none(x) (!pte_val(x)) -#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE)) - -#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0) - -#define pmd_none(x) (!pmd_val(x)) -#define pmd_present(x) (pmd_val(x)) -#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) -#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) - -#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT)) -#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) -#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) -#define pte_file(pte) ((pte).pte_low & _PAGE_FILE) -#define pte_special(pte) (0) - -#ifdef CONFIG_X2TLB -#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) -#else -#define pte_write(pte) ((pte).pte_low & _PAGE_RW) -#endif - -#define PTE_BIT_FUNC(h,fn,op) \ -static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; } - -#ifdef CONFIG_X2TLB -/* - * We cheat a bit in the SH-X2 TLB case. As the permission bits are - * individually toggled (and user permissions are entirely decoupled from - * kernel permissions), we attempt to couple them a bit more sanely here. - */ -PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE); -PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE); -PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE); -#else -PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW); -PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW); -PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE); -#endif - -PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY); -PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); -PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); -PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); - -static inline pte_t pte_mkspecial(pte_t pte) { return pte; } - -/* - * Macro and implementation to make a page protection as uncachable. - */ -#define pgprot_writecombine(prot) \ - __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) - -#define pgprot_noncached pgprot_writecombine - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - * - * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) - */ -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - pte.pte_low &= _PAGE_CHG_MASK; - pte.pte_low |= pgprot_val(newprot); - -#ifdef CONFIG_X2TLB - pte.pte_high |= pgprot_val(newprot) >> 32; -#endif - - return pte; -} - -#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd)) -#define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) - -/* to find an entry in a page-table-directory. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) -#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the third-level page table.. */ -#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset_kernel(dir, address) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) -#define pte_offset_map(dir, address) pte_offset_kernel(dir, address) -#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) - -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -#ifdef CONFIG_X2TLB -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \ - &(e), (e).pte_high, (e).pte_low) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e)) -#else -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) -#endif - -/* - * Encode and de-code a swap entry - * - * Constraints: - * _PAGE_FILE at bit 0 - * _PAGE_PRESENT at bit 8 - * _PAGE_PROTNONE at bit 9 - * - * For the normal case, we encode the swap type into bits 0:7 and the - * swap offset into bits 10:30. For the 64-bit PTE case, we keep the - * preserved bits in the low 32-bits and use the upper 32 as the swap - * offset (along with a 5-bit type), following the same approach as x86 - * PAE. This keeps the logic quite simple, and allows for a full 32 - * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with - * in the pte_low case. - * - * As is evident by the Alpha code, if we ever get a 64-bit unsigned - * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes - * much cleaner.. - * - * NOTE: We should set ZEROs at the position of _PAGE_PRESENT - * and _PAGE_PROTNONE bits - */ -#ifdef CONFIG_X2TLB -#define __swp_type(x) ((x).val & 0x1f) -#define __swp_offset(x) ((x).val >> 5) -#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5}) -#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high }) -#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val }) - -/* - * Encode and decode a nonlinear file mapping entry - */ -#define pte_to_pgoff(pte) ((pte).pte_high) -#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) }) - -#define PTE_FILE_MAX_BITS 32 -#else -#define __swp_type(x) ((x).val & 0xff) -#define __swp_offset(x) ((x).val >> 10) -#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10}) - -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 }) - -/* - * Encode and decode a nonlinear file mapping entry - */ -#define PTE_FILE_MAX_BITS 29 -#define pte_to_pgoff(pte) (pte_val(pte) >> 1) -#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE }) -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_PGTABLE_32_H */ diff --git a/include/asm-sh/pgtable_64.h b/include/asm-sh/pgtable_64.h deleted file mode 100644 index c78990c..0000000 --- a/include/asm-sh/pgtable_64.h +++ /dev/null @@ -1,314 +0,0 @@ -#ifndef __ASM_SH_PGTABLE_64_H -#define __ASM_SH_PGTABLE_64_H - -/* - * include/asm-sh/pgtable_64.h - * - * This file contains the functions and defines necessary to modify and use - * the SuperH page table tree. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2003, 2004 Richard Curnow - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include -#include -#include - -/* - * Error outputs. - */ -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * Table setting routines. Used within arch/mm only. - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) - -static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) -{ - unsigned long long x = ((unsigned long long) pteval.pte_low); - unsigned long long *xp = (unsigned long long *) pteptr; - /* - * Sign-extend based on NPHYS. - */ - *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; -} -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep) -{ - pmd_val(*pmdp) = (unsigned long) ptep; -} - -/* - * PGD defines. Top level. - */ - -/* To find an entry in a generic PGD. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) -#define __pgd_offset(address) pgd_index(address) -#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) - -/* To find an entry in a kernel PGD. */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* - * PMD level access routines. Same notes as above. - */ -#define _PMD_EMPTY 0x0 -/* Either the PMD is empty or present, it's not paged out */ -#define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) -#define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) -#define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) -#define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) - -#define pmd_page_vaddr(pmd_entry) \ - ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) - -#define pmd_page(pmd) \ - (virt_to_page(pmd_val(pmd))) - -/* PMD to PTE dereferencing */ -#define pte_index(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) - -#define pte_offset_kernel(dir, addr) \ - ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) - -#define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) -#define pte_offset_map_nested(dir,addr) pte_offset_kernel(dir, addr) -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -#ifndef __ASSEMBLY__ -#define IOBASE_VADDR 0xff000000 -#define IOBASE_END 0xffffffff - -/* - * PTEL coherent flags. - * See Chapter 17 ST50 CPU Core Volume 1, Architecture. - */ -/* The bits that are required in the SH-5 TLB are placed in the h/w-defined - positions, to avoid expensive bit shuffling on every refill. The remaining - bits are used for s/w purposes and masked out on each refill. - - Note, the PTE slots are used to hold data of type swp_entry_t when a page is - swapped out. Only the _PAGE_PRESENT flag is significant when the page is - swapped out, and it must be placed so that it doesn't overlap either the - type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type - at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This - scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit - [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split - into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ -#define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ -#define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ -#define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ -#define _PAGE_PRESENT 0x004 /* software: page referenced */ -#define _PAGE_FILE 0x004 /* software: only when !present */ -#define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ -#define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ -#define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ -#define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ -#define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ -#define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ -#define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ -#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ -#define _PAGE_ACCESSED 0x800 /* software: page referenced */ - -/* Mask which drops software flags */ -#define _PAGE_FLAGS_HARDWARE_MASK 0xfffffffffffff3dbLL - -/* - * HugeTLB support - */ -#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define _PAGE_SZHUGE (_PAGE_SIZE0) -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB) -#define _PAGE_SZHUGE (_PAGE_SIZE1) -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) -#define _PAGE_SZHUGE (_PAGE_SIZE0 | _PAGE_SIZE1) -#endif - -/* - * Stub out _PAGE_SZHUGE if we don't have a good definition for it, - * to make pte_mkhuge() happy. - */ -#ifndef _PAGE_SZHUGE -# define _PAGE_SZHUGE (0) -#endif - -/* - * Default flags for a Kernel page. - * This is fundametally also SHARED because the main use of this define - * (other than for PGD/PMD entries) is for the VMALLOC pool which is - * contextless. - * - * _PAGE_EXECUTE is required for modules - * - */ -#define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_EXECUTE | \ - _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_DIRTY | \ - _PAGE_SHARED) - -/* Default flags for a User page */ -#define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER) - -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) - -/* - * We have full permissions (Read/Write/Execute/Shared). - */ -#define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \ - _PAGE_CACHABLE | _PAGE_ACCESSED) - -#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) -#define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_SHARED) -#define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE) - -/* - * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default - * protection mode for the stack. - */ -#define PAGE_COPY PAGE_EXECREAD - -#define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ) -#define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE) -#define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \ - _PAGE_WRITE | _PAGE_EXECUTE) -#define PAGE_KERNEL __pgprot(_KERNPG_TABLE) - -#define PAGE_KERNEL_NOCACHE \ - __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ - _PAGE_EXECUTE | _PAGE_ACCESSED | \ - _PAGE_DIRTY | _PAGE_SHARED) - -/* Make it a device mapping for maximum safety (e.g. for mapping device - registers into user-space via /dev/map). */ -#define pgprot_noncached(x) __pgprot(((x).pgprot & ~(_PAGE_CACHABLE)) | _PAGE_DEVICE) -#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE) - -/* - * Handling allocation failures during page table setup. - */ -extern void __handle_bad_pmd_kernel(pmd_t * pmd); -#define __handle_bad_pmd(x) __handle_bad_pmd_kernel(x) - -/* - * PTE level access routines. - * - * Note1: - * It's the tree walk leaf. This is physical address to be stored. - * - * Note 2: - * Regarding the choice of _PTE_EMPTY: - - We must choose a bit pattern that cannot be valid, whether or not the page - is present. bit[2]==1 => present, bit[2]==0 => swapped out. If swapped - out, bits [31:8], [6:3], [1:0] are under swapper control, so only bit[7] is - left for us to select. If we force bit[7]==0 when swapped out, we could use - the combination bit[7,2]=2'b10 to indicate an empty PTE. Alternatively, if - we force bit[7]==1 when swapped out, we can use all zeroes to indicate - empty. This is convenient, because the page tables get cleared to zero - when they are allocated. - - */ -#define _PTE_EMPTY 0x0 -#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) -#define pte_clear(mm,addr,xp) (set_pte_at(mm, addr, xp, __pte(_PTE_EMPTY))) -#define pte_none(x) (pte_val(x) == _PTE_EMPTY) - -/* - * Some definitions to translate between mem_map, PTEs, and page - * addresses: - */ - -/* - * Given a PTE, return the index of the mem_map[] entry corresponding - * to the page frame the PTE. Get the absolute physical address, make - * a relative physical address and translate it to an index. - */ -#define pte_pagenr(x) (((unsigned long) (pte_val(x)) - \ - __MEMORY_START) >> PAGE_SHIFT) - -/* - * Given a PTE, return the "struct page *". - */ -#define pte_page(x) (mem_map + pte_pagenr(x)) - -/* - * Return number of (down rounded) MB corresponding to x pages. - */ -#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) - - -/* - * The following have defined behavior only work if pte_present() is true. - */ -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; } -static inline int pte_special(pte_t pte){ return 0; } - -static inline pte_t pte_wrprotect(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_WRITE)); return pte; } -static inline pte_t pte_mkclean(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkold(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); return pte; } -static inline pte_t pte_mkwrite(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_WRITE)); return pte; } -static inline pte_t pte_mkdirty(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); return pte; } -static inline pte_t pte_mkyoung(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); return pte; } -static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _PAGE_SZHUGE)); return pte; } -static inline pte_t pte_mkspecial(pte_t pte) { return pte; } - - -/* - * Conversion functions: convert a page and protection to a page entry. - * - * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) - */ -#define mk_pte(page,pgprot) \ -({ \ - pte_t __pte; \ - \ - set_pte(&__pte, __pte((((page)-mem_map) << PAGE_SHIFT) | \ - __MEMORY_START | pgprot_val((pgprot)))); \ - __pte; \ -}) - -/* - * This takes a (absolute) physical page address that is used - * by the remapping functions - */ -#define mk_pte_phys(physpage, pgprot) \ -({ pte_t __pte; set_pte(&__pte, __pte(physpage | pgprot_val(pgprot))); __pte; }) - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } - -/* Encode and decode a swap entry */ -#define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) -#define __swp_offset(x) ((x).val >> 8) -#define __swp_entry(type, offset) ((swp_entry_t) { ((offset << 8) + ((type & 0x3c) << 1) + (type & 3)) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* Encode and decode a nonlinear file mapping entry */ -#define PTE_FILE_MAX_BITS 29 -#define pte_to_pgoff(pte) (pte_val(pte)) -#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) - -#endif /* !__ASSEMBLY__ */ - -#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) - -#endif /* __ASM_SH_PGTABLE_64_H */ diff --git a/include/asm-sh/pm.h b/include/asm-sh/pm.h deleted file mode 100644 index 56fdbd6..0000000 --- a/include/asm-sh/pm.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright 2006 (c) Andriy Skulysh - * - */ -#ifndef __ASM_SH_PM_H -#define __ASM_SH_PM_H - -extern u8 wakeup_start; -extern u8 wakeup_end; - -void pm_enter(void); - -#endif diff --git a/include/asm-sh/poll.h b/include/asm-sh/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-sh/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-sh/posix_types.h b/include/asm-sh/posix_types.h deleted file mode 100644 index 4eeb723..0000000 --- a/include/asm-sh/posix_types.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifdef __KERNEL__ -# ifdef CONFIG_SUPERH32 -# include "posix_types_32.h" -# else -# include "posix_types_64.h" -# endif -#else -# ifdef __SH5__ -# include "posix_types_64.h" -# else -# include "posix_types_32.h" -# endif -#endif /* __KERNEL__ */ diff --git a/include/asm-sh/posix_types_32.h b/include/asm-sh/posix_types_32.h deleted file mode 100644 index 0a3d2f5..0000000 --- a/include/asm-sh/posix_types_32.h +++ /dev/null @@ -1,122 +0,0 @@ -#ifndef __ASM_SH_POSIX_TYPES_H -#define __ASM_SH_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ -} __kernel_fsid_t; - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ - -#endif /* __ASM_SH_POSIX_TYPES_H */ diff --git a/include/asm-sh/posix_types_64.h b/include/asm-sh/posix_types_64.h deleted file mode 100644 index 0620317..0000000 --- a/include/asm-sh/posix_types_64.h +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef __ASM_SH64_POSIX_TYPES_H -#define __ASM_SH64_POSIX_TYPES_H - -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * include/asm-sh64/posix_types.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef long unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ -} __kernel_fsid_t; - -#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ - -#endif /* __ASM_SH64_POSIX_TYPES_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h deleted file mode 100644 index 15d9f92..0000000 --- a/include/asm-sh/processor.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef __ASM_SH_PROCESSOR_H -#define __ASM_SH_PROCESSOR_H - -#include -#include - -#ifndef __ASSEMBLY__ -/* - * CPU type and hardware bug flags. Kept separately for each CPU. - * - * Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry - * in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c - * for parsing the subtype in get_cpu_subtype(). - */ -enum cpu_type { - /* SH-2 types */ - CPU_SH7619, - - /* SH-2A types */ - CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG, - - /* SH-3 types */ - CPU_SH7705, CPU_SH7706, CPU_SH7707, - CPU_SH7708, CPU_SH7708S, CPU_SH7708R, - CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, - CPU_SH7720, CPU_SH7721, CPU_SH7729, - - /* SH-4 types */ - CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, - CPU_SH7760, CPU_SH4_202, CPU_SH4_501, - - /* SH-4A types */ - CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, - CPU_SH7723, CPU_SHX3, - - /* SH4AL-DSP types */ - CPU_SH7343, CPU_SH7722, CPU_SH7366, - - /* SH-5 types */ - CPU_SH5_101, CPU_SH5_103, - - /* Unknown subtype */ - CPU_SH_NONE -}; - -/* Forward decl */ -struct sh_cpuinfo; - -/* arch/sh/kernel/setup.c */ -const char *get_cpu_subtype(struct sh_cpuinfo *c); - -#ifdef CONFIG_VSYSCALL -int vsyscall_init(void); -#else -#define vsyscall_init() do { } while (0) -#endif - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_SUPERH32 -# include "processor_32.h" -#else -# include "processor_64.h" -#endif - -#endif /* __ASM_SH_PROCESSOR_H */ diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h deleted file mode 100644 index 0dadd75..0000000 --- a/include/asm-sh/processor_32.h +++ /dev/null @@ -1,216 +0,0 @@ -/* - * include/asm-sh/processor.h - * - * Copyright (C) 1999, 2000 Niibe Yutaka - * Copyright (C) 2002, 2003 Paul Mundt - */ - -#ifndef __ASM_SH_PROCESSOR_32_H -#define __ASM_SH_PROCESSOR_32_H -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n.align 2\n1:":"=z" (pc)); pc; }) - -/* Core Processor Version Register */ -#define CCN_PVR 0xff000030 -#define CCN_CVR 0xff000040 -#define CCN_PRR 0xff000044 - -struct sh_cpuinfo { - unsigned int type; - int cut_major, cut_minor; - unsigned long loops_per_jiffy; - unsigned long asid_cache; - - struct cache_info icache; /* Primary I-cache */ - struct cache_info dcache; /* Primary D-cache */ - struct cache_info scache; /* Secondary cache */ - - unsigned long flags; -} __attribute__ ((aligned(L1_CACHE_BYTES))); - -extern struct sh_cpuinfo cpu_data[]; -#define boot_cpu_data cpu_data[0] -#define current_cpu_data cpu_data[smp_processor_id()] -#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] - -/* - * User space process size: 2GB. - * - * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff - */ -#define TASK_SIZE 0x7c000000UL - -#define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -/* - * Bit of SR register - * - * FD-bit: - * When it's set, it means the processor doesn't have right to use FPU, - * and it results exception when the floating operation is executed. - * - * IMASK-bit: - * Interrupt level mask - */ -#define SR_DSP 0x00001000 -#define SR_IMASK 0x000000f0 -#define SR_FD 0x00008000 - -/* - * FPU structure and data - */ - -struct sh_fpu_hard_struct { - unsigned long fp_regs[16]; - unsigned long xfp_regs[16]; - unsigned long fpscr; - unsigned long fpul; - - long status; /* software status information */ -}; - -/* Dummy fpu emulator */ -struct sh_fpu_soft_struct { - unsigned long fp_regs[16]; - unsigned long xfp_regs[16]; - unsigned long fpscr; - unsigned long fpul; - - unsigned char lookahead; - unsigned long entry_pc; -}; - -union sh_fpu_union { - struct sh_fpu_hard_struct hard; - struct sh_fpu_soft_struct soft; -}; - -struct thread_struct { - /* Saved registers when thread is descheduled */ - unsigned long sp; - unsigned long pc; - - /* Hardware debugging registers */ - unsigned long ubc_pc; - - /* floating point info */ - union sh_fpu_union fpu; -}; - -/* Count of active tasks with UBC settings */ -extern int ubc_usercnt; - -#define INIT_THREAD { \ - .sp = sizeof(init_stack) + (long) &init_stack, \ -} - -/* - * Do necessary setup to start up a newly executed thread. - */ -#define start_thread(regs, new_pc, new_sp) \ - set_fs(USER_DS); \ - regs->pr = 0; \ - regs->sr = SR_FD; /* User mode. */ \ - regs->pc = new_pc; \ - regs->regs[15] = new_sp - -/* Forward declaration, a strange C thing */ -struct task_struct; -struct mm_struct; - -/* Free all resources held by a thread. */ -extern void release_thread(struct task_struct *); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -/* - * create a kernel thread without removing it from tasklists - */ -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -/* Copy and release all segment info associated with a VM */ -#define copy_segments(p, mm) do { } while(0) -#define release_segments(mm) do { } while(0) - -/* - * FPU lazy state save handling. - */ - -static __inline__ void disable_fpu(void) -{ - unsigned long __dummy; - - /* Set FD flag in SR */ - __asm__ __volatile__("stc sr, %0\n\t" - "or %1, %0\n\t" - "ldc %0, sr" - : "=&r" (__dummy) - : "r" (SR_FD)); -} - -static __inline__ void enable_fpu(void) -{ - unsigned long __dummy; - - /* Clear out FD flag in SR */ - __asm__ __volatile__("stc sr, %0\n\t" - "and %1, %0\n\t" - "ldc %0, sr" - : "=&r" (__dummy) - : "r" (~SR_FD)); -} - -/* Double presision, NANS as NANS, rounding to nearest, no exceptions */ -#define FPSCR_INIT 0x00080000 - -#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */ -#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */ - -/* - * Return saved PC of a blocked thread. - */ -#define thread_saved_pc(tsk) (tsk->thread.pc) - -void show_trace(struct task_struct *tsk, unsigned long *sp, - struct pt_regs *regs); -extern unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc) -#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15]) - -#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory") -#define cpu_relax() barrier() - -#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \ - defined(CONFIG_CPU_SH4) -#define PREFETCH_STRIDE L1_CACHE_BYTES -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -static inline void prefetch(void *x) -{ - __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory"); -} - -#define prefetchw(x) prefetch(x) -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_PROCESSOR_32_H */ diff --git a/include/asm-sh/processor_64.h b/include/asm-sh/processor_64.h deleted file mode 100644 index fc7fc68..0000000 --- a/include/asm-sh/processor_64.h +++ /dev/null @@ -1,275 +0,0 @@ -#ifndef __ASM_SH_PROCESSOR_64_H -#define __ASM_SH_PROCESSOR_64_H - -/* - * include/asm-sh/processor_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASSEMBLY__ - -#include -#include -#include -#include -#include -#include - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ \ -void *pc; \ -unsigned long long __dummy = 0; \ -__asm__("gettr tr0, %1\n\t" \ - "pta 4, tr0\n\t" \ - "gettr tr0, %0\n\t" \ - "ptabs %1, tr0\n\t" \ - :"=r" (pc), "=r" (__dummy) \ - : "1" (__dummy)); \ -pc; }) - -/* - * TLB information structure - * - * Defined for both I and D tlb, per-processor. - */ -struct tlb_info { - unsigned long long next; - unsigned long long first; - unsigned long long last; - - unsigned int entries; - unsigned int step; - - unsigned long flags; -}; - -struct sh_cpuinfo { - enum cpu_type type; - unsigned long loops_per_jiffy; - unsigned long asid_cache; - - unsigned int cpu_clock, master_clock, bus_clock, module_clock; - - /* Cache info */ - struct cache_info icache; - struct cache_info dcache; - struct cache_info scache; - - /* TLB info */ - struct tlb_info itlb; - struct tlb_info dtlb; - - unsigned long flags; -}; - -extern struct sh_cpuinfo cpu_data[]; -#define boot_cpu_data cpu_data[0] -#define current_cpu_data cpu_data[smp_processor_id()] -#define raw_current_cpu_data cpu_data[raw_smp_processor_id()] - -#endif - -/* - * User space process size: 2GB - 4k. - */ -#define TASK_SIZE 0x7ffff000UL - -#define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 3) - -/* - * Bit of SR register - * - * FD-bit: - * When it's set, it means the processor doesn't have right to use FPU, - * and it results exception when the floating operation is executed. - * - * IMASK-bit: - * Interrupt level mask - * - * STEP-bit: - * Single step bit - * - */ -#if defined(CONFIG_SH64_SR_WATCH) -#define SR_MMU 0x84000000 -#else -#define SR_MMU 0x80000000 -#endif - -#define SR_IMASK 0x000000f0 -#define SR_FD 0x00008000 -#define SR_SSTEP 0x08000000 - -#ifndef __ASSEMBLY__ - -/* - * FPU structure and data : require 8-byte alignment as we need to access it - with fld.p, fst.p - */ - -struct sh_fpu_hard_struct { - unsigned long fp_regs[64]; - unsigned int fpscr; - /* long status; * software status information */ -}; - -#if 0 -/* Dummy fpu emulator */ -struct sh_fpu_soft_struct { - unsigned long long fp_regs[32]; - unsigned int fpscr; - unsigned char lookahead; - unsigned long entry_pc; -}; -#endif - -union sh_fpu_union { - struct sh_fpu_hard_struct hard; - /* 'hard' itself only produces 32 bit alignment, yet we need - to access it using 64 bit load/store as well. */ - unsigned long long alignment_dummy; -}; - -struct thread_struct { - unsigned long sp; - unsigned long pc; - /* This stores the address of the pt_regs built during a context - switch, or of the register save area built for a kernel mode - exception. It is used for backtracing the stack of a sleeping task - or one that traps in kernel mode. */ - struct pt_regs *kregs; - /* This stores the address of the pt_regs constructed on entry from - user mode. It is a fixed value over the lifetime of a process, or - NULL for a kernel thread. */ - struct pt_regs *uregs; - - unsigned long trap_no, error_code; - unsigned long address; - /* Hardware debugging registers may come here */ - - /* floating point info */ - union sh_fpu_union fpu; -}; - -#define INIT_MMAP \ -{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } - -extern struct pt_regs fake_swapper_regs; - -#define INIT_THREAD { \ - .sp = sizeof(init_stack) + \ - (long) &init_stack, \ - .pc = 0, \ - .kregs = &fake_swapper_regs, \ - .uregs = NULL, \ - .trap_no = 0, \ - .error_code = 0, \ - .address = 0, \ - .fpu = { { { 0, } }, } \ -} - -/* - * Do necessary setup to start up a newly executed thread. - */ -#define SR_USER (SR_MMU | SR_FD) - -#define start_thread(regs, new_pc, new_sp) \ - set_fs(USER_DS); \ - regs->sr = SR_USER; /* User mode. */ \ - regs->pc = new_pc - 4; /* Compensate syscall exit */ \ - regs->pc |= 1; /* Set SHmedia ! */ \ - regs->regs[18] = 0; \ - regs->regs[15] = new_sp - -/* Forward declaration, a strange C thing */ -struct task_struct; -struct mm_struct; - -/* Free all resources held by a thread. */ -extern void release_thread(struct task_struct *); -/* - * create a kernel thread without removing it from tasklists - */ -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - - -/* Copy and release all segment info associated with a VM */ -#define copy_segments(p, mm) do { } while (0) -#define release_segments(mm) do { } while (0) -#define forget_segments() do { } while (0) -#define prepare_to_copy(tsk) do { } while (0) -/* - * FPU lazy state save handling. - */ - -static inline void disable_fpu(void) -{ - unsigned long long __dummy; - - /* Set FD flag in SR */ - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy) - : "r" (SR_FD)); -} - -static inline void enable_fpu(void) -{ - unsigned long long __dummy; - - /* Clear out FD flag in SR */ - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy) - : "r" (~SR_FD)); -} - -/* Round to nearest, no exceptions on inexact, overflow, underflow, - zero-divide, invalid. Configure option for whether to flush denorms to - zero, or except if a denorm is encountered. */ -#if defined(CONFIG_SH64_FPU_DENORM_FLUSH) -#define FPSCR_INIT 0x00040000 -#else -#define FPSCR_INIT 0x00000000 -#endif - -#ifdef CONFIG_SH_FPU -/* Initialise the FP state of a task */ -void fpinit(struct sh_fpu_hard_struct *fpregs); -#else -#define fpinit(fpregs) do { } while (0) -#endif - -extern struct task_struct *last_task_used_math; - -/* - * Return saved PC of a blocked thread. - */ -#define thread_saved_pc(tsk) (tsk->thread.pc) - -extern unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) ((tsk)->thread.pc) -#define KSTK_ESP(tsk) ((tsk)->thread.sp) - -#define cpu_relax() barrier() - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_PROCESSOR_64_H */ diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h deleted file mode 100644 index 643ab5a..0000000 --- a/include/asm-sh/ptrace.h +++ /dev/null @@ -1,130 +0,0 @@ -#ifndef __ASM_SH_PTRACE_H -#define __ASM_SH_PTRACE_H - -/* - * Copyright (C) 1999, 2000 Niibe Yutaka - * - */ -#if defined(__SH5__) -struct pt_regs { - unsigned long long pc; - unsigned long long sr; - unsigned long long syscall_nr; - unsigned long long regs[63]; - unsigned long long tregs[8]; - unsigned long long pad[2]; -}; -#else -/* - * GCC defines register number like this: - * ----------------------------- - * 0 - 15 are integer registers - * 17 - 22 are control/special registers - * 24 - 39 fp registers - * 40 - 47 xd registers - * 48 - fpscr register - * ----------------------------- - * - * We follows above, except: - * 16 --- program counter (PC) - * 22 --- syscall # - * 23 --- floating point communication register - */ -#define REG_REG0 0 -#define REG_REG15 15 - -#define REG_PC 16 - -#define REG_PR 17 -#define REG_SR 18 -#define REG_GBR 19 -#define REG_MACH 20 -#define REG_MACL 21 - -#define REG_SYSCALL 22 - -#define REG_FPREG0 23 -#define REG_FPREG15 38 -#define REG_XFREG0 39 -#define REG_XFREG15 54 - -#define REG_FPSCR 55 -#define REG_FPUL 56 - -/* - * This struct defines the way the registers are stored on the - * kernel stack during a system call or other kernel entry. - */ -struct pt_regs { - unsigned long regs[16]; - unsigned long pc; - unsigned long pr; - unsigned long sr; - unsigned long gbr; - unsigned long mach; - unsigned long macl; - long tra; -}; - -/* - * This struct defines the way the DSP registers are stored on the - * kernel stack during a system call or other kernel entry. - */ -struct pt_dspregs { - unsigned long a1; - unsigned long a0g; - unsigned long a1g; - unsigned long m0; - unsigned long m1; - unsigned long a0; - unsigned long x0; - unsigned long x1; - unsigned long y0; - unsigned long y1; - unsigned long dsr; - unsigned long rs; - unsigned long re; - unsigned long mod; -}; - -#define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ - -#define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ -#define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ - -#define PTRACE_GETDSPREGS 55 -#define PTRACE_SETDSPREGS 56 -#endif - -#ifdef __KERNEL__ -#include - -#define user_mode(regs) (((regs)->sr & 0x40000000)==0) -#define instruction_pointer(regs) ((unsigned long)(regs)->pc) - -extern void show_regs(struct pt_regs *); - -#ifdef CONFIG_SH_DSP -#define task_pt_regs(task) \ - ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ - - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1) -#else -#define task_pt_regs(task) \ - ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \ - - sizeof(unsigned long)) - 1) -#endif - -static inline unsigned long profile_pc(struct pt_regs *regs) -{ - unsigned long pc = instruction_pointer(regs); - -#ifdef P2SEG - if (pc >= P2SEG && pc < P3SEG) - pc -= 0x20000000; -#endif - - return pc; -} -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_PTRACE_H */ diff --git a/include/asm-sh/push-switch.h b/include/asm-sh/push-switch.h deleted file mode 100644 index 4903f9e..0000000 --- a/include/asm-sh/push-switch.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __ASM_SH_PUSH_SWITCH_H -#define __ASM_SH_PUSH_SWITCH_H - -#include -#include -#include -#include - -struct push_switch { - /* switch state */ - unsigned int state:1; - /* debounce timer */ - struct timer_list debounce; - /* workqueue */ - struct work_struct work; - /* platform device, for workqueue handler */ - struct platform_device *pdev; -}; - -struct push_switch_platform_info { - /* IRQ handler */ - irqreturn_t (*irq_handler)(int irq, void *data); - /* Special IRQ flags */ - unsigned int irq_flags; - /* Bit location of switch */ - unsigned int bit; - /* Symbolic switch name */ - const char *name; -}; - -#endif /* __ASM_SH_PUSH_SWITCH_H */ diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h deleted file mode 100644 index 306f735..0000000 --- a/include/asm-sh/r7780rp.h +++ /dev/null @@ -1,198 +0,0 @@ -#ifndef __ASM_SH_RENESAS_R7780RP_H -#define __ASM_SH_RENESAS_R7780RP_H - -/* Box specific addresses. */ -#if defined(CONFIG_SH_R7780MP) -#define PA_BCR 0xa4000000 /* FPGA */ -#define PA_SDPOW (-1) - -#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ -#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ -#define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */ -#define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */ -#define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */ -#define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */ -#define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */ -#define PA_PCIBD (PA_BCR+0x000e) /* PCI Board detect control */ -#define PA_PCICD (PA_BCR+0x0010) /* PCI Conector detect control */ -#define PA_EXTGIO (PA_BCR+0x0016) /* Extension GPIO Control */ -#define PA_IVDRMON (PA_BCR+0x0018) /* iVDR Moniter control */ -#define PA_IVDRCTL (PA_BCR+0x001a) /* iVDR control */ -#define PA_OBLED (PA_BCR+0x001c) /* On Board LED control */ -#define PA_OBSW (PA_BCR+0x001e) /* On Board Switch control */ -#define PA_AUDIOSEL (PA_BCR+0x0020) /* Sound Interface Select control */ -#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ -#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ -#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ -#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ -#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ -#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ -#define PA_DBSW (PA_BCR+0x0200) /* Debug Board Switch control */ -#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ -#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ -#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ -#define PA_SCSMR0 (PA_BCR+0x0400) /* SCIF0 Serial mode control */ -#define PA_SCBRR0 (PA_BCR+0x0404) /* SCIF0 Bit rate control */ -#define PA_SCSCR0 (PA_BCR+0x0408) /* SCIF0 Serial control */ -#define PA_SCFTDR0 (PA_BCR+0x040c) /* SCIF0 Send FIFO control */ -#define PA_SCFSR0 (PA_BCR+0x0410) /* SCIF0 Serial status control */ -#define PA_SCFRDR0 (PA_BCR+0x0414) /* SCIF0 Receive FIFO control */ -#define PA_SCFCR0 (PA_BCR+0x0418) /* SCIF0 FIFO control */ -#define PA_SCTFDR0 (PA_BCR+0x041c) /* SCIF0 Send FIFO data control */ -#define PA_SCRFDR0 (PA_BCR+0x0420) /* SCIF0 Receive FIFO data control */ -#define PA_SCSPTR0 (PA_BCR+0x0424) /* SCIF0 Serial Port control */ -#define PA_SCLSR0 (PA_BCR+0x0428) /* SCIF0 Line Status control */ -#define PA_SCRER0 (PA_BCR+0x042c) /* SCIF0 Serial Error control */ -#define PA_SCSMR1 (PA_BCR+0x0500) /* SCIF1 Serial mode control */ -#define PA_SCBRR1 (PA_BCR+0x0504) /* SCIF1 Bit rate control */ -#define PA_SCSCR1 (PA_BCR+0x0508) /* SCIF1 Serial control */ -#define PA_SCFTDR1 (PA_BCR+0x050c) /* SCIF1 Send FIFO control */ -#define PA_SCFSR1 (PA_BCR+0x0510) /* SCIF1 Serial status control */ -#define PA_SCFRDR1 (PA_BCR+0x0514) /* SCIF1 Receive FIFO control */ -#define PA_SCFCR1 (PA_BCR+0x0518) /* SCIF1 FIFO control */ -#define PA_SCTFDR1 (PA_BCR+0x051c) /* SCIF1 Send FIFO data control */ -#define PA_SCRFDR1 (PA_BCR+0x0520) /* SCIF1 Receive FIFO data control */ -#define PA_SCSPTR1 (PA_BCR+0x0524) /* SCIF1 Serial Port control */ -#define PA_SCLSR1 (PA_BCR+0x0528) /* SCIF1 Line Status control */ -#define PA_SCRER1 (PA_BCR+0x052c) /* SCIF1 Serial Error control */ -#define PA_SMCR (PA_BCR+0x0600) /* 2-wire Serial control */ -#define PA_SMSMADR (PA_BCR+0x0602) /* 2-wire Serial Slave control */ -#define PA_SMMR (PA_BCR+0x0604) /* 2-wire Serial Mode control */ -#define PA_SMSADR1 (PA_BCR+0x0606) /* 2-wire Serial Address1 control */ -#define PA_SMTRDR1 (PA_BCR+0x0646) /* 2-wire Serial Data1 control */ -#define PA_VERREG (PA_BCR+0x0700) /* FPGA Version Register */ -#define PA_POFF (PA_BCR+0x0800) /* System Power Off control */ -#define PA_PMR (PA_BCR+0x0900) /* */ - -#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ -#define IVDR_CK_ON 8 /* iVDR Clock ON */ - -#elif defined(CONFIG_SH_R7780RP) -#define PA_POFF (-1) - -#define PA_BCR 0xa5000000 /* FPGA */ -#define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */ -#define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */ -#define PA_SDPOW (PA_BCR+0x0004) /* SD Power control */ -#define PA_RSTCTL (PA_BCR+0x0006) /* Device Reset control */ -#define PA_PCIBD (PA_BCR+0x0008) /* PCI Board detect control */ -#define PA_PCICD (PA_BCR+0x000a) /* PCI Conector detect control */ -#define PA_ZIGIO1 (PA_BCR+0x000c) /* Zigbee IO control 1 */ -#define PA_ZIGIO2 (PA_BCR+0x000e) /* Zigbee IO control 2 */ -#define PA_ZIGIO3 (PA_BCR+0x0010) /* Zigbee IO control 3 */ -#define PA_ZIGIO4 (PA_BCR+0x0012) /* Zigbee IO control 4 */ -#define PA_IVDRMON (PA_BCR+0x0014) /* iVDR Moniter control */ -#define PA_IVDRCTL (PA_BCR+0x0016) /* iVDR control */ -#define PA_OBLED (PA_BCR+0x0018) /* On Board LED control */ -#define PA_OBSW (PA_BCR+0x001a) /* On Board Switch control */ -#define PA_AUDIOSEL (PA_BCR+0x001c) /* Sound Interface Select control */ -#define PA_EXTPLR (PA_BCR+0x001e) /* Extention Pin Polarity control */ -#define PA_TPCTL (PA_BCR+0x0100) /* Touch Panel Access control */ -#define PA_TPDCKCTL (PA_BCR+0x0102) /* Touch Panel Access data control */ -#define PA_TPCTLCLR (PA_BCR+0x0104) /* Touch Panel Access control */ -#define PA_TPXPOS (PA_BCR+0x0106) /* Touch Panel X position control */ -#define PA_TPYPOS (PA_BCR+0x0108) /* Touch Panel Y position control */ -#define PA_DBDET (PA_BCR+0x0200) /* Debug Board detect control */ -#define PA_DBDISPCTL (PA_BCR+0x0202) /* Debug Board Dot timing control */ -#define PA_DBSW (PA_BCR+0x0204) /* Debug Board Switch control */ -#define PA_CFCTL (PA_BCR+0x0300) /* CF Timing control */ -#define PA_CFPOW (PA_BCR+0x0302) /* CF Power control */ -#define PA_CFCDINTCLR (PA_BCR+0x0304) /* CF Insert Interrupt clear */ -#define PA_SCSMR (PA_BCR+0x0400) /* SCIF Serial mode control */ -#define PA_SCBRR (PA_BCR+0x0402) /* SCIF Bit rate control */ -#define PA_SCSCR (PA_BCR+0x0404) /* SCIF Serial control */ -#define PA_SCFDTR (PA_BCR+0x0406) /* SCIF Send FIFO control */ -#define PA_SCFSR (PA_BCR+0x0408) /* SCIF Serial status control */ -#define PA_SCFRDR (PA_BCR+0x040a) /* SCIF Receive FIFO control */ -#define PA_SCFCR (PA_BCR+0x040c) /* SCIF FIFO control */ -#define PA_SCFDR (PA_BCR+0x040e) /* SCIF FIFO data control */ -#define PA_SCLSR (PA_BCR+0x0412) /* SCIF Line Status control */ -#define PA_SMCR (PA_BCR+0x0500) /* 2-wire Serial control */ -#define PA_SMSMADR (PA_BCR+0x0502) /* 2-wire Serial Slave control */ -#define PA_SMMR (PA_BCR+0x0504) /* 2-wire Serial Mode control */ -#define PA_SMSADR1 (PA_BCR+0x0506) /* 2-wire Serial Address1 control */ -#define PA_SMTRDR1 (PA_BCR+0x0546) /* 2-wire Serial Data1 control */ -#define PA_VERREG (PA_BCR+0x0600) /* FPGA Version Register */ - -#define PA_AX88796L 0xa5800400 /* AX88796L Area */ -#define PA_SC1602BSLB 0xa6000000 /* SC1602BSLB Area */ -#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ -#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ - -#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ - -#define IVDR_CK_ON 8 /* iVDR Clock ON */ - -#elif defined(CONFIG_SH_R7785RP) -#define PA_BCR 0xa4000000 /* FPGA */ -#define PA_SDPOW (-1) - -#define PA_PCISCR (PA_BCR+0x0000) -#define PA_IRLPRA (PA_BCR+0x0002) -#define PA_IRLPRB (PA_BCR+0x0004) -#define PA_IRLPRC (PA_BCR+0x0006) -#define PA_IRLPRD (PA_BCR+0x0008) -#define IRLCNTR1 (PA_BCR+0x0010) -#define PA_IRLPRE (PA_BCR+0x000a) -#define PA_IRLPRF (PA_BCR+0x000c) -#define PA_EXIRLCR (PA_BCR+0x000e) -#define PA_IRLMCR1 (PA_BCR+0x0010) -#define PA_IRLMCR2 (PA_BCR+0x0012) -#define PA_IRLSSR1 (PA_BCR+0x0014) -#define PA_IRLSSR2 (PA_BCR+0x0016) -#define PA_CFTCR (PA_BCR+0x0100) -#define PA_CFPCR (PA_BCR+0x0102) -#define PA_PCICR (PA_BCR+0x0110) -#define PA_IVDRCTL (PA_BCR+0x0112) -#define PA_IVDRSR (PA_BCR+0x0114) -#define PA_PDRSTCR (PA_BCR+0x0116) -#define PA_POFF (PA_BCR+0x0120) -#define PA_LCDCR (PA_BCR+0x0130) -#define PA_TPCR (PA_BCR+0x0140) -#define PA_TPCKCR (PA_BCR+0x0142) -#define PA_TPRSTR (PA_BCR+0x0144) -#define PA_TPXPDR (PA_BCR+0x0146) -#define PA_TPYPDR (PA_BCR+0x0148) -#define PA_GPIOPFR (PA_BCR+0x0150) -#define PA_GPIODR (PA_BCR+0x0152) -#define PA_OBLED (PA_BCR+0x0154) -#define PA_SWSR (PA_BCR+0x0156) -#define PA_VERREG (PA_BCR+0x0158) -#define PA_SMCR (PA_BCR+0x0200) -#define PA_SMSMADR (PA_BCR+0x0202) -#define PA_SMMR (PA_BCR+0x0204) -#define PA_SMSADR1 (PA_BCR+0x0206) -#define PA_SMSADR32 (PA_BCR+0x0244) -#define PA_SMTRDR1 (PA_BCR+0x0246) -#define PA_SMTRDR16 (PA_BCR+0x0264) -#define PA_CU3MDR (PA_BCR+0x0300) -#define PA_CU5MDR (PA_BCR+0x0302) -#define PA_MMSR (PA_BCR+0x0400) - -#define IVDR_CK_ON 4 /* iVDR Clock ON */ -#endif - -#define HL_FPGA_IRQ_BASE 200 -#define HL_NR_IRL 15 - -#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0) -#define IRQ_CF (HL_FPGA_IRQ_BASE + 1) -#define IRQ_PSW (HL_FPGA_IRQ_BASE + 2) -#define IRQ_EXT0 (HL_FPGA_IRQ_BASE + 3) -#define IRQ_EXT1 (HL_FPGA_IRQ_BASE + 4) -#define IRQ_EXT2 (HL_FPGA_IRQ_BASE + 5) -#define IRQ_EXT3 (HL_FPGA_IRQ_BASE + 6) -#define IRQ_EXT4 (HL_FPGA_IRQ_BASE + 7) -#define IRQ_EXT5 (HL_FPGA_IRQ_BASE + 8) -#define IRQ_EXT6 (HL_FPGA_IRQ_BASE + 9) -#define IRQ_EXT7 (HL_FPGA_IRQ_BASE + 10) -#define IRQ_SMBUS (HL_FPGA_IRQ_BASE + 11) -#define IRQ_TP (HL_FPGA_IRQ_BASE + 12) -#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13) -#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14) -#define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) -#define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) - -unsigned char *highlander_plat_irq_setup(void); - -#endif /* __ASM_SH_RENESAS_R7780RP */ diff --git a/include/asm-sh/resource.h b/include/asm-sh/resource.h deleted file mode 100644 index 9c2499a..0000000 --- a/include/asm-sh/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_RESOURCE_H -#define __ASM_SH_RESOURCE_H - -#include - -#endif /* __ASM_SH_RESOURCE_H */ diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h deleted file mode 100644 index ec45ba8..0000000 --- a/include/asm-sh/rtc.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASM_RTC_H -#define _ASM_RTC_H - -extern void (*board_time_init)(void); -extern void (*rtc_sh_get_time)(struct timespec *); -extern int (*rtc_sh_set_time)(const time_t); - -#define RTC_CAP_4_DIGIT_YEAR (1 << 0) - -struct sh_rtc_platform_info { - unsigned long capabilities; -}; - -#include - -#endif /* _ASM_RTC_H */ diff --git a/include/asm-sh/rts7751r2d.h b/include/asm-sh/rts7751r2d.h deleted file mode 100644 index 0a80015..0000000 --- a/include/asm-sh/rts7751r2d.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef __ASM_SH_RENESAS_RTS7751R2D_H -#define __ASM_SH_RENESAS_RTS7751R2D_H - -/* - * linux/include/asm-sh/renesas_rts7751r2d.h - * - * Copyright (C) 2000 Atom Create Engineering Co., Ltd. - * - * Renesas Technology Sales RTS7751R2D support - */ - -/* Board specific addresses. */ - -#define PA_BCR 0xa4000000 /* FPGA */ -#define PA_IRLMON 0xa4000002 /* Interrupt Status control */ -#define PA_CFCTL 0xa4000004 /* CF Timing control */ -#define PA_CFPOW 0xa4000006 /* CF Power control */ -#define PA_DISPCTL 0xa4000008 /* Display Timing control */ -#define PA_SDMPOW 0xa400000a /* SD Power control */ -#define PA_RTCCE 0xa400000c /* RTC(9701) Enable control */ -#define PA_PCICD 0xa400000e /* PCI Extention detect control */ -#define PA_VOYAGERRTS 0xa4000020 /* VOYAGER Reset control */ - -#define PA_R2D1_AXRST 0xa4000022 /* AX_LAN Reset control */ -#define PA_R2D1_CFRST 0xa4000024 /* CF Reset control */ -#define PA_R2D1_ADMRTS 0xa4000026 /* SD Reset control */ -#define PA_R2D1_EXTRST 0xa4000028 /* Extention Reset control */ -#define PA_R2D1_CFCDINTCLR 0xa400002a /* CF Insert Interrupt clear */ - -#define PA_R2DPLUS_CFRST 0xa4000022 /* CF Reset control */ -#define PA_R2DPLUS_ADMRTS 0xa4000024 /* SD Reset control */ -#define PA_R2DPLUS_EXTRST 0xa4000026 /* Extention Reset control */ -#define PA_R2DPLUS_CFCDINTCLR 0xa4000028 /* CF Insert Interrupt clear */ -#define PA_R2DPLUS_KEYCTLCLR 0xa400002a /* Key Interrupt clear */ - -#define PA_POWOFF 0xa4000030 /* Board Power OFF control */ -#define PA_VERREG 0xa4000032 /* FPGA Version Register */ -#define PA_INPORT 0xa4000034 /* KEY Input Port control */ -#define PA_OUTPORT 0xa4000036 /* LED control */ -#define PA_BVERREG 0xa4000038 /* Board Revision Register */ - -#define PA_AX88796L 0xaa000400 /* AX88796L Area */ -#define PA_VOYAGER 0xab000000 /* VOYAGER GX Area */ -#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */ -#define AX88796L_IO_BASE 0x1000 /* AX88796L IO Base Address */ - -#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ - -#define R2D_FPGA_IRQ_BASE 100 - -#define IRQ_VOYAGER (R2D_FPGA_IRQ_BASE + 0) -#define IRQ_EXT (R2D_FPGA_IRQ_BASE + 1) -#define IRQ_TP (R2D_FPGA_IRQ_BASE + 2) -#define IRQ_RTC_T (R2D_FPGA_IRQ_BASE + 3) -#define IRQ_RTC_A (R2D_FPGA_IRQ_BASE + 4) -#define IRQ_SDCARD (R2D_FPGA_IRQ_BASE + 5) -#define IRQ_CF_CD (R2D_FPGA_IRQ_BASE + 6) -#define IRQ_CF_IDE (R2D_FPGA_IRQ_BASE + 7) -#define IRQ_AX88796 (R2D_FPGA_IRQ_BASE + 8) -#define IRQ_KEY (R2D_FPGA_IRQ_BASE + 9) -#define IRQ_PCI_INTA (R2D_FPGA_IRQ_BASE + 10) -#define IRQ_PCI_INTB (R2D_FPGA_IRQ_BASE + 11) -#define IRQ_PCI_INTC (R2D_FPGA_IRQ_BASE + 12) -#define IRQ_PCI_INTD (R2D_FPGA_IRQ_BASE + 13) - -/* arch/sh/boards/renesas/rts7751r2d/irq.c */ -void init_rts7751r2d_IRQ(void); -int rts7751r2d_irq_demux(int); - -#endif /* __ASM_SH_RENESAS_RTS7751R2D */ diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h deleted file mode 100644 index 1987f3e..0000000 --- a/include/asm-sh/rwsem.h +++ /dev/null @@ -1,188 +0,0 @@ -/* - * include/asm-sh/rwsem.h: R/W semaphores for SH using the stuff - * in lib/rwsem.c. - */ - -#ifndef _ASM_SH_RWSEM_H -#define _ASM_SH_RWSEM_H - -#ifndef _LINUX_RWSEM_H -#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" -#endif - -#ifdef __KERNEL__ -#include -#include -#include -#include - -/* - * the semaphore definition - */ -struct rw_semaphore { - long count; -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ - LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ -do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ -} while (0) - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} - -/* - * lock for reading - */ -static inline void __down_read(struct rw_semaphore *sem) -{ - if (atomic_inc_return((atomic_t *)(&sem->count)) > 0) - smp_wmb(); - else - rwsem_down_read_failed(sem); -} - -static inline int __down_read_trylock(struct rw_semaphore *sem) -{ - int tmp; - - while ((tmp = sem->count) >= 0) { - if (tmp == cmpxchg(&sem->count, tmp, - tmp + RWSEM_ACTIVE_READ_BIAS)) { - smp_wmb(); - return 1; - } - } - return 0; -} - -/* - * lock for writing - */ -static inline void __down_write(struct rw_semaphore *sem) -{ - int tmp; - - tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)); - if (tmp == RWSEM_ACTIVE_WRITE_BIAS) - smp_wmb(); - else - rwsem_down_write_failed(sem); -} - -static inline int __down_write_trylock(struct rw_semaphore *sem) -{ - int tmp; - - tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, - RWSEM_ACTIVE_WRITE_BIAS); - smp_wmb(); - return tmp == RWSEM_UNLOCKED_VALUE; -} - -/* - * unlock after reading - */ -static inline void __up_read(struct rw_semaphore *sem) -{ - int tmp; - - smp_wmb(); - tmp = atomic_dec_return((atomic_t *)(&sem->count)); - if (tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * unlock after writing - */ -static inline void __up_write(struct rw_semaphore *sem) -{ - smp_wmb(); - if (atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)) < 0) - rwsem_wake(sem); -} - -/* - * implement atomic add functionality - */ -static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -{ - atomic_add(delta, (atomic_t *)(&sem->count)); -} - -/* - * downgrade write lock to read lock - */ -static inline void __downgrade_write(struct rw_semaphore *sem) -{ - int tmp; - - smp_wmb(); - tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); - if (tmp < 0) - rwsem_downgrade_wake(sem); -} - -static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) -{ - __down_write(sem); -} - -/* - * implement exchange and add functionality - */ -static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -{ - smp_mb(); - return atomic_add_return(delta, (atomic_t *)(&sem->count)); -} - -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_SH_RWSEM_H */ diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h deleted file mode 100644 index 2084d03..0000000 --- a/include/asm-sh/scatterlist.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_SH_SCATTERLIST_H -#define __ASM_SH_SCATTERLIST_H - -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset;/* for highmem, page offset */ - dma_addr_t dma_address; - unsigned int length; -}; - -#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK - -/* These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#endif /* !(__ASM_SH_SCATTERLIST_H) */ diff --git a/include/asm-sh/sdk7780.h b/include/asm-sh/sdk7780.h deleted file mode 100644 index 697dc86..0000000 --- a/include/asm-sh/sdk7780.h +++ /dev/null @@ -1,81 +0,0 @@ -#ifndef __ASM_SH_RENESAS_SDK7780_H -#define __ASM_SH_RENESAS_SDK7780_H - -/* - * linux/include/asm-sh/sdk7780.h - * - * Renesas Solutions SH7780 SDK Support - * Copyright (C) 2008 Nicholas Beck - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include - -/* Box specific addresses. */ -#define SE_AREA0_WIDTH 4 /* Area0: 32bit */ -#define PA_ROM 0xa0000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0xa0800000 /* Flash-ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */ -#define PA_EXT1 0xa4000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ -#define PA_SDRAM_SIZE 0x08000000 - -#define PA_EXT4 0xb0000000 -#define PA_EXT4_SIZE 0x04000000 -#define PA_EXT_USER PA_EXT4 /* User Expansion Space */ - -#define PA_PERIPHERAL PA_AREA5_IO - -/* SRAM/Reserved */ -#define PA_RESERVED (PA_PERIPHERAL + 0) -/* FPGA base address */ -#define PA_FPGA (PA_PERIPHERAL + 0x01000000) -/* SMC LAN91C111 */ -#define PA_LAN (PA_PERIPHERAL + 0x01800000) - - -#define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */ -#define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */ -#define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */ -#define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */ -#define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */ -#define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */ -#define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */ -#define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */ -#define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */ -#define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */ -#define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */ -#define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */ -#define PA_LED FPGA_SLEDR -#define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */ -#define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */ -#define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */ -#define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */ -#define FPGA_EASR (PA_FPGA + 0x110) /* External area select */ -#define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */ -#define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */ -#define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */ -#define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */ -#define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */ -#define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */ -#define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */ - - -#define SDK7780_NR_IRL 15 -/* IDE/ATA interrupt */ -#define IRQ_CFCARD 14 -/* SMC interrupt */ -#define IRQ_ETHERNET 6 - - -/* arch/sh/boards/renesas/sdk7780/irq.c */ -void init_sdk7780_IRQ(void); - -#define __IO_PREFIX sdk7780 -#include - -#endif /* __ASM_SH_RENESAS_SDK7780_H */ diff --git a/include/asm-sh/se.h b/include/asm-sh/se.h deleted file mode 100644 index eb23000..0000000 --- a/include/asm-sh/se.h +++ /dev/null @@ -1,99 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE_H -#define __ASM_SH_HITACHI_SE_H - -/* - * linux/include/asm-sh/hitachi_se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_83902 0xb0000000 /* DP83902A */ -#define PA_83902_IF 0xb0040000 /* DP83902A remote io port */ -#define PA_83902_RST 0xb0080000 /* DP83902A reset port */ - -#define PA_SUPERIO 0xb0400000 /* SMC37C935A super io chip */ -#define PA_DIPSW0 0xb0800000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb0800002 /* Dip switch 7,8 */ -#define PA_LED 0xb0c00000 /* LED */ -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define PA_BCR 0xb0e00000 -#else -#define PA_BCR 0xb1400000 /* FPGA */ -#endif - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#if defined(CONFIG_CPU_SUBTYPE_SH7705) -#define IRQ_STNIC 12 -#define IRQ_CFCARD 14 -#else -#define IRQ_STNIC 10 -#define IRQ_CFCARD 7 -#endif - -/* SH Ether support (SH7710/SH7712) */ -/* Base address */ -#define SH_ETH0_BASE 0xA7000000 -#define SH_ETH1_BASE 0xA7000400 -/* PHY ID */ -#if defined(CONFIG_CPU_SUBTYPE_SH7710) -# define PHY_ID 0x00 -#elif defined(CONFIG_CPU_SUBTYPE_SH7712) -# define PHY_ID 0x01 -#endif -/* Ether IRQ */ -#define SH_ETH0_IRQ 80 -#define SH_ETH1_IRQ 81 -#define SH_TSU_IRQ 82 - -void init_se_IRQ(void); - -#define __IO_PREFIX se -#include - -#endif /* __ASM_SH_HITACHI_SE_H */ diff --git a/include/asm-sh/se7206.h b/include/asm-sh/se7206.h deleted file mode 100644 index 698eb80..0000000 --- a/include/asm-sh/se7206.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_SH_SE7206_H -#define __ASM_SH_SE7206_H - -#define PA_SMSC 0x30000000 -#define PA_MRSHPC 0x34000000 -#define PA_LED 0x31400000 - -void init_se7206_IRQ(void); - -#define __IO_PREFIX se7206 -#include - -#endif /* __ASM_SH_SE7206_H */ diff --git a/include/asm-sh/se7343.h b/include/asm-sh/se7343.h deleted file mode 100644 index 9845846..0000000 --- a/include/asm-sh/se7343.h +++ /dev/null @@ -1,149 +0,0 @@ -#ifndef __ASM_SH_HITACHI_SE7343_H -#define __ASM_SH_HITACHI_SE7343_H - -/* - * include/asm-sh/se/se7343.h - * - * Copyright (C) 2003 Takashi Kusuda - * - * SH-Mobile SolutionEngine 7343 support - */ - -/* Box specific addresses. */ - -/* Area 0 */ -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte(Actually 2MB) */ -#define PA_FROM 0x00400000 /* Flash ROM */ -#define PA_FROM_SIZE 0x00400000 /* Flash size 4M byte */ -#define PA_SRAM 0x00800000 /* SRAM */ -#define PA_FROM_SIZE 0x00400000 /* SRAM size 4M byte */ -/* Area 1 */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -/* Area 2 */ -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -/* Area 3 */ -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 -/* Area 4 */ -#define PA_PCIC 0x10000000 /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC 0xb03fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb0400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb0500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb0600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) -#define PA_LED 0xb0C00000 /* LED */ -#define LED_SHIFT 0 -#define PA_DIPSW 0xb0900000 /* Dip switch 31 */ -#define PA_CPLD_MODESET 0xb1400004 /* CPLD Mode set register */ -#define PA_CPLD_ST 0xb1400008 /* CPLD Interrupt status register */ -#define PA_CPLD_IMSK 0xb140000a /* CPLD Interrupt mask register */ -/* Area 5 */ -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -/* Area 6 */ -#define PA_LCD1 0xb8000000 -#define PA_LCD2 0xb8800000 - -#define PORT_PACR 0xA4050100 -#define PORT_PBCR 0xA4050102 -#define PORT_PCCR 0xA4050104 -#define PORT_PDCR 0xA4050106 -#define PORT_PECR 0xA4050108 -#define PORT_PFCR 0xA405010A -#define PORT_PGCR 0xA405010C -#define PORT_PHCR 0xA405010E -#define PORT_PJCR 0xA4050110 -#define PORT_PKCR 0xA4050112 -#define PORT_PLCR 0xA4050114 -#define PORT_PMCR 0xA4050116 -#define PORT_PNCR 0xA4050118 -#define PORT_PQCR 0xA405011A -#define PORT_PRCR 0xA405011C -#define PORT_PSCR 0xA405011E -#define PORT_PTCR 0xA4050140 -#define PORT_PUCR 0xA4050142 -#define PORT_PVCR 0xA4050144 -#define PORT_PWCR 0xA4050146 -#define PORT_PYCR 0xA4050148 -#define PORT_PZCR 0xA405014A - -#define PORT_PSELA 0xA405014C -#define PORT_PSELB 0xA405014E -#define PORT_PSELC 0xA4050150 -#define PORT_PSELD 0xA4050152 -#define PORT_PSELE 0xA4050154 - -#define PORT_HIZCRA 0xA4050156 -#define PORT_HIZCRB 0xA4050158 -#define PORT_HIZCRC 0xA405015C - -#define PORT_DRVCR 0xA4050180 - -#define PORT_PADR 0xA4050120 -#define PORT_PBDR 0xA4050122 -#define PORT_PCDR 0xA4050124 -#define PORT_PDDR 0xA4050126 -#define PORT_PEDR 0xA4050128 -#define PORT_PFDR 0xA405012A -#define PORT_PGDR 0xA405012C -#define PORT_PHDR 0xA405012E -#define PORT_PJDR 0xA4050130 -#define PORT_PKDR 0xA4050132 -#define PORT_PLDR 0xA4050134 -#define PORT_PMDR 0xA4050136 -#define PORT_PNDR 0xA4050138 -#define PORT_PQDR 0xA405013A -#define PORT_PRDR 0xA405013C -#define PORT_PTDR 0xA4050160 -#define PORT_PUDR 0xA4050162 -#define PORT_PVDR 0xA4050164 -#define PORT_PWDR 0xA4050166 -#define PORT_PYDR 0xA4050168 - -#define FPGA_IN 0xb1400000 -#define FPGA_OUT 0xb1400002 - -#define __IO_PREFIX sh7343se -#include - -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 -#define IRQ4_IRQ 36 -#define IRQ5_IRQ 37 - -#define SE7343_FPGA_IRQ_MRSHPC0 0 -#define SE7343_FPGA_IRQ_MRSHPC1 1 -#define SE7343_FPGA_IRQ_MRSHPC2 2 -#define SE7343_FPGA_IRQ_MRSHPC3 3 -#define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ -#define SE7343_FPGA_IRQ_USB 8 - -#define SE7343_FPGA_IRQ_NR 11 -#define SE7343_FPGA_IRQ_BASE 120 - -#define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) -#define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2) -#define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1) -#define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) -#define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) -#define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) - -/* arch/sh/boards/se/7343/irq.c */ -void init_7343se_IRQ(void); - -#endif /* __ASM_SH_HITACHI_SE7343_H */ diff --git a/include/asm-sh/se7721.h b/include/asm-sh/se7721.h deleted file mode 100644 index b957f60..0000000 --- a/include/asm-sh/se7721.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (C) 2008 Renesas Solutions Corp. - * - * Hitachi UL SolutionEngine 7721 Support. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ - -#ifndef __ASM_SH_SE7721_H -#define __ASM_SH_SE7721_H -#include - -/* Box specific addresses. */ -#define SE_AREA0_WIDTH 2 /* Area0: 32bit */ -#define PA_ROM 0xa0000000 /* EPROM */ -#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */ -#define PA_FROM 0xa1000000 /* Flash-ROM */ -#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ -#define PA_EXT1 0xa4000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_SDRAM 0xaC000000 /* SDRAM(Area3) 64MB */ -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0xb0000000 -#define PA_EXT4_SIZE 0x04000000 - -#define PA_PERIPHERAL 0xB8000000 - -#define PA_PCIC PA_PERIPHERAL -#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) -#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) -#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) -#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define PA_LED 0xB6800000 /* 8bit LED */ -#define PA_FPGA 0xB7000000 /* FPGA base address */ - -#define MRSHPC_IRQ0 10 - -#define FPGA_ILSR1 (PA_FPGA + 0x02) -#define FPGA_ILSR2 (PA_FPGA + 0x03) -#define FPGA_ILSR3 (PA_FPGA + 0x04) -#define FPGA_ILSR4 (PA_FPGA + 0x05) -#define FPGA_ILSR5 (PA_FPGA + 0x06) -#define FPGA_ILSR6 (PA_FPGA + 0x07) -#define FPGA_ILSR7 (PA_FPGA + 0x08) -#define FPGA_ILSR8 (PA_FPGA + 0x09) - -void init_se7721_IRQ(void); - -#define __IO_PREFIX se7721 -#include - -#endif /* __ASM_SH_SE7721_H */ diff --git a/include/asm-sh/se7722.h b/include/asm-sh/se7722.h deleted file mode 100644 index e971d9a..0000000 --- a/include/asm-sh/se7722.h +++ /dev/null @@ -1,112 +0,0 @@ -#ifndef __ASM_SH_SE7722_H -#define __ASM_SH_SE7722_H - -/* - * linux/include/asm-sh/se7722.h - * - * Copyright (C) 2007 Nobuhiro Iwamatsu - * - * Hitachi UL SolutionEngine 7722 Support. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ -#include - -/* Box specific addresses. */ -#define SE_AREA0_WIDTH 4 /* Area0: 32bit */ -#define PA_ROM 0xa0000000 /* EPROM */ -#define PA_ROM_SIZE 0x00200000 /* EPROM size 2M byte */ -#define PA_FROM 0xa1000000 /* Flash-ROM */ -#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ -#define PA_EXT1 0xa4000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_SDRAM 0xaC000000 /* DDR-SDRAM(Area3) 64MB */ -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0xb0000000 -#define PA_EXT4_SIZE 0x04000000 - -#define PA_PERIPHERAL 0xB0000000 - -#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */ -#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO (PA_PERIPHERAL + 0x00600000) /* MR-SHPC-01 I/O window base */ -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */ -#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */ - -#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ -/* GPIO */ -#define FPGA_IN 0xb1840000UL -#define FPGA_OUT 0xb1840004UL - -#define PORT_PECR 0xA4050108UL -#define PORT_PJCR 0xA4050110UL -#define PORT_PSELD 0xA4050154UL -#define PORT_PSELB 0xA4050150UL - -#define PORT_PSELC 0xA4050152UL -#define PORT_PKCR 0xA4050112UL -#define PORT_PHCR 0xA405010EUL -#define PORT_PLCR 0xA4050114UL -#define PORT_PMCR 0xA4050116UL -#define PORT_PRCR 0xA405011CUL -#define PORT_PXCR 0xA4050148UL -#define PORT_PSELA 0xA405014EUL -#define PORT_PYCR 0xA405014AUL -#define PORT_PZCR 0xA405014CUL -#define PORT_HIZCRA 0xA4050158UL -#define PORT_HIZCRC 0xA405015CUL - -/* IRQ */ -#define IRQ0_IRQ 32 -#define IRQ1_IRQ 33 - -#define IRQ01_MODE 0xb1800000 -#define IRQ01_STS 0xb1800004 -#define IRQ01_MASK 0xb1800008 - -/* Bits in IRQ01_* registers */ - -#define SE7722_FPGA_IRQ_USB 0 /* IRQ0 */ -#define SE7722_FPGA_IRQ_SMC 1 /* IRQ0 */ -#define SE7722_FPGA_IRQ_MRSHPC0 2 /* IRQ1 */ -#define SE7722_FPGA_IRQ_MRSHPC1 3 /* IRQ1 */ -#define SE7722_FPGA_IRQ_MRSHPC2 4 /* IRQ1 */ -#define SE7722_FPGA_IRQ_MRSHPC3 5 /* IRQ1 */ - -#define SE7722_FPGA_IRQ_NR 6 -#define SE7722_FPGA_IRQ_BASE 110 - -#define MRSHPC_IRQ3 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC3) -#define MRSHPC_IRQ2 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC2) -#define MRSHPC_IRQ1 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC1) -#define MRSHPC_IRQ0 (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_MRSHPC0) -#define SMC_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_SMC) -#define USB_IRQ (SE7722_FPGA_IRQ_BASE + SE7722_FPGA_IRQ_USB) - -/* arch/sh/boards/se/7722/irq.c */ -void init_se7722_IRQ(void); - -#define __IO_PREFIX se7722 -#include - -#endif /* __ASM_SH_SE7722_H */ diff --git a/include/asm-sh/se7751.h b/include/asm-sh/se7751.h deleted file mode 100644 index b36792a..0000000 --- a/include/asm-sh/se7751.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef __ASM_SH_HITACHI_7751SE_H -#define __ASM_SH_HITACHI_7751SE_H - -/* - * linux/include/asm-sh/hitachi_7751se.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SolutionEngine support - - * Modified for 7751 Solution Engine by - * Ian da Silva and Jeremy Siegel, 2001. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -void init_7751se_IRQ(void); - -#define __IO_PREFIX sh7751se -#include - -#endif /* __ASM_SH_HITACHI_7751SE_H */ diff --git a/include/asm-sh/se7780.h b/include/asm-sh/se7780.h deleted file mode 100644 index 40e9b41..0000000 --- a/include/asm-sh/se7780.h +++ /dev/null @@ -1,108 +0,0 @@ -#ifndef __ASM_SH_SE7780_H -#define __ASM_SH_SE7780_H - -/* - * linux/include/asm-sh/se7780.h - * - * Copyright (C) 2006,2007 Nobuhiro Iwamatsu - * - * Hitachi UL SolutionEngine 7780 Support. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include - -/* Box specific addresses. */ -#define SE_AREA0_WIDTH 4 /* Area0: 32bit */ -#define PA_ROM 0xa0000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0xa1000000 /* Flash-ROM */ -#define PA_FROM_SIZE 0x01000000 /* Flash-ROM size 16M byte */ -#define PA_EXT1 0xa4000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_SM501 PA_EXT1 /* Graphic IC (SM501) */ -#define PA_SM501_SIZE PA_EXT1_SIZE /* Graphic IC (SM501) */ -#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */ -#define PA_SDRAM_SIZE 0x08000000 - -#define PA_EXT4 0xb0000000 -#define PA_EXT4_SIZE 0x04000000 -#define PA_EXT_FLASH PA_EXT4 /* Expansion Flash-ROM */ - -#define PA_PERIPHERAL PA_AREA6_IO /* SW6-6=ON */ - -#define PA_LAN (PA_PERIPHERAL + 0) /* SMC LAN91C111 */ -#define PA_LED_DISP (PA_PERIPHERAL + 0x02000000) /* 8words LED Display */ -#define DISP_CHAR_RAM (7 << 3) -#define DISP_SEL0_ADDR (DISP_CHAR_RAM + 0) -#define DISP_SEL1_ADDR (DISP_CHAR_RAM + 1) -#define DISP_SEL2_ADDR (DISP_CHAR_RAM + 2) -#define DISP_SEL3_ADDR (DISP_CHAR_RAM + 3) -#define DISP_SEL4_ADDR (DISP_CHAR_RAM + 4) -#define DISP_SEL5_ADDR (DISP_CHAR_RAM + 5) -#define DISP_SEL6_ADDR (DISP_CHAR_RAM + 6) -#define DISP_SEL7_ADDR (DISP_CHAR_RAM + 7) - -#define DISP_UDC_RAM (5 << 3) -#define PA_FPGA (PA_PERIPHERAL + 0x03000000) /* FPGA base address */ - -/* FPGA register address and bit */ -#define FPGA_SFTRST (PA_FPGA + 0) /* Soft reset register */ -#define FPGA_INTMSK1 (PA_FPGA + 2) /* Interrupt Mask register 1 */ -#define FPGA_INTMSK2 (PA_FPGA + 4) /* Interrupt Mask register 2 */ -#define FPGA_INTSEL1 (PA_FPGA + 6) /* Interrupt select register 1 */ -#define FPGA_INTSEL2 (PA_FPGA + 8) /* Interrupt select register 2 */ -#define FPGA_INTSEL3 (PA_FPGA + 10) /* Interrupt select register 3 */ -#define FPGA_PCI_INTSEL1 (PA_FPGA + 12) /* PCI Interrupt select register 1 */ -#define FPGA_PCI_INTSEL2 (PA_FPGA + 14) /* PCI Interrupt select register 2 */ -#define FPGA_INTSET (PA_FPGA + 16) /* IRQ/IRL select register */ -#define FPGA_INTSTS1 (PA_FPGA + 18) /* Interrupt status register 1 */ -#define FPGA_INTSTS2 (PA_FPGA + 20) /* Interrupt status register 2 */ -#define FPGA_REQSEL (PA_FPGA + 22) /* REQ/GNT select register */ -#define FPGA_DBG_LED (PA_FPGA + 32) /* Debug LED(D-LED[8:1] */ -#define PA_LED FPGA_DBG_LED -#define FPGA_IVDRID (PA_FPGA + 36) /* iVDR ID Register */ -#define FPGA_IVDRPW (PA_FPGA + 38) /* iVDR Power ON Register */ -#define FPGA_MMCID (PA_FPGA + 40) /* MMC ID Register */ - -/* FPGA INTSEL position */ -/* INTSEL1 */ -#define IRQPOS_SMC91CX (0 * 4) -#define IRQPOS_SM501 (1 * 4) -/* INTSEL2 */ -#define IRQPOS_EXTINT1 (0 * 4) -#define IRQPOS_EXTINT2 (1 * 4) -#define IRQPOS_EXTINT3 (2 * 4) -#define IRQPOS_EXTINT4 (3 * 4) -/* INTSEL3 */ -#define IRQPOS_PCCPW (0 * 4) - -/* IDE interrupt */ -#define IRQ_IDE0 67 /* iVDR */ - -/* SMC interrupt */ -#define SMC_IRQ 8 - -/* SM501 interrupt */ -#define SM501_IRQ 0 - -/* interrupt pin */ -#define IRQPIN_EXTINT1 0 /* IRQ0 pin */ -#define IRQPIN_EXTINT2 1 /* IRQ1 pin */ -#define IRQPIN_EXTINT3 2 /* IRQ2 pin */ -#define IRQPIN_SMC91CX 3 /* IRQ3 pin */ -#define IRQPIN_EXTINT4 4 /* IRQ4 pin */ -#define IRQPIN_PCC0 5 /* IRQ5 pin */ -#define IRQPIN_PCC2 6 /* IRQ6 pin */ -#define IRQPIN_SM501 7 /* IRQ7 pin */ -#define IRQPIN_PCCPW 7 /* IRQ7 pin */ - -/* arch/sh/boards/se/7780/irq.c */ -void init_se7780_IRQ(void); - -#define __IO_PREFIX se7780 -#include - -#endif /* __ASM_SH_SE7780_H */ diff --git a/include/asm-sh/sections.h b/include/asm-sh/sections.h deleted file mode 100644 index 8f8f4ad..0000000 --- a/include/asm-sh/sections.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_SH_SECTIONS_H -#define __ASM_SH_SECTIONS_H - -#include - -extern long __machvec_start, __machvec_end; -extern char __uncached_start, __uncached_end; -extern char _ebss[]; - -#endif /* __ASM_SH_SECTIONS_H */ - diff --git a/include/asm-sh/segment.h b/include/asm-sh/segment.h deleted file mode 100644 index 5e2725f..0000000 --- a/include/asm-sh/segment.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ASM_SH_SEGMENT_H -#define __ASM_SH_SEGMENT_H - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long seg; -} mm_segment_t; - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons, these macros are grossly misnamed. - */ -#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) -#ifdef CONFIG_MMU -#define USER_DS MAKE_MM_SEG(PAGE_OFFSET) -#else -#define USER_DS KERNEL_DS -#endif - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#define get_ds() (KERNEL_DS) - -#define get_fs() (current_thread_info()->addr_limit) -#define set_fs(x) (current_thread_info()->addr_limit = (x)) - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_SEGMENT_H */ diff --git a/include/asm-sh/sembuf.h b/include/asm-sh/sembuf.h deleted file mode 100644 index d79f3bd..0000000 --- a/include/asm-sh/sembuf.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __ASM_SH_SEMBUF_H -#define __ASM_SH_SEMBUF_H - -/* - * The semid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ - unsigned long __unused1; - __kernel_time_t sem_ctime; /* last change time */ - unsigned long __unused2; - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_SH_SEMBUF_H */ diff --git a/include/asm-sh/serial.h b/include/asm-sh/serial.h deleted file mode 100644 index 21f6d33..0000000 --- a/include/asm-sh/serial.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * include/asm-sh/serial.h - * - * Configuration details for 8250, 16450, 16550, etc. serial ports - */ - -#ifndef _ASM_SERIAL_H -#define _ASM_SERIAL_H - -#include - -/* - * This assumes you have a 1.8432 MHz clock for your UART. - * - * It'd be nice if someone built a serial card with a 24.576 MHz - * clock, since the 16550A is capable of handling a top speed of 1.5 - * megabits/second; but this requires the faster clock. - */ -#define BASE_BAUD ( 1843200 / 16 ) - -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) - -#ifdef CONFIG_HD64465 -#include - -#define SERIAL_PORT_DFNS \ - /* UART CLK PORT IRQ FLAGS */ \ - { 0, BASE_BAUD, 0x3F8, HD64465_IRQ_UART, STD_COM_FLAGS } /* ttyS0 */ - -#else - -#define SERIAL_PORT_DFNS - -#endif - -#endif /* _ASM_SERIAL_H */ diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h deleted file mode 100644 index 55a2bd3..0000000 --- a/include/asm-sh/setup.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _SH_SETUP_H -#define _SH_SETUP_H - -#define COMMAND_LINE_SIZE 256 - -#ifdef __KERNEL__ - -/* - * This is set up by the setup-routine at boot-time - */ -#define PARAM ((unsigned char *)empty_zero_page) - -#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000)) -#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004)) -#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008)) -#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c)) -#define INITRD_START (*(unsigned long *) (PARAM+0x010)) -#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014)) -/* ... */ -#define COMMAND_LINE ((char *) (PARAM+0x100)) - -int setup_early_printk(char *); -void sh_mv_setup(void); - -#endif /* __KERNEL__ */ - -#endif /* _SH_SETUP_H */ diff --git a/include/asm-sh/sfp-machine.h b/include/asm-sh/sfp-machine.h deleted file mode 100644 index d3c5484..0000000 --- a/include/asm-sh/sfp-machine.h +++ /dev/null @@ -1,84 +0,0 @@ -/* Machine-dependent software floating-point definitions. - SuperH kernel version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz), - David S. Miller (davem@redhat.com) and - Peter Maydell (pmaydell@chiark.greenend.org.uk). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* - * If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - else \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -//#define FP_ROUNDMODE FPSCR_RM -#define FP_DENORM_ZERO 1/*FPSCR_DN*/ - -/* Exception flags. */ -#define FP_EX_INVALID (1<<4) -#define FP_EX_DIVZERO (1<<3) -#define FP_EX_OVERFLOW (1<<2) -#define FP_EX_UNDERFLOW (1<<1) -#define FP_EX_INEXACT (1<<0) - -#endif - diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h deleted file mode 100644 index c39c785..0000000 --- a/include/asm-sh/sh03/io.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-sh/sh03/io.h - * - * Copyright 2004 Interface Co.,Ltd. Saito.K - * - * IO functions for an Interface CTP/PCI-SH03 - */ - -#ifndef _ASM_SH_IO_SH03_H -#define _ASM_SH_IO_SH03_H - -#include - -#define IRL0_IRQ 2 -#define IRL0_PRIORITY 13 -#define IRL1_IRQ 5 -#define IRL1_PRIORITY 10 -#define IRL2_IRQ 8 -#define IRL2_PRIORITY 7 -#define IRL3_IRQ 11 -#define IRL3_PRIORITY 4 - -void heartbeat_sh03(void); - -#endif /* _ASM_SH_IO_SH03_H */ diff --git a/include/asm-sh/sh03/sh03.h b/include/asm-sh/sh03/sh03.h deleted file mode 100644 index 19c40b8..0000000 --- a/include/asm-sh/sh03/sh03.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef __ASM_SH_SH03_H -#define __ASM_SH_SH03_H - -/* - * linux/include/asm-sh/sh03/sh03.h - * - * Copyright (C) 2004 Interface Co., Ltd. Saito.K - * - * Interface CTP/PCI-SH03 support - */ - -#define PA_PCI_IO (0xbe240000) /* PCI I/O space */ -#define PA_PCI_MEM (0xbd000000) /* PCI MEM space */ - -#define PCIPAR (0xa4000cf8) /* PCI Config address */ -#define PCIPDR (0xa4000cfc) /* PCI Config data */ - -#endif /* __ASM_SH_SH03_H */ diff --git a/include/asm-sh/sh7760fb.h b/include/asm-sh/sh7760fb.h deleted file mode 100644 index 8767f61..0000000 --- a/include/asm-sh/sh7760fb.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * sh7760fb.h -- platform data for SH7760/SH7763 LCDC framebuffer driver. - * - * (c) 2006-2008 MSC Vertriebsges.m.b.H., - * Manuel Lauss - * (c) 2008 Nobuhiro Iwamatsu - */ - -#ifndef _ASM_SH_SH7760FB_H -#define _ASM_SH_SH7760FB_H - -/* - * some bits of the colormap registers should be written as zero. - * create a mask for that. - */ -#define SH7760FB_PALETTE_MASK 0x00f8fcf8 - -/* The LCDC dma engine always sets bits 27-26 to 1: this is Area3 */ -#define SH7760FB_DMA_MASK 0x0C000000 - -/* palette */ -#define LDPR(x) (((x) << 2)) - -/* framebuffer registers and bits */ -#define LDICKR 0x400 -#define LDMTR 0x402 -/* see sh7760fb.h for LDMTR bits */ -#define LDDFR 0x404 -#define LDDFR_PABD (1 << 8) -#define LDDFR_COLOR_MASK 0x7F -#define LDSMR 0x406 -#define LDSMR_ROT (1 << 13) -#define LDSARU 0x408 -#define LDSARL 0x40c -#define LDLAOR 0x410 -#define LDPALCR 0x412 -#define LDPALCR_PALS (1 << 4) -#define LDPALCR_PALEN (1 << 0) -#define LDHCNR 0x414 -#define LDHSYNR 0x416 -#define LDVDLNR 0x418 -#define LDVTLNR 0x41a -#define LDVSYNR 0x41c -#define LDACLNR 0x41e -#define LDINTR 0x420 -#define LDPMMR 0x424 -#define LDPSPR 0x426 -#define LDCNTR 0x428 -#define LDCNTR_DON (1 << 0) -#define LDCNTR_DON2 (1 << 4) - -#ifdef CONFIG_CPU_SUBTYPE_SH7763 -# define LDLIRNR 0x440 -/* LDINTR bit */ -# define LDINTR_MINTEN (1 << 15) -# define LDINTR_FINTEN (1 << 14) -# define LDINTR_VSINTEN (1 << 13) -# define LDINTR_VEINTEN (1 << 12) -# define LDINTR_MINTS (1 << 11) -# define LDINTR_FINTS (1 << 10) -# define LDINTR_VSINTS (1 << 9) -# define LDINTR_VEINTS (1 << 8) -# define VINT_START (LDINTR_VSINTEN) -# define VINT_CHECK (LDINTR_VSINTS) -#else -/* LDINTR bit */ -# define LDINTR_VINTSEL (1 << 12) -# define LDINTR_VINTE (1 << 8) -# define LDINTR_VINTS (1 << 0) -# define VINT_START (LDINTR_VINTSEL) -# define VINT_CHECK (LDINTR_VINTS) -#endif - -/* HSYNC polarity inversion */ -#define LDMTR_FLMPOL (1 << 15) - -/* VSYNC polarity inversion */ -#define LDMTR_CL1POL (1 << 14) - -/* DISPLAY-ENABLE polarity inversion */ -#define LDMTR_DISPEN_LOWACT (1 << 13) - -/* DISPLAY DATA BUS polarity inversion */ -#define LDMTR_DPOL_LOWACT (1 << 12) - -/* AC modulation signal enable */ -#define LDMTR_MCNT (1 << 10) - -/* Disable output of HSYNC during VSYNC period */ -#define LDMTR_CL1CNT (1 << 9) - -/* Disable output of VSYNC during VSYNC period */ -#define LDMTR_CL2CNT (1 << 8) - -/* Display types supported by the LCDC */ -#define LDMTR_STN_MONO_4 0x00 -#define LDMTR_STN_MONO_8 0x01 -#define LDMTR_STN_COLOR_4 0x08 -#define LDMTR_STN_COLOR_8 0x09 -#define LDMTR_STN_COLOR_12 0x0A -#define LDMTR_STN_COLOR_16 0x0B -#define LDMTR_DSTN_MONO_8 0x11 -#define LDMTR_DSTN_MONO_16 0x13 -#define LDMTR_DSTN_COLOR_8 0x19 -#define LDMTR_DSTN_COLOR_12 0x1A -#define LDMTR_DSTN_COLOR_16 0x1B -#define LDMTR_TFT_COLOR_16 0x2B - -/* framebuffer color layout */ -#define LDDFR_1BPP_MONO 0x00 -#define LDDFR_2BPP_MONO 0x01 -#define LDDFR_4BPP_MONO 0x02 -#define LDDFR_6BPP_MONO 0x04 -#define LDDFR_4BPP 0x0A -#define LDDFR_8BPP 0x0C -#define LDDFR_16BPP_RGB555 0x1D -#define LDDFR_16BPP_RGB565 0x2D - -/* LCDC Pixclock sources */ -#define LCDC_CLKSRC_BUSCLOCK 0 -#define LCDC_CLKSRC_PERIPHERAL 1 -#define LCDC_CLKSRC_EXTERNAL 2 - -#define LDICKR_CLKSRC(x) \ - (((x) & 3) << 12) - -/* LCDC pixclock input divider. Set to 1 at a minimum! */ -#define LDICKR_CLKDIV(x) \ - ((x) & 0x1f) - -struct sh7760fb_platdata { - - /* Set this member to a valid fb_videmode for the display you - * wish to use. The following members must be initialized: - * xres, yres, hsync_len, vsync_len, sync, - * {left,right,upper,lower}_margin. - * The driver uses the above members to calculate register values - * and memory requirements. Other members are ignored but may - * be used by other framebuffer layer components. - */ - struct fb_videomode *def_mode; - - /* LDMTR includes display type and signal polarity. The - * HSYNC/VSYNC polarities are derived from the fb_var_screeninfo - * data above; however the polarities of the following signals - * must be encoded in the ldmtr member: - * Display Enable signal (default high-active) DISPEN_LOWACT - * Display Data signals (default high-active) DPOL_LOWACT - * AC Modulation signal (default off) MCNT - * Hsync-During-Vsync suppression (default off) CL1CNT - * Vsync-during-vsync suppression (default off) CL2CNT - * NOTE: also set a display type! - * (one of LDMTR_{STN,DSTN,TFT}_{MONO,COLOR}_{4,8,12,16}) - */ - u16 ldmtr; - - /* LDDFR controls framebuffer image format (depth, organization) - * Use ONE of the LDDFR_?BPP_* macros! - */ - u16 lddfr; - - /* LDPMMR and LDPSPR control the timing of the power signals - * for the display. Please read the SH7760 Hardware Manual, - * Chapters 30.3.17, 30.3.18 and 30.4.6! - */ - u16 ldpmmr; - u16 ldpspr; - - /* LDACLNR contains the line numbers after which the AC modulation - * signal is to toggle. Set to ZERO for TFTs or displays which - * do not need it. (Chapter 30.3.15 in SH7760 Hardware Manual). - */ - u16 ldaclnr; - - /* LDICKR contains information on pixelclock source and config. - * Please use the LDICKR_CLKSRC() and LDICKR_CLKDIV() macros. - * minimal value for CLKDIV() must be 1!. - */ - u16 ldickr; - - /* set this member to 1 if you wish to use the LCDC's hardware - * rotation function. This is limited to displays <= 320x200 - * pixels resolution! - */ - int rotate; /* set to 1 to rotate 90 CCW */ - - /* set this to 1 to suppress vsync irq use. */ - int novsync; - - /* blanking hook for platform. Set this if your platform can do - * more than the LCDC in terms of blanking (e.g. disable clock - * generator / backlight power supply / etc. - */ - void (*blank) (int); -}; - -#endif /* _ASM_SH_SH7760FB_H */ diff --git a/include/asm-sh/sh7763rdp.h b/include/asm-sh/sh7763rdp.h deleted file mode 100644 index 8750cc8..0000000 --- a/include/asm-sh/sh7763rdp.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef __ASM_SH_SH7763RDP_H -#define __ASM_SH_SH7763RDP_H - -/* - * linux/include/asm-sh/sh7763drp.h - * - * Copyright (C) 2008 Renesas Solutions - * Copyright (C) 2008 Nobuhiro Iwamatsu - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - */ -#include - -/* clock control */ -#define MSTPCR1 0xFFC80038 - -/* PORT */ -#define PORT_PSEL0 0xFFEF0070 -#define PORT_PSEL1 0xFFEF0072 -#define PORT_PSEL2 0xFFEF0074 -#define PORT_PSEL3 0xFFEF0076 -#define PORT_PSEL4 0xFFEF0078 - -#define PORT_PACR 0xFFEF0000 -#define PORT_PCCR 0xFFEF0004 -#define PORT_PFCR 0xFFEF000A -#define PORT_PGCR 0xFFEF000C -#define PORT_PHCR 0xFFEF000E -#define PORT_PICR 0xFFEF0010 -#define PORT_PJCR 0xFFEF0012 -#define PORT_PKCR 0xFFEF0014 -#define PORT_PLCR 0xFFEF0016 -#define PORT_PMCR 0xFFEF0018 -#define PORT_PNCR 0xFFEF001A - -/* FPGA */ -#define CPLD_BOARD_ID_ERV_REG 0xB1000000 -#define CPLD_CPLD_CMD_REG 0xB1000006 - -/* - * USB SH7763RDP board can use Host only. - */ -#define USB_USBHSC 0xFFEC80f0 - -/* arch/sh/boards/renesas/sh7763rdp/irq.c */ -void init_sh7763rdp_IRQ(void); -int sh7763rdp_irq_demux(int irq); -#define __IO_PREFIX sh7763rdp -#include - -#endif /* __ASM_SH_SH7763RDP_H */ diff --git a/include/asm-sh/sh7785lcr.h b/include/asm-sh/sh7785lcr.h deleted file mode 100644 index 1ce27d5..0000000 --- a/include/asm-sh/sh7785lcr.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef __ASM_SH_RENESAS_SH7785LCR_H -#define __ASM_SH_RENESAS_SH7785LCR_H - -/* - * This board has 2 physical memory maps. - * It can be changed with DIP switch(S2-5). - * - * phys address | S2-5 = OFF | S2-5 = ON - * -----------------------------+---------------+--------------- - * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash - * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD - * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C - * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM - * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM - * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 - * 0x14000000 - 0x17ffffff(CS5) | I2C | USB - * 0x18000000 - 0x1bffffff(CS6) | reserved | SD - * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) - * - */ - -#define NOR_FLASH_ADDR 0x00000000 -#define NOR_FLASH_SIZE 0x04000000 - -#define PLD_BASE_ADDR 0x04000000 -#define PLD_PCICR (PLD_BASE_ADDR + 0x00) -#define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02) -#define PLD_LOCALCR (PLD_BASE_ADDR + 0x04) -#define PLD_POFCR (PLD_BASE_ADDR + 0x06) -#define PLD_LEDCR (PLD_BASE_ADDR + 0x08) -#define PLD_SWSR (PLD_BASE_ADDR + 0x0a) -#define PLD_VERSR (PLD_BASE_ADDR + 0x0c) -#define PLD_MMSR (PLD_BASE_ADDR + 0x0e) - -#define SM107_MEM_ADDR 0x10000000 -#define SM107_MEM_SIZE 0x00e00000 -#define SM107_REG_ADDR 0x13e00000 -#define SM107_REG_SIZE 0x00200000 - -#if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) -#define R8A66597_ADDR 0x14000000 /* USB */ -#define CG200_ADDR 0x18000000 /* SD */ -#define PCA9564_ADDR 0x06000000 /* I2C */ -#else -#define R8A66597_ADDR 0x08000000 -#define CG200_ADDR 0x0c000000 -#define PCA9564_ADDR 0x14000000 -#endif - -#define R8A66597_SIZE 0x00000100 -#define CG200_SIZE 0x00010000 -#define PCA9564_SIZE 0x00000100 - -#endif /* __ASM_SH_RENESAS_SH7785LCR_H */ - diff --git a/include/asm-sh/sh_bios.h b/include/asm-sh/sh_bios.h deleted file mode 100644 index 0ca2619..0000000 --- a/include/asm-sh/sh_bios.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef __ASM_SH_BIOS_H -#define __ASM_SH_BIOS_H - -/* - * Copyright (C) 2000 Greg Banks, Mitch Davis - * C API to interface to the standard LinuxSH BIOS - * usually from within the early stages of kernel boot. - */ - - -extern void sh_bios_console_write(const char *buf, unsigned int len); -extern void sh_bios_char_out(char ch); -extern int sh_bios_in_gdb_mode(void); -extern void sh_bios_gdb_detach(void); - -extern void sh_bios_get_node_addr(unsigned char *node_addr); -extern void sh_bios_shutdown(unsigned int how); - -#endif /* __ASM_SH_BIOS_H */ diff --git a/include/asm-sh/sh_keysc.h b/include/asm-sh/sh_keysc.h deleted file mode 100644 index b5a4dd5..0000000 --- a/include/asm-sh/sh_keysc.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_KEYSC_H__ -#define __ASM_KEYSC_H__ - -#define SH_KEYSC_MAXKEYS 30 - -struct sh_keysc_info { - enum { SH_KEYSC_MODE_1, SH_KEYSC_MODE_2, SH_KEYSC_MODE_3 } mode; - int scan_timing; /* 0 -> 7, see KYCR1, SCN[2:0] */ - int delay; - int keycodes[SH_KEYSC_MAXKEYS]; -}; - -#endif /* __ASM_KEYSC_H__ */ diff --git a/include/asm-sh/sh_mobile_lcdc.h b/include/asm-sh/sh_mobile_lcdc.h deleted file mode 100644 index 27677727..0000000 --- a/include/asm-sh/sh_mobile_lcdc.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef __ASM_SH_MOBILE_LCDC_H__ -#define __ASM_SH_MOBILE_LCDC_H__ - -#include - -enum { RGB8, /* 24bpp, 8:8:8 */ - RGB9, /* 18bpp, 9:9 */ - RGB12A, /* 24bpp, 12:12 */ - RGB12B, /* 12bpp */ - RGB16, /* 16bpp */ - RGB18, /* 18bpp */ - RGB24, /* 24bpp */ - SYS8A, /* 24bpp, 8:8:8 */ - SYS8B, /* 18bpp, 8:8:2 */ - SYS8C, /* 18bpp, 2:8:8 */ - SYS8D, /* 16bpp, 8:8 */ - SYS9, /* 18bpp, 9:9 */ - SYS12, /* 24bpp, 12:12 */ - SYS16A, /* 16bpp */ - SYS16B, /* 18bpp, 16:2 */ - SYS16C, /* 18bpp, 2:16 */ - SYS18, /* 18bpp */ - SYS24 };/* 24bpp */ - -enum { LCDC_CHAN_DISABLED = 0, - LCDC_CHAN_MAINLCD, - LCDC_CHAN_SUBLCD }; - -enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL }; - -struct sh_mobile_lcdc_sys_bus_cfg { - unsigned long ldmt2r; - unsigned long ldmt3r; -}; - -struct sh_mobile_lcdc_sys_bus_ops { - void (*write_index)(void *handle, unsigned long data); - void (*write_data)(void *handle, unsigned long data); - unsigned long (*read_data)(void *handle); -}; - -struct sh_mobile_lcdc_board_cfg { - void *board_data; - int (*setup_sys)(void *board_data, void *sys_ops_handle, - struct sh_mobile_lcdc_sys_bus_ops *sys_ops); - void (*display_on)(void *board_data); - void (*display_off)(void *board_data); -}; - -struct sh_mobile_lcdc_chan_cfg { - int chan; - int bpp; - int interface_type; /* selects RGBn or SYSn I/F, see above */ - int clock_divider; - struct fb_videomode lcd_cfg; - struct sh_mobile_lcdc_board_cfg board_cfg; - struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */ -}; - -struct sh_mobile_lcdc_info { - unsigned long lddckr; - int clock_source; - struct sh_mobile_lcdc_chan_cfg ch[2]; -}; - -#endif /* __ASM_SH_MOBILE_LCDC_H__ */ diff --git a/include/asm-sh/shmbuf.h b/include/asm-sh/shmbuf.h deleted file mode 100644 index b2101f4..0000000 --- a/include/asm-sh/shmbuf.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef __ASM_SH_SHMBUF_H -#define __ASM_SH_SHMBUF_H - -/* - * The shmid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ - unsigned long __unused1; - __kernel_time_t shm_dtime; /* last detach time */ - unsigned long __unused2; - __kernel_time_t shm_ctime; /* last change time */ - unsigned long __unused3; - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused4; - unsigned long __unused5; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_SH_SHMBUF_H */ diff --git a/include/asm-sh/shmin.h b/include/asm-sh/shmin.h deleted file mode 100644 index 36ba138..0000000 --- a/include/asm-sh/shmin.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_SH_SHMIN_H -#define __ASM_SH_SHMIN_H - -#define SHMIN_IO_BASE 0xb0000000UL - -#define SHMIN_NE_IRQ IRQ2_IRQ -#define SHMIN_NE_BASE 0x300 - -#endif diff --git a/include/asm-sh/shmparam.h b/include/asm-sh/shmparam.h deleted file mode 100644 index ba1758d..0000000 --- a/include/asm-sh/shmparam.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-sh/shmparam.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2006 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_SHMPARAM_H -#define __ASM_SH_SHMPARAM_H - -/* - * SH-4 and SH-3 7705 have an aliasing dcache. Bump this up to a sensible value - * for everyone, and work out the specifics from the probed cache descriptor. - */ -#define SHMLBA 0x4000 /* attach addr a multiple of this */ - -#define __ARCH_FORCE_SHMLBA - -#endif /* __ASM_SH_SHMPARAM_H */ diff --git a/include/asm-sh/sigcontext.h b/include/asm-sh/sigcontext.h deleted file mode 100644 index 8ce1435..0000000 --- a/include/asm-sh/sigcontext.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __ASM_SH_SIGCONTEXT_H -#define __ASM_SH_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - -#if defined(__SH5__) || defined(CONFIG_CPU_SH5) - /* CPU registers */ - unsigned long long sc_regs[63]; - unsigned long long sc_tregs[8]; - unsigned long long sc_pc; - unsigned long long sc_sr; - - /* FPU registers */ - unsigned long long sc_fpregs[32]; - unsigned int sc_fpscr; - unsigned int sc_fpvalid; -#else - /* CPU registers */ - unsigned long sc_regs[16]; - unsigned long sc_pc; - unsigned long sc_pr; - unsigned long sc_sr; - unsigned long sc_gbr; - unsigned long sc_mach; - unsigned long sc_macl; - -#if defined(__SH4__) || defined(CONFIG_CPU_SH4) || \ - defined(__SH2A__) || defined(CONFIG_CPU_SH2A) - /* FPU registers */ - unsigned long sc_fpregs[16]; - unsigned long sc_xfpregs[16]; - unsigned int sc_fpscr; - unsigned int sc_fpul; - unsigned int sc_ownedfp; -#endif -#endif -}; - -#endif /* __ASM_SH_SIGCONTEXT_H */ diff --git a/include/asm-sh/siginfo.h b/include/asm-sh/siginfo.h deleted file mode 100644 index 813040e..0000000 --- a/include/asm-sh/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_SIGINFO_H -#define __ASM_SH_SIGINFO_H - -#include - -#endif /* __ASM_SH_SIGINFO_H */ diff --git a/include/asm-sh/signal.h b/include/asm-sh/signal.h deleted file mode 100644 index 5c5c1e8..0000000 --- a/include/asm-sh/signal.h +++ /dev/null @@ -1,160 +0,0 @@ -#ifndef __ASM_SH_SIGNAL_H -#define __ASM_SH_SIGNAL_H - -#include - -/* Avoid too many header ordering problems. */ -struct pt_regs; -struct siginfo; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000 - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -#ifdef __KERNEL__ -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ -#include - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_SIGNAL_H */ diff --git a/include/asm-sh/smc37c93x.h b/include/asm-sh/smc37c93x.h deleted file mode 100644 index 585da2a..0000000 --- a/include/asm-sh/smc37c93x.h +++ /dev/null @@ -1,190 +0,0 @@ -#ifndef __ASM_SH_SMC37C93X_H -#define __ASM_SH_SMC37C93X_H - -/* - * linux/include/asm-sh/smc37c93x.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * SMSC 37C93x Super IO Chip support - */ - -/* Default base I/O address */ -#define FDC_PRIMARY_BASE 0x3f0 -#define IDE1_PRIMARY_BASE 0x1f0 -#define IDE1_SECONDARY_BASE 0x170 -#define PARPORT_PRIMARY_BASE 0x378 -#define COM1_PRIMARY_BASE 0x2f8 -#define COM2_PRIMARY_BASE 0x3f8 -#define RTC_PRIMARY_BASE 0x070 -#define KBC_PRIMARY_BASE 0x060 -#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ - -/* Logical device number */ -#define LDN_FDC 0 -#define LDN_IDE1 1 -#define LDN_IDE2 2 -#define LDN_PARPORT 3 -#define LDN_COM1 4 -#define LDN_COM2 5 -#define LDN_RTC 6 -#define LDN_KBC 7 -#define LDN_AUXIO 8 - -/* Configuration port and key */ -#define CONFIG_PORT 0x3f0 -#define INDEX_PORT CONFIG_PORT -#define DATA_PORT 0x3f1 -#define CONFIG_ENTER 0x55 -#define CONFIG_EXIT 0xaa - -/* Configuration index */ -#define CURRENT_LDN_INDEX 0x07 -#define POWER_CONTROL_INDEX 0x22 -#define ACTIVATE_INDEX 0x30 -#define IO_BASE_HI_INDEX 0x60 -#define IO_BASE_LO_INDEX 0x61 -#define IRQ_SELECT_INDEX 0x70 -#define DMA_SELECT_INDEX 0x74 - -#define GPIO46_INDEX 0xc6 -#define GPIO47_INDEX 0xc7 - -/* UART stuff. Only for debugging. */ -/* UART Register */ - -#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ -#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ -#define UART_IER 0x2 /* Interrupt Enable Register */ -#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ -#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ -#define UART_LCR 0x6 /* Line Control Register */ -#define UART_MCR 0x8 /* MODEM Control Register */ -#define UART_LSR 0xa /* Line Status Register */ -#define UART_MSR 0xc /* MODEM Status Register */ -#define UART_SCR 0xe /* Scratch Register */ -#define UART_DLL 0x0 /* Divisor Latch (LS) */ -#define UART_DLM 0x2 /* Divisor Latch (MS) */ - -#ifndef __ASSEMBLY__ -typedef struct uart_reg { - volatile __u16 rbr; - volatile __u16 ier; - volatile __u16 iir; - volatile __u16 lcr; - volatile __u16 mcr; - volatile __u16 lsr; - volatile __u16 msr; - volatile __u16 scr; -} uart_reg; -#endif /* ! __ASSEMBLY__ */ - -/* Alias for Write Only Register */ - -#define thr rbr -#define tcr iir - -/* Alias for Divisor Latch Register */ - -#define dll rbr -#define dlm ier -#define fcr iir - -/* Interrupt Enable Register */ - -#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ -#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ -#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ -#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ - -/* Interrupt Ident Register */ - -#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ -#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ -#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ -#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ -#define IIR_FIFO 0xc000 /* FIFOs enabled */ - -/* FIFO Control Register */ - -#define FCR_FEN 0x0100 /* FIFO enable */ -#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ -#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ -#define FCR_DMA 0x0800 /* DMA mode select */ -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ - -/* Line Control Register */ - -#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ -#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ -#define LCR_STB 0x0400 /* Number of Stop Bits */ -#define LCR_PEN 0x0800 /* Parity Enable */ -#define LCR_EPS 0x1000 /* Even Parity Select */ -#define LCR_SP 0x2000 /* Stick Parity */ -#define LCR_SB 0x4000 /* Set Break */ -#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ - -/* MODEM Control Register */ - -#define MCR_DTR 0x0100 /* Data Terminal Ready */ -#define MCR_RTS 0x0200 /* Request to Send */ -#define MCR_OUT1 0x0400 /* Out 1 */ -#define MCR_IRQEN 0x0800 /* IRQ Enable */ -#define MCR_LOOP 0x1000 /* Loop */ - -/* Line Status Register */ - -#define LSR_DR 0x0100 /* Data Ready */ -#define LSR_OE 0x0200 /* Overrun Error */ -#define LSR_PE 0x0400 /* Parity Error */ -#define LSR_FE 0x0800 /* Framing Error */ -#define LSR_BI 0x1000 /* Break Interrupt */ -#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ -#define LSR_TEMT 0x4000 /* Transmitter Empty */ -#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ - -/* MODEM Status Register */ - -#define MSR_DCTS 0x0100 /* Delta Clear to Send */ -#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ -#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ -#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ -#define MSR_CTS 0x1000 /* Clear to Send */ -#define MSR_DSR 0x2000 /* Data Set Ready */ -#define MSR_RI 0x4000 /* Ring Indicator */ -#define MSR_DCD 0x8000 /* Data Carrier Detect */ - -/* Baud Rate Divisor */ - -#define UART_CLK (1843200) /* 1.8432 MHz */ -#define UART_BAUD(x) (UART_CLK / (16 * (x))) - -/* RTC register definition */ -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_FREQ_SELECT 10 -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 -/* This RTC can work under 32.768KHz clock only. */ -# define RTC_OSC_ENABLE 0x20 -# define RTC_OSC_DISABLE 0x00 -#define RTC_CONTROL 11 -# define RTC_SET 0x80 -# define RTC_PIE 0x40 -# define RTC_AIE 0x20 -# define RTC_UIE 0x10 -# define RTC_SQWE 0x08 -# define RTC_DM_BINARY 0x04 -# define RTC_24H 0x02 -# define RTC_DST_EN 0x01 - -#endif /* __ASM_SH_SMC37C93X_H */ diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h deleted file mode 100644 index 593343c..0000000 --- a/include/asm-sh/smp.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef __ASM_SH_SMP_H -#define __ASM_SH_SMP_H - -#include -#include - -#ifdef CONFIG_SMP - -#include -#include -#include - -#define raw_smp_processor_id() (current_thread_info()->cpu) -#define hard_smp_processor_id() plat_smp_processor_id() - -/* Map from cpu id to sequential logical cpu number. */ -extern int __cpu_number_map[NR_CPUS]; -#define cpu_number_map(cpu) __cpu_number_map[cpu] - -/* The reverse map from sequential logical cpu number to cpu id. */ -extern int __cpu_logical_map[NR_CPUS]; -#define cpu_logical_map(cpu) __cpu_logical_map[cpu] - -/* I've no idea what the real meaning of this is */ -#define PROC_CHANGE_PENALTY 20 - -#define NO_PROC_ID (-1) - -#define SMP_MSG_FUNCTION 0 -#define SMP_MSG_RESCHEDULE 1 -#define SMP_MSG_FUNCTION_SINGLE 2 -#define SMP_MSG_NR 3 - -void plat_smp_setup(void); -void plat_prepare_cpus(unsigned int max_cpus); -int plat_smp_processor_id(void); -void plat_start_cpu(unsigned int cpu, unsigned long entry_point); -void plat_send_ipi(unsigned int cpu, unsigned int message); -int plat_register_ipi_handler(unsigned int message, - void (*handler)(void *), void *arg); -extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); - -#else - -#define hard_smp_processor_id() (0) - -#endif /* CONFIG_SMP */ - -#endif /* __ASM_SH_SMP_H */ diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h deleted file mode 100644 index 042d95f..0000000 --- a/include/asm-sh/snapgear.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * include/asm-sh/snapgear.h - * - * Modified version of io_se.h for the snapgear-specific functions. - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * IO functions for a SnapGear - */ - -#ifndef _ASM_SH_IO_SNAPGEAR_H -#define _ASM_SH_IO_SNAPGEAR_H - -#if defined(CONFIG_CPU_SH4) -/* - * The external interrupt lines, these take up ints 0 - 15 inclusive - * depending on the priority for the interrupt. In fact the priority - * is the interrupt :-) - */ - -#define IRL0_IRQ 2 -#define IRL0_PRIORITY 13 - -#define IRL1_IRQ 5 -#define IRL1_PRIORITY 10 - -#define IRL2_IRQ 8 -#define IRL2_PRIORITY 7 - -#define IRL3_IRQ 11 -#define IRL3_PRIORITY 4 -#endif - -#define __IO_PREFIX snapgear -#include - -#ifdef CONFIG_SH_SECUREEDGE5410 -/* - * We need to remember what was written to the ioport as some bits - * are shared with other functions and you cannot read back what was - * written :-| - * - * Bit Read Write - * ----------------------------------------------- - * D0 DCD on ttySC1 power - * D1 Reset Switch heatbeat - * D2 ttySC0 CTS (7100) LAN - * D3 - WAN - * D4 ttySC0 DCD (7100) CONSOLE - * D5 - ONLINE - * D6 - VPN - * D7 - DTR on ttySC1 - * D8 - ttySC0 RTS (7100) - * D9 - ttySC0 DTR (7100) - * D10 - RTC SCLK - * D11 RTC DATA RTC DATA - * D12 - RTS RESET - */ - -#define SECUREEDGE_IOPORT_ADDR ((volatile short *) 0xb0000000) -extern unsigned short secureedge5410_ioport; - -#define SECUREEDGE_WRITE_IOPORT(val, mask) (*SECUREEDGE_IOPORT_ADDR = \ - (secureedge5410_ioport = \ - ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) -#define SECUREEDGE_READ_IOPORT() \ - ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) -#endif - -#endif /* _ASM_SH_IO_SNAPGEAR_H */ diff --git a/include/asm-sh/socket.h b/include/asm-sh/socket.h deleted file mode 100644 index 6d4bf65..0000000 --- a/include/asm-sh/socket.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef __ASM_SH_SOCKET_H -#define __ASM_SH_SOCKET_H - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_RCVBUFFORCE 32 -#define SO_SNDBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* __ASM_SH_SOCKET_H */ diff --git a/include/asm-sh/sockios.h b/include/asm-sh/sockios.h deleted file mode 100644 index cf8b96b..0000000 --- a/include/asm-sh/sockios.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __ASM_SH_SOCKIOS_H -#define __ASM_SH_SOCKIOS_H - -/* Socket-level I/O control calls. */ -#define FIOGETOWN _IOR('f', 123, int) -#define FIOSETOWN _IOW('f', 124, int) - -#define SIOCATMARK _IOR('s', 7, int) -#define SIOCSPGRP _IOW('s', 8, pid_t) -#define SIOCGPGRP _IOR('s', 9, pid_t) - -#define SIOCGSTAMP _IOR('s', 100, struct timeval) /* Get stamp (timeval) */ -#define SIOCGSTAMPNS _IOR('s', 101, struct timespec) /* Get stamp (timespec) */ -#endif /* __ASM_SH_SOCKIOS_H */ diff --git a/include/asm-sh/sparsemem.h b/include/asm-sh/sparsemem.h deleted file mode 100644 index 547a540..0000000 --- a/include/asm-sh/sparsemem.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef __ASM_SH_SPARSEMEM_H -#define __ASM_SH_SPARSEMEM_H - -#ifdef __KERNEL__ -/* - * SECTION_SIZE_BITS 2^N: how big each section will be - * MAX_PHYSADDR_BITS 2^N: how much physical address space we have - * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space - */ -#define SECTION_SIZE_BITS 26 -#define MAX_PHYSADDR_BITS 32 -#define MAX_PHYSMEM_BITS 32 - -#endif - -#endif /* __ASM_SH_SPARSEMEM_H */ diff --git a/include/asm-sh/spi.h b/include/asm-sh/spi.h deleted file mode 100644 index e96f5b0..0000000 --- a/include/asm-sh/spi.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_SPI_H__ -#define __ASM_SPI_H__ - -struct sh_spi_info; - -struct sh_spi_info { - int bus_num; - int num_chipselect; - - void (*chip_select)(struct sh_spi_info *spi, int cs, int state); -}; - -#endif /* __ASM_SPI_H__ */ diff --git a/include/asm-sh/spinlock.h b/include/asm-sh/spinlock.h deleted file mode 100644 index e793181..0000000 --- a/include/asm-sh/spinlock.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * include/asm-sh/spinlock.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * Copyright (C) 2006, 2007 Akio Idehara - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_SPINLOCK_H -#define __ASM_SH_SPINLOCK_H - -/* - * The only locking implemented here uses SH-4A opcodes. For others, - * split this out as per atomic-*.h. - */ -#ifndef CONFIG_CPU_SH4A -#error "Need movli.l/movco.l for spinlocks" -#endif - -/* - * Your basic SMP spinlocks, allowing only a single CPU anywhere - */ - -#define __raw_spin_is_locked(x) ((x)->lock <= 0) -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) -#define __raw_spin_unlock_wait(x) \ - do { cpu_relax(); } while ((x)->lock) - -/* - * Simple spin lock operations. There are two variants, one clears IRQ's - * on the local processor, one does not. - * - * We make no fairness assumptions. They have a cost. - */ -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - unsigned long tmp; - unsigned long oldval; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%2, %0 ! __raw_spin_lock \n\t" - "mov %0, %1 \n\t" - "mov #0, %0 \n\t" - "movco.l %0, @%2 \n\t" - "bf 1b \n\t" - "cmp/pl %1 \n\t" - "bf 1b \n\t" - : "=&z" (tmp), "=&r" (oldval) - : "r" (&lock->lock) - : "t", "memory" - ); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - unsigned long tmp; - - __asm__ __volatile__ ( - "mov #1, %0 ! __raw_spin_unlock \n\t" - "mov.l %0, @%1 \n\t" - : "=&z" (tmp) - : "r" (&lock->lock) - : "t", "memory" - ); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned long tmp, oldval; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%2, %0 ! __raw_spin_trylock \n\t" - "mov %0, %1 \n\t" - "mov #0, %0 \n\t" - "movco.l %0, @%2 \n\t" - "bf 1b \n\t" - "synco \n\t" - : "=&z" (tmp), "=&r" (oldval) - : "r" (&lock->lock) - : "t", "memory" - ); - - return oldval; -} - -/* - * Read-write spinlocks, allowing multiple readers but only one writer. - * - * NOTE! it is quite common to have readers in interrupts but no interrupt - * writers. For those circumstances we can "mix" irq-safe locks - any writer - * needs to get a irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - */ - -/** - * read_can_lock - would read_trylock() succeed? - * @lock: the rwlock in question. - */ -#define __raw_read_can_lock(x) ((x)->lock > 0) - -/** - * write_can_lock - would write_trylock() succeed? - * @lock: the rwlock in question. - */ -#define __raw_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS) - -static inline void __raw_read_lock(raw_rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%1, %0 ! __raw_read_lock \n\t" - "cmp/pl %0 \n\t" - "bf 1b \n\t" - "add #-1, %0 \n\t" - "movco.l %0, @%1 \n\t" - "bf 1b \n\t" - : "=&z" (tmp) - : "r" (&rw->lock) - : "t", "memory" - ); -} - -static inline void __raw_read_unlock(raw_rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%1, %0 ! __raw_read_unlock \n\t" - "add #1, %0 \n\t" - "movco.l %0, @%1 \n\t" - "bf 1b \n\t" - : "=&z" (tmp) - : "r" (&rw->lock) - : "t", "memory" - ); -} - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%1, %0 ! __raw_write_lock \n\t" - "cmp/hs %2, %0 \n\t" - "bf 1b \n\t" - "sub %2, %0 \n\t" - "movco.l %0, @%1 \n\t" - "bf 1b \n\t" - : "=&z" (tmp) - : "r" (&rw->lock), "r" (RW_LOCK_BIAS) - : "t", "memory" - ); -} - -static inline void __raw_write_unlock(raw_rwlock_t *rw) -{ - __asm__ __volatile__ ( - "mov.l %1, @%0 ! __raw_write_unlock \n\t" - : - : "r" (&rw->lock), "r" (RW_LOCK_BIAS) - : "t", "memory" - ); -} - -static inline int __raw_read_trylock(raw_rwlock_t *rw) -{ - unsigned long tmp, oldval; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%2, %0 ! __raw_read_trylock \n\t" - "mov %0, %1 \n\t" - "cmp/pl %0 \n\t" - "bf 2f \n\t" - "add #-1, %0 \n\t" - "movco.l %0, @%2 \n\t" - "bf 1b \n\t" - "2: \n\t" - "synco \n\t" - : "=&z" (tmp), "=&r" (oldval) - : "r" (&rw->lock) - : "t", "memory" - ); - - return (oldval > 0); -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - unsigned long tmp, oldval; - - __asm__ __volatile__ ( - "1: \n\t" - "movli.l @%2, %0 ! __raw_write_trylock \n\t" - "mov %0, %1 \n\t" - "cmp/hs %3, %0 \n\t" - "bf 2f \n\t" - "sub %3, %0 \n\t" - "2: \n\t" - "movco.l %0, @%2 \n\t" - "bf 1b \n\t" - "synco \n\t" - : "=&z" (tmp), "=&r" (oldval) - : "r" (&rw->lock), "r" (RW_LOCK_BIAS) - : "t", "memory" - ); - - return (oldval > (RW_LOCK_BIAS - 1)); -} - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* __ASM_SH_SPINLOCK_H */ diff --git a/include/asm-sh/spinlock_types.h b/include/asm-sh/spinlock_types.h deleted file mode 100644 index b4d244e..0000000 --- a/include/asm-sh/spinlock_types.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_SH_SPINLOCK_TYPES_H -#define __ASM_SH_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned int lock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 1 } - -typedef struct { - volatile unsigned int lock; -} raw_rwlock_t; - -#define RW_LOCK_BIAS 0x01000000 -#define __RAW_RW_LOCK_UNLOCKED { RW_LOCK_BIAS } - -#endif diff --git a/include/asm-sh/stat.h b/include/asm-sh/stat.h deleted file mode 100644 index e1810cc..0000000 --- a/include/asm-sh/stat.h +++ /dev/null @@ -1,138 +0,0 @@ -#ifndef __ASM_SH_STAT_H -#define __ASM_SH_STAT_H - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -#if defined(__SH5__) || defined(CONFIG_CPU_SH5) -struct stat { - unsigned short st_dev; - unsigned short __pad1; - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned short __pad2; - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -/* This matches struct stat64 in glibc2.1, hence the absolutely - * insane amounts of padding around dev_t's. - */ -struct stat64 { - unsigned short st_dev; - unsigned char __pad0[10]; - - unsigned long st_ino; - unsigned int st_mode; - unsigned int st_nlink; - - unsigned long st_uid; - unsigned long st_gid; - - unsigned short st_rdev; - unsigned char __pad3[10]; - - long long st_size; - unsigned long st_blksize; - - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long __pad4; /* future possible st_blocks high bits */ - - unsigned long st_atime; - unsigned long st_atime_nsec; - - unsigned long st_mtime; - unsigned long st_mtime_nsec; - - unsigned long st_ctime; - unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */ - - unsigned long __unused1; - unsigned long __unused2; -}; -#else -struct stat { - unsigned long st_dev; - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned long st_rdev; - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -/* This matches struct stat64 in glibc2.1, hence the absolutely - * insane amounts of padding around dev_t's. - */ -struct stat64 { - unsigned long long st_dev; - unsigned char __pad0[4]; - -#define STAT64_HAS_BROKEN_ST_INO 1 - unsigned long __st_ino; - - unsigned int st_mode; - unsigned int st_nlink; - - unsigned long st_uid; - unsigned long st_gid; - - unsigned long long st_rdev; - unsigned char __pad3[4]; - - long long st_size; - unsigned long st_blksize; - - unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ - - unsigned long st_atime; - unsigned long st_atime_nsec; - - unsigned long st_mtime; - unsigned long st_mtime_nsec; - - unsigned long st_ctime; - unsigned long st_ctime_nsec; - - unsigned long long st_ino; -}; - -#define STAT_HAVE_NSEC 1 -#endif - -#endif /* __ASM_SH_STAT_H */ diff --git a/include/asm-sh/statfs.h b/include/asm-sh/statfs.h deleted file mode 100644 index 9202a02..0000000 --- a/include/asm-sh/statfs.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_STATFS_H -#define __ASM_SH_STATFS_H - -#include - -#endif /* __ASM_SH_STATFS_H */ diff --git a/include/asm-sh/string.h b/include/asm-sh/string.h deleted file mode 100644 index 8c1ea21d..0000000 --- a/include/asm-sh/string.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifdef CONFIG_SUPERH32 -# include "string_32.h" -#else -# include "string_64.h" -#endif diff --git a/include/asm-sh/string_32.h b/include/asm-sh/string_32.h deleted file mode 100644 index 55f8db6..0000000 --- a/include/asm-sh/string_32.h +++ /dev/null @@ -1,131 +0,0 @@ -#ifndef __ASM_SH_STRING_H -#define __ASM_SH_STRING_H - -#ifdef __KERNEL__ - -/* - * Copyright (C) 1999 Niibe Yutaka - * But consider these trivial functions to be public domain. - */ - -#define __HAVE_ARCH_STRCPY -static inline char *strcpy(char *__dest, const char *__src) -{ - register char *__xdest = __dest; - unsigned long __dummy; - - __asm__ __volatile__("1:\n\t" - "mov.b @%1+, %2\n\t" - "mov.b %2, @%0\n\t" - "cmp/eq #0, %2\n\t" - "bf/s 1b\n\t" - " add #1, %0\n\t" - : "=r" (__dest), "=r" (__src), "=&z" (__dummy) - : "0" (__dest), "1" (__src) - : "memory", "t"); - - return __xdest; -} - -#define __HAVE_ARCH_STRNCPY -static inline char *strncpy(char *__dest, const char *__src, size_t __n) -{ - register char *__xdest = __dest; - unsigned long __dummy; - - if (__n == 0) - return __xdest; - - __asm__ __volatile__( - "1:\n" - "mov.b @%1+, %2\n\t" - "mov.b %2, @%0\n\t" - "cmp/eq #0, %2\n\t" - "bt/s 2f\n\t" - " cmp/eq %5,%1\n\t" - "bf/s 1b\n\t" - " add #1, %0\n" - "2:" - : "=r" (__dest), "=r" (__src), "=&z" (__dummy) - : "0" (__dest), "1" (__src), "r" (__src+__n) - : "memory", "t"); - - return __xdest; -} - -#define __HAVE_ARCH_STRCMP -static inline int strcmp(const char *__cs, const char *__ct) -{ - register int __res; - unsigned long __dummy; - - __asm__ __volatile__( - "mov.b @%1+, %3\n" - "1:\n\t" - "mov.b @%0+, %2\n\t" - "cmp/eq #0, %3\n\t" - "bt 2f\n\t" - "cmp/eq %2, %3\n\t" - "bt/s 1b\n\t" - " mov.b @%1+, %3\n\t" - "add #-2, %1\n\t" - "mov.b @%1, %3\n\t" - "sub %3, %2\n" - "2:" - : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) - : "0" (__cs), "1" (__ct) - : "t"); - - return __res; -} - -#define __HAVE_ARCH_STRNCMP -static inline int strncmp(const char *__cs, const char *__ct, size_t __n) -{ - register int __res; - unsigned long __dummy; - - if (__n == 0) - return 0; - - __asm__ __volatile__( - "mov.b @%1+, %3\n" - "1:\n\t" - "mov.b @%0+, %2\n\t" - "cmp/eq %6, %0\n\t" - "bt/s 2f\n\t" - " cmp/eq #0, %3\n\t" - "bt/s 3f\n\t" - " cmp/eq %3, %2\n\t" - "bt/s 1b\n\t" - " mov.b @%1+, %3\n\t" - "add #-2, %1\n\t" - "mov.b @%1, %3\n" - "2:\n\t" - "sub %3, %2\n" - "3:" - :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy) - : "0" (__cs), "1" (__ct), "r" (__cs+__n) - : "t"); - - return __res; -} - -#define __HAVE_ARCH_MEMSET -extern void *memset(void *__s, int __c, size_t __count); - -#define __HAVE_ARCH_MEMCPY -extern void *memcpy(void *__to, __const__ void *__from, size_t __n); - -#define __HAVE_ARCH_MEMMOVE -extern void *memmove(void *__dest, __const__ void *__src, size_t __n); - -#define __HAVE_ARCH_MEMCHR -extern void *memchr(const void *__s, int __c, size_t __n); - -#define __HAVE_ARCH_STRLEN -extern size_t strlen(const char *); - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_STRING_H */ diff --git a/include/asm-sh/string_64.h b/include/asm-sh/string_64.h deleted file mode 100644 index aa1fef2..0000000 --- a/include/asm-sh/string_64.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_SH_STRING_64_H -#define __ASM_SH_STRING_64_H - -/* - * include/asm-sh/string_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#define __HAVE_ARCH_MEMCPY -extern void *memcpy(void *dest, const void *src, size_t count); - -#endif /* __ASM_SH_STRING_64_H */ diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h deleted file mode 100644 index 056d68c..0000000 --- a/include/asm-sh/system.h +++ /dev/null @@ -1,190 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_H -#define __ASM_SH_SYSTEM_H - -/* - * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima - * Copyright (C) 2002 Paul Mundt - */ - -#include -#include -#include -#include -#include - -#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ - -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) -#define __icbi() \ -{ \ - unsigned long __addr; \ - __addr = 0xa8000000; \ - __asm__ __volatile__( \ - "icbi %0\n\t" \ - : /* no output */ \ - : "m" (__m(__addr))); \ -} -#endif - -/* - * A brief note on ctrl_barrier(), the control register write barrier. - * - * Legacy SH cores typically require a sequence of 8 nops after - * modification of a control register in order for the changes to take - * effect. On newer cores (like the sh4a and sh5) this is accomplished - * with icbi. - * - * Also note that on sh4a in the icbi case we can forego a synco for the - * write barrier, as it's not necessary for control registers. - * - * Historically we have only done this type of barrier for the MMUCR, but - * it's also necessary for the CCR, so we make it generic here instead. - */ -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) -#define mb() __asm__ __volatile__ ("synco": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("synco": : :"memory") -#define ctrl_barrier() __icbi() -#define read_barrier_depends() do { } while(0) -#else -#define mb() __asm__ __volatile__ ("": : :"memory") -#define rmb() mb() -#define wmb() __asm__ __volatile__ ("": : :"memory") -#define ctrl_barrier() __asm__ __volatile__ ("nop;nop;nop;nop;nop;nop;nop;nop") -#define read_barrier_depends() do { } while(0) -#endif - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) - -#ifdef CONFIG_GUSA_RB -#include -#else -#include -#endif - -extern void __xchg_called_with_bad_pointer(void); - -#define __xchg(ptr, x, size) \ -({ \ - unsigned long __xchg__res; \ - volatile void *__xchg_ptr = (ptr); \ - switch (size) { \ - case 4: \ - __xchg__res = xchg_u32(__xchg_ptr, x); \ - break; \ - case 1: \ - __xchg__res = xchg_u8(__xchg_ptr, x); \ - break; \ - default: \ - __xchg_called_with_bad_pointer(); \ - __xchg__res = x; \ - break; \ - } \ - \ - __xchg__res; \ -}) - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) - -/* This function doesn't exist, so you'll get a linker error - * if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -extern void die(const char *str, struct pt_regs *regs, long err) __attribute__ ((noreturn)); - -extern void *set_exception_table_vec(unsigned int vec, void *handler); - -static inline void *set_exception_table_evt(unsigned int evt, void *handler) -{ - return set_exception_table_vec(evt >> 5, handler); -} - -/* - * SH-2A has both 16 and 32-bit opcodes, do lame encoding checks. - */ -#ifdef CONFIG_CPU_SH2A -extern unsigned int instruction_size(unsigned int insn); -#elif defined(CONFIG_SUPERH32) -#define instruction_size(insn) (2) -#else -#define instruction_size(insn) (4) -#endif - -extern unsigned long cached_to_uncached; - -extern struct dentry *sh_debugfs_root; - -void per_cpu_trap_init(void); - -asmlinkage void break_point_trap(void); - -#ifdef CONFIG_SUPERH32 -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \ - unsigned long r6, unsigned long r7, \ - struct pt_regs __regs) - -#define TRAP_HANDLER_DECL \ - struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \ - unsigned int vec = regs->tra; \ - (void)vec; -#else -#define BUILD_TRAP_HANDLER(name) \ -asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs) -#define TRAP_HANDLER_DECL -#endif - -BUILD_TRAP_HANDLER(address_error); -BUILD_TRAP_HANDLER(debug); -BUILD_TRAP_HANDLER(bug); -BUILD_TRAP_HANDLER(fpu_error); -BUILD_TRAP_HANDLER(fpu_state_restore); - -#define arch_align_stack(x) (x) - -struct mem_access { - unsigned long (*from)(void *dst, const void *src, unsigned long cnt); - unsigned long (*to)(void *dst, const void *src, unsigned long cnt); -}; - -#ifdef CONFIG_SUPERH32 -# include "system_32.h" -#else -# include "system_64.h" -#endif - -#endif diff --git a/include/asm-sh/system_32.h b/include/asm-sh/system_32.h deleted file mode 100644 index f11bcf0..0000000 --- a/include/asm-sh/system_32.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_32_H -#define __ASM_SH_SYSTEM_32_H - -#include - -struct task_struct *__switch_to(struct task_struct *prev, - struct task_struct *next); - -/* - * switch_to() should switch tasks to task nr n, first - */ -#define switch_to(prev, next, last) \ -do { \ - register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \ - register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \ - register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \ - register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \ - register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \ - register u32 __ts7 __asm__ ("r7") = next->thread.pc; \ - struct task_struct *__last; \ - \ - __asm__ __volatile__ ( \ - ".balign 4\n\t" \ - "stc.l gbr, @-r15\n\t" \ - "sts.l pr, @-r15\n\t" \ - "mov.l r8, @-r15\n\t" \ - "mov.l r9, @-r15\n\t" \ - "mov.l r10, @-r15\n\t" \ - "mov.l r11, @-r15\n\t" \ - "mov.l r12, @-r15\n\t" \ - "mov.l r13, @-r15\n\t" \ - "mov.l r14, @-r15\n\t" \ - "mov.l r15, @r1\t! save SP\n\t" \ - "mov.l @r6, r15\t! change to new stack\n\t" \ - "mova 1f, %0\n\t" \ - "mov.l %0, @r2\t! save PC\n\t" \ - "mov.l 2f, %0\n\t" \ - "jmp @%0\t! call __switch_to\n\t" \ - " lds r7, pr\t! with return to new PC\n\t" \ - ".balign 4\n" \ - "2:\n\t" \ - ".long __switch_to\n" \ - "1:\n\t" \ - "mov.l @r15+, r14\n\t" \ - "mov.l @r15+, r13\n\t" \ - "mov.l @r15+, r12\n\t" \ - "mov.l @r15+, r11\n\t" \ - "mov.l @r15+, r10\n\t" \ - "mov.l @r15+, r9\n\t" \ - "mov.l @r15+, r8\n\t" \ - "lds.l @r15+, pr\n\t" \ - "ldc.l @r15+, gbr\n\t" \ - : "=z" (__last) \ - : "r" (__ts1), "r" (__ts2), "r" (__ts4), \ - "r" (__ts5), "r" (__ts6), "r" (__ts7) \ - : "r3", "t"); \ - \ - last = __last; \ -} while (0) - -#define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text"))) - -/* - * Jump to uncached area. - * When handling TLB or caches, we need to do it from an uncached area. - */ -#define jump_to_uncached() \ -do { \ - unsigned long __dummy; \ - \ - __asm__ __volatile__( \ - "mova 1f, %0\n\t" \ - "add %1, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1:" \ - : "=&z" (__dummy) \ - : "r" (cached_to_uncached)); \ -} while (0) - -/* - * Back to cached area. - */ -#define back_to_cached() \ -do { \ - unsigned long __dummy; \ - ctrl_barrier(); \ - __asm__ __volatile__( \ - "mov.l 1f, %0\n\t" \ - "jmp @%0\n\t" \ - " nop\n\t" \ - ".balign 4\n" \ - "1: .long 2f\n" \ - "2:" \ - : "=&r" (__dummy)); \ -} while (0) - -int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs, - struct mem_access *ma); - -#endif /* __ASM_SH_SYSTEM_32_H */ diff --git a/include/asm-sh/system_64.h b/include/asm-sh/system_64.h deleted file mode 100644 index 943acf5..0000000 --- a/include/asm-sh/system_64.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __ASM_SH_SYSTEM_64_H -#define __ASM_SH_SYSTEM_64_H - -/* - * include/asm-sh/system_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#include - -/* - * switch_to() should switch tasks to task nr n, first - */ -struct task_struct *sh64_switch_to(struct task_struct *prev, - struct thread_struct *prev_thread, - struct task_struct *next, - struct thread_struct *next_thread); - -#define switch_to(prev,next,last) \ -do { \ - if (last_task_used_math != next) { \ - struct pt_regs *regs = next->thread.uregs; \ - if (regs) regs->sr |= SR_FD; \ - } \ - last = sh64_switch_to(prev, &prev->thread, next, \ - &next->thread); \ -} while (0) - -#define __uses_jump_to_uncached - -#define jump_to_uncached() do { } while (0) -#define back_to_cached() do { } while (0) - -#endif /* __ASM_SH_SYSTEM_64_H */ diff --git a/include/asm-sh/systemh7751.h b/include/asm-sh/systemh7751.h deleted file mode 100644 index 4161122..0000000 --- a/include/asm-sh/systemh7751.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H -#define __ASM_SH_SYSTEMH_7751SYSTEMH_H - -/* - * linux/include/asm-sh/systemh/7751systemh.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * Hitachi SystemH support - - * Modified for 7751 SystemH by - * Jonathan Short, 2002. - */ - -/* Box specific addresses. */ - -#define PA_ROM 0x00000000 /* EPROM */ -#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_FROM 0x01000000 /* EPROM */ -#define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ -#define PA_EXT1 0x04000000 -#define PA_EXT1_SIZE 0x04000000 -#define PA_EXT2 0x08000000 -#define PA_EXT2_SIZE 0x04000000 -#define PA_SDRAM 0x0c000000 -#define PA_SDRAM_SIZE 0x04000000 - -#define PA_EXT4 0x12000000 -#define PA_EXT4_SIZE 0x02000000 -#define PA_EXT5 0x14000000 -#define PA_EXT5_SIZE 0x04000000 -#define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ - -#define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ -#define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ -#define PA_LED 0xba000000 /* LED */ -#define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ - -#define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ -#define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ -#define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ -#define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ -#define MRSHPC_MODE (PA_MRSHPC + 4) -#define MRSHPC_OPTION (PA_MRSHPC + 6) -#define MRSHPC_CSR (PA_MRSHPC + 8) -#define MRSHPC_ISR (PA_MRSHPC + 10) -#define MRSHPC_ICR (PA_MRSHPC + 12) -#define MRSHPC_CPWCR (PA_MRSHPC + 14) -#define MRSHPC_MW0CR1 (PA_MRSHPC + 16) -#define MRSHPC_MW1CR1 (PA_MRSHPC + 18) -#define MRSHPC_IOWCR1 (PA_MRSHPC + 20) -#define MRSHPC_MW0CR2 (PA_MRSHPC + 22) -#define MRSHPC_MW1CR2 (PA_MRSHPC + 24) -#define MRSHPC_IOWCR2 (PA_MRSHPC + 26) -#define MRSHPC_CDCR (PA_MRSHPC + 28) -#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) - -#define BCR_ILCRA (PA_BCR + 0) -#define BCR_ILCRB (PA_BCR + 2) -#define BCR_ILCRC (PA_BCR + 4) -#define BCR_ILCRD (PA_BCR + 6) -#define BCR_ILCRE (PA_BCR + 8) -#define BCR_ILCRF (PA_BCR + 10) -#define BCR_ILCRG (PA_BCR + 12) - -#define IRQ_79C973 13 - -#define __IO_PREFIX sh7751systemh -#include - -#endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */ diff --git a/include/asm-sh/termbits.h b/include/asm-sh/termbits.h deleted file mode 100644 index 77db116..0000000 --- a/include/asm-sh/termbits.h +++ /dev/null @@ -1,198 +0,0 @@ -#ifndef __ASM_SH_TERMBITS_H -#define __ASM_SH_TERMBITS_H - -#include - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define BOTHER 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* __ASM_SH_TERMBITS_H */ diff --git a/include/asm-sh/termios.h b/include/asm-sh/termios.h deleted file mode 100644 index 0a8c793..0000000 --- a/include/asm-sh/termios.h +++ /dev/null @@ -1,90 +0,0 @@ -#ifndef __ASM_SH_TERMIOS_H -#define __ASM_SH_TERMIOS_H - -#include -#include - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) -#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_TERMIOS_H */ diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h deleted file mode 100644 index eeb4c74..0000000 --- a/include/asm-sh/thread_info.h +++ /dev/null @@ -1,141 +0,0 @@ -#ifndef __ASM_SH_THREAD_INFO_H -#define __ASM_SH_THREAD_INFO_H - -/* SuperH version - * Copyright (C) 2002 Niibe Yutaka - * - * The copyright of original i386 version is: - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ -#ifdef __KERNEL__ -#include - -#ifndef __ASSEMBLY__ -#include - -struct thread_info { - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - __u32 cpu; - int preempt_count; /* 0 => preemptable, <0 => BUG */ - mm_segment_t addr_limit; /* thread address space */ - struct restart_block restart_block; - unsigned long previous_sp; /* sp of previous stack in case - of nested IRQ stacks */ - __u8 supervisor_stack[0]; -}; - -#endif - -#define PREEMPT_ACTIVE 0x10000000 - -#if defined(CONFIG_4KSTACKS) -#define THREAD_SIZE_ORDER (0) -#elif defined(CONFIG_PAGE_SIZE_4KB) -#define THREAD_SIZE_ORDER (1) -#elif defined(CONFIG_PAGE_SIZE_8KB) -#define THREAD_SIZE_ORDER (1) -#elif defined(CONFIG_PAGE_SIZE_16KB) -#define THREAD_SIZE_ORDER (0) -#elif defined(CONFIG_PAGE_SIZE_64KB) -#define THREAD_SIZE_ORDER (0) -#else -#error "Unknown thread size" -#endif - -#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) -#define STACK_WARN (THREAD_SIZE >> 3) - -/* - * macros/functions for gaining access to the thread information structure - */ -#ifndef __ASSEMBLY__ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .addr_limit = KERNEL_DS, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the current stack pointer from C */ -register unsigned long current_stack_pointer asm("r15") __used; - -/* how to get the thread information struct from C */ -static inline struct thread_info *current_thread_info(void) -{ - struct thread_info *ti; -#if defined(CONFIG_SUPERH64) - __asm__ __volatile__ ("getcon cr17, %0" : "=r" (ti)); -#elif defined(CONFIG_CPU_HAS_SR_RB) - __asm__ __volatile__ ("stc r7_bank, %0" : "=r" (ti)); -#else - unsigned long __dummy; - - __asm__ __volatile__ ( - "mov r15, %0\n\t" - "and %1, %0\n\t" - : "=&r" (ti), "=r" (__dummy) - : "1" (~(THREAD_SIZE - 1)) - : "memory"); -#endif - - return ti; -} - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -/* thread information allocation */ -#ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(ti) kzalloc(THREAD_SIZE, GFP_KERNEL) -#else -#define alloc_thread_info(ti) kmalloc(THREAD_SIZE, GFP_KERNEL) -#endif -#define free_thread_info(ti) kfree(ti) - -#endif /* __ASSEMBLY__ */ - -/* - * thread information flags - * - these are process state flags that various assembly files may need to access - * - pending work-to-be-done flags are in LSW - * - other flags in MSW - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_SIGPENDING 1 /* signal pending */ -#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ -#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */ -#define TIF_SINGLESTEP 4 /* singlestepping active */ -#define TIF_SYSCALL_AUDIT 5 -#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ -#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ -#define TIF_MEMDIE 18 -#define TIF_FREEZE 19 - -#define _TIF_SYSCALL_TRACE (1< -#include -#include - -struct sys_timer_ops { - int (*init)(void); - int (*start)(void); - int (*stop)(void); - cycle_t (*read)(void); -#ifndef CONFIG_GENERIC_TIME - unsigned long (*get_offset)(void); -#endif -}; - -struct sys_timer { - const char *name; - - struct sys_device dev; - struct sys_timer_ops *ops; -}; - -#define TICK_SIZE (tick_nsec / 1000) - -extern struct sys_timer tmu_timer, cmt_timer, mtu2_timer; -extern struct sys_timer *sys_timer; - -#ifndef CONFIG_GENERIC_TIME -static inline unsigned long get_timer_offset(void) -{ - return sys_timer->ops->get_offset(); -} -#endif - -/* arch/sh/kernel/timers/timer.c */ -struct sys_timer *get_sys_timer(void); - -/* arch/sh/kernel/time.c */ -void handle_timer_tick(void); -extern unsigned long sh_hpt_frequency; - -#endif /* __ASM_SH_TIMER_H */ diff --git a/include/asm-sh/timex.h b/include/asm-sh/timex.h deleted file mode 100644 index a873e24..0000000 --- a/include/asm-sh/timex.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-sh/timex.h - * - * sh architecture timex specifications - */ -#ifndef __ASM_SH_TIMEX_H -#define __ASM_SH_TIMEX_H - -#define CLOCK_TICK_RATE (CONFIG_SH_PCLK_FREQ / 4) /* Underlying HZ */ - -typedef unsigned long long cycles_t; - -static __inline__ cycles_t get_cycles (void) -{ - return 0; -} - -#endif /* __ASM_SH_TIMEX_H */ diff --git a/include/asm-sh/titan.h b/include/asm-sh/titan.h deleted file mode 100644 index 03f3583..0000000 --- a/include/asm-sh/titan.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Platform defintions for Titan - */ -#ifndef _ASM_SH_TITAN_H -#define _ASM_SH_TITAN_H - -#define __IO_PREFIX titan -#include - -/* IRQ assignments */ -#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */ -#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */ -#define TITAN_IRQ_MPCIA 8 /* mPCI A */ -#define TITAN_IRQ_MPCIB 11 /* mPCI B */ -#define TITAN_IRQ_USB 11 /* USB */ - -#endif /* __ASM_SH_TITAN_H */ diff --git a/include/asm-sh/tlb.h b/include/asm-sh/tlb.h deleted file mode 100644 index 88ff1ae..0000000 --- a/include/asm-sh/tlb.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __ASM_SH_TLB_H -#define __ASM_SH_TLB_H - -#ifdef CONFIG_SUPERH64 -# include "tlb_64.h" -#endif - -#ifndef __ASSEMBLY__ - -#define tlb_start_vma(tlb, vma) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end) - -#define tlb_end_vma(tlb, vma) \ - flush_tlb_range(vma, vma->vm_start, vma->vm_end) - -#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) - -/* - * Flush whole TLBs for MM - */ -#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) - -#include -#include - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_TLB_H */ diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h deleted file mode 100644 index 0a96f3a..0000000 --- a/include/asm-sh/tlb_64.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * include/asm-sh/tlb_64.h - * - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_TLB_64_H -#define __ASM_SH_TLB_64_H - -/* ITLB defines */ -#define ITLB_FIXED 0x00000000 /* First fixed ITLB, see head.S */ -#define ITLB_LAST_VAR_UNRESTRICTED 0x000003F0 /* Last ITLB */ - -/* DTLB defines */ -#define DTLB_FIXED 0x00800000 /* First fixed DTLB, see head.S */ -#define DTLB_LAST_VAR_UNRESTRICTED 0x008003F0 /* Last DTLB */ - -#ifndef __ASSEMBLY__ - -/** - * for_each_dtlb_entry - * - * @tlb: TLB entry - * - * Iterate over free (non-wired) DTLB entries - */ -#define for_each_dtlb_entry(tlb) \ - for (tlb = cpu_data->dtlb.first; \ - tlb <= cpu_data->dtlb.last; \ - tlb += cpu_data->dtlb.step) - -/** - * for_each_itlb_entry - * - * @tlb: TLB entry - * - * Iterate over free (non-wired) ITLB entries - */ -#define for_each_itlb_entry(tlb) \ - for (tlb = cpu_data->itlb.first; \ - tlb <= cpu_data->itlb.last; \ - tlb += cpu_data->itlb.step) - -/** - * __flush_tlb_slot - * - * @slot: Address of TLB slot. - * - * Flushes TLB slot @slot. - */ -static inline void __flush_tlb_slot(unsigned long long slot) -{ - __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot)); -} - -#ifdef CONFIG_MMU -/* arch/sh64/mm/tlb.c */ -int sh64_tlb_init(void); -unsigned long long sh64_next_free_dtlb_entry(void); -unsigned long long sh64_get_wired_dtlb_entry(void); -int sh64_put_wired_dtlb_entry(unsigned long long entry); -void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, - unsigned long asid, unsigned long paddr); -void sh64_teardown_tlb_slot(unsigned long long config_addr); -#else -#define sh64_tlb_init() do { } while (0) -#define sh64_next_free_dtlb_entry() (0) -#define sh64_get_wired_dtlb_entry() (0) -#define sh64_put_wired_dtlb_entry(entry) do { } while (0) -#define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0) -#define sh64_teardown_tlb_slot(addr) do { } while (0) -#endif /* CONFIG_MMU */ -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_SH_TLB_64_H */ diff --git a/include/asm-sh/tlbflush.h b/include/asm-sh/tlbflush.h deleted file mode 100644 index e0ac972..0000000 --- a/include/asm-sh/tlbflush.h +++ /dev/null @@ -1,49 +0,0 @@ -#ifndef __ASM_SH_TLBFLUSH_H -#define __ASM_SH_TLBFLUSH_H - -/* - * TLB flushing: - * - * - flush_tlb_all() flushes all processes TLBs - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - */ -extern void local_flush_tlb_all(void); -extern void local_flush_tlb_mm(struct mm_struct *mm); -extern void local_flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, - unsigned long end); -extern void local_flush_tlb_page(struct vm_area_struct *vma, - unsigned long page); -extern void local_flush_tlb_kernel_range(unsigned long start, - unsigned long end); -extern void local_flush_tlb_one(unsigned long asid, unsigned long page); - -#ifdef CONFIG_SMP - -extern void flush_tlb_all(void); -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); -extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); -extern void flush_tlb_one(unsigned long asid, unsigned long page); - -#else - -#define flush_tlb_all() local_flush_tlb_all() -#define flush_tlb_mm(mm) local_flush_tlb_mm(mm) -#define flush_tlb_page(vma, page) local_flush_tlb_page(vma, page) -#define flush_tlb_one(asid, page) local_flush_tlb_one(asid, page) - -#define flush_tlb_range(vma, start, end) \ - local_flush_tlb_range(vma, start, end) - -#define flush_tlb_kernel_range(start, end) \ - local_flush_tlb_kernel_range(start, end) - -#endif /* CONFIG_SMP */ - -#endif /* __ASM_SH_TLBFLUSH_H */ diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h deleted file mode 100644 index 95f0085..0000000 --- a/include/asm-sh/topology.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef _ASM_SH_TOPOLOGY_H -#define _ASM_SH_TOPOLOGY_H - -#ifdef CONFIG_NUMA - -/* sched_domains SD_NODE_INIT for sh machines */ -#define SD_NODE_INIT (struct sched_domain) { \ - .span = CPU_MASK_NONE, \ - .parent = NULL, \ - .child = NULL, \ - .groups = NULL, \ - .min_interval = 8, \ - .max_interval = 32, \ - .busy_factor = 32, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 3, \ - .idle_idx = 2, \ - .newidle_idx = 2, \ - .wake_idx = 1, \ - .forkexec_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_FORK \ - | SD_BALANCE_EXEC \ - | SD_SERIALIZE \ - | SD_WAKE_BALANCE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ - .nr_balance_failed = 0, \ -} - -#define cpu_to_node(cpu) ((void)(cpu),0) -#define parent_node(node) ((void)(node),0) - -#define node_to_cpumask(node) ((void)node, cpu_online_map) -#define node_to_first_cpu(node) ((void)(node),0) - -#define pcibus_to_node(bus) ((void)(bus), -1) -#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus)) \ - ) -#endif - -#include - -#endif /* _ASM_SH_TOPOLOGY_H */ diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h deleted file mode 100644 index beea4e6..0000000 --- a/include/asm-sh/types.h +++ /dev/null @@ -1,35 +0,0 @@ -#ifndef __ASM_SH_TYPES_H -#define __ASM_SH_TYPES_H - -#include - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -#ifdef CONFIG_SUPERH32 -typedef u16 opcode_t; -#else -typedef u32 opcode_t; -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* __ASM_SH_TYPES_H */ diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h deleted file mode 100644 index 45c2c9b..0000000 --- a/include/asm-sh/uaccess.h +++ /dev/null @@ -1,256 +0,0 @@ -#ifndef __ASM_SH_UACCESS_H -#define __ASM_SH_UACCESS_H - -#include -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define __addr_ok(addr) \ - ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) - -/* - * __access_ok: Check if address with size is OK or not. - * - * Uhhuh, this needs 33-bit arithmetic. We have a carry.. - * - * sum := addr + size; carry? --> flag = true; - * if (sum >= addr_limit) flag = true; - */ -#define __access_ok(addr, size) \ - (__addr_ok((addr) + (size))) -#define access_ok(type, addr, size) \ - (__chk_user_ptr(addr), \ - __access_ok((unsigned long __force)(addr), (size))) - -/* - * Uh, these should become the main single-value transfer routines ... - * They automatically use the right size if we just have the right - * pointer type ... - * - * As SuperH uses the same address space for kernel and user data, we - * can just do these as direct assignments. - * - * Careful to not - * (a) re-use the arguments for side effects (sizeof is ok) - * (b) require any knowledge of processes at this stage - */ -#define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) -#define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the user has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) (*(struct __large_struct __user *)(x)) - -#define __get_user_nocheck(x,ptr,size) \ -({ \ - long __gu_err; \ - unsigned long __gu_val; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x,ptr,size) \ -({ \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ - const __typeof__(*(ptr)) *__gu_addr = (ptr); \ - if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __put_user_nocheck(x,ptr,size) \ -({ \ - long __pu_err; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __put_user_size((x), __pu_addr, (size), __pu_err); \ - __pu_err; \ -}) - -#define __put_user_check(x,ptr,size) \ -({ \ - long __pu_err = -EFAULT; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ - __put_user_size((x), __pu_addr, (size), \ - __pu_err); \ - __pu_err; \ -}) - -#ifdef CONFIG_SUPERH32 -# include "uaccess_32.h" -#else -# include "uaccess_64.h" -#endif - -/* Generic arbitrary sized copy. */ -/* Return the number of bytes NOT copied */ -__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); - -static __always_inline unsigned long -__copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return __copy_user(to, (__force void *)from, n); -} - -static __always_inline unsigned long __must_check -__copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return __copy_user((__force void *)to, from, n); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -/* - * Clear the area and return remaining number of bytes - * (on failure. Usually it's 0.) - */ -__kernel_size_t __clear_user(void *addr, __kernel_size_t size); - -#define clear_user(addr,n) \ -({ \ - void __user * __cl_addr = (addr); \ - unsigned long __cl_size = (n); \ - \ - if (__cl_size && access_ok(VERIFY_WRITE, \ - ((unsigned long)(__cl_addr)), __cl_size)) \ - __cl_size = __clear_user(__cl_addr, __cl_size); \ - \ - __cl_size; \ -}) - -/** - * strncpy_from_user: - Copy a NUL terminated string from userspace. - * @dst: Destination address, in kernel space. This buffer must be at - * least @count bytes long. - * @src: Source address, in user space. - * @count: Maximum number of bytes to copy, including the trailing NUL. - * - * Copies a NUL-terminated string from userspace to kernel space. - * - * On success, returns the length of the string (not including the trailing - * NUL). - * - * If access to userspace fails, returns -EFAULT (some data may have been - * copied). - * - * If @count is smaller than the length of the string, copies @count bytes - * and returns @count. - */ -#define strncpy_from_user(dest,src,count) \ -({ \ - unsigned long __sfu_src = (unsigned long)(src); \ - int __sfu_count = (int)(count); \ - long __sfu_res = -EFAULT; \ - \ - if (__access_ok(__sfu_src, __sfu_count)) \ - __sfu_res = __strncpy_from_user((unsigned long)(dest), \ - __sfu_src, __sfu_count); \ - \ - __sfu_res; \ -}) - -static inline unsigned long -copy_from_user(void *to, const void __user *from, unsigned long n) -{ - unsigned long __copy_from = (unsigned long) from; - __kernel_size_t __copy_size = (__kernel_size_t) n; - - if (__copy_size && __access_ok(__copy_from, __copy_size)) - return __copy_user(to, from, __copy_size); - - return __copy_size; -} - -static inline unsigned long -copy_to_user(void __user *to, const void *from, unsigned long n) -{ - unsigned long __copy_to = (unsigned long) to; - __kernel_size_t __copy_size = (__kernel_size_t) n; - - if (__copy_size && __access_ok(__copy_to, __copy_size)) - return __copy_user(to, from, __copy_size); - - return __copy_size; -} - -/** - * strnlen_user: - Get the size of a string in user space. - * @s: The string to measure. - * @n: The maximum valid length - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * If the string is too long, returns a value greater than @n. - */ -static inline long strnlen_user(const char __user *s, long n) -{ - if (!__addr_ok(s)) - return 0; - else - return __strnlen_user(s, n); -} - -/** - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * - * If there is a limit on the length of a valid string, you may wish to - * consider using strnlen_user() instead. - */ -#define strlen_user(str) strnlen_user(str, ~0UL >> 1) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ -struct exception_table_entry { - unsigned long insn, fixup; -}; - -#if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) -#define ARCH_HAS_SEARCH_EXTABLE -#endif - -int fixup_exception(struct pt_regs *regs); -/* Returns 0 if exception not found and fixup.unit otherwise. */ -unsigned long search_exception_table(unsigned long addr); -const struct exception_table_entry *search_exception_tables(unsigned long addr); - - -#endif /* __ASM_SH_UACCESS_H */ diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h deleted file mode 100644 index 892fd6d..0000000 --- a/include/asm-sh/uaccess_32.h +++ /dev/null @@ -1,249 +0,0 @@ -/* - * User space memory access functions - * - * Copyright (C) 1999, 2002 Niibe Yutaka - * Copyright (C) 2003 - 2008 Paul Mundt - * - * Based on: - * MIPS implementation version 1.15 by - * Copyright (C) 1996, 1997, 1998 by Ralf Baechle - * and i386 version. - */ -#ifndef __ASM_SH_UACCESS_32_H -#define __ASM_SH_UACCESS_32_H - -#define __get_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - __get_user_asm(x, ptr, retval, "b"); \ - break; \ - case 2: \ - __get_user_asm(x, ptr, retval, "w"); \ - break; \ - case 4: \ - __get_user_asm(x, ptr, retval, "l"); \ - break; \ - default: \ - __get_user_unknown(); \ - break; \ - } \ -} while (0) - -#ifdef CONFIG_MMU -#define __get_user_asm(x, addr, err, insn) \ -({ \ -__asm__ __volatile__( \ - "1:\n\t" \ - "mov." insn " %2, %1\n\t" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3:\n\t" \ - "mov #0, %1\n\t" \ - "mov.l 4f, %0\n\t" \ - "jmp @%0\n\t" \ - " mov %3, %0\n\t" \ - ".balign 4\n" \ - "4: .long 2b\n\t" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n\t" \ - ".long 1b, 3b\n\t" \ - ".previous" \ - :"=&r" (err), "=&r" (x) \ - :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) -#else -#define __get_user_asm(x, addr, err, insn) \ -do { \ - __asm__ __volatile__ ( \ - "mov." insn " %1, %0\n\t" \ - : "=&r" (x) \ - : "m" (__m(addr)) \ - ); \ -} while (0) -#endif /* CONFIG_MMU */ - -extern void __get_user_unknown(void); - -#define __put_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - __put_user_asm(x, ptr, retval, "b"); \ - break; \ - case 2: \ - __put_user_asm(x, ptr, retval, "w"); \ - break; \ - case 4: \ - __put_user_asm((u32)x, ptr, \ - retval, "l"); \ - break; \ - case 8: \ - __put_user_u64(x, ptr, retval); \ - break; \ - default: \ - __put_user_unknown(); \ - } \ -} while (0) - -#ifdef CONFIG_MMU -#define __put_user_asm(x, addr, err, insn) \ -do { \ - __asm__ __volatile__ ( \ - "1:\n\t" \ - "mov." insn " %1, %2\n\t" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3:\n\t" \ - "mov.l 4f, %0\n\t" \ - "jmp @%0\n\t" \ - " mov %3, %0\n\t" \ - ".balign 4\n" \ - "4: .long 2b\n\t" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n\t" \ - ".long 1b, 3b\n\t" \ - ".previous" \ - : "=&r" (err) \ - : "r" (x), "m" (__m(addr)), "i" (-EFAULT), \ - "0" (err) \ - : "memory" \ - ); \ -} while (0) -#else -#define __put_user_asm(x, addr, err, insn) \ -do { \ - __asm__ __volatile__ ( \ - "mov." insn " %0, %1\n\t" \ - : /* no outputs */ \ - : "r" (x), "m" (__m(addr)) \ - : "memory" \ - ); \ -} while (0) -#endif /* CONFIG_MMU */ - -#if defined(CONFIG_CPU_LITTLE_ENDIAN) -#define __put_user_u64(val,addr,retval) \ -({ \ -__asm__ __volatile__( \ - "1:\n\t" \ - "mov.l %R1,%2\n\t" \ - "mov.l %S1,%T2\n\t" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3:\n\t" \ - "mov.l 4f,%0\n\t" \ - "jmp @%0\n\t" \ - " mov %3,%0\n\t" \ - ".balign 4\n" \ - "4: .long 2b\n\t" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n\t" \ - ".long 1b, 3b\n\t" \ - ".previous" \ - : "=r" (retval) \ - : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ - : "memory"); }) -#else -#define __put_user_u64(val,addr,retval) \ -({ \ -__asm__ __volatile__( \ - "1:\n\t" \ - "mov.l %S1,%2\n\t" \ - "mov.l %R1,%T2\n\t" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3:\n\t" \ - "mov.l 4f,%0\n\t" \ - "jmp @%0\n\t" \ - " mov %3,%0\n\t" \ - ".balign 4\n" \ - "4: .long 2b\n\t" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n\t" \ - ".long 1b, 3b\n\t" \ - ".previous" \ - : "=r" (retval) \ - : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \ - : "memory"); }) -#endif - -extern void __put_user_unknown(void); - -static inline int -__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) -{ - __kernel_size_t res; - unsigned long __dummy, _d, _s, _c; - - __asm__ __volatile__( - "9:\n" - "mov.b @%2+, %1\n\t" - "cmp/eq #0, %1\n\t" - "bt/s 2f\n" - "1:\n" - "mov.b %1, @%3\n\t" - "dt %4\n\t" - "bf/s 9b\n\t" - " add #1, %3\n\t" - "2:\n\t" - "sub %4, %0\n" - "3:\n" - ".section .fixup,\"ax\"\n" - "4:\n\t" - "mov.l 5f, %1\n\t" - "jmp @%1\n\t" - " mov %9, %0\n\t" - ".balign 4\n" - "5: .long 3b\n" - ".previous\n" - ".section __ex_table,\"a\"\n" - " .balign 4\n" - " .long 9b,4b\n" - ".previous" - : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c) - : "0" (__count), "2" (__src), "3" (__dest), "4" (__count), - "i" (-EFAULT) - : "memory", "t"); - - return res; -} - -/* - * Return the size of a string (including the ending 0 even when we have - * exceeded the maximum string length). - */ -static inline long __strnlen_user(const char __user *__s, long __n) -{ - unsigned long res; - unsigned long __dummy; - - __asm__ __volatile__( - "1:\t" - "mov.b @(%0,%3), %1\n\t" - "cmp/eq %4, %0\n\t" - "bt/s 2f\n\t" - " add #1, %0\n\t" - "tst %1, %1\n\t" - "bf 1b\n\t" - "2:\n" - ".section .fixup,\"ax\"\n" - "3:\n\t" - "mov.l 4f, %1\n\t" - "jmp @%1\n\t" - " mov #0, %0\n" - ".balign 4\n" - "4: .long 2b\n" - ".previous\n" - ".section __ex_table,\"a\"\n" - " .balign 4\n" - " .long 1b,3b\n" - ".previous" - : "=z" (res), "=&r" (__dummy) - : "0" (0), "r" (__s), "r" (__n) - : "t"); - return res; -} - -#endif /* __ASM_SH_UACCESS_32_H */ diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h deleted file mode 100644 index 81b3d51..0000000 --- a/include/asm-sh/uaccess_64.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef __ASM_SH_UACCESS_64_H -#define __ASM_SH_UACCESS_64_H - -/* - * include/asm-sh/uaccess_64.h - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * - * User space memory access functions - * - * Copyright (C) 1999 Niibe Yutaka - * - * Based on: - * MIPS implementation version 1.15 by - * Copyright (C) 1996, 1997, 1998 by Ralf Baechle - * and i386 version. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - -#define __get_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - retval = __get_user_asm_b(x, ptr); \ - break; \ - case 2: \ - retval = __get_user_asm_w(x, ptr); \ - break; \ - case 4: \ - retval = __get_user_asm_l(x, ptr); \ - break; \ - case 8: \ - retval = __get_user_asm_q(x, ptr); \ - break; \ - default: \ - __get_user_unknown(); \ - break; \ - } \ -} while (0) - -extern long __get_user_asm_b(void *, long); -extern long __get_user_asm_w(void *, long); -extern long __get_user_asm_l(void *, long); -extern long __get_user_asm_q(void *, long); -extern void __get_user_unknown(void); - -#define __put_user_size(x,ptr,size,retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: \ - retval = __put_user_asm_b(x, ptr); \ - break; \ - case 2: \ - retval = __put_user_asm_w(x, ptr); \ - break; \ - case 4: \ - retval = __put_user_asm_l(x, ptr); \ - break; \ - case 8: \ - retval = __put_user_asm_q(x, ptr); \ - break; \ - default: \ - __put_user_unknown(); \ - } \ -} while (0) - -extern long __put_user_asm_b(void *, long); -extern long __put_user_asm_w(void *, long); -extern long __put_user_asm_l(void *, long); -extern long __put_user_asm_q(void *, long); -extern void __put_user_unknown(void); - -#endif /* __ASM_SH_UACCESS_64_H */ diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h deleted file mode 100644 index 56f4e30..0000000 --- a/include/asm-sh/ubc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * include/asm-sh/ubc.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2002, 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_SH_UBC_H -#define __ASM_SH_UBC_H -#ifdef __KERNEL__ - -#include - -/* User Break Controller */ -#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709) -#define UBC_TYPE_SH7729 (current_cpu_data.type == CPU_SH7729) -#else -#define UBC_TYPE_SH7729 0 -#endif - -#define BAMR_ASID (1 << 2) -#define BAMR_NONE 0 -#define BAMR_10 0x1 -#define BAMR_12 0x2 -#define BAMR_ALL 0x3 -#define BAMR_16 0x8 -#define BAMR_20 0x9 - -#define BBR_INST (1 << 4) -#define BBR_DATA (2 << 4) -#define BBR_READ (1 << 2) -#define BBR_WRITE (2 << 2) -#define BBR_BYTE 0x1 -#define BBR_HALF 0x2 -#define BBR_LONG 0x3 -#define BBR_QUAD (1 << 6) /* SH7750 */ -#define BBR_CPU (1 << 6) /* SH7709A,SH7729 */ -#define BBR_DMA (2 << 6) /* SH7709A,SH7729 */ - -#define BRCR_CMFA (1 << 15) -#define BRCR_CMFB (1 << 14) -#define BRCR_PCTE (1 << 11) -#define BRCR_PCBA (1 << 10) /* 1: after execution */ -#define BRCR_DBEB (1 << 7) -#define BRCR_PCBB (1 << 6) -#define BRCR_SEQ (1 << 3) -#define BRCR_UBDE (1 << 0) - -#ifndef __ASSEMBLY__ -/* arch/sh/kernel/cpu/ubc.S */ -extern void ubc_sleep(void); - -#ifdef CONFIG_UBC_WAKEUP -extern void ubc_wakeup(void); -#else -#define ubc_wakeup() do { } while (0) -#endif -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UBC_H */ diff --git a/include/asm-sh/ucontext.h b/include/asm-sh/ucontext.h deleted file mode 100644 index 202ef1d..0000000 --- a/include/asm-sh/ucontext.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ASM_SH_UCONTEXT_H -#define __ASM_SH_UCONTEXT_H - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct sigcontext uc_mcontext; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif /* __ASM_SH_UCONTEXT_H */ diff --git a/include/asm-sh/unaligned.h b/include/asm-sh/unaligned.h deleted file mode 100644 index c1641a0..0000000 --- a/include/asm-sh/unaligned.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_SH_UNALIGNED_H -#define _ASM_SH_UNALIGNED_H - -/* SH can't handle unaligned accesses. */ -#ifdef __LITTLE_ENDIAN__ -# include -# include -# include -# define get_unaligned __get_unaligned_le -# define put_unaligned __put_unaligned_le -#else -# include -# include -# include -# define get_unaligned __get_unaligned_be -# define put_unaligned __put_unaligned_be -#endif - -#endif /* _ASM_SH_UNALIGNED_H */ diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h deleted file mode 100644 index 65be656..0000000 --- a/include/asm-sh/unistd.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifdef __KERNEL__ -# ifdef CONFIG_SUPERH32 -# include "unistd_32.h" -# else -# include "unistd_64.h" -# endif -#else -# ifdef __SH5__ -# include "unistd_64.h" -# else -# include "unistd_32.h" -# endif -#endif diff --git a/include/asm-sh/unistd_32.h b/include/asm-sh/unistd_32.h deleted file mode 100644 index d52c000..0000000 --- a/include/asm-sh/unistd_32.h +++ /dev/null @@ -1,384 +0,0 @@ -#ifndef __ASM_SH_UNISTD_H -#define __ASM_SH_UNISTD_H - -/* - * Copyright (C) 1999 Niibe Yutaka - */ - -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lchown 16 -#define __NR_break 17 -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_mpx 56 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_olduname 109 -#define __NR_iopl 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_modify_ldt 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_chown 182 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ -#define __NR_vfork 190 -#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_lchown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_chown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_pivot_root 217 -#define __NR_mincore 218 -#define __NR_madvise 219 -#define __NR_getdents64 220 -#define __NR_fcntl64 221 -/* 223 is unused */ -#define __NR_gettid 224 -#define __NR_readahead 225 -#define __NR_setxattr 226 -#define __NR_lsetxattr 227 -#define __NR_fsetxattr 228 -#define __NR_getxattr 229 -#define __NR_lgetxattr 230 -#define __NR_fgetxattr 231 -#define __NR_listxattr 232 -#define __NR_llistxattr 233 -#define __NR_flistxattr 234 -#define __NR_removexattr 235 -#define __NR_lremovexattr 236 -#define __NR_fremovexattr 237 -#define __NR_tkill 238 -#define __NR_sendfile64 239 -#define __NR_futex 240 -#define __NR_sched_setaffinity 241 -#define __NR_sched_getaffinity 242 -#define __NR_set_thread_area 243 -#define __NR_get_thread_area 244 -#define __NR_io_setup 245 -#define __NR_io_destroy 246 -#define __NR_io_getevents 247 -#define __NR_io_submit 248 -#define __NR_io_cancel 249 -#define __NR_fadvise64 250 - -#define __NR_exit_group 252 -#define __NR_lookup_dcookie 253 -#define __NR_epoll_create 254 -#define __NR_epoll_ctl 255 -#define __NR_epoll_wait 256 -#define __NR_remap_file_pages 257 -#define __NR_set_tid_address 258 -#define __NR_timer_create 259 -#define __NR_timer_settime (__NR_timer_create+1) -#define __NR_timer_gettime (__NR_timer_create+2) -#define __NR_timer_getoverrun (__NR_timer_create+3) -#define __NR_timer_delete (__NR_timer_create+4) -#define __NR_clock_settime (__NR_timer_create+5) -#define __NR_clock_gettime (__NR_timer_create+6) -#define __NR_clock_getres (__NR_timer_create+7) -#define __NR_clock_nanosleep (__NR_timer_create+8) -#define __NR_statfs64 268 -#define __NR_fstatfs64 269 -#define __NR_tgkill 270 -#define __NR_utimes 271 -#define __NR_fadvise64_64 272 -#define __NR_vserver 273 -#define __NR_mbind 274 -#define __NR_get_mempolicy 275 -#define __NR_set_mempolicy 276 -#define __NR_mq_open 277 -#define __NR_mq_unlink (__NR_mq_open+1) -#define __NR_mq_timedsend (__NR_mq_open+2) -#define __NR_mq_timedreceive (__NR_mq_open+3) -#define __NR_mq_notify (__NR_mq_open+4) -#define __NR_mq_getsetattr (__NR_mq_open+5) -#define __NR_kexec_load 283 -#define __NR_waitid 284 -#define __NR_add_key 285 -#define __NR_request_key 286 -#define __NR_keyctl 287 -#define __NR_ioprio_set 288 -#define __NR_ioprio_get 289 -#define __NR_inotify_init 290 -#define __NR_inotify_add_watch 291 -#define __NR_inotify_rm_watch 292 -/* 293 is unused */ -#define __NR_migrate_pages 294 -#define __NR_openat 295 -#define __NR_mkdirat 296 -#define __NR_mknodat 297 -#define __NR_fchownat 298 -#define __NR_futimesat 299 -#define __NR_fstatat64 300 -#define __NR_unlinkat 301 -#define __NR_renameat 302 -#define __NR_linkat 303 -#define __NR_symlinkat 304 -#define __NR_readlinkat 305 -#define __NR_fchmodat 306 -#define __NR_faccessat 307 -#define __NR_pselect6 308 -#define __NR_ppoll 309 -#define __NR_unshare 310 -#define __NR_set_robust_list 311 -#define __NR_get_robust_list 312 -#define __NR_splice 313 -#define __NR_sync_file_range 314 -#define __NR_tee 315 -#define __NR_vmsplice 316 -#define __NR_move_pages 317 -#define __NR_getcpu 318 -#define __NR_epoll_pwait 319 -#define __NR_utimensat 320 -#define __NR_signalfd 321 -#define __NR_timerfd_create 322 -#define __NR_eventfd 323 -#define __NR_fallocate 324 -#define __NR_timerfd_settime 325 -#define __NR_timerfd_gettime 326 -#define __NR_signalfd4 327 -#define __NR_eventfd2 328 -#define __NR_epoll_create1 329 -#define __NR_dup3 330 -#define __NR_pipe2 331 -#define __NR_inotify_init1 332 - -#define NR_syscalls 333 - -#ifdef __KERNEL__ - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UNISTD_H */ diff --git a/include/asm-sh/unistd_64.h b/include/asm-sh/unistd_64.h deleted file mode 100644 index 7c54e91..0000000 --- a/include/asm-sh/unistd_64.h +++ /dev/null @@ -1,423 +0,0 @@ -#ifndef __ASM_SH_UNISTD_64_H -#define __ASM_SH_UNISTD_64_H - -/* - * include/asm-sh/unistd_64.h - * - * This file contains the system call numbers. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 - 2007 Paul Mundt - * Copyright (C) 2004 Sean McGoogan - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lchown 16 -#define __NR_break 17 -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_mpx 56 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */ -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_socketcall 102 /* old implementation of socket systemcall */ -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_olduname 109 -#define __NR_iopl 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86old 113 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_modify_ldt 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_vm86 166 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_chown 182 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_streams1 188 /* some people actually want it */ -#define __NR_streams2 189 /* some people actually want it */ -#define __NR_vfork 190 -#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_lchown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_chown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_pivot_root 217 -#define __NR_mincore 218 -#define __NR_madvise 219 - -/* Non-multiplexed socket family */ -#define __NR_socket 220 -#define __NR_bind 221 -#define __NR_connect 222 -#define __NR_listen 223 -#define __NR_accept 224 -#define __NR_getsockname 225 -#define __NR_getpeername 226 -#define __NR_socketpair 227 -#define __NR_send 228 -#define __NR_sendto 229 -#define __NR_recv 230 -#define __NR_recvfrom 231 -#define __NR_shutdown 232 -#define __NR_setsockopt 233 -#define __NR_getsockopt 234 -#define __NR_sendmsg 235 -#define __NR_recvmsg 236 - -/* Non-multiplexed IPC family */ -#define __NR_semop 237 -#define __NR_semget 238 -#define __NR_semctl 239 -#define __NR_msgsnd 240 -#define __NR_msgrcv 241 -#define __NR_msgget 242 -#define __NR_msgctl 243 -#if 0 -#define __NR_shmatcall 244 -#endif -#define __NR_shmdt 245 -#define __NR_shmget 246 -#define __NR_shmctl 247 - -#define __NR_getdents64 248 -#define __NR_fcntl64 249 -/* 223 is unused */ -#define __NR_gettid 252 -#define __NR_readahead 253 -#define __NR_setxattr 254 -#define __NR_lsetxattr 255 -#define __NR_fsetxattr 256 -#define __NR_getxattr 257 -#define __NR_lgetxattr 258 -#define __NR_fgetxattr 269 -#define __NR_listxattr 260 -#define __NR_llistxattr 261 -#define __NR_flistxattr 262 -#define __NR_removexattr 263 -#define __NR_lremovexattr 264 -#define __NR_fremovexattr 265 -#define __NR_tkill 266 -#define __NR_sendfile64 267 -#define __NR_futex 268 -#define __NR_sched_setaffinity 269 -#define __NR_sched_getaffinity 270 -#define __NR_set_thread_area 271 -#define __NR_get_thread_area 272 -#define __NR_io_setup 273 -#define __NR_io_destroy 274 -#define __NR_io_getevents 275 -#define __NR_io_submit 276 -#define __NR_io_cancel 277 -#define __NR_fadvise64 278 -#define __NR_exit_group 280 - -#define __NR_lookup_dcookie 281 -#define __NR_epoll_create 282 -#define __NR_epoll_ctl 283 -#define __NR_epoll_wait 284 -#define __NR_remap_file_pages 285 -#define __NR_set_tid_address 286 -#define __NR_timer_create 287 -#define __NR_timer_settime (__NR_timer_create+1) -#define __NR_timer_gettime (__NR_timer_create+2) -#define __NR_timer_getoverrun (__NR_timer_create+3) -#define __NR_timer_delete (__NR_timer_create+4) -#define __NR_clock_settime (__NR_timer_create+5) -#define __NR_clock_gettime (__NR_timer_create+6) -#define __NR_clock_getres (__NR_timer_create+7) -#define __NR_clock_nanosleep (__NR_timer_create+8) -#define __NR_statfs64 296 -#define __NR_fstatfs64 297 -#define __NR_tgkill 298 -#define __NR_utimes 299 -#define __NR_fadvise64_64 300 -#define __NR_vserver 301 -#define __NR_mbind 302 -#define __NR_get_mempolicy 303 -#define __NR_set_mempolicy 304 -#define __NR_mq_open 305 -#define __NR_mq_unlink (__NR_mq_open+1) -#define __NR_mq_timedsend (__NR_mq_open+2) -#define __NR_mq_timedreceive (__NR_mq_open+3) -#define __NR_mq_notify (__NR_mq_open+4) -#define __NR_mq_getsetattr (__NR_mq_open+5) -#define __NR_kexec_load 311 -#define __NR_waitid 312 -#define __NR_add_key 313 -#define __NR_request_key 314 -#define __NR_keyctl 315 -#define __NR_ioprio_set 316 -#define __NR_ioprio_get 317 -#define __NR_inotify_init 318 -#define __NR_inotify_add_watch 319 -#define __NR_inotify_rm_watch 320 -/* 321 is unused */ -#define __NR_migrate_pages 322 -#define __NR_openat 323 -#define __NR_mkdirat 324 -#define __NR_mknodat 325 -#define __NR_fchownat 326 -#define __NR_futimesat 327 -#define __NR_fstatat64 328 -#define __NR_unlinkat 329 -#define __NR_renameat 330 -#define __NR_linkat 331 -#define __NR_symlinkat 332 -#define __NR_readlinkat 333 -#define __NR_fchmodat 334 -#define __NR_faccessat 335 -#define __NR_pselect6 336 -#define __NR_ppoll 337 -#define __NR_unshare 338 -#define __NR_set_robust_list 339 -#define __NR_get_robust_list 340 -#define __NR_splice 341 -#define __NR_sync_file_range 342 -#define __NR_tee 343 -#define __NR_vmsplice 344 -#define __NR_move_pages 345 -#define __NR_getcpu 346 -#define __NR_epoll_pwait 347 -#define __NR_utimensat 348 -#define __NR_signalfd 349 -#define __NR_timerfd_create 350 -#define __NR_eventfd 351 -#define __NR_fallocate 352 -#define __NR_timerfd_settime 353 -#define __NR_timerfd_gettime 354 -#define __NR_signalfd4 355 -#define __NR_eventfd2 356 -#define __NR_epoll_create1 357 -#define __NR_dup3 358 -#define __NR_pipe2 359 -#define __NR_inotify_init1 360 - -#ifdef __KERNEL__ - -#define NR_syscalls 361 - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#ifndef cond_syscall -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_UNISTD_64_H */ diff --git a/include/asm-sh/user.h b/include/asm-sh/user.h deleted file mode 100644 index 8fd3cf6..0000000 --- a/include/asm-sh/user.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef __ASM_SH_USER_H -#define __ASM_SH_USER_H - -#include -#include - -/* - * Core file format: The core file is written in such a way that gdb - * can understand it and provide useful information to the user (under - * linux we use the `trad-core' bfd). The file contents are as follows: - * - * upage: 1 page consisting of a user struct that tells gdb - * what is present in the file. Directly after this is a - * copy of the task_struct, which is currently not used by gdb, - * but it may come in handy at some point. All of the registers - * are stored as part of the upage. The upage should always be - * only one page long. - * data: The data segment follows next. We use current->end_text to - * current->brk to pick up all of the user variables, plus any memory - * that may have been sbrk'ed. No attempt is made to determine if a - * page is demand-zero or if a page is totally unused, we just cover - * the entire range. All of the addresses are rounded in such a way - * that an integral number of pages is written. - * stack: We need the stack information in order to get a meaningful - * backtrace. We need to write the data from usp to - * current->start_stack, so we round each of these in order to be able - * to write an integer number of pages. - */ - -#if defined(__SH5__) || defined(CONFIG_CPU_SH5) -struct user_fpu_struct { - unsigned long fp_regs[32]; - unsigned int fpscr; -}; -#else -struct user_fpu_struct { - unsigned long fp_regs[16]; - unsigned long xfp_regs[16]; - unsigned long fpscr; - unsigned long fpul; -}; -#endif - -struct user { - struct pt_regs regs; /* entire machine state */ - struct user_fpu_struct fpu; /* Math Co-processor registers */ - int u_fpvalid; /* True if math co-processor being used */ - size_t u_tsize; /* text size (pages) */ - size_t u_dsize; /* data size (pages) */ - size_t u_ssize; /* stack size (pages) */ - unsigned long start_code; /* text starting address */ - unsigned long start_data; /* data starting address */ - unsigned long start_stack; /* stack starting address */ - long int signal; /* signal causing core dump */ - unsigned long u_ar0; /* help gdb find registers */ - struct user_fpu_struct* u_fpstate; /* Math Co-processor pointer */ - unsigned long magic; /* identifies a core file */ - char u_comm[32]; /* user command name */ -}; - -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_DATA_START_ADDR (u.start_data) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) - -#endif /* __ASM_SH_USER_H */ diff --git a/include/asm-sh/vga.h b/include/asm-sh/vga.h deleted file mode 100644 index 06a5de8..0000000 --- a/include/asm-sh/vga.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_SH_VGA_H -#define __ASM_SH_VGA_H - -/* Stupid drivers. */ - -#endif /* __ASM_SH_VGA_H */ diff --git a/include/asm-sh/watchdog.h b/include/asm-sh/watchdog.h deleted file mode 100644 index d19ea62..0000000 --- a/include/asm-sh/watchdog.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * include/asm-sh/watchdog.h - * - * Copyright (C) 2002, 2003 Paul Mundt - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __ASM_SH_WATCHDOG_H -#define __ASM_SH_WATCHDOG_H -#ifdef __KERNEL__ - -#include -#include -#include - -/* - * See asm/cpu-sh2/watchdog.h for explanation of this stupidity.. - */ -#ifndef WTCNT_R -# define WTCNT_R WTCNT -#endif - -#ifndef WTCSR_R -# define WTCSR_R WTCSR -#endif - -#define WTCNT_HIGH 0x5a -#define WTCSR_HIGH 0xa5 - -#define WTCSR_CKS2 0x04 -#define WTCSR_CKS1 0x02 -#define WTCSR_CKS0 0x01 - -/* - * CKS0-2 supports a number of clock division ratios. At the time the watchdog - * is enabled, it defaults to a 41 usec overflow period .. we overload this to - * something a little more reasonable, and really can't deal with anything - * lower than WTCSR_CKS_1024, else we drop back into the usec range. - * - * Clock Division Ratio Overflow Period - * -------------------------------------------- - * 1/32 (initial value) 41 usecs - * 1/64 82 usecs - * 1/128 164 usecs - * 1/256 328 usecs - * 1/512 656 usecs - * 1/1024 1.31 msecs - * 1/2048 2.62 msecs - * 1/4096 5.25 msecs - */ -#define WTCSR_CKS_32 0x00 -#define WTCSR_CKS_64 0x01 -#define WTCSR_CKS_128 0x02 -#define WTCSR_CKS_256 0x03 -#define WTCSR_CKS_512 0x04 -#define WTCSR_CKS_1024 0x05 -#define WTCSR_CKS_2048 0x06 -#define WTCSR_CKS_4096 0x07 - -/** - * sh_wdt_read_cnt - Read from Counter - * Reads back the WTCNT value. - */ -static inline __u8 sh_wdt_read_cnt(void) -{ - return ctrl_inb(WTCNT_R); -} - -/** - * sh_wdt_write_cnt - Write to Counter - * @val: Value to write - * - * Writes the given value @val to the lower byte of the timer counter. - * The upper byte is set manually on each write. - */ -static inline void sh_wdt_write_cnt(__u8 val) -{ - ctrl_outw((WTCNT_HIGH << 8) | (__u16)val, WTCNT); -} - -/** - * sh_wdt_read_csr - Read from Control/Status Register - * - * Reads back the WTCSR value. - */ -static inline __u8 sh_wdt_read_csr(void) -{ - return ctrl_inb(WTCSR_R); -} - -/** - * sh_wdt_write_csr - Write to Control/Status Register - * @val: Value to write - * - * Writes the given value @val to the lower byte of the control/status - * register. The upper byte is set manually on each write. - */ -static inline void sh_wdt_write_csr(__u8 val) -{ - ctrl_outw((WTCSR_HIGH << 8) | (__u16)val, WTCSR); -} - -#endif /* __KERNEL__ */ -#endif /* __ASM_SH_WATCHDOG_H */ diff --git a/include/asm-sh/xor.h b/include/asm-sh/xor.h deleted file mode 100644 index c82eb12..0000000 --- a/include/asm-sh/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include -- cgit v1.1 From 56edb58be157a06dc147a988af3588059556d392 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Tue, 29 Jul 2008 01:23:32 +0200 Subject: mfd: add platform_data to mfd_cell Adding platform_data to mfd_cell allows passing of platform data directly to the platform_device created for each cell and thus reuse of existing drivers. On the other side it can be used as a hook to mfd_cell itself removing the need in mfd_get_cell method. Signed-off-by: Mike Rapoport Acked-by: Dmitry Baryshkov Signed-off-by: Samuel Ortiz --- include/linux/mfd/core.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index b7cbb99..ea45d4a 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -29,7 +29,13 @@ struct mfd_cell { int (*suspend)(struct platform_device *dev); int (*resume)(struct platform_device *dev); - void *driver_data; /* driver-specific data */ + /* driver-specific data for MFD-aware "cell" drivers */ + void *driver_data; + + /* platform_data can be used to either pass data to "generic" + driver or as a hook to mfd_cell for the "cell" drivers */ + void *platform_data; + size_t data_size; /* * This resources can be specified relatievly to the parent device. @@ -39,11 +45,6 @@ struct mfd_cell { const struct resource *resources; }; -static inline struct mfd_cell *mfd_get_cell(struct platform_device *pdev) -{ - return (struct mfd_cell *)pdev->dev.platform_data; -} - extern int mfd_add_devices(struct platform_device *parent, const struct mfd_cell *cells, int n_devs, struct resource *mem_base, -- cgit v1.1 From 6beeac76f5f96590fb751af5e138fbc3f62e8460 Mon Sep 17 00:00:00 2001 From: Andrea Arcangeli Date: Mon, 28 Jul 2008 15:46:22 -0700 Subject: mmu-notifiers: add list_del_init_rcu() Introduce list_del_init_rcu() and document it. Signed-off-by: Andrea Arcangeli Acked-by: Linus Torvalds Cc: "Paul E. McKenney" Cc: Ingo Molnar Cc: Christoph Lameter Cc: Jack Steiner Cc: Robin Holt Cc: Nick Piggin Cc: Peter Zijlstra Cc: Kanoj Sarcar Cc: Roland Dreier Cc: Steve Wise Cc: Avi Kivity Cc: Hugh Dickins Cc: Rusty Russell Cc: Anthony Liguori Cc: Chris Wright Cc: Marcelo Tosatti Cc: Eric Dumazet Cc: "Paul E. McKenney" Cc: Izik Eidus Cc: Anthony Liguori Cc: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/rculist.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'include') diff --git a/include/linux/rculist.h b/include/linux/rculist.h index b0f39be..eb4443c 100644 --- a/include/linux/rculist.h +++ b/include/linux/rculist.h @@ -98,6 +98,34 @@ static inline void list_del_rcu(struct list_head *entry) } /** + * hlist_del_init_rcu - deletes entry from hash list with re-initialization + * @n: the element to delete from the hash list. + * + * Note: list_unhashed() on the node return true after this. It is + * useful for RCU based read lockfree traversal if the writer side + * must know if the list entry is still hashed or already unhashed. + * + * In particular, it means that we can not poison the forward pointers + * that may still be used for walking the hash list and we can only + * zero the pprev pointer so list_unhashed() will return true after + * this. + * + * The caller must take whatever precautions are necessary (such as + * holding appropriate locks) to avoid racing with another + * list-mutation primitive, such as hlist_add_head_rcu() or + * hlist_del_rcu(), running on this same list. However, it is + * perfectly legal to run concurrently with the _rcu list-traversal + * primitives, such as hlist_for_each_entry_rcu(). + */ +static inline void hlist_del_init_rcu(struct hlist_node *n) +{ + if (!hlist_unhashed(n)) { + __hlist_del(n); + n->pprev = NULL; + } +} + +/** * list_replace_rcu - replace old entry by new one * @old : the element to be replaced * @new : the new element to insert -- cgit v1.1 From 7906d00cd1f687268f0a3599442d113767795ae6 Mon Sep 17 00:00:00 2001 From: Andrea Arcangeli Date: Mon, 28 Jul 2008 15:46:26 -0700 Subject: mmu-notifiers: add mm_take_all_locks() operation mm_take_all_locks holds off reclaim from an entire mm_struct. This allows mmu notifiers to register into the mm at any time with the guarantee that no mmu operation is in progress on the mm. This operation locks against the VM for all pte/vma/mm related operations that could ever happen on a certain mm. This includes vmtruncate, try_to_unmap, and all page faults. The caller must take the mmap_sem in write mode before calling mm_take_all_locks(). The caller isn't allowed to release the mmap_sem until mm_drop_all_locks() returns. mmap_sem in write mode is required in order to block all operations that could modify pagetables and free pages without need of altering the vma layout (for example populate_range() with nonlinear vmas). It's also needed in write mode to avoid new anon_vmas to be associated with existing vmas. A single task can't take more than one mm_take_all_locks() in a row or it would deadlock. mm_take_all_locks() and mm_drop_all_locks are expensive operations that may have to take thousand of locks. mm_take_all_locks() can fail if it's interrupted by signals. When mmu_notifier_register returns, we must be sure that the driver is notified if some task is in the middle of a vmtruncate for the 'mm' where the mmu notifier was registered (mmu_notifier_invalidate_range_start/end is run around the vmtruncation but mmu_notifier_register can run after mmu_notifier_invalidate_range_start and before mmu_notifier_invalidate_range_end). Same problem for rmap paths. And we've to remove page pinning to avoid replicating the tlb_gather logic inside KVM (and GRU doesn't work well with page pinning regardless of needing tlb_gather), so without mm_take_all_locks when vmtruncate frees the page, kvm would have no way to notice that it mapped into sptes a page that is going into the freelist without a chance of any further mmu_notifier notification. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Andrea Arcangeli Acked-by: Linus Torvalds Cc: Christoph Lameter Cc: Jack Steiner Cc: Robin Holt Cc: Nick Piggin Cc: Peter Zijlstra Cc: Kanoj Sarcar Cc: Roland Dreier Cc: Steve Wise Cc: Avi Kivity Cc: Hugh Dickins Cc: Rusty Russell Cc: Anthony Liguori Cc: Chris Wright Cc: Marcelo Tosatti Cc: Eric Dumazet Cc: "Paul E. McKenney" Cc: Izik Eidus Cc: Anthony Liguori Cc: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm.h | 3 +++ include/linux/pagemap.h | 1 + include/linux/rmap.h | 8 ++++++++ 3 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/linux/mm.h b/include/linux/mm.h index 6e695ea..866a3db 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -1104,6 +1104,9 @@ extern struct vm_area_struct *copy_vma(struct vm_area_struct **, unsigned long addr, unsigned long len, pgoff_t pgoff); extern void exit_mmap(struct mm_struct *); +extern int mm_take_all_locks(struct mm_struct *mm); +extern void mm_drop_all_locks(struct mm_struct *mm); + #ifdef CONFIG_PROC_FS /* From fs/proc/base.c. callers must _not_ hold the mm's exe_file_lock */ extern void added_exe_file_vma(struct mm_struct *mm); diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index a81d818..a39b38c 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -20,6 +20,7 @@ */ #define AS_EIO (__GFP_BITS_SHIFT + 0) /* IO error on async write */ #define AS_ENOSPC (__GFP_BITS_SHIFT + 1) /* ENOSPC on async write */ +#define AS_MM_ALL_LOCKS (__GFP_BITS_SHIFT + 2) /* under mm_take_all_locks() */ static inline void mapping_set_error(struct address_space *mapping, int error) { diff --git a/include/linux/rmap.h b/include/linux/rmap.h index 1383692..69407f8 100644 --- a/include/linux/rmap.h +++ b/include/linux/rmap.h @@ -26,6 +26,14 @@ */ struct anon_vma { spinlock_t lock; /* Serialize access to vma list */ + /* + * NOTE: the LSB of the head.next is set by + * mm_take_all_locks() _after_ taking the above lock. So the + * head must only be read/written after taking the above lock + * to be sure to see a valid next pointer. The LSB bit itself + * is serialized by a system wide lock only visible to + * mm_take_all_locks() (mm_all_locks_mutex). + */ struct list_head head; /* List of private "related" vmas */ }; -- cgit v1.1 From cddb8a5c14aa89810b40495d94d3d2a0faee6619 Mon Sep 17 00:00:00 2001 From: Andrea Arcangeli Date: Mon, 28 Jul 2008 15:46:29 -0700 Subject: mmu-notifiers: core With KVM/GFP/XPMEM there isn't just the primary CPU MMU pointing to pages. There are secondary MMUs (with secondary sptes and secondary tlbs) too. sptes in the kvm case are shadow pagetables, but when I say spte in mmu-notifier context, I mean "secondary pte". In GRU case there's no actual secondary pte and there's only a secondary tlb because the GRU secondary MMU has no knowledge about sptes and every secondary tlb miss event in the MMU always generates a page fault that has to be resolved by the CPU (this is not the case of KVM where the a secondary tlb miss will walk sptes in hardware and it will refill the secondary tlb transparently to software if the corresponding spte is present). The same way zap_page_range has to invalidate the pte before freeing the page, the spte (and secondary tlb) must also be invalidated before any page is freed and reused. Currently we take a page_count pin on every page mapped by sptes, but that means the pages can't be swapped whenever they're mapped by any spte because they're part of the guest working set. Furthermore a spte unmap event can immediately lead to a page to be freed when the pin is released (so requiring the same complex and relatively slow tlb_gather smp safe logic we have in zap_page_range and that can be avoided completely if the spte unmap event doesn't require an unpin of the page previously mapped in the secondary MMU). The mmu notifiers allow kvm/GRU/XPMEM to attach to the tsk->mm and know when the VM is swapping or freeing or doing anything on the primary MMU so that the secondary MMU code can drop sptes before the pages are freed, avoiding all page pinning and allowing 100% reliable swapping of guest physical address space. Furthermore it avoids the code that teardown the mappings of the secondary MMU, to implement a logic like tlb_gather in zap_page_range that would require many IPI to flush other cpu tlbs, for each fixed number of spte unmapped. To make an example: if what happens on the primary MMU is a protection downgrade (from writeable to wrprotect) the secondary MMU mappings will be invalidated, and the next secondary-mmu-page-fault will call get_user_pages and trigger a do_wp_page through get_user_pages if it called get_user_pages with write=1, and it'll re-establishing an updated spte or secondary-tlb-mapping on the copied page. Or it will setup a readonly spte or readonly tlb mapping if it's a guest-read, if it calls get_user_pages with write=0. This is just an example. This allows to map any page pointed by any pte (and in turn visible in the primary CPU MMU), into a secondary MMU (be it a pure tlb like GRU, or an full MMU with both sptes and secondary-tlb like the shadow-pagetable layer with kvm), or a remote DMA in software like XPMEM (hence needing of schedule in XPMEM code to send the invalidate to the remote node, while no need to schedule in kvm/gru as it's an immediate event like invalidating primary-mmu pte). At least for KVM without this patch it's impossible to swap guests reliably. And having this feature and removing the page pin allows several other optimizations that simplify life considerably. Dependencies: 1) mm_take_all_locks() to register the mmu notifier when the whole VM isn't doing anything with "mm". This allows mmu notifier users to keep track if the VM is in the middle of the invalidate_range_begin/end critical section with an atomic counter incraese in range_begin and decreased in range_end. No secondary MMU page fault is allowed to map any spte or secondary tlb reference, while the VM is in the middle of range_begin/end as any page returned by get_user_pages in that critical section could later immediately be freed without any further ->invalidate_page notification (invalidate_range_begin/end works on ranges and ->invalidate_page isn't called immediately before freeing the page). To stop all page freeing and pagetable overwrites the mmap_sem must be taken in write mode and all other anon_vma/i_mmap locks must be taken too. 2) It'd be a waste to add branches in the VM if nobody could possibly run KVM/GRU/XPMEM on the kernel, so mmu notifiers will only enabled if CONFIG_KVM=m/y. In the current kernel kvm won't yet take advantage of mmu notifiers, but this already allows to compile a KVM external module against a kernel with mmu notifiers enabled and from the next pull from kvm.git we'll start using them. And GRU/XPMEM will also be able to continue the development by enabling KVM=m in their config, until they submit all GRU/XPMEM GPLv2 code to the mainline kernel. Then they can also enable MMU_NOTIFIERS in the same way KVM does it (even if KVM=n). This guarantees nobody selects MMU_NOTIFIER=y if KVM and GRU and XPMEM are all =n. The mmu_notifier_register call can fail because mm_take_all_locks may be interrupted by a signal and return -EINTR. Because mmu_notifier_reigster is used when a driver startup, a failure can be gracefully handled. Here an example of the change applied to kvm to register the mmu notifiers. Usually when a driver startups other allocations are required anyway and -ENOMEM failure paths exists already. struct kvm *kvm_arch_create_vm(void) { struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL); + int err; if (!kvm) return ERR_PTR(-ENOMEM); INIT_LIST_HEAD(&kvm->arch.active_mmu_pages); + kvm->arch.mmu_notifier.ops = &kvm_mmu_notifier_ops; + err = mmu_notifier_register(&kvm->arch.mmu_notifier, current->mm); + if (err) { + kfree(kvm); + return ERR_PTR(err); + } + return kvm; } mmu_notifier_unregister returns void and it's reliable. The patch also adds a few needed but missing includes that would prevent kernel to compile after these changes on non-x86 archs (x86 didn't need them by luck). [akpm@linux-foundation.org: coding-style fixes] [akpm@linux-foundation.org: fix mm/filemap_xip.c build] [akpm@linux-foundation.org: fix mm/mmu_notifier.c build] Signed-off-by: Andrea Arcangeli Signed-off-by: Nick Piggin Signed-off-by: Christoph Lameter Cc: Jack Steiner Cc: Robin Holt Cc: Nick Piggin Cc: Peter Zijlstra Cc: Kanoj Sarcar Cc: Roland Dreier Cc: Steve Wise Cc: Avi Kivity Cc: Hugh Dickins Cc: Rusty Russell Cc: Anthony Liguori Cc: Chris Wright Cc: Marcelo Tosatti Cc: Eric Dumazet Cc: "Paul E. McKenney" Cc: Izik Eidus Cc: Anthony Liguori Cc: Rik van Riel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 4 + include/linux/mmu_notifier.h | 279 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 283 insertions(+) create mode 100644 include/linux/mmu_notifier.h (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index 746f975..386edbe 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -10,6 +10,7 @@ #include #include #include +#include #include #include @@ -253,6 +254,9 @@ struct mm_struct { struct file *exe_file; unsigned long num_exe_file_vmas; #endif +#ifdef CONFIG_MMU_NOTIFIER + struct mmu_notifier_mm *mmu_notifier_mm; +#endif }; #endif /* _LINUX_MM_TYPES_H */ diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h new file mode 100644 index 0000000..b77486d --- /dev/null +++ b/include/linux/mmu_notifier.h @@ -0,0 +1,279 @@ +#ifndef _LINUX_MMU_NOTIFIER_H +#define _LINUX_MMU_NOTIFIER_H + +#include +#include +#include + +struct mmu_notifier; +struct mmu_notifier_ops; + +#ifdef CONFIG_MMU_NOTIFIER + +/* + * The mmu notifier_mm structure is allocated and installed in + * mm->mmu_notifier_mm inside the mm_take_all_locks() protected + * critical section and it's released only when mm_count reaches zero + * in mmdrop(). + */ +struct mmu_notifier_mm { + /* all mmu notifiers registerd in this mm are queued in this list */ + struct hlist_head list; + /* to serialize the list modifications and hlist_unhashed */ + spinlock_t lock; +}; + +struct mmu_notifier_ops { + /* + * Called either by mmu_notifier_unregister or when the mm is + * being destroyed by exit_mmap, always before all pages are + * freed. This can run concurrently with other mmu notifier + * methods (the ones invoked outside the mm context) and it + * should tear down all secondary mmu mappings and freeze the + * secondary mmu. If this method isn't implemented you've to + * be sure that nothing could possibly write to the pages + * through the secondary mmu by the time the last thread with + * tsk->mm == mm exits. + * + * As side note: the pages freed after ->release returns could + * be immediately reallocated by the gart at an alias physical + * address with a different cache model, so if ->release isn't + * implemented because all _software_ driven memory accesses + * through the secondary mmu are terminated by the time the + * last thread of this mm quits, you've also to be sure that + * speculative _hardware_ operations can't allocate dirty + * cachelines in the cpu that could not be snooped and made + * coherent with the other read and write operations happening + * through the gart alias address, so leading to memory + * corruption. + */ + void (*release)(struct mmu_notifier *mn, + struct mm_struct *mm); + + /* + * clear_flush_young is called after the VM is + * test-and-clearing the young/accessed bitflag in the + * pte. This way the VM will provide proper aging to the + * accesses to the page through the secondary MMUs and not + * only to the ones through the Linux pte. + */ + int (*clear_flush_young)(struct mmu_notifier *mn, + struct mm_struct *mm, + unsigned long address); + + /* + * Before this is invoked any secondary MMU is still ok to + * read/write to the page previously pointed to by the Linux + * pte because the page hasn't been freed yet and it won't be + * freed until this returns. If required set_page_dirty has to + * be called internally to this method. + */ + void (*invalidate_page)(struct mmu_notifier *mn, + struct mm_struct *mm, + unsigned long address); + + /* + * invalidate_range_start() and invalidate_range_end() must be + * paired and are called only when the mmap_sem and/or the + * locks protecting the reverse maps are held. The subsystem + * must guarantee that no additional references are taken to + * the pages in the range established between the call to + * invalidate_range_start() and the matching call to + * invalidate_range_end(). + * + * Invalidation of multiple concurrent ranges may be + * optionally permitted by the driver. Either way the + * establishment of sptes is forbidden in the range passed to + * invalidate_range_begin/end for the whole duration of the + * invalidate_range_begin/end critical section. + * + * invalidate_range_start() is called when all pages in the + * range are still mapped and have at least a refcount of one. + * + * invalidate_range_end() is called when all pages in the + * range have been unmapped and the pages have been freed by + * the VM. + * + * The VM will remove the page table entries and potentially + * the page between invalidate_range_start() and + * invalidate_range_end(). If the page must not be freed + * because of pending I/O or other circumstances then the + * invalidate_range_start() callback (or the initial mapping + * by the driver) must make sure that the refcount is kept + * elevated. + * + * If the driver increases the refcount when the pages are + * initially mapped into an address space then either + * invalidate_range_start() or invalidate_range_end() may + * decrease the refcount. If the refcount is decreased on + * invalidate_range_start() then the VM can free pages as page + * table entries are removed. If the refcount is only + * droppped on invalidate_range_end() then the driver itself + * will drop the last refcount but it must take care to flush + * any secondary tlb before doing the final free on the + * page. Pages will no longer be referenced by the linux + * address space but may still be referenced by sptes until + * the last refcount is dropped. + */ + void (*invalidate_range_start)(struct mmu_notifier *mn, + struct mm_struct *mm, + unsigned long start, unsigned long end); + void (*invalidate_range_end)(struct mmu_notifier *mn, + struct mm_struct *mm, + unsigned long start, unsigned long end); +}; + +/* + * The notifier chains are protected by mmap_sem and/or the reverse map + * semaphores. Notifier chains are only changed when all reverse maps and + * the mmap_sem locks are taken. + * + * Therefore notifier chains can only be traversed when either + * + * 1. mmap_sem is held. + * 2. One of the reverse map locks is held (i_mmap_lock or anon_vma->lock). + * 3. No other concurrent thread can access the list (release) + */ +struct mmu_notifier { + struct hlist_node hlist; + const struct mmu_notifier_ops *ops; +}; + +static inline int mm_has_notifiers(struct mm_struct *mm) +{ + return unlikely(mm->mmu_notifier_mm); +} + +extern int mmu_notifier_register(struct mmu_notifier *mn, + struct mm_struct *mm); +extern int __mmu_notifier_register(struct mmu_notifier *mn, + struct mm_struct *mm); +extern void mmu_notifier_unregister(struct mmu_notifier *mn, + struct mm_struct *mm); +extern void __mmu_notifier_mm_destroy(struct mm_struct *mm); +extern void __mmu_notifier_release(struct mm_struct *mm); +extern int __mmu_notifier_clear_flush_young(struct mm_struct *mm, + unsigned long address); +extern void __mmu_notifier_invalidate_page(struct mm_struct *mm, + unsigned long address); +extern void __mmu_notifier_invalidate_range_start(struct mm_struct *mm, + unsigned long start, unsigned long end); +extern void __mmu_notifier_invalidate_range_end(struct mm_struct *mm, + unsigned long start, unsigned long end); + +static inline void mmu_notifier_release(struct mm_struct *mm) +{ + if (mm_has_notifiers(mm)) + __mmu_notifier_release(mm); +} + +static inline int mmu_notifier_clear_flush_young(struct mm_struct *mm, + unsigned long address) +{ + if (mm_has_notifiers(mm)) + return __mmu_notifier_clear_flush_young(mm, address); + return 0; +} + +static inline void mmu_notifier_invalidate_page(struct mm_struct *mm, + unsigned long address) +{ + if (mm_has_notifiers(mm)) + __mmu_notifier_invalidate_page(mm, address); +} + +static inline void mmu_notifier_invalidate_range_start(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ + if (mm_has_notifiers(mm)) + __mmu_notifier_invalidate_range_start(mm, start, end); +} + +static inline void mmu_notifier_invalidate_range_end(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ + if (mm_has_notifiers(mm)) + __mmu_notifier_invalidate_range_end(mm, start, end); +} + +static inline void mmu_notifier_mm_init(struct mm_struct *mm) +{ + mm->mmu_notifier_mm = NULL; +} + +static inline void mmu_notifier_mm_destroy(struct mm_struct *mm) +{ + if (mm_has_notifiers(mm)) + __mmu_notifier_mm_destroy(mm); +} + +/* + * These two macros will sometime replace ptep_clear_flush. + * ptep_clear_flush is impleemnted as macro itself, so this also is + * implemented as a macro until ptep_clear_flush will converted to an + * inline function, to diminish the risk of compilation failure. The + * invalidate_page method over time can be moved outside the PT lock + * and these two macros can be later removed. + */ +#define ptep_clear_flush_notify(__vma, __address, __ptep) \ +({ \ + pte_t __pte; \ + struct vm_area_struct *___vma = __vma; \ + unsigned long ___address = __address; \ + __pte = ptep_clear_flush(___vma, ___address, __ptep); \ + mmu_notifier_invalidate_page(___vma->vm_mm, ___address); \ + __pte; \ +}) + +#define ptep_clear_flush_young_notify(__vma, __address, __ptep) \ +({ \ + int __young; \ + struct vm_area_struct *___vma = __vma; \ + unsigned long ___address = __address; \ + __young = ptep_clear_flush_young(___vma, ___address, __ptep); \ + __young |= mmu_notifier_clear_flush_young(___vma->vm_mm, \ + ___address); \ + __young; \ +}) + +#else /* CONFIG_MMU_NOTIFIER */ + +static inline void mmu_notifier_release(struct mm_struct *mm) +{ +} + +static inline int mmu_notifier_clear_flush_young(struct mm_struct *mm, + unsigned long address) +{ + return 0; +} + +static inline void mmu_notifier_invalidate_page(struct mm_struct *mm, + unsigned long address) +{ +} + +static inline void mmu_notifier_invalidate_range_start(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + +static inline void mmu_notifier_invalidate_range_end(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + +static inline void mmu_notifier_mm_init(struct mm_struct *mm) +{ +} + +static inline void mmu_notifier_mm_destroy(struct mm_struct *mm) +{ +} + +#define ptep_clear_flush_young_notify ptep_clear_flush_young +#define ptep_clear_flush_notify ptep_clear_flush + +#endif /* CONFIG_MMU_NOTIFIER */ + +#endif /* _LINUX_MMU_NOTIFIER_H */ -- cgit v1.1 From cb1d0a7a5d2e537f2f6ada22883abee1762e94b2 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 28 Jul 2008 15:46:33 -0700 Subject: spi_s3c24xx: really assign busnum The original "Pass the bus number we expect the S3C24XX SPI driver to attach to via the platform data." [1] patch was mis-sent, and missed two important parts of the diff, which was to actually set the bus_num field and add the relevant field to the platform data. The previous commit 50f426b55d919dd017af35bb6a08753d1f262920 promised to add a bus_num field, but failed to include the two hunks that added this field to include/asm-arm/arch-s3c2410/spi.h and then pass it to the spi core when creating the new master field in drivers/spi/spi_s3c24xx.c. [1] git commit 50f426b55d919dd017af35bb6a08753d1f262920 Signed-off-by: Ben Dooks Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-arm/arch-s3c2410/spi.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/spi.h b/include/asm-arm/arch-s3c2410/spi.h index 352d338..4421698 100644 --- a/include/asm-arm/arch-s3c2410/spi.h +++ b/include/asm-arm/arch-s3c2410/spi.h @@ -16,6 +16,7 @@ struct s3c2410_spi_info { unsigned long pin_cs; /* simple gpio cs */ unsigned int num_cs; /* total chipselects */ + int bus_num; /* bus number to use. */ void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); }; -- cgit v1.1 From 8ab22b9abb5c55413802e4adc9aa6223324547c3 Mon Sep 17 00:00:00 2001 From: Hisashi Hifumi Date: Mon, 28 Jul 2008 15:46:36 -0700 Subject: vfs: pagecache usage optimization for pagesize!=blocksize When we read some part of a file through pagecache, if there is a pagecache of corresponding index but this page is not uptodate, read IO is issued and this page will be uptodate. I think this is good for pagesize == blocksize environment but there is room for improvement on pagesize != blocksize environment. Because in this case a page can have multiple buffers and even if a page is not uptodate, some buffers can be uptodate. So I suggest that when all buffers which correspond to a part of a file that we want to read are uptodate, use this pagecache and copy data from this pagecache to user buffer even if a page is not uptodate. This can reduce read IO and improve system throughput. I wrote a benchmark program and got result number with this program. This benchmark do: 1: mount and open a test file. 2: create a 512MB file. 3: close a file and umount. 4: mount and again open a test file. 5: pwrite randomly 300000 times on a test file. offset is aligned by IO size(1024bytes). 6: measure time of preading randomly 100000 times on a test file. The result was: 2.6.26 330 sec 2.6.26-patched 226 sec Arch:i386 Filesystem:ext3 Blocksize:1024 bytes Memory: 1GB On ext3/4, a file is written through buffer/block. So random read/write mixed workloads or random read after random write workloads are optimized with this patch under pagesize != blocksize environment. This test result showed this. The benchmark program is as follows: #include #include #include #include #include #include #include #include #include #define LEN 1024 #define LOOP 1024*512 /* 512MB */ main(void) { unsigned long i, offset, filesize; int fd; char buf[LEN]; time_t t1, t2; if (mount("/dev/sda1", "/root/test1/", "ext3", 0, 0) < 0) { perror("cannot mount\n"); exit(1); } memset(buf, 0, LEN); fd = open("/root/test1/testfile", O_CREAT|O_RDWR|O_TRUNC); if (fd < 0) { perror("cannot open file\n"); exit(1); } for (i = 0; i < LOOP; i++) write(fd, buf, LEN); close(fd); if (umount("/root/test1/") < 0) { perror("cannot umount\n"); exit(1); } if (mount("/dev/sda1", "/root/test1/", "ext3", 0, 0) < 0) { perror("cannot mount\n"); exit(1); } fd = open("/root/test1/testfile", O_RDWR); if (fd < 0) { perror("cannot open file\n"); exit(1); } filesize = LEN * LOOP; for (i = 0; i < 300000; i++){ offset = (random() % filesize) & (~(LEN - 1)); pwrite(fd, buf, LEN, offset); } printf("start test\n"); time(&t1); for (i = 0; i < 100000; i++){ offset = (random() % filesize) & (~(LEN - 1)); pread(fd, buf, LEN, offset); } time(&t2); printf("%ld sec\n", t2-t1); close(fd); if (umount("/root/test1/") < 0) { perror("cannot umount\n"); exit(1); } } Signed-off-by: Hisashi Hifumi Cc: Nick Piggin Cc: Christoph Hellwig Cc: Jan Kara Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/buffer_head.h | 2 ++ include/linux/fs.h | 44 +++++++++++++++++++++++--------------------- 2 files changed, 25 insertions(+), 21 deletions(-) (limited to 'include') diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index 82aa36c..50cfe8c 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h @@ -205,6 +205,8 @@ void block_invalidatepage(struct page *page, unsigned long offset); int block_write_full_page(struct page *page, get_block_t *get_block, struct writeback_control *wbc); int block_read_full_page(struct page*, get_block_t*); +int block_is_partially_uptodate(struct page *page, read_descriptor_t *desc, + unsigned long from); int block_write_begin(struct file *, struct address_space *, loff_t, unsigned, unsigned, struct page **, void **, get_block_t*); diff --git a/include/linux/fs.h b/include/linux/fs.h index 8252b04..580b513 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -443,6 +443,27 @@ static inline size_t iov_iter_count(struct iov_iter *i) return i->count; } +/* + * "descriptor" for what we're up to with a read. + * This allows us to use the same read code yet + * have multiple different users of the data that + * we read from a file. + * + * The simplest case just copies the data to user + * mode. + */ +typedef struct { + size_t written; + size_t count; + union { + char __user *buf; + void *data; + } arg; + int error; +} read_descriptor_t; + +typedef int (*read_actor_t)(read_descriptor_t *, struct page *, + unsigned long, unsigned long); struct address_space_operations { int (*writepage)(struct page *page, struct writeback_control *wbc); @@ -484,6 +505,8 @@ struct address_space_operations { int (*migratepage) (struct address_space *, struct page *, struct page *); int (*launder_page) (struct page *); + int (*is_partially_uptodate) (struct page *, read_descriptor_t *, + unsigned long); }; /* @@ -1198,27 +1221,6 @@ struct block_device_operations { struct module *owner; }; -/* - * "descriptor" for what we're up to with a read. - * This allows us to use the same read code yet - * have multiple different users of the data that - * we read from a file. - * - * The simplest case just copies the data to user - * mode. - */ -typedef struct { - size_t written; - size_t count; - union { - char __user * buf; - void *data; - } arg; - int error; -} read_descriptor_t; - -typedef int (*read_actor_t)(read_descriptor_t *, struct page *, unsigned long, unsigned long); - /* These macros are for out of kernel modules to test that * the kernel supports the unlocked_ioctl and compat_ioctl * fields in struct file_operations. */ -- cgit v1.1 From 25947d5ac56004378d8c2d31ebf22600d5bc0c02 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Mon, 28 Jul 2008 15:46:38 -0700 Subject: gpio: fix build on CONFIG_GPIO_SYSFS=n If CONFIG_GENERIC_GPIO=y && CONFIG_GPIO_SYSFS=n, gpio_export() in asm-generic/gpio.h refers -ENOSYS and causes build error. Signed-off-by: Atsushi Nemoto Acked-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/gpio.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index c764a8f..0f99ad3 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -2,6 +2,7 @@ #define _ASM_GENERIC_GPIO_H #include +#include #ifdef CONFIG_GPIOLIB -- cgit v1.1 From 34ee55014283a60efa3534c06e010579ffdd3756 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Mon, 28 Jul 2008 15:46:40 -0700 Subject: include/asm-generic/pgtable-nopmd.h: macros are noxious, reason #435 arch/x86/mm/pgtable.c: In function 'pgd_mop_up_pmds': arch/x86/mm/pgtable.c:194: warning: unused variable 'pmd' Cc: Ingo Molnar Cc: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/pgtable-nopmd.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-generic/pgtable-nopmd.h b/include/asm-generic/pgtable-nopmd.h index 087325e..a7cdc48 100644 --- a/include/asm-generic/pgtable-nopmd.h +++ b/include/asm-generic/pgtable-nopmd.h @@ -5,6 +5,8 @@ #include +struct mm_struct; + #define __PAGETABLE_PMD_FOLDED /* @@ -54,7 +56,9 @@ static inline pmd_t * pmd_offset(pud_t * pud, unsigned long address) * inside the pud, so has no extra memory associated with it. */ #define pmd_alloc_one(mm, address) NULL -#define pmd_free(mm, x) do { } while (0) +static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) +{ +} #define __pmd_free_tlb(tlb, x) do { } while (0) #undef pmd_addr_end -- cgit v1.1 From 424f525a1241351da947fb48a938128ddd774511 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 29 Jul 2008 01:30:26 +0200 Subject: mfd: accept pure device as a parent, not only platform_device Signed-off-by: Dmitry Baryshkov Signed-off-by: Samuel Ortiz --- include/linux/mfd/core.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/mfd/core.h b/include/linux/mfd/core.h index ea45d4a..49ef857 100644 --- a/include/linux/mfd/core.h +++ b/include/linux/mfd/core.h @@ -45,11 +45,11 @@ struct mfd_cell { const struct resource *resources; }; -extern int mfd_add_devices(struct platform_device *parent, +extern int mfd_add_devices(struct device *parent, int id, const struct mfd_cell *cells, int n_devs, struct resource *mem_base, int irq_base); -extern void mfd_remove_devices(struct platform_device *parent); +extern void mfd_remove_devices(struct device *parent); #endif -- cgit v1.1 From e930bffe95e1e886a1ede80726ea38df5838d067 Mon Sep 17 00:00:00 2001 From: Andrea Arcangeli Date: Fri, 25 Jul 2008 16:24:52 +0200 Subject: KVM: Synchronize guest physical memory map to host virtual memory map Synchronize changes to host virtual addresses which are part of a KVM memory slot to the KVM shadow mmu. This allows pte operations like swapping, page migration, and madvise() to transparently work with KVM. Signed-off-by: Andrea Arcangeli Signed-off-by: Avi Kivity --- include/asm-x86/kvm_host.h | 6 ++++++ include/linux/kvm_host.h | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+) (limited to 'include') diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h index bc34dc2..0f3c531 100644 --- a/include/asm-x86/kvm_host.h +++ b/include/asm-x86/kvm_host.h @@ -13,6 +13,7 @@ #include #include +#include #include #include @@ -251,6 +252,7 @@ struct kvm_vcpu_arch { gfn_t gfn; /* presumed gfn during guest pte update */ pfn_t pfn; /* pfn corresponding to that gfn */ int largepage; + unsigned long mmu_seq; } update_pte; struct i387_fxsave_struct host_fx_image; @@ -729,4 +731,8 @@ asmlinkage void kvm_handle_fault_on_reboot(void); KVM_EX_ENTRY " 666b, 667b \n\t" \ ".popsection" +#define KVM_ARCH_WANT_MMU_NOTIFIER +int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); +int kvm_age_hva(struct kvm *kvm, unsigned long hva); + #endif diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h index 07d68a8..8525afc 100644 --- a/include/linux/kvm_host.h +++ b/include/linux/kvm_host.h @@ -121,6 +121,12 @@ struct kvm { struct kvm_coalesced_mmio_dev *coalesced_mmio_dev; struct kvm_coalesced_mmio_ring *coalesced_mmio_ring; #endif + +#ifdef KVM_ARCH_WANT_MMU_NOTIFIER + struct mmu_notifier mmu_notifier; + unsigned long mmu_notifier_seq; + long mmu_notifier_count; +#endif }; /* The guest did something we don't support. */ @@ -332,4 +338,22 @@ int kvm_trace_ioctl(unsigned int ioctl, unsigned long arg) #define kvm_trace_cleanup() ((void)0) #endif +#ifdef KVM_ARCH_WANT_MMU_NOTIFIER +static inline int mmu_notifier_retry(struct kvm_vcpu *vcpu, unsigned long mmu_seq) +{ + if (unlikely(vcpu->kvm->mmu_notifier_count)) + return 1; + /* + * Both reads happen under the mmu_lock and both values are + * modified under mmu_lock, so there's no need of smb_rmb() + * here in between, otherwise mmu_notifier_count should be + * read before mmu_notifier_seq, see + * mmu_notifier_invalidate_range_end write side. + */ + if (vcpu->kvm->mmu_notifier_seq != mmu_seq) + return 1; + return 0; +} +#endif + #endif -- cgit v1.1 From ed8486243379ef3e6c61363df915882945c0eaec Mon Sep 17 00:00:00 2001 From: Avi Kivity Date: Tue, 29 Jul 2008 11:30:57 +0300 Subject: KVM: Advertise synchronized mmu support to userspace Signed-off-by: Avi Kivity --- include/linux/kvm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/kvm.h b/include/linux/kvm.h index 0ea064c..69511f7 100644 --- a/include/linux/kvm.h +++ b/include/linux/kvm.h @@ -371,6 +371,7 @@ struct kvm_trace_rec { #define KVM_CAP_PV_MMU 13 #define KVM_CAP_MP_STATE 14 #define KVM_CAP_COALESCED_MMIO 15 +#define KVM_CAP_SYNC_MMU 16 /* Changes to host mmap are reflected in guest */ /* * ioctls for VM fds -- cgit v1.1 From 8978b74253280d59e97cf49a3ec2c0cbccd5b801 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Tue, 29 Jul 2008 13:38:53 +0900 Subject: generic, x86: fix add iommu_num_pages helper function This IOMMU helper function doesn't work for some architectures: http://marc.info/?l=linux-kernel&m=121699304403202&w=2 It also breaks POWER and SPARC builds: http://marc.info/?l=linux-kernel&m=121730388001890&w=2 Currently, only x86 IOMMUs use this so let's move it to x86 for now. Reported-by: Stephen Rothwell Signed-off-by: FUJITA Tomonori Signed-off-by: Ingo Molnar --- include/asm-x86/iommu.h | 2 ++ include/linux/iommu-helper.h | 1 - 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-x86/iommu.h b/include/asm-x86/iommu.h index ecc8061..5f888cc 100644 --- a/include/asm-x86/iommu.h +++ b/include/asm-x86/iommu.h @@ -7,6 +7,8 @@ extern struct dma_mapping_ops nommu_dma_ops; extern int force_iommu, no_iommu; extern int iommu_detected; +extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len); + #ifdef CONFIG_GART_IOMMU extern int gart_iommu_aperture; extern int gart_iommu_aperture_allowed; diff --git a/include/linux/iommu-helper.h b/include/linux/iommu-helper.h index f8598f5..c975caf 100644 --- a/include/linux/iommu-helper.h +++ b/include/linux/iommu-helper.h @@ -8,4 +8,3 @@ extern unsigned long iommu_area_alloc(unsigned long *map, unsigned long size, unsigned long align_mask); extern void iommu_area_free(unsigned long *map, unsigned long start, unsigned int nr); -extern unsigned long iommu_num_pages(unsigned long addr, unsigned long len); -- cgit v1.1 From 1795cf48b322b4d19230a40dbe7181acedd34a94 Mon Sep 17 00:00:00 2001 From: Adrian McMenamin Date: Tue, 29 Jul 2008 22:10:56 +0900 Subject: sh/maple: clean maple bus code This patch cleans up the handling of the maple bus queue to remove the risk of races when adding packets. It also removes references to the redundant connect and disconnect functions. Signed-off-by: Adrian McMenamin Signed-off-by: Paul Mundt --- include/linux/maple.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/maple.h b/include/linux/maple.h index 523a286..c853b10 100644 --- a/include/linux/maple.h +++ b/include/linux/maple.h @@ -2,6 +2,7 @@ #define __LINUX_MAPLE_H #include +#include extern struct bus_type maple_bus_type; @@ -33,6 +34,7 @@ struct mapleq { void *sendbuf, *recvbuf, *recvbufdcsp; unsigned char length; enum maple_code command; + struct mutex mutex; }; struct maple_devinfo { @@ -69,7 +71,9 @@ void maple_getcond_callback(struct maple_device *dev, unsigned long interval, unsigned long function); int maple_driver_register(struct device_driver *drv); -void maple_add_packet(struct mapleq *mq); +int maple_add_packet_sleeps(struct maple_device *mdev, u32 function, + u32 command, u32 length, void *data); +void maple_clear_dev(struct maple_device *mdev); #define to_maple_dev(n) container_of(n, struct maple_device, dev) #define to_maple_driver(n) container_of(n, struct maple_driver, drv) -- cgit v1.1 From 11589418a1c4cf68be9367f802898d35e07809c4 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 29 Jul 2008 11:42:23 +0100 Subject: ALSA: ASoC: Export dapm_reg_event() fully dapm_reg_event() is used by devices using SND_SOC_DAPM_REG() so needs to be exported to support building them as modules and prototyped to avoid sparse warnings and potential build issues. Signed-off-by: Mark Brown Signed-off-by: Takashi Iwai --- include/sound/soc-dapm.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index 3030fdc..c1b26fc 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -202,6 +202,9 @@ struct snd_soc_dapm_path; struct snd_soc_dapm_pin; struct snd_soc_dapm_route; +int dapm_reg_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event); + /* dapm controls */ int snd_soc_dapm_put_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); -- cgit v1.1 From 605a0bd66d9d55e9ba46da1a9e5140c68bdf6d85 Mon Sep 17 00:00:00 2001 From: Johannes Berg Date: Tue, 15 Jul 2008 10:10:01 +0200 Subject: mac80211: remove IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE flag I forgot this in the previous patch that made it unused. Signed-off-by: Johannes Berg Signed-off-by: John W. Linville --- include/net/mac80211.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 4dd3d93..74487f2 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -746,7 +746,6 @@ enum ieee80211_tkip_key_type { * Measurement, Channel Switch, Quieting, TPC */ enum ieee80211_hw_flags { - IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE = 1<<0, IEEE80211_HW_RX_INCLUDES_FCS = 1<<1, IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING = 1<<2, IEEE80211_HW_2GHZ_SHORT_SLOT_INCAPABLE = 1<<3, -- cgit v1.1 From f1b23361a0f15497d4c6795a2935b2e98064ddfb Mon Sep 17 00:00:00 2001 From: Henrique de Moraes Holschuh Date: Mon, 21 Jul 2008 21:18:19 -0300 Subject: rfkill: document the rfkill struct locking (v2) Reorder fields in struct rfkill and add comments to make it clear which fields are protected by rfkill->mutex. Signed-off-by: Henrique de Moraes Holschuh Acked-by: Ivo van Doorn Signed-off-by: John W. Linville --- include/linux/rfkill.h | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/rfkill.h b/include/linux/rfkill.h index c5f6e54..741d1a6 100644 --- a/include/linux/rfkill.h +++ b/include/linux/rfkill.h @@ -68,7 +68,8 @@ enum rfkill_state { * @user_claim_unsupported: Whether the hardware supports exclusive * RF-kill control by userspace. Set this before registering. * @user_claim: Set when the switch is controlled exlusively by userspace. - * @mutex: Guards switch state transitions + * @mutex: Guards switch state transitions. It serializes callbacks + * and also protects the state. * @data: Pointer to the RF button drivers private data which will be * passed along when toggling radio state. * @toggle_radio(): Mandatory handler to control state of the radio. @@ -89,12 +90,13 @@ struct rfkill { const char *name; enum rfkill_type type; - enum rfkill_state state; bool user_claim_unsupported; bool user_claim; + /* the mutex serializes callbacks and also protects + * the state */ struct mutex mutex; - + enum rfkill_state state; void *data; int (*toggle_radio)(void *data, enum rfkill_state state); int (*get_state)(void *data, enum rfkill_state *state); -- cgit v1.1 From d0f09804144fd9471a13cf4d80e66842c7fa114f Mon Sep 17 00:00:00 2001 From: Johannes Berg Date: Tue, 29 Jul 2008 11:32:07 +0200 Subject: mac80211: partially fix skb->cb use This patch fixes mac80211 to not use the skb->cb over the queue step from virtual interfaces to the master. The patch also, for now, disables aggregation because that would still require requeuing, will fix that in a separate patch. There are two other places (software requeue and powersaving stations) where requeue can happen, but that is not currently used by any drivers/not possible to use respectively. Signed-off-by: Johannes Berg Signed-off-by: John W. Linville --- include/linux/skbuff.h | 5 ++++- include/net/mac80211.h | 6 ------ 2 files changed, 4 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 7ea44f6..a640385 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -316,7 +316,10 @@ struct sk_buff { #ifdef CONFIG_IPV6_NDISC_NODETYPE __u8 ndisc_nodetype:2; #endif - /* 14 bit hole */ +#if defined(CONFIG_MAC80211) || defined(CONFIG_MAC80211_MODULE) + __u8 do_not_encrypt:1; +#endif + /* 0/13/14 bit hole */ #ifdef CONFIG_NET_DMA dma_cookie_t dma_cookie; diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 74487f2..b527210 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -206,8 +206,6 @@ struct ieee80211_bss_conf { * These flags are used with the @flags member of &ieee80211_tx_info. * * @IEEE80211_TX_CTL_REQ_TX_STATUS: request TX status callback for this frame. - * @IEEE80211_TX_CTL_DO_NOT_ENCRYPT: send this frame without encryption; - * e.g., for EAPOL frame * @IEEE80211_TX_CTL_USE_RTS_CTS: use RTS-CTS before sending frame * @IEEE80211_TX_CTL_USE_CTS_PROTECT: use CTS protection for the frame (e.g., * for combined 802.11g / 802.11b networks) @@ -220,7 +218,6 @@ struct ieee80211_bss_conf { * @IEEE80211_TX_CTL_SHORT_PREAMBLE: TBD * @IEEE80211_TX_CTL_LONG_RETRY_LIMIT: this frame should be send using the * through set_retry_limit configured long retry value - * @IEEE80211_TX_CTL_EAPOL_FRAME: internal to mac80211 * @IEEE80211_TX_CTL_SEND_AFTER_DTIM: send this frame after DTIM beacon * @IEEE80211_TX_CTL_AMPDU: this frame should be sent as part of an A-MPDU * @IEEE80211_TX_CTL_OFDM_HT: this frame can be sent in HT OFDM rates. number @@ -253,7 +250,6 @@ struct ieee80211_bss_conf { */ enum mac80211_tx_control_flags { IEEE80211_TX_CTL_REQ_TX_STATUS = BIT(0), - IEEE80211_TX_CTL_DO_NOT_ENCRYPT = BIT(1), IEEE80211_TX_CTL_USE_RTS_CTS = BIT(2), IEEE80211_TX_CTL_USE_CTS_PROTECT = BIT(3), IEEE80211_TX_CTL_NO_ACK = BIT(4), @@ -263,7 +259,6 @@ enum mac80211_tx_control_flags { IEEE80211_TX_CTL_FIRST_FRAGMENT = BIT(8), IEEE80211_TX_CTL_SHORT_PREAMBLE = BIT(9), IEEE80211_TX_CTL_LONG_RETRY_LIMIT = BIT(10), - IEEE80211_TX_CTL_EAPOL_FRAME = BIT(11), IEEE80211_TX_CTL_SEND_AFTER_DTIM = BIT(12), IEEE80211_TX_CTL_AMPDU = BIT(13), IEEE80211_TX_CTL_OFDM_HT = BIT(14), @@ -323,7 +318,6 @@ struct ieee80211_tx_info { struct ieee80211_vif *vif; struct ieee80211_key_conf *hw_key; unsigned long jiffies; - int ifindex; u16 aid; s8 rts_cts_rate_idx, alt_retry_rate_idx; u8 retry_limit; -- cgit v1.1 From ce0ad7f0952581ba75ab6aee55bb1ed9bb22cf4f Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Wed, 30 Jul 2008 15:23:13 +1000 Subject: powerpc/mm: Lockless get_user_pages_fast() for 64-bit (v3) Implement lockless get_user_pages_fast for 64-bit powerpc. Page table existence is guaranteed with RCU, and speculative page references are used to take a reference to the pages without having a prior existence guarantee on them. Signed-off-by: Nick Piggin Signed-off-by: Dave Kleikamp Signed-off-by: Andrew Morton Signed-off-by: Benjamin Herrenschmidt --- include/asm-powerpc/pgtable-ppc64.h | 2 ++ include/linux/pagemap.h | 23 +++++++++++++++++++++++ 2 files changed, 25 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index 5fc78c0..74c6f38 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h @@ -461,6 +461,8 @@ void pgtable_cache_init(void); return pt; } +pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long address); + #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */ diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index a39b38c..69ed3cb 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -143,6 +143,29 @@ static inline int page_cache_get_speculative(struct page *page) return 1; } +/* + * Same as above, but add instead of inc (could just be merged) + */ +static inline int page_cache_add_speculative(struct page *page, int count) +{ + VM_BUG_ON(in_interrupt()); + +#if !defined(CONFIG_SMP) && defined(CONFIG_CLASSIC_RCU) +# ifdef CONFIG_PREEMPT + VM_BUG_ON(!in_atomic()); +# endif + VM_BUG_ON(page_count(page) == 0); + atomic_add(count, &page->_count); + +#else + if (unlikely(!atomic_add_unless(&page->_count, count, 0))) + return 0; +#endif + VM_BUG_ON(PageCompound(page) && page != compound_head(page)); + + return 1; +} + static inline int page_freeze_refs(struct page *page, int count) { return likely(atomic_cmpxchg(&page->_count, count, 0) == count); -- cgit v1.1 From e2ce4eaa76214f65a3f328ec5b45c30248115768 Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Wed, 30 Apr 2008 15:10:07 +0100 Subject: regulator: consumer device interface Add support to allow consumer device drivers to control their regulator power supply. This uses a similar API to the kernel clock interface in that consumer drivers can get and put a regulator (like they can with clocks atm) and get/set voltage, current limit, mode, enable and disable. This should allow consumers complete control over their supply voltage and current limit. This also compiles out if not in use so drivers can be reused in systems with no regulator based power control. Signed-off-by: Liam Girdwood Signed-off-by: Mark Brown --- include/linux/regulator/consumer.h | 284 +++++++++++++++++++++++++++++++++++++ 1 file changed, 284 insertions(+) create mode 100644 include/linux/regulator/consumer.h (limited to 'include') diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h new file mode 100644 index 0000000..afdc455 --- /dev/null +++ b/include/linux/regulator/consumer.h @@ -0,0 +1,284 @@ +/* + * consumer.h -- SoC Regulator consumer support. + * + * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. + * + * Author: Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Regulator Consumer Interface. + * + * A Power Management Regulator framework for SoC based devices. + * Features:- + * o Voltage and current level control. + * o Operating mode control. + * o Regulator status. + * o sysfs entries for showing client devices and status + * + * EXPERIMENTAL FEATURES: + * Dynamic Regulator operating Mode Switching (DRMS) - allows regulators + * to use most efficient operating mode depending upon voltage and load and + * is transparent to client drivers. + * + * e.g. Devices x,y,z share regulator r. Device x and y draw 20mA each during + * IO and 1mA at idle. Device z draws 100mA when under load and 5mA when + * idling. Regulator r has > 90% efficiency in NORMAL mode at loads > 100mA + * but this drops rapidly to 60% when below 100mA. Regulator r has > 90% + * efficiency in IDLE mode at loads < 10mA. Thus regulator r will operate + * in normal mode for loads > 10mA and in IDLE mode for load <= 10mA. + * + */ + +#ifndef __LINUX_REGULATOR_CONSUMER_H_ +#define __LINUX_REGULATOR_CONSUMER_H_ + +/* + * Regulator operating modes. + * + * Regulators can run in a variety of different operating modes depending on + * output load. This allows further system power savings by selecting the + * best (and most efficient) regulator mode for a desired load. + * + * Most drivers will only care about NORMAL. The modes below are generic and + * will probably not match the naming convention of your regulator data sheet + * but should match the use cases in the datasheet. + * + * In order of power efficiency (least efficient at top). + * + * Mode Description + * FAST Regulator can handle fast changes in it's load. + * e.g. useful in CPU voltage & frequency scaling where + * load can quickly increase with CPU frequency increases. + * + * NORMAL Normal regulator power supply mode. Most drivers will + * use this mode. + * + * IDLE Regulator runs in a more efficient mode for light + * loads. Can be used for devices that have a low power + * requirement during periods of inactivity. This mode + * may be more noisy than NORMAL and may not be able + * to handle fast load switching. + * + * STANDBY Regulator runs in the most efficient mode for very + * light loads. Can be used by devices when they are + * in a sleep/standby state. This mode is likely to be + * the most noisy and may not be able to handle fast load + * switching. + * + * NOTE: Most regulators will only support a subset of these modes. Some + * will only just support NORMAL. + * + * These modes can be OR'ed together to make up a mask of valid register modes. + */ + +#define REGULATOR_MODE_FAST 0x1 +#define REGULATOR_MODE_NORMAL 0x2 +#define REGULATOR_MODE_IDLE 0x4 +#define REGULATOR_MODE_STANDBY 0x8 + +/* + * Regulator notifier events. + * + * UNDER_VOLTAGE Regulator output is under voltage. + * OVER_CURRENT Regulator output current is too high. + * REGULATION_OUT Regulator output is out of regulation. + * FAIL Regulator output has failed. + * OVER_TEMP Regulator over temp. + * FORCE_DISABLE Regulator shut down by software. + * + * NOTE: These events can be OR'ed together when passed into handler. + */ + +#define REGULATOR_EVENT_UNDER_VOLTAGE 0x01 +#define REGULATOR_EVENT_OVER_CURRENT 0x02 +#define REGULATOR_EVENT_REGULATION_OUT 0x04 +#define REGULATOR_EVENT_FAIL 0x08 +#define REGULATOR_EVENT_OVER_TEMP 0x10 +#define REGULATOR_EVENT_FORCE_DISABLE 0x20 + +struct regulator; + +/** + * struct regulator_bulk_data - Data used for bulk regulator operations. + * + * @supply The name of the supply. Initialised by the user before + * using the bulk regulator APIs. + * @consumer The regulator consumer for the supply. This will be managed + * by the bulk API. + * + * The regulator APIs provide a series of regulator_bulk_() API calls as + * a convenience to consumers which require multiple supplies. This + * structure is used to manage data for these calls. + */ +struct regulator_bulk_data { + const char *supply; + struct regulator *consumer; +}; + +#if defined(CONFIG_REGULATOR) + +/* regulator get and put */ +struct regulator *__must_check regulator_get(struct device *dev, + const char *id); +void regulator_put(struct regulator *regulator); + +/* regulator output control and status */ +int regulator_enable(struct regulator *regulator); +int regulator_disable(struct regulator *regulator); +int regulator_force_disable(struct regulator *regulator); +int regulator_is_enabled(struct regulator *regulator); + +int regulator_bulk_get(struct device *dev, int num_consumers, + struct regulator_bulk_data *consumers); +int regulator_bulk_enable(int num_consumers, + struct regulator_bulk_data *consumers); +int regulator_bulk_disable(int num_consumers, + struct regulator_bulk_data *consumers); +void regulator_bulk_free(int num_consumers, + struct regulator_bulk_data *consumers); + +int regulator_set_voltage(struct regulator *regulator, int min_uV, int max_uV); +int regulator_get_voltage(struct regulator *regulator); +int regulator_set_current_limit(struct regulator *regulator, + int min_uA, int max_uA); +int regulator_get_current_limit(struct regulator *regulator); + +int regulator_set_mode(struct regulator *regulator, unsigned int mode); +unsigned int regulator_get_mode(struct regulator *regulator); +int regulator_set_optimum_mode(struct regulator *regulator, int load_uA); + +/* regulator notifier block */ +int regulator_register_notifier(struct regulator *regulator, + struct notifier_block *nb); +int regulator_unregister_notifier(struct regulator *regulator, + struct notifier_block *nb); + +/* driver data - core doesn't touch */ +void *regulator_get_drvdata(struct regulator *regulator); +void regulator_set_drvdata(struct regulator *regulator, void *data); + +#else + +/* + * Make sure client drivers will still build on systems with no software + * controllable voltage or current regulators. + */ +static inline struct regulator *__must_check regulator_get(struct device *dev, + const char *id) +{ + /* Nothing except the stubbed out regulator API should be + * looking at the value except to check if it is an error + * value so the actual return value doesn't matter. + */ + return (struct regulator *)id; +} +static inline void regulator_put(struct regulator *regulator) +{ +} + +static inline int regulator_enable(struct regulator *regulator) +{ + return 0; +} + +static inline int regulator_disable(struct regulator *regulator) +{ + return 0; +} + +static inline int regulator_is_enabled(struct regulator *regulator) +{ + return 1; +} + +static inline int regulator_bulk_get(struct device *dev, + int num_consumers, + struct regulator_bulk_data *consumers) +{ + return 0; +} + +static inline int regulator_bulk_enable(int num_consumers, + struct regulator_bulk_data *consumers) +{ + return 0; +} + +static inline int regulator_bulk_disable(int num_consumers, + struct regulator_bulk_data *consumers) +{ + return 0; +} + +static inline void regulator_bulk_free(int num_consumers, + struct regulator_bulk_data *consumers) +{ +} + +static inline int regulator_set_voltage(struct regulator *regulator, + int min_uV, int max_uV) +{ + return 0; +} + +static inline int regulator_get_voltage(struct regulator *regulator) +{ + return 0; +} + +static inline int regulator_set_current_limit(struct regulator *regulator, + int min_uA, int max_uA) +{ + return 0; +} + +static inline int regulator_get_current_limit(struct regulator *regulator) +{ + return 0; +} + +static inline int regulator_set_mode(struct regulator *regulator, + unsigned int mode) +{ + return 0; +} + +static inline unsigned int regulator_get_mode(struct regulator *regulator) +{ + return REGULATOR_MODE_NORMAL; +} + +static inline int regulator_set_optimum_mode(struct regulator *regulator, + int load_uA) +{ + return REGULATOR_MODE_NORMAL; +} + +static inline int regulator_register_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + return 0; +} + +static inline int regulator_unregister_notifier(struct regulator *regulator, + struct notifier_block *nb) +{ + return 0; +} + +static inline void *regulator_get_drvdata(struct regulator *regulator) +{ + return NULL; +} + +static inline void regulator_set_drvdata(struct regulator *regulator, + void *data) +{ +} + +#endif + +#endif -- cgit v1.1 From 571a354b1542a274d88617e1f6703f3fe7a517f1 Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Wed, 30 Apr 2008 15:42:28 +0100 Subject: regulator: regulator driver interface This allows regulator drivers to register their regulators and provide operations to the core. It also has a notifier call chain for propagating regulator events to clients. Signed-off-by: Liam Girdwood Signed-off-by: Mark Brown --- include/linux/regulator/driver.h | 99 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) create mode 100644 include/linux/regulator/driver.h (limited to 'include') diff --git a/include/linux/regulator/driver.h b/include/linux/regulator/driver.h new file mode 100644 index 0000000..1d712c7 --- /dev/null +++ b/include/linux/regulator/driver.h @@ -0,0 +1,99 @@ +/* + * driver.h -- SoC Regulator driver support. + * + * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. + * + * Author: Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Regulator Driver Interface. + */ + +#ifndef __LINUX_REGULATOR_DRIVER_H_ +#define __LINUX_REGULATOR_DRIVER_H_ + +#include +#include + +struct regulator_constraints; +struct regulator_dev; + +/** + * struct regulator_ops - regulator operations. + * + * This struct describes regulator operations. + */ +struct regulator_ops { + + /* get/set regulator voltage */ + int (*set_voltage) (struct regulator_dev *, int min_uV, int max_uV); + int (*get_voltage) (struct regulator_dev *); + + /* get/set regulator current */ + int (*set_current_limit) (struct regulator_dev *, + int min_uA, int max_uA); + int (*get_current_limit) (struct regulator_dev *); + + /* enable/disable regulator */ + int (*enable) (struct regulator_dev *); + int (*disable) (struct regulator_dev *); + int (*is_enabled) (struct regulator_dev *); + + /* get/set regulator operating mode (defined in regulator.h) */ + int (*set_mode) (struct regulator_dev *, unsigned int mode); + unsigned int (*get_mode) (struct regulator_dev *); + + /* get most efficient regulator operating mode for load */ + unsigned int (*get_optimum_mode) (struct regulator_dev *, int input_uV, + int output_uV, int load_uA); + + /* the operations below are for configuration of regulator state when + * it's parent PMIC enters a global STANBY/HIBERNATE state */ + + /* set regulator suspend voltage */ + int (*set_suspend_voltage) (struct regulator_dev *, int uV); + + /* enable/disable regulator in suspend state */ + int (*set_suspend_enable) (struct regulator_dev *); + int (*set_suspend_disable) (struct regulator_dev *); + + /* set regulator suspend operating mode (defined in regulator.h) */ + int (*set_suspend_mode) (struct regulator_dev *, unsigned int mode); +}; + +/* + * Regulators can either control voltage or current. + */ +enum regulator_type { + REGULATOR_VOLTAGE, + REGULATOR_CURRENT, +}; + +/** + * struct regulator_desc - Regulator descriptor + * + */ +struct regulator_desc { + const char *name; + int id; + struct regulator_ops *ops; + int irq; + enum regulator_type type; + struct module *owner; +}; + + +struct regulator_dev *regulator_register(struct regulator_desc *regulator_desc, + void *reg_data); +void regulator_unregister(struct regulator_dev *rdev); + +int regulator_notifier_call_chain(struct regulator_dev *rdev, + unsigned long event, void *data); + +void *rdev_get_drvdata(struct regulator_dev *rdev); +int rdev_get_id(struct regulator_dev *rdev); + +#endif -- cgit v1.1 From 4c1184e85cb381121a5273ea20ad31ca3faa0a4f Mon Sep 17 00:00:00 2001 From: Liam Girdwood Date: Wed, 30 Apr 2008 15:46:09 +0100 Subject: regulator: machine driver interface This interface is for machine specific code and allows the creation of voltage/current domains (with constraints) for each regulator. It can provide regulator constraints that will prevent device damage through overvoltage or over current caused by buggy client drivers. It also allows the creation of a regulator tree whereby some regulators are supplied by others (similar to a clock tree). Signed-off-by: Liam Girdwood Signed-off-by: Philipp Zabel Signed-off-by: Mark Brown --- include/linux/regulator/machine.h | 104 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 include/linux/regulator/machine.h (limited to 'include') diff --git a/include/linux/regulator/machine.h b/include/linux/regulator/machine.h new file mode 100644 index 0000000..11e737d --- /dev/null +++ b/include/linux/regulator/machine.h @@ -0,0 +1,104 @@ +/* + * machine.h -- SoC Regulator support, machine/board driver API. + * + * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC. + * + * Author: Liam Girdwood + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Regulator Machine/Board Interface. + */ + +#ifndef __LINUX_REGULATOR_MACHINE_H_ +#define __LINUX_REGULATOR_MACHINE_H_ + +#include +#include + +struct regulator; + +/* + * Regulator operation constraint flags. These flags are used to enable + * certain regulator operations and can be OR'ed together. + * + * VOLTAGE: Regulator output voltage can be changed by software on this + * board/machine. + * CURRENT: Regulator output current can be changed by software on this + * board/machine. + * MODE: Regulator operating mode can be changed by software on this + * board/machine. + * STATUS: Regulator can be enabled and disabled. + * DRMS: Dynamic Regulator Mode Switching is enabled for this regulator. + */ + +#define REGULATOR_CHANGE_VOLTAGE 0x1 +#define REGULATOR_CHANGE_CURRENT 0x2 +#define REGULATOR_CHANGE_MODE 0x4 +#define REGULATOR_CHANGE_STATUS 0x8 +#define REGULATOR_CHANGE_DRMS 0x10 + +/** + * struct regulator_state - regulator state during low power syatem states + * + * This describes a regulators state during a system wide low power state. + */ +struct regulator_state { + int uV; /* suspend voltage */ + unsigned int mode; /* suspend regulator operating mode */ + int enabled; /* is regulator enabled in this suspend state */ +}; + +/** + * struct regulation_constraints - regulator operating constraints. + * + * This struct describes regulator and board/machine specific constraints. + */ +struct regulation_constraints { + + char *name; + + /* voltage output range (inclusive) - for voltage control */ + int min_uV; + int max_uV; + + /* current output range (inclusive) - for current control */ + int min_uA; + int max_uA; + + /* valid regulator operating modes for this machine */ + unsigned int valid_modes_mask; + + /* valid operations for regulator on this machine */ + unsigned int valid_ops_mask; + + /* regulator input voltage - only if supply is another regulator */ + int input_uV; + + /* regulator suspend states for global PMIC STANDBY/HIBERNATE */ + struct regulator_state state_disk; + struct regulator_state state_mem; + struct regulator_state state_standby; + suspend_state_t initial_state; /* suspend state to set at init */ + + /* constriant flags */ + unsigned always_on:1; /* regulator never off when system is on */ + unsigned boot_on:1; /* bootloader/firmware enabled regulator */ + unsigned apply_uV:1; /* apply uV constraint iff min == max */ +}; + +int regulator_set_supply(const char *regulator, const char *regulator_supply); + +const char *regulator_get_supply(const char *regulator); + +int regulator_set_machine_constraints(const char *regulator, + struct regulation_constraints *constraints); + +int regulator_set_device_supply(const char *regulator, struct device *dev, + const char *supply); + +int regulator_suspend_prepare(suspend_state_t state); + +#endif -- cgit v1.1 From 48d335ba3164ce99cb8847513d0e3b6ee604eb20 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 30 Apr 2008 15:50:21 +0100 Subject: regulator: fixed regulator interface This patch adds support for fixed regulators. This class of regulator is not software controllable but can coexist on machines with software controlable regulators. Signed-off-by: Mark Brown Signed-off-by: Liam Girdwood --- include/linux/regulator/fixed.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 include/linux/regulator/fixed.h (limited to 'include') diff --git a/include/linux/regulator/fixed.h b/include/linux/regulator/fixed.h new file mode 100644 index 0000000..1387a5d --- /dev/null +++ b/include/linux/regulator/fixed.h @@ -0,0 +1,22 @@ +/* + * fixed.h + * + * Copyright 2008 Wolfson Microelectronics PLC. + * + * Author: Mark Brown + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + */ + +#ifndef __REGULATOR_FIXED_H +#define __REGULATOR_FIXED_H + +struct fixed_voltage_config { + const char *supply_name; + int microvolts; +}; + +#endif -- cgit v1.1 From 0eb5d5ab3ec99bfd22ff16797d95835369ffb25b Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Fri, 11 Jul 2008 17:28:06 +0200 Subject: regulator: TI bq24022 Li-Ion Charger driver This adds a regulator driver for the TI bq24022 Single-Chip Li-Ion Charger with its nCE and ISET2 pins connected to GPIOs. Signed-off-by: Philipp Zabel Signed-off-by: Liam Girdwood --- include/linux/regulator/bq24022.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 include/linux/regulator/bq24022.h (limited to 'include') diff --git a/include/linux/regulator/bq24022.h b/include/linux/regulator/bq24022.h new file mode 100644 index 0000000..e84b0a9 --- /dev/null +++ b/include/linux/regulator/bq24022.h @@ -0,0 +1,21 @@ +/* + * Support for TI bq24022 (bqTINY-II) Dual Input (USB/AC Adpater) + * 1-Cell Li-Ion Charger connected via GPIOs. + * + * Copyright (c) 2008 Philipp Zabel + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +/** + * bq24022_mach_info - platform data for bq24022 + * @gpio_nce: GPIO line connected to the nCE pin, used to enable / disable charging + * @gpio_iset2: GPIO line connected to the ISET2 pin, used to limit charging current to 100 mA / 500 mA + */ +struct bq24022_mach_info { + int gpio_nce; + int gpio_iset2; +}; -- cgit v1.1 From 785957d3e8c6fb37b18bf671923a76dbd8240025 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 30 Jul 2008 03:03:15 -0700 Subject: tcp: MD5: Use MIB counter instead of warning for MD5 mismatch. From a report by Matti Aarnio, and preliminary patch by Adam Langley. Signed-off-by: David S. Miller --- include/linux/snmp.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/snmp.h b/include/linux/snmp.h index 5df62ef..7a6e6bb 100644 --- a/include/linux/snmp.h +++ b/include/linux/snmp.h @@ -214,6 +214,8 @@ enum LINUX_MIB_TCPDSACKIGNOREDOLD, /* TCPSACKIgnoredOld */ LINUX_MIB_TCPDSACKIGNOREDNOUNDO, /* TCPSACKIgnoredNoUndo */ LINUX_MIB_TCPSPURIOUSRTOS, /* TCPSpuriousRTOs */ + LINUX_MIB_TCPMD5NOTFOUND, /* TCPMD5NotFound */ + LINUX_MIB_TCPMD5UNEXPECTED, /* TCPMD5Unexpected */ __LINUX_MIB_MAX }; -- cgit v1.1 From 96d8b647cfff90c8ff07863866aacdcd9d13cead Mon Sep 17 00:00:00 2001 From: Alexey Korolev Date: Tue, 29 Jul 2008 13:54:11 +0100 Subject: [MTD] [NAND] fix subpage read for small page NAND Current implementation of subpage read feature for NAND has issues with small page devices. Small page NAND do not support RNDOUT command. So subpage feature is not applicable for them. This patch disables support of subpage for small page NAND. The code is verified on nandsim(SP NAND simulation) and on LP NAND devices. Thanks a lot to Artem for finding this issue. Signed-off-by: Alexey Korolev Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 83f6787..81774e5 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -177,7 +177,9 @@ typedef enum { #define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) -#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT)) +/* Large page NAND with SOFT_ECC should support subpage reads */ +#define NAND_SUBPAGE_READ(chip) ((chip->ecc.mode == NAND_ECC_SOFT) \ + && (chip->page_shift > 9)) /* Mask to zero out the chip options, which come from the id table */ #define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) -- cgit v1.1 From 95b1bc20532c18e3f19cd460c8350350c84ffbb2 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Tue, 29 Jul 2008 22:28:12 -0700 Subject: [MTD] MTD_DEBUG always does compile-time typechecks The current style for debug messages is to ensure they're always parsed by the compiler and then subjected to dead code removal. That way builds won't break only when debug options get enabled, which is common when they are stripped out early by CPP. This patch makes CONFIG_MTD_DEBUG adopt that convention. Signed-off-by: David Brownell Signed-off-by: David Woodhouse --- include/linux/mtd/mtd.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 4ed40ca..9226365 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -272,7 +272,11 @@ static inline void mtd_erase_callback(struct erase_info *instr) printk(KERN_INFO args); \ } while(0) #else /* CONFIG_MTD_DEBUG */ -#define DEBUG(n, args...) do { } while(0) +#define DEBUG(n, args...) \ + do { \ + if (0) \ + printk(KERN_INFO args); \ + } while(0) #endif /* CONFIG_MTD_DEBUG */ -- cgit v1.1 From 1a4e564b7db999fbe5d88318c96ac8747699d417 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 29 Jul 2008 22:32:57 -0700 Subject: resource: add resource_size() Avoid one-off errors by introducing a resource_size() function. Signed-off-by: Magnus Damm Cc: Ben Dooks Cc: Jean Delvare Cc: Paul Mundt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/ioport.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/ioport.h b/include/linux/ioport.h index 2cd07cc..22d2115 100644 --- a/include/linux/ioport.h +++ b/include/linux/ioport.h @@ -118,6 +118,10 @@ extern int allocate_resource(struct resource *root, struct resource *new, int adjust_resource(struct resource *res, resource_size_t start, resource_size_t size); resource_size_t resource_alignment(struct resource *res); +static inline resource_size_t resource_size(struct resource *res) +{ + return res->end - res->start + 1; +} /* Convenience shorthand with allocation */ #define request_region(start,n,name) __request_region(&ioport_resource, (start), (n), (name)) -- cgit v1.1 From a1531acd43310a7e4571d52e8846640667f4c74b Mon Sep 17 00:00:00 2001 From: Thomas Renninger Date: Tue, 29 Jul 2008 22:32:58 -0700 Subject: cpufreq acpi: only call _PPC after cpufreq ACPI init funcs got called already Ingo Molnar provided a fix to not call _PPC at processor driver initialization time in "[PATCH] ACPI: fix cpufreq regression" (git commit e4233dec749a3519069d9390561b5636a75c7579) But it can still happen that _PPC is called at processor driver initialization time. This patch should make sure that this is not possible anymore. Signed-off-by: Thomas Renninger Cc: Andi Kleen Cc: Len Brown Cc: Dave Jones Cc: Ingo Molnar Cc: Venkatesh Pallipadi Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/cpufreq.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h index 2270ca5..6fd5668 100644 --- a/include/linux/cpufreq.h +++ b/include/linux/cpufreq.h @@ -106,6 +106,7 @@ struct cpufreq_policy { #define CPUFREQ_ADJUST (0) #define CPUFREQ_INCOMPATIBLE (1) #define CPUFREQ_NOTIFY (2) +#define CPUFREQ_START (3) #define CPUFREQ_SHARED_TYPE_NONE (0) /* None */ #define CPUFREQ_SHARED_TYPE_HW (1) /* HW does needed coordination */ -- cgit v1.1 From 1d1958f05095a7e9ecbba86235122784a3d1b561 Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Tue, 29 Jul 2008 22:33:16 -0700 Subject: mm: remove find_max_pfn_with_active_regions It has no user now Also print out info about adding/removing active regions. Signed-off-by: Yinghai Lu Acked-by: Mel Gorman Acked-by: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/mm.h b/include/linux/mm.h index 866a3db..5e2c8af 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -1041,7 +1041,6 @@ extern unsigned long absent_pages_in_range(unsigned long start_pfn, extern void get_pfn_range_for_nid(unsigned int nid, unsigned long *start_pfn, unsigned long *end_pfn); extern unsigned long find_min_pfn_with_active_regions(void); -extern unsigned long find_max_pfn_with_active_regions(void); extern void free_bootmem_with_active_regions(int nid, unsigned long max_low_pfn); typedef int (*work_fn_t)(unsigned long, unsigned long, void *); -- cgit v1.1 From 3f1712bac586069d6c891a8201457283b27e8abe Mon Sep 17 00:00:00 2001 From: Vegard Nossum Date: Tue, 29 Jul 2008 22:33:32 -0700 Subject: print_ip_sym(): use %pS Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kallsyms.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/kallsyms.h b/include/linux/kallsyms.h index 57aefa1..b961448 100644 --- a/include/linux/kallsyms.h +++ b/include/linux/kallsyms.h @@ -108,8 +108,7 @@ static inline void print_fn_descriptor_symbol(const char *fmt, void *addr) static inline void print_ip_sym(unsigned long ip) { - printk("[<%p>]", (void *) ip); - print_symbol(" %s\n", ip); + printk("[<%p>] %pS\n", (void *) ip, (void *) ip); } #endif /*_LINUX_KALLSYMS_H*/ -- cgit v1.1 From 2c203003f64de5fe55ae35712942100d270667fa Mon Sep 17 00:00:00 2001 From: Jerome Arbez-Gindre Date: Tue, 29 Jul 2008 22:33:33 -0700 Subject: connector: add a BlackBoard user to connector Add a BlackBoard user to connector. BlackBoard is part of the TSP GPL sampling framework (http://savannah.nongnu.org/p/tsp) [akpm@linux-foundation.org: add comment] Signed-off-by: Jerome Arbez-Gindre Acked-by: Evgeniy Polyakov Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/connector.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/connector.h b/include/linux/connector.h index 96a89d3..5c7f946 100644 --- a/include/linux/connector.h +++ b/include/linux/connector.h @@ -38,8 +38,9 @@ #define CN_W1_VAL 0x1 #define CN_IDX_V86D 0x4 #define CN_VAL_V86D_UVESAFB 0x1 +#define CN_IDX_BB 0x5 /* BlackBoard, from the TSP GPL sampling framework */ -#define CN_NETLINK_USERS 5 +#define CN_NETLINK_USERS 6 /* * Maximum connector's message size. -- cgit v1.1 From 204b885e7322656284626949e51f292fe61313fa Mon Sep 17 00:00:00 2001 From: Joerg Roedel Date: Tue, 29 Jul 2008 22:33:42 -0700 Subject: introduce lower_32_bits() macro The file kernel.h contains the upper_32_bits macro. This patch adds the other part, the lower_32_bits macro. Its first use will be in the driver for AMD IOMMU. Cc: H. Peter Anvin Signed-off-by: Joerg Roedel Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kernel.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/kernel.h b/include/linux/kernel.h index fdbbf72..aaa998f 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -75,6 +75,12 @@ extern const char linux_proc_banner[]; */ #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) +/** + * lower_32_bits - return bits 0-31 of a number + * @n: the number we're accessing + */ +#define lower_32_bits(n) ((u32)(n)) + #define KERN_EMERG "<0>" /* system is unusable */ #define KERN_ALERT "<1>" /* action must be taken immediately */ #define KERN_CRIT "<2>" /* critical conditions */ -- cgit v1.1 From c627f9cc046c7cd93b4525d89377fb409e170a18 Mon Sep 17 00:00:00 2001 From: Jack Steiner Date: Tue, 29 Jul 2008 22:33:53 -0700 Subject: mm: add zap_vma_ptes(): a library function to unmap driver ptes zap_vma_ptes() is intended to be used by drivers to unmap ptes assigned to the driver private vmas. This interface is similar to zap_page_range() but is less general & less likely to be abused. Needed by the GRU driver. Signed-off-by: Jack Steiner Cc: Nick Piggin Cc: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/mm.h b/include/linux/mm.h index 5e2c8af..335288bf 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -744,6 +744,8 @@ struct zap_details { struct page *vm_normal_page(struct vm_area_struct *vma, unsigned long addr, pte_t pte); +int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address, + unsigned long size); unsigned long zap_page_range(struct vm_area_struct *vma, unsigned long address, unsigned long size, struct zap_details *); unsigned long unmap_vmas(struct mmu_gather **tlb, -- cgit v1.1 From c39838ce21ca8e05857ed7f4be5d289011561905 Mon Sep 17 00:00:00 2001 From: Dean Nelson Date: Tue, 29 Jul 2008 22:34:11 -0700 Subject: sgi-xp: replace AMO_t typedef by struct amo Replace the AMO_t typedef by a direct reference to 'struct amo'. Signed-off-by: Dean Nelson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-ia64/sn/mspec.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-ia64/sn/mspec.h b/include/asm-ia64/sn/mspec.h index dbe13c6..c1d3c50 100644 --- a/include/asm-ia64/sn/mspec.h +++ b/include/asm-ia64/sn/mspec.h @@ -4,7 +4,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved. + * Copyright (c) 2001-2008 Silicon Graphics, Inc. All rights reserved. */ #ifndef _ASM_IA64_SN_MSPEC_H @@ -32,26 +32,26 @@ #ifdef __KERNEL__ /* - * Each Atomic Memory Operation (AMO formerly known as fetchop) + * Each Atomic Memory Operation (amo, formerly known as fetchop) * variable is 64 bytes long. The first 8 bytes are used. The * remaining 56 bytes are unaddressable due to the operation taking * that portion of the address. * - * NOTE: The AMO_t _MUST_ be placed in either the first or second half - * of the cache line. The cache line _MUST NOT_ be used for anything - * other than additional AMO_t entries. This is because there are two + * NOTE: The amo structure _MUST_ be placed in either the first or second + * half of the cache line. The cache line _MUST NOT_ be used for anything + * other than additional amo entries. This is because there are two * addresses which reference the same physical cache line. One will * be a cached entry with the memory type bits all set. This address - * may be loaded into processor cache. The AMO_t will be referenced + * may be loaded into processor cache. The amo will be referenced * uncached via the memory special memory type. If any portion of the * cached cache-line is modified, when that line is flushed, it will * overwrite the uncached value in physical memory and lead to * inconsistency. */ -typedef struct { +struct amo { u64 variable; u64 unused[7]; -} AMO_t; +}; #endif /* __KERNEL__ */ -- cgit v1.1 From 3dd730f2b49f101b90d283c3efc4e6cd826dd8f6 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Tue, 29 Jul 2008 16:07:37 +1000 Subject: cpumask: statement expressions confuse some versions of gcc when you take the address of the result. Noticed on a sparc64 compile using a version 3.4.5 cross compiler. kernel/time/tick-common.c: In function `tick_check_new_device': kernel/time/tick-common.c:210: error: invalid lvalue in unary `&' ... Just make it a regular expression. Signed-off-by: Stephen Rothwell Acked-by: Ingo Molnar Signed-off-by: Linus Torvalds --- include/linux/cpumask.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index 96d0509..d3219d7 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -287,7 +287,7 @@ static inline const cpumask_t *get_cpu_mask(unsigned int cpu) * gcc optimizes it out (it's a constant) and there's no huge stack * variable created: */ -#define cpumask_of_cpu(cpu) ({ *get_cpu_mask(cpu); }) +#define cpumask_of_cpu(cpu) (*get_cpu_mask(cpu)) #define CPU_MASK_LAST_WORD BITMAP_LAST_WORD_MASK(NR_CPUS) -- cgit v1.1 From a0e31fb09056224c5d6fef09d25cb96b6149aa7c Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:12 +0900 Subject: [MIPS] TXx9: Fix JMR3927 irq numbers * Fix wrong txx9_clockevent interrupt number * Fix TXX9_IRQ_BASE for JMR3927+FPCIB case Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9irq.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-mips/txx9irq.h b/include/asm-mips/txx9irq.h index 1c439e5..5620879 100644 --- a/include/asm-mips/txx9irq.h +++ b/include/asm-mips/txx9irq.h @@ -14,8 +14,12 @@ #ifdef CONFIG_IRQ_CPU #define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) #else +#ifdef CONFIG_I8259 +#define TXX9_IRQ_BASE (I8259A_IRQ_BASE + 16) +#else #define TXX9_IRQ_BASE 0 #endif +#endif #ifdef CONFIG_CPU_TX39XX #define TXx9_MAX_IR 16 -- cgit v1.1 From 47a5c976486e407fc0d0bc8fa165132b6f9bec26 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:14 +0900 Subject: [MIPS] Introduce pcibios_plat_setup Introduce pcibios_plat_setup for platform-specific pcibios_setup. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/pci.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index c205875..5510c53 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -174,4 +174,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) extern int pci_probe_only; +extern char * (*pcibios_plat_setup)(char *str); + #endif /* _ASM_PCI_H */ -- cgit v1.1 From 07517529225ae4ce770271f83d8cd1004733a01d Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:15 +0900 Subject: [MIPS] TXx9: Add some pci options Add pci options for backplane type, clock selection, error handling, timeout values. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/pci.h | 3 +++ include/asm-mips/txx9/tx4927pcic.h | 1 + 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-mips/txx9/pci.h b/include/asm-mips/txx9/pci.h index d89a450..3d32529 100644 --- a/include/asm-mips/txx9/pci.h +++ b/include/asm-mips/txx9/pci.h @@ -33,4 +33,7 @@ enum txx9_pci_err_action { }; extern enum txx9_pci_err_action txx9_pci_err_action; +extern char * (*txx9_board_pcibios_setup)(char *str); +char *txx9_pcibios_setup(char *str); + #endif /* __ASM_TXX9_PCI_H */ diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h index d61c3d0..e1d78e9 100644 --- a/include/asm-mips/txx9/tx4927pcic.h +++ b/include/asm-mips/txx9/tx4927pcic.h @@ -195,5 +195,6 @@ struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr( void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, struct pci_controller *channel, int extarb); void tx4927_report_pcic_status(void); +char *tx4927_pcibios_setup(char *str); #endif /* __ASM_TXX9_TX4927PCIC_H */ -- cgit v1.1 From 455cc256eb23915100e203fb33ee143afd127954 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 25 Jul 2008 23:01:35 +0900 Subject: [MIPS] TXx9: PCI error handling From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:16 +0900 Subject: [PATCH] txx9: PCI error handling Add more control and detailed report on PCI error interrupt. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/tx3927.h | 7 +++++++ include/asm-mips/txx9/tx4927.h | 1 + include/asm-mips/txx9/tx4927pcic.h | 3 +++ include/asm-mips/txx9/tx4938.h | 1 + 4 files changed, 12 insertions(+) (limited to 'include') diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index ea79e1b..8d62b1b 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -236,11 +236,17 @@ struct tx3927_ccfg_reg { /* see PCI_STATUS_XXX in linux/pci.h */ #define PCI_STATUS_NEW_CAP 0x0010 +/* bits for ISTAT/IIM */ +#define TX3927_PCIC_IIM_ALL 0x00001600 + /* bits for TC */ #define TX3927_PCIC_TC_OF16E 0x00000020 #define TX3927_PCIC_TC_IF8E 0x00000010 #define TX3927_PCIC_TC_OF8E 0x00000008 +/* bits for TSTAT/TIM */ +#define TX3927_PCIC_TIM_ALL 0x0003ffff + /* bits for IOBA/MBA */ /* see PCI_BASE_ADDRESS_XXX in linux/pci.h */ @@ -320,5 +326,6 @@ struct tx3927_ccfg_reg { struct pci_controller; void __init tx3927_pcic_setup(struct pci_controller *channel, unsigned long sdram_size, int extarb); +void tx3927_setup_pcierr_irq(void); #endif /* __ASM_TXX9_TX3927_H */ diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index ceb4b79..2c26fd1 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h @@ -249,6 +249,7 @@ void tx4927_time_init(unsigned int tmrnr); void tx4927_setup_serial(void); int tx4927_report_pciclk(void); int tx4927_pciclk66_setup(void); +void tx4927_setup_pcierr_irq(void); void tx4927_irq_init(void); #endif /* __ASM_TXX9_TX4927_H */ diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h index e1d78e9..223841c 100644 --- a/include/asm-mips/txx9/tx4927pcic.h +++ b/include/asm-mips/txx9/tx4927pcic.h @@ -10,6 +10,7 @@ #define __ASM_TXX9_TX4927PCIC_H #include +#include struct tx4927_pcic_reg { u32 pciid; @@ -196,5 +197,7 @@ void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, struct pci_controller *channel, int extarb); void tx4927_report_pcic_status(void); char *tx4927_pcibios_setup(char *str); +void tx4927_dump_pcic_settings(void); +irqreturn_t tx4927_pcierr_interrupt(int irq, void *dev_id); #endif /* __ASM_TXX9_TX4927PCIC_H */ diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 1ed969d..4fff1c9 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h @@ -285,6 +285,7 @@ void tx4938_report_pci1clk(void); int tx4938_pciclk66_setup(void); struct pci_dev; int tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot); +void tx4938_setup_pcierr_irq(void); void tx4938_irq_init(void); #endif -- cgit v1.1 From 683147254ef7e69ebbbe55280ba6a3c5ae2325d8 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:18 +0900 Subject: [MIPS] TXx9: Cleanup watchdog Unify registration of txx9wdt platform device. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/generic.h | 1 + include/asm-mips/txx9/tx4927.h | 2 +- include/asm-mips/txx9/tx4938.h | 2 +- 3 files changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index cbae37e..2b34d09 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -44,5 +44,6 @@ extern struct txx9_board_vec *txx9_board_vec; extern int (*txx9_irq_dispatch)(int pending); void prom_init_cmdline(void); char *prom_getcmdline(void); +void txx9_wdt_init(unsigned long base); #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index 2c26fd1..3d9fd7d 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h @@ -243,7 +243,7 @@ static inline void tx4927_ccfg_change(__u64 change, __u64 new) } unsigned int tx4927_get_mem_size(void); -void tx4927_wdr_init(void); +void tx4927_wdt_init(void); void tx4927_setup(void); void tx4927_time_init(unsigned int tmrnr); void tx4927_setup_serial(void); diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 4fff1c9..d5d7cef 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h @@ -276,7 +276,7 @@ struct tx4938_ccfg_reg { #define TX4938_EBUSC_SIZE(ch) TX4927_EBUSC_SIZE(ch) #define tx4938_get_mem_size() tx4927_get_mem_size() -void tx4938_wdr_init(void); +void tx4938_wdt_init(void); void tx4938_setup(void); void tx4938_time_init(unsigned int tmrnr); void tx4938_setup_serial(void); -- cgit v1.1 From f6727fb889c664be094fa041a0fdf0f1a1caefb6 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:19 +0900 Subject: [MIPS] TXx9: Make tx3927-specific code more independent Make some TX3927 SoC specific code independent from board specific code. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/jmr3927.h | 2 -- include/asm-mips/txx9/tx3927.h | 12 +++++++++++- 2 files changed, 11 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-mips/txx9/jmr3927.h b/include/asm-mips/txx9/jmr3927.h index d6eb1b6..a409c44 100644 --- a/include/asm-mips/txx9/jmr3927.h +++ b/include/asm-mips/txx9/jmr3927.h @@ -149,8 +149,6 @@ /* Clocks */ #define JMR3927_CORECLK 132710400 /* 132.7MHz */ -#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */ -#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */ /* * TX3927 Pin Configuration: diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index 8d62b1b..0bac37f 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -11,6 +11,7 @@ #include #define TX3927_REG_BASE 0xfffe0000UL +#define TX3927_REG_SIZE 0x00010000 #define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000) #define TX3927_ROMC_REG (TX3927_REG_BASE + 0x9000) #define TX3927_DMA_REG (TX3927_REG_BASE + 0xb000) @@ -319,13 +320,22 @@ struct tx3927_ccfg_reg { #define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG) #define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG) #define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG) -#define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch)) #define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) #define tx3927_pioptr ((struct txx9_pio_reg __iomem *)TX3927_PIO_REG) +#define TX3927_REV_PCODE() (tx3927_ccfgptr->crir >> 16) +#define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000) +#define TX3927_ROMC_SIZE(ch) \ + (0x00100000 << ((tx3927_romcptr->cr[(ch)] >> 8) & 0xf)) + +void tx3927_wdt_init(void); +void tx3927_setup(void); +void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); +void tx3927_setup_serial(unsigned int cts_mask); struct pci_controller; void __init tx3927_pcic_setup(struct pci_controller *channel, unsigned long sdram_size, int extarb); void tx3927_setup_pcierr_irq(void); +void tx3927_irq_init(void); #endif /* __ASM_TXX9_TX3927_H */ -- cgit v1.1 From c49f91f51e3cca796494f69fd967a7f72df5d457 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:20 +0900 Subject: [MIPS] TXx9: Make tx4938-specific code more independent Make some TX4938 SoC specific code independent from board specific code. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/generic.h | 2 ++ include/asm-mips/txx9/tx4938.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index 2b34d09..c6b5cd6 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -45,5 +45,7 @@ extern int (*txx9_irq_dispatch)(int pending); void prom_init_cmdline(void); char *prom_getcmdline(void); void txx9_wdt_init(unsigned long base); +void txx9_spi_init(int busid, unsigned long base, int irq); +void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr); #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index d5d7cef..26f9d4a 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h @@ -280,6 +280,8 @@ void tx4938_wdt_init(void); void tx4938_setup(void); void tx4938_time_init(unsigned int tmrnr); void tx4938_setup_serial(void); +void tx4938_spi_init(int busid); +void tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1); int tx4938_report_pciclk(void); void tx4938_report_pci1clk(void); int tx4938_pciclk66_setup(void); -- cgit v1.1 From bb72f1f729dcbd6a6a93c74479eeaa19deebfb47 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 24 Jul 2008 00:25:21 +0900 Subject: [MIPS] TXx9: Random cleanup * Random cleanups spotted by checkpatch script. * Do not initialize panic_timeout. "panic=" kernel parameter can be used. * Do not add "ip=any" or "ip=bootp". This options is not board specific. * Do not add "root=/dev/nfs". This is default on CONFIG_ROOT_NFS. * Kill unused error checking. * Fix IRQ comment to match current code. * Kill some unneeded includes * ST0_ERL is already cleared in generic code. * conswitchp is initialized generic code. * __init is not needed in prototype. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/smsc_fdc37m81x.h | 2 +- include/asm-mips/txx9/tx3927.h | 4 ++-- include/asm-mips/txx9/tx4927pcic.h | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-mips/txx9/smsc_fdc37m81x.h b/include/asm-mips/txx9/smsc_fdc37m81x.h index 9375e4f..02e161d0 100644 --- a/include/asm-mips/txx9/smsc_fdc37m81x.h +++ b/include/asm-mips/txx9/smsc_fdc37m81x.h @@ -56,7 +56,7 @@ #define SMSC_FDC37M81X_CONFIG_EXIT 0xaa #define SMSC_FDC37M81X_CHIP_ID 0x4d -unsigned long __init smsc_fdc37m81x_init(unsigned long port); +unsigned long smsc_fdc37m81x_init(unsigned long port); void smsc_fdc37m81x_config_beg(void); diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index 0bac37f..f0439a7 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -333,8 +333,8 @@ void tx3927_setup(void); void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); void tx3927_setup_serial(unsigned int cts_mask); struct pci_controller; -void __init tx3927_pcic_setup(struct pci_controller *channel, - unsigned long sdram_size, int extarb); +void tx3927_pcic_setup(struct pci_controller *channel, + unsigned long sdram_size, int extarb); void tx3927_setup_pcierr_irq(void); void tx3927_irq_init(void); diff --git a/include/asm-mips/txx9/tx4927pcic.h b/include/asm-mips/txx9/tx4927pcic.h index 223841c..c470b8a 100644 --- a/include/asm-mips/txx9/tx4927pcic.h +++ b/include/asm-mips/txx9/tx4927pcic.h @@ -193,8 +193,8 @@ struct tx4927_pcic_reg { struct tx4927_pcic_reg __iomem *get_tx4927_pcicptr( struct pci_controller *channel); -void __init tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, - struct pci_controller *channel, int extarb); +void tx4927_pcic_setup(struct tx4927_pcic_reg __iomem *pcicptr, + struct pci_controller *channel, int extarb); void tx4927_report_pcic_status(void); char *tx4927_pcibios_setup(char *str); void tx4927_dump_pcic_settings(void); -- cgit v1.1 From 7779a5e07d33fe316fe468e7afe7975fb686a831 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Fri, 25 Jul 2008 23:08:06 +0900 Subject: [MIPS] TXx9: Unify serial_txx9 setup * Unify calling of early_serial_txx9_setup. * Use dedicated serial clock on RBTX4938. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/generic.h | 2 ++ include/asm-mips/txx9/tx3927.h | 2 +- include/asm-mips/txx9/tx4927.h | 2 +- include/asm-mips/txx9/tx4938.h | 2 +- 4 files changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index c6b5cd6..a295aaa 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -47,5 +47,7 @@ char *prom_getcmdline(void); void txx9_wdt_init(unsigned long base); void txx9_spi_init(int busid, unsigned long base, int irq); void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr); +void txx9_sio_init(unsigned long baseaddr, int irq, + unsigned int line, unsigned int sclk, int nocts); #endif /* __ASM_TXX9_GENERIC_H */ diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index f0439a7..14e0636 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -331,7 +331,7 @@ struct tx3927_ccfg_reg { void tx3927_wdt_init(void); void tx3927_setup(void); void tx3927_time_init(unsigned int evt_tmrnr, unsigned int src_tmrnr); -void tx3927_setup_serial(unsigned int cts_mask); +void tx3927_sio_init(unsigned int sclk, unsigned int cts_mask); struct pci_controller; void tx3927_pcic_setup(struct pci_controller *channel, unsigned long sdram_size, int extarb); diff --git a/include/asm-mips/txx9/tx4927.h b/include/asm-mips/txx9/tx4927.h index 3d9fd7d..195f651 100644 --- a/include/asm-mips/txx9/tx4927.h +++ b/include/asm-mips/txx9/tx4927.h @@ -246,7 +246,7 @@ unsigned int tx4927_get_mem_size(void); void tx4927_wdt_init(void); void tx4927_setup(void); void tx4927_time_init(unsigned int tmrnr); -void tx4927_setup_serial(void); +void tx4927_sio_init(unsigned int sclk, unsigned int cts_mask); int tx4927_report_pciclk(void); int tx4927_pciclk66_setup(void); void tx4927_setup_pcierr_irq(void); diff --git a/include/asm-mips/txx9/tx4938.h b/include/asm-mips/txx9/tx4938.h index 26f9d4a..8175d4c 100644 --- a/include/asm-mips/txx9/tx4938.h +++ b/include/asm-mips/txx9/tx4938.h @@ -279,7 +279,7 @@ struct tx4938_ccfg_reg { void tx4938_wdt_init(void); void tx4938_setup(void); void tx4938_time_init(unsigned int tmrnr); -void tx4938_setup_serial(void); +void tx4938_sio_init(unsigned int sclk, unsigned int cts_mask); void tx4938_spi_init(int busid); void tx4938_ethaddr_init(unsigned char *addr0, unsigned char *addr1); int tx4938_report_pciclk(void); -- cgit v1.1 From e352953ce00bb870124e9054dbbbda2262f9269c Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 29 Jul 2008 22:10:08 +0900 Subject: [MIPS] TXx9: Support early_printk Kill jmr3927-specific prom_putchar and add txx9-generic prom_putchar to support early_printk. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/generic.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-mips/txx9/generic.h b/include/asm-mips/txx9/generic.h index a295aaa..5b1ccf9 100644 --- a/include/asm-mips/txx9/generic.h +++ b/include/asm-mips/txx9/generic.h @@ -49,5 +49,14 @@ void txx9_spi_init(int busid, unsigned long base, int irq); void txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr); void txx9_sio_init(unsigned long baseaddr, int irq, unsigned int line, unsigned int sclk, int nocts); +void prom_putchar(char c); +#ifdef CONFIG_EARLY_PRINTK +extern void (*txx9_prom_putchar)(char c); +void txx9_sio_putchar_init(unsigned long baseaddr); +#else +static inline void txx9_sio_putchar_init(unsigned long baseaddr) +{ +} +#endif #endif /* __ASM_TXX9_GENERIC_H */ -- cgit v1.1 From 872bfdd9e61d7dacf011046b02442215a2757026 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 29 Jul 2008 22:10:47 +0900 Subject: [MIPS] TXx9: Kill unused txx927.h include/asm-mips/txx9/txx927.h is no longer used. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/txx9/tx3927.h | 2 - include/asm-mips/txx9/txx927.h | 121 ----------------------------------------- 2 files changed, 123 deletions(-) delete mode 100644 include/asm-mips/txx9/txx927.h (limited to 'include') diff --git a/include/asm-mips/txx9/tx3927.h b/include/asm-mips/txx9/tx3927.h index 14e0636..587deb9 100644 --- a/include/asm-mips/txx9/tx3927.h +++ b/include/asm-mips/txx9/tx3927.h @@ -8,8 +8,6 @@ #ifndef __ASM_TXX9_TX3927_H #define __ASM_TXX9_TX3927_H -#include - #define TX3927_REG_BASE 0xfffe0000UL #define TX3927_REG_SIZE 0x00010000 #define TX3927_SDRAMC_REG (TX3927_REG_BASE + 0x8000) diff --git a/include/asm-mips/txx9/txx927.h b/include/asm-mips/txx9/txx927.h deleted file mode 100644 index 97dd7ad..0000000 --- a/include/asm-mips/txx9/txx927.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Common definitions for TX3927/TX4927 - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000 Toshiba Corporation - */ -#ifndef __ASM_TXX9_TXX927_H -#define __ASM_TXX9_TXX927_H - -struct txx927_sio_reg { - volatile unsigned long lcr; - volatile unsigned long dicr; - volatile unsigned long disr; - volatile unsigned long cisr; - volatile unsigned long fcr; - volatile unsigned long flcr; - volatile unsigned long bgr; - volatile unsigned long tfifo; - volatile unsigned long rfifo; -}; - -/* - * SIO - */ -/* SILCR : Line Control */ -#define TXx927_SILCR_SCS_MASK 0x00000060 -#define TXx927_SILCR_SCS_IMCLK 0x00000000 -#define TXx927_SILCR_SCS_IMCLK_BG 0x00000020 -#define TXx927_SILCR_SCS_SCLK 0x00000040 -#define TXx927_SILCR_SCS_SCLK_BG 0x00000060 -#define TXx927_SILCR_UEPS 0x00000010 -#define TXx927_SILCR_UPEN 0x00000008 -#define TXx927_SILCR_USBL_MASK 0x00000004 -#define TXx927_SILCR_USBL_1BIT 0x00000004 -#define TXx927_SILCR_USBL_2BIT 0x00000000 -#define TXx927_SILCR_UMODE_MASK 0x00000003 -#define TXx927_SILCR_UMODE_8BIT 0x00000000 -#define TXx927_SILCR_UMODE_7BIT 0x00000001 - -/* SIDICR : DMA/Int. Control */ -#define TXx927_SIDICR_TDE 0x00008000 -#define TXx927_SIDICR_RDE 0x00004000 -#define TXx927_SIDICR_TIE 0x00002000 -#define TXx927_SIDICR_RIE 0x00001000 -#define TXx927_SIDICR_SPIE 0x00000800 -#define TXx927_SIDICR_CTSAC 0x00000600 -#define TXx927_SIDICR_STIE_MASK 0x0000003f -#define TXx927_SIDICR_STIE_OERS 0x00000020 -#define TXx927_SIDICR_STIE_CTSS 0x00000010 -#define TXx927_SIDICR_STIE_RBRKD 0x00000008 -#define TXx927_SIDICR_STIE_TRDY 0x00000004 -#define TXx927_SIDICR_STIE_TXALS 0x00000002 -#define TXx927_SIDICR_STIE_UBRKD 0x00000001 - -/* SIDISR : DMA/Int. Status */ -#define TXx927_SIDISR_UBRK 0x00008000 -#define TXx927_SIDISR_UVALID 0x00004000 -#define TXx927_SIDISR_UFER 0x00002000 -#define TXx927_SIDISR_UPER 0x00001000 -#define TXx927_SIDISR_UOER 0x00000800 -#define TXx927_SIDISR_ERI 0x00000400 -#define TXx927_SIDISR_TOUT 0x00000200 -#define TXx927_SIDISR_TDIS 0x00000100 -#define TXx927_SIDISR_RDIS 0x00000080 -#define TXx927_SIDISR_STIS 0x00000040 -#define TXx927_SIDISR_RFDN_MASK 0x0000001f - -/* SICISR : Change Int. Status */ -#define TXx927_SICISR_OERS 0x00000020 -#define TXx927_SICISR_CTSS 0x00000010 -#define TXx927_SICISR_RBRKD 0x00000008 -#define TXx927_SICISR_TRDY 0x00000004 -#define TXx927_SICISR_TXALS 0x00000002 -#define TXx927_SICISR_UBRKD 0x00000001 - -/* SIFCR : FIFO Control */ -#define TXx927_SIFCR_SWRST 0x00008000 -#define TXx927_SIFCR_RDIL_MASK 0x00000180 -#define TXx927_SIFCR_RDIL_1 0x00000000 -#define TXx927_SIFCR_RDIL_4 0x00000080 -#define TXx927_SIFCR_RDIL_8 0x00000100 -#define TXx927_SIFCR_RDIL_12 0x00000180 -#define TXx927_SIFCR_RDIL_MAX 0x00000180 -#define TXx927_SIFCR_TDIL_MASK 0x00000018 -#define TXx927_SIFCR_TDIL_MASK 0x00000018 -#define TXx927_SIFCR_TDIL_1 0x00000000 -#define TXx927_SIFCR_TDIL_4 0x00000001 -#define TXx927_SIFCR_TDIL_8 0x00000010 -#define TXx927_SIFCR_TDIL_MAX 0x00000010 -#define TXx927_SIFCR_TFRST 0x00000004 -#define TXx927_SIFCR_RFRST 0x00000002 -#define TXx927_SIFCR_FRSTE 0x00000001 -#define TXx927_SIO_TX_FIFO 8 -#define TXx927_SIO_RX_FIFO 16 - -/* SIFLCR : Flow Control */ -#define TXx927_SIFLCR_RCS 0x00001000 -#define TXx927_SIFLCR_TES 0x00000800 -#define TXx927_SIFLCR_RTSSC 0x00000200 -#define TXx927_SIFLCR_RSDE 0x00000100 -#define TXx927_SIFLCR_TSDE 0x00000080 -#define TXx927_SIFLCR_RTSTL_MASK 0x0000001e -#define TXx927_SIFLCR_RTSTL_MAX 0x0000001e -#define TXx927_SIFLCR_TBRK 0x00000001 - -/* SIBGR : Baudrate Control */ -#define TXx927_SIBGR_BCLK_MASK 0x00000300 -#define TXx927_SIBGR_BCLK_T0 0x00000000 -#define TXx927_SIBGR_BCLK_T2 0x00000100 -#define TXx927_SIBGR_BCLK_T4 0x00000200 -#define TXx927_SIBGR_BCLK_T6 0x00000300 -#define TXx927_SIBGR_BRD_MASK 0x000000ff - -/* - * PIO - */ - -#endif /* __ASM_TXX9_TXX927_H */ -- cgit v1.1 From 8d60a903d986ffa26c41f0092320a3b9da20bfaf Mon Sep 17 00:00:00 2001 From: Jason Wessel Date: Tue, 29 Jul 2008 15:58:52 -0500 Subject: [MIPS] kgdb: Remove existing implementation This patch explicitly removes the kgdb implementation, for mips which is intended to be followed by a patch that adds a kgdb implementation for MIPS that makes use of the kgdb core in the kernel. Signed-off-by: Jason Wessel Signed-off-by: Ralf Baechle --- include/asm-mips/gdb-stub.h | 215 -------------------------------------------- 1 file changed, 215 deletions(-) delete mode 100644 include/asm-mips/gdb-stub.h (limited to 'include') diff --git a/include/asm-mips/gdb-stub.h b/include/asm-mips/gdb-stub.h deleted file mode 100644 index 22f67d4..0000000 --- a/include/asm-mips/gdb-stub.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1995 Andreas Busse - * Copyright (C) 2003 Ralf Baechle - */ -#ifndef _ASM_GDB_STUB_H -#define _ASM_GDB_STUB_H - - -/* - * important register numbers - */ - -#define REG_EPC 37 -#define REG_FP 72 -#define REG_SP 29 - -/* - * Stack layout for the GDB exception handler - * Derived from the stack layout described in asm-mips/stackframe.h - * - * The first PTRSIZE*6 bytes are argument save space for C subroutines. - */ -#define NUMREGS 90 - -#define GDB_FR_REG0 (PTRSIZE*6) /* 0 */ -#define GDB_FR_REG1 ((GDB_FR_REG0) + LONGSIZE) /* 1 */ -#define GDB_FR_REG2 ((GDB_FR_REG1) + LONGSIZE) /* 2 */ -#define GDB_FR_REG3 ((GDB_FR_REG2) + LONGSIZE) /* 3 */ -#define GDB_FR_REG4 ((GDB_FR_REG3) + LONGSIZE) /* 4 */ -#define GDB_FR_REG5 ((GDB_FR_REG4) + LONGSIZE) /* 5 */ -#define GDB_FR_REG6 ((GDB_FR_REG5) + LONGSIZE) /* 6 */ -#define GDB_FR_REG7 ((GDB_FR_REG6) + LONGSIZE) /* 7 */ -#define GDB_FR_REG8 ((GDB_FR_REG7) + LONGSIZE) /* 8 */ -#define GDB_FR_REG9 ((GDB_FR_REG8) + LONGSIZE) /* 9 */ -#define GDB_FR_REG10 ((GDB_FR_REG9) + LONGSIZE) /* 10 */ -#define GDB_FR_REG11 ((GDB_FR_REG10) + LONGSIZE) /* 11 */ -#define GDB_FR_REG12 ((GDB_FR_REG11) + LONGSIZE) /* 12 */ -#define GDB_FR_REG13 ((GDB_FR_REG12) + LONGSIZE) /* 13 */ -#define GDB_FR_REG14 ((GDB_FR_REG13) + LONGSIZE) /* 14 */ -#define GDB_FR_REG15 ((GDB_FR_REG14) + LONGSIZE) /* 15 */ -#define GDB_FR_REG16 ((GDB_FR_REG15) + LONGSIZE) /* 16 */ -#define GDB_FR_REG17 ((GDB_FR_REG16) + LONGSIZE) /* 17 */ -#define GDB_FR_REG18 ((GDB_FR_REG17) + LONGSIZE) /* 18 */ -#define GDB_FR_REG19 ((GDB_FR_REG18) + LONGSIZE) /* 19 */ -#define GDB_FR_REG20 ((GDB_FR_REG19) + LONGSIZE) /* 20 */ -#define GDB_FR_REG21 ((GDB_FR_REG20) + LONGSIZE) /* 21 */ -#define GDB_FR_REG22 ((GDB_FR_REG21) + LONGSIZE) /* 22 */ -#define GDB_FR_REG23 ((GDB_FR_REG22) + LONGSIZE) /* 23 */ -#define GDB_FR_REG24 ((GDB_FR_REG23) + LONGSIZE) /* 24 */ -#define GDB_FR_REG25 ((GDB_FR_REG24) + LONGSIZE) /* 25 */ -#define GDB_FR_REG26 ((GDB_FR_REG25) + LONGSIZE) /* 26 */ -#define GDB_FR_REG27 ((GDB_FR_REG26) + LONGSIZE) /* 27 */ -#define GDB_FR_REG28 ((GDB_FR_REG27) + LONGSIZE) /* 28 */ -#define GDB_FR_REG29 ((GDB_FR_REG28) + LONGSIZE) /* 29 */ -#define GDB_FR_REG30 ((GDB_FR_REG29) + LONGSIZE) /* 30 */ -#define GDB_FR_REG31 ((GDB_FR_REG30) + LONGSIZE) /* 31 */ - -/* - * Saved special registers - */ -#define GDB_FR_STATUS ((GDB_FR_REG31) + LONGSIZE) /* 32 */ -#define GDB_FR_LO ((GDB_FR_STATUS) + LONGSIZE) /* 33 */ -#define GDB_FR_HI ((GDB_FR_LO) + LONGSIZE) /* 34 */ -#define GDB_FR_BADVADDR ((GDB_FR_HI) + LONGSIZE) /* 35 */ -#define GDB_FR_CAUSE ((GDB_FR_BADVADDR) + LONGSIZE) /* 36 */ -#define GDB_FR_EPC ((GDB_FR_CAUSE) + LONGSIZE) /* 37 */ - -/* - * Saved floating point registers - */ -#define GDB_FR_FPR0 ((GDB_FR_EPC) + LONGSIZE) /* 38 */ -#define GDB_FR_FPR1 ((GDB_FR_FPR0) + LONGSIZE) /* 39 */ -#define GDB_FR_FPR2 ((GDB_FR_FPR1) + LONGSIZE) /* 40 */ -#define GDB_FR_FPR3 ((GDB_FR_FPR2) + LONGSIZE) /* 41 */ -#define GDB_FR_FPR4 ((GDB_FR_FPR3) + LONGSIZE) /* 42 */ -#define GDB_FR_FPR5 ((GDB_FR_FPR4) + LONGSIZE) /* 43 */ -#define GDB_FR_FPR6 ((GDB_FR_FPR5) + LONGSIZE) /* 44 */ -#define GDB_FR_FPR7 ((GDB_FR_FPR6) + LONGSIZE) /* 45 */ -#define GDB_FR_FPR8 ((GDB_FR_FPR7) + LONGSIZE) /* 46 */ -#define GDB_FR_FPR9 ((GDB_FR_FPR8) + LONGSIZE) /* 47 */ -#define GDB_FR_FPR10 ((GDB_FR_FPR9) + LONGSIZE) /* 48 */ -#define GDB_FR_FPR11 ((GDB_FR_FPR10) + LONGSIZE) /* 49 */ -#define GDB_FR_FPR12 ((GDB_FR_FPR11) + LONGSIZE) /* 50 */ -#define GDB_FR_FPR13 ((GDB_FR_FPR12) + LONGSIZE) /* 51 */ -#define GDB_FR_FPR14 ((GDB_FR_FPR13) + LONGSIZE) /* 52 */ -#define GDB_FR_FPR15 ((GDB_FR_FPR14) + LONGSIZE) /* 53 */ -#define GDB_FR_FPR16 ((GDB_FR_FPR15) + LONGSIZE) /* 54 */ -#define GDB_FR_FPR17 ((GDB_FR_FPR16) + LONGSIZE) /* 55 */ -#define GDB_FR_FPR18 ((GDB_FR_FPR17) + LONGSIZE) /* 56 */ -#define GDB_FR_FPR19 ((GDB_FR_FPR18) + LONGSIZE) /* 57 */ -#define GDB_FR_FPR20 ((GDB_FR_FPR19) + LONGSIZE) /* 58 */ -#define GDB_FR_FPR21 ((GDB_FR_FPR20) + LONGSIZE) /* 59 */ -#define GDB_FR_FPR22 ((GDB_FR_FPR21) + LONGSIZE) /* 60 */ -#define GDB_FR_FPR23 ((GDB_FR_FPR22) + LONGSIZE) /* 61 */ -#define GDB_FR_FPR24 ((GDB_FR_FPR23) + LONGSIZE) /* 62 */ -#define GDB_FR_FPR25 ((GDB_FR_FPR24) + LONGSIZE) /* 63 */ -#define GDB_FR_FPR26 ((GDB_FR_FPR25) + LONGSIZE) /* 64 */ -#define GDB_FR_FPR27 ((GDB_FR_FPR26) + LONGSIZE) /* 65 */ -#define GDB_FR_FPR28 ((GDB_FR_FPR27) + LONGSIZE) /* 66 */ -#define GDB_FR_FPR29 ((GDB_FR_FPR28) + LONGSIZE) /* 67 */ -#define GDB_FR_FPR30 ((GDB_FR_FPR29) + LONGSIZE) /* 68 */ -#define GDB_FR_FPR31 ((GDB_FR_FPR30) + LONGSIZE) /* 69 */ - -#define GDB_FR_FSR ((GDB_FR_FPR31) + LONGSIZE) /* 70 */ -#define GDB_FR_FIR ((GDB_FR_FSR) + LONGSIZE) /* 71 */ -#define GDB_FR_FRP ((GDB_FR_FIR) + LONGSIZE) /* 72 */ - -#define GDB_FR_DUMMY ((GDB_FR_FRP) + LONGSIZE) /* 73, unused ??? */ - -/* - * Again, CP0 registers - */ -#define GDB_FR_CP0_INDEX ((GDB_FR_DUMMY) + LONGSIZE) /* 74 */ -#define GDB_FR_CP0_RANDOM ((GDB_FR_CP0_INDEX) + LONGSIZE) /* 75 */ -#define GDB_FR_CP0_ENTRYLO0 ((GDB_FR_CP0_RANDOM) + LONGSIZE)/* 76 */ -#define GDB_FR_CP0_ENTRYLO1 ((GDB_FR_CP0_ENTRYLO0) + LONGSIZE)/* 77 */ -#define GDB_FR_CP0_CONTEXT ((GDB_FR_CP0_ENTRYLO1) + LONGSIZE)/* 78 */ -#define GDB_FR_CP0_PAGEMASK ((GDB_FR_CP0_CONTEXT) + LONGSIZE)/* 79 */ -#define GDB_FR_CP0_WIRED ((GDB_FR_CP0_PAGEMASK) + LONGSIZE)/* 80 */ -#define GDB_FR_CP0_REG7 ((GDB_FR_CP0_WIRED) + LONGSIZE) /* 81 */ -#define GDB_FR_CP0_REG8 ((GDB_FR_CP0_REG7) + LONGSIZE) /* 82 */ -#define GDB_FR_CP0_REG9 ((GDB_FR_CP0_REG8) + LONGSIZE) /* 83 */ -#define GDB_FR_CP0_ENTRYHI ((GDB_FR_CP0_REG9) + LONGSIZE) /* 84 */ -#define GDB_FR_CP0_REG11 ((GDB_FR_CP0_ENTRYHI) + LONGSIZE)/* 85 */ -#define GDB_FR_CP0_REG12 ((GDB_FR_CP0_REG11) + LONGSIZE) /* 86 */ -#define GDB_FR_CP0_REG13 ((GDB_FR_CP0_REG12) + LONGSIZE) /* 87 */ -#define GDB_FR_CP0_REG14 ((GDB_FR_CP0_REG13) + LONGSIZE) /* 88 */ -#define GDB_FR_CP0_PRID ((GDB_FR_CP0_REG14) + LONGSIZE) /* 89 */ - -#define GDB_FR_SIZE ((((GDB_FR_CP0_PRID) + LONGSIZE) + (PTRSIZE-1)) & ~(PTRSIZE-1)) - -#ifndef __ASSEMBLY__ - -/* - * This is the same as above, but for the high-level - * part of the GDB stub. - */ - -struct gdb_regs { - /* - * Pad bytes for argument save space on the stack - * 24/48 Bytes for 32/64 bit code - */ - unsigned long pad0[6]; - - /* - * saved main processor registers - */ - long reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7; - long reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15; - long reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23; - long reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31; - - /* - * Saved special registers - */ - long cp0_status; - long lo; - long hi; - long cp0_badvaddr; - long cp0_cause; - long cp0_epc; - - /* - * Saved floating point registers - */ - long fpr0, fpr1, fpr2, fpr3, fpr4, fpr5, fpr6, fpr7; - long fpr8, fpr9, fpr10, fpr11, fpr12, fpr13, fpr14, fpr15; - long fpr16, fpr17, fpr18, fpr19, fpr20, fpr21, fpr22, fpr23; - long fpr24, fpr25, fpr26, fpr27, fpr28, fpr29, fpr30, fpr31; - - long cp1_fsr; - long cp1_fir; - - /* - * Frame pointer - */ - long frame_ptr; - long dummy; /* unused */ - - /* - * saved cp0 registers - */ - long cp0_index; - long cp0_random; - long cp0_entrylo0; - long cp0_entrylo1; - long cp0_context; - long cp0_pagemask; - long cp0_wired; - long cp0_reg7; - long cp0_reg8; - long cp0_reg9; - long cp0_entryhi; - long cp0_reg11; - long cp0_reg12; - long cp0_reg13; - long cp0_reg14; - long cp0_prid; -}; - -/* - * Prototypes - */ - -extern int kgdb_enabled; -void set_debug_traps(void); -void set_async_breakpoint(unsigned long *epc); - -#endif /* !__ASSEMBLY__ */ -#endif /* _ASM_GDB_STUB_H */ -- cgit v1.1 From 8854700115ecf8aa6f087aa915b7b6cf18090d39 Mon Sep 17 00:00:00 2001 From: Jason Wessel Date: Tue, 29 Jul 2008 15:58:53 -0500 Subject: [MIPS] kgdb: add arch support for the kernel's kgdb core The new kgdb architecture specific handler registers and unregisters dynamically for exceptions depending on when you configure a kgdb I/O driver. Aside from initializing the exceptions earlier in the boot process, kgdb should have no impact on a device when it is compiled in so long as an I/O module is not configured for use. There have been quite a number of contributors during the existence of this patch (see arch/mips/kernel/kgdb.c). Most recently Jason re-wrote the mips kgdb logic to use the die notification handlers. Signed-off-by: Jason Wessel Signed-off-by: Ralf Baechle --- include/asm-mips/kdebug.h | 14 +++++++++++++- include/asm-mips/kgdb.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 57 insertions(+), 1 deletion(-) create mode 100644 include/asm-mips/kgdb.h (limited to 'include') diff --git a/include/asm-mips/kdebug.h b/include/asm-mips/kdebug.h index 6ece1b0..5bf62aa 100644 --- a/include/asm-mips/kdebug.h +++ b/include/asm-mips/kdebug.h @@ -1 +1,13 @@ -#include +#ifndef _ASM_MIPS_KDEBUG_H +#define _ASM_MIPS_KDEBUG_H + +#include + +enum die_val { + DIE_OOPS = 1, + DIE_FP, + DIE_TRAP, + DIE_RI, +}; + +#endif /* _ASM_MIPS_KDEBUG_H */ diff --git a/include/asm-mips/kgdb.h b/include/asm-mips/kgdb.h new file mode 100644 index 0000000..48223b0 --- /dev/null +++ b/include/asm-mips/kgdb.h @@ -0,0 +1,44 @@ +#ifndef __ASM_KGDB_H_ +#define __ASM_KGDB_H_ + +#ifdef __KERNEL__ + +#include + +#if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \ + (_MIPS_ISA == _MIPS_ISA_MIPS32) + +#define KGDB_GDB_REG_SIZE 32 + +#elif (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \ + (_MIPS_ISA == _MIPS_ISA_MIPS64) + +#ifdef CONFIG_32BIT +#define KGDB_GDB_REG_SIZE 32 +#else /* CONFIG_CPU_32BIT */ +#define KGDB_GDB_REG_SIZE 64 +#endif +#else +#error "Need to set KGDB_GDB_REG_SIZE for MIPS ISA" +#endif /* _MIPS_ISA */ + +#define BUFMAX 2048 +#if (KGDB_GDB_REG_SIZE == 32) +#define NUMREGBYTES (90*sizeof(u32)) +#define NUMCRITREGBYTES (12*sizeof(u32)) +#else +#define NUMREGBYTES (90*sizeof(u64)) +#define NUMCRITREGBYTES (12*sizeof(u64)) +#endif +#define BREAK_INSTR_SIZE 4 +#define CACHE_FLUSH_IS_SAFE 0 + +extern void arch_kgdb_breakpoint(void); +extern int kgdb_early_setup; +extern void *saved_vectors[32]; +extern void handle_exception(struct pt_regs *regs); +extern void breakinst(void); + +#endif /* __KERNEL__ */ + +#endif /* __ASM_KGDB_H_ */ -- cgit v1.1 From 1f938d060a7bc01b5f82d46db3e38cd501b445a6 Mon Sep 17 00:00:00 2001 From: Alexander Beregalov Date: Mon, 21 Jul 2008 00:06:19 +0400 Subject: libata.h: replace __FUNCTION__ with __func__ Signed-off-by: Alexander Beregalov Signed-off-by: Jeff Garzik --- include/linux/libata.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index 5b247b8..d4b8e5f 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -60,9 +60,9 @@ /* note: prints function name for you */ #ifdef ATA_DEBUG -#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) +#define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) #ifdef ATA_VERBOSE_DEBUG -#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) +#define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args) #else #define VPRINTK(fmt, args...) #endif /* ATA_VERBOSE_DEBUG */ @@ -71,7 +71,7 @@ #define VPRINTK(fmt, args...) #endif /* ATA_DEBUG */ -#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) +#define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __func__, ## args) /* NEW: debug levels */ #define HAVE_LIBATA_MSG 1 -- cgit v1.1 From 963e4975c6f93c148ca809d986d412201df9af89 Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Thu, 24 Jul 2008 17:16:06 +0100 Subject: pata_it821x: Driver updates and reworking - Add support for the RDC 1010 variant - Rework the core library to have a read_id method. This allows the hacky bits of it821x to go and prepares us for pata_hd - Switch from WARN to BUG in ata_id_string as it will reboot if you get it wrong so WARN won't be seen - Allow the issue of command 0xFC on the 821x. This is needed to query rebuild status. - Tidy up printk formatting - Do more ident rewriting on RAID volumes to handle firmware provided ident data which is rather wonky - Report the firmware revision and device layout in RAID mode - Don't try and disable raid on the 8211 or RDC - they don't have the relevant bits Signed-off-by: Alan Cox Signed-off-by: Jeff Garzik --- include/linux/libata.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index d4b8e5f..06b8033 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -750,6 +750,7 @@ struct ata_port_operations { void (*set_piomode)(struct ata_port *ap, struct ata_device *dev); void (*set_dmamode)(struct ata_port *ap, struct ata_device *dev); int (*set_mode)(struct ata_link *link, struct ata_device **r_failed_dev); + unsigned int (*read_id)(struct ata_device *dev, struct ata_taskfile *tf, u16 *id); void (*dev_config)(struct ata_device *dev); @@ -951,6 +952,8 @@ extern void ata_id_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_id_c_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); +extern unsigned int ata_do_dev_read_id(struct ata_device *dev, + struct ata_taskfile *tf, u16 *id); extern void ata_qc_complete(struct ata_queued_cmd *qc); extern int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active); extern void ata_scsi_simulate(struct ata_device *dev, struct scsi_cmnd *cmd, -- cgit v1.1 From ae375044d31075a31de5a839e07ded7f67b660aa Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Thu, 31 Jul 2008 00:38:01 -0700 Subject: netfilter: nf_conntrack_tcp: decrease timeouts while data in unacknowledged In order to time out dead connections quicker, keep track of outstanding data and cap the timeout. Suggested by Herbert Xu. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/nf_conntrack_tcp.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/netfilter/nf_conntrack_tcp.h b/include/linux/netfilter/nf_conntrack_tcp.h index 22ce299..a049df4 100644 --- a/include/linux/netfilter/nf_conntrack_tcp.h +++ b/include/linux/netfilter/nf_conntrack_tcp.h @@ -30,6 +30,9 @@ enum tcp_conntrack { /* Be liberal in window checking */ #define IP_CT_TCP_FLAG_BE_LIBERAL 0x08 +/* Has unacknowledged data */ +#define IP_CT_TCP_FLAG_DATA_UNACKNOWLEDGED 0x10 + struct nf_ct_tcp_flags { u_int8_t flags; u_int8_t mask; -- cgit v1.1 From 6f5fd8e9b98423add5f67b964e7cc8733dd73460 Mon Sep 17 00:00:00 2001 From: Jeff Garzik Date: Thu, 31 Jul 2008 03:46:30 -0400 Subject: drivers/media, include/media: delete zero-length files Signed-off-by: Jeff Garzik --- include/media/audiochip.h | 0 1 file changed, 0 insertions(+), 0 deletions(-) delete mode 100644 include/media/audiochip.h (limited to 'include') diff --git a/include/media/audiochip.h b/include/media/audiochip.h deleted file mode 100644 index e69de29..0000000 -- cgit v1.1 From dacdd0e04768da1fd2b24a6ee274c582b40d0c5b Mon Sep 17 00:00:00 2001 From: Joel Becker Date: Thu, 17 Jul 2008 16:54:19 -0700 Subject: [PATCH] configfs: Include linux/err.h in linux/configfs.h We now use PTR_ERR() in the ->make_item() and ->make_group() operations. Folks including configfs.h need err.h. Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index d62c19f..0a5491b 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -40,6 +40,7 @@ #include #include #include +#include #include -- cgit v1.1 From ecb3d28c7edd58b54f16838c434b342ba9195bec Mon Sep 17 00:00:00 2001 From: Joel Becker Date: Wed, 18 Jun 2008 19:29:05 -0700 Subject: [PATCH] configfs: Convenience macros for attribute definition. Sysfs has the _ATTR() and _ATTR_RO() macros to make defining extended form attributes easier. configfs should have something similiar. - _CONFIGFS_ATTR() and _CONFIGFS_ATTR_RO() are the counterparts to the sysfs macros. - CONFIGFS_ATTR_STRUCT() creates the extended form attribute structure. - CONFIGFS_ATTR_OPS() defines the show_attribute()/store_attribute() operations that call the show()/store() operations of the extended form configfs_attributes. Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index 0a5491b..7f62777 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -130,8 +130,25 @@ struct configfs_attribute { /* * Users often need to create attribute structures for their configurable * attributes, containing a configfs_attribute member and function pointers - * for the show() and store() operations on that attribute. They can use - * this macro (similar to sysfs' __ATTR) to make defining attributes easier. + * for the show() and store() operations on that attribute. If they don't + * need anything else on the extended attribute structure, they can use + * this macro to define it The argument _item is the name of the + * config_item structure. + */ +#define CONFIGFS_ATTR_STRUCT(_item) \ +struct _item##_attribute { \ + struct configfs_attribute attr; \ + ssize_t (*show)(struct _item *, char *); \ + ssize_t (*store)(struct _item *, const char *, size_t); \ +} + +/* + * With the extended attribute structure, users can use this macro + * (similar to sysfs' __ATTR) to make defining attributes easier. + * An example: + * #define MYITEM_ATTR(_name, _mode, _show, _store) \ + * struct myitem_attribute childless_attr_##_name = \ + * __CONFIGFS_ATTR(_name, _mode, _show, _store) */ #define __CONFIGFS_ATTR(_name, _mode, _show, _store) \ { \ @@ -143,6 +160,52 @@ struct configfs_attribute { .show = _show, \ .store = _store, \ } +/* Here is a readonly version, only requiring a show() operation */ +#define __CONFIGFS_ATTR_RO(_name, _show) \ +{ \ + .attr = { \ + .ca_name = __stringify(_name), \ + .ca_mode = 0444, \ + .ca_owner = THIS_MODULE, \ + }, \ + .show = _show, \ +} + +/* + * With these extended attributes, the simple show_attribute() and + * store_attribute() operations need to call the show() and store() of the + * attributes. This is a common pattern, so we provide a macro to define + * them. The argument _item is the name of the config_item structure. + * This macro expects the attributes to be named "struct _attribute" + * and the function to_() to exist; + */ +#define CONFIGFS_ATTR_OPS(_item) \ +static ssize_t _item##_attr_show(struct config_item *item, \ + struct configfs_attribute *attr, \ + char *page) \ +{ \ + struct _item *_item = to_##_item(item); \ + struct _item##_attribute *_item##_attr = \ + container_of(attr, struct _item##_attribute, attr); \ + ssize_t ret = 0; \ + \ + if (_item##_attr->show) \ + ret = _item##_attr->show(_item, page); \ + return ret; \ +} \ +static ssize_t _item##_attr_store(struct config_item *item, \ + struct configfs_attribute *attr, \ + const char *page, size_t count) \ +{ \ + struct _item *_item = to_##_item(item); \ + struct _item##_attribute *_item##_attr = \ + container_of(attr, struct _item##_attribute, attr); \ + ssize_t ret = -EINVAL; \ + \ + if (_item##_attr->store) \ + ret = _item##_attr->store(_item, page, count); \ + return ret; \ +} /* * If allow_link() exists, the item can symlink(2) out to other -- cgit v1.1 From c3f26a269c2421f97f10cf8ed05d5099b573af4d Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Thu, 31 Jul 2008 16:58:50 -0700 Subject: netdev: Fix lockdep warnings in multiqueue configurations. When support for multiple TX queues were added, the netif_tx_lock() routines we converted to iterate over all TX queues and grab each queue's spinlock. This causes heartburn for lockdep and it's not a healthy thing to do with lots of TX queues anyways. So modify this to use a top-level lock and a "frozen" state for the individual TX queues. Signed-off-by: David S. Miller --- include/linux/netdevice.h | 86 ++++++++++++++++++++++++++++++----------------- 1 file changed, 55 insertions(+), 31 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index b4d056c..ee583f6 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -440,6 +440,7 @@ static inline void napi_synchronize(const struct napi_struct *n) enum netdev_queue_state_t { __QUEUE_STATE_XOFF, + __QUEUE_STATE_FROZEN, }; struct netdev_queue { @@ -636,7 +637,7 @@ struct net_device unsigned int real_num_tx_queues; unsigned long tx_queue_len; /* Max frames per queue allowed */ - + spinlock_t tx_global_lock; /* * One part is mostly used on xmit path (device) */ @@ -1099,6 +1100,11 @@ static inline int netif_queue_stopped(const struct net_device *dev) return netif_tx_queue_stopped(netdev_get_tx_queue(dev, 0)); } +static inline int netif_tx_queue_frozen(const struct netdev_queue *dev_queue) +{ + return test_bit(__QUEUE_STATE_FROZEN, &dev_queue->state); +} + /** * netif_running - test if up * @dev: network device @@ -1475,6 +1481,26 @@ static inline void __netif_tx_lock_bh(struct netdev_queue *txq) txq->xmit_lock_owner = smp_processor_id(); } +static inline int __netif_tx_trylock(struct netdev_queue *txq) +{ + int ok = spin_trylock(&txq->_xmit_lock); + if (likely(ok)) + txq->xmit_lock_owner = smp_processor_id(); + return ok; +} + +static inline void __netif_tx_unlock(struct netdev_queue *txq) +{ + txq->xmit_lock_owner = -1; + spin_unlock(&txq->_xmit_lock); +} + +static inline void __netif_tx_unlock_bh(struct netdev_queue *txq) +{ + txq->xmit_lock_owner = -1; + spin_unlock_bh(&txq->_xmit_lock); +} + /** * netif_tx_lock - grab network device transmit lock * @dev: network device @@ -1484,12 +1510,23 @@ static inline void __netif_tx_lock_bh(struct netdev_queue *txq) */ static inline void netif_tx_lock(struct net_device *dev) { - int cpu = smp_processor_id(); unsigned int i; + int cpu; + spin_lock(&dev->tx_global_lock); + cpu = smp_processor_id(); for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); + + /* We are the only thread of execution doing a + * freeze, but we have to grab the _xmit_lock in + * order to synchronize with threads which are in + * the ->hard_start_xmit() handler and already + * checked the frozen bit. + */ __netif_tx_lock(txq, cpu); + set_bit(__QUEUE_STATE_FROZEN, &txq->state); + __netif_tx_unlock(txq); } } @@ -1499,40 +1536,22 @@ static inline void netif_tx_lock_bh(struct net_device *dev) netif_tx_lock(dev); } -static inline int __netif_tx_trylock(struct netdev_queue *txq) -{ - int ok = spin_trylock(&txq->_xmit_lock); - if (likely(ok)) - txq->xmit_lock_owner = smp_processor_id(); - return ok; -} - -static inline int netif_tx_trylock(struct net_device *dev) -{ - return __netif_tx_trylock(netdev_get_tx_queue(dev, 0)); -} - -static inline void __netif_tx_unlock(struct netdev_queue *txq) -{ - txq->xmit_lock_owner = -1; - spin_unlock(&txq->_xmit_lock); -} - -static inline void __netif_tx_unlock_bh(struct netdev_queue *txq) -{ - txq->xmit_lock_owner = -1; - spin_unlock_bh(&txq->_xmit_lock); -} - static inline void netif_tx_unlock(struct net_device *dev) { unsigned int i; for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); - __netif_tx_unlock(txq); - } + /* No need to grab the _xmit_lock here. If the + * queue is not stopped for another reason, we + * force a schedule. + */ + clear_bit(__QUEUE_STATE_FROZEN, &txq->state); + if (!test_bit(__QUEUE_STATE_XOFF, &txq->state)) + __netif_schedule(txq->qdisc); + } + spin_unlock(&dev->tx_global_lock); } static inline void netif_tx_unlock_bh(struct net_device *dev) @@ -1556,13 +1575,18 @@ static inline void netif_tx_unlock_bh(struct net_device *dev) static inline void netif_tx_disable(struct net_device *dev) { unsigned int i; + int cpu; - netif_tx_lock_bh(dev); + local_bh_disable(); + cpu = smp_processor_id(); for (i = 0; i < dev->num_tx_queues; i++) { struct netdev_queue *txq = netdev_get_tx_queue(dev, i); + + __netif_tx_lock(txq, cpu); netif_tx_stop_queue(txq); + __netif_tx_unlock(txq); } - netif_tx_unlock_bh(dev); + local_bh_enable(); } static inline void netif_addr_lock(struct net_device *dev) -- cgit v1.1 From bc4768eb081a67642c0c44c34ea597c273bdedcb Mon Sep 17 00:00:00 2001 From: Julius Volz Date: Thu, 31 Jul 2008 20:45:24 -0700 Subject: ipvs: Move userspace definitions to include/linux/ip_vs.h Current versions of ipvsadm include "/usr/src/linux/include/net/ip_vs.h" directly. This file also contains kernel-only definitions. Normally, public definitions should live in include/linux, so this patch moves the definitions shared with userspace to a new file, "include/linux/ip_vs.h". This also removes the unused NFC_IPVS_PROPERTY bitmask, which was once used to point into skb->nfcache. To make old ipvsadms still compile with this, the old header file includes the new one. Thanks to Dave Miller and Horms for noting/adding the missing Kbuild entry for the new header file. Signed-off-by: Julius Volz Acked-by: Simon Horman Signed-off-by: David S. Miller --- include/linux/Kbuild | 1 + include/linux/ip_vs.h | 245 ++++++++++++++++++++++++++++++++++++++++++++++++ include/net/ip_vs.h | 253 ++------------------------------------------------ 3 files changed, 254 insertions(+), 245 deletions(-) create mode 100644 include/linux/ip_vs.h (limited to 'include') diff --git a/include/linux/Kbuild b/include/linux/Kbuild index 4c4142c..a26f565 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -97,6 +97,7 @@ header-y += ioctl.h header-y += ip6_tunnel.h header-y += ipmi_msgdefs.h header-y += ipsec.h +header-y += ip_vs.h header-y += ipx.h header-y += irda.h header-y += iso_fs.h diff --git a/include/linux/ip_vs.h b/include/linux/ip_vs.h new file mode 100644 index 0000000..ec6eb49 --- /dev/null +++ b/include/linux/ip_vs.h @@ -0,0 +1,245 @@ +/* + * IP Virtual Server + * data structure and functionality definitions + */ + +#ifndef _IP_VS_H +#define _IP_VS_H + +#include /* For __beXX types in userland */ + +#define IP_VS_VERSION_CODE 0x010201 +#define NVERSION(version) \ + (version >> 16) & 0xFF, \ + (version >> 8) & 0xFF, \ + version & 0xFF + +/* + * Virtual Service Flags + */ +#define IP_VS_SVC_F_PERSISTENT 0x0001 /* persistent port */ +#define IP_VS_SVC_F_HASHED 0x0002 /* hashed entry */ + +/* + * Destination Server Flags + */ +#define IP_VS_DEST_F_AVAILABLE 0x0001 /* server is available */ +#define IP_VS_DEST_F_OVERLOAD 0x0002 /* server is overloaded */ + +/* + * IPVS sync daemon states + */ +#define IP_VS_STATE_NONE 0x0000 /* daemon is stopped */ +#define IP_VS_STATE_MASTER 0x0001 /* started as master */ +#define IP_VS_STATE_BACKUP 0x0002 /* started as backup */ + +/* + * IPVS socket options + */ +#define IP_VS_BASE_CTL (64+1024+64) /* base */ + +#define IP_VS_SO_SET_NONE IP_VS_BASE_CTL /* just peek */ +#define IP_VS_SO_SET_INSERT (IP_VS_BASE_CTL+1) +#define IP_VS_SO_SET_ADD (IP_VS_BASE_CTL+2) +#define IP_VS_SO_SET_EDIT (IP_VS_BASE_CTL+3) +#define IP_VS_SO_SET_DEL (IP_VS_BASE_CTL+4) +#define IP_VS_SO_SET_FLUSH (IP_VS_BASE_CTL+5) +#define IP_VS_SO_SET_LIST (IP_VS_BASE_CTL+6) +#define IP_VS_SO_SET_ADDDEST (IP_VS_BASE_CTL+7) +#define IP_VS_SO_SET_DELDEST (IP_VS_BASE_CTL+8) +#define IP_VS_SO_SET_EDITDEST (IP_VS_BASE_CTL+9) +#define IP_VS_SO_SET_TIMEOUT (IP_VS_BASE_CTL+10) +#define IP_VS_SO_SET_STARTDAEMON (IP_VS_BASE_CTL+11) +#define IP_VS_SO_SET_STOPDAEMON (IP_VS_BASE_CTL+12) +#define IP_VS_SO_SET_RESTORE (IP_VS_BASE_CTL+13) +#define IP_VS_SO_SET_SAVE (IP_VS_BASE_CTL+14) +#define IP_VS_SO_SET_ZERO (IP_VS_BASE_CTL+15) +#define IP_VS_SO_SET_MAX IP_VS_SO_SET_ZERO + +#define IP_VS_SO_GET_VERSION IP_VS_BASE_CTL +#define IP_VS_SO_GET_INFO (IP_VS_BASE_CTL+1) +#define IP_VS_SO_GET_SERVICES (IP_VS_BASE_CTL+2) +#define IP_VS_SO_GET_SERVICE (IP_VS_BASE_CTL+3) +#define IP_VS_SO_GET_DESTS (IP_VS_BASE_CTL+4) +#define IP_VS_SO_GET_DEST (IP_VS_BASE_CTL+5) /* not used now */ +#define IP_VS_SO_GET_TIMEOUT (IP_VS_BASE_CTL+6) +#define IP_VS_SO_GET_DAEMON (IP_VS_BASE_CTL+7) +#define IP_VS_SO_GET_MAX IP_VS_SO_GET_DAEMON + + +/* + * IPVS Connection Flags + */ +#define IP_VS_CONN_F_FWD_MASK 0x0007 /* mask for the fwd methods */ +#define IP_VS_CONN_F_MASQ 0x0000 /* masquerading/NAT */ +#define IP_VS_CONN_F_LOCALNODE 0x0001 /* local node */ +#define IP_VS_CONN_F_TUNNEL 0x0002 /* tunneling */ +#define IP_VS_CONN_F_DROUTE 0x0003 /* direct routing */ +#define IP_VS_CONN_F_BYPASS 0x0004 /* cache bypass */ +#define IP_VS_CONN_F_SYNC 0x0020 /* entry created by sync */ +#define IP_VS_CONN_F_HASHED 0x0040 /* hashed entry */ +#define IP_VS_CONN_F_NOOUTPUT 0x0080 /* no output packets */ +#define IP_VS_CONN_F_INACTIVE 0x0100 /* not established */ +#define IP_VS_CONN_F_OUT_SEQ 0x0200 /* must do output seq adjust */ +#define IP_VS_CONN_F_IN_SEQ 0x0400 /* must do input seq adjust */ +#define IP_VS_CONN_F_SEQ_MASK 0x0600 /* in/out sequence mask */ +#define IP_VS_CONN_F_NO_CPORT 0x0800 /* no client port set yet */ +#define IP_VS_CONN_F_TEMPLATE 0x1000 /* template, not connection */ + +#define IP_VS_SCHEDNAME_MAXLEN 16 +#define IP_VS_IFNAME_MAXLEN 16 + + +/* + * The struct ip_vs_service_user and struct ip_vs_dest_user are + * used to set IPVS rules through setsockopt. + */ +struct ip_vs_service_user { + /* virtual service addresses */ + u_int16_t protocol; + __be32 addr; /* virtual ip address */ + __be16 port; + u_int32_t fwmark; /* firwall mark of service */ + + /* virtual service options */ + char sched_name[IP_VS_SCHEDNAME_MAXLEN]; + unsigned flags; /* virtual service flags */ + unsigned timeout; /* persistent timeout in sec */ + __be32 netmask; /* persistent netmask */ +}; + + +struct ip_vs_dest_user { + /* destination server address */ + __be32 addr; + __be16 port; + + /* real server options */ + unsigned conn_flags; /* connection flags */ + int weight; /* destination weight */ + + /* thresholds for active connections */ + u_int32_t u_threshold; /* upper threshold */ + u_int32_t l_threshold; /* lower threshold */ +}; + + +/* + * IPVS statistics object (for user space) + */ +struct ip_vs_stats_user +{ + __u32 conns; /* connections scheduled */ + __u32 inpkts; /* incoming packets */ + __u32 outpkts; /* outgoing packets */ + __u64 inbytes; /* incoming bytes */ + __u64 outbytes; /* outgoing bytes */ + + __u32 cps; /* current connection rate */ + __u32 inpps; /* current in packet rate */ + __u32 outpps; /* current out packet rate */ + __u32 inbps; /* current in byte rate */ + __u32 outbps; /* current out byte rate */ +}; + + +/* The argument to IP_VS_SO_GET_INFO */ +struct ip_vs_getinfo { + /* version number */ + unsigned int version; + + /* size of connection hash table */ + unsigned int size; + + /* number of virtual services */ + unsigned int num_services; +}; + + +/* The argument to IP_VS_SO_GET_SERVICE */ +struct ip_vs_service_entry { + /* which service: user fills in these */ + u_int16_t protocol; + __be32 addr; /* virtual address */ + __be16 port; + u_int32_t fwmark; /* firwall mark of service */ + + /* service options */ + char sched_name[IP_VS_SCHEDNAME_MAXLEN]; + unsigned flags; /* virtual service flags */ + unsigned timeout; /* persistent timeout */ + __be32 netmask; /* persistent netmask */ + + /* number of real servers */ + unsigned int num_dests; + + /* statistics */ + struct ip_vs_stats_user stats; +}; + + +struct ip_vs_dest_entry { + __be32 addr; /* destination address */ + __be16 port; + unsigned conn_flags; /* connection flags */ + int weight; /* destination weight */ + + u_int32_t u_threshold; /* upper threshold */ + u_int32_t l_threshold; /* lower threshold */ + + u_int32_t activeconns; /* active connections */ + u_int32_t inactconns; /* inactive connections */ + u_int32_t persistconns; /* persistent connections */ + + /* statistics */ + struct ip_vs_stats_user stats; +}; + + +/* The argument to IP_VS_SO_GET_DESTS */ +struct ip_vs_get_dests { + /* which service: user fills in these */ + u_int16_t protocol; + __be32 addr; /* virtual address */ + __be16 port; + u_int32_t fwmark; /* firwall mark of service */ + + /* number of real servers */ + unsigned int num_dests; + + /* the real servers */ + struct ip_vs_dest_entry entrytable[0]; +}; + + +/* The argument to IP_VS_SO_GET_SERVICES */ +struct ip_vs_get_services { + /* number of virtual services */ + unsigned int num_services; + + /* service table */ + struct ip_vs_service_entry entrytable[0]; +}; + + +/* The argument to IP_VS_SO_GET_TIMEOUT */ +struct ip_vs_timeout_user { + int tcp_timeout; + int tcp_fin_timeout; + int udp_timeout; +}; + + +/* The argument to IP_VS_SO_GET_DAEMON */ +struct ip_vs_daemon_user { + /* sync daemon state (master/backup) */ + int state; + + /* multicast interface name */ + char mcast_ifn[IP_VS_IFNAME_MAXLEN]; + + /* SyncID we belong to */ + int syncid; +}; + +#endif /* _IP_VS_H */ diff --git a/include/net/ip_vs.h b/include/net/ip_vs.h index 9a51eba..cbb59eb 100644 --- a/include/net/ip_vs.h +++ b/include/net/ip_vs.h @@ -3,254 +3,17 @@ * data structure and functionality definitions */ -#ifndef _IP_VS_H -#define _IP_VS_H - -#include /* For __uXX types */ -#include /* For __beXX types in userland */ - -#include /* For ctl_path */ - -#define IP_VS_VERSION_CODE 0x010201 -#define NVERSION(version) \ - (version >> 16) & 0xFF, \ - (version >> 8) & 0xFF, \ - version & 0xFF - -/* - * Virtual Service Flags - */ -#define IP_VS_SVC_F_PERSISTENT 0x0001 /* persistent port */ -#define IP_VS_SVC_F_HASHED 0x0002 /* hashed entry */ - -/* - * Destination Server Flags - */ -#define IP_VS_DEST_F_AVAILABLE 0x0001 /* server is available */ -#define IP_VS_DEST_F_OVERLOAD 0x0002 /* server is overloaded */ - -/* - * IPVS sync daemon states - */ -#define IP_VS_STATE_NONE 0x0000 /* daemon is stopped */ -#define IP_VS_STATE_MASTER 0x0001 /* started as master */ -#define IP_VS_STATE_BACKUP 0x0002 /* started as backup */ - -/* - * IPVS socket options - */ -#define IP_VS_BASE_CTL (64+1024+64) /* base */ - -#define IP_VS_SO_SET_NONE IP_VS_BASE_CTL /* just peek */ -#define IP_VS_SO_SET_INSERT (IP_VS_BASE_CTL+1) -#define IP_VS_SO_SET_ADD (IP_VS_BASE_CTL+2) -#define IP_VS_SO_SET_EDIT (IP_VS_BASE_CTL+3) -#define IP_VS_SO_SET_DEL (IP_VS_BASE_CTL+4) -#define IP_VS_SO_SET_FLUSH (IP_VS_BASE_CTL+5) -#define IP_VS_SO_SET_LIST (IP_VS_BASE_CTL+6) -#define IP_VS_SO_SET_ADDDEST (IP_VS_BASE_CTL+7) -#define IP_VS_SO_SET_DELDEST (IP_VS_BASE_CTL+8) -#define IP_VS_SO_SET_EDITDEST (IP_VS_BASE_CTL+9) -#define IP_VS_SO_SET_TIMEOUT (IP_VS_BASE_CTL+10) -#define IP_VS_SO_SET_STARTDAEMON (IP_VS_BASE_CTL+11) -#define IP_VS_SO_SET_STOPDAEMON (IP_VS_BASE_CTL+12) -#define IP_VS_SO_SET_RESTORE (IP_VS_BASE_CTL+13) -#define IP_VS_SO_SET_SAVE (IP_VS_BASE_CTL+14) -#define IP_VS_SO_SET_ZERO (IP_VS_BASE_CTL+15) -#define IP_VS_SO_SET_MAX IP_VS_SO_SET_ZERO - -#define IP_VS_SO_GET_VERSION IP_VS_BASE_CTL -#define IP_VS_SO_GET_INFO (IP_VS_BASE_CTL+1) -#define IP_VS_SO_GET_SERVICES (IP_VS_BASE_CTL+2) -#define IP_VS_SO_GET_SERVICE (IP_VS_BASE_CTL+3) -#define IP_VS_SO_GET_DESTS (IP_VS_BASE_CTL+4) -#define IP_VS_SO_GET_DEST (IP_VS_BASE_CTL+5) /* not used now */ -#define IP_VS_SO_GET_TIMEOUT (IP_VS_BASE_CTL+6) -#define IP_VS_SO_GET_DAEMON (IP_VS_BASE_CTL+7) -#define IP_VS_SO_GET_MAX IP_VS_SO_GET_DAEMON - - -/* - * IPVS Connection Flags - */ -#define IP_VS_CONN_F_FWD_MASK 0x0007 /* mask for the fwd methods */ -#define IP_VS_CONN_F_MASQ 0x0000 /* masquerading/NAT */ -#define IP_VS_CONN_F_LOCALNODE 0x0001 /* local node */ -#define IP_VS_CONN_F_TUNNEL 0x0002 /* tunneling */ -#define IP_VS_CONN_F_DROUTE 0x0003 /* direct routing */ -#define IP_VS_CONN_F_BYPASS 0x0004 /* cache bypass */ -#define IP_VS_CONN_F_SYNC 0x0020 /* entry created by sync */ -#define IP_VS_CONN_F_HASHED 0x0040 /* hashed entry */ -#define IP_VS_CONN_F_NOOUTPUT 0x0080 /* no output packets */ -#define IP_VS_CONN_F_INACTIVE 0x0100 /* not established */ -#define IP_VS_CONN_F_OUT_SEQ 0x0200 /* must do output seq adjust */ -#define IP_VS_CONN_F_IN_SEQ 0x0400 /* must do input seq adjust */ -#define IP_VS_CONN_F_SEQ_MASK 0x0600 /* in/out sequence mask */ -#define IP_VS_CONN_F_NO_CPORT 0x0800 /* no client port set yet */ -#define IP_VS_CONN_F_TEMPLATE 0x1000 /* template, not connection */ - -/* Move it to better place one day, for now keep it unique */ -#define NFC_IPVS_PROPERTY 0x10000 - -#define IP_VS_SCHEDNAME_MAXLEN 16 -#define IP_VS_IFNAME_MAXLEN 16 - - -/* - * The struct ip_vs_service_user and struct ip_vs_dest_user are - * used to set IPVS rules through setsockopt. - */ -struct ip_vs_service_user { - /* virtual service addresses */ - u_int16_t protocol; - __be32 addr; /* virtual ip address */ - __be16 port; - u_int32_t fwmark; /* firwall mark of service */ - - /* virtual service options */ - char sched_name[IP_VS_SCHEDNAME_MAXLEN]; - unsigned flags; /* virtual service flags */ - unsigned timeout; /* persistent timeout in sec */ - __be32 netmask; /* persistent netmask */ -}; - - -struct ip_vs_dest_user { - /* destination server address */ - __be32 addr; - __be16 port; - - /* real server options */ - unsigned conn_flags; /* connection flags */ - int weight; /* destination weight */ - - /* thresholds for active connections */ - u_int32_t u_threshold; /* upper threshold */ - u_int32_t l_threshold; /* lower threshold */ -}; - - -/* - * IPVS statistics object (for user space) - */ -struct ip_vs_stats_user -{ - __u32 conns; /* connections scheduled */ - __u32 inpkts; /* incoming packets */ - __u32 outpkts; /* outgoing packets */ - __u64 inbytes; /* incoming bytes */ - __u64 outbytes; /* outgoing bytes */ - - __u32 cps; /* current connection rate */ - __u32 inpps; /* current in packet rate */ - __u32 outpps; /* current out packet rate */ - __u32 inbps; /* current in byte rate */ - __u32 outbps; /* current out byte rate */ -}; - - -/* The argument to IP_VS_SO_GET_INFO */ -struct ip_vs_getinfo { - /* version number */ - unsigned int version; - - /* size of connection hash table */ - unsigned int size; - - /* number of virtual services */ - unsigned int num_services; -}; - - -/* The argument to IP_VS_SO_GET_SERVICE */ -struct ip_vs_service_entry { - /* which service: user fills in these */ - u_int16_t protocol; - __be32 addr; /* virtual address */ - __be16 port; - u_int32_t fwmark; /* firwall mark of service */ - - /* service options */ - char sched_name[IP_VS_SCHEDNAME_MAXLEN]; - unsigned flags; /* virtual service flags */ - unsigned timeout; /* persistent timeout */ - __be32 netmask; /* persistent netmask */ - - /* number of real servers */ - unsigned int num_dests; - - /* statistics */ - struct ip_vs_stats_user stats; -}; - - -struct ip_vs_dest_entry { - __be32 addr; /* destination address */ - __be16 port; - unsigned conn_flags; /* connection flags */ - int weight; /* destination weight */ - - u_int32_t u_threshold; /* upper threshold */ - u_int32_t l_threshold; /* lower threshold */ - - u_int32_t activeconns; /* active connections */ - u_int32_t inactconns; /* inactive connections */ - u_int32_t persistconns; /* persistent connections */ - - /* statistics */ - struct ip_vs_stats_user stats; -}; - - -/* The argument to IP_VS_SO_GET_DESTS */ -struct ip_vs_get_dests { - /* which service: user fills in these */ - u_int16_t protocol; - __be32 addr; /* virtual address */ - __be16 port; - u_int32_t fwmark; /* firwall mark of service */ - - /* number of real servers */ - unsigned int num_dests; - - /* the real servers */ - struct ip_vs_dest_entry entrytable[0]; -}; - - -/* The argument to IP_VS_SO_GET_SERVICES */ -struct ip_vs_get_services { - /* number of virtual services */ - unsigned int num_services; - - /* service table */ - struct ip_vs_service_entry entrytable[0]; -}; - - -/* The argument to IP_VS_SO_GET_TIMEOUT */ -struct ip_vs_timeout_user { - int tcp_timeout; - int tcp_fin_timeout; - int udp_timeout; -}; - - -/* The argument to IP_VS_SO_GET_DAEMON */ -struct ip_vs_daemon_user { - /* sync daemon state (master/backup) */ - int state; - - /* multicast interface name */ - char mcast_ifn[IP_VS_IFNAME_MAXLEN]; - - /* SyncID we belong to */ - int syncid; -}; +#ifndef _NET_IP_VS_H +#define _NET_IP_VS_H +#include /* definitions shared with userland */ +/* old ipvsadm versions still include this file directly */ #ifdef __KERNEL__ +#include /* for __uXX types */ + +#include /* for ctl_path */ #include /* for struct list_head */ #include /* for struct rwlock_t */ #include /* for struct atomic_t */ @@ -981,4 +744,4 @@ static inline __wsum ip_vs_check_diff2(__be16 old, __be16 new, __wsum oldsum) #endif /* __KERNEL__ */ -#endif /* _IP_VS_H */ +#endif /* _NET_IP_VS_H */ -- cgit v1.1 From 4a7b61d23505854dff7d04cc11944566cffdd0ee Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Thu, 31 Jul 2008 20:52:08 -0700 Subject: skbuff: add missing kernel-doc for do_not_encrypt Add missing kernel-doc notation to sk_buff: Warning(linux-2.6.27-rc1-git2//include/linux/skbuff.h:345): No description found for parameter 'do_not_encrypt' Signed-off-by: Randy Dunlap Signed-off-by: David S. Miller --- include/linux/skbuff.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index a640385..cfcc45b 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -243,6 +243,7 @@ typedef unsigned char *sk_buff_data_t; * @tc_index: Traffic control index * @tc_verd: traffic control verdict * @ndisc_nodetype: router type (from link layer) + * @do_not_encrypt: set to prevent encryption of this frame * @dma_cookie: a cookie to one of several possible DMA operations * done by skb DMA functions * @secmark: security marking -- cgit v1.1 From c2bb4e5d497823437f0a11d342024ccdc6ff5b0d Mon Sep 17 00:00:00 2001 From: Heiko Carstens Date: Fri, 1 Aug 2008 16:39:08 +0200 Subject: [S390] Remove last P390 trace. Seems like I forgot this hunk... Signed-off-by: Heiko Carstens Signed-off-by: Martin Schwidefsky --- include/asm-s390/setup.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h index 4ba14e4..2bd9fae 100644 --- a/include/asm-s390/setup.h +++ b/include/asm-s390/setup.h @@ -65,7 +65,6 @@ extern unsigned long machine_flags; #define MACHINE_FLAG_VM (1UL << 0) #define MACHINE_FLAG_IEEE (1UL << 1) -#define MACHINE_FLAG_P390 (1UL << 2) #define MACHINE_FLAG_CSP (1UL << 3) #define MACHINE_FLAG_MVPG (1UL << 4) #define MACHINE_FLAG_DIAG44 (1UL << 5) -- cgit v1.1 From 3a95e8eb34f595a0144adb6e5513d456319bd8a5 Mon Sep 17 00:00:00 2001 From: Michael Holzheu Date: Fri, 1 Aug 2008 16:39:10 +0200 Subject: [S390] ipl: Reboot from alternate device does not work when booting from file During startup we check if diag308 works using diag 308 subcode 6, which stores the actual ipl information. This fails with rc = 0x102, if the system has been ipled from the HMC using load from CD or load from file. In the case of rc = 0x102 we have to assume that diag 308 is working, since it still can be used to ipl from an alternative device. Signed-off-by: Michael Holzheu Signed-off-by: Martin Schwidefsky --- include/asm-s390/ipl.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-s390/ipl.h b/include/asm-s390/ipl.h index eaca6df..1171e6d 100644 --- a/include/asm-s390/ipl.h +++ b/include/asm-s390/ipl.h @@ -159,7 +159,8 @@ enum diag308_vm_flags { }; enum diag308_rc { - DIAG308_RC_OK = 1, + DIAG308_RC_OK = 0x0001, + DIAG308_RC_NOCONFIG = 0x0102, }; extern int diag308(unsigned long subcode, void *addr); -- cgit v1.1 From 934b2857cc576ae53c92a66e63fce7ddcfa74691 Mon Sep 17 00:00:00 2001 From: Heiko Carstens Date: Fri, 1 Aug 2008 16:39:11 +0200 Subject: [S390] nohz/sclp: disable timer on synchronous waits. sclp_sync_wait wait synchronously for an sclp interrupt and disables timer interrupts. However on the irq enter paths there is an extra check if a timer interrupt would be due and calls the timer callback. This would schedule softirqs in the wrong context. So introduce local_tick_enable/disable which prevents this. Signed-off-by: Heiko Carstens Signed-off-by: Martin Schwidefsky --- include/asm-s390/hardirq.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/asm-s390/hardirq.h b/include/asm-s390/hardirq.h index 4b7cb96..89ec705 100644 --- a/include/asm-s390/hardirq.h +++ b/include/asm-s390/hardirq.h @@ -34,4 +34,18 @@ typedef struct { void clock_comparator_work(void); +static inline unsigned long long local_tick_disable(void) +{ + unsigned long long old; + + old = S390_lowcore.clock_comparator; + S390_lowcore.clock_comparator = -1ULL; + return old; +} + +static inline void local_tick_enable(unsigned long long comp) +{ + S390_lowcore.clock_comparator = comp; +} + #endif /* __ASM_HARDIRQ_H */ -- cgit v1.1 From a4b526b3ba6353cd89a38e41da48ed83b0ead16f Mon Sep 17 00:00:00 2001 From: Martin Schwidefsky Date: Fri, 1 Aug 2008 16:39:12 +0200 Subject: [S390] Optimize storage key operations for anon pages For anonymous pages without a swap cache backing the check in page_remove_rmap for the physical dirty bit in page_remove_rmap is unnecessary. The instructions that are used to check and reset the dirty bit are expensive. Removing the check noticably speeds up process exit. In addition the clearing of the dirty bit in __SetPageUptodate is pointless as well. With these two changes there is no storage key operation for an anonymous page anymore if it does not hit the swap space. The micro benchmark which repeatedly executes an empty shell script gets about 5% faster. Signed-off-by: Martin Schwidefsky --- include/linux/page-flags.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index 54590a9..25aaccd 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -239,9 +239,6 @@ static inline void __SetPageUptodate(struct page *page) { smp_wmb(); __set_bit(PG_uptodate, &(page)->flags); -#ifdef CONFIG_S390 - page_clear_dirty(page); -#endif } static inline void SetPageUptodate(struct page *page) -- cgit v1.1 From 519620cc3d723d41522191ebd150fba4a3790296 Mon Sep 17 00:00:00 2001 From: Heiko Carstens Date: Fri, 1 Aug 2008 16:39:15 +0200 Subject: [S390] Wire up new syscalls. Signed-off-by: Heiko Carstens Signed-off-by: Martin Schwidefsky --- include/asm-s390/unistd.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h index 583da80..c8ad350 100644 --- a/include/asm-s390/unistd.h +++ b/include/asm-s390/unistd.h @@ -259,7 +259,13 @@ #define __NR_timerfd_create 319 #define __NR_timerfd_settime 320 #define __NR_timerfd_gettime 321 -#define NR_syscalls 322 +#define __NR_signalfd4 322 +#define __NR_eventfd2 323 +#define __NR_inotify_init1 324 +#define __NR_pipe2 325 +#define __NR_dup3 326 +#define __NR_epoll_create1 327 +#define NR_syscalls 328 /* * There are some system calls that are not present on 64 bit, some -- cgit v1.1 From 1378ee9b67298176edbcec0ab87b38e913d76ab9 Mon Sep 17 00:00:00 2001 From: Cornelia Huck Date: Fri, 1 Aug 2008 16:39:21 +0200 Subject: [S390] cio: Include linux/string.h in schid.h. schid.h needs string.h for memset and memcmp. Signed-off-by: Cornelia Huck Signed-off-by: Martin Schwidefsky --- include/asm-s390/schid.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-s390/schid.h b/include/asm-s390/schid.h index 7bdc0fe..825503c 100644 --- a/include/asm-s390/schid.h +++ b/include/asm-s390/schid.h @@ -11,6 +11,7 @@ struct subchannel_id { } __attribute__ ((packed, aligned(4))); #ifdef __KERNEL__ +#include /* Helper function for sane state of pre-allocated subchannel_id. */ static inline void -- cgit v1.1 From 1027abe8827b47f7e9c4ed6514fde3d44f79963c Mon Sep 17 00:00:00 2001 From: Al Viro Date: Wed, 30 Jul 2008 04:13:04 -0400 Subject: [PATCH] merge locate_fd() and get_unused_fd() New primitive: alloc_fd(start, flags). get_unused_fd() and get_unused_fd_flags() become wrappers on top of it. Signed-off-by: Al Viro --- include/linux/file.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/file.h b/include/linux/file.h index 27c64bd..a20259e 100644 --- a/include/linux/file.h +++ b/include/linux/file.h @@ -34,8 +34,9 @@ extern struct file *fget(unsigned int fd); extern struct file *fget_light(unsigned int fd, int *fput_needed); extern void set_close_on_exec(unsigned int fd, int flag); extern void put_filp(struct file *); +extern int alloc_fd(unsigned start, unsigned flags); extern int get_unused_fd(void); -extern int get_unused_fd_flags(int flags); +#define get_unused_fd_flags(flags) alloc_fd(0, (flags)) extern void put_unused_fd(unsigned int fd); extern void fd_install(unsigned int fd, struct file *file); -- cgit v1.1 From 77e69dac3cefacee939cb107ae9cd520a62338e0 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Fri, 1 Aug 2008 04:29:18 -0400 Subject: [PATCH] fix races and leaks in vfs_quota_on() users * new helper: vfs_quota_on_path(); equivalent of vfs_quota_on() sans the pathname resolution. * callers of vfs_quota_on() that do their own pathname resolution and checks based on it are switched to vfs_quota_on_path(); that way we avoid the races. * reiserfs leaked dentry/vfsmount references on several failure exits. Signed-off-by: Al Viro --- include/linux/quotaops.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h index 742187f..ca6b9b5 100644 --- a/include/linux/quotaops.h +++ b/include/linux/quotaops.h @@ -43,6 +43,8 @@ int dquot_mark_dquot_dirty(struct dquot *dquot); int vfs_quota_on(struct super_block *sb, int type, int format_id, char *path, int remount); +int vfs_quota_on_path(struct super_block *sb, int type, int format_id, + struct path *path); int vfs_quota_on_mount(struct super_block *sb, char *qf_name, int format_id, int type); int vfs_quota_off(struct super_block *sb, int type, int remount); -- cgit v1.1 From 8d66bf5481002b0960aa49aed0987c73f5d7816c Mon Sep 17 00:00:00 2001 From: Al Viro Date: Fri, 1 Aug 2008 09:05:54 -0400 Subject: [PATCH] pass struct path * to do_add_mount() Signed-off-by: Al Viro --- include/linux/mount.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mount.h b/include/linux/mount.h index b5efaa2..30a1d63 100644 --- a/include/linux/mount.h +++ b/include/linux/mount.h @@ -105,7 +105,8 @@ extern struct vfsmount *vfs_kern_mount(struct file_system_type *type, struct nameidata; -extern int do_add_mount(struct vfsmount *newmnt, struct nameidata *nd, +struct path; +extern int do_add_mount(struct vfsmount *newmnt, struct path *path, int mnt_flags, struct list_head *fslist); extern void mark_mounts_for_expiry(struct list_head *mounts); -- cgit v1.1 From 7f30491ccd28627742e37899453ae20e3da8e18f Mon Sep 17 00:00:00 2001 From: Tony Luck Date: Fri, 1 Aug 2008 10:13:32 -0700 Subject: [IA64] Move include/asm-ia64 to arch/ia64/include/asm After moving the the include files there were a few clean-ups: 1) Some files used #include , changed to 2) Some comments alerted maintainers to look at various header files to make matching updates if certain code were to be changed. Updated these comments to use the new include paths. 3) Some header files mentioned their own names in initial comments. Just deleted these self references. Signed-off-by: Tony Luck --- include/asm-ia64/Kbuild | 16 - include/asm-ia64/a.out.h | 32 - include/asm-ia64/acpi-ext.h | 21 - include/asm-ia64/acpi.h | 167 -- include/asm-ia64/agp.h | 30 - include/asm-ia64/asmmacro.h | 135 -- include/asm-ia64/atomic.h | 226 -- include/asm-ia64/auxvec.h | 11 - include/asm-ia64/bitops.h | 468 ---- include/asm-ia64/break.h | 23 - include/asm-ia64/bug.h | 14 - include/asm-ia64/bugs.h | 19 - include/asm-ia64/byteorder.h | 42 - include/asm-ia64/cache.h | 29 - include/asm-ia64/cacheflush.h | 51 - include/asm-ia64/checksum.h | 79 - include/asm-ia64/compat.h | 207 -- include/asm-ia64/cpu.h | 22 - include/asm-ia64/cputime.h | 110 - include/asm-ia64/current.h | 17 - include/asm-ia64/cyclone.h | 15 - include/asm-ia64/delay.h | 88 - include/asm-ia64/device.h | 15 - include/asm-ia64/div64.h | 1 - include/asm-ia64/dma-mapping.h | 97 - include/asm-ia64/dma.h | 24 - include/asm-ia64/dmi.h | 11 - include/asm-ia64/elf.h | 269 --- include/asm-ia64/emergency-restart.h | 6 - include/asm-ia64/errno.h | 1 - include/asm-ia64/esi.h | 29 - include/asm-ia64/fb.h | 23 - include/asm-ia64/fcntl.h | 13 - include/asm-ia64/fpswa.h | 73 - include/asm-ia64/fpu.h | 66 - include/asm-ia64/futex.h | 124 - include/asm-ia64/gcc_intrin.h | 620 ----- include/asm-ia64/hardirq.h | 37 - include/asm-ia64/hpsim.h | 16 - include/asm-ia64/hugetlb.h | 80 - include/asm-ia64/hw_irq.h | 192 -- include/asm-ia64/ia32.h | 40 - include/asm-ia64/ia64regs.h | 100 - include/asm-ia64/intel_intrin.h | 161 -- include/asm-ia64/intrinsics.h | 241 -- include/asm-ia64/io.h | 459 ---- include/asm-ia64/ioctl.h | 1 - include/asm-ia64/ioctls.h | 93 - include/asm-ia64/iosapic.h | 126 -- include/asm-ia64/ipcbuf.h | 28 - include/asm-ia64/irq.h | 34 - include/asm-ia64/irq_regs.h | 1 - include/asm-ia64/kdebug.h | 59 - include/asm-ia64/kexec.h | 44 - include/asm-ia64/kmap_types.h | 30 - include/asm-ia64/kprobes.h | 133 -- include/asm-ia64/kregs.h | 165 -- include/asm-ia64/kvm.h | 211 -- include/asm-ia64/kvm_host.h | 527 ----- include/asm-ia64/kvm_para.h | 29 - include/asm-ia64/libata-portmap.h | 12 - include/asm-ia64/linkage.h | 14 - include/asm-ia64/local.h | 1 - include/asm-ia64/machvec.h | 460 ---- include/asm-ia64/machvec_dig.h | 16 - include/asm-ia64/machvec_hpsim.h | 18 - include/asm-ia64/machvec_hpzx1.h | 37 - include/asm-ia64/machvec_hpzx1_swiotlb.h | 42 - include/asm-ia64/machvec_init.h | 33 - include/asm-ia64/machvec_sn2.h | 139 -- include/asm-ia64/machvec_uv.h | 26 - include/asm-ia64/mc146818rtc.h | 10 - include/asm-ia64/mca.h | 179 -- include/asm-ia64/mca_asm.h | 242 -- include/asm-ia64/meminit.h | 75 - include/asm-ia64/mman.h | 33 - include/asm-ia64/mmu.h | 13 - include/asm-ia64/mmu_context.h | 198 -- include/asm-ia64/mmzone.h | 50 - include/asm-ia64/module.h | 36 - include/asm-ia64/msgbuf.h | 27 - include/asm-ia64/mutex.h | 92 - include/asm-ia64/native/inst.h | 175 -- include/asm-ia64/native/irq.h | 35 - include/asm-ia64/nodedata.h | 63 - include/asm-ia64/numa.h | 82 - include/asm-ia64/page.h | 223 -- include/asm-ia64/pal.h | 1827 --------------- include/asm-ia64/param.h | 33 - include/asm-ia64/paravirt.h | 255 --- include/asm-ia64/paravirt_privop.h | 114 - include/asm-ia64/parport.h | 20 - include/asm-ia64/patch.h | 27 - include/asm-ia64/pci.h | 167 -- include/asm-ia64/percpu.h | 51 - include/asm-ia64/perfmon.h | 279 --- include/asm-ia64/perfmon_default_smpl.h | 83 - include/asm-ia64/pgalloc.h | 122 - include/asm-ia64/pgtable.h | 615 ----- include/asm-ia64/poll.h | 1 - include/asm-ia64/posix_types.h | 126 -- include/asm-ia64/processor.h | 771 ------- include/asm-ia64/ptrace.h | 364 --- include/asm-ia64/ptrace_offsets.h | 268 --- include/asm-ia64/resource.h | 7 - include/asm-ia64/rse.h | 66 - include/asm-ia64/rwsem.h | 182 -- include/asm-ia64/sal.h | 905 -------- include/asm-ia64/scatterlist.h | 38 - include/asm-ia64/sections.h | 25 - include/asm-ia64/segment.h | 6 - include/asm-ia64/sembuf.h | 22 - include/asm-ia64/serial.h | 19 - include/asm-ia64/setup.h | 6 - include/asm-ia64/shmbuf.h | 38 - include/asm-ia64/shmparam.h | 12 - include/asm-ia64/sigcontext.h | 70 - include/asm-ia64/siginfo.h | 139 -- include/asm-ia64/signal.h | 160 -- include/asm-ia64/smp.h | 138 -- include/asm-ia64/sn/acpi.h | 17 - include/asm-ia64/sn/addrs.h | 299 --- include/asm-ia64/sn/arch.h | 86 - include/asm-ia64/sn/bte.h | 233 -- include/asm-ia64/sn/clksupport.h | 28 - include/asm-ia64/sn/geo.h | 132 -- include/asm-ia64/sn/intr.h | 68 - include/asm-ia64/sn/io.h | 274 --- include/asm-ia64/sn/ioc3.h | 241 -- include/asm-ia64/sn/klconfig.h | 246 -- include/asm-ia64/sn/l1.h | 51 - include/asm-ia64/sn/leds.h | 33 - include/asm-ia64/sn/module.h | 127 -- include/asm-ia64/sn/mspec.h | 59 - include/asm-ia64/sn/nodepda.h | 82 - include/asm-ia64/sn/pcibr_provider.h | 150 -- include/asm-ia64/sn/pcibus_provider_defs.h | 68 - include/asm-ia64/sn/pcidev.h | 85 - include/asm-ia64/sn/pda.h | 69 - include/asm-ia64/sn/pic.h | 261 --- include/asm-ia64/sn/rw_mmr.h | 28 - include/asm-ia64/sn/shub_mmr.h | 502 ----- include/asm-ia64/sn/shubio.h | 3358 ---------------------------- include/asm-ia64/sn/simulator.h | 25 - include/asm-ia64/sn/sn2/sn_hwperf.h | 242 -- include/asm-ia64/sn/sn_cpuid.h | 132 -- include/asm-ia64/sn/sn_feature_sets.h | 58 - include/asm-ia64/sn/sn_sal.h | 1188 ---------- include/asm-ia64/sn/tioca.h | 596 ----- include/asm-ia64/sn/tioca_provider.h | 207 -- include/asm-ia64/sn/tioce.h | 760 ------- include/asm-ia64/sn/tioce_provider.h | 63 - include/asm-ia64/sn/tiocp.h | 257 --- include/asm-ia64/sn/tiocx.h | 72 - include/asm-ia64/sn/types.h | 26 - include/asm-ia64/socket.h | 66 - include/asm-ia64/sockios.h | 20 - include/asm-ia64/sparsemem.h | 20 - include/asm-ia64/spinlock.h | 220 -- include/asm-ia64/spinlock_types.h | 21 - include/asm-ia64/stat.h | 51 - include/asm-ia64/statfs.h | 62 - include/asm-ia64/string.h | 21 - include/asm-ia64/suspend.h | 1 - include/asm-ia64/system.h | 292 --- include/asm-ia64/termbits.h | 207 -- include/asm-ia64/termios.h | 97 - include/asm-ia64/thread_info.h | 148 -- include/asm-ia64/timex.h | 42 - include/asm-ia64/tlb.h | 257 --- include/asm-ia64/tlbflush.h | 102 - include/asm-ia64/topology.h | 128 -- include/asm-ia64/types.h | 46 - include/asm-ia64/uaccess.h | 401 ---- include/asm-ia64/ucontext.h | 12 - include/asm-ia64/unaligned.h | 11 - include/asm-ia64/uncached.h | 12 - include/asm-ia64/unistd.h | 384 ---- include/asm-ia64/unwind.h | 233 -- include/asm-ia64/user.h | 58 - include/asm-ia64/ustack.h | 20 - include/asm-ia64/uv/uv_hub.h | 309 --- include/asm-ia64/uv/uv_mmrs.h | 673 ------ include/asm-ia64/vga.h | 25 - include/asm-ia64/xor.h | 33 - 185 files changed, 29383 deletions(-) delete mode 100644 include/asm-ia64/Kbuild delete mode 100644 include/asm-ia64/a.out.h delete mode 100644 include/asm-ia64/acpi-ext.h delete mode 100644 include/asm-ia64/acpi.h delete mode 100644 include/asm-ia64/agp.h delete mode 100644 include/asm-ia64/asmmacro.h delete mode 100644 include/asm-ia64/atomic.h delete mode 100644 include/asm-ia64/auxvec.h delete mode 100644 include/asm-ia64/bitops.h delete mode 100644 include/asm-ia64/break.h delete mode 100644 include/asm-ia64/bug.h delete mode 100644 include/asm-ia64/bugs.h delete mode 100644 include/asm-ia64/byteorder.h delete mode 100644 include/asm-ia64/cache.h delete mode 100644 include/asm-ia64/cacheflush.h delete mode 100644 include/asm-ia64/checksum.h delete mode 100644 include/asm-ia64/compat.h delete mode 100644 include/asm-ia64/cpu.h delete mode 100644 include/asm-ia64/cputime.h delete mode 100644 include/asm-ia64/current.h delete mode 100644 include/asm-ia64/cyclone.h delete mode 100644 include/asm-ia64/delay.h delete mode 100644 include/asm-ia64/device.h delete mode 100644 include/asm-ia64/div64.h delete mode 100644 include/asm-ia64/dma-mapping.h delete mode 100644 include/asm-ia64/dma.h delete mode 100644 include/asm-ia64/dmi.h delete mode 100644 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a/include/asm-ia64/a.out.h b/include/asm-ia64/a.out.h deleted file mode 100644 index 193dcfb..0000000 --- a/include/asm-ia64/a.out.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _ASM_IA64_A_OUT_H -#define _ASM_IA64_A_OUT_H - -/* - * No a.out format has been (or should be) defined so this file is - * just a dummy that allows us to get binfmt_elf compiled. It - * probably would be better to clean up binfmt_elf.c so it does not - * necessarily depend on there being a.out support. - * - * Modified 1998-2002 - * David Mosberger-Tang , Hewlett-Packard Co. - */ - -#include - -struct exec { - unsigned long a_info; - unsigned long a_text; - unsigned long a_data; - unsigned long a_bss; - unsigned long a_entry; -}; - -#define N_TXTADDR(x) 0 -#define N_DATADDR(x) 0 -#define N_BSSADDR(x) 0 -#define N_DRSIZE(x) 0 -#define N_TRSIZE(x) 0 -#define N_SYMSIZE(x) 0 -#define N_TXTOFF(x) 0 - -#endif /* _ASM_IA64_A_OUT_H */ diff --git a/include/asm-ia64/acpi-ext.h b/include/asm-ia64/acpi-ext.h deleted file mode 100644 index 734d137..0000000 --- a/include/asm-ia64/acpi-ext.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * (c) Copyright 2003, 2006 Hewlett-Packard Development Company, L.P. - * Alex Williamson - * Bjorn Helgaas - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Vendor specific extensions to ACPI. - */ - -#ifndef _ASM_IA64_ACPI_EXT_H -#define _ASM_IA64_ACPI_EXT_H - -#include -#include - -extern acpi_status hp_acpi_csr_space (acpi_handle, u64 *base, u64 *length); - -#endif /* _ASM_IA64_ACPI_EXT_H */ diff --git a/include/asm-ia64/acpi.h b/include/asm-ia64/acpi.h deleted file mode 100644 index fcfad32..0000000 --- a/include/asm-ia64/acpi.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * asm-ia64/acpi.h - * - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999 Walt Drummond - * Copyright (C) 2000,2001 J.I. Lee - * Copyright (C) 2001,2002 Paul Diefenbaugh - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - */ - -#ifndef _ASM_ACPI_H -#define _ASM_ACPI_H - -#ifdef __KERNEL__ - -#include - -#include -#include -#include -#include - -#define COMPILER_DEPENDENT_INT64 long -#define COMPILER_DEPENDENT_UINT64 unsigned long - -/* - * Calling conventions: - * - * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads) - * ACPI_EXTERNAL_XFACE - External ACPI interfaces - * ACPI_INTERNAL_XFACE - Internal ACPI interfaces - * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces - */ -#define ACPI_SYSTEM_XFACE -#define ACPI_EXTERNAL_XFACE -#define ACPI_INTERNAL_XFACE -#define ACPI_INTERNAL_VAR_XFACE - -/* Asm macros */ - -#define ACPI_ASM_MACROS -#define BREAKPOINT3 -#define ACPI_DISABLE_IRQS() local_irq_disable() -#define ACPI_ENABLE_IRQS() local_irq_enable() -#define ACPI_FLUSH_CPU_CACHE() - -static inline int -ia64_acpi_acquire_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1)); - val = ia64_cmpxchg4_acq(lock, new, old); - } while (unlikely (val != old)); - return (new < 3) ? -1 : 0; -} - -static inline int -ia64_acpi_release_global_lock (unsigned int *lock) -{ - unsigned int old, new, val; - do { - old = *lock; - new = old & ~0x3; - val = ia64_cmpxchg4_acq(lock, new, old); - } while (unlikely (val != old)); - return old & 0x1; -} - -#define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \ - ((Acq) = ia64_acpi_acquire_global_lock(&facs->global_lock)) - -#define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \ - ((Acq) = ia64_acpi_release_global_lock(&facs->global_lock)) - -#define acpi_disabled 0 /* ACPI always enabled on IA64 */ -#define acpi_noirq 0 /* ACPI always enabled on IA64 */ -#define acpi_pci_disabled 0 /* ACPI PCI always enabled on IA64 */ -#define acpi_strict 1 /* no ACPI spec workarounds on IA64 */ -#define acpi_processor_cstate_check(x) (x) /* no idle limits on IA64 :) */ -static inline void disable_acpi(void) { } - -const char *acpi_get_sysname (void); -int acpi_request_vector (u32 int_type); -int acpi_gsi_to_irq (u32 gsi, unsigned int *irq); - -/* routines for saving/restoring kernel state */ -extern int acpi_save_state_mem(void); -extern void acpi_restore_state_mem(void); -extern unsigned long acpi_wakeup_address; - -/* - * Record the cpei override flag and current logical cpu. This is - * useful for CPU removal. - */ -extern unsigned int can_cpei_retarget(void); -extern unsigned int is_cpu_cpei_target(unsigned int cpu); -extern void set_cpei_target_cpu(unsigned int cpu); -extern unsigned int get_cpei_target_cpu(void); -extern void prefill_possible_map(void); -#ifdef CONFIG_ACPI_HOTPLUG_CPU -extern int additional_cpus; -#else -#define additional_cpus 0 -#endif - -#ifdef CONFIG_ACPI_NUMA -#if MAX_NUMNODES > 256 -#define MAX_PXM_DOMAINS MAX_NUMNODES -#else -#define MAX_PXM_DOMAINS (256) -#endif -extern int __devinitdata pxm_to_nid_map[MAX_PXM_DOMAINS]; -extern int __initdata nid_to_pxm_map[MAX_NUMNODES]; -#endif - -#define acpi_unlazy_tlb(x) - -#ifdef CONFIG_ACPI_NUMA -extern cpumask_t early_cpu_possible_map; -#define for_each_possible_early_cpu(cpu) \ - for_each_cpu_mask((cpu), early_cpu_possible_map) - -static inline void per_cpu_scan_finalize(int min_cpus, int reserve_cpus) -{ - int low_cpu, high_cpu; - int cpu; - int next_nid = 0; - - low_cpu = cpus_weight(early_cpu_possible_map); - - high_cpu = max(low_cpu, min_cpus); - high_cpu = min(high_cpu + reserve_cpus, NR_CPUS); - - for (cpu = low_cpu; cpu < high_cpu; cpu++) { - cpu_set(cpu, early_cpu_possible_map); - if (node_cpuid[cpu].nid == NUMA_NO_NODE) { - node_cpuid[cpu].nid = next_nid; - next_nid++; - if (next_nid >= num_online_nodes()) - next_nid = 0; - } - } -} -#endif /* CONFIG_ACPI_NUMA */ - -#endif /*__KERNEL__*/ - -#endif /*_ASM_ACPI_H*/ diff --git a/include/asm-ia64/agp.h b/include/asm-ia64/agp.h deleted file mode 100644 index c11fdd8..0000000 --- a/include/asm-ia64/agp.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef _ASM_IA64_AGP_H -#define _ASM_IA64_AGP_H - -/* - * IA-64 specific AGP definitions. - * - * Copyright (C) 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -/* - * To avoid memory-attribute aliasing issues, we require that the AGPGART engine operate - * in coherent mode, which lets us map the AGP memory as normal (write-back) memory - * (unlike x86, where it gets mapped "write-coalescing"). - */ -#define map_page_into_agp(page) /* nothing */ -#define unmap_page_from_agp(page) /* nothing */ -#define flush_agp_cache() mb() - -/* Convert a physical address to an address suitable for the GART. */ -#define phys_to_gart(x) (x) -#define gart_to_phys(x) (x) - -/* GATT allocation. Returns/accepts GATT kernel virtual address. */ -#define alloc_gatt_pages(order) \ - ((char *)__get_free_pages(GFP_KERNEL, (order))) -#define free_gatt_pages(table, order) \ - free_pages((unsigned long)(table), (order)) - -#endif /* _ASM_IA64_AGP_H */ diff --git a/include/asm-ia64/asmmacro.h b/include/asm-ia64/asmmacro.h deleted file mode 100644 index c1642fd..0000000 --- a/include/asm-ia64/asmmacro.h +++ /dev/null @@ -1,135 +0,0 @@ -#ifndef _ASM_IA64_ASMMACRO_H -#define _ASM_IA64_ASMMACRO_H - -/* - * Copyright (C) 2000-2001, 2003-2004 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#define ENTRY(name) \ - .align 32; \ - .proc name; \ -name: - -#define ENTRY_MIN_ALIGN(name) \ - .align 16; \ - .proc name; \ -name: - -#define GLOBAL_ENTRY(name) \ - .global name; \ - ENTRY(name) - -#define END(name) \ - .endp name - -/* - * Helper macros to make unwind directives more readable: - */ - -/* prologue_gr: */ -#define ASM_UNW_PRLG_RP 0x8 -#define ASM_UNW_PRLG_PFS 0x4 -#define ASM_UNW_PRLG_PSP 0x2 -#define ASM_UNW_PRLG_PR 0x1 -#define ASM_UNW_PRLG_GRSAVE(ninputs) (32+(ninputs)) - -/* - * Helper macros for accessing user memory. - * - * When adding any new .section/.previous entries here, make sure to - * also add it to the DISCARD section in arch/ia64/kernel/gate.lds.S or - * unpleasant things will happen. - */ - - .section "__ex_table", "a" // declare section & section attributes - .previous - -# define EX(y,x...) \ - .xdata4 "__ex_table", 99f-., y-.; \ - [99:] x -# define EXCLR(y,x...) \ - .xdata4 "__ex_table", 99f-., y-.+4; \ - [99:] x - -/* - * Tag MCA recoverable instruction ranges. - */ - - .section "__mca_table", "a" // declare section & section attributes - .previous - -# define MCA_RECOVER_RANGE(y) \ - .xdata4 "__mca_table", y-., 99f-.; \ - [99:] - -/* - * Mark instructions that need a load of a virtual address patched to be - * a load of a physical address. We use this either in critical performance - * path (ivt.S - TLB miss processing) or in places where it might not be - * safe to use a "tpa" instruction (mca_asm.S - error recovery). - */ - .section ".data.patch.vtop", "a" // declare section & section attributes - .previous - -#define LOAD_PHYSICAL(pr, reg, obj) \ -[1:](pr)movl reg = obj; \ - .xdata4 ".data.patch.vtop", 1b-. - -/* - * For now, we always put in the McKinley E9 workaround. On CPUs that don't need it, - * we'll patch out the work-around bundles with NOPs, so their impact is minimal. - */ -#define DO_MCKINLEY_E9_WORKAROUND - -#ifdef DO_MCKINLEY_E9_WORKAROUND - .section ".data.patch.mckinley_e9", "a" - .previous -/* workaround for Itanium 2 Errata 9: */ -# define FSYS_RETURN \ - .xdata4 ".data.patch.mckinley_e9", 1f-.; \ -1:{ .mib; \ - nop.m 0; \ - mov r16=ar.pfs; \ - br.call.sptk.many b7=2f;; \ - }; \ -2:{ .mib; \ - nop.m 0; \ - mov ar.pfs=r16; \ - br.ret.sptk.many b6;; \ - } -#else -# define FSYS_RETURN br.ret.sptk.many b6 -#endif - -/* - * If physical stack register size is different from DEF_NUM_STACK_REG, - * dynamically patch the kernel for correct size. - */ - .section ".data.patch.phys_stack_reg", "a" - .previous -#define LOAD_PHYS_STACK_REG_SIZE(reg) \ -[1:] adds reg=IA64_NUM_PHYS_STACK_REG*8+8,r0; \ - .xdata4 ".data.patch.phys_stack_reg", 1b-. - -/* - * Up until early 2004, use of .align within a function caused bad unwind info. - * TEXT_ALIGN(n) expands into ".align n" if a fixed GAS is available or into nothing - * otherwise. - */ -#ifdef HAVE_WORKING_TEXT_ALIGN -# define TEXT_ALIGN(n) .align n -#else -# define TEXT_ALIGN(n) -#endif - -#ifdef HAVE_SERIALIZE_DIRECTIVE -# define dv_serialize_data .serialize.data -# define dv_serialize_instruction .serialize.instruction -#else -# define dv_serialize_data -# define dv_serialize_instruction -#endif - -#endif /* _ASM_IA64_ASMMACRO_H */ diff --git a/include/asm-ia64/atomic.h b/include/asm-ia64/atomic.h deleted file mode 100644 index 50c2b83..0000000 --- a/include/asm-ia64/atomic.h +++ /dev/null @@ -1,226 +0,0 @@ -#ifndef _ASM_IA64_ATOMIC_H -#define _ASM_IA64_ATOMIC_H - -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc.. - * - * NOTE: don't mess with the types below! The "unsigned long" and - * "int" types were carefully placed so as to ensure proper operation - * of the macros. - * - * Copyright (C) 1998, 1999, 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ -#include - -#include -#include - -/* - * On IA-64, counter must always be volatile to ensure that that the - * memory accesses are ordered. - */ -typedef struct { volatile __s32 counter; } atomic_t; -typedef struct { volatile __s64 counter; } atomic64_t; - -#define ATOMIC_INIT(i) ((atomic_t) { (i) }) -#define ATOMIC64_INIT(i) ((atomic64_t) { (i) }) - -#define atomic_read(v) ((v)->counter) -#define atomic64_read(v) ((v)->counter) - -#define atomic_set(v,i) (((v)->counter) = (i)) -#define atomic64_set(v,i) (((v)->counter) = (i)) - -static __inline__ int -ia64_atomic_add (int i, atomic_t *v) -{ - __s32 old, new; - CMPXCHG_BUGCHECK_DECL - - do { - CMPXCHG_BUGCHECK(v); - old = atomic_read(v); - new = old + i; - } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); - return new; -} - -static __inline__ int -ia64_atomic64_add (__s64 i, atomic64_t *v) -{ - __s64 old, new; - CMPXCHG_BUGCHECK_DECL - - do { - CMPXCHG_BUGCHECK(v); - old = atomic64_read(v); - new = old + i; - } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); - return new; -} - -static __inline__ int -ia64_atomic_sub (int i, atomic_t *v) -{ - __s32 old, new; - CMPXCHG_BUGCHECK_DECL - - do { - CMPXCHG_BUGCHECK(v); - old = atomic_read(v); - new = old - i; - } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); - return new; -} - -static __inline__ int -ia64_atomic64_sub (__s64 i, atomic64_t *v) -{ - __s64 old, new; - CMPXCHG_BUGCHECK_DECL - - do { - CMPXCHG_BUGCHECK(v); - old = atomic64_read(v); - new = old - i; - } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic64_t)) != old); - return new; -} - -#define atomic_cmpxchg(v, old, new) (cmpxchg(&((v)->counter), old, new)) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -#define atomic64_cmpxchg(v, old, new) \ - (cmpxchg(&((v)->counter), old, new)) -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - long c, old; - c = atomic64_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic64_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -#define atomic_add_return(i,v) \ -({ \ - int __ia64_aar_i = (i); \ - (__builtin_constant_p(i) \ - && ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \ - || (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \ - || (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \ - || (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \ - ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ - : ia64_atomic_add(__ia64_aar_i, v); \ -}) - -#define atomic64_add_return(i,v) \ -({ \ - long __ia64_aar_i = (i); \ - (__builtin_constant_p(i) \ - && ( (__ia64_aar_i == 1) || (__ia64_aar_i == 4) \ - || (__ia64_aar_i == 8) || (__ia64_aar_i == 16) \ - || (__ia64_aar_i == -1) || (__ia64_aar_i == -4) \ - || (__ia64_aar_i == -8) || (__ia64_aar_i == -16))) \ - ? ia64_fetch_and_add(__ia64_aar_i, &(v)->counter) \ - : ia64_atomic64_add(__ia64_aar_i, v); \ -}) - -/* - * Atomically add I to V and return TRUE if the resulting value is - * negative. - */ -static __inline__ int -atomic_add_negative (int i, atomic_t *v) -{ - return atomic_add_return(i, v) < 0; -} - -static __inline__ int -atomic64_add_negative (__s64 i, atomic64_t *v) -{ - return atomic64_add_return(i, v) < 0; -} - -#define atomic_sub_return(i,v) \ -({ \ - int __ia64_asr_i = (i); \ - (__builtin_constant_p(i) \ - && ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \ - || (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \ - || (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \ - || (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \ - ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ - : ia64_atomic_sub(__ia64_asr_i, v); \ -}) - -#define atomic64_sub_return(i,v) \ -({ \ - long __ia64_asr_i = (i); \ - (__builtin_constant_p(i) \ - && ( (__ia64_asr_i == 1) || (__ia64_asr_i == 4) \ - || (__ia64_asr_i == 8) || (__ia64_asr_i == 16) \ - || (__ia64_asr_i == -1) || (__ia64_asr_i == -4) \ - || (__ia64_asr_i == -8) || (__ia64_asr_i == -16))) \ - ? ia64_fetch_and_add(-__ia64_asr_i, &(v)->counter) \ - : ia64_atomic64_sub(__ia64_asr_i, v); \ -}) - -#define atomic_dec_return(v) atomic_sub_return(1, (v)) -#define atomic_inc_return(v) atomic_add_return(1, (v)) -#define atomic64_dec_return(v) atomic64_sub_return(1, (v)) -#define atomic64_inc_return(v) atomic64_add_return(1, (v)) - -#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) -#define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) -#define atomic64_sub_and_test(i,v) (atomic64_sub_return((i), (v)) == 0) -#define atomic64_dec_and_test(v) (atomic64_sub_return(1, (v)) == 0) -#define atomic64_inc_and_test(v) (atomic64_add_return(1, (v)) == 0) - -#define atomic_add(i,v) atomic_add_return((i), (v)) -#define atomic_sub(i,v) atomic_sub_return((i), (v)) -#define atomic_inc(v) atomic_add(1, (v)) -#define atomic_dec(v) atomic_sub(1, (v)) - -#define atomic64_add(i,v) atomic64_add_return((i), (v)) -#define atomic64_sub(i,v) atomic64_sub_return((i), (v)) -#define atomic64_inc(v) atomic64_add(1, (v)) -#define atomic64_dec(v) atomic64_sub(1, (v)) - -/* Atomic operations are already serializing */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#include -#endif /* _ASM_IA64_ATOMIC_H */ diff --git a/include/asm-ia64/auxvec.h b/include/asm-ia64/auxvec.h deleted file mode 100644 index 23cebe5..0000000 --- a/include/asm-ia64/auxvec.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_IA64_AUXVEC_H -#define _ASM_IA64_AUXVEC_H - -/* - * Architecture-neutral AT_ values are in the range 0-17. Leave some room for more of - * them, start the architecture-specific ones at 32. - */ -#define AT_SYSINFO 32 -#define AT_SYSINFO_EHDR 33 - -#endif /* _ASM_IA64_AUXVEC_H */ diff --git a/include/asm-ia64/bitops.h b/include/asm-ia64/bitops.h deleted file mode 100644 index e2ca800..0000000 --- a/include/asm-ia64/bitops.h +++ /dev/null @@ -1,468 +0,0 @@ -#ifndef _ASM_IA64_BITOPS_H -#define _ASM_IA64_BITOPS_H - -/* - * Copyright (C) 1998-2003 Hewlett-Packard Co - * David Mosberger-Tang - * - * 02/06/02 find_next_bit() and find_first_bit() added from Erich Focht's ia64 - * O(1) scheduler patch - */ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include -#include - -/** - * set_bit - Atomically set a bit in memory - * @nr: the bit to set - * @addr: the address to start counting from - * - * This function is atomic and may not be reordered. See __set_bit() - * if you do not require the atomic guarantees. - * Note that @nr may be almost arbitrarily large; this function is not - * restricted to acting on a single-word quantity. - * - * The address must be (at least) "long" aligned. - * Note that there are driver (e.g., eepro100) which use these operations to - * operate on hw-defined data-structures, so we can't easily change these - * operations to force a bigger alignment. - * - * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). - */ -static __inline__ void -set_bit (int nr, volatile void *addr) -{ - __u32 bit, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - bit = 1 << (nr & 31); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old | bit; - } while (cmpxchg_acq(m, old, new) != old); -} - -/** - * __set_bit - Set a bit in memory - * @nr: the bit to set - * @addr: the address to start counting from - * - * Unlike set_bit(), this function is non-atomic and may be reordered. - * If it's called on the same region of memory simultaneously, the effect - * may be that only one operation succeeds. - */ -static __inline__ void -__set_bit (int nr, volatile void *addr) -{ - *((__u32 *) addr + (nr >> 5)) |= (1 << (nr & 31)); -} - -/* - * clear_bit() has "acquire" semantics. - */ -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() do { /* skip */; } while (0) - -/** - * clear_bit - Clears a bit in memory - * @nr: Bit to clear - * @addr: Address to start counting from - * - * clear_bit() is atomic and may not be reordered. However, it does - * not contain a memory barrier, so if it is used for locking purposes, - * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() - * in order to ensure changes are visible on other processors. - */ -static __inline__ void -clear_bit (int nr, volatile void *addr) -{ - __u32 mask, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - mask = ~(1 << (nr & 31)); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old & mask; - } while (cmpxchg_acq(m, old, new) != old); -} - -/** - * clear_bit_unlock - Clears a bit in memory with release - * @nr: Bit to clear - * @addr: Address to start counting from - * - * clear_bit_unlock() is atomic and may not be reordered. It does - * contain a memory barrier suitable for unlock type operations. - */ -static __inline__ void -clear_bit_unlock (int nr, volatile void *addr) -{ - __u32 mask, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - mask = ~(1 << (nr & 31)); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old & mask; - } while (cmpxchg_rel(m, old, new) != old); -} - -/** - * __clear_bit_unlock - Non-atomically clears a bit in memory with release - * @nr: Bit to clear - * @addr: Address to start counting from - * - * Similarly to clear_bit_unlock, the implementation uses a store - * with release semantics. See also __raw_spin_unlock(). - */ -static __inline__ void -__clear_bit_unlock(int nr, void *addr) -{ - __u32 * const m = (__u32 *) addr + (nr >> 5); - __u32 const new = *m & ~(1 << (nr & 31)); - - ia64_st4_rel_nta(m, new); -} - -/** - * __clear_bit - Clears a bit in memory (non-atomic version) - * @nr: the bit to clear - * @addr: the address to start counting from - * - * Unlike clear_bit(), this function is non-atomic and may be reordered. - * If it's called on the same region of memory simultaneously, the effect - * may be that only one operation succeeds. - */ -static __inline__ void -__clear_bit (int nr, volatile void *addr) -{ - *((__u32 *) addr + (nr >> 5)) &= ~(1 << (nr & 31)); -} - -/** - * change_bit - Toggle a bit in memory - * @nr: Bit to toggle - * @addr: Address to start counting from - * - * change_bit() is atomic and may not be reordered. - * Note that @nr may be almost arbitrarily large; this function is not - * restricted to acting on a single-word quantity. - */ -static __inline__ void -change_bit (int nr, volatile void *addr) -{ - __u32 bit, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - bit = (1 << (nr & 31)); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old ^ bit; - } while (cmpxchg_acq(m, old, new) != old); -} - -/** - * __change_bit - Toggle a bit in memory - * @nr: the bit to toggle - * @addr: the address to start counting from - * - * Unlike change_bit(), this function is non-atomic and may be reordered. - * If it's called on the same region of memory simultaneously, the effect - * may be that only one operation succeeds. - */ -static __inline__ void -__change_bit (int nr, volatile void *addr) -{ - *((__u32 *) addr + (nr >> 5)) ^= (1 << (nr & 31)); -} - -/** - * test_and_set_bit - Set a bit and return its old value - * @nr: Bit to set - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies the acquisition side of the memory barrier. - */ -static __inline__ int -test_and_set_bit (int nr, volatile void *addr) -{ - __u32 bit, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - bit = 1 << (nr & 31); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old | bit; - } while (cmpxchg_acq(m, old, new) != old); - return (old & bit) != 0; -} - -/** - * test_and_set_bit_lock - Set a bit and return its old value for lock - * @nr: Bit to set - * @addr: Address to count from - * - * This is the same as test_and_set_bit on ia64 - */ -#define test_and_set_bit_lock test_and_set_bit - -/** - * __test_and_set_bit - Set a bit and return its old value - * @nr: Bit to set - * @addr: Address to count from - * - * This operation is non-atomic and can be reordered. - * If two examples of this operation race, one can appear to succeed - * but actually fail. You must protect multiple accesses with a lock. - */ -static __inline__ int -__test_and_set_bit (int nr, volatile void *addr) -{ - __u32 *p = (__u32 *) addr + (nr >> 5); - __u32 m = 1 << (nr & 31); - int oldbitset = (*p & m) != 0; - - *p |= m; - return oldbitset; -} - -/** - * test_and_clear_bit - Clear a bit and return its old value - * @nr: Bit to clear - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies the acquisition side of the memory barrier. - */ -static __inline__ int -test_and_clear_bit (int nr, volatile void *addr) -{ - __u32 mask, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - mask = ~(1 << (nr & 31)); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old & mask; - } while (cmpxchg_acq(m, old, new) != old); - return (old & ~mask) != 0; -} - -/** - * __test_and_clear_bit - Clear a bit and return its old value - * @nr: Bit to clear - * @addr: Address to count from - * - * This operation is non-atomic and can be reordered. - * If two examples of this operation race, one can appear to succeed - * but actually fail. You must protect multiple accesses with a lock. - */ -static __inline__ int -__test_and_clear_bit(int nr, volatile void * addr) -{ - __u32 *p = (__u32 *) addr + (nr >> 5); - __u32 m = 1 << (nr & 31); - int oldbitset = *p & m; - - *p &= ~m; - return oldbitset; -} - -/** - * test_and_change_bit - Change a bit and return its old value - * @nr: Bit to change - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies the acquisition side of the memory barrier. - */ -static __inline__ int -test_and_change_bit (int nr, volatile void *addr) -{ - __u32 bit, old, new; - volatile __u32 *m; - CMPXCHG_BUGCHECK_DECL - - m = (volatile __u32 *) addr + (nr >> 5); - bit = (1 << (nr & 31)); - do { - CMPXCHG_BUGCHECK(m); - old = *m; - new = old ^ bit; - } while (cmpxchg_acq(m, old, new) != old); - return (old & bit) != 0; -} - -/** - * __test_and_change_bit - Change a bit and return its old value - * @nr: Bit to change - * @addr: Address to count from - * - * This operation is non-atomic and can be reordered. - */ -static __inline__ int -__test_and_change_bit (int nr, void *addr) -{ - __u32 old, bit = (1 << (nr & 31)); - __u32 *m = (__u32 *) addr + (nr >> 5); - - old = *m; - *m = old ^ bit; - return (old & bit) != 0; -} - -static __inline__ int -test_bit (int nr, const volatile void *addr) -{ - return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31)); -} - -/** - * ffz - find the first zero bit in a long word - * @x: The long word to find the bit in - * - * Returns the bit-number (0..63) of the first (least significant) zero bit. - * Undefined if no zero exists, so code should check against ~0UL first... - */ -static inline unsigned long -ffz (unsigned long x) -{ - unsigned long result; - - result = ia64_popcnt(x & (~x - 1)); - return result; -} - -/** - * __ffs - find first bit in word. - * @x: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static __inline__ unsigned long -__ffs (unsigned long x) -{ - unsigned long result; - - result = ia64_popcnt((x-1) & ~x); - return result; -} - -#ifdef __KERNEL__ - -/* - * Return bit number of last (most-significant) bit set. Undefined - * for x==0. Bits are numbered from 0..63 (e.g., ia64_fls(9) == 3). - */ -static inline unsigned long -ia64_fls (unsigned long x) -{ - long double d = x; - long exp; - - exp = ia64_getf_exp(d); - return exp - 0xffff; -} - -/* - * Find the last (most significant) bit set. Returns 0 for x==0 and - * bits are numbered from 1..32 (e.g., fls(9) == 4). - */ -static inline int -fls (int t) -{ - unsigned long x = t & 0xffffffffu; - - if (!x) - return 0; - x |= x >> 1; - x |= x >> 2; - x |= x >> 4; - x |= x >> 8; - x |= x >> 16; - return ia64_popcnt(x); -} - -/* - * Find the last (most significant) bit set. Undefined for x==0. - * Bits are numbered from 0..63 (e.g., __fls(9) == 3). - */ -static inline unsigned long -__fls (unsigned long x) -{ - x |= x >> 1; - x |= x >> 2; - x |= x >> 4; - x |= x >> 8; - x |= x >> 16; - x |= x >> 32; - return ia64_popcnt(x) - 1; -} - -#include - -/* - * ffs: find first bit set. This is defined the same way as the libc and - * compiler builtin ffs routines, therefore differs in spirit from the above - * ffz (man ffs): it operates on "int" values only and the result value is the - * bit number + 1. ffs(0) is defined to return zero. - */ -#define ffs(x) __builtin_ffs(x) - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ -static __inline__ unsigned long -hweight64 (unsigned long x) -{ - unsigned long result; - result = ia64_popcnt(x); - return result; -} - -#define hweight32(x) (unsigned int) hweight64((x) & 0xfffffffful) -#define hweight16(x) (unsigned int) hweight64((x) & 0xfffful) -#define hweight8(x) (unsigned int) hweight64((x) & 0xfful) - -#endif /* __KERNEL__ */ - -#include - -#ifdef __KERNEL__ - -#include - -#define ext2_set_bit_atomic(l,n,a) test_and_set_bit(n,a) -#define ext2_clear_bit_atomic(l,n,a) test_and_clear_bit(n,a) - -#include -#include - -#endif /* __KERNEL__ */ - -#endif /* _ASM_IA64_BITOPS_H */ diff --git a/include/asm-ia64/break.h b/include/asm-ia64/break.h deleted file mode 100644 index f034020..0000000 --- a/include/asm-ia64/break.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _ASM_IA64_BREAK_H -#define _ASM_IA64_BREAK_H - -/* - * IA-64 Linux break numbers. - * - * Copyright (C) 1999 Hewlett-Packard Co - * Copyright (C) 1999 David Mosberger-Tang - */ - -/* - * OS-specific debug break numbers: - */ -#define __IA64_BREAK_KDB 0x80100 -#define __IA64_BREAK_KPROBE 0x81000 /* .. 0x81fff */ -#define __IA64_BREAK_JPROBE 0x82000 - -/* - * OS-specific break numbers: - */ -#define __IA64_BREAK_SYSCALL 0x100000 - -#endif /* _ASM_IA64_BREAK_H */ diff --git a/include/asm-ia64/bug.h b/include/asm-ia64/bug.h deleted file mode 100644 index 823616b..0000000 --- a/include/asm-ia64/bug.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _ASM_IA64_BUG_H -#define _ASM_IA64_BUG_H - -#ifdef CONFIG_BUG -#define ia64_abort() __builtin_trap() -#define BUG() do { printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); ia64_abort(); } while (0) - -/* should this BUG be made generic? */ -#define HAVE_ARCH_BUG -#endif - -#include - -#endif diff --git a/include/asm-ia64/bugs.h b/include/asm-ia64/bugs.h deleted file mode 100644 index 433523e..0000000 --- a/include/asm-ia64/bugs.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - * - * Based on . - * - * Modified 1998, 1999, 2003 - * David Mosberger-Tang , Hewlett-Packard Co. - */ -#ifndef _ASM_IA64_BUGS_H -#define _ASM_IA64_BUGS_H - -#include - -extern void check_bugs (void); - -#endif /* _ASM_IA64_BUGS_H */ diff --git a/include/asm-ia64/byteorder.h b/include/asm-ia64/byteorder.h deleted file mode 100644 index 69bd41d..0000000 --- a/include/asm-ia64/byteorder.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASM_IA64_BYTEORDER_H -#define _ASM_IA64_BYTEORDER_H - -/* - * Modified 1998, 1999 - * David Mosberger-Tang , Hewlett-Packard Co. - */ - -#include -#include -#include - -static __inline__ __attribute_const__ __u64 -__ia64_swab64 (__u64 x) -{ - __u64 result; - - result = ia64_mux1(x, ia64_mux1_rev); - return result; -} - -static __inline__ __attribute_const__ __u32 -__ia64_swab32 (__u32 x) -{ - return __ia64_swab64(x) >> 32; -} - -static __inline__ __attribute_const__ __u16 -__ia64_swab16(__u16 x) -{ - return __ia64_swab64(x) >> 48; -} - -#define __arch__swab64(x) __ia64_swab64(x) -#define __arch__swab32(x) __ia64_swab32(x) -#define __arch__swab16(x) __ia64_swab16(x) - -#define __BYTEORDER_HAS_U64__ - -#include - -#endif /* _ASM_IA64_BYTEORDER_H */ diff --git a/include/asm-ia64/cache.h b/include/asm-ia64/cache.h deleted file mode 100644 index e7482bd..0000000 --- a/include/asm-ia64/cache.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _ASM_IA64_CACHE_H -#define _ASM_IA64_CACHE_H - - -/* - * Copyright (C) 1998-2000 Hewlett-Packard Co - * David Mosberger-Tang - */ - -/* Bytes per L1 (data) cache line. */ -#define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#ifdef CONFIG_SMP -# define SMP_CACHE_SHIFT L1_CACHE_SHIFT -# define SMP_CACHE_BYTES L1_CACHE_BYTES -#else - /* - * The "aligned" directive can only _increase_ alignment, so this is - * safe and provides an easy way to avoid wasting space on a - * uni-processor: - */ -# define SMP_CACHE_SHIFT 3 -# define SMP_CACHE_BYTES (1 << 3) -#endif - -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) - -#endif /* _ASM_IA64_CACHE_H */ diff --git a/include/asm-ia64/cacheflush.h b/include/asm-ia64/cacheflush.h deleted file mode 100644 index afcfbda..0000000 --- a/include/asm-ia64/cacheflush.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _ASM_IA64_CACHEFLUSH_H -#define _ASM_IA64_CACHEFLUSH_H - -/* - * Copyright (C) 2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include -#include - -#include - -/* - * Cache flushing routines. This is the kind of stuff that can be very expensive, so try - * to avoid them whenever possible. - */ - -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_icache_page(vma,page) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define flush_dcache_page(page) \ -do { \ - clear_bit(PG_arch_1, &(page)->flags); \ -} while (0) - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -extern void flush_icache_range (unsigned long start, unsigned long end); - -#define flush_icache_user_range(vma, page, user_addr, len) \ -do { \ - unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK); \ - flush_icache_range(_addr, _addr + (len)); \ -} while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ -do { memcpy(dst, src, len); \ - flush_icache_user_range(vma, page, vaddr, len); \ -} while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -#endif /* _ASM_IA64_CACHEFLUSH_H */ diff --git a/include/asm-ia64/checksum.h b/include/asm-ia64/checksum.h deleted file mode 100644 index 97af155..0000000 --- a/include/asm-ia64/checksum.h +++ /dev/null @@ -1,79 +0,0 @@ -#ifndef _ASM_IA64_CHECKSUM_H -#define _ASM_IA64_CHECKSUM_H - -/* - * Modified 1998, 1999 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -/* - * Computes the checksum of the TCP/UDP pseudo-header returns a 16-bit - * checksum, already complemented - */ -extern __sum16 csum_tcpudp_magic (__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum); - -extern __wsum csum_tcpudp_nofold (__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum); - -/* - * Computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * Same as csum_partial, but copies from src while it checksums. - * - * Here it is even more important to align src and dst on a 32-bit (or - * even better 64-bit) boundary. - */ -extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, - int *errp); - -extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum); - -/* - * This routine is used for miscellaneous IP-like checksums, mainly in - * icmp.c - */ -extern __sum16 ip_compute_csum(const void *buff, int len); - -/* - * Fold a partial checksum without adding pseudo headers. - */ -static inline __sum16 csum_fold(__wsum csum) -{ - u32 sum = (__force u32)csum; - sum = (sum & 0xffff) + (sum >> 16); - sum = (sum & 0xffff) + (sum >> 16); - return (__force __sum16)~sum; -} - -#define _HAVE_ARCH_IPV6_CSUM 1 -struct in6_addr; -extern __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, __u32 len, unsigned short proto, - __wsum csum); - -#endif /* _ASM_IA64_CHECKSUM_H */ diff --git a/include/asm-ia64/compat.h b/include/asm-ia64/compat.h deleted file mode 100644 index dfcf75b..0000000 --- a/include/asm-ia64/compat.h +++ /dev/null @@ -1,207 +0,0 @@ -#ifndef _ASM_IA64_COMPAT_H -#define _ASM_IA64_COMPAT_H -/* - * Architecture specific compatibility types - */ -#include - -#define COMPAT_USER_HZ 100 - -typedef u32 compat_size_t; -typedef s32 compat_ssize_t; -typedef s32 compat_time_t; -typedef s32 compat_clock_t; -typedef s32 compat_key_t; -typedef s32 compat_pid_t; -typedef u16 __compat_uid_t; -typedef u16 __compat_gid_t; -typedef u32 __compat_uid32_t; -typedef u32 __compat_gid32_t; -typedef u16 compat_mode_t; -typedef u32 compat_ino_t; -typedef u16 compat_dev_t; -typedef s32 compat_off_t; -typedef s64 compat_loff_t; -typedef u16 compat_nlink_t; -typedef u16 compat_ipc_pid_t; -typedef s32 compat_daddr_t; -typedef u32 compat_caddr_t; -typedef __kernel_fsid_t compat_fsid_t; -typedef s32 compat_timer_t; - -typedef s32 compat_int_t; -typedef s32 compat_long_t; -typedef s64 __attribute__((aligned(4))) compat_s64; -typedef u32 compat_uint_t; -typedef u32 compat_ulong_t; -typedef u64 __attribute__((aligned(4))) compat_u64; - -struct compat_timespec { - compat_time_t tv_sec; - s32 tv_nsec; -}; - -struct compat_timeval { - compat_time_t tv_sec; - s32 tv_usec; -}; - -struct compat_stat { - compat_dev_t st_dev; - u16 __pad1; - compat_ino_t st_ino; - compat_mode_t st_mode; - compat_nlink_t st_nlink; - __compat_uid_t st_uid; - __compat_gid_t st_gid; - compat_dev_t st_rdev; - u16 __pad2; - u32 st_size; - u32 st_blksize; - u32 st_blocks; - u32 st_atime; - u32 st_atime_nsec; - u32 st_mtime; - u32 st_mtime_nsec; - u32 st_ctime; - u32 st_ctime_nsec; - u32 __unused4; - u32 __unused5; -}; - -struct compat_flock { - short l_type; - short l_whence; - compat_off_t l_start; - compat_off_t l_len; - compat_pid_t l_pid; -}; - -#define F_GETLK64 12 -#define F_SETLK64 13 -#define F_SETLKW64 14 - -/* - * IA32 uses 4 byte alignment for 64 bit quantities, - * so we need to pack this structure. - */ -struct compat_flock64 { - short l_type; - short l_whence; - compat_loff_t l_start; - compat_loff_t l_len; - compat_pid_t l_pid; -} __attribute__((packed)); - -struct compat_statfs { - int f_type; - int f_bsize; - int f_blocks; - int f_bfree; - int f_bavail; - int f_files; - int f_ffree; - compat_fsid_t f_fsid; - int f_namelen; /* SunOS ignores this field. */ - int f_frsize; - int f_spare[5]; -}; - -#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff -#define COMPAT_RLIM_INFINITY 0xffffffff - -typedef u32 compat_old_sigset_t; /* at least 32 bits */ - -#define _COMPAT_NSIG 64 -#define _COMPAT_NSIG_BPW 32 - -typedef u32 compat_sigset_word; - -#define COMPAT_OFF_T_MAX 0x7fffffff -#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL - -struct compat_ipc64_perm { - compat_key_t key; - __compat_uid32_t uid; - __compat_gid32_t gid; - __compat_uid32_t cuid; - __compat_gid32_t cgid; - unsigned short mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - compat_ulong_t unused1; - compat_ulong_t unused2; -}; - -struct compat_semid64_ds { - struct compat_ipc64_perm sem_perm; - compat_time_t sem_otime; - compat_ulong_t __unused1; - compat_time_t sem_ctime; - compat_ulong_t __unused2; - compat_ulong_t sem_nsems; - compat_ulong_t __unused3; - compat_ulong_t __unused4; -}; - -struct compat_msqid64_ds { - struct compat_ipc64_perm msg_perm; - compat_time_t msg_stime; - compat_ulong_t __unused1; - compat_time_t msg_rtime; - compat_ulong_t __unused2; - compat_time_t msg_ctime; - compat_ulong_t __unused3; - compat_ulong_t msg_cbytes; - compat_ulong_t msg_qnum; - compat_ulong_t msg_qbytes; - compat_pid_t msg_lspid; - compat_pid_t msg_lrpid; - compat_ulong_t __unused4; - compat_ulong_t __unused5; -}; - -struct compat_shmid64_ds { - struct compat_ipc64_perm shm_perm; - compat_size_t shm_segsz; - compat_time_t shm_atime; - compat_ulong_t __unused1; - compat_time_t shm_dtime; - compat_ulong_t __unused2; - compat_time_t shm_ctime; - compat_ulong_t __unused3; - compat_pid_t shm_cpid; - compat_pid_t shm_lpid; - compat_ulong_t shm_nattch; - compat_ulong_t __unused4; - compat_ulong_t __unused5; -}; - -/* - * A pointer passed in from user mode. This should not be used for syscall parameters, - * just declare them as pointers because the syscall entry code will have appropriately - * converted them already. - */ -typedef u32 compat_uptr_t; - -static inline void __user * -compat_ptr (compat_uptr_t uptr) -{ - return (void __user *) (unsigned long) uptr; -} - -static inline compat_uptr_t -ptr_to_compat(void __user *uptr) -{ - return (u32)(unsigned long)uptr; -} - -static __inline__ void __user * -compat_alloc_user_space (long len) -{ - struct pt_regs *regs = task_pt_regs(current); - return (void __user *) (((regs->r12 & 0xffffffff) & -16) - len); -} - -#endif /* _ASM_IA64_COMPAT_H */ diff --git a/include/asm-ia64/cpu.h b/include/asm-ia64/cpu.h deleted file mode 100644 index fcca30b..0000000 --- a/include/asm-ia64/cpu.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASM_IA64_CPU_H_ -#define _ASM_IA64_CPU_H_ - -#include -#include -#include -#include - -struct ia64_cpu { - struct cpu cpu; -}; - -DECLARE_PER_CPU(struct ia64_cpu, cpu_devices); - -DECLARE_PER_CPU(int, cpu_state); - -#ifdef CONFIG_HOTPLUG_CPU -extern int arch_register_cpu(int num); -extern void arch_unregister_cpu(int); -#endif - -#endif /* _ASM_IA64_CPU_H_ */ diff --git a/include/asm-ia64/cputime.h b/include/asm-ia64/cputime.h deleted file mode 100644 index f9abdec..0000000 --- a/include/asm-ia64/cputime.h +++ /dev/null @@ -1,110 +0,0 @@ -/* - * include/asm-ia64/cputime.h: - * Definitions for measuring cputime on ia64 machines. - * - * Based on . - * - * Copyright (C) 2007 FUJITSU LIMITED - * Copyright (C) 2007 Hidetoshi Seto - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * If we have CONFIG_VIRT_CPU_ACCOUNTING, we measure cpu time in nsec. - * Otherwise we measure cpu time in jiffies using the generic definitions. - */ - -#ifndef __IA64_CPUTIME_H -#define __IA64_CPUTIME_H - -#ifndef CONFIG_VIRT_CPU_ACCOUNTING -#include -#else - -#include -#include -#include - -typedef u64 cputime_t; -typedef u64 cputime64_t; - -#define cputime_zero ((cputime_t)0) -#define cputime_max ((~((cputime_t)0) >> 1) - 1) -#define cputime_add(__a, __b) ((__a) + (__b)) -#define cputime_sub(__a, __b) ((__a) - (__b)) -#define cputime_div(__a, __n) ((__a) / (__n)) -#define cputime_halve(__a) ((__a) >> 1) -#define cputime_eq(__a, __b) ((__a) == (__b)) -#define cputime_gt(__a, __b) ((__a) > (__b)) -#define cputime_ge(__a, __b) ((__a) >= (__b)) -#define cputime_lt(__a, __b) ((__a) < (__b)) -#define cputime_le(__a, __b) ((__a) <= (__b)) - -#define cputime64_zero ((cputime64_t)0) -#define cputime64_add(__a, __b) ((__a) + (__b)) -#define cputime64_sub(__a, __b) ((__a) - (__b)) -#define cputime_to_cputime64(__ct) (__ct) - -/* - * Convert cputime <-> jiffies (HZ) - */ -#define cputime_to_jiffies(__ct) ((__ct) / (NSEC_PER_SEC / HZ)) -#define jiffies_to_cputime(__jif) ((__jif) * (NSEC_PER_SEC / HZ)) -#define cputime64_to_jiffies64(__ct) ((__ct) / (NSEC_PER_SEC / HZ)) -#define jiffies64_to_cputime64(__jif) ((__jif) * (NSEC_PER_SEC / HZ)) - -/* - * Convert cputime <-> milliseconds - */ -#define cputime_to_msecs(__ct) ((__ct) / NSEC_PER_MSEC) -#define msecs_to_cputime(__msecs) ((__msecs) * NSEC_PER_MSEC) - -/* - * Convert cputime <-> seconds - */ -#define cputime_to_secs(__ct) ((__ct) / NSEC_PER_SEC) -#define secs_to_cputime(__secs) ((__secs) * NSEC_PER_SEC) - -/* - * Convert cputime <-> timespec (nsec) - */ -static inline cputime_t timespec_to_cputime(const struct timespec *val) -{ - cputime_t ret = val->tv_sec * NSEC_PER_SEC; - return (ret + val->tv_nsec); -} -static inline void cputime_to_timespec(const cputime_t ct, struct timespec *val) -{ - val->tv_sec = ct / NSEC_PER_SEC; - val->tv_nsec = ct % NSEC_PER_SEC; -} - -/* - * Convert cputime <-> timeval (msec) - */ -static inline cputime_t timeval_to_cputime(struct timeval *val) -{ - cputime_t ret = val->tv_sec * NSEC_PER_SEC; - return (ret + val->tv_usec * NSEC_PER_USEC); -} -static inline void cputime_to_timeval(const cputime_t ct, struct timeval *val) -{ - val->tv_sec = ct / NSEC_PER_SEC; - val->tv_usec = (ct % NSEC_PER_SEC) / NSEC_PER_USEC; -} - -/* - * Convert cputime <-> clock (USER_HZ) - */ -#define cputime_to_clock_t(__ct) ((__ct) / (NSEC_PER_SEC / USER_HZ)) -#define clock_t_to_cputime(__x) ((__x) * (NSEC_PER_SEC / USER_HZ)) - -/* - * Convert cputime64 to clock. - */ -#define cputime64_to_clock_t(__ct) cputime_to_clock_t((cputime_t)__ct) - -#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ -#endif /* __IA64_CPUTIME_H */ diff --git a/include/asm-ia64/current.h b/include/asm-ia64/current.h deleted file mode 100644 index c659f90..0000000 --- a/include/asm-ia64/current.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _ASM_IA64_CURRENT_H -#define _ASM_IA64_CURRENT_H - -/* - * Modified 1998-2000 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -/* - * In kernel mode, thread pointer (r13) is used to point to the current task - * structure. - */ -#define current ((struct task_struct *) ia64_getreg(_IA64_REG_TP)) - -#endif /* _ASM_IA64_CURRENT_H */ diff --git a/include/asm-ia64/cyclone.h b/include/asm-ia64/cyclone.h deleted file mode 100644 index 88f6500..0000000 --- a/include/asm-ia64/cyclone.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef ASM_IA64_CYCLONE_H -#define ASM_IA64_CYCLONE_H - -#ifdef CONFIG_IA64_CYCLONE -extern int use_cyclone; -extern void __init cyclone_setup(void); -#else /* CONFIG_IA64_CYCLONE */ -#define use_cyclone 0 -static inline void cyclone_setup(void) -{ - printk(KERN_ERR "Cyclone Counter: System not configured" - " w/ CONFIG_IA64_CYCLONE.\n"); -} -#endif /* CONFIG_IA64_CYCLONE */ -#endif /* !ASM_IA64_CYCLONE_H */ diff --git a/include/asm-ia64/delay.h b/include/asm-ia64/delay.h deleted file mode 100644 index a30a62f..0000000 --- a/include/asm-ia64/delay.h +++ /dev/null @@ -1,88 +0,0 @@ -#ifndef _ASM_IA64_DELAY_H -#define _ASM_IA64_DELAY_H - -/* - * Delay routines using a pre-computed "cycles/usec" value. - * - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999 Walt Drummond - * Copyright (C) 1999 Asit Mallick - * Copyright (C) 1999 Don Dugger - */ - -#include -#include -#include - -#include -#include - -static __inline__ void -ia64_set_itm (unsigned long val) -{ - ia64_setreg(_IA64_REG_CR_ITM, val); - ia64_srlz_d(); -} - -static __inline__ unsigned long -ia64_get_itm (void) -{ - unsigned long result; - - result = ia64_getreg(_IA64_REG_CR_ITM); - ia64_srlz_d(); - return result; -} - -static __inline__ void -ia64_set_itv (unsigned long val) -{ - ia64_setreg(_IA64_REG_CR_ITV, val); - ia64_srlz_d(); -} - -static __inline__ unsigned long -ia64_get_itv (void) -{ - return ia64_getreg(_IA64_REG_CR_ITV); -} - -static __inline__ void -ia64_set_itc (unsigned long val) -{ - ia64_setreg(_IA64_REG_AR_ITC, val); - ia64_srlz_d(); -} - -static __inline__ unsigned long -ia64_get_itc (void) -{ - unsigned long result; - - result = ia64_getreg(_IA64_REG_AR_ITC); - ia64_barrier(); -#ifdef CONFIG_ITANIUM - while (unlikely((__s32) result == -1)) { - result = ia64_getreg(_IA64_REG_AR_ITC); - ia64_barrier(); - } -#endif - return result; -} - -extern void ia64_delay_loop (unsigned long loops); - -static __inline__ void -__delay (unsigned long loops) -{ - if (unlikely(loops < 1)) - return; - - ia64_delay_loop (loops - 1); -} - -extern void udelay (unsigned long usecs); - -#endif /* _ASM_IA64_DELAY_H */ diff --git a/include/asm-ia64/device.h b/include/asm-ia64/device.h deleted file mode 100644 index 3db6daf..0000000 --- a/include/asm-ia64/device.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#ifndef _ASM_IA64_DEVICE_H -#define _ASM_IA64_DEVICE_H - -struct dev_archdata { -#ifdef CONFIG_ACPI - void *acpi_handle; -#endif -}; - -#endif /* _ASM_IA64_DEVICE_H */ diff --git a/include/asm-ia64/div64.h b/include/asm-ia64/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-ia64/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/dma-mapping.h b/include/asm-ia64/dma-mapping.h deleted file mode 100644 index 9f0df9b..0000000 --- a/include/asm-ia64/dma-mapping.h +++ /dev/null @@ -1,97 +0,0 @@ -#ifndef _ASM_IA64_DMA_MAPPING_H -#define _ASM_IA64_DMA_MAPPING_H - -/* - * Copyright (C) 2003-2004 Hewlett-Packard Co - * David Mosberger-Tang - */ -#include -#include - -#define dma_alloc_coherent platform_dma_alloc_coherent -/* coherent mem. is cheap */ -static inline void * -dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t flag) -{ - return dma_alloc_coherent(dev, size, dma_handle, flag); -} -#define dma_free_coherent platform_dma_free_coherent -static inline void -dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle) -{ - dma_free_coherent(dev, size, cpu_addr, dma_handle); -} -#define dma_map_single_attrs platform_dma_map_single_attrs -static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, int dir) -{ - return dma_map_single_attrs(dev, cpu_addr, size, dir, NULL); -} -#define dma_map_sg_attrs platform_dma_map_sg_attrs -static inline int dma_map_sg(struct device *dev, struct scatterlist *sgl, - int nents, int dir) -{ - return dma_map_sg_attrs(dev, sgl, nents, dir, NULL); -} -#define dma_unmap_single_attrs platform_dma_unmap_single_attrs -static inline void dma_unmap_single(struct device *dev, dma_addr_t cpu_addr, - size_t size, int dir) -{ - return dma_unmap_single_attrs(dev, cpu_addr, size, dir, NULL); -} -#define dma_unmap_sg_attrs platform_dma_unmap_sg_attrs -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sgl, - int nents, int dir) -{ - return dma_unmap_sg_attrs(dev, sgl, nents, dir, NULL); -} -#define dma_sync_single_for_cpu platform_dma_sync_single_for_cpu -#define dma_sync_sg_for_cpu platform_dma_sync_sg_for_cpu -#define dma_sync_single_for_device platform_dma_sync_single_for_device -#define dma_sync_sg_for_device platform_dma_sync_sg_for_device -#define dma_mapping_error platform_dma_mapping_error - -#define dma_map_page(dev, pg, off, size, dir) \ - dma_map_single(dev, page_address(pg) + (off), (size), (dir)) -#define dma_unmap_page(dev, dma_addr, size, dir) \ - dma_unmap_single(dev, dma_addr, size, dir) - -/* - * Rest of this file is part of the "Advanced DMA API". Use at your own risk. - * See Documentation/DMA-API.txt for details. - */ - -#define dma_sync_single_range_for_cpu(dev, dma_handle, offset, size, dir) \ - dma_sync_single_for_cpu(dev, dma_handle, size, dir) -#define dma_sync_single_range_for_device(dev, dma_handle, offset, size, dir) \ - dma_sync_single_for_device(dev, dma_handle, size, dir) - -#define dma_supported platform_dma_supported - -static inline int -dma_set_mask (struct device *dev, u64 mask) -{ - if (!dev->dma_mask || !dma_supported(dev, mask)) - return -EIO; - *dev->dma_mask = mask; - return 0; -} - -extern int dma_get_cache_alignment(void); - -static inline void -dma_cache_sync (struct device *dev, void *vaddr, size_t size, - enum dma_data_direction dir) -{ - /* - * IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to - * ensure that dma_cache_sync() enforces order, hence the mb(). - */ - mb(); -} - -#define dma_is_consistent(d, h) (1) /* all we do is coherent memory... */ - -#endif /* _ASM_IA64_DMA_MAPPING_H */ diff --git a/include/asm-ia64/dma.h b/include/asm-ia64/dma.h deleted file mode 100644 index 4d97f60..0000000 --- a/include/asm-ia64/dma.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASM_IA64_DMA_H -#define _ASM_IA64_DMA_H - -/* - * Copyright (C) 1998-2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#include /* need byte IO */ - -extern unsigned long MAX_DMA_ADDRESS; - -#ifdef CONFIG_PCI - extern int isa_dma_bridge_buggy; -#else -# define isa_dma_bridge_buggy (0) -#endif - -#define free_dma(x) - -void dma_mark_clean(void *addr, size_t size); - -#endif /* _ASM_IA64_DMA_H */ diff --git a/include/asm-ia64/dmi.h b/include/asm-ia64/dmi.h deleted file mode 100644 index 00eb1b1..0000000 --- a/include/asm-ia64/dmi.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_DMI_H -#define _ASM_DMI_H 1 - -#include - -/* Use normal IO mappings for DMI */ -#define dmi_ioremap ioremap -#define dmi_iounmap(x,l) iounmap(x) -#define dmi_alloc(l) kmalloc(l, GFP_ATOMIC) - -#endif diff --git a/include/asm-ia64/elf.h b/include/asm-ia64/elf.h deleted file mode 100644 index 5e0c1a6..0000000 --- a/include/asm-ia64/elf.h +++ /dev/null @@ -1,269 +0,0 @@ -#ifndef _ASM_IA64_ELF_H -#define _ASM_IA64_ELF_H - -/* - * ELF-specific definitions. - * - * Copyright (C) 1998-1999, 2002-2004 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#include -#include -#include - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_IA_64) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS64 -#define ELF_DATA ELFDATA2LSB -#define ELF_ARCH EM_IA_64 - -#define USE_ELF_CORE_DUMP -#define CORE_DUMP_USE_REGSET - -/* Least-significant four bits of ELF header's e_flags are OS-specific. The bits are - interpreted as follows by Linux: */ -#define EF_IA_64_LINUX_EXECUTABLE_STACK 0x1 /* is stack (& heap) executable by default? */ - -#define ELF_EXEC_PAGESIZE PAGE_SIZE - -/* - * This is the location that an ET_DYN program is loaded if exec'ed. - * Typical use of this is to invoke "./ld.so someprog" to test out a - * new version of the loader. We need to make sure that it is out of - * the way of the program that it will "exec", and that there is - * sufficient room for the brk. - */ -#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE + 0x800000000UL) - -#define PT_IA_64_UNWIND 0x70000001 - -/* IA-64 relocations: */ -#define R_IA64_NONE 0x00 /* none */ -#define R_IA64_IMM14 0x21 /* symbol + addend, add imm14 */ -#define R_IA64_IMM22 0x22 /* symbol + addend, add imm22 */ -#define R_IA64_IMM64 0x23 /* symbol + addend, mov imm64 */ -#define R_IA64_DIR32MSB 0x24 /* symbol + addend, data4 MSB */ -#define R_IA64_DIR32LSB 0x25 /* symbol + addend, data4 LSB */ -#define R_IA64_DIR64MSB 0x26 /* symbol + addend, data8 MSB */ -#define R_IA64_DIR64LSB 0x27 /* symbol + addend, data8 LSB */ -#define R_IA64_GPREL22 0x2a /* @gprel(sym+add), add imm22 */ -#define R_IA64_GPREL64I 0x2b /* @gprel(sym+add), mov imm64 */ -#define R_IA64_GPREL32MSB 0x2c /* @gprel(sym+add), data4 MSB */ -#define R_IA64_GPREL32LSB 0x2d /* @gprel(sym+add), data4 LSB */ -#define R_IA64_GPREL64MSB 0x2e /* @gprel(sym+add), data8 MSB */ -#define R_IA64_GPREL64LSB 0x2f /* @gprel(sym+add), data8 LSB */ -#define R_IA64_LTOFF22 0x32 /* @ltoff(sym+add), add imm22 */ -#define R_IA64_LTOFF64I 0x33 /* @ltoff(sym+add), mov imm64 */ -#define R_IA64_PLTOFF22 0x3a /* @pltoff(sym+add), add imm22 */ -#define R_IA64_PLTOFF64I 0x3b /* @pltoff(sym+add), mov imm64 */ -#define R_IA64_PLTOFF64MSB 0x3e /* @pltoff(sym+add), data8 MSB */ -#define R_IA64_PLTOFF64LSB 0x3f /* @pltoff(sym+add), data8 LSB */ -#define R_IA64_FPTR64I 0x43 /* @fptr(sym+add), mov imm64 */ -#define R_IA64_FPTR32MSB 0x44 /* @fptr(sym+add), data4 MSB */ -#define R_IA64_FPTR32LSB 0x45 /* @fptr(sym+add), data4 LSB */ -#define R_IA64_FPTR64MSB 0x46 /* @fptr(sym+add), data8 MSB */ -#define R_IA64_FPTR64LSB 0x47 /* @fptr(sym+add), data8 LSB */ -#define R_IA64_PCREL60B 0x48 /* @pcrel(sym+add), brl */ -#define R_IA64_PCREL21B 0x49 /* @pcrel(sym+add), ptb, call */ -#define R_IA64_PCREL21M 0x4a /* @pcrel(sym+add), chk.s */ -#define R_IA64_PCREL21F 0x4b /* @pcrel(sym+add), fchkf */ -#define R_IA64_PCREL32MSB 0x4c /* @pcrel(sym+add), data4 MSB */ -#define R_IA64_PCREL32LSB 0x4d /* @pcrel(sym+add), data4 LSB */ -#define R_IA64_PCREL64MSB 0x4e /* @pcrel(sym+add), data8 MSB */ -#define R_IA64_PCREL64LSB 0x4f /* @pcrel(sym+add), data8 LSB */ -#define R_IA64_LTOFF_FPTR22 0x52 /* @ltoff(@fptr(s+a)), imm22 */ -#define R_IA64_LTOFF_FPTR64I 0x53 /* @ltoff(@fptr(s+a)), imm64 */ -#define R_IA64_LTOFF_FPTR32MSB 0x54 /* @ltoff(@fptr(s+a)), 4 MSB */ -#define R_IA64_LTOFF_FPTR32LSB 0x55 /* @ltoff(@fptr(s+a)), 4 LSB */ -#define R_IA64_LTOFF_FPTR64MSB 0x56 /* @ltoff(@fptr(s+a)), 8 MSB */ -#define R_IA64_LTOFF_FPTR64LSB 0x57 /* @ltoff(@fptr(s+a)), 8 LSB */ -#define R_IA64_SEGREL32MSB 0x5c /* @segrel(sym+add), data4 MSB */ -#define R_IA64_SEGREL32LSB 0x5d /* @segrel(sym+add), data4 LSB */ -#define R_IA64_SEGREL64MSB 0x5e /* @segrel(sym+add), data8 MSB */ -#define R_IA64_SEGREL64LSB 0x5f /* @segrel(sym+add), data8 LSB */ -#define R_IA64_SECREL32MSB 0x64 /* @secrel(sym+add), data4 MSB */ -#define R_IA64_SECREL32LSB 0x65 /* @secrel(sym+add), data4 LSB */ -#define R_IA64_SECREL64MSB 0x66 /* @secrel(sym+add), data8 MSB */ -#define R_IA64_SECREL64LSB 0x67 /* @secrel(sym+add), data8 LSB */ -#define R_IA64_REL32MSB 0x6c /* data 4 + REL */ -#define R_IA64_REL32LSB 0x6d /* data 4 + REL */ -#define R_IA64_REL64MSB 0x6e /* data 8 + REL */ -#define R_IA64_REL64LSB 0x6f /* data 8 + REL */ -#define R_IA64_LTV32MSB 0x74 /* symbol + addend, data4 MSB */ -#define R_IA64_LTV32LSB 0x75 /* symbol + addend, data4 LSB */ -#define R_IA64_LTV64MSB 0x76 /* symbol + addend, data8 MSB */ -#define R_IA64_LTV64LSB 0x77 /* symbol + addend, data8 LSB */ -#define R_IA64_PCREL21BI 0x79 /* @pcrel(sym+add), ptb, call */ -#define R_IA64_PCREL22 0x7a /* @pcrel(sym+add), imm22 */ -#define R_IA64_PCREL64I 0x7b /* @pcrel(sym+add), imm64 */ -#define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */ -#define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */ -#define R_IA64_COPY 0x84 /* dynamic reloc, data copy */ -#define R_IA64_SUB 0x85 /* -symbol + addend, add imm22 */ -#define R_IA64_LTOFF22X 0x86 /* LTOFF22, relaxable. */ -#define R_IA64_LDXMOV 0x87 /* Use of LTOFF22X. */ -#define R_IA64_TPREL14 0x91 /* @tprel(sym+add), add imm14 */ -#define R_IA64_TPREL22 0x92 /* @tprel(sym+add), add imm22 */ -#define R_IA64_TPREL64I 0x93 /* @tprel(sym+add), add imm64 */ -#define R_IA64_TPREL64MSB 0x96 /* @tprel(sym+add), data8 MSB */ -#define R_IA64_TPREL64LSB 0x97 /* @tprel(sym+add), data8 LSB */ -#define R_IA64_LTOFF_TPREL22 0x9a /* @ltoff(@tprel(s+a)), add imm22 */ -#define R_IA64_DTPMOD64MSB 0xa6 /* @dtpmod(sym+add), data8 MSB */ -#define R_IA64_DTPMOD64LSB 0xa7 /* @dtpmod(sym+add), data8 LSB */ -#define R_IA64_LTOFF_DTPMOD22 0xaa /* @ltoff(@dtpmod(s+a)), imm22 */ -#define R_IA64_DTPREL14 0xb1 /* @dtprel(sym+add), imm14 */ -#define R_IA64_DTPREL22 0xb2 /* @dtprel(sym+add), imm22 */ -#define R_IA64_DTPREL64I 0xb3 /* @dtprel(sym+add), imm64 */ -#define R_IA64_DTPREL32MSB 0xb4 /* @dtprel(sym+add), data4 MSB */ -#define R_IA64_DTPREL32LSB 0xb5 /* @dtprel(sym+add), data4 LSB */ -#define R_IA64_DTPREL64MSB 0xb6 /* @dtprel(sym+add), data8 MSB */ -#define R_IA64_DTPREL64LSB 0xb7 /* @dtprel(sym+add), data8 LSB */ -#define R_IA64_LTOFF_DTPREL22 0xba /* @ltoff(@dtprel(s+a)), imm22 */ - -/* IA-64 specific section flags: */ -#define SHF_IA_64_SHORT 0x10000000 /* section near gp */ - -/* - * We use (abuse?) this macro to insert the (empty) vm_area that is - * used to map the register backing store. I don't see any better - * place to do this, but we should discuss this with Linus once we can - * talk to him... - */ -extern void ia64_init_addr_space (void); -#define ELF_PLAT_INIT(_r, load_addr) ia64_init_addr_space() - -/* ELF register definitions. This is needed for core dump support. */ - -/* - * elf_gregset_t contains the application-level state in the following order: - * r0-r31 - * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT) - * predicate registers (p0-p63) - * b0-b7 - * ip cfm psr - * ar.rsc ar.bsp ar.bspstore ar.rnat - * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd - */ -#define ELF_NGREG 128 /* we really need just 72 but let's leave some headroom... */ -#define ELF_NFPREG 128 /* f0 and f1 could be omitted, but so what... */ - -/* elf_gregset_t register offsets */ -#define ELF_GR_0_OFFSET 0 -#define ELF_NAT_OFFSET (32 * sizeof(elf_greg_t)) -#define ELF_PR_OFFSET (33 * sizeof(elf_greg_t)) -#define ELF_BR_0_OFFSET (34 * sizeof(elf_greg_t)) -#define ELF_CR_IIP_OFFSET (42 * sizeof(elf_greg_t)) -#define ELF_CFM_OFFSET (43 * sizeof(elf_greg_t)) -#define ELF_CR_IPSR_OFFSET (44 * sizeof(elf_greg_t)) -#define ELF_GR_OFFSET(i) (ELF_GR_0_OFFSET + i * sizeof(elf_greg_t)) -#define ELF_BR_OFFSET(i) (ELF_BR_0_OFFSET + i * sizeof(elf_greg_t)) -#define ELF_AR_RSC_OFFSET (45 * sizeof(elf_greg_t)) -#define ELF_AR_BSP_OFFSET (46 * sizeof(elf_greg_t)) -#define ELF_AR_BSPSTORE_OFFSET (47 * sizeof(elf_greg_t)) -#define ELF_AR_RNAT_OFFSET (48 * sizeof(elf_greg_t)) -#define ELF_AR_CCV_OFFSET (49 * sizeof(elf_greg_t)) -#define ELF_AR_UNAT_OFFSET (50 * sizeof(elf_greg_t)) -#define ELF_AR_FPSR_OFFSET (51 * sizeof(elf_greg_t)) -#define ELF_AR_PFS_OFFSET (52 * sizeof(elf_greg_t)) -#define ELF_AR_LC_OFFSET (53 * sizeof(elf_greg_t)) -#define ELF_AR_EC_OFFSET (54 * sizeof(elf_greg_t)) -#define ELF_AR_CSD_OFFSET (55 * sizeof(elf_greg_t)) -#define ELF_AR_SSD_OFFSET (56 * sizeof(elf_greg_t)) -#define ELF_AR_END_OFFSET (57 * sizeof(elf_greg_t)) - -typedef unsigned long elf_fpxregset_t; - -typedef unsigned long elf_greg_t; -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct ia64_fpreg elf_fpreg_t; -typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; - - - -struct pt_regs; /* forward declaration... */ -extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst); -#define ELF_CORE_COPY_REGS(_dest,_regs) ia64_elf_core_copy_regs(_regs, _dest); - -/* This macro yields a bitmask that programs can use to figure out - what instruction set this CPU supports. */ -#define ELF_HWCAP 0 - -/* This macro yields a string that ld.so will use to load - implementation specific libraries for optimization. Not terribly - relevant until we have real hardware to play with... */ -#define ELF_PLATFORM NULL - -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX) -#define elf_read_implies_exec(ex, executable_stack) \ - ((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0) - -struct task_struct; - -#define GATE_EHDR ((const struct elfhdr *) GATE_ADDR) - -/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */ -#define ARCH_DLINFO \ -do { \ - extern char __kernel_syscall_via_epc[]; \ - NEW_AUX_ENT(AT_SYSINFO, (unsigned long) __kernel_syscall_via_epc); \ - NEW_AUX_ENT(AT_SYSINFO_EHDR, (unsigned long) GATE_EHDR); \ -} while (0) - - -/* - * These macros parameterize elf_core_dump in fs/binfmt_elf.c to write out - * extra segments containing the gate DSO contents. Dumping its - * contents makes post-mortem fully interpretable later without matching up - * the same kernel and hardware config to see what PC values meant. - * Dumping its extra ELF program headers includes all the other information - * a debugger needs to easily find how the gate DSO was being used. - */ -#define ELF_CORE_EXTRA_PHDRS (GATE_EHDR->e_phnum) -#define ELF_CORE_WRITE_EXTRA_PHDRS \ -do { \ - const struct elf_phdr *const gate_phdrs = \ - (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff); \ - int i; \ - Elf64_Off ofs = 0; \ - for (i = 0; i < GATE_EHDR->e_phnum; ++i) { \ - struct elf_phdr phdr = gate_phdrs[i]; \ - if (phdr.p_type == PT_LOAD) { \ - phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \ - phdr.p_filesz = phdr.p_memsz; \ - if (ofs == 0) { \ - ofs = phdr.p_offset = offset; \ - offset += phdr.p_filesz; \ - } \ - else \ - phdr.p_offset = ofs; \ - } \ - else \ - phdr.p_offset += ofs; \ - phdr.p_paddr = 0; /* match other core phdrs */ \ - DUMP_WRITE(&phdr, sizeof(phdr)); \ - } \ -} while (0) -#define ELF_CORE_WRITE_EXTRA_DATA \ -do { \ - const struct elf_phdr *const gate_phdrs = \ - (const struct elf_phdr *) (GATE_ADDR + GATE_EHDR->e_phoff); \ - int i; \ - for (i = 0; i < GATE_EHDR->e_phnum; ++i) { \ - if (gate_phdrs[i].p_type == PT_LOAD) { \ - DUMP_WRITE((void *) gate_phdrs[i].p_vaddr, \ - PAGE_ALIGN(gate_phdrs[i].p_memsz)); \ - break; \ - } \ - } \ -} while (0) - -#endif /* _ASM_IA64_ELF_H */ diff --git a/include/asm-ia64/emergency-restart.h b/include/asm-ia64/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-ia64/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-ia64/errno.h b/include/asm-ia64/errno.h deleted file mode 100644 index 4c82b50..0000000 --- a/include/asm-ia64/errno.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/esi.h b/include/asm-ia64/esi.h deleted file mode 100644 index 40991c6..0000000 --- a/include/asm-ia64/esi.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * ESI service calls. - * - * Copyright (c) Copyright 2005-2006 Hewlett-Packard Development Company, L.P. - * Alex Williamson - */ -#ifndef esi_h -#define esi_h - -#include - -#define ESI_QUERY 0x00000001 -#define ESI_OPEN_HANDLE 0x02000000 -#define ESI_CLOSE_HANDLE 0x02000001 - -enum esi_proc_type { - ESI_PROC_SERIALIZED, /* calls need to be serialized */ - ESI_PROC_MP_SAFE, /* MP-safe, but not reentrant */ - ESI_PROC_REENTRANT /* MP-safe and reentrant */ -}; - -extern struct ia64_sal_retval esi_call_phys (void *, u64 *); -extern int ia64_esi_call(efi_guid_t, struct ia64_sal_retval *, - enum esi_proc_type, - u64, u64, u64, u64, u64, u64, u64, u64); -extern int ia64_esi_call_phys(efi_guid_t, struct ia64_sal_retval *, u64, u64, - u64, u64, u64, u64, u64, u64); - -#endif /* esi_h */ diff --git a/include/asm-ia64/fb.h b/include/asm-ia64/fb.h deleted file mode 100644 index 89a397c..0000000 --- a/include/asm-ia64/fb.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - if (efi_range_is_wc(vma->vm_start, vma->vm_end - vma->vm_start)) - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); - else - vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-ia64/fcntl.h b/include/asm-ia64/fcntl.h deleted file mode 100644 index 1dd275d..0000000 --- a/include/asm-ia64/fcntl.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _ASM_IA64_FCNTL_H -#define _ASM_IA64_FCNTL_H -/* - * Modified 1998-2000 - * David Mosberger-Tang , Hewlett-Packard Co. - */ - -#define force_o_largefile() \ - (personality(current->personality) != PER_LINUX32) - -#include - -#endif /* _ASM_IA64_FCNTL_H */ diff --git a/include/asm-ia64/fpswa.h b/include/asm-ia64/fpswa.h deleted file mode 100644 index 62edfce..0000000 --- a/include/asm-ia64/fpswa.h +++ /dev/null @@ -1,73 +0,0 @@ -#ifndef _ASM_IA64_FPSWA_H -#define _ASM_IA64_FPSWA_H - -/* - * Floating-point Software Assist - * - * Copyright (C) 1999 Intel Corporation. - * Copyright (C) 1999 Asit Mallick - * Copyright (C) 1999 Goutham Rao - */ - -typedef struct { - /* 4 * 128 bits */ - unsigned long fp_lp[4*2]; -} fp_state_low_preserved_t; - -typedef struct { - /* 10 * 128 bits */ - unsigned long fp_lv[10 * 2]; -} fp_state_low_volatile_t; - -typedef struct { - /* 16 * 128 bits */ - unsigned long fp_hp[16 * 2]; -} fp_state_high_preserved_t; - -typedef struct { - /* 96 * 128 bits */ - unsigned long fp_hv[96 * 2]; -} fp_state_high_volatile_t; - -/** - * floating point state to be passed to the FP emulation library by - * the trap/fault handler - */ -typedef struct { - unsigned long bitmask_low64; - unsigned long bitmask_high64; - fp_state_low_preserved_t *fp_state_low_preserved; - fp_state_low_volatile_t *fp_state_low_volatile; - fp_state_high_preserved_t *fp_state_high_preserved; - fp_state_high_volatile_t *fp_state_high_volatile; -} fp_state_t; - -typedef struct { - unsigned long status; - unsigned long err0; - unsigned long err1; - unsigned long err2; -} fpswa_ret_t; - -/** - * function header for the Floating Point software assist - * library. This function is invoked by the Floating point software - * assist trap/fault handler. - */ -typedef fpswa_ret_t (*efi_fpswa_t) (unsigned long trap_type, void *bundle, unsigned long *ipsr, - unsigned long *fsr, unsigned long *isr, unsigned long *preds, - unsigned long *ifs, fp_state_t *fp_state); - -/** - * This is the FPSWA library interface as defined by EFI. We need to pass a - * pointer to the interface itself on a call to the assist library - */ -typedef struct { - unsigned int revision; - unsigned int reserved; - efi_fpswa_t fpswa; -} fpswa_interface_t; - -extern fpswa_interface_t *fpswa_interface; - -#endif /* _ASM_IA64_FPSWA_H */ diff --git a/include/asm-ia64/fpu.h b/include/asm-ia64/fpu.h deleted file mode 100644 index 3859558..0000000 --- a/include/asm-ia64/fpu.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef _ASM_IA64_FPU_H -#define _ASM_IA64_FPU_H - -/* - * Copyright (C) 1998, 1999, 2002, 2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include - -/* floating point status register: */ -#define FPSR_TRAP_VD (1 << 0) /* invalid op trap disabled */ -#define FPSR_TRAP_DD (1 << 1) /* denormal trap disabled */ -#define FPSR_TRAP_ZD (1 << 2) /* zero-divide trap disabled */ -#define FPSR_TRAP_OD (1 << 3) /* overflow trap disabled */ -#define FPSR_TRAP_UD (1 << 4) /* underflow trap disabled */ -#define FPSR_TRAP_ID (1 << 5) /* inexact trap disabled */ -#define FPSR_S0(x) ((x) << 6) -#define FPSR_S1(x) ((x) << 19) -#define FPSR_S2(x) (__IA64_UL(x) << 32) -#define FPSR_S3(x) (__IA64_UL(x) << 45) - -/* floating-point status field controls: */ -#define FPSF_FTZ (1 << 0) /* flush-to-zero */ -#define FPSF_WRE (1 << 1) /* widest-range exponent */ -#define FPSF_PC(x) (((x) & 0x3) << 2) /* precision control */ -#define FPSF_RC(x) (((x) & 0x3) << 4) /* rounding control */ -#define FPSF_TD (1 << 6) /* trap disabled */ - -/* floating-point status field flags: */ -#define FPSF_V (1 << 7) /* invalid operation flag */ -#define FPSF_D (1 << 8) /* denormal/unnormal operand flag */ -#define FPSF_Z (1 << 9) /* zero divide (IEEE) flag */ -#define FPSF_O (1 << 10) /* overflow (IEEE) flag */ -#define FPSF_U (1 << 11) /* underflow (IEEE) flag */ -#define FPSF_I (1 << 12) /* inexact (IEEE) flag) */ - -/* floating-point rounding control: */ -#define FPRC_NEAREST 0x0 -#define FPRC_NEGINF 0x1 -#define FPRC_POSINF 0x2 -#define FPRC_TRUNC 0x3 - -#define FPSF_DEFAULT (FPSF_PC (0x3) | FPSF_RC (FPRC_NEAREST)) - -/* This default value is the same as HP-UX uses. Don't change it - without a very good reason. */ -#define FPSR_DEFAULT (FPSR_TRAP_VD | FPSR_TRAP_DD | FPSR_TRAP_ZD \ - | FPSR_TRAP_OD | FPSR_TRAP_UD | FPSR_TRAP_ID \ - | FPSR_S0 (FPSF_DEFAULT) \ - | FPSR_S1 (FPSF_DEFAULT | FPSF_TD | FPSF_WRE) \ - | FPSR_S2 (FPSF_DEFAULT | FPSF_TD) \ - | FPSR_S3 (FPSF_DEFAULT | FPSF_TD)) - -# ifndef __ASSEMBLY__ - -struct ia64_fpreg { - union { - unsigned long bits[2]; - long double __dummy; /* force 16-byte alignment */ - } u; -}; - -# endif /* __ASSEMBLY__ */ - -#endif /* _ASM_IA64_FPU_H */ diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h deleted file mode 100644 index c7f0f06..0000000 --- a/include/asm-ia64/futex.h +++ /dev/null @@ -1,124 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include -#include -#include -#include - -#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \ -do { \ - register unsigned long r8 __asm ("r8") = 0; \ - __asm__ __volatile__( \ - " mf;; \n" \ - "[1:] " insn ";; \n" \ - " .xdata4 \"__ex_table\", 1b-., 2f-. \n" \ - "[2:]" \ - : "+r" (r8), "=r" (oldval) \ - : "r" (uaddr), "r" (oparg) \ - : "memory"); \ - ret = r8; \ -} while (0) - -#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \ -do { \ - register unsigned long r8 __asm ("r8") = 0; \ - int val, newval; \ - do { \ - __asm__ __volatile__( \ - " mf;; \n" \ - "[1:] ld4 %3=[%4];; \n" \ - " mov %2=%3 \n" \ - insn ";; \n" \ - " mov ar.ccv=%2;; \n" \ - "[2:] cmpxchg4.acq %1=[%4],%3,ar.ccv;; \n" \ - " .xdata4 \"__ex_table\", 1b-., 3f-.\n" \ - " .xdata4 \"__ex_table\", 2b-., 3f-.\n" \ - "[3:]" \ - : "+r" (r8), "=r" (val), "=&r" (oldval), \ - "=&r" (newval) \ - : "r" (uaddr), "r" (oparg) \ - : "memory"); \ - if (unlikely (r8)) \ - break; \ - } while (unlikely (val != oldval)); \ - ret = r8; \ -} while (0) - -static inline int -futex_atomic_op_inuser (int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret; - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: - __futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr, - oparg); - break; - case FUTEX_OP_ADD: - __futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_OR: - __futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ANDN: - __futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr, - ~oparg); - break; - case FUTEX_OP_XOR: - __futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg); - break; - default: - ret = -ENOSYS; - } - - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) -{ - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - { - register unsigned long r8 __asm ("r8"); - __asm__ __volatile__( - " mf;; \n" - " mov ar.ccv=%3;; \n" - "[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n" - " .xdata4 \"__ex_table\", 1b-., 2f-. \n" - "[2:]" - : "=r" (r8) - : "r" (uaddr), "r" (newval), - "rO" ((long) (unsigned) oldval) - : "memory"); - return r8; - } -} - -#endif /* _ASM_FUTEX_H */ diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h deleted file mode 100644 index 0f5b559..0000000 --- a/include/asm-ia64/gcc_intrin.h +++ /dev/null @@ -1,620 +0,0 @@ -#ifndef _ASM_IA64_GCC_INTRIN_H -#define _ASM_IA64_GCC_INTRIN_H -/* - * - * Copyright (C) 2002,2003 Jun Nakajima - * Copyright (C) 2002,2003 Suresh Siddha - */ - -#include - -/* define this macro to get some asm stmts included in 'c' files */ -#define ASM_SUPPORTED - -/* Optimization barrier */ -/* The "volatile" is due to gcc bugs */ -#define ia64_barrier() asm volatile ("":::"memory") - -#define ia64_stop() asm volatile (";;"::) - -#define ia64_invala_gr(regnum) asm volatile ("invala.e r%0" :: "i"(regnum)) - -#define ia64_invala_fr(regnum) asm volatile ("invala.e f%0" :: "i"(regnum)) - -#define ia64_flushrs() asm volatile ("flushrs;;":::"memory") - -#define ia64_loadrs() asm volatile ("loadrs;;":::"memory") - -extern void ia64_bad_param_for_setreg (void); -extern void ia64_bad_param_for_getreg (void); - -#ifdef __KERNEL__ -register unsigned long ia64_r13 asm ("r13") __used; -#endif - -#define ia64_native_setreg(regnum, val) \ -({ \ - switch (regnum) { \ - case _IA64_REG_PSR_L: \ - asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \ - break; \ - case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \ - asm volatile ("mov ar%0=%1" :: \ - "i" (regnum - _IA64_REG_AR_KR0), \ - "r"(val): "memory"); \ - break; \ - case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \ - asm volatile ("mov cr%0=%1" :: \ - "i" (regnum - _IA64_REG_CR_DCR), \ - "r"(val): "memory" ); \ - break; \ - case _IA64_REG_SP: \ - asm volatile ("mov r12=%0" :: \ - "r"(val): "memory"); \ - break; \ - case _IA64_REG_GP: \ - asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \ - break; \ - default: \ - ia64_bad_param_for_setreg(); \ - break; \ - } \ -}) - -#define ia64_native_getreg(regnum) \ -({ \ - __u64 ia64_intri_res; \ - \ - switch (regnum) { \ - case _IA64_REG_GP: \ - asm volatile ("mov %0=gp" : "=r"(ia64_intri_res)); \ - break; \ - case _IA64_REG_IP: \ - asm volatile ("mov %0=ip" : "=r"(ia64_intri_res)); \ - break; \ - case _IA64_REG_PSR: \ - asm volatile ("mov %0=psr" : "=r"(ia64_intri_res)); \ - break; \ - case _IA64_REG_TP: /* for current() */ \ - ia64_intri_res = ia64_r13; \ - break; \ - case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \ - asm volatile ("mov %0=ar%1" : "=r" (ia64_intri_res) \ - : "i"(regnum - _IA64_REG_AR_KR0)); \ - break; \ - case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \ - asm volatile ("mov %0=cr%1" : "=r" (ia64_intri_res) \ - : "i" (regnum - _IA64_REG_CR_DCR)); \ - break; \ - case _IA64_REG_SP: \ - asm volatile ("mov %0=sp" : "=r" (ia64_intri_res)); \ - break; \ - default: \ - ia64_bad_param_for_getreg(); \ - break; \ - } \ - ia64_intri_res; \ -}) - -#define ia64_hint_pause 0 - -#define ia64_hint(mode) \ -({ \ - switch (mode) { \ - case ia64_hint_pause: \ - asm volatile ("hint @pause" ::: "memory"); \ - break; \ - } \ -}) - - -/* Integer values for mux1 instruction */ -#define ia64_mux1_brcst 0 -#define ia64_mux1_mix 8 -#define ia64_mux1_shuf 9 -#define ia64_mux1_alt 10 -#define ia64_mux1_rev 11 - -#define ia64_mux1(x, mode) \ -({ \ - __u64 ia64_intri_res; \ - \ - switch (mode) { \ - case ia64_mux1_brcst: \ - asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \ - break; \ - case ia64_mux1_mix: \ - asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \ - break; \ - case ia64_mux1_shuf: \ - asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \ - break; \ - case ia64_mux1_alt: \ - asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \ - break; \ - case ia64_mux1_rev: \ - asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \ - break; \ - } \ - ia64_intri_res; \ -}) - -#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -# define ia64_popcnt(x) __builtin_popcountl(x) -#else -# define ia64_popcnt(x) \ - ({ \ - __u64 ia64_intri_res; \ - asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \ - \ - ia64_intri_res; \ - }) -#endif - -#define ia64_getf_exp(x) \ -({ \ - long ia64_intri_res; \ - \ - asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \ - \ - ia64_intri_res; \ -}) - -#define ia64_shrp(a, b, count) \ -({ \ - __u64 ia64_intri_res; \ - asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \ - ia64_intri_res; \ -}) - -#define ia64_ldfs(regnum, x) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \ -}) - -#define ia64_ldfd(regnum, x) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \ -}) - -#define ia64_ldfe(regnum, x) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \ -}) - -#define ia64_ldf8(regnum, x) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \ -}) - -#define ia64_ldf_fill(regnum, x) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \ -}) - -#define ia64_st4_rel_nta(m, val) \ -({ \ - asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \ -}) - -#define ia64_stfs(x, regnum) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ -}) - -#define ia64_stfd(x, regnum) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ -}) - -#define ia64_stfe(x, regnum) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ -}) - -#define ia64_stf8(x, regnum) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ -}) - -#define ia64_stf_spill(x, regnum) \ -({ \ - register double __f__ asm ("f"#regnum); \ - asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \ -}) - -#define ia64_fetchadd4_acq(p, inc) \ -({ \ - \ - __u64 ia64_intri_res; \ - asm volatile ("fetchadd4.acq %0=[%1],%2" \ - : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ - : "memory"); \ - \ - ia64_intri_res; \ -}) - -#define ia64_fetchadd4_rel(p, inc) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("fetchadd4.rel %0=[%1],%2" \ - : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ - : "memory"); \ - \ - ia64_intri_res; \ -}) - -#define ia64_fetchadd8_acq(p, inc) \ -({ \ - \ - __u64 ia64_intri_res; \ - asm volatile ("fetchadd8.acq %0=[%1],%2" \ - : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ - : "memory"); \ - \ - ia64_intri_res; \ -}) - -#define ia64_fetchadd8_rel(p, inc) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("fetchadd8.rel %0=[%1],%2" \ - : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ - : "memory"); \ - \ - ia64_intri_res; \ -}) - -#define ia64_xchg1(ptr,x) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("xchg1 %0=[%1],%2" \ - : "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_xchg2(ptr,x) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \ - : "r" (ptr), "r" (x) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_xchg4(ptr,x) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \ - : "r" (ptr), "r" (x) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_xchg8(ptr,x) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \ - : "r" (ptr), "r" (x) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg1_acq(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg1_rel(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg2_acq(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg2_rel(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - \ - asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg4_acq(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg4_rel(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg8_acq(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_cmpxchg8_rel(ptr, new, old) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \ - \ - asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \ - "=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \ - ia64_intri_res; \ -}) - -#define ia64_mf() asm volatile ("mf" ::: "memory") -#define ia64_mfa() asm volatile ("mf.a" ::: "memory") - -#define ia64_invala() asm volatile ("invala" ::: "memory") - -#define ia64_native_thash(addr) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \ - ia64_intri_res; \ -}) - -#define ia64_srlz_i() asm volatile (";; srlz.i ;;" ::: "memory") -#define ia64_srlz_d() asm volatile (";; srlz.d" ::: "memory"); - -#ifdef HAVE_SERIALIZE_DIRECTIVE -# define ia64_dv_serialize_data() asm volatile (".serialize.data"); -# define ia64_dv_serialize_instruction() asm volatile (".serialize.instruction"); -#else -# define ia64_dv_serialize_data() -# define ia64_dv_serialize_instruction() -#endif - -#define ia64_nop(x) asm volatile ("nop %0"::"i"(x)); - -#define ia64_itci(addr) asm volatile ("itc.i %0;;" :: "r"(addr) : "memory") - -#define ia64_itcd(addr) asm volatile ("itc.d %0;;" :: "r"(addr) : "memory") - - -#define ia64_itri(trnum, addr) asm volatile ("itr.i itr[%0]=%1" \ - :: "r"(trnum), "r"(addr) : "memory") - -#define ia64_itrd(trnum, addr) asm volatile ("itr.d dtr[%0]=%1" \ - :: "r"(trnum), "r"(addr) : "memory") - -#define ia64_tpa(addr) \ -({ \ - __u64 ia64_pa; \ - asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \ - ia64_pa; \ -}) - -#define __ia64_set_dbr(index, val) \ - asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory") - -#define ia64_set_ibr(index, val) \ - asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory") - -#define ia64_set_pkr(index, val) \ - asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory") - -#define ia64_set_pmc(index, val) \ - asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory") - -#define ia64_set_pmd(index, val) \ - asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory") - -#define ia64_native_set_rr(index, val) \ - asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory"); - -#define ia64_native_get_cpuid(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \ - ia64_intri_res; \ -}) - -#define __ia64_get_dbr(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ - ia64_intri_res; \ -}) - -#define ia64_get_ibr(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ - ia64_intri_res; \ -}) - -#define ia64_get_pkr(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ - ia64_intri_res; \ -}) - -#define ia64_get_pmc(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ - ia64_intri_res; \ -}) - - -#define ia64_native_get_pmd(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \ - ia64_intri_res; \ -}) - -#define ia64_native_get_rr(index) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \ - ia64_intri_res; \ -}) - -#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory") - - -#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory") - -#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory") -#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory") -#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory") -#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory") - -#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr)) - -#define ia64_native_ptcga(addr, size) \ -do { \ - asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \ - ia64_dv_serialize_data(); \ -} while (0) - -#define ia64_ptcl(addr, size) \ -do { \ - asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \ - ia64_dv_serialize_data(); \ -} while (0) - -#define ia64_ptri(addr, size) \ - asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory") - -#define ia64_ptrd(addr, size) \ - asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory") - -#define ia64_ttag(addr) \ -({ \ - __u64 ia64_intri_res; \ - asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \ - ia64_intri_res; \ -}) - - -/* Values for lfhint in ia64_lfetch and ia64_lfetch_fault */ - -#define ia64_lfhint_none 0 -#define ia64_lfhint_nt1 1 -#define ia64_lfhint_nt2 2 -#define ia64_lfhint_nta 3 - -#define ia64_lfetch(lfhint, y) \ -({ \ - switch (lfhint) { \ - case ia64_lfhint_none: \ - asm volatile ("lfetch [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nt1: \ - asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nt2: \ - asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nta: \ - asm volatile ("lfetch.nta [%0]" : : "r"(y)); \ - break; \ - } \ -}) - -#define ia64_lfetch_excl(lfhint, y) \ -({ \ - switch (lfhint) { \ - case ia64_lfhint_none: \ - asm volatile ("lfetch.excl [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nt1: \ - asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nt2: \ - asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nta: \ - asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \ - break; \ - } \ -}) - -#define ia64_lfetch_fault(lfhint, y) \ -({ \ - switch (lfhint) { \ - case ia64_lfhint_none: \ - asm volatile ("lfetch.fault [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nt1: \ - asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nt2: \ - asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \ - break; \ - case ia64_lfhint_nta: \ - asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \ - break; \ - } \ -}) - -#define ia64_lfetch_fault_excl(lfhint, y) \ -({ \ - switch (lfhint) { \ - case ia64_lfhint_none: \ - asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nt1: \ - asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nt2: \ - asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \ - break; \ - case ia64_lfhint_nta: \ - asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \ - break; \ - } \ -}) - -#define ia64_native_intrin_local_irq_restore(x) \ -do { \ - asm volatile (";; cmp.ne p6,p7=%0,r0;;" \ - "(p6) ssm psr.i;" \ - "(p7) rsm psr.i;;" \ - "(p6) srlz.d" \ - :: "r"((x)) : "p6", "p7", "memory"); \ -} while (0) - -#endif /* _ASM_IA64_GCC_INTRIN_H */ diff --git a/include/asm-ia64/hardirq.h b/include/asm-ia64/hardirq.h deleted file mode 100644 index 140e495..0000000 --- a/include/asm-ia64/hardirq.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef _ASM_IA64_HARDIRQ_H -#define _ASM_IA64_HARDIRQ_H - -/* - * Modified 1998-2002, 2004 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#include -#include - -#include - -/* - * No irq_cpustat_t for IA-64. The data is held in the per-CPU data structure. - */ - -#define __ARCH_IRQ_STAT 1 - -#define local_softirq_pending() (local_cpu_data->softirq_pending) - -#define HARDIRQ_BITS 14 - -/* - * The hardirq mask has to be large enough to have space for potentially all IRQ sources - * in the system nesting on a single CPU: - */ -#if (1 << HARDIRQ_BITS) < NR_IRQS -# error HARDIRQ_BITS is too low! -#endif - -extern void __iomem *ipi_base_addr; - -void ack_bad_irq(unsigned int irq); - -#endif /* _ASM_IA64_HARDIRQ_H */ diff --git a/include/asm-ia64/hpsim.h b/include/asm-ia64/hpsim.h deleted file mode 100644 index 892ab19..0000000 --- a/include/asm-ia64/hpsim.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASMIA64_HPSIM_H -#define _ASMIA64_HPSIM_H - -#ifndef CONFIG_HP_SIMSERIAL_CONSOLE -static inline int simcons_register(void) { return 1; } -#else -int simcons_register(void); -#endif - -struct tty_driver; -extern struct tty_driver *hp_simserial_driver; - -void ia64_ssc_connect_irq(long intr, long irq); -void ia64_ctl_trace(long on); - -#endif diff --git a/include/asm-ia64/hugetlb.h b/include/asm-ia64/hugetlb.h deleted file mode 100644 index da55c63..0000000 --- a/include/asm-ia64/hugetlb.h +++ /dev/null @@ -1,80 +0,0 @@ -#ifndef _ASM_IA64_HUGETLB_H -#define _ASM_IA64_HUGETLB_H - -#include - - -void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, - unsigned long end, unsigned long floor, - unsigned long ceiling); - -int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len); - -static inline int is_hugepage_only_range(struct mm_struct *mm, - unsigned long addr, - unsigned long len) -{ - return (REGION_NUMBER(addr) == RGN_HPAGE || - REGION_NUMBER((addr)+(len)-1) == RGN_HPAGE); -} - -static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) -{ -} - -static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ - set_pte_at(mm, addr, ptep, pte); -} - -static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - return ptep_get_and_clear(mm, addr, ptep); -} - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -} - -static inline int huge_pte_none(pte_t pte) -{ - return pte_none(pte); -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - return pte_wrprotect(pte); -} - -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - ptep_set_wrprotect(mm, addr, ptep); -} - -static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); -} - -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - return *ptep; -} - -static inline int arch_prepare_hugepage(struct page *page) -{ - return 0; -} - -static inline void arch_release_hugepage(struct page *page) -{ -} - -#endif /* _ASM_IA64_HUGETLB_H */ diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h deleted file mode 100644 index 5c99cbc..0000000 --- a/include/asm-ia64/hw_irq.h +++ /dev/null @@ -1,192 +0,0 @@ -#ifndef _ASM_IA64_HW_IRQ_H -#define _ASM_IA64_HW_IRQ_H - -/* - * Copyright (C) 2001-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include -#include -#include -#include - -#include -#include -#include - -#ifndef CONFIG_PARAVIRT -typedef u8 ia64_vector; -#else -typedef u16 ia64_vector; -#endif - -/* - * 0 special - * - * 1,3-14 are reserved from firmware - * - * 16-255 (vectored external interrupts) are available - * - * 15 spurious interrupt (see IVR) - * - * 16 lowest priority, 255 highest priority - * - * 15 classes of 16 interrupts each. - */ -#define IA64_MIN_VECTORED_IRQ 16 -#define IA64_MAX_VECTORED_IRQ 255 -#define IA64_NUM_VECTORS 256 - -#define AUTO_ASSIGN -1 - -#define IA64_SPURIOUS_INT_VECTOR 0x0f - -/* - * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI. - */ -#define IA64_CPEP_VECTOR 0x1c /* corrected platform error polling vector */ -#define IA64_CMCP_VECTOR 0x1d /* corrected machine-check polling vector */ -#define IA64_CPE_VECTOR 0x1e /* corrected platform error interrupt vector */ -#define IA64_CMC_VECTOR 0x1f /* corrected machine-check interrupt vector */ -/* - * Vectors 0x20-0x2f are reserved for legacy ISA IRQs. - * Use vectors 0x30-0xe7 as the default device vector range for ia64. - * Platforms may choose to reduce this range in platform_irq_setup, but the - * platform range must fall within - * [IA64_DEF_FIRST_DEVICE_VECTOR..IA64_DEF_LAST_DEVICE_VECTOR] - */ -extern int ia64_first_device_vector; -extern int ia64_last_device_vector; - -#define IA64_DEF_FIRST_DEVICE_VECTOR 0x30 -#define IA64_DEF_LAST_DEVICE_VECTOR 0xe7 -#define IA64_FIRST_DEVICE_VECTOR ia64_first_device_vector -#define IA64_LAST_DEVICE_VECTOR ia64_last_device_vector -#define IA64_MAX_DEVICE_VECTORS (IA64_DEF_LAST_DEVICE_VECTOR - IA64_DEF_FIRST_DEVICE_VECTOR + 1) -#define IA64_NUM_DEVICE_VECTORS (IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1) - -#define IA64_MCA_RENDEZ_VECTOR 0xe8 /* MCA rendez interrupt */ -#define IA64_PERFMON_VECTOR 0xee /* performance monitor interrupt vector */ -#define IA64_TIMER_VECTOR 0xef /* use highest-prio group 15 interrupt for timer */ -#define IA64_MCA_WAKEUP_VECTOR 0xf0 /* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */ -#define IA64_IPI_LOCAL_TLB_FLUSH 0xfc /* SMP flush local TLB */ -#define IA64_IPI_RESCHEDULE 0xfd /* SMP reschedule */ -#define IA64_IPI_VECTOR 0xfe /* inter-processor interrupt vector */ - -/* Used for encoding redirected irqs */ - -#define IA64_IRQ_REDIRECTED (1 << 31) - -/* IA64 inter-cpu interrupt related definitions */ - -#define IA64_IPI_DEFAULT_BASE_ADDR 0xfee00000 - -/* Delivery modes for inter-cpu interrupts */ -enum { - IA64_IPI_DM_INT = 0x0, /* pend an external interrupt */ - IA64_IPI_DM_PMI = 0x2, /* pend a PMI */ - IA64_IPI_DM_NMI = 0x4, /* pend an NMI (vector 2) */ - IA64_IPI_DM_INIT = 0x5, /* pend an INIT interrupt */ - IA64_IPI_DM_EXTINT = 0x7, /* pend an 8259-compatible interrupt. */ -}; - -extern __u8 isa_irq_to_vector_map[16]; -#define isa_irq_to_vector(x) isa_irq_to_vector_map[(x)] - -struct irq_cfg { - ia64_vector vector; - cpumask_t domain; - cpumask_t old_domain; - unsigned move_cleanup_count; - u8 move_in_progress : 1; -}; -extern spinlock_t vector_lock; -extern struct irq_cfg irq_cfg[NR_IRQS]; -#define irq_to_domain(x) irq_cfg[(x)].domain -DECLARE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq); - -extern struct hw_interrupt_type irq_type_ia64_lsapic; /* CPU-internal interrupt controller */ - -#ifdef CONFIG_PARAVIRT_GUEST -#include -#else -#define ia64_register_ipi ia64_native_register_ipi -#define assign_irq_vector ia64_native_assign_irq_vector -#define free_irq_vector ia64_native_free_irq_vector -#define register_percpu_irq ia64_native_register_percpu_irq -#define ia64_resend_irq ia64_native_resend_irq -#endif - -extern void ia64_native_register_ipi(void); -extern int bind_irq_vector(int irq, int vector, cpumask_t domain); -extern int ia64_native_assign_irq_vector (int irq); /* allocate a free vector */ -extern void ia64_native_free_irq_vector (int vector); -extern int reserve_irq_vector (int vector); -extern void __setup_vector_irq(int cpu); -extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect); -extern void ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action); -extern int check_irq_used (int irq); -extern void destroy_and_reserve_irq (unsigned int irq); - -#if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)) -extern int irq_prepare_move(int irq, int cpu); -extern void irq_complete_move(unsigned int irq); -#else -static inline int irq_prepare_move(int irq, int cpu) { return 0; } -static inline void irq_complete_move(unsigned int irq) {} -#endif - -static inline void ia64_native_resend_irq(unsigned int vector) -{ - platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0); -} - -/* - * Default implementations for the irq-descriptor API: - */ - -extern irq_desc_t irq_desc[NR_IRQS]; - -#ifndef CONFIG_IA64_GENERIC -static inline ia64_vector __ia64_irq_to_vector(int irq) -{ - return irq_cfg[irq].vector; -} - -static inline unsigned int -__ia64_local_vector_to_irq (ia64_vector vec) -{ - return __get_cpu_var(vector_irq)[vec]; -} -#endif - -/* - * Next follows the irq descriptor interface. On IA-64, each CPU supports 256 interrupt - * vectors. On smaller systems, there is a one-to-one correspondence between interrupt - * vectors and the Linux irq numbers. However, larger systems may have multiple interrupt - * domains meaning that the translation from vector number to irq number depends on the - * interrupt domain that a CPU belongs to. This API abstracts such platform-dependent - * differences and provides a uniform means to translate between vector and irq numbers - * and to obtain the irq descriptor for a given irq number. - */ - -/* Extract the IA-64 vector that corresponds to IRQ. */ -static inline ia64_vector -irq_to_vector (int irq) -{ - return platform_irq_to_vector(irq); -} - -/* - * Convert the local IA-64 vector to the corresponding irq number. This translation is - * done in the context of the interrupt domain that the currently executing CPU belongs - * to. - */ -static inline unsigned int -local_vector_to_irq (ia64_vector vec) -{ - return platform_local_vector_to_irq(vec); -} - -#endif /* _ASM_IA64_HW_IRQ_H */ diff --git a/include/asm-ia64/ia32.h b/include/asm-ia64/ia32.h deleted file mode 100644 index 2390ee1..0000000 --- a/include/asm-ia64/ia32.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef _ASM_IA64_IA32_H -#define _ASM_IA64_IA32_H - - -#include -#include - -#define IA32_NR_syscalls 285 /* length of syscall table */ -#define IA32_PAGE_SHIFT 12 /* 4KB pages */ - -#ifndef __ASSEMBLY__ - -# ifdef CONFIG_IA32_SUPPORT - -#define IA32_PAGE_OFFSET 0xc0000000 - -extern void ia32_cpu_init (void); -extern void ia32_mem_init (void); -extern void ia32_gdt_init (void); -extern int ia32_exception (struct pt_regs *regs, unsigned long isr); -extern int ia32_intercept (struct pt_regs *regs, unsigned long isr); -extern int ia32_clone_tls (struct task_struct *child, struct pt_regs *childregs); - -# endif /* !CONFIG_IA32_SUPPORT */ - -/* Declare this unconditionally, so we don't get warnings for unreachable code. */ -extern int ia32_setup_frame1 (int sig, struct k_sigaction *ka, siginfo_t *info, - sigset_t *set, struct pt_regs *regs); -#if PAGE_SHIFT > IA32_PAGE_SHIFT -extern int ia32_copy_ia64_partial_page_list(struct task_struct *, - unsigned long); -extern void ia32_drop_ia64_partial_page_list(struct task_struct *); -#else -# define ia32_copy_ia64_partial_page_list(a1, a2) 0 -# define ia32_drop_ia64_partial_page_list(a1) do { ; } while (0) -#endif - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_IA32_H */ diff --git a/include/asm-ia64/ia64regs.h b/include/asm-ia64/ia64regs.h deleted file mode 100644 index 1757f1c..0000000 --- a/include/asm-ia64/ia64regs.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (C) 2002,2003 Intel Corp. - * Jun Nakajima - * Suresh Siddha - */ - -#ifndef _ASM_IA64_IA64REGS_H -#define _ASM_IA64_IA64REGS_H - -/* - * Register Names for getreg() and setreg(). - * - * The "magic" numbers happen to match the values used by the Intel compiler's - * getreg()/setreg() intrinsics. - */ - -/* Special Registers */ - -#define _IA64_REG_IP 1016 /* getreg only */ -#define _IA64_REG_PSR 1019 -#define _IA64_REG_PSR_L 1019 - -/* General Integer Registers */ - -#define _IA64_REG_GP 1025 /* R1 */ -#define _IA64_REG_R8 1032 /* R8 */ -#define _IA64_REG_R9 1033 /* R9 */ -#define _IA64_REG_SP 1036 /* R12 */ -#define _IA64_REG_TP 1037 /* R13 */ - -/* Application Registers */ - -#define _IA64_REG_AR_KR0 3072 -#define _IA64_REG_AR_KR1 3073 -#define _IA64_REG_AR_KR2 3074 -#define _IA64_REG_AR_KR3 3075 -#define _IA64_REG_AR_KR4 3076 -#define _IA64_REG_AR_KR5 3077 -#define _IA64_REG_AR_KR6 3078 -#define _IA64_REG_AR_KR7 3079 -#define _IA64_REG_AR_RSC 3088 -#define _IA64_REG_AR_BSP 3089 -#define _IA64_REG_AR_BSPSTORE 3090 -#define _IA64_REG_AR_RNAT 3091 -#define _IA64_REG_AR_FCR 3093 -#define _IA64_REG_AR_EFLAG 3096 -#define _IA64_REG_AR_CSD 3097 -#define _IA64_REG_AR_SSD 3098 -#define _IA64_REG_AR_CFLAG 3099 -#define _IA64_REG_AR_FSR 3100 -#define _IA64_REG_AR_FIR 3101 -#define _IA64_REG_AR_FDR 3102 -#define _IA64_REG_AR_CCV 3104 -#define _IA64_REG_AR_UNAT 3108 -#define _IA64_REG_AR_FPSR 3112 -#define _IA64_REG_AR_ITC 3116 -#define _IA64_REG_AR_PFS 3136 -#define _IA64_REG_AR_LC 3137 -#define _IA64_REG_AR_EC 3138 - -/* Control Registers */ - -#define _IA64_REG_CR_DCR 4096 -#define _IA64_REG_CR_ITM 4097 -#define _IA64_REG_CR_IVA 4098 -#define _IA64_REG_CR_PTA 4104 -#define _IA64_REG_CR_IPSR 4112 -#define _IA64_REG_CR_ISR 4113 -#define _IA64_REG_CR_IIP 4115 -#define _IA64_REG_CR_IFA 4116 -#define _IA64_REG_CR_ITIR 4117 -#define _IA64_REG_CR_IIPA 4118 -#define _IA64_REG_CR_IFS 4119 -#define _IA64_REG_CR_IIM 4120 -#define _IA64_REG_CR_IHA 4121 -#define _IA64_REG_CR_LID 4160 -#define _IA64_REG_CR_IVR 4161 /* getreg only */ -#define _IA64_REG_CR_TPR 4162 -#define _IA64_REG_CR_EOI 4163 -#define _IA64_REG_CR_IRR0 4164 /* getreg only */ -#define _IA64_REG_CR_IRR1 4165 /* getreg only */ -#define _IA64_REG_CR_IRR2 4166 /* getreg only */ -#define _IA64_REG_CR_IRR3 4167 /* getreg only */ -#define _IA64_REG_CR_ITV 4168 -#define _IA64_REG_CR_PMV 4169 -#define _IA64_REG_CR_CMCV 4170 -#define _IA64_REG_CR_LRR0 4176 -#define _IA64_REG_CR_LRR1 4177 - -/* Indirect Registers for getindreg() and setindreg() */ - -#define _IA64_REG_INDR_CPUID 9000 /* getindreg only */ -#define _IA64_REG_INDR_DBR 9001 -#define _IA64_REG_INDR_IBR 9002 -#define _IA64_REG_INDR_PKR 9003 -#define _IA64_REG_INDR_PMC 9004 -#define _IA64_REG_INDR_PMD 9005 -#define _IA64_REG_INDR_RR 9006 - -#endif /* _ASM_IA64_IA64REGS_H */ diff --git a/include/asm-ia64/intel_intrin.h b/include/asm-ia64/intel_intrin.h deleted file mode 100644 index 53cec57..0000000 --- a/include/asm-ia64/intel_intrin.h +++ /dev/null @@ -1,161 +0,0 @@ -#ifndef _ASM_IA64_INTEL_INTRIN_H -#define _ASM_IA64_INTEL_INTRIN_H -/* - * Intel Compiler Intrinsics - * - * Copyright (C) 2002,2003 Jun Nakajima - * Copyright (C) 2002,2003 Suresh Siddha - * Copyright (C) 2005,2006 Hongjiu Lu - * - */ -#include - -#define ia64_barrier() __memory_barrier() - -#define ia64_stop() /* Nothing: As of now stop bit is generated for each - * intrinsic - */ - -#define ia64_native_getreg __getReg -#define ia64_native_setreg __setReg - -#define ia64_hint __hint -#define ia64_hint_pause __hint_pause - -#define ia64_mux1_brcst _m64_mux1_brcst -#define ia64_mux1_mix _m64_mux1_mix -#define ia64_mux1_shuf _m64_mux1_shuf -#define ia64_mux1_alt _m64_mux1_alt -#define ia64_mux1_rev _m64_mux1_rev - -#define ia64_mux1(x,v) _m_to_int64(_m64_mux1(_m_from_int64(x), (v))) -#define ia64_popcnt _m64_popcnt -#define ia64_getf_exp __getf_exp -#define ia64_shrp _m64_shrp - -#define ia64_tpa __tpa -#define ia64_invala __invala -#define ia64_invala_gr __invala_gr -#define ia64_invala_fr __invala_fr -#define ia64_nop __nop -#define ia64_sum __sum -#define ia64_native_ssm __ssm -#define ia64_rum __rum -#define ia64_native_rsm __rsm -#define ia64_native_fc __fc - -#define ia64_ldfs __ldfs -#define ia64_ldfd __ldfd -#define ia64_ldfe __ldfe -#define ia64_ldf8 __ldf8 -#define ia64_ldf_fill __ldf_fill - -#define ia64_stfs __stfs -#define ia64_stfd __stfd -#define ia64_stfe __stfe -#define ia64_stf8 __stf8 -#define ia64_stf_spill __stf_spill - -#define ia64_mf __mf -#define ia64_mfa __mfa - -#define ia64_fetchadd4_acq __fetchadd4_acq -#define ia64_fetchadd4_rel __fetchadd4_rel -#define ia64_fetchadd8_acq __fetchadd8_acq -#define ia64_fetchadd8_rel __fetchadd8_rel - -#define ia64_xchg1 _InterlockedExchange8 -#define ia64_xchg2 _InterlockedExchange16 -#define ia64_xchg4 _InterlockedExchange -#define ia64_xchg8 _InterlockedExchange64 - -#define ia64_cmpxchg1_rel _InterlockedCompareExchange8_rel -#define ia64_cmpxchg1_acq _InterlockedCompareExchange8_acq -#define ia64_cmpxchg2_rel _InterlockedCompareExchange16_rel -#define ia64_cmpxchg2_acq _InterlockedCompareExchange16_acq -#define ia64_cmpxchg4_rel _InterlockedCompareExchange_rel -#define ia64_cmpxchg4_acq _InterlockedCompareExchange_acq -#define ia64_cmpxchg8_rel _InterlockedCompareExchange64_rel -#define ia64_cmpxchg8_acq _InterlockedCompareExchange64_acq - -#define __ia64_set_dbr(index, val) \ - __setIndReg(_IA64_REG_INDR_DBR, index, val) -#define ia64_set_ibr(index, val) \ - __setIndReg(_IA64_REG_INDR_IBR, index, val) -#define ia64_set_pkr(index, val) \ - __setIndReg(_IA64_REG_INDR_PKR, index, val) -#define ia64_set_pmc(index, val) \ - __setIndReg(_IA64_REG_INDR_PMC, index, val) -#define ia64_set_pmd(index, val) \ - __setIndReg(_IA64_REG_INDR_PMD, index, val) -#define ia64_native_set_rr(index, val) \ - __setIndReg(_IA64_REG_INDR_RR, index, val) - -#define ia64_native_get_cpuid(index) \ - __getIndReg(_IA64_REG_INDR_CPUID, index) -#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index) -#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index) -#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index) -#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index) -#define ia64_native_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index) -#define ia64_native_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index) - -#define ia64_srlz_d __dsrlz -#define ia64_srlz_i __isrlz - -#define ia64_dv_serialize_data() -#define ia64_dv_serialize_instruction() - -#define ia64_st1_rel __st1_rel -#define ia64_st2_rel __st2_rel -#define ia64_st4_rel __st4_rel -#define ia64_st8_rel __st8_rel - -/* FIXME: need st4.rel.nta intrinsic */ -#define ia64_st4_rel_nta __st4_rel - -#define ia64_ld1_acq __ld1_acq -#define ia64_ld2_acq __ld2_acq -#define ia64_ld4_acq __ld4_acq -#define ia64_ld8_acq __ld8_acq - -#define ia64_sync_i __synci -#define ia64_native_thash __thash -#define ia64_native_ttag __ttag -#define ia64_itcd __itcd -#define ia64_itci __itci -#define ia64_itrd __itrd -#define ia64_itri __itri -#define ia64_ptce __ptce -#define ia64_ptcl __ptcl -#define ia64_native_ptcg __ptcg -#define ia64_native_ptcga __ptcga -#define ia64_ptri __ptri -#define ia64_ptrd __ptrd -#define ia64_dep_mi _m64_dep_mi - -/* Values for lfhint in __lfetch and __lfetch_fault */ - -#define ia64_lfhint_none __lfhint_none -#define ia64_lfhint_nt1 __lfhint_nt1 -#define ia64_lfhint_nt2 __lfhint_nt2 -#define ia64_lfhint_nta __lfhint_nta - -#define ia64_lfetch __lfetch -#define ia64_lfetch_excl __lfetch_excl -#define ia64_lfetch_fault __lfetch_fault -#define ia64_lfetch_fault_excl __lfetch_fault_excl - -#define ia64_native_intrin_local_irq_restore(x) \ -do { \ - if ((x) != 0) { \ - ia64_native_ssm(IA64_PSR_I); \ - ia64_srlz_d(); \ - } else { \ - ia64_native_rsm(IA64_PSR_I); \ - } \ -} while (0) - -#define __builtin_trap() __break(0); - -#endif /* _ASM_IA64_INTEL_INTRIN_H */ diff --git a/include/asm-ia64/intrinsics.h b/include/asm-ia64/intrinsics.h deleted file mode 100644 index 47d686d..0000000 --- a/include/asm-ia64/intrinsics.h +++ /dev/null @@ -1,241 +0,0 @@ -#ifndef _ASM_IA64_INTRINSICS_H -#define _ASM_IA64_INTRINSICS_H - -/* - * Compiler-dependent intrinsics. - * - * Copyright (C) 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#ifndef __ASSEMBLY__ - -/* include compiler specific intrinsics */ -#include -#ifdef __INTEL_COMPILER -# include -#else -# include -#endif - -#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I) - -#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \ -do { \ - ia64_native_set_rr(0x0000000000000000UL, (val0)); \ - ia64_native_set_rr(0x2000000000000000UL, (val1)); \ - ia64_native_set_rr(0x4000000000000000UL, (val2)); \ - ia64_native_set_rr(0x6000000000000000UL, (val3)); \ - ia64_native_set_rr(0x8000000000000000UL, (val4)); \ -} while (0) - -/* - * Force an unresolved reference if someone tries to use - * ia64_fetch_and_add() with a bad value. - */ -extern unsigned long __bad_size_for_ia64_fetch_and_add (void); -extern unsigned long __bad_increment_for_ia64_fetch_and_add (void); - -#define IA64_FETCHADD(tmp,v,n,sz,sem) \ -({ \ - switch (sz) { \ - case 4: \ - tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \ - break; \ - \ - case 8: \ - tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \ - break; \ - \ - default: \ - __bad_size_for_ia64_fetch_and_add(); \ - } \ -}) - -#define ia64_fetchadd(i,v,sem) \ -({ \ - __u64 _tmp; \ - volatile __typeof__(*(v)) *_v = (v); \ - /* Can't use a switch () here: gcc isn't always smart enough for that... */ \ - if ((i) == -16) \ - IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \ - else if ((i) == -8) \ - IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \ - else if ((i) == -4) \ - IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \ - else if ((i) == -1) \ - IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \ - else if ((i) == 1) \ - IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \ - else if ((i) == 4) \ - IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \ - else if ((i) == 8) \ - IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \ - else if ((i) == 16) \ - IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \ - else \ - _tmp = __bad_increment_for_ia64_fetch_and_add(); \ - (__typeof__(*(v))) (_tmp); /* return old value */ \ -}) - -#define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ - -/* - * This function doesn't exist, so you'll get a linker error if - * something tries to do an invalid xchg(). - */ -extern void ia64_xchg_called_with_bad_pointer (void); - -#define __xchg(x,ptr,size) \ -({ \ - unsigned long __xchg_result; \ - \ - switch (size) { \ - case 1: \ - __xchg_result = ia64_xchg1((__u8 *)ptr, x); \ - break; \ - \ - case 2: \ - __xchg_result = ia64_xchg2((__u16 *)ptr, x); \ - break; \ - \ - case 4: \ - __xchg_result = ia64_xchg4((__u32 *)ptr, x); \ - break; \ - \ - case 8: \ - __xchg_result = ia64_xchg8((__u64 *)ptr, x); \ - break; \ - default: \ - ia64_xchg_called_with_bad_pointer(); \ - } \ - __xchg_result; \ -}) - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr)))) - -/* - * Atomic compare and exchange. Compare OLD with MEM, if identical, - * store NEW in MEM. Return the initial value in MEM. Success is - * indicated by comparing RETURN with OLD. - */ - -#define __HAVE_ARCH_CMPXCHG 1 - -/* - * This function doesn't exist, so you'll get a linker error - * if something tries to do an invalid cmpxchg(). - */ -extern long ia64_cmpxchg_called_with_bad_pointer (void); - -#define ia64_cmpxchg(sem,ptr,old,new,size) \ -({ \ - __u64 _o_, _r_; \ - \ - switch (size) { \ - case 1: _o_ = (__u8 ) (long) (old); break; \ - case 2: _o_ = (__u16) (long) (old); break; \ - case 4: _o_ = (__u32) (long) (old); break; \ - case 8: _o_ = (__u64) (long) (old); break; \ - default: break; \ - } \ - switch (size) { \ - case 1: \ - _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \ - break; \ - \ - case 2: \ - _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \ - break; \ - \ - case 4: \ - _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \ - break; \ - \ - case 8: \ - _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \ - break; \ - \ - default: \ - _r_ = ia64_cmpxchg_called_with_bad_pointer(); \ - break; \ - } \ - (__typeof__(old)) _r_; \ -}) - -#define cmpxchg_acq(ptr, o, n) \ - ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr))) -#define cmpxchg_rel(ptr, o, n) \ - ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr))) - -/* for compatibility with other platforms: */ -#define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n)) -#define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n)) - -#define cmpxchg_local cmpxchg -#define cmpxchg64_local cmpxchg64 - -#ifdef CONFIG_IA64_DEBUG_CMPXCHG -# define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128; -# define CMPXCHG_BUGCHECK(v) \ - do { \ - if (_cmpxchg_bugcheck_count-- <= 0) { \ - void *ip; \ - extern int printk(const char *fmt, ...); \ - ip = (void *) ia64_getreg(_IA64_REG_IP); \ - printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \ - break; \ - } \ - } while (0) -#else /* !CONFIG_IA64_DEBUG_CMPXCHG */ -# define CMPXCHG_BUGCHECK_DECL -# define CMPXCHG_BUGCHECK(v) -#endif /* !CONFIG_IA64_DEBUG_CMPXCHG */ - -#endif - -#ifdef __KERNEL__ -#include -#endif - -#ifndef __ASSEMBLY__ -#if defined(CONFIG_PARAVIRT) && defined(__KERNEL__) -#define IA64_INTRINSIC_API(name) pv_cpu_ops.name -#define IA64_INTRINSIC_MACRO(name) paravirt_ ## name -#else -#define IA64_INTRINSIC_API(name) ia64_native_ ## name -#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name -#endif - -/************************************************/ -/* Instructions paravirtualized for correctness */ -/************************************************/ -/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */ -/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag" - * is not currently used (though it may be in a long-format VHPT system!) - */ -#define ia64_fc IA64_INTRINSIC_API(fc) -#define ia64_thash IA64_INTRINSIC_API(thash) -#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid) -#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd) - - -/************************************************/ -/* Instructions paravirtualized for performance */ -/************************************************/ -#define ia64_ssm IA64_INTRINSIC_MACRO(ssm) -#define ia64_rsm IA64_INTRINSIC_MACRO(rsm) -#define ia64_getreg IA64_INTRINSIC_API(getreg) -#define ia64_setreg IA64_INTRINSIC_API(setreg) -#define ia64_set_rr IA64_INTRINSIC_API(set_rr) -#define ia64_get_rr IA64_INTRINSIC_API(get_rr) -#define ia64_ptcga IA64_INTRINSIC_API(ptcga) -#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i) -#define ia64_intrin_local_irq_restore \ - IA64_INTRINSIC_API(intrin_local_irq_restore) -#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4) - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_INTRINSICS_H */ diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h deleted file mode 100644 index 260a85a..0000000 --- a/include/asm-ia64/io.h +++ /dev/null @@ -1,459 +0,0 @@ -#ifndef _ASM_IA64_IO_H -#define _ASM_IA64_IO_H - -/* - * This file contains the definitions for the emulated IO instructions - * inb/inw/inl/outb/outw/outl and the "string versions" of the same - * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" - * versions of the single-IO instructions (inb_p/inw_p/..). - * - * This file is not meant to be obfuscating: it's just complicated to - * (a) handle it all in a way that makes gcc able to optimize it as - * well as possible and (b) trying to avoid writing the same thing - * over and over again with slight variations and possibly making a - * mistake somewhere. - * - * Copyright (C) 1998-2003 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 Asit Mallick - * Copyright (C) 1999 Don Dugger - */ - -/* We don't use IO slowdowns on the ia64, but.. */ -#define __SLOW_DOWN_IO do { } while (0) -#define SLOW_DOWN_IO do { } while (0) - -#define __IA64_UNCACHED_OFFSET RGN_BASE(RGN_UNCACHED) - -/* - * The legacy I/O space defined by the ia64 architecture supports only 65536 ports, but - * large machines may have multiple other I/O spaces so we can't place any a priori limit - * on IO_SPACE_LIMIT. These additional spaces are described in ACPI. - */ -#define IO_SPACE_LIMIT 0xffffffffffffffffUL - -#define MAX_IO_SPACES_BITS 8 -#define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS) -#define IO_SPACE_BITS 24 -#define IO_SPACE_SIZE (1UL << IO_SPACE_BITS) - -#define IO_SPACE_NR(port) ((port) >> IO_SPACE_BITS) -#define IO_SPACE_BASE(space) ((space) << IO_SPACE_BITS) -#define IO_SPACE_PORT(port) ((port) & (IO_SPACE_SIZE - 1)) - -#define IO_SPACE_SPARSE_ENCODING(p) ((((p) >> 2) << 12) | ((p) & 0xfff)) - -struct io_space { - unsigned long mmio_base; /* base in MMIO space */ - int sparse; -}; - -extern struct io_space io_space[]; -extern unsigned int num_io_spaces; - -# ifdef __KERNEL__ - -/* - * All MMIO iomem cookies are in region 6; anything less is a PIO cookie: - * 0xCxxxxxxxxxxxxxxx MMIO cookie (return from ioremap) - * 0x000000001SPPPPPP PIO cookie (S=space number, P..P=port) - * - * ioread/writeX() uses the leading 1 in PIO cookies (PIO_OFFSET) to catch - * code that uses bare port numbers without the prerequisite pci_iomap(). - */ -#define PIO_OFFSET (1UL << (MAX_IO_SPACES_BITS + IO_SPACE_BITS)) -#define PIO_MASK (PIO_OFFSET - 1) -#define PIO_RESERVED __IA64_UNCACHED_OFFSET -#define HAVE_ARCH_PIO_SIZE - -#include -#include -#include -#include -#include - -/* - * Change virtual addresses to physical addresses and vv. - */ -static inline unsigned long -virt_to_phys (volatile void *address) -{ - return (unsigned long) address - PAGE_OFFSET; -} - -static inline void* -phys_to_virt (unsigned long address) -{ - return (void *) (address + PAGE_OFFSET); -} - -#define ARCH_HAS_VALID_PHYS_ADDR_RANGE -extern u64 kern_mem_attribute (unsigned long phys_addr, unsigned long size); -extern int valid_phys_addr_range (unsigned long addr, size_t count); /* efi.c */ -extern int valid_mmap_phys_addr_range (unsigned long pfn, size_t count); - -/* - * The following two macros are deprecated and scheduled for removal. - * Please use the PCI-DMA interface defined in instead. - */ -#define bus_to_virt phys_to_virt -#define virt_to_bus virt_to_phys -#define page_to_bus page_to_phys - -# endif /* KERNEL */ - -/* - * Memory fence w/accept. This should never be used in code that is - * not IA-64 specific. - */ -#define __ia64_mf_a() ia64_mfa() - -/** - * ___ia64_mmiowb - I/O write barrier - * - * Ensure ordering of I/O space writes. This will make sure that writes - * following the barrier will arrive after all previous writes. For most - * ia64 platforms, this is a simple 'mf.a' instruction. - * - * See Documentation/DocBook/deviceiobook.tmpl for more information. - */ -static inline void ___ia64_mmiowb(void) -{ - ia64_mfa(); -} - -static inline void* -__ia64_mk_io_addr (unsigned long port) -{ - struct io_space *space; - unsigned long offset; - - space = &io_space[IO_SPACE_NR(port)]; - port = IO_SPACE_PORT(port); - if (space->sparse) - offset = IO_SPACE_SPARSE_ENCODING(port); - else - offset = port; - - return (void *) (space->mmio_base | offset); -} - -#define __ia64_inb ___ia64_inb -#define __ia64_inw ___ia64_inw -#define __ia64_inl ___ia64_inl -#define __ia64_outb ___ia64_outb -#define __ia64_outw ___ia64_outw -#define __ia64_outl ___ia64_outl -#define __ia64_readb ___ia64_readb -#define __ia64_readw ___ia64_readw -#define __ia64_readl ___ia64_readl -#define __ia64_readq ___ia64_readq -#define __ia64_readb_relaxed ___ia64_readb -#define __ia64_readw_relaxed ___ia64_readw -#define __ia64_readl_relaxed ___ia64_readl -#define __ia64_readq_relaxed ___ia64_readq -#define __ia64_writeb ___ia64_writeb -#define __ia64_writew ___ia64_writew -#define __ia64_writel ___ia64_writel -#define __ia64_writeq ___ia64_writeq -#define __ia64_mmiowb ___ia64_mmiowb - -/* - * For the in/out routines, we need to do "mf.a" _after_ doing the I/O access to ensure - * that the access has completed before executing other I/O accesses. Since we're doing - * the accesses through an uncachable (UC) translation, the CPU will execute them in - * program order. However, we still need to tell the compiler not to shuffle them around - * during optimization, which is why we use "volatile" pointers. - */ - -static inline unsigned int -___ia64_inb (unsigned long port) -{ - volatile unsigned char *addr = __ia64_mk_io_addr(port); - unsigned char ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -static inline unsigned int -___ia64_inw (unsigned long port) -{ - volatile unsigned short *addr = __ia64_mk_io_addr(port); - unsigned short ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -static inline unsigned int -___ia64_inl (unsigned long port) -{ - volatile unsigned int *addr = __ia64_mk_io_addr(port); - unsigned int ret; - - ret = *addr; - __ia64_mf_a(); - return ret; -} - -static inline void -___ia64_outb (unsigned char val, unsigned long port) -{ - volatile unsigned char *addr = __ia64_mk_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -static inline void -___ia64_outw (unsigned short val, unsigned long port) -{ - volatile unsigned short *addr = __ia64_mk_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -static inline void -___ia64_outl (unsigned int val, unsigned long port) -{ - volatile unsigned int *addr = __ia64_mk_io_addr(port); - - *addr = val; - __ia64_mf_a(); -} - -static inline void -__insb (unsigned long port, void *dst, unsigned long count) -{ - unsigned char *dp = dst; - - while (count--) - *dp++ = platform_inb(port); -} - -static inline void -__insw (unsigned long port, void *dst, unsigned long count) -{ - unsigned short *dp = dst; - - while (count--) - *dp++ = platform_inw(port); -} - -static inline void -__insl (unsigned long port, void *dst, unsigned long count) -{ - unsigned int *dp = dst; - - while (count--) - *dp++ = platform_inl(port); -} - -static inline void -__outsb (unsigned long port, const void *src, unsigned long count) -{ - const unsigned char *sp = src; - - while (count--) - platform_outb(*sp++, port); -} - -static inline void -__outsw (unsigned long port, const void *src, unsigned long count) -{ - const unsigned short *sp = src; - - while (count--) - platform_outw(*sp++, port); -} - -static inline void -__outsl (unsigned long port, const void *src, unsigned long count) -{ - const unsigned int *sp = src; - - while (count--) - platform_outl(*sp++, port); -} - -/* - * Unfortunately, some platforms are broken and do not follow the IA-64 architecture - * specification regarding legacy I/O support. Thus, we have to make these operations - * platform dependent... - */ -#define __inb platform_inb -#define __inw platform_inw -#define __inl platform_inl -#define __outb platform_outb -#define __outw platform_outw -#define __outl platform_outl -#define __mmiowb platform_mmiowb - -#define inb(p) __inb(p) -#define inw(p) __inw(p) -#define inl(p) __inl(p) -#define insb(p,d,c) __insb(p,d,c) -#define insw(p,d,c) __insw(p,d,c) -#define insl(p,d,c) __insl(p,d,c) -#define outb(v,p) __outb(v,p) -#define outw(v,p) __outw(v,p) -#define outl(v,p) __outl(v,p) -#define outsb(p,s,c) __outsb(p,s,c) -#define outsw(p,s,c) __outsw(p,s,c) -#define outsl(p,s,c) __outsl(p,s,c) -#define mmiowb() __mmiowb() - -/* - * The address passed to these functions are ioremap()ped already. - * - * We need these to be machine vectors since some platforms don't provide - * DMA coherence via PIO reads (PCI drivers and the spec imply that this is - * a good idea). Writes are ok though for all existing ia64 platforms (and - * hopefully it'll stay that way). - */ -static inline unsigned char -___ia64_readb (const volatile void __iomem *addr) -{ - return *(volatile unsigned char __force *)addr; -} - -static inline unsigned short -___ia64_readw (const volatile void __iomem *addr) -{ - return *(volatile unsigned short __force *)addr; -} - -static inline unsigned int -___ia64_readl (const volatile void __iomem *addr) -{ - return *(volatile unsigned int __force *) addr; -} - -static inline unsigned long -___ia64_readq (const volatile void __iomem *addr) -{ - return *(volatile unsigned long __force *) addr; -} - -static inline void -__writeb (unsigned char val, volatile void __iomem *addr) -{ - *(volatile unsigned char __force *) addr = val; -} - -static inline void -__writew (unsigned short val, volatile void __iomem *addr) -{ - *(volatile unsigned short __force *) addr = val; -} - -static inline void -__writel (unsigned int val, volatile void __iomem *addr) -{ - *(volatile unsigned int __force *) addr = val; -} - -static inline void -__writeq (unsigned long val, volatile void __iomem *addr) -{ - *(volatile unsigned long __force *) addr = val; -} - -#define __readb platform_readb -#define __readw platform_readw -#define __readl platform_readl -#define __readq platform_readq -#define __readb_relaxed platform_readb_relaxed -#define __readw_relaxed platform_readw_relaxed -#define __readl_relaxed platform_readl_relaxed -#define __readq_relaxed platform_readq_relaxed - -#define readb(a) __readb((a)) -#define readw(a) __readw((a)) -#define readl(a) __readl((a)) -#define readq(a) __readq((a)) -#define readb_relaxed(a) __readb_relaxed((a)) -#define readw_relaxed(a) __readw_relaxed((a)) -#define readl_relaxed(a) __readl_relaxed((a)) -#define readq_relaxed(a) __readq_relaxed((a)) -#define __raw_readb readb -#define __raw_readw readw -#define __raw_readl readl -#define __raw_readq readq -#define __raw_readb_relaxed readb_relaxed -#define __raw_readw_relaxed readw_relaxed -#define __raw_readl_relaxed readl_relaxed -#define __raw_readq_relaxed readq_relaxed -#define writeb(v,a) __writeb((v), (a)) -#define writew(v,a) __writew((v), (a)) -#define writel(v,a) __writel((v), (a)) -#define writeq(v,a) __writeq((v), (a)) -#define __raw_writeb writeb -#define __raw_writew writew -#define __raw_writel writel -#define __raw_writeq writeq - -#ifndef inb_p -# define inb_p inb -#endif -#ifndef inw_p -# define inw_p inw -#endif -#ifndef inl_p -# define inl_p inl -#endif - -#ifndef outb_p -# define outb_p outb -#endif -#ifndef outw_p -# define outw_p outw -#endif -#ifndef outl_p -# define outl_p outl -#endif - -# ifdef __KERNEL__ - -extern void __iomem * ioremap(unsigned long offset, unsigned long size); -extern void __iomem * ioremap_nocache (unsigned long offset, unsigned long size); -extern void iounmap (volatile void __iomem *addr); - -/* - * String version of IO memory access ops: - */ -extern void memcpy_fromio(void *dst, const volatile void __iomem *src, long n); -extern void memcpy_toio(volatile void __iomem *dst, const void *src, long n); -extern void memset_io(volatile void __iomem *s, int c, long n); - -# endif /* __KERNEL__ */ - -/* - * Enabling BIO_VMERGE_BOUNDARY forces us to turn off I/O MMU bypassing. It is said that - * BIO-level virtual merging can give up to 4% performance boost (not verified for ia64). - * On the other hand, we know that I/O MMU bypassing gives ~8% performance improvement on - * SPECweb-like workloads on zx1-based machines. Thus, for now we favor I/O MMU bypassing - * over BIO-level virtual merging. - */ -extern unsigned long ia64_max_iommu_merge_mask; -#if 1 -#define BIO_VMERGE_BOUNDARY 0 -#else -/* - * It makes no sense at all to have this BIO_VMERGE_BOUNDARY macro here. Should be - * replaced by dma_merge_mask() or something of that sort. Note: the only way - * BIO_VMERGE_BOUNDARY is used is to mask off bits. Effectively, our definition gets - * expanded into: - * - * addr & ((ia64_max_iommu_merge_mask + 1) - 1) == (addr & ia64_max_iommu_vmerge_mask) - * - * which is precisely what we want. - */ -#define BIO_VMERGE_BOUNDARY (ia64_max_iommu_merge_mask + 1) -#endif - -#endif /* _ASM_IA64_IO_H */ diff --git a/include/asm-ia64/ioctl.h b/include/asm-ia64/ioctl.h deleted file mode 100644 index b279fe0..0000000 --- a/include/asm-ia64/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/ioctls.h b/include/asm-ia64/ioctls.h deleted file mode 100644 index f41b636..0000000 --- a/include/asm-ia64/ioctls.h +++ /dev/null @@ -1,93 +0,0 @@ -#ifndef _ASM_IA64_IOCTLS_H -#define _ASM_IA64_IOCTLS_H - -/* - * Based on - * - * Modified 1998, 1999, 2002 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -/* 0x54 is just a magic number to make these relatively unique ('T') */ - -#define TCGETS 0x5401 -#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */ -#define TCSETSW 0x5403 -#define TCSETSF 0x5404 -#define TCGETA 0x5405 -#define TCSETA 0x5406 -#define TCSETAW 0x5407 -#define TCSETAF 0x5408 -#define TCSBRK 0x5409 -#define TCXONC 0x540A -#define TCFLSH 0x540B -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E -#define TIOCGPGRP 0x540F -#define TIOCSPGRP 0x5410 -#define TIOCOUTQ 0x5411 -#define TIOCSTI 0x5412 -#define TIOCGWINSZ 0x5413 -#define TIOCSWINSZ 0x5414 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define FIONREAD 0x541B -#define TIOCINQ FIONREAD -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 -#define FIONBIO 0x5421 -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -#define TIOCSBRK 0x5427 /* BSD compatibility */ -#define TIOCCBRK 0x5428 /* BSD compatibility */ -#define TIOCGSID 0x5429 /* Return the session ID of FD */ -#define TCGETS2 _IOR('T',0x2A, struct termios2) -#define TCSETS2 _IOW('T',0x2B, struct termios2) -#define TCSETSW2 _IOW('T',0x2C, struct termios2) -#define TCSETSF2 _IOW('T',0x2D, struct termios2) -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ -#define FIOCLEX 0x5451 -#define FIOASYNC 0x5452 -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ -#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ -#define FIOQSIZE 0x5460 - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - -#endif /* _ASM_IA64_IOCTLS_H */ diff --git a/include/asm-ia64/iosapic.h b/include/asm-ia64/iosapic.h deleted file mode 100644 index b9c102e..0000000 --- a/include/asm-ia64/iosapic.h +++ /dev/null @@ -1,126 +0,0 @@ -#ifndef __ASM_IA64_IOSAPIC_H -#define __ASM_IA64_IOSAPIC_H - -#define IOSAPIC_REG_SELECT 0x0 -#define IOSAPIC_WINDOW 0x10 -#define IOSAPIC_EOI 0x40 - -#define IOSAPIC_VERSION 0x1 - -/* - * Redirection table entry - */ -#define IOSAPIC_RTE_LOW(i) (0x10+i*2) -#define IOSAPIC_RTE_HIGH(i) (0x11+i*2) - -#define IOSAPIC_DEST_SHIFT 16 - -/* - * Delivery mode - */ -#define IOSAPIC_DELIVERY_SHIFT 8 -#define IOSAPIC_FIXED 0x0 -#define IOSAPIC_LOWEST_PRIORITY 0x1 -#define IOSAPIC_PMI 0x2 -#define IOSAPIC_NMI 0x4 -#define IOSAPIC_INIT 0x5 -#define IOSAPIC_EXTINT 0x7 - -/* - * Interrupt polarity - */ -#define IOSAPIC_POLARITY_SHIFT 13 -#define IOSAPIC_POL_HIGH 0 -#define IOSAPIC_POL_LOW 1 - -/* - * Trigger mode - */ -#define IOSAPIC_TRIGGER_SHIFT 15 -#define IOSAPIC_EDGE 0 -#define IOSAPIC_LEVEL 1 - -/* - * Mask bit - */ - -#define IOSAPIC_MASK_SHIFT 16 -#define IOSAPIC_MASK (1< -#else -#define iosapic_pcat_compat_init ia64_native_iosapic_pcat_compat_init -#define __iosapic_read __ia64_native_iosapic_read -#define __iosapic_write __ia64_native_iosapic_write -#define iosapic_get_irq_chip ia64_native_iosapic_get_irq_chip -#endif - -extern void __init ia64_native_iosapic_pcat_compat_init(void); -extern struct irq_chip *ia64_native_iosapic_get_irq_chip(unsigned long trigger); - -static inline unsigned int -__ia64_native_iosapic_read(char __iomem *iosapic, unsigned int reg) -{ - writel(reg, iosapic + IOSAPIC_REG_SELECT); - return readl(iosapic + IOSAPIC_WINDOW); -} - -static inline void -__ia64_native_iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) -{ - writel(reg, iosapic + IOSAPIC_REG_SELECT); - writel(val, iosapic + IOSAPIC_WINDOW); -} - -static inline void iosapic_eoi(char __iomem *iosapic, u32 vector) -{ - writel(vector, iosapic + IOSAPIC_EOI); -} - -extern void __init iosapic_system_init (int pcat_compat); -extern int __devinit iosapic_init (unsigned long address, - unsigned int gsi_base); -#ifdef CONFIG_HOTPLUG -extern int iosapic_remove (unsigned int gsi_base); -#else -#define iosapic_remove(gsi_base) (-EINVAL) -#endif /* CONFIG_HOTPLUG */ -extern int gsi_to_irq (unsigned int gsi); -extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, - unsigned long trigger); -extern void iosapic_unregister_intr (unsigned int irq); -extern void __devinit iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, - unsigned long polarity, - unsigned long trigger); -extern int __init iosapic_register_platform_intr (u32 int_type, - unsigned int gsi, - int pmi_vector, - u16 eid, u16 id, - unsigned long polarity, - unsigned long trigger); - -#ifdef CONFIG_NUMA -extern void __devinit map_iosapic_to_node (unsigned int, int); -#endif -#else -#define iosapic_system_init(pcat_compat) do { } while (0) -#define iosapic_init(address,gsi_base) (-EINVAL) -#define iosapic_remove(gsi_base) (-ENODEV) -#define iosapic_register_intr(gsi,polarity,trigger) (gsi) -#define iosapic_unregister_intr(irq) do { } while (0) -#define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0) -#define iosapic_register_platform_intr(type,gsi,pmi,eid,id, \ - polarity,trigger) (gsi) -#endif - -# endif /* !__ASSEMBLY__ */ -#endif /* __ASM_IA64_IOSAPIC_H */ diff --git a/include/asm-ia64/ipcbuf.h b/include/asm-ia64/ipcbuf.h deleted file mode 100644 index 079899a..0000000 --- a/include/asm-ia64/ipcbuf.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _ASM_IA64_IPCBUF_H -#define _ASM_IA64_IPCBUF_H - -/* - * The ipc64_perm structure for IA-64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit seq - * - 2 miscellaneous 64-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned short seq; - unsigned short __pad1; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* _ASM_IA64_IPCBUF_H */ diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h deleted file mode 100644 index 3627116..0000000 --- a/include/asm-ia64/irq.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _ASM_IA64_IRQ_H -#define _ASM_IA64_IRQ_H - -/* - * Copyright (C) 1999-2000, 2002 Hewlett-Packard Co - * David Mosberger-Tang - * Stephane Eranian - * - * 11/24/98 S.Eranian updated TIMER_IRQ and irq_canonicalize - * 01/20/99 S.Eranian added keyboard interrupt - * 02/29/00 D.Mosberger moved most things into hw_irq.h - */ - -#include -#include -#include - -static __inline__ int -irq_canonicalize (int irq) -{ - /* - * We do the legacy thing here of pretending that irqs < 16 - * are 8259 irqs. This really shouldn't be necessary at all, - * but we keep it here as serial.c still uses it... - */ - return ((irq == 2) ? 9 : irq); -} - -extern void set_irq_affinity_info (unsigned int irq, int dest, int redir); -bool is_affinity_mask_valid(cpumask_t cpumask); - -#define is_affinity_mask_valid is_affinity_mask_valid - -#endif /* _ASM_IA64_IRQ_H */ diff --git a/include/asm-ia64/irq_regs.h b/include/asm-ia64/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-ia64/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/kdebug.h b/include/asm-ia64/kdebug.h deleted file mode 100644 index 35e4940..0000000 --- a/include/asm-ia64/kdebug.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _IA64_KDEBUG_H -#define _IA64_KDEBUG_H 1 -/* - * include/asm-ia64/kdebug.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) Intel Corporation, 2005 - * - * 2005-Apr Rusty Lynch and Anil S Keshavamurthy - * adopted from - * include/asm-x86_64/kdebug.h - * - * 2005-Oct Keith Owens . Expand notify_die to cover more - * events. - */ - -enum die_val { - DIE_BREAK = 1, - DIE_FAULT, - DIE_OOPS, - DIE_MACHINE_HALT, - DIE_MACHINE_RESTART, - DIE_MCA_MONARCH_ENTER, - DIE_MCA_MONARCH_PROCESS, - DIE_MCA_MONARCH_LEAVE, - DIE_MCA_SLAVE_ENTER, - DIE_MCA_SLAVE_PROCESS, - DIE_MCA_SLAVE_LEAVE, - DIE_MCA_RENDZVOUS_ENTER, - DIE_MCA_RENDZVOUS_PROCESS, - DIE_MCA_RENDZVOUS_LEAVE, - DIE_MCA_NEW_TIMEOUT, - DIE_INIT_ENTER, - DIE_INIT_MONARCH_ENTER, - DIE_INIT_MONARCH_PROCESS, - DIE_INIT_MONARCH_LEAVE, - DIE_INIT_SLAVE_ENTER, - DIE_INIT_SLAVE_PROCESS, - DIE_INIT_SLAVE_LEAVE, - DIE_KDEBUG_ENTER, - DIE_KDEBUG_LEAVE, - DIE_KDUMP_ENTER, - DIE_KDUMP_LEAVE, -}; - -#endif diff --git a/include/asm-ia64/kexec.h b/include/asm-ia64/kexec.h deleted file mode 100644 index 541be83..0000000 --- a/include/asm-ia64/kexec.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef _ASM_IA64_KEXEC_H -#define _ASM_IA64_KEXEC_H - - -/* Maximum physical address we can use pages from */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) -/* Maximum address we can reach in physical address mode */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) -/* Maximum address we can use for the control code buffer */ -#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE - -#define KEXEC_CONTROL_CODE_SIZE (8192 + 8192 + 4096) - -/* The native architecture */ -#define KEXEC_ARCH KEXEC_ARCH_IA_64 - -#define kexec_flush_icache_page(page) do { \ - unsigned long page_addr = (unsigned long)page_address(page); \ - flush_icache_range(page_addr, page_addr + PAGE_SIZE); \ - } while(0) - -extern struct kimage *ia64_kimage; -extern const unsigned int relocate_new_kernel_size; -extern void relocate_new_kernel(unsigned long, unsigned long, - struct ia64_boot_param *, unsigned long); -static inline void -crash_setup_regs(struct pt_regs *newregs, struct pt_regs *oldregs) -{ -} -extern struct resource efi_memmap_res; -extern struct resource boot_param_res; -extern void kdump_smp_send_stop(void); -extern void kdump_smp_send_init(void); -extern void kexec_disable_iosapic(void); -extern void crash_save_this_cpu(void); -struct rsvd_region; -extern unsigned long kdump_find_rsvd_region(unsigned long size, - struct rsvd_region *rsvd_regions, int n); -extern void kdump_cpu_freeze(struct unw_frame_info *info, void *arg); -extern int kdump_status[]; -extern atomic_t kdump_cpu_freezed; -extern atomic_t kdump_in_progress; - -#endif /* _ASM_IA64_KEXEC_H */ diff --git a/include/asm-ia64/kmap_types.h b/include/asm-ia64/kmap_types.h deleted file mode 100644 index 5d1658a..0000000 --- a/include/asm-ia64/kmap_types.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef _ASM_IA64_KMAP_TYPES_H -#define _ASM_IA64_KMAP_TYPES_H - - -#ifdef CONFIG_DEBUG_HIGHMEM -# define D(n) __KM_FENCE_##n , -#else -# define D(n) -#endif - -enum km_type { -D(0) KM_BOUNCE_READ, -D(1) KM_SKB_SUNRPC_DATA, -D(2) KM_SKB_DATA_SOFTIRQ, -D(3) KM_USER0, -D(4) KM_USER1, -D(5) KM_BIO_SRC_IRQ, -D(6) KM_BIO_DST_IRQ, -D(7) KM_PTE0, -D(8) KM_PTE1, -D(9) KM_IRQ0, -D(10) KM_IRQ1, -D(11) KM_SOFTIRQ0, -D(12) KM_SOFTIRQ1, -D(13) KM_TYPE_NR -}; - -#undef D - -#endif /* _ASM_IA64_KMAP_TYPES_H */ diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h deleted file mode 100644 index ef71b57..0000000 --- a/include/asm-ia64/kprobes.h +++ /dev/null @@ -1,133 +0,0 @@ -#ifndef _ASM_KPROBES_H -#define _ASM_KPROBES_H -/* - * Kernel Probes (KProbes) - * include/asm-ia64/kprobes.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) IBM Corporation, 2002, 2004 - * Copyright (C) Intel Corporation, 2005 - * - * 2005-Apr Rusty Lynch and Anil S Keshavamurthy - * adapted from i386 - */ -#include -#include -#include -#include - -#define __ARCH_WANT_KPROBES_INSN_SLOT -#define MAX_INSN_SIZE 2 /* last half is for kprobe-booster */ -#define BREAK_INST (long)(__IA64_BREAK_KPROBE << 6) -#define NOP_M_INST (long)(1<<27) -#define BRL_INST(i1, i2) ((long)((0xcL << 37) | /* brl */ \ - (0x1L << 12) | /* many */ \ - (((i1) & 1) << 36) | ((i2) << 13))) /* imm */ - -typedef union cmp_inst { - struct { - unsigned long long qp : 6; - unsigned long long p1 : 6; - unsigned long long c : 1; - unsigned long long r2 : 7; - unsigned long long r3 : 7; - unsigned long long p2 : 6; - unsigned long long ta : 1; - unsigned long long x2 : 2; - unsigned long long tb : 1; - unsigned long long opcode : 4; - unsigned long long reserved : 23; - }f; - unsigned long long l; -} cmp_inst_t; - -struct kprobe; - -typedef struct _bundle { - struct { - unsigned long long template : 5; - unsigned long long slot0 : 41; - unsigned long long slot1_p0 : 64-46; - } quad0; - struct { - unsigned long long slot1_p1 : 41 - (64-46); - unsigned long long slot2 : 41; - } quad1; -} __attribute__((__aligned__(16))) bundle_t; - -struct prev_kprobe { - struct kprobe *kp; - unsigned long status; -}; - -#define MAX_PARAM_RSE_SIZE (0x60+0x60/0x3f) -/* per-cpu kprobe control block */ -#define ARCH_PREV_KPROBE_SZ 2 -struct kprobe_ctlblk { - unsigned long kprobe_status; - struct pt_regs jprobe_saved_regs; - unsigned long jprobes_saved_stacked_regs[MAX_PARAM_RSE_SIZE]; - unsigned long *bsp; - unsigned long cfm; - atomic_t prev_kprobe_index; - struct prev_kprobe prev_kprobe[ARCH_PREV_KPROBE_SZ]; -}; - -#define kretprobe_blacklist_size 0 - -#define SLOT0_OPCODE_SHIFT (37) -#define SLOT1_p1_OPCODE_SHIFT (37 - (64-46)) -#define SLOT2_OPCODE_SHIFT (37) - -#define INDIRECT_CALL_OPCODE (1) -#define IP_RELATIVE_CALL_OPCODE (5) -#define IP_RELATIVE_BRANCH_OPCODE (4) -#define IP_RELATIVE_PREDICT_OPCODE (7) -#define LONG_BRANCH_OPCODE (0xC) -#define LONG_CALL_OPCODE (0xD) -#define flush_insn_slot(p) do { } while (0) - -typedef struct kprobe_opcode { - bundle_t bundle; -} kprobe_opcode_t; - -struct fnptr { - unsigned long ip; - unsigned long gp; -}; - -/* Architecture specific copy of original instruction*/ -struct arch_specific_insn { - /* copy of the instruction to be emulated */ - kprobe_opcode_t *insn; - #define INST_FLAG_FIX_RELATIVE_IP_ADDR 1 - #define INST_FLAG_FIX_BRANCH_REG 2 - #define INST_FLAG_BREAK_INST 4 - #define INST_FLAG_BOOSTABLE 8 - unsigned long inst_flag; - unsigned short target_br_reg; - unsigned short slot; -}; - -extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr); -extern int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); - -extern void invalidate_stacked_regs(void); -extern void flush_register_stack(void); -extern void arch_remove_kprobe(struct kprobe *p); - -#endif /* _ASM_KPROBES_H */ diff --git a/include/asm-ia64/kregs.h b/include/asm-ia64/kregs.h deleted file mode 100644 index aefcdfe..0000000 --- a/include/asm-ia64/kregs.h +++ /dev/null @@ -1,165 +0,0 @@ -#ifndef _ASM_IA64_KREGS_H -#define _ASM_IA64_KREGS_H - -/* - * Copyright (C) 2001-2002 Hewlett-Packard Co - * David Mosberger-Tang - */ -/* - * This file defines the kernel register usage convention used by Linux/ia64. - */ - -/* - * Kernel registers: - */ -#define IA64_KR_IO_BASE 0 /* ar.k0: legacy I/O base address */ -#define IA64_KR_TSSD 1 /* ar.k1: IVE uses this as the TSSD */ -#define IA64_KR_PER_CPU_DATA 3 /* ar.k3: physical per-CPU base */ -#define IA64_KR_CURRENT_STACK 4 /* ar.k4: what's mapped in IA64_TR_CURRENT_STACK */ -#define IA64_KR_FPU_OWNER 5 /* ar.k5: fpu-owner (UP only, at the moment) */ -#define IA64_KR_CURRENT 6 /* ar.k6: "current" task pointer */ -#define IA64_KR_PT_BASE 7 /* ar.k7: page table base address (physical) */ - -#define _IA64_KR_PASTE(x,y) x##y -#define _IA64_KR_PREFIX(n) _IA64_KR_PASTE(ar.k, n) -#define IA64_KR(n) _IA64_KR_PREFIX(IA64_KR_##n) - -/* - * Translation registers: - */ -#define IA64_TR_KERNEL 0 /* itr0, dtr0: maps kernel image (code & data) */ -#define IA64_TR_PALCODE 1 /* itr1: maps PALcode as required by EFI */ -#define IA64_TR_CURRENT_STACK 1 /* dtr1: maps kernel's memory- & register-stacks */ - -#define IA64_TR_ALLOC_BASE 2 /* itr&dtr: Base of dynamic TR resource*/ -#define IA64_TR_ALLOC_MAX 32 /* Max number for dynamic use*/ - -/* Processor status register bits: */ -#define IA64_PSR_BE_BIT 1 -#define IA64_PSR_UP_BIT 2 -#define IA64_PSR_AC_BIT 3 -#define IA64_PSR_MFL_BIT 4 -#define IA64_PSR_MFH_BIT 5 -#define IA64_PSR_IC_BIT 13 -#define IA64_PSR_I_BIT 14 -#define IA64_PSR_PK_BIT 15 -#define IA64_PSR_DT_BIT 17 -#define IA64_PSR_DFL_BIT 18 -#define IA64_PSR_DFH_BIT 19 -#define IA64_PSR_SP_BIT 20 -#define IA64_PSR_PP_BIT 21 -#define IA64_PSR_DI_BIT 22 -#define IA64_PSR_SI_BIT 23 -#define IA64_PSR_DB_BIT 24 -#define IA64_PSR_LP_BIT 25 -#define IA64_PSR_TB_BIT 26 -#define IA64_PSR_RT_BIT 27 -/* The following are not affected by save_flags()/restore_flags(): */ -#define IA64_PSR_CPL0_BIT 32 -#define IA64_PSR_CPL1_BIT 33 -#define IA64_PSR_IS_BIT 34 -#define IA64_PSR_MC_BIT 35 -#define IA64_PSR_IT_BIT 36 -#define IA64_PSR_ID_BIT 37 -#define IA64_PSR_DA_BIT 38 -#define IA64_PSR_DD_BIT 39 -#define IA64_PSR_SS_BIT 40 -#define IA64_PSR_RI_BIT 41 -#define IA64_PSR_ED_BIT 43 -#define IA64_PSR_BN_BIT 44 -#define IA64_PSR_IA_BIT 45 - -/* A mask of PSR bits that we generally don't want to inherit across a clone2() or an - execve(). Only list flags here that need to be cleared/set for BOTH clone2() and - execve(). */ -#define IA64_PSR_BITS_TO_CLEAR (IA64_PSR_MFL | IA64_PSR_MFH | IA64_PSR_DB | IA64_PSR_LP | \ - IA64_PSR_TB | IA64_PSR_ID | IA64_PSR_DA | IA64_PSR_DD | \ - IA64_PSR_SS | IA64_PSR_ED | IA64_PSR_IA) -#define IA64_PSR_BITS_TO_SET (IA64_PSR_DFH | IA64_PSR_SP) - -#define IA64_PSR_BE (__IA64_UL(1) << IA64_PSR_BE_BIT) -#define IA64_PSR_UP (__IA64_UL(1) << IA64_PSR_UP_BIT) -#define IA64_PSR_AC (__IA64_UL(1) << IA64_PSR_AC_BIT) -#define IA64_PSR_MFL (__IA64_UL(1) << IA64_PSR_MFL_BIT) -#define IA64_PSR_MFH (__IA64_UL(1) << IA64_PSR_MFH_BIT) -#define IA64_PSR_IC (__IA64_UL(1) << IA64_PSR_IC_BIT) -#define IA64_PSR_I (__IA64_UL(1) << IA64_PSR_I_BIT) -#define IA64_PSR_PK (__IA64_UL(1) << IA64_PSR_PK_BIT) -#define IA64_PSR_DT (__IA64_UL(1) << IA64_PSR_DT_BIT) -#define IA64_PSR_DFL (__IA64_UL(1) << IA64_PSR_DFL_BIT) -#define IA64_PSR_DFH (__IA64_UL(1) << IA64_PSR_DFH_BIT) -#define IA64_PSR_SP (__IA64_UL(1) << IA64_PSR_SP_BIT) -#define IA64_PSR_PP (__IA64_UL(1) << IA64_PSR_PP_BIT) -#define IA64_PSR_DI (__IA64_UL(1) << IA64_PSR_DI_BIT) -#define IA64_PSR_SI (__IA64_UL(1) << IA64_PSR_SI_BIT) -#define IA64_PSR_DB (__IA64_UL(1) << IA64_PSR_DB_BIT) -#define IA64_PSR_LP (__IA64_UL(1) << IA64_PSR_LP_BIT) -#define IA64_PSR_TB (__IA64_UL(1) << IA64_PSR_TB_BIT) -#define IA64_PSR_RT (__IA64_UL(1) << IA64_PSR_RT_BIT) -/* The following are not affected by save_flags()/restore_flags(): */ -#define IA64_PSR_CPL (__IA64_UL(3) << IA64_PSR_CPL0_BIT) -#define IA64_PSR_IS (__IA64_UL(1) << IA64_PSR_IS_BIT) -#define IA64_PSR_MC (__IA64_UL(1) << IA64_PSR_MC_BIT) -#define IA64_PSR_IT (__IA64_UL(1) << IA64_PSR_IT_BIT) -#define IA64_PSR_ID (__IA64_UL(1) << IA64_PSR_ID_BIT) -#define IA64_PSR_DA (__IA64_UL(1) << IA64_PSR_DA_BIT) -#define IA64_PSR_DD (__IA64_UL(1) << IA64_PSR_DD_BIT) -#define IA64_PSR_SS (__IA64_UL(1) << IA64_PSR_SS_BIT) -#define IA64_PSR_RI (__IA64_UL(3) << IA64_PSR_RI_BIT) -#define IA64_PSR_ED (__IA64_UL(1) << IA64_PSR_ED_BIT) -#define IA64_PSR_BN (__IA64_UL(1) << IA64_PSR_BN_BIT) -#define IA64_PSR_IA (__IA64_UL(1) << IA64_PSR_IA_BIT) - -/* User mask bits: */ -#define IA64_PSR_UM (IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL | IA64_PSR_MFH) - -/* Default Control Register */ -#define IA64_DCR_PP_BIT 0 /* privileged performance monitor default */ -#define IA64_DCR_BE_BIT 1 /* big-endian default */ -#define IA64_DCR_LC_BIT 2 /* ia32 lock-check enable */ -#define IA64_DCR_DM_BIT 8 /* defer TLB miss faults */ -#define IA64_DCR_DP_BIT 9 /* defer page-not-present faults */ -#define IA64_DCR_DK_BIT 10 /* defer key miss faults */ -#define IA64_DCR_DX_BIT 11 /* defer key permission faults */ -#define IA64_DCR_DR_BIT 12 /* defer access right faults */ -#define IA64_DCR_DA_BIT 13 /* defer access bit faults */ -#define IA64_DCR_DD_BIT 14 /* defer debug faults */ - -#define IA64_DCR_PP (__IA64_UL(1) << IA64_DCR_PP_BIT) -#define IA64_DCR_BE (__IA64_UL(1) << IA64_DCR_BE_BIT) -#define IA64_DCR_LC (__IA64_UL(1) << IA64_DCR_LC_BIT) -#define IA64_DCR_DM (__IA64_UL(1) << IA64_DCR_DM_BIT) -#define IA64_DCR_DP (__IA64_UL(1) << IA64_DCR_DP_BIT) -#define IA64_DCR_DK (__IA64_UL(1) << IA64_DCR_DK_BIT) -#define IA64_DCR_DX (__IA64_UL(1) << IA64_DCR_DX_BIT) -#define IA64_DCR_DR (__IA64_UL(1) << IA64_DCR_DR_BIT) -#define IA64_DCR_DA (__IA64_UL(1) << IA64_DCR_DA_BIT) -#define IA64_DCR_DD (__IA64_UL(1) << IA64_DCR_DD_BIT) - -/* Interrupt Status Register */ -#define IA64_ISR_X_BIT 32 /* execute access */ -#define IA64_ISR_W_BIT 33 /* write access */ -#define IA64_ISR_R_BIT 34 /* read access */ -#define IA64_ISR_NA_BIT 35 /* non-access */ -#define IA64_ISR_SP_BIT 36 /* speculative load exception */ -#define IA64_ISR_RS_BIT 37 /* mandatory register-stack exception */ -#define IA64_ISR_IR_BIT 38 /* invalid register frame exception */ -#define IA64_ISR_CODE_MASK 0xf - -#define IA64_ISR_X (__IA64_UL(1) << IA64_ISR_X_BIT) -#define IA64_ISR_W (__IA64_UL(1) << IA64_ISR_W_BIT) -#define IA64_ISR_R (__IA64_UL(1) << IA64_ISR_R_BIT) -#define IA64_ISR_NA (__IA64_UL(1) << IA64_ISR_NA_BIT) -#define IA64_ISR_SP (__IA64_UL(1) << IA64_ISR_SP_BIT) -#define IA64_ISR_RS (__IA64_UL(1) << IA64_ISR_RS_BIT) -#define IA64_ISR_IR (__IA64_UL(1) << IA64_ISR_IR_BIT) - -/* ISR code field for non-access instructions */ -#define IA64_ISR_CODE_TPA 0 -#define IA64_ISR_CODE_FC 1 -#define IA64_ISR_CODE_PROBE 2 -#define IA64_ISR_CODE_TAK 3 -#define IA64_ISR_CODE_LFETCH 4 -#define IA64_ISR_CODE_PROBEF 5 - -#endif /* _ASM_IA64_kREGS_H */ diff --git a/include/asm-ia64/kvm.h b/include/asm-ia64/kvm.h deleted file mode 100644 index 3f6a090..0000000 --- a/include/asm-ia64/kvm.h +++ /dev/null @@ -1,211 +0,0 @@ -#ifndef __ASM_IA64_KVM_H -#define __ASM_IA64_KVM_H - -/* - * asm-ia64/kvm.h: kvm structure definitions for ia64 - * - * Copyright (C) 2007 Xiantao Zhang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ - -#include - -#include - -/* Architectural interrupt line count. */ -#define KVM_NR_INTERRUPTS 256 - -#define KVM_IOAPIC_NUM_PINS 48 - -struct kvm_ioapic_state { - __u64 base_address; - __u32 ioregsel; - __u32 id; - __u32 irr; - __u32 pad; - union { - __u64 bits; - struct { - __u8 vector; - __u8 delivery_mode:3; - __u8 dest_mode:1; - __u8 delivery_status:1; - __u8 polarity:1; - __u8 remote_irr:1; - __u8 trig_mode:1; - __u8 mask:1; - __u8 reserve:7; - __u8 reserved[4]; - __u8 dest_id; - } fields; - } redirtbl[KVM_IOAPIC_NUM_PINS]; -}; - -#define KVM_IRQCHIP_PIC_MASTER 0 -#define KVM_IRQCHIP_PIC_SLAVE 1 -#define KVM_IRQCHIP_IOAPIC 2 - -#define KVM_CONTEXT_SIZE 8*1024 - -struct kvm_fpreg { - union { - unsigned long bits[2]; - long double __dummy; /* force 16-byte alignment */ - } u; -}; - -union context { - /* 8K size */ - char dummy[KVM_CONTEXT_SIZE]; - struct { - unsigned long psr; - unsigned long pr; - unsigned long caller_unat; - unsigned long pad; - unsigned long gr[32]; - unsigned long ar[128]; - unsigned long br[8]; - unsigned long cr[128]; - unsigned long rr[8]; - unsigned long ibr[8]; - unsigned long dbr[8]; - unsigned long pkr[8]; - struct kvm_fpreg fr[128]; - }; -}; - -struct thash_data { - union { - struct { - unsigned long p : 1; /* 0 */ - unsigned long rv1 : 1; /* 1 */ - unsigned long ma : 3; /* 2-4 */ - unsigned long a : 1; /* 5 */ - unsigned long d : 1; /* 6 */ - unsigned long pl : 2; /* 7-8 */ - unsigned long ar : 3; /* 9-11 */ - unsigned long ppn : 38; /* 12-49 */ - unsigned long rv2 : 2; /* 50-51 */ - unsigned long ed : 1; /* 52 */ - unsigned long ig1 : 11; /* 53-63 */ - }; - struct { - unsigned long __rv1 : 53; /* 0-52 */ - unsigned long contiguous : 1; /*53 */ - unsigned long tc : 1; /* 54 TR or TC */ - unsigned long cl : 1; - /* 55 I side or D side cache line */ - unsigned long len : 4; /* 56-59 */ - unsigned long io : 1; /* 60 entry is for io or not */ - unsigned long nomap : 1; - /* 61 entry cann't be inserted into machine TLB.*/ - unsigned long checked : 1; - /* 62 for VTLB/VHPT sanity check */ - unsigned long invalid : 1; - /* 63 invalid entry */ - }; - unsigned long page_flags; - }; /* same for VHPT and TLB */ - - union { - struct { - unsigned long rv3 : 2; - unsigned long ps : 6; - unsigned long key : 24; - unsigned long rv4 : 32; - }; - unsigned long itir; - }; - union { - struct { - unsigned long ig2 : 12; - unsigned long vpn : 49; - unsigned long vrn : 3; - }; - unsigned long ifa; - unsigned long vadr; - struct { - unsigned long tag : 63; - unsigned long ti : 1; - }; - unsigned long etag; - }; - union { - struct thash_data *next; - unsigned long rid; - unsigned long gpaddr; - }; -}; - -#define NITRS 8 -#define NDTRS 8 - -struct saved_vpd { - unsigned long vhpi; - unsigned long vgr[16]; - unsigned long vbgr[16]; - unsigned long vnat; - unsigned long vbnat; - unsigned long vcpuid[5]; - unsigned long vpsr; - unsigned long vpr; - unsigned long vcr[128]; -}; - -struct kvm_regs { - char *saved_guest; - char *saved_stack; - struct saved_vpd vpd; - /*Arch-regs*/ - int mp_state; - unsigned long vmm_rr; - /* TR and TC. */ - struct thash_data itrs[NITRS]; - struct thash_data dtrs[NDTRS]; - /* Bit is set if there is a tr/tc for the region. */ - unsigned char itr_regions; - unsigned char dtr_regions; - unsigned char tc_regions; - - char irq_check; - unsigned long saved_itc; - unsigned long itc_check; - unsigned long timer_check; - unsigned long timer_pending; - unsigned long last_itc; - - unsigned long vrr[8]; - unsigned long ibr[8]; - unsigned long dbr[8]; - unsigned long insvc[4]; /* Interrupt in service. */ - unsigned long xtp; - - unsigned long metaphysical_rr0; /* from kvm_arch (so is pinned) */ - unsigned long metaphysical_rr4; /* from kvm_arch (so is pinned) */ - unsigned long metaphysical_saved_rr0; /* from kvm_arch */ - unsigned long metaphysical_saved_rr4; /* from kvm_arch */ - unsigned long fp_psr; /*used for lazy float register */ - unsigned long saved_gp; - /*for phycial emulation */ -}; - -struct kvm_sregs { -}; - -struct kvm_fpu { -}; - -#endif diff --git a/include/asm-ia64/kvm_host.h b/include/asm-ia64/kvm_host.h deleted file mode 100644 index 1efe513..0000000 --- a/include/asm-ia64/kvm_host.h +++ /dev/null @@ -1,527 +0,0 @@ -/* - * kvm_host.h: used for kvm module, and hold ia64-specific sections. - * - * Copyright (C) 2007, Intel Corporation. - * - * Xiantao Zhang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ - -#ifndef __ASM_KVM_HOST_H -#define __ASM_KVM_HOST_H - - -#include -#include -#include -#include -#include - -#include -#include - -#define KVM_MAX_VCPUS 4 -#define KVM_MEMORY_SLOTS 32 -/* memory slots that does not exposed to userspace */ -#define KVM_PRIVATE_MEM_SLOTS 4 - -#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 - -/* define exit reasons from vmm to kvm*/ -#define EXIT_REASON_VM_PANIC 0 -#define EXIT_REASON_MMIO_INSTRUCTION 1 -#define EXIT_REASON_PAL_CALL 2 -#define EXIT_REASON_SAL_CALL 3 -#define EXIT_REASON_SWITCH_RR6 4 -#define EXIT_REASON_VM_DESTROY 5 -#define EXIT_REASON_EXTERNAL_INTERRUPT 6 -#define EXIT_REASON_IPI 7 -#define EXIT_REASON_PTC_G 8 - -/*Define vmm address space and vm data space.*/ -#define KVM_VMM_SIZE (16UL<<20) -#define KVM_VMM_SHIFT 24 -#define KVM_VMM_BASE 0xD000000000000000UL -#define VMM_SIZE (8UL<<20) - -/* - * Define vm_buffer, used by PAL Services, base address. - * Note: vmbuffer is in the VMM-BLOCK, the size must be < 8M - */ -#define KVM_VM_BUFFER_BASE (KVM_VMM_BASE + VMM_SIZE) -#define KVM_VM_BUFFER_SIZE (8UL<<20) - -/*Define Virtual machine data layout.*/ -#define KVM_VM_DATA_SHIFT 24 -#define KVM_VM_DATA_SIZE (1UL << KVM_VM_DATA_SHIFT) -#define KVM_VM_DATA_BASE (KVM_VMM_BASE + KVM_VMM_SIZE) - - -#define KVM_P2M_BASE KVM_VM_DATA_BASE -#define KVM_P2M_OFS 0 -#define KVM_P2M_SIZE (8UL << 20) - -#define KVM_VHPT_BASE (KVM_P2M_BASE + KVM_P2M_SIZE) -#define KVM_VHPT_OFS KVM_P2M_SIZE -#define KVM_VHPT_BLOCK_SIZE (2UL << 20) -#define VHPT_SHIFT 18 -#define VHPT_SIZE (1UL << VHPT_SHIFT) -#define VHPT_NUM_ENTRIES (1<<(VHPT_SHIFT-5)) - -#define KVM_VTLB_BASE (KVM_VHPT_BASE+KVM_VHPT_BLOCK_SIZE) -#define KVM_VTLB_OFS (KVM_VHPT_OFS+KVM_VHPT_BLOCK_SIZE) -#define KVM_VTLB_BLOCK_SIZE (1UL<<20) -#define VTLB_SHIFT 17 -#define VTLB_SIZE (1UL<vcpu_id) << 24) - -/* - *Delivery mode - */ -#define SAPIC_DELIV_SHIFT 8 -#define SAPIC_FIXED 0x0 -#define SAPIC_LOWEST_PRIORITY 0x1 -#define SAPIC_PMI 0x2 -#define SAPIC_NMI 0x4 -#define SAPIC_INIT 0x5 -#define SAPIC_EXTINT 0x7 - -/* - * vcpu->requests bit members for arch - */ -#define KVM_REQ_PTC_G 32 -#define KVM_REQ_RESUME 33 - -#define KVM_PAGES_PER_HPAGE 1 - -struct kvm; -struct kvm_vcpu; -struct kvm_guest_debug{ -}; - -struct kvm_mmio_req { - uint64_t addr; /* physical address */ - uint64_t size; /* size in bytes */ - uint64_t data; /* data (or paddr of data) */ - uint8_t state:4; - uint8_t dir:1; /* 1=read, 0=write */ -}; - -/*Pal data struct */ -struct kvm_pal_call{ - /*In area*/ - uint64_t gr28; - uint64_t gr29; - uint64_t gr30; - uint64_t gr31; - /*Out area*/ - struct ia64_pal_retval ret; -}; - -/* Sal data structure */ -struct kvm_sal_call{ - /*In area*/ - uint64_t in0; - uint64_t in1; - uint64_t in2; - uint64_t in3; - uint64_t in4; - uint64_t in5; - uint64_t in6; - uint64_t in7; - struct sal_ret_values ret; -}; - -/*Guest change rr6*/ -struct kvm_switch_rr6 { - uint64_t old_rr; - uint64_t new_rr; -}; - -union ia64_ipi_a{ - unsigned long val; - struct { - unsigned long rv : 3; - unsigned long ir : 1; - unsigned long eid : 8; - unsigned long id : 8; - unsigned long ib_base : 44; - }; -}; - -union ia64_ipi_d { - unsigned long val; - struct { - unsigned long vector : 8; - unsigned long dm : 3; - unsigned long ig : 53; - }; -}; - -/*ipi check exit data*/ -struct kvm_ipi_data{ - union ia64_ipi_a addr; - union ia64_ipi_d data; -}; - -/*global purge data*/ -struct kvm_ptc_g { - unsigned long vaddr; - unsigned long rr; - unsigned long ps; - struct kvm_vcpu *vcpu; -}; - -/*Exit control data */ -struct exit_ctl_data{ - uint32_t exit_reason; - uint32_t vm_status; - union { - struct kvm_mmio_req ioreq; - struct kvm_pal_call pal_data; - struct kvm_sal_call sal_data; - struct kvm_switch_rr6 rr_data; - struct kvm_ipi_data ipi_data; - struct kvm_ptc_g ptc_g_data; - } u; -}; - -union pte_flags { - unsigned long val; - struct { - unsigned long p : 1; /*0 */ - unsigned long : 1; /* 1 */ - unsigned long ma : 3; /* 2-4 */ - unsigned long a : 1; /* 5 */ - unsigned long d : 1; /* 6 */ - unsigned long pl : 2; /* 7-8 */ - unsigned long ar : 3; /* 9-11 */ - unsigned long ppn : 38; /* 12-49 */ - unsigned long : 2; /* 50-51 */ - unsigned long ed : 1; /* 52 */ - }; -}; - -union ia64_pta { - unsigned long val; - struct { - unsigned long ve : 1; - unsigned long reserved0 : 1; - unsigned long size : 6; - unsigned long vf : 1; - unsigned long reserved1 : 6; - unsigned long base : 49; - }; -}; - -struct thash_cb { - /* THASH base information */ - struct thash_data *hash; /* hash table pointer */ - union ia64_pta pta; - int num; -}; - -struct kvm_vcpu_stat { -}; - -struct kvm_vcpu_arch { - int launched; - int last_exit; - int last_run_cpu; - int vmm_tr_slot; - int vm_tr_slot; - -#define KVM_MP_STATE_RUNNABLE 0 -#define KVM_MP_STATE_UNINITIALIZED 1 -#define KVM_MP_STATE_INIT_RECEIVED 2 -#define KVM_MP_STATE_HALTED 3 - int mp_state; - -#define MAX_PTC_G_NUM 3 - int ptc_g_count; - struct kvm_ptc_g ptc_g_data[MAX_PTC_G_NUM]; - - /*halt timer to wake up sleepy vcpus*/ - struct hrtimer hlt_timer; - long ht_active; - - struct kvm_lapic *apic; /* kernel irqchip context */ - struct vpd *vpd; - - /* Exit data for vmm_transition*/ - struct exit_ctl_data exit_data; - - cpumask_t cache_coherent_map; - - unsigned long vmm_rr; - unsigned long host_rr6; - unsigned long psbits[8]; - unsigned long cr_iipa; - unsigned long cr_isr; - unsigned long vsa_base; - unsigned long dirty_log_lock_pa; - unsigned long __gp; - /* TR and TC. */ - struct thash_data itrs[NITRS]; - struct thash_data dtrs[NDTRS]; - /* Bit is set if there is a tr/tc for the region. */ - unsigned char itr_regions; - unsigned char dtr_regions; - unsigned char tc_regions; - /* purge all */ - unsigned long ptce_base; - unsigned long ptce_count[2]; - unsigned long ptce_stride[2]; - /* itc/itm */ - unsigned long last_itc; - long itc_offset; - unsigned long itc_check; - unsigned long timer_check; - unsigned long timer_pending; - - unsigned long vrr[8]; - unsigned long ibr[8]; - unsigned long dbr[8]; - unsigned long insvc[4]; /* Interrupt in service. */ - unsigned long xtp; - - unsigned long metaphysical_rr0; /* from kvm_arch (so is pinned) */ - unsigned long metaphysical_rr4; /* from kvm_arch (so is pinned) */ - unsigned long metaphysical_saved_rr0; /* from kvm_arch */ - unsigned long metaphysical_saved_rr4; /* from kvm_arch */ - unsigned long fp_psr; /*used for lazy float register */ - unsigned long saved_gp; - /*for phycial emulation */ - int mode_flags; - struct thash_cb vtlb; - struct thash_cb vhpt; - char irq_check; - char irq_new_pending; - - unsigned long opcode; - unsigned long cause; - union context host; - union context guest; -}; - -struct kvm_vm_stat { - u64 remote_tlb_flush; -}; - -struct kvm_sal_data { - unsigned long boot_ip; - unsigned long boot_gp; -}; - -struct kvm_arch { - unsigned long vm_base; - unsigned long metaphysical_rr0; - unsigned long metaphysical_rr4; - unsigned long vmm_init_rr; - unsigned long vhpt_base; - unsigned long vtlb_base; - unsigned long vpd_base; - spinlock_t dirty_log_lock; - struct kvm_ioapic *vioapic; - struct kvm_vm_stat stat; - struct kvm_sal_data rdv_sal_data; -}; - -union cpuid3_t { - u64 value; - struct { - u64 number : 8; - u64 revision : 8; - u64 model : 8; - u64 family : 8; - u64 archrev : 8; - u64 rv : 24; - }; -}; - -struct kvm_pt_regs { - /* The following registers are saved by SAVE_MIN: */ - unsigned long b6; /* scratch */ - unsigned long b7; /* scratch */ - - unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */ - unsigned long ar_ssd; /* reserved for future use (scratch) */ - - unsigned long r8; /* scratch (return value register 0) */ - unsigned long r9; /* scratch (return value register 1) */ - unsigned long r10; /* scratch (return value register 2) */ - unsigned long r11; /* scratch (return value register 3) */ - - unsigned long cr_ipsr; /* interrupted task's psr */ - unsigned long cr_iip; /* interrupted task's instruction pointer */ - unsigned long cr_ifs; /* interrupted task's function state */ - - unsigned long ar_unat; /* interrupted task's NaT register (preserved) */ - unsigned long ar_pfs; /* prev function state */ - unsigned long ar_rsc; /* RSE configuration */ - /* The following two are valid only if cr_ipsr.cpl > 0: */ - unsigned long ar_rnat; /* RSE NaT */ - unsigned long ar_bspstore; /* RSE bspstore */ - - unsigned long pr; /* 64 predicate registers (1 bit each) */ - unsigned long b0; /* return pointer (bp) */ - unsigned long loadrs; /* size of dirty partition << 16 */ - - unsigned long r1; /* the gp pointer */ - unsigned long r12; /* interrupted task's memory stack pointer */ - unsigned long r13; /* thread pointer */ - - unsigned long ar_fpsr; /* floating point status (preserved) */ - unsigned long r15; /* scratch */ - - /* The remaining registers are NOT saved for system calls. */ - unsigned long r14; /* scratch */ - unsigned long r2; /* scratch */ - unsigned long r3; /* scratch */ - unsigned long r16; /* scratch */ - unsigned long r17; /* scratch */ - unsigned long r18; /* scratch */ - unsigned long r19; /* scratch */ - unsigned long r20; /* scratch */ - unsigned long r21; /* scratch */ - unsigned long r22; /* scratch */ - unsigned long r23; /* scratch */ - unsigned long r24; /* scratch */ - unsigned long r25; /* scratch */ - unsigned long r26; /* scratch */ - unsigned long r27; /* scratch */ - unsigned long r28; /* scratch */ - unsigned long r29; /* scratch */ - unsigned long r30; /* scratch */ - unsigned long r31; /* scratch */ - unsigned long ar_ccv; /* compare/exchange value (scratch) */ - - /* - * Floating point registers that the kernel considers scratch: - */ - struct ia64_fpreg f6; /* scratch */ - struct ia64_fpreg f7; /* scratch */ - struct ia64_fpreg f8; /* scratch */ - struct ia64_fpreg f9; /* scratch */ - struct ia64_fpreg f10; /* scratch */ - struct ia64_fpreg f11; /* scratch */ - - unsigned long r4; /* preserved */ - unsigned long r5; /* preserved */ - unsigned long r6; /* preserved */ - unsigned long r7; /* preserved */ - unsigned long eml_unat; /* used for emulating instruction */ - unsigned long pad0; /* alignment pad */ -}; - -static inline struct kvm_pt_regs *vcpu_regs(struct kvm_vcpu *v) -{ - return (struct kvm_pt_regs *) ((unsigned long) v + IA64_STK_OFFSET) - 1; -} - -typedef int kvm_vmm_entry(void); -typedef void kvm_tramp_entry(union context *host, union context *guest); - -struct kvm_vmm_info{ - struct module *module; - kvm_vmm_entry *vmm_entry; - kvm_tramp_entry *tramp_entry; - unsigned long vmm_ivt; -}; - -int kvm_highest_pending_irq(struct kvm_vcpu *vcpu); -int kvm_emulate_halt(struct kvm_vcpu *vcpu); -int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run); -void kvm_sal_emul(struct kvm_vcpu *vcpu); - -static inline void kvm_inject_nmi(struct kvm_vcpu *vcpu) {} - -#endif diff --git a/include/asm-ia64/kvm_para.h b/include/asm-ia64/kvm_para.h deleted file mode 100644 index 9f9796b..0000000 --- a/include/asm-ia64/kvm_para.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __IA64_KVM_PARA_H -#define __IA64_KVM_PARA_H - -/* - * asm-ia64/kvm_para.h - * - * Copyright (C) 2007 Xiantao Zhang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ - -static inline unsigned int kvm_arch_para_features(void) -{ - return 0; -} - -#endif diff --git a/include/asm-ia64/libata-portmap.h b/include/asm-ia64/libata-portmap.h deleted file mode 100644 index 0e00c9a..0000000 --- a/include/asm-ia64/libata-portmap.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ASM_IA64_LIBATA_PORTMAP_H -#define __ASM_IA64_LIBATA_PORTMAP_H - -#define ATA_PRIMARY_CMD 0x1F0 -#define ATA_PRIMARY_CTL 0x3F6 -#define ATA_PRIMARY_IRQ(dev) isa_irq_to_vector(14) - -#define ATA_SECONDARY_CMD 0x170 -#define ATA_SECONDARY_CTL 0x376 -#define ATA_SECONDARY_IRQ(dev) isa_irq_to_vector(15) - -#endif diff --git a/include/asm-ia64/linkage.h b/include/asm-ia64/linkage.h deleted file mode 100644 index ef22a45..0000000 --- a/include/asm-ia64/linkage.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -#ifndef __ASSEMBLY__ - -#define asmlinkage CPP_ASMLINKAGE __attribute__((syscall_linkage)) - -#else - -#include - -#endif - -#endif diff --git a/include/asm-ia64/local.h b/include/asm-ia64/local.h deleted file mode 100644 index c11c530..0000000 --- a/include/asm-ia64/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h deleted file mode 100644 index a6d50c7..0000000 --- a/include/asm-ia64/machvec.h +++ /dev/null @@ -1,460 +0,0 @@ -/* - * Machine vector for IA-64. - * - * Copyright (C) 1999 Silicon Graphics, Inc. - * Copyright (C) Srinivasa Thirumalachar - * Copyright (C) Vijay Chander - * Copyright (C) 1999-2001, 2003-2004 Hewlett-Packard Co. - * David Mosberger-Tang - */ -#ifndef _ASM_IA64_MACHVEC_H -#define _ASM_IA64_MACHVEC_H - -#include - -/* forward declarations: */ -struct device; -struct pt_regs; -struct scatterlist; -struct page; -struct mm_struct; -struct pci_bus; -struct task_struct; -struct pci_dev; -struct msi_desc; -struct dma_attrs; - -typedef void ia64_mv_setup_t (char **); -typedef void ia64_mv_cpu_init_t (void); -typedef void ia64_mv_irq_init_t (void); -typedef void ia64_mv_send_ipi_t (int, int, int, int); -typedef void ia64_mv_timer_interrupt_t (int, void *); -typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long); -typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *); -typedef u8 ia64_mv_irq_to_vector (int); -typedef unsigned int ia64_mv_local_vector_to_irq (u8); -typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *); -typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val, - u8 size); -typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val, - u8 size); -typedef void ia64_mv_migrate_t(struct task_struct * task); -typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *); -typedef void ia64_mv_kernel_launch_event_t(void); - -/* DMA-mapping interface: */ -typedef void ia64_mv_dma_init (void); -typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t); -typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t); -typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int); -typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int); -typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int); -typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int); -typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int); -typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int); -typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int); -typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int); -typedef int ia64_mv_dma_mapping_error(struct device *, dma_addr_t dma_addr); -typedef int ia64_mv_dma_supported (struct device *, u64); - -typedef dma_addr_t ia64_mv_dma_map_single_attrs (struct device *, void *, size_t, int, struct dma_attrs *); -typedef void ia64_mv_dma_unmap_single_attrs (struct device *, dma_addr_t, size_t, int, struct dma_attrs *); -typedef int ia64_mv_dma_map_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *); -typedef void ia64_mv_dma_unmap_sg_attrs (struct device *, struct scatterlist *, int, int, struct dma_attrs *); - -/* - * WARNING: The legacy I/O space is _architected_. Platforms are - * expected to follow this architected model (see Section 10.7 in the - * IA-64 Architecture Software Developer's Manual). Unfortunately, - * some broken machines do not follow that model, which is why we have - * to make the inX/outX operations part of the machine vector. - * Platform designers should follow the architected model whenever - * possible. - */ -typedef unsigned int ia64_mv_inb_t (unsigned long); -typedef unsigned int ia64_mv_inw_t (unsigned long); -typedef unsigned int ia64_mv_inl_t (unsigned long); -typedef void ia64_mv_outb_t (unsigned char, unsigned long); -typedef void ia64_mv_outw_t (unsigned short, unsigned long); -typedef void ia64_mv_outl_t (unsigned int, unsigned long); -typedef void ia64_mv_mmiowb_t (void); -typedef unsigned char ia64_mv_readb_t (const volatile void __iomem *); -typedef unsigned short ia64_mv_readw_t (const volatile void __iomem *); -typedef unsigned int ia64_mv_readl_t (const volatile void __iomem *); -typedef unsigned long ia64_mv_readq_t (const volatile void __iomem *); -typedef unsigned char ia64_mv_readb_relaxed_t (const volatile void __iomem *); -typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *); -typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *); -typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *); - -typedef int ia64_mv_setup_msi_irq_t (struct pci_dev *pdev, struct msi_desc *); -typedef void ia64_mv_teardown_msi_irq_t (unsigned int irq); - -static inline void -machvec_noop (void) -{ -} - -static inline void -machvec_noop_mm (struct mm_struct *mm) -{ -} - -static inline void -machvec_noop_task (struct task_struct *task) -{ -} - -static inline void -machvec_noop_bus (struct pci_bus *bus) -{ -} - -extern void machvec_setup (char **); -extern void machvec_timer_interrupt (int, void *); -extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int); -extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int); -extern void machvec_tlb_migrate_finish (struct mm_struct *); - -# if defined (CONFIG_IA64_HP_SIM) -# include -# elif defined (CONFIG_IA64_DIG) -# include -# elif defined (CONFIG_IA64_HP_ZX1) -# include -# elif defined (CONFIG_IA64_HP_ZX1_SWIOTLB) -# include -# elif defined (CONFIG_IA64_SGI_SN2) -# include -# elif defined (CONFIG_IA64_SGI_UV) -# include -# elif defined (CONFIG_IA64_GENERIC) - -# ifdef MACHVEC_PLATFORM_HEADER -# include MACHVEC_PLATFORM_HEADER -# else -# define platform_name ia64_mv.name -# define platform_setup ia64_mv.setup -# define platform_cpu_init ia64_mv.cpu_init -# define platform_irq_init ia64_mv.irq_init -# define platform_send_ipi ia64_mv.send_ipi -# define platform_timer_interrupt ia64_mv.timer_interrupt -# define platform_global_tlb_purge ia64_mv.global_tlb_purge -# define platform_tlb_migrate_finish ia64_mv.tlb_migrate_finish -# define platform_dma_init ia64_mv.dma_init -# define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent -# define platform_dma_free_coherent ia64_mv.dma_free_coherent -# define platform_dma_map_single_attrs ia64_mv.dma_map_single_attrs -# define platform_dma_unmap_single_attrs ia64_mv.dma_unmap_single_attrs -# define platform_dma_map_sg_attrs ia64_mv.dma_map_sg_attrs -# define platform_dma_unmap_sg_attrs ia64_mv.dma_unmap_sg_attrs -# define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu -# define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu -# define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device -# define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device -# define platform_dma_mapping_error ia64_mv.dma_mapping_error -# define platform_dma_supported ia64_mv.dma_supported -# define platform_irq_to_vector ia64_mv.irq_to_vector -# define platform_local_vector_to_irq ia64_mv.local_vector_to_irq -# define platform_pci_get_legacy_mem ia64_mv.pci_get_legacy_mem -# define platform_pci_legacy_read ia64_mv.pci_legacy_read -# define platform_pci_legacy_write ia64_mv.pci_legacy_write -# define platform_inb ia64_mv.inb -# define platform_inw ia64_mv.inw -# define platform_inl ia64_mv.inl -# define platform_outb ia64_mv.outb -# define platform_outw ia64_mv.outw -# define platform_outl ia64_mv.outl -# define platform_mmiowb ia64_mv.mmiowb -# define platform_readb ia64_mv.readb -# define platform_readw ia64_mv.readw -# define platform_readl ia64_mv.readl -# define platform_readq ia64_mv.readq -# define platform_readb_relaxed ia64_mv.readb_relaxed -# define platform_readw_relaxed ia64_mv.readw_relaxed -# define platform_readl_relaxed ia64_mv.readl_relaxed -# define platform_readq_relaxed ia64_mv.readq_relaxed -# define platform_migrate ia64_mv.migrate -# define platform_setup_msi_irq ia64_mv.setup_msi_irq -# define platform_teardown_msi_irq ia64_mv.teardown_msi_irq -# define platform_pci_fixup_bus ia64_mv.pci_fixup_bus -# define platform_kernel_launch_event ia64_mv.kernel_launch_event -# endif - -/* __attribute__((__aligned__(16))) is required to make size of the - * structure multiple of 16 bytes. - * This will fillup the holes created because of section 3.3.1 in - * Software Conventions guide. - */ -struct ia64_machine_vector { - const char *name; - ia64_mv_setup_t *setup; - ia64_mv_cpu_init_t *cpu_init; - ia64_mv_irq_init_t *irq_init; - ia64_mv_send_ipi_t *send_ipi; - ia64_mv_timer_interrupt_t *timer_interrupt; - ia64_mv_global_tlb_purge_t *global_tlb_purge; - ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish; - ia64_mv_dma_init *dma_init; - ia64_mv_dma_alloc_coherent *dma_alloc_coherent; - ia64_mv_dma_free_coherent *dma_free_coherent; - ia64_mv_dma_map_single_attrs *dma_map_single_attrs; - ia64_mv_dma_unmap_single_attrs *dma_unmap_single_attrs; - ia64_mv_dma_map_sg_attrs *dma_map_sg_attrs; - ia64_mv_dma_unmap_sg_attrs *dma_unmap_sg_attrs; - ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu; - ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu; - ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device; - ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device; - ia64_mv_dma_mapping_error *dma_mapping_error; - ia64_mv_dma_supported *dma_supported; - ia64_mv_irq_to_vector *irq_to_vector; - ia64_mv_local_vector_to_irq *local_vector_to_irq; - ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem; - ia64_mv_pci_legacy_read_t *pci_legacy_read; - ia64_mv_pci_legacy_write_t *pci_legacy_write; - ia64_mv_inb_t *inb; - ia64_mv_inw_t *inw; - ia64_mv_inl_t *inl; - ia64_mv_outb_t *outb; - ia64_mv_outw_t *outw; - ia64_mv_outl_t *outl; - ia64_mv_mmiowb_t *mmiowb; - ia64_mv_readb_t *readb; - ia64_mv_readw_t *readw; - ia64_mv_readl_t *readl; - ia64_mv_readq_t *readq; - ia64_mv_readb_relaxed_t *readb_relaxed; - ia64_mv_readw_relaxed_t *readw_relaxed; - ia64_mv_readl_relaxed_t *readl_relaxed; - ia64_mv_readq_relaxed_t *readq_relaxed; - ia64_mv_migrate_t *migrate; - ia64_mv_setup_msi_irq_t *setup_msi_irq; - ia64_mv_teardown_msi_irq_t *teardown_msi_irq; - ia64_mv_pci_fixup_bus_t *pci_fixup_bus; - ia64_mv_kernel_launch_event_t *kernel_launch_event; -} __attribute__((__aligned__(16))); /* align attrib? see above comment */ - -#define MACHVEC_INIT(name) \ -{ \ - #name, \ - platform_setup, \ - platform_cpu_init, \ - platform_irq_init, \ - platform_send_ipi, \ - platform_timer_interrupt, \ - platform_global_tlb_purge, \ - platform_tlb_migrate_finish, \ - platform_dma_init, \ - platform_dma_alloc_coherent, \ - platform_dma_free_coherent, \ - platform_dma_map_single_attrs, \ - platform_dma_unmap_single_attrs, \ - platform_dma_map_sg_attrs, \ - platform_dma_unmap_sg_attrs, \ - platform_dma_sync_single_for_cpu, \ - platform_dma_sync_sg_for_cpu, \ - platform_dma_sync_single_for_device, \ - platform_dma_sync_sg_for_device, \ - platform_dma_mapping_error, \ - platform_dma_supported, \ - platform_irq_to_vector, \ - platform_local_vector_to_irq, \ - platform_pci_get_legacy_mem, \ - platform_pci_legacy_read, \ - platform_pci_legacy_write, \ - platform_inb, \ - platform_inw, \ - platform_inl, \ - platform_outb, \ - platform_outw, \ - platform_outl, \ - platform_mmiowb, \ - platform_readb, \ - platform_readw, \ - platform_readl, \ - platform_readq, \ - platform_readb_relaxed, \ - platform_readw_relaxed, \ - platform_readl_relaxed, \ - platform_readq_relaxed, \ - platform_migrate, \ - platform_setup_msi_irq, \ - platform_teardown_msi_irq, \ - platform_pci_fixup_bus, \ - platform_kernel_launch_event \ -} - -extern struct ia64_machine_vector ia64_mv; -extern void machvec_init (const char *name); -extern void machvec_init_from_cmdline(const char *cmdline); - -# else -# error Unknown configuration. Update asm-ia64/machvec.h. -# endif /* CONFIG_IA64_GENERIC */ - -/* - * Declare default routines which aren't declared anywhere else: - */ -extern ia64_mv_dma_init swiotlb_init; -extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent; -extern ia64_mv_dma_free_coherent swiotlb_free_coherent; -extern ia64_mv_dma_map_single swiotlb_map_single; -extern ia64_mv_dma_map_single_attrs swiotlb_map_single_attrs; -extern ia64_mv_dma_unmap_single swiotlb_unmap_single; -extern ia64_mv_dma_unmap_single_attrs swiotlb_unmap_single_attrs; -extern ia64_mv_dma_map_sg swiotlb_map_sg; -extern ia64_mv_dma_map_sg_attrs swiotlb_map_sg_attrs; -extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg; -extern ia64_mv_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs; -extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu; -extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu; -extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device; -extern ia64_mv_dma_sync_sg_for_device swiotlb_sync_sg_for_device; -extern ia64_mv_dma_mapping_error swiotlb_dma_mapping_error; -extern ia64_mv_dma_supported swiotlb_dma_supported; - -/* - * Define default versions so we can extend machvec for new platforms without having - * to update the machvec files for all existing platforms. - */ -#ifndef platform_setup -# define platform_setup machvec_setup -#endif -#ifndef platform_cpu_init -# define platform_cpu_init machvec_noop -#endif -#ifndef platform_irq_init -# define platform_irq_init machvec_noop -#endif - -#ifndef platform_send_ipi -# define platform_send_ipi ia64_send_ipi /* default to architected version */ -#endif -#ifndef platform_timer_interrupt -# define platform_timer_interrupt machvec_timer_interrupt -#endif -#ifndef platform_global_tlb_purge -# define platform_global_tlb_purge ia64_global_tlb_purge /* default to architected version */ -#endif -#ifndef platform_tlb_migrate_finish -# define platform_tlb_migrate_finish machvec_noop_mm -#endif -#ifndef platform_kernel_launch_event -# define platform_kernel_launch_event machvec_noop -#endif -#ifndef platform_dma_init -# define platform_dma_init swiotlb_init -#endif -#ifndef platform_dma_alloc_coherent -# define platform_dma_alloc_coherent swiotlb_alloc_coherent -#endif -#ifndef platform_dma_free_coherent -# define platform_dma_free_coherent swiotlb_free_coherent -#endif -#ifndef platform_dma_map_single_attrs -# define platform_dma_map_single_attrs swiotlb_map_single_attrs -#endif -#ifndef platform_dma_unmap_single_attrs -# define platform_dma_unmap_single_attrs swiotlb_unmap_single_attrs -#endif -#ifndef platform_dma_map_sg_attrs -# define platform_dma_map_sg_attrs swiotlb_map_sg_attrs -#endif -#ifndef platform_dma_unmap_sg_attrs -# define platform_dma_unmap_sg_attrs swiotlb_unmap_sg_attrs -#endif -#ifndef platform_dma_sync_single_for_cpu -# define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu -#endif -#ifndef platform_dma_sync_sg_for_cpu -# define platform_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu -#endif -#ifndef platform_dma_sync_single_for_device -# define platform_dma_sync_single_for_device swiotlb_sync_single_for_device -#endif -#ifndef platform_dma_sync_sg_for_device -# define platform_dma_sync_sg_for_device swiotlb_sync_sg_for_device -#endif -#ifndef platform_dma_mapping_error -# define platform_dma_mapping_error swiotlb_dma_mapping_error -#endif -#ifndef platform_dma_supported -# define platform_dma_supported swiotlb_dma_supported -#endif -#ifndef platform_irq_to_vector -# define platform_irq_to_vector __ia64_irq_to_vector -#endif -#ifndef platform_local_vector_to_irq -# define platform_local_vector_to_irq __ia64_local_vector_to_irq -#endif -#ifndef platform_pci_get_legacy_mem -# define platform_pci_get_legacy_mem ia64_pci_get_legacy_mem -#endif -#ifndef platform_pci_legacy_read -# define platform_pci_legacy_read ia64_pci_legacy_read -extern int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size); -#endif -#ifndef platform_pci_legacy_write -# define platform_pci_legacy_write ia64_pci_legacy_write -extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size); -#endif -#ifndef platform_inb -# define platform_inb __ia64_inb -#endif -#ifndef platform_inw -# define platform_inw __ia64_inw -#endif -#ifndef platform_inl -# define platform_inl __ia64_inl -#endif -#ifndef platform_outb -# define platform_outb __ia64_outb -#endif -#ifndef platform_outw -# define platform_outw __ia64_outw -#endif -#ifndef platform_outl -# define platform_outl __ia64_outl -#endif -#ifndef platform_mmiowb -# define platform_mmiowb __ia64_mmiowb -#endif -#ifndef platform_readb -# define platform_readb __ia64_readb -#endif -#ifndef platform_readw -# define platform_readw __ia64_readw -#endif -#ifndef platform_readl -# define platform_readl __ia64_readl -#endif -#ifndef platform_readq -# define platform_readq __ia64_readq -#endif -#ifndef platform_readb_relaxed -# define platform_readb_relaxed __ia64_readb_relaxed -#endif -#ifndef platform_readw_relaxed -# define platform_readw_relaxed __ia64_readw_relaxed -#endif -#ifndef platform_readl_relaxed -# define platform_readl_relaxed __ia64_readl_relaxed -#endif -#ifndef platform_readq_relaxed -# define platform_readq_relaxed __ia64_readq_relaxed -#endif -#ifndef platform_migrate -# define platform_migrate machvec_noop_task -#endif -#ifndef platform_setup_msi_irq -# define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL) -#endif -#ifndef platform_teardown_msi_irq -# define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) -#endif -#ifndef platform_pci_fixup_bus -# define platform_pci_fixup_bus machvec_noop_bus -#endif - -#endif /* _ASM_IA64_MACHVEC_H */ diff --git a/include/asm-ia64/machvec_dig.h b/include/asm-ia64/machvec_dig.h deleted file mode 100644 index 8a0752f..0000000 --- a/include/asm-ia64/machvec_dig.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASM_IA64_MACHVEC_DIG_h -#define _ASM_IA64_MACHVEC_DIG_h - -extern ia64_mv_setup_t dig_setup; - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "dig" -#define platform_setup dig_setup - -#endif /* _ASM_IA64_MACHVEC_DIG_h */ diff --git a/include/asm-ia64/machvec_hpsim.h b/include/asm-ia64/machvec_hpsim.h deleted file mode 100644 index cf72fc8..0000000 --- a/include/asm-ia64/machvec_hpsim.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _ASM_IA64_MACHVEC_HPSIM_h -#define _ASM_IA64_MACHVEC_HPSIM_h - -extern ia64_mv_setup_t hpsim_setup; -extern ia64_mv_irq_init_t hpsim_irq_init; - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "hpsim" -#define platform_setup hpsim_setup -#define platform_irq_init hpsim_irq_init - -#endif /* _ASM_IA64_MACHVEC_HPSIM_h */ diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h deleted file mode 100644 index 2f57f51..0000000 --- a/include/asm-ia64/machvec_hpzx1.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef _ASM_IA64_MACHVEC_HPZX1_h -#define _ASM_IA64_MACHVEC_HPZX1_h - -extern ia64_mv_setup_t dig_setup; -extern ia64_mv_dma_alloc_coherent sba_alloc_coherent; -extern ia64_mv_dma_free_coherent sba_free_coherent; -extern ia64_mv_dma_map_single_attrs sba_map_single_attrs; -extern ia64_mv_dma_unmap_single_attrs sba_unmap_single_attrs; -extern ia64_mv_dma_map_sg_attrs sba_map_sg_attrs; -extern ia64_mv_dma_unmap_sg_attrs sba_unmap_sg_attrs; -extern ia64_mv_dma_supported sba_dma_supported; -extern ia64_mv_dma_mapping_error sba_dma_mapping_error; - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "hpzx1" -#define platform_setup dig_setup -#define platform_dma_init machvec_noop -#define platform_dma_alloc_coherent sba_alloc_coherent -#define platform_dma_free_coherent sba_free_coherent -#define platform_dma_map_single_attrs sba_map_single_attrs -#define platform_dma_unmap_single_attrs sba_unmap_single_attrs -#define platform_dma_map_sg_attrs sba_map_sg_attrs -#define platform_dma_unmap_sg_attrs sba_unmap_sg_attrs -#define platform_dma_sync_single_for_cpu machvec_dma_sync_single -#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg -#define platform_dma_sync_single_for_device machvec_dma_sync_single -#define platform_dma_sync_sg_for_device machvec_dma_sync_sg -#define platform_dma_supported sba_dma_supported -#define platform_dma_mapping_error sba_dma_mapping_error - -#endif /* _ASM_IA64_MACHVEC_HPZX1_h */ diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h deleted file mode 100644 index a842cdd..0000000 --- a/include/asm-ia64/machvec_hpzx1_swiotlb.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h -#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h - -extern ia64_mv_setup_t dig_setup; -extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent; -extern ia64_mv_dma_free_coherent hwsw_free_coherent; -extern ia64_mv_dma_map_single_attrs hwsw_map_single_attrs; -extern ia64_mv_dma_unmap_single_attrs hwsw_unmap_single_attrs; -extern ia64_mv_dma_map_sg_attrs hwsw_map_sg_attrs; -extern ia64_mv_dma_unmap_sg_attrs hwsw_unmap_sg_attrs; -extern ia64_mv_dma_supported hwsw_dma_supported; -extern ia64_mv_dma_mapping_error hwsw_dma_mapping_error; -extern ia64_mv_dma_sync_single_for_cpu hwsw_sync_single_for_cpu; -extern ia64_mv_dma_sync_sg_for_cpu hwsw_sync_sg_for_cpu; -extern ia64_mv_dma_sync_single_for_device hwsw_sync_single_for_device; -extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device; - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "hpzx1_swiotlb" - -#define platform_setup dig_setup -#define platform_dma_init machvec_noop -#define platform_dma_alloc_coherent hwsw_alloc_coherent -#define platform_dma_free_coherent hwsw_free_coherent -#define platform_dma_map_single_attrs hwsw_map_single_attrs -#define platform_dma_unmap_single_attrs hwsw_unmap_single_attrs -#define platform_dma_map_sg_attrs hwsw_map_sg_attrs -#define platform_dma_unmap_sg_attrs hwsw_unmap_sg_attrs -#define platform_dma_supported hwsw_dma_supported -#define platform_dma_mapping_error hwsw_dma_mapping_error -#define platform_dma_sync_single_for_cpu hwsw_sync_single_for_cpu -#define platform_dma_sync_sg_for_cpu hwsw_sync_sg_for_cpu -#define platform_dma_sync_single_for_device hwsw_sync_single_for_device -#define platform_dma_sync_sg_for_device hwsw_sync_sg_for_device - -#endif /* _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h */ diff --git a/include/asm-ia64/machvec_init.h b/include/asm-ia64/machvec_init.h deleted file mode 100644 index 7f21249..0000000 --- a/include/asm-ia64/machvec_init.h +++ /dev/null @@ -1,33 +0,0 @@ -#include - -extern ia64_mv_send_ipi_t ia64_send_ipi; -extern ia64_mv_global_tlb_purge_t ia64_global_tlb_purge; -extern ia64_mv_irq_to_vector __ia64_irq_to_vector; -extern ia64_mv_local_vector_to_irq __ia64_local_vector_to_irq; -extern ia64_mv_pci_get_legacy_mem_t ia64_pci_get_legacy_mem; -extern ia64_mv_pci_legacy_read_t ia64_pci_legacy_read; -extern ia64_mv_pci_legacy_write_t ia64_pci_legacy_write; - -extern ia64_mv_inb_t __ia64_inb; -extern ia64_mv_inw_t __ia64_inw; -extern ia64_mv_inl_t __ia64_inl; -extern ia64_mv_outb_t __ia64_outb; -extern ia64_mv_outw_t __ia64_outw; -extern ia64_mv_outl_t __ia64_outl; -extern ia64_mv_mmiowb_t __ia64_mmiowb; -extern ia64_mv_readb_t __ia64_readb; -extern ia64_mv_readw_t __ia64_readw; -extern ia64_mv_readl_t __ia64_readl; -extern ia64_mv_readq_t __ia64_readq; -extern ia64_mv_readb_t __ia64_readb_relaxed; -extern ia64_mv_readw_t __ia64_readw_relaxed; -extern ia64_mv_readl_t __ia64_readl_relaxed; -extern ia64_mv_readq_t __ia64_readq_relaxed; - -#define MACHVEC_HELPER(name) \ - struct ia64_machine_vector machvec_##name __attribute__ ((unused, __section__ (".machvec"))) \ - = MACHVEC_INIT(name); - -#define MACHVEC_DEFINE(name) MACHVEC_HELPER(name) - -MACHVEC_DEFINE(MACHVEC_PLATFORM_NAME) diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h deleted file mode 100644 index 781308e..0000000 --- a/include/asm-ia64/machvec_sn2.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * Copyright (c) 2002-2003,2006 Silicon Graphics, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it would be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * - * Further, this software is distributed without any warranty that it is - * free of the rightful claim of any third person regarding infringement - * or the like. Any license provided herein, whether implied or - * otherwise, applies only to this software file. Patent licenses, if - * any, provided herein do not apply to combinations of this program with - * other software, or any other product whatsoever. - * - * You should have received a copy of the GNU General Public - * License along with this program; if not, write the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * For further information regarding this notice, see: - * - * http://oss.sgi.com/projects/GenInfo/NoticeExplan - */ - -#ifndef _ASM_IA64_MACHVEC_SN2_H -#define _ASM_IA64_MACHVEC_SN2_H - -extern ia64_mv_setup_t sn_setup; -extern ia64_mv_cpu_init_t sn_cpu_init; -extern ia64_mv_irq_init_t sn_irq_init; -extern ia64_mv_send_ipi_t sn2_send_IPI; -extern ia64_mv_timer_interrupt_t sn_timer_interrupt; -extern ia64_mv_global_tlb_purge_t sn2_global_tlb_purge; -extern ia64_mv_tlb_migrate_finish_t sn_tlb_migrate_finish; -extern ia64_mv_irq_to_vector sn_irq_to_vector; -extern ia64_mv_local_vector_to_irq sn_local_vector_to_irq; -extern ia64_mv_pci_get_legacy_mem_t sn_pci_get_legacy_mem; -extern ia64_mv_pci_legacy_read_t sn_pci_legacy_read; -extern ia64_mv_pci_legacy_write_t sn_pci_legacy_write; -extern ia64_mv_inb_t __sn_inb; -extern ia64_mv_inw_t __sn_inw; -extern ia64_mv_inl_t __sn_inl; -extern ia64_mv_outb_t __sn_outb; -extern ia64_mv_outw_t __sn_outw; -extern ia64_mv_outl_t __sn_outl; -extern ia64_mv_mmiowb_t __sn_mmiowb; -extern ia64_mv_readb_t __sn_readb; -extern ia64_mv_readw_t __sn_readw; -extern ia64_mv_readl_t __sn_readl; -extern ia64_mv_readq_t __sn_readq; -extern ia64_mv_readb_t __sn_readb_relaxed; -extern ia64_mv_readw_t __sn_readw_relaxed; -extern ia64_mv_readl_t __sn_readl_relaxed; -extern ia64_mv_readq_t __sn_readq_relaxed; -extern ia64_mv_dma_alloc_coherent sn_dma_alloc_coherent; -extern ia64_mv_dma_free_coherent sn_dma_free_coherent; -extern ia64_mv_dma_map_single_attrs sn_dma_map_single_attrs; -extern ia64_mv_dma_unmap_single_attrs sn_dma_unmap_single_attrs; -extern ia64_mv_dma_map_sg_attrs sn_dma_map_sg_attrs; -extern ia64_mv_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs; -extern ia64_mv_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu; -extern ia64_mv_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu; -extern ia64_mv_dma_sync_single_for_device sn_dma_sync_single_for_device; -extern ia64_mv_dma_sync_sg_for_device sn_dma_sync_sg_for_device; -extern ia64_mv_dma_mapping_error sn_dma_mapping_error; -extern ia64_mv_dma_supported sn_dma_supported; -extern ia64_mv_migrate_t sn_migrate; -extern ia64_mv_kernel_launch_event_t sn_kernel_launch_event; -extern ia64_mv_setup_msi_irq_t sn_setup_msi_irq; -extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq; -extern ia64_mv_pci_fixup_bus_t sn_pci_fixup_bus; - - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "sn2" -#define platform_setup sn_setup -#define platform_cpu_init sn_cpu_init -#define platform_irq_init sn_irq_init -#define platform_send_ipi sn2_send_IPI -#define platform_timer_interrupt sn_timer_interrupt -#define platform_global_tlb_purge sn2_global_tlb_purge -#define platform_tlb_migrate_finish sn_tlb_migrate_finish -#define platform_pci_fixup sn_pci_fixup -#define platform_inb __sn_inb -#define platform_inw __sn_inw -#define platform_inl __sn_inl -#define platform_outb __sn_outb -#define platform_outw __sn_outw -#define platform_outl __sn_outl -#define platform_mmiowb __sn_mmiowb -#define platform_readb __sn_readb -#define platform_readw __sn_readw -#define platform_readl __sn_readl -#define platform_readq __sn_readq -#define platform_readb_relaxed __sn_readb_relaxed -#define platform_readw_relaxed __sn_readw_relaxed -#define platform_readl_relaxed __sn_readl_relaxed -#define platform_readq_relaxed __sn_readq_relaxed -#define platform_irq_to_vector sn_irq_to_vector -#define platform_local_vector_to_irq sn_local_vector_to_irq -#define platform_pci_get_legacy_mem sn_pci_get_legacy_mem -#define platform_pci_legacy_read sn_pci_legacy_read -#define platform_pci_legacy_write sn_pci_legacy_write -#define platform_dma_init machvec_noop -#define platform_dma_alloc_coherent sn_dma_alloc_coherent -#define platform_dma_free_coherent sn_dma_free_coherent -#define platform_dma_map_single_attrs sn_dma_map_single_attrs -#define platform_dma_unmap_single_attrs sn_dma_unmap_single_attrs -#define platform_dma_map_sg_attrs sn_dma_map_sg_attrs -#define platform_dma_unmap_sg_attrs sn_dma_unmap_sg_attrs -#define platform_dma_sync_single_for_cpu sn_dma_sync_single_for_cpu -#define platform_dma_sync_sg_for_cpu sn_dma_sync_sg_for_cpu -#define platform_dma_sync_single_for_device sn_dma_sync_single_for_device -#define platform_dma_sync_sg_for_device sn_dma_sync_sg_for_device -#define platform_dma_mapping_error sn_dma_mapping_error -#define platform_dma_supported sn_dma_supported -#define platform_migrate sn_migrate -#define platform_kernel_launch_event sn_kernel_launch_event -#ifdef CONFIG_PCI_MSI -#define platform_setup_msi_irq sn_setup_msi_irq -#define platform_teardown_msi_irq sn_teardown_msi_irq -#else -#define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL) -#define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) -#endif -#define platform_pci_fixup_bus sn_pci_fixup_bus - -#include - -#endif /* _ASM_IA64_MACHVEC_SN2_H */ diff --git a/include/asm-ia64/machvec_uv.h b/include/asm-ia64/machvec_uv.h deleted file mode 100644 index 2931447..0000000 --- a/include/asm-ia64/machvec_uv.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI UV Core Functions - * - * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_MACHVEC_UV_H -#define _ASM_IA64_MACHVEC_UV_H - -extern ia64_mv_setup_t uv_setup; - -/* - * This stuff has dual use! - * - * For a generic kernel, the macros are used to initialize the - * platform's machvec structure. When compiling a non-generic kernel, - * the macros are used directly. - */ -#define platform_name "uv" -#define platform_setup uv_setup - -#endif /* _ASM_IA64_MACHVEC_UV_H */ diff --git a/include/asm-ia64/mc146818rtc.h b/include/asm-ia64/mc146818rtc.h deleted file mode 100644 index 407787a2..0000000 --- a/include/asm-ia64/mc146818rtc.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _ASM_IA64_MC146818RTC_H -#define _ASM_IA64_MC146818RTC_H - -/* - * Machine dependent access functions for RTC registers. - */ - -/* empty include file to satisfy the include in genrtc.c */ - -#endif /* _ASM_IA64_MC146818RTC_H */ diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h deleted file mode 100644 index 18a4321..0000000 --- a/include/asm-ia64/mca.h +++ /dev/null @@ -1,179 +0,0 @@ -/* - * File: mca.h - * Purpose: Machine check handling specific defines - * - * Copyright (C) 1999, 2004 Silicon Graphics, Inc. - * Copyright (C) Vijay Chander - * Copyright (C) Srinivasa Thirumalachar - * Copyright (C) Russ Anderson - */ - -#ifndef _ASM_IA64_MCA_H -#define _ASM_IA64_MCA_H - -#if !defined(__ASSEMBLY__) - -#include -#include - -#include -#include -#include -#include - -#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */ - -typedef struct ia64_fptr { - unsigned long fp; - unsigned long gp; -} ia64_fptr_t; - -typedef union cmcv_reg_u { - u64 cmcv_regval; - struct { - u64 cmcr_vector : 8; - u64 cmcr_reserved1 : 4; - u64 cmcr_ignored1 : 1; - u64 cmcr_reserved2 : 3; - u64 cmcr_mask : 1; - u64 cmcr_ignored2 : 47; - } cmcv_reg_s; - -} cmcv_reg_t; - -#define cmcv_mask cmcv_reg_s.cmcr_mask -#define cmcv_vector cmcv_reg_s.cmcr_vector - -enum { - IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0, - IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1, - IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2, - IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3, -}; - -/* Information maintained by the MC infrastructure */ -typedef struct ia64_mc_info_s { - u64 imi_mca_handler; - size_t imi_mca_handler_size; - u64 imi_monarch_init_handler; - size_t imi_monarch_init_handler_size; - u64 imi_slave_init_handler; - size_t imi_slave_init_handler_size; - u8 imi_rendez_checkin[NR_CPUS]; - -} ia64_mc_info_t; - -/* Handover state from SAL to OS and vice versa, for both MCA and INIT events. - * Besides the handover state, it also contains some saved registers from the - * time of the event. - * Note: mca_asm.S depends on the precise layout of this structure. - */ - -struct ia64_sal_os_state { - - /* SAL to OS */ - u64 os_gp; /* GP of the os registered with the SAL, physical */ - u64 pal_proc; /* PAL_PROC entry point, physical */ - u64 sal_proc; /* SAL_PROC entry point, physical */ - u64 rv_rc; /* MCA - Rendezvous state, INIT - reason code */ - u64 proc_state_param; /* from R18 */ - u64 monarch; /* 1 for a monarch event, 0 for a slave */ - - /* common */ - u64 sal_ra; /* Return address in SAL, physical */ - u64 sal_gp; /* GP of the SAL - physical */ - pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */ - /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK). - * Note: if the MCA/INIT recovery code wants to resume to a new context - * then it must change these values to reflect the new kernel stack. - */ - u64 prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */ - u64 prev_IA64_KR_CURRENT_STACK; - struct task_struct *prev_task; /* previous task, NULL if it is not useful */ - /* Some interrupt registers are not saved in minstate, pt_regs or - * switch_stack. Because MCA/INIT can occur when interrupts are - * disabled, we need to save the additional interrupt registers over - * MCA/INIT and resume. - */ - u64 isr; - u64 ifa; - u64 itir; - u64 iipa; - u64 iim; - u64 iha; - - /* OS to SAL */ - u64 os_status; /* OS status to SAL, enum below */ - u64 context; /* 0 if return to same context - 1 if return to new context */ -}; - -enum { - IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */ - IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */ - IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */ - IA64_MCA_HALT = -3 /* System to be halted by SAL */ -}; - -enum { - IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */ - IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */ -}; - -enum { - IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */ - IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */ -}; - -/* Per-CPU MCA state that is too big for normal per-CPU variables. */ - -struct ia64_mca_cpu { - u64 mca_stack[KERNEL_STACK_SIZE/8]; - u64 init_stack[KERNEL_STACK_SIZE/8]; -}; - -/* Array of physical addresses of each CPU's MCA area. */ -extern unsigned long __per_cpu_mca[NR_CPUS]; - -extern int cpe_vector; -extern int ia64_cpe_irq; -extern void ia64_mca_init(void); -extern void ia64_mca_cpu_init(void *); -extern void ia64_os_mca_dispatch(void); -extern void ia64_os_mca_dispatch_end(void); -extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *); -extern void ia64_init_handler(struct pt_regs *, - struct switch_stack *, - struct ia64_sal_os_state *); -extern void ia64_monarch_init_handler(void); -extern void ia64_slave_init_handler(void); -extern void ia64_mca_cmc_vector_setup(void); -extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *)); -extern void ia64_unreg_MCA_extension(void); -extern u64 ia64_get_rnat(u64 *); -extern void ia64_mca_printk(const char * fmt, ...) - __attribute__ ((format (printf, 1, 2))); - -struct ia64_mca_notify_die { - struct ia64_sal_os_state *sos; - int *monarch_cpu; - int *data; -}; - -DECLARE_PER_CPU(u64, ia64_mca_pal_base); - -#else /* __ASSEMBLY__ */ - -#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */ -#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */ -#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */ -#define IA64_MCA_HALT -3 /* System to be halted by SAL */ - -#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */ -#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */ - -#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */ -#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */ - -#endif /* !__ASSEMBLY__ */ -#endif /* _ASM_IA64_MCA_H */ diff --git a/include/asm-ia64/mca_asm.h b/include/asm-ia64/mca_asm.h deleted file mode 100644 index dd2a5b1..0000000 --- a/include/asm-ia64/mca_asm.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * File: mca_asm.h - * Purpose: Machine check handling specific defines - * - * Copyright (C) 1999 Silicon Graphics, Inc. - * Copyright (C) Vijay Chander - * Copyright (C) Srinivasa Thirumalachar - * Copyright (C) 2000 Hewlett-Packard Co. - * Copyright (C) 2000 David Mosberger-Tang - * Copyright (C) 2002 Intel Corp. - * Copyright (C) 2002 Jenna Hall - * Copyright (C) 2005 Silicon Graphics, Inc - * Copyright (C) 2005 Keith Owens - */ -#ifndef _ASM_IA64_MCA_ASM_H -#define _ASM_IA64_MCA_ASM_H - -#define PSR_IC 13 -#define PSR_I 14 -#define PSR_DT 17 -#define PSR_RT 27 -#define PSR_MC 35 -#define PSR_IT 36 -#define PSR_BN 44 - -/* - * This macro converts a instruction virtual address to a physical address - * Right now for simulation purposes the virtual addresses are - * direct mapped to physical addresses. - * 1. Lop off bits 61 thru 63 in the virtual address - */ -#define INST_VA_TO_PA(addr) \ - dep addr = 0, addr, 61, 3 -/* - * This macro converts a data virtual address to a physical address - * Right now for simulation purposes the virtual addresses are - * direct mapped to physical addresses. - * 1. Lop off bits 61 thru 63 in the virtual address - */ -#define DATA_VA_TO_PA(addr) \ - tpa addr = addr -/* - * This macro converts a data physical address to a virtual address - * Right now for simulation purposes the virtual addresses are - * direct mapped to physical addresses. - * 1. Put 0x7 in bits 61 thru 63. - */ -#define DATA_PA_TO_VA(addr,temp) \ - mov temp = 0x7 ;; \ - dep addr = temp, addr, 61, 3 - -#define GET_THIS_PADDR(reg, var) \ - mov reg = IA64_KR(PER_CPU_DATA);; \ - addl reg = THIS_CPU(var), reg - -/* - * This macro jumps to the instruction at the given virtual address - * and starts execution in physical mode with all the address - * translations turned off. - * 1. Save the current psr - * 2. Make sure that all the upper 32 bits are off - * - * 3. Clear the interrupt enable and interrupt state collection bits - * in the psr before updating the ipsr and iip. - * - * 4. Turn off the instruction, data and rse translation bits of the psr - * and store the new value into ipsr - * Also make sure that the interrupts are disabled. - * Ensure that we are in little endian mode. - * [psr.{rt, it, dt, i, be} = 0] - * - * 5. Get the physical address corresponding to the virtual address - * of the next instruction bundle and put it in iip. - * (Using magic numbers 24 and 40 in the deposint instruction since - * the IA64_SDK code directly maps to lower 24bits as physical address - * from a virtual address). - * - * 6. Do an rfi to move the values from ipsr to psr and iip to ip. - */ -#define PHYSICAL_MODE_ENTER(temp1, temp2, start_addr, old_psr) \ - mov old_psr = psr; \ - ;; \ - dep old_psr = 0, old_psr, 32, 32; \ - \ - mov ar.rsc = 0 ; \ - ;; \ - srlz.d; \ - mov temp2 = ar.bspstore; \ - ;; \ - DATA_VA_TO_PA(temp2); \ - ;; \ - mov temp1 = ar.rnat; \ - ;; \ - mov ar.bspstore = temp2; \ - ;; \ - mov ar.rnat = temp1; \ - mov temp1 = psr; \ - mov temp2 = psr; \ - ;; \ - \ - dep temp2 = 0, temp2, PSR_IC, 2; \ - ;; \ - mov psr.l = temp2; \ - ;; \ - srlz.d; \ - dep temp1 = 0, temp1, 32, 32; \ - ;; \ - dep temp1 = 0, temp1, PSR_IT, 1; \ - ;; \ - dep temp1 = 0, temp1, PSR_DT, 1; \ - ;; \ - dep temp1 = 0, temp1, PSR_RT, 1; \ - ;; \ - dep temp1 = 0, temp1, PSR_I, 1; \ - ;; \ - dep temp1 = 0, temp1, PSR_IC, 1; \ - ;; \ - dep temp1 = -1, temp1, PSR_MC, 1; \ - ;; \ - mov cr.ipsr = temp1; \ - ;; \ - LOAD_PHYSICAL(p0, temp2, start_addr); \ - ;; \ - mov cr.iip = temp2; \ - mov cr.ifs = r0; \ - DATA_VA_TO_PA(sp); \ - DATA_VA_TO_PA(gp); \ - ;; \ - srlz.i; \ - ;; \ - nop 1; \ - nop 2; \ - nop 1; \ - nop 2; \ - rfi; \ - ;; - -/* - * This macro jumps to the instruction at the given virtual address - * and starts execution in virtual mode with all the address - * translations turned on. - * 1. Get the old saved psr - * - * 2. Clear the interrupt state collection bit in the current psr. - * - * 3. Set the instruction translation bit back in the old psr - * Note we have to do this since we are right now saving only the - * lower 32-bits of old psr.(Also the old psr has the data and - * rse translation bits on) - * - * 4. Set ipsr to this old_psr with "it" bit set and "bn" = 1. - * - * 5. Reset the current thread pointer (r13). - * - * 6. Set iip to the virtual address of the next instruction bundle. - * - * 7. Do an rfi to move ipsr to psr and iip to ip. - */ - -#define VIRTUAL_MODE_ENTER(temp1, temp2, start_addr, old_psr) \ - mov temp2 = psr; \ - ;; \ - mov old_psr = temp2; \ - ;; \ - dep temp2 = 0, temp2, PSR_IC, 2; \ - ;; \ - mov psr.l = temp2; \ - mov ar.rsc = 0; \ - ;; \ - srlz.d; \ - mov r13 = ar.k6; \ - mov temp2 = ar.bspstore; \ - ;; \ - DATA_PA_TO_VA(temp2,temp1); \ - ;; \ - mov temp1 = ar.rnat; \ - ;; \ - mov ar.bspstore = temp2; \ - ;; \ - mov ar.rnat = temp1; \ - ;; \ - mov temp1 = old_psr; \ - ;; \ - mov temp2 = 1; \ - ;; \ - dep temp1 = temp2, temp1, PSR_IC, 1; \ - ;; \ - dep temp1 = temp2, temp1, PSR_IT, 1; \ - ;; \ - dep temp1 = temp2, temp1, PSR_DT, 1; \ - ;; \ - dep temp1 = temp2, temp1, PSR_RT, 1; \ - ;; \ - dep temp1 = temp2, temp1, PSR_BN, 1; \ - ;; \ - \ - mov cr.ipsr = temp1; \ - movl temp2 = start_addr; \ - ;; \ - mov cr.iip = temp2; \ - movl gp = __gp \ - ;; \ - DATA_PA_TO_VA(sp, temp1); \ - srlz.i; \ - ;; \ - nop 1; \ - nop 2; \ - nop 1; \ - rfi \ - ;; - -/* - * The MCA and INIT stacks in struct ia64_mca_cpu look like normal kernel - * stacks, except that the SAL/OS state and a switch_stack are stored near the - * top of the MCA/INIT stack. To support concurrent entry to MCA or INIT, as - * well as MCA over INIT, each event needs its own SAL/OS state. All entries - * are 16 byte aligned. - * - * +---------------------------+ - * | pt_regs | - * +---------------------------+ - * | switch_stack | - * +---------------------------+ - * | SAL/OS state | - * +---------------------------+ - * | 16 byte scratch area | - * +---------------------------+ <-------- SP at start of C MCA handler - * | ..... | - * +---------------------------+ - * | RBS for MCA/INIT handler | - * +---------------------------+ - * | struct task for MCA/INIT | - * +---------------------------+ <-------- Bottom of MCA/INIT stack - */ - -#define ALIGN16(x) ((x)&~15) -#define MCA_PT_REGS_OFFSET ALIGN16(KERNEL_STACK_SIZE-IA64_PT_REGS_SIZE) -#define MCA_SWITCH_STACK_OFFSET ALIGN16(MCA_PT_REGS_OFFSET-IA64_SWITCH_STACK_SIZE) -#define MCA_SOS_OFFSET ALIGN16(MCA_SWITCH_STACK_OFFSET-IA64_SAL_OS_STATE_SIZE) -#define MCA_SP_OFFSET ALIGN16(MCA_SOS_OFFSET-16) - -#endif /* _ASM_IA64_MCA_ASM_H */ diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h deleted file mode 100644 index 7245a57..0000000 --- a/include/asm-ia64/meminit.h +++ /dev/null @@ -1,75 +0,0 @@ -#ifndef meminit_h -#define meminit_h - -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ - - -/* - * Entries defined so far: - * - boot param structure itself - * - memory map - * - initrd (optional) - * - command line string - * - kernel code & data - * - crash dumping code reserved region - * - Kernel memory map built from EFI memory map - * - ELF core header - * - * More could be added if necessary - */ -#define IA64_MAX_RSVD_REGIONS 8 - -struct rsvd_region { - unsigned long start; /* virtual address of beginning of element */ - unsigned long end; /* virtual address of end of element + 1 */ -}; - -extern struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1]; -extern int num_rsvd_regions; - -extern void find_memory (void); -extern void reserve_memory (void); -extern void find_initrd (void); -extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg); -extern int filter_memory (unsigned long start, unsigned long end, void *arg); -extern unsigned long efi_memmap_init(unsigned long *s, unsigned long *e); -extern int find_max_min_low_pfn (unsigned long , unsigned long, void *); - -extern unsigned long vmcore_find_descriptor_size(unsigned long address); -extern int reserve_elfcorehdr(unsigned long *start, unsigned long *end); - -/* - * For rounding an address to the next IA64_GRANULE_SIZE or order - */ -#define GRANULEROUNDDOWN(n) ((n) & ~(IA64_GRANULE_SIZE-1)) -#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1)) -#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE< than this */ - extern unsigned long vmalloc_end; - extern struct page *vmem_map; - extern int find_largest_hole (u64 start, u64 end, void *arg); - extern int create_mem_map_page_table (u64 start, u64 end, void *arg); - extern int vmemmap_find_next_valid_pfn(int, int); -#else -static inline int vmemmap_find_next_valid_pfn(int node, int i) -{ - return i + 1; -} -#endif -#endif /* meminit_h */ diff --git a/include/asm-ia64/mman.h b/include/asm-ia64/mman.h deleted file mode 100644 index c73b878..0000000 --- a/include/asm-ia64/mman.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _ASM_IA64_MMAN_H -#define _ASM_IA64_MMAN_H - -/* - * Based on . - * - * Modified 1998-2000, 2002 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -#define MAP_GROWSDOWN 0x00100 /* stack-like segment */ -#define MAP_GROWSUP 0x00200 /* register stack-like segment */ -#define MAP_DENYWRITE 0x00800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x01000 /* mark it as an executable */ -#define MAP_LOCKED 0x02000 /* pages are locked */ -#define MAP_NORESERVE 0x04000 /* don't check for reservations */ -#define MAP_POPULATE 0x08000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#define arch_mmap_check ia64_mmap_check -int ia64_mmap_check(unsigned long addr, unsigned long len, - unsigned long flags); -#endif -#endif - -#endif /* _ASM_IA64_MMAN_H */ diff --git a/include/asm-ia64/mmu.h b/include/asm-ia64/mmu.h deleted file mode 100644 index 611432b..0000000 --- a/include/asm-ia64/mmu.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -/* - * Type for a context number. We declare it volatile to ensure proper - * ordering when it's accessed outside of spinlock'd critical sections - * (e.g., as done in activate_mm() and init_new_context()). - */ -typedef volatile unsigned long mm_context_t; - -typedef unsigned long nv_mm_context_t; - -#endif diff --git a/include/asm-ia64/mmu_context.h b/include/asm-ia64/mmu_context.h deleted file mode 100644 index 040bc87..0000000 --- a/include/asm-ia64/mmu_context.h +++ /dev/null @@ -1,198 +0,0 @@ -#ifndef _ASM_IA64_MMU_CONTEXT_H -#define _ASM_IA64_MMU_CONTEXT_H - -/* - * Copyright (C) 1998-2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - -/* - * Routines to manage the allocation of task context numbers. Task context - * numbers are used to reduce or eliminate the need to perform TLB flushes - * due to context switches. Context numbers are implemented using ia-64 - * region ids. Since the IA-64 TLB does not consider the region number when - * performing a TLB lookup, we need to assign a unique region id to each - * region in a process. We use the least significant three bits in aregion - * id for this purpose. - */ - -#define IA64_REGION_ID_KERNEL 0 /* the kernel's region id (tlb.c depends on this being 0) */ - -#define ia64_rid(ctx,addr) (((ctx) << 3) | (addr >> 61)) - -# include -# ifndef __ASSEMBLY__ - -#include -#include -#include -#include - -#include -#include - -struct ia64_ctx { - spinlock_t lock; - unsigned int next; /* next context number to use */ - unsigned int limit; /* available free range */ - unsigned int max_ctx; /* max. context value supported by all CPUs */ - /* call wrap_mmu_context when next >= max */ - unsigned long *bitmap; /* bitmap size is max_ctx+1 */ - unsigned long *flushmap;/* pending rid to be flushed */ -}; - -extern struct ia64_ctx ia64_ctx; -DECLARE_PER_CPU(u8, ia64_need_tlb_flush); - -extern void mmu_context_init (void); -extern void wrap_mmu_context (struct mm_struct *mm); - -static inline void -enter_lazy_tlb (struct mm_struct *mm, struct task_struct *tsk) -{ -} - -/* - * When the context counter wraps around all TLBs need to be flushed because - * an old context number might have been reused. This is signalled by the - * ia64_need_tlb_flush per-CPU variable, which is checked in the routine - * below. Called by activate_mm(). - */ -static inline void -delayed_tlb_flush (void) -{ - extern void local_flush_tlb_all (void); - unsigned long flags; - - if (unlikely(__ia64_per_cpu_var(ia64_need_tlb_flush))) { - spin_lock_irqsave(&ia64_ctx.lock, flags); - if (__ia64_per_cpu_var(ia64_need_tlb_flush)) { - local_flush_tlb_all(); - __ia64_per_cpu_var(ia64_need_tlb_flush) = 0; - } - spin_unlock_irqrestore(&ia64_ctx.lock, flags); - } -} - -static inline nv_mm_context_t -get_mmu_context (struct mm_struct *mm) -{ - unsigned long flags; - nv_mm_context_t context = mm->context; - - if (likely(context)) - goto out; - - spin_lock_irqsave(&ia64_ctx.lock, flags); - /* re-check, now that we've got the lock: */ - context = mm->context; - if (context == 0) { - cpus_clear(mm->cpu_vm_mask); - if (ia64_ctx.next >= ia64_ctx.limit) { - ia64_ctx.next = find_next_zero_bit(ia64_ctx.bitmap, - ia64_ctx.max_ctx, ia64_ctx.next); - ia64_ctx.limit = find_next_bit(ia64_ctx.bitmap, - ia64_ctx.max_ctx, ia64_ctx.next); - if (ia64_ctx.next >= ia64_ctx.max_ctx) - wrap_mmu_context(mm); - } - mm->context = context = ia64_ctx.next++; - __set_bit(context, ia64_ctx.bitmap); - } - spin_unlock_irqrestore(&ia64_ctx.lock, flags); -out: - /* - * Ensure we're not starting to use "context" before any old - * uses of it are gone from our TLB. - */ - delayed_tlb_flush(); - - return context; -} - -/* - * Initialize context number to some sane value. MM is guaranteed to be a - * brand-new address-space, so no TLB flushing is needed, ever. - */ -static inline int -init_new_context (struct task_struct *p, struct mm_struct *mm) -{ - mm->context = 0; - return 0; -} - -static inline void -destroy_context (struct mm_struct *mm) -{ - /* Nothing to do. */ -} - -static inline void -reload_context (nv_mm_context_t context) -{ - unsigned long rid; - unsigned long rid_incr = 0; - unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4; - - old_rr4 = ia64_get_rr(RGN_BASE(RGN_HPAGE)); - rid = context << 3; /* make space for encoding the region number */ - rid_incr = 1 << 8; - - /* encode the region id, preferred page size, and VHPT enable bit: */ - rr0 = (rid << 8) | (PAGE_SHIFT << 2) | 1; - rr1 = rr0 + 1*rid_incr; - rr2 = rr0 + 2*rid_incr; - rr3 = rr0 + 3*rid_incr; - rr4 = rr0 + 4*rid_incr; -#ifdef CONFIG_HUGETLB_PAGE - rr4 = (rr4 & (~(0xfcUL))) | (old_rr4 & 0xfc); - -# if RGN_HPAGE != 4 -# error "reload_context assumes RGN_HPAGE is 4" -# endif -#endif - - ia64_set_rr0_to_rr4(rr0, rr1, rr2, rr3, rr4); - ia64_srlz_i(); /* srlz.i implies srlz.d */ -} - -/* - * Must be called with preemption off - */ -static inline void -activate_context (struct mm_struct *mm) -{ - nv_mm_context_t context; - - do { - context = get_mmu_context(mm); - if (!cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) - cpu_set(smp_processor_id(), mm->cpu_vm_mask); - reload_context(context); - /* - * in the unlikely event of a TLB-flush by another thread, - * redo the load. - */ - } while (unlikely(context != mm->context)); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* - * Switch from address space PREV to address space NEXT. - */ -static inline void -activate_mm (struct mm_struct *prev, struct mm_struct *next) -{ - /* - * We may get interrupts here, but that's OK because interrupt - * handlers cannot touch user-space. - */ - ia64_set_kr(IA64_KR_PT_BASE, __pa(next->pgd)); - activate_context(next); -} - -#define switch_mm(prev_mm,next_mm,next_task) activate_mm(prev_mm, next_mm) - -# endif /* ! __ASSEMBLY__ */ -#endif /* _ASM_IA64_MMU_CONTEXT_H */ diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h deleted file mode 100644 index 34efe88..0000000 --- a/include/asm-ia64/mmzone.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2000,2003 Silicon Graphics, Inc. All rights reserved. - * Copyright (c) 2002 NEC Corp. - * Copyright (c) 2002 Erich Focht - * Copyright (c) 2002 Kimio Suganuma - */ -#ifndef _ASM_IA64_MMZONE_H -#define _ASM_IA64_MMZONE_H - -#include -#include -#include - -#ifdef CONFIG_NUMA - -static inline int pfn_to_nid(unsigned long pfn) -{ -#ifdef CONFIG_NUMA - extern int paddr_to_nid(unsigned long); - int nid = paddr_to_nid(pfn << PAGE_SHIFT); - if (nid < 0) - return 0; - else - return nid; -#else - return 0; -#endif -} - -#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID -extern int early_pfn_to_nid(unsigned long pfn); -#endif - -#ifdef CONFIG_IA64_DIG /* DIG systems are small */ -# define MAX_PHYSNODE_ID 8 -# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8) -#else /* sn2 is the biggest case, so we use that if !DIG */ -# define MAX_PHYSNODE_ID 2048 -# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) -#endif - -#else /* CONFIG_NUMA */ -# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4) -#endif /* CONFIG_NUMA */ - -#endif /* _ASM_IA64_MMZONE_H */ diff --git a/include/asm-ia64/module.h b/include/asm-ia64/module.h deleted file mode 100644 index d2da61e..0000000 --- a/include/asm-ia64/module.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _ASM_IA64_MODULE_H -#define _ASM_IA64_MODULE_H - -/* - * IA-64-specific support for kernel module loader. - * - * Copyright (C) 2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -struct elf64_shdr; /* forward declration */ - -struct mod_arch_specific { - struct elf64_shdr *core_plt; /* core PLT section */ - struct elf64_shdr *init_plt; /* init PLT section */ - struct elf64_shdr *got; /* global offset table */ - struct elf64_shdr *opd; /* official procedure descriptors */ - struct elf64_shdr *unwind; /* unwind-table section */ - unsigned long gp; /* global-pointer for module */ - - void *core_unw_table; /* core unwind-table cookie returned by unwinder */ - void *init_unw_table; /* init unwind-table cookie returned by unwinder */ - unsigned int next_got_entry; /* index of next available got entry */ -}; - -#define Elf_Shdr Elf64_Shdr -#define Elf_Sym Elf64_Sym -#define Elf_Ehdr Elf64_Ehdr - -#define MODULE_PROC_FAMILY "ia64" -#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY \ - "gcc-" __stringify(__GNUC__) "." __stringify(__GNUC_MINOR__) - -#define ARCH_SHF_SMALL SHF_IA_64_SHORT - -#endif /* _ASM_IA64_MODULE_H */ diff --git a/include/asm-ia64/msgbuf.h b/include/asm-ia64/msgbuf.h deleted file mode 100644 index 6c64c0d..0000000 --- a/include/asm-ia64/msgbuf.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _ASM_IA64_MSGBUF_H -#define _ASM_IA64_MSGBUF_H - -/* - * The msqid64_ds structure for IA-64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 2 miscellaneous 64-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ - __kernel_time_t msg_rtime; /* last msgrcv time */ - __kernel_time_t msg_ctime; /* last change time */ - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* _ASM_IA64_MSGBUF_H */ diff --git a/include/asm-ia64/mutex.h b/include/asm-ia64/mutex.h deleted file mode 100644 index bed73a6..0000000 --- a/include/asm-ia64/mutex.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * ia64 implementation of the mutex fastpath. - * - * Copyright (C) 2006 Ken Chen - * - */ - -#ifndef _ASM_MUTEX_H -#define _ASM_MUTEX_H - -/** - * __mutex_fastpath_lock - try to take the lock by moving the count - * from 1 to a 0 value - * @count: pointer of type atomic_t - * @fail_fn: function to call if the original value was not 1 - * - * Change the count from 1 to a value lower than 1, and call if - * it wasn't 1 originally. This function MUST leave the value lower than - * 1 even when the "1" assertion wasn't true. - */ -static inline void -__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *)) -{ - if (unlikely(ia64_fetchadd4_acq(count, -1) != 1)) - fail_fn(count); -} - -/** - * __mutex_fastpath_lock_retval - try to take the lock by moving the count - * from 1 to a 0 value - * @count: pointer of type atomic_t - * @fail_fn: function to call if the original value was not 1 - * - * Change the count from 1 to a value lower than 1, and call if - * it wasn't 1 originally. This function returns 0 if the fastpath succeeds, - * or anything the slow path function returns. - */ -static inline int -__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) -{ - if (unlikely(ia64_fetchadd4_acq(count, -1) != 1)) - return fail_fn(count); - return 0; -} - -/** - * __mutex_fastpath_unlock - try to promote the count from 0 to 1 - * @count: pointer of type atomic_t - * @fail_fn: function to call if the original value was not 0 - * - * Try to promote the count from 0 to 1. If it wasn't 0, call . - * In the failure case, this function is allowed to either set the value to - * 1, or to set it to a value lower than 1. - * - * If the implementation sets it to a value of lower than 1, then the - * __mutex_slowpath_needs_to_unlock() macro needs to return 1, it needs - * to return 0 otherwise. - */ -static inline void -__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) -{ - int ret = ia64_fetchadd4_rel(count, 1); - if (unlikely(ret < 0)) - fail_fn(count); -} - -#define __mutex_slowpath_needs_to_unlock() 1 - -/** - * __mutex_fastpath_trylock - try to acquire the mutex, without waiting - * - * @count: pointer of type atomic_t - * @fail_fn: fallback function - * - * Change the count from 1 to a value lower than 1, and return 0 (failure) - * if it wasn't 1 originally, or return 1 (success) otherwise. This function - * MUST leave the value lower than 1 even when the "1" assertion wasn't true. - * Additionally, if the value was < 0 originally, this function must not leave - * it to 0 on failure. - * - * If the architecture has no effective trylock variant, it should call the - * spinlock-based trylock variant unconditionally. - */ -static inline int -__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *)) -{ - if (cmpxchg_acq(count, 1, 0) == 1) - return 1; - return 0; -} - -#endif diff --git a/include/asm-ia64/native/inst.h b/include/asm-ia64/native/inst.h deleted file mode 100644 index c953a2c..0000000 --- a/include/asm-ia64/native/inst.h +++ /dev/null @@ -1,175 +0,0 @@ -/****************************************************************************** - * include/asm-ia64/native/inst.h - * - * Copyright (c) 2008 Isaku Yamahata - * VA Linux Systems Japan K.K. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#define DO_SAVE_MIN IA64_NATIVE_DO_SAVE_MIN - -#define __paravirt_switch_to ia64_native_switch_to -#define __paravirt_leave_syscall ia64_native_leave_syscall -#define __paravirt_work_processed_syscall ia64_native_work_processed_syscall -#define __paravirt_leave_kernel ia64_native_leave_kernel -#define __paravirt_pending_syscall_end ia64_work_pending_syscall_end -#define __paravirt_work_processed_syscall_target \ - ia64_work_processed_syscall - -#ifdef CONFIG_PARAVIRT_GUEST_ASM_CLOBBER_CHECK -# define PARAVIRT_POISON 0xdeadbeefbaadf00d -# define CLOBBER(clob) \ - ;; \ - movl clob = PARAVIRT_POISON; \ - ;; -#else -# define CLOBBER(clob) /* nothing */ -#endif - -#define MOV_FROM_IFA(reg) \ - mov reg = cr.ifa - -#define MOV_FROM_ITIR(reg) \ - mov reg = cr.itir - -#define MOV_FROM_ISR(reg) \ - mov reg = cr.isr - -#define MOV_FROM_IHA(reg) \ - mov reg = cr.iha - -#define MOV_FROM_IPSR(pred, reg) \ -(pred) mov reg = cr.ipsr - -#define MOV_FROM_IIM(reg) \ - mov reg = cr.iim - -#define MOV_FROM_IIP(reg) \ - mov reg = cr.iip - -#define MOV_FROM_IVR(reg, clob) \ - mov reg = cr.ivr \ - CLOBBER(clob) - -#define MOV_FROM_PSR(pred, reg, clob) \ -(pred) mov reg = psr \ - CLOBBER(clob) - -#define MOV_TO_IFA(reg, clob) \ - mov cr.ifa = reg \ - CLOBBER(clob) - -#define MOV_TO_ITIR(pred, reg, clob) \ -(pred) mov cr.itir = reg \ - CLOBBER(clob) - -#define MOV_TO_IHA(pred, reg, clob) \ -(pred) mov cr.iha = reg \ - CLOBBER(clob) - -#define MOV_TO_IPSR(pred, reg, clob) \ -(pred) mov cr.ipsr = reg \ - CLOBBER(clob) - -#define MOV_TO_IFS(pred, reg, clob) \ -(pred) mov cr.ifs = reg \ - CLOBBER(clob) - -#define MOV_TO_IIP(reg, clob) \ - mov cr.iip = reg \ - CLOBBER(clob) - -#define MOV_TO_KR(kr, reg, clob0, clob1) \ - mov IA64_KR(kr) = reg \ - CLOBBER(clob0) \ - CLOBBER(clob1) - -#define ITC_I(pred, reg, clob) \ -(pred) itc.i reg \ - CLOBBER(clob) - -#define ITC_D(pred, reg, clob) \ -(pred) itc.d reg \ - CLOBBER(clob) - -#define ITC_I_AND_D(pred_i, pred_d, reg, clob) \ -(pred_i) itc.i reg; \ -(pred_d) itc.d reg \ - CLOBBER(clob) - -#define THASH(pred, reg0, reg1, clob) \ -(pred) thash reg0 = reg1 \ - CLOBBER(clob) - -#define SSM_PSR_IC_AND_DEFAULT_BITS_AND_SRLZ_I(clob0, clob1) \ - ssm psr.ic | PSR_DEFAULT_BITS \ - CLOBBER(clob0) \ - CLOBBER(clob1) \ - ;; \ - srlz.i /* guarantee that interruption collectin is on */ \ - ;; - -#define SSM_PSR_IC_AND_SRLZ_D(clob0, clob1) \ - ssm psr.ic \ - CLOBBER(clob0) \ - CLOBBER(clob1) \ - ;; \ - srlz.d - -#define RSM_PSR_IC(clob) \ - rsm psr.ic \ - CLOBBER(clob) - -#define SSM_PSR_I(pred, pred_clob, clob) \ -(pred) ssm psr.i \ - CLOBBER(clob) - -#define RSM_PSR_I(pred, clob0, clob1) \ -(pred) rsm psr.i \ - CLOBBER(clob0) \ - CLOBBER(clob1) - -#define RSM_PSR_I_IC(clob0, clob1, clob2) \ - rsm psr.i | psr.ic \ - CLOBBER(clob0) \ - CLOBBER(clob1) \ - CLOBBER(clob2) - -#define RSM_PSR_DT \ - rsm psr.dt - -#define SSM_PSR_DT_AND_SRLZ_I \ - ssm psr.dt \ - ;; \ - srlz.i - -#define BSW_0(clob0, clob1, clob2) \ - bsw.0 \ - CLOBBER(clob0) \ - CLOBBER(clob1) \ - CLOBBER(clob2) - -#define BSW_1(clob0, clob1) \ - bsw.1 \ - CLOBBER(clob0) \ - CLOBBER(clob1) - -#define COVER \ - cover - -#define RFI \ - rfi diff --git a/include/asm-ia64/native/irq.h b/include/asm-ia64/native/irq.h deleted file mode 100644 index efe9ff7..0000000 --- a/include/asm-ia64/native/irq.h +++ /dev/null @@ -1,35 +0,0 @@ -/****************************************************************************** - * include/asm-ia64/native/irq.h - * - * Copyright (c) 2008 Isaku Yamahata - * VA Linux Systems Japan K.K. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * moved from linux/include/asm-ia64/irq.h. - */ - -#ifndef _ASM_IA64_NATIVE_IRQ_H -#define _ASM_IA64_NATIVE_IRQ_H - -#define NR_VECTORS 256 - -#if (NR_VECTORS + 32 * NR_CPUS) < 1024 -#define IA64_NATIVE_NR_IRQS (NR_VECTORS + 32 * NR_CPUS) -#else -#define IA64_NATIVE_NR_IRQS 1024 -#endif - -#endif /* _ASM_IA64_NATIVE_IRQ_H */ diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h deleted file mode 100644 index 2fb337b..0000000 --- a/include/asm-ia64/nodedata.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2000 Silicon Graphics, Inc. All rights reserved. - * Copyright (c) 2002 NEC Corp. - * Copyright (c) 2002 Erich Focht - * Copyright (c) 2002 Kimio Suganuma - */ -#ifndef _ASM_IA64_NODEDATA_H -#define _ASM_IA64_NODEDATA_H - -#include - -#include -#include - -#ifdef CONFIG_NUMA - -/* - * Node Data. One of these structures is located on each node of a NUMA system. - */ - -struct pglist_data; -struct ia64_node_data { - short active_cpu_count; - short node; - struct pglist_data *pg_data_ptrs[MAX_NUMNODES]; -}; - - -/* - * Return a pointer to the node_data structure for the executing cpu. - */ -#define local_node_data (local_cpu_data->node_data) - -/* - * Given a node id, return a pointer to the pg_data_t for the node. - * - * NODE_DATA - should be used in all code not related to system - * initialization. It uses pernode data structures to minimize - * offnode memory references. However, these structure are not - * present during boot. This macro can be used once cpu_init - * completes. - */ -#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid]) - -/* - * LOCAL_DATA_ADDR - This is to calculate the address of other node's - * "local_node_data" at hot-plug phase. The local_node_data - * is pointed by per_cpu_page. Kernel usually use it for - * just executing cpu. However, when new node is hot-added, - * the addresses of local data for other nodes are necessary - * to update all of them. - */ -#define LOCAL_DATA_ADDR(pgdat) \ - ((struct ia64_node_data *)((u64)(pgdat) + \ - L1_CACHE_ALIGN(sizeof(struct pglist_data)))) - -#endif /* CONFIG_NUMA */ - -#endif /* _ASM_IA64_NODEDATA_H */ diff --git a/include/asm-ia64/numa.h b/include/asm-ia64/numa.h deleted file mode 100644 index 3499ff5..0000000 --- a/include/asm-ia64/numa.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * This file contains NUMA specific prototypes and definitions. - * - * 2002/08/05 Erich Focht - * - */ -#ifndef _ASM_IA64_NUMA_H -#define _ASM_IA64_NUMA_H - - -#ifdef CONFIG_NUMA - -#include -#include -#include -#include -#include - -#include - -#define NUMA_NO_NODE -1 - -extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned; -extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned; -extern pg_data_t *pgdat_list[MAX_NUMNODES]; - -/* Stuff below this line could be architecture independent */ - -extern int num_node_memblks; /* total number of memory chunks */ - -/* - * List of node memory chunks. Filled when parsing SRAT table to - * obtain information about memory nodes. -*/ - -struct node_memblk_s { - unsigned long start_paddr; - unsigned long size; - int nid; /* which logical node contains this chunk? */ - int bank; /* which mem bank on this node */ -}; - -struct node_cpuid_s { - u16 phys_id; /* id << 8 | eid */ - int nid; /* logical node containing this CPU */ -}; - -extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS]; -extern struct node_cpuid_s node_cpuid[NR_CPUS]; - -/* - * ACPI 2.0 SLIT (System Locality Information Table) - * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf - * - * This is a matrix with "distances" between nodes, they should be - * proportional to the memory access latency ratios. - */ - -extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES]; -#define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)]) - -extern int paddr_to_nid(unsigned long paddr); - -#define local_nodeid (cpu_to_node_map[smp_processor_id()]) - -extern void map_cpu_to_node(int cpu, int nid); -extern void unmap_cpu_from_node(int cpu, int nid); - - -#else /* !CONFIG_NUMA */ -#define map_cpu_to_node(cpu, nid) do{}while(0) -#define unmap_cpu_from_node(cpu, nid) do{}while(0) - -#define paddr_to_nid(addr) 0 - -#endif /* CONFIG_NUMA */ - -#endif /* _ASM_IA64_NUMA_H */ diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h deleted file mode 100644 index 5f271bc..0000000 --- a/include/asm-ia64/page.h +++ /dev/null @@ -1,223 +0,0 @@ -#ifndef _ASM_IA64_PAGE_H -#define _ASM_IA64_PAGE_H -/* - * Pagetable related stuff. - * - * Copyright (C) 1998, 1999, 2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include -#include - -/* - * The top three bits of an IA64 address are its Region Number. - * Different regions are assigned to different purposes. - */ -#define RGN_SHIFT (61) -#define RGN_BASE(r) (__IA64_UL_CONST(r)<> PAGE_SHIFT) - -#ifdef CONFIG_VIRTUAL_MEM_MAP -extern int ia64_pfn_valid (unsigned long pfn); -#else -# define ia64_pfn_valid(pfn) 1 -#endif - -#ifdef CONFIG_VIRTUAL_MEM_MAP -extern struct page *vmem_map; -#ifdef CONFIG_DISCONTIGMEM -# define page_to_pfn(page) ((unsigned long) (page - vmem_map)) -# define pfn_to_page(pfn) (vmem_map + (pfn)) -#else -# include -#endif -#else -# include -#endif - -#ifdef CONFIG_FLATMEM -# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn)) -#elif defined(CONFIG_DISCONTIGMEM) -extern unsigned long min_low_pfn; -extern unsigned long max_low_pfn; -# define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn) && ia64_pfn_valid(pfn)) -#endif - -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) - -typedef union ia64_va { - struct { - unsigned long off : 61; /* intra-region offset */ - unsigned long reg : 3; /* region number */ - } f; - unsigned long l; - void *p; -} ia64_va; - -/* - * Note: These macros depend on the fact that PAGE_OFFSET has all - * region bits set to 1 and all other bits set to zero. They are - * expressed in this way to ensure they result in a single "dep" - * instruction. - */ -#define __pa(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = 0; _v.l;}) -#define __va(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg = -1; _v.p;}) - -#define REGION_NUMBER(x) ({ia64_va _v; _v.l = (long) (x); _v.f.reg;}) -#define REGION_OFFSET(x) ({ia64_va _v; _v.l = (long) (x); _v.f.off;}) - -#ifdef CONFIG_HUGETLB_PAGE -# define htlbpage_to_page(x) (((unsigned long) REGION_NUMBER(x) << 61) \ - | (REGION_OFFSET(x) >> (HPAGE_SHIFT-PAGE_SHIFT))) -# define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) -extern unsigned int hpage_shift; -#endif - -static __inline__ int -get_order (unsigned long size) -{ - long double d = size - 1; - long order; - - order = ia64_getf_exp(d); - order = order - PAGE_SHIFT - 0xffff + 1; - if (order < 0) - order = 0; - return order; -} - -#endif /* !__ASSEMBLY__ */ - -#ifdef STRICT_MM_TYPECHECKS - /* - * These are used to make use of C type-checking.. - */ - typedef struct { unsigned long pte; } pte_t; - typedef struct { unsigned long pmd; } pmd_t; -#ifdef CONFIG_PGTABLE_4 - typedef struct { unsigned long pud; } pud_t; -#endif - typedef struct { unsigned long pgd; } pgd_t; - typedef struct { unsigned long pgprot; } pgprot_t; - typedef struct page *pgtable_t; - -# define pte_val(x) ((x).pte) -# define pmd_val(x) ((x).pmd) -#ifdef CONFIG_PGTABLE_4 -# define pud_val(x) ((x).pud) -#endif -# define pgd_val(x) ((x).pgd) -# define pgprot_val(x) ((x).pgprot) - -# define __pte(x) ((pte_t) { (x) } ) -# define __pgprot(x) ((pgprot_t) { (x) } ) - -#else /* !STRICT_MM_TYPECHECKS */ - /* - * .. while these make it easier on the compiler - */ -# ifndef __ASSEMBLY__ - typedef unsigned long pte_t; - typedef unsigned long pmd_t; - typedef unsigned long pgd_t; - typedef unsigned long pgprot_t; - typedef struct page *pgtable_t; -# endif - -# define pte_val(x) (x) -# define pmd_val(x) (x) -# define pgd_val(x) (x) -# define pgprot_val(x) (x) - -# define __pte(x) (x) -# define __pgd(x) (x) -# define __pgprot(x) (x) -#endif /* !STRICT_MM_TYPECHECKS */ - -#define PAGE_OFFSET RGN_BASE(RGN_KERNEL) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC | \ - (((current->personality & READ_IMPLIES_EXEC) != 0) \ - ? VM_EXEC : 0)) - -#endif /* _ASM_IA64_PAGE_H */ diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h deleted file mode 100644 index 67b0290..0000000 --- a/include/asm-ia64/pal.h +++ /dev/null @@ -1,1827 +0,0 @@ -#ifndef _ASM_IA64_PAL_H -#define _ASM_IA64_PAL_H - -/* - * Processor Abstraction Layer definitions. - * - * This is based on Intel IA-64 Architecture Software Developer's Manual rev 1.0 - * chapter 11 IA-64 Processor Abstraction Layer - * - * Copyright (C) 1998-2001 Hewlett-Packard Co - * David Mosberger-Tang - * Stephane Eranian - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999 Walt Drummond - * Copyright (C) 1999 Srinivasa Prasad Thirumalachar - * Copyright (C) 2008 Silicon Graphics, Inc. (SGI) - * - * 99/10/01 davidm Make sure we pass zero for reserved parameters. - * 00/03/07 davidm Updated pal_cache_flush() to be in sync with PAL v2.6. - * 00/03/23 cfleck Modified processor min-state save area to match updated PAL & SAL info - * 00/05/24 eranian Updated to latest PAL spec, fix structures bugs, added - * 00/05/25 eranian Support for stack calls, and static physical calls - * 00/06/18 eranian Support for stacked physical calls - * 06/10/26 rja Support for Intel Itanium Architecture Software Developer's - * Manual Rev 2.2 (Jan 2006) - */ - -/* - * Note that some of these calls use a static-register only calling - * convention which has nothing to do with the regular calling - * convention. - */ -#define PAL_CACHE_FLUSH 1 /* flush i/d cache */ -#define PAL_CACHE_INFO 2 /* get detailed i/d cache info */ -#define PAL_CACHE_INIT 3 /* initialize i/d cache */ -#define PAL_CACHE_SUMMARY 4 /* get summary of cache hierarchy */ -#define PAL_MEM_ATTRIB 5 /* list supported memory attributes */ -#define PAL_PTCE_INFO 6 /* purge TLB info */ -#define PAL_VM_INFO 7 /* return supported virtual memory features */ -#define PAL_VM_SUMMARY 8 /* return summary on supported vm features */ -#define PAL_BUS_GET_FEATURES 9 /* return processor bus interface features settings */ -#define PAL_BUS_SET_FEATURES 10 /* set processor bus features */ -#define PAL_DEBUG_INFO 11 /* get number of debug registers */ -#define PAL_FIXED_ADDR 12 /* get fixed component of processors's directed address */ -#define PAL_FREQ_BASE 13 /* base frequency of the platform */ -#define PAL_FREQ_RATIOS 14 /* ratio of processor, bus and ITC frequency */ -#define PAL_PERF_MON_INFO 15 /* return performance monitor info */ -#define PAL_PLATFORM_ADDR 16 /* set processor interrupt block and IO port space addr */ -#define PAL_PROC_GET_FEATURES 17 /* get configurable processor features & settings */ -#define PAL_PROC_SET_FEATURES 18 /* enable/disable configurable processor features */ -#define PAL_RSE_INFO 19 /* return rse information */ -#define PAL_VERSION 20 /* return version of PAL code */ -#define PAL_MC_CLEAR_LOG 21 /* clear all processor log info */ -#define PAL_MC_DRAIN 22 /* drain operations which could result in an MCA */ -#define PAL_MC_EXPECTED 23 /* set/reset expected MCA indicator */ -#define PAL_MC_DYNAMIC_STATE 24 /* get processor dynamic state */ -#define PAL_MC_ERROR_INFO 25 /* get processor MCA info and static state */ -#define PAL_MC_RESUME 26 /* Return to interrupted process */ -#define PAL_MC_REGISTER_MEM 27 /* Register memory for PAL to use during MCAs and inits */ -#define PAL_HALT 28 /* enter the low power HALT state */ -#define PAL_HALT_LIGHT 29 /* enter the low power light halt state*/ -#define PAL_COPY_INFO 30 /* returns info needed to relocate PAL */ -#define PAL_CACHE_LINE_INIT 31 /* init tags & data of cache line */ -#define PAL_PMI_ENTRYPOINT 32 /* register PMI memory entry points with the processor */ -#define PAL_ENTER_IA_32_ENV 33 /* enter IA-32 system environment */ -#define PAL_VM_PAGE_SIZE 34 /* return vm TC and page walker page sizes */ - -#define PAL_MEM_FOR_TEST 37 /* get amount of memory needed for late processor test */ -#define PAL_CACHE_PROT_INFO 38 /* get i/d cache protection info */ -#define PAL_REGISTER_INFO 39 /* return AR and CR register information*/ -#define PAL_SHUTDOWN 40 /* enter processor shutdown state */ -#define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ -#define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ -#define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */ -#define PAL_GET_HW_POLICY 48 /* Get current hardware resource sharing policy */ -#define PAL_SET_HW_POLICY 49 /* Set current hardware resource sharing policy */ -#define PAL_VP_INFO 50 /* Information about virtual processor features */ -#define PAL_MC_HW_TRACKING 51 /* Hardware tracking status */ - -#define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ -#define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ -#define PAL_TEST_PROC 258 /* perform late processor self-test */ -#define PAL_CACHE_READ 259 /* read tag & data of cacheline for diagnostic testing */ -#define PAL_CACHE_WRITE 260 /* write tag & data of cacheline for diagnostic testing */ -#define PAL_VM_TR_READ 261 /* read contents of translation register */ -#define PAL_GET_PSTATE 262 /* get the current P-state */ -#define PAL_SET_PSTATE 263 /* set the P-state */ -#define PAL_BRAND_INFO 274 /* Processor branding information */ - -#define PAL_GET_PSTATE_TYPE_LASTSET 0 -#define PAL_GET_PSTATE_TYPE_AVGANDRESET 1 -#define PAL_GET_PSTATE_TYPE_AVGNORESET 2 -#define PAL_GET_PSTATE_TYPE_INSTANT 3 - -#define PAL_MC_ERROR_INJECT 276 /* Injects processor error or returns injection capabilities */ - -#ifndef __ASSEMBLY__ - -#include -#include - -/* - * Data types needed to pass information into PAL procedures and - * interpret information returned by them. - */ - -/* Return status from the PAL procedure */ -typedef s64 pal_status_t; - -#define PAL_STATUS_SUCCESS 0 /* No error */ -#define PAL_STATUS_UNIMPLEMENTED (-1) /* Unimplemented procedure */ -#define PAL_STATUS_EINVAL (-2) /* Invalid argument */ -#define PAL_STATUS_ERROR (-3) /* Error */ -#define PAL_STATUS_CACHE_INIT_FAIL (-4) /* Could not initialize the - * specified level and type of - * cache without sideeffects - * and "restrict" was 1 - */ -#define PAL_STATUS_REQUIRES_MEMORY (-9) /* Call requires PAL memory buffer */ - -/* Processor cache level in the hierarchy */ -typedef u64 pal_cache_level_t; -#define PAL_CACHE_LEVEL_L0 0 /* L0 */ -#define PAL_CACHE_LEVEL_L1 1 /* L1 */ -#define PAL_CACHE_LEVEL_L2 2 /* L2 */ - - -/* Processor cache type at a particular level in the hierarchy */ - -typedef u64 pal_cache_type_t; -#define PAL_CACHE_TYPE_INSTRUCTION 1 /* Instruction cache */ -#define PAL_CACHE_TYPE_DATA 2 /* Data or unified cache */ -#define PAL_CACHE_TYPE_INSTRUCTION_DATA 3 /* Both Data & Instruction */ - - -#define PAL_CACHE_FLUSH_INVALIDATE 1 /* Invalidate clean lines */ -#define PAL_CACHE_FLUSH_CHK_INTRS 2 /* check for interrupts/mc while flushing */ - -/* Processor cache line size in bytes */ -typedef int pal_cache_line_size_t; - -/* Processor cache line state */ -typedef u64 pal_cache_line_state_t; -#define PAL_CACHE_LINE_STATE_INVALID 0 /* Invalid */ -#define PAL_CACHE_LINE_STATE_SHARED 1 /* Shared */ -#define PAL_CACHE_LINE_STATE_EXCLUSIVE 2 /* Exclusive */ -#define PAL_CACHE_LINE_STATE_MODIFIED 3 /* Modified */ - -typedef struct pal_freq_ratio { - u32 den, num; /* numerator & denominator */ -} itc_ratio, proc_ratio; - -typedef union pal_cache_config_info_1_s { - struct { - u64 u : 1, /* 0 Unified cache ? */ - at : 2, /* 2-1 Cache mem attr*/ - reserved : 5, /* 7-3 Reserved */ - associativity : 8, /* 16-8 Associativity*/ - line_size : 8, /* 23-17 Line size */ - stride : 8, /* 31-24 Stride */ - store_latency : 8, /*39-32 Store latency*/ - load_latency : 8, /* 47-40 Load latency*/ - store_hints : 8, /* 55-48 Store hints*/ - load_hints : 8; /* 63-56 Load hints */ - } pcci1_bits; - u64 pcci1_data; -} pal_cache_config_info_1_t; - -typedef union pal_cache_config_info_2_s { - struct { - u32 cache_size; /*cache size in bytes*/ - - - u32 alias_boundary : 8, /* 39-32 aliased addr - * separation for max - * performance. - */ - tag_ls_bit : 8, /* 47-40 LSb of addr*/ - tag_ms_bit : 8, /* 55-48 MSb of addr*/ - reserved : 8; /* 63-56 Reserved */ - } pcci2_bits; - u64 pcci2_data; -} pal_cache_config_info_2_t; - - -typedef struct pal_cache_config_info_s { - pal_status_t pcci_status; - pal_cache_config_info_1_t pcci_info_1; - pal_cache_config_info_2_t pcci_info_2; - u64 pcci_reserved; -} pal_cache_config_info_t; - -#define pcci_ld_hints pcci_info_1.pcci1_bits.load_hints -#define pcci_st_hints pcci_info_1.pcci1_bits.store_hints -#define pcci_ld_latency pcci_info_1.pcci1_bits.load_latency -#define pcci_st_latency pcci_info_1.pcci1_bits.store_latency -#define pcci_stride pcci_info_1.pcci1_bits.stride -#define pcci_line_size pcci_info_1.pcci1_bits.line_size -#define pcci_assoc pcci_info_1.pcci1_bits.associativity -#define pcci_cache_attr pcci_info_1.pcci1_bits.at -#define pcci_unified pcci_info_1.pcci1_bits.u -#define pcci_tag_msb pcci_info_2.pcci2_bits.tag_ms_bit -#define pcci_tag_lsb pcci_info_2.pcci2_bits.tag_ls_bit -#define pcci_alias_boundary pcci_info_2.pcci2_bits.alias_boundary -#define pcci_cache_size pcci_info_2.pcci2_bits.cache_size - - - -/* Possible values for cache attributes */ - -#define PAL_CACHE_ATTR_WT 0 /* Write through cache */ -#define PAL_CACHE_ATTR_WB 1 /* Write back cache */ -#define PAL_CACHE_ATTR_WT_OR_WB 2 /* Either write thru or write - * back depending on TLB - * memory attributes - */ - - -/* Possible values for cache hints */ - -#define PAL_CACHE_HINT_TEMP_1 0 /* Temporal level 1 */ -#define PAL_CACHE_HINT_NTEMP_1 1 /* Non-temporal level 1 */ -#define PAL_CACHE_HINT_NTEMP_ALL 3 /* Non-temporal all levels */ - -/* Processor cache protection information */ -typedef union pal_cache_protection_element_u { - u32 pcpi_data; - struct { - u32 data_bits : 8, /* # data bits covered by - * each unit of protection - */ - - tagprot_lsb : 6, /* Least -do- */ - tagprot_msb : 6, /* Most Sig. tag address - * bit that this - * protection covers. - */ - prot_bits : 6, /* # of protection bits */ - method : 4, /* Protection method */ - t_d : 2; /* Indicates which part - * of the cache this - * protection encoding - * applies. - */ - } pcp_info; -} pal_cache_protection_element_t; - -#define pcpi_cache_prot_part pcp_info.t_d -#define pcpi_prot_method pcp_info.method -#define pcpi_prot_bits pcp_info.prot_bits -#define pcpi_tagprot_msb pcp_info.tagprot_msb -#define pcpi_tagprot_lsb pcp_info.tagprot_lsb -#define pcpi_data_bits pcp_info.data_bits - -/* Processor cache part encodings */ -#define PAL_CACHE_PROT_PART_DATA 0 /* Data protection */ -#define PAL_CACHE_PROT_PART_TAG 1 /* Tag protection */ -#define PAL_CACHE_PROT_PART_TAG_DATA 2 /* Tag+data protection (tag is - * more significant ) - */ -#define PAL_CACHE_PROT_PART_DATA_TAG 3 /* Data+tag protection (data is - * more significant ) - */ -#define PAL_CACHE_PROT_PART_MAX 6 - - -typedef struct pal_cache_protection_info_s { - pal_status_t pcpi_status; - pal_cache_protection_element_t pcp_info[PAL_CACHE_PROT_PART_MAX]; -} pal_cache_protection_info_t; - - -/* Processor cache protection method encodings */ -#define PAL_CACHE_PROT_METHOD_NONE 0 /* No protection */ -#define PAL_CACHE_PROT_METHOD_ODD_PARITY 1 /* Odd parity */ -#define PAL_CACHE_PROT_METHOD_EVEN_PARITY 2 /* Even parity */ -#define PAL_CACHE_PROT_METHOD_ECC 3 /* ECC protection */ - - -/* Processor cache line identification in the hierarchy */ -typedef union pal_cache_line_id_u { - u64 pclid_data; - struct { - u64 cache_type : 8, /* 7-0 cache type */ - level : 8, /* 15-8 level of the - * cache in the - * hierarchy. - */ - way : 8, /* 23-16 way in the set - */ - part : 8, /* 31-24 part of the - * cache - */ - reserved : 32; /* 63-32 is reserved*/ - } pclid_info_read; - struct { - u64 cache_type : 8, /* 7-0 cache type */ - level : 8, /* 15-8 level of the - * cache in the - * hierarchy. - */ - way : 8, /* 23-16 way in the set - */ - part : 8, /* 31-24 part of the - * cache - */ - mesi : 8, /* 39-32 cache line - * state - */ - start : 8, /* 47-40 lsb of data to - * invert - */ - length : 8, /* 55-48 #bits to - * invert - */ - trigger : 8; /* 63-56 Trigger error - * by doing a load - * after the write - */ - - } pclid_info_write; -} pal_cache_line_id_u_t; - -#define pclid_read_part pclid_info_read.part -#define pclid_read_way pclid_info_read.way -#define pclid_read_level pclid_info_read.level -#define pclid_read_cache_type pclid_info_read.cache_type - -#define pclid_write_trigger pclid_info_write.trigger -#define pclid_write_length pclid_info_write.length -#define pclid_write_start pclid_info_write.start -#define pclid_write_mesi pclid_info_write.mesi -#define pclid_write_part pclid_info_write.part -#define pclid_write_way pclid_info_write.way -#define pclid_write_level pclid_info_write.level -#define pclid_write_cache_type pclid_info_write.cache_type - -/* Processor cache line part encodings */ -#define PAL_CACHE_LINE_ID_PART_DATA 0 /* Data */ -#define PAL_CACHE_LINE_ID_PART_TAG 1 /* Tag */ -#define PAL_CACHE_LINE_ID_PART_DATA_PROT 2 /* Data protection */ -#define PAL_CACHE_LINE_ID_PART_TAG_PROT 3 /* Tag protection */ -#define PAL_CACHE_LINE_ID_PART_DATA_TAG_PROT 4 /* Data+tag - * protection - */ -typedef struct pal_cache_line_info_s { - pal_status_t pcli_status; /* Return status of the read cache line - * info call. - */ - u64 pcli_data; /* 64-bit data, tag, protection bits .. */ - u64 pcli_data_len; /* data length in bits */ - pal_cache_line_state_t pcli_cache_line_state; /* mesi state */ - -} pal_cache_line_info_t; - - -/* Machine Check related crap */ - -/* Pending event status bits */ -typedef u64 pal_mc_pending_events_t; - -#define PAL_MC_PENDING_MCA (1 << 0) -#define PAL_MC_PENDING_INIT (1 << 1) - -/* Error information type */ -typedef u64 pal_mc_info_index_t; - -#define PAL_MC_INFO_PROCESSOR 0 /* Processor */ -#define PAL_MC_INFO_CACHE_CHECK 1 /* Cache check */ -#define PAL_MC_INFO_TLB_CHECK 2 /* Tlb check */ -#define PAL_MC_INFO_BUS_CHECK 3 /* Bus check */ -#define PAL_MC_INFO_REQ_ADDR 4 /* Requestor address */ -#define PAL_MC_INFO_RESP_ADDR 5 /* Responder address */ -#define PAL_MC_INFO_TARGET_ADDR 6 /* Target address */ -#define PAL_MC_INFO_IMPL_DEP 7 /* Implementation - * dependent - */ - -#define PAL_TLB_CHECK_OP_PURGE 8 - -typedef struct pal_process_state_info_s { - u64 reserved1 : 2, - rz : 1, /* PAL_CHECK processor - * rendezvous - * successful. - */ - - ra : 1, /* PAL_CHECK attempted - * a rendezvous. - */ - me : 1, /* Distinct multiple - * errors occurred - */ - - mn : 1, /* Min. state save - * area has been - * registered with PAL - */ - - sy : 1, /* Storage integrity - * synched - */ - - - co : 1, /* Continuable */ - ci : 1, /* MC isolated */ - us : 1, /* Uncontained storage - * damage. - */ - - - hd : 1, /* Non-essential hw - * lost (no loss of - * functionality) - * causing the - * processor to run in - * degraded mode. - */ - - tl : 1, /* 1 => MC occurred - * after an instr was - * executed but before - * the trap that - * resulted from instr - * execution was - * generated. - * (Trap Lost ) - */ - mi : 1, /* More information available - * call PAL_MC_ERROR_INFO - */ - pi : 1, /* Precise instruction pointer */ - pm : 1, /* Precise min-state save area */ - - dy : 1, /* Processor dynamic - * state valid - */ - - - in : 1, /* 0 = MC, 1 = INIT */ - rs : 1, /* RSE valid */ - cm : 1, /* MC corrected */ - ex : 1, /* MC is expected */ - cr : 1, /* Control regs valid*/ - pc : 1, /* Perf cntrs valid */ - dr : 1, /* Debug regs valid */ - tr : 1, /* Translation regs - * valid - */ - rr : 1, /* Region regs valid */ - ar : 1, /* App regs valid */ - br : 1, /* Branch regs valid */ - pr : 1, /* Predicate registers - * valid - */ - - fp : 1, /* fp registers valid*/ - b1 : 1, /* Preserved bank one - * general registers - * are valid - */ - b0 : 1, /* Preserved bank zero - * general registers - * are valid - */ - gr : 1, /* General registers - * are valid - * (excl. banked regs) - */ - dsize : 16, /* size of dynamic - * state returned - * by the processor - */ - - se : 1, /* Shared error. MCA in a - shared structure */ - reserved2 : 10, - cc : 1, /* Cache check */ - tc : 1, /* TLB check */ - bc : 1, /* Bus check */ - rc : 1, /* Register file check */ - uc : 1; /* Uarch check */ - -} pal_processor_state_info_t; - -typedef struct pal_cache_check_info_s { - u64 op : 4, /* Type of cache - * operation that - * caused the machine - * check. - */ - level : 2, /* Cache level */ - reserved1 : 2, - dl : 1, /* Failure in data part - * of cache line - */ - tl : 1, /* Failure in tag part - * of cache line - */ - dc : 1, /* Failure in dcache */ - ic : 1, /* Failure in icache */ - mesi : 3, /* Cache line state */ - mv : 1, /* mesi valid */ - way : 5, /* Way in which the - * error occurred - */ - wiv : 1, /* Way field valid */ - reserved2 : 1, - dp : 1, /* Data poisoned on MBE */ - reserved3 : 6, - hlth : 2, /* Health indicator */ - - index : 20, /* Cache line index */ - reserved4 : 2, - - is : 1, /* instruction set (1 == ia32) */ - iv : 1, /* instruction set field valid */ - pl : 2, /* privilege level */ - pv : 1, /* privilege level field valid */ - mcc : 1, /* Machine check corrected */ - tv : 1, /* Target address - * structure is valid - */ - rq : 1, /* Requester identifier - * structure is valid - */ - rp : 1, /* Responder identifier - * structure is valid - */ - pi : 1; /* Precise instruction pointer - * structure is valid - */ -} pal_cache_check_info_t; - -typedef struct pal_tlb_check_info_s { - - u64 tr_slot : 8, /* Slot# of TR where - * error occurred - */ - trv : 1, /* tr_slot field is valid */ - reserved1 : 1, - level : 2, /* TLB level where failure occurred */ - reserved2 : 4, - dtr : 1, /* Fail in data TR */ - itr : 1, /* Fail in inst TR */ - dtc : 1, /* Fail in data TC */ - itc : 1, /* Fail in inst. TC */ - op : 4, /* Cache operation */ - reserved3 : 6, - hlth : 2, /* Health indicator */ - reserved4 : 22, - - is : 1, /* instruction set (1 == ia32) */ - iv : 1, /* instruction set field valid */ - pl : 2, /* privilege level */ - pv : 1, /* privilege level field valid */ - mcc : 1, /* Machine check corrected */ - tv : 1, /* Target address - * structure is valid - */ - rq : 1, /* Requester identifier - * structure is valid - */ - rp : 1, /* Responder identifier - * structure is valid - */ - pi : 1; /* Precise instruction pointer - * structure is valid - */ -} pal_tlb_check_info_t; - -typedef struct pal_bus_check_info_s { - u64 size : 5, /* Xaction size */ - ib : 1, /* Internal bus error */ - eb : 1, /* External bus error */ - cc : 1, /* Error occurred - * during cache-cache - * transfer. - */ - type : 8, /* Bus xaction type*/ - sev : 5, /* Bus error severity*/ - hier : 2, /* Bus hierarchy level */ - dp : 1, /* Data poisoned on MBE */ - bsi : 8, /* Bus error status - * info - */ - reserved2 : 22, - - is : 1, /* instruction set (1 == ia32) */ - iv : 1, /* instruction set field valid */ - pl : 2, /* privilege level */ - pv : 1, /* privilege level field valid */ - mcc : 1, /* Machine check corrected */ - tv : 1, /* Target address - * structure is valid - */ - rq : 1, /* Requester identifier - * structure is valid - */ - rp : 1, /* Responder identifier - * structure is valid - */ - pi : 1; /* Precise instruction pointer - * structure is valid - */ -} pal_bus_check_info_t; - -typedef struct pal_reg_file_check_info_s { - u64 id : 4, /* Register file identifier */ - op : 4, /* Type of register - * operation that - * caused the machine - * check. - */ - reg_num : 7, /* Register number */ - rnv : 1, /* reg_num valid */ - reserved2 : 38, - - is : 1, /* instruction set (1 == ia32) */ - iv : 1, /* instruction set field valid */ - pl : 2, /* privilege level */ - pv : 1, /* privilege level field valid */ - mcc : 1, /* Machine check corrected */ - reserved3 : 3, - pi : 1; /* Precise instruction pointer - * structure is valid - */ -} pal_reg_file_check_info_t; - -typedef struct pal_uarch_check_info_s { - u64 sid : 5, /* Structure identification */ - level : 3, /* Level of failure */ - array_id : 4, /* Array identification */ - op : 4, /* Type of - * operation that - * caused the machine - * check. - */ - way : 6, /* Way of structure */ - wv : 1, /* way valid */ - xv : 1, /* index valid */ - reserved1 : 6, - hlth : 2, /* Health indicator */ - index : 8, /* Index or set of the uarch - * structure that failed. - */ - reserved2 : 24, - - is : 1, /* instruction set (1 == ia32) */ - iv : 1, /* instruction set field valid */ - pl : 2, /* privilege level */ - pv : 1, /* privilege level field valid */ - mcc : 1, /* Machine check corrected */ - tv : 1, /* Target address - * structure is valid - */ - rq : 1, /* Requester identifier - * structure is valid - */ - rp : 1, /* Responder identifier - * structure is valid - */ - pi : 1; /* Precise instruction pointer - * structure is valid - */ -} pal_uarch_check_info_t; - -typedef union pal_mc_error_info_u { - u64 pmei_data; - pal_processor_state_info_t pme_processor; - pal_cache_check_info_t pme_cache; - pal_tlb_check_info_t pme_tlb; - pal_bus_check_info_t pme_bus; - pal_reg_file_check_info_t pme_reg_file; - pal_uarch_check_info_t pme_uarch; -} pal_mc_error_info_t; - -#define pmci_proc_unknown_check pme_processor.uc -#define pmci_proc_bus_check pme_processor.bc -#define pmci_proc_tlb_check pme_processor.tc -#define pmci_proc_cache_check pme_processor.cc -#define pmci_proc_dynamic_state_size pme_processor.dsize -#define pmci_proc_gpr_valid pme_processor.gr -#define pmci_proc_preserved_bank0_gpr_valid pme_processor.b0 -#define pmci_proc_preserved_bank1_gpr_valid pme_processor.b1 -#define pmci_proc_fp_valid pme_processor.fp -#define pmci_proc_predicate_regs_valid pme_processor.pr -#define pmci_proc_branch_regs_valid pme_processor.br -#define pmci_proc_app_regs_valid pme_processor.ar -#define pmci_proc_region_regs_valid pme_processor.rr -#define pmci_proc_translation_regs_valid pme_processor.tr -#define pmci_proc_debug_regs_valid pme_processor.dr -#define pmci_proc_perf_counters_valid pme_processor.pc -#define pmci_proc_control_regs_valid pme_processor.cr -#define pmci_proc_machine_check_expected pme_processor.ex -#define pmci_proc_machine_check_corrected pme_processor.cm -#define pmci_proc_rse_valid pme_processor.rs -#define pmci_proc_machine_check_or_init pme_processor.in -#define pmci_proc_dynamic_state_valid pme_processor.dy -#define pmci_proc_operation pme_processor.op -#define pmci_proc_trap_lost pme_processor.tl -#define pmci_proc_hardware_damage pme_processor.hd -#define pmci_proc_uncontained_storage_damage pme_processor.us -#define pmci_proc_machine_check_isolated pme_processor.ci -#define pmci_proc_continuable pme_processor.co -#define pmci_proc_storage_intergrity_synced pme_processor.sy -#define pmci_proc_min_state_save_area_regd pme_processor.mn -#define pmci_proc_distinct_multiple_errors pme_processor.me -#define pmci_proc_pal_attempted_rendezvous pme_processor.ra -#define pmci_proc_pal_rendezvous_complete pme_processor.rz - - -#define pmci_cache_level pme_cache.level -#define pmci_cache_line_state pme_cache.mesi -#define pmci_cache_line_state_valid pme_cache.mv -#define pmci_cache_line_index pme_cache.index -#define pmci_cache_instr_cache_fail pme_cache.ic -#define pmci_cache_data_cache_fail pme_cache.dc -#define pmci_cache_line_tag_fail pme_cache.tl -#define pmci_cache_line_data_fail pme_cache.dl -#define pmci_cache_operation pme_cache.op -#define pmci_cache_way_valid pme_cache.wv -#define pmci_cache_target_address_valid pme_cache.tv -#define pmci_cache_way pme_cache.way -#define pmci_cache_mc pme_cache.mc - -#define pmci_tlb_instr_translation_cache_fail pme_tlb.itc -#define pmci_tlb_data_translation_cache_fail pme_tlb.dtc -#define pmci_tlb_instr_translation_reg_fail pme_tlb.itr -#define pmci_tlb_data_translation_reg_fail pme_tlb.dtr -#define pmci_tlb_translation_reg_slot pme_tlb.tr_slot -#define pmci_tlb_mc pme_tlb.mc - -#define pmci_bus_status_info pme_bus.bsi -#define pmci_bus_req_address_valid pme_bus.rq -#define pmci_bus_resp_address_valid pme_bus.rp -#define pmci_bus_target_address_valid pme_bus.tv -#define pmci_bus_error_severity pme_bus.sev -#define pmci_bus_transaction_type pme_bus.type -#define pmci_bus_cache_cache_transfer pme_bus.cc -#define pmci_bus_transaction_size pme_bus.size -#define pmci_bus_internal_error pme_bus.ib -#define pmci_bus_external_error pme_bus.eb -#define pmci_bus_mc pme_bus.mc - -/* - * NOTE: this min_state_save area struct only includes the 1KB - * architectural state save area. The other 3 KB is scratch space - * for PAL. - */ - -typedef struct pal_min_state_area_s { - u64 pmsa_nat_bits; /* nat bits for saved GRs */ - u64 pmsa_gr[15]; /* GR1 - GR15 */ - u64 pmsa_bank0_gr[16]; /* GR16 - GR31 */ - u64 pmsa_bank1_gr[16]; /* GR16 - GR31 */ - u64 pmsa_pr; /* predicate registers */ - u64 pmsa_br0; /* branch register 0 */ - u64 pmsa_rsc; /* ar.rsc */ - u64 pmsa_iip; /* cr.iip */ - u64 pmsa_ipsr; /* cr.ipsr */ - u64 pmsa_ifs; /* cr.ifs */ - u64 pmsa_xip; /* previous iip */ - u64 pmsa_xpsr; /* previous psr */ - u64 pmsa_xfs; /* previous ifs */ - u64 pmsa_br1; /* branch register 1 */ - u64 pmsa_reserved[70]; /* pal_min_state_area should total to 1KB */ -} pal_min_state_area_t; - - -struct ia64_pal_retval { - /* - * A zero status value indicates call completed without error. - * A negative status value indicates reason of call failure. - * A positive status value indicates success but an - * informational value should be printed (e.g., "reboot for - * change to take effect"). - */ - s64 status; - u64 v0; - u64 v1; - u64 v2; -}; - -/* - * Note: Currently unused PAL arguments are generally labeled - * "reserved" so the value specified in the PAL documentation - * (generally 0) MUST be passed. Reserved parameters are not optional - * parameters. - */ -extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64); -extern struct ia64_pal_retval ia64_pal_call_stacked (u64, u64, u64, u64); -extern struct ia64_pal_retval ia64_pal_call_phys_static (u64, u64, u64, u64); -extern struct ia64_pal_retval ia64_pal_call_phys_stacked (u64, u64, u64, u64); -extern void ia64_save_scratch_fpregs (struct ia64_fpreg *); -extern void ia64_load_scratch_fpregs (struct ia64_fpreg *); - -#define PAL_CALL(iprv,a0,a1,a2,a3) do { \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - iprv = ia64_pal_call_static(a0, a1, a2, a3); \ - ia64_load_scratch_fpregs(fr); \ -} while (0) - -#define PAL_CALL_STK(iprv,a0,a1,a2,a3) do { \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - iprv = ia64_pal_call_stacked(a0, a1, a2, a3); \ - ia64_load_scratch_fpregs(fr); \ -} while (0) - -#define PAL_CALL_PHYS(iprv,a0,a1,a2,a3) do { \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - iprv = ia64_pal_call_phys_static(a0, a1, a2, a3); \ - ia64_load_scratch_fpregs(fr); \ -} while (0) - -#define PAL_CALL_PHYS_STK(iprv,a0,a1,a2,a3) do { \ - struct ia64_fpreg fr[6]; \ - ia64_save_scratch_fpregs(fr); \ - iprv = ia64_pal_call_phys_stacked(a0, a1, a2, a3); \ - ia64_load_scratch_fpregs(fr); \ -} while (0) - -typedef int (*ia64_pal_handler) (u64, ...); -extern ia64_pal_handler ia64_pal; -extern void ia64_pal_handler_init (void *); - -extern ia64_pal_handler ia64_pal; - -extern pal_cache_config_info_t l0d_cache_config_info; -extern pal_cache_config_info_t l0i_cache_config_info; -extern pal_cache_config_info_t l1_cache_config_info; -extern pal_cache_config_info_t l2_cache_config_info; - -extern pal_cache_protection_info_t l0d_cache_protection_info; -extern pal_cache_protection_info_t l0i_cache_protection_info; -extern pal_cache_protection_info_t l1_cache_protection_info; -extern pal_cache_protection_info_t l2_cache_protection_info; - -extern pal_cache_config_info_t pal_cache_config_info_get(pal_cache_level_t, - pal_cache_type_t); - -extern pal_cache_protection_info_t pal_cache_protection_info_get(pal_cache_level_t, - pal_cache_type_t); - - -extern void pal_error(int); - - -/* Useful wrappers for the current list of pal procedures */ - -typedef union pal_bus_features_u { - u64 pal_bus_features_val; - struct { - u64 pbf_reserved1 : 29; - u64 pbf_req_bus_parking : 1; - u64 pbf_bus_lock_mask : 1; - u64 pbf_enable_half_xfer_rate : 1; - u64 pbf_reserved2 : 20; - u64 pbf_enable_shared_line_replace : 1; - u64 pbf_enable_exclusive_line_replace : 1; - u64 pbf_disable_xaction_queueing : 1; - u64 pbf_disable_resp_err_check : 1; - u64 pbf_disable_berr_check : 1; - u64 pbf_disable_bus_req_internal_err_signal : 1; - u64 pbf_disable_bus_req_berr_signal : 1; - u64 pbf_disable_bus_init_event_check : 1; - u64 pbf_disable_bus_init_event_signal : 1; - u64 pbf_disable_bus_addr_err_check : 1; - u64 pbf_disable_bus_addr_err_signal : 1; - u64 pbf_disable_bus_data_err_check : 1; - } pal_bus_features_s; -} pal_bus_features_u_t; - -extern void pal_bus_features_print (u64); - -/* Provide information about configurable processor bus features */ -static inline s64 -ia64_pal_bus_get_features (pal_bus_features_u_t *features_avail, - pal_bus_features_u_t *features_status, - pal_bus_features_u_t *features_control) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS(iprv, PAL_BUS_GET_FEATURES, 0, 0, 0); - if (features_avail) - features_avail->pal_bus_features_val = iprv.v0; - if (features_status) - features_status->pal_bus_features_val = iprv.v1; - if (features_control) - features_control->pal_bus_features_val = iprv.v2; - return iprv.status; -} - -/* Enables/disables specific processor bus features */ -static inline s64 -ia64_pal_bus_set_features (pal_bus_features_u_t feature_select) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS(iprv, PAL_BUS_SET_FEATURES, feature_select.pal_bus_features_val, 0, 0); - return iprv.status; -} - -/* Get detailed cache information */ -static inline s64 -ia64_pal_cache_config_info (u64 cache_level, u64 cache_type, pal_cache_config_info_t *conf) -{ - struct ia64_pal_retval iprv; - - PAL_CALL(iprv, PAL_CACHE_INFO, cache_level, cache_type, 0); - - if (iprv.status == 0) { - conf->pcci_status = iprv.status; - conf->pcci_info_1.pcci1_data = iprv.v0; - conf->pcci_info_2.pcci2_data = iprv.v1; - conf->pcci_reserved = iprv.v2; - } - return iprv.status; - -} - -/* Get detailed cche protection information */ -static inline s64 -ia64_pal_cache_prot_info (u64 cache_level, u64 cache_type, pal_cache_protection_info_t *prot) -{ - struct ia64_pal_retval iprv; - - PAL_CALL(iprv, PAL_CACHE_PROT_INFO, cache_level, cache_type, 0); - - if (iprv.status == 0) { - prot->pcpi_status = iprv.status; - prot->pcp_info[0].pcpi_data = iprv.v0 & 0xffffffff; - prot->pcp_info[1].pcpi_data = iprv.v0 >> 32; - prot->pcp_info[2].pcpi_data = iprv.v1 & 0xffffffff; - prot->pcp_info[3].pcpi_data = iprv.v1 >> 32; - prot->pcp_info[4].pcpi_data = iprv.v2 & 0xffffffff; - prot->pcp_info[5].pcpi_data = iprv.v2 >> 32; - } - return iprv.status; -} - -/* - * Flush the processor instruction or data caches. *PROGRESS must be - * initialized to zero before calling this for the first time.. - */ -static inline s64 -ia64_pal_cache_flush (u64 cache_type, u64 invalidate, u64 *progress, u64 *vector) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_CACHE_FLUSH, cache_type, invalidate, *progress); - if (vector) - *vector = iprv.v0; - *progress = iprv.v1; - return iprv.status; -} - - -/* Initialize the processor controlled caches */ -static inline s64 -ia64_pal_cache_init (u64 level, u64 cache_type, u64 rest) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_CACHE_INIT, level, cache_type, rest); - return iprv.status; -} - -/* Initialize the tags and data of a data or unified cache line of - * processor controlled cache to known values without the availability - * of backing memory. - */ -static inline s64 -ia64_pal_cache_line_init (u64 physical_addr, u64 data_value) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_CACHE_LINE_INIT, physical_addr, data_value, 0); - return iprv.status; -} - - -/* Read the data and tag of a processor controlled cache line for diags */ -static inline s64 -ia64_pal_cache_read (pal_cache_line_id_u_t line_id, u64 physical_addr) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS_STK(iprv, PAL_CACHE_READ, line_id.pclid_data, - physical_addr, 0); - return iprv.status; -} - -/* Return summary information about the hierarchy of caches controlled by the processor */ -static inline s64 -ia64_pal_cache_summary (u64 *cache_levels, u64 *unique_caches) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_CACHE_SUMMARY, 0, 0, 0); - if (cache_levels) - *cache_levels = iprv.v0; - if (unique_caches) - *unique_caches = iprv.v1; - return iprv.status; -} - -/* Write the data and tag of a processor-controlled cache line for diags */ -static inline s64 -ia64_pal_cache_write (pal_cache_line_id_u_t line_id, u64 physical_addr, u64 data) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS_STK(iprv, PAL_CACHE_WRITE, line_id.pclid_data, - physical_addr, data); - return iprv.status; -} - - -/* Return the parameters needed to copy relocatable PAL procedures from ROM to memory */ -static inline s64 -ia64_pal_copy_info (u64 copy_type, u64 num_procs, u64 num_iopics, - u64 *buffer_size, u64 *buffer_align) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_COPY_INFO, copy_type, num_procs, num_iopics); - if (buffer_size) - *buffer_size = iprv.v0; - if (buffer_align) - *buffer_align = iprv.v1; - return iprv.status; -} - -/* Copy relocatable PAL procedures from ROM to memory */ -static inline s64 -ia64_pal_copy_pal (u64 target_addr, u64 alloc_size, u64 processor, u64 *pal_proc_offset) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_COPY_PAL, target_addr, alloc_size, processor); - if (pal_proc_offset) - *pal_proc_offset = iprv.v0; - return iprv.status; -} - -/* Return the number of instruction and data debug register pairs */ -static inline s64 -ia64_pal_debug_info (u64 *inst_regs, u64 *data_regs) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_DEBUG_INFO, 0, 0, 0); - if (inst_regs) - *inst_regs = iprv.v0; - if (data_regs) - *data_regs = iprv.v1; - - return iprv.status; -} - -#ifdef TBD -/* Switch from IA64-system environment to IA-32 system environment */ -static inline s64 -ia64_pal_enter_ia32_env (ia32_env1, ia32_env2, ia32_env3) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_ENTER_IA_32_ENV, ia32_env1, ia32_env2, ia32_env3); - return iprv.status; -} -#endif - -/* Get unique geographical address of this processor on its bus */ -static inline s64 -ia64_pal_fixed_addr (u64 *global_unique_addr) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_FIXED_ADDR, 0, 0, 0); - if (global_unique_addr) - *global_unique_addr = iprv.v0; - return iprv.status; -} - -/* Get base frequency of the platform if generated by the processor */ -static inline s64 -ia64_pal_freq_base (u64 *platform_base_freq) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_FREQ_BASE, 0, 0, 0); - if (platform_base_freq) - *platform_base_freq = iprv.v0; - return iprv.status; -} - -/* - * Get the ratios for processor frequency, bus frequency and interval timer to - * to base frequency of the platform - */ -static inline s64 -ia64_pal_freq_ratios (struct pal_freq_ratio *proc_ratio, struct pal_freq_ratio *bus_ratio, - struct pal_freq_ratio *itc_ratio) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_FREQ_RATIOS, 0, 0, 0); - if (proc_ratio) - *(u64 *)proc_ratio = iprv.v0; - if (bus_ratio) - *(u64 *)bus_ratio = iprv.v1; - if (itc_ratio) - *(u64 *)itc_ratio = iprv.v2; - return iprv.status; -} - -/* - * Get the current hardware resource sharing policy of the processor - */ -static inline s64 -ia64_pal_get_hw_policy (u64 proc_num, u64 *cur_policy, u64 *num_impacted, - u64 *la) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_GET_HW_POLICY, proc_num, 0, 0); - if (cur_policy) - *cur_policy = iprv.v0; - if (num_impacted) - *num_impacted = iprv.v1; - if (la) - *la = iprv.v2; - return iprv.status; -} - -/* Make the processor enter HALT or one of the implementation dependent low - * power states where prefetching and execution are suspended and cache and - * TLB coherency is not maintained. - */ -static inline s64 -ia64_pal_halt (u64 halt_state) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_HALT, halt_state, 0, 0); - return iprv.status; -} - -typedef union pal_power_mgmt_info_u { - u64 ppmi_data; - struct { - u64 exit_latency : 16, - entry_latency : 16, - power_consumption : 28, - im : 1, - co : 1, - reserved : 2; - } pal_power_mgmt_info_s; -} pal_power_mgmt_info_u_t; - -/* Return information about processor's optional power management capabilities. */ -static inline s64 -ia64_pal_halt_info (pal_power_mgmt_info_u_t *power_buf) -{ - struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_HALT_INFO, (unsigned long) power_buf, 0, 0); - return iprv.status; -} - -/* Get the current P-state information */ -static inline s64 -ia64_pal_get_pstate (u64 *pstate_index, unsigned long type) -{ - struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_GET_PSTATE, type, 0, 0); - *pstate_index = iprv.v0; - return iprv.status; -} - -/* Set the P-state */ -static inline s64 -ia64_pal_set_pstate (u64 pstate_index) -{ - struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_SET_PSTATE, pstate_index, 0, 0); - return iprv.status; -} - -/* Processor branding information*/ -static inline s64 -ia64_pal_get_brand_info (char *brand_info) -{ - struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_BRAND_INFO, 0, (u64)brand_info, 0); - return iprv.status; -} - -/* Cause the processor to enter LIGHT HALT state, where prefetching and execution are - * suspended, but cache and TLB coherency is maintained. - */ -static inline s64 -ia64_pal_halt_light (void) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_HALT_LIGHT, 0, 0, 0); - return iprv.status; -} - -/* Clear all the processor error logging registers and reset the indicator that allows - * the error logging registers to be written. This procedure also checks the pending - * machine check bit and pending INIT bit and reports their states. - */ -static inline s64 -ia64_pal_mc_clear_log (u64 *pending_vector) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_CLEAR_LOG, 0, 0, 0); - if (pending_vector) - *pending_vector = iprv.v0; - return iprv.status; -} - -/* Ensure that all outstanding transactions in a processor are completed or that any - * MCA due to thes outstanding transaction is taken. - */ -static inline s64 -ia64_pal_mc_drain (void) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_DRAIN, 0, 0, 0); - return iprv.status; -} - -/* Return the machine check dynamic processor state */ -static inline s64 -ia64_pal_mc_dynamic_state (u64 info_type, u64 dy_buffer, u64 *size) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_DYNAMIC_STATE, info_type, dy_buffer, 0); - if (size) - *size = iprv.v0; - return iprv.status; -} - -/* Return processor machine check information */ -static inline s64 -ia64_pal_mc_error_info (u64 info_index, u64 type_index, u64 *size, u64 *error_info) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_ERROR_INFO, info_index, type_index, 0); - if (size) - *size = iprv.v0; - if (error_info) - *error_info = iprv.v1; - return iprv.status; -} - -/* Injects the requested processor error or returns info on - * supported injection capabilities for current processor implementation - */ -static inline s64 -ia64_pal_mc_error_inject_phys (u64 err_type_info, u64 err_struct_info, - u64 err_data_buffer, u64 *capabilities, u64 *resources) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS_STK(iprv, PAL_MC_ERROR_INJECT, err_type_info, - err_struct_info, err_data_buffer); - if (capabilities) - *capabilities= iprv.v0; - if (resources) - *resources= iprv.v1; - return iprv.status; -} - -static inline s64 -ia64_pal_mc_error_inject_virt (u64 err_type_info, u64 err_struct_info, - u64 err_data_buffer, u64 *capabilities, u64 *resources) -{ - struct ia64_pal_retval iprv; - PAL_CALL_STK(iprv, PAL_MC_ERROR_INJECT, err_type_info, - err_struct_info, err_data_buffer); - if (capabilities) - *capabilities= iprv.v0; - if (resources) - *resources= iprv.v1; - return iprv.status; -} - -/* Inform PALE_CHECK whether a machine check is expected so that PALE_CHECK willnot - * attempt to correct any expected machine checks. - */ -static inline s64 -ia64_pal_mc_expected (u64 expected, u64 *previous) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_EXPECTED, expected, 0, 0); - if (previous) - *previous = iprv.v0; - return iprv.status; -} - -typedef union pal_hw_tracking_u { - u64 pht_data; - struct { - u64 itc :4, /* Instruction cache tracking */ - dct :4, /* Date cache tracking */ - itt :4, /* Instruction TLB tracking */ - ddt :4, /* Data TLB tracking */ - reserved:48; - } pal_hw_tracking_s; -} pal_hw_tracking_u_t; - -/* - * Hardware tracking status. - */ -static inline s64 -ia64_pal_mc_hw_tracking (u64 *status) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_HW_TRACKING, 0, 0, 0); - if (status) - *status = iprv.v0; - return iprv.status; -} - -/* Register a platform dependent location with PAL to which it can save - * minimal processor state in the event of a machine check or initialization - * event. - */ -static inline s64 -ia64_pal_mc_register_mem (u64 physical_addr, u64 size, u64 *req_size) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_REGISTER_MEM, physical_addr, size, 0); - if (req_size) - *req_size = iprv.v0; - return iprv.status; -} - -/* Restore minimal architectural processor state, set CMC interrupt if necessary - * and resume execution - */ -static inline s64 -ia64_pal_mc_resume (u64 set_cmci, u64 save_ptr) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MC_RESUME, set_cmci, save_ptr, 0); - return iprv.status; -} - -/* Return the memory attributes implemented by the processor */ -static inline s64 -ia64_pal_mem_attrib (u64 *mem_attrib) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MEM_ATTRIB, 0, 0, 0); - if (mem_attrib) - *mem_attrib = iprv.v0 & 0xff; - return iprv.status; -} - -/* Return the amount of memory needed for second phase of processor - * self-test and the required alignment of memory. - */ -static inline s64 -ia64_pal_mem_for_test (u64 *bytes_needed, u64 *alignment) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_MEM_FOR_TEST, 0, 0, 0); - if (bytes_needed) - *bytes_needed = iprv.v0; - if (alignment) - *alignment = iprv.v1; - return iprv.status; -} - -typedef union pal_perf_mon_info_u { - u64 ppmi_data; - struct { - u64 generic : 8, - width : 8, - cycles : 8, - retired : 8, - reserved : 32; - } pal_perf_mon_info_s; -} pal_perf_mon_info_u_t; - -/* Return the performance monitor information about what can be counted - * and how to configure the monitors to count the desired events. - */ -static inline s64 -ia64_pal_perf_mon_info (u64 *pm_buffer, pal_perf_mon_info_u_t *pm_info) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_PERF_MON_INFO, (unsigned long) pm_buffer, 0, 0); - if (pm_info) - pm_info->ppmi_data = iprv.v0; - return iprv.status; -} - -/* Specifies the physical address of the processor interrupt block - * and I/O port space. - */ -static inline s64 -ia64_pal_platform_addr (u64 type, u64 physical_addr) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_PLATFORM_ADDR, type, physical_addr, 0); - return iprv.status; -} - -/* Set the SAL PMI entrypoint in memory */ -static inline s64 -ia64_pal_pmi_entrypoint (u64 sal_pmi_entry_addr) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_PMI_ENTRYPOINT, sal_pmi_entry_addr, 0, 0); - return iprv.status; -} - -struct pal_features_s; -/* Provide information about configurable processor features */ -static inline s64 -ia64_pal_proc_get_features (u64 *features_avail, - u64 *features_status, - u64 *features_control, - u64 features_set) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, features_set, 0); - if (iprv.status == 0) { - *features_avail = iprv.v0; - *features_status = iprv.v1; - *features_control = iprv.v2; - } - return iprv.status; -} - -/* Enable/disable processor dependent features */ -static inline s64 -ia64_pal_proc_set_features (u64 feature_select) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES, feature_select, 0, 0); - return iprv.status; -} - -/* - * Put everything in a struct so we avoid the global offset table whenever - * possible. - */ -typedef struct ia64_ptce_info_s { - u64 base; - u32 count[2]; - u32 stride[2]; -} ia64_ptce_info_t; - -/* Return the information required for the architected loop used to purge - * (initialize) the entire TC - */ -static inline s64 -ia64_get_ptce (ia64_ptce_info_t *ptce) -{ - struct ia64_pal_retval iprv; - - if (!ptce) - return -1; - - PAL_CALL(iprv, PAL_PTCE_INFO, 0, 0, 0); - if (iprv.status == 0) { - ptce->base = iprv.v0; - ptce->count[0] = iprv.v1 >> 32; - ptce->count[1] = iprv.v1 & 0xffffffff; - ptce->stride[0] = iprv.v2 >> 32; - ptce->stride[1] = iprv.v2 & 0xffffffff; - } - return iprv.status; -} - -/* Return info about implemented application and control registers. */ -static inline s64 -ia64_pal_register_info (u64 info_request, u64 *reg_info_1, u64 *reg_info_2) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_REGISTER_INFO, info_request, 0, 0); - if (reg_info_1) - *reg_info_1 = iprv.v0; - if (reg_info_2) - *reg_info_2 = iprv.v1; - return iprv.status; -} - -typedef union pal_hints_u { - u64 ph_data; - struct { - u64 si : 1, - li : 1, - reserved : 62; - } pal_hints_s; -} pal_hints_u_t; - -/* Return information about the register stack and RSE for this processor - * implementation. - */ -static inline s64 -ia64_pal_rse_info (u64 *num_phys_stacked, pal_hints_u_t *hints) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_RSE_INFO, 0, 0, 0); - if (num_phys_stacked) - *num_phys_stacked = iprv.v0; - if (hints) - hints->ph_data = iprv.v1; - return iprv.status; -} - -/* - * Set the current hardware resource sharing policy of the processor - */ -static inline s64 -ia64_pal_set_hw_policy (u64 policy) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_SET_HW_POLICY, policy, 0, 0); - return iprv.status; -} - -/* Cause the processor to enter SHUTDOWN state, where prefetching and execution are - * suspended, but cause cache and TLB coherency to be maintained. - * This is usually called in IA-32 mode. - */ -static inline s64 -ia64_pal_shutdown (void) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_SHUTDOWN, 0, 0, 0); - return iprv.status; -} - -/* Perform the second phase of processor self-test. */ -static inline s64 -ia64_pal_test_proc (u64 test_addr, u64 test_size, u64 attributes, u64 *self_test_state) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_TEST_PROC, test_addr, test_size, attributes); - if (self_test_state) - *self_test_state = iprv.v0; - return iprv.status; -} - -typedef union pal_version_u { - u64 pal_version_val; - struct { - u64 pv_pal_b_rev : 8; - u64 pv_pal_b_model : 8; - u64 pv_reserved1 : 8; - u64 pv_pal_vendor : 8; - u64 pv_pal_a_rev : 8; - u64 pv_pal_a_model : 8; - u64 pv_reserved2 : 16; - } pal_version_s; -} pal_version_u_t; - - -/* - * Return PAL version information. While the documentation states that - * PAL_VERSION can be called in either physical or virtual mode, some - * implementations only allow physical calls. We don't call it very often, - * so the overhead isn't worth eliminating. - */ -static inline s64 -ia64_pal_version (pal_version_u_t *pal_min_version, pal_version_u_t *pal_cur_version) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS(iprv, PAL_VERSION, 0, 0, 0); - if (pal_min_version) - pal_min_version->pal_version_val = iprv.v0; - - if (pal_cur_version) - pal_cur_version->pal_version_val = iprv.v1; - - return iprv.status; -} - -typedef union pal_tc_info_u { - u64 pti_val; - struct { - u64 num_sets : 8, - associativity : 8, - num_entries : 16, - pf : 1, - unified : 1, - reduce_tr : 1, - reserved : 29; - } pal_tc_info_s; -} pal_tc_info_u_t; - -#define tc_reduce_tr pal_tc_info_s.reduce_tr -#define tc_unified pal_tc_info_s.unified -#define tc_pf pal_tc_info_s.pf -#define tc_num_entries pal_tc_info_s.num_entries -#define tc_associativity pal_tc_info_s.associativity -#define tc_num_sets pal_tc_info_s.num_sets - - -/* Return information about the virtual memory characteristics of the processor - * implementation. - */ -static inline s64 -ia64_pal_vm_info (u64 tc_level, u64 tc_type, pal_tc_info_u_t *tc_info, u64 *tc_pages) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_VM_INFO, tc_level, tc_type, 0); - if (tc_info) - tc_info->pti_val = iprv.v0; - if (tc_pages) - *tc_pages = iprv.v1; - return iprv.status; -} - -/* Get page size information about the virtual memory characteristics of the processor - * implementation. - */ -static inline s64 -ia64_pal_vm_page_size (u64 *tr_pages, u64 *vw_pages) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_VM_PAGE_SIZE, 0, 0, 0); - if (tr_pages) - *tr_pages = iprv.v0; - if (vw_pages) - *vw_pages = iprv.v1; - return iprv.status; -} - -typedef union pal_vm_info_1_u { - u64 pvi1_val; - struct { - u64 vw : 1, - phys_add_size : 7, - key_size : 8, - max_pkr : 8, - hash_tag_id : 8, - max_dtr_entry : 8, - max_itr_entry : 8, - max_unique_tcs : 8, - num_tc_levels : 8; - } pal_vm_info_1_s; -} pal_vm_info_1_u_t; - -#define PAL_MAX_PURGES 0xFFFF /* all ones is means unlimited */ - -typedef union pal_vm_info_2_u { - u64 pvi2_val; - struct { - u64 impl_va_msb : 8, - rid_size : 8, - max_purges : 16, - reserved : 32; - } pal_vm_info_2_s; -} pal_vm_info_2_u_t; - -/* Get summary information about the virtual memory characteristics of the processor - * implementation. - */ -static inline s64 -ia64_pal_vm_summary (pal_vm_info_1_u_t *vm_info_1, pal_vm_info_2_u_t *vm_info_2) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_VM_SUMMARY, 0, 0, 0); - if (vm_info_1) - vm_info_1->pvi1_val = iprv.v0; - if (vm_info_2) - vm_info_2->pvi2_val = iprv.v1; - return iprv.status; -} - -typedef union pal_vp_info_u { - u64 pvi_val; - struct { - u64 index: 48, /* virtual feature set info */ - vmm_id: 16; /* feature set id */ - } pal_vp_info_s; -} pal_vp_info_u_t; - -/* - * Returns infomation about virtual processor features - */ -static inline s64 -ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_VP_INFO, feature_set, vp_buffer, 0); - if (vp_info) - *vp_info = iprv.v0; - if (vmm_id) - *vmm_id = iprv.v1; - return iprv.status; -} - -typedef union pal_itr_valid_u { - u64 piv_val; - struct { - u64 access_rights_valid : 1, - priv_level_valid : 1, - dirty_bit_valid : 1, - mem_attr_valid : 1, - reserved : 60; - } pal_tr_valid_s; -} pal_tr_valid_u_t; - -/* Read a translation register */ -static inline s64 -ia64_pal_tr_read (u64 reg_num, u64 tr_type, u64 *tr_buffer, pal_tr_valid_u_t *tr_valid) -{ - struct ia64_pal_retval iprv; - PAL_CALL_PHYS_STK(iprv, PAL_VM_TR_READ, reg_num, tr_type,(u64)ia64_tpa(tr_buffer)); - if (tr_valid) - tr_valid->piv_val = iprv.v0; - return iprv.status; -} - -/* - * PAL_PREFETCH_VISIBILITY transaction types - */ -#define PAL_VISIBILITY_VIRTUAL 0 -#define PAL_VISIBILITY_PHYSICAL 1 - -/* - * PAL_PREFETCH_VISIBILITY return codes - */ -#define PAL_VISIBILITY_OK 1 -#define PAL_VISIBILITY_OK_REMOTE_NEEDED 0 -#define PAL_VISIBILITY_INVAL_ARG -2 -#define PAL_VISIBILITY_ERROR -3 - -static inline s64 -ia64_pal_prefetch_visibility (s64 trans_type) -{ - struct ia64_pal_retval iprv; - PAL_CALL(iprv, PAL_PREFETCH_VISIBILITY, trans_type, 0, 0); - return iprv.status; -} - -/* data structure for getting information on logical to physical mappings */ -typedef union pal_log_overview_u { - struct { - u64 num_log :16, /* Total number of logical - * processors on this die - */ - tpc :8, /* Threads per core */ - reserved3 :8, /* Reserved */ - cpp :8, /* Cores per processor */ - reserved2 :8, /* Reserved */ - ppid :8, /* Physical processor ID */ - reserved1 :8; /* Reserved */ - } overview_bits; - u64 overview_data; -} pal_log_overview_t; - -typedef union pal_proc_n_log_info1_u{ - struct { - u64 tid :16, /* Thread id */ - reserved2 :16, /* Reserved */ - cid :16, /* Core id */ - reserved1 :16; /* Reserved */ - } ppli1_bits; - u64 ppli1_data; -} pal_proc_n_log_info1_t; - -typedef union pal_proc_n_log_info2_u { - struct { - u64 la :16, /* Logical address */ - reserved :48; /* Reserved */ - } ppli2_bits; - u64 ppli2_data; -} pal_proc_n_log_info2_t; - -typedef struct pal_logical_to_physical_s -{ - pal_log_overview_t overview; - pal_proc_n_log_info1_t ppli1; - pal_proc_n_log_info2_t ppli2; -} pal_logical_to_physical_t; - -#define overview_num_log overview.overview_bits.num_log -#define overview_tpc overview.overview_bits.tpc -#define overview_cpp overview.overview_bits.cpp -#define overview_ppid overview.overview_bits.ppid -#define log1_tid ppli1.ppli1_bits.tid -#define log1_cid ppli1.ppli1_bits.cid -#define log2_la ppli2.ppli2_bits.la - -/* Get information on logical to physical processor mappings. */ -static inline s64 -ia64_pal_logical_to_phys(u64 proc_number, pal_logical_to_physical_t *mapping) -{ - struct ia64_pal_retval iprv; - - PAL_CALL(iprv, PAL_LOGICAL_TO_PHYSICAL, proc_number, 0, 0); - - if (iprv.status == PAL_STATUS_SUCCESS) - { - mapping->overview.overview_data = iprv.v0; - mapping->ppli1.ppli1_data = iprv.v1; - mapping->ppli2.ppli2_data = iprv.v2; - } - - return iprv.status; -} - -typedef struct pal_cache_shared_info_s -{ - u64 num_shared; - pal_proc_n_log_info1_t ppli1; - pal_proc_n_log_info2_t ppli2; -} pal_cache_shared_info_t; - -/* Get information on logical to physical processor mappings. */ -static inline s64 -ia64_pal_cache_shared_info(u64 level, - u64 type, - u64 proc_number, - pal_cache_shared_info_t *info) -{ - struct ia64_pal_retval iprv; - - PAL_CALL(iprv, PAL_CACHE_SHARED_INFO, level, type, proc_number); - - if (iprv.status == PAL_STATUS_SUCCESS) { - info->num_shared = iprv.v0; - info->ppli1.ppli1_data = iprv.v1; - info->ppli2.ppli2_data = iprv.v2; - } - - return iprv.status; -} -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_IA64_PAL_H */ diff --git a/include/asm-ia64/param.h b/include/asm-ia64/param.h deleted file mode 100644 index 0964c32..0000000 --- a/include/asm-ia64/param.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _ASM_IA64_PARAM_H -#define _ASM_IA64_PARAM_H - -/* - * Fundamental kernel parameters. - * - * Based on . - * - * Modified 1998, 1999, 2002-2003 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#define EXEC_PAGESIZE 65536 - -#ifndef NOGROUP -# define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ -# define USER_HZ HZ -# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ -#else - /* - * Technically, this is wrong, but some old apps still refer to it. The proper way to - * get the HZ value is via sysconf(_SC_CLK_TCK). - */ -# define HZ 1024 -#endif - -#endif /* _ASM_IA64_PARAM_H */ diff --git a/include/asm-ia64/paravirt.h b/include/asm-ia64/paravirt.h deleted file mode 100644 index 1b4df12..0000000 --- a/include/asm-ia64/paravirt.h +++ /dev/null @@ -1,255 +0,0 @@ -/****************************************************************************** - * include/asm-ia64/paravirt.h - * - * Copyright (c) 2008 Isaku Yamahata - * VA Linux Systems Japan K.K. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - - -#ifndef __ASM_PARAVIRT_H -#define __ASM_PARAVIRT_H - -#ifdef CONFIG_PARAVIRT_GUEST - -#define PARAVIRT_HYPERVISOR_TYPE_DEFAULT 0 -#define PARAVIRT_HYPERVISOR_TYPE_XEN 1 - -#ifndef __ASSEMBLY__ - -#include -#include - -/****************************************************************************** - * general info - */ -struct pv_info { - unsigned int kernel_rpl; - int paravirt_enabled; - const char *name; -}; - -extern struct pv_info pv_info; - -static inline int paravirt_enabled(void) -{ - return pv_info.paravirt_enabled; -} - -static inline unsigned int get_kernel_rpl(void) -{ - return pv_info.kernel_rpl; -} - -/****************************************************************************** - * initialization hooks. - */ -struct rsvd_region; - -struct pv_init_ops { - void (*banner)(void); - - int (*reserve_memory)(struct rsvd_region *region); - - void (*arch_setup_early)(void); - void (*arch_setup_console)(char **cmdline_p); - int (*arch_setup_nomca)(void); - - void (*post_smp_prepare_boot_cpu)(void); -}; - -extern struct pv_init_ops pv_init_ops; - -static inline void paravirt_banner(void) -{ - if (pv_init_ops.banner) - pv_init_ops.banner(); -} - -static inline int paravirt_reserve_memory(struct rsvd_region *region) -{ - if (pv_init_ops.reserve_memory) - return pv_init_ops.reserve_memory(region); - return 0; -} - -static inline void paravirt_arch_setup_early(void) -{ - if (pv_init_ops.arch_setup_early) - pv_init_ops.arch_setup_early(); -} - -static inline void paravirt_arch_setup_console(char **cmdline_p) -{ - if (pv_init_ops.arch_setup_console) - pv_init_ops.arch_setup_console(cmdline_p); -} - -static inline int paravirt_arch_setup_nomca(void) -{ - if (pv_init_ops.arch_setup_nomca) - return pv_init_ops.arch_setup_nomca(); - return 0; -} - -static inline void paravirt_post_smp_prepare_boot_cpu(void) -{ - if (pv_init_ops.post_smp_prepare_boot_cpu) - pv_init_ops.post_smp_prepare_boot_cpu(); -} - -/****************************************************************************** - * replacement of iosapic operations. - */ - -struct pv_iosapic_ops { - void (*pcat_compat_init)(void); - - struct irq_chip *(*get_irq_chip)(unsigned long trigger); - - unsigned int (*__read)(char __iomem *iosapic, unsigned int reg); - void (*__write)(char __iomem *iosapic, unsigned int reg, u32 val); -}; - -extern struct pv_iosapic_ops pv_iosapic_ops; - -static inline void -iosapic_pcat_compat_init(void) -{ - if (pv_iosapic_ops.pcat_compat_init) - pv_iosapic_ops.pcat_compat_init(); -} - -static inline struct irq_chip* -iosapic_get_irq_chip(unsigned long trigger) -{ - return pv_iosapic_ops.get_irq_chip(trigger); -} - -static inline unsigned int -__iosapic_read(char __iomem *iosapic, unsigned int reg) -{ - return pv_iosapic_ops.__read(iosapic, reg); -} - -static inline void -__iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) -{ - return pv_iosapic_ops.__write(iosapic, reg, val); -} - -/****************************************************************************** - * replacement of irq operations. - */ - -struct pv_irq_ops { - void (*register_ipi)(void); - - int (*assign_irq_vector)(int irq); - void (*free_irq_vector)(int vector); - - void (*register_percpu_irq)(ia64_vector vec, - struct irqaction *action); - - void (*resend_irq)(unsigned int vector); -}; - -extern struct pv_irq_ops pv_irq_ops; - -static inline void -ia64_register_ipi(void) -{ - pv_irq_ops.register_ipi(); -} - -static inline int -assign_irq_vector(int irq) -{ - return pv_irq_ops.assign_irq_vector(irq); -} - -static inline void -free_irq_vector(int vector) -{ - return pv_irq_ops.free_irq_vector(vector); -} - -static inline void -register_percpu_irq(ia64_vector vec, struct irqaction *action) -{ - pv_irq_ops.register_percpu_irq(vec, action); -} - -static inline void -ia64_resend_irq(unsigned int vector) -{ - pv_irq_ops.resend_irq(vector); -} - -/****************************************************************************** - * replacement of time operations. - */ - -extern struct itc_jitter_data_t itc_jitter_data; -extern volatile int time_keeper_id; - -struct pv_time_ops { - void (*init_missing_ticks_accounting)(int cpu); - int (*do_steal_accounting)(unsigned long *new_itm); - - void (*clocksource_resume)(void); -}; - -extern struct pv_time_ops pv_time_ops; - -static inline void -paravirt_init_missing_ticks_accounting(int cpu) -{ - if (pv_time_ops.init_missing_ticks_accounting) - pv_time_ops.init_missing_ticks_accounting(cpu); -} - -static inline int -paravirt_do_steal_accounting(unsigned long *new_itm) -{ - return pv_time_ops.do_steal_accounting(new_itm); -} - -#endif /* !__ASSEMBLY__ */ - -#else -/* fallback for native case */ - -#ifndef __ASSEMBLY__ - -#define paravirt_banner() do { } while (0) -#define paravirt_reserve_memory(region) 0 - -#define paravirt_arch_setup_early() do { } while (0) -#define paravirt_arch_setup_console(cmdline_p) do { } while (0) -#define paravirt_arch_setup_nomca() 0 -#define paravirt_post_smp_prepare_boot_cpu() do { } while (0) - -#define paravirt_init_missing_ticks_accounting(cpu) do { } while (0) -#define paravirt_do_steal_accounting(new_itm) 0 - -#endif /* __ASSEMBLY__ */ - - -#endif /* CONFIG_PARAVIRT_GUEST */ - -#endif /* __ASM_PARAVIRT_H */ diff --git a/include/asm-ia64/paravirt_privop.h b/include/asm-ia64/paravirt_privop.h deleted file mode 100644 index 52482e6..0000000 --- a/include/asm-ia64/paravirt_privop.h +++ /dev/null @@ -1,114 +0,0 @@ -/****************************************************************************** - * include/asm-ia64/paravirt_privops.h - * - * Copyright (c) 2008 Isaku Yamahata - * VA Linux Systems Japan K.K. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef _ASM_IA64_PARAVIRT_PRIVOP_H -#define _ASM_IA64_PARAVIRT_PRIVOP_H - -#ifdef CONFIG_PARAVIRT - -#ifndef __ASSEMBLY__ - -#include -#include /* for IA64_PSR_I */ - -/****************************************************************************** - * replacement of intrinsics operations. - */ - -struct pv_cpu_ops { - void (*fc)(unsigned long addr); - unsigned long (*thash)(unsigned long addr); - unsigned long (*get_cpuid)(int index); - unsigned long (*get_pmd)(int index); - unsigned long (*getreg)(int reg); - void (*setreg)(int reg, unsigned long val); - void (*ptcga)(unsigned long addr, unsigned long size); - unsigned long (*get_rr)(unsigned long index); - void (*set_rr)(unsigned long index, unsigned long val); - void (*set_rr0_to_rr4)(unsigned long val0, unsigned long val1, - unsigned long val2, unsigned long val3, - unsigned long val4); - void (*ssm_i)(void); - void (*rsm_i)(void); - unsigned long (*get_psr_i)(void); - void (*intrin_local_irq_restore)(unsigned long flags); -}; - -extern struct pv_cpu_ops pv_cpu_ops; - -extern void ia64_native_setreg_func(int regnum, unsigned long val); -extern unsigned long ia64_native_getreg_func(int regnum); - -/************************************************/ -/* Instructions paravirtualized for performance */ -/************************************************/ - -/* mask for ia64_native_ssm/rsm() must be constant.("i" constraing). - * static inline function doesn't satisfy it. */ -#define paravirt_ssm(mask) \ - do { \ - if ((mask) == IA64_PSR_I) \ - pv_cpu_ops.ssm_i(); \ - else \ - ia64_native_ssm(mask); \ - } while (0) - -#define paravirt_rsm(mask) \ - do { \ - if ((mask) == IA64_PSR_I) \ - pv_cpu_ops.rsm_i(); \ - else \ - ia64_native_rsm(mask); \ - } while (0) - -/****************************************************************************** - * replacement of hand written assembly codes. - */ -struct pv_cpu_asm_switch { - unsigned long switch_to; - unsigned long leave_syscall; - unsigned long work_processed_syscall; - unsigned long leave_kernel; -}; -void paravirt_cpu_asm_init(const struct pv_cpu_asm_switch *cpu_asm_switch); - -#endif /* __ASSEMBLY__ */ - -#define IA64_PARAVIRT_ASM_FUNC(name) paravirt_ ## name - -#else - -/* fallback for native case */ -#define IA64_PARAVIRT_ASM_FUNC(name) ia64_native_ ## name - -#endif /* CONFIG_PARAVIRT */ - -/* these routines utilize privilege-sensitive or performance-sensitive - * privileged instructions so the code must be replaced with - * paravirtualized versions */ -#define ia64_switch_to IA64_PARAVIRT_ASM_FUNC(switch_to) -#define ia64_leave_syscall IA64_PARAVIRT_ASM_FUNC(leave_syscall) -#define ia64_work_processed_syscall \ - IA64_PARAVIRT_ASM_FUNC(work_processed_syscall) -#define ia64_leave_kernel IA64_PARAVIRT_ASM_FUNC(leave_kernel) - -#endif /* _ASM_IA64_PARAVIRT_PRIVOP_H */ diff --git a/include/asm-ia64/parport.h b/include/asm-ia64/parport.h deleted file mode 100644 index 67e16ad..0000000 --- a/include/asm-ia64/parport.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * parport.h: platform-specific PC-style parport initialisation - * - * Copyright (C) 1999, 2000 Tim Waugh - * - * This file should only be included by drivers/parport/parport_pc.c. - */ - -#ifndef _ASM_IA64_PARPORT_H -#define _ASM_IA64_PARPORT_H 1 - -static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); - -static int __devinit -parport_pc_find_nonpci_ports (int autoirq, int autodma) -{ - return parport_pc_find_isa_ports(autoirq, autodma); -} - -#endif /* _ASM_IA64_PARPORT_H */ diff --git a/include/asm-ia64/patch.h b/include/asm-ia64/patch.h deleted file mode 100644 index 295fe6a..0000000 --- a/include/asm-ia64/patch.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _ASM_IA64_PATCH_H -#define _ASM_IA64_PATCH_H - -/* - * Copyright (C) 2003 Hewlett-Packard Co - * David Mosberger-Tang - * - * There are a number of reasons for patching instructions. Rather than duplicating code - * all over the place, we put the common stuff here. Reasons for patching: in-kernel - * module-loader, virtual-to-physical patch-list, McKinley Errata 9 workaround, and gate - * shared library. Undoubtedly, some of these reasons will disappear and others will - * be added over time. - */ -#include -#include - -extern void ia64_patch (u64 insn_addr, u64 mask, u64 val); /* patch any insn slot */ -extern void ia64_patch_imm64 (u64 insn_addr, u64 val); /* patch "movl" w/abs. value*/ -extern void ia64_patch_imm60 (u64 insn_addr, u64 val); /* patch "brl" w/ip-rel value */ - -extern void ia64_patch_mckinley_e9 (unsigned long start, unsigned long end); -extern void ia64_patch_vtop (unsigned long start, unsigned long end); -extern void ia64_patch_phys_stack_reg(unsigned long val); -extern void ia64_patch_rse (unsigned long start, unsigned long end); -extern void ia64_patch_gate (void); - -#endif /* _ASM_IA64_PATCH_H */ diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h deleted file mode 100644 index 0149097..0000000 --- a/include/asm-ia64/pci.h +++ /dev/null @@ -1,167 +0,0 @@ -#ifndef _ASM_IA64_PCI_H -#define _ASM_IA64_PCI_H - -#include -#include -#include -#include -#include - -#include -#include -#include - -/* - * Can be used to override the logic in pci_scan_bus for skipping already-configured bus - * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the - * loader. - */ -#define pcibios_assign_all_busses() 0 -#define pcibios_scan_all_fns(a, b) 0 - -#define PCIBIOS_MIN_IO 0x1000 -#define PCIBIOS_MIN_MEM 0x10000000 - -void pcibios_config_init(void); - -struct pci_dev; - -/* - * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct - * correspondence between device bus addresses and CPU physical addresses. - * Platforms with a hardware I/O MMU _must_ turn this off to suppress the - * bounce buffer handling code in the block and network device layers. - * Platforms with separate bus address spaces _must_ turn this off and provide - * a device DMA mapping implementation that takes care of the necessary - * address translation. - * - * For now, the ia64 platforms which may have separate/multiple bus address - * spaces all have I/O MMUs which support the merging of physically - * discontiguous buffers, so we can use that as the sole factor to determine - * the setting of PCI_DMA_BUS_IS_PHYS. - */ -extern unsigned long ia64_max_iommu_merge_mask; -#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) - -static inline void -pcibios_set_master (struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void -pcibios_penalize_isa_irq (int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -#include - -/* pci_unmap_{single,page} is not a nop, thus... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - unsigned long cacheline_size; - u8 byte; - - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); - if (byte == 0) - cacheline_size = 1024; - else - cacheline_size = (int) byte * 4; - - *strat = PCI_DMA_BURST_MULTIPLE; - *strategy_parameter = cacheline_size; -} -#endif - -#define HAVE_PCI_MMAP -extern int pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, int write_combine); -#define HAVE_PCI_LEGACY -extern int pci_mmap_legacy_page_range(struct pci_bus *bus, - struct vm_area_struct *vma); -extern ssize_t pci_read_legacy_io(struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count); -extern ssize_t pci_write_legacy_io(struct kobject *kobj, - struct bin_attribute *bin_attr, - char *buf, loff_t off, size_t count); -extern int pci_mmap_legacy_mem(struct kobject *kobj, - struct bin_attribute *attr, - struct vm_area_struct *vma); - -#define pci_get_legacy_mem platform_pci_get_legacy_mem -#define pci_legacy_read platform_pci_legacy_read -#define pci_legacy_write platform_pci_legacy_write - -struct pci_window { - struct resource resource; - u64 offset; -}; - -struct pci_controller { - void *acpi_handle; - void *iommu; - int segment; - int node; /* nearest node with memory or -1 for global allocation */ - - unsigned int windows; - struct pci_window *window; - - void *platform_data; -}; - -#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata) -#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment) - -extern struct pci_ops pci_root_ops; - -static inline int pci_proc_domain(struct pci_bus *bus) -{ - return (pci_domain_nr(bus) != 0); -} - -extern void pcibios_resource_to_bus(struct pci_dev *dev, - struct pci_bus_region *region, struct resource *res); - -extern void pcibios_bus_to_resource(struct pci_dev *dev, - struct resource *res, struct pci_bus_region *region); - -static inline struct resource * -pcibios_select_root(struct pci_dev *pdev, struct resource *res) -{ - struct resource *root = NULL; - - if (res->flags & IORESOURCE_IO) - root = &ioport_resource; - if (res->flags & IORESOURCE_MEM) - root = &iomem_resource; - - return root; -} - -#define pcibios_scan_all_fns(a, b) 0 - -#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) -{ - return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14); -} - -#endif /* _ASM_IA64_PCI_H */ diff --git a/include/asm-ia64/percpu.h b/include/asm-ia64/percpu.h deleted file mode 100644 index 77f30b6..0000000 --- a/include/asm-ia64/percpu.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _ASM_IA64_PERCPU_H -#define _ASM_IA64_PERCPU_H - -/* - * Copyright (C) 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#define PERCPU_ENOUGH_ROOM PERCPU_PAGE_SIZE - -#ifdef __ASSEMBLY__ -# define THIS_CPU(var) (per_cpu__##var) /* use this to mark accesses to per-CPU variables... */ -#else /* !__ASSEMBLY__ */ - - -#include - -#ifdef CONFIG_SMP - -#ifdef HAVE_MODEL_SMALL_ATTRIBUTE -# define PER_CPU_ATTRIBUTES __attribute__((__model__ (__small__))) -#endif - -#define __my_cpu_offset __ia64_per_cpu_var(local_per_cpu_offset) - -extern void *per_cpu_init(void); - -#else /* ! SMP */ - -#define PER_CPU_ATTRIBUTES __attribute__((__section__(".data.percpu"))) - -#define per_cpu_init() (__phys_per_cpu_start) - -#endif /* SMP */ - -/* - * Be extremely careful when taking the address of this variable! Due to virtual - * remapping, it is different from the canonical address returned by __get_cpu_var(var)! - * On the positive side, using __ia64_per_cpu_var() instead of __get_cpu_var() is slightly - * more efficient. - */ -#define __ia64_per_cpu_var(var) per_cpu__##var - -#include - -/* Equal to __per_cpu_offset[smp_processor_id()], but faster to access: */ -DECLARE_PER_CPU(unsigned long, local_per_cpu_offset); - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_PERCPU_H */ diff --git a/include/asm-ia64/perfmon.h b/include/asm-ia64/perfmon.h deleted file mode 100644 index 7f3333d..0000000 --- a/include/asm-ia64/perfmon.h +++ /dev/null @@ -1,279 +0,0 @@ -/* - * Copyright (C) 2001-2003 Hewlett-Packard Co - * Stephane Eranian - */ - -#ifndef _ASM_IA64_PERFMON_H -#define _ASM_IA64_PERFMON_H - -/* - * perfmon comamnds supported on all CPU models - */ -#define PFM_WRITE_PMCS 0x01 -#define PFM_WRITE_PMDS 0x02 -#define PFM_READ_PMDS 0x03 -#define PFM_STOP 0x04 -#define PFM_START 0x05 -#define PFM_ENABLE 0x06 /* obsolete */ -#define PFM_DISABLE 0x07 /* obsolete */ -#define PFM_CREATE_CONTEXT 0x08 -#define PFM_DESTROY_CONTEXT 0x09 /* obsolete use close() */ -#define PFM_RESTART 0x0a -#define PFM_PROTECT_CONTEXT 0x0b /* obsolete */ -#define PFM_GET_FEATURES 0x0c -#define PFM_DEBUG 0x0d -#define PFM_UNPROTECT_CONTEXT 0x0e /* obsolete */ -#define PFM_GET_PMC_RESET_VAL 0x0f -#define PFM_LOAD_CONTEXT 0x10 -#define PFM_UNLOAD_CONTEXT 0x11 - -/* - * PMU model specific commands (may not be supported on all PMU models) - */ -#define PFM_WRITE_IBRS 0x20 -#define PFM_WRITE_DBRS 0x21 - -/* - * context flags - */ -#define PFM_FL_NOTIFY_BLOCK 0x01 /* block task on user level notifications */ -#define PFM_FL_SYSTEM_WIDE 0x02 /* create a system wide context */ -#define PFM_FL_OVFL_NO_MSG 0x80 /* do not post overflow/end messages for notification */ - -/* - * event set flags - */ -#define PFM_SETFL_EXCL_IDLE 0x01 /* exclude idle task (syswide only) XXX: DO NOT USE YET */ - -/* - * PMC flags - */ -#define PFM_REGFL_OVFL_NOTIFY 0x1 /* send notification on overflow */ -#define PFM_REGFL_RANDOM 0x2 /* randomize sampling interval */ - -/* - * PMD/PMC/IBR/DBR return flags (ignored on input) - * - * Those flags are used on output and must be checked in case EAGAIN is returned - * by any of the calls using a pfarg_reg_t or pfarg_dbreg_t structure. - */ -#define PFM_REG_RETFL_NOTAVAIL (1UL<<31) /* set if register is implemented but not available */ -#define PFM_REG_RETFL_EINVAL (1UL<<30) /* set if register entry is invalid */ -#define PFM_REG_RETFL_MASK (PFM_REG_RETFL_NOTAVAIL|PFM_REG_RETFL_EINVAL) - -#define PFM_REG_HAS_ERROR(flag) (((flag) & PFM_REG_RETFL_MASK) != 0) - -typedef unsigned char pfm_uuid_t[16]; /* custom sampling buffer identifier type */ - -/* - * Request structure used to define a context - */ -typedef struct { - pfm_uuid_t ctx_smpl_buf_id; /* which buffer format to use (if needed) */ - unsigned long ctx_flags; /* noblock/block */ - unsigned short ctx_nextra_sets; /* number of extra event sets (you always get 1) */ - unsigned short ctx_reserved1; /* for future use */ - int ctx_fd; /* return arg: unique identification for context */ - void *ctx_smpl_vaddr; /* return arg: virtual address of sampling buffer, is used */ - unsigned long ctx_reserved2[11];/* for future use */ -} pfarg_context_t; - -/* - * Request structure used to write/read a PMC or PMD - */ -typedef struct { - unsigned int reg_num; /* which register */ - unsigned short reg_set; /* event set for this register */ - unsigned short reg_reserved1; /* for future use */ - - unsigned long reg_value; /* initial pmc/pmd value */ - unsigned long reg_flags; /* input: pmc/pmd flags, return: reg error */ - - unsigned long reg_long_reset; /* reset after buffer overflow notification */ - unsigned long reg_short_reset; /* reset after counter overflow */ - - unsigned long reg_reset_pmds[4]; /* which other counters to reset on overflow */ - unsigned long reg_random_seed; /* seed value when randomization is used */ - unsigned long reg_random_mask; /* bitmask used to limit random value */ - unsigned long reg_last_reset_val;/* return: PMD last reset value */ - - unsigned long reg_smpl_pmds[4]; /* which pmds are accessed when PMC overflows */ - unsigned long reg_smpl_eventid; /* opaque sampling event identifier */ - - unsigned long reg_reserved2[3]; /* for future use */ -} pfarg_reg_t; - -typedef struct { - unsigned int dbreg_num; /* which debug register */ - unsigned short dbreg_set; /* event set for this register */ - unsigned short dbreg_reserved1; /* for future use */ - unsigned long dbreg_value; /* value for debug register */ - unsigned long dbreg_flags; /* return: dbreg error */ - unsigned long dbreg_reserved2[1]; /* for future use */ -} pfarg_dbreg_t; - -typedef struct { - unsigned int ft_version; /* perfmon: major [16-31], minor [0-15] */ - unsigned int ft_reserved; /* reserved for future use */ - unsigned long reserved[4]; /* for future use */ -} pfarg_features_t; - -typedef struct { - pid_t load_pid; /* process to load the context into */ - unsigned short load_set; /* first event set to load */ - unsigned short load_reserved1; /* for future use */ - unsigned long load_reserved2[3]; /* for future use */ -} pfarg_load_t; - -typedef struct { - int msg_type; /* generic message header */ - int msg_ctx_fd; /* generic message header */ - unsigned long msg_ovfl_pmds[4]; /* which PMDs overflowed */ - unsigned short msg_active_set; /* active set at the time of overflow */ - unsigned short msg_reserved1; /* for future use */ - unsigned int msg_reserved2; /* for future use */ - unsigned long msg_tstamp; /* for perf tuning/debug */ -} pfm_ovfl_msg_t; - -typedef struct { - int msg_type; /* generic message header */ - int msg_ctx_fd; /* generic message header */ - unsigned long msg_tstamp; /* for perf tuning */ -} pfm_end_msg_t; - -typedef struct { - int msg_type; /* type of the message */ - int msg_ctx_fd; /* unique identifier for the context */ - unsigned long msg_tstamp; /* for perf tuning */ -} pfm_gen_msg_t; - -#define PFM_MSG_OVFL 1 /* an overflow happened */ -#define PFM_MSG_END 2 /* task to which context was attached ended */ - -typedef union { - pfm_ovfl_msg_t pfm_ovfl_msg; - pfm_end_msg_t pfm_end_msg; - pfm_gen_msg_t pfm_gen_msg; -} pfm_msg_t; - -/* - * Define the version numbers for both perfmon as a whole and the sampling buffer format. - */ -#define PFM_VERSION_MAJ 2U -#define PFM_VERSION_MIN 0U -#define PFM_VERSION (((PFM_VERSION_MAJ&0xffff)<<16)|(PFM_VERSION_MIN & 0xffff)) -#define PFM_VERSION_MAJOR(x) (((x)>>16) & 0xffff) -#define PFM_VERSION_MINOR(x) ((x) & 0xffff) - - -/* - * miscellaneous architected definitions - */ -#define PMU_FIRST_COUNTER 4 /* first counting monitor (PMC/PMD) */ -#define PMU_MAX_PMCS 256 /* maximum architected number of PMC registers */ -#define PMU_MAX_PMDS 256 /* maximum architected number of PMD registers */ - -#ifdef __KERNEL__ - -extern long perfmonctl(int fd, int cmd, void *arg, int narg); - -typedef struct { - void (*handler)(int irq, void *arg, struct pt_regs *regs); -} pfm_intr_handler_desc_t; - -extern void pfm_save_regs (struct task_struct *); -extern void pfm_load_regs (struct task_struct *); - -extern void pfm_exit_thread(struct task_struct *); -extern int pfm_use_debug_registers(struct task_struct *); -extern int pfm_release_debug_registers(struct task_struct *); -extern void pfm_syst_wide_update_task(struct task_struct *, unsigned long info, int is_ctxswin); -extern void pfm_inherit(struct task_struct *task, struct pt_regs *regs); -extern void pfm_init_percpu(void); -extern void pfm_handle_work(void); -extern int pfm_install_alt_pmu_interrupt(pfm_intr_handler_desc_t *h); -extern int pfm_remove_alt_pmu_interrupt(pfm_intr_handler_desc_t *h); - - - -/* - * Reset PMD register flags - */ -#define PFM_PMD_SHORT_RESET 0 -#define PFM_PMD_LONG_RESET 1 - -typedef union { - unsigned int val; - struct { - unsigned int notify_user:1; /* notify user program of overflow */ - unsigned int reset_ovfl_pmds:1; /* reset overflowed PMDs */ - unsigned int block_task:1; /* block monitored task on kernel exit */ - unsigned int mask_monitoring:1; /* mask monitors via PMCx.plm */ - unsigned int reserved:28; /* for future use */ - } bits; -} pfm_ovfl_ctrl_t; - -typedef struct { - unsigned char ovfl_pmd; /* index of overflowed PMD */ - unsigned char ovfl_notify; /* =1 if monitor requested overflow notification */ - unsigned short active_set; /* event set active at the time of the overflow */ - pfm_ovfl_ctrl_t ovfl_ctrl; /* return: perfmon controls to set by handler */ - - unsigned long pmd_last_reset; /* last reset value of of the PMD */ - unsigned long smpl_pmds[4]; /* bitmask of other PMD of interest on overflow */ - unsigned long smpl_pmds_values[PMU_MAX_PMDS]; /* values for the other PMDs of interest */ - unsigned long pmd_value; /* current 64-bit value of the PMD */ - unsigned long pmd_eventid; /* eventid associated with PMD */ -} pfm_ovfl_arg_t; - - -typedef struct { - char *fmt_name; - pfm_uuid_t fmt_uuid; - size_t fmt_arg_size; - unsigned long fmt_flags; - - int (*fmt_validate)(struct task_struct *task, unsigned int flags, int cpu, void *arg); - int (*fmt_getsize)(struct task_struct *task, unsigned int flags, int cpu, void *arg, unsigned long *size); - int (*fmt_init)(struct task_struct *task, void *buf, unsigned int flags, int cpu, void *arg); - int (*fmt_handler)(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct pt_regs *regs, unsigned long stamp); - int (*fmt_restart)(struct task_struct *task, pfm_ovfl_ctrl_t *ctrl, void *buf, struct pt_regs *regs); - int (*fmt_restart_active)(struct task_struct *task, pfm_ovfl_ctrl_t *ctrl, void *buf, struct pt_regs *regs); - int (*fmt_exit)(struct task_struct *task, void *buf, struct pt_regs *regs); - - struct list_head fmt_list; -} pfm_buffer_fmt_t; - -extern int pfm_register_buffer_fmt(pfm_buffer_fmt_t *fmt); -extern int pfm_unregister_buffer_fmt(pfm_uuid_t uuid); - -/* - * perfmon interface exported to modules - */ -extern int pfm_mod_read_pmds(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs); -extern int pfm_mod_write_pmcs(struct task_struct *, void *req, unsigned int nreq, struct pt_regs *regs); -extern int pfm_mod_write_ibrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs); -extern int pfm_mod_write_dbrs(struct task_struct *task, void *req, unsigned int nreq, struct pt_regs *regs); - -/* - * describe the content of the local_cpu_date->pfm_syst_info field - */ -#define PFM_CPUINFO_SYST_WIDE 0x1 /* if set a system wide session exists */ -#define PFM_CPUINFO_DCR_PP 0x2 /* if set the system wide session has started */ -#define PFM_CPUINFO_EXCL_IDLE 0x4 /* the system wide session excludes the idle task */ - -/* - * sysctl control structure. visible to sampling formats - */ -typedef struct { - int debug; /* turn on/off debugging via syslog */ - int debug_ovfl; /* turn on/off debug printk in overflow handler */ - int fastctxsw; /* turn on/off fast (unsecure) ctxsw */ - int expert_mode; /* turn on/off value checking */ -} pfm_sysctl_t; -extern pfm_sysctl_t pfm_sysctl; - - -#endif /* __KERNEL__ */ - -#endif /* _ASM_IA64_PERFMON_H */ diff --git a/include/asm-ia64/perfmon_default_smpl.h b/include/asm-ia64/perfmon_default_smpl.h deleted file mode 100644 index 48822c0..0000000 --- a/include/asm-ia64/perfmon_default_smpl.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (C) 2002-2003 Hewlett-Packard Co - * Stephane Eranian - * - * This file implements the default sampling buffer format - * for Linux/ia64 perfmon subsystem. - */ -#ifndef __PERFMON_DEFAULT_SMPL_H__ -#define __PERFMON_DEFAULT_SMPL_H__ 1 - -#define PFM_DEFAULT_SMPL_UUID { \ - 0x4d, 0x72, 0xbe, 0xc0, 0x06, 0x64, 0x41, 0x43, 0x82, 0xb4, 0xd3, 0xfd, 0x27, 0x24, 0x3c, 0x97} - -/* - * format specific parameters (passed at context creation) - */ -typedef struct { - unsigned long buf_size; /* size of the buffer in bytes */ - unsigned int flags; /* buffer specific flags */ - unsigned int res1; /* for future use */ - unsigned long reserved[2]; /* for future use */ -} pfm_default_smpl_arg_t; - -/* - * combined context+format specific structure. Can be passed - * to PFM_CONTEXT_CREATE - */ -typedef struct { - pfarg_context_t ctx_arg; - pfm_default_smpl_arg_t buf_arg; -} pfm_default_smpl_ctx_arg_t; - -/* - * This header is at the beginning of the sampling buffer returned to the user. - * It is directly followed by the first record. - */ -typedef struct { - unsigned long hdr_count; /* how many valid entries */ - unsigned long hdr_cur_offs; /* current offset from top of buffer */ - unsigned long hdr_reserved2; /* reserved for future use */ - - unsigned long hdr_overflows; /* how many times the buffer overflowed */ - unsigned long hdr_buf_size; /* how many bytes in the buffer */ - - unsigned int hdr_version; /* contains perfmon version (smpl format diffs) */ - unsigned int hdr_reserved1; /* for future use */ - unsigned long hdr_reserved[10]; /* for future use */ -} pfm_default_smpl_hdr_t; - -/* - * Entry header in the sampling buffer. The header is directly followed - * with the values of the PMD registers of interest saved in increasing - * index order: PMD4, PMD5, and so on. How many PMDs are present depends - * on how the session was programmed. - * - * In the case where multiple counters overflow at the same time, multiple - * entries are written consecutively. - * - * last_reset_value member indicates the initial value of the overflowed PMD. - */ -typedef struct { - int pid; /* thread id (for NPTL, this is gettid()) */ - unsigned char reserved1[3]; /* reserved for future use */ - unsigned char ovfl_pmd; /* index of overflowed PMD */ - - unsigned long last_reset_val; /* initial value of overflowed PMD */ - unsigned long ip; /* where did the overflow interrupt happened */ - unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ - - unsigned short cpu; /* cpu on which the overfow occured */ - unsigned short set; /* event set active when overflow ocurred */ - int tgid; /* thread group id (for NPTL, this is getpid()) */ -} pfm_default_smpl_entry_t; - -#define PFM_DEFAULT_MAX_PMDS 64 /* how many pmds supported by data structures (sizeof(unsigned long) */ -#define PFM_DEFAULT_MAX_ENTRY_SIZE (sizeof(pfm_default_smpl_entry_t)+(sizeof(unsigned long)*PFM_DEFAULT_MAX_PMDS)) -#define PFM_DEFAULT_SMPL_MIN_BUF_SIZE (sizeof(pfm_default_smpl_hdr_t)+PFM_DEFAULT_MAX_ENTRY_SIZE) - -#define PFM_DEFAULT_SMPL_VERSION_MAJ 2U -#define PFM_DEFAULT_SMPL_VERSION_MIN 0U -#define PFM_DEFAULT_SMPL_VERSION (((PFM_DEFAULT_SMPL_VERSION_MAJ&0xffff)<<16)|(PFM_DEFAULT_SMPL_VERSION_MIN & 0xffff)) - -#endif /* __PERFMON_DEFAULT_SMPL_H__ */ diff --git a/include/asm-ia64/pgalloc.h b/include/asm-ia64/pgalloc.h deleted file mode 100644 index b9ac1a6..0000000 --- a/include/asm-ia64/pgalloc.h +++ /dev/null @@ -1,122 +0,0 @@ -#ifndef _ASM_IA64_PGALLOC_H -#define _ASM_IA64_PGALLOC_H - -/* - * This file contains the functions and defines necessary to allocate - * page tables. - * - * This hopefully works with any (fixed) ia-64 page-size, as defined - * in (currently 8192). - * - * Copyright (C) 1998-2001 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 2000, Goutham Rao - */ - - -#include -#include -#include -#include -#include - -#include - -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(0, NULL, pgd); -} - -#ifdef CONFIG_PGTABLE_4 -static inline void -pgd_populate(struct mm_struct *mm, pgd_t * pgd_entry, pud_t * pud) -{ - pgd_val(*pgd_entry) = __pa(pud); -} - -static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pud_free(struct mm_struct *mm, pud_t *pud) -{ - quicklist_free(0, NULL, pud); -} -#define __pud_free_tlb(tlb, pud) pud_free((tlb)->mm, pud) -#endif /* CONFIG_PGTABLE_4 */ - -static inline void -pud_populate(struct mm_struct *mm, pud_t * pud_entry, pmd_t * pmd) -{ - pud_val(*pud_entry) = __pa(pmd); -} - -static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) -{ - quicklist_free(0, NULL, pmd); -} - -#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) - -static inline void -pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, pgtable_t pte) -{ - pmd_val(*pmd_entry) = page_to_phys(pte); -} -#define pmd_pgtable(pmd) pmd_page(pmd) - -static inline void -pmd_populate_kernel(struct mm_struct *mm, pmd_t * pmd_entry, pte_t * pte) -{ - pmd_val(*pmd_entry) = __pa(pte); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - struct page *page; - void *pg; - - pg = quicklist_alloc(0, GFP_KERNEL, NULL); - if (!pg) - return NULL; - page = virt_to_page(pg); - pgtable_page_ctor(page); - return page; -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long addr) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t pte) -{ - pgtable_page_dtor(pte); - quicklist_free_page(0, NULL, pte); -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - quicklist_free(0, NULL, pte); -} - -static inline void check_pgt_cache(void) -{ - quicklist_trim(0, NULL, 25, 16); -} - -#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) - -#endif /* _ASM_IA64_PGALLOC_H */ diff --git a/include/asm-ia64/pgtable.h b/include/asm-ia64/pgtable.h deleted file mode 100644 index 7a9bff4..0000000 --- a/include/asm-ia64/pgtable.h +++ /dev/null @@ -1,615 +0,0 @@ -#ifndef _ASM_IA64_PGTABLE_H -#define _ASM_IA64_PGTABLE_H - -/* - * This file contains the functions and defines necessary to modify and use - * the IA-64 page table tree. - * - * This hopefully works with any (fixed) IA-64 page-size, as defined - * in . - * - * Copyright (C) 1998-2005 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#include -#include -#include -#include -#include - -#define IA64_MAX_PHYS_BITS 50 /* max. number of physical address bits (architected) */ - -/* - * First, define the various bits in a PTE. Note that the PTE format - * matches the VHPT short format, the firt doubleword of the VHPD long - * format, and the first doubleword of the TLB insertion format. - */ -#define _PAGE_P_BIT 0 -#define _PAGE_A_BIT 5 -#define _PAGE_D_BIT 6 - -#define _PAGE_P (1 << _PAGE_P_BIT) /* page present bit */ -#define _PAGE_MA_WB (0x0 << 2) /* write back memory attribute */ -#define _PAGE_MA_UC (0x4 << 2) /* uncacheable memory attribute */ -#define _PAGE_MA_UCE (0x5 << 2) /* UC exported attribute */ -#define _PAGE_MA_WC (0x6 << 2) /* write coalescing memory attribute */ -#define _PAGE_MA_NAT (0x7 << 2) /* not-a-thing attribute */ -#define _PAGE_MA_MASK (0x7 << 2) -#define _PAGE_PL_0 (0 << 7) /* privilege level 0 (kernel) */ -#define _PAGE_PL_1 (1 << 7) /* privilege level 1 (unused) */ -#define _PAGE_PL_2 (2 << 7) /* privilege level 2 (unused) */ -#define _PAGE_PL_3 (3 << 7) /* privilege level 3 (user) */ -#define _PAGE_PL_MASK (3 << 7) -#define _PAGE_AR_R (0 << 9) /* read only */ -#define _PAGE_AR_RX (1 << 9) /* read & execute */ -#define _PAGE_AR_RW (2 << 9) /* read & write */ -#define _PAGE_AR_RWX (3 << 9) /* read, write & execute */ -#define _PAGE_AR_R_RW (4 << 9) /* read / read & write */ -#define _PAGE_AR_RX_RWX (5 << 9) /* read & exec / read, write & exec */ -#define _PAGE_AR_RWX_RW (6 << 9) /* read, write & exec / read & write */ -#define _PAGE_AR_X_RX (7 << 9) /* exec & promote / read & exec */ -#define _PAGE_AR_MASK (7 << 9) -#define _PAGE_AR_SHIFT 9 -#define _PAGE_A (1 << _PAGE_A_BIT) /* page accessed bit */ -#define _PAGE_D (1 << _PAGE_D_BIT) /* page dirty bit */ -#define _PAGE_PPN_MASK (((__IA64_UL(1) << IA64_MAX_PHYS_BITS) - 1) & ~0xfffUL) -#define _PAGE_ED (__IA64_UL(1) << 52) /* exception deferral */ -#define _PAGE_PROTNONE (__IA64_UL(1) << 63) - -/* Valid only for a PTE with the present bit cleared: */ -#define _PAGE_FILE (1 << 1) /* see swap & file pte remarks below */ - -#define _PFN_MASK _PAGE_PPN_MASK -/* Mask of bits which may be changed by pte_modify(); the odd bits are there for _PAGE_PROTNONE */ -#define _PAGE_CHG_MASK (_PAGE_P | _PAGE_PROTNONE | _PAGE_PL_MASK | _PAGE_AR_MASK | _PAGE_ED) - -#define _PAGE_SIZE_4K 12 -#define _PAGE_SIZE_8K 13 -#define _PAGE_SIZE_16K 14 -#define _PAGE_SIZE_64K 16 -#define _PAGE_SIZE_256K 18 -#define _PAGE_SIZE_1M 20 -#define _PAGE_SIZE_4M 22 -#define _PAGE_SIZE_16M 24 -#define _PAGE_SIZE_64M 26 -#define _PAGE_SIZE_256M 28 -#define _PAGE_SIZE_1G 30 -#define _PAGE_SIZE_4G 32 - -#define __ACCESS_BITS _PAGE_ED | _PAGE_A | _PAGE_P | _PAGE_MA_WB -#define __DIRTY_BITS_NO_ED _PAGE_A | _PAGE_P | _PAGE_D | _PAGE_MA_WB -#define __DIRTY_BITS _PAGE_ED | __DIRTY_BITS_NO_ED - -/* - * How many pointers will a page table level hold expressed in shift - */ -#define PTRS_PER_PTD_SHIFT (PAGE_SHIFT-3) - -/* - * Definitions for fourth level: - */ -#define PTRS_PER_PTE (__IA64_UL(1) << (PTRS_PER_PTD_SHIFT)) - -/* - * Definitions for third level: - * - * PMD_SHIFT determines the size of the area a third-level page table - * can map. - */ -#define PMD_SHIFT (PAGE_SHIFT + (PTRS_PER_PTD_SHIFT)) -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PTRS_PER_PMD (1UL << (PTRS_PER_PTD_SHIFT)) - -#ifdef CONFIG_PGTABLE_4 -/* - * Definitions for second level: - * - * PUD_SHIFT determines the size of the area a second-level page table - * can map. - */ -#define PUD_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) -#define PUD_SIZE (1UL << PUD_SHIFT) -#define PUD_MASK (~(PUD_SIZE-1)) -#define PTRS_PER_PUD (1UL << (PTRS_PER_PTD_SHIFT)) -#endif - -/* - * Definitions for first level: - * - * PGDIR_SHIFT determines what a first-level page table entry can map. - */ -#ifdef CONFIG_PGTABLE_4 -#define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT)) -#else -#define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) -#endif -#define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) -#define PTRS_PER_PGD_SHIFT PTRS_PER_PTD_SHIFT -#define PTRS_PER_PGD (1UL << PTRS_PER_PGD_SHIFT) -#define USER_PTRS_PER_PGD (5*PTRS_PER_PGD/8) /* regions 0-4 are user regions */ -#define FIRST_USER_ADDRESS 0 - -/* - * All the normal masks have the "page accessed" bits on, as any time - * they are used, the page is accessed. They are cleared only by the - * page-out routines. - */ -#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_A) -#define PAGE_SHARED __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RW) -#define PAGE_READONLY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R) -#define PAGE_COPY __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_R) -#define PAGE_COPY_EXEC __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) -#define PAGE_GATE __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_X_RX) -#define PAGE_KERNEL __pgprot(__DIRTY_BITS | _PAGE_PL_0 | _PAGE_AR_RWX) -#define PAGE_KERNELRX __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_RX) - -# ifndef __ASSEMBLY__ - -#include /* for mm_struct */ -#include -#include -#include -#include - -/* - * Next come the mappings that determine how mmap() protection bits - * (PROT_EXEC, PROT_READ, PROT_WRITE, PROT_NONE) get implemented. The - * _P version gets used for a private shared memory segment, the _S - * version gets used for a shared memory segment with MAP_SHARED on. - * In a private shared memory segment, we do a copy-on-write if a task - * attempts to write to the page. - */ - /* xwr */ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_READONLY /* write to priv pg -> copy & make writable */ -#define __P011 PAGE_READONLY /* ditto */ -#define __P100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX) -#define __P101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) -#define __P110 PAGE_COPY_EXEC -#define __P111 PAGE_COPY_EXEC - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED /* we don't have (and don't need) write-only */ -#define __S011 PAGE_SHARED -#define __S100 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_X_RX) -#define __S101 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RX) -#define __S110 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) -#define __S111 __pgprot(__ACCESS_BITS | _PAGE_PL_3 | _PAGE_AR_RWX) - -#define pgd_ERROR(e) printk("%s:%d: bad pgd %016lx.\n", __FILE__, __LINE__, pgd_val(e)) -#ifdef CONFIG_PGTABLE_4 -#define pud_ERROR(e) printk("%s:%d: bad pud %016lx.\n", __FILE__, __LINE__, pud_val(e)) -#endif -#define pmd_ERROR(e) printk("%s:%d: bad pmd %016lx.\n", __FILE__, __LINE__, pmd_val(e)) -#define pte_ERROR(e) printk("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e)) - - -/* - * Some definitions to translate between mem_map, PTEs, and page addresses: - */ - - -/* Quick test to see if ADDR is a (potentially) valid physical address. */ -static inline long -ia64_phys_addr_valid (unsigned long addr) -{ - return (addr & (local_cpu_data->unimpl_pa_mask)) == 0; -} - -/* - * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel - * memory. For the return value to be meaningful, ADDR must be >= - * PAGE_OFFSET. This operation can be relatively expensive (e.g., - * require a hash-, or multi-level tree-lookup or something of that - * sort) but it guarantees to return TRUE only if accessing the page - * at that address does not cause an error. Note that there may be - * addresses for which kern_addr_valid() returns FALSE even though an - * access would not cause an error (e.g., this is typically true for - * memory mapped I/O regions. - * - * XXX Need to implement this for IA-64. - */ -#define kern_addr_valid(addr) (1) - - -/* - * Now come the defines and routines to manage and access the three-level - * page table. - */ - - -#define VMALLOC_START (RGN_BASE(RGN_GATE) + 0x200000000UL) -#ifdef CONFIG_VIRTUAL_MEM_MAP -# define VMALLOC_END_INIT (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9))) -# define VMALLOC_END vmalloc_end - extern unsigned long vmalloc_end; -#else -#if defined(CONFIG_SPARSEMEM) && defined(CONFIG_SPARSEMEM_VMEMMAP) -/* SPARSEMEM_VMEMMAP uses half of vmalloc... */ -# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 10))) -# define vmemmap ((struct page *)VMALLOC_END) -#else -# define VMALLOC_END (RGN_BASE(RGN_GATE) + (1UL << (4*PAGE_SHIFT - 9))) -#endif -#endif - -/* fs/proc/kcore.c */ -#define kc_vaddr_to_offset(v) ((v) - RGN_BASE(RGN_GATE)) -#define kc_offset_to_vaddr(o) ((o) + RGN_BASE(RGN_GATE)) - -#define RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3) -#define RGN_MAP_LIMIT ((1UL << RGN_MAP_SHIFT) - PAGE_SIZE) /* per region addr limit */ - -/* - * Conversion functions: convert page frame number (pfn) and a protection value to a page - * table entry (pte). - */ -#define pfn_pte(pfn, pgprot) \ -({ pte_t __pte; pte_val(__pte) = ((pfn) << PAGE_SHIFT) | pgprot_val(pgprot); __pte; }) - -/* Extract pfn from pte. */ -#define pte_pfn(_pte) ((pte_val(_pte) & _PFN_MASK) >> PAGE_SHIFT) - -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -/* This takes a physical page address that is used by the remapping functions */ -#define mk_pte_phys(physpage, pgprot) \ -({ pte_t __pte; pte_val(__pte) = physpage + pgprot_val(pgprot); __pte; }) - -#define pte_modify(_pte, newprot) \ - (__pte((pte_val(_pte) & ~_PAGE_CHG_MASK) | (pgprot_val(newprot) & _PAGE_CHG_MASK))) - -#define pte_none(pte) (!pte_val(pte)) -#define pte_present(pte) (pte_val(pte) & (_PAGE_P | _PAGE_PROTNONE)) -#define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL) -/* pte_page() returns the "struct page *" corresponding to the PTE: */ -#define pte_page(pte) virt_to_page(((pte_val(pte) & _PFN_MASK) + PAGE_OFFSET)) - -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) (!ia64_phys_addr_valid(pmd_val(pmd))) -#define pmd_present(pmd) (pmd_val(pmd) != 0UL) -#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL) -#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & _PFN_MASK)) -#define pmd_page(pmd) virt_to_page((pmd_val(pmd) + PAGE_OFFSET)) - -#define pud_none(pud) (!pud_val(pud)) -#define pud_bad(pud) (!ia64_phys_addr_valid(pud_val(pud))) -#define pud_present(pud) (pud_val(pud) != 0UL) -#define pud_clear(pudp) (pud_val(*(pudp)) = 0UL) -#define pud_page_vaddr(pud) ((unsigned long) __va(pud_val(pud) & _PFN_MASK)) -#define pud_page(pud) virt_to_page((pud_val(pud) + PAGE_OFFSET)) - -#ifdef CONFIG_PGTABLE_4 -#define pgd_none(pgd) (!pgd_val(pgd)) -#define pgd_bad(pgd) (!ia64_phys_addr_valid(pgd_val(pgd))) -#define pgd_present(pgd) (pgd_val(pgd) != 0UL) -#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL) -#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_val(pgd) & _PFN_MASK)) -#define pgd_page(pgd) virt_to_page((pgd_val(pgd) + PAGE_OFFSET)) -#endif - -/* - * The following have defined behavior only work if pte_present() is true. - */ -#define pte_write(pte) ((unsigned) (((pte_val(pte) & _PAGE_AR_MASK) >> _PAGE_AR_SHIFT) - 2) <= 4) -#define pte_exec(pte) ((pte_val(pte) & _PAGE_AR_RX) != 0) -#define pte_dirty(pte) ((pte_val(pte) & _PAGE_D) != 0) -#define pte_young(pte) ((pte_val(pte) & _PAGE_A) != 0) -#define pte_file(pte) ((pte_val(pte) & _PAGE_FILE) != 0) -#define pte_special(pte) 0 - -/* - * Note: we convert AR_RWX to AR_RX and AR_RW to AR_R by clearing the 2nd bit in the - * access rights: - */ -#define pte_wrprotect(pte) (__pte(pte_val(pte) & ~_PAGE_AR_RW)) -#define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_AR_RW)) -#define pte_mkold(pte) (__pte(pte_val(pte) & ~_PAGE_A)) -#define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_A)) -#define pte_mkclean(pte) (__pte(pte_val(pte) & ~_PAGE_D)) -#define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_D)) -#define pte_mkhuge(pte) (__pte(pte_val(pte))) -#define pte_mkspecial(pte) (pte) - -/* - * Because ia64's Icache and Dcache is not coherent (on a cpu), we need to - * sync icache and dcache when we insert *new* executable page. - * __ia64_sync_icache_dcache() check Pg_arch_1 bit and flush icache - * if necessary. - * - * set_pte() is also called by the kernel, but we can expect that the kernel - * flushes icache explicitly if necessary. - */ -#define pte_present_exec_user(pte)\ - ((pte_val(pte) & (_PAGE_P | _PAGE_PL_MASK | _PAGE_AR_RX)) == \ - (_PAGE_P | _PAGE_PL_3 | _PAGE_AR_RX)) - -extern void __ia64_sync_icache_dcache(pte_t pteval); -static inline void set_pte(pte_t *ptep, pte_t pteval) -{ - /* page is present && page is user && page is executable - * && (page swapin or new page or page migraton - * || copy_on_write with page copying.) - */ - if (pte_present_exec_user(pteval) && - (!pte_present(*ptep) || - pte_pfn(*ptep) != pte_pfn(pteval))) - /* load_module() calles flush_icache_range() explicitly*/ - __ia64_sync_icache_dcache(pteval); - *ptep = pteval; -} - -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -/* - * Make page protection values cacheable, uncacheable, or write- - * combining. Note that "protection" is really a misnomer here as the - * protection value contains the memory attribute bits, dirty bits, and - * various other bits as well. - */ -#define pgprot_cacheable(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WB) -#define pgprot_noncached(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_UC) -#define pgprot_writecombine(prot) __pgprot((pgprot_val(prot) & ~_PAGE_MA_MASK) | _PAGE_MA_WC) - -struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot); -#define __HAVE_PHYS_MEM_ACCESS_PROT - -static inline unsigned long -pgd_index (unsigned long address) -{ - unsigned long region = address >> 61; - unsigned long l1index = (address >> PGDIR_SHIFT) & ((PTRS_PER_PGD >> 3) - 1); - - return (region << (PAGE_SHIFT - 6)) | l1index; -} - -/* The offset in the 1-level directory is given by the 3 region bits - (61..63) and the level-1 bits. */ -static inline pgd_t* -pgd_offset (const struct mm_struct *mm, unsigned long address) -{ - return mm->pgd + pgd_index(address); -} - -/* In the kernel's mapped region we completely ignore the region number - (since we know it's in region number 5). */ -#define pgd_offset_k(addr) \ - (init_mm.pgd + (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))) - -/* Look up a pgd entry in the gate area. On IA-64, the gate-area - resides in the kernel-mapped segment, hence we use pgd_offset_k() - here. */ -#define pgd_offset_gate(mm, addr) pgd_offset_k(addr) - -#ifdef CONFIG_PGTABLE_4 -/* Find an entry in the second-level page table.. */ -#define pud_offset(dir,addr) \ - ((pud_t *) pgd_page_vaddr(*(dir)) + (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) -#endif - -/* Find an entry in the third-level page table.. */ -#define pmd_offset(dir,addr) \ - ((pmd_t *) pud_page_vaddr(*(dir)) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) - -/* - * Find an entry in the third-level page table. This looks more complicated than it - * should be because some platforms place page tables in high memory. - */ -#define pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset_kernel(dir,addr) ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr)) -#define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) -#define pte_offset_map_nested(dir,addr) pte_offset_map(dir, addr) -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -/* atomic versions of the some PTE manipulations: */ - -static inline int -ptep_test_and_clear_young (struct vm_area_struct *vma, unsigned long addr, pte_t *ptep) -{ -#ifdef CONFIG_SMP - if (!pte_young(*ptep)) - return 0; - return test_and_clear_bit(_PAGE_A_BIT, ptep); -#else - pte_t pte = *ptep; - if (!pte_young(pte)) - return 0; - set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte)); - return 1; -#endif -} - -static inline pte_t -ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) -{ -#ifdef CONFIG_SMP - return __pte(xchg((long *) ptep, 0)); -#else - pte_t pte = *ptep; - pte_clear(mm, addr, ptep); - return pte; -#endif -} - -static inline void -ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep) -{ -#ifdef CONFIG_SMP - unsigned long new, old; - - do { - old = pte_val(*ptep); - new = pte_val(pte_wrprotect(__pte (old))); - } while (cmpxchg((unsigned long *) ptep, old, new) != old); -#else - pte_t old_pte = *ptep; - set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte)); -#endif -} - -static inline int -pte_same (pte_t a, pte_t b) -{ - return pte_val(a) == pte_val(b); -} - -#define update_mmu_cache(vma, address, pte) do { } while (0) - -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -extern void paging_init (void); - -/* - * Note: The macros below rely on the fact that MAX_SWAPFILES_SHIFT <= number of - * bits in the swap-type field of the swap pte. It would be nice to - * enforce that, but we can't easily include here. - * (Of course, better still would be to define MAX_SWAPFILES_SHIFT here...). - * - * Format of swap pte: - * bit 0 : present bit (must be zero) - * bit 1 : _PAGE_FILE (must be zero) - * bits 2- 8: swap-type - * bits 9-62: swap offset - * bit 63 : _PAGE_PROTNONE bit - * - * Format of file pte: - * bit 0 : present bit (must be zero) - * bit 1 : _PAGE_FILE (must be one) - * bits 2-62: file_offset/PAGE_SIZE - * bit 63 : _PAGE_PROTNONE bit - */ -#define __swp_type(entry) (((entry).val >> 2) & 0x7f) -#define __swp_offset(entry) (((entry).val << 1) >> 10) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((long) (offset) << 9) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -#define PTE_FILE_MAX_BITS 61 -#define pte_to_pgoff(pte) ((pte_val(pte) << 1) >> 3) -#define pgoff_to_pte(off) ((pte_t) { ((off) << 2) | _PAGE_FILE }) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)]; -extern struct page *zero_page_memmap_ptr; -#define ZERO_PAGE(vaddr) (zero_page_memmap_ptr) - -/* We provide our own get_unmapped_area to cope with VA holes for userland */ -#define HAVE_ARCH_UNMAPPED_AREA - -#ifdef CONFIG_HUGETLB_PAGE -#define HUGETLB_PGDIR_SHIFT (HPAGE_SHIFT + 2*(PAGE_SHIFT-3)) -#define HUGETLB_PGDIR_SIZE (__IA64_UL(1) << HUGETLB_PGDIR_SHIFT) -#define HUGETLB_PGDIR_MASK (~(HUGETLB_PGDIR_SIZE-1)) -#endif - - -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -/* - * Update PTEP with ENTRY, which is guaranteed to be a less - * restrictive PTE. That is, ENTRY may have the ACCESSED, DIRTY, and - * WRITABLE bits turned on, when the value at PTEP did not. The - * WRITABLE bit may only be turned if SAFELY_WRITABLE is TRUE. - * - * SAFELY_WRITABLE is TRUE if we can update the value at PTEP without - * having to worry about races. On SMP machines, there are only two - * cases where this is true: - * - * (1) *PTEP has the PRESENT bit turned OFF - * (2) ENTRY has the DIRTY bit turned ON - * - * On ia64, we could implement this routine with a cmpxchg()-loop - * which ORs in the _PAGE_A/_PAGE_D bit if they're set in ENTRY. - * However, like on x86, we can get a more streamlined version by - * observing that it is OK to drop ACCESSED bit updates when - * SAFELY_WRITABLE is FALSE. Besides being rare, all that would do is - * result in an extra Access-bit fault, which would then turn on the - * ACCESSED bit in the low-level fault handler (iaccess_bit or - * daccess_bit in ivt.S). - */ -#ifdef CONFIG_SMP -# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed && __safely_writable) { \ - set_pte(__ptep, __entry); \ - flush_tlb_page(__vma, __addr); \ - } \ - __changed; \ -}) -#else -# define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __safely_writable) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - set_pte_at((__vma)->vm_mm, (__addr), __ptep, __entry); \ - flush_tlb_page(__vma, __addr); \ - } \ - __changed; \ -}) -#endif - -# ifdef CONFIG_VIRTUAL_MEM_MAP - /* arch mem_map init routine is needed due to holes in a virtual mem_map */ -# define __HAVE_ARCH_MEMMAP_INIT - extern void memmap_init (unsigned long size, int nid, unsigned long zone, - unsigned long start_pfn); -# endif /* CONFIG_VIRTUAL_MEM_MAP */ -# endif /* !__ASSEMBLY__ */ - -/* - * Identity-mapped regions use a large page size. We'll call such large pages - * "granules". If you can think of a better name that's unambiguous, let me - * know... - */ -#if defined(CONFIG_IA64_GRANULE_64MB) -# define IA64_GRANULE_SHIFT _PAGE_SIZE_64M -#elif defined(CONFIG_IA64_GRANULE_16MB) -# define IA64_GRANULE_SHIFT _PAGE_SIZE_16M -#endif -#define IA64_GRANULE_SIZE (1 << IA64_GRANULE_SHIFT) -/* - * log2() of the page size we use to map the kernel image (IA64_TR_KERNEL): - */ -#define KERNEL_TR_PAGE_SHIFT _PAGE_SIZE_64M -#define KERNEL_TR_PAGE_SIZE (1 << KERNEL_TR_PAGE_SHIFT) - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -/* These tell get_user_pages() that the first gate page is accessible from user-level. */ -#define FIXADDR_USER_START GATE_ADDR -#ifdef HAVE_BUGGY_SEGREL -# define FIXADDR_USER_END (GATE_ADDR + 2*PAGE_SIZE) -#else -# define FIXADDR_USER_END (GATE_ADDR + 2*PERCPU_PAGE_SIZE) -#endif - -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -#define __HAVE_ARCH_PTEP_SET_WRPROTECT -#define __HAVE_ARCH_PTE_SAME -#define __HAVE_ARCH_PGD_OFFSET_GATE - - -#ifndef CONFIG_PGTABLE_4 -#include -#endif -#include - -#endif /* _ASM_IA64_PGTABLE_H */ diff --git a/include/asm-ia64/poll.h b/include/asm-ia64/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-ia64/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-ia64/posix_types.h b/include/asm-ia64/posix_types.h deleted file mode 100644 index 17885567..0000000 --- a/include/asm-ia64/posix_types.h +++ /dev/null @@ -1,126 +0,0 @@ -#ifndef _ASM_IA64_POSIX_TYPES_H -#define _ASM_IA64_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - * - * Based on . - * - * Modified 1998-2000, 2003 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef unsigned int __kernel_nlink_t; -typedef long __kernel_off_t; -typedef long long __kernel_loff_t; -typedef int __kernel_pid_t; -typedef int __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; -typedef long __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned long __kernel_sigset_t; /* at least 32 bits */ -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -typedef __kernel_uid_t __kernel_old_uid_t; -typedef __kernel_gid_t __kernel_old_gid_t; -typedef __kernel_uid_t __kernel_uid32_t; -typedef __kernel_gid_t __kernel_gid32_t; - -typedef unsigned int __kernel_old_dev_t; - -# ifdef __KERNEL__ - -# ifndef __GNUC__ - -#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) -#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) -#define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) -#define __FD_ZERO(set) \ - ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) - -# else /* !__GNUC__ */ - -/* With GNU C, use inline functions instead so args are evaluated only once: */ - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long fd, const __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - return; - - case 8: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - return; - - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -# endif /* !__GNUC__ */ -# endif /* __KERNEL__ */ -#endif /* _ASM_IA64_POSIX_TYPES_H */ diff --git a/include/asm-ia64/processor.h b/include/asm-ia64/processor.h deleted file mode 100644 index f88fa05..0000000 --- a/include/asm-ia64/processor.h +++ /dev/null @@ -1,771 +0,0 @@ -#ifndef _ASM_IA64_PROCESSOR_H -#define _ASM_IA64_PROCESSOR_H - -/* - * Copyright (C) 1998-2004 Hewlett-Packard Co - * David Mosberger-Tang - * Stephane Eranian - * Copyright (C) 1999 Asit Mallick - * Copyright (C) 1999 Don Dugger - * - * 11/24/98 S.Eranian added ia64_set_iva() - * 12/03/99 D. Mosberger implement thread_saved_pc() via kernel unwind API - * 06/16/00 A. Mallick added csd/ssd/tssd for ia32 support - */ - - -#include -#include -#include -#include - -#define IA64_NUM_PHYS_STACK_REG 96 -#define IA64_NUM_DBG_REGS 8 - -#define DEFAULT_MAP_BASE __IA64_UL_CONST(0x2000000000000000) -#define DEFAULT_TASK_SIZE __IA64_UL_CONST(0xa000000000000000) - -/* - * TASK_SIZE really is a mis-named. It really is the maximum user - * space address (plus one). On IA-64, there are five regions of 2TB - * each (assuming 8KB page size), for a total of 8TB of user virtual - * address space. - */ -#define TASK_SIZE_OF(tsk) ((tsk)->thread.task_size) -#define TASK_SIZE TASK_SIZE_OF(current) - -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (current->thread.map_base) - -#define IA64_THREAD_FPH_VALID (__IA64_UL(1) << 0) /* floating-point high state valid? */ -#define IA64_THREAD_DBG_VALID (__IA64_UL(1) << 1) /* debug registers valid? */ -#define IA64_THREAD_PM_VALID (__IA64_UL(1) << 2) /* performance registers valid? */ -#define IA64_THREAD_UAC_NOPRINT (__IA64_UL(1) << 3) /* don't log unaligned accesses */ -#define IA64_THREAD_UAC_SIGBUS (__IA64_UL(1) << 4) /* generate SIGBUS on unaligned acc. */ -#define IA64_THREAD_MIGRATION (__IA64_UL(1) << 5) /* require migration - sync at ctx sw */ -#define IA64_THREAD_FPEMU_NOPRINT (__IA64_UL(1) << 6) /* don't log any fpswa faults */ -#define IA64_THREAD_FPEMU_SIGFPE (__IA64_UL(1) << 7) /* send a SIGFPE for fpswa faults */ - -#define IA64_THREAD_UAC_SHIFT 3 -#define IA64_THREAD_UAC_MASK (IA64_THREAD_UAC_NOPRINT | IA64_THREAD_UAC_SIGBUS) -#define IA64_THREAD_FPEMU_SHIFT 6 -#define IA64_THREAD_FPEMU_MASK (IA64_THREAD_FPEMU_NOPRINT | IA64_THREAD_FPEMU_SIGFPE) - - -/* - * This shift should be large enough to be able to represent 1000000000/itc_freq with good - * accuracy while being small enough to fit 10*1000000000< -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#ifdef CONFIG_NUMA -#include -#endif - -/* like above but expressed as bitfields for more efficient access: */ -struct ia64_psr { - __u64 reserved0 : 1; - __u64 be : 1; - __u64 up : 1; - __u64 ac : 1; - __u64 mfl : 1; - __u64 mfh : 1; - __u64 reserved1 : 7; - __u64 ic : 1; - __u64 i : 1; - __u64 pk : 1; - __u64 reserved2 : 1; - __u64 dt : 1; - __u64 dfl : 1; - __u64 dfh : 1; - __u64 sp : 1; - __u64 pp : 1; - __u64 di : 1; - __u64 si : 1; - __u64 db : 1; - __u64 lp : 1; - __u64 tb : 1; - __u64 rt : 1; - __u64 reserved3 : 4; - __u64 cpl : 2; - __u64 is : 1; - __u64 mc : 1; - __u64 it : 1; - __u64 id : 1; - __u64 da : 1; - __u64 dd : 1; - __u64 ss : 1; - __u64 ri : 2; - __u64 ed : 1; - __u64 bn : 1; - __u64 reserved4 : 19; -}; - -union ia64_isr { - __u64 val; - struct { - __u64 code : 16; - __u64 vector : 8; - __u64 reserved1 : 8; - __u64 x : 1; - __u64 w : 1; - __u64 r : 1; - __u64 na : 1; - __u64 sp : 1; - __u64 rs : 1; - __u64 ir : 1; - __u64 ni : 1; - __u64 so : 1; - __u64 ei : 2; - __u64 ed : 1; - __u64 reserved2 : 20; - }; -}; - -union ia64_lid { - __u64 val; - struct { - __u64 rv : 16; - __u64 eid : 8; - __u64 id : 8; - __u64 ig : 32; - }; -}; - -union ia64_tpr { - __u64 val; - struct { - __u64 ig0 : 4; - __u64 mic : 4; - __u64 rsv : 8; - __u64 mmi : 1; - __u64 ig1 : 47; - }; -}; - -union ia64_itir { - __u64 val; - struct { - __u64 rv3 : 2; /* 0-1 */ - __u64 ps : 6; /* 2-7 */ - __u64 key : 24; /* 8-31 */ - __u64 rv4 : 32; /* 32-63 */ - }; -}; - -union ia64_rr { - __u64 val; - struct { - __u64 ve : 1; /* enable hw walker */ - __u64 reserved0: 1; /* reserved */ - __u64 ps : 6; /* log page size */ - __u64 rid : 24; /* region id */ - __u64 reserved1: 32; /* reserved */ - }; -}; - -/* - * CPU type, hardware bug flags, and per-CPU state. Frequently used - * state comes earlier: - */ -struct cpuinfo_ia64 { - __u32 softirq_pending; - __u64 itm_delta; /* # of clock cycles between clock ticks */ - __u64 itm_next; /* interval timer mask value to use for next clock tick */ - __u64 nsec_per_cyc; /* (1000000000<thread.flags = (((task)->thread.flags & ~IA64_THREAD_UAC_MASK) \ - | (((value) << IA64_THREAD_UAC_SHIFT) & IA64_THREAD_UAC_MASK)); \ - 0; \ -}) -#define GET_UNALIGN_CTL(task,addr) \ -({ \ - put_user(((task)->thread.flags & IA64_THREAD_UAC_MASK) >> IA64_THREAD_UAC_SHIFT, \ - (int __user *) (addr)); \ -}) - -#define SET_FPEMU_CTL(task,value) \ -({ \ - (task)->thread.flags = (((task)->thread.flags & ~IA64_THREAD_FPEMU_MASK) \ - | (((value) << IA64_THREAD_FPEMU_SHIFT) & IA64_THREAD_FPEMU_MASK)); \ - 0; \ -}) -#define GET_FPEMU_CTL(task,addr) \ -({ \ - put_user(((task)->thread.flags & IA64_THREAD_FPEMU_MASK) >> IA64_THREAD_FPEMU_SHIFT, \ - (int __user *) (addr)); \ -}) - -#ifdef CONFIG_IA32_SUPPORT -struct desc_struct { - unsigned int a, b; -}; - -#define desc_empty(desc) (!((desc)->a | (desc)->b)) -#define desc_equal(desc1, desc2) (((desc1)->a == (desc2)->a) && ((desc1)->b == (desc2)->b)) - -#define GDT_ENTRY_TLS_ENTRIES 3 -#define GDT_ENTRY_TLS_MIN 6 -#define GDT_ENTRY_TLS_MAX (GDT_ENTRY_TLS_MIN + GDT_ENTRY_TLS_ENTRIES - 1) - -#define TLS_SIZE (GDT_ENTRY_TLS_ENTRIES * 8) - -struct ia64_partial_page_list; -#endif - -struct thread_struct { - __u32 flags; /* various thread flags (see IA64_THREAD_*) */ - /* writing on_ustack is performance-critical, so it's worth spending 8 bits on it... */ - __u8 on_ustack; /* executing on user-stacks? */ - __u8 pad[3]; - __u64 ksp; /* kernel stack pointer */ - __u64 map_base; /* base address for get_unmapped_area() */ - __u64 task_size; /* limit for task size */ - __u64 rbs_bot; /* the base address for the RBS */ - int last_fph_cpu; /* CPU that may hold the contents of f32-f127 */ - -#ifdef CONFIG_IA32_SUPPORT - __u64 eflag; /* IA32 EFLAGS reg */ - __u64 fsr; /* IA32 floating pt status reg */ - __u64 fcr; /* IA32 floating pt control reg */ - __u64 fir; /* IA32 fp except. instr. reg */ - __u64 fdr; /* IA32 fp except. data reg */ - __u64 old_k1; /* old value of ar.k1 */ - __u64 old_iob; /* old IOBase value */ - struct ia64_partial_page_list *ppl; /* partial page list for 4K page size issue */ - /* cached TLS descriptors. */ - struct desc_struct tls_array[GDT_ENTRY_TLS_ENTRIES]; - -# define INIT_THREAD_IA32 .eflag = 0, \ - .fsr = 0, \ - .fcr = 0x17800000037fULL, \ - .fir = 0, \ - .fdr = 0, \ - .old_k1 = 0, \ - .old_iob = 0, \ - .ppl = NULL, -#else -# define INIT_THREAD_IA32 -#endif /* CONFIG_IA32_SUPPORT */ -#ifdef CONFIG_PERFMON - void *pfm_context; /* pointer to detailed PMU context */ - unsigned long pfm_needs_checking; /* when >0, pending perfmon work on kernel exit */ -# define INIT_THREAD_PM .pfm_context = NULL, \ - .pfm_needs_checking = 0UL, -#else -# define INIT_THREAD_PM -#endif - __u64 dbr[IA64_NUM_DBG_REGS]; - __u64 ibr[IA64_NUM_DBG_REGS]; - struct ia64_fpreg fph[96]; /* saved/loaded on demand */ -}; - -#define INIT_THREAD { \ - .flags = 0, \ - .on_ustack = 0, \ - .ksp = 0, \ - .map_base = DEFAULT_MAP_BASE, \ - .rbs_bot = STACK_TOP - DEFAULT_USER_STACK_SIZE, \ - .task_size = DEFAULT_TASK_SIZE, \ - .last_fph_cpu = -1, \ - INIT_THREAD_IA32 \ - INIT_THREAD_PM \ - .dbr = {0, }, \ - .ibr = {0, }, \ - .fph = {{{{0}}}, } \ -} - -#define start_thread(regs,new_ip,new_sp) do { \ - set_fs(USER_DS); \ - regs->cr_ipsr = ((regs->cr_ipsr | (IA64_PSR_BITS_TO_SET | IA64_PSR_CPL)) \ - & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_RI | IA64_PSR_IS)); \ - regs->cr_iip = new_ip; \ - regs->ar_rsc = 0xf; /* eager mode, privilege level 3 */ \ - regs->ar_rnat = 0; \ - regs->ar_bspstore = current->thread.rbs_bot; \ - regs->ar_fpsr = FPSR_DEFAULT; \ - regs->loadrs = 0; \ - regs->r8 = get_dumpable(current->mm); /* set "don't zap registers" flag */ \ - regs->r12 = new_sp - 16; /* allocate 16 byte scratch area */ \ - if (unlikely(!get_dumpable(current->mm))) { \ - /* \ - * Zap scratch regs to avoid leaking bits between processes with different \ - * uid/privileges. \ - */ \ - regs->ar_pfs = 0; regs->b0 = 0; regs->pr = 0; \ - regs->r1 = 0; regs->r9 = 0; regs->r11 = 0; regs->r13 = 0; regs->r15 = 0; \ - } \ -} while (0) - -/* Forward declarations, a strange C thing... */ -struct mm_struct; -struct task_struct; - -/* - * Free all resources held by a thread. This is called after the - * parent of DEAD_TASK has collected the exit status of the task via - * wait(). - */ -#define release_thread(dead_task) - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -/* - * This is the mechanism for creating a new kernel thread. - * - * NOTE 1: Only a kernel-only process (ie the swapper or direct - * descendants who haven't done an "execve()") should use this: it - * will work within a system call from a "real" process, but the - * process memory space will not be free'd until both the parent and - * the child have exited. - * - * NOTE 2: This MUST NOT be an inlined function. Otherwise, we get - * into trouble in init/main.c when the child thread returns to - * do_basic_setup() and the timing is such that free_initmem() has - * been called already. - */ -extern pid_t kernel_thread (int (*fn)(void *), void *arg, unsigned long flags); - -/* Get wait channel for task P. */ -extern unsigned long get_wchan (struct task_struct *p); - -/* Return instruction pointer of blocked task TSK. */ -#define KSTK_EIP(tsk) \ - ({ \ - struct pt_regs *_regs = task_pt_regs(tsk); \ - _regs->cr_iip + ia64_psr(_regs)->ri; \ - }) - -/* Return stack pointer of blocked task TSK. */ -#define KSTK_ESP(tsk) ((tsk)->thread.ksp) - -extern void ia64_getreg_unknown_kr (void); -extern void ia64_setreg_unknown_kr (void); - -#define ia64_get_kr(regnum) \ -({ \ - unsigned long r = 0; \ - \ - switch (regnum) { \ - case 0: r = ia64_getreg(_IA64_REG_AR_KR0); break; \ - case 1: r = ia64_getreg(_IA64_REG_AR_KR1); break; \ - case 2: r = ia64_getreg(_IA64_REG_AR_KR2); break; \ - case 3: r = ia64_getreg(_IA64_REG_AR_KR3); break; \ - case 4: r = ia64_getreg(_IA64_REG_AR_KR4); break; \ - case 5: r = ia64_getreg(_IA64_REG_AR_KR5); break; \ - case 6: r = ia64_getreg(_IA64_REG_AR_KR6); break; \ - case 7: r = ia64_getreg(_IA64_REG_AR_KR7); break; \ - default: ia64_getreg_unknown_kr(); break; \ - } \ - r; \ -}) - -#define ia64_set_kr(regnum, r) \ -({ \ - switch (regnum) { \ - case 0: ia64_setreg(_IA64_REG_AR_KR0, r); break; \ - case 1: ia64_setreg(_IA64_REG_AR_KR1, r); break; \ - case 2: ia64_setreg(_IA64_REG_AR_KR2, r); break; \ - case 3: ia64_setreg(_IA64_REG_AR_KR3, r); break; \ - case 4: ia64_setreg(_IA64_REG_AR_KR4, r); break; \ - case 5: ia64_setreg(_IA64_REG_AR_KR5, r); break; \ - case 6: ia64_setreg(_IA64_REG_AR_KR6, r); break; \ - case 7: ia64_setreg(_IA64_REG_AR_KR7, r); break; \ - default: ia64_setreg_unknown_kr(); break; \ - } \ -}) - -/* - * The following three macros can't be inline functions because we don't have struct - * task_struct at this point. - */ - -/* - * Return TRUE if task T owns the fph partition of the CPU we're running on. - * Must be called from code that has preemption disabled. - */ -#define ia64_is_local_fpu_owner(t) \ -({ \ - struct task_struct *__ia64_islfo_task = (t); \ - (__ia64_islfo_task->thread.last_fph_cpu == smp_processor_id() \ - && __ia64_islfo_task == (struct task_struct *) ia64_get_kr(IA64_KR_FPU_OWNER)); \ -}) - -/* - * Mark task T as owning the fph partition of the CPU we're running on. - * Must be called from code that has preemption disabled. - */ -#define ia64_set_local_fpu_owner(t) do { \ - struct task_struct *__ia64_slfo_task = (t); \ - __ia64_slfo_task->thread.last_fph_cpu = smp_processor_id(); \ - ia64_set_kr(IA64_KR_FPU_OWNER, (unsigned long) __ia64_slfo_task); \ -} while (0) - -/* Mark the fph partition of task T as being invalid on all CPUs. */ -#define ia64_drop_fpu(t) ((t)->thread.last_fph_cpu = -1) - -extern void __ia64_init_fpu (void); -extern void __ia64_save_fpu (struct ia64_fpreg *fph); -extern void __ia64_load_fpu (struct ia64_fpreg *fph); -extern void ia64_save_debug_regs (unsigned long *save_area); -extern void ia64_load_debug_regs (unsigned long *save_area); - -#ifdef CONFIG_IA32_SUPPORT -extern void ia32_save_state (struct task_struct *task); -extern void ia32_load_state (struct task_struct *task); -#endif - -#define ia64_fph_enable() do { ia64_rsm(IA64_PSR_DFH); ia64_srlz_d(); } while (0) -#define ia64_fph_disable() do { ia64_ssm(IA64_PSR_DFH); ia64_srlz_d(); } while (0) - -/* load fp 0.0 into fph */ -static inline void -ia64_init_fpu (void) { - ia64_fph_enable(); - __ia64_init_fpu(); - ia64_fph_disable(); -} - -/* save f32-f127 at FPH */ -static inline void -ia64_save_fpu (struct ia64_fpreg *fph) { - ia64_fph_enable(); - __ia64_save_fpu(fph); - ia64_fph_disable(); -} - -/* load f32-f127 from FPH */ -static inline void -ia64_load_fpu (struct ia64_fpreg *fph) { - ia64_fph_enable(); - __ia64_load_fpu(fph); - ia64_fph_disable(); -} - -static inline __u64 -ia64_clear_ic (void) -{ - __u64 psr; - psr = ia64_getreg(_IA64_REG_PSR); - ia64_stop(); - ia64_rsm(IA64_PSR_I | IA64_PSR_IC); - ia64_srlz_i(); - return psr; -} - -/* - * Restore the psr. - */ -static inline void -ia64_set_psr (__u64 psr) -{ - ia64_stop(); - ia64_setreg(_IA64_REG_PSR_L, psr); - ia64_srlz_i(); -} - -/* - * Insert a translation into an instruction and/or data translation - * register. - */ -static inline void -ia64_itr (__u64 target_mask, __u64 tr_num, - __u64 vmaddr, __u64 pte, - __u64 log_page_size) -{ - ia64_setreg(_IA64_REG_CR_ITIR, (log_page_size << 2)); - ia64_setreg(_IA64_REG_CR_IFA, vmaddr); - ia64_stop(); - if (target_mask & 0x1) - ia64_itri(tr_num, pte); - if (target_mask & 0x2) - ia64_itrd(tr_num, pte); -} - -/* - * Insert a translation into the instruction and/or data translation - * cache. - */ -static inline void -ia64_itc (__u64 target_mask, __u64 vmaddr, __u64 pte, - __u64 log_page_size) -{ - ia64_setreg(_IA64_REG_CR_ITIR, (log_page_size << 2)); - ia64_setreg(_IA64_REG_CR_IFA, vmaddr); - ia64_stop(); - /* as per EAS2.6, itc must be the last instruction in an instruction group */ - if (target_mask & 0x1) - ia64_itci(pte); - if (target_mask & 0x2) - ia64_itcd(pte); -} - -/* - * Purge a range of addresses from instruction and/or data translation - * register(s). - */ -static inline void -ia64_ptr (__u64 target_mask, __u64 vmaddr, __u64 log_size) -{ - if (target_mask & 0x1) - ia64_ptri(vmaddr, (log_size << 2)); - if (target_mask & 0x2) - ia64_ptrd(vmaddr, (log_size << 2)); -} - -/* Set the interrupt vector address. The address must be suitably aligned (32KB). */ -static inline void -ia64_set_iva (void *ivt_addr) -{ - ia64_setreg(_IA64_REG_CR_IVA, (__u64) ivt_addr); - ia64_srlz_i(); -} - -/* Set the page table address and control bits. */ -static inline void -ia64_set_pta (__u64 pta) -{ - /* Note: srlz.i implies srlz.d */ - ia64_setreg(_IA64_REG_CR_PTA, pta); - ia64_srlz_i(); -} - -static inline void -ia64_eoi (void) -{ - ia64_setreg(_IA64_REG_CR_EOI, 0); - ia64_srlz_d(); -} - -#define cpu_relax() ia64_hint(ia64_hint_pause) - -static inline int -ia64_get_irr(unsigned int vector) -{ - unsigned int reg = vector / 64; - unsigned int bit = vector % 64; - u64 irr; - - switch (reg) { - case 0: irr = ia64_getreg(_IA64_REG_CR_IRR0); break; - case 1: irr = ia64_getreg(_IA64_REG_CR_IRR1); break; - case 2: irr = ia64_getreg(_IA64_REG_CR_IRR2); break; - case 3: irr = ia64_getreg(_IA64_REG_CR_IRR3); break; - } - - return test_bit(bit, &irr); -} - -static inline void -ia64_set_lrr0 (unsigned long val) -{ - ia64_setreg(_IA64_REG_CR_LRR0, val); - ia64_srlz_d(); -} - -static inline void -ia64_set_lrr1 (unsigned long val) -{ - ia64_setreg(_IA64_REG_CR_LRR1, val); - ia64_srlz_d(); -} - - -/* - * Given the address to which a spill occurred, return the unat bit - * number that corresponds to this address. - */ -static inline __u64 -ia64_unat_pos (void *spill_addr) -{ - return ((__u64) spill_addr >> 3) & 0x3f; -} - -/* - * Set the NaT bit of an integer register which was spilled at address - * SPILL_ADDR. UNAT is the mask to be updated. - */ -static inline void -ia64_set_unat (__u64 *unat, void *spill_addr, unsigned long nat) -{ - __u64 bit = ia64_unat_pos(spill_addr); - __u64 mask = 1UL << bit; - - *unat = (*unat & ~mask) | (nat << bit); -} - -/* - * Return saved PC of a blocked thread. - * Note that the only way T can block is through a call to schedule() -> switch_to(). - */ -static inline unsigned long -thread_saved_pc (struct task_struct *t) -{ - struct unw_frame_info info; - unsigned long ip; - - unw_init_from_blocked_task(&info, t); - if (unw_unwind(&info) < 0) - return 0; - unw_get_ip(&info, &ip); - return ip; -} - -/* - * Get the current instruction/program counter value. - */ -#define current_text_addr() \ - ({ void *_pc; _pc = (void *)ia64_getreg(_IA64_REG_IP); _pc; }) - -static inline __u64 -ia64_get_ivr (void) -{ - __u64 r; - ia64_srlz_d(); - r = ia64_getreg(_IA64_REG_CR_IVR); - ia64_srlz_d(); - return r; -} - -static inline void -ia64_set_dbr (__u64 regnum, __u64 value) -{ - __ia64_set_dbr(regnum, value); -#ifdef CONFIG_ITANIUM - ia64_srlz_d(); -#endif -} - -static inline __u64 -ia64_get_dbr (__u64 regnum) -{ - __u64 retval; - - retval = __ia64_get_dbr(regnum); -#ifdef CONFIG_ITANIUM - ia64_srlz_d(); -#endif - return retval; -} - -static inline __u64 -ia64_rotr (__u64 w, __u64 n) -{ - return (w >> n) | (w << (64 - n)); -} - -#define ia64_rotl(w,n) ia64_rotr((w), (64) - (n)) - -/* - * Take a mapped kernel address and return the equivalent address - * in the region 7 identity mapped virtual area. - */ -static inline void * -ia64_imva (void *addr) -{ - void *result; - result = (void *) ia64_tpa(addr); - return __va(result); -} - -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH -#define PREFETCH_STRIDE L1_CACHE_BYTES - -static inline void -prefetch (const void *x) -{ - ia64_lfetch(ia64_lfhint_none, x); -} - -static inline void -prefetchw (const void *x) -{ - ia64_lfetch_excl(ia64_lfhint_none, x); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -extern unsigned long boot_option_idle_override; -extern unsigned long idle_halt; -extern unsigned long idle_nomwait; - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_PROCESSOR_H */ diff --git a/include/asm-ia64/ptrace.h b/include/asm-ia64/ptrace.h deleted file mode 100644 index 15f8dcf..0000000 --- a/include/asm-ia64/ptrace.h +++ /dev/null @@ -1,364 +0,0 @@ -#ifndef _ASM_IA64_PTRACE_H -#define _ASM_IA64_PTRACE_H - -/* - * Copyright (C) 1998-2004 Hewlett-Packard Co - * David Mosberger-Tang - * Stephane Eranian - * Copyright (C) 2003 Intel Co - * Suresh Siddha - * Fenghua Yu - * Arun Sharma - * - * 12/07/98 S. Eranian added pt_regs & switch_stack - * 12/21/98 D. Mosberger updated to match latest code - * 6/17/99 D. Mosberger added second unat member to "struct switch_stack" - * - */ -/* - * When a user process is blocked, its state looks as follows: - * - * +----------------------+ ------- IA64_STK_OFFSET - * | | ^ - * | struct pt_regs | | - * | | | - * +----------------------+ | - * | | | - * | memory stack | | - * | (growing downwards) | | - * //.....................// | - * | - * //.....................// | - * | | | - * +----------------------+ | - * | struct switch_stack | | - * | | | - * +----------------------+ | - * | | | - * //.....................// | - * | - * //.....................// | - * | | | - * | register stack | | - * | (growing upwards) | | - * | | | - * +----------------------+ | --- IA64_RBS_OFFSET - * | struct thread_info | | ^ - * +----------------------+ | | - * | | | | - * | struct task_struct | | | - * current -> | | | | - * +----------------------+ ------- - * - * Note that ar.ec is not saved explicitly in pt_reg or switch_stack. - * This is because ar.ec is saved as part of ar.pfs. - */ - - -#include - -#ifdef __KERNEL__ -#ifndef ASM_OFFSETS_C -#include -#endif - -/* - * Base-2 logarithm of number of pages to allocate per task structure - * (including register backing store and memory stack): - */ -#if defined(CONFIG_IA64_PAGE_SIZE_4KB) -# define KERNEL_STACK_SIZE_ORDER 3 -#elif defined(CONFIG_IA64_PAGE_SIZE_8KB) -# define KERNEL_STACK_SIZE_ORDER 2 -#elif defined(CONFIG_IA64_PAGE_SIZE_16KB) -# define KERNEL_STACK_SIZE_ORDER 1 -#else -# define KERNEL_STACK_SIZE_ORDER 0 -#endif - -#define IA64_RBS_OFFSET ((IA64_TASK_SIZE + IA64_THREAD_INFO_SIZE + 31) & ~31) -#define IA64_STK_OFFSET ((1 << KERNEL_STACK_SIZE_ORDER)*PAGE_SIZE) - -#define KERNEL_STACK_SIZE IA64_STK_OFFSET - -#endif /* __KERNEL__ */ - -#ifndef __ASSEMBLY__ - -/* - * This struct defines the way the registers are saved on system - * calls. - * - * We don't save all floating point register because the kernel - * is compiled to use only a very small subset, so the other are - * untouched. - * - * THIS STRUCTURE MUST BE A MULTIPLE 16-BYTE IN SIZE - * (because the memory stack pointer MUST ALWAYS be aligned this way) - * - */ -struct pt_regs { - /* The following registers are saved by SAVE_MIN: */ - unsigned long b6; /* scratch */ - unsigned long b7; /* scratch */ - - unsigned long ar_csd; /* used by cmp8xchg16 (scratch) */ - unsigned long ar_ssd; /* reserved for future use (scratch) */ - - unsigned long r8; /* scratch (return value register 0) */ - unsigned long r9; /* scratch (return value register 1) */ - unsigned long r10; /* scratch (return value register 2) */ - unsigned long r11; /* scratch (return value register 3) */ - - unsigned long cr_ipsr; /* interrupted task's psr */ - unsigned long cr_iip; /* interrupted task's instruction pointer */ - /* - * interrupted task's function state; if bit 63 is cleared, it - * contains syscall's ar.pfs.pfm: - */ - unsigned long cr_ifs; - - unsigned long ar_unat; /* interrupted task's NaT register (preserved) */ - unsigned long ar_pfs; /* prev function state */ - unsigned long ar_rsc; /* RSE configuration */ - /* The following two are valid only if cr_ipsr.cpl > 0 || ti->flags & _TIF_MCA_INIT */ - unsigned long ar_rnat; /* RSE NaT */ - unsigned long ar_bspstore; /* RSE bspstore */ - - unsigned long pr; /* 64 predicate registers (1 bit each) */ - unsigned long b0; /* return pointer (bp) */ - unsigned long loadrs; /* size of dirty partition << 16 */ - - unsigned long r1; /* the gp pointer */ - unsigned long r12; /* interrupted task's memory stack pointer */ - unsigned long r13; /* thread pointer */ - - unsigned long ar_fpsr; /* floating point status (preserved) */ - unsigned long r15; /* scratch */ - - /* The remaining registers are NOT saved for system calls. */ - - unsigned long r14; /* scratch */ - unsigned long r2; /* scratch */ - unsigned long r3; /* scratch */ - - /* The following registers are saved by SAVE_REST: */ - unsigned long r16; /* scratch */ - unsigned long r17; /* scratch */ - unsigned long r18; /* scratch */ - unsigned long r19; /* scratch */ - unsigned long r20; /* scratch */ - unsigned long r21; /* scratch */ - unsigned long r22; /* scratch */ - unsigned long r23; /* scratch */ - unsigned long r24; /* scratch */ - unsigned long r25; /* scratch */ - unsigned long r26; /* scratch */ - unsigned long r27; /* scratch */ - unsigned long r28; /* scratch */ - unsigned long r29; /* scratch */ - unsigned long r30; /* scratch */ - unsigned long r31; /* scratch */ - - unsigned long ar_ccv; /* compare/exchange value (scratch) */ - - /* - * Floating point registers that the kernel considers scratch: - */ - struct ia64_fpreg f6; /* scratch */ - struct ia64_fpreg f7; /* scratch */ - struct ia64_fpreg f8; /* scratch */ - struct ia64_fpreg f9; /* scratch */ - struct ia64_fpreg f10; /* scratch */ - struct ia64_fpreg f11; /* scratch */ -}; - -/* - * This structure contains the addition registers that need to - * preserved across a context switch. This generally consists of - * "preserved" registers. - */ -struct switch_stack { - unsigned long caller_unat; /* user NaT collection register (preserved) */ - unsigned long ar_fpsr; /* floating-point status register */ - - struct ia64_fpreg f2; /* preserved */ - struct ia64_fpreg f3; /* preserved */ - struct ia64_fpreg f4; /* preserved */ - struct ia64_fpreg f5; /* preserved */ - - struct ia64_fpreg f12; /* scratch, but untouched by kernel */ - struct ia64_fpreg f13; /* scratch, but untouched by kernel */ - struct ia64_fpreg f14; /* scratch, but untouched by kernel */ - struct ia64_fpreg f15; /* scratch, but untouched by kernel */ - struct ia64_fpreg f16; /* preserved */ - struct ia64_fpreg f17; /* preserved */ - struct ia64_fpreg f18; /* preserved */ - struct ia64_fpreg f19; /* preserved */ - struct ia64_fpreg f20; /* preserved */ - struct ia64_fpreg f21; /* preserved */ - struct ia64_fpreg f22; /* preserved */ - struct ia64_fpreg f23; /* preserved */ - struct ia64_fpreg f24; /* preserved */ - struct ia64_fpreg f25; /* preserved */ - struct ia64_fpreg f26; /* preserved */ - struct ia64_fpreg f27; /* preserved */ - struct ia64_fpreg f28; /* preserved */ - struct ia64_fpreg f29; /* preserved */ - struct ia64_fpreg f30; /* preserved */ - struct ia64_fpreg f31; /* preserved */ - - unsigned long r4; /* preserved */ - unsigned long r5; /* preserved */ - unsigned long r6; /* preserved */ - unsigned long r7; /* preserved */ - - unsigned long b0; /* so we can force a direct return in copy_thread */ - unsigned long b1; - unsigned long b2; - unsigned long b3; - unsigned long b4; - unsigned long b5; - - unsigned long ar_pfs; /* previous function state */ - unsigned long ar_lc; /* loop counter (preserved) */ - unsigned long ar_unat; /* NaT bits for r4-r7 */ - unsigned long ar_rnat; /* RSE NaT collection register */ - unsigned long ar_bspstore; /* RSE dirty base (preserved) */ - unsigned long pr; /* 64 predicate registers (1 bit each) */ -}; - -#ifdef __KERNEL__ - -#include -#include - -/* - * We use the ia64_psr(regs)->ri to determine which of the three - * instructions in bundle (16 bytes) took the sample. Generate - * the canonical representation by adding to instruction pointer. - */ -# define instruction_pointer(regs) ((regs)->cr_iip + ia64_psr(regs)->ri) - -#define regs_return_value(regs) ((regs)->r8) - -/* Conserve space in histogram by encoding slot bits in address - * bits 2 and 3 rather than bits 0 and 1. - */ -#define profile_pc(regs) \ -({ \ - unsigned long __ip = instruction_pointer(regs); \ - (__ip & ~3UL) + ((__ip & 3UL) << 2); \ -}) - - /* given a pointer to a task_struct, return the user's pt_regs */ -# define task_pt_regs(t) (((struct pt_regs *) ((char *) (t) + IA64_STK_OFFSET)) - 1) -# define ia64_psr(regs) ((struct ia64_psr *) &(regs)->cr_ipsr) -# define user_mode(regs) (((struct ia64_psr *) &(regs)->cr_ipsr)->cpl != 0) -# define user_stack(task,regs) ((long) regs - (long) task == IA64_STK_OFFSET - sizeof(*regs)) -# define fsys_mode(task,regs) \ - ({ \ - struct task_struct *_task = (task); \ - struct pt_regs *_regs = (regs); \ - !user_mode(_regs) && user_stack(_task, _regs); \ - }) - - /* - * System call handlers that, upon successful completion, need to return a negative value - * should call force_successful_syscall_return() right before returning. On architectures - * where the syscall convention provides for a separate error flag (e.g., alpha, ia64, - * ppc{,64}, sparc{,64}, possibly others), this macro can be used to ensure that the error - * flag will not get set. On architectures which do not support a separate error flag, - * the macro is a no-op and the spurious error condition needs to be filtered out by some - * other means (e.g., in user-level, by passing an extra argument to the syscall handler, - * or something along those lines). - * - * On ia64, we can clear the user's pt_regs->r8 to force a successful syscall. - */ -# define force_successful_syscall_return() (task_pt_regs(current)->r8 = 0) - - struct task_struct; /* forward decl */ - struct unw_frame_info; /* forward decl */ - - extern void show_regs (struct pt_regs *); - extern void ia64_do_show_stack (struct unw_frame_info *, void *); - extern unsigned long ia64_get_user_rbs_end (struct task_struct *, struct pt_regs *, - unsigned long *); - extern long ia64_peek (struct task_struct *, struct switch_stack *, unsigned long, - unsigned long, long *); - extern long ia64_poke (struct task_struct *, struct switch_stack *, unsigned long, - unsigned long, long); - extern void ia64_flush_fph (struct task_struct *); - extern void ia64_sync_fph (struct task_struct *); - extern void ia64_sync_krbs(void); - extern long ia64_sync_user_rbs (struct task_struct *, struct switch_stack *, - unsigned long, unsigned long); - - /* get nat bits for scratch registers such that bit N==1 iff scratch register rN is a NaT */ - extern unsigned long ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat); - /* put nat bits for scratch registers such that scratch register rN is a NaT iff bit N==1 */ - extern unsigned long ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat); - - extern void ia64_increment_ip (struct pt_regs *pt); - extern void ia64_decrement_ip (struct pt_regs *pt); - - extern void ia64_ptrace_stop(void); - #define arch_ptrace_stop(code, info) \ - ia64_ptrace_stop() - #define arch_ptrace_stop_needed(code, info) \ - (!test_thread_flag(TIF_RESTORE_RSE)) - - extern void ptrace_attach_sync_user_rbs (struct task_struct *); - #define arch_ptrace_attach(child) \ - ptrace_attach_sync_user_rbs(child) - - #define arch_has_single_step() (1) - extern void user_enable_single_step(struct task_struct *); - extern void user_disable_single_step(struct task_struct *); - - #define arch_has_block_step() (1) - extern void user_enable_block_step(struct task_struct *); - -#endif /* !__KERNEL__ */ - -/* pt_all_user_regs is used for PTRACE_GETREGS PTRACE_SETREGS */ -struct pt_all_user_regs { - unsigned long nat; - unsigned long cr_iip; - unsigned long cfm; - unsigned long cr_ipsr; - unsigned long pr; - - unsigned long gr[32]; - unsigned long br[8]; - unsigned long ar[128]; - struct ia64_fpreg fr[128]; -}; - -#endif /* !__ASSEMBLY__ */ - -/* indices to application-registers array in pt_all_user_regs */ -#define PT_AUR_RSC 16 -#define PT_AUR_BSP 17 -#define PT_AUR_BSPSTORE 18 -#define PT_AUR_RNAT 19 -#define PT_AUR_CCV 32 -#define PT_AUR_UNAT 36 -#define PT_AUR_FPSR 40 -#define PT_AUR_PFS 64 -#define PT_AUR_LC 65 -#define PT_AUR_EC 66 - -/* - * The numbers chosen here are somewhat arbitrary but absolutely MUST - * not overlap with any of the number assigned in . - */ -#define PTRACE_SINGLEBLOCK 12 /* resume execution until next branch */ -#define PTRACE_OLD_GETSIGINFO 13 /* (replaced by PTRACE_GETSIGINFO in ) */ -#define PTRACE_OLD_SETSIGINFO 14 /* (replaced by PTRACE_SETSIGINFO in ) */ -#define PTRACE_GETREGS 18 /* get all registers (pt_all_user_regs) in one shot */ -#define PTRACE_SETREGS 19 /* set all registers (pt_all_user_regs) in one shot */ - -#define PTRACE_OLDSETOPTIONS 21 - -#endif /* _ASM_IA64_PTRACE_H */ diff --git a/include/asm-ia64/ptrace_offsets.h b/include/asm-ia64/ptrace_offsets.h deleted file mode 100644 index b712773..0000000 --- a/include/asm-ia64/ptrace_offsets.h +++ /dev/null @@ -1,268 +0,0 @@ -#ifndef _ASM_IA64_PTRACE_OFFSETS_H -#define _ASM_IA64_PTRACE_OFFSETS_H - -/* - * Copyright (C) 1999, 2003 Hewlett-Packard Co - * David Mosberger-Tang - */ -/* - * The "uarea" that can be accessed via PEEKUSER and POKEUSER is a - * virtual structure that would have the following definition: - * - * struct uarea { - * struct ia64_fpreg fph[96]; // f32-f127 - * unsigned long nat_bits; - * unsigned long empty1; - * struct ia64_fpreg f2; // f2-f5 - * : - * struct ia64_fpreg f5; - * struct ia64_fpreg f10; // f10-f31 - * : - * struct ia64_fpreg f31; - * unsigned long r4; // r4-r7 - * : - * unsigned long r7; - * unsigned long b1; // b1-b5 - * : - * unsigned long b5; - * unsigned long ar_ec; - * unsigned long ar_lc; - * unsigned long empty2[5]; - * unsigned long cr_ipsr; - * unsigned long cr_iip; - * unsigned long cfm; - * unsigned long ar_unat; - * unsigned long ar_pfs; - * unsigned long ar_rsc; - * unsigned long ar_rnat; - * unsigned long ar_bspstore; - * unsigned long pr; - * unsigned long b6; - * unsigned long ar_bsp; - * unsigned long r1; - * unsigned long r2; - * unsigned long r3; - * unsigned long r12; - * unsigned long r13; - * unsigned long r14; - * unsigned long r15; - * unsigned long r8; - * unsigned long r9; - * unsigned long r10; - * unsigned long r11; - * unsigned long r16; - * : - * unsigned long r31; - * unsigned long ar_ccv; - * unsigned long ar_fpsr; - * unsigned long b0; - * unsigned long b7; - * unsigned long f6; - * unsigned long f7; - * unsigned long f8; - * unsigned long f9; - * unsigned long ar_csd; - * unsigned long ar_ssd; - * unsigned long rsvd1[710]; - * unsigned long dbr[8]; - * unsigned long rsvd2[504]; - * unsigned long ibr[8]; - * unsigned long rsvd3[504]; - * unsigned long pmd[4]; - * } - */ - -/* fph: */ -#define PT_F32 0x0000 -#define PT_F33 0x0010 -#define PT_F34 0x0020 -#define PT_F35 0x0030 -#define PT_F36 0x0040 -#define PT_F37 0x0050 -#define PT_F38 0x0060 -#define PT_F39 0x0070 -#define PT_F40 0x0080 -#define PT_F41 0x0090 -#define PT_F42 0x00a0 -#define PT_F43 0x00b0 -#define PT_F44 0x00c0 -#define PT_F45 0x00d0 -#define PT_F46 0x00e0 -#define PT_F47 0x00f0 -#define PT_F48 0x0100 -#define PT_F49 0x0110 -#define PT_F50 0x0120 -#define PT_F51 0x0130 -#define PT_F52 0x0140 -#define PT_F53 0x0150 -#define PT_F54 0x0160 -#define PT_F55 0x0170 -#define PT_F56 0x0180 -#define PT_F57 0x0190 -#define PT_F58 0x01a0 -#define PT_F59 0x01b0 -#define PT_F60 0x01c0 -#define PT_F61 0x01d0 -#define PT_F62 0x01e0 -#define PT_F63 0x01f0 -#define PT_F64 0x0200 -#define PT_F65 0x0210 -#define PT_F66 0x0220 -#define PT_F67 0x0230 -#define PT_F68 0x0240 -#define PT_F69 0x0250 -#define PT_F70 0x0260 -#define PT_F71 0x0270 -#define PT_F72 0x0280 -#define PT_F73 0x0290 -#define PT_F74 0x02a0 -#define PT_F75 0x02b0 -#define PT_F76 0x02c0 -#define PT_F77 0x02d0 -#define PT_F78 0x02e0 -#define PT_F79 0x02f0 -#define PT_F80 0x0300 -#define PT_F81 0x0310 -#define PT_F82 0x0320 -#define PT_F83 0x0330 -#define PT_F84 0x0340 -#define PT_F85 0x0350 -#define PT_F86 0x0360 -#define PT_F87 0x0370 -#define PT_F88 0x0380 -#define PT_F89 0x0390 -#define PT_F90 0x03a0 -#define PT_F91 0x03b0 -#define PT_F92 0x03c0 -#define PT_F93 0x03d0 -#define PT_F94 0x03e0 -#define PT_F95 0x03f0 -#define PT_F96 0x0400 -#define PT_F97 0x0410 -#define PT_F98 0x0420 -#define PT_F99 0x0430 -#define PT_F100 0x0440 -#define PT_F101 0x0450 -#define PT_F102 0x0460 -#define PT_F103 0x0470 -#define PT_F104 0x0480 -#define PT_F105 0x0490 -#define PT_F106 0x04a0 -#define PT_F107 0x04b0 -#define PT_F108 0x04c0 -#define PT_F109 0x04d0 -#define PT_F110 0x04e0 -#define PT_F111 0x04f0 -#define PT_F112 0x0500 -#define PT_F113 0x0510 -#define PT_F114 0x0520 -#define PT_F115 0x0530 -#define PT_F116 0x0540 -#define PT_F117 0x0550 -#define PT_F118 0x0560 -#define PT_F119 0x0570 -#define PT_F120 0x0580 -#define PT_F121 0x0590 -#define PT_F122 0x05a0 -#define PT_F123 0x05b0 -#define PT_F124 0x05c0 -#define PT_F125 0x05d0 -#define PT_F126 0x05e0 -#define PT_F127 0x05f0 - -#define PT_NAT_BITS 0x0600 - -#define PT_F2 0x0610 -#define PT_F3 0x0620 -#define PT_F4 0x0630 -#define PT_F5 0x0640 -#define PT_F10 0x0650 -#define PT_F11 0x0660 -#define PT_F12 0x0670 -#define PT_F13 0x0680 -#define PT_F14 0x0690 -#define PT_F15 0x06a0 -#define PT_F16 0x06b0 -#define PT_F17 0x06c0 -#define PT_F18 0x06d0 -#define PT_F19 0x06e0 -#define PT_F20 0x06f0 -#define PT_F21 0x0700 -#define PT_F22 0x0710 -#define PT_F23 0x0720 -#define PT_F24 0x0730 -#define PT_F25 0x0740 -#define PT_F26 0x0750 -#define PT_F27 0x0760 -#define PT_F28 0x0770 -#define PT_F29 0x0780 -#define PT_F30 0x0790 -#define PT_F31 0x07a0 -#define PT_R4 0x07b0 -#define PT_R5 0x07b8 -#define PT_R6 0x07c0 -#define PT_R7 0x07c8 - -#define PT_B1 0x07d8 -#define PT_B2 0x07e0 -#define PT_B3 0x07e8 -#define PT_B4 0x07f0 -#define PT_B5 0x07f8 - -#define PT_AR_EC 0x0800 -#define PT_AR_LC 0x0808 - -#define PT_CR_IPSR 0x0830 -#define PT_CR_IIP 0x0838 -#define PT_CFM 0x0840 -#define PT_AR_UNAT 0x0848 -#define PT_AR_PFS 0x0850 -#define PT_AR_RSC 0x0858 -#define PT_AR_RNAT 0x0860 -#define PT_AR_BSPSTORE 0x0868 -#define PT_PR 0x0870 -#define PT_B6 0x0878 -#define PT_AR_BSP 0x0880 /* note: this points to the *end* of the backing store! */ -#define PT_R1 0x0888 -#define PT_R2 0x0890 -#define PT_R3 0x0898 -#define PT_R12 0x08a0 -#define PT_R13 0x08a8 -#define PT_R14 0x08b0 -#define PT_R15 0x08b8 -#define PT_R8 0x08c0 -#define PT_R9 0x08c8 -#define PT_R10 0x08d0 -#define PT_R11 0x08d8 -#define PT_R16 0x08e0 -#define PT_R17 0x08e8 -#define PT_R18 0x08f0 -#define PT_R19 0x08f8 -#define PT_R20 0x0900 -#define PT_R21 0x0908 -#define PT_R22 0x0910 -#define PT_R23 0x0918 -#define PT_R24 0x0920 -#define PT_R25 0x0928 -#define PT_R26 0x0930 -#define PT_R27 0x0938 -#define PT_R28 0x0940 -#define PT_R29 0x0948 -#define PT_R30 0x0950 -#define PT_R31 0x0958 -#define PT_AR_CCV 0x0960 -#define PT_AR_FPSR 0x0968 -#define PT_B0 0x0970 -#define PT_B7 0x0978 -#define PT_F6 0x0980 -#define PT_F7 0x0990 -#define PT_F8 0x09a0 -#define PT_F9 0x09b0 -#define PT_AR_CSD 0x09c0 -#define PT_AR_SSD 0x09c8 - -#define PT_DBR 0x2000 /* data breakpoint registers */ -#define PT_IBR 0x3000 /* instruction breakpoint registers */ -#define PT_PMD 0x4000 /* performance monitoring counters */ - -#endif /* _ASM_IA64_PTRACE_OFFSETS_H */ diff --git a/include/asm-ia64/resource.h b/include/asm-ia64/resource.h deleted file mode 100644 index ba2272a..0000000 --- a/include/asm-ia64/resource.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ASM_IA64_RESOURCE_H -#define _ASM_IA64_RESOURCE_H - -#include -#include - -#endif /* _ASM_IA64_RESOURCE_H */ diff --git a/include/asm-ia64/rse.h b/include/asm-ia64/rse.h deleted file mode 100644 index 02830a3..0000000 --- a/include/asm-ia64/rse.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef _ASM_IA64_RSE_H -#define _ASM_IA64_RSE_H - -/* - * Copyright (C) 1998, 1999 Hewlett-Packard Co - * Copyright (C) 1998, 1999 David Mosberger-Tang - * - * Register stack engine related helper functions. This file may be - * used in applications, so be careful about the name-space and give - * some consideration to non-GNU C compilers (though __inline__ is - * fine). - */ - -static __inline__ unsigned long -ia64_rse_slot_num (unsigned long *addr) -{ - return (((unsigned long) addr) >> 3) & 0x3f; -} - -/* - * Return TRUE if ADDR is the address of an RNAT slot. - */ -static __inline__ unsigned long -ia64_rse_is_rnat_slot (unsigned long *addr) -{ - return ia64_rse_slot_num(addr) == 0x3f; -} - -/* - * Returns the address of the RNAT slot that covers the slot at - * address SLOT_ADDR. - */ -static __inline__ unsigned long * -ia64_rse_rnat_addr (unsigned long *slot_addr) -{ - return (unsigned long *) ((unsigned long) slot_addr | (0x3f << 3)); -} - -/* - * Calculate the number of registers in the dirty partition starting at BSPSTORE and - * ending at BSP. This isn't simply (BSP-BSPSTORE)/8 because every 64th slot stores - * ar.rnat. - */ -static __inline__ unsigned long -ia64_rse_num_regs (unsigned long *bspstore, unsigned long *bsp) -{ - unsigned long slots = (bsp - bspstore); - - return slots - (ia64_rse_slot_num(bspstore) + slots)/0x40; -} - -/* - * The inverse of the above: given bspstore and the number of - * registers, calculate ar.bsp. - */ -static __inline__ unsigned long * -ia64_rse_skip_regs (unsigned long *addr, long num_regs) -{ - long delta = ia64_rse_slot_num(addr) + num_regs; - - if (num_regs < 0) - delta -= 0x3e; - return addr + num_regs + delta/0x3f; -} - -#endif /* _ASM_IA64_RSE_H */ diff --git a/include/asm-ia64/rwsem.h b/include/asm-ia64/rwsem.h deleted file mode 100644 index 8aba06a..0000000 --- a/include/asm-ia64/rwsem.h +++ /dev/null @@ -1,182 +0,0 @@ -/* - * asm-ia64/rwsem.h: R/W semaphores for ia64 - * - * Copyright (C) 2003 Ken Chen - * Copyright (C) 2003 Asit Mallick - * Copyright (C) 2005 Christoph Lameter - * - * Based on asm-i386/rwsem.h and other architecture implementation. - * - * The MSW of the count is the negated number of active writers and - * waiting lockers, and the LSW is the total number of active locks. - * - * The lock count is initialized to 0 (no active and no waiting lockers). - * - * When a writer subtracts WRITE_BIAS, it'll get 0xffffffff00000001 for - * the case of an uncontended lock. Readers increment by 1 and see a positive - * value when uncontended, negative if there are writers (and maybe) readers - * waiting (in which case it goes to sleep). - */ - -#ifndef _ASM_IA64_RWSEM_H -#define _ASM_IA64_RWSEM_H - -#ifndef _LINUX_RWSEM_H -#error "Please don't include directly, use instead." -#endif - -#include -#include - -#include - -/* - * the semaphore definition - */ -struct rw_semaphore { - signed long count; - spinlock_t wait_lock; - struct list_head wait_list; -}; - -#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000) -#define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001) -#define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff) -#define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \ - LIST_HEAD_INIT((name).wait_list) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -static inline void -init_rwsem (struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} - -/* - * lock for reading - */ -static inline void -__down_read (struct rw_semaphore *sem) -{ - long result = ia64_fetchadd8_acq((unsigned long *)&sem->count, 1); - - if (result < 0) - rwsem_down_read_failed(sem); -} - -/* - * lock for writing - */ -static inline void -__down_write (struct rw_semaphore *sem) -{ - long old, new; - - do { - old = sem->count; - new = old + RWSEM_ACTIVE_WRITE_BIAS; - } while (cmpxchg_acq(&sem->count, old, new) != old); - - if (old != 0) - rwsem_down_write_failed(sem); -} - -/* - * unlock after reading - */ -static inline void -__up_read (struct rw_semaphore *sem) -{ - long result = ia64_fetchadd8_rel((unsigned long *)&sem->count, -1); - - if (result < 0 && (--result & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * unlock after writing - */ -static inline void -__up_write (struct rw_semaphore *sem) -{ - long old, new; - - do { - old = sem->count; - new = old - RWSEM_ACTIVE_WRITE_BIAS; - } while (cmpxchg_rel(&sem->count, old, new) != old); - - if (new < 0 && (new & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * trylock for reading -- returns 1 if successful, 0 if contention - */ -static inline int -__down_read_trylock (struct rw_semaphore *sem) -{ - long tmp; - while ((tmp = sem->count) >= 0) { - if (tmp == cmpxchg_acq(&sem->count, tmp, tmp+1)) { - return 1; - } - } - return 0; -} - -/* - * trylock for writing -- returns 1 if successful, 0 if contention - */ -static inline int -__down_write_trylock (struct rw_semaphore *sem) -{ - long tmp = cmpxchg_acq(&sem->count, RWSEM_UNLOCKED_VALUE, - RWSEM_ACTIVE_WRITE_BIAS); - return tmp == RWSEM_UNLOCKED_VALUE; -} - -/* - * downgrade write lock to read lock - */ -static inline void -__downgrade_write (struct rw_semaphore *sem) -{ - long old, new; - - do { - old = sem->count; - new = old - RWSEM_WAITING_BIAS; - } while (cmpxchg_rel(&sem->count, old, new) != old); - - if (old < 0) - rwsem_downgrade_wake(sem); -} - -/* - * Implement atomic add functionality. These used to be "inline" functions, but GCC v3.1 - * doesn't quite optimize this stuff right and ends up with bad calls to fetchandadd. - */ -#define rwsem_atomic_add(delta, sem) atomic64_add(delta, (atomic64_t *)(&(sem)->count)) -#define rwsem_atomic_update(delta, sem) atomic64_add_return(delta, (atomic64_t *)(&(sem)->count)) - -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - -#endif /* _ASM_IA64_RWSEM_H */ diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h deleted file mode 100644 index 89594b4..0000000 --- a/include/asm-ia64/sal.h +++ /dev/null @@ -1,905 +0,0 @@ -#ifndef _ASM_IA64_SAL_H -#define _ASM_IA64_SAL_H - -/* - * System Abstraction Layer definitions. - * - * This is based on version 2.5 of the manual "IA-64 System - * Abstraction Layer". - * - * Copyright (C) 2001 Intel - * Copyright (C) 2002 Jenna Hall - * Copyright (C) 2001 Fred Lewis - * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 Srinivasa Prasad Thirumalachar - * - * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001 - * revision of the SAL spec. - * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000 - * revision of the SAL spec. - * 99/09/29 davidm Updated for SAL 2.6. - * 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6) - * (plus examples of platform error info structures from smariset @ Intel) - */ - -#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0 -#define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1 -#define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2 -#define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3 - -#define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1< -#include -#include - -#include -#include -#include - -extern spinlock_t sal_lock; - -/* SAL spec _requires_ eight args for each call. */ -#define __IA64_FW_CALL(entry,result,a0,a1,a2,a3,a4,a5,a6,a7) \ - result = (*entry)(a0,a1,a2,a3,a4,a5,a6,a7) - -# define IA64_FW_CALL(entry,result,args...) do { \ - unsigned long __ia64_sc_flags; \ - struct ia64_fpreg __ia64_sc_fr[6]; \ - ia64_save_scratch_fpregs(__ia64_sc_fr); \ - spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \ - __IA64_FW_CALL(entry, result, args); \ - spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \ - ia64_load_scratch_fpregs(__ia64_sc_fr); \ -} while (0) - -# define SAL_CALL(result,args...) \ - IA64_FW_CALL(ia64_sal, result, args); - -# define SAL_CALL_NOLOCK(result,args...) do { \ - unsigned long __ia64_scn_flags; \ - struct ia64_fpreg __ia64_scn_fr[6]; \ - ia64_save_scratch_fpregs(__ia64_scn_fr); \ - local_irq_save(__ia64_scn_flags); \ - __IA64_FW_CALL(ia64_sal, result, args); \ - local_irq_restore(__ia64_scn_flags); \ - ia64_load_scratch_fpregs(__ia64_scn_fr); \ -} while (0) - -# define SAL_CALL_REENTRANT(result,args...) do { \ - struct ia64_fpreg __ia64_scs_fr[6]; \ - ia64_save_scratch_fpregs(__ia64_scs_fr); \ - preempt_disable(); \ - __IA64_FW_CALL(ia64_sal, result, args); \ - preempt_enable(); \ - ia64_load_scratch_fpregs(__ia64_scs_fr); \ -} while (0) - -#define SAL_SET_VECTORS 0x01000000 -#define SAL_GET_STATE_INFO 0x01000001 -#define SAL_GET_STATE_INFO_SIZE 0x01000002 -#define SAL_CLEAR_STATE_INFO 0x01000003 -#define SAL_MC_RENDEZ 0x01000004 -#define SAL_MC_SET_PARAMS 0x01000005 -#define SAL_REGISTER_PHYSICAL_ADDR 0x01000006 - -#define SAL_CACHE_FLUSH 0x01000008 -#define SAL_CACHE_INIT 0x01000009 -#define SAL_PCI_CONFIG_READ 0x01000010 -#define SAL_PCI_CONFIG_WRITE 0x01000011 -#define SAL_FREQ_BASE 0x01000012 -#define SAL_PHYSICAL_ID_INFO 0x01000013 - -#define SAL_UPDATE_PAL 0x01000020 - -struct ia64_sal_retval { - /* - * A zero status value indicates call completed without error. - * A negative status value indicates reason of call failure. - * A positive status value indicates success but an - * informational value should be printed (e.g., "reboot for - * change to take effect"). - */ - s64 status; - u64 v0; - u64 v1; - u64 v2; -}; - -typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...); - -enum { - SAL_FREQ_BASE_PLATFORM = 0, - SAL_FREQ_BASE_INTERVAL_TIMER = 1, - SAL_FREQ_BASE_REALTIME_CLOCK = 2 -}; - -/* - * The SAL system table is followed by a variable number of variable - * length descriptors. The structure of these descriptors follows - * below. - * The defininition follows SAL specs from July 2000 - */ -struct ia64_sal_systab { - u8 signature[4]; /* should be "SST_" */ - u32 size; /* size of this table in bytes */ - u8 sal_rev_minor; - u8 sal_rev_major; - u16 entry_count; /* # of entries in variable portion */ - u8 checksum; - u8 reserved1[7]; - u8 sal_a_rev_minor; - u8 sal_a_rev_major; - u8 sal_b_rev_minor; - u8 sal_b_rev_major; - /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */ - u8 oem_id[32]; - u8 product_id[32]; /* ASCII product id */ - u8 reserved2[8]; -}; - -enum sal_systab_entry_type { - SAL_DESC_ENTRY_POINT = 0, - SAL_DESC_MEMORY = 1, - SAL_DESC_PLATFORM_FEATURE = 2, - SAL_DESC_TR = 3, - SAL_DESC_PTC = 4, - SAL_DESC_AP_WAKEUP = 5 -}; - -/* - * Entry type: Size: - * 0 48 - * 1 32 - * 2 16 - * 3 32 - * 4 16 - * 5 16 - */ -#define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type] - -typedef struct ia64_sal_desc_entry_point { - u8 type; - u8 reserved1[7]; - u64 pal_proc; - u64 sal_proc; - u64 gp; - u8 reserved2[16]; -}ia64_sal_desc_entry_point_t; - -typedef struct ia64_sal_desc_memory { - u8 type; - u8 used_by_sal; /* needs to be mapped for SAL? */ - u8 mem_attr; /* current memory attribute setting */ - u8 access_rights; /* access rights set up by SAL */ - u8 mem_attr_mask; /* mask of supported memory attributes */ - u8 reserved1; - u8 mem_type; /* memory type */ - u8 mem_usage; /* memory usage */ - u64 addr; /* physical address of memory */ - u32 length; /* length (multiple of 4KB pages) */ - u32 reserved2; - u8 oem_reserved[8]; -} ia64_sal_desc_memory_t; - -typedef struct ia64_sal_desc_platform_feature { - u8 type; - u8 feature_mask; - u8 reserved1[14]; -} ia64_sal_desc_platform_feature_t; - -typedef struct ia64_sal_desc_tr { - u8 type; - u8 tr_type; /* 0 == instruction, 1 == data */ - u8 regnum; /* translation register number */ - u8 reserved1[5]; - u64 addr; /* virtual address of area covered */ - u64 page_size; /* encoded page size */ - u8 reserved2[8]; -} ia64_sal_desc_tr_t; - -typedef struct ia64_sal_desc_ptc { - u8 type; - u8 reserved1[3]; - u32 num_domains; /* # of coherence domains */ - u64 domain_info; /* physical address of domain info table */ -} ia64_sal_desc_ptc_t; - -typedef struct ia64_sal_ptc_domain_info { - u64 proc_count; /* number of processors in domain */ - u64 proc_list; /* physical address of LID array */ -} ia64_sal_ptc_domain_info_t; - -typedef struct ia64_sal_ptc_domain_proc_entry { - u64 id : 8; /* id of processor */ - u64 eid : 8; /* eid of processor */ -} ia64_sal_ptc_domain_proc_entry_t; - - -#define IA64_SAL_AP_EXTERNAL_INT 0 - -typedef struct ia64_sal_desc_ap_wakeup { - u8 type; - u8 mechanism; /* 0 == external interrupt */ - u8 reserved1[6]; - u64 vector; /* interrupt vector in range 0x10-0xff */ -} ia64_sal_desc_ap_wakeup_t ; - -extern ia64_sal_handler ia64_sal; -extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info; - -extern unsigned short sal_revision; /* supported SAL spec revision */ -extern unsigned short sal_version; /* SAL version; OEM dependent */ -#define SAL_VERSION_CODE(major, minor) ((BIN2BCD(major) << 8) | BIN2BCD(minor)) - -extern const char *ia64_sal_strerror (long status); -extern void ia64_sal_init (struct ia64_sal_systab *sal_systab); - -/* SAL information type encodings */ -enum { - SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */ - SAL_INFO_TYPE_INIT = 1, /* Init information */ - SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */ - SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */ -}; - -/* Encodings for machine check parameter types */ -enum { - SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */ - SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */ - SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */ -}; - -/* Encodings for rendezvous mechanisms */ -enum { - SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */ - SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/ -}; - -/* Encodings for vectors which can be registered by the OS with SAL */ -enum { - SAL_VECTOR_OS_MCA = 0, - SAL_VECTOR_OS_INIT = 1, - SAL_VECTOR_OS_BOOT_RENDEZ = 2 -}; - -/* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */ -#define SAL_MC_PARAM_RZ_ALWAYS 0x1 -#define SAL_MC_PARAM_BINIT_ESCALATE 0x10 - -/* - * Definition of the SAL Error Log from the SAL spec - */ - -/* SAL Error Record Section GUID Definitions */ -#define SAL_PROC_DEV_ERR_SECT_GUID \ - EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \ - EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \ - EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \ - EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \ - EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \ - EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \ - EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \ - EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define SAL_PLAT_BUS_ERR_SECT_GUID \ - EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81) -#define PROCESSOR_ABSTRACTION_LAYER_OVERWRITE_GUID \ - EFI_GUID(0x6cb0a200, 0x893a, 0x11da, 0x96, 0xd2, 0x0, 0x10, 0x83, 0xff, \ - 0xca, 0x4d) - -#define MAX_CACHE_ERRORS 6 -#define MAX_TLB_ERRORS 6 -#define MAX_BUS_ERRORS 1 - -/* Definition of version according to SAL spec for logging purposes */ -typedef struct sal_log_revision { - u8 minor; /* BCD (0..99) */ - u8 major; /* BCD (0..99) */ -} sal_log_revision_t; - -/* Definition of timestamp according to SAL spec for logging purposes */ -typedef struct sal_log_timestamp { - u8 slh_second; /* Second (0..59) */ - u8 slh_minute; /* Minute (0..59) */ - u8 slh_hour; /* Hour (0..23) */ - u8 slh_reserved; - u8 slh_day; /* Day (1..31) */ - u8 slh_month; /* Month (1..12) */ - u8 slh_year; /* Year (00..99) */ - u8 slh_century; /* Century (19, 20, 21, ...) */ -} sal_log_timestamp_t; - -/* Definition of log record header structures */ -typedef struct sal_log_record_header { - u64 id; /* Unique monotonically increasing ID */ - sal_log_revision_t revision; /* Major and Minor revision of header */ - u8 severity; /* Error Severity */ - u8 validation_bits; /* 0: platform_guid, 1: !timestamp */ - u32 len; /* Length of this error log in bytes */ - sal_log_timestamp_t timestamp; /* Timestamp */ - efi_guid_t platform_guid; /* Unique OEM Platform ID */ -} sal_log_record_header_t; - -#define sal_log_severity_recoverable 0 -#define sal_log_severity_fatal 1 -#define sal_log_severity_corrected 2 - -/* Definition of log section header structures */ -typedef struct sal_log_sec_header { - efi_guid_t guid; /* Unique Section ID */ - sal_log_revision_t revision; /* Major and Minor revision of Section */ - u16 reserved; - u32 len; /* Section length */ -} sal_log_section_hdr_t; - -typedef struct sal_log_mod_error_info { - struct { - u64 check_info : 1, - requestor_identifier : 1, - responder_identifier : 1, - target_identifier : 1, - precise_ip : 1, - reserved : 59; - } valid; - u64 check_info; - u64 requestor_identifier; - u64 responder_identifier; - u64 target_identifier; - u64 precise_ip; -} sal_log_mod_error_info_t; - -typedef struct sal_processor_static_info { - struct { - u64 minstate : 1, - br : 1, - cr : 1, - ar : 1, - rr : 1, - fr : 1, - reserved : 58; - } valid; - pal_min_state_area_t min_state_area; - u64 br[8]; - u64 cr[128]; - u64 ar[128]; - u64 rr[8]; - struct ia64_fpreg __attribute__ ((packed)) fr[128]; -} sal_processor_static_info_t; - -struct sal_cpuid_info { - u64 regs[5]; - u64 reserved; -}; - -typedef struct sal_log_processor_info { - sal_log_section_hdr_t header; - struct { - u64 proc_error_map : 1, - proc_state_param : 1, - proc_cr_lid : 1, - psi_static_struct : 1, - num_cache_check : 4, - num_tlb_check : 4, - num_bus_check : 4, - num_reg_file_check : 4, - num_ms_check : 4, - cpuid_info : 1, - reserved1 : 39; - } valid; - u64 proc_error_map; - u64 proc_state_parameter; - u64 proc_cr_lid; - /* - * The rest of this structure consists of variable-length arrays, which can't be - * expressed in C. - */ - sal_log_mod_error_info_t info[0]; - /* - * This is what the rest looked like if C supported variable-length arrays: - * - * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check]; - * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check]; - * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check]; - * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check]; - * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check]; - * struct sal_cpuid_info cpuid_info; - * sal_processor_static_info_t processor_static_info; - */ -} sal_log_processor_info_t; - -/* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */ -#define SAL_LPI_PSI_INFO(l) \ -({ sal_log_processor_info_t *_l = (l); \ - ((sal_processor_static_info_t *) \ - ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \ - + _l->valid.num_bus_check + _l->valid.num_reg_file_check \ - + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \ - + sizeof(struct sal_cpuid_info)))); \ -}) - -/* platform error log structures */ - -typedef struct sal_log_mem_dev_err_info { - sal_log_section_hdr_t header; - struct { - u64 error_status : 1, - physical_addr : 1, - addr_mask : 1, - node : 1, - card : 1, - module : 1, - bank : 1, - device : 1, - row : 1, - column : 1, - bit_position : 1, - requestor_id : 1, - responder_id : 1, - target_id : 1, - bus_spec_data : 1, - oem_id : 1, - oem_data : 1, - reserved : 47; - } valid; - u64 error_status; - u64 physical_addr; - u64 addr_mask; - u16 node; - u16 card; - u16 module; - u16 bank; - u16 device; - u16 row; - u16 column; - u16 bit_position; - u64 requestor_id; - u64 responder_id; - u64 target_id; - u64 bus_spec_data; - u8 oem_id[16]; - u8 oem_data[1]; /* Variable length data */ -} sal_log_mem_dev_err_info_t; - -typedef struct sal_log_sel_dev_err_info { - sal_log_section_hdr_t header; - struct { - u64 record_id : 1, - record_type : 1, - generator_id : 1, - evm_rev : 1, - sensor_type : 1, - sensor_num : 1, - event_dir : 1, - event_data1 : 1, - event_data2 : 1, - event_data3 : 1, - reserved : 54; - } valid; - u16 record_id; - u8 record_type; - u8 timestamp[4]; - u16 generator_id; - u8 evm_rev; - u8 sensor_type; - u8 sensor_num; - u8 event_dir; - u8 event_data1; - u8 event_data2; - u8 event_data3; -} sal_log_sel_dev_err_info_t; - -typedef struct sal_log_pci_bus_err_info { - sal_log_section_hdr_t header; - struct { - u64 err_status : 1, - err_type : 1, - bus_id : 1, - bus_address : 1, - bus_data : 1, - bus_cmd : 1, - requestor_id : 1, - responder_id : 1, - target_id : 1, - oem_data : 1, - reserved : 54; - } valid; - u64 err_status; - u16 err_type; - u16 bus_id; - u32 reserved; - u64 bus_address; - u64 bus_data; - u64 bus_cmd; - u64 requestor_id; - u64 responder_id; - u64 target_id; - u8 oem_data[1]; /* Variable length data */ -} sal_log_pci_bus_err_info_t; - -typedef struct sal_log_smbios_dev_err_info { - sal_log_section_hdr_t header; - struct { - u64 event_type : 1, - length : 1, - time_stamp : 1, - data : 1, - reserved1 : 60; - } valid; - u8 event_type; - u8 length; - u8 time_stamp[6]; - u8 data[1]; /* data of variable length, length == slsmb_length */ -} sal_log_smbios_dev_err_info_t; - -typedef struct sal_log_pci_comp_err_info { - sal_log_section_hdr_t header; - struct { - u64 err_status : 1, - comp_info : 1, - num_mem_regs : 1, - num_io_regs : 1, - reg_data_pairs : 1, - oem_data : 1, - reserved : 58; - } valid; - u64 err_status; - struct { - u16 vendor_id; - u16 device_id; - u8 class_code[3]; - u8 func_num; - u8 dev_num; - u8 bus_num; - u8 seg_num; - u8 reserved[5]; - } comp_info; - u32 num_mem_regs; - u32 num_io_regs; - u64 reg_data_pairs[1]; - /* - * array of address/data register pairs is num_mem_regs + num_io_regs elements - * long. Each array element consists of a u64 address followed by a u64 data - * value. The oem_data array immediately follows the reg_data_pairs array - */ - u8 oem_data[1]; /* Variable length data */ -} sal_log_pci_comp_err_info_t; - -typedef struct sal_log_plat_specific_err_info { - sal_log_section_hdr_t header; - struct { - u64 err_status : 1, - guid : 1, - oem_data : 1, - reserved : 61; - } valid; - u64 err_status; - efi_guid_t guid; - u8 oem_data[1]; /* platform specific variable length data */ -} sal_log_plat_specific_err_info_t; - -typedef struct sal_log_host_ctlr_err_info { - sal_log_section_hdr_t header; - struct { - u64 err_status : 1, - requestor_id : 1, - responder_id : 1, - target_id : 1, - bus_spec_data : 1, - oem_data : 1, - reserved : 58; - } valid; - u64 err_status; - u64 requestor_id; - u64 responder_id; - u64 target_id; - u64 bus_spec_data; - u8 oem_data[1]; /* Variable length OEM data */ -} sal_log_host_ctlr_err_info_t; - -typedef struct sal_log_plat_bus_err_info { - sal_log_section_hdr_t header; - struct { - u64 err_status : 1, - requestor_id : 1, - responder_id : 1, - target_id : 1, - bus_spec_data : 1, - oem_data : 1, - reserved : 58; - } valid; - u64 err_status; - u64 requestor_id; - u64 responder_id; - u64 target_id; - u64 bus_spec_data; - u8 oem_data[1]; /* Variable length OEM data */ -} sal_log_plat_bus_err_info_t; - -/* Overall platform error section structure */ -typedef union sal_log_platform_err_info { - sal_log_mem_dev_err_info_t mem_dev_err; - sal_log_sel_dev_err_info_t sel_dev_err; - sal_log_pci_bus_err_info_t pci_bus_err; - sal_log_smbios_dev_err_info_t smbios_dev_err; - sal_log_pci_comp_err_info_t pci_comp_err; - sal_log_plat_specific_err_info_t plat_specific_err; - sal_log_host_ctlr_err_info_t host_ctlr_err; - sal_log_plat_bus_err_info_t plat_bus_err; -} sal_log_platform_err_info_t; - -/* SAL log over-all, multi-section error record structure (processor+platform) */ -typedef struct err_rec { - sal_log_record_header_t sal_elog_header; - sal_log_processor_info_t proc_err; - sal_log_platform_err_info_t plat_err; - u8 oem_data_pad[1024]; -} ia64_err_rec_t; - -/* - * Now define a couple of inline functions for improved type checking - * and convenience. - */ - -extern s64 ia64_sal_cache_flush (u64 cache_type); -extern void __init check_sal_cache_flush (void); - -/* Initialize all the processor and platform level instruction and data caches */ -static inline s64 -ia64_sal_cache_init (void) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0); - return isrv.status; -} - -/* - * Clear the processor and platform information logged by SAL with respect to the machine - * state at the time of MCA's, INITs, CMCs, or CPEs. - */ -static inline s64 -ia64_sal_clear_state_info (u64 sal_info_type) -{ - struct ia64_sal_retval isrv; - SAL_CALL_REENTRANT(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0, - 0, 0, 0, 0, 0); - return isrv.status; -} - - -/* Get the processor and platform information logged by SAL with respect to the machine - * state at the time of the MCAs, INITs, CMCs, or CPEs. - */ -static inline u64 -ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info) -{ - struct ia64_sal_retval isrv; - SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO, sal_info_type, 0, - sal_info, 0, 0, 0, 0); - if (isrv.status) - return 0; - - return isrv.v0; -} - -/* - * Get the maximum size of the information logged by SAL with respect to the machine state - * at the time of MCAs, INITs, CMCs, or CPEs. - */ -static inline u64 -ia64_sal_get_state_info_size (u64 sal_info_type) -{ - struct ia64_sal_retval isrv; - SAL_CALL_REENTRANT(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0, - 0, 0, 0, 0, 0); - if (isrv.status) - return 0; - return isrv.v0; -} - -/* - * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from - * the monarch processor. Must not lock, because it will not return on any cpu until the - * monarch processor sends a wake up. - */ -static inline s64 -ia64_sal_mc_rendez (void) -{ - struct ia64_sal_retval isrv; - SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0); - return isrv.status; -} - -/* - * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during - * the machine check rendezvous sequence as well as the mechanism to wake up the - * non-monarch processor at the end of machine check processing. - * Returns the complete ia64_sal_retval because some calls return more than just a status - * value. - */ -static inline struct ia64_sal_retval -ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val, - timeout, rz_always, 0, 0); - return isrv; -} - -/* Read from PCI configuration space */ -static inline s64 -ia64_sal_pci_config_read (u64 pci_config_addr, int type, u64 size, u64 *value) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, type, 0, 0, 0, 0); - if (value) - *value = isrv.v0; - return isrv.status; -} - -/* Write to PCI configuration space */ -static inline s64 -ia64_sal_pci_config_write (u64 pci_config_addr, int type, u64 size, u64 value) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value, - type, 0, 0, 0); - return isrv.status; -} - -/* - * Register physical addresses of locations needed by SAL when SAL procedures are invoked - * in virtual mode. - */ -static inline s64 -ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr, - 0, 0, 0, 0, 0); - return isrv.status; -} - -/* - * Register software dependent code locations within SAL. These locations are handlers or - * entry points where SAL will pass control for the specified event. These event handlers - * are for the bott rendezvous, MCAs and INIT scenarios. - */ -static inline s64 -ia64_sal_set_vectors (u64 vector_type, - u64 handler_addr1, u64 gp1, u64 handler_len1, - u64 handler_addr2, u64 gp2, u64 handler_len2) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_SET_VECTORS, vector_type, - handler_addr1, gp1, handler_len1, - handler_addr2, gp2, handler_len2); - - return isrv.status; -} - -/* Update the contents of PAL block in the non-volatile storage device */ -static inline s64 -ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size, - u64 *error_code, u64 *scratch_buf_size_needed) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size, - 0, 0, 0, 0); - if (error_code) - *error_code = isrv.v0; - if (scratch_buf_size_needed) - *scratch_buf_size_needed = isrv.v1; - return isrv.status; -} - -/* Get physical processor die mapping in the platform. */ -static inline s64 -ia64_sal_physical_id_info(u16 *splid) -{ - struct ia64_sal_retval isrv; - - if (sal_revision < SAL_VERSION_CODE(3,2)) - return -1; - - SAL_CALL(isrv, SAL_PHYSICAL_ID_INFO, 0, 0, 0, 0, 0, 0, 0); - if (splid) - *splid = isrv.v0; - return isrv.status; -} - -extern unsigned long sal_platform_features; - -extern int (*salinfo_platform_oemdata)(const u8 *, u8 **, u64 *); - -struct sal_ret_values { - long r8; long r9; long r10; long r11; -}; - -#define IA64_SAL_OEMFUNC_MIN 0x02000000 -#define IA64_SAL_OEMFUNC_MAX 0x03ffffff - -extern int ia64_sal_oemcall(struct ia64_sal_retval *, u64, u64, u64, u64, u64, - u64, u64, u64); -extern int ia64_sal_oemcall_nolock(struct ia64_sal_retval *, u64, u64, u64, - u64, u64, u64, u64, u64); -extern int ia64_sal_oemcall_reentrant(struct ia64_sal_retval *, u64, u64, u64, - u64, u64, u64, u64, u64); -extern long -ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, - unsigned long *drift_info); -#ifdef CONFIG_HOTPLUG_CPU -/* - * System Abstraction Layer Specification - * Section 3.2.5.1: OS_BOOT_RENDEZ to SAL return State. - * Note: region regs are stored first in head.S _start. Hence they must - * stay up front. - */ -struct sal_to_os_boot { - u64 rr[8]; /* Region Registers */ - u64 br[6]; /* br0: - * return addr into SAL boot rendez routine */ - u64 gr1; /* SAL:GP */ - u64 gr12; /* SAL:SP */ - u64 gr13; /* SAL: Task Pointer */ - u64 fpsr; - u64 pfs; - u64 rnat; - u64 unat; - u64 bspstore; - u64 dcr; /* Default Control Register */ - u64 iva; - u64 pta; - u64 itv; - u64 pmv; - u64 cmcv; - u64 lrr[2]; - u64 gr[4]; - u64 pr; /* Predicate registers */ - u64 lc; /* Loop Count */ - struct ia64_fpreg fp[20]; -}; - -/* - * Global array allocated for NR_CPUS at boot time - */ -extern struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS]; - -extern void ia64_jump_to_sal(struct sal_to_os_boot *); -#endif - -extern void ia64_sal_handler_init(void *entry_point, void *gpval); - -#define PALO_MAX_TLB_PURGES 0xFFFF -#define PALO_SIG "PALO" - -struct palo_table { - u8 signature[4]; /* Should be "PALO" */ - u32 length; - u8 minor_revision; - u8 major_revision; - u8 checksum; - u8 reserved1[5]; - u16 max_tlb_purges; - u8 reserved2[6]; -}; - -#define NPTCG_FROM_PAL 0 -#define NPTCG_FROM_PALO 1 -#define NPTCG_FROM_KERNEL_PARAMETER 2 - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_IA64_SAL_H */ diff --git a/include/asm-ia64/scatterlist.h b/include/asm-ia64/scatterlist.h deleted file mode 100644 index d6f5787..0000000 --- a/include/asm-ia64/scatterlist.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _ASM_IA64_SCATTERLIST_H -#define _ASM_IA64_SCATTERLIST_H - -/* - * Modified 1998-1999, 2001-2002, 2004 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - unsigned int length; /* buffer length */ - - dma_addr_t dma_address; - unsigned int dma_length; -}; - -/* - * It used to be that ISA_DMA_THRESHOLD had something to do with the - * DMA-limits of ISA-devices. Nowadays, its only remaining use (apart - * from the aha1542.c driver, which isn't 64-bit clean anyhow) is to - * tell the block-layer (via BLK_BOUNCE_ISA) what the max. physical - * address of a page is that is allocated with GFP_DMA. On IA-64, - * that's 4GB - 1. - */ -#define ISA_DMA_THRESHOLD 0xffffffff - -#define sg_dma_len(sg) ((sg)->dma_length) -#define sg_dma_address(sg) ((sg)->dma_address) - -#define ARCH_HAS_SG_CHAIN - -#endif /* _ASM_IA64_SCATTERLIST_H */ diff --git a/include/asm-ia64/sections.h b/include/asm-ia64/sections.h deleted file mode 100644 index 7286e4a..0000000 --- a/include/asm-ia64/sections.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_IA64_SECTIONS_H -#define _ASM_IA64_SECTIONS_H - -/* - * Copyright (C) 1998-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include - -extern char __per_cpu_start[], __per_cpu_end[], __phys_per_cpu_start[]; -extern char __start___vtop_patchlist[], __end___vtop_patchlist[]; -extern char __start___rse_patchlist[], __end___rse_patchlist[]; -extern char __start___mckinley_e9_bundles[], __end___mckinley_e9_bundles[]; -extern char __start___phys_stack_reg_patchlist[], __end___phys_stack_reg_patchlist[]; -extern char __start_gate_section[]; -extern char __start_gate_mckinley_e9_patchlist[], __end_gate_mckinley_e9_patchlist[]; -extern char __start_gate_vtop_patchlist[], __end_gate_vtop_patchlist[]; -extern char __start_gate_fsyscall_patchlist[], __end_gate_fsyscall_patchlist[]; -extern char __start_gate_brl_fsys_bubble_down_patchlist[], __end_gate_brl_fsys_bubble_down_patchlist[]; -extern char __start_unwind[], __end_unwind[]; -extern char __start_ivt_text[], __end_ivt_text[]; - -#endif /* _ASM_IA64_SECTIONS_H */ - diff --git a/include/asm-ia64/segment.h b/include/asm-ia64/segment.h deleted file mode 100644 index b89e2b3..0000000 --- a/include/asm-ia64/segment.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_IA64_SEGMENT_H -#define _ASM_IA64_SEGMENT_H - -/* Only here because we have some old header files that expect it.. */ - -#endif /* _ASM_IA64_SEGMENT_H */ diff --git a/include/asm-ia64/sembuf.h b/include/asm-ia64/sembuf.h deleted file mode 100644 index 1340fbc..0000000 --- a/include/asm-ia64/sembuf.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASM_IA64_SEMBUF_H -#define _ASM_IA64_SEMBUF_H - -/* - * The semid64_ds structure for IA-64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 2 miscellaneous 64-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ - __kernel_time_t sem_ctime; /* last change time */ - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* _ASM_IA64_SEMBUF_H */ diff --git a/include/asm-ia64/serial.h b/include/asm-ia64/serial.h deleted file mode 100644 index 0c7a2f3..0000000 --- a/include/asm-ia64/serial.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-ia64/serial.h - * - * Derived from the i386 version. - */ - -/* - * This assumes you have a 1.8432 MHz clock for your UART. - * - * It'd be nice if someone built a serial card with a 24.576 MHz - * clock, since the 16550A is capable of handling a top speed of 1.5 - * megabits/second; but this requires the faster clock. - */ -#define BASE_BAUD ( 1843200 / 16 ) - -/* - * All legacy serial ports should be enumerated via ACPI namespace, so - * we need not list them here. - */ diff --git a/include/asm-ia64/setup.h b/include/asm-ia64/setup.h deleted file mode 100644 index 4399a44..0000000 --- a/include/asm-ia64/setup.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __IA64_SETUP_H -#define __IA64_SETUP_H - -#define COMMAND_LINE_SIZE 2048 - -#endif diff --git a/include/asm-ia64/shmbuf.h b/include/asm-ia64/shmbuf.h deleted file mode 100644 index 585002a..0000000 --- a/include/asm-ia64/shmbuf.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _ASM_IA64_SHMBUF_H -#define _ASM_IA64_SHMBUF_H - -/* - * The shmid64_ds structure for IA-64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 2 miscellaneous 64-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ - __kernel_time_t shm_dtime; /* last detach time */ - __kernel_time_t shm_ctime; /* last change time */ - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused1; - unsigned long __unused2; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _ASM_IA64_SHMBUF_H */ diff --git a/include/asm-ia64/shmparam.h b/include/asm-ia64/shmparam.h deleted file mode 100644 index d07508d..0000000 --- a/include/asm-ia64/shmparam.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_IA64_SHMPARAM_H -#define _ASM_IA64_SHMPARAM_H - -/* - * SHMLBA controls minimum alignment at which shared memory segments - * get attached. The IA-64 architecture says that there may be a - * performance degradation when there are virtual aliases within 1MB. - * To reduce the chance of this, we set SHMLBA to 1MB. --davidm 00/12/20 - */ -#define SHMLBA (1024*1024) - -#endif /* _ASM_IA64_SHMPARAM_H */ diff --git a/include/asm-ia64/sigcontext.h b/include/asm-ia64/sigcontext.h deleted file mode 100644 index 57ff777..0000000 --- a/include/asm-ia64/sigcontext.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef _ASM_IA64_SIGCONTEXT_H -#define _ASM_IA64_SIGCONTEXT_H - -/* - * Copyright (C) 1998, 1999, 2001 Hewlett-Packard Co - * Copyright (C) 1998, 1999, 2001 David Mosberger-Tang - */ - -#include - -#define IA64_SC_FLAG_ONSTACK_BIT 0 /* is handler running on signal stack? */ -#define IA64_SC_FLAG_IN_SYSCALL_BIT 1 /* did signal interrupt a syscall? */ -#define IA64_SC_FLAG_FPH_VALID_BIT 2 /* is state in f[32]-f[127] valid? */ - -#define IA64_SC_FLAG_ONSTACK (1 << IA64_SC_FLAG_ONSTACK_BIT) -#define IA64_SC_FLAG_IN_SYSCALL (1 << IA64_SC_FLAG_IN_SYSCALL_BIT) -#define IA64_SC_FLAG_FPH_VALID (1 << IA64_SC_FLAG_FPH_VALID_BIT) - -# ifndef __ASSEMBLY__ - -/* - * Note on handling of register backing store: sc_ar_bsp contains the address that would - * be found in ar.bsp after executing a "cover" instruction the context in which the - * signal was raised. If signal delivery required switching to an alternate signal stack - * (sc_rbs_base is not NULL), the "dirty" partition (as it would exist after executing the - * imaginary "cover" instruction) is backed by the *alternate* signal stack, not the - * original one. In this case, sc_rbs_base contains the base address of the new register - * backing store. The number of registers in the dirty partition can be calculated as: - * - * ndirty = ia64_rse_num_regs(sc_rbs_base, sc_rbs_base + (sc_loadrs >> 16)) - * - */ - -struct sigcontext { - unsigned long sc_flags; /* see manifest constants above */ - unsigned long sc_nat; /* bit i == 1 iff scratch reg gr[i] is a NaT */ - stack_t sc_stack; /* previously active stack */ - - unsigned long sc_ip; /* instruction pointer */ - unsigned long sc_cfm; /* current frame marker */ - unsigned long sc_um; /* user mask bits */ - unsigned long sc_ar_rsc; /* register stack configuration register */ - unsigned long sc_ar_bsp; /* backing store pointer */ - unsigned long sc_ar_rnat; /* RSE NaT collection register */ - unsigned long sc_ar_ccv; /* compare and exchange compare value register */ - unsigned long sc_ar_unat; /* ar.unat of interrupted context */ - unsigned long sc_ar_fpsr; /* floating-point status register */ - unsigned long sc_ar_pfs; /* previous function state */ - unsigned long sc_ar_lc; /* loop count register */ - unsigned long sc_pr; /* predicate registers */ - unsigned long sc_br[8]; /* branch registers */ - /* Note: sc_gr[0] is used as the "uc_link" member of ucontext_t */ - unsigned long sc_gr[32]; /* general registers (static partition) */ - struct ia64_fpreg sc_fr[128]; /* floating-point registers */ - - unsigned long sc_rbs_base; /* NULL or new base of sighandler's rbs */ - unsigned long sc_loadrs; /* see description above */ - - unsigned long sc_ar25; /* cmp8xchg16 uses this */ - unsigned long sc_ar26; /* rsvd for scratch use */ - unsigned long sc_rsvd[12]; /* reserved for future use */ - /* - * The mask must come last so we can increase _NSIG_WORDS - * without breaking binary compatibility. - */ - sigset_t sc_mask; /* signal mask to restore after handler returns */ -}; - -# endif /* __ASSEMBLY__ */ -#endif /* _ASM_IA64_SIGCONTEXT_H */ diff --git a/include/asm-ia64/siginfo.h b/include/asm-ia64/siginfo.h deleted file mode 100644 index 9294e4b..0000000 --- a/include/asm-ia64/siginfo.h +++ /dev/null @@ -1,139 +0,0 @@ -#ifndef _ASM_IA64_SIGINFO_H -#define _ASM_IA64_SIGINFO_H - -/* - * Based on . - * - * Modified 1998-2002 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) - -#define HAVE_ARCH_SIGINFO_T -#define HAVE_ARCH_COPY_SIGINFO -#define HAVE_ARCH_COPY_SIGINFO_TO_USER - -#include - -typedef struct siginfo { - int si_signo; - int si_errno; - int si_code; - int __pad0; - - union { - int _pad[SI_PAD_SIZE]; - - /* kill() */ - struct { - pid_t _pid; /* sender's pid */ - uid_t _uid; /* sender's uid */ - } _kill; - - /* POSIX.1b timers */ - struct { - timer_t _tid; /* timer id */ - int _overrun; /* overrun count */ - char _pad[sizeof(__ARCH_SI_UID_T) - sizeof(int)]; - sigval_t _sigval; /* must overlay ._rt._sigval! */ - int _sys_private; /* not to be passed to user */ - } _timer; - - /* POSIX.1b signals */ - struct { - pid_t _pid; /* sender's pid */ - uid_t _uid; /* sender's uid */ - sigval_t _sigval; - } _rt; - - /* SIGCHLD */ - struct { - pid_t _pid; /* which child */ - uid_t _uid; /* sender's uid */ - int _status; /* exit code */ - clock_t _utime; - clock_t _stime; - } _sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ - struct { - void __user *_addr; /* faulting insn/memory ref. */ - int _imm; /* immediate value for "break" */ - unsigned int _flags; /* see below */ - unsigned long _isr; /* isr */ - } _sigfault; - - /* SIGPOLL */ - struct { - long _band; /* POLL_IN, POLL_OUT, POLL_MSG (XPG requires a "long") */ - int _fd; - } _sigpoll; - } _sifields; -} siginfo_t; - -#define si_imm _sifields._sigfault._imm /* as per UNIX SysV ABI spec */ -#define si_flags _sifields._sigfault._flags -/* - * si_isr is valid for SIGILL, SIGFPE, SIGSEGV, SIGBUS, and SIGTRAP provided that - * si_code is non-zero and __ISR_VALID is set in si_flags. - */ -#define si_isr _sifields._sigfault._isr - -/* - * Flag values for si_flags: - */ -#define __ISR_VALID_BIT 0 -#define __ISR_VALID (1 << __ISR_VALID_BIT) - -/* - * SIGILL si_codes - */ -#define ILL_BADIADDR (__SI_FAULT|9) /* unimplemented instruction address */ -#define __ILL_BREAK (__SI_FAULT|10) /* illegal break */ -#define __ILL_BNDMOD (__SI_FAULT|11) /* bundle-update (modification) in progress */ -#undef NSIGILL -#define NSIGILL 11 - -/* - * SIGFPE si_codes - */ -#define __FPE_DECOVF (__SI_FAULT|9) /* decimal overflow */ -#define __FPE_DECDIV (__SI_FAULT|10) /* decimal division by zero */ -#define __FPE_DECERR (__SI_FAULT|11) /* packed decimal error */ -#define __FPE_INVASC (__SI_FAULT|12) /* invalid ASCII digit */ -#define __FPE_INVDEC (__SI_FAULT|13) /* invalid decimal digit */ -#undef NSIGFPE -#define NSIGFPE 13 - -/* - * SIGSEGV si_codes - */ -#define __SEGV_PSTKOVF (__SI_FAULT|3) /* paragraph stack overflow */ -#undef NSIGSEGV -#define NSIGSEGV 3 - -/* - * SIGTRAP si_codes - */ -#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */ -#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */ -#undef NSIGTRAP -#define NSIGTRAP 4 - -#ifdef __KERNEL__ -#include - -static inline void -copy_siginfo (siginfo_t *to, siginfo_t *from) -{ - if (from->si_code < 0) - memcpy(to, from, sizeof(siginfo_t)); - else - /* _sigchld is currently the largest know union member */ - memcpy(to, from, 4*sizeof(int) + sizeof(from->_sifields._sigchld)); -} - -#endif /* __KERNEL__ */ - -#endif /* _ASM_IA64_SIGINFO_H */ diff --git a/include/asm-ia64/signal.h b/include/asm-ia64/signal.h deleted file mode 100644 index 4f5ca56..0000000 --- a/include/asm-ia64/signal.h +++ /dev/null @@ -1,160 +0,0 @@ -#ifndef _ASM_IA64_SIGNAL_H -#define _ASM_IA64_SIGNAL_H - -/* - * Modified 1998-2001, 2003 - * David Mosberger-Tang , Hewlett-Packard Co - * - * Unfortunately, this file is being included by bits/signal.h in - * glibc-2.x. Hence the #ifdef __KERNEL__ ugliness. - */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -/* signal 31 is no longer "unused", but the SIGUNUSED macro remains for backwards compatibility */ -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000 - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -/* - * The minimum stack size needs to be fairly large because we want to - * be sure that an app compiled for today's CPUs will continue to run - * on all future CPU models. The CPU model matters because the signal - * frame needs to have space for the complete machine state, including - * all physical stacked registers. The number of physical stacked - * registers is CPU model dependent, but given that the width of - * ar.rsc.loadrs is 14 bits, we can assume that they'll never take up - * more than 16KB of space. - */ -#if 1 - /* - * This is a stupid typo: the value was _meant_ to be 131072 (0x20000), but I typed it - * in wrong. ;-( To preserve backwards compatibility, we leave the kernel at the - * incorrect value and fix libc only. - */ -# define MINSIGSTKSZ 131027 /* min. stack size for sigaltstack() */ -#else -# define MINSIGSTKSZ 131072 /* min. stack size for sigaltstack() */ -#endif -#define SIGSTKSZ 262144 /* default stack size for sigaltstack() */ - -#ifdef __KERNEL__ - -#define _NSIG 64 -#define _NSIG_BPW 64 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -#endif /* __KERNEL__ */ - -#include - -# ifndef __ASSEMBLY__ - -# include - -/* Avoid too many header ordering problems. */ -struct siginfo; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -typedef unsigned long old_sigset_t; - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; - -# include - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* __KERNEL__ */ - -# endif /* !__ASSEMBLY__ */ -#endif /* _ASM_IA64_SIGNAL_H */ diff --git a/include/asm-ia64/smp.h b/include/asm-ia64/smp.h deleted file mode 100644 index 12d96e0..0000000 --- a/include/asm-ia64/smp.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * SMP Support - * - * Copyright (C) 1999 VA Linux Systems - * Copyright (C) 1999 Walt Drummond - * (c) Copyright 2001-2003, 2005 Hewlett-Packard Development Company, L.P. - * David Mosberger-Tang - * Bjorn Helgaas - */ -#ifndef _ASM_IA64_SMP_H -#define _ASM_IA64_SMP_H - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static inline unsigned int -ia64_get_lid (void) -{ - union { - struct { - unsigned long reserved : 16; - unsigned long eid : 8; - unsigned long id : 8; - unsigned long ignored : 32; - } f; - unsigned long bits; - } lid; - - lid.bits = ia64_getreg(_IA64_REG_CR_LID); - return lid.f.id << 8 | lid.f.eid; -} - -#define hard_smp_processor_id() ia64_get_lid() - -#ifdef CONFIG_SMP - -#define XTP_OFFSET 0x1e0008 - -#define SMP_IRQ_REDIRECTION (1 << 0) -#define SMP_IPI_REDIRECTION (1 << 1) - -#define raw_smp_processor_id() (current_thread_info()->cpu) - -extern struct smp_boot_data { - int cpu_count; - int cpu_phys_id[NR_CPUS]; -} smp_boot_data __initdata; - -extern char no_int_routing __devinitdata; - -extern cpumask_t cpu_online_map; -extern cpumask_t cpu_core_map[NR_CPUS]; -DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); -extern int smp_num_siblings; -extern void __iomem *ipi_base_addr; -extern unsigned char smp_int_redirect; - -extern volatile int ia64_cpu_to_sapicid[]; -#define cpu_physical_id(i) ia64_cpu_to_sapicid[i] - -extern unsigned long ap_wakeup_vector; - -/* - * Function to map hard smp processor id to logical id. Slow, so don't use this in - * performance-critical code. - */ -static inline int -cpu_logical_id (int cpuid) -{ - int i; - - for (i = 0; i < NR_CPUS; ++i) - if (cpu_physical_id(i) == cpuid) - break; - return i; -} - -/* - * XTP control functions: - * min_xtp : route all interrupts to this CPU - * normal_xtp: nominal XTP value - * max_xtp : never deliver interrupts to this CPU. - */ - -static inline void -min_xtp (void) -{ - if (smp_int_redirect & SMP_IRQ_REDIRECTION) - writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */ -} - -static inline void -normal_xtp (void) -{ - if (smp_int_redirect & SMP_IRQ_REDIRECTION) - writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */ -} - -static inline void -max_xtp (void) -{ - if (smp_int_redirect & SMP_IRQ_REDIRECTION) - writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */ -} - -/* Upping and downing of CPUs */ -extern int __cpu_disable (void); -extern void __cpu_die (unsigned int cpu); -extern void cpu_die (void) __attribute__ ((noreturn)); -extern void __init smp_build_cpu_map(void); - -extern void __init init_smp_config (void); -extern void smp_do_timer (struct pt_regs *regs); - -extern irqreturn_t handle_IPI(int irq, void *dev_id); -extern void smp_send_reschedule (int cpu); -extern void identify_siblings (struct cpuinfo_ia64 *); -extern int is_multithreading_enabled(void); - -extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); - -#else /* CONFIG_SMP */ - -#define cpu_logical_id(i) 0 -#define cpu_physical_id(i) ia64_get_lid() - -#endif /* CONFIG_SMP */ -#endif /* _ASM_IA64_SMP_H */ diff --git a/include/asm-ia64/sn/acpi.h b/include/asm-ia64/sn/acpi.h deleted file mode 100644 index 9ce2801..0000000 --- a/include/asm-ia64/sn/acpi.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_ACPI_H -#define _ASM_IA64_SN_ACPI_H - -#include "acpi/acglobal.h" - -extern int sn_acpi_rev; -#define SN_ACPI_BASE_SUPPORT() (sn_acpi_rev >= 0x20101) - -#endif /* _ASM_IA64_SN_ACPI_H */ diff --git a/include/asm-ia64/sn/addrs.h b/include/asm-ia64/sn/addrs.h deleted file mode 100644 index e715c79..0000000 --- a/include/asm-ia64/sn/addrs.h +++ /dev/null @@ -1,299 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 1992-1999,2001-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_ADDRS_H -#define _ASM_IA64_SN_ADDRS_H - -#include -#include -#include -#include - -/* - * Memory/SHUB Address Format: - * +-+---------+--+--------------+ - * |0| NASID |AS| NodeOffset | - * +-+---------+--+--------------+ - * - * NASID: (low NASID bit is 0) Memory and SHUB MMRs - * AS: 2-bit Address Space Identifier. Used only if low NASID bit is 0 - * 00: Local Resources and MMR space - * Top bit of NodeOffset - * 0: Local resources space - * node id: - * 0: IA64/NT compatibility space - * 2: Local MMR Space - * 4: Local memory, regardless of local node id - * 1: Global MMR space - * 01: GET space. - * 10: AMO space. - * 11: Cacheable memory space. - * - * NodeOffset: byte offset - * - * - * TIO address format: - * +-+----------+--+--------------+ - * |0| NASID |AS| Nodeoffset | - * +-+----------+--+--------------+ - * - * NASID: (low NASID bit is 1) TIO - * AS: 2-bit Chiplet Identifier - * 00: TIO LB (Indicates TIO MMR access.) - * 01: TIO ICE (indicates coretalk space access.) - * - * NodeOffset: top bit must be set. - * - * - * Note that in both of the above address formats, the low - * NASID bit indicates if the reference is to the SHUB or TIO MMRs. - */ - - -/* - * Define basic shift & mask constants for manipulating NASIDs and AS values. - */ -#define NASID_BITMASK (sn_hub_info->nasid_bitmask) -#define NASID_SHIFT (sn_hub_info->nasid_shift) -#define AS_SHIFT (sn_hub_info->as_shift) -#define AS_BITMASK 0x3UL - -#define NASID_MASK ((u64)NASID_BITMASK << NASID_SHIFT) -#define AS_MASK ((u64)AS_BITMASK << AS_SHIFT) - - -/* - * AS values. These are the same on both SHUB1 & SHUB2. - */ -#define AS_GET_VAL 1UL -#define AS_AMO_VAL 2UL -#define AS_CAC_VAL 3UL -#define AS_GET_SPACE (AS_GET_VAL << AS_SHIFT) -#define AS_AMO_SPACE (AS_AMO_VAL << AS_SHIFT) -#define AS_CAC_SPACE (AS_CAC_VAL << AS_SHIFT) - - -/* - * Virtual Mode Local & Global MMR space. - */ -#define SH1_LOCAL_MMR_OFFSET 0x8000000000UL -#define SH2_LOCAL_MMR_OFFSET 0x0200000000UL -#define LOCAL_MMR_OFFSET (is_shub2() ? SH2_LOCAL_MMR_OFFSET : SH1_LOCAL_MMR_OFFSET) -#define LOCAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | LOCAL_MMR_OFFSET) -#define LOCAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | LOCAL_MMR_OFFSET) - -#define SH1_GLOBAL_MMR_OFFSET 0x0800000000UL -#define SH2_GLOBAL_MMR_OFFSET 0x0300000000UL -#define GLOBAL_MMR_OFFSET (is_shub2() ? SH2_GLOBAL_MMR_OFFSET : SH1_GLOBAL_MMR_OFFSET) -#define GLOBAL_MMR_SPACE (__IA64_UNCACHED_OFFSET | GLOBAL_MMR_OFFSET) - -/* - * Physical mode addresses - */ -#define GLOBAL_PHYS_MMR_SPACE (RGN_BASE(RGN_HPAGE) | GLOBAL_MMR_OFFSET) - - -/* - * Clear region & AS bits. - */ -#define TO_PHYS_MASK (~(RGN_BITS | AS_MASK)) - - -/* - * Misc NASID manipulation. - */ -#define NASID_SPACE(n) ((u64)(n) << NASID_SHIFT) -#define REMOTE_ADDR(n,a) (NASID_SPACE(n) | (a)) -#define NODE_OFFSET(x) ((x) & (NODE_ADDRSPACE_SIZE - 1)) -#define NODE_ADDRSPACE_SIZE (1UL << AS_SHIFT) -#define NASID_GET(x) (int) (((u64) (x) >> NASID_SHIFT) & NASID_BITMASK) -#define LOCAL_MMR_ADDR(a) (LOCAL_MMR_SPACE | (a)) -#define GLOBAL_MMR_ADDR(n,a) (GLOBAL_MMR_SPACE | REMOTE_ADDR(n,a)) -#define GLOBAL_MMR_PHYS_ADDR(n,a) (GLOBAL_PHYS_MMR_SPACE | REMOTE_ADDR(n,a)) -#define GLOBAL_CAC_ADDR(n,a) (CAC_BASE | REMOTE_ADDR(n,a)) -#define CHANGE_NASID(n,x) ((void *)(((u64)(x) & ~NASID_MASK) | NASID_SPACE(n))) -#define IS_TIO_NASID(n) ((n) & 1) - - -/* non-II mmr's start at top of big window space (4G) */ -#define BWIN_TOP 0x0000000100000000UL - -/* - * general address defines - */ -#define CAC_BASE (PAGE_OFFSET | AS_CAC_SPACE) -#define AMO_BASE (__IA64_UNCACHED_OFFSET | AS_AMO_SPACE) -#define AMO_PHYS_BASE (RGN_BASE(RGN_HPAGE) | AS_AMO_SPACE) -#define GET_BASE (PAGE_OFFSET | AS_GET_SPACE) - -/* - * Convert Memory addresses between various addressing modes. - */ -#define TO_PHYS(x) (TO_PHYS_MASK & (x)) -#define TO_CAC(x) (CAC_BASE | TO_PHYS(x)) -#ifdef CONFIG_SGI_SN -#define TO_AMO(x) (AMO_BASE | TO_PHYS(x)) -#define TO_GET(x) (GET_BASE | TO_PHYS(x)) -#else -#define TO_AMO(x) ({ BUG(); x; }) -#define TO_GET(x) ({ BUG(); x; }) -#endif - -/* - * Covert from processor physical address to II/TIO physical address: - * II - squeeze out the AS bits - * TIO- requires a chiplet id in bits 38-39. For DMA to memory, - * the chiplet id is zero. If we implement TIO-TIO dma, we might need - * to insert a chiplet id into this macro. However, it is our belief - * right now that this chiplet id will be ICE, which is also zero. - */ -#define SH1_TIO_PHYS_TO_DMA(x) \ - ((((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x)) - -#define SH2_NETWORK_BANK_OFFSET(x) \ - ((u64)(x) & ((1UL << (sn_hub_info->nasid_shift - 4)) -1)) - -#define SH2_NETWORK_BANK_SELECT(x) \ - ((((u64)(x) & (0x3UL << (sn_hub_info->nasid_shift - 4))) \ - >> (sn_hub_info->nasid_shift - 4)) << 36) - -#define SH2_NETWORK_ADDRESS(x) \ - (SH2_NETWORK_BANK_OFFSET(x) | SH2_NETWORK_BANK_SELECT(x)) - -#define SH2_TIO_PHYS_TO_DMA(x) \ - (((u64)(NASID_GET(x)) << 40) | SH2_NETWORK_ADDRESS(x)) - -#define PHYS_TO_TIODMA(x) \ - (is_shub1() ? SH1_TIO_PHYS_TO_DMA(x) : SH2_TIO_PHYS_TO_DMA(x)) - -#define PHYS_TO_DMA(x) \ - ((((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x)) - - -/* - * Macros to test for address type. - */ -#define IS_AMO_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_BASE) -#define IS_AMO_PHYS_ADDRESS(x) (((u64)(x) & (RGN_BITS | AS_MASK)) == AMO_PHYS_BASE) - - -/* - * The following definitions pertain to the IO special address - * space. They define the location of the big and little windows - * of any given node. - */ -#define BWIN_SIZE_BITS 29 /* big window size: 512M */ -#define TIO_BWIN_SIZE_BITS 30 /* big window size: 1G */ -#define NODE_SWIN_BASE(n, w) ((w == 0) ? NODE_BWIN_BASE((n), SWIN0_BIGWIN) \ - : RAW_NODE_SWIN_BASE(n, w)) -#define TIO_SWIN_BASE(n, w) (TIO_IO_BASE(n) + \ - ((u64) (w) << TIO_SWIN_SIZE_BITS)) -#define NODE_IO_BASE(n) (GLOBAL_MMR_SPACE | NASID_SPACE(n)) -#define TIO_IO_BASE(n) (__IA64_UNCACHED_OFFSET | NASID_SPACE(n)) -#define BWIN_SIZE (1UL << BWIN_SIZE_BITS) -#define NODE_BWIN_BASE0(n) (NODE_IO_BASE(n) + BWIN_SIZE) -#define NODE_BWIN_BASE(n, w) (NODE_BWIN_BASE0(n) + ((u64) (w) << BWIN_SIZE_BITS)) -#define RAW_NODE_SWIN_BASE(n, w) (NODE_IO_BASE(n) + ((u64) (w) << SWIN_SIZE_BITS)) -#define BWIN_WIDGET_MASK 0x7 -#define BWIN_WINDOWNUM(x) (((x) >> BWIN_SIZE_BITS) & BWIN_WIDGET_MASK) -#define SH1_IS_BIG_WINDOW_ADDR(x) ((x) & BWIN_TOP) - -#define TIO_BWIN_WINDOW_SELECT_MASK 0x7 -#define TIO_BWIN_WINDOWNUM(x) (((x) >> TIO_BWIN_SIZE_BITS) & TIO_BWIN_WINDOW_SELECT_MASK) - -#define TIO_HWIN_SHIFT_BITS 33 -#define TIO_HWIN(x) (NODE_OFFSET(x) >> TIO_HWIN_SHIFT_BITS) - -/* - * The following definitions pertain to the IO special address - * space. They define the location of the big and little windows - * of any given node. - */ - -#define SWIN_SIZE_BITS 24 -#define SWIN_WIDGET_MASK 0xF - -#define TIO_SWIN_SIZE_BITS 28 -#define TIO_SWIN_SIZE (1UL << TIO_SWIN_SIZE_BITS) -#define TIO_SWIN_WIDGET_MASK 0x3 - -/* - * Convert smallwindow address to xtalk address. - * - * 'addr' can be physical or virtual address, but will be converted - * to Xtalk address in the range 0 -> SWINZ_SIZEMASK - */ -#define SWIN_WIDGETNUM(x) (((x) >> SWIN_SIZE_BITS) & SWIN_WIDGET_MASK) -#define TIO_SWIN_WIDGETNUM(x) (((x) >> TIO_SWIN_SIZE_BITS) & TIO_SWIN_WIDGET_MASK) - - -/* - * The following macros produce the correct base virtual address for - * the hub registers. The REMOTE_HUB_* macro produce - * the address for the specified hub's registers. The intent is - * that the appropriate PI, MD, NI, or II register would be substituted - * for x. - * - * WARNING: - * When certain Hub chip workaround are defined, it's not sufficient - * to dereference the *_HUB_ADDR() macros. You should instead use - * HUB_L() and HUB_S() if you must deal with pointers to hub registers. - * Otherwise, the recommended approach is to use *_HUB_L() and *_HUB_S(). - * They're always safe. - */ -/* Shub1 TIO & MMR addressing macros */ -#define SH1_TIO_IOSPACE_ADDR(n,x) \ - GLOBAL_MMR_ADDR(n,x) - -#define SH1_REMOTE_BWIN_MMR(n,x) \ - GLOBAL_MMR_ADDR(n,x) - -#define SH1_REMOTE_SWIN_MMR(n,x) \ - (NODE_SWIN_BASE(n,1) + 0x800000UL + (x)) - -#define SH1_REMOTE_MMR(n,x) \ - (SH1_IS_BIG_WINDOW_ADDR(x) ? SH1_REMOTE_BWIN_MMR(n,x) : \ - SH1_REMOTE_SWIN_MMR(n,x)) - -/* Shub1 TIO & MMR addressing macros */ -#define SH2_TIO_IOSPACE_ADDR(n,x) \ - ((__IA64_UNCACHED_OFFSET | REMOTE_ADDR(n,x) | 1UL << (NASID_SHIFT - 2))) - -#define SH2_REMOTE_MMR(n,x) \ - GLOBAL_MMR_ADDR(n,x) - - -/* TIO & MMR addressing macros that work on both shub1 & shub2 */ -#define TIO_IOSPACE_ADDR(n,x) \ - ((u64 *)(is_shub1() ? SH1_TIO_IOSPACE_ADDR(n,x) : \ - SH2_TIO_IOSPACE_ADDR(n,x))) - -#define SH_REMOTE_MMR(n,x) \ - (is_shub1() ? SH1_REMOTE_MMR(n,x) : SH2_REMOTE_MMR(n,x)) - -#define REMOTE_HUB_ADDR(n,x) \ - (IS_TIO_NASID(n) ? ((volatile u64*)TIO_IOSPACE_ADDR(n,x)) : \ - ((volatile u64*)SH_REMOTE_MMR(n,x))) - - -#define HUB_L(x) (*((volatile typeof(*x) *)x)) -#define HUB_S(x,d) (*((volatile typeof(*x) *)x) = (d)) - -#define REMOTE_HUB_L(n, a) HUB_L(REMOTE_HUB_ADDR((n), (a))) -#define REMOTE_HUB_S(n, a, d) HUB_S(REMOTE_HUB_ADDR((n), (a)), (d)) - -/* - * Coretalk address breakdown - */ -#define CTALK_NASID_SHFT 40 -#define CTALK_NASID_MASK (0x3FFFULL << CTALK_NASID_SHFT) -#define CTALK_CID_SHFT 38 -#define CTALK_CID_MASK (0x3ULL << CTALK_CID_SHFT) -#define CTALK_NODE_OFFSET 0x3FFFFFFFFF - -#endif /* _ASM_IA64_SN_ADDRS_H */ diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h deleted file mode 100644 index 7caa1f4..0000000 --- a/include/asm-ia64/sn/arch.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI specific setup. - * - * Copyright (C) 1995-1997,1999,2001-2005 Silicon Graphics, Inc. All rights reserved. - * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org) - */ -#ifndef _ASM_IA64_SN_ARCH_H -#define _ASM_IA64_SN_ARCH_H - -#include -#include -#include -#include -#include - -/* - * This is the maximum number of NUMALINK nodes that can be part of a single - * SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in - * remote partitions are NOT included in this number. - * The number of compact nodes cannot exceed size of a coherency domain. - * The purpose of this define is to specify a node count that includes - * all C/M/TIO nodes in an SSI system. - * - * SGI system can currently support up to 256 C/M nodes plus additional TIO nodes. - * - * Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade - * to ACPI3.0, this limit will be removed. The notion of "compact nodes" - * should be deleted and TIOs should be included in MAX_NUMNODES. - */ -#define MAX_TIO_NODES MAX_NUMNODES -#define MAX_COMPACT_NODES (MAX_NUMNODES + MAX_TIO_NODES) - -/* - * Maximum number of nodes in all partitions and in all coherency domains. - * This is the total number of nodes accessible in the numalink fabric. It - * includes all C & M bricks, plus all TIOs. - * - * This value is also the value of the maximum number of NASIDs in the numalink - * fabric. - */ -#define MAX_NUMALINK_NODES 16384 - -/* - * The following defines attributes of the HUB chip. These attributes are - * frequently referenced. They are kept in the per-cpu data areas of each cpu. - * They are kept together in a struct to minimize cache misses. - */ -struct sn_hub_info_s { - u8 shub2; - u8 nasid_shift; - u8 as_shift; - u8 shub_1_1_found; - u16 nasid_bitmask; -}; -DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info); -#define sn_hub_info (&__get_cpu_var(__sn_hub_info)) -#define is_shub2() (sn_hub_info->shub2) -#define is_shub1() (sn_hub_info->shub2 == 0) - -/* - * Use this macro to test if shub 1.1 wars should be enabled - */ -#define enable_shub_wars_1_1() (sn_hub_info->shub_1_1_found) - - -/* - * Compact node ID to nasid mappings kept in the per-cpu data areas of each - * cpu. - */ -DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_COMPACT_NODES]); -#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0])) - - -extern u8 sn_partition_id; -extern u8 sn_system_size; -extern u8 sn_sharing_domain_size; -extern u8 sn_region_size; - -extern void sn_flush_all_caches(long addr, long bytes); -extern bool sn_cpu_disable_allowed(int cpu); - -#endif /* _ASM_IA64_SN_ARCH_H */ diff --git a/include/asm-ia64/sn/bte.h b/include/asm-ia64/sn/bte.h deleted file mode 100644 index a0d214f..0000000 --- a/include/asm-ia64/sn/bte.h +++ /dev/null @@ -1,233 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. - */ - - -#ifndef _ASM_IA64_SN_BTE_H -#define _ASM_IA64_SN_BTE_H - -#include -#include -#include -#include -#include -#include - -#define IBCT_NOTIFY (0x1UL << 4) -#define IBCT_ZFIL_MODE (0x1UL << 0) - -/* #define BTE_DEBUG */ -/* #define BTE_DEBUG_VERBOSE */ - -#ifdef BTE_DEBUG -# define BTE_PRINTK(x) printk x /* Terse */ -# ifdef BTE_DEBUG_VERBOSE -# define BTE_PRINTKV(x) printk x /* Verbose */ -# else -# define BTE_PRINTKV(x) -# endif /* BTE_DEBUG_VERBOSE */ -#else -# define BTE_PRINTK(x) -# define BTE_PRINTKV(x) -#endif /* BTE_DEBUG */ - - -/* BTE status register only supports 16 bits for length field */ -#define BTE_LEN_BITS (16) -#define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1) -#define BTE_MAX_XFER ((1 << BTE_LEN_BITS) * L1_CACHE_BYTES) - - -/* Define hardware */ -#define BTES_PER_NODE (is_shub2() ? 4 : 2) -#define MAX_BTES_PER_NODE 4 - -#define BTE2OFF_CTRL 0 -#define BTE2OFF_SRC (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0) -#define BTE2OFF_DEST (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0) -#define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0) - -#define BTE_BASE_ADDR(interface) \ - (is_shub2() ? (interface == 0) ? SH2_BT_ENG_CSR_0 : \ - (interface == 1) ? SH2_BT_ENG_CSR_1 : \ - (interface == 2) ? SH2_BT_ENG_CSR_2 : \ - SH2_BT_ENG_CSR_3 \ - : (interface == 0) ? IIO_IBLS0 : IIO_IBLS1) - -#define BTE_SOURCE_ADDR(base) \ - (is_shub2() ? base + (BTE2OFF_SRC/8) \ - : base + (BTEOFF_SRC/8)) - -#define BTE_DEST_ADDR(base) \ - (is_shub2() ? base + (BTE2OFF_DEST/8) \ - : base + (BTEOFF_DEST/8)) - -#define BTE_CTRL_ADDR(base) \ - (is_shub2() ? base + (BTE2OFF_CTRL/8) \ - : base + (BTEOFF_CTRL/8)) - -#define BTE_NOTIF_ADDR(base) \ - (is_shub2() ? base + (BTE2OFF_NOTIFY/8) \ - : base + (BTEOFF_NOTIFY/8)) - -/* Define hardware modes */ -#define BTE_NOTIFY IBCT_NOTIFY -#define BTE_NORMAL BTE_NOTIFY -#define BTE_ZERO_FILL (BTE_NOTIFY | IBCT_ZFIL_MODE) -/* Use a reserved bit to let the caller specify a wait for any BTE */ -#define BTE_WACQUIRE 0x4000 -/* Use the BTE on the node with the destination memory */ -#define BTE_USE_DEST (BTE_WACQUIRE << 1) -/* Use any available BTE interface on any node for the transfer */ -#define BTE_USE_ANY (BTE_USE_DEST << 1) -/* macro to force the IBCT0 value valid */ -#define BTE_VALID_MODE(x) ((x) & (IBCT_NOTIFY | IBCT_ZFIL_MODE)) - -#define BTE_ACTIVE (IBLS_BUSY | IBLS_ERROR) -#define BTE_WORD_AVAILABLE (IBLS_BUSY << 1) -#define BTE_WORD_BUSY (~BTE_WORD_AVAILABLE) - -/* - * Some macros to simplify reading. - * Start with macros to locate the BTE control registers. - */ -#define BTE_LNSTAT_LOAD(_bte) \ - HUB_L(_bte->bte_base_addr) -#define BTE_LNSTAT_STORE(_bte, _x) \ - HUB_S(_bte->bte_base_addr, (_x)) -#define BTE_SRC_STORE(_bte, _x) \ -({ \ - u64 __addr = ((_x) & ~AS_MASK); \ - if (is_shub2()) \ - __addr = SH2_TIO_PHYS_TO_DMA(__addr); \ - HUB_S(_bte->bte_source_addr, __addr); \ -}) -#define BTE_DEST_STORE(_bte, _x) \ -({ \ - u64 __addr = ((_x) & ~AS_MASK); \ - if (is_shub2()) \ - __addr = SH2_TIO_PHYS_TO_DMA(__addr); \ - HUB_S(_bte->bte_destination_addr, __addr); \ -}) -#define BTE_CTRL_STORE(_bte, _x) \ - HUB_S(_bte->bte_control_addr, (_x)) -#define BTE_NOTIF_STORE(_bte, _x) \ -({ \ - u64 __addr = ia64_tpa((_x) & ~AS_MASK); \ - if (is_shub2()) \ - __addr = SH2_TIO_PHYS_TO_DMA(__addr); \ - HUB_S(_bte->bte_notify_addr, __addr); \ -}) - -#define BTE_START_TRANSFER(_bte, _len, _mode) \ - is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \ - : BTE_LNSTAT_STORE(_bte, _len); \ - BTE_CTRL_STORE(_bte, _mode) - -/* Possible results from bte_copy and bte_unaligned_copy */ -/* The following error codes map into the BTE hardware codes - * IIO_ICRB_ECODE_* (in shubio.h). The hardware uses - * an error code of 0 (IIO_ICRB_ECODE_DERR), but we want zero - * to mean BTE_SUCCESS, so add one (BTEFAIL_OFFSET) to the error - * codes to give the following error codes. - */ -#define BTEFAIL_OFFSET 1 - -typedef enum { - BTE_SUCCESS, /* 0 is success */ - BTEFAIL_DIR, /* Directory error due to IIO access*/ - BTEFAIL_POISON, /* poison error on IO access (write to poison page) */ - BTEFAIL_WERR, /* Write error (ie WINV to a Read only line) */ - BTEFAIL_ACCESS, /* access error (protection violation) */ - BTEFAIL_PWERR, /* Partial Write Error */ - BTEFAIL_PRERR, /* Partial Read Error */ - BTEFAIL_TOUT, /* CRB Time out */ - BTEFAIL_XTERR, /* Incoming xtalk pkt had error bit */ - BTEFAIL_NOTAVAIL, /* BTE not available */ -} bte_result_t; - -#define BTEFAIL_SH2_RESP_SHORT 0x1 /* bit 000001 */ -#define BTEFAIL_SH2_RESP_LONG 0x2 /* bit 000010 */ -#define BTEFAIL_SH2_RESP_DSP 0x4 /* bit 000100 */ -#define BTEFAIL_SH2_RESP_ACCESS 0x8 /* bit 001000 */ -#define BTEFAIL_SH2_CRB_TO 0x10 /* bit 010000 */ -#define BTEFAIL_SH2_NACK_LIMIT 0x20 /* bit 100000 */ -#define BTEFAIL_SH2_ALL 0x3F /* bit 111111 */ - -#define BTE_ERR_BITS 0x3FUL -#define BTE_ERR_SHIFT 36 -#define BTE_ERR_MASK (BTE_ERR_BITS << BTE_ERR_SHIFT) - -#define BTE_ERROR_RETRY(value) \ - (is_shub2() ? (value != BTEFAIL_SH2_CRB_TO) \ - : (value != BTEFAIL_TOUT)) - -/* - * On shub1 BTE_ERR_MASK will always be false, so no need for is_shub2() - */ -#define BTE_SHUB2_ERROR(_status) \ - ((_status & BTE_ERR_MASK) \ - ? (((_status >> BTE_ERR_SHIFT) & BTE_ERR_BITS) | IBLS_ERROR) \ - : _status) - -#define BTE_GET_ERROR_STATUS(_status) \ - (BTE_SHUB2_ERROR(_status) & ~IBLS_ERROR) - -#define BTE_VALID_SH2_ERROR(value) \ - ((value >= BTEFAIL_SH2_RESP_SHORT) && (value <= BTEFAIL_SH2_ALL)) - -/* - * Structure defining a bte. An instance of this - * structure is created in the nodepda for each - * bte on that node (as defined by BTES_PER_NODE) - * This structure contains everything necessary - * to work with a BTE. - */ -struct bteinfo_s { - volatile u64 notify ____cacheline_aligned; - u64 *bte_base_addr ____cacheline_aligned; - u64 *bte_source_addr; - u64 *bte_destination_addr; - u64 *bte_control_addr; - u64 *bte_notify_addr; - spinlock_t spinlock; - cnodeid_t bte_cnode; /* cnode */ - int bte_error_count; /* Number of errors encountered */ - int bte_num; /* 0 --> BTE0, 1 --> BTE1 */ - int cleanup_active; /* Interface is locked for cleanup */ - volatile bte_result_t bh_error; /* error while processing */ - volatile u64 *most_rcnt_na; - struct bteinfo_s *btes_to_try[MAX_BTES_PER_NODE]; -}; - - -/* - * Function prototypes (functions defined in bte.c, used elsewhere) - */ -extern bte_result_t bte_copy(u64, u64, u64, u64, void *); -extern bte_result_t bte_unaligned_copy(u64, u64, u64, u64); -extern void bte_error_handler(unsigned long); - -#define bte_zero(dest, len, mode, notification) \ - bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification) - -/* - * The following is the prefered way of calling bte_unaligned_copy - * If the copy is fully cache line aligned, then bte_copy is - * used instead. Since bte_copy is inlined, this saves a call - * stack. NOTE: bte_copy is called synchronously and does block - * until the transfer is complete. In order to get the asynch - * version of bte_copy, you must perform this check yourself. - */ -#define BTE_UNALIGNED_COPY(src, dest, len, mode) \ - (((len & L1_CACHE_MASK) || (src & L1_CACHE_MASK) || \ - (dest & L1_CACHE_MASK)) ? \ - bte_unaligned_copy(src, dest, len, mode) : \ - bte_copy(src, dest, len, mode, NULL)) - - -#endif /* _ASM_IA64_SN_BTE_H */ diff --git a/include/asm-ia64/sn/clksupport.h b/include/asm-ia64/sn/clksupport.h deleted file mode 100644 index d340c36..0000000 --- a/include/asm-ia64/sn/clksupport.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ - -/* - * This file contains definitions for accessing a platform supported high resolution - * clock. The clock is monitonically increasing and can be accessed from any node - * in the system. The clock is synchronized across nodes - all nodes see the - * same value. - * - * RTC_COUNTER_ADDR - contains the address of the counter - * - */ - -#ifndef _ASM_IA64_SN_CLKSUPPORT_H -#define _ASM_IA64_SN_CLKSUPPORT_H - -extern unsigned long sn_rtc_cycles_per_second; - -#define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC)) - -#define rtc_time() (*RTC_COUNTER_ADDR) - -#endif /* _ASM_IA64_SN_CLKSUPPORT_H */ diff --git a/include/asm-ia64/sn/geo.h b/include/asm-ia64/sn/geo.h deleted file mode 100644 index f083c94..0000000 --- a/include/asm-ia64/sn/geo.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_GEO_H -#define _ASM_IA64_SN_GEO_H - -/* The geoid_t implementation below is based loosely on the pcfg_t - implementation in sys/SN/promcfg.h. */ - -/* Type declaractions */ - -/* Size of a geoid_t structure (must be before decl. of geoid_u) */ -#define GEOID_SIZE 8 /* Would 16 be better? The size can - be different on different platforms. */ - -#define MAX_SLOTS 0xf /* slots per module */ -#define MAX_SLABS 0xf /* slabs per slot */ - -typedef unsigned char geo_type_t; - -/* Fields common to all substructures */ -typedef struct geo_common_s { - moduleid_t module; /* The module (box) this h/w lives in */ - geo_type_t type; /* What type of h/w is named by this geoid_t */ - slabid_t slab:4; /* slab (ASIC), 0 .. 15 within slot */ - slotid_t slot:4; /* slot (Blade), 0 .. 15 within module */ -} geo_common_t; - -/* Additional fields for particular types of hardware */ -typedef struct geo_node_s { - geo_common_t common; /* No additional fields needed */ -} geo_node_t; - -typedef struct geo_rtr_s { - geo_common_t common; /* No additional fields needed */ -} geo_rtr_t; - -typedef struct geo_iocntl_s { - geo_common_t common; /* No additional fields needed */ -} geo_iocntl_t; - -typedef struct geo_pcicard_s { - geo_iocntl_t common; - char bus; /* Bus/widget number */ - char slot; /* PCI slot number */ -} geo_pcicard_t; - -/* Subcomponents of a node */ -typedef struct geo_cpu_s { - geo_node_t node; - char slice; /* Which CPU on the node */ -} geo_cpu_t; - -typedef struct geo_mem_s { - geo_node_t node; - char membus; /* The memory bus on the node */ - char memslot; /* The memory slot on the bus */ -} geo_mem_t; - - -typedef union geoid_u { - geo_common_t common; - geo_node_t node; - geo_iocntl_t iocntl; - geo_pcicard_t pcicard; - geo_rtr_t rtr; - geo_cpu_t cpu; - geo_mem_t mem; - char padsize[GEOID_SIZE]; -} geoid_t; - - -/* Preprocessor macros */ - -#define GEO_MAX_LEN 48 /* max. formatted length, plus some pad: - module/001c07/slab/5/node/memory/2/slot/4 */ - -/* Values for geo_type_t */ -#define GEO_TYPE_INVALID 0 -#define GEO_TYPE_MODULE 1 -#define GEO_TYPE_NODE 2 -#define GEO_TYPE_RTR 3 -#define GEO_TYPE_IOCNTL 4 -#define GEO_TYPE_IOCARD 5 -#define GEO_TYPE_CPU 6 -#define GEO_TYPE_MEM 7 -#define GEO_TYPE_MAX (GEO_TYPE_MEM+1) - -/* Parameter for hwcfg_format_geoid_compt() */ -#define GEO_COMPT_MODULE 1 -#define GEO_COMPT_SLAB 2 -#define GEO_COMPT_IOBUS 3 -#define GEO_COMPT_IOSLOT 4 -#define GEO_COMPT_CPU 5 -#define GEO_COMPT_MEMBUS 6 -#define GEO_COMPT_MEMSLOT 7 - -#define GEO_INVALID_STR "" - -#define INVALID_NASID ((nasid_t)-1) -#define INVALID_CNODEID ((cnodeid_t)-1) -#define INVALID_PNODEID ((pnodeid_t)-1) -#define INVALID_SLAB (slabid_t)-1 -#define INVALID_SLOT (slotid_t)-1 -#define INVALID_MODULE ((moduleid_t)-1) - -static inline slabid_t geo_slab(geoid_t g) -{ - return (g.common.type == GEO_TYPE_INVALID) ? - INVALID_SLAB : g.common.slab; -} - -static inline slotid_t geo_slot(geoid_t g) -{ - return (g.common.type == GEO_TYPE_INVALID) ? - INVALID_SLOT : g.common.slot; -} - -static inline moduleid_t geo_module(geoid_t g) -{ - return (g.common.type == GEO_TYPE_INVALID) ? - INVALID_MODULE : g.common.module; -} - -extern geoid_t cnodeid_get_geoid(cnodeid_t cnode); - -#endif /* _ASM_IA64_SN_GEO_H */ diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h deleted file mode 100644 index e0487aa..0000000 --- a/include/asm-ia64/sn/intr.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_INTR_H -#define _ASM_IA64_SN_INTR_H - -#include -#include - -#define SGI_UART_VECTOR 0xe9 - -/* Reserved IRQs : Note, not to exceed IA64_SN2_FIRST_DEVICE_VECTOR */ -#define SGI_XPC_ACTIVATE 0x30 -#define SGI_II_ERROR 0x31 -#define SGI_XBOW_ERROR 0x32 -#define SGI_PCIASIC_ERROR 0x33 -#define SGI_ACPI_SCI_INT 0x34 -#define SGI_TIOCA_ERROR 0x35 -#define SGI_TIO_ERROR 0x36 -#define SGI_TIOCX_ERROR 0x37 -#define SGI_MMTIMER_VECTOR 0x38 -#define SGI_XPC_NOTIFY 0xe7 - -#define IA64_SN2_FIRST_DEVICE_VECTOR 0x3c -#define IA64_SN2_LAST_DEVICE_VECTOR 0xe6 - -#define SN2_IRQ_RESERVED 0x1 -#define SN2_IRQ_CONNECTED 0x2 -#define SN2_IRQ_SHARED 0x4 - -// The SN PROM irq struct -struct sn_irq_info { - struct sn_irq_info *irq_next; /* deprecated DO NOT USE */ - short irq_nasid; /* Nasid IRQ is assigned to */ - int irq_slice; /* slice IRQ is assigned to */ - int irq_cpuid; /* kernel logical cpuid */ - int irq_irq; /* the IRQ number */ - int irq_int_bit; /* Bridge interrupt pin */ - /* <0 means MSI */ - u64 irq_xtalkaddr; /* xtalkaddr IRQ is sent to */ - int irq_bridge_type;/* pciio asic type (pciio.h) */ - void *irq_bridge; /* bridge generating irq */ - void *irq_pciioinfo; /* associated pciio_info_t */ - int irq_last_intr; /* For Shub lb lost intr WAR */ - int irq_cookie; /* unique cookie */ - int irq_flags; /* flags */ - int irq_share_cnt; /* num devices sharing IRQ */ - struct list_head list; /* list of sn_irq_info structs */ - struct rcu_head rcu; /* rcu callback list */ -}; - -extern void sn_send_IPI_phys(int, long, int, int); -extern u64 sn_intr_alloc(nasid_t, int, - struct sn_irq_info *, - int, nasid_t, int); -extern void sn_intr_free(nasid_t, int, struct sn_irq_info *); -extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int); -extern void sn_set_err_irq_affinity(unsigned int); -extern struct list_head **sn_irq_lh; - -#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector) - -#endif /* _ASM_IA64_SN_INTR_H */ diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h deleted file mode 100644 index 41c73a7..0000000 --- a/include/asm-ia64/sn/io.h +++ /dev/null @@ -1,274 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_SN_IO_H -#define _ASM_SN_IO_H -#include -#include - -extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */ -extern void __sn_mmiowb(void); /* Forward definition */ - -extern int num_cnodes; - -#define __sn_mf_a() ia64_mfa() - -extern void sn_dma_flush(unsigned long); - -#define __sn_inb ___sn_inb -#define __sn_inw ___sn_inw -#define __sn_inl ___sn_inl -#define __sn_outb ___sn_outb -#define __sn_outw ___sn_outw -#define __sn_outl ___sn_outl -#define __sn_readb ___sn_readb -#define __sn_readw ___sn_readw -#define __sn_readl ___sn_readl -#define __sn_readq ___sn_readq -#define __sn_readb_relaxed ___sn_readb_relaxed -#define __sn_readw_relaxed ___sn_readw_relaxed -#define __sn_readl_relaxed ___sn_readl_relaxed -#define __sn_readq_relaxed ___sn_readq_relaxed - -/* - * Convenience macros for setting/clearing bits using the above accessors - */ - -#define __sn_setq_relaxed(addr, val) \ - writeq((__sn_readq_relaxed(addr) | (val)), (addr)) -#define __sn_clrq_relaxed(addr, val) \ - writeq((__sn_readq_relaxed(addr) & ~(val)), (addr)) - -/* - * The following routines are SN Platform specific, called when - * a reference is made to inX/outX set macros. SN Platform - * inX set of macros ensures that Posted DMA writes on the - * Bridge is flushed. - * - * The routines should be self explainatory. - */ - -static inline unsigned int -___sn_inb (unsigned long port) -{ - volatile unsigned char *addr; - unsigned char ret = -1; - - if ((addr = sn_io_addr(port))) { - ret = *addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - } - return ret; -} - -static inline unsigned int -___sn_inw (unsigned long port) -{ - volatile unsigned short *addr; - unsigned short ret = -1; - - if ((addr = sn_io_addr(port))) { - ret = *addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - } - return ret; -} - -static inline unsigned int -___sn_inl (unsigned long port) -{ - volatile unsigned int *addr; - unsigned int ret = -1; - - if ((addr = sn_io_addr(port))) { - ret = *addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - } - return ret; -} - -static inline void -___sn_outb (unsigned char val, unsigned long port) -{ - volatile unsigned char *addr; - - if ((addr = sn_io_addr(port))) { - *addr = val; - __sn_mmiowb(); - } -} - -static inline void -___sn_outw (unsigned short val, unsigned long port) -{ - volatile unsigned short *addr; - - if ((addr = sn_io_addr(port))) { - *addr = val; - __sn_mmiowb(); - } -} - -static inline void -___sn_outl (unsigned int val, unsigned long port) -{ - volatile unsigned int *addr; - - if ((addr = sn_io_addr(port))) { - *addr = val; - __sn_mmiowb(); - } -} - -/* - * The following routines are SN Platform specific, called when - * a reference is made to readX/writeX set macros. SN Platform - * readX set of macros ensures that Posted DMA writes on the - * Bridge is flushed. - * - * The routines should be self explainatory. - */ - -static inline unsigned char -___sn_readb (const volatile void __iomem *addr) -{ - unsigned char val; - - val = *(volatile unsigned char __force *)addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - return val; -} - -static inline unsigned short -___sn_readw (const volatile void __iomem *addr) -{ - unsigned short val; - - val = *(volatile unsigned short __force *)addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - return val; -} - -static inline unsigned int -___sn_readl (const volatile void __iomem *addr) -{ - unsigned int val; - - val = *(volatile unsigned int __force *)addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - return val; -} - -static inline unsigned long -___sn_readq (const volatile void __iomem *addr) -{ - unsigned long val; - - val = *(volatile unsigned long __force *)addr; - __sn_mf_a(); - sn_dma_flush((unsigned long)addr); - return val; -} - -/* - * For generic and SN2 kernels, we have a set of fast access - * PIO macros. These macros are provided on SN Platform - * because the normal inX and readX macros perform an - * additional task of flushing Post DMA request on the Bridge. - * - * These routines should be self explainatory. - */ - -static inline unsigned int -sn_inb_fast (unsigned long port) -{ - volatile unsigned char *addr = (unsigned char *)port; - unsigned char ret; - - ret = *addr; - __sn_mf_a(); - return ret; -} - -static inline unsigned int -sn_inw_fast (unsigned long port) -{ - volatile unsigned short *addr = (unsigned short *)port; - unsigned short ret; - - ret = *addr; - __sn_mf_a(); - return ret; -} - -static inline unsigned int -sn_inl_fast (unsigned long port) -{ - volatile unsigned int *addr = (unsigned int *)port; - unsigned int ret; - - ret = *addr; - __sn_mf_a(); - return ret; -} - -static inline unsigned char -___sn_readb_relaxed (const volatile void __iomem *addr) -{ - return *(volatile unsigned char __force *)addr; -} - -static inline unsigned short -___sn_readw_relaxed (const volatile void __iomem *addr) -{ - return *(volatile unsigned short __force *)addr; -} - -static inline unsigned int -___sn_readl_relaxed (const volatile void __iomem *addr) -{ - return *(volatile unsigned int __force *) addr; -} - -static inline unsigned long -___sn_readq_relaxed (const volatile void __iomem *addr) -{ - return *(volatile unsigned long __force *) addr; -} - -struct pci_dev; - -static inline int -sn_pci_set_vchan(struct pci_dev *pci_dev, unsigned long *addr, int vchan) -{ - - if (vchan > 1) { - return -1; - } - - if (!(*addr >> 32)) /* Using a mask here would be cleaner */ - return 0; /* but this generates better code */ - - if (vchan == 1) { - /* Set Bit 57 */ - *addr |= (1UL << 57); - } else { - /* Clear Bit 57 */ - *addr &= ~(1UL << 57); - } - - return 0; -} - -#endif /* _ASM_SN_IO_H */ diff --git a/include/asm-ia64/sn/ioc3.h b/include/asm-ia64/sn/ioc3.h deleted file mode 100644 index 95ed6cc..0000000 --- a/include/asm-ia64/sn/ioc3.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - * Copyright (C) 2005 Silicon Graphics, Inc. - */ -#ifndef IA64_SN_IOC3_H -#define IA64_SN_IOC3_H - -/* serial port register map */ -struct ioc3_serialregs { - uint32_t sscr; - uint32_t stpir; - uint32_t stcir; - uint32_t srpir; - uint32_t srcir; - uint32_t srtr; - uint32_t shadow; -}; - -/* SUPERIO uart register map */ -struct ioc3_uartregs { - char iu_lcr; - union { - char iir; /* read only */ - char fcr; /* write only */ - } u3; - union { - char ier; /* DLAB == 0 */ - char dlm; /* DLAB == 1 */ - } u2; - union { - char rbr; /* read only, DLAB == 0 */ - char thr; /* write only, DLAB == 0 */ - char dll; /* DLAB == 1 */ - } u1; - char iu_scr; - char iu_msr; - char iu_lsr; - char iu_mcr; -}; - -#define iu_rbr u1.rbr -#define iu_thr u1.thr -#define iu_dll u1.dll -#define iu_ier u2.ier -#define iu_dlm u2.dlm -#define iu_iir u3.iir -#define iu_fcr u3.fcr - -struct ioc3_sioregs { - char fill[0x170]; - struct ioc3_uartregs uartb; - struct ioc3_uartregs uarta; -}; - -/* PCI IO/mem space register map */ -struct ioc3 { - uint32_t pci_id; - uint32_t pci_scr; - uint32_t pci_rev; - uint32_t pci_lat; - uint32_t pci_addr; - uint32_t pci_err_addr_l; - uint32_t pci_err_addr_h; - - uint32_t sio_ir; - /* these registers are read-only for general kernel code. To - * modify them use the functions in ioc3.c - */ - uint32_t sio_ies; - uint32_t sio_iec; - uint32_t sio_cr; - uint32_t int_out; - uint32_t mcr; - uint32_t gpcr_s; - uint32_t gpcr_c; - uint32_t gpdr; - uint32_t gppr[9]; - char fill[0x4c]; - - /* serial port registers */ - uint32_t sbbr_h; - uint32_t sbbr_l; - - struct ioc3_serialregs port_a; - struct ioc3_serialregs port_b; - char fill1[0x1ff10]; - /* superio registers */ - struct ioc3_sioregs sregs; -}; - -/* These don't exist on the ioc3 serial card... */ -#define eier fill1[8] -#define eisr fill1[4] - -#define PCI_LAT 0xc /* Latency Timer */ -#define PCI_SCR_DROP_MODE_EN 0x00008000 /* drop pios on parity err */ -#define UARTA_BASE 0x178 -#define UARTB_BASE 0x170 - - -/* bitmasks for serial RX status byte */ -#define RXSB_OVERRUN 0x01 /* char(s) lost */ -#define RXSB_PAR_ERR 0x02 /* parity error */ -#define RXSB_FRAME_ERR 0x04 /* framing error */ -#define RXSB_BREAK 0x08 /* break character */ -#define RXSB_CTS 0x10 /* state of CTS */ -#define RXSB_DCD 0x20 /* state of DCD */ -#define RXSB_MODEM_VALID 0x40 /* DCD, CTS and OVERRUN are valid */ -#define RXSB_DATA_VALID 0x80 /* FRAME_ERR PAR_ERR & BREAK valid */ - -/* bitmasks for serial TX control byte */ -#define TXCB_INT_WHEN_DONE 0x20 /* interrupt after this byte is sent */ -#define TXCB_INVALID 0x00 /* byte is invalid */ -#define TXCB_VALID 0x40 /* byte is valid */ -#define TXCB_MCR 0x80 /* data<7:0> to modem cntrl register */ -#define TXCB_DELAY 0xc0 /* delay data<7:0> mSec */ - -/* bitmasks for SBBR_L */ -#define SBBR_L_SIZE 0x00000001 /* 0 1KB rings, 1 4KB rings */ - -/* bitmasks for SSCR_ */ -#define SSCR_RX_THRESHOLD 0x000001ff /* hiwater mark */ -#define SSCR_TX_TIMER_BUSY 0x00010000 /* TX timer in progress */ -#define SSCR_HFC_EN 0x00020000 /* h/w flow cntrl enabled */ -#define SSCR_RX_RING_DCD 0x00040000 /* postRX record on delta-DCD */ -#define SSCR_RX_RING_CTS 0x00080000 /* postRX record on delta-CTS */ -#define SSCR_HIGH_SPD 0x00100000 /* 4X speed */ -#define SSCR_DIAG 0x00200000 /* bypass clock divider */ -#define SSCR_RX_DRAIN 0x08000000 /* drain RX buffer to memory */ -#define SSCR_DMA_EN 0x10000000 /* enable ring buffer DMA */ -#define SSCR_DMA_PAUSE 0x20000000 /* pause DMA */ -#define SSCR_PAUSE_STATE 0x40000000 /* set when PAUSE takes effect*/ -#define SSCR_RESET 0x80000000 /* reset DMA channels */ - -/* all producer/comsumer pointers are the same bitfield */ -#define PROD_CONS_PTR_4K 0x00000ff8 /* for 4K buffers */ -#define PROD_CONS_PTR_1K 0x000003f8 /* for 1K buffers */ -#define PROD_CONS_PTR_OFF 3 - -/* bitmasks for SRCIR_ */ -#define SRCIR_ARM 0x80000000 /* arm RX timer */ - -/* bitmasks for SHADOW_ */ -#define SHADOW_DR 0x00000001 /* data ready */ -#define SHADOW_OE 0x00000002 /* overrun error */ -#define SHADOW_PE 0x00000004 /* parity error */ -#define SHADOW_FE 0x00000008 /* framing error */ -#define SHADOW_BI 0x00000010 /* break interrupt */ -#define SHADOW_THRE 0x00000020 /* transmit holding reg empty */ -#define SHADOW_TEMT 0x00000040 /* transmit shift reg empty */ -#define SHADOW_RFCE 0x00000080 /* char in RX fifo has error */ -#define SHADOW_DCTS 0x00010000 /* delta clear to send */ -#define SHADOW_DDCD 0x00080000 /* delta data carrier detect */ -#define SHADOW_CTS 0x00100000 /* clear to send */ -#define SHADOW_DCD 0x00800000 /* data carrier detect */ -#define SHADOW_DTR 0x01000000 /* data terminal ready */ -#define SHADOW_RTS 0x02000000 /* request to send */ -#define SHADOW_OUT1 0x04000000 /* 16550 OUT1 bit */ -#define SHADOW_OUT2 0x08000000 /* 16550 OUT2 bit */ -#define SHADOW_LOOP 0x10000000 /* loopback enabled */ - -/* bitmasks for SRTR_ */ -#define SRTR_CNT 0x00000fff /* reload value for RX timer */ -#define SRTR_CNT_VAL 0x0fff0000 /* current value of RX timer */ -#define SRTR_CNT_VAL_SHIFT 16 -#define SRTR_HZ 16000 /* SRTR clock frequency */ - -/* bitmasks for SIO_IR, SIO_IEC and SIO_IES */ -#define SIO_IR_SA_TX_MT 0x00000001 /* Serial port A TX empty */ -#define SIO_IR_SA_RX_FULL 0x00000002 /* port A RX buf full */ -#define SIO_IR_SA_RX_HIGH 0x00000004 /* port A RX hiwat */ -#define SIO_IR_SA_RX_TIMER 0x00000008 /* port A RX timeout */ -#define SIO_IR_SA_DELTA_DCD 0x00000010 /* port A delta DCD */ -#define SIO_IR_SA_DELTA_CTS 0x00000020 /* port A delta CTS */ -#define SIO_IR_SA_INT 0x00000040 /* port A pass-thru intr */ -#define SIO_IR_SA_TX_EXPLICIT 0x00000080 /* port A explicit TX thru */ -#define SIO_IR_SA_MEMERR 0x00000100 /* port A PCI error */ -#define SIO_IR_SB_TX_MT 0x00000200 -#define SIO_IR_SB_RX_FULL 0x00000400 -#define SIO_IR_SB_RX_HIGH 0x00000800 -#define SIO_IR_SB_RX_TIMER 0x00001000 -#define SIO_IR_SB_DELTA_DCD 0x00002000 -#define SIO_IR_SB_DELTA_CTS 0x00004000 -#define SIO_IR_SB_INT 0x00008000 -#define SIO_IR_SB_TX_EXPLICIT 0x00010000 -#define SIO_IR_SB_MEMERR 0x00020000 -#define SIO_IR_PP_INT 0x00040000 /* P port pass-thru intr */ -#define SIO_IR_PP_INTA 0x00080000 /* PP context A thru */ -#define SIO_IR_PP_INTB 0x00100000 /* PP context B thru */ -#define SIO_IR_PP_MEMERR 0x00200000 /* PP PCI error */ -#define SIO_IR_KBD_INT 0x00400000 /* kbd/mouse intr */ -#define SIO_IR_RT_INT 0x08000000 /* RT output pulse */ -#define SIO_IR_GEN_INT1 0x10000000 /* RT input pulse */ -#define SIO_IR_GEN_INT_SHIFT 28 - -/* per device interrupt masks */ -#define SIO_IR_SA (SIO_IR_SA_TX_MT | \ - SIO_IR_SA_RX_FULL | \ - SIO_IR_SA_RX_HIGH | \ - SIO_IR_SA_RX_TIMER | \ - SIO_IR_SA_DELTA_DCD | \ - SIO_IR_SA_DELTA_CTS | \ - SIO_IR_SA_INT | \ - SIO_IR_SA_TX_EXPLICIT | \ - SIO_IR_SA_MEMERR) - -#define SIO_IR_SB (SIO_IR_SB_TX_MT | \ - SIO_IR_SB_RX_FULL | \ - SIO_IR_SB_RX_HIGH | \ - SIO_IR_SB_RX_TIMER | \ - SIO_IR_SB_DELTA_DCD | \ - SIO_IR_SB_DELTA_CTS | \ - SIO_IR_SB_INT | \ - SIO_IR_SB_TX_EXPLICIT | \ - SIO_IR_SB_MEMERR) - -#define SIO_IR_PP (SIO_IR_PP_INT | SIO_IR_PP_INTA | \ - SIO_IR_PP_INTB | SIO_IR_PP_MEMERR) -#define SIO_IR_RT (SIO_IR_RT_INT | SIO_IR_GEN_INT1) - -/* bitmasks for SIO_CR */ -#define SIO_CR_CMD_PULSE_SHIFT 15 -#define SIO_CR_SER_A_BASE_SHIFT 1 -#define SIO_CR_SER_B_BASE_SHIFT 8 -#define SIO_CR_ARB_DIAG 0x00380000 /* cur !enet PCI requet (ro) */ -#define SIO_CR_ARB_DIAG_TXA 0x00000000 -#define SIO_CR_ARB_DIAG_RXA 0x00080000 -#define SIO_CR_ARB_DIAG_TXB 0x00100000 -#define SIO_CR_ARB_DIAG_RXB 0x00180000 -#define SIO_CR_ARB_DIAG_PP 0x00200000 -#define SIO_CR_ARB_DIAG_IDLE 0x00400000 /* 0 -> active request (ro) */ - -/* defs for some of the generic I/O pins */ -#define GPCR_PHY_RESET 0x20 /* pin is output to PHY reset */ -#define GPCR_UARTB_MODESEL 0x40 /* pin is output to port B mode sel */ -#define GPCR_UARTA_MODESEL 0x80 /* pin is output to port A mode sel */ - -#define GPPR_PHY_RESET_PIN 5 /* GIO pin controlling phy reset */ -#define GPPR_UARTB_MODESEL_PIN 6 /* GIO pin cntrling uartb modeselect */ -#define GPPR_UARTA_MODESEL_PIN 7 /* GIO pin cntrling uarta modeselect */ - -#endif /* IA64_SN_IOC3_H */ diff --git a/include/asm-ia64/sn/klconfig.h b/include/asm-ia64/sn/klconfig.h deleted file mode 100644 index bcbf209..0000000 --- a/include/asm-ia64/sn/klconfig.h +++ /dev/null @@ -1,246 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Derived from IRIX . - * - * Copyright (C) 1992-1997,1999,2001-2004 Silicon Graphics, Inc. All Rights Reserved. - * Copyright (C) 1999 by Ralf Baechle - */ -#ifndef _ASM_IA64_SN_KLCONFIG_H -#define _ASM_IA64_SN_KLCONFIG_H - -/* - * The KLCONFIG structures store info about the various BOARDs found - * during Hardware Discovery. In addition, it stores info about the - * components found on the BOARDs. - */ - -typedef s32 klconf_off_t; - - -/* Functions/macros needed to use this structure */ - -typedef struct kl_config_hdr { - char pad[20]; - klconf_off_t ch_board_info; /* the link list of boards */ - char pad0[88]; -} kl_config_hdr_t; - - -#define NODE_OFFSET_TO_LBOARD(nasid,off) (lboard_t*)(GLOBAL_CAC_ADDR((nasid), (off))) - -/* - * The KLCONFIG area is organized as a LINKED LIST of BOARDs. A BOARD - * can be either 'LOCAL' or 'REMOTE'. LOCAL means it is attached to - * the LOCAL/current NODE. REMOTE means it is attached to a different - * node.(TBD - Need a way to treat ROUTER boards.) - * - * There are 2 different structures to represent these boards - - * lboard - Local board, rboard - remote board. These 2 structures - * can be arbitrarily mixed in the LINKED LIST of BOARDs. (Refer - * Figure below). The first byte of the rboard or lboard structure - * is used to find out its type - no unions are used. - * If it is a lboard, then the config info of this board will be found - * on the local node. (LOCAL NODE BASE + offset value gives pointer to - * the structure. - * If it is a rboard, the local structure contains the node number - * and the offset of the beginning of the LINKED LIST on the remote node. - * The details of the hardware on a remote node can be built locally, - * if required, by reading the LINKED LIST on the remote node and - * ignoring all the rboards on that node. - * - * The local node uses the REMOTE NODE NUMBER + OFFSET to point to the - * First board info on the remote node. The remote node list is - * traversed as the local list, using the REMOTE BASE ADDRESS and not - * the local base address and ignoring all rboard values. - * - * - KLCONFIG - - +------------+ +------------+ +------------+ +------------+ - | lboard | +-->| lboard | +-->| rboard | +-->| lboard | - +------------+ | +------------+ | +------------+ | +------------+ - | board info | | | board info | | |errinfo,bptr| | | board info | - +------------+ | +------------+ | +------------+ | +------------+ - | offset |--+ | offset |--+ | offset |--+ |offset=NULL | - +------------+ +------------+ +------------+ +------------+ - - - +------------+ - | board info | - +------------+ +--------------------------------+ - | compt 1 |------>| type, rev, diaginfo, size ... | (CPU) - +------------+ +--------------------------------+ - | compt 2 |--+ - +------------+ | +--------------------------------+ - | ... | +--->| type, rev, diaginfo, size ... | (MEM_BANK) - +------------+ +--------------------------------+ - | errinfo |--+ - +------------+ | +--------------------------------+ - +--->|r/l brd errinfo,compt err flags | - +--------------------------------+ - - * - * Each BOARD consists of COMPONENTs and the BOARD structure has - * pointers (offsets) to its COMPONENT structure. - * The COMPONENT structure has version info, size and speed info, revision, - * error info and the NIC info. This structure can accommodate any - * BOARD with arbitrary COMPONENT composition. - * - * The ERRORINFO part of each BOARD has error information - * that describes errors about the BOARD itself. It also has flags to - * indicate the COMPONENT(s) on the board that have errors. The error - * information specific to the COMPONENT is present in the respective - * COMPONENT structure. - * - * The ERRORINFO structure is also treated like a COMPONENT, ie. the - * BOARD has pointers(offset) to the ERRORINFO structure. The rboard - * structure also has a pointer to the ERRORINFO structure. This is - * the place to store ERRORINFO about a REMOTE NODE, if the HUB on - * that NODE is not working or if the REMOTE MEMORY is BAD. In cases where - * only the CPU of the REMOTE NODE is disabled, the ERRORINFO pointer can - * be a NODE NUMBER, REMOTE OFFSET combination, pointing to error info - * which is present on the REMOTE NODE.(TBD) - * REMOTE ERRINFO can be stored on any of the nearest nodes - * or on all the nearest nodes.(TBD) - * Like BOARD structures, REMOTE ERRINFO structures can be built locally - * using the rboard errinfo pointer. - * - * In order to get useful information from this Data organization, a set of - * interface routines are provided (TBD). The important thing to remember while - * manipulating the structures, is that, the NODE number information should - * be used. If the NODE is non-zero (remote) then each offset should - * be added to the REMOTE BASE ADDR else it should be added to the LOCAL BASE ADDR. - * This includes offsets for BOARDS, COMPONENTS and ERRORINFO. - * - * Note that these structures do not provide much info about connectivity. - * That info will be part of HWGRAPH, which is an extension of the cfg_t - * data structure. (ref IP27prom/cfg.h) It has to be extended to include - * the IO part of the Network(TBD). - * - * The data structures below define the above concepts. - */ - - -/* - * BOARD classes - */ - -#define KLCLASS_MASK 0xf0 -#define KLCLASS_NONE 0x00 -#define KLCLASS_NODE 0x10 /* CPU, Memory and HUB board */ -#define KLCLASS_CPU KLCLASS_NODE -#define KLCLASS_IO 0x20 /* BaseIO, 4 ch SCSI, ethernet, FDDI - and the non-graphics widget boards */ -#define KLCLASS_ROUTER 0x30 /* Router board */ -#define KLCLASS_MIDPLANE 0x40 /* We need to treat this as a board - so that we can record error info */ -#define KLCLASS_IOBRICK 0x70 /* IP35 iobrick */ -#define KLCLASS_MAX 8 /* Bump this if a new CLASS is added */ - -#define KLCLASS(_x) ((_x) & KLCLASS_MASK) - - -/* - * board types - */ - -#define KLTYPE_MASK 0x0f -#define KLTYPE(_x) ((_x) & KLTYPE_MASK) - -#define KLTYPE_SNIA (KLCLASS_CPU | 0x1) -#define KLTYPE_TIO (KLCLASS_CPU | 0x2) - -#define KLTYPE_ROUTER (KLCLASS_ROUTER | 0x1) -#define KLTYPE_META_ROUTER (KLCLASS_ROUTER | 0x3) -#define KLTYPE_REPEATER_ROUTER (KLCLASS_ROUTER | 0x4) - -#define KLTYPE_IOBRICK_XBOW (KLCLASS_MIDPLANE | 0x2) - -#define KLTYPE_IOBRICK (KLCLASS_IOBRICK | 0x0) -#define KLTYPE_NBRICK (KLCLASS_IOBRICK | 0x4) -#define KLTYPE_PXBRICK (KLCLASS_IOBRICK | 0x6) -#define KLTYPE_IXBRICK (KLCLASS_IOBRICK | 0x7) -#define KLTYPE_CGBRICK (KLCLASS_IOBRICK | 0x8) -#define KLTYPE_OPUSBRICK (KLCLASS_IOBRICK | 0x9) -#define KLTYPE_SABRICK (KLCLASS_IOBRICK | 0xa) -#define KLTYPE_IABRICK (KLCLASS_IOBRICK | 0xb) -#define KLTYPE_PABRICK (KLCLASS_IOBRICK | 0xc) -#define KLTYPE_GABRICK (KLCLASS_IOBRICK | 0xd) - - -/* - * board structures - */ - -#define MAX_COMPTS_PER_BRD 24 - -typedef struct lboard_s { - klconf_off_t brd_next_any; /* Next BOARD */ - unsigned char struct_type; /* type of structure, local or remote */ - unsigned char brd_type; /* type+class */ - unsigned char brd_sversion; /* version of this structure */ - unsigned char brd_brevision; /* board revision */ - unsigned char brd_promver; /* board prom version, if any */ - unsigned char brd_flags; /* Enabled, Disabled etc */ - unsigned char brd_slot; /* slot number */ - unsigned short brd_debugsw; /* Debug switches */ - geoid_t brd_geoid; /* geo id */ - partid_t brd_partition; /* Partition number */ - unsigned short brd_diagval; /* diagnostic value */ - unsigned short brd_diagparm; /* diagnostic parameter */ - unsigned char brd_inventory; /* inventory history */ - unsigned char brd_numcompts; /* Number of components */ - nic_t brd_nic; /* Number in CAN */ - nasid_t brd_nasid; /* passed parameter */ - klconf_off_t brd_compts[MAX_COMPTS_PER_BRD]; /* pointers to COMPONENTS */ - klconf_off_t brd_errinfo; /* Board's error information */ - struct lboard_s *brd_parent; /* Logical parent for this brd */ - char pad0[4]; - unsigned char brd_confidence; /* confidence that the board is bad */ - nasid_t brd_owner; /* who owns this board */ - unsigned char brd_nic_flags; /* To handle 8 more NICs */ - char pad1[24]; /* future expansion */ - char brd_name[32]; - nasid_t brd_next_same_host; /* host of next brd w/same nasid */ - klconf_off_t brd_next_same; /* Next BOARD with same nasid */ -} lboard_t; - -/* - * Generic info structure. This stores common info about a - * component. - */ - -typedef struct klinfo_s { /* Generic info */ - unsigned char struct_type; /* type of this structure */ - unsigned char struct_version; /* version of this structure */ - unsigned char flags; /* Enabled, disabled etc */ - unsigned char revision; /* component revision */ - unsigned short diagval; /* result of diagnostics */ - unsigned short diagparm; /* diagnostic parameter */ - unsigned char inventory; /* previous inventory status */ - unsigned short partid; /* widget part number */ - nic_t nic; /* MUst be aligned properly */ - unsigned char physid; /* physical id of component */ - unsigned int virtid; /* virtual id as seen by system */ - unsigned char widid; /* Widget id - if applicable */ - nasid_t nasid; /* node number - from parent */ - char pad1; /* pad out structure. */ - char pad2; /* pad out structure. */ - void *data; - klconf_off_t errinfo; /* component specific errors */ - unsigned short pad3; /* pci fields have moved over to */ - unsigned short pad4; /* klbri_t */ -} klinfo_t ; - - -static inline lboard_t *find_lboard_next(lboard_t * brd) -{ - if (brd && brd->brd_next_any) - return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any); - return NULL; -} - -#endif /* _ASM_IA64_SN_KLCONFIG_H */ diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h deleted file mode 100644 index 344bf44..0000000 --- a/include/asm-ia64/sn/l1.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992-1997,2000-2004 Silicon Graphics, Inc. All Rights Reserved. - */ - -#ifndef _ASM_IA64_SN_L1_H -#define _ASM_IA64_SN_L1_H - -/* brick type response codes */ -#define L1_BRICKTYPE_PX 0x23 /* # */ -#define L1_BRICKTYPE_PE 0x25 /* % */ -#define L1_BRICKTYPE_N_p0 0x26 /* & */ -#define L1_BRICKTYPE_IP45 0x34 /* 4 */ -#define L1_BRICKTYPE_IP41 0x35 /* 5 */ -#define L1_BRICKTYPE_TWISTER 0x36 /* 6 */ /* IP53 & ROUTER */ -#define L1_BRICKTYPE_IX 0x3d /* = */ -#define L1_BRICKTYPE_IP34 0x61 /* a */ -#define L1_BRICKTYPE_GA 0x62 /* b */ -#define L1_BRICKTYPE_C 0x63 /* c */ -#define L1_BRICKTYPE_OPUS_TIO 0x66 /* f */ -#define L1_BRICKTYPE_I 0x69 /* i */ -#define L1_BRICKTYPE_N 0x6e /* n */ -#define L1_BRICKTYPE_OPUS 0x6f /* o */ -#define L1_BRICKTYPE_P 0x70 /* p */ -#define L1_BRICKTYPE_R 0x72 /* r */ -#define L1_BRICKTYPE_CHI_CG 0x76 /* v */ -#define L1_BRICKTYPE_X 0x78 /* x */ -#define L1_BRICKTYPE_X2 0x79 /* y */ -#define L1_BRICKTYPE_SA 0x5e /* ^ */ -#define L1_BRICKTYPE_PA 0x6a /* j */ -#define L1_BRICKTYPE_IA 0x6b /* k */ -#define L1_BRICKTYPE_ATHENA 0x2b /* + */ -#define L1_BRICKTYPE_DAYTONA 0x7a /* z */ -#define L1_BRICKTYPE_1932 0x2c /* . */ -#define L1_BRICKTYPE_191010 0x2e /* , */ - -/* board type response codes */ -#define L1_BOARDTYPE_IP69 0x0100 /* CA */ -#define L1_BOARDTYPE_IP63 0x0200 /* CB */ -#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */ -#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */ -#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */ -#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */ -#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */ -#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */ -#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */ - -#endif /* _ASM_IA64_SN_L1_H */ diff --git a/include/asm-ia64/sn/leds.h b/include/asm-ia64/sn/leds.h deleted file mode 100644 index 66cf8c4..0000000 --- a/include/asm-ia64/sn/leds.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_LEDS_H -#define _ASM_IA64_SN_LEDS_H - -#include -#include -#include - -#define LED0 (LOCAL_MMR_ADDR(SH_REAL_JUNK_BUS_LED0)) -#define LED_CPU_SHIFT 16 - -#define LED_CPU_HEARTBEAT 0x01 -#define LED_CPU_ACTIVITY 0x02 -#define LED_ALWAYS_SET 0x00 - -/* - * Basic macros for flashing the LEDS on an SGI SN. - */ - -static __inline__ void -set_led_bits(u8 value, u8 mask) -{ - pda->led_state = (pda->led_state & ~mask) | (value & mask); - *pda->led_address = (short) pda->led_state; -} - -#endif /* _ASM_IA64_SN_LEDS_H */ - diff --git a/include/asm-ia64/sn/module.h b/include/asm-ia64/sn/module.h deleted file mode 100644 index 734e980..0000000 --- a/include/asm-ia64/sn/module.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_MODULE_H -#define _ASM_IA64_SN_MODULE_H - -/* parameter for format_module_id() */ -#define MODULE_FORMAT_BRIEF 1 -#define MODULE_FORMAT_LONG 2 -#define MODULE_FORMAT_LCD 3 - -/* - * Module id format - * - * 31-16 Rack ID (encoded class, group, number - 16-bit unsigned int) - * 15-8 Brick type (8-bit ascii character) - * 7-0 Bay (brick position in rack (0-63) - 8-bit unsigned int) - * - */ - -/* - * Macros for getting the brick type - */ -#define MODULE_BTYPE_MASK 0xff00 -#define MODULE_BTYPE_SHFT 8 -#define MODULE_GET_BTYPE(_m) (((_m) & MODULE_BTYPE_MASK) >> MODULE_BTYPE_SHFT) -#define MODULE_BT_TO_CHAR(_b) ((char)(_b)) -#define MODULE_GET_BTCHAR(_m) (MODULE_BT_TO_CHAR(MODULE_GET_BTYPE(_m))) - -/* - * Macros for getting the rack ID. - */ -#define MODULE_RACK_MASK 0xffff0000 -#define MODULE_RACK_SHFT 16 -#define MODULE_GET_RACK(_m) (((_m) & MODULE_RACK_MASK) >> MODULE_RACK_SHFT) - -/* - * Macros for getting the brick position - */ -#define MODULE_BPOS_MASK 0x00ff -#define MODULE_BPOS_SHFT 0 -#define MODULE_GET_BPOS(_m) (((_m) & MODULE_BPOS_MASK) >> MODULE_BPOS_SHFT) - -/* - * Macros for encoding and decoding rack IDs - * A rack number consists of three parts: - * class (0==CPU/mixed, 1==I/O), group, number - * - * Rack number is stored just as it is displayed on the screen: - * a 3-decimal-digit number. - */ -#define RACK_CLASS_DVDR 100 -#define RACK_GROUP_DVDR 10 -#define RACK_NUM_DVDR 1 - -#define RACK_CREATE_RACKID(_c, _g, _n) ((_c) * RACK_CLASS_DVDR + \ - (_g) * RACK_GROUP_DVDR + (_n) * RACK_NUM_DVDR) - -#define RACK_GET_CLASS(_r) ((_r) / RACK_CLASS_DVDR) -#define RACK_GET_GROUP(_r) (((_r) - RACK_GET_CLASS(_r) * \ - RACK_CLASS_DVDR) / RACK_GROUP_DVDR) -#define RACK_GET_NUM(_r) (((_r) - RACK_GET_CLASS(_r) * \ - RACK_CLASS_DVDR - RACK_GET_GROUP(_r) * \ - RACK_GROUP_DVDR) / RACK_NUM_DVDR) - -/* - * Macros for encoding and decoding rack IDs - * A rack number consists of three parts: - * class 1 bit, 0==CPU/mixed, 1==I/O - * group 2 bits for CPU/mixed, 3 bits for I/O - * number 3 bits for CPU/mixed, 2 bits for I/O (1 based) - */ -#define RACK_GROUP_BITS(_r) (RACK_GET_CLASS(_r) ? 3 : 2) -#define RACK_NUM_BITS(_r) (RACK_GET_CLASS(_r) ? 2 : 3) - -#define RACK_CLASS_MASK(_r) 0x20 -#define RACK_CLASS_SHFT(_r) 5 -#define RACK_ADD_CLASS(_r, _c) \ - ((_r) |= (_c) << RACK_CLASS_SHFT(_r) & RACK_CLASS_MASK(_r)) - -#define RACK_GROUP_SHFT(_r) RACK_NUM_BITS(_r) -#define RACK_GROUP_MASK(_r) \ - ( (((unsigned)1< -#include -#include -#include - -/* - * NUMA Node-Specific Data structures are defined in this file. - * In particular, this is the location of the node PDA. - * A pointer to the right node PDA is saved in each CPU PDA. - */ - -/* - * Node-specific data structure. - * - * One of these structures is allocated on each node of a NUMA system. - * - * This structure provides a convenient way of keeping together - * all per-node data structures. - */ -struct phys_cpuid { - short nasid; - char subnode; - char slice; -}; - -struct nodepda_s { - void *pdinfo; /* Platform-dependent per-node info */ - - /* - * The BTEs on this node are shared by the local cpus - */ - struct bteinfo_s bte_if[MAX_BTES_PER_NODE]; /* Virtual Interface */ - struct timer_list bte_recovery_timer; - spinlock_t bte_recovery_lock; - - /* - * Array of pointers to the nodepdas for each node. - */ - struct nodepda_s *pernode_pdaindr[MAX_COMPACT_NODES]; - - /* - * Array of physical cpu identifiers. Indexed by cpuid. - */ - struct phys_cpuid phys_cpuid[NR_CPUS]; - spinlock_t ptc_lock ____cacheline_aligned_in_smp; -}; - -typedef struct nodepda_s nodepda_t; - -/* - * Access Functions for node PDA. - * Since there is one nodepda for each node, we need a convenient mechanism - * to access these nodepdas without cluttering code with #ifdefs. - * The next set of definitions provides this. - * Routines are expected to use - * - * sn_nodepda - to access node PDA for the node on which code is running - * NODEPDA(cnodeid) - to access node PDA for cnodeid - */ - -DECLARE_PER_CPU(struct nodepda_s *, __sn_nodepda); -#define sn_nodepda (__get_cpu_var(__sn_nodepda)) -#define NODEPDA(cnodeid) (sn_nodepda->pernode_pdaindr[cnodeid]) - -/* - * Check if given a compact node id the corresponding node has all the - * cpus disabled. - */ -#define is_headless_node(cnodeid) (nr_cpus_node(cnodeid) == 0) - -#endif /* _ASM_IA64_SN_NODEPDA_H */ diff --git a/include/asm-ia64/sn/pcibr_provider.h b/include/asm-ia64/sn/pcibr_provider.h deleted file mode 100644 index da205b7..0000000 --- a/include/asm-ia64/sn/pcibr_provider.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992-1997,2000-2006 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H -#define _ASM_IA64_SN_PCI_PCIBR_PROVIDER_H - -#include -#include - -/* Workarounds */ -#define PV907516 (1 << 1) /* TIOCP: Don't write the write buffer flush reg */ - -#define BUSTYPE_MASK 0x1 - -/* Macros given a pcibus structure */ -#define IS_PCIX(ps) ((ps)->pbi_bridge_mode & BUSTYPE_MASK) -#define IS_PCI_BRIDGE_ASIC(asic) (asic == PCIIO_ASIC_TYPE_PIC || \ - asic == PCIIO_ASIC_TYPE_TIOCP) -#define IS_PIC_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_PIC) -#define IS_TIOCP_SOFT(ps) (ps->pbi_bridge_type == PCIBR_BRIDGETYPE_TIOCP) - - -/* - * The different PCI Bridge types supported on the SGI Altix platforms - */ -#define PCIBR_BRIDGETYPE_UNKNOWN -1 -#define PCIBR_BRIDGETYPE_PIC 2 -#define PCIBR_BRIDGETYPE_TIOCP 3 - -/* - * Bridge 64bit Direct Map Attributes - */ -#define PCI64_ATTR_PREF (1ull << 59) -#define PCI64_ATTR_PREC (1ull << 58) -#define PCI64_ATTR_VIRTUAL (1ull << 57) -#define PCI64_ATTR_BAR (1ull << 56) -#define PCI64_ATTR_SWAP (1ull << 55) -#define PCI64_ATTR_VIRTUAL1 (1ull << 54) - -#define PCI32_LOCAL_BASE 0 -#define PCI32_MAPPED_BASE 0x40000000 -#define PCI32_DIRECT_BASE 0x80000000 - -#define IS_PCI32_MAPPED(x) ((u64)(x) < PCI32_DIRECT_BASE && \ - (u64)(x) >= PCI32_MAPPED_BASE) -#define IS_PCI32_DIRECT(x) ((u64)(x) >= PCI32_MAPPED_BASE) - - -/* - * Bridge PMU Address Transaltion Entry Attibutes - */ -#define PCI32_ATE_V (0x1 << 0) -#define PCI32_ATE_CO (0x1 << 1) /* PIC ASIC ONLY */ -#define PCI32_ATE_PIO (0x1 << 1) /* TIOCP ASIC ONLY */ -#define PCI32_ATE_MSI (0x1 << 2) -#define PCI32_ATE_PREF (0x1 << 3) -#define PCI32_ATE_BAR (0x1 << 4) -#define PCI32_ATE_ADDR_SHFT 12 - -#define MINIMAL_ATES_REQUIRED(addr, size) \ - (IOPG(IOPGOFF(addr) + (size) - 1) == IOPG((size) - 1)) - -#define MINIMAL_ATE_FLAG(addr, size) \ - (MINIMAL_ATES_REQUIRED((u64)addr, size) ? 1 : 0) - -/* bit 29 of the pci address is the SWAP bit */ -#define ATE_SWAPSHIFT 29 -#define ATE_SWAP_ON(x) ((x) |= (1 << ATE_SWAPSHIFT)) -#define ATE_SWAP_OFF(x) ((x) &= ~(1 << ATE_SWAPSHIFT)) - -/* - * I/O page size - */ -#if PAGE_SIZE < 16384 -#define IOPFNSHIFT 12 /* 4K per mapped page */ -#else -#define IOPFNSHIFT 14 /* 16K per mapped page */ -#endif - -#define IOPGSIZE (1 << IOPFNSHIFT) -#define IOPG(x) ((x) >> IOPFNSHIFT) -#define IOPGOFF(x) ((x) & (IOPGSIZE-1)) - -#define PCIBR_DEV_SWAP_DIR (1ull << 19) -#define PCIBR_CTRL_PAGE_SIZE (0x1 << 21) - -/* - * PMU resources. - */ -struct ate_resource{ - u64 *ate; - u64 num_ate; - u64 lowest_free_index; -}; - -struct pcibus_info { - struct pcibus_bussoft pbi_buscommon; /* common header */ - u32 pbi_moduleid; - short pbi_bridge_type; - short pbi_bridge_mode; - - struct ate_resource pbi_int_ate_resource; - u64 pbi_int_ate_size; - - u64 pbi_dir_xbase; - char pbi_hub_xid; - - u64 pbi_devreg[8]; - - u32 pbi_valid_devices; - u32 pbi_enabled_devices; - - spinlock_t pbi_lock; -}; - -extern int pcibr_init_provider(void); -extern void *pcibr_bus_fixup(struct pcibus_bussoft *, struct pci_controller *); -extern dma_addr_t pcibr_dma_map(struct pci_dev *, unsigned long, size_t, int type); -extern dma_addr_t pcibr_dma_map_consistent(struct pci_dev *, unsigned long, size_t, int type); -extern void pcibr_dma_unmap(struct pci_dev *, dma_addr_t, int); - -/* - * prototypes for the bridge asic register access routines in pcibr_reg.c - */ -extern void pcireg_control_bit_clr(struct pcibus_info *, u64); -extern void pcireg_control_bit_set(struct pcibus_info *, u64); -extern u64 pcireg_tflush_get(struct pcibus_info *); -extern u64 pcireg_intr_status_get(struct pcibus_info *); -extern void pcireg_intr_enable_bit_clr(struct pcibus_info *, u64); -extern void pcireg_intr_enable_bit_set(struct pcibus_info *, u64); -extern void pcireg_intr_addr_addr_set(struct pcibus_info *, int, u64); -extern void pcireg_force_intr_set(struct pcibus_info *, int); -extern u64 pcireg_wrb_flush_get(struct pcibus_info *, int); -extern void pcireg_int_ate_set(struct pcibus_info *, int, u64); -extern u64 __iomem * pcireg_int_ate_addr(struct pcibus_info *, int); -extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info); -extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info); -extern int pcibr_ate_alloc(struct pcibus_info *, int); -extern void pcibr_ate_free(struct pcibus_info *, int); -extern void ate_write(struct pcibus_info *, int, int, u64); -extern int sal_pcibr_slot_enable(struct pcibus_info *soft, int device, - void *resp, char **ssdt); -extern int sal_pcibr_slot_disable(struct pcibus_info *soft, int device, - int action, void *resp); -extern u16 sn_ioboard_to_pci_bus(struct pci_bus *pci_bus); -#endif diff --git a/include/asm-ia64/sn/pcibus_provider_defs.h b/include/asm-ia64/sn/pcibus_provider_defs.h deleted file mode 100644 index 8f7c83d..0000000 --- a/include/asm-ia64/sn/pcibus_provider_defs.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H -#define _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H - -/* - * SN pci asic types. Do not ever renumber these or reuse values. The - * values must agree with what prom thinks they are. - */ - -#define PCIIO_ASIC_TYPE_UNKNOWN 0 -#define PCIIO_ASIC_TYPE_PPB 1 -#define PCIIO_ASIC_TYPE_PIC 2 -#define PCIIO_ASIC_TYPE_TIOCP 3 -#define PCIIO_ASIC_TYPE_TIOCA 4 -#define PCIIO_ASIC_TYPE_TIOCE 5 - -#define PCIIO_ASIC_MAX_TYPES 6 - -/* - * Common pciio bus provider data. There should be one of these as the - * first field in any pciio based provider soft structure (e.g. pcibr_soft - * tioca_soft, etc). - */ - -struct pcibus_bussoft { - u32 bs_asic_type; /* chipset type */ - u32 bs_xid; /* xwidget id */ - u32 bs_persist_busnum; /* Persistent Bus Number */ - u32 bs_persist_segment; /* Segment Number */ - u64 bs_legacy_io; /* legacy io pio addr */ - u64 bs_legacy_mem; /* legacy mem pio addr */ - u64 bs_base; /* widget base */ - struct xwidget_info *bs_xwidget_info; -}; - -struct pci_controller; -/* - * SN pci bus indirection - */ - -struct sn_pcibus_provider { - dma_addr_t (*dma_map)(struct pci_dev *, unsigned long, size_t, int flags); - dma_addr_t (*dma_map_consistent)(struct pci_dev *, unsigned long, size_t, int flags); - void (*dma_unmap)(struct pci_dev *, dma_addr_t, int); - void * (*bus_fixup)(struct pcibus_bussoft *, struct pci_controller *); - void (*force_interrupt)(struct sn_irq_info *); - void (*target_interrupt)(struct sn_irq_info *); -}; - -/* - * Flags used by the map interfaces - * bits 3:0 specifies format of passed in address - * bit 4 specifies that address is to be used for MSI - */ - -#define SN_DMA_ADDRTYPE(x) ((x) & 0xf) -#define SN_DMA_ADDR_PHYS 1 /* address is an xio address. */ -#define SN_DMA_ADDR_XIO 2 /* address is phys memory */ -#define SN_DMA_MSI 0x10 /* Bus address is to be used for MSI */ - -extern struct sn_pcibus_provider *sn_pci_provider[]; -#endif /* _ASM_IA64_SN_PCI_PCIBUS_PROVIDER_H */ diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h deleted file mode 100644 index 1c2382c..0000000 --- a/include/asm-ia64/sn/pcidev.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PCI_PCIDEV_H -#define _ASM_IA64_SN_PCI_PCIDEV_H - -#include - -/* - * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to - * the pcidev_info structs for all devices under a controller, we keep a - * list of pcidev_info under pci_controller->platform_data. - */ -struct sn_platform_data { - void *provider_soft; - struct list_head pcidev_info; -}; - -#define SN_PLATFORM_DATA(busdev) \ - ((struct sn_platform_data *)(PCI_CONTROLLER(busdev)->platform_data)) - -#define SN_PCIDEV_INFO(dev) sn_pcidev_info_get(dev) - -/* - * Given a pci_bus, return the sn pcibus_bussoft struct. Note that - * this only works for root busses, not for busses represented by PPB's. - */ - -#define SN_PCIBUS_BUSSOFT(pci_bus) \ - ((struct pcibus_bussoft *)(SN_PLATFORM_DATA(pci_bus)->provider_soft)) - -#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \ - ((struct pcibus_info *)(SN_PLATFORM_DATA(pci_bus)->provider_soft)) -/* - * Given a struct pci_dev, return the sn pcibus_bussoft struct. Note - * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due - * due to possible PPB's in the path. - */ - -#define SN_PCIDEV_BUSSOFT(pci_dev) \ - (SN_PCIDEV_INFO(pci_dev)->pdi_host_pcidev_info->pdi_pcibus_info) - -#define SN_PCIDEV_BUSPROVIDER(pci_dev) \ - (SN_PCIDEV_INFO(pci_dev)->pdi_provider) - -#define PCIIO_BUS_NONE 255 /* bus 255 reserved */ -#define PCIIO_SLOT_NONE 255 -#define PCIIO_FUNC_NONE 255 -#define PCIIO_VENDOR_ID_NONE (-1) - -struct pcidev_info { - u64 pdi_pio_mapped_addr[7]; /* 6 BARs PLUS 1 ROM */ - u64 pdi_slot_host_handle; /* Bus and devfn Host pci_dev */ - - struct pcibus_bussoft *pdi_pcibus_info; /* Kernel common bus soft */ - struct pcidev_info *pdi_host_pcidev_info; /* Kernel Host pci_dev */ - struct pci_dev *pdi_linux_pcidev; /* Kernel pci_dev */ - - struct sn_irq_info *pdi_sn_irq_info; - struct sn_pcibus_provider *pdi_provider; /* sn pci ops */ - struct pci_dev *host_pci_dev; /* host bus link */ - struct list_head pdi_list; /* List of pcidev_info */ -}; - -extern void sn_irq_fixup(struct pci_dev *pci_dev, - struct sn_irq_info *sn_irq_info); -extern void sn_irq_unfixup(struct pci_dev *pci_dev); -extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *); -extern void sn_bus_fixup(struct pci_bus *); -extern void sn_acpi_bus_fixup(struct pci_bus *); -extern void sn_common_bus_fixup(struct pci_bus *, struct pcibus_bussoft *); -extern void sn_bus_store_sysdata(struct pci_dev *dev); -extern void sn_bus_free_sysdata(void); -extern void sn_generate_path(struct pci_bus *pci_bus, char *address); -extern void sn_io_slot_fixup(struct pci_dev *); -extern void sn_acpi_slot_fixup(struct pci_dev *); -extern void sn_pci_fixup_slot(struct pci_dev *dev, struct pcidev_info *, - struct sn_irq_info *); -extern void sn_pci_unfixup_slot(struct pci_dev *dev); -extern void sn_irq_lh_init(void); -#endif /* _ASM_IA64_SN_PCI_PCIDEV_H */ diff --git a/include/asm-ia64/sn/pda.h b/include/asm-ia64/sn/pda.h deleted file mode 100644 index 1c5108d..0000000 --- a/include/asm-ia64/sn/pda.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PDA_H -#define _ASM_IA64_SN_PDA_H - -#include -#include -#include - - -/* - * CPU-specific data structure. - * - * One of these structures is allocated for each cpu of a NUMA system. - * - * This structure provides a convenient way of keeping together - * all SN per-cpu data structures. - */ - -typedef struct pda_s { - - /* - * Support for SN LEDs - */ - volatile short *led_address; - u8 led_state; - u8 hb_state; /* supports blinking heartbeat leds */ - unsigned int hb_count; - - unsigned int idle_flag; - - volatile unsigned long *bedrock_rev_id; - volatile unsigned long *pio_write_status_addr; - unsigned long pio_write_status_val; - volatile unsigned long *pio_shub_war_cam_addr; - - unsigned long sn_in_service_ivecs[4]; - int sn_lb_int_war_ticks; - int sn_last_irq; - int sn_first_irq; -} pda_t; - - -#define CACHE_ALIGN(x) (((x) + SMP_CACHE_BYTES-1) & ~(SMP_CACHE_BYTES-1)) - -/* - * PDA - * Per-cpu private data area for each cpu. The PDA is located immediately after - * the IA64 cpu_data area. A full page is allocated for the cp_data area for each - * cpu but only a small amout of the page is actually used. We put the SNIA PDA - * in the same page as the cpu_data area. Note that there is a check in the setup - * code to verify that we don't overflow the page. - * - * Seems like we should should cache-line align the pda so that any changes in the - * size of the cpu_data area don't change cache layout. Should we align to 32, 64, 128 - * or 512 boundary. Each has merits. For now, pick 128 but should be revisited later. - */ -DECLARE_PER_CPU(struct pda_s, pda_percpu); - -#define pda (&__ia64_per_cpu_var(pda_percpu)) - -#define pdacpu(cpu) (&per_cpu(pda_percpu, cpu)) - -#endif /* _ASM_IA64_SN_PDA_H */ diff --git a/include/asm-ia64/sn/pic.h b/include/asm-ia64/sn/pic.h deleted file mode 100644 index 5f9da5f..0000000 --- a/include/asm-ia64/sn/pic.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2003 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PCI_PIC_H -#define _ASM_IA64_SN_PCI_PIC_H - -/* - * PIC AS DEVICE ZERO - * ------------------ - * - * PIC handles PCI/X busses. PCI/X requires that the 'bridge' (i.e. PIC) - * be designated as 'device 0'. That is a departure from earlier SGI - * PCI bridges. Because of that we use config space 1 to access the - * config space of the first actual PCI device on the bus. - * Here's what the PIC manual says: - * - * The current PCI-X bus specification now defines that the parent - * hosts bus bridge (PIC for example) must be device 0 on bus 0. PIC - * reduced the total number of devices from 8 to 4 and removed the - * device registers and windows, now only supporting devices 0,1,2, and - * 3. PIC did leave all 8 configuration space windows. The reason was - * there was nothing to gain by removing them. Here in lies the problem. - * The device numbering we do using 0 through 3 is unrelated to the device - * numbering which PCI-X requires in configuration space. In the past we - * correlated Configs pace and our device space 0 <-> 0, 1 <-> 1, etc. - * PCI-X requires we start a 1, not 0 and currently the PX brick - * does associate our: - * - * device 0 with configuration space window 1, - * device 1 with configuration space window 2, - * device 2 with configuration space window 3, - * device 3 with configuration space window 4. - * - * The net effect is that all config space access are off-by-one with - * relation to other per-slot accesses on the PIC. - * Here is a table that shows some of that: - * - * Internal Slot# - * | - * | 0 1 2 3 - * ----------|--------------------------------------- - * config | 0x21000 0x22000 0x23000 0x24000 - * | - * even rrb | 0[0] n/a 1[0] n/a [] == implied even/odd - * | - * odd rrb | n/a 0[1] n/a 1[1] - * | - * int dev | 00 01 10 11 - * | - * ext slot# | 1 2 3 4 - * ----------|--------------------------------------- - */ - -#define PIC_ATE_TARGETID_SHFT 8 -#define PIC_HOST_INTR_ADDR 0x0000FFFFFFFFFFFFUL -#define PIC_PCI64_ATTR_TARG_SHFT 60 - - -/***************************************************************************** - *********************** PIC MMR structure mapping *************************** - *****************************************************************************/ - -/* NOTE: PIC WAR. PV#854697. PIC does not allow writes just to [31:0] - * of a 64-bit register. When writing PIC registers, always write the - * entire 64 bits. - */ - -struct pic { - - /* 0x000000-0x00FFFF -- Local Registers */ - - /* 0x000000-0x000057 -- Standard Widget Configuration */ - u64 p_wid_id; /* 0x000000 */ - u64 p_wid_stat; /* 0x000008 */ - u64 p_wid_err_upper; /* 0x000010 */ - u64 p_wid_err_lower; /* 0x000018 */ - #define p_wid_err p_wid_err_lower - u64 p_wid_control; /* 0x000020 */ - u64 p_wid_req_timeout; /* 0x000028 */ - u64 p_wid_int_upper; /* 0x000030 */ - u64 p_wid_int_lower; /* 0x000038 */ - #define p_wid_int p_wid_int_lower - u64 p_wid_err_cmdword; /* 0x000040 */ - u64 p_wid_llp; /* 0x000048 */ - u64 p_wid_tflush; /* 0x000050 */ - - /* 0x000058-0x00007F -- Bridge-specific Widget Configuration */ - u64 p_wid_aux_err; /* 0x000058 */ - u64 p_wid_resp_upper; /* 0x000060 */ - u64 p_wid_resp_lower; /* 0x000068 */ - #define p_wid_resp p_wid_resp_lower - u64 p_wid_tst_pin_ctrl; /* 0x000070 */ - u64 p_wid_addr_lkerr; /* 0x000078 */ - - /* 0x000080-0x00008F -- PMU & MAP */ - u64 p_dir_map; /* 0x000080 */ - u64 _pad_000088; /* 0x000088 */ - - /* 0x000090-0x00009F -- SSRAM */ - u64 p_map_fault; /* 0x000090 */ - u64 _pad_000098; /* 0x000098 */ - - /* 0x0000A0-0x0000AF -- Arbitration */ - u64 p_arb; /* 0x0000A0 */ - u64 _pad_0000A8; /* 0x0000A8 */ - - /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ - u64 p_ate_parity_err; /* 0x0000B0 */ - u64 _pad_0000B8; /* 0x0000B8 */ - - /* 0x0000C0-0x0000FF -- PCI/GIO */ - u64 p_bus_timeout; /* 0x0000C0 */ - u64 p_pci_cfg; /* 0x0000C8 */ - u64 p_pci_err_upper; /* 0x0000D0 */ - u64 p_pci_err_lower; /* 0x0000D8 */ - #define p_pci_err p_pci_err_lower - u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ - - /* 0x000100-0x0001FF -- Interrupt */ - u64 p_int_status; /* 0x000100 */ - u64 p_int_enable; /* 0x000108 */ - u64 p_int_rst_stat; /* 0x000110 */ - u64 p_int_mode; /* 0x000118 */ - u64 p_int_device; /* 0x000120 */ - u64 p_int_host_err; /* 0x000128 */ - u64 p_int_addr[8]; /* 0x0001{30,,,68} */ - u64 p_err_int_view; /* 0x000170 */ - u64 p_mult_int; /* 0x000178 */ - u64 p_force_always[8]; /* 0x0001{80,,,B8} */ - u64 p_force_pin[8]; /* 0x0001{C0,,,F8} */ - - /* 0x000200-0x000298 -- Device */ - u64 p_device[4]; /* 0x0002{00,,,18} */ - u64 _pad_000220[4]; /* 0x0002{20,,,38} */ - u64 p_wr_req_buf[4]; /* 0x0002{40,,,58} */ - u64 _pad_000260[4]; /* 0x0002{60,,,78} */ - u64 p_rrb_map[2]; /* 0x0002{80,,,88} */ - #define p_even_resp p_rrb_map[0] /* 0x000280 */ - #define p_odd_resp p_rrb_map[1] /* 0x000288 */ - u64 p_resp_status; /* 0x000290 */ - u64 p_resp_clear; /* 0x000298 */ - - u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ - - /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ - struct { - u64 upper; /* 0x0003{00,,,F0} */ - u64 lower; /* 0x0003{08,,,F8} */ - } p_buf_addr_match[16]; - - /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ - struct { - u64 flush_w_touch; /* 0x000{400,,,5C0} */ - u64 flush_wo_touch; /* 0x000{408,,,5C8} */ - u64 inflight; /* 0x000{410,,,5D0} */ - u64 prefetch; /* 0x000{418,,,5D8} */ - u64 total_pci_retry; /* 0x000{420,,,5E0} */ - u64 max_pci_retry; /* 0x000{428,,,5E8} */ - u64 max_latency; /* 0x000{430,,,5F0} */ - u64 clear_all; /* 0x000{438,,,5F8} */ - } p_buf_count[8]; - - - /* 0x000600-0x0009FF -- PCI/X registers */ - u64 p_pcix_bus_err_addr; /* 0x000600 */ - u64 p_pcix_bus_err_attr; /* 0x000608 */ - u64 p_pcix_bus_err_data; /* 0x000610 */ - u64 p_pcix_pio_split_addr; /* 0x000618 */ - u64 p_pcix_pio_split_attr; /* 0x000620 */ - u64 p_pcix_dma_req_err_attr; /* 0x000628 */ - u64 p_pcix_dma_req_err_addr; /* 0x000630 */ - u64 p_pcix_timeout; /* 0x000638 */ - - u64 _pad_000640[120]; /* 0x000{640,,,9F8} */ - - /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ - struct { - u64 p_buf_addr; /* 0x000{A00,,,AF0} */ - u64 p_buf_attr; /* 0X000{A08,,,AF8} */ - } p_pcix_read_buf_64[16]; - - struct { - u64 p_buf_addr; /* 0x000{B00,,,BE0} */ - u64 p_buf_attr; /* 0x000{B08,,,BE8} */ - u64 p_buf_valid; /* 0x000{B10,,,BF0} */ - u64 __pad1; /* 0x000{B18,,,BF8} */ - } p_pcix_write_buf_64[8]; - - /* End of Local Registers -- Start of Address Map space */ - - char _pad_000c00[0x010000 - 0x000c00]; - - /* 0x010000-0x011fff -- Internal ATE RAM (Auto Parity Generation) */ - u64 p_int_ate_ram[1024]; /* 0x010000-0x011fff */ - - /* 0x012000-0x013fff -- Internal ATE RAM (Manual Parity Generation) */ - u64 p_int_ate_ram_mp[1024]; /* 0x012000-0x013fff */ - - char _pad_014000[0x18000 - 0x014000]; - - /* 0x18000-0x197F8 -- PIC Write Request Ram */ - u64 p_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ - u64 p_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ - u64 p_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ - - char _pad_019800[0x20000 - 0x019800]; - - /* 0x020000-0x027FFF -- PCI Device Configuration Spaces */ - union { - u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ - u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ - u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ - u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ - union { - u8 c[0x100 / 1]; - u16 s[0x100 / 2]; - u32 l[0x100 / 4]; - u64 d[0x100 / 8]; - } f[8]; - } p_type0_cfg_dev[8]; /* 0x02{0000,,,7FFF} */ - - /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ - union { - u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ - u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ - u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ - u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ - union { - u8 c[0x100 / 1]; - u16 s[0x100 / 2]; - u32 l[0x100 / 4]; - u64 d[0x100 / 8]; - } f[8]; - } p_type1_cfg; /* 0x028000-0x029000 */ - - char _pad_029000[0x030000-0x029000]; - - /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ - union { - u8 c[8 / 1]; - u16 s[8 / 2]; - u32 l[8 / 4]; - u64 d[8 / 8]; - } p_pci_iack; /* 0x030000-0x030007 */ - - char _pad_030007[0x040000-0x030008]; - - /* 0x040000-0x030007 -- PCIX Special Cycle */ - union { - u8 c[8 / 1]; - u16 s[8 / 2]; - u32 l[8 / 4]; - u64 d[8 / 8]; - } p_pcix_cycle; /* 0x040000-0x040007 */ -}; - -#endif /* _ASM_IA64_SN_PCI_PIC_H */ diff --git a/include/asm-ia64/sn/rw_mmr.h b/include/asm-ia64/sn/rw_mmr.h deleted file mode 100644 index 2d78f4c..0000000 --- a/include/asm-ia64/sn/rw_mmr.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002-2006 Silicon Graphics, Inc. All Rights Reserved. - */ -#ifndef _ASM_IA64_SN_RW_MMR_H -#define _ASM_IA64_SN_RW_MMR_H - - -/* - * This file that access MMRs via uncached physical addresses. - * pio_phys_read_mmr - read an MMR - * pio_phys_write_mmr - write an MMR - * pio_atomic_phys_write_mmrs - atomically write 1 or 2 MMRs with psr.ic=0 - * Second MMR will be skipped if address is NULL - * - * Addresses passed to these routines should be uncached physical addresses - * ie., 0x80000.... - */ - - -extern long pio_phys_read_mmr(volatile long *mmr); -extern void pio_phys_write_mmr(volatile long *mmr, long val); -extern void pio_atomic_phys_write_mmrs(volatile long *mmr1, long val1, volatile long *mmr2, long val2); - -#endif /* _ASM_IA64_SN_RW_MMR_H */ diff --git a/include/asm-ia64/sn/shub_mmr.h b/include/asm-ia64/sn/shub_mmr.h deleted file mode 100644 index 7de1d1d..0000000 --- a/include/asm-ia64/sn/shub_mmr.h +++ /dev/null @@ -1,502 +0,0 @@ -/* - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2001-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_SHUB_MMR_H -#define _ASM_IA64_SN_SHUB_MMR_H - -/* ==================================================================== */ -/* Register "SH_IPI_INT" */ -/* SHub Inter-Processor Interrupt Registers */ -/* ==================================================================== */ -#define SH1_IPI_INT __IA64_UL_CONST(0x0000000110000380) -#define SH2_IPI_INT __IA64_UL_CONST(0x0000000010000380) - -/* SH_IPI_INT_TYPE */ -/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ -#define SH_IPI_INT_TYPE_SHFT 0 -#define SH_IPI_INT_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) - -/* SH_IPI_INT_AGT */ -/* Description: Agent, must be 0 for SHub */ -#define SH_IPI_INT_AGT_SHFT 3 -#define SH_IPI_INT_AGT_MASK __IA64_UL_CONST(0x0000000000000008) - -/* SH_IPI_INT_PID */ -/* Description: Processor ID, same setting as on targeted McKinley */ -#define SH_IPI_INT_PID_SHFT 4 -#define SH_IPI_INT_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) - -/* SH_IPI_INT_BASE */ -/* Description: Optional interrupt vector area, 2MB aligned */ -#define SH_IPI_INT_BASE_SHFT 21 -#define SH_IPI_INT_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) - -/* SH_IPI_INT_IDX */ -/* Description: Targeted McKinley interrupt vector */ -#define SH_IPI_INT_IDX_SHFT 52 -#define SH_IPI_INT_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) - -/* SH_IPI_INT_SEND */ -/* Description: Send Interrupt Message to PI, This generates a puls */ -#define SH_IPI_INT_SEND_SHFT 63 -#define SH_IPI_INT_SEND_MASK __IA64_UL_CONST(0x8000000000000000) - -/* ==================================================================== */ -/* Register "SH_EVENT_OCCURRED" */ -/* SHub Interrupt Event Occurred */ -/* ==================================================================== */ -#define SH1_EVENT_OCCURRED __IA64_UL_CONST(0x0000000110010000) -#define SH1_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000110010008) -#define SH2_EVENT_OCCURRED __IA64_UL_CONST(0x0000000010010000) -#define SH2_EVENT_OCCURRED_ALIAS __IA64_UL_CONST(0x0000000010010008) - -/* ==================================================================== */ -/* Register "SH_PI_CAM_CONTROL" */ -/* CRB CAM MMR Access Control */ -/* ==================================================================== */ -#define SH1_PI_CAM_CONTROL __IA64_UL_CONST(0x0000000120050300) - -/* ==================================================================== */ -/* Register "SH_SHUB_ID" */ -/* SHub ID Number */ -/* ==================================================================== */ -#define SH1_SHUB_ID __IA64_UL_CONST(0x0000000110060580) -#define SH1_SHUB_ID_REVISION_SHFT 28 -#define SH1_SHUB_ID_REVISION_MASK __IA64_UL_CONST(0x00000000f0000000) - -/* ==================================================================== */ -/* Register "SH_RTC" */ -/* Real-time Clock */ -/* ==================================================================== */ -#define SH1_RTC __IA64_UL_CONST(0x00000001101c0000) -#define SH2_RTC __IA64_UL_CONST(0x00000002101c0000) -#define SH_RTC_MASK __IA64_UL_CONST(0x007fffffffffffff) - -/* ==================================================================== */ -/* Register "SH_PIO_WRITE_STATUS_0|1" */ -/* PIO Write Status for CPU 0 & 1 */ -/* ==================================================================== */ -#define SH1_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000120070200) -#define SH1_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000120070280) -#define SH2_PIO_WRITE_STATUS_0 __IA64_UL_CONST(0x0000000020070200) -#define SH2_PIO_WRITE_STATUS_1 __IA64_UL_CONST(0x0000000020070280) -#define SH2_PIO_WRITE_STATUS_2 __IA64_UL_CONST(0x0000000020070300) -#define SH2_PIO_WRITE_STATUS_3 __IA64_UL_CONST(0x0000000020070380) - -/* SH_PIO_WRITE_STATUS_0_WRITE_DEADLOCK */ -/* Description: Deadlock response detected */ -#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT 1 -#define SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK \ - __IA64_UL_CONST(0x0000000000000002) - -/* SH_PIO_WRITE_STATUS_0_PENDING_WRITE_COUNT */ -/* Description: Count of currently pending PIO writes */ -#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_SHFT 56 -#define SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK \ - __IA64_UL_CONST(0x3f00000000000000) - -/* ==================================================================== */ -/* Register "SH_PIO_WRITE_STATUS_0_ALIAS" */ -/* ==================================================================== */ -#define SH1_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000120070208) -#define SH2_PIO_WRITE_STATUS_0_ALIAS __IA64_UL_CONST(0x0000000020070208) - -/* ==================================================================== */ -/* Register "SH_EVENT_OCCURRED" */ -/* SHub Interrupt Event Occurred */ -/* ==================================================================== */ -/* SH_EVENT_OCCURRED_UART_INT */ -/* Description: Pending Junk Bus UART Interrupt */ -#define SH_EVENT_OCCURRED_UART_INT_SHFT 20 -#define SH_EVENT_OCCURRED_UART_INT_MASK __IA64_UL_CONST(0x0000000000100000) - -/* SH_EVENT_OCCURRED_IPI_INT */ -/* Description: Pending IPI Interrupt */ -#define SH_EVENT_OCCURRED_IPI_INT_SHFT 28 -#define SH_EVENT_OCCURRED_IPI_INT_MASK __IA64_UL_CONST(0x0000000010000000) - -/* SH_EVENT_OCCURRED_II_INT0 */ -/* Description: Pending II 0 Interrupt */ -#define SH_EVENT_OCCURRED_II_INT0_SHFT 29 -#define SH_EVENT_OCCURRED_II_INT0_MASK __IA64_UL_CONST(0x0000000020000000) - -/* SH_EVENT_OCCURRED_II_INT1 */ -/* Description: Pending II 1 Interrupt */ -#define SH_EVENT_OCCURRED_II_INT1_SHFT 30 -#define SH_EVENT_OCCURRED_II_INT1_MASK __IA64_UL_CONST(0x0000000040000000) - -/* SH2_EVENT_OCCURRED_EXTIO_INT2 */ -/* Description: Pending SHUB 2 EXT IO INT2 */ -#define SH2_EVENT_OCCURRED_EXTIO_INT2_SHFT 33 -#define SH2_EVENT_OCCURRED_EXTIO_INT2_MASK __IA64_UL_CONST(0x0000000200000000) - -/* SH2_EVENT_OCCURRED_EXTIO_INT3 */ -/* Description: Pending SHUB 2 EXT IO INT3 */ -#define SH2_EVENT_OCCURRED_EXTIO_INT3_SHFT 34 -#define SH2_EVENT_OCCURRED_EXTIO_INT3_MASK __IA64_UL_CONST(0x0000000400000000) - -#define SH_ALL_INT_MASK \ - (SH_EVENT_OCCURRED_UART_INT_MASK | SH_EVENT_OCCURRED_IPI_INT_MASK | \ - SH_EVENT_OCCURRED_II_INT0_MASK | SH_EVENT_OCCURRED_II_INT1_MASK | \ - SH_EVENT_OCCURRED_II_INT1_MASK | SH2_EVENT_OCCURRED_EXTIO_INT2_MASK | \ - SH2_EVENT_OCCURRED_EXTIO_INT3_MASK) - - -/* ==================================================================== */ -/* LEDS */ -/* ==================================================================== */ -#define SH1_REAL_JUNK_BUS_LED0 0x7fed00000UL -#define SH1_REAL_JUNK_BUS_LED1 0x7fed10000UL -#define SH1_REAL_JUNK_BUS_LED2 0x7fed20000UL -#define SH1_REAL_JUNK_BUS_LED3 0x7fed30000UL - -#define SH2_REAL_JUNK_BUS_LED0 0xf0000000UL -#define SH2_REAL_JUNK_BUS_LED1 0xf0010000UL -#define SH2_REAL_JUNK_BUS_LED2 0xf0020000UL -#define SH2_REAL_JUNK_BUS_LED3 0xf0030000UL - -/* ==================================================================== */ -/* Register "SH1_PTC_0" */ -/* Puge Translation Cache Message Configuration Information */ -/* ==================================================================== */ -#define SH1_PTC_0 __IA64_UL_CONST(0x00000001101a0000) - -/* SH1_PTC_0_A */ -/* Description: Type */ -#define SH1_PTC_0_A_SHFT 0 - -/* SH1_PTC_0_PS */ -/* Description: Page Size */ -#define SH1_PTC_0_PS_SHFT 2 - -/* SH1_PTC_0_RID */ -/* Description: Region ID */ -#define SH1_PTC_0_RID_SHFT 8 - -/* SH1_PTC_0_START */ -/* Description: Start */ -#define SH1_PTC_0_START_SHFT 63 - -/* ==================================================================== */ -/* Register "SH1_PTC_1" */ -/* Puge Translation Cache Message Configuration Information */ -/* ==================================================================== */ -#define SH1_PTC_1 __IA64_UL_CONST(0x00000001101a0080) - -/* SH1_PTC_1_START */ -/* Description: PTC_1 Start */ -#define SH1_PTC_1_START_SHFT 63 - -/* ==================================================================== */ -/* Register "SH2_PTC" */ -/* Puge Translation Cache Message Configuration Information */ -/* ==================================================================== */ -#define SH2_PTC __IA64_UL_CONST(0x0000000170000000) - -/* SH2_PTC_A */ -/* Description: Type */ -#define SH2_PTC_A_SHFT 0 - -/* SH2_PTC_PS */ -/* Description: Page Size */ -#define SH2_PTC_PS_SHFT 2 - -/* SH2_PTC_RID */ -/* Description: Region ID */ -#define SH2_PTC_RID_SHFT 4 - -/* SH2_PTC_START */ -/* Description: Start */ -#define SH2_PTC_START_SHFT 63 - -/* SH2_PTC_ADDR_RID */ -/* Description: Region ID */ -#define SH2_PTC_ADDR_SHFT 4 -#define SH2_PTC_ADDR_MASK __IA64_UL_CONST(0x1ffffffffffff000) - -/* ==================================================================== */ -/* Register "SH_RTC1_INT_CONFIG" */ -/* SHub RTC 1 Interrupt Config Registers */ -/* ==================================================================== */ - -#define SH1_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000110001480) -#define SH2_RTC1_INT_CONFIG __IA64_UL_CONST(0x0000000010001480) -#define SH_RTC1_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) -#define SH_RTC1_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC1_INT_CONFIG_TYPE */ -/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ -#define SH_RTC1_INT_CONFIG_TYPE_SHFT 0 -#define SH_RTC1_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) - -/* SH_RTC1_INT_CONFIG_AGT */ -/* Description: Agent, must be 0 for SHub */ -#define SH_RTC1_INT_CONFIG_AGT_SHFT 3 -#define SH_RTC1_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) - -/* SH_RTC1_INT_CONFIG_PID */ -/* Description: Processor ID, same setting as on targeted McKinley */ -#define SH_RTC1_INT_CONFIG_PID_SHFT 4 -#define SH_RTC1_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) - -/* SH_RTC1_INT_CONFIG_BASE */ -/* Description: Optional interrupt vector area, 2MB aligned */ -#define SH_RTC1_INT_CONFIG_BASE_SHFT 21 -#define SH_RTC1_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) - -/* SH_RTC1_INT_CONFIG_IDX */ -/* Description: Targeted McKinley interrupt vector */ -#define SH_RTC1_INT_CONFIG_IDX_SHFT 52 -#define SH_RTC1_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) - -/* ==================================================================== */ -/* Register "SH_RTC1_INT_ENABLE" */ -/* SHub RTC 1 Interrupt Enable Registers */ -/* ==================================================================== */ - -#define SH1_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000110001500) -#define SH2_RTC1_INT_ENABLE __IA64_UL_CONST(0x0000000010001500) -#define SH_RTC1_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) -#define SH_RTC1_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC1_INT_ENABLE_RTC1_ENABLE */ -/* Description: Enable RTC 1 Interrupt */ -#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_SHFT 0 -#define SH_RTC1_INT_ENABLE_RTC1_ENABLE_MASK \ - __IA64_UL_CONST(0x0000000000000001) - -/* ==================================================================== */ -/* Register "SH_RTC2_INT_CONFIG" */ -/* SHub RTC 2 Interrupt Config Registers */ -/* ==================================================================== */ - -#define SH1_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000110001580) -#define SH2_RTC2_INT_CONFIG __IA64_UL_CONST(0x0000000010001580) -#define SH_RTC2_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) -#define SH_RTC2_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC2_INT_CONFIG_TYPE */ -/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ -#define SH_RTC2_INT_CONFIG_TYPE_SHFT 0 -#define SH_RTC2_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) - -/* SH_RTC2_INT_CONFIG_AGT */ -/* Description: Agent, must be 0 for SHub */ -#define SH_RTC2_INT_CONFIG_AGT_SHFT 3 -#define SH_RTC2_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) - -/* SH_RTC2_INT_CONFIG_PID */ -/* Description: Processor ID, same setting as on targeted McKinley */ -#define SH_RTC2_INT_CONFIG_PID_SHFT 4 -#define SH_RTC2_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) - -/* SH_RTC2_INT_CONFIG_BASE */ -/* Description: Optional interrupt vector area, 2MB aligned */ -#define SH_RTC2_INT_CONFIG_BASE_SHFT 21 -#define SH_RTC2_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) - -/* SH_RTC2_INT_CONFIG_IDX */ -/* Description: Targeted McKinley interrupt vector */ -#define SH_RTC2_INT_CONFIG_IDX_SHFT 52 -#define SH_RTC2_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) - -/* ==================================================================== */ -/* Register "SH_RTC2_INT_ENABLE" */ -/* SHub RTC 2 Interrupt Enable Registers */ -/* ==================================================================== */ - -#define SH1_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000110001600) -#define SH2_RTC2_INT_ENABLE __IA64_UL_CONST(0x0000000010001600) -#define SH_RTC2_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) -#define SH_RTC2_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC2_INT_ENABLE_RTC2_ENABLE */ -/* Description: Enable RTC 2 Interrupt */ -#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_SHFT 0 -#define SH_RTC2_INT_ENABLE_RTC2_ENABLE_MASK \ - __IA64_UL_CONST(0x0000000000000001) - -/* ==================================================================== */ -/* Register "SH_RTC3_INT_CONFIG" */ -/* SHub RTC 3 Interrupt Config Registers */ -/* ==================================================================== */ - -#define SH1_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000110001680) -#define SH2_RTC3_INT_CONFIG __IA64_UL_CONST(0x0000000010001680) -#define SH_RTC3_INT_CONFIG_MASK __IA64_UL_CONST(0x0ff3ffffffefffff) -#define SH_RTC3_INT_CONFIG_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC3_INT_CONFIG_TYPE */ -/* Description: Type of Interrupt: 0=INT, 2=PMI, 4=NMI, 5=INIT */ -#define SH_RTC3_INT_CONFIG_TYPE_SHFT 0 -#define SH_RTC3_INT_CONFIG_TYPE_MASK __IA64_UL_CONST(0x0000000000000007) - -/* SH_RTC3_INT_CONFIG_AGT */ -/* Description: Agent, must be 0 for SHub */ -#define SH_RTC3_INT_CONFIG_AGT_SHFT 3 -#define SH_RTC3_INT_CONFIG_AGT_MASK __IA64_UL_CONST(0x0000000000000008) - -/* SH_RTC3_INT_CONFIG_PID */ -/* Description: Processor ID, same setting as on targeted McKinley */ -#define SH_RTC3_INT_CONFIG_PID_SHFT 4 -#define SH_RTC3_INT_CONFIG_PID_MASK __IA64_UL_CONST(0x00000000000ffff0) - -/* SH_RTC3_INT_CONFIG_BASE */ -/* Description: Optional interrupt vector area, 2MB aligned */ -#define SH_RTC3_INT_CONFIG_BASE_SHFT 21 -#define SH_RTC3_INT_CONFIG_BASE_MASK __IA64_UL_CONST(0x0003ffffffe00000) - -/* SH_RTC3_INT_CONFIG_IDX */ -/* Description: Targeted McKinley interrupt vector */ -#define SH_RTC3_INT_CONFIG_IDX_SHFT 52 -#define SH_RTC3_INT_CONFIG_IDX_MASK __IA64_UL_CONST(0x0ff0000000000000) - -/* ==================================================================== */ -/* Register "SH_RTC3_INT_ENABLE" */ -/* SHub RTC 3 Interrupt Enable Registers */ -/* ==================================================================== */ - -#define SH1_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000110001700) -#define SH2_RTC3_INT_ENABLE __IA64_UL_CONST(0x0000000010001700) -#define SH_RTC3_INT_ENABLE_MASK __IA64_UL_CONST(0x0000000000000001) -#define SH_RTC3_INT_ENABLE_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_RTC3_INT_ENABLE_RTC3_ENABLE */ -/* Description: Enable RTC 3 Interrupt */ -#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_SHFT 0 -#define SH_RTC3_INT_ENABLE_RTC3_ENABLE_MASK \ - __IA64_UL_CONST(0x0000000000000001) - -/* SH_EVENT_OCCURRED_RTC1_INT */ -/* Description: Pending RTC 1 Interrupt */ -#define SH_EVENT_OCCURRED_RTC1_INT_SHFT 24 -#define SH_EVENT_OCCURRED_RTC1_INT_MASK __IA64_UL_CONST(0x0000000001000000) - -/* SH_EVENT_OCCURRED_RTC2_INT */ -/* Description: Pending RTC 2 Interrupt */ -#define SH_EVENT_OCCURRED_RTC2_INT_SHFT 25 -#define SH_EVENT_OCCURRED_RTC2_INT_MASK __IA64_UL_CONST(0x0000000002000000) - -/* SH_EVENT_OCCURRED_RTC3_INT */ -/* Description: Pending RTC 3 Interrupt */ -#define SH_EVENT_OCCURRED_RTC3_INT_SHFT 26 -#define SH_EVENT_OCCURRED_RTC3_INT_MASK __IA64_UL_CONST(0x0000000004000000) - -/* ==================================================================== */ -/* Register "SH_IPI_ACCESS" */ -/* CPU interrupt Access Permission Bits */ -/* ==================================================================== */ - -#define SH1_IPI_ACCESS __IA64_UL_CONST(0x0000000110060480) -#define SH2_IPI_ACCESS0 __IA64_UL_CONST(0x0000000010060c00) -#define SH2_IPI_ACCESS1 __IA64_UL_CONST(0x0000000010060c80) -#define SH2_IPI_ACCESS2 __IA64_UL_CONST(0x0000000010060d00) -#define SH2_IPI_ACCESS3 __IA64_UL_CONST(0x0000000010060d80) - -/* ==================================================================== */ -/* Register "SH_INT_CMPB" */ -/* RTC Compare Value for Processor B */ -/* ==================================================================== */ - -#define SH1_INT_CMPB __IA64_UL_CONST(0x00000001101b0080) -#define SH2_INT_CMPB __IA64_UL_CONST(0x00000000101b0080) -#define SH_INT_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff) -#define SH_INT_CMPB_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_INT_CMPB_REAL_TIME_CMPB */ -/* Description: Real Time Clock Compare */ -#define SH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 -#define SH_INT_CMPB_REAL_TIME_CMPB_MASK __IA64_UL_CONST(0x007fffffffffffff) - -/* ==================================================================== */ -/* Register "SH_INT_CMPC" */ -/* RTC Compare Value for Processor C */ -/* ==================================================================== */ - -#define SH1_INT_CMPC __IA64_UL_CONST(0x00000001101b0100) -#define SH2_INT_CMPC __IA64_UL_CONST(0x00000000101b0100) -#define SH_INT_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff) -#define SH_INT_CMPC_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_INT_CMPC_REAL_TIME_CMPC */ -/* Description: Real Time Clock Compare */ -#define SH_INT_CMPC_REAL_TIME_CMPC_SHFT 0 -#define SH_INT_CMPC_REAL_TIME_CMPC_MASK __IA64_UL_CONST(0x007fffffffffffff) - -/* ==================================================================== */ -/* Register "SH_INT_CMPD" */ -/* RTC Compare Value for Processor D */ -/* ==================================================================== */ - -#define SH1_INT_CMPD __IA64_UL_CONST(0x00000001101b0180) -#define SH2_INT_CMPD __IA64_UL_CONST(0x00000000101b0180) -#define SH_INT_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff) -#define SH_INT_CMPD_INIT __IA64_UL_CONST(0x0000000000000000) - -/* SH_INT_CMPD_REAL_TIME_CMPD */ -/* Description: Real Time Clock Compare */ -#define SH_INT_CMPD_REAL_TIME_CMPD_SHFT 0 -#define SH_INT_CMPD_REAL_TIME_CMPD_MASK __IA64_UL_CONST(0x007fffffffffffff) - -/* ==================================================================== */ -/* Register "SH_MD_DQLP_MMR_DIR_PRIVEC0" */ -/* privilege vector for acc=0 */ -/* ==================================================================== */ -#define SH1_MD_DQLP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100030300) - -/* ==================================================================== */ -/* Register "SH_MD_DQRP_MMR_DIR_PRIVEC0" */ -/* privilege vector for acc=0 */ -/* ==================================================================== */ -#define SH1_MD_DQRP_MMR_DIR_PRIVEC0 __IA64_UL_CONST(0x0000000100050300) - -/* ==================================================================== */ -/* Some MMRs are functionally identical (or close enough) on both SHUB1 */ -/* and SHUB2 that it makes sense to define a geberic name for the MMR. */ -/* It is acceptible to use (for example) SH_IPI_INT to reference the */ -/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */ -/* on the type of the SHUB. Do not use these #defines in performance */ -/* critical code or loops - there is a small performance penalty. */ -/* ==================================================================== */ -#define shubmmr(a,b) (is_shub2() ? a##2_##b : a##1_##b) - -#define SH_REAL_JUNK_BUS_LED0 shubmmr(SH, REAL_JUNK_BUS_LED0) -#define SH_IPI_INT shubmmr(SH, IPI_INT) -#define SH_EVENT_OCCURRED shubmmr(SH, EVENT_OCCURRED) -#define SH_EVENT_OCCURRED_ALIAS shubmmr(SH, EVENT_OCCURRED_ALIAS) -#define SH_RTC shubmmr(SH, RTC) -#define SH_RTC1_INT_CONFIG shubmmr(SH, RTC1_INT_CONFIG) -#define SH_RTC1_INT_ENABLE shubmmr(SH, RTC1_INT_ENABLE) -#define SH_RTC2_INT_CONFIG shubmmr(SH, RTC2_INT_CONFIG) -#define SH_RTC2_INT_ENABLE shubmmr(SH, RTC2_INT_ENABLE) -#define SH_RTC3_INT_CONFIG shubmmr(SH, RTC3_INT_CONFIG) -#define SH_RTC3_INT_ENABLE shubmmr(SH, RTC3_INT_ENABLE) -#define SH_INT_CMPB shubmmr(SH, INT_CMPB) -#define SH_INT_CMPC shubmmr(SH, INT_CMPC) -#define SH_INT_CMPD shubmmr(SH, INT_CMPD) - -/* ========================================================================== */ -/* Register "SH2_BT_ENG_CSR_0" */ -/* Engine 0 Control and Status Register */ -/* ========================================================================== */ - -#define SH2_BT_ENG_CSR_0 __IA64_UL_CONST(0x0000000030040000) -#define SH2_BT_ENG_SRC_ADDR_0 __IA64_UL_CONST(0x0000000030040080) -#define SH2_BT_ENG_DEST_ADDR_0 __IA64_UL_CONST(0x0000000030040100) -#define SH2_BT_ENG_NOTIF_ADDR_0 __IA64_UL_CONST(0x0000000030040180) - -/* ========================================================================== */ -/* BTE interfaces 1-3 */ -/* ========================================================================== */ - -#define SH2_BT_ENG_CSR_1 __IA64_UL_CONST(0x0000000030050000) -#define SH2_BT_ENG_CSR_2 __IA64_UL_CONST(0x0000000030060000) -#define SH2_BT_ENG_CSR_3 __IA64_UL_CONST(0x0000000030070000) - -#endif /* _ASM_IA64_SN_SHUB_MMR_H */ diff --git a/include/asm-ia64/sn/shubio.h b/include/asm-ia64/sn/shubio.h deleted file mode 100644 index 22a6f18..0000000 --- a/include/asm-ia64/sn/shubio.h +++ /dev/null @@ -1,3358 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_SHUBIO_H -#define _ASM_IA64_SN_SHUBIO_H - -#define HUB_WIDGET_ID_MAX 0xf -#define IIO_NUM_ITTES 7 -#define HUB_NUM_BIG_WINDOW (IIO_NUM_ITTES - 1) - -#define IIO_WID 0x00400000 /* Crosstalk Widget Identification */ - /* This register is also accessible from - * Crosstalk at address 0x0. */ -#define IIO_WSTAT 0x00400008 /* Crosstalk Widget Status */ -#define IIO_WCR 0x00400020 /* Crosstalk Widget Control Register */ -#define IIO_ILAPR 0x00400100 /* IO Local Access Protection Register */ -#define IIO_ILAPO 0x00400108 /* IO Local Access Protection Override */ -#define IIO_IOWA 0x00400110 /* IO Outbound Widget Access */ -#define IIO_IIWA 0x00400118 /* IO Inbound Widget Access */ -#define IIO_IIDEM 0x00400120 /* IO Inbound Device Error Mask */ -#define IIO_ILCSR 0x00400128 /* IO LLP Control and Status Register */ -#define IIO_ILLR 0x00400130 /* IO LLP Log Register */ -#define IIO_IIDSR 0x00400138 /* IO Interrupt Destination */ - -#define IIO_IGFX0 0x00400140 /* IO Graphics Node-Widget Map 0 */ -#define IIO_IGFX1 0x00400148 /* IO Graphics Node-Widget Map 1 */ - -#define IIO_ISCR0 0x00400150 /* IO Scratch Register 0 */ -#define IIO_ISCR1 0x00400158 /* IO Scratch Register 1 */ - -#define IIO_ITTE1 0x00400160 /* IO Translation Table Entry 1 */ -#define IIO_ITTE2 0x00400168 /* IO Translation Table Entry 2 */ -#define IIO_ITTE3 0x00400170 /* IO Translation Table Entry 3 */ -#define IIO_ITTE4 0x00400178 /* IO Translation Table Entry 4 */ -#define IIO_ITTE5 0x00400180 /* IO Translation Table Entry 5 */ -#define IIO_ITTE6 0x00400188 /* IO Translation Table Entry 6 */ -#define IIO_ITTE7 0x00400190 /* IO Translation Table Entry 7 */ - -#define IIO_IPRB0 0x00400198 /* IO PRB Entry 0 */ -#define IIO_IPRB8 0x004001A0 /* IO PRB Entry 8 */ -#define IIO_IPRB9 0x004001A8 /* IO PRB Entry 9 */ -#define IIO_IPRBA 0x004001B0 /* IO PRB Entry A */ -#define IIO_IPRBB 0x004001B8 /* IO PRB Entry B */ -#define IIO_IPRBC 0x004001C0 /* IO PRB Entry C */ -#define IIO_IPRBD 0x004001C8 /* IO PRB Entry D */ -#define IIO_IPRBE 0x004001D0 /* IO PRB Entry E */ -#define IIO_IPRBF 0x004001D8 /* IO PRB Entry F */ - -#define IIO_IXCC 0x004001E0 /* IO Crosstalk Credit Count Timeout */ -#define IIO_IMEM 0x004001E8 /* IO Miscellaneous Error Mask */ -#define IIO_IXTT 0x004001F0 /* IO Crosstalk Timeout Threshold */ -#define IIO_IECLR 0x004001F8 /* IO Error Clear Register */ -#define IIO_IBCR 0x00400200 /* IO BTE Control Register */ - -#define IIO_IXSM 0x00400208 /* IO Crosstalk Spurious Message */ -#define IIO_IXSS 0x00400210 /* IO Crosstalk Spurious Sideband */ - -#define IIO_ILCT 0x00400218 /* IO LLP Channel Test */ - -#define IIO_IIEPH1 0x00400220 /* IO Incoming Error Packet Header, Part 1 */ -#define IIO_IIEPH2 0x00400228 /* IO Incoming Error Packet Header, Part 2 */ - -#define IIO_ISLAPR 0x00400230 /* IO SXB Local Access Protection Regster */ -#define IIO_ISLAPO 0x00400238 /* IO SXB Local Access Protection Override */ - -#define IIO_IWI 0x00400240 /* IO Wrapper Interrupt Register */ -#define IIO_IWEL 0x00400248 /* IO Wrapper Error Log Register */ -#define IIO_IWC 0x00400250 /* IO Wrapper Control Register */ -#define IIO_IWS 0x00400258 /* IO Wrapper Status Register */ -#define IIO_IWEIM 0x00400260 /* IO Wrapper Error Interrupt Masking Register */ - -#define IIO_IPCA 0x00400300 /* IO PRB Counter Adjust */ - -#define IIO_IPRTE0_A 0x00400308 /* IO PIO Read Address Table Entry 0, Part A */ -#define IIO_IPRTE1_A 0x00400310 /* IO PIO Read Address Table Entry 1, Part A */ -#define IIO_IPRTE2_A 0x00400318 /* IO PIO Read Address Table Entry 2, Part A */ -#define IIO_IPRTE3_A 0x00400320 /* IO PIO Read Address Table Entry 3, Part A */ -#define IIO_IPRTE4_A 0x00400328 /* IO PIO Read Address Table Entry 4, Part A */ -#define IIO_IPRTE5_A 0x00400330 /* IO PIO Read Address Table Entry 5, Part A */ -#define IIO_IPRTE6_A 0x00400338 /* IO PIO Read Address Table Entry 6, Part A */ -#define IIO_IPRTE7_A 0x00400340 /* IO PIO Read Address Table Entry 7, Part A */ - -#define IIO_IPRTE0_B 0x00400348 /* IO PIO Read Address Table Entry 0, Part B */ -#define IIO_IPRTE1_B 0x00400350 /* IO PIO Read Address Table Entry 1, Part B */ -#define IIO_IPRTE2_B 0x00400358 /* IO PIO Read Address Table Entry 2, Part B */ -#define IIO_IPRTE3_B 0x00400360 /* IO PIO Read Address Table Entry 3, Part B */ -#define IIO_IPRTE4_B 0x00400368 /* IO PIO Read Address Table Entry 4, Part B */ -#define IIO_IPRTE5_B 0x00400370 /* IO PIO Read Address Table Entry 5, Part B */ -#define IIO_IPRTE6_B 0x00400378 /* IO PIO Read Address Table Entry 6, Part B */ -#define IIO_IPRTE7_B 0x00400380 /* IO PIO Read Address Table Entry 7, Part B */ - -#define IIO_IPDR 0x00400388 /* IO PIO Deallocation Register */ -#define IIO_ICDR 0x00400390 /* IO CRB Entry Deallocation Register */ -#define IIO_IFDR 0x00400398 /* IO IOQ FIFO Depth Register */ -#define IIO_IIAP 0x004003A0 /* IO IIQ Arbitration Parameters */ -#define IIO_ICMR 0x004003A8 /* IO CRB Management Register */ -#define IIO_ICCR 0x004003B0 /* IO CRB Control Register */ -#define IIO_ICTO 0x004003B8 /* IO CRB Timeout */ -#define IIO_ICTP 0x004003C0 /* IO CRB Timeout Prescalar */ - -#define IIO_ICRB0_A 0x00400400 /* IO CRB Entry 0_A */ -#define IIO_ICRB0_B 0x00400408 /* IO CRB Entry 0_B */ -#define IIO_ICRB0_C 0x00400410 /* IO CRB Entry 0_C */ -#define IIO_ICRB0_D 0x00400418 /* IO CRB Entry 0_D */ -#define IIO_ICRB0_E 0x00400420 /* IO CRB Entry 0_E */ - -#define IIO_ICRB1_A 0x00400430 /* IO CRB Entry 1_A */ -#define IIO_ICRB1_B 0x00400438 /* IO CRB Entry 1_B */ -#define IIO_ICRB1_C 0x00400440 /* IO CRB Entry 1_C */ -#define IIO_ICRB1_D 0x00400448 /* IO CRB Entry 1_D */ -#define IIO_ICRB1_E 0x00400450 /* IO CRB Entry 1_E */ - -#define IIO_ICRB2_A 0x00400460 /* IO CRB Entry 2_A */ -#define IIO_ICRB2_B 0x00400468 /* IO CRB Entry 2_B */ -#define IIO_ICRB2_C 0x00400470 /* IO CRB Entry 2_C */ -#define IIO_ICRB2_D 0x00400478 /* IO CRB Entry 2_D */ -#define IIO_ICRB2_E 0x00400480 /* IO CRB Entry 2_E */ - -#define IIO_ICRB3_A 0x00400490 /* IO CRB Entry 3_A */ -#define IIO_ICRB3_B 0x00400498 /* IO CRB Entry 3_B */ -#define IIO_ICRB3_C 0x004004a0 /* IO CRB Entry 3_C */ -#define IIO_ICRB3_D 0x004004a8 /* IO CRB Entry 3_D */ -#define IIO_ICRB3_E 0x004004b0 /* IO CRB Entry 3_E */ - -#define IIO_ICRB4_A 0x004004c0 /* IO CRB Entry 4_A */ -#define IIO_ICRB4_B 0x004004c8 /* IO CRB Entry 4_B */ -#define IIO_ICRB4_C 0x004004d0 /* IO CRB Entry 4_C */ -#define IIO_ICRB4_D 0x004004d8 /* IO CRB Entry 4_D */ -#define IIO_ICRB4_E 0x004004e0 /* IO CRB Entry 4_E */ - -#define IIO_ICRB5_A 0x004004f0 /* IO CRB Entry 5_A */ -#define IIO_ICRB5_B 0x004004f8 /* IO CRB Entry 5_B */ -#define IIO_ICRB5_C 0x00400500 /* IO CRB Entry 5_C */ -#define IIO_ICRB5_D 0x00400508 /* IO CRB Entry 5_D */ -#define IIO_ICRB5_E 0x00400510 /* IO CRB Entry 5_E */ - -#define IIO_ICRB6_A 0x00400520 /* IO CRB Entry 6_A */ -#define IIO_ICRB6_B 0x00400528 /* IO CRB Entry 6_B */ -#define IIO_ICRB6_C 0x00400530 /* IO CRB Entry 6_C */ -#define IIO_ICRB6_D 0x00400538 /* IO CRB Entry 6_D */ -#define IIO_ICRB6_E 0x00400540 /* IO CRB Entry 6_E */ - -#define IIO_ICRB7_A 0x00400550 /* IO CRB Entry 7_A */ -#define IIO_ICRB7_B 0x00400558 /* IO CRB Entry 7_B */ -#define IIO_ICRB7_C 0x00400560 /* IO CRB Entry 7_C */ -#define IIO_ICRB7_D 0x00400568 /* IO CRB Entry 7_D */ -#define IIO_ICRB7_E 0x00400570 /* IO CRB Entry 7_E */ - -#define IIO_ICRB8_A 0x00400580 /* IO CRB Entry 8_A */ -#define IIO_ICRB8_B 0x00400588 /* IO CRB Entry 8_B */ -#define IIO_ICRB8_C 0x00400590 /* IO CRB Entry 8_C */ -#define IIO_ICRB8_D 0x00400598 /* IO CRB Entry 8_D */ -#define IIO_ICRB8_E 0x004005a0 /* IO CRB Entry 8_E */ - -#define IIO_ICRB9_A 0x004005b0 /* IO CRB Entry 9_A */ -#define IIO_ICRB9_B 0x004005b8 /* IO CRB Entry 9_B */ -#define IIO_ICRB9_C 0x004005c0 /* IO CRB Entry 9_C */ -#define IIO_ICRB9_D 0x004005c8 /* IO CRB Entry 9_D */ -#define IIO_ICRB9_E 0x004005d0 /* IO CRB Entry 9_E */ - -#define IIO_ICRBA_A 0x004005e0 /* IO CRB Entry A_A */ -#define IIO_ICRBA_B 0x004005e8 /* IO CRB Entry A_B */ -#define IIO_ICRBA_C 0x004005f0 /* IO CRB Entry A_C */ -#define IIO_ICRBA_D 0x004005f8 /* IO CRB Entry A_D */ -#define IIO_ICRBA_E 0x00400600 /* IO CRB Entry A_E */ - -#define IIO_ICRBB_A 0x00400610 /* IO CRB Entry B_A */ -#define IIO_ICRBB_B 0x00400618 /* IO CRB Entry B_B */ -#define IIO_ICRBB_C 0x00400620 /* IO CRB Entry B_C */ -#define IIO_ICRBB_D 0x00400628 /* IO CRB Entry B_D */ -#define IIO_ICRBB_E 0x00400630 /* IO CRB Entry B_E */ - -#define IIO_ICRBC_A 0x00400640 /* IO CRB Entry C_A */ -#define IIO_ICRBC_B 0x00400648 /* IO CRB Entry C_B */ -#define IIO_ICRBC_C 0x00400650 /* IO CRB Entry C_C */ -#define IIO_ICRBC_D 0x00400658 /* IO CRB Entry C_D */ -#define IIO_ICRBC_E 0x00400660 /* IO CRB Entry C_E */ - -#define IIO_ICRBD_A 0x00400670 /* IO CRB Entry D_A */ -#define IIO_ICRBD_B 0x00400678 /* IO CRB Entry D_B */ -#define IIO_ICRBD_C 0x00400680 /* IO CRB Entry D_C */ -#define IIO_ICRBD_D 0x00400688 /* IO CRB Entry D_D */ -#define IIO_ICRBD_E 0x00400690 /* IO CRB Entry D_E */ - -#define IIO_ICRBE_A 0x004006a0 /* IO CRB Entry E_A */ -#define IIO_ICRBE_B 0x004006a8 /* IO CRB Entry E_B */ -#define IIO_ICRBE_C 0x004006b0 /* IO CRB Entry E_C */ -#define IIO_ICRBE_D 0x004006b8 /* IO CRB Entry E_D */ -#define IIO_ICRBE_E 0x004006c0 /* IO CRB Entry E_E */ - -#define IIO_ICSML 0x00400700 /* IO CRB Spurious Message Low */ -#define IIO_ICSMM 0x00400708 /* IO CRB Spurious Message Middle */ -#define IIO_ICSMH 0x00400710 /* IO CRB Spurious Message High */ - -#define IIO_IDBSS 0x00400718 /* IO Debug Submenu Select */ - -#define IIO_IBLS0 0x00410000 /* IO BTE Length Status 0 */ -#define IIO_IBSA0 0x00410008 /* IO BTE Source Address 0 */ -#define IIO_IBDA0 0x00410010 /* IO BTE Destination Address 0 */ -#define IIO_IBCT0 0x00410018 /* IO BTE Control Terminate 0 */ -#define IIO_IBNA0 0x00410020 /* IO BTE Notification Address 0 */ -#define IIO_IBIA0 0x00410028 /* IO BTE Interrupt Address 0 */ -#define IIO_IBLS1 0x00420000 /* IO BTE Length Status 1 */ -#define IIO_IBSA1 0x00420008 /* IO BTE Source Address 1 */ -#define IIO_IBDA1 0x00420010 /* IO BTE Destination Address 1 */ -#define IIO_IBCT1 0x00420018 /* IO BTE Control Terminate 1 */ -#define IIO_IBNA1 0x00420020 /* IO BTE Notification Address 1 */ -#define IIO_IBIA1 0x00420028 /* IO BTE Interrupt Address 1 */ - -#define IIO_IPCR 0x00430000 /* IO Performance Control */ -#define IIO_IPPR 0x00430008 /* IO Performance Profiling */ - -/************************************************************************ - * * - * Description: This register echoes some information from the * - * LB_REV_ID register. It is available through Crosstalk as described * - * above. The REV_NUM and MFG_NUM fields receive their values from * - * the REVISION and MANUFACTURER fields in the LB_REV_ID register. * - * The PART_NUM field's value is the Crosstalk device ID number that * - * Steve Miller assigned to the SHub chip. * - * * - ************************************************************************/ - -typedef union ii_wid_u { - u64 ii_wid_regval; - struct { - u64 w_rsvd_1:1; - u64 w_mfg_num:11; - u64 w_part_num:16; - u64 w_rev_num:4; - u64 w_rsvd:32; - } ii_wid_fld_s; -} ii_wid_u_t; - -/************************************************************************ - * * - * The fields in this register are set upon detection of an error * - * and cleared by various mechanisms, as explained in the * - * description. * - * * - ************************************************************************/ - -typedef union ii_wstat_u { - u64 ii_wstat_regval; - struct { - u64 w_pending:4; - u64 w_xt_crd_to:1; - u64 w_xt_tail_to:1; - u64 w_rsvd_3:3; - u64 w_tx_mx_rty:1; - u64 w_rsvd_2:6; - u64 w_llp_tx_cnt:8; - u64 w_rsvd_1:8; - u64 w_crazy:1; - u64 w_rsvd:31; - } ii_wstat_fld_s; -} ii_wstat_u_t; - -/************************************************************************ - * * - * Description: This is a read-write enabled register. It controls * - * various aspects of the Crosstalk flow control. * - * * - ************************************************************************/ - -typedef union ii_wcr_u { - u64 ii_wcr_regval; - struct { - u64 w_wid:4; - u64 w_tag:1; - u64 w_rsvd_1:8; - u64 w_dst_crd:3; - u64 w_f_bad_pkt:1; - u64 w_dir_con:1; - u64 w_e_thresh:5; - u64 w_rsvd:41; - } ii_wcr_fld_s; -} ii_wcr_u_t; - -/************************************************************************ - * * - * Description: This register's value is a bit vector that guards * - * access to local registers within the II as well as to external * - * Crosstalk widgets. Each bit in the register corresponds to a * - * particular region in the system; a region consists of one, two or * - * four nodes (depending on the value of the REGION_SIZE field in the * - * LB_REV_ID register, which is documented in Section 8.3.1.1). The * - * protection provided by this register applies to PIO read * - * operations as well as PIO write operations. The II will perform a * - * PIO read or write request only if the bit for the requestor's * - * region is set; otherwise, the II will not perform the requested * - * operation and will return an error response. When a PIO read or * - * write request targets an external Crosstalk widget, then not only * - * must the bit for the requestor's region be set in the ILAPR, but * - * also the target widget's bit in the IOWA register must be set in * - * order for the II to perform the requested operation; otherwise, * - * the II will return an error response. Hence, the protection * - * provided by the IOWA register supplements the protection provided * - * by the ILAPR for requests that target external Crosstalk widgets. * - * This register itself can be accessed only by the nodes whose * - * region ID bits are enabled in this same register. It can also be * - * accessed through the IAlias space by the local processors. * - * The reset value of this register allows access by all nodes. * - * * - ************************************************************************/ - -typedef union ii_ilapr_u { - u64 ii_ilapr_regval; - struct { - u64 i_region:64; - } ii_ilapr_fld_s; -} ii_ilapr_u_t; - -/************************************************************************ - * * - * Description: A write to this register of the 64-bit value * - * "SGIrules" in ASCII, will cause the bit in the ILAPR register * - * corresponding to the region of the requestor to be set (allow * - * access). A write of any other value will be ignored. Access * - * protection for this register is "SGIrules". * - * This register can also be accessed through the IAlias space. * - * However, this access will not change the access permissions in the * - * ILAPR. * - * * - ************************************************************************/ - -typedef union ii_ilapo_u { - u64 ii_ilapo_regval; - struct { - u64 i_io_ovrride:64; - } ii_ilapo_fld_s; -} ii_ilapo_u_t; - -/************************************************************************ - * * - * This register qualifies all the PIO and Graphics writes launched * - * from the SHUB towards a widget. * - * * - ************************************************************************/ - -typedef union ii_iowa_u { - u64 ii_iowa_regval; - struct { - u64 i_w0_oac:1; - u64 i_rsvd_1:7; - u64 i_wx_oac:8; - u64 i_rsvd:48; - } ii_iowa_fld_s; -} ii_iowa_u_t; - -/************************************************************************ - * * - * Description: This register qualifies all the requests launched * - * from a widget towards the Shub. This register is intended to be * - * used by software in case of misbehaving widgets. * - * * - * * - ************************************************************************/ - -typedef union ii_iiwa_u { - u64 ii_iiwa_regval; - struct { - u64 i_w0_iac:1; - u64 i_rsvd_1:7; - u64 i_wx_iac:8; - u64 i_rsvd:48; - } ii_iiwa_fld_s; -} ii_iiwa_u_t; - -/************************************************************************ - * * - * Description: This register qualifies all the operations launched * - * from a widget towards the SHub. It allows individual access * - * control for up to 8 devices per widget. A device refers to * - * individual DMA master hosted by a widget. * - * The bits in each field of this register are cleared by the Shub * - * upon detection of an error which requires the device to be * - * disabled. These fields assume that 0=TNUM=7 (i.e., Bridge-centric * - * Crosstalk). Whether or not a device has access rights to this * - * Shub is determined by an AND of the device enable bit in the * - * appropriate field of this register and the corresponding bit in * - * the Wx_IAC field (for the widget which this device belongs to). * - * The bits in this field are set by writing a 1 to them. Incoming * - * replies from Crosstalk are not subject to this access control * - * mechanism. * - * * - ************************************************************************/ - -typedef union ii_iidem_u { - u64 ii_iidem_regval; - struct { - u64 i_w8_dxs:8; - u64 i_w9_dxs:8; - u64 i_wa_dxs:8; - u64 i_wb_dxs:8; - u64 i_wc_dxs:8; - u64 i_wd_dxs:8; - u64 i_we_dxs:8; - u64 i_wf_dxs:8; - } ii_iidem_fld_s; -} ii_iidem_u_t; - -/************************************************************************ - * * - * This register contains the various programmable fields necessary * - * for controlling and observing the LLP signals. * - * * - ************************************************************************/ - -typedef union ii_ilcsr_u { - u64 ii_ilcsr_regval; - struct { - u64 i_nullto:6; - u64 i_rsvd_4:2; - u64 i_wrmrst:1; - u64 i_rsvd_3:1; - u64 i_llp_en:1; - u64 i_bm8:1; - u64 i_llp_stat:2; - u64 i_remote_power:1; - u64 i_rsvd_2:1; - u64 i_maxrtry:10; - u64 i_d_avail_sel:2; - u64 i_rsvd_1:4; - u64 i_maxbrst:10; - u64 i_rsvd:22; - - } ii_ilcsr_fld_s; -} ii_ilcsr_u_t; - -/************************************************************************ - * * - * This is simply a status registers that monitors the LLP error * - * rate. * - * * - ************************************************************************/ - -typedef union ii_illr_u { - u64 ii_illr_regval; - struct { - u64 i_sn_cnt:16; - u64 i_cb_cnt:16; - u64 i_rsvd:32; - } ii_illr_fld_s; -} ii_illr_u_t; - -/************************************************************************ - * * - * Description: All II-detected non-BTE error interrupts are * - * specified via this register. * - * NOTE: The PI interrupt register address is hardcoded in the II. If * - * PI_ID==0, then the II sends an interrupt request (Duplonet PWRI * - * packet) to address offset 0x0180_0090 within the local register * - * address space of PI0 on the node specified by the NODE field. If * - * PI_ID==1, then the II sends the interrupt request to address * - * offset 0x01A0_0090 within the local register address space of PI1 * - * on the node specified by the NODE field. * - * * - ************************************************************************/ - -typedef union ii_iidsr_u { - u64 ii_iidsr_regval; - struct { - u64 i_level:8; - u64 i_pi_id:1; - u64 i_node:11; - u64 i_rsvd_3:4; - u64 i_enable:1; - u64 i_rsvd_2:3; - u64 i_int_sent:2; - u64 i_rsvd_1:2; - u64 i_pi0_forward_int:1; - u64 i_pi1_forward_int:1; - u64 i_rsvd:30; - } ii_iidsr_fld_s; -} ii_iidsr_u_t; - -/************************************************************************ - * * - * There are two instances of this register. This register is used * - * for matching up the incoming responses from the graphics widget to * - * the processor that initiated the graphics operation. The * - * write-responses are converted to graphics credits and returned to * - * the processor so that the processor interface can manage the flow * - * control. * - * * - ************************************************************************/ - -typedef union ii_igfx0_u { - u64 ii_igfx0_regval; - struct { - u64 i_w_num:4; - u64 i_pi_id:1; - u64 i_n_num:12; - u64 i_p_num:1; - u64 i_rsvd:46; - } ii_igfx0_fld_s; -} ii_igfx0_u_t; - -/************************************************************************ - * * - * There are two instances of this register. This register is used * - * for matching up the incoming responses from the graphics widget to * - * the processor that initiated the graphics operation. The * - * write-responses are converted to graphics credits and returned to * - * the processor so that the processor interface can manage the flow * - * control. * - * * - ************************************************************************/ - -typedef union ii_igfx1_u { - u64 ii_igfx1_regval; - struct { - u64 i_w_num:4; - u64 i_pi_id:1; - u64 i_n_num:12; - u64 i_p_num:1; - u64 i_rsvd:46; - } ii_igfx1_fld_s; -} ii_igfx1_u_t; - -/************************************************************************ - * * - * There are two instances of this registers. These registers are * - * used as scratch registers for software use. * - * * - ************************************************************************/ - -typedef union ii_iscr0_u { - u64 ii_iscr0_regval; - struct { - u64 i_scratch:64; - } ii_iscr0_fld_s; -} ii_iscr0_u_t; - -/************************************************************************ - * * - * There are two instances of this registers. These registers are * - * used as scratch registers for software use. * - * * - ************************************************************************/ - -typedef union ii_iscr1_u { - u64 ii_iscr1_regval; - struct { - u64 i_scratch:64; - } ii_iscr1_fld_s; -} ii_iscr1_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the SHub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte1_u { - u64 ii_itte1_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte1_fld_s; -} ii_itte1_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte2_u { - u64 ii_itte2_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte2_fld_s; -} ii_itte2_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte3_u { - u64 ii_itte3_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte3_fld_s; -} ii_itte3_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a SHub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the SHub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte4_u { - u64 ii_itte4_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte4_fld_s; -} ii_itte4_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a SHub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte5_u { - u64 ii_itte5_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte5_fld_s; -} ii_itte5_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the Shub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte6_u { - u64 ii_itte6_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte6_fld_s; -} ii_itte6_u_t; - -/************************************************************************ - * * - * Description: There are seven instances of translation table entry * - * registers. Each register maps a Shub Big Window to a 48-bit * - * address on Crosstalk. * - * For M-mode (128 nodes, 8 GBytes/node), SysAD[31:29] (Big Window * - * number) are used to select one of these 7 registers. The Widget * - * number field is then derived from the W_NUM field for synthesizing * - * a Crosstalk packet. The 5 bits of OFFSET are concatenated with * - * SysAD[28:0] to form Crosstalk[33:0]. The upper Crosstalk[47:34] * - * are padded with zeros. Although the maximum Crosstalk space * - * addressable by the Shub is thus the lower 16 GBytes per widget * - * (M-mode), however only 7/32nds of this * - * space can be accessed. * - * For the N-mode (256 nodes, 4 GBytes/node), SysAD[30:28] (Big * - * Window number) are used to select one of these 7 registers. The * - * Widget number field is then derived from the W_NUM field for * - * synthesizing a Crosstalk packet. The 5 bits of OFFSET are * - * concatenated with SysAD[27:0] to form Crosstalk[33:0]. The IOSP * - * field is used as Crosstalk[47], and remainder of the Crosstalk * - * address bits (Crosstalk[46:34]) are always zero. While the maximum * - * Crosstalk space addressable by the SHub is thus the lower * - * 8-GBytes per widget (N-mode), only 7/32nds * - * of this space can be accessed. * - * * - ************************************************************************/ - -typedef union ii_itte7_u { - u64 ii_itte7_regval; - struct { - u64 i_offset:5; - u64 i_rsvd_1:3; - u64 i_w_num:4; - u64 i_iosp:1; - u64 i_rsvd:51; - } ii_itte7_fld_s; -} ii_itte7_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb0_u { - u64 ii_iprb0_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprb0_fld_s; -} ii_iprb0_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb8_u { - u64 ii_iprb8_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprb8_fld_s; -} ii_iprb8_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprb9_u { - u64 ii_iprb9_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprb9_fld_s; -} ii_iprb9_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * * - * * - ************************************************************************/ - -typedef union ii_iprba_u { - u64 ii_iprba_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprba_fld_s; -} ii_iprba_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbb_u { - u64 ii_iprbb_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprbb_fld_s; -} ii_iprbb_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbc_u { - u64 ii_iprbc_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprbc_fld_s; -} ii_iprbc_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbd_u { - u64 ii_iprbd_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprbd_fld_s; -} ii_iprbd_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of SHub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbe_u { - u64 ii_iprbe_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprbe_fld_s; -} ii_iprbe_u_t; - -/************************************************************************ - * * - * Description: There are 9 instances of this register, one per * - * actual widget in this implementation of Shub and Crossbow. * - * Note: Crossbow only has ports for Widgets 8 through F, widget 0 * - * refers to Crossbow's internal space. * - * This register contains the state elements per widget that are * - * necessary to manage the PIO flow control on Crosstalk and on the * - * Router Network. See the PIO Flow Control chapter for a complete * - * description of this register * - * The SPUR_WR bit requires some explanation. When this register is * - * written, the new value of the C field is captured in an internal * - * register so the hardware can remember what the programmer wrote * - * into the credit counter. The SPUR_WR bit sets whenever the C field * - * increments above this stored value, which indicates that there * - * have been more responses received than requests sent. The SPUR_WR * - * bit cannot be cleared until a value is written to the IPRBx * - * register; the write will correct the C field and capture its new * - * value in the internal register. Even if IECLR[E_PRB_x] is set, the * - * SPUR_WR bit will persist if IPRBx hasn't yet been written. * - * . * - * * - ************************************************************************/ - -typedef union ii_iprbf_u { - u64 ii_iprbf_regval; - struct { - u64 i_c:8; - u64 i_na:14; - u64 i_rsvd_2:2; - u64 i_nb:14; - u64 i_rsvd_1:2; - u64 i_m:2; - u64 i_f:1; - u64 i_of_cnt:5; - u64 i_error:1; - u64 i_rd_to:1; - u64 i_spur_wr:1; - u64 i_spur_rd:1; - u64 i_rsvd:11; - u64 i_mult_err:1; - } ii_iprbe_fld_s; -} ii_iprbf_u_t; - -/************************************************************************ - * * - * This register specifies the timeout value to use for monitoring * - * Crosstalk credits which are used outbound to Crosstalk. An * - * internal counter called the Crosstalk Credit Timeout Counter * - * increments every 128 II clocks. The counter starts counting * - * anytime the credit count drops below a threshold, and resets to * - * zero (stops counting) anytime the credit count is at or above the * - * threshold. The threshold is 1 credit in direct connect mode and 2 * - * in Crossbow connect mode. When the internal Crosstalk Credit * - * Timeout Counter reaches the value programmed in this register, a * - * Crosstalk Credit Timeout has occurred. The internal counter is not * - * readable from software, and stops counting at its maximum value, * - * so it cannot cause more than one interrupt. * - * * - ************************************************************************/ - -typedef union ii_ixcc_u { - u64 ii_ixcc_regval; - struct { - u64 i_time_out:26; - u64 i_rsvd:38; - } ii_ixcc_fld_s; -} ii_ixcc_u_t; - -/************************************************************************ - * * - * Description: This register qualifies all the PIO and DMA * - * operations launched from widget 0 towards the SHub. In * - * addition, it also qualifies accesses by the BTE streams. * - * The bits in each field of this register are cleared by the SHub * - * upon detection of an error which requires widget 0 or the BTE * - * streams to be terminated. Whether or not widget x has access * - * rights to this SHub is determined by an AND of the device * - * enable bit in the appropriate field of this register and bit 0 in * - * the Wx_IAC field. The bits in this field are set by writing a 1 to * - * them. Incoming replies from Crosstalk are not subject to this * - * access control mechanism. * - * * - ************************************************************************/ - -typedef union ii_imem_u { - u64 ii_imem_regval; - struct { - u64 i_w0_esd:1; - u64 i_rsvd_3:3; - u64 i_b0_esd:1; - u64 i_rsvd_2:3; - u64 i_b1_esd:1; - u64 i_rsvd_1:3; - u64 i_clr_precise:1; - u64 i_rsvd:51; - } ii_imem_fld_s; -} ii_imem_u_t; - -/************************************************************************ - * * - * Description: This register specifies the timeout value to use for * - * monitoring Crosstalk tail flits coming into the Shub in the * - * TAIL_TO field. An internal counter associated with this register * - * is incremented every 128 II internal clocks (7 bits). The counter * - * starts counting anytime a header micropacket is received and stops * - * counting (and resets to zero) any time a micropacket with a Tail * - * bit is received. Once the counter reaches the threshold value * - * programmed in this register, it generates an interrupt to the * - * processor that is programmed into the IIDSR. The counter saturates * - * (does not roll over) at its maximum value, so it cannot cause * - * another interrupt until after it is cleared. * - * The register also contains the Read Response Timeout values. The * - * Prescalar is 23 bits, and counts II clocks. An internal counter * - * increments on every II clock and when it reaches the value in the * - * Prescalar field, all IPRTE registers with their valid bits set * - * have their Read Response timers bumped. Whenever any of them match * - * the value in the RRSP_TO field, a Read Response Timeout has * - * occurred, and error handling occurs as described in the Error * - * Handling section of this document. * - * * - ************************************************************************/ - -typedef union ii_ixtt_u { - u64 ii_ixtt_regval; - struct { - u64 i_tail_to:26; - u64 i_rsvd_1:6; - u64 i_rrsp_ps:23; - u64 i_rrsp_to:5; - u64 i_rsvd:4; - } ii_ixtt_fld_s; -} ii_ixtt_u_t; - -/************************************************************************ - * * - * Writing a 1 to the fields of this register clears the appropriate * - * error bits in other areas of SHub. Note that when the * - * E_PRB_x bits are used to clear error bits in PRB registers, * - * SPUR_RD and SPUR_WR may persist, because they require additional * - * action to clear them. See the IPRBx and IXSS Register * - * specifications. * - * * - ************************************************************************/ - -typedef union ii_ieclr_u { - u64 ii_ieclr_regval; - struct { - u64 i_e_prb_0:1; - u64 i_rsvd:7; - u64 i_e_prb_8:1; - u64 i_e_prb_9:1; - u64 i_e_prb_a:1; - u64 i_e_prb_b:1; - u64 i_e_prb_c:1; - u64 i_e_prb_d:1; - u64 i_e_prb_e:1; - u64 i_e_prb_f:1; - u64 i_e_crazy:1; - u64 i_e_bte_0:1; - u64 i_e_bte_1:1; - u64 i_reserved_1:10; - u64 i_spur_rd_hdr:1; - u64 i_cam_intr_to:1; - u64 i_cam_overflow:1; - u64 i_cam_read_miss:1; - u64 i_ioq_rep_underflow:1; - u64 i_ioq_req_underflow:1; - u64 i_ioq_rep_overflow:1; - u64 i_ioq_req_overflow:1; - u64 i_iiq_rep_overflow:1; - u64 i_iiq_req_overflow:1; - u64 i_ii_xn_rep_cred_overflow:1; - u64 i_ii_xn_req_cred_overflow:1; - u64 i_ii_xn_invalid_cmd:1; - u64 i_xn_ii_invalid_cmd:1; - u64 i_reserved_2:21; - } ii_ieclr_fld_s; -} ii_ieclr_u_t; - -/************************************************************************ - * * - * This register controls both BTEs. SOFT_RESET is intended for * - * recovery after an error. COUNT controls the total number of CRBs * - * that both BTEs (combined) can use, which affects total BTE * - * bandwidth. * - * * - ************************************************************************/ - -typedef union ii_ibcr_u { - u64 ii_ibcr_regval; - struct { - u64 i_count:4; - u64 i_rsvd_1:4; - u64 i_soft_reset:1; - u64 i_rsvd:55; - } ii_ibcr_fld_s; -} ii_ibcr_u_t; - -/************************************************************************ - * * - * This register contains the header of a spurious read response * - * received from Crosstalk. A spurious read response is defined as a * - * read response received by II from a widget for which (1) the SIDN * - * has a value between 1 and 7, inclusive (II never sends requests to * - * these widgets (2) there is no valid IPRTE register which * - * corresponds to the TNUM, or (3) the widget indicated in SIDN is * - * not the same as the widget recorded in the IPRTE register * - * referenced by the TNUM. If this condition is true, and if the * - * IXSS[VALID] bit is clear, then the header of the spurious read * - * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * - * errant header is thereby captured, and no further spurious read * - * respones are captured until IXSS[VALID] is cleared by setting the * - * appropriate bit in IECLR.Everytime a spurious read response is * - * detected, the SPUR_RD bit of the PRB corresponding to the incoming * - * message's SIDN field is set. This always happens, regarless of * - * whether a header is captured. The programmer should check * - * IXSM[SIDN] to determine which widget sent the spurious response, * - * because there may be more than one SPUR_RD bit set in the PRB * - * registers. The widget indicated by IXSM[SIDN] was the first * - * spurious read response to be received since the last time * - * IXSS[VALID] was clear. The SPUR_RD bit of the corresponding PRB * - * will be set. Any SPUR_RD bits in any other PRB registers indicate * - * spurious messages from other widets which were detected after the * - * header was captured.. * - * * - ************************************************************************/ - -typedef union ii_ixsm_u { - u64 ii_ixsm_regval; - struct { - u64 i_byte_en:32; - u64 i_reserved:1; - u64 i_tag:3; - u64 i_alt_pactyp:4; - u64 i_bo:1; - u64 i_error:1; - u64 i_vbpm:1; - u64 i_gbr:1; - u64 i_ds:2; - u64 i_ct:1; - u64 i_tnum:5; - u64 i_pactyp:4; - u64 i_sidn:4; - u64 i_didn:4; - } ii_ixsm_fld_s; -} ii_ixsm_u_t; - -/************************************************************************ - * * - * This register contains the sideband bits of a spurious read * - * response received from Crosstalk. * - * * - ************************************************************************/ - -typedef union ii_ixss_u { - u64 ii_ixss_regval; - struct { - u64 i_sideband:8; - u64 i_rsvd:55; - u64 i_valid:1; - } ii_ixss_fld_s; -} ii_ixss_u_t; - -/************************************************************************ - * * - * This register enables software to access the II LLP's test port. * - * Refer to the LLP 2.5 documentation for an explanation of the test * - * port. Software can write to this register to program the values * - * for the control fields (TestErrCapture, TestClear, TestFlit, * - * TestMask and TestSeed). Similarly, software can read from this * - * register to obtain the values of the test port's status outputs * - * (TestCBerr, TestValid and TestData). * - * * - ************************************************************************/ - -typedef union ii_ilct_u { - u64 ii_ilct_regval; - struct { - u64 i_test_seed:20; - u64 i_test_mask:8; - u64 i_test_data:20; - u64 i_test_valid:1; - u64 i_test_cberr:1; - u64 i_test_flit:3; - u64 i_test_clear:1; - u64 i_test_err_capture:1; - u64 i_rsvd:9; - } ii_ilct_fld_s; -} ii_ilct_u_t; - -/************************************************************************ - * * - * If the II detects an illegal incoming Duplonet packet (request or * - * reply) when VALID==0 in the IIEPH1 register, then it saves the * - * contents of the packet's header flit in the IIEPH1 and IIEPH2 * - * registers, sets the VALID bit in IIEPH1, clears the OVERRUN bit, * - * and assigns a value to the ERR_TYPE field which indicates the * - * specific nature of the error. The II recognizes four different * - * types of errors: short request packets (ERR_TYPE==2), short reply * - * packets (ERR_TYPE==3), long request packets (ERR_TYPE==4) and long * - * reply packets (ERR_TYPE==5). The encodings for these types of * - * errors were chosen to be consistent with the same types of errors * - * indicated by the ERR_TYPE field in the LB_ERROR_HDR1 register (in * - * the LB unit). If the II detects an illegal incoming Duplonet * - * packet when VALID==1 in the IIEPH1 register, then it merely sets * - * the OVERRUN bit to indicate that a subsequent error has happened, * - * and does nothing further. * - * * - ************************************************************************/ - -typedef union ii_iieph1_u { - u64 ii_iieph1_regval; - struct { - u64 i_command:7; - u64 i_rsvd_5:1; - u64 i_suppl:14; - u64 i_rsvd_4:1; - u64 i_source:14; - u64 i_rsvd_3:1; - u64 i_err_type:4; - u64 i_rsvd_2:4; - u64 i_overrun:1; - u64 i_rsvd_1:3; - u64 i_valid:1; - u64 i_rsvd:13; - } ii_iieph1_fld_s; -} ii_iieph1_u_t; - -/************************************************************************ - * * - * This register holds the Address field from the header flit of an * - * incoming erroneous Duplonet packet, along with the tail bit which * - * accompanied this header flit. This register is essentially an * - * extension of IIEPH1. Two registers were necessary because the 64 * - * bits available in only a single register were insufficient to * - * capture the entire header flit of an erroneous packet. * - * * - ************************************************************************/ - -typedef union ii_iieph2_u { - u64 ii_iieph2_regval; - struct { - u64 i_rsvd_0:3; - u64 i_address:47; - u64 i_rsvd_1:10; - u64 i_tail:1; - u64 i_rsvd:3; - } ii_iieph2_fld_s; -} ii_iieph2_u_t; - -/******************************/ - -/************************************************************************ - * * - * This register's value is a bit vector that guards access from SXBs * - * to local registers within the II as well as to external Crosstalk * - * widgets * - * * - ************************************************************************/ - -typedef union ii_islapr_u { - u64 ii_islapr_regval; - struct { - u64 i_region:64; - } ii_islapr_fld_s; -} ii_islapr_u_t; - -/************************************************************************ - * * - * A write to this register of the 56-bit value "Pup+Bun" will cause * - * the bit in the ISLAPR register corresponding to the region of the * - * requestor to be set (access allowed). ( - * * - ************************************************************************/ - -typedef union ii_islapo_u { - u64 ii_islapo_regval; - struct { - u64 i_io_sbx_ovrride:56; - u64 i_rsvd:8; - } ii_islapo_fld_s; -} ii_islapo_u_t; - -/************************************************************************ - * * - * Determines how long the wrapper will wait aftr an interrupt is * - * initially issued from the II before it times out the outstanding * - * interrupt and drops it from the interrupt queue. * - * * - ************************************************************************/ - -typedef union ii_iwi_u { - u64 ii_iwi_regval; - struct { - u64 i_prescale:24; - u64 i_rsvd:8; - u64 i_timeout:8; - u64 i_rsvd1:8; - u64 i_intrpt_retry_period:8; - u64 i_rsvd2:8; - } ii_iwi_fld_s; -} ii_iwi_u_t; - -/************************************************************************ - * * - * Log errors which have occurred in the II wrapper. The errors are * - * cleared by writing to the IECLR register. * - * * - ************************************************************************/ - -typedef union ii_iwel_u { - u64 ii_iwel_regval; - struct { - u64 i_intr_timed_out:1; - u64 i_rsvd:7; - u64 i_cam_overflow:1; - u64 i_cam_read_miss:1; - u64 i_rsvd1:2; - u64 i_ioq_rep_underflow:1; - u64 i_ioq_req_underflow:1; - u64 i_ioq_rep_overflow:1; - u64 i_ioq_req_overflow:1; - u64 i_iiq_rep_overflow:1; - u64 i_iiq_req_overflow:1; - u64 i_rsvd2:6; - u64 i_ii_xn_rep_cred_over_under:1; - u64 i_ii_xn_req_cred_over_under:1; - u64 i_rsvd3:6; - u64 i_ii_xn_invalid_cmd:1; - u64 i_xn_ii_invalid_cmd:1; - u64 i_rsvd4:30; - } ii_iwel_fld_s; -} ii_iwel_u_t; - -/************************************************************************ - * * - * Controls the II wrapper. * - * * - ************************************************************************/ - -typedef union ii_iwc_u { - u64 ii_iwc_regval; - struct { - u64 i_dma_byte_swap:1; - u64 i_rsvd:3; - u64 i_cam_read_lines_reset:1; - u64 i_rsvd1:3; - u64 i_ii_xn_cred_over_under_log:1; - u64 i_rsvd2:19; - u64 i_xn_rep_iq_depth:5; - u64 i_rsvd3:3; - u64 i_xn_req_iq_depth:5; - u64 i_rsvd4:3; - u64 i_iiq_depth:6; - u64 i_rsvd5:12; - u64 i_force_rep_cred:1; - u64 i_force_req_cred:1; - } ii_iwc_fld_s; -} ii_iwc_u_t; - -/************************************************************************ - * * - * Status in the II wrapper. * - * * - ************************************************************************/ - -typedef union ii_iws_u { - u64 ii_iws_regval; - struct { - u64 i_xn_rep_iq_credits:5; - u64 i_rsvd:3; - u64 i_xn_req_iq_credits:5; - u64 i_rsvd1:51; - } ii_iws_fld_s; -} ii_iws_u_t; - -/************************************************************************ - * * - * Masks errors in the IWEL register. * - * * - ************************************************************************/ - -typedef union ii_iweim_u { - u64 ii_iweim_regval; - struct { - u64 i_intr_timed_out:1; - u64 i_rsvd:7; - u64 i_cam_overflow:1; - u64 i_cam_read_miss:1; - u64 i_rsvd1:2; - u64 i_ioq_rep_underflow:1; - u64 i_ioq_req_underflow:1; - u64 i_ioq_rep_overflow:1; - u64 i_ioq_req_overflow:1; - u64 i_iiq_rep_overflow:1; - u64 i_iiq_req_overflow:1; - u64 i_rsvd2:6; - u64 i_ii_xn_rep_cred_overflow:1; - u64 i_ii_xn_req_cred_overflow:1; - u64 i_rsvd3:6; - u64 i_ii_xn_invalid_cmd:1; - u64 i_xn_ii_invalid_cmd:1; - u64 i_rsvd4:30; - } ii_iweim_fld_s; -} ii_iweim_u_t; - -/************************************************************************ - * * - * A write to this register causes a particular field in the * - * corresponding widget's PRB entry to be adjusted up or down by 1. * - * This counter should be used when recovering from error and reset * - * conditions. Note that software would be capable of causing * - * inadvertent overflow or underflow of these counters. * - * * - ************************************************************************/ - -typedef union ii_ipca_u { - u64 ii_ipca_regval; - struct { - u64 i_wid:4; - u64 i_adjust:1; - u64 i_rsvd_1:3; - u64 i_field:2; - u64 i_rsvd:54; - } ii_ipca_fld_s; -} ii_ipca_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte0a_u { - u64 ii_iprte0a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte0a_fld_s; -} ii_iprte0a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte1a_u { - u64 ii_iprte1a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte1a_fld_s; -} ii_iprte1a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte2a_u { - u64 ii_iprte2a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte2a_fld_s; -} ii_iprte2a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte3a_u { - u64 ii_iprte3a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte3a_fld_s; -} ii_iprte3a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte4a_u { - u64 ii_iprte4a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte4a_fld_s; -} ii_iprte4a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte5a_u { - u64 ii_iprte5a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte5a_fld_s; -} ii_iprte5a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte6a_u { - u64 ii_iprte6a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprte6a_fld_s; -} ii_iprte6a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte7a_u { - u64 ii_iprte7a_regval; - struct { - u64 i_rsvd_1:54; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } ii_iprtea7_fld_s; -} ii_iprte7a_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte0b_u { - u64 ii_iprte0b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte0b_fld_s; -} ii_iprte0b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte1b_u { - u64 ii_iprte1b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte1b_fld_s; -} ii_iprte1b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte2b_u { - u64 ii_iprte2b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte2b_fld_s; -} ii_iprte2b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte3b_u { - u64 ii_iprte3b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte3b_fld_s; -} ii_iprte3b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte4b_u { - u64 ii_iprte4b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte4b_fld_s; -} ii_iprte4b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte5b_u { - u64 ii_iprte5b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte5b_fld_s; -} ii_iprte5b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte6b_u { - u64 ii_iprte6b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - - } ii_iprte6b_fld_s; -} ii_iprte6b_u_t; - -/************************************************************************ - * * - * There are 8 instances of this register. This register contains * - * the information that the II has to remember once it has launched a * - * PIO Read operation. The contents are used to form the correct * - * Router Network packet and direct the Crosstalk reply to the * - * appropriate processor. * - * * - ************************************************************************/ - -typedef union ii_iprte7b_u { - u64 ii_iprte7b_regval; - struct { - u64 i_rsvd_1:3; - u64 i_address:47; - u64 i_init:3; - u64 i_source:11; - } ii_iprte7b_fld_s; -} ii_iprte7b_u_t; - -/************************************************************************ - * * - * Description: SHub II contains a feature which did not exist in * - * the Hub which automatically cleans up after a Read Response * - * timeout, including deallocation of the IPRTE and recovery of IBuf * - * space. The inclusion of this register in SHub is for backward * - * compatibility * - * A write to this register causes an entry from the table of * - * outstanding PIO Read Requests to be freed and returned to the * - * stack of free entries. This register is used in handling the * - * timeout errors that result in a PIO Reply never returning from * - * Crosstalk. * - * Note that this register does not affect the contents of the IPRTE * - * registers. The Valid bits in those registers have to be * - * specifically turned off by software. * - * * - ************************************************************************/ - -typedef union ii_ipdr_u { - u64 ii_ipdr_regval; - struct { - u64 i_te:3; - u64 i_rsvd_1:1; - u64 i_pnd:1; - u64 i_init_rpcnt:1; - u64 i_rsvd:58; - } ii_ipdr_fld_s; -} ii_ipdr_u_t; - -/************************************************************************ - * * - * A write to this register causes a CRB entry to be returned to the * - * queue of free CRBs. The entry should have previously been cleared * - * (mark bit) via backdoor access to the pertinent CRB entry. This * - * register is used in the last step of handling the errors that are * - * captured and marked in CRB entries. Briefly: 1) first error for * - * DMA write from a particular device, and first error for a * - * particular BTE stream, lead to a marked CRB entry, and processor * - * interrupt, 2) software reads the error information captured in the * - * CRB entry, and presumably takes some corrective action, 3) * - * software clears the mark bit, and finally 4) software writes to * - * the ICDR register to return the CRB entry to the list of free CRB * - * entries. * - * * - ************************************************************************/ - -typedef union ii_icdr_u { - u64 ii_icdr_regval; - struct { - u64 i_crb_num:4; - u64 i_pnd:1; - u64 i_rsvd:59; - } ii_icdr_fld_s; -} ii_icdr_u_t; - -/************************************************************************ - * * - * This register provides debug access to two FIFOs inside of II. * - * Both IOQ_MAX* fields of this register contain the instantaneous * - * depth (in units of the number of available entries) of the * - * associated IOQ FIFO. A read of this register will return the * - * number of free entries on each FIFO at the time of the read. So * - * when a FIFO is idle, the associated field contains the maximum * - * depth of the FIFO. This register is writable for debug reasons * - * and is intended to be written with the maximum desired FIFO depth * - * while the FIFO is idle. Software must assure that II is idle when * - * this register is written. If there are any active entries in any * - * of these FIFOs when this register is written, the results are * - * undefined. * - * * - ************************************************************************/ - -typedef union ii_ifdr_u { - u64 ii_ifdr_regval; - struct { - u64 i_ioq_max_rq:7; - u64 i_set_ioq_rq:1; - u64 i_ioq_max_rp:7; - u64 i_set_ioq_rp:1; - u64 i_rsvd:48; - } ii_ifdr_fld_s; -} ii_ifdr_u_t; - -/************************************************************************ - * * - * This register allows the II to become sluggish in removing * - * messages from its inbound queue (IIQ). This will cause messages to * - * back up in either virtual channel. Disabling the "molasses" mode * - * subsequently allows the II to be tested under stress. In the * - * sluggish ("Molasses") mode, the localized effects of congestion * - * can be observed. * - * * - ************************************************************************/ - -typedef union ii_iiap_u { - u64 ii_iiap_regval; - struct { - u64 i_rq_mls:6; - u64 i_rsvd_1:2; - u64 i_rp_mls:6; - u64 i_rsvd:50; - } ii_iiap_fld_s; -} ii_iiap_u_t; - -/************************************************************************ - * * - * This register allows several parameters of CRB operation to be * - * set. Note that writing to this register can have catastrophic side * - * effects, if the CRB is not quiescent, i.e. if the CRB is * - * processing protocol messages when the write occurs. * - * * - ************************************************************************/ - -typedef union ii_icmr_u { - u64 ii_icmr_regval; - struct { - u64 i_sp_msg:1; - u64 i_rd_hdr:1; - u64 i_rsvd_4:2; - u64 i_c_cnt:4; - u64 i_rsvd_3:4; - u64 i_clr_rqpd:1; - u64 i_clr_rppd:1; - u64 i_rsvd_2:2; - u64 i_fc_cnt:4; - u64 i_crb_vld:15; - u64 i_crb_mark:15; - u64 i_rsvd_1:2; - u64 i_precise:1; - u64 i_rsvd:11; - } ii_icmr_fld_s; -} ii_icmr_u_t; - -/************************************************************************ - * * - * This register allows control of the table portion of the CRB * - * logic via software. Control operations from this register have * - * priority over all incoming Crosstalk or BTE requests. * - * * - ************************************************************************/ - -typedef union ii_iccr_u { - u64 ii_iccr_regval; - struct { - u64 i_crb_num:4; - u64 i_rsvd_1:4; - u64 i_cmd:8; - u64 i_pending:1; - u64 i_rsvd:47; - } ii_iccr_fld_s; -} ii_iccr_u_t; - -/************************************************************************ - * * - * This register allows the maximum timeout value to be programmed. * - * * - ************************************************************************/ - -typedef union ii_icto_u { - u64 ii_icto_regval; - struct { - u64 i_timeout:8; - u64 i_rsvd:56; - } ii_icto_fld_s; -} ii_icto_u_t; - -/************************************************************************ - * * - * This register allows the timeout prescalar to be programmed. An * - * internal counter is associated with this register. When the * - * internal counter reaches the value of the PRESCALE field, the * - * timer registers in all valid CRBs are incremented (CRBx_D[TIMEOUT] * - * field). The internal counter resets to zero, and then continues * - * counting. * - * * - ************************************************************************/ - -typedef union ii_ictp_u { - u64 ii_ictp_regval; - struct { - u64 i_prescale:24; - u64 i_rsvd:40; - } ii_ictp_fld_s; -} ii_ictp_u_t; - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * The CRB Entry registers can be conceptualized as rows and columns * - * (illustrated in the table above). Each row contains the 4 * - * registers required for a single CRB Entry. The first doubleword * - * (column) for each entry is labeled A, and the second doubleword * - * (higher address) is labeled B, the third doubleword is labeled C, * - * the fourth doubleword is labeled D and the fifth doubleword is * - * labeled E. All CRB entries have their addresses on a quarter * - * cacheline aligned boundary. * - * Upon reset, only the following fields are initialized: valid * - * (VLD), priority count, timeout, timeout valid, and context valid. * - * All other bits should be cleared by software before use (after * - * recovering any potential error state from before the reset). * - * The following four tables summarize the format for the four * - * registers that are used for each ICRB# Entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_a_u { - u64 ii_icrb0_a_regval; - struct { - u64 ia_iow:1; - u64 ia_vld:1; - u64 ia_addr:47; - u64 ia_tnum:5; - u64 ia_sidn:4; - u64 ia_rsvd:6; - } ii_icrb0_a_fld_s; -} ii_icrb0_a_u_t; - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_b_u { - u64 ii_icrb0_b_regval; - struct { - u64 ib_xt_err:1; - u64 ib_mark:1; - u64 ib_ln_uce:1; - u64 ib_errcode:3; - u64 ib_error:1; - u64 ib_stall__bte_1:1; - u64 ib_stall__bte_0:1; - u64 ib_stall__intr:1; - u64 ib_stall_ib:1; - u64 ib_intvn:1; - u64 ib_wb:1; - u64 ib_hold:1; - u64 ib_ack:1; - u64 ib_resp:1; - u64 ib_ack_cnt:11; - u64 ib_rsvd:7; - u64 ib_exc:5; - u64 ib_init:3; - u64 ib_imsg:8; - u64 ib_imsgtype:2; - u64 ib_use_old:1; - u64 ib_rsvd_1:11; - } ii_icrb0_b_fld_s; -} ii_icrb0_b_u_t; - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_c_u { - u64 ii_icrb0_c_regval; - struct { - u64 ic_source:15; - u64 ic_size:2; - u64 ic_ct:1; - u64 ic_bte_num:1; - u64 ic_gbr:1; - u64 ic_resprqd:1; - u64 ic_bo:1; - u64 ic_suppl:15; - u64 ic_rsvd:27; - } ii_icrb0_c_fld_s; -} ii_icrb0_c_u_t; - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_d_u { - u64 ii_icrb0_d_regval; - struct { - u64 id_pa_be:43; - u64 id_bte_op:1; - u64 id_pr_psc:4; - u64 id_pr_cnt:4; - u64 id_sleep:1; - u64 id_rsvd:11; - } ii_icrb0_d_fld_s; -} ii_icrb0_d_u_t; - -/************************************************************************ - * * - * Description: There are 15 CRB Entries (ICRB0 to ICRBE) that are * - * used for Crosstalk operations (both cacheline and partial * - * operations) or BTE/IO. Because the CRB entries are very wide, five * - * registers (_A to _E) are required to read and write each entry. * - * * - ************************************************************************/ - -typedef union ii_icrb0_e_u { - u64 ii_icrb0_e_regval; - struct { - u64 ie_timeout:8; - u64 ie_context:15; - u64 ie_rsvd:1; - u64 ie_tvld:1; - u64 ie_cvld:1; - u64 ie_rsvd_0:38; - } ii_icrb0_e_fld_s; -} ii_icrb0_e_u_t; - -/************************************************************************ - * * - * This register contains the lower 64 bits of the header of the * - * spurious message captured by II. Valid when the SP_MSG bit in ICMR * - * register is set. * - * * - ************************************************************************/ - -typedef union ii_icsml_u { - u64 ii_icsml_regval; - struct { - u64 i_tt_addr:47; - u64 i_newsuppl_ex:14; - u64 i_reserved:2; - u64 i_overflow:1; - } ii_icsml_fld_s; -} ii_icsml_u_t; - -/************************************************************************ - * * - * This register contains the middle 64 bits of the header of the * - * spurious message captured by II. Valid when the SP_MSG bit in ICMR * - * register is set. * - * * - ************************************************************************/ - -typedef union ii_icsmm_u { - u64 ii_icsmm_regval; - struct { - u64 i_tt_ack_cnt:11; - u64 i_reserved:53; - } ii_icsmm_fld_s; -} ii_icsmm_u_t; - -/************************************************************************ - * * - * This register contains the microscopic state, all the inputs to * - * the protocol table, captured with the spurious message. Valid when * - * the SP_MSG bit in the ICMR register is set. * - * * - ************************************************************************/ - -typedef union ii_icsmh_u { - u64 ii_icsmh_regval; - struct { - u64 i_tt_vld:1; - u64 i_xerr:1; - u64 i_ft_cwact_o:1; - u64 i_ft_wact_o:1; - u64 i_ft_active_o:1; - u64 i_sync:1; - u64 i_mnusg:1; - u64 i_mnusz:1; - u64 i_plusz:1; - u64 i_plusg:1; - u64 i_tt_exc:5; - u64 i_tt_wb:1; - u64 i_tt_hold:1; - u64 i_tt_ack:1; - u64 i_tt_resp:1; - u64 i_tt_intvn:1; - u64 i_g_stall_bte1:1; - u64 i_g_stall_bte0:1; - u64 i_g_stall_il:1; - u64 i_g_stall_ib:1; - u64 i_tt_imsg:8; - u64 i_tt_imsgtype:2; - u64 i_tt_use_old:1; - u64 i_tt_respreqd:1; - u64 i_tt_bte_num:1; - u64 i_cbn:1; - u64 i_match:1; - u64 i_rpcnt_lt_34:1; - u64 i_rpcnt_ge_34:1; - u64 i_rpcnt_lt_18:1; - u64 i_rpcnt_ge_18:1; - u64 i_rpcnt_lt_2:1; - u64 i_rpcnt_ge_2:1; - u64 i_rqcnt_lt_18:1; - u64 i_rqcnt_ge_18:1; - u64 i_rqcnt_lt_2:1; - u64 i_rqcnt_ge_2:1; - u64 i_tt_device:7; - u64 i_tt_init:3; - u64 i_reserved:5; - } ii_icsmh_fld_s; -} ii_icsmh_u_t; - -/************************************************************************ - * * - * The Shub DEBUG unit provides a 3-bit selection signal to the * - * II core and a 3-bit selection signal to the fsbclk domain in the II * - * wrapper. * - * * - ************************************************************************/ - -typedef union ii_idbss_u { - u64 ii_idbss_regval; - struct { - u64 i_iioclk_core_submenu:3; - u64 i_rsvd:5; - u64 i_fsbclk_wrapper_submenu:3; - u64 i_rsvd_1:5; - u64 i_iioclk_menu:5; - u64 i_rsvd_2:43; - } ii_idbss_fld_s; -} ii_idbss_u_t; - -/************************************************************************ - * * - * Description: This register is used to set up the length for a * - * transfer and then to monitor the progress of that transfer. This * - * register needs to be initialized before a transfer is started. A * - * legitimate write to this register will set the Busy bit, clear the * - * Error bit, and initialize the length to the value desired. * - * While the transfer is in progress, hardware will decrement the * - * length field with each successful block that is copied. Once the * - * transfer completes, hardware will clear the Busy bit. The length * - * field will also contain the number of cache lines left to be * - * transferred. * - * * - ************************************************************************/ - -typedef union ii_ibls0_u { - u64 ii_ibls0_regval; - struct { - u64 i_length:16; - u64 i_error:1; - u64 i_rsvd_1:3; - u64 i_busy:1; - u64 i_rsvd:43; - } ii_ibls0_fld_s; -} ii_ibls0_u_t; - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibsa0_u { - u64 ii_ibsa0_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:42; - u64 i_rsvd:15; - } ii_ibsa0_fld_s; -} ii_ibsa0_u_t; - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibda0_u { - u64 ii_ibda0_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:42; - u64 i_rsvd:15; - } ii_ibda0_fld_s; -} ii_ibda0_u_t; - -/************************************************************************ - * * - * Writing to this register sets up the attributes of the transfer * - * and initiates the transfer operation. Reading this register has * - * the side effect of terminating any transfer in progress. Note: * - * stopping a transfer midstream could have an adverse impact on the * - * other BTE. If a BTE stream has to be stopped (due to error * - * handling for example), both BTE streams should be stopped and * - * their transfers discarded. * - * * - ************************************************************************/ - -typedef union ii_ibct0_u { - u64 ii_ibct0_regval; - struct { - u64 i_zerofill:1; - u64 i_rsvd_2:3; - u64 i_notify:1; - u64 i_rsvd_1:3; - u64 i_poison:1; - u64 i_rsvd:55; - } ii_ibct0_fld_s; -} ii_ibct0_u_t; - -/************************************************************************ - * * - * This register contains the address to which the WINV is sent. * - * This address has to be cache line aligned. * - * * - ************************************************************************/ - -typedef union ii_ibna0_u { - u64 ii_ibna0_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:42; - u64 i_rsvd:15; - } ii_ibna0_fld_s; -} ii_ibna0_u_t; - -/************************************************************************ - * * - * This register contains the programmable level as well as the node * - * ID and PI unit of the processor to which the interrupt will be * - * sent. * - * * - ************************************************************************/ - -typedef union ii_ibia0_u { - u64 ii_ibia0_regval; - struct { - u64 i_rsvd_2:1; - u64 i_node_id:11; - u64 i_rsvd_1:4; - u64 i_level:7; - u64 i_rsvd:41; - } ii_ibia0_fld_s; -} ii_ibia0_u_t; - -/************************************************************************ - * * - * Description: This register is used to set up the length for a * - * transfer and then to monitor the progress of that transfer. This * - * register needs to be initialized before a transfer is started. A * - * legitimate write to this register will set the Busy bit, clear the * - * Error bit, and initialize the length to the value desired. * - * While the transfer is in progress, hardware will decrement the * - * length field with each successful block that is copied. Once the * - * transfer completes, hardware will clear the Busy bit. The length * - * field will also contain the number of cache lines left to be * - * transferred. * - * * - ************************************************************************/ - -typedef union ii_ibls1_u { - u64 ii_ibls1_regval; - struct { - u64 i_length:16; - u64 i_error:1; - u64 i_rsvd_1:3; - u64 i_busy:1; - u64 i_rsvd:43; - } ii_ibls1_fld_s; -} ii_ibls1_u_t; - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibsa1_u { - u64 ii_ibsa1_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:33; - u64 i_rsvd:24; - } ii_ibsa1_fld_s; -} ii_ibsa1_u_t; - -/************************************************************************ - * * - * This register should be loaded before a transfer is started. The * - * address to be loaded in bits 39:0 is the 40-bit TRex+ physical * - * address as described in Section 1.3, Figure2 and Figure3. Since * - * the bottom 7 bits of the address are always taken to be zero, BTE * - * transfers are always cacheline-aligned. * - * * - ************************************************************************/ - -typedef union ii_ibda1_u { - u64 ii_ibda1_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:33; - u64 i_rsvd:24; - } ii_ibda1_fld_s; -} ii_ibda1_u_t; - -/************************************************************************ - * * - * Writing to this register sets up the attributes of the transfer * - * and initiates the transfer operation. Reading this register has * - * the side effect of terminating any transfer in progress. Note: * - * stopping a transfer midstream could have an adverse impact on the * - * other BTE. If a BTE stream has to be stopped (due to error * - * handling for example), both BTE streams should be stopped and * - * their transfers discarded. * - * * - ************************************************************************/ - -typedef union ii_ibct1_u { - u64 ii_ibct1_regval; - struct { - u64 i_zerofill:1; - u64 i_rsvd_2:3; - u64 i_notify:1; - u64 i_rsvd_1:3; - u64 i_poison:1; - u64 i_rsvd:55; - } ii_ibct1_fld_s; -} ii_ibct1_u_t; - -/************************************************************************ - * * - * This register contains the address to which the WINV is sent. * - * This address has to be cache line aligned. * - * * - ************************************************************************/ - -typedef union ii_ibna1_u { - u64 ii_ibna1_regval; - struct { - u64 i_rsvd_1:7; - u64 i_addr:33; - u64 i_rsvd:24; - } ii_ibna1_fld_s; -} ii_ibna1_u_t; - -/************************************************************************ - * * - * This register contains the programmable level as well as the node * - * ID and PI unit of the processor to which the interrupt will be * - * sent. * - * * - ************************************************************************/ - -typedef union ii_ibia1_u { - u64 ii_ibia1_regval; - struct { - u64 i_pi_id:1; - u64 i_node_id:8; - u64 i_rsvd_1:7; - u64 i_level:7; - u64 i_rsvd:41; - } ii_ibia1_fld_s; -} ii_ibia1_u_t; - -/************************************************************************ - * * - * This register defines the resources that feed information into * - * the two performance counters located in the IO Performance * - * Profiling Register. There are 17 different quantities that can be * - * measured. Given these 17 different options, the two performance * - * counters have 15 of them in common; menu selections 0 through 0xE * - * are identical for each performance counter. As for the other two * - * options, one is available from one performance counter and the * - * other is available from the other performance counter. Hence, the * - * II supports all 17*16=272 possible combinations of quantities to * - * measure. * - * * - ************************************************************************/ - -typedef union ii_ipcr_u { - u64 ii_ipcr_regval; - struct { - u64 i_ippr0_c:4; - u64 i_ippr1_c:4; - u64 i_icct:8; - u64 i_rsvd:48; - } ii_ipcr_fld_s; -} ii_ipcr_u_t; - -/************************************************************************ - * * - * * - * * - ************************************************************************/ - -typedef union ii_ippr_u { - u64 ii_ippr_regval; - struct { - u64 i_ippr0:32; - u64 i_ippr1:32; - } ii_ippr_fld_s; -} ii_ippr_u_t; - -/************************************************************************ - * * - * The following defines which were not formed into structures are * - * probably indentical to another register, and the name of the * - * register is provided against each of these registers. This * - * information needs to be checked carefully * - * * - * IIO_ICRB1_A IIO_ICRB0_A * - * IIO_ICRB1_B IIO_ICRB0_B * - * IIO_ICRB1_C IIO_ICRB0_C * - * IIO_ICRB1_D IIO_ICRB0_D * - * IIO_ICRB1_E IIO_ICRB0_E * - * IIO_ICRB2_A IIO_ICRB0_A * - * IIO_ICRB2_B IIO_ICRB0_B * - * IIO_ICRB2_C IIO_ICRB0_C * - * IIO_ICRB2_D IIO_ICRB0_D * - * IIO_ICRB2_E IIO_ICRB0_E * - * IIO_ICRB3_A IIO_ICRB0_A * - * IIO_ICRB3_B IIO_ICRB0_B * - * IIO_ICRB3_C IIO_ICRB0_C * - * IIO_ICRB3_D IIO_ICRB0_D * - * IIO_ICRB3_E IIO_ICRB0_E * - * IIO_ICRB4_A IIO_ICRB0_A * - * IIO_ICRB4_B IIO_ICRB0_B * - * IIO_ICRB4_C IIO_ICRB0_C * - * IIO_ICRB4_D IIO_ICRB0_D * - * IIO_ICRB4_E IIO_ICRB0_E * - * IIO_ICRB5_A IIO_ICRB0_A * - * IIO_ICRB5_B IIO_ICRB0_B * - * IIO_ICRB5_C IIO_ICRB0_C * - * IIO_ICRB5_D IIO_ICRB0_D * - * IIO_ICRB5_E IIO_ICRB0_E * - * IIO_ICRB6_A IIO_ICRB0_A * - * IIO_ICRB6_B IIO_ICRB0_B * - * IIO_ICRB6_C IIO_ICRB0_C * - * IIO_ICRB6_D IIO_ICRB0_D * - * IIO_ICRB6_E IIO_ICRB0_E * - * IIO_ICRB7_A IIO_ICRB0_A * - * IIO_ICRB7_B IIO_ICRB0_B * - * IIO_ICRB7_C IIO_ICRB0_C * - * IIO_ICRB7_D IIO_ICRB0_D * - * IIO_ICRB7_E IIO_ICRB0_E * - * IIO_ICRB8_A IIO_ICRB0_A * - * IIO_ICRB8_B IIO_ICRB0_B * - * IIO_ICRB8_C IIO_ICRB0_C * - * IIO_ICRB8_D IIO_ICRB0_D * - * IIO_ICRB8_E IIO_ICRB0_E * - * IIO_ICRB9_A IIO_ICRB0_A * - * IIO_ICRB9_B IIO_ICRB0_B * - * IIO_ICRB9_C IIO_ICRB0_C * - * IIO_ICRB9_D IIO_ICRB0_D * - * IIO_ICRB9_E IIO_ICRB0_E * - * IIO_ICRBA_A IIO_ICRB0_A * - * IIO_ICRBA_B IIO_ICRB0_B * - * IIO_ICRBA_C IIO_ICRB0_C * - * IIO_ICRBA_D IIO_ICRB0_D * - * IIO_ICRBA_E IIO_ICRB0_E * - * IIO_ICRBB_A IIO_ICRB0_A * - * IIO_ICRBB_B IIO_ICRB0_B * - * IIO_ICRBB_C IIO_ICRB0_C * - * IIO_ICRBB_D IIO_ICRB0_D * - * IIO_ICRBB_E IIO_ICRB0_E * - * IIO_ICRBC_A IIO_ICRB0_A * - * IIO_ICRBC_B IIO_ICRB0_B * - * IIO_ICRBC_C IIO_ICRB0_C * - * IIO_ICRBC_D IIO_ICRB0_D * - * IIO_ICRBC_E IIO_ICRB0_E * - * IIO_ICRBD_A IIO_ICRB0_A * - * IIO_ICRBD_B IIO_ICRB0_B * - * IIO_ICRBD_C IIO_ICRB0_C * - * IIO_ICRBD_D IIO_ICRB0_D * - * IIO_ICRBD_E IIO_ICRB0_E * - * IIO_ICRBE_A IIO_ICRB0_A * - * IIO_ICRBE_B IIO_ICRB0_B * - * IIO_ICRBE_C IIO_ICRB0_C * - * IIO_ICRBE_D IIO_ICRB0_D * - * IIO_ICRBE_E IIO_ICRB0_E * - * * - ************************************************************************/ - -/* - * Slightly friendlier names for some common registers. - */ -#define IIO_WIDGET IIO_WID /* Widget identification */ -#define IIO_WIDGET_STAT IIO_WSTAT /* Widget status register */ -#define IIO_WIDGET_CTRL IIO_WCR /* Widget control register */ -#define IIO_PROTECT IIO_ILAPR /* IO interface protection */ -#define IIO_PROTECT_OVRRD IIO_ILAPO /* IO protect override */ -#define IIO_OUTWIDGET_ACCESS IIO_IOWA /* Outbound widget access */ -#define IIO_INWIDGET_ACCESS IIO_IIWA /* Inbound widget access */ -#define IIO_INDEV_ERR_MASK IIO_IIDEM /* Inbound device error mask */ -#define IIO_LLP_CSR IIO_ILCSR /* LLP control and status */ -#define IIO_LLP_LOG IIO_ILLR /* LLP log */ -#define IIO_XTALKCC_TOUT IIO_IXCC /* Xtalk credit count timeout */ -#define IIO_XTALKTT_TOUT IIO_IXTT /* Xtalk tail timeout */ -#define IIO_IO_ERR_CLR IIO_IECLR /* IO error clear */ -#define IIO_IGFX_0 IIO_IGFX0 -#define IIO_IGFX_1 IIO_IGFX1 -#define IIO_IBCT_0 IIO_IBCT0 -#define IIO_IBCT_1 IIO_IBCT1 -#define IIO_IBLS_0 IIO_IBLS0 -#define IIO_IBLS_1 IIO_IBLS1 -#define IIO_IBSA_0 IIO_IBSA0 -#define IIO_IBSA_1 IIO_IBSA1 -#define IIO_IBDA_0 IIO_IBDA0 -#define IIO_IBDA_1 IIO_IBDA1 -#define IIO_IBNA_0 IIO_IBNA0 -#define IIO_IBNA_1 IIO_IBNA1 -#define IIO_IBIA_0 IIO_IBIA0 -#define IIO_IBIA_1 IIO_IBIA1 -#define IIO_IOPRB_0 IIO_IPRB0 - -#define IIO_PRTE_A(_x) (IIO_IPRTE0_A + (8 * (_x))) -#define IIO_PRTE_B(_x) (IIO_IPRTE0_B + (8 * (_x))) -#define IIO_NUM_PRTES 8 /* Total number of PRB table entries */ -#define IIO_WIDPRTE_A(x) IIO_PRTE_A(((x) - 8)) /* widget ID to its PRTE num */ -#define IIO_WIDPRTE_B(x) IIO_PRTE_B(((x) - 8)) /* widget ID to its PRTE num */ - -#define IIO_NUM_IPRBS 9 - -#define IIO_LLP_CSR_IS_UP 0x00002000 -#define IIO_LLP_CSR_LLP_STAT_MASK 0x00003000 -#define IIO_LLP_CSR_LLP_STAT_SHFT 12 - -#define IIO_LLP_CB_MAX 0xffff /* in ILLR CB_CNT, Max Check Bit errors */ -#define IIO_LLP_SN_MAX 0xffff /* in ILLR SN_CNT, Max Sequence Number errors */ - -/* key to IIO_PROTECT_OVRRD */ -#define IIO_PROTECT_OVRRD_KEY 0x53474972756c6573ull /* "SGIrules" */ - -/* BTE register names */ -#define IIO_BTE_STAT_0 IIO_IBLS_0 /* Also BTE length/status 0 */ -#define IIO_BTE_SRC_0 IIO_IBSA_0 /* Also BTE source address 0 */ -#define IIO_BTE_DEST_0 IIO_IBDA_0 /* Also BTE dest. address 0 */ -#define IIO_BTE_CTRL_0 IIO_IBCT_0 /* Also BTE control/terminate 0 */ -#define IIO_BTE_NOTIFY_0 IIO_IBNA_0 /* Also BTE notification 0 */ -#define IIO_BTE_INT_0 IIO_IBIA_0 /* Also BTE interrupt 0 */ -#define IIO_BTE_OFF_0 0 /* Base offset from BTE 0 regs. */ -#define IIO_BTE_OFF_1 (IIO_IBLS_1 - IIO_IBLS_0) /* Offset from base to BTE 1 */ - -/* BTE register offsets from base */ -#define BTEOFF_STAT 0 -#define BTEOFF_SRC (IIO_BTE_SRC_0 - IIO_BTE_STAT_0) -#define BTEOFF_DEST (IIO_BTE_DEST_0 - IIO_BTE_STAT_0) -#define BTEOFF_CTRL (IIO_BTE_CTRL_0 - IIO_BTE_STAT_0) -#define BTEOFF_NOTIFY (IIO_BTE_NOTIFY_0 - IIO_BTE_STAT_0) -#define BTEOFF_INT (IIO_BTE_INT_0 - IIO_BTE_STAT_0) - -/* names used in shub diags */ -#define IIO_BASE_BTE0 IIO_IBLS_0 -#define IIO_BASE_BTE1 IIO_IBLS_1 - -/* - * Macro which takes the widget number, and returns the - * IO PRB address of that widget. - * value _x is expected to be a widget number in the range - * 0, 8 - 0xF - */ -#define IIO_IOPRB(_x) (IIO_IOPRB_0 + ( ( (_x) < HUB_WIDGET_ID_MIN ? \ - (_x) : \ - (_x) - (HUB_WIDGET_ID_MIN-1)) << 3) ) - -/* GFX Flow Control Node/Widget Register */ -#define IIO_IGFX_W_NUM_BITS 4 /* size of widget num field */ -#define IIO_IGFX_W_NUM_MASK ((1<> IIO_WSTAT_TXRETRY_SHFT) & \ - IIO_WSTAT_TXRETRY_MASK) - -/* Number of II perf. counters we can multiplex at once */ - -#define IO_PERF_SETS 32 - -/* Bit for the widget in inbound access register */ -#define IIO_IIWA_WIDGET(_w) ((u64)(1ULL << _w)) -/* Bit for the widget in outbound access register */ -#define IIO_IOWA_WIDGET(_w) ((u64)(1ULL << _w)) - -/* NOTE: The following define assumes that we are going to get - * widget numbers from 8 thru F and the device numbers within - * widget from 0 thru 7. - */ -#define IIO_IIDEM_WIDGETDEV_MASK(w, d) ((u64)(1ULL << (8 * ((w) - 8) + (d)))) - -/* IO Interrupt Destination Register */ -#define IIO_IIDSR_SENT_SHIFT 28 -#define IIO_IIDSR_SENT_MASK 0x30000000 -#define IIO_IIDSR_ENB_SHIFT 24 -#define IIO_IIDSR_ENB_MASK 0x01000000 -#define IIO_IIDSR_NODE_SHIFT 9 -#define IIO_IIDSR_NODE_MASK 0x000ff700 -#define IIO_IIDSR_PI_ID_SHIFT 8 -#define IIO_IIDSR_PI_ID_MASK 0x00000100 -#define IIO_IIDSR_LVL_SHIFT 0 -#define IIO_IIDSR_LVL_MASK 0x000000ff - -/* Xtalk timeout threshhold register (IIO_IXTT) */ -#define IXTT_RRSP_TO_SHFT 55 /* read response timeout */ -#define IXTT_RRSP_TO_MASK (0x1FULL << IXTT_RRSP_TO_SHFT) -#define IXTT_RRSP_PS_SHFT 32 /* read responsed TO prescalar */ -#define IXTT_RRSP_PS_MASK (0x7FFFFFULL << IXTT_RRSP_PS_SHFT) -#define IXTT_TAIL_TO_SHFT 0 /* tail timeout counter threshold */ -#define IXTT_TAIL_TO_MASK (0x3FFFFFFULL << IXTT_TAIL_TO_SHFT) - -/* - * The IO LLP control status register and widget control register - */ - -typedef union hubii_wcr_u { - u64 wcr_reg_value; - struct { - u64 wcr_widget_id:4, /* LLP crossbar credit */ - wcr_tag_mode:1, /* Tag mode */ - wcr_rsvd1:8, /* Reserved */ - wcr_xbar_crd:3, /* LLP crossbar credit */ - wcr_f_bad_pkt:1, /* Force bad llp pkt enable */ - wcr_dir_con:1, /* widget direct connect */ - wcr_e_thresh:5, /* elasticity threshold */ - wcr_rsvd:41; /* unused */ - } wcr_fields_s; -} hubii_wcr_t; - -#define iwcr_dir_con wcr_fields_s.wcr_dir_con - -/* The structures below are defined to extract and modify the ii -performance registers */ - -/* io_perf_sel allows the caller to specify what tests will be - performed */ - -typedef union io_perf_sel { - u64 perf_sel_reg; - struct { - u64 perf_ippr0:4, perf_ippr1:4, perf_icct:8, perf_rsvd:48; - } perf_sel_bits; -} io_perf_sel_t; - -/* io_perf_cnt is to extract the count from the shub registers. Due to - hardware problems there is only one counter, not two. */ - -typedef union io_perf_cnt { - u64 perf_cnt; - struct { - u64 perf_cnt:20, perf_rsvd2:12, perf_rsvd1:32; - } perf_cnt_bits; - -} io_perf_cnt_t; - -typedef union iprte_a { - u64 entry; - struct { - u64 i_rsvd_1:3; - u64 i_addr:38; - u64 i_init:3; - u64 i_source:8; - u64 i_rsvd:2; - u64 i_widget:4; - u64 i_to_cnt:5; - u64 i_vld:1; - } iprte_fields; -} iprte_a_t; - -#endif /* _ASM_IA64_SN_SHUBIO_H */ diff --git a/include/asm-ia64/sn/simulator.h b/include/asm-ia64/sn/simulator.h deleted file mode 100644 index c2611f6..0000000 --- a/include/asm-ia64/sn/simulator.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_SIMULATOR_H -#define _ASM_IA64_SN_SIMULATOR_H - -#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_SGI_UV) -#define SNMAGIC 0xaeeeeeee8badbeefL -#define IS_MEDUSA() ({long sn; asm("mov %0=cpuid[%1]" : "=r"(sn) : "r"(2)); sn == SNMAGIC;}) - -#define SIMULATOR_SLEEP() asm("nop.i 0x8beef") -#define IS_RUNNING_ON_SIMULATOR() (sn_prom_type) -#define IS_RUNNING_ON_FAKE_PROM() (sn_prom_type == 2) -extern int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */ -#else -#define IS_MEDUSA() 0 -#define SIMULATOR_SLEEP() -#define IS_RUNNING_ON_SIMULATOR() 0 -#endif - -#endif /* _ASM_IA64_SN_SIMULATOR_H */ diff --git a/include/asm-ia64/sn/sn2/sn_hwperf.h b/include/asm-ia64/sn/sn2/sn_hwperf.h deleted file mode 100644 index e61ebac..0000000 --- a/include/asm-ia64/sn/sn2/sn_hwperf.h +++ /dev/null @@ -1,242 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2004 Silicon Graphics, Inc. All rights reserved. - * - * Data types used by the SN_SAL_HWPERF_OP SAL call for monitoring - * SGI Altix node and router hardware - * - * Mark Goodwin Mon Aug 30 12:23:46 EST 2004 - */ - -#ifndef SN_HWPERF_H -#define SN_HWPERF_H - -/* - * object structure. SN_HWPERF_ENUM_OBJECTS and SN_HWPERF_GET_CPU_INFO - * return an array of these. Do not change this without also - * changing the corresponding SAL code. - */ -#define SN_HWPERF_MAXSTRING 128 -struct sn_hwperf_object_info { - u32 id; - union { - struct { - u64 this_part:1; - u64 is_shared:1; - } fields; - struct { - u64 flags; - u64 reserved; - } b; - } f; - char name[SN_HWPERF_MAXSTRING]; - char location[SN_HWPERF_MAXSTRING]; - u32 ports; -}; - -#define sn_hwp_this_part f.fields.this_part -#define sn_hwp_is_shared f.fields.is_shared -#define sn_hwp_flags f.b.flags - -/* macros for object classification */ -#define SN_HWPERF_IS_NODE(x) ((x) && strstr((x)->name, "SHub")) -#define SN_HWPERF_IS_NODE_SHUB2(x) ((x) && strstr((x)->name, "SHub 2.")) -#define SN_HWPERF_IS_IONODE(x) ((x) && strstr((x)->name, "TIO")) -#define SN_HWPERF_IS_NL3ROUTER(x) ((x) && strstr((x)->name, "NL3Router")) -#define SN_HWPERF_IS_NL4ROUTER(x) ((x) && strstr((x)->name, "NL4Router")) -#define SN_HWPERF_IS_OLDROUTER(x) ((x) && strstr((x)->name, "Router")) -#define SN_HWPERF_IS_ROUTER(x) (SN_HWPERF_IS_NL3ROUTER(x) || \ - SN_HWPERF_IS_NL4ROUTER(x) || \ - SN_HWPERF_IS_OLDROUTER(x)) -#define SN_HWPERF_FOREIGN(x) ((x) && !(x)->sn_hwp_this_part && !(x)->sn_hwp_is_shared) -#define SN_HWPERF_SAME_OBJTYPE(x,y) ((SN_HWPERF_IS_NODE(x) && SN_HWPERF_IS_NODE(y)) ||\ - (SN_HWPERF_IS_IONODE(x) && SN_HWPERF_IS_IONODE(y)) ||\ - (SN_HWPERF_IS_ROUTER(x) && SN_HWPERF_IS_ROUTER(y))) - -/* numa port structure, SN_HWPERF_ENUM_PORTS returns an array of these */ -struct sn_hwperf_port_info { - u32 port; - u32 conn_id; - u32 conn_port; -}; - -/* for HWPERF_{GET,SET}_MMRS */ -struct sn_hwperf_data { - u64 addr; - u64 data; -}; - -/* user ioctl() argument, see below */ -struct sn_hwperf_ioctl_args { - u64 arg; /* argument, usually an object id */ - u64 sz; /* size of transfer */ - void *ptr; /* pointer to source/target */ - u32 v0; /* second return value */ -}; - -/* - * For SN_HWPERF_{GET,SET}_MMRS and SN_HWPERF_OBJECT_DISTANCE, - * sn_hwperf_ioctl_args.arg can be used to specify a CPU on which - * to call SAL, and whether to use an interprocessor interrupt - * or task migration in order to do so. If the CPU specified is - * SN_HWPERF_ARG_ANY_CPU, then the current CPU will be used. - */ -#define SN_HWPERF_ARG_ANY_CPU 0x7fffffffUL -#define SN_HWPERF_ARG_CPU_MASK 0x7fffffff00000000ULL -#define SN_HWPERF_ARG_USE_IPI_MASK 0x8000000000000000ULL -#define SN_HWPERF_ARG_OBJID_MASK 0x00000000ffffffffULL - -/* - * ioctl requests on the "sn_hwperf" misc device that call SAL. - */ -#define SN_HWPERF_OP_MEM_COPYIN 0x1000 -#define SN_HWPERF_OP_MEM_COPYOUT 0x2000 -#define SN_HWPERF_OP_MASK 0x0fff - -/* - * Determine mem requirement. - * arg don't care - * sz 8 - * p pointer to u64 integer - */ -#define SN_HWPERF_GET_HEAPSIZE 1 - -/* - * Install mem for SAL drvr - * arg don't care - * sz sizeof buffer pointed to by p - * p pointer to buffer for scratch area - */ -#define SN_HWPERF_INSTALL_HEAP 2 - -/* - * Determine number of objects - * arg don't care - * sz 8 - * p pointer to u64 integer - */ -#define SN_HWPERF_OBJECT_COUNT (10|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Determine object "distance", relative to a cpu. This operation can - * execute on a designated logical cpu number, using either an IPI or - * via task migration. If the cpu number is SN_HWPERF_ANY_CPU, then - * the current CPU is used. See the SN_HWPERF_ARG_* macros above. - * - * arg bitmap of IPI flag, cpu number and object id - * sz 8 - * p pointer to u64 integer - */ -#define SN_HWPERF_OBJECT_DISTANCE (11|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Enumerate objects. Special case if sz == 8, returns the required - * buffer size. - * arg don't care - * sz sizeof buffer pointed to by p - * p pointer to array of struct sn_hwperf_object_info - */ -#define SN_HWPERF_ENUM_OBJECTS (12|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Enumerate NumaLink ports for an object. Special case if sz == 8, - * returns the required buffer size. - * arg object id - * sz sizeof buffer pointed to by p - * p pointer to array of struct sn_hwperf_port_info - */ -#define SN_HWPERF_ENUM_PORTS (13|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * SET/GET memory mapped registers. These operations can execute - * on a designated logical cpu number, using either an IPI or via - * task migration. If the cpu number is SN_HWPERF_ANY_CPU, then - * the current CPU is used. See the SN_HWPERF_ARG_* macros above. - * - * arg bitmap of ipi flag, cpu number and object id - * sz sizeof buffer pointed to by p - * p pointer to array of struct sn_hwperf_data - */ -#define SN_HWPERF_SET_MMRS (14|SN_HWPERF_OP_MEM_COPYIN) -#define SN_HWPERF_GET_MMRS (15|SN_HWPERF_OP_MEM_COPYOUT| \ - SN_HWPERF_OP_MEM_COPYIN) -/* - * Lock a shared object - * arg object id - * sz don't care - * p don't care - */ -#define SN_HWPERF_ACQUIRE 16 - -/* - * Unlock a shared object - * arg object id - * sz don't care - * p don't care - */ -#define SN_HWPERF_RELEASE 17 - -/* - * Break a lock on a shared object - * arg object id - * sz don't care - * p don't care - */ -#define SN_HWPERF_FORCE_RELEASE 18 - -/* - * ioctl requests on "sn_hwperf" that do not call SAL - */ - -/* - * get cpu info as an array of hwperf_object_info_t. - * id is logical CPU number, name is description, location - * is geoid (e.g. 001c04#1c). Special case if sz == 8, - * returns the required buffer size. - * - * arg don't care - * sz sizeof buffer pointed to by p - * p pointer to array of struct sn_hwperf_object_info - */ -#define SN_HWPERF_GET_CPU_INFO (100|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Given an object id, return it's node number (aka cnode). - * arg object id - * sz 8 - * p pointer to u64 integer - */ -#define SN_HWPERF_GET_OBJ_NODE (101|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Given a node number (cnode), return it's nasid. - * arg ordinal node number (aka cnodeid) - * sz 8 - * p pointer to u64 integer - */ -#define SN_HWPERF_GET_NODE_NASID (102|SN_HWPERF_OP_MEM_COPYOUT) - -/* - * Given a node id, determine the id of the nearest node with CPUs - * and the id of the nearest node that has memory. The argument - * node would normally be a "headless" node, e.g. an "IO node". - * Return 0 on success. - */ -extern int sn_hwperf_get_nearest_node(cnodeid_t node, - cnodeid_t *near_mem, cnodeid_t *near_cpu); - -/* return codes */ -#define SN_HWPERF_OP_OK 0 -#define SN_HWPERF_OP_NOMEM 1 -#define SN_HWPERF_OP_NO_PERM 2 -#define SN_HWPERF_OP_IO_ERROR 3 -#define SN_HWPERF_OP_BUSY 4 -#define SN_HWPERF_OP_RECONFIGURE 253 -#define SN_HWPERF_OP_INVAL 254 - -int sn_topology_open(struct inode *inode, struct file *file); -int sn_topology_release(struct inode *inode, struct file *file); -#endif /* SN_HWPERF_H */ diff --git a/include/asm-ia64/sn/sn_cpuid.h b/include/asm-ia64/sn/sn_cpuid.h deleted file mode 100644 index a676dd9..0000000 --- a/include/asm-ia64/sn/sn_cpuid.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved. - */ - - -#ifndef _ASM_IA64_SN_SN_CPUID_H -#define _ASM_IA64_SN_SN_CPUID_H - -#include -#include -#include -#include - - -/* - * Functions for converting between cpuids, nodeids and NASIDs. - * - * These are for SGI platforms only. - * - */ - - - - -/* - * Definitions of terms (these definitions are for IA64 ONLY. Other architectures - * use cpuid/cpunum quite defferently): - * - * CPUID - a number in range of 0..NR_CPUS-1 that uniquely identifies - * the cpu. The value cpuid has no significance on IA64 other than - * the boot cpu is 0. - * smp_processor_id() returns the cpuid of the current cpu. - * - * CPU_PHYSICAL_ID (also known as HARD_PROCESSOR_ID) - * This is the same as 31:24 of the processor LID register - * hard_smp_processor_id()- cpu_physical_id of current processor - * cpu_physical_id(cpuid) - convert a to a - * cpu_logical_id(phy_id) - convert a to a - * * not real efficient - don't use in perf critical code - * - * SLICE - a number in the range of 0 - 3 (typically) that represents the - * cpu number on a brick. - * - * SUBNODE - (almost obsolete) the number of the FSB that a cpu is - * connected to. This is also the same as the PI number. Usually 0 or 1. - * - * NOTE!!!: the value of the bits in the cpu physical id (SAPICid or LID) of a cpu has no - * significance. The SAPIC id (LID) is a 16-bit cookie that has meaning only to the PROM. - * - * - * The macros convert between cpu physical ids & slice/nasid/cnodeid. - * These terms are described below: - * - * - * Brick - * ----- ----- ----- ----- CPU - * | 0 | | 1 | | 0 | | 1 | SLICE - * ----- ----- ----- ----- - * | | | | - * | | | | - * 0 | | 2 0 | | 2 FSB SLOT - * ------- ------- - * | | - * | | - * | | - * ------------ ------------- - * | | | | - * | SHUB | | SHUB | NASID (0..MAX_NASIDS) - * | |----- | | CNODEID (0..num_compact_nodes-1) - * | | | | - * | | | | - * ------------ ------------- - * | | - * - * - */ - -#define get_node_number(addr) NASID_GET(addr) - -/* - * NOTE: on non-MP systems, only cpuid 0 exists - */ - -extern short physical_node_map[]; /* indexed by nasid to get cnode */ - -/* - * Macros for retrieving info about current cpu - */ -#define get_nasid() (sn_nodepda->phys_cpuid[smp_processor_id()].nasid) -#define get_subnode() (sn_nodepda->phys_cpuid[smp_processor_id()].subnode) -#define get_slice() (sn_nodepda->phys_cpuid[smp_processor_id()].slice) -#define get_cnode() (sn_nodepda->phys_cpuid[smp_processor_id()].cnode) -#define get_sapicid() ((ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff) - -/* - * Macros for retrieving info about an arbitrary cpu - * cpuid - logical cpu id - */ -#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid) -#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode) -#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice) - - -/* - * Dont use the following in performance critical code. They require scans - * of potentially large tables. - */ -extern int nasid_slice_to_cpuid(int, int); - -/* - * cnodeid_to_nasid - convert a cnodeid to a NASID - */ -#define cnodeid_to_nasid(cnodeid) (sn_cnodeid_to_nasid[cnodeid]) - -/* - * nasid_to_cnodeid - convert a NASID to a cnodeid - */ -#define nasid_to_cnodeid(nasid) (physical_node_map[nasid]) - -/* - * partition_coherence_id - get the coherence ID of the current partition - */ -extern u8 sn_coherency_id; -#define partition_coherence_id() (sn_coherency_id) - -#endif /* _ASM_IA64_SN_SN_CPUID_H */ - diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h deleted file mode 100644 index 8e83ac1..0000000 --- a/include/asm-ia64/sn/sn_feature_sets.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef _ASM_IA64_SN_FEATURE_SETS_H -#define _ASM_IA64_SN_FEATURE_SETS_H - -/* - * SN PROM Features - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2005-2006 Silicon Graphics, Inc. All rights reserved. - */ - - -/* --------------------- PROM Features -----------------------------*/ -extern int sn_prom_feature_available(int id); - -#define MAX_PROM_FEATURE_SETS 2 - -/* - * The following defines features that may or may not be supported by the - * current PROM. The OS uses sn_prom_feature_available(feature) to test for - * the presence of a PROM feature. Down rev (old) PROMs will always test - * "false" for new features. - * - * Use: - * if (sn_prom_feature_available(PRF_XXX)) - * ... - */ - -#define PRF_PAL_CACHE_FLUSH_SAFE 0 -#define PRF_DEVICE_FLUSH_LIST 1 -#define PRF_HOTPLUG_SUPPORT 2 -#define PRF_CPU_DISABLE_SUPPORT 3 - -/* --------------------- OS Features -------------------------------*/ - -/* - * The following defines OS features that are optionally present in - * the operating system. - * During boot, PROM is notified of these features via a series of calls: - * - * ia64_sn_set_os_feature(feature1); - * - * Once enabled, a feature cannot be disabled. - * - * By default, features are disabled unless explicitly enabled. - * - * These defines must be kept in sync with the corresponding - * PROM definitions in feature_sets.h. - */ -#define OSF_MCA_SLV_TO_OS_INIT_SLV 0 -#define OSF_FEAT_LOG_SBES 1 -#define OSF_ACPI_ENABLE 2 -#define OSF_PCISEGMENT_ENABLE 3 - - -#endif /* _ASM_IA64_SN_FEATURE_SETS_H */ diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h deleted file mode 100644 index 676b31a..0000000 --- a/include/asm-ia64/sn/sn_sal.h +++ /dev/null @@ -1,1188 +0,0 @@ -#ifndef _ASM_IA64_SN_SN_SAL_H -#define _ASM_IA64_SN_SN_SAL_H - -/* - * System Abstraction Layer definitions for IA64 - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved. - */ - - -#include -#include -#include -#include -#include -#include - -// SGI Specific Calls -#define SN_SAL_POD_MODE 0x02000001 -#define SN_SAL_SYSTEM_RESET 0x02000002 -#define SN_SAL_PROBE 0x02000003 -#define SN_SAL_GET_MASTER_NASID 0x02000004 -#define SN_SAL_GET_KLCONFIG_ADDR 0x02000005 -#define SN_SAL_LOG_CE 0x02000006 -#define SN_SAL_REGISTER_CE 0x02000007 -#define SN_SAL_GET_PARTITION_ADDR 0x02000009 -#define SN_SAL_XP_ADDR_REGION 0x0200000f -#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010 -#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011 -#define SN_SAL_PRINT_ERROR 0x02000012 -#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014 -#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant -#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant -#define SN_SAL_GET_SAPIC_INFO 0x0200001d -#define SN_SAL_GET_SN_INFO 0x0200001e -#define SN_SAL_CONSOLE_PUTC 0x02000021 -#define SN_SAL_CONSOLE_GETC 0x02000022 -#define SN_SAL_CONSOLE_PUTS 0x02000023 -#define SN_SAL_CONSOLE_GETS 0x02000024 -#define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025 -#define SN_SAL_CONSOLE_POLL 0x02000026 -#define SN_SAL_CONSOLE_INTR 0x02000027 -#define SN_SAL_CONSOLE_PUTB 0x02000028 -#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a -#define SN_SAL_CONSOLE_READC 0x0200002b -#define SN_SAL_SYSCTL_OP 0x02000030 -#define SN_SAL_SYSCTL_MODID_GET 0x02000031 -#define SN_SAL_SYSCTL_GET 0x02000032 -#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033 -#define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035 -#define SN_SAL_SYSCTL_SLAB_GET 0x02000036 -#define SN_SAL_BUS_CONFIG 0x02000037 -#define SN_SAL_SYS_SERIAL_GET 0x02000038 -#define SN_SAL_PARTITION_SERIAL_GET 0x02000039 -#define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a -#define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b -#define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c -#define SN_SAL_COHERENCE 0x0200003d -#define SN_SAL_MEMPROTECT 0x0200003e -#define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f - -#define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant -#define SN_SAL_IROUTER_OP 0x02000043 -#define SN_SAL_SYSCTL_EVENT 0x02000044 -#define SN_SAL_IOIF_INTERRUPT 0x0200004a -#define SN_SAL_HWPERF_OP 0x02000050 // lock -#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051 -#define SN_SAL_IOIF_PCI_SAFE 0x02000052 -#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053 -#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054 -#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055 -#define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056 -#define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057 -#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated -#define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a - -#define SN_SAL_IOIF_INIT 0x0200005f -#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 -#define SN_SAL_BTE_RECOVER 0x02000061 -#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 -#define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064 - -#define SN_SAL_GET_PROM_FEATURE_SET 0x02000065 -#define SN_SAL_SET_OS_FEATURE_SET 0x02000066 -#define SN_SAL_INJECT_ERROR 0x02000067 -#define SN_SAL_SET_CPU_NUMBER 0x02000068 - -#define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069 - -/* - * Service-specific constants - */ - -/* Console interrupt manipulation */ - /* action codes */ -#define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */ -#define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */ -#define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */ - /* interrupt specification & status return codes */ -#define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */ -#define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */ - -/* interrupt handling */ -#define SAL_INTR_ALLOC 1 -#define SAL_INTR_FREE 2 -#define SAL_INTR_REDIRECT 3 - -/* - * operations available on the generic SN_SAL_SYSCTL_OP - * runtime service - */ -#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */ -#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */ - -/* - * IRouter (i.e. generalized system controller) operations - */ -#define SAL_IROUTER_OPEN 0 /* open a subchannel */ -#define SAL_IROUTER_CLOSE 1 /* close a subchannel */ -#define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */ -#define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */ -#define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for - * an open subchannel - */ -#define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */ -#define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */ -#define SAL_IROUTER_INIT 7 /* initialize IRouter driver */ - -/* IRouter interrupt mask bits */ -#define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT -#define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV - -/* - * Error Handling Features - */ -#define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete -#define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete -#define SAL_ERR_FEAT_MFR_OVERRIDE 0x4 -#define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000 - -/* - * SAL Error Codes - */ -#define SALRET_MORE_PASSES 1 -#define SALRET_OK 0 -#define SALRET_NOT_IMPLEMENTED (-1) -#define SALRET_INVALID_ARG (-2) -#define SALRET_ERROR (-3) - -#define SN_SAL_FAKE_PROM 0x02009999 - -/** - * sn_sal_revision - get the SGI SAL revision number - * - * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor). - * This routine simply extracts the major and minor values and - * presents them in a u32 format. - * - * For example, version 4.05 would be represented at 0x0405. - */ -static inline u32 -sn_sal_rev(void) -{ - struct ia64_sal_systab *systab = __va(efi.sal_systab); - - return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor); -} - -/* - * Returns the master console nasid, if the call fails, return an illegal - * value. - */ -static inline u64 -ia64_sn_get_console_nasid(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0); - - if (ret_stuff.status < 0) - return ret_stuff.status; - - /* Master console nasid is in 'v0' */ - return ret_stuff.v0; -} - -/* - * Returns the master baseio nasid, if the call fails, return an illegal - * value. - */ -static inline u64 -ia64_sn_get_master_baseio_nasid(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0); - - if (ret_stuff.status < 0) - return ret_stuff.status; - - /* Master baseio nasid is in 'v0' */ - return ret_stuff.v0; -} - -static inline void * -ia64_sn_get_klconfig_addr(nasid_t nasid) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0); - return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL; -} - -/* - * Returns the next console character. - */ -static inline u64 -ia64_sn_console_getc(int *ch) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0); - - /* character is in 'v0' */ - *ch = (int)ret_stuff.v0; - - return ret_stuff.status; -} - -/* - * Read a character from the SAL console device, after a previous interrupt - * or poll operation has given us to know that a character is available - * to be read. - */ -static inline u64 -ia64_sn_console_readc(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0); - - /* character is in 'v0' */ - return ret_stuff.v0; -} - -/* - * Sends the given character to the console. - */ -static inline u64 -ia64_sn_console_putc(char ch) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0); - - return ret_stuff.status; -} - -/* - * Sends the given buffer to the console. - */ -static inline u64 -ia64_sn_console_putb(const char *buf, int len) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0); - - if ( ret_stuff.status == 0 ) { - return ret_stuff.v0; - } - return (u64)0; -} - -/* - * Print a platform error record - */ -static inline u64 -ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0); - - return ret_stuff.status; -} - -/* - * Check for Platform errors - */ -static inline u64 -ia64_sn_plat_cpei_handler(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0); - - return ret_stuff.status; -} - -/* - * Set Error Handling Features (Obsolete) - */ -static inline u64 -ia64_sn_plat_set_error_handling_features(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES, - SAL_ERR_FEAT_LOG_SBES, - 0, 0, 0, 0, 0, 0); - - return ret_stuff.status; -} - -/* - * Checks for console input. - */ -static inline u64 -ia64_sn_console_check(int *result) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0); - - /* result is in 'v0' */ - *result = (int)ret_stuff.v0; - - return ret_stuff.status; -} - -/* - * Checks console interrupt status - */ -static inline u64 -ia64_sn_console_intr_status(void) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, - 0, SAL_CONSOLE_INTR_STATUS, - 0, 0, 0, 0, 0); - - if (ret_stuff.status == 0) { - return ret_stuff.v0; - } - - return 0; -} - -/* - * Enable an interrupt on the SAL console device. - */ -static inline void -ia64_sn_console_intr_enable(u64 intr) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, - intr, SAL_CONSOLE_INTR_ON, - 0, 0, 0, 0, 0); -} - -/* - * Disable an interrupt on the SAL console device. - */ -static inline void -ia64_sn_console_intr_disable(u64 intr) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR, - intr, SAL_CONSOLE_INTR_OFF, - 0, 0, 0, 0, 0); -} - -/* - * Sends a character buffer to the console asynchronously. - */ -static inline u64 -ia64_sn_console_xmit_chars(char *buf, int len) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS, - (u64)buf, (u64)len, - 0, 0, 0, 0, 0); - - if (ret_stuff.status == 0) { - return ret_stuff.v0; - } - - return 0; -} - -/* - * Returns the iobrick module Id - */ -static inline u64 -ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0); - - /* result is in 'v0' */ - *result = (int)ret_stuff.v0; - - return ret_stuff.status; -} - -/** - * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function - * - * SN_SAL_POD_MODE actually takes an argument, but it's always - * 0 when we call it from the kernel, so we don't have to expose - * it to the caller. - */ -static inline u64 -ia64_sn_pod_mode(void) -{ - struct ia64_sal_retval isrv; - SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0); - if (isrv.status) - return 0; - return isrv.v0; -} - -/** - * ia64_sn_probe_mem - read from memory safely - * @addr: address to probe - * @size: number bytes to read (1,2,4,8) - * @data_ptr: address to store value read by probe (-1 returned if probe fails) - * - * Call into the SAL to do a memory read. If the read generates a machine - * check, this routine will recover gracefully and return -1 to the caller. - * @addr is usually a kernel virtual address in uncached space (i.e. the - * address starts with 0xc), but if called in physical mode, @addr should - * be a physical address. - * - * Return values: - * 0 - probe successful - * 1 - probe failed (generated MCA) - * 2 - Bad arg - * <0 - PAL error - */ -static inline u64 -ia64_sn_probe_mem(long addr, long size, void *data_ptr) -{ - struct ia64_sal_retval isrv; - - SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0); - - if (data_ptr) { - switch (size) { - case 1: - *((u8*)data_ptr) = (u8)isrv.v0; - break; - case 2: - *((u16*)data_ptr) = (u16)isrv.v0; - break; - case 4: - *((u32*)data_ptr) = (u32)isrv.v0; - break; - case 8: - *((u64*)data_ptr) = (u64)isrv.v0; - break; - default: - isrv.status = 2; - } - } - return isrv.status; -} - -/* - * Retrieve the system serial number as an ASCII string. - */ -static inline u64 -ia64_sn_sys_serial_get(char *buf) -{ - struct ia64_sal_retval ret_stuff; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0); - return ret_stuff.status; -} - -extern char sn_system_serial_number_string[]; -extern u64 sn_partition_serial_number; - -static inline char * -sn_system_serial_number(void) { - if (sn_system_serial_number_string[0]) { - return(sn_system_serial_number_string); - } else { - ia64_sn_sys_serial_get(sn_system_serial_number_string); - return(sn_system_serial_number_string); - } -} - - -/* - * Returns a unique id number for this system and partition (suitable for - * use with license managers), based in part on the system serial number. - */ -static inline u64 -ia64_sn_partition_serial_get(void) -{ - struct ia64_sal_retval ret_stuff; - ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0, - 0, 0, 0, 0, 0, 0); - if (ret_stuff.status != 0) - return 0; - return ret_stuff.v0; -} - -static inline u64 -sn_partition_serial_number_val(void) { - if (unlikely(sn_partition_serial_number == 0)) { - sn_partition_serial_number = ia64_sn_partition_serial_get(); - } - return sn_partition_serial_number; -} - -/* - * Returns the partition id of the nasid passed in as an argument, - * or INVALID_PARTID if the partition id cannot be retrieved. - */ -static inline partid_t -ia64_sn_sysctl_partition_get(nasid_t nasid) -{ - struct ia64_sal_retval ret_stuff; - SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid, - 0, 0, 0, 0, 0, 0); - if (ret_stuff.status != 0) - return -1; - return ((partid_t)ret_stuff.v0); -} - -/* - * Returns the physical address of the partition's reserved page through - * an iterative number of calls. - * - * On first call, 'cookie' and 'len' should be set to 0, and 'addr' - * set to the nasid of the partition whose reserved page's address is - * being sought. - * On subsequent calls, pass the values, that were passed back on the - * previous call. - * - * While the return status equals SALRET_MORE_PASSES, keep calling - * this function after first copying 'len' bytes starting at 'addr' - * into 'buf'. Once the return status equals SALRET_OK, 'addr' will - * be the physical address of the partition's reserved page. If the - * return status equals neither of these, an error as occurred. - */ -static inline s64 -sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len) -{ - struct ia64_sal_retval rv; - ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie, - *addr, buf, *len, 0, 0, 0); - *cookie = rv.v0; - *addr = rv.v1; - *len = rv.v2; - return rv.status; -} - -/* - * Register or unregister a physical address range being referenced across - * a partition boundary for which certain SAL errors should be scanned for, - * cleaned up and ignored. This is of value for kernel partitioning code only. - * Values for the operation argument: - * 1 = register this address range with SAL - * 0 = unregister this address range with SAL - * - * SAL maintains a reference count on an address range in case it is registered - * multiple times. - * - * On success, returns the reference count of the address range after the SAL - * call has performed the current registration/unregistration. Returns a - * negative value if an error occurred. - */ -static inline int -sn_register_xp_addr_region(u64 paddr, u64 len, int operation) -{ - struct ia64_sal_retval ret_stuff; - ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len, - (u64)operation, 0, 0, 0, 0); - return ret_stuff.status; -} - -/* - * Register or unregister an instruction range for which SAL errors should - * be ignored. If an error occurs while in the registered range, SAL jumps - * to return_addr after ignoring the error. Values for the operation argument: - * 1 = register this instruction range with SAL - * 0 = unregister this instruction range with SAL - * - * Returns 0 on success, or a negative value if an error occurred. - */ -static inline int -sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, - int virtual, int operation) -{ - struct ia64_sal_retval ret_stuff; - u64 call; - if (virtual) { - call = SN_SAL_NO_FAULT_ZONE_VIRTUAL; - } else { - call = SN_SAL_NO_FAULT_ZONE_PHYSICAL; - } - ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr, - (u64)1, 0, 0, 0); - return ret_stuff.status; -} - -/* - * Register or unregister a function to handle a PMI received by a CPU. - * Before calling the registered handler, SAL sets r1 to the value that - * was passed in as the global_pointer. - * - * If the handler pointer is NULL, then the currently registered handler - * will be unregistered. - * - * Returns 0 on success, or a negative value if an error occurred. - */ -static inline int -sn_register_pmi_handler(u64 handler, u64 global_pointer) -{ - struct ia64_sal_retval ret_stuff; - ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler, - global_pointer, 0, 0, 0, 0, 0); - return ret_stuff.status; -} - -/* - * Change or query the coherence domain for this partition. Each cpu-based - * nasid is represented by a bit in an array of 64-bit words: - * 0 = not in this partition's coherency domain - * 1 = in this partition's coherency domain - * - * It is not possible for the local system's nasids to be removed from - * the coherency domain. Purpose of the domain arguments: - * new_domain = set the coherence domain to the given nasids - * old_domain = return the current coherence domain - * - * Returns 0 on success, or a negative value if an error occurred. - */ -static inline int -sn_change_coherence(u64 *new_domain, u64 *old_domain) -{ - struct ia64_sal_retval ret_stuff; - ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain, - (u64)old_domain, 0, 0, 0, 0, 0); - return ret_stuff.status; -} - -/* - * Change memory access protections for a physical address range. - * nasid_array is not used on Altix, but may be in future architectures. - * Available memory protection access classes are defined after the function. - */ -static inline int -sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array) -{ - struct ia64_sal_retval ret_stuff; - - ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len, - (u64)nasid_array, perms, 0, 0, 0); - return ret_stuff.status; -} -#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080 -#define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2 -#define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca -#define SN_MEMPROT_ACCESS_CLASS_3 0x14a290 -#define SN_MEMPROT_ACCESS_CLASS_6 0x084080 -#define SN_MEMPROT_ACCESS_CLASS_7 0x021080 - -/* - * Turns off system power. - */ -static inline void -ia64_sn_power_down(void) -{ - struct ia64_sal_retval ret_stuff; - SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0); - while(1) - cpu_relax(); - /* never returns */ -} - -/** - * ia64_sn_fru_capture - tell the system controller to capture hw state - * - * This routine will call the SAL which will tell the system controller(s) - * to capture hw mmr information from each SHub in the system. - */ -static inline u64 -ia64_sn_fru_capture(void) -{ - struct ia64_sal_retval isrv; - SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0); - if (isrv.status) - return 0; - return isrv.v0; -} - -/* - * Performs an operation on a PCI bus or slot -- power up, power down - * or reset. - */ -static inline u64 -ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type, - u64 bus, char slot, - u64 action) -{ - struct ia64_sal_retval rv = {0, 0, 0, 0}; - - SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action, - bus, (u64) slot, 0, 0); - if (rv.status) - return rv.v0; - return 0; -} - - -/* - * Open a subchannel for sending arbitrary data to the system - * controller network via the system controller device associated with - * 'nasid'. Return the subchannel number or a negative error code. - */ -static inline int -ia64_sn_irtr_open(nasid_t nasid) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid, - 0, 0, 0, 0, 0); - return (int) rv.v0; -} - -/* - * Close system controller subchannel 'subch' previously opened on 'nasid'. - */ -static inline int -ia64_sn_irtr_close(nasid_t nasid, int subch) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE, - (u64) nasid, (u64) subch, 0, 0, 0, 0); - return (int) rv.status; -} - -/* - * Read data from system controller associated with 'nasid' on - * subchannel 'subch'. The buffer to be filled is pointed to by - * 'buf', and its capacity is in the integer pointed to by 'len'. The - * referent of 'len' is set to the number of bytes read by the SAL - * call. The return value is either SALRET_OK (for bytes read) or - * SALRET_ERROR (for error or "no data available"). - */ -static inline int -ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV, - (u64) nasid, (u64) subch, (u64) buf, (u64) len, - 0, 0); - return (int) rv.status; -} - -/* - * Write data to the system controller network via the system - * controller associated with 'nasid' on suchannel 'subch'. The - * buffer to be written out is pointed to by 'buf', and 'len' is the - * number of bytes to be written. The return value is either the - * number of bytes written (which could be zero) or a negative error - * code. - */ -static inline int -ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND, - (u64) nasid, (u64) subch, (u64) buf, (u64) len, - 0, 0); - return (int) rv.v0; -} - -/* - * Check whether any interrupts are pending for the system controller - * associated with 'nasid' and its subchannel 'subch'. The return - * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or - * SAL_IROUTER_INTR_RECV). - */ -static inline int -ia64_sn_irtr_intr(nasid_t nasid, int subch) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS, - (u64) nasid, (u64) subch, 0, 0, 0, 0); - return (int) rv.v0; -} - -/* - * Enable the interrupt indicated by the intr parameter (either - * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). - */ -static inline int -ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON, - (u64) nasid, (u64) subch, intr, 0, 0, 0); - return (int) rv.v0; -} - -/* - * Disable the interrupt indicated by the intr parameter (either - * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV). - */ -static inline int -ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF, - (u64) nasid, (u64) subch, intr, 0, 0, 0); - return (int) rv.v0; -} - -/* - * Set up a node as the point of contact for system controller - * environmental event delivery. - */ -static inline int -ia64_sn_sysctl_event_init(nasid_t nasid) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid, - 0, 0, 0, 0, 0, 0); - return (int) rv.v0; -} - -/* - * Ask the system controller on the specified nasid to reset - * the CX corelet clock. Only valid on TIO nodes. - */ -static inline int -ia64_sn_sysctl_tio_clock_reset(nasid_t nasid) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST, - nasid, 0, 0, 0, 0, 0); - if (rv.status != 0) - return (int)rv.status; - if (rv.v0 != 0) - return (int)rv.v0; - - return 0; -} - -/* - * Get the associated ioboard type for a given nasid. - */ -static inline s64 -ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard) -{ - struct ia64_sal_retval isrv; - SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD, - nasid, 0, 0, 0, 0, 0); - if (isrv.v0 != 0) { - *ioboard = isrv.v0; - return isrv.status; - } - if (isrv.v1 != 0) { - *ioboard = isrv.v1; - return isrv.status; - } - - return isrv.status; -} - -/** - * ia64_sn_get_fit_compt - read a FIT entry from the PROM header - * @nasid: NASID of node to read - * @index: FIT entry index to be retrieved (0..n) - * @fitentry: 16 byte buffer where FIT entry will be stored. - * @banbuf: optional buffer for retrieving banner - * @banlen: length of banner buffer - * - * Access to the physical PROM chips needs to be serialized since reads and - * writes can't occur at the same time, so we need to call into the SAL when - * we want to look at the FIT entries on the chips. - * - * Returns: - * %SALRET_OK if ok - * %SALRET_INVALID_ARG if index too big - * %SALRET_NOT_IMPLEMENTED if running on older PROM - * ??? if nasid invalid OR banner buffer not large enough - */ -static inline int -ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf, - u64 banlen) -{ - struct ia64_sal_retval rv; - SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry, - banbuf, banlen, 0, 0); - return (int) rv.status; -} - -/* - * Initialize the SAL components of the system controller - * communication driver; specifically pass in a sizable buffer that - * can be used for allocation of subchannel queues as new subchannels - * are opened. "buf" points to the buffer, and "len" specifies its - * length. - */ -static inline int -ia64_sn_irtr_init(nasid_t nasid, void *buf, int len) -{ - struct ia64_sal_retval rv; - SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT, - (u64) nasid, (u64) buf, (u64) len, 0, 0, 0); - return (int) rv.status; -} - -/* - * Returns the nasid, subnode & slice corresponding to a SAPIC ID - * - * In: - * arg0 - SN_SAL_GET_SAPIC_INFO - * arg1 - sapicid (lid >> 16) - * Out: - * v0 - nasid - * v1 - subnode - * v2 - slice - */ -static inline u64 -ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0); - -/***** BEGIN HACK - temp til old proms no longer supported ********/ - if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { - if (nasid) *nasid = sapicid & 0xfff; - if (subnode) *subnode = (sapicid >> 13) & 1; - if (slice) *slice = (sapicid >> 12) & 3; - return 0; - } -/***** END HACK *******/ - - if (ret_stuff.status < 0) - return ret_stuff.status; - - if (nasid) *nasid = (int) ret_stuff.v0; - if (subnode) *subnode = (int) ret_stuff.v1; - if (slice) *slice = (int) ret_stuff.v2; - return 0; -} - -/* - * Returns information about the HUB/SHUB. - * In: - * arg0 - SN_SAL_GET_SN_INFO - * arg1 - 0 (other values reserved for future use) - * Out: - * v0 - * [7:0] - shub type (0=shub1, 1=shub2) - * [15:8] - Log2 max number of nodes in entire system (includes - * C-bricks, I-bricks, etc) - * [23:16] - Log2 of nodes per sharing domain - * [31:24] - partition ID - * [39:32] - coherency_id - * [47:40] - regionsize - * v1 - * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid) - * [23:15] - bit position of low nasid bit - */ -static inline u64 -ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift, - u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg) -{ - struct ia64_sal_retval ret_stuff; - - ret_stuff.status = 0; - ret_stuff.v0 = 0; - ret_stuff.v1 = 0; - ret_stuff.v2 = 0; - SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0); - -/***** BEGIN HACK - temp til old proms no longer supported ********/ - if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) { - int nasid = get_sapicid() & 0xfff; -#define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL -#define SH_SHUB_ID_NODES_PER_BIT_SHFT 48 - if (shubtype) *shubtype = 0; - if (nasid_bitmask) *nasid_bitmask = 0x7ff; - if (nasid_shift) *nasid_shift = 38; - if (systemsize) *systemsize = 10; - if (sharing_domain_size) *sharing_domain_size = 8; - if (partid) *partid = ia64_sn_sysctl_partition_get(nasid); - if (coher) *coher = nasid >> 9; - if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >> - SH_SHUB_ID_NODES_PER_BIT_SHFT; - return 0; - } -/***** END HACK *******/ - - if (ret_stuff.status < 0) - return ret_stuff.status; - - if (shubtype) *shubtype = ret_stuff.v0 & 0xff; - if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff; - if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff; - if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff; - if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff; - if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff; - if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff); - if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff; - return 0; -} - -/* - * This is the access point to the Altix PROM hardware performance - * and status monitoring interface. For info on using this, see - * include/asm-ia64/sn/sn2/sn_hwperf.h - */ -static inline int -ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2, - u64 a3, u64 a4, int *v0) -{ - struct ia64_sal_retval rv; - SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid, - opcode, a0, a1, a2, a3, a4); - if (v0) - *v0 = (int) rv.v0; - return (int) rv.status; -} - -static inline int -ia64_sn_ioif_get_pci_topology(u64 buf, u64 len) -{ - struct ia64_sal_retval rv; - SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0); - return (int) rv.status; -} - -/* - * BTE error recovery is implemented in SAL - */ -static inline int -ia64_sn_bte_recovery(nasid_t nasid) -{ - struct ia64_sal_retval rv; - - rv.status = 0; - SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0); - if (rv.status == SALRET_NOT_IMPLEMENTED) - return 0; - return (int) rv.status; -} - -static inline int -ia64_sn_is_fake_prom(void) -{ - struct ia64_sal_retval rv; - SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0); - return (rv.status == 0); -} - -static inline int -ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set) -{ - struct ia64_sal_retval rv; - - SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0); - if (rv.status != 0) - return rv.status; - *feature_set = rv.v0; - return 0; -} - -static inline int -ia64_sn_set_os_feature(int feature) -{ - struct ia64_sal_retval rv; - - SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0); - return rv.status; -} - -static inline int -sn_inject_error(u64 paddr, u64 *data, u64 *ecc) -{ - struct ia64_sal_retval ret_stuff; - - ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data, - (u64)ecc, 0, 0, 0, 0); - return ret_stuff.status; -} - -static inline int -ia64_sn_set_cpu_number(int cpu) -{ - struct ia64_sal_retval rv; - - SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0); - return rv.status; -} -static inline int -ia64_sn_kernel_launch_event(void) -{ - struct ia64_sal_retval rv; - SAL_CALL_NOLOCK(rv, SN_SAL_KERNEL_LAUNCH_EVENT, 0, 0, 0, 0, 0, 0, 0); - return rv.status; -} -#endif /* _ASM_IA64_SN_SN_SAL_H */ diff --git a/include/asm-ia64/sn/tioca.h b/include/asm-ia64/sn/tioca.h deleted file mode 100644 index 666222d..0000000 --- a/include/asm-ia64/sn/tioca.h +++ /dev/null @@ -1,596 +0,0 @@ -#ifndef _ASM_IA64_SN_TIO_TIOCA_H -#define _ASM_IA64_SN_TIO_TIOCA_H - -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. - */ - - -#define TIOCA_PART_NUM 0xE020 -#define TIOCA_MFGR_NUM 0x24 -#define TIOCA_REV_A 0x1 - -/* - * Register layout for TIO:CA. See below for bitmasks for each register. - */ - -struct tioca { - u64 ca_id; /* 0x000000 */ - u64 ca_control1; /* 0x000008 */ - u64 ca_control2; /* 0x000010 */ - u64 ca_status1; /* 0x000018 */ - u64 ca_status2; /* 0x000020 */ - u64 ca_gart_aperature; /* 0x000028 */ - u64 ca_gfx_detach; /* 0x000030 */ - u64 ca_inta_dest_addr; /* 0x000038 */ - u64 ca_intb_dest_addr; /* 0x000040 */ - u64 ca_err_int_dest_addr; /* 0x000048 */ - u64 ca_int_status; /* 0x000050 */ - u64 ca_int_status_alias; /* 0x000058 */ - u64 ca_mult_error; /* 0x000060 */ - u64 ca_mult_error_alias; /* 0x000068 */ - u64 ca_first_error; /* 0x000070 */ - u64 ca_int_mask; /* 0x000078 */ - u64 ca_crm_pkterr_type; /* 0x000080 */ - u64 ca_crm_pkterr_type_alias; /* 0x000088 */ - u64 ca_crm_ct_error_detail_1; /* 0x000090 */ - u64 ca_crm_ct_error_detail_2; /* 0x000098 */ - u64 ca_crm_tnumto; /* 0x0000A0 */ - u64 ca_gart_err; /* 0x0000A8 */ - u64 ca_pcierr_type; /* 0x0000B0 */ - u64 ca_pcierr_addr; /* 0x0000B8 */ - - u64 ca_pad_0000C0[3]; /* 0x0000{C0..D0} */ - - u64 ca_pci_rd_buf_flush; /* 0x0000D8 */ - u64 ca_pci_dma_addr_extn; /* 0x0000E0 */ - u64 ca_agp_dma_addr_extn; /* 0x0000E8 */ - u64 ca_force_inta; /* 0x0000F0 */ - u64 ca_force_intb; /* 0x0000F8 */ - u64 ca_debug_vector_sel; /* 0x000100 */ - u64 ca_debug_mux_core_sel; /* 0x000108 */ - u64 ca_debug_mux_pci_sel; /* 0x000110 */ - u64 ca_debug_domain_sel; /* 0x000118 */ - - u64 ca_pad_000120[28]; /* 0x0001{20..F8} */ - - u64 ca_gart_ptr_table; /* 0x200 */ - u64 ca_gart_tlb_addr[8]; /* 0x2{08..40} */ -}; - -/* - * Mask/shift definitions for TIO:CA registers. The convention here is - * to mainly use the names as they appear in the "TIO AEGIS Programmers' - * Reference" with a CA_ prefix added. Some exceptions were made to fix - * duplicate field names or to generalize fields that are common to - * different registers (ca_debug_mux_core_sel and ca_debug_mux_pci_sel for - * example). - * - * Fields consisting of a single bit have a single #define have a single - * macro declaration to mask the bit. Fields consisting of multiple bits - * have two declarations: one to mask the proper bits in a register, and - * a second with the suffix "_SHFT" to identify how far the mask needs to - * be shifted right to get its base value. - */ - -/* ==== ca_control1 */ -#define CA_SYS_BIG_END (1ull << 0) -#define CA_DMA_AGP_SWAP (1ull << 1) -#define CA_DMA_PCI_SWAP (1ull << 2) -#define CA_PIO_IO_SWAP (1ull << 3) -#define CA_PIO_MEM_SWAP (1ull << 4) -#define CA_GFX_WR_SWAP (1ull << 5) -#define CA_AGP_FW_ENABLE (1ull << 6) -#define CA_AGP_CAL_CYCLE (0x7ull << 7) -#define CA_AGP_CAL_CYCLE_SHFT 7 -#define CA_AGP_CAL_PRSCL_BYP (1ull << 10) -#define CA_AGP_INIT_CAL_ENB (1ull << 11) -#define CA_INJ_ADDR_PERR (1ull << 12) -#define CA_INJ_DATA_PERR (1ull << 13) - /* bits 15:14 unused */ -#define CA_PCIM_IO_NBE_AD (0x7ull << 16) -#define CA_PCIM_IO_NBE_AD_SHFT 16 -#define CA_PCIM_FAST_BTB_ENB (1ull << 19) - /* bits 23:20 unused */ -#define CA_PIO_ADDR_OFFSET (0xffull << 24) -#define CA_PIO_ADDR_OFFSET_SHFT 24 - /* bits 35:32 unused */ -#define CA_AGPDMA_OP_COMBDELAY (0x1full << 36) -#define CA_AGPDMA_OP_COMBDELAY_SHFT 36 - /* bit 41 unused */ -#define CA_AGPDMA_OP_ENB_COMBDELAY (1ull << 42) -#define CA_PCI_INT_LPCNT (0xffull << 44) -#define CA_PCI_INT_LPCNT_SHFT 44 - /* bits 63:52 unused */ - -/* ==== ca_control2 */ -#define CA_AGP_LATENCY_TO (0xffull << 0) -#define CA_AGP_LATENCY_TO_SHFT 0 -#define CA_PCI_LATENCY_TO (0xffull << 8) -#define CA_PCI_LATENCY_TO_SHFT 8 -#define CA_PCI_MAX_RETRY (0x3ffull << 16) -#define CA_PCI_MAX_RETRY_SHFT 16 - /* bits 27:26 unused */ -#define CA_RT_INT_EN (0x3ull << 28) -#define CA_RT_INT_EN_SHFT 28 -#define CA_MSI_INT_ENB (1ull << 30) -#define CA_PCI_ARB_ERR_ENB (1ull << 31) -#define CA_GART_MEM_PARAM (0x3ull << 32) -#define CA_GART_MEM_PARAM_SHFT 32 -#define CA_GART_RD_PREFETCH_ENB (1ull << 34) -#define CA_GART_WR_PREFETCH_ENB (1ull << 35) -#define CA_GART_FLUSH_TLB (1ull << 36) - /* bits 39:37 unused */ -#define CA_CRM_TNUMTO_PERIOD (0x1fffull << 40) -#define CA_CRM_TNUMTO_PERIOD_SHFT 40 - /* bits 55:53 unused */ -#define CA_CRM_TNUMTO_ENB (1ull << 56) -#define CA_CRM_PRESCALER_BYP (1ull << 57) - /* bits 59:58 unused */ -#define CA_CRM_MAX_CREDIT (0x7ull << 60) -#define CA_CRM_MAX_CREDIT_SHFT 60 - /* bit 63 unused */ - -/* ==== ca_status1 */ -#define CA_CORELET_ID (0x3ull << 0) -#define CA_CORELET_ID_SHFT 0 -#define CA_INTA_N (1ull << 2) -#define CA_INTB_N (1ull << 3) -#define CA_CRM_CREDIT_AVAIL (0x7ull << 4) -#define CA_CRM_CREDIT_AVAIL_SHFT 4 - /* bit 7 unused */ -#define CA_CRM_SPACE_AVAIL (0x7full << 8) -#define CA_CRM_SPACE_AVAIL_SHFT 8 - /* bit 15 unused */ -#define CA_GART_TLB_VAL (0xffull << 16) -#define CA_GART_TLB_VAL_SHFT 16 - /* bits 63:24 unused */ - -/* ==== ca_status2 */ -#define CA_GFX_CREDIT_AVAIL (0xffull << 0) -#define CA_GFX_CREDIT_AVAIL_SHFT 0 -#define CA_GFX_OPQ_AVAIL (0xffull << 8) -#define CA_GFX_OPQ_AVAIL_SHFT 8 -#define CA_GFX_WRBUFF_AVAIL (0xffull << 16) -#define CA_GFX_WRBUFF_AVAIL_SHFT 16 -#define CA_ADMA_OPQ_AVAIL (0xffull << 24) -#define CA_ADMA_OPQ_AVAIL_SHFT 24 -#define CA_ADMA_WRBUFF_AVAIL (0xffull << 32) -#define CA_ADMA_WRBUFF_AVAIL_SHFT 32 -#define CA_ADMA_RDBUFF_AVAIL (0x7full << 40) -#define CA_ADMA_RDBUFF_AVAIL_SHFT 40 -#define CA_PCI_PIO_OP_STAT (1ull << 47) -#define CA_PDMA_OPQ_AVAIL (0xfull << 48) -#define CA_PDMA_OPQ_AVAIL_SHFT 48 -#define CA_PDMA_WRBUFF_AVAIL (0xfull << 52) -#define CA_PDMA_WRBUFF_AVAIL_SHFT 52 -#define CA_PDMA_RDBUFF_AVAIL (0x3ull << 56) -#define CA_PDMA_RDBUFF_AVAIL_SHFT 56 - /* bits 63:58 unused */ - -/* ==== ca_gart_aperature */ -#define CA_GART_AP_ENB_AGP (1ull << 0) -#define CA_GART_PAGE_SIZE (1ull << 1) -#define CA_GART_AP_ENB_PCI (1ull << 2) - /* bits 11:3 unused */ -#define CA_GART_AP_SIZE (0x3ffull << 12) -#define CA_GART_AP_SIZE_SHFT 12 -#define CA_GART_AP_BASE (0x3ffffffffffull << 22) -#define CA_GART_AP_BASE_SHFT 22 - -/* ==== ca_inta_dest_addr - ==== ca_intb_dest_addr - ==== ca_err_int_dest_addr */ - /* bits 2:0 unused */ -#define CA_INT_DEST_ADDR (0x7ffffffffffffull << 3) -#define CA_INT_DEST_ADDR_SHFT 3 - /* bits 55:54 unused */ -#define CA_INT_DEST_VECT (0xffull << 56) -#define CA_INT_DEST_VECT_SHFT 56 - -/* ==== ca_int_status */ -/* ==== ca_int_status_alias */ -/* ==== ca_mult_error */ -/* ==== ca_mult_error_alias */ -/* ==== ca_first_error */ -/* ==== ca_int_mask */ -#define CA_PCI_ERR (1ull << 0) - /* bits 3:1 unused */ -#define CA_GART_FETCH_ERR (1ull << 4) -#define CA_GFX_WR_OVFLW (1ull << 5) -#define CA_PIO_REQ_OVFLW (1ull << 6) -#define CA_CRM_PKTERR (1ull << 7) -#define CA_CRM_DVERR (1ull << 8) -#define CA_TNUMTO (1ull << 9) -#define CA_CXM_RSP_CRED_OVFLW (1ull << 10) -#define CA_CXM_REQ_CRED_OVFLW (1ull << 11) -#define CA_PIO_INVALID_ADDR (1ull << 12) -#define CA_PCI_ARB_TO (1ull << 13) -#define CA_AGP_REQ_OFLOW (1ull << 14) -#define CA_SBA_TYPE1_ERR (1ull << 15) - /* bit 16 unused */ -#define CA_INTA (1ull << 17) -#define CA_INTB (1ull << 18) -#define CA_MULT_INTA (1ull << 19) -#define CA_MULT_INTB (1ull << 20) -#define CA_GFX_CREDIT_OVFLW (1ull << 21) - /* bits 63:22 unused */ - -/* ==== ca_crm_pkterr_type */ -/* ==== ca_crm_pkterr_type_alias */ -#define CA_CRM_PKTERR_SBERR_HDR (1ull << 0) -#define CA_CRM_PKTERR_DIDN (1ull << 1) -#define CA_CRM_PKTERR_PACTYPE (1ull << 2) -#define CA_CRM_PKTERR_INV_TNUM (1ull << 3) -#define CA_CRM_PKTERR_ADDR_RNG (1ull << 4) -#define CA_CRM_PKTERR_ADDR_ALGN (1ull << 5) -#define CA_CRM_PKTERR_HDR_PARAM (1ull << 6) -#define CA_CRM_PKTERR_CW_ERR (1ull << 7) -#define CA_CRM_PKTERR_SBERR_NH (1ull << 8) -#define CA_CRM_PKTERR_EARLY_TERM (1ull << 9) -#define CA_CRM_PKTERR_EARLY_TAIL (1ull << 10) -#define CA_CRM_PKTERR_MSSNG_TAIL (1ull << 11) -#define CA_CRM_PKTERR_MSSNG_HDR (1ull << 12) - /* bits 15:13 unused */ -#define CA_FIRST_CRM_PKTERR_SBERR_HDR (1ull << 16) -#define CA_FIRST_CRM_PKTERR_DIDN (1ull << 17) -#define CA_FIRST_CRM_PKTERR_PACTYPE (1ull << 18) -#define CA_FIRST_CRM_PKTERR_INV_TNUM (1ull << 19) -#define CA_FIRST_CRM_PKTERR_ADDR_RNG (1ull << 20) -#define CA_FIRST_CRM_PKTERR_ADDR_ALGN (1ull << 21) -#define CA_FIRST_CRM_PKTERR_HDR_PARAM (1ull << 22) -#define CA_FIRST_CRM_PKTERR_CW_ERR (1ull << 23) -#define CA_FIRST_CRM_PKTERR_SBERR_NH (1ull << 24) -#define CA_FIRST_CRM_PKTERR_EARLY_TERM (1ull << 25) -#define CA_FIRST_CRM_PKTERR_EARLY_TAIL (1ull << 26) -#define CA_FIRST_CRM_PKTERR_MSSNG_TAIL (1ull << 27) -#define CA_FIRST_CRM_PKTERR_MSSNG_HDR (1ull << 28) - /* bits 63:29 unused */ - -/* ==== ca_crm_ct_error_detail_1 */ -#define CA_PKT_TYPE (0xfull << 0) -#define CA_PKT_TYPE_SHFT 0 -#define CA_SRC_ID (0x3ull << 4) -#define CA_SRC_ID_SHFT 4 -#define CA_DATA_SZ (0x3ull << 6) -#define CA_DATA_SZ_SHFT 6 -#define CA_TNUM (0xffull << 8) -#define CA_TNUM_SHFT 8 -#define CA_DW_DATA_EN (0xffull << 16) -#define CA_DW_DATA_EN_SHFT 16 -#define CA_GFX_CRED (0xffull << 24) -#define CA_GFX_CRED_SHFT 24 -#define CA_MEM_RD_PARAM (0x3ull << 32) -#define CA_MEM_RD_PARAM_SHFT 32 -#define CA_PIO_OP (1ull << 34) -#define CA_CW_ERR (1ull << 35) - /* bits 62:36 unused */ -#define CA_VALID (1ull << 63) - -/* ==== ca_crm_ct_error_detail_2 */ - /* bits 2:0 unused */ -#define CA_PKT_ADDR (0x1fffffffffffffull << 3) -#define CA_PKT_ADDR_SHFT 3 - /* bits 63:56 unused */ - -/* ==== ca_crm_tnumto */ -#define CA_CRM_TNUMTO_VAL (0xffull << 0) -#define CA_CRM_TNUMTO_VAL_SHFT 0 -#define CA_CRM_TNUMTO_WR (1ull << 8) - /* bits 63:9 unused */ - -/* ==== ca_gart_err */ -#define CA_GART_ERR_SOURCE (0x3ull << 0) -#define CA_GART_ERR_SOURCE_SHFT 0 - /* bits 3:2 unused */ -#define CA_GART_ERR_ADDR (0xfffffffffull << 4) -#define CA_GART_ERR_ADDR_SHFT 4 - /* bits 63:40 unused */ - -/* ==== ca_pcierr_type */ -#define CA_PCIERR_DATA (0xffffffffull << 0) -#define CA_PCIERR_DATA_SHFT 0 -#define CA_PCIERR_ENB (0xfull << 32) -#define CA_PCIERR_ENB_SHFT 32 -#define CA_PCIERR_CMD (0xfull << 36) -#define CA_PCIERR_CMD_SHFT 36 -#define CA_PCIERR_A64 (1ull << 40) -#define CA_PCIERR_SLV_SERR (1ull << 41) -#define CA_PCIERR_SLV_WR_PERR (1ull << 42) -#define CA_PCIERR_SLV_RD_PERR (1ull << 43) -#define CA_PCIERR_MST_SERR (1ull << 44) -#define CA_PCIERR_MST_WR_PERR (1ull << 45) -#define CA_PCIERR_MST_RD_PERR (1ull << 46) -#define CA_PCIERR_MST_MABT (1ull << 47) -#define CA_PCIERR_MST_TABT (1ull << 48) -#define CA_PCIERR_MST_RETRY_TOUT (1ull << 49) - -#define CA_PCIERR_TYPES \ - (CA_PCIERR_A64|CA_PCIERR_SLV_SERR| \ - CA_PCIERR_SLV_WR_PERR|CA_PCIERR_SLV_RD_PERR| \ - CA_PCIERR_MST_SERR|CA_PCIERR_MST_WR_PERR|CA_PCIERR_MST_RD_PERR| \ - CA_PCIERR_MST_MABT|CA_PCIERR_MST_TABT|CA_PCIERR_MST_RETRY_TOUT) - - /* bits 63:50 unused */ - -/* ==== ca_pci_dma_addr_extn */ -#define CA_UPPER_NODE_OFFSET (0x3full << 0) -#define CA_UPPER_NODE_OFFSET_SHFT 0 - /* bits 7:6 unused */ -#define CA_CHIPLET_ID (0x3ull << 8) -#define CA_CHIPLET_ID_SHFT 8 - /* bits 11:10 unused */ -#define CA_PCI_DMA_NODE_ID (0xffffull << 12) -#define CA_PCI_DMA_NODE_ID_SHFT 12 - /* bits 27:26 unused */ -#define CA_PCI_DMA_PIO_MEM_TYPE (1ull << 28) - /* bits 63:29 unused */ - - -/* ==== ca_agp_dma_addr_extn */ - /* bits 19:0 unused */ -#define CA_AGP_DMA_NODE_ID (0xffffull << 20) -#define CA_AGP_DMA_NODE_ID_SHFT 20 - /* bits 27:26 unused */ -#define CA_AGP_DMA_PIO_MEM_TYPE (1ull << 28) - /* bits 63:29 unused */ - -/* ==== ca_debug_vector_sel */ -#define CA_DEBUG_MN_VSEL (0xfull << 0) -#define CA_DEBUG_MN_VSEL_SHFT 0 -#define CA_DEBUG_PP_VSEL (0xfull << 4) -#define CA_DEBUG_PP_VSEL_SHFT 4 -#define CA_DEBUG_GW_VSEL (0xfull << 8) -#define CA_DEBUG_GW_VSEL_SHFT 8 -#define CA_DEBUG_GT_VSEL (0xfull << 12) -#define CA_DEBUG_GT_VSEL_SHFT 12 -#define CA_DEBUG_PD_VSEL (0xfull << 16) -#define CA_DEBUG_PD_VSEL_SHFT 16 -#define CA_DEBUG_AD_VSEL (0xfull << 20) -#define CA_DEBUG_AD_VSEL_SHFT 20 -#define CA_DEBUG_CX_VSEL (0xfull << 24) -#define CA_DEBUG_CX_VSEL_SHFT 24 -#define CA_DEBUG_CR_VSEL (0xfull << 28) -#define CA_DEBUG_CR_VSEL_SHFT 28 -#define CA_DEBUG_BA_VSEL (0xfull << 32) -#define CA_DEBUG_BA_VSEL_SHFT 32 -#define CA_DEBUG_PE_VSEL (0xfull << 36) -#define CA_DEBUG_PE_VSEL_SHFT 36 -#define CA_DEBUG_BO_VSEL (0xfull << 40) -#define CA_DEBUG_BO_VSEL_SHFT 40 -#define CA_DEBUG_BI_VSEL (0xfull << 44) -#define CA_DEBUG_BI_VSEL_SHFT 44 -#define CA_DEBUG_AS_VSEL (0xfull << 48) -#define CA_DEBUG_AS_VSEL_SHFT 48 -#define CA_DEBUG_PS_VSEL (0xfull << 52) -#define CA_DEBUG_PS_VSEL_SHFT 52 -#define CA_DEBUG_PM_VSEL (0xfull << 56) -#define CA_DEBUG_PM_VSEL_SHFT 56 - /* bits 63:60 unused */ - -/* ==== ca_debug_mux_core_sel */ -/* ==== ca_debug_mux_pci_sel */ -#define CA_DEBUG_MSEL0 (0x7ull << 0) -#define CA_DEBUG_MSEL0_SHFT 0 - /* bit 3 unused */ -#define CA_DEBUG_NSEL0 (0x7ull << 4) -#define CA_DEBUG_NSEL0_SHFT 4 - /* bit 7 unused */ -#define CA_DEBUG_MSEL1 (0x7ull << 8) -#define CA_DEBUG_MSEL1_SHFT 8 - /* bit 11 unused */ -#define CA_DEBUG_NSEL1 (0x7ull << 12) -#define CA_DEBUG_NSEL1_SHFT 12 - /* bit 15 unused */ -#define CA_DEBUG_MSEL2 (0x7ull << 16) -#define CA_DEBUG_MSEL2_SHFT 16 - /* bit 19 unused */ -#define CA_DEBUG_NSEL2 (0x7ull << 20) -#define CA_DEBUG_NSEL2_SHFT 20 - /* bit 23 unused */ -#define CA_DEBUG_MSEL3 (0x7ull << 24) -#define CA_DEBUG_MSEL3_SHFT 24 - /* bit 27 unused */ -#define CA_DEBUG_NSEL3 (0x7ull << 28) -#define CA_DEBUG_NSEL3_SHFT 28 - /* bit 31 unused */ -#define CA_DEBUG_MSEL4 (0x7ull << 32) -#define CA_DEBUG_MSEL4_SHFT 32 - /* bit 35 unused */ -#define CA_DEBUG_NSEL4 (0x7ull << 36) -#define CA_DEBUG_NSEL4_SHFT 36 - /* bit 39 unused */ -#define CA_DEBUG_MSEL5 (0x7ull << 40) -#define CA_DEBUG_MSEL5_SHFT 40 - /* bit 43 unused */ -#define CA_DEBUG_NSEL5 (0x7ull << 44) -#define CA_DEBUG_NSEL5_SHFT 44 - /* bit 47 unused */ -#define CA_DEBUG_MSEL6 (0x7ull << 48) -#define CA_DEBUG_MSEL6_SHFT 48 - /* bit 51 unused */ -#define CA_DEBUG_NSEL6 (0x7ull << 52) -#define CA_DEBUG_NSEL6_SHFT 52 - /* bit 55 unused */ -#define CA_DEBUG_MSEL7 (0x7ull << 56) -#define CA_DEBUG_MSEL7_SHFT 56 - /* bit 59 unused */ -#define CA_DEBUG_NSEL7 (0x7ull << 60) -#define CA_DEBUG_NSEL7_SHFT 60 - /* bit 63 unused */ - - -/* ==== ca_debug_domain_sel */ -#define CA_DEBUG_DOMAIN_L (1ull << 0) -#define CA_DEBUG_DOMAIN_H (1ull << 1) - /* bits 63:2 unused */ - -/* ==== ca_gart_ptr_table */ -#define CA_GART_PTR_VAL (1ull << 0) - /* bits 11:1 unused */ -#define CA_GART_PTR_ADDR (0xfffffffffffull << 12) -#define CA_GART_PTR_ADDR_SHFT 12 - /* bits 63:56 unused */ - -/* ==== ca_gart_tlb_addr[0-7] */ -#define CA_GART_TLB_ADDR (0xffffffffffffffull << 0) -#define CA_GART_TLB_ADDR_SHFT 0 - /* bits 62:56 unused */ -#define CA_GART_TLB_ENTRY_VAL (1ull << 63) - -/* - * PIO address space ranges for TIO:CA - */ - -/* CA internal registers */ -#define CA_PIO_ADMIN 0x00000000 -#define CA_PIO_ADMIN_LEN 0x00010000 - -/* GFX Write Buffer - Diagnostics */ -#define CA_PIO_GFX 0x00010000 -#define CA_PIO_GFX_LEN 0x00010000 - -/* AGP DMA Write Buffer - Diagnostics */ -#define CA_PIO_AGP_DMAWRITE 0x00020000 -#define CA_PIO_AGP_DMAWRITE_LEN 0x00010000 - -/* AGP DMA READ Buffer - Diagnostics */ -#define CA_PIO_AGP_DMAREAD 0x00030000 -#define CA_PIO_AGP_DMAREAD_LEN 0x00010000 - -/* PCI Config Type 0 */ -#define CA_PIO_PCI_TYPE0_CONFIG 0x01000000 -#define CA_PIO_PCI_TYPE0_CONFIG_LEN 0x01000000 - -/* PCI Config Type 1 */ -#define CA_PIO_PCI_TYPE1_CONFIG 0x02000000 -#define CA_PIO_PCI_TYPE1_CONFIG_LEN 0x01000000 - -/* PCI I/O Cycles - mapped to PCI Address 0x00000000-0x04ffffff */ -#define CA_PIO_PCI_IO 0x03000000 -#define CA_PIO_PCI_IO_LEN 0x05000000 - -/* PCI MEM Cycles - mapped to PCI with CA_PIO_ADDR_OFFSET of ca_control1 */ -/* use Fast Write if enabled and coretalk packet type is a GFX request */ -#define CA_PIO_PCI_MEM_OFFSET 0x08000000 -#define CA_PIO_PCI_MEM_OFFSET_LEN 0x08000000 - -/* PCI MEM Cycles - mapped to PCI Address 0x00000000-0xbfffffff */ -/* use Fast Write if enabled and coretalk packet type is a GFX request */ -#define CA_PIO_PCI_MEM 0x40000000 -#define CA_PIO_PCI_MEM_LEN 0xc0000000 - -/* - * DMA space - * - * The CA aperature (ie. bus address range) mapped by the GART is segmented into - * two parts. The lower portion of the aperature is used for mapping 32 bit - * PCI addresses which are managed by the dma interfaces in this file. The - * upper poprtion of the aperature is used for mapping 48 bit AGP addresses. - * The AGP portion of the aperature is managed by the agpgart_be.c driver - * in drivers/linux/agp. There are ca-specific hooks in that driver to - * manipulate the gart, but management of the AGP portion of the aperature - * is the responsibility of that driver. - * - * CA allows three main types of DMA mapping: - * - * PCI 64-bit Managed by this driver - * PCI 32-bit Managed by this driver - * AGP 48-bit Managed by hooks in the /dev/agpgart driver - * - * All of the above can optionally be remapped through the GART. The following - * table lists the combinations of addressing types and GART remapping that - * is currently supported by the driver (h/w supports all, s/w limits this): - * - * PCI64 PCI32 AGP48 - * GART no yes yes - * Direct yes yes no - * - * GART remapping of PCI64 is not done because there is no need to. The - * 64 bit PCI address holds all of the information necessary to target any - * memory in the system. - * - * AGP48 is always mapped through the GART. Management of the AGP48 portion - * of the aperature is the responsibility of code in the agpgart_be driver. - * - * The non-64 bit bus address space will currently be partitioned like this: - * - * 0xffff_ffff_ffff +-------- - * | AGP48 direct - * | Space managed by this driver - * CA_AGP_DIRECT_BASE +-------- - * | AGP GART mapped (gfx aperature) - * | Space managed by /dev/agpgart driver - * | This range is exposed to the agpgart - * | driver as the "graphics aperature" - * CA_AGP_MAPPED_BASE +----- - * | PCI GART mapped - * | Space managed by this driver - * CA_PCI32_MAPPED_BASE +---- - * | PCI32 direct - * | Space managed by this driver - * 0xC000_0000 +-------- - * (CA_PCI32_DIRECT_BASE) - * - * The bus address range CA_PCI32_MAPPED_BASE through CA_AGP_DIRECT_BASE - * is what we call the CA aperature. Addresses falling in this range will - * be remapped using the GART. - * - * The bus address range CA_AGP_MAPPED_BASE through CA_AGP_DIRECT_BASE - * is what we call the graphics aperature. This is a subset of the CA - * aperature and is under the control of the agpgart_be driver. - * - * CA_PCI32_MAPPED_BASE, CA_AGP_MAPPED_BASE, and CA_AGP_DIRECT_BASE are - * somewhat arbitrary values. The known constraints on choosing these is: - * - * 1) CA_AGP_DIRECT_BASE-CA_PCI32_MAPPED_BASE+1 (the CA aperature size) - * must be one of the values supported by the ca_gart_aperature register. - * Currently valid values are: 4MB through 4096MB in powers of 2 increments - * - * 2) CA_AGP_DIRECT_BASE-CA_AGP_MAPPED_BASE+1 (the gfx aperature size) - * must be in MB units since that's what the agpgart driver assumes. - */ - -/* - * Define Bus DMA ranges. These are configurable (see constraints above) - * and will probably need tuning based on experience. - */ - - -/* - * 11/24/03 - * CA has an addressing glitch w.r.t. PCI direct 32 bit DMA that makes it - * generally unusable. The problem is that for PCI direct 32 - * DMA's, all 32 bits of the bus address are used to form the lower 32 bits - * of the coretalk address, and coretalk bits 38:32 come from a register. - * Since only PCI bus addresses 0xC0000000-0xFFFFFFFF (1GB) are available - * for DMA (the rest is allocated to PIO), host node addresses need to be - * such that their lower 32 bits fall in the 0xC0000000-0xffffffff range - * as well. So there can be no PCI32 direct DMA below 3GB!! For this - * reason we set the CA_PCI32_DIRECT_SIZE to 0 which essentially makes - * tioca_dma_direct32() a noop but preserves the code flow should this issue - * be fixed in a respin. - * - * For now, all PCI32 DMA's must be mapped through the GART. - */ - -#define CA_PCI32_DIRECT_BASE 0xC0000000UL /* BASE not configurable */ -#define CA_PCI32_DIRECT_SIZE 0x00000000UL /* 0 MB */ - -#define CA_PCI32_MAPPED_BASE 0xC0000000UL -#define CA_PCI32_MAPPED_SIZE 0x40000000UL /* 2GB */ - -#define CA_AGP_MAPPED_BASE 0x80000000UL -#define CA_AGP_MAPPED_SIZE 0x40000000UL /* 2GB */ - -#define CA_AGP_DIRECT_BASE 0x40000000UL /* 2GB */ -#define CA_AGP_DIRECT_SIZE 0x40000000UL - -#define CA_APERATURE_BASE (CA_AGP_MAPPED_BASE) -#define CA_APERATURE_SIZE (CA_AGP_MAPPED_SIZE+CA_PCI32_MAPPED_SIZE) - -#endif /* _ASM_IA64_SN_TIO_TIOCA_H */ diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h deleted file mode 100644 index 9a820ac..0000000 --- a/include/asm-ia64/sn/tioca_provider.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H -#define _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H - -#include - -/* - * WAR enables - * Defines for individual WARs. Each is a bitmask of applicable - * part revision numbers. (1 << 1) == rev A, (1 << 2) == rev B, - * (3 << 1) == (rev A or rev B), etc - */ - -#define TIOCA_WAR_ENABLED(pv, tioca_common) \ - ((1 << tioca_common->ca_rev) & pv) - - /* TIO:ICE:FRZ:Freezer loses a PIO data ucred on PIO RD RSP with CW error */ -#define PV907908 (1 << 1) - /* ATI config space problems after BIOS execution starts */ -#define PV908234 (1 << 1) - /* CA:AGPDMA write request data mismatch with ABC1CL merge */ -#define PV895469 (1 << 1) - /* TIO:CA TLB invalidate of written GART entries possibly not occurring in CA*/ -#define PV910244 (1 << 1) - -struct tioca_dmamap{ - struct list_head cad_list; /* headed by ca_list */ - - dma_addr_t cad_dma_addr; /* Linux dma handle */ - uint cad_gart_entry; /* start entry in ca_gart_pagemap */ - uint cad_gart_size; /* #entries for this map */ -}; - -/* - * Kernel only fields. Prom may look at this stuff for debugging only. - * Access this structure through the ca_kernel_private ptr. - */ - -struct tioca_common ; - -struct tioca_kernel { - struct tioca_common *ca_common; /* tioca this belongs to */ - struct list_head ca_list; /* list of all ca's */ - struct list_head ca_dmamaps; - spinlock_t ca_lock; /* Kernel lock */ - cnodeid_t ca_closest_node; - struct list_head *ca_devices; /* bus->devices */ - - /* - * General GART stuff - */ - u64 ca_ap_size; /* size of aperature in bytes */ - u32 ca_gart_entries; /* # u64 entries in gart */ - u32 ca_ap_pagesize; /* aperature page size in bytes */ - u64 ca_ap_bus_base; /* bus address of CA aperature */ - u64 ca_gart_size; /* gart size in bytes */ - u64 *ca_gart; /* gart table vaddr */ - u64 ca_gart_coretalk_addr; /* gart coretalk addr */ - u8 ca_gart_iscoherent; /* used in tioca_tlbflush */ - - /* PCI GART convenience values */ - u64 ca_pciap_base; /* pci aperature bus base address */ - u64 ca_pciap_size; /* pci aperature size (bytes) */ - u64 ca_pcigart_base; /* gfx GART bus base address */ - u64 *ca_pcigart; /* gfx GART vm address */ - u32 ca_pcigart_entries; - u32 ca_pcigart_start; /* PCI start index in ca_gart */ - void *ca_pcigart_pagemap; - - /* AGP GART convenience values */ - u64 ca_gfxap_base; /* gfx aperature bus base address */ - u64 ca_gfxap_size; /* gfx aperature size (bytes) */ - u64 ca_gfxgart_base; /* gfx GART bus base address */ - u64 *ca_gfxgart; /* gfx GART vm address */ - u32 ca_gfxgart_entries; - u32 ca_gfxgart_start; /* agpgart start index in ca_gart */ -}; - -/* - * Common tioca info shared between kernel and prom - * - * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES - * TO THE PROM VERSION. - */ - -struct tioca_common { - struct pcibus_bussoft ca_common; /* common pciio header */ - - u32 ca_rev; - u32 ca_closest_nasid; - - u64 ca_prom_private; - u64 ca_kernel_private; -}; - -/** - * tioca_paddr_to_gart - Convert an SGI coretalk address to a CA GART entry - * @paddr: page address to convert - * - * Convert a system [coretalk] address to a GART entry. GART entries are - * formed using the following: - * - * data = ( (1<<63) | ( (REMAP_NODE_ID << 40) | (MD_CHIPLET_ID << 38) | - * (REMAP_SYS_ADDR) ) >> 12 ) - * - * DATA written to 1 GART TABLE Entry in system memory is remapped system - * addr for 1 page - * - * The data is for coretalk address format right shifted 12 bits with a - * valid bit. - * - * GART_TABLE_ENTRY [ 25:0 ] -- REMAP_SYS_ADDRESS[37:12]. - * GART_TABLE_ENTRY [ 27:26 ] -- SHUB MD chiplet id. - * GART_TABLE_ENTRY [ 41:28 ] -- REMAP_NODE_ID. - * GART_TABLE_ENTRY [ 63 ] -- Valid Bit - */ -static inline u64 -tioca_paddr_to_gart(unsigned long paddr) -{ - /* - * We are assuming right now that paddr already has the correct - * format since the address from xtalk_dmaXXX should already have - * NODE_ID, CHIPLET_ID, and SYS_ADDR in the correct locations. - */ - - return ((paddr) >> 12) | (1UL << 63); -} - -/** - * tioca_physpage_to_gart - Map a host physical page for SGI CA based DMA - * @page_addr: system page address to map - */ - -static inline unsigned long -tioca_physpage_to_gart(u64 page_addr) -{ - u64 coretalk_addr; - - coretalk_addr = PHYS_TO_TIODMA(page_addr); - if (!coretalk_addr) { - return 0; - } - - return tioca_paddr_to_gart(coretalk_addr); -} - -/** - * tioca_tlbflush - invalidate cached SGI CA GART TLB entries - * @tioca_kernel: CA context - * - * Invalidate tlb entries for a given CA GART. Main complexity is to account - * for revA bug. - */ -static inline void -tioca_tlbflush(struct tioca_kernel *tioca_kernel) -{ - volatile u64 tmp; - volatile struct tioca __iomem *ca_base; - struct tioca_common *tioca_common; - - tioca_common = tioca_kernel->ca_common; - ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base; - - /* - * Explicit flushes not needed if GART is in cached mode - */ - if (tioca_kernel->ca_gart_iscoherent) { - if (TIOCA_WAR_ENABLED(PV910244, tioca_common)) { - /* - * PV910244: RevA CA needs explicit flushes. - * Need to put GART into uncached mode before - * flushing otherwise the explicit flush is ignored. - * - * Alternate WAR would be to leave GART cached and - * touch every CL aligned GART entry. - */ - - __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM); - __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB); - __sn_setq_relaxed(&ca_base->ca_control2, - (0x2ull << CA_GART_MEM_PARAM_SHFT)); - tmp = __sn_readq_relaxed(&ca_base->ca_control2); - } - - return; - } - - /* - * Gart in uncached mode ... need an explicit flush. - */ - - __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB); - tmp = __sn_readq_relaxed(&ca_base->ca_control2); -} - -extern u32 tioca_gart_found; -extern struct list_head tioca_list; -extern int tioca_init_provider(void); -extern void tioca_fastwrite_enable(struct tioca_kernel *tioca_kern); -#endif /* _ASM_IA64_SN_TIO_CA_AGP_PROVIDER_H */ diff --git a/include/asm-ia64/sn/tioce.h b/include/asm-ia64/sn/tioce.h deleted file mode 100644 index 893468e..0000000 --- a/include/asm-ia64/sn/tioce.h +++ /dev/null @@ -1,760 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef __ASM_IA64_SN_TIOCE_H__ -#define __ASM_IA64_SN_TIOCE_H__ - -/* CE ASIC part & mfgr information */ -#define TIOCE_PART_NUM 0xCE00 -#define TIOCE_SRC_ID 0x01 -#define TIOCE_REV_A 0x1 - -/* CE Virtual PPB Vendor/Device IDs */ -#define CE_VIRT_PPB_VENDOR_ID 0x10a9 -#define CE_VIRT_PPB_DEVICE_ID 0x4002 - -/* CE Host Bridge Vendor/Device IDs */ -#define CE_HOST_BRIDGE_VENDOR_ID 0x10a9 -#define CE_HOST_BRIDGE_DEVICE_ID 0x4001 - - -#define TIOCE_NUM_M40_ATES 4096 -#define TIOCE_NUM_M3240_ATES 2048 -#define TIOCE_NUM_PORTS 2 - -/* - * Register layout for TIOCE. MMR offsets are shown at the far right of the - * structure definition. - */ -typedef volatile struct tioce { - /* - * ADMIN : Administration Registers - */ - u64 ce_adm_id; /* 0x000000 */ - u64 ce_pad_000008; /* 0x000008 */ - u64 ce_adm_dyn_credit_status; /* 0x000010 */ - u64 ce_adm_last_credit_status; /* 0x000018 */ - u64 ce_adm_credit_limit; /* 0x000020 */ - u64 ce_adm_force_credit; /* 0x000028 */ - u64 ce_adm_control; /* 0x000030 */ - u64 ce_adm_mmr_chn_timeout; /* 0x000038 */ - u64 ce_adm_ssp_ure_timeout; /* 0x000040 */ - u64 ce_adm_ssp_dre_timeout; /* 0x000048 */ - u64 ce_adm_ssp_debug_sel; /* 0x000050 */ - u64 ce_adm_int_status; /* 0x000058 */ - u64 ce_adm_int_status_alias; /* 0x000060 */ - u64 ce_adm_int_mask; /* 0x000068 */ - u64 ce_adm_int_pending; /* 0x000070 */ - u64 ce_adm_force_int; /* 0x000078 */ - u64 ce_adm_ure_ups_buf_barrier_flush; /* 0x000080 */ - u64 ce_adm_int_dest[15]; /* 0x000088 -- 0x0000F8 */ - u64 ce_adm_error_summary; /* 0x000100 */ - u64 ce_adm_error_summary_alias; /* 0x000108 */ - u64 ce_adm_error_mask; /* 0x000110 */ - u64 ce_adm_first_error; /* 0x000118 */ - u64 ce_adm_error_overflow; /* 0x000120 */ - u64 ce_adm_error_overflow_alias; /* 0x000128 */ - u64 ce_pad_000130[2]; /* 0x000130 -- 0x000138 */ - u64 ce_adm_tnum_error; /* 0x000140 */ - u64 ce_adm_mmr_err_detail; /* 0x000148 */ - u64 ce_adm_msg_sram_perr_detail; /* 0x000150 */ - u64 ce_adm_bap_sram_perr_detail; /* 0x000158 */ - u64 ce_adm_ce_sram_perr_detail; /* 0x000160 */ - u64 ce_adm_ce_credit_oflow_detail; /* 0x000168 */ - u64 ce_adm_tx_link_idle_max_timer; /* 0x000170 */ - u64 ce_adm_pcie_debug_sel; /* 0x000178 */ - u64 ce_pad_000180[16]; /* 0x000180 -- 0x0001F8 */ - - u64 ce_adm_pcie_debug_sel_top; /* 0x000200 */ - u64 ce_adm_pcie_debug_lat_sel_lo_top; /* 0x000208 */ - u64 ce_adm_pcie_debug_lat_sel_hi_top; /* 0x000210 */ - u64 ce_adm_pcie_debug_trig_sel_top; /* 0x000218 */ - u64 ce_adm_pcie_debug_trig_lat_sel_lo_top; /* 0x000220 */ - u64 ce_adm_pcie_debug_trig_lat_sel_hi_top; /* 0x000228 */ - u64 ce_adm_pcie_trig_compare_top; /* 0x000230 */ - u64 ce_adm_pcie_trig_compare_en_top; /* 0x000238 */ - u64 ce_adm_ssp_debug_sel_top; /* 0x000240 */ - u64 ce_adm_ssp_debug_lat_sel_lo_top; /* 0x000248 */ - u64 ce_adm_ssp_debug_lat_sel_hi_top; /* 0x000250 */ - u64 ce_adm_ssp_debug_trig_sel_top; /* 0x000258 */ - u64 ce_adm_ssp_debug_trig_lat_sel_lo_top; /* 0x000260 */ - u64 ce_adm_ssp_debug_trig_lat_sel_hi_top; /* 0x000268 */ - u64 ce_adm_ssp_trig_compare_top; /* 0x000270 */ - u64 ce_adm_ssp_trig_compare_en_top; /* 0x000278 */ - u64 ce_pad_000280[48]; /* 0x000280 -- 0x0003F8 */ - - u64 ce_adm_bap_ctrl; /* 0x000400 */ - u64 ce_pad_000408[127]; /* 0x000408 -- 0x0007F8 */ - - u64 ce_msg_buf_data63_0[35]; /* 0x000800 -- 0x000918 */ - u64 ce_pad_000920[29]; /* 0x000920 -- 0x0009F8 */ - - u64 ce_msg_buf_data127_64[35]; /* 0x000A00 -- 0x000B18 */ - u64 ce_pad_000B20[29]; /* 0x000B20 -- 0x000BF8 */ - - u64 ce_msg_buf_parity[35]; /* 0x000C00 -- 0x000D18 */ - u64 ce_pad_000D20[29]; /* 0x000D20 -- 0x000DF8 */ - - u64 ce_pad_000E00[576]; /* 0x000E00 -- 0x001FF8 */ - - /* - * LSI : LSI's PCI Express Link Registers (Link#1 and Link#2) - * Link#1 MMRs at start at 0x002000, Link#2 MMRs at 0x003000 - * NOTE: the comment offsets at far right: let 'z' = {2 or 3} - */ - #define ce_lsi(link_num) ce_lsi[link_num-1] - struct ce_lsi_reg { - u64 ce_lsi_lpu_id; /* 0x00z000 */ - u64 ce_lsi_rst; /* 0x00z008 */ - u64 ce_lsi_dbg_stat; /* 0x00z010 */ - u64 ce_lsi_dbg_cfg; /* 0x00z018 */ - u64 ce_lsi_ltssm_ctrl; /* 0x00z020 */ - u64 ce_lsi_lk_stat; /* 0x00z028 */ - u64 ce_pad_00z030[2]; /* 0x00z030 -- 0x00z038 */ - u64 ce_lsi_int_and_stat; /* 0x00z040 */ - u64 ce_lsi_int_mask; /* 0x00z048 */ - u64 ce_pad_00z050[22]; /* 0x00z050 -- 0x00z0F8 */ - u64 ce_lsi_lk_perf_cnt_sel; /* 0x00z100 */ - u64 ce_pad_00z108; /* 0x00z108 */ - u64 ce_lsi_lk_perf_cnt_ctrl; /* 0x00z110 */ - u64 ce_pad_00z118; /* 0x00z118 */ - u64 ce_lsi_lk_perf_cnt1; /* 0x00z120 */ - u64 ce_lsi_lk_perf_cnt1_test; /* 0x00z128 */ - u64 ce_lsi_lk_perf_cnt2; /* 0x00z130 */ - u64 ce_lsi_lk_perf_cnt2_test; /* 0x00z138 */ - u64 ce_pad_00z140[24]; /* 0x00z140 -- 0x00z1F8 */ - u64 ce_lsi_lk_lyr_cfg; /* 0x00z200 */ - u64 ce_lsi_lk_lyr_status; /* 0x00z208 */ - u64 ce_lsi_lk_lyr_int_stat; /* 0x00z210 */ - u64 ce_lsi_lk_ly_int_stat_test; /* 0x00z218 */ - u64 ce_lsi_lk_ly_int_stat_mask; /* 0x00z220 */ - u64 ce_pad_00z228[3]; /* 0x00z228 -- 0x00z238 */ - u64 ce_lsi_fc_upd_ctl; /* 0x00z240 */ - u64 ce_pad_00z248[3]; /* 0x00z248 -- 0x00z258 */ - u64 ce_lsi_flw_ctl_upd_to_timer; /* 0x00z260 */ - u64 ce_lsi_flw_ctl_upd_timer0; /* 0x00z268 */ - u64 ce_lsi_flw_ctl_upd_timer1; /* 0x00z270 */ - u64 ce_pad_00z278[49]; /* 0x00z278 -- 0x00z3F8 */ - u64 ce_lsi_freq_nak_lat_thrsh; /* 0x00z400 */ - u64 ce_lsi_ack_nak_lat_tmr; /* 0x00z408 */ - u64 ce_lsi_rply_tmr_thr; /* 0x00z410 */ - u64 ce_lsi_rply_tmr; /* 0x00z418 */ - u64 ce_lsi_rply_num_stat; /* 0x00z420 */ - u64 ce_lsi_rty_buf_max_addr; /* 0x00z428 */ - u64 ce_lsi_rty_fifo_ptr; /* 0x00z430 */ - u64 ce_lsi_rty_fifo_rd_wr_ptr; /* 0x00z438 */ - u64 ce_lsi_rty_fifo_cred; /* 0x00z440 */ - u64 ce_lsi_seq_cnt; /* 0x00z448 */ - u64 ce_lsi_ack_sent_seq_num; /* 0x00z450 */ - u64 ce_lsi_seq_cnt_fifo_max_addr; /* 0x00z458 */ - u64 ce_lsi_seq_cnt_fifo_ptr; /* 0x00z460 */ - u64 ce_lsi_seq_cnt_rd_wr_ptr; /* 0x00z468 */ - u64 ce_lsi_tx_lk_ts_ctl; /* 0x00z470 */ - u64 ce_pad_00z478; /* 0x00z478 */ - u64 ce_lsi_mem_addr_ctl; /* 0x00z480 */ - u64 ce_lsi_mem_d_ld0; /* 0x00z488 */ - u64 ce_lsi_mem_d_ld1; /* 0x00z490 */ - u64 ce_lsi_mem_d_ld2; /* 0x00z498 */ - u64 ce_lsi_mem_d_ld3; /* 0x00z4A0 */ - u64 ce_lsi_mem_d_ld4; /* 0x00z4A8 */ - u64 ce_pad_00z4B0[2]; /* 0x00z4B0 -- 0x00z4B8 */ - u64 ce_lsi_rty_d_cnt; /* 0x00z4C0 */ - u64 ce_lsi_seq_buf_cnt; /* 0x00z4C8 */ - u64 ce_lsi_seq_buf_bt_d; /* 0x00z4D0 */ - u64 ce_pad_00z4D8; /* 0x00z4D8 */ - u64 ce_lsi_ack_lat_thr; /* 0x00z4E0 */ - u64 ce_pad_00z4E8[3]; /* 0x00z4E8 -- 0x00z4F8 */ - u64 ce_lsi_nxt_rcv_seq_1_cntr; /* 0x00z500 */ - u64 ce_lsi_unsp_dllp_rcvd; /* 0x00z508 */ - u64 ce_lsi_rcv_lk_ts_ctl; /* 0x00z510 */ - u64 ce_pad_00z518[29]; /* 0x00z518 -- 0x00z5F8 */ - u64 ce_lsi_phy_lyr_cfg; /* 0x00z600 */ - u64 ce_pad_00z608; /* 0x00z608 */ - u64 ce_lsi_phy_lyr_int_stat; /* 0x00z610 */ - u64 ce_lsi_phy_lyr_int_stat_test; /* 0x00z618 */ - u64 ce_lsi_phy_lyr_int_mask; /* 0x00z620 */ - u64 ce_pad_00z628[11]; /* 0x00z628 -- 0x00z678 */ - u64 ce_lsi_rcv_phy_cfg; /* 0x00z680 */ - u64 ce_lsi_rcv_phy_stat1; /* 0x00z688 */ - u64 ce_lsi_rcv_phy_stat2; /* 0x00z690 */ - u64 ce_lsi_rcv_phy_stat3; /* 0x00z698 */ - u64 ce_lsi_rcv_phy_int_stat; /* 0x00z6A0 */ - u64 ce_lsi_rcv_phy_int_stat_test; /* 0x00z6A8 */ - u64 ce_lsi_rcv_phy_int_mask; /* 0x00z6B0 */ - u64 ce_pad_00z6B8[9]; /* 0x00z6B8 -- 0x00z6F8 */ - u64 ce_lsi_tx_phy_cfg; /* 0x00z700 */ - u64 ce_lsi_tx_phy_stat; /* 0x00z708 */ - u64 ce_lsi_tx_phy_int_stat; /* 0x00z710 */ - u64 ce_lsi_tx_phy_int_stat_test; /* 0x00z718 */ - u64 ce_lsi_tx_phy_int_mask; /* 0x00z720 */ - u64 ce_lsi_tx_phy_stat2; /* 0x00z728 */ - u64 ce_pad_00z730[10]; /* 0x00z730 -- 0x00z77F */ - u64 ce_lsi_ltssm_cfg1; /* 0x00z780 */ - u64 ce_lsi_ltssm_cfg2; /* 0x00z788 */ - u64 ce_lsi_ltssm_cfg3; /* 0x00z790 */ - u64 ce_lsi_ltssm_cfg4; /* 0x00z798 */ - u64 ce_lsi_ltssm_cfg5; /* 0x00z7A0 */ - u64 ce_lsi_ltssm_stat1; /* 0x00z7A8 */ - u64 ce_lsi_ltssm_stat2; /* 0x00z7B0 */ - u64 ce_lsi_ltssm_int_stat; /* 0x00z7B8 */ - u64 ce_lsi_ltssm_int_stat_test; /* 0x00z7C0 */ - u64 ce_lsi_ltssm_int_mask; /* 0x00z7C8 */ - u64 ce_lsi_ltssm_stat_wr_en; /* 0x00z7D0 */ - u64 ce_pad_00z7D8[5]; /* 0x00z7D8 -- 0x00z7F8 */ - u64 ce_lsi_gb_cfg1; /* 0x00z800 */ - u64 ce_lsi_gb_cfg2; /* 0x00z808 */ - u64 ce_lsi_gb_cfg3; /* 0x00z810 */ - u64 ce_lsi_gb_cfg4; /* 0x00z818 */ - u64 ce_lsi_gb_stat; /* 0x00z820 */ - u64 ce_lsi_gb_int_stat; /* 0x00z828 */ - u64 ce_lsi_gb_int_stat_test; /* 0x00z830 */ - u64 ce_lsi_gb_int_mask; /* 0x00z838 */ - u64 ce_lsi_gb_pwr_dn1; /* 0x00z840 */ - u64 ce_lsi_gb_pwr_dn2; /* 0x00z848 */ - u64 ce_pad_00z850[246]; /* 0x00z850 -- 0x00zFF8 */ - } ce_lsi[2]; - - u64 ce_pad_004000[10]; /* 0x004000 -- 0x004048 */ - - /* - * CRM: Coretalk Receive Module Registers - */ - u64 ce_crm_debug_mux; /* 0x004050 */ - u64 ce_pad_004058; /* 0x004058 */ - u64 ce_crm_ssp_err_cmd_wrd; /* 0x004060 */ - u64 ce_crm_ssp_err_addr; /* 0x004068 */ - u64 ce_crm_ssp_err_syn; /* 0x004070 */ - - u64 ce_pad_004078[499]; /* 0x004078 -- 0x005008 */ - - /* - * CXM: Coretalk Xmit Module Registers - */ - u64 ce_cxm_dyn_credit_status; /* 0x005010 */ - u64 ce_cxm_last_credit_status; /* 0x005018 */ - u64 ce_cxm_credit_limit; /* 0x005020 */ - u64 ce_cxm_force_credit; /* 0x005028 */ - u64 ce_cxm_disable_bypass; /* 0x005030 */ - u64 ce_pad_005038[3]; /* 0x005038 -- 0x005048 */ - u64 ce_cxm_debug_mux; /* 0x005050 */ - - u64 ce_pad_005058[501]; /* 0x005058 -- 0x005FF8 */ - - /* - * DTL: Downstream Transaction Layer Regs (Link#1 and Link#2) - * DTL: Link#1 MMRs at start at 0x006000, Link#2 MMRs at 0x008000 - * DTL: the comment offsets at far right: let 'y' = {6 or 8} - * - * UTL: Downstream Transaction Layer Regs (Link#1 and Link#2) - * UTL: Link#1 MMRs at start at 0x007000, Link#2 MMRs at 0x009000 - * UTL: the comment offsets at far right: let 'z' = {7 or 9} - */ - #define ce_dtl(link_num) ce_dtl_utl[link_num-1] - #define ce_utl(link_num) ce_dtl_utl[link_num-1] - struct ce_dtl_utl_reg { - /* DTL */ - u64 ce_dtl_dtdr_credit_limit; /* 0x00y000 */ - u64 ce_dtl_dtdr_credit_force; /* 0x00y008 */ - u64 ce_dtl_dyn_credit_status; /* 0x00y010 */ - u64 ce_dtl_dtl_last_credit_stat; /* 0x00y018 */ - u64 ce_dtl_dtl_ctrl; /* 0x00y020 */ - u64 ce_pad_00y028[5]; /* 0x00y028 -- 0x00y048 */ - u64 ce_dtl_debug_sel; /* 0x00y050 */ - u64 ce_pad_00y058[501]; /* 0x00y058 -- 0x00yFF8 */ - - /* UTL */ - u64 ce_utl_utl_ctrl; /* 0x00z000 */ - u64 ce_utl_debug_sel; /* 0x00z008 */ - u64 ce_pad_00z010[510]; /* 0x00z010 -- 0x00zFF8 */ - } ce_dtl_utl[2]; - - u64 ce_pad_00A000[514]; /* 0x00A000 -- 0x00B008 */ - - /* - * URE: Upstream Request Engine - */ - u64 ce_ure_dyn_credit_status; /* 0x00B010 */ - u64 ce_ure_last_credit_status; /* 0x00B018 */ - u64 ce_ure_credit_limit; /* 0x00B020 */ - u64 ce_pad_00B028; /* 0x00B028 */ - u64 ce_ure_control; /* 0x00B030 */ - u64 ce_ure_status; /* 0x00B038 */ - u64 ce_pad_00B040[2]; /* 0x00B040 -- 0x00B048 */ - u64 ce_ure_debug_sel; /* 0x00B050 */ - u64 ce_ure_pcie_debug_sel; /* 0x00B058 */ - u64 ce_ure_ssp_err_cmd_wrd; /* 0x00B060 */ - u64 ce_ure_ssp_err_addr; /* 0x00B068 */ - u64 ce_ure_page_map; /* 0x00B070 */ - u64 ce_ure_dir_map[TIOCE_NUM_PORTS]; /* 0x00B078 */ - u64 ce_ure_pipe_sel1; /* 0x00B088 */ - u64 ce_ure_pipe_mask1; /* 0x00B090 */ - u64 ce_ure_pipe_sel2; /* 0x00B098 */ - u64 ce_ure_pipe_mask2; /* 0x00B0A0 */ - u64 ce_ure_pcie1_credits_sent; /* 0x00B0A8 */ - u64 ce_ure_pcie1_credits_used; /* 0x00B0B0 */ - u64 ce_ure_pcie1_credit_limit; /* 0x00B0B8 */ - u64 ce_ure_pcie2_credits_sent; /* 0x00B0C0 */ - u64 ce_ure_pcie2_credits_used; /* 0x00B0C8 */ - u64 ce_ure_pcie2_credit_limit; /* 0x00B0D0 */ - u64 ce_ure_pcie_force_credit; /* 0x00B0D8 */ - u64 ce_ure_rd_tnum_val; /* 0x00B0E0 */ - u64 ce_ure_rd_tnum_rsp_rcvd; /* 0x00B0E8 */ - u64 ce_ure_rd_tnum_esent_timer; /* 0x00B0F0 */ - u64 ce_ure_rd_tnum_error; /* 0x00B0F8 */ - u64 ce_ure_rd_tnum_first_cl; /* 0x00B100 */ - u64 ce_ure_rd_tnum_link_buf; /* 0x00B108 */ - u64 ce_ure_wr_tnum_val; /* 0x00B110 */ - u64 ce_ure_sram_err_addr0; /* 0x00B118 */ - u64 ce_ure_sram_err_addr1; /* 0x00B120 */ - u64 ce_ure_sram_err_addr2; /* 0x00B128 */ - u64 ce_ure_sram_rd_addr0; /* 0x00B130 */ - u64 ce_ure_sram_rd_addr1; /* 0x00B138 */ - u64 ce_ure_sram_rd_addr2; /* 0x00B140 */ - u64 ce_ure_sram_wr_addr0; /* 0x00B148 */ - u64 ce_ure_sram_wr_addr1; /* 0x00B150 */ - u64 ce_ure_sram_wr_addr2; /* 0x00B158 */ - u64 ce_ure_buf_flush10; /* 0x00B160 */ - u64 ce_ure_buf_flush11; /* 0x00B168 */ - u64 ce_ure_buf_flush12; /* 0x00B170 */ - u64 ce_ure_buf_flush13; /* 0x00B178 */ - u64 ce_ure_buf_flush20; /* 0x00B180 */ - u64 ce_ure_buf_flush21; /* 0x00B188 */ - u64 ce_ure_buf_flush22; /* 0x00B190 */ - u64 ce_ure_buf_flush23; /* 0x00B198 */ - u64 ce_ure_pcie_control1; /* 0x00B1A0 */ - u64 ce_ure_pcie_control2; /* 0x00B1A8 */ - - u64 ce_pad_00B1B0[458]; /* 0x00B1B0 -- 0x00BFF8 */ - - /* Upstream Data Buffer, Port1 */ - struct ce_ure_maint_ups_dat1_data { - u64 data63_0[512]; /* 0x00C000 -- 0x00CFF8 */ - u64 data127_64[512]; /* 0x00D000 -- 0x00DFF8 */ - u64 parity[512]; /* 0x00E000 -- 0x00EFF8 */ - } ce_ure_maint_ups_dat1; - - /* Upstream Header Buffer, Port1 */ - struct ce_ure_maint_ups_hdr1_data { - u64 data63_0[512]; /* 0x00F000 -- 0x00FFF8 */ - u64 data127_64[512]; /* 0x010000 -- 0x010FF8 */ - u64 parity[512]; /* 0x011000 -- 0x011FF8 */ - } ce_ure_maint_ups_hdr1; - - /* Upstream Data Buffer, Port2 */ - struct ce_ure_maint_ups_dat2_data { - u64 data63_0[512]; /* 0x012000 -- 0x012FF8 */ - u64 data127_64[512]; /* 0x013000 -- 0x013FF8 */ - u64 parity[512]; /* 0x014000 -- 0x014FF8 */ - } ce_ure_maint_ups_dat2; - - /* Upstream Header Buffer, Port2 */ - struct ce_ure_maint_ups_hdr2_data { - u64 data63_0[512]; /* 0x015000 -- 0x015FF8 */ - u64 data127_64[512]; /* 0x016000 -- 0x016FF8 */ - u64 parity[512]; /* 0x017000 -- 0x017FF8 */ - } ce_ure_maint_ups_hdr2; - - /* Downstream Data Buffer */ - struct ce_ure_maint_dns_dat_data { - u64 data63_0[512]; /* 0x018000 -- 0x018FF8 */ - u64 data127_64[512]; /* 0x019000 -- 0x019FF8 */ - u64 parity[512]; /* 0x01A000 -- 0x01AFF8 */ - } ce_ure_maint_dns_dat; - - /* Downstream Header Buffer */ - struct ce_ure_maint_dns_hdr_data { - u64 data31_0[64]; /* 0x01B000 -- 0x01B1F8 */ - u64 data95_32[64]; /* 0x01B200 -- 0x01B3F8 */ - u64 parity[64]; /* 0x01B400 -- 0x01B5F8 */ - } ce_ure_maint_dns_hdr; - - /* RCI Buffer Data */ - struct ce_ure_maint_rci_data { - u64 data41_0[64]; /* 0x01B600 -- 0x01B7F8 */ - u64 data69_42[64]; /* 0x01B800 -- 0x01B9F8 */ - } ce_ure_maint_rci; - - /* Response Queue */ - u64 ce_ure_maint_rspq[64]; /* 0x01BA00 -- 0x01BBF8 */ - - u64 ce_pad_01C000[4224]; /* 0x01BC00 -- 0x023FF8 */ - - /* Admin Build-a-Packet Buffer */ - struct ce_adm_maint_bap_buf_data { - u64 data63_0[258]; /* 0x024000 -- 0x024808 */ - u64 data127_64[258]; /* 0x024810 -- 0x025018 */ - u64 parity[258]; /* 0x025020 -- 0x025828 */ - } ce_adm_maint_bap_buf; - - u64 ce_pad_025830[5370]; /* 0x025830 -- 0x02FFF8 */ - - /* URE: 40bit PMU ATE Buffer */ /* 0x030000 -- 0x037FF8 */ - u64 ce_ure_ate40[TIOCE_NUM_M40_ATES]; - - /* URE: 32/40bit PMU ATE Buffer */ /* 0x038000 -- 0x03BFF8 */ - u64 ce_ure_ate3240[TIOCE_NUM_M3240_ATES]; - - u64 ce_pad_03C000[2050]; /* 0x03C000 -- 0x040008 */ - - /* - * DRE: Down Stream Request Engine - */ - u64 ce_dre_dyn_credit_status1; /* 0x040010 */ - u64 ce_dre_dyn_credit_status2; /* 0x040018 */ - u64 ce_dre_last_credit_status1; /* 0x040020 */ - u64 ce_dre_last_credit_status2; /* 0x040028 */ - u64 ce_dre_credit_limit1; /* 0x040030 */ - u64 ce_dre_credit_limit2; /* 0x040038 */ - u64 ce_dre_force_credit1; /* 0x040040 */ - u64 ce_dre_force_credit2; /* 0x040048 */ - u64 ce_dre_debug_mux1; /* 0x040050 */ - u64 ce_dre_debug_mux2; /* 0x040058 */ - u64 ce_dre_ssp_err_cmd_wrd; /* 0x040060 */ - u64 ce_dre_ssp_err_addr; /* 0x040068 */ - u64 ce_dre_comp_err_cmd_wrd; /* 0x040070 */ - u64 ce_dre_comp_err_addr; /* 0x040078 */ - u64 ce_dre_req_status; /* 0x040080 */ - u64 ce_dre_config1; /* 0x040088 */ - u64 ce_dre_config2; /* 0x040090 */ - u64 ce_dre_config_req_status; /* 0x040098 */ - u64 ce_pad_0400A0[12]; /* 0x0400A0 -- 0x0400F8 */ - u64 ce_dre_dyn_fifo; /* 0x040100 */ - u64 ce_pad_040108[3]; /* 0x040108 -- 0x040118 */ - u64 ce_dre_last_fifo; /* 0x040120 */ - - u64 ce_pad_040128[27]; /* 0x040128 -- 0x0401F8 */ - - /* DRE Downstream Head Queue */ - struct ce_dre_maint_ds_head_queue { - u64 data63_0[32]; /* 0x040200 -- 0x0402F8 */ - u64 data127_64[32]; /* 0x040300 -- 0x0403F8 */ - u64 parity[32]; /* 0x040400 -- 0x0404F8 */ - } ce_dre_maint_ds_head_q; - - u64 ce_pad_040500[352]; /* 0x040500 -- 0x040FF8 */ - - /* DRE Downstream Data Queue */ - struct ce_dre_maint_ds_data_queue { - u64 data63_0[256]; /* 0x041000 -- 0x0417F8 */ - u64 ce_pad_041800[256]; /* 0x041800 -- 0x041FF8 */ - u64 data127_64[256]; /* 0x042000 -- 0x0427F8 */ - u64 ce_pad_042800[256]; /* 0x042800 -- 0x042FF8 */ - u64 parity[256]; /* 0x043000 -- 0x0437F8 */ - u64 ce_pad_043800[256]; /* 0x043800 -- 0x043FF8 */ - } ce_dre_maint_ds_data_q; - - /* DRE URE Upstream Response Queue */ - struct ce_dre_maint_ure_us_rsp_queue { - u64 data63_0[8]; /* 0x044000 -- 0x044038 */ - u64 ce_pad_044040[24]; /* 0x044040 -- 0x0440F8 */ - u64 data127_64[8]; /* 0x044100 -- 0x044138 */ - u64 ce_pad_044140[24]; /* 0x044140 -- 0x0441F8 */ - u64 parity[8]; /* 0x044200 -- 0x044238 */ - u64 ce_pad_044240[24]; /* 0x044240 -- 0x0442F8 */ - } ce_dre_maint_ure_us_rsp_q; - - u64 ce_dre_maint_us_wrt_rsp[32];/* 0x044300 -- 0x0443F8 */ - - u64 ce_end_of_struct; /* 0x044400 */ -} tioce_t; - -/* ce_lsiX_gb_cfg1 register bit masks & shifts */ -#define CE_LSI_GB_CFG1_RXL0S_THS_SHFT 0 -#define CE_LSI_GB_CFG1_RXL0S_THS_MASK (0xffULL << 0) -#define CE_LSI_GB_CFG1_RXL0S_SMP_SHFT 8 -#define CE_LSI_GB_CFG1_RXL0S_SMP_MASK (0xfULL << 8); -#define CE_LSI_GB_CFG1_RXL0S_ADJ_SHFT 12 -#define CE_LSI_GB_CFG1_RXL0S_ADJ_MASK (0x7ULL << 12) -#define CE_LSI_GB_CFG1_RXL0S_FLT_SHFT 15 -#define CE_LSI_GB_CFG1_RXL0S_FLT_MASK (0x1ULL << 15) -#define CE_LSI_GB_CFG1_LPBK_SEL_SHFT 16 -#define CE_LSI_GB_CFG1_LPBK_SEL_MASK (0x3ULL << 16) -#define CE_LSI_GB_CFG1_LPBK_EN_SHFT 18 -#define CE_LSI_GB_CFG1_LPBK_EN_MASK (0x1ULL << 18) -#define CE_LSI_GB_CFG1_RVRS_LB_SHFT 19 -#define CE_LSI_GB_CFG1_RVRS_LB_MASK (0x1ULL << 19) -#define CE_LSI_GB_CFG1_RVRS_CLK_SHFT 20 -#define CE_LSI_GB_CFG1_RVRS_CLK_MASK (0x3ULL << 20) -#define CE_LSI_GB_CFG1_SLF_TS_SHFT 24 -#define CE_LSI_GB_CFG1_SLF_TS_MASK (0xfULL << 24) - -/* ce_adm_int_mask/ce_adm_int_status register bit defines */ -#define CE_ADM_INT_CE_ERROR_SHFT 0 -#define CE_ADM_INT_LSI1_IP_ERROR_SHFT 1 -#define CE_ADM_INT_LSI2_IP_ERROR_SHFT 2 -#define CE_ADM_INT_PCIE_ERROR_SHFT 3 -#define CE_ADM_INT_PORT1_HOTPLUG_EVENT_SHFT 4 -#define CE_ADM_INT_PORT2_HOTPLUG_EVENT_SHFT 5 -#define CE_ADM_INT_PCIE_PORT1_DEV_A_SHFT 6 -#define CE_ADM_INT_PCIE_PORT1_DEV_B_SHFT 7 -#define CE_ADM_INT_PCIE_PORT1_DEV_C_SHFT 8 -#define CE_ADM_INT_PCIE_PORT1_DEV_D_SHFT 9 -#define CE_ADM_INT_PCIE_PORT2_DEV_A_SHFT 10 -#define CE_ADM_INT_PCIE_PORT2_DEV_B_SHFT 11 -#define CE_ADM_INT_PCIE_PORT2_DEV_C_SHFT 12 -#define CE_ADM_INT_PCIE_PORT2_DEV_D_SHFT 13 -#define CE_ADM_INT_PCIE_MSG_SHFT 14 /*see int_dest_14*/ -#define CE_ADM_INT_PCIE_MSG_SLOT_0_SHFT 14 -#define CE_ADM_INT_PCIE_MSG_SLOT_1_SHFT 15 -#define CE_ADM_INT_PCIE_MSG_SLOT_2_SHFT 16 -#define CE_ADM_INT_PCIE_MSG_SLOT_3_SHFT 17 -#define CE_ADM_INT_PORT1_PM_PME_MSG_SHFT 22 -#define CE_ADM_INT_PORT2_PM_PME_MSG_SHFT 23 - -/* ce_adm_force_int register bit defines */ -#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_A_SHFT 0 -#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_B_SHFT 1 -#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_C_SHFT 2 -#define CE_ADM_FORCE_INT_PCIE_PORT1_DEV_D_SHFT 3 -#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_A_SHFT 4 -#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_B_SHFT 5 -#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_C_SHFT 6 -#define CE_ADM_FORCE_INT_PCIE_PORT2_DEV_D_SHFT 7 -#define CE_ADM_FORCE_INT_ALWAYS_SHFT 8 - -/* ce_adm_int_dest register bit masks & shifts */ -#define INTR_VECTOR_SHFT 56 - -/* ce_adm_error_mask and ce_adm_error_summary register bit masks */ -#define CE_ADM_ERR_CRM_SSP_REQ_INVALID (0x1ULL << 0) -#define CE_ADM_ERR_SSP_REQ_HEADER (0x1ULL << 1) -#define CE_ADM_ERR_SSP_RSP_HEADER (0x1ULL << 2) -#define CE_ADM_ERR_SSP_PROTOCOL_ERROR (0x1ULL << 3) -#define CE_ADM_ERR_SSP_SBE (0x1ULL << 4) -#define CE_ADM_ERR_SSP_MBE (0x1ULL << 5) -#define CE_ADM_ERR_CXM_CREDIT_OFLOW (0x1ULL << 6) -#define CE_ADM_ERR_DRE_SSP_REQ_INVAL (0x1ULL << 7) -#define CE_ADM_ERR_SSP_REQ_LONG (0x1ULL << 8) -#define CE_ADM_ERR_SSP_REQ_OFLOW (0x1ULL << 9) -#define CE_ADM_ERR_SSP_REQ_SHORT (0x1ULL << 10) -#define CE_ADM_ERR_SSP_REQ_SIDEBAND (0x1ULL << 11) -#define CE_ADM_ERR_SSP_REQ_ADDR_ERR (0x1ULL << 12) -#define CE_ADM_ERR_SSP_REQ_BAD_BE (0x1ULL << 13) -#define CE_ADM_ERR_PCIE_COMPL_TIMEOUT (0x1ULL << 14) -#define CE_ADM_ERR_PCIE_UNEXP_COMPL (0x1ULL << 15) -#define CE_ADM_ERR_PCIE_ERR_COMPL (0x1ULL << 16) -#define CE_ADM_ERR_DRE_CREDIT_OFLOW (0x1ULL << 17) -#define CE_ADM_ERR_DRE_SRAM_PE (0x1ULL << 18) -#define CE_ADM_ERR_SSP_RSP_INVALID (0x1ULL << 19) -#define CE_ADM_ERR_SSP_RSP_LONG (0x1ULL << 20) -#define CE_ADM_ERR_SSP_RSP_SHORT (0x1ULL << 21) -#define CE_ADM_ERR_SSP_RSP_SIDEBAND (0x1ULL << 22) -#define CE_ADM_ERR_URE_SSP_RSP_UNEXP (0x1ULL << 23) -#define CE_ADM_ERR_URE_SSP_WR_REQ_TIMEOUT (0x1ULL << 24) -#define CE_ADM_ERR_URE_SSP_RD_REQ_TIMEOUT (0x1ULL << 25) -#define CE_ADM_ERR_URE_ATE3240_PAGE_FAULT (0x1ULL << 26) -#define CE_ADM_ERR_URE_ATE40_PAGE_FAULT (0x1ULL << 27) -#define CE_ADM_ERR_URE_CREDIT_OFLOW (0x1ULL << 28) -#define CE_ADM_ERR_URE_SRAM_PE (0x1ULL << 29) -#define CE_ADM_ERR_ADM_SSP_RSP_UNEXP (0x1ULL << 30) -#define CE_ADM_ERR_ADM_SSP_REQ_TIMEOUT (0x1ULL << 31) -#define CE_ADM_ERR_MMR_ACCESS_ERROR (0x1ULL << 32) -#define CE_ADM_ERR_MMR_ADDR_ERROR (0x1ULL << 33) -#define CE_ADM_ERR_ADM_CREDIT_OFLOW (0x1ULL << 34) -#define CE_ADM_ERR_ADM_SRAM_PE (0x1ULL << 35) -#define CE_ADM_ERR_DTL1_MIN_PDATA_CREDIT_ERR (0x1ULL << 36) -#define CE_ADM_ERR_DTL1_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 37) -#define CE_ADM_ERR_DTL1_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 38) -#define CE_ADM_ERR_DTL1_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 39) -#define CE_ADM_ERR_DTL1_COMP_HD_CRED_MAX_ERR (0x1ULL << 40) -#define CE_ADM_ERR_DTL1_COMP_D_CRED_MAX_ERR (0x1ULL << 41) -#define CE_ADM_ERR_DTL1_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 42) -#define CE_ADM_ERR_DTL1_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 43) -#define CE_ADM_ERR_DTL1_POSTED_HD_CRED_MAX_ERR (0x1ULL << 44) -#define CE_ADM_ERR_DTL1_POSTED_D_CRED_MAX_ERR (0x1ULL << 45) -#define CE_ADM_ERR_DTL2_MIN_PDATA_CREDIT_ERR (0x1ULL << 46) -#define CE_ADM_ERR_DTL2_INF_COMPL_CRED_UPDT_ERR (0x1ULL << 47) -#define CE_ADM_ERR_DTL2_INF_POSTED_CRED_UPDT_ERR (0x1ULL << 48) -#define CE_ADM_ERR_DTL2_INF_NPOSTED_CRED_UPDT_ERR (0x1ULL << 49) -#define CE_ADM_ERR_DTL2_COMP_HD_CRED_MAX_ERR (0x1ULL << 50) -#define CE_ADM_ERR_DTL2_COMP_D_CRED_MAX_ERR (0x1ULL << 51) -#define CE_ADM_ERR_DTL2_NPOSTED_HD_CRED_MAX_ERR (0x1ULL << 52) -#define CE_ADM_ERR_DTL2_NPOSTED_D_CRED_MAX_ERR (0x1ULL << 53) -#define CE_ADM_ERR_DTL2_POSTED_HD_CRED_MAX_ERR (0x1ULL << 54) -#define CE_ADM_ERR_DTL2_POSTED_D_CRED_MAX_ERR (0x1ULL << 55) -#define CE_ADM_ERR_PORT1_PCIE_COR_ERR (0x1ULL << 56) -#define CE_ADM_ERR_PORT1_PCIE_NFAT_ERR (0x1ULL << 57) -#define CE_ADM_ERR_PORT1_PCIE_FAT_ERR (0x1ULL << 58) -#define CE_ADM_ERR_PORT2_PCIE_COR_ERR (0x1ULL << 59) -#define CE_ADM_ERR_PORT2_PCIE_NFAT_ERR (0x1ULL << 60) -#define CE_ADM_ERR_PORT2_PCIE_FAT_ERR (0x1ULL << 61) - -/* ce_adm_ure_ups_buf_barrier_flush register bit masks and shifts */ -#define FLUSH_SEL_PORT1_PIPE0_SHFT 0 -#define FLUSH_SEL_PORT1_PIPE1_SHFT 4 -#define FLUSH_SEL_PORT1_PIPE2_SHFT 8 -#define FLUSH_SEL_PORT1_PIPE3_SHFT 12 -#define FLUSH_SEL_PORT2_PIPE0_SHFT 16 -#define FLUSH_SEL_PORT2_PIPE1_SHFT 20 -#define FLUSH_SEL_PORT2_PIPE2_SHFT 24 -#define FLUSH_SEL_PORT2_PIPE3_SHFT 28 - -/* ce_dre_config1 register bit masks and shifts */ -#define CE_DRE_RO_ENABLE (0x1ULL << 0) -#define CE_DRE_DYN_RO_ENABLE (0x1ULL << 1) -#define CE_DRE_SUP_CONFIG_COMP_ERROR (0x1ULL << 2) -#define CE_DRE_SUP_IO_COMP_ERROR (0x1ULL << 3) -#define CE_DRE_ADDR_MODE_SHFT 4 - -/* ce_dre_config_req_status register bit masks */ -#define CE_DRE_LAST_CONFIG_COMPLETION (0x7ULL << 0) -#define CE_DRE_DOWNSTREAM_CONFIG_ERROR (0x1ULL << 3) -#define CE_DRE_CONFIG_COMPLETION_VALID (0x1ULL << 4) -#define CE_DRE_CONFIG_REQUEST_ACTIVE (0x1ULL << 5) - -/* ce_ure_control register bit masks & shifts */ -#define CE_URE_RD_MRG_ENABLE (0x1ULL << 0) -#define CE_URE_WRT_MRG_ENABLE1 (0x1ULL << 4) -#define CE_URE_WRT_MRG_ENABLE2 (0x1ULL << 5) -#define CE_URE_WRT_MRG_TIMER_SHFT 12 -#define CE_URE_WRT_MRG_TIMER_MASK (0x7FFULL << CE_URE_WRT_MRG_TIMER_SHFT) -#define CE_URE_WRT_MRG_TIMER(x) (((u64)(x) << \ - CE_URE_WRT_MRG_TIMER_SHFT) & \ - CE_URE_WRT_MRG_TIMER_MASK) -#define CE_URE_RSPQ_BYPASS_DISABLE (0x1ULL << 24) -#define CE_URE_UPS_DAT1_PAR_DISABLE (0x1ULL << 32) -#define CE_URE_UPS_HDR1_PAR_DISABLE (0x1ULL << 33) -#define CE_URE_UPS_DAT2_PAR_DISABLE (0x1ULL << 34) -#define CE_URE_UPS_HDR2_PAR_DISABLE (0x1ULL << 35) -#define CE_URE_ATE_PAR_DISABLE (0x1ULL << 36) -#define CE_URE_RCI_PAR_DISABLE (0x1ULL << 37) -#define CE_URE_RSPQ_PAR_DISABLE (0x1ULL << 38) -#define CE_URE_DNS_DAT_PAR_DISABLE (0x1ULL << 39) -#define CE_URE_DNS_HDR_PAR_DISABLE (0x1ULL << 40) -#define CE_URE_MALFORM_DISABLE (0x1ULL << 44) -#define CE_URE_UNSUP_DISABLE (0x1ULL << 45) - -/* ce_ure_page_map register bit masks & shifts */ -#define CE_URE_ATE3240_ENABLE (0x1ULL << 0) -#define CE_URE_ATE40_ENABLE (0x1ULL << 1) -#define CE_URE_PAGESIZE_SHFT 4 -#define CE_URE_PAGESIZE_MASK (0x7ULL << CE_URE_PAGESIZE_SHFT) -#define CE_URE_4K_PAGESIZE (0x0ULL << CE_URE_PAGESIZE_SHFT) -#define CE_URE_16K_PAGESIZE (0x1ULL << CE_URE_PAGESIZE_SHFT) -#define CE_URE_64K_PAGESIZE (0x2ULL << CE_URE_PAGESIZE_SHFT) -#define CE_URE_128K_PAGESIZE (0x3ULL << CE_URE_PAGESIZE_SHFT) -#define CE_URE_256K_PAGESIZE (0x4ULL << CE_URE_PAGESIZE_SHFT) - -/* ce_ure_pipe_sel register bit masks & shifts */ -#define PKT_TRAFIC_SHRT 16 -#define BUS_SRC_ID_SHFT 8 -#define DEV_SRC_ID_SHFT 3 -#define FNC_SRC_ID_SHFT 0 -#define CE_URE_TC_MASK (0x07ULL << PKT_TRAFIC_SHRT) -#define CE_URE_BUS_MASK (0xFFULL << BUS_SRC_ID_SHFT) -#define CE_URE_DEV_MASK (0x1FULL << DEV_SRC_ID_SHFT) -#define CE_URE_FNC_MASK (0x07ULL << FNC_SRC_ID_SHFT) -#define CE_URE_PIPE_BUS(b) (((u64)(b) << BUS_SRC_ID_SHFT) & \ - CE_URE_BUS_MASK) -#define CE_URE_PIPE_DEV(d) (((u64)(d) << DEV_SRC_ID_SHFT) & \ - CE_URE_DEV_MASK) -#define CE_URE_PIPE_FNC(f) (((u64)(f) << FNC_SRC_ID_SHFT) & \ - CE_URE_FNC_MASK) - -#define CE_URE_SEL1_SHFT 0 -#define CE_URE_SEL2_SHFT 20 -#define CE_URE_SEL3_SHFT 40 -#define CE_URE_SEL1_MASK (0x7FFFFULL << CE_URE_SEL1_SHFT) -#define CE_URE_SEL2_MASK (0x7FFFFULL << CE_URE_SEL2_SHFT) -#define CE_URE_SEL3_MASK (0x7FFFFULL << CE_URE_SEL3_SHFT) - - -/* ce_ure_pipe_mask register bit masks & shifts */ -#define CE_URE_MASK1_SHFT 0 -#define CE_URE_MASK2_SHFT 20 -#define CE_URE_MASK3_SHFT 40 -#define CE_URE_MASK1_MASK (0x7FFFFULL << CE_URE_MASK1_SHFT) -#define CE_URE_MASK2_MASK (0x7FFFFULL << CE_URE_MASK2_SHFT) -#define CE_URE_MASK3_MASK (0x7FFFFULL << CE_URE_MASK3_SHFT) - - -/* ce_ure_pcie_control1 register bit masks & shifts */ -#define CE_URE_SI (0x1ULL << 0) -#define CE_URE_ELAL_SHFT 4 -#define CE_URE_ELAL_MASK (0x7ULL << CE_URE_ELAL_SHFT) -#define CE_URE_ELAL_SET(n) (((u64)(n) << CE_URE_ELAL_SHFT) & \ - CE_URE_ELAL_MASK) -#define CE_URE_ELAL1_SHFT 8 -#define CE_URE_ELAL1_MASK (0x7ULL << CE_URE_ELAL1_SHFT) -#define CE_URE_ELAL1_SET(n) (((u64)(n) << CE_URE_ELAL1_SHFT) & \ - CE_URE_ELAL1_MASK) -#define CE_URE_SCC (0x1ULL << 12) -#define CE_URE_PN1_SHFT 16 -#define CE_URE_PN1_MASK (0xFFULL << CE_URE_PN1_SHFT) -#define CE_URE_PN2_SHFT 24 -#define CE_URE_PN2_MASK (0xFFULL << CE_URE_PN2_SHFT) -#define CE_URE_PN1_SET(n) (((u64)(n) << CE_URE_PN1_SHFT) & \ - CE_URE_PN1_MASK) -#define CE_URE_PN2_SET(n) (((u64)(n) << CE_URE_PN2_SHFT) & \ - CE_URE_PN2_MASK) - -/* ce_ure_pcie_control2 register bit masks & shifts */ -#define CE_URE_ABP (0x1ULL << 0) -#define CE_URE_PCP (0x1ULL << 1) -#define CE_URE_MSP (0x1ULL << 2) -#define CE_URE_AIP (0x1ULL << 3) -#define CE_URE_PIP (0x1ULL << 4) -#define CE_URE_HPS (0x1ULL << 5) -#define CE_URE_HPC (0x1ULL << 6) -#define CE_URE_SPLV_SHFT 7 -#define CE_URE_SPLV_MASK (0xFFULL << CE_URE_SPLV_SHFT) -#define CE_URE_SPLV_SET(n) (((u64)(n) << CE_URE_SPLV_SHFT) & \ - CE_URE_SPLV_MASK) -#define CE_URE_SPLS_SHFT 15 -#define CE_URE_SPLS_MASK (0x3ULL << CE_URE_SPLS_SHFT) -#define CE_URE_SPLS_SET(n) (((u64)(n) << CE_URE_SPLS_SHFT) & \ - CE_URE_SPLS_MASK) -#define CE_URE_PSN1_SHFT 19 -#define CE_URE_PSN1_MASK (0x1FFFULL << CE_URE_PSN1_SHFT) -#define CE_URE_PSN2_SHFT 32 -#define CE_URE_PSN2_MASK (0x1FFFULL << CE_URE_PSN2_SHFT) -#define CE_URE_PSN1_SET(n) (((u64)(n) << CE_URE_PSN1_SHFT) & \ - CE_URE_PSN1_MASK) -#define CE_URE_PSN2_SET(n) (((u64)(n) << CE_URE_PSN2_SHFT) & \ - CE_URE_PSN2_MASK) - -/* - * PIO address space ranges for CE - */ - -/* Local CE Registers Space */ -#define CE_PIO_MMR 0x00000000 -#define CE_PIO_MMR_LEN 0x04000000 - -/* PCI Compatible Config Space */ -#define CE_PIO_CONFIG_SPACE 0x04000000 -#define CE_PIO_CONFIG_SPACE_LEN 0x04000000 - -/* PCI I/O Space Alias */ -#define CE_PIO_IO_SPACE_ALIAS 0x08000000 -#define CE_PIO_IO_SPACE_ALIAS_LEN 0x08000000 - -/* PCI Enhanced Config Space */ -#define CE_PIO_E_CONFIG_SPACE 0x10000000 -#define CE_PIO_E_CONFIG_SPACE_LEN 0x10000000 - -/* PCI I/O Space */ -#define CE_PIO_IO_SPACE 0x100000000 -#define CE_PIO_IO_SPACE_LEN 0x100000000 - -/* PCI MEM Space */ -#define CE_PIO_MEM_SPACE 0x200000000 -#define CE_PIO_MEM_SPACE_LEN TIO_HWIN_SIZE - - -/* - * CE PCI Enhanced Config Space shifts & masks - */ -#define CE_E_CONFIG_BUS_SHFT 20 -#define CE_E_CONFIG_BUS_MASK (0xFF << CE_E_CONFIG_BUS_SHFT) -#define CE_E_CONFIG_DEVICE_SHFT 15 -#define CE_E_CONFIG_DEVICE_MASK (0x1F << CE_E_CONFIG_DEVICE_SHFT) -#define CE_E_CONFIG_FUNC_SHFT 12 -#define CE_E_CONFIG_FUNC_MASK (0x7 << CE_E_CONFIG_FUNC_SHFT) - -#endif /* __ASM_IA64_SN_TIOCE_H__ */ diff --git a/include/asm-ia64/sn/tioce_provider.h b/include/asm-ia64/sn/tioce_provider.h deleted file mode 100644 index 32c32f3..0000000 --- a/include/asm-ia64/sn/tioce_provider.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2003-2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_CE_PROVIDER_H -#define _ASM_IA64_SN_CE_PROVIDER_H - -#include -#include - -/* - * Common TIOCE structure shared between the prom and kernel - * - * DO NOT CHANGE THIS STRUCT WITHOUT MAKING CORRESPONDING CHANGES TO THE - * PROM VERSION. - */ -struct tioce_common { - struct pcibus_bussoft ce_pcibus; /* common pciio header */ - - u32 ce_rev; - u64 ce_kernel_private; - u64 ce_prom_private; -}; - -struct tioce_kernel { - struct tioce_common *ce_common; - spinlock_t ce_lock; - struct list_head ce_dmamap_list; - - u64 ce_ate40_shadow[TIOCE_NUM_M40_ATES]; - u64 ce_ate3240_shadow[TIOCE_NUM_M3240_ATES]; - u32 ce_ate3240_pagesize; - - u8 ce_port1_secondary; - - /* per-port resources */ - struct { - int dirmap_refcnt; - u64 dirmap_shadow; - } ce_port[TIOCE_NUM_PORTS]; -}; - -struct tioce_dmamap { - struct list_head ce_dmamap_list; /* headed by tioce_kernel */ - u32 refcnt; - - u64 nbytes; /* # bytes mapped */ - - u64 ct_start; /* coretalk start address */ - u64 pci_start; /* bus start address */ - - u64 __iomem *ate_hw;/* hw ptr of first ate in map */ - u64 *ate_shadow; /* shadow ptr of firat ate */ - u16 ate_count; /* # ate's in the map */ -}; - -extern int tioce_init_provider(void); - -#endif /* __ASM_IA64_SN_CE_PROVIDER_H */ diff --git a/include/asm-ia64/sn/tiocp.h b/include/asm-ia64/sn/tiocp.h deleted file mode 100644 index e8ad0bb..0000000 --- a/include/asm-ia64/sn/tiocp.h +++ /dev/null @@ -1,257 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2003-2005 Silicon Graphics, Inc. All rights reserved. - */ -#ifndef _ASM_IA64_SN_PCI_TIOCP_H -#define _ASM_IA64_SN_PCI_TIOCP_H - -#define TIOCP_HOST_INTR_ADDR 0x003FFFFFFFFFFFFFUL -#define TIOCP_PCI64_CMDTYPE_MEM (0x1ull << 60) -#define TIOCP_PCI64_CMDTYPE_MSI (0x3ull << 60) - - -/***************************************************************************** - *********************** TIOCP MMR structure mapping *************************** - *****************************************************************************/ - -struct tiocp{ - - /* 0x000000-0x00FFFF -- Local Registers */ - - /* 0x000000-0x000057 -- (Legacy Widget Space) Configuration */ - u64 cp_id; /* 0x000000 */ - u64 cp_stat; /* 0x000008 */ - u64 cp_err_upper; /* 0x000010 */ - u64 cp_err_lower; /* 0x000018 */ - #define cp_err cp_err_lower - u64 cp_control; /* 0x000020 */ - u64 cp_req_timeout; /* 0x000028 */ - u64 cp_intr_upper; /* 0x000030 */ - u64 cp_intr_lower; /* 0x000038 */ - #define cp_intr cp_intr_lower - u64 cp_err_cmdword; /* 0x000040 */ - u64 _pad_000048; /* 0x000048 */ - u64 cp_tflush; /* 0x000050 */ - - /* 0x000058-0x00007F -- Bridge-specific Configuration */ - u64 cp_aux_err; /* 0x000058 */ - u64 cp_resp_upper; /* 0x000060 */ - u64 cp_resp_lower; /* 0x000068 */ - #define cp_resp cp_resp_lower - u64 cp_tst_pin_ctrl; /* 0x000070 */ - u64 cp_addr_lkerr; /* 0x000078 */ - - /* 0x000080-0x00008F -- PMU & MAP */ - u64 cp_dir_map; /* 0x000080 */ - u64 _pad_000088; /* 0x000088 */ - - /* 0x000090-0x00009F -- SSRAM */ - u64 cp_map_fault; /* 0x000090 */ - u64 _pad_000098; /* 0x000098 */ - - /* 0x0000A0-0x0000AF -- Arbitration */ - u64 cp_arb; /* 0x0000A0 */ - u64 _pad_0000A8; /* 0x0000A8 */ - - /* 0x0000B0-0x0000BF -- Number In A Can or ATE Parity Error */ - u64 cp_ate_parity_err; /* 0x0000B0 */ - u64 _pad_0000B8; /* 0x0000B8 */ - - /* 0x0000C0-0x0000FF -- PCI/GIO */ - u64 cp_bus_timeout; /* 0x0000C0 */ - u64 cp_pci_cfg; /* 0x0000C8 */ - u64 cp_pci_err_upper; /* 0x0000D0 */ - u64 cp_pci_err_lower; /* 0x0000D8 */ - #define cp_pci_err cp_pci_err_lower - u64 _pad_0000E0[4]; /* 0x0000{E0..F8} */ - - /* 0x000100-0x0001FF -- Interrupt */ - u64 cp_int_status; /* 0x000100 */ - u64 cp_int_enable; /* 0x000108 */ - u64 cp_int_rst_stat; /* 0x000110 */ - u64 cp_int_mode; /* 0x000118 */ - u64 cp_int_device; /* 0x000120 */ - u64 cp_int_host_err; /* 0x000128 */ - u64 cp_int_addr[8]; /* 0x0001{30,,,68} */ - u64 cp_err_int_view; /* 0x000170 */ - u64 cp_mult_int; /* 0x000178 */ - u64 cp_force_always[8]; /* 0x0001{80,,,B8} */ - u64 cp_force_pin[8]; /* 0x0001{C0,,,F8} */ - - /* 0x000200-0x000298 -- Device */ - u64 cp_device[4]; /* 0x0002{00,,,18} */ - u64 _pad_000220[4]; /* 0x0002{20,,,38} */ - u64 cp_wr_req_buf[4]; /* 0x0002{40,,,58} */ - u64 _pad_000260[4]; /* 0x0002{60,,,78} */ - u64 cp_rrb_map[2]; /* 0x0002{80,,,88} */ - #define cp_even_resp cp_rrb_map[0] /* 0x000280 */ - #define cp_odd_resp cp_rrb_map[1] /* 0x000288 */ - u64 cp_resp_status; /* 0x000290 */ - u64 cp_resp_clear; /* 0x000298 */ - - u64 _pad_0002A0[12]; /* 0x0002{A0..F8} */ - - /* 0x000300-0x0003F8 -- Buffer Address Match Registers */ - struct { - u64 upper; /* 0x0003{00,,,F0} */ - u64 lower; /* 0x0003{08,,,F8} */ - } cp_buf_addr_match[16]; - - /* 0x000400-0x0005FF -- Performance Monitor Registers (even only) */ - struct { - u64 flush_w_touch; /* 0x000{400,,,5C0} */ - u64 flush_wo_touch; /* 0x000{408,,,5C8} */ - u64 inflight; /* 0x000{410,,,5D0} */ - u64 prefetch; /* 0x000{418,,,5D8} */ - u64 total_pci_retry; /* 0x000{420,,,5E0} */ - u64 max_pci_retry; /* 0x000{428,,,5E8} */ - u64 max_latency; /* 0x000{430,,,5F0} */ - u64 clear_all; /* 0x000{438,,,5F8} */ - } cp_buf_count[8]; - - - /* 0x000600-0x0009FF -- PCI/X registers */ - u64 cp_pcix_bus_err_addr; /* 0x000600 */ - u64 cp_pcix_bus_err_attr; /* 0x000608 */ - u64 cp_pcix_bus_err_data; /* 0x000610 */ - u64 cp_pcix_pio_split_addr; /* 0x000618 */ - u64 cp_pcix_pio_split_attr; /* 0x000620 */ - u64 cp_pcix_dma_req_err_attr; /* 0x000628 */ - u64 cp_pcix_dma_req_err_addr; /* 0x000630 */ - u64 cp_pcix_timeout; /* 0x000638 */ - - u64 _pad_000640[24]; /* 0x000{640,,,6F8} */ - - /* 0x000700-0x000737 -- Debug Registers */ - u64 cp_ct_debug_ctl; /* 0x000700 */ - u64 cp_br_debug_ctl; /* 0x000708 */ - u64 cp_mux3_debug_ctl; /* 0x000710 */ - u64 cp_mux4_debug_ctl; /* 0x000718 */ - u64 cp_mux5_debug_ctl; /* 0x000720 */ - u64 cp_mux6_debug_ctl; /* 0x000728 */ - u64 cp_mux7_debug_ctl; /* 0x000730 */ - - u64 _pad_000738[89]; /* 0x000{738,,,9F8} */ - - /* 0x000A00-0x000BFF -- PCI/X Read&Write Buffer */ - struct { - u64 cp_buf_addr; /* 0x000{A00,,,AF0} */ - u64 cp_buf_attr; /* 0X000{A08,,,AF8} */ - } cp_pcix_read_buf_64[16]; - - struct { - u64 cp_buf_addr; /* 0x000{B00,,,BE0} */ - u64 cp_buf_attr; /* 0x000{B08,,,BE8} */ - u64 cp_buf_valid; /* 0x000{B10,,,BF0} */ - u64 __pad1; /* 0x000{B18,,,BF8} */ - } cp_pcix_write_buf_64[8]; - - /* End of Local Registers -- Start of Address Map space */ - - char _pad_000c00[0x010000 - 0x000c00]; - - /* 0x010000-0x011FF8 -- Internal ATE RAM (Auto Parity Generation) */ - u64 cp_int_ate_ram[1024]; /* 0x010000-0x011FF8 */ - - char _pad_012000[0x14000 - 0x012000]; - - /* 0x014000-0x015FF8 -- Internal ATE RAM (Manual Parity Generation) */ - u64 cp_int_ate_ram_mp[1024]; /* 0x014000-0x015FF8 */ - - char _pad_016000[0x18000 - 0x016000]; - - /* 0x18000-0x197F8 -- TIOCP Write Request Ram */ - u64 cp_wr_req_lower[256]; /* 0x18000 - 0x187F8 */ - u64 cp_wr_req_upper[256]; /* 0x18800 - 0x18FF8 */ - u64 cp_wr_req_parity[256]; /* 0x19000 - 0x197F8 */ - - char _pad_019800[0x1C000 - 0x019800]; - - /* 0x1C000-0x1EFF8 -- TIOCP Read Response Ram */ - u64 cp_rd_resp_lower[512]; /* 0x1C000 - 0x1CFF8 */ - u64 cp_rd_resp_upper[512]; /* 0x1D000 - 0x1DFF8 */ - u64 cp_rd_resp_parity[512]; /* 0x1E000 - 0x1EFF8 */ - - char _pad_01F000[0x20000 - 0x01F000]; - - /* 0x020000-0x021FFF -- Host Device (CP) Configuration Space (not used) */ - char _pad_020000[0x021000 - 0x20000]; - - /* 0x021000-0x027FFF -- PCI Device Configuration Spaces */ - union { - u8 c[0x1000 / 1]; /* 0x02{0000,,,7FFF} */ - u16 s[0x1000 / 2]; /* 0x02{0000,,,7FFF} */ - u32 l[0x1000 / 4]; /* 0x02{0000,,,7FFF} */ - u64 d[0x1000 / 8]; /* 0x02{0000,,,7FFF} */ - union { - u8 c[0x100 / 1]; - u16 s[0x100 / 2]; - u32 l[0x100 / 4]; - u64 d[0x100 / 8]; - } f[8]; - } cp_type0_cfg_dev[7]; /* 0x02{1000,,,7FFF} */ - - /* 0x028000-0x028FFF -- PCI Type 1 Configuration Space */ - union { - u8 c[0x1000 / 1]; /* 0x028000-0x029000 */ - u16 s[0x1000 / 2]; /* 0x028000-0x029000 */ - u32 l[0x1000 / 4]; /* 0x028000-0x029000 */ - u64 d[0x1000 / 8]; /* 0x028000-0x029000 */ - union { - u8 c[0x100 / 1]; - u16 s[0x100 / 2]; - u32 l[0x100 / 4]; - u64 d[0x100 / 8]; - } f[8]; - } cp_type1_cfg; /* 0x028000-0x029000 */ - - char _pad_029000[0x030000-0x029000]; - - /* 0x030000-0x030007 -- PCI Interrupt Acknowledge Cycle */ - union { - u8 c[8 / 1]; - u16 s[8 / 2]; - u32 l[8 / 4]; - u64 d[8 / 8]; - } cp_pci_iack; /* 0x030000-0x030007 */ - - char _pad_030007[0x040000-0x030008]; - - /* 0x040000-0x040007 -- PCIX Special Cycle */ - union { - u8 c[8 / 1]; - u16 s[8 / 2]; - u32 l[8 / 4]; - u64 d[8 / 8]; - } cp_pcix_cycle; /* 0x040000-0x040007 */ - - char _pad_040007[0x200000-0x040008]; - - /* 0x200000-0x7FFFFF -- PCI/GIO Device Spaces */ - union { - u8 c[0x100000 / 1]; - u16 s[0x100000 / 2]; - u32 l[0x100000 / 4]; - u64 d[0x100000 / 8]; - } cp_devio_raw[6]; /* 0x200000-0x7FFFFF */ - - #define cp_devio(n) cp_devio_raw[((n)<2)?(n*2):(n+2)] - - char _pad_800000[0xA00000-0x800000]; - - /* 0xA00000-0xBFFFFF -- PCI/GIO Device Spaces w/flush */ - union { - u8 c[0x100000 / 1]; - u16 s[0x100000 / 2]; - u32 l[0x100000 / 4]; - u64 d[0x100000 / 8]; - } cp_devio_raw_flush[6]; /* 0xA00000-0xBFFFFF */ - - #define cp_devio_flush(n) cp_devio_raw_flush[((n)<2)?(n*2):(n+2)] - -}; - -#endif /* _ASM_IA64_SN_PCI_TIOCP_H */ diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h deleted file mode 100644 index d297284..0000000 --- a/include/asm-ia64/sn/tiocx.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef _ASM_IA64_SN_TIO_TIOCX_H -#define _ASM_IA64_SN_TIO_TIOCX_H - -#ifdef __KERNEL__ - -struct cx_id_s { - unsigned int part_num; - unsigned int mfg_num; - int nasid; -}; - -struct cx_dev { - struct cx_id_s cx_id; - int bt; /* board/blade type */ - void *soft; /* driver specific */ - struct hubdev_info *hubdev; - struct device dev; - struct cx_drv *driver; -}; - -struct cx_device_id { - unsigned int part_num; - unsigned int mfg_num; -}; - -struct cx_drv { - char *name; - const struct cx_device_id *id_table; - struct device_driver driver; - int (*probe) (struct cx_dev * dev, const struct cx_device_id * id); - int (*remove) (struct cx_dev * dev); -}; - -/* create DMA address by stripping AS bits */ -#define TIOCX_DMA_ADDR(a) (u64)((u64)(a) & 0xffffcfffffffffUL) - -#define TIOCX_TO_TIOCX_DMA_ADDR(a) (u64)(((u64)(a) & 0xfffffffff) | \ - ((((u64)(a)) & 0xffffc000000000UL) <<2)) - -#define TIO_CE_ASIC_PARTNUM 0xce00 -#define TIOCX_CORELET 3 - -/* These are taken from tio_mmr_as.h */ -#define TIO_ICE_FRZ_CFG TIO_MMR_ADDR_MOD(0x00000000b0008100UL) -#define TIO_ICE_PMI_TX_CFG TIO_MMR_ADDR_MOD(0x00000000b000b100UL) -#define TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3 TIO_MMR_ADDR_MOD(0x00000000b000be18UL) -#define TIO_ICE_PMI_TX_DYN_CREDIT_STAT_CB3_CREDIT_CNT_MASK 0x000000000000000fUL - -#define to_cx_dev(n) container_of(n, struct cx_dev, dev) -#define to_cx_driver(drv) container_of(drv, struct cx_drv, driver) - -extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int); -extern void tiocx_irq_free(struct sn_irq_info *); -extern int cx_device_unregister(struct cx_dev *); -extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int); -extern int cx_driver_unregister(struct cx_drv *); -extern int cx_driver_register(struct cx_drv *); -extern u64 tiocx_dma_addr(u64 addr); -extern u64 tiocx_swin_base(int nasid); -extern void tiocx_mmr_store(int nasid, u64 offset, u64 value); -extern u64 tiocx_mmr_load(int nasid, u64 offset); - -#endif // __KERNEL__ -#endif // _ASM_IA64_SN_TIO_TIOCX__ diff --git a/include/asm-ia64/sn/types.h b/include/asm-ia64/sn/types.h deleted file mode 100644 index 8e04ee2..0000000 --- a/include/asm-ia64/sn/types.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1999,2001-2003 Silicon Graphics, Inc. All Rights Reserved. - * Copyright (C) 1999 by Ralf Baechle - */ -#ifndef _ASM_IA64_SN_TYPES_H -#define _ASM_IA64_SN_TYPES_H - -#include - -typedef unsigned long cpuid_t; -typedef signed short nasid_t; /* node id in numa-as-id space */ -typedef signed char partid_t; /* partition ID type */ -typedef unsigned int moduleid_t; /* user-visible module number type */ -typedef unsigned int cmoduleid_t; /* kernel compact module id type */ -typedef unsigned char slotid_t; /* slot (blade) within module */ -typedef unsigned char slabid_t; /* slab (asic) within slot */ -typedef u64 nic_t; -typedef unsigned long iopaddr_t; -typedef unsigned long paddr_t; -typedef short cnodeid_t; - -#endif /* _ASM_IA64_SN_TYPES_H */ diff --git a/include/asm-ia64/socket.h b/include/asm-ia64/socket.h deleted file mode 100644 index d5ef0aa..0000000 --- a/include/asm-ia64/socket.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef _ASM_IA64_SOCKET_H -#define _ASM_IA64_SOCKET_H - -/* - * Socket related defines. - * - * Based on . - * - * Modified 1998-2000 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_SNDBUFFORCE 32 -#define SO_RCVBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* _ASM_IA64_SOCKET_H */ diff --git a/include/asm-ia64/sockios.h b/include/asm-ia64/sockios.h deleted file mode 100644 index 15c9246..0000000 --- a/include/asm-ia64/sockios.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_IA64_SOCKIOS_H -#define _ASM_IA64_SOCKIOS_H - -/* - * Socket-level I/O control calls. - * - * Based on . - * - * Modified 1998, 1999 - * David Mosberger-Tang , Hewlett-Packard Co - */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif /* _ASM_IA64_SOCKIOS_H */ diff --git a/include/asm-ia64/sparsemem.h b/include/asm-ia64/sparsemem.h deleted file mode 100644 index 67a7c40..0000000 --- a/include/asm-ia64/sparsemem.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_IA64_SPARSEMEM_H -#define _ASM_IA64_SPARSEMEM_H - -#ifdef CONFIG_SPARSEMEM -/* - * SECTION_SIZE_BITS 2^N: how big each section will be - * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space - */ - -#define SECTION_SIZE_BITS (30) -#define MAX_PHYSMEM_BITS (50) -#ifdef CONFIG_FORCE_MAX_ZONEORDER -#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS) -#undef SECTION_SIZE_BITS -#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) -#endif -#endif - -#endif /* CONFIG_SPARSEMEM */ -#endif /* _ASM_IA64_SPARSEMEM_H */ diff --git a/include/asm-ia64/spinlock.h b/include/asm-ia64/spinlock.h deleted file mode 100644 index 0229fb9..0000000 --- a/include/asm-ia64/spinlock.h +++ /dev/null @@ -1,220 +0,0 @@ -#ifndef _ASM_IA64_SPINLOCK_H -#define _ASM_IA64_SPINLOCK_H - -/* - * Copyright (C) 1998-2003 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 Walt Drummond - * - * This file is used for SMP configurations only. - */ - -#include -#include -#include - -#include -#include -#include - -#define __raw_spin_lock_init(x) ((x)->lock = 0) - -#ifdef ASM_SUPPORTED -/* - * Try to get the lock. If we fail to get the lock, make a non-standard call to - * ia64_spinlock_contention(). We do not use a normal call because that would force all - * callers of __raw_spin_lock() to be non-leaf routines. Instead, ia64_spinlock_contention() is - * carefully coded to touch only those registers that __raw_spin_lock() marks "clobbered". - */ - -#define IA64_SPINLOCK_CLOBBERS "ar.ccv", "ar.pfs", "p14", "p15", "r27", "r28", "r29", "r30", "b6", "memory" - -static inline void -__raw_spin_lock_flags (raw_spinlock_t *lock, unsigned long flags) -{ - register volatile unsigned int *ptr asm ("r31") = &lock->lock; - -#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3) -# ifdef CONFIG_ITANIUM - /* don't use brl on Itanium... */ - asm volatile ("{\n\t" - " mov ar.ccv = r0\n\t" - " mov r28 = ip\n\t" - " mov r30 = 1;;\n\t" - "}\n\t" - "cmpxchg4.acq r30 = [%1], r30, ar.ccv\n\t" - "movl r29 = ia64_spinlock_contention_pre3_4;;\n\t" - "cmp4.ne p14, p0 = r30, r0\n\t" - "mov b6 = r29;;\n\t" - "mov r27=%2\n\t" - "(p14) br.cond.spnt.many b6" - : "=r"(ptr) : "r"(ptr), "r" (flags) : IA64_SPINLOCK_CLOBBERS); -# else - asm volatile ("{\n\t" - " mov ar.ccv = r0\n\t" - " mov r28 = ip\n\t" - " mov r30 = 1;;\n\t" - "}\n\t" - "cmpxchg4.acq r30 = [%1], r30, ar.ccv;;\n\t" - "cmp4.ne p14, p0 = r30, r0\n\t" - "mov r27=%2\n\t" - "(p14) brl.cond.spnt.many ia64_spinlock_contention_pre3_4;;" - : "=r"(ptr) : "r"(ptr), "r" (flags) : IA64_SPINLOCK_CLOBBERS); -# endif /* CONFIG_MCKINLEY */ -#else -# ifdef CONFIG_ITANIUM - /* don't use brl on Itanium... */ - /* mis-declare, so we get the entry-point, not it's function descriptor: */ - asm volatile ("mov r30 = 1\n\t" - "mov r27=%2\n\t" - "mov ar.ccv = r0;;\n\t" - "cmpxchg4.acq r30 = [%0], r30, ar.ccv\n\t" - "movl r29 = ia64_spinlock_contention;;\n\t" - "cmp4.ne p14, p0 = r30, r0\n\t" - "mov b6 = r29;;\n\t" - "(p14) br.call.spnt.many b6 = b6" - : "=r"(ptr) : "r"(ptr), "r" (flags) : IA64_SPINLOCK_CLOBBERS); -# else - asm volatile ("mov r30 = 1\n\t" - "mov r27=%2\n\t" - "mov ar.ccv = r0;;\n\t" - "cmpxchg4.acq r30 = [%0], r30, ar.ccv;;\n\t" - "cmp4.ne p14, p0 = r30, r0\n\t" - "(p14) brl.call.spnt.many b6=ia64_spinlock_contention;;" - : "=r"(ptr) : "r"(ptr), "r" (flags) : IA64_SPINLOCK_CLOBBERS); -# endif /* CONFIG_MCKINLEY */ -#endif -} - -#define __raw_spin_lock(lock) __raw_spin_lock_flags(lock, 0) - -/* Unlock by doing an ordered store and releasing the cacheline with nta */ -static inline void __raw_spin_unlock(raw_spinlock_t *x) { - barrier(); - asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(x)); -} - -#else /* !ASM_SUPPORTED */ -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) -# define __raw_spin_lock(x) \ -do { \ - __u32 *ia64_spinlock_ptr = (__u32 *) (x); \ - __u64 ia64_spinlock_val; \ - ia64_spinlock_val = ia64_cmpxchg4_acq(ia64_spinlock_ptr, 1, 0); \ - if (unlikely(ia64_spinlock_val)) { \ - do { \ - while (*ia64_spinlock_ptr) \ - ia64_barrier(); \ - ia64_spinlock_val = ia64_cmpxchg4_acq(ia64_spinlock_ptr, 1, 0); \ - } while (ia64_spinlock_val); \ - } \ -} while (0) -#define __raw_spin_unlock(x) do { barrier(); ((raw_spinlock_t *) x)->lock = 0; } while (0) -#endif /* !ASM_SUPPORTED */ - -#define __raw_spin_is_locked(x) ((x)->lock != 0) -#define __raw_spin_trylock(x) (cmpxchg_acq(&(x)->lock, 0, 1) == 0) -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) - -#define __raw_read_can_lock(rw) (*(volatile int *)(rw) >= 0) -#define __raw_write_can_lock(rw) (*(volatile int *)(rw) == 0) - -#define __raw_read_lock(rw) \ -do { \ - raw_rwlock_t *__read_lock_ptr = (rw); \ - \ - while (unlikely(ia64_fetchadd(1, (int *) __read_lock_ptr, acq) < 0)) { \ - ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ - while (*(volatile int *)__read_lock_ptr < 0) \ - cpu_relax(); \ - } \ -} while (0) - -#define __raw_read_unlock(rw) \ -do { \ - raw_rwlock_t *__read_lock_ptr = (rw); \ - ia64_fetchadd(-1, (int *) __read_lock_ptr, rel); \ -} while (0) - -#ifdef ASM_SUPPORTED -#define __raw_write_lock(rw) \ -do { \ - __asm__ __volatile__ ( \ - "mov ar.ccv = r0\n" \ - "dep r29 = -1, r0, 31, 1;;\n" \ - "1:\n" \ - "ld4 r2 = [%0];;\n" \ - "cmp4.eq p0,p7 = r0,r2\n" \ - "(p7) br.cond.spnt.few 1b \n" \ - "cmpxchg4.acq r2 = [%0], r29, ar.ccv;;\n" \ - "cmp4.eq p0,p7 = r0, r2\n" \ - "(p7) br.cond.spnt.few 1b;;\n" \ - :: "r"(rw) : "ar.ccv", "p7", "r2", "r29", "memory"); \ -} while(0) - -#define __raw_write_trylock(rw) \ -({ \ - register long result; \ - \ - __asm__ __volatile__ ( \ - "mov ar.ccv = r0\n" \ - "dep r29 = -1, r0, 31, 1;;\n" \ - "cmpxchg4.acq %0 = [%1], r29, ar.ccv\n" \ - : "=r"(result) : "r"(rw) : "ar.ccv", "r29", "memory"); \ - (result == 0); \ -}) - -static inline void __raw_write_unlock(raw_rwlock_t *x) -{ - u8 *y = (u8 *)x; - barrier(); - asm volatile ("st1.rel.nta [%0] = r0\n\t" :: "r"(y+3) : "memory" ); -} - -#else /* !ASM_SUPPORTED */ - -#define __raw_write_lock(l) \ -({ \ - __u64 ia64_val, ia64_set_val = ia64_dep_mi(-1, 0, 31, 1); \ - __u32 *ia64_write_lock_ptr = (__u32 *) (l); \ - do { \ - while (*ia64_write_lock_ptr) \ - ia64_barrier(); \ - ia64_val = ia64_cmpxchg4_acq(ia64_write_lock_ptr, ia64_set_val, 0); \ - } while (ia64_val); \ -}) - -#define __raw_write_trylock(rw) \ -({ \ - __u64 ia64_val; \ - __u64 ia64_set_val = ia64_dep_mi(-1, 0, 31,1); \ - ia64_val = ia64_cmpxchg4_acq((__u32 *)(rw), ia64_set_val, 0); \ - (ia64_val == 0); \ -}) - -static inline void __raw_write_unlock(raw_rwlock_t *x) -{ - barrier(); - x->write_lock = 0; -} - -#endif /* !ASM_SUPPORTED */ - -static inline int __raw_read_trylock(raw_rwlock_t *x) -{ - union { - raw_rwlock_t lock; - __u32 word; - } old, new; - old.lock = new.lock = *x; - old.lock.write_lock = new.lock.write_lock = 0; - ++new.lock.read_counter; - return (u32)ia64_cmpxchg4_acq((__u32 *)(x), new.word, old.word) == old.word; -} - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* _ASM_IA64_SPINLOCK_H */ diff --git a/include/asm-ia64/spinlock_types.h b/include/asm-ia64/spinlock_types.h deleted file mode 100644 index 474e46f..0000000 --- a/include/asm-ia64/spinlock_types.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_IA64_SPINLOCK_TYPES_H -#define _ASM_IA64_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned int lock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile unsigned int read_counter : 31; - volatile unsigned int write_lock : 1; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0, 0 } - -#endif diff --git a/include/asm-ia64/stat.h b/include/asm-ia64/stat.h deleted file mode 100644 index 367bb90..0000000 --- a/include/asm-ia64/stat.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _ASM_IA64_STAT_H -#define _ASM_IA64_STAT_H - -/* - * Modified 1998, 1999 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -struct stat { - unsigned long st_dev; - unsigned long st_ino; - unsigned long st_nlink; - unsigned int st_mode; - unsigned int st_uid; - unsigned int st_gid; - unsigned int __pad0; - unsigned long st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long st_blksize; - long st_blocks; - unsigned long __unused[3]; -}; - -#define STAT_HAVE_NSEC 1 - -struct ia64_oldstat { - unsigned int st_dev; - unsigned int st_ino; - unsigned int st_mode; - unsigned int st_nlink; - unsigned int st_uid; - unsigned int st_gid; - unsigned int st_rdev; - unsigned int __pad1; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; - unsigned int st_blksize; - int st_blocks; - unsigned int __unused1; - unsigned int __unused2; -}; - -#endif /* _ASM_IA64_STAT_H */ diff --git a/include/asm-ia64/statfs.h b/include/asm-ia64/statfs.h deleted file mode 100644 index 8110979..0000000 --- a/include/asm-ia64/statfs.h +++ /dev/null @@ -1,62 +0,0 @@ -#ifndef _ASM_IA64_STATFS_H -#define _ASM_IA64_STATFS_H - -/* - * Based on . - * - * Modified 1998, 1999, 2003 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#ifndef __KERNEL_STRICT_NAMES -# include -typedef __kernel_fsid_t fsid_t; -#endif - -/* - * This is ugly --- we're already 64-bit, so just duplicate the definitions - */ -struct statfs { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - - -struct statfs64 { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct compat_statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -} __attribute__((packed)); - -#endif /* _ASM_IA64_STATFS_H */ diff --git a/include/asm-ia64/string.h b/include/asm-ia64/string.h deleted file mode 100644 index 85fd65c..0000000 --- a/include/asm-ia64/string.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_IA64_STRING_H -#define _ASM_IA64_STRING_H - -/* - * Here is where we want to put optimized versions of the string - * routines. - * - * Copyright (C) 1998-2000, 2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#define __HAVE_ARCH_STRLEN 1 /* see arch/ia64/lib/strlen.S */ -#define __HAVE_ARCH_MEMSET 1 /* see arch/ia64/lib/memset.S */ -#define __HAVE_ARCH_MEMCPY 1 /* see arch/ia64/lib/memcpy.S */ - -extern __kernel_size_t strlen (const char *); -extern void *memcpy (void *, const void *, __kernel_size_t); -extern void *memset (void *, int, __kernel_size_t); - -#endif /* _ASM_IA64_STRING_H */ diff --git a/include/asm-ia64/suspend.h b/include/asm-ia64/suspend.h deleted file mode 100644 index b05bbb6..0000000 --- a/include/asm-ia64/suspend.h +++ /dev/null @@ -1 +0,0 @@ -/* dummy (must be non-empty to prevent prejudicial removal...) */ diff --git a/include/asm-ia64/system.h b/include/asm-ia64/system.h deleted file mode 100644 index 927a381..0000000 --- a/include/asm-ia64/system.h +++ /dev/null @@ -1,292 +0,0 @@ -#ifndef _ASM_IA64_SYSTEM_H -#define _ASM_IA64_SYSTEM_H - -/* - * System defines. Note that this is included both from .c and .S - * files, so it does only defines, not any C code. This is based - * on information published in the Processor Abstraction Layer - * and the System Abstraction Layer manual. - * - * Copyright (C) 1998-2003 Hewlett-Packard Co - * David Mosberger-Tang - * Copyright (C) 1999 Asit Mallick - * Copyright (C) 1999 Don Dugger - */ - -#include -#include -#include -#include - -#define GATE_ADDR RGN_BASE(RGN_GATE) - -/* - * 0xa000000000000000+2*PERCPU_PAGE_SIZE - * - 0xa000000000000000+3*PERCPU_PAGE_SIZE remain unmapped (guard page) - */ -#define KERNEL_START (GATE_ADDR+__IA64_UL_CONST(0x100000000)) -#define PERCPU_ADDR (-PERCPU_PAGE_SIZE) -#define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE) - -#ifndef __ASSEMBLY__ - -#include -#include - -#define AT_VECTOR_SIZE_ARCH 2 /* entries in ARCH_DLINFO */ - -struct pci_vector_struct { - __u16 segment; /* PCI Segment number */ - __u16 bus; /* PCI Bus number */ - __u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */ - __u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */ - __u32 irq; /* IRQ assigned */ -}; - -extern struct ia64_boot_param { - __u64 command_line; /* physical address of command line arguments */ - __u64 efi_systab; /* physical address of EFI system table */ - __u64 efi_memmap; /* physical address of EFI memory map */ - __u64 efi_memmap_size; /* size of EFI memory map */ - __u64 efi_memdesc_size; /* size of an EFI memory map descriptor */ - __u32 efi_memdesc_version; /* memory descriptor version */ - struct { - __u16 num_cols; /* number of columns on console output device */ - __u16 num_rows; /* number of rows on console output device */ - __u16 orig_x; /* cursor's x position */ - __u16 orig_y; /* cursor's y position */ - } console_info; - __u64 fpswa; /* physical address of the fpswa interface */ - __u64 initrd_start; - __u64 initrd_size; -} *ia64_boot_param; - -/* - * Macros to force memory ordering. In these descriptions, "previous" - * and "subsequent" refer to program order; "visible" means that all - * architecturally visible effects of a memory access have occurred - * (at a minimum, this means the memory has been read or written). - * - * wmb(): Guarantees that all preceding stores to memory- - * like regions are visible before any subsequent - * stores and that all following stores will be - * visible only after all previous stores. - * rmb(): Like wmb(), but for reads. - * mb(): wmb()/rmb() combo, i.e., all previous memory - * accesses are visible before all subsequent - * accesses and vice versa. This is also known as - * a "fence." - * - * Note: "mb()" and its variants cannot be used as a fence to order - * accesses to memory mapped I/O registers. For that, mf.a needs to - * be used. However, we don't want to always use mf.a because (a) - * it's (presumably) much slower than mf and (b) mf.a is supported for - * sequential memory pages only. - */ -#define mb() ia64_mf() -#define rmb() mb() -#define wmb() mb() -#define read_barrier_depends() do { } while(0) - -#ifdef CONFIG_SMP -# define smp_mb() mb() -# define smp_rmb() rmb() -# define smp_wmb() wmb() -# define smp_read_barrier_depends() read_barrier_depends() -#else -# define smp_mb() barrier() -# define smp_rmb() barrier() -# define smp_wmb() barrier() -# define smp_read_barrier_depends() do { } while(0) -#endif - -/* - * XXX check on this ---I suspect what Linus really wants here is - * acquire vs release semantics but we can't discuss this stuff with - * Linus just yet. Grrr... - */ -#define set_mb(var, value) do { (var) = (value); mb(); } while (0) - -#define safe_halt() ia64_pal_halt_light() /* PAL_HALT_LIGHT */ - -/* - * The group barrier in front of the rsm & ssm are necessary to ensure - * that none of the previous instructions in the same group are - * affected by the rsm/ssm. - */ -/* For spinlocks etc */ - -/* - * - clearing psr.i is implicitly serialized (visible by next insn) - * - setting psr.i requires data serialization - * - we need a stop-bit before reading PSR because we sometimes - * write a floating-point register right before reading the PSR - * and that writes to PSR.mfl - */ -#ifdef CONFIG_PARAVIRT -#define __local_save_flags() ia64_get_psr_i() -#else -#define __local_save_flags() ia64_getreg(_IA64_REG_PSR) -#endif - -#define __local_irq_save(x) \ -do { \ - ia64_stop(); \ - (x) = __local_save_flags(); \ - ia64_stop(); \ - ia64_rsm(IA64_PSR_I); \ -} while (0) - -#define __local_irq_disable() \ -do { \ - ia64_stop(); \ - ia64_rsm(IA64_PSR_I); \ -} while (0) - -#define __local_irq_restore(x) ia64_intrin_local_irq_restore((x) & IA64_PSR_I) - -#ifdef CONFIG_IA64_DEBUG_IRQ - - extern unsigned long last_cli_ip; - -# define __save_ip() last_cli_ip = ia64_getreg(_IA64_REG_IP) - -# define local_irq_save(x) \ -do { \ - unsigned long __psr; \ - \ - __local_irq_save(__psr); \ - if (__psr & IA64_PSR_I) \ - __save_ip(); \ - (x) = __psr; \ -} while (0) - -# define local_irq_disable() do { unsigned long __x; local_irq_save(__x); } while (0) - -# define local_irq_restore(x) \ -do { \ - unsigned long __old_psr, __psr = (x); \ - \ - local_save_flags(__old_psr); \ - __local_irq_restore(__psr); \ - if ((__old_psr & IA64_PSR_I) && !(__psr & IA64_PSR_I)) \ - __save_ip(); \ -} while (0) - -#else /* !CONFIG_IA64_DEBUG_IRQ */ -# define local_irq_save(x) __local_irq_save(x) -# define local_irq_disable() __local_irq_disable() -# define local_irq_restore(x) __local_irq_restore(x) -#endif /* !CONFIG_IA64_DEBUG_IRQ */ - -#define local_irq_enable() ({ ia64_stop(); ia64_ssm(IA64_PSR_I); ia64_srlz_d(); }) -#define local_save_flags(flags) ({ ia64_stop(); (flags) = __local_save_flags(); }) - -#define irqs_disabled() \ -({ \ - unsigned long __ia64_id_flags; \ - local_save_flags(__ia64_id_flags); \ - (__ia64_id_flags & IA64_PSR_I) == 0; \ -}) - -#ifdef __KERNEL__ - -#ifdef CONFIG_IA32_SUPPORT -# define IS_IA32_PROCESS(regs) (ia64_psr(regs)->is != 0) -#else -# define IS_IA32_PROCESS(regs) 0 -struct task_struct; -static inline void ia32_save_state(struct task_struct *t __attribute__((unused))){} -static inline void ia32_load_state(struct task_struct *t __attribute__((unused))){} -#endif - -/* - * Context switch from one thread to another. If the two threads have - * different address spaces, schedule() has already taken care of - * switching to the new address space by calling switch_mm(). - * - * Disabling access to the fph partition and the debug-register - * context switch MUST be done before calling ia64_switch_to() since a - * newly created thread returns directly to - * ia64_ret_from_syscall_clear_r8. - */ -extern struct task_struct *ia64_switch_to (void *next_task); - -struct task_struct; - -extern void ia64_save_extra (struct task_struct *task); -extern void ia64_load_extra (struct task_struct *task); - -#ifdef CONFIG_VIRT_CPU_ACCOUNTING -extern void ia64_account_on_switch (struct task_struct *prev, struct task_struct *next); -# define IA64_ACCOUNT_ON_SWITCH(p,n) ia64_account_on_switch(p,n) -#else -# define IA64_ACCOUNT_ON_SWITCH(p,n) -#endif - -#ifdef CONFIG_PERFMON - DECLARE_PER_CPU(unsigned long, pfm_syst_info); -# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1) -#else -# define PERFMON_IS_SYSWIDE() (0) -#endif - -#define IA64_HAS_EXTRA_STATE(t) \ - ((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \ - || IS_IA32_PROCESS(task_pt_regs(t)) || PERFMON_IS_SYSWIDE()) - -#define __switch_to(prev,next,last) do { \ - IA64_ACCOUNT_ON_SWITCH(prev, next); \ - if (IA64_HAS_EXTRA_STATE(prev)) \ - ia64_save_extra(prev); \ - if (IA64_HAS_EXTRA_STATE(next)) \ - ia64_load_extra(next); \ - ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \ - (last) = ia64_switch_to((next)); \ -} while (0) - -#ifdef CONFIG_SMP -/* - * In the SMP case, we save the fph state when context-switching away from a thread that - * modified fph. This way, when the thread gets scheduled on another CPU, the CPU can - * pick up the state from task->thread.fph, avoiding the complication of having to fetch - * the latest fph state from another CPU. In other words: eager save, lazy restore. - */ -# define switch_to(prev,next,last) do { \ - if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \ - ia64_psr(task_pt_regs(prev))->mfh = 0; \ - (prev)->thread.flags |= IA64_THREAD_FPH_VALID; \ - __ia64_save_fpu((prev)->thread.fph); \ - } \ - __switch_to(prev, next, last); \ - /* "next" in old context is "current" in new context */ \ - if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \ - (task_cpu(current) != \ - task_thread_info(current)->last_cpu))) { \ - platform_migrate(current); \ - task_thread_info(current)->last_cpu = task_cpu(current); \ - } \ -} while (0) -#else -# define switch_to(prev,next,last) __switch_to(prev, next, last) -#endif - -#define __ARCH_WANT_UNLOCKED_CTXSW -#define ARCH_HAS_PREFETCH_SWITCH_STACK -#define ia64_platform_is(x) (strcmp(x, platform_name) == 0) - -void cpu_idle_wait(void); - -#define arch_align_stack(x) (x) - -void default_idle(void); - -#ifdef CONFIG_VIRT_CPU_ACCOUNTING -extern void account_system_vtime(struct task_struct *); -#endif - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_IA64_SYSTEM_H */ diff --git a/include/asm-ia64/termbits.h b/include/asm-ia64/termbits.h deleted file mode 100644 index 9f162e0..0000000 --- a/include/asm-ia64/termbits.h +++ /dev/null @@ -1,207 +0,0 @@ -#ifndef _ASM_IA64_TERMBITS_H -#define _ASM_IA64_TERMBITS_H - -/* - * Based on . - * - * Modified 1999 - * David Mosberger-Tang , Hewlett-Packard Co - * - * 99/01/28 Added new baudrates - */ - -#include - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define BOTHER 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* _ASM_IA64_TERMBITS_H */ diff --git a/include/asm-ia64/termios.h b/include/asm-ia64/termios.h deleted file mode 100644 index 689d218..0000000 --- a/include/asm-ia64/termios.h +++ /dev/null @@ -1,97 +0,0 @@ -#ifndef _ASM_IA64_TERMIOS_H -#define _ASM_IA64_TERMIOS_H - -/* - * Modified 1999 - * David Mosberger-Tang , Hewlett-Packard Co - * - * 99/01/28 Added N_IRDA and N_SMSBLOCK - */ - -#include -#include - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -# ifdef __KERNEL__ - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) -#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) - -# endif /* __KERNEL__ */ - -#endif /* _ASM_IA64_TERMIOS_H */ diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h deleted file mode 100644 index 7c60fcd..0000000 --- a/include/asm-ia64/thread_info.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (C) 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ -#ifndef _ASM_IA64_THREAD_INFO_H -#define _ASM_IA64_THREAD_INFO_H - -#ifndef ASM_OFFSETS_C -#include -#endif -#include -#include - -#define PREEMPT_ACTIVE_BIT 30 -#define PREEMPT_ACTIVE (1 << PREEMPT_ACTIVE_BIT) - -#ifndef __ASSEMBLY__ - -/* - * On IA-64, we want to keep the task structure and kernel stack together, so they can be - * mapped by a single TLB entry and so they can be addressed by the "current" pointer - * without having to do pointer masking. - */ -struct thread_info { - struct task_struct *task; /* XXX not really needed, except for dup_task_struct() */ - struct exec_domain *exec_domain;/* execution domain */ - __u32 flags; /* thread_info flags (see TIF_*) */ - __u32 cpu; /* current CPU */ - __u32 last_cpu; /* Last CPU thread ran on */ - __u32 status; /* Thread synchronous flags */ - mm_segment_t addr_limit; /* user-level address space limit */ - int preempt_count; /* 0=premptable, <0=BUG; will also serve as bh-counter */ - struct restart_block restart_block; -#ifdef CONFIG_VIRT_CPU_ACCOUNTING - __u64 ac_stamp; - __u64 ac_leave; - __u64 ac_stime; - __u64 ac_utime; -#endif -}; - -#define THREAD_SIZE KERNEL_STACK_SIZE - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .addr_limit = KERNEL_DS, \ - .preempt_count = 0, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -#ifndef ASM_OFFSETS_C -/* how to get the thread information struct from C */ -#define current_thread_info() ((struct thread_info *) ((char *) current + IA64_TASK_SIZE)) -#define alloc_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) -#define task_thread_info(tsk) ((struct thread_info *) ((char *) (tsk) + IA64_TASK_SIZE)) -#else -#define current_thread_info() ((struct thread_info *) 0) -#define alloc_thread_info(tsk) ((struct thread_info *) 0) -#define task_thread_info(tsk) ((struct thread_info *) 0) -#endif -#define free_thread_info(ti) /* nothing */ -#define task_stack_page(tsk) ((void *)(tsk)) - -#define __HAVE_THREAD_FUNCTIONS -#ifdef CONFIG_VIRT_CPU_ACCOUNTING -#define setup_thread_stack(p, org) \ - *task_thread_info(p) = *task_thread_info(org); \ - task_thread_info(p)->ac_stime = 0; \ - task_thread_info(p)->ac_utime = 0; \ - task_thread_info(p)->task = (p); -#else -#define setup_thread_stack(p, org) \ - *task_thread_info(p) = *task_thread_info(org); \ - task_thread_info(p)->task = (p); -#endif -#define end_of_stack(p) (unsigned long *)((void *)(p) + IA64_RBS_OFFSET) - -#define __HAVE_ARCH_TASK_STRUCT_ALLOCATOR -#define alloc_task_struct() ((struct task_struct *)__get_free_pages(GFP_KERNEL | __GFP_COMP, KERNEL_STACK_SIZE_ORDER)) -#define free_task_struct(tsk) free_pages((unsigned long) (tsk), KERNEL_STACK_SIZE_ORDER) - -#define tsk_set_notify_resume(tsk) \ - set_ti_thread_flag(task_thread_info(tsk), TIF_NOTIFY_RESUME) -extern void tsk_clear_notify_resume(struct task_struct *tsk); -#endif /* !__ASSEMBLY */ - -/* - * thread information flags - * - these are process state flags that various assembly files may need to access - * - pending work-to-be-done flags are in least-significant 16 bits, other flags - * in top 16 bits - */ -#define TIF_SIGPENDING 0 /* signal pending */ -#define TIF_NEED_RESCHED 1 /* rescheduling necessary */ -#define TIF_SYSCALL_TRACE 2 /* syscall trace active */ -#define TIF_SYSCALL_AUDIT 3 /* syscall auditing active */ -#define TIF_SINGLESTEP 4 /* restore singlestep on return to user mode */ -#define TIF_NOTIFY_RESUME 6 /* resumption notification requested */ -#define TIF_POLLING_NRFLAG 16 /* true if poll_idle() is polling TIF_NEED_RESCHED */ -#define TIF_MEMDIE 17 -#define TIF_MCA_INIT 18 /* this task is processing MCA or INIT */ -#define TIF_DB_DISABLED 19 /* debug trap disabled for fsyscall */ -#define TIF_FREEZE 20 /* is freezing for suspend */ -#define TIF_RESTORE_RSE 21 /* user RBS is newer than kernel RBS */ - -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) -#define _TIF_SYSCALL_TRACEAUDIT (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SINGLESTEP) -#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) -#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) -#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) -#define _TIF_MCA_INIT (1 << TIF_MCA_INIT) -#define _TIF_DB_DISABLED (1 << TIF_DB_DISABLED) -#define _TIF_FREEZE (1 << TIF_FREEZE) -#define _TIF_RESTORE_RSE (1 << TIF_RESTORE_RSE) - -/* "work to do on user-return" bits */ -#define TIF_ALLWORK_MASK (_TIF_SIGPENDING|_TIF_NOTIFY_RESUME|_TIF_SYSCALL_AUDIT|\ - _TIF_NEED_RESCHED|_TIF_SYSCALL_TRACE) -/* like TIF_ALLWORK_BITS but sans TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT */ -#define TIF_WORK_MASK (TIF_ALLWORK_MASK&~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)) - -#define TS_POLLING 1 /* true if in idle loop and not sleeping */ -#define TS_RESTORE_SIGMASK 2 /* restore signal mask in do_signal() */ - -#define tsk_is_polling(t) (task_thread_info(t)->status & TS_POLLING) - -#ifndef __ASSEMBLY__ -#define HAVE_SET_RESTORE_SIGMASK 1 -static inline void set_restore_sigmask(void) -{ - struct thread_info *ti = current_thread_info(); - ti->status |= TS_RESTORE_SIGMASK; - set_bit(TIF_SIGPENDING, &ti->flags); -} -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_THREAD_INFO_H */ diff --git a/include/asm-ia64/timex.h b/include/asm-ia64/timex.h deleted file mode 100644 index 05a6baf..0000000 --- a/include/asm-ia64/timex.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASM_IA64_TIMEX_H -#define _ASM_IA64_TIMEX_H - -/* - * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co - * David Mosberger-Tang - */ -/* - * 2001/01/18 davidm Removed CLOCK_TICK_RATE. It makes no sense on IA-64. - * Also removed cacheflush_time as it's entirely unused. - */ - -#include -#include - -typedef unsigned long cycles_t; - -extern void (*ia64_udelay)(unsigned long usecs); - -/* - * For performance reasons, we don't want to define CLOCK_TICK_TRATE as - * local_cpu_data->itc_rate. Fortunately, we don't have to, either: according to George - * Anzinger, 1/CLOCK_TICK_RATE is taken as the resolution of the timer clock. The time - * calculation assumes that you will use enough of these so that your tick size <= 1/HZ. - * If the calculation shows that your CLOCK_TICK_RATE can not supply exactly 1/HZ ticks, - * the actual value is calculated and used to update the wall clock each jiffie. Setting - * the CLOCK_TICK_RATE to x*HZ insures that the calculation will find no errors. Hence we - * pick a multiple of HZ which gives us a (totally virtual) CLOCK_TICK_RATE of about - * 100MHz. - */ -#define CLOCK_TICK_RATE (HZ * 100000UL) - -static inline cycles_t -get_cycles (void) -{ - cycles_t ret; - - ret = ia64_getreg(_IA64_REG_AR_ITC); - return ret; -} - -#endif /* _ASM_IA64_TIMEX_H */ diff --git a/include/asm-ia64/tlb.h b/include/asm-ia64/tlb.h deleted file mode 100644 index 20d8a39..0000000 --- a/include/asm-ia64/tlb.h +++ /dev/null @@ -1,257 +0,0 @@ -#ifndef _ASM_IA64_TLB_H -#define _ASM_IA64_TLB_H -/* - * Based on . - * - * Copyright (C) 2002-2003 Hewlett-Packard Co - * David Mosberger-Tang - */ -/* - * Removing a translation from a page table (including TLB-shootdown) is a four-step - * procedure: - * - * (1) Flush (virtual) caches --- ensures virtual memory is coherent with kernel memory - * (this is a no-op on ia64). - * (2) Clear the relevant portions of the page-table - * (3) Flush the TLBs --- ensures that stale content is gone from CPU TLBs - * (4) Release the pages that were freed up in step (2). - * - * Note that the ordering of these steps is crucial to avoid races on MP machines. - * - * The Linux kernel defines several platform-specific hooks for TLB-shootdown. When - * unmapping a portion of the virtual address space, these hooks are called according to - * the following template: - * - * tlb <- tlb_gather_mmu(mm, full_mm_flush); // start unmap for address space MM - * { - * for each vma that needs a shootdown do { - * tlb_start_vma(tlb, vma); - * for each page-table-entry PTE that needs to be removed do { - * tlb_remove_tlb_entry(tlb, pte, address); - * if (pte refers to a normal page) { - * tlb_remove_page(tlb, page); - * } - * } - * tlb_end_vma(tlb, vma); - * } - * } - * tlb_finish_mmu(tlb, start, end); // finish unmap for address space MM - */ -#include -#include -#include - -#include -#include -#include -#include - -#ifdef CONFIG_SMP -# define FREE_PTE_NR 2048 -# define tlb_fast_mode(tlb) ((tlb)->nr == ~0U) -#else -# define FREE_PTE_NR 0 -# define tlb_fast_mode(tlb) (1) -#endif - -struct mmu_gather { - struct mm_struct *mm; - unsigned int nr; /* == ~0U => fast mode */ - unsigned char fullmm; /* non-zero means full mm flush */ - unsigned char need_flush; /* really unmapped some PTEs? */ - unsigned long start_addr; - unsigned long end_addr; - struct page *pages[FREE_PTE_NR]; -}; - -struct ia64_tr_entry { - u64 ifa; - u64 itir; - u64 pte; - u64 rr; -}; /*Record for tr entry!*/ - -extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size); -extern void ia64_ptr_entry(u64 target_mask, int slot); - -extern struct ia64_tr_entry __per_cpu_idtrs[NR_CPUS][2][IA64_TR_ALLOC_MAX]; - -/* - region register macros -*/ -#define RR_TO_VE(val) (((val) >> 0) & 0x0000000000000001) -#define RR_VE(val) (((val) & 0x0000000000000001) << 0) -#define RR_VE_MASK 0x0000000000000001L -#define RR_VE_SHIFT 0 -#define RR_TO_PS(val) (((val) >> 2) & 0x000000000000003f) -#define RR_PS(val) (((val) & 0x000000000000003f) << 2) -#define RR_PS_MASK 0x00000000000000fcL -#define RR_PS_SHIFT 2 -#define RR_RID_MASK 0x00000000ffffff00L -#define RR_TO_RID(val) ((val >> 8) & 0xffffff) - -/* Users of the generic TLB shootdown code must declare this storage space. */ -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - -/* - * Flush the TLB for address range START to END and, if not in fast mode, release the - * freed pages that where gathered up to this point. - */ -static inline void -ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) -{ - unsigned int nr; - - if (!tlb->need_flush) - return; - tlb->need_flush = 0; - - if (tlb->fullmm) { - /* - * Tearing down the entire address space. This happens both as a result - * of exit() and execve(). The latter case necessitates the call to - * flush_tlb_mm() here. - */ - flush_tlb_mm(tlb->mm); - } else if (unlikely (end - start >= 1024*1024*1024*1024UL - || REGION_NUMBER(start) != REGION_NUMBER(end - 1))) - { - /* - * If we flush more than a tera-byte or across regions, we're probably - * better off just flushing the entire TLB(s). This should be very rare - * and is not worth optimizing for. - */ - flush_tlb_all(); - } else { - /* - * XXX fix me: flush_tlb_range() should take an mm pointer instead of a - * vma pointer. - */ - struct vm_area_struct vma; - - vma.vm_mm = tlb->mm; - /* flush the address range from the tlb: */ - flush_tlb_range(&vma, start, end); - /* now flush the virt. page-table area mapping the address range: */ - flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end)); - } - - /* lastly, release the freed pages */ - nr = tlb->nr; - if (!tlb_fast_mode(tlb)) { - unsigned long i; - tlb->nr = 0; - tlb->start_addr = ~0UL; - for (i = 0; i < nr; ++i) - free_page_and_swap_cache(tlb->pages[i]); - } -} - -/* - * Return a pointer to an initialized struct mmu_gather. - */ -static inline struct mmu_gather * -tlb_gather_mmu (struct mm_struct *mm, unsigned int full_mm_flush) -{ - struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); - - tlb->mm = mm; - /* - * Use fast mode if only 1 CPU is online. - * - * It would be tempting to turn on fast-mode for full_mm_flush as well. But this - * doesn't work because of speculative accesses and software prefetching: the page - * table of "mm" may (and usually is) the currently active page table and even - * though the kernel won't do any user-space accesses during the TLB shoot down, a - * compiler might use speculation or lfetch.fault on what happens to be a valid - * user-space address. This in turn could trigger a TLB miss fault (or a VHPT - * walk) and re-insert a TLB entry we just removed. Slow mode avoids such - * problems. (We could make fast-mode work by switching the current task to a - * different "mm" during the shootdown.) --davidm 08/02/2002 - */ - tlb->nr = (num_online_cpus() == 1) ? ~0U : 0; - tlb->fullmm = full_mm_flush; - tlb->start_addr = ~0UL; - return tlb; -} - -/* - * Called at the end of the shootdown operation to free up any resources that were - * collected. - */ -static inline void -tlb_finish_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end) -{ - /* - * Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and - * tlb->end_addr. - */ - ia64_tlb_flush_mmu(tlb, start, end); - - /* keep the page table cache within bounds */ - check_pgt_cache(); - - put_cpu_var(mmu_gathers); -} - -/* - * Logically, this routine frees PAGE. On MP machines, the actual freeing of the page - * must be delayed until after the TLB has been flushed (see comments at the beginning of - * this file). - */ -static inline void -tlb_remove_page (struct mmu_gather *tlb, struct page *page) -{ - tlb->need_flush = 1; - - if (tlb_fast_mode(tlb)) { - free_page_and_swap_cache(page); - return; - } - tlb->pages[tlb->nr++] = page; - if (tlb->nr >= FREE_PTE_NR) - ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr); -} - -/* - * Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any - * PTE, not just those pointing to (normal) physical memory. - */ -static inline void -__tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address) -{ - if (tlb->start_addr == ~0UL) - tlb->start_addr = address; - tlb->end_addr = address + PAGE_SIZE; -} - -#define tlb_migrate_finish(mm) platform_tlb_migrate_finish(mm) - -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) - -#define tlb_remove_tlb_entry(tlb, ptep, addr) \ -do { \ - tlb->need_flush = 1; \ - __tlb_remove_tlb_entry(tlb, ptep, addr); \ -} while (0) - -#define pte_free_tlb(tlb, ptep) \ -do { \ - tlb->need_flush = 1; \ - __pte_free_tlb(tlb, ptep); \ -} while (0) - -#define pmd_free_tlb(tlb, ptep) \ -do { \ - tlb->need_flush = 1; \ - __pmd_free_tlb(tlb, ptep); \ -} while (0) - -#define pud_free_tlb(tlb, pudp) \ -do { \ - tlb->need_flush = 1; \ - __pud_free_tlb(tlb, pudp); \ -} while (0) - -#endif /* _ASM_IA64_TLB_H */ diff --git a/include/asm-ia64/tlbflush.h b/include/asm-ia64/tlbflush.h deleted file mode 100644 index 3be25df..0000000 --- a/include/asm-ia64/tlbflush.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef _ASM_IA64_TLBFLUSH_H -#define _ASM_IA64_TLBFLUSH_H - -/* - * Copyright (C) 2002 Hewlett-Packard Co - * David Mosberger-Tang - */ - - -#include - -#include -#include -#include - -/* - * Now for some TLB flushing routines. This is the kind of stuff that - * can be very expensive, so try to avoid them whenever possible. - */ -extern void setup_ptcg_sem(int max_purges, int from_palo); - -/* - * Flush everything (kernel mapping may also have changed due to - * vmalloc/vfree). - */ -extern void local_flush_tlb_all (void); - -#ifdef CONFIG_SMP - extern void smp_flush_tlb_all (void); - extern void smp_flush_tlb_mm (struct mm_struct *mm); - extern void smp_flush_tlb_cpumask (cpumask_t xcpumask); -# define flush_tlb_all() smp_flush_tlb_all() -#else -# define flush_tlb_all() local_flush_tlb_all() -# define smp_flush_tlb_cpumask(m) local_flush_tlb_all() -#endif - -static inline void -local_finish_flush_tlb_mm (struct mm_struct *mm) -{ - if (mm == current->active_mm) - activate_context(mm); -} - -/* - * Flush a specified user mapping. This is called, e.g., as a result of fork() and - * exit(). fork() ends up here because the copy-on-write mechanism needs to write-protect - * the PTEs of the parent task. - */ -static inline void -flush_tlb_mm (struct mm_struct *mm) -{ - if (!mm) - return; - - set_bit(mm->context, ia64_ctx.flushmap); - mm->context = 0; - - if (atomic_read(&mm->mm_users) == 0) - return; /* happens as a result of exit_mmap() */ - -#ifdef CONFIG_SMP - smp_flush_tlb_mm(mm); -#else - local_finish_flush_tlb_mm(mm); -#endif -} - -extern void flush_tlb_range (struct vm_area_struct *vma, unsigned long start, unsigned long end); - -/* - * Page-granular tlb flush. - */ -static inline void -flush_tlb_page (struct vm_area_struct *vma, unsigned long addr) -{ -#ifdef CONFIG_SMP - flush_tlb_range(vma, (addr & PAGE_MASK), (addr & PAGE_MASK) + PAGE_SIZE); -#else - if (vma->vm_mm == current->active_mm) - ia64_ptcl(addr, (PAGE_SHIFT << 2)); - else - vma->vm_mm->context = 0; -#endif -} - -/* - * Flush the local TLB. Invoked from another cpu using an IPI. - */ -#ifdef CONFIG_SMP -void smp_local_flush_tlb(void); -#else -#define smp_local_flush_tlb() -#endif - -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ - flush_tlb_all(); /* XXX fix me */ -} - -#endif /* _ASM_IA64_TLBFLUSH_H */ diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h deleted file mode 100644 index 32863b3..0000000 --- a/include/asm-ia64/topology.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * linux/include/asm-ia64/topology.h - * - * Copyright (C) 2002, Erich Focht, NEC - * - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ -#ifndef _ASM_IA64_TOPOLOGY_H -#define _ASM_IA64_TOPOLOGY_H - -#include -#include -#include - -#ifdef CONFIG_NUMA - -/* Nodes w/o CPUs are preferred for memory allocations, see build_zonelists */ -#define PENALTY_FOR_NODE_WITH_CPUS 255 - -/* - * Distance above which we begin to use zone reclaim - */ -#define RECLAIM_DISTANCE 15 - -/* - * Returns the number of the node containing CPU 'cpu' - */ -#define cpu_to_node(cpu) (int)(cpu_to_node_map[cpu]) - -/* - * Returns a bitmask of CPUs on Node 'node'. - */ -#define node_to_cpumask(node) (node_to_cpu_mask[node]) - -/* - * Returns the number of the node containing Node 'nid'. - * Not implemented here. Multi-level hierarchies detected with - * the help of node_distance(). - */ -#define parent_node(nid) (nid) - -/* - * Returns the number of the first CPU on Node 'node'. - */ -#define node_to_first_cpu(node) (first_cpu(node_to_cpumask(node))) - -/* - * Determines the node for a given pci bus - */ -#define pcibus_to_node(bus) PCI_CONTROLLER(bus)->node - -void build_cpu_to_node_map(void); - -#define SD_CPU_INIT (struct sched_domain) { \ - .span = CPU_MASK_NONE, \ - .parent = NULL, \ - .child = NULL, \ - .groups = NULL, \ - .min_interval = 1, \ - .max_interval = 4, \ - .busy_factor = 64, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 2, \ - .idle_idx = 1, \ - .newidle_idx = 2, \ - .wake_idx = 1, \ - .forkexec_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_NEWIDLE \ - | SD_BALANCE_EXEC \ - | SD_WAKE_AFFINE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ - .nr_balance_failed = 0, \ -} - -/* sched_domains SD_NODE_INIT for IA64 NUMA machines */ -#define SD_NODE_INIT (struct sched_domain) { \ - .span = CPU_MASK_NONE, \ - .parent = NULL, \ - .child = NULL, \ - .groups = NULL, \ - .min_interval = 8, \ - .max_interval = 8*(min(num_online_cpus(), 32)), \ - .busy_factor = 64, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 3, \ - .idle_idx = 2, \ - .newidle_idx = 2, \ - .wake_idx = 1, \ - .forkexec_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_EXEC \ - | SD_BALANCE_FORK \ - | SD_SERIALIZE \ - | SD_WAKE_BALANCE, \ - .last_balance = jiffies, \ - .balance_interval = 64, \ - .nr_balance_failed = 0, \ -} - -#endif /* CONFIG_NUMA */ - -#ifdef CONFIG_SMP -#define topology_physical_package_id(cpu) (cpu_data(cpu)->socket_id) -#define topology_core_id(cpu) (cpu_data(cpu)->core_id) -#define topology_core_siblings(cpu) (cpu_core_map[cpu]) -#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) -#define smt_capable() (smp_num_siblings > 1) -#endif - -extern void arch_fix_phys_package_id(int num, u32 slot); - -#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus)) \ - ) - -#include - -#endif /* _ASM_IA64_TOPOLOGY_H */ diff --git a/include/asm-ia64/types.h b/include/asm-ia64/types.h deleted file mode 100644 index e36b371..0000000 --- a/include/asm-ia64/types.h +++ /dev/null @@ -1,46 +0,0 @@ -#ifndef _ASM_IA64_TYPES_H -#define _ASM_IA64_TYPES_H - -/* - * This file is never included by application software unless explicitly requested (e.g., - * via linux/types.h) in which case the application is Linux specific so (user-) name - * space pollution is not a major issue. However, for interoperability, libraries still - * need to be careful to avoid a name clashes. - * - * Based on . - * - * Modified 1998-2000, 2002 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include - -#ifdef __ASSEMBLY__ -# define __IA64_UL(x) (x) -# define __IA64_UL_CONST(x) x - -# ifdef __KERNEL__ -# define BITS_PER_LONG 64 -# endif - -#else -# define __IA64_UL(x) ((unsigned long)(x)) -# define __IA64_UL_CONST(x) x##UL - -typedef unsigned int umode_t; - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -# ifdef __KERNEL__ - -#define BITS_PER_LONG 64 - -/* DMA addresses are 64-bits wide, in general. */ - -typedef u64 dma_addr_t; - -# endif /* __KERNEL__ */ -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_IA64_TYPES_H */ diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h deleted file mode 100644 index 449c8c0..0000000 --- a/include/asm-ia64/uaccess.h +++ /dev/null @@ -1,401 +0,0 @@ -#ifndef _ASM_IA64_UACCESS_H -#define _ASM_IA64_UACCESS_H - -/* - * This file defines various macros to transfer memory areas across - * the user/kernel boundary. This needs to be done carefully because - * this code is executed in kernel mode and uses user-specified - * addresses. Thus, we need to be careful not to let the user to - * trick us into accessing kernel memory that would normally be - * inaccessible. This code is also fairly performance sensitive, - * so we want to spend as little time doing safety checks as - * possible. - * - * To make matters a bit more interesting, these macros sometimes also - * called from within the kernel itself, in which case the address - * validity check must be skipped. The get_fs() macro tells us what - * to do: if get_fs()==USER_DS, checking is performed, if - * get_fs()==KERNEL_DS, checking is bypassed. - * - * Note that even if the memory area specified by the user is in a - * valid address range, it is still possible that we'll get a page - * fault while accessing it. This is handled by filling out an - * exception handler fixup entry for each instruction that has the - * potential to fault. When such a fault occurs, the page fault - * handler checks to see whether the faulting instruction has a fixup - * associated and, if so, sets r8 to -EFAULT and clears r9 to 0 and - * then resumes execution at the continuation point. - * - * Based on . - * - * Copyright (C) 1998, 1999, 2001-2004 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -/* - * For historical reasons, the following macros are grossly misnamed: - */ -#define KERNEL_DS ((mm_segment_t) { ~0UL }) /* cf. access_ok() */ -#define USER_DS ((mm_segment_t) { TASK_SIZE-1 }) /* cf. access_ok() */ - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define get_ds() (KERNEL_DS) -#define get_fs() (current_thread_info()->addr_limit) -#define set_fs(x) (current_thread_info()->addr_limit = (x)) - -#define segment_eq(a, b) ((a).seg == (b).seg) - -/* - * When accessing user memory, we need to make sure the entire area really is in - * user-level space. In order to do this efficiently, we make sure that the page at - * address TASK_SIZE is never valid. We also need to make sure that the address doesn't - * point inside the virtually mapped linear page table. - */ -#define __access_ok(addr, size, segment) \ -({ \ - __chk_user_ptr(addr); \ - (likely((unsigned long) (addr) <= (segment).seg) \ - && ((segment).seg == KERNEL_DS.seg \ - || likely(REGION_OFFSET((unsigned long) (addr)) < RGN_MAP_LIMIT))); \ -}) -#define access_ok(type, addr, size) __access_ok((addr), (size), get_fs()) - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - * - * Careful to not - * (a) re-use the arguments for side effects (sizeof/typeof is ok) - * (b) require any knowledge of processes at this stage - */ -#define put_user(x, ptr) __put_user_check((__typeof__(*(ptr))) (x), (ptr), sizeof(*(ptr)), get_fs()) -#define get_user(x, ptr) __get_user_check((x), (ptr), sizeof(*(ptr)), get_fs()) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the programmer has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x, ptr) __put_user_nocheck((__typeof__(*(ptr))) (x), (ptr), sizeof(*(ptr))) -#define __get_user(x, ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) - -extern long __put_user_unaligned_unknown (void); - -#define __put_user_unaligned(x, ptr) \ -({ \ - long __ret; \ - switch (sizeof(*(ptr))) { \ - case 1: __ret = __put_user((x), (ptr)); break; \ - case 2: __ret = (__put_user((x), (u8 __user *)(ptr))) \ - | (__put_user((x) >> 8, ((u8 __user *)(ptr) + 1))); break; \ - case 4: __ret = (__put_user((x), (u16 __user *)(ptr))) \ - | (__put_user((x) >> 16, ((u16 __user *)(ptr) + 1))); break; \ - case 8: __ret = (__put_user((x), (u32 __user *)(ptr))) \ - | (__put_user((x) >> 32, ((u32 __user *)(ptr) + 1))); break; \ - default: __ret = __put_user_unaligned_unknown(); \ - } \ - __ret; \ -}) - -extern long __get_user_unaligned_unknown (void); - -#define __get_user_unaligned(x, ptr) \ -({ \ - long __ret; \ - switch (sizeof(*(ptr))) { \ - case 1: __ret = __get_user((x), (ptr)); break; \ - case 2: __ret = (__get_user((x), (u8 __user *)(ptr))) \ - | (__get_user((x) >> 8, ((u8 __user *)(ptr) + 1))); break; \ - case 4: __ret = (__get_user((x), (u16 __user *)(ptr))) \ - | (__get_user((x) >> 16, ((u16 __user *)(ptr) + 1))); break; \ - case 8: __ret = (__get_user((x), (u32 __user *)(ptr))) \ - | (__get_user((x) >> 32, ((u32 __user *)(ptr) + 1))); break; \ - default: __ret = __get_user_unaligned_unknown(); \ - } \ - __ret; \ -}) - -#ifdef ASM_SUPPORTED - struct __large_struct { unsigned long buf[100]; }; -# define __m(x) (*(struct __large_struct __user *)(x)) - -/* We need to declare the __ex_table section before we can use it in .xdata. */ -asm (".section \"__ex_table\", \"a\"\n\t.previous"); - -# define __get_user_size(val, addr, n, err) \ -do { \ - register long __gu_r8 asm ("r8") = 0; \ - register long __gu_r9 asm ("r9"); \ - asm ("\n[1:]\tld"#n" %0=%2%P2\t// %0 and %1 get overwritten by exception handler\n" \ - "\t.xdata4 \"__ex_table\", 1b-., 1f-.+4\n" \ - "[1:]" \ - : "=r"(__gu_r9), "=r"(__gu_r8) : "m"(__m(addr)), "1"(__gu_r8)); \ - (err) = __gu_r8; \ - (val) = __gu_r9; \ -} while (0) - -/* - * The "__put_user_size()" macro tells gcc it reads from memory instead of writing it. This - * is because they do not write to any memory gcc knows about, so there are no aliasing - * issues. - */ -# define __put_user_size(val, addr, n, err) \ -do { \ - register long __pu_r8 asm ("r8") = 0; \ - asm volatile ("\n[1:]\tst"#n" %1=%r2%P1\t// %0 gets overwritten by exception handler\n" \ - "\t.xdata4 \"__ex_table\", 1b-., 1f-.\n" \ - "[1:]" \ - : "=r"(__pu_r8) : "m"(__m(addr)), "rO"(val), "0"(__pu_r8)); \ - (err) = __pu_r8; \ -} while (0) - -#else /* !ASM_SUPPORTED */ -# define RELOC_TYPE 2 /* ip-rel */ -# define __get_user_size(val, addr, n, err) \ -do { \ - __ld_user("__ex_table", (unsigned long) addr, n, RELOC_TYPE); \ - (err) = ia64_getreg(_IA64_REG_R8); \ - (val) = ia64_getreg(_IA64_REG_R9); \ -} while (0) -# define __put_user_size(val, addr, n, err) \ -do { \ - __st_user("__ex_table", (unsigned long) addr, n, RELOC_TYPE, (unsigned long) (val)); \ - (err) = ia64_getreg(_IA64_REG_R8); \ -} while (0) -#endif /* !ASM_SUPPORTED */ - -extern void __get_user_unknown (void); - -/* - * Evaluating arguments X, PTR, SIZE, and SEGMENT may involve subroutine-calls, which - * could clobber r8 and r9 (among others). Thus, be careful not to evaluate it while - * using r8/r9. - */ -#define __do_get_user(check, x, ptr, size, segment) \ -({ \ - const __typeof__(*(ptr)) __user *__gu_ptr = (ptr); \ - __typeof__ (size) __gu_size = (size); \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ - if (!check || __access_ok(__gu_ptr, size, segment)) \ - switch (__gu_size) { \ - case 1: __get_user_size(__gu_val, __gu_ptr, 1, __gu_err); break; \ - case 2: __get_user_size(__gu_val, __gu_ptr, 2, __gu_err); break; \ - case 4: __get_user_size(__gu_val, __gu_ptr, 4, __gu_err); break; \ - case 8: __get_user_size(__gu_val, __gu_ptr, 8, __gu_err); break; \ - default: __get_user_unknown(); break; \ - } \ - (x) = (__typeof__(*(__gu_ptr))) __gu_val; \ - __gu_err; \ -}) - -#define __get_user_nocheck(x, ptr, size) __do_get_user(0, x, ptr, size, KERNEL_DS) -#define __get_user_check(x, ptr, size, segment) __do_get_user(1, x, ptr, size, segment) - -extern void __put_user_unknown (void); - -/* - * Evaluating arguments X, PTR, SIZE, and SEGMENT may involve subroutine-calls, which - * could clobber r8 (among others). Thus, be careful not to evaluate them while using r8. - */ -#define __do_put_user(check, x, ptr, size, segment) \ -({ \ - __typeof__ (x) __pu_x = (x); \ - __typeof__ (*(ptr)) __user *__pu_ptr = (ptr); \ - __typeof__ (size) __pu_size = (size); \ - long __pu_err = -EFAULT; \ - \ - if (!check || __access_ok(__pu_ptr, __pu_size, segment)) \ - switch (__pu_size) { \ - case 1: __put_user_size(__pu_x, __pu_ptr, 1, __pu_err); break; \ - case 2: __put_user_size(__pu_x, __pu_ptr, 2, __pu_err); break; \ - case 4: __put_user_size(__pu_x, __pu_ptr, 4, __pu_err); break; \ - case 8: __put_user_size(__pu_x, __pu_ptr, 8, __pu_err); break; \ - default: __put_user_unknown(); break; \ - } \ - __pu_err; \ -}) - -#define __put_user_nocheck(x, ptr, size) __do_put_user(0, x, ptr, size, KERNEL_DS) -#define __put_user_check(x, ptr, size, segment) __do_put_user(1, x, ptr, size, segment) - -/* - * Complex access routines - */ -extern unsigned long __must_check __copy_user (void __user *to, const void __user *from, - unsigned long count); - -static inline unsigned long -__copy_to_user (void __user *to, const void *from, unsigned long count) -{ - return __copy_user(to, (__force void __user *) from, count); -} - -static inline unsigned long -__copy_from_user (void *to, const void __user *from, unsigned long count) -{ - return __copy_user((__force void __user *) to, from, count); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user -#define copy_to_user(to, from, n) \ -({ \ - void __user *__cu_to = (to); \ - const void *__cu_from = (from); \ - long __cu_len = (n); \ - \ - if (__access_ok(__cu_to, __cu_len, get_fs())) \ - __cu_len = __copy_user(__cu_to, (__force void __user *) __cu_from, __cu_len); \ - __cu_len; \ -}) - -#define copy_from_user(to, from, n) \ -({ \ - void *__cu_to = (to); \ - const void __user *__cu_from = (from); \ - long __cu_len = (n); \ - \ - __chk_user_ptr(__cu_from); \ - if (__access_ok(__cu_from, __cu_len, get_fs())) \ - __cu_len = __copy_user((__force void __user *) __cu_to, __cu_from, __cu_len); \ - __cu_len; \ -}) - -#define __copy_in_user(to, from, size) __copy_user((to), (from), (size)) - -static inline unsigned long -copy_in_user (void __user *to, const void __user *from, unsigned long n) -{ - if (likely(access_ok(VERIFY_READ, from, n) && access_ok(VERIFY_WRITE, to, n))) - n = __copy_user(to, from, n); - return n; -} - -extern unsigned long __do_clear_user (void __user *, unsigned long); - -#define __clear_user(to, n) __do_clear_user(to, n) - -#define clear_user(to, n) \ -({ \ - unsigned long __cu_len = (n); \ - if (__access_ok(to, __cu_len, get_fs())) \ - __cu_len = __do_clear_user(to, __cu_len); \ - __cu_len; \ -}) - - -/* - * Returns: -EFAULT if exception before terminator, N if the entire buffer filled, else - * strlen. - */ -extern long __must_check __strncpy_from_user (char *to, const char __user *from, long to_len); - -#define strncpy_from_user(to, from, n) \ -({ \ - const char __user * __sfu_from = (from); \ - long __sfu_ret = -EFAULT; \ - if (__access_ok(__sfu_from, 0, get_fs())) \ - __sfu_ret = __strncpy_from_user((to), __sfu_from, (n)); \ - __sfu_ret; \ -}) - -/* Returns: 0 if bad, string length+1 (memory size) of string if ok */ -extern unsigned long __strlen_user (const char __user *); - -#define strlen_user(str) \ -({ \ - const char __user *__su_str = (str); \ - unsigned long __su_ret = 0; \ - if (__access_ok(__su_str, 0, get_fs())) \ - __su_ret = __strlen_user(__su_str); \ - __su_ret; \ -}) - -/* - * Returns: 0 if exception before NUL or reaching the supplied limit - * (N), a value greater than N if the limit would be exceeded, else - * strlen. - */ -extern unsigned long __strnlen_user (const char __user *, long); - -#define strnlen_user(str, len) \ -({ \ - const char __user *__su_str = (str); \ - unsigned long __su_ret = 0; \ - if (__access_ok(__su_str, 0, get_fs())) \ - __su_ret = __strnlen_user(__su_str, len); \ - __su_ret; \ -}) - -/* Generic code can't deal with the location-relative format that we use for compactness. */ -#define ARCH_HAS_SORT_EXTABLE -#define ARCH_HAS_SEARCH_EXTABLE - -struct exception_table_entry { - int addr; /* location-relative address of insn this fixup is for */ - int cont; /* location-relative continuation addr.; if bit 2 is set, r9 is set to 0 */ -}; - -extern void ia64_handle_exception (struct pt_regs *regs, const struct exception_table_entry *e); -extern const struct exception_table_entry *search_exception_tables (unsigned long addr); - -static inline int -ia64_done_with_exception (struct pt_regs *regs) -{ - const struct exception_table_entry *e; - e = search_exception_tables(regs->cr_iip + ia64_psr(regs)->ri); - if (e) { - ia64_handle_exception(regs, e); - return 1; - } - return 0; -} - -#define ARCH_HAS_TRANSLATE_MEM_PTR 1 -static __inline__ char * -xlate_dev_mem_ptr (unsigned long p) -{ - struct page *page; - char * ptr; - - page = pfn_to_page(p >> PAGE_SHIFT); - if (PageUncached(page)) - ptr = (char *)p + __IA64_UNCACHED_OFFSET; - else - ptr = __va(p); - - return ptr; -} - -/* - * Convert a virtual cached kernel memory pointer to an uncached pointer - */ -static __inline__ char * -xlate_dev_kmem_ptr (char * p) -{ - struct page *page; - char * ptr; - - page = virt_to_page((unsigned long)p); - if (PageUncached(page)) - ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; - else - ptr = p; - - return ptr; -} - -#endif /* _ASM_IA64_UACCESS_H */ diff --git a/include/asm-ia64/ucontext.h b/include/asm-ia64/ucontext.h deleted file mode 100644 index bf573dc..0000000 --- a/include/asm-ia64/ucontext.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_IA64_UCONTEXT_H -#define _ASM_IA64_UCONTEXT_H - -struct ucontext { - struct sigcontext uc_mcontext; -}; - -#define uc_link uc_mcontext.sc_gr[0] /* wrong type; nobody cares */ -#define uc_sigmask uc_mcontext.sc_sigmask -#define uc_stack uc_mcontext.sc_stack - -#endif /* _ASM_IA64_UCONTEXT_H */ diff --git a/include/asm-ia64/unaligned.h b/include/asm-ia64/unaligned.h deleted file mode 100644 index 7bddc7f..0000000 --- a/include/asm-ia64/unaligned.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_IA64_UNALIGNED_H -#define _ASM_IA64_UNALIGNED_H - -#include -#include -#include - -#define get_unaligned __get_unaligned_le -#define put_unaligned __put_unaligned_le - -#endif /* _ASM_IA64_UNALIGNED_H */ diff --git a/include/asm-ia64/uncached.h b/include/asm-ia64/uncached.h deleted file mode 100644 index 13d7e65..0000000 --- a/include/asm-ia64/uncached.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * Copyright (C) 2001-2008 Silicon Graphics, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * Prototypes for the uncached page allocator - */ - -extern unsigned long uncached_alloc_page(int starting_nid, int n_pages); -extern void uncached_free_page(unsigned long uc_addr, int n_pages); diff --git a/include/asm-ia64/unistd.h b/include/asm-ia64/unistd.h deleted file mode 100644 index d535833..0000000 --- a/include/asm-ia64/unistd.h +++ /dev/null @@ -1,384 +0,0 @@ -#ifndef _ASM_IA64_UNISTD_H -#define _ASM_IA64_UNISTD_H - -/* - * IA-64 Linux syscall numbers and inline-functions. - * - * Copyright (C) 1998-2005 Hewlett-Packard Co - * David Mosberger-Tang - */ - -#include - -#define __BREAK_SYSCALL __IA64_BREAK_SYSCALL - -#define __NR_ni_syscall 1024 -#define __NR_exit 1025 -#define __NR_read 1026 -#define __NR_write 1027 -#define __NR_open 1028 -#define __NR_close 1029 -#define __NR_creat 1030 -#define __NR_link 1031 -#define __NR_unlink 1032 -#define __NR_execve 1033 -#define __NR_chdir 1034 -#define __NR_fchdir 1035 -#define __NR_utimes 1036 -#define __NR_mknod 1037 -#define __NR_chmod 1038 -#define __NR_chown 1039 -#define __NR_lseek 1040 -#define __NR_getpid 1041 -#define __NR_getppid 1042 -#define __NR_mount 1043 -#define __NR_umount 1044 -#define __NR_setuid 1045 -#define __NR_getuid 1046 -#define __NR_geteuid 1047 -#define __NR_ptrace 1048 -#define __NR_access 1049 -#define __NR_sync 1050 -#define __NR_fsync 1051 -#define __NR_fdatasync 1052 -#define __NR_kill 1053 -#define __NR_rename 1054 -#define __NR_mkdir 1055 -#define __NR_rmdir 1056 -#define __NR_dup 1057 -#define __NR_pipe 1058 -#define __NR_times 1059 -#define __NR_brk 1060 -#define __NR_setgid 1061 -#define __NR_getgid 1062 -#define __NR_getegid 1063 -#define __NR_acct 1064 -#define __NR_ioctl 1065 -#define __NR_fcntl 1066 -#define __NR_umask 1067 -#define __NR_chroot 1068 -#define __NR_ustat 1069 -#define __NR_dup2 1070 -#define __NR_setreuid 1071 -#define __NR_setregid 1072 -#define __NR_getresuid 1073 -#define __NR_setresuid 1074 -#define __NR_getresgid 1075 -#define __NR_setresgid 1076 -#define __NR_getgroups 1077 -#define __NR_setgroups 1078 -#define __NR_getpgid 1079 -#define __NR_setpgid 1080 -#define __NR_setsid 1081 -#define __NR_getsid 1082 -#define __NR_sethostname 1083 -#define __NR_setrlimit 1084 -#define __NR_getrlimit 1085 -#define __NR_getrusage 1086 -#define __NR_gettimeofday 1087 -#define __NR_settimeofday 1088 -#define __NR_select 1089 -#define __NR_poll 1090 -#define __NR_symlink 1091 -#define __NR_readlink 1092 -#define __NR_uselib 1093 -#define __NR_swapon 1094 -#define __NR_swapoff 1095 -#define __NR_reboot 1096 -#define __NR_truncate 1097 -#define __NR_ftruncate 1098 -#define __NR_fchmod 1099 -#define __NR_fchown 1100 -#define __NR_getpriority 1101 -#define __NR_setpriority 1102 -#define __NR_statfs 1103 -#define __NR_fstatfs 1104 -#define __NR_gettid 1105 -#define __NR_semget 1106 -#define __NR_semop 1107 -#define __NR_semctl 1108 -#define __NR_msgget 1109 -#define __NR_msgsnd 1110 -#define __NR_msgrcv 1111 -#define __NR_msgctl 1112 -#define __NR_shmget 1113 -#define __NR_shmat 1114 -#define __NR_shmdt 1115 -#define __NR_shmctl 1116 -/* also known as klogctl() in GNU libc: */ -#define __NR_syslog 1117 -#define __NR_setitimer 1118 -#define __NR_getitimer 1119 -/* 1120 was __NR_old_stat */ -/* 1121 was __NR_old_lstat */ -/* 1122 was __NR_old_fstat */ -#define __NR_vhangup 1123 -#define __NR_lchown 1124 -#define __NR_remap_file_pages 1125 -#define __NR_wait4 1126 -#define __NR_sysinfo 1127 -#define __NR_clone 1128 -#define __NR_setdomainname 1129 -#define __NR_uname 1130 -#define __NR_adjtimex 1131 -/* 1132 was __NR_create_module */ -#define __NR_init_module 1133 -#define __NR_delete_module 1134 -/* 1135 was __NR_get_kernel_syms */ -/* 1136 was __NR_query_module */ -#define __NR_quotactl 1137 -#define __NR_bdflush 1138 -#define __NR_sysfs 1139 -#define __NR_personality 1140 -#define __NR_afs_syscall 1141 -#define __NR_setfsuid 1142 -#define __NR_setfsgid 1143 -#define __NR_getdents 1144 -#define __NR_flock 1145 -#define __NR_readv 1146 -#define __NR_writev 1147 -#define __NR_pread64 1148 -#define __NR_pwrite64 1149 -#define __NR__sysctl 1150 -#define __NR_mmap 1151 -#define __NR_munmap 1152 -#define __NR_mlock 1153 -#define __NR_mlockall 1154 -#define __NR_mprotect 1155 -#define __NR_mremap 1156 -#define __NR_msync 1157 -#define __NR_munlock 1158 -#define __NR_munlockall 1159 -#define __NR_sched_getparam 1160 -#define __NR_sched_setparam 1161 -#define __NR_sched_getscheduler 1162 -#define __NR_sched_setscheduler 1163 -#define __NR_sched_yield 1164 -#define __NR_sched_get_priority_max 1165 -#define __NR_sched_get_priority_min 1166 -#define __NR_sched_rr_get_interval 1167 -#define __NR_nanosleep 1168 -#define __NR_nfsservctl 1169 -#define __NR_prctl 1170 -/* 1171 is reserved for backwards compatibility with old __NR_getpagesize */ -#define __NR_mmap2 1172 -#define __NR_pciconfig_read 1173 -#define __NR_pciconfig_write 1174 -#define __NR_perfmonctl 1175 -#define __NR_sigaltstack 1176 -#define __NR_rt_sigaction 1177 -#define __NR_rt_sigpending 1178 -#define __NR_rt_sigprocmask 1179 -#define __NR_rt_sigqueueinfo 1180 -#define __NR_rt_sigreturn 1181 -#define __NR_rt_sigsuspend 1182 -#define __NR_rt_sigtimedwait 1183 -#define __NR_getcwd 1184 -#define __NR_capget 1185 -#define __NR_capset 1186 -#define __NR_sendfile 1187 -#define __NR_getpmsg 1188 -#define __NR_putpmsg 1189 -#define __NR_socket 1190 -#define __NR_bind 1191 -#define __NR_connect 1192 -#define __NR_listen 1193 -#define __NR_accept 1194 -#define __NR_getsockname 1195 -#define __NR_getpeername 1196 -#define __NR_socketpair 1197 -#define __NR_send 1198 -#define __NR_sendto 1199 -#define __NR_recv 1200 -#define __NR_recvfrom 1201 -#define __NR_shutdown 1202 -#define __NR_setsockopt 1203 -#define __NR_getsockopt 1204 -#define __NR_sendmsg 1205 -#define __NR_recvmsg 1206 -#define __NR_pivot_root 1207 -#define __NR_mincore 1208 -#define __NR_madvise 1209 -#define __NR_stat 1210 -#define __NR_lstat 1211 -#define __NR_fstat 1212 -#define __NR_clone2 1213 -#define __NR_getdents64 1214 -#define __NR_getunwind 1215 -#define __NR_readahead 1216 -#define __NR_setxattr 1217 -#define __NR_lsetxattr 1218 -#define __NR_fsetxattr 1219 -#define __NR_getxattr 1220 -#define __NR_lgetxattr 1221 -#define __NR_fgetxattr 1222 -#define __NR_listxattr 1223 -#define __NR_llistxattr 1224 -#define __NR_flistxattr 1225 -#define __NR_removexattr 1226 -#define __NR_lremovexattr 1227 -#define __NR_fremovexattr 1228 -#define __NR_tkill 1229 -#define __NR_futex 1230 -#define __NR_sched_setaffinity 1231 -#define __NR_sched_getaffinity 1232 -#define __NR_set_tid_address 1233 -#define __NR_fadvise64 1234 -#define __NR_tgkill 1235 -#define __NR_exit_group 1236 -#define __NR_lookup_dcookie 1237 -#define __NR_io_setup 1238 -#define __NR_io_destroy 1239 -#define __NR_io_getevents 1240 -#define __NR_io_submit 1241 -#define __NR_io_cancel 1242 -#define __NR_epoll_create 1243 -#define __NR_epoll_ctl 1244 -#define __NR_epoll_wait 1245 -#define __NR_restart_syscall 1246 -#define __NR_semtimedop 1247 -#define __NR_timer_create 1248 -#define __NR_timer_settime 1249 -#define __NR_timer_gettime 1250 -#define __NR_timer_getoverrun 1251 -#define __NR_timer_delete 1252 -#define __NR_clock_settime 1253 -#define __NR_clock_gettime 1254 -#define __NR_clock_getres 1255 -#define __NR_clock_nanosleep 1256 -#define __NR_fstatfs64 1257 -#define __NR_statfs64 1258 -#define __NR_mbind 1259 -#define __NR_get_mempolicy 1260 -#define __NR_set_mempolicy 1261 -#define __NR_mq_open 1262 -#define __NR_mq_unlink 1263 -#define __NR_mq_timedsend 1264 -#define __NR_mq_timedreceive 1265 -#define __NR_mq_notify 1266 -#define __NR_mq_getsetattr 1267 -#define __NR_kexec_load 1268 -#define __NR_vserver 1269 -#define __NR_waitid 1270 -#define __NR_add_key 1271 -#define __NR_request_key 1272 -#define __NR_keyctl 1273 -#define __NR_ioprio_set 1274 -#define __NR_ioprio_get 1275 -#define __NR_move_pages 1276 -#define __NR_inotify_init 1277 -#define __NR_inotify_add_watch 1278 -#define __NR_inotify_rm_watch 1279 -#define __NR_migrate_pages 1280 -#define __NR_openat 1281 -#define __NR_mkdirat 1282 -#define __NR_mknodat 1283 -#define __NR_fchownat 1284 -#define __NR_futimesat 1285 -#define __NR_newfstatat 1286 -#define __NR_unlinkat 1287 -#define __NR_renameat 1288 -#define __NR_linkat 1289 -#define __NR_symlinkat 1290 -#define __NR_readlinkat 1291 -#define __NR_fchmodat 1292 -#define __NR_faccessat 1293 -#define __NR_pselect6 1294 -#define __NR_ppoll 1295 -#define __NR_unshare 1296 -#define __NR_splice 1297 -#define __NR_set_robust_list 1298 -#define __NR_get_robust_list 1299 -#define __NR_sync_file_range 1300 -#define __NR_tee 1301 -#define __NR_vmsplice 1302 -#define __NR_fallocate 1303 -#define __NR_getcpu 1304 -#define __NR_epoll_pwait 1305 -#define __NR_utimensat 1306 -#define __NR_signalfd 1307 -#define __NR_timerfd 1308 -#define __NR_eventfd 1309 -#define __NR_timerfd_create 1310 -#define __NR_timerfd_settime 1311 -#define __NR_timerfd_gettime 1312 -#define __NR_signalfd4 1313 -#define __NR_eventfd2 1314 -#define __NR_epoll_create1 1315 -#define __NR_dup3 1316 -#define __NR_pipe2 1317 -#define __NR_inotify_init1 1318 - -#ifdef __KERNEL__ - - -#define NR_syscalls 295 /* length of syscall table */ - -/* - * The following defines stop scripts/checksyscalls.sh from complaining about - * unimplemented system calls. Glibc provides for each of these by using - * more modern equivalent system calls. - */ -#define __IGNORE_fork /* clone() */ -#define __IGNORE_time /* gettimeofday() */ -#define __IGNORE_alarm /* setitimer(ITIMER_REAL, ... */ -#define __IGNORE_pause /* rt_sigprocmask(), rt_sigsuspend() */ -#define __IGNORE_utime /* utimes() */ -#define __IGNORE_getpgrp /* getpgid() */ -#define __IGNORE_vfork /* clone() */ - -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -#ifdef CONFIG_IA32_SUPPORT -# define __ARCH_WANT_SYS_FADVISE64 -# define __ARCH_WANT_SYS_GETPGRP -# define __ARCH_WANT_SYS_LLSEEK -# define __ARCH_WANT_SYS_NICE -# define __ARCH_WANT_SYS_OLD_GETRLIMIT -# define __ARCH_WANT_SYS_OLDUMOUNT -# define __ARCH_WANT_SYS_SIGPENDING -# define __ARCH_WANT_SYS_SIGPROCMASK -# define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND -# define __ARCH_WANT_COMPAT_SYS_TIME -#endif - -#if !defined(__ASSEMBLY__) && !defined(ASSEMBLER) - -#include -#include -#include - -extern long __ia64_syscall (long a0, long a1, long a2, long a3, long a4, long nr); - -asmlinkage unsigned long sys_mmap( - unsigned long addr, unsigned long len, - int prot, int flags, - int fd, long off); -asmlinkage unsigned long sys_mmap2( - unsigned long addr, unsigned long len, - int prot, int flags, - int fd, long pgoff); -struct pt_regs; -struct sigaction; -long sys_execve(char __user *filename, char __user * __user *argv, - char __user * __user *envp, struct pt_regs *regs); -asmlinkage long sys_pipe(void); -asmlinkage long sys_rt_sigaction(int sig, - const struct sigaction __user *act, - struct sigaction __user *oact, - size_t sigsetsize); - -/* - * "Conditional" syscalls - * - * Note, this macro can only be used in the file which defines sys_ni_syscall, i.e., in - * kernel/sys_ni.c. This version causes warnings because the declaration isn't a - * proper prototype, but we can't use __typeof__ either, because not all cond_syscall() - * declarations have prototypes at the moment. - */ -#define cond_syscall(x) asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall"))) - -#endif /* !__ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_IA64_UNISTD_H */ diff --git a/include/asm-ia64/unwind.h b/include/asm-ia64/unwind.h deleted file mode 100644 index 1af3875..0000000 --- a/include/asm-ia64/unwind.h +++ /dev/null @@ -1,233 +0,0 @@ -#ifndef _ASM_IA64_UNWIND_H -#define _ASM_IA64_UNWIND_H - -/* - * Copyright (C) 1999-2000, 2003 Hewlett-Packard Co - * David Mosberger-Tang - * - * A simple API for unwinding kernel stacks. This is used for - * debugging and error reporting purposes. The kernel doesn't need - * full-blown stack unwinding with all the bells and whitles, so there - * is not much point in implementing the full IA-64 unwind API (though - * it would of course be possible to implement the kernel API on top - * of it). - */ - -struct task_struct; /* forward declaration */ -struct switch_stack; /* forward declaration */ - -enum unw_application_register { - UNW_AR_BSP, - UNW_AR_BSPSTORE, - UNW_AR_PFS, - UNW_AR_RNAT, - UNW_AR_UNAT, - UNW_AR_LC, - UNW_AR_EC, - UNW_AR_FPSR, - UNW_AR_RSC, - UNW_AR_CCV, - UNW_AR_CSD, - UNW_AR_SSD -}; - -/* - * The following declarations are private to the unwind - * implementation: - */ - -struct unw_stack { - unsigned long limit; - unsigned long top; -}; - -#define UNW_FLAG_INTERRUPT_FRAME (1UL << 0) - -/* - * No user of this module should every access this structure directly - * as it is subject to change. It is declared here solely so we can - * use automatic variables. - */ -struct unw_frame_info { - struct unw_stack regstk; - struct unw_stack memstk; - unsigned int flags; - short hint; - short prev_script; - - /* current frame info: */ - unsigned long bsp; /* backing store pointer value */ - unsigned long sp; /* stack pointer value */ - unsigned long psp; /* previous sp value */ - unsigned long ip; /* instruction pointer value */ - unsigned long pr; /* current predicate values */ - unsigned long *cfm_loc; /* cfm save location (or NULL) */ - unsigned long pt; /* struct pt_regs location */ - - struct task_struct *task; - struct switch_stack *sw; - - /* preserved state: */ - unsigned long *bsp_loc; /* previous bsp save location */ - unsigned long *bspstore_loc; - unsigned long *pfs_loc; - unsigned long *rnat_loc; - unsigned long *rp_loc; - unsigned long *pri_unat_loc; - unsigned long *unat_loc; - unsigned long *pr_loc; - unsigned long *lc_loc; - unsigned long *fpsr_loc; - struct unw_ireg { - unsigned long *loc; - struct unw_ireg_nat { - unsigned long type : 3; /* enum unw_nat_type */ - signed long off : 61; /* NaT word is at loc+nat.off */ - } nat; - } r4, r5, r6, r7; - unsigned long *b1_loc, *b2_loc, *b3_loc, *b4_loc, *b5_loc; - struct ia64_fpreg *f2_loc, *f3_loc, *f4_loc, *f5_loc, *fr_loc[16]; -}; - -/* - * The official API follows below: - */ - -struct unw_table_entry { - u64 start_offset; - u64 end_offset; - u64 info_offset; -}; - -/* - * Initialize unwind support. - */ -extern void unw_init (void); - -extern void *unw_add_unwind_table (const char *name, unsigned long segment_base, unsigned long gp, - const void *table_start, const void *table_end); - -extern void unw_remove_unwind_table (void *handle); - -/* - * Prepare to unwind blocked task t. - */ -extern void unw_init_from_blocked_task (struct unw_frame_info *info, struct task_struct *t); - -extern void unw_init_frame_info (struct unw_frame_info *info, struct task_struct *t, - struct switch_stack *sw); - -/* - * Prepare to unwind the currently running thread. - */ -extern void unw_init_running (void (*callback)(struct unw_frame_info *info, void *arg), void *arg); - -/* - * Unwind to previous to frame. Returns 0 if successful, negative - * number in case of an error. - */ -extern int unw_unwind (struct unw_frame_info *info); - -/* - * Unwind until the return pointer is in user-land (or until an error - * occurs). Returns 0 if successful, negative number in case of - * error. - */ -extern int unw_unwind_to_user (struct unw_frame_info *info); - -#define unw_is_intr_frame(info) (((info)->flags & UNW_FLAG_INTERRUPT_FRAME) != 0) - -static inline int -unw_get_ip (struct unw_frame_info *info, unsigned long *valp) -{ - *valp = (info)->ip; - return 0; -} - -static inline int -unw_get_sp (struct unw_frame_info *info, unsigned long *valp) -{ - *valp = (info)->sp; - return 0; -} - -static inline int -unw_get_psp (struct unw_frame_info *info, unsigned long *valp) -{ - *valp = (info)->psp; - return 0; -} - -static inline int -unw_get_bsp (struct unw_frame_info *info, unsigned long *valp) -{ - *valp = (info)->bsp; - return 0; -} - -static inline int -unw_get_cfm (struct unw_frame_info *info, unsigned long *valp) -{ - *valp = *(info)->cfm_loc; - return 0; -} - -static inline int -unw_set_cfm (struct unw_frame_info *info, unsigned long val) -{ - *(info)->cfm_loc = val; - return 0; -} - -static inline int -unw_get_rp (struct unw_frame_info *info, unsigned long *val) -{ - if (!info->rp_loc) - return -1; - *val = *info->rp_loc; - return 0; -} - -extern int unw_access_gr (struct unw_frame_info *, int, unsigned long *, char *, int); -extern int unw_access_br (struct unw_frame_info *, int, unsigned long *, int); -extern int unw_access_fr (struct unw_frame_info *, int, struct ia64_fpreg *, int); -extern int unw_access_ar (struct unw_frame_info *, int, unsigned long *, int); -extern int unw_access_pr (struct unw_frame_info *, unsigned long *, int); - -static inline int -unw_set_gr (struct unw_frame_info *i, int n, unsigned long v, char nat) -{ - return unw_access_gr(i, n, &v, &nat, 1); -} - -static inline int -unw_set_br (struct unw_frame_info *i, int n, unsigned long v) -{ - return unw_access_br(i, n, &v, 1); -} - -static inline int -unw_set_fr (struct unw_frame_info *i, int n, struct ia64_fpreg v) -{ - return unw_access_fr(i, n, &v, 1); -} - -static inline int -unw_set_ar (struct unw_frame_info *i, int n, unsigned long v) -{ - return unw_access_ar(i, n, &v, 1); -} - -static inline int -unw_set_pr (struct unw_frame_info *i, unsigned long v) -{ - return unw_access_pr(i, &v, 1); -} - -#define unw_get_gr(i,n,v,nat) unw_access_gr(i,n,v,nat,0) -#define unw_get_br(i,n,v) unw_access_br(i,n,v,0) -#define unw_get_fr(i,n,v) unw_access_fr(i,n,v,0) -#define unw_get_ar(i,n,v) unw_access_ar(i,n,v,0) -#define unw_get_pr(i,v) unw_access_pr(i,v,0) - -#endif /* _ASM_UNWIND_H */ diff --git a/include/asm-ia64/user.h b/include/asm-ia64/user.h deleted file mode 100644 index 8b98211..0000000 --- a/include/asm-ia64/user.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef _ASM_IA64_USER_H -#define _ASM_IA64_USER_H - -/* - * Core file format: The core file is written in such a way that gdb - * can understand it and provide useful information to the user (under - * linux we use the `trad-core' bfd). The file contents are as - * follows: - * - * upage: 1 page consisting of a user struct that tells gdb - * what is present in the file. Directly after this is a - * copy of the task_struct, which is currently not used by gdb, - * but it may come in handy at some point. All of the registers - * are stored as part of the upage. The upage should always be - * only one page long. - * data: The data segment follows next. We use current->end_text to - * current->brk to pick up all of the user variables, plus any memory - * that may have been sbrk'ed. No attempt is made to determine if a - * page is demand-zero or if a page is totally unused, we just cover - * the entire range. All of the addresses are rounded in such a way - * that an integral number of pages is written. - * stack: We need the stack information in order to get a meaningful - * backtrace. We need to write the data from usp to - * current->start_stack, so we round each of these in order to be able - * to write an integer number of pages. - * - * Modified 1998, 1999, 2001 - * David Mosberger-Tang , Hewlett-Packard Co - */ - -#include -#include - -#include - -#define EF_SIZE 3072 /* XXX fix me */ - -struct user { - unsigned long regs[EF_SIZE/8+32]; /* integer and fp regs */ - size_t u_tsize; /* text size (pages) */ - size_t u_dsize; /* data size (pages) */ - size_t u_ssize; /* stack size (pages) */ - unsigned long start_code; /* text starting address */ - unsigned long start_data; /* data starting address */ - unsigned long start_stack; /* stack starting address */ - long int signal; /* signal causing core dump */ - unsigned long u_ar0; /* help gdb find registers */ - unsigned long magic; /* identifies a core file */ - char u_comm[32]; /* user command name */ -}; - -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_DATA_START_ADDR (u.start_data) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) - -#endif /* _ASM_IA64_USER_H */ diff --git a/include/asm-ia64/ustack.h b/include/asm-ia64/ustack.h deleted file mode 100644 index 504167c..0000000 --- a/include/asm-ia64/ustack.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_IA64_USTACK_H -#define _ASM_IA64_USTACK_H - -/* - * Constants for the user stack size - */ - -#ifdef __KERNEL__ -#include - -/* The absolute hard limit for stack size is 1/2 of the mappable space in the region */ -#define MAX_USER_STACK_SIZE (RGN_MAP_LIMIT/2) -#define STACK_TOP (0x6000000000000000UL + RGN_MAP_LIMIT) -#define STACK_TOP_MAX STACK_TOP -#endif - -/* Make a default stack size of 2GiB */ -#define DEFAULT_USER_STACK_SIZE (1UL << 31) - -#endif /* _ASM_IA64_USTACK_H */ diff --git a/include/asm-ia64/uv/uv_hub.h b/include/asm-ia64/uv/uv_hub.h deleted file mode 100644 index f607018..0000000 --- a/include/asm-ia64/uv/uv_hub.h +++ /dev/null @@ -1,309 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI UV architectural definitions - * - * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef __ASM_IA64_UV_HUB_H__ -#define __ASM_IA64_UV_HUB_H__ - -#include -#include -#include -#include - - -/* - * Addressing Terminology - * - * M - The low M bits of a physical address represent the offset - * into the blade local memory. RAM memory on a blade is physically - * contiguous (although various IO spaces may punch holes in - * it).. - * - * N - Number of bits in the node portion of a socket physical - * address. - * - * NASID - network ID of a router, Mbrick or Cbrick. Nasid values of - * routers always have low bit of 1, C/MBricks have low bit - * equal to 0. Most addressing macros that target UV hub chips - * right shift the NASID by 1 to exclude the always-zero bit. - * NASIDs contain up to 15 bits. - * - * GNODE - NASID right shifted by 1 bit. Most mmrs contain gnodes instead - * of nasids. - * - * PNODE - the low N bits of the GNODE. The PNODE is the most useful variant - * of the nasid for socket usage. - * - * - * NumaLink Global Physical Address Format: - * +--------------------------------+---------------------+ - * |00..000| GNODE | NodeOffset | - * +--------------------------------+---------------------+ - * |<-------53 - M bits --->|<--------M bits -----> - * - * M - number of node offset bits (35 .. 40) - * - * - * Memory/UV-HUB Processor Socket Address Format: - * +----------------+---------------+---------------------+ - * |00..000000000000| PNODE | NodeOffset | - * +----------------+---------------+---------------------+ - * <--- N bits --->|<--------M bits -----> - * - * M - number of node offset bits (35 .. 40) - * N - number of PNODE bits (0 .. 10) - * - * Note: M + N cannot currently exceed 44 (x86_64) or 46 (IA64). - * The actual values are configuration dependent and are set at - * boot time. M & N values are set by the hardware/BIOS at boot. - */ - - -/* - * Maximum number of bricks in all partitions and in all coherency domains. - * This is the total number of bricks accessible in the numalink fabric. It - * includes all C & M bricks. Routers are NOT included. - * - * This value is also the value of the maximum number of non-router NASIDs - * in the numalink fabric. - * - * NOTE: a brick may contain 1 or 2 OS nodes. Don't get these confused. - */ -#define UV_MAX_NUMALINK_BLADES 16384 - -/* - * Maximum number of C/Mbricks within a software SSI (hardware may support - * more). - */ -#define UV_MAX_SSI_BLADES 1 - -/* - * The largest possible NASID of a C or M brick (+ 2) - */ -#define UV_MAX_NASID_VALUE (UV_MAX_NUMALINK_NODES * 2) - -/* - * The following defines attributes of the HUB chip. These attributes are - * frequently referenced and are kept in the per-cpu data areas of each cpu. - * They are kept together in a struct to minimize cache misses. - */ -struct uv_hub_info_s { - unsigned long global_mmr_base; - unsigned long gpa_mask; - unsigned long gnode_upper; - unsigned long lowmem_remap_top; - unsigned long lowmem_remap_base; - unsigned short pnode; - unsigned short pnode_mask; - unsigned short coherency_domain_number; - unsigned short numa_blade_id; - unsigned char blade_processor_id; - unsigned char m_val; - unsigned char n_val; -}; -DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); -#define uv_hub_info (&__get_cpu_var(__uv_hub_info)) -#define uv_cpu_hub_info(cpu) (&per_cpu(__uv_hub_info, cpu)) - -/* - * Local & Global MMR space macros. - * Note: macros are intended to be used ONLY by inline functions - * in this file - not by other kernel code. - * n - NASID (full 15-bit global nasid) - * g - GNODE (full 15-bit global nasid, right shifted 1) - * p - PNODE (local part of nsids, right shifted 1) - */ -#define UV_NASID_TO_PNODE(n) (((n) >> 1) & uv_hub_info->pnode_mask) -#define UV_PNODE_TO_NASID(p) (((p) << 1) | uv_hub_info->gnode_upper) - -#define UV_LOCAL_MMR_BASE 0xf4000000UL -#define UV_GLOBAL_MMR32_BASE 0xf8000000UL -#define UV_GLOBAL_MMR64_BASE (uv_hub_info->global_mmr_base) - -#define UV_GLOBAL_MMR32_PNODE_SHIFT 15 -#define UV_GLOBAL_MMR64_PNODE_SHIFT 26 - -#define UV_GLOBAL_MMR32_PNODE_BITS(p) ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT)) - -#define UV_GLOBAL_MMR64_PNODE_BITS(p) \ - ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT) - -/* - * Macros for converting between kernel virtual addresses, socket local physical - * addresses, and UV global physical addresses. - * Note: use the standard __pa() & __va() macros for converting - * between socket virtual and socket physical addresses. - */ - -/* socket phys RAM --> UV global physical address */ -static inline unsigned long uv_soc_phys_ram_to_gpa(unsigned long paddr) -{ - if (paddr < uv_hub_info->lowmem_remap_top) - paddr += uv_hub_info->lowmem_remap_base; - return paddr | uv_hub_info->gnode_upper; -} - - -/* socket virtual --> UV global physical address */ -static inline unsigned long uv_gpa(void *v) -{ - return __pa(v) | uv_hub_info->gnode_upper; -} - -/* socket virtual --> UV global physical address */ -static inline void *uv_vgpa(void *v) -{ - return (void *)uv_gpa(v); -} - -/* UV global physical address --> socket virtual */ -static inline void *uv_va(unsigned long gpa) -{ - return __va(gpa & uv_hub_info->gpa_mask); -} - -/* pnode, offset --> socket virtual */ -static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset) -{ - return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset); -} - - -/* - * Access global MMRs using the low memory MMR32 space. This region supports - * faster MMR access but not all MMRs are accessible in this space. - */ -static inline unsigned long *uv_global_mmr32_address(int pnode, - unsigned long offset) -{ - return __va(UV_GLOBAL_MMR32_BASE | - UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset); -} - -static inline void uv_write_global_mmr32(int pnode, unsigned long offset, - unsigned long val) -{ - *uv_global_mmr32_address(pnode, offset) = val; -} - -static inline unsigned long uv_read_global_mmr32(int pnode, - unsigned long offset) -{ - return *uv_global_mmr32_address(pnode, offset); -} - -/* - * Access Global MMR space using the MMR space located at the top of physical - * memory. - */ -static inline unsigned long *uv_global_mmr64_address(int pnode, - unsigned long offset) -{ - return __va(UV_GLOBAL_MMR64_BASE | - UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); -} - -static inline void uv_write_global_mmr64(int pnode, unsigned long offset, - unsigned long val) -{ - *uv_global_mmr64_address(pnode, offset) = val; -} - -static inline unsigned long uv_read_global_mmr64(int pnode, - unsigned long offset) -{ - return *uv_global_mmr64_address(pnode, offset); -} - -/* - * Access hub local MMRs. Faster than using global space but only local MMRs - * are accessible. - */ -static inline unsigned long *uv_local_mmr_address(unsigned long offset) -{ - return __va(UV_LOCAL_MMR_BASE | offset); -} - -static inline unsigned long uv_read_local_mmr(unsigned long offset) -{ - return *uv_local_mmr_address(offset); -} - -static inline void uv_write_local_mmr(unsigned long offset, unsigned long val) -{ - *uv_local_mmr_address(offset) = val; -} - -/* - * Structures and definitions for converting between cpu, node, pnode, and blade - * numbers. - */ - -/* Blade-local cpu number of current cpu. Numbered 0 .. <# cpus on the blade> */ -static inline int uv_blade_processor_id(void) -{ - return smp_processor_id(); -} - -/* Blade number of current cpu. Numnbered 0 .. <#blades -1> */ -static inline int uv_numa_blade_id(void) -{ - return 0; -} - -/* Convert a cpu number to the the UV blade number */ -static inline int uv_cpu_to_blade_id(int cpu) -{ - return 0; -} - -/* Convert linux node number to the UV blade number */ -static inline int uv_node_to_blade_id(int nid) -{ - return 0; -} - -/* Convert a blade id to the PNODE of the blade */ -static inline int uv_blade_to_pnode(int bid) -{ - return 0; -} - -/* Determine the number of possible cpus on a blade */ -static inline int uv_blade_nr_possible_cpus(int bid) -{ - return num_possible_cpus(); -} - -/* Determine the number of online cpus on a blade */ -static inline int uv_blade_nr_online_cpus(int bid) -{ - return num_online_cpus(); -} - -/* Convert a cpu id to the PNODE of the blade containing the cpu */ -static inline int uv_cpu_to_pnode(int cpu) -{ - return 0; -} - -/* Convert a linux node number to the PNODE of the blade */ -static inline int uv_node_to_pnode(int nid) -{ - return 0; -} - -/* Maximum possible number of blades */ -static inline int uv_num_possible_blades(void) -{ - return 1; -} - -#endif /* __ASM_IA64_UV_HUB__ */ - diff --git a/include/asm-ia64/uv/uv_mmrs.h b/include/asm-ia64/uv/uv_mmrs.h deleted file mode 100644 index c149ef0..0000000 --- a/include/asm-ia64/uv/uv_mmrs.h +++ /dev/null @@ -1,673 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * SGI UV MMR definitions - * - * Copyright (C) 2007-2008 Silicon Graphics, Inc. All rights reserved. - */ - -#ifndef __ASM_IA64_UV_MMRS__ -#define __ASM_IA64_UV_MMRS__ - -#define UV_MMR_ENABLE (1UL << 63) - -/* ========================================================================= */ -/* UVH_BAU_DATA_CONFIG */ -/* ========================================================================= */ -#define UVH_BAU_DATA_CONFIG 0x61680UL -#define UVH_BAU_DATA_CONFIG_32 0x0438 - -#define UVH_BAU_DATA_CONFIG_VECTOR_SHFT 0 -#define UVH_BAU_DATA_CONFIG_VECTOR_MASK 0x00000000000000ffUL -#define UVH_BAU_DATA_CONFIG_DM_SHFT 8 -#define UVH_BAU_DATA_CONFIG_DM_MASK 0x0000000000000700UL -#define UVH_BAU_DATA_CONFIG_DESTMODE_SHFT 11 -#define UVH_BAU_DATA_CONFIG_DESTMODE_MASK 0x0000000000000800UL -#define UVH_BAU_DATA_CONFIG_STATUS_SHFT 12 -#define UVH_BAU_DATA_CONFIG_STATUS_MASK 0x0000000000001000UL -#define UVH_BAU_DATA_CONFIG_P_SHFT 13 -#define UVH_BAU_DATA_CONFIG_P_MASK 0x0000000000002000UL -#define UVH_BAU_DATA_CONFIG_T_SHFT 15 -#define UVH_BAU_DATA_CONFIG_T_MASK 0x0000000000008000UL -#define UVH_BAU_DATA_CONFIG_M_SHFT 16 -#define UVH_BAU_DATA_CONFIG_M_MASK 0x0000000000010000UL -#define UVH_BAU_DATA_CONFIG_APIC_ID_SHFT 32 -#define UVH_BAU_DATA_CONFIG_APIC_ID_MASK 0xffffffff00000000UL - -union uvh_bau_data_config_u { - unsigned long v; - struct uvh_bau_data_config_s { - unsigned long vector_ : 8; /* RW */ - unsigned long dm : 3; /* RW */ - unsigned long destmode : 1; /* RW */ - unsigned long status : 1; /* RO */ - unsigned long p : 1; /* RO */ - unsigned long rsvd_14 : 1; /* */ - unsigned long t : 1; /* RO */ - unsigned long m : 1; /* RW */ - unsigned long rsvd_17_31: 15; /* */ - unsigned long apic_id : 32; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_EVENT_OCCURRED0 */ -/* ========================================================================= */ -#define UVH_EVENT_OCCURRED0 0x70000UL -#define UVH_EVENT_OCCURRED0_32 0x005e8 - -#define UVH_EVENT_OCCURRED0_LB_HCERR_SHFT 0 -#define UVH_EVENT_OCCURRED0_LB_HCERR_MASK 0x0000000000000001UL -#define UVH_EVENT_OCCURRED0_GR0_HCERR_SHFT 1 -#define UVH_EVENT_OCCURRED0_GR0_HCERR_MASK 0x0000000000000002UL -#define UVH_EVENT_OCCURRED0_GR1_HCERR_SHFT 2 -#define UVH_EVENT_OCCURRED0_GR1_HCERR_MASK 0x0000000000000004UL -#define UVH_EVENT_OCCURRED0_LH_HCERR_SHFT 3 -#define UVH_EVENT_OCCURRED0_LH_HCERR_MASK 0x0000000000000008UL -#define UVH_EVENT_OCCURRED0_RH_HCERR_SHFT 4 -#define UVH_EVENT_OCCURRED0_RH_HCERR_MASK 0x0000000000000010UL -#define UVH_EVENT_OCCURRED0_XN_HCERR_SHFT 5 -#define UVH_EVENT_OCCURRED0_XN_HCERR_MASK 0x0000000000000020UL -#define UVH_EVENT_OCCURRED0_SI_HCERR_SHFT 6 -#define UVH_EVENT_OCCURRED0_SI_HCERR_MASK 0x0000000000000040UL -#define UVH_EVENT_OCCURRED0_LB_AOERR0_SHFT 7 -#define UVH_EVENT_OCCURRED0_LB_AOERR0_MASK 0x0000000000000080UL -#define UVH_EVENT_OCCURRED0_GR0_AOERR0_SHFT 8 -#define UVH_EVENT_OCCURRED0_GR0_AOERR0_MASK 0x0000000000000100UL -#define UVH_EVENT_OCCURRED0_GR1_AOERR0_SHFT 9 -#define UVH_EVENT_OCCURRED0_GR1_AOERR0_MASK 0x0000000000000200UL -#define UVH_EVENT_OCCURRED0_LH_AOERR0_SHFT 10 -#define UVH_EVENT_OCCURRED0_LH_AOERR0_MASK 0x0000000000000400UL -#define UVH_EVENT_OCCURRED0_RH_AOERR0_SHFT 11 -#define UVH_EVENT_OCCURRED0_RH_AOERR0_MASK 0x0000000000000800UL -#define UVH_EVENT_OCCURRED0_XN_AOERR0_SHFT 12 -#define UVH_EVENT_OCCURRED0_XN_AOERR0_MASK 0x0000000000001000UL -#define UVH_EVENT_OCCURRED0_SI_AOERR0_SHFT 13 -#define UVH_EVENT_OCCURRED0_SI_AOERR0_MASK 0x0000000000002000UL -#define UVH_EVENT_OCCURRED0_LB_AOERR1_SHFT 14 -#define UVH_EVENT_OCCURRED0_LB_AOERR1_MASK 0x0000000000004000UL -#define UVH_EVENT_OCCURRED0_GR0_AOERR1_SHFT 15 -#define UVH_EVENT_OCCURRED0_GR0_AOERR1_MASK 0x0000000000008000UL -#define UVH_EVENT_OCCURRED0_GR1_AOERR1_SHFT 16 -#define UVH_EVENT_OCCURRED0_GR1_AOERR1_MASK 0x0000000000010000UL -#define UVH_EVENT_OCCURRED0_LH_AOERR1_SHFT 17 -#define UVH_EVENT_OCCURRED0_LH_AOERR1_MASK 0x0000000000020000UL -#define UVH_EVENT_OCCURRED0_RH_AOERR1_SHFT 18 -#define UVH_EVENT_OCCURRED0_RH_AOERR1_MASK 0x0000000000040000UL -#define UVH_EVENT_OCCURRED0_XN_AOERR1_SHFT 19 -#define UVH_EVENT_OCCURRED0_XN_AOERR1_MASK 0x0000000000080000UL -#define UVH_EVENT_OCCURRED0_SI_AOERR1_SHFT 20 -#define UVH_EVENT_OCCURRED0_SI_AOERR1_MASK 0x0000000000100000UL -#define UVH_EVENT_OCCURRED0_RH_VPI_INT_SHFT 21 -#define UVH_EVENT_OCCURRED0_RH_VPI_INT_MASK 0x0000000000200000UL -#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_SHFT 22 -#define UVH_EVENT_OCCURRED0_SYSTEM_SHUTDOWN_INT_MASK 0x0000000000400000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_SHFT 23 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_0_MASK 0x0000000000800000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_SHFT 24 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_1_MASK 0x0000000001000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_SHFT 25 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_2_MASK 0x0000000002000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_SHFT 26 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_3_MASK 0x0000000004000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_SHFT 27 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_4_MASK 0x0000000008000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_SHFT 28 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_5_MASK 0x0000000010000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_SHFT 29 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_6_MASK 0x0000000020000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_SHFT 30 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_7_MASK 0x0000000040000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_SHFT 31 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_8_MASK 0x0000000080000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_SHFT 32 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_9_MASK 0x0000000100000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_SHFT 33 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_10_MASK 0x0000000200000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_SHFT 34 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_11_MASK 0x0000000400000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_SHFT 35 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_12_MASK 0x0000000800000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_SHFT 36 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_13_MASK 0x0000001000000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_SHFT 37 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_14_MASK 0x0000002000000000UL -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_SHFT 38 -#define UVH_EVENT_OCCURRED0_LB_IRQ_INT_15_MASK 0x0000004000000000UL -#define UVH_EVENT_OCCURRED0_L1_NMI_INT_SHFT 39 -#define UVH_EVENT_OCCURRED0_L1_NMI_INT_MASK 0x0000008000000000UL -#define UVH_EVENT_OCCURRED0_STOP_CLOCK_SHFT 40 -#define UVH_EVENT_OCCURRED0_STOP_CLOCK_MASK 0x0000010000000000UL -#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_SHFT 41 -#define UVH_EVENT_OCCURRED0_ASIC_TO_L1_MASK 0x0000020000000000UL -#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_SHFT 42 -#define UVH_EVENT_OCCURRED0_L1_TO_ASIC_MASK 0x0000040000000000UL -#define UVH_EVENT_OCCURRED0_LTC_INT_SHFT 43 -#define UVH_EVENT_OCCURRED0_LTC_INT_MASK 0x0000080000000000UL -#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_SHFT 44 -#define UVH_EVENT_OCCURRED0_LA_SEQ_TRIGGER_MASK 0x0000100000000000UL -#define UVH_EVENT_OCCURRED0_IPI_INT_SHFT 45 -#define UVH_EVENT_OCCURRED0_IPI_INT_MASK 0x0000200000000000UL -#define UVH_EVENT_OCCURRED0_EXTIO_INT0_SHFT 46 -#define UVH_EVENT_OCCURRED0_EXTIO_INT0_MASK 0x0000400000000000UL -#define UVH_EVENT_OCCURRED0_EXTIO_INT1_SHFT 47 -#define UVH_EVENT_OCCURRED0_EXTIO_INT1_MASK 0x0000800000000000UL -#define UVH_EVENT_OCCURRED0_EXTIO_INT2_SHFT 48 -#define UVH_EVENT_OCCURRED0_EXTIO_INT2_MASK 0x0001000000000000UL -#define UVH_EVENT_OCCURRED0_EXTIO_INT3_SHFT 49 -#define UVH_EVENT_OCCURRED0_EXTIO_INT3_MASK 0x0002000000000000UL -#define UVH_EVENT_OCCURRED0_PROFILE_INT_SHFT 50 -#define UVH_EVENT_OCCURRED0_PROFILE_INT_MASK 0x0004000000000000UL -#define UVH_EVENT_OCCURRED0_RTC0_SHFT 51 -#define UVH_EVENT_OCCURRED0_RTC0_MASK 0x0008000000000000UL -#define UVH_EVENT_OCCURRED0_RTC1_SHFT 52 -#define UVH_EVENT_OCCURRED0_RTC1_MASK 0x0010000000000000UL -#define UVH_EVENT_OCCURRED0_RTC2_SHFT 53 -#define UVH_EVENT_OCCURRED0_RTC2_MASK 0x0020000000000000UL -#define UVH_EVENT_OCCURRED0_RTC3_SHFT 54 -#define UVH_EVENT_OCCURRED0_RTC3_MASK 0x0040000000000000UL -#define UVH_EVENT_OCCURRED0_BAU_DATA_SHFT 55 -#define UVH_EVENT_OCCURRED0_BAU_DATA_MASK 0x0080000000000000UL -#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_SHFT 56 -#define UVH_EVENT_OCCURRED0_POWER_MANAGEMENT_REQ_MASK 0x0100000000000000UL -union uvh_event_occurred0_u { - unsigned long v; - struct uvh_event_occurred0_s { - unsigned long lb_hcerr : 1; /* RW, W1C */ - unsigned long gr0_hcerr : 1; /* RW, W1C */ - unsigned long gr1_hcerr : 1; /* RW, W1C */ - unsigned long lh_hcerr : 1; /* RW, W1C */ - unsigned long rh_hcerr : 1; /* RW, W1C */ - unsigned long xn_hcerr : 1; /* RW, W1C */ - unsigned long si_hcerr : 1; /* RW, W1C */ - unsigned long lb_aoerr0 : 1; /* RW, W1C */ - unsigned long gr0_aoerr0 : 1; /* RW, W1C */ - unsigned long gr1_aoerr0 : 1; /* RW, W1C */ - unsigned long lh_aoerr0 : 1; /* RW, W1C */ - unsigned long rh_aoerr0 : 1; /* RW, W1C */ - unsigned long xn_aoerr0 : 1; /* RW, W1C */ - unsigned long si_aoerr0 : 1; /* RW, W1C */ - unsigned long lb_aoerr1 : 1; /* RW, W1C */ - unsigned long gr0_aoerr1 : 1; /* RW, W1C */ - unsigned long gr1_aoerr1 : 1; /* RW, W1C */ - unsigned long lh_aoerr1 : 1; /* RW, W1C */ - unsigned long rh_aoerr1 : 1; /* RW, W1C */ - unsigned long xn_aoerr1 : 1; /* RW, W1C */ - unsigned long si_aoerr1 : 1; /* RW, W1C */ - unsigned long rh_vpi_int : 1; /* RW, W1C */ - unsigned long system_shutdown_int : 1; /* RW, W1C */ - unsigned long lb_irq_int_0 : 1; /* RW, W1C */ - unsigned long lb_irq_int_1 : 1; /* RW, W1C */ - unsigned long lb_irq_int_2 : 1; /* RW, W1C */ - unsigned long lb_irq_int_3 : 1; /* RW, W1C */ - unsigned long lb_irq_int_4 : 1; /* RW, W1C */ - unsigned long lb_irq_int_5 : 1; /* RW, W1C */ - unsigned long lb_irq_int_6 : 1; /* RW, W1C */ - unsigned long lb_irq_int_7 : 1; /* RW, W1C */ - unsigned long lb_irq_int_8 : 1; /* RW, W1C */ - unsigned long lb_irq_int_9 : 1; /* RW, W1C */ - unsigned long lb_irq_int_10 : 1; /* RW, W1C */ - unsigned long lb_irq_int_11 : 1; /* RW, W1C */ - unsigned long lb_irq_int_12 : 1; /* RW, W1C */ - unsigned long lb_irq_int_13 : 1; /* RW, W1C */ - unsigned long lb_irq_int_14 : 1; /* RW, W1C */ - unsigned long lb_irq_int_15 : 1; /* RW, W1C */ - unsigned long l1_nmi_int : 1; /* RW, W1C */ - unsigned long stop_clock : 1; /* RW, W1C */ - unsigned long asic_to_l1 : 1; /* RW, W1C */ - unsigned long l1_to_asic : 1; /* RW, W1C */ - unsigned long ltc_int : 1; /* RW, W1C */ - unsigned long la_seq_trigger : 1; /* RW, W1C */ - unsigned long ipi_int : 1; /* RW, W1C */ - unsigned long extio_int0 : 1; /* RW, W1C */ - unsigned long extio_int1 : 1; /* RW, W1C */ - unsigned long extio_int2 : 1; /* RW, W1C */ - unsigned long extio_int3 : 1; /* RW, W1C */ - unsigned long profile_int : 1; /* RW, W1C */ - unsigned long rtc0 : 1; /* RW, W1C */ - unsigned long rtc1 : 1; /* RW, W1C */ - unsigned long rtc2 : 1; /* RW, W1C */ - unsigned long rtc3 : 1; /* RW, W1C */ - unsigned long bau_data : 1; /* RW, W1C */ - unsigned long power_management_req : 1; /* RW, W1C */ - unsigned long rsvd_57_63 : 7; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_EVENT_OCCURRED0_ALIAS */ -/* ========================================================================= */ -#define UVH_EVENT_OCCURRED0_ALIAS 0x0000000000070008UL -#define UVH_EVENT_OCCURRED0_ALIAS_32 0x005f0 - -/* ========================================================================= */ -/* UVH_INT_CMPB */ -/* ========================================================================= */ -#define UVH_INT_CMPB 0x22080UL - -#define UVH_INT_CMPB_REAL_TIME_CMPB_SHFT 0 -#define UVH_INT_CMPB_REAL_TIME_CMPB_MASK 0x00ffffffffffffffUL - -union uvh_int_cmpb_u { - unsigned long v; - struct uvh_int_cmpb_s { - unsigned long real_time_cmpb : 56; /* RW */ - unsigned long rsvd_56_63 : 8; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_INT_CMPC */ -/* ========================================================================= */ -#define UVH_INT_CMPC 0x22100UL - -#define UVH_INT_CMPC_REAL_TIME_CMPC_SHFT 0 -#define UVH_INT_CMPC_REAL_TIME_CMPC_MASK 0x00ffffffffffffffUL - -union uvh_int_cmpc_u { - unsigned long v; - struct uvh_int_cmpc_s { - unsigned long real_time_cmpc : 56; /* RW */ - unsigned long rsvd_56_63 : 8; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_INT_CMPD */ -/* ========================================================================= */ -#define UVH_INT_CMPD 0x22180UL - -#define UVH_INT_CMPD_REAL_TIME_CMPD_SHFT 0 -#define UVH_INT_CMPD_REAL_TIME_CMPD_MASK 0x00ffffffffffffffUL - -union uvh_int_cmpd_u { - unsigned long v; - struct uvh_int_cmpd_s { - unsigned long real_time_cmpd : 56; /* RW */ - unsigned long rsvd_56_63 : 8; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_NODE_ID */ -/* ========================================================================= */ -#define UVH_NODE_ID 0x0UL - -#define UVH_NODE_ID_FORCE1_SHFT 0 -#define UVH_NODE_ID_FORCE1_MASK 0x0000000000000001UL -#define UVH_NODE_ID_MANUFACTURER_SHFT 1 -#define UVH_NODE_ID_MANUFACTURER_MASK 0x0000000000000ffeUL -#define UVH_NODE_ID_PART_NUMBER_SHFT 12 -#define UVH_NODE_ID_PART_NUMBER_MASK 0x000000000ffff000UL -#define UVH_NODE_ID_REVISION_SHFT 28 -#define UVH_NODE_ID_REVISION_MASK 0x00000000f0000000UL -#define UVH_NODE_ID_NODE_ID_SHFT 32 -#define UVH_NODE_ID_NODE_ID_MASK 0x00007fff00000000UL -#define UVH_NODE_ID_NODES_PER_BIT_SHFT 48 -#define UVH_NODE_ID_NODES_PER_BIT_MASK 0x007f000000000000UL -#define UVH_NODE_ID_NI_PORT_SHFT 56 -#define UVH_NODE_ID_NI_PORT_MASK 0x0f00000000000000UL - -union uvh_node_id_u { - unsigned long v; - struct uvh_node_id_s { - unsigned long force1 : 1; /* RO */ - unsigned long manufacturer : 11; /* RO */ - unsigned long part_number : 16; /* RO */ - unsigned long revision : 4; /* RO */ - unsigned long node_id : 15; /* RW */ - unsigned long rsvd_47 : 1; /* */ - unsigned long nodes_per_bit : 7; /* RW */ - unsigned long rsvd_55 : 1; /* */ - unsigned long ni_port : 4; /* RO */ - unsigned long rsvd_60_63 : 4; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR */ -/* ========================================================================= */ -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR 0x16000d0UL - -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT 24 -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_MASK 0x00003fffff000000UL - -union uvh_rh_gam_alias210_redirect_config_0_mmr_u { - unsigned long v; - struct uvh_rh_gam_alias210_redirect_config_0_mmr_s { - unsigned long rsvd_0_23 : 24; /* */ - unsigned long dest_base : 22; /* RW */ - unsigned long rsvd_46_63: 18; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR */ -/* ========================================================================= */ -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR 0x16000e0UL - -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_SHFT 24 -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR_DEST_BASE_MASK 0x00003fffff000000UL - -union uvh_rh_gam_alias210_redirect_config_1_mmr_u { - unsigned long v; - struct uvh_rh_gam_alias210_redirect_config_1_mmr_s { - unsigned long rsvd_0_23 : 24; /* */ - unsigned long dest_base : 22; /* RW */ - unsigned long rsvd_46_63: 18; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR */ -/* ========================================================================= */ -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR 0x16000f0UL - -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_SHFT 24 -#define UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR_DEST_BASE_MASK 0x00003fffff000000UL - -union uvh_rh_gam_alias210_redirect_config_2_mmr_u { - unsigned long v; - struct uvh_rh_gam_alias210_redirect_config_2_mmr_s { - unsigned long rsvd_0_23 : 24; /* */ - unsigned long dest_base : 22; /* RW */ - unsigned long rsvd_46_63: 18; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR */ -/* ========================================================================= */ -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR 0x1600010UL - -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT 28 -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffff0000000UL -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_SHFT 48 -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_GR4_MASK 0x0001000000000000UL -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_SHFT 52 -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_N_GRU_MASK 0x00f0000000000000UL -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 -#define UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL - -union uvh_rh_gam_gru_overlay_config_mmr_u { - unsigned long v; - struct uvh_rh_gam_gru_overlay_config_mmr_s { - unsigned long rsvd_0_27: 28; /* */ - unsigned long base : 18; /* RW */ - unsigned long rsvd_46_47: 2; /* */ - unsigned long gr4 : 1; /* RW */ - unsigned long rsvd_49_51: 3; /* */ - unsigned long n_gru : 4; /* RW */ - unsigned long rsvd_56_62: 7; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR */ -/* ========================================================================= */ -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR 0x1600028UL - -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT 26 -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_MASK 0x00003ffffc000000UL -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_SHFT 46 -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_DUAL_HUB_MASK 0x0000400000000000UL -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_SHFT 63 -#define UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_ENABLE_MASK 0x8000000000000000UL - -union uvh_rh_gam_mmr_overlay_config_mmr_u { - unsigned long v; - struct uvh_rh_gam_mmr_overlay_config_mmr_s { - unsigned long rsvd_0_25: 26; /* */ - unsigned long base : 20; /* RW */ - unsigned long dual_hub : 1; /* RW */ - unsigned long rsvd_47_62: 16; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RTC */ -/* ========================================================================= */ -#define UVH_RTC 0x340000UL - -#define UVH_RTC_REAL_TIME_CLOCK_SHFT 0 -#define UVH_RTC_REAL_TIME_CLOCK_MASK 0x00ffffffffffffffUL - -union uvh_rtc_u { - unsigned long v; - struct uvh_rtc_s { - unsigned long real_time_clock : 56; /* RW */ - unsigned long rsvd_56_63 : 8; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RTC1_INT_CONFIG */ -/* ========================================================================= */ -#define UVH_RTC1_INT_CONFIG 0x615c0UL - -#define UVH_RTC1_INT_CONFIG_VECTOR_SHFT 0 -#define UVH_RTC1_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL -#define UVH_RTC1_INT_CONFIG_DM_SHFT 8 -#define UVH_RTC1_INT_CONFIG_DM_MASK 0x0000000000000700UL -#define UVH_RTC1_INT_CONFIG_DESTMODE_SHFT 11 -#define UVH_RTC1_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL -#define UVH_RTC1_INT_CONFIG_STATUS_SHFT 12 -#define UVH_RTC1_INT_CONFIG_STATUS_MASK 0x0000000000001000UL -#define UVH_RTC1_INT_CONFIG_P_SHFT 13 -#define UVH_RTC1_INT_CONFIG_P_MASK 0x0000000000002000UL -#define UVH_RTC1_INT_CONFIG_T_SHFT 15 -#define UVH_RTC1_INT_CONFIG_T_MASK 0x0000000000008000UL -#define UVH_RTC1_INT_CONFIG_M_SHFT 16 -#define UVH_RTC1_INT_CONFIG_M_MASK 0x0000000000010000UL -#define UVH_RTC1_INT_CONFIG_APIC_ID_SHFT 32 -#define UVH_RTC1_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL - -union uvh_rtc1_int_config_u { - unsigned long v; - struct uvh_rtc1_int_config_s { - unsigned long vector_ : 8; /* RW */ - unsigned long dm : 3; /* RW */ - unsigned long destmode : 1; /* RW */ - unsigned long status : 1; /* RO */ - unsigned long p : 1; /* RO */ - unsigned long rsvd_14 : 1; /* */ - unsigned long t : 1; /* RO */ - unsigned long m : 1; /* RW */ - unsigned long rsvd_17_31: 15; /* */ - unsigned long apic_id : 32; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RTC2_INT_CONFIG */ -/* ========================================================================= */ -#define UVH_RTC2_INT_CONFIG 0x61600UL - -#define UVH_RTC2_INT_CONFIG_VECTOR_SHFT 0 -#define UVH_RTC2_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL -#define UVH_RTC2_INT_CONFIG_DM_SHFT 8 -#define UVH_RTC2_INT_CONFIG_DM_MASK 0x0000000000000700UL -#define UVH_RTC2_INT_CONFIG_DESTMODE_SHFT 11 -#define UVH_RTC2_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL -#define UVH_RTC2_INT_CONFIG_STATUS_SHFT 12 -#define UVH_RTC2_INT_CONFIG_STATUS_MASK 0x0000000000001000UL -#define UVH_RTC2_INT_CONFIG_P_SHFT 13 -#define UVH_RTC2_INT_CONFIG_P_MASK 0x0000000000002000UL -#define UVH_RTC2_INT_CONFIG_T_SHFT 15 -#define UVH_RTC2_INT_CONFIG_T_MASK 0x0000000000008000UL -#define UVH_RTC2_INT_CONFIG_M_SHFT 16 -#define UVH_RTC2_INT_CONFIG_M_MASK 0x0000000000010000UL -#define UVH_RTC2_INT_CONFIG_APIC_ID_SHFT 32 -#define UVH_RTC2_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL - -union uvh_rtc2_int_config_u { - unsigned long v; - struct uvh_rtc2_int_config_s { - unsigned long vector_ : 8; /* RW */ - unsigned long dm : 3; /* RW */ - unsigned long destmode : 1; /* RW */ - unsigned long status : 1; /* RO */ - unsigned long p : 1; /* RO */ - unsigned long rsvd_14 : 1; /* */ - unsigned long t : 1; /* RO */ - unsigned long m : 1; /* RW */ - unsigned long rsvd_17_31: 15; /* */ - unsigned long apic_id : 32; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RTC3_INT_CONFIG */ -/* ========================================================================= */ -#define UVH_RTC3_INT_CONFIG 0x61640UL - -#define UVH_RTC3_INT_CONFIG_VECTOR_SHFT 0 -#define UVH_RTC3_INT_CONFIG_VECTOR_MASK 0x00000000000000ffUL -#define UVH_RTC3_INT_CONFIG_DM_SHFT 8 -#define UVH_RTC3_INT_CONFIG_DM_MASK 0x0000000000000700UL -#define UVH_RTC3_INT_CONFIG_DESTMODE_SHFT 11 -#define UVH_RTC3_INT_CONFIG_DESTMODE_MASK 0x0000000000000800UL -#define UVH_RTC3_INT_CONFIG_STATUS_SHFT 12 -#define UVH_RTC3_INT_CONFIG_STATUS_MASK 0x0000000000001000UL -#define UVH_RTC3_INT_CONFIG_P_SHFT 13 -#define UVH_RTC3_INT_CONFIG_P_MASK 0x0000000000002000UL -#define UVH_RTC3_INT_CONFIG_T_SHFT 15 -#define UVH_RTC3_INT_CONFIG_T_MASK 0x0000000000008000UL -#define UVH_RTC3_INT_CONFIG_M_SHFT 16 -#define UVH_RTC3_INT_CONFIG_M_MASK 0x0000000000010000UL -#define UVH_RTC3_INT_CONFIG_APIC_ID_SHFT 32 -#define UVH_RTC3_INT_CONFIG_APIC_ID_MASK 0xffffffff00000000UL - -union uvh_rtc3_int_config_u { - unsigned long v; - struct uvh_rtc3_int_config_s { - unsigned long vector_ : 8; /* RW */ - unsigned long dm : 3; /* RW */ - unsigned long destmode : 1; /* RW */ - unsigned long status : 1; /* RO */ - unsigned long p : 1; /* RO */ - unsigned long rsvd_14 : 1; /* */ - unsigned long t : 1; /* RO */ - unsigned long m : 1; /* RW */ - unsigned long rsvd_17_31: 15; /* */ - unsigned long apic_id : 32; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_RTC_INC_RATIO */ -/* ========================================================================= */ -#define UVH_RTC_INC_RATIO 0x350000UL - -#define UVH_RTC_INC_RATIO_FRACTION_SHFT 0 -#define UVH_RTC_INC_RATIO_FRACTION_MASK 0x00000000000fffffUL -#define UVH_RTC_INC_RATIO_RATIO_SHFT 20 -#define UVH_RTC_INC_RATIO_RATIO_MASK 0x0000000000700000UL - -union uvh_rtc_inc_ratio_u { - unsigned long v; - struct uvh_rtc_inc_ratio_s { - unsigned long fraction : 20; /* RW */ - unsigned long ratio : 3; /* RW */ - unsigned long rsvd_23_63: 41; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ADDR_MAP_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ADDR_MAP_CONFIG 0xc80000UL - -#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_SHFT 0 -#define UVH_SI_ADDR_MAP_CONFIG_M_SKT_MASK 0x000000000000003fUL -#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_SHFT 8 -#define UVH_SI_ADDR_MAP_CONFIG_N_SKT_MASK 0x0000000000000f00UL - -union uvh_si_addr_map_config_u { - unsigned long v; - struct uvh_si_addr_map_config_s { - unsigned long m_skt : 6; /* RW */ - unsigned long rsvd_6_7: 2; /* */ - unsigned long n_skt : 4; /* RW */ - unsigned long rsvd_12_63: 52; /* */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS0_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS0_OVERLAY_CONFIG 0xc80008UL - -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS0_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias0_overlay_config_u { - unsigned long v; - struct uvh_si_alias0_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS1_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS1_OVERLAY_CONFIG 0xc80010UL - -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS1_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias1_overlay_config_u { - unsigned long v; - struct uvh_si_alias1_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - -/* ========================================================================= */ -/* UVH_SI_ALIAS2_OVERLAY_CONFIG */ -/* ========================================================================= */ -#define UVH_SI_ALIAS2_OVERLAY_CONFIG 0xc80018UL - -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_SHFT 24 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_BASE_MASK 0x00000000ff000000UL -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_SHFT 48 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_M_ALIAS_MASK 0x001f000000000000UL -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_SHFT 63 -#define UVH_SI_ALIAS2_OVERLAY_CONFIG_ENABLE_MASK 0x8000000000000000UL - -union uvh_si_alias2_overlay_config_u { - unsigned long v; - struct uvh_si_alias2_overlay_config_s { - unsigned long rsvd_0_23: 24; /* */ - unsigned long base : 8; /* RW */ - unsigned long rsvd_32_47: 16; /* */ - unsigned long m_alias : 5; /* RW */ - unsigned long rsvd_53_62: 10; /* */ - unsigned long enable : 1; /* RW */ - } s; -}; - - -#endif /* __ASM_IA64_UV_MMRS__ */ diff --git a/include/asm-ia64/vga.h b/include/asm-ia64/vga.h deleted file mode 100644 index 02184ec..0000000 --- a/include/asm-ia64/vga.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Access to VGA videoram - * - * (c) 1998 Martin Mares - * (c) 1999 Asit Mallick - * (c) 1999 Don Dugger - */ - -#ifndef __ASM_IA64_VGA_H_ -#define __ASM_IA64_VGA_H_ - -/* - * On the PC, we can just recalculate addresses and then access the - * videoram directly without any black magic. - */ - -extern unsigned long vga_console_iobase; -extern unsigned long vga_console_membase; - -#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap_nocache(vga_console_membase + (x), s)) - -#define vga_readb(x) (*(x)) -#define vga_writeb(x,y) (*(y) = (x)) - -#endif /* __ASM_IA64_VGA_H_ */ diff --git a/include/asm-ia64/xor.h b/include/asm-ia64/xor.h deleted file mode 100644 index 41fb874..0000000 --- a/include/asm-ia64/xor.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-ia64/xor.h - * - * Optimized RAID-5 checksumming functions for IA-64. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * You should have received a copy of the GNU General Public License - * (for example /usr/src/linux/COPYING); if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - - -extern void xor_ia64_2(unsigned long, unsigned long *, unsigned long *); -extern void xor_ia64_3(unsigned long, unsigned long *, unsigned long *, - unsigned long *); -extern void xor_ia64_4(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *); -extern void xor_ia64_5(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *, unsigned long *); - -static struct xor_block_template xor_block_ia64 = { - .name = "ia64", - .do_2 = xor_ia64_2, - .do_3 = xor_ia64_3, - .do_4 = xor_ia64_4, - .do_5 = xor_ia64_5, -}; - -#define XOR_TRY_TEMPLATES xor_speed(&xor_block_ia64) -- cgit v1.1 From 6c5e0c4d518a37e1d5d794c14433e80284415079 Mon Sep 17 00:00:00 2001 From: Jens Axboe Date: Fri, 1 Aug 2008 20:31:32 +0200 Subject: block: add a blk_plug_device_unlocked() that grabs the queue lock blk_plug_device() must be called with the queue lock held, so callers often just grab and release the lock for that purpose. Add a helper that does just that. Signed-off-by: Jens Axboe --- include/linux/blkdev.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h index 88d6808..e61f22b 100644 --- a/include/linux/blkdev.h +++ b/include/linux/blkdev.h @@ -655,6 +655,7 @@ extern struct request *blk_get_request(struct request_queue *, int, gfp_t); extern void blk_insert_request(struct request_queue *, struct request *, int, void *); extern void blk_requeue_request(struct request_queue *, struct request *); extern void blk_plug_device(struct request_queue *); +extern void blk_plug_device_unlocked(struct request_queue *); extern int blk_remove_plug(struct request_queue *); extern void blk_recount_segments(struct request_queue *, struct bio *); extern int scsi_cmd_ioctl(struct file *, struct request_queue *, -- cgit v1.1 From c6557e7f2b6ae76a44653d38f835174074c42e05 Mon Sep 17 00:00:00 2001 From: Martin Schwidefsky Date: Fri, 1 Aug 2008 20:42:05 +0200 Subject: [S390] move include/asm-s390 to arch/s390/include/asm Signed-off-by: Martin Schwidefsky --- include/asm-s390/Kbuild | 15 - include/asm-s390/airq.h | 19 - include/asm-s390/appldata.h | 90 --- include/asm-s390/atomic.h | 285 --------- include/asm-s390/auxvec.h | 4 - include/asm-s390/bitops.h | 884 --------------------------- include/asm-s390/bug.h | 70 --- include/asm-s390/bugs.h | 22 - include/asm-s390/byteorder.h | 125 ---- include/asm-s390/cache.h | 19 - include/asm-s390/cacheflush.h | 31 - include/asm-s390/ccwdev.h | 192 ------ include/asm-s390/ccwgroup.h | 69 --- include/asm-s390/checksum.h | 166 ------ include/asm-s390/chpid.h | 56 -- include/asm-s390/chsc.h | 127 ---- include/asm-s390/cio.h | 514 ---------------- include/asm-s390/cmb.h | 58 -- include/asm-s390/compat.h | 233 -------- include/asm-s390/cpcmd.h | 34 -- include/asm-s390/cpu.h | 33 - include/asm-s390/cputime.h | 177 ------ include/asm-s390/current.h | 23 - include/asm-s390/dasd.h | 270 --------- include/asm-s390/debug.h | 261 -------- include/asm-s390/delay.h | 22 - include/asm-s390/device.h | 7 - include/asm-s390/diag.h | 39 -- include/asm-s390/div64.h | 1 - include/asm-s390/dma.h | 16 - include/asm-s390/ebcdic.h | 49 -- include/asm-s390/elf.h | 196 ------ include/asm-s390/emergency-restart.h | 6 - include/asm-s390/errno.h | 13 - include/asm-s390/etr.h | 258 -------- include/asm-s390/extmem.h | 33 - include/asm-s390/fb.h | 12 - include/asm-s390/fcntl.h | 1 - include/asm-s390/fcx.h | 311 ---------- include/asm-s390/futex.h | 52 -- include/asm-s390/hardirq.h | 51 -- include/asm-s390/hugetlb.h | 184 ------ include/asm-s390/idals.h | 256 -------- include/asm-s390/io.h | 54 -- include/asm-s390/ioctl.h | 1 - include/asm-s390/ioctls.h | 92 --- include/asm-s390/ipcbuf.h | 31 - include/asm-s390/ipl.h | 168 ------ include/asm-s390/irq.h | 23 - include/asm-s390/irq_regs.h | 1 - include/asm-s390/irqflags.h | 106 ---- include/asm-s390/isc.h | 25 - include/asm-s390/itcw.h | 30 - include/asm-s390/kdebug.h | 27 - include/asm-s390/kexec.h | 43 -- include/asm-s390/kmap_types.h | 23 - include/asm-s390/kprobes.h | 103 ---- include/asm-s390/kvm.h | 45 -- include/asm-s390/kvm_host.h | 235 -------- include/asm-s390/kvm_para.h | 150 ----- include/asm-s390/kvm_virtio.h | 63 -- include/asm-s390/linkage.h | 6 - include/asm-s390/local.h | 1 - include/asm-s390/lowcore.h | 433 -------------- include/asm-s390/mathemu.h | 29 - include/asm-s390/mman.h | 25 - include/asm-s390/mmu.h | 13 - include/asm-s390/mmu_context.h | 77 --- include/asm-s390/module.h | 46 -- include/asm-s390/monwriter.h | 33 - include/asm-s390/msgbuf.h | 37 -- include/asm-s390/mutex.h | 9 - include/asm-s390/page.h | 155 ----- include/asm-s390/param.h | 30 - include/asm-s390/pci.h | 10 - include/asm-s390/percpu.h | 37 -- include/asm-s390/pgalloc.h | 174 ------ include/asm-s390/pgtable.h | 1093 ---------------------------------- include/asm-s390/poll.h | 1 - include/asm-s390/posix_types.h | 111 ---- include/asm-s390/processor.h | 360 ----------- include/asm-s390/ptrace.h | 499 ---------------- include/asm-s390/qdio.h | 382 ------------ include/asm-s390/qeth.h | 78 --- include/asm-s390/reset.h | 21 - include/asm-s390/resource.h | 15 - include/asm-s390/rwsem.h | 387 ------------ include/asm-s390/s390_ext.h | 32 - include/asm-s390/s390_rdev.h | 15 - include/asm-s390/scatterlist.h | 19 - include/asm-s390/schid.h | 32 - include/asm-s390/sclp.h | 58 -- include/asm-s390/sections.h | 8 - include/asm-s390/segment.h | 4 - include/asm-s390/sembuf.h | 29 - include/asm-s390/setup.h | 140 ----- include/asm-s390/sfp-machine.h | 142 ----- include/asm-s390/sfp-util.h | 77 --- include/asm-s390/shmbuf.h | 48 -- include/asm-s390/shmparam.h | 13 - include/asm-s390/sigcontext.h | 71 --- include/asm-s390/siginfo.h | 18 - include/asm-s390/signal.h | 172 ------ include/asm-s390/sigp.h | 126 ---- include/asm-s390/smp.h | 116 ---- include/asm-s390/socket.h | 65 -- include/asm-s390/sockios.h | 21 - include/asm-s390/sparsemem.h | 18 - include/asm-s390/spinlock.h | 178 ------ include/asm-s390/spinlock_types.h | 20 - include/asm-s390/stat.h | 105 ---- include/asm-s390/statfs.h | 71 --- include/asm-s390/string.h | 143 ----- include/asm-s390/suspend.h | 5 - include/asm-s390/sysinfo.h | 121 ---- include/asm-s390/system.h | 462 -------------- include/asm-s390/tape390.h | 103 ---- include/asm-s390/termbits.h | 206 ------- include/asm-s390/termios.h | 67 --- include/asm-s390/thread_info.h | 118 ---- include/asm-s390/timer.h | 65 -- include/asm-s390/timex.h | 88 --- include/asm-s390/tlb.h | 156 ----- include/asm-s390/tlbflush.h | 140 ----- include/asm-s390/todclk.h | 23 - include/asm-s390/topology.h | 33 - include/asm-s390/types.h | 63 -- include/asm-s390/uaccess.h | 363 ----------- include/asm-s390/ucontext.h | 20 - include/asm-s390/unaligned.h | 13 - include/asm-s390/unistd.h | 411 ------------- include/asm-s390/user.h | 76 --- include/asm-s390/vtoc.h | 203 ------- include/asm-s390/xor.h | 1 - include/asm-s390/zcrypt.h | 276 --------- 135 files changed, 15320 deletions(-) delete mode 100644 include/asm-s390/Kbuild delete mode 100644 include/asm-s390/airq.h delete mode 100644 include/asm-s390/appldata.h delete mode 100644 include/asm-s390/atomic.h delete mode 100644 include/asm-s390/auxvec.h delete mode 100644 include/asm-s390/bitops.h delete mode 100644 include/asm-s390/bug.h delete mode 100644 include/asm-s390/bugs.h delete mode 100644 include/asm-s390/byteorder.h delete mode 100644 include/asm-s390/cache.h delete mode 100644 include/asm-s390/cacheflush.h delete mode 100644 include/asm-s390/ccwdev.h delete mode 100644 include/asm-s390/ccwgroup.h delete mode 100644 include/asm-s390/checksum.h delete mode 100644 include/asm-s390/chpid.h delete mode 100644 include/asm-s390/chsc.h delete mode 100644 include/asm-s390/cio.h delete mode 100644 include/asm-s390/cmb.h delete mode 100644 include/asm-s390/compat.h delete mode 100644 include/asm-s390/cpcmd.h delete mode 100644 include/asm-s390/cpu.h delete mode 100644 include/asm-s390/cputime.h delete mode 100644 include/asm-s390/current.h delete mode 100644 include/asm-s390/dasd.h delete mode 100644 include/asm-s390/debug.h delete mode 100644 include/asm-s390/delay.h delete mode 100644 include/asm-s390/device.h delete mode 100644 include/asm-s390/diag.h delete mode 100644 include/asm-s390/div64.h delete mode 100644 include/asm-s390/dma.h delete mode 100644 include/asm-s390/ebcdic.h delete mode 100644 include/asm-s390/elf.h delete mode 100644 include/asm-s390/emergency-restart.h delete mode 100644 include/asm-s390/errno.h delete mode 100644 include/asm-s390/etr.h delete mode 100644 include/asm-s390/extmem.h delete mode 100644 include/asm-s390/fb.h delete mode 100644 include/asm-s390/fcntl.h delete mode 100644 include/asm-s390/fcx.h delete mode 100644 include/asm-s390/futex.h delete mode 100644 include/asm-s390/hardirq.h delete mode 100644 include/asm-s390/hugetlb.h delete mode 100644 include/asm-s390/idals.h delete mode 100644 include/asm-s390/io.h delete mode 100644 include/asm-s390/ioctl.h delete mode 100644 include/asm-s390/ioctls.h delete mode 100644 include/asm-s390/ipcbuf.h delete mode 100644 include/asm-s390/ipl.h delete mode 100644 include/asm-s390/irq.h delete mode 100644 include/asm-s390/irq_regs.h delete mode 100644 include/asm-s390/irqflags.h delete mode 100644 include/asm-s390/isc.h delete mode 100644 include/asm-s390/itcw.h delete mode 100644 include/asm-s390/kdebug.h delete mode 100644 include/asm-s390/kexec.h delete mode 100644 include/asm-s390/kmap_types.h delete mode 100644 include/asm-s390/kprobes.h delete mode 100644 include/asm-s390/kvm.h delete mode 100644 include/asm-s390/kvm_host.h delete mode 100644 include/asm-s390/kvm_para.h delete mode 100644 include/asm-s390/kvm_virtio.h delete mode 100644 include/asm-s390/linkage.h delete mode 100644 include/asm-s390/local.h delete mode 100644 include/asm-s390/lowcore.h delete mode 100644 include/asm-s390/mathemu.h delete mode 100644 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include/asm-s390/unistd.h delete mode 100644 include/asm-s390/user.h delete mode 100644 include/asm-s390/vtoc.h delete mode 100644 include/asm-s390/xor.h delete mode 100644 include/asm-s390/zcrypt.h (limited to 'include') diff --git a/include/asm-s390/Kbuild b/include/asm-s390/Kbuild deleted file mode 100644 index 63a2341..0000000 --- a/include/asm-s390/Kbuild +++ /dev/null @@ -1,15 +0,0 @@ -include include/asm-generic/Kbuild.asm - -header-y += dasd.h -header-y += monwriter.h -header-y += qeth.h -header-y += tape390.h -header-y += ucontext.h -header-y += vtoc.h -header-y += zcrypt.h -header-y += chsc.h - -unifdef-y += cmb.h -unifdef-y += debug.h -unifdef-y += chpid.h -unifdef-y += schid.h diff --git a/include/asm-s390/airq.h b/include/asm-s390/airq.h deleted file mode 100644 index 1ac80d6..0000000 --- a/include/asm-s390/airq.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-s390/airq.h - * - * Copyright IBM Corp. 2002,2007 - * Author(s): Ingo Adlung - * Cornelia Huck - * Arnd Bergmann - * Peter Oberparleiter - */ - -#ifndef _ASM_S390_AIRQ_H -#define _ASM_S390_AIRQ_H - -typedef void (*adapter_int_handler_t)(void *, void *); - -void *s390_register_adapter_interrupt(adapter_int_handler_t, void *, u8); -void s390_unregister_adapter_interrupt(void *, u8); - -#endif /* _ASM_S390_AIRQ_H */ diff --git a/include/asm-s390/appldata.h b/include/asm-s390/appldata.h deleted file mode 100644 index 79283da..0000000 --- a/include/asm-s390/appldata.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * include/asm-s390/appldata.h - * - * Copyright (C) IBM Corp. 2006 - * - * Author(s): Melissa Howland - */ - -#ifndef _ASM_S390_APPLDATA_H -#define _ASM_S390_APPLDATA_H - -#include - -#ifndef CONFIG_64BIT - -#define APPLDATA_START_INTERVAL_REC 0x00 /* Function codes for */ -#define APPLDATA_STOP_REC 0x01 /* DIAG 0xDC */ -#define APPLDATA_GEN_EVENT_REC 0x02 -#define APPLDATA_START_CONFIG_REC 0x03 - -/* - * Parameter list for DIAGNOSE X'DC' - */ -struct appldata_parameter_list { - u16 diag; /* The DIAGNOSE code X'00DC' */ - u8 function; /* The function code for the DIAGNOSE */ - u8 parlist_length; /* Length of the parameter list */ - u32 product_id_addr; /* Address of the 16-byte product ID */ - u16 reserved; - u16 buffer_length; /* Length of the application data buffer */ - u32 buffer_addr; /* Address of the application data buffer */ -} __attribute__ ((packed)); - -#else /* CONFIG_64BIT */ - -#define APPLDATA_START_INTERVAL_REC 0x80 -#define APPLDATA_STOP_REC 0x81 -#define APPLDATA_GEN_EVENT_REC 0x82 -#define APPLDATA_START_CONFIG_REC 0x83 - -/* - * Parameter list for DIAGNOSE X'DC' - */ -struct appldata_parameter_list { - u16 diag; - u8 function; - u8 parlist_length; - u32 unused01; - u16 reserved; - u16 buffer_length; - u32 unused02; - u64 product_id_addr; - u64 buffer_addr; -} __attribute__ ((packed)); - -#endif /* CONFIG_64BIT */ - -struct appldata_product_id { - char prod_nr[7]; /* product number */ - u16 prod_fn; /* product function */ - u8 record_nr; /* record number */ - u16 version_nr; /* version */ - u16 release_nr; /* release */ - u16 mod_lvl; /* modification level */ -} __attribute__ ((packed)); - -static inline int appldata_asm(struct appldata_product_id *id, - unsigned short fn, void *buffer, - unsigned short length) -{ - struct appldata_parameter_list parm_list; - int ry; - - if (!MACHINE_IS_VM) - return -ENOSYS; - parm_list.diag = 0xdc; - parm_list.function = fn; - parm_list.parlist_length = sizeof(parm_list); - parm_list.buffer_length = length; - parm_list.product_id_addr = (unsigned long) id; - parm_list.buffer_addr = virt_to_phys(buffer); - asm volatile( - " diag %1,%0,0xdc" - : "=d" (ry) - : "d" (&parm_list), "m" (parm_list), "m" (*id) - : "cc"); - return ry; -} - -#endif /* _ASM_S390_APPLDATA_H */ diff --git a/include/asm-s390/atomic.h b/include/asm-s390/atomic.h deleted file mode 100644 index 2d18465..0000000 --- a/include/asm-s390/atomic.h +++ /dev/null @@ -1,285 +0,0 @@ -#ifndef __ARCH_S390_ATOMIC__ -#define __ARCH_S390_ATOMIC__ - -#include - -/* - * include/asm-s390/atomic.h - * - * S390 version - * Copyright (C) 1999-2005 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), - * Denis Joseph Barrow, - * Arnd Bergmann (arndb@de.ibm.com) - * - * Derived from "include/asm-i386/bitops.h" - * Copyright (C) 1992, Linus Torvalds - * - */ - -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc.. - * S390 uses 'Compare And Swap' for atomicity in SMP enviroment - */ - -typedef struct { - int counter; -} __attribute__ ((aligned (4))) atomic_t; -#define ATOMIC_INIT(i) { (i) } - -#ifdef __KERNEL__ - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -#define __CS_LOOP(ptr, op_val, op_string) ({ \ - typeof(ptr->counter) old_val, new_val; \ - asm volatile( \ - " l %0,%2\n" \ - "0: lr %1,%0\n" \ - op_string " %1,%3\n" \ - " cs %0,%1,%2\n" \ - " jl 0b" \ - : "=&d" (old_val), "=&d" (new_val), \ - "=Q" (((atomic_t *)(ptr))->counter) \ - : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \ - : "cc", "memory"); \ - new_val; \ -}) - -#else /* __GNUC__ */ - -#define __CS_LOOP(ptr, op_val, op_string) ({ \ - typeof(ptr->counter) old_val, new_val; \ - asm volatile( \ - " l %0,0(%3)\n" \ - "0: lr %1,%0\n" \ - op_string " %1,%4\n" \ - " cs %0,%1,0(%3)\n" \ - " jl 0b" \ - : "=&d" (old_val), "=&d" (new_val), \ - "=m" (((atomic_t *)(ptr))->counter) \ - : "a" (ptr), "d" (op_val), \ - "m" (((atomic_t *)(ptr))->counter) \ - : "cc", "memory"); \ - new_val; \ -}) - -#endif /* __GNUC__ */ - -static inline int atomic_read(const atomic_t *v) -{ - barrier(); - return v->counter; -} - -static inline void atomic_set(atomic_t *v, int i) -{ - v->counter = i; - barrier(); -} - -static __inline__ int atomic_add_return(int i, atomic_t * v) -{ - return __CS_LOOP(v, i, "ar"); -} -#define atomic_add(_i, _v) atomic_add_return(_i, _v) -#define atomic_add_negative(_i, _v) (atomic_add_return(_i, _v) < 0) -#define atomic_inc(_v) atomic_add_return(1, _v) -#define atomic_inc_return(_v) atomic_add_return(1, _v) -#define atomic_inc_and_test(_v) (atomic_add_return(1, _v) == 0) - -static __inline__ int atomic_sub_return(int i, atomic_t * v) -{ - return __CS_LOOP(v, i, "sr"); -} -#define atomic_sub(_i, _v) atomic_sub_return(_i, _v) -#define atomic_sub_and_test(_i, _v) (atomic_sub_return(_i, _v) == 0) -#define atomic_dec(_v) atomic_sub_return(1, _v) -#define atomic_dec_return(_v) atomic_sub_return(1, _v) -#define atomic_dec_and_test(_v) (atomic_sub_return(1, _v) == 0) - -static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t * v) -{ - __CS_LOOP(v, ~mask, "nr"); -} - -static __inline__ void atomic_set_mask(unsigned long mask, atomic_t * v) -{ - __CS_LOOP(v, mask, "or"); -} - -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -static __inline__ int atomic_cmpxchg(atomic_t *v, int old, int new) -{ -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - asm volatile( - " cs %0,%2,%1" - : "+d" (old), "=Q" (v->counter) - : "d" (new), "Q" (v->counter) - : "cc", "memory"); -#else /* __GNUC__ */ - asm volatile( - " cs %0,%3,0(%2)" - : "+d" (old), "=m" (v->counter) - : "a" (v), "d" (new), "m" (v->counter) - : "cc", "memory"); -#endif /* __GNUC__ */ - return old; -} - -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == u)) - break; - old = atomic_cmpxchg(v, c, c + a); - if (likely(old == c)) - break; - c = old; - } - return c != u; -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#undef __CS_LOOP - -#ifdef __s390x__ -typedef struct { - long long counter; -} __attribute__ ((aligned (8))) atomic64_t; -#define ATOMIC64_INIT(i) { (i) } - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -#define __CSG_LOOP(ptr, op_val, op_string) ({ \ - typeof(ptr->counter) old_val, new_val; \ - asm volatile( \ - " lg %0,%2\n" \ - "0: lgr %1,%0\n" \ - op_string " %1,%3\n" \ - " csg %0,%1,%2\n" \ - " jl 0b" \ - : "=&d" (old_val), "=&d" (new_val), \ - "=Q" (((atomic_t *)(ptr))->counter) \ - : "d" (op_val), "Q" (((atomic_t *)(ptr))->counter) \ - : "cc", "memory" ); \ - new_val; \ -}) - -#else /* __GNUC__ */ - -#define __CSG_LOOP(ptr, op_val, op_string) ({ \ - typeof(ptr->counter) old_val, new_val; \ - asm volatile( \ - " lg %0,0(%3)\n" \ - "0: lgr %1,%0\n" \ - op_string " %1,%4\n" \ - " csg %0,%1,0(%3)\n" \ - " jl 0b" \ - : "=&d" (old_val), "=&d" (new_val), \ - "=m" (((atomic_t *)(ptr))->counter) \ - : "a" (ptr), "d" (op_val), \ - "m" (((atomic_t *)(ptr))->counter) \ - : "cc", "memory" ); \ - new_val; \ -}) - -#endif /* __GNUC__ */ - -static inline long long atomic64_read(const atomic64_t *v) -{ - barrier(); - return v->counter; -} - -static inline void atomic64_set(atomic64_t *v, long long i) -{ - v->counter = i; - barrier(); -} - -static __inline__ long long atomic64_add_return(long long i, atomic64_t * v) -{ - return __CSG_LOOP(v, i, "agr"); -} -#define atomic64_add(_i, _v) atomic64_add_return(_i, _v) -#define atomic64_add_negative(_i, _v) (atomic64_add_return(_i, _v) < 0) -#define atomic64_inc(_v) atomic64_add_return(1, _v) -#define atomic64_inc_return(_v) atomic64_add_return(1, _v) -#define atomic64_inc_and_test(_v) (atomic64_add_return(1, _v) == 0) - -static __inline__ long long atomic64_sub_return(long long i, atomic64_t * v) -{ - return __CSG_LOOP(v, i, "sgr"); -} -#define atomic64_sub(_i, _v) atomic64_sub_return(_i, _v) -#define atomic64_sub_and_test(_i, _v) (atomic64_sub_return(_i, _v) == 0) -#define atomic64_dec(_v) atomic64_sub_return(1, _v) -#define atomic64_dec_return(_v) atomic64_sub_return(1, _v) -#define atomic64_dec_and_test(_v) (atomic64_sub_return(1, _v) == 0) - -static __inline__ void atomic64_clear_mask(unsigned long mask, atomic64_t * v) -{ - __CSG_LOOP(v, ~mask, "ngr"); -} - -static __inline__ void atomic64_set_mask(unsigned long mask, atomic64_t * v) -{ - __CSG_LOOP(v, mask, "ogr"); -} - -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -static __inline__ long long atomic64_cmpxchg(atomic64_t *v, - long long old, long long new) -{ -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - asm volatile( - " csg %0,%2,%1" - : "+d" (old), "=Q" (v->counter) - : "d" (new), "Q" (v->counter) - : "cc", "memory"); -#else /* __GNUC__ */ - asm volatile( - " csg %0,%3,0(%2)" - : "+d" (old), "=m" (v->counter) - : "a" (v), "d" (new), "m" (v->counter) - : "cc", "memory"); -#endif /* __GNUC__ */ - return old; -} - -static __inline__ int atomic64_add_unless(atomic64_t *v, - long long a, long long u) -{ - long long c, old; - c = atomic64_read(v); - for (;;) { - if (unlikely(c == u)) - break; - old = atomic64_cmpxchg(v, c, c + a); - if (likely(old == c)) - break; - c = old; - } - return c != u; -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -#undef __CSG_LOOP -#endif - -#define smp_mb__before_atomic_dec() smp_mb() -#define smp_mb__after_atomic_dec() smp_mb() -#define smp_mb__before_atomic_inc() smp_mb() -#define smp_mb__after_atomic_inc() smp_mb() - -#include -#endif /* __KERNEL__ */ -#endif /* __ARCH_S390_ATOMIC__ */ diff --git a/include/asm-s390/auxvec.h b/include/asm-s390/auxvec.h deleted file mode 100644 index 0d34072..0000000 --- a/include/asm-s390/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMS390_AUXVEC_H -#define __ASMS390_AUXVEC_H - -#endif diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h deleted file mode 100644 index b4eb24a..0000000 --- a/include/asm-s390/bitops.h +++ /dev/null @@ -1,884 +0,0 @@ -#ifndef _S390_BITOPS_H -#define _S390_BITOPS_H - -/* - * include/asm-s390/bitops.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/bitops.h" - * Copyright (C) 1992, Linus Torvalds - * - */ - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include - -/* - * 32 bit bitops format: - * bit 0 is the LSB of *addr; bit 31 is the MSB of *addr; - * bit 32 is the LSB of *(addr+4). That combined with the - * big endian byte order on S390 give the following bit - * order in memory: - * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 \ - * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00 - * after that follows the next long with bit numbers - * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30 - * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20 - * The reason for this bit ordering is the fact that - * in the architecture independent code bits operations - * of the form "flags |= (1 << bitnr)" are used INTERMIXED - * with operation of the form "set_bit(bitnr, flags)". - * - * 64 bit bitops format: - * bit 0 is the LSB of *addr; bit 63 is the MSB of *addr; - * bit 64 is the LSB of *(addr+8). That combined with the - * big endian byte order on S390 give the following bit - * order in memory: - * 3f 3e 3d 3c 3b 3a 39 38 37 36 35 34 33 32 31 30 - * 2f 2e 2d 2c 2b 2a 29 28 27 26 25 24 23 22 21 20 - * 1f 1e 1d 1c 1b 1a 19 18 17 16 15 14 13 12 11 10 - * 0f 0e 0d 0c 0b 0a 09 08 07 06 05 04 03 02 01 00 - * after that follows the next long with bit numbers - * 7f 7e 7d 7c 7b 7a 79 78 77 76 75 74 73 72 71 70 - * 6f 6e 6d 6c 6b 6a 69 68 67 66 65 64 63 62 61 60 - * 5f 5e 5d 5c 5b 5a 59 58 57 56 55 54 53 52 51 50 - * 4f 4e 4d 4c 4b 4a 49 48 47 46 45 44 43 42 41 40 - * The reason for this bit ordering is the fact that - * in the architecture independent code bits operations - * of the form "flags |= (1 << bitnr)" are used INTERMIXED - * with operation of the form "set_bit(bitnr, flags)". - */ - -/* bitmap tables from arch/S390/kernel/bitmap.S */ -extern const char _oi_bitmap[]; -extern const char _ni_bitmap[]; -extern const char _zb_findmap[]; -extern const char _sb_findmap[]; - -#ifndef __s390x__ - -#define __BITOPS_ALIGN 3 -#define __BITOPS_WORDSIZE 32 -#define __BITOPS_OR "or" -#define __BITOPS_AND "nr" -#define __BITOPS_XOR "xr" - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ - asm volatile( \ - " l %0,%2\n" \ - "0: lr %1,%0\n" \ - __op_string " %1,%3\n" \ - " cs %0,%1,%2\n" \ - " jl 0b" \ - : "=&d" (__old), "=&d" (__new), \ - "=Q" (*(unsigned long *) __addr) \ - : "d" (__val), "Q" (*(unsigned long *) __addr) \ - : "cc"); - -#else /* __GNUC__ */ - -#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ - asm volatile( \ - " l %0,0(%4)\n" \ - "0: lr %1,%0\n" \ - __op_string " %1,%3\n" \ - " cs %0,%1,0(%4)\n" \ - " jl 0b" \ - : "=&d" (__old), "=&d" (__new), \ - "=m" (*(unsigned long *) __addr) \ - : "d" (__val), "a" (__addr), \ - "m" (*(unsigned long *) __addr) : "cc"); - -#endif /* __GNUC__ */ - -#else /* __s390x__ */ - -#define __BITOPS_ALIGN 7 -#define __BITOPS_WORDSIZE 64 -#define __BITOPS_OR "ogr" -#define __BITOPS_AND "ngr" -#define __BITOPS_XOR "xgr" - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ - asm volatile( \ - " lg %0,%2\n" \ - "0: lgr %1,%0\n" \ - __op_string " %1,%3\n" \ - " csg %0,%1,%2\n" \ - " jl 0b" \ - : "=&d" (__old), "=&d" (__new), \ - "=Q" (*(unsigned long *) __addr) \ - : "d" (__val), "Q" (*(unsigned long *) __addr) \ - : "cc"); - -#else /* __GNUC__ */ - -#define __BITOPS_LOOP(__old, __new, __addr, __val, __op_string) \ - asm volatile( \ - " lg %0,0(%4)\n" \ - "0: lgr %1,%0\n" \ - __op_string " %1,%3\n" \ - " csg %0,%1,0(%4)\n" \ - " jl 0b" \ - : "=&d" (__old), "=&d" (__new), \ - "=m" (*(unsigned long *) __addr) \ - : "d" (__val), "a" (__addr), \ - "m" (*(unsigned long *) __addr) : "cc"); - - -#endif /* __GNUC__ */ - -#endif /* __s390x__ */ - -#define __BITOPS_WORDS(bits) (((bits)+__BITOPS_WORDSIZE-1)/__BITOPS_WORDSIZE) -#define __BITOPS_BARRIER() asm volatile("" : : : "memory") - -#ifdef CONFIG_SMP -/* - * SMP safe set_bit routine based on compare and swap (CS) - */ -static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make OR mask */ - mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR); -} - -/* - * SMP safe clear_bit routine based on compare and swap (CS) - */ -static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make AND mask */ - mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1))); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND); -} - -/* - * SMP safe change_bit routine based on compare and swap (CS) - */ -static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make XOR mask */ - mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR); -} - -/* - * SMP safe test_and_set_bit routine based on compare and swap (CS) - */ -static inline int -test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make OR/test mask */ - mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_OR); - __BITOPS_BARRIER(); - return (old & mask) != 0; -} - -/* - * SMP safe test_and_clear_bit routine based on compare and swap (CS) - */ -static inline int -test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make AND/test mask */ - mask = ~(1UL << (nr & (__BITOPS_WORDSIZE - 1))); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_AND); - __BITOPS_BARRIER(); - return (old ^ new) != 0; -} - -/* - * SMP safe test_and_change_bit routine based on compare and swap (CS) - */ -static inline int -test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr, old, new, mask; - - addr = (unsigned long) ptr; - /* calculate address for CS */ - addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3; - /* make XOR/test mask */ - mask = 1UL << (nr & (__BITOPS_WORDSIZE - 1)); - /* Do the atomic update. */ - __BITOPS_LOOP(old, new, addr, mask, __BITOPS_XOR); - __BITOPS_BARRIER(); - return (old & mask) != 0; -} -#endif /* CONFIG_SMP */ - -/* - * fast, non-SMP set_bit routine - */ -static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - asm volatile( - " oc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) : "a" (addr), - "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" ); -} - -static inline void -__constant_set_bit(const unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - *(unsigned char *) addr |= 1 << (nr & 7); -} - -#define set_bit_simple(nr,addr) \ -(__builtin_constant_p((nr)) ? \ - __constant_set_bit((nr),(addr)) : \ - __set_bit((nr),(addr)) ) - -/* - * fast, non-SMP clear_bit routine - */ -static inline void -__clear_bit(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - asm volatile( - " nc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) : "a" (addr), - "a" (_ni_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc"); -} - -static inline void -__constant_clear_bit(const unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - *(unsigned char *) addr &= ~(1 << (nr & 7)); -} - -#define clear_bit_simple(nr,addr) \ -(__builtin_constant_p((nr)) ? \ - __constant_clear_bit((nr),(addr)) : \ - __clear_bit((nr),(addr)) ) - -/* - * fast, non-SMP change_bit routine - */ -static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - asm volatile( - " xc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) : "a" (addr), - "a" (_oi_bitmap + (nr & 7)), "m" (*(char *) addr) : "cc" ); -} - -static inline void -__constant_change_bit(const unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - - addr = ((unsigned long) ptr) + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - *(unsigned char *) addr ^= 1 << (nr & 7); -} - -#define change_bit_simple(nr,addr) \ -(__builtin_constant_p((nr)) ? \ - __constant_change_bit((nr),(addr)) : \ - __change_bit((nr),(addr)) ) - -/* - * fast, non-SMP test_and_set_bit routine - */ -static inline int -test_and_set_bit_simple(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - unsigned char ch; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - ch = *(unsigned char *) addr; - asm volatile( - " oc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) - : "a" (addr), "a" (_oi_bitmap + (nr & 7)), - "m" (*(char *) addr) : "cc", "memory"); - return (ch >> (nr & 7)) & 1; -} -#define __test_and_set_bit(X,Y) test_and_set_bit_simple(X,Y) - -/* - * fast, non-SMP test_and_clear_bit routine - */ -static inline int -test_and_clear_bit_simple(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - unsigned char ch; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - ch = *(unsigned char *) addr; - asm volatile( - " nc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) - : "a" (addr), "a" (_ni_bitmap + (nr & 7)), - "m" (*(char *) addr) : "cc", "memory"); - return (ch >> (nr & 7)) & 1; -} -#define __test_and_clear_bit(X,Y) test_and_clear_bit_simple(X,Y) - -/* - * fast, non-SMP test_and_change_bit routine - */ -static inline int -test_and_change_bit_simple(unsigned long nr, volatile unsigned long *ptr) -{ - unsigned long addr; - unsigned char ch; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - ch = *(unsigned char *) addr; - asm volatile( - " xc 0(1,%1),0(%2)" - : "=m" (*(char *) addr) - : "a" (addr), "a" (_oi_bitmap + (nr & 7)), - "m" (*(char *) addr) : "cc", "memory"); - return (ch >> (nr & 7)) & 1; -} -#define __test_and_change_bit(X,Y) test_and_change_bit_simple(X,Y) - -#ifdef CONFIG_SMP -#define set_bit set_bit_cs -#define clear_bit clear_bit_cs -#define change_bit change_bit_cs -#define test_and_set_bit test_and_set_bit_cs -#define test_and_clear_bit test_and_clear_bit_cs -#define test_and_change_bit test_and_change_bit_cs -#else -#define set_bit set_bit_simple -#define clear_bit clear_bit_simple -#define change_bit change_bit_simple -#define test_and_set_bit test_and_set_bit_simple -#define test_and_clear_bit test_and_clear_bit_simple -#define test_and_change_bit test_and_change_bit_simple -#endif - - -/* - * This routine doesn't need to be atomic. - */ - -static inline int __test_bit(unsigned long nr, const volatile unsigned long *ptr) -{ - unsigned long addr; - unsigned char ch; - - addr = (unsigned long) ptr + ((nr ^ (__BITOPS_WORDSIZE - 8)) >> 3); - ch = *(volatile unsigned char *) addr; - return (ch >> (nr & 7)) & 1; -} - -static inline int -__constant_test_bit(unsigned long nr, const volatile unsigned long *addr) { - return (((volatile char *) addr) - [(nr^(__BITOPS_WORDSIZE-8))>>3] & (1<<(nr&7))) != 0; -} - -#define test_bit(nr,addr) \ -(__builtin_constant_p((nr)) ? \ - __constant_test_bit((nr),(addr)) : \ - __test_bit((nr),(addr)) ) - -/* - * Optimized find bit helper functions. - */ - -/** - * __ffz_word_loop - find byte offset of first long != -1UL - * @addr: pointer to array of unsigned long - * @size: size of the array in bits - */ -static inline unsigned long __ffz_word_loop(const unsigned long *addr, - unsigned long size) -{ - typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype; - unsigned long bytes = 0; - - asm volatile( -#ifndef __s390x__ - " ahi %1,-1\n" - " sra %1,5\n" - " jz 1f\n" - "0: c %2,0(%0,%3)\n" - " jne 1f\n" - " la %0,4(%0)\n" - " brct %1,0b\n" - "1:\n" -#else - " aghi %1,-1\n" - " srag %1,%1,6\n" - " jz 1f\n" - "0: cg %2,0(%0,%3)\n" - " jne 1f\n" - " la %0,8(%0)\n" - " brct %1,0b\n" - "1:\n" -#endif - : "+&a" (bytes), "+&d" (size) - : "d" (-1UL), "a" (addr), "m" (*(addrtype *) addr) - : "cc" ); - return bytes; -} - -/** - * __ffs_word_loop - find byte offset of first long != 0UL - * @addr: pointer to array of unsigned long - * @size: size of the array in bits - */ -static inline unsigned long __ffs_word_loop(const unsigned long *addr, - unsigned long size) -{ - typedef struct { long _[__BITOPS_WORDS(size)]; } addrtype; - unsigned long bytes = 0; - - asm volatile( -#ifndef __s390x__ - " ahi %1,-1\n" - " sra %1,5\n" - " jz 1f\n" - "0: c %2,0(%0,%3)\n" - " jne 1f\n" - " la %0,4(%0)\n" - " brct %1,0b\n" - "1:\n" -#else - " aghi %1,-1\n" - " srag %1,%1,6\n" - " jz 1f\n" - "0: cg %2,0(%0,%3)\n" - " jne 1f\n" - " la %0,8(%0)\n" - " brct %1,0b\n" - "1:\n" -#endif - : "+&a" (bytes), "+&a" (size) - : "d" (0UL), "a" (addr), "m" (*(addrtype *) addr) - : "cc" ); - return bytes; -} - -/** - * __ffz_word - add number of the first unset bit - * @nr: base value the bit number is added to - * @word: the word that is searched for unset bits - */ -static inline unsigned long __ffz_word(unsigned long nr, unsigned long word) -{ -#ifdef __s390x__ - if (likely((word & 0xffffffff) == 0xffffffff)) { - word >>= 32; - nr += 32; - } -#endif - if (likely((word & 0xffff) == 0xffff)) { - word >>= 16; - nr += 16; - } - if (likely((word & 0xff) == 0xff)) { - word >>= 8; - nr += 8; - } - return nr + _zb_findmap[(unsigned char) word]; -} - -/** - * __ffs_word - add number of the first set bit - * @nr: base value the bit number is added to - * @word: the word that is searched for set bits - */ -static inline unsigned long __ffs_word(unsigned long nr, unsigned long word) -{ -#ifdef __s390x__ - if (likely((word & 0xffffffff) == 0)) { - word >>= 32; - nr += 32; - } -#endif - if (likely((word & 0xffff) == 0)) { - word >>= 16; - nr += 16; - } - if (likely((word & 0xff) == 0)) { - word >>= 8; - nr += 8; - } - return nr + _sb_findmap[(unsigned char) word]; -} - - -/** - * __load_ulong_be - load big endian unsigned long - * @p: pointer to array of unsigned long - * @offset: byte offset of source value in the array - */ -static inline unsigned long __load_ulong_be(const unsigned long *p, - unsigned long offset) -{ - p = (unsigned long *)((unsigned long) p + offset); - return *p; -} - -/** - * __load_ulong_le - load little endian unsigned long - * @p: pointer to array of unsigned long - * @offset: byte offset of source value in the array - */ -static inline unsigned long __load_ulong_le(const unsigned long *p, - unsigned long offset) -{ - unsigned long word; - - p = (unsigned long *)((unsigned long) p + offset); -#ifndef __s390x__ - asm volatile( - " ic %0,0(%1)\n" - " icm %0,2,1(%1)\n" - " icm %0,4,2(%1)\n" - " icm %0,8,3(%1)" - : "=&d" (word) : "a" (p), "m" (*p) : "cc"); -#else - asm volatile( - " lrvg %0,%1" - : "=d" (word) : "m" (*p) ); -#endif - return word; -} - -/* - * The various find bit functions. - */ - -/* - * ffz - find first zero in word. - * @word: The word to search - * - * Undefined if no zero exists, so code should check against ~0UL first. - */ -static inline unsigned long ffz(unsigned long word) -{ - return __ffz_word(0, word); -} - -/** - * __ffs - find first bit in word. - * @word: The word to search - * - * Undefined if no bit exists, so code should check against 0 first. - */ -static inline unsigned long __ffs (unsigned long word) -{ - return __ffs_word(0, word); -} - -/** - * ffs - find first bit set - * @x: the word to search - * - * This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ -static inline int ffs(int x) -{ - if (!x) - return 0; - return __ffs_word(1, x); -} - -/** - * find_first_zero_bit - find the first zero bit in a memory region - * @addr: The address to start the search at - * @size: The maximum size to search - * - * Returns the bit-number of the first zero bit, not the number of the byte - * containing a bit. - */ -static inline unsigned long find_first_zero_bit(const unsigned long *addr, - unsigned long size) -{ - unsigned long bytes, bits; - - if (!size) - return 0; - bytes = __ffz_word_loop(addr, size); - bits = __ffz_word(bytes*8, __load_ulong_be(addr, bytes)); - return (bits < size) ? bits : size; -} - -/** - * find_first_bit - find the first set bit in a memory region - * @addr: The address to start the search at - * @size: The maximum size to search - * - * Returns the bit-number of the first set bit, not the number of the byte - * containing a bit. - */ -static inline unsigned long find_first_bit(const unsigned long * addr, - unsigned long size) -{ - unsigned long bytes, bits; - - if (!size) - return 0; - bytes = __ffs_word_loop(addr, size); - bits = __ffs_word(bytes*8, __load_ulong_be(addr, bytes)); - return (bits < size) ? bits : size; -} - -/** - * find_next_zero_bit - find the first zero bit in a memory region - * @addr: The address to base the search on - * @offset: The bitnumber to start searching at - * @size: The maximum size to search - */ -static inline int find_next_zero_bit (const unsigned long * addr, - unsigned long size, - unsigned long offset) -{ - const unsigned long *p; - unsigned long bit, set; - - if (offset >= size) - return size; - bit = offset & (__BITOPS_WORDSIZE - 1); - offset -= bit; - size -= offset; - p = addr + offset / __BITOPS_WORDSIZE; - if (bit) { - /* - * __ffz_word returns __BITOPS_WORDSIZE - * if no zero bit is present in the word. - */ - set = __ffz_word(0, *p >> bit) + bit; - if (set >= size) - return size + offset; - if (set < __BITOPS_WORDSIZE) - return set + offset; - offset += __BITOPS_WORDSIZE; - size -= __BITOPS_WORDSIZE; - p++; - } - return offset + find_first_zero_bit(p, size); -} - -/** - * find_next_bit - find the first set bit in a memory region - * @addr: The address to base the search on - * @offset: The bitnumber to start searching at - * @size: The maximum size to search - */ -static inline int find_next_bit (const unsigned long * addr, - unsigned long size, - unsigned long offset) -{ - const unsigned long *p; - unsigned long bit, set; - - if (offset >= size) - return size; - bit = offset & (__BITOPS_WORDSIZE - 1); - offset -= bit; - size -= offset; - p = addr + offset / __BITOPS_WORDSIZE; - if (bit) { - /* - * __ffs_word returns __BITOPS_WORDSIZE - * if no one bit is present in the word. - */ - set = __ffs_word(0, *p & (~0UL << bit)); - if (set >= size) - return size + offset; - if (set < __BITOPS_WORDSIZE) - return set + offset; - offset += __BITOPS_WORDSIZE; - size -= __BITOPS_WORDSIZE; - p++; - } - return offset + find_first_bit(p, size); -} - -/* - * Every architecture must define this function. It's the fastest - * way of searching a 140-bit bitmap where the first 100 bits are - * unlikely to be set. It's guaranteed that at least one of the 140 - * bits is cleared. - */ -static inline int sched_find_first_bit(unsigned long *b) -{ - return find_first_bit(b, 140); -} - -#include -#include -#include - -#include -#include - -/* - * ATTENTION: intel byte ordering convention for ext2 and minix !! - * bit 0 is the LSB of addr; bit 31 is the MSB of addr; - * bit 32 is the LSB of (addr+4). - * That combined with the little endian byte order of Intel gives the - * following bit order in memory: - * 07 06 05 04 03 02 01 00 15 14 13 12 11 10 09 08 \ - * 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24 - */ - -#define ext2_set_bit(nr, addr) \ - __test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_clear_bit(nr, addr) \ - __test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) -#define ext2_test_bit(nr, addr) \ - test_bit((nr)^(__BITOPS_WORDSIZE - 8), (unsigned long *)addr) - -static inline int ext2_find_first_zero_bit(void *vaddr, unsigned int size) -{ - unsigned long bytes, bits; - - if (!size) - return 0; - bytes = __ffz_word_loop(vaddr, size); - bits = __ffz_word(bytes*8, __load_ulong_le(vaddr, bytes)); - return (bits < size) ? bits : size; -} - -static inline int ext2_find_next_zero_bit(void *vaddr, unsigned long size, - unsigned long offset) -{ - unsigned long *addr = vaddr, *p; - unsigned long bit, set; - - if (offset >= size) - return size; - bit = offset & (__BITOPS_WORDSIZE - 1); - offset -= bit; - size -= offset; - p = addr + offset / __BITOPS_WORDSIZE; - if (bit) { - /* - * s390 version of ffz returns __BITOPS_WORDSIZE - * if no zero bit is present in the word. - */ - set = ffz(__load_ulong_le(p, 0) >> bit) + bit; - if (set >= size) - return size + offset; - if (set < __BITOPS_WORDSIZE) - return set + offset; - offset += __BITOPS_WORDSIZE; - size -= __BITOPS_WORDSIZE; - p++; - } - return offset + ext2_find_first_zero_bit(p, size); -} - -static inline unsigned long ext2_find_first_bit(void *vaddr, - unsigned long size) -{ - unsigned long bytes, bits; - - if (!size) - return 0; - bytes = __ffs_word_loop(vaddr, size); - bits = __ffs_word(bytes*8, __load_ulong_le(vaddr, bytes)); - return (bits < size) ? bits : size; -} - -static inline int ext2_find_next_bit(void *vaddr, unsigned long size, - unsigned long offset) -{ - unsigned long *addr = vaddr, *p; - unsigned long bit, set; - - if (offset >= size) - return size; - bit = offset & (__BITOPS_WORDSIZE - 1); - offset -= bit; - size -= offset; - p = addr + offset / __BITOPS_WORDSIZE; - if (bit) { - /* - * s390 version of ffz returns __BITOPS_WORDSIZE - * if no zero bit is present in the word. - */ - set = ffs(__load_ulong_le(p, 0) >> bit) + bit; - if (set >= size) - return size + offset; - if (set < __BITOPS_WORDSIZE) - return set + offset; - offset += __BITOPS_WORDSIZE; - size -= __BITOPS_WORDSIZE; - p++; - } - return offset + ext2_find_first_bit(p, size); -} - -#include - -#endif /* __KERNEL__ */ - -#endif /* _S390_BITOPS_H */ diff --git a/include/asm-s390/bug.h b/include/asm-s390/bug.h deleted file mode 100644 index 384e362..0000000 --- a/include/asm-s390/bug.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef _ASM_S390_BUG_H -#define _ASM_S390_BUG_H - -#include - -#ifdef CONFIG_BUG - -#ifdef CONFIG_64BIT -#define S390_LONG ".quad" -#else -#define S390_LONG ".long" -#endif - -#ifdef CONFIG_DEBUG_BUGVERBOSE - -#define __EMIT_BUG(x) do { \ - asm volatile( \ - "0: j 0b+2\n" \ - "1:\n" \ - ".section .rodata.str,\"aMS\",@progbits,1\n" \ - "2: .asciz \""__FILE__"\"\n" \ - ".previous\n" \ - ".section __bug_table,\"a\"\n" \ - "3:\t" S390_LONG "\t1b,2b\n" \ - " .short %0,%1\n" \ - " .org 3b+%2\n" \ - ".previous\n" \ - : : "i" (__LINE__), \ - "i" (x), \ - "i" (sizeof(struct bug_entry))); \ -} while (0) - -#else /* CONFIG_DEBUG_BUGVERBOSE */ - -#define __EMIT_BUG(x) do { \ - asm volatile( \ - "0: j 0b+2\n" \ - "1:\n" \ - ".section __bug_table,\"a\"\n" \ - "2:\t" S390_LONG "\t1b\n" \ - " .short %0\n" \ - " .org 2b+%1\n" \ - ".previous\n" \ - : : "i" (x), \ - "i" (sizeof(struct bug_entry))); \ -} while (0) - -#endif /* CONFIG_DEBUG_BUGVERBOSE */ - -#define BUG() __EMIT_BUG(0) - -#define WARN_ON(x) ({ \ - int __ret_warn_on = !!(x); \ - if (__builtin_constant_p(__ret_warn_on)) { \ - if (__ret_warn_on) \ - __EMIT_BUG(BUGFLAG_WARNING); \ - } else { \ - if (unlikely(__ret_warn_on)) \ - __EMIT_BUG(BUGFLAG_WARNING); \ - } \ - unlikely(__ret_warn_on); \ -}) - -#define HAVE_ARCH_BUG -#define HAVE_ARCH_WARN_ON -#endif /* CONFIG_BUG */ - -#include - -#endif /* _ASM_S390_BUG_H */ diff --git a/include/asm-s390/bugs.h b/include/asm-s390/bugs.h deleted file mode 100644 index 011f1e6..0000000 --- a/include/asm-s390/bugs.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-s390/bugs.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/bugs.h" - * Copyright (C) 1994 Linus Torvalds - */ - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -static inline void check_bugs(void) -{ - /* s390 has no bugs ... */ -} diff --git a/include/asm-s390/byteorder.h b/include/asm-s390/byteorder.h deleted file mode 100644 index 1fe2492..0000000 --- a/include/asm-s390/byteorder.h +++ /dev/null @@ -1,125 +0,0 @@ -#ifndef _S390_BYTEORDER_H -#define _S390_BYTEORDER_H - -/* - * include/asm-s390/byteorder.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - */ - -#include - -#ifdef __GNUC__ - -#ifdef __s390x__ -static inline __u64 ___arch__swab64p(const __u64 *x) -{ - __u64 result; - - asm volatile("lrvg %0,%1" : "=d" (result) : "m" (*x)); - return result; -} - -static inline __u64 ___arch__swab64(__u64 x) -{ - __u64 result; - - asm volatile("lrvgr %0,%1" : "=d" (result) : "d" (x)); - return result; -} - -static inline void ___arch__swab64s(__u64 *x) -{ - *x = ___arch__swab64p(x); -} -#endif /* __s390x__ */ - -static inline __u32 ___arch__swab32p(const __u32 *x) -{ - __u32 result; - - asm volatile( -#ifndef __s390x__ - " icm %0,8,3(%1)\n" - " icm %0,4,2(%1)\n" - " icm %0,2,1(%1)\n" - " ic %0,0(%1)" - : "=&d" (result) : "a" (x), "m" (*x) : "cc"); -#else /* __s390x__ */ - " lrv %0,%1" - : "=d" (result) : "m" (*x)); -#endif /* __s390x__ */ - return result; -} - -static inline __u32 ___arch__swab32(__u32 x) -{ -#ifndef __s390x__ - return ___arch__swab32p(&x); -#else /* __s390x__ */ - __u32 result; - - asm volatile("lrvr %0,%1" : "=d" (result) : "d" (x)); - return result; -#endif /* __s390x__ */ -} - -static __inline__ void ___arch__swab32s(__u32 *x) -{ - *x = ___arch__swab32p(x); -} - -static __inline__ __u16 ___arch__swab16p(const __u16 *x) -{ - __u16 result; - - asm volatile( -#ifndef __s390x__ - " icm %0,2,1(%1)\n" - " ic %0,0(%1)\n" - : "=&d" (result) : "a" (x), "m" (*x) : "cc"); -#else /* __s390x__ */ - " lrvh %0,%1" - : "=d" (result) : "m" (*x)); -#endif /* __s390x__ */ - return result; -} - -static __inline__ __u16 ___arch__swab16(__u16 x) -{ - return ___arch__swab16p(&x); -} - -static __inline__ void ___arch__swab16s(__u16 *x) -{ - *x = ___arch__swab16p(x); -} - -#ifdef __s390x__ -#define __arch__swab64(x) ___arch__swab64(x) -#define __arch__swab64p(x) ___arch__swab64p(x) -#define __arch__swab64s(x) ___arch__swab64s(x) -#endif /* __s390x__ */ -#define __arch__swab32(x) ___arch__swab32(x) -#define __arch__swab16(x) ___arch__swab16(x) -#define __arch__swab32p(x) ___arch__swab32p(x) -#define __arch__swab16p(x) ___arch__swab16p(x) -#define __arch__swab32s(x) ___arch__swab32s(x) -#define __arch__swab16s(x) ___arch__swab16s(x) - -#ifndef __s390x__ -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif -#else /* __s390x__ */ -#define __BYTEORDER_HAS_U64__ -#endif /* __s390x__ */ - -#endif /* __GNUC__ */ - -#include - -#endif /* _S390_BYTEORDER_H */ diff --git a/include/asm-s390/cache.h b/include/asm-s390/cache.h deleted file mode 100644 index 9b86681..0000000 --- a/include/asm-s390/cache.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-s390/cache.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * - * Derived from "include/asm-i386/cache.h" - * Copyright (C) 1992, Linus Torvalds - */ - -#ifndef __ARCH_S390_CACHE_H -#define __ARCH_S390_CACHE_H - -#define L1_CACHE_BYTES 256 -#define L1_CACHE_SHIFT 8 - -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) - -#endif diff --git a/include/asm-s390/cacheflush.h b/include/asm-s390/cacheflush.h deleted file mode 100644 index 49d5af9..0000000 --- a/include/asm-s390/cacheflush.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _S390_CACHEFLUSH_H -#define _S390_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include - -/* Caches aren't brain-dead on the s390. */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -#ifdef CONFIG_DEBUG_PAGEALLOC -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#endif /* _S390_CACHEFLUSH_H */ diff --git a/include/asm-s390/ccwdev.h b/include/asm-s390/ccwdev.h deleted file mode 100644 index ba007d8..0000000 --- a/include/asm-s390/ccwdev.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - * include/asm-s390/ccwdev.h - * include/asm-s390x/ccwdev.h - * - * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Arnd Bergmann - * - * Interface for CCW device drivers - */ -#ifndef _S390_CCWDEV_H_ -#define _S390_CCWDEV_H_ - -#include -#include -#include - -/* structs from asm/cio.h */ -struct irb; -struct ccw1; -struct ccw_dev_id; - -/* simplified initializers for struct ccw_device: - * CCW_DEVICE and CCW_DEVICE_DEVTYPE initialize one - * entry in your MODULE_DEVICE_TABLE and set the match_flag correctly */ -#define CCW_DEVICE(cu, cum) \ - .cu_type=(cu), .cu_model=(cum), \ - .match_flags=(CCW_DEVICE_ID_MATCH_CU_TYPE \ - | (cum ? CCW_DEVICE_ID_MATCH_CU_MODEL : 0)) - -#define CCW_DEVICE_DEVTYPE(cu, cum, dev, devm) \ - .cu_type=(cu), .cu_model=(cum), .dev_type=(dev), .dev_model=(devm),\ - .match_flags=CCW_DEVICE_ID_MATCH_CU_TYPE \ - | ((cum) ? CCW_DEVICE_ID_MATCH_CU_MODEL : 0) \ - | CCW_DEVICE_ID_MATCH_DEVICE_TYPE \ - | ((devm) ? CCW_DEVICE_ID_MATCH_DEVICE_MODEL : 0) - -/* scan through an array of device ids and return the first - * entry that matches the device. - * - * the array must end with an entry containing zero match_flags - */ -static inline const struct ccw_device_id * -ccw_device_id_match(const struct ccw_device_id *array, - const struct ccw_device_id *match) -{ - const struct ccw_device_id *id = array; - - for (id = array; id->match_flags; id++) { - if ((id->match_flags & CCW_DEVICE_ID_MATCH_CU_TYPE) - && (id->cu_type != match->cu_type)) - continue; - - if ((id->match_flags & CCW_DEVICE_ID_MATCH_CU_MODEL) - && (id->cu_model != match->cu_model)) - continue; - - if ((id->match_flags & CCW_DEVICE_ID_MATCH_DEVICE_TYPE) - && (id->dev_type != match->dev_type)) - continue; - - if ((id->match_flags & CCW_DEVICE_ID_MATCH_DEVICE_MODEL) - && (id->dev_model != match->dev_model)) - continue; - - return id; - } - - return NULL; -} - -/** - * struct ccw_device - channel attached device - * @ccwlock: pointer to device lock - * @id: id of this device - * @drv: ccw driver for this device - * @dev: embedded device structure - * @online: online status of device - * @handler: interrupt handler - * - * @handler is a member of the device rather than the driver since a driver - * can have different interrupt handlers for different ccw devices - * (multi-subchannel drivers). - */ -struct ccw_device { - spinlock_t *ccwlock; -/* private: */ - struct ccw_device_private *private; /* cio private information */ -/* public: */ - struct ccw_device_id id; - struct ccw_driver *drv; - struct device dev; - int online; - void (*handler) (struct ccw_device *, unsigned long, struct irb *); -}; - - -/** - * struct ccw driver - device driver for channel attached devices - * @owner: owning module - * @ids: ids supported by this driver - * @probe: function called on probe - * @remove: function called on remove - * @set_online: called when setting device online - * @set_offline: called when setting device offline - * @notify: notify driver of device state changes - * @shutdown: called at device shutdown - * @driver: embedded device driver structure - * @name: device driver name - */ -struct ccw_driver { - struct module *owner; - struct ccw_device_id *ids; - int (*probe) (struct ccw_device *); - void (*remove) (struct ccw_device *); - int (*set_online) (struct ccw_device *); - int (*set_offline) (struct ccw_device *); - int (*notify) (struct ccw_device *, int); - void (*shutdown) (struct ccw_device *); - struct device_driver driver; - char *name; -}; - -extern struct ccw_device *get_ccwdev_by_busid(struct ccw_driver *cdrv, - const char *bus_id); - -/* devices drivers call these during module load and unload. - * When a driver is registered, its probe method is called - * when new devices for its type pop up */ -extern int ccw_driver_register (struct ccw_driver *driver); -extern void ccw_driver_unregister (struct ccw_driver *driver); - -struct ccw1; - -extern int ccw_device_set_options_mask(struct ccw_device *, unsigned long); -extern int ccw_device_set_options(struct ccw_device *, unsigned long); -extern void ccw_device_clear_options(struct ccw_device *, unsigned long); - -/* Allow for i/o completion notification after primary interrupt status. */ -#define CCWDEV_EARLY_NOTIFICATION 0x0001 -/* Report all interrupt conditions. */ -#define CCWDEV_REPORT_ALL 0x0002 -/* Try to perform path grouping. */ -#define CCWDEV_DO_PATHGROUP 0x0004 -/* Allow forced onlining of boxed devices. */ -#define CCWDEV_ALLOW_FORCE 0x0008 - -extern int ccw_device_start(struct ccw_device *, struct ccw1 *, - unsigned long, __u8, unsigned long); -extern int ccw_device_start_timeout(struct ccw_device *, struct ccw1 *, - unsigned long, __u8, unsigned long, int); -extern int ccw_device_start_key(struct ccw_device *, struct ccw1 *, - unsigned long, __u8, __u8, unsigned long); -extern int ccw_device_start_timeout_key(struct ccw_device *, struct ccw1 *, - unsigned long, __u8, __u8, - unsigned long, int); - - -extern int ccw_device_resume(struct ccw_device *); -extern int ccw_device_halt(struct ccw_device *, unsigned long); -extern int ccw_device_clear(struct ccw_device *, unsigned long); -int ccw_device_tm_start_key(struct ccw_device *cdev, struct tcw *tcw, - unsigned long intparm, u8 lpm, u8 key); -int ccw_device_tm_start_key(struct ccw_device *, struct tcw *, - unsigned long, u8, u8); -int ccw_device_tm_start_timeout_key(struct ccw_device *, struct tcw *, - unsigned long, u8, u8, int); -int ccw_device_tm_start(struct ccw_device *, struct tcw *, - unsigned long, u8); -int ccw_device_tm_start_timeout(struct ccw_device *, struct tcw *, - unsigned long, u8, int); -int ccw_device_tm_intrg(struct ccw_device *cdev); - -extern int ccw_device_set_online(struct ccw_device *cdev); -extern int ccw_device_set_offline(struct ccw_device *cdev); - - -extern struct ciw *ccw_device_get_ciw(struct ccw_device *, __u32 cmd); -extern __u8 ccw_device_get_path_mask(struct ccw_device *); -extern void ccw_device_get_id(struct ccw_device *, struct ccw_dev_id *); - -#define get_ccwdev_lock(x) (x)->ccwlock - -#define to_ccwdev(n) container_of(n, struct ccw_device, dev) -#define to_ccwdrv(n) container_of(n, struct ccw_driver, driver) - -extern struct ccw_device *ccw_device_probe_console(void); - -// FIXME: these have to go -extern int _ccw_device_get_subchannel_number(struct ccw_device *); - -extern void *ccw_device_get_chp_desc(struct ccw_device *, int); -#endif /* _S390_CCWDEV_H_ */ diff --git a/include/asm-s390/ccwgroup.h b/include/asm-s390/ccwgroup.h deleted file mode 100644 index a27f689..0000000 --- a/include/asm-s390/ccwgroup.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef S390_CCWGROUP_H -#define S390_CCWGROUP_H - -struct ccw_device; -struct ccw_driver; - -/** - * struct ccwgroup_device - ccw group device - * @creator_id: unique number of the driver - * @state: online/offline state - * @count: number of attached slave devices - * @dev: embedded device structure - * @cdev: variable number of slave devices, allocated as needed - */ -struct ccwgroup_device { - unsigned long creator_id; - enum { - CCWGROUP_OFFLINE, - CCWGROUP_ONLINE, - } state; -/* private: */ - atomic_t onoff; - struct mutex reg_mutex; -/* public: */ - unsigned int count; - struct device dev; - struct ccw_device *cdev[0]; -}; - -/** - * struct ccwgroup_driver - driver for ccw group devices - * @owner: driver owner - * @name: driver name - * @max_slaves: maximum number of slave devices - * @driver_id: unique id - * @probe: function called on probe - * @remove: function called on remove - * @set_online: function called when device is set online - * @set_offline: function called when device is set offline - * @shutdown: function called when device is shut down - * @driver: embedded driver structure - */ -struct ccwgroup_driver { - struct module *owner; - char *name; - int max_slaves; - unsigned long driver_id; - - int (*probe) (struct ccwgroup_device *); - void (*remove) (struct ccwgroup_device *); - int (*set_online) (struct ccwgroup_device *); - int (*set_offline) (struct ccwgroup_device *); - void (*shutdown)(struct ccwgroup_device *); - - struct device_driver driver; -}; - -extern int ccwgroup_driver_register (struct ccwgroup_driver *cdriver); -extern void ccwgroup_driver_unregister (struct ccwgroup_driver *cdriver); -int ccwgroup_create_from_string(struct device *root, unsigned int creator_id, - struct ccw_driver *cdrv, int num_devices, - const char *buf); - -extern int ccwgroup_probe_ccwdev(struct ccw_device *cdev); -extern void ccwgroup_remove_ccwdev(struct ccw_device *cdev); - -#define to_ccwgroupdev(x) container_of((x), struct ccwgroup_device, dev) -#define to_ccwgroupdrv(x) container_of((x), struct ccwgroup_driver, driver) -#endif diff --git a/include/asm-s390/checksum.h b/include/asm-s390/checksum.h deleted file mode 100644 index d5a8e7c..0000000 --- a/include/asm-s390/checksum.h +++ /dev/null @@ -1,166 +0,0 @@ -#ifndef _S390_CHECKSUM_H -#define _S390_CHECKSUM_H - -/* - * include/asm-s390/checksum.h - * S390 fast network checksum routines - * see also arch/S390/lib/checksum.c - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Ulrich Hild (first version) - * Martin Schwidefsky (heavily optimized CKSM version) - * D.J. Barrow (third attempt) - */ - -#include - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -static inline __wsum -csum_partial(const void *buff, int len, __wsum sum) -{ - register unsigned long reg2 asm("2") = (unsigned long) buff; - register unsigned long reg3 asm("3") = (unsigned long) len; - - asm volatile( - "0: cksm %0,%1\n" /* do checksum on longs */ - " jo 0b\n" - : "+d" (sum), "+d" (reg2), "+d" (reg3) : : "cc", "memory"); - return sum; -} - -/* - * the same as csum_partial_copy, but copies from user space. - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - * - * Copy from userspace and compute checksum. If we catch an exception - * then zero the rest of the buffer. - */ -static inline __wsum -csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, - int *err_ptr) -{ - int missing; - - missing = copy_from_user(dst, src, len); - if (missing) { - memset(dst + len - missing, 0, missing); - *err_ptr = -EFAULT; - } - - return csum_partial(dst, len, sum); -} - - -static inline __wsum -csum_partial_copy_nocheck (const void *src, void *dst, int len, __wsum sum) -{ - memcpy(dst,src,len); - return csum_partial(dst, len, sum); -} - -/* - * Fold a partial checksum without adding pseudo headers - */ -static inline __sum16 csum_fold(__wsum sum) -{ -#ifndef __s390x__ - register_pair rp; - - asm volatile( - " slr %N1,%N1\n" /* %0 = H L */ - " lr %1,%0\n" /* %0 = H L, %1 = H L 0 0 */ - " srdl %1,16\n" /* %0 = H L, %1 = 0 H L 0 */ - " alr %1,%N1\n" /* %0 = H L, %1 = L H L 0 */ - " alr %0,%1\n" /* %0 = H+L+C L+H */ - " srl %0,16\n" /* %0 = H+L+C */ - : "+&d" (sum), "=d" (rp) : : "cc"); -#else /* __s390x__ */ - asm volatile( - " sr 3,3\n" /* %0 = H*65536 + L */ - " lr 2,%0\n" /* %0 = H L, 2/3 = H L / 0 0 */ - " srdl 2,16\n" /* %0 = H L, 2/3 = 0 H / L 0 */ - " alr 2,3\n" /* %0 = H L, 2/3 = L H / L 0 */ - " alr %0,2\n" /* %0 = H+L+C L+H */ - " srl %0,16\n" /* %0 = H+L+C */ - : "+&d" (sum) : : "cc", "2", "3"); -#endif /* __s390x__ */ - return (__force __sum16) ~sum; -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - * - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - return csum_fold(csum_partial(iph, ihl*4, 0)); -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 32-bit checksum - */ -static inline __wsum -csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, unsigned short proto, - __wsum sum) -{ - __u32 csum = (__force __u32)sum; - - csum += (__force __u32)saddr; - if (csum < (__force __u32)saddr) - csum++; - - csum += (__force __u32)daddr; - if (csum < (__force __u32)daddr) - csum++; - - csum += len + proto; - if (csum < len + proto) - csum++; - - return (__force __wsum)csum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ - -static inline __sum16 -csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ - -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* _S390_CHECKSUM_H */ - - diff --git a/include/asm-s390/chpid.h b/include/asm-s390/chpid.h deleted file mode 100644 index dfe3c7f..0000000 --- a/include/asm-s390/chpid.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * drivers/s390/cio/chpid.h - * - * Copyright IBM Corp. 2007 - * Author(s): Peter Oberparleiter - */ - -#ifndef _ASM_S390_CHPID_H -#define _ASM_S390_CHPID_H _ASM_S390_CHPID_H - -#include -#include - -#define __MAX_CHPID 255 - -struct chp_id { - u8 reserved1; - u8 cssid; - u8 reserved2; - u8 id; -} __attribute__((packed)); - -#ifdef __KERNEL__ -#include - -static inline void chp_id_init(struct chp_id *chpid) -{ - memset(chpid, 0, sizeof(struct chp_id)); -} - -static inline int chp_id_is_equal(struct chp_id *a, struct chp_id *b) -{ - return (a->id == b->id) && (a->cssid == b->cssid); -} - -static inline void chp_id_next(struct chp_id *chpid) -{ - if (chpid->id < __MAX_CHPID) - chpid->id++; - else { - chpid->id = 0; - chpid->cssid++; - } -} - -static inline int chp_id_is_valid(struct chp_id *chpid) -{ - return (chpid->cssid <= __MAX_CSSID); -} - - -#define chp_id_for_each(c) \ - for (chp_id_init(c); chp_id_is_valid(c); chp_id_next(c)) -#endif /* __KERNEL */ - -#endif /* _ASM_S390_CHPID_H */ diff --git a/include/asm-s390/chsc.h b/include/asm-s390/chsc.h deleted file mode 100644 index d38d0cf..0000000 --- a/include/asm-s390/chsc.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * ioctl interface for /dev/chsc - * - * Copyright 2008 IBM Corp. - * Author(s): Cornelia Huck - */ - -#ifndef _ASM_CHSC_H -#define _ASM_CHSC_H - -#include -#include - -struct chsc_async_header { - __u16 length; - __u16 code; - __u32 cmd_dependend; - __u32 key : 4; - __u32 : 28; - struct subchannel_id sid; -} __attribute__ ((packed)); - -struct chsc_async_area { - struct chsc_async_header header; - __u8 data[PAGE_SIZE - 16 /* size of chsc_async_header */]; -} __attribute__ ((packed)); - - -struct chsc_response_struct { - __u16 length; - __u16 code; - __u32 parms; - __u8 data[PAGE_SIZE - 8]; -} __attribute__ ((packed)); - -struct chsc_chp_cd { - struct chp_id chpid; - int m; - int fmt; - struct chsc_response_struct cpcb; -}; - -struct chsc_cu_cd { - __u16 cun; - __u8 cssid; - int m; - int fmt; - struct chsc_response_struct cucb; -}; - -struct chsc_sch_cud { - struct subchannel_id schid; - int fmt; - struct chsc_response_struct scub; -}; - -struct conf_id { - int m; - __u8 cssid; - __u8 ssid; -}; - -struct chsc_conf_info { - struct conf_id id; - int fmt; - struct chsc_response_struct scid; -}; - -struct ccl_parm_chpid { - int m; - struct chp_id chp; -}; - -struct ccl_parm_cssids { - __u8 f_cssid; - __u8 l_cssid; -}; - -struct chsc_comp_list { - struct { - enum { - CCL_CU_ON_CHP = 1, - CCL_CHP_TYPE_CAP = 2, - CCL_CSS_IMG = 4, - CCL_CSS_IMG_CONF_CHAR = 5, - CCL_IOP_CHP = 6, - } ctype; - int fmt; - struct ccl_parm_chpid chpid; - struct ccl_parm_cssids cssids; - } req; - struct chsc_response_struct sccl; -}; - -struct chsc_dcal { - struct { - enum { - DCAL_CSS_IID_PN = 4, - } atype; - __u32 list_parm[2]; - int fmt; - } req; - struct chsc_response_struct sdcal; -}; - -struct chsc_cpd_info { - struct chp_id chpid; - int m; - int fmt; - int rfmt; - int c; - struct chsc_response_struct chpdb; -}; - -#define CHSC_IOCTL_MAGIC 'c' - -#define CHSC_START _IOWR(CHSC_IOCTL_MAGIC, 0x81, struct chsc_async_area) -#define CHSC_INFO_CHANNEL_PATH _IOWR(CHSC_IOCTL_MAGIC, 0x82, \ - struct chsc_chp_cd) -#define CHSC_INFO_CU _IOWR(CHSC_IOCTL_MAGIC, 0x83, struct chsc_cu_cd) -#define CHSC_INFO_SCH_CU _IOWR(CHSC_IOCTL_MAGIC, 0x84, struct chsc_sch_cud) -#define CHSC_INFO_CI _IOWR(CHSC_IOCTL_MAGIC, 0x85, struct chsc_conf_info) -#define CHSC_INFO_CCL _IOWR(CHSC_IOCTL_MAGIC, 0x86, struct chsc_comp_list) -#define CHSC_INFO_CPD _IOWR(CHSC_IOCTL_MAGIC, 0x87, struct chsc_cpd_info) -#define CHSC_INFO_DCAL _IOWR(CHSC_IOCTL_MAGIC, 0x88, struct chsc_dcal) - -#endif diff --git a/include/asm-s390/cio.h b/include/asm-s390/cio.h deleted file mode 100644 index 6dccb07..0000000 --- a/include/asm-s390/cio.h +++ /dev/null @@ -1,514 +0,0 @@ -/* - * include/asm-s390/cio.h - * include/asm-s390x/cio.h - * - * Common interface for I/O on S/390 - */ -#ifndef _ASM_S390_CIO_H_ -#define _ASM_S390_CIO_H_ - -#include -#include - -#ifdef __KERNEL__ - -#define LPM_ANYPATH 0xff -#define __MAX_CSSID 0 - -/** - * struct cmd_scsw - command-mode subchannel status word - * @key: subchannel key - * @sctl: suspend control - * @eswf: esw format - * @cc: deferred condition code - * @fmt: format - * @pfch: prefetch - * @isic: initial-status interruption control - * @alcc: address-limit checking control - * @ssi: suppress-suspended interruption - * @zcc: zero condition code - * @ectl: extended control - * @pno: path not operational - * @res: reserved - * @fctl: function control - * @actl: activity control - * @stctl: status control - * @cpa: channel program address - * @dstat: device status - * @cstat: subchannel status - * @count: residual count - */ -struct cmd_scsw { - __u32 key : 4; - __u32 sctl : 1; - __u32 eswf : 1; - __u32 cc : 2; - __u32 fmt : 1; - __u32 pfch : 1; - __u32 isic : 1; - __u32 alcc : 1; - __u32 ssi : 1; - __u32 zcc : 1; - __u32 ectl : 1; - __u32 pno : 1; - __u32 res : 1; - __u32 fctl : 3; - __u32 actl : 7; - __u32 stctl : 5; - __u32 cpa; - __u32 dstat : 8; - __u32 cstat : 8; - __u32 count : 16; -} __attribute__ ((packed)); - -/** - * struct tm_scsw - transport-mode subchannel status word - * @key: subchannel key - * @eswf: esw format - * @cc: deferred condition code - * @fmt: format - * @x: IRB-format control - * @q: interrogate-complete - * @ectl: extended control - * @pno: path not operational - * @fctl: function control - * @actl: activity control - * @stctl: status control - * @tcw: TCW address - * @dstat: device status - * @cstat: subchannel status - * @fcxs: FCX status - * @schxs: subchannel-extended status - */ -struct tm_scsw { - u32 key:4; - u32 :1; - u32 eswf:1; - u32 cc:2; - u32 fmt:3; - u32 x:1; - u32 q:1; - u32 :1; - u32 ectl:1; - u32 pno:1; - u32 :1; - u32 fctl:3; - u32 actl:7; - u32 stctl:5; - u32 tcw; - u32 dstat:8; - u32 cstat:8; - u32 fcxs:8; - u32 schxs:8; -} __attribute__ ((packed)); - -/** - * union scsw - subchannel status word - * @cmd: command-mode SCSW - * @tm: transport-mode SCSW - */ -union scsw { - struct cmd_scsw cmd; - struct tm_scsw tm; -} __attribute__ ((packed)); - -int scsw_is_tm(union scsw *scsw); -u32 scsw_key(union scsw *scsw); -u32 scsw_eswf(union scsw *scsw); -u32 scsw_cc(union scsw *scsw); -u32 scsw_ectl(union scsw *scsw); -u32 scsw_pno(union scsw *scsw); -u32 scsw_fctl(union scsw *scsw); -u32 scsw_actl(union scsw *scsw); -u32 scsw_stctl(union scsw *scsw); -u32 scsw_dstat(union scsw *scsw); -u32 scsw_cstat(union scsw *scsw); -int scsw_is_solicited(union scsw *scsw); -int scsw_is_valid_key(union scsw *scsw); -int scsw_is_valid_eswf(union scsw *scsw); -int scsw_is_valid_cc(union scsw *scsw); -int scsw_is_valid_ectl(union scsw *scsw); -int scsw_is_valid_pno(union scsw *scsw); -int scsw_is_valid_fctl(union scsw *scsw); -int scsw_is_valid_actl(union scsw *scsw); -int scsw_is_valid_stctl(union scsw *scsw); -int scsw_is_valid_dstat(union scsw *scsw); -int scsw_is_valid_cstat(union scsw *scsw); -int scsw_cmd_is_valid_key(union scsw *scsw); -int scsw_cmd_is_valid_sctl(union scsw *scsw); -int scsw_cmd_is_valid_eswf(union scsw *scsw); -int scsw_cmd_is_valid_cc(union scsw *scsw); -int scsw_cmd_is_valid_fmt(union scsw *scsw); -int scsw_cmd_is_valid_pfch(union scsw *scsw); -int scsw_cmd_is_valid_isic(union scsw *scsw); -int scsw_cmd_is_valid_alcc(union scsw *scsw); -int scsw_cmd_is_valid_ssi(union scsw *scsw); -int scsw_cmd_is_valid_zcc(union scsw *scsw); -int scsw_cmd_is_valid_ectl(union scsw *scsw); -int scsw_cmd_is_valid_pno(union scsw *scsw); -int scsw_cmd_is_valid_fctl(union scsw *scsw); -int scsw_cmd_is_valid_actl(union scsw *scsw); -int scsw_cmd_is_valid_stctl(union scsw *scsw); -int scsw_cmd_is_valid_dstat(union scsw *scsw); -int scsw_cmd_is_valid_cstat(union scsw *scsw); -int scsw_cmd_is_solicited(union scsw *scsw); -int scsw_tm_is_valid_key(union scsw *scsw); -int scsw_tm_is_valid_eswf(union scsw *scsw); -int scsw_tm_is_valid_cc(union scsw *scsw); -int scsw_tm_is_valid_fmt(union scsw *scsw); -int scsw_tm_is_valid_x(union scsw *scsw); -int scsw_tm_is_valid_q(union scsw *scsw); -int scsw_tm_is_valid_ectl(union scsw *scsw); -int scsw_tm_is_valid_pno(union scsw *scsw); -int scsw_tm_is_valid_fctl(union scsw *scsw); -int scsw_tm_is_valid_actl(union scsw *scsw); -int scsw_tm_is_valid_stctl(union scsw *scsw); -int scsw_tm_is_valid_dstat(union scsw *scsw); -int scsw_tm_is_valid_cstat(union scsw *scsw); -int scsw_tm_is_valid_fcxs(union scsw *scsw); -int scsw_tm_is_valid_schxs(union scsw *scsw); -int scsw_tm_is_solicited(union scsw *scsw); - -#define SCSW_FCTL_CLEAR_FUNC 0x1 -#define SCSW_FCTL_HALT_FUNC 0x2 -#define SCSW_FCTL_START_FUNC 0x4 - -#define SCSW_ACTL_SUSPENDED 0x1 -#define SCSW_ACTL_DEVACT 0x2 -#define SCSW_ACTL_SCHACT 0x4 -#define SCSW_ACTL_CLEAR_PEND 0x8 -#define SCSW_ACTL_HALT_PEND 0x10 -#define SCSW_ACTL_START_PEND 0x20 -#define SCSW_ACTL_RESUME_PEND 0x40 - -#define SCSW_STCTL_STATUS_PEND 0x1 -#define SCSW_STCTL_SEC_STATUS 0x2 -#define SCSW_STCTL_PRIM_STATUS 0x4 -#define SCSW_STCTL_INTER_STATUS 0x8 -#define SCSW_STCTL_ALERT_STATUS 0x10 - -#define DEV_STAT_ATTENTION 0x80 -#define DEV_STAT_STAT_MOD 0x40 -#define DEV_STAT_CU_END 0x20 -#define DEV_STAT_BUSY 0x10 -#define DEV_STAT_CHN_END 0x08 -#define DEV_STAT_DEV_END 0x04 -#define DEV_STAT_UNIT_CHECK 0x02 -#define DEV_STAT_UNIT_EXCEP 0x01 - -#define SCHN_STAT_PCI 0x80 -#define SCHN_STAT_INCORR_LEN 0x40 -#define SCHN_STAT_PROG_CHECK 0x20 -#define SCHN_STAT_PROT_CHECK 0x10 -#define SCHN_STAT_CHN_DATA_CHK 0x08 -#define SCHN_STAT_CHN_CTRL_CHK 0x04 -#define SCHN_STAT_INTF_CTRL_CHK 0x02 -#define SCHN_STAT_CHAIN_CHECK 0x01 - -/* - * architectured values for first sense byte - */ -#define SNS0_CMD_REJECT 0x80 -#define SNS_CMD_REJECT SNS0_CMD_REJEC -#define SNS0_INTERVENTION_REQ 0x40 -#define SNS0_BUS_OUT_CHECK 0x20 -#define SNS0_EQUIPMENT_CHECK 0x10 -#define SNS0_DATA_CHECK 0x08 -#define SNS0_OVERRUN 0x04 -#define SNS0_INCOMPL_DOMAIN 0x01 - -/* - * architectured values for second sense byte - */ -#define SNS1_PERM_ERR 0x80 -#define SNS1_INV_TRACK_FORMAT 0x40 -#define SNS1_EOC 0x20 -#define SNS1_MESSAGE_TO_OPER 0x10 -#define SNS1_NO_REC_FOUND 0x08 -#define SNS1_FILE_PROTECTED 0x04 -#define SNS1_WRITE_INHIBITED 0x02 -#define SNS1_INPRECISE_END 0x01 - -/* - * architectured values for third sense byte - */ -#define SNS2_REQ_INH_WRITE 0x80 -#define SNS2_CORRECTABLE 0x40 -#define SNS2_FIRST_LOG_ERR 0x20 -#define SNS2_ENV_DATA_PRESENT 0x10 -#define SNS2_INPRECISE_END 0x04 - -/** - * struct ccw1 - channel command word - * @cmd_code: command code - * @flags: flags, like IDA adressing, etc. - * @count: byte count - * @cda: data address - * - * The ccw is the basic structure to build channel programs that perform - * operations with the device or the control unit. Only Format-1 channel - * command words are supported. - */ -struct ccw1 { - __u8 cmd_code; - __u8 flags; - __u16 count; - __u32 cda; -} __attribute__ ((packed,aligned(8))); - -#define CCW_FLAG_DC 0x80 -#define CCW_FLAG_CC 0x40 -#define CCW_FLAG_SLI 0x20 -#define CCW_FLAG_SKIP 0x10 -#define CCW_FLAG_PCI 0x08 -#define CCW_FLAG_IDA 0x04 -#define CCW_FLAG_SUSPEND 0x02 - -#define CCW_CMD_READ_IPL 0x02 -#define CCW_CMD_NOOP 0x03 -#define CCW_CMD_BASIC_SENSE 0x04 -#define CCW_CMD_TIC 0x08 -#define CCW_CMD_STLCK 0x14 -#define CCW_CMD_SENSE_PGID 0x34 -#define CCW_CMD_SUSPEND_RECONN 0x5B -#define CCW_CMD_RDC 0x64 -#define CCW_CMD_RELEASE 0x94 -#define CCW_CMD_SET_PGID 0xAF -#define CCW_CMD_SENSE_ID 0xE4 -#define CCW_CMD_DCTL 0xF3 - -#define SENSE_MAX_COUNT 0x20 - -/** - * struct erw - extended report word - * @res0: reserved - * @auth: authorization check - * @pvrf: path-verification-required flag - * @cpt: channel-path timeout - * @fsavf: failing storage address validity flag - * @cons: concurrent sense - * @scavf: secondary ccw address validity flag - * @fsaf: failing storage address format - * @scnt: sense count, if @cons == %1 - * @res16: reserved - */ -struct erw { - __u32 res0 : 3; - __u32 auth : 1; - __u32 pvrf : 1; - __u32 cpt : 1; - __u32 fsavf : 1; - __u32 cons : 1; - __u32 scavf : 1; - __u32 fsaf : 1; - __u32 scnt : 6; - __u32 res16 : 16; -} __attribute__ ((packed)); - -/** - * struct sublog - subchannel logout area - * @res0: reserved - * @esf: extended status flags - * @lpum: last path used mask - * @arep: ancillary report - * @fvf: field-validity flags - * @sacc: storage access code - * @termc: termination code - * @devsc: device-status check - * @serr: secondary error - * @ioerr: i/o-error alert - * @seqc: sequence code - */ -struct sublog { - __u32 res0 : 1; - __u32 esf : 7; - __u32 lpum : 8; - __u32 arep : 1; - __u32 fvf : 5; - __u32 sacc : 2; - __u32 termc : 2; - __u32 devsc : 1; - __u32 serr : 1; - __u32 ioerr : 1; - __u32 seqc : 3; -} __attribute__ ((packed)); - -/** - * struct esw0 - Format 0 Extended Status Word (ESW) - * @sublog: subchannel logout - * @erw: extended report word - * @faddr: failing storage address - * @saddr: secondary ccw address - */ -struct esw0 { - struct sublog sublog; - struct erw erw; - __u32 faddr[2]; - __u32 saddr; -} __attribute__ ((packed)); - -/** - * struct esw1 - Format 1 Extended Status Word (ESW) - * @zero0: reserved zeros - * @lpum: last path used mask - * @zero16: reserved zeros - * @erw: extended report word - * @zeros: three fullwords of zeros - */ -struct esw1 { - __u8 zero0; - __u8 lpum; - __u16 zero16; - struct erw erw; - __u32 zeros[3]; -} __attribute__ ((packed)); - -/** - * struct esw2 - Format 2 Extended Status Word (ESW) - * @zero0: reserved zeros - * @lpum: last path used mask - * @dcti: device-connect-time interval - * @erw: extended report word - * @zeros: three fullwords of zeros - */ -struct esw2 { - __u8 zero0; - __u8 lpum; - __u16 dcti; - struct erw erw; - __u32 zeros[3]; -} __attribute__ ((packed)); - -/** - * struct esw3 - Format 3 Extended Status Word (ESW) - * @zero0: reserved zeros - * @lpum: last path used mask - * @res: reserved - * @erw: extended report word - * @zeros: three fullwords of zeros - */ -struct esw3 { - __u8 zero0; - __u8 lpum; - __u16 res; - struct erw erw; - __u32 zeros[3]; -} __attribute__ ((packed)); - -/** - * struct irb - interruption response block - * @scsw: subchannel status word - * @esw: extened status word, 4 formats - * @ecw: extended control word - * - * The irb that is handed to the device driver when an interrupt occurs. For - * solicited interrupts, the common I/O layer already performs checks whether - * a field is valid; a field not being valid is always passed as %0. - * If a unit check occured, @ecw may contain sense data; this is retrieved - * by the common I/O layer itself if the device doesn't support concurrent - * sense (so that the device driver never needs to perform basic sene itself). - * For unsolicited interrupts, the irb is passed as-is (expect for sense data, - * if applicable). - */ -struct irb { - union scsw scsw; - union { - struct esw0 esw0; - struct esw1 esw1; - struct esw2 esw2; - struct esw3 esw3; - } esw; - __u8 ecw[32]; -} __attribute__ ((packed,aligned(4))); - -/** - * struct ciw - command information word (CIW) layout - * @et: entry type - * @reserved: reserved bits - * @ct: command type - * @cmd: command code - * @count: command count - */ -struct ciw { - __u32 et : 2; - __u32 reserved : 2; - __u32 ct : 4; - __u32 cmd : 8; - __u32 count : 16; -} __attribute__ ((packed)); - -#define CIW_TYPE_RCD 0x0 /* read configuration data */ -#define CIW_TYPE_SII 0x1 /* set interface identifier */ -#define CIW_TYPE_RNI 0x2 /* read node identifier */ - -/* - * Flags used as input parameters for do_IO() - */ -#define DOIO_ALLOW_SUSPEND 0x0001 /* allow for channel prog. suspend */ -#define DOIO_DENY_PREFETCH 0x0002 /* don't allow for CCW prefetch */ -#define DOIO_SUPPRESS_INTER 0x0004 /* suppress intermediate inter. */ - /* ... for suspended CCWs */ -/* Device or subchannel gone. */ -#define CIO_GONE 0x0001 -/* No path to device. */ -#define CIO_NO_PATH 0x0002 -/* Device has appeared. */ -#define CIO_OPER 0x0004 -/* Sick revalidation of device. */ -#define CIO_REVALIDATE 0x0008 - -/** - * struct ccw_dev_id - unique identifier for ccw devices - * @ssid: subchannel set id - * @devno: device number - * - * This structure is not directly based on any hardware structure. The - * hardware identifies a device by its device number and its subchannel, - * which is in turn identified by its id. In order to get a unique identifier - * for ccw devices across subchannel sets, @struct ccw_dev_id has been - * introduced. - */ -struct ccw_dev_id { - u8 ssid; - u16 devno; -}; - -/** - * ccw_device_id_is_equal() - compare two ccw_dev_ids - * @dev_id1: a ccw_dev_id - * @dev_id2: another ccw_dev_id - * Returns: - * %1 if the two structures are equal field-by-field, - * %0 if not. - * Context: - * any - */ -static inline int ccw_dev_id_is_equal(struct ccw_dev_id *dev_id1, - struct ccw_dev_id *dev_id2) -{ - if ((dev_id1->ssid == dev_id2->ssid) && - (dev_id1->devno == dev_id2->devno)) - return 1; - return 0; -} - -extern void wait_cons_dev(void); - -extern void css_schedule_reprobe(void); - -extern void reipl_ccw_dev(struct ccw_dev_id *id); - -struct cio_iplinfo { - u16 devno; - int is_qdio; -}; - -extern int cio_get_iplinfo(struct cio_iplinfo *iplinfo); - -/* Function from drivers/s390/cio/chsc.c */ -int chsc_sstpc(void *page, unsigned int op, u16 ctrl); -int chsc_sstpi(void *page, void *result, size_t size); - -#endif - -#endif diff --git a/include/asm-s390/cmb.h b/include/asm-s390/cmb.h deleted file mode 100644 index 5019685..0000000 --- a/include/asm-s390/cmb.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef S390_CMB_H -#define S390_CMB_H -/** - * struct cmbdata - channel measurement block data for user space - * @size: size of the stored data - * @elapsed_time: time since last sampling - * @ssch_rsch_count: number of ssch and rsch - * @sample_count: number of samples - * @device_connect_time: time of device connect - * @function_pending_time: time of function pending - * @device_disconnect_time: time of device disconnect - * @control_unit_queuing_time: time of control unit queuing - * @device_active_only_time: time of device active only - * @device_busy_time: time of device busy (ext. format) - * @initial_command_response_time: initial command response time (ext. format) - * - * All values are stored as 64 bit for simplicity, especially - * in 32 bit emulation mode. All time values are normalized to - * nanoseconds. - * Currently, two formats are known, which differ by the size of - * this structure, i.e. the last two members are only set when - * the extended channel measurement facility (first shipped in - * z990 machines) is activated. - * Potentially, more fields could be added, which would result in a - * new ioctl number. - */ -struct cmbdata { - __u64 size; - __u64 elapsed_time; - /* basic and exended format: */ - __u64 ssch_rsch_count; - __u64 sample_count; - __u64 device_connect_time; - __u64 function_pending_time; - __u64 device_disconnect_time; - __u64 control_unit_queuing_time; - __u64 device_active_only_time; - /* extended format only: */ - __u64 device_busy_time; - __u64 initial_command_response_time; -}; - -/* enable channel measurement */ -#define BIODASDCMFENABLE _IO(DASD_IOCTL_LETTER, 32) -/* enable channel measurement */ -#define BIODASDCMFDISABLE _IO(DASD_IOCTL_LETTER, 33) -/* read channel measurement data */ -#define BIODASDREADALLCMB _IOWR(DASD_IOCTL_LETTER, 33, struct cmbdata) - -#ifdef __KERNEL__ -struct ccw_device; -extern int enable_cmf(struct ccw_device *cdev); -extern int disable_cmf(struct ccw_device *cdev); -extern u64 cmf_read(struct ccw_device *cdev, int index); -extern int cmf_readall(struct ccw_device *cdev, struct cmbdata *data); - -#endif /* __KERNEL__ */ -#endif /* S390_CMB_H */ diff --git a/include/asm-s390/compat.h b/include/asm-s390/compat.h deleted file mode 100644 index de065b3..0000000 --- a/include/asm-s390/compat.h +++ /dev/null @@ -1,233 +0,0 @@ -#ifndef _ASM_S390X_COMPAT_H -#define _ASM_S390X_COMPAT_H -/* - * Architecture specific compatibility types - */ -#include -#include - -#define PSW32_MASK_PER 0x40000000UL -#define PSW32_MASK_DAT 0x04000000UL -#define PSW32_MASK_IO 0x02000000UL -#define PSW32_MASK_EXT 0x01000000UL -#define PSW32_MASK_KEY 0x00F00000UL -#define PSW32_MASK_MCHECK 0x00040000UL -#define PSW32_MASK_WAIT 0x00020000UL -#define PSW32_MASK_PSTATE 0x00010000UL -#define PSW32_MASK_ASC 0x0000C000UL -#define PSW32_MASK_CC 0x00003000UL -#define PSW32_MASK_PM 0x00000f00UL - -#define PSW32_ADDR_AMODE31 0x80000000UL -#define PSW32_ADDR_INSN 0x7FFFFFFFUL - -#define PSW32_BASE_BITS 0x00080000UL - -#define PSW32_ASC_PRIMARY 0x00000000UL -#define PSW32_ASC_ACCREG 0x00004000UL -#define PSW32_ASC_SECONDARY 0x00008000UL -#define PSW32_ASC_HOME 0x0000C000UL - -#define PSW32_MASK_MERGE(CURRENT,NEW) \ - (((CURRENT) & ~(PSW32_MASK_CC|PSW32_MASK_PM)) | \ - ((NEW) & (PSW32_MASK_CC|PSW32_MASK_PM))) - -extern long psw32_user_bits; - -#define COMPAT_USER_HZ 100 - -typedef u32 compat_size_t; -typedef s32 compat_ssize_t; -typedef s32 compat_time_t; -typedef s32 compat_clock_t; -typedef s32 compat_pid_t; -typedef u16 __compat_uid_t; -typedef u16 __compat_gid_t; -typedef u32 __compat_uid32_t; -typedef u32 __compat_gid32_t; -typedef u16 compat_mode_t; -typedef u32 compat_ino_t; -typedef u16 compat_dev_t; -typedef s32 compat_off_t; -typedef s64 compat_loff_t; -typedef u16 compat_nlink_t; -typedef u16 compat_ipc_pid_t; -typedef s32 compat_daddr_t; -typedef u32 compat_caddr_t; -typedef __kernel_fsid_t compat_fsid_t; -typedef s32 compat_key_t; -typedef s32 compat_timer_t; - -typedef s32 compat_int_t; -typedef s32 compat_long_t; -typedef s64 compat_s64; -typedef u32 compat_uint_t; -typedef u32 compat_ulong_t; -typedef u64 compat_u64; - -struct compat_timespec { - compat_time_t tv_sec; - s32 tv_nsec; -}; - -struct compat_timeval { - compat_time_t tv_sec; - s32 tv_usec; -}; - -struct compat_stat { - compat_dev_t st_dev; - u16 __pad1; - compat_ino_t st_ino; - compat_mode_t st_mode; - compat_nlink_t st_nlink; - __compat_uid_t st_uid; - __compat_gid_t st_gid; - compat_dev_t st_rdev; - u16 __pad2; - u32 st_size; - u32 st_blksize; - u32 st_blocks; - u32 st_atime; - u32 st_atime_nsec; - u32 st_mtime; - u32 st_mtime_nsec; - u32 st_ctime; - u32 st_ctime_nsec; - u32 __unused4; - u32 __unused5; -}; - -struct compat_flock { - short l_type; - short l_whence; - compat_off_t l_start; - compat_off_t l_len; - compat_pid_t l_pid; -}; - -#define F_GETLK64 12 -#define F_SETLK64 13 -#define F_SETLKW64 14 - -struct compat_flock64 { - short l_type; - short l_whence; - compat_loff_t l_start; - compat_loff_t l_len; - compat_pid_t l_pid; -}; - -struct compat_statfs { - s32 f_type; - s32 f_bsize; - s32 f_blocks; - s32 f_bfree; - s32 f_bavail; - s32 f_files; - s32 f_ffree; - compat_fsid_t f_fsid; - s32 f_namelen; - s32 f_frsize; - s32 f_spare[6]; -}; - -#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff -#define COMPAT_RLIM_INFINITY 0xffffffff - -typedef u32 compat_old_sigset_t; /* at least 32 bits */ - -#define _COMPAT_NSIG 64 -#define _COMPAT_NSIG_BPW 32 - -typedef u32 compat_sigset_word; - -#define COMPAT_OFF_T_MAX 0x7fffffff -#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL - -/* - * A pointer passed in from user mode. This should not - * be used for syscall parameters, just declare them - * as pointers because the syscall entry code will have - * appropriately converted them already. - */ -typedef u32 compat_uptr_t; - -static inline void __user *compat_ptr(compat_uptr_t uptr) -{ - return (void __user *)(unsigned long)(uptr & 0x7fffffffUL); -} - -static inline compat_uptr_t ptr_to_compat(void __user *uptr) -{ - return (u32)(unsigned long)uptr; -} - -static inline void __user *compat_alloc_user_space(long len) -{ - unsigned long stack; - - stack = KSTK_ESP(current); - if (test_thread_flag(TIF_31BIT)) - stack &= 0x7fffffffUL; - return (void __user *) (stack - len); -} - -struct compat_ipc64_perm { - compat_key_t key; - __compat_uid32_t uid; - __compat_gid32_t gid; - __compat_uid32_t cuid; - __compat_gid32_t cgid; - compat_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - unsigned int __unused1; - unsigned int __unused2; -}; - -struct compat_semid64_ds { - struct compat_ipc64_perm sem_perm; - compat_time_t sem_otime; - compat_ulong_t __pad1; - compat_time_t sem_ctime; - compat_ulong_t __pad2; - compat_ulong_t sem_nsems; - compat_ulong_t __unused1; - compat_ulong_t __unused2; -}; - -struct compat_msqid64_ds { - struct compat_ipc64_perm msg_perm; - compat_time_t msg_stime; - compat_ulong_t __pad1; - compat_time_t msg_rtime; - compat_ulong_t __pad2; - compat_time_t msg_ctime; - compat_ulong_t __pad3; - compat_ulong_t msg_cbytes; - compat_ulong_t msg_qnum; - compat_ulong_t msg_qbytes; - compat_pid_t msg_lspid; - compat_pid_t msg_lrpid; - compat_ulong_t __unused1; - compat_ulong_t __unused2; -}; - -struct compat_shmid64_ds { - struct compat_ipc64_perm shm_perm; - compat_size_t shm_segsz; - compat_time_t shm_atime; - compat_ulong_t __pad1; - compat_time_t shm_dtime; - compat_ulong_t __pad2; - compat_time_t shm_ctime; - compat_ulong_t __pad3; - compat_pid_t shm_cpid; - compat_pid_t shm_lpid; - compat_ulong_t shm_nattch; - compat_ulong_t __unused1; - compat_ulong_t __unused2; -}; -#endif /* _ASM_S390X_COMPAT_H */ diff --git a/include/asm-s390/cpcmd.h b/include/asm-s390/cpcmd.h deleted file mode 100644 index 48a9eab..0000000 --- a/include/asm-s390/cpcmd.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * arch/s390/kernel/cpcmd.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), - * Christian Borntraeger (cborntra@de.ibm.com), - */ - -#ifndef _ASM_S390_CPCMD_H -#define _ASM_S390_CPCMD_H - -/* - * the lowlevel function for cpcmd - * the caller of __cpcmd has to ensure that the response buffer is below 2 GB - */ -extern int __cpcmd(const char *cmd, char *response, int rlen, int *response_code); - -/* - * cpcmd is the in-kernel interface for issuing CP commands - * - * cmd: null-terminated command string, max 240 characters - * response: response buffer for VM's textual response - * rlen: size of the response buffer, cpcmd will not exceed this size - * but will cap the output, if its too large. Everything that - * did not fit into the buffer will be silently dropped - * response_code: return pointer for VM's error code - * return value: the size of the response. The caller can check if the buffer - * was large enough by comparing the return value and rlen - * NOTE: If the response buffer is not below 2 GB, cpcmd can sleep - */ -extern int cpcmd(const char *cmd, char *response, int rlen, int *response_code); - -#endif /* _ASM_S390_CPCMD_H */ diff --git a/include/asm-s390/cpu.h b/include/asm-s390/cpu.h deleted file mode 100644 index e5a6a9b..0000000 --- a/include/asm-s390/cpu.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-s390/cpu.h - * - * Copyright IBM Corp. 2007 - * Author(s): Heiko Carstens - */ - -#ifndef _ASM_S390_CPU_H_ -#define _ASM_S390_CPU_H_ - -#include -#include -#include - -struct s390_idle_data { - spinlock_t lock; - unsigned int in_idle; - unsigned long long idle_count; - unsigned long long idle_enter; - unsigned long long idle_time; -}; - -DECLARE_PER_CPU(struct s390_idle_data, s390_idle); - -void s390_idle_leave(void); - -static inline void s390_idle_check(void) -{ - if ((&__get_cpu_var(s390_idle))->in_idle) - s390_idle_leave(); -} - -#endif /* _ASM_S390_CPU_H_ */ diff --git a/include/asm-s390/cputime.h b/include/asm-s390/cputime.h deleted file mode 100644 index 133ce05..0000000 --- a/include/asm-s390/cputime.h +++ /dev/null @@ -1,177 +0,0 @@ -/* - * include/asm-s390/cputime.h - * - * (C) Copyright IBM Corp. 2004 - * - * Author: Martin Schwidefsky - */ - -#ifndef _S390_CPUTIME_H -#define _S390_CPUTIME_H - -#include - -/* We want to use micro-second resolution. */ - -typedef unsigned long long cputime_t; -typedef unsigned long long cputime64_t; - -#ifndef __s390x__ - -static inline unsigned int -__div(unsigned long long n, unsigned int base) -{ - register_pair rp; - - rp.pair = n >> 1; - asm ("dr %0,%1" : "+d" (rp) : "d" (base >> 1)); - return rp.subreg.odd; -} - -#else /* __s390x__ */ - -static inline unsigned int -__div(unsigned long long n, unsigned int base) -{ - return n / base; -} - -#endif /* __s390x__ */ - -#define cputime_zero (0ULL) -#define cputime_max ((~0UL >> 1) - 1) -#define cputime_add(__a, __b) ((__a) + (__b)) -#define cputime_sub(__a, __b) ((__a) - (__b)) -#define cputime_div(__a, __n) ({ \ - unsigned long long __div = (__a); \ - do_div(__div,__n); \ - __div; \ -}) -#define cputime_halve(__a) ((__a) >> 1) -#define cputime_eq(__a, __b) ((__a) == (__b)) -#define cputime_gt(__a, __b) ((__a) > (__b)) -#define cputime_ge(__a, __b) ((__a) >= (__b)) -#define cputime_lt(__a, __b) ((__a) < (__b)) -#define cputime_le(__a, __b) ((__a) <= (__b)) -#define cputime_to_jiffies(__ct) (__div((__ct), 1000000 / HZ)) -#define cputime_to_scaled(__ct) (__ct) -#define jiffies_to_cputime(__hz) ((cputime_t)(__hz) * (1000000 / HZ)) - -#define cputime64_zero (0ULL) -#define cputime64_add(__a, __b) ((__a) + (__b)) -#define cputime_to_cputime64(__ct) (__ct) - -static inline u64 -cputime64_to_jiffies64(cputime64_t cputime) -{ - do_div(cputime, 1000000 / HZ); - return cputime; -} - -/* - * Convert cputime to milliseconds and back. - */ -static inline unsigned int -cputime_to_msecs(const cputime_t cputime) -{ - return __div(cputime, 1000); -} - -static inline cputime_t -msecs_to_cputime(const unsigned int m) -{ - return (cputime_t) m * 1000; -} - -/* - * Convert cputime to milliseconds and back. - */ -static inline unsigned int -cputime_to_secs(const cputime_t cputime) -{ - return __div(cputime, 1000000); -} - -static inline cputime_t -secs_to_cputime(const unsigned int s) -{ - return (cputime_t) s * 1000000; -} - -/* - * Convert cputime to timespec and back. - */ -static inline cputime_t -timespec_to_cputime(const struct timespec *value) -{ - return value->tv_nsec / 1000 + (u64) value->tv_sec * 1000000; -} - -static inline void -cputime_to_timespec(const cputime_t cputime, struct timespec *value) -{ -#ifndef __s390x__ - register_pair rp; - - rp.pair = cputime >> 1; - asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1)); - value->tv_nsec = rp.subreg.even * 1000; - value->tv_sec = rp.subreg.odd; -#else - value->tv_nsec = (cputime % 1000000) * 1000; - value->tv_sec = cputime / 1000000; -#endif -} - -/* - * Convert cputime to timeval and back. - * Since cputime and timeval have the same resolution (microseconds) - * this is easy. - */ -static inline cputime_t -timeval_to_cputime(const struct timeval *value) -{ - return value->tv_usec + (u64) value->tv_sec * 1000000; -} - -static inline void -cputime_to_timeval(const cputime_t cputime, struct timeval *value) -{ -#ifndef __s390x__ - register_pair rp; - - rp.pair = cputime >> 1; - asm ("dr %0,%1" : "+d" (rp) : "d" (1000000 >> 1)); - value->tv_usec = rp.subreg.even; - value->tv_sec = rp.subreg.odd; -#else - value->tv_usec = cputime % 1000000; - value->tv_sec = cputime / 1000000; -#endif -} - -/* - * Convert cputime to clock and back. - */ -static inline clock_t -cputime_to_clock_t(cputime_t cputime) -{ - return __div(cputime, 1000000 / USER_HZ); -} - -static inline cputime_t -clock_t_to_cputime(unsigned long x) -{ - return (cputime_t) x * (1000000 / USER_HZ); -} - -/* - * Convert cputime64 to clock. - */ -static inline clock_t -cputime64_to_clock_t(cputime64_t cputime) -{ - return __div(cputime, 1000000 / USER_HZ); -} - -#endif /* _S390_CPUTIME_H */ diff --git a/include/asm-s390/current.h b/include/asm-s390/current.h deleted file mode 100644 index 83cf36c..0000000 --- a/include/asm-s390/current.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * include/asm-s390/current.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/current.h" - */ - -#ifndef _S390_CURRENT_H -#define _S390_CURRENT_H - -#ifdef __KERNEL__ -#include - -struct task_struct; - -#define current ((struct task_struct *const)S390_lowcore.current_task) - -#endif - -#endif /* !(_S390_CURRENT_H) */ diff --git a/include/asm-s390/dasd.h b/include/asm-s390/dasd.h deleted file mode 100644 index 3f002e1..0000000 --- a/include/asm-s390/dasd.h +++ /dev/null @@ -1,270 +0,0 @@ -/* - * File...........: linux/drivers/s390/block/dasd.c - * Author(s)......: Holger Smolinski - * Bugreports.to..: - * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 - * - * This file is the interface of the DASD device driver, which is exported to user space - * any future changes wrt the API will result in a change of the APIVERSION reported - * to userspace by the DASDAPIVER-ioctl - * - */ - -#ifndef DASD_H -#define DASD_H -#include - -#define DASD_IOCTL_LETTER 'D' - -#define DASD_API_VERSION 6 - -/* - * struct dasd_information2_t - * represents any data about the device, which is visible to userspace. - * including foramt and featueres. - */ -typedef struct dasd_information2_t { - unsigned int devno; /* S/390 devno */ - unsigned int real_devno; /* for aliases */ - unsigned int schid; /* S/390 subchannel identifier */ - unsigned int cu_type : 16; /* from SenseID */ - unsigned int cu_model : 8; /* from SenseID */ - unsigned int dev_type : 16; /* from SenseID */ - unsigned int dev_model : 8; /* from SenseID */ - unsigned int open_count; - unsigned int req_queue_len; - unsigned int chanq_len; /* length of chanq */ - char type[4]; /* from discipline.name, 'none' for unknown */ - unsigned int status; /* current device level */ - unsigned int label_block; /* where to find the VOLSER */ - unsigned int FBA_layout; /* fixed block size (like AIXVOL) */ - unsigned int characteristics_size; - unsigned int confdata_size; - char characteristics[64]; /* from read_device_characteristics */ - char configuration_data[256]; /* from read_configuration_data */ - unsigned int format; /* format info like formatted/cdl/ldl/... */ - unsigned int features; /* dasd features like 'ro',... */ - unsigned int reserved0; /* reserved for further use ,... */ - unsigned int reserved1; /* reserved for further use ,... */ - unsigned int reserved2; /* reserved for further use ,... */ - unsigned int reserved3; /* reserved for further use ,... */ - unsigned int reserved4; /* reserved for further use ,... */ - unsigned int reserved5; /* reserved for further use ,... */ - unsigned int reserved6; /* reserved for further use ,... */ - unsigned int reserved7; /* reserved for further use ,... */ -} dasd_information2_t; - -/* - * values to be used for dasd_information_t.format - * 0x00: NOT formatted - * 0x01: Linux disc layout - * 0x02: Common disc layout - */ -#define DASD_FORMAT_NONE 0 -#define DASD_FORMAT_LDL 1 -#define DASD_FORMAT_CDL 2 -/* - * values to be used for dasd_information_t.features - * 0x00: default features - * 0x01: readonly (ro) - * 0x02: use diag discipline (diag) - * 0x04: set the device initially online (internal use only) - * 0x08: enable ERP related logging - */ -#define DASD_FEATURE_DEFAULT 0x00 -#define DASD_FEATURE_READONLY 0x01 -#define DASD_FEATURE_USEDIAG 0x02 -#define DASD_FEATURE_INITIAL_ONLINE 0x04 -#define DASD_FEATURE_ERPLOG 0x08 - -#define DASD_PARTN_BITS 2 - -/* - * struct dasd_information_t - * represents any data about the data, which is visible to userspace - */ -typedef struct dasd_information_t { - unsigned int devno; /* S/390 devno */ - unsigned int real_devno; /* for aliases */ - unsigned int schid; /* S/390 subchannel identifier */ - unsigned int cu_type : 16; /* from SenseID */ - unsigned int cu_model : 8; /* from SenseID */ - unsigned int dev_type : 16; /* from SenseID */ - unsigned int dev_model : 8; /* from SenseID */ - unsigned int open_count; - unsigned int req_queue_len; - unsigned int chanq_len; /* length of chanq */ - char type[4]; /* from discipline.name, 'none' for unknown */ - unsigned int status; /* current device level */ - unsigned int label_block; /* where to find the VOLSER */ - unsigned int FBA_layout; /* fixed block size (like AIXVOL) */ - unsigned int characteristics_size; - unsigned int confdata_size; - char characteristics[64]; /* from read_device_characteristics */ - char configuration_data[256]; /* from read_configuration_data */ -} dasd_information_t; - -/* - * Read Subsystem Data - Performance Statistics - */ -typedef struct dasd_rssd_perf_stats_t { - unsigned char invalid:1; - unsigned char format:3; - unsigned char data_format:4; - unsigned char unit_address; - unsigned short device_status; - unsigned int nr_read_normal; - unsigned int nr_read_normal_hits; - unsigned int nr_write_normal; - unsigned int nr_write_fast_normal_hits; - unsigned int nr_read_seq; - unsigned int nr_read_seq_hits; - unsigned int nr_write_seq; - unsigned int nr_write_fast_seq_hits; - unsigned int nr_read_cache; - unsigned int nr_read_cache_hits; - unsigned int nr_write_cache; - unsigned int nr_write_fast_cache_hits; - unsigned int nr_inhibit_cache; - unsigned int nr_bybass_cache; - unsigned int nr_seq_dasd_to_cache; - unsigned int nr_dasd_to_cache; - unsigned int nr_cache_to_dasd; - unsigned int nr_delayed_fast_write; - unsigned int nr_normal_fast_write; - unsigned int nr_seq_fast_write; - unsigned int nr_cache_miss; - unsigned char status2; - unsigned int nr_quick_write_promotes; - unsigned char reserved; - unsigned short ssid; - unsigned char reseved2[96]; -} __attribute__((packed)) dasd_rssd_perf_stats_t; - -/* - * struct profile_info_t - * holds the profinling information - */ -typedef struct dasd_profile_info_t { - unsigned int dasd_io_reqs; /* number of requests processed at all */ - unsigned int dasd_io_sects; /* number of sectors processed at all */ - unsigned int dasd_io_secs[32]; /* histogram of request's sizes */ - unsigned int dasd_io_times[32]; /* histogram of requests's times */ - unsigned int dasd_io_timps[32]; /* histogram of requests's times per sector */ - unsigned int dasd_io_time1[32]; /* histogram of time from build to start */ - unsigned int dasd_io_time2[32]; /* histogram of time from start to irq */ - unsigned int dasd_io_time2ps[32]; /* histogram of time from start to irq */ - unsigned int dasd_io_time3[32]; /* histogram of time from irq to end */ - unsigned int dasd_io_nr_req[32]; /* histogram of # of requests in chanq */ -} dasd_profile_info_t; - -/* - * struct format_data_t - * represents all data necessary to format a dasd - */ -typedef struct format_data_t { - int start_unit; /* from track */ - int stop_unit; /* to track */ - int blksize; /* sectorsize */ - int intensity; -} format_data_t; - -/* - * values to be used for format_data_t.intensity - * 0/8: normal format - * 1/9: also write record zero - * 3/11: also write home address - * 4/12: invalidate track - */ -#define DASD_FMT_INT_FMT_R0 1 /* write record zero */ -#define DASD_FMT_INT_FMT_HA 2 /* write home address, also set FMT_R0 ! */ -#define DASD_FMT_INT_INVAL 4 /* invalidate tracks */ -#define DASD_FMT_INT_COMPAT 8 /* use OS/390 compatible disk layout */ - - -/* - * struct attrib_data_t - * represents the operation (cache) bits for the device. - * Used in DE to influence caching of the DASD. - */ -typedef struct attrib_data_t { - unsigned char operation:3; /* cache operation mode */ - unsigned char reserved:5; /* cache operation mode */ - __u16 nr_cyl; /* no of cyliners for read ahaed */ - __u8 reserved2[29]; /* for future use */ -} __attribute__ ((packed)) attrib_data_t; - -/* definition of operation (cache) bits within attributes of DE */ -#define DASD_NORMAL_CACHE 0x0 -#define DASD_BYPASS_CACHE 0x1 -#define DASD_INHIBIT_LOAD 0x2 -#define DASD_SEQ_ACCESS 0x3 -#define DASD_SEQ_PRESTAGE 0x4 -#define DASD_REC_ACCESS 0x5 - - -/******************************************************************************** - * SECTION: Definition of IOCTLs - * - * Here ist how the ioctl-nr should be used: - * 0 - 31 DASD driver itself - * 32 - 239 still open - * 240 - 255 reserved for EMC - *******************************************************************************/ - -/* Disable the volume (for Linux) */ -#define BIODASDDISABLE _IO(DASD_IOCTL_LETTER,0) -/* Enable the volume (for Linux) */ -#define BIODASDENABLE _IO(DASD_IOCTL_LETTER,1) -/* Issue a reserve/release command, rsp. */ -#define BIODASDRSRV _IO(DASD_IOCTL_LETTER,2) /* reserve */ -#define BIODASDRLSE _IO(DASD_IOCTL_LETTER,3) /* release */ -#define BIODASDSLCK _IO(DASD_IOCTL_LETTER,4) /* steal lock */ -/* reset profiling information of a device */ -#define BIODASDPRRST _IO(DASD_IOCTL_LETTER,5) -/* Quiesce IO on device */ -#define BIODASDQUIESCE _IO(DASD_IOCTL_LETTER,6) -/* Resume IO on device */ -#define BIODASDRESUME _IO(DASD_IOCTL_LETTER,7) - - -/* retrieve API version number */ -#define DASDAPIVER _IOR(DASD_IOCTL_LETTER,0,int) -/* Get information on a dasd device */ -#define BIODASDINFO _IOR(DASD_IOCTL_LETTER,1,dasd_information_t) -/* retrieve profiling information of a device */ -#define BIODASDPRRD _IOR(DASD_IOCTL_LETTER,2,dasd_profile_info_t) -/* Get information on a dasd device (enhanced) */ -#define BIODASDINFO2 _IOR(DASD_IOCTL_LETTER,3,dasd_information2_t) -/* Performance Statistics Read */ -#define BIODASDPSRD _IOR(DASD_IOCTL_LETTER,4,dasd_rssd_perf_stats_t) -/* Get Attributes (cache operations) */ -#define BIODASDGATTR _IOR(DASD_IOCTL_LETTER,5,attrib_data_t) - - -/* #define BIODASDFORMAT _IOW(IOCTL_LETTER,0,format_data_t) , deprecated */ -#define BIODASDFMT _IOW(DASD_IOCTL_LETTER,1,format_data_t) -/* Set Attributes (cache operations) */ -#define BIODASDSATTR _IOW(DASD_IOCTL_LETTER,2,attrib_data_t) - - -#endif /* DASD_H */ - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-indent-level: 4 - * c-brace-imaginary-offset: 0 - * c-brace-offset: -4 - * c-argdecl-indent: 4 - * c-label-offset: -4 - * c-continued-statement-offset: 4 - * c-continued-brace-offset: 0 - * indent-tabs-mode: nil - * tab-width: 8 - * End: - */ diff --git a/include/asm-s390/debug.h b/include/asm-s390/debug.h deleted file mode 100644 index 9450ce6..0000000 --- a/include/asm-s390/debug.h +++ /dev/null @@ -1,261 +0,0 @@ -/* - * include/asm-s390/debug.h - * S/390 debug facility - * - * Copyright (C) 1999, 2000 IBM Deutschland Entwicklung GmbH, - * IBM Corporation - */ - -#ifndef DEBUG_H -#define DEBUG_H - -#include - -/* Note: - * struct __debug_entry must be defined outside of #ifdef __KERNEL__ - * in order to allow a user program to analyze the 'raw'-view. - */ - -struct __debug_entry{ - union { - struct { - unsigned long long clock:52; - unsigned long long exception:1; - unsigned long long level:3; - unsigned long long cpuid:8; - } fields; - - unsigned long long stck; - } id; - void* caller; -} __attribute__((packed)); - - -#define __DEBUG_FEATURE_VERSION 2 /* version of debug feature */ - -#ifdef __KERNEL__ -#include -#include -#include -#include - -#define DEBUG_MAX_LEVEL 6 /* debug levels range from 0 to 6 */ -#define DEBUG_OFF_LEVEL -1 /* level where debug is switched off */ -#define DEBUG_FLUSH_ALL -1 /* parameter to flush all areas */ -#define DEBUG_MAX_VIEWS 10 /* max number of views in proc fs */ -#define DEBUG_MAX_NAME_LEN 64 /* max length for a debugfs file name */ -#define DEBUG_DEFAULT_LEVEL 3 /* initial debug level */ - -#define DEBUG_DIR_ROOT "s390dbf" /* name of debug root directory in proc fs */ - -#define DEBUG_DATA(entry) (char*)(entry + 1) /* data is stored behind */ - /* the entry information */ - -typedef struct __debug_entry debug_entry_t; - -struct debug_view; - -typedef struct debug_info { - struct debug_info* next; - struct debug_info* prev; - atomic_t ref_count; - spinlock_t lock; - int level; - int nr_areas; - int pages_per_area; - int buf_size; - int entry_size; - debug_entry_t*** areas; - int active_area; - int *active_pages; - int *active_entries; - struct dentry* debugfs_root_entry; - struct dentry* debugfs_entries[DEBUG_MAX_VIEWS]; - struct debug_view* views[DEBUG_MAX_VIEWS]; - char name[DEBUG_MAX_NAME_LEN]; - mode_t mode; -} debug_info_t; - -typedef int (debug_header_proc_t) (debug_info_t* id, - struct debug_view* view, - int area, - debug_entry_t* entry, - char* out_buf); - -typedef int (debug_format_proc_t) (debug_info_t* id, - struct debug_view* view, char* out_buf, - const char* in_buf); -typedef int (debug_prolog_proc_t) (debug_info_t* id, - struct debug_view* view, - char* out_buf); -typedef int (debug_input_proc_t) (debug_info_t* id, - struct debug_view* view, - struct file* file, - const char __user *user_buf, - size_t in_buf_size, loff_t* offset); - -int debug_dflt_header_fn(debug_info_t* id, struct debug_view* view, - int area, debug_entry_t* entry, char* out_buf); - -struct debug_view { - char name[DEBUG_MAX_NAME_LEN]; - debug_prolog_proc_t* prolog_proc; - debug_header_proc_t* header_proc; - debug_format_proc_t* format_proc; - debug_input_proc_t* input_proc; - void* private_data; -}; - -extern struct debug_view debug_hex_ascii_view; -extern struct debug_view debug_raw_view; -extern struct debug_view debug_sprintf_view; - -/* do NOT use the _common functions */ - -debug_entry_t* debug_event_common(debug_info_t* id, int level, - const void* data, int length); - -debug_entry_t* debug_exception_common(debug_info_t* id, int level, - const void* data, int length); - -/* Debug Feature API: */ - -debug_info_t *debug_register(const char *name, int pages, int nr_areas, - int buf_size); - -debug_info_t *debug_register_mode(const char *name, int pages, int nr_areas, - int buf_size, mode_t mode, uid_t uid, - gid_t gid); - -void debug_unregister(debug_info_t* id); - -void debug_set_level(debug_info_t* id, int new_level); - -void debug_stop_all(void); - -static inline debug_entry_t* -debug_event(debug_info_t* id, int level, void* data, int length) -{ - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_event_common(id,level,data,length); -} - -static inline debug_entry_t* -debug_int_event(debug_info_t* id, int level, unsigned int tag) -{ - unsigned int t=tag; - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_event_common(id,level,&t,sizeof(unsigned int)); -} - -static inline debug_entry_t * -debug_long_event (debug_info_t* id, int level, unsigned long tag) -{ - unsigned long t=tag; - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_event_common(id,level,&t,sizeof(unsigned long)); -} - -static inline debug_entry_t* -debug_text_event(debug_info_t* id, int level, const char* txt) -{ - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_event_common(id,level,txt,strlen(txt)); -} - -extern debug_entry_t * -debug_sprintf_event(debug_info_t* id,int level,char *string,...) - __attribute__ ((format(printf, 3, 4))); - - -static inline debug_entry_t* -debug_exception(debug_info_t* id, int level, void* data, int length) -{ - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_exception_common(id,level,data,length); -} - -static inline debug_entry_t* -debug_int_exception(debug_info_t* id, int level, unsigned int tag) -{ - unsigned int t=tag; - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_exception_common(id,level,&t,sizeof(unsigned int)); -} - -static inline debug_entry_t * -debug_long_exception (debug_info_t* id, int level, unsigned long tag) -{ - unsigned long t=tag; - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_exception_common(id,level,&t,sizeof(unsigned long)); -} - -static inline debug_entry_t* -debug_text_exception(debug_info_t* id, int level, const char* txt) -{ - if ((!id) || (level > id->level) || (id->pages_per_area == 0)) - return NULL; - return debug_exception_common(id,level,txt,strlen(txt)); -} - - -extern debug_entry_t * -debug_sprintf_exception(debug_info_t* id,int level,char *string,...) - __attribute__ ((format(printf, 3, 4))); - -int debug_register_view(debug_info_t* id, struct debug_view* view); -int debug_unregister_view(debug_info_t* id, struct debug_view* view); - -/* - define the debug levels: - - 0 No debugging output to console or syslog - - 1 Log internal errors to syslog, ignore check conditions - - 2 Log internal errors and check conditions to syslog - - 3 Log internal errors to console, log check conditions to syslog - - 4 Log internal errors and check conditions to console - - 5 panic on internal errors, log check conditions to console - - 6 panic on both, internal errors and check conditions - */ - -#ifndef DEBUG_LEVEL -#define DEBUG_LEVEL 4 -#endif - -#define INTERNAL_ERRMSG(x,y...) "E" __FILE__ "%d: " x, __LINE__, y -#define INTERNAL_WRNMSG(x,y...) "W" __FILE__ "%d: " x, __LINE__, y -#define INTERNAL_INFMSG(x,y...) "I" __FILE__ "%d: " x, __LINE__, y -#define INTERNAL_DEBMSG(x,y...) "D" __FILE__ "%d: " x, __LINE__, y - -#if DEBUG_LEVEL > 0 -#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_INFO(x...) printk ( KERN_INFO PRINTK_HEADER x ) -#define PRINT_WARN(x...) printk ( KERN_WARNING PRINTK_HEADER x ) -#define PRINT_ERR(x...) printk ( KERN_ERR PRINTK_HEADER x ) -#define PRINT_FATAL(x...) panic ( PRINTK_HEADER x ) -#else -#define PRINT_DEBUG(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_INFO(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_WARN(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_ERR(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#define PRINT_FATAL(x...) printk ( KERN_DEBUG PRINTK_HEADER x ) -#endif /* DASD_DEBUG */ - -#undef DEBUG_MALLOC -#ifdef DEBUG_MALLOC -void *b; -#define kmalloc(x...) (PRINT_INFO(" kmalloc %p\n",b=kmalloc(x)),b) -#define kfree(x) PRINT_INFO(" kfree %p\n",x);kfree(x) -#define get_zeroed_page(x...) (PRINT_INFO(" gfp %p\n",b=get_zeroed_page(x)),b) -#define __get_free_pages(x...) (PRINT_INFO(" gfps %p\n",b=__get_free_pages(x)),b) -#endif /* DEBUG_MALLOC */ - -#endif /* __KERNEL__ */ -#endif /* DEBUG_H */ diff --git a/include/asm-s390/delay.h b/include/asm-s390/delay.h deleted file mode 100644 index 7835731..0000000 --- a/include/asm-s390/delay.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-s390/delay.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/delay.h" - * Copyright (C) 1993 Linus Torvalds - * - * Delay routines calling functions in arch/s390/lib/delay.c - */ - -#ifndef _S390_DELAY_H -#define _S390_DELAY_H - -extern void __udelay(unsigned long usecs); -extern void __delay(unsigned long loops); - -#define udelay(n) __udelay(n) - -#endif /* defined(_S390_DELAY_H) */ diff --git a/include/asm-s390/device.h b/include/asm-s390/device.h deleted file mode 100644 index d8f9872..0000000 --- a/include/asm-s390/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include - diff --git a/include/asm-s390/diag.h b/include/asm-s390/diag.h deleted file mode 100644 index 72b2e2f..0000000 --- a/include/asm-s390/diag.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * s390 diagnose functions - * - * Copyright IBM Corp. 2007 - * Author(s): Michael Holzheu - */ - -#ifndef _ASM_S390_DIAG_H -#define _ASM_S390_DIAG_H - -/* - * Diagnose 10: Release pages - */ -extern void diag10(unsigned long addr); - -/* - * Diagnose 14: Input spool file manipulation - */ -extern int diag14(unsigned long rx, unsigned long ry1, unsigned long subcode); - -/* - * Diagnose 210: Get information about a virtual device - */ -struct diag210 { - u16 vrdcdvno; /* device number (input) */ - u16 vrdclen; /* data block length (input) */ - u8 vrdcvcla; /* virtual device class (output) */ - u8 vrdcvtyp; /* virtual device type (output) */ - u8 vrdcvsta; /* virtual device status (output) */ - u8 vrdcvfla; /* virtual device flags (output) */ - u8 vrdcrccl; /* real device class (output) */ - u8 vrdccrty; /* real device type (output) */ - u8 vrdccrmd; /* real device model (output) */ - u8 vrdccrft; /* real device feature (output) */ -} __attribute__((packed, aligned(4))); - -extern int diag210(struct diag210 *addr); - -#endif /* _ASM_S390_DIAG_H */ diff --git a/include/asm-s390/div64.h b/include/asm-s390/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-s390/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/dma.h b/include/asm-s390/dma.h deleted file mode 100644 index 7425c6a..0000000 --- a/include/asm-s390/dma.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-s390/dma.h - * - * S390 version - */ - -#ifndef _ASM_DMA_H -#define _ASM_DMA_H - -#include /* need byte IO */ - -#define MAX_DMA_ADDRESS 0x80000000 - -#define free_dma(x) do { } while (0) - -#endif /* _ASM_DMA_H */ diff --git a/include/asm-s390/ebcdic.h b/include/asm-s390/ebcdic.h deleted file mode 100644 index 7f6f641..0000000 --- a/include/asm-s390/ebcdic.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-s390/ebcdic.h - * EBCDIC -> ASCII, ASCII -> EBCDIC conversion routines. - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky - */ - -#ifndef _EBCDIC_H -#define _EBCDIC_H - -#ifndef _S390_TYPES_H -#include -#endif - -extern __u8 _ascebc_500[256]; /* ASCII -> EBCDIC 500 conversion table */ -extern __u8 _ebcasc_500[256]; /* EBCDIC 500 -> ASCII conversion table */ -extern __u8 _ascebc[256]; /* ASCII -> EBCDIC conversion table */ -extern __u8 _ebcasc[256]; /* EBCDIC -> ASCII conversion table */ -extern __u8 _ebc_tolower[256]; /* EBCDIC -> lowercase */ -extern __u8 _ebc_toupper[256]; /* EBCDIC -> uppercase */ - -static inline void -codepage_convert(const __u8 *codepage, volatile __u8 * addr, unsigned long nr) -{ - if (nr-- <= 0) - return; - asm volatile( - " bras 1,1f\n" - " tr 0(1,%0),0(%2)\n" - "0: tr 0(256,%0),0(%2)\n" - " la %0,256(%0)\n" - "1: ahi %1,-256\n" - " jnm 0b\n" - " ex %1,0(1)" - : "+&a" (addr), "+&a" (nr) - : "a" (codepage) : "cc", "memory", "1"); -} - -#define ASCEBC(addr,nr) codepage_convert(_ascebc, addr, nr) -#define EBCASC(addr,nr) codepage_convert(_ebcasc, addr, nr) -#define ASCEBC_500(addr,nr) codepage_convert(_ascebc_500, addr, nr) -#define EBCASC_500(addr,nr) codepage_convert(_ebcasc_500, addr, nr) -#define EBC_TOLOWER(addr,nr) codepage_convert(_ebc_tolower, addr, nr) -#define EBC_TOUPPER(addr,nr) codepage_convert(_ebc_toupper, addr, nr) - -#endif - diff --git a/include/asm-s390/elf.h b/include/asm-s390/elf.h deleted file mode 100644 index 3cad569..0000000 --- a/include/asm-s390/elf.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - * include/asm-s390/elf.h - * - * S390 version - * - * Derived from "include/asm-i386/elf.h" - */ - -#ifndef __ASMS390_ELF_H -#define __ASMS390_ELF_H - -/* s390 relocations defined by the ABIs */ -#define R_390_NONE 0 /* No reloc. */ -#define R_390_8 1 /* Direct 8 bit. */ -#define R_390_12 2 /* Direct 12 bit. */ -#define R_390_16 3 /* Direct 16 bit. */ -#define R_390_32 4 /* Direct 32 bit. */ -#define R_390_PC32 5 /* PC relative 32 bit. */ -#define R_390_GOT12 6 /* 12 bit GOT offset. */ -#define R_390_GOT32 7 /* 32 bit GOT offset. */ -#define R_390_PLT32 8 /* 32 bit PC relative PLT address. */ -#define R_390_COPY 9 /* Copy symbol at runtime. */ -#define R_390_GLOB_DAT 10 /* Create GOT entry. */ -#define R_390_JMP_SLOT 11 /* Create PLT entry. */ -#define R_390_RELATIVE 12 /* Adjust by program base. */ -#define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */ -#define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */ -#define R_390_GOT16 15 /* 16 bit GOT offset. */ -#define R_390_PC16 16 /* PC relative 16 bit. */ -#define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */ -#define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */ -#define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */ -#define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */ -#define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */ -#define R_390_64 22 /* Direct 64 bit. */ -#define R_390_PC64 23 /* PC relative 64 bit. */ -#define R_390_GOT64 24 /* 64 bit GOT offset. */ -#define R_390_PLT64 25 /* 64 bit PC relative PLT address. */ -#define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */ -#define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */ -#define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */ -#define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */ -#define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */ -#define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */ -#define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */ -#define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */ -#define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */ -#define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */ -#define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */ -#define R_390_TLS_LOAD 37 /* Tag for load insn in TLS code. */ -#define R_390_TLS_GDCALL 38 /* Tag for function call in general - dynamic TLS code. */ -#define R_390_TLS_LDCALL 39 /* Tag for function call in local - dynamic TLS code. */ -#define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic - thread local data. */ -#define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic - thread local data. */ -#define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS - block offset. */ -#define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS - block offset. */ -#define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS - block offset. */ -#define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic - thread local data in LD code. */ -#define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic - thread local data in LD code. */ -#define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for - negated static TLS block offset. */ -#define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for - negated static TLS block offset. */ -#define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for - negated static TLS block offset. */ -#define R_390_TLS_LE32 50 /* 32 bit negated offset relative to - static TLS block. */ -#define R_390_TLS_LE64 51 /* 64 bit negated offset relative to - static TLS block. */ -#define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS - block. */ -#define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS - block. */ -#define R_390_TLS_DTPMOD 54 /* ID of module containing symbol. */ -#define R_390_TLS_DTPOFF 55 /* Offset in TLS block. */ -#define R_390_TLS_TPOFF 56 /* Negate offset in static TLS - block. */ -#define R_390_20 57 /* Direct 20 bit. */ -#define R_390_GOT20 58 /* 20 bit GOT offset. */ -#define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */ -#define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS - block offset. */ -/* Keep this the last entry. */ -#define R_390_NUM 61 - -/* - * These are used to set parameters in the core dumps. - */ -#ifndef __s390x__ -#define ELF_CLASS ELFCLASS32 -#else /* __s390x__ */ -#define ELF_CLASS ELFCLASS64 -#endif /* __s390x__ */ -#define ELF_DATA ELFDATA2MSB -#define ELF_ARCH EM_S390 - -/* - * ELF register definitions.. - */ - -#include -#include - -typedef s390_fp_regs elf_fpregset_t; -typedef s390_regs elf_gregset_t; - -typedef s390_fp_regs compat_elf_fpregset_t; -typedef s390_compat_regs compat_elf_gregset_t; - -#include /* for task_struct */ -#include /* for save_access_regs */ -#include - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) \ - (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \ - && (x)->e_ident[EI_CLASS] == ELF_CLASS) -#define compat_elf_check_arch(x) \ - (((x)->e_machine == EM_S390 || (x)->e_machine == EM_S390_OLD) \ - && (x)->e_ident[EI_CLASS] == ELF_CLASS) -#define compat_start_thread start_thread31 - -/* For SVR4/S390 the function pointer to be registered with `atexit` is - passed in R14. */ -#define ELF_PLAT_INIT(_r, load_addr) \ - do { \ - _r->gprs[14] = 0; \ - } while (0) - -#define CORE_DUMP_USE_REGSET -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ -#define ELF_ET_DYN_BASE (STACK_TOP / 3 * 2) - -/* This yields a mask that user programs can use to figure out what - instruction set this CPU supports. */ - -extern unsigned long elf_hwcap; -#define ELF_HWCAP (elf_hwcap) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. - - For the moment, we have only optimizations for the Intel generations, - but that could change... */ - -#define ELF_PLATFORM_SIZE 8 -extern char elf_platform[]; -#define ELF_PLATFORM (elf_platform) - -#ifndef __s390x__ -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) -#else /* __s390x__ */ -#define SET_PERSONALITY(ex, ibcs2) \ -do { \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ - set_personality(PER_LINUX); \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - set_thread_flag(TIF_31BIT); \ - else \ - clear_thread_flag(TIF_31BIT); \ -} while (0) -#endif /* __s390x__ */ - -/* - * An executable for which elf_read_implies_exec() returns TRUE will - * have the READ_IMPLIES_EXEC personality flag set automatically. - */ -#define elf_read_implies_exec(ex, executable_stack) \ -({ \ - if (current->mm->context.noexec && \ - executable_stack != EXSTACK_DISABLE_X) \ - disable_noexec(current->mm, current); \ - current->mm->context.noexec == 0; \ -}) - -#endif diff --git a/include/asm-s390/emergency-restart.h b/include/asm-s390/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-s390/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-s390/errno.h b/include/asm-s390/errno.h deleted file mode 100644 index e41d5b3..0000000 --- a/include/asm-s390/errno.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * include/asm-s390/errno.h - * - * S390 version - * - */ - -#ifndef _S390_ERRNO_H -#define _S390_ERRNO_H - -#include - -#endif diff --git a/include/asm-s390/etr.h b/include/asm-s390/etr.h deleted file mode 100644 index 80ef58c..0000000 --- a/include/asm-s390/etr.h +++ /dev/null @@ -1,258 +0,0 @@ -/* - * include/asm-s390/etr.h - * - * Copyright IBM Corp. 2006 - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - */ -#ifndef __S390_ETR_H -#define __S390_ETR_H - -/* ETR attachment control register */ -struct etr_eacr { - unsigned int e0 : 1; /* port 0 stepping control */ - unsigned int e1 : 1; /* port 1 stepping control */ - unsigned int _pad0 : 5; /* must be 00100 */ - unsigned int dp : 1; /* data port control */ - unsigned int p0 : 1; /* port 0 change recognition control */ - unsigned int p1 : 1; /* port 1 change recognition control */ - unsigned int _pad1 : 3; /* must be 000 */ - unsigned int ea : 1; /* ETR alert control */ - unsigned int es : 1; /* ETR sync check control */ - unsigned int sl : 1; /* switch to local control */ -} __attribute__ ((packed)); - -/* Port state returned by steai */ -enum etr_psc { - etr_psc_operational = 0, - etr_psc_semi_operational = 1, - etr_psc_protocol_error = 4, - etr_psc_no_symbols = 8, - etr_psc_no_signal = 12, - etr_psc_pps_mode = 13 -}; - -/* Logical port state returned by stetr */ -enum etr_lpsc { - etr_lpsc_operational_step = 0, - etr_lpsc_operational_alt = 1, - etr_lpsc_semi_operational = 2, - etr_lpsc_protocol_error = 4, - etr_lpsc_no_symbol_sync = 8, - etr_lpsc_no_signal = 12, - etr_lpsc_pps_mode = 13 -}; - -/* ETR status words */ -struct etr_esw { - struct etr_eacr eacr; /* attachment control register */ - unsigned int y : 1; /* stepping mode */ - unsigned int _pad0 : 5; /* must be 00000 */ - unsigned int p : 1; /* stepping port number */ - unsigned int q : 1; /* data port number */ - unsigned int psc0 : 4; /* port 0 state code */ - unsigned int psc1 : 4; /* port 1 state code */ -} __attribute__ ((packed)); - -/* Second level data register status word */ -struct etr_slsw { - unsigned int vv1 : 1; /* copy of validity bit data frame 1 */ - unsigned int vv2 : 1; /* copy of validity bit data frame 2 */ - unsigned int vv3 : 1; /* copy of validity bit data frame 3 */ - unsigned int vv4 : 1; /* copy of validity bit data frame 4 */ - unsigned int _pad0 : 19; /* must by all zeroes */ - unsigned int n : 1; /* EAF port number */ - unsigned int v1 : 1; /* validity bit ETR data frame 1 */ - unsigned int v2 : 1; /* validity bit ETR data frame 2 */ - unsigned int v3 : 1; /* validity bit ETR data frame 3 */ - unsigned int v4 : 1; /* validity bit ETR data frame 4 */ - unsigned int _pad1 : 4; /* must be 0000 */ -} __attribute__ ((packed)); - -/* ETR data frames */ -struct etr_edf1 { - unsigned int u : 1; /* untuned bit */ - unsigned int _pad0 : 1; /* must be 0 */ - unsigned int r : 1; /* service request bit */ - unsigned int _pad1 : 4; /* must be 0000 */ - unsigned int a : 1; /* time adjustment bit */ - unsigned int net_id : 8; /* ETR network id */ - unsigned int etr_id : 8; /* id of ETR which sends data frames */ - unsigned int etr_pn : 8; /* port number of ETR output port */ -} __attribute__ ((packed)); - -struct etr_edf2 { - unsigned int etv : 32; /* Upper 32 bits of TOD. */ -} __attribute__ ((packed)); - -struct etr_edf3 { - unsigned int rc : 8; /* failure reason code */ - unsigned int _pad0 : 3; /* must be 000 */ - unsigned int c : 1; /* ETR coupled bit */ - unsigned int tc : 4; /* ETR type code */ - unsigned int blto : 8; /* biased local time offset */ - /* (blto - 128) * 15 = minutes */ - unsigned int buo : 8; /* biased utc offset */ - /* (buo - 128) = leap seconds */ -} __attribute__ ((packed)); - -struct etr_edf4 { - unsigned int ed : 8; /* ETS device dependent data */ - unsigned int _pad0 : 1; /* must be 0 */ - unsigned int buc : 5; /* biased ut1 correction */ - /* (buc - 16) * 0.1 seconds */ - unsigned int em : 6; /* ETS error magnitude */ - unsigned int dc : 6; /* ETS drift code */ - unsigned int sc : 6; /* ETS steering code */ -} __attribute__ ((packed)); - -/* - * ETR attachment information block, two formats - * format 1 has 4 reserved words with a size of 64 bytes - * format 2 has 16 reserved words with a size of 96 bytes - */ -struct etr_aib { - struct etr_esw esw; - struct etr_slsw slsw; - unsigned long long tsp; - struct etr_edf1 edf1; - struct etr_edf2 edf2; - struct etr_edf3 edf3; - struct etr_edf4 edf4; - unsigned int reserved[16]; -} __attribute__ ((packed,aligned(8))); - -/* ETR interruption parameter */ -struct etr_irq_parm { - unsigned int _pad0 : 8; - unsigned int pc0 : 1; /* port 0 state change */ - unsigned int pc1 : 1; /* port 1 state change */ - unsigned int _pad1 : 3; - unsigned int eai : 1; /* ETR alert indication */ - unsigned int _pad2 : 18; -} __attribute__ ((packed)); - -/* Query TOD offset result */ -struct etr_ptff_qto { - unsigned long long physical_clock; - unsigned long long tod_offset; - unsigned long long logical_tod_offset; - unsigned long long tod_epoch_difference; -} __attribute__ ((packed)); - -/* Inline assembly helper functions */ -static inline int etr_setr(struct etr_eacr *ctrl) -{ - int rc = -ENOSYS; - - asm volatile( - " .insn s,0xb2160000,0(%2)\n" - "0: la %0,0\n" - "1:\n" - EX_TABLE(0b,1b) - : "+d" (rc) : "m" (*ctrl), "a" (ctrl)); - return rc; -} - -/* Stores a format 1 aib with 64 bytes */ -static inline int etr_stetr(struct etr_aib *aib) -{ - int rc = -ENOSYS; - - asm volatile( - " .insn s,0xb2170000,0(%2)\n" - "0: la %0,0\n" - "1:\n" - EX_TABLE(0b,1b) - : "+d" (rc) : "m" (*aib), "a" (aib)); - return rc; -} - -/* Stores a format 2 aib with 96 bytes for specified port */ -static inline int etr_steai(struct etr_aib *aib, unsigned int func) -{ - register unsigned int reg0 asm("0") = func; - int rc = -ENOSYS; - - asm volatile( - " .insn s,0xb2b30000,0(%2)\n" - "0: la %0,0\n" - "1:\n" - EX_TABLE(0b,1b) - : "+d" (rc) : "m" (*aib), "a" (aib), "d" (reg0)); - return rc; -} - -/* Function codes for the steai instruction. */ -#define ETR_STEAI_STEPPING_PORT 0x10 -#define ETR_STEAI_ALTERNATE_PORT 0x11 -#define ETR_STEAI_PORT_0 0x12 -#define ETR_STEAI_PORT_1 0x13 - -static inline int etr_ptff(void *ptff_block, unsigned int func) -{ - register unsigned int reg0 asm("0") = func; - register unsigned long reg1 asm("1") = (unsigned long) ptff_block; - int rc = -ENOSYS; - - asm volatile( - " .word 0x0104\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (rc), "=m" (ptff_block) - : "d" (reg0), "d" (reg1), "m" (ptff_block) : "cc"); - return rc; -} - -/* Function codes for the ptff instruction. */ -#define ETR_PTFF_QAF 0x00 /* query available functions */ -#define ETR_PTFF_QTO 0x01 /* query tod offset */ -#define ETR_PTFF_QSI 0x02 /* query steering information */ -#define ETR_PTFF_ATO 0x40 /* adjust tod offset */ -#define ETR_PTFF_STO 0x41 /* set tod offset */ -#define ETR_PTFF_SFS 0x42 /* set fine steering rate */ -#define ETR_PTFF_SGS 0x43 /* set gross steering rate */ - -/* Functions needed by the machine check handler */ -void etr_switch_to_local(void); -void etr_sync_check(void); - -/* STP interruption parameter */ -struct stp_irq_parm { - unsigned int _pad0 : 14; - unsigned int tsc : 1; /* Timing status change */ - unsigned int lac : 1; /* Link availability change */ - unsigned int tcpc : 1; /* Time control parameter change */ - unsigned int _pad2 : 15; -} __attribute__ ((packed)); - -#define STP_OP_SYNC 1 -#define STP_OP_CTRL 3 - -struct stp_sstpi { - unsigned int rsvd0; - unsigned int rsvd1 : 8; - unsigned int stratum : 8; - unsigned int vbits : 16; - unsigned int leaps : 16; - unsigned int tmd : 4; - unsigned int ctn : 4; - unsigned int rsvd2 : 3; - unsigned int c : 1; - unsigned int tst : 4; - unsigned int tzo : 16; - unsigned int dsto : 16; - unsigned int ctrl : 16; - unsigned int rsvd3 : 16; - unsigned int tto; - unsigned int rsvd4; - unsigned int ctnid[3]; - unsigned int rsvd5; - unsigned int todoff[4]; - unsigned int rsvd6[48]; -} __attribute__ ((packed)); - -/* Functions needed by the machine check handler */ -void stp_sync_check(void); -void stp_island_check(void); - -#endif /* __S390_ETR_H */ diff --git a/include/asm-s390/extmem.h b/include/asm-s390/extmem.h deleted file mode 100644 index 33837d7..0000000 --- a/include/asm-s390/extmem.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-s390x/extmem.h - * - * definitions for external memory segment support - * Copyright (C) 2003 IBM Deutschland Entwicklung GmbH, IBM Corporation - */ - -#ifndef _ASM_S390X_DCSS_H -#define _ASM_S390X_DCSS_H -#ifndef __ASSEMBLY__ - -/* possible values for segment type as returned by segment_info */ -#define SEG_TYPE_SW 0 -#define SEG_TYPE_EW 1 -#define SEG_TYPE_SR 2 -#define SEG_TYPE_ER 3 -#define SEG_TYPE_SN 4 -#define SEG_TYPE_EN 5 -#define SEG_TYPE_SC 6 -#define SEG_TYPE_EWEN 7 - -#define SEGMENT_SHARED 0 -#define SEGMENT_EXCLUSIVE 1 - -int segment_load (char *name, int segtype, unsigned long *addr, unsigned long *length); -void segment_unload(char *name); -void segment_save(char *name); -int segment_type (char* name); -int segment_modify_shared (char *name, int do_nonshared); -void segment_warning(int rc, char *seg_name); - -#endif -#endif diff --git a/include/asm-s390/fb.h b/include/asm-s390/fb.h deleted file mode 100644 index c7df380..0000000 --- a/include/asm-s390/fb.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ -#include - -#define fb_pgprotect(...) do {} while (0) - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-s390/fcntl.h b/include/asm-s390/fcntl.h deleted file mode 100644 index 46ab12d..0000000 --- a/include/asm-s390/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/fcx.h b/include/asm-s390/fcx.h deleted file mode 100644 index 8be1f3a..0000000 --- a/include/asm-s390/fcx.h +++ /dev/null @@ -1,311 +0,0 @@ -/* - * Functions for assembling fcx enabled I/O control blocks. - * - * Copyright IBM Corp. 2008 - * Author(s): Peter Oberparleiter - */ - -#ifndef _ASM_S390_FCX_H -#define _ASM_S390_FCX_H _ASM_S390_FCX_H - -#include - -#define TCW_FORMAT_DEFAULT 0 -#define TCW_TIDAW_FORMAT_DEFAULT 0 -#define TCW_FLAGS_INPUT_TIDA 1 << (23 - 5) -#define TCW_FLAGS_TCCB_TIDA 1 << (23 - 6) -#define TCW_FLAGS_OUTPUT_TIDA 1 << (23 - 7) -#define TCW_FLAGS_TIDAW_FORMAT(x) ((x) & 3) << (23 - 9) -#define TCW_FLAGS_GET_TIDAW_FORMAT(x) (((x) >> (23 - 9)) & 3) - -/** - * struct tcw - Transport Control Word (TCW) - * @format: TCW format - * @flags: TCW flags - * @tccbl: Transport-Command-Control-Block Length - * @r: Read Operations - * @w: Write Operations - * @output: Output-Data Address - * @input: Input-Data Address - * @tsb: Transport-Status-Block Address - * @tccb: Transport-Command-Control-Block Address - * @output_count: Output Count - * @input_count: Input Count - * @intrg: Interrogate TCW Address - */ -struct tcw { - u32 format:2; - u32 :6; - u32 flags:24; - u32 :8; - u32 tccbl:6; - u32 r:1; - u32 w:1; - u32 :16; - u64 output; - u64 input; - u64 tsb; - u64 tccb; - u32 output_count; - u32 input_count; - u32 :32; - u32 :32; - u32 :32; - u32 intrg; -} __attribute__ ((packed, aligned(64))); - -#define TIDAW_FLAGS_LAST 1 << (7 - 0) -#define TIDAW_FLAGS_SKIP 1 << (7 - 1) -#define TIDAW_FLAGS_DATA_INT 1 << (7 - 2) -#define TIDAW_FLAGS_TTIC 1 << (7 - 3) -#define TIDAW_FLAGS_INSERT_CBC 1 << (7 - 4) - -/** - * struct tidaw - Transport-Indirect-Addressing Word (TIDAW) - * @flags: TIDAW flags. Can be an arithmetic OR of the following constants: - * %TIDAW_FLAGS_LAST, %TIDAW_FLAGS_SKIP, %TIDAW_FLAGS_DATA_INT, - * %TIDAW_FLAGS_TTIC, %TIDAW_FLAGS_INSERT_CBC - * @count: Count - * @addr: Address - */ -struct tidaw { - u32 flags:8; - u32 :24; - u32 count; - u64 addr; -} __attribute__ ((packed, aligned(16))); - -/** - * struct tsa_iostat - I/O-Status Transport-Status Area (IO-Stat TSA) - * @dev_time: Device Time - * @def_time: Defer Time - * @queue_time: Queue Time - * @dev_busy_time: Device-Busy Time - * @dev_act_time: Device-Active-Only Time - * @sense: Sense Data (if present) - */ -struct tsa_iostat { - u32 dev_time; - u32 def_time; - u32 queue_time; - u32 dev_busy_time; - u32 dev_act_time; - u8 sense[32]; -} __attribute__ ((packed)); - -/** - * struct tsa_ddpcs - Device-Detected-Program-Check Transport-Status Area (DDPC TSA) - * @rc: Reason Code - * @rcq: Reason Code Qualifier - * @sense: Sense Data (if present) - */ -struct tsa_ddpc { - u32 :24; - u32 rc:8; - u8 rcq[16]; - u8 sense[32]; -} __attribute__ ((packed)); - -#define TSA_INTRG_FLAGS_CU_STATE_VALID 1 << (7 - 0) -#define TSA_INTRG_FLAGS_DEV_STATE_VALID 1 << (7 - 1) -#define TSA_INTRG_FLAGS_OP_STATE_VALID 1 << (7 - 2) - -/** - * struct tsa_intrg - Interrogate Transport-Status Area (Intrg. TSA) - * @format: Format - * @flags: Flags. Can be an arithmetic OR of the following constants: - * %TSA_INTRG_FLAGS_CU_STATE_VALID, %TSA_INTRG_FLAGS_DEV_STATE_VALID, - * %TSA_INTRG_FLAGS_OP_STATE_VALID - * @cu_state: Controle-Unit State - * @dev_state: Device State - * @op_state: Operation State - * @sd_info: State-Dependent Information - * @dl_id: Device-Level Identifier - * @dd_data: Device-Dependent Data - */ -struct tsa_intrg { - u32 format:8; - u32 flags:8; - u32 cu_state:8; - u32 dev_state:8; - u32 op_state:8; - u32 :24; - u8 sd_info[12]; - u32 dl_id; - u8 dd_data[28]; -} __attribute__ ((packed)); - -#define TSB_FORMAT_NONE 0 -#define TSB_FORMAT_IOSTAT 1 -#define TSB_FORMAT_DDPC 2 -#define TSB_FORMAT_INTRG 3 - -#define TSB_FLAGS_DCW_OFFSET_VALID 1 << (7 - 0) -#define TSB_FLAGS_COUNT_VALID 1 << (7 - 1) -#define TSB_FLAGS_CACHE_MISS 1 << (7 - 2) -#define TSB_FLAGS_TIME_VALID 1 << (7 - 3) -#define TSB_FLAGS_FORMAT(x) ((x) & 7) -#define TSB_FORMAT(t) ((t)->flags & 7) - -/** - * struct tsb - Transport-Status Block (TSB) - * @length: Length - * @flags: Flags. Can be an arithmetic OR of the following constants: - * %TSB_FLAGS_DCW_OFFSET_VALID, %TSB_FLAGS_COUNT_VALID, %TSB_FLAGS_CACHE_MISS, - * %TSB_FLAGS_TIME_VALID - * @dcw_offset: DCW Offset - * @count: Count - * @tsa: Transport-Status-Area - */ -struct tsb { - u32 length:8; - u32 flags:8; - u32 dcw_offset:16; - u32 count; - u32 :32; - union { - struct tsa_iostat iostat; - struct tsa_ddpc ddpc; - struct tsa_intrg intrg; - } __attribute__ ((packed)) tsa; -} __attribute__ ((packed, aligned(8))); - -#define DCW_INTRG_FORMAT_DEFAULT 0 - -#define DCW_INTRG_RC_UNSPECIFIED 0 -#define DCW_INTRG_RC_TIMEOUT 1 - -#define DCW_INTRG_RCQ_UNSPECIFIED 0 -#define DCW_INTRG_RCQ_PRIMARY 1 -#define DCW_INTRG_RCQ_SECONDARY 2 - -#define DCW_INTRG_FLAGS_MPM 1 < (7 - 0) -#define DCW_INTRG_FLAGS_PPR 1 < (7 - 1) -#define DCW_INTRG_FLAGS_CRIT 1 < (7 - 2) - -/** - * struct dcw_intrg_data - Interrogate DCW data - * @format: Format. Should be %DCW_INTRG_FORMAT_DEFAULT - * @rc: Reason Code. Can be one of %DCW_INTRG_RC_UNSPECIFIED, - * %DCW_INTRG_RC_TIMEOUT - * @rcq: Reason Code Qualifier: Can be one of %DCW_INTRG_RCQ_UNSPECIFIED, - * %DCW_INTRG_RCQ_PRIMARY, %DCW_INTRG_RCQ_SECONDARY - * @lpm: Logical-Path Mask - * @pam: Path-Available Mask - * @pim: Path-Installed Mask - * @timeout: Timeout - * @flags: Flags. Can be an arithmetic OR of %DCW_INTRG_FLAGS_MPM, - * %DCW_INTRG_FLAGS_PPR, %DCW_INTRG_FLAGS_CRIT - * @time: Time - * @prog_id: Program Identifier - * @prog_data: Program-Dependent Data - */ -struct dcw_intrg_data { - u32 format:8; - u32 rc:8; - u32 rcq:8; - u32 lpm:8; - u32 pam:8; - u32 pim:8; - u32 timeout:16; - u32 flags:8; - u32 :24; - u32 :32; - u64 time; - u64 prog_id; - u8 prog_data[0]; -} __attribute__ ((packed)); - -#define DCW_FLAGS_CC 1 << (7 - 1) - -#define DCW_CMD_WRITE 0x01 -#define DCW_CMD_READ 0x02 -#define DCW_CMD_CONTROL 0x03 -#define DCW_CMD_SENSE 0x04 -#define DCW_CMD_SENSE_ID 0xe4 -#define DCW_CMD_INTRG 0x40 - -/** - * struct dcw - Device-Command Word (DCW) - * @cmd: Command Code. Can be one of %DCW_CMD_WRITE, %DCW_CMD_READ, - * %DCW_CMD_CONTROL, %DCW_CMD_SENSE, %DCW_CMD_SENSE_ID, %DCW_CMD_INTRG - * @flags: Flags. Can be an arithmetic OR of %DCW_FLAGS_CC - * @cd_count: Control-Data Count - * @count: Count - * @cd: Control Data - */ -struct dcw { - u32 cmd:8; - u32 flags:8; - u32 :8; - u32 cd_count:8; - u32 count; - u8 cd[0]; -} __attribute__ ((packed)); - -#define TCCB_FORMAT_DEFAULT 0x7f -#define TCCB_MAX_DCW 30 -#define TCCB_MAX_SIZE (sizeof(struct tccb_tcah) + \ - TCCB_MAX_DCW * sizeof(struct dcw) + \ - sizeof(struct tccb_tcat)) -#define TCCB_SAC_DEFAULT 0xf901 -#define TCCB_SAC_INTRG 0xf902 - -/** - * struct tccb_tcah - Transport-Command-Area Header (TCAH) - * @format: Format. Should be %TCCB_FORMAT_DEFAULT - * @tcal: Transport-Command-Area Length - * @sac: Service-Action Code. Can be one of %TCCB_SAC_DEFAULT, %TCCB_SAC_INTRG - * @prio: Priority - */ -struct tccb_tcah { - u32 format:8; - u32 :24; - u32 :24; - u32 tcal:8; - u32 sac:16; - u32 :8; - u32 prio:8; - u32 :32; -} __attribute__ ((packed)); - -/** - * struct tccb_tcat - Transport-Command-Area Trailer (TCAT) - * @count: Transport Count - */ -struct tccb_tcat { - u32 :32; - u32 count; -} __attribute__ ((packed)); - -/** - * struct tccb - (partial) Transport-Command-Control Block (TCCB) - * @tcah: TCAH - * @tca: Transport-Command Area - */ -struct tccb { - struct tccb_tcah tcah; - u8 tca[0]; -} __attribute__ ((packed, aligned(8))); - -struct tcw *tcw_get_intrg(struct tcw *tcw); -void *tcw_get_data(struct tcw *tcw); -struct tccb *tcw_get_tccb(struct tcw *tcw); -struct tsb *tcw_get_tsb(struct tcw *tcw); - -void tcw_init(struct tcw *tcw, int r, int w); -void tcw_finalize(struct tcw *tcw, int num_tidaws); - -void tcw_set_intrg(struct tcw *tcw, struct tcw *intrg_tcw); -void tcw_set_data(struct tcw *tcw, void *data, int use_tidal); -void tcw_set_tccb(struct tcw *tcw, struct tccb *tccb); -void tcw_set_tsb(struct tcw *tcw, struct tsb *tsb); - -void tccb_init(struct tccb *tccb, size_t tccb_size, u32 sac); -void tsb_init(struct tsb *tsb); -struct dcw *tccb_add_dcw(struct tccb *tccb, size_t tccb_size, u8 cmd, u8 flags, - void *cd, u8 cd_count, u32 count); -struct tidaw *tcw_add_tidaw(struct tcw *tcw, int num_tidaws, u8 flags, - void *addr, u32 count); - -#endif /* _ASM_S390_FCX_H */ diff --git a/include/asm-s390/futex.h b/include/asm-s390/futex.h deleted file mode 100644 index 5c5d02d..0000000 --- a/include/asm-s390/futex.h +++ /dev/null @@ -1,52 +0,0 @@ -#ifndef _ASM_S390_FUTEX_H -#define _ASM_S390_FUTEX_H - -#ifdef __KERNEL__ - -#include -#include -#include - -static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval, ret; - - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - pagefault_disable(); - ret = uaccess.futex_atomic_op(op, uaddr, oparg, &oldval); - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr, - int oldval, int newval) -{ - if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - return uaccess.futex_atomic_cmpxchg(uaddr, oldval, newval); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_S390_FUTEX_H */ diff --git a/include/asm-s390/hardirq.h b/include/asm-s390/hardirq.h deleted file mode 100644 index 89ec705..0000000 --- a/include/asm-s390/hardirq.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * include/asm-s390/hardirq.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), - * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) - * - * Derived from "include/asm-i386/hardirq.h" - */ - -#ifndef __ASM_HARDIRQ_H -#define __ASM_HARDIRQ_H - -#include -#include -#include -#include -#include - -/* irq_cpustat_t is unused currently, but could be converted - * into a percpu variable instead of storing softirq_pending - * on the lowcore */ -typedef struct { - unsigned int __softirq_pending; -} irq_cpustat_t; - -#define local_softirq_pending() (S390_lowcore.softirq_pending) - -#define __ARCH_IRQ_STAT -#define __ARCH_HAS_DO_SOFTIRQ - -#define HARDIRQ_BITS 8 - -void clock_comparator_work(void); - -static inline unsigned long long local_tick_disable(void) -{ - unsigned long long old; - - old = S390_lowcore.clock_comparator; - S390_lowcore.clock_comparator = -1ULL; - return old; -} - -static inline void local_tick_enable(unsigned long long comp) -{ - S390_lowcore.clock_comparator = comp; -} - -#endif /* __ASM_HARDIRQ_H */ diff --git a/include/asm-s390/hugetlb.h b/include/asm-s390/hugetlb.h deleted file mode 100644 index 670a1d1..0000000 --- a/include/asm-s390/hugetlb.h +++ /dev/null @@ -1,184 +0,0 @@ -/* - * IBM System z Huge TLB Page Support for Kernel. - * - * Copyright IBM Corp. 2008 - * Author(s): Gerald Schaefer - */ - -#ifndef _ASM_S390_HUGETLB_H -#define _ASM_S390_HUGETLB_H - -#include -#include - - -#define is_hugepage_only_range(mm, addr, len) 0 -#define hugetlb_free_pgd_range free_pgd_range - -void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte); - -/* - * If the arch doesn't supply something else, assume that hugepage - * size aligned regions are ok without further preparation. - */ -static inline int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len) -{ - if (len & ~HPAGE_MASK) - return -EINVAL; - if (addr & ~HPAGE_MASK) - return -EINVAL; - return 0; -} - -#define hugetlb_prefault_arch_hook(mm) do { } while (0) - -int arch_prepare_hugepage(struct page *page); -void arch_release_hugepage(struct page *page); - -static inline pte_t pte_mkhuge(pte_t pte) -{ - /* - * PROT_NONE needs to be remapped from the pte type to the ste type. - * The HW invalid bit is also different for pte and ste. The pte - * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE - * bit, so we don't have to clear it. - */ - if (pte_val(pte) & _PAGE_INVALID) { - if (pte_val(pte) & _PAGE_SWT) - pte_val(pte) |= _HPAGE_TYPE_NONE; - pte_val(pte) |= _SEGMENT_ENTRY_INV; - } - /* - * Clear SW pte bits SWT and SWX, there are no SW bits in a segment - * table entry. - */ - pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX); - /* - * Also set the change-override bit because we don't need dirty bit - * tracking for hugetlbfs pages. - */ - pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO); - return pte; -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - pte_val(pte) |= _PAGE_RO; - return pte; -} - -static inline int huge_pte_none(pte_t pte) -{ - return (pte_val(pte) & _SEGMENT_ENTRY_INV) && - !(pte_val(pte) & _SEGMENT_ENTRY_RO); -} - -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - pte_t pte = *ptep; - unsigned long mask; - - if (!MACHINE_HAS_HPAGE) { - ptep = (pte_t *) (pte_val(pte) & _SEGMENT_ENTRY_ORIGIN); - if (ptep) { - mask = pte_val(pte) & - (_SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO); - pte = pte_mkhuge(*ptep); - pte_val(pte) |= mask; - } - } - return pte; -} - -static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - pte_t pte = huge_ptep_get(ptep); - - pmd_clear((pmd_t *) ptep); - return pte; -} - -static inline void __pmd_csp(pmd_t *pmdp) -{ - register unsigned long reg2 asm("2") = pmd_val(*pmdp); - register unsigned long reg3 asm("3") = pmd_val(*pmdp) | - _SEGMENT_ENTRY_INV; - register unsigned long reg4 asm("4") = ((unsigned long) pmdp) + 5; - - asm volatile( - " csp %1,%3" - : "=m" (*pmdp) - : "d" (reg2), "d" (reg3), "d" (reg4), "m" (*pmdp) : "cc"); - pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY; -} - -static inline void __pmd_idte(unsigned long address, pmd_t *pmdp) -{ - unsigned long sto = (unsigned long) pmdp - - pmd_index(address) * sizeof(pmd_t); - - if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) { - asm volatile( - " .insn rrf,0xb98e0000,%2,%3,0,0" - : "=m" (*pmdp) - : "m" (*pmdp), "a" (sto), - "a" ((address & HPAGE_MASK)) - ); - } - pmd_val(*pmdp) = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY; -} - -static inline void huge_ptep_invalidate(struct mm_struct *mm, - unsigned long address, pte_t *ptep) -{ - pmd_t *pmdp = (pmd_t *) ptep; - - if (!MACHINE_HAS_IDTE) { - __pmd_csp(pmdp); - if (mm->context.noexec) { - pmdp = get_shadow_table(pmdp); - __pmd_csp(pmdp); - } - return; - } - - __pmd_idte(address, pmdp); - if (mm->context.noexec) { - pmdp = get_shadow_table(pmdp); - __pmd_idte(address, pmdp); - } - return; -} - -#define huge_ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(huge_ptep_get(__ptep), __entry); \ - if (__changed) { \ - huge_ptep_invalidate((__vma)->vm_mm, __addr, __ptep); \ - set_huge_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \ - } \ - __changed; \ -}) - -#define huge_ptep_set_wrprotect(__mm, __addr, __ptep) \ -({ \ - pte_t __pte = huge_ptep_get(__ptep); \ - if (pte_write(__pte)) { \ - if (atomic_read(&(__mm)->mm_users) > 1 || \ - (__mm) != current->active_mm) \ - huge_ptep_invalidate(__mm, __addr, __ptep); \ - set_huge_pte_at(__mm, __addr, __ptep, \ - huge_pte_wrprotect(__pte)); \ - } \ -}) - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long address, pte_t *ptep) -{ - huge_ptep_invalidate(vma->vm_mm, address, ptep); -} - -#endif /* _ASM_S390_HUGETLB_H */ diff --git a/include/asm-s390/idals.h b/include/asm-s390/idals.h deleted file mode 100644 index e82c10e..0000000 --- a/include/asm-s390/idals.h +++ /dev/null @@ -1,256 +0,0 @@ -/* - * File...........: linux/include/asm-s390x/idals.h - * Author(s)......: Holger Smolinski - * Martin Schwidefsky - * Bugreports.to..: - * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 2000a - - * History of changes - * 07/24/00 new file - * 05/04/02 code restructuring. - */ - -#ifndef _S390_IDALS_H -#define _S390_IDALS_H - -#include -#include -#include -#include -#include -#include - -#ifdef __s390x__ -#define IDA_SIZE_LOG 12 /* 11 for 2k , 12 for 4k */ -#else -#define IDA_SIZE_LOG 11 /* 11 for 2k , 12 for 4k */ -#endif -#define IDA_BLOCK_SIZE (1L<> 31) != 0; -#else - return 0; -#endif -} - - -/* - * Return the number of idal words needed for an address/length pair. - */ -static inline unsigned int -idal_nr_words(void *vaddr, unsigned int length) -{ -#ifdef __s390x__ - if (idal_is_needed(vaddr, length)) - return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length + - (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG; -#endif - return 0; -} - -/* - * Create the list of idal words for an address/length pair. - */ -static inline unsigned long * -idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length) -{ -#ifdef __s390x__ - unsigned long paddr; - unsigned int cidaw; - - paddr = __pa(vaddr); - cidaw = ((paddr & (IDA_BLOCK_SIZE-1)) + length + - (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG; - *idaws++ = paddr; - paddr &= -IDA_BLOCK_SIZE; - while (--cidaw > 0) { - paddr += IDA_BLOCK_SIZE; - *idaws++ = paddr; - } -#endif - return idaws; -} - -/* - * Sets the address of the data in CCW. - * If necessary it allocates an IDAL and sets the appropriate flags. - */ -static inline int -set_normalized_cda(struct ccw1 * ccw, void *vaddr) -{ -#ifdef __s390x__ - unsigned int nridaws; - unsigned long *idal; - - if (ccw->flags & CCW_FLAG_IDA) - return -EINVAL; - nridaws = idal_nr_words(vaddr, ccw->count); - if (nridaws > 0) { - idal = kmalloc(nridaws * sizeof(unsigned long), - GFP_ATOMIC | GFP_DMA ); - if (idal == NULL) - return -ENOMEM; - idal_create_words(idal, vaddr, ccw->count); - ccw->flags |= CCW_FLAG_IDA; - vaddr = idal; - } -#endif - ccw->cda = (__u32)(unsigned long) vaddr; - return 0; -} - -/* - * Releases any allocated IDAL related to the CCW. - */ -static inline void -clear_normalized_cda(struct ccw1 * ccw) -{ -#ifdef __s390x__ - if (ccw->flags & CCW_FLAG_IDA) { - kfree((void *)(unsigned long) ccw->cda); - ccw->flags &= ~CCW_FLAG_IDA; - } -#endif - ccw->cda = 0; -} - -/* - * Idal buffer extension - */ -struct idal_buffer { - size_t size; - size_t page_order; - void *data[0]; -}; - -/* - * Allocate an idal buffer - */ -static inline struct idal_buffer * -idal_buffer_alloc(size_t size, int page_order) -{ - struct idal_buffer *ib; - int nr_chunks, nr_ptrs, i; - - nr_ptrs = (size + IDA_BLOCK_SIZE - 1) >> IDA_SIZE_LOG; - nr_chunks = (4096 << page_order) >> IDA_SIZE_LOG; - ib = kmalloc(sizeof(struct idal_buffer) + nr_ptrs*sizeof(void *), - GFP_DMA | GFP_KERNEL); - if (ib == NULL) - return ERR_PTR(-ENOMEM); - ib->size = size; - ib->page_order = page_order; - for (i = 0; i < nr_ptrs; i++) { - if ((i & (nr_chunks - 1)) != 0) { - ib->data[i] = ib->data[i-1] + IDA_BLOCK_SIZE; - continue; - } - ib->data[i] = (void *) - __get_free_pages(GFP_KERNEL, page_order); - if (ib->data[i] != NULL) - continue; - // Not enough memory - while (i >= nr_chunks) { - i -= nr_chunks; - free_pages((unsigned long) ib->data[i], - ib->page_order); - } - kfree(ib); - return ERR_PTR(-ENOMEM); - } - return ib; -} - -/* - * Free an idal buffer. - */ -static inline void -idal_buffer_free(struct idal_buffer *ib) -{ - int nr_chunks, nr_ptrs, i; - - nr_ptrs = (ib->size + IDA_BLOCK_SIZE - 1) >> IDA_SIZE_LOG; - nr_chunks = (4096 << ib->page_order) >> IDA_SIZE_LOG; - for (i = 0; i < nr_ptrs; i += nr_chunks) - free_pages((unsigned long) ib->data[i], ib->page_order); - kfree(ib); -} - -/* - * Test if a idal list is really needed. - */ -static inline int -__idal_buffer_is_needed(struct idal_buffer *ib) -{ -#ifdef __s390x__ - return ib->size > (4096ul << ib->page_order) || - idal_is_needed(ib->data[0], ib->size); -#else - return ib->size > (4096ul << ib->page_order); -#endif -} - -/* - * Set channel data address to idal buffer. - */ -static inline void -idal_buffer_set_cda(struct idal_buffer *ib, struct ccw1 *ccw) -{ - if (__idal_buffer_is_needed(ib)) { - // setup idals; - ccw->cda = (u32)(addr_t) ib->data; - ccw->flags |= CCW_FLAG_IDA; - } else - // we do not need idals - use direct addressing - ccw->cda = (u32)(addr_t) ib->data[0]; - ccw->count = ib->size; -} - -/* - * Copy count bytes from an idal buffer to user memory - */ -static inline size_t -idal_buffer_to_user(struct idal_buffer *ib, void __user *to, size_t count) -{ - size_t left; - int i; - - BUG_ON(count > ib->size); - for (i = 0; count > IDA_BLOCK_SIZE; i++) { - left = copy_to_user(to, ib->data[i], IDA_BLOCK_SIZE); - if (left) - return left + count - IDA_BLOCK_SIZE; - to = (void __user *) to + IDA_BLOCK_SIZE; - count -= IDA_BLOCK_SIZE; - } - return copy_to_user(to, ib->data[i], count); -} - -/* - * Copy count bytes from user memory to an idal buffer - */ -static inline size_t -idal_buffer_from_user(struct idal_buffer *ib, const void __user *from, size_t count) -{ - size_t left; - int i; - - BUG_ON(count > ib->size); - for (i = 0; count > IDA_BLOCK_SIZE; i++) { - left = copy_from_user(ib->data[i], from, IDA_BLOCK_SIZE); - if (left) - return left + count - IDA_BLOCK_SIZE; - from = (void __user *) from + IDA_BLOCK_SIZE; - count -= IDA_BLOCK_SIZE; - } - return copy_from_user(ib->data[i], from, count); -} - -#endif diff --git a/include/asm-s390/io.h b/include/asm-s390/io.h deleted file mode 100644 index b7ff6af..0000000 --- a/include/asm-s390/io.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * include/asm-s390/io.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/io.h" - */ - -#ifndef _S390_IO_H -#define _S390_IO_H - -#ifdef __KERNEL__ - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * Change virtual addresses to physical addresses and vv. - * These are pretty trivial - */ -static inline unsigned long virt_to_phys(volatile void * address) -{ - unsigned long real_address; - asm volatile( - " lra %0,0(%1)\n" - " jz 0f\n" - " la %0,0\n" - "0:" - : "=a" (real_address) : "a" (address) : "cc"); - return real_address; -} - -static inline void * phys_to_virt(unsigned long address) -{ - return (void *) address; -} - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-s390/ioctl.h b/include/asm-s390/ioctl.h deleted file mode 100644 index b279fe0..0000000 --- a/include/asm-s390/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/ioctls.h b/include/asm-s390/ioctls.h deleted file mode 100644 index 40e481b..0000000 --- a/include/asm-s390/ioctls.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-s390/ioctls.h - * - * S390 version - * - * Derived from "include/asm-i386/ioctls.h" - */ - -#ifndef __ARCH_S390_IOCTLS_H__ -#define __ARCH_S390_IOCTLS_H__ - -#include - -/* 0x54 is just a magic number to make these relatively unique ('T') */ - -#define TCGETS 0x5401 -#define TCSETS 0x5402 -#define TCSETSW 0x5403 -#define TCSETSF 0x5404 -#define TCGETA 0x5405 -#define TCSETA 0x5406 -#define TCSETAW 0x5407 -#define TCSETAF 0x5408 -#define TCSBRK 0x5409 -#define TCXONC 0x540A -#define TCFLSH 0x540B -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E -#define TIOCGPGRP 0x540F -#define TIOCSPGRP 0x5410 -#define TIOCOUTQ 0x5411 -#define TIOCSTI 0x5412 -#define TIOCGWINSZ 0x5413 -#define TIOCSWINSZ 0x5414 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define FIONREAD 0x541B -#define TIOCINQ FIONREAD -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 -#define FIONBIO 0x5421 -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -#define TIOCSBRK 0x5427 /* BSD compatibility */ -#define TIOCCBRK 0x5428 /* BSD compatibility */ -#define TIOCGSID 0x5429 /* Return the session ID of FD */ -#define TCGETS2 _IOR('T',0x2A, struct termios2) -#define TCSETS2 _IOW('T',0x2B, struct termios2) -#define TCSETSW2 _IOW('T',0x2C, struct termios2) -#define TCSETSF2 _IOW('T',0x2D, struct termios2) -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ -#define FIOCLEX 0x5451 -#define FIOASYNC 0x5452 -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define FIOQSIZE 0x545E - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - -#endif diff --git a/include/asm-s390/ipcbuf.h b/include/asm-s390/ipcbuf.h deleted file mode 100644 index 37f293d..0000000 --- a/include/asm-s390/ipcbuf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __S390_IPCBUF_H__ -#define __S390_IPCBUF_H__ - -/* - * The user_ipc_perm structure for S/390 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode_t and seq - * - 2 miscellaneous 32-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; -#ifndef __s390x__ - unsigned short __pad2; -#endif /* ! __s390x__ */ - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __S390_IPCBUF_H__ */ diff --git a/include/asm-s390/ipl.h b/include/asm-s390/ipl.h deleted file mode 100644 index 1171e6d..0000000 --- a/include/asm-s390/ipl.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - * s390 (re)ipl support - * - * Copyright IBM Corp. 2007 - */ - -#ifndef _ASM_S390_IPL_H -#define _ASM_S390_IPL_H - -#include -#include -#include - -#define IPL_PARMBLOCK_ORIGIN 0x2000 - -#define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \ - sizeof(struct ipl_block_fcp)) - -#define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 8) - -#define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \ - sizeof(struct ipl_block_ccw)) - -#define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 8) - -#define IPL_MAX_SUPPORTED_VERSION (0) - -#define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \ - IPL_PARMBLOCK_ORIGIN) -#define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len) - -struct ipl_list_hdr { - u32 len; - u8 reserved1[3]; - u8 version; - u32 blk0_len; - u8 pbt; - u8 flags; - u16 reserved2; -} __attribute__((packed)); - -struct ipl_block_fcp { - u8 reserved1[313-1]; - u8 opt; - u8 reserved2[3]; - u16 reserved3; - u16 devno; - u8 reserved4[4]; - u64 wwpn; - u64 lun; - u32 bootprog; - u8 reserved5[12]; - u64 br_lba; - u32 scp_data_len; - u8 reserved6[260]; - u8 scp_data[]; -} __attribute__((packed)); - -#define DIAG308_VMPARM_SIZE 64 - -struct ipl_block_ccw { - u8 load_parm[8]; - u8 reserved1[84]; - u8 reserved2[2]; - u16 devno; - u8 vm_flags; - u8 reserved3[3]; - u32 vm_parm_len; - u8 nss_name[8]; - u8 vm_parm[DIAG308_VMPARM_SIZE]; - u8 reserved4[8]; -} __attribute__((packed)); - -struct ipl_parameter_block { - struct ipl_list_hdr hdr; - union { - struct ipl_block_fcp fcp; - struct ipl_block_ccw ccw; - } ipl_info; -} __attribute__((packed,aligned(4096))); - -/* - * IPL validity flags - */ -extern u32 ipl_flags; -extern u32 dump_prefix_page; -extern unsigned int zfcpdump_prefix_array[]; - -extern void do_reipl(void); -extern void do_halt(void); -extern void do_poff(void); -extern void ipl_save_parameters(void); -extern void ipl_update_parameters(void); -extern void get_ipl_vmparm(char *); - -enum { - IPL_DEVNO_VALID = 1, - IPL_PARMBLOCK_VALID = 2, - IPL_NSS_VALID = 4, -}; - -enum ipl_type { - IPL_TYPE_UNKNOWN = 1, - IPL_TYPE_CCW = 2, - IPL_TYPE_FCP = 4, - IPL_TYPE_FCP_DUMP = 8, - IPL_TYPE_NSS = 16, -}; - -struct ipl_info -{ - enum ipl_type type; - union { - struct { - struct ccw_dev_id dev_id; - } ccw; - struct { - struct ccw_dev_id dev_id; - u64 wwpn; - u64 lun; - } fcp; - struct { - char name[NSS_NAME_SIZE + 1]; - } nss; - } data; -}; - -extern struct ipl_info ipl_info; -extern void setup_ipl(void); - -/* - * DIAG 308 support - */ -enum diag308_subcode { - DIAG308_REL_HSA = 2, - DIAG308_IPL = 3, - DIAG308_DUMP = 4, - DIAG308_SET = 5, - DIAG308_STORE = 6, -}; - -enum diag308_ipl_type { - DIAG308_IPL_TYPE_FCP = 0, - DIAG308_IPL_TYPE_CCW = 2, -}; - -enum diag308_opt { - DIAG308_IPL_OPT_IPL = 0x10, - DIAG308_IPL_OPT_DUMP = 0x20, -}; - -enum diag308_flags { - DIAG308_FLAGS_LP_VALID = 0x80, -}; - -enum diag308_vm_flags { - DIAG308_VM_FLAGS_NSS_VALID = 0x80, - DIAG308_VM_FLAGS_VP_VALID = 0x40, -}; - -enum diag308_rc { - DIAG308_RC_OK = 0x0001, - DIAG308_RC_NOCONFIG = 0x0102, -}; - -extern int diag308(unsigned long subcode, void *addr); - -#endif /* _ASM_S390_IPL_H */ diff --git a/include/asm-s390/irq.h b/include/asm-s390/irq.h deleted file mode 100644 index 7da991a..0000000 --- a/include/asm-s390/irq.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef _ASM_IRQ_H -#define _ASM_IRQ_H - -#ifdef __KERNEL__ -#include - -/* - * the definition of irqs has changed in 2.5.46: - * NR_IRQS is no longer the number of i/o - * interrupts (65536), but rather the number - * of interrupt classes (2). - * Only external and i/o interrupts make much sense here (CH). - */ - -enum interruption_class { - EXTERNAL_INTERRUPT, - IO_INTERRUPT, - - NR_IRQS, -}; - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-s390/irq_regs.h b/include/asm-s390/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-s390/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/irqflags.h b/include/asm-s390/irqflags.h deleted file mode 100644 index 3f26131..0000000 --- a/include/asm-s390/irqflags.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * include/asm-s390/irqflags.h - * - * Copyright (C) IBM Corp. 2006 - * Author(s): Heiko Carstens - */ - -#ifndef __ASM_IRQFLAGS_H -#define __ASM_IRQFLAGS_H - -#ifdef __KERNEL__ - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -/* store then or system mask. */ -#define __raw_local_irq_stosm(__or) \ -({ \ - unsigned long __mask; \ - asm volatile( \ - " stosm %0,%1" \ - : "=Q" (__mask) : "i" (__or) : "memory"); \ - __mask; \ -}) - -/* store then and system mask. */ -#define __raw_local_irq_stnsm(__and) \ -({ \ - unsigned long __mask; \ - asm volatile( \ - " stnsm %0,%1" \ - : "=Q" (__mask) : "i" (__and) : "memory"); \ - __mask; \ -}) - -/* set system mask. */ -#define __raw_local_irq_ssm(__mask) \ -({ \ - asm volatile("ssm %0" : : "Q" (__mask) : "memory"); \ -}) - -#else /* __GNUC__ */ - -/* store then or system mask. */ -#define __raw_local_irq_stosm(__or) \ -({ \ - unsigned long __mask; \ - asm volatile( \ - " stosm 0(%1),%2" \ - : "=m" (__mask) \ - : "a" (&__mask), "i" (__or) : "memory"); \ - __mask; \ -}) - -/* store then and system mask. */ -#define __raw_local_irq_stnsm(__and) \ -({ \ - unsigned long __mask; \ - asm volatile( \ - " stnsm 0(%1),%2" \ - : "=m" (__mask) \ - : "a" (&__mask), "i" (__and) : "memory"); \ - __mask; \ -}) - -/* set system mask. */ -#define __raw_local_irq_ssm(__mask) \ -({ \ - asm volatile( \ - " ssm 0(%0)" \ - : : "a" (&__mask), "m" (__mask) : "memory"); \ -}) - -#endif /* __GNUC__ */ - -/* interrupt control.. */ -static inline unsigned long raw_local_irq_enable(void) -{ - return __raw_local_irq_stosm(0x03); -} - -static inline unsigned long raw_local_irq_disable(void) -{ - return __raw_local_irq_stnsm(0xfc); -} - -#define raw_local_save_flags(x) \ -do { \ - typecheck(unsigned long, x); \ - (x) = __raw_local_irq_stosm(0x00); \ -} while (0) - -static inline void raw_local_irq_restore(unsigned long flags) -{ - __raw_local_irq_ssm(flags); -} - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return !(flags & (3UL << (BITS_PER_LONG - 8))); -} - -/* For spinlocks etc */ -#define raw_local_irq_save(x) ((x) = raw_local_irq_disable()) - -#endif /* __KERNEL__ */ -#endif /* __ASM_IRQFLAGS_H */ diff --git a/include/asm-s390/isc.h b/include/asm-s390/isc.h deleted file mode 100644 index 34bb891..0000000 --- a/include/asm-s390/isc.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_S390_ISC_H -#define _ASM_S390_ISC_H - -#include - -/* - * I/O interruption subclasses used by drivers. - * Please add all used iscs here so that it is possible to distribute - * isc usage between drivers. - * Reminder: 0 is highest priority, 7 lowest. - */ -#define MAX_ISC 7 - -/* Regular I/O interrupts. */ -#define IO_SCH_ISC 3 /* regular I/O subchannels */ -#define CONSOLE_ISC 1 /* console I/O subchannel */ -#define CHSC_SCH_ISC 7 /* CHSC subchannels */ -/* Adapter interrupts. */ -#define QDIO_AIRQ_ISC IO_SCH_ISC /* I/O subchannel in qdio mode */ - -/* Functions for registration of I/O interruption subclasses */ -void isc_register(unsigned int isc); -void isc_unregister(unsigned int isc); - -#endif /* _ASM_S390_ISC_H */ diff --git a/include/asm-s390/itcw.h b/include/asm-s390/itcw.h deleted file mode 100644 index a9bc5c3..0000000 --- a/include/asm-s390/itcw.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Functions for incremental construction of fcx enabled I/O control blocks. - * - * Copyright IBM Corp. 2008 - * Author(s): Peter Oberparleiter - */ - -#ifndef _ASM_S390_ITCW_H -#define _ASM_S390_ITCW_H _ASM_S390_ITCW_H - -#include -#include - -#define ITCW_OP_READ 0 -#define ITCW_OP_WRITE 1 - -struct itcw; - -struct tcw *itcw_get_tcw(struct itcw *itcw); -size_t itcw_calc_size(int intrg, int max_tidaws, int intrg_max_tidaws); -struct itcw *itcw_init(void *buffer, size_t size, int op, int intrg, - int max_tidaws, int intrg_max_tidaws); -struct dcw *itcw_add_dcw(struct itcw *itcw, u8 cmd, u8 flags, void *cd, - u8 cd_count, u32 count); -struct tidaw *itcw_add_tidaw(struct itcw *itcw, u8 flags, void *addr, - u32 count); -void itcw_set_data(struct itcw *itcw, void *addr, int use_tidal); -void itcw_finalize(struct itcw *itcw); - -#endif /* _ASM_S390_ITCW_H */ diff --git a/include/asm-s390/kdebug.h b/include/asm-s390/kdebug.h deleted file mode 100644 index 40db27c..0000000 --- a/include/asm-s390/kdebug.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _S390_KDEBUG_H -#define _S390_KDEBUG_H - -/* - * Feb 2006 Ported to s390 - */ - -struct pt_regs; - -enum die_val { - DIE_OOPS = 1, - DIE_BPT, - DIE_SSTEP, - DIE_PANIC, - DIE_NMI, - DIE_DIE, - DIE_NMIWATCHDOG, - DIE_KERNELDEBUG, - DIE_TRAP, - DIE_GPF, - DIE_CALL, - DIE_NMI_IPI, -}; - -extern void die(const char *, struct pt_regs *, long); - -#endif diff --git a/include/asm-s390/kexec.h b/include/asm-s390/kexec.h deleted file mode 100644 index f219c64..0000000 --- a/include/asm-s390/kexec.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-s390/kexec.h - * - * (C) Copyright IBM Corp. 2005 - * - * Author(s): Rolf Adelsberger - * - */ - -#ifndef _S390_KEXEC_H -#define _S390_KEXEC_H - -#ifdef __KERNEL__ -#include -#endif -#include -/* - * KEXEC_SOURCE_MEMORY_LIMIT maximum page get_free_page can return. - * I.e. Maximum page that is mapped directly into kernel memory, - * and kmap is not required. - */ - -/* Maximum physical address we can use pages from */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) - -/* Maximum address we can reach in physical address mode */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) - -/* Maximum address we can use for the control pages */ -/* Not more than 2GB */ -#define KEXEC_CONTROL_MEMORY_LIMIT (1UL<<31) - -/* Allocate one page for the pdp and the second for the code */ -#define KEXEC_CONTROL_CODE_SIZE 4096 - -/* The native architecture */ -#define KEXEC_ARCH KEXEC_ARCH_S390 - -/* Provide a dummy definition to avoid build failures. */ -static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) { } - -#endif /*_S390_KEXEC_H */ diff --git a/include/asm-s390/kmap_types.h b/include/asm-s390/kmap_types.h deleted file mode 100644 index fd15746..0000000 --- a/include/asm-s390/kmap_types.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _ASM_KMAP_TYPES_H -#define _ASM_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif -#endif /* __KERNEL__ */ diff --git a/include/asm-s390/kprobes.h b/include/asm-s390/kprobes.h deleted file mode 100644 index 330f68c..0000000 --- a/include/asm-s390/kprobes.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef _ASM_S390_KPROBES_H -#define _ASM_S390_KPROBES_H -/* - * Kernel Probes (KProbes) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) IBM Corporation, 2002, 2006 - * - * 2002-Oct Created by Vamsi Krishna S Kernel - * Probes initial implementation ( includes suggestions from - * Rusty Russell). - * 2004-Nov Modified for PPC64 by Ananth N Mavinakayanahalli - * - * 2005-Dec Used as a template for s390 by Mike Grundy - * - */ -#include -#include -#include - -#define __ARCH_WANT_KPROBES_INSN_SLOT -struct pt_regs; -struct kprobe; - -typedef u16 kprobe_opcode_t; -#define BREAKPOINT_INSTRUCTION 0x0002 - -/* Maximum instruction size is 3 (16bit) halfwords: */ -#define MAX_INSN_SIZE 0x0003 -#define MAX_STACK_SIZE 64 -#define MIN_STACK_SIZE(ADDR) (((MAX_STACK_SIZE) < \ - (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) \ - ? (MAX_STACK_SIZE) \ - : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR))) - -#define kretprobe_blacklist_size 0 - -#define KPROBE_SWAP_INST 0x10 - -#define FIXUP_PSW_NORMAL 0x08 -#define FIXUP_BRANCH_NOT_TAKEN 0x04 -#define FIXUP_RETURN_REGISTER 0x02 -#define FIXUP_NOT_REQUIRED 0x01 - -/* Architecture specific copy of original instruction */ -struct arch_specific_insn { - /* copy of original instruction */ - kprobe_opcode_t *insn; - int fixup; - int ilen; - int reg; -}; - -struct ins_replace_args { - kprobe_opcode_t *ptr; - kprobe_opcode_t old; - kprobe_opcode_t new; -}; -struct prev_kprobe { - struct kprobe *kp; - unsigned long status; - unsigned long saved_psw; - unsigned long kprobe_saved_imask; - unsigned long kprobe_saved_ctl[3]; -}; - -/* per-cpu kprobe control block */ -struct kprobe_ctlblk { - unsigned long kprobe_status; - unsigned long kprobe_saved_imask; - unsigned long kprobe_saved_ctl[3]; - struct pt_regs jprobe_saved_regs; - unsigned long jprobe_saved_r14; - unsigned long jprobe_saved_r15; - struct prev_kprobe prev_kprobe; - kprobe_opcode_t jprobes_stack[MAX_STACK_SIZE]; -}; - -void arch_remove_kprobe(struct kprobe *p); -void kretprobe_trampoline(void); -int is_prohibited_opcode(kprobe_opcode_t *instruction); -void get_instruction_type(struct arch_specific_insn *ainsn); - -int kprobe_fault_handler(struct pt_regs *regs, int trapnr); -int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); - -#define flush_insn_slot(p) do { } while (0) - -#endif /* _ASM_S390_KPROBES_H */ diff --git a/include/asm-s390/kvm.h b/include/asm-s390/kvm.h deleted file mode 100644 index d74002f..0000000 --- a/include/asm-s390/kvm.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef __LINUX_KVM_S390_H -#define __LINUX_KVM_S390_H - -/* - * asm-s390/kvm.h - KVM s390 specific structures and definitions - * - * Copyright IBM Corp. 2008 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * - * Author(s): Carsten Otte - * Christian Borntraeger - */ -#include - -/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */ -struct kvm_pic_state { - /* no PIC for s390 */ -}; - -struct kvm_ioapic_state { - /* no IOAPIC for s390 */ -}; - -/* for KVM_GET_REGS and KVM_SET_REGS */ -struct kvm_regs { - /* general purpose regs for s390 */ - __u64 gprs[16]; -}; - -/* for KVM_GET_SREGS and KVM_SET_SREGS */ -struct kvm_sregs { - __u32 acrs[16]; - __u64 crs[16]; -}; - -/* for KVM_GET_FPU and KVM_SET_FPU */ -struct kvm_fpu { - __u32 fpc; - __u64 fprs[16]; -}; - -#endif diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h deleted file mode 100644 index 3c55e41..0000000 --- a/include/asm-s390/kvm_host.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * asm-s390/kvm_host.h - definition for kernel virtual machines on s390 - * - * Copyright IBM Corp. 2008 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * - * Author(s): Carsten Otte - */ - - -#ifndef ASM_KVM_HOST_H -#define ASM_KVM_HOST_H -#include -#include - -#define KVM_MAX_VCPUS 64 -#define KVM_MEMORY_SLOTS 32 -/* memory slots that does not exposed to userspace */ -#define KVM_PRIVATE_MEM_SLOTS 4 - -struct kvm_guest_debug { -}; - -struct sca_entry { - atomic_t scn; - __u64 reserved; - __u64 sda; - __u64 reserved2[2]; -} __attribute__((packed)); - - -struct sca_block { - __u64 ipte_control; - __u64 reserved[5]; - __u64 mcn; - __u64 reserved2; - struct sca_entry cpu[64]; -} __attribute__((packed)); - -#define KVM_PAGES_PER_HPAGE 256 - -#define CPUSTAT_HOST 0x80000000 -#define CPUSTAT_WAIT 0x10000000 -#define CPUSTAT_ECALL_PEND 0x08000000 -#define CPUSTAT_STOP_INT 0x04000000 -#define CPUSTAT_IO_INT 0x02000000 -#define CPUSTAT_EXT_INT 0x01000000 -#define CPUSTAT_RUNNING 0x00800000 -#define CPUSTAT_RETAINED 0x00400000 -#define CPUSTAT_TIMING_SUB 0x00020000 -#define CPUSTAT_SIE_SUB 0x00010000 -#define CPUSTAT_RRF 0x00008000 -#define CPUSTAT_SLSV 0x00004000 -#define CPUSTAT_SLSR 0x00002000 -#define CPUSTAT_ZARCH 0x00000800 -#define CPUSTAT_MCDS 0x00000100 -#define CPUSTAT_SM 0x00000080 -#define CPUSTAT_G 0x00000008 -#define CPUSTAT_J 0x00000002 -#define CPUSTAT_P 0x00000001 - -struct kvm_s390_sie_block { - atomic_t cpuflags; /* 0x0000 */ - __u32 prefix; /* 0x0004 */ - __u8 reserved8[32]; /* 0x0008 */ - __u64 cputm; /* 0x0028 */ - __u64 ckc; /* 0x0030 */ - __u64 epoch; /* 0x0038 */ - __u8 reserved40[4]; /* 0x0040 */ -#define LCTL_CR0 0x8000 - __u16 lctl; /* 0x0044 */ - __s16 icpua; /* 0x0046 */ - __u32 ictl; /* 0x0048 */ - __u32 eca; /* 0x004c */ - __u8 icptcode; /* 0x0050 */ - __u8 reserved51; /* 0x0051 */ - __u16 ihcpu; /* 0x0052 */ - __u8 reserved54[2]; /* 0x0054 */ - __u16 ipa; /* 0x0056 */ - __u32 ipb; /* 0x0058 */ - __u32 scaoh; /* 0x005c */ - __u8 reserved60; /* 0x0060 */ - __u8 ecb; /* 0x0061 */ - __u8 reserved62[2]; /* 0x0062 */ - __u32 scaol; /* 0x0064 */ - __u8 reserved68[4]; /* 0x0068 */ - __u32 todpr; /* 0x006c */ - __u8 reserved70[16]; /* 0x0070 */ - __u64 gmsor; /* 0x0080 */ - __u64 gmslm; /* 0x0088 */ - psw_t gpsw; /* 0x0090 */ - __u64 gg14; /* 0x00a0 */ - __u64 gg15; /* 0x00a8 */ - __u8 reservedb0[30]; /* 0x00b0 */ - __u16 iprcc; /* 0x00ce */ - __u8 reservedd0[48]; /* 0x00d0 */ - __u64 gcr[16]; /* 0x0100 */ - __u64 gbea; /* 0x0180 */ - __u8 reserved188[120]; /* 0x0188 */ -} __attribute__((packed)); - -struct kvm_vcpu_stat { - u32 exit_userspace; - u32 exit_null; - u32 exit_external_request; - u32 exit_external_interrupt; - u32 exit_stop_request; - u32 exit_validity; - u32 exit_instruction; - u32 instruction_lctl; - u32 instruction_lctlg; - u32 exit_program_interruption; - u32 exit_instr_and_program; - u32 deliver_emergency_signal; - u32 deliver_service_signal; - u32 deliver_virtio_interrupt; - u32 deliver_stop_signal; - u32 deliver_prefix_signal; - u32 deliver_restart_signal; - u32 deliver_program_int; - u32 exit_wait_state; - u32 instruction_stidp; - u32 instruction_spx; - u32 instruction_stpx; - u32 instruction_stap; - u32 instruction_storage_key; - u32 instruction_stsch; - u32 instruction_chsc; - u32 instruction_stsi; - u32 instruction_stfl; - u32 instruction_sigp_sense; - u32 instruction_sigp_emergency; - u32 instruction_sigp_stop; - u32 instruction_sigp_arch; - u32 instruction_sigp_prefix; - u32 instruction_sigp_restart; - u32 diagnose_44; -}; - -struct kvm_s390_io_info { - __u16 subchannel_id; /* 0x0b8 */ - __u16 subchannel_nr; /* 0x0ba */ - __u32 io_int_parm; /* 0x0bc */ - __u32 io_int_word; /* 0x0c0 */ -}; - -struct kvm_s390_ext_info { - __u32 ext_params; - __u64 ext_params2; -}; - -#define PGM_OPERATION 0x01 -#define PGM_PRIVILEGED_OPERATION 0x02 -#define PGM_EXECUTE 0x03 -#define PGM_PROTECTION 0x04 -#define PGM_ADDRESSING 0x05 -#define PGM_SPECIFICATION 0x06 -#define PGM_DATA 0x07 - -struct kvm_s390_pgm_info { - __u16 code; -}; - -struct kvm_s390_prefix_info { - __u32 address; -}; - -struct kvm_s390_interrupt_info { - struct list_head list; - u64 type; - union { - struct kvm_s390_io_info io; - struct kvm_s390_ext_info ext; - struct kvm_s390_pgm_info pgm; - struct kvm_s390_prefix_info prefix; - }; -}; - -/* for local_interrupt.action_flags */ -#define ACTION_STORE_ON_STOP 1 -#define ACTION_STOP_ON_STOP 2 - -struct kvm_s390_local_interrupt { - spinlock_t lock; - struct list_head list; - atomic_t active; - struct kvm_s390_float_interrupt *float_int; - int timer_due; /* event indicator for waitqueue below */ - wait_queue_head_t wq; - atomic_t *cpuflags; - unsigned int action_bits; -}; - -struct kvm_s390_float_interrupt { - spinlock_t lock; - struct list_head list; - atomic_t active; - int next_rr_cpu; - unsigned long idle_mask [(64 + sizeof(long) - 1) / sizeof(long)]; - struct kvm_s390_local_interrupt *local_int[64]; -}; - - -struct kvm_vcpu_arch { - struct kvm_s390_sie_block *sie_block; - unsigned long guest_gprs[16]; - s390_fp_regs host_fpregs; - unsigned int host_acrs[NUM_ACRS]; - s390_fp_regs guest_fpregs; - unsigned int guest_acrs[NUM_ACRS]; - struct kvm_s390_local_interrupt local_int; - struct timer_list ckc_timer; - union { - cpuid_t cpu_id; - u64 stidp_data; - }; -}; - -struct kvm_vm_stat { - u32 remote_tlb_flush; -}; - -struct kvm_arch{ - unsigned long guest_origin; - unsigned long guest_memsize; - struct sca_block *sca; - debug_info_t *dbf; - struct kvm_s390_float_interrupt float_int; -}; - -extern int sie64a(struct kvm_s390_sie_block *, unsigned long *); -#endif diff --git a/include/asm-s390/kvm_para.h b/include/asm-s390/kvm_para.h deleted file mode 100644 index 2c50379..0000000 --- a/include/asm-s390/kvm_para.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * asm-s390/kvm_para.h - definition for paravirtual devices on s390 - * - * Copyright IBM Corp. 2008 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * - * Author(s): Christian Borntraeger - */ - -#ifndef __S390_KVM_PARA_H -#define __S390_KVM_PARA_H - -/* - * Hypercalls for KVM on s390. The calling convention is similar to the - * s390 ABI, so we use R2-R6 for parameters 1-5. In addition we use R1 - * as hypercall number and R7 as parameter 6. The return value is - * written to R2. We use the diagnose instruction as hypercall. To avoid - * conflicts with existing diagnoses for LPAR and z/VM, we do not use - * the instruction encoded number, but specify the number in R1 and - * use 0x500 as KVM hypercall - * - * Copyright IBM Corp. 2007,2008 - * Author(s): Christian Borntraeger - * - * This work is licensed under the terms of the GNU GPL, version 2. - */ - -static inline long kvm_hypercall0(unsigned long nr) -{ - register unsigned long __nr asm("1") = nr; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr): "memory", "cc"); - return __rc; -} - -static inline long kvm_hypercall1(unsigned long nr, unsigned long p1) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1) : "memory", "cc"); - return __rc; -} - -static inline long kvm_hypercall2(unsigned long nr, unsigned long p1, - unsigned long p2) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register unsigned long __p2 asm("3") = p2; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2) - : "memory", "cc"); - return __rc; -} - -static inline long kvm_hypercall3(unsigned long nr, unsigned long p1, - unsigned long p2, unsigned long p3) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register unsigned long __p2 asm("3") = p2; - register unsigned long __p3 asm("4") = p3; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), - "d" (__p3) : "memory", "cc"); - return __rc; -} - - -static inline long kvm_hypercall4(unsigned long nr, unsigned long p1, - unsigned long p2, unsigned long p3, - unsigned long p4) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register unsigned long __p2 asm("3") = p2; - register unsigned long __p3 asm("4") = p3; - register unsigned long __p4 asm("5") = p4; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), - "d" (__p3), "d" (__p4) : "memory", "cc"); - return __rc; -} - -static inline long kvm_hypercall5(unsigned long nr, unsigned long p1, - unsigned long p2, unsigned long p3, - unsigned long p4, unsigned long p5) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register unsigned long __p2 asm("3") = p2; - register unsigned long __p3 asm("4") = p3; - register unsigned long __p4 asm("5") = p4; - register unsigned long __p5 asm("6") = p5; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), - "d" (__p3), "d" (__p4), "d" (__p5) : "memory", "cc"); - return __rc; -} - -static inline long kvm_hypercall6(unsigned long nr, unsigned long p1, - unsigned long p2, unsigned long p3, - unsigned long p4, unsigned long p5, - unsigned long p6) -{ - register unsigned long __nr asm("1") = nr; - register unsigned long __p1 asm("2") = p1; - register unsigned long __p2 asm("3") = p2; - register unsigned long __p3 asm("4") = p3; - register unsigned long __p4 asm("5") = p4; - register unsigned long __p5 asm("6") = p5; - register unsigned long __p6 asm("7") = p6; - register long __rc asm("2"); - - asm volatile ("diag 2,4,0x500\n" - : "=d" (__rc) : "d" (__nr), "0" (__p1), "d" (__p2), - "d" (__p3), "d" (__p4), "d" (__p5), "d" (__p6) - : "memory", "cc"); - return __rc; -} - -/* kvm on s390 is always paravirtualization enabled */ -static inline int kvm_para_available(void) -{ - return 1; -} - -/* No feature bits are currently assigned for kvm on s390 */ -static inline unsigned int kvm_arch_para_features(void) -{ - return 0; -} - -#endif /* __S390_KVM_PARA_H */ diff --git a/include/asm-s390/kvm_virtio.h b/include/asm-s390/kvm_virtio.h deleted file mode 100644 index 1461002..0000000 --- a/include/asm-s390/kvm_virtio.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * kvm_virtio.h - definition for virtio for kvm on s390 - * - * Copyright IBM Corp. 2008 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * - * Author(s): Christian Borntraeger - */ - -#ifndef __KVM_S390_VIRTIO_H -#define __KVM_S390_VIRTIO_H - -#include - -struct kvm_device_desc { - /* The device type: console, network, disk etc. Type 0 terminates. */ - __u8 type; - /* The number of virtqueues (first in config array) */ - __u8 num_vq; - /* - * The number of bytes of feature bits. Multiply by 2: one for host - * features and one for guest acknowledgements. - */ - __u8 feature_len; - /* The number of bytes of the config array after virtqueues. */ - __u8 config_len; - /* A status byte, written by the Guest. */ - __u8 status; - __u8 config[0]; -}; - -/* - * This is how we expect the device configuration field for a virtqueue - * to be laid out in config space. - */ -struct kvm_vqconfig { - /* The token returned with an interrupt. Set by the guest */ - __u64 token; - /* The address of the virtio ring */ - __u64 address; - /* The number of entries in the virtio_ring */ - __u16 num; - -}; - -#define KVM_S390_VIRTIO_NOTIFY 0 -#define KVM_S390_VIRTIO_RESET 1 -#define KVM_S390_VIRTIO_SET_STATUS 2 - -#ifdef __KERNEL__ -/* early virtio console setup */ -#ifdef CONFIG_VIRTIO_CONSOLE -extern void s390_virtio_console_init(void); -#else -static inline void s390_virtio_console_init(void) -{ -} -#endif /* CONFIG_VIRTIO_CONSOLE */ -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-s390/linkage.h b/include/asm-s390/linkage.h deleted file mode 100644 index 291c2d0..0000000 --- a/include/asm-s390/linkage.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -/* Nothing to see here... */ - -#endif diff --git a/include/asm-s390/local.h b/include/asm-s390/local.h deleted file mode 100644 index c11c530..0000000 --- a/include/asm-s390/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/lowcore.h b/include/asm-s390/lowcore.h deleted file mode 100644 index 0bc51d5..0000000 --- a/include/asm-s390/lowcore.h +++ /dev/null @@ -1,433 +0,0 @@ -/* - * include/asm-s390/lowcore.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com), - * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) - */ - -#ifndef _ASM_S390_LOWCORE_H -#define _ASM_S390_LOWCORE_H - -#ifndef __s390x__ -#define __LC_EXT_OLD_PSW 0x018 -#define __LC_SVC_OLD_PSW 0x020 -#define __LC_PGM_OLD_PSW 0x028 -#define __LC_MCK_OLD_PSW 0x030 -#define __LC_IO_OLD_PSW 0x038 -#define __LC_EXT_NEW_PSW 0x058 -#define __LC_SVC_NEW_PSW 0x060 -#define __LC_PGM_NEW_PSW 0x068 -#define __LC_MCK_NEW_PSW 0x070 -#define __LC_IO_NEW_PSW 0x078 -#else /* !__s390x__ */ -#define __LC_EXT_OLD_PSW 0x0130 -#define __LC_SVC_OLD_PSW 0x0140 -#define __LC_PGM_OLD_PSW 0x0150 -#define __LC_MCK_OLD_PSW 0x0160 -#define __LC_IO_OLD_PSW 0x0170 -#define __LC_EXT_NEW_PSW 0x01b0 -#define __LC_SVC_NEW_PSW 0x01c0 -#define __LC_PGM_NEW_PSW 0x01d0 -#define __LC_MCK_NEW_PSW 0x01e0 -#define __LC_IO_NEW_PSW 0x01f0 -#endif /* !__s390x__ */ - -#define __LC_IPL_PARMBLOCK_PTR 0x014 -#define __LC_EXT_PARAMS 0x080 -#define __LC_CPU_ADDRESS 0x084 -#define __LC_EXT_INT_CODE 0x086 - -#define __LC_SVC_ILC 0x088 -#define __LC_SVC_INT_CODE 0x08A -#define __LC_PGM_ILC 0x08C -#define __LC_PGM_INT_CODE 0x08E - -#define __LC_PER_ATMID 0x096 -#define __LC_PER_ADDRESS 0x098 -#define __LC_PER_ACCESS_ID 0x0A1 -#define __LC_AR_MODE_ID 0x0A3 - -#define __LC_SUBCHANNEL_ID 0x0B8 -#define __LC_SUBCHANNEL_NR 0x0BA -#define __LC_IO_INT_PARM 0x0BC -#define __LC_IO_INT_WORD 0x0C0 -#define __LC_MCCK_CODE 0x0E8 - -#define __LC_LAST_BREAK 0x110 - -#define __LC_RETURN_PSW 0x200 - -#define __LC_SAVE_AREA 0xC00 - -#ifndef __s390x__ -#define __LC_IRB 0x208 -#define __LC_SYNC_ENTER_TIMER 0x248 -#define __LC_ASYNC_ENTER_TIMER 0x250 -#define __LC_EXIT_TIMER 0x258 -#define __LC_LAST_UPDATE_TIMER 0x260 -#define __LC_USER_TIMER 0x268 -#define __LC_SYSTEM_TIMER 0x270 -#define __LC_LAST_UPDATE_CLOCK 0x278 -#define __LC_STEAL_CLOCK 0x280 -#define __LC_RETURN_MCCK_PSW 0x288 -#define __LC_KERNEL_STACK 0xC40 -#define __LC_THREAD_INFO 0xC44 -#define __LC_ASYNC_STACK 0xC48 -#define __LC_KERNEL_ASCE 0xC4C -#define __LC_USER_ASCE 0xC50 -#define __LC_PANIC_STACK 0xC54 -#define __LC_CPUID 0xC60 -#define __LC_CPUADDR 0xC68 -#define __LC_IPLDEV 0xC7C -#define __LC_CURRENT 0xC90 -#define __LC_INT_CLOCK 0xC98 -#else /* __s390x__ */ -#define __LC_IRB 0x210 -#define __LC_SYNC_ENTER_TIMER 0x250 -#define __LC_ASYNC_ENTER_TIMER 0x258 -#define __LC_EXIT_TIMER 0x260 -#define __LC_LAST_UPDATE_TIMER 0x268 -#define __LC_USER_TIMER 0x270 -#define __LC_SYSTEM_TIMER 0x278 -#define __LC_LAST_UPDATE_CLOCK 0x280 -#define __LC_STEAL_CLOCK 0x288 -#define __LC_RETURN_MCCK_PSW 0x290 -#define __LC_KERNEL_STACK 0xD40 -#define __LC_THREAD_INFO 0xD48 -#define __LC_ASYNC_STACK 0xD50 -#define __LC_KERNEL_ASCE 0xD58 -#define __LC_USER_ASCE 0xD60 -#define __LC_PANIC_STACK 0xD68 -#define __LC_CPUID 0xD80 -#define __LC_CPUADDR 0xD88 -#define __LC_IPLDEV 0xDB8 -#define __LC_CURRENT 0xDD8 -#define __LC_INT_CLOCK 0xDE8 -#endif /* __s390x__ */ - - -#define __LC_PANIC_MAGIC 0xE00 -#ifndef __s390x__ -#define __LC_PFAULT_INTPARM 0x080 -#define __LC_CPU_TIMER_SAVE_AREA 0x0D8 -#define __LC_CLOCK_COMP_SAVE_AREA 0x0E0 -#define __LC_PSW_SAVE_AREA 0x100 -#define __LC_PREFIX_SAVE_AREA 0x108 -#define __LC_AREGS_SAVE_AREA 0x120 -#define __LC_FPREGS_SAVE_AREA 0x160 -#define __LC_GPREGS_SAVE_AREA 0x180 -#define __LC_CREGS_SAVE_AREA 0x1C0 -#else /* __s390x__ */ -#define __LC_PFAULT_INTPARM 0x11B8 -#define __LC_FPREGS_SAVE_AREA 0x1200 -#define __LC_GPREGS_SAVE_AREA 0x1280 -#define __LC_PSW_SAVE_AREA 0x1300 -#define __LC_PREFIX_SAVE_AREA 0x1318 -#define __LC_FP_CREG_SAVE_AREA 0x131C -#define __LC_TODREG_SAVE_AREA 0x1324 -#define __LC_CPU_TIMER_SAVE_AREA 0x1328 -#define __LC_CLOCK_COMP_SAVE_AREA 0x1331 -#define __LC_AREGS_SAVE_AREA 0x1340 -#define __LC_CREGS_SAVE_AREA 0x1380 -#endif /* __s390x__ */ - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -void restart_int_handler(void); -void ext_int_handler(void); -void system_call(void); -void pgm_check_handler(void); -void mcck_int_handler(void); -void io_int_handler(void); - -struct save_area_s390 { - u32 ext_save; - u64 timer; - u64 clk_cmp; - u8 pad1[24]; - u8 psw[8]; - u32 pref_reg; - u8 pad2[20]; - u32 acc_regs[16]; - u64 fp_regs[4]; - u32 gp_regs[16]; - u32 ctrl_regs[16]; -} __attribute__((packed)); - -struct save_area_s390x { - u64 fp_regs[16]; - u64 gp_regs[16]; - u8 psw[16]; - u8 pad1[8]; - u32 pref_reg; - u32 fp_ctrl_reg; - u8 pad2[4]; - u32 tod_reg; - u64 timer; - u64 clk_cmp; - u8 pad3[8]; - u32 acc_regs[16]; - u64 ctrl_regs[16]; -} __attribute__((packed)); - -union save_area { - struct save_area_s390 s390; - struct save_area_s390x s390x; -}; - -#define SAVE_AREA_BASE_S390 0xd4 -#define SAVE_AREA_BASE_S390X 0x1200 - -#ifndef __s390x__ -#define SAVE_AREA_SIZE sizeof(struct save_area_s390) -#define SAVE_AREA_BASE SAVE_AREA_BASE_S390 -#else -#define SAVE_AREA_SIZE sizeof(struct save_area_s390x) -#define SAVE_AREA_BASE SAVE_AREA_BASE_S390X -#endif - -struct _lowcore -{ -#ifndef __s390x__ - /* prefix area: defined by architecture */ - psw_t restart_psw; /* 0x000 */ - __u32 ccw2[4]; /* 0x008 */ - psw_t external_old_psw; /* 0x018 */ - psw_t svc_old_psw; /* 0x020 */ - psw_t program_old_psw; /* 0x028 */ - psw_t mcck_old_psw; /* 0x030 */ - psw_t io_old_psw; /* 0x038 */ - __u8 pad1[0x58-0x40]; /* 0x040 */ - psw_t external_new_psw; /* 0x058 */ - psw_t svc_new_psw; /* 0x060 */ - psw_t program_new_psw; /* 0x068 */ - psw_t mcck_new_psw; /* 0x070 */ - psw_t io_new_psw; /* 0x078 */ - __u32 ext_params; /* 0x080 */ - __u16 cpu_addr; /* 0x084 */ - __u16 ext_int_code; /* 0x086 */ - __u16 svc_ilc; /* 0x088 */ - __u16 svc_code; /* 0x08a */ - __u16 pgm_ilc; /* 0x08c */ - __u16 pgm_code; /* 0x08e */ - __u32 trans_exc_code; /* 0x090 */ - __u16 mon_class_num; /* 0x094 */ - __u16 per_perc_atmid; /* 0x096 */ - __u32 per_address; /* 0x098 */ - __u32 monitor_code; /* 0x09c */ - __u8 exc_access_id; /* 0x0a0 */ - __u8 per_access_id; /* 0x0a1 */ - __u8 pad2[0xB8-0xA2]; /* 0x0a2 */ - __u16 subchannel_id; /* 0x0b8 */ - __u16 subchannel_nr; /* 0x0ba */ - __u32 io_int_parm; /* 0x0bc */ - __u32 io_int_word; /* 0x0c0 */ - __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ - __u32 stfl_fac_list; /* 0x0c8 */ - __u8 pad4[0xd4-0xcc]; /* 0x0cc */ - __u32 extended_save_area_addr; /* 0x0d4 */ - __u32 cpu_timer_save_area[2]; /* 0x0d8 */ - __u32 clock_comp_save_area[2]; /* 0x0e0 */ - __u32 mcck_interruption_code[2]; /* 0x0e8 */ - __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ - __u32 external_damage_code; /* 0x0f4 */ - __u32 failing_storage_address; /* 0x0f8 */ - __u8 pad6[0x100-0xfc]; /* 0x0fc */ - __u32 st_status_fixed_logout[4];/* 0x100 */ - __u8 pad7[0x120-0x110]; /* 0x110 */ - __u32 access_regs_save_area[16];/* 0x120 */ - __u32 floating_pt_save_area[8]; /* 0x160 */ - __u32 gpregs_save_area[16]; /* 0x180 */ - __u32 cregs_save_area[16]; /* 0x1c0 */ - - psw_t return_psw; /* 0x200 */ - __u8 irb[64]; /* 0x208 */ - __u64 sync_enter_timer; /* 0x248 */ - __u64 async_enter_timer; /* 0x250 */ - __u64 exit_timer; /* 0x258 */ - __u64 last_update_timer; /* 0x260 */ - __u64 user_timer; /* 0x268 */ - __u64 system_timer; /* 0x270 */ - __u64 last_update_clock; /* 0x278 */ - __u64 steal_clock; /* 0x280 */ - psw_t return_mcck_psw; /* 0x288 */ - __u8 pad8[0xc00-0x290]; /* 0x290 */ - - /* System info area */ - __u32 save_area[16]; /* 0xc00 */ - __u32 kernel_stack; /* 0xc40 */ - __u32 thread_info; /* 0xc44 */ - __u32 async_stack; /* 0xc48 */ - __u32 kernel_asce; /* 0xc4c */ - __u32 user_asce; /* 0xc50 */ - __u32 panic_stack; /* 0xc54 */ - __u32 user_exec_asce; /* 0xc58 */ - __u8 pad10[0xc60-0xc5c]; /* 0xc5c */ - /* entry.S sensitive area start */ - struct cpuinfo_S390 cpu_data; /* 0xc60 */ - __u32 ipl_device; /* 0xc7c */ - /* entry.S sensitive area end */ - - /* SMP info area: defined by DJB */ - __u64 clock_comparator; /* 0xc80 */ - __u32 ext_call_fast; /* 0xc88 */ - __u32 percpu_offset; /* 0xc8c */ - __u32 current_task; /* 0xc90 */ - __u32 softirq_pending; /* 0xc94 */ - __u64 int_clock; /* 0xc98 */ - __u8 pad11[0xe00-0xca0]; /* 0xca0 */ - - /* 0xe00 is used as indicator for dump tools */ - /* whether the kernel died with panic() or not */ - __u32 panic_magic; /* 0xe00 */ - - /* Align to the top 1k of prefix area */ - __u8 pad12[0x1000-0xe04]; /* 0xe04 */ -#else /* !__s390x__ */ - /* prefix area: defined by architecture */ - __u32 ccw1[2]; /* 0x000 */ - __u32 ccw2[4]; /* 0x008 */ - __u8 pad1[0x80-0x18]; /* 0x018 */ - __u32 ext_params; /* 0x080 */ - __u16 cpu_addr; /* 0x084 */ - __u16 ext_int_code; /* 0x086 */ - __u16 svc_ilc; /* 0x088 */ - __u16 svc_code; /* 0x08a */ - __u16 pgm_ilc; /* 0x08c */ - __u16 pgm_code; /* 0x08e */ - __u32 data_exc_code; /* 0x090 */ - __u16 mon_class_num; /* 0x094 */ - __u16 per_perc_atmid; /* 0x096 */ - addr_t per_address; /* 0x098 */ - __u8 exc_access_id; /* 0x0a0 */ - __u8 per_access_id; /* 0x0a1 */ - __u8 op_access_id; /* 0x0a2 */ - __u8 ar_access_id; /* 0x0a3 */ - __u8 pad2[0xA8-0xA4]; /* 0x0a4 */ - addr_t trans_exc_code; /* 0x0A0 */ - addr_t monitor_code; /* 0x09c */ - __u16 subchannel_id; /* 0x0b8 */ - __u16 subchannel_nr; /* 0x0ba */ - __u32 io_int_parm; /* 0x0bc */ - __u32 io_int_word; /* 0x0c0 */ - __u8 pad3[0xc8-0xc4]; /* 0x0c4 */ - __u32 stfl_fac_list; /* 0x0c8 */ - __u8 pad4[0xe8-0xcc]; /* 0x0cc */ - __u32 mcck_interruption_code[2]; /* 0x0e8 */ - __u8 pad5[0xf4-0xf0]; /* 0x0f0 */ - __u32 external_damage_code; /* 0x0f4 */ - addr_t failing_storage_address; /* 0x0f8 */ - __u8 pad6[0x120-0x100]; /* 0x100 */ - psw_t restart_old_psw; /* 0x120 */ - psw_t external_old_psw; /* 0x130 */ - psw_t svc_old_psw; /* 0x140 */ - psw_t program_old_psw; /* 0x150 */ - psw_t mcck_old_psw; /* 0x160 */ - psw_t io_old_psw; /* 0x170 */ - __u8 pad7[0x1a0-0x180]; /* 0x180 */ - psw_t restart_psw; /* 0x1a0 */ - psw_t external_new_psw; /* 0x1b0 */ - psw_t svc_new_psw; /* 0x1c0 */ - psw_t program_new_psw; /* 0x1d0 */ - psw_t mcck_new_psw; /* 0x1e0 */ - psw_t io_new_psw; /* 0x1f0 */ - psw_t return_psw; /* 0x200 */ - __u8 irb[64]; /* 0x210 */ - __u64 sync_enter_timer; /* 0x250 */ - __u64 async_enter_timer; /* 0x258 */ - __u64 exit_timer; /* 0x260 */ - __u64 last_update_timer; /* 0x268 */ - __u64 user_timer; /* 0x270 */ - __u64 system_timer; /* 0x278 */ - __u64 last_update_clock; /* 0x280 */ - __u64 steal_clock; /* 0x288 */ - psw_t return_mcck_psw; /* 0x290 */ - __u8 pad8[0xc00-0x2a0]; /* 0x2a0 */ - /* System info area */ - __u64 save_area[16]; /* 0xc00 */ - __u8 pad9[0xd40-0xc80]; /* 0xc80 */ - __u64 kernel_stack; /* 0xd40 */ - __u64 thread_info; /* 0xd48 */ - __u64 async_stack; /* 0xd50 */ - __u64 kernel_asce; /* 0xd58 */ - __u64 user_asce; /* 0xd60 */ - __u64 panic_stack; /* 0xd68 */ - __u64 user_exec_asce; /* 0xd70 */ - __u8 pad10[0xd80-0xd78]; /* 0xd78 */ - /* entry.S sensitive area start */ - struct cpuinfo_S390 cpu_data; /* 0xd80 */ - __u32 ipl_device; /* 0xdb8 */ - __u32 pad11; /* 0xdbc */ - /* entry.S sensitive area end */ - - /* SMP info area: defined by DJB */ - __u64 clock_comparator; /* 0xdc0 */ - __u64 ext_call_fast; /* 0xdc8 */ - __u64 percpu_offset; /* 0xdd0 */ - __u64 current_task; /* 0xdd8 */ - __u32 softirq_pending; /* 0xde0 */ - __u32 pad_0x0de4; /* 0xde4 */ - __u64 int_clock; /* 0xde8 */ - __u8 pad12[0xe00-0xdf0]; /* 0xdf0 */ - - /* 0xe00 is used as indicator for dump tools */ - /* whether the kernel died with panic() or not */ - __u32 panic_magic; /* 0xe00 */ - - __u8 pad13[0x11b8-0xe04]; /* 0xe04 */ - - /* 64 bit extparam used for pfault, diag 250 etc */ - __u64 ext_params2; /* 0x11B8 */ - - __u8 pad14[0x1200-0x11C0]; /* 0x11C0 */ - - /* System info area */ - - __u64 floating_pt_save_area[16]; /* 0x1200 */ - __u64 gpregs_save_area[16]; /* 0x1280 */ - __u32 st_status_fixed_logout[4]; /* 0x1300 */ - __u8 pad15[0x1318-0x1310]; /* 0x1310 */ - __u32 prefixreg_save_area; /* 0x1318 */ - __u32 fpt_creg_save_area; /* 0x131c */ - __u8 pad16[0x1324-0x1320]; /* 0x1320 */ - __u32 tod_progreg_save_area; /* 0x1324 */ - __u32 cpu_timer_save_area[2]; /* 0x1328 */ - __u32 clock_comp_save_area[2]; /* 0x1330 */ - __u8 pad17[0x1340-0x1338]; /* 0x1338 */ - __u32 access_regs_save_area[16]; /* 0x1340 */ - __u64 cregs_save_area[16]; /* 0x1380 */ - - /* align to the top of the prefix area */ - - __u8 pad18[0x2000-0x1400]; /* 0x1400 */ -#endif /* !__s390x__ */ -} __attribute__((packed)); /* End structure*/ - -#define S390_lowcore (*((struct _lowcore *) 0)) -extern struct _lowcore *lowcore_ptr[]; - -static inline void set_prefix(__u32 address) -{ - asm volatile("spx %0" : : "m" (address) : "memory"); -} - -static inline __u32 store_prefix(void) -{ - __u32 address; - - asm volatile("stpx %0" : "=m" (address)); - return address; -} - -#define __PANIC_MAGIC 0xDEADC0DE - -#endif - -#endif diff --git a/include/asm-s390/mathemu.h b/include/asm-s390/mathemu.h deleted file mode 100644 index e8dd1ba..0000000 --- a/include/asm-s390/mathemu.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * arch/s390/kernel/mathemu.h - * IEEE floating point emulation. - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - */ - -#ifndef __MATHEMU__ -#define __MATHEMU__ - -extern int math_emu_b3(__u8 *, struct pt_regs *); -extern int math_emu_ed(__u8 *, struct pt_regs *); -extern int math_emu_ldr(__u8 *); -extern int math_emu_ler(__u8 *); -extern int math_emu_std(__u8 *, struct pt_regs *); -extern int math_emu_ld(__u8 *, struct pt_regs *); -extern int math_emu_ste(__u8 *, struct pt_regs *); -extern int math_emu_le(__u8 *, struct pt_regs *); -extern int math_emu_lfpc(__u8 *, struct pt_regs *); -extern int math_emu_stfpc(__u8 *, struct pt_regs *); -extern int math_emu_srnm(__u8 *, struct pt_regs *); - -#endif /* __MATHEMU__ */ - - - - diff --git a/include/asm-s390/mman.h b/include/asm-s390/mman.h deleted file mode 100644 index 7839767..0000000 --- a/include/asm-s390/mman.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-s390/mman.h - * - * S390 version - * - * Derived from "include/asm-i386/mman.h" - */ - -#ifndef __S390_MMAN_H__ -#define __S390_MMAN_H__ - -#include - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ -#define MAP_LOCKED 0x2000 /* pages are locked */ -#define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#endif /* __S390_MMAN_H__ */ diff --git a/include/asm-s390/mmu.h b/include/asm-s390/mmu.h deleted file mode 100644 index 5dd5e7b..0000000 --- a/include/asm-s390/mmu.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __MMU_H -#define __MMU_H - -typedef struct { - struct list_head crst_list; - struct list_head pgtable_list; - unsigned long asce_bits; - unsigned long asce_limit; - int noexec; - int pgstes; -} mm_context_t; - -#endif diff --git a/include/asm-s390/mmu_context.h b/include/asm-s390/mmu_context.h deleted file mode 100644 index 4c2fbf4..0000000 --- a/include/asm-s390/mmu_context.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * include/asm-s390/mmu_context.h - * - * S390 version - * - * Derived from "include/asm-i386/mmu_context.h" - */ - -#ifndef __S390_MMU_CONTEXT_H -#define __S390_MMU_CONTEXT_H - -#include -#include -#include - -static inline int init_new_context(struct task_struct *tsk, - struct mm_struct *mm) -{ - mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; -#ifdef CONFIG_64BIT - mm->context.asce_bits |= _ASCE_TYPE_REGION3; -#endif - if (current->mm->context.pgstes) { - mm->context.noexec = 0; - mm->context.pgstes = 1; - } else { - mm->context.noexec = s390_noexec; - mm->context.pgstes = 0; - } - mm->context.asce_limit = STACK_TOP_MAX; - crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); - return 0; -} - -#define destroy_context(mm) do { } while (0) - -#ifndef __s390x__ -#define LCTL_OPCODE "lctl" -#else -#define LCTL_OPCODE "lctlg" -#endif - -static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk) -{ - pgd_t *pgd = mm->pgd; - - S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd); - if (switch_amode) { - /* Load primary space page table origin. */ - pgd = mm->context.noexec ? get_shadow_table(pgd) : pgd; - S390_lowcore.user_exec_asce = mm->context.asce_bits | __pa(pgd); - asm volatile(LCTL_OPCODE" 1,1,%0\n" - : : "m" (S390_lowcore.user_exec_asce) ); - } else - /* Load home space page table origin. */ - asm volatile(LCTL_OPCODE" 13,13,%0" - : : "m" (S390_lowcore.user_asce) ); - set_fs(current->thread.mm_segment); -} - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, - struct task_struct *tsk) -{ - cpu_set(smp_processor_id(), next->cpu_vm_mask); - update_mm(next, tsk); -} - -#define enter_lazy_tlb(mm,tsk) do { } while (0) -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev, - struct mm_struct *next) -{ - switch_mm(prev, next, current); -} - -#endif /* __S390_MMU_CONTEXT_H */ diff --git a/include/asm-s390/module.h b/include/asm-s390/module.h deleted file mode 100644 index 1cc1c5a..0000000 --- a/include/asm-s390/module.h +++ /dev/null @@ -1,46 +0,0 @@ -#ifndef _ASM_S390_MODULE_H -#define _ASM_S390_MODULE_H -/* - * This file contains the s390 architecture specific module code. - */ - -struct mod_arch_syminfo -{ - unsigned long got_offset; - unsigned long plt_offset; - int got_initialized; - int plt_initialized; -}; - -struct mod_arch_specific -{ - /* Starting offset of got in the module core memory. */ - unsigned long got_offset; - /* Starting offset of plt in the module core memory. */ - unsigned long plt_offset; - /* Size of the got. */ - unsigned long got_size; - /* Size of the plt. */ - unsigned long plt_size; - /* Number of symbols in syminfo. */ - int nsyms; - /* Additional symbol information (got and plt offsets). */ - struct mod_arch_syminfo *syminfo; -}; - -#ifdef __s390x__ -#define ElfW(x) Elf64_ ## x -#define ELFW(x) ELF64_ ## x -#else -#define ElfW(x) Elf32_ ## x -#define ELFW(x) ELF32_ ## x -#endif - -#define Elf_Addr ElfW(Addr) -#define Elf_Rela ElfW(Rela) -#define Elf_Shdr ElfW(Shdr) -#define Elf_Sym ElfW(Sym) -#define Elf_Ehdr ElfW(Ehdr) -#define ELF_R_SYM ELFW(R_SYM) -#define ELF_R_TYPE ELFW(R_TYPE) -#endif /* _ASM_S390_MODULE_H */ diff --git a/include/asm-s390/monwriter.h b/include/asm-s390/monwriter.h deleted file mode 100644 index f0cbf96..0000000 --- a/include/asm-s390/monwriter.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-s390/monwriter.h - * - * Copyright (C) IBM Corp. 2006 - * Character device driver for writing z/VM APPLDATA monitor records - * Version 1.0 - * Author(s): Melissa Howland - * - */ - -#ifndef _ASM_390_MONWRITER_H -#define _ASM_390_MONWRITER_H - -/* mon_function values */ -#define MONWRITE_START_INTERVAL 0x00 /* start interval recording */ -#define MONWRITE_STOP_INTERVAL 0x01 /* stop interval or config recording */ -#define MONWRITE_GEN_EVENT 0x02 /* generate event record */ -#define MONWRITE_START_CONFIG 0x03 /* start configuration recording */ - -/* the header the app uses in its write() data */ -struct monwrite_hdr { - unsigned char mon_function; - unsigned short applid; - unsigned char record_num; - unsigned short version; - unsigned short release; - unsigned short mod_level; - unsigned short datalen; - unsigned char hdrlen; - -} __attribute__((packed)); - -#endif /* _ASM_390_MONWRITER_H */ diff --git a/include/asm-s390/msgbuf.h b/include/asm-s390/msgbuf.h deleted file mode 100644 index 1bbdee9..0000000 --- a/include/asm-s390/msgbuf.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef _S390_MSGBUF_H -#define _S390_MSGBUF_H - -/* - * The msqid64_ds structure for S/390 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ -#ifndef __s390x__ - unsigned long __unused1; -#endif /* ! __s390x__ */ - __kernel_time_t msg_rtime; /* last msgrcv time */ -#ifndef __s390x__ - unsigned long __unused2; -#endif /* ! __s390x__ */ - __kernel_time_t msg_ctime; /* last change time */ -#ifndef __s390x__ - unsigned long __unused3; -#endif /* ! __s390x__ */ - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* _S390_MSGBUF_H */ diff --git a/include/asm-s390/mutex.h b/include/asm-s390/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-s390/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h deleted file mode 100644 index 991ba93..0000000 --- a/include/asm-s390/page.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * include/asm-s390/page.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com) - */ - -#ifndef _S390_PAGE_H -#define _S390_PAGE_H - -#include -#include - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) -#define PAGE_DEFAULT_ACC 0 -#define PAGE_DEFAULT_KEY (PAGE_DEFAULT_ACC << 4) - -#define HPAGE_SHIFT 20 -#define HPAGE_SIZE (1UL << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) - -#define ARCH_HAS_SETCLEAR_HUGE_PTE -#define ARCH_HAS_HUGE_PTE_TYPE -#define ARCH_HAS_PREPARE_HUGEPAGE -#define ARCH_HAS_HUGEPAGE_CLEAR_FLUSH - -#include -#ifndef __ASSEMBLY__ - -static inline void clear_page(void *page) -{ - if (MACHINE_HAS_PFMF) { - asm volatile( - " .insn rre,0xb9af0000,%0,%1" - : : "d" (0x10000), "a" (page) : "memory", "cc"); - } else { - register unsigned long reg1 asm ("1") = 0; - register void *reg2 asm ("2") = page; - register unsigned long reg3 asm ("3") = 4096; - asm volatile( - " mvcl 2,0" - : "+d" (reg2), "+d" (reg3) : "d" (reg1) - : "memory", "cc"); - } -} - -static inline void copy_page(void *to, void *from) -{ - if (MACHINE_HAS_MVPG) { - register unsigned long reg0 asm ("0") = 0; - asm volatile( - " mvpg %0,%1" - : : "a" (to), "a" (from), "d" (reg0) - : "memory", "cc"); - } else - asm volatile( - " mvc 0(256,%0),0(%1)\n" - " mvc 256(256,%0),256(%1)\n" - " mvc 512(256,%0),512(%1)\n" - " mvc 768(256,%0),768(%1)\n" - " mvc 1024(256,%0),1024(%1)\n" - " mvc 1280(256,%0),1280(%1)\n" - " mvc 1536(256,%0),1536(%1)\n" - " mvc 1792(256,%0),1792(%1)\n" - " mvc 2048(256,%0),2048(%1)\n" - " mvc 2304(256,%0),2304(%1)\n" - " mvc 2560(256,%0),2560(%1)\n" - " mvc 2816(256,%0),2816(%1)\n" - " mvc 3072(256,%0),3072(%1)\n" - " mvc 3328(256,%0),3328(%1)\n" - " mvc 3584(256,%0),3584(%1)\n" - " mvc 3840(256,%0),3840(%1)\n" - : : "a" (to), "a" (from) : "memory"); -} - -#define clear_user_page(page, vaddr, pg) clear_page(page) -#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) - -#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \ - alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) -#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE - -/* - * These are used to make use of C type-checking.. - */ - -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pud; } pud_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef pte_t *pgtable_t; - -#define pgprot_val(x) ((x).pgprot) -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) -#define pud_val(x) ((x).pud) -#define pgd_val(x) ((x).pgd) - -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgd(x) ((pgd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -/* default storage key used for all pages */ -extern unsigned int default_storage_key; - -static inline void -page_set_storage_key(unsigned long addr, unsigned int skey) -{ - asm volatile("sske %0,%1" : : "d" (skey), "a" (addr)); -} - -static inline unsigned int -page_get_storage_key(unsigned long addr) -{ - unsigned int skey; - - asm volatile("iske %0,%1" : "=d" (skey) : "a" (addr), "0" (0)); - return skey; -} - -#ifdef CONFIG_PAGE_STATES - -struct page; -void arch_free_page(struct page *page, int order); -void arch_alloc_page(struct page *page, int order); - -#define HAVE_ARCH_FREE_PAGE -#define HAVE_ARCH_ALLOC_PAGE - -#endif - -#endif /* !__ASSEMBLY__ */ - -#define __PAGE_OFFSET 0x0UL -#define PAGE_OFFSET 0x0UL -#define __pa(x) (unsigned long)(x) -#define __va(x) (void *)(unsigned long)(x) -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include -#include - -#endif /* _S390_PAGE_H */ diff --git a/include/asm-s390/param.h b/include/asm-s390/param.h deleted file mode 100644 index 34aaa46..0000000 --- a/include/asm-s390/param.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * include/asm-s390/param.h - * - * S390 version - * - * Derived from "include/asm-i386/param.h" - */ - -#ifndef _ASMS390_PARAM_H -#define _ASMS390_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ /* Internal kernel timer frequency */ -# define USER_HZ 100 /* .. some user interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ -#endif - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif diff --git a/include/asm-s390/pci.h b/include/asm-s390/pci.h deleted file mode 100644 index 42a145c..0000000 --- a/include/asm-s390/pci.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_S390_PCI_H -#define __ASM_S390_PCI_H - -/* S/390 systems don't have a PCI bus. This file is just here because some stupid .c code - * includes it even if CONFIG_PCI is not set. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -#endif /* __ASM_S390_PCI_H */ - diff --git a/include/asm-s390/percpu.h b/include/asm-s390/percpu.h deleted file mode 100644 index 408d60b..0000000 --- a/include/asm-s390/percpu.h +++ /dev/null @@ -1,37 +0,0 @@ -#ifndef __ARCH_S390_PERCPU__ -#define __ARCH_S390_PERCPU__ - -#include -#include - -/* - * s390 uses its own implementation for per cpu data, the offset of - * the cpu local data area is cached in the cpu's lowcore memory. - * For 64 bit module code s390 forces the use of a GOT slot for the - * address of the per cpu variable. This is needed because the module - * may be more than 4G above the per cpu area. - */ -#if defined(__s390x__) && defined(MODULE) - -#define SHIFT_PERCPU_PTR(ptr,offset) (({ \ - extern int simple_identifier_##var(void); \ - unsigned long *__ptr; \ - asm ( "larl %0, %1@GOTENT" \ - : "=a" (__ptr) : "X" (ptr) ); \ - (typeof(ptr))((*__ptr) + (offset)); })) - -#else - -#define SHIFT_PERCPU_PTR(ptr, offset) (({ \ - extern int simple_identifier_##var(void); \ - unsigned long __ptr; \ - asm ( "" : "=a" (__ptr) : "0" (ptr) ); \ - (typeof(ptr)) (__ptr + (offset)); })) - -#endif - -#define __my_cpu_offset S390_lowcore.percpu_offset - -#include - -#endif /* __ARCH_S390_PERCPU__ */ diff --git a/include/asm-s390/pgalloc.h b/include/asm-s390/pgalloc.h deleted file mode 100644 index f5b2bf3..0000000 --- a/include/asm-s390/pgalloc.h +++ /dev/null @@ -1,174 +0,0 @@ -/* - * include/asm-s390/pgalloc.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com) - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/pgalloc.h" - * Copyright (C) 1994 Linus Torvalds - */ - -#ifndef _S390_PGALLOC_H -#define _S390_PGALLOC_H - -#include -#include -#include - -#define check_pgt_cache() do {} while (0) - -unsigned long *crst_table_alloc(struct mm_struct *, int); -void crst_table_free(struct mm_struct *, unsigned long *); - -unsigned long *page_table_alloc(struct mm_struct *); -void page_table_free(struct mm_struct *, unsigned long *); -void disable_noexec(struct mm_struct *, struct task_struct *); - -static inline void clear_table(unsigned long *s, unsigned long val, size_t n) -{ - *s = val; - n = (n / 256) - 1; - asm volatile( -#ifdef CONFIG_64BIT - " mvc 8(248,%0),0(%0)\n" -#else - " mvc 4(252,%0),0(%0)\n" -#endif - "0: mvc 256(256,%0),0(%0)\n" - " la %0,256(%0)\n" - " brct %1,0b\n" - : "+a" (s), "+d" (n)); -} - -static inline void crst_table_init(unsigned long *crst, unsigned long entry) -{ - clear_table(crst, entry, sizeof(unsigned long)*2048); - crst = get_shadow_table(crst); - if (crst) - clear_table(crst, entry, sizeof(unsigned long)*2048); -} - -#ifndef __s390x__ - -static inline unsigned long pgd_entry_type(struct mm_struct *mm) -{ - return _SEGMENT_ENTRY_EMPTY; -} - -#define pud_alloc_one(mm,address) ({ BUG(); ((pud_t *)2); }) -#define pud_free(mm, x) do { } while (0) - -#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); }) -#define pmd_free(mm, x) do { } while (0) - -#define pgd_populate(mm, pgd, pud) BUG() -#define pgd_populate_kernel(mm, pgd, pud) BUG() - -#define pud_populate(mm, pud, pmd) BUG() -#define pud_populate_kernel(mm, pud, pmd) BUG() - -#else /* __s390x__ */ - -static inline unsigned long pgd_entry_type(struct mm_struct *mm) -{ - if (mm->context.asce_limit <= (1UL << 31)) - return _SEGMENT_ENTRY_EMPTY; - if (mm->context.asce_limit <= (1UL << 42)) - return _REGION3_ENTRY_EMPTY; - return _REGION2_ENTRY_EMPTY; -} - -int crst_table_upgrade(struct mm_struct *, unsigned long limit); -void crst_table_downgrade(struct mm_struct *, unsigned long limit); - -static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long address) -{ - unsigned long *table = crst_table_alloc(mm, mm->context.noexec); - if (table) - crst_table_init(table, _REGION3_ENTRY_EMPTY); - return (pud_t *) table; -} -#define pud_free(mm, pud) crst_table_free(mm, (unsigned long *) pud) - -static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long vmaddr) -{ - unsigned long *table = crst_table_alloc(mm, mm->context.noexec); - if (table) - crst_table_init(table, _SEGMENT_ENTRY_EMPTY); - return (pmd_t *) table; -} -#define pmd_free(mm, pmd) crst_table_free(mm, (unsigned long *) pmd) - -static inline void pgd_populate_kernel(struct mm_struct *mm, - pgd_t *pgd, pud_t *pud) -{ - pgd_val(*pgd) = _REGION2_ENTRY | __pa(pud); -} - -static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud) -{ - pgd_populate_kernel(mm, pgd, pud); - if (mm->context.noexec) { - pgd = get_shadow_table(pgd); - pud = get_shadow_table(pud); - pgd_populate_kernel(mm, pgd, pud); - } -} - -static inline void pud_populate_kernel(struct mm_struct *mm, - pud_t *pud, pmd_t *pmd) -{ - pud_val(*pud) = _REGION3_ENTRY | __pa(pmd); -} - -static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) -{ - pud_populate_kernel(mm, pud, pmd); - if (mm->context.noexec) { - pud = get_shadow_table(pud); - pmd = get_shadow_table(pmd); - pud_populate_kernel(mm, pud, pmd); - } -} - -#endif /* __s390x__ */ - -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - INIT_LIST_HEAD(&mm->context.crst_list); - INIT_LIST_HEAD(&mm->context.pgtable_list); - return (pgd_t *) crst_table_alloc(mm, s390_noexec); -} -#define pgd_free(mm, pgd) crst_table_free(mm, (unsigned long *) pgd) - -static inline void pmd_populate_kernel(struct mm_struct *mm, - pmd_t *pmd, pte_t *pte) -{ - pmd_val(*pmd) = _SEGMENT_ENTRY + __pa(pte); -} - -static inline void pmd_populate(struct mm_struct *mm, - pmd_t *pmd, pgtable_t pte) -{ - pmd_populate_kernel(mm, pmd, pte); - if (mm->context.noexec) { - pmd = get_shadow_table(pmd); - pmd_populate_kernel(mm, pmd, pte + PTRS_PER_PTE); - } -} - -#define pmd_pgtable(pmd) \ - (pgtable_t)(pmd_val(pmd) & -sizeof(pte_t)*PTRS_PER_PTE) - -/* - * page table entry allocation/free routines. - */ -#define pte_alloc_one_kernel(mm, vmaddr) ((pte_t *) page_table_alloc(mm)) -#define pte_alloc_one(mm, vmaddr) ((pte_t *) page_table_alloc(mm)) - -#define pte_free_kernel(mm, pte) page_table_free(mm, (unsigned long *) pte) -#define pte_free(mm, pte) page_table_free(mm, (unsigned long *) pte) - -#endif /* _S390_PGALLOC_H */ diff --git a/include/asm-s390/pgtable.h b/include/asm-s390/pgtable.h deleted file mode 100644 index 0bdb704..0000000 --- a/include/asm-s390/pgtable.h +++ /dev/null @@ -1,1093 +0,0 @@ -/* - * include/asm-s390/pgtable.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com) - * Ulrich Weigand (weigand@de.ibm.com) - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/pgtable.h" - */ - -#ifndef _ASM_S390_PGTABLE_H -#define _ASM_S390_PGTABLE_H - -/* - * The Linux memory management assumes a three-level page table setup. For - * s390 31 bit we "fold" the mid level into the top-level page table, so - * that we physically have the same two-level page table as the s390 mmu - * expects in 31 bit mode. For s390 64 bit we use three of the five levels - * the hardware provides (region first and region second tables are not - * used). - * - * The "pgd_xxx()" functions are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - * - * This file contains the functions and defines necessary to modify and use - * the S390 page table tree. - */ -#ifndef __ASSEMBLY__ -#include -#include -#include -#include -#include - -extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096))); -extern void paging_init(void); -extern void vmem_map_init(void); - -/* - * The S390 doesn't have any external MMU info: the kernel page - * tables contain all the necessary information. - */ -#define update_mmu_cache(vma, address, pte) do { } while (0) - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern char empty_zero_page[PAGE_SIZE]; -#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) -#endif /* !__ASSEMBLY__ */ - -/* - * PMD_SHIFT determines the size of the area a second-level page - * table can map - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#ifndef __s390x__ -# define PMD_SHIFT 20 -# define PUD_SHIFT 20 -# define PGDIR_SHIFT 20 -#else /* __s390x__ */ -# define PMD_SHIFT 20 -# define PUD_SHIFT 31 -# define PGDIR_SHIFT 42 -#endif /* __s390x__ */ - -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PUD_SIZE (1UL << PUD_SHIFT) -#define PUD_MASK (~(PUD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* - * entries per page directory level: the S390 is two-level, so - * we don't really have any PMD directory physically. - * for S390 segment-table entries are combined to one PGD - * that leads to 1024 pte per pgd - */ -#define PTRS_PER_PTE 256 -#ifndef __s390x__ -#define PTRS_PER_PMD 1 -#define PTRS_PER_PUD 1 -#else /* __s390x__ */ -#define PTRS_PER_PMD 2048 -#define PTRS_PER_PUD 2048 -#endif /* __s390x__ */ -#define PTRS_PER_PGD 2048 - -#define FIRST_USER_ADDRESS 0 - -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e)) -#define pmd_ERROR(e) \ - printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e)) -#define pud_ERROR(e) \ - printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e)) - -#ifndef __ASSEMBLY__ -/* - * The vmalloc area will always be on the topmost area of the kernel - * mapping. We reserve 96MB (31bit) / 1GB (64bit) for vmalloc, - * which should be enough for any sane case. - * By putting vmalloc at the top, we maximise the gap between physical - * memory and vmalloc to catch misplaced memory accesses. As a side - * effect, this also makes sure that 64 bit module code cannot be used - * as system call address. - */ -#ifndef __s390x__ -#define VMALLOC_START 0x78000000UL -#define VMALLOC_END 0x7e000000UL -#define VMEM_MAP_END 0x80000000UL -#else /* __s390x__ */ -#define VMALLOC_START 0x3e000000000UL -#define VMALLOC_END 0x3e040000000UL -#define VMEM_MAP_END 0x40000000000UL -#endif /* __s390x__ */ - -/* - * VMEM_MAX_PHYS is the highest physical address that can be added to the 1:1 - * mapping. This needs to be calculated at compile time since the size of the - * VMEM_MAP is static but the size of struct page can change. - */ -#define VMEM_MAX_PAGES ((VMEM_MAP_END - VMALLOC_END) / sizeof(struct page)) -#define VMEM_MAX_PFN min(VMALLOC_START >> PAGE_SHIFT, VMEM_MAX_PAGES) -#define VMEM_MAX_PHYS ((VMEM_MAX_PFN << PAGE_SHIFT) & ~((16 << 20) - 1)) -#define vmemmap ((struct page *) VMALLOC_END) - -/* - * A 31 bit pagetable entry of S390 has following format: - * | PFRA | | OS | - * 0 0IP0 - * 00000000001111111111222222222233 - * 01234567890123456789012345678901 - * - * I Page-Invalid Bit: Page is not available for address-translation - * P Page-Protection Bit: Store access not possible for page - * - * A 31 bit segmenttable entry of S390 has following format: - * | P-table origin | |PTL - * 0 IC - * 00000000001111111111222222222233 - * 01234567890123456789012345678901 - * - * I Segment-Invalid Bit: Segment is not available for address-translation - * C Common-Segment Bit: Segment is not private (PoP 3-30) - * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256) - * - * The 31 bit segmenttable origin of S390 has following format: - * - * |S-table origin | | STL | - * X **GPS - * 00000000001111111111222222222233 - * 01234567890123456789012345678901 - * - * X Space-Switch event: - * G Segment-Invalid Bit: * - * P Private-Space Bit: Segment is not private (PoP 3-30) - * S Storage-Alteration: - * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048) - * - * A 64 bit pagetable entry of S390 has following format: - * | PFRA |0IP0| OS | - * 0000000000111111111122222222223333333333444444444455555555556666 - * 0123456789012345678901234567890123456789012345678901234567890123 - * - * I Page-Invalid Bit: Page is not available for address-translation - * P Page-Protection Bit: Store access not possible for page - * - * A 64 bit segmenttable entry of S390 has following format: - * | P-table origin | TT - * 0000000000111111111122222222223333333333444444444455555555556666 - * 0123456789012345678901234567890123456789012345678901234567890123 - * - * I Segment-Invalid Bit: Segment is not available for address-translation - * C Common-Segment Bit: Segment is not private (PoP 3-30) - * P Page-Protection Bit: Store access not possible for page - * TT Type 00 - * - * A 64 bit region table entry of S390 has following format: - * | S-table origin | TF TTTL - * 0000000000111111111122222222223333333333444444444455555555556666 - * 0123456789012345678901234567890123456789012345678901234567890123 - * - * I Segment-Invalid Bit: Segment is not available for address-translation - * TT Type 01 - * TF - * TL Table length - * - * The 64 bit regiontable origin of S390 has following format: - * | region table origon | DTTL - * 0000000000111111111122222222223333333333444444444455555555556666 - * 0123456789012345678901234567890123456789012345678901234567890123 - * - * X Space-Switch event: - * G Segment-Invalid Bit: - * P Private-Space Bit: - * S Storage-Alteration: - * R Real space - * TL Table-Length: - * - * A storage key has the following format: - * | ACC |F|R|C|0| - * 0 3 4 5 6 7 - * ACC: access key - * F : fetch protection bit - * R : referenced bit - * C : changed bit - */ - -/* Hardware bits in the page table entry */ -#define _PAGE_RO 0x200 /* HW read-only bit */ -#define _PAGE_INVALID 0x400 /* HW invalid bit */ - -/* Software bits in the page table entry */ -#define _PAGE_SWT 0x001 /* SW pte type bit t */ -#define _PAGE_SWX 0x002 /* SW pte type bit x */ -#define _PAGE_SPECIAL 0x004 /* SW associated with special page */ -#define __HAVE_ARCH_PTE_SPECIAL - -/* Set of bits not changed in pte_modify */ -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL) - -/* Six different types of pages. */ -#define _PAGE_TYPE_EMPTY 0x400 -#define _PAGE_TYPE_NONE 0x401 -#define _PAGE_TYPE_SWAP 0x403 -#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */ -#define _PAGE_TYPE_RO 0x200 -#define _PAGE_TYPE_RW 0x000 -#define _PAGE_TYPE_EX_RO 0x202 -#define _PAGE_TYPE_EX_RW 0x002 - -/* - * Only four types for huge pages, using the invalid bit and protection bit - * of a segment table entry. - */ -#define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */ -#define _HPAGE_TYPE_NONE 0x220 -#define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */ -#define _HPAGE_TYPE_RW 0x000 - -/* - * PTE type bits are rather complicated. handle_pte_fault uses pte_present, - * pte_none and pte_file to find out the pte type WITHOUT holding the page - * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to - * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs - * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards. - * This change is done while holding the lock, but the intermediate step - * of a previously valid pte with the hw invalid bit set can be observed by - * handle_pte_fault. That makes it necessary that all valid pte types with - * the hw invalid bit set must be distinguishable from the four pte types - * empty, none, swap and file. - * - * irxt ipte irxt - * _PAGE_TYPE_EMPTY 1000 -> 1000 - * _PAGE_TYPE_NONE 1001 -> 1001 - * _PAGE_TYPE_SWAP 1011 -> 1011 - * _PAGE_TYPE_FILE 11?1 -> 11?1 - * _PAGE_TYPE_RO 0100 -> 1100 - * _PAGE_TYPE_RW 0000 -> 1000 - * _PAGE_TYPE_EX_RO 0110 -> 1110 - * _PAGE_TYPE_EX_RW 0010 -> 1010 - * - * pte_none is true for bits combinations 1000, 1010, 1100, 1110 - * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001 - * pte_file is true for bits combinations 1101, 1111 - * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid. - */ - -/* Page status table bits for virtualization */ -#define RCP_PCL_BIT 55 -#define RCP_HR_BIT 54 -#define RCP_HC_BIT 53 -#define RCP_GR_BIT 50 -#define RCP_GC_BIT 49 - -#ifndef __s390x__ - -/* Bits in the segment table address-space-control-element */ -#define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */ -#define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */ -#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */ -#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */ -#define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */ - -/* Bits in the segment table entry */ -#define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */ -#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */ -#define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */ -#define _SEGMENT_ENTRY_PTL 0x0f /* page table length */ - -#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL) -#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV) - -#else /* __s390x__ */ - -/* Bits in the segment/region table address-space-control-element */ -#define _ASCE_ORIGIN ~0xfffUL/* segment table origin */ -#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */ -#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */ -#define _ASCE_SPACE_SWITCH 0x40 /* space switch event */ -#define _ASCE_REAL_SPACE 0x20 /* real space control */ -#define _ASCE_TYPE_MASK 0x0c /* asce table type mask */ -#define _ASCE_TYPE_REGION1 0x0c /* region first table type */ -#define _ASCE_TYPE_REGION2 0x08 /* region second table type */ -#define _ASCE_TYPE_REGION3 0x04 /* region third table type */ -#define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */ -#define _ASCE_TABLE_LENGTH 0x03 /* region table length */ - -/* Bits in the region table entry */ -#define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */ -#define _REGION_ENTRY_INV 0x20 /* invalid region table entry */ -#define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */ -#define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */ -#define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */ -#define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */ -#define _REGION_ENTRY_LENGTH 0x03 /* region third length */ - -#define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH) -#define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV) -#define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH) -#define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV) -#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH) -#define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV) - -/* Bits in the segment table entry */ -#define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */ -#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */ -#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */ - -#define _SEGMENT_ENTRY (0) -#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV) - -#define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */ -#define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */ - -#endif /* __s390x__ */ - -/* - * A user page table pointer has the space-switch-event bit, the - * private-space-control bit and the storage-alteration-event-control - * bit set. A kernel page table pointer doesn't need them. - */ -#define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \ - _ASCE_ALT_EVENT) - -/* Bits int the storage key */ -#define _PAGE_CHANGED 0x02 /* HW changed bit */ -#define _PAGE_REFERENCED 0x04 /* HW referenced bit */ - -/* - * Page protection definitions. - */ -#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE) -#define PAGE_RO __pgprot(_PAGE_TYPE_RO) -#define PAGE_RW __pgprot(_PAGE_TYPE_RW) -#define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO) -#define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW) - -#define PAGE_KERNEL PAGE_RW -#define PAGE_COPY PAGE_RO - -/* - * Dependent on the EXEC_PROTECT option s390 can do execute protection. - * Write permission always implies read permission. In theory with a - * primary/secondary page table execute only can be implemented but - * it would cost an additional bit in the pte to distinguish all the - * different pte types. To avoid that execute permission currently - * implies read permission as well. - */ - /*xwr*/ -#define __P000 PAGE_NONE -#define __P001 PAGE_RO -#define __P010 PAGE_RO -#define __P011 PAGE_RO -#define __P100 PAGE_EX_RO -#define __P101 PAGE_EX_RO -#define __P110 PAGE_EX_RO -#define __P111 PAGE_EX_RO - -#define __S000 PAGE_NONE -#define __S001 PAGE_RO -#define __S010 PAGE_RW -#define __S011 PAGE_RW -#define __S100 PAGE_EX_RO -#define __S101 PAGE_EX_RO -#define __S110 PAGE_EX_RW -#define __S111 PAGE_EX_RW - -#ifndef __s390x__ -# define PxD_SHADOW_SHIFT 1 -#else /* __s390x__ */ -# define PxD_SHADOW_SHIFT 2 -#endif /* __s390x__ */ - -static inline void *get_shadow_table(void *table) -{ - unsigned long addr, offset; - struct page *page; - - addr = (unsigned long) table; - offset = addr & ((PAGE_SIZE << PxD_SHADOW_SHIFT) - 1); - page = virt_to_page((void *)(addr ^ offset)); - return (void *)(addr_t)(page->index ? (page->index | offset) : 0UL); -} - -/* - * Certain architectures need to do special things when PTEs - * within a page table are directly modified. Thus, the following - * hook is made available. - */ -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t entry) -{ - *ptep = entry; - if (mm->context.noexec) { - if (!(pte_val(entry) & _PAGE_INVALID) && - (pte_val(entry) & _PAGE_SWX)) - pte_val(entry) |= _PAGE_RO; - else - pte_val(entry) = _PAGE_TYPE_EMPTY; - ptep[PTRS_PER_PTE] = entry; - } -} - -/* - * pgd/pmd/pte query functions - */ -#ifndef __s390x__ - -static inline int pgd_present(pgd_t pgd) { return 1; } -static inline int pgd_none(pgd_t pgd) { return 0; } -static inline int pgd_bad(pgd_t pgd) { return 0; } - -static inline int pud_present(pud_t pud) { return 1; } -static inline int pud_none(pud_t pud) { return 0; } -static inline int pud_bad(pud_t pud) { return 0; } - -#else /* __s390x__ */ - -static inline int pgd_present(pgd_t pgd) -{ - if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2) - return 1; - return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL; -} - -static inline int pgd_none(pgd_t pgd) -{ - if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2) - return 0; - return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL; -} - -static inline int pgd_bad(pgd_t pgd) -{ - /* - * With dynamic page table levels the pgd can be a region table - * entry or a segment table entry. Check for the bit that are - * invalid for either table entry. - */ - unsigned long mask = - ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV & - ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH; - return (pgd_val(pgd) & mask) != 0; -} - -static inline int pud_present(pud_t pud) -{ - if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3) - return 1; - return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL; -} - -static inline int pud_none(pud_t pud) -{ - if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3) - return 0; - return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL; -} - -static inline int pud_bad(pud_t pud) -{ - /* - * With dynamic page table levels the pud can be a region table - * entry or a segment table entry. Check for the bit that are - * invalid for either table entry. - */ - unsigned long mask = - ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV & - ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH; - return (pud_val(pud) & mask) != 0; -} - -#endif /* __s390x__ */ - -static inline int pmd_present(pmd_t pmd) -{ - return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL; -} - -static inline int pmd_none(pmd_t pmd) -{ - return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL; -} - -static inline int pmd_bad(pmd_t pmd) -{ - unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV; - return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY; -} - -static inline int pte_none(pte_t pte) -{ - return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT); -} - -static inline int pte_present(pte_t pte) -{ - unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX; - return (pte_val(pte) & mask) == _PAGE_TYPE_NONE || - (!(pte_val(pte) & _PAGE_INVALID) && - !(pte_val(pte) & _PAGE_SWT)); -} - -static inline int pte_file(pte_t pte) -{ - unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT; - return (pte_val(pte) & mask) == _PAGE_TYPE_FILE; -} - -static inline int pte_special(pte_t pte) -{ - return (pte_val(pte) & _PAGE_SPECIAL); -} - -#define __HAVE_ARCH_PTE_SAME -#define pte_same(a,b) (pte_val(a) == pte_val(b)) - -static inline void rcp_lock(pte_t *ptep) -{ -#ifdef CONFIG_PGSTE - unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE); - preempt_disable(); - while (test_and_set_bit(RCP_PCL_BIT, pgste)) - ; -#endif -} - -static inline void rcp_unlock(pte_t *ptep) -{ -#ifdef CONFIG_PGSTE - unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE); - clear_bit(RCP_PCL_BIT, pgste); - preempt_enable(); -#endif -} - -/* forward declaration for SetPageUptodate in page-flags.h*/ -static inline void page_clear_dirty(struct page *page); -#include - -static inline void ptep_rcp_copy(pte_t *ptep) -{ -#ifdef CONFIG_PGSTE - struct page *page = virt_to_page(pte_val(*ptep)); - unsigned int skey; - unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE); - - skey = page_get_storage_key(page_to_phys(page)); - if (skey & _PAGE_CHANGED) - set_bit_simple(RCP_GC_BIT, pgste); - if (skey & _PAGE_REFERENCED) - set_bit_simple(RCP_GR_BIT, pgste); - if (test_and_clear_bit_simple(RCP_HC_BIT, pgste)) - SetPageDirty(page); - if (test_and_clear_bit_simple(RCP_HR_BIT, pgste)) - SetPageReferenced(page); -#endif -} - -/* - * query functions pte_write/pte_dirty/pte_young only work if - * pte_present() is true. Undefined behaviour if not.. - */ -static inline int pte_write(pte_t pte) -{ - return (pte_val(pte) & _PAGE_RO) == 0; -} - -static inline int pte_dirty(pte_t pte) -{ - /* A pte is neither clean nor dirty on s/390. The dirty bit - * is in the storage key. See page_test_and_clear_dirty for - * details. - */ - return 0; -} - -static inline int pte_young(pte_t pte) -{ - /* A pte is neither young nor old on s/390. The young bit - * is in the storage key. See page_test_and_clear_young for - * details. - */ - return 0; -} - -/* - * pgd/pmd/pte modification functions - */ - -#ifndef __s390x__ - -#define pgd_clear(pgd) do { } while (0) -#define pud_clear(pud) do { } while (0) - -#else /* __s390x__ */ - -static inline void pgd_clear_kernel(pgd_t * pgd) -{ - if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2) - pgd_val(*pgd) = _REGION2_ENTRY_EMPTY; -} - -static inline void pgd_clear(pgd_t * pgd) -{ - pgd_t *shadow = get_shadow_table(pgd); - - pgd_clear_kernel(pgd); - if (shadow) - pgd_clear_kernel(shadow); -} - -static inline void pud_clear_kernel(pud_t *pud) -{ - if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) - pud_val(*pud) = _REGION3_ENTRY_EMPTY; -} - -static inline void pud_clear(pud_t *pud) -{ - pud_t *shadow = get_shadow_table(pud); - - pud_clear_kernel(pud); - if (shadow) - pud_clear_kernel(shadow); -} - -#endif /* __s390x__ */ - -static inline void pmd_clear_kernel(pmd_t * pmdp) -{ - pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY; -} - -static inline void pmd_clear(pmd_t *pmd) -{ - pmd_t *shadow = get_shadow_table(pmd); - - pmd_clear_kernel(pmd); - if (shadow) - pmd_clear_kernel(shadow); -} - -static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) -{ - if (mm->context.pgstes) - ptep_rcp_copy(ptep); - pte_val(*ptep) = _PAGE_TYPE_EMPTY; - if (mm->context.noexec) - pte_val(ptep[PTRS_PER_PTE]) = _PAGE_TYPE_EMPTY; -} - -/* - * The following pte modification functions only work if - * pte_present() is true. Undefined behaviour if not.. - */ -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - pte_val(pte) &= _PAGE_CHG_MASK; - pte_val(pte) |= pgprot_val(newprot); - return pte; -} - -static inline pte_t pte_wrprotect(pte_t pte) -{ - /* Do not clobber _PAGE_TYPE_NONE pages! */ - if (!(pte_val(pte) & _PAGE_INVALID)) - pte_val(pte) |= _PAGE_RO; - return pte; -} - -static inline pte_t pte_mkwrite(pte_t pte) -{ - pte_val(pte) &= ~_PAGE_RO; - return pte; -} - -static inline pte_t pte_mkclean(pte_t pte) -{ - /* The only user of pte_mkclean is the fork() code. - We must *not* clear the *physical* page dirty bit - just because fork() wants to clear the dirty bit in - *one* of the page's mappings. So we just do nothing. */ - return pte; -} - -static inline pte_t pte_mkdirty(pte_t pte) -{ - /* We do not explicitly set the dirty bit because the - * sske instruction is slow. It is faster to let the - * next instruction set the dirty bit. - */ - return pte; -} - -static inline pte_t pte_mkold(pte_t pte) -{ - /* S/390 doesn't keep its dirty/referenced bit in the pte. - * There is no point in clearing the real referenced bit. - */ - return pte; -} - -static inline pte_t pte_mkyoung(pte_t pte) -{ - /* S/390 doesn't keep its dirty/referenced bit in the pte. - * There is no point in setting the real referenced bit. - */ - return pte; -} - -static inline pte_t pte_mkspecial(pte_t pte) -{ - pte_val(pte) |= _PAGE_SPECIAL; - return pte; -} - -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -#ifdef CONFIG_PGSTE - unsigned long physpage; - int young; - unsigned long *pgste; - - if (!vma->vm_mm->context.pgstes) - return 0; - physpage = pte_val(*ptep) & PAGE_MASK; - pgste = (unsigned long *) (ptep + PTRS_PER_PTE); - - young = ((page_get_storage_key(physpage) & _PAGE_REFERENCED) != 0); - rcp_lock(ptep); - if (young) - set_bit_simple(RCP_GR_BIT, pgste); - young |= test_and_clear_bit_simple(RCP_HR_BIT, pgste); - rcp_unlock(ptep); - return young; -#endif - return 0; -} - -#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH -static inline int ptep_clear_flush_young(struct vm_area_struct *vma, - unsigned long address, pte_t *ptep) -{ - /* No need to flush TLB - * On s390 reference bits are in storage key and never in TLB - * With virtualization we handle the reference bit, without we - * we can simply return */ -#ifdef CONFIG_PGSTE - return ptep_test_and_clear_young(vma, address, ptep); -#endif - return 0; -} - -static inline void __ptep_ipte(unsigned long address, pte_t *ptep) -{ - if (!(pte_val(*ptep) & _PAGE_INVALID)) { -#ifndef __s390x__ - /* pto must point to the start of the segment table */ - pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00); -#else - /* ipte in zarch mode can do the math */ - pte_t *pto = ptep; -#endif - asm volatile( - " ipte %2,%3" - : "=m" (*ptep) : "m" (*ptep), - "a" (pto), "a" (address)); - } -} - -static inline void ptep_invalidate(struct mm_struct *mm, - unsigned long address, pte_t *ptep) -{ - if (mm->context.pgstes) { - rcp_lock(ptep); - __ptep_ipte(address, ptep); - ptep_rcp_copy(ptep); - pte_val(*ptep) = _PAGE_TYPE_EMPTY; - rcp_unlock(ptep); - return; - } - __ptep_ipte(address, ptep); - pte_val(*ptep) = _PAGE_TYPE_EMPTY; - if (mm->context.noexec) { - __ptep_ipte(address, ptep + PTRS_PER_PTE); - pte_val(*(ptep + PTRS_PER_PTE)) = _PAGE_TYPE_EMPTY; - } -} - -/* - * This is hard to understand. ptep_get_and_clear and ptep_clear_flush - * both clear the TLB for the unmapped pte. The reason is that - * ptep_get_and_clear is used in common code (e.g. change_pte_range) - * to modify an active pte. The sequence is - * 1) ptep_get_and_clear - * 2) set_pte_at - * 3) flush_tlb_range - * On s390 the tlb needs to get flushed with the modification of the pte - * if the pte is active. The only way how this can be implemented is to - * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range - * is a nop. - */ -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -#define ptep_get_and_clear(__mm, __address, __ptep) \ -({ \ - pte_t __pte = *(__ptep); \ - if (atomic_read(&(__mm)->mm_users) > 1 || \ - (__mm) != current->active_mm) \ - ptep_invalidate(__mm, __address, __ptep); \ - else \ - pte_clear((__mm), (__address), (__ptep)); \ - __pte; \ -}) - -#define __HAVE_ARCH_PTEP_CLEAR_FLUSH -static inline pte_t ptep_clear_flush(struct vm_area_struct *vma, - unsigned long address, pte_t *ptep) -{ - pte_t pte = *ptep; - ptep_invalidate(vma->vm_mm, address, ptep); - return pte; -} - -/* - * The batched pte unmap code uses ptep_get_and_clear_full to clear the - * ptes. Here an optimization is possible. tlb_gather_mmu flushes all - * tlbs of an mm if it can guarantee that the ptes of the mm_struct - * cannot be accessed while the batched unmap is running. In this case - * full==1 and a simple pte_clear is enough. See tlb.h. - */ -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL -static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, int full) -{ - pte_t pte = *ptep; - - if (full) - pte_clear(mm, addr, ptep); - else - ptep_invalidate(mm, addr, ptep); - return pte; -} - -#define __HAVE_ARCH_PTEP_SET_WRPROTECT -#define ptep_set_wrprotect(__mm, __addr, __ptep) \ -({ \ - pte_t __pte = *(__ptep); \ - if (pte_write(__pte)) { \ - if (atomic_read(&(__mm)->mm_users) > 1 || \ - (__mm) != current->active_mm) \ - ptep_invalidate(__mm, __addr, __ptep); \ - set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \ - } \ -}) - -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -#define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - ptep_invalidate((__vma)->vm_mm, __addr, __ptep); \ - set_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \ - } \ - __changed; \ -}) - -/* - * Test and clear dirty bit in storage key. - * We can't clear the changed bit atomically. This is a potential - * race against modification of the referenced bit. This function - * should therefore only be called if it is not mapped in any - * address space. - */ -#define __HAVE_ARCH_PAGE_TEST_DIRTY -static inline int page_test_dirty(struct page *page) -{ - return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0; -} - -#define __HAVE_ARCH_PAGE_CLEAR_DIRTY -static inline void page_clear_dirty(struct page *page) -{ - page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY); -} - -/* - * Test and clear referenced bit in storage key. - */ -#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG -static inline int page_test_and_clear_young(struct page *page) -{ - unsigned long physpage = page_to_phys(page); - int ccode; - - asm volatile( - " rrbe 0,%1\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (ccode) : "a" (physpage) : "cc" ); - return ccode & 2; -} - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot) -{ - pte_t __pte; - pte_val(__pte) = physpage + pgprot_val(pgprot); - return __pte; -} - -static inline pte_t mk_pte(struct page *page, pgprot_t pgprot) -{ - unsigned long physpage = page_to_phys(page); - - return mk_pte_phys(physpage, pgprot); -} - -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) -#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) -#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) -#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1)) - -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -#ifndef __s390x__ - -#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) -#define pud_deref(pmd) ({ BUG(); 0UL; }) -#define pgd_deref(pmd) ({ BUG(); 0UL; }) - -#define pud_offset(pgd, address) ((pud_t *) pgd) -#define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address)) - -#else /* __s390x__ */ - -#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) -#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN) -#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) - -static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address) -{ - pud_t *pud = (pud_t *) pgd; - if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2) - pud = (pud_t *) pgd_deref(*pgd); - return pud + pud_index(address); -} - -static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address) -{ - pmd_t *pmd = (pmd_t *) pud; - if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) - pmd = (pmd_t *) pud_deref(*pud); - return pmd + pmd_index(address); -} - -#endif /* __s390x__ */ - -#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot)) -#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT) -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT) - -/* Find an entry in the lowest level page table.. */ -#define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr)) -#define pte_offset_kernel(pmd, address) pte_offset(pmd,address) -#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) -#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address) -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -/* - * 31 bit swap entry format: - * A page-table entry has some bits we have to treat in a special way. - * Bits 0, 20 and bit 23 have to be zero, otherwise an specification - * exception will occur instead of a page translation exception. The - * specifiation exception has the bad habit not to store necessary - * information in the lowcore. - * Bit 21 and bit 22 are the page invalid bit and the page protection - * bit. We set both to indicate a swapped page. - * Bit 30 and 31 are used to distinguish the different page types. For - * a swapped page these bits need to be zero. - * This leaves the bits 1-19 and bits 24-29 to store type and offset. - * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19 - * plus 24 for the offset. - * 0| offset |0110|o|type |00| - * 0 0000000001111111111 2222 2 22222 33 - * 0 1234567890123456789 0123 4 56789 01 - * - * 64 bit swap entry format: - * A page-table entry has some bits we have to treat in a special way. - * Bits 52 and bit 55 have to be zero, otherwise an specification - * exception will occur instead of a page translation exception. The - * specifiation exception has the bad habit not to store necessary - * information in the lowcore. - * Bit 53 and bit 54 are the page invalid bit and the page protection - * bit. We set both to indicate a swapped page. - * Bit 62 and 63 are used to distinguish the different page types. For - * a swapped page these bits need to be zero. - * This leaves the bits 0-51 and bits 56-61 to store type and offset. - * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51 - * plus 56 for the offset. - * | offset |0110|o|type |00| - * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66 - * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23 - */ -#ifndef __s390x__ -#define __SWP_OFFSET_MASK (~0UL >> 12) -#else -#define __SWP_OFFSET_MASK (~0UL >> 11) -#endif -static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) -{ - pte_t pte; - offset &= __SWP_OFFSET_MASK; - pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) | - ((offset & 1UL) << 7) | ((offset & ~1UL) << 11); - return pte; -} - -#define __swp_type(entry) (((entry).val >> 2) & 0x1f) -#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1)) -#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) }) - -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -#ifndef __s390x__ -# define PTE_FILE_MAX_BITS 26 -#else /* __s390x__ */ -# define PTE_FILE_MAX_BITS 59 -#endif /* __s390x__ */ - -#define pte_to_pgoff(__pte) \ - ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f)) - -#define pgoff_to_pte(__off) \ - ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \ - | _PAGE_TYPE_FILE }) - -#endif /* !__ASSEMBLY__ */ - -#define kern_addr_valid(addr) (1) - -extern int vmem_add_mapping(unsigned long start, unsigned long size); -extern int vmem_remove_mapping(unsigned long start, unsigned long size); -extern int s390_enable_sie(void); - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -#include - -#endif /* _S390_PAGE_H */ diff --git a/include/asm-s390/poll.h b/include/asm-s390/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-s390/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/posix_types.h b/include/asm-s390/posix_types.h deleted file mode 100644 index 397d93f..0000000 --- a/include/asm-s390/posix_types.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * include/asm-s390/posix_types.h - * - * S390 version - * - * Derived from "include/asm-i386/posix_types.h" - */ - -#ifndef __ARCH_S390_POSIX_TYPES_H -#define __ARCH_S390_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned long __kernel_size_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -#ifndef __s390x__ - -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#else /* __s390x__ */ - -typedef unsigned int __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef unsigned int __kernel_nlink_t; -typedef int __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef long __kernel_ssize_t; -typedef long __kernel_ptrdiff_t; -typedef unsigned long __kernel_sigset_t; /* at least 32 bits */ -typedef __kernel_uid_t __kernel_old_uid_t; -typedef __kernel_gid_t __kernel_old_gid_t; -typedef __kernel_uid_t __kernel_uid32_t; -typedef __kernel_gid_t __kernel_gid32_t; -typedef unsigned short __kernel_old_dev_t; - -#endif /* __s390x__ */ - -typedef struct { -#if defined(__KERNEL__) || defined(__USE_ALL) - int val[2]; -#else /* !defined(__KERNEL__) && !defined(__USE_ALL)*/ - int __val[2]; -#endif /* !defined(__KERNEL__) && !defined(__USE_ALL)*/ -} __kernel_fsid_t; - - -#ifdef __KERNEL__ - -#undef __FD_SET -static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static inline int __FD_ISSET(unsigned long fd, const __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (fdsetp->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -#undef __FD_ZERO -#define __FD_ZERO(fdsetp) \ - ((void) memset ((void *) (fdsetp), 0, sizeof (__kernel_fd_set))) - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-s390/processor.h b/include/asm-s390/processor.h deleted file mode 100644 index 4af80af..0000000 --- a/include/asm-s390/processor.h +++ /dev/null @@ -1,360 +0,0 @@ -/* - * include/asm-s390/processor.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/processor.h" - * Copyright (C) 1994, Linus Torvalds - */ - -#ifndef __ASM_S390_PROCESSOR_H -#define __ASM_S390_PROCESSOR_H - -#include - -#ifdef __KERNEL__ -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; }) - -/* - * CPU type and hardware bug flags. Kept separately for each CPU. - * Members of this structure are referenced in head.S, so think twice - * before touching them. [mj] - */ - -typedef struct -{ - unsigned int version : 8; - unsigned int ident : 24; - unsigned int machine : 16; - unsigned int unused : 16; -} __attribute__ ((packed)) cpuid_t; - -static inline void get_cpu_id(cpuid_t *ptr) -{ - asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr)); -} - -struct cpuinfo_S390 -{ - cpuid_t cpu_id; - __u16 cpu_addr; - __u16 cpu_nr; - unsigned long loops_per_jiffy; - unsigned long *pgd_quick; -#ifdef __s390x__ - unsigned long *pmd_quick; -#endif /* __s390x__ */ - unsigned long *pte_quick; - unsigned long pgtable_cache_sz; -}; - -extern void s390_adjust_jiffies(void); -extern void print_cpu_info(struct cpuinfo_S390 *); -extern int get_cpu_capability(unsigned int *); - -/* - * User space process size: 2GB for 31 bit, 4TB for 64 bit. - */ -#ifndef __s390x__ - -#define TASK_SIZE (1UL << 31) -#define TASK_UNMAPPED_BASE (1UL << 30) - -#else /* __s390x__ */ - -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \ - (1UL << 31) : (1UL << 53)) -#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ - (1UL << 30) : (1UL << 41)) -#define TASK_SIZE TASK_SIZE_OF(current) - -#endif /* __s390x__ */ - -#ifdef __KERNEL__ - -#ifndef __s390x__ -#define STACK_TOP (1UL << 31) -#define STACK_TOP_MAX (1UL << 31) -#else /* __s390x__ */ -#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) -#define STACK_TOP_MAX (1UL << 42) -#endif /* __s390x__ */ - - -#endif - -#define HAVE_ARCH_PICK_MMAP_LAYOUT - -typedef struct { - __u32 ar4; -} mm_segment_t; - -/* - * Thread structure - */ -struct thread_struct { - s390_fp_regs fp_regs; - unsigned int acrs[NUM_ACRS]; - unsigned long ksp; /* kernel stack pointer */ - mm_segment_t mm_segment; - unsigned long prot_addr; /* address of protection-excep. */ - unsigned int trap_no; - per_struct per_info; - /* Used to give failing instruction back to user for ieee exceptions */ - unsigned long ieee_instruction_pointer; - /* pfault_wait is used to block the process on a pfault event */ - unsigned long pfault_wait; -}; - -typedef struct thread_struct thread_struct; - -/* - * Stack layout of a C stack frame. - */ -#ifndef __PACK_STACK -struct stack_frame { - unsigned long back_chain; - unsigned long empty1[5]; - unsigned long gprs[10]; - unsigned int empty2[8]; -}; -#else -struct stack_frame { - unsigned long empty1[5]; - unsigned int empty2[8]; - unsigned long gprs[10]; - unsigned long back_chain; -}; -#endif - -#define ARCH_MIN_TASKALIGN 8 - -#define INIT_THREAD { \ - .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \ -} - -/* - * Do necessary setup to start up a new thread. - */ -#define start_thread(regs, new_psw, new_stackp) do { \ - set_fs(USER_DS); \ - regs->psw.mask = psw_user_bits; \ - regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ - regs->gprs[15] = new_stackp; \ -} while (0) - -#define start_thread31(regs, new_psw, new_stackp) do { \ - set_fs(USER_DS); \ - regs->psw.mask = psw_user32_bits; \ - regs->psw.addr = new_psw | PSW_ADDR_AMODE; \ - regs->gprs[15] = new_stackp; \ - crst_table_downgrade(current->mm, 1UL << 31); \ -} while (0) - -/* Forward declaration, a strange C thing */ -struct task_struct; -struct mm_struct; -struct seq_file; - -/* Free all resources held by a thread. */ -extern void release_thread(struct task_struct *); -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -/* - * Return saved PC of a blocked thread. - */ -extern unsigned long thread_saved_pc(struct task_struct *t); - -/* - * Print register of task into buffer. Used in fs/proc/array.c. - */ -extern void task_show_regs(struct seq_file *m, struct task_struct *task); - -extern void show_code(struct pt_regs *regs); - -unsigned long get_wchan(struct task_struct *p); -#define task_pt_regs(tsk) ((struct pt_regs *) \ - (task_stack_page(tsk) + THREAD_SIZE) - 1) -#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr) -#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15]) - -/* - * Give up the time slice of the virtual PU. - */ -static inline void cpu_relax(void) -{ - if (MACHINE_HAS_DIAG44) - asm volatile("diag 0,0,68"); - barrier(); -} - -static inline void psw_set_key(unsigned int key) -{ - asm volatile("spka 0(%0)" : : "d" (key)); -} - -/* - * Set PSW to specified value. - */ -static inline void __load_psw(psw_t psw) -{ -#ifndef __s390x__ - asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); -#else - asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc"); -#endif -} - -/* - * Set PSW mask to specified value, while leaving the - * PSW addr pointing to the next instruction. - */ - -static inline void __load_psw_mask (unsigned long mask) -{ - unsigned long addr; - psw_t psw; - - psw.mask = mask; - -#ifndef __s390x__ - asm volatile( - " basr %0,0\n" - "0: ahi %0,1f-0b\n" - " st %0,4(%1)\n" - " lpsw 0(%1)\n" - "1:" - : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); -#else /* __s390x__ */ - asm volatile( - " larl %0,1f\n" - " stg %0,8(%1)\n" - " lpswe 0(%1)\n" - "1:" - : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc"); -#endif /* __s390x__ */ -} - -/* - * Function to stop a processor until an interruption occurred - */ -static inline void enabled_wait(void) -{ - __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT | - PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY); -} - -/* - * Function to drop a processor into disabled wait state - */ - -static inline void disabled_wait(unsigned long code) -{ - unsigned long ctl_buf; - psw_t dw_psw; - - dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT; - dw_psw.addr = code; - /* - * Store status and then load disabled wait psw, - * the processor is dead afterwards - */ -#ifndef __s390x__ - asm volatile( - " stctl 0,0,0(%2)\n" - " ni 0(%2),0xef\n" /* switch off protection */ - " lctl 0,0,0(%2)\n" - " stpt 0xd8\n" /* store timer */ - " stckc 0xe0\n" /* store clock comparator */ - " stpx 0x108\n" /* store prefix register */ - " stam 0,15,0x120\n" /* store access registers */ - " std 0,0x160\n" /* store f0 */ - " std 2,0x168\n" /* store f2 */ - " std 4,0x170\n" /* store f4 */ - " std 6,0x178\n" /* store f6 */ - " stm 0,15,0x180\n" /* store general registers */ - " stctl 0,15,0x1c0\n" /* store control registers */ - " oi 0x1c0,0x10\n" /* fake protection bit */ - " lpsw 0(%1)" - : "=m" (ctl_buf) - : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc"); -#else /* __s390x__ */ - asm volatile( - " stctg 0,0,0(%2)\n" - " ni 4(%2),0xef\n" /* switch off protection */ - " lctlg 0,0,0(%2)\n" - " lghi 1,0x1000\n" - " stpt 0x328(1)\n" /* store timer */ - " stckc 0x330(1)\n" /* store clock comparator */ - " stpx 0x318(1)\n" /* store prefix register */ - " stam 0,15,0x340(1)\n"/* store access registers */ - " stfpc 0x31c(1)\n" /* store fpu control */ - " std 0,0x200(1)\n" /* store f0 */ - " std 1,0x208(1)\n" /* store f1 */ - " std 2,0x210(1)\n" /* store f2 */ - " std 3,0x218(1)\n" /* store f3 */ - " std 4,0x220(1)\n" /* store f4 */ - " std 5,0x228(1)\n" /* store f5 */ - " std 6,0x230(1)\n" /* store f6 */ - " std 7,0x238(1)\n" /* store f7 */ - " std 8,0x240(1)\n" /* store f8 */ - " std 9,0x248(1)\n" /* store f9 */ - " std 10,0x250(1)\n" /* store f10 */ - " std 11,0x258(1)\n" /* store f11 */ - " std 12,0x260(1)\n" /* store f12 */ - " std 13,0x268(1)\n" /* store f13 */ - " std 14,0x270(1)\n" /* store f14 */ - " std 15,0x278(1)\n" /* store f15 */ - " stmg 0,15,0x280(1)\n"/* store general registers */ - " stctg 0,15,0x380(1)\n"/* store control registers */ - " oi 0x384(1),0x10\n"/* fake protection bit */ - " lpswe 0(%1)" - : "=m" (ctl_buf) - : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0"); -#endif /* __s390x__ */ -} - -/* - * Basic Machine Check/Program Check Handler. - */ - -extern void s390_base_mcck_handler(void); -extern void s390_base_pgm_handler(void); -extern void s390_base_ext_handler(void); - -extern void (*s390_base_mcck_handler_fn)(void); -extern void (*s390_base_pgm_handler_fn)(void); -extern void (*s390_base_ext_handler_fn)(void); - -#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL - -#endif - -/* - * Helper macro for exception table entries - */ -#ifndef __s390x__ -#define EX_TABLE(_fault,_target) \ - ".section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .long " #_fault "," #_target "\n" \ - ".previous\n" -#else -#define EX_TABLE(_fault,_target) \ - ".section __ex_table,\"a\"\n" \ - " .align 8\n" \ - " .quad " #_fault "," #_target "\n" \ - ".previous\n" -#endif - -#endif /* __ASM_S390_PROCESSOR_H */ diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h deleted file mode 100644 index af2c9ac..0000000 --- a/include/asm-s390/ptrace.h +++ /dev/null @@ -1,499 +0,0 @@ -/* - * include/asm-s390/ptrace.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) - */ - -#ifndef _S390_PTRACE_H -#define _S390_PTRACE_H - -/* - * Offsets in the user_regs_struct. They are used for the ptrace - * system call and in entry.S - */ -#ifndef __s390x__ - -#define PT_PSWMASK 0x00 -#define PT_PSWADDR 0x04 -#define PT_GPR0 0x08 -#define PT_GPR1 0x0C -#define PT_GPR2 0x10 -#define PT_GPR3 0x14 -#define PT_GPR4 0x18 -#define PT_GPR5 0x1C -#define PT_GPR6 0x20 -#define PT_GPR7 0x24 -#define PT_GPR8 0x28 -#define PT_GPR9 0x2C -#define PT_GPR10 0x30 -#define PT_GPR11 0x34 -#define PT_GPR12 0x38 -#define PT_GPR13 0x3C -#define PT_GPR14 0x40 -#define PT_GPR15 0x44 -#define PT_ACR0 0x48 -#define PT_ACR1 0x4C -#define PT_ACR2 0x50 -#define PT_ACR3 0x54 -#define PT_ACR4 0x58 -#define PT_ACR5 0x5C -#define PT_ACR6 0x60 -#define PT_ACR7 0x64 -#define PT_ACR8 0x68 -#define PT_ACR9 0x6C -#define PT_ACR10 0x70 -#define PT_ACR11 0x74 -#define PT_ACR12 0x78 -#define PT_ACR13 0x7C -#define PT_ACR14 0x80 -#define PT_ACR15 0x84 -#define PT_ORIGGPR2 0x88 -#define PT_FPC 0x90 -/* - * A nasty fact of life that the ptrace api - * only supports passing of longs. - */ -#define PT_FPR0_HI 0x98 -#define PT_FPR0_LO 0x9C -#define PT_FPR1_HI 0xA0 -#define PT_FPR1_LO 0xA4 -#define PT_FPR2_HI 0xA8 -#define PT_FPR2_LO 0xAC -#define PT_FPR3_HI 0xB0 -#define PT_FPR3_LO 0xB4 -#define PT_FPR4_HI 0xB8 -#define PT_FPR4_LO 0xBC -#define PT_FPR5_HI 0xC0 -#define PT_FPR5_LO 0xC4 -#define PT_FPR6_HI 0xC8 -#define PT_FPR6_LO 0xCC -#define PT_FPR7_HI 0xD0 -#define PT_FPR7_LO 0xD4 -#define PT_FPR8_HI 0xD8 -#define PT_FPR8_LO 0XDC -#define PT_FPR9_HI 0xE0 -#define PT_FPR9_LO 0xE4 -#define PT_FPR10_HI 0xE8 -#define PT_FPR10_LO 0xEC -#define PT_FPR11_HI 0xF0 -#define PT_FPR11_LO 0xF4 -#define PT_FPR12_HI 0xF8 -#define PT_FPR12_LO 0xFC -#define PT_FPR13_HI 0x100 -#define PT_FPR13_LO 0x104 -#define PT_FPR14_HI 0x108 -#define PT_FPR14_LO 0x10C -#define PT_FPR15_HI 0x110 -#define PT_FPR15_LO 0x114 -#define PT_CR_9 0x118 -#define PT_CR_10 0x11C -#define PT_CR_11 0x120 -#define PT_IEEE_IP 0x13C -#define PT_LASTOFF PT_IEEE_IP -#define PT_ENDREGS 0x140-1 - -#define GPR_SIZE 4 -#define CR_SIZE 4 - -#define STACK_FRAME_OVERHEAD 96 /* size of minimum stack frame */ - -#else /* __s390x__ */ - -#define PT_PSWMASK 0x00 -#define PT_PSWADDR 0x08 -#define PT_GPR0 0x10 -#define PT_GPR1 0x18 -#define PT_GPR2 0x20 -#define PT_GPR3 0x28 -#define PT_GPR4 0x30 -#define PT_GPR5 0x38 -#define PT_GPR6 0x40 -#define PT_GPR7 0x48 -#define PT_GPR8 0x50 -#define PT_GPR9 0x58 -#define PT_GPR10 0x60 -#define PT_GPR11 0x68 -#define PT_GPR12 0x70 -#define PT_GPR13 0x78 -#define PT_GPR14 0x80 -#define PT_GPR15 0x88 -#define PT_ACR0 0x90 -#define PT_ACR1 0x94 -#define PT_ACR2 0x98 -#define PT_ACR3 0x9C -#define PT_ACR4 0xA0 -#define PT_ACR5 0xA4 -#define PT_ACR6 0xA8 -#define PT_ACR7 0xAC -#define PT_ACR8 0xB0 -#define PT_ACR9 0xB4 -#define PT_ACR10 0xB8 -#define PT_ACR11 0xBC -#define PT_ACR12 0xC0 -#define PT_ACR13 0xC4 -#define PT_ACR14 0xC8 -#define PT_ACR15 0xCC -#define PT_ORIGGPR2 0xD0 -#define PT_FPC 0xD8 -#define PT_FPR0 0xE0 -#define PT_FPR1 0xE8 -#define PT_FPR2 0xF0 -#define PT_FPR3 0xF8 -#define PT_FPR4 0x100 -#define PT_FPR5 0x108 -#define PT_FPR6 0x110 -#define PT_FPR7 0x118 -#define PT_FPR8 0x120 -#define PT_FPR9 0x128 -#define PT_FPR10 0x130 -#define PT_FPR11 0x138 -#define PT_FPR12 0x140 -#define PT_FPR13 0x148 -#define PT_FPR14 0x150 -#define PT_FPR15 0x158 -#define PT_CR_9 0x160 -#define PT_CR_10 0x168 -#define PT_CR_11 0x170 -#define PT_IEEE_IP 0x1A8 -#define PT_LASTOFF PT_IEEE_IP -#define PT_ENDREGS 0x1B0-1 - -#define GPR_SIZE 8 -#define CR_SIZE 8 - -#define STACK_FRAME_OVERHEAD 160 /* size of minimum stack frame */ - -#endif /* __s390x__ */ - -#define NUM_GPRS 16 -#define NUM_FPRS 16 -#define NUM_CRS 16 -#define NUM_ACRS 16 - -#define FPR_SIZE 8 -#define FPC_SIZE 4 -#define FPC_PAD_SIZE 4 /* gcc insists on aligning the fpregs */ -#define ACR_SIZE 4 - - -#define PTRACE_OLDSETOPTIONS 21 - -#ifndef __ASSEMBLY__ -#include -#include - -typedef union -{ - float f; - double d; - __u64 ui; - struct - { - __u32 hi; - __u32 lo; - } fp; -} freg_t; - -typedef struct -{ - __u32 fpc; - freg_t fprs[NUM_FPRS]; -} s390_fp_regs; - -#define FPC_EXCEPTION_MASK 0xF8000000 -#define FPC_FLAGS_MASK 0x00F80000 -#define FPC_DXC_MASK 0x0000FF00 -#define FPC_RM_MASK 0x00000003 -#define FPC_VALID_MASK 0xF8F8FF03 - -/* this typedef defines how a Program Status Word looks like */ -typedef struct -{ - unsigned long mask; - unsigned long addr; -} __attribute__ ((aligned(8))) psw_t; - -typedef struct -{ - __u32 mask; - __u32 addr; -} __attribute__ ((aligned(8))) psw_compat_t; - -#ifndef __s390x__ - -#define PSW_MASK_PER 0x40000000UL -#define PSW_MASK_DAT 0x04000000UL -#define PSW_MASK_IO 0x02000000UL -#define PSW_MASK_EXT 0x01000000UL -#define PSW_MASK_KEY 0x00F00000UL -#define PSW_MASK_MCHECK 0x00040000UL -#define PSW_MASK_WAIT 0x00020000UL -#define PSW_MASK_PSTATE 0x00010000UL -#define PSW_MASK_ASC 0x0000C000UL -#define PSW_MASK_CC 0x00003000UL -#define PSW_MASK_PM 0x00000F00UL - -#define PSW_ADDR_AMODE 0x80000000UL -#define PSW_ADDR_INSN 0x7FFFFFFFUL - -#define PSW_BASE_BITS 0x00080000UL -#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 20) - -#define PSW_ASC_PRIMARY 0x00000000UL -#define PSW_ASC_ACCREG 0x00004000UL -#define PSW_ASC_SECONDARY 0x00008000UL -#define PSW_ASC_HOME 0x0000C000UL - -#else /* __s390x__ */ - -#define PSW_MASK_PER 0x4000000000000000UL -#define PSW_MASK_DAT 0x0400000000000000UL -#define PSW_MASK_IO 0x0200000000000000UL -#define PSW_MASK_EXT 0x0100000000000000UL -#define PSW_MASK_KEY 0x00F0000000000000UL -#define PSW_MASK_MCHECK 0x0004000000000000UL -#define PSW_MASK_WAIT 0x0002000000000000UL -#define PSW_MASK_PSTATE 0x0001000000000000UL -#define PSW_MASK_ASC 0x0000C00000000000UL -#define PSW_MASK_CC 0x0000300000000000UL -#define PSW_MASK_PM 0x00000F0000000000UL - -#define PSW_ADDR_AMODE 0x0000000000000000UL -#define PSW_ADDR_INSN 0xFFFFFFFFFFFFFFFFUL - -#define PSW_BASE_BITS 0x0000000180000000UL -#define PSW_BASE32_BITS 0x0000000080000000UL -#define PSW_DEFAULT_KEY (((unsigned long) PAGE_DEFAULT_ACC) << 52) - -#define PSW_ASC_PRIMARY 0x0000000000000000UL -#define PSW_ASC_ACCREG 0x0000400000000000UL -#define PSW_ASC_SECONDARY 0x0000800000000000UL -#define PSW_ASC_HOME 0x0000C00000000000UL - -extern long psw_user32_bits; - -#endif /* __s390x__ */ - -extern long psw_kernel_bits; -extern long psw_user_bits; - -/* This macro merges a NEW PSW mask specified by the user into - the currently active PSW mask CURRENT, modifying only those - bits in CURRENT that the user may be allowed to change: this - is the condition code and the program mask bits. */ -#define PSW_MASK_MERGE(CURRENT,NEW) \ - (((CURRENT) & ~(PSW_MASK_CC|PSW_MASK_PM)) | \ - ((NEW) & (PSW_MASK_CC|PSW_MASK_PM))) - -/* - * The s390_regs structure is used to define the elf_gregset_t. - */ -typedef struct -{ - psw_t psw; - unsigned long gprs[NUM_GPRS]; - unsigned int acrs[NUM_ACRS]; - unsigned long orig_gpr2; -} s390_regs; - -typedef struct -{ - psw_compat_t psw; - __u32 gprs[NUM_GPRS]; - __u32 acrs[NUM_ACRS]; - __u32 orig_gpr2; -} s390_compat_regs; - - -#ifdef __KERNEL__ -#include -#include - -/* - * The pt_regs struct defines the way the registers are stored on - * the stack during a system call. - */ -struct pt_regs -{ - unsigned long args[1]; - psw_t psw; - unsigned long gprs[NUM_GPRS]; - unsigned long orig_gpr2; - unsigned short ilc; - unsigned short trap; -}; -#endif - -/* - * Now for the program event recording (trace) definitions. - */ -typedef struct -{ - unsigned long cr[3]; -} per_cr_words; - -#define PER_EM_MASK 0xE8000000UL - -typedef struct -{ -#ifdef __s390x__ - unsigned : 32; -#endif /* __s390x__ */ - unsigned em_branching : 1; - unsigned em_instruction_fetch : 1; - /* - * Switching on storage alteration automatically fixes - * the storage alteration event bit in the users std. - */ - unsigned em_storage_alteration : 1; - unsigned em_gpr_alt_unused : 1; - unsigned em_store_real_address : 1; - unsigned : 3; - unsigned branch_addr_ctl : 1; - unsigned : 1; - unsigned storage_alt_space_ctl : 1; - unsigned : 21; - unsigned long starting_addr; - unsigned long ending_addr; -} per_cr_bits; - -typedef struct -{ - unsigned short perc_atmid; - unsigned long address; - unsigned char access_id; -} per_lowcore_words; - -typedef struct -{ - unsigned perc_branching : 1; - unsigned perc_instruction_fetch : 1; - unsigned perc_storage_alteration : 1; - unsigned perc_gpr_alt_unused : 1; - unsigned perc_store_real_address : 1; - unsigned : 3; - unsigned atmid_psw_bit_31 : 1; - unsigned atmid_validity_bit : 1; - unsigned atmid_psw_bit_32 : 1; - unsigned atmid_psw_bit_5 : 1; - unsigned atmid_psw_bit_16 : 1; - unsigned atmid_psw_bit_17 : 1; - unsigned si : 2; - unsigned long address; - unsigned : 4; - unsigned access_id : 4; -} per_lowcore_bits; - -typedef struct -{ - union { - per_cr_words words; - per_cr_bits bits; - } control_regs; - /* - * Use these flags instead of setting em_instruction_fetch - * directly they are used so that single stepping can be - * switched on & off while not affecting other tracing - */ - unsigned single_step : 1; - unsigned instruction_fetch : 1; - unsigned : 30; - /* - * These addresses are copied into cr10 & cr11 if single - * stepping is switched off - */ - unsigned long starting_addr; - unsigned long ending_addr; - union { - per_lowcore_words words; - per_lowcore_bits bits; - } lowcore; -} per_struct; - -typedef struct -{ - unsigned int len; - unsigned long kernel_addr; - unsigned long process_addr; -} ptrace_area; - -/* - * S/390 specific non posix ptrace requests. I chose unusual values so - * they are unlikely to clash with future ptrace definitions. - */ -#define PTRACE_PEEKUSR_AREA 0x5000 -#define PTRACE_POKEUSR_AREA 0x5001 -#define PTRACE_PEEKTEXT_AREA 0x5002 -#define PTRACE_PEEKDATA_AREA 0x5003 -#define PTRACE_POKETEXT_AREA 0x5004 -#define PTRACE_POKEDATA_AREA 0x5005 - -/* - * PT_PROT definition is loosely based on hppa bsd definition in - * gdb/hppab-nat.c - */ -#define PTRACE_PROT 21 - -typedef enum -{ - ptprot_set_access_watchpoint, - ptprot_set_write_watchpoint, - ptprot_disable_watchpoint -} ptprot_flags; - -typedef struct -{ - unsigned long lowaddr; - unsigned long hiaddr; - ptprot_flags prot; -} ptprot_area; - -/* Sequence of bytes for breakpoint illegal instruction. */ -#define S390_BREAKPOINT {0x0,0x1} -#define S390_BREAKPOINT_U16 ((__u16)0x0001) -#define S390_SYSCALL_OPCODE ((__u16)0x0a00) -#define S390_SYSCALL_SIZE 2 - -/* - * The user_regs_struct defines the way the user registers are - * store on the stack for signal handling. - */ -struct user_regs_struct -{ - psw_t psw; - unsigned long gprs[NUM_GPRS]; - unsigned int acrs[NUM_ACRS]; - unsigned long orig_gpr2; - s390_fp_regs fp_regs; - /* - * These per registers are in here so that gdb can modify them - * itself as there is no "official" ptrace interface for hardware - * watchpoints. This is the way intel does it. - */ - per_struct per_info; - unsigned long ieee_instruction_pointer; - /* Used to give failing instruction back to user for ieee exceptions */ -}; - -#ifdef __KERNEL__ -/* - * These are defined as per linux/ptrace.h, which see. - */ -#define arch_has_single_step() (1) -struct task_struct; -extern void user_enable_single_step(struct task_struct *); -extern void user_disable_single_step(struct task_struct *); - -#define __ARCH_WANT_COMPAT_SYS_PTRACE - -#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) -#define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN) -#define regs_return_value(regs)((regs)->gprs[2]) -#define profile_pc(regs) instruction_pointer(regs) -extern void show_regs(struct pt_regs * regs); -#endif /* __KERNEL__ */ -#endif /* __ASSEMBLY__ */ - -#endif /* _S390_PTRACE_H */ diff --git a/include/asm-s390/qdio.h b/include/asm-s390/qdio.h deleted file mode 100644 index 6813772..0000000 --- a/include/asm-s390/qdio.h +++ /dev/null @@ -1,382 +0,0 @@ -/* - * linux/include/asm-s390/qdio.h - * - * Copyright 2000,2008 IBM Corp. - * Author(s): Utz Bacher - * Jan Glauber - * - */ -#ifndef __QDIO_H__ -#define __QDIO_H__ - -#include -#include -#include - -#define QDIO_MAX_QUEUES_PER_IRQ 32 -#define QDIO_MAX_BUFFERS_PER_Q 128 -#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1) -#define QDIO_MAX_ELEMENTS_PER_BUFFER 16 -#define QDIO_SBAL_SIZE 256 - -#define QDIO_QETH_QFMT 0 -#define QDIO_ZFCP_QFMT 1 -#define QDIO_IQDIO_QFMT 2 - -/** - * struct qdesfmt0 - queue descriptor, format 0 - * @sliba: storage list information block address - * @sla: storage list address - * @slsba: storage list state block address - * @akey: access key for DLIB - * @bkey: access key for SL - * @ckey: access key for SBALs - * @dkey: access key for SLSB - */ -struct qdesfmt0 { - u64 sliba; - u64 sla; - u64 slsba; - u32 : 32; - u32 akey : 4; - u32 bkey : 4; - u32 ckey : 4; - u32 dkey : 4; - u32 : 16; -} __attribute__ ((packed)); - -/** - * struct qdr - queue description record (QDR) - * @qfmt: queue format - * @pfmt: implementation dependent parameter format - * @ac: adapter characteristics - * @iqdcnt: input queue descriptor count - * @oqdcnt: output queue descriptor count - * @iqdsz: inpout queue descriptor size - * @oqdsz: output queue descriptor size - * @qiba: queue information block address - * @qkey: queue information block key - * @qdf0: queue descriptions - */ -struct qdr { - u32 qfmt : 8; - u32 pfmt : 8; - u32 : 8; - u32 ac : 8; - u32 : 8; - u32 iqdcnt : 8; - u32 : 8; - u32 oqdcnt : 8; - u32 : 8; - u32 iqdsz : 8; - u32 : 8; - u32 oqdsz : 8; - /* private: */ - u32 res[9]; - /* public: */ - u64 qiba; - u32 : 32; - u32 qkey : 4; - u32 : 28; - struct qdesfmt0 qdf0[126]; -} __attribute__ ((packed, aligned(4096))); - -#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40 -#define QIB_RFLAGS_ENABLE_QEBSM 0x80 - -/** - * struct qib - queue information block (QIB) - * @qfmt: queue format - * @pfmt: implementation dependent parameter format - * @rflags: QEBSM - * @ac: adapter characteristics - * @isliba: absolute address of first input SLIB - * @osliba: absolute address of first output SLIB - * @ebcnam: adapter identifier in EBCDIC - * @parm: implementation dependent parameters - */ -struct qib { - u32 qfmt : 8; - u32 pfmt : 8; - u32 rflags : 8; - u32 ac : 8; - u32 : 32; - u64 isliba; - u64 osliba; - u32 : 32; - u32 : 32; - u8 ebcnam[8]; - /* private: */ - u8 res[88]; - /* public: */ - u8 parm[QDIO_MAX_BUFFERS_PER_Q]; -} __attribute__ ((packed, aligned(256))); - -/** - * struct slibe - storage list information block element (SLIBE) - * @parms: implementation dependent parameters - */ -struct slibe { - u64 parms; -}; - -/** - * struct slib - storage list information block (SLIB) - * @nsliba: next SLIB address (if any) - * @sla: SL address - * @slsba: SLSB address - * @slibe: SLIB elements - */ -struct slib { - u64 nsliba; - u64 sla; - u64 slsba; - /* private: */ - u8 res[1000]; - /* public: */ - struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q]; -} __attribute__ ((packed, aligned(2048))); - -/** - * struct sbal_flags - storage block address list flags - * @last: last entry - * @cont: contiguous storage - * @frag: fragmentation - */ -struct sbal_flags { - u8 : 1; - u8 last : 1; - u8 cont : 1; - u8 : 1; - u8 frag : 2; - u8 : 2; -} __attribute__ ((packed)); - -#define SBAL_FLAGS_FIRST_FRAG 0x04000000UL -#define SBAL_FLAGS_MIDDLE_FRAG 0x08000000UL -#define SBAL_FLAGS_LAST_FRAG 0x0c000000UL -#define SBAL_FLAGS_LAST_ENTRY 0x40000000UL -#define SBAL_FLAGS_CONTIGUOUS 0x20000000UL - -#define SBAL_FLAGS0_DATA_CONTINUATION 0x20UL - -/* Awesome OpenFCP extensions */ -#define SBAL_FLAGS0_TYPE_STATUS 0x00UL -#define SBAL_FLAGS0_TYPE_WRITE 0x08UL -#define SBAL_FLAGS0_TYPE_READ 0x10UL -#define SBAL_FLAGS0_TYPE_WRITE_READ 0x18UL -#define SBAL_FLAGS0_MORE_SBALS 0x04UL -#define SBAL_FLAGS0_COMMAND 0x02UL -#define SBAL_FLAGS0_LAST_SBAL 0x00UL -#define SBAL_FLAGS0_ONLY_SBAL SBAL_FLAGS0_COMMAND -#define SBAL_FLAGS0_MIDDLE_SBAL SBAL_FLAGS0_MORE_SBALS -#define SBAL_FLAGS0_FIRST_SBAL SBAL_FLAGS0_MORE_SBALS | SBAL_FLAGS0_COMMAND -#define SBAL_FLAGS0_PCI 0x40 - -/** - * struct sbal_sbalf_0 - sbal flags for sbale 0 - * @pci: PCI indicator - * @cont: data continuation - * @sbtype: storage-block type (FCP) - */ -struct sbal_sbalf_0 { - u8 : 1; - u8 pci : 1; - u8 cont : 1; - u8 sbtype : 2; - u8 : 3; -} __attribute__ ((packed)); - -/** - * struct sbal_sbalf_1 - sbal flags for sbale 1 - * @key: storage key - */ -struct sbal_sbalf_1 { - u8 : 4; - u8 key : 4; -} __attribute__ ((packed)); - -/** - * struct sbal_sbalf_14 - sbal flags for sbale 14 - * @erridx: error index - */ -struct sbal_sbalf_14 { - u8 : 4; - u8 erridx : 4; -} __attribute__ ((packed)); - -/** - * struct sbal_sbalf_15 - sbal flags for sbale 15 - * @reason: reason for error state - */ -struct sbal_sbalf_15 { - u8 reason; -} __attribute__ ((packed)); - -/** - * union sbal_sbalf - storage block address list flags - * @i0: sbalf0 - * @i1: sbalf1 - * @i14: sbalf14 - * @i15: sblaf15 - * @value: raw value - */ -union sbal_sbalf { - struct sbal_sbalf_0 i0; - struct sbal_sbalf_1 i1; - struct sbal_sbalf_14 i14; - struct sbal_sbalf_15 i15; - u8 value; -}; - -/** - * struct qdio_buffer_element - SBAL entry - * @flags: flags - * @length: length - * @addr: address -*/ -struct qdio_buffer_element { - u32 flags; - u32 length; -#ifdef CONFIG_32BIT - /* private: */ - void *reserved; - /* public: */ -#endif - void *addr; -} __attribute__ ((packed, aligned(16))); - -/** - * struct qdio_buffer - storage block address list (SBAL) - * @element: SBAL entries - */ -struct qdio_buffer { - struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER]; -} __attribute__ ((packed, aligned(256))); - -/** - * struct sl_element - storage list entry - * @sbal: absolute SBAL address - */ -struct sl_element { -#ifdef CONFIG_32BIT - /* private: */ - unsigned long reserved; - /* public: */ -#endif - unsigned long sbal; -} __attribute__ ((packed)); - -/** - * struct sl - storage list (SL) - * @element: SL entries - */ -struct sl { - struct sl_element element[QDIO_MAX_BUFFERS_PER_Q]; -} __attribute__ ((packed, aligned(1024))); - -/** - * struct slsb - storage list state block (SLSB) - * @val: state per buffer - */ -struct slsb { - u8 val[QDIO_MAX_BUFFERS_PER_Q]; -} __attribute__ ((packed, aligned(256))); - -struct qdio_ssqd_desc { - u8 flags; - u8:8; - u16 sch; - u8 qfmt; - u8 parm; - u8 qdioac1; - u8 sch_class; - u8 pcnt; - u8 icnt; - u8:8; - u8 ocnt; - u8:8; - u8 mbccnt; - u16 qdioac2; - u64 sch_token; - u64:64; -} __attribute__ ((packed)); - -/* params are: ccw_device, qdio_error, queue_number, - first element processed, number of elements processed, int_parm */ -typedef void qdio_handler_t(struct ccw_device *, unsigned int, int, - int, int, unsigned long); - -/* qdio errors reported to the upper-layer program */ -#define QDIO_ERROR_SIGA_ACCESS_EXCEPTION 0x10 -#define QDIO_ERROR_SIGA_BUSY 0x20 -#define QDIO_ERROR_ACTIVATE_CHECK_CONDITION 0x40 -#define QDIO_ERROR_SLSB_STATE 0x80 - -/* for qdio_initialize */ -#define QDIO_INBOUND_0COPY_SBALS 0x01 -#define QDIO_OUTBOUND_0COPY_SBALS 0x02 -#define QDIO_USE_OUTBOUND_PCIS 0x04 - -/* for qdio_cleanup */ -#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01 -#define QDIO_FLAG_CLEANUP_USING_HALT 0x02 - -/** - * struct qdio_initialize - qdio initalization data - * @cdev: associated ccw device - * @q_format: queue format - * @adapter_name: name for the adapter - * @qib_param_field_format: format for qib_parm_field - * @qib_param_field: pointer to 128 bytes or NULL, if no param field - * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL - * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL - * @no_input_qs: number of input queues - * @no_output_qs: number of output queues - * @input_handler: handler to be called for input queues - * @output_handler: handler to be called for output queues - * @int_parm: interruption parameter - * @flags: initialization flags - * @input_sbal_addr_array: address of no_input_qs * 128 pointers - * @output_sbal_addr_array: address of no_output_qs * 128 pointers - */ -struct qdio_initialize { - struct ccw_device *cdev; - unsigned char q_format; - unsigned char adapter_name[8]; - unsigned int qib_param_field_format; - unsigned char *qib_param_field; - unsigned long *input_slib_elements; - unsigned long *output_slib_elements; - unsigned int no_input_qs; - unsigned int no_output_qs; - qdio_handler_t *input_handler; - qdio_handler_t *output_handler; - unsigned long int_parm; - unsigned long flags; - void **input_sbal_addr_array; - void **output_sbal_addr_array; -}; - -#define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */ -#define QDIO_STATE_ESTABLISHED 0x00000004 /* after qdio_establish */ -#define QDIO_STATE_ACTIVE 0x00000008 /* after qdio_activate */ -#define QDIO_STATE_STOPPED 0x00000010 /* after queues went down */ - -#define QDIO_FLAG_SYNC_INPUT 0x01 -#define QDIO_FLAG_SYNC_OUTPUT 0x02 -#define QDIO_FLAG_PCI_OUT 0x10 - -extern int qdio_initialize(struct qdio_initialize *init_data); -extern int qdio_allocate(struct qdio_initialize *init_data); -extern int qdio_establish(struct qdio_initialize *init_data); -extern int qdio_activate(struct ccw_device *); - -extern int do_QDIO(struct ccw_device*, unsigned int flags, - int q_nr, int qidx, int count); -extern int qdio_cleanup(struct ccw_device*, int how); -extern int qdio_shutdown(struct ccw_device*, int how); -extern int qdio_free(struct ccw_device *); -extern struct qdio_ssqd_desc *qdio_get_ssqd_desc(struct ccw_device *cdev); - -#endif /* __QDIO_H__ */ diff --git a/include/asm-s390/qeth.h b/include/asm-s390/qeth.h deleted file mode 100644 index 930d378..0000000 --- a/include/asm-s390/qeth.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * include/asm-s390/qeth.h - * - * ioctl definitions for qeth driver - * - * Copyright (C) 2004 IBM Corporation - * - * Author(s): Thomas Spatzier - * - */ -#ifndef __ASM_S390_QETH_IOCTL_H__ -#define __ASM_S390_QETH_IOCTL_H__ -#include - -#define SIOC_QETH_ARP_SET_NO_ENTRIES (SIOCDEVPRIVATE) -#define SIOC_QETH_ARP_QUERY_INFO (SIOCDEVPRIVATE + 1) -#define SIOC_QETH_ARP_ADD_ENTRY (SIOCDEVPRIVATE + 2) -#define SIOC_QETH_ARP_REMOVE_ENTRY (SIOCDEVPRIVATE + 3) -#define SIOC_QETH_ARP_FLUSH_CACHE (SIOCDEVPRIVATE + 4) -#define SIOC_QETH_ADP_SET_SNMP_CONTROL (SIOCDEVPRIVATE + 5) -#define SIOC_QETH_GET_CARD_TYPE (SIOCDEVPRIVATE + 6) - -struct qeth_arp_cache_entry { - __u8 macaddr[6]; - __u8 reserved1[2]; - __u8 ipaddr[16]; /* for both IPv4 and IPv6 */ - __u8 reserved2[32]; -} __attribute__ ((packed)); - -struct qeth_arp_qi_entry7 { - __u8 media_specific[32]; - __u8 macaddr_type; - __u8 ipaddr_type; - __u8 macaddr[6]; - __u8 ipaddr[4]; -} __attribute__((packed)); - -struct qeth_arp_qi_entry7_short { - __u8 macaddr_type; - __u8 ipaddr_type; - __u8 macaddr[6]; - __u8 ipaddr[4]; -} __attribute__((packed)); - -struct qeth_arp_qi_entry5 { - __u8 media_specific[32]; - __u8 macaddr_type; - __u8 ipaddr_type; - __u8 ipaddr[4]; -} __attribute__((packed)); - -struct qeth_arp_qi_entry5_short { - __u8 macaddr_type; - __u8 ipaddr_type; - __u8 ipaddr[4]; -} __attribute__((packed)); - -/* - * can be set by user if no "media specific information" is wanted - * -> saves a lot of space in user space buffer - */ -#define QETH_QARP_STRIP_ENTRIES 0x8000 -#define QETH_QARP_REQUEST_MASK 0x00ff - -/* data sent to user space as result of query arp ioctl */ -#define QETH_QARP_USER_DATA_SIZE 20000 -#define QETH_QARP_MASK_OFFSET 4 -#define QETH_QARP_ENTRIES_OFFSET 6 -struct qeth_arp_query_user_data { - union { - __u32 data_len; /* set by user space program */ - __u32 no_entries; /* set by kernel */ - } u; - __u16 mask_bits; - char *entries; -} __attribute__((packed)); - -#endif /* __ASM_S390_QETH_IOCTL_H__ */ diff --git a/include/asm-s390/reset.h b/include/asm-s390/reset.h deleted file mode 100644 index f584f4a..0000000 --- a/include/asm-s390/reset.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-s390/reset.h - * - * Copyright IBM Corp. 2006 - * Author(s): Heiko Carstens - */ - -#ifndef _ASM_S390_RESET_H -#define _ASM_S390_RESET_H - -#include - -struct reset_call { - struct list_head list; - void (*fn)(void); -}; - -extern void register_reset_call(struct reset_call *reset); -extern void unregister_reset_call(struct reset_call *reset); -extern void s390_reset_system(void); -#endif /* _ASM_S390_RESET_H */ diff --git a/include/asm-s390/resource.h b/include/asm-s390/resource.h deleted file mode 100644 index 366c01d..0000000 --- a/include/asm-s390/resource.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * include/asm-s390/resource.h - * - * S390 version - * - * Derived from "include/asm-i386/resources.h" - */ - -#ifndef _S390_RESOURCE_H -#define _S390_RESOURCE_H - -#include - -#endif - diff --git a/include/asm-s390/rwsem.h b/include/asm-s390/rwsem.h deleted file mode 100644 index 9d2a1797..0000000 --- a/include/asm-s390/rwsem.h +++ /dev/null @@ -1,387 +0,0 @@ -#ifndef _S390_RWSEM_H -#define _S390_RWSEM_H - -/* - * include/asm-s390/rwsem.h - * - * S390 version - * Copyright (C) 2002 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Based on asm-alpha/semaphore.h and asm-i386/rwsem.h - */ - -/* - * - * The MSW of the count is the negated number of active writers and waiting - * lockers, and the LSW is the total number of active locks - * - * The lock count is initialized to 0 (no active and no waiting lockers). - * - * When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an - * uncontended lock. This can be determined because XADD returns the old value. - * Readers increment by 1 and see a positive value when uncontended, negative - * if there are writers (and maybe) readers waiting (in which case it goes to - * sleep). - * - * The value of WAITING_BIAS supports up to 32766 waiting processes. This can - * be extended to 65534 by manually checking the whole MSW rather than relying - * on the S flag. - * - * The value of ACTIVE_BIAS supports up to 65535 active processes. - * - * This should be totally fair - if anything is waiting, a process that wants a - * lock will go to the back of the queue. When the currently active lock is - * released, if there's a writer at the front of the queue, then that and only - * that will be woken up; if there's a bunch of consequtive readers at the - * front, then they'll all be woken up, but no other readers will be. - */ - -#ifndef _LINUX_RWSEM_H -#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" -#endif - -#ifdef __KERNEL__ - -#include -#include - -struct rwsem_waiter; - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *); -extern struct rw_semaphore *rwsem_downgrade_write(struct rw_semaphore *); - -/* - * the semaphore definition - */ -struct rw_semaphore { - signed long count; - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifndef __s390x__ -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#else /* __s390x__ */ -#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L -#define RWSEM_ACTIVE_BIAS 0x0000000000000001L -#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL -#define RWSEM_WAITING_BIAS (-0x0000000100000000L) -#endif /* __s390x__ */ -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - -/* - * initialisation - */ - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait.lock), \ - LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ -do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ -} while (0) - - -/* - * lock for reading - */ -static inline void __down_read(struct rw_semaphore *sem) -{ - signed long old, new; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), - "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory"); - if (old < 0) - rwsem_down_read_failed(sem); -} - -/* - * trylock for reading -- returns 1 if successful, 0 if contention - */ -static inline int __down_read_trylock(struct rw_semaphore *sem) -{ - signed long old, new; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: ltr %1,%0\n" - " jm 1f\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b\n" - "1:" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: ltgr %1,%0\n" - " jm 1f\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b\n" - "1:" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), - "i" (RWSEM_ACTIVE_READ_BIAS) : "cc", "memory"); - return old >= 0 ? 1 : 0; -} - -/* - * lock for writing - */ -static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) -{ - signed long old, new, tmp; - - tmp = RWSEM_ACTIVE_WRITE_BIAS; - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory"); - if (old != 0) - rwsem_down_write_failed(sem); -} - -static inline void __down_write(struct rw_semaphore *sem) -{ - __down_write_nested(sem, 0); -} - -/* - * trylock for writing -- returns 1 if successful, 0 if contention - */ -static inline int __down_write_trylock(struct rw_semaphore *sem) -{ - signed long old; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%2)\n" - "0: ltr %0,%0\n" - " jnz 1f\n" - " cs %0,%4,0(%2)\n" - " jl 0b\n" -#else /* __s390x__ */ - " lg %0,0(%2)\n" - "0: ltgr %0,%0\n" - " jnz 1f\n" - " csg %0,%4,0(%2)\n" - " jl 0b\n" -#endif /* __s390x__ */ - "1:" - : "=&d" (old), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), - "d" (RWSEM_ACTIVE_WRITE_BIAS) : "cc", "memory"); - return (old == RWSEM_UNLOCKED_VALUE) ? 1 : 0; -} - -/* - * unlock after reading - */ -static inline void __up_read(struct rw_semaphore *sem) -{ - signed long old, new; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ahi %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " aghi %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), - "i" (-RWSEM_ACTIVE_READ_BIAS) - : "cc", "memory"); - if (new < 0) - if ((new & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * unlock after writing - */ -static inline void __up_write(struct rw_semaphore *sem) -{ - signed long old, new, tmp; - - tmp = -RWSEM_ACTIVE_WRITE_BIAS; - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory"); - if (new < 0) - if ((new & RWSEM_ACTIVE_MASK) == 0) - rwsem_wake(sem); -} - -/* - * downgrade write lock to read lock - */ -static inline void __downgrade_write(struct rw_semaphore *sem) -{ - signed long old, new, tmp; - - tmp = -RWSEM_WAITING_BIAS; - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " a %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " ag %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), "m" (tmp) - : "cc", "memory"); - if (new > 1) - rwsem_downgrade_wake(sem); -} - -/* - * implement atomic add functionality - */ -static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem) -{ - signed long old, new; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ar %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " agr %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), "d" (delta) - : "cc", "memory"); -} - -/* - * implement exchange and add functionality - */ -static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem) -{ - signed long old, new; - - asm volatile( -#ifndef __s390x__ - " l %0,0(%3)\n" - "0: lr %1,%0\n" - " ar %1,%5\n" - " cs %0,%1,0(%3)\n" - " jl 0b" -#else /* __s390x__ */ - " lg %0,0(%3)\n" - "0: lgr %1,%0\n" - " agr %1,%5\n" - " csg %0,%1,0(%3)\n" - " jl 0b" -#endif /* __s390x__ */ - : "=&d" (old), "=&d" (new), "=m" (sem->count) - : "a" (&sem->count), "m" (sem->count), "d" (delta) - : "cc", "memory"); - return new; -} - -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - -#endif /* __KERNEL__ */ -#endif /* _S390_RWSEM_H */ diff --git a/include/asm-s390/s390_ext.h b/include/asm-s390/s390_ext.h deleted file mode 100644 index 2afc060..0000000 --- a/include/asm-s390/s390_ext.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _S390_EXTINT_H -#define _S390_EXTINT_H - -/* - * include/asm-s390/s390_ext.h - * - * S390 version - * Copyright IBM Corp. 1999,2007 - * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com) - */ - -#include - -typedef void (*ext_int_handler_t)(__u16 code); - -typedef struct ext_int_info_t { - struct ext_int_info_t *next; - ext_int_handler_t handler; - __u16 code; -} ext_int_info_t; - -extern ext_int_info_t *ext_int_hash[]; - -int register_external_interrupt(__u16 code, ext_int_handler_t handler); -int register_early_external_interrupt(__u16 code, ext_int_handler_t handler, - ext_int_info_t *info); -int unregister_external_interrupt(__u16 code, ext_int_handler_t handler); -int unregister_early_external_interrupt(__u16 code, ext_int_handler_t handler, - ext_int_info_t *info); - -#endif diff --git a/include/asm-s390/s390_rdev.h b/include/asm-s390/s390_rdev.h deleted file mode 100644 index 6fa2044..0000000 --- a/include/asm-s390/s390_rdev.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * include/asm-s390/ccwdev.h - * - * Copyright (C) 2002,2005 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Cornelia Huck - * Carsten Otte - * - * Interface for s390 root device - */ - -#ifndef _S390_RDEV_H_ -#define _S390_RDEV_H_ -extern struct device *s390_root_dev_register(const char *); -extern void s390_root_dev_unregister(struct device *); -#endif /* _S390_RDEV_H_ */ diff --git a/include/asm-s390/scatterlist.h b/include/asm-s390/scatterlist.h deleted file mode 100644 index 29ec8e2..0000000 --- a/include/asm-s390/scatterlist.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASMS390_SCATTERLIST_H -#define _ASMS390_SCATTERLIST_H - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - unsigned int length; -}; - -#ifdef __s390x__ -#define ISA_DMA_THRESHOLD (0xffffffffffffffffUL) -#else -#define ISA_DMA_THRESHOLD (0xffffffffUL) -#endif - -#endif /* _ASMS390X_SCATTERLIST_H */ diff --git a/include/asm-s390/schid.h b/include/asm-s390/schid.h deleted file mode 100644 index 825503c..0000000 --- a/include/asm-s390/schid.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef ASM_SCHID_H -#define ASM_SCHID_H - -struct subchannel_id { - __u32 cssid : 8; - __u32 : 4; - __u32 m : 1; - __u32 ssid : 2; - __u32 one : 1; - __u32 sch_no : 16; -} __attribute__ ((packed, aligned(4))); - -#ifdef __KERNEL__ -#include - -/* Helper function for sane state of pre-allocated subchannel_id. */ -static inline void -init_subchannel_id(struct subchannel_id *schid) -{ - memset(schid, 0, sizeof(struct subchannel_id)); - schid->one = 1; -} - -static inline int -schid_equal(struct subchannel_id *schid1, struct subchannel_id *schid2) -{ - return !memcmp(schid1, schid2, sizeof(struct subchannel_id)); -} - -#endif /* __KERNEL__ */ - -#endif /* ASM_SCHID_H */ diff --git a/include/asm-s390/sclp.h b/include/asm-s390/sclp.h deleted file mode 100644 index fed7bee..0000000 --- a/include/asm-s390/sclp.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * include/asm-s390/sclp.h - * - * Copyright IBM Corp. 2007 - * Author(s): Heiko Carstens - */ - -#ifndef _ASM_S390_SCLP_H -#define _ASM_S390_SCLP_H - -#include -#include - -#define SCLP_CHP_INFO_MASK_SIZE 32 - -struct sclp_chp_info { - u8 recognized[SCLP_CHP_INFO_MASK_SIZE]; - u8 standby[SCLP_CHP_INFO_MASK_SIZE]; - u8 configured[SCLP_CHP_INFO_MASK_SIZE]; -}; - -#define LOADPARM_LEN 8 - -struct sclp_ipl_info { - int is_valid; - int has_dump; - char loadparm[LOADPARM_LEN]; -}; - -struct sclp_cpu_entry { - u8 address; - u8 reserved0[13]; - u8 type; - u8 reserved1; -} __attribute__((packed)); - -struct sclp_cpu_info { - unsigned int configured; - unsigned int standby; - unsigned int combined; - int has_cpu_type; - struct sclp_cpu_entry cpu[255]; -}; - -int sclp_get_cpu_info(struct sclp_cpu_info *info); -int sclp_cpu_configure(u8 cpu); -int sclp_cpu_deconfigure(u8 cpu); -void sclp_facilities_detect(void); -unsigned long long sclp_get_rnmax(void); -unsigned long long sclp_get_rzm(void); -int sclp_sdias_blk_count(void); -int sclp_sdias_copy(void *dest, int blk_num, int nr_blks); -int sclp_chp_configure(struct chp_id chpid); -int sclp_chp_deconfigure(struct chp_id chpid); -int sclp_chp_read_info(struct sclp_chp_info *info); -void sclp_get_ipl_info(struct sclp_ipl_info *info); - -#endif /* _ASM_S390_SCLP_H */ diff --git a/include/asm-s390/sections.h b/include/asm-s390/sections.h deleted file mode 100644 index fbd9116..0000000 --- a/include/asm-s390/sections.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _S390_SECTIONS_H -#define _S390_SECTIONS_H - -#include - -extern char _eshared[], _ehead[]; - -#endif diff --git a/include/asm-s390/segment.h b/include/asm-s390/segment.h deleted file mode 100644 index 8bfce34..0000000 --- a/include/asm-s390/segment.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _ASM_SEGMENT_H -#define _ASM_SEGMENT_H - -#endif diff --git a/include/asm-s390/sembuf.h b/include/asm-s390/sembuf.h deleted file mode 100644 index 32626b0..0000000 --- a/include/asm-s390/sembuf.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _S390_SEMBUF_H -#define _S390_SEMBUF_H - -/* - * The semid64_ds structure for S/390 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem (for !__s390x__) - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ -#ifndef __s390x__ - unsigned long __unused1; -#endif /* ! __s390x__ */ - __kernel_time_t sem_ctime; /* last change time */ -#ifndef __s390x__ - unsigned long __unused2; -#endif /* ! __s390x__ */ - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _S390_SEMBUF_H */ diff --git a/include/asm-s390/setup.h b/include/asm-s390/setup.h deleted file mode 100644 index 2bd9fae..0000000 --- a/include/asm-s390/setup.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * include/asm-s390/setup.h - * - * S390 version - * Copyright IBM Corp. 1999,2006 - */ - -#ifndef _ASM_S390_SETUP_H -#define _ASM_S390_SETUP_H - -#define COMMAND_LINE_SIZE 1024 - -#define ARCH_COMMAND_LINE_SIZE 896 - -#ifdef __KERNEL__ - -#include - -#define PARMAREA 0x10400 -#define MEMORY_CHUNKS 256 - -#ifndef __ASSEMBLY__ - -#ifndef __s390x__ -#define IPL_DEVICE (*(unsigned long *) (0x10404)) -#define INITRD_START (*(unsigned long *) (0x1040C)) -#define INITRD_SIZE (*(unsigned long *) (0x10414)) -#else /* __s390x__ */ -#define IPL_DEVICE (*(unsigned long *) (0x10400)) -#define INITRD_START (*(unsigned long *) (0x10408)) -#define INITRD_SIZE (*(unsigned long *) (0x10410)) -#endif /* __s390x__ */ -#define COMMAND_LINE ((char *) (0x10480)) - -#define CHUNK_READ_WRITE 0 -#define CHUNK_READ_ONLY 1 - -struct mem_chunk { - unsigned long addr; - unsigned long size; - int type; -}; - -extern struct mem_chunk memory_chunk[]; -extern unsigned long real_memory_size; - -void detect_memory_layout(struct mem_chunk chunk[]); - -#ifdef CONFIG_S390_SWITCH_AMODE -extern unsigned int switch_amode; -#else -#define switch_amode (0) -#endif - -#ifdef CONFIG_S390_EXEC_PROTECT -extern unsigned int s390_noexec; -#else -#define s390_noexec (0) -#endif - -/* - * Machine features detected in head.S - */ -extern unsigned long machine_flags; - -#define MACHINE_FLAG_VM (1UL << 0) -#define MACHINE_FLAG_IEEE (1UL << 1) -#define MACHINE_FLAG_CSP (1UL << 3) -#define MACHINE_FLAG_MVPG (1UL << 4) -#define MACHINE_FLAG_DIAG44 (1UL << 5) -#define MACHINE_FLAG_IDTE (1UL << 6) -#define MACHINE_FLAG_DIAG9C (1UL << 7) -#define MACHINE_FLAG_MVCOS (1UL << 8) -#define MACHINE_FLAG_KVM (1UL << 9) -#define MACHINE_FLAG_HPAGE (1UL << 10) -#define MACHINE_FLAG_PFMF (1UL << 11) - -#define MACHINE_IS_VM (machine_flags & MACHINE_FLAG_VM) -#define MACHINE_IS_KVM (machine_flags & MACHINE_FLAG_KVM) -#define MACHINE_HAS_DIAG9C (machine_flags & MACHINE_FLAG_DIAG9C) - -#ifndef __s390x__ -#define MACHINE_HAS_IEEE (machine_flags & MACHINE_FLAG_IEEE) -#define MACHINE_HAS_CSP (machine_flags & MACHINE_FLAG_CSP) -#define MACHINE_HAS_IDTE (0) -#define MACHINE_HAS_DIAG44 (1) -#define MACHINE_HAS_MVPG (machine_flags & MACHINE_FLAG_MVPG) -#define MACHINE_HAS_MVCOS (0) -#define MACHINE_HAS_HPAGE (0) -#define MACHINE_HAS_PFMF (0) -#else /* __s390x__ */ -#define MACHINE_HAS_IEEE (1) -#define MACHINE_HAS_CSP (1) -#define MACHINE_HAS_IDTE (machine_flags & MACHINE_FLAG_IDTE) -#define MACHINE_HAS_DIAG44 (machine_flags & MACHINE_FLAG_DIAG44) -#define MACHINE_HAS_MVPG (1) -#define MACHINE_HAS_MVCOS (machine_flags & MACHINE_FLAG_MVCOS) -#define MACHINE_HAS_HPAGE (machine_flags & MACHINE_FLAG_HPAGE) -#define MACHINE_HAS_PFMF (machine_flags & MACHINE_FLAG_PFMF) -#endif /* __s390x__ */ - -#define ZFCPDUMP_HSA_SIZE (32UL<<20) - -/* - * Console mode. Override with conmode= - */ -extern unsigned int console_mode; -extern unsigned int console_devno; -extern unsigned int console_irq; - -extern char vmhalt_cmd[]; -extern char vmpoff_cmd[]; - -#define CONSOLE_IS_UNDEFINED (console_mode == 0) -#define CONSOLE_IS_SCLP (console_mode == 1) -#define CONSOLE_IS_3215 (console_mode == 2) -#define CONSOLE_IS_3270 (console_mode == 3) -#define SET_CONSOLE_SCLP do { console_mode = 1; } while (0) -#define SET_CONSOLE_3215 do { console_mode = 2; } while (0) -#define SET_CONSOLE_3270 do { console_mode = 3; } while (0) - -#define NSS_NAME_SIZE 8 -extern char kernel_nss_name[]; - -#else /* __ASSEMBLY__ */ - -#ifndef __s390x__ -#define IPL_DEVICE 0x10404 -#define INITRD_START 0x1040C -#define INITRD_SIZE 0x10414 -#else /* __s390x__ */ -#define IPL_DEVICE 0x10400 -#define INITRD_START 0x10408 -#define INITRD_SIZE 0x10410 -#endif /* __s390x__ */ -#define COMMAND_LINE 0x10480 - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_S390_SETUP_H */ diff --git a/include/asm-s390/sfp-machine.h b/include/asm-s390/sfp-machine.h deleted file mode 100644 index 4e16aed..0000000 --- a/include/asm-s390/sfp-machine.h +++ /dev/null @@ -1,142 +0,0 @@ -/* Machine-dependent software floating-point definitions. - S/390 kernel version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz), - David S. Miller (davem@redhat.com) and - Peter Maydell (pmaydell@chiark.greenend.org.uk). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - - -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned int -#define _FP_WS_TYPE signed int -#define _FP_I_TYPE int - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* - * If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - else \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -/* Some assembly to speed things up. */ -#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ - unsigned int __r2 = (x2) + (y2); \ - unsigned int __r1 = (x1); \ - unsigned int __r0 = (x0); \ - asm volatile( \ - " alr %2,%3\n" \ - " brc 12,0f\n" \ - " lhi 0,1\n" \ - " alr %1,0\n" \ - " brc 12,0f\n" \ - " alr %0,0\n" \ - "0:" \ - : "+&d" (__r2), "+&d" (__r1), "+&d" (__r0) \ - : "d" (y0), "i" (1) : "cc", "0" ); \ - asm volatile( \ - " alr %1,%2\n" \ - " brc 12,0f\n" \ - " ahi %0,1\n" \ - "0:" \ - : "+&d" (__r2), "+&d" (__r1) \ - : "d" (y1) : "cc"); \ - (r2) = __r2; \ - (r1) = __r1; \ - (r0) = __r0; \ -}) - -#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ - unsigned int __r2 = (x2) - (y2); \ - unsigned int __r1 = (x1); \ - unsigned int __r0 = (x0); \ - asm volatile( \ - " slr %2,%3\n" \ - " brc 3,0f\n" \ - " lhi 0,1\n" \ - " slr %1,0\n" \ - " brc 3,0f\n" \ - " slr %0,0\n" \ - "0:" \ - : "+&d" (__r2), "+&d" (__r1), "+&d" (__r0) \ - : "d" (y0) : "cc", "0"); \ - asm volatile( \ - " slr %1,%2\n" \ - " brc 3,0f\n" \ - " ahi %0,-1\n" \ - "0:" \ - : "+&d" (__r2), "+&d" (__r1) \ - : "d" (y1) : "cc"); \ - (r2) = __r2; \ - (r1) = __r1; \ - (r0) = __r0; \ -}) - -#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) - -/* Obtain the current rounding mode. */ -#define FP_ROUNDMODE mode - -/* Exception flags. */ -#define FP_EX_INVALID 0x800000 -#define FP_EX_DIVZERO 0x400000 -#define FP_EX_OVERFLOW 0x200000 -#define FP_EX_UNDERFLOW 0x100000 -#define FP_EX_INEXACT 0x080000 - -/* We write the results always */ -#define FP_INHIBIT_RESULTS 0 - -#endif diff --git a/include/asm-s390/sfp-util.h b/include/asm-s390/sfp-util.h deleted file mode 100644 index 0addc64..0000000 --- a/include/asm-s390/sfp-util.h +++ /dev/null @@ -1,77 +0,0 @@ -#include -#include -#include -#include - -#define add_ssaaaa(sh, sl, ah, al, bh, bl) ({ \ - unsigned int __sh = (ah); \ - unsigned int __sl = (al); \ - asm volatile( \ - " alr %1,%3\n" \ - " brc 12,0f\n" \ - " ahi %0,1\n" \ - "0: alr %0,%2" \ - : "+&d" (__sh), "+d" (__sl) \ - : "d" (bh), "d" (bl) : "cc"); \ - (sh) = __sh; \ - (sl) = __sl; \ -}) - -#define sub_ddmmss(sh, sl, ah, al, bh, bl) ({ \ - unsigned int __sh = (ah); \ - unsigned int __sl = (al); \ - asm volatile( \ - " slr %1,%3\n" \ - " brc 3,0f\n" \ - " ahi %0,-1\n" \ - "0: slr %0,%2" \ - : "+&d" (__sh), "+d" (__sl) \ - : "d" (bh), "d" (bl) : "cc"); \ - (sh) = __sh; \ - (sl) = __sl; \ -}) - -/* a umul b = a mul b + (a>=2<<31) ? b<<32:0 + (b>=2<<31) ? a<<32:0 */ -#define umul_ppmm(wh, wl, u, v) ({ \ - unsigned int __wh = u; \ - unsigned int __wl = v; \ - asm volatile( \ - " ltr 1,%0\n" \ - " mr 0,%1\n" \ - " jnm 0f\n" \ - " alr 0,%1\n" \ - "0: ltr %1,%1\n" \ - " jnm 1f\n" \ - " alr 0,%0\n" \ - "1: lr %0,0\n" \ - " lr %1,1\n" \ - : "+d" (__wh), "+d" (__wl) \ - : : "0", "1", "cc"); \ - wh = __wh; \ - wl = __wl; \ -}) - -#ifdef __s390x__ -#define udiv_qrnnd(q, r, n1, n0, d) \ - do { unsigned long __n; \ - unsigned int __r, __d; \ - __n = ((unsigned long)(n1) << 32) + n0; \ - __d = (d); \ - (q) = __n / __d; \ - (r) = __n % __d; \ - } while (0) -#else -#define udiv_qrnnd(q, r, n1, n0, d) \ - do { unsigned int __r; \ - (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \ - (r) = __r; \ - } while (0) -extern unsigned long __udiv_qrnnd (unsigned int *, unsigned int, - unsigned int , unsigned int); -#endif - -#define UDIV_NEEDS_NORMALIZATION 0 - -#define abort() return 0 - -#define __BYTE_ORDER __BIG_ENDIAN diff --git a/include/asm-s390/shmbuf.h b/include/asm-s390/shmbuf.h deleted file mode 100644 index eed2e28..0000000 --- a/include/asm-s390/shmbuf.h +++ /dev/null @@ -1,48 +0,0 @@ -#ifndef _S390_SHMBUF_H -#define _S390_SHMBUF_H - -/* - * The shmid64_ds structure for S/390 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem (for !__s390x__) - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ -#ifndef __s390x__ - unsigned long __unused1; -#endif /* ! __s390x__ */ - __kernel_time_t shm_dtime; /* last detach time */ -#ifndef __s390x__ - unsigned long __unused2; -#endif /* ! __s390x__ */ - __kernel_time_t shm_ctime; /* last change time */ -#ifndef __s390x__ - unsigned long __unused3; -#endif /* ! __s390x__ */ - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused4; - unsigned long __unused5; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _S390_SHMBUF_H */ diff --git a/include/asm-s390/shmparam.h b/include/asm-s390/shmparam.h deleted file mode 100644 index c2e0c05..0000000 --- a/include/asm-s390/shmparam.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * include/asm-s390/shmparam.h - * - * S390 version - * - * Derived from "include/asm-i386/shmparam.h" - */ -#ifndef _ASM_S390_SHMPARAM_H -#define _ASM_S390_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* _ASM_S390_SHMPARAM_H */ diff --git a/include/asm-s390/sigcontext.h b/include/asm-s390/sigcontext.h deleted file mode 100644 index aeb6e0b..0000000 --- a/include/asm-s390/sigcontext.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * include/asm-s390/sigcontext.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - */ - -#ifndef _ASM_S390_SIGCONTEXT_H -#define _ASM_S390_SIGCONTEXT_H - -#include - -#define __NUM_GPRS 16 -#define __NUM_FPRS 16 -#define __NUM_ACRS 16 - -#ifndef __s390x__ - -/* Has to be at least _NSIG_WORDS from asm/signal.h */ -#define _SIGCONTEXT_NSIG 64 -#define _SIGCONTEXT_NSIG_BPW 32 -/* Size of stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 96 - -#else /* __s390x__ */ - -/* Has to be at least _NSIG_WORDS from asm/signal.h */ -#define _SIGCONTEXT_NSIG 64 -#define _SIGCONTEXT_NSIG_BPW 64 -/* Size of stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 160 - -#endif /* __s390x__ */ - -#define _SIGCONTEXT_NSIG_WORDS (_SIGCONTEXT_NSIG / _SIGCONTEXT_NSIG_BPW) -#define _SIGMASK_COPY_SIZE (sizeof(unsigned long)*_SIGCONTEXT_NSIG_WORDS) - -typedef struct -{ - unsigned long mask; - unsigned long addr; -} __attribute__ ((aligned(8))) _psw_t; - -typedef struct -{ - _psw_t psw; - unsigned long gprs[__NUM_GPRS]; - unsigned int acrs[__NUM_ACRS]; -} _s390_regs_common; - -typedef struct -{ - unsigned int fpc; - double fprs[__NUM_FPRS]; -} _s390_fp_regs; - -typedef struct -{ - _s390_regs_common regs; - _s390_fp_regs fpregs; -} _sigregs; - -struct sigcontext -{ - unsigned long oldmask[_SIGCONTEXT_NSIG_WORDS]; - _sigregs __user *sregs; -}; - - -#endif - diff --git a/include/asm-s390/siginfo.h b/include/asm-s390/siginfo.h deleted file mode 100644 index e0ff1ab..0000000 --- a/include/asm-s390/siginfo.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * include/asm-s390/siginfo.h - * - * S390 version - * - * Derived from "include/asm-i386/siginfo.h" - */ - -#ifndef _S390_SIGINFO_H -#define _S390_SIGINFO_H - -#ifdef __s390x__ -#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) -#endif - -#include - -#endif diff --git a/include/asm-s390/signal.h b/include/asm-s390/signal.h deleted file mode 100644 index f6cfddb..0000000 --- a/include/asm-s390/signal.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * include/asm-s390/signal.h - * - * S390 version - * - * Derived from "include/asm-i386/signal.h" - */ - -#ifndef _ASMS390_SIGNAL_H -#define _ASMS390_SIGNAL_H - -#include -#include - -/* Avoid too many header ordering problems. */ -struct siginfo; -struct pt_regs; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ -#include -#define _NSIG _SIGCONTEXT_NSIG -#define _NSIG_BPW _SIGCONTEXT_NSIG_BPW -#define _NSIG_WORDS _SIGCONTEXT_NSIG_WORDS - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000 - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -#ifdef __KERNEL__ -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; -#ifndef __s390x__ /* lovely */ - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -#else /* __s390x__ */ - unsigned long sa_flags; - void (*sa_restorer)(void); - sigset_t sa_mask; -#endif /* __s390x__ */ -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - - -#endif diff --git a/include/asm-s390/sigp.h b/include/asm-s390/sigp.h deleted file mode 100644 index e16d56f..0000000 --- a/include/asm-s390/sigp.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * include/asm-s390/sigp.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * Heiko Carstens (heiko.carstens@de.ibm.com) - * - * sigp.h by D.J. Barrow (c) IBM 1999 - * contains routines / structures for signalling other S/390 processors in an - * SMP configuration. - */ - -#ifndef __SIGP__ -#define __SIGP__ - -#include -#include - -/* get real cpu address from logical cpu number */ -extern volatile int __cpu_logical_map[]; - -typedef enum -{ - sigp_unassigned=0x0, - sigp_sense, - sigp_external_call, - sigp_emergency_signal, - sigp_start, - sigp_stop, - sigp_restart, - sigp_unassigned1, - sigp_unassigned2, - sigp_stop_and_store_status, - sigp_unassigned3, - sigp_initial_cpu_reset, - sigp_cpu_reset, - sigp_set_prefix, - sigp_store_status_at_address, - sigp_store_extended_status_at_address -} sigp_order_code; - -typedef __u32 sigp_status_word; - -typedef enum -{ - sigp_order_code_accepted=0, - sigp_status_stored, - sigp_busy, - sigp_not_operational -} sigp_ccode; - - -/* - * Definitions for the external call - */ - -/* 'Bit' signals, asynchronous */ -typedef enum -{ - ec_schedule=0, - ec_call_function, - ec_bit_last -} ec_bit_sig; - -/* - * Signal processor - */ -static inline sigp_ccode -signal_processor(__u16 cpu_addr, sigp_order_code order_code) -{ - register unsigned long reg1 asm ("1") = 0; - sigp_ccode ccode; - - asm volatile( - " sigp %1,%2,0(%3)\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (ccode) - : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]), - "a" (order_code) : "cc" , "memory"); - return ccode; -} - -/* - * Signal processor with parameter - */ -static inline sigp_ccode -signal_processor_p(__u32 parameter, __u16 cpu_addr, sigp_order_code order_code) -{ - register unsigned int reg1 asm ("1") = parameter; - sigp_ccode ccode; - - asm volatile( - " sigp %1,%2,0(%3)\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (ccode) - : "d" (reg1), "d" (__cpu_logical_map[cpu_addr]), - "a" (order_code) : "cc" , "memory"); - return ccode; -} - -/* - * Signal processor with parameter and return status - */ -static inline sigp_ccode -signal_processor_ps(__u32 *statusptr, __u32 parameter, __u16 cpu_addr, - sigp_order_code order_code) -{ - register unsigned int reg1 asm ("1") = parameter; - sigp_ccode ccode; - - asm volatile( - " sigp %1,%2,0(%3)\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (ccode), "+d" (reg1) - : "d" (__cpu_logical_map[cpu_addr]), "a" (order_code) - : "cc" , "memory"); - *statusptr = reg1; - return ccode; -} - -#endif /* __SIGP__ */ diff --git a/include/asm-s390/smp.h b/include/asm-s390/smp.h deleted file mode 100644 index ae89cf2..0000000 --- a/include/asm-s390/smp.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * include/asm-s390/smp.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * Heiko Carstens (heiko.carstens@de.ibm.com) - */ -#ifndef __ASM_SMP_H -#define __ASM_SMP_H - -#include -#include -#include - -#if defined(__KERNEL__) && defined(CONFIG_SMP) && !defined(__ASSEMBLY__) - -#include -#include -#include -#include - -/* - s390 specific smp.c headers - */ -typedef struct -{ - int intresting; - sigp_ccode ccode; - __u32 status; - __u16 cpu; -} sigp_info; - -extern void machine_restart_smp(char *); -extern void machine_halt_smp(void); -extern void machine_power_off_smp(void); - -#define NO_PROC_ID 0xFF /* No processor magic marker */ - -/* - * This magic constant controls our willingness to transfer - * a process across CPUs. Such a transfer incurs misses on the L1 - * cache, and on a P6 or P5 with multiple L2 caches L2 hits. My - * gut feeling is this will vary by board in value. For a board - * with separate L2 cache it probably depends also on the RSS, and - * for a board with shared L2 cache it ought to decay fast as other - * processes are run. - */ - -#define PROC_CHANGE_PENALTY 20 /* Schedule penalty */ - -#define raw_smp_processor_id() (S390_lowcore.cpu_data.cpu_nr) - -static inline __u16 hard_smp_processor_id(void) -{ - return stap(); -} - -/* - * returns 1 if cpu is in stopped/check stopped state or not operational - * returns 0 otherwise - */ -static inline int -smp_cpu_not_running(int cpu) -{ - __u32 status; - - switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) { - case sigp_order_code_accepted: - case sigp_status_stored: - /* Check for stopped and check stop state */ - if (status & 0x50) - return 1; - break; - case sigp_not_operational: - return 1; - default: - break; - } - return 0; -} - -#define cpu_logical_map(cpu) (cpu) - -extern int __cpu_disable (void); -extern void __cpu_die (unsigned int cpu); -extern void cpu_die (void) __attribute__ ((noreturn)); -extern int __cpu_up (unsigned int cpu); - -extern struct mutex smp_cpu_state_mutex; -extern int smp_cpu_polarization[]; - -extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *), - void *info, int wait); -#endif - -#ifndef CONFIG_SMP -static inline void smp_send_stop(void) -{ - /* Disable all interrupts/machine checks */ - __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK); -} - -#define hard_smp_processor_id() 0 -#define smp_cpu_not_running(cpu) 1 -#endif - -#ifdef CONFIG_HOTPLUG_CPU -extern int smp_rescan_cpus(void); -#else -static inline int smp_rescan_cpus(void) { return 0; } -#endif - -extern union save_area *zfcpdump_save_areas[NR_CPUS + 1]; -#endif diff --git a/include/asm-s390/socket.h b/include/asm-s390/socket.h deleted file mode 100644 index c786ab6..0000000 --- a/include/asm-s390/socket.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * include/asm-s390/socket.h - * - * S390 version - * - * Derived from "include/asm-i386/socket.h" - */ - -#ifndef _ASM_SOCKET_H -#define _ASM_SOCKET_H - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_SNDBUFFORCE 32 -#define SO_RCVBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* _ASM_SOCKET_H */ diff --git a/include/asm-s390/sockios.h b/include/asm-s390/sockios.h deleted file mode 100644 index f4fc16c..0000000 --- a/include/asm-s390/sockios.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-s390/sockios.h - * - * S390 version - * - * Derived from "include/asm-i386/sockios.h" - */ - -#ifndef __ARCH_S390_SOCKIOS__ -#define __ARCH_S390_SOCKIOS__ - -/* Socket-level I/O control calls. */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif diff --git a/include/asm-s390/sparsemem.h b/include/asm-s390/sparsemem.h deleted file mode 100644 index 545d219..0000000 --- a/include/asm-s390/sparsemem.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _ASM_S390_SPARSEMEM_H -#define _ASM_S390_SPARSEMEM_H - -#ifdef CONFIG_64BIT - -#define SECTION_SIZE_BITS 28 -#define MAX_PHYSADDR_BITS 42 -#define MAX_PHYSMEM_BITS 42 - -#else - -#define SECTION_SIZE_BITS 25 -#define MAX_PHYSADDR_BITS 31 -#define MAX_PHYSMEM_BITS 31 - -#endif /* CONFIG_64BIT */ - -#endif /* _ASM_S390_SPARSEMEM_H */ diff --git a/include/asm-s390/spinlock.h b/include/asm-s390/spinlock.h deleted file mode 100644 index df84ae9..0000000 --- a/include/asm-s390/spinlock.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * include/asm-s390/spinlock.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/spinlock.h" - */ - -#ifndef __ASM_SPINLOCK_H -#define __ASM_SPINLOCK_H - -#include - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - -static inline int -_raw_compare_and_swap(volatile unsigned int *lock, - unsigned int old, unsigned int new) -{ - asm volatile( - " cs %0,%3,%1" - : "=d" (old), "=Q" (*lock) - : "0" (old), "d" (new), "Q" (*lock) - : "cc", "memory" ); - return old; -} - -#else /* __GNUC__ */ - -static inline int -_raw_compare_and_swap(volatile unsigned int *lock, - unsigned int old, unsigned int new) -{ - asm volatile( - " cs %0,%3,0(%4)" - : "=d" (old), "=m" (*lock) - : "0" (old), "d" (new), "a" (lock), "m" (*lock) - : "cc", "memory" ); - return old; -} - -#endif /* __GNUC__ */ - -/* - * Simple spin lock operations. There are two variants, one clears IRQ's - * on the local processor, one does not. - * - * We make no fairness assumptions. They have a cost. - * - * (the type definitions are in asm/spinlock_types.h) - */ - -#define __raw_spin_is_locked(x) ((x)->owner_cpu != 0) -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) \ - _raw_spin_relax(lock); } while (0) - -extern void _raw_spin_lock_wait(raw_spinlock_t *); -extern void _raw_spin_lock_wait_flags(raw_spinlock_t *, unsigned long flags); -extern int _raw_spin_trylock_retry(raw_spinlock_t *); -extern void _raw_spin_relax(raw_spinlock_t *lock); - -static inline void __raw_spin_lock(raw_spinlock_t *lp) -{ - int old; - - old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id()); - if (likely(old == 0)) - return; - _raw_spin_lock_wait(lp); -} - -static inline void __raw_spin_lock_flags(raw_spinlock_t *lp, - unsigned long flags) -{ - int old; - - old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id()); - if (likely(old == 0)) - return; - _raw_spin_lock_wait_flags(lp, flags); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lp) -{ - int old; - - old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id()); - if (likely(old == 0)) - return 1; - return _raw_spin_trylock_retry(lp); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lp) -{ - _raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0); -} - -/* - * Read-write spinlocks, allowing multiple readers - * but only one writer. - * - * NOTE! it is quite common to have readers in interrupts - * but no interrupt writers. For those circumstances we - * can "mix" irq-safe locks - any writer needs to get a - * irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - */ - -/** - * read_can_lock - would read_trylock() succeed? - * @lock: the rwlock in question. - */ -#define __raw_read_can_lock(x) ((int)(x)->lock >= 0) - -/** - * write_can_lock - would write_trylock() succeed? - * @lock: the rwlock in question. - */ -#define __raw_write_can_lock(x) ((x)->lock == 0) - -extern void _raw_read_lock_wait(raw_rwlock_t *lp); -extern int _raw_read_trylock_retry(raw_rwlock_t *lp); -extern void _raw_write_lock_wait(raw_rwlock_t *lp); -extern int _raw_write_trylock_retry(raw_rwlock_t *lp); - -static inline void __raw_read_lock(raw_rwlock_t *rw) -{ - unsigned int old; - old = rw->lock & 0x7fffffffU; - if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old) - _raw_read_lock_wait(rw); -} - -static inline void __raw_read_unlock(raw_rwlock_t *rw) -{ - unsigned int old, cmp; - - old = rw->lock; - do { - cmp = old; - old = _raw_compare_and_swap(&rw->lock, old, old - 1); - } while (cmp != old); -} - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0)) - _raw_write_lock_wait(rw); -} - -static inline void __raw_write_unlock(raw_rwlock_t *rw) -{ - _raw_compare_and_swap(&rw->lock, 0x80000000, 0); -} - -static inline int __raw_read_trylock(raw_rwlock_t *rw) -{ - unsigned int old; - old = rw->lock & 0x7fffffffU; - if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old)) - return 1; - return _raw_read_trylock_retry(rw); -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0)) - return 1; - return _raw_write_trylock_retry(rw); -} - -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-s390/spinlock_types.h b/include/asm-s390/spinlock_types.h deleted file mode 100644 index 654abc4..0000000 --- a/include/asm-s390/spinlock_types.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_SPINLOCK_TYPES_H -#define __ASM_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned int owner_cpu; -} __attribute__ ((aligned (4))) raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile unsigned int lock; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0 } - -#endif diff --git a/include/asm-s390/stat.h b/include/asm-s390/stat.h deleted file mode 100644 index d92959e..0000000 --- a/include/asm-s390/stat.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * include/asm-s390/stat.h - * - * S390 version - * - * Derived from "include/asm-i386/stat.h" - */ - -#ifndef _S390_STAT_H -#define _S390_STAT_H - -#ifndef __s390x__ -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -struct stat { - unsigned short st_dev; - unsigned short __pad1; - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned short __pad2; - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -/* This matches struct stat64 in glibc2.1, hence the absolutely - * insane amounts of padding around dev_t's. - */ -struct stat64 { - unsigned long long st_dev; - unsigned int __pad1; -#define STAT64_HAS_BROKEN_ST_INO 1 - unsigned long __st_ino; - unsigned int st_mode; - unsigned int st_nlink; - unsigned long st_uid; - unsigned long st_gid; - unsigned long long st_rdev; - unsigned int __pad3; - long long st_size; - unsigned long st_blksize; - unsigned char __pad4[4]; - unsigned long __pad5; /* future possible st_blocks high bits */ - unsigned long st_blocks; /* Number 512-byte blocks allocated. */ - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */ - unsigned long long st_ino; -}; - -#else /* __s390x__ */ - -struct stat { - unsigned long st_dev; - unsigned long st_ino; - unsigned long st_nlink; - unsigned int st_mode; - unsigned int st_uid; - unsigned int st_gid; - unsigned int __pad1; - unsigned long st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long st_blksize; - long st_blocks; - unsigned long __unused[3]; -}; - -#endif /* __s390x__ */ - -#define STAT_HAVE_NSEC 1 - -#endif diff --git a/include/asm-s390/statfs.h b/include/asm-s390/statfs.h deleted file mode 100644 index 099a455..0000000 --- a/include/asm-s390/statfs.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * include/asm-s390/statfs.h - * - * S390 version - * - * Derived from "include/asm-i386/statfs.h" - */ - -#ifndef _S390_STATFS_H -#define _S390_STATFS_H - -#ifndef __s390x__ -#include -#else - -#ifndef __KERNEL_STRICT_NAMES - -#include - -typedef __kernel_fsid_t fsid_t; - -#endif - -/* - * This is ugly -- we're already 64-bit clean, so just duplicate the - * definitions. - */ -struct statfs { - int f_type; - int f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - int f_namelen; - int f_frsize; - int f_spare[5]; -}; - -struct statfs64 { - int f_type; - int f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - int f_namelen; - int f_frsize; - int f_spare[5]; -}; - -struct compat_statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; - -#endif /* __s390x__ */ -#endif diff --git a/include/asm-s390/string.h b/include/asm-s390/string.h deleted file mode 100644 index d074673..0000000 --- a/include/asm-s390/string.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * include/asm-s390/string.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), - */ - -#ifndef _S390_STRING_H_ -#define _S390_STRING_H_ - -#ifdef __KERNEL__ - -#ifndef _LINUX_TYPES_H -#include -#endif - -#define __HAVE_ARCH_MEMCHR /* inline & arch function */ -#define __HAVE_ARCH_MEMCMP /* arch function */ -#define __HAVE_ARCH_MEMCPY /* gcc builtin & arch function */ -#define __HAVE_ARCH_MEMSCAN /* inline & arch function */ -#define __HAVE_ARCH_MEMSET /* gcc builtin & arch function */ -#define __HAVE_ARCH_STRCAT /* inline & arch function */ -#define __HAVE_ARCH_STRCMP /* arch function */ -#define __HAVE_ARCH_STRCPY /* inline & arch function */ -#define __HAVE_ARCH_STRLCAT /* arch function */ -#define __HAVE_ARCH_STRLCPY /* arch function */ -#define __HAVE_ARCH_STRLEN /* inline & arch function */ -#define __HAVE_ARCH_STRNCAT /* arch function */ -#define __HAVE_ARCH_STRNCPY /* arch function */ -#define __HAVE_ARCH_STRNLEN /* inline & arch function */ -#define __HAVE_ARCH_STRRCHR /* arch function */ -#define __HAVE_ARCH_STRSTR /* arch function */ - -/* Prototypes for non-inlined arch strings functions. */ -extern int memcmp(const void *, const void *, size_t); -extern void *memcpy(void *, const void *, size_t); -extern void *memset(void *, int, size_t); -extern int strcmp(const char *,const char *); -extern size_t strlcat(char *, const char *, size_t); -extern size_t strlcpy(char *, const char *, size_t); -extern char *strncat(char *, const char *, size_t); -extern char *strncpy(char *, const char *, size_t); -extern char *strrchr(const char *, int); -extern char *strstr(const char *, const char *); - -#undef __HAVE_ARCH_MEMMOVE -#undef __HAVE_ARCH_STRCHR -#undef __HAVE_ARCH_STRNCHR -#undef __HAVE_ARCH_STRNCMP -#undef __HAVE_ARCH_STRNICMP -#undef __HAVE_ARCH_STRPBRK -#undef __HAVE_ARCH_STRSEP -#undef __HAVE_ARCH_STRSPN - -#if !defined(IN_ARCH_STRING_C) - -static inline void *memchr(const void * s, int c, size_t n) -{ - register int r0 asm("0") = (char) c; - const void *ret = s + n; - - asm volatile( - "0: srst %0,%1\n" - " jo 0b\n" - " jl 1f\n" - " la %0,0\n" - "1:" - : "+a" (ret), "+&a" (s) : "d" (r0) : "cc"); - return (void *) ret; -} - -static inline void *memscan(void *s, int c, size_t n) -{ - register int r0 asm("0") = (char) c; - const void *ret = s + n; - - asm volatile( - "0: srst %0,%1\n" - " jo 0b\n" - : "+a" (ret), "+&a" (s) : "d" (r0) : "cc"); - return (void *) ret; -} - -static inline char *strcat(char *dst, const char *src) -{ - register int r0 asm("0") = 0; - unsigned long dummy; - char *ret = dst; - - asm volatile( - "0: srst %0,%1\n" - " jo 0b\n" - "1: mvst %0,%2\n" - " jo 1b" - : "=&a" (dummy), "+a" (dst), "+a" (src) - : "d" (r0), "0" (0) : "cc", "memory" ); - return ret; -} - -static inline char *strcpy(char *dst, const char *src) -{ - register int r0 asm("0") = 0; - char *ret = dst; - - asm volatile( - "0: mvst %0,%1\n" - " jo 0b" - : "+&a" (dst), "+&a" (src) : "d" (r0) - : "cc", "memory"); - return ret; -} - -static inline size_t strlen(const char *s) -{ - register unsigned long r0 asm("0") = 0; - const char *tmp = s; - - asm volatile( - "0: srst %0,%1\n" - " jo 0b" - : "+d" (r0), "+a" (tmp) : : "cc"); - return r0 - (unsigned long) s; -} - -static inline size_t strnlen(const char * s, size_t n) -{ - register int r0 asm("0") = 0; - const char *tmp = s; - const char *end = s + n; - - asm volatile( - "0: srst %0,%1\n" - " jo 0b" - : "+a" (end), "+a" (tmp) : "d" (r0) : "cc"); - return end - s; -} - -#endif /* !IN_ARCH_STRING_C */ - -#endif /* __KERNEL__ */ - -#endif /* __S390_STRING_H_ */ diff --git a/include/asm-s390/suspend.h b/include/asm-s390/suspend.h deleted file mode 100644 index 1f34580..0000000 --- a/include/asm-s390/suspend.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef __ASM_S390_SUSPEND_H -#define __ASM_S390_SUSPEND_H - -#endif - diff --git a/include/asm-s390/sysinfo.h b/include/asm-s390/sysinfo.h deleted file mode 100644 index 79d0134..0000000 --- a/include/asm-s390/sysinfo.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * definition for store system information stsi - * - * Copyright IBM Corp. 2001,2008 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * - * Author(s): Ulrich Weigand - * Christian Borntraeger - */ - -#ifndef __ASM_S390_SYSINFO_H -#define __ASM_S390_SYSINFO_H - -struct sysinfo_1_1_1 { - char reserved_0[32]; - char manufacturer[16]; - char type[4]; - char reserved_1[12]; - char model_capacity[16]; - char sequence[16]; - char plant[4]; - char model[16]; - char model_perm_cap[16]; - char model_temp_cap[16]; - char model_cap_rating[4]; - char model_perm_cap_rating[4]; - char model_temp_cap_rating[4]; -}; - -struct sysinfo_1_2_1 { - char reserved_0[80]; - char sequence[16]; - char plant[4]; - char reserved_1[2]; - unsigned short cpu_address; -}; - -struct sysinfo_1_2_2 { - char format; - char reserved_0[1]; - unsigned short acc_offset; - char reserved_1[24]; - unsigned int secondary_capability; - unsigned int capability; - unsigned short cpus_total; - unsigned short cpus_configured; - unsigned short cpus_standby; - unsigned short cpus_reserved; - unsigned short adjustment[0]; -}; - -struct sysinfo_1_2_2_extension { - unsigned int alt_capability; - unsigned short alt_adjustment[0]; -}; - -struct sysinfo_2_2_1 { - char reserved_0[80]; - char sequence[16]; - char plant[4]; - unsigned short cpu_id; - unsigned short cpu_address; -}; - -struct sysinfo_2_2_2 { - char reserved_0[32]; - unsigned short lpar_number; - char reserved_1; - unsigned char characteristics; - unsigned short cpus_total; - unsigned short cpus_configured; - unsigned short cpus_standby; - unsigned short cpus_reserved; - char name[8]; - unsigned int caf; - char reserved_2[16]; - unsigned short cpus_dedicated; - unsigned short cpus_shared; -}; - -#define LPAR_CHAR_DEDICATED (1 << 7) -#define LPAR_CHAR_SHARED (1 << 6) -#define LPAR_CHAR_LIMITED (1 << 5) - -struct sysinfo_3_2_2 { - char reserved_0[31]; - unsigned char count; - struct { - char reserved_0[4]; - unsigned short cpus_total; - unsigned short cpus_configured; - unsigned short cpus_standby; - unsigned short cpus_reserved; - char name[8]; - unsigned int caf; - char cpi[16]; - char reserved_1[24]; - - } vm[8]; -}; - -static inline int stsi(void *sysinfo, int fc, int sel1, int sel2) -{ - register int r0 asm("0") = (fc << 28) | sel1; - register int r1 asm("1") = sel2; - - asm volatile( - " stsi 0(%2)\n" - "0: jz 2f\n" - "1: lhi %0,%3\n" - "2:\n" - EX_TABLE(0b, 1b) - : "+d" (r0) : "d" (r1), "a" (sysinfo), "K" (-ENOSYS) - : "cc", "memory"); - return r0; -} - -#endif /* __ASM_S390_SYSINFO_H */ diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h deleted file mode 100644 index 819e7d9..0000000 --- a/include/asm-s390/system.h +++ /dev/null @@ -1,462 +0,0 @@ -/* - * include/asm-s390/system.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com), - * - * Derived from "include/asm-i386/system.h" - */ - -#ifndef __ASM_SYSTEM_H -#define __ASM_SYSTEM_H - -#include -#include -#include -#include -#include -#include - -#ifdef __KERNEL__ - -struct task_struct; - -extern struct task_struct *__switch_to(void *, void *); - -static inline void save_fp_regs(s390_fp_regs *fpregs) -{ - asm volatile( - " std 0,8(%1)\n" - " std 2,24(%1)\n" - " std 4,40(%1)\n" - " std 6,56(%1)" - : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory"); - if (!MACHINE_HAS_IEEE) - return; - asm volatile( - " stfpc 0(%1)\n" - " std 1,16(%1)\n" - " std 3,32(%1)\n" - " std 5,48(%1)\n" - " std 7,64(%1)\n" - " std 8,72(%1)\n" - " std 9,80(%1)\n" - " std 10,88(%1)\n" - " std 11,96(%1)\n" - " std 12,104(%1)\n" - " std 13,112(%1)\n" - " std 14,120(%1)\n" - " std 15,128(%1)\n" - : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory"); -} - -static inline void restore_fp_regs(s390_fp_regs *fpregs) -{ - asm volatile( - " ld 0,8(%0)\n" - " ld 2,24(%0)\n" - " ld 4,40(%0)\n" - " ld 6,56(%0)" - : : "a" (fpregs), "m" (*fpregs)); - if (!MACHINE_HAS_IEEE) - return; - asm volatile( - " lfpc 0(%0)\n" - " ld 1,16(%0)\n" - " ld 3,32(%0)\n" - " ld 5,48(%0)\n" - " ld 7,64(%0)\n" - " ld 8,72(%0)\n" - " ld 9,80(%0)\n" - " ld 10,88(%0)\n" - " ld 11,96(%0)\n" - " ld 12,104(%0)\n" - " ld 13,112(%0)\n" - " ld 14,120(%0)\n" - " ld 15,128(%0)\n" - : : "a" (fpregs), "m" (*fpregs)); -} - -static inline void save_access_regs(unsigned int *acrs) -{ - asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory"); -} - -static inline void restore_access_regs(unsigned int *acrs) -{ - asm volatile("lam 0,15,0(%0)" : : "a" (acrs)); -} - -#define switch_to(prev,next,last) do { \ - if (prev == next) \ - break; \ - save_fp_regs(&prev->thread.fp_regs); \ - restore_fp_regs(&next->thread.fp_regs); \ - save_access_regs(&prev->thread.acrs[0]); \ - restore_access_regs(&next->thread.acrs[0]); \ - prev = __switch_to(prev,next); \ -} while (0) - -#ifdef CONFIG_VIRT_CPU_ACCOUNTING -extern void account_vtime(struct task_struct *); -extern void account_tick_vtime(struct task_struct *); -extern void account_system_vtime(struct task_struct *); -#else -#define account_vtime(x) do { /* empty */ } while (0) -#endif - -#ifdef CONFIG_PFAULT -extern void pfault_irq_init(void); -extern int pfault_init(void); -extern void pfault_fini(void); -#else /* CONFIG_PFAULT */ -#define pfault_irq_init() do { } while (0) -#define pfault_init() ({-1;}) -#define pfault_fini() do { } while (0) -#endif /* CONFIG_PFAULT */ - -#ifdef CONFIG_PAGE_STATES -extern void cmma_init(void); -#else -static inline void cmma_init(void) { } -#endif - -#define finish_arch_switch(prev) do { \ - set_fs(current->thread.mm_segment); \ - account_vtime(prev); \ -} while (0) - -#define nop() asm volatile("nop") - -#define xchg(ptr,x) \ -({ \ - __typeof__(*(ptr)) __ret; \ - __ret = (__typeof__(*(ptr))) \ - __xchg((unsigned long)(x), (void *)(ptr),sizeof(*(ptr))); \ - __ret; \ -}) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, void * ptr, int size) -{ - unsigned long addr, old; - int shift; - - switch (size) { - case 1: - addr = (unsigned long) ptr; - shift = (3 ^ (addr & 3)) << 3; - addr ^= addr & 3; - asm volatile( - " l %0,0(%4)\n" - "0: lr 0,%0\n" - " nr 0,%3\n" - " or 0,%2\n" - " cs %0,0,0(%4)\n" - " jl 0b\n" - : "=&d" (old), "=m" (*(int *) addr) - : "d" (x << shift), "d" (~(255 << shift)), "a" (addr), - "m" (*(int *) addr) : "memory", "cc", "0"); - return old >> shift; - case 2: - addr = (unsigned long) ptr; - shift = (2 ^ (addr & 2)) << 3; - addr ^= addr & 2; - asm volatile( - " l %0,0(%4)\n" - "0: lr 0,%0\n" - " nr 0,%3\n" - " or 0,%2\n" - " cs %0,0,0(%4)\n" - " jl 0b\n" - : "=&d" (old), "=m" (*(int *) addr) - : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr), - "m" (*(int *) addr) : "memory", "cc", "0"); - return old >> shift; - case 4: - asm volatile( - " l %0,0(%3)\n" - "0: cs %0,%2,0(%3)\n" - " jl 0b\n" - : "=&d" (old), "=m" (*(int *) ptr) - : "d" (x), "a" (ptr), "m" (*(int *) ptr) - : "memory", "cc"); - return old; -#ifdef __s390x__ - case 8: - asm volatile( - " lg %0,0(%3)\n" - "0: csg %0,%2,0(%3)\n" - " jl 0b\n" - : "=&d" (old), "=m" (*(long *) ptr) - : "d" (x), "a" (ptr), "m" (*(long *) ptr) - : "memory", "cc"); - return old; -#endif /* __s390x__ */ - } - __xchg_called_with_bad_pointer(); - return x; -} - -/* - * Atomic compare and exchange. Compare OLD with MEM, if identical, - * store NEW in MEM. Return the initial value in MEM. Success is - * indicated by comparing RETURN with OLD. - */ - -#define __HAVE_ARCH_CMPXCHG 1 - -#define cmpxchg(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) - -extern void __cmpxchg_called_with_bad_pointer(void); - -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) -{ - unsigned long addr, prev, tmp; - int shift; - - switch (size) { - case 1: - addr = (unsigned long) ptr; - shift = (3 ^ (addr & 3)) << 3; - addr ^= addr & 3; - asm volatile( - " l %0,0(%4)\n" - "0: nr %0,%5\n" - " lr %1,%0\n" - " or %0,%2\n" - " or %1,%3\n" - " cs %0,%1,0(%4)\n" - " jnl 1f\n" - " xr %1,%0\n" - " nr %1,%5\n" - " jnz 0b\n" - "1:" - : "=&d" (prev), "=&d" (tmp) - : "d" (old << shift), "d" (new << shift), "a" (ptr), - "d" (~(255 << shift)) - : "memory", "cc"); - return prev >> shift; - case 2: - addr = (unsigned long) ptr; - shift = (2 ^ (addr & 2)) << 3; - addr ^= addr & 2; - asm volatile( - " l %0,0(%4)\n" - "0: nr %0,%5\n" - " lr %1,%0\n" - " or %0,%2\n" - " or %1,%3\n" - " cs %0,%1,0(%4)\n" - " jnl 1f\n" - " xr %1,%0\n" - " nr %1,%5\n" - " jnz 0b\n" - "1:" - : "=&d" (prev), "=&d" (tmp) - : "d" (old << shift), "d" (new << shift), "a" (ptr), - "d" (~(65535 << shift)) - : "memory", "cc"); - return prev >> shift; - case 4: - asm volatile( - " cs %0,%2,0(%3)\n" - : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) - : "memory", "cc"); - return prev; -#ifdef __s390x__ - case 8: - asm volatile( - " csg %0,%2,0(%3)\n" - : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) - : "memory", "cc"); - return prev; -#endif /* __s390x__ */ - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -/* - * Force strict CPU ordering. - * And yes, this is required on UP too when we're talking - * to devices. - * - * This is very similar to the ppc eieio/sync instruction in that is - * does a checkpoint syncronisation & makes sure that - * all memory ops have completed wrt other CPU's ( see 7-15 POP DJB ). - */ - -#define eieio() asm volatile("bcr 15,0" : : : "memory") -#define SYNC_OTHER_CORES(x) eieio() -#define mb() eieio() -#define rmb() eieio() -#define wmb() eieio() -#define read_barrier_depends() do { } while(0) -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - - -#define set_mb(var, value) do { var = value; mb(); } while (0) - -#ifdef __s390x__ - -#define __ctl_load(array, low, high) ({ \ - typedef struct { char _[sizeof(array)]; } addrtype; \ - asm volatile( \ - " lctlg %1,%2,0(%0)\n" \ - : : "a" (&array), "i" (low), "i" (high), \ - "m" (*(addrtype *)(&array))); \ - }) - -#define __ctl_store(array, low, high) ({ \ - typedef struct { char _[sizeof(array)]; } addrtype; \ - asm volatile( \ - " stctg %2,%3,0(%1)\n" \ - : "=m" (*(addrtype *)(&array)) \ - : "a" (&array), "i" (low), "i" (high)); \ - }) - -#else /* __s390x__ */ - -#define __ctl_load(array, low, high) ({ \ - typedef struct { char _[sizeof(array)]; } addrtype; \ - asm volatile( \ - " lctl %1,%2,0(%0)\n" \ - : : "a" (&array), "i" (low), "i" (high), \ - "m" (*(addrtype *)(&array))); \ -}) - -#define __ctl_store(array, low, high) ({ \ - typedef struct { char _[sizeof(array)]; } addrtype; \ - asm volatile( \ - " stctl %2,%3,0(%1)\n" \ - : "=m" (*(addrtype *)(&array)) \ - : "a" (&array), "i" (low), "i" (high)); \ - }) - -#endif /* __s390x__ */ - -#define __ctl_set_bit(cr, bit) ({ \ - unsigned long __dummy; \ - __ctl_store(__dummy, cr, cr); \ - __dummy |= 1UL << (bit); \ - __ctl_load(__dummy, cr, cr); \ -}) - -#define __ctl_clear_bit(cr, bit) ({ \ - unsigned long __dummy; \ - __ctl_store(__dummy, cr, cr); \ - __dummy &= ~(1UL << (bit)); \ - __ctl_load(__dummy, cr, cr); \ -}) - -#include - -#include - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 1: - case 2: - case 4: -#ifdef __s390x__ - case 8: -#endif - return __cmpxchg(ptr, old, new, size); - default: - return __cmpxchg_local_generic(ptr, old, new, size); - } - - return old; -} - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) -#ifdef __s390x__ -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) -#else -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) -#endif - -/* - * Use to set psw mask except for the first byte which - * won't be changed by this function. - */ -static inline void -__set_psw_mask(unsigned long mask) -{ - __load_psw_mask(mask | (__raw_local_irq_stosm(0x00) & ~(-1UL >> 8))); -} - -#define local_mcck_enable() __set_psw_mask(psw_kernel_bits) -#define local_mcck_disable() __set_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK) - -int stfle(unsigned long long *list, int doublewords); - -#ifdef CONFIG_SMP - -extern void smp_ctl_set_bit(int cr, int bit); -extern void smp_ctl_clear_bit(int cr, int bit); -#define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit) -#define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit) - -#else - -#define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit) -#define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit) - -#endif /* CONFIG_SMP */ - -static inline unsigned int stfl(void) -{ - asm volatile( - " .insn s,0xb2b10000,0(0)\n" /* stfl */ - "0:\n" - EX_TABLE(0b,0b)); - return S390_lowcore.stfl_fac_list; -} - -static inline unsigned short stap(void) -{ - unsigned short cpu_address; - - asm volatile("stap %0" : "=m" (cpu_address)); - return cpu_address; -} - -extern void (*_machine_restart)(char *command); -extern void (*_machine_halt)(void); -extern void (*_machine_power_off)(void); - -#define arch_align_stack(x) (x) - -#ifdef CONFIG_TRACE_IRQFLAGS -extern psw_t sysc_restore_trace_psw; -extern psw_t io_restore_trace_psw; -#endif - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-s390/tape390.h b/include/asm-s390/tape390.h deleted file mode 100644 index 884fba4..0000000 --- a/include/asm-s390/tape390.h +++ /dev/null @@ -1,103 +0,0 @@ -/************************************************************************* - * - * tape390.h - * enables user programs to display messages and control encryption - * on s390 tape devices - * - * Copyright IBM Corp. 2001,2006 - * Author(s): Michael Holzheu - * - *************************************************************************/ - -#ifndef _TAPE390_H -#define _TAPE390_H - -#define TAPE390_DISPLAY _IOW('d', 1, struct display_struct) - -/* - * The TAPE390_DISPLAY ioctl calls the Load Display command - * which transfers 17 bytes of data from the channel to the subsystem: - * - 1 format control byte, and - * - two 8-byte messages - * - * Format control byte: - * 0-2: New Message Overlay - * 3: Alternate Messages - * 4: Blink Message - * 5: Display Low/High Message - * 6: Reserved - * 7: Automatic Load Request - * - */ - -typedef struct display_struct { - char cntrl; - char message1[8]; - char message2[8]; -} display_struct; - -/* - * Tape encryption support - */ - -struct tape390_crypt_info { - char capability; - char status; - char medium_status; -} __attribute__ ((packed)); - - -/* Macros for "capable" field */ -#define TAPE390_CRYPT_SUPPORTED_MASK 0x01 -#define TAPE390_CRYPT_SUPPORTED(x) \ - ((x.capability & TAPE390_CRYPT_SUPPORTED_MASK)) - -/* Macros for "status" field */ -#define TAPE390_CRYPT_ON_MASK 0x01 -#define TAPE390_CRYPT_ON(x) (((x.status) & TAPE390_CRYPT_ON_MASK)) - -/* Macros for "medium status" field */ -#define TAPE390_MEDIUM_LOADED_MASK 0x01 -#define TAPE390_MEDIUM_ENCRYPTED_MASK 0x02 -#define TAPE390_MEDIUM_ENCRYPTED(x) \ - (((x.medium_status) & TAPE390_MEDIUM_ENCRYPTED_MASK)) -#define TAPE390_MEDIUM_LOADED(x) \ - (((x.medium_status) & TAPE390_MEDIUM_LOADED_MASK)) - -/* - * The TAPE390_CRYPT_SET ioctl is used to switch on/off encryption. - * The "encryption_capable" and "tape_status" fields are ignored for this ioctl! - */ -#define TAPE390_CRYPT_SET _IOW('d', 2, struct tape390_crypt_info) - -/* - * The TAPE390_CRYPT_QUERY ioctl is used to query the encryption state. - */ -#define TAPE390_CRYPT_QUERY _IOR('d', 3, struct tape390_crypt_info) - -/* Values for "kekl1/2_type" and "kekl1/2_type_on_tape" fields */ -#define TAPE390_KEKL_TYPE_NONE 0 -#define TAPE390_KEKL_TYPE_LABEL 1 -#define TAPE390_KEKL_TYPE_HASH 2 - -struct tape390_kekl { - unsigned char type; - unsigned char type_on_tape; - char label[65]; -} __attribute__ ((packed)); - -struct tape390_kekl_pair { - struct tape390_kekl kekl[2]; -} __attribute__ ((packed)); - -/* - * The TAPE390_KEKL_SET ioctl is used to set Key Encrypting Key labels. - */ -#define TAPE390_KEKL_SET _IOW('d', 4, struct tape390_kekl_pair) - -/* - * The TAPE390_KEKL_QUERY ioctl is used to query Key Encrypting Key labels. - */ -#define TAPE390_KEKL_QUERY _IOR('d', 5, struct tape390_kekl_pair) - -#endif diff --git a/include/asm-s390/termbits.h b/include/asm-s390/termbits.h deleted file mode 100644 index 58731853..0000000 --- a/include/asm-s390/termbits.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - * include/asm-s390/termbits.h - * - * S390 version - * - * Derived from "include/asm-i386/termbits.h" - */ - -#ifndef __ARCH_S390_TERMBITS_H__ -#define __ARCH_S390_TERMBITS_H__ - -#include - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define BOTHER 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif diff --git a/include/asm-s390/termios.h b/include/asm-s390/termios.h deleted file mode 100644 index 67f6627..0000000 --- a/include/asm-s390/termios.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * include/asm-s390/termios.h - * - * S390 version - * - * Derived from "include/asm-i386/termios.h" - */ - -#ifndef _S390_TERMIOS_H -#define _S390_TERMIOS_H - -#include -#include - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ - -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) - -#include - -#endif /* __KERNEL__ */ - -#endif /* _S390_TERMIOS_H */ diff --git a/include/asm-s390/thread_info.h b/include/asm-s390/thread_info.h deleted file mode 100644 index 91a8f93..0000000 --- a/include/asm-s390/thread_info.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * include/asm-s390/thread_info.h - * - * S390 version - * Copyright (C) IBM Corp. 2002,2006 - * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#ifdef __KERNEL__ - -/* - * Size of kernel stack for each process - */ -#ifndef __s390x__ -#ifndef __SMALL_STACK -#define THREAD_ORDER 1 -#define ASYNC_ORDER 1 -#else -#define THREAD_ORDER 0 -#define ASYNC_ORDER 0 -#endif -#else /* __s390x__ */ -#ifndef __SMALL_STACK -#define THREAD_ORDER 2 -#define ASYNC_ORDER 2 -#else -#define THREAD_ORDER 1 -#define ASYNC_ORDER 1 -#endif -#endif /* __s390x__ */ - -#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) -#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER) - -#ifndef __ASSEMBLY__ -#include -#include - -/* - * low level task data that entry.S needs immediate access to - * - this struct should fit entirely inside of one cache line - * - this struct shares the supervisor stack pages - * - if the contents of this structure are changed, the assembly constants must also be changed - */ -struct thread_info { - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - unsigned int cpu; /* current CPU */ - int preempt_count; /* 0 => preemptable, <0 => BUG */ - struct restart_block restart_block; -}; - -/* - * macros/functions for gaining access to the thread information structure - */ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the thread information struct from C */ -static inline struct thread_info *current_thread_info(void) -{ - return (struct thread_info *)((*(unsigned long *) __LC_KERNEL_STACK)-THREAD_SIZE); -} - -#define THREAD_SIZE_ORDER THREAD_ORDER - -#endif - -/* - * thread information flags bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_RESTART_SVC 4 /* restart svc with new svc number */ -#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ -#define TIF_SINGLE_STEP 6 /* deliver sigtrap on return to user */ -#define TIF_MCCK_PENDING 7 /* machine check handling is pending */ -#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ -#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling - TIF_NEED_RESCHED */ -#define TIF_31BIT 18 /* 32bit process */ -#define TIF_MEMDIE 19 -#define TIF_RESTORE_SIGMASK 20 /* restore signal mask in do_signal() */ - -#define _TIF_SYSCALL_TRACE (1< - -#define VTIMER_MAX_SLICE (0x7ffffffffffff000LL) - -struct vtimer_list { - struct list_head entry; - - int cpu; - __u64 expires; - __u64 interval; - - spinlock_t lock; - unsigned long magic; - - void (*function)(unsigned long); - unsigned long data; -}; - -/* the offset value will wrap after ca. 71 years */ -struct vtimer_queue { - struct list_head list; - spinlock_t lock; - __u64 to_expire; /* current event expire time */ - __u64 offset; /* list offset to zero */ - __u64 idle; /* temp var for idle */ -}; - -extern void init_virt_timer(struct vtimer_list *timer); -extern void add_virt_timer(void *new); -extern void add_virt_timer_periodic(void *new); -extern int mod_virt_timer(struct vtimer_list *timer, __u64 expires); -extern int del_virt_timer(struct vtimer_list *timer); - -extern void init_cpu_vtimer(void); -extern void vtime_init(void); - -#ifdef CONFIG_VIRT_TIMER - -extern void vtime_start_cpu_timer(void); -extern void vtime_stop_cpu_timer(void); - -#else - -static inline void vtime_start_cpu_timer(void) { } -static inline void vtime_stop_cpu_timer(void) { } - -#endif /* CONFIG_VIRT_TIMER */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_S390_TIMER_H */ diff --git a/include/asm-s390/timex.h b/include/asm-s390/timex.h deleted file mode 100644 index d744c3d..0000000 --- a/include/asm-s390/timex.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * include/asm-s390/timex.h - * - * S390 version - * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation - * - * Derived from "include/asm-i386/timex.h" - * Copyright (C) 1992, Linus Torvalds - */ - -#ifndef _ASM_S390_TIMEX_H -#define _ASM_S390_TIMEX_H - -/* Inline functions for clock register access. */ -static inline int set_clock(__u64 time) -{ - int cc; - - asm volatile( - " sck 0(%2)\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (cc) : "m" (time), "a" (&time) : "cc"); - return cc; -} - -static inline int store_clock(__u64 *time) -{ - int cc; - - asm volatile( - " stck 0(%2)\n" - " ipm %0\n" - " srl %0,28\n" - : "=d" (cc), "=m" (*time) : "a" (time) : "cc"); - return cc; -} - -static inline void set_clock_comparator(__u64 time) -{ - asm volatile("sckc 0(%1)" : : "m" (time), "a" (&time)); -} - -static inline void store_clock_comparator(__u64 *time) -{ - asm volatile("stckc 0(%1)" : "=m" (*time) : "a" (time)); -} - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -typedef unsigned long long cycles_t; - -static inline unsigned long long get_clock (void) -{ - unsigned long long clk; - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - asm volatile("stck %0" : "=Q" (clk) : : "cc"); -#else /* __GNUC__ */ - asm volatile("stck 0(%1)" : "=m" (clk) : "a" (&clk) : "cc"); -#endif /* __GNUC__ */ - return clk; -} - -static inline unsigned long long get_clock_xt(void) -{ - unsigned char clk[16]; - -#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2) - asm volatile("stcke %0" : "=Q" (clk) : : "cc"); -#else /* __GNUC__ */ - asm volatile("stcke 0(%1)" : "=m" (clk) - : "a" (clk) : "cc"); -#endif /* __GNUC__ */ - - return *((unsigned long long *)&clk[1]); -} - -static inline cycles_t get_cycles(void) -{ - return (cycles_t) get_clock() >> 2; -} - -int get_sync_clock(unsigned long long *clock); -void init_cpu_timer(void); -unsigned long long monotonic_clock(void); - -#endif diff --git a/include/asm-s390/tlb.h b/include/asm-s390/tlb.h deleted file mode 100644 index 3d8a96d..0000000 --- a/include/asm-s390/tlb.h +++ /dev/null @@ -1,156 +0,0 @@ -#ifndef _S390_TLB_H -#define _S390_TLB_H - -/* - * TLB flushing on s390 is complicated. The following requirement - * from the principles of operation is the most arduous: - * - * "A valid table entry must not be changed while it is attached - * to any CPU and may be used for translation by that CPU except to - * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY, - * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page - * table entry, or (3) make a change by means of a COMPARE AND SWAP - * AND PURGE instruction that purges the TLB." - * - * The modification of a pte of an active mm struct therefore is - * a two step process: i) invalidate the pte, ii) store the new pte. - * This is true for the page protection bit as well. - * The only possible optimization is to flush at the beginning of - * a tlb_gather_mmu cycle if the mm_struct is currently not in use. - * - * Pages used for the page tables is a different story. FIXME: more - */ - -#include -#include -#include -#include -#include -#include - -#ifndef CONFIG_SMP -#define TLB_NR_PTRS 1 -#else -#define TLB_NR_PTRS 508 -#endif - -struct mmu_gather { - struct mm_struct *mm; - unsigned int fullmm; - unsigned int nr_ptes; - unsigned int nr_pxds; - void *array[TLB_NR_PTRS]; -}; - -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - -static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, - unsigned int full_mm_flush) -{ - struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); - - tlb->mm = mm; - tlb->fullmm = full_mm_flush || (num_online_cpus() == 1) || - (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm); - tlb->nr_ptes = 0; - tlb->nr_pxds = TLB_NR_PTRS; - if (tlb->fullmm) - __tlb_flush_mm(mm); - return tlb; -} - -static inline void tlb_flush_mmu(struct mmu_gather *tlb, - unsigned long start, unsigned long end) -{ - if (!tlb->fullmm && (tlb->nr_ptes > 0 || tlb->nr_pxds < TLB_NR_PTRS)) - __tlb_flush_mm(tlb->mm); - while (tlb->nr_ptes > 0) - pte_free(tlb->mm, tlb->array[--tlb->nr_ptes]); - while (tlb->nr_pxds < TLB_NR_PTRS) - /* pgd_free frees the pointer as region or segment table */ - pgd_free(tlb->mm, tlb->array[tlb->nr_pxds++]); -} - -static inline void tlb_finish_mmu(struct mmu_gather *tlb, - unsigned long start, unsigned long end) -{ - tlb_flush_mmu(tlb, start, end); - - /* keep the page table cache within bounds */ - check_pgt_cache(); - - put_cpu_var(mmu_gathers); -} - -/* - * Release the page cache reference for a pte removed by - * tlb_ptep_clear_flush. In both flush modes the tlb fo a page cache page - * has already been freed, so just do free_page_and_swap_cache. - */ -static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) -{ - free_page_and_swap_cache(page); -} - -/* - * pte_free_tlb frees a pte table and clears the CRSTE for the - * page table from the tlb. - */ -static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte) -{ - if (!tlb->fullmm) { - tlb->array[tlb->nr_ptes++] = pte; - if (tlb->nr_ptes >= tlb->nr_pxds) - tlb_flush_mmu(tlb, 0, 0); - } else - pte_free(tlb->mm, pte); -} - -/* - * pmd_free_tlb frees a pmd table and clears the CRSTE for the - * segment table entry from the tlb. - * If the mm uses a two level page table the single pmd is freed - * as the pgd. pmd_free_tlb checks the asce_limit against 2GB - * to avoid the double free of the pmd in this case. - */ -static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) -{ -#ifdef __s390x__ - if (tlb->mm->context.asce_limit <= (1UL << 31)) - return; - if (!tlb->fullmm) { - tlb->array[--tlb->nr_pxds] = pmd; - if (tlb->nr_ptes >= tlb->nr_pxds) - tlb_flush_mmu(tlb, 0, 0); - } else - pmd_free(tlb->mm, pmd); -#endif -} - -/* - * pud_free_tlb frees a pud table and clears the CRSTE for the - * region third table entry from the tlb. - * If the mm uses a three level page table the single pud is freed - * as the pgd. pud_free_tlb checks the asce_limit against 4TB - * to avoid the double free of the pud in this case. - */ -static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud) -{ -#ifdef __s390x__ - if (tlb->mm->context.asce_limit <= (1UL << 42)) - return; - if (!tlb->fullmm) { - tlb->array[--tlb->nr_pxds] = pud; - if (tlb->nr_ptes >= tlb->nr_pxds) - tlb_flush_mmu(tlb, 0, 0); - } else - pud_free(tlb->mm, pud); -#endif -} - -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) -#define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0) -#define tlb_migrate_finish(mm) do { } while (0) - -#endif /* _S390_TLB_H */ diff --git a/include/asm-s390/tlbflush.h b/include/asm-s390/tlbflush.h deleted file mode 100644 index d60394b..0000000 --- a/include/asm-s390/tlbflush.h +++ /dev/null @@ -1,140 +0,0 @@ -#ifndef _S390_TLBFLUSH_H -#define _S390_TLBFLUSH_H - -#include -#include -#include -#include - -/* - * Flush all tlb entries on the local cpu. - */ -static inline void __tlb_flush_local(void) -{ - asm volatile("ptlb" : : : "memory"); -} - -#ifdef CONFIG_SMP -/* - * Flush all tlb entries on all cpus. - */ -void smp_ptlb_all(void); - -static inline void __tlb_flush_global(void) -{ - register unsigned long reg2 asm("2"); - register unsigned long reg3 asm("3"); - register unsigned long reg4 asm("4"); - long dummy; - -#ifndef __s390x__ - if (!MACHINE_HAS_CSP) { - smp_ptlb_all(); - return; - } -#endif /* __s390x__ */ - - dummy = 0; - reg2 = reg3 = 0; - reg4 = ((unsigned long) &dummy) + 1; - asm volatile( - " csp %0,%2" - : : "d" (reg2), "d" (reg3), "d" (reg4), "m" (dummy) : "cc" ); -} - -static inline void __tlb_flush_full(struct mm_struct *mm) -{ - cpumask_t local_cpumask; - - preempt_disable(); - /* - * If the process only ran on the local cpu, do a local flush. - */ - local_cpumask = cpumask_of_cpu(smp_processor_id()); - if (cpus_equal(mm->cpu_vm_mask, local_cpumask)) - __tlb_flush_local(); - else - __tlb_flush_global(); - preempt_enable(); -} -#else -#define __tlb_flush_full(mm) __tlb_flush_local() -#endif - -/* - * Flush all tlb entries of a page table on all cpus. - */ -static inline void __tlb_flush_idte(unsigned long asce) -{ - asm volatile( - " .insn rrf,0xb98e0000,0,%0,%1,0" - : : "a" (2048), "a" (asce) : "cc" ); -} - -static inline void __tlb_flush_mm(struct mm_struct * mm) -{ - if (unlikely(cpus_empty(mm->cpu_vm_mask))) - return; - /* - * If the machine has IDTE we prefer to do a per mm flush - * on all cpus instead of doing a local flush if the mm - * only ran on the local cpu. - */ - if (MACHINE_HAS_IDTE) { - if (mm->context.noexec) - __tlb_flush_idte((unsigned long) - get_shadow_table(mm->pgd) | - mm->context.asce_bits); - __tlb_flush_idte((unsigned long) mm->pgd | - mm->context.asce_bits); - return; - } - __tlb_flush_full(mm); -} - -static inline void __tlb_flush_mm_cond(struct mm_struct * mm) -{ - if (atomic_read(&mm->mm_users) <= 1 && mm == current->active_mm) - __tlb_flush_mm(mm); -} - -/* - * TLB flushing: - * flush_tlb() - flushes the current mm struct TLBs - * flush_tlb_all() - flushes all processes TLBs - * flush_tlb_mm(mm) - flushes the specified mm context TLB's - * flush_tlb_page(vma, vmaddr) - flushes one page - * flush_tlb_range(vma, start, end) - flushes a range of pages - * flush_tlb_kernel_range(start, end) - flushes a range of kernel pages - */ - -/* - * flush_tlb_mm goes together with ptep_set_wrprotect for the - * copy_page_range operation and flush_tlb_range is related to - * ptep_get_and_clear for change_protection. ptep_set_wrprotect and - * ptep_get_and_clear do not flush the TLBs directly if the mm has - * only one user. At the end of the update the flush_tlb_mm and - * flush_tlb_range functions need to do the flush. - */ -#define flush_tlb() do { } while (0) -#define flush_tlb_all() do { } while (0) -#define flush_tlb_page(vma, addr) do { } while (0) - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - __tlb_flush_mm_cond(mm); -} - -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) -{ - __tlb_flush_mm_cond(vma->vm_mm); -} - -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ - __tlb_flush_mm(&init_mm); -} - -#endif /* _S390_TLBFLUSH_H */ diff --git a/include/asm-s390/todclk.h b/include/asm-s390/todclk.h deleted file mode 100644 index c7f6205..0000000 --- a/include/asm-s390/todclk.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * File...........: linux/include/asm/todclk.h - * Author(s)......: Holger Smolinski - * Bugreports.to..: - * (C) IBM Corporation, IBM Deutschland Entwicklung GmbH, 1999,2000 - * - * History of changes (starts July 2000) - */ - -#ifndef __ASM_TODCLK_H -#define __ASM_TODCLK_H - -#ifdef __KERNEL__ - -#define TOD_uSEC (0x1000ULL) -#define TOD_mSEC (1000 * TOD_uSEC) -#define TOD_SEC (1000 * TOD_mSEC) -#define TOD_MIN (60 * TOD_SEC) -#define TOD_HOUR (60 * TOD_MIN) - -#endif - -#endif diff --git a/include/asm-s390/topology.h b/include/asm-s390/topology.h deleted file mode 100644 index d96c916..0000000 --- a/include/asm-s390/topology.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _ASM_S390_TOPOLOGY_H -#define _ASM_S390_TOPOLOGY_H - -#include - -#define mc_capable() (1) - -cpumask_t cpu_coregroup_map(unsigned int cpu); - -extern cpumask_t cpu_core_map[NR_CPUS]; - -#define topology_core_siblings(cpu) (cpu_core_map[cpu]) - -int topology_set_cpu_management(int fc); -void topology_schedule_update(void); - -#define POLARIZATION_UNKNWN (-1) -#define POLARIZATION_HRZ (0) -#define POLARIZATION_VL (1) -#define POLARIZATION_VM (2) -#define POLARIZATION_VH (3) - -#ifdef CONFIG_SMP -void s390_init_cpu_topology(void); -#else -static inline void s390_init_cpu_topology(void) -{ -}; -#endif - -#include - -#endif /* _ASM_S390_TOPOLOGY_H */ diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h deleted file mode 100644 index 41c5476..0000000 --- a/include/asm-s390/types.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * include/asm-s390/types.h - * - * S390 version - * - * Derived from "include/asm-i386/types.h" - */ - -#ifndef _S390_TYPES_H -#define _S390_TYPES_H - -#ifndef __s390x__ -# include -#else -# include -#endif - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -/* A address type so that arithmetic can be done on it & it can be upgraded to - 64 bit when necessary -*/ -typedef unsigned long addr_t; -typedef __signed__ long saddr_t; - -#endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#ifndef __s390x__ -#define BITS_PER_LONG 32 -#else -#define BITS_PER_LONG 64 -#endif - -#ifndef __ASSEMBLY__ - -typedef u64 dma64_addr_t; -#ifdef __s390x__ -/* DMA addresses come in 32-bit and 64-bit flavours. */ -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif - -#ifndef __s390x__ -typedef union { - unsigned long long pair; - struct { - unsigned long even; - unsigned long odd; - } subreg; -} register_pair; - -#endif /* ! __s390x__ */ -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _S390_TYPES_H */ diff --git a/include/asm-s390/uaccess.h b/include/asm-s390/uaccess.h deleted file mode 100644 index 0235970..0000000 --- a/include/asm-s390/uaccess.h +++ /dev/null @@ -1,363 +0,0 @@ -/* - * include/asm-s390/uaccess.h - * - * S390 version - * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation - * Author(s): Hartmut Penner (hp@de.ibm.com), - * Martin Schwidefsky (schwidefsky@de.ibm.com) - * - * Derived from "include/asm-i386/uaccess.h" - */ -#ifndef __S390_UACCESS_H -#define __S390_UACCESS_H - -/* - * User space memory access functions - */ -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons, these macros are grossly misnamed. - */ - -#define MAKE_MM_SEG(a) ((mm_segment_t) { (a) }) - - -#define KERNEL_DS MAKE_MM_SEG(0) -#define USER_DS MAKE_MM_SEG(1) - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.mm_segment) - -#define set_fs(x) \ -({ \ - unsigned long __pto; \ - current->thread.mm_segment = (x); \ - __pto = current->thread.mm_segment.ar4 ? \ - S390_lowcore.user_asce : S390_lowcore.kernel_asce; \ - __ctl_load(__pto, 7, 7); \ -}) - -#define segment_eq(a,b) ((a).ar4 == (b).ar4) - - -static inline int __access_ok(const void __user *addr, unsigned long size) -{ - return 1; -} -#define access_ok(type,addr,size) __access_ok(addr,size) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -struct uaccess_ops { - size_t (*copy_from_user)(size_t, const void __user *, void *); - size_t (*copy_from_user_small)(size_t, const void __user *, void *); - size_t (*copy_to_user)(size_t, void __user *, const void *); - size_t (*copy_to_user_small)(size_t, void __user *, const void *); - size_t (*copy_in_user)(size_t, void __user *, const void __user *); - size_t (*clear_user)(size_t, void __user *); - size_t (*strnlen_user)(size_t, const char __user *); - size_t (*strncpy_from_user)(size_t, const char __user *, char *); - int (*futex_atomic_op)(int op, int __user *, int oparg, int *old); - int (*futex_atomic_cmpxchg)(int __user *, int old, int new); -}; - -extern struct uaccess_ops uaccess; -extern struct uaccess_ops uaccess_std; -extern struct uaccess_ops uaccess_mvcos; -extern struct uaccess_ops uaccess_mvcos_switch; -extern struct uaccess_ops uaccess_pt; - -static inline int __put_user_fn(size_t size, void __user *ptr, void *x) -{ - size = uaccess.copy_to_user_small(size, ptr, x); - return size ? -EFAULT : size; -} - -static inline int __get_user_fn(size_t size, const void __user *ptr, void *x) -{ - size = uaccess.copy_from_user_small(size, ptr, x); - return size ? -EFAULT : size; -} - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - */ -#define __put_user(x, ptr) \ -({ \ - __typeof__(*(ptr)) __x = (x); \ - int __pu_err = -EFAULT; \ - __chk_user_ptr(ptr); \ - switch (sizeof (*(ptr))) { \ - case 1: \ - case 2: \ - case 4: \ - case 8: \ - __pu_err = __put_user_fn(sizeof (*(ptr)), \ - ptr, &__x); \ - break; \ - default: \ - __put_user_bad(); \ - break; \ - } \ - __pu_err; \ -}) - -#define put_user(x, ptr) \ -({ \ - might_sleep(); \ - __put_user(x, ptr); \ -}) - - -extern int __put_user_bad(void) __attribute__((noreturn)); - -#define __get_user(x, ptr) \ -({ \ - int __gu_err = -EFAULT; \ - __chk_user_ptr(ptr); \ - switch (sizeof(*(ptr))) { \ - case 1: { \ - unsigned char __x; \ - __gu_err = __get_user_fn(sizeof (*(ptr)), \ - ptr, &__x); \ - (x) = *(__force __typeof__(*(ptr)) *) &__x; \ - break; \ - }; \ - case 2: { \ - unsigned short __x; \ - __gu_err = __get_user_fn(sizeof (*(ptr)), \ - ptr, &__x); \ - (x) = *(__force __typeof__(*(ptr)) *) &__x; \ - break; \ - }; \ - case 4: { \ - unsigned int __x; \ - __gu_err = __get_user_fn(sizeof (*(ptr)), \ - ptr, &__x); \ - (x) = *(__force __typeof__(*(ptr)) *) &__x; \ - break; \ - }; \ - case 8: { \ - unsigned long long __x; \ - __gu_err = __get_user_fn(sizeof (*(ptr)), \ - ptr, &__x); \ - (x) = *(__force __typeof__(*(ptr)) *) &__x; \ - break; \ - }; \ - default: \ - __get_user_bad(); \ - break; \ - } \ - __gu_err; \ -}) - -#define get_user(x, ptr) \ -({ \ - might_sleep(); \ - __get_user(x, ptr); \ -}) - -extern int __get_user_bad(void) __attribute__((noreturn)); - -#define __put_user_unaligned __put_user -#define __get_user_unaligned __get_user - -/** - * __copy_to_user: - Copy a block of data into user space, with less checking. - * @to: Destination address, in user space. - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * - * Context: User context only. This function may sleep. - * - * Copy data from kernel space to user space. Caller must check - * the specified block with access_ok() before calling this function. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - */ -static inline unsigned long __must_check -__copy_to_user(void __user *to, const void *from, unsigned long n) -{ - if (__builtin_constant_p(n) && (n <= 256)) - return uaccess.copy_to_user_small(n, to, from); - else - return uaccess.copy_to_user(n, to, from); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -/** - * copy_to_user: - Copy a block of data into user space. - * @to: Destination address, in user space. - * @from: Source address, in kernel space. - * @n: Number of bytes to copy. - * - * Context: User context only. This function may sleep. - * - * Copy data from kernel space to user space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - */ -static inline unsigned long __must_check -copy_to_user(void __user *to, const void *from, unsigned long n) -{ - might_sleep(); - if (access_ok(VERIFY_WRITE, to, n)) - n = __copy_to_user(to, from, n); - return n; -} - -/** - * __copy_from_user: - Copy a block of data from user space, with less checking. - * @to: Destination address, in kernel space. - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * - * Context: User context only. This function may sleep. - * - * Copy data from user space to kernel space. Caller must check - * the specified block with access_ok() before calling this function. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - * - * If some data could not be copied, this function will pad the copied - * data to the requested size using zero bytes. - */ -static inline unsigned long __must_check -__copy_from_user(void *to, const void __user *from, unsigned long n) -{ - if (__builtin_constant_p(n) && (n <= 256)) - return uaccess.copy_from_user_small(n, from, to); - else - return uaccess.copy_from_user(n, from, to); -} - -/** - * copy_from_user: - Copy a block of data from user space. - * @to: Destination address, in kernel space. - * @from: Source address, in user space. - * @n: Number of bytes to copy. - * - * Context: User context only. This function may sleep. - * - * Copy data from user space to kernel space. - * - * Returns number of bytes that could not be copied. - * On success, this will be zero. - * - * If some data could not be copied, this function will pad the copied - * data to the requested size using zero bytes. - */ -static inline unsigned long __must_check -copy_from_user(void *to, const void __user *from, unsigned long n) -{ - might_sleep(); - if (access_ok(VERIFY_READ, from, n)) - n = __copy_from_user(to, from, n); - else - memset(to, 0, n); - return n; -} - -static inline unsigned long __must_check -__copy_in_user(void __user *to, const void __user *from, unsigned long n) -{ - return uaccess.copy_in_user(n, to, from); -} - -static inline unsigned long __must_check -copy_in_user(void __user *to, const void __user *from, unsigned long n) -{ - might_sleep(); - if (__access_ok(from,n) && __access_ok(to,n)) - n = __copy_in_user(to, from, n); - return n; -} - -/* - * Copy a null terminated string from userspace. - */ -static inline long __must_check -strncpy_from_user(char *dst, const char __user *src, long count) -{ - long res = -EFAULT; - might_sleep(); - if (access_ok(VERIFY_READ, src, 1)) - res = uaccess.strncpy_from_user(count, src, dst); - return res; -} - -static inline unsigned long -strnlen_user(const char __user * src, unsigned long n) -{ - might_sleep(); - return uaccess.strnlen_user(n, src); -} - -/** - * strlen_user: - Get the size of a string in user space. - * @str: The string to measure. - * - * Context: User context only. This function may sleep. - * - * Get the size of a NUL-terminated string in user space. - * - * Returns the size of the string INCLUDING the terminating NUL. - * On exception, returns 0. - * - * If there is a limit on the length of a valid string, you may wish to - * consider using strnlen_user() instead. - */ -#define strlen_user(str) strnlen_user(str, ~0UL) - -/* - * Zero Userspace - */ - -static inline unsigned long __must_check -__clear_user(void __user *to, unsigned long n) -{ - return uaccess.clear_user(n, to); -} - -static inline unsigned long __must_check -clear_user(void __user *to, unsigned long n) -{ - might_sleep(); - if (access_ok(VERIFY_WRITE, to, n)) - n = uaccess.clear_user(n, to); - return n; -} - -#endif /* __S390_UACCESS_H */ diff --git a/include/asm-s390/ucontext.h b/include/asm-s390/ucontext.h deleted file mode 100644 index d69bec0..0000000 --- a/include/asm-s390/ucontext.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-s390/ucontext.h - * - * S390 version - * - * Derived from "include/asm-i386/ucontext.h" - */ - -#ifndef _ASM_S390_UCONTEXT_H -#define _ASM_S390_UCONTEXT_H - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - _sigregs uc_mcontext; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif /* !_ASM_S390_UCONTEXT_H */ diff --git a/include/asm-s390/unaligned.h b/include/asm-s390/unaligned.h deleted file mode 100644 index da9627a..0000000 --- a/include/asm-s390/unaligned.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _ASM_S390_UNALIGNED_H -#define _ASM_S390_UNALIGNED_H - -/* - * The S390 can do unaligned accesses itself. - */ -#include -#include - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif /* _ASM_S390_UNALIGNED_H */ diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h deleted file mode 100644 index c8ad350..0000000 --- a/include/asm-s390/unistd.h +++ /dev/null @@ -1,411 +0,0 @@ -/* - * include/asm-s390/unistd.h - * - * S390 version - * - * Derived from "include/asm-i386/unistd.h" - */ - -#ifndef _ASM_S390_UNISTD_H_ -#define _ASM_S390_UNISTD_H_ - -/* - * This file contains the system call numbers. - */ - -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_restart_syscall 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_brk 45 -#define __NR_signal 48 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_setpgid 57 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_symlink 83 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_lookup_dcookie 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_getdents 141 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_getpmsg 188 -#define __NR_putpmsg 189 -#define __NR_vfork 190 -#define __NR_pivot_root 217 -#define __NR_mincore 218 -#define __NR_madvise 219 -#define __NR_getdents64 220 -#define __NR_readahead 222 -#define __NR_setxattr 224 -#define __NR_lsetxattr 225 -#define __NR_fsetxattr 226 -#define __NR_getxattr 227 -#define __NR_lgetxattr 228 -#define __NR_fgetxattr 229 -#define __NR_listxattr 230 -#define __NR_llistxattr 231 -#define __NR_flistxattr 232 -#define __NR_removexattr 233 -#define __NR_lremovexattr 234 -#define __NR_fremovexattr 235 -#define __NR_gettid 236 -#define __NR_tkill 237 -#define __NR_futex 238 -#define __NR_sched_setaffinity 239 -#define __NR_sched_getaffinity 240 -#define __NR_tgkill 241 -/* Number 242 is reserved for tux */ -#define __NR_io_setup 243 -#define __NR_io_destroy 244 -#define __NR_io_getevents 245 -#define __NR_io_submit 246 -#define __NR_io_cancel 247 -#define __NR_exit_group 248 -#define __NR_epoll_create 249 -#define __NR_epoll_ctl 250 -#define __NR_epoll_wait 251 -#define __NR_set_tid_address 252 -#define __NR_fadvise64 253 -#define __NR_timer_create 254 -#define __NR_timer_settime (__NR_timer_create+1) -#define __NR_timer_gettime (__NR_timer_create+2) -#define __NR_timer_getoverrun (__NR_timer_create+3) -#define __NR_timer_delete (__NR_timer_create+4) -#define __NR_clock_settime (__NR_timer_create+5) -#define __NR_clock_gettime (__NR_timer_create+6) -#define __NR_clock_getres (__NR_timer_create+7) -#define __NR_clock_nanosleep (__NR_timer_create+8) -/* Number 263 is reserved for vserver */ -#define __NR_statfs64 265 -#define __NR_fstatfs64 266 -#define __NR_remap_file_pages 267 -/* Number 268 is reserved for new sys_mbind */ -/* Number 269 is reserved for new sys_get_mempolicy */ -/* Number 270 is reserved for new sys_set_mempolicy */ -#define __NR_mq_open 271 -#define __NR_mq_unlink 272 -#define __NR_mq_timedsend 273 -#define __NR_mq_timedreceive 274 -#define __NR_mq_notify 275 -#define __NR_mq_getsetattr 276 -#define __NR_kexec_load 277 -#define __NR_add_key 278 -#define __NR_request_key 279 -#define __NR_keyctl 280 -#define __NR_waitid 281 -#define __NR_ioprio_set 282 -#define __NR_ioprio_get 283 -#define __NR_inotify_init 284 -#define __NR_inotify_add_watch 285 -#define __NR_inotify_rm_watch 286 -/* Number 287 is reserved for new sys_migrate_pages */ -#define __NR_openat 288 -#define __NR_mkdirat 289 -#define __NR_mknodat 290 -#define __NR_fchownat 291 -#define __NR_futimesat 292 -#define __NR_unlinkat 294 -#define __NR_renameat 295 -#define __NR_linkat 296 -#define __NR_symlinkat 297 -#define __NR_readlinkat 298 -#define __NR_fchmodat 299 -#define __NR_faccessat 300 -#define __NR_pselect6 301 -#define __NR_ppoll 302 -#define __NR_unshare 303 -#define __NR_set_robust_list 304 -#define __NR_get_robust_list 305 -#define __NR_splice 306 -#define __NR_sync_file_range 307 -#define __NR_tee 308 -#define __NR_vmsplice 309 -/* Number 310 is reserved for new sys_move_pages */ -#define __NR_getcpu 311 -#define __NR_epoll_pwait 312 -#define __NR_utimes 313 -#define __NR_fallocate 314 -#define __NR_utimensat 315 -#define __NR_signalfd 316 -#define __NR_timerfd 317 -#define __NR_eventfd 318 -#define __NR_timerfd_create 319 -#define __NR_timerfd_settime 320 -#define __NR_timerfd_gettime 321 -#define __NR_signalfd4 322 -#define __NR_eventfd2 323 -#define __NR_inotify_init1 324 -#define __NR_pipe2 325 -#define __NR_dup3 326 -#define __NR_epoll_create1 327 -#define NR_syscalls 328 - -/* - * There are some system calls that are not present on 64 bit, some - * have a different name although they do the same (e.g. __NR_chown32 - * is __NR_chown on 64 bit). - */ -#ifndef __s390x__ - -#define __NR_time 13 -#define __NR_lchown 16 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_getrlimit 76 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_fchown 95 -#define __NR_ioperm 101 -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR__newselect 142 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_chown 182 -#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */ -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_lchown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_chown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_fcntl64 221 -#define __NR_sendfile64 223 -#define __NR_fadvise64_64 264 -#define __NR_fstatat64 293 - -#else - -#define __NR_select 142 -#define __NR_getrlimit 191 /* SuS compliant getrlimit */ -#define __NR_lchown 198 -#define __NR_getuid 199 -#define __NR_getgid 200 -#define __NR_geteuid 201 -#define __NR_getegid 202 -#define __NR_setreuid 203 -#define __NR_setregid 204 -#define __NR_getgroups 205 -#define __NR_setgroups 206 -#define __NR_fchown 207 -#define __NR_setresuid 208 -#define __NR_getresuid 209 -#define __NR_setresgid 210 -#define __NR_getresgid 211 -#define __NR_chown 212 -#define __NR_setuid 213 -#define __NR_setgid 214 -#define __NR_setfsuid 215 -#define __NR_setfsgid 216 -#define __NR_newfstatat 293 - -#endif - -#ifdef __KERNEL__ - -#ifndef CONFIG_64BIT -#define __IGNORE_select -#else -#define __IGNORE_time -#endif - -/* Ignore NUMA system calls. Not wired up on s390. */ -#define __IGNORE_mbind -#define __IGNORE_get_mempolicy -#define __IGNORE_set_mempolicy -#define __IGNORE_migrate_pages -#define __IGNORE_move_pages - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND -# ifndef CONFIG_64BIT -# define __ARCH_WANT_STAT64 -# define __ARCH_WANT_SYS_TIME -# endif -# ifdef CONFIG_COMPAT -# define __ARCH_WANT_COMPAT_SYS_TIME -# define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND -# endif - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _ASM_S390_UNISTD_H_ */ diff --git a/include/asm-s390/user.h b/include/asm-s390/user.h deleted file mode 100644 index 1b050e3..0000000 --- a/include/asm-s390/user.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * include/asm-s390/user.h - * - * S390 version - * - * Derived from "include/asm-i386/usr.h" - */ - -#ifndef _S390_USER_H -#define _S390_USER_H - -#include -#include -/* Core file format: The core file is written in such a way that gdb - can understand it and provide useful information to the user (under - linux we use the 'trad-core' bfd). There are quite a number of - obstacles to being able to view the contents of the floating point - registers, and until these are solved you will not be able to view the - contents of them. Actually, you can read in the core file and look at - the contents of the user struct to find out what the floating point - registers contain. - The actual file contents are as follows: - UPAGE: 1 page consisting of a user struct that tells gdb what is present - in the file. Directly after this is a copy of the task_struct, which - is currently not used by gdb, but it may come in useful at some point. - All of the registers are stored as part of the upage. The upage should - always be only one page. - DATA: The data area is stored. We use current->end_text to - current->brk to pick up all of the user variables, plus any memory - that may have been malloced. No attempt is made to determine if a page - is demand-zero or if a page is totally unused, we just cover the entire - range. All of the addresses are rounded in such a way that an integral - number of pages is written. - STACK: We need the stack information in order to get a meaningful - backtrace. We need to write the data from (esp) to - current->start_stack, so we round each of these off in order to be able - to write an integer number of pages. - The minimum core file size is 3 pages, or 12288 bytes. -*/ - - -/* - * This is the old layout of "struct pt_regs", and - * is still the layout used by user mode (the new - * pt_regs doesn't have all registers as the kernel - * doesn't use the extra segment registers) - */ - -/* When the kernel dumps core, it starts by dumping the user struct - - this will be used by gdb to figure out where the data and stack segments - are within the file, and what virtual addresses to use. */ -struct user { -/* We start with the registers, to mimic the way that "memory" is returned - from the ptrace(3,...) function. */ - struct user_regs_struct regs; /* Where the registers are actually stored */ -/* The rest of this junk is to help gdb figure out what goes where */ - unsigned long int u_tsize; /* Text segment size (pages). */ - unsigned long int u_dsize; /* Data segment size (pages). */ - unsigned long int u_ssize; /* Stack segment size (pages). */ - unsigned long start_code; /* Starting virtual address of text. */ - unsigned long start_stack; /* Starting virtual address of stack area. - This is actually the bottom of the stack, - the top of the stack is always found in the - esp register. */ - long int signal; /* Signal that caused the core dump. */ - unsigned long u_ar0; /* Used by gdb to help find the values for */ - /* the registers. */ - unsigned long magic; /* To uniquely identify a core file */ - char u_comm[32]; /* User command that was responsible */ -}; -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) - -#endif /* _S390_USER_H */ diff --git a/include/asm-s390/vtoc.h b/include/asm-s390/vtoc.h deleted file mode 100644 index 3a5267d..0000000 --- a/include/asm-s390/vtoc.h +++ /dev/null @@ -1,203 +0,0 @@ -/* - * include/asm-s390/vtoc.h - * - * This file contains volume label definitions for DASD devices. - * - * (C) Copyright IBM Corp. 2005 - * - * Author(s): Volker Sameske - * - */ - -#ifndef _ASM_S390_VTOC_H -#define _ASM_S390_VTOC_H - -#include - -struct vtoc_ttr -{ - __u16 tt; - __u8 r; -} __attribute__ ((packed)); - -struct vtoc_cchhb -{ - __u16 cc; - __u16 hh; - __u8 b; -} __attribute__ ((packed)); - -struct vtoc_cchh -{ - __u16 cc; - __u16 hh; -} __attribute__ ((packed)); - -struct vtoc_labeldate -{ - __u8 year; - __u16 day; -} __attribute__ ((packed)); - -struct vtoc_volume_label -{ - char volkey[4]; /* volume key = volume label */ - char vollbl[4]; /* volume label */ - char volid[6]; /* volume identifier */ - __u8 security; /* security byte */ - struct vtoc_cchhb vtoc; /* VTOC address */ - char res1[5]; /* reserved */ - char cisize[4]; /* CI-size for FBA,... */ - /* ...blanks for CKD */ - char blkperci[4]; /* no of blocks per CI (FBA), blanks for CKD */ - char labperci[4]; /* no of labels per CI (FBA), blanks for CKD */ - char res2[4]; /* reserved */ - char lvtoc[14]; /* owner code for LVTOC */ - char res3[29]; /* reserved */ -} __attribute__ ((packed)); - -struct vtoc_extent -{ - __u8 typeind; /* extent type indicator */ - __u8 seqno; /* extent sequence number */ - struct vtoc_cchh llimit; /* starting point of this extent */ - struct vtoc_cchh ulimit; /* ending point of this extent */ -} __attribute__ ((packed)); - -struct vtoc_dev_const -{ - __u16 DS4DSCYL; /* number of logical cyls */ - __u16 DS4DSTRK; /* number of tracks in a logical cylinder */ - __u16 DS4DEVTK; /* device track length */ - __u8 DS4DEVI; /* non-last keyed record overhead */ - __u8 DS4DEVL; /* last keyed record overhead */ - __u8 DS4DEVK; /* non-keyed record overhead differential */ - __u8 DS4DEVFG; /* flag byte */ - __u16 DS4DEVTL; /* device tolerance */ - __u8 DS4DEVDT; /* number of DSCB's per track */ - __u8 DS4DEVDB; /* number of directory blocks per track */ -} __attribute__ ((packed)); - -struct vtoc_format1_label -{ - char DS1DSNAM[44]; /* data set name */ - __u8 DS1FMTID; /* format identifier */ - char DS1DSSN[6]; /* data set serial number */ - __u16 DS1VOLSQ; /* volume sequence number */ - struct vtoc_labeldate DS1CREDT; /* creation date: ydd */ - struct vtoc_labeldate DS1EXPDT; /* expiration date */ - __u8 DS1NOEPV; /* number of extents on volume */ - __u8 DS1NOBDB; /* no. of bytes used in last direction blk */ - __u8 DS1FLAG1; /* flag 1 */ - char DS1SYSCD[13]; /* system code */ - struct vtoc_labeldate DS1REFD; /* date last referenced */ - __u8 DS1SMSFG; /* system managed storage indicators */ - __u8 DS1SCXTF; /* sec. space extension flag byte */ - __u16 DS1SCXTV; /* secondary space extension value */ - __u8 DS1DSRG1; /* data set organisation byte 1 */ - __u8 DS1DSRG2; /* data set organisation byte 2 */ - __u8 DS1RECFM; /* record format */ - __u8 DS1OPTCD; /* option code */ - __u16 DS1BLKL; /* block length */ - __u16 DS1LRECL; /* record length */ - __u8 DS1KEYL; /* key length */ - __u16 DS1RKP; /* relative key position */ - __u8 DS1DSIND; /* data set indicators */ - __u8 DS1SCAL1; /* secondary allocation flag byte */ - char DS1SCAL3[3]; /* secondary allocation quantity */ - struct vtoc_ttr DS1LSTAR; /* last used track and block on track */ - __u16 DS1TRBAL; /* space remaining on last used track */ - __u16 res1; /* reserved */ - struct vtoc_extent DS1EXT1; /* first extent description */ - struct vtoc_extent DS1EXT2; /* second extent description */ - struct vtoc_extent DS1EXT3; /* third extent description */ - struct vtoc_cchhb DS1PTRDS; /* possible pointer to f2 or f3 DSCB */ -} __attribute__ ((packed)); - -struct vtoc_format4_label -{ - char DS4KEYCD[44]; /* key code for VTOC labels: 44 times 0x04 */ - __u8 DS4IDFMT; /* format identifier */ - struct vtoc_cchhb DS4HPCHR; /* highest address of a format 1 DSCB */ - __u16 DS4DSREC; /* number of available DSCB's */ - struct vtoc_cchh DS4HCCHH; /* CCHH of next available alternate track */ - __u16 DS4NOATK; /* number of remaining alternate tracks */ - __u8 DS4VTOCI; /* VTOC indicators */ - __u8 DS4NOEXT; /* number of extents in VTOC */ - __u8 DS4SMSFG; /* system managed storage indicators */ - __u8 DS4DEVAC; /* number of alternate cylinders. - * Subtract from first two bytes of - * DS4DEVSZ to get number of usable - * cylinders. can be zero. valid - * only if DS4DEVAV on. */ - struct vtoc_dev_const DS4DEVCT; /* device constants */ - char DS4AMTIM[8]; /* VSAM time stamp */ - char DS4AMCAT[3]; /* VSAM catalog indicator */ - char DS4R2TIM[8]; /* VSAM volume/catalog match time stamp */ - char res1[5]; /* reserved */ - char DS4F6PTR[5]; /* pointer to first format 6 DSCB */ - struct vtoc_extent DS4VTOCE; /* VTOC extent description */ - char res2[10]; /* reserved */ - __u8 DS4EFLVL; /* extended free-space management level */ - struct vtoc_cchhb DS4EFPTR; /* pointer to extended free-space info */ - char res3[9]; /* reserved */ -} __attribute__ ((packed)); - -struct vtoc_ds5ext -{ - __u16 t; /* RTA of the first track of free extent */ - __u16 fc; /* number of whole cylinders in free ext. */ - __u8 ft; /* number of remaining free tracks */ -} __attribute__ ((packed)); - -struct vtoc_format5_label -{ - char DS5KEYID[4]; /* key identifier */ - struct vtoc_ds5ext DS5AVEXT; /* first available (free-space) extent. */ - struct vtoc_ds5ext DS5EXTAV[7]; /* seven available extents */ - __u8 DS5FMTID; /* format identifier */ - struct vtoc_ds5ext DS5MAVET[18]; /* eighteen available extents */ - struct vtoc_cchhb DS5PTRDS; /* pointer to next format5 DSCB */ -} __attribute__ ((packed)); - -struct vtoc_ds7ext -{ - __u32 a; /* starting RTA value */ - __u32 b; /* ending RTA value + 1 */ -} __attribute__ ((packed)); - -struct vtoc_format7_label -{ - char DS7KEYID[4]; /* key identifier */ - struct vtoc_ds7ext DS7EXTNT[5]; /* space for 5 extent descriptions */ - __u8 DS7FMTID; /* format identifier */ - struct vtoc_ds7ext DS7ADEXT[11]; /* space for 11 extent descriptions */ - char res1[2]; /* reserved */ - struct vtoc_cchhb DS7PTRDS; /* pointer to next FMT7 DSCB */ -} __attribute__ ((packed)); - -struct vtoc_cms_label { - __u8 label_id[4]; /* Label identifier */ - __u8 vol_id[6]; /* Volid */ - __u16 version_id; /* Version identifier */ - __u32 block_size; /* Disk block size */ - __u32 origin_ptr; /* Disk origin pointer */ - __u32 usable_count; /* Number of usable cylinders/blocks */ - __u32 formatted_count; /* Maximum number of formatted cylinders/ - * blocks */ - __u32 block_count; /* Disk size in CMS blocks */ - __u32 used_count; /* Number of CMS blocks in use */ - __u32 fst_size; /* File Status Table (FST) size */ - __u32 fst_count; /* Number of FSTs per CMS block */ - __u8 format_date[6]; /* Disk FORMAT date */ - __u8 reserved1[2]; - __u32 disk_offset; /* Disk offset when reserved*/ - __u32 map_block; /* Allocation Map Block with next hole */ - __u32 hblk_disp; /* Displacement into HBLK data of next hole */ - __u32 user_disp; /* Displacement into user part of Allocation - * map */ - __u8 reserved2[4]; - __u8 segment_name[8]; /* Name of shared segment */ -} __attribute__ ((packed)); - -#endif /* _ASM_S390_VTOC_H */ diff --git a/include/asm-s390/xor.h b/include/asm-s390/xor.h deleted file mode 100644 index c82eb12..0000000 --- a/include/asm-s390/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-s390/zcrypt.h b/include/asm-s390/zcrypt.h deleted file mode 100644 index 00d3bbd..0000000 --- a/include/asm-s390/zcrypt.h +++ /dev/null @@ -1,276 +0,0 @@ -/* - * include/asm-s390/zcrypt.h - * - * zcrypt 2.1.0 (user-visible header) - * - * Copyright (C) 2001, 2006 IBM Corporation - * Author(s): Robert Burroughs - * Eric Rossman (edrossma@us.ibm.com) - * - * Hotplug & misc device support: Jochen Roehrig (roehrig@de.ibm.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_S390_ZCRYPT_H -#define __ASM_S390_ZCRYPT_H - -#define ZCRYPT_VERSION 2 -#define ZCRYPT_RELEASE 1 -#define ZCRYPT_VARIANT 1 - -#include -#include - -/** - * struct ica_rsa_modexpo - * - * Requirements: - * - outputdatalength is at least as large as inputdatalength. - * - All key parts are right justified in their fields, padded on - * the left with zeroes. - * - length(b_key) = inputdatalength - * - length(n_modulus) = inputdatalength - */ -struct ica_rsa_modexpo { - char __user * inputdata; - unsigned int inputdatalength; - char __user * outputdata; - unsigned int outputdatalength; - char __user * b_key; - char __user * n_modulus; -}; - -/** - * struct ica_rsa_modexpo_crt - * - * Requirements: - * - inputdatalength is even. - * - outputdatalength is at least as large as inputdatalength. - * - All key parts are right justified in their fields, padded on - * the left with zeroes. - * - length(bp_key) = inputdatalength/2 + 8 - * - length(bq_key) = inputdatalength/2 - * - length(np_key) = inputdatalength/2 + 8 - * - length(nq_key) = inputdatalength/2 - * - length(u_mult_inv) = inputdatalength/2 + 8 - */ -struct ica_rsa_modexpo_crt { - char __user * inputdata; - unsigned int inputdatalength; - char __user * outputdata; - unsigned int outputdatalength; - char __user * bp_key; - char __user * bq_key; - char __user * np_prime; - char __user * nq_prime; - char __user * u_mult_inv; -}; - -/** - * CPRBX - * Note that all shorts and ints are big-endian. - * All pointer fields are 16 bytes long, and mean nothing. - * - * A request CPRB is followed by a request_parameter_block. - * - * The request (or reply) parameter block is organized thus: - * function code - * VUD block - * key block - */ -struct CPRBX { - unsigned short cprb_len; /* CPRB length 220 */ - unsigned char cprb_ver_id; /* CPRB version id. 0x02 */ - unsigned char pad_000[3]; /* Alignment pad bytes */ - unsigned char func_id[2]; /* function id 0x5432 */ - unsigned char cprb_flags[4]; /* Flags */ - unsigned int req_parml; /* request parameter buffer len */ - unsigned int req_datal; /* request data buffer */ - unsigned int rpl_msgbl; /* reply message block length */ - unsigned int rpld_parml; /* replied parameter block len */ - unsigned int rpl_datal; /* reply data block len */ - unsigned int rpld_datal; /* replied data block len */ - unsigned int req_extbl; /* request extension block len */ - unsigned char pad_001[4]; /* reserved */ - unsigned int rpld_extbl; /* replied extension block len */ - unsigned char padx000[16 - sizeof (char *)]; - unsigned char * req_parmb; /* request parm block 'address' */ - unsigned char padx001[16 - sizeof (char *)]; - unsigned char * req_datab; /* request data block 'address' */ - unsigned char padx002[16 - sizeof (char *)]; - unsigned char * rpl_parmb; /* reply parm block 'address' */ - unsigned char padx003[16 - sizeof (char *)]; - unsigned char * rpl_datab; /* reply data block 'address' */ - unsigned char padx004[16 - sizeof (char *)]; - unsigned char * req_extb; /* request extension block 'addr'*/ - unsigned char padx005[16 - sizeof (char *)]; - unsigned char * rpl_extb; /* reply extension block 'address'*/ - unsigned short ccp_rtcode; /* server return code */ - unsigned short ccp_rscode; /* server reason code */ - unsigned int mac_data_len; /* Mac Data Length */ - unsigned char logon_id[8]; /* Logon Identifier */ - unsigned char mac_value[8]; /* Mac Value */ - unsigned char mac_content_flgs;/* Mac content flag byte */ - unsigned char pad_002; /* Alignment */ - unsigned short domain; /* Domain */ - unsigned char usage_domain[4];/* Usage domain */ - unsigned char cntrl_domain[4];/* Control domain */ - unsigned char S390enf_mask[4];/* S/390 enforcement mask */ - unsigned char pad_004[36]; /* reserved */ -} __attribute__((packed)); - -/** - * xcRB - */ -struct ica_xcRB { - unsigned short agent_ID; - unsigned int user_defined; - unsigned short request_ID; - unsigned int request_control_blk_length; - unsigned char padding1[16 - sizeof (char *)]; - char __user * request_control_blk_addr; - unsigned int request_data_length; - char padding2[16 - sizeof (char *)]; - char __user * request_data_address; - unsigned int reply_control_blk_length; - char padding3[16 - sizeof (char *)]; - char __user * reply_control_blk_addr; - unsigned int reply_data_length; - char padding4[16 - sizeof (char *)]; - char __user * reply_data_addr; - unsigned short priority_window; - unsigned int status; -} __attribute__((packed)); -#define AUTOSELECT ((unsigned int)0xFFFFFFFF) - -#define ZCRYPT_IOCTL_MAGIC 'z' - -/** - * Interface notes: - * - * The ioctl()s which are implemented (along with relevant details) - * are: - * - * ICARSAMODEXPO - * Perform an RSA operation using a Modulus-Exponent pair - * This takes an ica_rsa_modexpo struct as its arg. - * - * NOTE: please refer to the comments preceding this structure - * for the implementation details for the contents of the - * block - * - * ICARSACRT - * Perform an RSA operation using a Chinese-Remainder Theorem key - * This takes an ica_rsa_modexpo_crt struct as its arg. - * - * NOTE: please refer to the comments preceding this structure - * for the implementation details for the contents of the - * block - * - * ZSECSENDCPRB - * Send an arbitrary CPRB to a crypto card. - * - * Z90STAT_STATUS_MASK - * Return an 64 element array of unsigned chars for the status of - * all devices. - * 0x01: PCICA - * 0x02: PCICC - * 0x03: PCIXCC_MCL2 - * 0x04: PCIXCC_MCL3 - * 0x05: CEX2C - * 0x06: CEX2A - * 0x0d: device is disabled via the proc filesystem - * - * Z90STAT_QDEPTH_MASK - * Return an 64 element array of unsigned chars for the queue - * depth of all devices. - * - * Z90STAT_PERDEV_REQCNT - * Return an 64 element array of unsigned integers for the number - * of successfully completed requests per device since the device - * was detected and made available. - * - * Z90STAT_REQUESTQ_COUNT - * Return an integer count of the number of entries waiting to be - * sent to a device. - * - * Z90STAT_PENDINGQ_COUNT - * Return an integer count of the number of entries sent to all - * devices awaiting the reply. - * - * Z90STAT_TOTALOPEN_COUNT - * Return an integer count of the number of open file handles. - * - * Z90STAT_DOMAIN_INDEX - * Return the integer value of the Cryptographic Domain. - * - * The following ioctls are deprecated and should be no longer used: - * - * Z90STAT_TOTALCOUNT - * Return an integer count of all device types together. - * - * Z90STAT_PCICACOUNT - * Return an integer count of all PCICAs. - * - * Z90STAT_PCICCCOUNT - * Return an integer count of all PCICCs. - * - * Z90STAT_PCIXCCMCL2COUNT - * Return an integer count of all MCL2 PCIXCCs. - * - * Z90STAT_PCIXCCMCL3COUNT - * Return an integer count of all MCL3 PCIXCCs. - * - * Z90STAT_CEX2CCOUNT - * Return an integer count of all CEX2Cs. - * - * Z90STAT_CEX2ACOUNT - * Return an integer count of all CEX2As. - * - * ICAZ90STATUS - * Return some device driver status in a ica_z90_status struct - * This takes an ica_z90_status struct as its arg. - * - * Z90STAT_PCIXCCCOUNT - * Return an integer count of all PCIXCCs (MCL2 + MCL3). - * This is DEPRECATED now that MCL3 PCIXCCs are treated differently from - * MCL2 PCIXCCs. - */ - -/** - * Supported ioctl calls - */ -#define ICARSAMODEXPO _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x05, 0) -#define ICARSACRT _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x06, 0) -#define ZSECSENDCPRB _IOC(_IOC_READ|_IOC_WRITE, ZCRYPT_IOCTL_MAGIC, 0x81, 0) - -/* New status calls */ -#define Z90STAT_TOTALCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x40, int) -#define Z90STAT_PCICACOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x41, int) -#define Z90STAT_PCICCCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x42, int) -#define Z90STAT_PCIXCCMCL2COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4b, int) -#define Z90STAT_PCIXCCMCL3COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4c, int) -#define Z90STAT_CEX2CCOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4d, int) -#define Z90STAT_CEX2ACOUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4e, int) -#define Z90STAT_REQUESTQ_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x44, int) -#define Z90STAT_PENDINGQ_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x45, int) -#define Z90STAT_TOTALOPEN_COUNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x46, int) -#define Z90STAT_DOMAIN_INDEX _IOR(ZCRYPT_IOCTL_MAGIC, 0x47, int) -#define Z90STAT_STATUS_MASK _IOR(ZCRYPT_IOCTL_MAGIC, 0x48, char[64]) -#define Z90STAT_QDEPTH_MASK _IOR(ZCRYPT_IOCTL_MAGIC, 0x49, char[64]) -#define Z90STAT_PERDEV_REQCNT _IOR(ZCRYPT_IOCTL_MAGIC, 0x4a, int[64]) - -#endif /* __ASM_S390_ZCRYPT_H */ -- cgit v1.1 From 5c7edcd7ee6b77b88252fe4096dce1a46a60c829 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Thu, 31 Jul 2008 02:04:09 -0700 Subject: tracehook: fix exit_signal=0 case My commit 2b2a1ff64afbadac842bbc58c5166962cf4f7664 introduced a regression (sorry about that) for the odd case of exit_signal=0 (e.g. clone_flags=0). This is not a normal use, but it's used by a case in the glibc test suite. Dying with exit_signal=0 sends no signal, but it's supposed to wake up a parent's blocked wait*() calls (unlike the delayed_group_leader case). This fixes tracehook_notify_death() and its caller to distinguish a "signal 0" wakeup from the delayed_group_leader case (with no wakeup). Signed-off-by: Roland McGrath Tested-by: Serge Hallyn Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index b187558..1253283 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -493,16 +493,21 @@ static inline int tracehook_notify_jctl(int notify, int why) * @death_cookie: value to pass to tracehook_report_death() * @group_dead: nonzero if this was the last thread in the group to die * - * Return the signal number to send our parent with do_notify_parent(), or - * zero to send no signal and leave a zombie, or -1 to self-reap right now. + * A return value >= 0 means call do_notify_parent() with that signal + * number. Negative return value can be %DEATH_REAP to self-reap right + * now, or %DEATH_DELAYED_GROUP_LEADER to a zombie without notifying our + * parent. Note that a return value of 0 means a do_notify_parent() call + * that sends no signal, but still wakes up a parent blocked in wait*(). * * Called with write_lock_irq(&tasklist_lock) held. */ +#define DEATH_REAP -1 +#define DEATH_DELAYED_GROUP_LEADER -2 static inline int tracehook_notify_death(struct task_struct *task, void **death_cookie, int group_dead) { if (task->exit_signal == -1) - return task->ptrace ? SIGCHLD : -1; + return task->ptrace ? SIGCHLD : DEATH_REAP; /* * If something other than our normal parent is ptracing us, then @@ -512,21 +517,21 @@ static inline int tracehook_notify_death(struct task_struct *task, if (thread_group_empty(task) && !ptrace_reparented(task)) return task->exit_signal; - return task->ptrace ? SIGCHLD : 0; + return task->ptrace ? SIGCHLD : DEATH_DELAYED_GROUP_LEADER; } /** * tracehook_report_death - task is dead and ready to be reaped * @task: @current task now exiting - * @signal: signal number sent to parent, or 0 or -1 + * @signal: return value from tracheook_notify_death() * @death_cookie: value passed back from tracehook_notify_death() * @group_dead: nonzero if this was the last thread in the group to die * * Thread has just become a zombie or is about to self-reap. If positive, * @signal is the signal number just sent to the parent (usually %SIGCHLD). - * If @signal is -1, this thread will self-reap. If @signal is 0, this is - * a delayed_group_leader() zombie. The @death_cookie was passed back by - * tracehook_notify_death(). + * If @signal is %DEATH_REAP, this thread will self-reap. If @signal is + * %DEATH_DELAYED_GROUP_LEADER, this is a delayed_group_leader() zombie. + * The @death_cookie was passed back by tracehook_notify_death(). * * If normal reaping is not inhibited, @task->exit_state might be changing * in parallel. -- cgit v1.1 From c6de002617c199f80f9a2a713dffc263bdc69b81 Mon Sep 17 00:00:00 2001 From: Yoshinori Sato Date: Thu, 31 Jul 2008 00:07:29 -0700 Subject: Missing symbol prefix on vmlinux.lds.h ARCH=h8300: init/main.c:781: undefined reference to `___early_initcall_end' Same problem have __start___bug_table __stop___bug_table __tracedata_start __tracedata_end __per_cpu_start __per_cpu_end When defining a symbol in vmlinux.lds, use the VMLINUX_SYMBOL macro. VMLINUX_SYMBOL adds a prefix charactor. You can't just use straight symbol names in common header files as they dont take into consideration weird arch-specific ABI conventions. in the case of Blackfin/h8300, the ABI dictates that any C-visible symbols have an underscore prefixed to them. Thus all symbols in vmlinux.lds.h need to be wrapped in VMLINUX_SYMBOL() so that each arch can put hide this magic in their own files. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Yoshinori Sato Cc: Jeremy Fitzhardinge Cc: "Mike Frysinger" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-generic/vmlinux.lds.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index 6d88a92..cb752ba 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h @@ -333,9 +333,9 @@ #define BUG_TABLE \ . = ALIGN(8); \ __bug_table : AT(ADDR(__bug_table) - LOAD_OFFSET) { \ - __start___bug_table = .; \ + VMLINUX_SYMBOL(__start___bug_table) = .; \ *(__bug_table) \ - __stop___bug_table = .; \ + VMLINUX_SYMBOL(__stop___bug_table) = .; \ } #else #define BUG_TABLE @@ -345,9 +345,9 @@ #define TRACEDATA \ . = ALIGN(4); \ .tracedata : AT(ADDR(.tracedata) - LOAD_OFFSET) { \ - __tracedata_start = .; \ + VMLINUX_SYMBOL(__tracedata_start) = .; \ *(.tracedata) \ - __tracedata_end = .; \ + VMLINUX_SYMBOL(__tracedata_end) = .; \ } #else #define TRACEDATA @@ -362,7 +362,7 @@ #define INITCALLS \ *(.initcallearly.init) \ - __early_initcall_end = .; \ + VMLINUX_SYMBOL(__early_initcall_end) = .; \ *(.initcall0.init) \ *(.initcall0s.init) \ *(.initcall1.init) \ @@ -383,9 +383,9 @@ #define PERCPU(align) \ . = ALIGN(align); \ - __per_cpu_start = .; \ + VMLINUX_SYMBOL(__per_cpu_start) = .; \ .data.percpu : AT(ADDR(.data.percpu) - LOAD_OFFSET) { \ *(.data.percpu) \ *(.data.percpu.shared_aligned) \ } \ - __per_cpu_end = .; + VMLINUX_SYMBOL(__per_cpu_end) = .; -- cgit v1.1 From 02c363808981b67e631fe71cc7e952497f761bef Mon Sep 17 00:00:00 2001 From: David Howells Date: Thu, 31 Jul 2008 13:01:30 +0100 Subject: MN10300: Wire up new system calls Wire up system calls added in the last merge window for the MN10300 arch. Signed-off-by: David Howells Signed-off-by: Linus Torvalds --- include/asm-mn10300/unistd.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-mn10300/unistd.h b/include/asm-mn10300/unistd.h index 3721aa9..543a4f9 100644 --- a/include/asm-mn10300/unistd.h +++ b/include/asm-mn10300/unistd.h @@ -338,6 +338,12 @@ #define __NR_fallocate 325 #define __NR_timerfd_settime 326 #define __NR_timerfd_gettime 327 +#define __NR_signalfd4 328 +#define __NR_eventfd2 329 +#define __NR_epoll_create1 330 +#define __NR_dup3 331 +#define __NR_pipe2 332 +#define __NR_inotify_init1 333 #ifdef __KERNEL__ -- cgit v1.1 From 784dd7b64ca661722f539db906d56ce54906f2fb Mon Sep 17 00:00:00 2001 From: David Howells Date: Thu, 31 Jul 2008 13:46:33 +0100 Subject: FRV: Wire up new system calls Wire up for FRV the system calls that were added in the last merge window. Signed-off-by: David Howells Signed-off-by: Linus Torvalds --- include/asm-frv/unistd.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-frv/unistd.h b/include/asm-frv/unistd.h index f184eb8..edcfaf5 100644 --- a/include/asm-frv/unistd.h +++ b/include/asm-frv/unistd.h @@ -333,10 +333,16 @@ #define __NR_fallocate 324 #define __NR_timerfd_settime 325 #define __NR_timerfd_gettime 326 +#define __NR_signalfd4 327 +#define __NR_eventfd2 328 +#define __NR_epoll_create1 329 +#define __NR_dup3 330 +#define __NR_pipe2 331 +#define __NR_inotify_init1 332 #ifdef __KERNEL__ -#define NR_syscalls 325 +#define NR_syscalls 333 #define __ARCH_WANT_IPC_PARSE_VERSION /* #define __ARCH_WANT_OLD_READDIR */ -- cgit v1.1 From 4744b43431e8613f920c5cba88346756f53c5165 Mon Sep 17 00:00:00 2001 From: Tim Bird Date: Fri, 1 Aug 2008 14:05:50 -0700 Subject: embedded: fix vc_translate operator precedence This fixes a bug in operator precedence in the newly introduced vc_translate macro. Without this fix, the translation of some characters on the kernel console is garbled. This patch was copied to the e-mail list previously for testing. Now, all reports confirm that it works, so this is an official post for application. Signed-off-by: Tim Bird Signed-off-by: David Woodhouse --- include/linux/vt_kern.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h index 14c0e91..8c8119f 100644 --- a/include/linux/vt_kern.h +++ b/include/linux/vt_kern.h @@ -74,7 +74,7 @@ void con_protect_unimap(struct vc_data *vc, int rdonly); int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc); #define vc_translate(vc, c) ((vc)->vc_translate[(c) | \ - (vc)->vc_toggle_meta ? 0x80 : 0]) + ((vc)->vc_toggle_meta ? 0x80 : 0)]) #else #define con_set_trans_old(arg) (0) #define con_get_trans_old(arg) (-EINVAL) -- cgit v1.1 From ff4cc1de2401ad44ae084c3f5a9e898af0879520 Mon Sep 17 00:00:00 2001 From: Karsten Keil Date: Wed, 30 Jul 2008 18:26:58 +0200 Subject: mISDN cleanup user interface The channelmap should have the same size on 32 and 64 bit systems and should not depend on endianess. Thanks to David Woodhouse for spotting this. Signed-off-by: Karsten Keil --- include/linux/mISDNif.h | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/mISDNif.h b/include/linux/mISDNif.h index 5c948f3..8f2d60d 100644 --- a/include/linux/mISDNif.h +++ b/include/linux/mISDNif.h @@ -37,7 +37,7 @@ */ #define MISDN_MAJOR_VERSION 1 #define MISDN_MINOR_VERSION 0 -#define MISDN_RELEASE 18 +#define MISDN_RELEASE 19 /* primitives for information exchange * generell format @@ -242,7 +242,8 @@ struct mISDNhead { #define TEI_SAPI 63 #define CTRL_SAPI 0 -#define MISDN_CHMAP_SIZE 4 +#define MISDN_MAX_CHANNEL 127 +#define MISDN_CHMAP_SIZE ((MISDN_MAX_CHANNEL + 1) >> 3) #define SOL_MISDN 0 @@ -275,11 +276,32 @@ struct mISDN_devinfo { u_int Dprotocols; u_int Bprotocols; u_int protocol; - u_long channelmap[MISDN_CHMAP_SIZE]; + u_char channelmap[MISDN_CHMAP_SIZE]; u_int nrbchan; char name[MISDN_MAX_IDLEN]; }; +static inline int +test_channelmap(u_int nr, u_char *map) +{ + if (nr <= MISDN_MAX_CHANNEL) + return map[nr >> 3] & (1 << (nr & 7)); + else + return 0; +} + +static inline void +set_channelmap(u_int nr, u_char *map) +{ + map[nr >> 3] |= (1 << (nr & 7)); +} + +static inline void +clear_channelmap(u_int nr, u_char *map) +{ + map[nr >> 3] &= ~(1 << (nr & 7)); +} + /* CONTROL_CHANNEL parameters */ #define MISDN_CTRL_GETOP 0x0000 #define MISDN_CTRL_LOOP 0x0001 @@ -405,7 +427,7 @@ struct mISDNdevice { u_int Dprotocols; u_int Bprotocols; u_int nrbchan; - u_long channelmap[MISDN_CHMAP_SIZE]; + u_char channelmap[MISDN_CHMAP_SIZE]; struct list_head bchannels; struct mISDNchannel *teimgr; struct device dev; @@ -430,7 +452,7 @@ struct mISDNstack { #endif }; -/* global alloc/queue dunctions */ +/* global alloc/queue functions */ static inline struct sk_buff * mI_alloc_skb(unsigned int len, gfp_t gfp_mask) -- cgit v1.1 From 85ebd00334099fd5d296bcae74a66c943d46686d Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Sat, 2 Aug 2008 19:12:23 +0200 Subject: Fix IHEX firmware generation/loading Fix both the IHEX firmware generation (len field always null, and EOF marker a byte too short) and loading (struct ihex_binrec needs to be packed to reflect the on-disk structure). Signed-off-by: Marc Zyngier Signed-off-by: David Woodhouse --- include/linux/ihex.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/ihex.h b/include/linux/ihex.h index 2baace2..31d8629 100644 --- a/include/linux/ihex.h +++ b/include/linux/ihex.h @@ -18,7 +18,7 @@ struct ihex_binrec { __be32 addr; __be16 len; uint8_t data[0]; -} __attribute__((aligned(4))); +} __attribute__((packed)); /* Find the next record, taking into account the 4-byte alignment */ static inline const struct ihex_binrec * -- cgit v1.1 From 4baa9922430662431231ac637adedddbb0cfb2d7 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 2 Aug 2008 10:55:55 +0100 Subject: [ARM] move include/asm-arm to arch/arm/include/asm Move platform independent header files to arch/arm/include/asm, leaving those in asm/arch* and asm/plat* alone. Signed-off-by: Russell King --- include/asm-arm/Kbuild | 3 - include/asm-arm/a.out-core.h | 49 -- include/asm-arm/a.out.h | 34 -- include/asm-arm/assembler.h | 116 ---- include/asm-arm/atomic.h | 212 ------- include/asm-arm/auxvec.h | 4 - include/asm-arm/bitops.h | 340 ----------- include/asm-arm/bug.h | 24 - include/asm-arm/bugs.h | 21 - include/asm-arm/byteorder.h | 58 -- include/asm-arm/cache.h | 10 - include/asm-arm/cacheflush.h | 537 ----------------- include/asm-arm/checksum.h | 139 ----- include/asm-arm/cnt32_to_63.h | 78 --- include/asm-arm/cpu-multi32.h | 69 --- include/asm-arm/cpu-single.h | 44 -- include/asm-arm/cpu.h | 25 - include/asm-arm/cputime.h | 6 - include/asm-arm/current.h | 15 - include/asm-arm/delay.h | 44 -- include/asm-arm/device.h | 15 - include/asm-arm/div64.h | 227 ------- include/asm-arm/dma-mapping.h | 456 -------------- include/asm-arm/dma.h | 143 ----- include/asm-arm/domain.h | 78 --- include/asm-arm/ecard.h | 219 ------- include/asm-arm/elf.h | 116 ---- include/asm-arm/emergency-restart.h | 6 - include/asm-arm/errno.h | 6 - include/asm-arm/fb.h | 19 - include/asm-arm/fcntl.h | 11 - include/asm-arm/fiq.h | 37 -- include/asm-arm/flat.h | 19 - include/asm-arm/floppy.h | 148 ----- include/asm-arm/fpstate.h | 93 --- include/asm-arm/ftrace.h | 14 - include/asm-arm/futex.h | 6 - include/asm-arm/glue.h | 149 ----- include/asm-arm/gpio.h | 7 - include/asm-arm/hardirq.h | 32 - include/asm-arm/hardware.h | 18 - include/asm-arm/hardware/arm_timer.h | 21 - include/asm-arm/hardware/arm_twd.h | 21 - include/asm-arm/hardware/cache-l2x0.h | 56 -- include/asm-arm/hardware/clps7111.h | 184 ------ include/asm-arm/hardware/cs89712.h | 49 -- include/asm-arm/hardware/debug-8250.S | 29 - include/asm-arm/hardware/debug-pl01x.S | 29 - include/asm-arm/hardware/dec21285.h | 147 ----- include/asm-arm/hardware/entry-macro-iomd.S | 139 ----- include/asm-arm/hardware/ep7211.h | 40 -- include/asm-arm/hardware/ep7212.h | 83 --- include/asm-arm/hardware/gic.h | 42 -- include/asm-arm/hardware/icst307.h | 38 -- include/asm-arm/hardware/icst525.h | 36 -- include/asm-arm/hardware/ioc.h | 72 --- include/asm-arm/hardware/iomd.h | 226 ------- include/asm-arm/hardware/iop3xx-adma.h | 888 ---------------------------- include/asm-arm/hardware/iop3xx-gpio.h | 73 --- include/asm-arm/hardware/iop3xx.h | 312 ---------- include/asm-arm/hardware/iop_adma.h | 116 ---- include/asm-arm/hardware/it8152.h | 99 ---- include/asm-arm/hardware/linkup-l1110.h | 48 -- include/asm-arm/hardware/locomo.h | 217 ------- include/asm-arm/hardware/memc.h | 26 - include/asm-arm/hardware/pci_v3.h | 186 ------ include/asm-arm/hardware/sa1111.h | 581 ------------------ include/asm-arm/hardware/scoop.h | 69 --- include/asm-arm/hardware/sharpsl_pm.h | 106 ---- include/asm-arm/hardware/ssp.h | 28 - include/asm-arm/hardware/uengine.h | 62 -- include/asm-arm/hardware/vic.h | 45 -- include/asm-arm/hw_irq.h | 9 - include/asm-arm/hwcap.h | 29 - include/asm-arm/ide.h | 23 - include/asm-arm/io.h | 287 --------- include/asm-arm/ioctl.h | 1 - include/asm-arm/ioctls.h | 84 --- include/asm-arm/ipcbuf.h | 29 - include/asm-arm/irq.h | 28 - include/asm-arm/irq_regs.h | 1 - include/asm-arm/irqflags.h | 132 ----- include/asm-arm/kdebug.h | 1 - include/asm-arm/kexec.h | 31 - include/asm-arm/kgdb.h | 104 ---- include/asm-arm/kmap_types.h | 24 - include/asm-arm/kprobes.h | 79 --- include/asm-arm/leds.h | 50 -- include/asm-arm/limits.h | 11 - include/asm-arm/linkage.h | 11 - include/asm-arm/local.h | 1 - include/asm-arm/locks.h | 274 --------- include/asm-arm/mach/arch.h | 60 -- include/asm-arm/mach/dma.h | 57 -- include/asm-arm/mach/flash.h | 39 -- include/asm-arm/mach/irda.h | 20 - include/asm-arm/mach/irq.h | 54 -- include/asm-arm/mach/map.h | 36 -- include/asm-arm/mach/mmc.h | 15 - include/asm-arm/mach/pci.h | 72 --- include/asm-arm/mach/serial_at91.h | 33 -- include/asm-arm/mach/serial_sa1100.h | 31 - include/asm-arm/mach/sharpsl_param.h | 37 -- include/asm-arm/mach/time.h | 57 -- include/asm-arm/mach/udc_pxa2xx.h | 29 - include/asm-arm/mc146818rtc.h | 28 - include/asm-arm/memory.h | 334 ----------- include/asm-arm/mman.h | 17 - include/asm-arm/mmu.h | 33 -- include/asm-arm/mmu_context.h | 117 ---- include/asm-arm/mmzone.h | 30 - include/asm-arm/module.h | 18 - include/asm-arm/msgbuf.h | 31 - include/asm-arm/mtd-xip.h | 26 - include/asm-arm/mutex.h | 127 ---- include/asm-arm/nwflash.h | 9 - include/asm-arm/page-nommu.h | 49 -- include/asm-arm/page.h | 199 ------- include/asm-arm/param.h | 31 - include/asm-arm/parport.h | 18 - include/asm-arm/pci.h | 91 --- include/asm-arm/percpu.h | 6 - include/asm-arm/pgalloc.h | 136 ----- include/asm-arm/pgtable-hwdef.h | 90 --- include/asm-arm/pgtable-nommu.h | 118 ---- include/asm-arm/pgtable.h | 401 ------------- include/asm-arm/poll.h | 1 - include/asm-arm/posix_types.h | 77 --- include/asm-arm/proc-fns.h | 241 -------- include/asm-arm/processor.h | 131 ---- include/asm-arm/procinfo.h | 49 -- include/asm-arm/ptrace.h | 162 ----- include/asm-arm/resource.h | 6 - include/asm-arm/scatterlist.h | 27 - include/asm-arm/sections.h | 1 - include/asm-arm/segment.h | 11 - include/asm-arm/sembuf.h | 25 - include/asm-arm/serial.h | 19 - include/asm-arm/setup.h | 226 ------- include/asm-arm/shmbuf.h | 42 -- include/asm-arm/shmparam.h | 16 - include/asm-arm/sigcontext.h | 34 -- include/asm-arm/siginfo.h | 6 - include/asm-arm/signal.h | 164 ----- include/asm-arm/sizes.h | 56 -- include/asm-arm/smp.h | 147 ----- include/asm-arm/socket.h | 57 -- include/asm-arm/sockios.h | 13 - include/asm-arm/sparsemem.h | 10 - include/asm-arm/spinlock.h | 224 ------- include/asm-arm/spinlock_types.h | 20 - include/asm-arm/stat.h | 87 --- include/asm-arm/statfs.h | 42 -- include/asm-arm/string.h | 50 -- include/asm-arm/suspend.h | 4 - include/asm-arm/system.h | 388 ------------ include/asm-arm/termbits.h | 197 ------ include/asm-arm/termios.h | 92 --- include/asm-arm/therm.h | 28 - include/asm-arm/thread_info.h | 153 ----- include/asm-arm/thread_notify.h | 48 -- include/asm-arm/timex.h | 24 - include/asm-arm/tlb.h | 94 --- include/asm-arm/tlbflush.h | 500 ---------------- include/asm-arm/topology.h | 6 - include/asm-arm/traps.h | 29 - include/asm-arm/types.h | 31 - include/asm-arm/uaccess.h | 444 -------------- include/asm-arm/ucontext.h | 103 ---- include/asm-arm/unaligned.h | 19 - include/asm-arm/unistd.h | 450 -------------- include/asm-arm/user.h | 84 --- include/asm-arm/vfp.h | 84 --- include/asm-arm/vfpmacros.h | 47 -- include/asm-arm/vga.h | 12 - include/asm-arm/xor.h | 141 ----- 176 files changed, 16295 deletions(-) delete mode 100644 include/asm-arm/Kbuild delete mode 100644 include/asm-arm/a.out-core.h delete mode 100644 include/asm-arm/a.out.h delete mode 100644 include/asm-arm/assembler.h delete mode 100644 include/asm-arm/atomic.h delete mode 100644 include/asm-arm/auxvec.h delete mode 100644 include/asm-arm/bitops.h delete mode 100644 include/asm-arm/bug.h delete mode 100644 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73237bd..0000000 --- a/include/asm-arm/Kbuild +++ /dev/null @@ -1,3 +0,0 @@ -include include/asm-generic/Kbuild.asm - -unifdef-y += hwcap.h diff --git a/include/asm-arm/a.out-core.h b/include/asm-arm/a.out-core.h deleted file mode 100644 index 93d04ac..0000000 --- a/include/asm-arm/a.out-core.h +++ /dev/null @@ -1,49 +0,0 @@ -/* a.out coredump register dumper - * - * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public Licence - * as published by the Free Software Foundation; either version - * 2 of the Licence, or (at your option) any later version. - */ - -#ifndef _ASM_A_OUT_CORE_H -#define _ASM_A_OUT_CORE_H - -#ifdef __KERNEL__ - -#include -#include - -/* - * fill in the user structure for an a.out core dump - */ -static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump) -{ - struct task_struct *tsk = current; - - dump->magic = CMAGIC; - dump->start_code = tsk->mm->start_code; - dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1); - - dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT; - dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT; - dump->u_ssize = 0; - - dump->u_debugreg[0] = tsk->thread.debug.bp[0].address; - dump->u_debugreg[1] = tsk->thread.debug.bp[1].address; - dump->u_debugreg[2] = tsk->thread.debug.bp[0].insn.arm; - dump->u_debugreg[3] = tsk->thread.debug.bp[1].insn.arm; - dump->u_debugreg[4] = tsk->thread.debug.nsaved; - - if (dump->start_stack < 0x04000000) - dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT; - - dump->regs = *regs; - dump->u_fpvalid = dump_fpu (regs, &dump->u_fp); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_A_OUT_CORE_H */ diff --git a/include/asm-arm/a.out.h b/include/asm-arm/a.out.h deleted file mode 100644 index 79489fd..0000000 --- a/include/asm-arm/a.out.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ARM_A_OUT_H__ -#define __ARM_A_OUT_H__ - -#include -#include - -struct exec -{ - __u32 a_info; /* Use macros N_MAGIC, etc for access */ - __u32 a_text; /* length of text, in bytes */ - __u32 a_data; /* length of data, in bytes */ - __u32 a_bss; /* length of uninitialized data area for file, in bytes */ - __u32 a_syms; /* length of symbol table data in file, in bytes */ - __u32 a_entry; /* start address */ - __u32 a_trsize; /* length of relocation info for text, in bytes */ - __u32 a_drsize; /* length of relocation info for data, in bytes */ -}; - -/* - * This is always the same - */ -#define N_TXTADDR(a) (0x00008000) - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#define M_ARM 103 - -#ifndef LIBRARY_START_TEXT -#define LIBRARY_START_TEXT (0x00c00000) -#endif - -#endif /* __A_OUT_GNU_H__ */ diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h deleted file mode 100644 index 911393b..0000000 --- a/include/asm-arm/assembler.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/include/asm-arm/assembler.h - * - * Copyright (C) 1996-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains arm architecture specific defines - * for the different processors. - * - * Do not include any C declarations in this file - it is included by - * assembler source. - */ -#ifndef __ASSEMBLY__ -#error "Only include this from assembly code" -#endif - -#include - -/* - * Endian independent macros for shifting bytes within registers. - */ -#ifndef __ARMEB__ -#define pull lsr -#define push lsl -#define get_byte_0 lsl #0 -#define get_byte_1 lsr #8 -#define get_byte_2 lsr #16 -#define get_byte_3 lsr #24 -#define put_byte_0 lsl #0 -#define put_byte_1 lsl #8 -#define put_byte_2 lsl #16 -#define put_byte_3 lsl #24 -#else -#define pull lsl -#define push lsr -#define get_byte_0 lsr #24 -#define get_byte_1 lsr #16 -#define get_byte_2 lsr #8 -#define get_byte_3 lsl #0 -#define put_byte_0 lsl #24 -#define put_byte_1 lsl #16 -#define put_byte_2 lsl #8 -#define put_byte_3 lsl #0 -#endif - -/* - * Data preload for architectures that support it - */ -#if __LINUX_ARM_ARCH__ >= 5 -#define PLD(code...) code -#else -#define PLD(code...) -#endif - -/* - * This can be used to enable code to cacheline align the destination - * pointer when bulk writing to memory. Experiments on StrongARM and - * XScale didn't show this a worthwhile thing to do when the cache is not - * set to write-allocate (this would need further testing on XScale when WA - * is used). - * - * On Feroceon there is much to gain however, regardless of cache mode. - */ -#ifdef CONFIG_CPU_FEROCEON -#define CALGN(code...) code -#else -#define CALGN(code...) -#endif - -/* - * Enable and disable interrupts - */ -#if __LINUX_ARM_ARCH__ >= 6 - .macro disable_irq - cpsid i - .endm - - .macro enable_irq - cpsie i - .endm -#else - .macro disable_irq - msr cpsr_c, #PSR_I_BIT | SVC_MODE - .endm - - .macro enable_irq - msr cpsr_c, #SVC_MODE - .endm -#endif - -/* - * Save the current IRQ state and disable IRQs. Note that this macro - * assumes FIQs are enabled, and that the processor is in SVC mode. - */ - .macro save_and_disable_irqs, oldcpsr - mrs \oldcpsr, cpsr - disable_irq - .endm - -/* - * Restore interrupt state previously stored in a register. We don't - * guarantee that this will preserve the flags. - */ - .macro restore_irqs, oldcpsr - msr cpsr_c, \oldcpsr - .endm - -#define USER(x...) \ -9999: x; \ - .section __ex_table,"a"; \ - .align 3; \ - .long 9999b,9001f; \ - .previous diff --git a/include/asm-arm/atomic.h b/include/asm-arm/atomic.h deleted file mode 100644 index 3b59f94..0000000 --- a/include/asm-arm/atomic.h +++ /dev/null @@ -1,212 +0,0 @@ -/* - * linux/include/asm-arm/atomic.h - * - * Copyright (C) 1996 Russell King. - * Copyright (C) 2002 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_ATOMIC_H -#define __ASM_ARM_ATOMIC_H - -#include -#include - -typedef struct { volatile int counter; } atomic_t; - -#define ATOMIC_INIT(i) { (i) } - -#ifdef __KERNEL__ - -#define atomic_read(v) ((v)->counter) - -#if __LINUX_ARM_ARCH__ >= 6 - -/* - * ARMv6 UP and SMP safe atomic ops. We use load exclusive and - * store exclusive to ensure that these are atomic. We may loop - * to ensure that the update happens. Writing to 'v->counter' - * without using the following operations WILL break the atomic - * nature of these ops. - */ -static inline void atomic_set(atomic_t *v, int i) -{ - unsigned long tmp; - - __asm__ __volatile__("@ atomic_set\n" -"1: ldrex %0, [%1]\n" -" strex %0, %2, [%1]\n" -" teq %0, #0\n" -" bne 1b" - : "=&r" (tmp) - : "r" (&v->counter), "r" (i) - : "cc"); -} - -static inline int atomic_add_return(int i, atomic_t *v) -{ - unsigned long tmp; - int result; - - __asm__ __volatile__("@ atomic_add_return\n" -"1: ldrex %0, [%2]\n" -" add %0, %0, %3\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "Ir" (i) - : "cc"); - - return result; -} - -static inline int atomic_sub_return(int i, atomic_t *v) -{ - unsigned long tmp; - int result; - - __asm__ __volatile__("@ atomic_sub_return\n" -"1: ldrex %0, [%2]\n" -" sub %0, %0, %3\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (result), "=&r" (tmp) - : "r" (&v->counter), "Ir" (i) - : "cc"); - - return result; -} - -static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new) -{ - unsigned long oldval, res; - - do { - __asm__ __volatile__("@ atomic_cmpxchg\n" - "ldrex %1, [%2]\n" - "mov %0, #0\n" - "teq %1, %3\n" - "strexeq %0, %4, [%2]\n" - : "=&r" (res), "=&r" (oldval) - : "r" (&ptr->counter), "Ir" (old), "r" (new) - : "cc"); - } while (res); - - return oldval; -} - -static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) -{ - unsigned long tmp, tmp2; - - __asm__ __volatile__("@ atomic_clear_mask\n" -"1: ldrex %0, [%2]\n" -" bic %0, %0, %3\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" - : "=&r" (tmp), "=&r" (tmp2) - : "r" (addr), "Ir" (mask) - : "cc"); -} - -#else /* ARM_ARCH_6 */ - -#include - -#ifdef CONFIG_SMP -#error SMP not supported on pre-ARMv6 CPUs -#endif - -#define atomic_set(v,i) (((v)->counter) = (i)) - -static inline int atomic_add_return(int i, atomic_t *v) -{ - unsigned long flags; - int val; - - raw_local_irq_save(flags); - val = v->counter; - v->counter = val += i; - raw_local_irq_restore(flags); - - return val; -} - -static inline int atomic_sub_return(int i, atomic_t *v) -{ - unsigned long flags; - int val; - - raw_local_irq_save(flags); - val = v->counter; - v->counter = val -= i; - raw_local_irq_restore(flags); - - return val; -} - -static inline int atomic_cmpxchg(atomic_t *v, int old, int new) -{ - int ret; - unsigned long flags; - - raw_local_irq_save(flags); - ret = v->counter; - if (likely(ret == old)) - v->counter = new; - raw_local_irq_restore(flags); - - return ret; -} - -static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) -{ - unsigned long flags; - - raw_local_irq_save(flags); - *addr &= ~mask; - raw_local_irq_restore(flags); -} - -#endif /* __LINUX_ARM_ARCH__ */ - -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - - c = atomic_read(v); - while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c) - c = old; - return c != u; -} -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic_add(i, v) (void) atomic_add_return(i, v) -#define atomic_inc(v) (void) atomic_add_return(1, v) -#define atomic_sub(i, v) (void) atomic_sub_return(i, v) -#define atomic_dec(v) (void) atomic_sub_return(1, v) - -#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) -#define atomic_inc_return(v) (atomic_add_return(1, v)) -#define atomic_dec_return(v) (atomic_sub_return(1, v)) -#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) - -#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0) - -/* Atomic operations are already serializing on ARM */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#include -#endif -#endif diff --git a/include/asm-arm/auxvec.h b/include/asm-arm/auxvec.h deleted file mode 100644 index c0536f6..0000000 --- a/include/asm-arm/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMARM_AUXVEC_H -#define __ASMARM_AUXVEC_H - -#endif diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h deleted file mode 100644 index 9a1db20..0000000 --- a/include/asm-arm/bitops.h +++ /dev/null @@ -1,340 +0,0 @@ -/* - * Copyright 1995, Russell King. - * Various bits and pieces copyrights include: - * Linus Torvalds (test_bit). - * Big endian support: Copyright 2001, Nicolas Pitre - * reworked by rmk. - * - * bit 0 is the LSB of an "unsigned long" quantity. - * - * Please note that the code in this file should never be included - * from user space. Many of these are not implemented in assembler - * since they would be too costly. Also, they require privileged - * instructions (which are not available from user mode) to ensure - * that they are atomic. - */ - -#ifndef __ASM_ARM_BITOPS_H -#define __ASM_ARM_BITOPS_H - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include - -#define smp_mb__before_clear_bit() mb() -#define smp_mb__after_clear_bit() mb() - -/* - * These functions are the basis of our bit ops. - * - * First, the atomic bitops. These use native endian. - */ -static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - *p |= mask; - raw_local_irq_restore(flags); -} - -static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - *p &= ~mask; - raw_local_irq_restore(flags); -} - -static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - *p ^= mask; - raw_local_irq_restore(flags); -} - -static inline int -____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - res = *p; - *p = res | mask; - raw_local_irq_restore(flags); - - return res & mask; -} - -static inline int -____atomic_test_and_clear_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - res = *p; - *p = res & ~mask; - raw_local_irq_restore(flags); - - return res & mask; -} - -static inline int -____atomic_test_and_change_bit(unsigned int bit, volatile unsigned long *p) -{ - unsigned long flags; - unsigned int res; - unsigned long mask = 1UL << (bit & 31); - - p += bit >> 5; - - raw_local_irq_save(flags); - res = *p; - *p = res ^ mask; - raw_local_irq_restore(flags); - - return res & mask; -} - -#include - -/* - * A note about Endian-ness. - * ------------------------- - * - * When the ARM is put into big endian mode via CR15, the processor - * merely swaps the order of bytes within words, thus: - * - * ------------ physical data bus bits ----------- - * D31 ... D24 D23 ... D16 D15 ... D8 D7 ... D0 - * little byte 3 byte 2 byte 1 byte 0 - * big byte 0 byte 1 byte 2 byte 3 - * - * This means that reading a 32-bit word at address 0 returns the same - * value irrespective of the endian mode bit. - * - * Peripheral devices should be connected with the data bus reversed in - * "Big Endian" mode. ARM Application Note 61 is applicable, and is - * available from http://www.arm.com/. - * - * The following assumes that the data bus connectivity for big endian - * mode has been followed. - * - * Note that bit 0 is defined to be 32-bit word bit 0, not byte 0 bit 0. - */ - -/* - * Little endian assembly bitops. nr = 0 -> byte 0 bit 0. - */ -extern void _set_bit_le(int nr, volatile unsigned long * p); -extern void _clear_bit_le(int nr, volatile unsigned long * p); -extern void _change_bit_le(int nr, volatile unsigned long * p); -extern int _test_and_set_bit_le(int nr, volatile unsigned long * p); -extern int _test_and_clear_bit_le(int nr, volatile unsigned long * p); -extern int _test_and_change_bit_le(int nr, volatile unsigned long * p); -extern int _find_first_zero_bit_le(const void * p, unsigned size); -extern int _find_next_zero_bit_le(const void * p, int size, int offset); -extern int _find_first_bit_le(const unsigned long *p, unsigned size); -extern int _find_next_bit_le(const unsigned long *p, int size, int offset); - -/* - * Big endian assembly bitops. nr = 0 -> byte 3 bit 0. - */ -extern void _set_bit_be(int nr, volatile unsigned long * p); -extern void _clear_bit_be(int nr, volatile unsigned long * p); -extern void _change_bit_be(int nr, volatile unsigned long * p); -extern int _test_and_set_bit_be(int nr, volatile unsigned long * p); -extern int _test_and_clear_bit_be(int nr, volatile unsigned long * p); -extern int _test_and_change_bit_be(int nr, volatile unsigned long * p); -extern int _find_first_zero_bit_be(const void * p, unsigned size); -extern int _find_next_zero_bit_be(const void * p, int size, int offset); -extern int _find_first_bit_be(const unsigned long *p, unsigned size); -extern int _find_next_bit_be(const unsigned long *p, int size, int offset); - -#ifndef CONFIG_SMP -/* - * The __* form of bitops are non-atomic and may be reordered. - */ -#define ATOMIC_BITOP_LE(name,nr,p) \ - (__builtin_constant_p(nr) ? \ - ____atomic_##name(nr, p) : \ - _##name##_le(nr,p)) - -#define ATOMIC_BITOP_BE(name,nr,p) \ - (__builtin_constant_p(nr) ? \ - ____atomic_##name(nr, p) : \ - _##name##_be(nr,p)) -#else -#define ATOMIC_BITOP_LE(name,nr,p) _##name##_le(nr,p) -#define ATOMIC_BITOP_BE(name,nr,p) _##name##_be(nr,p) -#endif - -#define NONATOMIC_BITOP(name,nr,p) \ - (____nonatomic_##name(nr, p)) - -#ifndef __ARMEB__ -/* - * These are the little endian, atomic definitions. - */ -#define set_bit(nr,p) ATOMIC_BITOP_LE(set_bit,nr,p) -#define clear_bit(nr,p) ATOMIC_BITOP_LE(clear_bit,nr,p) -#define change_bit(nr,p) ATOMIC_BITOP_LE(change_bit,nr,p) -#define test_and_set_bit(nr,p) ATOMIC_BITOP_LE(test_and_set_bit,nr,p) -#define test_and_clear_bit(nr,p) ATOMIC_BITOP_LE(test_and_clear_bit,nr,p) -#define test_and_change_bit(nr,p) ATOMIC_BITOP_LE(test_and_change_bit,nr,p) -#define find_first_zero_bit(p,sz) _find_first_zero_bit_le(p,sz) -#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_le(p,sz,off) -#define find_first_bit(p,sz) _find_first_bit_le(p,sz) -#define find_next_bit(p,sz,off) _find_next_bit_le(p,sz,off) - -#define WORD_BITOFF_TO_LE(x) ((x)) - -#else - -/* - * These are the big endian, atomic definitions. - */ -#define set_bit(nr,p) ATOMIC_BITOP_BE(set_bit,nr,p) -#define clear_bit(nr,p) ATOMIC_BITOP_BE(clear_bit,nr,p) -#define change_bit(nr,p) ATOMIC_BITOP_BE(change_bit,nr,p) -#define test_and_set_bit(nr,p) ATOMIC_BITOP_BE(test_and_set_bit,nr,p) -#define test_and_clear_bit(nr,p) ATOMIC_BITOP_BE(test_and_clear_bit,nr,p) -#define test_and_change_bit(nr,p) ATOMIC_BITOP_BE(test_and_change_bit,nr,p) -#define find_first_zero_bit(p,sz) _find_first_zero_bit_be(p,sz) -#define find_next_zero_bit(p,sz,off) _find_next_zero_bit_be(p,sz,off) -#define find_first_bit(p,sz) _find_first_bit_be(p,sz) -#define find_next_bit(p,sz,off) _find_next_bit_be(p,sz,off) - -#define WORD_BITOFF_TO_LE(x) ((x) ^ 0x18) - -#endif - -#if __LINUX_ARM_ARCH__ < 5 - -#include -#include -#include -#include - -#else - -static inline int constant_fls(int x) -{ - int r = 32; - - if (!x) - return 0; - if (!(x & 0xffff0000u)) { - x <<= 16; - r -= 16; - } - if (!(x & 0xff000000u)) { - x <<= 8; - r -= 8; - } - if (!(x & 0xf0000000u)) { - x <<= 4; - r -= 4; - } - if (!(x & 0xc0000000u)) { - x <<= 2; - r -= 2; - } - if (!(x & 0x80000000u)) { - x <<= 1; - r -= 1; - } - return r; -} - -/* - * On ARMv5 and above those functions can be implemented around - * the clz instruction for much better code efficiency. - */ - -#define __fls(x) \ - ( __builtin_constant_p(x) ? constant_fls(x) : \ - ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) - -/* Implement fls() in C so that 64-bit args are suitably truncated */ -static inline int fls(int x) -{ - return __fls(x); -} - -#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) -#define __ffs(x) (ffs(x) - 1) -#define ffz(x) __ffs( ~(x) ) - -#endif - -#include - -#include -#include -#include - -/* - * Ext2 is defined to use little-endian byte ordering. - * These do not need to be atomic. - */ -#define ext2_set_bit(nr,p) \ - __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_set_bit_atomic(lock,nr,p) \ - test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_clear_bit(nr,p) \ - __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_clear_bit_atomic(lock,nr,p) \ - test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_test_bit(nr,p) \ - test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define ext2_find_first_zero_bit(p,sz) \ - _find_first_zero_bit_le(p,sz) -#define ext2_find_next_zero_bit(p,sz,off) \ - _find_next_zero_bit_le(p,sz,off) -#define ext2_find_next_bit(p, sz, off) \ - _find_next_bit_le(p, sz, off) - -/* - * Minix is defined to use little-endian byte ordering. - * These do not need to be atomic. - */ -#define minix_set_bit(nr,p) \ - __set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_bit(nr,p) \ - test_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_and_set_bit(nr,p) \ - __test_and_set_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_test_and_clear_bit(nr,p) \ - __test_and_clear_bit(WORD_BITOFF_TO_LE(nr), (unsigned long *)(p)) -#define minix_find_first_zero_bit(p,sz) \ - _find_first_zero_bit_le(p,sz) - -#endif /* __KERNEL__ */ - -#endif /* _ARM_BITOPS_H */ diff --git a/include/asm-arm/bug.h b/include/asm-arm/bug.h deleted file mode 100644 index 7b62351..0000000 --- a/include/asm-arm/bug.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASMARM_BUG_H -#define _ASMARM_BUG_H - - -#ifdef CONFIG_BUG -#ifdef CONFIG_DEBUG_BUGVERBOSE -extern void __bug(const char *file, int line) __attribute__((noreturn)); - -/* give file/line information */ -#define BUG() __bug(__FILE__, __LINE__) - -#else - -/* this just causes an oops */ -#define BUG() (*(int *)0 = 0) - -#endif - -#define HAVE_ARCH_BUG -#endif - -#include - -#endif diff --git a/include/asm-arm/bugs.h b/include/asm-arm/bugs.h deleted file mode 100644 index ca54eb0..0000000 --- a/include/asm-arm/bugs.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/bugs.h - * - * Copyright (C) 1995-2003 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_BUGS_H -#define __ASM_BUGS_H - -#ifdef CONFIG_MMU -extern void check_writebuffer_bugs(void); - -#define check_bugs() check_writebuffer_bugs() -#else -#define check_bugs() do { } while (0) -#endif - -#endif diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h deleted file mode 100644 index e6f7fcd..0000000 --- a/include/asm-arm/byteorder.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * linux/include/asm-arm/byteorder.h - * - * ARM Endian-ness. In little endian mode, the data bus is connected such - * that byte accesses appear as: - * 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31 - * and word accesses (data or instruction) appear as: - * d0...d31 - * - * When in big endian mode, byte accesses appear as: - * 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7 - * and word accesses (data or instruction) appear as: - * d0...d31 - */ -#ifndef __ASM_ARM_BYTEORDER_H -#define __ASM_ARM_BYTEORDER_H - -#include -#include - -static inline __attribute_const__ __u32 ___arch__swab32(__u32 x) -{ - __u32 t; - -#ifndef __thumb__ - if (!__builtin_constant_p(x)) { - /* - * The compiler needs a bit of a hint here to always do the - * right thing and not screw it up to different degrees - * depending on the gcc version. - */ - asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x)); - } else -#endif - t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */ - - x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */ - t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */ - x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */ - - return x; -} - -#define __arch__swab32(x) ___arch__swab32(x) - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#ifdef __ARMEB__ -#include -#else -#include -#endif - -#endif - diff --git a/include/asm-arm/cache.h b/include/asm-arm/cache.h deleted file mode 100644 index 31332c8..0000000 --- a/include/asm-arm/cache.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/cache.h - */ -#ifndef __ASMARM_CACHE_H -#define __ASMARM_CACHE_H - -#define L1_CACHE_SHIFT 5 -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#endif diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h deleted file mode 100644 index e68a1cb..0000000 --- a/include/asm-arm/cacheflush.h +++ /dev/null @@ -1,537 +0,0 @@ -/* - * linux/include/asm-arm/cacheflush.h - * - * Copyright (C) 1999-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_CACHEFLUSH_H -#define _ASMARM_CACHEFLUSH_H - -#include -#include - -#include -#include - -#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT) - -/* - * Cache Model - * =========== - */ -#undef _CACHE -#undef MULTI_CACHE - -#if defined(CONFIG_CPU_CACHE_V3) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE v3 -# endif -#endif - -#if defined(CONFIG_CPU_CACHE_V4) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE v4 -# endif -#endif - -#if defined(CONFIG_CPU_ARM920T) || defined(CONFIG_CPU_ARM922T) || \ - defined(CONFIG_CPU_ARM925T) || defined(CONFIG_CPU_ARM1020) -# define MULTI_CACHE 1 -#endif - -#if defined(CONFIG_CPU_ARM926T) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE arm926 -# endif -#endif - -#if defined(CONFIG_CPU_ARM940T) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE arm940 -# endif -#endif - -#if defined(CONFIG_CPU_ARM946E) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE arm946 -# endif -#endif - -#if defined(CONFIG_CPU_CACHE_V4WB) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE v4wb -# endif -#endif - -#if defined(CONFIG_CPU_XSCALE) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE xscale -# endif -#endif - -#if defined(CONFIG_CPU_XSC3) -# ifdef _CACHE -# define MULTI_CACHE 1 -# else -# define _CACHE xsc3 -# endif -#endif - -#if defined(CONFIG_CPU_FEROCEON) -# define MULTI_CACHE 1 -#endif - -#if defined(CONFIG_CPU_V6) -//# ifdef _CACHE -# define MULTI_CACHE 1 -//# else -//# define _CACHE v6 -//# endif -#endif - -#if defined(CONFIG_CPU_V7) -//# ifdef _CACHE -# define MULTI_CACHE 1 -//# else -//# define _CACHE v7 -//# endif -#endif - -#if !defined(_CACHE) && !defined(MULTI_CACHE) -#error Unknown cache maintainence model -#endif - -/* - * This flag is used to indicate that the page pointed to by a pte - * is dirty and requires cleaning before returning it to the user. - */ -#define PG_dcache_dirty PG_arch_1 - -/* - * MM Cache Management - * =================== - * - * The arch/arm/mm/cache-*.S and arch/arm/mm/proc-*.S files - * implement these methods. - * - * Start addresses are inclusive and end addresses are exclusive; - * start addresses should be rounded down, end addresses up. - * - * See Documentation/cachetlb.txt for more information. - * Please note that the implementation of these, and the required - * effects are cache-type (VIVT/VIPT/PIPT) specific. - * - * flush_cache_kern_all() - * - * Unconditionally clean and invalidate the entire cache. - * - * flush_cache_user_mm(mm) - * - * Clean and invalidate all user space cache entries - * before a change of page tables. - * - * flush_cache_user_range(start, end, flags) - * - * Clean and invalidate a range of cache entries in the - * specified address space before a change of page tables. - * - start - user start address (inclusive, page aligned) - * - end - user end address (exclusive, page aligned) - * - flags - vma->vm_flags field - * - * coherent_kern_range(start, end) - * - * Ensure coherency between the Icache and the Dcache in the - * region described by start, end. If you have non-snooping - * Harvard caches, you need to implement this function. - * - start - virtual start address - * - end - virtual end address - * - * DMA Cache Coherency - * =================== - * - * dma_inv_range(start, end) - * - * Invalidate (discard) the specified virtual address range. - * May not write back any entries. If 'start' or 'end' - * are not cache line aligned, those lines must be written - * back. - * - start - virtual start address - * - end - virtual end address - * - * dma_clean_range(start, end) - * - * Clean (write back) the specified virtual address range. - * - start - virtual start address - * - end - virtual end address - * - * dma_flush_range(start, end) - * - * Clean and invalidate the specified virtual address range. - * - start - virtual start address - * - end - virtual end address - */ - -struct cpu_cache_fns { - void (*flush_kern_all)(void); - void (*flush_user_all)(void); - void (*flush_user_range)(unsigned long, unsigned long, unsigned int); - - void (*coherent_kern_range)(unsigned long, unsigned long); - void (*coherent_user_range)(unsigned long, unsigned long); - void (*flush_kern_dcache_page)(void *); - - void (*dma_inv_range)(const void *, const void *); - void (*dma_clean_range)(const void *, const void *); - void (*dma_flush_range)(const void *, const void *); -}; - -struct outer_cache_fns { - void (*inv_range)(unsigned long, unsigned long); - void (*clean_range)(unsigned long, unsigned long); - void (*flush_range)(unsigned long, unsigned long); -}; - -/* - * Select the calling method - */ -#ifdef MULTI_CACHE - -extern struct cpu_cache_fns cpu_cache; - -#define __cpuc_flush_kern_all cpu_cache.flush_kern_all -#define __cpuc_flush_user_all cpu_cache.flush_user_all -#define __cpuc_flush_user_range cpu_cache.flush_user_range -#define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range -#define __cpuc_coherent_user_range cpu_cache.coherent_user_range -#define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page - -/* - * These are private to the dma-mapping API. Do not use directly. - * Their sole purpose is to ensure that data held in the cache - * is visible to DMA, or data written by DMA to system memory is - * visible to the CPU. - */ -#define dmac_inv_range cpu_cache.dma_inv_range -#define dmac_clean_range cpu_cache.dma_clean_range -#define dmac_flush_range cpu_cache.dma_flush_range - -#else - -#define __cpuc_flush_kern_all __glue(_CACHE,_flush_kern_cache_all) -#define __cpuc_flush_user_all __glue(_CACHE,_flush_user_cache_all) -#define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) -#define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) -#define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) -#define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page) - -extern void __cpuc_flush_kern_all(void); -extern void __cpuc_flush_user_all(void); -extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); -extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); -extern void __cpuc_coherent_user_range(unsigned long, unsigned long); -extern void __cpuc_flush_dcache_page(void *); - -/* - * These are private to the dma-mapping API. Do not use directly. - * Their sole purpose is to ensure that data held in the cache - * is visible to DMA, or data written by DMA to system memory is - * visible to the CPU. - */ -#define dmac_inv_range __glue(_CACHE,_dma_inv_range) -#define dmac_clean_range __glue(_CACHE,_dma_clean_range) -#define dmac_flush_range __glue(_CACHE,_dma_flush_range) - -extern void dmac_inv_range(const void *, const void *); -extern void dmac_clean_range(const void *, const void *); -extern void dmac_flush_range(const void *, const void *); - -#endif - -#ifdef CONFIG_OUTER_CACHE - -extern struct outer_cache_fns outer_cache; - -static inline void outer_inv_range(unsigned long start, unsigned long end) -{ - if (outer_cache.inv_range) - outer_cache.inv_range(start, end); -} -static inline void outer_clean_range(unsigned long start, unsigned long end) -{ - if (outer_cache.clean_range) - outer_cache.clean_range(start, end); -} -static inline void outer_flush_range(unsigned long start, unsigned long end) -{ - if (outer_cache.flush_range) - outer_cache.flush_range(start, end); -} - -#else - -static inline void outer_inv_range(unsigned long start, unsigned long end) -{ } -static inline void outer_clean_range(unsigned long start, unsigned long end) -{ } -static inline void outer_flush_range(unsigned long start, unsigned long end) -{ } - -#endif - -/* - * flush_cache_vmap() is used when creating mappings (eg, via vmap, - * vmalloc, ioremap etc) in kernel space for pages. Since the - * direct-mappings of these pages may contain cached data, we need - * to do a full cache flush to ensure that writebacks don't corrupt - * data placed into these pages via the new mappings. - */ -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() - -/* - * Copy user data from/to a page which is mapped into a different - * processes address space. Really, we want to allow our "user - * space" model to handle this. - */ -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - memcpy(dst, src, len); \ - flush_ptrace_access(vma, page, vaddr, dst, len, 1);\ - } while (0) - -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - memcpy(dst, src, len); \ - } while (0) - -/* - * Convert calls to our calling convention. - */ -#define flush_cache_all() __cpuc_flush_kern_all() -#ifndef CONFIG_CPU_CACHE_VIPT -static inline void flush_cache_mm(struct mm_struct *mm) -{ - if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) - __cpuc_flush_user_all(); -} - -static inline void -flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) -{ - if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) - __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), - vma->vm_flags); -} - -static inline void -flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) -{ - if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { - unsigned long addr = user_addr & PAGE_MASK; - __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); - } -} - -static inline void -flush_ptrace_access(struct vm_area_struct *vma, struct page *page, - unsigned long uaddr, void *kaddr, - unsigned long len, int write) -{ - if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { - unsigned long addr = (unsigned long)kaddr; - __cpuc_coherent_kern_range(addr, addr + len); - } -} -#else -extern void flush_cache_mm(struct mm_struct *mm); -extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); -extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); -extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, - unsigned long uaddr, void *kaddr, - unsigned long len, int write); -#endif - -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) - -/* - * flush_cache_user_range is used when we want to ensure that the - * Harvard caches are synchronised for the user space address range. - * This is used for the ARM private sys_cacheflush system call. - */ -#define flush_cache_user_range(vma,start,end) \ - __cpuc_coherent_user_range((start) & PAGE_MASK, PAGE_ALIGN(end)) - -/* - * Perform necessary cache operations to ensure that data previously - * stored within this range of addresses can be executed by the CPU. - */ -#define flush_icache_range(s,e) __cpuc_coherent_kern_range(s,e) - -/* - * Perform necessary cache operations to ensure that the TLB will - * see data written in the specified area. - */ -#define clean_dcache_area(start,size) cpu_dcache_clean_area(start, size) - -/* - * flush_dcache_page is used when the kernel has written to the page - * cache page at virtual address page->virtual. - * - * If this page isn't mapped (ie, page_mapping == NULL), or it might - * have userspace mappings, then we _must_ always clean + invalidate - * the dcache entries associated with the kernel mapping. - * - * Otherwise we can defer the operation, and clean the cache when we are - * about to change to user space. This is the same method as used on SPARC64. - * See update_mmu_cache for the user space part. - */ -extern void flush_dcache_page(struct page *); - -extern void __flush_dcache_page(struct address_space *mapping, struct page *page); - -static inline void __flush_icache_all(void) -{ - asm("mcr p15, 0, %0, c7, c5, 0 @ invalidate I-cache\n" - : - : "r" (0)); -} - -#define ARCH_HAS_FLUSH_ANON_PAGE -static inline void flush_anon_page(struct vm_area_struct *vma, - struct page *page, unsigned long vmaddr) -{ - extern void __flush_anon_page(struct vm_area_struct *vma, - struct page *, unsigned long); - if (PageAnon(page)) - __flush_anon_page(vma, page, vmaddr); -} - -#define flush_dcache_mmap_lock(mapping) \ - spin_lock_irq(&(mapping)->tree_lock) -#define flush_dcache_mmap_unlock(mapping) \ - spin_unlock_irq(&(mapping)->tree_lock) - -#define flush_icache_user_range(vma,page,addr,len) \ - flush_dcache_page(page) - -/* - * We don't appear to need to do anything here. In fact, if we did, we'd - * duplicate cache flushing elsewhere performed by flush_dcache_page(). - */ -#define flush_icache_page(vma,page) do { } while (0) - -static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, - unsigned offset, size_t size) -{ - const void *start = (void __force *)virt + offset; - dmac_inv_range(start, start + size); -} - -#define __cacheid_present(val) (val != read_cpuid(CPUID_ID)) -#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29)) - -#define __cacheid_vivt_prev7(val) ((val & (15 << 25)) != (14 << 25)) -#define __cacheid_vipt_prev7(val) ((val & (15 << 25)) == (14 << 25)) -#define __cacheid_vipt_nonaliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25)) -#define __cacheid_vipt_aliasing_prev7(val) ((val & (15 << 25 | 1 << 23)) == (14 << 25 | 1 << 23)) - -#define __cacheid_vivt(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vivt_prev7(val)) -#define __cacheid_vipt(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_prev7(val)) -#define __cacheid_vipt_nonaliasing(val) (__cacheid_type_v7(val) ? 1 : __cacheid_vipt_nonaliasing_prev7(val)) -#define __cacheid_vipt_aliasing(val) (__cacheid_type_v7(val) ? 0 : __cacheid_vipt_aliasing_prev7(val)) -#define __cacheid_vivt_asid_tagged_instr(val) (__cacheid_type_v7(val) ? ((val & (3 << 14)) == (1 << 14)) : 0) - -#if defined(CONFIG_CPU_CACHE_VIVT) && !defined(CONFIG_CPU_CACHE_VIPT) -/* - * VIVT caches only - */ -#define cache_is_vivt() 1 -#define cache_is_vipt() 0 -#define cache_is_vipt_nonaliasing() 0 -#define cache_is_vipt_aliasing() 0 -#define icache_is_vivt_asid_tagged() 0 - -#elif !defined(CONFIG_CPU_CACHE_VIVT) && defined(CONFIG_CPU_CACHE_VIPT) -/* - * VIPT caches only - */ -#define cache_is_vivt() 0 -#define cache_is_vipt() 1 -#define cache_is_vipt_nonaliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vipt_nonaliasing(__val); \ - }) - -#define cache_is_vipt_aliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vipt_aliasing(__val); \ - }) - -#define icache_is_vivt_asid_tagged() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_vivt_asid_tagged_instr(__val); \ - }) - -#else -/* - * VIVT or VIPT caches. Note that this is unreliable since ARM926 - * and V6 CPUs satisfy the "(val & (15 << 25)) == (14 << 25)" test. - * There's no way to tell from the CacheType register what type (!) - * the cache is. - */ -#define cache_is_vivt() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - (!__cacheid_present(__val)) || __cacheid_vivt(__val); \ - }) - -#define cache_is_vipt() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && __cacheid_vipt(__val); \ - }) - -#define cache_is_vipt_nonaliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vipt_nonaliasing(__val); \ - }) - -#define cache_is_vipt_aliasing() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vipt_aliasing(__val); \ - }) - -#define icache_is_vivt_asid_tagged() \ - ({ \ - unsigned int __val = read_cpuid(CPUID_CACHETYPE); \ - __cacheid_present(__val) && \ - __cacheid_vivt_asid_tagged_instr(__val); \ - }) - -#endif - -#endif diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h deleted file mode 100644 index eaa0efd..0000000 --- a/include/asm-arm/checksum.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * linux/include/asm-arm/checksum.h - * - * IP checksum routines - * - * Copyright (C) Original authors of ../asm-i386/checksum.h - * Copyright (C) 1996-1999 Russell King - */ -#ifndef __ASM_ARM_CHECKSUM_H -#define __ASM_ARM_CHECKSUM_H - -#include - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -__wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * the same as csum_partial, but copies from src while it - * checksums, and handles user-space pointer exceptions correctly, when needed. - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -__wsum -csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum); - -__wsum -csum_partial_copy_from_user(const void __user *src, void *dst, int len, __wsum sum, int *err_ptr); - -/* - * Fold a partial checksum without adding pseudo headers - */ -static inline __sum16 csum_fold(__wsum sum) -{ - __asm__( - "add %0, %1, %1, ror #16 @ csum_fold" - : "=r" (sum) - : "r" (sum) - : "cc"); - return (__force __sum16)(~(__force u32)sum >> 16); -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -static inline __sum16 -ip_fast_csum(const void *iph, unsigned int ihl) -{ - unsigned int tmp1; - __wsum sum; - - __asm__ __volatile__( - "ldr %0, [%1], #4 @ ip_fast_csum \n\ - ldr %3, [%1], #4 \n\ - sub %2, %2, #5 \n\ - adds %0, %0, %3 \n\ - ldr %3, [%1], #4 \n\ - adcs %0, %0, %3 \n\ - ldr %3, [%1], #4 \n\ -1: adcs %0, %0, %3 \n\ - ldr %3, [%1], #4 \n\ - tst %2, #15 @ do this carefully \n\ - subne %2, %2, #1 @ without destroying \n\ - bne 1b @ the carry flag \n\ - adcs %0, %0, %3 \n\ - adc %0, %0, #0" - : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1) - : "1" (iph), "2" (ihl) - : "cc", "memory"); - return csum_fold(sum); -} - -static inline __wsum -csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, __wsum sum) -{ - __asm__( - "adds %0, %1, %2 @ csum_tcpudp_nofold \n\ - adcs %0, %0, %3 \n" -#ifdef __ARMEB__ - "adcs %0, %0, %4 \n" -#else - "adcs %0, %0, %4, lsl #8 \n" -#endif - "adcs %0, %0, %5 \n\ - adc %0, %0, #0" - : "=&r"(sum) - : "r" (sum), "r" (daddr), "r" (saddr), "r" (len), "Ir" (htons(proto)) - : "cc"); - return sum; -} -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 -csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); -} - - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 -ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#define _HAVE_ARCH_IPV6_CSUM -extern __wsum -__csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __be32 len, - __be32 proto, __wsum sum); - -static inline __sum16 -csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, __u32 len, - unsigned short proto, __wsum sum) -{ - return csum_fold(__csum_ipv6_magic(saddr, daddr, htonl(len), - htonl(proto), sum)); -} -#endif diff --git a/include/asm-arm/cnt32_to_63.h b/include/asm-arm/cnt32_to_63.h deleted file mode 100644 index 480c873..0000000 --- a/include/asm-arm/cnt32_to_63.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * include/asm/cnt32_to_63.h -- extend a 32-bit counter to 63 bits - * - * Author: Nicolas Pitre - * Created: December 3, 2006 - * Copyright: MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - */ - -#ifndef __INCLUDE_CNT32_TO_63_H__ -#define __INCLUDE_CNT32_TO_63_H__ - -#include -#include -#include - -/* - * Prototype: u64 cnt32_to_63(u32 cnt) - * Many hardware clock counters are only 32 bits wide and therefore have - * a relatively short period making wrap-arounds rather frequent. This - * is a problem when implementing sched_clock() for example, where a 64-bit - * non-wrapping monotonic value is expected to be returned. - * - * To overcome that limitation, let's extend a 32-bit counter to 63 bits - * in a completely lock free fashion. Bits 0 to 31 of the clock are provided - * by the hardware while bits 32 to 62 are stored in memory. The top bit in - * memory is used to synchronize with the hardware clock half-period. When - * the top bit of both counters (hardware and in memory) differ then the - * memory is updated with a new value, incrementing it when the hardware - * counter wraps around. - * - * Because a word store in memory is atomic then the incremented value will - * always be in synch with the top bit indicating to any potential concurrent - * reader if the value in memory is up to date or not with regards to the - * needed increment. And any race in updating the value in memory is harmless - * as the same value would simply be stored more than once. - * - * The only restriction for the algorithm to work properly is that this - * code must be executed at least once per each half period of the 32-bit - * counter to properly update the state bit in memory. This is usually not a - * problem in practice, but if it is then a kernel timer could be scheduled - * to manage for this code to be executed often enough. - * - * Note that the top bit (bit 63) in the returned value should be considered - * as garbage. It is not cleared here because callers are likely to use a - * multiplier on the returned value which can get rid of the top bit - * implicitly by making the multiplier even, therefore saving on a runtime - * clear-bit instruction. Otherwise caller must remember to clear the top - * bit explicitly. - */ - -/* this is used only to give gcc a clue about good code generation */ -typedef union { - struct { -#if defined(__LITTLE_ENDIAN) - u32 lo, hi; -#elif defined(__BIG_ENDIAN) - u32 hi, lo; -#endif - }; - u64 val; -} cnt32_to_63_t; - -#define cnt32_to_63(cnt_lo) \ -({ \ - static volatile u32 __m_cnt_hi = 0; \ - cnt32_to_63_t __x; \ - __x.hi = __m_cnt_hi; \ - __x.lo = (cnt_lo); \ - if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \ - __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \ - __x.val; \ -}) - -#endif diff --git a/include/asm-arm/cpu-multi32.h b/include/asm-arm/cpu-multi32.h deleted file mode 100644 index 3479de9..0000000 --- a/include/asm-arm/cpu-multi32.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * linux/include/asm-arm/cpu-multi32.h - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - -struct mm_struct; - -/* - * Don't change this structure - ASM code - * relies on it. - */ -extern struct processor { - /* MISC - * get data abort address/flags - */ - void (*_data_abort)(unsigned long pc); - /* - * Retrieve prefetch fault address - */ - unsigned long (*_prefetch_abort)(unsigned long lr); - /* - * Set up any processor specifics - */ - void (*_proc_init)(void); - /* - * Disable any processor specifics - */ - void (*_proc_fin)(void); - /* - * Special stuff for a reset - */ - void (*reset)(unsigned long addr) __attribute__((noreturn)); - /* - * Idle the processor - */ - int (*_do_idle)(void); - /* - * Processor architecture specific - */ - /* - * clean a virtual address range from the - * D-cache without flushing the cache. - */ - void (*dcache_clean_area)(void *addr, int size); - - /* - * Set the page table - */ - void (*switch_mm)(unsigned long pgd_phys, struct mm_struct *mm); - /* - * Set a possibly extended PTE. Non-extended PTEs should - * ignore 'ext'. - */ - void (*set_pte_ext)(pte_t *ptep, pte_t pte, unsigned int ext); -} processor; - -#define cpu_proc_init() processor._proc_init() -#define cpu_proc_fin() processor._proc_fin() -#define cpu_reset(addr) processor.reset(addr) -#define cpu_do_idle() processor._do_idle() -#define cpu_dcache_clean_area(addr,sz) processor.dcache_clean_area(addr,sz) -#define cpu_set_pte_ext(ptep,pte,ext) processor.set_pte_ext(ptep,pte,ext) -#define cpu_do_switch_mm(pgd,mm) processor.switch_mm(pgd,mm) diff --git a/include/asm-arm/cpu-single.h b/include/asm-arm/cpu-single.h deleted file mode 100644 index 0b120ee..0000000 --- a/include/asm-arm/cpu-single.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * linux/include/asm-arm/cpu-single.h - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/* - * Single CPU - */ -#ifdef __STDC__ -#define __catify_fn(name,x) name##x -#else -#define __catify_fn(name,x) name/**/x -#endif -#define __cpu_fn(name,x) __catify_fn(name,x) - -/* - * If we are supporting multiple CPUs, then we must use a table of - * function pointers for this lot. Otherwise, we can optimise the - * table away. - */ -#define cpu_proc_init __cpu_fn(CPU_NAME,_proc_init) -#define cpu_proc_fin __cpu_fn(CPU_NAME,_proc_fin) -#define cpu_reset __cpu_fn(CPU_NAME,_reset) -#define cpu_do_idle __cpu_fn(CPU_NAME,_do_idle) -#define cpu_dcache_clean_area __cpu_fn(CPU_NAME,_dcache_clean_area) -#define cpu_do_switch_mm __cpu_fn(CPU_NAME,_switch_mm) -#define cpu_set_pte_ext __cpu_fn(CPU_NAME,_set_pte_ext) - -#include - -struct mm_struct; - -/* declare all the functions as extern */ -extern void cpu_proc_init(void); -extern void cpu_proc_fin(void); -extern int cpu_do_idle(void); -extern void cpu_dcache_clean_area(void *, int); -extern void cpu_do_switch_mm(unsigned long pgd_phys, struct mm_struct *mm); -extern void cpu_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext); -extern void cpu_reset(unsigned long addr) __attribute__((noreturn)); diff --git a/include/asm-arm/cpu.h b/include/asm-arm/cpu.h deleted file mode 100644 index 715426b..0000000 --- a/include/asm-arm/cpu.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * linux/include/asm-arm/cpu.h - * - * Copyright (C) 2004-2005 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_CPU_H -#define __ASM_ARM_CPU_H - -#include - -struct cpuinfo_arm { - struct cpu cpu; -#ifdef CONFIG_SMP - struct task_struct *idle; - unsigned int loops_per_jiffy; -#endif -}; - -DECLARE_PER_CPU(struct cpuinfo_arm, cpu_data); - -#endif diff --git a/include/asm-arm/cputime.h b/include/asm-arm/cputime.h deleted file mode 100644 index 3a8002a..0000000 --- a/include/asm-arm/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_CPUTIME_H -#define __ARM_CPUTIME_H - -#include - -#endif /* __ARM_CPUTIME_H */ diff --git a/include/asm-arm/current.h b/include/asm-arm/current.h deleted file mode 100644 index 75d21e2..0000000 --- a/include/asm-arm/current.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _ASMARM_CURRENT_H -#define _ASMARM_CURRENT_H - -#include - -static inline struct task_struct *get_current(void) __attribute_const__; - -static inline struct task_struct *get_current(void) -{ - return current_thread_info()->task; -} - -#define current (get_current()) - -#endif /* _ASMARM_CURRENT_H */ diff --git a/include/asm-arm/delay.h b/include/asm-arm/delay.h deleted file mode 100644 index b2deda1..0000000 --- a/include/asm-arm/delay.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 1995-2004 Russell King - * - * Delay routines, using a pre-computed "loops_per_second" value. - */ -#ifndef __ASM_ARM_DELAY_H -#define __ASM_ARM_DELAY_H - -#include /* HZ */ - -extern void __delay(int loops); - -/* - * This function intentionally does not exist; if you see references to - * it, it means that you're calling udelay() with an out of range value. - * - * With currently imposed limits, this means that we support a max delay - * of 2000us. Further limits: HZ<=1000 and bogomips<=3355 - */ -extern void __bad_udelay(void); - -/* - * division by multiplication: you don't have to worry about - * loss of precision. - * - * Use only for very small delays ( < 1 msec). Should probably use a - * lookup table, really, as the multiplications take much too long with - * short delays. This is a "reasonable" implementation, though (and the - * first constant multiplications gets optimized away if the delay is - * a constant) - */ -extern void __udelay(unsigned long usecs); -extern void __const_udelay(unsigned long); - -#define MAX_UDELAY_MS 2 - -#define udelay(n) \ - (__builtin_constant_p(n) ? \ - ((n) > (MAX_UDELAY_MS * 1000) ? __bad_udelay() : \ - __const_udelay((n) * ((2199023U*HZ)>>11))) : \ - __udelay(n)) - -#endif /* defined(_ARM_DELAY_H) */ - diff --git a/include/asm-arm/device.h b/include/asm-arm/device.h deleted file mode 100644 index c61642b..0000000 --- a/include/asm-arm/device.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#ifndef ASMARM_DEVICE_H -#define ASMARM_DEVICE_H - -struct dev_archdata { -#ifdef CONFIG_DMABOUNCE - struct dmabounce_device_info *dmabounce; -#endif -}; - -#endif diff --git a/include/asm-arm/div64.h b/include/asm-arm/div64.h deleted file mode 100644 index 5001390..0000000 --- a/include/asm-arm/div64.h +++ /dev/null @@ -1,227 +0,0 @@ -#ifndef __ASM_ARM_DIV64 -#define __ASM_ARM_DIV64 - -#include -#include - -/* - * The semantics of do_div() are: - * - * uint32_t do_div(uint64_t *n, uint32_t base) - * { - * uint32_t remainder = *n % base; - * *n = *n / base; - * return remainder; - * } - * - * In other words, a 64-bit dividend with a 32-bit divisor producing - * a 64-bit result and a 32-bit remainder. To accomplish this optimally - * we call a special __do_div64 helper with completely non standard - * calling convention for arguments and results (beware). - */ - -#ifdef __ARMEB__ -#define __xh "r0" -#define __xl "r1" -#else -#define __xl "r0" -#define __xh "r1" -#endif - -#define __do_div_asm(n, base) \ -({ \ - register unsigned int __base asm("r4") = base; \ - register unsigned long long __n asm("r0") = n; \ - register unsigned long long __res asm("r2"); \ - register unsigned int __rem asm(__xh); \ - asm( __asmeq("%0", __xh) \ - __asmeq("%1", "r2") \ - __asmeq("%2", "r0") \ - __asmeq("%3", "r4") \ - "bl __do_div64" \ - : "=r" (__rem), "=r" (__res) \ - : "r" (__n), "r" (__base) \ - : "ip", "lr", "cc"); \ - n = __res; \ - __rem; \ -}) - -#if __GNUC__ < 4 - -/* - * gcc versions earlier than 4.0 are simply too problematic for the - * optimized implementation below. First there is gcc PR 15089 that - * tend to trig on more complex constructs, spurious .global __udivsi3 - * are inserted even if none of those symbols are referenced in the - * generated code, and those gcc versions are not able to do constant - * propagation on long long values anyway. - */ -#define do_div(n, base) __do_div_asm(n, base) - -#elif __GNUC__ >= 4 - -#include - -/* - * If the divisor happens to be constant, we determine the appropriate - * inverse at compile time to turn the division into a few inline - * multiplications instead which is much faster. And yet only if compiling - * for ARMv4 or higher (we need umull/umlal) and if the gcc version is - * sufficiently recent to perform proper long long constant propagation. - * (It is unfortunate that gcc doesn't perform all this internally.) - */ -#define do_div(n, base) \ -({ \ - unsigned int __r, __b = (base); \ - if (!__builtin_constant_p(__b) || __b == 0 || \ - (__LINUX_ARM_ARCH__ < 4 && (__b & (__b - 1)) != 0)) { \ - /* non-constant divisor (or zero): slow path */ \ - __r = __do_div_asm(n, __b); \ - } else if ((__b & (__b - 1)) == 0) { \ - /* Trivial: __b is constant and a power of 2 */ \ - /* gcc does the right thing with this code. */ \ - __r = n; \ - __r &= (__b - 1); \ - n /= __b; \ - } else { \ - /* Multiply by inverse of __b: n/b = n*(p/b)/p */ \ - /* We rely on the fact that most of this code gets */ \ - /* optimized away at compile time due to constant */ \ - /* propagation and only a couple inline assembly */ \ - /* instructions should remain. Better avoid any */ \ - /* code construct that might prevent that. */ \ - unsigned long long __res, __x, __t, __m, __n = n; \ - unsigned int __c, __p, __z = 0; \ - /* preserve low part of n for reminder computation */ \ - __r = __n; \ - /* determine number of bits to represent __b */ \ - __p = 1 << __div64_fls(__b); \ - /* compute __m = ((__p << 64) + __b - 1) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += (((~0ULL % __b + 1) * __p) + __b - 1) / __b; \ - /* compute __res = __m*(~0ULL/__b*__b-1)/(__p << 64) */ \ - __x = ~0ULL / __b * __b - 1; \ - __res = (__m & 0xffffffff) * (__x & 0xffffffff); \ - __res >>= 32; \ - __res += (__m & 0xffffffff) * (__x >> 32); \ - __t = __res; \ - __res += (__x & 0xffffffff) * (__m >> 32); \ - __t = (__res < __t) ? (1ULL << 32) : 0; \ - __res = (__res >> 32) + __t; \ - __res += (__m >> 32) * (__x >> 32); \ - __res /= __p; \ - /* Now sanitize and optimize what we've got. */ \ - if (~0ULL % (__b / (__b & -__b)) == 0) { \ - /* those cases can be simplified with: */ \ - __n /= (__b & -__b); \ - __m = ~0ULL / (__b / (__b & -__b)); \ - __p = 1; \ - __c = 1; \ - } else if (__res != __x / __b) { \ - /* We can't get away without a correction */ \ - /* to compensate for bit truncation errors. */ \ - /* To avoid it we'd need an additional bit */ \ - /* to represent __m which would overflow it. */ \ - /* Instead we do m=p/b and n/b=(n*m+m)/p. */ \ - __c = 1; \ - /* Compute __m = (__p << 64) / __b */ \ - __m = (~0ULL / __b) * __p; \ - __m += ((~0ULL % __b + 1) * __p) / __b; \ - } else { \ - /* Reduce __m/__p, and try to clear bit 31 */ \ - /* of __m when possible otherwise that'll */ \ - /* need extra overflow handling later. */ \ - unsigned int __bits = -(__m & -__m); \ - __bits |= __m >> 32; \ - __bits = (~__bits) << 1; \ - /* If __bits == 0 then setting bit 31 is */ \ - /* unavoidable. Simply apply the maximum */ \ - /* possible reduction in that case. */ \ - /* Otherwise the MSB of __bits indicates the */ \ - /* best reduction we should apply. */ \ - if (!__bits) { \ - __p /= (__m & -__m); \ - __m /= (__m & -__m); \ - } else { \ - __p >>= __div64_fls(__bits); \ - __m >>= __div64_fls(__bits); \ - } \ - /* No correction needed. */ \ - __c = 0; \ - } \ - /* Now we have a combination of 2 conditions: */ \ - /* 1) whether or not we need a correction (__c), and */ \ - /* 2) whether or not there might be an overflow in */ \ - /* the cross product (__m & ((1<<63) | (1<<31))) */ \ - /* Select the best insn combination to perform the */ \ - /* actual __m * __n / (__p << 64) operation. */ \ - if (!__c) { \ - asm ( "umull %Q0, %R0, %1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - __res = __m; \ - asm ( "umlal %Q0, %R0, %Q1, %Q2\n\t" \ - "mov %Q0, #0" \ - : "+r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umull %Q0, %R0, %Q1, %Q2\n\t" \ - "cmn %Q0, %Q1\n\t" \ - "adcs %R0, %R0, %R1\n\t" \ - "adc %Q0, %3, #0" \ - : "=&r" (__res) \ - : "r" (__m), "r" (__n), "r" (__z) \ - : "cc" ); \ - } \ - if (!(__m & ((1ULL << 63) | (1ULL << 31)))) { \ - asm ( "umlal %R0, %Q0, %R1, %Q2\n\t" \ - "umlal %R0, %Q0, %Q1, %R2\n\t" \ - "mov %R0, #0\n\t" \ - "umlal %Q0, %R0, %R1, %R2" \ - : "+r" (__res) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } else { \ - asm ( "umlal %R0, %Q0, %R2, %Q3\n\t" \ - "umlal %R0, %1, %Q2, %R3\n\t" \ - "mov %R0, #0\n\t" \ - "adds %Q0, %1, %Q0\n\t" \ - "adc %R0, %R0, #0\n\t" \ - "umlal %Q0, %R0, %R2, %R3" \ - : "+r" (__res), "+r" (__z) \ - : "r" (__m), "r" (__n) \ - : "cc" ); \ - } \ - __res /= __p; \ - /* The reminder can be computed with 32-bit regs */ \ - /* only, and gcc is good at that. */ \ - { \ - unsigned int __res0 = __res; \ - unsigned int __b0 = __b; \ - __r -= __res0 * __b0; \ - } \ - /* BUG_ON(__r >= __b || __res * __b + __r != n); */ \ - n = __res; \ - } \ - __r; \ -}) - -/* our own fls implementation to make sure constant propagation is fine */ -#define __div64_fls(bits) \ -({ \ - unsigned int __left = (bits), __nr = 0; \ - if (__left & 0xffff0000) __nr += 16, __left >>= 16; \ - if (__left & 0x0000ff00) __nr += 8, __left >>= 8; \ - if (__left & 0x000000f0) __nr += 4, __left >>= 4; \ - if (__left & 0x0000000c) __nr += 2, __left >>= 2; \ - if (__left & 0x00000002) __nr += 1; \ - __nr; \ -}) - -#endif - -#endif diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h deleted file mode 100644 index f41335b..0000000 --- a/include/asm-arm/dma-mapping.h +++ /dev/null @@ -1,456 +0,0 @@ -#ifndef ASMARM_DMA_MAPPING_H -#define ASMARM_DMA_MAPPING_H - -#ifdef __KERNEL__ - -#include /* need struct page */ - -#include - -/* - * DMA-consistent mapping functions. These allocate/free a region of - * uncached, unwrite-buffered mapped memory space for use with DMA - * devices. This is the "generic" version. The PCI specific version - * is in pci.h - * - * Note: Drivers should NOT use this function directly, as it will break - * platforms with CONFIG_DMABOUNCE. - * Use the driver DMA support - see dma-mapping.h (dma_sync_*) - */ -extern void dma_cache_maint(const void *kaddr, size_t size, int rw); - -/* - * Return whether the given device DMA address mask can be supported - * properly. For example, if your device can only drive the low 24-bits - * during bus mastering, then you would pass 0x00ffffff as the mask - * to this function. - * - * FIXME: This should really be a platform specific issue - we should - * return false if GFP_DMA allocations may not satisfy the supplied 'mask'. - */ -static inline int dma_supported(struct device *dev, u64 mask) -{ - return dev->dma_mask && *dev->dma_mask != 0; -} - -static inline int dma_set_mask(struct device *dev, u64 dma_mask) -{ - if (!dev->dma_mask || !dma_supported(dev, dma_mask)) - return -EIO; - - *dev->dma_mask = dma_mask; - - return 0; -} - -static inline int dma_get_cache_alignment(void) -{ - return 32; -} - -static inline int dma_is_consistent(struct device *dev, dma_addr_t handle) -{ - return !!arch_is_coherent(); -} - -/* - * DMA errors are defined by all-bits-set in the DMA address. - */ -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ - return dma_addr == ~0; -} - -/* - * Dummy noncoherent implementation. We don't provide a dma_cache_sync - * function so drivers using this API are highlighted with build warnings. - */ -static inline void * -dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp) -{ - return NULL; -} - -static inline void -dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t handle) -{ -} - -/** - * dma_alloc_coherent - allocate consistent memory for DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: required memory size - * @handle: bus-specific DMA address - * - * Allocate some uncached, unbuffered memory for a device for - * performing DMA. This function allocates pages, and will - * return the CPU-viewed address, and sets @handle to be the - * device-viewed address. - */ -extern void * -dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); - -/** - * dma_free_coherent - free memory allocated by dma_alloc_coherent - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: size of memory originally requested in dma_alloc_coherent - * @cpu_addr: CPU-view address returned from dma_alloc_coherent - * @handle: device-view address returned from dma_alloc_coherent - * - * Free (and unmap) a DMA buffer previously allocated by - * dma_alloc_coherent(). - * - * References to memory and mappings associated with cpu_addr/handle - * during and after this call executing are illegal. - */ -extern void -dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t handle); - -/** - * dma_mmap_coherent - map a coherent DMA allocation into user space - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @vma: vm_area_struct describing requested user mapping - * @cpu_addr: kernel CPU-view address returned from dma_alloc_coherent - * @handle: device-view address returned from dma_alloc_coherent - * @size: size of memory originally requested in dma_alloc_coherent - * - * Map a coherent DMA buffer previously allocated by dma_alloc_coherent - * into user space. The coherent DMA buffer must not be freed by the - * driver until the user space mapping has been released. - */ -int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t handle, size_t size); - - -/** - * dma_alloc_writecombine - allocate writecombining memory for DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: required memory size - * @handle: bus-specific DMA address - * - * Allocate some uncached, buffered memory for a device for - * performing DMA. This function allocates pages, and will - * return the CPU-viewed address, and sets @handle to be the - * device-viewed address. - */ -extern void * -dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp); - -#define dma_free_writecombine(dev,size,cpu_addr,handle) \ - dma_free_coherent(dev,size,cpu_addr,handle) - -int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma, - void *cpu_addr, dma_addr_t handle, size_t size); - - -/** - * dma_map_single - map a single buffer for streaming DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @cpu_addr: CPU direct mapped address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Ensure that any data held in the cache is appropriately discarded - * or written back. - * - * The device owns this memory once this call has completed. The CPU - * can regain ownership by calling dma_unmap_single() or - * dma_sync_single_for_cpu(). - */ -#ifndef CONFIG_DMABOUNCE -static inline dma_addr_t -dma_map_single(struct device *dev, void *cpu_addr, size_t size, - enum dma_data_direction dir) -{ - if (!arch_is_coherent()) - dma_cache_maint(cpu_addr, size, dir); - - return virt_to_dma(dev, (unsigned long)cpu_addr); -} -#else -extern dma_addr_t dma_map_single(struct device *,void *, size_t, enum dma_data_direction); -#endif - -/** - * dma_map_page - map a portion of a page for streaming DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @page: page that buffer resides in - * @offset: offset into page for start of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Ensure that any data held in the cache is appropriately discarded - * or written back. - * - * The device owns this memory once this call has completed. The CPU - * can regain ownership by calling dma_unmap_page() or - * dma_sync_single_for_cpu(). - */ -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction dir) -{ - return dma_map_single(dev, page_address(page) + offset, size, (int)dir); -} - -/** - * dma_unmap_single - unmap a single buffer previously mapped - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Unmap a single streaming mode DMA translation. The handle and size - * must match what was provided in the previous dma_map_single() call. - * All other usages are undefined. - * - * After this call, reads by the CPU to the buffer are guaranteed to see - * whatever the device wrote there. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_unmap_single(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) -{ - /* nothing to do */ -} -#else -extern void dma_unmap_single(struct device *, dma_addr_t, size_t, enum dma_data_direction); -#endif - -/** - * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Unmap a single streaming mode DMA translation. The handle and size - * must match what was provided in the previous dma_map_single() call. - * All other usages are undefined. - * - * After this call, reads by the CPU to the buffer are guaranteed to see - * whatever the device wrote there. - */ -static inline void -dma_unmap_page(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) -{ - dma_unmap_single(dev, handle, size, (int)dir); -} - -/** - * dma_map_sg - map a set of SG buffers for streaming mode DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Map a set of buffers described by scatterlist in streaming - * mode for DMA. This is the scatter-gather version of the - * above dma_map_single interface. Here the scatter gather list - * elements are each tagged with the appropriate dma address - * and length. They are obtained via sg_dma_{address,length}(SG). - * - * NOTE: An implementation may be able to use a smaller number of - * DMA address/length pairs than there are SG table elements. - * (for example via virtual mapping capabilities) - * The routine returns the number of addr/length pairs actually - * used, at most nents. - * - * Device ownership issues as mentioned above for dma_map_single are - * the same here. - */ -#ifndef CONFIG_DMABOUNCE -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt; - - sg->dma_address = page_to_dma(dev, sg_page(sg)) + sg->offset; - virt = sg_virt(sg); - - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } - - return nents; -} -#else -extern int dma_map_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); -#endif - -/** - * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Unmap a set of streaming mode DMA translations. - * Again, CPU read rules concerning calls here are the same as for - * dma_unmap_single() above. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - - /* nothing to do */ -} -#else -extern void dma_unmap_sg(struct device *, struct scatterlist *, int, enum dma_data_direction); -#endif - - -/** - * dma_sync_single_for_cpu - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Make physical memory consistent for a single streaming mode DMA - * translation after a transfer. - * - * If you perform a dma_map_single() but wish to interrogate the - * buffer using the cpu, yet do not wish to teardown the PCI dma - * mapping, you must call this function before doing so. At the - * next point you give the PCI dma address back to the card, you - * must first the perform a dma_sync_for_device, and then the - * device again owns the buffer. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) -{ - if (!arch_is_coherent()) - dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); -} - -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t handle, size_t size, - enum dma_data_direction dir) -{ - if (!arch_is_coherent()) - dma_cache_maint((void *)dma_to_virt(dev, handle), size, dir); -} -#else -extern void dma_sync_single_for_cpu(struct device*, dma_addr_t, size_t, enum dma_data_direction); -extern void dma_sync_single_for_device(struct device*, dma_addr_t, size_t, enum dma_data_direction); -#endif - - -/** - * dma_sync_sg_for_cpu - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Make physical memory consistent for a set of streaming - * mode DMA translations after a transfer. - * - * The same as dma_sync_single_for_* but for a scatter-gather list, - * same rules and usage. - */ -#ifndef CONFIG_DMABOUNCE -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt = sg_virt(sg); - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction dir) -{ - int i; - - for (i = 0; i < nents; i++, sg++) { - char *virt = sg_virt(sg); - if (!arch_is_coherent()) - dma_cache_maint(virt, sg->length, dir); - } -} -#else -extern void dma_sync_sg_for_cpu(struct device*, struct scatterlist*, int, enum dma_data_direction); -extern void dma_sync_sg_for_device(struct device*, struct scatterlist*, int, enum dma_data_direction); -#endif - -#ifdef CONFIG_DMABOUNCE -/* - * For SA-1111, IXP425, and ADI systems the dma-mapping functions are "magic" - * and utilize bounce buffers as needed to work around limited DMA windows. - * - * On the SA-1111, a bug limits DMA to only certain regions of RAM. - * On the IXP425, the PCI inbound window is 64MB (256MB total RAM) - * On some ADI engineering systems, PCI inbound window is 32MB (12MB total RAM) - * - * The following are helper functions used by the dmabounce subystem - * - */ - -/** - * dmabounce_register_dev - * - * @dev: valid struct device pointer - * @small_buf_size: size of buffers to use with small buffer pool - * @large_buf_size: size of buffers to use with large buffer pool (can be 0) - * - * This function should be called by low-level platform code to register - * a device as requireing DMA buffer bouncing. The function will allocate - * appropriate DMA pools for the device. - * - */ -extern int dmabounce_register_dev(struct device *, unsigned long, unsigned long); - -/** - * dmabounce_unregister_dev - * - * @dev: valid struct device pointer - * - * This function should be called by low-level platform code when device - * that was previously registered with dmabounce_register_dev is removed - * from the system. - * - */ -extern void dmabounce_unregister_dev(struct device *); - -/** - * dma_needs_bounce - * - * @dev: valid struct device pointer - * @dma_handle: dma_handle of unbounced buffer - * @size: size of region being mapped - * - * Platforms that utilize the dmabounce mechanism must implement - * this function. - * - * The dmabounce routines call this function whenever a dma-mapping - * is requested to determine whether a given buffer needs to be bounced - * or not. The function must return 0 if the buffer is OK for - * DMA access and 1 if the buffer needs to be bounced. - * - */ -extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); -#endif /* CONFIG_DMABOUNCE */ - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-arm/dma.h b/include/asm-arm/dma.h deleted file mode 100644 index 9f2c530..0000000 --- a/include/asm-arm/dma.h +++ /dev/null @@ -1,143 +0,0 @@ -#ifndef __ASM_ARM_DMA_H -#define __ASM_ARM_DMA_H - -typedef unsigned int dmach_t; - -#include -#include -#include -#include - -/* - * This is the maximum virtual address which can be DMA'd from. - */ -#ifndef MAX_DMA_ADDRESS -#define MAX_DMA_ADDRESS 0xffffffff -#endif - -/* - * DMA modes - */ -typedef unsigned int dmamode_t; - -#define DMA_MODE_MASK 3 - -#define DMA_MODE_READ 0 -#define DMA_MODE_WRITE 1 -#define DMA_MODE_CASCADE 2 -#define DMA_AUTOINIT 4 - -extern spinlock_t dma_spin_lock; - -static inline unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static inline void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - */ -#define clear_dma_ff(channel) - -/* Set only the page register bits of the transfer address. - * - * NOTE: This is an architecture specific function, and should - * be hidden from the drivers - */ -extern void set_dma_page(dmach_t channel, char pagenr); - -/* Request a DMA channel - * - * Some architectures may need to do allocate an interrupt - */ -extern int request_dma(dmach_t channel, const char * device_id); - -/* Free a DMA channel - * - * Some architectures may need to do free an interrupt - */ -extern void free_dma(dmach_t channel); - -/* Enable DMA for this channel - * - * On some architectures, this may have other side effects like - * enabling an interrupt and setting the DMA registers. - */ -extern void enable_dma(dmach_t channel); - -/* Disable DMA for this channel - * - * On some architectures, this may have other side effects like - * disabling an interrupt or whatever. - */ -extern void disable_dma(dmach_t channel); - -/* Test whether the specified channel has an active DMA transfer - */ -extern int dma_channel_active(dmach_t channel); - -/* Set the DMA scatter gather list for this channel - * - * This should not be called if a DMA channel is enabled, - * especially since some DMA architectures don't update the - * DMA address immediately, but defer it to the enable_dma(). - */ -extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); - -/* Set the DMA address for this channel - * - * This should not be called if a DMA channel is enabled, - * especially since some DMA architectures don't update the - * DMA address immediately, but defer it to the enable_dma(). - */ -extern void __set_dma_addr(dmach_t channel, void *addr); -#define set_dma_addr(channel, addr) \ - __set_dma_addr(channel, bus_to_virt(addr)) - -/* Set the DMA byte count for this channel - * - * This should not be called if a DMA channel is enabled, - * especially since some DMA architectures don't update the - * DMA count immediately, but defer it to the enable_dma(). - */ -extern void set_dma_count(dmach_t channel, unsigned long count); - -/* Set the transfer direction for this channel - * - * This should not be called if a DMA channel is enabled, - * especially since some DMA architectures don't update the - * DMA transfer direction immediately, but defer it to the - * enable_dma(). - */ -extern void set_dma_mode(dmach_t channel, dmamode_t mode); - -/* Set the transfer speed for this channel - */ -extern void set_dma_speed(dmach_t channel, int cycle_ns); - -/* Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * If called before the channel has been used, it may return 1. - * Otherwise, it returns the number of _bytes_ left to transfer. - */ -extern int get_dma_residue(dmach_t channel); - -#ifndef NO_DMA -#define NO_DMA 255 -#endif - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* _ARM_DMA_H */ diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h deleted file mode 100644 index 3c12a76..0000000 --- a/include/asm-arm/domain.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * linux/include/asm-arm/domain.h - * - * Copyright (C) 1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROC_DOMAIN_H -#define __ASM_PROC_DOMAIN_H - -/* - * Domain numbers - * - * DOMAIN_IO - domain 2 includes all IO only - * DOMAIN_USER - domain 1 includes all user memory only - * DOMAIN_KERNEL - domain 0 includes all kernel memory only - * - * The domain numbering depends on whether we support 36 physical - * address for I/O or not. Addresses above the 32 bit boundary can - * only be mapped using supersections and supersections can only - * be set for domain 0. We could just default to DOMAIN_IO as zero, - * but there may be systems with supersection support and no 36-bit - * addressing. In such cases, we want to map system memory with - * supersections to reduce TLB misses and footprint. - * - * 36-bit addressing and supersections are only available on - * CPUs based on ARMv6+ or the Intel XSC3 core. - */ -#ifndef CONFIG_IO_36 -#define DOMAIN_KERNEL 0 -#define DOMAIN_TABLE 0 -#define DOMAIN_USER 1 -#define DOMAIN_IO 2 -#else -#define DOMAIN_KERNEL 2 -#define DOMAIN_TABLE 2 -#define DOMAIN_USER 1 -#define DOMAIN_IO 0 -#endif - -/* - * Domain types - */ -#define DOMAIN_NOACCESS 0 -#define DOMAIN_CLIENT 1 -#define DOMAIN_MANAGER 3 - -#define domain_val(dom,type) ((type) << (2*(dom))) - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_MMU -#define set_domain(x) \ - do { \ - __asm__ __volatile__( \ - "mcr p15, 0, %0, c3, c0 @ set domain" \ - : : "r" (x)); \ - isb(); \ - } while (0) - -#define modify_domain(dom,type) \ - do { \ - struct thread_info *thread = current_thread_info(); \ - unsigned int domain = thread->cpu_domain; \ - domain &= ~domain_val(dom, DOMAIN_MANAGER); \ - thread->cpu_domain = domain | domain_val(dom, type); \ - set_domain(thread->cpu_domain); \ - } while (0) - -#else -#define set_domain(x) do { } while (0) -#define modify_domain(dom,type) do { } while (0) -#endif - -#endif -#endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/ecard.h b/include/asm-arm/ecard.h deleted file mode 100644 index 5e22881..0000000 --- a/include/asm-arm/ecard.h +++ /dev/null @@ -1,219 +0,0 @@ -/* - * linux/include/asm-arm/ecard.h - * - * definitions for expansion cards - * - * This is a new system as from Linux 1.2.3 - * - * Changelog: - * 11-12-1996 RMK Further minor improvements - * 12-09-1997 RMK Added interrupt enable/disable for card level - * - * Reference: Acorns Risc OS 3 Programmers Reference Manuals. - */ - -#ifndef __ASM_ECARD_H -#define __ASM_ECARD_H - -/* - * Currently understood cards (but not necessarily - * supported): - * Manufacturer Product ID - */ -#define MANU_ACORN 0x0000 -#define PROD_ACORN_SCSI 0x0002 -#define PROD_ACORN_ETHER1 0x0003 -#define PROD_ACORN_MFM 0x000b - -#define MANU_ANT2 0x0011 -#define PROD_ANT_ETHER3 0x00a4 - -#define MANU_ATOMWIDE 0x0017 -#define PROD_ATOMWIDE_3PSERIAL 0x0090 - -#define MANU_IRLAM_INSTRUMENTS 0x001f -#define MANU_IRLAM_INSTRUMENTS_ETHERN 0x5678 - -#define MANU_OAK 0x0021 -#define PROD_OAK_SCSI 0x0058 - -#define MANU_MORLEY 0x002b -#define PROD_MORLEY_SCSI_UNCACHED 0x0067 - -#define MANU_CUMANA 0x003a -#define PROD_CUMANA_SCSI_2 0x003a -#define PROD_CUMANA_SCSI_1 0x00a0 - -#define MANU_ICS 0x003c -#define PROD_ICS_IDE 0x00ae - -#define MANU_ICS2 0x003d -#define PROD_ICS2_IDE 0x00ae - -#define MANU_SERPORT 0x003f -#define PROD_SERPORT_DSPORT 0x00b9 - -#define MANU_ARXE 0x0041 -#define PROD_ARXE_SCSI 0x00be - -#define MANU_I3 0x0046 -#define PROD_I3_ETHERLAN500 0x00d4 -#define PROD_I3_ETHERLAN600 0x00ec -#define PROD_I3_ETHERLAN600A 0x011e - -#define MANU_ANT 0x0053 -#define PROD_ANT_ETHERM 0x00d8 -#define PROD_ANT_ETHERB 0x00e4 - -#define MANU_ALSYSTEMS 0x005b -#define PROD_ALSYS_SCSIATAPI 0x0107 - -#define MANU_MCS 0x0063 -#define PROD_MCS_CONNECT32 0x0125 - -#define MANU_EESOX 0x0064 -#define PROD_EESOX_SCSI2 0x008c - -#define MANU_YELLOWSTONE 0x0096 -#define PROD_YELLOWSTONE_RAPIDE32 0x0120 - -#ifdef ECARD_C -#define CONST -#else -#define CONST const -#endif - -#define MAX_ECARDS 9 - -struct ecard_id { /* Card ID structure */ - unsigned short manufacturer; - unsigned short product; - void *data; -}; - -struct in_ecid { /* Packed card ID information */ - unsigned short product; /* Product code */ - unsigned short manufacturer; /* Manufacturer code */ - unsigned char id:4; /* Simple ID */ - unsigned char cd:1; /* Chunk dir present */ - unsigned char is:1; /* Interrupt status pointers */ - unsigned char w:2; /* Width */ - unsigned char country; /* Country */ - unsigned char irqmask; /* IRQ mask */ - unsigned char fiqmask; /* FIQ mask */ - unsigned long irqoff; /* IRQ offset */ - unsigned long fiqoff; /* FIQ offset */ -}; - -typedef struct expansion_card ecard_t; -typedef unsigned long *loader_t; - -typedef struct expansion_card_ops { /* Card handler routines */ - void (*irqenable)(ecard_t *ec, int irqnr); - void (*irqdisable)(ecard_t *ec, int irqnr); - int (*irqpending)(ecard_t *ec); - void (*fiqenable)(ecard_t *ec, int fiqnr); - void (*fiqdisable)(ecard_t *ec, int fiqnr); - int (*fiqpending)(ecard_t *ec); -} expansioncard_ops_t; - -#define ECARD_NUM_RESOURCES (6) - -#define ECARD_RES_IOCSLOW (0) -#define ECARD_RES_IOCMEDIUM (1) -#define ECARD_RES_IOCFAST (2) -#define ECARD_RES_IOCSYNC (3) -#define ECARD_RES_MEMC (4) -#define ECARD_RES_EASI (5) - -#define ecard_resource_start(ec,nr) ((ec)->resource[nr].start) -#define ecard_resource_end(ec,nr) ((ec)->resource[nr].end) -#define ecard_resource_len(ec,nr) ((ec)->resource[nr].end - \ - (ec)->resource[nr].start + 1) -#define ecard_resource_flags(ec,nr) ((ec)->resource[nr].flags) - -/* - * This contains all the info needed on an expansion card - */ -struct expansion_card { - struct expansion_card *next; - - struct device dev; - struct resource resource[ECARD_NUM_RESOURCES]; - - /* Public data */ - void __iomem *irqaddr; /* address of IRQ register */ - void __iomem *fiqaddr; /* address of FIQ register */ - unsigned char irqmask; /* IRQ mask */ - unsigned char fiqmask; /* FIQ mask */ - unsigned char claimed; /* Card claimed? */ - unsigned char easi; /* EASI card */ - - void *irq_data; /* Data for use for IRQ by card */ - void *fiq_data; /* Data for use for FIQ by card */ - const expansioncard_ops_t *ops; /* Enable/Disable Ops for card */ - - CONST unsigned int slot_no; /* Slot number */ - CONST unsigned int dma; /* DMA number (for request_dma) */ - CONST unsigned int irq; /* IRQ number (for request_irq) */ - CONST unsigned int fiq; /* FIQ number (for request_irq) */ - CONST struct in_ecid cid; /* Card Identification */ - - /* Private internal data */ - const char *card_desc; /* Card description */ - CONST unsigned int podaddr; /* Base Linux address for card */ - CONST loader_t loader; /* loader program */ - u64 dma_mask; -}; - -void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *ops, void *irq_data); - -struct in_chunk_dir { - unsigned int start_offset; - union { - unsigned char string[256]; - unsigned char data[1]; - } d; -}; - -/* - * Read a chunk from an expansion card - * cd : where to put read data - * ec : expansion card info struct - * id : id number to find - * num: (n+1)'th id to find. - */ -extern int ecard_readchunk (struct in_chunk_dir *cd, struct expansion_card *ec, int id, int num); - -/* - * Request and release ecard resources - */ -extern int ecard_request_resources(struct expansion_card *ec); -extern void ecard_release_resources(struct expansion_card *ec); - -void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res, - unsigned long offset, unsigned long maxsize); -#define ecardm_iounmap(__ec, __addr) devm_iounmap(&(__ec)->dev, __addr) - -extern struct bus_type ecard_bus_type; - -#define ECARD_DEV(_d) container_of((_d), struct expansion_card, dev) - -struct ecard_driver { - int (*probe)(struct expansion_card *, const struct ecard_id *id); - void (*remove)(struct expansion_card *); - void (*shutdown)(struct expansion_card *); - const struct ecard_id *id_table; - unsigned int id; - struct device_driver drv; -}; - -#define ECARD_DRV(_d) container_of((_d), struct ecard_driver, drv) - -#define ecard_set_drvdata(ec,data) dev_set_drvdata(&(ec)->dev, (data)) -#define ecard_get_drvdata(ec) dev_get_drvdata(&(ec)->dev) - -int ecard_register_driver(struct ecard_driver *); -void ecard_remove_driver(struct ecard_driver *); - -#endif diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h deleted file mode 100644 index 4ca7516..0000000 --- a/include/asm-arm/elf.h +++ /dev/null @@ -1,116 +0,0 @@ -#ifndef __ASMARM_ELF_H -#define __ASMARM_ELF_H - -#include - -#ifndef __ASSEMBLY__ -/* - * ELF register definitions.. - */ -#include -#include - -typedef unsigned long elf_greg_t; -typedef unsigned long elf_freg_t[3]; - -#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fp elf_fpregset_t; -#endif - -#define EM_ARM 40 -#define EF_ARM_APCS26 0x08 -#define EF_ARM_SOFT_FLOAT 0x200 -#define EF_ARM_EABI_MASK 0xFF000000 - -#define R_ARM_NONE 0 -#define R_ARM_PC24 1 -#define R_ARM_ABS32 2 -#define R_ARM_CALL 28 -#define R_ARM_JUMP24 29 - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#ifdef __ARMEB__ -#define ELF_DATA ELFDATA2MSB -#else -#define ELF_DATA ELFDATA2LSB -#endif -#define ELF_ARCH EM_ARM - -#ifndef __ASSEMBLY__ -/* - * This yields a string that ld.so will use to load implementation - * specific libraries for optimization. This is more specific in - * intent than poking at uname or /proc/cpuinfo. - * - * For now we just provide a fairly general string that describes the - * processor family. This could be made more specific later if someone - * implemented optimisations that require it. 26-bit CPUs give you - * "v1l" for ARM2 (no SWP) and "v2l" for anything else (ARM1 isn't - * supported). 32-bit CPUs give you "v3[lb]" for anything based on an - * ARM6 or ARM7 core and "armv4[lb]" for anything based on a StrongARM-1 - * core. - */ -#define ELF_PLATFORM_SIZE 8 -#define ELF_PLATFORM (elf_platform) - -extern char elf_platform[]; -#endif - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_ARM && ELF_PROC_OK(x)) - -/* - * 32-bit code is always OK. Some cpus can do 26-bit, some can't. - */ -#define ELF_PROC_OK(x) (ELF_THUMB_OK(x) && ELF_26BIT_OK(x)) - -#define ELF_THUMB_OK(x) \ - ((elf_hwcap & HWCAP_THUMB && ((x)->e_entry & 1) == 1) || \ - ((x)->e_entry & 3) == 0) - -#define ELF_26BIT_OK(x) \ - ((elf_hwcap & HWCAP_26BIT && (x)->e_flags & EF_ARM_APCS26) || \ - ((x)->e_flags & EF_ARM_APCS26) == 0) - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - -/* When the program starts, a1 contains a pointer to a function to be - registered with atexit, as per the SVR4 ABI. A value of 0 means we - have no such handler. */ -#define ELF_PLAT_INIT(_r, load_addr) (_r)->ARM_r0 = 0 - -/* - * Since the FPA coprocessor uses CP1 and CP2, and iWMMXt uses CP0 - * and CP1, we only enable access to the iWMMXt coprocessor if the - * binary is EABI or softfloat (and thus, guaranteed not to use - * FPA instructions.) - */ -#define SET_PERSONALITY(ex, ibcs2) \ - do { \ - if ((ex).e_flags & EF_ARM_APCS26) { \ - set_personality(PER_LINUX); \ - } else { \ - set_personality(PER_LINUX_32BIT); \ - if (elf_hwcap & HWCAP_IWMMXT && (ex).e_flags & (EF_ARM_EABI_MASK | EF_ARM_SOFT_FLOAT)) \ - set_thread_flag(TIF_USING_IWMMXT); \ - else \ - clear_thread_flag(TIF_USING_IWMMXT); \ - } \ - } while (0) - -#endif diff --git a/include/asm-arm/emergency-restart.h b/include/asm-arm/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-arm/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-arm/errno.h b/include/asm-arm/errno.h deleted file mode 100644 index 6e60f06..0000000 --- a/include/asm-arm/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_ERRNO_H -#define _ARM_ERRNO_H - -#include - -#endif diff --git a/include/asm-arm/fb.h b/include/asm-arm/fb.h deleted file mode 100644 index d92e99c..0000000 --- a/include/asm-arm/fb.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-arm/fcntl.h b/include/asm-arm/fcntl.h deleted file mode 100644 index a80b660..0000000 --- a/include/asm-arm/fcntl.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ARM_FCNTL_H -#define _ARM_FCNTL_H - -#define O_DIRECTORY 040000 /* must be a directory */ -#define O_NOFOLLOW 0100000 /* don't follow links */ -#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */ -#define O_LARGEFILE 0400000 - -#include - -#endif diff --git a/include/asm-arm/fiq.h b/include/asm-arm/fiq.h deleted file mode 100644 index a3bad09..0000000 --- a/include/asm-arm/fiq.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/fiq.h - * - * Support for FIQ on ARM architectures. - * Written by Philip Blundell , 1998 - * Re-written by Russell King - */ - -#ifndef __ASM_FIQ_H -#define __ASM_FIQ_H - -#include - -struct fiq_handler { - struct fiq_handler *next; - /* Name - */ - const char *name; - /* Called to ask driver to relinquish/ - * reacquire FIQ - * return zero to accept, or - - */ - int (*fiq_op)(void *, int relinquish); - /* data for the relinquish/reacquire functions - */ - void *dev_id; -}; - -extern int claim_fiq(struct fiq_handler *f); -extern void release_fiq(struct fiq_handler *f); -extern void set_fiq_handler(void *start, unsigned int length); -extern void set_fiq_regs(struct pt_regs *regs); -extern void get_fiq_regs(struct pt_regs *regs); -extern void enable_fiq(int fiq); -extern void disable_fiq(int fiq); - -#endif diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h deleted file mode 100644 index 9918aa4..0000000 --- a/include/asm-arm/flat.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/flat.h -- uClinux flat-format executables - */ - -#ifndef __ARM_FLAT_H__ -#define __ARM_FLAT_H__ - -/* An odd number of words will be pushed after this alignment, so - deliberately misalign the value. */ -#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4) -#define flat_argvp_envp_on_stack() 1 -#define flat_old_ram_flag(flags) (flags) -#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -#define flat_get_addr_from_rp(rp, relval, flags, persistent) get_unaligned(rp) -#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) -#define flat_get_relocate_addr(rel) (rel) -#define flat_set_persistent(relval, p) 0 - -#endif /* __ARM_FLAT_H__ */ diff --git a/include/asm-arm/floppy.h b/include/asm-arm/floppy.h deleted file mode 100644 index 41a5e9d..0000000 --- a/include/asm-arm/floppy.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * linux/include/asm-arm/floppy.h - * - * Copyright (C) 1996-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note that we don't touch FLOPPY_DMA nor FLOPPY_IRQ here - */ -#ifndef __ASM_ARM_FLOPPY_H -#define __ASM_ARM_FLOPPY_H -#if 0 -#include -#endif - -#define fd_outb(val,port) \ - do { \ - if ((port) == FD_DOR) \ - fd_setdor((val)); \ - else \ - outb((val),(port)); \ - } while(0) - -#define fd_inb(port) inb((port)) -#define fd_request_irq() request_irq(IRQ_FLOPPYDISK,floppy_interrupt,\ - IRQF_DISABLED,"floppy",NULL) -#define fd_free_irq() free_irq(IRQ_FLOPPYDISK,NULL) -#define fd_disable_irq() disable_irq(IRQ_FLOPPYDISK) -#define fd_enable_irq() enable_irq(IRQ_FLOPPYDISK) - -static inline int fd_dma_setup(void *data, unsigned int length, - unsigned int mode, unsigned long addr) -{ - set_dma_mode(DMA_FLOPPY, mode); - __set_dma_addr(DMA_FLOPPY, data); - set_dma_count(DMA_FLOPPY, length); - virtual_dma_port = addr; - enable_dma(DMA_FLOPPY); - return 0; -} -#define fd_dma_setup fd_dma_setup - -#define fd_request_dma() request_dma(DMA_FLOPPY,"floppy") -#define fd_free_dma() free_dma(DMA_FLOPPY) -#define fd_disable_dma() disable_dma(DMA_FLOPPY) - -/* need to clean up dma.h */ -#define DMA_FLOPPYDISK DMA_FLOPPY - -/* Floppy_selects is the list of DOR's to select drive fd - * - * On initialisation, the floppy list is scanned, and the drives allocated - * in the order that they are found. This is done by seeking the drive - * to a non-zero track, and then restoring it to track 0. If an error occurs, - * then there is no floppy drive present. [to be put back in again] - */ -static unsigned char floppy_selects[2][4] = -{ - { 0x10, 0x21, 0x23, 0x33 }, - { 0x10, 0x21, 0x23, 0x33 } -}; - -#define fd_setdor(dor) \ -do { \ - int new_dor = (dor); \ - if (new_dor & 0xf0) \ - new_dor = (new_dor & 0x0c) | floppy_selects[fdc][new_dor & 3]; \ - else \ - new_dor &= 0x0c; \ - outb(new_dor, FD_DOR); \ -} while (0) - -/* - * Someday, we'll automatically detect which drives are present... - */ -static inline void fd_scandrives (void) -{ -#if 0 - int floppy, drive_count; - - fd_disable_irq(); - raw_cmd = &default_raw_cmd; - raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_SEEK; - raw_cmd->track = 0; - raw_cmd->rate = ?; - drive_count = 0; - for (floppy = 0; floppy < 4; floppy ++) { - current_drive = drive_count; - /* - * Turn on floppy motor - */ - if (start_motor(redo_fd_request)) - continue; - /* - * Set up FDC - */ - fdc_specify(); - /* - * Tell FDC to recalibrate - */ - output_byte(FD_RECALIBRATE); - LAST_OUT(UNIT(floppy)); - /* wait for command to complete */ - if (!successful) { - int i; - for (i = drive_count; i < 3; i--) - floppy_selects[fdc][i] = floppy_selects[fdc][i + 1]; - floppy_selects[fdc][3] = 0; - floppy -= 1; - } else - drive_count++; - } -#else - floppy_selects[0][0] = 0x10; - floppy_selects[0][1] = 0x21; - floppy_selects[0][2] = 0x23; - floppy_selects[0][3] = 0x33; -#endif -} - -#define FDC1 (0x3f0) - -#define FLOPPY0_TYPE 4 -#define FLOPPY1_TYPE 4 - -#define N_FDC 1 -#define N_DRIVE 4 - -#define CROSS_64KB(a,s) (0) - -/* - * This allows people to reverse the order of - * fd0 and fd1, in case their hardware is - * strangely connected (as some RiscPCs - * and A5000s seem to be). - */ -static void driveswap(int *ints, int dummy, int dummy2) -{ - floppy_selects[0][0] ^= floppy_selects[0][1]; - floppy_selects[0][1] ^= floppy_selects[0][0]; - floppy_selects[0][0] ^= floppy_selects[0][1]; -} - -#define EXTRA_FLOPPY_PARAMS ,{ "driveswap", &driveswap, NULL, 0, 0 } - -#endif diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h deleted file mode 100644 index 392eb53..0000000 --- a/include/asm-arm/fpstate.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * linux/include/asm-arm/fpstate.h - * - * Copyright (C) 1995 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARM_FPSTATE_H -#define __ASM_ARM_FPSTATE_H - - -#ifndef __ASSEMBLY__ - -/* - * VFP storage area has: - * - FPEXC, FPSCR, FPINST and FPINST2. - * - 16 or 32 double precision data registers - * - an implementation-dependant word of state for FLDMX/FSTMX (pre-ARMv6) - * - * FPEXC will always be non-zero once the VFP has been used in this process. - */ - -struct vfp_hard_struct { -#ifdef CONFIG_VFPv3 - __u64 fpregs[32]; -#else - __u64 fpregs[16]; -#endif -#if __LINUX_ARM_ARCH__ < 6 - __u32 fpmx_state; -#endif - __u32 fpexc; - __u32 fpscr; - /* - * VFP implementation specific state - */ - __u32 fpinst; - __u32 fpinst2; - -#ifdef CONFIG_SMP - __u32 cpu; -#endif -}; - -union vfp_state { - struct vfp_hard_struct hard; -}; - -extern void vfp_flush_thread(union vfp_state *); -extern void vfp_release_thread(union vfp_state *); - -#define FP_HARD_SIZE 35 - -struct fp_hard_struct { - unsigned int save[FP_HARD_SIZE]; /* as yet undefined */ -}; - -#define FP_SOFT_SIZE 35 - -struct fp_soft_struct { - unsigned int save[FP_SOFT_SIZE]; /* undefined information */ -}; - -#define IWMMXT_SIZE 0x98 - -struct iwmmxt_struct { - unsigned int save[IWMMXT_SIZE / sizeof(unsigned int)]; -}; - -union fp_state { - struct fp_hard_struct hard; - struct fp_soft_struct soft; -#ifdef CONFIG_IWMMXT - struct iwmmxt_struct iwmmxt; -#endif -}; - -#define FP_SIZE (sizeof(union fp_state) / sizeof(int)) - -struct crunch_state { - unsigned int mvdx[16][2]; - unsigned int mvax[4][3]; - unsigned int dspsc[2]; -}; - -#define CRUNCH_SIZE sizeof(struct crunch_state) - -#endif - -#endif diff --git a/include/asm-arm/ftrace.h b/include/asm-arm/ftrace.h deleted file mode 100644 index 584ef9a..0000000 --- a/include/asm-arm/ftrace.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _ASM_ARM_FTRACE -#define _ASM_ARM_FTRACE - -#ifdef CONFIG_FTRACE -#define MCOUNT_ADDR ((long)(mcount)) -#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ - -#ifndef __ASSEMBLY__ -extern void mcount(void); -#endif - -#endif - -#endif /* _ASM_ARM_FTRACE */ diff --git a/include/asm-arm/futex.h b/include/asm-arm/futex.h deleted file mode 100644 index 6a332a9..0000000 --- a/include/asm-arm/futex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include - -#endif diff --git a/include/asm-arm/glue.h b/include/asm-arm/glue.h deleted file mode 100644 index a97a182..0000000 --- a/include/asm-arm/glue.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * linux/include/asm-arm/glue.h - * - * Copyright (C) 1997-1999 Russell King - * Copyright (C) 2000-2002 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file provides the glue to stick the processor-specific bits - * into the kernel in an efficient manner. The idea is to use branches - * when we're only targetting one class of TLB, or indirect calls - * when we're targetting multiple classes of TLBs. - */ -#ifdef __KERNEL__ - - -#ifdef __STDC__ -#define ____glue(name,fn) name##fn -#else -#define ____glue(name,fn) name/**/fn -#endif -#define __glue(name,fn) ____glue(name,fn) - - - -/* - * Data Abort Model - * ================ - * - * We have the following to choose from: - * arm6 - ARM6 style - * arm7 - ARM7 style - * v4_early - ARMv4 without Thumb early abort handler - * v4t_late - ARMv4 with Thumb late abort handler - * v4t_early - ARMv4 with Thumb early abort handler - * v5tej_early - ARMv5 with Thumb and Java early abort handler - * xscale - ARMv5 with Thumb with Xscale extensions - * v6_early - ARMv6 generic early abort handler - * v7_early - ARMv7 generic early abort handler - */ -#undef CPU_DABORT_HANDLER -#undef MULTI_DABORT - -#if defined(CONFIG_CPU_ARM610) -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER cpu_arm6_data_abort -# endif -#endif - -#if defined(CONFIG_CPU_ARM710) -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER cpu_arm7_data_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_LV4T -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v4t_late_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV4 -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v4_early_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV4T -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v4t_early_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV5TJ -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v5tj_early_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV5T -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v5t_early_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV6 -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v6_early_abort -# endif -#endif - -#ifdef CONFIG_CPU_ABRT_EV7 -# ifdef CPU_DABORT_HANDLER -# define MULTI_DABORT 1 -# else -# define CPU_DABORT_HANDLER v7_early_abort -# endif -#endif - -#ifndef CPU_DABORT_HANDLER -#error Unknown data abort handler type -#endif - -/* - * Prefetch abort handler. If the CPU has an IFAR use that, otherwise - * use the address of the aborted instruction - */ -#undef CPU_PABORT_HANDLER -#undef MULTI_PABORT - -#ifdef CONFIG_CPU_PABRT_IFAR -# ifdef CPU_PABORT_HANDLER -# define MULTI_PABORT 1 -# else -# define CPU_PABORT_HANDLER(reg, insn) mrc p15, 0, reg, cr6, cr0, 2 -# endif -#endif - -#ifdef CONFIG_CPU_PABRT_NOIFAR -# ifdef CPU_PABORT_HANDLER -# define MULTI_PABORT 1 -# else -# define CPU_PABORT_HANDLER(reg, insn) mov reg, insn -# endif -#endif - -#ifndef CPU_PABORT_HANDLER -#error Unknown prefetch abort handler type -#endif - -#endif diff --git a/include/asm-arm/gpio.h b/include/asm-arm/gpio.h deleted file mode 100644 index fff4f80..0000000 --- a/include/asm-arm/gpio.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _ARCH_ARM_GPIO_H -#define _ARCH_ARM_GPIO_H - -/* not all ARM platforms necessarily support this API ... */ -#include - -#endif /* _ARCH_ARM_GPIO_H */ diff --git a/include/asm-arm/hardirq.h b/include/asm-arm/hardirq.h deleted file mode 100644 index 182310b..0000000 --- a/include/asm-arm/hardirq.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef __ASM_HARDIRQ_H -#define __ASM_HARDIRQ_H - -#include -#include -#include - -typedef struct { - unsigned int __softirq_pending; - unsigned int local_timer_irqs; -} ____cacheline_aligned irq_cpustat_t; - -#include /* Standard mappings for irq_cpustat_t above */ - -#if NR_IRQS > 256 -#define HARDIRQ_BITS 9 -#else -#define HARDIRQ_BITS 8 -#endif - -/* - * The hardirq mask has to be large enough to have space - * for potentially all IRQ sources in the system nesting - * on a single CPU: - */ -#if (1 << HARDIRQ_BITS) < NR_IRQS -# error HARDIRQ_BITS is too low! -#endif - -#define __ARCH_IRQ_EXIT_IRQS_DISABLED 1 - -#endif /* __ASM_HARDIRQ_H */ diff --git a/include/asm-arm/hardware.h b/include/asm-arm/hardware.h deleted file mode 100644 index 1fd1a5b..0000000 --- a/include/asm-arm/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/hardware.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Common hardware definitions - */ - -#ifndef __ASM_HARDWARE_H -#define __ASM_HARDWARE_H - -#include - -#endif diff --git a/include/asm-arm/hardware/arm_timer.h b/include/asm-arm/hardware/arm_timer.h deleted file mode 100644 index 04be3bd..0000000 --- a/include/asm-arm/hardware/arm_timer.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H -#define __ASM_ARM_HARDWARE_ARM_TIMER_H - -#define TIMER_LOAD 0x00 -#define TIMER_VALUE 0x04 -#define TIMER_CTRL 0x08 -#define TIMER_CTRL_ONESHOT (1 << 0) -#define TIMER_CTRL_32BIT (1 << 1) -#define TIMER_CTRL_DIV1 (0 << 2) -#define TIMER_CTRL_DIV16 (1 << 2) -#define TIMER_CTRL_DIV256 (2 << 2) -#define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */ -#define TIMER_CTRL_PERIODIC (1 << 6) -#define TIMER_CTRL_ENABLE (1 << 7) - -#define TIMER_INTCLR 0x0c -#define TIMER_RIS 0x10 -#define TIMER_MIS 0x14 -#define TIMER_BGLOAD 0x18 - -#endif diff --git a/include/asm-arm/hardware/arm_twd.h b/include/asm-arm/hardware/arm_twd.h deleted file mode 100644 index e521b70..0000000 --- a/include/asm-arm/hardware/arm_twd.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_HARDWARE_TWD_H -#define __ASM_HARDWARE_TWD_H - -#define TWD_TIMER_LOAD 0x00 -#define TWD_TIMER_COUNTER 0x04 -#define TWD_TIMER_CONTROL 0x08 -#define TWD_TIMER_INTSTAT 0x0C - -#define TWD_WDOG_LOAD 0x20 -#define TWD_WDOG_COUNTER 0x24 -#define TWD_WDOG_CONTROL 0x28 -#define TWD_WDOG_INTSTAT 0x2C -#define TWD_WDOG_RESETSTAT 0x30 -#define TWD_WDOG_DISABLE 0x34 - -#define TWD_TIMER_CONTROL_ENABLE (1 << 0) -#define TWD_TIMER_CONTROL_ONESHOT (0 << 1) -#define TWD_TIMER_CONTROL_PERIODIC (1 << 1) -#define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) - -#endif diff --git a/include/asm-arm/hardware/cache-l2x0.h b/include/asm-arm/hardware/cache-l2x0.h deleted file mode 100644 index 54029a7..0000000 --- a/include/asm-arm/hardware/cache-l2x0.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * include/asm-arm/hardware/cache-l2x0.h - * - * Copyright (C) 2007 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_HARDWARE_L2X0_H -#define __ASM_ARM_HARDWARE_L2X0_H - -#define L2X0_CACHE_ID 0x000 -#define L2X0_CACHE_TYPE 0x004 -#define L2X0_CTRL 0x100 -#define L2X0_AUX_CTRL 0x104 -#define L2X0_EVENT_CNT_CTRL 0x200 -#define L2X0_EVENT_CNT1_CFG 0x204 -#define L2X0_EVENT_CNT0_CFG 0x208 -#define L2X0_EVENT_CNT1_VAL 0x20C -#define L2X0_EVENT_CNT0_VAL 0x210 -#define L2X0_INTR_MASK 0x214 -#define L2X0_MASKED_INTR_STAT 0x218 -#define L2X0_RAW_INTR_STAT 0x21C -#define L2X0_INTR_CLEAR 0x220 -#define L2X0_CACHE_SYNC 0x730 -#define L2X0_INV_LINE_PA 0x770 -#define L2X0_INV_WAY 0x77C -#define L2X0_CLEAN_LINE_PA 0x7B0 -#define L2X0_CLEAN_LINE_IDX 0x7B8 -#define L2X0_CLEAN_WAY 0x7BC -#define L2X0_CLEAN_INV_LINE_PA 0x7F0 -#define L2X0_CLEAN_INV_LINE_IDX 0x7F8 -#define L2X0_CLEAN_INV_WAY 0x7FC -#define L2X0_LOCKDOWN_WAY_D 0x900 -#define L2X0_LOCKDOWN_WAY_I 0x904 -#define L2X0_TEST_OPERATION 0xF00 -#define L2X0_LINE_DATA 0xF10 -#define L2X0_LINE_TAG 0xF30 -#define L2X0_DEBUG_CTRL 0xF40 - -#ifndef __ASSEMBLY__ -extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask); -#endif - -#endif diff --git a/include/asm-arm/hardware/clps7111.h b/include/asm-arm/hardware/clps7111.h deleted file mode 100644 index 8d3228d..0000000 --- a/include/asm-arm/hardware/clps7111.h +++ /dev/null @@ -1,184 +0,0 @@ -/* - * linux/include/asm-arm/hardware/clps7111.h - * - * This file contains the hardware definitions of the CLPS7111 internal - * registers. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_CLPS7111_H -#define __ASM_HARDWARE_CLPS7111_H - -#define CLPS7111_PHYS_BASE (0x80000000) - -#ifndef __ASSEMBLY__ -#define clps_readb(off) __raw_readb(CLPS7111_BASE + (off)) -#define clps_readw(off) __raw_readw(CLPS7111_BASE + (off)) -#define clps_readl(off) __raw_readl(CLPS7111_BASE + (off)) -#define clps_writeb(val,off) __raw_writeb(val, CLPS7111_BASE + (off)) -#define clps_writew(val,off) __raw_writew(val, CLPS7111_BASE + (off)) -#define clps_writel(val,off) __raw_writel(val, CLPS7111_BASE + (off)) -#endif - -#define PADR (0x0000) -#define PBDR (0x0001) -#define PDDR (0x0003) -#define PADDR (0x0040) -#define PBDDR (0x0041) -#define PDDDR (0x0043) -#define PEDR (0x0080) -#define PEDDR (0x00c0) -#define SYSCON1 (0x0100) -#define SYSFLG1 (0x0140) -#define MEMCFG1 (0x0180) -#define MEMCFG2 (0x01c0) -#define DRFPR (0x0200) -#define INTSR1 (0x0240) -#define INTMR1 (0x0280) -#define LCDCON (0x02c0) -#define TC1D (0x0300) -#define TC2D (0x0340) -#define RTCDR (0x0380) -#define RTCMR (0x03c0) -#define PMPCON (0x0400) -#define CODR (0x0440) -#define UARTDR1 (0x0480) -#define UBRLCR1 (0x04c0) -#define SYNCIO (0x0500) -#define PALLSW (0x0540) -#define PALMSW (0x0580) -#define STFCLR (0x05c0) -#define BLEOI (0x0600) -#define MCEOI (0x0640) -#define TEOI (0x0680) -#define TC1EOI (0x06c0) -#define TC2EOI (0x0700) -#define RTCEOI (0x0740) -#define UMSEOI (0x0780) -#define COEOI (0x07c0) -#define HALT (0x0800) -#define STDBY (0x0840) - -#define FBADDR (0x1000) -#define SYSCON2 (0x1100) -#define SYSFLG2 (0x1140) -#define INTSR2 (0x1240) -#define INTMR2 (0x1280) -#define UARTDR2 (0x1480) -#define UBRLCR2 (0x14c0) -#define SS2DR (0x1500) -#define SRXEOF (0x1600) -#define SS2POP (0x16c0) -#define KBDEOI (0x1700) - -/* common bits: SYSCON1 / SYSCON2 */ -#define SYSCON_UARTEN (1 << 8) - -#define SYSCON1_KBDSCAN(x) ((x) & 15) -#define SYSCON1_KBDSCANMASK (15) -#define SYSCON1_TC1M (1 << 4) -#define SYSCON1_TC1S (1 << 5) -#define SYSCON1_TC2M (1 << 6) -#define SYSCON1_TC2S (1 << 7) -#define SYSCON1_UART1EN SYSCON_UARTEN -#define SYSCON1_BZTOG (1 << 9) -#define SYSCON1_BZMOD (1 << 10) -#define SYSCON1_DBGEN (1 << 11) -#define SYSCON1_LCDEN (1 << 12) -#define SYSCON1_CDENTX (1 << 13) -#define SYSCON1_CDENRX (1 << 14) -#define SYSCON1_SIREN (1 << 15) -#define SYSCON1_ADCKSEL(x) (((x) & 3) << 16) -#define SYSCON1_ADCKSEL_MASK (3 << 16) -#define SYSCON1_EXCKEN (1 << 18) -#define SYSCON1_WAKEDIS (1 << 19) -#define SYSCON1_IRTXM (1 << 20) - -/* common bits: SYSFLG1 / SYSFLG2 */ -#define SYSFLG_UBUSY (1 << 11) -#define SYSFLG_URXFE (1 << 22) -#define SYSFLG_UTXFF (1 << 23) - -#define SYSFLG1_MCDR (1 << 0) -#define SYSFLG1_DCDET (1 << 1) -#define SYSFLG1_WUDR (1 << 2) -#define SYSFLG1_WUON (1 << 3) -#define SYSFLG1_CTS (1 << 8) -#define SYSFLG1_DSR (1 << 9) -#define SYSFLG1_DCD (1 << 10) -#define SYSFLG1_UBUSY SYSFLG_UBUSY -#define SYSFLG1_NBFLG (1 << 12) -#define SYSFLG1_RSTFLG (1 << 13) -#define SYSFLG1_PFFLG (1 << 14) -#define SYSFLG1_CLDFLG (1 << 15) -#define SYSFLG1_URXFE SYSFLG_URXFE -#define SYSFLG1_UTXFF SYSFLG_UTXFF -#define SYSFLG1_CRXFE (1 << 24) -#define SYSFLG1_CTXFF (1 << 25) -#define SYSFLG1_SSIBUSY (1 << 26) -#define SYSFLG1_ID (1 << 29) - -#define SYSFLG2_SSRXOF (1 << 0) -#define SYSFLG2_RESVAL (1 << 1) -#define SYSFLG2_RESFRM (1 << 2) -#define SYSFLG2_SS2RXFE (1 << 3) -#define SYSFLG2_SS2TXFF (1 << 4) -#define SYSFLG2_SS2TXUF (1 << 5) -#define SYSFLG2_CKMODE (1 << 6) -#define SYSFLG2_UBUSY SYSFLG_UBUSY -#define SYSFLG2_URXFE SYSFLG_URXFE -#define SYSFLG2_UTXFF SYSFLG_UTXFF - -#define LCDCON_GSEN (1 << 30) -#define LCDCON_GSMD (1 << 31) - -#define SYSCON2_SERSEL (1 << 0) -#define SYSCON2_KBD6 (1 << 1) -#define SYSCON2_DRAMZ (1 << 2) -#define SYSCON2_KBWEN (1 << 3) -#define SYSCON2_SS2TXEN (1 << 4) -#define SYSCON2_PCCARD1 (1 << 5) -#define SYSCON2_PCCARD2 (1 << 6) -#define SYSCON2_SS2RXEN (1 << 7) -#define SYSCON2_UART2EN SYSCON_UARTEN -#define SYSCON2_SS2MAEN (1 << 9) -#define SYSCON2_OSTB (1 << 12) -#define SYSCON2_CLKENSL (1 << 13) -#define SYSCON2_BUZFREQ (1 << 14) - -/* common bits: UARTDR1 / UARTDR2 */ -#define UARTDR_FRMERR (1 << 8) -#define UARTDR_PARERR (1 << 9) -#define UARTDR_OVERR (1 << 10) - -/* common bits: UBRLCR1 / UBRLCR2 */ -#define UBRLCR_BAUD_MASK ((1 << 12) - 1) -#define UBRLCR_BREAK (1 << 12) -#define UBRLCR_PRTEN (1 << 13) -#define UBRLCR_EVENPRT (1 << 14) -#define UBRLCR_XSTOP (1 << 15) -#define UBRLCR_FIFOEN (1 << 16) -#define UBRLCR_WRDLEN5 (0 << 17) -#define UBRLCR_WRDLEN6 (1 << 17) -#define UBRLCR_WRDLEN7 (2 << 17) -#define UBRLCR_WRDLEN8 (3 << 17) -#define UBRLCR_WRDLEN_MASK (3 << 17) - -#define SYNCIO_SMCKEN (1 << 13) -#define SYNCIO_TXFRMEN (1 << 14) - -#endif /* __ASM_HARDWARE_CLPS7111_H */ diff --git a/include/asm-arm/hardware/cs89712.h b/include/asm-arm/hardware/cs89712.h deleted file mode 100644 index ad99a3e..0000000 --- a/include/asm-arm/hardware/cs89712.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/hardware/cs89712.h - * - * This file contains the hardware definitions of the CS89712 - * additional internal registers. - * - * Copyright (C) 2001 Thomas Gleixner autronix automation - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_CS89712_H -#define __ASM_HARDWARE_CS89712_H - -/* -* CS89712 additional registers -*/ - -#define PCDR 0x0002 /* Port C Data register ---------------------------- */ -#define PCDDR 0x0042 /* Port C Data Direction register ------------------ */ -#define SDCONF 0x2300 /* SDRAM Configuration register ---------------------*/ -#define SDRFPR 0x2340 /* SDRAM Refresh period register --------------------*/ - -#define SDCONF_ACTIVE (1 << 10) -#define SDCONF_CLKCTL (1 << 9) -#define SDCONF_WIDTH_4 (0 << 7) -#define SDCONF_WIDTH_8 (1 << 7) -#define SDCONF_WIDTH_16 (2 << 7) -#define SDCONF_WIDTH_32 (3 << 7) -#define SDCONF_SIZE_16 (0 << 5) -#define SDCONF_SIZE_64 (1 << 5) -#define SDCONF_SIZE_128 (2 << 5) -#define SDCONF_SIZE_256 (3 << 5) -#define SDCONF_CASLAT_2 (2) -#define SDCONF_CASLAT_3 (3) - -#endif /* __ASM_HARDWARE_CS89712_H */ diff --git a/include/asm-arm/hardware/debug-8250.S b/include/asm-arm/hardware/debug-8250.S deleted file mode 100644 index 07c97fb..0000000 --- a/include/asm-arm/hardware/debug-8250.S +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/include/asm-arm/hardware/debug-8250.S - * - * Copyright (C) 1994-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - - .macro senduart,rd,rx - strb \rd, [\rx, #UART_TX << UART_SHIFT] - .endm - - .macro busyuart,rd,rx -1002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT] - and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE - teq \rd, #UART_LSR_TEMT | UART_LSR_THRE - bne 1002b - .endm - - .macro waituart,rd,rx -#ifdef FLOW_CONTROL -1001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT] - tst \rd, #UART_MSR_CTS - beq 1001b -#endif - .endm diff --git a/include/asm-arm/hardware/debug-pl01x.S b/include/asm-arm/hardware/debug-pl01x.S deleted file mode 100644 index 23c541a..0000000 --- a/include/asm-arm/hardware/debug-pl01x.S +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/include/asm-arm/hardware/debug-pl01x.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ -#include - - .macro senduart,rd,rx - strb \rd, [\rx, #UART01x_DR] - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #UART01x_FR] - tst \rd, #UART01x_FR_TXFF - bne 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #UART01x_FR] - tst \rd, #UART01x_FR_BUSY - bne 1001b - .endm diff --git a/include/asm-arm/hardware/dec21285.h b/include/asm-arm/hardware/dec21285.h deleted file mode 100644 index 546f707..0000000 --- a/include/asm-arm/hardware/dec21285.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * linux/include/asm-arm/hardware/dec21285.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * DC21285 registers - */ -#define DC21285_PCI_IACK 0x79000000 -#define DC21285_ARMCSR_BASE 0x42000000 -#define DC21285_PCI_TYPE_0_CONFIG 0x7b000000 -#define DC21285_PCI_TYPE_1_CONFIG 0x7a000000 -#define DC21285_OUTBOUND_WRITE_FLUSH 0x78000000 -#define DC21285_FLASH 0x41000000 -#define DC21285_PCI_IO 0x7c000000 -#define DC21285_PCI_MEM 0x80000000 - -#ifndef __ASSEMBLY__ -#include -#define DC21285_IO(x) ((volatile unsigned long *)(ARMCSR_BASE+(x))) -#else -#define DC21285_IO(x) (x) -#endif - -#define CSR_PCICMD DC21285_IO(0x0004) -#define CSR_CLASSREV DC21285_IO(0x0008) -#define CSR_PCICACHELINESIZE DC21285_IO(0x000c) -#define CSR_PCICSRBASE DC21285_IO(0x0010) -#define CSR_PCICSRIOBASE DC21285_IO(0x0014) -#define CSR_PCISDRAMBASE DC21285_IO(0x0018) -#define CSR_PCIROMBASE DC21285_IO(0x0030) -#define CSR_MBOX0 DC21285_IO(0x0050) -#define CSR_MBOX1 DC21285_IO(0x0054) -#define CSR_MBOX2 DC21285_IO(0x0058) -#define CSR_MBOX3 DC21285_IO(0x005c) -#define CSR_DOORBELL DC21285_IO(0x0060) -#define CSR_DOORBELL_SETUP DC21285_IO(0x0064) -#define CSR_ROMWRITEREG DC21285_IO(0x0068) -#define CSR_CSRBASEMASK DC21285_IO(0x00f8) -#define CSR_CSRBASEOFFSET DC21285_IO(0x00fc) -#define CSR_SDRAMBASEMASK DC21285_IO(0x0100) -#define CSR_SDRAMBASEOFFSET DC21285_IO(0x0104) -#define CSR_ROMBASEMASK DC21285_IO(0x0108) -#define CSR_SDRAMTIMING DC21285_IO(0x010c) -#define CSR_SDRAMADDRSIZE0 DC21285_IO(0x0110) -#define CSR_SDRAMADDRSIZE1 DC21285_IO(0x0114) -#define CSR_SDRAMADDRSIZE2 DC21285_IO(0x0118) -#define CSR_SDRAMADDRSIZE3 DC21285_IO(0x011c) -#define CSR_I2O_INFREEHEAD DC21285_IO(0x0120) -#define CSR_I2O_INPOSTTAIL DC21285_IO(0x0124) -#define CSR_I2O_OUTPOSTHEAD DC21285_IO(0x0128) -#define CSR_I2O_OUTFREETAIL DC21285_IO(0x012c) -#define CSR_I2O_INFREECOUNT DC21285_IO(0x0130) -#define CSR_I2O_OUTPOSTCOUNT DC21285_IO(0x0134) -#define CSR_I2O_INPOSTCOUNT DC21285_IO(0x0138) -#define CSR_SA110_CNTL DC21285_IO(0x013c) -#define SA110_CNTL_INITCMPLETE (1 << 0) -#define SA110_CNTL_ASSERTSERR (1 << 1) -#define SA110_CNTL_RXSERR (1 << 3) -#define SA110_CNTL_SA110DRAMPARITY (1 << 4) -#define SA110_CNTL_PCISDRAMPARITY (1 << 5) -#define SA110_CNTL_DMASDRAMPARITY (1 << 6) -#define SA110_CNTL_DISCARDTIMER (1 << 8) -#define SA110_CNTL_PCINRESET (1 << 9) -#define SA110_CNTL_I2O_256 (0 << 10) -#define SA110_CNTL_I20_512 (1 << 10) -#define SA110_CNTL_I2O_1024 (2 << 10) -#define SA110_CNTL_I2O_2048 (3 << 10) -#define SA110_CNTL_I2O_4096 (4 << 10) -#define SA110_CNTL_I2O_8192 (5 << 10) -#define SA110_CNTL_I2O_16384 (6 << 10) -#define SA110_CNTL_I2O_32768 (7 << 10) -#define SA110_CNTL_WATCHDOG (1 << 13) -#define SA110_CNTL_ROMWIDTH_UNDEF (0 << 14) -#define SA110_CNTL_ROMWIDTH_16 (1 << 14) -#define SA110_CNTL_ROMWIDTH_32 (2 << 14) -#define SA110_CNTL_ROMWIDTH_8 (3 << 14) -#define SA110_CNTL_ROMACCESSTIME(x) ((x)<<16) -#define SA110_CNTL_ROMBURSTTIME(x) ((x)<<20) -#define SA110_CNTL_ROMTRISTATETIME(x) ((x)<<24) -#define SA110_CNTL_XCSDIR(x) ((x)<<28) -#define SA110_CNTL_PCICFN (1 << 31) - -/* - * footbridge_cfn_mode() is used when we want - * to check whether we are the central function - */ -#define __footbridge_cfn_mode() (*CSR_SA110_CNTL & SA110_CNTL_PCICFN) -#if defined(CONFIG_FOOTBRIDGE_HOST) && defined(CONFIG_FOOTBRIDGE_ADDIN) -#define footbridge_cfn_mode() __footbridge_cfn_mode() -#elif defined(CONFIG_FOOTBRIDGE_HOST) -#define footbridge_cfn_mode() (1) -#else -#define footbridge_cfn_mode() (0) -#endif - -#define CSR_PCIADDR_EXTN DC21285_IO(0x0140) -#define CSR_PREFETCHMEMRANGE DC21285_IO(0x0144) -#define CSR_XBUS_CYCLE DC21285_IO(0x0148) -#define CSR_XBUS_IOSTROBE DC21285_IO(0x014c) -#define CSR_DOORBELL_PCI DC21285_IO(0x0150) -#define CSR_DOORBELL_SA110 DC21285_IO(0x0154) -#define CSR_UARTDR DC21285_IO(0x0160) -#define CSR_RXSTAT DC21285_IO(0x0164) -#define CSR_H_UBRLCR DC21285_IO(0x0168) -#define CSR_M_UBRLCR DC21285_IO(0x016c) -#define CSR_L_UBRLCR DC21285_IO(0x0170) -#define CSR_UARTCON DC21285_IO(0x0174) -#define CSR_UARTFLG DC21285_IO(0x0178) -#define CSR_IRQ_STATUS DC21285_IO(0x0180) -#define CSR_IRQ_RAWSTATUS DC21285_IO(0x0184) -#define CSR_IRQ_ENABLE DC21285_IO(0x0188) -#define CSR_IRQ_DISABLE DC21285_IO(0x018c) -#define CSR_IRQ_SOFT DC21285_IO(0x0190) -#define CSR_FIQ_STATUS DC21285_IO(0x0280) -#define CSR_FIQ_RAWSTATUS DC21285_IO(0x0284) -#define CSR_FIQ_ENABLE DC21285_IO(0x0288) -#define CSR_FIQ_DISABLE DC21285_IO(0x028c) -#define CSR_FIQ_SOFT DC21285_IO(0x0290) -#define CSR_TIMER1_LOAD DC21285_IO(0x0300) -#define CSR_TIMER1_VALUE DC21285_IO(0x0304) -#define CSR_TIMER1_CNTL DC21285_IO(0x0308) -#define CSR_TIMER1_CLR DC21285_IO(0x030c) -#define CSR_TIMER2_LOAD DC21285_IO(0x0320) -#define CSR_TIMER2_VALUE DC21285_IO(0x0324) -#define CSR_TIMER2_CNTL DC21285_IO(0x0328) -#define CSR_TIMER2_CLR DC21285_IO(0x032c) -#define CSR_TIMER3_LOAD DC21285_IO(0x0340) -#define CSR_TIMER3_VALUE DC21285_IO(0x0344) -#define CSR_TIMER3_CNTL DC21285_IO(0x0348) -#define CSR_TIMER3_CLR DC21285_IO(0x034c) -#define CSR_TIMER4_LOAD DC21285_IO(0x0360) -#define CSR_TIMER4_VALUE DC21285_IO(0x0364) -#define CSR_TIMER4_CNTL DC21285_IO(0x0368) -#define CSR_TIMER4_CLR DC21285_IO(0x036c) - -#define TIMER_CNTL_ENABLE (1 << 7) -#define TIMER_CNTL_AUTORELOAD (1 << 6) -#define TIMER_CNTL_DIV1 (0) -#define TIMER_CNTL_DIV16 (1 << 2) -#define TIMER_CNTL_DIV256 (2 << 2) -#define TIMER_CNTL_CNTEXT (3 << 2) - - diff --git a/include/asm-arm/hardware/entry-macro-iomd.S b/include/asm-arm/hardware/entry-macro-iomd.S deleted file mode 100644 index 9bb580a..0000000 --- a/include/asm-arm/hardware/entry-macro-iomd.S +++ /dev/null @@ -1,139 +0,0 @@ -/* - * include/asm-arm/hardware/entry-macro-iomd.S - * - * Low-level IRQ helper macros for IOC/IOMD based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -/* IOC / IOMD based hardware */ -#include - - .macro disable_fiq - mov r12, #ioc_base_high - .if ioc_base_low - orr r12, r12, #ioc_base_low - .endif - strb r12, [r12, #0x38] @ Disable FIQ register - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first - ldr \tmp, =irq_prio_h - teq \irqstat, #0 -#ifdef IOMD_BASE - ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma - addeq \tmp, \tmp, #256 @ irq_prio_h table size - teqeq \irqstat, #0 - bne 2406f -#endif - ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority - addeq \tmp, \tmp, #256 @ irq_prio_d table size - teqeq \irqstat, #0 -#ifdef IOMD_IRQREQC - ldreqb \irqstat, [\base, #IOMD_IRQREQC] - addeq \tmp, \tmp, #256 @ irq_prio_l table size - teqeq \irqstat, #0 -#endif -#ifdef IOMD_IRQREQD - ldreqb \irqstat, [\base, #IOMD_IRQREQD] - addeq \tmp, \tmp, #256 @ irq_prio_lc table size - teqeq \irqstat, #0 -#endif -2406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number - .endm - -/* - * Interrupt table (incorporates priority). Please note that we - * rely on the order of these tables (see above code). - */ - .align 5 -irq_prio_h: .byte 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 12, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 14,14,14,14,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 15,15,15,15,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 - .byte 13,13,13,13,10,10,10,10,11,11,11,11,10,10,10,10 -#ifdef IOMD_BASE -irq_prio_d: .byte 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 20,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 23,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 22,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 - .byte 21,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16 -#endif -irq_prio_l: .byte 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 - .byte 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3 - .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 - .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 - .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3 - .byte 6, 6, 6, 6, 6, 6, 6, 6, 3, 3, 3, 3, 3, 3, 3, 3 - .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 - .byte 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 - .byte 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7 -#ifdef IOMD_IRQREQC -irq_prio_lc: .byte 24,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27 - .byte 28,24,25,24,26,26,26,26,27,27,27,27,27,27,27,27 - .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29 - .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29 - .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27 - .byte 30,30,30,30,30,30,30,30,27,27,27,27,27,27,27,27 - .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29 - .byte 29,29,29,29,29,29,29,29,29,29,29,29,29,29,29,29 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 - .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31 -#endif -#ifdef IOMD_IRQREQD -irq_prio_ld: .byte 40,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43 - .byte 44,40,41,40,42,42,42,42,43,43,43,43,43,43,43,43 - .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45 - .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45 - .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43 - .byte 46,46,46,46,46,46,46,46,43,43,43,43,43,43,43,43 - .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45 - .byte 45,45,45,45,45,45,45,45,45,45,45,45,45,45,45,45 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 - .byte 47,47,47,47,47,47,47,47,47,47,47,47,47,47,47,47 -#endif - diff --git a/include/asm-arm/hardware/ep7211.h b/include/asm-arm/hardware/ep7211.h deleted file mode 100644 index 017aa68..0000000 --- a/include/asm-arm/hardware/ep7211.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/hardware/ep7211.h - * - * This file contains the hardware definitions of the EP7211 internal - * registers. - * - * Copyright (C) 2001 Blue Mug, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_EP7211_H -#define __ASM_HARDWARE_EP7211_H - -#include - -/* - * define EP7211_BASE to be the base address of the region - * you want to access. - */ - -#define EP7211_PHYS_BASE (0x80000000) - -/* - * XXX miket@bluemug.com: need to introduce EP7211 registers (those not - * present in 7212) here. - */ - -#endif /* __ASM_HARDWARE_EP7211_H */ diff --git a/include/asm-arm/hardware/ep7212.h b/include/asm-arm/hardware/ep7212.h deleted file mode 100644 index 0e952e7..0000000 --- a/include/asm-arm/hardware/ep7212.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * linux/include/asm-arm/hardware/ep7212.h - * - * This file contains the hardware definitions of the EP7212 internal - * registers. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_HARDWARE_EP7212_H -#define __ASM_HARDWARE_EP7212_H - -/* - * define EP7212_BASE to be the base address of the region - * you want to access. - */ - -#define EP7212_PHYS_BASE (0x80000000) - -#ifndef __ASSEMBLY__ -#define ep_readl(off) __raw_readl(EP7212_BASE + (off)) -#define ep_writel(val,off) __raw_writel(val, EP7212_BASE + (off)) -#endif - -/* - * These registers are specific to the EP7212 only - */ -#define DAIR 0x2000 -#define DAIR0 0x2040 -#define DAIDR1 0x2080 -#define DAIDR2 0x20c0 -#define DAISR 0x2100 -#define SYSCON3 0x2200 -#define INTSR3 0x2240 -#define INTMR3 0x2280 -#define LEDFLSH 0x22c0 - -#define DAIR_DAIEN (1 << 16) -#define DAIR_ECS (1 << 17) -#define DAIR_LCTM (1 << 19) -#define DAIR_LCRM (1 << 20) -#define DAIR_RCTM (1 << 21) -#define DAIR_RCRM (1 << 22) -#define DAIR_LBM (1 << 23) - -#define DAIDR2_FIFOEN (1 << 15) -#define DAIDR2_FIFOLEFT (0x0d << 16) -#define DAIDR2_FIFORIGHT (0x11 << 16) - -#define DAISR_RCTS (1 << 0) -#define DAISR_RCRS (1 << 1) -#define DAISR_LCTS (1 << 2) -#define DAISR_LCRS (1 << 3) -#define DAISR_RCTU (1 << 4) -#define DAISR_RCRO (1 << 5) -#define DAISR_LCTU (1 << 6) -#define DAISR_LCRO (1 << 7) -#define DAISR_RCNF (1 << 8) -#define DAISR_RCNE (1 << 9) -#define DAISR_LCNF (1 << 10) -#define DAISR_LCNE (1 << 11) -#define DAISR_FIFO (1 << 12) - -#define SYSCON3_ADCCON (1 << 0) -#define SYSCON3_DAISEL (1 << 3) -#define SYSCON3_ADCCKNSEN (1 << 4) -#define SYSCON3_FASTWAKE (1 << 8) -#define SYSCON3_DAIEN (1 << 9) - -#endif /* __ASM_HARDWARE_EP7212_H */ diff --git a/include/asm-arm/hardware/gic.h b/include/asm-arm/hardware/gic.h deleted file mode 100644 index 966e428..0000000 --- a/include/asm-arm/hardware/gic.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * linux/include/asm-arm/hardware/gic.h - * - * Copyright (C) 2002 ARM Limited, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_HARDWARE_GIC_H -#define __ASM_ARM_HARDWARE_GIC_H - -#include - -#define GIC_CPU_CTRL 0x00 -#define GIC_CPU_PRIMASK 0x04 -#define GIC_CPU_BINPOINT 0x08 -#define GIC_CPU_INTACK 0x0c -#define GIC_CPU_EOI 0x10 -#define GIC_CPU_RUNNINGPRI 0x14 -#define GIC_CPU_HIGHPRI 0x18 - -#define GIC_DIST_CTRL 0x000 -#define GIC_DIST_CTR 0x004 -#define GIC_DIST_ENABLE_SET 0x100 -#define GIC_DIST_ENABLE_CLEAR 0x180 -#define GIC_DIST_PENDING_SET 0x200 -#define GIC_DIST_PENDING_CLEAR 0x280 -#define GIC_DIST_ACTIVE_BIT 0x300 -#define GIC_DIST_PRI 0x400 -#define GIC_DIST_TARGET 0x800 -#define GIC_DIST_CONFIG 0xc00 -#define GIC_DIST_SOFTINT 0xf00 - -#ifndef __ASSEMBLY__ -void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start); -void gic_cpu_init(unsigned int gic_nr, void __iomem *base); -void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); -void gic_raise_softirq(cpumask_t cpumask, unsigned int irq); -#endif - -#endif diff --git a/include/asm-arm/hardware/icst307.h b/include/asm-arm/hardware/icst307.h deleted file mode 100644 index ff8618a..0000000 --- a/include/asm-arm/hardware/icst307.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/hardware/icst307.h - * - * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Support functions for calculating clocks/divisors for the ICS307 - * clock generators. See http://www.icst.com/ for more information - * on these devices. - * - * This file is similar to the icst525.h file - */ -#ifndef ASMARM_HARDWARE_ICST307_H -#define ASMARM_HARDWARE_ICST307_H - -struct icst307_params { - unsigned long ref; - unsigned long vco_max; /* inclusive */ - unsigned short vd_min; /* inclusive */ - unsigned short vd_max; /* inclusive */ - unsigned char rd_min; /* inclusive */ - unsigned char rd_max; /* inclusive */ -}; - -struct icst307_vco { - unsigned short v; - unsigned char r; - unsigned char s; -}; - -unsigned long icst307_khz(const struct icst307_params *p, struct icst307_vco vco); -struct icst307_vco icst307_khz_to_vco(const struct icst307_params *p, unsigned long freq); -struct icst307_vco icst307_ps_to_vco(const struct icst307_params *p, unsigned long period); - -#endif diff --git a/include/asm-arm/hardware/icst525.h b/include/asm-arm/hardware/icst525.h deleted file mode 100644 index edd5a57..0000000 --- a/include/asm-arm/hardware/icst525.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/hardware/icst525.h - * - * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Support functions for calculating clocks/divisors for the ICST525 - * clock generators. See http://www.icst.com/ for more information - * on these devices. - */ -#ifndef ASMARM_HARDWARE_ICST525_H -#define ASMARM_HARDWARE_ICST525_H - -struct icst525_params { - unsigned long ref; - unsigned long vco_max; /* inclusive */ - unsigned short vd_min; /* inclusive */ - unsigned short vd_max; /* inclusive */ - unsigned char rd_min; /* inclusive */ - unsigned char rd_max; /* inclusive */ -}; - -struct icst525_vco { - unsigned short v; - unsigned char r; - unsigned char s; -}; - -unsigned long icst525_khz(const struct icst525_params *p, struct icst525_vco vco); -struct icst525_vco icst525_khz_to_vco(const struct icst525_params *p, unsigned long freq); -struct icst525_vco icst525_ps_to_vco(const struct icst525_params *p, unsigned long period); - -#endif diff --git a/include/asm-arm/hardware/ioc.h b/include/asm-arm/hardware/ioc.h deleted file mode 100644 index b3b46ef..0000000 --- a/include/asm-arm/hardware/ioc.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * linux/include/asm-arm/hardware/ioc.h - * - * Copyright (C) Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Use these macros to read/write the IOC. All it does is perform the actual - * read/write. - */ -#ifndef __ASMARM_HARDWARE_IOC_H -#define __ASMARM_HARDWARE_IOC_H - -#ifndef __ASSEMBLY__ - -/* - * We use __raw_base variants here so that we give the compiler the - * chance to keep IOC_BASE in a register. - */ -#define ioc_readb(off) __raw_readb(IOC_BASE + (off)) -#define ioc_writeb(val,off) __raw_writeb(val, IOC_BASE + (off)) - -#endif - -#define IOC_CONTROL (0x00) -#define IOC_KARTTX (0x04) -#define IOC_KARTRX (0x04) - -#define IOC_IRQSTATA (0x10) -#define IOC_IRQREQA (0x14) -#define IOC_IRQCLRA (0x14) -#define IOC_IRQMASKA (0x18) - -#define IOC_IRQSTATB (0x20) -#define IOC_IRQREQB (0x24) -#define IOC_IRQMASKB (0x28) - -#define IOC_FIQSTAT (0x30) -#define IOC_FIQREQ (0x34) -#define IOC_FIQMASK (0x38) - -#define IOC_T0CNTL (0x40) -#define IOC_T0LTCHL (0x40) -#define IOC_T0CNTH (0x44) -#define IOC_T0LTCHH (0x44) -#define IOC_T0GO (0x48) -#define IOC_T0LATCH (0x4c) - -#define IOC_T1CNTL (0x50) -#define IOC_T1LTCHL (0x50) -#define IOC_T1CNTH (0x54) -#define IOC_T1LTCHH (0x54) -#define IOC_T1GO (0x58) -#define IOC_T1LATCH (0x5c) - -#define IOC_T2CNTL (0x60) -#define IOC_T2LTCHL (0x60) -#define IOC_T2CNTH (0x64) -#define IOC_T2LTCHH (0x64) -#define IOC_T2GO (0x68) -#define IOC_T2LATCH (0x6c) - -#define IOC_T3CNTL (0x70) -#define IOC_T3LTCHL (0x70) -#define IOC_T3CNTH (0x74) -#define IOC_T3LTCHH (0x74) -#define IOC_T3GO (0x78) -#define IOC_T3LATCH (0x7c) - -#endif diff --git a/include/asm-arm/hardware/iomd.h b/include/asm-arm/hardware/iomd.h deleted file mode 100644 index 396e55a..0000000 --- a/include/asm-arm/hardware/iomd.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * linux/include/asm-arm/hardware/iomd.h - * - * Copyright (C) 1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains information out the IOMD ASIC used in the - * Acorn RiscPC and subsequently integrated into the CLPS7500 chips. - */ -#ifndef __ASMARM_HARDWARE_IOMD_H -#define __ASMARM_HARDWARE_IOMD_H - - -#ifndef __ASSEMBLY__ - -/* - * We use __raw_base variants here so that we give the compiler the - * chance to keep IOC_BASE in a register. - */ -#define iomd_readb(off) __raw_readb(IOMD_BASE + (off)) -#define iomd_readl(off) __raw_readl(IOMD_BASE + (off)) -#define iomd_writeb(val,off) __raw_writeb(val, IOMD_BASE + (off)) -#define iomd_writel(val,off) __raw_writel(val, IOMD_BASE + (off)) - -#endif - -#define IOMD_CONTROL (0x000) -#define IOMD_KARTTX (0x004) -#define IOMD_KARTRX (0x004) -#define IOMD_KCTRL (0x008) - -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_IOLINES (0x00C) -#endif - -#define IOMD_IRQSTATA (0x010) -#define IOMD_IRQREQA (0x014) -#define IOMD_IRQCLRA (0x014) -#define IOMD_IRQMASKA (0x018) - -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_SUSMODE (0x01C) -#endif - -#define IOMD_IRQSTATB (0x020) -#define IOMD_IRQREQB (0x024) -#define IOMD_IRQMASKB (0x028) - -#define IOMD_FIQSTAT (0x030) -#define IOMD_FIQREQ (0x034) -#define IOMD_FIQMASK (0x038) - -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_CLKCTL (0x03C) -#endif - -#define IOMD_T0CNTL (0x040) -#define IOMD_T0LTCHL (0x040) -#define IOMD_T0CNTH (0x044) -#define IOMD_T0LTCHH (0x044) -#define IOMD_T0GO (0x048) -#define IOMD_T0LATCH (0x04c) - -#define IOMD_T1CNTL (0x050) -#define IOMD_T1LTCHL (0x050) -#define IOMD_T1CNTH (0x054) -#define IOMD_T1LTCHH (0x054) -#define IOMD_T1GO (0x058) -#define IOMD_T1LATCH (0x05c) - -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_IRQSTATC (0x060) -#define IOMD_IRQREQC (0x064) -#define IOMD_IRQMASKC (0x068) - -#define IOMD_VIDMUX (0x06c) - -#define IOMD_IRQSTATD (0x070) -#define IOMD_IRQREQD (0x074) -#define IOMD_IRQMASKD (0x078) -#endif - -#define IOMD_ROMCR0 (0x080) -#define IOMD_ROMCR1 (0x084) -#ifdef CONFIG_ARCH_RPC -#define IOMD_DRAMCR (0x088) -#endif -#define IOMD_REFCR (0x08C) - -#define IOMD_FSIZE (0x090) -#define IOMD_ID0 (0x094) -#define IOMD_ID1 (0x098) -#define IOMD_VERSION (0x09C) - -#ifdef CONFIG_ARCH_RPC -#define IOMD_MOUSEX (0x0A0) -#define IOMD_MOUSEY (0x0A4) -#endif - -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_MSEDAT (0x0A8) -#define IOMD_MSECTL (0x0Ac) -#endif - -#ifdef CONFIG_ARCH_RPC -#define IOMD_DMATCR (0x0C0) -#endif -#define IOMD_IOTCR (0x0C4) -#define IOMD_ECTCR (0x0C8) -#ifdef CONFIG_ARCH_RPC -#define IOMD_DMAEXT (0x0CC) -#endif -#ifdef CONFIG_ARCH_CLPS7500 -#define IOMD_ASTCR (0x0CC) -#define IOMD_DRAMCR (0x0D0) -#define IOMD_SELFREF (0x0D4) -#define IOMD_ATODICR (0x0E0) -#define IOMD_ATODSR (0x0E4) -#define IOMD_ATODCC (0x0E8) -#define IOMD_ATODCNT1 (0x0EC) -#define IOMD_ATODCNT2 (0x0F0) -#define IOMD_ATODCNT3 (0x0F4) -#define IOMD_ATODCNT4 (0x0F8) -#endif - -#ifdef CONFIG_ARCH_RPC -#define DMA_EXT_IO0 1 -#define DMA_EXT_IO1 2 -#define DMA_EXT_IO2 4 -#define DMA_EXT_IO3 8 - -#define IOMD_IO0CURA (0x100) -#define IOMD_IO0ENDA (0x104) -#define IOMD_IO0CURB (0x108) -#define IOMD_IO0ENDB (0x10C) -#define IOMD_IO0CR (0x110) -#define IOMD_IO0ST (0x114) - -#define IOMD_IO1CURA (0x120) -#define IOMD_IO1ENDA (0x124) -#define IOMD_IO1CURB (0x128) -#define IOMD_IO1ENDB (0x12C) -#define IOMD_IO1CR (0x130) -#define IOMD_IO1ST (0x134) - -#define IOMD_IO2CURA (0x140) -#define IOMD_IO2ENDA (0x144) -#define IOMD_IO2CURB (0x148) -#define IOMD_IO2ENDB (0x14C) -#define IOMD_IO2CR (0x150) -#define IOMD_IO2ST (0x154) - -#define IOMD_IO3CURA (0x160) -#define IOMD_IO3ENDA (0x164) -#define IOMD_IO3CURB (0x168) -#define IOMD_IO3ENDB (0x16C) -#define IOMD_IO3CR (0x170) -#define IOMD_IO3ST (0x174) -#endif - -#define IOMD_SD0CURA (0x180) -#define IOMD_SD0ENDA (0x184) -#define IOMD_SD0CURB (0x188) -#define IOMD_SD0ENDB (0x18C) -#define IOMD_SD0CR (0x190) -#define IOMD_SD0ST (0x194) - -#ifdef CONFIG_ARCH_RPC -#define IOMD_SD1CURA (0x1A0) -#define IOMD_SD1ENDA (0x1A4) -#define IOMD_SD1CURB (0x1A8) -#define IOMD_SD1ENDB (0x1AC) -#define IOMD_SD1CR (0x1B0) -#define IOMD_SD1ST (0x1B4) -#endif - -#define IOMD_CURSCUR (0x1C0) -#define IOMD_CURSINIT (0x1C4) - -#define IOMD_VIDCUR (0x1D0) -#define IOMD_VIDEND (0x1D4) -#define IOMD_VIDSTART (0x1D8) -#define IOMD_VIDINIT (0x1DC) -#define IOMD_VIDCR (0x1E0) - -#define IOMD_DMASTAT (0x1F0) -#define IOMD_DMAREQ (0x1F4) -#define IOMD_DMAMASK (0x1F8) - -#define DMA_END_S (1 << 31) -#define DMA_END_L (1 << 30) - -#define DMA_CR_C 0x80 -#define DMA_CR_D 0x40 -#define DMA_CR_E 0x20 - -#define DMA_ST_OFL 4 -#define DMA_ST_INT 2 -#define DMA_ST_AB 1 - -/* - * DMA (MEMC) compatibility - */ -#define HALF_SAM vram_half_sam -#define VDMA_ALIGNMENT (HALF_SAM * 2) -#define VDMA_XFERSIZE (HALF_SAM) -#define VDMA_INIT IOMD_VIDINIT -#define VDMA_START IOMD_VIDSTART -#define VDMA_END IOMD_VIDEND - -#ifndef __ASSEMBLY__ -extern unsigned int vram_half_sam; -#define video_set_dma(start,end,offset) \ -do { \ - outl (SCREEN_START + start, VDMA_START); \ - outl (SCREEN_START + end - VDMA_XFERSIZE, VDMA_END); \ - if (offset >= end - VDMA_XFERSIZE) \ - offset |= 0x40000000; \ - outl (SCREEN_START + offset, VDMA_INIT); \ -} while (0) -#endif - -#endif diff --git a/include/asm-arm/hardware/iop3xx-adma.h b/include/asm-arm/hardware/iop3xx-adma.h deleted file mode 100644 index af64676..0000000 --- a/include/asm-arm/hardware/iop3xx-adma.h +++ /dev/null @@ -1,888 +0,0 @@ -/* - * Copyright © 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - */ -#ifndef _ADMA_H -#define _ADMA_H -#include -#include -#include -#include - -/* Memory copy units */ -#define DMA_CCR(chan) (chan->mmr_base + 0x0) -#define DMA_CSR(chan) (chan->mmr_base + 0x4) -#define DMA_DAR(chan) (chan->mmr_base + 0xc) -#define DMA_NDAR(chan) (chan->mmr_base + 0x10) -#define DMA_PADR(chan) (chan->mmr_base + 0x14) -#define DMA_PUADR(chan) (chan->mmr_base + 0x18) -#define DMA_LADR(chan) (chan->mmr_base + 0x1c) -#define DMA_BCR(chan) (chan->mmr_base + 0x20) -#define DMA_DCR(chan) (chan->mmr_base + 0x24) - -/* Application accelerator unit */ -#define AAU_ACR(chan) (chan->mmr_base + 0x0) -#define AAU_ASR(chan) (chan->mmr_base + 0x4) -#define AAU_ADAR(chan) (chan->mmr_base + 0x8) -#define AAU_ANDAR(chan) (chan->mmr_base + 0xc) -#define AAU_SAR(src, chan) (chan->mmr_base + (0x10 + ((src) << 2))) -#define AAU_DAR(chan) (chan->mmr_base + 0x20) -#define AAU_ABCR(chan) (chan->mmr_base + 0x24) -#define AAU_ADCR(chan) (chan->mmr_base + 0x28) -#define AAU_SAR_EDCR(src_edc) (chan->mmr_base + (0x02c + ((src_edc-4) << 2))) -#define AAU_EDCR0_IDX 8 -#define AAU_EDCR1_IDX 17 -#define AAU_EDCR2_IDX 26 - -#define DMA0_ID 0 -#define DMA1_ID 1 -#define AAU_ID 2 - -struct iop3xx_aau_desc_ctrl { - unsigned int int_en:1; - unsigned int blk1_cmd_ctrl:3; - unsigned int blk2_cmd_ctrl:3; - unsigned int blk3_cmd_ctrl:3; - unsigned int blk4_cmd_ctrl:3; - unsigned int blk5_cmd_ctrl:3; - unsigned int blk6_cmd_ctrl:3; - unsigned int blk7_cmd_ctrl:3; - unsigned int blk8_cmd_ctrl:3; - unsigned int blk_ctrl:2; - unsigned int dual_xor_en:1; - unsigned int tx_complete:1; - unsigned int zero_result_err:1; - unsigned int zero_result_en:1; - unsigned int dest_write_en:1; -}; - -struct iop3xx_aau_e_desc_ctrl { - unsigned int reserved:1; - unsigned int blk1_cmd_ctrl:3; - unsigned int blk2_cmd_ctrl:3; - unsigned int blk3_cmd_ctrl:3; - unsigned int blk4_cmd_ctrl:3; - unsigned int blk5_cmd_ctrl:3; - unsigned int blk6_cmd_ctrl:3; - unsigned int blk7_cmd_ctrl:3; - unsigned int blk8_cmd_ctrl:3; - unsigned int reserved2:7; -}; - -struct iop3xx_dma_desc_ctrl { - unsigned int pci_transaction:4; - unsigned int int_en:1; - unsigned int dac_cycle_en:1; - unsigned int mem_to_mem_en:1; - unsigned int crc_data_tx_en:1; - unsigned int crc_gen_en:1; - unsigned int crc_seed_dis:1; - unsigned int reserved:21; - unsigned int crc_tx_complete:1; -}; - -struct iop3xx_desc_dma { - u32 next_desc; - union { - u32 pci_src_addr; - u32 pci_dest_addr; - u32 src_addr; - }; - union { - u32 upper_pci_src_addr; - u32 upper_pci_dest_addr; - }; - union { - u32 local_pci_src_addr; - u32 local_pci_dest_addr; - u32 dest_addr; - }; - u32 byte_count; - union { - u32 desc_ctrl; - struct iop3xx_dma_desc_ctrl desc_ctrl_field; - }; - u32 crc_addr; -}; - -struct iop3xx_desc_aau { - u32 next_desc; - u32 src[4]; - u32 dest_addr; - u32 byte_count; - union { - u32 desc_ctrl; - struct iop3xx_aau_desc_ctrl desc_ctrl_field; - }; - union { - u32 src_addr; - u32 e_desc_ctrl; - struct iop3xx_aau_e_desc_ctrl e_desc_ctrl_field; - } src_edc[31]; -}; - -struct iop3xx_aau_gfmr { - unsigned int gfmr1:8; - unsigned int gfmr2:8; - unsigned int gfmr3:8; - unsigned int gfmr4:8; -}; - -struct iop3xx_desc_pq_xor { - u32 next_desc; - u32 src[3]; - union { - u32 data_mult1; - struct iop3xx_aau_gfmr data_mult1_field; - }; - u32 dest_addr; - u32 byte_count; - union { - u32 desc_ctrl; - struct iop3xx_aau_desc_ctrl desc_ctrl_field; - }; - union { - u32 src_addr; - u32 e_desc_ctrl; - struct iop3xx_aau_e_desc_ctrl e_desc_ctrl_field; - u32 data_multiplier; - struct iop3xx_aau_gfmr data_mult_field; - u32 reserved; - } src_edc_gfmr[19]; -}; - -struct iop3xx_desc_dual_xor { - u32 next_desc; - u32 src0_addr; - u32 src1_addr; - u32 h_src_addr; - u32 d_src_addr; - u32 h_dest_addr; - u32 byte_count; - union { - u32 desc_ctrl; - struct iop3xx_aau_desc_ctrl desc_ctrl_field; - }; - u32 d_dest_addr; -}; - -union iop3xx_desc { - struct iop3xx_desc_aau *aau; - struct iop3xx_desc_dma *dma; - struct iop3xx_desc_pq_xor *pq_xor; - struct iop3xx_desc_dual_xor *dual_xor; - void *ptr; -}; - -static inline int iop_adma_get_max_xor(void) -{ - return 32; -} - -static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) -{ - int id = chan->device->id; - - switch (id) { - case DMA0_ID: - case DMA1_ID: - return __raw_readl(DMA_DAR(chan)); - case AAU_ID: - return __raw_readl(AAU_ADAR(chan)); - default: - BUG(); - } - return 0; -} - -static inline void iop_chan_set_next_descriptor(struct iop_adma_chan *chan, - u32 next_desc_addr) -{ - int id = chan->device->id; - - switch (id) { - case DMA0_ID: - case DMA1_ID: - __raw_writel(next_desc_addr, DMA_NDAR(chan)); - break; - case AAU_ID: - __raw_writel(next_desc_addr, AAU_ANDAR(chan)); - break; - } - -} - -#define IOP_ADMA_STATUS_BUSY (1 << 10) -#define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT (1024) -#define IOP_ADMA_XOR_MAX_BYTE_COUNT (16 * 1024 * 1024) -#define IOP_ADMA_MAX_BYTE_COUNT (16 * 1024 * 1024) - -static inline int iop_chan_is_busy(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(DMA_CSR(chan)); - return (status & IOP_ADMA_STATUS_BUSY) ? 1 : 0; -} - -static inline int iop_desc_is_aligned(struct iop_adma_desc_slot *desc, - int num_slots) -{ - /* num_slots will only ever be 1, 2, 4, or 8 */ - return (desc->idx & (num_slots - 1)) ? 0 : 1; -} - -/* to do: support large (i.e. > hw max) buffer sizes */ -static inline int iop_chan_memcpy_slot_count(size_t len, int *slots_per_op) -{ - *slots_per_op = 1; - return 1; -} - -/* to do: support large (i.e. > hw max) buffer sizes */ -static inline int iop_chan_memset_slot_count(size_t len, int *slots_per_op) -{ - *slots_per_op = 1; - return 1; -} - -static inline int iop3xx_aau_xor_slot_count(size_t len, int src_cnt, - int *slots_per_op) -{ - static const char slot_count_table[] = { - 1, 1, 1, 1, /* 01 - 04 */ - 2, 2, 2, 2, /* 05 - 08 */ - 4, 4, 4, 4, /* 09 - 12 */ - 4, 4, 4, 4, /* 13 - 16 */ - 8, 8, 8, 8, /* 17 - 20 */ - 8, 8, 8, 8, /* 21 - 24 */ - 8, 8, 8, 8, /* 25 - 28 */ - 8, 8, 8, 8, /* 29 - 32 */ - }; - *slots_per_op = slot_count_table[src_cnt - 1]; - return *slots_per_op; -} - -static inline int -iop_chan_interrupt_slot_count(int *slots_per_op, struct iop_adma_chan *chan) -{ - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return iop_chan_memcpy_slot_count(0, slots_per_op); - case AAU_ID: - return iop3xx_aau_xor_slot_count(0, 2, slots_per_op); - default: - BUG(); - } - return 0; -} - -static inline int iop_chan_xor_slot_count(size_t len, int src_cnt, - int *slots_per_op) -{ - int slot_cnt = iop3xx_aau_xor_slot_count(len, src_cnt, slots_per_op); - - if (len <= IOP_ADMA_XOR_MAX_BYTE_COUNT) - return slot_cnt; - - len -= IOP_ADMA_XOR_MAX_BYTE_COUNT; - while (len > IOP_ADMA_XOR_MAX_BYTE_COUNT) { - len -= IOP_ADMA_XOR_MAX_BYTE_COUNT; - slot_cnt += *slots_per_op; - } - - if (len) - slot_cnt += *slots_per_op; - - return slot_cnt; -} - -/* zero sum on iop3xx is limited to 1k at a time so it requires multiple - * descriptors - */ -static inline int iop_chan_zero_sum_slot_count(size_t len, int src_cnt, - int *slots_per_op) -{ - int slot_cnt = iop3xx_aau_xor_slot_count(len, src_cnt, slots_per_op); - - if (len <= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) - return slot_cnt; - - len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - while (len > IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) { - len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - slot_cnt += *slots_per_op; - } - - if (len) - slot_cnt += *slots_per_op; - - return slot_cnt; -} - -static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return hw_desc.dma->dest_addr; - case AAU_ID: - return hw_desc.aau->dest_addr; - default: - BUG(); - } - return 0; -} - -static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return hw_desc.dma->byte_count; - case AAU_ID: - return hw_desc.aau->byte_count; - default: - BUG(); - } - return 0; -} - -/* translate the src_idx to a descriptor word index */ -static inline int __desc_idx(int src_idx) -{ - static const int desc_idx_table[] = { 0, 0, 0, 0, - 0, 1, 2, 3, - 5, 6, 7, 8, - 9, 10, 11, 12, - 14, 15, 16, 17, - 18, 19, 20, 21, - 23, 24, 25, 26, - 27, 28, 29, 30, - }; - - return desc_idx_table[src_idx]; -} - -static inline u32 iop_desc_get_src_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - int src_idx) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return hw_desc.dma->src_addr; - case AAU_ID: - break; - default: - BUG(); - } - - if (src_idx < 4) - return hw_desc.aau->src[src_idx]; - else - return hw_desc.aau->src_edc[__desc_idx(src_idx)].src_addr; -} - -static inline void iop3xx_aau_desc_set_src_addr(struct iop3xx_desc_aau *hw_desc, - int src_idx, dma_addr_t addr) -{ - if (src_idx < 4) - hw_desc->src[src_idx] = addr; - else - hw_desc->src_edc[__desc_idx(src_idx)].src_addr = addr; -} - -static inline void -iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags) -{ - struct iop3xx_desc_dma *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop3xx_dma_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.mem_to_mem_en = 1; - u_desc_ctrl.field.pci_transaction = 0xe; /* memory read block */ - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - hw_desc->upper_pci_src_addr = 0; - hw_desc->crc_addr = 0; -} - -static inline void -iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags) -{ - struct iop3xx_desc_aau *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop3xx_aau_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.blk1_cmd_ctrl = 0x2; /* memory block fill */ - u_desc_ctrl.field.dest_write_en = 1; - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; -} - -static inline u32 -iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, - unsigned long flags) -{ - int i, shift; - u32 edcr; - union { - u32 value; - struct iop3xx_aau_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - switch (src_cnt) { - case 25 ... 32: - u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */ - edcr = 0; - shift = 1; - for (i = 24; i < src_cnt; i++) { - edcr |= (1 << shift); - shift += 3; - } - hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = edcr; - src_cnt = 24; - /* fall through */ - case 17 ... 24: - if (!u_desc_ctrl.field.blk_ctrl) { - hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0; - u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */ - } - edcr = 0; - shift = 1; - for (i = 16; i < src_cnt; i++) { - edcr |= (1 << shift); - shift += 3; - } - hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = edcr; - src_cnt = 16; - /* fall through */ - case 9 ... 16: - if (!u_desc_ctrl.field.blk_ctrl) - u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */ - edcr = 0; - shift = 1; - for (i = 8; i < src_cnt; i++) { - edcr |= (1 << shift); - shift += 3; - } - hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = edcr; - src_cnt = 8; - /* fall through */ - case 2 ... 8: - shift = 1; - for (i = 0; i < src_cnt; i++) { - u_desc_ctrl.value |= (1 << shift); - shift += 3; - } - - if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4) - u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */ - } - - u_desc_ctrl.field.dest_write_en = 1; - u_desc_ctrl.field.blk1_cmd_ctrl = 0x7; /* direct fill */ - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - - return u_desc_ctrl.value; -} - -static inline void -iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, - unsigned long flags) -{ - iop3xx_desc_init_xor(desc->hw_desc, src_cnt, flags); -} - -/* return the number of operations */ -static inline int -iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, - unsigned long flags) -{ - int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; - struct iop3xx_desc_aau *hw_desc, *prev_hw_desc, *iter; - union { - u32 value; - struct iop3xx_aau_desc_ctrl field; - } u_desc_ctrl; - int i, j; - - hw_desc = desc->hw_desc; - - for (i = 0, j = 0; (slot_cnt -= slots_per_op) >= 0; - i += slots_per_op, j++) { - iter = iop_hw_desc_slot_idx(hw_desc, i); - u_desc_ctrl.value = iop3xx_desc_init_xor(iter, src_cnt, flags); - u_desc_ctrl.field.dest_write_en = 0; - u_desc_ctrl.field.zero_result_en = 1; - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - iter->desc_ctrl = u_desc_ctrl.value; - - /* for the subsequent descriptors preserve the store queue - * and chain them together - */ - if (i) { - prev_hw_desc = - iop_hw_desc_slot_idx(hw_desc, i - slots_per_op); - prev_hw_desc->next_desc = - (u32) (desc->async_tx.phys + (i << 5)); - } - } - - return j; -} - -static inline void -iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, - unsigned long flags) -{ - struct iop3xx_desc_aau *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop3xx_aau_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - switch (src_cnt) { - case 25 ... 32: - u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */ - hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0; - /* fall through */ - case 17 ... 24: - if (!u_desc_ctrl.field.blk_ctrl) { - hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0; - u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */ - } - hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = 0; - /* fall through */ - case 9 ... 16: - if (!u_desc_ctrl.field.blk_ctrl) - u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */ - hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = 0; - /* fall through */ - case 1 ... 8: - if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4) - u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */ - } - - u_desc_ctrl.field.dest_write_en = 0; - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; -} - -static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - u32 byte_count) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - hw_desc.dma->byte_count = byte_count; - break; - case AAU_ID: - hw_desc.aau->byte_count = byte_count; - break; - default: - BUG(); - } -} - -static inline void -iop_desc_init_interrupt(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - iop_desc_init_memcpy(desc, 1); - hw_desc.dma->byte_count = 0; - hw_desc.dma->dest_addr = 0; - hw_desc.dma->src_addr = 0; - break; - case AAU_ID: - iop_desc_init_null_xor(desc, 2, 1); - hw_desc.aau->byte_count = 0; - hw_desc.aau->dest_addr = 0; - hw_desc.aau->src[0] = 0; - hw_desc.aau->src[1] = 0; - break; - default: - BUG(); - } -} - -static inline void -iop_desc_set_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len) -{ - int slots_per_op = desc->slots_per_op; - struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter; - int i = 0; - - if (len <= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) { - hw_desc->byte_count = len; - } else { - do { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iter->byte_count = IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - i += slots_per_op; - } while (len > IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT); - - if (len) { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iter->byte_count = len; - } - } -} - -static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - dma_addr_t addr) -{ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - hw_desc.dma->dest_addr = addr; - break; - case AAU_ID: - hw_desc.aau->dest_addr = addr; - break; - default: - BUG(); - } -} - -static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc, - dma_addr_t addr) -{ - struct iop3xx_desc_dma *hw_desc = desc->hw_desc; - hw_desc->src_addr = addr; -} - -static inline void -iop_desc_set_zero_sum_src_addr(struct iop_adma_desc_slot *desc, int src_idx, - dma_addr_t addr) -{ - - struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter; - int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; - int i; - - for (i = 0; (slot_cnt -= slots_per_op) >= 0; - i += slots_per_op, addr += IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iop3xx_aau_desc_set_src_addr(iter, src_idx, addr); - } -} - -static inline void iop_desc_set_xor_src_addr(struct iop_adma_desc_slot *desc, - int src_idx, dma_addr_t addr) -{ - - struct iop3xx_desc_aau *hw_desc = desc->hw_desc, *iter; - int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; - int i; - - for (i = 0; (slot_cnt -= slots_per_op) >= 0; - i += slots_per_op, addr += IOP_ADMA_XOR_MAX_BYTE_COUNT) { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iop3xx_aau_desc_set_src_addr(iter, src_idx, addr); - } -} - -static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, - u32 next_desc_addr) -{ - /* hw_desc->next_desc is the same location for all channels */ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - BUG_ON(hw_desc.dma->next_desc); - hw_desc.dma->next_desc = next_desc_addr; -} - -static inline u32 iop_desc_get_next_desc(struct iop_adma_desc_slot *desc) -{ - /* hw_desc->next_desc is the same location for all channels */ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - return hw_desc.dma->next_desc; -} - -static inline void iop_desc_clear_next_desc(struct iop_adma_desc_slot *desc) -{ - /* hw_desc->next_desc is the same location for all channels */ - union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - hw_desc.dma->next_desc = 0; -} - -static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc, - u32 val) -{ - struct iop3xx_desc_aau *hw_desc = desc->hw_desc; - hw_desc->src[0] = val; -} - -static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc) -{ - struct iop3xx_desc_aau *hw_desc = desc->hw_desc; - struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field; - - BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en)); - return desc_ctrl.zero_result_err; -} - -static inline void iop_chan_append(struct iop_adma_chan *chan) -{ - u32 dma_chan_ctrl; - - dma_chan_ctrl = __raw_readl(DMA_CCR(chan)); - dma_chan_ctrl |= 0x2; - __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); -} - -static inline u32 iop_chan_get_status(struct iop_adma_chan *chan) -{ - return __raw_readl(DMA_CSR(chan)); -} - -static inline void iop_chan_disable(struct iop_adma_chan *chan) -{ - u32 dma_chan_ctrl = __raw_readl(DMA_CCR(chan)); - dma_chan_ctrl &= ~1; - __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); -} - -static inline void iop_chan_enable(struct iop_adma_chan *chan) -{ - u32 dma_chan_ctrl = __raw_readl(DMA_CCR(chan)); - - dma_chan_ctrl |= 1; - __raw_writel(dma_chan_ctrl, DMA_CCR(chan)); -} - -static inline void iop_adma_device_clear_eot_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(DMA_CSR(chan)); - status &= (1 << 9); - __raw_writel(status, DMA_CSR(chan)); -} - -static inline void iop_adma_device_clear_eoc_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(DMA_CSR(chan)); - status &= (1 << 8); - __raw_writel(status, DMA_CSR(chan)); -} - -static inline void iop_adma_device_clear_err_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(DMA_CSR(chan)); - - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - status &= (1 << 5) | (1 << 3) | (1 << 2) | (1 << 1); - break; - case AAU_ID: - status &= (1 << 5); - break; - default: - BUG(); - } - - __raw_writel(status, DMA_CSR(chan)); -} - -static inline int -iop_is_err_int_parity(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -static inline int -iop_is_err_mcu_abort(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -static inline int -iop_is_err_int_tabort(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -static inline int -iop_is_err_int_mabort(unsigned long status, struct iop_adma_chan *chan) -{ - return test_bit(5, &status); -} - -static inline int -iop_is_err_pci_tabort(unsigned long status, struct iop_adma_chan *chan) -{ - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return test_bit(2, &status); - default: - return 0; - } -} - -static inline int -iop_is_err_pci_mabort(unsigned long status, struct iop_adma_chan *chan) -{ - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return test_bit(3, &status); - default: - return 0; - } -} - -static inline int -iop_is_err_split_tx(unsigned long status, struct iop_adma_chan *chan) -{ - switch (chan->device->id) { - case DMA0_ID: - case DMA1_ID: - return test_bit(1, &status); - default: - return 0; - } -} -#endif /* _ADMA_H */ diff --git a/include/asm-arm/hardware/iop3xx-gpio.h b/include/asm-arm/hardware/iop3xx-gpio.h deleted file mode 100644 index 0c9331f..0000000 --- a/include/asm-arm/hardware/iop3xx-gpio.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * linux/include/asm-arm/hardware/iop3xx-gpio.h - * - * IOP3xx GPIO wrappers - * - * Copyright (c) 2008 Arnaud Patard - * Based on IXP4XX gpio.h file - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARM_HARDWARE_IOP3XX_GPIO_H -#define __ASM_ARM_HARDWARE_IOP3XX_GPIO_H - -#include -#include - -#define IOP3XX_N_GPIOS 8 - -static inline int gpio_get_value(unsigned gpio) -{ - if (gpio > IOP3XX_N_GPIOS) - return __gpio_get_value(gpio); - - return gpio_line_get(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (gpio > IOP3XX_N_GPIOS) { - __gpio_set_value(gpio, value); - return; - } - gpio_line_set(gpio, value); -} - -static inline int gpio_cansleep(unsigned gpio) -{ - if (gpio < IOP3XX_N_GPIOS) - return 0; - else - return __gpio_cansleep(gpio); -} - -/* - * The GPIOs are not generating any interrupt - * Note : manuals are not clear about this - */ -static inline int gpio_to_irq(int gpio) -{ - return -EINVAL; -} - -static inline int irq_to_gpio(int gpio) -{ - return -EINVAL; -} - -#endif - diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h deleted file mode 100644 index 18f6937..0000000 --- a/include/asm-arm/hardware/iop3xx.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - * include/asm-arm/hardware/iop3xx.h - * - * Intel IOP32X and IOP33X register definitions - * - * Author: Rory Bolt - * Copyright (C) 2002 Rory Bolt - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IOP3XX_H -#define __IOP3XX_H - -/* - * IOP3XX GPIO handling - */ -#define GPIO_IN 0 -#define GPIO_OUT 1 -#define GPIO_LOW 0 -#define GPIO_HIGH 1 -#define IOP3XX_GPIO_LINE(x) (x) - -#ifndef __ASSEMBLY__ -extern void gpio_line_config(int line, int direction); -extern int gpio_line_get(int line); -extern void gpio_line_set(int line, int value); -extern int init_atu; -extern int iop3xx_get_init_atu(void); -#endif - - -/* - * IOP3XX processor registers - */ -#define IOP3XX_PERIPHERAL_PHYS_BASE 0xffffe000 -#define IOP3XX_PERIPHERAL_VIRT_BASE 0xfeffe000 -#define IOP3XX_PERIPHERAL_SIZE 0x00002000 -#define IOP3XX_PERIPHERAL_UPPER_PA (IOP3XX_PERIPHERAL_PHYS_BASE +\ - IOP3XX_PERIPHERAL_SIZE - 1) -#define IOP3XX_PERIPHERAL_UPPER_VA (IOP3XX_PERIPHERAL_VIRT_BASE +\ - IOP3XX_PERIPHERAL_SIZE - 1) -#define IOP3XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) (addr) -\ - (IOP3XX_PERIPHERAL_PHYS_BASE\ - - IOP3XX_PERIPHERAL_VIRT_BASE)) -#define IOP3XX_REG_ADDR(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + (reg)) - -/* Address Translation Unit */ -#define IOP3XX_ATUVID (volatile u16 *)IOP3XX_REG_ADDR(0x0100) -#define IOP3XX_ATUDID (volatile u16 *)IOP3XX_REG_ADDR(0x0102) -#define IOP3XX_ATUCMD (volatile u16 *)IOP3XX_REG_ADDR(0x0104) -#define IOP3XX_ATUSR (volatile u16 *)IOP3XX_REG_ADDR(0x0106) -#define IOP3XX_ATURID (volatile u8 *)IOP3XX_REG_ADDR(0x0108) -#define IOP3XX_ATUCCR (volatile u32 *)IOP3XX_REG_ADDR(0x0109) -#define IOP3XX_ATUCLSR (volatile u8 *)IOP3XX_REG_ADDR(0x010c) -#define IOP3XX_ATULT (volatile u8 *)IOP3XX_REG_ADDR(0x010d) -#define IOP3XX_ATUHTR (volatile u8 *)IOP3XX_REG_ADDR(0x010e) -#define IOP3XX_ATUBIST (volatile u8 *)IOP3XX_REG_ADDR(0x010f) -#define IOP3XX_IABAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0110) -#define IOP3XX_IAUBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0114) -#define IOP3XX_IABAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0118) -#define IOP3XX_IAUBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x011c) -#define IOP3XX_IABAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0120) -#define IOP3XX_IAUBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0124) -#define IOP3XX_ASVIR (volatile u16 *)IOP3XX_REG_ADDR(0x012c) -#define IOP3XX_ASIR (volatile u16 *)IOP3XX_REG_ADDR(0x012e) -#define IOP3XX_ERBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0130) -#define IOP3XX_ATUILR (volatile u8 *)IOP3XX_REG_ADDR(0x013c) -#define IOP3XX_ATUIPR (volatile u8 *)IOP3XX_REG_ADDR(0x013d) -#define IOP3XX_ATUMGNT (volatile u8 *)IOP3XX_REG_ADDR(0x013e) -#define IOP3XX_ATUMLAT (volatile u8 *)IOP3XX_REG_ADDR(0x013f) -#define IOP3XX_IALR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0140) -#define IOP3XX_IATVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0144) -#define IOP3XX_ERLR (volatile u32 *)IOP3XX_REG_ADDR(0x0148) -#define IOP3XX_ERTVR (volatile u32 *)IOP3XX_REG_ADDR(0x014c) -#define IOP3XX_IALR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0150) -#define IOP3XX_IALR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0154) -#define IOP3XX_IATVR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0158) -#define IOP3XX_OIOWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x015c) -#define IOP3XX_OMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0160) -#define IOP3XX_OUMWTVR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0164) -#define IOP3XX_OMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0168) -#define IOP3XX_OUMWTVR1 (volatile u32 *)IOP3XX_REG_ADDR(0x016c) -#define IOP3XX_OUDWTVR (volatile u32 *)IOP3XX_REG_ADDR(0x0178) -#define IOP3XX_ATUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0180) -#define IOP3XX_PCSR (volatile u32 *)IOP3XX_REG_ADDR(0x0184) -#define IOP3XX_ATUISR (volatile u32 *)IOP3XX_REG_ADDR(0x0188) -#define IOP3XX_ATUIMR (volatile u32 *)IOP3XX_REG_ADDR(0x018c) -#define IOP3XX_IABAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0190) -#define IOP3XX_IAUBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0194) -#define IOP3XX_IALR3 (volatile u32 *)IOP3XX_REG_ADDR(0x0198) -#define IOP3XX_IATVR3 (volatile u32 *)IOP3XX_REG_ADDR(0x019c) -#define IOP3XX_OCCAR (volatile u32 *)IOP3XX_REG_ADDR(0x01a4) -#define IOP3XX_OCCDR (volatile u32 *)IOP3XX_REG_ADDR(0x01ac) -#define IOP3XX_PDSCR (volatile u32 *)IOP3XX_REG_ADDR(0x01bc) -#define IOP3XX_PMCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01c0) -#define IOP3XX_PMNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01c1) -#define IOP3XX_APMCR (volatile u16 *)IOP3XX_REG_ADDR(0x01c2) -#define IOP3XX_APMCSR (volatile u16 *)IOP3XX_REG_ADDR(0x01c4) -#define IOP3XX_PCIXCAPID (volatile u8 *)IOP3XX_REG_ADDR(0x01e0) -#define IOP3XX_PCIXNEXT (volatile u8 *)IOP3XX_REG_ADDR(0x01e1) -#define IOP3XX_PCIXCMD (volatile u16 *)IOP3XX_REG_ADDR(0x01e2) -#define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) -#define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) -#define IOP3XX_PCSR_OUT_Q_BUSY (1 << 15) -#define IOP3XX_PCSR_IN_Q_BUSY (1 << 14) -#define IOP3XX_ATUCR_OUT_EN (1 << 1) - -#define IOP3XX_INIT_ATU_DEFAULT 0 -#define IOP3XX_INIT_ATU_DISABLE -1 -#define IOP3XX_INIT_ATU_ENABLE 1 - -/* Messaging Unit */ -#define IOP3XX_IMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0310) -#define IOP3XX_IMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0314) -#define IOP3XX_OMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0318) -#define IOP3XX_OMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x031c) -#define IOP3XX_IDR (volatile u32 *)IOP3XX_REG_ADDR(0x0320) -#define IOP3XX_IISR (volatile u32 *)IOP3XX_REG_ADDR(0x0324) -#define IOP3XX_IIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0328) -#define IOP3XX_ODR (volatile u32 *)IOP3XX_REG_ADDR(0x032c) -#define IOP3XX_OISR (volatile u32 *)IOP3XX_REG_ADDR(0x0330) -#define IOP3XX_OIMR (volatile u32 *)IOP3XX_REG_ADDR(0x0334) -#define IOP3XX_MUCR (volatile u32 *)IOP3XX_REG_ADDR(0x0350) -#define IOP3XX_QBAR (volatile u32 *)IOP3XX_REG_ADDR(0x0354) -#define IOP3XX_IFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0360) -#define IOP3XX_IFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0364) -#define IOP3XX_IPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0368) -#define IOP3XX_IPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x036c) -#define IOP3XX_OFHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0370) -#define IOP3XX_OFTPR (volatile u32 *)IOP3XX_REG_ADDR(0x0374) -#define IOP3XX_OPHPR (volatile u32 *)IOP3XX_REG_ADDR(0x0378) -#define IOP3XX_OPTPR (volatile u32 *)IOP3XX_REG_ADDR(0x037c) -#define IOP3XX_IAR (volatile u32 *)IOP3XX_REG_ADDR(0x0380) - -/* DMA Controller */ -#define IOP3XX_DMA_PHYS_BASE(chan) (IOP3XX_PERIPHERAL_PHYS_BASE + \ - (0x400 + (chan << 6))) -#define IOP3XX_DMA_UPPER_PA(chan) (IOP3XX_DMA_PHYS_BASE(chan) + 0x27) - -/* Peripheral bus interface */ -#define IOP3XX_PBCR (volatile u32 *)IOP3XX_REG_ADDR(0x0680) -#define IOP3XX_PBISR (volatile u32 *)IOP3XX_REG_ADDR(0x0684) -#define IOP3XX_PBBAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0688) -#define IOP3XX_PBLR0 (volatile u32 *)IOP3XX_REG_ADDR(0x068c) -#define IOP3XX_PBBAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0690) -#define IOP3XX_PBLR1 (volatile u32 *)IOP3XX_REG_ADDR(0x0694) -#define IOP3XX_PBBAR2 (volatile u32 *)IOP3XX_REG_ADDR(0x0698) -#define IOP3XX_PBLR2 (volatile u32 *)IOP3XX_REG_ADDR(0x069c) -#define IOP3XX_PBBAR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a0) -#define IOP3XX_PBLR3 (volatile u32 *)IOP3XX_REG_ADDR(0x06a4) -#define IOP3XX_PBBAR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06a8) -#define IOP3XX_PBLR4 (volatile u32 *)IOP3XX_REG_ADDR(0x06ac) -#define IOP3XX_PBBAR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b0) -#define IOP3XX_PBLR5 (volatile u32 *)IOP3XX_REG_ADDR(0x06b4) -#define IOP3XX_PMBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x06c0) -#define IOP3XX_PMBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x06e0) -#define IOP3XX_PMBR2 (volatile u32 *)IOP3XX_REG_ADDR(0x06e4) - -/* Peripheral performance monitoring unit */ -#define IOP3XX_GTMR (volatile u32 *)IOP3XX_REG_ADDR(0x0700) -#define IOP3XX_ESR (volatile u32 *)IOP3XX_REG_ADDR(0x0704) -#define IOP3XX_EMISR (volatile u32 *)IOP3XX_REG_ADDR(0x0708) -#define IOP3XX_GTSR (volatile u32 *)IOP3XX_REG_ADDR(0x0710) -/* PERCR0 DOESN'T EXIST - index from 1! */ -#define IOP3XX_PERCR0 (volatile u32 *)IOP3XX_REG_ADDR(0x0710) - -/* General Purpose I/O */ -#define IOP3XX_GPOE (volatile u32 *)IOP3XX_GPIO_REG(0x0000) -#define IOP3XX_GPID (volatile u32 *)IOP3XX_GPIO_REG(0x0004) -#define IOP3XX_GPOD (volatile u32 *)IOP3XX_GPIO_REG(0x0008) - -/* Timers */ -#define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) -#define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004) -#define IOP3XX_TU_TCR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0008) -#define IOP3XX_TU_TCR1 (volatile u32 *)IOP3XX_TIMER_REG(0x000c) -#define IOP3XX_TU_TRR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0010) -#define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014) -#define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018) -#define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c) -#define IOP_TMR_EN 0x02 -#define IOP_TMR_RELOAD 0x04 -#define IOP_TMR_PRIVILEGED 0x08 -#define IOP_TMR_RATIO_1_1 0x00 - -/* Watchdog timer definitions */ -#define IOP_WDTCR_EN_ARM 0x1e1e1e1e -#define IOP_WDTCR_EN 0xe1e1e1e1 -/* iop3xx does not support stopping the watchdog, so we just re-arm */ -#define IOP_WDTCR_DIS_ARM (IOP_WDTCR_EN_ARM) -#define IOP_WDTCR_DIS (IOP_WDTCR_EN) - -/* Application accelerator unit */ -#define IOP3XX_AAU_PHYS_BASE (IOP3XX_PERIPHERAL_PHYS_BASE + 0x800) -#define IOP3XX_AAU_UPPER_PA (IOP3XX_AAU_PHYS_BASE + 0xa7) - -/* I2C bus interface unit */ -#define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) -#define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) -#define IOP3XX_ISAR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1688) -#define IOP3XX_IDBR0 (volatile u32 *)IOP3XX_REG_ADDR(0x168c) -#define IOP3XX_IBMR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1694) -#define IOP3XX_ICR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a0) -#define IOP3XX_ISR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a4) -#define IOP3XX_ISAR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16a8) -#define IOP3XX_IDBR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16ac) -#define IOP3XX_IBMR1 (volatile u32 *)IOP3XX_REG_ADDR(0x16b4) - - -/* - * IOP3XX I/O and Mem space regions for PCI autoconfiguration - */ -#define IOP3XX_PCI_LOWER_MEM_PA 0x80000000 - -#define IOP3XX_PCI_IO_WINDOW_SIZE 0x00010000 -#define IOP3XX_PCI_LOWER_IO_PA 0x90000000 -#define IOP3XX_PCI_LOWER_IO_VA 0xfe000000 -#define IOP3XX_PCI_LOWER_IO_BA 0x90000000 -#define IOP3XX_PCI_UPPER_IO_PA (IOP3XX_PCI_LOWER_IO_PA +\ - IOP3XX_PCI_IO_WINDOW_SIZE - 1) -#define IOP3XX_PCI_UPPER_IO_VA (IOP3XX_PCI_LOWER_IO_VA +\ - IOP3XX_PCI_IO_WINDOW_SIZE - 1) -#define IOP3XX_PCI_IO_PHYS_TO_VIRT(addr) (((u32) (addr) -\ - IOP3XX_PCI_LOWER_IO_PA) +\ - IOP3XX_PCI_LOWER_IO_VA) - - -#ifndef __ASSEMBLY__ -void iop3xx_map_io(void); -void iop_init_cp6_handler(void); -void iop_init_time(unsigned long tickrate); -unsigned long iop_gettimeoffset(void); - -static inline void write_tmr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (val)); -} - -static inline void write_tmr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (val)); -} - -static inline u32 read_tcr0(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c2, c1, 0" : "=r" (val)); - return val; -} - -static inline u32 read_tcr1(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c3, c1, 0" : "=r" (val)); - return val; -} - -static inline void write_trr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (val)); -} - -static inline void write_trr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val)); -} - -static inline void write_tisr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (val)); -} - -static inline u32 read_wdtcr(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c7, c1, 0":"=r" (val)); - return val; -} -static inline void write_wdtcr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c7, c1, 0"::"r" (val)); -} - -extern unsigned long get_iop_tick_rate(void); - -/* only iop13xx has these registers, we define these to present a - * common register interface for the iop_wdt driver. - */ -#define IOP_RCSR_WDT (0) -static inline u32 read_rcsr(void) -{ - return 0; -} -static inline void write_wdtsr(u32 val) -{ - do { } while (0); -} - -extern struct platform_device iop3xx_dma_0_channel; -extern struct platform_device iop3xx_dma_1_channel; -extern struct platform_device iop3xx_aau_channel; -extern struct platform_device iop3xx_i2c0_device; -extern struct platform_device iop3xx_i2c1_device; - -#endif - - -#endif diff --git a/include/asm-arm/hardware/iop_adma.h b/include/asm-arm/hardware/iop_adma.h deleted file mode 100644 index cb7e361..0000000 --- a/include/asm-arm/hardware/iop_adma.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright © 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - */ -#ifndef IOP_ADMA_H -#define IOP_ADMA_H -#include -#include -#include - -#define IOP_ADMA_SLOT_SIZE 32 -#define IOP_ADMA_THRESHOLD 4 - -/** - * struct iop_adma_device - internal representation of an ADMA device - * @pdev: Platform device - * @id: HW ADMA Device selector - * @dma_desc_pool: base of DMA descriptor region (DMA address) - * @dma_desc_pool_virt: base of DMA descriptor region (CPU address) - * @common: embedded struct dma_device - */ -struct iop_adma_device { - struct platform_device *pdev; - int id; - dma_addr_t dma_desc_pool; - void *dma_desc_pool_virt; - struct dma_device common; -}; - -/** - * struct iop_adma_chan - internal representation of an ADMA device - * @pending: allows batching of hardware operations - * @completed_cookie: identifier for the most recently completed operation - * @lock: serializes enqueue/dequeue operations to the slot pool - * @mmr_base: memory mapped register base - * @chain: device chain view of the descriptors - * @device: parent device - * @common: common dmaengine channel object members - * @last_used: place holder for allocation to continue from where it left off - * @all_slots: complete domain of slots usable by the channel - * @slots_allocated: records the actual size of the descriptor slot pool - * @irq_tasklet: bottom half where iop_adma_slot_cleanup runs - */ -struct iop_adma_chan { - int pending; - dma_cookie_t completed_cookie; - spinlock_t lock; /* protects the descriptor slot pool */ - void __iomem *mmr_base; - struct list_head chain; - struct iop_adma_device *device; - struct dma_chan common; - struct iop_adma_desc_slot *last_used; - struct list_head all_slots; - int slots_allocated; - struct tasklet_struct irq_tasklet; -}; - -/** - * struct iop_adma_desc_slot - IOP-ADMA software descriptor - * @slot_node: node on the iop_adma_chan.all_slots list - * @chain_node: node on the op_adma_chan.chain list - * @hw_desc: virtual address of the hardware descriptor chain - * @phys: hardware address of the hardware descriptor chain - * @group_head: first operation in a transaction - * @slot_cnt: total slots used in an transaction (group of operations) - * @slots_per_op: number of slots per operation - * @idx: pool index - * @unmap_src_cnt: number of xor sources - * @unmap_len: transaction bytecount - * @async_tx: support for the async_tx api - * @group_list: list of slots that make up a multi-descriptor transaction - * for example transfer lengths larger than the supported hw max - * @xor_check_result: result of zero sum - * @crc32_result: result crc calculation - */ -struct iop_adma_desc_slot { - struct list_head slot_node; - struct list_head chain_node; - void *hw_desc; - struct iop_adma_desc_slot *group_head; - u16 slot_cnt; - u16 slots_per_op; - u16 idx; - u16 unmap_src_cnt; - size_t unmap_len; - struct dma_async_tx_descriptor async_tx; - union { - u32 *xor_check_result; - u32 *crc32_result; - }; -}; - -struct iop_adma_platform_data { - int hw_id; - dma_cap_mask_t cap_mask; - size_t pool_size; -}; - -#define to_iop_sw_desc(addr_hw_desc) \ - container_of(addr_hw_desc, struct iop_adma_desc_slot, hw_desc) -#define iop_hw_desc_slot_idx(hw_desc, idx) \ - ( (void *) (((unsigned long) hw_desc) + ((idx) << 5)) ) -#endif diff --git a/include/asm-arm/hardware/it8152.h b/include/asm-arm/hardware/it8152.h deleted file mode 100644 index 74b5fff..0000000 --- a/include/asm-arm/hardware/it8152.h +++ /dev/null @@ -1,99 +0,0 @@ -/* - * linux/include/arm/hardware/it8152.h - * - * Copyright Compulab Ltd., 2006,2007 - * Mike Rapoport - * - * ITE 8152 companion chip register definitions - */ - -#ifndef __ASM_HARDWARE_IT8152_H -#define __ASM_HARDWARE_IT8152_H -extern unsigned long it8152_base_address; - -#define IT8152_IO_BASE (it8152_base_address + 0x03e00000) -#define IT8152_CFGREG_BASE (it8152_base_address + 0x03f00000) - -#define __REG_IT8152(x) (it8152_base_address + (x)) - -#define IT8152_PCI_CFG_ADDR __REG_IT8152(0x3f00800) -#define IT8152_PCI_CFG_DATA __REG_IT8152(0x3f00804) - -#define IT8152_INTC_LDCNIRR __REG_IT8152(0x3f00300) -#define IT8152_INTC_LDPNIRR __REG_IT8152(0x3f00304) -#define IT8152_INTC_LDCNIMR __REG_IT8152(0x3f00308) -#define IT8152_INTC_LDPNIMR __REG_IT8152(0x3f0030C) -#define IT8152_INTC_LDNITR __REG_IT8152(0x3f00310) -#define IT8152_INTC_LDNIAR __REG_IT8152(0x3f00314) -#define IT8152_INTC_LPCNIRR __REG_IT8152(0x3f00320) -#define IT8152_INTC_LPPNIRR __REG_IT8152(0x3f00324) -#define IT8152_INTC_LPCNIMR __REG_IT8152(0x3f00328) -#define IT8152_INTC_LPPNIMR __REG_IT8152(0x3f0032C) -#define IT8152_INTC_LPNITR __REG_IT8152(0x3f00330) -#define IT8152_INTC_LPNIAR __REG_IT8152(0x3f00334) -#define IT8152_INTC_PDCNIRR __REG_IT8152(0x3f00340) -#define IT8152_INTC_PDPNIRR __REG_IT8152(0x3f00344) -#define IT8152_INTC_PDCNIMR __REG_IT8152(0x3f00348) -#define IT8152_INTC_PDPNIMR __REG_IT8152(0x3f0034C) -#define IT8152_INTC_PDNITR __REG_IT8152(0x3f00350) -#define IT8152_INTC_PDNIAR __REG_IT8152(0x3f00354) -#define IT8152_INTC_INTC_TYPER __REG_IT8152(0x3f003FC) - -#define IT8152_GPIO_GPDR __REG_IT8152(0x3f00500) - -/* - Interrupt controller per register summary: - --------------------------------------- - LCDNIRR: - IT8152_LD_IRQ(8) PCICLK stop - IT8152_LD_IRQ(7) MCLK ready - IT8152_LD_IRQ(6) s/w - IT8152_LD_IRQ(5) UART - IT8152_LD_IRQ(4) GPIO - IT8152_LD_IRQ(3) TIMER 4 - IT8152_LD_IRQ(2) TIMER 3 - IT8152_LD_IRQ(1) TIMER 2 - IT8152_LD_IRQ(0) TIMER 1 - - LPCNIRR: - IT8152_LP_IRQ(x) serial IRQ x - - PCIDNIRR: - IT8152_PD_IRQ(14) PCISERR - IT8152_PD_IRQ(13) CPU/PCI bridge target abort (h2pTADR) - IT8152_PD_IRQ(12) CPU/PCI bridge master abort (h2pMADR) - IT8152_PD_IRQ(11) PCI INTD - IT8152_PD_IRQ(10) PCI INTC - IT8152_PD_IRQ(9) PCI INTB - IT8152_PD_IRQ(8) PCI INTA - IT8152_PD_IRQ(7) serial INTD - IT8152_PD_IRQ(6) serial INTC - IT8152_PD_IRQ(5) serial INTB - IT8152_PD_IRQ(4) serial INTA - IT8152_PD_IRQ(3) serial IRQ IOCHK (IOCHKR) - IT8152_PD_IRQ(2) chaining DMA (CDMAR) - IT8152_PD_IRQ(1) USB (USBR) - IT8152_PD_IRQ(0) Audio controller (ACR) - */ -/* frequently used interrupts */ -#define IT8152_PCISERR IT8152_PD_IRQ(14) -#define IT8152_H2PTADR IT8152_PD_IRQ(13) -#define IT8152_H2PMAR IT8152_PD_IRQ(12) -#define IT8152_PCI_INTD IT8152_PD_IRQ(11) -#define IT8152_PCI_INTC IT8152_PD_IRQ(10) -#define IT8152_PCI_INTB IT8152_PD_IRQ(9) -#define IT8152_PCI_INTA IT8152_PD_IRQ(8) -#define IT8152_CDMA_INT IT8152_PD_IRQ(2) -#define IT8152_USB_INT IT8152_PD_IRQ(1) -#define IT8152_AUDIO_INT IT8152_PD_IRQ(0) - -struct pci_dev; -struct pci_sys_data; - -extern void it8152_irq_demux(unsigned int irq, struct irq_desc *desc); -extern void it8152_init_irq(void); -extern int it8152_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin); -extern int it8152_pci_setup(int nr, struct pci_sys_data *sys); -extern struct pci_bus *it8152_pci_scan_bus(int nr, struct pci_sys_data *sys); - -#endif /* __ASM_HARDWARE_IT8152_H */ diff --git a/include/asm-arm/hardware/linkup-l1110.h b/include/asm-arm/hardware/linkup-l1110.h deleted file mode 100644 index 7ec9116..0000000 --- a/include/asm-arm/hardware/linkup-l1110.h +++ /dev/null @@ -1,48 +0,0 @@ -/* -* -* Definitions for H3600 Handheld Computer -* -* Copyright 2001 Compaq Computer Corporation. -* -* Use consistent with the GNU GPL is permitted, -* provided that this copyright notice is -* preserved in its entirety in all copies and derived works. -* -* COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, -* AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS -* FITNESS FOR ANY PARTICULAR PURPOSE. -* -* Author: Jamey Hicks. -* -*/ - -/* LinkUp Systems PCCard/CompactFlash Interface for SA-1100 */ - -/* PC Card Status Register */ -#define LINKUP_PRS_S1 (1 << 0) /* voltage control bits S1-S4 */ -#define LINKUP_PRS_S2 (1 << 1) -#define LINKUP_PRS_S3 (1 << 2) -#define LINKUP_PRS_S4 (1 << 3) -#define LINKUP_PRS_BVD1 (1 << 4) -#define LINKUP_PRS_BVD2 (1 << 5) -#define LINKUP_PRS_VS1 (1 << 6) -#define LINKUP_PRS_VS2 (1 << 7) -#define LINKUP_PRS_RDY (1 << 8) -#define LINKUP_PRS_CD1 (1 << 9) -#define LINKUP_PRS_CD2 (1 << 10) - -/* PC Card Command Register */ -#define LINKUP_PRC_S1 (1 << 0) -#define LINKUP_PRC_S2 (1 << 1) -#define LINKUP_PRC_S3 (1 << 2) -#define LINKUP_PRC_S4 (1 << 3) -#define LINKUP_PRC_RESET (1 << 4) -#define LINKUP_PRC_APOE (1 << 5) /* Auto Power Off Enable: clears S1-S4 when either nCD goes high */ -#define LINKUP_PRC_CFE (1 << 6) /* CompactFlash mode Enable: addresses A[10:0] only, A[25:11] high */ -#define LINKUP_PRC_SOE (1 << 7) /* signal output driver enable */ -#define LINKUP_PRC_SSP (1 << 8) /* sock select polarity: 0 for socket 0, 1 for socket 1 */ -#define LINKUP_PRC_MBZ (1 << 15) /* must be zero */ - -struct linkup_l1110 { - volatile short prc; -}; diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h deleted file mode 100644 index fb0645d..0000000 --- a/include/asm-arm/hardware/locomo.h +++ /dev/null @@ -1,217 +0,0 @@ -/* - * linux/include/asm-arm/hardware/locomo.h - * - * This file contains the definitions for the LoCoMo G/A Chip - * - * (C) Copyright 2004 John Lenz - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Based on sa1111.h - */ -#ifndef _ASM_ARCH_LOCOMO -#define _ASM_ARCH_LOCOMO - -#define locomo_writel(val,addr) ({ *(volatile u16 *)(addr) = (val); }) -#define locomo_readl(addr) (*(volatile u16 *)(addr)) - -/* LOCOMO version */ -#define LOCOMO_VER 0x00 - -/* Pin status */ -#define LOCOMO_ST 0x04 - -/* Pin status */ -#define LOCOMO_C32K 0x08 - -/* Interrupt controller */ -#define LOCOMO_ICR 0x0C - -/* MCS decoder for boot selecting */ -#define LOCOMO_MCSX0 0x10 -#define LOCOMO_MCSX1 0x14 -#define LOCOMO_MCSX2 0x18 -#define LOCOMO_MCSX3 0x1c - -/* Touch panel controller */ -#define LOCOMO_ASD 0x20 /* AD start delay */ -#define LOCOMO_HSD 0x28 /* HSYS delay */ -#define LOCOMO_HSC 0x2c /* HSYS period */ -#define LOCOMO_TADC 0x30 /* tablet ADC clock */ - - -/* Long time timer */ -#define LOCOMO_LTC 0xd8 /* LTC interrupt setting */ -#define LOCOMO_LTINT 0xdc /* LTC interrupt */ - -/* DAC control signal for LCD (COMADJ ) */ -#define LOCOMO_DAC 0xe0 -/* DAC control */ -#define LOCOMO_DAC_SCLOEB 0x08 /* SCL pin output data */ -#define LOCOMO_DAC_TEST 0x04 /* Test bit */ -#define LOCOMO_DAC_SDA 0x02 /* SDA pin level (read-only) */ -#define LOCOMO_DAC_SDAOEB 0x01 /* SDA pin output data */ - -/* SPI interface */ -#define LOCOMO_SPI 0x60 -#define LOCOMO_SPIMD 0x00 /* SPI mode setting */ -#define LOCOMO_SPICT 0x04 /* SPI mode control */ -#define LOCOMO_SPIST 0x08 /* SPI status */ -#define LOCOMO_SPI_TEND (1 << 3) /* Transfer end bit */ -#define LOCOMO_SPI_REND (1 << 2) /* Receive end bit */ -#define LOCOMO_SPI_RFW (1 << 1) /* write buffer bit */ -#define LOCOMO_SPI_RFR (1) /* read buffer bit */ - -#define LOCOMO_SPIIS 0x10 /* SPI interrupt status */ -#define LOCOMO_SPIWE 0x14 /* SPI interrupt status write enable */ -#define LOCOMO_SPIIE 0x18 /* SPI interrupt enable */ -#define LOCOMO_SPIIR 0x1c /* SPI interrupt request */ -#define LOCOMO_SPITD 0x20 /* SPI transfer data write */ -#define LOCOMO_SPIRD 0x24 /* SPI receive data read */ -#define LOCOMO_SPITS 0x28 /* SPI transfer data shift */ -#define LOCOMO_SPIRS 0x2C /* SPI receive data shift */ - -/* GPIO */ -#define LOCOMO_GPD 0x90 /* GPIO direction */ -#define LOCOMO_GPE 0x94 /* GPIO input enable */ -#define LOCOMO_GPL 0x98 /* GPIO level */ -#define LOCOMO_GPO 0x9c /* GPIO out data setting */ -#define LOCOMO_GRIE 0xa0 /* GPIO rise detection */ -#define LOCOMO_GFIE 0xa4 /* GPIO fall detection */ -#define LOCOMO_GIS 0xa8 /* GPIO edge detection status */ -#define LOCOMO_GWE 0xac /* GPIO status write enable */ -#define LOCOMO_GIE 0xb0 /* GPIO interrupt enable */ -#define LOCOMO_GIR 0xb4 /* GPIO interrupt request */ -#define LOCOMO_GPIO(Nb) (0x01 << (Nb)) -#define LOCOMO_GPIO_RTS LOCOMO_GPIO(0) -#define LOCOMO_GPIO_CTS LOCOMO_GPIO(1) -#define LOCOMO_GPIO_DSR LOCOMO_GPIO(2) -#define LOCOMO_GPIO_DTR LOCOMO_GPIO(3) -#define LOCOMO_GPIO_LCD_VSHA_ON LOCOMO_GPIO(4) -#define LOCOMO_GPIO_LCD_VSHD_ON LOCOMO_GPIO(5) -#define LOCOMO_GPIO_LCD_VEE_ON LOCOMO_GPIO(6) -#define LOCOMO_GPIO_LCD_MOD LOCOMO_GPIO(7) -#define LOCOMO_GPIO_DAC_ON LOCOMO_GPIO(8) -#define LOCOMO_GPIO_FL_VR LOCOMO_GPIO(9) -#define LOCOMO_GPIO_DAC_SDATA LOCOMO_GPIO(10) -#define LOCOMO_GPIO_DAC_SCK LOCOMO_GPIO(11) -#define LOCOMO_GPIO_DAC_SLOAD LOCOMO_GPIO(12) -#define LOCOMO_GPIO_CARD_DETECT LOCOMO_GPIO(13) -#define LOCOMO_GPIO_WRITE_PROT LOCOMO_GPIO(14) -#define LOCOMO_GPIO_CARD_POWER LOCOMO_GPIO(15) - -/* Start the definitions of the devices. Each device has an initial - * base address and a series of offsets from that base address. */ - -/* Keyboard controller */ -#define LOCOMO_KEYBOARD 0x40 -#define LOCOMO_KIB 0x00 /* KIB level */ -#define LOCOMO_KSC 0x04 /* KSTRB control */ -#define LOCOMO_KCMD 0x08 /* KSTRB command */ -#define LOCOMO_KIC 0x0c /* Key interrupt */ - -/* Front light adjustment controller */ -#define LOCOMO_FRONTLIGHT 0xc8 -#define LOCOMO_ALS 0x00 /* Adjust light cycle */ -#define LOCOMO_ALD 0x04 /* Adjust light duty */ - -#define LOCOMO_ALC_EN 0x8000 - -/* Backlight controller: TFT signal */ -#define LOCOMO_BACKLIGHT 0x38 -#define LOCOMO_TC 0x00 /* TFT control signal */ -#define LOCOMO_CPSD 0x04 /* CPS delay */ - -/* Audio controller */ -#define LOCOMO_AUDIO 0x54 -#define LOCOMO_ACC 0x00 /* Audio clock */ -#define LOCOMO_PAIF 0xD0 /* PCM audio interface */ -/* Audio clock */ -#define LOCOMO_ACC_XON 0x80 -#define LOCOMO_ACC_XEN 0x40 -#define LOCOMO_ACC_XSEL0 0x00 -#define LOCOMO_ACC_XSEL1 0x20 -#define LOCOMO_ACC_MCLKEN 0x10 -#define LOCOMO_ACC_64FSEN 0x08 -#define LOCOMO_ACC_CLKSEL000 0x00 /* mclk 2 */ -#define LOCOMO_ACC_CLKSEL001 0x01 /* mclk 3 */ -#define LOCOMO_ACC_CLKSEL010 0x02 /* mclk 4 */ -#define LOCOMO_ACC_CLKSEL011 0x03 /* mclk 6 */ -#define LOCOMO_ACC_CLKSEL100 0x04 /* mclk 8 */ -#define LOCOMO_ACC_CLKSEL101 0x05 /* mclk 12 */ -/* PCM audio interface */ -#define LOCOMO_PAIF_SCINV 0x20 -#define LOCOMO_PAIF_SCEN 0x10 -#define LOCOMO_PAIF_LRCRST 0x08 -#define LOCOMO_PAIF_LRCEVE 0x04 -#define LOCOMO_PAIF_LRCINV 0x02 -#define LOCOMO_PAIF_LRCEN 0x01 - -/* LED controller */ -#define LOCOMO_LED 0xe8 -#define LOCOMO_LPT0 0x00 -#define LOCOMO_LPT1 0x04 -/* LED control */ -#define LOCOMO_LPT_TOFH 0x80 -#define LOCOMO_LPT_TOFL 0x08 -#define LOCOMO_LPT_TOH(TOH) ((TOH & 0x7) << 4) -#define LOCOMO_LPT_TOL(TOL) ((TOL & 0x7)) - -extern struct bus_type locomo_bus_type; - -#define LOCOMO_DEVID_KEYBOARD 0 -#define LOCOMO_DEVID_FRONTLIGHT 1 -#define LOCOMO_DEVID_BACKLIGHT 2 -#define LOCOMO_DEVID_AUDIO 3 -#define LOCOMO_DEVID_LED 4 -#define LOCOMO_DEVID_UART 5 -#define LOCOMO_DEVID_SPI 6 - -struct locomo_dev { - struct device dev; - unsigned int devid; - unsigned int irq[1]; - - void *mapbase; - unsigned long length; - - u64 dma_mask; -}; - -#define LOCOMO_DEV(_d) container_of((_d), struct locomo_dev, dev) - -#define locomo_get_drvdata(d) dev_get_drvdata(&(d)->dev) -#define locomo_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, p) - -struct locomo_driver { - struct device_driver drv; - unsigned int devid; - int (*probe)(struct locomo_dev *); - int (*remove)(struct locomo_dev *); - int (*suspend)(struct locomo_dev *, pm_message_t); - int (*resume)(struct locomo_dev *); -}; - -#define LOCOMO_DRV(_d) container_of((_d), struct locomo_driver, drv) - -#define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name) - -void locomo_lcd_power(struct locomo_dev *, int, unsigned int); - -int locomo_driver_register(struct locomo_driver *); -void locomo_driver_unregister(struct locomo_driver *); - -/* GPIO control functions */ -void locomo_gpio_set_dir(struct device *dev, unsigned int bits, unsigned int dir); -int locomo_gpio_read_level(struct device *dev, unsigned int bits); -int locomo_gpio_read_output(struct device *dev, unsigned int bits); -void locomo_gpio_write(struct device *dev, unsigned int bits, unsigned int set); - -/* M62332 control function */ -void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel); - -/* Frontlight control */ -void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf); - -#endif diff --git a/include/asm-arm/hardware/memc.h b/include/asm-arm/hardware/memc.h deleted file mode 100644 index 8aef5aa..0000000 --- a/include/asm-arm/hardware/memc.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/hardware/memc.h - * - * Copyright (C) Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VDMA_ALIGNMENT PAGE_SIZE -#define VDMA_XFERSIZE 16 -#define VDMA_INIT 0 -#define VDMA_START 1 -#define VDMA_END 2 - -#ifndef __ASSEMBLY__ -extern void memc_write(unsigned int reg, unsigned long val); - -#define video_set_dma(start,end,offset) \ -do { \ - memc_write (VDMA_START, (start >> 2)); \ - memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2); \ - memc_write (VDMA_INIT, (offset >> 2)); \ -} while (0) - -#endif diff --git a/include/asm-arm/hardware/pci_v3.h b/include/asm-arm/hardware/pci_v3.h deleted file mode 100644 index 4d497bd..0000000 --- a/include/asm-arm/hardware/pci_v3.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * linux/include/asm-arm/hardware/pci_v3.h - * - * Internal header file PCI V3 chip - * - * Copyright (C) ARM Limited - * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef ASM_ARM_HARDWARE_PCI_V3_H -#define ASM_ARM_HARDWARE_PCI_V3_H - -/* ------------------------------------------------------------------------------- - * V3 Local Bus to PCI Bridge definitions - * ------------------------------------------------------------------------------- - * Registers (these are taken from page 129 of the EPC User's Manual Rev 1.04 - * All V3 register names are prefaced by V3_ to avoid clashing with any other - * PCI definitions. Their names match the user's manual. - * - * I'm assuming that I20 is disabled. - * - */ -#define V3_PCI_VENDOR 0x00000000 -#define V3_PCI_DEVICE 0x00000002 -#define V3_PCI_CMD 0x00000004 -#define V3_PCI_STAT 0x00000006 -#define V3_PCI_CC_REV 0x00000008 -#define V3_PCI_HDR_CFG 0x0000000C -#define V3_PCI_IO_BASE 0x00000010 -#define V3_PCI_BASE0 0x00000014 -#define V3_PCI_BASE1 0x00000018 -#define V3_PCI_SUB_VENDOR 0x0000002C -#define V3_PCI_SUB_ID 0x0000002E -#define V3_PCI_ROM 0x00000030 -#define V3_PCI_BPARAM 0x0000003C -#define V3_PCI_MAP0 0x00000040 -#define V3_PCI_MAP1 0x00000044 -#define V3_PCI_INT_STAT 0x00000048 -#define V3_PCI_INT_CFG 0x0000004C -#define V3_LB_BASE0 0x00000054 -#define V3_LB_BASE1 0x00000058 -#define V3_LB_MAP0 0x0000005E -#define V3_LB_MAP1 0x00000062 -#define V3_LB_BASE2 0x00000064 -#define V3_LB_MAP2 0x00000066 -#define V3_LB_SIZE 0x00000068 -#define V3_LB_IO_BASE 0x0000006E -#define V3_FIFO_CFG 0x00000070 -#define V3_FIFO_PRIORITY 0x00000072 -#define V3_FIFO_STAT 0x00000074 -#define V3_LB_ISTAT 0x00000076 -#define V3_LB_IMASK 0x00000077 -#define V3_SYSTEM 0x00000078 -#define V3_LB_CFG 0x0000007A -#define V3_PCI_CFG 0x0000007C -#define V3_DMA_PCI_ADR0 0x00000080 -#define V3_DMA_PCI_ADR1 0x00000090 -#define V3_DMA_LOCAL_ADR0 0x00000084 -#define V3_DMA_LOCAL_ADR1 0x00000094 -#define V3_DMA_LENGTH0 0x00000088 -#define V3_DMA_LENGTH1 0x00000098 -#define V3_DMA_CSR0 0x0000008B -#define V3_DMA_CSR1 0x0000009B -#define V3_DMA_CTLB_ADR0 0x0000008C -#define V3_DMA_CTLB_ADR1 0x0000009C -#define V3_DMA_DELAY 0x000000E0 -#define V3_MAIL_DATA 0x000000C0 -#define V3_PCI_MAIL_IEWR 0x000000D0 -#define V3_PCI_MAIL_IERD 0x000000D2 -#define V3_LB_MAIL_IEWR 0x000000D4 -#define V3_LB_MAIL_IERD 0x000000D6 -#define V3_MAIL_WR_STAT 0x000000D8 -#define V3_MAIL_RD_STAT 0x000000DA -#define V3_QBA_MAP 0x000000DC - -/* PCI COMMAND REGISTER bits - */ -#define V3_COMMAND_M_FBB_EN (1 << 9) -#define V3_COMMAND_M_SERR_EN (1 << 8) -#define V3_COMMAND_M_PAR_EN (1 << 6) -#define V3_COMMAND_M_MASTER_EN (1 << 2) -#define V3_COMMAND_M_MEM_EN (1 << 1) -#define V3_COMMAND_M_IO_EN (1 << 0) - -/* SYSTEM REGISTER bits - */ -#define V3_SYSTEM_M_RST_OUT (1 << 15) -#define V3_SYSTEM_M_LOCK (1 << 14) - -/* PCI_CFG bits - */ -#define V3_PCI_CFG_M_I2O_EN (1 << 15) -#define V3_PCI_CFG_M_IO_REG_DIS (1 << 14) -#define V3_PCI_CFG_M_IO_DIS (1 << 13) -#define V3_PCI_CFG_M_EN3V (1 << 12) -#define V3_PCI_CFG_M_RETRY_EN (1 << 10) -#define V3_PCI_CFG_M_AD_LOW1 (1 << 9) -#define V3_PCI_CFG_M_AD_LOW0 (1 << 8) - -/* PCI_BASE register bits (PCI -> Local Bus) - */ -#define V3_PCI_BASE_M_ADR_BASE 0xFFF00000 -#define V3_PCI_BASE_M_ADR_BASEL 0x000FFF00 -#define V3_PCI_BASE_M_PREFETCH (1 << 3) -#define V3_PCI_BASE_M_TYPE (3 << 1) -#define V3_PCI_BASE_M_IO (1 << 0) - -/* PCI MAP register bits (PCI -> Local bus) - */ -#define V3_PCI_MAP_M_MAP_ADR 0xFFF00000 -#define V3_PCI_MAP_M_RD_POST_INH (1 << 15) -#define V3_PCI_MAP_M_ROM_SIZE (3 << 10) -#define V3_PCI_MAP_M_SWAP (3 << 8) -#define V3_PCI_MAP_M_ADR_SIZE 0x000000F0 -#define V3_PCI_MAP_M_REG_EN (1 << 1) -#define V3_PCI_MAP_M_ENABLE (1 << 0) - -/* - * LB_BASE0,1 register bits (Local bus -> PCI) - */ -#define V3_LB_BASE_ADR_BASE 0xfff00000 -#define V3_LB_BASE_SWAP (3 << 8) -#define V3_LB_BASE_ADR_SIZE (15 << 4) -#define V3_LB_BASE_PREFETCH (1 << 3) -#define V3_LB_BASE_ENABLE (1 << 0) - -#define V3_LB_BASE_ADR_SIZE_1MB (0 << 4) -#define V3_LB_BASE_ADR_SIZE_2MB (1 << 4) -#define V3_LB_BASE_ADR_SIZE_4MB (2 << 4) -#define V3_LB_BASE_ADR_SIZE_8MB (3 << 4) -#define V3_LB_BASE_ADR_SIZE_16MB (4 << 4) -#define V3_LB_BASE_ADR_SIZE_32MB (5 << 4) -#define V3_LB_BASE_ADR_SIZE_64MB (6 << 4) -#define V3_LB_BASE_ADR_SIZE_128MB (7 << 4) -#define V3_LB_BASE_ADR_SIZE_256MB (8 << 4) -#define V3_LB_BASE_ADR_SIZE_512MB (9 << 4) -#define V3_LB_BASE_ADR_SIZE_1GB (10 << 4) -#define V3_LB_BASE_ADR_SIZE_2GB (11 << 4) - -#define v3_addr_to_lb_base(a) ((a) & V3_LB_BASE_ADR_BASE) - -/* - * LB_MAP0,1 register bits (Local bus -> PCI) - */ -#define V3_LB_MAP_MAP_ADR 0xfff0 -#define V3_LB_MAP_TYPE (7 << 1) -#define V3_LB_MAP_AD_LOW_EN (1 << 0) - -#define V3_LB_MAP_TYPE_IACK (0 << 1) -#define V3_LB_MAP_TYPE_IO (1 << 1) -#define V3_LB_MAP_TYPE_MEM (3 << 1) -#define V3_LB_MAP_TYPE_CONFIG (5 << 1) -#define V3_LB_MAP_TYPE_MEM_MULTIPLE (6 << 1) - -#define v3_addr_to_lb_map(a) (((a) >> 16) & V3_LB_MAP_MAP_ADR) - -/* - * LB_BASE2 register bits (Local bus -> PCI IO) - */ -#define V3_LB_BASE2_ADR_BASE 0xff00 -#define V3_LB_BASE2_SWAP (3 << 6) -#define V3_LB_BASE2_ENABLE (1 << 0) - -#define v3_addr_to_lb_base2(a) (((a) >> 16) & V3_LB_BASE2_ADR_BASE) - -/* - * LB_MAP2 register bits (Local bus -> PCI IO) - */ -#define V3_LB_MAP2_MAP_ADR 0xff00 - -#define v3_addr_to_lb_map2(a) (((a) >> 16) & V3_LB_MAP2_MAP_ADR) - -#endif diff --git a/include/asm-arm/hardware/sa1111.h b/include/asm-arm/hardware/sa1111.h deleted file mode 100644 index 61b1d05..0000000 --- a/include/asm-arm/hardware/sa1111.h +++ /dev/null @@ -1,581 +0,0 @@ -/* - * linux/include/asm-arm/hardware/sa1111.h - * - * Copyright (C) 2000 John G Dorsey - * - * This file contains definitions for the SA-1111 Companion Chip. - * (Structure and naming borrowed from SA-1101.h, by Peter Danielsson.) - * - * Macro that calculates real address for registers in the SA-1111 - */ - -#ifndef _ASM_ARCH_SA1111 -#define _ASM_ARCH_SA1111 - -#include - -/* - * The SA1111 is always located at virtual 0xf4000000, and is always - * "native" endian. - */ - -#define SA1111_VBASE 0xf4000000 - -/* Don't use these! */ -#define SA1111_p2v( x ) ((x) - SA1111_BASE + SA1111_VBASE) -#define SA1111_v2p( x ) ((x) - SA1111_VBASE + SA1111_BASE) - -#ifndef __ASSEMBLY__ -#define _SA1111(x) ((x) + sa1111->resource.start) -#endif - -#define sa1111_writel(val,addr) __raw_writel(val, addr) -#define sa1111_readl(addr) __raw_readl(addr) - -/* - * 26 bits of the SA-1110 address bus are available to the SA-1111. - * Use these when feeding target addresses to the DMA engines. - */ - -#define SA1111_ADDR_WIDTH (26) -#define SA1111_ADDR_MASK ((1<dev) -#define sa1111_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, p) - -struct sa1111_driver { - struct device_driver drv; - unsigned int devid; - int (*probe)(struct sa1111_dev *); - int (*remove)(struct sa1111_dev *); - int (*suspend)(struct sa1111_dev *, pm_message_t); - int (*resume)(struct sa1111_dev *); -}; - -#define SA1111_DRV(_d) container_of((_d), struct sa1111_driver, drv) - -#define SA1111_DRIVER_NAME(_sadev) ((_sadev)->dev.driver->name) - -/* - * These frob the SKPCR register. - */ -void sa1111_enable_device(struct sa1111_dev *); -void sa1111_disable_device(struct sa1111_dev *); - -unsigned int sa1111_pll_clock(struct sa1111_dev *); - -#define SA1111_AUDIO_ACLINK 0 -#define SA1111_AUDIO_I2S 1 - -void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode); -int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate); -int sa1111_get_audio_rate(struct sa1111_dev *sadev); - -int sa1111_check_dma_bug(dma_addr_t addr); - -int sa1111_driver_register(struct sa1111_driver *); -void sa1111_driver_unregister(struct sa1111_driver *); - -void sa1111_set_io_dir(struct sa1111_dev *sadev, unsigned int bits, unsigned int dir, unsigned int sleep_dir); -void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); -void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v); - -#endif /* _ASM_ARCH_SA1111 */ diff --git a/include/asm-arm/hardware/scoop.h b/include/asm-arm/hardware/scoop.h deleted file mode 100644 index dfb8330..0000000 --- a/include/asm-arm/hardware/scoop.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Definitions for the SCOOP interface found on various Sharp PDAs - * - * Copyright (c) 2004 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#define SCOOP_MCR 0x00 -#define SCOOP_CDR 0x04 -#define SCOOP_CSR 0x08 -#define SCOOP_CPR 0x0C -#define SCOOP_CCR 0x10 -#define SCOOP_IRR 0x14 -#define SCOOP_IRM 0x14 -#define SCOOP_IMR 0x18 -#define SCOOP_ISR 0x1C -#define SCOOP_GPCR 0x20 -#define SCOOP_GPWR 0x24 -#define SCOOP_GPRR 0x28 - -#define SCOOP_GPCR_PA22 ( 1 << 12 ) -#define SCOOP_GPCR_PA21 ( 1 << 11 ) -#define SCOOP_GPCR_PA20 ( 1 << 10 ) -#define SCOOP_GPCR_PA19 ( 1 << 9 ) -#define SCOOP_GPCR_PA18 ( 1 << 8 ) -#define SCOOP_GPCR_PA17 ( 1 << 7 ) -#define SCOOP_GPCR_PA16 ( 1 << 6 ) -#define SCOOP_GPCR_PA15 ( 1 << 5 ) -#define SCOOP_GPCR_PA14 ( 1 << 4 ) -#define SCOOP_GPCR_PA13 ( 1 << 3 ) -#define SCOOP_GPCR_PA12 ( 1 << 2 ) -#define SCOOP_GPCR_PA11 ( 1 << 1 ) - -struct scoop_config { - unsigned short io_out; - unsigned short io_dir; - unsigned short suspend_clr; - unsigned short suspend_set; - int gpio_base; -}; - -/* Structure for linking scoop devices to PCMCIA sockets */ -struct scoop_pcmcia_dev { - struct device *dev; /* Pointer to this socket's scoop device */ - int irq; /* irq for socket */ - int cd_irq; - const char *cd_irq_str; - unsigned char keep_vs; - unsigned char keep_rd; -}; - -struct scoop_pcmcia_config { - struct scoop_pcmcia_dev *devs; - int num_devs; - void (*pcmcia_init)(void); - void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr); -}; - -extern struct scoop_pcmcia_config *platform_scoop_config; - -void reset_scoop(struct device *dev); -unsigned short __deprecated set_scoop_gpio(struct device *dev, unsigned short bit); -unsigned short __deprecated reset_scoop_gpio(struct device *dev, unsigned short bit); -unsigned short read_scoop_reg(struct device *dev, unsigned short reg); -void write_scoop_reg(struct device *dev, unsigned short reg, unsigned short data); diff --git a/include/asm-arm/hardware/sharpsl_pm.h b/include/asm-arm/hardware/sharpsl_pm.h deleted file mode 100644 index 2d00db2..0000000 --- a/include/asm-arm/hardware/sharpsl_pm.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * SharpSL Battery/PM Driver - * - * Copyright (c) 2004-2005 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include - -struct sharpsl_charger_machinfo { - void (*init)(void); - void (*exit)(void); - int gpio_acin; - int gpio_batfull; - int batfull_irq; - int gpio_batlock; - int gpio_fatal; - void (*discharge)(int); - void (*discharge1)(int); - void (*charge)(int); - void (*measure_temp)(int); - void (*presuspend)(void); - void (*postsuspend)(void); - void (*earlyresume)(void); - unsigned long (*read_devdata)(int); -#define SHARPSL_BATT_VOLT 1 -#define SHARPSL_BATT_TEMP 2 -#define SHARPSL_ACIN_VOLT 3 -#define SHARPSL_STATUS_ACIN 4 -#define SHARPSL_STATUS_LOCK 5 -#define SHARPSL_STATUS_CHRGFULL 6 -#define SHARPSL_STATUS_FATAL 7 - unsigned long (*charger_wakeup)(void); - int (*should_wakeup)(unsigned int resume_on_alarm); - void (*backlight_limit)(int); - int (*backlight_get_status) (void); - int charge_on_volt; - int charge_on_temp; - int charge_acin_high; - int charge_acin_low; - int fatal_acin_volt; - int fatal_noacin_volt; - int bat_levels; - struct battery_thresh *bat_levels_noac; - struct battery_thresh *bat_levels_acin; - struct battery_thresh *bat_levels_noac_bl; - struct battery_thresh *bat_levels_acin_bl; - int status_high_acin; - int status_low_acin; - int status_high_noac; - int status_low_noac; -}; - -struct battery_thresh { - int voltage; - int percentage; -}; - -struct battery_stat { - int ac_status; /* APM AC Present/Not Present */ - int mainbat_status; /* APM Main Battery Status */ - int mainbat_percent; /* Main Battery Percentage Charge */ - int mainbat_voltage; /* Main Battery Voltage */ -}; - -struct sharpsl_pm_status { - struct device *dev; - struct timer_list ac_timer; - struct timer_list chrg_full_timer; - - int charge_mode; -#define CHRG_ERROR (-1) -#define CHRG_OFF (0) -#define CHRG_ON (1) -#define CHRG_DONE (2) - - unsigned int flags; -#define SHARPSL_SUSPENDED (1 << 0) /* Device is Suspended */ -#define SHARPSL_ALARM_ACTIVE (1 << 1) /* Alarm is for charging event (not user) */ -#define SHARPSL_BL_LIMIT (1 << 2) /* Backlight Intensity Limited */ -#define SHARPSL_APM_QUEUED (1 << 3) /* APM Event Queued */ -#define SHARPSL_DO_OFFLINE_CHRG (1 << 4) /* Trigger the offline charger */ - - int full_count; - unsigned long charge_start_time; - struct sharpsl_charger_machinfo *machinfo; - struct battery_stat battstat; -}; - -extern struct sharpsl_pm_status sharpsl_pm; - - -#define SHARPSL_LED_ERROR 2 -#define SHARPSL_LED_ON 1 -#define SHARPSL_LED_OFF 0 - -void sharpsl_battery_kick(void); -void sharpsl_pm_led(int val); -irqreturn_t sharpsl_ac_isr(int irq, void *dev_id); -irqreturn_t sharpsl_chrg_full_isr(int irq, void *dev_id); -irqreturn_t sharpsl_fatal_isr(int irq, void *dev_id); - diff --git a/include/asm-arm/hardware/ssp.h b/include/asm-arm/hardware/ssp.h deleted file mode 100644 index 3b42e18..0000000 --- a/include/asm-arm/hardware/ssp.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * ssp.h - * - * Copyright (C) 2003 Russell King, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef SSP_H -#define SSP_H - -struct ssp_state { - unsigned int cr0; - unsigned int cr1; -}; - -int ssp_write_word(u16 data); -int ssp_read_word(u16 *data); -int ssp_flush(void); -void ssp_enable(void); -void ssp_disable(void); -void ssp_save_state(struct ssp_state *ssp); -void ssp_restore_state(struct ssp_state *ssp); -int ssp_init(void); -void ssp_exit(void); - -#endif diff --git a/include/asm-arm/hardware/uengine.h b/include/asm-arm/hardware/uengine.h deleted file mode 100644 index b442d65..0000000 --- a/include/asm-arm/hardware/uengine.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Generic library functions for the microengines found on the Intel - * IXP2000 series of network processors. - * - * Copyright (C) 2004, 2005 Lennert Buytenhek - * Dedicated to Marija Kulikova. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as - * published by the Free Software Foundation; either version 2.1 of the - * License, or (at your option) any later version. - */ - -#ifndef __IXP2000_UENGINE_H -#define __IXP2000_UENGINE_H - -extern u32 ixp2000_uengine_mask; - -struct ixp2000_uengine_code -{ - u32 cpu_model_bitmask; - u8 cpu_min_revision; - u8 cpu_max_revision; - - u32 uengine_parameters; - - struct ixp2000_reg_value { - int reg; - u32 value; - } *initial_reg_values; - - int num_insns; - u8 *insns; -}; - -u32 ixp2000_uengine_csr_read(int uengine, int offset); -void ixp2000_uengine_csr_write(int uengine, int offset, u32 value); -void ixp2000_uengine_reset(u32 uengine_mask); -void ixp2000_uengine_set_mode(int uengine, u32 mode); -void ixp2000_uengine_load_microcode(int uengine, u8 *ucode, int insns); -void ixp2000_uengine_init_context(int uengine, int context, int pc); -void ixp2000_uengine_start_contexts(int uengine, u8 ctx_mask); -void ixp2000_uengine_stop_contexts(int uengine, u8 ctx_mask); -int ixp2000_uengine_load(int uengine, struct ixp2000_uengine_code *c); - -#define IXP2000_UENGINE_8_CONTEXTS 0x00000000 -#define IXP2000_UENGINE_4_CONTEXTS 0x80000000 -#define IXP2000_UENGINE_PRN_UPDATE_EVERY 0x40000000 -#define IXP2000_UENGINE_PRN_UPDATE_ON_ACCESS 0x00000000 -#define IXP2000_UENGINE_NN_FROM_SELF 0x00100000 -#define IXP2000_UENGINE_NN_FROM_PREVIOUS 0x00000000 -#define IXP2000_UENGINE_ASSERT_EMPTY_AT_3 0x000c0000 -#define IXP2000_UENGINE_ASSERT_EMPTY_AT_2 0x00080000 -#define IXP2000_UENGINE_ASSERT_EMPTY_AT_1 0x00040000 -#define IXP2000_UENGINE_ASSERT_EMPTY_AT_0 0x00000000 -#define IXP2000_UENGINE_LM_ADDR1_GLOBAL 0x00020000 -#define IXP2000_UENGINE_LM_ADDR1_PER_CONTEXT 0x00000000 -#define IXP2000_UENGINE_LM_ADDR0_GLOBAL 0x00010000 -#define IXP2000_UENGINE_LM_ADDR0_PER_CONTEXT 0x00000000 - - -#endif diff --git a/include/asm-arm/hardware/vic.h b/include/asm-arm/hardware/vic.h deleted file mode 100644 index ed9ca37..0000000 --- a/include/asm-arm/hardware/vic.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * linux/include/asm-arm/hardware/vic.h - * - * Copyright (c) ARM Limited 2003. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_HARDWARE_VIC_H -#define __ASM_ARM_HARDWARE_VIC_H - -#define VIC_IRQ_STATUS 0x00 -#define VIC_FIQ_STATUS 0x04 -#define VIC_RAW_STATUS 0x08 -#define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ -#define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ -#define VIC_INT_ENABLE_CLEAR 0x14 -#define VIC_INT_SOFT 0x18 -#define VIC_INT_SOFT_CLEAR 0x1c -#define VIC_PROTECT 0x20 -#define VIC_VECT_ADDR 0x30 -#define VIC_DEF_VECT_ADDR 0x34 - -#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */ -#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */ -#define VIC_ITCR 0x300 /* VIC test control register */ - -#define VIC_VECT_CNTL_ENABLE (1 << 5) - -#ifndef __ASSEMBLY__ -void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources); -#endif - -#endif diff --git a/include/asm-arm/hw_irq.h b/include/asm-arm/hw_irq.h deleted file mode 100644 index f1a08a5..0000000 --- a/include/asm-arm/hw_irq.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Nothing to see here yet - */ -#ifndef _ARCH_ARM_HW_IRQ_H -#define _ARCH_ARM_HW_IRQ_H - -#include - -#endif diff --git a/include/asm-arm/hwcap.h b/include/asm-arm/hwcap.h deleted file mode 100644 index 81f4c89..0000000 --- a/include/asm-arm/hwcap.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASMARM_HWCAP_H -#define __ASMARM_HWCAP_H - -/* - * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP - */ -#define HWCAP_SWP 1 -#define HWCAP_HALF 2 -#define HWCAP_THUMB 4 -#define HWCAP_26BIT 8 /* Play it safe */ -#define HWCAP_FAST_MULT 16 -#define HWCAP_FPA 32 -#define HWCAP_VFP 64 -#define HWCAP_EDSP 128 -#define HWCAP_JAVA 256 -#define HWCAP_IWMMXT 512 -#define HWCAP_CRUNCH 1024 -#define HWCAP_THUMBEE 2048 - -#if defined(__KERNEL__) && !defined(__ASSEMBLY__) -/* - * This yields a mask that user programs can use to figure out what - * instruction set this cpu supports. - */ -#define ELF_HWCAP (elf_hwcap) -extern unsigned int elf_hwcap; -#endif - -#endif diff --git a/include/asm-arm/ide.h b/include/asm-arm/ide.h deleted file mode 100644 index a48019f..0000000 --- a/include/asm-arm/ide.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/ide.h - * - * Copyright (C) 1994-1996 Linus Torvalds & authors - */ - -/* - * This file contains the ARM architecture specific IDE code. - */ - -#ifndef __ASMARM_IDE_H -#define __ASMARM_IDE_H - -#ifdef __KERNEL__ - -#define __ide_mm_insw(port,addr,len) readsw(port,addr,len) -#define __ide_mm_insl(port,addr,len) readsl(port,addr,len) -#define __ide_mm_outsw(port,addr,len) writesw(port,addr,len) -#define __ide_mm_outsl(port,addr,len) writesl(port,addr,len) - -#endif /* __KERNEL__ */ - -#endif /* __ASMARM_IDE_H */ diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h deleted file mode 100644 index eebe56e..0000000 --- a/include/asm-arm/io.h +++ /dev/null @@ -1,287 +0,0 @@ -/* - * linux/include/asm-arm/io.h - * - * Copyright (C) 1996-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Modifications: - * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both - * constant addresses and variable addresses. - * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture - * specific IO header files. - * 27-Mar-1999 PJB Second parameter of memcpy_toio is const.. - * 04-Apr-1999 PJB Added check_signature. - * 12-Dec-1999 RMK More cleanups - * 18-Jun-2000 RMK Removed virt_to_* and friends definitions - * 05-Oct-2004 BJD Moved memory string functions to use void __iomem - */ -#ifndef __ASM_ARM_IO_H -#define __ASM_ARM_IO_H - -#ifdef __KERNEL__ - -#include -#include -#include - -/* - * ISA I/O bus memory addresses are 1:1 with the physical address. - */ -#define isa_virt_to_bus virt_to_phys -#define isa_page_to_bus page_to_phys -#define isa_bus_to_virt phys_to_virt - -/* - * Generic IO read/write. These perform native-endian accesses. Note - * that some architectures will want to re-define __raw_{read,write}w. - */ -extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen); -extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); -extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); - -extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen); -extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); -extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); - -#define __raw_writeb(v,a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a) = (v)) -#define __raw_writew(v,a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v)) -#define __raw_writel(v,a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a) = (v)) - -#define __raw_readb(a) (__chk_io_ptr(a), *(volatile unsigned char __force *)(a)) -#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) -#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a)) - -/* - * Architecture ioremap implementation. - */ -#define MT_DEVICE 0 -#define MT_DEVICE_NONSHARED 1 -#define MT_DEVICE_CACHED 2 -#define MT_DEVICE_IXP2000 3 -/* - * types 4 onwards can be found in asm/mach/map.h and are undefined - * for ioremap - */ - -/* - * __arm_ioremap takes CPU physical address. - * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page - */ -extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); -extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int); -extern void __iounmap(volatile void __iomem *addr); - -/* - * Bad read/write accesses... - */ -extern void __readwrite_bug(const char *fn); - -/* - * Now, pick up the machine-defined IO definitions - */ -#include - -/* - * IO port access primitives - * ------------------------- - * - * The ARM doesn't have special IO access instructions; all IO is memory - * mapped. Note that these are defined to perform little endian accesses - * only. Their primary purpose is to access PCI and ISA peripherals. - * - * Note that for a big endian machine, this implies that the following - * big endian mode connectivity is in place, as described by numerous - * ARM documents: - * - * PCI: D0-D7 D8-D15 D16-D23 D24-D31 - * ARM: D24-D31 D16-D23 D8-D15 D0-D7 - * - * The machine specific io.h include defines __io to translate an "IO" - * address to a memory address. - * - * Note that we prevent GCC re-ordering or caching values in expressions - * by introducing sequence points into the in*() definitions. Note that - * __raw_* do not guarantee this behaviour. - * - * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space. - */ -#ifdef __io -#define outb(v,p) __raw_writeb(v,__io(p)) -#define outw(v,p) __raw_writew((__force __u16) \ - cpu_to_le16(v),__io(p)) -#define outl(v,p) __raw_writel((__force __u32) \ - cpu_to_le32(v),__io(p)) - -#define inb(p) ({ __u8 __v = __raw_readb(__io(p)); __v; }) -#define inw(p) ({ __u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(__io(p))); __v; }) -#define inl(p) ({ __u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(__io(p))); __v; }) - -#define outsb(p,d,l) __raw_writesb(__io(p),d,l) -#define outsw(p,d,l) __raw_writesw(__io(p),d,l) -#define outsl(p,d,l) __raw_writesl(__io(p),d,l) - -#define insb(p,d,l) __raw_readsb(__io(p),d,l) -#define insw(p,d,l) __raw_readsw(__io(p),d,l) -#define insl(p,d,l) __raw_readsl(__io(p),d,l) -#endif - -#define outb_p(val,port) outb((val),(port)) -#define outw_p(val,port) outw((val),(port)) -#define outl_p(val,port) outl((val),(port)) -#define inb_p(port) inb((port)) -#define inw_p(port) inw((port)) -#define inl_p(port) inl((port)) - -#define outsb_p(port,from,len) outsb(port,from,len) -#define outsw_p(port,from,len) outsw(port,from,len) -#define outsl_p(port,from,len) outsl(port,from,len) -#define insb_p(port,to,len) insb(port,to,len) -#define insw_p(port,to,len) insw(port,to,len) -#define insl_p(port,to,len) insl(port,to,len) - -/* - * String version of IO memory access ops: - */ -extern void _memcpy_fromio(void *, const volatile void __iomem *, size_t); -extern void _memcpy_toio(volatile void __iomem *, const void *, size_t); -extern void _memset_io(volatile void __iomem *, int, size_t); - -#define mmiowb() - -/* - * Memory access primitives - * ------------------------ - * - * These perform PCI memory accesses via an ioremap region. They don't - * take an address as such, but a cookie. - * - * Again, this are defined to perform little endian accesses. See the - * IO port primitives for more information. - */ -#ifdef __mem_pci -#define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; }) -#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \ - __raw_readw(__mem_pci(c))); __v; }) -#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \ - __raw_readl(__mem_pci(c))); __v; }) -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) - -#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l) -#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l) -#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l) - -#define writeb(v,c) __raw_writeb(v,__mem_pci(c)) -#define writew(v,c) __raw_writew((__force __u16) \ - cpu_to_le16(v),__mem_pci(c)) -#define writel(v,c) __raw_writel((__force __u32) \ - cpu_to_le32(v),__mem_pci(c)) - -#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l) -#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l) -#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l) - -#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l)) -#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l)) -#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l)) - -#elif !defined(readb) - -#define readb(c) (__readwrite_bug("readb"),0) -#define readw(c) (__readwrite_bug("readw"),0) -#define readl(c) (__readwrite_bug("readl"),0) -#define writeb(v,c) __readwrite_bug("writeb") -#define writew(v,c) __readwrite_bug("writew") -#define writel(v,c) __readwrite_bug("writel") - -#define check_signature(io,sig,len) (0) - -#endif /* __mem_pci */ - -/* - * ioremap and friends. - * - * ioremap takes a PCI memory address, as specified in - * Documentation/IO-mapping.txt. - * - */ -#ifndef __arch_ioremap -#define ioremap(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) -#define ioremap_nocache(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE) -#define ioremap_cached(cookie,size) __arm_ioremap(cookie, size, MT_DEVICE_CACHED) -#define iounmap(cookie) __iounmap(cookie) -#else -#define ioremap(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) -#define ioremap_nocache(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE) -#define ioremap_cached(cookie,size) __arch_ioremap((cookie), (size), MT_DEVICE_CACHED) -#define iounmap(cookie) __arch_iounmap(cookie) -#endif - -/* - * io{read,write}{8,16,32} macros - */ -#ifndef ioread8 -#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; }) -#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; }) -#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; }) - -#define iowrite8(v,p) __raw_writeb(v, p) -#define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p) -#define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p) - -#define ioread8_rep(p,d,c) __raw_readsb(p,d,c) -#define ioread16_rep(p,d,c) __raw_readsw(p,d,c) -#define ioread32_rep(p,d,c) __raw_readsl(p,d,c) - -#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c) -#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c) -#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c) - -extern void __iomem *ioport_map(unsigned long port, unsigned int nr); -extern void ioport_unmap(void __iomem *addr); -#endif - -struct pci_dev; - -extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen); -extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr); - -/* - * can the hardware map this into one segment or not, given no other - * constraints. - */ -#define BIOVEC_MERGEABLE(vec1, vec2) \ - ((bvec_to_phys((vec1)) + (vec1)->bv_len) == bvec_to_phys((vec2))) - -#ifdef CONFIG_MMU -#define ARCH_HAS_VALID_PHYS_ADDR_RANGE -extern int valid_phys_addr_range(unsigned long addr, size_t size); -extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); -#endif - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -/* - * Register ISA memory and port locations for glibc iopl/inb/outb - * emulation. - */ -extern void register_isa_ports(unsigned int mmio, unsigned int io, - unsigned int io_shift); - -#endif /* __KERNEL__ */ -#endif /* __ASM_ARM_IO_H */ diff --git a/include/asm-arm/ioctl.h b/include/asm-arm/ioctl.h deleted file mode 100644 index b279fe0..0000000 --- a/include/asm-arm/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/ioctls.h b/include/asm-arm/ioctls.h deleted file mode 100644 index a91d8a1..0000000 --- a/include/asm-arm/ioctls.h +++ /dev/null @@ -1,84 +0,0 @@ -#ifndef __ASM_ARM_IOCTLS_H -#define __ASM_ARM_IOCTLS_H - -#include - -/* 0x54 is just a magic number to make these relatively unique ('T') */ - -#define TCGETS 0x5401 -#define TCSETS 0x5402 -#define TCSETSW 0x5403 -#define TCSETSF 0x5404 -#define TCGETA 0x5405 -#define TCSETA 0x5406 -#define TCSETAW 0x5407 -#define TCSETAF 0x5408 -#define TCSBRK 0x5409 -#define TCXONC 0x540A -#define TCFLSH 0x540B -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E -#define TIOCGPGRP 0x540F -#define TIOCSPGRP 0x5410 -#define TIOCOUTQ 0x5411 -#define TIOCSTI 0x5412 -#define TIOCGWINSZ 0x5413 -#define TIOCSWINSZ 0x5414 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define FIONREAD 0x541B -#define TIOCINQ FIONREAD -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 -#define FIONBIO 0x5421 -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -#define TIOCSBRK 0x5427 /* BSD compatibility */ -#define TIOCCBRK 0x5428 /* BSD compatibility */ -#define TIOCGSID 0x5429 /* Return the session ID of FD */ -#define TCGETS2 _IOR('T',0x2A, struct termios2) -#define TCSETS2 _IOW('T',0x2B, struct termios2) -#define TCSETSW2 _IOW('T',0x2C, struct termios2) -#define TCSETSF2 _IOW('T',0x2D, struct termios2) -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ -#define FIOCLEX 0x5451 -#define FIOASYNC 0x5452 -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define FIOQSIZE 0x545E - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - -#endif diff --git a/include/asm-arm/ipcbuf.h b/include/asm-arm/ipcbuf.h deleted file mode 100644 index 9768397..0000000 --- a/include/asm-arm/ipcbuf.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASMARM_IPCBUF_H -#define __ASMARM_IPCBUF_H - -/* - * The ipc64_perm structure for arm architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode_t and seq - * - 2 miscellaneous 32-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __ASMARM_IPCBUF_H */ diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h deleted file mode 100644 index 9cb0190..0000000 --- a/include/asm-arm/irq.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ASM_ARM_IRQ_H -#define __ASM_ARM_IRQ_H - -#include - -#ifndef irq_canonicalize -#define irq_canonicalize(i) (i) -#endif - -#ifndef NR_IRQS -#define NR_IRQS 128 -#endif - -/* - * Use this value to indicate lack of interrupt - * capability - */ -#ifndef NO_IRQ -#define NO_IRQ ((unsigned int)(-1)) -#endif - -#ifndef __ASSEMBLY__ -struct irqaction; -extern void migrate_irqs(void); -#endif - -#endif - diff --git a/include/asm-arm/irq_regs.h b/include/asm-arm/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-arm/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/irqflags.h b/include/asm-arm/irqflags.h deleted file mode 100644 index 6d09974..0000000 --- a/include/asm-arm/irqflags.h +++ /dev/null @@ -1,132 +0,0 @@ -#ifndef __ASM_ARM_IRQFLAGS_H -#define __ASM_ARM_IRQFLAGS_H - -#ifdef __KERNEL__ - -#include - -/* - * CPU interrupt mask handling. - */ -#if __LINUX_ARM_ARCH__ >= 6 - -#define raw_local_irq_save(x) \ - ({ \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_save\n" \ - "cpsid i" \ - : "=r" (x) : : "memory", "cc"); \ - }) - -#define raw_local_irq_enable() __asm__("cpsie i @ __sti" : : : "memory", "cc") -#define raw_local_irq_disable() __asm__("cpsid i @ __cli" : : : "memory", "cc") -#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc") -#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc") - -#else - -/* - * Save the current interrupt enable state & disable IRQs - */ -#define raw_local_irq_save(x) \ - ({ \ - unsigned long temp; \ - (void) (&temp == &x); \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_save\n" \ -" orr %1, %0, #128\n" \ -" msr cpsr_c, %1" \ - : "=r" (x), "=r" (temp) \ - : \ - : "memory", "cc"); \ - }) - -/* - * Enable IRQs - */ -#define raw_local_irq_enable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_enable\n" \ -" bic %0, %0, #128\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory", "cc"); \ - }) - -/* - * Disable IRQs - */ -#define raw_local_irq_disable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_irq_disable\n" \ -" orr %0, %0, #128\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory", "cc"); \ - }) - -/* - * Enable FIQs - */ -#define local_fiq_enable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ stf\n" \ -" bic %0, %0, #64\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory", "cc"); \ - }) - -/* - * Disable FIQs - */ -#define local_fiq_disable() \ - ({ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ clf\n" \ -" orr %0, %0, #64\n" \ -" msr cpsr_c, %0" \ - : "=r" (temp) \ - : \ - : "memory", "cc"); \ - }) - -#endif - -/* - * Save the current interrupt enable state. - */ -#define raw_local_save_flags(x) \ - ({ \ - __asm__ __volatile__( \ - "mrs %0, cpsr @ local_save_flags" \ - : "=r" (x) : : "memory", "cc"); \ - }) - -/* - * restore saved IRQ & FIQ state - */ -#define raw_local_irq_restore(x) \ - __asm__ __volatile__( \ - "msr cpsr_c, %0 @ local_irq_restore\n" \ - : \ - : "r" (x) \ - : "memory", "cc") - -#define raw_irqs_disabled_flags(flags) \ -({ \ - (int)((flags) & PSR_I_BIT); \ -}) - -#endif -#endif diff --git a/include/asm-arm/kdebug.h b/include/asm-arm/kdebug.h deleted file mode 100644 index 6ece1b0..0000000 --- a/include/asm-arm/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/kexec.h b/include/asm-arm/kexec.h deleted file mode 100644 index c8986bb..0000000 --- a/include/asm-arm/kexec.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _ARM_KEXEC_H -#define _ARM_KEXEC_H - -#ifdef CONFIG_KEXEC - -/* Maximum physical address we can use pages from */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) -/* Maximum address we can reach in physical address mode */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) -/* Maximum address we can use for the control code buffer */ -#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) - -#define KEXEC_CONTROL_CODE_SIZE 4096 - -#define KEXEC_ARCH KEXEC_ARCH_ARM - -#define KEXEC_ARM_ATAGS_OFFSET 0x1000 -#define KEXEC_ARM_ZIMAGE_OFFSET 0x8000 - -#ifndef __ASSEMBLY__ - -struct kimage; -/* Provide a dummy definition to avoid build failures. */ -static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) { } - -#endif /* __ASSEMBLY__ */ - -#endif /* CONFIG_KEXEC */ - -#endif /* _ARM_KEXEC_H */ diff --git a/include/asm-arm/kgdb.h b/include/asm-arm/kgdb.h deleted file mode 100644 index 67af4b8..0000000 --- a/include/asm-arm/kgdb.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * ARM KGDB support - * - * Author: Deepak Saxena - * - * Copyright (C) 2002 MontaVista Software Inc. - * - */ - -#ifndef __ARM_KGDB_H__ -#define __ARM_KGDB_H__ - -#include - -/* - * GDB assumes that we're a user process being debugged, so - * it will send us an SWI command to write into memory as the - * debug trap. When an SWI occurs, the next instruction addr is - * placed into R14_svc before jumping to the vector trap. - * This doesn't work for kernel debugging as we are already in SVC - * we would loose the kernel's LR, which is a bad thing. This - * is bad thing. - * - * By doing this as an undefined instruction trap, we force a mode - * switch from SVC to UND mode, allowing us to save full kernel state. - * - * We also define a KGDB_COMPILED_BREAK which can be used to compile - * in breakpoints. This is important for things like sysrq-G and for - * the initial breakpoint from trap_init(). - * - * Note to ARM HW designers: Add real trap support like SH && PPC to - * make our lives much much simpler. :) - */ -#define BREAK_INSTR_SIZE 4 -#define GDB_BREAKINST 0xef9f0001 -#define KGDB_BREAKINST 0xe7ffdefe -#define KGDB_COMPILED_BREAK 0xe7ffdeff -#define CACHE_FLUSH_IS_SAFE 1 - -#ifndef __ASSEMBLY__ - -static inline void arch_kgdb_breakpoint(void) -{ - asm(".word 0xe7ffdeff"); -} - -extern void kgdb_handle_bus_error(void); -extern int kgdb_fault_expected; - -#endif /* !__ASSEMBLY__ */ - -/* - * From Kevin Hilman: - * - * gdb is expecting the following registers layout. - * - * r0-r15: 1 long word each - * f0-f7: unused, 3 long words each !! - * fps: unused, 1 long word - * cpsr: 1 long word - * - * Even though f0-f7 and fps are not used, they need to be - * present in the registers sent for correct processing in - * the host-side gdb. - * - * In particular, it is crucial that CPSR is in the right place, - * otherwise gdb will not be able to correctly interpret stepping over - * conditional branches. - */ -#define _GP_REGS 16 -#define _FP_REGS 8 -#define _EXTRA_REGS 2 -#define GDB_MAX_REGS (_GP_REGS + (_FP_REGS * 3) + _EXTRA_REGS) - -#define KGDB_MAX_NO_CPUS 1 -#define BUFMAX 400 -#define NUMREGBYTES (GDB_MAX_REGS << 2) -#define NUMCRITREGBYTES (32 << 2) - -#define _R0 0 -#define _R1 1 -#define _R2 2 -#define _R3 3 -#define _R4 4 -#define _R5 5 -#define _R6 6 -#define _R7 7 -#define _R8 8 -#define _R9 9 -#define _R10 10 -#define _FP 11 -#define _IP 12 -#define _SPT 13 -#define _LR 14 -#define _PC 15 -#define _CPSR (GDB_MAX_REGS - 1) - -/* - * So that we can denote the end of a frame for tracing, - * in the simple case: - */ -#define CFI_END_FRAME(func) __CFI_END_FRAME(_PC, _SPT, func) - -#endif /* __ASM_KGDB_H__ */ diff --git a/include/asm-arm/kmap_types.h b/include/asm-arm/kmap_types.h deleted file mode 100644 index 45def13..0000000 --- a/include/asm-arm/kmap_types.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef __ARM_KMAP_TYPES_H -#define __ARM_KMAP_TYPES_H - -/* - * This is the "bare minimum". AIO seems to require this. - */ -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif diff --git a/include/asm-arm/kprobes.h b/include/asm-arm/kprobes.h deleted file mode 100644 index b1a3787..0000000 --- a/include/asm-arm/kprobes.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * include/asm-arm/kprobes.h - * - * Copyright (C) 2006, 2007 Motorola Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ - -#ifndef _ARM_KPROBES_H -#define _ARM_KPROBES_H - -#include -#include -#include - -#define __ARCH_WANT_KPROBES_INSN_SLOT -#define MAX_INSN_SIZE 2 -#define MAX_STACK_SIZE 64 /* 32 would probably be OK */ - -/* - * This undefined instruction must be unique and - * reserved solely for kprobes' use. - */ -#define KPROBE_BREAKPOINT_INSTRUCTION 0xe7f001f8 - -#define regs_return_value(regs) ((regs)->ARM_r0) -#define flush_insn_slot(p) do { } while (0) -#define kretprobe_blacklist_size 0 - -typedef u32 kprobe_opcode_t; - -struct kprobe; -typedef void (kprobe_insn_handler_t)(struct kprobe *, struct pt_regs *); - -/* Architecture specific copy of original instruction. */ -struct arch_specific_insn { - kprobe_opcode_t *insn; - kprobe_insn_handler_t *insn_handler; -}; - -struct prev_kprobe { - struct kprobe *kp; - unsigned int status; -}; - -/* per-cpu kprobe control block */ -struct kprobe_ctlblk { - unsigned int kprobe_status; - struct prev_kprobe prev_kprobe; - struct pt_regs jprobe_saved_regs; - char jprobes_stack[MAX_STACK_SIZE]; -}; - -void arch_remove_kprobe(struct kprobe *); -void kretprobe_trampoline(void); - -int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr); -int kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr); -int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); - -enum kprobe_insn { - INSN_REJECTED, - INSN_GOOD, - INSN_GOOD_NO_SLOT -}; - -enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t, - struct arch_specific_insn *); -void __init arm_kprobe_decode_init(void); - -#endif /* _ARM_KPROBES_H */ diff --git a/include/asm-arm/leds.h b/include/asm-arm/leds.h deleted file mode 100644 index 12290ea..0000000 --- a/include/asm-arm/leds.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/leds.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Event-driven interface for LEDs on machines - * Added led_start and led_stop- Alex Holden, 28th Dec 1998. - */ -#ifndef ASM_ARM_LEDS_H -#define ASM_ARM_LEDS_H - - -typedef enum { - led_idle_start, - led_idle_end, - led_timer, - led_start, - led_stop, - led_claim, /* override idle & timer leds */ - led_release, /* restore idle & timer leds */ - led_start_timer_mode, - led_stop_timer_mode, - led_green_on, - led_green_off, - led_amber_on, - led_amber_off, - led_red_on, - led_red_off, - led_blue_on, - led_blue_off, - /* - * I want this between led_timer and led_start, but - * someone has decided to export this to user space - */ - led_halted -} led_event_t; - -/* Use this routine to handle LEDs */ - -#ifdef CONFIG_LEDS -extern void (*leds_event)(led_event_t); -#else -#define leds_event(e) -#endif - -#endif diff --git a/include/asm-arm/limits.h b/include/asm-arm/limits.h deleted file mode 100644 index 08d8c66..0000000 --- a/include/asm-arm/limits.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_PIPE_H -#define __ASM_PIPE_H - -#ifndef PAGE_SIZE -#include -#endif - -#define PIPE_BUF PAGE_SIZE - -#endif - diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h deleted file mode 100644 index 5a25632..0000000 --- a/include/asm-arm/linkage.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -#define __ALIGN .align 0 -#define __ALIGN_STR ".align 0" - -#define ENDPROC(name) \ - .type name, %function; \ - END(name) - -#endif diff --git a/include/asm-arm/local.h b/include/asm-arm/local.h deleted file mode 100644 index c11c530..0000000 --- a/include/asm-arm/local.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/locks.h b/include/asm-arm/locks.h deleted file mode 100644 index 852220e..0000000 --- a/include/asm-arm/locks.h +++ /dev/null @@ -1,274 +0,0 @@ -/* - * linux/include/asm-arm/locks.h - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Interrupt safe locking assembler. - */ -#ifndef __ASM_PROC_LOCKS_H -#define __ASM_PROC_LOCKS_H - -#if __LINUX_ARM_ARCH__ >= 6 - -#define __down_op(ptr,fail) \ - ({ \ - __asm__ __volatile__( \ - "@ down_op\n" \ -"1: ldrex lr, [%0]\n" \ -" sub lr, lr, %1\n" \ -" strex ip, lr, [%0]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" teq lr, #0\n" \ -" movmi ip, %0\n" \ -" blmi " #fail \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - }) - -#define __down_op_ret(ptr,fail) \ - ({ \ - unsigned int ret; \ - __asm__ __volatile__( \ - "@ down_op_ret\n" \ -"1: ldrex lr, [%1]\n" \ -" sub lr, lr, %2\n" \ -" strex ip, lr, [%1]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" teq lr, #0\n" \ -" movmi ip, %1\n" \ -" movpl ip, #0\n" \ -" blmi " #fail "\n" \ -" mov %0, ip" \ - : "=&r" (ret) \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - ret; \ - }) - -#define __up_op(ptr,wake) \ - ({ \ - smp_mb(); \ - __asm__ __volatile__( \ - "@ up_op\n" \ -"1: ldrex lr, [%0]\n" \ -" add lr, lr, %1\n" \ -" strex ip, lr, [%0]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" cmp lr, #0\n" \ -" movle ip, %0\n" \ -" blle " #wake \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - }) - -/* - * The value 0x01000000 supports up to 128 processors and - * lots of processes. BIAS must be chosen such that sub'ing - * BIAS once per CPU will result in the long remaining - * negative. - */ -#define RW_LOCK_BIAS 0x01000000 -#define RW_LOCK_BIAS_STR "0x01000000" - -#define __down_op_write(ptr,fail) \ - ({ \ - __asm__ __volatile__( \ - "@ down_op_write\n" \ -"1: ldrex lr, [%0]\n" \ -" sub lr, lr, %1\n" \ -" strex ip, lr, [%0]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" teq lr, #0\n" \ -" movne ip, %0\n" \ -" blne " #fail \ - : \ - : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - }) - -#define __up_op_write(ptr,wake) \ - ({ \ - smp_mb(); \ - __asm__ __volatile__( \ - "@ up_op_write\n" \ -"1: ldrex lr, [%0]\n" \ -" adds lr, lr, %1\n" \ -" strex ip, lr, [%0]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" movcs ip, %0\n" \ -" blcs " #wake \ - : \ - : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc"); \ - }) - -#define __down_op_read(ptr,fail) \ - __down_op(ptr, fail) - -#define __up_op_read(ptr,wake) \ - ({ \ - smp_mb(); \ - __asm__ __volatile__( \ - "@ up_op_read\n" \ -"1: ldrex lr, [%0]\n" \ -" add lr, lr, %1\n" \ -" strex ip, lr, [%0]\n" \ -" teq ip, #0\n" \ -" bne 1b\n" \ -" teq lr, #0\n" \ -" moveq ip, %0\n" \ -" bleq " #wake \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - }) - -#else - -#define __down_op(ptr,fail) \ - ({ \ - __asm__ __volatile__( \ - "@ down_op\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%0]\n" \ -" subs lr, lr, %1\n" \ -" str lr, [%0]\n" \ -" msr cpsr_c, ip\n" \ -" movmi ip, %0\n" \ -" blmi " #fail \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - }) - -#define __down_op_ret(ptr,fail) \ - ({ \ - unsigned int ret; \ - __asm__ __volatile__( \ - "@ down_op_ret\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%1]\n" \ -" subs lr, lr, %2\n" \ -" str lr, [%1]\n" \ -" msr cpsr_c, ip\n" \ -" movmi ip, %1\n" \ -" movpl ip, #0\n" \ -" blmi " #fail "\n" \ -" mov %0, ip" \ - : "=&r" (ret) \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - ret; \ - }) - -#define __up_op(ptr,wake) \ - ({ \ - smp_mb(); \ - __asm__ __volatile__( \ - "@ up_op\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%0]\n" \ -" adds lr, lr, %1\n" \ -" str lr, [%0]\n" \ -" msr cpsr_c, ip\n" \ -" movle ip, %0\n" \ -" blle " #wake \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - }) - -/* - * The value 0x01000000 supports up to 128 processors and - * lots of processes. BIAS must be chosen such that sub'ing - * BIAS once per CPU will result in the long remaining - * negative. - */ -#define RW_LOCK_BIAS 0x01000000 -#define RW_LOCK_BIAS_STR "0x01000000" - -#define __down_op_write(ptr,fail) \ - ({ \ - __asm__ __volatile__( \ - "@ down_op_write\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%0]\n" \ -" subs lr, lr, %1\n" \ -" str lr, [%0]\n" \ -" msr cpsr_c, ip\n" \ -" movne ip, %0\n" \ -" blne " #fail \ - : \ - : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - }) - -#define __up_op_write(ptr,wake) \ - ({ \ - __asm__ __volatile__( \ - "@ up_op_write\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%0]\n" \ -" adds lr, lr, %1\n" \ -" str lr, [%0]\n" \ -" msr cpsr_c, ip\n" \ -" movcs ip, %0\n" \ -" blcs " #wake \ - : \ - : "r" (ptr), "I" (RW_LOCK_BIAS) \ - : "ip", "lr", "cc"); \ - smp_mb(); \ - }) - -#define __down_op_read(ptr,fail) \ - __down_op(ptr, fail) - -#define __up_op_read(ptr,wake) \ - ({ \ - smp_mb(); \ - __asm__ __volatile__( \ - "@ up_op_read\n" \ -" mrs ip, cpsr\n" \ -" orr lr, ip, #128\n" \ -" msr cpsr_c, lr\n" \ -" ldr lr, [%0]\n" \ -" adds lr, lr, %1\n" \ -" str lr, [%0]\n" \ -" msr cpsr_c, ip\n" \ -" moveq ip, %0\n" \ -" bleq " #wake \ - : \ - : "r" (ptr), "I" (1) \ - : "ip", "lr", "cc"); \ - }) - -#endif - -#endif diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h deleted file mode 100644 index bcc8aed..0000000 --- a/include/asm-arm/mach/arch.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * linux/include/asm-arm/mach/arch.h - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASSEMBLY__ - -struct tag; -struct meminfo; -struct sys_timer; - -struct machine_desc { - /* - * Note! The first four elements are used - * by assembler code in head.S, head-common.S - */ - unsigned int nr; /* architecture number */ - unsigned int phys_io; /* start of physical io */ - unsigned int io_pg_offst; /* byte offset for io - * page tabe entry */ - - const char *name; /* architecture name */ - unsigned long boot_params; /* tagged list */ - - unsigned int video_start; /* start of video RAM */ - unsigned int video_end; /* end of video RAM */ - - unsigned int reserve_lp0 :1; /* never has lp0 */ - unsigned int reserve_lp1 :1; /* never has lp1 */ - unsigned int reserve_lp2 :1; /* never has lp2 */ - unsigned int soft_reboot :1; /* soft reboot */ - void (*fixup)(struct machine_desc *, - struct tag *, char **, - struct meminfo *); - void (*map_io)(void);/* IO mapping function */ - void (*init_irq)(void); - struct sys_timer *timer; /* system tick timer */ - void (*init_machine)(void); -}; - -/* - * Set of macros to define architecture features. This is built into - * a table by the linker. - */ -#define MACHINE_START(_type,_name) \ -static const struct machine_desc __mach_desc_##_type \ - __used \ - __attribute__((__section__(".arch.info.init"))) = { \ - .nr = MACH_TYPE_##_type, \ - .name = _name, - -#define MACHINE_END \ -}; - -#endif diff --git a/include/asm-arm/mach/dma.h b/include/asm-arm/mach/dma.h deleted file mode 100644 index e7c4a20..0000000 --- a/include/asm-arm/mach/dma.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * linux/include/asm-arm/mach/dma.h - * - * Copyright (C) 1998-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This header file describes the interface between the generic DMA handler - * (dma.c) and the architecture-specific DMA backends (dma-*.c) - */ - -struct dma_struct; -typedef struct dma_struct dma_t; - -struct dma_ops { - int (*request)(dmach_t, dma_t *); /* optional */ - void (*free)(dmach_t, dma_t *); /* optional */ - void (*enable)(dmach_t, dma_t *); /* mandatory */ - void (*disable)(dmach_t, dma_t *); /* mandatory */ - int (*residue)(dmach_t, dma_t *); /* optional */ - int (*setspeed)(dmach_t, dma_t *, int); /* optional */ - char *type; -}; - -struct dma_struct { - void *addr; /* single DMA address */ - unsigned long count; /* single DMA size */ - struct scatterlist buf; /* single DMA */ - int sgcount; /* number of DMA SG */ - struct scatterlist *sg; /* DMA Scatter-Gather List */ - - unsigned int active:1; /* Transfer active */ - unsigned int invalid:1; /* Address/Count changed */ - - dmamode_t dma_mode; /* DMA mode */ - int speed; /* DMA speed */ - - unsigned int lock; /* Device is allocated */ - const char *device_id; /* Device name */ - - unsigned int dma_base; /* Controller base address */ - int dma_irq; /* Controller IRQ */ - struct scatterlist cur_sg; /* Current controller buffer */ - unsigned int state; - - struct dma_ops *d_ops; -}; - -/* Prototype: void arch_dma_init(dma) - * Purpose : Initialise architecture specific DMA - * Params : dma - pointer to array of DMA structures - */ -extern void arch_dma_init(dma_t *dma); - -extern void isa_init_dma(dma_t *dma); diff --git a/include/asm-arm/mach/flash.h b/include/asm-arm/mach/flash.h deleted file mode 100644 index 05b029e..0000000 --- a/include/asm-arm/mach/flash.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/mach/flash.h - * - * Copyright (C) 2003 Russell King, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_MACH_FLASH_H -#define ASMARM_MACH_FLASH_H - -struct mtd_partition; -struct mtd_info; - -/* - * map_name: the map probe function name - * name: flash device name (eg, as used with mtdparts=) - * width: width of mapped device - * init: method called at driver/device initialisation - * exit: method called at driver/device removal - * set_vpp: method called to enable or disable VPP - * mmcontrol: method called to enable or disable Sync. Burst Read in OneNAND - * parts: optional array of mtd_partitions for static partitioning - * nr_parts: number of mtd_partitions for static partitoning - */ -struct flash_platform_data { - const char *map_name; - const char *name; - unsigned int width; - int (*init)(void); - void (*exit)(void); - void (*set_vpp)(int on); - void (*mmcontrol)(struct mtd_info *mtd, int sync_read); - struct mtd_partition *parts; - unsigned int nr_parts; -}; - -#endif diff --git a/include/asm-arm/mach/irda.h b/include/asm-arm/mach/irda.h deleted file mode 100644 index 58984d9..0000000 --- a/include/asm-arm/mach/irda.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/mach/irda.h - * - * Copyright (C) 2004 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_MACH_IRDA_H -#define __ASM_ARM_MACH_IRDA_H - -struct irda_platform_data { - int (*startup)(struct device *); - void (*shutdown)(struct device *); - int (*set_power)(struct device *, unsigned int state); - void (*set_speed)(struct device *, unsigned int speed); -}; - -#endif diff --git a/include/asm-arm/mach/irq.h b/include/asm-arm/mach/irq.h deleted file mode 100644 index eb0bfba..0000000 --- a/include/asm-arm/mach/irq.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * linux/include/asm-arm/mach/irq.h - * - * Copyright (C) 1995-2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_MACH_IRQ_H -#define __ASM_ARM_MACH_IRQ_H - -#include - -struct seq_file; - -/* - * This is internal. Do not use it. - */ -extern void (*init_arch_irq)(void); -extern void init_FIQ(void); -extern int show_fiq_list(struct seq_file *, void *); - -/* - * Obsolete inline function for calling irq descriptor handlers. - */ -static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc) -{ - desc->handle_irq(irq, desc); -} - -void set_irq_flags(unsigned int irq, unsigned int flags); - -#define IRQF_VALID (1 << 0) -#define IRQF_PROBE (1 << 1) -#define IRQF_NOAUTOEN (1 << 2) - -/* - * This is for easy migration, but should be changed in the source - */ -#define do_bad_IRQ(irq,desc) \ -do { \ - spin_lock(&desc->lock); \ - handle_bad_irq(irq, desc); \ - spin_unlock(&desc->lock); \ -} while(0) - -extern unsigned long irq_err_count; -static inline void ack_bad_irq(int irq) -{ - irq_err_count++; -} - -#endif diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h deleted file mode 100644 index 7ef3c83..0000000 --- a/include/asm-arm/mach/map.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/map.h - * - * Copyright (C) 1999-2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Page table mapping constructs and function prototypes - */ -#include - -struct map_desc { - unsigned long virtual; - unsigned long pfn; - unsigned long length; - unsigned int type; -}; - -/* types 0-3 are defined in asm/io.h */ -#define MT_CACHECLEAN 4 -#define MT_MINICLEAN 5 -#define MT_LOW_VECTORS 6 -#define MT_HIGH_VECTORS 7 -#define MT_MEMORY 8 -#define MT_ROM 9 - -#define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED -#define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 - -#ifdef CONFIG_MMU -extern void iotable_init(struct map_desc *, int); -#else -#define iotable_init(map,num) do { } while (0) -#endif diff --git a/include/asm-arm/mach/mmc.h b/include/asm-arm/mach/mmc.h deleted file mode 100644 index eb91145..0000000 --- a/include/asm-arm/mach/mmc.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * linux/include/asm-arm/mach/mmc.h - */ -#ifndef ASMARM_MACH_MMC_H -#define ASMARM_MACH_MMC_H - -#include - -struct mmc_platform_data { - unsigned int ocr_mask; /* available voltages */ - u32 (*translate_vdd)(struct device *, unsigned int); - unsigned int (*status)(struct device *); -}; - -#endif diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h deleted file mode 100644 index 9d4f6b5..0000000 --- a/include/asm-arm/mach/pci.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * linux/include/asm-arm/mach/pci.h - * - * Copyright (C) 2000 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -struct pci_sys_data; -struct pci_bus; - -struct hw_pci { - struct list_head buses; - int nr_controllers; - int (*setup)(int nr, struct pci_sys_data *); - struct pci_bus *(*scan)(int nr, struct pci_sys_data *); - void (*preinit)(void); - void (*postinit)(void); - u8 (*swizzle)(struct pci_dev *dev, u8 *pin); - int (*map_irq)(struct pci_dev *dev, u8 slot, u8 pin); -}; - -/* - * Per-controller structure - */ -struct pci_sys_data { - struct list_head node; - int busnr; /* primary bus number */ - u64 mem_offset; /* bus->cpu memory mapping offset */ - unsigned long io_offset; /* bus->cpu IO mapping offset */ - struct pci_bus *bus; /* PCI bus */ - struct resource *resource[3]; /* Primary PCI bus resources */ - /* Bridge swizzling */ - u8 (*swizzle)(struct pci_dev *, u8 *); - /* IRQ mapping */ - int (*map_irq)(struct pci_dev *, u8, u8); - struct hw_pci *hw; -}; - -/* - * This is the standard PCI-PCI bridge swizzling algorithm. - */ -u8 pci_std_swizzle(struct pci_dev *dev, u8 *pinp); - -/* - * Call this with your hw_pci struct to initialise the PCI system. - */ -void pci_common_init(struct hw_pci *); - -/* - * PCI controllers - */ -extern int iop3xx_pci_setup(int nr, struct pci_sys_data *); -extern struct pci_bus *iop3xx_pci_scan_bus(int nr, struct pci_sys_data *); -extern void iop3xx_pci_preinit(void); -extern void iop3xx_pci_preinit_cond(void); - -extern int dc21285_setup(int nr, struct pci_sys_data *); -extern struct pci_bus *dc21285_scan_bus(int nr, struct pci_sys_data *); -extern void dc21285_preinit(void); -extern void dc21285_postinit(void); - -extern int via82c505_setup(int nr, struct pci_sys_data *); -extern struct pci_bus *via82c505_scan_bus(int nr, struct pci_sys_data *); -extern void via82c505_init(void *sysdata); - -extern int pci_v3_setup(int nr, struct pci_sys_data *); -extern struct pci_bus *pci_v3_scan_bus(int nr, struct pci_sys_data *); -extern void pci_v3_preinit(void); -extern void pci_v3_postinit(void); diff --git a/include/asm-arm/mach/serial_at91.h b/include/asm-arm/mach/serial_at91.h deleted file mode 100644 index 55b317a..0000000 --- a/include/asm-arm/mach/serial_at91.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/mach/serial_at91.h - * - * Based on serial_sa1100.h by Nicolas Pitre - * - * Copyright (C) 2002 ATMEL Rousset - * - * Low level machine dependent UART functions. - */ - -struct uart_port; - -/* - * This is a temporary structure for registering these - * functions; it is intended to be discarded after boot. - */ -struct atmel_port_fns { - void (*set_mctrl)(struct uart_port *, u_int); - u_int (*get_mctrl)(struct uart_port *); - void (*enable_ms)(struct uart_port *); - void (*pm)(struct uart_port *, u_int, u_int); - int (*set_wake)(struct uart_port *, u_int); - int (*open)(struct uart_port *); - void (*close)(struct uart_port *); -}; - -#if defined(CONFIG_SERIAL_ATMEL) -void atmel_register_uart_fns(struct atmel_port_fns *fns); -#else -#define atmel_register_uart_fns(fns) do { } while (0) -#endif - - diff --git a/include/asm-arm/mach/serial_sa1100.h b/include/asm-arm/mach/serial_sa1100.h deleted file mode 100644 index 20c22bb..0000000 --- a/include/asm-arm/mach/serial_sa1100.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * linux/include/asm-arm/mach/serial_sa1100.h - * - * Author: Nicolas Pitre - * - * Moved to include/asm-arm/mach and changed lots, Russell King - * - * Low level machine dependent UART functions. - */ - -struct uart_port; -struct uart_info; - -/* - * This is a temporary structure for registering these - * functions; it is intended to be discarded after boot. - */ -struct sa1100_port_fns { - void (*set_mctrl)(struct uart_port *, u_int); - u_int (*get_mctrl)(struct uart_port *); - void (*pm)(struct uart_port *, u_int, u_int); - int (*set_wake)(struct uart_port *, u_int); -}; - -#ifdef CONFIG_SERIAL_SA1100 -void sa1100_register_uart_fns(struct sa1100_port_fns *fns); -void sa1100_register_uart(int idx, int port); -#else -#define sa1100_register_uart_fns(fns) do { } while (0) -#define sa1100_register_uart(idx,port) do { } while (0) -#endif diff --git a/include/asm-arm/mach/sharpsl_param.h b/include/asm-arm/mach/sharpsl_param.h deleted file mode 100644 index 7a24ecf..0000000 --- a/include/asm-arm/mach/sharpsl_param.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Hardware parameter area specific to Sharp SL series devices - * - * Copyright (c) 2005 Richard Purdie - * - * Based on Sharp's 2.4 kernel patches - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -struct sharpsl_param_info { - unsigned int comadj_keyword; - unsigned int comadj; - - unsigned int uuid_keyword; - unsigned char uuid[16]; - - unsigned int touch_keyword; - unsigned int touch_xp; - unsigned int touch_yp; - unsigned int touch_xd; - unsigned int touch_yd; - - unsigned int adadj_keyword; - unsigned int adadj; - - unsigned int phad_keyword; - unsigned int phadadj; -} __attribute__((packed)); - - -extern struct sharpsl_param_info sharpsl_param; -extern void sharpsl_save_param(void); - diff --git a/include/asm-arm/mach/time.h b/include/asm-arm/mach/time.h deleted file mode 100644 index 2fd36ea..0000000 --- a/include/asm-arm/mach/time.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * linux/include/asm-arm/mach/time.h - * - * Copyright (C) 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_MACH_TIME_H -#define __ASM_ARM_MACH_TIME_H - -#include - -/* - * This is our kernel timer structure. - * - * - init - * Initialise the kernels jiffy timer source, claim interrupt - * using setup_irq. This is called early on during initialisation - * while interrupts are still disabled on the local CPU. - * - suspend - * Suspend the kernel jiffy timer source, if necessary. This - * is called with interrupts disabled, after all normal devices - * have been suspended. If no action is required, set this to - * NULL. - * - resume - * Resume the kernel jiffy timer source, if necessary. This - * is called with interrupts disabled before any normal devices - * are resumed. If no action is required, set this to NULL. - * - offset - * Return the timer offset in microseconds since the last timer - * interrupt. Note: this must take account of any unprocessed - * timer interrupt which may be pending. - */ -struct sys_timer { - struct sys_device dev; - void (*init)(void); - void (*suspend)(void); - void (*resume)(void); -#ifndef CONFIG_GENERIC_TIME - unsigned long (*offset)(void); -#endif -}; - -extern struct sys_timer *system_timer; -extern void timer_tick(void); - -/* - * Kernel time keeping support. - */ -struct timespec; -extern int (*set_rtc)(void); -extern void save_time_delta(struct timespec *delta, struct timespec *rtc); -extern void restore_time_delta(struct timespec *delta, struct timespec *rtc); - -#endif diff --git a/include/asm-arm/mach/udc_pxa2xx.h b/include/asm-arm/mach/udc_pxa2xx.h deleted file mode 100644 index 9e5ed7c..0000000 --- a/include/asm-arm/mach/udc_pxa2xx.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/include/asm-arm/mach/udc_pxa2xx.h - * - * This supports machine-specific differences in how the PXA2xx - * USB Device Controller (UDC) is wired. - * - * It is set in linux/arch/arm/mach-pxa/.c or in - * linux/arch/mach-ixp4xx/.c and used in - * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c - */ - -struct pxa2xx_udc_mach_info { - int (*udc_is_connected)(void); /* do we see host? */ - void (*udc_command)(int cmd); -#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */ -#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */ - - /* Boards following the design guidelines in the developer's manual, - * with on-chip GPIOs not Lubbock's weird hardware, can have a sane - * VBUS IRQ and omit the methods above. Store the GPIO number - * here; for GPIO 0, also mask in one of the pxa_gpio_mode() bits. - * Note that sometimes the signals go through inverters... - */ - bool gpio_vbus_inverted; - u16 gpio_vbus; /* high == vbus present */ - bool gpio_pullup_inverted; - u16 gpio_pullup; /* high == pullup activated */ -}; - diff --git a/include/asm-arm/mc146818rtc.h b/include/asm-arm/mc146818rtc.h deleted file mode 100644 index 7b81e0c4..0000000 --- a/include/asm-arm/mc146818rtc.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef _ASM_MC146818RTC_H -#define _ASM_MC146818RTC_H - -#include -#include - -#ifndef RTC_PORT -#define RTC_PORT(x) (0x70 + (x)) -#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ -#endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#endif /* _ASM_MC146818RTC_H */ diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h deleted file mode 100644 index 9ba4d71..0000000 --- a/include/asm-arm/memory.h +++ /dev/null @@ -1,334 +0,0 @@ -/* - * linux/include/asm-arm/memory.h - * - * Copyright (C) 2000-2002 Russell King - * modification for nommu, Hyok S. Choi, 2004 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: this file should not be included by non-asm/.h files - */ -#ifndef __ASM_ARM_MEMORY_H -#define __ASM_ARM_MEMORY_H - -/* - * Allow for constants defined here to be used from assembly code - * by prepending the UL suffix only with actual C code compilation. - */ -#ifndef __ASSEMBLY__ -#define UL(x) (x##UL) -#else -#define UL(x) (x) -#endif - -#include -#include -#include - -#ifdef CONFIG_MMU - -#ifndef TASK_SIZE -/* - * TASK_SIZE - the maximum size of a user space task. - * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area - */ -#define TASK_SIZE UL(0xbf000000) -#define TASK_UNMAPPED_BASE UL(0x40000000) -#endif - -/* - * The maximum size of a 26-bit user space task. - */ -#define TASK_SIZE_26 UL(0x04000000) - -/* - * Page offset: 3GB - */ -#ifndef PAGE_OFFSET -#define PAGE_OFFSET UL(0xc0000000) -#endif - -/* - * The module space lives between the addresses given by TASK_SIZE - * and PAGE_OFFSET - it must be within 32MB of the kernel text. - */ -#define MODULE_END (PAGE_OFFSET) -#define MODULE_START (MODULE_END - 16*1048576) - -#if TASK_SIZE > MODULE_START -#error Top of user space clashes with start of module space -#endif - -/* - * The XIP kernel gets mapped at the bottom of the module vm area. - * Since we use sections to map it, this macro replaces the physical address - * with its virtual address while keeping offset from the base section. - */ -#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) - -/* - * Allow 16MB-aligned ioremap pages - */ -#define IOREMAP_MAX_ORDER 24 - -#else /* CONFIG_MMU */ - -/* - * The limitation of user task size can grow up to the end of free ram region. - * It is difficult to define and perhaps will never meet the original meaning - * of this define that was meant to. - * Fortunately, there is no reference for this in noMMU mode, for now. - */ -#ifndef TASK_SIZE -#define TASK_SIZE (CONFIG_DRAM_SIZE) -#endif - -#ifndef TASK_UNMAPPED_BASE -#define TASK_UNMAPPED_BASE UL(0x00000000) -#endif - -#ifndef PHYS_OFFSET -#define PHYS_OFFSET (CONFIG_DRAM_BASE) -#endif - -#ifndef END_MEM -#define END_MEM (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE) -#endif - -#ifndef PAGE_OFFSET -#define PAGE_OFFSET (PHYS_OFFSET) -#endif - -/* - * The module can be at any place in ram in nommu mode. - */ -#define MODULE_END (END_MEM) -#define MODULE_START (PHYS_OFFSET) - -#endif /* !CONFIG_MMU */ - -/* - * Size of DMA-consistent memory region. Must be multiple of 2M, - * between 2MB and 14MB inclusive. - */ -#ifndef CONSISTENT_DMA_SIZE -#define CONSISTENT_DMA_SIZE SZ_2M -#endif - -/* - * Physical vs virtual RAM address space conversion. These are - * private definitions which should NOT be used outside memory.h - * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. - */ -#ifndef __virt_to_phys -#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) -#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET) -#endif - -/* - * Convert a physical address to a Page Frame Number and back - */ -#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) -#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) - -#ifndef __ASSEMBLY__ - -/* - * The DMA mask corresponding to the maximum bus address allocatable - * using GFP_DMA. The default here places no restriction on DMA - * allocations. This must be the smallest DMA mask in the system, - * so a successful GFP_DMA allocation will always satisfy this. - */ -#ifndef ISA_DMA_THRESHOLD -#define ISA_DMA_THRESHOLD (0xffffffffULL) -#endif - -#ifndef arch_adjust_zones -#define arch_adjust_zones(node,size,holes) do { } while (0) -#endif - -/* - * PFNs are used to describe any physical page; this means - * PFN 0 == physical address 0. - * - * This is the PFN of the first RAM page in the kernel - * direct-mapped view. We assume this is the first page - * of RAM in the mem_map as well. - */ -#define PHYS_PFN_OFFSET (PHYS_OFFSET >> PAGE_SHIFT) - -/* - * These are *only* valid on the kernel direct mapped RAM memory. - * Note: Drivers should NOT use these. They are the wrong - * translation for translating DMA addresses. Use the driver - * DMA support - see dma-mapping.h. - */ -static inline unsigned long virt_to_phys(void *x) -{ - return __virt_to_phys((unsigned long)(x)); -} - -static inline void *phys_to_virt(unsigned long x) -{ - return (void *)(__phys_to_virt((unsigned long)(x))); -} - -/* - * Drivers should NOT use these either. - */ -#define __pa(x) __virt_to_phys((unsigned long)(x)) -#define __va(x) ((void *)__phys_to_virt((unsigned long)(x))) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) - -/* - * Virtual <-> DMA view memory address translations - * Again, these are *only* valid on the kernel direct mapped RAM - * memory. Use of these is *deprecated* (and that doesn't mean - * use the __ prefixed forms instead.) See dma-mapping.h. - */ -static inline __deprecated unsigned long virt_to_bus(void *x) -{ - return __virt_to_bus((unsigned long)x); -} - -static inline __deprecated void *bus_to_virt(unsigned long x) -{ - return (void *)__bus_to_virt(x); -} - -/* - * Conversion between a struct page and a physical address. - * - * Note: when converting an unknown physical address to a - * struct page, the resulting pointer must be validated - * using VALID_PAGE(). It must return an invalid struct page - * for any physical address not corresponding to a system - * RAM address. - * - * page_to_pfn(page) convert a struct page * to a PFN number - * pfn_to_page(pfn) convert a _valid_ PFN number to struct page * - * pfn_valid(pfn) indicates whether a PFN number is valid - * - * virt_to_page(k) convert a _valid_ virtual address to struct page * - * virt_addr_valid(k) indicates whether a virtual address is valid - */ -#ifndef CONFIG_DISCONTIGMEM - -#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET - -#ifndef CONFIG_SPARSEMEM -#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) -#endif - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory) - -#define PHYS_TO_NID(addr) (0) - -#else /* CONFIG_DISCONTIGMEM */ - -/* - * This is more complex. We have a set of mem_map arrays spread - * around in memory. - */ -#include - -#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn) -#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT) - -#define pfn_valid(pfn) \ - ({ \ - unsigned int nid = PFN_TO_NID(pfn); \ - int valid = nid < MAX_NUMNODES; \ - if (valid) { \ - pg_data_t *node = NODE_DATA(nid); \ - valid = (pfn - node->node_start_pfn) < \ - node->node_spanned_pages; \ - } \ - valid; \ - }) - -#define virt_to_page(kaddr) \ - (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr)) - -#define virt_addr_valid(kaddr) (KVADDR_TO_NID(kaddr) < MAX_NUMNODES) - -/* - * Common discontigmem stuff. - * PHYS_TO_NID is used by the ARM kernel/setup.c - */ -#define PHYS_TO_NID(addr) PFN_TO_NID((addr) >> PAGE_SHIFT) - -/* - * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory - * and returns the mem_map of that node. - */ -#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr)) - -/* - * Given a page frame number, find the owning node of the memory - * and returns the mem_map of that node. - */ -#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn)) - -#ifdef NODE_MEM_SIZE_BITS -#define NODE_MEM_SIZE_MASK ((1 << NODE_MEM_SIZE_BITS) - 1) - -/* - * Given a kernel address, find the home node of the underlying memory. - */ -#define KVADDR_TO_NID(addr) \ - (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MEM_SIZE_BITS) - -/* - * Given a page frame number, convert it to a node id. - */ -#define PFN_TO_NID(pfn) \ - (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MEM_SIZE_BITS - PAGE_SHIFT)) - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ -#define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & NODE_MEM_SIZE_MASK) >> PAGE_SHIFT) - -#endif /* NODE_MEM_SIZE_BITS */ - -#endif /* !CONFIG_DISCONTIGMEM */ - -/* - * For BIO. "will die". Kill me when bio_to_phys() and bvec_to_phys() die. - */ -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -/* - * Optional device DMA address remapping. Do _not_ use directly! - * We should really eliminate virt_to_bus() here - it's deprecated. - */ -#ifndef __arch_page_to_dma -#define page_to_dma(dev, page) ((dma_addr_t)__virt_to_bus((unsigned long)page_address(page))) -#define dma_to_virt(dev, addr) ((void *)__bus_to_virt(addr)) -#define virt_to_dma(dev, addr) ((dma_addr_t)__virt_to_bus((unsigned long)(addr))) -#else -#define page_to_dma(dev, page) (__arch_page_to_dma(dev, page)) -#define dma_to_virt(dev, addr) (__arch_dma_to_virt(dev, addr)) -#define virt_to_dma(dev, addr) (__arch_virt_to_dma(dev, addr)) -#endif - -/* - * Optional coherency support. Currently used only by selected - * Intel XSC3-based systems. - */ -#ifndef arch_is_coherent -#define arch_is_coherent() 0 -#endif - -#endif - -#include - -#endif diff --git a/include/asm-arm/mman.h b/include/asm-arm/mman.h deleted file mode 100644 index 54570d2..0000000 --- a/include/asm-arm/mman.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ARM_MMAN_H__ -#define __ARM_MMAN_H__ - -#include - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ -#define MAP_LOCKED 0x2000 /* pages are locked */ -#define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#endif /* __ARM_MMAN_H__ */ diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h deleted file mode 100644 index 53099d4..0000000 --- a/include/asm-arm/mmu.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __ARM_MMU_H -#define __ARM_MMU_H - -#ifdef CONFIG_MMU - -typedef struct { -#ifdef CONFIG_CPU_HAS_ASID - unsigned int id; -#endif - unsigned int kvm_seq; -} mm_context_t; - -#ifdef CONFIG_CPU_HAS_ASID -#define ASID(mm) ((mm)->context.id & 255) -#else -#define ASID(mm) (0) -#endif - -#else - -/* - * From nommu.h: - * Copyright (C) 2002, David McCullough - * modified for 2.6 by Hyok S. Choi - */ -typedef struct { - struct vm_list_struct *vmlist; - unsigned long end_brk; -} mm_context_t; - -#endif - -#endif diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h deleted file mode 100644 index 91b9dfd..0000000 --- a/include/asm-arm/mmu_context.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * linux/include/asm-arm/mmu_context.h - * - * Copyright (C) 1996 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 27-06-1996 RMK Created - */ -#ifndef __ASM_ARM_MMU_CONTEXT_H -#define __ASM_ARM_MMU_CONTEXT_H - -#include -#include -#include -#include - -void __check_kvm_seq(struct mm_struct *mm); - -#ifdef CONFIG_CPU_HAS_ASID - -/* - * On ARMv6, we have the following structure in the Context ID: - * - * 31 7 0 - * +-------------------------+-----------+ - * | process ID | ASID | - * +-------------------------+-----------+ - * | context ID | - * +-------------------------------------+ - * - * The ASID is used to tag entries in the CPU caches and TLBs. - * The context ID is used by debuggers and trace logic, and - * should be unique within all running processes. - */ -#define ASID_BITS 8 -#define ASID_MASK ((~0) << ASID_BITS) -#define ASID_FIRST_VERSION (1 << ASID_BITS) - -extern unsigned int cpu_last_asid; - -void __init_new_context(struct task_struct *tsk, struct mm_struct *mm); -void __new_context(struct mm_struct *mm); - -static inline void check_context(struct mm_struct *mm) -{ - if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) - __new_context(mm); - - if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) - __check_kvm_seq(mm); -} - -#define init_new_context(tsk,mm) (__init_new_context(tsk,mm),0) - -#else - -static inline void check_context(struct mm_struct *mm) -{ - if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq)) - __check_kvm_seq(mm); -} - -#define init_new_context(tsk,mm) 0 - -#endif - -#define destroy_context(mm) do { } while(0) - -/* - * This is called when "tsk" is about to enter lazy TLB mode. - * - * mm: describes the currently active mm context - * tsk: task which is entering lazy tlb - * cpu: cpu number which is entering lazy tlb - * - * tsk->mm will be NULL - */ -static inline void -enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -/* - * This is the actual mm switch as far as the scheduler - * is concerned. No registers are touched. We avoid - * calling the CPU specific function when the mm hasn't - * actually changed. - */ -static inline void -switch_mm(struct mm_struct *prev, struct mm_struct *next, - struct task_struct *tsk) -{ -#ifdef CONFIG_MMU - unsigned int cpu = smp_processor_id(); - -#ifdef CONFIG_SMP - /* check for possible thread migration */ - if (!cpus_empty(next->cpu_vm_mask) && !cpu_isset(cpu, next->cpu_vm_mask)) - __flush_icache_all(); -#endif - if (!cpu_test_and_set(cpu, next->cpu_vm_mask) || prev != next) { - check_context(next); - cpu_switch_mm(next->pgd, next); - if (cache_is_vivt()) - cpu_clear(cpu, prev->cpu_vm_mask); - } -#endif -} - -#define deactivate_mm(tsk,mm) do { } while (0) -#define activate_mm(prev,next) switch_mm(prev, next, NULL) - -#endif diff --git a/include/asm-arm/mmzone.h b/include/asm-arm/mmzone.h deleted file mode 100644 index b87de15..0000000 --- a/include/asm-arm/mmzone.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-arm/mmzone.h - * - * 1999-12-29 Nicolas Pitre Created - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_MMZONE_H -#define __ASM_MMZONE_H - -/* - * Currently defined in arch/arm/mm/discontig.c - */ -extern pg_data_t discontig_node_data[]; - -/* - * Return a pointer to the node data for node n. - */ -#define NODE_DATA(nid) (&discontig_node_data[nid]) - -/* - * NODE_MEM_MAP gives the kaddr for the mem_map of the node. - */ -#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map) - -#include - -#endif diff --git a/include/asm-arm/module.h b/include/asm-arm/module.h deleted file mode 100644 index 24b168d..0000000 --- a/include/asm-arm/module.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _ASM_ARM_MODULE_H -#define _ASM_ARM_MODULE_H - -struct mod_arch_specific -{ - int foo; -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -/* - * Include the ARM architecture version. - */ -#define MODULE_ARCH_VERMAGIC "ARMv" __stringify(__LINUX_ARM_ARCH__) " " - -#endif /* _ASM_ARM_MODULE_H */ diff --git a/include/asm-arm/msgbuf.h b/include/asm-arm/msgbuf.h deleted file mode 100644 index 33b35b9..0000000 --- a/include/asm-arm/msgbuf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _ASMARM_MSGBUF_H -#define _ASMARM_MSGBUF_H - -/* - * The msqid64_ds structure for arm architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ - unsigned long __unused1; - __kernel_time_t msg_rtime; /* last msgrcv time */ - unsigned long __unused2; - __kernel_time_t msg_ctime; /* last change time */ - unsigned long __unused3; - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* _ASMARM_MSGBUF_H */ diff --git a/include/asm-arm/mtd-xip.h b/include/asm-arm/mtd-xip.h deleted file mode 100644 index 9eb127cc7..0000000 --- a/include/asm-arm/mtd-xip.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * MTD primitives for XIP support. Architecture specific functions - * - * Do not include this file directly. It's included from linux/mtd/xip.h - * - * Author: Nicolas Pitre - * Created: Nov 2, 2004 - * Copyright: (C) 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $ - */ - -#ifndef __ARM_MTD_XIP_H__ -#define __ARM_MTD_XIP_H__ - -#include -#include - -/* fill instruction prefetch */ -#define xip_iprefetch() do { asm volatile (".rep 8; nop; .endr"); } while (0) - -#endif /* __ARM_MTD_XIP_H__ */ diff --git a/include/asm-arm/mutex.h b/include/asm-arm/mutex.h deleted file mode 100644 index 020bd98..0000000 --- a/include/asm-arm/mutex.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * include/asm-arm/mutex.h - * - * ARM optimized mutex locking primitives - * - * Please look into asm-generic/mutex-xchg.h for a formal definition. - */ -#ifndef _ASM_MUTEX_H -#define _ASM_MUTEX_H - -#if __LINUX_ARM_ARCH__ < 6 -/* On pre-ARMv6 hardware the swp based implementation is the most efficient. */ -# include -#else - -/* - * Attempting to lock a mutex on ARMv6+ can be done with a bastardized - * atomic decrement (it is not a reliable atomic decrement but it satisfies - * the defined semantics for our purpose, while being smaller and faster - * than a real atomic decrement or atomic swap. The idea is to attempt - * decrementing the lock value only once. If once decremented it isn't zero, - * or if its store-back fails due to a dispute on the exclusive store, we - * simply bail out immediately through the slow path where the lock will be - * reattempted until it succeeds. - */ -static inline void -__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *)) -{ - int __ex_flag, __res; - - __asm__ ( - - "ldrex %0, [%2] \n\t" - "sub %0, %0, #1 \n\t" - "strex %1, %0, [%2] " - - : "=&r" (__res), "=&r" (__ex_flag) - : "r" (&(count)->counter) - : "cc","memory" ); - - __res |= __ex_flag; - if (unlikely(__res != 0)) - fail_fn(count); -} - -static inline int -__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *)) -{ - int __ex_flag, __res; - - __asm__ ( - - "ldrex %0, [%2] \n\t" - "sub %0, %0, #1 \n\t" - "strex %1, %0, [%2] " - - : "=&r" (__res), "=&r" (__ex_flag) - : "r" (&(count)->counter) - : "cc","memory" ); - - __res |= __ex_flag; - if (unlikely(__res != 0)) - __res = fail_fn(count); - return __res; -} - -/* - * Same trick is used for the unlock fast path. However the original value, - * rather than the result, is used to test for success in order to have - * better generated assembly. - */ -static inline void -__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *)) -{ - int __ex_flag, __res, __orig; - - __asm__ ( - - "ldrex %0, [%3] \n\t" - "add %1, %0, #1 \n\t" - "strex %2, %1, [%3] " - - : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag) - : "r" (&(count)->counter) - : "cc","memory" ); - - __orig |= __ex_flag; - if (unlikely(__orig != 0)) - fail_fn(count); -} - -/* - * If the unlock was done on a contended lock, or if the unlock simply fails - * then the mutex remains locked. - */ -#define __mutex_slowpath_needs_to_unlock() 1 - -/* - * For __mutex_fastpath_trylock we use another construct which could be - * described as a "single value cmpxchg". - * - * This provides the needed trylock semantics like cmpxchg would, but it is - * lighter and less generic than a true cmpxchg implementation. - */ -static inline int -__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *)) -{ - int __ex_flag, __res, __orig; - - __asm__ ( - - "1: ldrex %0, [%3] \n\t" - "subs %1, %0, #1 \n\t" - "strexeq %2, %1, [%3] \n\t" - "movlt %0, #0 \n\t" - "cmpeq %2, #0 \n\t" - "bgt 1b " - - : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag) - : "r" (&count->counter) - : "cc", "memory" ); - - return __orig; -} - -#endif -#endif diff --git a/include/asm-arm/nwflash.h b/include/asm-arm/nwflash.h deleted file mode 100644 index 04e5a55..0000000 --- a/include/asm-arm/nwflash.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef _FLASH_H -#define _FLASH_H - -#define FLASH_MINOR 160 /* MAJOR is 10 - miscdevice */ -#define CMD_WRITE_DISABLE 0 -#define CMD_WRITE_ENABLE 0x28 -#define CMD_WRITE_BASE64K_ENABLE 0x47 - -#endif /* _FLASH_H */ diff --git a/include/asm-arm/page-nommu.h b/include/asm-arm/page-nommu.h deleted file mode 100644 index ea1cde8..0000000 --- a/include/asm-arm/page-nommu.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/page-nommu.h - * - * Copyright (C) 2004 Hyok S. Choi - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _ASMARM_PAGE_NOMMU_H -#define _ASMARM_PAGE_NOMMU_H - -#if !defined(CONFIG_SMALL_TASKS) && PAGE_SHIFT < 13 -#define KTHREAD_SIZE (8192) -#else -#define KTHREAD_SIZE PAGE_SIZE -#endif - -#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) -#define free_user_page(page, addr) free_page(addr) - -#define clear_page(page) memset((page), 0, PAGE_SIZE) -#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE) - -#define clear_user_page(page, vaddr, pg) clear_page(page) -#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) - -/* - * These are used to make use of C type-checking.. - */ -typedef unsigned long pte_t; -typedef unsigned long pmd_t; -typedef unsigned long pgd_t[2]; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) ((x)[0]) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pgprot(x) (x) - -extern unsigned long memory_start; -extern unsigned long memory_end; - -#endif diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h deleted file mode 100644 index 7c5fc55..0000000 --- a/include/asm-arm/page.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * linux/include/asm-arm/page.h - * - * Copyright (C) 1995-2003 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_PAGE_H -#define _ASMARM_PAGE_H - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#ifndef __ASSEMBLY__ - -#ifndef CONFIG_MMU - -#include "page-nommu.h" - -#else - -#include - -/* - * User Space Model - * ================ - * - * This section selects the correct set of functions for dealing with - * page-based copying and clearing for user space for the particular - * processor(s) we're building for. - * - * We have the following to choose from: - * v3 - ARMv3 - * v4wt - ARMv4 with writethrough cache, without minicache - * v4wb - ARMv4 with writeback cache, without minicache - * v4_mc - ARMv4 with minicache - * xscale - Xscale - * xsc3 - XScalev3 - */ -#undef _USER -#undef MULTI_USER - -#ifdef CONFIG_CPU_COPY_V3 -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER v3 -# endif -#endif - -#ifdef CONFIG_CPU_COPY_V4WT -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER v4wt -# endif -#endif - -#ifdef CONFIG_CPU_COPY_V4WB -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER v4wb -# endif -#endif - -#ifdef CONFIG_CPU_COPY_FEROCEON -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER feroceon -# endif -#endif - -#ifdef CONFIG_CPU_SA1100 -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER v4_mc -# endif -#endif - -#ifdef CONFIG_CPU_XSCALE -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER xscale_mc -# endif -#endif - -#ifdef CONFIG_CPU_XSC3 -# ifdef _USER -# define MULTI_USER 1 -# else -# define _USER xsc3_mc -# endif -#endif - -#ifdef CONFIG_CPU_COPY_V6 -# define MULTI_USER 1 -#endif - -#if !defined(_USER) && !defined(MULTI_USER) -#error Unknown user operations model -#endif - -struct cpu_user_fns { - void (*cpu_clear_user_page)(void *p, unsigned long user); - void (*cpu_copy_user_page)(void *to, const void *from, - unsigned long user); -}; - -#ifdef MULTI_USER -extern struct cpu_user_fns cpu_user; - -#define __cpu_clear_user_page cpu_user.cpu_clear_user_page -#define __cpu_copy_user_page cpu_user.cpu_copy_user_page - -#else - -#define __cpu_clear_user_page __glue(_USER,_clear_user_page) -#define __cpu_copy_user_page __glue(_USER,_copy_user_page) - -extern void __cpu_clear_user_page(void *p, unsigned long user); -extern void __cpu_copy_user_page(void *to, const void *from, - unsigned long user); -#endif - -#define clear_user_page(addr,vaddr,pg) __cpu_clear_user_page(addr, vaddr) -#define copy_user_page(to,from,vaddr,pg) __cpu_copy_user_page(to, from, vaddr) - -#define clear_page(page) memzero((void *)(page), PAGE_SIZE) -extern void copy_page(void *to, const void *from); - -#undef STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking.. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd; } pmd_t; -typedef struct { unsigned long pgd[2]; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd[0]) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef unsigned long pte_t; -typedef unsigned long pmd_t; -typedef unsigned long pgd_t[2]; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) ((x)[0]) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __pmd(x) (x) -#define __pgprot(x) (x) - -#endif /* STRICT_MM_TYPECHECKS */ - -#endif /* CONFIG_MMU */ - -typedef struct page *pgtable_t; - -#include - -#endif /* !__ASSEMBLY__ */ - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -/* - * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers. - */ -#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5) -#define ARCH_SLAB_MINALIGN 8 -#endif - -#include - -#endif diff --git a/include/asm-arm/param.h b/include/asm-arm/param.h deleted file mode 100644 index 1580646..0000000 --- a/include/asm-arm/param.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * linux/include/asm-arm/param.h - * - * Copyright (C) 1995-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PARAM_H -#define __ASM_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ /* Internal kernel timer frequency */ -# define USER_HZ 100 /* User interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) /* like times() */ -#else -# define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -/* max length of hostname */ -#define MAXHOSTNAMELEN 64 - -#endif - diff --git a/include/asm-arm/parport.h b/include/asm-arm/parport.h deleted file mode 100644 index f2f90c7..0000000 --- a/include/asm-arm/parport.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/parport.h: ARM-specific parport initialisation - * - * Copyright (C) 1999, 2000 Tim Waugh - * - * This file should only be included by drivers/parport/parport_pc.c. - */ - -#ifndef __ASMARM_PARPORT_H -#define __ASMARM_PARPORT_H - -static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma); -static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) -{ - return parport_pc_find_isa_ports (autoirq, autodma); -} - -#endif /* !(_ASMARM_PARPORT_H) */ diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h deleted file mode 100644 index 2d84792..0000000 --- a/include/asm-arm/pci.h +++ /dev/null @@ -1,91 +0,0 @@ -#ifndef ASMARM_PCI_H -#define ASMARM_PCI_H - -#ifdef __KERNEL__ -#include - -#include /* for PCIBIOS_MIN_* */ - -#define pcibios_scan_all_fns(a, b) 0 - -#ifdef CONFIG_PCI_HOST_ITE8152 -/* ITE bridge requires setting latency timer to avoid early bus access - termination by PIC bus mater devices -*/ -extern void pcibios_set_master(struct pci_dev *dev); -#else -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} -#endif - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* - * The PCI address space does equal the physical memory address space. - * The networking and block device layers use this boolean for bounce - * buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -/* - * Whether pci_unmap_{single,page} is a nop depends upon the - * configuration. - */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif - -#define HAVE_PCI_MMAP -extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, int write_combine); - -extern void -pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, - struct resource *res); - -extern void -pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, - struct pci_bus_region *region); - -static inline struct resource * -pcibios_select_root(struct pci_dev *pdev, struct resource *res) -{ - struct resource *root = NULL; - - if (res->flags & IORESOURCE_IO) - root = &ioport_resource; - if (res->flags & IORESOURCE_MEM) - root = &iomem_resource; - - return root; -} - -/* - * Dummy implementation; always return 0. - */ -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) -{ - return 0; -} - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-arm/percpu.h b/include/asm-arm/percpu.h deleted file mode 100644 index b4e32d8..0000000 --- a/include/asm-arm/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARM_PERCPU -#define __ARM_PERCPU - -#include - -#endif diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h deleted file mode 100644 index 163b030..0000000 --- a/include/asm-arm/pgalloc.h +++ /dev/null @@ -1,136 +0,0 @@ -/* - * linux/include/asm-arm/pgalloc.h - * - * Copyright (C) 2000-2001 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_PGALLOC_H -#define _ASMARM_PGALLOC_H - -#include -#include -#include -#include -#include - -#define check_pgt_cache() do { } while (0) - -#ifdef CONFIG_MMU - -#define _PAGE_USER_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER)) -#define _PAGE_KERNEL_TABLE (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL)) - -/* - * Since we have only two-level page tables, these are trivial - */ -#define pmd_alloc_one(mm,addr) ({ BUG(); ((pmd_t *)2); }) -#define pmd_free(mm, pmd) do { } while (0) -#define pgd_populate(mm,pmd,pte) BUG() - -extern pgd_t *get_pgd_slow(struct mm_struct *mm); -extern void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd); - -#define pgd_alloc(mm) get_pgd_slow(mm) -#define pgd_free(mm, pgd) free_pgd_slow(mm, pgd) - -/* - * Allocate one PTE table. - * - * This actually allocates two hardware PTE tables, but we wrap this up - * into one table thus: - * - * +------------+ - * | h/w pt 0 | - * +------------+ - * | h/w pt 1 | - * +------------+ - * | Linux pt 0 | - * +------------+ - * | Linux pt 1 | - * +------------+ - */ -static inline pte_t * -pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr) -{ - pte_t *pte; - - pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO); - if (pte) { - clean_dcache_area(pte, sizeof(pte_t) * PTRS_PER_PTE); - pte += PTRS_PER_PTE; - } - - return pte; -} - -static inline pgtable_t -pte_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - struct page *pte; - - pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0); - if (pte) { - void *page = page_address(pte); - clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE); - pgtable_page_ctor(pte); - } - - return pte; -} - -/* - * Free one PTE table. - */ -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - if (pte) { - pte -= PTRS_PER_PTE; - free_page((unsigned long)pte); - } -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t pte) -{ - pgtable_page_dtor(pte); - __free_page(pte); -} - -static inline void __pmd_populate(pmd_t *pmdp, unsigned long pmdval) -{ - pmdp[0] = __pmd(pmdval); - pmdp[1] = __pmd(pmdval + 256 * sizeof(pte_t)); - flush_pmd_entry(pmdp); -} - -/* - * Populate the pmdp entry with a pointer to the pte. This pmd is part - * of the mm address space. - * - * Ensure that we always set both PMD entries. - */ -static inline void -pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *ptep) -{ - unsigned long pte_ptr = (unsigned long)ptep; - - /* - * The pmd must be loaded with the physical - * address of the PTE table - */ - pte_ptr -= PTRS_PER_PTE * sizeof(void *); - __pmd_populate(pmdp, __pa(pte_ptr) | _PAGE_KERNEL_TABLE); -} - -static inline void -pmd_populate(struct mm_struct *mm, pmd_t *pmdp, pgtable_t ptep) -{ - __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE); -} -#define pmd_pgtable(pmd) pmd_page(pmd) - -#endif /* CONFIG_MMU */ - -#endif diff --git a/include/asm-arm/pgtable-hwdef.h b/include/asm-arm/pgtable-hwdef.h deleted file mode 100644 index f3b5120..0000000 --- a/include/asm-arm/pgtable-hwdef.h +++ /dev/null @@ -1,90 +0,0 @@ -/* - * linux/include/asm-arm/pgtable-hwdef.h - * - * Copyright (C) 1995-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_PGTABLE_HWDEF_H -#define _ASMARM_PGTABLE_HWDEF_H - -/* - * Hardware page table definitions. - * - * + Level 1 descriptor (PMD) - * - common - */ -#define PMD_TYPE_MASK (3 << 0) -#define PMD_TYPE_FAULT (0 << 0) -#define PMD_TYPE_TABLE (1 << 0) -#define PMD_TYPE_SECT (2 << 0) -#define PMD_BIT4 (1 << 4) -#define PMD_DOMAIN(x) ((x) << 5) -#define PMD_PROTECTION (1 << 9) /* v5 */ -/* - * - section - */ -#define PMD_SECT_BUFFERABLE (1 << 2) -#define PMD_SECT_CACHEABLE (1 << 3) -#define PMD_SECT_XN (1 << 4) /* v6 */ -#define PMD_SECT_AP_WRITE (1 << 10) -#define PMD_SECT_AP_READ (1 << 11) -#define PMD_SECT_TEX(x) ((x) << 12) /* v5 */ -#define PMD_SECT_APX (1 << 15) /* v6 */ -#define PMD_SECT_S (1 << 16) /* v6 */ -#define PMD_SECT_nG (1 << 17) /* v6 */ -#define PMD_SECT_SUPER (1 << 18) /* v6 */ - -#define PMD_SECT_UNCACHED (0) -#define PMD_SECT_BUFFERED (PMD_SECT_BUFFERABLE) -#define PMD_SECT_WT (PMD_SECT_CACHEABLE) -#define PMD_SECT_WB (PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_MINICACHE (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE) -#define PMD_SECT_WBWA (PMD_SECT_TEX(1) | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE) -#define PMD_SECT_NONSHARED_DEV (PMD_SECT_TEX(2)) - -/* - * - coarse table (not used) - */ - -/* - * + Level 2 descriptor (PTE) - * - common - */ -#define PTE_TYPE_MASK (3 << 0) -#define PTE_TYPE_FAULT (0 << 0) -#define PTE_TYPE_LARGE (1 << 0) -#define PTE_TYPE_SMALL (2 << 0) -#define PTE_TYPE_EXT (3 << 0) /* v5 */ -#define PTE_BUFFERABLE (1 << 2) -#define PTE_CACHEABLE (1 << 3) - -/* - * - extended small page/tiny page - */ -#define PTE_EXT_XN (1 << 0) /* v6 */ -#define PTE_EXT_AP_MASK (3 << 4) -#define PTE_EXT_AP0 (1 << 4) -#define PTE_EXT_AP1 (2 << 4) -#define PTE_EXT_AP_UNO_SRO (0 << 4) -#define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) -#define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) -#define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) -#define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ -#define PTE_EXT_APX (1 << 9) /* v6 */ -#define PTE_EXT_COHERENT (1 << 9) /* XScale3 */ -#define PTE_EXT_SHARED (1 << 10) /* v6 */ -#define PTE_EXT_NG (1 << 11) /* v6 */ - -/* - * - small page - */ -#define PTE_SMALL_AP_MASK (0xff << 4) -#define PTE_SMALL_AP_UNO_SRO (0x00 << 4) -#define PTE_SMALL_AP_UNO_SRW (0x55 << 4) -#define PTE_SMALL_AP_URO_SRW (0xaa << 4) -#define PTE_SMALL_AP_URW_SRW (0xff << 4) - -#endif diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h deleted file mode 100644 index 386fcc1..0000000 --- a/include/asm-arm/pgtable-nommu.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * linux/include/asm-arm/pgtable-nommu.h - * - * Copyright (C) 1995-2002 Russell King - * Copyright (C) 2004 Hyok S. Choi - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_PGTABLE_NOMMU_H -#define _ASMARM_PGTABLE_NOMMU_H - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -/* - * Trivial page table functions. - */ -#define pgd_present(pgd) (1) -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_clear(pgdp) -#define kern_addr_valid(addr) (1) -#define pmd_offset(a, b) ((void *)0) -/* FIXME */ -/* - * PMD_SHIFT determines the size of the area a second-level page table can map - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#define PGDIR_SHIFT 21 - -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) -/* FIXME */ - -#define PAGE_NONE __pgprot(0) -#define PAGE_SHARED __pgprot(0) -#define PAGE_COPY __pgprot(0) -#define PAGE_READONLY __pgprot(0) -#define PAGE_KERNEL __pgprot(0) - -#define swapper_pg_dir ((pgd_t *) 0) - -#define __swp_type(x) (0) -#define __swp_offset(x) (0) -#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - - -typedef pte_t *pte_addr_t; - -static inline int pte_file(pte_t pte) { return 0; } - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -#define ZERO_PAGE(vaddr) (virt_to_page(0)) - -/* - * Mark the prot value as uncacheable and unbufferable. - */ -#define pgprot_noncached(prot) __pgprot(0) -#define pgprot_writecombine(prot) __pgprot(0) - - -/* - * These would be in other places but having them here reduces the diffs. - */ -extern unsigned int kobjsize(const void *objp); - -/* - * No page table caches to initialise. - */ -#define pgtable_cache_init() do { } while (0) -#define io_remap_page_range remap_page_range -#define io_remap_pfn_range remap_pfn_range - - -/* - * All 32bit addresses are effectively valid for vmalloc... - * Sort of meaningless for non-VM targets. - */ -#define VMALLOC_START 0 -#define VMALLOC_END 0xffffffff - -#define FIRST_USER_ADDRESS (0) - -#include - -#else - -/* - * dummy tlb and user structures. - */ -#define v3_tlb_fns (0) -#define v4_tlb_fns (0) -#define v4wb_tlb_fns (0) -#define v4wbi_tlb_fns (0) -#define v6wbi_tlb_fns (0) -#define v7wbi_tlb_fns (0) - -#define v3_user_fns (0) -#define v4_user_fns (0) -#define v4_mc_user_fns (0) -#define v4wb_user_fns (0) -#define v4wt_user_fns (0) -#define v6_user_fns (0) -#define xscale_mc_user_fns (0) - -#endif /*__ASSEMBLY__*/ - -#endif /* _ASMARM_PGTABLE_H */ diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h deleted file mode 100644 index 5571c13..0000000 --- a/include/asm-arm/pgtable.h +++ /dev/null @@ -1,401 +0,0 @@ -/* - * linux/include/asm-arm/pgtable.h - * - * Copyright (C) 1995-2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_PGTABLE_H -#define _ASMARM_PGTABLE_H - -#include -#include - -#ifndef CONFIG_MMU - -#include "pgtable-nommu.h" - -#else - -#include -#include -#include - -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - * - * Note that platforms may override VMALLOC_START, but they must provide - * VMALLOC_END. VMALLOC_END defines the (exclusive) limit of this space, - * which may not overlap IO space. - */ -#ifndef VMALLOC_START -#define VMALLOC_OFFSET (8*1024*1024) -#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) -#endif - -/* - * Hardware-wise, we have a two level page table structure, where the first - * level has 4096 entries, and the second level has 256 entries. Each entry - * is one 32-bit word. Most of the bits in the second level entry are used - * by hardware, and there aren't any "accessed" and "dirty" bits. - * - * Linux on the other hand has a three level page table structure, which can - * be wrapped to fit a two level page table structure easily - using the PGD - * and PTE only. However, Linux also expects one "PTE" table per page, and - * at least a "dirty" bit. - * - * Therefore, we tweak the implementation slightly - we tell Linux that we - * have 2048 entries in the first level, each of which is 8 bytes (iow, two - * hardware pointers to the second level.) The second level contains two - * hardware PTE tables arranged contiguously, followed by Linux versions - * which contain the state information Linux needs. We, therefore, end up - * with 512 entries in the "PTE" level. - * - * This leads to the page tables having the following layout: - * - * pgd pte - * | | - * +--------+ +0 - * | |-----> +------------+ +0 - * +- - - - + +4 | h/w pt 0 | - * | |-----> +------------+ +1024 - * +--------+ +8 | h/w pt 1 | - * | | +------------+ +2048 - * +- - - - + | Linux pt 0 | - * | | +------------+ +3072 - * +--------+ | Linux pt 1 | - * | | +------------+ +4096 - * - * See L_PTE_xxx below for definitions of bits in the "Linux pt", and - * PTE_xxx for definitions of bits appearing in the "h/w pt". - * - * PMD_xxx definitions refer to bits in the first level page table. - * - * The "dirty" bit is emulated by only granting hardware write permission - * iff the page is marked "writable" and "dirty" in the Linux PTE. This - * means that a write to a clean page will cause a permission fault, and - * the Linux MM layer will mark the page dirty via handle_pte_fault(). - * For the hardware to notice the permission change, the TLB entry must - * be flushed, and ptep_set_access_flags() does that for us. - * - * The "accessed" or "young" bit is emulated by a similar method; we only - * allow accesses to the page if the "young" bit is set. Accesses to the - * page will cause a fault, and handle_pte_fault() will set the young bit - * for us as long as the page is marked present in the corresponding Linux - * PTE entry. Again, ptep_set_access_flags() will ensure that the TLB is - * up to date. - * - * However, when the "young" bit is cleared, we deny access to the page - * by clearing the hardware PTE. Currently Linux does not flush the TLB - * for us in this case, which means the TLB will retain the transation - * until either the TLB entry is evicted under pressure, or a context - * switch which changes the user space mapping occurs. - */ -#define PTRS_PER_PTE 512 -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD 2048 - -/* - * PMD_SHIFT determines the size of the area a second-level page table can map - * PGDIR_SHIFT determines what a third-level page table entry can map - */ -#define PMD_SHIFT 21 -#define PGDIR_SHIFT 21 - -#define LIBRARY_TEXT_START 0x0c000000 - -#ifndef __ASSEMBLY__ -extern void __pte_error(const char *file, int line, unsigned long val); -extern void __pmd_error(const char *file, int line, unsigned long val); -extern void __pgd_error(const char *file, int line, unsigned long val); - -#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte)) -#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd)) -#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd)) -#endif /* !__ASSEMBLY__ */ - -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* - * This is the lowest virtual address we can permit any user space - * mapping to be mapped at. This is particularly important for - * non-high vector CPUs. - */ -#define FIRST_USER_ADDRESS PAGE_SIZE - -#define FIRST_USER_PGD_NR 1 -#define USER_PTRS_PER_PGD ((TASK_SIZE/PGDIR_SIZE) - FIRST_USER_PGD_NR) - -/* - * section address mask and size definitions. - */ -#define SECTION_SHIFT 20 -#define SECTION_SIZE (1UL << SECTION_SHIFT) -#define SECTION_MASK (~(SECTION_SIZE-1)) - -/* - * ARMv6 supersection address mask and size definitions. - */ -#define SUPERSECTION_SHIFT 24 -#define SUPERSECTION_SIZE (1UL << SUPERSECTION_SHIFT) -#define SUPERSECTION_MASK (~(SUPERSECTION_SIZE-1)) - -/* - * "Linux" PTE definitions. - * - * We keep two sets of PTEs - the hardware and the linux version. - * This allows greater flexibility in the way we map the Linux bits - * onto the hardware tables, and allows us to have YOUNG and DIRTY - * bits. - * - * The PTE table pointer refers to the hardware entries; the "Linux" - * entries are stored 1024 bytes below. - */ -#define L_PTE_PRESENT (1 << 0) -#define L_PTE_FILE (1 << 1) /* only when !PRESENT */ -#define L_PTE_YOUNG (1 << 1) -#define L_PTE_BUFFERABLE (1 << 2) /* matches PTE */ -#define L_PTE_CACHEABLE (1 << 3) /* matches PTE */ -#define L_PTE_USER (1 << 4) -#define L_PTE_WRITE (1 << 5) -#define L_PTE_EXEC (1 << 6) -#define L_PTE_DIRTY (1 << 7) -#define L_PTE_SHARED (1 << 10) /* shared(v6), coherent(xsc3) */ - -#ifndef __ASSEMBLY__ - -/* - * The pgprot_* and protection_map entries will be fixed up in runtime - * to include the cachable and bufferable bits based on memory policy, - * as well as any architecture dependent bits like global/ASID and SMP - * shared mapping bits. - */ -#define _L_PTE_DEFAULT L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_CACHEABLE | L_PTE_BUFFERABLE -#define _L_PTE_READ L_PTE_USER | L_PTE_EXEC - -extern pgprot_t pgprot_user; -extern pgprot_t pgprot_kernel; - -#define PAGE_NONE pgprot_user -#define PAGE_COPY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) -#define PAGE_SHARED __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ | \ - L_PTE_WRITE) -#define PAGE_READONLY __pgprot(pgprot_val(pgprot_user) | _L_PTE_READ) -#define PAGE_KERNEL pgprot_kernel - -#define __PAGE_NONE __pgprot(_L_PTE_DEFAULT) -#define __PAGE_COPY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) -#define __PAGE_SHARED __pgprot(_L_PTE_DEFAULT | _L_PTE_READ | L_PTE_WRITE) -#define __PAGE_READONLY __pgprot(_L_PTE_DEFAULT | _L_PTE_READ) - -#endif /* __ASSEMBLY__ */ - -/* - * The table below defines the page protection levels that we insert into our - * Linux page table version. These get translated into the best that the - * architecture can perform. Note that on most ARM hardware: - * 1) We cannot do execute protection - * 2) If we could do execute protection, then read is implied - * 3) write implies read permissions - */ -#define __P000 __PAGE_NONE -#define __P001 __PAGE_READONLY -#define __P010 __PAGE_COPY -#define __P011 __PAGE_COPY -#define __P100 __PAGE_READONLY -#define __P101 __PAGE_READONLY -#define __P110 __PAGE_COPY -#define __P111 __PAGE_COPY - -#define __S000 __PAGE_NONE -#define __S001 __PAGE_READONLY -#define __S010 __PAGE_SHARED -#define __S011 __PAGE_SHARED -#define __S100 __PAGE_READONLY -#define __S101 __PAGE_READONLY -#define __S110 __PAGE_SHARED -#define __S111 __PAGE_SHARED - -#ifndef __ASSEMBLY__ -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern struct page *empty_zero_page; -#define ZERO_PAGE(vaddr) (empty_zero_page) - -#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) -#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))) - -#define pte_none(pte) (!pte_val(pte)) -#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) -#define pte_page(pte) (pfn_to_page(pte_pfn(pte))) -#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) -#define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) -#define pte_offset_map_nested(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr)) -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) - -#define set_pte_at(mm,addr,ptep,pteval) do { \ - set_pte_ext(ptep, pteval, (addr) >= TASK_SIZE ? 0 : PTE_EXT_NG); \ - } while (0) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) -#define pte_write(pte) (pte_val(pte) & L_PTE_WRITE) -#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY) -#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG) -#define pte_special(pte) (0) - -/* - * The following only works if pte_present() is not true. - */ -#define pte_file(pte) (pte_val(pte) & L_PTE_FILE) -#define pte_to_pgoff(x) (pte_val(x) >> 2) -#define pgoff_to_pte(x) __pte(((x) << 2) | L_PTE_FILE) - -#define PTE_FILE_MAX_BITS 30 - -#define PTE_BIT_FUNC(fn,op) \ -static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } - -PTE_BIT_FUNC(wrprotect, &= ~L_PTE_WRITE); -PTE_BIT_FUNC(mkwrite, |= L_PTE_WRITE); -PTE_BIT_FUNC(mkclean, &= ~L_PTE_DIRTY); -PTE_BIT_FUNC(mkdirty, |= L_PTE_DIRTY); -PTE_BIT_FUNC(mkold, &= ~L_PTE_YOUNG); -PTE_BIT_FUNC(mkyoung, |= L_PTE_YOUNG); - -static inline pte_t pte_mkspecial(pte_t pte) { return pte; } - -/* - * Mark the prot value as uncacheable and unbufferable. - */ -#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~(L_PTE_CACHEABLE | L_PTE_BUFFERABLE)) -#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~L_PTE_CACHEABLE) - -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_present(pmd) (pmd_val(pmd)) -#define pmd_bad(pmd) (pmd_val(pmd) & 2) - -#define copy_pmd(pmdpd,pmdps) \ - do { \ - pmdpd[0] = pmdps[0]; \ - pmdpd[1] = pmdps[1]; \ - flush_pmd_entry(pmdpd); \ - } while (0) - -#define pmd_clear(pmdp) \ - do { \ - pmdp[0] = __pmd(0); \ - pmdp[1] = __pmd(0); \ - clean_pmd_entry(pmdp); \ - } while (0) - -static inline pte_t *pmd_page_vaddr(pmd_t pmd) -{ - unsigned long ptr; - - ptr = pmd_val(pmd) & ~(PTRS_PER_PTE * sizeof(void *) - 1); - ptr += PTRS_PER_PTE * sizeof(void *); - - return __va(ptr); -} - -#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd))) - -/* - * Permanent address of a page. We never have highmem, so this is trivial. - */ -#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT)) - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot) - -/* - * The "pgd_xxx()" functions here are trivial for a folded two-level - * setup: the pgd is never bad, and a pmd always exists (as it's folded - * into the pgd entry) - */ -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_present(pgd) (1) -#define pgd_clear(pgdp) do { } while (0) -#define set_pgd(pgd,pgdp) do { } while (0) - -/* to find an entry in a page-table-directory */ -#define pgd_index(addr) ((addr) >> PGDIR_SHIFT) - -#define pgd_offset(mm, addr) ((mm)->pgd+pgd_index(addr)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(addr) pgd_offset(&init_mm, addr) - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(dir, addr) ((pmd_t *)(dir)) - -/* Find an entry in the third-level page table.. */ -#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - const unsigned long mask = L_PTE_EXEC | L_PTE_WRITE | L_PTE_USER; - pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); - return pte; -} - -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; - -/* Encode and decode a swap entry. - * - * We support up to 32GB of swap on 4k machines - */ -#define __swp_type(x) (((x).val >> 2) & 0x7f) -#define __swp_offset(x) ((x).val >> 9) -#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val }) - -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -/* FIXME: this is not correct */ -#define kern_addr_valid(addr) (1) - -#include - -/* - * We provide our own arch_get_unmapped_area to cope with VIPT caches. - */ -#define HAVE_ARCH_UNMAPPED_AREA - -/* - * remap a physical page `pfn' of size `size' with page protection `prot' - * into virtual address `from' - */ -#define io_remap_pfn_range(vma,from,pfn,size,prot) \ - remap_pfn_range(vma, from, pfn, size, prot) - -#define pgtable_cache_init() do { } while (0) - -#endif /* !__ASSEMBLY__ */ - -#endif /* CONFIG_MMU */ - -#endif /* _ASMARM_PGTABLE_H */ diff --git a/include/asm-arm/poll.h b/include/asm-arm/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-arm/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/posix_types.h b/include/asm-arm/posix_types.h deleted file mode 100644 index c37379d..0000000 --- a/include/asm-arm/posix_types.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * linux/include/asm-arm/posix_types.h - * - * Copyright (C) 1996-1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 27-06-1996 RMK Created - */ -#ifndef __ARCH_ARM_POSIX_TYPES_H -#define __ARCH_ARM_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -#define __FD_SET(fd, fdsetp) \ - (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] |= (1<<((fd) & 31))) - -#undef __FD_CLR -#define __FD_CLR(fd, fdsetp) \ - (((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] &= ~(1<<((fd) & 31))) - -#undef __FD_ISSET -#define __FD_ISSET(fd, fdsetp) \ - ((((fd_set *)(fdsetp))->fds_bits[(fd) >> 5] & (1<<((fd) & 31))) != 0) - -#undef __FD_ZERO -#define __FD_ZERO(fdsetp) \ - (memset (fdsetp, 0, sizeof (*(fd_set *)(fdsetp)))) - -#endif - -#endif diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h deleted file mode 100644 index 75ec760..0000000 --- a/include/asm-arm/proc-fns.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - * linux/include/asm-arm/proc-fns.h - * - * Copyright (C) 1997-1999 Russell King - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROCFNS_H -#define __ASM_PROCFNS_H - -#ifdef __KERNEL__ - - -/* - * Work out if we need multiple CPU support - */ -#undef MULTI_CPU -#undef CPU_NAME - -/* - * CPU_NAME - the prefix for CPU related functions - */ - -#ifdef CONFIG_CPU_32 -# ifdef CONFIG_CPU_ARM610 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm6 -# endif -# endif -# ifdef CONFIG_CPU_ARM7TDMI -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm7tdmi -# endif -# endif -# ifdef CONFIG_CPU_ARM710 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm7 -# endif -# endif -# ifdef CONFIG_CPU_ARM720T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm720 -# endif -# endif -# ifdef CONFIG_CPU_ARM740T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm740 -# endif -# endif -# ifdef CONFIG_CPU_ARM9TDMI -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm9tdmi -# endif -# endif -# ifdef CONFIG_CPU_ARM920T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm920 -# endif -# endif -# ifdef CONFIG_CPU_ARM922T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm922 -# endif -# endif -# ifdef CONFIG_CPU_ARM925T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm925 -# endif -# endif -# ifdef CONFIG_CPU_ARM926T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm926 -# endif -# endif -# ifdef CONFIG_CPU_ARM940T -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm940 -# endif -# endif -# ifdef CONFIG_CPU_ARM946E -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm946 -# endif -# endif -# ifdef CONFIG_CPU_SA110 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_sa110 -# endif -# endif -# ifdef CONFIG_CPU_SA1100 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_sa1100 -# endif -# endif -# ifdef CONFIG_CPU_ARM1020 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1020 -# endif -# endif -# ifdef CONFIG_CPU_ARM1020E -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1020e -# endif -# endif -# ifdef CONFIG_CPU_ARM1022 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1022 -# endif -# endif -# ifdef CONFIG_CPU_ARM1026 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_arm1026 -# endif -# endif -# ifdef CONFIG_CPU_XSCALE -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_xscale -# endif -# endif -# ifdef CONFIG_CPU_XSC3 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_xsc3 -# endif -# endif -# ifdef CONFIG_CPU_FEROCEON -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_feroceon -# endif -# endif -# ifdef CONFIG_CPU_V6 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_v6 -# endif -# endif -# ifdef CONFIG_CPU_V7 -# ifdef CPU_NAME -# undef MULTI_CPU -# define MULTI_CPU -# else -# define CPU_NAME cpu_v7 -# endif -# endif -#endif - -#ifndef __ASSEMBLY__ - -#ifndef MULTI_CPU -#include -#else -#include -#endif - -#include - -#ifdef CONFIG_MMU - -#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) - -#define cpu_get_pgd() \ - ({ \ - unsigned long pg; \ - __asm__("mrc p15, 0, %0, c2, c0, 0" \ - : "=r" (pg) : : "cc"); \ - pg &= ~0x3fff; \ - (pgd_t *)phys_to_virt(pg); \ - }) - -#endif - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* __ASM_PROCFNS_H */ diff --git a/include/asm-arm/processor.h b/include/asm-arm/processor.h deleted file mode 100644 index bd8029e..0000000 --- a/include/asm-arm/processor.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * linux/include/asm-arm/processor.h - * - * Copyright (C) 1995-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARM_PROCESSOR_H -#define __ASM_ARM_PROCESSOR_H - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -#ifdef __KERNEL__ - -#include -#include - -#ifdef __KERNEL__ -#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \ - TASK_SIZE : TASK_SIZE_26) -#define STACK_TOP_MAX TASK_SIZE -#endif - -union debug_insn { - u32 arm; - u16 thumb; -}; - -struct debug_entry { - u32 address; - union debug_insn insn; -}; - -struct debug_info { - int nsaved; - struct debug_entry bp[2]; -}; - -struct thread_struct { - /* fault info */ - unsigned long address; - unsigned long trap_no; - unsigned long error_code; - /* debugging */ - struct debug_info debug; -}; - -#define INIT_THREAD { } - -#ifdef CONFIG_MMU -#define nommu_start_thread(regs) do { } while (0) -#else -#define nommu_start_thread(regs) regs->ARM_r10 = current->mm->start_data -#endif - -#define start_thread(regs,pc,sp) \ -({ \ - unsigned long *stack = (unsigned long *)sp; \ - set_fs(USER_DS); \ - memzero(regs->uregs, sizeof(regs->uregs)); \ - if (current->personality & ADDR_LIMIT_32BIT) \ - regs->ARM_cpsr = USR_MODE; \ - else \ - regs->ARM_cpsr = USR26_MODE; \ - if (elf_hwcap & HWCAP_THUMB && pc & 1) \ - regs->ARM_cpsr |= PSR_T_BIT; \ - regs->ARM_pc = pc & ~1; /* pc */ \ - regs->ARM_sp = sp; /* sp */ \ - regs->ARM_r2 = stack[2]; /* r2 (envp) */ \ - regs->ARM_r1 = stack[1]; /* r1 (argv) */ \ - regs->ARM_r0 = stack[0]; /* r0 (argc) */ \ - nommu_start_thread(regs); \ -}) - -/* Forward declaration, a strange C thing */ -struct task_struct; - -/* Free all resources held by a thread. */ -extern void release_thread(struct task_struct *); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -unsigned long get_wchan(struct task_struct *p); - -#define cpu_relax() barrier() - -/* - * Create a new kernel thread - */ -extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -#define task_pt_regs(p) \ - ((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1) - -#define KSTK_EIP(tsk) task_pt_regs(tsk)->ARM_pc -#define KSTK_ESP(tsk) task_pt_regs(tsk)->ARM_sp - -/* - * Prefetching support - only ARMv5. - */ -#if __LINUX_ARM_ARCH__ >= 5 - -#define ARCH_HAS_PREFETCH -static inline void prefetch(const void *ptr) -{ - __asm__ __volatile__( - "pld\t%0" - : - : "o" (*(char *)ptr) - : "cc"); -} - -#define ARCH_HAS_PREFETCHW -#define prefetchw(ptr) prefetch(ptr) - -#define ARCH_HAS_SPINLOCK_PREFETCH -#define spin_lock_prefetch(x) do { } while (0) - -#endif - -#endif - -#endif /* __ASM_ARM_PROCESSOR_H */ diff --git a/include/asm-arm/procinfo.h b/include/asm-arm/procinfo.h deleted file mode 100644 index 4d3c685..0000000 --- a/include/asm-arm/procinfo.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/procinfo.h - * - * Copyright (C) 1996-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_PROCINFO_H -#define __ASM_PROCINFO_H - -#ifdef __KERNEL__ - -struct cpu_tlb_fns; -struct cpu_user_fns; -struct cpu_cache_fns; -struct processor; - -/* - * Note! struct processor is always defined if we're - * using MULTI_CPU, otherwise this entry is unused, - * but still exists. - * - * NOTE! The following structure is defined by assembly - * language, NOT C code. For more information, check: - * arch/arm/mm/proc-*.S and arch/arm/kernel/head.S - */ -struct proc_info_list { - unsigned int cpu_val; - unsigned int cpu_mask; - unsigned long __cpu_mm_mmu_flags; /* used by head.S */ - unsigned long __cpu_io_mmu_flags; /* used by head.S */ - unsigned long __cpu_flush; /* used by head.S */ - const char *arch_name; - const char *elf_name; - unsigned int elf_hwcap; - const char *cpu_name; - struct processor *proc; - struct cpu_tlb_fns *tlb; - struct cpu_user_fns *user; - struct cpu_cache_fns *cache; -}; - -#else /* __KERNEL__ */ -#include -#warning "Please include asm/elf.h instead" -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h deleted file mode 100644 index 8382b75..0000000 --- a/include/asm-arm/ptrace.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * linux/include/asm-arm/ptrace.h - * - * Copyright (C) 1996-2003 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_PTRACE_H -#define __ASM_ARM_PTRACE_H - -#include - -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -/* PTRACE_ATTACH is 16 */ -/* PTRACE_DETACH is 17 */ -#define PTRACE_GETWMMXREGS 18 -#define PTRACE_SETWMMXREGS 19 -/* 20 is unused */ -#define PTRACE_OLDSETOPTIONS 21 -#define PTRACE_GET_THREAD_AREA 22 -#define PTRACE_SET_SYSCALL 23 -/* PTRACE_SYSCALL is 24 */ -#define PTRACE_GETCRUNCHREGS 25 -#define PTRACE_SETCRUNCHREGS 26 - -/* - * PSR bits - */ -#define USR26_MODE 0x00000000 -#define FIQ26_MODE 0x00000001 -#define IRQ26_MODE 0x00000002 -#define SVC26_MODE 0x00000003 -#define USR_MODE 0x00000010 -#define FIQ_MODE 0x00000011 -#define IRQ_MODE 0x00000012 -#define SVC_MODE 0x00000013 -#define ABT_MODE 0x00000017 -#define UND_MODE 0x0000001b -#define SYSTEM_MODE 0x0000001f -#define MODE32_BIT 0x00000010 -#define MODE_MASK 0x0000001f -#define PSR_T_BIT 0x00000020 -#define PSR_F_BIT 0x00000040 -#define PSR_I_BIT 0x00000080 -#define PSR_A_BIT 0x00000100 -#define PSR_J_BIT 0x01000000 -#define PSR_Q_BIT 0x08000000 -#define PSR_V_BIT 0x10000000 -#define PSR_C_BIT 0x20000000 -#define PSR_Z_BIT 0x40000000 -#define PSR_N_BIT 0x80000000 -#define PCMASK 0 - -/* - * Groups of PSR bits - */ -#define PSR_f 0xff000000 /* Flags */ -#define PSR_s 0x00ff0000 /* Status */ -#define PSR_x 0x0000ff00 /* Extension */ -#define PSR_c 0x000000ff /* Control */ - -#ifndef __ASSEMBLY__ - -/* - * This struct defines the way the registers are stored on the - * stack during a system call. Note that sizeof(struct pt_regs) - * has to be a multiple of 8. - */ -struct pt_regs { - long uregs[18]; -}; - -#define ARM_cpsr uregs[16] -#define ARM_pc uregs[15] -#define ARM_lr uregs[14] -#define ARM_sp uregs[13] -#define ARM_ip uregs[12] -#define ARM_fp uregs[11] -#define ARM_r10 uregs[10] -#define ARM_r9 uregs[9] -#define ARM_r8 uregs[8] -#define ARM_r7 uregs[7] -#define ARM_r6 uregs[6] -#define ARM_r5 uregs[5] -#define ARM_r4 uregs[4] -#define ARM_r3 uregs[3] -#define ARM_r2 uregs[2] -#define ARM_r1 uregs[1] -#define ARM_r0 uregs[0] -#define ARM_ORIG_r0 uregs[17] - -#ifdef __KERNEL__ - -#define user_mode(regs) \ - (((regs)->ARM_cpsr & 0xf) == 0) - -#ifdef CONFIG_ARM_THUMB -#define thumb_mode(regs) \ - (((regs)->ARM_cpsr & PSR_T_BIT)) -#else -#define thumb_mode(regs) (0) -#endif - -#define isa_mode(regs) \ - ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \ - (((regs)->ARM_cpsr & PSR_T_BIT) >> 5)) - -#define processor_mode(regs) \ - ((regs)->ARM_cpsr & MODE_MASK) - -#define interrupts_enabled(regs) \ - (!((regs)->ARM_cpsr & PSR_I_BIT)) - -#define fast_interrupts_enabled(regs) \ - (!((regs)->ARM_cpsr & PSR_F_BIT)) - -/* Are the current registers suitable for user mode? - * (used to maintain security in signal handlers) - */ -static inline int valid_user_regs(struct pt_regs *regs) -{ - if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) { - regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); - return 1; - } - - /* - * Force CPSR to something logical... - */ - regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT; - if (!(elf_hwcap & HWCAP_26BIT)) - regs->ARM_cpsr |= USR_MODE; - - return 0; -} - -#define pc_pointer(v) \ - ((v) & ~PCMASK) - -#define instruction_pointer(regs) \ - (pc_pointer((regs)->ARM_pc)) - -#ifdef CONFIG_SMP -extern unsigned long profile_pc(struct pt_regs *regs); -#else -#define profile_pc(regs) instruction_pointer(regs) -#endif - -#define predicate(x) ((x) & 0xf0000000) -#define PREDICATE_ALWAYS 0xe0000000 - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#endif - diff --git a/include/asm-arm/resource.h b/include/asm-arm/resource.h deleted file mode 100644 index 734b581..0000000 --- a/include/asm-arm/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ARM_RESOURCE_H -#define _ARM_RESOURCE_H - -#include - -#endif diff --git a/include/asm-arm/scatterlist.h b/include/asm-arm/scatterlist.h deleted file mode 100644 index ca0a37d..0000000 --- a/include/asm-arm/scatterlist.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _ASMARM_SCATTERLIST_H -#define _ASMARM_SCATTERLIST_H - -#include -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; /* buffer offset */ - dma_addr_t dma_address; /* dma address */ - unsigned int length; /* length */ -}; - -/* - * These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#endif /* _ASMARM_SCATTERLIST_H */ diff --git a/include/asm-arm/sections.h b/include/asm-arm/sections.h deleted file mode 100644 index 2b8c516..0000000 --- a/include/asm-arm/sections.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-arm/segment.h b/include/asm-arm/segment.h deleted file mode 100644 index 9e24c21..0000000 --- a/include/asm-arm/segment.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_ARM_SEGMENT_H -#define __ASM_ARM_SEGMENT_H - -#define __KERNEL_CS 0x0 -#define __KERNEL_DS 0x0 - -#define __USER_CS 0x1 -#define __USER_DS 0x1 - -#endif /* __ASM_ARM_SEGMENT_H */ - diff --git a/include/asm-arm/sembuf.h b/include/asm-arm/sembuf.h deleted file mode 100644 index 1c02839..0000000 --- a/include/asm-arm/sembuf.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASMARM_SEMBUF_H -#define _ASMARM_SEMBUF_H - -/* - * The semid64_ds structure for arm architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ - unsigned long __unused1; - __kernel_time_t sem_ctime; /* last change time */ - unsigned long __unused2; - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _ASMARM_SEMBUF_H */ diff --git a/include/asm-arm/serial.h b/include/asm-arm/serial.h deleted file mode 100644 index 015b262..0000000 --- a/include/asm-arm/serial.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/serial.h - * - * Copyright (C) 1996 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 15-10-1996 RMK Created - */ - -#ifndef __ASM_SERIAL_H -#define __ASM_SERIAL_H - -#define BASE_BAUD (1843200 / 16) - -#endif diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h deleted file mode 100644 index 7bbf105..0000000 --- a/include/asm-arm/setup.h +++ /dev/null @@ -1,226 +0,0 @@ -/* - * linux/include/asm/setup.h - * - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Structure passed to kernel to tell it about the - * hardware it's running on. See Documentation/arm/Setup - * for more info. - */ -#ifndef __ASMARM_SETUP_H -#define __ASMARM_SETUP_H - -#include - -#define COMMAND_LINE_SIZE 1024 - -/* The list ends with an ATAG_NONE node. */ -#define ATAG_NONE 0x00000000 - -struct tag_header { - __u32 size; - __u32 tag; -}; - -/* The list must start with an ATAG_CORE node */ -#define ATAG_CORE 0x54410001 - -struct tag_core { - __u32 flags; /* bit 0 = read-only */ - __u32 pagesize; - __u32 rootdev; -}; - -/* it is allowed to have multiple ATAG_MEM nodes */ -#define ATAG_MEM 0x54410002 - -struct tag_mem32 { - __u32 size; - __u32 start; /* physical start address */ -}; - -/* VGA text type displays */ -#define ATAG_VIDEOTEXT 0x54410003 - -struct tag_videotext { - __u8 x; - __u8 y; - __u16 video_page; - __u8 video_mode; - __u8 video_cols; - __u16 video_ega_bx; - __u8 video_lines; - __u8 video_isvga; - __u16 video_points; -}; - -/* describes how the ramdisk will be used in kernel */ -#define ATAG_RAMDISK 0x54410004 - -struct tag_ramdisk { - __u32 flags; /* bit 0 = load, bit 1 = prompt */ - __u32 size; /* decompressed ramdisk size in _kilo_ bytes */ - __u32 start; /* starting block of floppy-based RAM disk image */ -}; - -/* describes where the compressed ramdisk image lives (virtual address) */ -/* - * this one accidentally used virtual addresses - as such, - * it's deprecated. - */ -#define ATAG_INITRD 0x54410005 - -/* describes where the compressed ramdisk image lives (physical address) */ -#define ATAG_INITRD2 0x54420005 - -struct tag_initrd { - __u32 start; /* physical start address */ - __u32 size; /* size of compressed ramdisk image in bytes */ -}; - -/* board serial number. "64 bits should be enough for everybody" */ -#define ATAG_SERIAL 0x54410006 - -struct tag_serialnr { - __u32 low; - __u32 high; -}; - -/* board revision */ -#define ATAG_REVISION 0x54410007 - -struct tag_revision { - __u32 rev; -}; - -/* initial values for vesafb-type framebuffers. see struct screen_info - * in include/linux/tty.h - */ -#define ATAG_VIDEOLFB 0x54410008 - -struct tag_videolfb { - __u16 lfb_width; - __u16 lfb_height; - __u16 lfb_depth; - __u16 lfb_linelength; - __u32 lfb_base; - __u32 lfb_size; - __u8 red_size; - __u8 red_pos; - __u8 green_size; - __u8 green_pos; - __u8 blue_size; - __u8 blue_pos; - __u8 rsvd_size; - __u8 rsvd_pos; -}; - -/* command line: \0 terminated string */ -#define ATAG_CMDLINE 0x54410009 - -struct tag_cmdline { - char cmdline[1]; /* this is the minimum size */ -}; - -/* acorn RiscPC specific information */ -#define ATAG_ACORN 0x41000101 - -struct tag_acorn { - __u32 memc_control_reg; - __u32 vram_pages; - __u8 sounddefault; - __u8 adfsdrives; -}; - -/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */ -#define ATAG_MEMCLK 0x41000402 - -struct tag_memclk { - __u32 fmemclk; -}; - -struct tag { - struct tag_header hdr; - union { - struct tag_core core; - struct tag_mem32 mem; - struct tag_videotext videotext; - struct tag_ramdisk ramdisk; - struct tag_initrd initrd; - struct tag_serialnr serialnr; - struct tag_revision revision; - struct tag_videolfb videolfb; - struct tag_cmdline cmdline; - - /* - * Acorn specific - */ - struct tag_acorn acorn; - - /* - * DC21285 specific - */ - struct tag_memclk memclk; - } u; -}; - -struct tagtable { - __u32 tag; - int (*parse)(const struct tag *); -}; - -#define tag_member_present(tag,member) \ - ((unsigned long)(&((struct tag *)0L)->member + 1) \ - <= (tag)->hdr.size * 4) - -#define tag_next(t) ((struct tag *)((__u32 *)(t) + (t)->hdr.size)) -#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) - -#define for_each_tag(t,base) \ - for (t = base; t->hdr.size; t = tag_next(t)) - -#ifdef __KERNEL__ - -#define __tag __used __attribute__((__section__(".taglist.init"))) -#define __tagtable(tag, fn) \ -static struct tagtable __tagtable_##fn __tag = { tag, fn } - -/* - * Memory map description - */ -#ifdef CONFIG_ARCH_LH7A40X -# define NR_BANKS 16 -#else -# define NR_BANKS 8 -#endif - -struct membank { - unsigned long start; - unsigned long size; - int node; -}; - -struct meminfo { - int nr_banks; - struct membank bank[NR_BANKS]; -}; - -/* - * Early command line parameters. - */ -struct early_params { - const char *arg; - void (*fn)(char **p); -}; - -#define __early_param(name,fn) \ -static struct early_params __early_##fn __used \ -__attribute__((__section__(".early_param.init"))) = { name, fn } - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-arm/shmbuf.h b/include/asm-arm/shmbuf.h deleted file mode 100644 index 2e5c67b..0000000 --- a/include/asm-arm/shmbuf.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASMARM_SHMBUF_H -#define _ASMARM_SHMBUF_H - -/* - * The shmid64_ds structure for arm architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ - unsigned long __unused1; - __kernel_time_t shm_dtime; /* last detach time */ - unsigned long __unused2; - __kernel_time_t shm_ctime; /* last change time */ - unsigned long __unused3; - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused4; - unsigned long __unused5; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _ASMARM_SHMBUF_H */ diff --git a/include/asm-arm/shmparam.h b/include/asm-arm/shmparam.h deleted file mode 100644 index a5223b3..0000000 --- a/include/asm-arm/shmparam.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASMARM_SHMPARAM_H -#define _ASMARM_SHMPARAM_H - -/* - * This should be the size of the virtually indexed cache/ways, - * or page size, whichever is greater since the cache aliases - * every size/ways bytes. - */ -#define SHMLBA (4 * PAGE_SIZE) /* attach addr a multiple of this */ - -/* - * Enforce SHMLBA in shmat - */ -#define __ARCH_FORCE_SHMLBA - -#endif /* _ASMARM_SHMPARAM_H */ diff --git a/include/asm-arm/sigcontext.h b/include/asm-arm/sigcontext.h deleted file mode 100644 index fc0b80b..0000000 --- a/include/asm-arm/sigcontext.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _ASMARM_SIGCONTEXT_H -#define _ASMARM_SIGCONTEXT_H - -/* - * Signal context structure - contains all info to do with the state - * before the signal handler was invoked. Note: only add new entries - * to the end of the structure. - */ -struct sigcontext { - unsigned long trap_no; - unsigned long error_code; - unsigned long oldmask; - unsigned long arm_r0; - unsigned long arm_r1; - unsigned long arm_r2; - unsigned long arm_r3; - unsigned long arm_r4; - unsigned long arm_r5; - unsigned long arm_r6; - unsigned long arm_r7; - unsigned long arm_r8; - unsigned long arm_r9; - unsigned long arm_r10; - unsigned long arm_fp; - unsigned long arm_ip; - unsigned long arm_sp; - unsigned long arm_lr; - unsigned long arm_pc; - unsigned long arm_cpsr; - unsigned long fault_address; -}; - - -#endif diff --git a/include/asm-arm/siginfo.h b/include/asm-arm/siginfo.h deleted file mode 100644 index 5e21852..0000000 --- a/include/asm-arm/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASMARM_SIGINFO_H -#define _ASMARM_SIGINFO_H - -#include - -#endif diff --git a/include/asm-arm/signal.h b/include/asm-arm/signal.h deleted file mode 100644 index d0fb487..0000000 --- a/include/asm-arm/signal.h +++ /dev/null @@ -1,164 +0,0 @@ -#ifndef _ASMARM_SIGNAL_H -#define _ASMARM_SIGNAL_H - -#include - -/* Avoid too many header ordering problems. */ -struct siginfo; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -#define SIGSWI 32 - -/* - * SA_FLAGS values: - * - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_SIGINFO deliver the signal with SIGINFO structs - * SA_THIRTYTWO delivers the signal in 32-bit mode, even if the task - * is running in 26-bit. - * SA_ONSTACK allows alternate signal stacks (see sigaltstack(2)). - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NODEFER prevents the current signal from being masked in the handler. - * SA_RESETHAND clears the handler when the signal is delivered. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_THIRTYTWO 0x02000000 -#define SA_RESTORER 0x04000000 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -#ifdef __KERNEL__ -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - __sigrestore_t sa_restorer; -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ -#include -#define ptrace_signal_deliver(regs, cookie) do { } while (0) -#endif - -#endif diff --git a/include/asm-arm/sizes.h b/include/asm-arm/sizes.h deleted file mode 100644 index 503843d..0000000 --- a/include/asm-arm/sizes.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ -#define SZ_16 0x00000010 -#define SZ_256 0x00000100 -#define SZ_512 0x00000200 - -#define SZ_1K 0x00000400 -#define SZ_4K 0x00001000 -#define SZ_8K 0x00002000 -#define SZ_16K 0x00004000 -#define SZ_64K 0x00010000 -#define SZ_128K 0x00020000 -#define SZ_256K 0x00040000 -#define SZ_512K 0x00080000 - -#define SZ_1M 0x00100000 -#define SZ_2M 0x00200000 -#define SZ_4M 0x00400000 -#define SZ_8M 0x00800000 -#define SZ_16M 0x01000000 -#define SZ_32M 0x02000000 -#define SZ_64M 0x04000000 -#define SZ_128M 0x08000000 -#define SZ_256M 0x10000000 -#define SZ_512M 0x20000000 - -#define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 - -#endif - -/* END */ diff --git a/include/asm-arm/smp.h b/include/asm-arm/smp.h deleted file mode 100644 index 7fffa24..0000000 --- a/include/asm-arm/smp.h +++ /dev/null @@ -1,147 +0,0 @@ -/* - * linux/include/asm-arm/smp.h - * - * Copyright (C) 2004-2005 ARM Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_SMP_H -#define __ASM_ARM_SMP_H - -#include -#include -#include - -#include - -#ifndef CONFIG_SMP -# error " included in non-SMP build" -#endif - -#define raw_smp_processor_id() (current_thread_info()->cpu) - -/* - * at the moment, there's not a big penalty for changing CPUs - * (the >big< penalty is running SMP in the first place) - */ -#define PROC_CHANGE_PENALTY 15 - -struct seq_file; - -/* - * generate IPI list text - */ -extern void show_ipi_list(struct seq_file *p); - -/* - * Called from assembly code, this handles an IPI. - */ -asmlinkage void do_IPI(struct pt_regs *regs); - -/* - * Setup the SMP cpu_possible_map - */ -extern void smp_init_cpus(void); - -/* - * Move global data into per-processor storage. - */ -extern void smp_store_cpu_info(unsigned int cpuid); - -/* - * Raise an IPI cross call on CPUs in callmap. - */ -extern void smp_cross_call(cpumask_t callmap); - -/* - * Broadcast a timer interrupt to the other CPUs. - */ -extern void smp_send_timer(void); - -/* - * Broadcast a clock event to other CPUs. - */ -extern void smp_timer_broadcast(cpumask_t mask); - -/* - * Boot a secondary CPU, and assign it the specified idle task. - * This also gives us the initial stack to use for this CPU. - */ -extern int boot_secondary(unsigned int cpu, struct task_struct *); - -/* - * Called from platform specific assembly code, this is the - * secondary CPU entry point. - */ -asmlinkage void secondary_start_kernel(void); - -/* - * Perform platform specific initialisation of the specified CPU. - */ -extern void platform_secondary_init(unsigned int cpu); - -/* - * Initial data for bringing up a secondary CPU. - */ -struct secondary_data { - unsigned long pgdir; - void *stack; -}; -extern struct secondary_data secondary_data; - -extern int __cpu_disable(void); -extern int mach_cpu_disable(unsigned int cpu); - -extern void __cpu_die(unsigned int cpu); -extern void cpu_die(void); - -extern void platform_cpu_die(unsigned int cpu); -extern int platform_cpu_kill(unsigned int cpu); -extern void platform_cpu_enable(unsigned int cpu); - -extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); - -/* - * Local timer interrupt handling function (can be IPI'ed). - */ -extern void local_timer_interrupt(void); - -#ifdef CONFIG_LOCAL_TIMERS - -/* - * Stop a local timer interrupt. - */ -extern void local_timer_stop(unsigned int cpu); - -/* - * Platform provides this to acknowledge a local timer IRQ - */ -extern int local_timer_ack(void); - -#else - -static inline void local_timer_stop(unsigned int cpu) -{ -} - -#endif - -/* - * Setup a local timer interrupt for a CPU. - */ -extern void local_timer_setup(unsigned int cpu); - -/* - * show local interrupt info - */ -extern void show_local_irqs(struct seq_file *); - -/* - * Called from assembly, this is the local timer IRQ handler - */ -asmlinkage void do_local_timer(struct pt_regs *); - -#endif /* ifndef __ASM_ARM_SMP_H */ diff --git a/include/asm-arm/socket.h b/include/asm-arm/socket.h deleted file mode 100644 index 6817be9..0000000 --- a/include/asm-arm/socket.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef _ASMARM_SOCKET_H -#define _ASMARM_SOCKET_H - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_SNDBUFFORCE 32 -#define SO_RCVBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* _ASM_SOCKET_H */ diff --git a/include/asm-arm/sockios.h b/include/asm-arm/sockios.h deleted file mode 100644 index a2588a2..0000000 --- a/include/asm-arm/sockios.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ARCH_ARM_SOCKIOS_H -#define __ARCH_ARM_SOCKIOS_H - -/* Socket-level I/O control calls. */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif diff --git a/include/asm-arm/sparsemem.h b/include/asm-arm/sparsemem.h deleted file mode 100644 index 2771581..0000000 --- a/include/asm-arm/sparsemem.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef ASMARM_SPARSEMEM_H -#define ASMARM_SPARSEMEM_H - -#include - -#define MAX_PHYSADDR_BITS 32 -#define MAX_PHYSMEM_BITS 32 -#define SECTION_SIZE_BITS NODE_MEM_SIZE_BITS - -#endif diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h deleted file mode 100644 index 2b41ebb..0000000 --- a/include/asm-arm/spinlock.h +++ /dev/null @@ -1,224 +0,0 @@ -#ifndef __ASM_SPINLOCK_H -#define __ASM_SPINLOCK_H - -#if __LINUX_ARM_ARCH__ < 6 -#error SMP not supported on pre-ARMv6 CPUs -#endif - -/* - * ARMv6 Spin-locking. - * - * We exclusively read the old value. If it is zero, we may have - * won the lock, so we try exclusively storing it. A memory barrier - * is required after we get a lock, and before we release it, because - * V6 CPUs are assumed to have weakly ordered memory. - * - * Unlocked value: 0 - * Locked value: 1 - */ - -#define __raw_spin_is_locked(x) ((x)->lock != 0) -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) - -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldrex %0, [%1]\n" -" teq %0, #0\n" -#ifdef CONFIG_CPU_32v6K -" wfene\n" -#endif -" strexeq %0, %2, [%1]\n" -" teqeq %0, #0\n" -" bne 1b" - : "=&r" (tmp) - : "r" (&lock->lock), "r" (1) - : "cc"); - - smp_mb(); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned long tmp; - - __asm__ __volatile__( -" ldrex %0, [%1]\n" -" teq %0, #0\n" -" strexeq %0, %2, [%1]" - : "=&r" (tmp) - : "r" (&lock->lock), "r" (1) - : "cc"); - - if (tmp == 0) { - smp_mb(); - return 1; - } else { - return 0; - } -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - smp_mb(); - - __asm__ __volatile__( -" str %1, [%0]\n" -#ifdef CONFIG_CPU_32v6K -" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ -" sev" -#endif - : - : "r" (&lock->lock), "r" (0) - : "cc"); -} - -/* - * RWLOCKS - * - * - * Write locks are easy - we just set bit 31. When unlocking, we can - * just write zero since the lock is exclusively held. - */ - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldrex %0, [%1]\n" -" teq %0, #0\n" -#ifdef CONFIG_CPU_32v6K -" wfene\n" -#endif -" strexeq %0, %2, [%1]\n" -" teq %0, #0\n" -" bne 1b" - : "=&r" (tmp) - : "r" (&rw->lock), "r" (0x80000000) - : "cc"); - - smp_mb(); -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldrex %0, [%1]\n" -" teq %0, #0\n" -" strexeq %0, %2, [%1]" - : "=&r" (tmp) - : "r" (&rw->lock), "r" (0x80000000) - : "cc"); - - if (tmp == 0) { - smp_mb(); - return 1; - } else { - return 0; - } -} - -static inline void __raw_write_unlock(raw_rwlock_t *rw) -{ - smp_mb(); - - __asm__ __volatile__( - "str %1, [%0]\n" -#ifdef CONFIG_CPU_32v6K -" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ -" sev\n" -#endif - : - : "r" (&rw->lock), "r" (0) - : "cc"); -} - -/* write_can_lock - would write_trylock() succeed? */ -#define __raw_write_can_lock(x) ((x)->lock == 0) - -/* - * Read locks are a bit more hairy: - * - Exclusively load the lock value. - * - Increment it. - * - Store new lock value if positive, and we still own this location. - * If the value is negative, we've already failed. - * - If we failed to store the value, we want a negative result. - * - If we failed, try again. - * Unlocking is similarly hairy. We may have multiple read locks - * currently active. However, we know we won't have any write - * locks. - */ -static inline void __raw_read_lock(raw_rwlock_t *rw) -{ - unsigned long tmp, tmp2; - - __asm__ __volatile__( -"1: ldrex %0, [%2]\n" -" adds %0, %0, #1\n" -" strexpl %1, %0, [%2]\n" -#ifdef CONFIG_CPU_32v6K -" wfemi\n" -#endif -" rsbpls %0, %1, #0\n" -" bmi 1b" - : "=&r" (tmp), "=&r" (tmp2) - : "r" (&rw->lock) - : "cc"); - - smp_mb(); -} - -static inline void __raw_read_unlock(raw_rwlock_t *rw) -{ - unsigned long tmp, tmp2; - - smp_mb(); - - __asm__ __volatile__( -"1: ldrex %0, [%2]\n" -" sub %0, %0, #1\n" -" strex %1, %0, [%2]\n" -" teq %1, #0\n" -" bne 1b" -#ifdef CONFIG_CPU_32v6K -"\n cmp %0, #0\n" -" mcreq p15, 0, %0, c7, c10, 4\n" -" seveq" -#endif - : "=&r" (tmp), "=&r" (tmp2) - : "r" (&rw->lock) - : "cc"); -} - -static inline int __raw_read_trylock(raw_rwlock_t *rw) -{ - unsigned long tmp, tmp2 = 1; - - __asm__ __volatile__( -"1: ldrex %0, [%2]\n" -" adds %0, %0, #1\n" -" strexpl %1, %0, [%2]\n" - : "=&r" (tmp), "+r" (tmp2) - : "r" (&rw->lock) - : "cc"); - - smp_mb(); - return tmp2 == 0; -} - -/* read_can_lock - would read_trylock() succeed? */ -#define __raw_read_can_lock(x) ((x)->lock < 0x80000000) - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-arm/spinlock_types.h b/include/asm-arm/spinlock_types.h deleted file mode 100644 index 43e83f6..0000000 --- a/include/asm-arm/spinlock_types.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_SPINLOCK_TYPES_H -#define __ASM_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned int lock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile unsigned int lock; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0 } - -#endif diff --git a/include/asm-arm/stat.h b/include/asm-arm/stat.h deleted file mode 100644 index 42c0c13..0000000 --- a/include/asm-arm/stat.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef _ASMARM_STAT_H -#define _ASMARM_STAT_H - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -#define STAT_HAVE_NSEC - -struct stat { -#if defined(__ARMEB__) - unsigned short st_dev; - unsigned short __pad1; -#else - unsigned long st_dev; -#endif - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; -#if defined(__ARMEB__) - unsigned short st_rdev; - unsigned short __pad2; -#else - unsigned long st_rdev; -#endif - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -/* This matches struct stat64 in glibc2.1, hence the absolutely - * insane amounts of padding around dev_t's. - * Note: The kernel zero's the padded region because glibc might read them - * in the hope that the kernel has stretched to using larger sizes. - */ -struct stat64 { - unsigned long long st_dev; - unsigned char __pad0[4]; - -#define STAT64_HAS_BROKEN_ST_INO 1 - unsigned long __st_ino; - unsigned int st_mode; - unsigned int st_nlink; - - unsigned long st_uid; - unsigned long st_gid; - - unsigned long long st_rdev; - unsigned char __pad3[4]; - - long long st_size; - unsigned long st_blksize; - unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ - - unsigned long st_atime; - unsigned long st_atime_nsec; - - unsigned long st_mtime; - unsigned long st_mtime_nsec; - - unsigned long st_ctime; - unsigned long st_ctime_nsec; - - unsigned long long st_ino; -}; - -#endif diff --git a/include/asm-arm/statfs.h b/include/asm-arm/statfs.h deleted file mode 100644 index a02e6a8..0000000 --- a/include/asm-arm/statfs.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASMARM_STATFS_H -#define _ASMARM_STATFS_H - -#ifndef __KERNEL_STRICT_NAMES -# include -typedef __kernel_fsid_t fsid_t; -#endif - -struct statfs { - __u32 f_type; - __u32 f_bsize; - __u32 f_blocks; - __u32 f_bfree; - __u32 f_bavail; - __u32 f_files; - __u32 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; - -/* - * With EABI there is 4 bytes of padding added to this structure. - * Let's pack it so the padding goes away to simplify dual ABI support. - * Note that user space does NOT have to pack this structure. - */ -struct statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -} __attribute__ ((packed,aligned(4))); - -#endif diff --git a/include/asm-arm/string.h b/include/asm-arm/string.h deleted file mode 100644 index e50c4a3..0000000 --- a/include/asm-arm/string.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef __ASM_ARM_STRING_H -#define __ASM_ARM_STRING_H - -/* - * We don't do inline string functions, since the - * optimised inline asm versions are not small. - */ - -#define __HAVE_ARCH_STRRCHR -extern char * strrchr(const char * s, int c); - -#define __HAVE_ARCH_STRCHR -extern char * strchr(const char * s, int c); - -#define __HAVE_ARCH_MEMCPY -extern void * memcpy(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMMOVE -extern void * memmove(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMCHR -extern void * memchr(const void *, int, __kernel_size_t); - -#define __HAVE_ARCH_MEMZERO -#define __HAVE_ARCH_MEMSET -extern void * memset(void *, int, __kernel_size_t); - -extern void __memzero(void *ptr, __kernel_size_t n); - -#define memset(p,v,n) \ - ({ \ - void *__p = (p); size_t __n = n; \ - if ((__n) != 0) { \ - if (__builtin_constant_p((v)) && (v) == 0) \ - __memzero((__p),(__n)); \ - else \ - memset((__p),(v),(__n)); \ - } \ - (__p); \ - }) - -#define memzero(p,n) \ - ({ \ - void *__p = (p); size_t __n = n; \ - if ((__n) != 0) \ - __memzero((__p),(__n)); \ - (__p); \ - }) - -#endif diff --git a/include/asm-arm/suspend.h b/include/asm-arm/suspend.h deleted file mode 100644 index cf0d0bd..0000000 --- a/include/asm-arm/suspend.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _ASMARM_SUSPEND_H -#define _ASMARM_SUSPEND_H - -#endif diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h deleted file mode 100644 index 514af79..0000000 --- a/include/asm-arm/system.h +++ /dev/null @@ -1,388 +0,0 @@ -#ifndef __ASM_ARM_SYSTEM_H -#define __ASM_ARM_SYSTEM_H - -#ifdef __KERNEL__ - -#include - -#define CPU_ARCH_UNKNOWN 0 -#define CPU_ARCH_ARMv3 1 -#define CPU_ARCH_ARMv4 2 -#define CPU_ARCH_ARMv4T 3 -#define CPU_ARCH_ARMv5 4 -#define CPU_ARCH_ARMv5T 5 -#define CPU_ARCH_ARMv5TE 6 -#define CPU_ARCH_ARMv5TEJ 7 -#define CPU_ARCH_ARMv6 8 -#define CPU_ARCH_ARMv7 9 - -/* - * CR1 bits (CP#15 CR1) - */ -#define CR_M (1 << 0) /* MMU enable */ -#define CR_A (1 << 1) /* Alignment abort enable */ -#define CR_C (1 << 2) /* Dcache enable */ -#define CR_W (1 << 3) /* Write buffer enable */ -#define CR_P (1 << 4) /* 32-bit exception handler */ -#define CR_D (1 << 5) /* 32-bit data address range */ -#define CR_L (1 << 6) /* Implementation defined */ -#define CR_B (1 << 7) /* Big endian */ -#define CR_S (1 << 8) /* System MMU protection */ -#define CR_R (1 << 9) /* ROM MMU protection */ -#define CR_F (1 << 10) /* Implementation defined */ -#define CR_Z (1 << 11) /* Implementation defined */ -#define CR_I (1 << 12) /* Icache enable */ -#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ -#define CR_RR (1 << 14) /* Round Robin cache replacement */ -#define CR_L4 (1 << 15) /* LDR pc can set T bit */ -#define CR_DT (1 << 16) -#define CR_IT (1 << 18) -#define CR_ST (1 << 19) -#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ -#define CR_U (1 << 22) /* Unaligned access operation */ -#define CR_XP (1 << 23) /* Extended page tables */ -#define CR_VE (1 << 24) /* Vectored interrupts */ - -#define CPUID_ID 0 -#define CPUID_CACHETYPE 1 -#define CPUID_TCM 2 -#define CPUID_TLBTYPE 3 - -/* - * This is used to ensure the compiler did actually allocate the register we - * asked it for some inline assembly sequences. Apparently we can't trust - * the compiler from one version to another so a bit of paranoia won't hurt. - * This string is meant to be concatenated with the inline asm string and - * will cause compilation to stop on mismatch. - * (for details, see gcc PR 15089) - */ -#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -#ifdef CONFIG_CPU_CP15 -#define read_cpuid(reg) \ - ({ \ - unsigned int __val; \ - asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ - : "=r" (__val) \ - : \ - : "cc"); \ - __val; \ - }) -#else -extern unsigned int processor_id; -#define read_cpuid(reg) (processor_id) -#endif - -/* - * The CPU ID never changes at run time, so we might as well tell the - * compiler that it's constant. Use this function to read the CPU ID - * rather than directly reading processor_id or read_cpuid() directly. - */ -static inline unsigned int read_cpuid_id(void) __attribute_const__; - -static inline unsigned int read_cpuid_id(void) -{ - return read_cpuid(CPUID_ID); -} - -#define __exception __attribute__((section(".exception.text"))) - -struct thread_info; -struct task_struct; - -/* information about the system we're running on */ -extern unsigned int system_rev; -extern unsigned int system_serial_low; -extern unsigned int system_serial_high; -extern unsigned int mem_fclk_21285; - -struct pt_regs; - -void die(const char *msg, struct pt_regs *regs, int err) - __attribute__((noreturn)); - -struct siginfo; -void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, - unsigned long err, unsigned long trap); - -void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, - struct pt_regs *), - int sig, const char *name); - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -extern asmlinkage void __backtrace(void); -extern asmlinkage void c_backtrace(unsigned long fp, int pmode); - -struct mm_struct; -extern void show_pte(struct mm_struct *mm, unsigned long addr); -extern void __show_regs(struct pt_regs *); - -extern int cpu_architecture(void); -extern void cpu_init(void); - -void arm_machine_restart(char mode); -extern void (*arm_pm_restart)(char str); - -/* - * Intel's XScale3 core supports some v6 features (supersections, L2) - * but advertises itself as v5 as it does not support the v6 ISA. For - * this reason, we need a way to explicitly test for this type of CPU. - */ -#ifndef CONFIG_CPU_XSC3 -#define cpu_is_xsc3() 0 -#else -static inline int cpu_is_xsc3(void) -{ - extern unsigned int processor_id; - - if ((processor_id & 0xffffe000) == 0x69056000) - return 1; - - return 0; -} -#endif - -#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) -#define cpu_is_xscale() 0 -#else -#define cpu_is_xscale() 1 -#endif - -#define UDBG_UNDEFINED (1 << 0) -#define UDBG_SYSCALL (1 << 1) -#define UDBG_BADABORT (1 << 2) -#define UDBG_SEGV (1 << 3) -#define UDBG_BUS (1 << 4) - -extern unsigned int user_debug; - -#if __LINUX_ARM_ARCH__ >= 4 -#define vectors_high() (cr_alignment & CR_V) -#else -#define vectors_high() (0) -#endif - -#if __LINUX_ARM_ARCH__ >= 7 -#define isb() __asm__ __volatile__ ("isb" : : : "memory") -#define dsb() __asm__ __volatile__ ("dsb" : : : "memory") -#define dmb() __asm__ __volatile__ ("dmb" : : : "memory") -#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 -#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ - : : "r" (0) : "memory") -#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ - : : "r" (0) : "memory") -#else -#define isb() __asm__ __volatile__ ("" : : : "memory") -#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__ ("" : : : "memory") -#endif - -#ifndef CONFIG_SMP -#define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) -#define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) -#define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#else -#define mb() dmb() -#define rmb() dmb() -#define wmb() dmb() -#define smp_mb() dmb() -#define smp_rmb() dmb() -#define smp_wmb() dmb() -#endif -#define read_barrier_depends() do { } while(0) -#define smp_read_barrier_depends() do { } while(0) - -#define set_mb(var, value) do { var = value; smp_mb(); } while (0) -#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); - -extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ -extern unsigned long cr_alignment; /* defined in entry-armv.S */ - -static inline unsigned int get_cr(void) -{ - unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); - return val; -} - -static inline void set_cr(unsigned int val) -{ - asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" - : : "r" (val) : "cc"); - isb(); -} - -#ifndef CONFIG_SMP -extern void adjust_cr(unsigned long mask, unsigned long set); -#endif - -#define CPACC_FULL(n) (3 << (n * 2)) -#define CPACC_SVC(n) (1 << (n * 2)) -#define CPACC_DISABLE(n) (0 << (n * 2)) - -static inline unsigned int get_copro_access(void) -{ - unsigned int val; - asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" - : "=r" (val) : : "cc"); - return val; -} - -static inline void set_copro_access(unsigned int val) -{ - asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" - : : "r" (val) : "cc"); - isb(); -} - -/* - * switch_mm() may do a full cache flush over the context switch, - * so enable interrupts over the context switch to avoid high - * latency. - */ -#define __ARCH_WANT_INTERRUPTS_ON_CTXSW - -/* - * switch_to(prev, next) should switch from task `prev' to `next' - * `prev' will never be the same as `next'. schedule() itself - * contains the memory barrier to tell GCC not to cache `current'. - */ -extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *); - -#define switch_to(prev,next,last) \ -do { \ - last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ -} while (0) - -#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) -/* - * On the StrongARM, "swp" is terminally broken since it bypasses the - * cache totally. This means that the cache becomes inconsistent, and, - * since we use normal loads/stores as well, this is really bad. - * Typically, this causes oopsen in filp_close, but could have other, - * more disasterous effects. There are two work-arounds: - * 1. Disable interrupts and emulate the atomic swap - * 2. Clean the cache, perform atomic swap, flush the cache - * - * We choose (1) since its the "easiest" to achieve here and is not - * dependent on the processor type. - * - * NOTE that this solution won't work on an SMP system, so explcitly - * forbid it here. - */ -#define swp_is_buggy -#endif - -static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) -{ - extern void __bad_xchg(volatile void *, int); - unsigned long ret; -#ifdef swp_is_buggy - unsigned long flags; -#endif -#if __LINUX_ARM_ARCH__ >= 6 - unsigned int tmp; -#endif - - switch (size) { -#if __LINUX_ARM_ARCH__ >= 6 - case 1: - asm volatile("@ __xchg1\n" - "1: ldrexb %0, [%3]\n" - " strexb %1, %2, [%3]\n" - " teq %1, #0\n" - " bne 1b" - : "=&r" (ret), "=&r" (tmp) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; - case 4: - asm volatile("@ __xchg4\n" - "1: ldrex %0, [%3]\n" - " strex %1, %2, [%3]\n" - " teq %1, #0\n" - " bne 1b" - : "=&r" (ret), "=&r" (tmp) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; -#elif defined(swp_is_buggy) -#ifdef CONFIG_SMP -#error SMP is not supported on this platform -#endif - case 1: - raw_local_irq_save(flags); - ret = *(volatile unsigned char *)ptr; - *(volatile unsigned char *)ptr = x; - raw_local_irq_restore(flags); - break; - - case 4: - raw_local_irq_save(flags); - ret = *(volatile unsigned long *)ptr; - *(volatile unsigned long *)ptr = x; - raw_local_irq_restore(flags); - break; -#else - case 1: - asm volatile("@ __xchg1\n" - " swpb %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; - case 4: - asm volatile("@ __xchg4\n" - " swp %0, %1, [%2]" - : "=&r" (ret) - : "r" (x), "r" (ptr) - : "memory", "cc"); - break; -#endif - default: - __bad_xchg(ptr, size), ret = 0; - break; - } - - return ret; -} - -extern void disable_hlt(void); -extern void enable_hlt(void); - -#include - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - -#ifndef CONFIG_SMP -#include -#endif - -#endif /* __ASSEMBLY__ */ - -#define arch_align_stack(x) (x) - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h deleted file mode 100644 index f784d11..0000000 --- a/include/asm-arm/termbits.h +++ /dev/null @@ -1,197 +0,0 @@ -#ifndef __ASM_ARM_TERMBITS_H -#define __ASM_ARM_TERMBITS_H - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define BOTHER 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -#define IBSHIFT 16 - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* __ASM_ARM_TERMBITS_H */ diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h deleted file mode 100644 index 293e3f1..0000000 --- a/include/asm-arm/termios.h +++ /dev/null @@ -1,92 +0,0 @@ -#ifndef __ASM_ARM_TERMIOS_H -#define __ASM_ARM_TERMIOS_H - -#include -#include - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -#ifdef __KERNEL__ -/* intr=^C quit=^| erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" -#endif - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ - -/* - * Translate a "termio" structure into a "termios". Ugh. - */ -#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \ - unsigned short __tmp; \ - get_user(__tmp,&(termio)->x); \ - *(unsigned short *) &(termios)->x = __tmp; \ -} - -#define user_termio_to_kernel_termios(termios, termio) \ -({ \ - SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \ - SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \ - copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \ -}) - -/* - * Translate a "termios" structure into a "termio". Ugh. - */ -#define kernel_termios_to_user_termio(termio, termios) \ -({ \ - put_user((termios)->c_iflag, &(termio)->c_iflag); \ - put_user((termios)->c_oflag, &(termio)->c_oflag); \ - put_user((termios)->c_cflag, &(termio)->c_cflag); \ - put_user((termios)->c_lflag, &(termio)->c_lflag); \ - put_user((termios)->c_line, &(termio)->c_line); \ - copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ -}) - -#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2)) -#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2)) -#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios)) -#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios)) - -#endif /* __KERNEL__ */ - -#endif /* __ASM_ARM_TERMIOS_H */ diff --git a/include/asm-arm/therm.h b/include/asm-arm/therm.h deleted file mode 100644 index e51c923..0000000 --- a/include/asm-arm/therm.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/therm.h: Definitions for Dallas Semiconductor - * DS1620 thermometer driver (as used in the Rebel.com NetWinder) - */ -#ifndef __ASM_THERM_H -#define __ASM_THERM_H - -/* ioctl numbers for /dev/therm */ -#define CMD_SET_THERMOSTATE 0x53 -#define CMD_GET_THERMOSTATE 0x54 -#define CMD_GET_STATUS 0x56 -#define CMD_GET_TEMPERATURE 0x57 -#define CMD_SET_THERMOSTATE2 0x58 -#define CMD_GET_THERMOSTATE2 0x59 -#define CMD_GET_TEMPERATURE2 0x5a -#define CMD_GET_FAN 0x5b -#define CMD_SET_FAN 0x5c - -#define FAN_OFF 0 -#define FAN_ON 1 -#define FAN_ALWAYS_ON 2 - -struct therm { - int hi; - int lo; -}; - -#endif diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h deleted file mode 100644 index d4be2d6..0000000 --- a/include/asm-arm/thread_info.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * linux/include/asm-arm/thread_info.h - * - * Copyright (C) 2002 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_THREAD_INFO_H -#define __ASM_ARM_THREAD_INFO_H - -#ifdef __KERNEL__ - -#include -#include - -#define THREAD_SIZE_ORDER 1 -#define THREAD_SIZE 8192 -#define THREAD_START_SP (THREAD_SIZE - 8) - -#ifndef __ASSEMBLY__ - -struct task_struct; -struct exec_domain; - -#include -#include - -typedef unsigned long mm_segment_t; - -struct cpu_context_save { - __u32 r4; - __u32 r5; - __u32 r6; - __u32 r7; - __u32 r8; - __u32 r9; - __u32 sl; - __u32 fp; - __u32 sp; - __u32 pc; - __u32 extra[2]; /* Xscale 'acc' register, etc */ -}; - -/* - * low level task data that entry.S needs immediate access to. - * __switch_to() assumes cpu_context follows immediately after cpu_domain. - */ -struct thread_info { - unsigned long flags; /* low level flags */ - int preempt_count; /* 0 => preemptable, <0 => bug */ - mm_segment_t addr_limit; /* address limit */ - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - __u32 cpu; /* cpu */ - __u32 cpu_domain; /* cpu domain */ - struct cpu_context_save cpu_context; /* cpu context */ - __u32 syscall; /* syscall number */ - __u8 used_cp[16]; /* thread used copro */ - unsigned long tp_value; - struct crunch_state crunchstate; - union fp_state fpstate __attribute__((aligned(8))); - union vfp_state vfpstate; -#ifdef CONFIG_ARM_THUMBEE - unsigned long thumbee_state; /* ThumbEE Handler Base register */ -#endif - struct restart_block restart_block; -}; - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .preempt_count = 1, \ - .addr_limit = KERNEL_DS, \ - .cpu_domain = domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ - domain_val(DOMAIN_IO, DOMAIN_CLIENT), \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* - * how to get the thread information struct from C - */ -static inline struct thread_info *current_thread_info(void) __attribute_const__; - -static inline struct thread_info *current_thread_info(void) -{ - register unsigned long sp asm ("sp"); - return (struct thread_info *)(sp & ~(THREAD_SIZE - 1)); -} - -#define thread_saved_pc(tsk) \ - ((unsigned long)(pc_pointer(task_thread_info(tsk)->cpu_context.pc))) -#define thread_saved_fp(tsk) \ - ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) - -extern void crunch_task_disable(struct thread_info *); -extern void crunch_task_copy(struct thread_info *, void *); -extern void crunch_task_restore(struct thread_info *, void *); -extern void crunch_task_release(struct thread_info *); - -extern void iwmmxt_task_disable(struct thread_info *); -extern void iwmmxt_task_copy(struct thread_info *, void *); -extern void iwmmxt_task_restore(struct thread_info *, void *); -extern void iwmmxt_task_release(struct thread_info *); -extern void iwmmxt_task_switch(struct thread_info *); - -#endif - -/* - * We use bit 30 of the preempt_count to indicate that kernel - * preemption is occurring. See include/asm-arm/hardirq.h. - */ -#define PREEMPT_ACTIVE 0x40000000 - -/* - * thread information flags: - * TIF_SYSCALL_TRACE - syscall trace active - * TIF_SIGPENDING - signal pending - * TIF_NEED_RESCHED - rescheduling necessary - * TIF_USEDFPU - FPU was used by this task this quantum (SMP) - * TIF_POLLING_NRFLAG - true if poll_idle() is polling TIF_NEED_RESCHED - */ -#define TIF_SIGPENDING 0 -#define TIF_NEED_RESCHED 1 -#define TIF_SYSCALL_TRACE 8 -#define TIF_POLLING_NRFLAG 16 -#define TIF_USING_IWMMXT 17 -#define TIF_MEMDIE 18 -#define TIF_FREEZE 19 - -#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) -#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) -#define _TIF_FREEZE (1 << TIF_FREEZE) - -/* - * Change these and you break ASM code in entry-common.S - */ -#define _TIF_WORK_MASK 0x000000ff - -#endif /* __KERNEL__ */ -#endif /* __ASM_ARM_THREAD_INFO_H */ diff --git a/include/asm-arm/thread_notify.h b/include/asm-arm/thread_notify.h deleted file mode 100644 index 8866e52..0000000 --- a/include/asm-arm/thread_notify.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/include/asm-arm/thread_notify.h - * - * Copyright (C) 2006 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_THREAD_NOTIFY_H -#define ASMARM_THREAD_NOTIFY_H - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -#include -#include - -static inline int thread_register_notifier(struct notifier_block *n) -{ - extern struct atomic_notifier_head thread_notify_head; - return atomic_notifier_chain_register(&thread_notify_head, n); -} - -static inline void thread_unregister_notifier(struct notifier_block *n) -{ - extern struct atomic_notifier_head thread_notify_head; - atomic_notifier_chain_unregister(&thread_notify_head, n); -} - -static inline void thread_notify(unsigned long rc, struct thread_info *thread) -{ - extern struct atomic_notifier_head thread_notify_head; - atomic_notifier_call_chain(&thread_notify_head, rc, thread); -} - -#endif - -/* - * These are the reason codes for the thread notifier. - */ -#define THREAD_NOTIFY_FLUSH 0 -#define THREAD_NOTIFY_RELEASE 1 -#define THREAD_NOTIFY_SWITCH 2 - -#endif -#endif diff --git a/include/asm-arm/timex.h b/include/asm-arm/timex.h deleted file mode 100644 index 7b8d4cb..0000000 --- a/include/asm-arm/timex.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/timex.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Architecture Specific TIME specifications - */ -#ifndef _ASMARM_TIMEX_H -#define _ASMARM_TIMEX_H - -#include - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles (void) -{ - return 0; -} - -#endif diff --git a/include/asm-arm/tlb.h b/include/asm-arm/tlb.h deleted file mode 100644 index 36bd402..0000000 --- a/include/asm-arm/tlb.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * linux/include/asm-arm/tlb.h - * - * Copyright (C) 2002 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Experimentation shows that on a StrongARM, it appears to be faster - * to use the "invalidate whole tlb" rather than "invalidate single - * tlb" for this. - * - * This appears true for both the process fork+exit case, as well as - * the munmap-large-area case. - */ -#ifndef __ASMARM_TLB_H -#define __ASMARM_TLB_H - -#include -#include - -#ifndef CONFIG_MMU - -#include -#include - -#else /* !CONFIG_MMU */ - -#include - -/* - * TLB handling. This allows us to remove pages from the page - * tables, and efficiently handle the TLB issues. - */ -struct mmu_gather { - struct mm_struct *mm; - unsigned int fullmm; -}; - -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - -static inline struct mmu_gather * -tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) -{ - struct mmu_gather *tlb = &get_cpu_var(mmu_gathers); - - tlb->mm = mm; - tlb->fullmm = full_mm_flush; - - return tlb; -} - -static inline void -tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end) -{ - if (tlb->fullmm) - flush_tlb_mm(tlb->mm); - - /* keep the page table cache within bounds */ - check_pgt_cache(); - - put_cpu_var(mmu_gathers); -} - -#define tlb_remove_tlb_entry(tlb,ptep,address) do { } while (0) - -/* - * In the case of tlb vma handling, we can optimise these away in the - * case where we're doing a full MM flush. When we're doing a munmap, - * the vmas are adjusted to only cover the region to be torn down. - */ -static inline void -tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) -{ - if (!tlb->fullmm) - flush_cache_range(vma, vma->vm_start, vma->vm_end); -} - -static inline void -tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) -{ - if (!tlb->fullmm) - flush_tlb_range(vma, vma->vm_start, vma->vm_end); -} - -#define tlb_remove_page(tlb,page) free_page_and_swap_cache(page) -#define pte_free_tlb(tlb, ptep) pte_free((tlb)->mm, ptep) -#define pmd_free_tlb(tlb, pmdp) pmd_free((tlb)->mm, pmdp) - -#define tlb_migrate_finish(mm) do { } while (0) - -#endif /* CONFIG_MMU */ -#endif diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h deleted file mode 100644 index 909656c..0000000 --- a/include/asm-arm/tlbflush.h +++ /dev/null @@ -1,500 +0,0 @@ -/* - * linux/include/asm-arm/tlbflush.h - * - * Copyright (C) 1999-2003 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_TLBFLUSH_H -#define _ASMARM_TLBFLUSH_H - - -#ifndef CONFIG_MMU - -#define tlb_flush(tlb) ((void) tlb) - -#else /* CONFIG_MMU */ - -#include - -#define TLB_V3_PAGE (1 << 0) -#define TLB_V4_U_PAGE (1 << 1) -#define TLB_V4_D_PAGE (1 << 2) -#define TLB_V4_I_PAGE (1 << 3) -#define TLB_V6_U_PAGE (1 << 4) -#define TLB_V6_D_PAGE (1 << 5) -#define TLB_V6_I_PAGE (1 << 6) - -#define TLB_V3_FULL (1 << 8) -#define TLB_V4_U_FULL (1 << 9) -#define TLB_V4_D_FULL (1 << 10) -#define TLB_V4_I_FULL (1 << 11) -#define TLB_V6_U_FULL (1 << 12) -#define TLB_V6_D_FULL (1 << 13) -#define TLB_V6_I_FULL (1 << 14) - -#define TLB_V6_U_ASID (1 << 16) -#define TLB_V6_D_ASID (1 << 17) -#define TLB_V6_I_ASID (1 << 18) - -#define TLB_L2CLEAN_FR (1 << 29) /* Feroceon */ -#define TLB_DCLEAN (1 << 30) -#define TLB_WB (1 << 31) - -/* - * MMU TLB Model - * ============= - * - * We have the following to choose from: - * v3 - ARMv3 - * v4 - ARMv4 without write buffer - * v4wb - ARMv4 with write buffer without I TLB flush entry instruction - * v4wbi - ARMv4 with write buffer with I TLB flush entry instruction - * fr - Feroceon (v4wbi with non-outer-cacheable page table walks) - * v6wbi - ARMv6 with write buffer with I TLB flush entry instruction - */ -#undef _TLB -#undef MULTI_TLB - -#define v3_tlb_flags (TLB_V3_FULL | TLB_V3_PAGE) - -#ifdef CONFIG_CPU_TLB_V3 -# define v3_possible_flags v3_tlb_flags -# define v3_always_flags v3_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v3 -# endif -#else -# define v3_possible_flags 0 -# define v3_always_flags (-1UL) -#endif - -#define v4_tlb_flags (TLB_V4_U_FULL | TLB_V4_U_PAGE) - -#ifdef CONFIG_CPU_TLB_V4WT -# define v4_possible_flags v4_tlb_flags -# define v4_always_flags v4_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v4 -# endif -#else -# define v4_possible_flags 0 -# define v4_always_flags (-1UL) -#endif - -#define v4wbi_tlb_flags (TLB_WB | TLB_DCLEAN | \ - TLB_V4_I_FULL | TLB_V4_D_FULL | \ - TLB_V4_I_PAGE | TLB_V4_D_PAGE) - -#ifdef CONFIG_CPU_TLB_V4WBI -# define v4wbi_possible_flags v4wbi_tlb_flags -# define v4wbi_always_flags v4wbi_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v4wbi -# endif -#else -# define v4wbi_possible_flags 0 -# define v4wbi_always_flags (-1UL) -#endif - -#define fr_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_L2CLEAN_FR | \ - TLB_V4_I_FULL | TLB_V4_D_FULL | \ - TLB_V4_I_PAGE | TLB_V4_D_PAGE) - -#ifdef CONFIG_CPU_TLB_FEROCEON -# define fr_possible_flags fr_tlb_flags -# define fr_always_flags fr_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v4wbi -# endif -#else -# define fr_possible_flags 0 -# define fr_always_flags (-1UL) -#endif - -#define v4wb_tlb_flags (TLB_WB | TLB_DCLEAN | \ - TLB_V4_I_FULL | TLB_V4_D_FULL | \ - TLB_V4_D_PAGE) - -#ifdef CONFIG_CPU_TLB_V4WB -# define v4wb_possible_flags v4wb_tlb_flags -# define v4wb_always_flags v4wb_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v4wb -# endif -#else -# define v4wb_possible_flags 0 -# define v4wb_always_flags (-1UL) -#endif - -#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | \ - TLB_V6_I_FULL | TLB_V6_D_FULL | \ - TLB_V6_I_PAGE | TLB_V6_D_PAGE | \ - TLB_V6_I_ASID | TLB_V6_D_ASID) - -#ifdef CONFIG_CPU_TLB_V6 -# define v6wbi_possible_flags v6wbi_tlb_flags -# define v6wbi_always_flags v6wbi_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v6wbi -# endif -#else -# define v6wbi_possible_flags 0 -# define v6wbi_always_flags (-1UL) -#endif - -#ifdef CONFIG_CPU_TLB_V7 -# define v7wbi_possible_flags v6wbi_tlb_flags -# define v7wbi_always_flags v6wbi_tlb_flags -# ifdef _TLB -# define MULTI_TLB 1 -# else -# define _TLB v7wbi -# endif -#else -# define v7wbi_possible_flags 0 -# define v7wbi_always_flags (-1UL) -#endif - -#ifndef _TLB -#error Unknown TLB model -#endif - -#ifndef __ASSEMBLY__ - -#include - -struct cpu_tlb_fns { - void (*flush_user_range)(unsigned long, unsigned long, struct vm_area_struct *); - void (*flush_kern_range)(unsigned long, unsigned long); - unsigned long tlb_flags; -}; - -/* - * Select the calling method - */ -#ifdef MULTI_TLB - -#define __cpu_flush_user_tlb_range cpu_tlb.flush_user_range -#define __cpu_flush_kern_tlb_range cpu_tlb.flush_kern_range - -#else - -#define __cpu_flush_user_tlb_range __glue(_TLB,_flush_user_tlb_range) -#define __cpu_flush_kern_tlb_range __glue(_TLB,_flush_kern_tlb_range) - -extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *); -extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long); - -#endif - -extern struct cpu_tlb_fns cpu_tlb; - -#define __cpu_tlb_flags cpu_tlb.tlb_flags - -/* - * TLB Management - * ============== - * - * The arch/arm/mm/tlb-*.S files implement these methods. - * - * The TLB specific code is expected to perform whatever tests it - * needs to determine if it should invalidate the TLB for each - * call. Start addresses are inclusive and end addresses are - * exclusive; it is safe to round these addresses down. - * - * flush_tlb_all() - * - * Invalidate the entire TLB. - * - * flush_tlb_mm(mm) - * - * Invalidate all TLB entries in a particular address - * space. - * - mm - mm_struct describing address space - * - * flush_tlb_range(mm,start,end) - * - * Invalidate a range of TLB entries in the specified - * address space. - * - mm - mm_struct describing address space - * - start - start address (may not be aligned) - * - end - end address (exclusive, may not be aligned) - * - * flush_tlb_page(vaddr,vma) - * - * Invalidate the specified page in the specified address range. - * - vaddr - virtual address (may not be aligned) - * - vma - vma_struct describing address range - * - * flush_kern_tlb_page(kaddr) - * - * Invalidate the TLB entry for the specified page. The address - * will be in the kernels virtual memory space. Current uses - * only require the D-TLB to be invalidated. - * - kaddr - Kernel virtual memory address - */ - -/* - * We optimise the code below by: - * - building a set of TLB flags that might be set in __cpu_tlb_flags - * - building a set of TLB flags that will always be set in __cpu_tlb_flags - * - if we're going to need __cpu_tlb_flags, access it once and only once - * - * This allows us to build optimal assembly for the single-CPU type case, - * and as close to optimal given the compiler constrants for multi-CPU - * case. We could do better for the multi-CPU case if the compiler - * implemented the "%?" method, but this has been discontinued due to too - * many people getting it wrong. - */ -#define possible_tlb_flags (v3_possible_flags | \ - v4_possible_flags | \ - v4wbi_possible_flags | \ - fr_possible_flags | \ - v4wb_possible_flags | \ - v6wbi_possible_flags) - -#define always_tlb_flags (v3_always_flags & \ - v4_always_flags & \ - v4wbi_always_flags & \ - fr_always_flags & \ - v4wb_always_flags & \ - v6wbi_always_flags) - -#define tlb_flag(f) ((always_tlb_flags & (f)) || (__tlb_flag & possible_tlb_flags & (f))) - -static inline void local_flush_tlb_all(void) -{ - const int zero = 0; - const unsigned int __tlb_flag = __cpu_tlb_flags; - - if (tlb_flag(TLB_WB)) - dsb(); - - if (tlb_flag(TLB_V3_FULL)) - asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_U_FULL | TLB_V6_U_FULL)) - asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_D_FULL | TLB_V6_D_FULL)) - asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_I_FULL | TLB_V6_I_FULL)) - asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); - - if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL | - TLB_V6_I_PAGE | TLB_V6_D_PAGE | - TLB_V6_I_ASID | TLB_V6_D_ASID)) { - /* flush the branch target cache */ - asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); - dsb(); - isb(); - } -} - -static inline void local_flush_tlb_mm(struct mm_struct *mm) -{ - const int zero = 0; - const int asid = ASID(mm); - const unsigned int __tlb_flag = __cpu_tlb_flags; - - if (tlb_flag(TLB_WB)) - dsb(); - - if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) { - if (tlb_flag(TLB_V3_FULL)) - asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_U_FULL)) - asm("mcr p15, 0, %0, c8, c7, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_D_FULL)) - asm("mcr p15, 0, %0, c8, c6, 0" : : "r" (zero) : "cc"); - if (tlb_flag(TLB_V4_I_FULL)) - asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); - } - - if (tlb_flag(TLB_V6_U_ASID)) - asm("mcr p15, 0, %0, c8, c7, 2" : : "r" (asid) : "cc"); - if (tlb_flag(TLB_V6_D_ASID)) - asm("mcr p15, 0, %0, c8, c6, 2" : : "r" (asid) : "cc"); - if (tlb_flag(TLB_V6_I_ASID)) - asm("mcr p15, 0, %0, c8, c5, 2" : : "r" (asid) : "cc"); - - if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL | - TLB_V6_I_PAGE | TLB_V6_D_PAGE | - TLB_V6_I_ASID | TLB_V6_D_ASID)) { - /* flush the branch target cache */ - asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); - dsb(); - } -} - -static inline void -local_flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr) -{ - const int zero = 0; - const unsigned int __tlb_flag = __cpu_tlb_flags; - - uaddr = (uaddr & PAGE_MASK) | ASID(vma->vm_mm); - - if (tlb_flag(TLB_WB)) - dsb(); - - if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { - if (tlb_flag(TLB_V3_PAGE)) - asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (uaddr) : "cc"); - if (tlb_flag(TLB_V4_U_PAGE)) - asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc"); - if (tlb_flag(TLB_V4_D_PAGE)) - asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc"); - if (tlb_flag(TLB_V4_I_PAGE)) - asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc"); - if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) - asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); - } - - if (tlb_flag(TLB_V6_U_PAGE)) - asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (uaddr) : "cc"); - if (tlb_flag(TLB_V6_D_PAGE)) - asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (uaddr) : "cc"); - if (tlb_flag(TLB_V6_I_PAGE)) - asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (uaddr) : "cc"); - - if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL | - TLB_V6_I_PAGE | TLB_V6_D_PAGE | - TLB_V6_I_ASID | TLB_V6_D_ASID)) { - /* flush the branch target cache */ - asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); - dsb(); - } -} - -static inline void local_flush_tlb_kernel_page(unsigned long kaddr) -{ - const int zero = 0; - const unsigned int __tlb_flag = __cpu_tlb_flags; - - kaddr &= PAGE_MASK; - - if (tlb_flag(TLB_WB)) - dsb(); - - if (tlb_flag(TLB_V3_PAGE)) - asm("mcr p15, 0, %0, c6, c0, 0" : : "r" (kaddr) : "cc"); - if (tlb_flag(TLB_V4_U_PAGE)) - asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc"); - if (tlb_flag(TLB_V4_D_PAGE)) - asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc"); - if (tlb_flag(TLB_V4_I_PAGE)) - asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc"); - if (!tlb_flag(TLB_V4_I_PAGE) && tlb_flag(TLB_V4_I_FULL)) - asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); - - if (tlb_flag(TLB_V6_U_PAGE)) - asm("mcr p15, 0, %0, c8, c7, 1" : : "r" (kaddr) : "cc"); - if (tlb_flag(TLB_V6_D_PAGE)) - asm("mcr p15, 0, %0, c8, c6, 1" : : "r" (kaddr) : "cc"); - if (tlb_flag(TLB_V6_I_PAGE)) - asm("mcr p15, 0, %0, c8, c5, 1" : : "r" (kaddr) : "cc"); - - if (tlb_flag(TLB_V6_I_FULL | TLB_V6_D_FULL | - TLB_V6_I_PAGE | TLB_V6_D_PAGE | - TLB_V6_I_ASID | TLB_V6_D_ASID)) { - /* flush the branch target cache */ - asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero) : "cc"); - dsb(); - isb(); - } -} - -/* - * flush_pmd_entry - * - * Flush a PMD entry (word aligned, or double-word aligned) to - * RAM if the TLB for the CPU we are running on requires this. - * This is typically used when we are creating PMD entries. - * - * clean_pmd_entry - * - * Clean (but don't drain the write buffer) if the CPU requires - * these operations. This is typically used when we are removing - * PMD entries. - */ -static inline void flush_pmd_entry(pmd_t *pmd) -{ - const unsigned int __tlb_flag = __cpu_tlb_flags; - - if (tlb_flag(TLB_DCLEAN)) - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd" - : : "r" (pmd) : "cc"); - - if (tlb_flag(TLB_L2CLEAN_FR)) - asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd" - : : "r" (pmd) : "cc"); - - if (tlb_flag(TLB_WB)) - dsb(); -} - -static inline void clean_pmd_entry(pmd_t *pmd) -{ - const unsigned int __tlb_flag = __cpu_tlb_flags; - - if (tlb_flag(TLB_DCLEAN)) - asm("mcr p15, 0, %0, c7, c10, 1 @ flush_pmd" - : : "r" (pmd) : "cc"); - - if (tlb_flag(TLB_L2CLEAN_FR)) - asm("mcr p15, 1, %0, c15, c9, 1 @ L2 flush_pmd" - : : "r" (pmd) : "cc"); -} - -#undef tlb_flag -#undef always_tlb_flags -#undef possible_tlb_flags - -/* - * Convert calls to our calling convention. - */ -#define local_flush_tlb_range(vma,start,end) __cpu_flush_user_tlb_range(start,end,vma) -#define local_flush_tlb_kernel_range(s,e) __cpu_flush_kern_tlb_range(s,e) - -#ifndef CONFIG_SMP -#define flush_tlb_all local_flush_tlb_all -#define flush_tlb_mm local_flush_tlb_mm -#define flush_tlb_page local_flush_tlb_page -#define flush_tlb_kernel_page local_flush_tlb_kernel_page -#define flush_tlb_range local_flush_tlb_range -#define flush_tlb_kernel_range local_flush_tlb_kernel_range -#else -extern void flush_tlb_all(void); -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr); -extern void flush_tlb_kernel_page(unsigned long kaddr); -extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); -extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); -#endif - -/* - * if PG_dcache_dirty is set for the page, we need to ensure that any - * cache entries for the kernels virtual memory range are written - * back to the page. - */ -extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); - -#endif - -#endif /* CONFIG_MMU */ - -#endif diff --git a/include/asm-arm/topology.h b/include/asm-arm/topology.h deleted file mode 100644 index accbd7c..0000000 --- a/include/asm-arm/topology.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_ARM_TOPOLOGY_H -#define _ASM_ARM_TOPOLOGY_H - -#include - -#endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/include/asm-arm/traps.h b/include/asm-arm/traps.h deleted file mode 100644 index aa399ae..0000000 --- a/include/asm-arm/traps.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _ASMARM_TRAP_H -#define _ASMARM_TRAP_H - -#include - -struct undef_hook { - struct list_head node; - u32 instr_mask; - u32 instr_val; - u32 cpsr_mask; - u32 cpsr_val; - int (*fn)(struct pt_regs *regs, unsigned int instr); -}; - -void register_undef_hook(struct undef_hook *hook); -void unregister_undef_hook(struct undef_hook *hook); - -static inline int in_exception_text(unsigned long ptr) -{ - extern char __exception_text_start[]; - extern char __exception_text_end[]; - - return ptr >= (unsigned long)&__exception_text_start && - ptr < (unsigned long)&__exception_text_end; -} - -extern void __init early_trap_init(void); - -#endif diff --git a/include/asm-arm/types.h b/include/asm-arm/types.h deleted file mode 100644 index 345df01..0000000 --- a/include/asm-arm/types.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __ASM_ARM_TYPES_H -#define __ASM_ARM_TYPES_H - -#include - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; -typedef u32 dma64_addr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif - diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h deleted file mode 100644 index 4c1a3fa..0000000 --- a/include/asm-arm/uaccess.h +++ /dev/null @@ -1,444 +0,0 @@ -/* - * linux/include/asm-arm/uaccess.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef _ASMARM_UACCESS_H -#define _ASMARM_UACCESS_H - -/* - * User space memory access functions - */ -#include -#include -#include -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -extern int fixup_exception(struct pt_regs *regs); - -/* - * These two are intentionally not defined anywhere - if the kernel - * code generates any references to them, that's a bug. - */ -extern int __get_user_bad(void); -extern int __put_user_bad(void); - -/* - * Note that this is actually 0x1,0000,0000 - */ -#define KERNEL_DS 0x00000000 -#define get_ds() (KERNEL_DS) - -#ifdef CONFIG_MMU - -#define USER_DS TASK_SIZE -#define get_fs() (current_thread_info()->addr_limit) - -static inline void set_fs(mm_segment_t fs) -{ - current_thread_info()->addr_limit = fs; - modify_domain(DOMAIN_KERNEL, fs ? DOMAIN_CLIENT : DOMAIN_MANAGER); -} - -#define segment_eq(a,b) ((a) == (b)) - -#define __addr_ok(addr) ({ \ - unsigned long flag; \ - __asm__("cmp %2, %0; movlo %0, #0" \ - : "=&r" (flag) \ - : "0" (current_thread_info()->addr_limit), "r" (addr) \ - : "cc"); \ - (flag == 0); }) - -/* We use 33-bit arithmetic here... */ -#define __range_ok(addr,size) ({ \ - unsigned long flag, roksum; \ - __chk_user_ptr(addr); \ - __asm__("adds %1, %2, %3; sbcccs %1, %1, %0; movcc %0, #0" \ - : "=&r" (flag), "=&r" (roksum) \ - : "r" (addr), "Ir" (size), "0" (current_thread_info()->addr_limit) \ - : "cc"); \ - flag; }) - -/* - * Single-value transfer routines. They automatically use the right - * size if we just have the right pointer type. Note that the functions - * which read from user space (*get_*) need to take care not to leak - * kernel data even if the calling code is buggy and fails to check - * the return value. This means zeroing out the destination variable - * or buffer on error. Normally this is done out of line by the - * fixup code, but there are a few places where it intrudes on the - * main code path. When we only write to user space, there is no - * problem. - */ -extern int __get_user_1(void *); -extern int __get_user_2(void *); -extern int __get_user_4(void *); - -#define __get_user_x(__r2,__p,__e,__s,__i...) \ - __asm__ __volatile__ ( \ - __asmeq("%0", "r0") __asmeq("%1", "r2") \ - "bl __get_user_" #__s \ - : "=&r" (__e), "=r" (__r2) \ - : "0" (__p) \ - : __i, "cc") - -#define get_user(x,p) \ - ({ \ - register const typeof(*(p)) __user *__p asm("r0") = (p);\ - register unsigned long __r2 asm("r2"); \ - register int __e asm("r0"); \ - switch (sizeof(*(__p))) { \ - case 1: \ - __get_user_x(__r2, __p, __e, 1, "lr"); \ - break; \ - case 2: \ - __get_user_x(__r2, __p, __e, 2, "r3", "lr"); \ - break; \ - case 4: \ - __get_user_x(__r2, __p, __e, 4, "lr"); \ - break; \ - default: __e = __get_user_bad(); break; \ - } \ - x = (typeof(*(p))) __r2; \ - __e; \ - }) - -extern int __put_user_1(void *, unsigned int); -extern int __put_user_2(void *, unsigned int); -extern int __put_user_4(void *, unsigned int); -extern int __put_user_8(void *, unsigned long long); - -#define __put_user_x(__r2,__p,__e,__s) \ - __asm__ __volatile__ ( \ - __asmeq("%0", "r0") __asmeq("%2", "r2") \ - "bl __put_user_" #__s \ - : "=&r" (__e) \ - : "0" (__p), "r" (__r2) \ - : "ip", "lr", "cc") - -#define put_user(x,p) \ - ({ \ - register const typeof(*(p)) __r2 asm("r2") = (x); \ - register const typeof(*(p)) __user *__p asm("r0") = (p);\ - register int __e asm("r0"); \ - switch (sizeof(*(__p))) { \ - case 1: \ - __put_user_x(__r2, __p, __e, 1); \ - break; \ - case 2: \ - __put_user_x(__r2, __p, __e, 2); \ - break; \ - case 4: \ - __put_user_x(__r2, __p, __e, 4); \ - break; \ - case 8: \ - __put_user_x(__r2, __p, __e, 8); \ - break; \ - default: __e = __put_user_bad(); break; \ - } \ - __e; \ - }) - -#else /* CONFIG_MMU */ - -/* - * uClinux has only one addr space, so has simplified address limits. - */ -#define USER_DS KERNEL_DS - -#define segment_eq(a,b) (1) -#define __addr_ok(addr) (1) -#define __range_ok(addr,size) (0) -#define get_fs() (KERNEL_DS) - -static inline void set_fs(mm_segment_t fs) -{ -} - -#define get_user(x,p) __get_user(x,p) -#define put_user(x,p) __put_user(x,p) - -#endif /* CONFIG_MMU */ - -#define access_ok(type,addr,size) (__range_ok(addr,size) == 0) - -/* - * The "__xxx" versions of the user access functions do not verify the - * address space - it must have been done previously with a separate - * "access_ok()" call. - * - * The "xxx_error" versions set the third argument to EFAULT if an - * error occurs, and leave it unchanged on success. Note that these - * versions are void (ie, don't return a value as such). - */ -#define __get_user(x,ptr) \ -({ \ - long __gu_err = 0; \ - __get_user_err((x),(ptr),__gu_err); \ - __gu_err; \ -}) - -#define __get_user_error(x,ptr,err) \ -({ \ - __get_user_err((x),(ptr),err); \ - (void) 0; \ -}) - -#define __get_user_err(x,ptr,err) \ -do { \ - unsigned long __gu_addr = (unsigned long)(ptr); \ - unsigned long __gu_val; \ - __chk_user_ptr(ptr); \ - switch (sizeof(*(ptr))) { \ - case 1: __get_user_asm_byte(__gu_val,__gu_addr,err); break; \ - case 2: __get_user_asm_half(__gu_val,__gu_addr,err); break; \ - case 4: __get_user_asm_word(__gu_val,__gu_addr,err); break; \ - default: (__gu_val) = __get_user_bad(); \ - } \ - (x) = (__typeof__(*(ptr)))__gu_val; \ -} while (0) - -#define __get_user_asm_byte(x,addr,err) \ - __asm__ __volatile__( \ - "1: ldrbt %1,[%2],#0\n" \ - "2:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %0, %3\n" \ - " mov %1, #0\n" \ - " b 2b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 3b\n" \ - " .previous" \ - : "+r" (err), "=&r" (x) \ - : "r" (addr), "i" (-EFAULT) \ - : "cc") - -#ifndef __ARMEB__ -#define __get_user_asm_half(x,__gu_addr,err) \ -({ \ - unsigned long __b1, __b2; \ - __get_user_asm_byte(__b1, __gu_addr, err); \ - __get_user_asm_byte(__b2, __gu_addr + 1, err); \ - (x) = __b1 | (__b2 << 8); \ -}) -#else -#define __get_user_asm_half(x,__gu_addr,err) \ -({ \ - unsigned long __b1, __b2; \ - __get_user_asm_byte(__b1, __gu_addr, err); \ - __get_user_asm_byte(__b2, __gu_addr + 1, err); \ - (x) = (__b1 << 8) | __b2; \ -}) -#endif - -#define __get_user_asm_word(x,addr,err) \ - __asm__ __volatile__( \ - "1: ldrt %1,[%2],#0\n" \ - "2:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %0, %3\n" \ - " mov %1, #0\n" \ - " b 2b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 3b\n" \ - " .previous" \ - : "+r" (err), "=&r" (x) \ - : "r" (addr), "i" (-EFAULT) \ - : "cc") - -#define __put_user(x,ptr) \ -({ \ - long __pu_err = 0; \ - __put_user_err((x),(ptr),__pu_err); \ - __pu_err; \ -}) - -#define __put_user_error(x,ptr,err) \ -({ \ - __put_user_err((x),(ptr),err); \ - (void) 0; \ -}) - -#define __put_user_err(x,ptr,err) \ -do { \ - unsigned long __pu_addr = (unsigned long)(ptr); \ - __typeof__(*(ptr)) __pu_val = (x); \ - __chk_user_ptr(ptr); \ - switch (sizeof(*(ptr))) { \ - case 1: __put_user_asm_byte(__pu_val,__pu_addr,err); break; \ - case 2: __put_user_asm_half(__pu_val,__pu_addr,err); break; \ - case 4: __put_user_asm_word(__pu_val,__pu_addr,err); break; \ - case 8: __put_user_asm_dword(__pu_val,__pu_addr,err); break; \ - default: __put_user_bad(); \ - } \ -} while (0) - -#define __put_user_asm_byte(x,__pu_addr,err) \ - __asm__ __volatile__( \ - "1: strbt %1,[%2],#0\n" \ - "2:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %0, %3\n" \ - " b 2b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 3b\n" \ - " .previous" \ - : "+r" (err) \ - : "r" (x), "r" (__pu_addr), "i" (-EFAULT) \ - : "cc") - -#ifndef __ARMEB__ -#define __put_user_asm_half(x,__pu_addr,err) \ -({ \ - unsigned long __temp = (unsigned long)(x); \ - __put_user_asm_byte(__temp, __pu_addr, err); \ - __put_user_asm_byte(__temp >> 8, __pu_addr + 1, err); \ -}) -#else -#define __put_user_asm_half(x,__pu_addr,err) \ -({ \ - unsigned long __temp = (unsigned long)(x); \ - __put_user_asm_byte(__temp >> 8, __pu_addr, err); \ - __put_user_asm_byte(__temp, __pu_addr + 1, err); \ -}) -#endif - -#define __put_user_asm_word(x,__pu_addr,err) \ - __asm__ __volatile__( \ - "1: strt %1,[%2],#0\n" \ - "2:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "3: mov %0, %3\n" \ - " b 2b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 3b\n" \ - " .previous" \ - : "+r" (err) \ - : "r" (x), "r" (__pu_addr), "i" (-EFAULT) \ - : "cc") - -#ifndef __ARMEB__ -#define __reg_oper0 "%R2" -#define __reg_oper1 "%Q2" -#else -#define __reg_oper0 "%Q2" -#define __reg_oper1 "%R2" -#endif - -#define __put_user_asm_dword(x,__pu_addr,err) \ - __asm__ __volatile__( \ - "1: strt " __reg_oper1 ", [%1], #4\n" \ - "2: strt " __reg_oper0 ", [%1], #0\n" \ - "3:\n" \ - " .section .fixup,\"ax\"\n" \ - " .align 2\n" \ - "4: mov %0, %3\n" \ - " b 3b\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 3\n" \ - " .long 1b, 4b\n" \ - " .long 2b, 4b\n" \ - " .previous" \ - : "+r" (err), "+r" (__pu_addr) \ - : "r" (x), "i" (-EFAULT) \ - : "cc") - - -#ifdef CONFIG_MMU -extern unsigned long __must_check __copy_from_user(void *to, const void __user *from, unsigned long n); -extern unsigned long __must_check __copy_to_user(void __user *to, const void *from, unsigned long n); -extern unsigned long __must_check __clear_user(void __user *addr, unsigned long n); -#else -#define __copy_from_user(to,from,n) (memcpy(to, (void __force *)from, n), 0) -#define __copy_to_user(to,from,n) (memcpy((void __force *)to, from, n), 0) -#define __clear_user(addr,n) (memset((void __force *)addr, 0, n), 0) -#endif - -extern unsigned long __must_check __strncpy_from_user(char *to, const char __user *from, unsigned long count); -extern unsigned long __must_check __strnlen_user(const char __user *s, long n); - -static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) -{ - if (access_ok(VERIFY_READ, from, n)) - n = __copy_from_user(to, from, n); - else /* security hole - plug it */ - memzero(to, n); - return n; -} - -static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n) -{ - if (access_ok(VERIFY_WRITE, to, n)) - n = __copy_to_user(to, from, n); - return n; -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -static inline unsigned long __must_check clear_user(void __user *to, unsigned long n) -{ - if (access_ok(VERIFY_WRITE, to, n)) - n = __clear_user(to, n); - return n; -} - -static inline long __must_check strncpy_from_user(char *dst, const char __user *src, long count) -{ - long res = -EFAULT; - if (access_ok(VERIFY_READ, src, 1)) - res = __strncpy_from_user(dst, src, count); - return res; -} - -#define strlen_user(s) strnlen_user(s, ~0UL >> 1) - -static inline long __must_check strnlen_user(const char __user *s, long n) -{ - unsigned long res = 0; - - if (__addr_ok(s)) - res = __strnlen_user(s, n); - - return res; -} - -#endif /* _ASMARM_UACCESS_H */ diff --git a/include/asm-arm/ucontext.h b/include/asm-arm/ucontext.h deleted file mode 100644 index bf65e9f..0000000 --- a/include/asm-arm/ucontext.h +++ /dev/null @@ -1,103 +0,0 @@ -#ifndef _ASMARM_UCONTEXT_H -#define _ASMARM_UCONTEXT_H - -#include - -/* - * struct sigcontext only has room for the basic registers, but struct - * ucontext now has room for all registers which need to be saved and - * restored. Coprocessor registers are stored in uc_regspace. Each - * coprocessor's saved state should start with a documented 32-bit magic - * number, followed by a 32-bit word giving the coproccesor's saved size. - * uc_regspace may be expanded if necessary, although this takes some - * coordination with glibc. - */ - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct sigcontext uc_mcontext; - sigset_t uc_sigmask; - /* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */ - int __unused[32 - (sizeof (sigset_t) / sizeof (int))]; - /* Last for extensibility. Eight byte aligned because some - coprocessors require eight byte alignment. */ - unsigned long uc_regspace[128] __attribute__((__aligned__(8))); -}; - -#ifdef __KERNEL__ - -/* - * Coprocessor save state. The magic values and specific - * coprocessor's layouts are part of the userspace ABI. Each one of - * these should be a multiple of eight bytes and aligned to eight - * bytes, to prevent unpredictable padding in the signal frame. - */ - -#ifdef CONFIG_CRUNCH -#define CRUNCH_MAGIC 0x5065cf03 -#define CRUNCH_STORAGE_SIZE (CRUNCH_SIZE + 8) - -struct crunch_sigframe { - unsigned long magic; - unsigned long size; - struct crunch_state storage; -} __attribute__((__aligned__(8))); -#endif - -#ifdef CONFIG_IWMMXT -/* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */ -#define IWMMXT_MAGIC 0x12ef842a -#define IWMMXT_STORAGE_SIZE (IWMMXT_SIZE + 8) - -struct iwmmxt_sigframe { - unsigned long magic; - unsigned long size; - struct iwmmxt_struct storage; -} __attribute__((__aligned__(8))); -#endif /* CONFIG_IWMMXT */ - -#ifdef CONFIG_VFP -#if __LINUX_ARM_ARCH__ < 6 -/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra - * word after the registers, and a word of padding at the end for - * alignment. */ -#define VFP_MAGIC 0x56465001 -#define VFP_STORAGE_SIZE 152 -#else -#define VFP_MAGIC 0x56465002 -#define VFP_STORAGE_SIZE 144 -#endif - -struct vfp_sigframe -{ - unsigned long magic; - unsigned long size; - union vfp_state storage; -}; -#endif /* CONFIG_VFP */ - -/* - * Auxiliary signal frame. This saves stuff like FP state. - * The layout of this structure is not part of the user ABI, - * because the config options aren't. uc_regspace is really - * one of these. - */ -struct aux_sigframe { -#ifdef CONFIG_CRUNCH - struct crunch_sigframe crunch; -#endif -#ifdef CONFIG_IWMMXT - struct iwmmxt_sigframe iwmmxt; -#endif -#if 0 && defined CONFIG_VFP /* Not yet saved. */ - struct vfp_sigframe vfp; -#endif - /* Something that isn't a valid magic number for any coprocessor. */ - unsigned long end_magic; -} __attribute__((__aligned__(8))); - -#endif - -#endif /* !_ASMARM_UCONTEXT_H */ diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h deleted file mode 100644 index 44593a8..0000000 --- a/include/asm-arm/unaligned.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_ARM_UNALIGNED_H -#define _ASM_ARM_UNALIGNED_H - -#include -#include -#include - -/* - * Select endianness - */ -#ifndef __ARMEB__ -#define get_unaligned __get_unaligned_le -#define put_unaligned __put_unaligned_le -#else -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be -#endif - -#endif /* _ASM_ARM_UNALIGNED_H */ diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h deleted file mode 100644 index 7c57008..0000000 --- a/include/asm-arm/unistd.h +++ /dev/null @@ -1,450 +0,0 @@ -/* - * linux/include/asm-arm/unistd.h - * - * Copyright (C) 2001-2005 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Please forward _all_ changes to this file to rmk@arm.linux.org.uk, - * no matter what the change is. Thanks! - */ -#ifndef __ASM_ARM_UNISTD_H -#define __ASM_ARM_UNISTD_H - -#define __NR_OABI_SYSCALL_BASE 0x900000 - -#if defined(__thumb__) || defined(__ARM_EABI__) -#define __NR_SYSCALL_BASE 0 -#else -#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE -#endif - -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall (__NR_SYSCALL_BASE+ 0) -#define __NR_exit (__NR_SYSCALL_BASE+ 1) -#define __NR_fork (__NR_SYSCALL_BASE+ 2) -#define __NR_read (__NR_SYSCALL_BASE+ 3) -#define __NR_write (__NR_SYSCALL_BASE+ 4) -#define __NR_open (__NR_SYSCALL_BASE+ 5) -#define __NR_close (__NR_SYSCALL_BASE+ 6) - /* 7 was sys_waitpid */ -#define __NR_creat (__NR_SYSCALL_BASE+ 8) -#define __NR_link (__NR_SYSCALL_BASE+ 9) -#define __NR_unlink (__NR_SYSCALL_BASE+ 10) -#define __NR_execve (__NR_SYSCALL_BASE+ 11) -#define __NR_chdir (__NR_SYSCALL_BASE+ 12) -#define __NR_time (__NR_SYSCALL_BASE+ 13) -#define __NR_mknod (__NR_SYSCALL_BASE+ 14) -#define __NR_chmod (__NR_SYSCALL_BASE+ 15) -#define __NR_lchown (__NR_SYSCALL_BASE+ 16) - /* 17 was sys_break */ - /* 18 was sys_stat */ -#define __NR_lseek (__NR_SYSCALL_BASE+ 19) -#define __NR_getpid (__NR_SYSCALL_BASE+ 20) -#define __NR_mount (__NR_SYSCALL_BASE+ 21) -#define __NR_umount (__NR_SYSCALL_BASE+ 22) -#define __NR_setuid (__NR_SYSCALL_BASE+ 23) -#define __NR_getuid (__NR_SYSCALL_BASE+ 24) -#define __NR_stime (__NR_SYSCALL_BASE+ 25) -#define __NR_ptrace (__NR_SYSCALL_BASE+ 26) -#define __NR_alarm (__NR_SYSCALL_BASE+ 27) - /* 28 was sys_fstat */ -#define __NR_pause (__NR_SYSCALL_BASE+ 29) -#define __NR_utime (__NR_SYSCALL_BASE+ 30) - /* 31 was sys_stty */ - /* 32 was sys_gtty */ -#define __NR_access (__NR_SYSCALL_BASE+ 33) -#define __NR_nice (__NR_SYSCALL_BASE+ 34) - /* 35 was sys_ftime */ -#define __NR_sync (__NR_SYSCALL_BASE+ 36) -#define __NR_kill (__NR_SYSCALL_BASE+ 37) -#define __NR_rename (__NR_SYSCALL_BASE+ 38) -#define __NR_mkdir (__NR_SYSCALL_BASE+ 39) -#define __NR_rmdir (__NR_SYSCALL_BASE+ 40) -#define __NR_dup (__NR_SYSCALL_BASE+ 41) -#define __NR_pipe (__NR_SYSCALL_BASE+ 42) -#define __NR_times (__NR_SYSCALL_BASE+ 43) - /* 44 was sys_prof */ -#define __NR_brk (__NR_SYSCALL_BASE+ 45) -#define __NR_setgid (__NR_SYSCALL_BASE+ 46) -#define __NR_getgid (__NR_SYSCALL_BASE+ 47) - /* 48 was sys_signal */ -#define __NR_geteuid (__NR_SYSCALL_BASE+ 49) -#define __NR_getegid (__NR_SYSCALL_BASE+ 50) -#define __NR_acct (__NR_SYSCALL_BASE+ 51) -#define __NR_umount2 (__NR_SYSCALL_BASE+ 52) - /* 53 was sys_lock */ -#define __NR_ioctl (__NR_SYSCALL_BASE+ 54) -#define __NR_fcntl (__NR_SYSCALL_BASE+ 55) - /* 56 was sys_mpx */ -#define __NR_setpgid (__NR_SYSCALL_BASE+ 57) - /* 58 was sys_ulimit */ - /* 59 was sys_olduname */ -#define __NR_umask (__NR_SYSCALL_BASE+ 60) -#define __NR_chroot (__NR_SYSCALL_BASE+ 61) -#define __NR_ustat (__NR_SYSCALL_BASE+ 62) -#define __NR_dup2 (__NR_SYSCALL_BASE+ 63) -#define __NR_getppid (__NR_SYSCALL_BASE+ 64) -#define __NR_getpgrp (__NR_SYSCALL_BASE+ 65) -#define __NR_setsid (__NR_SYSCALL_BASE+ 66) -#define __NR_sigaction (__NR_SYSCALL_BASE+ 67) - /* 68 was sys_sgetmask */ - /* 69 was sys_ssetmask */ -#define __NR_setreuid (__NR_SYSCALL_BASE+ 70) -#define __NR_setregid (__NR_SYSCALL_BASE+ 71) -#define __NR_sigsuspend (__NR_SYSCALL_BASE+ 72) -#define __NR_sigpending (__NR_SYSCALL_BASE+ 73) -#define __NR_sethostname (__NR_SYSCALL_BASE+ 74) -#define __NR_setrlimit (__NR_SYSCALL_BASE+ 75) -#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */ -#define __NR_getrusage (__NR_SYSCALL_BASE+ 77) -#define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78) -#define __NR_settimeofday (__NR_SYSCALL_BASE+ 79) -#define __NR_getgroups (__NR_SYSCALL_BASE+ 80) -#define __NR_setgroups (__NR_SYSCALL_BASE+ 81) -#define __NR_select (__NR_SYSCALL_BASE+ 82) -#define __NR_symlink (__NR_SYSCALL_BASE+ 83) - /* 84 was sys_lstat */ -#define __NR_readlink (__NR_SYSCALL_BASE+ 85) -#define __NR_uselib (__NR_SYSCALL_BASE+ 86) -#define __NR_swapon (__NR_SYSCALL_BASE+ 87) -#define __NR_reboot (__NR_SYSCALL_BASE+ 88) -#define __NR_readdir (__NR_SYSCALL_BASE+ 89) -#define __NR_mmap (__NR_SYSCALL_BASE+ 90) -#define __NR_munmap (__NR_SYSCALL_BASE+ 91) -#define __NR_truncate (__NR_SYSCALL_BASE+ 92) -#define __NR_ftruncate (__NR_SYSCALL_BASE+ 93) -#define __NR_fchmod (__NR_SYSCALL_BASE+ 94) -#define __NR_fchown (__NR_SYSCALL_BASE+ 95) -#define __NR_getpriority (__NR_SYSCALL_BASE+ 96) -#define __NR_setpriority (__NR_SYSCALL_BASE+ 97) - /* 98 was sys_profil */ -#define __NR_statfs (__NR_SYSCALL_BASE+ 99) -#define __NR_fstatfs (__NR_SYSCALL_BASE+100) - /* 101 was sys_ioperm */ -#define __NR_socketcall (__NR_SYSCALL_BASE+102) -#define __NR_syslog (__NR_SYSCALL_BASE+103) -#define __NR_setitimer (__NR_SYSCALL_BASE+104) -#define __NR_getitimer (__NR_SYSCALL_BASE+105) -#define __NR_stat (__NR_SYSCALL_BASE+106) -#define __NR_lstat (__NR_SYSCALL_BASE+107) -#define __NR_fstat (__NR_SYSCALL_BASE+108) - /* 109 was sys_uname */ - /* 110 was sys_iopl */ -#define __NR_vhangup (__NR_SYSCALL_BASE+111) - /* 112 was sys_idle */ -#define __NR_syscall (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */ -#define __NR_wait4 (__NR_SYSCALL_BASE+114) -#define __NR_swapoff (__NR_SYSCALL_BASE+115) -#define __NR_sysinfo (__NR_SYSCALL_BASE+116) -#define __NR_ipc (__NR_SYSCALL_BASE+117) -#define __NR_fsync (__NR_SYSCALL_BASE+118) -#define __NR_sigreturn (__NR_SYSCALL_BASE+119) -#define __NR_clone (__NR_SYSCALL_BASE+120) -#define __NR_setdomainname (__NR_SYSCALL_BASE+121) -#define __NR_uname (__NR_SYSCALL_BASE+122) - /* 123 was sys_modify_ldt */ -#define __NR_adjtimex (__NR_SYSCALL_BASE+124) -#define __NR_mprotect (__NR_SYSCALL_BASE+125) -#define __NR_sigprocmask (__NR_SYSCALL_BASE+126) - /* 127 was sys_create_module */ -#define __NR_init_module (__NR_SYSCALL_BASE+128) -#define __NR_delete_module (__NR_SYSCALL_BASE+129) - /* 130 was sys_get_kernel_syms */ -#define __NR_quotactl (__NR_SYSCALL_BASE+131) -#define __NR_getpgid (__NR_SYSCALL_BASE+132) -#define __NR_fchdir (__NR_SYSCALL_BASE+133) -#define __NR_bdflush (__NR_SYSCALL_BASE+134) -#define __NR_sysfs (__NR_SYSCALL_BASE+135) -#define __NR_personality (__NR_SYSCALL_BASE+136) - /* 137 was sys_afs_syscall */ -#define __NR_setfsuid (__NR_SYSCALL_BASE+138) -#define __NR_setfsgid (__NR_SYSCALL_BASE+139) -#define __NR__llseek (__NR_SYSCALL_BASE+140) -#define __NR_getdents (__NR_SYSCALL_BASE+141) -#define __NR__newselect (__NR_SYSCALL_BASE+142) -#define __NR_flock (__NR_SYSCALL_BASE+143) -#define __NR_msync (__NR_SYSCALL_BASE+144) -#define __NR_readv (__NR_SYSCALL_BASE+145) -#define __NR_writev (__NR_SYSCALL_BASE+146) -#define __NR_getsid (__NR_SYSCALL_BASE+147) -#define __NR_fdatasync (__NR_SYSCALL_BASE+148) -#define __NR__sysctl (__NR_SYSCALL_BASE+149) -#define __NR_mlock (__NR_SYSCALL_BASE+150) -#define __NR_munlock (__NR_SYSCALL_BASE+151) -#define __NR_mlockall (__NR_SYSCALL_BASE+152) -#define __NR_munlockall (__NR_SYSCALL_BASE+153) -#define __NR_sched_setparam (__NR_SYSCALL_BASE+154) -#define __NR_sched_getparam (__NR_SYSCALL_BASE+155) -#define __NR_sched_setscheduler (__NR_SYSCALL_BASE+156) -#define __NR_sched_getscheduler (__NR_SYSCALL_BASE+157) -#define __NR_sched_yield (__NR_SYSCALL_BASE+158) -#define __NR_sched_get_priority_max (__NR_SYSCALL_BASE+159) -#define __NR_sched_get_priority_min (__NR_SYSCALL_BASE+160) -#define __NR_sched_rr_get_interval (__NR_SYSCALL_BASE+161) -#define __NR_nanosleep (__NR_SYSCALL_BASE+162) -#define __NR_mremap (__NR_SYSCALL_BASE+163) -#define __NR_setresuid (__NR_SYSCALL_BASE+164) -#define __NR_getresuid (__NR_SYSCALL_BASE+165) - /* 166 was sys_vm86 */ - /* 167 was sys_query_module */ -#define __NR_poll (__NR_SYSCALL_BASE+168) -#define __NR_nfsservctl (__NR_SYSCALL_BASE+169) -#define __NR_setresgid (__NR_SYSCALL_BASE+170) -#define __NR_getresgid (__NR_SYSCALL_BASE+171) -#define __NR_prctl (__NR_SYSCALL_BASE+172) -#define __NR_rt_sigreturn (__NR_SYSCALL_BASE+173) -#define __NR_rt_sigaction (__NR_SYSCALL_BASE+174) -#define __NR_rt_sigprocmask (__NR_SYSCALL_BASE+175) -#define __NR_rt_sigpending (__NR_SYSCALL_BASE+176) -#define __NR_rt_sigtimedwait (__NR_SYSCALL_BASE+177) -#define __NR_rt_sigqueueinfo (__NR_SYSCALL_BASE+178) -#define __NR_rt_sigsuspend (__NR_SYSCALL_BASE+179) -#define __NR_pread64 (__NR_SYSCALL_BASE+180) -#define __NR_pwrite64 (__NR_SYSCALL_BASE+181) -#define __NR_chown (__NR_SYSCALL_BASE+182) -#define __NR_getcwd (__NR_SYSCALL_BASE+183) -#define __NR_capget (__NR_SYSCALL_BASE+184) -#define __NR_capset (__NR_SYSCALL_BASE+185) -#define __NR_sigaltstack (__NR_SYSCALL_BASE+186) -#define __NR_sendfile (__NR_SYSCALL_BASE+187) - /* 188 reserved */ - /* 189 reserved */ -#define __NR_vfork (__NR_SYSCALL_BASE+190) -#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */ -#define __NR_mmap2 (__NR_SYSCALL_BASE+192) -#define __NR_truncate64 (__NR_SYSCALL_BASE+193) -#define __NR_ftruncate64 (__NR_SYSCALL_BASE+194) -#define __NR_stat64 (__NR_SYSCALL_BASE+195) -#define __NR_lstat64 (__NR_SYSCALL_BASE+196) -#define __NR_fstat64 (__NR_SYSCALL_BASE+197) -#define __NR_lchown32 (__NR_SYSCALL_BASE+198) -#define __NR_getuid32 (__NR_SYSCALL_BASE+199) -#define __NR_getgid32 (__NR_SYSCALL_BASE+200) -#define __NR_geteuid32 (__NR_SYSCALL_BASE+201) -#define __NR_getegid32 (__NR_SYSCALL_BASE+202) -#define __NR_setreuid32 (__NR_SYSCALL_BASE+203) -#define __NR_setregid32 (__NR_SYSCALL_BASE+204) -#define __NR_getgroups32 (__NR_SYSCALL_BASE+205) -#define __NR_setgroups32 (__NR_SYSCALL_BASE+206) -#define __NR_fchown32 (__NR_SYSCALL_BASE+207) -#define __NR_setresuid32 (__NR_SYSCALL_BASE+208) -#define __NR_getresuid32 (__NR_SYSCALL_BASE+209) -#define __NR_setresgid32 (__NR_SYSCALL_BASE+210) -#define __NR_getresgid32 (__NR_SYSCALL_BASE+211) -#define __NR_chown32 (__NR_SYSCALL_BASE+212) -#define __NR_setuid32 (__NR_SYSCALL_BASE+213) -#define __NR_setgid32 (__NR_SYSCALL_BASE+214) -#define __NR_setfsuid32 (__NR_SYSCALL_BASE+215) -#define __NR_setfsgid32 (__NR_SYSCALL_BASE+216) -#define __NR_getdents64 (__NR_SYSCALL_BASE+217) -#define __NR_pivot_root (__NR_SYSCALL_BASE+218) -#define __NR_mincore (__NR_SYSCALL_BASE+219) -#define __NR_madvise (__NR_SYSCALL_BASE+220) -#define __NR_fcntl64 (__NR_SYSCALL_BASE+221) - /* 222 for tux */ - /* 223 is unused */ -#define __NR_gettid (__NR_SYSCALL_BASE+224) -#define __NR_readahead (__NR_SYSCALL_BASE+225) -#define __NR_setxattr (__NR_SYSCALL_BASE+226) -#define __NR_lsetxattr (__NR_SYSCALL_BASE+227) -#define __NR_fsetxattr (__NR_SYSCALL_BASE+228) -#define __NR_getxattr (__NR_SYSCALL_BASE+229) -#define __NR_lgetxattr (__NR_SYSCALL_BASE+230) -#define __NR_fgetxattr (__NR_SYSCALL_BASE+231) -#define __NR_listxattr (__NR_SYSCALL_BASE+232) -#define __NR_llistxattr (__NR_SYSCALL_BASE+233) -#define __NR_flistxattr (__NR_SYSCALL_BASE+234) -#define __NR_removexattr (__NR_SYSCALL_BASE+235) -#define __NR_lremovexattr (__NR_SYSCALL_BASE+236) -#define __NR_fremovexattr (__NR_SYSCALL_BASE+237) -#define __NR_tkill (__NR_SYSCALL_BASE+238) -#define __NR_sendfile64 (__NR_SYSCALL_BASE+239) -#define __NR_futex (__NR_SYSCALL_BASE+240) -#define __NR_sched_setaffinity (__NR_SYSCALL_BASE+241) -#define __NR_sched_getaffinity (__NR_SYSCALL_BASE+242) -#define __NR_io_setup (__NR_SYSCALL_BASE+243) -#define __NR_io_destroy (__NR_SYSCALL_BASE+244) -#define __NR_io_getevents (__NR_SYSCALL_BASE+245) -#define __NR_io_submit (__NR_SYSCALL_BASE+246) -#define __NR_io_cancel (__NR_SYSCALL_BASE+247) -#define __NR_exit_group (__NR_SYSCALL_BASE+248) -#define __NR_lookup_dcookie (__NR_SYSCALL_BASE+249) -#define __NR_epoll_create (__NR_SYSCALL_BASE+250) -#define __NR_epoll_ctl (__NR_SYSCALL_BASE+251) -#define __NR_epoll_wait (__NR_SYSCALL_BASE+252) -#define __NR_remap_file_pages (__NR_SYSCALL_BASE+253) - /* 254 for set_thread_area */ - /* 255 for get_thread_area */ -#define __NR_set_tid_address (__NR_SYSCALL_BASE+256) -#define __NR_timer_create (__NR_SYSCALL_BASE+257) -#define __NR_timer_settime (__NR_SYSCALL_BASE+258) -#define __NR_timer_gettime (__NR_SYSCALL_BASE+259) -#define __NR_timer_getoverrun (__NR_SYSCALL_BASE+260) -#define __NR_timer_delete (__NR_SYSCALL_BASE+261) -#define __NR_clock_settime (__NR_SYSCALL_BASE+262) -#define __NR_clock_gettime (__NR_SYSCALL_BASE+263) -#define __NR_clock_getres (__NR_SYSCALL_BASE+264) -#define __NR_clock_nanosleep (__NR_SYSCALL_BASE+265) -#define __NR_statfs64 (__NR_SYSCALL_BASE+266) -#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267) -#define __NR_tgkill (__NR_SYSCALL_BASE+268) -#define __NR_utimes (__NR_SYSCALL_BASE+269) -#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270) -#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271) -#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272) -#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273) -#define __NR_mq_open (__NR_SYSCALL_BASE+274) -#define __NR_mq_unlink (__NR_SYSCALL_BASE+275) -#define __NR_mq_timedsend (__NR_SYSCALL_BASE+276) -#define __NR_mq_timedreceive (__NR_SYSCALL_BASE+277) -#define __NR_mq_notify (__NR_SYSCALL_BASE+278) -#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279) -#define __NR_waitid (__NR_SYSCALL_BASE+280) -#define __NR_socket (__NR_SYSCALL_BASE+281) -#define __NR_bind (__NR_SYSCALL_BASE+282) -#define __NR_connect (__NR_SYSCALL_BASE+283) -#define __NR_listen (__NR_SYSCALL_BASE+284) -#define __NR_accept (__NR_SYSCALL_BASE+285) -#define __NR_getsockname (__NR_SYSCALL_BASE+286) -#define __NR_getpeername (__NR_SYSCALL_BASE+287) -#define __NR_socketpair (__NR_SYSCALL_BASE+288) -#define __NR_send (__NR_SYSCALL_BASE+289) -#define __NR_sendto (__NR_SYSCALL_BASE+290) -#define __NR_recv (__NR_SYSCALL_BASE+291) -#define __NR_recvfrom (__NR_SYSCALL_BASE+292) -#define __NR_shutdown (__NR_SYSCALL_BASE+293) -#define __NR_setsockopt (__NR_SYSCALL_BASE+294) -#define __NR_getsockopt (__NR_SYSCALL_BASE+295) -#define __NR_sendmsg (__NR_SYSCALL_BASE+296) -#define __NR_recvmsg (__NR_SYSCALL_BASE+297) -#define __NR_semop (__NR_SYSCALL_BASE+298) -#define __NR_semget (__NR_SYSCALL_BASE+299) -#define __NR_semctl (__NR_SYSCALL_BASE+300) -#define __NR_msgsnd (__NR_SYSCALL_BASE+301) -#define __NR_msgrcv (__NR_SYSCALL_BASE+302) -#define __NR_msgget (__NR_SYSCALL_BASE+303) -#define __NR_msgctl (__NR_SYSCALL_BASE+304) -#define __NR_shmat (__NR_SYSCALL_BASE+305) -#define __NR_shmdt (__NR_SYSCALL_BASE+306) -#define __NR_shmget (__NR_SYSCALL_BASE+307) -#define __NR_shmctl (__NR_SYSCALL_BASE+308) -#define __NR_add_key (__NR_SYSCALL_BASE+309) -#define __NR_request_key (__NR_SYSCALL_BASE+310) -#define __NR_keyctl (__NR_SYSCALL_BASE+311) -#define __NR_semtimedop (__NR_SYSCALL_BASE+312) -#define __NR_vserver (__NR_SYSCALL_BASE+313) -#define __NR_ioprio_set (__NR_SYSCALL_BASE+314) -#define __NR_ioprio_get (__NR_SYSCALL_BASE+315) -#define __NR_inotify_init (__NR_SYSCALL_BASE+316) -#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317) -#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318) -#define __NR_mbind (__NR_SYSCALL_BASE+319) -#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320) -#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321) -#define __NR_openat (__NR_SYSCALL_BASE+322) -#define __NR_mkdirat (__NR_SYSCALL_BASE+323) -#define __NR_mknodat (__NR_SYSCALL_BASE+324) -#define __NR_fchownat (__NR_SYSCALL_BASE+325) -#define __NR_futimesat (__NR_SYSCALL_BASE+326) -#define __NR_fstatat64 (__NR_SYSCALL_BASE+327) -#define __NR_unlinkat (__NR_SYSCALL_BASE+328) -#define __NR_renameat (__NR_SYSCALL_BASE+329) -#define __NR_linkat (__NR_SYSCALL_BASE+330) -#define __NR_symlinkat (__NR_SYSCALL_BASE+331) -#define __NR_readlinkat (__NR_SYSCALL_BASE+332) -#define __NR_fchmodat (__NR_SYSCALL_BASE+333) -#define __NR_faccessat (__NR_SYSCALL_BASE+334) - /* 335 for pselect6 */ - /* 336 for ppoll */ -#define __NR_unshare (__NR_SYSCALL_BASE+337) -#define __NR_set_robust_list (__NR_SYSCALL_BASE+338) -#define __NR_get_robust_list (__NR_SYSCALL_BASE+339) -#define __NR_splice (__NR_SYSCALL_BASE+340) -#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341) -#define __NR_sync_file_range2 __NR_arm_sync_file_range -#define __NR_tee (__NR_SYSCALL_BASE+342) -#define __NR_vmsplice (__NR_SYSCALL_BASE+343) -#define __NR_move_pages (__NR_SYSCALL_BASE+344) -#define __NR_getcpu (__NR_SYSCALL_BASE+345) - /* 346 for epoll_pwait */ -#define __NR_kexec_load (__NR_SYSCALL_BASE+347) -#define __NR_utimensat (__NR_SYSCALL_BASE+348) -#define __NR_signalfd (__NR_SYSCALL_BASE+349) -#define __NR_timerfd_create (__NR_SYSCALL_BASE+350) -#define __NR_eventfd (__NR_SYSCALL_BASE+351) -#define __NR_fallocate (__NR_SYSCALL_BASE+352) -#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353) -#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354) - -/* - * The following SWIs are ARM private. - */ -#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000) -#define __ARM_NR_breakpoint (__ARM_NR_BASE+1) -#define __ARM_NR_cacheflush (__ARM_NR_BASE+2) -#define __ARM_NR_usr26 (__ARM_NR_BASE+3) -#define __ARM_NR_usr32 (__ARM_NR_BASE+4) -#define __ARM_NR_set_tls (__ARM_NR_BASE+5) - -/* - * The following syscalls are obsolete and no longer available for EABI. - */ -#if defined(__ARM_EABI__) && !defined(__KERNEL__) -#undef __NR_time -#undef __NR_umount -#undef __NR_stime -#undef __NR_alarm -#undef __NR_utime -#undef __NR_getrlimit -#undef __NR_select -#undef __NR_readdir -#undef __NR_mmap -#undef __NR_socketcall -#undef __NR_syscall -#undef __NR_ipc -#endif - -#ifdef __KERNEL__ - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT) -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_SYS_SOCKETCALL -#endif - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -/* - * Unimplemented (or alternatively implemented) syscalls - */ -#define __IGNORE_fadvise64_64 1 - -#endif /* __KERNEL__ */ -#endif /* __ASM_ARM_UNISTD_H */ diff --git a/include/asm-arm/user.h b/include/asm-arm/user.h deleted file mode 100644 index 825c1e7..0000000 --- a/include/asm-arm/user.h +++ /dev/null @@ -1,84 +0,0 @@ -#ifndef _ARM_USER_H -#define _ARM_USER_H - -#include -#include -/* Core file format: The core file is written in such a way that gdb - can understand it and provide useful information to the user (under - linux we use the 'trad-core' bfd). There are quite a number of - obstacles to being able to view the contents of the floating point - registers, and until these are solved you will not be able to view the - contents of them. Actually, you can read in the core file and look at - the contents of the user struct to find out what the floating point - registers contain. - The actual file contents are as follows: - UPAGE: 1 page consisting of a user struct that tells gdb what is present - in the file. Directly after this is a copy of the task_struct, which - is currently not used by gdb, but it may come in useful at some point. - All of the registers are stored as part of the upage. The upage should - always be only one page. - DATA: The data area is stored. We use current->end_text to - current->brk to pick up all of the user variables, plus any memory - that may have been malloced. No attempt is made to determine if a page - is demand-zero or if a page is totally unused, we just cover the entire - range. All of the addresses are rounded in such a way that an integral - number of pages is written. - STACK: We need the stack information in order to get a meaningful - backtrace. We need to write the data from (esp) to - current->start_stack, so we round each of these off in order to be able - to write an integer number of pages. - The minimum core file size is 3 pages, or 12288 bytes. -*/ - -struct user_fp { - struct fp_reg { - unsigned int sign1:1; - unsigned int unused:15; - unsigned int sign2:1; - unsigned int exponent:14; - unsigned int j:1; - unsigned int mantissa1:31; - unsigned int mantissa0:32; - } fpregs[8]; - unsigned int fpsr:32; - unsigned int fpcr:32; - unsigned char ftype[8]; - unsigned int init_flag; -}; - -/* When the kernel dumps core, it starts by dumping the user struct - - this will be used by gdb to figure out where the data and stack segments - are within the file, and what virtual addresses to use. */ -struct user{ -/* We start with the registers, to mimic the way that "memory" is returned - from the ptrace(3,...) function. */ - struct pt_regs regs; /* Where the registers are actually stored */ -/* ptrace does not yet supply these. Someday.... */ - int u_fpvalid; /* True if math co-processor being used. */ - /* for this mess. Not yet used. */ -/* The rest of this junk is to help gdb figure out what goes where */ - unsigned long int u_tsize; /* Text segment size (pages). */ - unsigned long int u_dsize; /* Data segment size (pages). */ - unsigned long int u_ssize; /* Stack segment size (pages). */ - unsigned long start_code; /* Starting virtual address of text. */ - unsigned long start_stack; /* Starting virtual address of stack area. - This is actually the bottom of the stack, - the top of the stack is always found in the - esp register. */ - long int signal; /* Signal that caused the core dump. */ - int reserved; /* No longer used */ - unsigned long u_ar0; /* Used by gdb to help find the values for */ - /* the registers. */ - unsigned long magic; /* To uniquely identify a core file */ - char u_comm[32]; /* User command that was responsible */ - int u_debugreg[8]; - struct user_fp u_fp; /* FP state */ - struct user_fp_struct * u_fp0;/* Used by gdb to help find the values for */ - /* the FP registers. */ -}; -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) - -#endif /* _ARM_USER_H */ diff --git a/include/asm-arm/vfp.h b/include/asm-arm/vfp.h deleted file mode 100644 index 5f9a2cb..0000000 --- a/include/asm-arm/vfp.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * linux/include/asm-arm/vfp.h - * - * VFP register definitions. - * First, the standard VFP set. - */ - -#define FPSID cr0 -#define FPSCR cr1 -#define MVFR1 cr6 -#define MVFR0 cr7 -#define FPEXC cr8 -#define FPINST cr9 -#define FPINST2 cr10 - -/* FPSID bits */ -#define FPSID_IMPLEMENTER_BIT (24) -#define FPSID_IMPLEMENTER_MASK (0xff << FPSID_IMPLEMENTER_BIT) -#define FPSID_SOFTWARE (1<<23) -#define FPSID_FORMAT_BIT (21) -#define FPSID_FORMAT_MASK (0x3 << FPSID_FORMAT_BIT) -#define FPSID_NODOUBLE (1<<20) -#define FPSID_ARCH_BIT (16) -#define FPSID_ARCH_MASK (0xF << FPSID_ARCH_BIT) -#define FPSID_PART_BIT (8) -#define FPSID_PART_MASK (0xFF << FPSID_PART_BIT) -#define FPSID_VARIANT_BIT (4) -#define FPSID_VARIANT_MASK (0xF << FPSID_VARIANT_BIT) -#define FPSID_REV_BIT (0) -#define FPSID_REV_MASK (0xF << FPSID_REV_BIT) - -/* FPEXC bits */ -#define FPEXC_EX (1 << 31) -#define FPEXC_EN (1 << 30) -#define FPEXC_DEX (1 << 29) -#define FPEXC_FP2V (1 << 28) -#define FPEXC_VV (1 << 27) -#define FPEXC_TFV (1 << 26) -#define FPEXC_LENGTH_BIT (8) -#define FPEXC_LENGTH_MASK (7 << FPEXC_LENGTH_BIT) -#define FPEXC_IDF (1 << 7) -#define FPEXC_IXF (1 << 4) -#define FPEXC_UFF (1 << 3) -#define FPEXC_OFF (1 << 2) -#define FPEXC_DZF (1 << 1) -#define FPEXC_IOF (1 << 0) -#define FPEXC_TRAP_MASK (FPEXC_IDF|FPEXC_IXF|FPEXC_UFF|FPEXC_OFF|FPEXC_DZF|FPEXC_IOF) - -/* FPSCR bits */ -#define FPSCR_DEFAULT_NAN (1<<25) -#define FPSCR_FLUSHTOZERO (1<<24) -#define FPSCR_ROUND_NEAREST (0<<22) -#define FPSCR_ROUND_PLUSINF (1<<22) -#define FPSCR_ROUND_MINUSINF (2<<22) -#define FPSCR_ROUND_TOZERO (3<<22) -#define FPSCR_RMODE_BIT (22) -#define FPSCR_RMODE_MASK (3 << FPSCR_RMODE_BIT) -#define FPSCR_STRIDE_BIT (20) -#define FPSCR_STRIDE_MASK (3 << FPSCR_STRIDE_BIT) -#define FPSCR_LENGTH_BIT (16) -#define FPSCR_LENGTH_MASK (7 << FPSCR_LENGTH_BIT) -#define FPSCR_IOE (1<<8) -#define FPSCR_DZE (1<<9) -#define FPSCR_OFE (1<<10) -#define FPSCR_UFE (1<<11) -#define FPSCR_IXE (1<<12) -#define FPSCR_IDE (1<<15) -#define FPSCR_IOC (1<<0) -#define FPSCR_DZC (1<<1) -#define FPSCR_OFC (1<<2) -#define FPSCR_UFC (1<<3) -#define FPSCR_IXC (1<<4) -#define FPSCR_IDC (1<<7) - -/* MVFR0 bits */ -#define MVFR0_A_SIMD_BIT (0) -#define MVFR0_A_SIMD_MASK (0xf << MVFR0_A_SIMD_BIT) - -/* Bit patterns for decoding the packaged operation descriptors */ -#define VFPOPDESC_LENGTH_BIT (9) -#define VFPOPDESC_LENGTH_MASK (0x07 << VFPOPDESC_LENGTH_BIT) -#define VFPOPDESC_UNUSED_BIT (24) -#define VFPOPDESC_UNUSED_MASK (0xFF << VFPOPDESC_UNUSED_BIT) -#define VFPOPDESC_OPDESC_MASK (~(VFPOPDESC_LENGTH_MASK | VFPOPDESC_UNUSED_MASK)) diff --git a/include/asm-arm/vfpmacros.h b/include/asm-arm/vfpmacros.h deleted file mode 100644 index cccb389..0000000 --- a/include/asm-arm/vfpmacros.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * linux/include/asm-arm/vfpmacros.h - * - * Assembler-only file containing VFP macros and register definitions. - */ -#include "vfp.h" - -@ Macros to allow building with old toolkits (with no VFP support) - .macro VFPFMRX, rd, sysreg, cond - MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg - .endm - - .macro VFPFMXR, sysreg, rd, cond - MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd - .endm - - @ read all the working registers back into the VFP - .macro VFPFLDMIA, base, tmp -#if __LINUX_ARM_ARCH__ < 6 - LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} -#else - LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15} -#endif -#ifdef CONFIG_VFPv3 - VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 - and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field - cmp \tmp, #2 @ 32 x 64bit registers? - ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space -#endif - .endm - - @ write all the working registers out of the VFP - .macro VFPFSTMIA, base, tmp -#if __LINUX_ARM_ARCH__ < 6 - STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} -#else - STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15} -#endif -#ifdef CONFIG_VFPv3 - VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0 - and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field - cmp \tmp, #2 @ 32 x 64bit registers? - stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} - addne \base, \base, #32*4 @ step over unused register space -#endif - .endm diff --git a/include/asm-arm/vga.h b/include/asm-arm/vga.h deleted file mode 100644 index 1e0b913..0000000 --- a/include/asm-arm/vga.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef ASMARM_VGA_H -#define ASMARM_VGA_H - -#include -#include - -#define VGA_MAP_MEM(x,s) (PCIMEM_BASE + (x)) - -#define vga_readb(x) (*((volatile unsigned char *)x)) -#define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x)) - -#endif diff --git a/include/asm-arm/xor.h b/include/asm-arm/xor.h deleted file mode 100644 index e7c4cf5..0000000 --- a/include/asm-arm/xor.h +++ /dev/null @@ -1,141 +0,0 @@ -/* - * linux/include/asm-arm/xor.h - * - * Copyright (C) 2001 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - -#define __XOR(a1, a2) a1 ^= a2 - -#define GET_BLOCK_2(dst) \ - __asm__("ldmia %0, {%1, %2}" \ - : "=r" (dst), "=r" (a1), "=r" (a2) \ - : "0" (dst)) - -#define GET_BLOCK_4(dst) \ - __asm__("ldmia %0, {%1, %2, %3, %4}" \ - : "=r" (dst), "=r" (a1), "=r" (a2), "=r" (a3), "=r" (a4) \ - : "0" (dst)) - -#define XOR_BLOCK_2(src) \ - __asm__("ldmia %0!, {%1, %2}" \ - : "=r" (src), "=r" (b1), "=r" (b2) \ - : "0" (src)); \ - __XOR(a1, b1); __XOR(a2, b2); - -#define XOR_BLOCK_4(src) \ - __asm__("ldmia %0!, {%1, %2, %3, %4}" \ - : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \ - : "0" (src)); \ - __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4) - -#define PUT_BLOCK_2(dst) \ - __asm__ __volatile__("stmia %0!, {%2, %3}" \ - : "=r" (dst) \ - : "0" (dst), "r" (a1), "r" (a2)) - -#define PUT_BLOCK_4(dst) \ - __asm__ __volatile__("stmia %0!, {%2, %3, %4, %5}" \ - : "=r" (dst) \ - : "0" (dst), "r" (a1), "r" (a2), "r" (a3), "r" (a4)) - -static void -xor_arm4regs_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) -{ - unsigned int lines = bytes / sizeof(unsigned long) / 4; - register unsigned int a1 __asm__("r4"); - register unsigned int a2 __asm__("r5"); - register unsigned int a3 __asm__("r6"); - register unsigned int a4 __asm__("r7"); - register unsigned int b1 __asm__("r8"); - register unsigned int b2 __asm__("r9"); - register unsigned int b3 __asm__("ip"); - register unsigned int b4 __asm__("lr"); - - do { - GET_BLOCK_4(p1); - XOR_BLOCK_4(p2); - PUT_BLOCK_4(p1); - } while (--lines); -} - -static void -xor_arm4regs_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3) -{ - unsigned int lines = bytes / sizeof(unsigned long) / 4; - register unsigned int a1 __asm__("r4"); - register unsigned int a2 __asm__("r5"); - register unsigned int a3 __asm__("r6"); - register unsigned int a4 __asm__("r7"); - register unsigned int b1 __asm__("r8"); - register unsigned int b2 __asm__("r9"); - register unsigned int b3 __asm__("ip"); - register unsigned int b4 __asm__("lr"); - - do { - GET_BLOCK_4(p1); - XOR_BLOCK_4(p2); - XOR_BLOCK_4(p3); - PUT_BLOCK_4(p1); - } while (--lines); -} - -static void -xor_arm4regs_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4) -{ - unsigned int lines = bytes / sizeof(unsigned long) / 2; - register unsigned int a1 __asm__("r8"); - register unsigned int a2 __asm__("r9"); - register unsigned int b1 __asm__("ip"); - register unsigned int b2 __asm__("lr"); - - do { - GET_BLOCK_2(p1); - XOR_BLOCK_2(p2); - XOR_BLOCK_2(p3); - XOR_BLOCK_2(p4); - PUT_BLOCK_2(p1); - } while (--lines); -} - -static void -xor_arm4regs_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4, unsigned long *p5) -{ - unsigned int lines = bytes / sizeof(unsigned long) / 2; - register unsigned int a1 __asm__("r8"); - register unsigned int a2 __asm__("r9"); - register unsigned int b1 __asm__("ip"); - register unsigned int b2 __asm__("lr"); - - do { - GET_BLOCK_2(p1); - XOR_BLOCK_2(p2); - XOR_BLOCK_2(p3); - XOR_BLOCK_2(p4); - XOR_BLOCK_2(p5); - PUT_BLOCK_2(p1); - } while (--lines); -} - -static struct xor_block_template xor_block_arm4regs = { - .name = "arm4regs", - .do_2 = xor_arm4regs_2, - .do_3 = xor_arm4regs_3, - .do_4 = xor_arm4regs_4, - .do_5 = xor_arm4regs_5, -}; - -#undef XOR_TRY_TEMPLATES -#define XOR_TRY_TEMPLATES \ - do { \ - xor_speed(&xor_block_arm4regs); \ - xor_speed(&xor_block_8regs); \ - xor_speed(&xor_block_32regs); \ - } while (0) -- cgit v1.1 From bccf650270a94cec6e9238743e84c6e01de30c70 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 2 Aug 2008 22:33:18 +0100 Subject: [ARM] Fix explicit asm(-arm)?/arch-foo references No file should be explicitly referencing its own platform headers by specifying an absolute include path. Fix these paths to use standard includes. Signed-off-by: Russell King --- include/asm-arm/arch-ns9xxx/debug-macro.S | 2 +- include/asm-arm/arch-ns9xxx/entry-macro.S | 2 +- include/asm-arm/arch-ns9xxx/processor.h | 2 +- include/asm-arm/arch-ns9xxx/system.h | 4 ++-- include/asm-arm/arch-omap/board.h | 2 +- 5 files changed, 6 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S index b21b93e..9468095 100644 --- a/include/asm-arm/arch-ns9xxx/debug-macro.S +++ b/include/asm-arm/arch-ns9xxx/debug-macro.S @@ -9,7 +9,7 @@ */ #include -#include +#include .macro addruart,rx mrc p15, 0, \rx, c1, c0 diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S index 89a21c5..2f6c89d 100644 --- a/include/asm-arm/arch-ns9xxx/entry-macro.S +++ b/include/asm-arm/arch-ns9xxx/entry-macro.S @@ -9,7 +9,7 @@ * the Free Software Foundation. */ #include -#include +#include .macro get_irqnr_preamble, base, tmp ldr \base, =SYS_ISRADDR diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h index f7b53b6..3137e5b 100644 --- a/include/asm-arm/arch-ns9xxx/processor.h +++ b/include/asm-arm/arch-ns9xxx/processor.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_PROCESSOR_H #define __ASM_ARCH_PROCESSOR_H -#include +#include #define processor_is_ns9210() (0 \ || module_is_cc7ucamry() \ diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h index 1348073..c294168 100644 --- a/include/asm-arm/arch-ns9xxx/system.h +++ b/include/asm-arm/arch-ns9xxx/system.h @@ -12,8 +12,8 @@ #define __ASM_ARCH_SYSTEM_H #include -#include -#include +#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index db44c5d1..99564c7 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -154,7 +154,7 @@ struct omap_version_config { }; -#include +#include struct omap_board_config_entry { u16 tag; -- cgit v1.1 From 7e43f1128d4c4bd91786ca6abff45a91e88f9776 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 2 Aug 2008 23:27:37 -0700 Subject: pkt_sched: Make sure RTNL is held in qdisc_root_lock(). It is the only legal environment in which this can be used. Add some commentary explaining the situation. Signed-off-by: David S. Miller --- include/net/sch_generic.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'include') diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h index b5f40d7..c5bb130 100644 --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h @@ -193,10 +193,22 @@ static inline struct Qdisc *qdisc_root(struct Qdisc *qdisc) return qdisc->dev_queue->qdisc; } +/* The qdisc root lock is a mechanism by which to top level + * of a qdisc tree can be locked from any qdisc node in the + * forest. This allows changing the configuration of some + * aspect of the qdisc tree while blocking out asynchronous + * qdisc access in the packet processing paths. + * + * It is only legal to do this when the root will not change + * on us. Otherwise we'll potentially lock the wrong qdisc + * root. This is enforced by holding the RTNL semaphore, which + * all users of this lock accessor must do. + */ static inline spinlock_t *qdisc_root_lock(struct Qdisc *qdisc) { struct Qdisc *root = qdisc_root(qdisc); + ASSERT_RTNL(); return qdisc_lock(root); } -- cgit v1.1 From cf368d2f9aced8adc8bd6b1f04294a71551d5fce Mon Sep 17 00:00:00 2001 From: Alexander Beregalov Date: Sun, 3 Aug 2008 03:03:57 +0400 Subject: drivers/video/console/promcon.c: fix build error drivers/video/console/promcon.c:158: error: implicit declaration of function 'con_protect_unimap' Introduced by commit a29ccf6f823a84d89e1c7aaaf221cf7282022024 ("embedded: fix vc_translate operator precedence"). Signed-off-by: Alexander Beregalov Cc: Tim Bird Signed-off-by: David Woodhouse --- include/linux/vt_kern.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/vt_kern.h b/include/linux/vt_kern.h index 8c8119f..1c78d56 100644 --- a/include/linux/vt_kern.h +++ b/include/linux/vt_kern.h @@ -86,6 +86,7 @@ int con_copy_unimap(struct vc_data *dst_vc, struct vc_data *src_vc); #define con_copy_unimap(d, s) (0) #define con_get_unimap(vc, ct, uct, list) (-EINVAL) #define con_free_unimap(vc) do { ; } while (0) +#define con_protect_unimap(vc, rdonly) do { ; } while (0) #define vc_translate(vc, c) (c) #endif -- cgit v1.1 From 63870295de9adb365cd121dab94379b8cfdf986a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 4 Aug 2008 10:39:46 +0900 Subject: maple: Clean up maple_driver_register/unregister routines. These were completely inconsistent. Clean these up to take a maple_driver pointer directly for consistency. Signed-off-by: Paul Mundt --- include/linux/maple.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/maple.h b/include/linux/maple.h index c853b10..b2b7ce0 100644 --- a/include/linux/maple.h +++ b/include/linux/maple.h @@ -70,7 +70,9 @@ void maple_getcond_callback(struct maple_device *dev, void (*callback) (struct mapleq * mq), unsigned long interval, unsigned long function); -int maple_driver_register(struct device_driver *drv); +int maple_driver_register(struct maple_driver *); +void maple_driver_unregister(struct maple_driver *); + int maple_add_packet_sleeps(struct maple_device *mdev, u32 function, u32 command, u32 length, void *data); void maple_clear_dev(struct maple_device *mdev); -- cgit v1.1 From 617870632de6739fca0893f3e6648e9ae1bd0ddb Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 4 Aug 2008 10:58:24 +0900 Subject: maple: Kill useless private_data pointer. We can simply wrap in to the dev_set/get_drvdata(), there's no reason to track an extra level of private data on top of the struct device. Signed-off-by: Paul Mundt --- include/linux/maple.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/maple.h b/include/linux/maple.h index b2b7ce0..c23d3f5 100644 --- a/include/linux/maple.h +++ b/include/linux/maple.h @@ -51,7 +51,6 @@ struct maple_devinfo { struct maple_device { struct maple_driver *driver; struct mapleq *mq; - void *private_data; void (*callback) (struct mapleq * mq); unsigned long when, interval, function; struct maple_devinfo devinfo; @@ -80,4 +79,7 @@ void maple_clear_dev(struct maple_device *mdev); #define to_maple_dev(n) container_of(n, struct maple_device, dev) #define to_maple_driver(n) container_of(n, struct maple_driver, drv) +#define maple_get_drvdata(d) dev_get_drvdata(&(d)->dev) +#define maple_set_drvdata(d,p) dev_set_drvdata(&(d)->dev, (p)) + #endif /* __LINUX_MAPLE_H */ -- cgit v1.1 From b8b572e1015f81b4e748417be2629dfe51ab99f9 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Fri, 1 Aug 2008 15:20:30 +1000 Subject: powerpc: Move include files to arch/powerpc/include/asm from include/asm-powerpc. This is the result of a mkdir arch/powerpc/include/asm git mv include/asm-powerpc/* arch/powerpc/include/asm Followed by a few documentation/comment fixups and a couple of places where was being used explicitly. Of the latter only one was outside the arch code and it is a driver only built for powerpc. Signed-off-by: Stephen Rothwell Signed-off-by: Paul Mackerras --- include/asm-powerpc/8253pit.h | 10 - include/asm-powerpc/8xx_immap.h | 564 ------------- include/asm-powerpc/Kbuild | 37 - include/asm-powerpc/a.out.h | 20 - include/asm-powerpc/abs_addr.h | 75 -- include/asm-powerpc/agp.h | 22 - include/asm-powerpc/asm-compat.h | 69 -- include/asm-powerpc/atomic.h | 479 ----------- include/asm-powerpc/auxvec.h | 19 - include/asm-powerpc/backlight.h | 41 - include/asm-powerpc/bitops.h | 410 --------- include/asm-powerpc/bootx.h | 171 ---- include/asm-powerpc/btext.h | 28 - include/asm-powerpc/bug.h | 121 --- include/asm-powerpc/bugs.h | 18 - include/asm-powerpc/byteorder.h | 89 -- include/asm-powerpc/cache.h | 45 - include/asm-powerpc/cacheflush.h | 75 -- include/asm-powerpc/cell-pmu.h | 105 --- include/asm-powerpc/cell-regs.h | 315 ------- include/asm-powerpc/checksum.h | 117 --- include/asm-powerpc/clk_interface.h | 20 - include/asm-powerpc/code-patching.h | 54 -- include/asm-powerpc/compat.h | 214 ----- include/asm-powerpc/cpm.h | 106 --- include/asm-powerpc/cpm1.h | 652 --------------- include/asm-powerpc/cpm2.h | 1195 --------------------------- include/asm-powerpc/cputable.h | 514 ------------ include/asm-powerpc/cputhreads.h | 71 -- include/asm-powerpc/cputime.h | 235 ------ include/asm-powerpc/current.h | 40 - include/asm-powerpc/dbdma.h | 108 --- include/asm-powerpc/dcr-generic.h | 49 -- include/asm-powerpc/dcr-mmio.h | 61 -- include/asm-powerpc/dcr-native.h | 116 --- include/asm-powerpc/dcr-regs.h | 149 ---- include/asm-powerpc/dcr.h | 82 -- include/asm-powerpc/delay.h | 34 - include/asm-powerpc/device.h | 24 - include/asm-powerpc/div64.h | 1 - include/asm-powerpc/dma-mapping.h | 474 ----------- include/asm-powerpc/dma.h | 360 -------- include/asm-powerpc/edac.h | 40 - include/asm-powerpc/eeh.h | 211 ----- include/asm-powerpc/eeh_event.h | 53 -- include/asm-powerpc/elf.h | 424 ---------- include/asm-powerpc/emergency-restart.h | 1 - include/asm-powerpc/errno.h | 11 - include/asm-powerpc/exception.h | 311 ------- include/asm-powerpc/fb.h | 21 - include/asm-powerpc/fcntl.h | 11 - include/asm-powerpc/feature-fixups.h | 126 --- include/asm-powerpc/firmware.h | 132 --- include/asm-powerpc/fixmap.h | 106 --- include/asm-powerpc/floppy.h | 213 ----- include/asm-powerpc/fs_pd.h | 50 -- include/asm-powerpc/fsl_gtm.h | 47 -- include/asm-powerpc/fsl_lbc.h | 311 ------- include/asm-powerpc/ftrace.h | 14 - include/asm-powerpc/futex.h | 117 --- include/asm-powerpc/gpio.h | 56 -- include/asm-powerpc/grackle.h | 12 - include/asm-powerpc/hardirq.h | 29 - include/asm-powerpc/heathrow.h | 67 -- include/asm-powerpc/highmem.h | 138 ---- include/asm-powerpc/hugetlb.h | 75 -- include/asm-powerpc/hvcall.h | 296 ------- include/asm-powerpc/hvconsole.h | 41 - include/asm-powerpc/hvcserver.h | 59 -- include/asm-powerpc/hw_irq.h | 135 --- include/asm-powerpc/hydra.h | 102 --- include/asm-powerpc/i8259.h | 17 - include/asm-powerpc/ibmebus.h | 60 -- include/asm-powerpc/ide.h | 59 -- include/asm-powerpc/immap_86xx.h | 156 ---- include/asm-powerpc/immap_cpm2.h | 650 --------------- include/asm-powerpc/immap_qe.h | 485 ----------- include/asm-powerpc/io-defs.h | 60 -- include/asm-powerpc/io.h | 787 ------------------ include/asm-powerpc/ioctl.h | 13 - include/asm-powerpc/ioctls.h | 110 --- include/asm-powerpc/iommu.h | 131 --- include/asm-powerpc/ipcbuf.h | 34 - include/asm-powerpc/ipic.h | 93 --- include/asm-powerpc/irq.h | 654 --------------- include/asm-powerpc/irq_regs.h | 2 - include/asm-powerpc/irqflags.h | 44 - include/asm-powerpc/iseries/alpaca.h | 31 - include/asm-powerpc/iseries/hv_call.h | 111 --- include/asm-powerpc/iseries/hv_call_event.h | 201 ----- include/asm-powerpc/iseries/hv_call_sc.h | 50 -- include/asm-powerpc/iseries/hv_call_xm.h | 61 -- include/asm-powerpc/iseries/hv_lp_config.h | 128 --- include/asm-powerpc/iseries/hv_lp_event.h | 162 ---- include/asm-powerpc/iseries/hv_types.h | 112 --- include/asm-powerpc/iseries/iommu.h | 41 - include/asm-powerpc/iseries/it_lp_queue.h | 78 -- include/asm-powerpc/iseries/lpar_map.h | 85 -- include/asm-powerpc/iseries/mf.h | 51 -- include/asm-powerpc/iseries/vio.h | 265 ------ include/asm-powerpc/kdebug.h | 15 - include/asm-powerpc/kdump.h | 35 - include/asm-powerpc/kexec.h | 160 ---- include/asm-powerpc/keylargo.h | 261 ------ include/asm-powerpc/kgdb.h | 65 -- include/asm-powerpc/kmap_types.h | 33 - include/asm-powerpc/kprobes.h | 118 --- include/asm-powerpc/kvm.h | 55 -- include/asm-powerpc/kvm_asm.h | 55 -- include/asm-powerpc/kvm_host.h | 155 ---- include/asm-powerpc/kvm_para.h | 37 - include/asm-powerpc/kvm_ppc.h | 95 --- include/asm-powerpc/libata-portmap.h | 12 - include/asm-powerpc/linkage.h | 6 - include/asm-powerpc/lmb.h | 15 - include/asm-powerpc/local.h | 200 ----- include/asm-powerpc/lppaca.h | 159 ---- include/asm-powerpc/lv1call.h | 348 -------- include/asm-powerpc/machdep.h | 365 -------- include/asm-powerpc/macio.h | 142 ---- include/asm-powerpc/mc146818rtc.h | 36 - include/asm-powerpc/mediabay.h | 43 - include/asm-powerpc/mman.h | 63 -- include/asm-powerpc/mmu-40x.h | 63 -- include/asm-powerpc/mmu-44x.h | 76 -- include/asm-powerpc/mmu-8xx.h | 145 ---- include/asm-powerpc/mmu-fsl-booke.h | 82 -- include/asm-powerpc/mmu-hash32.h | 83 -- include/asm-powerpc/mmu-hash64.h | 478 ----------- include/asm-powerpc/mmu.h | 26 - include/asm-powerpc/mmu_context.h | 280 ------- include/asm-powerpc/mmzone.h | 47 -- include/asm-powerpc/module.h | 77 -- include/asm-powerpc/mpc512x.h | 22 - include/asm-powerpc/mpc52xx.h | 295 ------- include/asm-powerpc/mpc52xx_psc.h | 276 ------- include/asm-powerpc/mpc6xx.h | 6 - include/asm-powerpc/mpc8260.h | 25 - include/asm-powerpc/mpc86xx.h | 33 - include/asm-powerpc/mpc8xx.h | 12 - include/asm-powerpc/mpic.h | 481 ----------- include/asm-powerpc/msgbuf.h | 33 - include/asm-powerpc/mutex.h | 9 - include/asm-powerpc/nvram.h | 139 ---- include/asm-powerpc/of_device.h | 31 - include/asm-powerpc/of_platform.h | 42 - include/asm-powerpc/ohare.h | 54 -- include/asm-powerpc/oprofile_impl.h | 134 --- include/asm-powerpc/pSeries_reconfig.h | 29 - include/asm-powerpc/paca.h | 114 --- include/asm-powerpc/page.h | 225 ----- include/asm-powerpc/page_32.h | 38 - include/asm-powerpc/page_64.h | 185 ----- include/asm-powerpc/param.h | 22 - include/asm-powerpc/parport.h | 39 - include/asm-powerpc/pasemi_dma.h | 538 ------------ include/asm-powerpc/pci-bridge.h | 302 ------- include/asm-powerpc/pci.h | 228 ----- include/asm-powerpc/percpu.h | 24 - include/asm-powerpc/pgalloc-32.h | 43 - include/asm-powerpc/pgalloc-64.h | 166 ---- include/asm-powerpc/pgalloc.h | 12 - include/asm-powerpc/pgtable-4k.h | 117 --- include/asm-powerpc/pgtable-64k.h | 155 ---- include/asm-powerpc/pgtable-ppc32.h | 802 ------------------ include/asm-powerpc/pgtable-ppc64.h | 468 ----------- include/asm-powerpc/pgtable.h | 57 -- include/asm-powerpc/phyp_dump.h | 47 -- include/asm-powerpc/pmac_feature.h | 405 --------- include/asm-powerpc/pmac_low_i2c.h | 107 --- include/asm-powerpc/pmac_pfunc.h | 252 ------ include/asm-powerpc/pmc.h | 37 - include/asm-powerpc/pmi.h | 66 -- include/asm-powerpc/poll.h | 1 - include/asm-powerpc/posix_types.h | 128 --- include/asm-powerpc/ppc-pci.h | 149 ---- include/asm-powerpc/ppc4xx.h | 18 - include/asm-powerpc/ppc_asm.h | 689 --------------- include/asm-powerpc/processor.h | 314 ------- include/asm-powerpc/prom.h | 356 -------- include/asm-powerpc/ps3.h | 519 ------------ include/asm-powerpc/ps3av.h | 744 ----------------- include/asm-powerpc/ps3fb.h | 44 - include/asm-powerpc/ps3stor.h | 71 -- include/asm-powerpc/ptrace.h | 293 ------- include/asm-powerpc/qe.h | 642 -------------- include/asm-powerpc/qe_ic.h | 130 --- include/asm-powerpc/reg.h | 788 ------------------ include/asm-powerpc/reg_8xx.h | 42 - include/asm-powerpc/reg_booke.h | 501 ----------- include/asm-powerpc/reg_fsl_emb.h | 72 -- include/asm-powerpc/resource.h | 1 - include/asm-powerpc/rheap.h | 89 -- include/asm-powerpc/rio.h | 18 - include/asm-powerpc/rtas.h | 247 ------ include/asm-powerpc/rtc.h | 78 -- include/asm-powerpc/rwsem.h | 173 ---- include/asm-powerpc/scatterlist.h | 50 -- include/asm-powerpc/seccomp.h | 20 - include/asm-powerpc/sections.h | 22 - include/asm-powerpc/sembuf.h | 36 - include/asm-powerpc/serial.h | 24 - include/asm-powerpc/setjmp.h | 18 - include/asm-powerpc/setup.h | 6 - include/asm-powerpc/shmbuf.h | 59 -- include/asm-powerpc/shmparam.h | 6 - include/asm-powerpc/sigcontext.h | 87 -- include/asm-powerpc/siginfo.h | 26 - include/asm-powerpc/signal.h | 150 ---- include/asm-powerpc/smp.h | 127 --- include/asm-powerpc/smu.h | 700 ---------------- include/asm-powerpc/socket.h | 64 -- include/asm-powerpc/sockios.h | 20 - include/asm-powerpc/sparsemem.h | 32 - include/asm-powerpc/spinlock.h | 295 ------- include/asm-powerpc/spinlock_types.h | 20 - include/asm-powerpc/spu.h | 732 ---------------- include/asm-powerpc/spu_csa.h | 266 ------ include/asm-powerpc/spu_info.h | 54 -- include/asm-powerpc/spu_priv1.h | 236 ------ include/asm-powerpc/sstep.h | 27 - include/asm-powerpc/stat.h | 81 -- include/asm-powerpc/statfs.h | 60 -- include/asm-powerpc/string.h | 32 - include/asm-powerpc/suspend.h | 9 - include/asm-powerpc/synch.h | 44 - include/asm-powerpc/syscall.h | 84 -- include/asm-powerpc/syscalls.h | 52 -- include/asm-powerpc/systbl.h | 324 -------- include/asm-powerpc/system.h | 548 ------------ include/asm-powerpc/tce.h | 50 -- include/asm-powerpc/termbits.h | 209 ----- include/asm-powerpc/termios.h | 85 -- include/asm-powerpc/thread_info.h | 161 ---- include/asm-powerpc/time.h | 255 ------ include/asm-powerpc/timex.h | 50 -- include/asm-powerpc/tlb.h | 81 -- include/asm-powerpc/tlbflush.h | 166 ---- include/asm-powerpc/topology.h | 117 --- include/asm-powerpc/tsi108.h | 121 --- include/asm-powerpc/tsi108_irq.h | 124 --- include/asm-powerpc/tsi108_pci.h | 45 - include/asm-powerpc/types.h | 75 -- include/asm-powerpc/uaccess.h | 496 ----------- include/asm-powerpc/ucc.h | 64 -- include/asm-powerpc/ucc_fast.h | 246 ------ include/asm-powerpc/ucc_slow.h | 290 ------- include/asm-powerpc/ucontext.h | 40 - include/asm-powerpc/udbg.h | 55 -- include/asm-powerpc/uic.h | 23 - include/asm-powerpc/unaligned.h | 16 - include/asm-powerpc/uninorth.h | 229 ----- include/asm-powerpc/unistd.h | 398 --------- include/asm-powerpc/user.h | 51 -- include/asm-powerpc/vdso.h | 78 -- include/asm-powerpc/vdso_datapage.h | 121 --- include/asm-powerpc/vga.h | 53 -- include/asm-powerpc/vio.h | 118 --- include/asm-powerpc/xilinx_intc.h | 20 - include/asm-powerpc/xmon.h | 33 - include/asm-powerpc/xor.h | 1 - 261 files changed, 39518 deletions(-) delete mode 100644 include/asm-powerpc/8253pit.h delete mode 100644 include/asm-powerpc/8xx_immap.h delete mode 100644 include/asm-powerpc/Kbuild delete mode 100644 include/asm-powerpc/a.out.h delete mode 100644 include/asm-powerpc/abs_addr.h delete mode 100644 include/asm-powerpc/agp.h delete mode 100644 include/asm-powerpc/asm-compat.h delete mode 100644 include/asm-powerpc/atomic.h delete mode 100644 include/asm-powerpc/auxvec.h delete mode 100644 include/asm-powerpc/backlight.h delete mode 100644 include/asm-powerpc/bitops.h delete mode 100644 include/asm-powerpc/bootx.h delete mode 100644 include/asm-powerpc/btext.h delete mode 100644 include/asm-powerpc/bug.h delete mode 100644 include/asm-powerpc/bugs.h delete mode 100644 include/asm-powerpc/byteorder.h delete mode 100644 include/asm-powerpc/cache.h delete mode 100644 include/asm-powerpc/cacheflush.h delete mode 100644 include/asm-powerpc/cell-pmu.h delete mode 100644 include/asm-powerpc/cell-regs.h delete mode 100644 include/asm-powerpc/checksum.h delete mode 100644 include/asm-powerpc/clk_interface.h delete mode 100644 include/asm-powerpc/code-patching.h delete mode 100644 include/asm-powerpc/compat.h delete mode 100644 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-/* - * 8253/8254 Programmable Interval Timer - */ - -#define PIT_TICK_RATE 1193182UL - -#endif /* _ASM_POWERPC_8253PIT_H */ diff --git a/include/asm-powerpc/8xx_immap.h b/include/asm-powerpc/8xx_immap.h deleted file mode 100644 index 4b0e152..0000000 --- a/include/asm-powerpc/8xx_immap.h +++ /dev/null @@ -1,564 +0,0 @@ -/* - * MPC8xx Internal Memory Map - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * The I/O on the MPC860 is comprised of blocks of special registers - * and the dual port ram for the Communication Processor Module. - * Within this space are functional units such as the SIU, memory - * controller, system timers, and other control functions. It is - * a combination that I found difficult to separate into logical - * functional files.....but anyone else is welcome to try. -- Dan - */ -#ifdef __KERNEL__ -#ifndef __IMMAP_8XX__ -#define __IMMAP_8XX__ - -/* System configuration registers. -*/ -typedef struct sys_conf { - uint sc_siumcr; - uint sc_sypcr; - uint sc_swt; - char res1[2]; - ushort sc_swsr; - uint sc_sipend; - uint sc_simask; - uint sc_siel; - uint sc_sivec; - uint sc_tesr; - char res2[0xc]; - uint sc_sdcr; - char res3[0x4c]; -} sysconf8xx_t; - -/* PCMCIA configuration registers. -*/ -typedef struct pcmcia_conf { - uint pcmc_pbr0; - uint pcmc_por0; - uint pcmc_pbr1; - uint pcmc_por1; - uint pcmc_pbr2; - uint pcmc_por2; - uint pcmc_pbr3; - uint pcmc_por3; - uint pcmc_pbr4; - uint pcmc_por4; - uint pcmc_pbr5; - uint pcmc_por5; - uint pcmc_pbr6; - uint pcmc_por6; - uint pcmc_pbr7; - uint pcmc_por7; - char res1[0x20]; - uint pcmc_pgcra; - uint pcmc_pgcrb; - uint pcmc_pscr; - char res2[4]; - uint pcmc_pipr; - char res3[4]; - uint pcmc_per; - char res4[4]; -} pcmconf8xx_t; - -/* Memory controller registers. -*/ -typedef struct mem_ctlr { - uint memc_br0; - uint memc_or0; - uint memc_br1; - uint memc_or1; - uint memc_br2; - uint memc_or2; - uint memc_br3; - uint memc_or3; - uint memc_br4; - uint memc_or4; - uint memc_br5; - uint memc_or5; - uint memc_br6; - uint memc_or6; - uint memc_br7; - uint memc_or7; - char res1[0x24]; - uint memc_mar; - uint memc_mcr; - char res2[4]; - uint memc_mamr; - uint memc_mbmr; - ushort memc_mstat; - ushort memc_mptpr; - uint memc_mdr; - char res3[0x80]; -} memctl8xx_t; - -/*----------------------------------------------------------------------- - * BR - Memory Controler: Base Register 16-9 - */ -#define BR_BA_MSK 0xffff8000 /* Base Address Mask */ -#define BR_AT_MSK 0x00007000 /* Address Type Mask */ -#define BR_PS_MSK 0x00000c00 /* Port Size Mask */ -#define BR_PS_32 0x00000000 /* 32 bit port size */ -#define BR_PS_16 0x00000800 /* 16 bit port size */ -#define BR_PS_8 0x00000400 /* 8 bit port size */ -#define BR_PARE 0x00000200 /* Parity Enable */ -#define BR_WP 0x00000100 /* Write Protect */ -#define BR_MS_MSK 0x000000c0 /* Machine Select Mask */ -#define BR_MS_GPCM 0x00000000 /* G.P.C.M. Machine Select */ -#define BR_MS_UPMA 0x00000080 /* U.P.M.A Machine Select */ -#define BR_MS_UPMB 0x000000c0 /* U.P.M.B Machine Select */ -#define BR_V 0x00000001 /* Bank Valid */ - -/*----------------------------------------------------------------------- - * OR - Memory Controler: Option Register 16-11 - */ -#define OR_AM_MSK 0xffff8000 /* Address Mask Mask */ -#define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */ -#define OR_CSNT_SAM 0x00000800 /* Chip Select Negation Time/ Start */ - /* Address Multiplex */ -#define OR_ACS_MSK 0x00000600 /* Address to Chip Select Setup mask */ -#define OR_ACS_DIV1 0x00000000 /* CS is output at the same time */ -#define OR_ACS_DIV4 0x00000400 /* CS is output 1/4 a clock later */ -#define OR_ACS_DIV2 0x00000600 /* CS is output 1/2 a clock later */ -#define OR_G5LA 0x00000400 /* Output #GPL5 on #GPL_A5 */ -#define OR_G5LS 0x00000200 /* Drive #GPL high on falling edge of...*/ -#define OR_BI 0x00000100 /* Burst inhibit */ -#define OR_SCY_MSK 0x000000f0 /* Cycle Length in Clocks */ -#define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */ -#define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */ -#define OR_SCY_2_CLK 0x00000020 /* 2 clock cycles wait states */ -#define OR_SCY_3_CLK 0x00000030 /* 3 clock cycles wait states */ -#define OR_SCY_4_CLK 0x00000040 /* 4 clock cycles wait states */ -#define OR_SCY_5_CLK 0x00000050 /* 5 clock cycles wait states */ -#define OR_SCY_6_CLK 0x00000060 /* 6 clock cycles wait states */ -#define OR_SCY_7_CLK 0x00000070 /* 7 clock cycles wait states */ -#define OR_SCY_8_CLK 0x00000080 /* 8 clock cycles wait states */ -#define OR_SCY_9_CLK 0x00000090 /* 9 clock cycles wait states */ -#define OR_SCY_10_CLK 0x000000a0 /* 10 clock cycles wait states */ -#define OR_SCY_11_CLK 0x000000b0 /* 11 clock cycles wait states */ -#define OR_SCY_12_CLK 0x000000c0 /* 12 clock cycles wait states */ -#define OR_SCY_13_CLK 0x000000d0 /* 13 clock cycles wait states */ -#define OR_SCY_14_CLK 0x000000e0 /* 14 clock cycles wait states */ -#define OR_SCY_15_CLK 0x000000f0 /* 15 clock cycles wait states */ -#define OR_SETA 0x00000008 /* External Transfer Acknowledge */ -#define OR_TRLX 0x00000004 /* Timing Relaxed */ -#define OR_EHTR 0x00000002 /* Extended Hold Time on Read */ - -/* System Integration Timers. -*/ -typedef struct sys_int_timers { - ushort sit_tbscr; - char res0[0x02]; - uint sit_tbreff0; - uint sit_tbreff1; - char res1[0x14]; - ushort sit_rtcsc; - char res2[0x02]; - uint sit_rtc; - uint sit_rtsec; - uint sit_rtcal; - char res3[0x10]; - ushort sit_piscr; - char res4[2]; - uint sit_pitc; - uint sit_pitr; - char res5[0x34]; -} sit8xx_t; - -#define TBSCR_TBIRQ_MASK ((ushort)0xff00) -#define TBSCR_REFA ((ushort)0x0080) -#define TBSCR_REFB ((ushort)0x0040) -#define TBSCR_REFAE ((ushort)0x0008) -#define TBSCR_REFBE ((ushort)0x0004) -#define TBSCR_TBF ((ushort)0x0002) -#define TBSCR_TBE ((ushort)0x0001) - -#define RTCSC_RTCIRQ_MASK ((ushort)0xff00) -#define RTCSC_SEC ((ushort)0x0080) -#define RTCSC_ALR ((ushort)0x0040) -#define RTCSC_38K ((ushort)0x0010) -#define RTCSC_SIE ((ushort)0x0008) -#define RTCSC_ALE ((ushort)0x0004) -#define RTCSC_RTF ((ushort)0x0002) -#define RTCSC_RTE ((ushort)0x0001) - -#define PISCR_PIRQ_MASK ((ushort)0xff00) -#define PISCR_PS ((ushort)0x0080) -#define PISCR_PIE ((ushort)0x0004) -#define PISCR_PTF ((ushort)0x0002) -#define PISCR_PTE ((ushort)0x0001) - -/* Clocks and Reset. -*/ -typedef struct clk_and_reset { - uint car_sccr; - uint car_plprcr; - uint car_rsr; - char res[0x74]; /* Reserved area */ -} car8xx_t; - -/* System Integration Timers keys. -*/ -typedef struct sitk { - uint sitk_tbscrk; - uint sitk_tbreff0k; - uint sitk_tbreff1k; - uint sitk_tbk; - char res1[0x10]; - uint sitk_rtcsck; - uint sitk_rtck; - uint sitk_rtseck; - uint sitk_rtcalk; - char res2[0x10]; - uint sitk_piscrk; - uint sitk_pitck; - char res3[0x38]; -} sitk8xx_t; - -/* Clocks and reset keys. -*/ -typedef struct cark { - uint cark_sccrk; - uint cark_plprcrk; - uint cark_rsrk; - char res[0x474]; -} cark8xx_t; - -/* The key to unlock registers maintained by keep-alive power. -*/ -#define KAPWR_KEY ((unsigned int)0x55ccaa33) - -/* Video interface. MPC823 Only. -*/ -typedef struct vid823 { - ushort vid_vccr; - ushort res1; - u_char vid_vsr; - u_char res2; - u_char vid_vcmr; - u_char res3; - uint vid_vbcb; - uint res4; - uint vid_vfcr0; - uint vid_vfaa0; - uint vid_vfba0; - uint vid_vfcr1; - uint vid_vfaa1; - uint vid_vfba1; - u_char res5[0x18]; -} vid823_t; - -/* LCD interface. 823 Only. -*/ -typedef struct lcd { - uint lcd_lccr; - uint lcd_lchcr; - uint lcd_lcvcr; - char res1[4]; - uint lcd_lcfaa; - uint lcd_lcfba; - char lcd_lcsr; - char res2[0x7]; -} lcd823_t; - -/* I2C -*/ -typedef struct i2c { - u_char i2c_i2mod; - char res1[3]; - u_char i2c_i2add; - char res2[3]; - u_char i2c_i2brg; - char res3[3]; - u_char i2c_i2com; - char res4[3]; - u_char i2c_i2cer; - char res5[3]; - u_char i2c_i2cmr; - char res6[0x8b]; -} i2c8xx_t; - -/* DMA control/status registers. -*/ -typedef struct sdma_csr { - char res1[4]; - uint sdma_sdar; - u_char sdma_sdsr; - char res3[3]; - u_char sdma_sdmr; - char res4[3]; - u_char sdma_idsr1; - char res5[3]; - u_char sdma_idmr1; - char res6[3]; - u_char sdma_idsr2; - char res7[3]; - u_char sdma_idmr2; - char res8[0x13]; -} sdma8xx_t; - -/* Communication Processor Module Interrupt Controller. -*/ -typedef struct cpm_ic { - ushort cpic_civr; - char res[0xe]; - uint cpic_cicr; - uint cpic_cipr; - uint cpic_cimr; - uint cpic_cisr; -} cpic8xx_t; - -/* Input/Output Port control/status registers. -*/ -typedef struct io_port { - ushort iop_padir; - ushort iop_papar; - ushort iop_paodr; - ushort iop_padat; - char res1[8]; - ushort iop_pcdir; - ushort iop_pcpar; - ushort iop_pcso; - ushort iop_pcdat; - ushort iop_pcint; - char res2[6]; - ushort iop_pddir; - ushort iop_pdpar; - char res3[2]; - ushort iop_pddat; - uint utmode; - char res4[4]; -} iop8xx_t; - -/* Communication Processor Module Timers -*/ -typedef struct cpm_timers { - ushort cpmt_tgcr; - char res1[0xe]; - ushort cpmt_tmr1; - ushort cpmt_tmr2; - ushort cpmt_trr1; - ushort cpmt_trr2; - ushort cpmt_tcr1; - ushort cpmt_tcr2; - ushort cpmt_tcn1; - ushort cpmt_tcn2; - ushort cpmt_tmr3; - ushort cpmt_tmr4; - ushort cpmt_trr3; - ushort cpmt_trr4; - ushort cpmt_tcr3; - ushort cpmt_tcr4; - ushort cpmt_tcn3; - ushort cpmt_tcn4; - ushort cpmt_ter1; - ushort cpmt_ter2; - ushort cpmt_ter3; - ushort cpmt_ter4; - char res2[8]; -} cpmtimer8xx_t; - -/* Finally, the Communication Processor stuff..... -*/ -typedef struct scc { /* Serial communication channels */ - uint scc_gsmrl; - uint scc_gsmrh; - ushort scc_psmr; - char res1[2]; - ushort scc_todr; - ushort scc_dsr; - ushort scc_scce; - char res2[2]; - ushort scc_sccm; - char res3; - u_char scc_sccs; - char res4[8]; -} scc_t; - -typedef struct smc { /* Serial management channels */ - char res1[2]; - ushort smc_smcmr; - char res2[2]; - u_char smc_smce; - char res3[3]; - u_char smc_smcm; - char res4[5]; -} smc_t; - -/* MPC860T Fast Ethernet Controller. It isn't part of the CPM, but - * it fits within the address space. - */ - -typedef struct fec { - uint fec_addr_low; /* lower 32 bits of station address */ - ushort fec_addr_high; /* upper 16 bits of station address */ - ushort res1; /* reserved */ - uint fec_hash_table_high; /* upper 32-bits of hash table */ - uint fec_hash_table_low; /* lower 32-bits of hash table */ - uint fec_r_des_start; /* beginning of Rx descriptor ring */ - uint fec_x_des_start; /* beginning of Tx descriptor ring */ - uint fec_r_buff_size; /* Rx buffer size */ - uint res2[9]; /* reserved */ - uint fec_ecntrl; /* ethernet control register */ - uint fec_ievent; /* interrupt event register */ - uint fec_imask; /* interrupt mask register */ - uint fec_ivec; /* interrupt level and vector status */ - uint fec_r_des_active; /* Rx ring updated flag */ - uint fec_x_des_active; /* Tx ring updated flag */ - uint res3[10]; /* reserved */ - uint fec_mii_data; /* MII data register */ - uint fec_mii_speed; /* MII speed control register */ - uint res4[17]; /* reserved */ - uint fec_r_bound; /* end of RAM (read-only) */ - uint fec_r_fstart; /* Rx FIFO start address */ - uint res5[6]; /* reserved */ - uint fec_x_fstart; /* Tx FIFO start address */ - uint res6[17]; /* reserved */ - uint fec_fun_code; /* fec SDMA function code */ - uint res7[3]; /* reserved */ - uint fec_r_cntrl; /* Rx control register */ - uint fec_r_hash; /* Rx hash register */ - uint res8[14]; /* reserved */ - uint fec_x_cntrl; /* Tx control register */ - uint res9[0x1e]; /* reserved */ -} fec_t; - -/* The FEC and LCD color map share the same address space.... - * I guess we will never see an 823T :-). - */ -union fec_lcd { - fec_t fl_un_fec; - u_char fl_un_cmap[0x200]; -}; - -typedef struct comm_proc { - /* General control and status registers. - */ - ushort cp_cpcr; - u_char res1[2]; - ushort cp_rccr; - u_char res2; - u_char cp_rmds; - u_char res3[4]; - ushort cp_cpmcr1; - ushort cp_cpmcr2; - ushort cp_cpmcr3; - ushort cp_cpmcr4; - u_char res4[2]; - ushort cp_rter; - u_char res5[2]; - ushort cp_rtmr; - u_char res6[0x14]; - - /* Baud rate generators. - */ - uint cp_brgc1; - uint cp_brgc2; - uint cp_brgc3; - uint cp_brgc4; - - /* Serial Communication Channels. - */ - scc_t cp_scc[4]; - - /* Serial Management Channels. - */ - smc_t cp_smc[2]; - - /* Serial Peripheral Interface. - */ - ushort cp_spmode; - u_char res7[4]; - u_char cp_spie; - u_char res8[3]; - u_char cp_spim; - u_char res9[2]; - u_char cp_spcom; - u_char res10[2]; - - /* Parallel Interface Port. - */ - u_char res11[2]; - ushort cp_pipc; - u_char res12[2]; - ushort cp_ptpr; - uint cp_pbdir; - uint cp_pbpar; - u_char res13[2]; - ushort cp_pbodr; - uint cp_pbdat; - - /* Port E - MPC87x/88x only. - */ - uint cp_pedir; - uint cp_pepar; - uint cp_peso; - uint cp_peodr; - uint cp_pedat; - - /* Communications Processor Timing Register - - Contains RMII Timing for the FECs on MPC87x/88x only. - */ - uint cp_cptr; - - /* Serial Interface and Time Slot Assignment. - */ - uint cp_simode; - u_char cp_sigmr; - u_char res15; - u_char cp_sistr; - u_char cp_sicmr; - u_char res16[4]; - uint cp_sicr; - uint cp_sirp; - u_char res17[0xc]; - - /* 256 bytes of MPC823 video controller RAM array. - */ - u_char cp_vcram[0x100]; - u_char cp_siram[0x200]; - - /* The fast ethernet controller is not really part of the CPM, - * but it resides in the address space. - * The LCD color map is also here. - */ - union fec_lcd fl_un; -#define cp_fec fl_un.fl_un_fec -#define lcd_cmap fl_un.fl_un_cmap - char res18[0xE00]; - - /* The DUET family has a second FEC here */ - fec_t cp_fec2; -#define cp_fec1 cp_fec /* consistency macro */ - - /* Dual Ported RAM follows. - * There are many different formats for this memory area - * depending upon the devices used and options chosen. - * Some processors don't have all of it populated. - */ - u_char cp_dpmem[0x1C00]; /* BD / Data / ucode */ - u_char cp_dparam[0x400]; /* Parameter RAM */ -} cpm8xx_t; - -/* Internal memory map. -*/ -typedef struct immap { - sysconf8xx_t im_siu_conf; /* SIU Configuration */ - pcmconf8xx_t im_pcmcia; /* PCMCIA Configuration */ - memctl8xx_t im_memctl; /* Memory Controller */ - sit8xx_t im_sit; /* System integration timers */ - car8xx_t im_clkrst; /* Clocks and reset */ - sitk8xx_t im_sitk; /* Sys int timer keys */ - cark8xx_t im_clkrstk; /* Clocks and reset keys */ - vid823_t im_vid; /* Video (823 only) */ - lcd823_t im_lcd; /* LCD (823 only) */ - i2c8xx_t im_i2c; /* I2C control/status */ - sdma8xx_t im_sdma; /* SDMA control/status */ - cpic8xx_t im_cpic; /* CPM Interrupt Controller */ - iop8xx_t im_ioport; /* IO Port control/status */ - cpmtimer8xx_t im_cpmtimer; /* CPM timers */ - cpm8xx_t im_cpm; /* Communication processor */ -} immap_t; - -#endif /* __IMMAP_8XX__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/Kbuild b/include/asm-powerpc/Kbuild deleted file mode 100644 index 5ab7d7f..0000000 --- a/include/asm-powerpc/Kbuild +++ /dev/null @@ -1,37 +0,0 @@ -include include/asm-generic/Kbuild.asm - -header-y += auxvec.h -header-y += ioctls.h -header-y += sembuf.h -header-y += siginfo.h -header-y += stat.h -header-y += errno.h -header-y += ipcbuf.h -header-y += msgbuf.h -header-y += shmbuf.h -header-y += socket.h -header-y += termbits.h -header-y += fcntl.h -header-y += poll.h -header-y += sockios.h -header-y += ucontext.h -header-y += ioctl.h -header-y += linkage.h -header-y += resource.h -header-y += sigcontext.h -header-y += statfs.h -header-y += ps3fb.h - -unifdef-y += bootx.h -unifdef-y += byteorder.h -unifdef-y += cputable.h -unifdef-y += elf.h -unifdef-y += nvram.h -unifdef-y += param.h -unifdef-y += posix_types.h -unifdef-y += seccomp.h -unifdef-y += signal.h -unifdef-y += spu_info.h -unifdef-y += termios.h -unifdef-y += types.h -unifdef-y += unistd.h diff --git a/include/asm-powerpc/a.out.h b/include/asm-powerpc/a.out.h deleted file mode 100644 index 89cead6..0000000 --- a/include/asm-powerpc/a.out.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_POWERPC_A_OUT_H -#define _ASM_POWERPC_A_OUT_H - -struct exec -{ - unsigned long a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#endif /* _ASM_POWERPC_A_OUT_H */ diff --git a/include/asm-powerpc/abs_addr.h b/include/asm-powerpc/abs_addr.h deleted file mode 100644 index 98324c5..0000000 --- a/include/asm-powerpc/abs_addr.h +++ /dev/null @@ -1,75 +0,0 @@ -#ifndef _ASM_POWERPC_ABS_ADDR_H -#define _ASM_POWERPC_ABS_ADDR_H -#ifdef __KERNEL__ - - -/* - * c 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - -#include -#include -#include -#include - -struct mschunks_map { - unsigned long num_chunks; - unsigned long chunk_size; - unsigned long chunk_shift; - unsigned long chunk_mask; - u32 *mapping; -}; - -extern struct mschunks_map mschunks_map; - -/* Chunks are 256 KB */ -#define MSCHUNKS_CHUNK_SHIFT (18) -#define MSCHUNKS_CHUNK_SIZE (1UL << MSCHUNKS_CHUNK_SHIFT) -#define MSCHUNKS_OFFSET_MASK (MSCHUNKS_CHUNK_SIZE - 1) - -static inline unsigned long chunk_to_addr(unsigned long chunk) -{ - return chunk << MSCHUNKS_CHUNK_SHIFT; -} - -static inline unsigned long addr_to_chunk(unsigned long addr) -{ - return addr >> MSCHUNKS_CHUNK_SHIFT; -} - -static inline unsigned long phys_to_abs(unsigned long pa) -{ - unsigned long chunk; - - /* This is a no-op on non-iSeries */ - if (!firmware_has_feature(FW_FEATURE_ISERIES)) - return pa; - - chunk = addr_to_chunk(pa); - - if (chunk < mschunks_map.num_chunks) - chunk = mschunks_map.mapping[chunk]; - - return chunk_to_addr(chunk) + (pa & MSCHUNKS_OFFSET_MASK); -} - -/* Convenience macros */ -#define virt_to_abs(va) phys_to_abs(__pa(va)) -#define abs_to_virt(aa) __va(aa) - -/* - * Converts Virtual Address to Real Address for - * Legacy iSeries Hypervisor calls - */ -#define iseries_hv_addr(virtaddr) \ - (0x8000000000000000 | virt_to_abs(virtaddr)) - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_ABS_ADDR_H */ diff --git a/include/asm-powerpc/agp.h b/include/asm-powerpc/agp.h deleted file mode 100644 index 86455c4..0000000 --- a/include/asm-powerpc/agp.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASM_POWERPC_AGP_H -#define _ASM_POWERPC_AGP_H -#ifdef __KERNEL__ - -#include - -#define map_page_into_agp(page) -#define unmap_page_from_agp(page) -#define flush_agp_cache() mb() - -/* Convert a physical address to an address suitable for the GART. */ -#define phys_to_gart(x) (x) -#define gart_to_phys(x) (x) - -/* GATT allocation. Returns/accepts GATT kernel virtual address. */ -#define alloc_gatt_pages(order) \ - ((char *)__get_free_pages(GFP_KERNEL, (order))) -#define free_gatt_pages(table, order) \ - free_pages((unsigned long)(table), (order)) - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_AGP_H */ diff --git a/include/asm-powerpc/asm-compat.h b/include/asm-powerpc/asm-compat.h deleted file mode 100644 index 8f0fe79..0000000 --- a/include/asm-powerpc/asm-compat.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef _ASM_POWERPC_ASM_COMPAT_H -#define _ASM_POWERPC_ASM_COMPAT_H - -#include - -#ifdef __ASSEMBLY__ -# define stringify_in_c(...) __VA_ARGS__ -# define ASM_CONST(x) x -#else -/* This version of stringify will deal with commas... */ -# define __stringify_in_c(...) #__VA_ARGS__ -# define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " " -# define __ASM_CONST(x) x##UL -# define ASM_CONST(x) __ASM_CONST(x) -#endif - - -#ifdef __powerpc64__ - -/* operations for longs and pointers */ -#define PPC_LL stringify_in_c(ld) -#define PPC_STL stringify_in_c(std) -#define PPC_LCMPI stringify_in_c(cmpdi) -#define PPC_LONG stringify_in_c(.llong) -#define PPC_LONG_ALIGN stringify_in_c(.balign 8) -#define PPC_TLNEI stringify_in_c(tdnei) -#define PPC_LLARX stringify_in_c(ldarx) -#define PPC_STLCX stringify_in_c(stdcx.) -#define PPC_CNTLZL stringify_in_c(cntlzd) - -/* Move to CR, single-entry optimized version. Only available - * on POWER4 and later. - */ -#ifdef CONFIG_POWER4_ONLY -#define PPC_MTOCRF stringify_in_c(mtocrf) -#else -#define PPC_MTOCRF stringify_in_c(mtcrf) -#endif - -#else /* 32-bit */ - -/* operations for longs and pointers */ -#define PPC_LL stringify_in_c(lwz) -#define PPC_STL stringify_in_c(stw) -#define PPC_LCMPI stringify_in_c(cmpwi) -#define PPC_LONG stringify_in_c(.long) -#define PPC_LONG_ALIGN stringify_in_c(.balign 4) -#define PPC_TLNEI stringify_in_c(twnei) -#define PPC_LLARX stringify_in_c(lwarx) -#define PPC_STLCX stringify_in_c(stwcx.) -#define PPC_CNTLZL stringify_in_c(cntlzw) -#define PPC_MTOCRF stringify_in_c(mtcrf) - -#endif - -#ifdef __KERNEL__ -#ifdef CONFIG_IBM405_ERR77 -/* Erratum #77 on the 405 means we need a sync or dcbt before every - * stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this. - */ -#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;) -#define PPC405_ERR77_SYNC stringify_in_c(sync;) -#else -#define PPC405_ERR77(ra,rb) -#define PPC405_ERR77_SYNC -#endif -#endif - -#endif /* _ASM_POWERPC_ASM_COMPAT_H */ diff --git a/include/asm-powerpc/atomic.h b/include/asm-powerpc/atomic.h deleted file mode 100644 index f3fc733..0000000 --- a/include/asm-powerpc/atomic.h +++ /dev/null @@ -1,479 +0,0 @@ -#ifndef _ASM_POWERPC_ATOMIC_H_ -#define _ASM_POWERPC_ATOMIC_H_ - -/* - * PowerPC atomic operations - */ - -typedef struct { int counter; } atomic_t; - -#ifdef __KERNEL__ -#include -#include -#include -#include - -#define ATOMIC_INIT(i) { (i) } - -static __inline__ int atomic_read(const atomic_t *v) -{ - int t; - - __asm__ __volatile__("lwz%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); - - return t; -} - -static __inline__ void atomic_set(atomic_t *v, int i) -{ - __asm__ __volatile__("stw%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); -} - -static __inline__ void atomic_add(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_add\n\ - add %0,%2,%0\n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (a), "r" (&v->counter) - : "cc"); -} - -static __inline__ int atomic_add_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%2 # atomic_add_return\n\ - add %0,%1,%0\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -static __inline__ void atomic_sub(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%3 # atomic_sub\n\ - subf %0,%2,%0\n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (a), "r" (&v->counter) - : "cc"); -} - -static __inline__ int atomic_sub_return(int a, atomic_t *v) -{ - int t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%2 # atomic_sub_return\n\ - subf %0,%1,%0\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -static __inline__ void atomic_inc(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_inc\n\ - addic %0,%0,1\n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%2 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (&v->counter) - : "cc"); -} - -static __inline__ int atomic_inc_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%1 # atomic_inc_return\n\ - addic %0,%0,1\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -static __inline__ void atomic_dec(atomic_t *v) -{ - int t; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 # atomic_dec\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%2)\ -" stwcx. %0,0,%2\n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (&v->counter) - : "cc"); -} - -static __inline__ int atomic_dec_return(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%1 # atomic_dec_return\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -/** - * atomic_add_unless - add unless the number is a given value - * @v: pointer of type atomic_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @v, so long as it was not @u. - * Returns non-zero if @v was not @u, and zero otherwise. - */ -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) -{ - int t; - - __asm__ __volatile__ ( - LWSYNC_ON_SMP -"1: lwarx %0,0,%1 # atomic_add_unless\n\ - cmpw 0,%0,%3 \n\ - beq- 2f \n\ - add %0,%2,%0 \n" - PPC405_ERR77(0,%2) -" stwcx. %0,0,%1 \n\ - bne- 1b \n" - ISYNC_ON_SMP -" subf %0,%2,%0 \n\ -2:" - : "=&r" (t) - : "r" (&v->counter), "r" (a), "r" (u) - : "cc", "memory"); - - return t != u; -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0) -#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0) - -/* - * Atomically test *v and decrement if it is greater than 0. - * The function returns the old value of *v minus 1, even if - * the atomic variable, v, was not decremented. - */ -static __inline__ int atomic_dec_if_positive(atomic_t *v) -{ - int t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ - cmpwi %0,1\n\ - addi %0,%0,-1\n\ - blt- 2f\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - "\n\ -2:" : "=&b" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define smp_mb__before_atomic_dec() smp_mb() -#define smp_mb__after_atomic_dec() smp_mb() -#define smp_mb__before_atomic_inc() smp_mb() -#define smp_mb__after_atomic_inc() smp_mb() - -#ifdef __powerpc64__ - -typedef struct { long counter; } atomic64_t; - -#define ATOMIC64_INIT(i) { (i) } - -static __inline__ long atomic64_read(const atomic64_t *v) -{ - long t; - - __asm__ __volatile__("ld%U1%X1 %0,%1" : "=r"(t) : "m"(v->counter)); - - return t; -} - -static __inline__ void atomic64_set(atomic64_t *v, long i) -{ - __asm__ __volatile__("std%U0%X0 %1,%0" : "=m"(v->counter) : "r"(i)); -} - -static __inline__ void atomic64_add(long a, atomic64_t *v) -{ - long t; - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # atomic64_add\n\ - add %0,%2,%0\n\ - stdcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (a), "r" (&v->counter) - : "cc"); -} - -static __inline__ long atomic64_add_return(long a, atomic64_t *v) -{ - long t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%2 # atomic64_add_return\n\ - add %0,%1,%0\n\ - stdcx. %0,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) - -static __inline__ void atomic64_sub(long a, atomic64_t *v) -{ - long t; - - __asm__ __volatile__( -"1: ldarx %0,0,%3 # atomic64_sub\n\ - subf %0,%2,%0\n\ - stdcx. %0,0,%3 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (a), "r" (&v->counter) - : "cc"); -} - -static __inline__ long atomic64_sub_return(long a, atomic64_t *v) -{ - long t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%2 # atomic64_sub_return\n\ - subf %0,%1,%0\n\ - stdcx. %0,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (a), "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -static __inline__ void atomic64_inc(atomic64_t *v) -{ - long t; - - __asm__ __volatile__( -"1: ldarx %0,0,%2 # atomic64_inc\n\ - addic %0,%0,1\n\ - stdcx. %0,0,%2 \n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (&v->counter) - : "cc"); -} - -static __inline__ long atomic64_inc_return(atomic64_t *v) -{ - long t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%1 # atomic64_inc_return\n\ - addic %0,%0,1\n\ - stdcx. %0,0,%1 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -/* - * atomic64_inc_and_test - increment and test - * @v: pointer of type atomic64_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) - -static __inline__ void atomic64_dec(atomic64_t *v) -{ - long t; - - __asm__ __volatile__( -"1: ldarx %0,0,%2 # atomic64_dec\n\ - addic %0,%0,-1\n\ - stdcx. %0,0,%2\n\ - bne- 1b" - : "=&r" (t), "+m" (v->counter) - : "r" (&v->counter) - : "cc"); -} - -static __inline__ long atomic64_dec_return(atomic64_t *v) -{ - long t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%1 # atomic64_dec_return\n\ - addic %0,%0,-1\n\ - stdcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) -#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) - -/* - * Atomically test *v and decrement if it is greater than 0. - * The function returns the old value of *v minus 1. - */ -static __inline__ long atomic64_dec_if_positive(atomic64_t *v) -{ - long t; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ - addic. %0,%0,-1\n\ - blt- 2f\n\ - stdcx. %0,0,%1\n\ - bne- 1b" - ISYNC_ON_SMP - "\n\ -2:" : "=&r" (t) - : "r" (&v->counter) - : "cc", "memory"); - - return t; -} - -#define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -/** - * atomic64_add_unless - add unless the number is a given value - * @v: pointer of type atomic64_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @v, so long as it was not @u. - * Returns non-zero if @v was not @u, and zero otherwise. - */ -static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - long t; - - __asm__ __volatile__ ( - LWSYNC_ON_SMP -"1: ldarx %0,0,%1 # atomic_add_unless\n\ - cmpd 0,%0,%3 \n\ - beq- 2f \n\ - add %0,%2,%0 \n" -" stdcx. %0,0,%1 \n\ - bne- 1b \n" - ISYNC_ON_SMP -" subf %0,%2,%0 \n\ -2:" - : "=&r" (t) - : "r" (&v->counter), "r" (a), "r" (u) - : "cc", "memory"); - - return t != u; -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -#endif /* __powerpc64__ */ - -#include -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_ATOMIC_H_ */ diff --git a/include/asm-powerpc/auxvec.h b/include/asm-powerpc/auxvec.h deleted file mode 100644 index 19a099b..0000000 --- a/include/asm-powerpc/auxvec.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _ASM_POWERPC_AUXVEC_H -#define _ASM_POWERPC_AUXVEC_H - -/* - * We need to put in some extra aux table entries to tell glibc what - * the cache block size is, so it can use the dcbz instruction safely. - */ -#define AT_DCACHEBSIZE 19 -#define AT_ICACHEBSIZE 20 -#define AT_UCACHEBSIZE 21 -/* A special ignored type value for PPC, for glibc compatibility. */ -#define AT_IGNOREPPC 22 - -/* The vDSO location. We have to use the same value as x86 for glibc's - * sake :-) - */ -#define AT_SYSINFO_EHDR 33 - -#endif diff --git a/include/asm-powerpc/backlight.h b/include/asm-powerpc/backlight.h deleted file mode 100644 index 8cf5c37..0000000 --- a/include/asm-powerpc/backlight.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Routines for handling backlight control on PowerBooks - * - * For now, implementation resides in - * arch/powerpc/platforms/powermac/backlight.c - * - */ -#ifndef __ASM_POWERPC_BACKLIGHT_H -#define __ASM_POWERPC_BACKLIGHT_H -#ifdef __KERNEL__ - -#include -#include - -/* For locking instructions, see the implementation file */ -extern struct backlight_device *pmac_backlight; -extern struct mutex pmac_backlight_mutex; - -extern int pmac_backlight_curve_lookup(struct fb_info *info, int value); - -extern int pmac_has_backlight_type(const char *type); - -extern void pmac_backlight_key(int direction); -static inline void pmac_backlight_key_up(void) -{ - pmac_backlight_key(0); -} -static inline void pmac_backlight_key_down(void) -{ - pmac_backlight_key(1); -} - -extern void pmac_backlight_set_legacy_brightness_pmu(int brightness); -extern int pmac_backlight_set_legacy_brightness(int brightness); -extern int pmac_backlight_get_legacy_brightness(void); - -extern void pmac_backlight_enable(void); -extern void pmac_backlight_disable(void); - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-powerpc/bitops.h b/include/asm-powerpc/bitops.h deleted file mode 100644 index 897eade..0000000 --- a/include/asm-powerpc/bitops.h +++ /dev/null @@ -1,410 +0,0 @@ -/* - * PowerPC atomic bit operations. - * - * Merged version by David Gibson . - * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don - * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They - * originally took it from the ppc32 code. - * - * Within a word, bits are numbered LSB first. Lot's of places make - * this assumption by directly testing bits with (val & (1< 1 word) bitmaps on a - * big-endian system because, unlike little endian, the number of each - * bit depends on the word size. - * - * The bitop functions are defined to work on unsigned longs, so for a - * ppc64 system the bits end up numbered: - * |63..............0|127............64|191...........128|255...........196| - * and on ppc32: - * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224| - * - * There are a few little-endian macros used mostly for filesystem - * bitmaps, these work on similar bit arrays layouts, but - * byte-oriented: - * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56| - * - * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit - * number field needs to be reversed compared to the big-endian bit - * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b). - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_BITOPS_H -#define _ASM_POWERPC_BITOPS_H - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include -#include - -/* - * clear_bit doesn't imply a memory barrier - */ -#define smp_mb__before_clear_bit() smp_mb() -#define smp_mb__after_clear_bit() smp_mb() - -#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) -#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG) -#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7) - -static __inline__ void set_bit(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%3 # set_bit\n" - "or %0,%0,%2\n" - PPC405_ERR77(0,%3) - PPC_STLCX "%0,0,%3\n" - "bne- 1b" - : "=&r" (old), "+m" (*p) - : "r" (mask), "r" (p) - : "cc" ); -} - -static __inline__ void clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%3 # clear_bit\n" - "andc %0,%0,%2\n" - PPC405_ERR77(0,%3) - PPC_STLCX "%0,0,%3\n" - "bne- 1b" - : "=&r" (old), "+m" (*p) - : "r" (mask), "r" (p) - : "cc" ); -} - -static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1:" PPC_LLARX "%0,0,%3 # clear_bit_unlock\n" - "andc %0,%0,%2\n" - PPC405_ERR77(0,%3) - PPC_STLCX "%0,0,%3\n" - "bne- 1b" - : "=&r" (old), "+m" (*p) - : "r" (mask), "r" (p) - : "cc", "memory"); -} - -static __inline__ void change_bit(int nr, volatile unsigned long *addr) -{ - unsigned long old; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%3 # change_bit\n" - "xor %0,%0,%2\n" - PPC405_ERR77(0,%3) - PPC_STLCX "%0,0,%3\n" - "bne- 1b" - : "=&r" (old), "+m" (*p) - : "r" (mask), "r" (p) - : "cc" ); -} - -static __inline__ int test_and_set_bit(unsigned long nr, - volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n" - "or %1,%0,%2 \n" - PPC405_ERR77(0,%3) - PPC_STLCX "%1,0,%3 \n" - "bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ int test_and_set_bit_lock(unsigned long nr, - volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%3 # test_and_set_bit_lock\n" - "or %1,%0,%2 \n" - PPC405_ERR77(0,%3) - PPC_STLCX "%1,0,%3 \n" - "bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ int test_and_clear_bit(unsigned long nr, - volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n" - "andc %1,%0,%2 \n" - PPC405_ERR77(0,%3) - PPC_STLCX "%1,0,%3 \n" - "bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ int test_and_change_bit(unsigned long nr, - volatile unsigned long *addr) -{ - unsigned long old, t; - unsigned long mask = BITOP_MASK(nr); - unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr); - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n" - "xor %1,%0,%2 \n" - PPC405_ERR77(0,%3) - PPC_STLCX "%1,0,%3 \n" - "bne- 1b" - ISYNC_ON_SMP - : "=&r" (old), "=&r" (t) - : "r" (mask), "r" (p) - : "cc", "memory"); - - return (old & mask) != 0; -} - -static __inline__ void set_bits(unsigned long mask, unsigned long *addr) -{ - unsigned long old; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%3 # set_bits\n" - "or %0,%0,%2\n" - PPC_STLCX "%0,0,%3\n" - "bne- 1b" - : "=&r" (old), "+m" (*addr) - : "r" (mask), "r" (addr) - : "cc"); -} - -#include - -static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) -{ - __asm__ __volatile__(LWSYNC_ON_SMP "" ::: "memory"); - __clear_bit(nr, addr); -} - -/* - * Return the zero-based bit position (LE, not IBM bit numbering) of - * the most significant 1-bit in a double word. - */ -static __inline__ __attribute__((const)) -int __ilog2(unsigned long x) -{ - int lz; - - asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x)); - return BITS_PER_LONG - 1 - lz; -} - -static inline __attribute__((const)) -int __ilog2_u32(u32 n) -{ - int bit; - asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n)); - return 31 - bit; -} - -#ifdef __powerpc64__ -static inline __attribute__((const)) -int __ilog2_u64(u64 n) -{ - int bit; - asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n)); - return 63 - bit; -} -#endif - -/* - * Determines the bit position of the least significant 0 bit in the - * specified double word. The returned bit position will be - * zero-based, starting from the right side (63/31 - 0). - */ -static __inline__ unsigned long ffz(unsigned long x) -{ - /* no zero exists anywhere in the 8 byte area. */ - if ((x = ~x) == 0) - return BITS_PER_LONG; - - /* - * Calculate the bit position of the least signficant '1' bit in x - * (since x has been changed this will actually be the least signficant - * '0' bit in * the original x). Note: (x & -x) gives us a mask that - * is the least significant * (RIGHT-most) 1-bit of the value in x. - */ - return __ilog2(x & -x); -} - -static __inline__ int __ffs(unsigned long x) -{ - return __ilog2(x & -x); -} - -/* - * ffs: find first bit set. This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - */ -static __inline__ int ffs(int x) -{ - unsigned long i = (unsigned long)x; - return __ilog2(i & -i) + 1; -} - -/* - * fls: find last (most-significant) bit set. - * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ -static __inline__ int fls(unsigned int x) -{ - int lz; - - asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x)); - return 32 - lz; -} - -static __inline__ unsigned long __fls(unsigned long x) -{ - return __ilog2(x); -} - -/* - * 64-bit can do this using one cntlzd (count leading zeroes doubleword) - * instruction; for 32-bit we use the generic version, which does two - * 32-bit fls calls. - */ -#ifdef __powerpc64__ -static __inline__ int fls64(__u64 x) -{ - int lz; - - asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x)); - return 64 - lz; -} -#else -#include -#endif /* __powerpc64__ */ - -#include -#include - -/* Little-endian versions */ - -static __inline__ int test_le_bit(unsigned long nr, - __const__ unsigned long *addr) -{ - __const__ unsigned char *tmp = (__const__ unsigned char *) addr; - return (tmp[nr >> 3] >> (nr & 7)) & 1; -} - -#define __set_le_bit(nr, addr) \ - __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define __clear_le_bit(nr, addr) \ - __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) - -#define test_and_set_le_bit(nr, addr) \ - test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define test_and_clear_le_bit(nr, addr) \ - test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) - -#define __test_and_set_le_bit(nr, addr) \ - __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) -#define __test_and_clear_le_bit(nr, addr) \ - __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr)) - -#define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0) -unsigned long generic_find_next_zero_le_bit(const unsigned long *addr, - unsigned long size, unsigned long offset); - -unsigned long generic_find_next_le_bit(const unsigned long *addr, - unsigned long size, unsigned long offset); -/* Bitmap functions for the ext2 filesystem */ - -#define ext2_set_bit(nr,addr) \ - __test_and_set_le_bit((nr), (unsigned long*)addr) -#define ext2_clear_bit(nr, addr) \ - __test_and_clear_le_bit((nr), (unsigned long*)addr) - -#define ext2_set_bit_atomic(lock, nr, addr) \ - test_and_set_le_bit((nr), (unsigned long*)addr) -#define ext2_clear_bit_atomic(lock, nr, addr) \ - test_and_clear_le_bit((nr), (unsigned long*)addr) - -#define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr) - -#define ext2_find_first_zero_bit(addr, size) \ - find_first_zero_le_bit((unsigned long*)addr, size) -#define ext2_find_next_zero_bit(addr, size, off) \ - generic_find_next_zero_le_bit((unsigned long*)addr, size, off) - -#define ext2_find_next_bit(addr, size, off) \ - generic_find_next_le_bit((unsigned long *)addr, size, off) -/* Bitmap functions for the minix filesystem. */ - -#define minix_test_and_set_bit(nr,addr) \ - __test_and_set_le_bit(nr, (unsigned long *)addr) -#define minix_set_bit(nr,addr) \ - __set_le_bit(nr, (unsigned long *)addr) -#define minix_test_and_clear_bit(nr,addr) \ - __test_and_clear_le_bit(nr, (unsigned long *)addr) -#define minix_test_bit(nr,addr) \ - test_le_bit(nr, (unsigned long *)addr) - -#define minix_find_first_zero_bit(addr,size) \ - find_first_zero_le_bit((unsigned long *)addr, size) - -#include - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_BITOPS_H */ diff --git a/include/asm-powerpc/bootx.h b/include/asm-powerpc/bootx.h deleted file mode 100644 index 57b82e3..0000000 --- a/include/asm-powerpc/bootx.h +++ /dev/null @@ -1,171 +0,0 @@ -/* - * This file describes the structure passed from the BootX application - * (for MacOS) when it is used to boot Linux. - * - * Written by Benjamin Herrenschmidt. - */ - - -#ifndef __ASM_BOOTX_H__ -#define __ASM_BOOTX_H__ - -#include - -#ifdef macintosh -#include -#include "linux_type_defs.h" -#endif - -#ifdef macintosh -/* All this requires PowerPC alignment */ -#pragma options align=power -#endif - -/* On kernel entry: - * - * r3 = 0x426f6f58 ('BooX') - * r4 = pointer to boot_infos - * r5 = NULL - * - * Data and instruction translation disabled, interrupts - * disabled, kernel loaded at physical 0x00000000 on PCI - * machines (will be different on NuBus). - */ - -#define BOOT_INFO_VERSION 5 -#define BOOT_INFO_COMPATIBLE_VERSION 1 - -/* Bit in the architecture flag mask. More to be defined in - future versions. Note that either BOOT_ARCH_PCI or - BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are - set additionally when BOOT_ARCH_NUBUS is set. - */ -#define BOOT_ARCH_PCI 0x00000001UL -#define BOOT_ARCH_NUBUS 0x00000002UL -#define BOOT_ARCH_NUBUS_PDM 0x00000010UL -#define BOOT_ARCH_NUBUS_PERFORMA 0x00000020UL -#define BOOT_ARCH_NUBUS_POWERBOOK 0x00000040UL - -/* Maximum number of ranges in phys memory map */ -#define MAX_MEM_MAP_SIZE 26 - -/* This is the format of an element in the physical memory map. Note that - the map is optional and current BootX will only build it for pre-PCI - machines */ -typedef struct boot_info_map_entry -{ - __u32 physAddr; /* Physical starting address */ - __u32 size; /* Size in bytes */ -} boot_info_map_entry_t; - - -/* Here are the boot informations that are passed to the bootstrap - * Note that the kernel arguments and the device tree are appended - * at the end of this structure. */ -typedef struct boot_infos -{ - /* Version of this structure */ - __u32 version; - /* backward compatible down to version: */ - __u32 compatible_version; - - /* NEW (vers. 2) this holds the current _logical_ base addr of - the frame buffer (for use by early boot message) */ - __u8* logicalDisplayBase; - - /* NEW (vers. 4) Apple's machine identification */ - __u32 machineID; - - /* NEW (vers. 4) Detected hw architecture */ - __u32 architecture; - - /* The device tree (internal addresses relative to the beginning of the tree, - * device tree offset relative to the beginning of this structure). - * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this - * field is 0. - */ - __u32 deviceTreeOffset; /* Device tree offset */ - __u32 deviceTreeSize; /* Size of the device tree */ - - /* Some infos about the current MacOS display */ - __u32 dispDeviceRect[4]; /* left,top,right,bottom */ - __u32 dispDeviceDepth; /* (8, 16 or 32) */ - __u8* dispDeviceBase; /* base address (physical) */ - __u32 dispDeviceRowBytes; /* rowbytes (in bytes) */ - __u32 dispDeviceColorsOffset; /* Colormap (8 bits only) or 0 (*) */ - /* Optional offset in the registry to the current - * MacOS display. (Can be 0 when not detected) */ - __u32 dispDeviceRegEntryOffset; - - /* Optional pointer to boot ramdisk (offset from this structure) */ - __u32 ramDisk; - __u32 ramDiskSize; /* size of ramdisk image */ - - /* Kernel command line arguments (offset from this structure) */ - __u32 kernelParamsOffset; - - /* ALL BELOW NEW (vers. 4) */ - - /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag - (non-PCI) only. On PCI, memory is contiguous and it's size is in the - device-tree. */ - boot_info_map_entry_t - physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */ - __u32 physMemoryMapSize; /* How many entries in map */ - - - /* The framebuffer size (optional, currently 0) */ - __u32 frameBufferSize; /* Represents a max size, can be 0. */ - - /* NEW (vers. 5) */ - - /* Total params size (args + colormap + device tree + ramdisk) */ - __u32 totalParamsSize; - -} boot_infos_t; - -#ifdef __KERNEL__ -/* (*) The format of the colormap is 256 * 3 * 2 bytes. Each color index - * is represented by 3 short words containing a 16 bits (unsigned) color - * component. Later versions may contain the gamma table for direct-color - * devices here. - */ -#define BOOTX_COLORTABLE_SIZE (256UL*3UL*2UL) - -/* BootX passes the device-tree using a format that comes from earlier - * ppc32 kernels. This used to match what is in prom.h, but not anymore - * so we now define it here - */ -struct bootx_dt_prop { - u32 name; - int length; - u32 value; - u32 next; -}; - -struct bootx_dt_node { - u32 unused0; - u32 unused1; - u32 phandle; /* not really available */ - u32 unused2; - u32 unused3; - u32 unused4; - u32 unused5; - u32 full_name; - u32 properties; - u32 parent; - u32 child; - u32 sibling; - u32 next; - u32 allnext; -}; - -extern void bootx_init(unsigned long r4, unsigned long phys); - -#endif /* __KERNEL__ */ - -#ifdef macintosh -#pragma options align=reset -#endif - -#endif diff --git a/include/asm-powerpc/btext.h b/include/asm-powerpc/btext.h deleted file mode 100644 index 906f46e..0000000 --- a/include/asm-powerpc/btext.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Definitions for using the procedures in btext.c. - * - * Benjamin Herrenschmidt - */ -#ifndef __PPC_BTEXT_H -#define __PPC_BTEXT_H -#ifdef __KERNEL__ - -extern int btext_find_display(int allow_nonstdout); -extern void btext_update_display(unsigned long phys, int width, int height, - int depth, int pitch); -extern void btext_setup_display(int width, int height, int depth, int pitch, - unsigned long address); -extern void btext_prepare_BAT(void); -extern void btext_unmap(void); - -extern void btext_drawchar(char c); -extern void btext_drawstring(const char *str); -extern void btext_drawhex(unsigned long v); -extern void btext_drawtext(const char *c, unsigned int len); - -extern void btext_clearscreen(void); -extern void btext_flushscreen(void); -extern void btext_flushline(void); - -#endif /* __KERNEL__ */ -#endif /* __PPC_BTEXT_H */ diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h deleted file mode 100644 index e55d1f6..0000000 --- a/include/asm-powerpc/bug.h +++ /dev/null @@ -1,121 +0,0 @@ -#ifndef _ASM_POWERPC_BUG_H -#define _ASM_POWERPC_BUG_H -#ifdef __KERNEL__ - -#include -/* - * Define an illegal instr to trap on the bug. - * We don't use 0 because that marks the end of a function - * in the ELF ABI. That's "Boo Boo" in case you wonder... - */ -#define BUG_OPCODE .long 0x00b00b00 /* For asm */ -#define BUG_ILLEGAL_INSTR "0x00b00b00" /* For BUG macro */ - -#ifdef CONFIG_BUG - -#ifdef __ASSEMBLY__ -#ifdef CONFIG_DEBUG_BUGVERBOSE -.macro EMIT_BUG_ENTRY addr,file,line,flags - .section __bug_table,"a" -5001: PPC_LONG \addr, 5002f - .short \line, \flags - .org 5001b+BUG_ENTRY_SIZE - .previous - .section .rodata,"a" -5002: .asciz "\file" - .previous -.endm -#else - .macro EMIT_BUG_ENTRY addr,file,line,flags - .section __bug_table,"a" -5001: PPC_LONG \addr - .short \flags - .org 5001b+BUG_ENTRY_SIZE - .previous -.endm -#endif /* verbose */ - -#else /* !__ASSEMBLY__ */ -/* _EMIT_BUG_ENTRY expects args %0,%1,%2,%3 to be FILE, LINE, flags and - sizeof(struct bug_entry), respectively */ -#ifdef CONFIG_DEBUG_BUGVERBOSE -#define _EMIT_BUG_ENTRY \ - ".section __bug_table,\"a\"\n" \ - "2:\t" PPC_LONG "1b, %0\n" \ - "\t.short %1, %2\n" \ - ".org 2b+%3\n" \ - ".previous\n" -#else -#define _EMIT_BUG_ENTRY \ - ".section __bug_table,\"a\"\n" \ - "2:\t" PPC_LONG "1b\n" \ - "\t.short %2\n" \ - ".org 2b+%3\n" \ - ".previous\n" -#endif - -/* - * BUG_ON() and WARN_ON() do their best to cooperate with compile-time - * optimisations. However depending on the complexity of the condition - * some compiler versions may not produce optimal results. - */ - -#define BUG() do { \ - __asm__ __volatile__( \ - "1: twi 31,0,0\n" \ - _EMIT_BUG_ENTRY \ - : : "i" (__FILE__), "i" (__LINE__), \ - "i" (0), "i" (sizeof(struct bug_entry))); \ - for(;;) ; \ -} while (0) - -#define BUG_ON(x) do { \ - if (__builtin_constant_p(x)) { \ - if (x) \ - BUG(); \ - } else { \ - __asm__ __volatile__( \ - "1: "PPC_TLNEI" %4,0\n" \ - _EMIT_BUG_ENTRY \ - : : "i" (__FILE__), "i" (__LINE__), "i" (0), \ - "i" (sizeof(struct bug_entry)), \ - "r" ((__force long)(x))); \ - } \ -} while (0) - -#define __WARN() do { \ - __asm__ __volatile__( \ - "1: twi 31,0,0\n" \ - _EMIT_BUG_ENTRY \ - : : "i" (__FILE__), "i" (__LINE__), \ - "i" (BUGFLAG_WARNING), \ - "i" (sizeof(struct bug_entry))); \ -} while (0) - -#define WARN_ON(x) ({ \ - int __ret_warn_on = !!(x); \ - if (__builtin_constant_p(__ret_warn_on)) { \ - if (__ret_warn_on) \ - __WARN(); \ - } else { \ - __asm__ __volatile__( \ - "1: "PPC_TLNEI" %4,0\n" \ - _EMIT_BUG_ENTRY \ - : : "i" (__FILE__), "i" (__LINE__), \ - "i" (BUGFLAG_WARNING), \ - "i" (sizeof(struct bug_entry)), \ - "r" (__ret_warn_on)); \ - } \ - unlikely(__ret_warn_on); \ -}) - -#define HAVE_ARCH_BUG -#define HAVE_ARCH_BUG_ON -#define HAVE_ARCH_WARN_ON -#endif /* __ASSEMBLY __ */ -#endif /* CONFIG_BUG */ - -#include - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_BUG_H */ diff --git a/include/asm-powerpc/bugs.h b/include/asm-powerpc/bugs.h deleted file mode 100644 index 42fdb73..0000000 --- a/include/asm-powerpc/bugs.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef _ASM_POWERPC_BUGS_H -#define _ASM_POWERPC_BUGS_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * This file is included by 'init/main.c' to check for - * architecture-dependent bugs. - */ - -static inline void check_bugs(void) { } - -#endif /* _ASM_POWERPC_BUGS_H */ diff --git a/include/asm-powerpc/byteorder.h b/include/asm-powerpc/byteorder.h deleted file mode 100644 index b377522..0000000 --- a/include/asm-powerpc/byteorder.h +++ /dev/null @@ -1,89 +0,0 @@ -#ifndef _ASM_POWERPC_BYTEORDER_H -#define _ASM_POWERPC_BYTEORDER_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include - -#ifdef __GNUC__ -#ifdef __KERNEL__ - -static __inline__ __u16 ld_le16(const volatile __u16 *addr) -{ - __u16 val; - - __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); - return val; -} - -static __inline__ void st_le16(volatile __u16 *addr, const __u16 val) -{ - __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); -} - -static __inline__ __u32 ld_le32(const volatile __u32 *addr) -{ - __u32 val; - - __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); - return val; -} - -static __inline__ void st_le32(volatile __u32 *addr, const __u32 val) -{ - __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); -} - -static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 value) -{ - __u16 result; - - __asm__("rlwimi %0,%1,8,16,23" - : "=r" (result) - : "r" (value), "0" (value >> 8)); - return result; -} - -static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 value) -{ - __u32 result; - - __asm__("rlwimi %0,%1,24,16,23\n\t" - "rlwimi %0,%1,8,8,15\n\t" - "rlwimi %0,%1,24,0,7" - : "=r" (result) - : "r" (value), "0" (value >> 24)); - return result; -} - -#define __arch__swab16(x) ___arch__swab16(x) -#define __arch__swab32(x) ___arch__swab32(x) - -/* The same, but returns converted value from the location pointer by addr. */ -#define __arch__swab16p(addr) ld_le16(addr) -#define __arch__swab32p(addr) ld_le32(addr) - -/* The same, but do the conversion in situ, ie. put the value back to addr. */ -#define __arch__swab16s(addr) st_le16(addr,*addr) -#define __arch__swab32s(addr) st_le32(addr,*addr) - -#endif /* __KERNEL__ */ - -#ifndef __STRICT_ANSI__ -#define __BYTEORDER_HAS_U64__ -#ifndef __powerpc64__ -#define __SWAB_64_THRU_32__ -#endif /* __powerpc64__ */ -#endif /* __STRICT_ANSI__ */ - -#endif /* __GNUC__ */ - -#include - -#endif /* _ASM_POWERPC_BYTEORDER_H */ diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h deleted file mode 100644 index 81de6eb..0000000 --- a/include/asm-powerpc/cache.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef _ASM_POWERPC_CACHE_H -#define _ASM_POWERPC_CACHE_H - -#ifdef __KERNEL__ - - -/* bytes per L1 cache line */ -#if defined(CONFIG_8xx) || defined(CONFIG_403GCX) -#define L1_CACHE_SHIFT 4 -#define MAX_COPY_PREFETCH 1 -#elif defined(CONFIG_PPC_E500MC) -#define L1_CACHE_SHIFT 6 -#define MAX_COPY_PREFETCH 4 -#elif defined(CONFIG_PPC32) -#define L1_CACHE_SHIFT 5 -#define MAX_COPY_PREFETCH 4 -#else /* CONFIG_PPC64 */ -#define L1_CACHE_SHIFT 7 -#endif - -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -#define SMP_CACHE_BYTES L1_CACHE_BYTES - -#if defined(__powerpc64__) && !defined(__ASSEMBLY__) -struct ppc64_caches { - u32 dsize; /* L1 d-cache size */ - u32 dline_size; /* L1 d-cache line size */ - u32 log_dline_size; - u32 dlines_per_page; - u32 isize; /* L1 i-cache size */ - u32 iline_size; /* L1 i-cache line size */ - u32 log_iline_size; - u32 ilines_per_page; -}; - -extern struct ppc64_caches ppc64_caches; -#endif /* __powerpc64__ && ! __ASSEMBLY__ */ - -#if !defined(__ASSEMBLY__) -#define __read_mostly __attribute__((__section__(".data.read_mostly"))) -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_CACHE_H */ diff --git a/include/asm-powerpc/cacheflush.h b/include/asm-powerpc/cacheflush.h deleted file mode 100644 index ba667a383..0000000 --- a/include/asm-powerpc/cacheflush.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _ASM_POWERPC_CACHEFLUSH_H -#define _ASM_POWERPC_CACHEFLUSH_H - -#ifdef __KERNEL__ - -#include -#include - -/* - * No cache flushing is required when address mappings are changed, - * because the caches on PowerPCs are physically addressed. - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_icache_page(vma, page) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -extern void flush_dcache_page(struct page *page); -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -extern void __flush_icache_range(unsigned long, unsigned long); -static inline void flush_icache_range(unsigned long start, unsigned long stop) -{ - if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) - __flush_icache_range(start, stop); -} - -extern void flush_icache_user_range(struct vm_area_struct *vma, - struct page *page, unsigned long addr, - int len); -extern void __flush_dcache_icache(void *page_va); -extern void flush_dcache_icache_page(struct page *page); -#if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE) -extern void __flush_dcache_icache_phys(unsigned long physaddr); -#endif /* CONFIG_PPC32 && !CONFIG_BOOKE */ - -extern void flush_dcache_range(unsigned long start, unsigned long stop); -#ifdef CONFIG_PPC32 -extern void clean_dcache_range(unsigned long start, unsigned long stop); -extern void invalidate_dcache_range(unsigned long start, unsigned long stop); -#endif /* CONFIG_PPC32 */ -#ifdef CONFIG_PPC64 -extern void flush_inval_dcache_range(unsigned long start, unsigned long stop); -extern void flush_dcache_phys_range(unsigned long start, unsigned long stop); -#endif - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - memcpy(dst, src, len); \ - flush_icache_user_range(vma, page, vaddr, len); \ - } while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - - - -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_CACHEFLUSH_H */ diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h deleted file mode 100644 index 8066eed..0000000 --- a/include/asm-powerpc/cell-pmu.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Cell Broadband Engine Performance Monitor - * - * (C) Copyright IBM Corporation 2006 - * - * Author: - * David Erb (djerb@us.ibm.com) - * Kevin Corry (kevcorry@us.ibm.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_CELL_PMU_H__ -#define __ASM_CELL_PMU_H__ - -/* The Cell PMU has four hardware performance counters, which can be - * configured as four 32-bit counters or eight 16-bit counters. - */ -#define NR_PHYS_CTRS 4 -#define NR_CTRS (NR_PHYS_CTRS * 2) - -/* Macros for the pm_control register. */ -#define CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) -#define CBE_PM_ENABLE_PERF_MON 0x80000000 -#define CBE_PM_STOP_AT_MAX 0x40000000 -#define CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3) -#define CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28) -#define CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18) -#define CBE_PM_FREEZE_ALL_CTRS 0x00100000 -#define CBE_PM_ENABLE_EXT_TRACE 0x00008000 - -/* Macros for the trace_address register. */ -#define CBE_PM_TRACE_BUF_FULL 0x00000800 -#define CBE_PM_TRACE_BUF_EMPTY 0x00000400 -#define CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff) -#define CBE_PM_TRACE_BUF_MAX_COUNT 0x400 - -/* Macros for the pm07_control registers. */ -#define CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f) -#define CBE_PM_CTR_INPUT_CONTROL 0x02000000 -#define CBE_PM_CTR_POLARITY 0x01000000 -#define CBE_PM_CTR_COUNT_CYCLES 0x00800000 -#define CBE_PM_CTR_ENABLE 0x00400000 -#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) -#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) -#define PM07_CTR_POLARITY(x) (((x) & 1) << 24) -#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) -#define PM07_CTR_ENABLE(x) (((x) & 1) << 22) - -/* Macros for the pm_status register. */ -#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) - -enum pm_reg_name { - group_control, - debug_bus_control, - trace_address, - ext_tr_timer, - pm_status, - pm_control, - pm_interval, - pm_start_stop, -}; - -/* Routines for reading/writing the PMU registers. */ -extern u32 cbe_read_phys_ctr(u32 cpu, u32 phys_ctr); -extern void cbe_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); -extern u32 cbe_read_ctr(u32 cpu, u32 ctr); -extern void cbe_write_ctr(u32 cpu, u32 ctr, u32 val); - -extern u32 cbe_read_pm07_control(u32 cpu, u32 ctr); -extern void cbe_write_pm07_control(u32 cpu, u32 ctr, u32 val); -extern u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg); -extern void cbe_write_pm(u32 cpu, enum pm_reg_name reg, u32 val); - -extern u32 cbe_get_ctr_size(u32 cpu, u32 phys_ctr); -extern void cbe_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); - -extern void cbe_enable_pm(u32 cpu); -extern void cbe_disable_pm(u32 cpu); - -extern void cbe_read_trace_buffer(u32 cpu, u64 *buf); - -extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); -extern void cbe_disable_pm_interrupts(u32 cpu); -extern u32 cbe_get_and_clear_pm_interrupts(u32 cpu); -extern void cbe_sync_irq(int node); - -#define CBE_COUNT_SUPERVISOR_MODE 0 -#define CBE_COUNT_HYPERVISOR_MODE 1 -#define CBE_COUNT_PROBLEM_MODE 2 -#define CBE_COUNT_ALL_MODES 3 - -#endif /* __ASM_CELL_PMU_H__ */ diff --git a/include/asm-powerpc/cell-regs.h b/include/asm-powerpc/cell-regs.h deleted file mode 100644 index fd6fd00..0000000 --- a/include/asm-powerpc/cell-regs.h +++ /dev/null @@ -1,315 +0,0 @@ -/* - * cbe_regs.h - * - * This file is intended to hold the various register definitions for CBE - * on-chip system devices (memory controller, IO controller, etc...) - * - * (C) Copyright IBM Corporation 2001,2006 - * - * Authors: Maximino Aguilar (maguilar@us.ibm.com) - * David J. Erb (djerb@us.ibm.com) - * - * (c) 2006 Benjamin Herrenschmidt , IBM Corp. - */ - -#ifndef CBE_REGS_H -#define CBE_REGS_H - -#include - -/* - * - * Some HID register definitions - * - */ - -/* CBE specific HID0 bits */ -#define HID0_CBE_THERM_WAKEUP 0x0000020000000000ul -#define HID0_CBE_SYSERR_WAKEUP 0x0000008000000000ul -#define HID0_CBE_THERM_INT_EN 0x0000000400000000ul -#define HID0_CBE_SYSERR_INT_EN 0x0000000200000000ul - -#define MAX_CBE 2 - -/* - * - * Pervasive unit register definitions - * - */ - -union spe_reg { - u64 val; - u8 spe[8]; -}; - -union ppe_spe_reg { - u64 val; - struct { - u32 ppe; - u32 spe; - }; -}; - - -struct cbe_pmd_regs { - /* Debug Bus Control */ - u64 pad_0x0000; /* 0x0000 */ - - u64 group_control; /* 0x0008 */ - - u8 pad_0x0010_0x00a8 [0x00a8 - 0x0010]; /* 0x0010 */ - - u64 debug_bus_control; /* 0x00a8 */ - - u8 pad_0x00b0_0x0100 [0x0100 - 0x00b0]; /* 0x00b0 */ - - u64 trace_aux_data; /* 0x0100 */ - u64 trace_buffer_0_63; /* 0x0108 */ - u64 trace_buffer_64_127; /* 0x0110 */ - u64 trace_address; /* 0x0118 */ - u64 ext_tr_timer; /* 0x0120 */ - - u8 pad_0x0128_0x0400 [0x0400 - 0x0128]; /* 0x0128 */ - - /* Performance Monitor */ - u64 pm_status; /* 0x0400 */ - u64 pm_control; /* 0x0408 */ - u64 pm_interval; /* 0x0410 */ - u64 pm_ctr[4]; /* 0x0418 */ - u64 pm_start_stop; /* 0x0438 */ - u64 pm07_control[8]; /* 0x0440 */ - - u8 pad_0x0480_0x0800 [0x0800 - 0x0480]; /* 0x0480 */ - - /* Thermal Sensor Registers */ - union spe_reg ts_ctsr1; /* 0x0800 */ - u64 ts_ctsr2; /* 0x0808 */ - union spe_reg ts_mtsr1; /* 0x0810 */ - u64 ts_mtsr2; /* 0x0818 */ - union spe_reg ts_itr1; /* 0x0820 */ - u64 ts_itr2; /* 0x0828 */ - u64 ts_gitr; /* 0x0830 */ - u64 ts_isr; /* 0x0838 */ - u64 ts_imr; /* 0x0840 */ - union spe_reg tm_cr1; /* 0x0848 */ - u64 tm_cr2; /* 0x0850 */ - u64 tm_simr; /* 0x0858 */ - union ppe_spe_reg tm_tpr; /* 0x0860 */ - union spe_reg tm_str1; /* 0x0868 */ - u64 tm_str2; /* 0x0870 */ - union ppe_spe_reg tm_tsr; /* 0x0878 */ - - /* Power Management */ - u64 pmcr; /* 0x0880 */ -#define CBE_PMD_PAUSE_ZERO_CONTROL 0x10000 - u64 pmsr; /* 0x0888 */ - - /* Time Base Register */ - u64 tbr; /* 0x0890 */ - - u8 pad_0x0898_0x0c00 [0x0c00 - 0x0898]; /* 0x0898 */ - - /* Fault Isolation Registers */ - u64 checkstop_fir; /* 0x0c00 */ - u64 recoverable_fir; /* 0x0c08 */ - u64 spec_att_mchk_fir; /* 0x0c10 */ - u32 fir_mode_reg; /* 0x0c18 */ - u8 pad_0x0c1c_0x0c20 [4]; /* 0x0c1c */ -#define CBE_PMD_FIR_MODE_M8 0x00800 - u64 fir_enable_mask; /* 0x0c20 */ - - u8 pad_0x0c28_0x0ca8 [0x0ca8 - 0x0c28]; /* 0x0c28 */ - u64 ras_esc_0; /* 0x0ca8 */ - u8 pad_0x0cb0_0x1000 [0x1000 - 0x0cb0]; /* 0x0cb0 */ -}; - -extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np); -extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu); - -/* - * PMU shadow registers - * - * Many of the registers in the performance monitoring unit are write-only, - * so we need to save a copy of what we write to those registers. - * - * The actual data counters are read/write. However, writing to the counters - * only takes effect if the PMU is enabled. Otherwise the value is stored in - * a hardware latch until the next time the PMU is enabled. So we save a copy - * of the counter values if we need to read them back while the PMU is - * disabled. The counter_value_in_latch field is a bitmap indicating which - * counters currently have a value waiting to be written. - */ - -struct cbe_pmd_shadow_regs { - u32 group_control; - u32 debug_bus_control; - u32 trace_address; - u32 ext_tr_timer; - u32 pm_status; - u32 pm_control; - u32 pm_interval; - u32 pm_start_stop; - u32 pm07_control[NR_CTRS]; - - u32 pm_ctr[NR_PHYS_CTRS]; - u32 counter_value_in_latch; -}; - -extern struct cbe_pmd_shadow_regs *cbe_get_pmd_shadow_regs(struct device_node *np); -extern struct cbe_pmd_shadow_regs *cbe_get_cpu_pmd_shadow_regs(int cpu); - -/* - * - * IIC unit register definitions - * - */ - -struct cbe_iic_pending_bits { - u32 data; - u8 flags; - u8 class; - u8 source; - u8 prio; -}; - -#define CBE_IIC_IRQ_VALID 0x80 -#define CBE_IIC_IRQ_IPI 0x40 - -struct cbe_iic_thread_regs { - struct cbe_iic_pending_bits pending; - struct cbe_iic_pending_bits pending_destr; - u64 generate; - u64 prio; -}; - -struct cbe_iic_regs { - u8 pad_0x0000_0x0400[0x0400 - 0x0000]; /* 0x0000 */ - - /* IIC interrupt registers */ - struct cbe_iic_thread_regs thread[2]; /* 0x0400 */ - - u64 iic_ir; /* 0x0440 */ -#define CBE_IIC_IR_PRIO(x) (((x) & 0xf) << 12) -#define CBE_IIC_IR_DEST_NODE(x) (((x) & 0xf) << 4) -#define CBE_IIC_IR_DEST_UNIT(x) ((x) & 0xf) -#define CBE_IIC_IR_IOC_0 0x0 -#define CBE_IIC_IR_IOC_1S 0xb -#define CBE_IIC_IR_PT_0 0xe -#define CBE_IIC_IR_PT_1 0xf - - u64 iic_is; /* 0x0448 */ -#define CBE_IIC_IS_PMI 0x2 - - u8 pad_0x0450_0x0500[0x0500 - 0x0450]; /* 0x0450 */ - - /* IOC FIR */ - u64 ioc_fir_reset; /* 0x0500 */ - u64 ioc_fir_set; /* 0x0508 */ - u64 ioc_checkstop_enable; /* 0x0510 */ - u64 ioc_fir_error_mask; /* 0x0518 */ - u64 ioc_syserr_enable; /* 0x0520 */ - u64 ioc_fir; /* 0x0528 */ - - u8 pad_0x0530_0x1000[0x1000 - 0x0530]; /* 0x0530 */ -}; - -extern struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np); -extern struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu); - - -struct cbe_mic_tm_regs { - u8 pad_0x0000_0x0040[0x0040 - 0x0000]; /* 0x0000 */ - - u64 mic_ctl_cnfg2; /* 0x0040 */ -#define CBE_MIC_ENABLE_AUX_TRC 0x8000000000000000LL -#define CBE_MIC_DISABLE_PWR_SAV_2 0x0200000000000000LL -#define CBE_MIC_DISABLE_AUX_TRC_WRAP 0x0100000000000000LL -#define CBE_MIC_ENABLE_AUX_TRC_INT 0x0080000000000000LL - - u64 pad_0x0048; /* 0x0048 */ - - u64 mic_aux_trc_base; /* 0x0050 */ - u64 mic_aux_trc_max_addr; /* 0x0058 */ - u64 mic_aux_trc_cur_addr; /* 0x0060 */ - u64 mic_aux_trc_grf_addr; /* 0x0068 */ - u64 mic_aux_trc_grf_data; /* 0x0070 */ - - u64 pad_0x0078; /* 0x0078 */ - - u64 mic_ctl_cnfg_0; /* 0x0080 */ -#define CBE_MIC_DISABLE_PWR_SAV_0 0x8000000000000000LL - - u64 pad_0x0088; /* 0x0088 */ - - u64 slow_fast_timer_0; /* 0x0090 */ - u64 slow_next_timer_0; /* 0x0098 */ - - u8 pad_0x00a0_0x00f8[0x00f8 - 0x00a0]; /* 0x00a0 */ - u64 mic_df_ecc_address_0; /* 0x00f8 */ - - u8 pad_0x0100_0x01b8[0x01b8 - 0x0100]; /* 0x0100 */ - u64 mic_df_ecc_address_1; /* 0x01b8 */ - - u64 mic_ctl_cnfg_1; /* 0x01c0 */ -#define CBE_MIC_DISABLE_PWR_SAV_1 0x8000000000000000LL - - u64 pad_0x01c8; /* 0x01c8 */ - - u64 slow_fast_timer_1; /* 0x01d0 */ - u64 slow_next_timer_1; /* 0x01d8 */ - - u8 pad_0x01e0_0x0208[0x0208 - 0x01e0]; /* 0x01e0 */ - u64 mic_exc; /* 0x0208 */ -#define CBE_MIC_EXC_BLOCK_SCRUB 0x0800000000000000ULL -#define CBE_MIC_EXC_FAST_SCRUB 0x0100000000000000ULL - - u64 mic_mnt_cfg; /* 0x0210 */ -#define CBE_MIC_MNT_CFG_CHAN_0_POP 0x0002000000000000ULL -#define CBE_MIC_MNT_CFG_CHAN_1_POP 0x0004000000000000ULL - - u64 mic_df_config; /* 0x0218 */ -#define CBE_MIC_ECC_DISABLE_0 0x4000000000000000ULL -#define CBE_MIC_ECC_REP_SINGLE_0 0x2000000000000000ULL -#define CBE_MIC_ECC_DISABLE_1 0x0080000000000000ULL -#define CBE_MIC_ECC_REP_SINGLE_1 0x0040000000000000ULL - - u8 pad_0x0220_0x0230[0x0230 - 0x0220]; /* 0x0220 */ - u64 mic_fir; /* 0x0230 */ -#define CBE_MIC_FIR_ECC_SINGLE_0_ERR 0x0200000000000000ULL -#define CBE_MIC_FIR_ECC_MULTI_0_ERR 0x0100000000000000ULL -#define CBE_MIC_FIR_ECC_SINGLE_1_ERR 0x0080000000000000ULL -#define CBE_MIC_FIR_ECC_MULTI_1_ERR 0x0040000000000000ULL -#define CBE_MIC_FIR_ECC_ERR_MASK 0xffff000000000000ULL -#define CBE_MIC_FIR_ECC_SINGLE_0_CTE 0x0000020000000000ULL -#define CBE_MIC_FIR_ECC_MULTI_0_CTE 0x0000010000000000ULL -#define CBE_MIC_FIR_ECC_SINGLE_1_CTE 0x0000008000000000ULL -#define CBE_MIC_FIR_ECC_MULTI_1_CTE 0x0000004000000000ULL -#define CBE_MIC_FIR_ECC_CTE_MASK 0x0000ffff00000000ULL -#define CBE_MIC_FIR_ECC_SINGLE_0_RESET 0x0000000002000000ULL -#define CBE_MIC_FIR_ECC_MULTI_0_RESET 0x0000000001000000ULL -#define CBE_MIC_FIR_ECC_SINGLE_1_RESET 0x0000000000800000ULL -#define CBE_MIC_FIR_ECC_MULTI_1_RESET 0x0000000000400000ULL -#define CBE_MIC_FIR_ECC_RESET_MASK 0x00000000ffff0000ULL -#define CBE_MIC_FIR_ECC_SINGLE_0_SET 0x0000000000000200ULL -#define CBE_MIC_FIR_ECC_MULTI_0_SET 0x0000000000000100ULL -#define CBE_MIC_FIR_ECC_SINGLE_1_SET 0x0000000000000080ULL -#define CBE_MIC_FIR_ECC_MULTI_1_SET 0x0000000000000040ULL -#define CBE_MIC_FIR_ECC_SET_MASK 0x000000000000ffffULL - u64 mic_fir_debug; /* 0x0238 */ - - u8 pad_0x0240_0x1000[0x1000 - 0x0240]; /* 0x0240 */ -}; - -extern struct cbe_mic_tm_regs __iomem *cbe_get_mic_tm_regs(struct device_node *np); -extern struct cbe_mic_tm_regs __iomem *cbe_get_cpu_mic_tm_regs(int cpu); - -/* some utility functions to deal with SMT */ -extern u32 cbe_get_hw_thread_id(int cpu); -extern u32 cbe_cpu_to_node(int cpu); -extern u32 cbe_node_to_cpu(int node); - -/* Init this module early */ -extern void cbe_regs_init(void); - - -#endif /* CBE_REGS_H */ diff --git a/include/asm-powerpc/checksum.h b/include/asm-powerpc/checksum.h deleted file mode 100644 index 7cdf358..0000000 --- a/include/asm-powerpc/checksum.h +++ /dev/null @@ -1,117 +0,0 @@ -#ifndef _ASM_POWERPC_CHECKSUM_H -#define _ASM_POWERPC_CHECKSUM_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. ihl is the number - * of 32-bit words and is always >= 5. - */ -extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -extern __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum); - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * Computes the checksum of a memory block at src, length len, - * and adds in "sum" (32-bit), while copying the block to dst. - * If an access exception occurs on src or dst, it stores -EFAULT - * to *src_err or *dst_err respectively (if that pointer is not - * NULL), and, for an error on src, zeroes the rest of dst. - * - * Like csum_partial, this must be called with even lengths, - * except for the last fragment. - */ -extern __wsum csum_partial_copy_generic(const void *src, void *dst, - int len, __wsum sum, - int *src_err, int *dst_err); -/* - * the same as csum_partial, but copies from src to dst while it - * checksums. - */ -#define csum_partial_copy_from_user(src, dst, len, sum, errp) \ - csum_partial_copy_generic((__force const void *)(src), (dst), (len), (sum), (errp), NULL) - -#define csum_partial_copy_nocheck(src, dst, len, sum) \ - csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL) - - -/* - * turns a 32-bit partial checksum (e.g. from csum_partial) into a - * 1's complement 16-bit checksum. - */ -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - /* swap the two 16-bit halves of sum */ - __asm__("rlwinm %0,%1,16,0,31" : "=r" (tmp) : "r" (sum)); - /* if there is a carry from adding the two 16-bit halves, - it will carry from the lower half into the upper half, - giving us the correct sum in the upper half. */ - return (__force __sum16)(~((__force u32)sum + tmp) >> 16); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ -#ifdef __powerpc64__ - unsigned long s = (__force u32)sum; - - s += (__force u32)saddr; - s += (__force u32)daddr; - s += proto + len; - s += (s >> 32); - return (__force __wsum) s; -#else - __asm__("\n\ - addc %0,%0,%1 \n\ - adde %0,%0,%2 \n\ - adde %0,%0,%3 \n\ - addze %0,%0 \n\ - " - : "=r" (sum) - : "r" (daddr), "r"(saddr), "r"(proto + len), "0"(sum)); - return sum; -#endif -} -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-powerpc/clk_interface.h b/include/asm-powerpc/clk_interface.h deleted file mode 100644 index ab1882c..0000000 --- a/include/asm-powerpc/clk_interface.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_POWERPC_CLK_INTERFACE_H -#define __ASM_POWERPC_CLK_INTERFACE_H - -#include - -struct clk_interface { - struct clk* (*clk_get) (struct device *dev, const char *id); - int (*clk_enable) (struct clk *clk); - void (*clk_disable) (struct clk *clk); - unsigned long (*clk_get_rate) (struct clk *clk); - void (*clk_put) (struct clk *clk); - long (*clk_round_rate) (struct clk *clk, unsigned long rate); - int (*clk_set_rate) (struct clk *clk, unsigned long rate); - int (*clk_set_parent) (struct clk *clk, struct clk *parent); - struct clk* (*clk_get_parent) (struct clk *clk); -}; - -extern struct clk_interface clk_functions; - -#endif /* __ASM_POWERPC_CLK_INTERFACE_H */ diff --git a/include/asm-powerpc/code-patching.h b/include/asm-powerpc/code-patching.h deleted file mode 100644 index 107d9b9..0000000 --- a/include/asm-powerpc/code-patching.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef _ASM_POWERPC_CODE_PATCHING_H -#define _ASM_POWERPC_CODE_PATCHING_H - -/* - * Copyright 2008, Michael Ellerman, IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - -#define PPC_NOP_INSTR 0x60000000 -#define PPC_LWSYNC_INSTR 0x7c2004ac - -/* Flags for create_branch: - * "b" == create_branch(addr, target, 0); - * "ba" == create_branch(addr, target, BRANCH_ABSOLUTE); - * "bl" == create_branch(addr, target, BRANCH_SET_LINK); - * "bla" == create_branch(addr, target, BRANCH_ABSOLUTE | BRANCH_SET_LINK); - */ -#define BRANCH_SET_LINK 0x1 -#define BRANCH_ABSOLUTE 0x2 - -unsigned int create_branch(const unsigned int *addr, - unsigned long target, int flags); -unsigned int create_cond_branch(const unsigned int *addr, - unsigned long target, int flags); -void patch_branch(unsigned int *addr, unsigned long target, int flags); -void patch_instruction(unsigned int *addr, unsigned int instr); - -int instr_is_relative_branch(unsigned int instr); -int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr); -unsigned long branch_target(const unsigned int *instr); -unsigned int translate_branch(const unsigned int *dest, - const unsigned int *src); - -static inline unsigned long ppc_function_entry(void *func) -{ -#ifdef CONFIG_PPC64 - /* - * On PPC64 the function pointer actually points to the function's - * descriptor. The first entry in the descriptor is the address - * of the function text. - */ - return ((func_descr_t *)func)->entry; -#else - return (unsigned long)func; -#endif -} - -#endif /* _ASM_POWERPC_CODE_PATCHING_H */ diff --git a/include/asm-powerpc/compat.h b/include/asm-powerpc/compat.h deleted file mode 100644 index d811a8c..0000000 --- a/include/asm-powerpc/compat.h +++ /dev/null @@ -1,214 +0,0 @@ -#ifndef _ASM_POWERPC_COMPAT_H -#define _ASM_POWERPC_COMPAT_H -#ifdef __KERNEL__ -/* - * Architecture specific compatibility types - */ -#include -#include - -#define COMPAT_USER_HZ 100 - -typedef u32 compat_size_t; -typedef s32 compat_ssize_t; -typedef s32 compat_time_t; -typedef s32 compat_clock_t; -typedef s32 compat_pid_t; -typedef u32 __compat_uid_t; -typedef u32 __compat_gid_t; -typedef u32 __compat_uid32_t; -typedef u32 __compat_gid32_t; -typedef u32 compat_mode_t; -typedef u32 compat_ino_t; -typedef u32 compat_dev_t; -typedef s32 compat_off_t; -typedef s64 compat_loff_t; -typedef s16 compat_nlink_t; -typedef u16 compat_ipc_pid_t; -typedef s32 compat_daddr_t; -typedef u32 compat_caddr_t; -typedef __kernel_fsid_t compat_fsid_t; -typedef s32 compat_key_t; -typedef s32 compat_timer_t; - -typedef s32 compat_int_t; -typedef s32 compat_long_t; -typedef s64 compat_s64; -typedef u32 compat_uint_t; -typedef u32 compat_ulong_t; -typedef u64 compat_u64; - -struct compat_timespec { - compat_time_t tv_sec; - s32 tv_nsec; -}; - -struct compat_timeval { - compat_time_t tv_sec; - s32 tv_usec; -}; - -struct compat_stat { - compat_dev_t st_dev; - compat_ino_t st_ino; - compat_mode_t st_mode; - compat_nlink_t st_nlink; - __compat_uid32_t st_uid; - __compat_gid32_t st_gid; - compat_dev_t st_rdev; - compat_off_t st_size; - compat_off_t st_blksize; - compat_off_t st_blocks; - compat_time_t st_atime; - u32 st_atime_nsec; - compat_time_t st_mtime; - u32 st_mtime_nsec; - compat_time_t st_ctime; - u32 st_ctime_nsec; - u32 __unused4[2]; -}; - -struct compat_flock { - short l_type; - short l_whence; - compat_off_t l_start; - compat_off_t l_len; - compat_pid_t l_pid; -}; - -#define F_GETLK64 12 /* using 'struct flock64' */ -#define F_SETLK64 13 -#define F_SETLKW64 14 - -struct compat_flock64 { - short l_type; - short l_whence; - compat_loff_t l_start; - compat_loff_t l_len; - compat_pid_t l_pid; -}; - -struct compat_statfs { - int f_type; - int f_bsize; - int f_blocks; - int f_bfree; - int f_bavail; - int f_files; - int f_ffree; - compat_fsid_t f_fsid; - int f_namelen; /* SunOS ignores this field. */ - int f_frsize; - int f_spare[5]; -}; - -#define COMPAT_RLIM_OLD_INFINITY 0x7fffffff -#define COMPAT_RLIM_INFINITY 0xffffffff - -typedef u32 compat_old_sigset_t; - -#define _COMPAT_NSIG 64 -#define _COMPAT_NSIG_BPW 32 - -typedef u32 compat_sigset_word; - -#define COMPAT_OFF_T_MAX 0x7fffffff -#define COMPAT_LOFF_T_MAX 0x7fffffffffffffffL - -/* - * A pointer passed in from user mode. This should not - * be used for syscall parameters, just declare them - * as pointers because the syscall entry code will have - * appropriately converted them already. - */ -typedef u32 compat_uptr_t; - -static inline void __user *compat_ptr(compat_uptr_t uptr) -{ - return (void __user *)(unsigned long)uptr; -} - -static inline compat_uptr_t ptr_to_compat(void __user *uptr) -{ - return (u32)(unsigned long)uptr; -} - -static inline void __user *compat_alloc_user_space(long len) -{ - struct pt_regs *regs = current->thread.regs; - unsigned long usp = regs->gpr[1]; - - /* - * We cant access below the stack pointer in the 32bit ABI and - * can access 288 bytes in the 64bit ABI - */ - if (!(test_thread_flag(TIF_32BIT))) - usp -= 288; - - return (void __user *) (usp - len); -} - -/* - * ipc64_perm is actually 32/64bit clean but since the compat layer refers to - * it we may as well define it. - */ -struct compat_ipc64_perm { - compat_key_t key; - __compat_uid_t uid; - __compat_gid_t gid; - __compat_uid_t cuid; - __compat_gid_t cgid; - compat_mode_t mode; - unsigned int seq; - unsigned int __pad2; - unsigned long __unused1; /* yes they really are 64bit pads */ - unsigned long __unused2; -}; - -struct compat_semid64_ds { - struct compat_ipc64_perm sem_perm; - unsigned int __unused1; - compat_time_t sem_otime; - unsigned int __unused2; - compat_time_t sem_ctime; - compat_ulong_t sem_nsems; - compat_ulong_t __unused3; - compat_ulong_t __unused4; -}; - -struct compat_msqid64_ds { - struct compat_ipc64_perm msg_perm; - unsigned int __unused1; - compat_time_t msg_stime; - unsigned int __unused2; - compat_time_t msg_rtime; - unsigned int __unused3; - compat_time_t msg_ctime; - compat_ulong_t msg_cbytes; - compat_ulong_t msg_qnum; - compat_ulong_t msg_qbytes; - compat_pid_t msg_lspid; - compat_pid_t msg_lrpid; - compat_ulong_t __unused4; - compat_ulong_t __unused5; -}; - -struct compat_shmid64_ds { - struct compat_ipc64_perm shm_perm; - unsigned int __unused1; - compat_time_t shm_atime; - unsigned int __unused2; - compat_time_t shm_dtime; - unsigned int __unused3; - compat_time_t shm_ctime; - unsigned int __unused4; - compat_size_t shm_segsz; - compat_pid_t shm_cpid; - compat_pid_t shm_lpid; - compat_ulong_t shm_nattch; - compat_ulong_t __unused5; - compat_ulong_t __unused6; -}; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_COMPAT_H */ diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h deleted file mode 100644 index 24d79e3..0000000 --- a/include/asm-powerpc/cpm.h +++ /dev/null @@ -1,106 +0,0 @@ -#ifndef __CPM_H -#define __CPM_H - -#include -#include -#include - -/* Opcodes common to CPM1 and CPM2 -*/ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_GRA_STOP_TX ((ushort)0x0005) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_CLOSE_RX_BD ((ushort)0x0007) -#define CPM_CR_SET_GADDR ((ushort)0x0008) -#define CPM_CR_SET_TIMER ((ushort)0x0008) -#define CPM_CR_STOP_IDMA ((ushort)0x000b) - -/* Buffer descriptors used by many of the CPM protocols. */ -typedef struct cpm_buf_desc { - ushort cbd_sc; /* Status and Control */ - ushort cbd_datlen; /* Data length in buffer */ - uint cbd_bufaddr; /* Buffer address in host memory */ -} cbd_t; - -/* Buffer descriptor control/status used by serial - */ - -#define BD_SC_EMPTY (0x8000) /* Receive is empty */ -#define BD_SC_READY (0x8000) /* Transmit is ready */ -#define BD_SC_WRAP (0x2000) /* Last buffer descriptor */ -#define BD_SC_INTRPT (0x1000) /* Interrupt on change */ -#define BD_SC_LAST (0x0800) /* Last buffer in frame */ -#define BD_SC_TC (0x0400) /* Transmit CRC */ -#define BD_SC_CM (0x0200) /* Continous mode */ -#define BD_SC_ID (0x0100) /* Rec'd too many idles */ -#define BD_SC_P (0x0100) /* xmt preamble */ -#define BD_SC_BR (0x0020) /* Break received */ -#define BD_SC_FR (0x0010) /* Framing error */ -#define BD_SC_PR (0x0008) /* Parity error */ -#define BD_SC_NAK (0x0004) /* NAK - did not respond */ -#define BD_SC_OV (0x0002) /* Overrun */ -#define BD_SC_UN (0x0002) /* Underrun */ -#define BD_SC_CD (0x0001) /* */ -#define BD_SC_CL (0x0001) /* Collision */ - -/* Buffer descriptor control/status used by Ethernet receive. - * Common to SCC and FCC. - */ -#define BD_ENET_RX_EMPTY (0x8000) -#define BD_ENET_RX_WRAP (0x2000) -#define BD_ENET_RX_INTR (0x1000) -#define BD_ENET_RX_LAST (0x0800) -#define BD_ENET_RX_FIRST (0x0400) -#define BD_ENET_RX_MISS (0x0100) -#define BD_ENET_RX_BC (0x0080) /* FCC Only */ -#define BD_ENET_RX_MC (0x0040) /* FCC Only */ -#define BD_ENET_RX_LG (0x0020) -#define BD_ENET_RX_NO (0x0010) -#define BD_ENET_RX_SH (0x0008) -#define BD_ENET_RX_CR (0x0004) -#define BD_ENET_RX_OV (0x0002) -#define BD_ENET_RX_CL (0x0001) -#define BD_ENET_RX_STATS (0x01ff) /* All status bits */ - -/* Buffer descriptor control/status used by Ethernet transmit. - * Common to SCC and FCC. - */ -#define BD_ENET_TX_READY (0x8000) -#define BD_ENET_TX_PAD (0x4000) -#define BD_ENET_TX_WRAP (0x2000) -#define BD_ENET_TX_INTR (0x1000) -#define BD_ENET_TX_LAST (0x0800) -#define BD_ENET_TX_TC (0x0400) -#define BD_ENET_TX_DEF (0x0200) -#define BD_ENET_TX_HB (0x0100) -#define BD_ENET_TX_LC (0x0080) -#define BD_ENET_TX_RL (0x0040) -#define BD_ENET_TX_RCMASK (0x003c) -#define BD_ENET_TX_UN (0x0002) -#define BD_ENET_TX_CSL (0x0001) -#define BD_ENET_TX_STATS (0x03ff) /* All status bits */ - -/* Buffer descriptor control/status used by Transparent mode SCC. - */ -#define BD_SCC_TX_LAST (0x0800) - -/* Buffer descriptor control/status used by I2C. - */ -#define BD_I2C_START (0x0400) - -int cpm_muram_init(void); -unsigned long cpm_muram_alloc(unsigned long size, unsigned long align); -int cpm_muram_free(unsigned long offset); -unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size); -void __iomem *cpm_muram_addr(unsigned long offset); -unsigned long cpm_muram_offset(void __iomem *addr); -dma_addr_t cpm_muram_dma(void __iomem *addr); -int cpm_command(u32 command, u8 opcode); - -int cpm2_gpiochip_add32(struct device_node *np); - -#endif diff --git a/include/asm-powerpc/cpm1.h b/include/asm-powerpc/cpm1.h deleted file mode 100644 index 2ff79874..0000000 --- a/include/asm-powerpc/cpm1.h +++ /dev/null @@ -1,652 +0,0 @@ -/* - * MPC8xx Communication Processor Module. - * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) - * - * This file contains structures and information for the communication - * processor channels. Some CPM control and status is available - * throught the MPC8xx internal memory map. See immap.h for details. - * This file only contains what I need for the moment, not the total - * CPM capabilities. I (or someone else) will add definitions as they - * are needed. -- Dan - * - * On the MBX board, EPPC-Bug loads CPM microcode into the first 512 - * bytes of the DP RAM and relocates the I2C parameter area to the - * IDMA1 space. The remaining DP RAM is available for buffer descriptors - * or other use. - */ -#ifndef __CPM1__ -#define __CPM1__ - -#include -#include -#include - -/* CPM Command register. -*/ -#define CPM_CR_RST ((ushort)0x8000) -#define CPM_CR_OPCODE ((ushort)0x0f00) -#define CPM_CR_CHAN ((ushort)0x00f0) -#define CPM_CR_FLG ((ushort)0x0001) - -/* Channel numbers. -*/ -#define CPM_CR_CH_SCC1 ((ushort)0x0000) -#define CPM_CR_CH_I2C ((ushort)0x0001) /* I2C and IDMA1 */ -#define CPM_CR_CH_SCC2 ((ushort)0x0004) -#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / IDMA2 / Timers */ -#define CPM_CR_CH_TIMER CPM_CR_CH_SPI -#define CPM_CR_CH_SCC3 ((ushort)0x0008) -#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / DSP1 */ -#define CPM_CR_CH_SCC4 ((ushort)0x000c) -#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / DSP2 */ - -#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4)) - -/* Export the base address of the communication processor registers - * and dual port ram. - */ -extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */ - -#define cpm_dpalloc cpm_muram_alloc -#define cpm_dpfree cpm_muram_free -#define cpm_dpram_addr cpm_muram_addr -#define cpm_dpram_phys cpm_muram_dma - -extern void cpm_setbrg(uint brg, uint rate); - -extern void cpm_load_patch(cpm8xx_t *cp); - -extern void cpm_reset(void); - -/* Parameter RAM offsets. -*/ -#define PROFF_SCC1 ((uint)0x0000) -#define PROFF_IIC ((uint)0x0080) -#define PROFF_SCC2 ((uint)0x0100) -#define PROFF_SPI ((uint)0x0180) -#define PROFF_SCC3 ((uint)0x0200) -#define PROFF_SMC1 ((uint)0x0280) -#define PROFF_SCC4 ((uint)0x0300) -#define PROFF_SMC2 ((uint)0x0380) - -/* Define enough so I can at least use the serial port as a UART. - * The MBX uses SMC1 as the host serial port. - */ -typedef struct smc_uart { - ushort smc_rbase; /* Rx Buffer descriptor base address */ - ushort smc_tbase; /* Tx Buffer descriptor base address */ - u_char smc_rfcr; /* Rx function code */ - u_char smc_tfcr; /* Tx function code */ - ushort smc_mrblr; /* Max receive buffer length */ - uint smc_rstate; /* Internal */ - uint smc_idp; /* Internal */ - ushort smc_rbptr; /* Internal */ - ushort smc_ibc; /* Internal */ - uint smc_rxtmp; /* Internal */ - uint smc_tstate; /* Internal */ - uint smc_tdp; /* Internal */ - ushort smc_tbptr; /* Internal */ - ushort smc_tbc; /* Internal */ - uint smc_txtmp; /* Internal */ - ushort smc_maxidl; /* Maximum idle characters */ - ushort smc_tmpidl; /* Temporary idle counter */ - ushort smc_brklen; /* Last received break length */ - ushort smc_brkec; /* rcv'd break condition counter */ - ushort smc_brkcr; /* xmt break count register */ - ushort smc_rmask; /* Temporary bit mask */ - char res1[8]; /* Reserved */ - ushort smc_rpbase; /* Relocation pointer */ -} smc_uart_t; - -/* Function code bits. -*/ -#define SMC_EB ((u_char)0x10) /* Set big endian byte order */ - -/* SMC uart mode register. -*/ -#define SMCMR_REN ((ushort)0x0001) -#define SMCMR_TEN ((ushort)0x0002) -#define SMCMR_DM ((ushort)0x000c) -#define SMCMR_SM_GCI ((ushort)0x0000) -#define SMCMR_SM_UART ((ushort)0x0020) -#define SMCMR_SM_TRANS ((ushort)0x0030) -#define SMCMR_SM_MASK ((ushort)0x0030) -#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */ -#define SMCMR_REVD SMCMR_PM_EVEN -#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */ -#define SMCMR_BS SMCMR_PEN -#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */ -#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */ -#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK) - -/* SMC2 as Centronics parallel printer. It is half duplex, in that - * it can only receive or transmit. The parameter ram values for - * each direction are either unique or properly overlap, so we can - * include them in one structure. - */ -typedef struct smc_centronics { - ushort scent_rbase; - ushort scent_tbase; - u_char scent_cfcr; - u_char scent_smask; - ushort scent_mrblr; - uint scent_rstate; - uint scent_r_ptr; - ushort scent_rbptr; - ushort scent_r_cnt; - uint scent_rtemp; - uint scent_tstate; - uint scent_t_ptr; - ushort scent_tbptr; - ushort scent_t_cnt; - uint scent_ttemp; - ushort scent_max_sl; - ushort scent_sl_cnt; - ushort scent_character1; - ushort scent_character2; - ushort scent_character3; - ushort scent_character4; - ushort scent_character5; - ushort scent_character6; - ushort scent_character7; - ushort scent_character8; - ushort scent_rccm; - ushort scent_rccr; -} smc_cent_t; - -/* Centronics Status Mask Register. -*/ -#define SMC_CENT_F ((u_char)0x08) -#define SMC_CENT_PE ((u_char)0x04) -#define SMC_CENT_S ((u_char)0x02) - -/* SMC Event and Mask register. -*/ -#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */ -#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */ -#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */ -#define SMCM_BSY ((unsigned char)0x04) -#define SMCM_TX ((unsigned char)0x02) -#define SMCM_RX ((unsigned char)0x01) - -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - -/* SI Clock Route Register -*/ -#define SICR_RCLK_SCC1_BRG1 ((uint)0x00000000) -#define SICR_TCLK_SCC1_BRG1 ((uint)0x00000000) -#define SICR_RCLK_SCC2_BRG2 ((uint)0x00000800) -#define SICR_TCLK_SCC2_BRG2 ((uint)0x00000100) -#define SICR_RCLK_SCC3_BRG3 ((uint)0x00100000) -#define SICR_TCLK_SCC3_BRG3 ((uint)0x00020000) -#define SICR_RCLK_SCC4_BRG4 ((uint)0x18000000) -#define SICR_TCLK_SCC4_BRG4 ((uint)0x03000000) - -/* SCCs. -*/ -#define SCC_GSMRH_IRP ((uint)0x00040000) -#define SCC_GSMRH_GDE ((uint)0x00010000) -#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) -#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) -#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) -#define SCC_GSMRH_REVD ((uint)0x00002000) -#define SCC_GSMRH_TRX ((uint)0x00001000) -#define SCC_GSMRH_TTX ((uint)0x00000800) -#define SCC_GSMRH_CDP ((uint)0x00000400) -#define SCC_GSMRH_CTSP ((uint)0x00000200) -#define SCC_GSMRH_CDS ((uint)0x00000100) -#define SCC_GSMRH_CTSS ((uint)0x00000080) -#define SCC_GSMRH_TFL ((uint)0x00000040) -#define SCC_GSMRH_RFW ((uint)0x00000020) -#define SCC_GSMRH_TXSY ((uint)0x00000010) -#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) -#define SCC_GSMRH_SYNL8 ((uint)0x00000008) -#define SCC_GSMRH_SYNL4 ((uint)0x00000004) -#define SCC_GSMRH_RTSM ((uint)0x00000002) -#define SCC_GSMRH_RSYN ((uint)0x00000001) - -#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ -#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) -#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) -#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) -#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) -#define SCC_GSMRL_TCI ((uint)0x10000000) -#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) -#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) -#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) -#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) -#define SCC_GSMRL_RINV ((uint)0x02000000) -#define SCC_GSMRL_TINV ((uint)0x01000000) -#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) -#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) -#define SCC_GSMRL_TPL_48 ((uint)0x00800000) -#define SCC_GSMRL_TPL_32 ((uint)0x00600000) -#define SCC_GSMRL_TPL_16 ((uint)0x00400000) -#define SCC_GSMRL_TPL_8 ((uint)0x00200000) -#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) -#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) -#define SCC_GSMRL_TPP_01 ((uint)0x00100000) -#define SCC_GSMRL_TPP_10 ((uint)0x00080000) -#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) -#define SCC_GSMRL_TEND ((uint)0x00040000) -#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) -#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) -#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) -#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) -#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) -#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) -#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) -#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) -#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) -#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) -#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) -#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) -#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) -#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) -#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ -#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) -#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) -#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) -#define SCC_GSMRL_ENR ((uint)0x00000020) -#define SCC_GSMRL_ENT ((uint)0x00000010) -#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) -#define SCC_GSMRL_MODE_QMC ((uint)0x0000000a) -#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) -#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) -#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) -#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) -#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) -#define SCC_GSMRL_MODE_UART ((uint)0x00000004) -#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) -#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) -#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) - -#define SCC_TODR_TOD ((ushort)0x8000) - -/* SCC Event and Mask register. -*/ -#define SCCM_TXE ((unsigned char)0x10) -#define SCCM_BSY ((unsigned char)0x04) -#define SCCM_TX ((unsigned char)0x02) -#define SCCM_RX ((unsigned char)0x01) - -typedef struct scc_param { - ushort scc_rbase; /* Rx Buffer descriptor base address */ - ushort scc_tbase; /* Tx Buffer descriptor base address */ - u_char scc_rfcr; /* Rx function code */ - u_char scc_tfcr; /* Tx function code */ - ushort scc_mrblr; /* Max receive buffer length */ - uint scc_rstate; /* Internal */ - uint scc_idp; /* Internal */ - ushort scc_rbptr; /* Internal */ - ushort scc_ibc; /* Internal */ - uint scc_rxtmp; /* Internal */ - uint scc_tstate; /* Internal */ - uint scc_tdp; /* Internal */ - ushort scc_tbptr; /* Internal */ - ushort scc_tbc; /* Internal */ - uint scc_txtmp; /* Internal */ - uint scc_rcrc; /* Internal */ - uint scc_tcrc; /* Internal */ -} sccp_t; - -/* Function code bits. -*/ -#define SCC_EB ((u_char)0x10) /* Set big endian byte order */ - -/* CPM Ethernet through SCCx. - */ -typedef struct scc_enet { - sccp_t sen_genscc; - uint sen_cpres; /* Preset CRC */ - uint sen_cmask; /* Constant mask for CRC */ - uint sen_crcec; /* CRC Error counter */ - uint sen_alec; /* alignment error counter */ - uint sen_disfc; /* discard frame counter */ - ushort sen_pads; /* Tx short frame pad character */ - ushort sen_retlim; /* Retry limit threshold */ - ushort sen_retcnt; /* Retry limit counter */ - ushort sen_maxflr; /* maximum frame length register */ - ushort sen_minflr; /* minimum frame length register */ - ushort sen_maxd1; /* maximum DMA1 length */ - ushort sen_maxd2; /* maximum DMA2 length */ - ushort sen_maxd; /* Rx max DMA */ - ushort sen_dmacnt; /* Rx DMA counter */ - ushort sen_maxb; /* Max BD byte count */ - ushort sen_gaddr1; /* Group address filter */ - ushort sen_gaddr2; - ushort sen_gaddr3; - ushort sen_gaddr4; - uint sen_tbuf0data0; /* Save area 0 - current frame */ - uint sen_tbuf0data1; /* Save area 1 - current frame */ - uint sen_tbuf0rba; /* Internal */ - uint sen_tbuf0crc; /* Internal */ - ushort sen_tbuf0bcnt; /* Internal */ - ushort sen_paddrh; /* physical address (MSB) */ - ushort sen_paddrm; - ushort sen_paddrl; /* physical address (LSB) */ - ushort sen_pper; /* persistence */ - ushort sen_rfbdptr; /* Rx first BD pointer */ - ushort sen_tfbdptr; /* Tx first BD pointer */ - ushort sen_tlbdptr; /* Tx last BD pointer */ - uint sen_tbuf1data0; /* Save area 0 - current frame */ - uint sen_tbuf1data1; /* Save area 1 - current frame */ - uint sen_tbuf1rba; /* Internal */ - uint sen_tbuf1crc; /* Internal */ - ushort sen_tbuf1bcnt; /* Internal */ - ushort sen_txlen; /* Tx Frame length counter */ - ushort sen_iaddr1; /* Individual address filter */ - ushort sen_iaddr2; - ushort sen_iaddr3; - ushort sen_iaddr4; - ushort sen_boffcnt; /* Backoff counter */ - - /* NOTE: Some versions of the manual have the following items - * incorrectly documented. Below is the proper order. - */ - ushort sen_taddrh; /* temp address (MSB) */ - ushort sen_taddrm; - ushort sen_taddrl; /* temp address (LSB) */ -} scc_enet_t; - -/* SCC Event register as used by Ethernet. -*/ -#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ -#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* SCC Mode Register (PMSR) as used by Ethernet. -*/ -#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */ -#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */ -#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */ -#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */ -#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ -#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */ -#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ -#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */ -#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */ -#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */ -#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */ -#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ -#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ - -/* SCC as UART -*/ -typedef struct scc_uart { - sccp_t scc_genscc; - char res1[8]; /* Reserved */ - ushort scc_maxidl; /* Maximum idle chars */ - ushort scc_idlc; /* temp idle counter */ - ushort scc_brkcr; /* Break count register */ - ushort scc_parec; /* receive parity error counter */ - ushort scc_frmec; /* receive framing error counter */ - ushort scc_nosec; /* receive noise counter */ - ushort scc_brkec; /* receive break condition counter */ - ushort scc_brkln; /* last received break length */ - ushort scc_uaddr1; /* UART address character 1 */ - ushort scc_uaddr2; /* UART address character 2 */ - ushort scc_rtemp; /* Temp storage */ - ushort scc_toseq; /* Transmit out of sequence char */ - ushort scc_char1; /* control character 1 */ - ushort scc_char2; /* control character 2 */ - ushort scc_char3; /* control character 3 */ - ushort scc_char4; /* control character 4 */ - ushort scc_char5; /* control character 5 */ - ushort scc_char6; /* control character 6 */ - ushort scc_char7; /* control character 7 */ - ushort scc_char8; /* control character 8 */ - ushort scc_rccm; /* receive control character mask */ - ushort scc_rccr; /* receive control character register */ - ushort scc_rlbc; /* receive last break character */ -} scc_uart_t; - -/* SCC Event and Mask registers when it is used as a UART. -*/ -#define UART_SCCM_GLR ((ushort)0x1000) -#define UART_SCCM_GLT ((ushort)0x0800) -#define UART_SCCM_AB ((ushort)0x0200) -#define UART_SCCM_IDL ((ushort)0x0100) -#define UART_SCCM_GRA ((ushort)0x0080) -#define UART_SCCM_BRKE ((ushort)0x0040) -#define UART_SCCM_BRKS ((ushort)0x0020) -#define UART_SCCM_CCR ((ushort)0x0008) -#define UART_SCCM_BSY ((ushort)0x0004) -#define UART_SCCM_TX ((ushort)0x0002) -#define UART_SCCM_RX ((ushort)0x0001) - -/* The SCC PMSR when used as a UART. -*/ -#define SCU_PSMR_FLC ((ushort)0x8000) -#define SCU_PSMR_SL ((ushort)0x4000) -#define SCU_PSMR_CL ((ushort)0x3000) -#define SCU_PSMR_UM ((ushort)0x0c00) -#define SCU_PSMR_FRZ ((ushort)0x0200) -#define SCU_PSMR_RZS ((ushort)0x0100) -#define SCU_PSMR_SYN ((ushort)0x0080) -#define SCU_PSMR_DRT ((ushort)0x0040) -#define SCU_PSMR_PEN ((ushort)0x0010) -#define SCU_PSMR_RPM ((ushort)0x000c) -#define SCU_PSMR_REVP ((ushort)0x0008) -#define SCU_PSMR_TPM ((ushort)0x0003) -#define SCU_PSMR_TEVP ((ushort)0x0002) - -/* CPM Transparent mode SCC. - */ -typedef struct scc_trans { - sccp_t st_genscc; - uint st_cpres; /* Preset CRC */ - uint st_cmask; /* Constant mask for CRC */ -} scc_trans_t; - -/* IIC parameter RAM. -*/ -typedef struct iic { - ushort iic_rbase; /* Rx Buffer descriptor base address */ - ushort iic_tbase; /* Tx Buffer descriptor base address */ - u_char iic_rfcr; /* Rx function code */ - u_char iic_tfcr; /* Tx function code */ - ushort iic_mrblr; /* Max receive buffer length */ - uint iic_rstate; /* Internal */ - uint iic_rdp; /* Internal */ - ushort iic_rbptr; /* Internal */ - ushort iic_rbc; /* Internal */ - uint iic_rxtmp; /* Internal */ - uint iic_tstate; /* Internal */ - uint iic_tdp; /* Internal */ - ushort iic_tbptr; /* Internal */ - ushort iic_tbc; /* Internal */ - uint iic_txtmp; /* Internal */ - char res1[4]; /* Reserved */ - ushort iic_rpbase; /* Relocation pointer */ - char res2[2]; /* Reserved */ -} iic_t; - -/* SPI parameter RAM. -*/ -typedef struct spi { - ushort spi_rbase; /* Rx Buffer descriptor base address */ - ushort spi_tbase; /* Tx Buffer descriptor base address */ - u_char spi_rfcr; /* Rx function code */ - u_char spi_tfcr; /* Tx function code */ - ushort spi_mrblr; /* Max receive buffer length */ - uint spi_rstate; /* Internal */ - uint spi_rdp; /* Internal */ - ushort spi_rbptr; /* Internal */ - ushort spi_rbc; /* Internal */ - uint spi_rxtmp; /* Internal */ - uint spi_tstate; /* Internal */ - uint spi_tdp; /* Internal */ - ushort spi_tbptr; /* Internal */ - ushort spi_tbc; /* Internal */ - uint spi_txtmp; /* Internal */ - uint spi_res; - ushort spi_rpbase; /* Relocation pointer */ - ushort spi_res2; -} spi_t; - -/* SPI Mode register. -*/ -#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ -#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ -#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ -#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ -#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ -#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ -#define SPMODE_EN ((ushort)0x0100) /* Enable */ -#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ -#define SPMODE_LEN4 ((ushort)0x0030) /* 4 bits per char */ -#define SPMODE_LEN8 ((ushort)0x0070) /* 8 bits per char */ -#define SPMODE_LEN16 ((ushort)0x00f0) /* 16 bits per char */ -#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ - -/* SPIE fields */ -#define SPIE_MME 0x20 -#define SPIE_TXE 0x10 -#define SPIE_BSY 0x04 -#define SPIE_TXB 0x02 -#define SPIE_RXB 0x01 - -/* - * RISC Controller Configuration Register definitons - */ -#define RCCR_TIME 0x8000 /* RISC Timer Enable */ -#define RCCR_TIMEP(t) (((t) & 0x3F)<<8) /* RISC Timer Period */ -#define RCCR_TIME_MASK 0x00FF /* not RISC Timer related bits */ - -/* RISC Timer Parameter RAM offset */ -#define PROFF_RTMR ((uint)0x01B0) - -typedef struct risc_timer_pram { - unsigned short tm_base; /* RISC Timer Table Base Address */ - unsigned short tm_ptr; /* RISC Timer Table Pointer (internal) */ - unsigned short r_tmr; /* RISC Timer Mode Register */ - unsigned short r_tmv; /* RISC Timer Valid Register */ - unsigned long tm_cmd; /* RISC Timer Command Register */ - unsigned long tm_cnt; /* RISC Timer Internal Count */ -} rt_pram_t; - -/* Bits in RISC Timer Command Register */ -#define TM_CMD_VALID 0x80000000 /* Valid - Enables the timer */ -#define TM_CMD_RESTART 0x40000000 /* Restart - for automatic restart */ -#define TM_CMD_PWM 0x20000000 /* Run in Pulse Width Modulation Mode */ -#define TM_CMD_NUM(n) (((n)&0xF)<<16) /* Timer Number */ -#define TM_CMD_PERIOD(p) ((p)&0xFFFF) /* Timer Period */ - -/* CPM interrupts. There are nearly 32 interrupts generated by CPM - * channels or devices. All of these are presented to the PPC core - * as a single interrupt. The CPM interrupt handler dispatches its - * own handlers, in a similar fashion to the PPC core handler. We - * use the table as defined in the manuals (i.e. no special high - * priority and SCC1 == SCCa, etc...). - */ -#define CPMVEC_NR 32 -#define CPMVEC_PIO_PC15 ((ushort)0x1f) -#define CPMVEC_SCC1 ((ushort)0x1e) -#define CPMVEC_SCC2 ((ushort)0x1d) -#define CPMVEC_SCC3 ((ushort)0x1c) -#define CPMVEC_SCC4 ((ushort)0x1b) -#define CPMVEC_PIO_PC14 ((ushort)0x1a) -#define CPMVEC_TIMER1 ((ushort)0x19) -#define CPMVEC_PIO_PC13 ((ushort)0x18) -#define CPMVEC_PIO_PC12 ((ushort)0x17) -#define CPMVEC_SDMA_CB_ERR ((ushort)0x16) -#define CPMVEC_IDMA1 ((ushort)0x15) -#define CPMVEC_IDMA2 ((ushort)0x14) -#define CPMVEC_TIMER2 ((ushort)0x12) -#define CPMVEC_RISCTIMER ((ushort)0x11) -#define CPMVEC_I2C ((ushort)0x10) -#define CPMVEC_PIO_PC11 ((ushort)0x0f) -#define CPMVEC_PIO_PC10 ((ushort)0x0e) -#define CPMVEC_TIMER3 ((ushort)0x0c) -#define CPMVEC_PIO_PC9 ((ushort)0x0b) -#define CPMVEC_PIO_PC8 ((ushort)0x0a) -#define CPMVEC_PIO_PC7 ((ushort)0x09) -#define CPMVEC_TIMER4 ((ushort)0x07) -#define CPMVEC_PIO_PC6 ((ushort)0x06) -#define CPMVEC_SPI ((ushort)0x05) -#define CPMVEC_SMC1 ((ushort)0x04) -#define CPMVEC_SMC2 ((ushort)0x03) -#define CPMVEC_PIO_PC5 ((ushort)0x02) -#define CPMVEC_PIO_PC4 ((ushort)0x01) -#define CPMVEC_ERROR ((ushort)0x00) - -/* CPM interrupt configuration vector. -*/ -#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */ -#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ -#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ -#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ -#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */ -#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ -#define CICR_IEN ((uint)0x00000080) /* Int. enable */ -#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ - -#define IMAP_ADDR (get_immrbase()) - -#define CPM_PIN_INPUT 0 -#define CPM_PIN_OUTPUT 1 -#define CPM_PIN_PRIMARY 0 -#define CPM_PIN_SECONDARY 2 -#define CPM_PIN_GPIO 4 -#define CPM_PIN_OPENDRAIN 8 - -enum cpm_port { - CPM_PORTA, - CPM_PORTB, - CPM_PORTC, - CPM_PORTD, - CPM_PORTE, -}; - -void cpm1_set_pin(enum cpm_port port, int pin, int flags); - -enum cpm_clk_dir { - CPM_CLK_RX, - CPM_CLK_TX, - CPM_CLK_RTX -}; - -enum cpm_clk_target { - CPM_CLK_SCC1, - CPM_CLK_SCC2, - CPM_CLK_SCC3, - CPM_CLK_SCC4, - CPM_CLK_SMC1, - CPM_CLK_SMC2, -}; - -enum cpm_clk { - CPM_BRG1, /* Baud Rate Generator 1 */ - CPM_BRG2, /* Baud Rate Generator 2 */ - CPM_BRG3, /* Baud Rate Generator 3 */ - CPM_BRG4, /* Baud Rate Generator 4 */ - CPM_CLK1, /* Clock 1 */ - CPM_CLK2, /* Clock 2 */ - CPM_CLK3, /* Clock 3 */ - CPM_CLK4, /* Clock 4 */ - CPM_CLK5, /* Clock 5 */ - CPM_CLK6, /* Clock 6 */ - CPM_CLK7, /* Clock 7 */ - CPM_CLK8, /* Clock 8 */ -}; - -int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode); - -#endif /* __CPM1__ */ diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h deleted file mode 100644 index 2a6fa01..0000000 --- a/include/asm-powerpc/cpm2.h +++ /dev/null @@ -1,1195 +0,0 @@ -/* - * Communication Processor Module v2. - * - * This file contains structures and information for the communication - * processor channels found in the dual port RAM or parameter RAM. - * All CPM control and status is available through the CPM2 internal - * memory map. See immap_cpm2.h for details. - */ -#ifdef __KERNEL__ -#ifndef __CPM2__ -#define __CPM2__ - -#include -#include -#include - -#ifdef CONFIG_PPC_85xx -#define CPM_MAP_ADDR (get_immrbase() + 0x80000) -#endif - -/* CPM Command register. -*/ -#define CPM_CR_RST ((uint)0x80000000) -#define CPM_CR_PAGE ((uint)0x7c000000) -#define CPM_CR_SBLOCK ((uint)0x03e00000) -#define CPM_CR_FLG ((uint)0x00010000) -#define CPM_CR_MCN ((uint)0x00003fc0) -#define CPM_CR_OPCODE ((uint)0x0000000f) - -/* Device sub-block and page codes. -*/ -#define CPM_CR_SCC1_SBLOCK (0x04) -#define CPM_CR_SCC2_SBLOCK (0x05) -#define CPM_CR_SCC3_SBLOCK (0x06) -#define CPM_CR_SCC4_SBLOCK (0x07) -#define CPM_CR_SMC1_SBLOCK (0x08) -#define CPM_CR_SMC2_SBLOCK (0x09) -#define CPM_CR_SPI_SBLOCK (0x0a) -#define CPM_CR_I2C_SBLOCK (0x0b) -#define CPM_CR_TIMER_SBLOCK (0x0f) -#define CPM_CR_RAND_SBLOCK (0x0e) -#define CPM_CR_FCC1_SBLOCK (0x10) -#define CPM_CR_FCC2_SBLOCK (0x11) -#define CPM_CR_FCC3_SBLOCK (0x12) -#define CPM_CR_IDMA1_SBLOCK (0x14) -#define CPM_CR_IDMA2_SBLOCK (0x15) -#define CPM_CR_IDMA3_SBLOCK (0x16) -#define CPM_CR_IDMA4_SBLOCK (0x17) -#define CPM_CR_MCC1_SBLOCK (0x1c) - -#define CPM_CR_FCC_SBLOCK(x) (x + 0x10) - -#define CPM_CR_SCC1_PAGE (0x00) -#define CPM_CR_SCC2_PAGE (0x01) -#define CPM_CR_SCC3_PAGE (0x02) -#define CPM_CR_SCC4_PAGE (0x03) -#define CPM_CR_SMC1_PAGE (0x07) -#define CPM_CR_SMC2_PAGE (0x08) -#define CPM_CR_SPI_PAGE (0x09) -#define CPM_CR_I2C_PAGE (0x0a) -#define CPM_CR_TIMER_PAGE (0x0a) -#define CPM_CR_RAND_PAGE (0x0a) -#define CPM_CR_FCC1_PAGE (0x04) -#define CPM_CR_FCC2_PAGE (0x05) -#define CPM_CR_FCC3_PAGE (0x06) -#define CPM_CR_IDMA1_PAGE (0x07) -#define CPM_CR_IDMA2_PAGE (0x08) -#define CPM_CR_IDMA3_PAGE (0x09) -#define CPM_CR_IDMA4_PAGE (0x0a) -#define CPM_CR_MCC1_PAGE (0x07) -#define CPM_CR_MCC2_PAGE (0x08) - -#define CPM_CR_FCC_PAGE(x) (x + 0x04) - -/* CPM2-specific opcodes (see cpm.h for common opcodes) -*/ -#define CPM_CR_START_IDMA ((ushort)0x0009) - -#define mk_cr_cmd(PG, SBC, MCN, OP) \ - ((PG << 26) | (SBC << 21) | (MCN << 6) | OP) - -/* The number of pages of host memory we allocate for CPM. This is - * done early in kernel initialization to get physically contiguous - * pages. - */ -#define NUM_CPM_HOST_PAGES 2 - -/* Export the base address of the communication processor registers - * and dual port ram. - */ -extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */ - -#define cpm_dpalloc cpm_muram_alloc -#define cpm_dpfree cpm_muram_free -#define cpm_dpram_addr cpm_muram_addr - -extern void cpm2_reset(void); - -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK3_9 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK5_15 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - -#define CPM2_BRG_INT_CLK (get_brgfreq()) -#define CPM2_BRG_UART_CLK (CPM2_BRG_INT_CLK/16) - -extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src); - -/* This function is used by UARTS, or anything else that uses a 16x - * oversampled clock. - */ -static inline void cpm_setbrg(uint brg, uint rate) -{ - __cpm2_setbrg(brg, rate, CPM2_BRG_UART_CLK, 0, CPM_BRG_EXTC_INT); -} - -/* This function is used to set high speed synchronous baud rate - * clocks. - */ -static inline void cpm2_fastbrg(uint brg, uint rate, int div16) -{ - __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); -} - -/* Function code bits, usually generic to devices. -*/ -#define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ -#define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ -#define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ -#define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ -#define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ - -/* Parameter RAM offsets from the base. -*/ -#define PROFF_SCC1 ((uint)0x8000) -#define PROFF_SCC2 ((uint)0x8100) -#define PROFF_SCC3 ((uint)0x8200) -#define PROFF_SCC4 ((uint)0x8300) -#define PROFF_FCC1 ((uint)0x8400) -#define PROFF_FCC2 ((uint)0x8500) -#define PROFF_FCC3 ((uint)0x8600) -#define PROFF_MCC1 ((uint)0x8700) -#define PROFF_SMC1_BASE ((uint)0x87fc) -#define PROFF_IDMA1_BASE ((uint)0x87fe) -#define PROFF_MCC2 ((uint)0x8800) -#define PROFF_SMC2_BASE ((uint)0x88fc) -#define PROFF_IDMA2_BASE ((uint)0x88fe) -#define PROFF_SPI_BASE ((uint)0x89fc) -#define PROFF_IDMA3_BASE ((uint)0x89fe) -#define PROFF_TIMERS ((uint)0x8ae0) -#define PROFF_REVNUM ((uint)0x8af0) -#define PROFF_RAND ((uint)0x8af8) -#define PROFF_I2C_BASE ((uint)0x8afc) -#define PROFF_IDMA4_BASE ((uint)0x8afe) - -#define PROFF_SCC_SIZE ((uint)0x100) -#define PROFF_FCC_SIZE ((uint)0x100) -#define PROFF_SMC_SIZE ((uint)64) - -/* The SMCs are relocated to any of the first eight DPRAM pages. - * We will fix these at the first locations of DPRAM, until we - * get some microcode patches :-). - * The parameter ram space for the SMCs is fifty-some bytes, and - * they are required to start on a 64 byte boundary. - */ -#define PROFF_SMC1 (0) -#define PROFF_SMC2 (64) - - -/* Define enough so I can at least use the serial port as a UART. - */ -typedef struct smc_uart { - ushort smc_rbase; /* Rx Buffer descriptor base address */ - ushort smc_tbase; /* Tx Buffer descriptor base address */ - u_char smc_rfcr; /* Rx function code */ - u_char smc_tfcr; /* Tx function code */ - ushort smc_mrblr; /* Max receive buffer length */ - uint smc_rstate; /* Internal */ - uint smc_idp; /* Internal */ - ushort smc_rbptr; /* Internal */ - ushort smc_ibc; /* Internal */ - uint smc_rxtmp; /* Internal */ - uint smc_tstate; /* Internal */ - uint smc_tdp; /* Internal */ - ushort smc_tbptr; /* Internal */ - ushort smc_tbc; /* Internal */ - uint smc_txtmp; /* Internal */ - ushort smc_maxidl; /* Maximum idle characters */ - ushort smc_tmpidl; /* Temporary idle counter */ - ushort smc_brklen; /* Last received break length */ - ushort smc_brkec; /* rcv'd break condition counter */ - ushort smc_brkcr; /* xmt break count register */ - ushort smc_rmask; /* Temporary bit mask */ - uint smc_stmp; /* SDMA Temp */ -} smc_uart_t; - -/* SMC uart mode register (Internal memory map). -*/ -#define SMCMR_REN ((ushort)0x0001) -#define SMCMR_TEN ((ushort)0x0002) -#define SMCMR_DM ((ushort)0x000c) -#define SMCMR_SM_GCI ((ushort)0x0000) -#define SMCMR_SM_UART ((ushort)0x0020) -#define SMCMR_SM_TRANS ((ushort)0x0030) -#define SMCMR_SM_MASK ((ushort)0x0030) -#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */ -#define SMCMR_REVD SMCMR_PM_EVEN -#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */ -#define SMCMR_BS SMCMR_PEN -#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */ -#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */ -#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK) - -/* SMC Event and Mask register. -*/ -#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */ -#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */ -#define SMCM_TXE ((unsigned char)0x10) -#define SMCM_BSY ((unsigned char)0x04) -#define SMCM_TX ((unsigned char)0x02) -#define SMCM_RX ((unsigned char)0x01) - -/* SCCs. -*/ -#define SCC_GSMRH_IRP ((uint)0x00040000) -#define SCC_GSMRH_GDE ((uint)0x00010000) -#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) -#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) -#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) -#define SCC_GSMRH_REVD ((uint)0x00002000) -#define SCC_GSMRH_TRX ((uint)0x00001000) -#define SCC_GSMRH_TTX ((uint)0x00000800) -#define SCC_GSMRH_CDP ((uint)0x00000400) -#define SCC_GSMRH_CTSP ((uint)0x00000200) -#define SCC_GSMRH_CDS ((uint)0x00000100) -#define SCC_GSMRH_CTSS ((uint)0x00000080) -#define SCC_GSMRH_TFL ((uint)0x00000040) -#define SCC_GSMRH_RFW ((uint)0x00000020) -#define SCC_GSMRH_TXSY ((uint)0x00000010) -#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) -#define SCC_GSMRH_SYNL8 ((uint)0x00000008) -#define SCC_GSMRH_SYNL4 ((uint)0x00000004) -#define SCC_GSMRH_RTSM ((uint)0x00000002) -#define SCC_GSMRH_RSYN ((uint)0x00000001) - -#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ -#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) -#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) -#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) -#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) -#define SCC_GSMRL_TCI ((uint)0x10000000) -#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) -#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) -#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) -#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) -#define SCC_GSMRL_RINV ((uint)0x02000000) -#define SCC_GSMRL_TINV ((uint)0x01000000) -#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) -#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) -#define SCC_GSMRL_TPL_48 ((uint)0x00800000) -#define SCC_GSMRL_TPL_32 ((uint)0x00600000) -#define SCC_GSMRL_TPL_16 ((uint)0x00400000) -#define SCC_GSMRL_TPL_8 ((uint)0x00200000) -#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) -#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) -#define SCC_GSMRL_TPP_01 ((uint)0x00100000) -#define SCC_GSMRL_TPP_10 ((uint)0x00080000) -#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) -#define SCC_GSMRL_TEND ((uint)0x00040000) -#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) -#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) -#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) -#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) -#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) -#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) -#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) -#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) -#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) -#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) -#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) -#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) -#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) -#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) -#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ -#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) -#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) -#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) -#define SCC_GSMRL_ENR ((uint)0x00000020) -#define SCC_GSMRL_ENT ((uint)0x00000010) -#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) -#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) -#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) -#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) -#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) -#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) -#define SCC_GSMRL_MODE_UART ((uint)0x00000004) -#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) -#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) -#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) - -#define SCC_TODR_TOD ((ushort)0x8000) - -/* SCC Event and Mask register. -*/ -#define SCCM_TXE ((unsigned char)0x10) -#define SCCM_BSY ((unsigned char)0x04) -#define SCCM_TX ((unsigned char)0x02) -#define SCCM_RX ((unsigned char)0x01) - -typedef struct scc_param { - ushort scc_rbase; /* Rx Buffer descriptor base address */ - ushort scc_tbase; /* Tx Buffer descriptor base address */ - u_char scc_rfcr; /* Rx function code */ - u_char scc_tfcr; /* Tx function code */ - ushort scc_mrblr; /* Max receive buffer length */ - uint scc_rstate; /* Internal */ - uint scc_idp; /* Internal */ - ushort scc_rbptr; /* Internal */ - ushort scc_ibc; /* Internal */ - uint scc_rxtmp; /* Internal */ - uint scc_tstate; /* Internal */ - uint scc_tdp; /* Internal */ - ushort scc_tbptr; /* Internal */ - ushort scc_tbc; /* Internal */ - uint scc_txtmp; /* Internal */ - uint scc_rcrc; /* Internal */ - uint scc_tcrc; /* Internal */ -} sccp_t; - -/* CPM Ethernet through SCC1. - */ -typedef struct scc_enet { - sccp_t sen_genscc; - uint sen_cpres; /* Preset CRC */ - uint sen_cmask; /* Constant mask for CRC */ - uint sen_crcec; /* CRC Error counter */ - uint sen_alec; /* alignment error counter */ - uint sen_disfc; /* discard frame counter */ - ushort sen_pads; /* Tx short frame pad character */ - ushort sen_retlim; /* Retry limit threshold */ - ushort sen_retcnt; /* Retry limit counter */ - ushort sen_maxflr; /* maximum frame length register */ - ushort sen_minflr; /* minimum frame length register */ - ushort sen_maxd1; /* maximum DMA1 length */ - ushort sen_maxd2; /* maximum DMA2 length */ - ushort sen_maxd; /* Rx max DMA */ - ushort sen_dmacnt; /* Rx DMA counter */ - ushort sen_maxb; /* Max BD byte count */ - ushort sen_gaddr1; /* Group address filter */ - ushort sen_gaddr2; - ushort sen_gaddr3; - ushort sen_gaddr4; - uint sen_tbuf0data0; /* Save area 0 - current frame */ - uint sen_tbuf0data1; /* Save area 1 - current frame */ - uint sen_tbuf0rba; /* Internal */ - uint sen_tbuf0crc; /* Internal */ - ushort sen_tbuf0bcnt; /* Internal */ - ushort sen_paddrh; /* physical address (MSB) */ - ushort sen_paddrm; - ushort sen_paddrl; /* physical address (LSB) */ - ushort sen_pper; /* persistence */ - ushort sen_rfbdptr; /* Rx first BD pointer */ - ushort sen_tfbdptr; /* Tx first BD pointer */ - ushort sen_tlbdptr; /* Tx last BD pointer */ - uint sen_tbuf1data0; /* Save area 0 - current frame */ - uint sen_tbuf1data1; /* Save area 1 - current frame */ - uint sen_tbuf1rba; /* Internal */ - uint sen_tbuf1crc; /* Internal */ - ushort sen_tbuf1bcnt; /* Internal */ - ushort sen_txlen; /* Tx Frame length counter */ - ushort sen_iaddr1; /* Individual address filter */ - ushort sen_iaddr2; - ushort sen_iaddr3; - ushort sen_iaddr4; - ushort sen_boffcnt; /* Backoff counter */ - - /* NOTE: Some versions of the manual have the following items - * incorrectly documented. Below is the proper order. - */ - ushort sen_taddrh; /* temp address (MSB) */ - ushort sen_taddrm; - ushort sen_taddrl; /* temp address (LSB) */ -} scc_enet_t; - - -/* SCC Event register as used by Ethernet. -*/ -#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ -#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* SCC Mode Register (PSMR) as used by Ethernet. -*/ -#define SCC_PSMR_HBC ((ushort)0x8000) /* Enable heartbeat */ -#define SCC_PSMR_FC ((ushort)0x4000) /* Force collision */ -#define SCC_PSMR_RSH ((ushort)0x2000) /* Receive short frames */ -#define SCC_PSMR_IAM ((ushort)0x1000) /* Check individual hash */ -#define SCC_PSMR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ -#define SCC_PSMR_PRO ((ushort)0x0200) /* Promiscuous mode */ -#define SCC_PSMR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ -#define SCC_PSMR_SBT ((ushort)0x0080) /* Special backoff timer */ -#define SCC_PSMR_LPB ((ushort)0x0040) /* Set Loopback mode */ -#define SCC_PSMR_SIP ((ushort)0x0020) /* Sample Input Pins */ -#define SCC_PSMR_LCW ((ushort)0x0010) /* Late collision window */ -#define SCC_PSMR_NIB22 ((ushort)0x000a) /* Start frame search */ -#define SCC_PSMR_FDE ((ushort)0x0001) /* Full duplex enable */ - -/* SCC as UART -*/ -typedef struct scc_uart { - sccp_t scc_genscc; - uint scc_res1; /* Reserved */ - uint scc_res2; /* Reserved */ - ushort scc_maxidl; /* Maximum idle chars */ - ushort scc_idlc; /* temp idle counter */ - ushort scc_brkcr; /* Break count register */ - ushort scc_parec; /* receive parity error counter */ - ushort scc_frmec; /* receive framing error counter */ - ushort scc_nosec; /* receive noise counter */ - ushort scc_brkec; /* receive break condition counter */ - ushort scc_brkln; /* last received break length */ - ushort scc_uaddr1; /* UART address character 1 */ - ushort scc_uaddr2; /* UART address character 2 */ - ushort scc_rtemp; /* Temp storage */ - ushort scc_toseq; /* Transmit out of sequence char */ - ushort scc_char1; /* control character 1 */ - ushort scc_char2; /* control character 2 */ - ushort scc_char3; /* control character 3 */ - ushort scc_char4; /* control character 4 */ - ushort scc_char5; /* control character 5 */ - ushort scc_char6; /* control character 6 */ - ushort scc_char7; /* control character 7 */ - ushort scc_char8; /* control character 8 */ - ushort scc_rccm; /* receive control character mask */ - ushort scc_rccr; /* receive control character register */ - ushort scc_rlbc; /* receive last break character */ -} scc_uart_t; - -/* SCC Event and Mask registers when it is used as a UART. -*/ -#define UART_SCCM_GLR ((ushort)0x1000) -#define UART_SCCM_GLT ((ushort)0x0800) -#define UART_SCCM_AB ((ushort)0x0200) -#define UART_SCCM_IDL ((ushort)0x0100) -#define UART_SCCM_GRA ((ushort)0x0080) -#define UART_SCCM_BRKE ((ushort)0x0040) -#define UART_SCCM_BRKS ((ushort)0x0020) -#define UART_SCCM_CCR ((ushort)0x0008) -#define UART_SCCM_BSY ((ushort)0x0004) -#define UART_SCCM_TX ((ushort)0x0002) -#define UART_SCCM_RX ((ushort)0x0001) - -/* The SCC PSMR when used as a UART. -*/ -#define SCU_PSMR_FLC ((ushort)0x8000) -#define SCU_PSMR_SL ((ushort)0x4000) -#define SCU_PSMR_CL ((ushort)0x3000) -#define SCU_PSMR_UM ((ushort)0x0c00) -#define SCU_PSMR_FRZ ((ushort)0x0200) -#define SCU_PSMR_RZS ((ushort)0x0100) -#define SCU_PSMR_SYN ((ushort)0x0080) -#define SCU_PSMR_DRT ((ushort)0x0040) -#define SCU_PSMR_PEN ((ushort)0x0010) -#define SCU_PSMR_RPM ((ushort)0x000c) -#define SCU_PSMR_REVP ((ushort)0x0008) -#define SCU_PSMR_TPM ((ushort)0x0003) -#define SCU_PSMR_TEVP ((ushort)0x0002) - -/* CPM Transparent mode SCC. - */ -typedef struct scc_trans { - sccp_t st_genscc; - uint st_cpres; /* Preset CRC */ - uint st_cmask; /* Constant mask for CRC */ -} scc_trans_t; - -/* How about some FCCs..... -*/ -#define FCC_GFMR_DIAG_NORM ((uint)0x00000000) -#define FCC_GFMR_DIAG_LE ((uint)0x40000000) -#define FCC_GFMR_DIAG_AE ((uint)0x80000000) -#define FCC_GFMR_DIAG_ALE ((uint)0xc0000000) -#define FCC_GFMR_TCI ((uint)0x20000000) -#define FCC_GFMR_TRX ((uint)0x10000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_TTX ((uint)0x08000000) -#define FCC_GFMR_CDP ((uint)0x04000000) -#define FCC_GFMR_CTSP ((uint)0x02000000) -#define FCC_GFMR_CDS ((uint)0x01000000) -#define FCC_GFMR_CTSS ((uint)0x00800000) -#define FCC_GFMR_SYNL_NONE ((uint)0x00000000) -#define FCC_GFMR_SYNL_AUTO ((uint)0x00004000) -#define FCC_GFMR_SYNL_8 ((uint)0x00008000) -#define FCC_GFMR_SYNL_16 ((uint)0x0000c000) -#define FCC_GFMR_RTSM ((uint)0x00002000) -#define FCC_GFMR_RENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_RENC_NRZI ((uint)0x00000800) -#define FCC_GFMR_REVD ((uint)0x00000400) -#define FCC_GFMR_TENC_NRZ ((uint)0x00000000) -#define FCC_GFMR_TENC_NRZI ((uint)0x00000100) -#define FCC_GFMR_TCRC_16 ((uint)0x00000000) -#define FCC_GFMR_TCRC_32 ((uint)0x00000080) -#define FCC_GFMR_ENR ((uint)0x00000020) -#define FCC_GFMR_ENT ((uint)0x00000010) -#define FCC_GFMR_MODE_ENET ((uint)0x0000000c) -#define FCC_GFMR_MODE_ATM ((uint)0x0000000a) -#define FCC_GFMR_MODE_HDLC ((uint)0x00000000) - -/* Generic FCC parameter ram. -*/ -typedef struct fcc_param { - ushort fcc_riptr; /* Rx Internal temp pointer */ - ushort fcc_tiptr; /* Tx Internal temp pointer */ - ushort fcc_res1; - ushort fcc_mrblr; /* Max receive buffer length, mod 32 bytes */ - uint fcc_rstate; /* Upper byte is Func code, must be set */ - uint fcc_rbase; /* Receive BD base */ - ushort fcc_rbdstat; /* RxBD status */ - ushort fcc_rbdlen; /* RxBD down counter */ - uint fcc_rdptr; /* RxBD internal data pointer */ - uint fcc_tstate; /* Upper byte is Func code, must be set */ - uint fcc_tbase; /* Transmit BD base */ - ushort fcc_tbdstat; /* TxBD status */ - ushort fcc_tbdlen; /* TxBD down counter */ - uint fcc_tdptr; /* TxBD internal data pointer */ - uint fcc_rbptr; /* Rx BD Internal buf pointer */ - uint fcc_tbptr; /* Tx BD Internal buf pointer */ - uint fcc_rcrc; /* Rx temp CRC */ - uint fcc_res2; - uint fcc_tcrc; /* Tx temp CRC */ -} fccp_t; - - -/* Ethernet controller through FCC. -*/ -typedef struct fcc_enet { - fccp_t fen_genfcc; - uint fen_statbuf; /* Internal status buffer */ - uint fen_camptr; /* CAM address */ - uint fen_cmask; /* Constant mask for CRC */ - uint fen_cpres; /* Preset CRC */ - uint fen_crcec; /* CRC Error counter */ - uint fen_alec; /* alignment error counter */ - uint fen_disfc; /* discard frame counter */ - ushort fen_retlim; /* Retry limit */ - ushort fen_retcnt; /* Retry counter */ - ushort fen_pper; /* Persistence */ - ushort fen_boffcnt; /* backoff counter */ - uint fen_gaddrh; /* Group address filter, high 32-bits */ - uint fen_gaddrl; /* Group address filter, low 32-bits */ - ushort fen_tfcstat; /* out of sequence TxBD */ - ushort fen_tfclen; - uint fen_tfcptr; - ushort fen_mflr; /* Maximum frame length (1518) */ - ushort fen_paddrh; /* MAC address */ - ushort fen_paddrm; - ushort fen_paddrl; - ushort fen_ibdcount; /* Internal BD counter */ - ushort fen_ibdstart; /* Internal BD start pointer */ - ushort fen_ibdend; /* Internal BD end pointer */ - ushort fen_txlen; /* Internal Tx frame length counter */ - uint fen_ibdbase[8]; /* Internal use */ - uint fen_iaddrh; /* Individual address filter */ - uint fen_iaddrl; - ushort fen_minflr; /* Minimum frame length (64) */ - ushort fen_taddrh; /* Filter transfer MAC address */ - ushort fen_taddrm; - ushort fen_taddrl; - ushort fen_padptr; /* Pointer to pad byte buffer */ - ushort fen_cftype; /* control frame type */ - ushort fen_cfrange; /* control frame range */ - ushort fen_maxb; /* maximum BD count */ - ushort fen_maxd1; /* Max DMA1 length (1520) */ - ushort fen_maxd2; /* Max DMA2 length (1520) */ - ushort fen_maxd; /* internal max DMA count */ - ushort fen_dmacnt; /* internal DMA counter */ - uint fen_octc; /* Total octect counter */ - uint fen_colc; /* Total collision counter */ - uint fen_broc; /* Total broadcast packet counter */ - uint fen_mulc; /* Total multicast packet count */ - uint fen_uspc; /* Total packets < 64 bytes */ - uint fen_frgc; /* Total packets < 64 bytes with errors */ - uint fen_ospc; /* Total packets > 1518 */ - uint fen_jbrc; /* Total packets > 1518 with errors */ - uint fen_p64c; /* Total packets == 64 bytes */ - uint fen_p65c; /* Total packets 64 < bytes <= 127 */ - uint fen_p128c; /* Total packets 127 < bytes <= 255 */ - uint fen_p256c; /* Total packets 256 < bytes <= 511 */ - uint fen_p512c; /* Total packets 512 < bytes <= 1023 */ - uint fen_p1024c; /* Total packets 1024 < bytes <= 1518 */ - uint fen_cambuf; /* Internal CAM buffer poiner */ - ushort fen_rfthr; /* Received frames threshold */ - ushort fen_rfcnt; /* Received frames count */ -} fcc_enet_t; - -/* FCC Event/Mask register as used by Ethernet. -*/ -#define FCC_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define FCC_ENET_RXC ((ushort)0x0040) /* Control Frame Received */ -#define FCC_ENET_TXC ((ushort)0x0020) /* Out of seq. Tx sent */ -#define FCC_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define FCC_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define FCC_ENET_BSY ((ushort)0x0004) /* Busy. Rx Frame dropped */ -#define FCC_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define FCC_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* FCC Mode Register (FPSMR) as used by Ethernet. -*/ -#define FCC_PSMR_HBC ((uint)0x80000000) /* Enable heartbeat */ -#define FCC_PSMR_FC ((uint)0x40000000) /* Force Collision */ -#define FCC_PSMR_SBT ((uint)0x20000000) /* Stop backoff timer */ -#define FCC_PSMR_LPB ((uint)0x10000000) /* Local protect. 1 = FDX */ -#define FCC_PSMR_LCW ((uint)0x08000000) /* Late collision select */ -#define FCC_PSMR_FDE ((uint)0x04000000) /* Full Duplex Enable */ -#define FCC_PSMR_MON ((uint)0x02000000) /* RMON Enable */ -#define FCC_PSMR_PRO ((uint)0x00400000) /* Promiscuous Enable */ -#define FCC_PSMR_FCE ((uint)0x00200000) /* Flow Control Enable */ -#define FCC_PSMR_RSH ((uint)0x00100000) /* Receive Short Frames */ -#define FCC_PSMR_CAM ((uint)0x00000400) /* CAM enable */ -#define FCC_PSMR_BRO ((uint)0x00000200) /* Broadcast pkt discard */ -#define FCC_PSMR_ENCRC ((uint)0x00000080) /* Use 32-bit CRC */ - -/* IIC parameter RAM. -*/ -typedef struct iic { - ushort iic_rbase; /* Rx Buffer descriptor base address */ - ushort iic_tbase; /* Tx Buffer descriptor base address */ - u_char iic_rfcr; /* Rx function code */ - u_char iic_tfcr; /* Tx function code */ - ushort iic_mrblr; /* Max receive buffer length */ - uint iic_rstate; /* Internal */ - uint iic_rdp; /* Internal */ - ushort iic_rbptr; /* Internal */ - ushort iic_rbc; /* Internal */ - uint iic_rxtmp; /* Internal */ - uint iic_tstate; /* Internal */ - uint iic_tdp; /* Internal */ - ushort iic_tbptr; /* Internal */ - ushort iic_tbc; /* Internal */ - uint iic_txtmp; /* Internal */ -} iic_t; - -/* SPI parameter RAM. -*/ -typedef struct spi { - ushort spi_rbase; /* Rx Buffer descriptor base address */ - ushort spi_tbase; /* Tx Buffer descriptor base address */ - u_char spi_rfcr; /* Rx function code */ - u_char spi_tfcr; /* Tx function code */ - ushort spi_mrblr; /* Max receive buffer length */ - uint spi_rstate; /* Internal */ - uint spi_rdp; /* Internal */ - ushort spi_rbptr; /* Internal */ - ushort spi_rbc; /* Internal */ - uint spi_rxtmp; /* Internal */ - uint spi_tstate; /* Internal */ - uint spi_tdp; /* Internal */ - ushort spi_tbptr; /* Internal */ - ushort spi_tbc; /* Internal */ - uint spi_txtmp; /* Internal */ - uint spi_res; /* Tx temp. */ - uint spi_res1[4]; /* SDMA temp. */ -} spi_t; - -/* SPI Mode register. -*/ -#define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ -#define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ -#define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ -#define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ -#define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ -#define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ -#define SPMODE_EN ((ushort)0x0100) /* Enable */ -#define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ -#define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ - -#define SPMODE_LEN(x) ((((x)-1)&0xF)<<4) -#define SPMODE_PM(x) ((x) &0xF) - -#define SPI_EB ((u_char)0x10) /* big endian byte order */ - -/* IDMA parameter RAM -*/ -typedef struct idma { - ushort ibase; /* IDMA buffer descriptor table base address */ - ushort dcm; /* DMA channel mode */ - ushort ibdptr; /* IDMA current buffer descriptor pointer */ - ushort dpr_buf; /* IDMA transfer buffer base address */ - ushort buf_inv; /* internal buffer inventory */ - ushort ss_max; /* steady-state maximum transfer size */ - ushort dpr_in_ptr; /* write pointer inside the internal buffer */ - ushort sts; /* source transfer size */ - ushort dpr_out_ptr; /* read pointer inside the internal buffer */ - ushort seob; /* source end of burst */ - ushort deob; /* destination end of burst */ - ushort dts; /* destination transfer size */ - ushort ret_add; /* return address when working in ERM=1 mode */ - ushort res0; /* reserved */ - uint bd_cnt; /* internal byte count */ - uint s_ptr; /* source internal data pointer */ - uint d_ptr; /* destination internal data pointer */ - uint istate; /* internal state */ - u_char res1[20]; /* pad to 64-byte length */ -} idma_t; - -/* DMA channel mode bit fields -*/ -#define IDMA_DCM_FB ((ushort)0x8000) /* fly-by mode */ -#define IDMA_DCM_LP ((ushort)0x4000) /* low priority */ -#define IDMA_DCM_TC2 ((ushort)0x0400) /* value driven on TC[2] */ -#define IDMA_DCM_DMA_WRAP_MASK ((ushort)0x01c0) /* mask for DMA wrap */ -#define IDMA_DCM_DMA_WRAP_64 ((ushort)0x0000) /* 64-byte DMA xfer buffer */ -#define IDMA_DCM_DMA_WRAP_128 ((ushort)0x0040) /* 128-byte DMA xfer buffer */ -#define IDMA_DCM_DMA_WRAP_256 ((ushort)0x0080) /* 256-byte DMA xfer buffer */ -#define IDMA_DCM_DMA_WRAP_512 ((ushort)0x00c0) /* 512-byte DMA xfer buffer */ -#define IDMA_DCM_DMA_WRAP_1024 ((ushort)0x0100) /* 1024-byte DMA xfer buffer */ -#define IDMA_DCM_DMA_WRAP_2048 ((ushort)0x0140) /* 2048-byte DMA xfer buffer */ -#define IDMA_DCM_SINC ((ushort)0x0020) /* source inc addr */ -#define IDMA_DCM_DINC ((ushort)0x0010) /* destination inc addr */ -#define IDMA_DCM_ERM ((ushort)0x0008) /* external request mode */ -#define IDMA_DCM_DT ((ushort)0x0004) /* DONE treatment */ -#define IDMA_DCM_SD_MASK ((ushort)0x0003) /* mask for SD bit field */ -#define IDMA_DCM_SD_MEM2MEM ((ushort)0x0000) /* memory-to-memory xfer */ -#define IDMA_DCM_SD_PER2MEM ((ushort)0x0002) /* peripheral-to-memory xfer */ -#define IDMA_DCM_SD_MEM2PER ((ushort)0x0001) /* memory-to-peripheral xfer */ - -/* IDMA Buffer Descriptors -*/ -typedef struct idma_bd { - uint flags; - uint len; /* data length */ - uint src; /* source data buffer pointer */ - uint dst; /* destination data buffer pointer */ -} idma_bd_t; - -/* IDMA buffer descriptor flag bit fields -*/ -#define IDMA_BD_V ((uint)0x80000000) /* valid */ -#define IDMA_BD_W ((uint)0x20000000) /* wrap */ -#define IDMA_BD_I ((uint)0x10000000) /* interrupt */ -#define IDMA_BD_L ((uint)0x08000000) /* last */ -#define IDMA_BD_CM ((uint)0x02000000) /* continuous mode */ -#define IDMA_BD_SDN ((uint)0x00400000) /* source done */ -#define IDMA_BD_DDN ((uint)0x00200000) /* destination done */ -#define IDMA_BD_DGBL ((uint)0x00100000) /* destination global */ -#define IDMA_BD_DBO_LE ((uint)0x00040000) /* little-end dest byte order */ -#define IDMA_BD_DBO_BE ((uint)0x00080000) /* big-end dest byte order */ -#define IDMA_BD_DDTB ((uint)0x00010000) /* destination data bus */ -#define IDMA_BD_SGBL ((uint)0x00002000) /* source global */ -#define IDMA_BD_SBO_LE ((uint)0x00000800) /* little-end src byte order */ -#define IDMA_BD_SBO_BE ((uint)0x00001000) /* big-end src byte order */ -#define IDMA_BD_SDTB ((uint)0x00000200) /* source data bus */ - -/* per-channel IDMA registers -*/ -typedef struct im_idma { - u_char idsr; /* IDMAn event status register */ - u_char res0[3]; - u_char idmr; /* IDMAn event mask register */ - u_char res1[3]; -} im_idma_t; - -/* IDMA event register bit fields -*/ -#define IDMA_EVENT_SC ((unsigned char)0x08) /* stop completed */ -#define IDMA_EVENT_OB ((unsigned char)0x04) /* out of buffers */ -#define IDMA_EVENT_EDN ((unsigned char)0x02) /* external DONE asserted */ -#define IDMA_EVENT_BC ((unsigned char)0x01) /* buffer descriptor complete */ - -/* RISC Controller Configuration Register (RCCR) bit fields -*/ -#define RCCR_TIME ((uint)0x80000000) /* timer enable */ -#define RCCR_TIMEP_MASK ((uint)0x3f000000) /* mask for timer period bit field */ -#define RCCR_DR0M ((uint)0x00800000) /* IDMA0 request mode */ -#define RCCR_DR1M ((uint)0x00400000) /* IDMA1 request mode */ -#define RCCR_DR2M ((uint)0x00000080) /* IDMA2 request mode */ -#define RCCR_DR3M ((uint)0x00000040) /* IDMA3 request mode */ -#define RCCR_DR0QP_MASK ((uint)0x00300000) /* mask for IDMA0 req priority */ -#define RCCR_DR0QP_HIGH ((uint)0x00000000) /* IDMA0 has high req priority */ -#define RCCR_DR0QP_MED ((uint)0x00100000) /* IDMA0 has medium req priority */ -#define RCCR_DR0QP_LOW ((uint)0x00200000) /* IDMA0 has low req priority */ -#define RCCR_DR1QP_MASK ((uint)0x00030000) /* mask for IDMA1 req priority */ -#define RCCR_DR1QP_HIGH ((uint)0x00000000) /* IDMA1 has high req priority */ -#define RCCR_DR1QP_MED ((uint)0x00010000) /* IDMA1 has medium req priority */ -#define RCCR_DR1QP_LOW ((uint)0x00020000) /* IDMA1 has low req priority */ -#define RCCR_DR2QP_MASK ((uint)0x00000030) /* mask for IDMA2 req priority */ -#define RCCR_DR2QP_HIGH ((uint)0x00000000) /* IDMA2 has high req priority */ -#define RCCR_DR2QP_MED ((uint)0x00000010) /* IDMA2 has medium req priority */ -#define RCCR_DR2QP_LOW ((uint)0x00000020) /* IDMA2 has low req priority */ -#define RCCR_DR3QP_MASK ((uint)0x00000003) /* mask for IDMA3 req priority */ -#define RCCR_DR3QP_HIGH ((uint)0x00000000) /* IDMA3 has high req priority */ -#define RCCR_DR3QP_MED ((uint)0x00000001) /* IDMA3 has medium req priority */ -#define RCCR_DR3QP_LOW ((uint)0x00000002) /* IDMA3 has low req priority */ -#define RCCR_EIE ((uint)0x00080000) /* external interrupt enable */ -#define RCCR_SCD ((uint)0x00040000) /* scheduler configuration */ -#define RCCR_ERAM_MASK ((uint)0x0000e000) /* mask for enable RAM microcode */ -#define RCCR_ERAM_0KB ((uint)0x00000000) /* use 0KB of dpram for microcode */ -#define RCCR_ERAM_2KB ((uint)0x00002000) /* use 2KB of dpram for microcode */ -#define RCCR_ERAM_4KB ((uint)0x00004000) /* use 4KB of dpram for microcode */ -#define RCCR_ERAM_6KB ((uint)0x00006000) /* use 6KB of dpram for microcode */ -#define RCCR_ERAM_8KB ((uint)0x00008000) /* use 8KB of dpram for microcode */ -#define RCCR_ERAM_10KB ((uint)0x0000a000) /* use 10KB of dpram for microcode */ -#define RCCR_ERAM_12KB ((uint)0x0000c000) /* use 12KB of dpram for microcode */ -#define RCCR_EDM0 ((uint)0x00000800) /* DREQ0 edge detect mode */ -#define RCCR_EDM1 ((uint)0x00000400) /* DREQ1 edge detect mode */ -#define RCCR_EDM2 ((uint)0x00000200) /* DREQ2 edge detect mode */ -#define RCCR_EDM3 ((uint)0x00000100) /* DREQ3 edge detect mode */ -#define RCCR_DEM01 ((uint)0x00000008) /* DONE0/DONE1 edge detect mode */ -#define RCCR_DEM23 ((uint)0x00000004) /* DONE2/DONE3 edge detect mode */ - -/*----------------------------------------------------------------------- - * CMXFCR - CMX FCC Clock Route Register - */ -#define CMXFCR_FC1 0x40000000 /* FCC1 connection */ -#define CMXFCR_RF1CS_MSK 0x38000000 /* Receive FCC1 Clock Source Mask */ -#define CMXFCR_TF1CS_MSK 0x07000000 /* Transmit FCC1 Clock Source Mask */ -#define CMXFCR_FC2 0x00400000 /* FCC2 connection */ -#define CMXFCR_RF2CS_MSK 0x00380000 /* Receive FCC2 Clock Source Mask */ -#define CMXFCR_TF2CS_MSK 0x00070000 /* Transmit FCC2 Clock Source Mask */ -#define CMXFCR_FC3 0x00004000 /* FCC3 connection */ -#define CMXFCR_RF3CS_MSK 0x00003800 /* Receive FCC3 Clock Source Mask */ -#define CMXFCR_TF3CS_MSK 0x00000700 /* Transmit FCC3 Clock Source Mask */ - -#define CMXFCR_RF1CS_BRG5 0x00000000 /* Receive FCC1 Clock Source is BRG5 */ -#define CMXFCR_RF1CS_BRG6 0x08000000 /* Receive FCC1 Clock Source is BRG6 */ -#define CMXFCR_RF1CS_BRG7 0x10000000 /* Receive FCC1 Clock Source is BRG7 */ -#define CMXFCR_RF1CS_BRG8 0x18000000 /* Receive FCC1 Clock Source is BRG8 */ -#define CMXFCR_RF1CS_CLK9 0x20000000 /* Receive FCC1 Clock Source is CLK9 */ -#define CMXFCR_RF1CS_CLK10 0x28000000 /* Receive FCC1 Clock Source is CLK10 */ -#define CMXFCR_RF1CS_CLK11 0x30000000 /* Receive FCC1 Clock Source is CLK11 */ -#define CMXFCR_RF1CS_CLK12 0x38000000 /* Receive FCC1 Clock Source is CLK12 */ - -#define CMXFCR_TF1CS_BRG5 0x00000000 /* Transmit FCC1 Clock Source is BRG5 */ -#define CMXFCR_TF1CS_BRG6 0x01000000 /* Transmit FCC1 Clock Source is BRG6 */ -#define CMXFCR_TF1CS_BRG7 0x02000000 /* Transmit FCC1 Clock Source is BRG7 */ -#define CMXFCR_TF1CS_BRG8 0x03000000 /* Transmit FCC1 Clock Source is BRG8 */ -#define CMXFCR_TF1CS_CLK9 0x04000000 /* Transmit FCC1 Clock Source is CLK9 */ -#define CMXFCR_TF1CS_CLK10 0x05000000 /* Transmit FCC1 Clock Source is CLK10 */ -#define CMXFCR_TF1CS_CLK11 0x06000000 /* Transmit FCC1 Clock Source is CLK11 */ -#define CMXFCR_TF1CS_CLK12 0x07000000 /* Transmit FCC1 Clock Source is CLK12 */ - -#define CMXFCR_RF2CS_BRG5 0x00000000 /* Receive FCC2 Clock Source is BRG5 */ -#define CMXFCR_RF2CS_BRG6 0x00080000 /* Receive FCC2 Clock Source is BRG6 */ -#define CMXFCR_RF2CS_BRG7 0x00100000 /* Receive FCC2 Clock Source is BRG7 */ -#define CMXFCR_RF2CS_BRG8 0x00180000 /* Receive FCC2 Clock Source is BRG8 */ -#define CMXFCR_RF2CS_CLK13 0x00200000 /* Receive FCC2 Clock Source is CLK13 */ -#define CMXFCR_RF2CS_CLK14 0x00280000 /* Receive FCC2 Clock Source is CLK14 */ -#define CMXFCR_RF2CS_CLK15 0x00300000 /* Receive FCC2 Clock Source is CLK15 */ -#define CMXFCR_RF2CS_CLK16 0x00380000 /* Receive FCC2 Clock Source is CLK16 */ - -#define CMXFCR_TF2CS_BRG5 0x00000000 /* Transmit FCC2 Clock Source is BRG5 */ -#define CMXFCR_TF2CS_BRG6 0x00010000 /* Transmit FCC2 Clock Source is BRG6 */ -#define CMXFCR_TF2CS_BRG7 0x00020000 /* Transmit FCC2 Clock Source is BRG7 */ -#define CMXFCR_TF2CS_BRG8 0x00030000 /* Transmit FCC2 Clock Source is BRG8 */ -#define CMXFCR_TF2CS_CLK13 0x00040000 /* Transmit FCC2 Clock Source is CLK13 */ -#define CMXFCR_TF2CS_CLK14 0x00050000 /* Transmit FCC2 Clock Source is CLK14 */ -#define CMXFCR_TF2CS_CLK15 0x00060000 /* Transmit FCC2 Clock Source is CLK15 */ -#define CMXFCR_TF2CS_CLK16 0x00070000 /* Transmit FCC2 Clock Source is CLK16 */ - -#define CMXFCR_RF3CS_BRG5 0x00000000 /* Receive FCC3 Clock Source is BRG5 */ -#define CMXFCR_RF3CS_BRG6 0x00000800 /* Receive FCC3 Clock Source is BRG6 */ -#define CMXFCR_RF3CS_BRG7 0x00001000 /* Receive FCC3 Clock Source is BRG7 */ -#define CMXFCR_RF3CS_BRG8 0x00001800 /* Receive FCC3 Clock Source is BRG8 */ -#define CMXFCR_RF3CS_CLK13 0x00002000 /* Receive FCC3 Clock Source is CLK13 */ -#define CMXFCR_RF3CS_CLK14 0x00002800 /* Receive FCC3 Clock Source is CLK14 */ -#define CMXFCR_RF3CS_CLK15 0x00003000 /* Receive FCC3 Clock Source is CLK15 */ -#define CMXFCR_RF3CS_CLK16 0x00003800 /* Receive FCC3 Clock Source is CLK16 */ - -#define CMXFCR_TF3CS_BRG5 0x00000000 /* Transmit FCC3 Clock Source is BRG5 */ -#define CMXFCR_TF3CS_BRG6 0x00000100 /* Transmit FCC3 Clock Source is BRG6 */ -#define CMXFCR_TF3CS_BRG7 0x00000200 /* Transmit FCC3 Clock Source is BRG7 */ -#define CMXFCR_TF3CS_BRG8 0x00000300 /* Transmit FCC3 Clock Source is BRG8 */ -#define CMXFCR_TF3CS_CLK13 0x00000400 /* Transmit FCC3 Clock Source is CLK13 */ -#define CMXFCR_TF3CS_CLK14 0x00000500 /* Transmit FCC3 Clock Source is CLK14 */ -#define CMXFCR_TF3CS_CLK15 0x00000600 /* Transmit FCC3 Clock Source is CLK15 */ -#define CMXFCR_TF3CS_CLK16 0x00000700 /* Transmit FCC3 Clock Source is CLK16 */ - -/*----------------------------------------------------------------------- - * CMXSCR - CMX SCC Clock Route Register - */ -#define CMXSCR_GR1 0x80000000 /* Grant Support of SCC1 */ -#define CMXSCR_SC1 0x40000000 /* SCC1 connection */ -#define CMXSCR_RS1CS_MSK 0x38000000 /* Receive SCC1 Clock Source Mask */ -#define CMXSCR_TS1CS_MSK 0x07000000 /* Transmit SCC1 Clock Source Mask */ -#define CMXSCR_GR2 0x00800000 /* Grant Support of SCC2 */ -#define CMXSCR_SC2 0x00400000 /* SCC2 connection */ -#define CMXSCR_RS2CS_MSK 0x00380000 /* Receive SCC2 Clock Source Mask */ -#define CMXSCR_TS2CS_MSK 0x00070000 /* Transmit SCC2 Clock Source Mask */ -#define CMXSCR_GR3 0x00008000 /* Grant Support of SCC3 */ -#define CMXSCR_SC3 0x00004000 /* SCC3 connection */ -#define CMXSCR_RS3CS_MSK 0x00003800 /* Receive SCC3 Clock Source Mask */ -#define CMXSCR_TS3CS_MSK 0x00000700 /* Transmit SCC3 Clock Source Mask */ -#define CMXSCR_GR4 0x00000080 /* Grant Support of SCC4 */ -#define CMXSCR_SC4 0x00000040 /* SCC4 connection */ -#define CMXSCR_RS4CS_MSK 0x00000038 /* Receive SCC4 Clock Source Mask */ -#define CMXSCR_TS4CS_MSK 0x00000007 /* Transmit SCC4 Clock Source Mask */ - -#define CMXSCR_RS1CS_BRG1 0x00000000 /* SCC1 Rx Clock Source is BRG1 */ -#define CMXSCR_RS1CS_BRG2 0x08000000 /* SCC1 Rx Clock Source is BRG2 */ -#define CMXSCR_RS1CS_BRG3 0x10000000 /* SCC1 Rx Clock Source is BRG3 */ -#define CMXSCR_RS1CS_BRG4 0x18000000 /* SCC1 Rx Clock Source is BRG4 */ -#define CMXSCR_RS1CS_CLK11 0x20000000 /* SCC1 Rx Clock Source is CLK11 */ -#define CMXSCR_RS1CS_CLK12 0x28000000 /* SCC1 Rx Clock Source is CLK12 */ -#define CMXSCR_RS1CS_CLK3 0x30000000 /* SCC1 Rx Clock Source is CLK3 */ -#define CMXSCR_RS1CS_CLK4 0x38000000 /* SCC1 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS1CS_BRG1 0x00000000 /* SCC1 Tx Clock Source is BRG1 */ -#define CMXSCR_TS1CS_BRG2 0x01000000 /* SCC1 Tx Clock Source is BRG2 */ -#define CMXSCR_TS1CS_BRG3 0x02000000 /* SCC1 Tx Clock Source is BRG3 */ -#define CMXSCR_TS1CS_BRG4 0x03000000 /* SCC1 Tx Clock Source is BRG4 */ -#define CMXSCR_TS1CS_CLK11 0x04000000 /* SCC1 Tx Clock Source is CLK11 */ -#define CMXSCR_TS1CS_CLK12 0x05000000 /* SCC1 Tx Clock Source is CLK12 */ -#define CMXSCR_TS1CS_CLK3 0x06000000 /* SCC1 Tx Clock Source is CLK3 */ -#define CMXSCR_TS1CS_CLK4 0x07000000 /* SCC1 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS2CS_BRG1 0x00000000 /* SCC2 Rx Clock Source is BRG1 */ -#define CMXSCR_RS2CS_BRG2 0x00080000 /* SCC2 Rx Clock Source is BRG2 */ -#define CMXSCR_RS2CS_BRG3 0x00100000 /* SCC2 Rx Clock Source is BRG3 */ -#define CMXSCR_RS2CS_BRG4 0x00180000 /* SCC2 Rx Clock Source is BRG4 */ -#define CMXSCR_RS2CS_CLK11 0x00200000 /* SCC2 Rx Clock Source is CLK11 */ -#define CMXSCR_RS2CS_CLK12 0x00280000 /* SCC2 Rx Clock Source is CLK12 */ -#define CMXSCR_RS2CS_CLK3 0x00300000 /* SCC2 Rx Clock Source is CLK3 */ -#define CMXSCR_RS2CS_CLK4 0x00380000 /* SCC2 Rx Clock Source is CLK4 */ - -#define CMXSCR_TS2CS_BRG1 0x00000000 /* SCC2 Tx Clock Source is BRG1 */ -#define CMXSCR_TS2CS_BRG2 0x00010000 /* SCC2 Tx Clock Source is BRG2 */ -#define CMXSCR_TS2CS_BRG3 0x00020000 /* SCC2 Tx Clock Source is BRG3 */ -#define CMXSCR_TS2CS_BRG4 0x00030000 /* SCC2 Tx Clock Source is BRG4 */ -#define CMXSCR_TS2CS_CLK11 0x00040000 /* SCC2 Tx Clock Source is CLK11 */ -#define CMXSCR_TS2CS_CLK12 0x00050000 /* SCC2 Tx Clock Source is CLK12 */ -#define CMXSCR_TS2CS_CLK3 0x00060000 /* SCC2 Tx Clock Source is CLK3 */ -#define CMXSCR_TS2CS_CLK4 0x00070000 /* SCC2 Tx Clock Source is CLK4 */ - -#define CMXSCR_RS3CS_BRG1 0x00000000 /* SCC3 Rx Clock Source is BRG1 */ -#define CMXSCR_RS3CS_BRG2 0x00000800 /* SCC3 Rx Clock Source is BRG2 */ -#define CMXSCR_RS3CS_BRG3 0x00001000 /* SCC3 Rx Clock Source is BRG3 */ -#define CMXSCR_RS3CS_BRG4 0x00001800 /* SCC3 Rx Clock Source is BRG4 */ -#define CMXSCR_RS3CS_CLK5 0x00002000 /* SCC3 Rx Clock Source is CLK5 */ -#define CMXSCR_RS3CS_CLK6 0x00002800 /* SCC3 Rx Clock Source is CLK6 */ -#define CMXSCR_RS3CS_CLK7 0x00003000 /* SCC3 Rx Clock Source is CLK7 */ -#define CMXSCR_RS3CS_CLK8 0x00003800 /* SCC3 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS3CS_BRG1 0x00000000 /* SCC3 Tx Clock Source is BRG1 */ -#define CMXSCR_TS3CS_BRG2 0x00000100 /* SCC3 Tx Clock Source is BRG2 */ -#define CMXSCR_TS3CS_BRG3 0x00000200 /* SCC3 Tx Clock Source is BRG3 */ -#define CMXSCR_TS3CS_BRG4 0x00000300 /* SCC3 Tx Clock Source is BRG4 */ -#define CMXSCR_TS3CS_CLK5 0x00000400 /* SCC3 Tx Clock Source is CLK5 */ -#define CMXSCR_TS3CS_CLK6 0x00000500 /* SCC3 Tx Clock Source is CLK6 */ -#define CMXSCR_TS3CS_CLK7 0x00000600 /* SCC3 Tx Clock Source is CLK7 */ -#define CMXSCR_TS3CS_CLK8 0x00000700 /* SCC3 Tx Clock Source is CLK8 */ - -#define CMXSCR_RS4CS_BRG1 0x00000000 /* SCC4 Rx Clock Source is BRG1 */ -#define CMXSCR_RS4CS_BRG2 0x00000008 /* SCC4 Rx Clock Source is BRG2 */ -#define CMXSCR_RS4CS_BRG3 0x00000010 /* SCC4 Rx Clock Source is BRG3 */ -#define CMXSCR_RS4CS_BRG4 0x00000018 /* SCC4 Rx Clock Source is BRG4 */ -#define CMXSCR_RS4CS_CLK5 0x00000020 /* SCC4 Rx Clock Source is CLK5 */ -#define CMXSCR_RS4CS_CLK6 0x00000028 /* SCC4 Rx Clock Source is CLK6 */ -#define CMXSCR_RS4CS_CLK7 0x00000030 /* SCC4 Rx Clock Source is CLK7 */ -#define CMXSCR_RS4CS_CLK8 0x00000038 /* SCC4 Rx Clock Source is CLK8 */ - -#define CMXSCR_TS4CS_BRG1 0x00000000 /* SCC4 Tx Clock Source is BRG1 */ -#define CMXSCR_TS4CS_BRG2 0x00000001 /* SCC4 Tx Clock Source is BRG2 */ -#define CMXSCR_TS4CS_BRG3 0x00000002 /* SCC4 Tx Clock Source is BRG3 */ -#define CMXSCR_TS4CS_BRG4 0x00000003 /* SCC4 Tx Clock Source is BRG4 */ -#define CMXSCR_TS4CS_CLK5 0x00000004 /* SCC4 Tx Clock Source is CLK5 */ -#define CMXSCR_TS4CS_CLK6 0x00000005 /* SCC4 Tx Clock Source is CLK6 */ -#define CMXSCR_TS4CS_CLK7 0x00000006 /* SCC4 Tx Clock Source is CLK7 */ -#define CMXSCR_TS4CS_CLK8 0x00000007 /* SCC4 Tx Clock Source is CLK8 */ - -/*----------------------------------------------------------------------- - * SIUMCR - SIU Module Configuration Register 4-31 - */ -#define SIUMCR_BBD 0x80000000 /* Bus Busy Disable */ -#define SIUMCR_ESE 0x40000000 /* External Snoop Enable */ -#define SIUMCR_PBSE 0x20000000 /* Parity Byte Select Enable */ -#define SIUMCR_CDIS 0x10000000 /* Core Disable */ -#define SIUMCR_DPPC00 0x00000000 /* Data Parity Pins Configuration*/ -#define SIUMCR_DPPC01 0x04000000 /* - " - */ -#define SIUMCR_DPPC10 0x08000000 /* - " - */ -#define SIUMCR_DPPC11 0x0c000000 /* - " - */ -#define SIUMCR_L2CPC00 0x00000000 /* L2 Cache Pins Configuration */ -#define SIUMCR_L2CPC01 0x01000000 /* - " - */ -#define SIUMCR_L2CPC10 0x02000000 /* - " - */ -#define SIUMCR_L2CPC11 0x03000000 /* - " - */ -#define SIUMCR_LBPC00 0x00000000 /* Local Bus Pins Configuration */ -#define SIUMCR_LBPC01 0x00400000 /* - " - */ -#define SIUMCR_LBPC10 0x00800000 /* - " - */ -#define SIUMCR_LBPC11 0x00c00000 /* - " - */ -#define SIUMCR_APPC00 0x00000000 /* Address Parity Pins Configuration*/ -#define SIUMCR_APPC01 0x00100000 /* - " - */ -#define SIUMCR_APPC10 0x00200000 /* - " - */ -#define SIUMCR_APPC11 0x00300000 /* - " - */ -#define SIUMCR_CS10PC00 0x00000000 /* CS10 Pin Configuration */ -#define SIUMCR_CS10PC01 0x00040000 /* - " - */ -#define SIUMCR_CS10PC10 0x00080000 /* - " - */ -#define SIUMCR_CS10PC11 0x000c0000 /* - " - */ -#define SIUMCR_BCTLC00 0x00000000 /* Buffer Control Configuration */ -#define SIUMCR_BCTLC01 0x00010000 /* - " - */ -#define SIUMCR_BCTLC10 0x00020000 /* - " - */ -#define SIUMCR_BCTLC11 0x00030000 /* - " - */ -#define SIUMCR_MMR00 0x00000000 /* Mask Masters Requests */ -#define SIUMCR_MMR01 0x00004000 /* - " - */ -#define SIUMCR_MMR10 0x00008000 /* - " - */ -#define SIUMCR_MMR11 0x0000c000 /* - " - */ -#define SIUMCR_LPBSE 0x00002000 /* LocalBus Parity Byte Select Enable*/ - -/*----------------------------------------------------------------------- - * SCCR - System Clock Control Register 9-8 -*/ -#define SCCR_PCI_MODE 0x00000100 /* PCI Mode */ -#define SCCR_PCI_MODCK 0x00000080 /* Value of PCI_MODCK pin */ -#define SCCR_PCIDF_MSK 0x00000078 /* PCI division factor */ -#define SCCR_PCIDF_SHIFT 3 - -#ifndef CPM_IMMR_OFFSET -#define CPM_IMMR_OFFSET 0x101a8 -#endif - -#define FCC_PSMR_RMII ((uint)0x00020000) /* Use RMII interface */ - -/* FCC iop & clock configuration. BSP code is responsible to define Fx_RXCLK & Fx_TXCLK - * in order to use clock-computing stuff below for the FCC x - */ - -/* Automatically generates register configurations */ -#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ - -#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ -#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ -#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ -#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ -#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ -#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ - -#define PC_F1RXCLK PC_CLK(F1_RXCLK) -#define PC_F1TXCLK PC_CLK(F1_TXCLK) -#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) -#define CMX1_CLK_MASK ((uint)0xff000000) - -#define PC_F2RXCLK PC_CLK(F2_RXCLK) -#define PC_F2TXCLK PC_CLK(F2_TXCLK) -#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) -#define CMX2_CLK_MASK ((uint)0x00ff0000) - -#define PC_F3RXCLK PC_CLK(F3_RXCLK) -#define PC_F3TXCLK PC_CLK(F3_TXCLK) -#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) -#define CMX3_CLK_MASK ((uint)0x0000ff00) - -#define CPMUX_CLK_MASK (CMX3_CLK_MASK | CMX2_CLK_MASK) -#define CPMUX_CLK_ROUTE (CMX3_CLK_ROUTE | CMX2_CLK_ROUTE) - -#define CLK_TRX (PC_F3TXCLK | PC_F3RXCLK | PC_F2TXCLK | PC_F2RXCLK) - -/* I/O Pin assignment for FCC1. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PA1_COL 0x00000001U -#define PA1_CRS 0x00000002U -#define PA1_TXER 0x00000004U -#define PA1_TXEN 0x00000008U -#define PA1_RXDV 0x00000010U -#define PA1_RXER 0x00000020U -#define PA1_TXDAT 0x00003c00U -#define PA1_RXDAT 0x0003c000U -#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT) -#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \ - PA1_RXDV | PA1_RXER) -#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV) -#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER) - - -/* I/O Pin assignment for FCC2. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PB2_TXER 0x00000001U -#define PB2_RXDV 0x00000002U -#define PB2_TXEN 0x00000004U -#define PB2_RXER 0x00000008U -#define PB2_COL 0x00000010U -#define PB2_CRS 0x00000020U -#define PB2_TXDAT 0x000003c0U -#define PB2_RXDAT 0x00003c00U -#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \ - PB2_RXER | PB2_RXDV | PB2_TXER) -#define PB2_PSORB1 (PB2_TXEN) -#define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV) -#define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER) - - -/* I/O Pin assignment for FCC3. I don't yet know the best way to do this, - * but there is little variation among the choices. - */ -#define PB3_RXDV 0x00004000U -#define PB3_RXER 0x00008000U -#define PB3_TXER 0x00010000U -#define PB3_TXEN 0x00020000U -#define PB3_COL 0x00040000U -#define PB3_CRS 0x00080000U -#define PB3_TXDAT 0x0f000000U -#define PC3_TXDAT 0x00000010U -#define PB3_RXDAT 0x00f00000U -#define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \ - PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN) -#define PB3_PSORB1 0 -#define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV) -#define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER) -#define PC3_DIRC1 (PC3_TXDAT) - -/* Handy macro to specify mem for FCCs*/ -#define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) -#define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) -#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) -#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) - -/* Clocks and GRG's */ - -enum cpm_clk_dir { - CPM_CLK_RX, - CPM_CLK_TX, - CPM_CLK_RTX -}; - -enum cpm_clk_target { - CPM_CLK_SCC1, - CPM_CLK_SCC2, - CPM_CLK_SCC3, - CPM_CLK_SCC4, - CPM_CLK_FCC1, - CPM_CLK_FCC2, - CPM_CLK_FCC3, - CPM_CLK_SMC1, - CPM_CLK_SMC2, -}; - -enum cpm_clk { - CPM_CLK_NONE = 0, - CPM_BRG1, /* Baud Rate Generator 1 */ - CPM_BRG2, /* Baud Rate Generator 2 */ - CPM_BRG3, /* Baud Rate Generator 3 */ - CPM_BRG4, /* Baud Rate Generator 4 */ - CPM_BRG5, /* Baud Rate Generator 5 */ - CPM_BRG6, /* Baud Rate Generator 6 */ - CPM_BRG7, /* Baud Rate Generator 7 */ - CPM_BRG8, /* Baud Rate Generator 8 */ - CPM_CLK1, /* Clock 1 */ - CPM_CLK2, /* Clock 2 */ - CPM_CLK3, /* Clock 3 */ - CPM_CLK4, /* Clock 4 */ - CPM_CLK5, /* Clock 5 */ - CPM_CLK6, /* Clock 6 */ - CPM_CLK7, /* Clock 7 */ - CPM_CLK8, /* Clock 8 */ - CPM_CLK9, /* Clock 9 */ - CPM_CLK10, /* Clock 10 */ - CPM_CLK11, /* Clock 11 */ - CPM_CLK12, /* Clock 12 */ - CPM_CLK13, /* Clock 13 */ - CPM_CLK14, /* Clock 14 */ - CPM_CLK15, /* Clock 15 */ - CPM_CLK16, /* Clock 16 */ - CPM_CLK17, /* Clock 17 */ - CPM_CLK18, /* Clock 18 */ - CPM_CLK19, /* Clock 19 */ - CPM_CLK20, /* Clock 20 */ - CPM_CLK_DUMMY -}; - -extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode); -extern int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock); - -#define CPM_PIN_INPUT 0 -#define CPM_PIN_OUTPUT 1 -#define CPM_PIN_PRIMARY 0 -#define CPM_PIN_SECONDARY 2 -#define CPM_PIN_GPIO 4 -#define CPM_PIN_OPENDRAIN 8 - -void cpm2_set_pin(int port, int pin, int flags); - -#endif /* __CPM2__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h deleted file mode 100644 index ef8a248..0000000 --- a/include/asm-powerpc/cputable.h +++ /dev/null @@ -1,514 +0,0 @@ -#ifndef __ASM_POWERPC_CPUTABLE_H -#define __ASM_POWERPC_CPUTABLE_H - -#define PPC_FEATURE_32 0x80000000 -#define PPC_FEATURE_64 0x40000000 -#define PPC_FEATURE_601_INSTR 0x20000000 -#define PPC_FEATURE_HAS_ALTIVEC 0x10000000 -#define PPC_FEATURE_HAS_FPU 0x08000000 -#define PPC_FEATURE_HAS_MMU 0x04000000 -#define PPC_FEATURE_HAS_4xxMAC 0x02000000 -#define PPC_FEATURE_UNIFIED_CACHE 0x01000000 -#define PPC_FEATURE_HAS_SPE 0x00800000 -#define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 -#define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 -#define PPC_FEATURE_NO_TB 0x00100000 -#define PPC_FEATURE_POWER4 0x00080000 -#define PPC_FEATURE_POWER5 0x00040000 -#define PPC_FEATURE_POWER5_PLUS 0x00020000 -#define PPC_FEATURE_CELL 0x00010000 -#define PPC_FEATURE_BOOKE 0x00008000 -#define PPC_FEATURE_SMT 0x00004000 -#define PPC_FEATURE_ICACHE_SNOOP 0x00002000 -#define PPC_FEATURE_ARCH_2_05 0x00001000 -#define PPC_FEATURE_PA6T 0x00000800 -#define PPC_FEATURE_HAS_DFP 0x00000400 -#define PPC_FEATURE_POWER6_EXT 0x00000200 -#define PPC_FEATURE_ARCH_2_06 0x00000100 -#define PPC_FEATURE_HAS_VSX 0x00000080 - -#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \ - 0x00000040 - -#define PPC_FEATURE_TRUE_LE 0x00000002 -#define PPC_FEATURE_PPC_LE 0x00000001 - -#ifdef __KERNEL__ - -#include -#include - -#ifndef __ASSEMBLY__ - -/* This structure can grow, it's real size is used by head.S code - * via the mkdefs mechanism. - */ -struct cpu_spec; - -typedef void (*cpu_setup_t)(unsigned long offset, struct cpu_spec* spec); -typedef void (*cpu_restore_t)(void); - -enum powerpc_oprofile_type { - PPC_OPROFILE_INVALID = 0, - PPC_OPROFILE_RS64 = 1, - PPC_OPROFILE_POWER4 = 2, - PPC_OPROFILE_G4 = 3, - PPC_OPROFILE_FSL_EMB = 4, - PPC_OPROFILE_CELL = 5, - PPC_OPROFILE_PA6T = 6, -}; - -enum powerpc_pmc_type { - PPC_PMC_DEFAULT = 0, - PPC_PMC_IBM = 1, - PPC_PMC_PA6T = 2, -}; - -struct pt_regs; - -extern int machine_check_generic(struct pt_regs *regs); -extern int machine_check_4xx(struct pt_regs *regs); -extern int machine_check_440A(struct pt_regs *regs); -extern int machine_check_e500(struct pt_regs *regs); -extern int machine_check_e200(struct pt_regs *regs); - -/* NOTE WELL: Update identify_cpu() if fields are added or removed! */ -struct cpu_spec { - /* CPU is matched via (PVR & pvr_mask) == pvr_value */ - unsigned int pvr_mask; - unsigned int pvr_value; - - char *cpu_name; - unsigned long cpu_features; /* Kernel features */ - unsigned int cpu_user_features; /* Userland features */ - - /* cache line sizes */ - unsigned int icache_bsize; - unsigned int dcache_bsize; - - /* number of performance monitor counters */ - unsigned int num_pmcs; - enum powerpc_pmc_type pmc_type; - - /* this is called to initialize various CPU bits like L1 cache, - * BHT, SPD, etc... from head.S before branching to identify_machine - */ - cpu_setup_t cpu_setup; - /* Used to restore cpu setup on secondary processors and at resume */ - cpu_restore_t cpu_restore; - - /* Used by oprofile userspace to select the right counters */ - char *oprofile_cpu_type; - - /* Processor specific oprofile operations */ - enum powerpc_oprofile_type oprofile_type; - - /* Bit locations inside the mmcra change */ - unsigned long oprofile_mmcra_sihv; - unsigned long oprofile_mmcra_sipr; - - /* Bits to clear during an oprofile exception */ - unsigned long oprofile_mmcra_clear; - - /* Name of processor class, for the ELF AT_PLATFORM entry */ - char *platform; - - /* Processor specific machine check handling. Return negative - * if the error is fatal, 1 if it was fully recovered and 0 to - * pass up (not CPU originated) */ - int (*machine_check)(struct pt_regs *regs); -}; - -extern struct cpu_spec *cur_cpu_spec; - -extern unsigned int __start___ftr_fixup, __stop___ftr_fixup; - -extern struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr); -extern void do_feature_fixups(unsigned long value, void *fixup_start, - void *fixup_end); - -extern const char *powerpc_base_platform; - -#endif /* __ASSEMBLY__ */ - -/* CPU kernel features */ - -/* Retain the 32b definitions all use bottom half of word */ -#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000000000000001) -#define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) -#define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) -#define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) -#define CPU_FTR_TAU ASM_CONST(0x0000000000000010) -#define CPU_FTR_CAN_DOZE ASM_CONST(0x0000000000000020) -#define CPU_FTR_USE_TB ASM_CONST(0x0000000000000040) -#define CPU_FTR_L2CSR ASM_CONST(0x0000000000000080) -#define CPU_FTR_601 ASM_CONST(0x0000000000000100) -#define CPU_FTR_HPTE_TABLE ASM_CONST(0x0000000000000200) -#define CPU_FTR_CAN_NAP ASM_CONST(0x0000000000000400) -#define CPU_FTR_L3CR ASM_CONST(0x0000000000000800) -#define CPU_FTR_L3_DISABLE_NAP ASM_CONST(0x0000000000001000) -#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000) -#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000) -#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000) -#define CPU_FTR_HAS_HIGH_BATS ASM_CONST(0x0000000000010000) -#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000) -#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000) -#define CPU_FTR_BIG_PHYS ASM_CONST(0x0000000000080000) -#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000) -#define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) -#define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) -#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000) -#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000) -#define CPU_FTR_SPE ASM_CONST(0x0000000002000000) -#define CPU_FTR_NEED_PAIRED_STWCX ASM_CONST(0x0000000004000000) -#define CPU_FTR_LWSYNC ASM_CONST(0x0000000008000000) - -/* - * Add the 64-bit processor unique features in the top half of the word; - * on 32-bit, make the names available but defined to be 0. - */ -#ifdef __powerpc64__ -#define LONG_ASM_CONST(x) ASM_CONST(x) -#else -#define LONG_ASM_CONST(x) 0 -#endif - -#define CPU_FTR_SLB LONG_ASM_CONST(0x0000000100000000) -#define CPU_FTR_16M_PAGE LONG_ASM_CONST(0x0000000200000000) -#define CPU_FTR_TLBIEL LONG_ASM_CONST(0x0000000400000000) -#define CPU_FTR_NOEXECUTE LONG_ASM_CONST(0x0000000800000000) -#define CPU_FTR_IABR LONG_ASM_CONST(0x0000002000000000) -#define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) -#define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) -#define CPU_FTR_SMT LONG_ASM_CONST(0x0000010000000000) -#define CPU_FTR_LOCKLESS_TLBIE LONG_ASM_CONST(0x0000040000000000) -#define CPU_FTR_CI_LARGE_PAGE LONG_ASM_CONST(0x0000100000000000) -#define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) -#define CPU_FTR_PURR LONG_ASM_CONST(0x0000400000000000) -#define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000) -#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000) -#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000) -#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000) -#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000) -#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000) -#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000) - -#ifndef __ASSEMBLY__ - -#define CPU_FTR_PPCAS_ARCH_V2 (CPU_FTR_SLB | \ - CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \ - CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE) - -/* We only set the altivec features if the kernel was compiled with altivec - * support - */ -#ifdef CONFIG_ALTIVEC -#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC -#define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC -#else -#define CPU_FTR_ALTIVEC_COMP 0 -#define PPC_FEATURE_HAS_ALTIVEC_COMP 0 -#endif - -/* We only set the VSX features if the kernel was compiled with VSX - * support - */ -#ifdef CONFIG_VSX -#define CPU_FTR_VSX_COMP CPU_FTR_VSX -#define PPC_FEATURE_HAS_VSX_COMP PPC_FEATURE_HAS_VSX -#else -#define CPU_FTR_VSX_COMP 0 -#define PPC_FEATURE_HAS_VSX_COMP 0 -#endif - -/* We only set the spe features if the kernel was compiled with spe - * support - */ -#ifdef CONFIG_SPE -#define CPU_FTR_SPE_COMP CPU_FTR_SPE -#define PPC_FEATURE_HAS_SPE_COMP PPC_FEATURE_HAS_SPE -#define PPC_FEATURE_HAS_EFP_SINGLE_COMP PPC_FEATURE_HAS_EFP_SINGLE -#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP PPC_FEATURE_HAS_EFP_DOUBLE -#else -#define CPU_FTR_SPE_COMP 0 -#define PPC_FEATURE_HAS_SPE_COMP 0 -#define PPC_FEATURE_HAS_EFP_SINGLE_COMP 0 -#define PPC_FEATURE_HAS_EFP_DOUBLE_COMP 0 -#endif - -/* We need to mark all pages as being coherent if we're SMP or we have a - * 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II - * require it for PCI "streaming/prefetch" to work properly. - */ -#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \ - || defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) -#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT -#else -#define CPU_FTR_COMMON 0 -#endif - -/* The powersave features NAP & DOZE seems to confuse BDI when - debugging. So if a BDI is used, disable theses - */ -#ifndef CONFIG_BDI_SWITCH -#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE -#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP -#else -#define CPU_FTR_MAYBE_CAN_DOZE 0 -#define CPU_FTR_MAYBE_CAN_NAP 0 -#endif - -#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \ - !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ - !defined(CONFIG_BOOKE)) - -#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE | \ - CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE) -#define CPU_FTRS_603 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_604 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_PPC_LE) -#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_740 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_PPC_LE) -#define CPU_FTRS_750 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_PPC_LE) -#define CPU_FTRS_750CL (CPU_FTRS_750 | CPU_FTR_HAS_HIGH_BATS) -#define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM) -#define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM) -#define CPU_FTRS_750FX (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | \ - CPU_FTR_HAS_HIGH_BATS) -#define CPU_FTRS_750GX (CPU_FTRS_750FX) -#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_7400 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ - CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_NEED_PAIRED_STWCX | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE | \ - CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7447 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7447A (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_7448 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_PPC_LE | CPU_FTR_NEED_PAIRED_STWCX) -#define CPU_FTRS_82XX (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) -#define CPU_FTRS_G2_LE (CPU_FTR_COMMON | CPU_FTR_MAYBE_CAN_DOZE | \ - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS) -#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_COMMON) -#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \ - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ - CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) -#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | \ - CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE) -#define CPU_FTRS_8XX (CPU_FTR_USE_TB) -#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_SPE_COMP | \ - CPU_FTR_NODSISRALIGN | CPU_FTR_COHERENT_ICACHE | \ - CPU_FTR_UNIFIED_ID_CACHE) -#define CPU_FTRS_E500 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ - CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ - CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | \ - CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN | \ - CPU_FTR_L2CSR | CPU_FTR_LWSYNC) -#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) - -/* 64-bit CPUs */ -#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) -#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \ - CPU_FTR_MMCRA | CPU_FTR_CTRL) -#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_MMCRA) -#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) -#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_MMCRA | CPU_FTR_SMT | \ - CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ - CPU_FTR_PURR) -#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_MMCRA | CPU_FTR_SMT | \ - CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ - CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ - CPU_FTR_DSCR) -#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_MMCRA | CPU_FTR_SMT | \ - CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ - CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ - CPU_FTR_DSCR | CPU_FTR_SAO) -#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ - CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ - CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) -#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ - CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ - CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B) -#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \ - CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) - -#ifdef __powerpc64__ -#define CPU_FTRS_POSSIBLE \ - (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ - CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ - CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \ - CPU_FTR_1T_SEGMENT | CPU_FTR_VSX) -#else -enum { - CPU_FTRS_POSSIBLE = -#if CLASSIC_PPC - CPU_FTRS_PPC601 | CPU_FTRS_603 | CPU_FTRS_604 | CPU_FTRS_740_NOTAU | - CPU_FTRS_740 | CPU_FTRS_750 | CPU_FTRS_750FX1 | - CPU_FTRS_750FX2 | CPU_FTRS_750FX | CPU_FTRS_750GX | - CPU_FTRS_7400_NOTAU | CPU_FTRS_7400 | CPU_FTRS_7450_20 | - CPU_FTRS_7450_21 | CPU_FTRS_7450_23 | CPU_FTRS_7455_1 | - CPU_FTRS_7455_20 | CPU_FTRS_7455 | CPU_FTRS_7447_10 | - CPU_FTRS_7447 | CPU_FTRS_7447A | CPU_FTRS_82XX | - CPU_FTRS_G2_LE | CPU_FTRS_E300 | CPU_FTRS_E300C2 | - CPU_FTRS_CLASSIC32 | -#else - CPU_FTRS_GENERIC_32 | -#endif -#ifdef CONFIG_8xx - CPU_FTRS_8XX | -#endif -#ifdef CONFIG_40x - CPU_FTRS_40X | -#endif -#ifdef CONFIG_44x - CPU_FTRS_44X | -#endif -#ifdef CONFIG_E200 - CPU_FTRS_E200 | -#endif -#ifdef CONFIG_E500 - CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC | -#endif - 0, -}; -#endif /* __powerpc64__ */ - -#ifdef __powerpc64__ -#define CPU_FTRS_ALWAYS \ - (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ - CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ - CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE) -#else -enum { - CPU_FTRS_ALWAYS = -#if CLASSIC_PPC - CPU_FTRS_PPC601 & CPU_FTRS_603 & CPU_FTRS_604 & CPU_FTRS_740_NOTAU & - CPU_FTRS_740 & CPU_FTRS_750 & CPU_FTRS_750FX1 & - CPU_FTRS_750FX2 & CPU_FTRS_750FX & CPU_FTRS_750GX & - CPU_FTRS_7400_NOTAU & CPU_FTRS_7400 & CPU_FTRS_7450_20 & - CPU_FTRS_7450_21 & CPU_FTRS_7450_23 & CPU_FTRS_7455_1 & - CPU_FTRS_7455_20 & CPU_FTRS_7455 & CPU_FTRS_7447_10 & - CPU_FTRS_7447 & CPU_FTRS_7447A & CPU_FTRS_82XX & - CPU_FTRS_G2_LE & CPU_FTRS_E300 & CPU_FTRS_E300C2 & - CPU_FTRS_CLASSIC32 & -#else - CPU_FTRS_GENERIC_32 & -#endif -#ifdef CONFIG_8xx - CPU_FTRS_8XX & -#endif -#ifdef CONFIG_40x - CPU_FTRS_40X & -#endif -#ifdef CONFIG_44x - CPU_FTRS_44X & -#endif -#ifdef CONFIG_E200 - CPU_FTRS_E200 & -#endif -#ifdef CONFIG_E500 - CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC & -#endif - CPU_FTRS_POSSIBLE, -}; -#endif /* __powerpc64__ */ - -static inline int cpu_has_feature(unsigned long feature) -{ - return (CPU_FTRS_ALWAYS & feature) || - (CPU_FTRS_POSSIBLE - & cur_cpu_spec->cpu_features - & feature); -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_CPUTABLE_H */ diff --git a/include/asm-powerpc/cputhreads.h b/include/asm-powerpc/cputhreads.h deleted file mode 100644 index fb11b0c..0000000 --- a/include/asm-powerpc/cputhreads.h +++ /dev/null @@ -1,71 +0,0 @@ -#ifndef _ASM_POWERPC_CPUTHREADS_H -#define _ASM_POWERPC_CPUTHREADS_H - -#include - -/* - * Mapping of threads to cores - */ - -#ifdef CONFIG_SMP -extern int threads_per_core; -extern int threads_shift; -extern cpumask_t threads_core_mask; -#else -#define threads_per_core 1 -#define threads_shift 0 -#define threads_core_mask (CPU_MASK_CPU0) -#endif - -/* cpu_thread_mask_to_cores - Return a cpumask of one per cores - * hit by the argument - * - * @threads: a cpumask of threads - * - * This function returns a cpumask which will have one "cpu" (or thread) - * bit set for each core that has at least one thread set in the argument. - * - * This can typically be used for things like IPI for tlb invalidations - * since those need to be done only once per core/TLB - */ -static inline cpumask_t cpu_thread_mask_to_cores(cpumask_t threads) -{ - cpumask_t tmp, res; - int i; - - res = CPU_MASK_NONE; - for (i = 0; i < NR_CPUS; i += threads_per_core) { - cpus_shift_left(tmp, threads_core_mask, i); - if (cpus_intersects(threads, tmp)) - cpu_set(i, res); - } - return res; -} - -static inline int cpu_nr_cores(void) -{ - return NR_CPUS >> threads_shift; -} - -static inline cpumask_t cpu_online_cores_map(void) -{ - return cpu_thread_mask_to_cores(cpu_online_map); -} - -static inline int cpu_thread_to_core(int cpu) -{ - return cpu >> threads_shift; -} - -static inline int cpu_thread_in_core(int cpu) -{ - return cpu & (threads_per_core - 1); -} - -static inline int cpu_first_thread_in_core(int cpu) -{ - return cpu & ~(threads_per_core - 1); -} - -#endif /* _ASM_POWERPC_CPUTHREADS_H */ - diff --git a/include/asm-powerpc/cputime.h b/include/asm-powerpc/cputime.h deleted file mode 100644 index f42e623..0000000 --- a/include/asm-powerpc/cputime.h +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Definitions for measuring cputime on powerpc machines. - * - * Copyright (C) 2006 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * If we have CONFIG_VIRT_CPU_ACCOUNTING, we measure cpu time in - * the same units as the timebase. Otherwise we measure cpu time - * in jiffies using the generic definitions. - */ - -#ifndef __POWERPC_CPUTIME_H -#define __POWERPC_CPUTIME_H - -#ifndef CONFIG_VIRT_CPU_ACCOUNTING -#include -#else - -#include -#include -#include -#include -#include - -typedef u64 cputime_t; -typedef u64 cputime64_t; - -#define cputime_zero ((cputime_t)0) -#define cputime_max ((~((cputime_t)0) >> 1) - 1) -#define cputime_add(__a, __b) ((__a) + (__b)) -#define cputime_sub(__a, __b) ((__a) - (__b)) -#define cputime_div(__a, __n) ((__a) / (__n)) -#define cputime_halve(__a) ((__a) >> 1) -#define cputime_eq(__a, __b) ((__a) == (__b)) -#define cputime_gt(__a, __b) ((__a) > (__b)) -#define cputime_ge(__a, __b) ((__a) >= (__b)) -#define cputime_lt(__a, __b) ((__a) < (__b)) -#define cputime_le(__a, __b) ((__a) <= (__b)) - -#define cputime64_zero ((cputime64_t)0) -#define cputime64_add(__a, __b) ((__a) + (__b)) -#define cputime64_sub(__a, __b) ((__a) - (__b)) -#define cputime_to_cputime64(__ct) (__ct) - -#ifdef __KERNEL__ - -/* - * Convert cputime <-> jiffies - */ -extern u64 __cputime_jiffies_factor; -DECLARE_PER_CPU(unsigned long, cputime_last_delta); -DECLARE_PER_CPU(unsigned long, cputime_scaled_last_delta); - -static inline unsigned long cputime_to_jiffies(const cputime_t ct) -{ - return mulhdu(ct, __cputime_jiffies_factor); -} - -/* Estimate the scaled cputime by scaling the real cputime based on - * the last scaled to real ratio */ -static inline cputime_t cputime_to_scaled(const cputime_t ct) -{ - if (cpu_has_feature(CPU_FTR_SPURR) && - per_cpu(cputime_last_delta, smp_processor_id())) - return ct * - per_cpu(cputime_scaled_last_delta, smp_processor_id())/ - per_cpu(cputime_last_delta, smp_processor_id()); - return ct; -} - -static inline cputime_t jiffies_to_cputime(const unsigned long jif) -{ - cputime_t ct; - unsigned long sec; - - /* have to be a little careful about overflow */ - ct = jif % HZ; - sec = jif / HZ; - if (ct) { - ct *= tb_ticks_per_sec; - do_div(ct, HZ); - } - if (sec) - ct += (cputime_t) sec * tb_ticks_per_sec; - return ct; -} - -static inline cputime64_t jiffies64_to_cputime64(const u64 jif) -{ - cputime_t ct; - u64 sec; - - /* have to be a little careful about overflow */ - ct = jif % HZ; - sec = jif / HZ; - if (ct) { - ct *= tb_ticks_per_sec; - do_div(ct, HZ); - } - if (sec) - ct += (cputime_t) sec * tb_ticks_per_sec; - return ct; -} - -static inline u64 cputime64_to_jiffies64(const cputime_t ct) -{ - return mulhdu(ct, __cputime_jiffies_factor); -} - -/* - * Convert cputime <-> milliseconds - */ -extern u64 __cputime_msec_factor; - -static inline unsigned long cputime_to_msecs(const cputime_t ct) -{ - return mulhdu(ct, __cputime_msec_factor); -} - -static inline cputime_t msecs_to_cputime(const unsigned long ms) -{ - cputime_t ct; - unsigned long sec; - - /* have to be a little careful about overflow */ - ct = ms % 1000; - sec = ms / 1000; - if (ct) { - ct *= tb_ticks_per_sec; - do_div(ct, 1000); - } - if (sec) - ct += (cputime_t) sec * tb_ticks_per_sec; - return ct; -} - -/* - * Convert cputime <-> seconds - */ -extern u64 __cputime_sec_factor; - -static inline unsigned long cputime_to_secs(const cputime_t ct) -{ - return mulhdu(ct, __cputime_sec_factor); -} - -static inline cputime_t secs_to_cputime(const unsigned long sec) -{ - return (cputime_t) sec * tb_ticks_per_sec; -} - -/* - * Convert cputime <-> timespec - */ -static inline void cputime_to_timespec(const cputime_t ct, struct timespec *p) -{ - u64 x = ct; - unsigned int frac; - - frac = do_div(x, tb_ticks_per_sec); - p->tv_sec = x; - x = (u64) frac * 1000000000; - do_div(x, tb_ticks_per_sec); - p->tv_nsec = x; -} - -static inline cputime_t timespec_to_cputime(const struct timespec *p) -{ - cputime_t ct; - - ct = (u64) p->tv_nsec * tb_ticks_per_sec; - do_div(ct, 1000000000); - return ct + (u64) p->tv_sec * tb_ticks_per_sec; -} - -/* - * Convert cputime <-> timeval - */ -static inline void cputime_to_timeval(const cputime_t ct, struct timeval *p) -{ - u64 x = ct; - unsigned int frac; - - frac = do_div(x, tb_ticks_per_sec); - p->tv_sec = x; - x = (u64) frac * 1000000; - do_div(x, tb_ticks_per_sec); - p->tv_usec = x; -} - -static inline cputime_t timeval_to_cputime(const struct timeval *p) -{ - cputime_t ct; - - ct = (u64) p->tv_usec * tb_ticks_per_sec; - do_div(ct, 1000000); - return ct + (u64) p->tv_sec * tb_ticks_per_sec; -} - -/* - * Convert cputime <-> clock_t (units of 1/USER_HZ seconds) - */ -extern u64 __cputime_clockt_factor; - -static inline unsigned long cputime_to_clock_t(const cputime_t ct) -{ - return mulhdu(ct, __cputime_clockt_factor); -} - -static inline cputime_t clock_t_to_cputime(const unsigned long clk) -{ - cputime_t ct; - unsigned long sec; - - /* have to be a little careful about overflow */ - ct = clk % USER_HZ; - sec = clk / USER_HZ; - if (ct) { - ct *= tb_ticks_per_sec; - do_div(ct, USER_HZ); - } - if (sec) - ct += (cputime_t) sec * tb_ticks_per_sec; - return ct; -} - -#define cputime64_to_clock_t(ct) cputime_to_clock_t((cputime_t)(ct)) - -#endif /* __KERNEL__ */ -#endif /* CONFIG_VIRT_CPU_ACCOUNTING */ -#endif /* __POWERPC_CPUTIME_H */ diff --git a/include/asm-powerpc/current.h b/include/asm-powerpc/current.h deleted file mode 100644 index e2c7f06..0000000 --- a/include/asm-powerpc/current.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef _ASM_POWERPC_CURRENT_H -#define _ASM_POWERPC_CURRENT_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -struct task_struct; - -#ifdef __powerpc64__ -#include -#include - -static inline struct task_struct *get_current(void) -{ - struct task_struct *task; - - __asm__ __volatile__("ld %0,%1(13)" - : "=r" (task) - : "i" (offsetof(struct paca_struct, __current))); - - return task; -} -#define current get_current() - -#else - -/* - * We keep `current' in r2 for speed. - */ -register struct task_struct *current asm ("r2"); - -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_CURRENT_H */ diff --git a/include/asm-powerpc/dbdma.h b/include/asm-powerpc/dbdma.h deleted file mode 100644 index e23f07e..0000000 --- a/include/asm-powerpc/dbdma.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Definitions for using the Apple Descriptor-Based DMA controller - * in Power Macintosh computers. - * - * Copyright (C) 1996 Paul Mackerras. - */ - -#ifdef __KERNEL__ -#ifndef _ASM_DBDMA_H_ -#define _ASM_DBDMA_H_ -/* - * DBDMA control/status registers. All little-endian. - */ -struct dbdma_regs { - unsigned int control; /* lets you change bits in status */ - unsigned int status; /* DMA and device status bits (see below) */ - unsigned int cmdptr_hi; /* upper 32 bits of command address */ - unsigned int cmdptr; /* (lower 32 bits of) command address (phys) */ - unsigned int intr_sel; /* select interrupt condition bit */ - unsigned int br_sel; /* select branch condition bit */ - unsigned int wait_sel; /* select wait condition bit */ - unsigned int xfer_mode; - unsigned int data2ptr_hi; - unsigned int data2ptr; - unsigned int res1; - unsigned int address_hi; - unsigned int br_addr_hi; - unsigned int res2[3]; -}; - -/* Bits in control and status registers */ -#define RUN 0x8000 -#define PAUSE 0x4000 -#define FLUSH 0x2000 -#define WAKE 0x1000 -#define DEAD 0x0800 -#define ACTIVE 0x0400 -#define BT 0x0100 -#define DEVSTAT 0x00ff - -/* - * DBDMA command structure. These fields are all little-endian! - */ -struct dbdma_cmd { - unsigned short req_count; /* requested byte transfer count */ - unsigned short command; /* command word (has bit-fields) */ - unsigned int phy_addr; /* physical data address */ - unsigned int cmd_dep; /* command-dependent field */ - unsigned short res_count; /* residual count after completion */ - unsigned short xfer_status; /* transfer status */ -}; - -/* DBDMA command values in command field */ -#define OUTPUT_MORE 0 /* transfer memory data to stream */ -#define OUTPUT_LAST 0x1000 /* ditto followed by end marker */ -#define INPUT_MORE 0x2000 /* transfer stream data to memory */ -#define INPUT_LAST 0x3000 /* ditto, expect end marker */ -#define STORE_WORD 0x4000 /* write word (4 bytes) to device reg */ -#define LOAD_WORD 0x5000 /* read word (4 bytes) from device reg */ -#define DBDMA_NOP 0x6000 /* do nothing */ -#define DBDMA_STOP 0x7000 /* suspend processing */ - -/* Key values in command field */ -#define KEY_STREAM0 0 /* usual data stream */ -#define KEY_STREAM1 0x100 /* control/status stream */ -#define KEY_STREAM2 0x200 /* device-dependent stream */ -#define KEY_STREAM3 0x300 /* device-dependent stream */ -#define KEY_REGS 0x500 /* device register space */ -#define KEY_SYSTEM 0x600 /* system memory-mapped space */ -#define KEY_DEVICE 0x700 /* device memory-mapped space */ - -/* Interrupt control values in command field */ -#define INTR_NEVER 0 /* don't interrupt */ -#define INTR_IFSET 0x10 /* intr if condition bit is 1 */ -#define INTR_IFCLR 0x20 /* intr if condition bit is 0 */ -#define INTR_ALWAYS 0x30 /* always interrupt */ - -/* Branch control values in command field */ -#define BR_NEVER 0 /* don't branch */ -#define BR_IFSET 0x4 /* branch if condition bit is 1 */ -#define BR_IFCLR 0x8 /* branch if condition bit is 0 */ -#define BR_ALWAYS 0xc /* always branch */ - -/* Wait control values in command field */ -#define WAIT_NEVER 0 /* don't wait */ -#define WAIT_IFSET 1 /* wait if condition bit is 1 */ -#define WAIT_IFCLR 2 /* wait if condition bit is 0 */ -#define WAIT_ALWAYS 3 /* always wait */ - -/* Align an address for a DBDMA command structure */ -#define DBDMA_ALIGN(x) (((unsigned long)(x) + sizeof(struct dbdma_cmd) - 1) \ - & -sizeof(struct dbdma_cmd)) - -/* Useful macros */ -#define DBDMA_DO_STOP(regs) do { \ - out_le32(&((regs)->control), (RUN|FLUSH)<<16); \ - while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH)) \ - ; \ -} while(0) - -#define DBDMA_DO_RESET(regs) do { \ - out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\ - while(in_le32(&((regs)->status)) & (RUN)) \ - ; \ -} while(0) - -#endif /* _ASM_DBDMA_H_ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/dcr-generic.h b/include/asm-powerpc/dcr-generic.h deleted file mode 100644 index 35b7159..0000000 --- a/include/asm-powerpc/dcr-generic.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_DCR_GENERIC_H -#define _ASM_POWERPC_DCR_GENERIC_H -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ - -enum host_type_t {DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID}; - -typedef struct { - enum host_type_t type; - union { - dcr_host_mmio_t mmio; - dcr_host_native_t native; - } host; -} dcr_host_t; - -extern bool dcr_map_ok_generic(dcr_host_t host); - -extern dcr_host_t dcr_map_generic(struct device_node *dev, unsigned int dcr_n, - unsigned int dcr_c); -extern void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c); - -extern u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n); - -extern void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value); - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DCR_GENERIC_H */ - - diff --git a/include/asm-powerpc/dcr-mmio.h b/include/asm-powerpc/dcr-mmio.h deleted file mode 100644 index acd491d..0000000 --- a/include/asm-powerpc/dcr-mmio.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_DCR_MMIO_H -#define _ASM_POWERPC_DCR_MMIO_H -#ifdef __KERNEL__ - -#include - -typedef struct { - void __iomem *token; - unsigned int stride; - unsigned int base; -} dcr_host_mmio_t; - -static inline bool dcr_map_ok_mmio(dcr_host_mmio_t host) -{ - return host.token != NULL; -} - -extern dcr_host_mmio_t dcr_map_mmio(struct device_node *dev, - unsigned int dcr_n, - unsigned int dcr_c); -extern void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c); - -static inline u32 dcr_read_mmio(dcr_host_mmio_t host, unsigned int dcr_n) -{ - return in_be32(host.token + ((host.base + dcr_n) * host.stride)); -} - -static inline void dcr_write_mmio(dcr_host_mmio_t host, - unsigned int dcr_n, - u32 value) -{ - out_be32(host.token + ((host.base + dcr_n) * host.stride), value); -} - -extern u64 of_translate_dcr_address(struct device_node *dev, - unsigned int dcr_n, - unsigned int *stride); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DCR_MMIO_H */ - - diff --git a/include/asm-powerpc/dcr-native.h b/include/asm-powerpc/dcr-native.h deleted file mode 100644 index 72d2b72..0000000 --- a/include/asm-powerpc/dcr-native.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_DCR_NATIVE_H -#define _ASM_POWERPC_DCR_NATIVE_H -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ - -#include - -typedef struct { - unsigned int base; -} dcr_host_native_t; - -static inline bool dcr_map_ok_native(dcr_host_native_t host) -{ - return 1; -} - -#define dcr_map_native(dev, dcr_n, dcr_c) \ - ((dcr_host_native_t){ .base = (dcr_n) }) -#define dcr_unmap_native(host, dcr_c) do {} while (0) -#define dcr_read_native(host, dcr_n) mfdcr(dcr_n + host.base) -#define dcr_write_native(host, dcr_n, value) mtdcr(dcr_n + host.base, value) - -/* Device Control Registers */ -void __mtdcr(int reg, unsigned int val); -unsigned int __mfdcr(int reg); -#define mfdcr(rn) \ - ({unsigned int rval; \ - if (__builtin_constant_p(rn)) \ - asm volatile("mfdcr %0," __stringify(rn) \ - : "=r" (rval)); \ - else \ - rval = __mfdcr(rn); \ - rval;}) - -#define mtdcr(rn, v) \ -do { \ - if (__builtin_constant_p(rn)) \ - asm volatile("mtdcr " __stringify(rn) ",%0" \ - : : "r" (v)); \ - else \ - __mtdcr(rn, v); \ -} while (0) - -/* R/W of indirect DCRs make use of standard naming conventions for DCRs */ -extern spinlock_t dcr_ind_lock; - -static inline unsigned __mfdcri(int base_addr, int base_data, int reg) -{ - unsigned long flags; - unsigned int val; - - spin_lock_irqsave(&dcr_ind_lock, flags); - __mtdcr(base_addr, reg); - val = __mfdcr(base_data); - spin_unlock_irqrestore(&dcr_ind_lock, flags); - return val; -} - -static inline void __mtdcri(int base_addr, int base_data, int reg, - unsigned val) -{ - unsigned long flags; - - spin_lock_irqsave(&dcr_ind_lock, flags); - __mtdcr(base_addr, reg); - __mtdcr(base_data, val); - spin_unlock_irqrestore(&dcr_ind_lock, flags); -} - -static inline void __dcri_clrset(int base_addr, int base_data, int reg, - unsigned clr, unsigned set) -{ - unsigned long flags; - unsigned int val; - - spin_lock_irqsave(&dcr_ind_lock, flags); - __mtdcr(base_addr, reg); - val = (__mfdcr(base_data) & ~clr) | set; - __mtdcr(base_data, val); - spin_unlock_irqrestore(&dcr_ind_lock, flags); -} - -#define mfdcri(base, reg) __mfdcri(DCRN_ ## base ## _CONFIG_ADDR, \ - DCRN_ ## base ## _CONFIG_DATA, \ - reg) - -#define mtdcri(base, reg, data) __mtdcri(DCRN_ ## base ## _CONFIG_ADDR, \ - DCRN_ ## base ## _CONFIG_DATA, \ - reg, data) - -#define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ - DCRN_ ## base ## _CONFIG_DATA, \ - reg, clr, set) - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DCR_NATIVE_H */ diff --git a/include/asm-powerpc/dcr-regs.h b/include/asm-powerpc/dcr-regs.h deleted file mode 100644 index 29b0ece..0000000 --- a/include/asm-powerpc/dcr-regs.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * Common DCR / SDR / CPR register definitions used on various IBM/AMCC - * 4xx processors - * - * Copyright 2007 Benjamin Herrenschmidt, IBM Corp - * - * - * Mostly lifted from asm-ppc/ibm4xx.h by - * - * Copyright (c) 1999 Grant Erickson - * - */ - -#ifndef __DCR_REGS_H__ -#define __DCR_REGS_H__ - -/* - * Most DCRs used for controlling devices such as the MAL, DMA engine, - * etc... are obtained for the device tree. - * - * The definitions in this files are fixed DCRs and indirect DCRs that - * are commonly used outside of specific drivers or refer to core - * common registers that may occasionally have to be tweaked outside - * of the driver main register set - */ - -/* CPRs (440GX and 440SP/440SPe) */ -#define DCRN_CPR0_CONFIG_ADDR 0xc -#define DCRN_CPR0_CONFIG_DATA 0xd - -/* SDRs (440GX and 440SP/440SPe) */ -#define DCRN_SDR0_CONFIG_ADDR 0xe -#define DCRN_SDR0_CONFIG_DATA 0xf - -#define SDR0_PFC0 0x4100 -#define SDR0_PFC1 0x4101 -#define SDR0_PFC1_EPS 0x1c00000 -#define SDR0_PFC1_EPS_SHIFT 22 -#define SDR0_PFC1_RMII 0x02000000 -#define SDR0_MFR 0x4300 -#define SDR0_MFR_TAH0 0x80000000 /* TAHOE0 Enable */ -#define SDR0_MFR_TAH1 0x40000000 /* TAHOE1 Enable */ -#define SDR0_MFR_PCM 0x10000000 /* PPC440GP irq compat mode */ -#define SDR0_MFR_ECS 0x08000000 /* EMAC int clk */ -#define SDR0_MFR_T0TXFL 0x00080000 -#define SDR0_MFR_T0TXFH 0x00040000 -#define SDR0_MFR_T1TXFL 0x00020000 -#define SDR0_MFR_T1TXFH 0x00010000 -#define SDR0_MFR_E0TXFL 0x00008000 -#define SDR0_MFR_E0TXFH 0x00004000 -#define SDR0_MFR_E0RXFL 0x00002000 -#define SDR0_MFR_E0RXFH 0x00001000 -#define SDR0_MFR_E1TXFL 0x00000800 -#define SDR0_MFR_E1TXFH 0x00000400 -#define SDR0_MFR_E1RXFL 0x00000200 -#define SDR0_MFR_E1RXFH 0x00000100 -#define SDR0_MFR_E2TXFL 0x00000080 -#define SDR0_MFR_E2TXFH 0x00000040 -#define SDR0_MFR_E2RXFL 0x00000020 -#define SDR0_MFR_E2RXFH 0x00000010 -#define SDR0_MFR_E3TXFL 0x00000008 -#define SDR0_MFR_E3TXFH 0x00000004 -#define SDR0_MFR_E3RXFL 0x00000002 -#define SDR0_MFR_E3RXFH 0x00000001 -#define SDR0_UART0 0x0120 -#define SDR0_UART1 0x0121 -#define SDR0_UART2 0x0122 -#define SDR0_UART3 0x0123 -#define SDR0_CUST0 0x4000 - -/* - * All those DCR register addresses are offsets from the base address - * for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is - * excluded here and configured in the device tree. - */ -#define DCRN_SRAM0_SB0CR 0x00 -#define DCRN_SRAM0_SB1CR 0x01 -#define DCRN_SRAM0_SB2CR 0x02 -#define DCRN_SRAM0_SB3CR 0x03 -#define SRAM_SBCR_BU_MASK 0x00000180 -#define SRAM_SBCR_BS_64KB 0x00000800 -#define SRAM_SBCR_BU_RO 0x00000080 -#define SRAM_SBCR_BU_RW 0x00000180 -#define DCRN_SRAM0_BEAR 0x04 -#define DCRN_SRAM0_BESR0 0x05 -#define DCRN_SRAM0_BESR1 0x06 -#define DCRN_SRAM0_PMEG 0x07 -#define DCRN_SRAM0_CID 0x08 -#define DCRN_SRAM0_REVID 0x09 -#define DCRN_SRAM0_DPC 0x0a -#define SRAM_DPC_ENABLE 0x80000000 - -/* - * All those DCR register addresses are offsets from the base address - * for the SRAM0 controller (e.g. 0x30 on 440GX). The base address is - * excluded here and configured in the device tree. - */ -#define DCRN_L2C0_CFG 0x00 -#define L2C_CFG_L2M 0x80000000 -#define L2C_CFG_ICU 0x40000000 -#define L2C_CFG_DCU 0x20000000 -#define L2C_CFG_DCW_MASK 0x1e000000 -#define L2C_CFG_TPC 0x01000000 -#define L2C_CFG_CPC 0x00800000 -#define L2C_CFG_FRAN 0x00200000 -#define L2C_CFG_SS_MASK 0x00180000 -#define L2C_CFG_SS_256 0x00000000 -#define L2C_CFG_CPIM 0x00040000 -#define L2C_CFG_TPIM 0x00020000 -#define L2C_CFG_LIM 0x00010000 -#define L2C_CFG_PMUX_MASK 0x00007000 -#define L2C_CFG_PMUX_SNP 0x00000000 -#define L2C_CFG_PMUX_IF 0x00001000 -#define L2C_CFG_PMUX_DF 0x00002000 -#define L2C_CFG_PMUX_DS 0x00003000 -#define L2C_CFG_PMIM 0x00000800 -#define L2C_CFG_TPEI 0x00000400 -#define L2C_CFG_CPEI 0x00000200 -#define L2C_CFG_NAM 0x00000100 -#define L2C_CFG_SMCM 0x00000080 -#define L2C_CFG_NBRM 0x00000040 -#define L2C_CFG_RDBW 0x00000008 /* only 460EX/GT */ -#define DCRN_L2C0_CMD 0x01 -#define L2C_CMD_CLR 0x80000000 -#define L2C_CMD_DIAG 0x40000000 -#define L2C_CMD_INV 0x20000000 -#define L2C_CMD_CCP 0x10000000 -#define L2C_CMD_CTE 0x08000000 -#define L2C_CMD_STRC 0x04000000 -#define L2C_CMD_STPC 0x02000000 -#define L2C_CMD_RPMC 0x01000000 -#define L2C_CMD_HCC 0x00800000 -#define DCRN_L2C0_ADDR 0x02 -#define DCRN_L2C0_DATA 0x03 -#define DCRN_L2C0_SR 0x04 -#define L2C_SR_CC 0x80000000 -#define L2C_SR_CPE 0x40000000 -#define L2C_SR_TPE 0x20000000 -#define L2C_SR_LRU 0x10000000 -#define L2C_SR_PCS 0x08000000 -#define DCRN_L2C0_REVID 0x05 -#define DCRN_L2C0_SNP0 0x06 -#define DCRN_L2C0_SNP1 0x07 -#define L2C_SNP_BA_MASK 0xffff0000 -#define L2C_SNP_SSR_MASK 0x0000f000 -#define L2C_SNP_SSR_32G 0x0000f000 -#define L2C_SNP_ESR 0x00000800 - -#endif /* __DCR_REGS_H__ */ diff --git a/include/asm-powerpc/dcr.h b/include/asm-powerpc/dcr.h deleted file mode 100644 index 53b2830..0000000 --- a/include/asm-powerpc/dcr.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (c) Copyright 2006 Benjamin Herrenschmidt, IBM Corp. - * - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See - * the GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_DCR_H -#define _ASM_POWERPC_DCR_H -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#ifdef CONFIG_PPC_DCR - -#ifdef CONFIG_PPC_DCR_NATIVE -#include -#endif - -#ifdef CONFIG_PPC_DCR_MMIO -#include -#endif - - -/* Indirection layer for providing both NATIVE and MMIO support. */ - -#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) - -#include - -#define DCR_MAP_OK(host) dcr_map_ok_generic(host) -#define dcr_map(dev, dcr_n, dcr_c) dcr_map_generic(dev, dcr_n, dcr_c) -#define dcr_unmap(host, dcr_c) dcr_unmap_generic(host, dcr_c) -#define dcr_read(host, dcr_n) dcr_read_generic(host, dcr_n) -#define dcr_write(host, dcr_n, value) dcr_write_generic(host, dcr_n, value) - -#else - -#ifdef CONFIG_PPC_DCR_NATIVE -typedef dcr_host_native_t dcr_host_t; -#define DCR_MAP_OK(host) dcr_map_ok_native(host) -#define dcr_map(dev, dcr_n, dcr_c) dcr_map_native(dev, dcr_n, dcr_c) -#define dcr_unmap(host, dcr_c) dcr_unmap_native(host, dcr_c) -#define dcr_read(host, dcr_n) dcr_read_native(host, dcr_n) -#define dcr_write(host, dcr_n, value) dcr_write_native(host, dcr_n, value) -#else -typedef dcr_host_mmio_t dcr_host_t; -#define DCR_MAP_OK(host) dcr_map_ok_mmio(host) -#define dcr_map(dev, dcr_n, dcr_c) dcr_map_mmio(dev, dcr_n, dcr_c) -#define dcr_unmap(host, dcr_c) dcr_unmap_mmio(host, dcr_c) -#define dcr_read(host, dcr_n) dcr_read_mmio(host, dcr_n) -#define dcr_write(host, dcr_n, value) dcr_write_mmio(host, dcr_n, value) -#endif - -#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ - -/* - * On CONFIG_PPC_MERGE, we have additional helpers to read the DCR - * base from the device-tree - */ -#ifdef CONFIG_PPC_MERGE -struct device_node; -extern unsigned int dcr_resource_start(struct device_node *np, - unsigned int index); -extern unsigned int dcr_resource_len(struct device_node *np, - unsigned int index); -#endif /* CONFIG_PPC_MERGE */ - -#endif /* CONFIG_PPC_DCR */ -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DCR_H */ diff --git a/include/asm-powerpc/delay.h b/include/asm-powerpc/delay.h deleted file mode 100644 index f9200a6..0000000 --- a/include/asm-powerpc/delay.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _ASM_POWERPC_DELAY_H -#define _ASM_POWERPC_DELAY_H -#ifdef __KERNEL__ - -/* - * Copyright 1996, Paul Mackerras. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * PPC64 Support added by Dave Engebretsen, Todd Inglett, Mike Corrigan, - * Anton Blanchard. - */ - -extern void __delay(unsigned long loops); -extern void udelay(unsigned long usecs); - -/* - * On shared processor machines the generic implementation of mdelay can - * result in large errors. While each iteration of the loop inside mdelay - * is supposed to take 1ms, the hypervisor could sleep our partition for - * longer (eg 10ms). With the right timing these errors can add up. - * - * Since there is no 32bit overflow issue on 64bit kernels, just call - * udelay directly. - */ -#ifdef CONFIG_PPC64 -#define mdelay(n) udelay((n) * 1000) -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DELAY_H */ diff --git a/include/asm-powerpc/device.h b/include/asm-powerpc/device.h deleted file mode 100644 index 228ab2a..0000000 --- a/include/asm-powerpc/device.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#ifndef _ASM_POWERPC_DEVICE_H -#define _ASM_POWERPC_DEVICE_H - -struct dma_mapping_ops; -struct device_node; - -struct dev_archdata { - /* Optional pointer to an OF device node */ - struct device_node *of_node; - - /* DMA operations on that device */ - struct dma_mapping_ops *dma_ops; - void *dma_data; - - /* NUMA node if applicable */ - int numa_node; -}; - -#endif /* _ASM_POWERPC_DEVICE_H */ diff --git a/include/asm-powerpc/div64.h b/include/asm-powerpc/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-powerpc/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h deleted file mode 100644 index c7ca45f..0000000 --- a/include/asm-powerpc/dma-mapping.h +++ /dev/null @@ -1,474 +0,0 @@ -/* - * Copyright (C) 2004 IBM - * - * Implements the generic device dma API for powerpc. - * the pci and vio busses - */ -#ifndef _ASM_DMA_MAPPING_H -#define _ASM_DMA_MAPPING_H -#ifdef __KERNEL__ - -#include -#include -/* need struct page definitions */ -#include -#include -#include -#include - -#define DMA_ERROR_CODE (~(dma_addr_t)0x0) - -#ifdef CONFIG_NOT_COHERENT_CACHE -/* - * DMA-consistent mapping functions for PowerPCs that don't support - * cache snooping. These allocate/free a region of uncached mapped - * memory space for use with DMA devices. Alternatively, you could - * allocate the space "normally" and use the cache management functions - * to ensure it is consistent. - */ -extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp); -extern void __dma_free_coherent(size_t size, void *vaddr); -extern void __dma_sync(void *vaddr, size_t size, int direction); -extern void __dma_sync_page(struct page *page, unsigned long offset, - size_t size, int direction); - -#else /* ! CONFIG_NOT_COHERENT_CACHE */ -/* - * Cache coherent cores. - */ - -#define __dma_alloc_coherent(gfp, size, handle) NULL -#define __dma_free_coherent(size, addr) ((void)0) -#define __dma_sync(addr, size, rw) ((void)0) -#define __dma_sync_page(pg, off, sz, rw) ((void)0) - -#endif /* ! CONFIG_NOT_COHERENT_CACHE */ - -#ifdef CONFIG_PPC64 - -static inline unsigned long device_to_mask(struct device *dev) -{ - if (dev->dma_mask && *dev->dma_mask) - return *dev->dma_mask; - /* Assume devices without mask can take 32 bit addresses */ - return 0xfffffffful; -} - -/* - * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO - */ -struct dma_mapping_ops { - void * (*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); - void (*free_coherent)(struct device *dev, size_t size, - void *vaddr, dma_addr_t dma_handle); - dma_addr_t (*map_single)(struct device *dev, void *ptr, - size_t size, enum dma_data_direction direction, - struct dma_attrs *attrs); - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, - size_t size, enum dma_data_direction direction, - struct dma_attrs *attrs); - int (*map_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction, - struct dma_attrs *attrs); - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction, - struct dma_attrs *attrs); - int (*dma_supported)(struct device *dev, u64 mask); - int (*set_dma_mask)(struct device *dev, u64 dma_mask); -}; - -static inline struct dma_mapping_ops *get_dma_ops(struct device *dev) -{ - /* We don't handle the NULL dev case for ISA for now. We could - * do it via an out of line call but it is not needed for now. The - * only ISA DMA device we support is the floppy and we have a hack - * in the floppy driver directly to get a device for us. - */ - if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL)) - return NULL; - return dev->archdata.dma_ops; -} - -static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops) -{ - dev->archdata.dma_ops = ops; -} - -static inline int dma_supported(struct device *dev, u64 mask) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - if (unlikely(dma_ops == NULL)) - return 0; - if (dma_ops->dma_supported == NULL) - return 1; - return dma_ops->dma_supported(dev, mask); -} - -/* We have our own implementation of pci_set_dma_mask() */ -#define HAVE_ARCH_PCI_SET_DMA_MASK - -static inline int dma_set_mask(struct device *dev, u64 dma_mask) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - if (unlikely(dma_ops == NULL)) - return -EIO; - if (dma_ops->set_dma_mask != NULL) - return dma_ops->set_dma_mask(dev, dma_mask); - if (!dev->dma_mask || !dma_supported(dev, dma_mask)) - return -EIO; - *dev->dma_mask = dma_mask; - return 0; -} - -static inline dma_addr_t dma_map_single_attrs(struct device *dev, - void *cpu_addr, - size_t size, - enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - return dma_ops->map_single(dev, cpu_addr, size, direction, attrs); -} - -static inline void dma_unmap_single_attrs(struct device *dev, - dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - dma_ops->unmap_single(dev, dma_addr, size, direction, attrs); -} - -static inline dma_addr_t dma_map_page_attrs(struct device *dev, - struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - return dma_ops->map_single(dev, page_address(page) + offset, size, - direction, attrs); -} - -static inline void dma_unmap_page_attrs(struct device *dev, - dma_addr_t dma_address, - size_t size, - enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - dma_ops->unmap_single(dev, dma_address, size, direction, attrs); -} - -static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - return dma_ops->map_sg(dev, sg, nents, direction, attrs); -} - -static inline void dma_unmap_sg_attrs(struct device *dev, - struct scatterlist *sg, - int nhwentries, - enum dma_data_direction direction, - struct dma_attrs *attrs) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs); -} - -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - return dma_ops->alloc_coherent(dev, size, dma_handle, flag); -} - -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) -{ - struct dma_mapping_ops *dma_ops = get_dma_ops(dev); - - BUG_ON(!dma_ops); - dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); -} - -static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, - enum dma_data_direction direction) -{ - return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL); -} - -static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction) -{ - dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL); -} - -static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - return dma_map_page_attrs(dev, page, offset, size, direction, NULL); -} - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, - enum dma_data_direction direction) -{ - dma_unmap_page_attrs(dev, dma_address, size, direction, NULL); -} - -static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - return dma_map_sg_attrs(dev, sg, nents, direction, NULL); -} - -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, - enum dma_data_direction direction) -{ - dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL); -} - -/* - * Available generic sets of operations - */ -extern struct dma_mapping_ops dma_iommu_ops; -extern struct dma_mapping_ops dma_direct_ops; - -#else /* CONFIG_PPC64 */ - -#define dma_supported(dev, mask) (1) - -static inline int dma_set_mask(struct device *dev, u64 dma_mask) -{ - if (!dev->dma_mask || !dma_supported(dev, mask)) - return -EIO; - - *dev->dma_mask = dma_mask; - - return 0; -} - -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t * dma_handle, - gfp_t gfp) -{ -#ifdef CONFIG_NOT_COHERENT_CACHE - return __dma_alloc_coherent(size, dma_handle, gfp); -#else - void *ret; - /* ignore region specifiers */ - gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); - - if (dev == NULL || dev->coherent_dma_mask < 0xffffffff) - gfp |= GFP_DMA; - - ret = (void *)__get_free_pages(gfp, get_order(size)); - - if (ret != NULL) { - memset(ret, 0, size); - *dma_handle = virt_to_bus(ret); - } - - return ret; -#endif -} - -static inline void -dma_free_coherent(struct device *dev, size_t size, void *vaddr, - dma_addr_t dma_handle) -{ -#ifdef CONFIG_NOT_COHERENT_CACHE - __dma_free_coherent(size, vaddr); -#else - free_pages((unsigned long)vaddr, get_order(size)); -#endif -} - -static inline dma_addr_t -dma_map_single(struct device *dev, void *ptr, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - - __dma_sync(ptr, size, direction); - - return virt_to_bus(ptr); -} - -static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction) -{ - /* We do nothing. */ -} - -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - - __dma_sync_page(page, offset, size, direction); - - return page_to_bus(page) + offset; -} - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, - enum dma_data_direction direction) -{ - /* We do nothing. */ -} - -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents, - enum dma_data_direction direction) -{ - struct scatterlist *sg; - int i; - - BUG_ON(direction == DMA_NONE); - - for_each_sg(sgl, sg, nents, i) { - BUG_ON(!sg_page(sg)); - __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); - sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset; - } - - return nents; -} - -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nhwentries, - enum dma_data_direction direction) -{ - /* We don't do anything here. */ -} - -#endif /* CONFIG_PPC64 */ - -static inline void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - __dma_sync(bus_to_virt(dma_handle), size, direction); -} - -static inline void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - __dma_sync(bus_to_virt(dma_handle), size, direction); -} - -static inline void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sgl, int nents, - enum dma_data_direction direction) -{ - struct scatterlist *sg; - int i; - - BUG_ON(direction == DMA_NONE); - - for_each_sg(sgl, sg, nents, i) - __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); -} - -static inline void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sgl, int nents, - enum dma_data_direction direction) -{ - struct scatterlist *sg; - int i; - - BUG_ON(direction == DMA_NONE); - - for_each_sg(sgl, sg, nents, i) - __dma_sync_page(sg_page(sg), sg->offset, sg->length, direction); -} - -static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) -{ -#ifdef CONFIG_PPC64 - return (dma_addr == DMA_ERROR_CODE); -#else - return 0; -#endif -} - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#ifdef CONFIG_NOT_COHERENT_CACHE -#define dma_is_consistent(d, h) (0) -#else -#define dma_is_consistent(d, h) (1) -#endif - -static inline int dma_get_cache_alignment(void) -{ -#ifdef CONFIG_PPC64 - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -#else - /* - * Each processor family will define its own L1_CACHE_SHIFT, - * L1_CACHE_BYTES wraps to this, so this is always safe. - */ - return L1_CACHE_BYTES; -#endif -} - -static inline void dma_sync_single_range_for_cpu(struct device *dev, - dma_addr_t dma_handle, unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything for now */ - dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction); -} - -static inline void dma_sync_single_range_for_device(struct device *dev, - dma_addr_t dma_handle, unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything for now */ - dma_sync_single_for_device(dev, dma_handle, offset + size, direction); -} - -static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) -{ - BUG_ON(direction == DMA_NONE); - __dma_sync(vaddr, size, (int)direction); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_DMA_MAPPING_H */ diff --git a/include/asm-powerpc/dma.h b/include/asm-powerpc/dma.h deleted file mode 100644 index a7e06e2..0000000 --- a/include/asm-powerpc/dma.h +++ /dev/null @@ -1,360 +0,0 @@ -#ifndef _ASM_POWERPC_DMA_H -#define _ASM_POWERPC_DMA_H -#ifdef __KERNEL__ - -/* - * Defines for using and allocating dma channels. - * Written by Hennus Bergman, 1992. - * High DMA channel support & info by Hannu Savolainen - * and John Boyd, Nov. 1992. - * Changes for ppc sound by Christoph Nadig - */ - -/* - * Note: Adapted for PowerPC by Gary Thomas - * Modified by Cort Dougan - * - * None of this really applies for Power Macintoshes. There is - * basically just enough here to get kernel/dma.c to compile. - * - * There may be some comments or restrictions made here which are - * not valid for the PReP platform. Take what you read - * with a grain of salt. - */ - -#include -#include -#include - -#ifndef MAX_DMA_CHANNELS -#define MAX_DMA_CHANNELS 8 -#endif - -/* The maximum address that we can perform a DMA transfer to on this platform */ -/* Doesn't really apply... */ -#define MAX_DMA_ADDRESS (~0UL) - -#if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) - -#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER -#define dma_outb outb_p -#else -#define dma_outb outb -#endif - -#define dma_inb inb - -/* - * NOTES about DMA transfers: - * - * controller 1: channels 0-3, byte operations, ports 00-1F - * controller 2: channels 4-7, word operations, ports C0-DF - * - * - ALL registers are 8 bits only, regardless of transfer size - * - channel 4 is not used - cascades 1 into 2. - * - channels 0-3 are byte - addresses/counts are for physical bytes - * - channels 5-7 are word - addresses/counts are for physical words - * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries - * - transfer count loaded to registers is 1 less than actual count - * - controller 2 offsets are all even (2x offsets for controller 1) - * - page registers for 5-7 don't use data bit 0, represent 128K pages - * - page registers for 0-3 use bit 0, represent 64K pages - * - * On PReP, DMA transfers are limited to the lower 16MB of _physical_ memory. - * On CHRP, the W83C553F (and VLSI Tollgate?) support full 32 bit addressing. - * Note that addresses loaded into registers must be _physical_ addresses, - * not logical addresses (which may differ if paging is active). - * - * Address mapping for channels 0-3: - * - * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * P7 ... P0 A7 ... A0 A7 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Address mapping for channels 5-7: - * - * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) - * | ... | \ \ ... \ \ \ ... \ \ - * | ... | \ \ ... \ \ \ ... \ (not used) - * | ... | \ \ ... \ \ \ ... \ - * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses - * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at - * the hardware level, so odd-byte transfers aren't possible). - * - * Transfer count (_not # bytes_) is limited to 64K, represented as actual - * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, - * and up to 128K bytes may be transferred on channels 5-7 in one operation. - * - */ - -/* 8237 DMA controllers */ -#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ -#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ - -/* DMA controller registers */ -#define DMA1_CMD_REG 0x08 /* command register (w) */ -#define DMA1_STAT_REG 0x08 /* status register (r) */ -#define DMA1_REQ_REG 0x09 /* request register (w) */ -#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ -#define DMA1_MODE_REG 0x0B /* mode register (w) */ -#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ -#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ -#define DMA1_RESET_REG 0x0D /* Master Clear (w) */ -#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ -#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ - -#define DMA2_CMD_REG 0xD0 /* command register (w) */ -#define DMA2_STAT_REG 0xD0 /* status register (r) */ -#define DMA2_REQ_REG 0xD2 /* request register (w) */ -#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ -#define DMA2_MODE_REG 0xD6 /* mode register (w) */ -#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ -#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ -#define DMA2_RESET_REG 0xDA /* Master Clear (w) */ -#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ -#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ - -#define DMA_ADDR_0 0x00 /* DMA address registers */ -#define DMA_ADDR_1 0x02 -#define DMA_ADDR_2 0x04 -#define DMA_ADDR_3 0x06 -#define DMA_ADDR_4 0xC0 -#define DMA_ADDR_5 0xC4 -#define DMA_ADDR_6 0xC8 -#define DMA_ADDR_7 0xCC - -#define DMA_CNT_0 0x01 /* DMA count registers */ -#define DMA_CNT_1 0x03 -#define DMA_CNT_2 0x05 -#define DMA_CNT_3 0x07 -#define DMA_CNT_4 0xC2 -#define DMA_CNT_5 0xC6 -#define DMA_CNT_6 0xCA -#define DMA_CNT_7 0xCE - -#define DMA_LO_PAGE_0 0x87 /* DMA page registers */ -#define DMA_LO_PAGE_1 0x83 -#define DMA_LO_PAGE_2 0x81 -#define DMA_LO_PAGE_3 0x82 -#define DMA_LO_PAGE_5 0x8B -#define DMA_LO_PAGE_6 0x89 -#define DMA_LO_PAGE_7 0x8A - -#define DMA_HI_PAGE_0 0x487 /* DMA page registers */ -#define DMA_HI_PAGE_1 0x483 -#define DMA_HI_PAGE_2 0x481 -#define DMA_HI_PAGE_3 0x482 -#define DMA_HI_PAGE_5 0x48B -#define DMA_HI_PAGE_6 0x489 -#define DMA_HI_PAGE_7 0x48A - -#define DMA1_EXT_REG 0x40B -#define DMA2_EXT_REG 0x4D6 - -#ifndef __powerpc64__ - /* in arch/ppc/kernel/setup.c -- Cort */ - extern unsigned int DMA_MODE_WRITE; - extern unsigned int DMA_MODE_READ; - extern unsigned long ISA_DMA_THRESHOLD; -#else - #define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ - #define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ -#endif - -#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ - -#define DMA_AUTOINIT 0x10 - -extern spinlock_t dma_spin_lock; - -static __inline__ unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static __inline__ void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - unsigned char ucDmaCmd = 0x00; - - if (dmanr != 4) { - dma_outb(0, DMA2_MASK_REG); /* This may not be enabled */ - dma_outb(ucDmaCmd, DMA2_CMD_REG); /* Enable group */ - } - if (dmanr <= 3) { - dma_outb(dmanr, DMA1_MASK_REG); - dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ - } else { - dma_outb(dmanr & 3, DMA2_MASK_REG); - } -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - if (dmanr <= 3) - dma_outb(dmanr | 4, DMA1_MASK_REG); - else - dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); -} - -/* Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ - if (dmanr <= 3) - dma_outb(0, DMA1_CLEAR_FF_REG); - else - dma_outb(0, DMA2_CLEAR_FF_REG); -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - if (dmanr <= 3) - dma_outb(mode | dmanr, DMA1_MODE_REG); - else - dma_outb(mode | (dmanr & 3), DMA2_MODE_REG); -} - -/* Set only the page register bits of the transfer address. - * This is used for successive transfers when we know the contents of - * the lower 16 bits of the DMA current address register, but a 64k boundary - * may have been crossed. - */ -static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) -{ - switch (dmanr) { - case 0: - dma_outb(pagenr, DMA_LO_PAGE_0); - dma_outb(pagenr >> 8, DMA_HI_PAGE_0); - break; - case 1: - dma_outb(pagenr, DMA_LO_PAGE_1); - dma_outb(pagenr >> 8, DMA_HI_PAGE_1); - break; - case 2: - dma_outb(pagenr, DMA_LO_PAGE_2); - dma_outb(pagenr >> 8, DMA_HI_PAGE_2); - break; - case 3: - dma_outb(pagenr, DMA_LO_PAGE_3); - dma_outb(pagenr >> 8, DMA_HI_PAGE_3); - break; - case 5: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_5); - dma_outb(pagenr >> 8, DMA_HI_PAGE_5); - break; - case 6: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_6); - dma_outb(pagenr >> 8, DMA_HI_PAGE_6); - break; - case 7: - dma_outb(pagenr & 0xfe, DMA_LO_PAGE_7); - dma_outb(pagenr >> 8, DMA_HI_PAGE_7); - break; - } -} - -/* Set transfer address & page bits for specific DMA channel. - * Assumes dma flipflop is clear. - */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) -{ - if (dmanr <= 3) { - dma_outb(phys & 0xff, - ((dmanr & 3) << 1) + IO_DMA1_BASE); - dma_outb((phys >> 8) & 0xff, - ((dmanr & 3) << 1) + IO_DMA1_BASE); - } else { - dma_outb((phys >> 1) & 0xff, - ((dmanr & 3) << 2) + IO_DMA2_BASE); - dma_outb((phys >> 9) & 0xff, - ((dmanr & 3) << 2) + IO_DMA2_BASE); - } - set_dma_page(dmanr, phys >> 16); -} - - -/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for - * a specific DMA channel. - * You must ensure the parameters are valid. - * NOTE: from a manual: "the number of transfers is one more - * than the initial word count"! This is taken into account. - * Assumes dma flip-flop is clear. - * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - count--; - if (dmanr <= 3) { - dma_outb(count & 0xff, - ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); - dma_outb((count >> 8) & 0xff, - ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); - } else { - dma_outb((count >> 1) & 0xff, - ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); - dma_outb((count >> 9) & 0xff, - ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); - } -} - - -/* Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * If called before the channel has been used, it may return 1. - * Otherwise, it returns the number of _bytes_ left to transfer. - * - * Assumes DMA flip-flop is clear. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - unsigned int io_port = (dmanr <= 3) - ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE - : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE; - - /* using short to get 16-bit wrap around */ - unsigned short count; - - count = 1 + dma_inb(io_port); - count += dma_inb(io_port) << 8; - - return (dmanr <= 3) ? count : (count << 1); -} - -/* These are in kernel/dma.c: */ - -/* reserve a DMA channel */ -extern int request_dma(unsigned int dmanr, const char *device_id); -/* release it again */ -extern void free_dma(unsigned int dmanr); - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_DMA_H */ diff --git a/include/asm-powerpc/edac.h b/include/asm-powerpc/edac.h deleted file mode 100644 index 6ead88b..0000000 --- a/include/asm-powerpc/edac.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * PPC EDAC common defs - * - * Author: Dave Jiang - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef ASM_EDAC_H -#define ASM_EDAC_H -/* - * ECC atomic, DMA, SMP and interrupt safe scrub function. - * Implements the per arch atomic_scrub() that EDAC use for software - * ECC scrubbing. It reads memory and then writes back the original - * value, allowing the hardware to detect and correct memory errors. - */ -static __inline__ void atomic_scrub(void *va, u32 size) -{ - unsigned int *virt_addr = va; - unsigned int temp; - unsigned int i; - - for (i = 0; i < size / sizeof(*virt_addr); i++, virt_addr++) { - /* Very carefully read and write to memory atomically - * so we are interrupt, DMA and SMP safe. - */ - __asm__ __volatile__ ("\n\ - 1: lwarx %0,0,%1\n\ - stwcx. %0,0,%1\n\ - bne- 1b\n\ - isync" - : "=&r"(temp) - : "r"(virt_addr) - : "cr0", "memory"); - } -} - -#endif diff --git a/include/asm-powerpc/eeh.h b/include/asm-powerpc/eeh.h deleted file mode 100644 index b886bec..0000000 --- a/include/asm-powerpc/eeh.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * eeh.h - * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _PPC64_EEH_H -#define _PPC64_EEH_H -#ifdef __KERNEL__ - -#include -#include -#include - -struct pci_dev; -struct pci_bus; -struct device_node; - -#ifdef CONFIG_EEH - -extern int eeh_subsystem_enabled; - -/* Values for eeh_mode bits in device_node */ -#define EEH_MODE_SUPPORTED (1<<0) -#define EEH_MODE_NOCHECK (1<<1) -#define EEH_MODE_ISOLATED (1<<2) -#define EEH_MODE_RECOVERING (1<<3) -#define EEH_MODE_IRQ_DISABLED (1<<4) - -/* Max number of EEH freezes allowed before we consider the device - * to be permanently disabled. */ -#define EEH_MAX_ALLOWED_FREEZES 5 - -void __init eeh_init(void); -unsigned long eeh_check_failure(const volatile void __iomem *token, - unsigned long val); -int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev); -void __init pci_addr_cache_build(void); - -/** - * eeh_add_device_early - * eeh_add_device_late - * - * Perform eeh initialization for devices added after boot. - * Call eeh_add_device_early before doing any i/o to the - * device (including config space i/o). Call eeh_add_device_late - * to finish the eeh setup for this device. - */ -void eeh_add_device_tree_early(struct device_node *); -void eeh_add_device_tree_late(struct pci_bus *); - -/** - * eeh_remove_device_recursive - undo EEH for device & children. - * @dev: pci device to be removed - * - * As above, this removes the device; it also removes child - * pci devices as well. - */ -void eeh_remove_bus_device(struct pci_dev *); - -/** - * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. - * - * If this macro yields TRUE, the caller relays to eeh_check_failure() - * which does further tests out of line. - */ -#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled) - -/* - * Reads from a device which has been isolated by EEH will return - * all 1s. This macro gives an all-1s value of the given size (in - * bytes: 1, 2, or 4) for comparing with the result of a read. - */ -#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8)) - -#else /* !CONFIG_EEH */ -static inline void eeh_init(void) { } - -static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val) -{ - return val; -} - -static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev) -{ - return 0; -} - -static inline void pci_addr_cache_build(void) { } - -static inline void eeh_add_device_tree_early(struct device_node *dn) { } - -static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } - -static inline void eeh_remove_bus_device(struct pci_dev *dev) { } -#define EEH_POSSIBLE_ERROR(val, type) (0) -#define EEH_IO_ERROR_VALUE(size) (-1UL) -#endif /* CONFIG_EEH */ - -/* - * MMIO read/write operations with EEH support. - */ -static inline u8 eeh_readb(const volatile void __iomem *addr) -{ - u8 val = in_8(addr); - if (EEH_POSSIBLE_ERROR(val, u8)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u16 eeh_readw(const volatile void __iomem *addr) -{ - u16 val = in_le16(addr); - if (EEH_POSSIBLE_ERROR(val, u16)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u32 eeh_readl(const volatile void __iomem *addr) -{ - u32 val = in_le32(addr); - if (EEH_POSSIBLE_ERROR(val, u32)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u64 eeh_readq(const volatile void __iomem *addr) -{ - u64 val = in_le64(addr); - if (EEH_POSSIBLE_ERROR(val, u64)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u16 eeh_readw_be(const volatile void __iomem *addr) -{ - u16 val = in_be16(addr); - if (EEH_POSSIBLE_ERROR(val, u16)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u32 eeh_readl_be(const volatile void __iomem *addr) -{ - u32 val = in_be32(addr); - if (EEH_POSSIBLE_ERROR(val, u32)) - return eeh_check_failure(addr, val); - return val; -} - -static inline u64 eeh_readq_be(const volatile void __iomem *addr) -{ - u64 val = in_be64(addr); - if (EEH_POSSIBLE_ERROR(val, u64)) - return eeh_check_failure(addr, val); - return val; -} - -static inline void eeh_memcpy_fromio(void *dest, const - volatile void __iomem *src, - unsigned long n) -{ - _memcpy_fromio(dest, src, n); - - /* Look for ffff's here at dest[n]. Assume that at least 4 bytes - * were copied. Check all four bytes. - */ - if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32)) - eeh_check_failure(src, *((u32 *)(dest + n - 4))); -} - -/* in-string eeh macros */ -static inline void eeh_readsb(const volatile void __iomem *addr, void * buf, - int ns) -{ - _insb(addr, buf, ns); - if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8)) - eeh_check_failure(addr, *(u8*)buf); -} - -static inline void eeh_readsw(const volatile void __iomem *addr, void * buf, - int ns) -{ - _insw(addr, buf, ns); - if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16)) - eeh_check_failure(addr, *(u16*)buf); -} - -static inline void eeh_readsl(const volatile void __iomem *addr, void * buf, - int nl) -{ - _insl(addr, buf, nl); - if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32)) - eeh_check_failure(addr, *(u32*)buf); -} - -#endif /* __KERNEL__ */ -#endif /* _PPC64_EEH_H */ diff --git a/include/asm-powerpc/eeh_event.h b/include/asm-powerpc/eeh_event.h deleted file mode 100644 index cc3cb04..0000000 --- a/include/asm-powerpc/eeh_event.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * eeh_event.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * Copyright (c) 2005 Linas Vepstas - */ - -#ifndef ASM_POWERPC_EEH_EVENT_H -#define ASM_POWERPC_EEH_EVENT_H -#ifdef __KERNEL__ - -/** EEH event -- structure holding pci controller data that describes - * a change in the isolation status of a PCI slot. A pointer - * to this struct is passed as the data pointer in a notify callback. - */ -struct eeh_event { - struct list_head list; - struct device_node *dn; /* struct device node */ - struct pci_dev *dev; /* affected device */ -}; - -/** - * eeh_send_failure_event - generate a PCI error event - * @dev pci device - * - * This routine builds a PCI error event which will be delivered - * to all listeners on the eeh_notifier_chain. - * - * This routine can be called within an interrupt context; - * the actual event will be delivered in a normal context - * (from a workqueue). - */ -int eeh_send_failure_event (struct device_node *dn, - struct pci_dev *dev); - -/* Main recovery function */ -struct pci_dn * handle_eeh_events (struct eeh_event *); - -#endif /* __KERNEL__ */ -#endif /* ASM_POWERPC_EEH_EVENT_H */ diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h deleted file mode 100644 index 80d1f39..0000000 --- a/include/asm-powerpc/elf.h +++ /dev/null @@ -1,424 +0,0 @@ -#ifndef _ASM_POWERPC_ELF_H -#define _ASM_POWERPC_ELF_H - -#ifdef __KERNEL__ -#include /* for task_struct */ -#include -#include -#endif - -#include -#include -#include -#include - -/* PowerPC relocations defined by the ABIs */ -#define R_PPC_NONE 0 -#define R_PPC_ADDR32 1 /* 32bit absolute address */ -#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */ -#define R_PPC_ADDR16 3 /* 16bit absolute address */ -#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */ -#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */ -#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */ -#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */ -#define R_PPC_ADDR14_BRTAKEN 8 -#define R_PPC_ADDR14_BRNTAKEN 9 -#define R_PPC_REL24 10 /* PC relative 26 bit */ -#define R_PPC_REL14 11 /* PC relative 16 bit */ -#define R_PPC_REL14_BRTAKEN 12 -#define R_PPC_REL14_BRNTAKEN 13 -#define R_PPC_GOT16 14 -#define R_PPC_GOT16_LO 15 -#define R_PPC_GOT16_HI 16 -#define R_PPC_GOT16_HA 17 -#define R_PPC_PLTREL24 18 -#define R_PPC_COPY 19 -#define R_PPC_GLOB_DAT 20 -#define R_PPC_JMP_SLOT 21 -#define R_PPC_RELATIVE 22 -#define R_PPC_LOCAL24PC 23 -#define R_PPC_UADDR32 24 -#define R_PPC_UADDR16 25 -#define R_PPC_REL32 26 -#define R_PPC_PLT32 27 -#define R_PPC_PLTREL32 28 -#define R_PPC_PLT16_LO 29 -#define R_PPC_PLT16_HI 30 -#define R_PPC_PLT16_HA 31 -#define R_PPC_SDAREL16 32 -#define R_PPC_SECTOFF 33 -#define R_PPC_SECTOFF_LO 34 -#define R_PPC_SECTOFF_HI 35 -#define R_PPC_SECTOFF_HA 36 - -/* PowerPC relocations defined for the TLS access ABI. */ -#define R_PPC_TLS 67 /* none (sym+add)@tls */ -#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */ -#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */ -#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */ -#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */ -#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */ -#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */ -#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */ -#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */ -#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */ -#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */ -#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ - -/* keep this the last entry. */ -#define R_PPC_NUM 95 - -/* - * ELF register definitions.. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */ -#define ELF_NFPREG 33 /* includes fpscr */ - -typedef unsigned long elf_greg_t64; -typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG]; - -typedef unsigned int elf_greg_t32; -typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG]; -typedef elf_gregset_t32 compat_elf_gregset_t; - -/* - * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps. - */ -#ifdef __powerpc64__ -# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */ -# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */ -# define ELF_NVSRHALFREG 32 /* Half the vsx registers */ -# define ELF_GREG_TYPE elf_greg_t64 -#else -# define ELF_NEVRREG 34 /* includes acc (as 2) */ -# define ELF_NVRREG 33 /* includes vscr */ -# define ELF_GREG_TYPE elf_greg_t32 -# define ELF_ARCH EM_PPC -# define ELF_CLASS ELFCLASS32 -# define ELF_DATA ELFDATA2MSB -#endif /* __powerpc64__ */ - -#ifndef ELF_ARCH -# define ELF_ARCH EM_PPC64 -# define ELF_CLASS ELFCLASS64 -# define ELF_DATA ELFDATA2MSB - typedef elf_greg_t64 elf_greg_t; - typedef elf_gregset_t64 elf_gregset_t; -#else - /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */ - typedef elf_greg_t32 elf_greg_t; - typedef elf_gregset_t32 elf_gregset_t; -#endif /* ELF_ARCH */ - -/* Floating point registers */ -typedef double elf_fpreg_t; -typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; - -/* Altivec registers */ -/* - * The entries with indexes 0-31 contain the corresponding vector registers. - * The entry with index 32 contains the vscr as the last word (offset 12) - * within the quadword. This allows the vscr to be stored as either a - * quadword (since it must be copied via a vector register to/from storage) - * or as a word. - * - * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first - * word (offset 0) within the quadword. - * - * This definition of the VMX state is compatible with the current PPC32 - * ptrace interface. This allows signal handling and ptrace to use the same - * structures. This also simplifies the implementation of a bi-arch - * (combined (32- and 64-bit) gdb. - * - * Note that it's _not_ compatible with 32 bits ucontext which stuffs the - * vrsave along with vscr and so only uses 33 vectors for the register set - */ -typedef __vector128 elf_vrreg_t; -typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG]; -#ifdef __powerpc64__ -typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32]; -typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG]; -#endif - -#ifdef __KERNEL__ -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) -#define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC) - -#define USE_ELF_CORE_DUMP -#define CORE_DUMP_USE_REGSET -#define ELF_EXEC_PAGESIZE PAGE_SIZE - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (0x20000000) - -/* - * Our registers are always unsigned longs, whether we're a 32 bit - * process or 64 bit, on either a 64 bit or 32 bit kernel. - * - * This macro relies on elf_regs[i] having the right type to truncate to, - * either u32 or u64. It defines the body of the elf_core_copy_regs - * function, either the native one with elf_gregset_t elf_regs or - * the 32-bit one with elf_gregset_t32 elf_regs. - */ -#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \ - int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \ - (size_t)ELF_NGREG); \ - for (i = 0; i < nregs; i++) \ - elf_regs[i] = ((unsigned long *) regs)[i]; \ - memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0])) - -/* Common routine for both 32-bit and 64-bit native processes */ -static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs, - struct pt_regs *regs) -{ - PPC_ELF_CORE_COPY_REGS(elf_regs, regs); -} -#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs); - -typedef elf_vrregset_t elf_fpxregset_t; - -/* ELF_HWCAP yields a mask that user programs can use to figure out what - instruction set this cpu supports. This could be done in userspace, - but it's not easy, and we've already done it here. */ -# define ELF_HWCAP (cur_cpu_spec->cpu_user_features) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (cur_cpu_spec->platform) - -/* While ELF_PLATFORM indicates the ISA supported by the platform, it - * may not accurately reflect the underlying behavior of the hardware - * (as in the case of running in Power5+ compatibility mode on a - * Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries - * that are tuned for the real hardware. - */ -#define ELF_BASE_PLATFORM (powerpc_base_platform) - -#ifdef __powerpc64__ -# define ELF_PLAT_INIT(_r, load_addr) do { \ - _r->gpr[2] = load_addr; \ -} while (0) -#endif /* __powerpc64__ */ - -#ifdef __powerpc64__ -# define SET_PERSONALITY(ex, ibcs2) \ -do { \ - unsigned long new_flags = 0; \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - new_flags = _TIF_32BIT; \ - if ((current_thread_info()->flags & _TIF_32BIT) \ - != new_flags) \ - set_thread_flag(TIF_ABI_PENDING); \ - else \ - clear_thread_flag(TIF_ABI_PENDING); \ - if (personality(current->personality) != PER_LINUX32) \ - set_personality(PER_LINUX | \ - (current->personality & (~PER_MASK))); \ -} while (0) -/* - * An executable for which elf_read_implies_exec() returns TRUE will - * have the READ_IMPLIES_EXEC personality flag set automatically. This - * is only required to work around bugs in old 32bit toolchains. Since - * the 64bit ABI has never had these issues dont enable the workaround - * even if we have an executable stack. - */ -# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \ - (exec_stk != EXSTACK_DISABLE_X) : 0) -#else -# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) -#endif /* __powerpc64__ */ - -extern int dcache_bsize; -extern int icache_bsize; -extern int ucache_bsize; - -/* vDSO has arch_setup_additional_pages */ -#define ARCH_HAS_SETUP_ADDITIONAL_PAGES -struct linux_binprm; -extern int arch_setup_additional_pages(struct linux_binprm *bprm, - int executable_stack); -#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b); - -#endif /* __KERNEL__ */ - -/* - * The requirements here are: - * - keep the final alignment of sp (sp & 0xf) - * - make sure the 32-bit value at the first 16 byte aligned position of - * AUXV is greater than 16 for glibc compatibility. - * AT_IGNOREPPC is used for that. - * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC, - * even if DLINFO_ARCH_ITEMS goes to zero or is undefined. - * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes - */ -#define ARCH_DLINFO \ -do { \ - /* Handle glibc compatibility. */ \ - NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ - NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \ - /* Cache size items */ \ - NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \ - NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \ - NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \ - VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base) \ -} while (0) - -/* PowerPC64 relocations defined by the ABIs */ -#define R_PPC64_NONE R_PPC_NONE -#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */ -#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */ -#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */ -#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */ -#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */ -#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */ -#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */ -#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN -#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN -#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */ -#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */ -#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN -#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN -#define R_PPC64_GOT16 R_PPC_GOT16 -#define R_PPC64_GOT16_LO R_PPC_GOT16_LO -#define R_PPC64_GOT16_HI R_PPC_GOT16_HI -#define R_PPC64_GOT16_HA R_PPC_GOT16_HA - -#define R_PPC64_COPY R_PPC_COPY -#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT -#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT -#define R_PPC64_RELATIVE R_PPC_RELATIVE - -#define R_PPC64_UADDR32 R_PPC_UADDR32 -#define R_PPC64_UADDR16 R_PPC_UADDR16 -#define R_PPC64_REL32 R_PPC_REL32 -#define R_PPC64_PLT32 R_PPC_PLT32 -#define R_PPC64_PLTREL32 R_PPC_PLTREL32 -#define R_PPC64_PLT16_LO R_PPC_PLT16_LO -#define R_PPC64_PLT16_HI R_PPC_PLT16_HI -#define R_PPC64_PLT16_HA R_PPC_PLT16_HA - -#define R_PPC64_SECTOFF R_PPC_SECTOFF -#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO -#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI -#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA -#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */ -#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */ -#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */ -#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */ -#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */ -#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */ -#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */ -#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */ -#define R_PPC64_PLT64 45 /* doubleword64 L + A. */ -#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */ -#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */ -#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */ -#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */ -#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */ -#define R_PPC64_TOC 51 /* doubleword64 .TOC. */ -#define R_PPC64_PLTGOT16 52 /* half16* M + A. */ -#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */ -#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */ -#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */ - -#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */ -#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */ -#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */ -#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */ -#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */ -#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */ -#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */ -#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */ -#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */ -#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */ -#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */ - -/* PowerPC64 relocations defined for the TLS access ABI. */ -#define R_PPC64_TLS 67 /* none (sym+add)@tls */ -#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */ -#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */ -#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */ -#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */ -#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ -#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */ -#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */ -#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */ -#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */ -#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ -#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */ -#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */ -#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */ -#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */ -#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ -#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */ -#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */ -#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */ -#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ -#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */ -#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */ -#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */ -#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ -#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */ -#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */ -#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */ -#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */ -#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */ -#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */ -#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */ -#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */ -#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */ -#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */ -#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */ -#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */ -#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */ -#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */ -#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */ -#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */ - -/* Keep this the last entry. */ -#define R_PPC64_NUM 107 - -#ifdef __KERNEL__ - -#ifdef CONFIG_SPU_BASE -/* Notes used in ET_CORE. Note name is "SPU//". */ -#define NT_SPU 1 - -#define ARCH_HAVE_EXTRA_ELF_NOTES - -#endif /* CONFIG_SPU_BASE */ - -#endif /* __KERNEL */ - -#endif /* _ASM_POWERPC_ELF_H */ diff --git a/include/asm-powerpc/emergency-restart.h b/include/asm-powerpc/emergency-restart.h deleted file mode 100644 index 3711bd9..0000000 --- a/include/asm-powerpc/emergency-restart.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-powerpc/errno.h b/include/asm-powerpc/errno.h deleted file mode 100644 index 8c145fd..0000000 --- a/include/asm-powerpc/errno.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_POWERPC_ERRNO_H -#define _ASM_POWERPC_ERRNO_H - -#include - -#undef EDEADLOCK -#define EDEADLOCK 58 /* File locking deadlock error */ - -#define _LAST_ERRNO 516 - -#endif /* _ASM_POWERPC_ERRNO_H */ diff --git a/include/asm-powerpc/exception.h b/include/asm-powerpc/exception.h deleted file mode 100644 index 329148b..0000000 --- a/include/asm-powerpc/exception.h +++ /dev/null @@ -1,311 +0,0 @@ -#ifndef _ASM_POWERPC_EXCEPTION_H -#define _ASM_POWERPC_EXCEPTION_H -/* - * Extracted from head_64.S - * - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP - * Copyright (C) 1996 Cort Dougan - * Adapted for Power Macintosh by Paul Mackerras. - * Low-level exception handlers and MMU support - * rewritten by Paul Mackerras. - * Copyright (C) 1996 Paul Mackerras. - * - * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and - * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com - * - * This file contains the low-level support and setup for the - * PowerPC-64 platform, including trap and interrupt dispatch. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -/* - * The following macros define the code that appears as - * the prologue to each of the exception handlers. They - * are split into two parts to allow a single kernel binary - * to be used for pSeries and iSeries. - * - * We make as much of the exception code common between native - * exception handlers (including pSeries LPAR) and iSeries LPAR - * implementations as possible. - */ - -#define EX_R9 0 -#define EX_R10 8 -#define EX_R11 16 -#define EX_R12 24 -#define EX_R13 32 -#define EX_SRR0 40 -#define EX_DAR 48 -#define EX_DSISR 56 -#define EX_CCR 60 -#define EX_R3 64 -#define EX_LR 72 - -/* - * We're short on space and time in the exception prolog, so we can't - * use the normal SET_REG_IMMEDIATE macro. Normally we just need the - * low halfword of the address, but for Kdump we need the whole low - * word. - */ -#ifdef CONFIG_CRASH_DUMP -#define LOAD_HANDLER(reg, label) \ - oris reg,reg,(label)@h; /* virt addr of handler ... */ \ - ori reg,reg,(label)@l; /* .. and the rest */ -#else -#define LOAD_HANDLER(reg, label) \ - ori reg,reg,(label)@l; /* virt addr of handler ... */ -#endif - -#define EXCEPTION_PROLOG_1(area) \ - mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ - std r9,area+EX_R9(r13); /* save r9 - r12 */ \ - std r10,area+EX_R10(r13); \ - std r11,area+EX_R11(r13); \ - std r12,area+EX_R12(r13); \ - mfspr r9,SPRN_SPRG1; \ - std r9,area+EX_R13(r13); \ - mfcr r9 - -/* - * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode. - * The firmware calls the registered system_reset_fwnmi and - * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run - * a 32bit application at the time of the event. - * This firmware bug is present on POWER4 and JS20. - */ -#define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \ - EXCEPTION_PROLOG_1(area); \ - clrrdi r12,r13,32; /* get high part of &label */ \ - mfmsr r10; \ - /* force 64bit mode */ \ - li r11,5; /* MSR_SF_LG|MSR_ISF_LG */ \ - rldimi r10,r11,61,0; /* insert into top 3 bits */ \ - /* done 64bit mode */ \ - mfspr r11,SPRN_SRR0; /* save SRR0 */ \ - LOAD_HANDLER(r12,label) \ - ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \ - mtspr SPRN_SRR0,r12; \ - mfspr r12,SPRN_SRR1; /* and SRR1 */ \ - mtspr SPRN_SRR1,r10; \ - rfid; \ - b . /* prevent speculative execution */ - -#define EXCEPTION_PROLOG_PSERIES(area, label) \ - EXCEPTION_PROLOG_1(area); \ - clrrdi r12,r13,32; /* get high part of &label */ \ - mfmsr r10; \ - mfspr r11,SPRN_SRR0; /* save SRR0 */ \ - LOAD_HANDLER(r12,label) \ - ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \ - mtspr SPRN_SRR0,r12; \ - mfspr r12,SPRN_SRR1; /* and SRR1 */ \ - mtspr SPRN_SRR1,r10; \ - rfid; \ - b . /* prevent speculative execution */ - -/* - * The common exception prolog is used for all except a few exceptions - * such as a segment miss on a kernel address. We have to be prepared - * to take another exception from the point where we first touch the - * kernel stack onwards. - * - * On entry r13 points to the paca, r9-r13 are saved in the paca, - * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and - * SRR1, and relocation is on. - */ -#define EXCEPTION_PROLOG_COMMON(n, area) \ - andi. r10,r12,MSR_PR; /* See if coming from user */ \ - mr r10,r1; /* Save r1 */ \ - subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \ - beq- 1f; \ - ld r1,PACAKSAVE(r13); /* kernel stack to use */ \ -1: cmpdi cr1,r1,0; /* check if r1 is in userspace */ \ - bge- cr1,2f; /* abort if it is */ \ - b 3f; \ -2: li r1,(n); /* will be reloaded later */ \ - sth r1,PACA_TRAP_SAVE(r13); \ - b bad_stack; \ -3: std r9,_CCR(r1); /* save CR in stackframe */ \ - std r11,_NIP(r1); /* save SRR0 in stackframe */ \ - std r12,_MSR(r1); /* save SRR1 in stackframe */ \ - std r10,0(r1); /* make stack chain pointer */ \ - std r0,GPR0(r1); /* save r0 in stackframe */ \ - std r10,GPR1(r1); /* save r1 in stackframe */ \ - ACCOUNT_CPU_USER_ENTRY(r9, r10); \ - std r2,GPR2(r1); /* save r2 in stackframe */ \ - SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \ - SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \ - ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \ - ld r10,area+EX_R10(r13); \ - std r9,GPR9(r1); \ - std r10,GPR10(r1); \ - ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \ - ld r10,area+EX_R12(r13); \ - ld r11,area+EX_R13(r13); \ - std r9,GPR11(r1); \ - std r10,GPR12(r1); \ - std r11,GPR13(r1); \ - ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \ - mflr r9; /* save LR in stackframe */ \ - std r9,_LINK(r1); \ - mfctr r10; /* save CTR in stackframe */ \ - std r10,_CTR(r1); \ - lbz r10,PACASOFTIRQEN(r13); \ - mfspr r11,SPRN_XER; /* save XER in stackframe */ \ - std r10,SOFTE(r1); \ - std r11,_XER(r1); \ - li r9,(n)+1; \ - std r9,_TRAP(r1); /* set trap number */ \ - li r10,0; \ - ld r11,exception_marker@toc(r2); \ - std r10,RESULT(r1); /* clear regs->result */ \ - std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */ - -/* - * Exception vectors. - */ -#define STD_EXCEPTION_PSERIES(n, label) \ - . = n; \ - .globl label##_pSeries; \ -label##_pSeries: \ - HMT_MEDIUM; \ - mtspr SPRN_SPRG1,r13; /* save r13 */ \ - EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) - -#define HSTD_EXCEPTION_PSERIES(n, label) \ - . = n; \ - .globl label##_pSeries; \ -label##_pSeries: \ - HMT_MEDIUM; \ - mtspr SPRN_SPRG1,r20; /* save r20 */ \ - mfspr r20,SPRN_HSRR0; /* copy HSRR0 to SRR0 */ \ - mtspr SPRN_SRR0,r20; \ - mfspr r20,SPRN_HSRR1; /* copy HSRR0 to SRR0 */ \ - mtspr SPRN_SRR1,r20; \ - mfspr r20,SPRN_SPRG1; /* restore r20 */ \ - mtspr SPRN_SPRG1,r13; /* save r13 */ \ - EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) - - -#define MASKABLE_EXCEPTION_PSERIES(n, label) \ - . = n; \ - .globl label##_pSeries; \ -label##_pSeries: \ - HMT_MEDIUM; \ - mtspr SPRN_SPRG1,r13; /* save r13 */ \ - mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ - std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \ - std r10,PACA_EXGEN+EX_R10(r13); \ - lbz r10,PACASOFTIRQEN(r13); \ - mfcr r9; \ - cmpwi r10,0; \ - beq masked_interrupt; \ - mfspr r10,SPRN_SPRG1; \ - std r10,PACA_EXGEN+EX_R13(r13); \ - std r11,PACA_EXGEN+EX_R11(r13); \ - std r12,PACA_EXGEN+EX_R12(r13); \ - clrrdi r12,r13,32; /* get high part of &label */ \ - mfmsr r10; \ - mfspr r11,SPRN_SRR0; /* save SRR0 */ \ - LOAD_HANDLER(r12,label##_common) \ - ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \ - mtspr SPRN_SRR0,r12; \ - mfspr r12,SPRN_SRR1; /* and SRR1 */ \ - mtspr SPRN_SRR1,r10; \ - rfid; \ - b . /* prevent speculative execution */ - -#ifdef CONFIG_PPC_ISERIES -#define DISABLE_INTS \ - li r11,0; \ - stb r11,PACASOFTIRQEN(r13); \ -BEGIN_FW_FTR_SECTION; \ - stb r11,PACAHARDIRQEN(r13); \ -END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \ - TRACE_DISABLE_INTS; \ -BEGIN_FW_FTR_SECTION; \ - mfmsr r10; \ - ori r10,r10,MSR_EE; \ - mtmsrd r10,1; \ -END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES) -#else -#define DISABLE_INTS \ - li r11,0; \ - stb r11,PACASOFTIRQEN(r13); \ - stb r11,PACAHARDIRQEN(r13); \ - TRACE_DISABLE_INTS -#endif /* CONFIG_PPC_ISERIES */ - -#define ENABLE_INTS \ - ld r12,_MSR(r1); \ - mfmsr r11; \ - rlwimi r11,r12,0,MSR_EE; \ - mtmsrd r11,1 - -#define STD_EXCEPTION_COMMON(trap, label, hdlr) \ - .align 7; \ - .globl label##_common; \ -label##_common: \ - EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ - DISABLE_INTS; \ - bl .save_nvgprs; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - bl hdlr; \ - b .ret_from_except - -/* - * Like STD_EXCEPTION_COMMON, but for exceptions that can occur - * in the idle task and therefore need the special idle handling. - */ -#define STD_EXCEPTION_COMMON_IDLE(trap, label, hdlr) \ - .align 7; \ - .globl label##_common; \ -label##_common: \ - EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ - FINISH_NAP; \ - DISABLE_INTS; \ - bl .save_nvgprs; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - bl hdlr; \ - b .ret_from_except - -#define STD_EXCEPTION_COMMON_LITE(trap, label, hdlr) \ - .align 7; \ - .globl label##_common; \ -label##_common: \ - EXCEPTION_PROLOG_COMMON(trap, PACA_EXGEN); \ - FINISH_NAP; \ - DISABLE_INTS; \ -BEGIN_FTR_SECTION \ - bl .ppc64_runlatch_on; \ -END_FTR_SECTION_IFSET(CPU_FTR_CTRL) \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - bl hdlr; \ - b .ret_from_except_lite - -/* - * When the idle code in power4_idle puts the CPU into NAP mode, - * it has to do so in a loop, and relies on the external interrupt - * and decrementer interrupt entry code to get it out of the loop. - * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags - * to signal that it is in the loop and needs help to get out. - */ -#ifdef CONFIG_PPC_970_NAP -#define FINISH_NAP \ -BEGIN_FTR_SECTION \ - clrrdi r11,r1,THREAD_SHIFT; \ - ld r9,TI_LOCAL_FLAGS(r11); \ - andi. r10,r9,_TLF_NAPPING; \ - bnel power4_fixup_nap; \ -END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) -#else -#define FINISH_NAP -#endif - -#endif /* _ASM_POWERPC_EXCEPTION_H */ diff --git a/include/asm-powerpc/fb.h b/include/asm-powerpc/fb.h deleted file mode 100644 index 411af8d..0000000 --- a/include/asm-powerpc/fb.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - vma->vm_page_prot = phys_mem_access_prot(file, off >> PAGE_SHIFT, - vma->vm_end - vma->vm_start, - vma->vm_page_prot); -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-powerpc/fcntl.h b/include/asm-powerpc/fcntl.h deleted file mode 100644 index ce5c451..0000000 --- a/include/asm-powerpc/fcntl.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _ASM_FCNTL_H -#define _ASM_FCNTL_H - -#define O_DIRECTORY 040000 /* must be a directory */ -#define O_NOFOLLOW 0100000 /* don't follow links */ -#define O_LARGEFILE 0200000 -#define O_DIRECT 0400000 /* direct disk access hint */ - -#include - -#endif /* _ASM_FCNTL_H */ diff --git a/include/asm-powerpc/feature-fixups.h b/include/asm-powerpc/feature-fixups.h deleted file mode 100644 index a102996..0000000 --- a/include/asm-powerpc/feature-fixups.h +++ /dev/null @@ -1,126 +0,0 @@ -#ifndef __ASM_POWERPC_FEATURE_FIXUPS_H -#define __ASM_POWERPC_FEATURE_FIXUPS_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __ASSEMBLY__ - -/* - * Feature section common macros - * - * Note that the entries now contain offsets between the table entry - * and the code rather than absolute code pointers in order to be - * useable with the vdso shared library. There is also an assumption - * that values will be negative, that is, the fixup table has to be - * located after the code it fixes up. - */ -#if defined(CONFIG_PPC64) && !defined(__powerpc64__) -/* 64 bits kernel, 32 bits code (ie. vdso32) */ -#define FTR_ENTRY_LONG .llong -#define FTR_ENTRY_OFFSET .long 0xffffffff; .long -#else -/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */ -#define FTR_ENTRY_LONG PPC_LONG -#define FTR_ENTRY_OFFSET PPC_LONG -#endif - -#define START_FTR_SECTION(label) label##1: - -#define FTR_SECTION_ELSE_NESTED(label) \ -label##2: \ - .pushsection __ftr_alt_##label,"a"; \ - .align 2; \ -label##3: - -#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \ -label##4: \ - .popsection; \ - .pushsection sect,"a"; \ - .align 3; \ -label##5: \ - FTR_ENTRY_LONG msk; \ - FTR_ENTRY_LONG val; \ - FTR_ENTRY_OFFSET label##1b-label##5b; \ - FTR_ENTRY_OFFSET label##2b-label##5b; \ - FTR_ENTRY_OFFSET label##3b-label##5b; \ - FTR_ENTRY_OFFSET label##4b-label##5b; \ - .popsection; - - -/* CPU feature dependent sections */ -#define BEGIN_FTR_SECTION_NESTED(label) START_FTR_SECTION(label) -#define BEGIN_FTR_SECTION START_FTR_SECTION(97) - -#define END_FTR_SECTION_NESTED(msk, val, label) \ - FTR_SECTION_ELSE_NESTED(label) \ - MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup) - -#define END_FTR_SECTION(msk, val) \ - END_FTR_SECTION_NESTED(msk, val, 97) - -#define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) -#define END_FTR_SECTION_IFCLR(msk) END_FTR_SECTION((msk), 0) - -/* CPU feature sections with alternatives, use BEGIN_FTR_SECTION to start */ -#define FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97) -#define ALT_FTR_SECTION_END_NESTED(msk, val, label) \ - MAKE_FTR_SECTION_ENTRY(msk, val, label, __ftr_fixup) -#define ALT_FTR_SECTION_END_NESTED_IFSET(msk, label) \ - ALT_FTR_SECTION_END_NESTED(msk, msk, label) -#define ALT_FTR_SECTION_END_NESTED_IFCLR(msk, label) \ - ALT_FTR_SECTION_END_NESTED(msk, 0, label) -#define ALT_FTR_SECTION_END(msk, val) \ - ALT_FTR_SECTION_END_NESTED(msk, val, 97) -#define ALT_FTR_SECTION_END_IFSET(msk) \ - ALT_FTR_SECTION_END_NESTED_IFSET(msk, 97) -#define ALT_FTR_SECTION_END_IFCLR(msk) \ - ALT_FTR_SECTION_END_NESTED_IFCLR(msk, 97) - -/* Firmware feature dependent sections */ -#define BEGIN_FW_FTR_SECTION_NESTED(label) START_FTR_SECTION(label) -#define BEGIN_FW_FTR_SECTION START_FTR_SECTION(97) - -#define END_FW_FTR_SECTION_NESTED(msk, val, label) \ - FTR_SECTION_ELSE_NESTED(label) \ - MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup) - -#define END_FW_FTR_SECTION(msk, val) \ - END_FW_FTR_SECTION_NESTED(msk, val, 97) - -#define END_FW_FTR_SECTION_IFSET(msk) END_FW_FTR_SECTION((msk), (msk)) -#define END_FW_FTR_SECTION_IFCLR(msk) END_FW_FTR_SECTION((msk), 0) - -/* Firmware feature sections with alternatives */ -#define FW_FTR_SECTION_ELSE_NESTED(label) FTR_SECTION_ELSE_NESTED(label) -#define FW_FTR_SECTION_ELSE FTR_SECTION_ELSE_NESTED(97) -#define ALT_FW_FTR_SECTION_END_NESTED(msk, val, label) \ - MAKE_FTR_SECTION_ENTRY(msk, val, label, __fw_ftr_fixup) -#define ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, label) \ - ALT_FW_FTR_SECTION_END_NESTED(msk, msk, label) -#define ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, label) \ - ALT_FW_FTR_SECTION_END_NESTED(msk, 0, label) -#define ALT_FW_FTR_SECTION_END(msk, val) \ - ALT_FW_FTR_SECTION_END_NESTED(msk, val, 97) -#define ALT_FW_FTR_SECTION_END_IFSET(msk) \ - ALT_FW_FTR_SECTION_END_NESTED_IFSET(msk, 97) -#define ALT_FW_FTR_SECTION_END_IFCLR(msk) \ - ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97) - -#endif /* __ASSEMBLY__ */ - -/* LWSYNC feature sections */ -#define START_LWSYNC_SECTION(label) label##1: -#define MAKE_LWSYNC_SECTION_ENTRY(label, sect) \ -label##2: \ - .pushsection sect,"a"; \ - .align 2; \ -label##3: \ - .long label##1b-label##3b; \ - .popsection; - -#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ diff --git a/include/asm-powerpc/firmware.h b/include/asm-powerpc/firmware.h deleted file mode 100644 index 3a17982..0000000 --- a/include/asm-powerpc/firmware.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) - * - * Modifications for ppc64: - * Copyright (C) 2003 Dave Engebretsen - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef __ASM_POWERPC_FIRMWARE_H -#define __ASM_POWERPC_FIRMWARE_H - -#ifdef __KERNEL__ - -#include -#include - -/* firmware feature bitmask values */ -#define FIRMWARE_MAX_FEATURES 63 - -#define FW_FEATURE_PFT ASM_CONST(0x0000000000000001) -#define FW_FEATURE_TCE ASM_CONST(0x0000000000000002) -#define FW_FEATURE_SPRG0 ASM_CONST(0x0000000000000004) -#define FW_FEATURE_DABR ASM_CONST(0x0000000000000008) -#define FW_FEATURE_COPY ASM_CONST(0x0000000000000010) -#define FW_FEATURE_ASR ASM_CONST(0x0000000000000020) -#define FW_FEATURE_DEBUG ASM_CONST(0x0000000000000040) -#define FW_FEATURE_TERM ASM_CONST(0x0000000000000080) -#define FW_FEATURE_PERF ASM_CONST(0x0000000000000100) -#define FW_FEATURE_DUMP ASM_CONST(0x0000000000000200) -#define FW_FEATURE_INTERRUPT ASM_CONST(0x0000000000000400) -#define FW_FEATURE_MIGRATE ASM_CONST(0x0000000000000800) -#define FW_FEATURE_PERFMON ASM_CONST(0x0000000000001000) -#define FW_FEATURE_CRQ ASM_CONST(0x0000000000002000) -#define FW_FEATURE_VIO ASM_CONST(0x0000000000004000) -#define FW_FEATURE_RDMA ASM_CONST(0x0000000000008000) -#define FW_FEATURE_LLAN ASM_CONST(0x0000000000010000) -#define FW_FEATURE_BULK ASM_CONST(0x0000000000020000) -#define FW_FEATURE_XDABR ASM_CONST(0x0000000000040000) -#define FW_FEATURE_MULTITCE ASM_CONST(0x0000000000080000) -#define FW_FEATURE_SPLPAR ASM_CONST(0x0000000000100000) -#define FW_FEATURE_ISERIES ASM_CONST(0x0000000000200000) -#define FW_FEATURE_LPAR ASM_CONST(0x0000000000400000) -#define FW_FEATURE_PS3_LV1 ASM_CONST(0x0000000000800000) -#define FW_FEATURE_BEAT ASM_CONST(0x0000000001000000) -#define FW_FEATURE_BULK_REMOVE ASM_CONST(0x0000000002000000) -#define FW_FEATURE_CMO ASM_CONST(0x0000000004000000) - -#ifndef __ASSEMBLY__ - -enum { -#ifdef CONFIG_PPC64 - FW_FEATURE_PSERIES_POSSIBLE = FW_FEATURE_PFT | FW_FEATURE_TCE | - FW_FEATURE_SPRG0 | FW_FEATURE_DABR | FW_FEATURE_COPY | - FW_FEATURE_ASR | FW_FEATURE_DEBUG | FW_FEATURE_TERM | - FW_FEATURE_PERF | FW_FEATURE_DUMP | FW_FEATURE_INTERRUPT | - FW_FEATURE_MIGRATE | FW_FEATURE_PERFMON | FW_FEATURE_CRQ | - FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN | - FW_FEATURE_BULK | FW_FEATURE_XDABR | FW_FEATURE_MULTITCE | - FW_FEATURE_SPLPAR | FW_FEATURE_LPAR | FW_FEATURE_CMO, - FW_FEATURE_PSERIES_ALWAYS = 0, - FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, - FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR, - FW_FEATURE_PS3_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, - FW_FEATURE_PS3_ALWAYS = FW_FEATURE_LPAR | FW_FEATURE_PS3_LV1, - FW_FEATURE_CELLEB_POSSIBLE = FW_FEATURE_LPAR | FW_FEATURE_BEAT, - FW_FEATURE_CELLEB_ALWAYS = 0, - FW_FEATURE_NATIVE_POSSIBLE = 0, - FW_FEATURE_NATIVE_ALWAYS = 0, - FW_FEATURE_POSSIBLE = -#ifdef CONFIG_PPC_PSERIES - FW_FEATURE_PSERIES_POSSIBLE | -#endif -#ifdef CONFIG_PPC_ISERIES - FW_FEATURE_ISERIES_POSSIBLE | -#endif -#ifdef CONFIG_PPC_PS3 - FW_FEATURE_PS3_POSSIBLE | -#endif -#ifdef CONFIG_PPC_CELLEB - FW_FEATURE_CELLEB_POSSIBLE | -#endif -#ifdef CONFIG_PPC_NATIVE - FW_FEATURE_NATIVE_ALWAYS | -#endif - 0, - FW_FEATURE_ALWAYS = -#ifdef CONFIG_PPC_PSERIES - FW_FEATURE_PSERIES_ALWAYS & -#endif -#ifdef CONFIG_PPC_ISERIES - FW_FEATURE_ISERIES_ALWAYS & -#endif -#ifdef CONFIG_PPC_PS3 - FW_FEATURE_PS3_ALWAYS & -#endif -#ifdef CONFIG_PPC_CELLEB - FW_FEATURE_CELLEB_ALWAYS & -#endif -#ifdef CONFIG_PPC_NATIVE - FW_FEATURE_NATIVE_ALWAYS & -#endif - FW_FEATURE_POSSIBLE, - -#else /* CONFIG_PPC64 */ - FW_FEATURE_POSSIBLE = 0, - FW_FEATURE_ALWAYS = 0, -#endif -}; - -/* This is used to identify firmware features which are available - * to the kernel. - */ -extern unsigned long powerpc_firmware_features; - -#define firmware_has_feature(feature) \ - ((FW_FEATURE_ALWAYS & (feature)) || \ - (FW_FEATURE_POSSIBLE & powerpc_firmware_features & (feature))) - -extern void system_reset_fwnmi(void); -extern void machine_check_fwnmi(void); - -/* This is true if we are using the firmware NMI handler (typically LPAR) */ -extern int fwnmi_active; - -extern unsigned int __start___fw_ftr_fixup, __stop___fw_ftr_fixup; - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_FIRMWARE_H */ diff --git a/include/asm-powerpc/fixmap.h b/include/asm-powerpc/fixmap.h deleted file mode 100644 index 8428b38..0000000 --- a/include/asm-powerpc/fixmap.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * fixmap.h: compile-time virtual memory allocation - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1998 Ingo Molnar - * - * Copyright 2008 Freescale Semiconductor Inc. - * Port to powerpc added by Kumar Gala - */ - -#ifndef _ASM_FIXMAP_H -#define _ASM_FIXMAP_H - -extern unsigned long FIXADDR_TOP; - -#ifndef __ASSEMBLY__ -#include -#include -#ifdef CONFIG_HIGHMEM -#include -#include -#endif - -/* - * Here we define all the compile-time 'special' virtual - * addresses. The point is to have a constant address at - * compile time, but to set the physical address only - * in the boot process. We allocate these special addresses - * from the end of virtual memory (0xfffff000) backwards. - * Also this lets us do fail-safe vmalloc(), we - * can guarantee that these special addresses and - * vmalloc()-ed addresses never overlap. - * - * these 'compile-time allocated' memory buffers are - * fixed-size 4k pages. (or larger if used with an increment - * highger than 1) use fixmap_set(idx,phys) to associate - * physical memory with fixmap indices. - * - * TLB entries of such buffers will not be flushed across - * task switches. - */ -enum fixed_addresses { - FIX_HOLE, -#ifdef CONFIG_HIGHMEM - FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ - FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, -#endif - /* FIX_PCIE_MCFG, */ - __end_of_fixed_addresses -}; - -extern void __set_fixmap (enum fixed_addresses idx, - phys_addr_t phys, pgprot_t flags); - -#define set_fixmap(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL) -/* - * Some hardware wants to get fixmapped without caching. - */ -#define set_fixmap_nocache(idx, phys) \ - __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE) - -#define clear_fixmap(idx) \ - __set_fixmap(idx, 0, __pgprot(0)) - -#define __FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) -#define FIXADDR_START (FIXADDR_TOP - __FIXADDR_SIZE) - -#define __fix_to_virt(x) (FIXADDR_TOP - ((x) << PAGE_SHIFT)) -#define __virt_to_fix(x) ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT) - -extern void __this_fixmap_does_not_exist(void); - -/* - * 'index to address' translation. If anyone tries to use the idx - * directly without tranlation, we catch the bug with a NULL-deference - * kernel oops. Illegal ranges of incoming indices are caught too. - */ -static __always_inline unsigned long fix_to_virt(const unsigned int idx) -{ - /* - * this branch gets completely eliminated after inlining, - * except when someone tries to use fixaddr indices in an - * illegal way. (such as mixing up address types or using - * out-of-range indices). - * - * If it doesn't get removed, the linker will complain - * loudly with a reasonably clear error message.. - */ - if (idx >= __end_of_fixed_addresses) - __this_fixmap_does_not_exist(); - - return __fix_to_virt(idx); -} - -static inline unsigned long virt_to_fix(const unsigned long vaddr) -{ - BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START); - return __virt_to_fix(vaddr); -} - -#endif /* !__ASSEMBLY__ */ -#endif diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h deleted file mode 100644 index 24bd34c..0000000 --- a/include/asm-powerpc/floppy.h +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Architecture specific parts of the Floppy driver - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1995 - */ -#ifndef __ASM_POWERPC_FLOPPY_H -#define __ASM_POWERPC_FLOPPY_H -#ifdef __KERNEL__ - -#include - -#define fd_inb(port) inb_p(port) -#define fd_outb(value,port) outb_p(value,port) - -#define fd_enable_dma() enable_dma(FLOPPY_DMA) -#define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA) -#define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA) -#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) -#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) -#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count) -#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA) -#define fd_enable_irq() enable_irq(FLOPPY_IRQ) -#define fd_disable_irq() disable_irq(FLOPPY_IRQ) -#define fd_cacheflush(addr,size) /* nothing */ -#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); - -#include -#include /* for isa_bridge_pcidev */ - -#define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io) - -static int fd_request_dma(void); - -struct fd_dma_ops { - void (*_disable_dma)(unsigned int dmanr); - void (*_free_dma)(unsigned int dmanr); - int (*_get_dma_residue)(unsigned int dummy); - int (*_dma_setup)(char *addr, unsigned long size, int mode, int io); -}; - -static int virtual_dma_count; -static int virtual_dma_residue; -static char *virtual_dma_addr; -static int virtual_dma_mode; -static int doing_vdma; -static struct fd_dma_ops *fd_ops; - -static irqreturn_t floppy_hardint(int irq, void *dev_id) -{ - unsigned char st; - int lcount; - char *lptr; - - if (!doing_vdma) - return floppy_interrupt(irq, dev_id); - - - st = 1; - for (lcount=virtual_dma_count, lptr=virtual_dma_addr; - lcount; lcount--, lptr++) { - st=inb(virtual_dma_port+4) & 0xa0 ; - if (st != 0xa0) - break; - if (virtual_dma_mode) - outb_p(*lptr, virtual_dma_port+5); - else - *lptr = inb_p(virtual_dma_port+5); - } - virtual_dma_count = lcount; - virtual_dma_addr = lptr; - st = inb(virtual_dma_port+4); - - if (st == 0x20) - return IRQ_HANDLED; - if (!(st & 0x20)) { - virtual_dma_residue += virtual_dma_count; - virtual_dma_count=0; - doing_vdma = 0; - floppy_interrupt(irq, dev_id); - return IRQ_HANDLED; - } - return IRQ_HANDLED; -} - -static void vdma_disable_dma(unsigned int dummy) -{ - doing_vdma = 0; - virtual_dma_residue += virtual_dma_count; - virtual_dma_count=0; -} - -static void vdma_nop(unsigned int dummy) -{ -} - - -static int vdma_get_dma_residue(unsigned int dummy) -{ - return virtual_dma_count + virtual_dma_residue; -} - - -static int fd_request_irq(void) -{ - if (can_use_virtual_dma) - return request_irq(FLOPPY_IRQ, floppy_hardint, - IRQF_DISABLED, "floppy", NULL); - else - return request_irq(FLOPPY_IRQ, floppy_interrupt, - IRQF_DISABLED, "floppy", NULL); -} - -static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) -{ - doing_vdma = 1; - virtual_dma_port = io; - virtual_dma_mode = (mode == DMA_MODE_WRITE); - virtual_dma_addr = addr; - virtual_dma_count = size; - virtual_dma_residue = 0; - return 0; -} - -static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) -{ - static unsigned long prev_size; - static dma_addr_t bus_addr = 0; - static char *prev_addr; - static int prev_dir; - int dir; - - doing_vdma = 0; - dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; - - if (bus_addr - && (addr != prev_addr || size != prev_size || dir != prev_dir)) { - /* different from last time -- unmap prev */ - pci_unmap_single(isa_bridge_pcidev, bus_addr, prev_size, prev_dir); - bus_addr = 0; - } - - if (!bus_addr) /* need to map it */ - bus_addr = pci_map_single(isa_bridge_pcidev, addr, size, dir); - - /* remember this one as prev */ - prev_addr = addr; - prev_size = size; - prev_dir = dir; - - fd_clear_dma_ff(); - fd_cacheflush(addr, size); - fd_set_dma_mode(mode); - set_dma_addr(FLOPPY_DMA, bus_addr); - fd_set_dma_count(size); - virtual_dma_port = io; - fd_enable_dma(); - - return 0; -} - -static struct fd_dma_ops real_dma_ops = -{ - ._disable_dma = disable_dma, - ._free_dma = free_dma, - ._get_dma_residue = get_dma_residue, - ._dma_setup = hard_dma_setup -}; - -static struct fd_dma_ops virt_dma_ops = -{ - ._disable_dma = vdma_disable_dma, - ._free_dma = vdma_nop, - ._get_dma_residue = vdma_get_dma_residue, - ._dma_setup = vdma_dma_setup -}; - -static int fd_request_dma(void) -{ - if (can_use_virtual_dma & 1) { - fd_ops = &virt_dma_ops; - return 0; - } - else { - fd_ops = &real_dma_ops; - return request_dma(FLOPPY_DMA, "floppy"); - } -} - -static int FDC1 = 0x3f0; -static int FDC2 = -1; - -/* - * Again, the CMOS information not available - */ -#define FLOPPY0_TYPE 6 -#define FLOPPY1_TYPE 0 - -#define N_FDC 2 /* Don't change this! */ -#define N_DRIVE 8 - -/* - * The PowerPC has no problems with floppy DMA crossing 64k borders. - */ -#define CROSS_64KB(a,s) (0) - -#define EXTRA_FLOPPY_PARAMS - -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_FLOPPY_H */ diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h deleted file mode 100644 index 9361cd5..0000000 --- a/include/asm-powerpc/fs_pd.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Platform information definitions. - * - * 2006 (c) MontaVista Software, Inc. - * Vitaly Bordug - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef FS_PD_H -#define FS_PD_H -#include -#include - -#ifdef CONFIG_CPM2 -#include - -#if defined(CONFIG_8260) -#include -#endif - -#define cpm2_map(member) (&cpm2_immr->member) -#define cpm2_map_size(member, size) (&cpm2_immr->member) -#define cpm2_unmap(addr) do {} while(0) -#endif - -#ifdef CONFIG_8xx -#include -#include - -extern immap_t __iomem *mpc8xx_immr; - -#define immr_map(member) (&mpc8xx_immr->member) -#define immr_map_size(member, size) (&mpc8xx_immr->member) -#define immr_unmap(addr) do {} while (0) -#endif - -static inline int uart_baudrate(void) -{ - return get_baudrate(); -} - -static inline int uart_clock(void) -{ - return ppc_proc_freq; -} - -#endif diff --git a/include/asm-powerpc/fsl_gtm.h b/include/asm-powerpc/fsl_gtm.h deleted file mode 100644 index 8e8c9b5..0000000 --- a/include/asm-powerpc/fsl_gtm.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Freescale General-purpose Timers Module - * - * Copyright (c) Freescale Semicondutor, Inc. 2006. - * Shlomi Gridish - * Jerry Huang - * Copyright (c) MontaVista Software, Inc. 2008. - * Anton Vorontsov - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_FSL_GTM_H -#define __ASM_FSL_GTM_H - -#include - -struct gtm; - -struct gtm_timer { - unsigned int irq; - - struct gtm *gtm; - bool requested; - u8 __iomem *gtcfr; - __be16 __iomem *gtmdr; - __be16 __iomem *gtpsr; - __be16 __iomem *gtcnr; - __be16 __iomem *gtrfr; - __be16 __iomem *gtevr; -}; - -extern struct gtm_timer *gtm_get_timer16(void); -extern struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm, - unsigned int timer); -extern void gtm_put_timer16(struct gtm_timer *tmr); -extern int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, - bool reload); -extern int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, - bool reload); -extern void gtm_stop_timer16(struct gtm_timer *tmr); -extern void gtm_ack_timer16(struct gtm_timer *tmr, u16 events); - -#endif /* __ASM_FSL_GTM_H */ diff --git a/include/asm-powerpc/fsl_lbc.h b/include/asm-powerpc/fsl_lbc.h deleted file mode 100644 index 303f548..0000000 --- a/include/asm-powerpc/fsl_lbc.h +++ /dev/null @@ -1,311 +0,0 @@ -/* Freescale Local Bus Controller - * - * Copyright (c) 2006-2007 Freescale Semiconductor - * - * Authors: Nick Spence , - * Scott Wood - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_FSL_LBC_H -#define __ASM_FSL_LBC_H - -#include -#include -#include - -struct fsl_lbc_bank { - __be32 br; /**< Base Register */ -#define BR_BA 0xFFFF8000 -#define BR_BA_SHIFT 15 -#define BR_PS 0x00001800 -#define BR_PS_SHIFT 11 -#define BR_PS_8 0x00000800 /* Port Size 8 bit */ -#define BR_PS_16 0x00001000 /* Port Size 16 bit */ -#define BR_PS_32 0x00001800 /* Port Size 32 bit */ -#define BR_DECC 0x00000600 -#define BR_DECC_SHIFT 9 -#define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */ -#define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */ -#define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */ -#define BR_WP 0x00000100 -#define BR_WP_SHIFT 8 -#define BR_MSEL 0x000000E0 -#define BR_MSEL_SHIFT 5 -#define BR_MS_GPCM 0x00000000 /* GPCM */ -#define BR_MS_FCM 0x00000020 /* FCM */ -#define BR_MS_SDRAM 0x00000060 /* SDRAM */ -#define BR_MS_UPMA 0x00000080 /* UPMA */ -#define BR_MS_UPMB 0x000000A0 /* UPMB */ -#define BR_MS_UPMC 0x000000C0 /* UPMC */ -#define BR_V 0x00000001 -#define BR_V_SHIFT 0 -#define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V) - - __be32 or; /**< Base Register */ -#define OR0 0x5004 -#define OR1 0x500C -#define OR2 0x5014 -#define OR3 0x501C -#define OR4 0x5024 -#define OR5 0x502C -#define OR6 0x5034 -#define OR7 0x503C - -#define OR_FCM_AM 0xFFFF8000 -#define OR_FCM_AM_SHIFT 15 -#define OR_FCM_BCTLD 0x00001000 -#define OR_FCM_BCTLD_SHIFT 12 -#define OR_FCM_PGS 0x00000400 -#define OR_FCM_PGS_SHIFT 10 -#define OR_FCM_CSCT 0x00000200 -#define OR_FCM_CSCT_SHIFT 9 -#define OR_FCM_CST 0x00000100 -#define OR_FCM_CST_SHIFT 8 -#define OR_FCM_CHT 0x00000080 -#define OR_FCM_CHT_SHIFT 7 -#define OR_FCM_SCY 0x00000070 -#define OR_FCM_SCY_SHIFT 4 -#define OR_FCM_SCY_1 0x00000010 -#define OR_FCM_SCY_2 0x00000020 -#define OR_FCM_SCY_3 0x00000030 -#define OR_FCM_SCY_4 0x00000040 -#define OR_FCM_SCY_5 0x00000050 -#define OR_FCM_SCY_6 0x00000060 -#define OR_FCM_SCY_7 0x00000070 -#define OR_FCM_RST 0x00000008 -#define OR_FCM_RST_SHIFT 3 -#define OR_FCM_TRLX 0x00000004 -#define OR_FCM_TRLX_SHIFT 2 -#define OR_FCM_EHTR 0x00000002 -#define OR_FCM_EHTR_SHIFT 1 -}; - -struct fsl_lbc_regs { - struct fsl_lbc_bank bank[8]; - u8 res0[0x28]; - __be32 mar; /**< UPM Address Register */ - u8 res1[0x4]; - __be32 mamr; /**< UPMA Mode Register */ -#define MxMR_OP_NO (0 << 28) /**< normal operation */ -#define MxMR_OP_WA (1 << 28) /**< write array */ -#define MxMR_OP_RA (2 << 28) /**< read array */ -#define MxMR_OP_RP (3 << 28) /**< run pattern */ -#define MxMR_MAD 0x3f /**< machine address */ - __be32 mbmr; /**< UPMB Mode Register */ - __be32 mcmr; /**< UPMC Mode Register */ - u8 res2[0x8]; - __be32 mrtpr; /**< Memory Refresh Timer Prescaler Register */ - __be32 mdr; /**< UPM Data Register */ - u8 res3[0x4]; - __be32 lsor; /**< Special Operation Initiation Register */ - __be32 lsdmr; /**< SDRAM Mode Register */ - u8 res4[0x8]; - __be32 lurt; /**< UPM Refresh Timer */ - __be32 lsrt; /**< SDRAM Refresh Timer */ - u8 res5[0x8]; - __be32 ltesr; /**< Transfer Error Status Register */ -#define LTESR_BM 0x80000000 -#define LTESR_FCT 0x40000000 -#define LTESR_PAR 0x20000000 -#define LTESR_WP 0x04000000 -#define LTESR_ATMW 0x00800000 -#define LTESR_ATMR 0x00400000 -#define LTESR_CS 0x00080000 -#define LTESR_CC 0x00000001 -#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) - __be32 ltedr; /**< Transfer Error Disable Register */ - __be32 lteir; /**< Transfer Error Interrupt Register */ - __be32 lteatr; /**< Transfer Error Attributes Register */ - __be32 ltear; /**< Transfer Error Address Register */ - u8 res6[0xC]; - __be32 lbcr; /**< Configuration Register */ -#define LBCR_LDIS 0x80000000 -#define LBCR_LDIS_SHIFT 31 -#define LBCR_BCTLC 0x00C00000 -#define LBCR_BCTLC_SHIFT 22 -#define LBCR_AHD 0x00200000 -#define LBCR_LPBSE 0x00020000 -#define LBCR_LPBSE_SHIFT 17 -#define LBCR_EPAR 0x00010000 -#define LBCR_EPAR_SHIFT 16 -#define LBCR_BMT 0x0000FF00 -#define LBCR_BMT_SHIFT 8 -#define LBCR_INIT 0x00040000 - __be32 lcrr; /**< Clock Ratio Register */ -#define LCRR_DBYP 0x80000000 -#define LCRR_DBYP_SHIFT 31 -#define LCRR_BUFCMDC 0x30000000 -#define LCRR_BUFCMDC_SHIFT 28 -#define LCRR_ECL 0x03000000 -#define LCRR_ECL_SHIFT 24 -#define LCRR_EADC 0x00030000 -#define LCRR_EADC_SHIFT 16 -#define LCRR_CLKDIV 0x0000000F -#define LCRR_CLKDIV_SHIFT 0 - u8 res7[0x8]; - __be32 fmr; /**< Flash Mode Register */ -#define FMR_CWTO 0x0000F000 -#define FMR_CWTO_SHIFT 12 -#define FMR_BOOT 0x00000800 -#define FMR_ECCM 0x00000100 -#define FMR_AL 0x00000030 -#define FMR_AL_SHIFT 4 -#define FMR_OP 0x00000003 -#define FMR_OP_SHIFT 0 - __be32 fir; /**< Flash Instruction Register */ -#define FIR_OP0 0xF0000000 -#define FIR_OP0_SHIFT 28 -#define FIR_OP1 0x0F000000 -#define FIR_OP1_SHIFT 24 -#define FIR_OP2 0x00F00000 -#define FIR_OP2_SHIFT 20 -#define FIR_OP3 0x000F0000 -#define FIR_OP3_SHIFT 16 -#define FIR_OP4 0x0000F000 -#define FIR_OP4_SHIFT 12 -#define FIR_OP5 0x00000F00 -#define FIR_OP5_SHIFT 8 -#define FIR_OP6 0x000000F0 -#define FIR_OP6_SHIFT 4 -#define FIR_OP7 0x0000000F -#define FIR_OP7_SHIFT 0 -#define FIR_OP_NOP 0x0 /* No operation and end of sequence */ -#define FIR_OP_CA 0x1 /* Issue current column address */ -#define FIR_OP_PA 0x2 /* Issue current block+page address */ -#define FIR_OP_UA 0x3 /* Issue user defined address */ -#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */ -#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */ -#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */ -#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */ -#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */ -#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */ -#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */ -#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */ -#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */ -#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */ -#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */ -#define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */ - __be32 fcr; /**< Flash Command Register */ -#define FCR_CMD0 0xFF000000 -#define FCR_CMD0_SHIFT 24 -#define FCR_CMD1 0x00FF0000 -#define FCR_CMD1_SHIFT 16 -#define FCR_CMD2 0x0000FF00 -#define FCR_CMD2_SHIFT 8 -#define FCR_CMD3 0x000000FF -#define FCR_CMD3_SHIFT 0 - __be32 fbar; /**< Flash Block Address Register */ -#define FBAR_BLK 0x00FFFFFF - __be32 fpar; /**< Flash Page Address Register */ -#define FPAR_SP_PI 0x00007C00 -#define FPAR_SP_PI_SHIFT 10 -#define FPAR_SP_MS 0x00000200 -#define FPAR_SP_CI 0x000001FF -#define FPAR_SP_CI_SHIFT 0 -#define FPAR_LP_PI 0x0003F000 -#define FPAR_LP_PI_SHIFT 12 -#define FPAR_LP_MS 0x00000800 -#define FPAR_LP_CI 0x000007FF -#define FPAR_LP_CI_SHIFT 0 - __be32 fbcr; /**< Flash Byte Count Register */ -#define FBCR_BC 0x00000FFF - u8 res11[0x8]; - u8 res8[0xF00]; -}; - -extern struct fsl_lbc_regs __iomem *fsl_lbc_regs; -extern spinlock_t fsl_lbc_lock; - -/* - * FSL UPM routines - */ -struct fsl_upm { - __be32 __iomem *mxmr; - int width; -}; - -extern int fsl_lbc_find(phys_addr_t addr_base); -extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm); - -/** - * fsl_upm_start_pattern - start UPM patterns execution - * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find - * @pat_offset: UPM pattern offset for the command to be executed - * - * This routine programmes UPM so the next memory access that hits an UPM - * will trigger pattern execution, starting at pat_offset. - */ -static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset) -{ - clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset); -} - -/** - * fsl_upm_end_pattern - end UPM patterns execution - * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find - * - * This routine reverts UPM to normal operation mode. - */ -static inline void fsl_upm_end_pattern(struct fsl_upm *upm) -{ - clrbits32(upm->mxmr, MxMR_OP_RP); - - while (in_be32(upm->mxmr) & MxMR_OP_RP) - cpu_relax(); -} - -/** - * fsl_upm_run_pattern - actually run an UPM pattern - * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find - * @io_base: remapped pointer to where memory access should happen - * @mar: MAR register content during pattern execution - * - * This function triggers dummy write to the memory specified by the io_base, - * thus UPM pattern actually executed. Note that mar usage depends on the - * pre-programmed AMX bits in the UPM RAM. - */ -static inline int fsl_upm_run_pattern(struct fsl_upm *upm, - void __iomem *io_base, u32 mar) -{ - int ret = 0; - unsigned long flags; - - spin_lock_irqsave(&fsl_lbc_lock, flags); - - out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width)); - - switch (upm->width) { - case 8: - out_8(io_base, 0x0); - break; - case 16: - out_be16(io_base, 0x0); - break; - case 32: - out_be32(io_base, 0x0); - break; - default: - ret = -EINVAL; - break; - } - - spin_unlock_irqrestore(&fsl_lbc_lock, flags); - - return ret; -} - -#endif /* __ASM_FSL_LBC_H */ diff --git a/include/asm-powerpc/ftrace.h b/include/asm-powerpc/ftrace.h deleted file mode 100644 index de92132..0000000 --- a/include/asm-powerpc/ftrace.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _ASM_POWERPC_FTRACE -#define _ASM_POWERPC_FTRACE - -#ifdef CONFIG_FTRACE -#define MCOUNT_ADDR ((long)(_mcount)) -#define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ - -#ifndef __ASSEMBLY__ -extern void _mcount(void); -#endif - -#endif - -#endif /* _ASM_POWERPC_FTRACE */ diff --git a/include/asm-powerpc/futex.h b/include/asm-powerpc/futex.h deleted file mode 100644 index 6d406c5..0000000 --- a/include/asm-powerpc/futex.h +++ /dev/null @@ -1,117 +0,0 @@ -#ifndef _ASM_POWERPC_FUTEX_H -#define _ASM_POWERPC_FUTEX_H - -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ - __asm__ __volatile ( \ - LWSYNC_ON_SMP \ -"1: lwarx %0,0,%2\n" \ - insn \ - PPC405_ERR77(0, %2) \ -"2: stwcx. %1,0,%2\n" \ - "bne- 1b\n" \ - "li %1,0\n" \ -"3: .section .fixup,\"ax\"\n" \ -"4: li %1,%3\n" \ - "b 3b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - ".align 3\n" \ - PPC_LONG "1b,4b,2b,4b\n" \ - ".previous" \ - : "=&r" (oldval), "=&r" (ret) \ - : "b" (uaddr), "i" (-EFAULT), "1" (oparg) \ - : "cr0", "memory") - -static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret; - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: - __futex_atomic_op("", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ADD: - __futex_atomic_op("add %1,%0,%1\n", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_OR: - __futex_atomic_op("or %1,%0,%1\n", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ANDN: - __futex_atomic_op("andc %1,%0,%1\n", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_XOR: - __futex_atomic_op("xor %1,%0,%1\n", ret, oldval, uaddr, oparg); - break; - default: - ret = -ENOSYS; - } - - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) -{ - int prev; - - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) - return -EFAULT; - - __asm__ __volatile__ ( - LWSYNC_ON_SMP -"1: lwarx %0,0,%2 # futex_atomic_cmpxchg_inatomic\n\ - cmpw 0,%0,%3\n\ - bne- 3f\n" - PPC405_ERR77(0,%2) -"2: stwcx. %4,0,%2\n\ - bne- 1b\n" - ISYNC_ON_SMP -"3: .section .fixup,\"ax\"\n\ -4: li %0,%5\n\ - b 3b\n\ - .previous\n\ - .section __ex_table,\"a\"\n\ - .align 3\n\ - " PPC_LONG "1b,4b,2b,4b\n\ - .previous" \ - : "=&r" (prev), "+m" (*uaddr) - : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT) - : "cc", "memory"); - - return prev; -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_FUTEX_H */ diff --git a/include/asm-powerpc/gpio.h b/include/asm-powerpc/gpio.h deleted file mode 100644 index ea04632..0000000 --- a/include/asm-powerpc/gpio.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Generic GPIO API implementation for PowerPC. - * - * Copyright (c) 2007-2008 MontaVista Software, Inc. - * - * Author: Anton Vorontsov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef __ASM_POWERPC_GPIO_H -#define __ASM_POWERPC_GPIO_H - -#include -#include - -#ifdef CONFIG_GPIOLIB - -/* - * We don't (yet) implement inlined/rapid versions for on-chip gpios. - * Just call gpiolib. - */ -static inline int gpio_get_value(unsigned int gpio) -{ - return __gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned int gpio, int value) -{ - __gpio_set_value(gpio, value); -} - -static inline int gpio_cansleep(unsigned int gpio) -{ - return __gpio_cansleep(gpio); -} - -/* - * Not implemented, yet. - */ -static inline int gpio_to_irq(unsigned int gpio) -{ - return -ENOSYS; -} - -static inline int irq_to_gpio(unsigned int irq) -{ - return -EINVAL; -} - -#endif /* CONFIG_GPIOLIB */ - -#endif /* __ASM_POWERPC_GPIO_H */ diff --git a/include/asm-powerpc/grackle.h b/include/asm-powerpc/grackle.h deleted file mode 100644 index bd7812a..0000000 --- a/include/asm-powerpc/grackle.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_POWERPC_GRACKLE_H -#define _ASM_POWERPC_GRACKLE_H -#ifdef __KERNEL__ -/* - * Functions for setting up and using a MPC106 northbridge - */ - -#include - -extern void setup_grackle(struct pci_controller *hose); -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_GRACKLE_H */ diff --git a/include/asm-powerpc/hardirq.h b/include/asm-powerpc/hardirq.h deleted file mode 100644 index 288e14d..0000000 --- a/include/asm-powerpc/hardirq.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _ASM_POWERPC_HARDIRQ_H -#define _ASM_POWERPC_HARDIRQ_H -#ifdef __KERNEL__ - -#include -#include - -/* The __last_jiffy_stamp field is needed to ensure that no decrementer - * interrupt is lost on SMP machines. Since on most CPUs it is in the same - * cache line as local_irq_count, it is cheap to access and is also used on UP - * for uniformity. - */ -typedef struct { - unsigned int __softirq_pending; /* set_bit is used on this */ - unsigned int __last_jiffy_stamp; -} ____cacheline_aligned irq_cpustat_t; - -#include /* Standard mappings for irq_cpustat_t above */ - -#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp) - -static inline void ack_bad_irq(int irq) -{ - printk(KERN_CRIT "illegal vector %d received!\n", irq); - BUG(); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_HARDIRQ_H */ diff --git a/include/asm-powerpc/heathrow.h b/include/asm-powerpc/heathrow.h deleted file mode 100644 index 93f5495..0000000 --- a/include/asm-powerpc/heathrow.h +++ /dev/null @@ -1,67 +0,0 @@ -#ifndef _ASM_POWERPC_HEATHROW_H -#define _ASM_POWERPC_HEATHROW_H -#ifdef __KERNEL__ -/* - * heathrow.h: definitions for using the "Heathrow" I/O controller chip. - * - * Grabbed from Open Firmware definitions on a PowerBook G3 Series - * - * Copyright (C) 1997 Paul Mackerras. - */ - -/* Front light color on Yikes/B&W G3. 32 bits */ -#define HEATHROW_FRONT_LIGHT 0x32 /* (set to 0 or 0xffffffff) */ - -/* Brightness/contrast (gossamer iMac ?). 8 bits */ -#define HEATHROW_BRIGHTNESS_CNTL 0x32 -#define HEATHROW_CONTRAST_CNTL 0x33 - -/* offset from ohare base for feature control register */ -#define HEATHROW_MBCR 0x34 /* Media bay control */ -#define HEATHROW_FCR 0x38 /* Feature control */ -#define HEATHROW_AUX_CNTL_REG 0x3c /* Aux control */ - -/* - * Bits in feature control register. - * Bits postfixed with a _N are in inverse logic - */ -#define HRW_SCC_TRANS_EN_N 0x00000001 /* Also controls modem power */ -#define HRW_BAY_POWER_N 0x00000002 -#define HRW_BAY_PCI_ENABLE 0x00000004 -#define HRW_BAY_IDE_ENABLE 0x00000008 -#define HRW_BAY_FLOPPY_ENABLE 0x00000010 -#define HRW_IDE0_ENABLE 0x00000020 -#define HRW_IDE0_RESET_N 0x00000040 -#define HRW_BAY_DEV_MASK 0x0000001c -#define HRW_BAY_RESET_N 0x00000080 -#define HRW_IOBUS_ENABLE 0x00000100 /* Internal IDE ? */ -#define HRW_SCC_ENABLE 0x00000200 -#define HRW_MESH_ENABLE 0x00000400 -#define HRW_SWIM_ENABLE 0x00000800 -#define HRW_SOUND_POWER_N 0x00001000 -#define HRW_SOUND_CLK_ENABLE 0x00002000 -#define HRW_SCCA_IO 0x00004000 -#define HRW_SCCB_IO 0x00008000 -#define HRW_PORT_OR_DESK_VIA_N 0x00010000 /* This one is 0 on PowerBook */ -#define HRW_PWM_MON_ID_N 0x00020000 /* ??? (0) */ -#define HRW_HOOK_MB_CNT_N 0x00040000 /* ??? (0) */ -#define HRW_SWIM_CLONE_FLOPPY 0x00080000 /* ??? (0) */ -#define HRW_AUD_RUN22 0x00100000 /* ??? (1) */ -#define HRW_SCSI_LINK_MODE 0x00200000 /* Read ??? (1) */ -#define HRW_ARB_BYPASS 0x00400000 /* Disable internal PCI arbitrer */ -#define HRW_IDE1_RESET_N 0x00800000 /* Media bay */ -#define HRW_SLOW_SCC_PCLK 0x01000000 /* ??? (0) */ -#define HRW_RESET_SCC 0x02000000 -#define HRW_MFDC_CELL_ENABLE 0x04000000 /* ??? (0) */ -#define HRW_USE_MFDC 0x08000000 /* ??? (0) */ -#define HRW_BMAC_IO_ENABLE 0x60000000 /* two bits, not documented in OF */ -#define HRW_BMAC_RESET 0x80000000 /* not documented in OF */ - -/* We OR those features at boot on desktop G3s */ -#define HRW_DEFAULTS (HRW_SCCA_IO | HRW_SCCB_IO | HRW_SCC_ENABLE) - -/* Looks like Heathrow has some sort of GPIOs as well... */ -#define HRW_GPIO_MODEM_RESET 0x6d - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_HEATHROW_H */ diff --git a/include/asm-powerpc/highmem.h b/include/asm-powerpc/highmem.h deleted file mode 100644 index 5d99b648..0000000 --- a/include/asm-powerpc/highmem.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * highmem.h: virtual kernel memory mappings for high memory - * - * PowerPC version, stolen from the i386 version. - * - * Used in CONFIG_HIGHMEM systems for memory pages which - * are not addressable by direct kernel virtual addresses. - * - * Copyright (C) 1999 Gerhard Wichert, Siemens AG - * Gerhard.Wichert@pdb.siemens.de - * - * - * Redesigned the x86 32-bit VM architecture to deal with - * up to 16 Terrabyte physical memory. With current x86 CPUs - * we now support up to 64 Gigabytes physical RAM. - * - * Copyright (C) 1999 Ingo Molnar - */ - -#ifndef _ASM_HIGHMEM_H -#define _ASM_HIGHMEM_H - -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include -#include - -extern pte_t *kmap_pte; -extern pgprot_t kmap_prot; -extern pte_t *pkmap_page_table; - -/* - * Right now we initialize only a single pte table. It can be extended - * easily, subsequent pte tables have to be allocated in one physical - * chunk of RAM. - */ -#define LAST_PKMAP (1 << PTE_SHIFT) -#define LAST_PKMAP_MASK (LAST_PKMAP-1) -#define PKMAP_BASE ((FIXADDR_START - PAGE_SIZE*(LAST_PKMAP + 1)) & PMD_MASK) -#define PKMAP_NR(virt) ((virt-PKMAP_BASE) >> PAGE_SHIFT) -#define PKMAP_ADDR(nr) (PKMAP_BASE + ((nr) << PAGE_SHIFT)) - -extern void *kmap_high(struct page *page); -extern void kunmap_high(struct page *page); - -static inline void *kmap(struct page *page) -{ - might_sleep(); - if (!PageHighMem(page)) - return page_address(page); - return kmap_high(page); -} - -static inline void kunmap(struct page *page) -{ - BUG_ON(in_interrupt()); - if (!PageHighMem(page)) - return; - kunmap_high(page); -} - -/* - * The use of kmap_atomic/kunmap_atomic is discouraged - kmap/kunmap - * gives a more generic (and caching) interface. But kmap_atomic can - * be used in IRQ contexts, so in some (very limited) cases we need - * it. - */ -static inline void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot) -{ - unsigned int idx; - unsigned long vaddr; - - /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */ - pagefault_disable(); - if (!PageHighMem(page)) - return page_address(page); - - idx = type + KM_TYPE_NR*smp_processor_id(); - vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); -#ifdef CONFIG_DEBUG_HIGHMEM - BUG_ON(!pte_none(*(kmap_pte-idx))); -#endif - set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); - flush_tlb_page(NULL, vaddr); - - return (void*) vaddr; -} - -static inline void *kmap_atomic(struct page *page, enum km_type type) -{ - return kmap_atomic_prot(page, type, kmap_prot); -} - -static inline void kunmap_atomic(void *kvaddr, enum km_type type) -{ -#ifdef CONFIG_DEBUG_HIGHMEM - unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK; - enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id(); - - if (vaddr < __fix_to_virt(FIX_KMAP_END)) { - pagefault_enable(); - return; - } - - BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); - - /* - * force other mappings to Oops if they'll try to access - * this pte without first remap it - */ - pte_clear(&init_mm, vaddr, kmap_pte-idx); - flush_tlb_page(NULL, vaddr); -#endif - pagefault_enable(); -} - -static inline struct page *kmap_atomic_to_page(void *ptr) -{ - unsigned long idx, vaddr = (unsigned long) ptr; - pte_t *pte; - - if (vaddr < FIXADDR_START) - return virt_to_page(ptr); - - idx = virt_to_fix(vaddr); - pte = kmap_pte - (idx - FIX_KMAP_BEGIN); - return pte_page(*pte); -} - -#define flush_cache_kmaps() flush_cache_all() - -#endif /* __KERNEL__ */ - -#endif /* _ASM_HIGHMEM_H */ diff --git a/include/asm-powerpc/hugetlb.h b/include/asm-powerpc/hugetlb.h deleted file mode 100644 index 26f0d0a..0000000 --- a/include/asm-powerpc/hugetlb.h +++ /dev/null @@ -1,75 +0,0 @@ -#ifndef _ASM_POWERPC_HUGETLB_H -#define _ASM_POWERPC_HUGETLB_H - -#include - - -int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, - unsigned long len); - -void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, - unsigned long end, unsigned long floor, - unsigned long ceiling); - -void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte); - -pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, - pte_t *ptep); - -/* - * If the arch doesn't supply something else, assume that hugepage - * size aligned regions are ok without further preparation. - */ -static inline int prepare_hugepage_range(struct file *file, - unsigned long addr, unsigned long len) -{ - struct hstate *h = hstate_file(file); - if (len & ~huge_page_mask(h)) - return -EINVAL; - if (addr & ~huge_page_mask(h)) - return -EINVAL; - return 0; -} - -static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) -{ -} - -static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep) -{ -} - -static inline int huge_pte_none(pte_t pte) -{ - return pte_none(pte); -} - -static inline pte_t huge_pte_wrprotect(pte_t pte) -{ - return pte_wrprotect(pte); -} - -static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, - unsigned long addr, pte_t *ptep, - pte_t pte, int dirty) -{ - return ptep_set_access_flags(vma, addr, ptep, pte, dirty); -} - -static inline pte_t huge_ptep_get(pte_t *ptep) -{ - return *ptep; -} - -static inline int arch_prepare_hugepage(struct page *page) -{ - return 0; -} - -static inline void arch_release_hugepage(struct page *page) -{ -} - -#endif /* _ASM_POWERPC_HUGETLB_H */ diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h deleted file mode 100644 index fbe2932..0000000 --- a/include/asm-powerpc/hvcall.h +++ /dev/null @@ -1,296 +0,0 @@ -#ifndef _ASM_POWERPC_HVCALL_H -#define _ASM_POWERPC_HVCALL_H -#ifdef __KERNEL__ - -#define HVSC .long 0x44000022 - -#define H_SUCCESS 0 -#define H_BUSY 1 /* Hardware busy -- retry later */ -#define H_CLOSED 2 /* Resource closed */ -#define H_NOT_AVAILABLE 3 -#define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ -#define H_PARTIAL 5 -#define H_IN_PROGRESS 14 /* Kind of like busy */ -#define H_PAGE_REGISTERED 15 -#define H_PARTIAL_STORE 16 -#define H_PENDING 17 /* returned from H_POLL_PENDING */ -#define H_CONTINUE 18 /* Returned from H_Join on success */ -#define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ -#define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ - is a good time to retry */ -#define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ - is a good time to retry */ -#define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ - is a good time to retry */ -#define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ - is a good time to retry */ -#define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ - is a good time to retry */ -#define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ - is a good time to retry */ -#define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ -#define H_HARDWARE -1 /* Hardware error */ -#define H_FUNCTION -2 /* Function not supported */ -#define H_PRIVILEGE -3 /* Caller not privileged */ -#define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ -#define H_BAD_MODE -5 /* Illegal msr value */ -#define H_PTEG_FULL -6 /* PTEG is full */ -#define H_NOT_FOUND -7 /* PTE was not found" */ -#define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ -#define H_NO_MEM -9 -#define H_AUTHORITY -10 -#define H_PERMISSION -11 -#define H_DROPPED -12 -#define H_SOURCE_PARM -13 -#define H_DEST_PARM -14 -#define H_REMOTE_PARM -15 -#define H_RESOURCE -16 -#define H_ADAPTER_PARM -17 -#define H_RH_PARM -18 -#define H_RCQ_PARM -19 -#define H_SCQ_PARM -20 -#define H_EQ_PARM -21 -#define H_RT_PARM -22 -#define H_ST_PARM -23 -#define H_SIGT_PARM -24 -#define H_TOKEN_PARM -25 -#define H_MLENGTH_PARM -27 -#define H_MEM_PARM -28 -#define H_MEM_ACCESS_PARM -29 -#define H_ATTR_PARM -30 -#define H_PORT_PARM -31 -#define H_MCG_PARM -32 -#define H_VL_PARM -33 -#define H_TSIZE_PARM -34 -#define H_TRACE_PARM -35 - -#define H_MASK_PARM -37 -#define H_MCG_FULL -38 -#define H_ALIAS_EXIST -39 -#define H_P_COUNTER -40 -#define H_TABLE_FULL -41 -#define H_ALT_TABLE -42 -#define H_MR_CONDITION -43 -#define H_NOT_ENOUGH_RESOURCES -44 -#define H_R_STATE -45 -#define H_RESCINDEND -46 - - -/* Long Busy is a condition that can be returned by the firmware - * when a call cannot be completed now, but the identical call - * should be retried later. This prevents calls blocking in the - * firmware for long periods of time. Annoyingly the firmware can return - * a range of return codes, hinting at how long we should wait before - * retrying. If you don't care for the hint, the macro below is a good - * way to check for the long_busy return codes - */ -#define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ - && (x <= H_LONG_BUSY_END_RANGE)) - -/* Flags */ -#define H_LARGE_PAGE (1UL<<(63-16)) -#define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ -#define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ -#define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */ -#define H_PAGE_STATE_CHANGE (1UL<<(63-28)) -#define H_PAGE_UNUSED ((1UL<<(63-29)) | (1UL<<(63-30))) -#define H_PAGE_SET_UNUSED (H_PAGE_STATE_CHANGE | H_PAGE_UNUSED) -#define H_PAGE_SET_LOANED (H_PAGE_SET_UNUSED | (1UL<<(63-31))) -#define H_PAGE_SET_ACTIVE H_PAGE_STATE_CHANGE -#define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */ -#define H_ANDCOND (1UL<<(63-33)) -#define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ -#define H_ICACHE_SYNCHRONIZE (1UL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ -#define H_ZERO_PAGE (1UL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ -#define H_COPY_PAGE (1UL<<(63-49)) -#define H_N (1UL<<(63-61)) -#define H_PP1 (1UL<<(63-62)) -#define H_PP2 (1UL<<(63-63)) - -/* VASI States */ -#define H_VASI_INVALID 0 -#define H_VASI_ENABLED 1 -#define H_VASI_ABORTED 2 -#define H_VASI_SUSPENDING 3 -#define H_VASI_SUSPENDED 4 -#define H_VASI_RESUMED 5 -#define H_VASI_COMPLETED 6 - -/* DABRX flags */ -#define H_DABRX_HYPERVISOR (1UL<<(63-61)) -#define H_DABRX_KERNEL (1UL<<(63-62)) -#define H_DABRX_USER (1UL<<(63-63)) - -/* Each control block has to be on a 4K bondary */ -#define H_CB_ALIGNMENT 4096 - -/* pSeries hypervisor opcodes */ -#define H_REMOVE 0x04 -#define H_ENTER 0x08 -#define H_READ 0x0c -#define H_CLEAR_MOD 0x10 -#define H_CLEAR_REF 0x14 -#define H_PROTECT 0x18 -#define H_GET_TCE 0x1c -#define H_PUT_TCE 0x20 -#define H_SET_SPRG0 0x24 -#define H_SET_DABR 0x28 -#define H_PAGE_INIT 0x2c -#define H_SET_ASR 0x30 -#define H_ASR_ON 0x34 -#define H_ASR_OFF 0x38 -#define H_LOGICAL_CI_LOAD 0x3c -#define H_LOGICAL_CI_STORE 0x40 -#define H_LOGICAL_CACHE_LOAD 0x44 -#define H_LOGICAL_CACHE_STORE 0x48 -#define H_LOGICAL_ICBI 0x4c -#define H_LOGICAL_DCBF 0x50 -#define H_GET_TERM_CHAR 0x54 -#define H_PUT_TERM_CHAR 0x58 -#define H_REAL_TO_LOGICAL 0x5c -#define H_HYPERVISOR_DATA 0x60 -#define H_EOI 0x64 -#define H_CPPR 0x68 -#define H_IPI 0x6c -#define H_IPOLL 0x70 -#define H_XIRR 0x74 -#define H_PERFMON 0x7c -#define H_MIGRATE_DMA 0x78 -#define H_REGISTER_VPA 0xDC -#define H_CEDE 0xE0 -#define H_CONFER 0xE4 -#define H_PROD 0xE8 -#define H_GET_PPP 0xEC -#define H_SET_PPP 0xF0 -#define H_PURR 0xF4 -#define H_PIC 0xF8 -#define H_REG_CRQ 0xFC -#define H_FREE_CRQ 0x100 -#define H_VIO_SIGNAL 0x104 -#define H_SEND_CRQ 0x108 -#define H_COPY_RDMA 0x110 -#define H_REGISTER_LOGICAL_LAN 0x114 -#define H_FREE_LOGICAL_LAN 0x118 -#define H_ADD_LOGICAL_LAN_BUFFER 0x11C -#define H_SEND_LOGICAL_LAN 0x120 -#define H_BULK_REMOVE 0x124 -#define H_MULTICAST_CTRL 0x130 -#define H_SET_XDABR 0x134 -#define H_STUFF_TCE 0x138 -#define H_PUT_TCE_INDIRECT 0x13C -#define H_CHANGE_LOGICAL_LAN_MAC 0x14C -#define H_VTERM_PARTNER_INFO 0x150 -#define H_REGISTER_VTERM 0x154 -#define H_FREE_VTERM 0x158 -#define H_RESET_EVENTS 0x15C -#define H_ALLOC_RESOURCE 0x160 -#define H_FREE_RESOURCE 0x164 -#define H_MODIFY_QP 0x168 -#define H_QUERY_QP 0x16C -#define H_REREGISTER_PMR 0x170 -#define H_REGISTER_SMR 0x174 -#define H_QUERY_MR 0x178 -#define H_QUERY_MW 0x17C -#define H_QUERY_HCA 0x180 -#define H_QUERY_PORT 0x184 -#define H_MODIFY_PORT 0x188 -#define H_DEFINE_AQP1 0x18C -#define H_GET_TRACE_BUFFER 0x190 -#define H_DEFINE_AQP0 0x194 -#define H_RESIZE_MR 0x198 -#define H_ATTACH_MCQP 0x19C -#define H_DETACH_MCQP 0x1A0 -#define H_CREATE_RPT 0x1A4 -#define H_REMOVE_RPT 0x1A8 -#define H_REGISTER_RPAGES 0x1AC -#define H_DISABLE_AND_GETC 0x1B0 -#define H_ERROR_DATA 0x1B4 -#define H_GET_HCA_INFO 0x1B8 -#define H_GET_PERF_COUNT 0x1BC -#define H_MANAGE_TRACE 0x1C0 -#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 -#define H_QUERY_INT_STATE 0x1E4 -#define H_POLL_PENDING 0x1D8 -#define H_ILLAN_ATTRIBUTES 0x244 -#define H_JOIN 0x298 -#define H_VASI_STATE 0x2A4 -#define H_ENABLE_CRQ 0x2B0 -#define H_SET_MPP 0x2D0 -#define H_GET_MPP 0x2D4 -#define MAX_HCALL_OPCODE H_GET_MPP - -#ifndef __ASSEMBLY__ - -/** - * plpar_hcall_norets: - Make a pseries hypervisor call with no return arguments - * @opcode: The hypervisor call to make. - * - * This call supports up to 7 arguments and only returns the status of - * the hcall. Use this version where possible, its slightly faster than - * the other plpar_hcalls. - */ -long plpar_hcall_norets(unsigned long opcode, ...); - -/** - * plpar_hcall: - Make a pseries hypervisor call - * @opcode: The hypervisor call to make. - * @retbuf: Buffer to store up to 4 return arguments in. - * - * This call supports up to 6 arguments and 4 return arguments. Use - * PLPAR_HCALL_BUFSIZE to size the return argument buffer. - * - * Used for all but the craziest of phyp interfaces (see plpar_hcall9) - */ -#define PLPAR_HCALL_BUFSIZE 4 -long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...); - -/** - * plpar_hcall_raw: - Make a hypervisor call without calculating hcall stats - * @opcode: The hypervisor call to make. - * @retbuf: Buffer to store up to 4 return arguments in. - * - * This call supports up to 6 arguments and 4 return arguments. Use - * PLPAR_HCALL_BUFSIZE to size the return argument buffer. - * - * Used when phyp interface needs to be called in real mode. Similar to - * plpar_hcall, but plpar_hcall_raw works in real mode and does not - * calculate hypervisor call statistics. - */ -long plpar_hcall_raw(unsigned long opcode, unsigned long *retbuf, ...); - -/** - * plpar_hcall9: - Make a pseries hypervisor call with up to 9 return arguments - * @opcode: The hypervisor call to make. - * @retbuf: Buffer to store up to 9 return arguments in. - * - * This call supports up to 9 arguments and 9 return arguments. Use - * PLPAR_HCALL9_BUFSIZE to size the return argument buffer. - */ -#define PLPAR_HCALL9_BUFSIZE 9 -long plpar_hcall9(unsigned long opcode, unsigned long *retbuf, ...); - -/* For hcall instrumentation. One structure per-hcall, per-CPU */ -struct hcall_stats { - unsigned long num_calls; /* number of calls (on this CPU) */ - unsigned long tb_total; /* total wall time (mftb) of calls. */ - unsigned long purr_total; /* total cpu time (PURR) of calls. */ -}; -#define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1) - -struct hvcall_mpp_data { - unsigned long entitled_mem; - unsigned long mapped_mem; - unsigned short group_num; - unsigned short pool_num; - unsigned char mem_weight; - unsigned char unallocated_mem_weight; - unsigned long unallocated_entitlement; /* value in bytes */ - unsigned long pool_size; - signed long loan_request; - unsigned long backing_mem; -}; - -int h_get_mpp(struct hvcall_mpp_data *); -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_HVCALL_H */ diff --git a/include/asm-powerpc/hvconsole.h b/include/asm-powerpc/hvconsole.h deleted file mode 100644 index 35ea69e..0000000 --- a/include/asm-powerpc/hvconsole.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * hvconsole.h - * Copyright (C) 2004 Ryan S Arnold, IBM Corporation - * - * LPAR console support. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _PPC64_HVCONSOLE_H -#define _PPC64_HVCONSOLE_H -#ifdef __KERNEL__ - -/* - * PSeries firmware will only send/recv up to 16 bytes of character data per - * hcall. - */ -#define MAX_VIO_PUT_CHARS 16 -#define SIZE_VIO_GET_CHARS 16 - -/* - * Vio firmware always attempts to fetch MAX_VIO_GET_CHARS chars. The 'count' - * parm is included to conform to put_chars() function pointer template - */ -extern int hvc_get_chars(uint32_t vtermno, char *buf, int count); -extern int hvc_put_chars(uint32_t vtermno, const char *buf, int count); - -#endif /* __KERNEL__ */ -#endif /* _PPC64_HVCONSOLE_H */ diff --git a/include/asm-powerpc/hvcserver.h b/include/asm-powerpc/hvcserver.h deleted file mode 100644 index 67d7da3..0000000 --- a/include/asm-powerpc/hvcserver.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * hvcserver.h - * Copyright (C) 2004 Ryan S Arnold, IBM Corporation - * - * PPC64 virtual I/O console server support. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _PPC64_HVCSERVER_H -#define _PPC64_HVCSERVER_H -#ifdef __KERNEL__ - -#include - -/* Converged Location Code length */ -#define HVCS_CLC_LENGTH 79 - -/** - * hvcs_partner_info - an element in a list of partner info - * @node: list_head denoting this partner_info struct's position in the list of - * partner info. - * @unit_address: The partner unit address of this entry. - * @partition_ID: The partner partition ID of this entry. - * @location_code: The converged location code of this entry + 1 char for the - * null-term. - * - * This structure outlines the format that partner info is presented to a caller - * of the hvcs partner info fetching functions. These are strung together into - * a list using linux kernel lists. - */ -struct hvcs_partner_info { - struct list_head node; - uint32_t unit_address; - uint32_t partition_ID; - char location_code[HVCS_CLC_LENGTH + 1]; /* CLC + 1 null-term char */ -}; - -extern int hvcs_free_partner_info(struct list_head *head); -extern int hvcs_get_partner_info(uint32_t unit_address, - struct list_head *head, unsigned long *pi_buff); -extern int hvcs_register_connection(uint32_t unit_address, - uint32_t p_partition_ID, uint32_t p_unit_address); -extern int hvcs_free_connection(uint32_t unit_address); - -#endif /* __KERNEL__ */ -#endif /* _PPC64_HVCSERVER_H */ diff --git a/include/asm-powerpc/hw_irq.h b/include/asm-powerpc/hw_irq.h deleted file mode 100644 index f75a5fc..0000000 --- a/include/asm-powerpc/hw_irq.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (C) 1999 Cort Dougan - */ -#ifndef _ASM_POWERPC_HW_IRQ_H -#define _ASM_POWERPC_HW_IRQ_H - -#ifdef __KERNEL__ - -#include -#include -#include -#include - -extern void timer_interrupt(struct pt_regs *); - -#ifdef CONFIG_PPC64 -#include - -static inline unsigned long local_get_flags(void) -{ - unsigned long flags; - - __asm__ __volatile__("lbz %0,%1(13)" - : "=r" (flags) - : "i" (offsetof(struct paca_struct, soft_enabled))); - - return flags; -} - -static inline unsigned long raw_local_irq_disable(void) -{ - unsigned long flags, zero; - - __asm__ __volatile__("li %1,0; lbz %0,%2(13); stb %1,%2(13)" - : "=r" (flags), "=&r" (zero) - : "i" (offsetof(struct paca_struct, soft_enabled)) - : "memory"); - - return flags; -} - -extern void raw_local_irq_restore(unsigned long); -extern void iseries_handle_interrupts(void); - -#define raw_local_irq_enable() raw_local_irq_restore(1) -#define raw_local_save_flags(flags) ((flags) = local_get_flags()) -#define raw_local_irq_save(flags) ((flags) = raw_local_irq_disable()) - -#define raw_irqs_disabled() (local_get_flags() == 0) -#define raw_irqs_disabled_flags(flags) ((flags) == 0) - -#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1) -#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1) - -#define hard_irq_disable() \ - do { \ - __hard_irq_disable(); \ - get_paca()->soft_enabled = 0; \ - get_paca()->hard_enabled = 0; \ - } while(0) - -static inline int irqs_disabled_flags(unsigned long flags) -{ - return flags == 0; -} - -#else - -#if defined(CONFIG_BOOKE) -#define SET_MSR_EE(x) mtmsr(x) -#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory") -#else -#define SET_MSR_EE(x) mtmsr(x) -#define local_irq_restore(flags) mtmsr(flags) -#endif - -static inline void local_irq_disable(void) -{ -#ifdef CONFIG_BOOKE - __asm__ __volatile__("wrteei 0": : :"memory"); -#else - unsigned long msr; - __asm__ __volatile__("": : :"memory"); - msr = mfmsr(); - SET_MSR_EE(msr & ~MSR_EE); -#endif -} - -static inline void local_irq_enable(void) -{ -#ifdef CONFIG_BOOKE - __asm__ __volatile__("wrteei 1": : :"memory"); -#else - unsigned long msr; - __asm__ __volatile__("": : :"memory"); - msr = mfmsr(); - SET_MSR_EE(msr | MSR_EE); -#endif -} - -static inline void local_irq_save_ptr(unsigned long *flags) -{ - unsigned long msr; - msr = mfmsr(); - *flags = msr; -#ifdef CONFIG_BOOKE - __asm__ __volatile__("wrteei 0": : :"memory"); -#else - SET_MSR_EE(msr & ~MSR_EE); -#endif - __asm__ __volatile__("": : :"memory"); -} - -#define local_save_flags(flags) ((flags) = mfmsr()) -#define local_irq_save(flags) local_irq_save_ptr(&flags) -#define irqs_disabled() ((mfmsr() & MSR_EE) == 0) - -#define hard_irq_enable() local_irq_enable() -#define hard_irq_disable() local_irq_disable() - -static inline int irqs_disabled_flags(unsigned long flags) -{ - return (flags & MSR_EE) == 0; -} - -#endif /* CONFIG_PPC64 */ - -/* - * interrupt-retrigger: should we handle this via lost interrupts and IPIs - * or should we not care like we do now ? --BenH. - */ -struct hw_interrupt_type; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_HW_IRQ_H */ diff --git a/include/asm-powerpc/hydra.h b/include/asm-powerpc/hydra.h deleted file mode 100644 index 1ad4eed..0000000 --- a/include/asm-powerpc/hydra.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * include/asm-ppc/hydra.h -- Mac I/O `Hydra' definitions - * - * Copyright (C) 1997 Geert Uytterhoeven - * - * This file is based on the following documentation: - * - * Macintosh Technology in the Common Hardware Reference Platform - * Apple Computer, Inc. - * - * © Copyright 1995 Apple Computer, Inc. All rights reserved. - * - * It's available online from http://chrp.apple.com/MacTech.pdf. - * You can obtain paper copies of this book from computer bookstores or by - * writing Morgan Kaufmann Publishers, Inc., 340 Pine Street, Sixth Floor, San - * Francisco, CA 94104. Reference ISBN 1-55860-393-X. - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#ifndef _ASMPPC_HYDRA_H -#define _ASMPPC_HYDRA_H - -#ifdef __KERNEL__ - -struct Hydra { - /* DBDMA Controller Register Space */ - char Pad1[0x30]; - u_int CachePD; - u_int IDs; - u_int Feature_Control; - char Pad2[0x7fc4]; - /* DBDMA Channel Register Space */ - char SCSI_DMA[0x100]; - char Pad3[0x300]; - char SCCA_Tx_DMA[0x100]; - char SCCA_Rx_DMA[0x100]; - char SCCB_Tx_DMA[0x100]; - char SCCB_Rx_DMA[0x100]; - char Pad4[0x7800]; - /* Device Register Space */ - char SCSI[0x1000]; - char ADB[0x1000]; - char SCC_Legacy[0x1000]; - char SCC[0x1000]; - char Pad9[0x2000]; - char VIA[0x2000]; - char Pad10[0x28000]; - char OpenPIC[0x40000]; -}; - -extern volatile struct Hydra __iomem *Hydra; - - - /* - * Feature Control Register - */ - -#define HYDRA_FC_SCC_CELL_EN 0x00000001 /* Enable SCC Clock */ -#define HYDRA_FC_SCSI_CELL_EN 0x00000002 /* Enable SCSI Clock */ -#define HYDRA_FC_SCCA_ENABLE 0x00000004 /* Enable SCC A Lines */ -#define HYDRA_FC_SCCB_ENABLE 0x00000008 /* Enable SCC B Lines */ -#define HYDRA_FC_ARB_BYPASS 0x00000010 /* Bypass Internal Arbiter */ -#define HYDRA_FC_RESET_SCC 0x00000020 /* Reset SCC */ -#define HYDRA_FC_MPIC_ENABLE 0x00000040 /* Enable OpenPIC */ -#define HYDRA_FC_SLOW_SCC_PCLK 0x00000080 /* 1=15.6672, 0=25 MHz */ -#define HYDRA_FC_MPIC_IS_MASTER 0x00000100 /* OpenPIC Master Mode */ - - - /* - * OpenPIC Interrupt Sources - */ - -#define HYDRA_INT_SIO 0 -#define HYDRA_INT_SCSI_DMA 1 -#define HYDRA_INT_SCCA_TX_DMA 2 -#define HYDRA_INT_SCCA_RX_DMA 3 -#define HYDRA_INT_SCCB_TX_DMA 4 -#define HYDRA_INT_SCCB_RX_DMA 5 -#define HYDRA_INT_SCSI 6 -#define HYDRA_INT_SCCA 7 -#define HYDRA_INT_SCCB 8 -#define HYDRA_INT_VIA 9 -#define HYDRA_INT_ADB 10 -#define HYDRA_INT_ADB_NMI 11 -#define HYDRA_INT_EXT1 12 /* PCI IRQW */ -#define HYDRA_INT_EXT2 13 /* PCI IRQX */ -#define HYDRA_INT_EXT3 14 /* PCI IRQY */ -#define HYDRA_INT_EXT4 15 /* PCI IRQZ */ -#define HYDRA_INT_EXT5 16 /* IDE Primay/Secondary */ -#define HYDRA_INT_EXT6 17 /* IDE Secondary */ -#define HYDRA_INT_EXT7 18 /* Power Off Request */ -#define HYDRA_INT_SPARE 19 - -extern int hydra_init(void); -extern void macio_adb_init(void); - -#endif /* __KERNEL__ */ - -#endif /* _ASMPPC_HYDRA_H */ diff --git a/include/asm-powerpc/i8259.h b/include/asm-powerpc/i8259.h deleted file mode 100644 index db1362f..0000000 --- a/include/asm-powerpc/i8259.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _ASM_POWERPC_I8259_H -#define _ASM_POWERPC_I8259_H -#ifdef __KERNEL__ - -#include - -#ifdef CONFIG_PPC_MERGE -extern void i8259_init(struct device_node *node, unsigned long intack_addr); -extern unsigned int i8259_irq(void); -extern struct irq_host *i8259_get_host(void); -#else -extern void i8259_init(unsigned long intack_addr, int offset); -extern int i8259_irq(void); -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_I8259_H */ diff --git a/include/asm-powerpc/ibmebus.h b/include/asm-powerpc/ibmebus.h deleted file mode 100644 index 1a9d9ae..0000000 --- a/include/asm-powerpc/ibmebus.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * IBM PowerPC eBus Infrastructure Support. - * - * Copyright (c) 2005 IBM Corporation - * Joachim Fenkes - * Heiko J Schick - * - * All rights reserved. - * - * This source code is distributed under a dual license of GPL v2.0 and OpenIB - * BSD. - * - * OpenIB BSD License - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials - * provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR - * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER - * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _ASM_EBUS_H -#define _ASM_EBUS_H -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -extern struct bus_type ibmebus_bus_type; - -int ibmebus_register_driver(struct of_platform_driver *drv); -void ibmebus_unregister_driver(struct of_platform_driver *drv); - -int ibmebus_request_irq(u32 ist, irq_handler_t handler, - unsigned long irq_flags, const char *devname, - void *dev_id); -void ibmebus_free_irq(u32 ist, void *dev_id); - -#endif /* __KERNEL__ */ -#endif /* _ASM_IBMEBUS_H */ diff --git a/include/asm-powerpc/ide.h b/include/asm-powerpc/ide.h deleted file mode 100644 index 1aaf27b..0000000 --- a/include/asm-powerpc/ide.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (C) 1994-1996 Linus Torvalds & authors - * - * This file contains the powerpc architecture specific IDE code. - */ -#ifndef _ASM_POWERPC_IDE_H -#define _ASM_POWERPC_IDE_H - -#ifdef __KERNEL__ - -#ifndef __powerpc64__ -#include -#include -#endif -#include - -#define __ide_mm_insw(p, a, c) readsw((void __iomem *)(p), (a), (c)) -#define __ide_mm_insl(p, a, c) readsl((void __iomem *)(p), (a), (c)) -#define __ide_mm_outsw(p, a, c) writesw((void __iomem *)(p), (a), (c)) -#define __ide_mm_outsl(p, a, c) writesl((void __iomem *)(p), (a), (c)) - -#ifndef __powerpc64__ -#include -#include - -/* FIXME: use ide_platform host driver */ -static __inline__ int ide_default_irq(unsigned long base) -{ -#ifdef CONFIG_PPLUS - switch (base) { - case 0x1f0: return 14; - case 0x170: return 15; - } -#endif - return 0; -} - -/* FIXME: use ide_platform host driver */ -static __inline__ unsigned long ide_default_io_base(int index) -{ -#ifdef CONFIG_PPLUS - switch (index) { - case 0: return 0x1f0; - case 1: return 0x170; - } -#endif - return 0; -} - -#ifdef CONFIG_BLK_DEV_MPC8xx_IDE -#define IDE_ARCH_ACK_INTR 1 -#define ide_ack_intr(hwif) ((hwif)->ack_intr ? (hwif)->ack_intr(hwif) : 1) -#endif - -#endif /* __powerpc64__ */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_IDE_H */ diff --git a/include/asm-powerpc/immap_86xx.h b/include/asm-powerpc/immap_86xx.h deleted file mode 100644 index 0f165e5..0000000 --- a/include/asm-powerpc/immap_86xx.h +++ /dev/null @@ -1,156 +0,0 @@ -/** - * MPC86xx Internal Memory Map - * - * Authors: Jeff Brown - * Timur Tabi - * - * Copyright 2004,2007 Freescale Semiconductor, Inc - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * This header file defines structures for various 86xx SOC devices that are - * used by multiple source files. - */ - -#ifndef __ASM_POWERPC_IMMAP_86XX_H__ -#define __ASM_POWERPC_IMMAP_86XX_H__ -#ifdef __KERNEL__ - -/* Global Utility Registers */ -struct ccsr_guts { - __be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */ - __be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */ - __be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */ - __be32 pordevsr; /* 0x.000c - POR I/O Device Status Register */ - __be32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */ - u8 res1[0x20 - 0x14]; - __be32 porcir; /* 0x.0020 - POR Configuration Information Register */ - u8 res2[0x30 - 0x24]; - __be32 gpiocr; /* 0x.0030 - GPIO Control Register */ - u8 res3[0x40 - 0x34]; - __be32 gpoutdr; /* 0x.0040 - General-Purpose Output Data Register */ - u8 res4[0x50 - 0x44]; - __be32 gpindr; /* 0x.0050 - General-Purpose Input Data Register */ - u8 res5[0x60 - 0x54]; - __be32 pmuxcr; /* 0x.0060 - Alternate Function Signal Multiplex Control */ - u8 res6[0x70 - 0x64]; - __be32 devdisr; /* 0x.0070 - Device Disable Control */ - __be32 devdisr2; /* 0x.0074 - Device Disable Control 2 */ - u8 res7[0x80 - 0x78]; - __be32 powmgtcsr; /* 0x.0080 - Power Management Status and Control Register */ - u8 res8[0x90 - 0x84]; - __be32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */ - __be32 rstrscr; /* 0x.0094 - Reset Request Status and Control Register */ - u8 res9[0xA0 - 0x98]; - __be32 pvr; /* 0x.00a0 - Processor Version Register */ - __be32 svr; /* 0x.00a4 - System Version Register */ - u8 res10[0xB0 - 0xA8]; - __be32 rstcr; /* 0x.00b0 - Reset Control Register */ - u8 res11[0xC0 - 0xB4]; - __be32 elbcvselcr; /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */ - u8 res12[0x800 - 0xC4]; - __be32 clkdvdr; /* 0x.0800 - Clock Divide Register */ - u8 res13[0x900 - 0x804]; - __be32 ircr; /* 0x.0900 - Infrared Control Register */ - u8 res14[0x908 - 0x904]; - __be32 dmacr; /* 0x.0908 - DMA Control Register */ - u8 res15[0x914 - 0x90C]; - __be32 elbccr; /* 0x.0914 - eLBC Control Register */ - u8 res16[0xB20 - 0x918]; - __be32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */ - __be32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */ - __be32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */ - u8 res17[0xE00 - 0xB2C]; - __be32 clkocr; /* 0x.0e00 - Clock Out Select Register */ - u8 res18[0xE10 - 0xE04]; - __be32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */ - u8 res19[0xE20 - 0xE14]; - __be32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */ - u8 res20[0xF04 - 0xE24]; - __be32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */ - __be32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */ - u8 res21[0xF40 - 0xF0C]; - __be32 srds2cr0; /* 0x.0f40 - SerDes1 Control Register 0 */ - __be32 srds2cr1; /* 0x.0f44 - SerDes1 Control Register 0 */ -} __attribute__ ((packed)); - -#define CCSR_GUTS_DMACR_DEV_SSI 0 /* DMA controller/channel set to SSI */ -#define CCSR_GUTS_DMACR_DEV_IR 1 /* DMA controller/channel set to IR */ - -/* - * Set the DMACR register in the GUTS - * - * The DMACR register determines the source of initiated transfers for each - * channel on each DMA controller. Rather than have a bunch of repetitive - * macros for the bit patterns, we just have a function that calculates - * them. - * - * guts: Pointer to GUTS structure - * co: The DMA controller (0 or 1) - * ch: The channel on the DMA controller (0, 1, 2, or 3) - * device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx) - */ -static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts, - unsigned int co, unsigned int ch, unsigned int device) -{ - unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); - - clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); -} - -#define CCSR_GUTS_PMUXCR_LDPSEL 0x00010000 -#define CCSR_GUTS_PMUXCR_SSI1_MASK 0x0000C000 /* Bitmask for SSI1 */ -#define CCSR_GUTS_PMUXCR_SSI1_LA 0x00000000 /* Latched address */ -#define CCSR_GUTS_PMUXCR_SSI1_HI 0x00004000 /* High impedance */ -#define CCSR_GUTS_PMUXCR_SSI1_SSI 0x00008000 /* Used for SSI1 */ -#define CCSR_GUTS_PMUXCR_SSI2_MASK 0x00003000 /* Bitmask for SSI2 */ -#define CCSR_GUTS_PMUXCR_SSI2_LA 0x00000000 /* Latched address */ -#define CCSR_GUTS_PMUXCR_SSI2_HI 0x00001000 /* High impedance */ -#define CCSR_GUTS_PMUXCR_SSI2_SSI 0x00002000 /* Used for SSI2 */ -#define CCSR_GUTS_PMUXCR_LA_22_25_LA 0x00000000 /* Latched Address */ -#define CCSR_GUTS_PMUXCR_LA_22_25_HI 0x00000400 /* High impedance */ -#define CCSR_GUTS_PMUXCR_DBGDRV 0x00000200 /* Signals not driven */ -#define CCSR_GUTS_PMUXCR_DMA2_0 0x00000008 -#define CCSR_GUTS_PMUXCR_DMA2_3 0x00000004 -#define CCSR_GUTS_PMUXCR_DMA1_0 0x00000002 -#define CCSR_GUTS_PMUXCR_DMA1_3 0x00000001 - -/* - * Set the DMA external control bits in the GUTS - * - * The DMA external control bits in the PMUXCR are only meaningful for - * channels 0 and 3. Any other channels are ignored. - * - * guts: Pointer to GUTS structure - * co: The DMA controller (0 or 1) - * ch: The channel on the DMA controller (0, 1, 2, or 3) - * value: the new value for the bit (0 or 1) - */ -static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts, - unsigned int co, unsigned int ch, unsigned int value) -{ - if ((ch == 0) || (ch == 3)) { - unsigned int shift = 2 * (co + 1) - (ch & 1) - 1; - - clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift); - } -} - -#define CCSR_GUTS_CLKDVDR_PXCKEN 0x80000000 -#define CCSR_GUTS_CLKDVDR_SSICKEN 0x20000000 -#define CCSR_GUTS_CLKDVDR_PXCKINV 0x10000000 -#define CCSR_GUTS_CLKDVDR_PXCKDLY_SHIFT 25 -#define CCSR_GUTS_CLKDVDR_PXCKDLY_MASK 0x06000000 -#define CCSR_GUTS_CLKDVDR_PXCKDLY(x) \ - (((x) & 3) << CCSR_GUTS_CLKDVDR_PXCKDLY_SHIFT) -#define CCSR_GUTS_CLKDVDR_PXCLK_SHIFT 16 -#define CCSR_GUTS_CLKDVDR_PXCLK_MASK 0x001F0000 -#define CCSR_GUTS_CLKDVDR_PXCLK(x) (((x) & 31) << CCSR_GUTS_CLKDVDR_PXCLK_SHIFT) -#define CCSR_GUTS_CLKDVDR_SSICLK_MASK 0x000000FF -#define CCSR_GUTS_CLKDVDR_SSICLK(x) ((x) & CCSR_GUTS_CLKDVDR_SSICLK_MASK) - -#endif /* __ASM_POWERPC_IMMAP_86XX_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/immap_cpm2.h b/include/asm-powerpc/immap_cpm2.h deleted file mode 100644 index 4080bab..0000000 --- a/include/asm-powerpc/immap_cpm2.h +++ /dev/null @@ -1,650 +0,0 @@ -/* - * CPM2 Internal Memory Map - * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) - * - * The Internal Memory Map for devices with CPM2 on them. This - * is the superset of all CPM2 devices (8260, 8266, 8280, 8272, - * 8560). - */ -#ifdef __KERNEL__ -#ifndef __IMMAP_CPM2__ -#define __IMMAP_CPM2__ - -#include - -/* System configuration registers. -*/ -typedef struct sys_82xx_conf { - u32 sc_siumcr; - u32 sc_sypcr; - u8 res1[6]; - u16 sc_swsr; - u8 res2[20]; - u32 sc_bcr; - u8 sc_ppc_acr; - u8 res3[3]; - u32 sc_ppc_alrh; - u32 sc_ppc_alrl; - u8 sc_lcl_acr; - u8 res4[3]; - u32 sc_lcl_alrh; - u32 sc_lcl_alrl; - u32 sc_tescr1; - u32 sc_tescr2; - u32 sc_ltescr1; - u32 sc_ltescr2; - u32 sc_pdtea; - u8 sc_pdtem; - u8 res5[3]; - u32 sc_ldtea; - u8 sc_ldtem; - u8 res6[163]; -} sysconf_82xx_cpm2_t; - -typedef struct sys_85xx_conf { - u32 sc_cear; - u16 sc_ceer; - u16 sc_cemr; - u8 res1[70]; - u32 sc_smaer; - u8 res2[4]; - u32 sc_smevr; - u32 sc_smctr; - u32 sc_lmaer; - u8 res3[4]; - u32 sc_lmevr; - u32 sc_lmctr; - u8 res4[144]; -} sysconf_85xx_cpm2_t; - -typedef union sys_conf { - sysconf_82xx_cpm2_t siu_82xx; - sysconf_85xx_cpm2_t siu_85xx; -} sysconf_cpm2_t; - - - -/* Memory controller registers. -*/ -typedef struct mem_ctlr { - u32 memc_br0; - u32 memc_or0; - u32 memc_br1; - u32 memc_or1; - u32 memc_br2; - u32 memc_or2; - u32 memc_br3; - u32 memc_or3; - u32 memc_br4; - u32 memc_or4; - u32 memc_br5; - u32 memc_or5; - u32 memc_br6; - u32 memc_or6; - u32 memc_br7; - u32 memc_or7; - u32 memc_br8; - u32 memc_or8; - u32 memc_br9; - u32 memc_or9; - u32 memc_br10; - u32 memc_or10; - u32 memc_br11; - u32 memc_or11; - u8 res1[8]; - u32 memc_mar; - u8 res2[4]; - u32 memc_mamr; - u32 memc_mbmr; - u32 memc_mcmr; - u8 res3[8]; - u16 memc_mptpr; - u8 res4[2]; - u32 memc_mdr; - u8 res5[4]; - u32 memc_psdmr; - u32 memc_lsdmr; - u8 memc_purt; - u8 res6[3]; - u8 memc_psrt; - u8 res7[3]; - u8 memc_lurt; - u8 res8[3]; - u8 memc_lsrt; - u8 res9[3]; - u32 memc_immr; - u32 memc_pcibr0; - u32 memc_pcibr1; - u8 res10[16]; - u32 memc_pcimsk0; - u32 memc_pcimsk1; - u8 res11[52]; -} memctl_cpm2_t; - -/* System Integration Timers. -*/ -typedef struct sys_int_timers { - u8 res1[32]; - u16 sit_tmcntsc; - u8 res2[2]; - u32 sit_tmcnt; - u8 res3[4]; - u32 sit_tmcntal; - u8 res4[16]; - u16 sit_piscr; - u8 res5[2]; - u32 sit_pitc; - u32 sit_pitr; - u8 res6[94]; - u8 res7[390]; -} sit_cpm2_t; - -#define PISCR_PIRQ_MASK ((u16)0xff00) -#define PISCR_PS ((u16)0x0080) -#define PISCR_PIE ((u16)0x0004) -#define PISCR_PTF ((u16)0x0002) -#define PISCR_PTE ((u16)0x0001) - -/* PCI Controller. -*/ -typedef struct pci_ctlr { - u32 pci_omisr; - u32 pci_omimr; - u8 res1[8]; - u32 pci_ifqpr; - u32 pci_ofqpr; - u8 res2[8]; - u32 pci_imr0; - u32 pci_imr1; - u32 pci_omr0; - u32 pci_omr1; - u32 pci_odr; - u8 res3[4]; - u32 pci_idr; - u8 res4[20]; - u32 pci_imisr; - u32 pci_imimr; - u8 res5[24]; - u32 pci_ifhpr; - u8 res6[4]; - u32 pci_iftpr; - u8 res7[4]; - u32 pci_iphpr; - u8 res8[4]; - u32 pci_iptpr; - u8 res9[4]; - u32 pci_ofhpr; - u8 res10[4]; - u32 pci_oftpr; - u8 res11[4]; - u32 pci_ophpr; - u8 res12[4]; - u32 pci_optpr; - u8 res13[8]; - u32 pci_mucr; - u8 res14[8]; - u32 pci_qbar; - u8 res15[12]; - u32 pci_dmamr0; - u32 pci_dmasr0; - u32 pci_dmacdar0; - u8 res16[4]; - u32 pci_dmasar0; - u8 res17[4]; - u32 pci_dmadar0; - u8 res18[4]; - u32 pci_dmabcr0; - u32 pci_dmandar0; - u8 res19[86]; - u32 pci_dmamr1; - u32 pci_dmasr1; - u32 pci_dmacdar1; - u8 res20[4]; - u32 pci_dmasar1; - u8 res21[4]; - u32 pci_dmadar1; - u8 res22[4]; - u32 pci_dmabcr1; - u32 pci_dmandar1; - u8 res23[88]; - u32 pci_dmamr2; - u32 pci_dmasr2; - u32 pci_dmacdar2; - u8 res24[4]; - u32 pci_dmasar2; - u8 res25[4]; - u32 pci_dmadar2; - u8 res26[4]; - u32 pci_dmabcr2; - u32 pci_dmandar2; - u8 res27[88]; - u32 pci_dmamr3; - u32 pci_dmasr3; - u32 pci_dmacdar3; - u8 res28[4]; - u32 pci_dmasar3; - u8 res29[4]; - u32 pci_dmadar3; - u8 res30[4]; - u32 pci_dmabcr3; - u32 pci_dmandar3; - u8 res31[344]; - u32 pci_potar0; - u8 res32[4]; - u32 pci_pobar0; - u8 res33[4]; - u32 pci_pocmr0; - u8 res34[4]; - u32 pci_potar1; - u8 res35[4]; - u32 pci_pobar1; - u8 res36[4]; - u32 pci_pocmr1; - u8 res37[4]; - u32 pci_potar2; - u8 res38[4]; - u32 pci_pobar2; - u8 res39[4]; - u32 pci_pocmr2; - u8 res40[50]; - u32 pci_ptcr; - u32 pci_gpcr; - u32 pci_gcr; - u32 pci_esr; - u32 pci_emr; - u32 pci_ecr; - u32 pci_eacr; - u8 res41[4]; - u32 pci_edcr; - u8 res42[4]; - u32 pci_eccr; - u8 res43[44]; - u32 pci_pitar1; - u8 res44[4]; - u32 pci_pibar1; - u8 res45[4]; - u32 pci_picmr1; - u8 res46[4]; - u32 pci_pitar0; - u8 res47[4]; - u32 pci_pibar0; - u8 res48[4]; - u32 pci_picmr0; - u8 res49[4]; - u32 pci_cfg_addr; - u32 pci_cfg_data; - u32 pci_int_ack; - u8 res50[756]; -} pci_cpm2_t; - -/* Interrupt Controller. -*/ -typedef struct interrupt_controller { - u16 ic_sicr; - u8 res1[2]; - u32 ic_sivec; - u32 ic_sipnrh; - u32 ic_sipnrl; - u32 ic_siprr; - u32 ic_scprrh; - u32 ic_scprrl; - u32 ic_simrh; - u32 ic_simrl; - u32 ic_siexr; - u8 res2[88]; -} intctl_cpm2_t; - -/* Clocks and Reset. -*/ -typedef struct clk_and_reset { - u32 car_sccr; - u8 res1[4]; - u32 car_scmr; - u8 res2[4]; - u32 car_rsr; - u32 car_rmr; - u8 res[104]; -} car_cpm2_t; - -/* Input/Output Port control/status registers. - * Names consistent with processor manual, although they are different - * from the original 8xx names....... - */ -typedef struct io_port { - u32 iop_pdira; - u32 iop_ppara; - u32 iop_psora; - u32 iop_podra; - u32 iop_pdata; - u8 res1[12]; - u32 iop_pdirb; - u32 iop_pparb; - u32 iop_psorb; - u32 iop_podrb; - u32 iop_pdatb; - u8 res2[12]; - u32 iop_pdirc; - u32 iop_pparc; - u32 iop_psorc; - u32 iop_podrc; - u32 iop_pdatc; - u8 res3[12]; - u32 iop_pdird; - u32 iop_ppard; - u32 iop_psord; - u32 iop_podrd; - u32 iop_pdatd; - u8 res4[12]; -} iop_cpm2_t; - -/* Communication Processor Module Timers -*/ -typedef struct cpm_timers { - u8 cpmt_tgcr1; - u8 res1[3]; - u8 cpmt_tgcr2; - u8 res2[11]; - u16 cpmt_tmr1; - u16 cpmt_tmr2; - u16 cpmt_trr1; - u16 cpmt_trr2; - u16 cpmt_tcr1; - u16 cpmt_tcr2; - u16 cpmt_tcn1; - u16 cpmt_tcn2; - u16 cpmt_tmr3; - u16 cpmt_tmr4; - u16 cpmt_trr3; - u16 cpmt_trr4; - u16 cpmt_tcr3; - u16 cpmt_tcr4; - u16 cpmt_tcn3; - u16 cpmt_tcn4; - u16 cpmt_ter1; - u16 cpmt_ter2; - u16 cpmt_ter3; - u16 cpmt_ter4; - u8 res3[584]; -} cpmtimer_cpm2_t; - -/* DMA control/status registers. -*/ -typedef struct sdma_csr { - u8 res0[24]; - u8 sdma_sdsr; - u8 res1[3]; - u8 sdma_sdmr; - u8 res2[3]; - u8 sdma_idsr1; - u8 res3[3]; - u8 sdma_idmr1; - u8 res4[3]; - u8 sdma_idsr2; - u8 res5[3]; - u8 sdma_idmr2; - u8 res6[3]; - u8 sdma_idsr3; - u8 res7[3]; - u8 sdma_idmr3; - u8 res8[3]; - u8 sdma_idsr4; - u8 res9[3]; - u8 sdma_idmr4; - u8 res10[707]; -} sdma_cpm2_t; - -/* Fast controllers -*/ -typedef struct fcc { - u32 fcc_gfmr; - u32 fcc_fpsmr; - u16 fcc_ftodr; - u8 res1[2]; - u16 fcc_fdsr; - u8 res2[2]; - u16 fcc_fcce; - u8 res3[2]; - u16 fcc_fccm; - u8 res4[2]; - u8 fcc_fccs; - u8 res5[3]; - u8 fcc_ftirr_phy[4]; -} fcc_t; - -/* Fast controllers continued - */ -typedef struct fcc_c { - u32 fcc_firper; - u32 fcc_firer; - u32 fcc_firsr_hi; - u32 fcc_firsr_lo; - u8 fcc_gfemr; - u8 res1[15]; -} fcc_c_t; - -/* TC Layer - */ -typedef struct tclayer { - u16 tc_tcmode; - u16 tc_cdsmr; - u16 tc_tcer; - u16 tc_rcc; - u16 tc_tcmr; - u16 tc_fcc; - u16 tc_ccc; - u16 tc_icc; - u16 tc_tcc; - u16 tc_ecc; - u8 res1[12]; -} tclayer_t; - - -/* I2C -*/ -typedef struct i2c { - u8 i2c_i2mod; - u8 res1[3]; - u8 i2c_i2add; - u8 res2[3]; - u8 i2c_i2brg; - u8 res3[3]; - u8 i2c_i2com; - u8 res4[3]; - u8 i2c_i2cer; - u8 res5[3]; - u8 i2c_i2cmr; - u8 res6[331]; -} i2c_cpm2_t; - -typedef struct scc { /* Serial communication channels */ - u32 scc_gsmrl; - u32 scc_gsmrh; - u16 scc_psmr; - u8 res1[2]; - u16 scc_todr; - u16 scc_dsr; - u16 scc_scce; - u8 res2[2]; - u16 scc_sccm; - u8 res3; - u8 scc_sccs; - u8 res4[8]; -} scc_t; - -typedef struct smc { /* Serial management channels */ - u8 res1[2]; - u16 smc_smcmr; - u8 res2[2]; - u8 smc_smce; - u8 res3[3]; - u8 smc_smcm; - u8 res4[5]; -} smc_t; - -/* Serial Peripheral Interface. -*/ -typedef struct spi_ctrl { - u16 spi_spmode; - u8 res1[4]; - u8 spi_spie; - u8 res2[3]; - u8 spi_spim; - u8 res3[2]; - u8 spi_spcom; - u8 res4[82]; -} spictl_cpm2_t; - -/* CPM Mux. -*/ -typedef struct cpmux { - u8 cmx_si1cr; - u8 res1; - u8 cmx_si2cr; - u8 res2; - u32 cmx_fcr; - u32 cmx_scr; - u8 cmx_smr; - u8 res3; - u16 cmx_uar; - u8 res4[16]; -} cpmux_t; - -/* SIRAM control -*/ -typedef struct siram { - u16 si_amr; - u16 si_bmr; - u16 si_cmr; - u16 si_dmr; - u8 si_gmr; - u8 res1; - u8 si_cmdr; - u8 res2; - u8 si_str; - u8 res3; - u16 si_rsr; -} siramctl_t; - -typedef struct mcc { - u16 mcc_mcce; - u8 res1[2]; - u16 mcc_mccm; - u8 res2[2]; - u8 mcc_mccf; - u8 res3[7]; -} mcc_t; - -typedef struct comm_proc { - u32 cp_cpcr; - u32 cp_rccr; - u8 res1[14]; - u16 cp_rter; - u8 res2[2]; - u16 cp_rtmr; - u16 cp_rtscr; - u8 res3[2]; - u32 cp_rtsr; - u8 res4[12]; -} cpm_cpm2_t; - -/* USB Controller. -*/ -typedef struct usb_ctlr { - u8 usb_usmod; - u8 usb_usadr; - u8 usb_uscom; - u8 res1[1]; - u16 usb_usep1; - u16 usb_usep2; - u16 usb_usep3; - u16 usb_usep4; - u8 res2[4]; - u16 usb_usber; - u8 res3[2]; - u16 usb_usbmr; - u8 usb_usbs; - u8 res4[7]; -} usb_cpm2_t; - -/* ...and the whole thing wrapped up.... -*/ - -typedef struct immap { - /* Some references are into the unique and known dpram spaces, - * others are from the generic base. - */ -#define im_dprambase im_dpram1 - u8 im_dpram1[16*1024]; - u8 res1[16*1024]; - u8 im_dpram2[4*1024]; - u8 res2[8*1024]; - u8 im_dpram3[4*1024]; - u8 res3[16*1024]; - - sysconf_cpm2_t im_siu_conf; /* SIU Configuration */ - memctl_cpm2_t im_memctl; /* Memory Controller */ - sit_cpm2_t im_sit; /* System Integration Timers */ - pci_cpm2_t im_pci; /* PCI Controller */ - intctl_cpm2_t im_intctl; /* Interrupt Controller */ - car_cpm2_t im_clkrst; /* Clocks and reset */ - iop_cpm2_t im_ioport; /* IO Port control/status */ - cpmtimer_cpm2_t im_cpmtimer; /* CPM timers */ - sdma_cpm2_t im_sdma; /* SDMA control/status */ - - fcc_t im_fcc[3]; /* Three FCCs */ - u8 res4z[32]; - fcc_c_t im_fcc_c[3]; /* Continued FCCs */ - - u8 res4[32]; - - tclayer_t im_tclayer[8]; /* Eight TCLayers */ - u16 tc_tcgsr; - u16 tc_tcger; - - /* First set of baud rate generators. - */ - u8 res[236]; - u32 im_brgc5; - u32 im_brgc6; - u32 im_brgc7; - u32 im_brgc8; - - u8 res5[608]; - - i2c_cpm2_t im_i2c; /* I2C control/status */ - cpm_cpm2_t im_cpm; /* Communication processor */ - - /* Second set of baud rate generators. - */ - u32 im_brgc1; - u32 im_brgc2; - u32 im_brgc3; - u32 im_brgc4; - - scc_t im_scc[4]; /* Four SCCs */ - smc_t im_smc[2]; /* Couple of SMCs */ - spictl_cpm2_t im_spi; /* A SPI */ - cpmux_t im_cpmux; /* CPM clock route mux */ - siramctl_t im_siramctl1; /* First SI RAM Control */ - mcc_t im_mcc1; /* First MCC */ - siramctl_t im_siramctl2; /* Second SI RAM Control */ - mcc_t im_mcc2; /* Second MCC */ - usb_cpm2_t im_usb; /* USB Controller */ - - u8 res6[1153]; - - u16 im_si1txram[256]; - u8 res7[512]; - u16 im_si1rxram[256]; - u8 res8[512]; - u16 im_si2txram[256]; - u8 res9[512]; - u16 im_si2rxram[256]; - u8 res10[512]; - u8 res11[4096]; -} cpm2_map_t; - -extern cpm2_map_t __iomem *cpm2_immr; - -#endif /* __IMMAP_CPM2__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/immap_qe.h b/include/asm-powerpc/immap_qe.h deleted file mode 100644 index 7b6f411..0000000 --- a/include/asm-powerpc/immap_qe.h +++ /dev/null @@ -1,485 +0,0 @@ -/* - * include/asm-powerpc/immap_qe.h - * - * QUICC Engine (QE) Internal Memory Map. - * The Internal Memory Map for devices with QE on them. This - * is the superset of all QE devices (8360, etc.). - - * Copyright (C) 2006. Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_POWERPC_IMMAP_QE_H -#define _ASM_POWERPC_IMMAP_QE_H -#ifdef __KERNEL__ - -#include -#include - -#define QE_IMMAP_SIZE (1024 * 1024) /* 1MB from 1MB+IMMR */ - -/* QE I-RAM */ -struct qe_iram { - __be32 iadd; /* I-RAM Address Register */ - __be32 idata; /* I-RAM Data Register */ - u8 res0[0x78]; -} __attribute__ ((packed)); - -/* QE Interrupt Controller */ -struct qe_ic_regs { - __be32 qicr; - __be32 qivec; - __be32 qripnr; - __be32 qipnr; - __be32 qipxcc; - __be32 qipycc; - __be32 qipwcc; - __be32 qipzcc; - __be32 qimr; - __be32 qrimr; - __be32 qicnr; - u8 res0[0x4]; - __be32 qiprta; - __be32 qiprtb; - u8 res1[0x4]; - __be32 qricr; - u8 res2[0x20]; - __be32 qhivec; - u8 res3[0x1C]; -} __attribute__ ((packed)); - -/* Communications Processor */ -struct cp_qe { - __be32 cecr; /* QE command register */ - __be32 ceccr; /* QE controller configuration register */ - __be32 cecdr; /* QE command data register */ - u8 res0[0xA]; - __be16 ceter; /* QE timer event register */ - u8 res1[0x2]; - __be16 cetmr; /* QE timers mask register */ - __be32 cetscr; /* QE time-stamp timer control register */ - __be32 cetsr1; /* QE time-stamp register 1 */ - __be32 cetsr2; /* QE time-stamp register 2 */ - u8 res2[0x8]; - __be32 cevter; /* QE virtual tasks event register */ - __be32 cevtmr; /* QE virtual tasks mask register */ - __be16 cercr; /* QE RAM control register */ - u8 res3[0x2]; - u8 res4[0x24]; - __be16 ceexe1; /* QE external request 1 event register */ - u8 res5[0x2]; - __be16 ceexm1; /* QE external request 1 mask register */ - u8 res6[0x2]; - __be16 ceexe2; /* QE external request 2 event register */ - u8 res7[0x2]; - __be16 ceexm2; /* QE external request 2 mask register */ - u8 res8[0x2]; - __be16 ceexe3; /* QE external request 3 event register */ - u8 res9[0x2]; - __be16 ceexm3; /* QE external request 3 mask register */ - u8 res10[0x2]; - __be16 ceexe4; /* QE external request 4 event register */ - u8 res11[0x2]; - __be16 ceexm4; /* QE external request 4 mask register */ - u8 res12[0x3A]; - __be32 ceurnr; /* QE microcode revision number register */ - u8 res13[0x244]; -} __attribute__ ((packed)); - -/* QE Multiplexer */ -struct qe_mux { - __be32 cmxgcr; /* CMX general clock route register */ - __be32 cmxsi1cr_l; /* CMX SI1 clock route low register */ - __be32 cmxsi1cr_h; /* CMX SI1 clock route high register */ - __be32 cmxsi1syr; /* CMX SI1 SYNC route register */ - __be32 cmxucr[4]; /* CMX UCCx clock route registers */ - __be32 cmxupcr; /* CMX UPC clock route register */ - u8 res0[0x1C]; -} __attribute__ ((packed)); - -/* QE Timers */ -struct qe_timers { - u8 gtcfr1; /* Timer 1 and Timer 2 global config register*/ - u8 res0[0x3]; - u8 gtcfr2; /* Timer 3 and timer 4 global config register*/ - u8 res1[0xB]; - __be16 gtmdr1; /* Timer 1 mode register */ - __be16 gtmdr2; /* Timer 2 mode register */ - __be16 gtrfr1; /* Timer 1 reference register */ - __be16 gtrfr2; /* Timer 2 reference register */ - __be16 gtcpr1; /* Timer 1 capture register */ - __be16 gtcpr2; /* Timer 2 capture register */ - __be16 gtcnr1; /* Timer 1 counter */ - __be16 gtcnr2; /* Timer 2 counter */ - __be16 gtmdr3; /* Timer 3 mode register */ - __be16 gtmdr4; /* Timer 4 mode register */ - __be16 gtrfr3; /* Timer 3 reference register */ - __be16 gtrfr4; /* Timer 4 reference register */ - __be16 gtcpr3; /* Timer 3 capture register */ - __be16 gtcpr4; /* Timer 4 capture register */ - __be16 gtcnr3; /* Timer 3 counter */ - __be16 gtcnr4; /* Timer 4 counter */ - __be16 gtevr1; /* Timer 1 event register */ - __be16 gtevr2; /* Timer 2 event register */ - __be16 gtevr3; /* Timer 3 event register */ - __be16 gtevr4; /* Timer 4 event register */ - __be16 gtps; /* Timer 1 prescale register */ - u8 res2[0x46]; -} __attribute__ ((packed)); - -/* BRG */ -struct qe_brg { - __be32 brgc[16]; /* BRG configuration registers */ - u8 res0[0x40]; -} __attribute__ ((packed)); - -/* SPI */ -struct spi { - u8 res0[0x20]; - __be32 spmode; /* SPI mode register */ - u8 res1[0x2]; - u8 spie; /* SPI event register */ - u8 res2[0x1]; - u8 res3[0x2]; - u8 spim; /* SPI mask register */ - u8 res4[0x1]; - u8 res5[0x1]; - u8 spcom; /* SPI command register */ - u8 res6[0x2]; - __be32 spitd; /* SPI transmit data register (cpu mode) */ - __be32 spird; /* SPI receive data register (cpu mode) */ - u8 res7[0x8]; -} __attribute__ ((packed)); - -/* SI */ -struct si1 { - __be16 siamr1; /* SI1 TDMA mode register */ - __be16 sibmr1; /* SI1 TDMB mode register */ - __be16 sicmr1; /* SI1 TDMC mode register */ - __be16 sidmr1; /* SI1 TDMD mode register */ - u8 siglmr1_h; /* SI1 global mode register high */ - u8 res0[0x1]; - u8 sicmdr1_h; /* SI1 command register high */ - u8 res2[0x1]; - u8 sistr1_h; /* SI1 status register high */ - u8 res3[0x1]; - __be16 sirsr1_h; /* SI1 RAM shadow address register high */ - u8 sitarc1; /* SI1 RAM counter Tx TDMA */ - u8 sitbrc1; /* SI1 RAM counter Tx TDMB */ - u8 sitcrc1; /* SI1 RAM counter Tx TDMC */ - u8 sitdrc1; /* SI1 RAM counter Tx TDMD */ - u8 sirarc1; /* SI1 RAM counter Rx TDMA */ - u8 sirbrc1; /* SI1 RAM counter Rx TDMB */ - u8 sircrc1; /* SI1 RAM counter Rx TDMC */ - u8 sirdrc1; /* SI1 RAM counter Rx TDMD */ - u8 res4[0x8]; - __be16 siemr1; /* SI1 TDME mode register 16 bits */ - __be16 sifmr1; /* SI1 TDMF mode register 16 bits */ - __be16 sigmr1; /* SI1 TDMG mode register 16 bits */ - __be16 sihmr1; /* SI1 TDMH mode register 16 bits */ - u8 siglmg1_l; /* SI1 global mode register low 8 bits */ - u8 res5[0x1]; - u8 sicmdr1_l; /* SI1 command register low 8 bits */ - u8 res6[0x1]; - u8 sistr1_l; /* SI1 status register low 8 bits */ - u8 res7[0x1]; - __be16 sirsr1_l; /* SI1 RAM shadow address register low 16 bits*/ - u8 siterc1; /* SI1 RAM counter Tx TDME 8 bits */ - u8 sitfrc1; /* SI1 RAM counter Tx TDMF 8 bits */ - u8 sitgrc1; /* SI1 RAM counter Tx TDMG 8 bits */ - u8 sithrc1; /* SI1 RAM counter Tx TDMH 8 bits */ - u8 sirerc1; /* SI1 RAM counter Rx TDME 8 bits */ - u8 sirfrc1; /* SI1 RAM counter Rx TDMF 8 bits */ - u8 sirgrc1; /* SI1 RAM counter Rx TDMG 8 bits */ - u8 sirhrc1; /* SI1 RAM counter Rx TDMH 8 bits */ - u8 res8[0x8]; - __be32 siml1; /* SI1 multiframe limit register */ - u8 siedm1; /* SI1 extended diagnostic mode register */ - u8 res9[0xBB]; -} __attribute__ ((packed)); - -/* SI Routing Tables */ -struct sir { - u8 tx[0x400]; - u8 rx[0x400]; - u8 res0[0x800]; -} __attribute__ ((packed)); - -/* USB Controller */ -struct usb_ctlr { - u8 usb_usmod; - u8 usb_usadr; - u8 usb_uscom; - u8 res1[1]; - __be16 usb_usep1; - __be16 usb_usep2; - __be16 usb_usep3; - __be16 usb_usep4; - u8 res2[4]; - __be16 usb_usber; - u8 res3[2]; - __be16 usb_usbmr; - u8 res4[1]; - u8 usb_usbs; - __be16 usb_ussft; - u8 res5[2]; - __be16 usb_usfrn; - u8 res6[0x22]; -} __attribute__ ((packed)); - -/* MCC */ -struct mcc { - __be32 mcce; /* MCC event register */ - __be32 mccm; /* MCC mask register */ - __be32 mccf; /* MCC configuration register */ - __be32 merl; /* MCC emergency request level register */ - u8 res0[0xF0]; -} __attribute__ ((packed)); - -/* QE UCC Slow */ -struct ucc_slow { - __be32 gumr_l; /* UCCx general mode register (low) */ - __be32 gumr_h; /* UCCx general mode register (high) */ - __be16 upsmr; /* UCCx protocol-specific mode register */ - u8 res0[0x2]; - __be16 utodr; /* UCCx transmit on demand register */ - __be16 udsr; /* UCCx data synchronization register */ - __be16 ucce; /* UCCx event register */ - u8 res1[0x2]; - __be16 uccm; /* UCCx mask register */ - u8 res2[0x1]; - u8 uccs; /* UCCx status register */ - u8 res3[0x24]; - __be16 utpt; - u8 res4[0x52]; - u8 guemr; /* UCC general extended mode register */ -} __attribute__ ((packed)); - -/* QE UCC Fast */ -struct ucc_fast { - __be32 gumr; /* UCCx general mode register */ - __be32 upsmr; /* UCCx protocol-specific mode register */ - __be16 utodr; /* UCCx transmit on demand register */ - u8 res0[0x2]; - __be16 udsr; /* UCCx data synchronization register */ - u8 res1[0x2]; - __be32 ucce; /* UCCx event register */ - __be32 uccm; /* UCCx mask register */ - u8 uccs; /* UCCx status register */ - u8 res2[0x7]; - __be32 urfb; /* UCC receive FIFO base */ - __be16 urfs; /* UCC receive FIFO size */ - u8 res3[0x2]; - __be16 urfet; /* UCC receive FIFO emergency threshold */ - __be16 urfset; /* UCC receive FIFO special emergency - threshold */ - __be32 utfb; /* UCC transmit FIFO base */ - __be16 utfs; /* UCC transmit FIFO size */ - u8 res4[0x2]; - __be16 utfet; /* UCC transmit FIFO emergency threshold */ - u8 res5[0x2]; - __be16 utftt; /* UCC transmit FIFO transmit threshold */ - u8 res6[0x2]; - __be16 utpt; /* UCC transmit polling timer */ - u8 res7[0x2]; - __be32 urtry; /* UCC retry counter register */ - u8 res8[0x4C]; - u8 guemr; /* UCC general extended mode register */ -} __attribute__ ((packed)); - -struct ucc { - union { - struct ucc_slow slow; - struct ucc_fast fast; - u8 res[0x200]; /* UCC blocks are 512 bytes each */ - }; -} __attribute__ ((packed)); - -/* MultiPHY UTOPIA POS Controllers (UPC) */ -struct upc { - __be32 upgcr; /* UTOPIA/POS general configuration register */ - __be32 uplpa; /* UTOPIA/POS last PHY address */ - __be32 uphec; /* ATM HEC register */ - __be32 upuc; /* UTOPIA/POS UCC configuration */ - __be32 updc1; /* UTOPIA/POS device 1 configuration */ - __be32 updc2; /* UTOPIA/POS device 2 configuration */ - __be32 updc3; /* UTOPIA/POS device 3 configuration */ - __be32 updc4; /* UTOPIA/POS device 4 configuration */ - __be32 upstpa; /* UTOPIA/POS STPA threshold */ - u8 res0[0xC]; - __be32 updrs1_h; /* UTOPIA/POS device 1 rate select */ - __be32 updrs1_l; /* UTOPIA/POS device 1 rate select */ - __be32 updrs2_h; /* UTOPIA/POS device 2 rate select */ - __be32 updrs2_l; /* UTOPIA/POS device 2 rate select */ - __be32 updrs3_h; /* UTOPIA/POS device 3 rate select */ - __be32 updrs3_l; /* UTOPIA/POS device 3 rate select */ - __be32 updrs4_h; /* UTOPIA/POS device 4 rate select */ - __be32 updrs4_l; /* UTOPIA/POS device 4 rate select */ - __be32 updrp1; /* UTOPIA/POS device 1 receive priority low */ - __be32 updrp2; /* UTOPIA/POS device 2 receive priority low */ - __be32 updrp3; /* UTOPIA/POS device 3 receive priority low */ - __be32 updrp4; /* UTOPIA/POS device 4 receive priority low */ - __be32 upde1; /* UTOPIA/POS device 1 event */ - __be32 upde2; /* UTOPIA/POS device 2 event */ - __be32 upde3; /* UTOPIA/POS device 3 event */ - __be32 upde4; /* UTOPIA/POS device 4 event */ - __be16 uprp1; - __be16 uprp2; - __be16 uprp3; - __be16 uprp4; - u8 res1[0x8]; - __be16 uptirr1_0; /* Device 1 transmit internal rate 0 */ - __be16 uptirr1_1; /* Device 1 transmit internal rate 1 */ - __be16 uptirr1_2; /* Device 1 transmit internal rate 2 */ - __be16 uptirr1_3; /* Device 1 transmit internal rate 3 */ - __be16 uptirr2_0; /* Device 2 transmit internal rate 0 */ - __be16 uptirr2_1; /* Device 2 transmit internal rate 1 */ - __be16 uptirr2_2; /* Device 2 transmit internal rate 2 */ - __be16 uptirr2_3; /* Device 2 transmit internal rate 3 */ - __be16 uptirr3_0; /* Device 3 transmit internal rate 0 */ - __be16 uptirr3_1; /* Device 3 transmit internal rate 1 */ - __be16 uptirr3_2; /* Device 3 transmit internal rate 2 */ - __be16 uptirr3_3; /* Device 3 transmit internal rate 3 */ - __be16 uptirr4_0; /* Device 4 transmit internal rate 0 */ - __be16 uptirr4_1; /* Device 4 transmit internal rate 1 */ - __be16 uptirr4_2; /* Device 4 transmit internal rate 2 */ - __be16 uptirr4_3; /* Device 4 transmit internal rate 3 */ - __be32 uper1; /* Device 1 port enable register */ - __be32 uper2; /* Device 2 port enable register */ - __be32 uper3; /* Device 3 port enable register */ - __be32 uper4; /* Device 4 port enable register */ - u8 res2[0x150]; -} __attribute__ ((packed)); - -/* SDMA */ -struct sdma { - __be32 sdsr; /* Serial DMA status register */ - __be32 sdmr; /* Serial DMA mode register */ - __be32 sdtr1; /* SDMA system bus threshold register */ - __be32 sdtr2; /* SDMA secondary bus threshold register */ - __be32 sdhy1; /* SDMA system bus hysteresis register */ - __be32 sdhy2; /* SDMA secondary bus hysteresis register */ - __be32 sdta1; /* SDMA system bus address register */ - __be32 sdta2; /* SDMA secondary bus address register */ - __be32 sdtm1; /* SDMA system bus MSNUM register */ - __be32 sdtm2; /* SDMA secondary bus MSNUM register */ - u8 res0[0x10]; - __be32 sdaqr; /* SDMA address bus qualify register */ - __be32 sdaqmr; /* SDMA address bus qualify mask register */ - u8 res1[0x4]; - __be32 sdebcr; /* SDMA CAM entries base register */ - u8 res2[0x38]; -} __attribute__ ((packed)); - -/* Debug Space */ -struct dbg { - __be32 bpdcr; /* Breakpoint debug command register */ - __be32 bpdsr; /* Breakpoint debug status register */ - __be32 bpdmr; /* Breakpoint debug mask register */ - __be32 bprmrr0; /* Breakpoint request mode risc register 0 */ - __be32 bprmrr1; /* Breakpoint request mode risc register 1 */ - u8 res0[0x8]; - __be32 bprmtr0; /* Breakpoint request mode trb register 0 */ - __be32 bprmtr1; /* Breakpoint request mode trb register 1 */ - u8 res1[0x8]; - __be32 bprmir; /* Breakpoint request mode immediate register */ - __be32 bprmsr; /* Breakpoint request mode serial register */ - __be32 bpemr; /* Breakpoint exit mode register */ - u8 res2[0x48]; -} __attribute__ ((packed)); - -/* - * RISC Special Registers (Trap and Breakpoint). These are described in - * the QE Developer's Handbook. - */ -struct rsp { - __be32 tibcr[16]; /* Trap/instruction breakpoint control regs */ - u8 res0[64]; - __be32 ibcr0; - __be32 ibs0; - __be32 ibcnr0; - u8 res1[4]; - __be32 ibcr1; - __be32 ibs1; - __be32 ibcnr1; - __be32 npcr; - __be32 dbcr; - __be32 dbar; - __be32 dbamr; - __be32 dbsr; - __be32 dbcnr; - u8 res2[12]; - __be32 dbdr_h; - __be32 dbdr_l; - __be32 dbdmr_h; - __be32 dbdmr_l; - __be32 bsr; - __be32 bor; - __be32 bior; - u8 res3[4]; - __be32 iatr[4]; - __be32 eccr; /* Exception control configuration register */ - __be32 eicr; - u8 res4[0x100-0xf8]; -} __attribute__ ((packed)); - -struct qe_immap { - struct qe_iram iram; /* I-RAM */ - struct qe_ic_regs ic; /* Interrupt Controller */ - struct cp_qe cp; /* Communications Processor */ - struct qe_mux qmx; /* QE Multiplexer */ - struct qe_timers qet; /* QE Timers */ - struct spi spi[0x2]; /* spi */ - struct mcc mcc; /* mcc */ - struct qe_brg brg; /* brg */ - struct usb_ctlr usb; /* USB */ - struct si1 si1; /* SI */ - u8 res11[0x800]; - struct sir sir; /* SI Routing Tables */ - struct ucc ucc1; /* ucc1 */ - struct ucc ucc3; /* ucc3 */ - struct ucc ucc5; /* ucc5 */ - struct ucc ucc7; /* ucc7 */ - u8 res12[0x600]; - struct upc upc1; /* MultiPHY UTOPIA POS Ctrlr 1*/ - struct ucc ucc2; /* ucc2 */ - struct ucc ucc4; /* ucc4 */ - struct ucc ucc6; /* ucc6 */ - struct ucc ucc8; /* ucc8 */ - u8 res13[0x600]; - struct upc upc2; /* MultiPHY UTOPIA POS Ctrlr 2*/ - struct sdma sdma; /* SDMA */ - struct dbg dbg; /* 0x104080 - 0x1040FF - Debug Space */ - struct rsp rsp[0x2]; /* 0x104100 - 0x1042FF - RISC Special Registers - (Trap and Breakpoint) */ - u8 res14[0x300]; /* 0x104300 - 0x1045FF */ - u8 res15[0x3A00]; /* 0x104600 - 0x107FFF */ - u8 res16[0x8000]; /* 0x108000 - 0x110000 */ - u8 muram[0xC000]; /* 0x110000 - 0x11C000 - Multi-user RAM */ - u8 res17[0x24000]; /* 0x11C000 - 0x140000 */ - u8 res18[0xC0000]; /* 0x140000 - 0x200000 */ -} __attribute__ ((packed)); - -extern struct qe_immap __iomem *qe_immr; -extern phys_addr_t get_qe_base(void); - -static inline unsigned long immrbar_virt_to_phys(void *address) -{ - if ( ((u32)address >= (u32)qe_immr) && - ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) ) - return (unsigned long)(address - (u32)qe_immr + - (u32)get_qe_base()); - return (unsigned long)virt_to_phys(address); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_IMMAP_QE_H */ diff --git a/include/asm-powerpc/io-defs.h b/include/asm-powerpc/io-defs.h deleted file mode 100644 index 44d7927..0000000 --- a/include/asm-powerpc/io-defs.h +++ /dev/null @@ -1,60 +0,0 @@ -/* This file is meant to be include multiple times by other headers */ -/* last 2 argments are used by platforms/cell/io-workarounds.[ch] */ - -DEF_PCI_AC_RET(readb, u8, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_RET(readw, u16, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_RET(readl, u32, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_RET(readw_be, u16, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_RET(readl_be, u32, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_NORET(writeb, (u8 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -DEF_PCI_AC_NORET(writew, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -DEF_PCI_AC_NORET(writel, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -DEF_PCI_AC_NORET(writew_be, (u16 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -DEF_PCI_AC_NORET(writel_be, (u32 val, PCI_IO_ADDR addr), (val, addr), mem, addr) - -#ifdef __powerpc64__ -DEF_PCI_AC_RET(readq, u64, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_RET(readq_be, u64, (const PCI_IO_ADDR addr), (addr), mem, addr) -DEF_PCI_AC_NORET(writeq, (u64 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -DEF_PCI_AC_NORET(writeq_be, (u64 val, PCI_IO_ADDR addr), (val, addr), mem, addr) -#endif /* __powerpc64__ */ - -DEF_PCI_AC_RET(inb, u8, (unsigned long port), (port), pio, port) -DEF_PCI_AC_RET(inw, u16, (unsigned long port), (port), pio, port) -DEF_PCI_AC_RET(inl, u32, (unsigned long port), (port), pio, port) -DEF_PCI_AC_NORET(outb, (u8 val, unsigned long port), (val, port), pio, port) -DEF_PCI_AC_NORET(outw, (u16 val, unsigned long port), (val, port), pio, port) -DEF_PCI_AC_NORET(outl, (u32 val, unsigned long port), (val, port), pio, port) - -DEF_PCI_AC_NORET(readsb, (const PCI_IO_ADDR a, void *b, unsigned long c), - (a, b, c), mem, a) -DEF_PCI_AC_NORET(readsw, (const PCI_IO_ADDR a, void *b, unsigned long c), - (a, b, c), mem, a) -DEF_PCI_AC_NORET(readsl, (const PCI_IO_ADDR a, void *b, unsigned long c), - (a, b, c), mem, a) -DEF_PCI_AC_NORET(writesb, (PCI_IO_ADDR a, const void *b, unsigned long c), - (a, b, c), mem, a) -DEF_PCI_AC_NORET(writesw, (PCI_IO_ADDR a, const void *b, unsigned long c), - (a, b, c), mem, a) -DEF_PCI_AC_NORET(writesl, (PCI_IO_ADDR a, const void *b, unsigned long c), - (a, b, c), mem, a) - -DEF_PCI_AC_NORET(insb, (unsigned long p, void *b, unsigned long c), - (p, b, c), pio, p) -DEF_PCI_AC_NORET(insw, (unsigned long p, void *b, unsigned long c), - (p, b, c), pio, p) -DEF_PCI_AC_NORET(insl, (unsigned long p, void *b, unsigned long c), - (p, b, c), pio, p) -DEF_PCI_AC_NORET(outsb, (unsigned long p, const void *b, unsigned long c), - (p, b, c), pio, p) -DEF_PCI_AC_NORET(outsw, (unsigned long p, const void *b, unsigned long c), - (p, b, c), pio, p) -DEF_PCI_AC_NORET(outsl, (unsigned long p, const void *b, unsigned long c), - (p, b, c), pio, p) - -DEF_PCI_AC_NORET(memset_io, (PCI_IO_ADDR a, int c, unsigned long n), - (a, c, n), mem, a) -DEF_PCI_AC_NORET(memcpy_fromio, (void *d, const PCI_IO_ADDR s, unsigned long n), - (d, s, n), mem, s) -DEF_PCI_AC_NORET(memcpy_toio, (PCI_IO_ADDR d, const void *s, unsigned long n), - (d, s, n), mem, d) diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h deleted file mode 100644 index 77c7fa0..0000000 --- a/include/asm-powerpc/io.h +++ /dev/null @@ -1,787 +0,0 @@ -#ifndef _ASM_POWERPC_IO_H -#define _ASM_POWERPC_IO_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* Check of existence of legacy devices */ -extern int check_legacy_ioport(unsigned long base_port); -#define I8042_DATA_REG 0x60 -#define FDC_BASE 0x3f0 -/* only relevant for PReP */ -#define _PIDXR 0x279 -#define _PNPWRP 0xa79 -#define PNPBIOS_BASE 0xf000 - -#include -#include - -#include -#include -#include -#include -#include -#include - -#include - -#ifdef CONFIG_PPC64 -#include -#endif - -#define SIO_CONFIG_RA 0x398 -#define SIO_CONFIG_RD 0x399 - -#define SLOW_DOWN_IO - -/* 32 bits uses slightly different variables for the various IO - * bases. Most of this file only uses _IO_BASE though which we - * define properly based on the platform - */ -#ifndef CONFIG_PCI -#define _IO_BASE 0 -#define _ISA_MEM_BASE 0 -#define PCI_DRAM_OFFSET 0 -#elif defined(CONFIG_PPC32) -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#define PCI_DRAM_OFFSET pci_dram_offset -#else -#define _IO_BASE pci_io_base -#define _ISA_MEM_BASE isa_mem_base -#define PCI_DRAM_OFFSET 0 -#endif - -extern unsigned long isa_io_base; -extern unsigned long pci_io_base; -extern unsigned long pci_dram_offset; - -extern resource_size_t isa_mem_base; - -#if defined(CONFIG_PPC32) && defined(CONFIG_PPC_INDIRECT_IO) -#error CONFIG_PPC_INDIRECT_IO is not yet supported on 32 bits -#endif - -/* - * - * Low level MMIO accessors - * - * This provides the non-bus specific accessors to MMIO. Those are PowerPC - * specific and thus shouldn't be used in generic code. The accessors - * provided here are: - * - * in_8, in_le16, in_be16, in_le32, in_be32, in_le64, in_be64 - * out_8, out_le16, out_be16, out_le32, out_be32, out_le64, out_be64 - * _insb, _insw_ns, _insl_ns, _outsb, _outsw_ns, _outsl_ns - * - * Those operate directly on a kernel virtual address. Note that the prototype - * for the out_* accessors has the arguments in opposite order from the usual - * linux PCI accessors. Unlike those, they take the address first and the value - * next. - * - * Note: I might drop the _ns suffix on the stream operations soon as it is - * simply normal for stream operations to not swap in the first place. - * - */ - -#ifdef CONFIG_PPC64 -#define IO_SET_SYNC_FLAG() do { local_paca->io_sync = 1; } while(0) -#else -#define IO_SET_SYNC_FLAG() -#endif - -/* gcc 4.0 and older doesn't have 'Z' constraint */ -#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ == 0) -#define DEF_MMIO_IN_LE(name, size, insn) \ -static inline u##size name(const volatile u##size __iomem *addr) \ -{ \ - u##size ret; \ - __asm__ __volatile__("sync;"#insn" %0,0,%1;twi 0,%0,0;isync" \ - : "=r" (ret) : "r" (addr), "m" (*addr) : "memory"); \ - return ret; \ -} - -#define DEF_MMIO_OUT_LE(name, size, insn) \ -static inline void name(volatile u##size __iomem *addr, u##size val) \ -{ \ - __asm__ __volatile__("sync;"#insn" %1,0,%2" \ - : "=m" (*addr) : "r" (val), "r" (addr) : "memory"); \ - IO_SET_SYNC_FLAG(); \ -} -#else /* newer gcc */ -#define DEF_MMIO_IN_LE(name, size, insn) \ -static inline u##size name(const volatile u##size __iomem *addr) \ -{ \ - u##size ret; \ - __asm__ __volatile__("sync;"#insn" %0,%y1;twi 0,%0,0;isync" \ - : "=r" (ret) : "Z" (*addr) : "memory"); \ - return ret; \ -} - -#define DEF_MMIO_OUT_LE(name, size, insn) \ -static inline void name(volatile u##size __iomem *addr, u##size val) \ -{ \ - __asm__ __volatile__("sync;"#insn" %1,%y0" \ - : "=Z" (*addr) : "r" (val) : "memory"); \ - IO_SET_SYNC_FLAG(); \ -} -#endif - -#define DEF_MMIO_IN_BE(name, size, insn) \ -static inline u##size name(const volatile u##size __iomem *addr) \ -{ \ - u##size ret; \ - __asm__ __volatile__("sync;"#insn"%U1%X1 %0,%1;twi 0,%0,0;isync"\ - : "=r" (ret) : "m" (*addr) : "memory"); \ - return ret; \ -} - -#define DEF_MMIO_OUT_BE(name, size, insn) \ -static inline void name(volatile u##size __iomem *addr, u##size val) \ -{ \ - __asm__ __volatile__("sync;"#insn"%U0%X0 %1,%0" \ - : "=m" (*addr) : "r" (val) : "memory"); \ - IO_SET_SYNC_FLAG(); \ -} - - -DEF_MMIO_IN_BE(in_8, 8, lbz); -DEF_MMIO_IN_BE(in_be16, 16, lhz); -DEF_MMIO_IN_BE(in_be32, 32, lwz); -DEF_MMIO_IN_LE(in_le16, 16, lhbrx); -DEF_MMIO_IN_LE(in_le32, 32, lwbrx); - -DEF_MMIO_OUT_BE(out_8, 8, stb); -DEF_MMIO_OUT_BE(out_be16, 16, sth); -DEF_MMIO_OUT_BE(out_be32, 32, stw); -DEF_MMIO_OUT_LE(out_le16, 16, sthbrx); -DEF_MMIO_OUT_LE(out_le32, 32, stwbrx); - -#ifdef __powerpc64__ -DEF_MMIO_OUT_BE(out_be64, 64, std); -DEF_MMIO_IN_BE(in_be64, 64, ld); - -/* There is no asm instructions for 64 bits reverse loads and stores */ -static inline u64 in_le64(const volatile u64 __iomem *addr) -{ - return swab64(in_be64(addr)); -} - -static inline void out_le64(volatile u64 __iomem *addr, u64 val) -{ - out_be64(addr, swab64(val)); -} -#endif /* __powerpc64__ */ - -/* - * Low level IO stream instructions are defined out of line for now - */ -extern void _insb(const volatile u8 __iomem *addr, void *buf, long count); -extern void _outsb(volatile u8 __iomem *addr,const void *buf,long count); -extern void _insw_ns(const volatile u16 __iomem *addr, void *buf, long count); -extern void _outsw_ns(volatile u16 __iomem *addr, const void *buf, long count); -extern void _insl_ns(const volatile u32 __iomem *addr, void *buf, long count); -extern void _outsl_ns(volatile u32 __iomem *addr, const void *buf, long count); - -/* The _ns naming is historical and will be removed. For now, just #define - * the non _ns equivalent names - */ -#define _insw _insw_ns -#define _insl _insl_ns -#define _outsw _outsw_ns -#define _outsl _outsl_ns - - -/* - * memset_io, memcpy_toio, memcpy_fromio base implementations are out of line - */ - -extern void _memset_io(volatile void __iomem *addr, int c, unsigned long n); -extern void _memcpy_fromio(void *dest, const volatile void __iomem *src, - unsigned long n); -extern void _memcpy_toio(volatile void __iomem *dest, const void *src, - unsigned long n); - -/* - * - * PCI and standard ISA accessors - * - * Those are globally defined linux accessors for devices on PCI or ISA - * busses. They follow the Linux defined semantics. The current implementation - * for PowerPC is as close as possible to the x86 version of these, and thus - * provides fairly heavy weight barriers for the non-raw versions - * - * In addition, they support a hook mechanism when CONFIG_PPC_INDIRECT_IO - * allowing the platform to provide its own implementation of some or all - * of the accessors. - */ - -/* - * Include the EEH definitions when EEH is enabled only so they don't get - * in the way when building for 32 bits - */ -#ifdef CONFIG_EEH -#include -#endif - -/* Shortcut to the MMIO argument pointer */ -#define PCI_IO_ADDR volatile void __iomem * - -/* Indirect IO address tokens: - * - * When CONFIG_PPC_INDIRECT_IO is set, the platform can provide hooks - * on all IOs. (Note that this is all 64 bits only for now) - * - * To help platforms who may need to differenciate MMIO addresses in - * their hooks, a bitfield is reserved for use by the platform near the - * top of MMIO addresses (not PIO, those have to cope the hard way). - * - * This bit field is 12 bits and is at the top of the IO virtual - * addresses PCI_IO_INDIRECT_TOKEN_MASK. - * - * The kernel virtual space is thus: - * - * 0xD000000000000000 : vmalloc - * 0xD000080000000000 : PCI PHB IO space - * 0xD000080080000000 : ioremap - * 0xD0000fffffffffff : end of ioremap region - * - * Since the top 4 bits are reserved as the region ID, we use thus - * the next 12 bits and keep 4 bits available for the future if the - * virtual address space is ever to be extended. - * - * The direct IO mapping operations will then mask off those bits - * before doing the actual access, though that only happen when - * CONFIG_PPC_INDIRECT_IO is set, thus be careful when you use that - * mechanism - */ - -#ifdef CONFIG_PPC_INDIRECT_IO -#define PCI_IO_IND_TOKEN_MASK 0x0fff000000000000ul -#define PCI_IO_IND_TOKEN_SHIFT 48 -#define PCI_FIX_ADDR(addr) \ - ((PCI_IO_ADDR)(((unsigned long)(addr)) & ~PCI_IO_IND_TOKEN_MASK)) -#define PCI_GET_ADDR_TOKEN(addr) \ - (((unsigned long)(addr) & PCI_IO_IND_TOKEN_MASK) >> \ - PCI_IO_IND_TOKEN_SHIFT) -#define PCI_SET_ADDR_TOKEN(addr, token) \ -do { \ - unsigned long __a = (unsigned long)(addr); \ - __a &= ~PCI_IO_IND_TOKEN_MASK; \ - __a |= ((unsigned long)(token)) << PCI_IO_IND_TOKEN_SHIFT; \ - (addr) = (void __iomem *)__a; \ -} while(0) -#else -#define PCI_FIX_ADDR(addr) (addr) -#endif - - -/* - * Non ordered and non-swapping "raw" accessors - */ - -static inline unsigned char __raw_readb(const volatile void __iomem *addr) -{ - return *(volatile unsigned char __force *)PCI_FIX_ADDR(addr); -} -static inline unsigned short __raw_readw(const volatile void __iomem *addr) -{ - return *(volatile unsigned short __force *)PCI_FIX_ADDR(addr); -} -static inline unsigned int __raw_readl(const volatile void __iomem *addr) -{ - return *(volatile unsigned int __force *)PCI_FIX_ADDR(addr); -} -static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) -{ - *(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v; -} -static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) -{ - *(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v; -} -static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) -{ - *(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v; -} - -#ifdef __powerpc64__ -static inline unsigned long __raw_readq(const volatile void __iomem *addr) -{ - return *(volatile unsigned long __force *)PCI_FIX_ADDR(addr); -} -static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) -{ - *(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v; -} -#endif /* __powerpc64__ */ - -/* - * - * PCI PIO and MMIO accessors. - * - * - * On 32 bits, PIO operations have a recovery mechanism in case they trigger - * machine checks (which they occasionally do when probing non existing - * IO ports on some platforms, like PowerMac and 8xx). - * I always found it to be of dubious reliability and I am tempted to get - * rid of it one of these days. So if you think it's important to keep it, - * please voice up asap. We never had it for 64 bits and I do not intend - * to port it over - */ - -#ifdef CONFIG_PPC32 - -#define __do_in_asm(name, op) \ -static inline unsigned int name(unsigned int port) \ -{ \ - unsigned int x; \ - __asm__ __volatile__( \ - "sync\n" \ - "0:" op " %0,0,%1\n" \ - "1: twi 0,%0,0\n" \ - "2: isync\n" \ - "3: nop\n" \ - "4:\n" \ - ".section .fixup,\"ax\"\n" \ - "5: li %0,-1\n" \ - " b 4b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 0b,5b\n" \ - " .long 1b,5b\n" \ - " .long 2b,5b\n" \ - " .long 3b,5b\n" \ - ".previous" \ - : "=&r" (x) \ - : "r" (port + _IO_BASE) \ - : "memory"); \ - return x; \ -} - -#define __do_out_asm(name, op) \ -static inline void name(unsigned int val, unsigned int port) \ -{ \ - __asm__ __volatile__( \ - "sync\n" \ - "0:" op " %0,0,%1\n" \ - "1: sync\n" \ - "2:\n" \ - ".section __ex_table,\"a\"\n" \ - " .align 2\n" \ - " .long 0b,2b\n" \ - " .long 1b,2b\n" \ - ".previous" \ - : : "r" (val), "r" (port + _IO_BASE) \ - : "memory"); \ -} - -__do_in_asm(_rec_inb, "lbzx") -__do_in_asm(_rec_inw, "lhbrx") -__do_in_asm(_rec_inl, "lwbrx") -__do_out_asm(_rec_outb, "stbx") -__do_out_asm(_rec_outw, "sthbrx") -__do_out_asm(_rec_outl, "stwbrx") - -#endif /* CONFIG_PPC32 */ - -/* The "__do_*" operations below provide the actual "base" implementation - * for each of the defined acccessor. Some of them use the out_* functions - * directly, some of them still use EEH, though we might change that in the - * future. Those macros below provide the necessary argument swapping and - * handling of the IO base for PIO. - * - * They are themselves used by the macros that define the actual accessors - * and can be used by the hooks if any. - * - * Note that PIO operations are always defined in terms of their corresonding - * MMIO operations. That allows platforms like iSeries who want to modify the - * behaviour of both to only hook on the MMIO version and get both. It's also - * possible to hook directly at the toplevel PIO operation if they have to - * be handled differently - */ -#define __do_writeb(val, addr) out_8(PCI_FIX_ADDR(addr), val) -#define __do_writew(val, addr) out_le16(PCI_FIX_ADDR(addr), val) -#define __do_writel(val, addr) out_le32(PCI_FIX_ADDR(addr), val) -#define __do_writeq(val, addr) out_le64(PCI_FIX_ADDR(addr), val) -#define __do_writew_be(val, addr) out_be16(PCI_FIX_ADDR(addr), val) -#define __do_writel_be(val, addr) out_be32(PCI_FIX_ADDR(addr), val) -#define __do_writeq_be(val, addr) out_be64(PCI_FIX_ADDR(addr), val) - -#ifdef CONFIG_EEH -#define __do_readb(addr) eeh_readb(PCI_FIX_ADDR(addr)) -#define __do_readw(addr) eeh_readw(PCI_FIX_ADDR(addr)) -#define __do_readl(addr) eeh_readl(PCI_FIX_ADDR(addr)) -#define __do_readq(addr) eeh_readq(PCI_FIX_ADDR(addr)) -#define __do_readw_be(addr) eeh_readw_be(PCI_FIX_ADDR(addr)) -#define __do_readl_be(addr) eeh_readl_be(PCI_FIX_ADDR(addr)) -#define __do_readq_be(addr) eeh_readq_be(PCI_FIX_ADDR(addr)) -#else /* CONFIG_EEH */ -#define __do_readb(addr) in_8(PCI_FIX_ADDR(addr)) -#define __do_readw(addr) in_le16(PCI_FIX_ADDR(addr)) -#define __do_readl(addr) in_le32(PCI_FIX_ADDR(addr)) -#define __do_readq(addr) in_le64(PCI_FIX_ADDR(addr)) -#define __do_readw_be(addr) in_be16(PCI_FIX_ADDR(addr)) -#define __do_readl_be(addr) in_be32(PCI_FIX_ADDR(addr)) -#define __do_readq_be(addr) in_be64(PCI_FIX_ADDR(addr)) -#endif /* !defined(CONFIG_EEH) */ - -#ifdef CONFIG_PPC32 -#define __do_outb(val, port) _rec_outb(val, port) -#define __do_outw(val, port) _rec_outw(val, port) -#define __do_outl(val, port) _rec_outl(val, port) -#define __do_inb(port) _rec_inb(port) -#define __do_inw(port) _rec_inw(port) -#define __do_inl(port) _rec_inl(port) -#else /* CONFIG_PPC32 */ -#define __do_outb(val, port) writeb(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_outw(val, port) writew(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_outl(val, port) writel(val,(PCI_IO_ADDR)_IO_BASE+port); -#define __do_inb(port) readb((PCI_IO_ADDR)_IO_BASE + port); -#define __do_inw(port) readw((PCI_IO_ADDR)_IO_BASE + port); -#define __do_inl(port) readl((PCI_IO_ADDR)_IO_BASE + port); -#endif /* !CONFIG_PPC32 */ - -#ifdef CONFIG_EEH -#define __do_readsb(a, b, n) eeh_readsb(PCI_FIX_ADDR(a), (b), (n)) -#define __do_readsw(a, b, n) eeh_readsw(PCI_FIX_ADDR(a), (b), (n)) -#define __do_readsl(a, b, n) eeh_readsl(PCI_FIX_ADDR(a), (b), (n)) -#else /* CONFIG_EEH */ -#define __do_readsb(a, b, n) _insb(PCI_FIX_ADDR(a), (b), (n)) -#define __do_readsw(a, b, n) _insw(PCI_FIX_ADDR(a), (b), (n)) -#define __do_readsl(a, b, n) _insl(PCI_FIX_ADDR(a), (b), (n)) -#endif /* !CONFIG_EEH */ -#define __do_writesb(a, b, n) _outsb(PCI_FIX_ADDR(a),(b),(n)) -#define __do_writesw(a, b, n) _outsw(PCI_FIX_ADDR(a),(b),(n)) -#define __do_writesl(a, b, n) _outsl(PCI_FIX_ADDR(a),(b),(n)) - -#define __do_insb(p, b, n) readsb((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_insw(p, b, n) readsw((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_insl(p, b, n) readsl((PCI_IO_ADDR)_IO_BASE+(p), (b), (n)) -#define __do_outsb(p, b, n) writesb((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) -#define __do_outsw(p, b, n) writesw((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) -#define __do_outsl(p, b, n) writesl((PCI_IO_ADDR)_IO_BASE+(p),(b),(n)) - -#define __do_memset_io(addr, c, n) \ - _memset_io(PCI_FIX_ADDR(addr), c, n) -#define __do_memcpy_toio(dst, src, n) \ - _memcpy_toio(PCI_FIX_ADDR(dst), src, n) - -#ifdef CONFIG_EEH -#define __do_memcpy_fromio(dst, src, n) \ - eeh_memcpy_fromio(dst, PCI_FIX_ADDR(src), n) -#else /* CONFIG_EEH */ -#define __do_memcpy_fromio(dst, src, n) \ - _memcpy_fromio(dst,PCI_FIX_ADDR(src),n) -#endif /* !CONFIG_EEH */ - -#ifdef CONFIG_PPC_INDIRECT_IO -#define DEF_PCI_HOOK(x) x -#else -#define DEF_PCI_HOOK(x) NULL -#endif - -/* Structure containing all the hooks */ -extern struct ppc_pci_io { - -#define DEF_PCI_AC_RET(name, ret, at, al, space, aa) ret (*name) at; -#define DEF_PCI_AC_NORET(name, at, al, space, aa) void (*name) at; - -#include - -#undef DEF_PCI_AC_RET -#undef DEF_PCI_AC_NORET - -} ppc_pci_io; - -/* The inline wrappers */ -#define DEF_PCI_AC_RET(name, ret, at, al, space, aa) \ -static inline ret name at \ -{ \ - if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ - return ppc_pci_io.name al; \ - return __do_##name al; \ -} - -#define DEF_PCI_AC_NORET(name, at, al, space, aa) \ -static inline void name at \ -{ \ - if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL) \ - ppc_pci_io.name al; \ - else \ - __do_##name al; \ -} - -#include - -#undef DEF_PCI_AC_RET -#undef DEF_PCI_AC_NORET - -/* Some drivers check for the presence of readq & writeq with - * a #ifdef, so we make them happy here. - */ -#ifdef __powerpc64__ -#define readq readq -#define writeq writeq -#endif - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -/* - * We don't do relaxed operations yet, at least not with this semantic - */ -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) -#define readq_relaxed(addr) readq(addr) - -#ifdef CONFIG_PPC32 -#define mmiowb() -#else -/* - * Enforce synchronisation of stores vs. spin_unlock - * (this does it explicitly, though our implementation of spin_unlock - * does it implicitely too) - */ -static inline void mmiowb(void) -{ - unsigned long tmp; - - __asm__ __volatile__("sync; li %0,0; stb %0,%1(13)" - : "=&r" (tmp) : "i" (offsetof(struct paca_struct, io_sync)) - : "memory"); -} -#endif /* !CONFIG_PPC32 */ - -static inline void iosync(void) -{ - __asm__ __volatile__ ("sync" : : : "memory"); -} - -/* Enforce in-order execution of data I/O. - * No distinction between read/write on PPC; use eieio for all three. - * Those are fairly week though. They don't provide a barrier between - * MMIO and cacheable storage nor do they provide a barrier vs. locks, - * they only provide barriers between 2 __raw MMIO operations and - * possibly break write combining. - */ -#define iobarrier_rw() eieio() -#define iobarrier_r() eieio() -#define iobarrier_w() eieio() - - -/* - * output pause versions need a delay at least for the - * w83c105 ide controller in a p610. - */ -#define inb_p(port) inb(port) -#define outb_p(val, port) (udelay(1), outb((val), (port))) -#define inw_p(port) inw(port) -#define outw_p(val, port) (udelay(1), outw((val), (port))) -#define inl_p(port) inl(port) -#define outl_p(val, port) (udelay(1), outl((val), (port))) - - -#define IO_SPACE_LIMIT ~(0UL) - - -/** - * ioremap - map bus memory into CPU space - * @address: bus address of the memory - * @size: size of the resource to map - * - * ioremap performs a platform specific sequence of operations to - * make bus memory CPU accessible via the readb/readw/readl/writeb/ - * writew/writel functions and the other mmio helpers. The returned - * address is not guaranteed to be usable directly as a virtual - * address. - * - * We provide a few variations of it: - * - * * ioremap is the standard one and provides non-cacheable guarded mappings - * and can be hooked by the platform via ppc_md - * - * * ioremap_flags allows to specify the page flags as an argument and can - * also be hooked by the platform via ppc_md. ioremap_prot is the exact - * same thing as ioremap_flags. - * - * * ioremap_nocache is identical to ioremap - * - * * iounmap undoes such a mapping and can be hooked - * - * * __ioremap_at (and the pending __iounmap_at) are low level functions to - * create hand-made mappings for use only by the PCI code and cannot - * currently be hooked. Must be page aligned. - * - * * __ioremap is the low level implementation used by ioremap and - * ioremap_flags and cannot be hooked (but can be used by a hook on one - * of the previous ones) - * - * * __iounmap, is the low level implementation used by iounmap and cannot - * be hooked (but can be used by a hook on iounmap) - * - */ -extern void __iomem *ioremap(phys_addr_t address, unsigned long size); -extern void __iomem *ioremap_flags(phys_addr_t address, unsigned long size, - unsigned long flags); -#define ioremap_nocache(addr, size) ioremap((addr), (size)) -#define ioremap_prot(addr, size, prot) ioremap_flags((addr), (size), (prot)) - -extern void iounmap(volatile void __iomem *addr); - -extern void __iomem *__ioremap(phys_addr_t, unsigned long size, - unsigned long flags); -extern void __iounmap(volatile void __iomem *addr); - -extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, - unsigned long size, unsigned long flags); -extern void __iounmap_at(void *ea, unsigned long size); - -/* - * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation - * which needs some additional definitions here. They basically allow PIO - * space overall to be 1GB. This will work as long as we never try to use - * iomap to map MMIO below 1GB which should be fine on ppc64 - */ -#define HAVE_ARCH_PIO_SIZE 1 -#define PIO_OFFSET 0x00000000UL -#define PIO_MASK (FULL_IO_SIZE - 1) -#define PIO_RESERVED (FULL_IO_SIZE) - -#define mmio_read16be(addr) readw_be(addr) -#define mmio_read32be(addr) readl_be(addr) -#define mmio_write16be(val, addr) writew_be(val, addr) -#define mmio_write32be(val, addr) writel_be(val, addr) -#define mmio_insb(addr, dst, count) readsb(addr, dst, count) -#define mmio_insw(addr, dst, count) readsw(addr, dst, count) -#define mmio_insl(addr, dst, count) readsl(addr, dst, count) -#define mmio_outsb(addr, src, count) writesb(addr, src, count) -#define mmio_outsw(addr, src, count) writesw(addr, src, count) -#define mmio_outsl(addr, src, count) writesl(addr, src, count) - -/** - * virt_to_phys - map virtual addresses to physical - * @address: address to remap - * - * The returned physical address is the physical (CPU) mapping for - * the memory address given. It is only valid to use this function on - * addresses directly mapped or allocated via kmalloc. - * - * This function does not give bus mappings for DMA transfers. In - * almost all conceivable cases a device driver should not be using - * this function - */ -static inline unsigned long virt_to_phys(volatile void * address) -{ - return __pa((unsigned long)address); -} - -/** - * phys_to_virt - map physical address to virtual - * @address: address to remap - * - * The returned virtual address is a current CPU mapping for - * the memory address given. It is only valid to use this function on - * addresses that have a kernel mapping - * - * This function does not handle bus mappings for DMA transfers. In - * almost all conceivable cases a device driver should not be using - * this function - */ -static inline void * phys_to_virt(unsigned long address) -{ - return (void *)__va(address); -} - -/* - * Change "struct page" to physical address. - */ -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -/* We do NOT want virtual merging, it would put too much pressure on - * our iommu allocator. Instead, we want drivers to be smart enough - * to coalesce sglists that happen to have been mapped in a contiguous - * way by the iommu - */ -#define BIO_VMERGE_BOUNDARY 0 - -/* - * 32 bits still uses virt_to_bus() for it's implementation of DMA - * mappings se we have to keep it defined here. We also have some old - * drivers (shame shame shame) that use bus_to_virt() and haven't been - * fixed yet so I need to define it here. - */ -#ifdef CONFIG_PPC32 - -static inline unsigned long virt_to_bus(volatile void * address) -{ - if (address == NULL) - return 0; - return __pa(address) + PCI_DRAM_OFFSET; -} - -static inline void * bus_to_virt(unsigned long address) -{ - if (address == 0) - return NULL; - return __va(address - PCI_DRAM_OFFSET); -} - -#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET) - -#endif /* CONFIG_PPC32 */ - -/* access ports */ -#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v)) -#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v)) - -#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v)) -#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v)) - -#define setbits8(_addr, _v) out_8((_addr), in_8(_addr) | (_v)) -#define clrbits8(_addr, _v) out_8((_addr), in_8(_addr) & ~(_v)) - -/* Clear and set bits in one shot. These macros can be used to clear and - * set multiple bits in a register using a single read-modify-write. These - * macros can also be used to set a multiple-bit bit pattern using a mask, - * by specifying the mask in the 'clear' parameter and the new bit pattern - * in the 'set' parameter. - */ - -#define clrsetbits(type, addr, clear, set) \ - out_##type((addr), (in_##type(addr) & ~(clear)) | (set)) - -#ifdef __powerpc64__ -#define clrsetbits_be64(addr, clear, set) clrsetbits(be64, addr, clear, set) -#define clrsetbits_le64(addr, clear, set) clrsetbits(le64, addr, clear, set) -#endif - -#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) -#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) - -#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) -#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) - -#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) - -void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset, - size_t size, unsigned long flags); - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_IO_H */ diff --git a/include/asm-powerpc/ioctl.h b/include/asm-powerpc/ioctl.h deleted file mode 100644 index 57d6830..0000000 --- a/include/asm-powerpc/ioctl.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _ASM_POWERPC_IOCTL_H -#define _ASM_POWERPC_IOCTL_H - -#define _IOC_SIZEBITS 13 -#define _IOC_DIRBITS 3 - -#define _IOC_NONE 1U -#define _IOC_READ 2U -#define _IOC_WRITE 4U - -#include - -#endif /* _ASM_POWERPC_IOCTL_H */ diff --git a/include/asm-powerpc/ioctls.h b/include/asm-powerpc/ioctls.h deleted file mode 100644 index 279a622..0000000 --- a/include/asm-powerpc/ioctls.h +++ /dev/null @@ -1,110 +0,0 @@ -#ifndef _ASM_POWERPC_IOCTLS_H -#define _ASM_POWERPC_IOCTLS_H - -#include - -#define FIOCLEX _IO('f', 1) -#define FIONCLEX _IO('f', 2) -#define FIOASYNC _IOW('f', 125, int) -#define FIONBIO _IOW('f', 126, int) -#define FIONREAD _IOR('f', 127, int) -#define TIOCINQ FIONREAD -#define FIOQSIZE _IOR('f', 128, loff_t) - -#define TIOCGETP _IOR('t', 8, struct sgttyb) -#define TIOCSETP _IOW('t', 9, struct sgttyb) -#define TIOCSETN _IOW('t', 10, struct sgttyb) /* TIOCSETP wo flush */ - -#define TIOCSETC _IOW('t', 17, struct tchars) -#define TIOCGETC _IOR('t', 18, struct tchars) -#define TCGETS _IOR('t', 19, struct termios) -#define TCSETS _IOW('t', 20, struct termios) -#define TCSETSW _IOW('t', 21, struct termios) -#define TCSETSF _IOW('t', 22, struct termios) - -#define TCGETA _IOR('t', 23, struct termio) -#define TCSETA _IOW('t', 24, struct termio) -#define TCSETAW _IOW('t', 25, struct termio) -#define TCSETAF _IOW('t', 28, struct termio) - -#define TCSBRK _IO('t', 29) -#define TCXONC _IO('t', 30) -#define TCFLSH _IO('t', 31) - -#define TIOCSWINSZ _IOW('t', 103, struct winsize) -#define TIOCGWINSZ _IOR('t', 104, struct winsize) -#define TIOCSTART _IO('t', 110) /* start output, like ^Q */ -#define TIOCSTOP _IO('t', 111) /* stop output, like ^S */ -#define TIOCOUTQ _IOR('t', 115, int) /* output queue size */ - -#define TIOCGLTC _IOR('t', 116, struct ltchars) -#define TIOCSLTC _IOW('t', 117, struct ltchars) -#define TIOCSPGRP _IOW('t', 118, int) -#define TIOCGPGRP _IOR('t', 119, int) - -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E - -#define TIOCSTI 0x5412 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -# define TIOCM_LE 0x001 -# define TIOCM_DTR 0x002 -# define TIOCM_RTS 0x004 -# define TIOCM_ST 0x008 -# define TIOCM_SR 0x010 -# define TIOCM_CTS 0x020 -# define TIOCM_CAR 0x040 -# define TIOCM_RNG 0x080 -# define TIOCM_DSR 0x100 -# define TIOCM_CD TIOCM_CAR -# define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 -# define TIOCPKT_DATA 0 -# define TIOCPKT_FLUSHREAD 1 -# define TIOCPKT_FLUSHWRITE 2 -# define TIOCPKT_STOP 4 -# define TIOCPKT_START 8 -# define TIOCPKT_NOSTOP 16 -# define TIOCPKT_DOSTOP 32 - - -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -#define TIOCSBRK 0x5427 /* BSD compatibility */ -#define TIOCCBRK 0x5428 /* BSD compatibility */ -#define TIOCGSID 0x5429 /* Return the session ID of FD */ -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ - /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ -# define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ - -#endif /* _ASM_POWERPC_IOCTLS_H */ diff --git a/include/asm-powerpc/iommu.h b/include/asm-powerpc/iommu.h deleted file mode 100644 index 51ecfef..0000000 --- a/include/asm-powerpc/iommu.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation - * Rewrite, cleanup: - * Copyright (C) 2004 Olof Johansson , IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_IOMMU_H -#define _ASM_IOMMU_H -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include -#include -#include - -#define IOMMU_PAGE_SHIFT 12 -#define IOMMU_PAGE_SIZE (ASM_CONST(1) << IOMMU_PAGE_SHIFT) -#define IOMMU_PAGE_MASK (~((1 << IOMMU_PAGE_SHIFT) - 1)) -#define IOMMU_PAGE_ALIGN(addr) _ALIGN_UP(addr, IOMMU_PAGE_SIZE) - -/* Boot time flags */ -extern int iommu_is_off; -extern int iommu_force_on; - -/* Pure 2^n version of get_order */ -static __inline__ __attribute_const__ int get_iommu_order(unsigned long size) -{ - return __ilog2((size - 1) >> IOMMU_PAGE_SHIFT) + 1; -} - - -/* - * IOMAP_MAX_ORDER defines the largest contiguous block - * of dma space we can get. IOMAP_MAX_ORDER = 13 - * allows up to 2**12 pages (4096 * 4096) = 16 MB - */ -#define IOMAP_MAX_ORDER 13 - -struct iommu_table { - unsigned long it_busno; /* Bus number this table belongs to */ - unsigned long it_size; /* Size of iommu table in entries */ - unsigned long it_offset; /* Offset into global table */ - unsigned long it_base; /* mapped address of tce table */ - unsigned long it_index; /* which iommu table this is */ - unsigned long it_type; /* type: PCI or Virtual Bus */ - unsigned long it_blocksize; /* Entries in each block (cacheline) */ - unsigned long it_hint; /* Hint for next alloc */ - unsigned long it_largehint; /* Hint for large allocs */ - unsigned long it_halfpoint; /* Breaking point for small/large allocs */ - spinlock_t it_lock; /* Protects it_map */ - unsigned long *it_map; /* A simple allocation bitmap for now */ -}; - -struct scatterlist; - -/* Frees table for an individual device node */ -extern void iommu_free_table(struct iommu_table *tbl, const char *node_name); - -/* Initializes an iommu_table based in values set in the passed-in - * structure - */ -extern struct iommu_table *iommu_init_table(struct iommu_table * tbl, - int nid); - -extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl, - struct scatterlist *sglist, int nelems, - unsigned long mask, enum dma_data_direction direction, - struct dma_attrs *attrs); -extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, - int nelems, enum dma_data_direction direction, - struct dma_attrs *attrs); - -extern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, - size_t size, dma_addr_t *dma_handle, - unsigned long mask, gfp_t flag, int node); -extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, - void *vaddr, dma_addr_t dma_handle); -extern dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, - void *vaddr, size_t size, unsigned long mask, - enum dma_data_direction direction, - struct dma_attrs *attrs); -extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction, - struct dma_attrs *attrs); - -extern void iommu_init_early_pSeries(void); -extern void iommu_init_early_iSeries(void); -extern void iommu_init_early_dart(void); -extern void iommu_init_early_pasemi(void); - -#ifdef CONFIG_PCI -extern void pci_iommu_init(void); -extern void pci_direct_iommu_init(void); -#else -static inline void pci_iommu_init(void) { } -#endif - -extern void alloc_dart_table(void); -#if defined(CONFIG_PPC64) && defined(CONFIG_PM) -static inline void iommu_save(void) -{ - if (ppc_md.iommu_save) - ppc_md.iommu_save(); -} - -static inline void iommu_restore(void) -{ - if (ppc_md.iommu_restore) - ppc_md.iommu_restore(); -} -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_IOMMU_H */ diff --git a/include/asm-powerpc/ipcbuf.h b/include/asm-powerpc/ipcbuf.h deleted file mode 100644 index 2c3e1d9..0000000 --- a/include/asm-powerpc/ipcbuf.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef _ASM_POWERPC_IPCBUF_H -#define _ASM_POWERPC_IPCBUF_H - -/* - * The ipc64_perm structure for the powerpc is identical to - * kern_ipc_perm as we have always had 32-bit UIDs and GIDs in the - * kernel. Note extra padding because this structure is passed back - * and forth between kernel and user space. Pad space is left for: - * - 1 32-bit value to fill up for 8-byte alignment - * - 2 miscellaneous 64-bit values - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned int seq; - unsigned int __pad1; - unsigned long long __unused1; - unsigned long long __unused2; -}; - -#endif /* _ASM_POWERPC_IPCBUF_H */ diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h deleted file mode 100644 index 8ff08be..0000000 --- a/include/asm-powerpc/ipic.h +++ /dev/null @@ -1,93 +0,0 @@ -/* - * include/asm-powerpc/ipic.h - * - * IPIC external definitions and structure. - * - * Maintainer: Kumar Gala - * - * Copyright 2005 Freescale Semiconductor, Inc - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifdef __KERNEL__ -#ifndef __ASM_IPIC_H__ -#define __ASM_IPIC_H__ - -#include - -/* Flags when we init the IPIC */ -#define IPIC_SPREADMODE_GRP_A 0x00000001 -#define IPIC_SPREADMODE_GRP_B 0x00000002 -#define IPIC_SPREADMODE_GRP_C 0x00000004 -#define IPIC_SPREADMODE_GRP_D 0x00000008 -#define IPIC_SPREADMODE_MIX_A 0x00000010 -#define IPIC_SPREADMODE_MIX_B 0x00000020 -#define IPIC_DISABLE_MCP_OUT 0x00000040 -#define IPIC_IRQ0_MCP 0x00000080 - -/* IPIC registers offsets */ -#define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */ -#define IPIC_SIVCR 0x04 /* System Global Interrupt Vector Register */ -#define IPIC_SIPNR_H 0x08 /* System Internal Interrupt Pending Register (HIGH) */ -#define IPIC_SIPNR_L 0x0C /* System Internal Interrupt Pending Register (LOW) */ -#define IPIC_SIPRR_A 0x10 /* System Internal Interrupt group A Priority Register */ -#define IPIC_SIPRR_B 0x14 /* System Internal Interrupt group B Priority Register */ -#define IPIC_SIPRR_C 0x18 /* System Internal Interrupt group C Priority Register */ -#define IPIC_SIPRR_D 0x1C /* System Internal Interrupt group D Priority Register */ -#define IPIC_SIMSR_H 0x20 /* System Internal Interrupt Mask Register (HIGH) */ -#define IPIC_SIMSR_L 0x24 /* System Internal Interrupt Mask Register (LOW) */ -#define IPIC_SICNR 0x28 /* System Internal Interrupt Control Register */ -#define IPIC_SEPNR 0x2C /* System External Interrupt Pending Register */ -#define IPIC_SMPRR_A 0x30 /* System Mixed Interrupt group A Priority Register */ -#define IPIC_SMPRR_B 0x34 /* System Mixed Interrupt group B Priority Register */ -#define IPIC_SEMSR 0x38 /* System External Interrupt Mask Register */ -#define IPIC_SECNR 0x3C /* System External Interrupt Control Register */ -#define IPIC_SERSR 0x40 /* System Error Status Register */ -#define IPIC_SERMR 0x44 /* System Error Mask Register */ -#define IPIC_SERCR 0x48 /* System Error Control Register */ -#define IPIC_SIFCR_H 0x50 /* System Internal Interrupt Force Register (HIGH) */ -#define IPIC_SIFCR_L 0x54 /* System Internal Interrupt Force Register (LOW) */ -#define IPIC_SEFCR 0x58 /* System External Interrupt Force Register */ -#define IPIC_SERFR 0x5C /* System Error Force Register */ -#define IPIC_SCVCR 0x60 /* System Critical Interrupt Vector Register */ -#define IPIC_SMVCR 0x64 /* System Management Interrupt Vector Register */ - -enum ipic_prio_grp { - IPIC_INT_GRP_A = IPIC_SIPRR_A, - IPIC_INT_GRP_D = IPIC_SIPRR_D, - IPIC_MIX_GRP_A = IPIC_SMPRR_A, - IPIC_MIX_GRP_B = IPIC_SMPRR_B, -}; - -enum ipic_mcp_irq { - IPIC_MCP_IRQ0 = 0, - IPIC_MCP_WDT = 1, - IPIC_MCP_SBA = 2, - IPIC_MCP_PCI1 = 5, - IPIC_MCP_PCI2 = 6, - IPIC_MCP_MU = 7, -}; - -extern int ipic_set_priority(unsigned int irq, unsigned int priority); -extern void ipic_set_highest_priority(unsigned int irq); -extern void ipic_set_default_priority(void); -extern void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq); -extern void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq); -extern u32 ipic_get_mcp_status(void); -extern void ipic_clear_mcp_status(u32 mask); - -#ifdef CONFIG_PPC_MERGE -extern struct ipic * ipic_init(struct device_node *node, unsigned int flags); -extern unsigned int ipic_get_irq(void); -#else -extern void ipic_init(phys_addr_t phys_addr, unsigned int flags, - unsigned int irq_offset, - unsigned char *senses, unsigned int senses_count); -extern int ipic_get_irq(void); -#endif - -#endif /* __ASM_IPIC_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h deleted file mode 100644 index 1ef8e30..0000000 --- a/include/asm-powerpc/irq.h +++ /dev/null @@ -1,654 +0,0 @@ -#ifdef __KERNEL__ -#ifndef _ASM_POWERPC_IRQ_H -#define _ASM_POWERPC_IRQ_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include - -#include -#include - - -#define get_irq_desc(irq) (&irq_desc[(irq)]) - -/* Define a way to iterate across irqs. */ -#define for_each_irq(i) \ - for ((i) = 0; (i) < NR_IRQS; ++(i)) - -extern atomic_t ppc_n_lost_interrupts; - -#ifdef CONFIG_PPC_MERGE - -/* This number is used when no interrupt has been assigned */ -#define NO_IRQ (0) - -/* This is a special irq number to return from get_irq() to tell that - * no interrupt happened _and_ ignore it (don't count it as bad). Some - * platforms like iSeries rely on that. - */ -#define NO_IRQ_IGNORE ((unsigned int)-1) - -/* Total number of virq in the platform (make it a CONFIG_* option ? */ -#define NR_IRQS 512 - -/* Number of irqs reserved for the legacy controller */ -#define NUM_ISA_INTERRUPTS 16 - -/* This type is the placeholder for a hardware interrupt number. It has to - * be big enough to enclose whatever representation is used by a given - * platform. - */ -typedef unsigned long irq_hw_number_t; - -/* Interrupt controller "host" data structure. This could be defined as a - * irq domain controller. That is, it handles the mapping between hardware - * and virtual interrupt numbers for a given interrupt domain. The host - * structure is generally created by the PIC code for a given PIC instance - * (though a host can cover more than one PIC if they have a flat number - * model). It's the host callbacks that are responsible for setting the - * irq_chip on a given irq_desc after it's been mapped. - * - * The host code and data structures are fairly agnostic to the fact that - * we use an open firmware device-tree. We do have references to struct - * device_node in two places: in irq_find_host() to find the host matching - * a given interrupt controller node, and of course as an argument to its - * counterpart host->ops->match() callback. However, those are treated as - * generic pointers by the core and the fact that it's actually a device-node - * pointer is purely a convention between callers and implementation. This - * code could thus be used on other architectures by replacing those two - * by some sort of arch-specific void * "token" used to identify interrupt - * controllers. - */ -struct irq_host; -struct radix_tree_root; - -/* Functions below are provided by the host and called whenever a new mapping - * is created or an old mapping is disposed. The host can then proceed to - * whatever internal data structures management is required. It also needs - * to setup the irq_desc when returning from map(). - */ -struct irq_host_ops { - /* Match an interrupt controller device node to a host, returns - * 1 on a match - */ - int (*match)(struct irq_host *h, struct device_node *node); - - /* Create or update a mapping between a virtual irq number and a hw - * irq number. This is called only once for a given mapping. - */ - int (*map)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw); - - /* Dispose of such a mapping */ - void (*unmap)(struct irq_host *h, unsigned int virq); - - /* Update of such a mapping */ - void (*remap)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw); - - /* Translate device-tree interrupt specifier from raw format coming - * from the firmware to a irq_hw_number_t (interrupt line number) and - * type (sense) that can be passed to set_irq_type(). In the absence - * of this callback, irq_create_of_mapping() and irq_of_parse_and_map() - * will return the hw number in the first cell and IRQ_TYPE_NONE for - * the type (which amount to keeping whatever default value the - * interrupt controller has for that line) - */ - int (*xlate)(struct irq_host *h, struct device_node *ctrler, - u32 *intspec, unsigned int intsize, - irq_hw_number_t *out_hwirq, unsigned int *out_type); -}; - -struct irq_host { - struct list_head link; - - /* type of reverse mapping technique */ - unsigned int revmap_type; -#define IRQ_HOST_MAP_LEGACY 0 /* legacy 8259, gets irqs 1..15 */ -#define IRQ_HOST_MAP_NOMAP 1 /* no fast reverse mapping */ -#define IRQ_HOST_MAP_LINEAR 2 /* linear map of interrupts */ -#define IRQ_HOST_MAP_TREE 3 /* radix tree */ - union { - struct { - unsigned int size; - unsigned int *revmap; - } linear; - struct radix_tree_root tree; - } revmap_data; - struct irq_host_ops *ops; - void *host_data; - irq_hw_number_t inval_irq; - - /* Optional device node pointer */ - struct device_node *of_node; -}; - -/* The main irq map itself is an array of NR_IRQ entries containing the - * associate host and irq number. An entry with a host of NULL is free. - * An entry can be allocated if it's free, the allocator always then sets - * hwirq first to the host's invalid irq number and then fills ops. - */ -struct irq_map_entry { - irq_hw_number_t hwirq; - struct irq_host *host; -}; - -extern struct irq_map_entry irq_map[NR_IRQS]; - -extern irq_hw_number_t virq_to_hw(unsigned int virq); - -/** - * irq_alloc_host - Allocate a new irq_host data structure - * @of_node: optional device-tree node of the interrupt controller - * @revmap_type: type of reverse mapping to use - * @revmap_arg: for IRQ_HOST_MAP_LINEAR linear only: size of the map - * @ops: map/unmap host callbacks - * @inval_irq: provide a hw number in that host space that is always invalid - * - * Allocates and initialize and irq_host structure. Note that in the case of - * IRQ_HOST_MAP_LEGACY, the map() callback will be called before this returns - * for all legacy interrupts except 0 (which is always the invalid irq for - * a legacy controller). For a IRQ_HOST_MAP_LINEAR, the map is allocated by - * this call as well. For a IRQ_HOST_MAP_TREE, the radix tree will be allocated - * later during boot automatically (the reverse mapping will use the slow path - * until that happens). - */ -extern struct irq_host *irq_alloc_host(struct device_node *of_node, - unsigned int revmap_type, - unsigned int revmap_arg, - struct irq_host_ops *ops, - irq_hw_number_t inval_irq); - - -/** - * irq_find_host - Locates a host for a given device node - * @node: device-tree node of the interrupt controller - */ -extern struct irq_host *irq_find_host(struct device_node *node); - - -/** - * irq_set_default_host - Set a "default" host - * @host: default host pointer - * - * For convenience, it's possible to set a "default" host that will be used - * whenever NULL is passed to irq_create_mapping(). It makes life easier for - * platforms that want to manipulate a few hard coded interrupt numbers that - * aren't properly represented in the device-tree. - */ -extern void irq_set_default_host(struct irq_host *host); - - -/** - * irq_set_virq_count - Set the maximum number of virt irqs - * @count: number of linux virtual irqs, capped with NR_IRQS - * - * This is mainly for use by platforms like iSeries who want to program - * the virtual irq number in the controller to avoid the reverse mapping - */ -extern void irq_set_virq_count(unsigned int count); - - -/** - * irq_create_mapping - Map a hardware interrupt into linux virq space - * @host: host owning this hardware interrupt or NULL for default host - * @hwirq: hardware irq number in that host space - * - * Only one mapping per hardware interrupt is permitted. Returns a linux - * virq number. - * If the sense/trigger is to be specified, set_irq_type() should be called - * on the number returned from that call. - */ -extern unsigned int irq_create_mapping(struct irq_host *host, - irq_hw_number_t hwirq); - - -/** - * irq_dispose_mapping - Unmap an interrupt - * @virq: linux virq number of the interrupt to unmap - */ -extern void irq_dispose_mapping(unsigned int virq); - -/** - * irq_find_mapping - Find a linux virq from an hw irq number. - * @host: host owning this hardware interrupt - * @hwirq: hardware irq number in that host space - * - * This is a slow path, for use by generic code. It's expected that an - * irq controller implementation directly calls the appropriate low level - * mapping function. - */ -extern unsigned int irq_find_mapping(struct irq_host *host, - irq_hw_number_t hwirq); - -/** - * irq_create_direct_mapping - Allocate a virq for direct mapping - * @host: host to allocate the virq for or NULL for default host - * - * This routine is used for irq controllers which can choose the hardware - * interrupt numbers they generate. In such a case it's simplest to use - * the linux virq as the hardware interrupt number. - */ -extern unsigned int irq_create_direct_mapping(struct irq_host *host); - -/** - * irq_radix_revmap - Find a linux virq from a hw irq number. - * @host: host owning this hardware interrupt - * @hwirq: hardware irq number in that host space - * - * This is a fast path, for use by irq controller code that uses radix tree - * revmaps - */ -extern unsigned int irq_radix_revmap(struct irq_host *host, - irq_hw_number_t hwirq); - -/** - * irq_linear_revmap - Find a linux virq from a hw irq number. - * @host: host owning this hardware interrupt - * @hwirq: hardware irq number in that host space - * - * This is a fast path, for use by irq controller code that uses linear - * revmaps. It does fallback to the slow path if the revmap doesn't exist - * yet and will create the revmap entry with appropriate locking - */ - -extern unsigned int irq_linear_revmap(struct irq_host *host, - irq_hw_number_t hwirq); - - - -/** - * irq_alloc_virt - Allocate virtual irq numbers - * @host: host owning these new virtual irqs - * @count: number of consecutive numbers to allocate - * @hint: pass a hint number, the allocator will try to use a 1:1 mapping - * - * This is a low level function that is used internally by irq_create_mapping() - * and that can be used by some irq controllers implementations for things - * like allocating ranges of numbers for MSIs. The revmaps are left untouched. - */ -extern unsigned int irq_alloc_virt(struct irq_host *host, - unsigned int count, - unsigned int hint); - -/** - * irq_free_virt - Free virtual irq numbers - * @virq: virtual irq number of the first interrupt to free - * @count: number of interrupts to free - * - * This function is the opposite of irq_alloc_virt. It will not clear reverse - * maps, this should be done previously by unmap'ing the interrupt. In fact, - * all interrupts covered by the range being freed should have been unmapped - * prior to calling this. - */ -extern void irq_free_virt(unsigned int virq, unsigned int count); - - -/* -- OF helpers -- */ - -/* irq_create_of_mapping - Map a hardware interrupt into linux virq space - * @controller: Device node of the interrupt controller - * @inspec: Interrupt specifier from the device-tree - * @intsize: Size of the interrupt specifier from the device-tree - * - * This function is identical to irq_create_mapping except that it takes - * as input informations straight from the device-tree (typically the results - * of the of_irq_map_*() functions. - */ -extern unsigned int irq_create_of_mapping(struct device_node *controller, - u32 *intspec, unsigned int intsize); - - -/* irq_of_parse_and_map - Parse nad Map an interrupt into linux virq space - * @device: Device node of the device whose interrupt is to be mapped - * @index: Index of the interrupt to map - * - * This function is a wrapper that chains of_irq_map_one() and - * irq_create_of_mapping() to make things easier to callers - */ -extern unsigned int irq_of_parse_and_map(struct device_node *dev, int index); - -/* -- End OF helpers -- */ - -/** - * irq_early_init - Init irq remapping subsystem - */ -extern void irq_early_init(void); - -static __inline__ int irq_canonicalize(int irq) -{ - return irq; -} - - -#else /* CONFIG_PPC_MERGE */ - -/* This number is used when no interrupt has been assigned */ -#define NO_IRQ (-1) -#define NO_IRQ_IGNORE (-2) - - -/* - * These constants are used for passing information about interrupt - * signal polarity and level/edge sensing to the low-level PIC chip - * drivers. - */ -#define IRQ_SENSE_MASK 0x1 -#define IRQ_SENSE_LEVEL 0x1 /* interrupt on active level */ -#define IRQ_SENSE_EDGE 0x0 /* interrupt triggered by edge */ - -#define IRQ_POLARITY_MASK 0x2 -#define IRQ_POLARITY_POSITIVE 0x2 /* high level or low->high edge */ -#define IRQ_POLARITY_NEGATIVE 0x0 /* low level or high->low edge */ - - -#if defined(CONFIG_40x) -#include - -#ifndef NR_BOARD_IRQS -#define NR_BOARD_IRQS 0 -#endif - -#ifndef UIC_WIDTH /* Number of interrupts per device */ -#define UIC_WIDTH 32 -#endif - -#ifndef NR_UICS /* number of UIC devices */ -#define NR_UICS 1 -#endif - -#if defined (CONFIG_403) -/* - * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has - * 32 possible interrupts, a majority of which are not implemented on - * all cores. There are six configurable, external interrupt pins and - * there are eight internal interrupts for the on-chip serial port - * (SPU), DMA controller, and JTAG controller. - * - */ - -#define NR_AIC_IRQS 32 -#define NR_IRQS (NR_AIC_IRQS + NR_BOARD_IRQS) - -#elif !defined (CONFIG_403) - -/* - * The PowerPC 405 cores' Universal Interrupt Controller (UIC) has 32 - * possible interrupts as well. There are seven, configurable external - * interrupt pins and there are 17 internal interrupts for the on-chip - * serial port, DMA controller, on-chip Ethernet controller, PCI, etc. - * - */ - - -#define NR_UIC_IRQS UIC_WIDTH -#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) -#endif - -#elif defined(CONFIG_44x) -#include - -#define NR_UIC_IRQS 32 -#define NR_IRQS ((NR_UIC_IRQS * NR_UICS) + NR_BOARD_IRQS) - -#elif defined(CONFIG_8xx) - -/* Now include the board configuration specific associations. -*/ -#include - -/* The MPC8xx cores have 16 possible interrupts. There are eight - * possible level sensitive interrupts assigned and generated internally - * from such devices as CPM, PCMCIA, RTC, PIT, TimeBase and Decrementer. - * There are eight external interrupts (IRQs) that can be configured - * as either level or edge sensitive. - * - * On some implementations, there is also the possibility of an 8259 - * through the PCI and PCI-ISA bridges. - * - * We are "flattening" the interrupt vectors of the cascaded CPM - * and 8259 interrupt controllers so that we can uniquely identify - * any interrupt source with a single integer. - */ -#define NR_SIU_INTS 16 -#define NR_CPM_INTS 32 -#ifndef NR_8259_INTS -#define NR_8259_INTS 0 -#endif - -#define SIU_IRQ_OFFSET 0 -#define CPM_IRQ_OFFSET (SIU_IRQ_OFFSET + NR_SIU_INTS) -#define I8259_IRQ_OFFSET (CPM_IRQ_OFFSET + NR_CPM_INTS) - -#define NR_IRQS (NR_SIU_INTS + NR_CPM_INTS + NR_8259_INTS) - -/* These values must be zero-based and map 1:1 with the SIU configuration. - * They are used throughout the 8xx I/O subsystem to generate - * interrupt masks, flags, and other control patterns. This is why the - * current kernel assumption of the 8259 as the base controller is such - * a pain in the butt. - */ -#define SIU_IRQ0 (0) /* Highest priority */ -#define SIU_LEVEL0 (1) -#define SIU_IRQ1 (2) -#define SIU_LEVEL1 (3) -#define SIU_IRQ2 (4) -#define SIU_LEVEL2 (5) -#define SIU_IRQ3 (6) -#define SIU_LEVEL3 (7) -#define SIU_IRQ4 (8) -#define SIU_LEVEL4 (9) -#define SIU_IRQ5 (10) -#define SIU_LEVEL5 (11) -#define SIU_IRQ6 (12) -#define SIU_LEVEL6 (13) -#define SIU_IRQ7 (14) -#define SIU_LEVEL7 (15) - -#define MPC8xx_INT_FEC1 SIU_LEVEL1 -#define MPC8xx_INT_FEC2 SIU_LEVEL3 - -#define MPC8xx_INT_SCC1 (CPM_IRQ_OFFSET + CPMVEC_SCC1) -#define MPC8xx_INT_SCC2 (CPM_IRQ_OFFSET + CPMVEC_SCC2) -#define MPC8xx_INT_SCC3 (CPM_IRQ_OFFSET + CPMVEC_SCC3) -#define MPC8xx_INT_SCC4 (CPM_IRQ_OFFSET + CPMVEC_SCC4) -#define MPC8xx_INT_SMC1 (CPM_IRQ_OFFSET + CPMVEC_SMC1) -#define MPC8xx_INT_SMC2 (CPM_IRQ_OFFSET + CPMVEC_SMC2) - -/* The internal interrupts we can configure as we see fit. - * My personal preference is CPM at level 2, which puts it above the - * MBX PCI/ISA/IDE interrupts. - */ -#ifndef PIT_INTERRUPT -#define PIT_INTERRUPT SIU_LEVEL0 -#endif -#ifndef CPM_INTERRUPT -#define CPM_INTERRUPT SIU_LEVEL2 -#endif -#ifndef PCMCIA_INTERRUPT -#define PCMCIA_INTERRUPT SIU_LEVEL6 -#endif -#ifndef DEC_INTERRUPT -#define DEC_INTERRUPT SIU_LEVEL7 -#endif - -/* Some internal interrupt registers use an 8-bit mask for the interrupt - * level instead of a number. - */ -#define mk_int_int_mask(IL) (1 << (7 - (IL/2))) - -#else /* CONFIG_40x + CONFIG_8xx */ -/* - * this is the # irq's for all ppc arch's (pmac/chrp/prep) - * so it is the max of them all - */ -#define NR_IRQS 256 -#define __DO_IRQ_CANON 1 - -#ifndef CONFIG_8260 - -#define NUM_8259_INTERRUPTS 16 - -#else /* CONFIG_8260 */ - -/* The 8260 has an internal interrupt controller with a maximum of - * 64 IRQs. We will use NR_IRQs from above since it is large enough. - * Don't be confused by the 8260 documentation where they list an - * "interrupt number" and "interrupt vector". We are only interested - * in the interrupt vector. There are "reserved" holes where the - * vector number increases, but the interrupt number in the table does not. - * (Document errata updates have fixed this...make sure you have up to - * date processor documentation -- Dan). - */ - -#ifndef CPM_IRQ_OFFSET -#define CPM_IRQ_OFFSET 0 -#endif - -#define NR_CPM_INTS 64 - -#define SIU_INT_ERROR ((uint)0x00 + CPM_IRQ_OFFSET) -#define SIU_INT_I2C ((uint)0x01 + CPM_IRQ_OFFSET) -#define SIU_INT_SPI ((uint)0x02 + CPM_IRQ_OFFSET) -#define SIU_INT_RISC ((uint)0x03 + CPM_IRQ_OFFSET) -#define SIU_INT_SMC1 ((uint)0x04 + CPM_IRQ_OFFSET) -#define SIU_INT_SMC2 ((uint)0x05 + CPM_IRQ_OFFSET) -#define SIU_INT_IDMA1 ((uint)0x06 + CPM_IRQ_OFFSET) -#define SIU_INT_IDMA2 ((uint)0x07 + CPM_IRQ_OFFSET) -#define SIU_INT_IDMA3 ((uint)0x08 + CPM_IRQ_OFFSET) -#define SIU_INT_IDMA4 ((uint)0x09 + CPM_IRQ_OFFSET) -#define SIU_INT_SDMA ((uint)0x0a + CPM_IRQ_OFFSET) -#define SIU_INT_USB ((uint)0x0b + CPM_IRQ_OFFSET) -#define SIU_INT_TIMER1 ((uint)0x0c + CPM_IRQ_OFFSET) -#define SIU_INT_TIMER2 ((uint)0x0d + CPM_IRQ_OFFSET) -#define SIU_INT_TIMER3 ((uint)0x0e + CPM_IRQ_OFFSET) -#define SIU_INT_TIMER4 ((uint)0x0f + CPM_IRQ_OFFSET) -#define SIU_INT_TMCNT ((uint)0x10 + CPM_IRQ_OFFSET) -#define SIU_INT_PIT ((uint)0x11 + CPM_IRQ_OFFSET) -#define SIU_INT_PCI ((uint)0x12 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ1 ((uint)0x13 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ2 ((uint)0x14 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ3 ((uint)0x15 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ4 ((uint)0x16 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ5 ((uint)0x17 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ6 ((uint)0x18 + CPM_IRQ_OFFSET) -#define SIU_INT_IRQ7 ((uint)0x19 + CPM_IRQ_OFFSET) -#define SIU_INT_FCC1 ((uint)0x20 + CPM_IRQ_OFFSET) -#define SIU_INT_FCC2 ((uint)0x21 + CPM_IRQ_OFFSET) -#define SIU_INT_FCC3 ((uint)0x22 + CPM_IRQ_OFFSET) -#define SIU_INT_MCC1 ((uint)0x24 + CPM_IRQ_OFFSET) -#define SIU_INT_MCC2 ((uint)0x25 + CPM_IRQ_OFFSET) -#define SIU_INT_SCC1 ((uint)0x28 + CPM_IRQ_OFFSET) -#define SIU_INT_SCC2 ((uint)0x29 + CPM_IRQ_OFFSET) -#define SIU_INT_SCC3 ((uint)0x2a + CPM_IRQ_OFFSET) -#define SIU_INT_SCC4 ((uint)0x2b + CPM_IRQ_OFFSET) -#define SIU_INT_PC15 ((uint)0x30 + CPM_IRQ_OFFSET) -#define SIU_INT_PC14 ((uint)0x31 + CPM_IRQ_OFFSET) -#define SIU_INT_PC13 ((uint)0x32 + CPM_IRQ_OFFSET) -#define SIU_INT_PC12 ((uint)0x33 + CPM_IRQ_OFFSET) -#define SIU_INT_PC11 ((uint)0x34 + CPM_IRQ_OFFSET) -#define SIU_INT_PC10 ((uint)0x35 + CPM_IRQ_OFFSET) -#define SIU_INT_PC9 ((uint)0x36 + CPM_IRQ_OFFSET) -#define SIU_INT_PC8 ((uint)0x37 + CPM_IRQ_OFFSET) -#define SIU_INT_PC7 ((uint)0x38 + CPM_IRQ_OFFSET) -#define SIU_INT_PC6 ((uint)0x39 + CPM_IRQ_OFFSET) -#define SIU_INT_PC5 ((uint)0x3a + CPM_IRQ_OFFSET) -#define SIU_INT_PC4 ((uint)0x3b + CPM_IRQ_OFFSET) -#define SIU_INT_PC3 ((uint)0x3c + CPM_IRQ_OFFSET) -#define SIU_INT_PC2 ((uint)0x3d + CPM_IRQ_OFFSET) -#define SIU_INT_PC1 ((uint)0x3e + CPM_IRQ_OFFSET) -#define SIU_INT_PC0 ((uint)0x3f + CPM_IRQ_OFFSET) - -#endif /* CONFIG_8260 */ - -#endif /* Whatever way too big #ifdef */ - -#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) -/* pedantic: these are long because they are used with set_bit --RR */ -extern unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; - -/* - * Because many systems have two overlapping names spaces for - * interrupts (ISA and XICS for example), and the ISA interrupts - * have historically not been easy to renumber, we allow ISA - * interrupts to take values 0 - 15, and shift up the remaining - * interrupts by 0x10. - */ -#define NUM_ISA_INTERRUPTS 0x10 -extern int __irq_offset_value; - -static inline int irq_offset_up(int irq) -{ - return(irq + __irq_offset_value); -} - -static inline int irq_offset_down(int irq) -{ - return(irq - __irq_offset_value); -} - -static inline int irq_offset_value(void) -{ - return __irq_offset_value; -} - -#ifdef __DO_IRQ_CANON -extern int ppc_do_canonicalize_irqs; -#else -#define ppc_do_canonicalize_irqs 0 -#endif - -static __inline__ int irq_canonicalize(int irq) -{ - if (ppc_do_canonicalize_irqs && irq == 2) - irq = 9; - return irq; -} -#endif /* CONFIG_PPC_MERGE */ - -extern int distribute_irqs; - -struct irqaction; -struct pt_regs; - -#define __ARCH_HAS_DO_SOFTIRQ - -#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) -/* - * Per-cpu stacks for handling critical, debug and machine check - * level interrupts. - */ -extern struct thread_info *critirq_ctx[NR_CPUS]; -extern struct thread_info *dbgirq_ctx[NR_CPUS]; -extern struct thread_info *mcheckirq_ctx[NR_CPUS]; -extern void exc_lvl_ctx_init(void); -#else -#define exc_lvl_ctx_init() -#endif - -#ifdef CONFIG_IRQSTACKS -/* - * Per-cpu stacks for handling hard and soft interrupts. - */ -extern struct thread_info *hardirq_ctx[NR_CPUS]; -extern struct thread_info *softirq_ctx[NR_CPUS]; - -extern void irq_ctx_init(void); -extern void call_do_softirq(struct thread_info *tp); -extern int call_handle_irq(int irq, void *p1, - struct thread_info *tp, void *func); -#else -#define irq_ctx_init() - -#endif /* CONFIG_IRQSTACKS */ - -extern void do_IRQ(struct pt_regs *regs); - -#endif /* _ASM_IRQ_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/irq_regs.h b/include/asm-powerpc/irq_regs.h deleted file mode 100644 index ba94b51..0000000 --- a/include/asm-powerpc/irq_regs.h +++ /dev/null @@ -1,2 +0,0 @@ -#include - diff --git a/include/asm-powerpc/irqflags.h b/include/asm-powerpc/irqflags.h deleted file mode 100644 index cc6fdba..0000000 --- a/include/asm-powerpc/irqflags.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-powerpc/irqflags.h - * - * IRQ flags handling - */ -#ifndef _ASM_IRQFLAGS_H -#define _ASM_IRQFLAGS_H - -#ifndef __ASSEMBLY__ -/* - * Get definitions for raw_local_save_flags(x), etc. - */ -#include - -#else -#ifdef CONFIG_TRACE_IRQFLAGS -/* - * Most of the CPU's IRQ-state tracing is done from assembly code; we - * have to call a C function so call a wrapper that saves all the - * C-clobbered registers. - */ -#define TRACE_ENABLE_INTS bl .trace_hardirqs_on -#define TRACE_DISABLE_INTS bl .trace_hardirqs_off -#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \ - cmpdi en, 0; \ - bne 95f; \ - stb en,PACASOFTIRQEN(r13); \ - bl .trace_hardirqs_off; \ - b skip; \ -95: bl .trace_hardirqs_on; \ - li en,1; -#define TRACE_AND_RESTORE_IRQ(en) \ - TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f); \ -96: stb en,PACASOFTIRQEN(r13) -#else -#define TRACE_ENABLE_INTS -#define TRACE_DISABLE_INTS -#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) -#define TRACE_AND_RESTORE_IRQ(en) \ - stb en,PACASOFTIRQEN(r13) -#endif -#endif - -#endif diff --git a/include/asm-powerpc/iseries/alpaca.h b/include/asm-powerpc/iseries/alpaca.h deleted file mode 100644 index c0cce67..0000000 --- a/include/asm-powerpc/iseries/alpaca.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright © 2008 Stephen Rothwell IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_ALPACA_H -#define _ASM_POWERPC_ISERIES_ALPACA_H - -/* - * This is the part of the paca that the iSeries hypervisor - * needs to be statically initialised. Immediately after boot - * we switch to the normal Linux paca. - */ -struct alpaca { - struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ - const void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */ -}; - -#endif /* _ASM_POWERPC_ISERIES_ALPACA_H */ diff --git a/include/asm-powerpc/iseries/hv_call.h b/include/asm-powerpc/iseries/hv_call.h deleted file mode 100644 index 162d653..0000000 --- a/include/asm-powerpc/iseries/hv_call.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * This file contains the "hypervisor call" interface which is used to - * drive the hypervisor from the OS. - */ -#ifndef _ASM_POWERPC_ISERIES_HV_CALL_H -#define _ASM_POWERPC_ISERIES_HV_CALL_H - -#include -#include -#include - -/* Type of yield for HvCallBaseYieldProcessor */ -#define HvCall_YieldTimed 0 /* Yield until specified time (tb) */ -#define HvCall_YieldToActive 1 /* Yield until all active procs have run */ -#define HvCall_YieldToProc 2 /* Yield until the specified processor has run */ - -/* interrupt masks for setEnabledInterrupts */ -#define HvCall_MaskIPI 0x00000001 -#define HvCall_MaskLpEvent 0x00000002 -#define HvCall_MaskLpProd 0x00000004 -#define HvCall_MaskTimeout 0x00000008 - -/* Log buffer formats */ -#define HvCall_LogBuffer_ASCII 0 -#define HvCall_LogBuffer_EBCDIC 1 - -#define HvCallBaseAckDeferredInts HvCallBase + 0 -#define HvCallBaseCpmPowerOff HvCallBase + 1 -#define HvCallBaseGetHwPatch HvCallBase + 2 -#define HvCallBaseReIplSpAttn HvCallBase + 3 -#define HvCallBaseSetASR HvCallBase + 4 -#define HvCallBaseSetASRAndRfi HvCallBase + 5 -#define HvCallBaseSetIMR HvCallBase + 6 -#define HvCallBaseSendIPI HvCallBase + 7 -#define HvCallBaseTerminateMachine HvCallBase + 8 -#define HvCallBaseTerminateMachineSrc HvCallBase + 9 -#define HvCallBaseProcessPlicInterrupts HvCallBase + 10 -#define HvCallBaseIsPrimaryCpmOrMsdIpl HvCallBase + 11 -#define HvCallBaseSetVirtualSIT HvCallBase + 12 -#define HvCallBaseVaryOffThisProcessor HvCallBase + 13 -#define HvCallBaseVaryOffMemoryChunk HvCallBase + 14 -#define HvCallBaseVaryOffInteractivePercentage HvCallBase + 15 -#define HvCallBaseSendLpProd HvCallBase + 16 -#define HvCallBaseSetEnabledInterrupts HvCallBase + 17 -#define HvCallBaseYieldProcessor HvCallBase + 18 -#define HvCallBaseVaryOffSharedProcUnits HvCallBase + 19 -#define HvCallBaseSetVirtualDecr HvCallBase + 20 -#define HvCallBaseClearLogBuffer HvCallBase + 21 -#define HvCallBaseGetLogBufferCodePage HvCallBase + 22 -#define HvCallBaseGetLogBufferFormat HvCallBase + 23 -#define HvCallBaseGetLogBufferLength HvCallBase + 24 -#define HvCallBaseReadLogBuffer HvCallBase + 25 -#define HvCallBaseSetLogBufferFormatAndCodePage HvCallBase + 26 -#define HvCallBaseWriteLogBuffer HvCallBase + 27 -#define HvCallBaseRouter28 HvCallBase + 28 -#define HvCallBaseRouter29 HvCallBase + 29 -#define HvCallBaseRouter30 HvCallBase + 30 -#define HvCallBaseSetDebugBus HvCallBase + 31 - -#define HvCallCcSetDABR HvCallCc + 7 - -static inline void HvCall_setVirtualDecr(void) -{ - /* - * Ignore any error return codes - most likely means that the - * target value for the LP has been increased and this vary off - * would bring us below the new target. - */ - HvCall0(HvCallBaseSetVirtualDecr); -} - -static inline void HvCall_yieldProcessor(unsigned typeOfYield, u64 yieldParm) -{ - HvCall2(HvCallBaseYieldProcessor, typeOfYield, yieldParm); -} - -static inline void HvCall_setEnabledInterrupts(u64 enabledInterrupts) -{ - HvCall1(HvCallBaseSetEnabledInterrupts, enabledInterrupts); -} - -static inline void HvCall_setLogBufferFormatAndCodepage(int format, - u32 codePage) -{ - HvCall2(HvCallBaseSetLogBufferFormatAndCodePage, format, codePage); -} - -extern void HvCall_writeLogBuffer(const void *buffer, u64 bufLen); - -static inline void HvCall_sendIPI(struct paca_struct *targetPaca) -{ - HvCall1(HvCallBaseSendIPI, targetPaca->paca_index); -} - -#endif /* _ASM_POWERPC_ISERIES_HV_CALL_H */ diff --git a/include/asm-powerpc/iseries/hv_call_event.h b/include/asm-powerpc/iseries/hv_call_event.h deleted file mode 100644 index cc029d3..0000000 --- a/include/asm-powerpc/iseries/hv_call_event.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * This file contains the "hypervisor call" interface which is used to - * drive the hypervisor from the OS. - */ -#ifndef _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H -#define _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H - -#include -#include - -#include -#include -#include - -struct HvLpEvent; - -typedef u8 HvLpEvent_Type; -typedef u8 HvLpEvent_AckInd; -typedef u8 HvLpEvent_AckType; - -typedef u8 HvLpDma_Direction; -typedef u8 HvLpDma_AddressType; - -typedef u64 HvLpEvent_Rc; -typedef u64 HvLpDma_Rc; - -#define HvCallEventAckLpEvent HvCallEvent + 0 -#define HvCallEventCancelLpEvent HvCallEvent + 1 -#define HvCallEventCloseLpEventPath HvCallEvent + 2 -#define HvCallEventDmaBufList HvCallEvent + 3 -#define HvCallEventDmaSingle HvCallEvent + 4 -#define HvCallEventDmaToSp HvCallEvent + 5 -#define HvCallEventGetOverflowLpEvents HvCallEvent + 6 -#define HvCallEventGetSourceLpInstanceId HvCallEvent + 7 -#define HvCallEventGetTargetLpInstanceId HvCallEvent + 8 -#define HvCallEventOpenLpEventPath HvCallEvent + 9 -#define HvCallEventSetLpEventStack HvCallEvent + 10 -#define HvCallEventSignalLpEvent HvCallEvent + 11 -#define HvCallEventSignalLpEventParms HvCallEvent + 12 -#define HvCallEventSetInterLpQueueIndex HvCallEvent + 13 -#define HvCallEventSetLpEventQueueInterruptProc HvCallEvent + 14 -#define HvCallEventRouter15 HvCallEvent + 15 - -static inline void HvCallEvent_getOverflowLpEvents(u8 queueIndex) -{ - HvCall1(HvCallEventGetOverflowLpEvents, queueIndex); -} - -static inline void HvCallEvent_setInterLpQueueIndex(u8 queueIndex) -{ - HvCall1(HvCallEventSetInterLpQueueIndex, queueIndex); -} - -static inline void HvCallEvent_setLpEventStack(u8 queueIndex, - char *eventStackAddr, u32 eventStackSize) -{ - HvCall3(HvCallEventSetLpEventStack, queueIndex, - virt_to_abs(eventStackAddr), eventStackSize); -} - -static inline void HvCallEvent_setLpEventQueueInterruptProc(u8 queueIndex, - u16 lpLogicalProcIndex) -{ - HvCall2(HvCallEventSetLpEventQueueInterruptProc, queueIndex, - lpLogicalProcIndex); -} - -static inline HvLpEvent_Rc HvCallEvent_signalLpEvent(struct HvLpEvent *event) -{ - return HvCall1(HvCallEventSignalLpEvent, virt_to_abs(event)); -} - -static inline HvLpEvent_Rc HvCallEvent_signalLpEventFast(HvLpIndex targetLp, - HvLpEvent_Type type, u16 subtype, HvLpEvent_AckInd ackInd, - HvLpEvent_AckType ackType, HvLpInstanceId sourceInstanceId, - HvLpInstanceId targetInstanceId, u64 correlationToken, - u64 eventData1, u64 eventData2, u64 eventData3, - u64 eventData4, u64 eventData5) -{ - /* Pack the misc bits into a single Dword to pass to PLIC */ - union { - struct { - u8 ack_and_target; - u8 type; - u16 subtype; - HvLpInstanceId src_inst; - HvLpInstanceId target_inst; - } parms; - u64 dword; - } packed; - - packed.parms.ack_and_target = (ackType << 7) | (ackInd << 6) | targetLp; - packed.parms.type = type; - packed.parms.subtype = subtype; - packed.parms.src_inst = sourceInstanceId; - packed.parms.target_inst = targetInstanceId; - - return HvCall7(HvCallEventSignalLpEventParms, packed.dword, - correlationToken, eventData1, eventData2, - eventData3, eventData4, eventData5); -} - -extern void *iseries_hv_alloc(size_t size, dma_addr_t *dma_handle, gfp_t flag); -extern void iseries_hv_free(size_t size, void *vaddr, dma_addr_t dma_handle); -extern dma_addr_t iseries_hv_map(void *vaddr, size_t size, - enum dma_data_direction direction); -extern void iseries_hv_unmap(dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction); - -static inline HvLpEvent_Rc HvCallEvent_ackLpEvent(struct HvLpEvent *event) -{ - return HvCall1(HvCallEventAckLpEvent, virt_to_abs(event)); -} - -static inline HvLpEvent_Rc HvCallEvent_cancelLpEvent(struct HvLpEvent *event) -{ - return HvCall1(HvCallEventCancelLpEvent, virt_to_abs(event)); -} - -static inline HvLpInstanceId HvCallEvent_getSourceLpInstanceId( - HvLpIndex targetLp, HvLpEvent_Type type) -{ - return HvCall2(HvCallEventGetSourceLpInstanceId, targetLp, type); -} - -static inline HvLpInstanceId HvCallEvent_getTargetLpInstanceId( - HvLpIndex targetLp, HvLpEvent_Type type) -{ - return HvCall2(HvCallEventGetTargetLpInstanceId, targetLp, type); -} - -static inline void HvCallEvent_openLpEventPath(HvLpIndex targetLp, - HvLpEvent_Type type) -{ - HvCall2(HvCallEventOpenLpEventPath, targetLp, type); -} - -static inline void HvCallEvent_closeLpEventPath(HvLpIndex targetLp, - HvLpEvent_Type type) -{ - HvCall2(HvCallEventCloseLpEventPath, targetLp, type); -} - -static inline HvLpDma_Rc HvCallEvent_dmaBufList(HvLpEvent_Type type, - HvLpIndex remoteLp, HvLpDma_Direction direction, - HvLpInstanceId localInstanceId, - HvLpInstanceId remoteInstanceId, - HvLpDma_AddressType localAddressType, - HvLpDma_AddressType remoteAddressType, - /* Do these need to be converted to absolute addresses? */ - u64 localBufList, u64 remoteBufList, u32 transferLength) -{ - /* Pack the misc bits into a single Dword to pass to PLIC */ - union { - struct { - u8 flags; - HvLpIndex remote; - u8 type; - u8 reserved; - HvLpInstanceId local_inst; - HvLpInstanceId remote_inst; - } parms; - u64 dword; - } packed; - - packed.parms.flags = (direction << 7) | - (localAddressType << 6) | (remoteAddressType << 5); - packed.parms.remote = remoteLp; - packed.parms.type = type; - packed.parms.reserved = 0; - packed.parms.local_inst = localInstanceId; - packed.parms.remote_inst = remoteInstanceId; - - return HvCall4(HvCallEventDmaBufList, packed.dword, localBufList, - remoteBufList, transferLength); -} - -static inline HvLpDma_Rc HvCallEvent_dmaToSp(void *local, u32 remote, - u32 length, HvLpDma_Direction dir) -{ - return HvCall4(HvCallEventDmaToSp, virt_to_abs(local), remote, - length, dir); -} - -#endif /* _ASM_POWERPC_ISERIES_HV_CALL_EVENT_H */ diff --git a/include/asm-powerpc/iseries/hv_call_sc.h b/include/asm-powerpc/iseries/hv_call_sc.h deleted file mode 100644 index f5d2109..0000000 --- a/include/asm-powerpc/iseries/hv_call_sc.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_HV_CALL_SC_H -#define _ASM_POWERPC_ISERIES_HV_CALL_SC_H - -#include - -#define HvCallBase 0x8000000000000000ul -#define HvCallCc 0x8001000000000000ul -#define HvCallCfg 0x8002000000000000ul -#define HvCallEvent 0x8003000000000000ul -#define HvCallHpt 0x8004000000000000ul -#define HvCallPci 0x8005000000000000ul -#define HvCallSm 0x8007000000000000ul -#define HvCallXm 0x8009000000000000ul - -extern u64 HvCall0(u64); -extern u64 HvCall1(u64, u64); -extern u64 HvCall2(u64, u64, u64); -extern u64 HvCall3(u64, u64, u64, u64); -extern u64 HvCall4(u64, u64, u64, u64, u64); -extern u64 HvCall5(u64, u64, u64, u64, u64, u64); -extern u64 HvCall6(u64, u64, u64, u64, u64, u64, u64); -extern u64 HvCall7(u64, u64, u64, u64, u64, u64, u64, u64); - -extern u64 HvCall0Ret16(u64, void *); -extern u64 HvCall1Ret16(u64, void *, u64); -extern u64 HvCall2Ret16(u64, void *, u64, u64); -extern u64 HvCall3Ret16(u64, void *, u64, u64, u64); -extern u64 HvCall4Ret16(u64, void *, u64, u64, u64, u64); -extern u64 HvCall5Ret16(u64, void *, u64, u64, u64, u64, u64); -extern u64 HvCall6Ret16(u64, void *, u64, u64, u64, u64, u64, u64); -extern u64 HvCall7Ret16(u64, void *, u64, u64 ,u64 ,u64 ,u64 ,u64 ,u64); - -#endif /* _ASM_POWERPC_ISERIES_HV_CALL_SC_H */ diff --git a/include/asm-powerpc/iseries/hv_call_xm.h b/include/asm-powerpc/iseries/hv_call_xm.h deleted file mode 100644 index 392ac3f..0000000 --- a/include/asm-powerpc/iseries/hv_call_xm.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This file contains the "hypervisor call" interface which is used to - * drive the hypervisor from SLIC. - */ -#ifndef _ASM_POWERPC_ISERIES_HV_CALL_XM_H -#define _ASM_POWERPC_ISERIES_HV_CALL_XM_H - -#include -#include - -#define HvCallXmGetTceTableParms HvCallXm + 0 -#define HvCallXmTestBus HvCallXm + 1 -#define HvCallXmConnectBusUnit HvCallXm + 2 -#define HvCallXmLoadTod HvCallXm + 8 -#define HvCallXmTestBusUnit HvCallXm + 9 -#define HvCallXmSetTce HvCallXm + 11 -#define HvCallXmSetTces HvCallXm + 13 - -static inline void HvCallXm_getTceTableParms(u64 cb) -{ - HvCall1(HvCallXmGetTceTableParms, cb); -} - -static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) -{ - return HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce); -} - -static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, - u64 numTces, u64 tce1, u64 tce2, u64 tce3, u64 tce4) -{ - return HvCall7(HvCallXmSetTces, tceTableToken, tceOffset, numTces, - tce1, tce2, tce3, tce4); -} - -static inline u64 HvCallXm_testBus(u16 busNumber) -{ - return HvCall1(HvCallXmTestBus, busNumber); -} - -static inline u64 HvCallXm_testBusUnit(u16 busNumber, u8 subBusNumber, - u8 deviceId) -{ - return HvCall2(HvCallXmTestBusUnit, busNumber, - (subBusNumber << 8) | deviceId); -} - -static inline u64 HvCallXm_connectBusUnit(u16 busNumber, u8 subBusNumber, - u8 deviceId, u64 interruptToken) -{ - return HvCall5(HvCallXmConnectBusUnit, busNumber, - (subBusNumber << 8) | deviceId, interruptToken, 0, - 0 /* HvLpConfig::mapDsaToQueueIndex(HvLpDSA(busNumber, xBoard, xCard)) */); -} - -static inline u64 HvCallXm_loadTod(void) -{ - return HvCall0(HvCallXmLoadTod); -} - -#endif /* _ASM_POWERPC_ISERIES_HV_CALL_XM_H */ diff --git a/include/asm-powerpc/iseries/hv_lp_config.h b/include/asm-powerpc/iseries/hv_lp_config.h deleted file mode 100644 index a006fd1..0000000 --- a/include/asm-powerpc/iseries/hv_lp_config.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H -#define _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H - -/* - * This file contains the interface to the LPAR configuration data - * to determine which resources should be allocated to each partition. - */ - -#include -#include - -enum { - HvCallCfg_Cur = 0, - HvCallCfg_Init = 1, - HvCallCfg_Max = 2, - HvCallCfg_Min = 3 -}; - -#define HvCallCfgGetSystemPhysicalProcessors HvCallCfg + 6 -#define HvCallCfgGetPhysicalProcessors HvCallCfg + 7 -#define HvCallCfgGetMsChunks HvCallCfg + 9 -#define HvCallCfgGetSharedPoolIndex HvCallCfg + 20 -#define HvCallCfgGetSharedProcUnits HvCallCfg + 21 -#define HvCallCfgGetNumProcsInSharedPool HvCallCfg + 22 -#define HvCallCfgGetVirtualLanIndexMap HvCallCfg + 30 -#define HvCallCfgGetHostingLpIndex HvCallCfg + 32 - -extern HvLpIndex HvLpConfig_getLpIndex_outline(void); -extern HvLpIndex HvLpConfig_getLpIndex(void); -extern HvLpIndex HvLpConfig_getPrimaryLpIndex(void); - -static inline u64 HvLpConfig_getMsChunks(void) -{ - return HvCall2(HvCallCfgGetMsChunks, HvLpConfig_getLpIndex(), - HvCallCfg_Cur); -} - -static inline u64 HvLpConfig_getSystemPhysicalProcessors(void) -{ - return HvCall0(HvCallCfgGetSystemPhysicalProcessors); -} - -static inline u64 HvLpConfig_getNumProcsInSharedPool(HvLpSharedPoolIndex sPI) -{ - return (u16)HvCall1(HvCallCfgGetNumProcsInSharedPool, sPI); -} - -static inline u64 HvLpConfig_getPhysicalProcessors(void) -{ - return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(), - HvCallCfg_Cur); -} - -static inline HvLpSharedPoolIndex HvLpConfig_getSharedPoolIndex(void) -{ - return HvCall1(HvCallCfgGetSharedPoolIndex, HvLpConfig_getLpIndex()); -} - -static inline u64 HvLpConfig_getSharedProcUnits(void) -{ - return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(), - HvCallCfg_Cur); -} - -static inline u64 HvLpConfig_getMaxSharedProcUnits(void) -{ - return HvCall2(HvCallCfgGetSharedProcUnits, HvLpConfig_getLpIndex(), - HvCallCfg_Max); -} - -static inline u64 HvLpConfig_getMaxPhysicalProcessors(void) -{ - return HvCall2(HvCallCfgGetPhysicalProcessors, HvLpConfig_getLpIndex(), - HvCallCfg_Max); -} - -static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMapForLp( - HvLpIndex lp) -{ - /* - * This is a new function in V5R1 so calls to this on older - * hypervisors will return -1 - */ - u64 retVal = HvCall1(HvCallCfgGetVirtualLanIndexMap, lp); - if (retVal == -1) - retVal = 0; - return retVal; -} - -static inline HvLpVirtualLanIndexMap HvLpConfig_getVirtualLanIndexMap(void) -{ - return HvLpConfig_getVirtualLanIndexMapForLp( - HvLpConfig_getLpIndex_outline()); -} - -static inline int HvLpConfig_doLpsCommunicateOnVirtualLan(HvLpIndex lp1, - HvLpIndex lp2) -{ - HvLpVirtualLanIndexMap virtualLanIndexMap1 = - HvLpConfig_getVirtualLanIndexMapForLp(lp1); - HvLpVirtualLanIndexMap virtualLanIndexMap2 = - HvLpConfig_getVirtualLanIndexMapForLp(lp2); - return ((virtualLanIndexMap1 & virtualLanIndexMap2) != 0); -} - -static inline HvLpIndex HvLpConfig_getHostingLpIndex(HvLpIndex lp) -{ - return HvCall1(HvCallCfgGetHostingLpIndex, lp); -} - -#endif /* _ASM_POWERPC_ISERIES_HV_LP_CONFIG_H */ diff --git a/include/asm-powerpc/iseries/hv_lp_event.h b/include/asm-powerpc/iseries/hv_lp_event.h deleted file mode 100644 index 8f5da7d..0000000 --- a/include/asm-powerpc/iseries/hv_lp_event.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* This file contains the class for HV events in the system. */ - -#ifndef _ASM_POWERPC_ISERIES_HV_LP_EVENT_H -#define _ASM_POWERPC_ISERIES_HV_LP_EVENT_H - -#include -#include -#include -#include - -/* - * HvLpEvent is the structure for Lp Event messages passed between - * partitions through PLIC. - */ - -struct HvLpEvent { - u8 flags; /* Event flags x00-x00 */ - u8 xType; /* Type of message x01-x01 */ - u16 xSubtype; /* Subtype for event x02-x03 */ - u8 xSourceLp; /* Source LP x04-x04 */ - u8 xTargetLp; /* Target LP x05-x05 */ - u8 xSizeMinus1; /* Size of Derived class - 1 x06-x06 */ - u8 xRc; /* RC for Ack flows x07-x07 */ - u16 xSourceInstanceId; /* Source sides instance id x08-x09 */ - u16 xTargetInstanceId; /* Target sides instance id x0A-x0B */ - union { - u32 xSubtypeData; /* Data usable by the subtype x0C-x0F */ - u16 xSubtypeDataShort[2]; /* Data as 2 shorts */ - u8 xSubtypeDataChar[4]; /* Data as 4 chars */ - } x; - - u64 xCorrelationToken; /* Unique value for source/type x10-x17 */ -}; - -typedef void (*LpEventHandler)(struct HvLpEvent *); - -/* Register a handler for an event type - returns 0 on success */ -extern int HvLpEvent_registerHandler(HvLpEvent_Type eventType, - LpEventHandler hdlr); - -/* - * Unregister a handler for an event type - * - * This call will sleep until the handler being removed is guaranteed to - * be no longer executing on any CPU. Do not call with locks held. - * - * returns 0 on success - * Unregister will fail if there are any paths open for the type - */ -extern int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType); - -/* - * Open an Lp Event Path for an event type - * returns 0 on success - * openPath will fail if there is no handler registered for the event type. - * The lpIndex specified is the partition index for the target partition - * (for VirtualIo, VirtualLan and SessionMgr) other types specify zero) - */ -extern int HvLpEvent_openPath(HvLpEvent_Type eventType, HvLpIndex lpIndex); - -/* - * Close an Lp Event Path for a type and partition - * returns 0 on success - */ -extern int HvLpEvent_closePath(HvLpEvent_Type eventType, HvLpIndex lpIndex); - -#define HvLpEvent_Type_Hypervisor 0 -#define HvLpEvent_Type_MachineFac 1 -#define HvLpEvent_Type_SessionMgr 2 -#define HvLpEvent_Type_SpdIo 3 -#define HvLpEvent_Type_VirtualBus 4 -#define HvLpEvent_Type_PciIo 5 -#define HvLpEvent_Type_RioIo 6 -#define HvLpEvent_Type_VirtualLan 7 -#define HvLpEvent_Type_VirtualIo 8 -#define HvLpEvent_Type_NumTypes 9 - -#define HvLpEvent_Rc_Good 0 -#define HvLpEvent_Rc_BufferNotAvailable 1 -#define HvLpEvent_Rc_Cancelled 2 -#define HvLpEvent_Rc_GenericError 3 -#define HvLpEvent_Rc_InvalidAddress 4 -#define HvLpEvent_Rc_InvalidPartition 5 -#define HvLpEvent_Rc_InvalidSize 6 -#define HvLpEvent_Rc_InvalidSubtype 7 -#define HvLpEvent_Rc_InvalidSubtypeData 8 -#define HvLpEvent_Rc_InvalidType 9 -#define HvLpEvent_Rc_PartitionDead 10 -#define HvLpEvent_Rc_PathClosed 11 -#define HvLpEvent_Rc_SubtypeError 12 - -#define HvLpEvent_Function_Ack 0 -#define HvLpEvent_Function_Int 1 - -#define HvLpEvent_AckInd_NoAck 0 -#define HvLpEvent_AckInd_DoAck 1 - -#define HvLpEvent_AckType_ImmediateAck 0 -#define HvLpEvent_AckType_DeferredAck 1 - -#define HV_LP_EVENT_INT 0x01 -#define HV_LP_EVENT_DO_ACK 0x02 -#define HV_LP_EVENT_DEFERRED_ACK 0x04 -#define HV_LP_EVENT_VALID 0x80 - -#define HvLpDma_Direction_LocalToRemote 0 -#define HvLpDma_Direction_RemoteToLocal 1 - -#define HvLpDma_AddressType_TceIndex 0 -#define HvLpDma_AddressType_RealAddress 1 - -#define HvLpDma_Rc_Good 0 -#define HvLpDma_Rc_Error 1 -#define HvLpDma_Rc_PartitionDead 2 -#define HvLpDma_Rc_PathClosed 3 -#define HvLpDma_Rc_InvalidAddress 4 -#define HvLpDma_Rc_InvalidLength 5 - -static inline int hvlpevent_is_valid(struct HvLpEvent *h) -{ - return h->flags & HV_LP_EVENT_VALID; -} - -static inline void hvlpevent_invalidate(struct HvLpEvent *h) -{ - h->flags &= ~ HV_LP_EVENT_VALID; -} - -static inline int hvlpevent_is_int(struct HvLpEvent *h) -{ - return h->flags & HV_LP_EVENT_INT; -} - -static inline int hvlpevent_is_ack(struct HvLpEvent *h) -{ - return !hvlpevent_is_int(h); -} - -static inline int hvlpevent_need_ack(struct HvLpEvent *h) -{ - return h->flags & HV_LP_EVENT_DO_ACK; -} - -#endif /* _ASM_POWERPC_ISERIES_HV_LP_EVENT_H */ diff --git a/include/asm-powerpc/iseries/hv_types.h b/include/asm-powerpc/iseries/hv_types.h deleted file mode 100644 index c3e6d2a..0000000 --- a/include/asm-powerpc/iseries/hv_types.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_HV_TYPES_H -#define _ASM_POWERPC_ISERIES_HV_TYPES_H - -/* - * General typedefs for the hypervisor. - */ - -#include - -typedef u8 HvLpIndex; -typedef u16 HvLpInstanceId; -typedef u64 HvLpTOD; -typedef u64 HvLpSystemSerialNum; -typedef u8 HvLpDeviceSerialNum[12]; -typedef u16 HvLpSanHwSet; -typedef u16 HvLpBus; -typedef u16 HvLpBoard; -typedef u16 HvLpCard; -typedef u8 HvLpDeviceType[4]; -typedef u8 HvLpDeviceModel[3]; -typedef u64 HvIoToken; -typedef u8 HvLpName[8]; -typedef u32 HvIoId; -typedef u64 HvRealMemoryIndex; -typedef u32 HvLpIndexMap; /* Must hold HVMAXARCHITECTEDLPS bits!!! */ -typedef u16 HvLpVrmIndex; -typedef u32 HvXmGenerationId; -typedef u8 HvLpBusPool; -typedef u8 HvLpSharedPoolIndex; -typedef u16 HvLpSharedProcUnitsX100; -typedef u8 HvLpVirtualLanIndex; -typedef u16 HvLpVirtualLanIndexMap; /* Must hold HVMAXARCHITECTEDVIRTUALLANS bits!!! */ -typedef u16 HvBusNumber; /* Hypervisor Bus Number */ -typedef u8 HvSubBusNumber; /* Hypervisor SubBus Number */ -typedef u8 HvAgentId; /* Hypervisor DevFn */ - - -#define HVMAXARCHITECTEDLPS 32 -#define HVMAXARCHITECTEDVIRTUALLANS 16 -#define HVMAXARCHITECTEDVIRTUALDISKS 32 -#define HVMAXARCHITECTEDVIRTUALCDROMS 8 -#define HVMAXARCHITECTEDVIRTUALTAPES 8 -#define HVCHUNKSIZE (256 * 1024) -#define HVPAGESIZE (4 * 1024) -#define HVLPMINMEGSPRIMARY 256 -#define HVLPMINMEGSSECONDARY 64 -#define HVCHUNKSPERMEG 4 -#define HVPAGESPERMEG 256 -#define HVPAGESPERCHUNK 64 - -#define HvLpIndexInvalid ((HvLpIndex)0xff) - -/* - * Enums for the sub-components under PLIC - * Used in HvCall and HvPrimaryCall - */ -enum { - HvCallCompId = 0, - HvCallCpuCtlsCompId = 1, - HvCallCfgCompId = 2, - HvCallEventCompId = 3, - HvCallHptCompId = 4, - HvCallPciCompId = 5, - HvCallSlmCompId = 6, - HvCallSmCompId = 7, - HvCallSpdCompId = 8, - HvCallXmCompId = 9, - HvCallRioCompId = 10, - HvCallRsvd3CompId = 11, - HvCallRsvd2CompId = 12, - HvCallRsvd1CompId = 13, - HvCallMaxCompId = 14, - HvPrimaryCallCompId = 0, - HvPrimaryCallCfgCompId = 1, - HvPrimaryCallPciCompId = 2, - HvPrimaryCallSmCompId = 3, - HvPrimaryCallSpdCompId = 4, - HvPrimaryCallXmCompId = 5, - HvPrimaryCallRioCompId = 6, - HvPrimaryCallRsvd7CompId = 7, - HvPrimaryCallRsvd6CompId = 8, - HvPrimaryCallRsvd5CompId = 9, - HvPrimaryCallRsvd4CompId = 10, - HvPrimaryCallRsvd3CompId = 11, - HvPrimaryCallRsvd2CompId = 12, - HvPrimaryCallRsvd1CompId = 13, - HvPrimaryCallMaxCompId = HvCallMaxCompId -}; - -struct HvLpBufferList { - u64 addr; - u64 len; -}; - -#endif /* _ASM_POWERPC_ISERIES_HV_TYPES_H */ diff --git a/include/asm-powerpc/iseries/iommu.h b/include/asm-powerpc/iseries/iommu.h deleted file mode 100644 index c59ee7e..0000000 --- a/include/asm-powerpc/iseries/iommu.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef _ASM_POWERPC_ISERIES_IOMMU_H -#define _ASM_POWERPC_ISERIES_IOMMU_H - -/* - * Copyright (C) 2005 Stephen Rothwell, IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the: - * Free Software Foundation, Inc., - * 59 Temple Place, Suite 330, - * Boston, MA 02111-1307 USA - */ - -struct pci_dev; -struct vio_dev; -struct device_node; -struct iommu_table; - -/* Creates table for an individual device node */ -extern void iommu_devnode_init_iSeries(struct pci_dev *pdev, - struct device_node *dn); - -/* Get table parameters from HV */ -extern void iommu_table_getparms_iSeries(unsigned long busno, - unsigned char slotno, unsigned char virtbus, - struct iommu_table *tbl); - -extern struct iommu_table *vio_build_iommu_table_iseries(struct vio_dev *dev); -extern void iommu_vio_init(void); - -#endif /* _ASM_POWERPC_ISERIES_IOMMU_H */ diff --git a/include/asm-powerpc/iseries/it_lp_queue.h b/include/asm-powerpc/iseries/it_lp_queue.h deleted file mode 100644 index 4282788..0000000 --- a/include/asm-powerpc/iseries/it_lp_queue.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H -#define _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H - -/* - * This control block defines the simple LP queue structure that is - * shared between the hypervisor (PLIC) and the OS in order to send - * events to an LP. - */ - -#include -#include - -#define IT_LP_MAX_QUEUES 8 - -#define IT_LP_NOT_USED 0 /* Queue will not be used by PLIC */ -#define IT_LP_DEDICATED_IO 1 /* Queue dedicated to IO processor specified */ -#define IT_LP_DEDICATED_LP 2 /* Queue dedicated to LP specified */ -#define IT_LP_SHARED 3 /* Queue shared for both IO and LP */ - -#define IT_LP_EVENT_STACK_SIZE 4096 -#define IT_LP_EVENT_MAX_SIZE 256 -#define IT_LP_EVENT_ALIGN 64 - -struct hvlpevent_queue { -/* - * The hq_current_event is the pointer to the next event stack entry - * that will become valid. The OS must peek at this entry to determine - * if it is valid. PLIC will set the valid indicator as the very last - * store into that entry. - * - * When the OS has completed processing of the event then it will mark - * the event as invalid so that PLIC knows it can store into that event - * location again. - * - * If the event stack fills and there are overflow events, then PLIC - * will set the hq_overflow_pending flag in which case the OS will - * have to fetch the additional LP events once they have drained the - * event stack. - * - * The first 16-bytes are known by both the OS and PLIC. The remainder - * of the cache line is for use by the OS. - */ - u8 hq_overflow_pending; /* 0x00 Overflow events are pending */ - u8 hq_status; /* 0x01 DedicatedIo or DedicatedLp or NotUsed */ - u16 hq_proc_index; /* 0x02 Logical Proc Index for correlation */ - u8 hq_reserved1[12]; /* 0x04 */ - char *hq_current_event; /* 0x10 */ - char *hq_last_event; /* 0x18 */ - char *hq_event_stack; /* 0x20 */ - u8 hq_index; /* 0x28 unique sequential index. */ - u8 hq_reserved2[3]; /* 0x29-2b */ - spinlock_t hq_lock; -}; - -extern struct hvlpevent_queue hvlpevent_queue; - -extern int hvlpevent_is_pending(void); -extern void process_hvlpevents(void); -extern void setup_hvlpevent_queue(void); - -#endif /* _ASM_POWERPC_ISERIES_IT_LP_QUEUE_H */ diff --git a/include/asm-powerpc/iseries/lpar_map.h b/include/asm-powerpc/iseries/lpar_map.h deleted file mode 100644 index 5e9f3e1..0000000 --- a/include/asm-powerpc/iseries/lpar_map.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_LPAR_MAP_H -#define _ASM_POWERPC_ISERIES_LPAR_MAP_H - -#ifndef __ASSEMBLY__ - -#include - -#endif - -/* - * The iSeries hypervisor will set up mapping for one or more - * ESID/VSID pairs (in SLB/segment registers) and will set up - * mappings of one or more ranges of pages to VAs. - * We will have the hypervisor set up the ESID->VSID mapping - * for the four kernel segments (C-F). With shared processors, - * the hypervisor will clear all segment registers and reload - * these four whenever the processor is switched from one - * partition to another. - */ - -/* The Vsid and Esid identified below will be used by the hypervisor - * to set up a memory mapping for part of the load area before giving - * control to the Linux kernel. The load area is 64 MB, but this must - * not attempt to map the whole load area. The Hashed Page Table may - * need to be located within the load area (if the total partition size - * is 64 MB), but cannot be mapped. Typically, this should specify - * to map half (32 MB) of the load area. - * - * The hypervisor will set up page table entries for the number of - * pages specified. - * - * In 32-bit mode, the hypervisor will load all four of the - * segment registers (identified by the low-order four bits of the - * Esid field. In 64-bit mode, the hypervisor will load one SLB - * entry to map the Esid to the Vsid. -*/ - -#define HvEsidsToMap 2 -#define HvRangesToMap 1 - -/* Hypervisor initially maps 32MB of the load area */ -#define HvPagesToMap 8192 - -#ifndef __ASSEMBLY__ -struct LparMap { - u64 xNumberEsids; // Number of ESID/VSID pairs - u64 xNumberRanges; // Number of VA ranges to map - u64 xSegmentTableOffs; // Page number within load area of seg table - u64 xRsvd[5]; - struct { - u64 xKernelEsid; // Esid used to map kernel load - u64 xKernelVsid; // Vsid used to map kernel load - } xEsids[HvEsidsToMap]; - struct { - u64 xPages; // Number of pages to be mapped - u64 xOffset; // Offset from start of load area - u64 xVPN; // Virtual Page Number - } xRanges[HvRangesToMap]; -}; - -extern const struct LparMap xLparMap; - -#endif /* __ASSEMBLY__ */ - -/* the fixed address where the LparMap exists */ -#define LPARMAP_PHYS 0x7000 - -#endif /* _ASM_POWERPC_ISERIES_LPAR_MAP_H */ diff --git a/include/asm-powerpc/iseries/mf.h b/include/asm-powerpc/iseries/mf.h deleted file mode 100644 index eb851a9..0000000 --- a/include/asm-powerpc/iseries/mf.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * Copyright (C) 2001 Troy D. Armstrong IBM Corporation - * Copyright (C) 2004 Stephen Rothwell IBM Corporation - * - * This modules exists as an interface between a Linux secondary partition - * running on an iSeries and the primary partition's Virtual Service - * Processor (VSP) object. The VSP has final authority over powering on/off - * all partitions in the iSeries. It also provides miscellaneous low-level - * machine facility type operations. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_ISERIES_MF_H -#define _ASM_POWERPC_ISERIES_MF_H - -#include - -#include -#include - -struct rtc_time; - -typedef void (*MFCompleteHandler)(void *clientToken, int returnCode); - -extern void mf_allocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type, - unsigned size, unsigned amount, MFCompleteHandler hdlr, - void *userToken); -extern void mf_deallocate_lp_events(HvLpIndex targetLp, HvLpEvent_Type type, - unsigned count, MFCompleteHandler hdlr, void *userToken); - -extern void mf_power_off(void); -extern void mf_reboot(char *cmd); - -extern void mf_display_src(u32 word); -extern void mf_display_progress(u16 value); - -extern void mf_init(void); - -#endif /* _ASM_POWERPC_ISERIES_MF_H */ diff --git a/include/asm-powerpc/iseries/vio.h b/include/asm-powerpc/iseries/vio.h deleted file mode 100644 index f9ac0d0..0000000 --- a/include/asm-powerpc/iseries/vio.h +++ /dev/null @@ -1,265 +0,0 @@ -/* -*- linux-c -*- - * - * iSeries Virtual I/O Message Path header - * - * Authors: Dave Boutcher - * Ryan Arnold - * Colin Devilbiss - * - * (C) Copyright 2000 IBM Corporation - * - * This header file is used by the iSeries virtual I/O device - * drivers. It defines the interfaces to the common functions - * (implemented in drivers/char/viopath.h) as well as defining - * common functions and structures. Currently (at the time I - * wrote this comment) the iSeries virtual I/O device drivers - * that use this are - * drivers/block/viodasd.c - * drivers/char/viocons.c - * drivers/char/viotape.c - * drivers/cdrom/viocd.c - * - * The iSeries virtual ethernet support (veth.c) uses a whole - * different set of functions. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of the - * License, or (at your option) anyu later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ -#ifndef _ASM_POWERPC_ISERIES_VIO_H -#define _ASM_POWERPC_ISERIES_VIO_H - -#include -#include - -/* - * iSeries virtual I/O events use the subtype field in - * HvLpEvent to figure out what kind of vio event is coming - * in. We use a table to route these, and this defines - * the maximum number of distinct subtypes - */ -#define VIO_MAX_SUBTYPES 8 - -#define VIOMAXBLOCKDMA 12 - -struct open_data { - u64 disk_size; - u16 max_disk; - u16 cylinders; - u16 tracks; - u16 sectors; - u16 bytes_per_sector; -}; - -struct rw_data { - u64 offset; - struct { - u32 token; - u32 reserved; - u64 len; - } dma_info[VIOMAXBLOCKDMA]; -}; - -struct vioblocklpevent { - struct HvLpEvent event; - u32 reserved; - u16 version; - u16 sub_result; - u16 disk; - u16 flags; - union { - struct open_data open_data; - struct rw_data rw_data; - u64 changed; - } u; -}; - -#define vioblockflags_ro 0x0001 - -enum vioblocksubtype { - vioblockopen = 0x0001, - vioblockclose = 0x0002, - vioblockread = 0x0003, - vioblockwrite = 0x0004, - vioblockflush = 0x0005, - vioblockcheck = 0x0007 -}; - -struct viocdlpevent { - struct HvLpEvent event; - u32 reserved; - u16 version; - u16 sub_result; - u16 disk; - u16 flags; - u32 token; - u64 offset; /* On open, max number of disks */ - u64 len; /* On open, size of the disk */ - u32 block_size; /* Only set on open */ - u32 media_size; /* Only set on open */ -}; - -enum viocdsubtype { - viocdopen = 0x0001, - viocdclose = 0x0002, - viocdread = 0x0003, - viocdwrite = 0x0004, - viocdlockdoor = 0x0005, - viocdgetinfo = 0x0006, - viocdcheck = 0x0007 -}; - -struct viotapelpevent { - struct HvLpEvent event; - u32 reserved; - u16 version; - u16 sub_type_result; - u16 tape; - u16 flags; - u32 token; - u64 len; - union { - struct { - u32 tape_op; - u32 count; - } op; - struct { - u32 type; - u32 resid; - u32 dsreg; - u32 gstat; - u32 erreg; - u32 file_no; - u32 block_no; - } get_status; - struct { - u32 block_no; - } get_pos; - } u; -}; - -enum viotapesubtype { - viotapeopen = 0x0001, - viotapeclose = 0x0002, - viotaperead = 0x0003, - viotapewrite = 0x0004, - viotapegetinfo = 0x0005, - viotapeop = 0x0006, - viotapegetpos = 0x0007, - viotapesetpos = 0x0008, - viotapegetstatus = 0x0009 -}; - -/* - * Each subtype can register a handler to process their events. - * The handler must have this interface. - */ -typedef void (vio_event_handler_t) (struct HvLpEvent * event); - -extern int viopath_open(HvLpIndex remoteLp, int subtype, int numReq); -extern int viopath_close(HvLpIndex remoteLp, int subtype, int numReq); -extern int vio_setHandler(int subtype, vio_event_handler_t * beh); -extern int vio_clearHandler(int subtype); -extern int viopath_isactive(HvLpIndex lp); -extern HvLpInstanceId viopath_sourceinst(HvLpIndex lp); -extern HvLpInstanceId viopath_targetinst(HvLpIndex lp); -extern void vio_set_hostlp(void); -extern void *vio_get_event_buffer(int subtype); -extern void vio_free_event_buffer(int subtype, void *buffer); - -extern struct vio_dev *vio_create_viodasd(u32 unit); - -extern HvLpIndex viopath_hostLp; -extern HvLpIndex viopath_ourLp; - -#define VIOCHAR_MAX_DATA 200 - -#define VIOMAJOR_SUBTYPE_MASK 0xff00 -#define VIOMINOR_SUBTYPE_MASK 0x00ff -#define VIOMAJOR_SUBTYPE_SHIFT 8 - -#define VIOVERSION 0x0101 - -/* - * This is the general structure for VIO errors; each module should have - * a table of them, and each table should be terminated by an entry of - * { 0, 0, NULL }. Then, to find a specific error message, a module - * should pass its local table and the return code. - */ -struct vio_error_entry { - u16 rc; - int errno; - const char *msg; -}; -extern const struct vio_error_entry *vio_lookup_rc( - const struct vio_error_entry *local_table, u16 rc); - -enum viosubtypes { - viomajorsubtype_monitor = 0x0100, - viomajorsubtype_blockio = 0x0200, - viomajorsubtype_chario = 0x0300, - viomajorsubtype_config = 0x0400, - viomajorsubtype_cdio = 0x0500, - viomajorsubtype_tape = 0x0600, - viomajorsubtype_scsi = 0x0700 -}; - -enum vioconfigsubtype { - vioconfigget = 0x0001, -}; - -enum viorc { - viorc_good = 0x0000, - viorc_noConnection = 0x0001, - viorc_noReceiver = 0x0002, - viorc_noBufferAvailable = 0x0003, - viorc_invalidMessageType = 0x0004, - viorc_invalidRange = 0x0201, - viorc_invalidToken = 0x0202, - viorc_DMAError = 0x0203, - viorc_useError = 0x0204, - viorc_releaseError = 0x0205, - viorc_invalidDisk = 0x0206, - viorc_openRejected = 0x0301 -}; - -/* - * The structure of the events that flow between us and OS/400 for chario - * events. You can't mess with this unless the OS/400 side changes too. - */ -struct viocharlpevent { - struct HvLpEvent event; - u32 reserved; - u16 version; - u16 subtype_result_code; - u8 virtual_device; - u8 len; - u8 data[VIOCHAR_MAX_DATA]; -}; - -#define VIOCHAR_WINDOW 10 - -enum viocharsubtype { - viocharopen = 0x0001, - viocharclose = 0x0002, - viochardata = 0x0003, - viocharack = 0x0004, - viocharconfig = 0x0005 -}; - -enum viochar_rc { - viochar_rc_ebusy = 1 -}; - -#endif /* _ASM_POWERPC_ISERIES_VIO_H */ diff --git a/include/asm-powerpc/kdebug.h b/include/asm-powerpc/kdebug.h deleted file mode 100644 index ae6d206..0000000 --- a/include/asm-powerpc/kdebug.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _ASM_POWERPC_KDEBUG_H -#define _ASM_POWERPC_KDEBUG_H -#ifdef __KERNEL__ - -/* Grossly misnamed. */ -enum die_val { - DIE_OOPS = 1, - DIE_IABR_MATCH, - DIE_DABR_MATCH, - DIE_BPT, - DIE_SSTEP, -}; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_KDEBUG_H */ diff --git a/include/asm-powerpc/kdump.h b/include/asm-powerpc/kdump.h deleted file mode 100644 index f6c93c7..0000000 --- a/include/asm-powerpc/kdump.h +++ /dev/null @@ -1,35 +0,0 @@ -#ifndef _PPC64_KDUMP_H -#define _PPC64_KDUMP_H - -/* Kdump kernel runs at 32 MB, change at your peril. */ -#define KDUMP_KERNELBASE 0x2000000 - -/* How many bytes to reserve at zero for kdump. The reserve limit should - * be greater or equal to the trampoline's end address. - * Reserve to the end of the FWNMI area, see head_64.S */ -#define KDUMP_RESERVE_LIMIT 0x10000 /* 64K */ - -#ifdef CONFIG_CRASH_DUMP - -#define KDUMP_TRAMPOLINE_START 0x0100 -#define KDUMP_TRAMPOLINE_END 0x3000 - -#define KDUMP_MIN_TCE_ENTRIES 2048 - -#endif /* CONFIG_CRASH_DUMP */ - -#ifndef __ASSEMBLY__ -#ifdef CONFIG_CRASH_DUMP - -extern void reserve_kdump_trampoline(void); -extern void setup_kdump_trampoline(void); - -#else /* !CONFIG_CRASH_DUMP */ - -static inline void reserve_kdump_trampoline(void) { ; } -static inline void setup_kdump_trampoline(void) { ; } - -#endif /* CONFIG_CRASH_DUMP */ -#endif /* __ASSEMBLY__ */ - -#endif /* __PPC64_KDUMP_H */ diff --git a/include/asm-powerpc/kexec.h b/include/asm-powerpc/kexec.h deleted file mode 100644 index acdcdc6..0000000 --- a/include/asm-powerpc/kexec.h +++ /dev/null @@ -1,160 +0,0 @@ -#ifndef _ASM_POWERPC_KEXEC_H -#define _ASM_POWERPC_KEXEC_H -#ifdef __KERNEL__ - -/* - * Maximum page that is mapped directly into kernel memory. - * XXX: Since we copy virt we can use any page we allocate - */ -#define KEXEC_SOURCE_MEMORY_LIMIT (-1UL) - -/* - * Maximum address we can reach in physical address mode. - * XXX: I want to allow initrd in highmem. Otherwise set to rmo on LPAR. - */ -#define KEXEC_DESTINATION_MEMORY_LIMIT (-1UL) - -/* Maximum address we can use for the control code buffer */ -#ifdef __powerpc64__ -#define KEXEC_CONTROL_MEMORY_LIMIT (-1UL) -#else -/* TASK_SIZE, probably left over from use_mm ?? */ -#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE -#endif - -#define KEXEC_CONTROL_CODE_SIZE 4096 - -/* The native architecture */ -#ifdef __powerpc64__ -#define KEXEC_ARCH KEXEC_ARCH_PPC64 -#else -#define KEXEC_ARCH KEXEC_ARCH_PPC -#endif - -#ifndef __ASSEMBLY__ -#include - -typedef void (*crash_shutdown_t)(void); - -#ifdef CONFIG_KEXEC - -#ifdef __powerpc64__ -/* - * This function is responsible for capturing register states if coming - * via panic or invoking dump using sysrq-trigger. - */ -static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) -{ - if (oldregs) - memcpy(newregs, oldregs, sizeof(*newregs)); - else { - /* FIXME Merge this with xmon_save_regs ?? */ - unsigned long tmp1, tmp2; - __asm__ __volatile__ ( - "std 0,0(%2)\n" - "std 1,8(%2)\n" - "std 2,16(%2)\n" - "std 3,24(%2)\n" - "std 4,32(%2)\n" - "std 5,40(%2)\n" - "std 6,48(%2)\n" - "std 7,56(%2)\n" - "std 8,64(%2)\n" - "std 9,72(%2)\n" - "std 10,80(%2)\n" - "std 11,88(%2)\n" - "std 12,96(%2)\n" - "std 13,104(%2)\n" - "std 14,112(%2)\n" - "std 15,120(%2)\n" - "std 16,128(%2)\n" - "std 17,136(%2)\n" - "std 18,144(%2)\n" - "std 19,152(%2)\n" - "std 20,160(%2)\n" - "std 21,168(%2)\n" - "std 22,176(%2)\n" - "std 23,184(%2)\n" - "std 24,192(%2)\n" - "std 25,200(%2)\n" - "std 26,208(%2)\n" - "std 27,216(%2)\n" - "std 28,224(%2)\n" - "std 29,232(%2)\n" - "std 30,240(%2)\n" - "std 31,248(%2)\n" - "mfmsr %0\n" - "std %0, 264(%2)\n" - "mfctr %0\n" - "std %0, 280(%2)\n" - "mflr %0\n" - "std %0, 288(%2)\n" - "bl 1f\n" - "1: mflr %1\n" - "std %1, 256(%2)\n" - "mtlr %0\n" - "mfxer %0\n" - "std %0, 296(%2)\n" - : "=&r" (tmp1), "=&r" (tmp2) - : "b" (newregs) - : "memory"); - } -} -#else -/* - * Provide a dummy definition to avoid build failures. Will remain - * empty till crash dump support is enabled. - */ -static inline void crash_setup_regs(struct pt_regs *newregs, - struct pt_regs *oldregs) { } -#endif /* !__powerpc64 __ */ - -extern void kexec_smp_wait(void); /* get and clear naca physid, wait for - master to copy new code to 0 */ -extern int crashing_cpu; -extern void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)); -extern cpumask_t cpus_in_sr; -static inline int kexec_sr_activated(int cpu) -{ - return cpu_isset(cpu,cpus_in_sr); -} - -struct kimage; -struct pt_regs; -extern void default_machine_kexec(struct kimage *image); -extern int default_machine_kexec_prepare(struct kimage *image); -extern void default_machine_crash_shutdown(struct pt_regs *regs); -extern int crash_shutdown_register(crash_shutdown_t handler); -extern int crash_shutdown_unregister(crash_shutdown_t handler); - -extern void machine_kexec_simple(struct kimage *image); -extern void crash_kexec_secondary(struct pt_regs *regs); -extern int overlaps_crashkernel(unsigned long start, unsigned long size); -extern void reserve_crashkernel(void); - -#else /* !CONFIG_KEXEC */ -static inline int kexec_sr_activated(int cpu) { return 0; } -static inline void crash_kexec_secondary(struct pt_regs *regs) { } - -static inline int overlaps_crashkernel(unsigned long start, unsigned long size) -{ - return 0; -} - -static inline void reserve_crashkernel(void) { ; } - -static inline int crash_shutdown_register(crash_shutdown_t handler) -{ - return 0; -} - -static inline int crash_shutdown_unregister(crash_shutdown_t handler) -{ - return 0; -} - -#endif /* CONFIG_KEXEC */ -#endif /* ! __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_KEXEC_H */ diff --git a/include/asm-powerpc/keylargo.h b/include/asm-powerpc/keylargo.h deleted file mode 100644 index d8520ef..0000000 --- a/include/asm-powerpc/keylargo.h +++ /dev/null @@ -1,261 +0,0 @@ -#ifndef _ASM_POWERPC_KEYLARGO_H -#define _ASM_POWERPC_KEYLARGO_H -#ifdef __KERNEL__ -/* - * keylargo.h: definitions for using the "KeyLargo" I/O controller chip. - * - */ - -/* "Pangea" chipset has keylargo device-id 0x25 while core99 - * has device-id 0x22. The rev. of the pangea one is 0, so we - * fake an artificial rev. in keylargo_rev by oring 0x100 - */ -#define KL_PANGEA_REV 0x100 - -/* offset from base for feature control registers */ -#define KEYLARGO_MBCR 0x34 /* KL Only, Media bay control/status */ -#define KEYLARGO_FCR0 0x38 -#define KEYLARGO_FCR1 0x3c -#define KEYLARGO_FCR2 0x40 -#define KEYLARGO_FCR3 0x44 -#define KEYLARGO_FCR4 0x48 -#define KEYLARGO_FCR5 0x4c /* Pangea only */ - -/* K2 aditional FCRs */ -#define K2_FCR6 0x34 -#define K2_FCR7 0x30 -#define K2_FCR8 0x2c -#define K2_FCR9 0x28 -#define K2_FCR10 0x24 - -/* GPIO registers */ -#define KEYLARGO_GPIO_LEVELS0 0x50 -#define KEYLARGO_GPIO_LEVELS1 0x54 -#define KEYLARGO_GPIO_EXTINT_0 0x58 -#define KEYLARGO_GPIO_EXTINT_CNT 18 -#define KEYLARGO_GPIO_0 0x6A -#define KEYLARGO_GPIO_CNT 17 -#define KEYLARGO_GPIO_EXTINT_DUAL_EDGE 0x80 -#define KEYLARGO_GPIO_OUTPUT_ENABLE 0x04 -#define KEYLARGO_GPIO_OUTOUT_DATA 0x01 -#define KEYLARGO_GPIO_INPUT_DATA 0x02 - -/* K2 does only extint GPIOs and does 51 of them */ -#define K2_GPIO_EXTINT_0 0x58 -#define K2_GPIO_EXTINT_CNT 51 - -/* Specific GPIO regs */ - -#define KL_GPIO_MODEM_RESET (KEYLARGO_GPIO_0+0x03) -#define KL_GPIO_MODEM_POWER (KEYLARGO_GPIO_0+0x02) /* Pangea */ - -#define KL_GPIO_SOUND_POWER (KEYLARGO_GPIO_0+0x05) - -/* Hrm... this one is only to be used on Pismo. It seeem to also - * control the timebase enable on other machines. Still to be - * experimented... --BenH. - */ -#define KL_GPIO_FW_CABLE_POWER (KEYLARGO_GPIO_0+0x09) -#define KL_GPIO_TB_ENABLE (KEYLARGO_GPIO_0+0x09) - -#define KL_GPIO_ETH_PHY_RESET (KEYLARGO_GPIO_0+0x10) - -#define KL_GPIO_EXTINT_CPU1 (KEYLARGO_GPIO_0+0x0a) -#define KL_GPIO_EXTINT_CPU1_ASSERT 0x04 -#define KL_GPIO_EXTINT_CPU1_RELEASE 0x38 - -#define KL_GPIO_RESET_CPU0 (KEYLARGO_GPIO_EXTINT_0+0x03) -#define KL_GPIO_RESET_CPU1 (KEYLARGO_GPIO_EXTINT_0+0x04) -#define KL_GPIO_RESET_CPU2 (KEYLARGO_GPIO_EXTINT_0+0x0f) -#define KL_GPIO_RESET_CPU3 (KEYLARGO_GPIO_EXTINT_0+0x10) - -#define KL_GPIO_PMU_MESSAGE_IRQ (KEYLARGO_GPIO_EXTINT_0+0x09) -#define KL_GPIO_PMU_MESSAGE_BIT KEYLARGO_GPIO_INPUT_DATA - -#define KL_GPIO_MEDIABAY_IRQ (KEYLARGO_GPIO_EXTINT_0+0x0e) - -#define KL_GPIO_AIRPORT_0 (KEYLARGO_GPIO_EXTINT_0+0x0a) -#define KL_GPIO_AIRPORT_1 (KEYLARGO_GPIO_EXTINT_0+0x0d) -#define KL_GPIO_AIRPORT_2 (KEYLARGO_GPIO_0+0x0d) -#define KL_GPIO_AIRPORT_3 (KEYLARGO_GPIO_0+0x0e) -#define KL_GPIO_AIRPORT_4 (KEYLARGO_GPIO_0+0x0f) - -/* - * Bits in feature control register. Those bits different for K2 are - * listed separately - */ -#define KL_MBCR_MB0_PCI_ENABLE 0x00000800 /* exist ? */ -#define KL_MBCR_MB0_IDE_ENABLE 0x00001000 -#define KL_MBCR_MB0_FLOPPY_ENABLE 0x00002000 /* exist ? */ -#define KL_MBCR_MB0_SOUND_ENABLE 0x00004000 /* hrm... */ -#define KL_MBCR_MB0_DEV_MASK 0x00007800 -#define KL_MBCR_MB0_DEV_POWER 0x00000400 -#define KL_MBCR_MB0_DEV_RESET 0x00000200 -#define KL_MBCR_MB0_ENABLE 0x00000100 -#define KL_MBCR_MB1_PCI_ENABLE 0x08000000 /* exist ? */ -#define KL_MBCR_MB1_IDE_ENABLE 0x10000000 -#define KL_MBCR_MB1_FLOPPY_ENABLE 0x20000000 /* exist ? */ -#define KL_MBCR_MB1_SOUND_ENABLE 0x40000000 /* hrm... */ -#define KL_MBCR_MB1_DEV_MASK 0x78000000 -#define KL_MBCR_MB1_DEV_POWER 0x04000000 -#define KL_MBCR_MB1_DEV_RESET 0x02000000 -#define KL_MBCR_MB1_ENABLE 0x01000000 - -#define KL0_SCC_B_INTF_ENABLE 0x00000001 /* (KL Only) */ -#define KL0_SCC_A_INTF_ENABLE 0x00000002 -#define KL0_SCC_SLOWPCLK 0x00000004 -#define KL0_SCC_RESET 0x00000008 -#define KL0_SCCA_ENABLE 0x00000010 -#define KL0_SCCB_ENABLE 0x00000020 -#define KL0_SCC_CELL_ENABLE 0x00000040 -#define KL0_IRDA_HIGH_BAND 0x00000100 /* (KL Only) */ -#define KL0_IRDA_SOURCE2_SEL 0x00000200 /* (KL Only) */ -#define KL0_IRDA_SOURCE1_SEL 0x00000400 /* (KL Only) */ -#define KL0_PG_USB0_PMI_ENABLE 0x00000400 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_RESET 0x00000800 /* (KL Only) */ -#define KL0_PG_USB0_REF_SUSPEND_SEL 0x00000800 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_DEFAULT1 0x00001000 /* (KL Only) */ -#define KL0_PG_USB0_REF_SUSPEND 0x00001000 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_DEFAULT0 0x00002000 /* (KL Only) */ -#define KL0_PG_USB0_PAD_SUSPEND 0x00002000 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_FAST_CONNECT 0x00004000 /* (KL Only) */ -#define KL0_PG_USB1_PMI_ENABLE 0x00004000 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_ENABLE 0x00008000 /* (KL Only) */ -#define KL0_PG_USB1_REF_SUSPEND_SEL 0x00008000 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_CLK32_ENABLE 0x00010000 /* (KL Only) */ -#define KL0_PG_USB1_REF_SUSPEND 0x00010000 /* (Pangea/Intrepid Only) */ -#define KL0_IRDA_CLK19_ENABLE 0x00020000 /* (KL Only) */ -#define KL0_PG_USB1_PAD_SUSPEND 0x00020000 /* (Pangea/Intrepid Only) */ -#define KL0_USB0_PAD_SUSPEND0 0x00040000 -#define KL0_USB0_PAD_SUSPEND1 0x00080000 -#define KL0_USB0_CELL_ENABLE 0x00100000 -#define KL0_USB1_PAD_SUSPEND0 0x00400000 -#define KL0_USB1_PAD_SUSPEND1 0x00800000 -#define KL0_USB1_CELL_ENABLE 0x01000000 -#define KL0_USB_REF_SUSPEND 0x10000000 /* (KL Only) */ - -#define KL0_SERIAL_ENABLE (KL0_SCC_B_INTF_ENABLE | \ - KL0_SCC_SLOWPCLK | \ - KL0_SCC_CELL_ENABLE | KL0_SCCA_ENABLE) - -#define KL1_USB2_PMI_ENABLE 0x00000001 /* Intrepid only */ -#define KL1_AUDIO_SEL_22MCLK 0x00000002 /* KL/Pangea only */ -#define KL1_USB2_REF_SUSPEND_SEL 0x00000002 /* Intrepid only */ -#define KL1_USB2_REF_SUSPEND 0x00000004 /* Intrepid only */ -#define KL1_AUDIO_CLK_ENABLE_BIT 0x00000008 /* KL/Pangea only */ -#define KL1_USB2_PAD_SUSPEND_SEL 0x00000008 /* Intrepid only */ -#define KL1_USB2_PAD_SUSPEND0 0x00000010 /* Intrepid only */ -#define KL1_AUDIO_CLK_OUT_ENABLE 0x00000020 /* KL/Pangea only */ -#define KL1_USB2_PAD_SUSPEND1 0x00000020 /* Intrepid only */ -#define KL1_AUDIO_CELL_ENABLE 0x00000040 /* KL/Pangea only */ -#define KL1_USB2_CELL_ENABLE 0x00000040 /* Intrepid only */ -#define KL1_AUDIO_CHOOSE 0x00000080 /* KL/Pangea only */ -#define KL1_I2S0_CHOOSE 0x00000200 /* KL Only */ -#define KL1_I2S0_CELL_ENABLE 0x00000400 -#define KL1_I2S0_CLK_ENABLE_BIT 0x00001000 -#define KL1_I2S0_ENABLE 0x00002000 -#define KL1_I2S1_CELL_ENABLE 0x00020000 -#define KL1_I2S1_CLK_ENABLE_BIT 0x00080000 -#define KL1_I2S1_ENABLE 0x00100000 -#define KL1_EIDE0_ENABLE 0x00800000 /* KL/Intrepid Only */ -#define KL1_EIDE0_RESET_N 0x01000000 /* KL/Intrepid Only */ -#define KL1_EIDE1_ENABLE 0x04000000 /* KL Only */ -#define KL1_EIDE1_RESET_N 0x08000000 /* KL Only */ -#define KL1_UIDE_ENABLE 0x20000000 /* KL/Pangea Only */ -#define KL1_UIDE_RESET_N 0x40000000 /* KL/Pangea Only */ - -#define KL2_IOBUS_ENABLE 0x00000002 -#define KL2_SLEEP_STATE_BIT 0x00000100 /* KL Only */ -#define KL2_PG_STOP_ALL_CLOCKS 0x00000100 /* Pangea Only */ -#define KL2_MPIC_ENABLE 0x00020000 -#define KL2_CARDSLOT_RESET 0x00040000 /* Pangea/Intrepid Only */ -#define KL2_ALT_DATA_OUT 0x02000000 /* KL Only ??? */ -#define KL2_MEM_IS_BIG 0x04000000 -#define KL2_CARDSEL_16 0x08000000 - -#define KL3_SHUTDOWN_PLL_TOTAL 0x00000001 /* KL/Pangea only */ -#define KL3_SHUTDOWN_PLLKW6 0x00000002 /* KL/Pangea only */ -#define KL3_IT_SHUTDOWN_PLL3 0x00000002 /* Intrepid only */ -#define KL3_SHUTDOWN_PLLKW4 0x00000004 /* KL/Pangea only */ -#define KL3_IT_SHUTDOWN_PLL2 0x00000004 /* Intrepid only */ -#define KL3_SHUTDOWN_PLLKW35 0x00000008 /* KL/Pangea only */ -#define KL3_IT_SHUTDOWN_PLL1 0x00000008 /* Intrepid only */ -#define KL3_SHUTDOWN_PLLKW12 0x00000010 /* KL Only */ -#define KL3_IT_ENABLE_PLL3_SHUTDOWN 0x00000010 /* Intrepid only */ -#define KL3_PLL_RESET 0x00000020 /* KL/Pangea only */ -#define KL3_IT_ENABLE_PLL2_SHUTDOWN 0x00000020 /* Intrepid only */ -#define KL3_IT_ENABLE_PLL1_SHUTDOWN 0x00000010 /* Intrepid only */ -#define KL3_SHUTDOWN_PLL2X 0x00000080 /* KL Only */ -#define KL3_CLK66_ENABLE 0x00000100 /* KL Only */ -#define KL3_CLK49_ENABLE 0x00000200 -#define KL3_CLK45_ENABLE 0x00000400 -#define KL3_CLK31_ENABLE 0x00000800 /* KL/Pangea only */ -#define KL3_TIMER_CLK18_ENABLE 0x00001000 -#define KL3_I2S1_CLK18_ENABLE 0x00002000 -#define KL3_I2S0_CLK18_ENABLE 0x00004000 -#define KL3_VIA_CLK16_ENABLE 0x00008000 /* KL/Pangea only */ -#define KL3_IT_VIA_CLK32_ENABLE 0x00008000 /* Intrepid only */ -#define KL3_STOPPING33_ENABLED 0x00080000 /* KL Only */ -#define KL3_PG_PLL_ENABLE_TEST 0x00080000 /* Pangea Only */ - -/* Intrepid USB bus 2, port 0,1 */ -#define KL3_IT_PORT_WAKEUP_ENABLE(p) (0x00080000 << ((p)<<3)) -#define KL3_IT_PORT_RESUME_WAKE_EN(p) (0x00040000 << ((p)<<3)) -#define KL3_IT_PORT_CONNECT_WAKE_EN(p) (0x00020000 << ((p)<<3)) -#define KL3_IT_PORT_DISCONNECT_WAKE_EN(p) (0x00010000 << ((p)<<3)) -#define KL3_IT_PORT_RESUME_STAT(p) (0x00300000 << ((p)<<3)) -#define KL3_IT_PORT_CONNECT_STAT(p) (0x00200000 << ((p)<<3)) -#define KL3_IT_PORT_DISCONNECT_STAT(p) (0x00100000 << ((p)<<3)) - -/* Port 0,1 : bus 0, port 2,3 : bus 1 */ -#define KL4_PORT_WAKEUP_ENABLE(p) (0x00000008 << ((p)<<3)) -#define KL4_PORT_RESUME_WAKE_EN(p) (0x00000004 << ((p)<<3)) -#define KL4_PORT_CONNECT_WAKE_EN(p) (0x00000002 << ((p)<<3)) -#define KL4_PORT_DISCONNECT_WAKE_EN(p) (0x00000001 << ((p)<<3)) -#define KL4_PORT_RESUME_STAT(p) (0x00000040 << ((p)<<3)) -#define KL4_PORT_CONNECT_STAT(p) (0x00000020 << ((p)<<3)) -#define KL4_PORT_DISCONNECT_STAT(p) (0x00000010 << ((p)<<3)) - -/* Pangea and Intrepid only */ -#define KL5_VIA_USE_CLK31 0000000001 /* Pangea Only */ -#define KL5_SCC_USE_CLK31 0x00000002 /* Pangea Only */ -#define KL5_PWM_CLK32_EN 0x00000004 -#define KL5_CLK3_68_EN 0x00000010 -#define KL5_CLK32_EN 0x00000020 - - -/* K2 definitions */ -#define K2_FCR0_USB0_SWRESET 0x00200000 -#define K2_FCR0_USB1_SWRESET 0x02000000 -#define K2_FCR0_RING_PME_DISABLE 0x08000000 - -#define K2_FCR1_PCI1_BUS_RESET_N 0x00000010 -#define K2_FCR1_PCI1_SLEEP_RESET_EN 0x00000020 -#define K2_FCR1_I2S0_CELL_ENABLE 0x00000400 -#define K2_FCR1_I2S0_RESET 0x00000800 -#define K2_FCR1_I2S0_CLK_ENABLE_BIT 0x00001000 -#define K2_FCR1_I2S0_ENABLE 0x00002000 -#define K2_FCR1_PCI1_CLK_ENABLE 0x00004000 -#define K2_FCR1_FW_CLK_ENABLE 0x00008000 -#define K2_FCR1_FW_RESET_N 0x00010000 -#define K2_FCR1_I2S1_CELL_ENABLE 0x00020000 -#define K2_FCR1_I2S1_CLK_ENABLE_BIT 0x00080000 -#define K2_FCR1_I2S1_ENABLE 0x00100000 -#define K2_FCR1_GMAC_CLK_ENABLE 0x00400000 -#define K2_FCR1_GMAC_POWER_DOWN 0x00800000 -#define K2_FCR1_GMAC_RESET_N 0x01000000 -#define K2_FCR1_SATA_CLK_ENABLE 0x02000000 -#define K2_FCR1_SATA_POWER_DOWN 0x04000000 -#define K2_FCR1_SATA_RESET_N 0x08000000 -#define K2_FCR1_UATA_CLK_ENABLE 0x10000000 -#define K2_FCR1_UATA_RESET_N 0x40000000 -#define K2_FCR1_UATA_CHOOSE_CLK66 0x80000000 - -/* Shasta definitions */ -#define SH_FCR1_I2S2_CELL_ENABLE 0x00000010 -#define SH_FCR1_I2S2_CLK_ENABLE_BIT 0x00000040 -#define SH_FCR1_I2S2_ENABLE 0x00000080 -#define SH_FCR3_I2S2_CLK18_ENABLE 0x00008000 - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_KEYLARGO_H */ diff --git a/include/asm-powerpc/kgdb.h b/include/asm-powerpc/kgdb.h deleted file mode 100644 index 1399caf..0000000 --- a/include/asm-powerpc/kgdb.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * include/asm-powerpc/kgdb.h - * - * The PowerPC (32/64) specific defines / externs for KGDB. Based on - * the previous 32bit and 64bit specific files, which had the following - * copyrights: - * - * PPC64 Mods (C) 2005 Frank Rowand (frowand@mvista.com) - * PPC Mods (C) 2004 Tom Rini (trini@mvista.com) - * PPC Mods (C) 2003 John Whitney (john.whitney@timesys.com) - * PPC Mods (C) 1998 Michael Tesch (tesch@cs.wisc.edu) - * - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Author: Tom Rini - * - * 2006 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifdef __KERNEL__ -#ifndef __POWERPC_KGDB_H__ -#define __POWERPC_KGDB_H__ - -#ifndef __ASSEMBLY__ - -#define BREAK_INSTR_SIZE 4 -#define BUFMAX ((NUMREGBYTES * 2) + 512) -#define OUTBUFMAX ((NUMREGBYTES * 2) + 512) -static inline void arch_kgdb_breakpoint(void) -{ - asm(".long 0x7d821008"); /* twge r2, r2 */ -} -#define CACHE_FLUSH_IS_SAFE 1 - -/* The number bytes of registers we have to save depends on a few - * things. For 64bit we default to not including vector registers and - * vector state registers. */ -#ifdef CONFIG_PPC64 -/* - * 64 bit (8 byte) registers: - * 32 gpr, 32 fpr, nip, msr, link, ctr - * 32 bit (4 byte) registers: - * ccr, xer, fpscr - */ -#define NUMREGBYTES ((68 * 8) + (3 * 4)) -#define NUMCRITREGBYTES 184 -#else /* CONFIG_PPC32 */ -/* On non-E500 family PPC32 we determine the size by picking the last - * register we need, but on E500 we skip sections so we list what we - * need to store, and add it up. */ -#ifndef CONFIG_E500 -#define MAXREG (PT_FPSCR+1) -#else -/* 32 GPRs (8 bytes), nip, msr, ccr, link, ctr, xer, acc (8 bytes), spefscr*/ -#define MAXREG ((32*2)+6+2+1) -#endif -#define NUMREGBYTES (MAXREG * sizeof(int)) -/* CR/LR, R1, R2, R13-R31 inclusive. */ -#define NUMCRITREGBYTES (23 * sizeof(int)) -#endif /* 32/64 */ -#endif /* !(__ASSEMBLY__) */ -#endif /* !__POWERPC_KGDB_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/kmap_types.h b/include/asm-powerpc/kmap_types.h deleted file mode 100644 index b6bac6f..0000000 --- a/include/asm-powerpc/kmap_types.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _ASM_POWERPC_KMAP_TYPES_H -#define _ASM_POWERPC_KMAP_TYPES_H - -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_PPC_SYNC_PAGE, - KM_PPC_SYNC_ICACHE, - KM_TYPE_NR -}; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_KMAP_TYPES_H */ diff --git a/include/asm-powerpc/kprobes.h b/include/asm-powerpc/kprobes.h deleted file mode 100644 index d0e7701..0000000 --- a/include/asm-powerpc/kprobes.h +++ /dev/null @@ -1,118 +0,0 @@ -#ifndef _ASM_POWERPC_KPROBES_H -#define _ASM_POWERPC_KPROBES_H -#ifdef __KERNEL__ -/* - * Kernel Probes (KProbes) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) IBM Corporation, 2002, 2004 - * - * 2002-Oct Created by Vamsi Krishna S Kernel - * Probes initial implementation ( includes suggestions from - * Rusty Russell). - * 2004-Nov Modified for PPC64 by Ananth N Mavinakayanahalli - * - */ -#include -#include -#include - -#define __ARCH_WANT_KPROBES_INSN_SLOT - -struct pt_regs; -struct kprobe; - -typedef unsigned int kprobe_opcode_t; -#define BREAKPOINT_INSTRUCTION 0x7fe00008 /* trap */ -#define MAX_INSN_SIZE 1 - -#define IS_TW(instr) (((instr) & 0xfc0007fe) == 0x7c000008) -#define IS_TD(instr) (((instr) & 0xfc0007fe) == 0x7c000088) -#define IS_TDI(instr) (((instr) & 0xfc000000) == 0x08000000) -#define IS_TWI(instr) (((instr) & 0xfc000000) == 0x0c000000) - -#ifdef CONFIG_PPC64 -/* - * 64bit powerpc uses function descriptors. - * Handle cases where: - * - User passes a <.symbol> or - * - User passes a or - * - User passes a non-existant symbol, kallsyms_lookup_name - * returns 0. Don't deref the NULL pointer in that case - */ -#define kprobe_lookup_name(name, addr) \ -{ \ - addr = (kprobe_opcode_t *)kallsyms_lookup_name(name); \ - if (addr) { \ - char *colon; \ - if ((colon = strchr(name, ':')) != NULL) { \ - colon++; \ - if (*colon != '\0' && *colon != '.') \ - addr = *(kprobe_opcode_t **)addr; \ - } else if (name[0] != '.') \ - addr = *(kprobe_opcode_t **)addr; \ - } else { \ - char dot_name[KSYM_NAME_LEN]; \ - dot_name[0] = '.'; \ - dot_name[1] = '\0'; \ - strncat(dot_name, name, KSYM_NAME_LEN - 2); \ - addr = (kprobe_opcode_t *)kallsyms_lookup_name(dot_name); \ - } \ -} - -#define is_trap(instr) (IS_TW(instr) || IS_TD(instr) || \ - IS_TWI(instr) || IS_TDI(instr)) -#else -/* Use stock kprobe_lookup_name since ppc32 doesn't use function descriptors */ -#define is_trap(instr) (IS_TW(instr) || IS_TWI(instr)) -#endif - -#define flush_insn_slot(p) do { } while (0) -#define kretprobe_blacklist_size 0 - -void kretprobe_trampoline(void); -extern void arch_remove_kprobe(struct kprobe *p); - -/* Architecture specific copy of original instruction */ -struct arch_specific_insn { - /* copy of original instruction */ - kprobe_opcode_t *insn; - /* - * Set in kprobes code, initially to 0. If the instruction can be - * eumulated, this is set to 1, if not, to -1. - */ - int boostable; -}; - -struct prev_kprobe { - struct kprobe *kp; - unsigned long status; - unsigned long saved_msr; -}; - -/* per-cpu kprobe control block */ -struct kprobe_ctlblk { - unsigned long kprobe_status; - unsigned long kprobe_saved_msr; - struct pt_regs jprobe_saved_regs; - struct prev_kprobe prev_kprobe; -}; - -extern int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); -extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr); -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_KPROBES_H */ diff --git a/include/asm-powerpc/kvm.h b/include/asm-powerpc/kvm.h deleted file mode 100644 index f993e41..0000000 --- a/include/asm-powerpc/kvm.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - * Copyright IBM Corp. 2007 - * - * Authors: Hollis Blanchard - */ - -#ifndef __LINUX_KVM_POWERPC_H -#define __LINUX_KVM_POWERPC_H - -#include - -struct kvm_regs { - __u64 pc; - __u64 cr; - __u64 ctr; - __u64 lr; - __u64 xer; - __u64 msr; - __u64 srr0; - __u64 srr1; - __u64 pid; - - __u64 sprg0; - __u64 sprg1; - __u64 sprg2; - __u64 sprg3; - __u64 sprg4; - __u64 sprg5; - __u64 sprg6; - __u64 sprg7; - - __u64 gpr[32]; -}; - -struct kvm_sregs { -}; - -struct kvm_fpu { - __u64 fpr[32]; -}; - -#endif /* __LINUX_KVM_POWERPC_H */ diff --git a/include/asm-powerpc/kvm_asm.h b/include/asm-powerpc/kvm_asm.h deleted file mode 100644 index 2197764..0000000 --- a/include/asm-powerpc/kvm_asm.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - * Copyright IBM Corp. 2008 - * - * Authors: Hollis Blanchard - */ - -#ifndef __POWERPC_KVM_ASM_H__ -#define __POWERPC_KVM_ASM_H__ - -/* IVPR must be 64KiB-aligned. */ -#define VCPU_SIZE_ORDER 4 -#define VCPU_SIZE_LOG (VCPU_SIZE_ORDER + 12) -#define VCPU_TLB_PGSZ PPC44x_TLB_64K -#define VCPU_SIZE_BYTES (1< - */ - -#ifndef __POWERPC_KVM_HOST_H__ -#define __POWERPC_KVM_HOST_H__ - -#include -#include -#include -#include -#include - -#define KVM_MAX_VCPUS 1 -#define KVM_MEMORY_SLOTS 32 -/* memory slots that does not exposed to userspace */ -#define KVM_PRIVATE_MEM_SLOTS 4 - -#define KVM_COALESCED_MMIO_PAGE_OFFSET 1 - -/* We don't currently support large pages. */ -#define KVM_PAGES_PER_HPAGE (1<<31) - -struct kvm; -struct kvm_run; -struct kvm_vcpu; - -struct kvm_vm_stat { - u32 remote_tlb_flush; -}; - -struct kvm_vcpu_stat { - u32 sum_exits; - u32 mmio_exits; - u32 dcr_exits; - u32 signal_exits; - u32 light_exits; - /* Account for special types of light exits: */ - u32 itlb_real_miss_exits; - u32 itlb_virt_miss_exits; - u32 dtlb_real_miss_exits; - u32 dtlb_virt_miss_exits; - u32 syscall_exits; - u32 isi_exits; - u32 dsi_exits; - u32 emulated_inst_exits; - u32 dec_exits; - u32 ext_intr_exits; - u32 halt_wakeup; -}; - -struct tlbe { - u32 tid; /* Only the low 8 bits are used. */ - u32 word0; - u32 word1; - u32 word2; -}; - -struct kvm_arch { -}; - -struct kvm_vcpu_arch { - /* Unmodified copy of the guest's TLB. */ - struct tlbe guest_tlb[PPC44x_TLB_SIZE]; - /* TLB that's actually used when the guest is running. */ - struct tlbe shadow_tlb[PPC44x_TLB_SIZE]; - /* Pages which are referenced in the shadow TLB. */ - struct page *shadow_pages[PPC44x_TLB_SIZE]; - /* Copy of the host's TLB. */ - struct tlbe host_tlb[PPC44x_TLB_SIZE]; - - u32 host_stack; - u32 host_pid; - - u64 fpr[32]; - u32 gpr[32]; - - u32 pc; - u32 cr; - u32 ctr; - u32 lr; - u32 xer; - - u32 msr; - u32 mmucr; - u32 sprg0; - u32 sprg1; - u32 sprg2; - u32 sprg3; - u32 sprg4; - u32 sprg5; - u32 sprg6; - u32 sprg7; - u32 srr0; - u32 srr1; - u32 csrr0; - u32 csrr1; - u32 dsrr0; - u32 dsrr1; - u32 dear; - u32 esr; - u32 dec; - u32 decar; - u32 tbl; - u32 tbu; - u32 tcr; - u32 tsr; - u32 ivor[16]; - u32 ivpr; - u32 pir; - u32 pid; - u32 pvr; - u32 ccr0; - u32 ccr1; - u32 dbcr0; - u32 dbcr1; - - u32 last_inst; - u32 fault_dear; - u32 fault_esr; - gpa_t paddr_accessed; - - u8 io_gpr; /* GPR used as IO source/target */ - u8 mmio_is_bigendian; - u8 dcr_needed; - u8 dcr_is_write; - - u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ - - struct timer_list dec_timer; - unsigned long pending_exceptions; -}; - -struct kvm_guest_debug { - int enabled; - unsigned long bp[4]; - int singlestep; -}; - -#endif /* __POWERPC_KVM_HOST_H__ */ diff --git a/include/asm-powerpc/kvm_para.h b/include/asm-powerpc/kvm_para.h deleted file mode 100644 index 2d48f6a..0000000 --- a/include/asm-powerpc/kvm_para.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - * Copyright IBM Corp. 2008 - * - * Authors: Hollis Blanchard - */ - -#ifndef __POWERPC_KVM_PARA_H__ -#define __POWERPC_KVM_PARA_H__ - -#ifdef __KERNEL__ - -static inline int kvm_para_available(void) -{ - return 0; -} - -static inline unsigned int kvm_arch_para_features(void) -{ - return 0; -} - -#endif /* __KERNEL__ */ - -#endif /* __POWERPC_KVM_PARA_H__ */ diff --git a/include/asm-powerpc/kvm_ppc.h b/include/asm-powerpc/kvm_ppc.h deleted file mode 100644 index a8b0687..0000000 --- a/include/asm-powerpc/kvm_ppc.h +++ /dev/null @@ -1,95 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License, version 2, as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - * - * Copyright IBM Corp. 2008 - * - * Authors: Hollis Blanchard - */ - -#ifndef __POWERPC_KVM_PPC_H__ -#define __POWERPC_KVM_PPC_H__ - -/* This file exists just so we can dereference kvm_vcpu, avoiding nested header - * dependencies. */ - -#include -#include -#include -#include -#include - -struct kvm_tlb { - struct tlbe guest_tlb[PPC44x_TLB_SIZE]; - struct tlbe shadow_tlb[PPC44x_TLB_SIZE]; -}; - -enum emulation_result { - EMULATE_DONE, /* no further processing */ - EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */ - EMULATE_DO_DCR, /* kvm_run filled with DCR request */ - EMULATE_FAIL, /* can't emulate this instruction */ -}; - -extern const unsigned char exception_priority[]; -extern const unsigned char priority_exception[]; - -extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); -extern char kvmppc_handlers_start[]; -extern unsigned long kvmppc_handler_len; - -extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu); -extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, - unsigned int rt, unsigned int bytes, - int is_bigendian); -extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, - u32 val, unsigned int bytes, int is_bigendian); - -extern int kvmppc_emulate_instruction(struct kvm_run *run, - struct kvm_vcpu *vcpu); -extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu); - -extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn, - u64 asid, u32 flags); -extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr, - gva_t eend, u32 asid); -extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode); - -extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu); - -static inline void kvmppc_queue_exception(struct kvm_vcpu *vcpu, int exception) -{ - unsigned int priority = exception_priority[exception]; - set_bit(priority, &vcpu->arch.pending_exceptions); -} - -static inline void kvmppc_clear_exception(struct kvm_vcpu *vcpu, int exception) -{ - unsigned int priority = exception_priority[exception]; - clear_bit(priority, &vcpu->arch.pending_exceptions); -} - -/* Helper function for "full" MSR writes. No need to call this if only EE is - * changing. */ -static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) -{ - if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR)) - kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR); - - vcpu->arch.msr = new_msr; - - if (vcpu->arch.msr & MSR_WE) - kvm_vcpu_block(vcpu); -} - -#endif /* __POWERPC_KVM_PPC_H__ */ diff --git a/include/asm-powerpc/libata-portmap.h b/include/asm-powerpc/libata-portmap.h deleted file mode 100644 index 4d85180..0000000 --- a/include/asm-powerpc/libata-portmap.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ASM_POWERPC_LIBATA_PORTMAP_H -#define __ASM_POWERPC_LIBATA_PORTMAP_H - -#define ATA_PRIMARY_CMD 0x1F0 -#define ATA_PRIMARY_CTL 0x3F6 -#define ATA_PRIMARY_IRQ(dev) pci_get_legacy_ide_irq(dev, 0) - -#define ATA_SECONDARY_CMD 0x170 -#define ATA_SECONDARY_CTL 0x376 -#define ATA_SECONDARY_IRQ(dev) pci_get_legacy_ide_irq(dev, 1) - -#endif diff --git a/include/asm-powerpc/linkage.h b/include/asm-powerpc/linkage.h deleted file mode 100644 index e1c4ac1..0000000 --- a/include/asm-powerpc/linkage.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_POWERPC_LINKAGE_H -#define _ASM_POWERPC_LINKAGE_H - -/* Nothing to see here... */ - -#endif /* _ASM_POWERPC_LINKAGE_H */ diff --git a/include/asm-powerpc/lmb.h b/include/asm-powerpc/lmb.h deleted file mode 100644 index 6f5fdf0..0000000 --- a/include/asm-powerpc/lmb.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _ASM_POWERPC_LMB_H -#define _ASM_POWERPC_LMB_H - -#include - -#define LMB_DBG(fmt...) udbg_printf(fmt) - -#ifdef CONFIG_PPC32 -extern phys_addr_t lowmem_end_addr; -#define LMB_REAL_LIMIT lowmem_end_addr -#else -#define LMB_REAL_LIMIT 0 -#endif - -#endif /* _ASM_POWERPC_LMB_H */ diff --git a/include/asm-powerpc/local.h b/include/asm-powerpc/local.h deleted file mode 100644 index 612d832..0000000 --- a/include/asm-powerpc/local.h +++ /dev/null @@ -1,200 +0,0 @@ -#ifndef _ARCH_POWERPC_LOCAL_H -#define _ARCH_POWERPC_LOCAL_H - -#include -#include - -typedef struct -{ - atomic_long_t a; -} local_t; - -#define LOCAL_INIT(i) { ATOMIC_LONG_INIT(i) } - -#define local_read(l) atomic_long_read(&(l)->a) -#define local_set(l,i) atomic_long_set(&(l)->a, (i)) - -#define local_add(i,l) atomic_long_add((i),(&(l)->a)) -#define local_sub(i,l) atomic_long_sub((i),(&(l)->a)) -#define local_inc(l) atomic_long_inc(&(l)->a) -#define local_dec(l) atomic_long_dec(&(l)->a) - -static __inline__ long local_add_return(long a, local_t *l) -{ - long t; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%2 # local_add_return\n\ - add %0,%1,%0\n" - PPC405_ERR77(0,%2) - PPC_STLCX "%0,0,%2 \n\ - bne- 1b" - : "=&r" (t) - : "r" (a), "r" (&(l->a.counter)) - : "cc", "memory"); - - return t; -} - -#define local_add_negative(a, l) (local_add_return((a), (l)) < 0) - -static __inline__ long local_sub_return(long a, local_t *l) -{ - long t; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%2 # local_sub_return\n\ - subf %0,%1,%0\n" - PPC405_ERR77(0,%2) - PPC_STLCX "%0,0,%2 \n\ - bne- 1b" - : "=&r" (t) - : "r" (a), "r" (&(l->a.counter)) - : "cc", "memory"); - - return t; -} - -static __inline__ long local_inc_return(local_t *l) -{ - long t; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%1 # local_inc_return\n\ - addic %0,%0,1\n" - PPC405_ERR77(0,%1) - PPC_STLCX "%0,0,%1 \n\ - bne- 1b" - : "=&r" (t) - : "r" (&(l->a.counter)) - : "cc", "memory"); - - return t; -} - -/* - * local_inc_and_test - increment and test - * @l: pointer of type local_t - * - * Atomically increments @l by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define local_inc_and_test(l) (local_inc_return(l) == 0) - -static __inline__ long local_dec_return(local_t *l) -{ - long t; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%1 # local_dec_return\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%1) - PPC_STLCX "%0,0,%1\n\ - bne- 1b" - : "=&r" (t) - : "r" (&(l->a.counter)) - : "cc", "memory"); - - return t; -} - -#define local_cmpxchg(l, o, n) \ - (cmpxchg_local(&((l)->a.counter), (o), (n))) -#define local_xchg(l, n) (xchg_local(&((l)->a.counter), (n))) - -/** - * local_add_unless - add unless the number is a given value - * @l: pointer of type local_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * Atomically adds @a to @l, so long as it was not @u. - * Returns non-zero if @l was not @u, and zero otherwise. - */ -static __inline__ int local_add_unless(local_t *l, long a, long u) -{ - long t; - - __asm__ __volatile__ ( -"1:" PPC_LLARX "%0,0,%1 # local_add_unless\n\ - cmpw 0,%0,%3 \n\ - beq- 2f \n\ - add %0,%2,%0 \n" - PPC405_ERR77(0,%2) - PPC_STLCX "%0,0,%1 \n\ - bne- 1b \n" -" subf %0,%2,%0 \n\ -2:" - : "=&r" (t) - : "r" (&(l->a.counter)), "r" (a), "r" (u) - : "cc", "memory"); - - return t != u; -} - -#define local_inc_not_zero(l) local_add_unless((l), 1, 0) - -#define local_sub_and_test(a, l) (local_sub_return((a), (l)) == 0) -#define local_dec_and_test(l) (local_dec_return((l)) == 0) - -/* - * Atomically test *l and decrement if it is greater than 0. - * The function returns the old value of *l minus 1. - */ -static __inline__ long local_dec_if_positive(local_t *l) -{ - long t; - - __asm__ __volatile__( -"1:" PPC_LLARX "%0,0,%1 # local_dec_if_positive\n\ - cmpwi %0,1\n\ - addi %0,%0,-1\n\ - blt- 2f\n" - PPC405_ERR77(0,%1) - PPC_STLCX "%0,0,%1\n\ - bne- 1b" - "\n\ -2:" : "=&b" (t) - : "r" (&(l->a.counter)) - : "cc", "memory"); - - return t; -} - -/* Use these for per-cpu local_t variables: on some archs they are - * much more efficient than these naive implementations. Note they take - * a variable, not an address. - */ - -#define __local_inc(l) ((l)->a.counter++) -#define __local_dec(l) ((l)->a.counter++) -#define __local_add(i,l) ((l)->a.counter+=(i)) -#define __local_sub(i,l) ((l)->a.counter-=(i)) - -/* Need to disable preemption for the cpu local counters otherwise we could - still access a variable of a previous CPU in a non atomic way. */ -#define cpu_local_wrap_v(l) \ - ({ local_t res__; \ - preempt_disable(); \ - res__ = (l); \ - preempt_enable(); \ - res__; }) -#define cpu_local_wrap(l) \ - ({ preempt_disable(); \ - l; \ - preempt_enable(); }) \ - -#define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l))) -#define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i))) -#define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l))) -#define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l))) -#define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l))) -#define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l))) - -#define __cpu_local_inc(l) cpu_local_inc(l) -#define __cpu_local_dec(l) cpu_local_dec(l) -#define __cpu_local_add(i, l) cpu_local_add((i), (l)) -#define __cpu_local_sub(i, l) cpu_local_sub((i), (l)) - -#endif /* _ARCH_POWERPC_LOCAL_H */ diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h deleted file mode 100644 index 2fe268b..0000000 --- a/include/asm-powerpc/lppaca.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * lppaca.h - * Copyright (C) 2001 Mike Corrigan IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _ASM_POWERPC_LPPACA_H -#define _ASM_POWERPC_LPPACA_H -#ifdef __KERNEL__ - -//============================================================================= -// -// This control block contains the data that is shared between the -// hypervisor (PLIC) and the OS. -// -// -//---------------------------------------------------------------------------- -#include -#include -#include - -/* The Hypervisor barfs if the lppaca crosses a page boundary. A 1k - * alignment is sufficient to prevent this */ -struct lppaca { -//============================================================================= -// CACHE_LINE_1 0x0000 - 0x007F Contains read-only data -// NOTE: The xDynXyz fields are fields that will be dynamically changed by -// PLIC when preparing to bring a processor online or when dispatching a -// virtual processor! -//============================================================================= - u32 desc; // Eye catcher 0xD397D781 x00-x03 - u16 size; // Size of this struct x04-x05 - u16 reserved1; // Reserved x06-x07 - u16 reserved2:14; // Reserved x08-x09 - u8 shared_proc:1; // Shared processor indicator ... - u8 secondary_thread:1; // Secondary thread indicator ... - volatile u8 dyn_proc_status:8; // Dynamic Status of this proc x0A-x0A - u8 secondary_thread_count; // Secondary thread count x0B-x0B - volatile u16 dyn_hv_phys_proc_index;// Dynamic HV Physical Proc Index0C-x0D - volatile u16 dyn_hv_log_proc_index;// Dynamic HV Logical Proc Indexx0E-x0F - u32 decr_val; // Value for Decr programming x10-x13 - u32 pmc_val; // Value for PMC regs x14-x17 - volatile u32 dyn_hw_node_id; // Dynamic Hardware Node id x18-x1B - volatile u32 dyn_hw_proc_id; // Dynamic Hardware Proc Id x1C-x1F - volatile u32 dyn_pir; // Dynamic ProcIdReg value x20-x23 - u32 dsei_data; // DSEI data x24-x27 - u64 sprg3; // SPRG3 value x28-x2F - u8 reserved3[80]; // Reserved x30-x7F - -//============================================================================= -// CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data -//============================================================================= - // This Dword contains a byte for each type of interrupt that can occur. - // The IPI is a count while the others are just a binary 1 or 0. - union { - u64 any_int; - struct { - u16 reserved; // Reserved - cleared by #mpasmbl - u8 xirr_int; // Indicates xXirrValue is valid or Immed IO - u8 ipi_cnt; // IPI Count - u8 decr_int; // DECR interrupt occurred - u8 pdc_int; // PDC interrupt occurred - u8 quantum_int; // Interrupt quantum reached - u8 old_plic_deferred_ext_int; // Old PLIC has a deferred XIRR pending - } fields; - } int_dword; - - // Whenever any fields in this Dword are set then PLIC will defer the - // processing of external interrupts. Note that PLIC will store the - // XIRR directly into the xXirrValue field so that another XIRR will - // not be presented until this one clears. The layout of the low - // 4-bytes of this Dword is upto SLIC - PLIC just checks whether the - // entire Dword is zero or not. A non-zero value in the low order - // 2-bytes will result in SLIC being granted the highest thread - // priority upon return. A 0 will return to SLIC as medium priority. - u64 plic_defer_ints_area; // Entire Dword - - // Used to pass the real SRR0/1 from PLIC to SLIC as well as to - // pass the target SRR0/1 from SLIC to PLIC on a SetAsrAndRfid. - u64 saved_srr0; // Saved SRR0 x10-x17 - u64 saved_srr1; // Saved SRR1 x18-x1F - - // Used to pass parms from the OS to PLIC for SetAsrAndRfid - u64 saved_gpr3; // Saved GPR3 x20-x27 - u64 saved_gpr4; // Saved GPR4 x28-x2F - u64 saved_gpr5; // Saved GPR5 x30-x37 - - u8 reserved4; // Reserved x38-x38 - u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 - u8 fpregs_in_use; // FP regs in use x3A-x3A - u8 pmcregs_in_use; // PMC regs in use x3B-x3B - volatile u32 saved_decr; // Saved Decr Value x3C-x3F - volatile u64 emulated_time_base;// Emulated TB for this thread x40-x47 - volatile u64 cur_plic_latency; // Unaccounted PLIC latency x48-x4F - u64 tot_plic_latency; // Accumulated PLIC latency x50-x57 - u64 wait_state_cycles; // Wait cycles for this proc x58-x5F - u64 end_of_quantum; // TB at end of quantum x60-x67 - u64 pdc_saved_sprg1; // Saved SPRG1 for PMC int x68-x6F - u64 pdc_saved_srr0; // Saved SRR0 for PMC int x70-x77 - volatile u32 virtual_decr; // Virtual DECR for shared procsx78-x7B - u16 slb_count; // # of SLBs to maintain x7C-x7D - u8 idle; // Indicate OS is idle x7E - u8 vmxregs_in_use; // VMX registers in use x7F - - -//============================================================================= -// CACHE_LINE_3 0x0100 - 0x017F: This line is shared with other processors -//============================================================================= - // This is the yield_count. An "odd" value (low bit on) means that - // the processor is yielded (either because of an OS yield or a PLIC - // preempt). An even value implies that the processor is currently - // executing. - // NOTE: This value will ALWAYS be zero for dedicated processors and - // will NEVER be zero for shared processors (ie, initialized to a 1). - volatile u32 yield_count; // PLIC increments each dispatchx00-x03 - u32 reserved6; - volatile u64 cmo_faults; // CMO page fault count x08-x0F - volatile u64 cmo_fault_time; // CMO page fault time x10-x17 - u8 reserved7[104]; // Reserved x18-x7F - -//============================================================================= -// CACHE_LINE_4-5 0x0180 - 0x027F Contains PMC interrupt data -//============================================================================= - u8 pmc_save_area[256]; // PMC interrupt Area x00-xFF -} __attribute__((__aligned__(0x400))); - -extern struct lppaca lppaca[]; - -/* - * SLB shadow buffer structure as defined in the PAPR. The save_area - * contains adjacent ESID and VSID pairs for each shadowed SLB. The - * ESID is stored in the lower 64bits, then the VSID. - */ -struct slb_shadow { - u32 persistent; // Number of persistent SLBs x00-x03 - u32 buffer_length; // Total shadow buffer length x04-x07 - u64 reserved; // Alignment x08-x0f - struct { - u64 esid; - u64 vsid; - } save_area[SLB_NUM_BOLTED]; // x10-x40 -} ____cacheline_aligned; - -extern struct slb_shadow slb_shadow[]; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_LPPACA_H */ diff --git a/include/asm-powerpc/lv1call.h b/include/asm-powerpc/lv1call.h deleted file mode 100644 index 81713ac..0000000 --- a/include/asm-powerpc/lv1call.h +++ /dev/null @@ -1,348 +0,0 @@ -/* - * PS3 hvcall interface. - * - * Copyright (C) 2006 Sony Computer Entertainment Inc. - * Copyright 2006 Sony Corp. - * Copyright 2003, 2004 (c) MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#if !defined(_ASM_POWERPC_LV1CALL_H) -#define _ASM_POWERPC_LV1CALL_H - -#if !defined(__ASSEMBLY__) - -#include - -/* lv1 call declaration macros */ - -#define LV1_1_IN_ARG_DECL u64 in_1 -#define LV1_2_IN_ARG_DECL LV1_1_IN_ARG_DECL, u64 in_2 -#define LV1_3_IN_ARG_DECL LV1_2_IN_ARG_DECL, u64 in_3 -#define LV1_4_IN_ARG_DECL LV1_3_IN_ARG_DECL, u64 in_4 -#define LV1_5_IN_ARG_DECL LV1_4_IN_ARG_DECL, u64 in_5 -#define LV1_6_IN_ARG_DECL LV1_5_IN_ARG_DECL, u64 in_6 -#define LV1_7_IN_ARG_DECL LV1_6_IN_ARG_DECL, u64 in_7 -#define LV1_8_IN_ARG_DECL LV1_7_IN_ARG_DECL, u64 in_8 -#define LV1_1_OUT_ARG_DECL u64 *out_1 -#define LV1_2_OUT_ARG_DECL LV1_1_OUT_ARG_DECL, u64 *out_2 -#define LV1_3_OUT_ARG_DECL LV1_2_OUT_ARG_DECL, u64 *out_3 -#define LV1_4_OUT_ARG_DECL LV1_3_OUT_ARG_DECL, u64 *out_4 -#define LV1_5_OUT_ARG_DECL LV1_4_OUT_ARG_DECL, u64 *out_5 -#define LV1_6_OUT_ARG_DECL LV1_5_OUT_ARG_DECL, u64 *out_6 -#define LV1_7_OUT_ARG_DECL LV1_6_OUT_ARG_DECL, u64 *out_7 - -#define LV1_0_IN_0_OUT_ARG_DECL void -#define LV1_1_IN_0_OUT_ARG_DECL LV1_1_IN_ARG_DECL -#define LV1_2_IN_0_OUT_ARG_DECL LV1_2_IN_ARG_DECL -#define LV1_3_IN_0_OUT_ARG_DECL LV1_3_IN_ARG_DECL -#define LV1_4_IN_0_OUT_ARG_DECL LV1_4_IN_ARG_DECL -#define LV1_5_IN_0_OUT_ARG_DECL LV1_5_IN_ARG_DECL -#define LV1_6_IN_0_OUT_ARG_DECL LV1_6_IN_ARG_DECL -#define LV1_7_IN_0_OUT_ARG_DECL LV1_7_IN_ARG_DECL - -#define LV1_0_IN_1_OUT_ARG_DECL LV1_1_OUT_ARG_DECL -#define LV1_1_IN_1_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_2_IN_1_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_3_IN_1_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_4_IN_1_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_5_IN_1_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_6_IN_1_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_7_IN_1_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_1_OUT_ARG_DECL -#define LV1_8_IN_1_OUT_ARG_DECL LV1_8_IN_ARG_DECL, LV1_1_OUT_ARG_DECL - -#define LV1_0_IN_2_OUT_ARG_DECL LV1_2_OUT_ARG_DECL -#define LV1_1_IN_2_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_2_IN_2_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_3_IN_2_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_4_IN_2_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_5_IN_2_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_6_IN_2_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_2_OUT_ARG_DECL -#define LV1_7_IN_2_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_2_OUT_ARG_DECL - -#define LV1_0_IN_3_OUT_ARG_DECL LV1_3_OUT_ARG_DECL -#define LV1_1_IN_3_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_2_IN_3_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_3_IN_3_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_4_IN_3_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_5_IN_3_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_6_IN_3_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_3_OUT_ARG_DECL -#define LV1_7_IN_3_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_3_OUT_ARG_DECL - -#define LV1_0_IN_4_OUT_ARG_DECL LV1_4_OUT_ARG_DECL -#define LV1_1_IN_4_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_2_IN_4_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_3_IN_4_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_4_IN_4_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_5_IN_4_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_6_IN_4_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_4_OUT_ARG_DECL -#define LV1_7_IN_4_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_4_OUT_ARG_DECL - -#define LV1_0_IN_5_OUT_ARG_DECL LV1_5_OUT_ARG_DECL -#define LV1_1_IN_5_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_2_IN_5_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_3_IN_5_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_4_IN_5_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_5_IN_5_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_6_IN_5_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_5_OUT_ARG_DECL -#define LV1_7_IN_5_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_5_OUT_ARG_DECL - -#define LV1_0_IN_6_OUT_ARG_DECL LV1_6_OUT_ARG_DECL -#define LV1_1_IN_6_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_2_IN_6_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_3_IN_6_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_4_IN_6_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_5_IN_6_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_6_IN_6_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_6_OUT_ARG_DECL -#define LV1_7_IN_6_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_6_OUT_ARG_DECL - -#define LV1_0_IN_7_OUT_ARG_DECL LV1_7_OUT_ARG_DECL -#define LV1_1_IN_7_OUT_ARG_DECL LV1_1_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_2_IN_7_OUT_ARG_DECL LV1_2_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_3_IN_7_OUT_ARG_DECL LV1_3_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_4_IN_7_OUT_ARG_DECL LV1_4_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_5_IN_7_OUT_ARG_DECL LV1_5_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_6_IN_7_OUT_ARG_DECL LV1_6_IN_ARG_DECL, LV1_7_OUT_ARG_DECL -#define LV1_7_IN_7_OUT_ARG_DECL LV1_7_IN_ARG_DECL, LV1_7_OUT_ARG_DECL - -#define LV1_1_IN_ARGS in_1 -#define LV1_2_IN_ARGS LV1_1_IN_ARGS, in_2 -#define LV1_3_IN_ARGS LV1_2_IN_ARGS, in_3 -#define LV1_4_IN_ARGS LV1_3_IN_ARGS, in_4 -#define LV1_5_IN_ARGS LV1_4_IN_ARGS, in_5 -#define LV1_6_IN_ARGS LV1_5_IN_ARGS, in_6 -#define LV1_7_IN_ARGS LV1_6_IN_ARGS, in_7 -#define LV1_8_IN_ARGS LV1_7_IN_ARGS, in_8 - -#define LV1_1_OUT_ARGS out_1 -#define LV1_2_OUT_ARGS LV1_1_OUT_ARGS, out_2 -#define LV1_3_OUT_ARGS LV1_2_OUT_ARGS, out_3 -#define LV1_4_OUT_ARGS LV1_3_OUT_ARGS, out_4 -#define LV1_5_OUT_ARGS LV1_4_OUT_ARGS, out_5 -#define LV1_6_OUT_ARGS LV1_5_OUT_ARGS, out_6 -#define LV1_7_OUT_ARGS LV1_6_OUT_ARGS, out_7 - -#define LV1_0_IN_0_OUT_ARGS -#define LV1_1_IN_0_OUT_ARGS LV1_1_IN_ARGS -#define LV1_2_IN_0_OUT_ARGS LV1_2_IN_ARGS -#define LV1_3_IN_0_OUT_ARGS LV1_3_IN_ARGS -#define LV1_4_IN_0_OUT_ARGS LV1_4_IN_ARGS -#define LV1_5_IN_0_OUT_ARGS LV1_5_IN_ARGS -#define LV1_6_IN_0_OUT_ARGS LV1_6_IN_ARGS -#define LV1_7_IN_0_OUT_ARGS LV1_7_IN_ARGS - -#define LV1_0_IN_1_OUT_ARGS LV1_1_OUT_ARGS -#define LV1_1_IN_1_OUT_ARGS LV1_1_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_2_IN_1_OUT_ARGS LV1_2_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_3_IN_1_OUT_ARGS LV1_3_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_4_IN_1_OUT_ARGS LV1_4_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_5_IN_1_OUT_ARGS LV1_5_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_6_IN_1_OUT_ARGS LV1_6_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_7_IN_1_OUT_ARGS LV1_7_IN_ARGS, LV1_1_OUT_ARGS -#define LV1_8_IN_1_OUT_ARGS LV1_8_IN_ARGS, LV1_1_OUT_ARGS - -#define LV1_0_IN_2_OUT_ARGS LV1_2_OUT_ARGS -#define LV1_1_IN_2_OUT_ARGS LV1_1_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_2_IN_2_OUT_ARGS LV1_2_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_3_IN_2_OUT_ARGS LV1_3_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_4_IN_2_OUT_ARGS LV1_4_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_5_IN_2_OUT_ARGS LV1_5_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_6_IN_2_OUT_ARGS LV1_6_IN_ARGS, LV1_2_OUT_ARGS -#define LV1_7_IN_2_OUT_ARGS LV1_7_IN_ARGS, LV1_2_OUT_ARGS - -#define LV1_0_IN_3_OUT_ARGS LV1_3_OUT_ARGS -#define LV1_1_IN_3_OUT_ARGS LV1_1_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_2_IN_3_OUT_ARGS LV1_2_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_3_IN_3_OUT_ARGS LV1_3_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_4_IN_3_OUT_ARGS LV1_4_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_5_IN_3_OUT_ARGS LV1_5_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_6_IN_3_OUT_ARGS LV1_6_IN_ARGS, LV1_3_OUT_ARGS -#define LV1_7_IN_3_OUT_ARGS LV1_7_IN_ARGS, LV1_3_OUT_ARGS - -#define LV1_0_IN_4_OUT_ARGS LV1_4_OUT_ARGS -#define LV1_1_IN_4_OUT_ARGS LV1_1_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_2_IN_4_OUT_ARGS LV1_2_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_3_IN_4_OUT_ARGS LV1_3_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_4_IN_4_OUT_ARGS LV1_4_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_5_IN_4_OUT_ARGS LV1_5_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_6_IN_4_OUT_ARGS LV1_6_IN_ARGS, LV1_4_OUT_ARGS -#define LV1_7_IN_4_OUT_ARGS LV1_7_IN_ARGS, LV1_4_OUT_ARGS - -#define LV1_0_IN_5_OUT_ARGS LV1_5_OUT_ARGS -#define LV1_1_IN_5_OUT_ARGS LV1_1_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_2_IN_5_OUT_ARGS LV1_2_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_3_IN_5_OUT_ARGS LV1_3_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_4_IN_5_OUT_ARGS LV1_4_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_5_IN_5_OUT_ARGS LV1_5_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_6_IN_5_OUT_ARGS LV1_6_IN_ARGS, LV1_5_OUT_ARGS -#define LV1_7_IN_5_OUT_ARGS LV1_7_IN_ARGS, LV1_5_OUT_ARGS - -#define LV1_0_IN_6_OUT_ARGS LV1_6_OUT_ARGS -#define LV1_1_IN_6_OUT_ARGS LV1_1_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_2_IN_6_OUT_ARGS LV1_2_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_3_IN_6_OUT_ARGS LV1_3_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_4_IN_6_OUT_ARGS LV1_4_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_5_IN_6_OUT_ARGS LV1_5_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_6_IN_6_OUT_ARGS LV1_6_IN_ARGS, LV1_6_OUT_ARGS -#define LV1_7_IN_6_OUT_ARGS LV1_7_IN_ARGS, LV1_6_OUT_ARGS - -#define LV1_0_IN_7_OUT_ARGS LV1_7_OUT_ARGS -#define LV1_1_IN_7_OUT_ARGS LV1_1_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_2_IN_7_OUT_ARGS LV1_2_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_3_IN_7_OUT_ARGS LV1_3_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_4_IN_7_OUT_ARGS LV1_4_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_5_IN_7_OUT_ARGS LV1_5_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_6_IN_7_OUT_ARGS LV1_6_IN_ARGS, LV1_7_OUT_ARGS -#define LV1_7_IN_7_OUT_ARGS LV1_7_IN_ARGS, LV1_7_OUT_ARGS - -/* - * This LV1_CALL() macro is for use by callers. It expands into an - * inline call wrapper and an underscored HV call declaration. The - * wrapper can be used to instrument the lv1 call interface. The - * file lv1call.S defines its own LV1_CALL() macro to expand into - * the actual underscored call definition. - */ - -#if !defined(LV1_CALL) -#define LV1_CALL(name, in, out, num) \ - extern s64 _lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL); \ - static inline int lv1_##name(LV1_##in##_IN_##out##_OUT_ARG_DECL) \ - {return _lv1_##name(LV1_##in##_IN_##out##_OUT_ARGS);} -#endif - -#endif /* !defined(__ASSEMBLY__) */ - -/* lv1 call table */ - -LV1_CALL(allocate_memory, 4, 2, 0 ) -LV1_CALL(write_htab_entry, 4, 0, 1 ) -LV1_CALL(construct_virtual_address_space, 3, 2, 2 ) -LV1_CALL(invalidate_htab_entries, 5, 0, 3 ) -LV1_CALL(get_virtual_address_space_id_of_ppe, 1, 1, 4 ) -LV1_CALL(query_logical_partition_address_region_info, 1, 5, 6 ) -LV1_CALL(select_virtual_address_space, 1, 0, 7 ) -LV1_CALL(pause, 1, 0, 9 ) -LV1_CALL(destruct_virtual_address_space, 1, 0, 10 ) -LV1_CALL(configure_irq_state_bitmap, 3, 0, 11 ) -LV1_CALL(connect_irq_plug_ext, 5, 0, 12 ) -LV1_CALL(release_memory, 1, 0, 13 ) -LV1_CALL(put_iopte, 5, 0, 15 ) -LV1_CALL(disconnect_irq_plug_ext, 3, 0, 17 ) -LV1_CALL(construct_event_receive_port, 0, 1, 18 ) -LV1_CALL(destruct_event_receive_port, 1, 0, 19 ) -LV1_CALL(send_event_locally, 1, 0, 24 ) -LV1_CALL(end_of_interrupt, 1, 0, 27 ) -LV1_CALL(connect_irq_plug, 2, 0, 28 ) -LV1_CALL(disconnect_irq_plug, 1, 0, 29 ) -LV1_CALL(end_of_interrupt_ext, 3, 0, 30 ) -LV1_CALL(did_update_interrupt_mask, 2, 0, 31 ) -LV1_CALL(shutdown_logical_partition, 1, 0, 44 ) -LV1_CALL(destruct_logical_spe, 1, 0, 54 ) -LV1_CALL(construct_logical_spe, 7, 6, 57 ) -LV1_CALL(set_spe_interrupt_mask, 3, 0, 61 ) -LV1_CALL(set_spe_transition_notifier, 3, 0, 64 ) -LV1_CALL(disable_logical_spe, 2, 0, 65 ) -LV1_CALL(clear_spe_interrupt_status, 4, 0, 66 ) -LV1_CALL(get_spe_interrupt_status, 2, 1, 67 ) -LV1_CALL(get_logical_ppe_id, 0, 1, 69 ) -LV1_CALL(set_interrupt_mask, 5, 0, 73 ) -LV1_CALL(get_logical_partition_id, 0, 1, 74 ) -LV1_CALL(configure_execution_time_variable, 1, 0, 77 ) -LV1_CALL(get_spe_irq_outlet, 2, 1, 78 ) -LV1_CALL(set_spe_privilege_state_area_1_register, 3, 0, 79 ) -LV1_CALL(create_repository_node, 6, 0, 90 ) -LV1_CALL(get_repository_node_value, 5, 2, 91 ) -LV1_CALL(modify_repository_node_value, 6, 0, 92 ) -LV1_CALL(remove_repository_node, 4, 0, 93 ) -LV1_CALL(read_htab_entries, 2, 5, 95 ) -LV1_CALL(set_dabr, 2, 0, 96 ) -LV1_CALL(get_total_execution_time, 2, 1, 103 ) -LV1_CALL(allocate_io_segment, 3, 1, 116 ) -LV1_CALL(release_io_segment, 2, 0, 117 ) -LV1_CALL(construct_io_irq_outlet, 1, 1, 120 ) -LV1_CALL(destruct_io_irq_outlet, 1, 0, 121 ) -LV1_CALL(map_htab, 1, 1, 122 ) -LV1_CALL(unmap_htab, 1, 0, 123 ) -LV1_CALL(get_version_info, 0, 1, 127 ) -LV1_CALL(insert_htab_entry, 6, 3, 158 ) -LV1_CALL(read_virtual_uart, 3, 1, 162 ) -LV1_CALL(write_virtual_uart, 3, 1, 163 ) -LV1_CALL(set_virtual_uart_param, 3, 0, 164 ) -LV1_CALL(get_virtual_uart_param, 2, 1, 165 ) -LV1_CALL(configure_virtual_uart_irq, 1, 1, 166 ) -LV1_CALL(open_device, 3, 0, 170 ) -LV1_CALL(close_device, 2, 0, 171 ) -LV1_CALL(map_device_mmio_region, 5, 1, 172 ) -LV1_CALL(unmap_device_mmio_region, 3, 0, 173 ) -LV1_CALL(allocate_device_dma_region, 5, 1, 174 ) -LV1_CALL(free_device_dma_region, 3, 0, 175 ) -LV1_CALL(map_device_dma_region, 6, 0, 176 ) -LV1_CALL(unmap_device_dma_region, 4, 0, 177 ) -LV1_CALL(net_add_multicast_address, 4, 0, 185 ) -LV1_CALL(net_remove_multicast_address, 4, 0, 186 ) -LV1_CALL(net_start_tx_dma, 4, 0, 187 ) -LV1_CALL(net_stop_tx_dma, 3, 0, 188 ) -LV1_CALL(net_start_rx_dma, 4, 0, 189 ) -LV1_CALL(net_stop_rx_dma, 3, 0, 190 ) -LV1_CALL(net_set_interrupt_status_indicator, 4, 0, 191 ) -LV1_CALL(net_set_interrupt_mask, 4, 0, 193 ) -LV1_CALL(net_control, 6, 2, 194 ) -LV1_CALL(connect_interrupt_event_receive_port, 4, 0, 197 ) -LV1_CALL(disconnect_interrupt_event_receive_port, 4, 0, 198 ) -LV1_CALL(get_spe_all_interrupt_statuses, 1, 1, 199 ) -LV1_CALL(deconfigure_virtual_uart_irq, 0, 0, 202 ) -LV1_CALL(enable_logical_spe, 2, 0, 207 ) -LV1_CALL(gpu_open, 1, 0, 210 ) -LV1_CALL(gpu_close, 0, 0, 211 ) -LV1_CALL(gpu_device_map, 1, 2, 212 ) -LV1_CALL(gpu_device_unmap, 1, 0, 213 ) -LV1_CALL(gpu_memory_allocate, 5, 2, 214 ) -LV1_CALL(gpu_memory_free, 1, 0, 216 ) -LV1_CALL(gpu_context_allocate, 2, 5, 217 ) -LV1_CALL(gpu_context_free, 1, 0, 218 ) -LV1_CALL(gpu_context_iomap, 5, 0, 221 ) -LV1_CALL(gpu_context_attribute, 6, 0, 225 ) -LV1_CALL(gpu_context_intr, 1, 1, 227 ) -LV1_CALL(gpu_attribute, 5, 0, 228 ) -LV1_CALL(get_rtc, 0, 2, 232 ) -LV1_CALL(set_ppe_periodic_tracer_frequency, 1, 0, 240 ) -LV1_CALL(start_ppe_periodic_tracer, 5, 0, 241 ) -LV1_CALL(stop_ppe_periodic_tracer, 1, 1, 242 ) -LV1_CALL(storage_read, 6, 1, 245 ) -LV1_CALL(storage_write, 6, 1, 246 ) -LV1_CALL(storage_send_device_command, 6, 1, 248 ) -LV1_CALL(storage_get_async_status, 1, 2, 249 ) -LV1_CALL(storage_check_async_status, 2, 1, 254 ) -LV1_CALL(panic, 1, 0, 255 ) -LV1_CALL(construct_lpm, 6, 3, 140 ) -LV1_CALL(destruct_lpm, 1, 0, 141 ) -LV1_CALL(start_lpm, 1, 0, 142 ) -LV1_CALL(stop_lpm, 1, 1, 143 ) -LV1_CALL(copy_lpm_trace_buffer, 3, 1, 144 ) -LV1_CALL(add_lpm_event_bookmark, 5, 0, 145 ) -LV1_CALL(delete_lpm_event_bookmark, 3, 0, 146 ) -LV1_CALL(set_lpm_interrupt_mask, 3, 1, 147 ) -LV1_CALL(get_lpm_interrupt_status, 1, 1, 148 ) -LV1_CALL(set_lpm_general_control, 5, 2, 149 ) -LV1_CALL(set_lpm_interval, 3, 1, 150 ) -LV1_CALL(set_lpm_trigger_control, 3, 1, 151 ) -LV1_CALL(set_lpm_counter_control, 4, 1, 152 ) -LV1_CALL(set_lpm_group_control, 3, 1, 153 ) -LV1_CALL(set_lpm_debug_bus_control, 3, 1, 154 ) -LV1_CALL(set_lpm_counter, 5, 2, 155 ) -LV1_CALL(set_lpm_signal, 7, 0, 156 ) -LV1_CALL(set_lpm_spr_trigger, 2, 0, 157 ) - -#endif diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h deleted file mode 100644 index 893aafd..0000000 --- a/include/asm-powerpc/machdep.h +++ /dev/null @@ -1,365 +0,0 @@ -#ifndef _ASM_POWERPC_MACHDEP_H -#define _ASM_POWERPC_MACHDEP_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include - -#include - -/* We export this macro for external modules like Alsa to know if - * ppc_md.feature_call is implemented or not - */ -#define CONFIG_PPC_HAS_FEATURE_CALLS - -struct pt_regs; -struct pci_bus; -struct device_node; -struct iommu_table; -struct rtc_time; -struct file; -struct pci_controller; -#ifdef CONFIG_KEXEC -struct kimage; -#endif - -#ifdef CONFIG_SMP -struct smp_ops_t { - void (*message_pass)(int target, int msg); - int (*probe)(void); - void (*kick_cpu)(int nr); - void (*setup_cpu)(int nr); - void (*take_timebase)(void); - void (*give_timebase)(void); - int (*cpu_enable)(unsigned int nr); - int (*cpu_disable)(void); - void (*cpu_die)(unsigned int nr); - int (*cpu_bootable)(unsigned int nr); -}; -#endif - -struct machdep_calls { - char *name; -#ifdef CONFIG_PPC64 - void (*hpte_invalidate)(unsigned long slot, - unsigned long va, - int psize, int ssize, - int local); - long (*hpte_updatepp)(unsigned long slot, - unsigned long newpp, - unsigned long va, - int psize, int ssize, - int local); - void (*hpte_updateboltedpp)(unsigned long newpp, - unsigned long ea, - int psize, int ssize); - long (*hpte_insert)(unsigned long hpte_group, - unsigned long va, - unsigned long prpn, - unsigned long rflags, - unsigned long vflags, - int psize, int ssize); - long (*hpte_remove)(unsigned long hpte_group); - void (*hpte_removebolted)(unsigned long ea, - int psize, int ssize); - void (*flush_hash_range)(unsigned long number, int local); - - /* special for kexec, to be called in real mode, linar mapping is - * destroyed as well */ - void (*hpte_clear_all)(void); - - int (*tce_build)(struct iommu_table *tbl, - long index, - long npages, - unsigned long uaddr, - enum dma_data_direction direction, - struct dma_attrs *attrs); - void (*tce_free)(struct iommu_table *tbl, - long index, - long npages); - unsigned long (*tce_get)(struct iommu_table *tbl, - long index); - void (*tce_flush)(struct iommu_table *tbl); - void (*pci_dma_dev_setup)(struct pci_dev *dev); - void (*pci_dma_bus_setup)(struct pci_bus *bus); - - void __iomem * (*ioremap)(phys_addr_t addr, unsigned long size, - unsigned long flags); - void (*iounmap)(volatile void __iomem *token); - -#ifdef CONFIG_PM - void (*iommu_save)(void); - void (*iommu_restore)(void); -#endif -#endif /* CONFIG_PPC64 */ - - int (*probe)(void); - void (*setup_arch)(void); /* Optional, may be NULL */ - void (*init_early)(void); - /* Optional, may be NULL. */ - void (*show_cpuinfo)(struct seq_file *m); - void (*show_percpuinfo)(struct seq_file *m, int i); - - void (*init_IRQ)(void); - unsigned int (*get_irq)(void); -#ifdef CONFIG_KEXEC - void (*kexec_cpu_down)(int crash_shutdown, int secondary); -#endif - - /* PCI stuff */ - /* Called after scanning the bus, before allocating resources */ - void (*pcibios_fixup)(void); - int (*pci_probe_mode)(struct pci_bus *); - void (*pci_irq_fixup)(struct pci_dev *dev); - - /* To setup PHBs when using automatic OF platform driver for PCI */ - int (*pci_setup_phb)(struct pci_controller *host); - -#ifdef CONFIG_PCI_MSI - int (*msi_check_device)(struct pci_dev* dev, - int nvec, int type); - int (*setup_msi_irqs)(struct pci_dev *dev, - int nvec, int type); - void (*teardown_msi_irqs)(struct pci_dev *dev); -#endif - - void (*restart)(char *cmd); - void (*power_off)(void); - void (*halt)(void); - void (*panic)(char *str); - void (*cpu_die)(void); - - long (*time_init)(void); /* Optional, may be NULL */ - - int (*set_rtc_time)(struct rtc_time *); - void (*get_rtc_time)(struct rtc_time *); - unsigned long (*get_boot_time)(void); - unsigned char (*rtc_read_val)(int addr); - void (*rtc_write_val)(int addr, unsigned char val); - - void (*calibrate_decr)(void); - - void (*progress)(char *, unsigned short); - - /* Interface for platform error logging */ - void (*log_error)(char *buf, unsigned int err_type, int fatal); - - unsigned char (*nvram_read_val)(int addr); - void (*nvram_write_val)(int addr, unsigned char val); - ssize_t (*nvram_write)(char *buf, size_t count, loff_t *index); - ssize_t (*nvram_read)(char *buf, size_t count, loff_t *index); - ssize_t (*nvram_size)(void); - void (*nvram_sync)(void); - - /* Exception handlers */ - int (*system_reset_exception)(struct pt_regs *regs); - int (*machine_check_exception)(struct pt_regs *regs); - - /* Motherboard/chipset features. This is a kind of general purpose - * hook used to control some machine specific features (like reset - * lines, chip power control, etc...). - */ - long (*feature_call)(unsigned int feature, ...); - - /* Get legacy PCI/IDE interrupt mapping */ - int (*pci_get_legacy_ide_irq)(struct pci_dev *dev, int channel); - - /* Get access protection for /dev/mem */ - pgprot_t (*phys_mem_access_prot)(struct file *file, - unsigned long pfn, - unsigned long size, - pgprot_t vma_prot); - - /* Idle loop for this platform, leave empty for default idle loop */ - void (*idle_loop)(void); - - /* - * Function for waiting for work with reduced power in idle loop; - * called with interrupts disabled. - */ - void (*power_save)(void); - - /* Function to enable performance monitor counters for this - platform, called once per cpu. */ - void (*enable_pmcs)(void); - - /* Set DABR for this platform, leave empty for default implemenation */ - int (*set_dabr)(unsigned long dabr); - -#ifdef CONFIG_PPC32 /* XXX for now */ - /* A general init function, called by ppc_init in init/main.c. - May be NULL. */ - void (*init)(void); - - void (*kgdb_map_scc)(void); - - /* - * optional PCI "hooks" - */ - /* Called in indirect_* to avoid touching devices */ - int (*pci_exclude_device)(struct pci_controller *, unsigned char, unsigned char); - - /* Called at then very end of pcibios_init() */ - void (*pcibios_after_init)(void); - -#endif /* CONFIG_PPC32 */ - - /* Called after PPC generic resource fixup to perform - machine specific fixups */ - void (*pcibios_fixup_resources)(struct pci_dev *); - - /* Called for each PCI bus in the system when it's probed */ - void (*pcibios_fixup_bus)(struct pci_bus *); - - /* Called when pci_enable_device() is called. Returns 0 to - * allow assignment/enabling of the device. */ - int (*pcibios_enable_device_hook)(struct pci_dev *); - - /* Called to shutdown machine specific hardware not already controlled - * by other drivers. - */ - void (*machine_shutdown)(void); - -#ifdef CONFIG_KEXEC - /* Called to do the minimal shutdown needed to run a kexec'd kernel - * to run successfully. - * XXX Should we move this one out of kexec scope? - */ - void (*machine_crash_shutdown)(struct pt_regs *regs); - - /* Called to do what every setup is needed on image and the - * reboot code buffer. Returns 0 on success. - * Provide your own (maybe dummy) implementation if your platform - * claims to support kexec. - */ - int (*machine_kexec_prepare)(struct kimage *image); - - /* Called to handle any machine specific cleanup on image */ - void (*machine_kexec_cleanup)(struct kimage *image); - - /* Called to perform the _real_ kexec. - * Do NOT allocate memory or fail here. We are past the point of - * no return. - */ - void (*machine_kexec)(struct kimage *image); -#endif /* CONFIG_KEXEC */ - -#ifdef CONFIG_SUSPEND - /* These are called to disable and enable, respectively, IRQs when - * entering a suspend state. If NULL, then the generic versions - * will be called. The generic versions disable/enable the - * decrementer along with interrupts. - */ - void (*suspend_disable_irqs)(void); - void (*suspend_enable_irqs)(void); -#endif -}; - -extern void e500_idle(void); -extern void power4_idle(void); -extern void power4_cpu_offline_powersave(void); -extern void ppc6xx_idle(void); - -/* - * ppc_md contains a copy of the machine description structure for the - * current platform. machine_id contains the initial address where the - * description was found during boot. - */ -extern struct machdep_calls ppc_md; -extern struct machdep_calls *machine_id; - -#define __machine_desc __attribute__ ((__section__ (".machine.desc"))) - -#define define_machine(name) \ - extern struct machdep_calls mach_##name; \ - EXPORT_SYMBOL(mach_##name); \ - struct machdep_calls mach_##name __machine_desc = - -#define machine_is(name) \ - ({ \ - extern struct machdep_calls mach_##name \ - __attribute__((weak)); \ - machine_id == &mach_##name; \ - }) - -extern void probe_machine(void); - -extern char cmd_line[COMMAND_LINE_SIZE]; - -#ifdef CONFIG_PPC_PMAC -/* - * Power macintoshes have either a CUDA, PMU or SMU controlling - * system reset, power, NVRAM, RTC. - */ -typedef enum sys_ctrler_kind { - SYS_CTRLER_UNKNOWN = 0, - SYS_CTRLER_CUDA = 1, - SYS_CTRLER_PMU = 2, - SYS_CTRLER_SMU = 3, -} sys_ctrler_t; -extern sys_ctrler_t sys_ctrler; - -#endif /* CONFIG_PPC_PMAC */ - -extern void setup_pci_ptrs(void); - -#ifdef CONFIG_SMP -/* Poor default implementations */ -extern void __devinit smp_generic_give_timebase(void); -extern void __devinit smp_generic_take_timebase(void); -#endif /* CONFIG_SMP */ - - -/* Functions to produce codes on the leds. - * The SRC code should be unique for the message category and should - * be limited to the lower 24 bits (the upper 8 are set by these funcs), - * and (for boot & dump) should be sorted numerically in the order - * the events occur. - */ -/* Print a boot progress message. */ -void ppc64_boot_msg(unsigned int src, const char *msg); -/* Print a termination message (print only -- does not stop the kernel) */ -void ppc64_terminate_msg(unsigned int src, const char *msg); - -static inline void log_error(char *buf, unsigned int err_type, int fatal) -{ - if (ppc_md.log_error) - ppc_md.log_error(buf, err_type, fatal); -} - -#define __define_machine_initcall(mach,level,fn,id) \ - static int __init __machine_initcall_##mach##_##fn(void) { \ - if (machine_is(mach)) return fn(); \ - return 0; \ - } \ - __define_initcall(level,__machine_initcall_##mach##_##fn,id); - -#define machine_core_initcall(mach,fn) __define_machine_initcall(mach,"1",fn,1) -#define machine_core_initcall_sync(mach,fn) __define_machine_initcall(mach,"1s",fn,1s) -#define machine_postcore_initcall(mach,fn) __define_machine_initcall(mach,"2",fn,2) -#define machine_postcore_initcall_sync(mach,fn) __define_machine_initcall(mach,"2s",fn,2s) -#define machine_arch_initcall(mach,fn) __define_machine_initcall(mach,"3",fn,3) -#define machine_arch_initcall_sync(mach,fn) __define_machine_initcall(mach,"3s",fn,3s) -#define machine_subsys_initcall(mach,fn) __define_machine_initcall(mach,"4",fn,4) -#define machine_subsys_initcall_sync(mach,fn) __define_machine_initcall(mach,"4s",fn,4s) -#define machine_fs_initcall(mach,fn) __define_machine_initcall(mach,"5",fn,5) -#define machine_fs_initcall_sync(mach,fn) __define_machine_initcall(mach,"5s",fn,5s) -#define machine_rootfs_initcall(mach,fn) __define_machine_initcall(mach,"rootfs",fn,rootfs) -#define machine_device_initcall(mach,fn) __define_machine_initcall(mach,"6",fn,6) -#define machine_device_initcall_sync(mach,fn) __define_machine_initcall(mach,"6s",fn,6s) -#define machine_late_initcall(mach,fn) __define_machine_initcall(mach,"7",fn,7) -#define machine_late_initcall_sync(mach,fn) __define_machine_initcall(mach,"7s",fn,7s) - -void generic_suspend_disable_irqs(void); -void generic_suspend_enable_irqs(void); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MACHDEP_H */ diff --git a/include/asm-powerpc/macio.h b/include/asm-powerpc/macio.h deleted file mode 100644 index 079c06e..0000000 --- a/include/asm-powerpc/macio.h +++ /dev/null @@ -1,142 +0,0 @@ -#ifndef __MACIO_ASIC_H__ -#define __MACIO_ASIC_H__ -#ifdef __KERNEL__ - -#include - -extern struct bus_type macio_bus_type; - -/* MacIO device driver is defined later */ -struct macio_driver; -struct macio_chip; - -#define MACIO_DEV_COUNT_RESOURCES 8 -#define MACIO_DEV_COUNT_IRQS 8 - -/* - * the macio_bus structure is used to describe a "virtual" bus - * within a MacIO ASIC. It's typically provided by a macio_pci_asic - * PCI device, but could be provided differently as well (nubus - * machines using a fake OF tree). - * - * The pdev field can be NULL on non-PCI machines - */ -struct macio_bus -{ - struct macio_chip *chip; /* macio_chip (private use) */ - int index; /* macio chip index in system */ -#ifdef CONFIG_PCI - struct pci_dev *pdev; /* PCI device hosting this bus */ -#endif -}; - -/* - * the macio_dev structure is used to describe a device - * within an Apple MacIO ASIC. - */ -struct macio_dev -{ - struct macio_bus *bus; /* macio bus this device is on */ - struct macio_dev *media_bay; /* Device is part of a media bay */ - struct of_device ofdev; - int n_resources; - struct resource resource[MACIO_DEV_COUNT_RESOURCES]; - int n_interrupts; - struct resource interrupt[MACIO_DEV_COUNT_IRQS]; -}; -#define to_macio_device(d) container_of(d, struct macio_dev, ofdev.dev) -#define of_to_macio_device(d) container_of(d, struct macio_dev, ofdev) - -extern struct macio_dev *macio_dev_get(struct macio_dev *dev); -extern void macio_dev_put(struct macio_dev *dev); - -/* - * Accessors to resources & interrupts and other device - * fields - */ - -static inline int macio_resource_count(struct macio_dev *dev) -{ - return dev->n_resources; -} - -static inline unsigned long macio_resource_start(struct macio_dev *dev, int resource_no) -{ - return dev->resource[resource_no].start; -} - -static inline unsigned long macio_resource_end(struct macio_dev *dev, int resource_no) -{ - return dev->resource[resource_no].end; -} - -static inline unsigned long macio_resource_len(struct macio_dev *dev, int resource_no) -{ - struct resource *res = &dev->resource[resource_no]; - if (res->start == 0 || res->end == 0 || res->end < res->start) - return 0; - return res->end - res->start + 1; -} - -extern int macio_request_resource(struct macio_dev *dev, int resource_no, const char *name); -extern void macio_release_resource(struct macio_dev *dev, int resource_no); -extern int macio_request_resources(struct macio_dev *dev, const char *name); -extern void macio_release_resources(struct macio_dev *dev); - -static inline int macio_irq_count(struct macio_dev *dev) -{ - return dev->n_interrupts; -} - -static inline int macio_irq(struct macio_dev *dev, int irq_no) -{ - return dev->interrupt[irq_no].start; -} - -static inline void macio_set_drvdata(struct macio_dev *dev, void *data) -{ - dev_set_drvdata(&dev->ofdev.dev, data); -} - -static inline void* macio_get_drvdata(struct macio_dev *dev) -{ - return dev_get_drvdata(&dev->ofdev.dev); -} - -static inline struct device_node *macio_get_of_node(struct macio_dev *mdev) -{ - return mdev->ofdev.node; -} - -#ifdef CONFIG_PCI -static inline struct pci_dev *macio_get_pci_dev(struct macio_dev *mdev) -{ - return mdev->bus->pdev; -} -#endif - -/* - * A driver for a mac-io chip based device - */ -struct macio_driver -{ - char *name; - struct of_device_id *match_table; - struct module *owner; - - int (*probe)(struct macio_dev* dev, const struct of_device_id *match); - int (*remove)(struct macio_dev* dev); - - int (*suspend)(struct macio_dev* dev, pm_message_t state); - int (*resume)(struct macio_dev* dev); - int (*shutdown)(struct macio_dev* dev); - - struct device_driver driver; -}; -#define to_macio_driver(drv) container_of(drv,struct macio_driver, driver) - -extern int macio_register_driver(struct macio_driver *); -extern void macio_unregister_driver(struct macio_driver *); - -#endif /* __KERNEL__ */ -#endif /* __MACIO_ASIC_H__ */ diff --git a/include/asm-powerpc/mc146818rtc.h b/include/asm-powerpc/mc146818rtc.h deleted file mode 100644 index f2741c8..0000000 --- a/include/asm-powerpc/mc146818rtc.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _ASM_POWERPC_MC146818RTC_H -#define _ASM_POWERPC_MC146818RTC_H - -/* - * Machine dependent access functions for RTC registers. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __KERNEL__ - -#include - -#ifndef RTC_PORT -#define RTC_PORT(x) (0x70 + (x)) -#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ -#endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MC146818RTC_H */ diff --git a/include/asm-powerpc/mediabay.h b/include/asm-powerpc/mediabay.h deleted file mode 100644 index b2efb33..0000000 --- a/include/asm-powerpc/mediabay.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * mediabay.h: definitions for using the media bay - * on PowerBook 3400 and similar computers. - * - * Copyright (C) 1997 Paul Mackerras. - */ -#ifndef _PPC_MEDIABAY_H -#define _PPC_MEDIABAY_H - -#ifdef __KERNEL__ - -#define MB_FD 0 /* media bay contains floppy drive (automatic eject ?) */ -#define MB_FD1 1 /* media bay contains floppy drive (manual eject ?) */ -#define MB_SOUND 2 /* sound device ? */ -#define MB_CD 3 /* media bay contains ATA drive such as CD or ZIP */ -#define MB_PCI 5 /* media bay contains a PCI device */ -#define MB_POWER 6 /* media bay contains a Power device (???) */ -#define MB_NO 7 /* media bay contains nothing */ - -/* Number of bays in the machine or 0 */ -extern int media_bay_count; - -#ifdef CONFIG_BLK_DEV_IDE_PMAC -#include - -int check_media_bay_by_base(unsigned long base, int what); -/* called by IDE PMAC host driver to register IDE controller for media bay */ -int media_bay_set_ide_infos(struct device_node *which_bay, unsigned long base, - int irq, ide_hwif_t *hwif); - -int check_media_bay(struct device_node *which_bay, int what); - -#else - -static inline int check_media_bay(struct device_node *which_bay, int what) -{ - return -ENODEV; -} - -#endif - -#endif /* __KERNEL__ */ -#endif /* _PPC_MEDIABAY_H */ diff --git a/include/asm-powerpc/mman.h b/include/asm-powerpc/mman.h deleted file mode 100644 index 9209f75..0000000 --- a/include/asm-powerpc/mman.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef _ASM_POWERPC_MMAN_H -#define _ASM_POWERPC_MMAN_H - -#include - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define PROT_SAO 0x10 /* Strong Access Ordering */ - -#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */ -#define MAP_NORESERVE 0x40 /* don't reserve swap pages */ -#define MAP_LOCKED 0x80 - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ - -#define MCL_CURRENT 0x2000 /* lock all currently mapped pages */ -#define MCL_FUTURE 0x4000 /* lock all additions to address space */ - -#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#ifdef __KERNEL__ -#ifdef CONFIG_PPC64 - -#include -#include - -/* - * This file is included by linux/mman.h, so we can't use cacl_vm_prot_bits() - * here. How important is the optimization? - */ -static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot) -{ - return (prot & PROT_SAO) ? VM_SAO : 0; -} -#define arch_calc_vm_prot_bits(prot) arch_calc_vm_prot_bits(prot) - -static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags) -{ - return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : 0; -} -#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags) - -static inline int arch_validate_prot(unsigned long prot) -{ - if (prot & ~(PROT_READ | PROT_WRITE | PROT_EXEC | PROT_SEM | PROT_SAO)) - return 0; - if ((prot & PROT_SAO) && !cpu_has_feature(CPU_FTR_SAO)) - return 0; - return 1; -} -#define arch_validate_prot(prot) arch_validate_prot(prot) - -#endif /* CONFIG_PPC64 */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MMAN_H */ diff --git a/include/asm-powerpc/mmu-40x.h b/include/asm-powerpc/mmu-40x.h deleted file mode 100644 index 3d10867..0000000 --- a/include/asm-powerpc/mmu-40x.h +++ /dev/null @@ -1,63 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_40X_H_ -#define _ASM_POWERPC_MMU_40X_H_ - -/* - * PPC40x support - */ - -#define PPC40X_TLB_SIZE 64 - -/* - * TLB entries are defined by a "high" tag portion and a "low" data - * portion. On all architectures, the data portion is 32-bits. - * - * TLB entries are managed entirely under software control by reading, - * writing, and searchoing using the 4xx-specific tlbre, tlbwr, and tlbsx - * instructions. - */ - -#define TLB_LO 1 -#define TLB_HI 0 - -#define TLB_DATA TLB_LO -#define TLB_TAG TLB_HI - -/* Tag portion */ - -#define TLB_EPN_MASK 0xFFFFFC00 /* Effective Page Number */ -#define TLB_PAGESZ_MASK 0x00000380 -#define TLB_PAGESZ(x) (((x) & 0x7) << 7) -#define PAGESZ_1K 0 -#define PAGESZ_4K 1 -#define PAGESZ_16K 2 -#define PAGESZ_64K 3 -#define PAGESZ_256K 4 -#define PAGESZ_1M 5 -#define PAGESZ_4M 6 -#define PAGESZ_16M 7 -#define TLB_VALID 0x00000040 /* Entry is valid */ - -/* Data portion */ - -#define TLB_RPN_MASK 0xFFFFFC00 /* Real Page Number */ -#define TLB_PERM_MASK 0x00000300 -#define TLB_EX 0x00000200 /* Instruction execution allowed */ -#define TLB_WR 0x00000100 /* Writes permitted */ -#define TLB_ZSEL_MASK 0x000000F0 -#define TLB_ZSEL(x) (((x) & 0xF) << 4) -#define TLB_ATTR_MASK 0x0000000F -#define TLB_W 0x00000008 /* Caching is write-through */ -#define TLB_I 0x00000004 /* Caching is inhibited */ -#define TLB_M 0x00000002 /* Memory is coherent */ -#define TLB_G 0x00000001 /* Memory is guarded from prefetch */ - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long id; - unsigned long vdso_base; -} mm_context_t; - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_MMU_40X_H_ */ diff --git a/include/asm-powerpc/mmu-44x.h b/include/asm-powerpc/mmu-44x.h deleted file mode 100644 index a825524..0000000 --- a/include/asm-powerpc/mmu-44x.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_44X_H_ -#define _ASM_POWERPC_MMU_44X_H_ -/* - * PPC440 support - */ - -#define PPC44x_MMUCR_TID 0x000000ff -#define PPC44x_MMUCR_STS 0x00010000 - -#define PPC44x_TLB_PAGEID 0 -#define PPC44x_TLB_XLAT 1 -#define PPC44x_TLB_ATTRIB 2 - -/* Page identification fields */ -#define PPC44x_TLB_EPN_MASK 0xfffffc00 /* Effective Page Number */ -#define PPC44x_TLB_VALID 0x00000200 /* Valid flag */ -#define PPC44x_TLB_TS 0x00000100 /* Translation address space */ -#define PPC44x_TLB_1K 0x00000000 /* Page sizes */ -#define PPC44x_TLB_4K 0x00000010 -#define PPC44x_TLB_16K 0x00000020 -#define PPC44x_TLB_64K 0x00000030 -#define PPC44x_TLB_256K 0x00000040 -#define PPC44x_TLB_1M 0x00000050 -#define PPC44x_TLB_16M 0x00000070 -#define PPC44x_TLB_256M 0x00000090 - -/* Translation fields */ -#define PPC44x_TLB_RPN_MASK 0xfffffc00 /* Real Page Number */ -#define PPC44x_TLB_ERPN_MASK 0x0000000f - -/* Storage attribute and access control fields */ -#define PPC44x_TLB_ATTR_MASK 0x0000ff80 -#define PPC44x_TLB_U0 0x00008000 /* User 0 */ -#define PPC44x_TLB_U1 0x00004000 /* User 1 */ -#define PPC44x_TLB_U2 0x00002000 /* User 2 */ -#define PPC44x_TLB_U3 0x00001000 /* User 3 */ -#define PPC44x_TLB_W 0x00000800 /* Caching is write-through */ -#define PPC44x_TLB_I 0x00000400 /* Caching is inhibited */ -#define PPC44x_TLB_M 0x00000200 /* Memory is coherent */ -#define PPC44x_TLB_G 0x00000100 /* Memory is guarded */ -#define PPC44x_TLB_E 0x00000080 /* Memory is guarded */ - -#define PPC44x_TLB_PERM_MASK 0x0000003f -#define PPC44x_TLB_UX 0x00000020 /* User execution */ -#define PPC44x_TLB_UW 0x00000010 /* User write */ -#define PPC44x_TLB_UR 0x00000008 /* User read */ -#define PPC44x_TLB_SX 0x00000004 /* Super execution */ -#define PPC44x_TLB_SW 0x00000002 /* Super write */ -#define PPC44x_TLB_SR 0x00000001 /* Super read */ - -/* Number of TLB entries */ -#define PPC44x_TLB_SIZE 64 - -#ifndef __ASSEMBLY__ - -extern unsigned int tlb_44x_hwater; - -typedef struct { - unsigned long id; - unsigned long vdso_base; -} mm_context_t; - -#endif /* !__ASSEMBLY__ */ - -#ifndef CONFIG_PPC_EARLY_DEBUG_44x -#define PPC44x_EARLY_TLBS 1 -#else -#define PPC44x_EARLY_TLBS 2 -#define PPC44x_EARLY_DEBUG_VIRTADDR (ASM_CONST(0xf0000000) \ - | (ASM_CONST(CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW) & 0xffff)) -#endif - -/* Size of the TLBs used for pinning in lowmem */ -#define PPC_PIN_SIZE (1 << 28) /* 256M */ - -#endif /* _ASM_POWERPC_MMU_44X_H_ */ diff --git a/include/asm-powerpc/mmu-8xx.h b/include/asm-powerpc/mmu-8xx.h deleted file mode 100644 index 9db877e..0000000 --- a/include/asm-powerpc/mmu-8xx.h +++ /dev/null @@ -1,145 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_8XX_H_ -#define _ASM_POWERPC_MMU_8XX_H_ -/* - * PPC8xx support - */ - -/* Control/status registers for the MPC8xx. - * A write operation to these registers causes serialized access. - * During software tablewalk, the registers used perform mask/shift-add - * operations when written/read. A TLB entry is created when the Mx_RPN - * is written, and the contents of several registers are used to - * create the entry. - */ -#define SPRN_MI_CTR 784 /* Instruction TLB control register */ -#define MI_GPM 0x80000000 /* Set domain manager mode */ -#define MI_PPM 0x40000000 /* Set subpage protection */ -#define MI_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ -#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */ -#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ -#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */ -#define MI_RESETVAL 0x00000000 /* Value of register at reset */ - -/* These are the Ks and Kp from the PowerPC books. For proper operation, - * Ks = 0, Kp = 1. - */ -#define SPRN_MI_AP 786 -#define MI_Ks 0x80000000 /* Should not be set */ -#define MI_Kp 0x40000000 /* Should always be set */ - -/* The effective page number register. When read, contains the information - * about the last instruction TLB miss. When MI_RPN is written, bits in - * this register are used to create the TLB entry. - */ -#define SPRN_MI_EPN 787 -#define MI_EPNMASK 0xfffff000 /* Effective page number for entry */ -#define MI_EVALID 0x00000200 /* Entry is valid */ -#define MI_ASIDMASK 0x0000000f /* ASID match value */ - /* Reset value is undefined */ - -/* A "level 1" or "segment" or whatever you want to call it register. - * For the instruction TLB, it contains bits that get loaded into the - * TLB entry when the MI_RPN is written. - */ -#define SPRN_MI_TWC 789 -#define MI_APG 0x000001e0 /* Access protection group (0) */ -#define MI_GUARDED 0x00000010 /* Guarded storage */ -#define MI_PSMASK 0x0000000c /* Mask of page size bits */ -#define MI_PS8MEG 0x0000000c /* 8M page size */ -#define MI_PS512K 0x00000004 /* 512K page size */ -#define MI_PS4K_16K 0x00000000 /* 4K or 16K page size */ -#define MI_SVALID 0x00000001 /* Segment entry is valid */ - /* Reset value is undefined */ - -/* Real page number. Defined by the pte. Writing this register - * causes a TLB entry to be created for the instruction TLB, using - * additional information from the MI_EPN, and MI_TWC registers. - */ -#define SPRN_MI_RPN 790 - -/* Define an RPN value for mapping kernel memory to large virtual - * pages for boot initialization. This has real page number of 0, - * large page size, shared page, cache enabled, and valid. - * Also mark all subpages valid and write access. - */ -#define MI_BOOTINIT 0x000001fd - -#define SPRN_MD_CTR 792 /* Data TLB control register */ -#define MD_GPM 0x80000000 /* Set domain manager mode */ -#define MD_PPM 0x40000000 /* Set subpage protection */ -#define MD_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ -#define MD_WTDEF 0x10000000 /* Set writethrough when MMU dis */ -#define MD_RSV4I 0x08000000 /* Reserve 4 TLB entries */ -#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */ -#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ -#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */ -#define MD_RESETVAL 0x04000000 /* Value of register at reset */ - -#define SPRN_M_CASID 793 /* Address space ID (context) to match */ -#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */ - - -/* These are the Ks and Kp from the PowerPC books. For proper operation, - * Ks = 0, Kp = 1. - */ -#define SPRN_MD_AP 794 -#define MD_Ks 0x80000000 /* Should not be set */ -#define MD_Kp 0x40000000 /* Should always be set */ - -/* The effective page number register. When read, contains the information - * about the last instruction TLB miss. When MD_RPN is written, bits in - * this register are used to create the TLB entry. - */ -#define SPRN_MD_EPN 795 -#define MD_EPNMASK 0xfffff000 /* Effective page number for entry */ -#define MD_EVALID 0x00000200 /* Entry is valid */ -#define MD_ASIDMASK 0x0000000f /* ASID match value */ - /* Reset value is undefined */ - -/* The pointer to the base address of the first level page table. - * During a software tablewalk, reading this register provides the address - * of the entry associated with MD_EPN. - */ -#define SPRN_M_TWB 796 -#define M_L1TB 0xfffff000 /* Level 1 table base address */ -#define M_L1INDX 0x00000ffc /* Level 1 index, when read */ - /* Reset value is undefined */ - -/* A "level 1" or "segment" or whatever you want to call it register. - * For the data TLB, it contains bits that get loaded into the TLB entry - * when the MD_RPN is written. It is also provides the hardware assist - * for finding the PTE address during software tablewalk. - */ -#define SPRN_MD_TWC 797 -#define MD_L2TB 0xfffff000 /* Level 2 table base address */ -#define MD_L2INDX 0xfffffe00 /* Level 2 index (*pte), when read */ -#define MD_APG 0x000001e0 /* Access protection group (0) */ -#define MD_GUARDED 0x00000010 /* Guarded storage */ -#define MD_PSMASK 0x0000000c /* Mask of page size bits */ -#define MD_PS8MEG 0x0000000c /* 8M page size */ -#define MD_PS512K 0x00000004 /* 512K page size */ -#define MD_PS4K_16K 0x00000000 /* 4K or 16K page size */ -#define MD_WT 0x00000002 /* Use writethrough page attribute */ -#define MD_SVALID 0x00000001 /* Segment entry is valid */ - /* Reset value is undefined */ - - -/* Real page number. Defined by the pte. Writing this register - * causes a TLB entry to be created for the data TLB, using - * additional information from the MD_EPN, and MD_TWC registers. - */ -#define SPRN_MD_RPN 798 - -/* This is a temporary storage register that could be used to save - * a processor working register during a tablewalk. - */ -#define SPRN_M_TW 799 - -#ifndef __ASSEMBLY__ -typedef struct { - unsigned long id; - unsigned long vdso_base; -} mm_context_t; -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_MMU_8XX_H_ */ diff --git a/include/asm-powerpc/mmu-fsl-booke.h b/include/asm-powerpc/mmu-fsl-booke.h deleted file mode 100644 index 925d93c..0000000 --- a/include/asm-powerpc/mmu-fsl-booke.h +++ /dev/null @@ -1,82 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ -#define _ASM_POWERPC_MMU_FSL_BOOKE_H_ -/* - * Freescale Book-E MMU support - */ - -/* Book-E defined page sizes */ -#define BOOKE_PAGESZ_1K 0 -#define BOOKE_PAGESZ_4K 1 -#define BOOKE_PAGESZ_16K 2 -#define BOOKE_PAGESZ_64K 3 -#define BOOKE_PAGESZ_256K 4 -#define BOOKE_PAGESZ_1M 5 -#define BOOKE_PAGESZ_4M 6 -#define BOOKE_PAGESZ_16M 7 -#define BOOKE_PAGESZ_64M 8 -#define BOOKE_PAGESZ_256M 9 -#define BOOKE_PAGESZ_1GB 10 -#define BOOKE_PAGESZ_4GB 11 -#define BOOKE_PAGESZ_16GB 12 -#define BOOKE_PAGESZ_64GB 13 -#define BOOKE_PAGESZ_256GB 14 -#define BOOKE_PAGESZ_1TB 15 - -#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) -#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) -#define MAS0_NV(x) ((x) & 0x00000FFF) - -#define MAS1_VALID 0x80000000 -#define MAS1_IPROT 0x40000000 -#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) -#define MAS1_TS 0x00001000 -#define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) - -#define MAS2_EPN 0xFFFFF000 -#define MAS2_X0 0x00000040 -#define MAS2_X1 0x00000020 -#define MAS2_W 0x00000010 -#define MAS2_I 0x00000008 -#define MAS2_M 0x00000004 -#define MAS2_G 0x00000002 -#define MAS2_E 0x00000001 - -#define MAS3_RPN 0xFFFFF000 -#define MAS3_U0 0x00000200 -#define MAS3_U1 0x00000100 -#define MAS3_U2 0x00000080 -#define MAS3_U3 0x00000040 -#define MAS3_UX 0x00000020 -#define MAS3_SX 0x00000010 -#define MAS3_UW 0x00000008 -#define MAS3_SW 0x00000004 -#define MAS3_UR 0x00000002 -#define MAS3_SR 0x00000001 - -#define MAS4_TLBSELD(x) MAS0_TLBSEL(x) -#define MAS4_TIDDSEL 0x000F0000 -#define MAS4_TSIZED(x) MAS1_TSIZE(x) -#define MAS4_X0D 0x00000040 -#define MAS4_X1D 0x00000020 -#define MAS4_WD 0x00000010 -#define MAS4_ID 0x00000008 -#define MAS4_MD 0x00000004 -#define MAS4_GD 0x00000002 -#define MAS4_ED 0x00000001 - -#define MAS6_SPID0 0x3FFF0000 -#define MAS6_SPID1 0x00007FFE -#define MAS6_SAS 0x00000001 -#define MAS6_SPID MAS6_SPID0 - -#define MAS7_RPN 0xFFFFFFFF - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long id; - unsigned long vdso_base; -} mm_context_t; -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h deleted file mode 100644 index 16b1a1e..0000000 --- a/include/asm-powerpc/mmu-hash32.h +++ /dev/null @@ -1,83 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_HASH32_H_ -#define _ASM_POWERPC_MMU_HASH32_H_ -/* - * 32-bit hash table MMU support - */ - -/* - * BATs - */ - -/* Block size masks */ -#define BL_128K 0x000 -#define BL_256K 0x001 -#define BL_512K 0x003 -#define BL_1M 0x007 -#define BL_2M 0x00F -#define BL_4M 0x01F -#define BL_8M 0x03F -#define BL_16M 0x07F -#define BL_32M 0x0FF -#define BL_64M 0x1FF -#define BL_128M 0x3FF -#define BL_256M 0x7FF - -/* BAT Access Protection */ -#define BPP_XX 0x00 /* No access */ -#define BPP_RX 0x01 /* Read only */ -#define BPP_RW 0x02 /* Read/write */ - -#ifndef __ASSEMBLY__ -/* Contort a phys_addr_t into the right format/bits for a BAT */ -#ifdef CONFIG_PHYS_64BIT -#define BAT_PHYS_ADDR(x) ((u32)((x & 0x00000000fffe0000ULL) | \ - ((x & 0x0000000e00000000ULL) >> 24) | \ - ((x & 0x0000000100000000ULL) >> 30))) -#else -#define BAT_PHYS_ADDR(x) (x) -#endif - -struct ppc_bat { - u32 batu; - u32 batl; -}; -#endif /* !__ASSEMBLY__ */ - -/* - * Hash table - */ - -/* Values for PP (assumes Ks=0, Kp=1) */ -#define PP_RWXX 0 /* Supervisor read/write, User none */ -#define PP_RWRX 1 /* Supervisor read/write, User read */ -#define PP_RWRW 2 /* Supervisor read/write, User read/write */ -#define PP_RXRX 3 /* Supervisor read, User read */ - -#ifndef __ASSEMBLY__ - -/* Hardware Page Table Entry */ -struct hash_pte { - unsigned long v:1; /* Entry is valid */ - unsigned long vsid:24; /* Virtual segment identifier */ - unsigned long h:1; /* Hash algorithm indicator */ - unsigned long api:6; /* Abbreviated page index */ - unsigned long rpn:20; /* Real (physical) page number */ - unsigned long :3; /* Unused */ - unsigned long r:1; /* Referenced */ - unsigned long c:1; /* Changed */ - unsigned long w:1; /* Write-thru cache mode */ - unsigned long i:1; /* Cache inhibited */ - unsigned long m:1; /* Memory coherence */ - unsigned long g:1; /* Guarded */ - unsigned long :1; /* Unused */ - unsigned long pp:2; /* Page protection */ -}; - -typedef struct { - unsigned long id; - unsigned long vdso_base; -} mm_context_t; - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_MMU_HASH32_H_ */ diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h deleted file mode 100644 index 19c7a94..0000000 --- a/include/asm-powerpc/mmu-hash64.h +++ /dev/null @@ -1,478 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_HASH64_H_ -#define _ASM_POWERPC_MMU_HASH64_H_ -/* - * PowerPC64 memory management structures - * - * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com> - * PPC64 rework. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include - -/* - * Segment table - */ - -#define STE_ESID_V 0x80 -#define STE_ESID_KS 0x20 -#define STE_ESID_KP 0x10 -#define STE_ESID_N 0x08 - -#define STE_VSID_SHIFT 12 - -/* Location of cpu0's segment table */ -#define STAB0_PAGE 0x6 -#define STAB0_OFFSET (STAB0_PAGE << 12) -#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START) - -#ifndef __ASSEMBLY__ -extern char initial_stab[]; -#endif /* ! __ASSEMBLY */ - -/* - * SLB - */ - -#define SLB_NUM_BOLTED 3 -#define SLB_CACHE_ENTRIES 8 - -/* Bits in the SLB ESID word */ -#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */ - -/* Bits in the SLB VSID word */ -#define SLB_VSID_SHIFT 12 -#define SLB_VSID_SHIFT_1T 24 -#define SLB_VSID_SSIZE_SHIFT 62 -#define SLB_VSID_B ASM_CONST(0xc000000000000000) -#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000) -#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000) -#define SLB_VSID_KS ASM_CONST(0x0000000000000800) -#define SLB_VSID_KP ASM_CONST(0x0000000000000400) -#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */ -#define SLB_VSID_L ASM_CONST(0x0000000000000100) -#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */ -#define SLB_VSID_LP ASM_CONST(0x0000000000000030) -#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000) -#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010) -#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020) -#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030) -#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP) - -#define SLB_VSID_KERNEL (SLB_VSID_KP) -#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C) - -#define SLBIE_C (0x08000000) -#define SLBIE_SSIZE_SHIFT 25 - -/* - * Hash table - */ - -#define HPTES_PER_GROUP 8 - -#define HPTE_V_SSIZE_SHIFT 62 -#define HPTE_V_AVPN_SHIFT 7 -#define HPTE_V_AVPN ASM_CONST(0x3fffffffffffff80) -#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT) -#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & 0xffffffffffffff80UL)) -#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010) -#define HPTE_V_LOCK ASM_CONST(0x0000000000000008) -#define HPTE_V_LARGE ASM_CONST(0x0000000000000004) -#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002) -#define HPTE_V_VALID ASM_CONST(0x0000000000000001) - -#define HPTE_R_PP0 ASM_CONST(0x8000000000000000) -#define HPTE_R_TS ASM_CONST(0x4000000000000000) -#define HPTE_R_RPN_SHIFT 12 -#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000) -#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff) -#define HPTE_R_PP ASM_CONST(0x0000000000000003) -#define HPTE_R_N ASM_CONST(0x0000000000000004) -#define HPTE_R_C ASM_CONST(0x0000000000000080) -#define HPTE_R_R ASM_CONST(0x0000000000000100) - -#define HPTE_V_1TB_SEG ASM_CONST(0x4000000000000000) -#define HPTE_V_VRMA_MASK ASM_CONST(0x4001ffffff000000) - -/* Values for PP (assumes Ks=0, Kp=1) */ -/* pp0 will always be 0 for linux */ -#define PP_RWXX 0 /* Supervisor read/write, User none */ -#define PP_RWRX 1 /* Supervisor read/write, User read */ -#define PP_RWRW 2 /* Supervisor read/write, User read/write */ -#define PP_RXRX 3 /* Supervisor read, User read */ - -#ifndef __ASSEMBLY__ - -struct hash_pte { - unsigned long v; - unsigned long r; -}; - -extern struct hash_pte *htab_address; -extern unsigned long htab_size_bytes; -extern unsigned long htab_hash_mask; - -/* - * Page size definition - * - * shift : is the "PAGE_SHIFT" value for that page size - * sllp : is a bit mask with the value of SLB L || LP to be or'ed - * directly to a slbmte "vsid" value - * penc : is the HPTE encoding mask for the "LP" field: - * - */ -struct mmu_psize_def -{ - unsigned int shift; /* number of bits */ - unsigned int penc; /* HPTE encoding */ - unsigned int tlbiel; /* tlbiel supported for that page size */ - unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */ - unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */ -}; - -#endif /* __ASSEMBLY__ */ - -/* - * The kernel use the constants below to index in the page sizes array. - * The use of fixed constants for this purpose is better for performances - * of the low level hash refill handlers. - * - * A non supported page size has a "shift" field set to 0 - * - * Any new page size being implemented can get a new entry in here. Whether - * the kernel will use it or not is a different matter though. The actual page - * size used by hugetlbfs is not defined here and may be made variable - */ - -#define MMU_PAGE_4K 0 /* 4K */ -#define MMU_PAGE_64K 1 /* 64K */ -#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */ -#define MMU_PAGE_1M 3 /* 1M */ -#define MMU_PAGE_16M 4 /* 16M */ -#define MMU_PAGE_16G 5 /* 16G */ -#define MMU_PAGE_COUNT 6 - -/* - * Segment sizes. - * These are the values used by hardware in the B field of - * SLB entries and the first dword of MMU hashtable entries. - * The B field is 2 bits; the values 2 and 3 are unused and reserved. - */ -#define MMU_SEGSIZE_256M 0 -#define MMU_SEGSIZE_1T 1 - - -#ifndef __ASSEMBLY__ - -/* - * The current system page and segment sizes - */ -extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; -extern int mmu_linear_psize; -extern int mmu_virtual_psize; -extern int mmu_vmalloc_psize; -extern int mmu_vmemmap_psize; -extern int mmu_io_psize; -extern int mmu_kernel_ssize; -extern int mmu_highuser_ssize; -extern u16 mmu_slb_size; -extern unsigned long tce_alloc_start, tce_alloc_end; - -/* - * If the processor supports 64k normal pages but not 64k cache - * inhibited pages, we have to be prepared to switch processes - * to use 4k pages when they create cache-inhibited mappings. - * If this is the case, mmu_ci_restrictions will be set to 1. - */ -extern int mmu_ci_restrictions; - -#ifdef CONFIG_HUGETLB_PAGE -/* - * The page size indexes of the huge pages for use by hugetlbfs - */ -extern unsigned int mmu_huge_psizes[MMU_PAGE_COUNT]; - -#endif /* CONFIG_HUGETLB_PAGE */ - -/* - * This function sets the AVPN and L fields of the HPTE appropriately - * for the page size - */ -static inline unsigned long hpte_encode_v(unsigned long va, int psize, - int ssize) -{ - unsigned long v; - v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm); - v <<= HPTE_V_AVPN_SHIFT; - if (psize != MMU_PAGE_4K) - v |= HPTE_V_LARGE; - v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT; - return v; -} - -/* - * This function sets the ARPN, and LP fields of the HPTE appropriately - * for the page size. We assume the pa is already "clean" that is properly - * aligned for the requested page size - */ -static inline unsigned long hpte_encode_r(unsigned long pa, int psize) -{ - unsigned long r; - - /* A 4K page needs no special encoding */ - if (psize == MMU_PAGE_4K) - return pa & HPTE_R_RPN; - else { - unsigned int penc = mmu_psize_defs[psize].penc; - unsigned int shift = mmu_psize_defs[psize].shift; - return (pa & ~((1ul << shift) - 1)) | (penc << 12); - } - return r; -} - -/* - * Build a VA given VSID, EA and segment size - */ -static inline unsigned long hpt_va(unsigned long ea, unsigned long vsid, - int ssize) -{ - if (ssize == MMU_SEGSIZE_256M) - return (vsid << 28) | (ea & 0xfffffffUL); - return (vsid << 40) | (ea & 0xffffffffffUL); -} - -/* - * This hashes a virtual address - */ - -static inline unsigned long hpt_hash(unsigned long va, unsigned int shift, - int ssize) -{ - unsigned long hash, vsid; - - if (ssize == MMU_SEGSIZE_256M) { - hash = (va >> 28) ^ ((va & 0x0fffffffUL) >> shift); - } else { - vsid = va >> 40; - hash = vsid ^ (vsid << 25) ^ ((va & 0xffffffffffUL) >> shift); - } - return hash & 0x7fffffffffUL; -} - -extern int __hash_page_4K(unsigned long ea, unsigned long access, - unsigned long vsid, pte_t *ptep, unsigned long trap, - unsigned int local, int ssize, int subpage_prot); -extern int __hash_page_64K(unsigned long ea, unsigned long access, - unsigned long vsid, pte_t *ptep, unsigned long trap, - unsigned int local, int ssize); -struct mm_struct; -extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); -extern int hash_huge_page(struct mm_struct *mm, unsigned long access, - unsigned long ea, unsigned long vsid, int local, - unsigned long trap); - -extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend, - unsigned long pstart, unsigned long mode, - int psize, int ssize); -extern void set_huge_psize(int psize); -extern void add_gpage(unsigned long addr, unsigned long page_size, - unsigned long number_of_pages); -extern void demote_segment_4k(struct mm_struct *mm, unsigned long addr); - -extern void htab_initialize(void); -extern void htab_initialize_secondary(void); -extern void hpte_init_native(void); -extern void hpte_init_lpar(void); -extern void hpte_init_iSeries(void); -extern void hpte_init_beat(void); -extern void hpte_init_beat_v3(void); - -extern void stabs_alloc(void); -extern void slb_initialize(void); -extern void slb_flush_and_rebolt(void); -extern void stab_initialize(unsigned long stab); - -extern void slb_vmalloc_update(void); -#endif /* __ASSEMBLY__ */ - -/* - * VSID allocation - * - * We first generate a 36-bit "proto-VSID". For kernel addresses this - * is equal to the ESID, for user addresses it is: - * (context << 15) | (esid & 0x7fff) - * - * The two forms are distinguishable because the top bit is 0 for user - * addresses, whereas the top two bits are 1 for kernel addresses. - * Proto-VSIDs with the top two bits equal to 0b10 are reserved for - * now. - * - * The proto-VSIDs are then scrambled into real VSIDs with the - * multiplicative hash: - * - * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS - * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7 - * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF - * - * This scramble is only well defined for proto-VSIDs below - * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are - * reserved. VSID_MULTIPLIER is prime, so in particular it is - * co-prime to VSID_MODULUS, making this a 1:1 scrambling function. - * Because the modulus is 2^n-1 we can compute it efficiently without - * a divide or extra multiply (see below). - * - * This scheme has several advantages over older methods: - * - * - We have VSIDs allocated for every kernel address - * (i.e. everything above 0xC000000000000000), except the very top - * segment, which simplifies several things. - * - * - We allow for 15 significant bits of ESID and 20 bits of - * context for user addresses. i.e. 8T (43 bits) of address space for - * up to 1M contexts (although the page table structure and context - * allocation will need changes to take advantage of this). - * - * - The scramble function gives robust scattering in the hash - * table (at least based on some initial results). The previous - * method was more susceptible to pathological cases giving excessive - * hash collisions. - */ -/* - * WARNING - If you change these you must make sure the asm - * implementations in slb_allocate (slb_low.S), do_stab_bolted - * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly. - * - * You'll also need to change the precomputed VSID values in head.S - * which are used by the iSeries firmware. - */ - -#define VSID_MULTIPLIER_256M ASM_CONST(200730139) /* 28-bit prime */ -#define VSID_BITS_256M 36 -#define VSID_MODULUS_256M ((1UL<= \ - * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \ - * the bit clear, r3 already has the answer we want, if it \ - * doesn't, the answer is the low 36 bits of r3+1. So in all \ - * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\ - addi rx,rt,1; \ - srdi rx,rx,VSID_BITS_##size; /* extract 2^VSID_BITS bit */ \ - add rt,rt,rx - - -#ifndef __ASSEMBLY__ - -typedef unsigned long mm_context_id_t; - -typedef struct { - mm_context_id_t id; - u16 user_psize; /* page size index */ - -#ifdef CONFIG_PPC_MM_SLICES - u64 low_slices_psize; /* SLB page size encodings */ - u64 high_slices_psize; /* 4 bits per slice for now */ -#else - u16 sllp; /* SLB page size encoding */ -#endif - unsigned long vdso_base; -} mm_context_t; - - -#if 0 -/* - * The code below is equivalent to this function for arguments - * < 2^VSID_BITS, which is all this should ever be called - * with. However gcc is not clever enough to compute the - * modulus (2^n-1) without a second multiply. - */ -#define vsid_scrample(protovsid, size) \ - ((((protovsid) * VSID_MULTIPLIER_##size) % VSID_MODULUS_##size)) - -#else /* 1 */ -#define vsid_scramble(protovsid, size) \ - ({ \ - unsigned long x; \ - x = (protovsid) * VSID_MULTIPLIER_##size; \ - x = (x >> VSID_BITS_##size) + (x & VSID_MODULUS_##size); \ - (x + ((x+1) >> VSID_BITS_##size)) & VSID_MODULUS_##size; \ - }) -#endif /* 1 */ - -/* This is only valid for addresses >= KERNELBASE */ -static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize) -{ - if (ssize == MMU_SEGSIZE_256M) - return vsid_scramble(ea >> SID_SHIFT, 256M); - return vsid_scramble(ea >> SID_SHIFT_1T, 1T); -} - -/* Returns the segment size indicator for a user address */ -static inline int user_segment_size(unsigned long addr) -{ - /* Use 1T segments if possible for addresses >= 1T */ - if (addr >= (1UL << SID_SHIFT_1T)) - return mmu_highuser_ssize; - return MMU_SEGSIZE_256M; -} - -/* This is only valid for user addresses (which are below 2^44) */ -static inline unsigned long get_vsid(unsigned long context, unsigned long ea, - int ssize) -{ - if (ssize == MMU_SEGSIZE_256M) - return vsid_scramble((context << USER_ESID_BITS) - | (ea >> SID_SHIFT), 256M); - return vsid_scramble((context << USER_ESID_BITS_1T) - | (ea >> SID_SHIFT_1T), 1T); -} - -/* - * This is only used on legacy iSeries in lparmap.c, - * hence the 256MB segment assumption. - */ -#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER_256M) % \ - VSID_MODULUS_256M) -#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea)) - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_MMU_HASH64_H_ */ diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h deleted file mode 100644 index 4c0e1b4..0000000 --- a/include/asm-powerpc/mmu.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _ASM_POWERPC_MMU_H_ -#define _ASM_POWERPC_MMU_H_ -#ifdef __KERNEL__ - -#ifdef CONFIG_PPC64 -/* 64-bit classic hash table MMU */ -# include -#elif defined(CONFIG_PPC_STD_MMU) -/* 32-bit classic hash table MMU */ -# include -#elif defined(CONFIG_40x) -/* 40x-style software loaded TLB */ -# include -#elif defined(CONFIG_44x) -/* 44x-style software loaded TLB */ -# include -#elif defined(CONFIG_FSL_BOOKE) -/* Freescale Book-E software loaded TLB */ -# include -#elif defined (CONFIG_PPC_8xx) -/* Motorola/Freescale 8xx software loaded TLB */ -# include -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MMU_H_ */ diff --git a/include/asm-powerpc/mmu_context.h b/include/asm-powerpc/mmu_context.h deleted file mode 100644 index 9102b8b..0000000 --- a/include/asm-powerpc/mmu_context.h +++ /dev/null @@ -1,280 +0,0 @@ -#ifndef __ASM_POWERPC_MMU_CONTEXT_H -#define __ASM_POWERPC_MMU_CONTEXT_H -#ifdef __KERNEL__ - -#include -#include -#include - -#ifndef CONFIG_PPC64 -#include -#include - -/* - * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs - * (virtual segment identifiers) for each context. Although the - * hardware supports 24-bit VSIDs, and thus >1 million contexts, - * we only use 32,768 of them. That is ample, since there can be - * at most around 30,000 tasks in the system anyway, and it means - * that we can use a bitmap to indicate which contexts are in use. - * Using a bitmap means that we entirely avoid all of the problems - * that we used to have when the context number overflowed, - * particularly on SMP systems. - * -- paulus. - */ - -/* - * This function defines the mapping from contexts to VSIDs (virtual - * segment IDs). We use a skew on both the context and the high 4 bits - * of the 32-bit virtual address (the "effective segment ID") in order - * to spread out the entries in the MMU hash table. Note, if this - * function is changed then arch/ppc/mm/hashtable.S will have to be - * changed to correspond. - */ -#define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \ - & 0xffffff) - -/* - The MPC8xx has only 16 contexts. We rotate through them on each - task switch. A better way would be to keep track of tasks that - own contexts, and implement an LRU usage. That way very active - tasks don't always have to pay the TLB reload overhead. The - kernel pages are mapped shared, so the kernel can run on behalf - of any task that makes a kernel entry. Shared does not mean they - are not protected, just that the ASID comparison is not performed. - -- Dan - - The IBM4xx has 256 contexts, so we can just rotate through these - as a way of "switching" contexts. If the TID of the TLB is zero, - the PID/TID comparison is disabled, so we can use a TID of zero - to represent all kernel pages as shared among all contexts. - -- Dan - */ - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -#ifdef CONFIG_8xx -#define NO_CONTEXT 16 -#define LAST_CONTEXT 15 -#define FIRST_CONTEXT 0 - -#elif defined(CONFIG_4xx) -#define NO_CONTEXT 256 -#define LAST_CONTEXT 255 -#define FIRST_CONTEXT 1 - -#elif defined(CONFIG_E200) || defined(CONFIG_E500) -#define NO_CONTEXT 256 -#define LAST_CONTEXT 255 -#define FIRST_CONTEXT 1 - -#else - -/* PPC 6xx, 7xx CPUs */ -#define NO_CONTEXT ((unsigned long) -1) -#define LAST_CONTEXT 32767 -#define FIRST_CONTEXT 1 -#endif - -/* - * Set the current MMU context. - * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by - * loading up the segment registers for the user part of the address space. - * - * Since the PGD is immediately available, it is much faster to simply - * pass this along as a second parameter, which is required for 8xx and - * can be used for debugging on all processors (if you happen to have - * an Abatron). - */ -extern void set_context(unsigned long contextid, pgd_t *pgd); - -/* - * Bitmap of contexts in use. - * The size of this bitmap is LAST_CONTEXT + 1 bits. - */ -extern unsigned long context_map[]; - -/* - * This caches the next context number that we expect to be free. - * Its use is an optimization only, we can't rely on this context - * number to be free, but it usually will be. - */ -extern unsigned long next_mmu_context; - -/* - * If we don't have sufficient contexts to give one to every task - * that could be in the system, we need to be able to steal contexts. - * These variables support that. - */ -#if LAST_CONTEXT < 30000 -#define FEW_CONTEXTS 1 -extern atomic_t nr_free_contexts; -extern struct mm_struct *context_mm[LAST_CONTEXT+1]; -extern void steal_context(void); -#endif - -/* - * Get a new mmu context for the address space described by `mm'. - */ -static inline void get_mmu_context(struct mm_struct *mm) -{ - unsigned long ctx; - - if (mm->context.id != NO_CONTEXT) - return; -#ifdef FEW_CONTEXTS - while (atomic_dec_if_positive(&nr_free_contexts) < 0) - steal_context(); -#endif - ctx = next_mmu_context; - while (test_and_set_bit(ctx, context_map)) { - ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx); - if (ctx > LAST_CONTEXT) - ctx = 0; - } - next_mmu_context = (ctx + 1) & LAST_CONTEXT; - mm->context.id = ctx; -#ifdef FEW_CONTEXTS - context_mm[ctx] = mm; -#endif -} - -/* - * Set up the context for a new address space. - */ -static inline int init_new_context(struct task_struct *t, struct mm_struct *mm) -{ - mm->context.id = NO_CONTEXT; - mm->context.vdso_base = 0; - return 0; -} - -/* - * We're finished using the context for an address space. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - preempt_disable(); - if (mm->context.id != NO_CONTEXT) { - clear_bit(mm->context.id, context_map); - mm->context.id = NO_CONTEXT; -#ifdef FEW_CONTEXTS - atomic_inc(&nr_free_contexts); -#endif - } - preempt_enable(); -} - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, - struct task_struct *tsk) -{ -#ifdef CONFIG_ALTIVEC - if (cpu_has_feature(CPU_FTR_ALTIVEC)) - asm volatile ("dssall;\n" -#ifndef CONFIG_POWER4 - "sync;\n" /* G4 needs a sync here, G5 apparently not */ -#endif - : : ); -#endif /* CONFIG_ALTIVEC */ - - tsk->thread.pgdir = next->pgd; - - /* No need to flush userspace segments if the mm doesnt change */ - if (prev == next) - return; - - /* Setup new userspace context */ - get_mmu_context(next); - set_context(next->context.id, next->pgd); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* - * After we have set current->mm to a new value, this activates - * the context for the new mm so we see the new mappings. - */ -#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, current) - -extern void mmu_context_init(void); - - -#else - -#include -#include -#include - -/* - * Copyright (C) 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -static inline void enter_lazy_tlb(struct mm_struct *mm, - struct task_struct *tsk) -{ -} - -/* - * The proto-VSID space has 2^35 - 1 segments available for user mappings. - * Each segment contains 2^28 bytes. Each context maps 2^44 bytes, - * so we can support 2^19-1 contexts (19 == 35 + 28 - 44). - */ -#define NO_CONTEXT 0 -#define MAX_CONTEXT ((1UL << 19) - 1) - -extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); -extern void destroy_context(struct mm_struct *mm); - -extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm); -extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm); - -/* - * switch_mm is the entry point called from the architecture independent - * code in kernel/sched.c - */ -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, - struct task_struct *tsk) -{ - if (!cpu_isset(smp_processor_id(), next->cpu_vm_mask)) - cpu_set(smp_processor_id(), next->cpu_vm_mask); - - /* No need to flush userspace segments if the mm doesnt change */ - if (prev == next) - return; - -#ifdef CONFIG_ALTIVEC - if (cpu_has_feature(CPU_FTR_ALTIVEC)) - asm volatile ("dssall"); -#endif /* CONFIG_ALTIVEC */ - - if (cpu_has_feature(CPU_FTR_SLB)) - switch_slb(tsk, next); - else - switch_stab(tsk, next); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* - * After we have set current->mm to a new value, this activates - * the context for the new mm so we see the new mappings. - */ -static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next) -{ - unsigned long flags; - - local_irq_save(flags); - switch_mm(prev, next, current); - local_irq_restore(flags); -} - -#endif /* CONFIG_PPC64 */ -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_MMU_CONTEXT_H */ diff --git a/include/asm-powerpc/mmzone.h b/include/asm-powerpc/mmzone.h deleted file mode 100644 index 19f299b..0000000 --- a/include/asm-powerpc/mmzone.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Written by Kanoj Sarcar (kanoj@sgi.com) Aug 99 - * - * PowerPC64 port: - * Copyright (C) 2002 Anton Blanchard, IBM Corp. - */ -#ifndef _ASM_MMZONE_H_ -#define _ASM_MMZONE_H_ -#ifdef __KERNEL__ - - -/* - * generic non-linear memory support: - * - * 1) we will not split memory into more chunks than will fit into the - * flags field of the struct page - */ - -#ifdef CONFIG_NEED_MULTIPLE_NODES - -extern struct pglist_data *node_data[]; -/* - * Return a pointer to the node data for node n. - */ -#define NODE_DATA(nid) (node_data[nid]) - -/* - * Following are specific to this numa platform. - */ - -extern int numa_cpu_lookup_table[]; -extern cpumask_t numa_cpumask_lookup_table[]; -#ifdef CONFIG_MEMORY_HOTPLUG -extern unsigned long max_pfn; -#endif - -/* - * Following are macros that each numa implmentation must define. - */ - -#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) -#define node_end_pfn(nid) (NODE_DATA(nid)->node_end_pfn) - -#endif /* CONFIG_NEED_MULTIPLE_NODES */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_MMZONE_H_ */ diff --git a/include/asm-powerpc/module.h b/include/asm-powerpc/module.h deleted file mode 100644 index e5f14b1..0000000 --- a/include/asm-powerpc/module.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef _ASM_POWERPC_MODULE_H -#define _ASM_POWERPC_MODULE_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include - - -#ifndef __powerpc64__ -/* - * Thanks to Paul M for explaining this. - * - * PPC can only do rel jumps += 32MB, and often the kernel and other - * modules are furthur away than this. So, we jump to a table of - * trampolines attached to the module (the Procedure Linkage Table) - * whenever that happens. - */ - -struct ppc_plt_entry { - /* 16 byte jump instruction sequence (4 instructions) */ - unsigned int jump[4]; -}; -#endif /* __powerpc64__ */ - - -struct mod_arch_specific { -#ifdef __powerpc64__ - unsigned int stubs_section; /* Index of stubs section in module */ - unsigned int toc_section; /* What section is the TOC? */ -#else - /* Indices of PLT sections within module. */ - unsigned int core_plt_section; - unsigned int init_plt_section; -#endif - - /* List of BUG addresses, source line numbers and filenames */ - struct list_head bug_list; - struct bug_entry *bug_table; - unsigned int num_bugs; -}; - -/* - * Select ELF headers. - * Make empty section for module_frob_arch_sections to expand. - */ - -#ifdef __powerpc64__ -# define Elf_Shdr Elf64_Shdr -# define Elf_Sym Elf64_Sym -# define Elf_Ehdr Elf64_Ehdr -# ifdef MODULE - asm(".section .stubs,\"ax\",@nobits; .align 3; .previous"); -# endif -#else -# define Elf_Shdr Elf32_Shdr -# define Elf_Sym Elf32_Sym -# define Elf_Ehdr Elf32_Ehdr -# ifdef MODULE - asm(".section .plt,\"ax\",@nobits; .align 3; .previous"); - asm(".section .init.plt,\"ax\",@nobits; .align 3; .previous"); -# endif /* MODULE */ -#endif - - -struct exception_table_entry; -void sort_ex_table(struct exception_table_entry *start, - struct exception_table_entry *finish); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MODULE_H */ diff --git a/include/asm-powerpc/mpc512x.h b/include/asm-powerpc/mpc512x.h deleted file mode 100644 index c48a165..0000000 --- a/include/asm-powerpc/mpc512x.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. - * - * Author: John Rigby, , Friday Apr 13 2007 - * - * Description: - * MPC5121 Prototypes and definitions - * - * This is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_POWERPC_MPC512x_H__ -#define __ASM_POWERPC_MPC512x_H__ - -extern unsigned long mpc512x_find_ips_freq(struct device_node *node); - -#endif /* __ASM_POWERPC_MPC512x_H__ */ - diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h deleted file mode 100644 index 81ef10b..0000000 --- a/include/asm-powerpc/mpc52xx.h +++ /dev/null @@ -1,295 +0,0 @@ -/* - * Prototypes, etc. for the Freescale MPC52xx embedded cpu chips - * May need to be cleaned as the port goes on ... - * - * Copyright (C) 2004-2005 Sylvain Munaut - * Copyright (C) 2003 MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef __ASM_POWERPC_MPC52xx_H__ -#define __ASM_POWERPC_MPC52xx_H__ - -#ifndef __ASSEMBLY__ -#include -#include -#endif /* __ASSEMBLY__ */ - -#include - -/* Variants of the 5200(B) */ -#define MPC5200_SVR 0x80110010 -#define MPC5200_SVR_MASK 0xfffffff0 -#define MPC5200B_SVR 0x80110020 -#define MPC5200B_SVR_MASK 0xfffffff0 - -/* ======================================================================== */ -/* Structures mapping of some unit register set */ -/* ======================================================================== */ - -#ifndef __ASSEMBLY__ - -/* Memory Mapping Control */ -struct mpc52xx_mmap_ctl { - u32 mbar; /* MMAP_CTRL + 0x00 */ - - u32 cs0_start; /* MMAP_CTRL + 0x04 */ - u32 cs0_stop; /* MMAP_CTRL + 0x08 */ - u32 cs1_start; /* MMAP_CTRL + 0x0c */ - u32 cs1_stop; /* MMAP_CTRL + 0x10 */ - u32 cs2_start; /* MMAP_CTRL + 0x14 */ - u32 cs2_stop; /* MMAP_CTRL + 0x18 */ - u32 cs3_start; /* MMAP_CTRL + 0x1c */ - u32 cs3_stop; /* MMAP_CTRL + 0x20 */ - u32 cs4_start; /* MMAP_CTRL + 0x24 */ - u32 cs4_stop; /* MMAP_CTRL + 0x28 */ - u32 cs5_start; /* MMAP_CTRL + 0x2c */ - u32 cs5_stop; /* MMAP_CTRL + 0x30 */ - - u32 sdram0; /* MMAP_CTRL + 0x34 */ - u32 sdram1; /* MMAP_CTRL + 0X38 */ - - u32 reserved[4]; /* MMAP_CTRL + 0x3c .. 0x48 */ - - u32 boot_start; /* MMAP_CTRL + 0x4c */ - u32 boot_stop; /* MMAP_CTRL + 0x50 */ - - u32 ipbi_ws_ctrl; /* MMAP_CTRL + 0x54 */ - - u32 cs6_start; /* MMAP_CTRL + 0x58 */ - u32 cs6_stop; /* MMAP_CTRL + 0x5c */ - u32 cs7_start; /* MMAP_CTRL + 0x60 */ - u32 cs7_stop; /* MMAP_CTRL + 0x64 */ -}; - -/* SDRAM control */ -struct mpc52xx_sdram { - u32 mode; /* SDRAM + 0x00 */ - u32 ctrl; /* SDRAM + 0x04 */ - u32 config1; /* SDRAM + 0x08 */ - u32 config2; /* SDRAM + 0x0c */ -}; - -/* SDMA */ -struct mpc52xx_sdma { - u32 taskBar; /* SDMA + 0x00 */ - u32 currentPointer; /* SDMA + 0x04 */ - u32 endPointer; /* SDMA + 0x08 */ - u32 variablePointer; /* SDMA + 0x0c */ - - u8 IntVect1; /* SDMA + 0x10 */ - u8 IntVect2; /* SDMA + 0x11 */ - u16 PtdCntrl; /* SDMA + 0x12 */ - - u32 IntPend; /* SDMA + 0x14 */ - u32 IntMask; /* SDMA + 0x18 */ - - u16 tcr[16]; /* SDMA + 0x1c .. 0x3a */ - - u8 ipr[32]; /* SDMA + 0x3c .. 0x5b */ - - u32 cReqSelect; /* SDMA + 0x5c */ - u32 task_size0; /* SDMA + 0x60 */ - u32 task_size1; /* SDMA + 0x64 */ - u32 MDEDebug; /* SDMA + 0x68 */ - u32 ADSDebug; /* SDMA + 0x6c */ - u32 Value1; /* SDMA + 0x70 */ - u32 Value2; /* SDMA + 0x74 */ - u32 Control; /* SDMA + 0x78 */ - u32 Status; /* SDMA + 0x7c */ - u32 PTDDebug; /* SDMA + 0x80 */ -}; - -/* GPT */ -struct mpc52xx_gpt { - u32 mode; /* GPTx + 0x00 */ - u32 count; /* GPTx + 0x04 */ - u32 pwm; /* GPTx + 0x08 */ - u32 status; /* GPTx + 0X0c */ -}; - -/* GPIO */ -struct mpc52xx_gpio { - u32 port_config; /* GPIO + 0x00 */ - u32 simple_gpioe; /* GPIO + 0x04 */ - u32 simple_ode; /* GPIO + 0x08 */ - u32 simple_ddr; /* GPIO + 0x0c */ - u32 simple_dvo; /* GPIO + 0x10 */ - u32 simple_ival; /* GPIO + 0x14 */ - u8 outo_gpioe; /* GPIO + 0x18 */ - u8 reserved1[3]; /* GPIO + 0x19 */ - u8 outo_dvo; /* GPIO + 0x1c */ - u8 reserved2[3]; /* GPIO + 0x1d */ - u8 sint_gpioe; /* GPIO + 0x20 */ - u8 reserved3[3]; /* GPIO + 0x21 */ - u8 sint_ode; /* GPIO + 0x24 */ - u8 reserved4[3]; /* GPIO + 0x25 */ - u8 sint_ddr; /* GPIO + 0x28 */ - u8 reserved5[3]; /* GPIO + 0x29 */ - u8 sint_dvo; /* GPIO + 0x2c */ - u8 reserved6[3]; /* GPIO + 0x2d */ - u8 sint_inten; /* GPIO + 0x30 */ - u8 reserved7[3]; /* GPIO + 0x31 */ - u16 sint_itype; /* GPIO + 0x34 */ - u16 reserved8; /* GPIO + 0x36 */ - u8 gpio_control; /* GPIO + 0x38 */ - u8 reserved9[3]; /* GPIO + 0x39 */ - u8 sint_istat; /* GPIO + 0x3c */ - u8 sint_ival; /* GPIO + 0x3d */ - u8 bus_errs; /* GPIO + 0x3e */ - u8 reserved10; /* GPIO + 0x3f */ -}; - -#define MPC52xx_GPIO_PSC_CONFIG_UART_WITHOUT_CD 4 -#define MPC52xx_GPIO_PSC_CONFIG_UART_WITH_CD 5 -#define MPC52xx_GPIO_PCI_DIS (1<<15) - -/* GPIO with WakeUp*/ -struct mpc52xx_gpio_wkup { - u8 wkup_gpioe; /* GPIO_WKUP + 0x00 */ - u8 reserved1[3]; /* GPIO_WKUP + 0x03 */ - u8 wkup_ode; /* GPIO_WKUP + 0x04 */ - u8 reserved2[3]; /* GPIO_WKUP + 0x05 */ - u8 wkup_ddr; /* GPIO_WKUP + 0x08 */ - u8 reserved3[3]; /* GPIO_WKUP + 0x09 */ - u8 wkup_dvo; /* GPIO_WKUP + 0x0C */ - u8 reserved4[3]; /* GPIO_WKUP + 0x0D */ - u8 wkup_inten; /* GPIO_WKUP + 0x10 */ - u8 reserved5[3]; /* GPIO_WKUP + 0x11 */ - u8 wkup_iinten; /* GPIO_WKUP + 0x14 */ - u8 reserved6[3]; /* GPIO_WKUP + 0x15 */ - u16 wkup_itype; /* GPIO_WKUP + 0x18 */ - u8 reserved7[2]; /* GPIO_WKUP + 0x1A */ - u8 wkup_maste; /* GPIO_WKUP + 0x1C */ - u8 reserved8[3]; /* GPIO_WKUP + 0x1D */ - u8 wkup_ival; /* GPIO_WKUP + 0x20 */ - u8 reserved9[3]; /* GPIO_WKUP + 0x21 */ - u8 wkup_istat; /* GPIO_WKUP + 0x24 */ - u8 reserved10[3]; /* GPIO_WKUP + 0x25 */ -}; - -/* XLB Bus control */ -struct mpc52xx_xlb { - u8 reserved[0x40]; - u32 config; /* XLB + 0x40 */ - u32 version; /* XLB + 0x44 */ - u32 status; /* XLB + 0x48 */ - u32 int_enable; /* XLB + 0x4c */ - u32 addr_capture; /* XLB + 0x50 */ - u32 bus_sig_capture; /* XLB + 0x54 */ - u32 addr_timeout; /* XLB + 0x58 */ - u32 data_timeout; /* XLB + 0x5c */ - u32 bus_act_timeout; /* XLB + 0x60 */ - u32 master_pri_enable; /* XLB + 0x64 */ - u32 master_priority; /* XLB + 0x68 */ - u32 base_address; /* XLB + 0x6c */ - u32 snoop_window; /* XLB + 0x70 */ -}; - -#define MPC52xx_XLB_CFG_PLDIS (1 << 31) -#define MPC52xx_XLB_CFG_SNOOP (1 << 15) - -/* Clock Distribution control */ -struct mpc52xx_cdm { - u32 jtag_id; /* CDM + 0x00 reg0 read only */ - u32 rstcfg; /* CDM + 0x04 reg1 read only */ - u32 breadcrumb; /* CDM + 0x08 reg2 */ - - u8 mem_clk_sel; /* CDM + 0x0c reg3 byte0 */ - u8 xlb_clk_sel; /* CDM + 0x0d reg3 byte1 read only */ - u8 ipb_clk_sel; /* CDM + 0x0e reg3 byte2 */ - u8 pci_clk_sel; /* CDM + 0x0f reg3 byte3 */ - - u8 ext_48mhz_en; /* CDM + 0x10 reg4 byte0 */ - u8 fd_enable; /* CDM + 0x11 reg4 byte1 */ - u16 fd_counters; /* CDM + 0x12 reg4 byte2,3 */ - - u32 clk_enables; /* CDM + 0x14 reg5 */ - - u8 osc_disable; /* CDM + 0x18 reg6 byte0 */ - u8 reserved0[3]; /* CDM + 0x19 reg6 byte1,2,3 */ - - u8 ccs_sleep_enable; /* CDM + 0x1c reg7 byte0 */ - u8 osc_sleep_enable; /* CDM + 0x1d reg7 byte1 */ - u8 reserved1; /* CDM + 0x1e reg7 byte2 */ - u8 ccs_qreq_test; /* CDM + 0x1f reg7 byte3 */ - - u8 soft_reset; /* CDM + 0x20 u8 byte0 */ - u8 no_ckstp; /* CDM + 0x21 u8 byte0 */ - u8 reserved2[2]; /* CDM + 0x22 u8 byte1,2,3 */ - - u8 pll_lock; /* CDM + 0x24 reg9 byte0 */ - u8 pll_looselock; /* CDM + 0x25 reg9 byte1 */ - u8 pll_sm_lockwin; /* CDM + 0x26 reg9 byte2 */ - u8 reserved3; /* CDM + 0x27 reg9 byte3 */ - - u16 reserved4; /* CDM + 0x28 reg10 byte0,1 */ - u16 mclken_div_psc1; /* CDM + 0x2a reg10 byte2,3 */ - - u16 reserved5; /* CDM + 0x2c reg11 byte0,1 */ - u16 mclken_div_psc2; /* CDM + 0x2e reg11 byte2,3 */ - - u16 reserved6; /* CDM + 0x30 reg12 byte0,1 */ - u16 mclken_div_psc3; /* CDM + 0x32 reg12 byte2,3 */ - - u16 reserved7; /* CDM + 0x34 reg13 byte0,1 */ - u16 mclken_div_psc6; /* CDM + 0x36 reg13 byte2,3 */ -}; - -#endif /* __ASSEMBLY__ */ - - -/* ========================================================================= */ -/* Prototypes for MPC52xx sysdev */ -/* ========================================================================= */ - -#ifndef __ASSEMBLY__ - -/* mpc52xx_common.c */ -extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node); -extern void mpc5200_setup_xlb_arbiter(void); -extern void mpc52xx_declare_of_platform_devices(void); -extern void mpc52xx_map_common_devices(void); -extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); -extern void mpc52xx_restart(char *cmd); - -/* mpc52xx_pic.c */ -extern void mpc52xx_init_irq(void); -extern unsigned int mpc52xx_get_irq(void); - -/* mpc52xx_pci.c */ -#ifdef CONFIG_PCI -extern int __init mpc52xx_add_bridge(struct device_node *node); -extern void __init mpc52xx_setup_pci(void); -#else -static inline void mpc52xx_setup_pci(void) { } -#endif - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_PM -struct mpc52xx_suspend { - void (*board_suspend_prepare)(void __iomem *mbar); - void (*board_resume_finish)(void __iomem *mbar); -}; - -extern struct mpc52xx_suspend mpc52xx_suspend; -extern int __init mpc52xx_pm_init(void); -extern int mpc52xx_set_wakeup_gpio(u8 pin, u8 level); - -#ifdef CONFIG_PPC_LITE5200 -extern int __init lite5200_pm_init(void); - -/* lite5200 calls mpc5200 suspend functions, so here they are */ -extern int mpc52xx_pm_prepare(void); -extern int mpc52xx_pm_enter(suspend_state_t); -extern void mpc52xx_pm_finish(void); -extern char saved_sram[0x4000]; /* reuse buffer from mpc52xx suspend */ -#endif -#endif /* CONFIG_PM */ - -#endif /* __ASM_POWERPC_MPC52xx_H__ */ - diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h deleted file mode 100644 index 8917ed6..0000000 --- a/include/asm-powerpc/mpc52xx_psc.h +++ /dev/null @@ -1,276 +0,0 @@ -/* - * include/asm-ppc/mpc52xx_psc.h - * - * Definitions of consts/structs to drive the Freescale MPC52xx OnChip - * PSCs. Theses are shared between multiple drivers since a PSC can be - * UART, AC97, IR, I2S, ... So this header is in asm-ppc. - * - * - * Maintainer : Sylvain Munaut - * - * Based/Extracted from some header of the 2.4 originally written by - * Dale Farnsworth - * - * Copyright (C) 2004 Sylvain Munaut - * Copyright (C) 2003 MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#ifndef __ASM_MPC52xx_PSC_H__ -#define __ASM_MPC52xx_PSC_H__ - -#include - -/* Max number of PSCs */ -#define MPC52xx_PSC_MAXNUM 6 - -/* Programmable Serial Controller (PSC) status register bits */ -#define MPC52xx_PSC_SR_CDE 0x0080 -#define MPC52xx_PSC_SR_RXRDY 0x0100 -#define MPC52xx_PSC_SR_RXFULL 0x0200 -#define MPC52xx_PSC_SR_TXRDY 0x0400 -#define MPC52xx_PSC_SR_TXEMP 0x0800 -#define MPC52xx_PSC_SR_OE 0x1000 -#define MPC52xx_PSC_SR_PE 0x2000 -#define MPC52xx_PSC_SR_FE 0x4000 -#define MPC52xx_PSC_SR_RB 0x8000 - -/* PSC Command values */ -#define MPC52xx_PSC_RX_ENABLE 0x0001 -#define MPC52xx_PSC_RX_DISABLE 0x0002 -#define MPC52xx_PSC_TX_ENABLE 0x0004 -#define MPC52xx_PSC_TX_DISABLE 0x0008 -#define MPC52xx_PSC_SEL_MODE_REG_1 0x0010 -#define MPC52xx_PSC_RST_RX 0x0020 -#define MPC52xx_PSC_RST_TX 0x0030 -#define MPC52xx_PSC_RST_ERR_STAT 0x0040 -#define MPC52xx_PSC_RST_BRK_CHG_INT 0x0050 -#define MPC52xx_PSC_START_BRK 0x0060 -#define MPC52xx_PSC_STOP_BRK 0x0070 - -/* PSC TxRx FIFO status bits */ -#define MPC52xx_PSC_RXTX_FIFO_ERR 0x0040 -#define MPC52xx_PSC_RXTX_FIFO_UF 0x0020 -#define MPC52xx_PSC_RXTX_FIFO_OF 0x0010 -#define MPC52xx_PSC_RXTX_FIFO_FR 0x0008 -#define MPC52xx_PSC_RXTX_FIFO_FULL 0x0004 -#define MPC52xx_PSC_RXTX_FIFO_ALARM 0x0002 -#define MPC52xx_PSC_RXTX_FIFO_EMPTY 0x0001 - -/* PSC interrupt status/mask bits */ -#define MPC52xx_PSC_IMR_TXRDY 0x0100 -#define MPC52xx_PSC_IMR_RXRDY 0x0200 -#define MPC52xx_PSC_IMR_DB 0x0400 -#define MPC52xx_PSC_IMR_TXEMP 0x0800 -#define MPC52xx_PSC_IMR_ORERR 0x1000 -#define MPC52xx_PSC_IMR_IPC 0x8000 - -/* PSC input port change bit */ -#define MPC52xx_PSC_CTS 0x01 -#define MPC52xx_PSC_DCD 0x02 -#define MPC52xx_PSC_D_CTS 0x10 -#define MPC52xx_PSC_D_DCD 0x20 - -/* PSC mode fields */ -#define MPC52xx_PSC_MODE_5_BITS 0x00 -#define MPC52xx_PSC_MODE_6_BITS 0x01 -#define MPC52xx_PSC_MODE_7_BITS 0x02 -#define MPC52xx_PSC_MODE_8_BITS 0x03 -#define MPC52xx_PSC_MODE_BITS_MASK 0x03 -#define MPC52xx_PSC_MODE_PAREVEN 0x00 -#define MPC52xx_PSC_MODE_PARODD 0x04 -#define MPC52xx_PSC_MODE_PARFORCE 0x08 -#define MPC52xx_PSC_MODE_PARNONE 0x10 -#define MPC52xx_PSC_MODE_ERR 0x20 -#define MPC52xx_PSC_MODE_FFULL 0x40 -#define MPC52xx_PSC_MODE_RXRTS 0x80 - -#define MPC52xx_PSC_MODE_ONE_STOP_5_BITS 0x00 -#define MPC52xx_PSC_MODE_ONE_STOP 0x07 -#define MPC52xx_PSC_MODE_TWO_STOP 0x0f - -#define MPC52xx_PSC_RFNUM_MASK 0x01ff - -#define MPC52xx_PSC_SICR_DTS1 (1 << 29) -#define MPC52xx_PSC_SICR_SHDR (1 << 28) -#define MPC52xx_PSC_SICR_SIM_MASK (0xf << 24) -#define MPC52xx_PSC_SICR_SIM_UART (0x0 << 24) -#define MPC52xx_PSC_SICR_SIM_UART_DCD (0x8 << 24) -#define MPC52xx_PSC_SICR_SIM_CODEC_8 (0x1 << 24) -#define MPC52xx_PSC_SICR_SIM_CODEC_16 (0x2 << 24) -#define MPC52xx_PSC_SICR_SIM_AC97 (0x3 << 24) -#define MPC52xx_PSC_SICR_SIM_SIR (0x8 << 24) -#define MPC52xx_PSC_SICR_SIM_SIR_DCD (0xc << 24) -#define MPC52xx_PSC_SICR_SIM_MIR (0x5 << 24) -#define MPC52xx_PSC_SICR_SIM_FIR (0x6 << 24) -#define MPC52xx_PSC_SICR_SIM_CODEC_24 (0x7 << 24) -#define MPC52xx_PSC_SICR_SIM_CODEC_32 (0xf << 24) -#define MPC52xx_PSC_SICR_GENCLK (1 << 23) -#define MPC52xx_PSC_SICR_I2S (1 << 22) -#define MPC52xx_PSC_SICR_CLKPOL (1 << 21) -#define MPC52xx_PSC_SICR_SYNCPOL (1 << 20) -#define MPC52xx_PSC_SICR_CELLSLAVE (1 << 19) -#define MPC52xx_PSC_SICR_CELL2XCLK (1 << 18) -#define MPC52xx_PSC_SICR_ESAI (1 << 17) -#define MPC52xx_PSC_SICR_ENAC97 (1 << 16) -#define MPC52xx_PSC_SICR_SPI (1 << 15) -#define MPC52xx_PSC_SICR_MSTR (1 << 14) -#define MPC52xx_PSC_SICR_CPOL (1 << 13) -#define MPC52xx_PSC_SICR_CPHA (1 << 12) -#define MPC52xx_PSC_SICR_USEEOF (1 << 11) -#define MPC52xx_PSC_SICR_DISABLEEOF (1 << 10) - -/* Structure of the hardware registers */ -struct mpc52xx_psc { - u8 mode; /* PSC + 0x00 */ - u8 reserved0[3]; - union { /* PSC + 0x04 */ - u16 status; - u16 clock_select; - } sr_csr; -#define mpc52xx_psc_status sr_csr.status -#define mpc52xx_psc_clock_select sr_csr.clock_select - u16 reserved1; - u8 command; /* PSC + 0x08 */ - u8 reserved2[3]; - union { /* PSC + 0x0c */ - u8 buffer_8; - u16 buffer_16; - u32 buffer_32; - } buffer; -#define mpc52xx_psc_buffer_8 buffer.buffer_8 -#define mpc52xx_psc_buffer_16 buffer.buffer_16 -#define mpc52xx_psc_buffer_32 buffer.buffer_32 - union { /* PSC + 0x10 */ - u8 ipcr; - u8 acr; - } ipcr_acr; -#define mpc52xx_psc_ipcr ipcr_acr.ipcr -#define mpc52xx_psc_acr ipcr_acr.acr - u8 reserved3[3]; - union { /* PSC + 0x14 */ - u16 isr; - u16 imr; - } isr_imr; -#define mpc52xx_psc_isr isr_imr.isr -#define mpc52xx_psc_imr isr_imr.imr - u16 reserved4; - u8 ctur; /* PSC + 0x18 */ - u8 reserved5[3]; - u8 ctlr; /* PSC + 0x1c */ - u8 reserved6[3]; - /* BitClkDiv field of CCR is byte swapped in - * the hardware for mpc5200/b compatibility */ - u32 ccr; /* PSC + 0x20 */ - u32 ac97_slots; /* PSC + 0x24 */ - u32 ac97_cmd; /* PSC + 0x28 */ - u32 ac97_data; /* PSC + 0x2c */ - u8 ivr; /* PSC + 0x30 */ - u8 reserved8[3]; - u8 ip; /* PSC + 0x34 */ - u8 reserved9[3]; - u8 op1; /* PSC + 0x38 */ - u8 reserved10[3]; - u8 op0; /* PSC + 0x3c */ - u8 reserved11[3]; - u32 sicr; /* PSC + 0x40 */ - u8 ircr1; /* PSC + 0x44 */ - u8 reserved13[3]; - u8 ircr2; /* PSC + 0x44 */ - u8 reserved14[3]; - u8 irsdr; /* PSC + 0x4c */ - u8 reserved15[3]; - u8 irmdr; /* PSC + 0x50 */ - u8 reserved16[3]; - u8 irfdr; /* PSC + 0x54 */ - u8 reserved17[3]; -}; - -struct mpc52xx_psc_fifo { - u16 rfnum; /* PSC + 0x58 */ - u16 reserved18; - u16 tfnum; /* PSC + 0x5c */ - u16 reserved19; - u32 rfdata; /* PSC + 0x60 */ - u16 rfstat; /* PSC + 0x64 */ - u16 reserved20; - u8 rfcntl; /* PSC + 0x68 */ - u8 reserved21[5]; - u16 rfalarm; /* PSC + 0x6e */ - u16 reserved22; - u16 rfrptr; /* PSC + 0x72 */ - u16 reserved23; - u16 rfwptr; /* PSC + 0x76 */ - u16 reserved24; - u16 rflrfptr; /* PSC + 0x7a */ - u16 reserved25; - u16 rflwfptr; /* PSC + 0x7e */ - u32 tfdata; /* PSC + 0x80 */ - u16 tfstat; /* PSC + 0x84 */ - u16 reserved26; - u8 tfcntl; /* PSC + 0x88 */ - u8 reserved27[5]; - u16 tfalarm; /* PSC + 0x8e */ - u16 reserved28; - u16 tfrptr; /* PSC + 0x92 */ - u16 reserved29; - u16 tfwptr; /* PSC + 0x96 */ - u16 reserved30; - u16 tflrfptr; /* PSC + 0x9a */ - u16 reserved31; - u16 tflwfptr; /* PSC + 0x9e */ -}; - -#define MPC512x_PSC_FIFO_RESET_SLICE 0x80 -#define MPC512x_PSC_FIFO_ENABLE_SLICE 0x01 -#define MPC512x_PSC_FIFO_ENABLE_DMA 0x04 - -#define MPC512x_PSC_FIFO_EMPTY 0x1 -#define MPC512x_PSC_FIFO_FULL 0x2 -#define MPC512x_PSC_FIFO_ALARM 0x4 -#define MPC512x_PSC_FIFO_URERR 0x8 -#define MPC512x_PSC_FIFO_ORERR 0x01 -#define MPC512x_PSC_FIFO_MEMERROR 0x02 - -struct mpc512x_psc_fifo { - u32 reserved1[10]; - u32 txcmd; /* PSC + 0x80 */ - u32 txalarm; /* PSC + 0x84 */ - u32 txsr; /* PSC + 0x88 */ - u32 txisr; /* PSC + 0x8c */ - u32 tximr; /* PSC + 0x90 */ - u32 txcnt; /* PSC + 0x94 */ - u32 txptr; /* PSC + 0x98 */ - u32 txsz; /* PSC + 0x9c */ - u32 reserved2[7]; - union { - u8 txdata_8; - u16 txdata_16; - u32 txdata_32; - } txdata; /* PSC + 0xbc */ -#define txdata_8 txdata.txdata_8 -#define txdata_16 txdata.txdata_16 -#define txdata_32 txdata.txdata_32 - u32 rxcmd; /* PSC + 0xc0 */ - u32 rxalarm; /* PSC + 0xc4 */ - u32 rxsr; /* PSC + 0xc8 */ - u32 rxisr; /* PSC + 0xcc */ - u32 rximr; /* PSC + 0xd0 */ - u32 rxcnt; /* PSC + 0xd4 */ - u32 rxptr; /* PSC + 0xd8 */ - u32 rxsz; /* PSC + 0xdc */ - u32 reserved3[7]; - union { - u8 rxdata_8; - u16 rxdata_16; - u32 rxdata_32; - } rxdata; /* PSC + 0xfc */ -#define rxdata_8 rxdata.rxdata_8 -#define rxdata_16 rxdata.rxdata_16 -#define rxdata_32 rxdata.rxdata_32 -}; - -#endif /* __ASM_MPC52xx_PSC_H__ */ diff --git a/include/asm-powerpc/mpc6xx.h b/include/asm-powerpc/mpc6xx.h deleted file mode 100644 index effc229..0000000 --- a/include/asm-powerpc/mpc6xx.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_POWERPC_MPC6xx_H -#define __ASM_POWERPC_MPC6xx_H - -void mpc6xx_enter_standby(void); - -#endif diff --git a/include/asm-powerpc/mpc8260.h b/include/asm-powerpc/mpc8260.h deleted file mode 100644 index 03317e1..0000000 --- a/include/asm-powerpc/mpc8260.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Since there are many different boards and no standard configuration, - * we have a unique include file for each. Rather than change every - * file that has to include MPC8260 configuration, they all include - * this one and the configuration switching is done here. - */ -#ifdef __KERNEL__ -#ifndef __ASM_POWERPC_MPC8260_H__ -#define __ASM_POWERPC_MPC8260_H__ - -#define MPC82XX_BCR_PLDP 0x00800000 /* Pipeline Maximum Depth */ - -#ifdef CONFIG_8260 - -#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS) -#include -#endif - -#ifdef CONFIG_PCI_8260 -#include -#endif - -#endif /* CONFIG_8260 */ -#endif /* !__ASM_POWERPC_MPC8260_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h deleted file mode 100644 index 15f650f..0000000 --- a/include/asm-powerpc/mpc86xx.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * MPC86xx definitions - * - * Author: Jeff Brown - * - * Copyright 2004 Freescale Semiconductor, Inc - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_POWERPC_MPC86xx_H__ -#define __ASM_POWERPC_MPC86xx_H__ - -#include - -#ifdef CONFIG_PPC_86xx - -#define CPU0_BOOT_RELEASE 0x01000000 -#define CPU1_BOOT_RELEASE 0x02000000 -#define CPU_ALL_RELEASED (CPU0_BOOT_RELEASE | CPU1_BOOT_RELEASE) -#define MCM_PORT_CONFIG_OFFSET 0x1010 - -/* Offset from CCSRBAR */ -#define MPC86xx_MCM_OFFSET (0x00000) -#define MPC86xx_MCM_SIZE (0x02000) - -#endif /* CONFIG_PPC_86xx */ -#endif /* __ASM_POWERPC_MPC86xx_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/mpc8xx.h b/include/asm-powerpc/mpc8xx.h deleted file mode 100644 index 98f3c4f..0000000 --- a/include/asm-powerpc/mpc8xx.h +++ /dev/null @@ -1,12 +0,0 @@ -/* This is the single file included by all MPC8xx build options. - * Since there are many different boards and no standard configuration, - * we have a unique include file for each. Rather than change every - * file that has to include MPC8xx configuration, they all include - * this one and the configuration switching is done here. - */ -#ifndef __CONFIG_8xx_DEFS -#define __CONFIG_8xx_DEFS - -extern struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; - -#endif /* __CONFIG_8xx_DEFS */ diff --git a/include/asm-powerpc/mpic.h b/include/asm-powerpc/mpic.h deleted file mode 100644 index fe566a3..0000000 --- a/include/asm-powerpc/mpic.h +++ /dev/null @@ -1,481 +0,0 @@ -#ifndef _ASM_POWERPC_MPIC_H -#define _ASM_POWERPC_MPIC_H -#ifdef __KERNEL__ - -#include -#include -#include - -/* - * Global registers - */ - -#define MPIC_GREG_BASE 0x01000 - -#define MPIC_GREG_FEATURE_0 0x00000 -#define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000 -#define MPIC_GREG_FEATURE_LAST_SRC_SHIFT 16 -#define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00 -#define MPIC_GREG_FEATURE_LAST_CPU_SHIFT 8 -#define MPIC_GREG_FEATURE_VERSION_MASK 0xff -#define MPIC_GREG_FEATURE_1 0x00010 -#define MPIC_GREG_GLOBAL_CONF_0 0x00020 -#define MPIC_GREG_GCONF_RESET 0x80000000 -#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000 -#define MPIC_GREG_GCONF_NO_BIAS 0x10000000 -#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff -#define MPIC_GREG_GCONF_MCK 0x08000000 -#define MPIC_GREG_GLOBAL_CONF_1 0x00030 -#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000 -#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000 -#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \ - (((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK) -#define MPIC_GREG_VENDOR_0 0x00040 -#define MPIC_GREG_VENDOR_1 0x00050 -#define MPIC_GREG_VENDOR_2 0x00060 -#define MPIC_GREG_VENDOR_3 0x00070 -#define MPIC_GREG_VENDOR_ID 0x00080 -#define MPIC_GREG_VENDOR_ID_STEPPING_MASK 0x00ff0000 -#define MPIC_GREG_VENDOR_ID_STEPPING_SHIFT 16 -#define MPIC_GREG_VENDOR_ID_DEVICE_ID_MASK 0x0000ff00 -#define MPIC_GREG_VENDOR_ID_DEVICE_ID_SHIFT 8 -#define MPIC_GREG_VENDOR_ID_VENDOR_ID_MASK 0x000000ff -#define MPIC_GREG_PROCESSOR_INIT 0x00090 -#define MPIC_GREG_IPI_VECTOR_PRI_0 0x000a0 -#define MPIC_GREG_IPI_VECTOR_PRI_1 0x000b0 -#define MPIC_GREG_IPI_VECTOR_PRI_2 0x000c0 -#define MPIC_GREG_IPI_VECTOR_PRI_3 0x000d0 -#define MPIC_GREG_IPI_STRIDE 0x10 -#define MPIC_GREG_SPURIOUS 0x000e0 -#define MPIC_GREG_TIMER_FREQ 0x000f0 - -/* - * - * Timer registers - */ -#define MPIC_TIMER_BASE 0x01100 -#define MPIC_TIMER_STRIDE 0x40 - -#define MPIC_TIMER_CURRENT_CNT 0x00000 -#define MPIC_TIMER_BASE_CNT 0x00010 -#define MPIC_TIMER_VECTOR_PRI 0x00020 -#define MPIC_TIMER_DESTINATION 0x00030 - -/* - * Per-Processor registers - */ - -#define MPIC_CPU_THISBASE 0x00000 -#define MPIC_CPU_BASE 0x20000 -#define MPIC_CPU_STRIDE 0x01000 - -#define MPIC_CPU_IPI_DISPATCH_0 0x00040 -#define MPIC_CPU_IPI_DISPATCH_1 0x00050 -#define MPIC_CPU_IPI_DISPATCH_2 0x00060 -#define MPIC_CPU_IPI_DISPATCH_3 0x00070 -#define MPIC_CPU_IPI_DISPATCH_STRIDE 0x00010 -#define MPIC_CPU_CURRENT_TASK_PRI 0x00080 -#define MPIC_CPU_TASKPRI_MASK 0x0000000f -#define MPIC_CPU_WHOAMI 0x00090 -#define MPIC_CPU_WHOAMI_MASK 0x0000001f -#define MPIC_CPU_INTACK 0x000a0 -#define MPIC_CPU_EOI 0x000b0 -#define MPIC_CPU_MCACK 0x000c0 - -/* - * Per-source registers - */ - -#define MPIC_IRQ_BASE 0x10000 -#define MPIC_IRQ_STRIDE 0x00020 -#define MPIC_IRQ_VECTOR_PRI 0x00000 -#define MPIC_VECPRI_MASK 0x80000000 -#define MPIC_VECPRI_ACTIVITY 0x40000000 /* Read Only */ -#define MPIC_VECPRI_PRIORITY_MASK 0x000f0000 -#define MPIC_VECPRI_PRIORITY_SHIFT 16 -#define MPIC_VECPRI_VECTOR_MASK 0x000007ff -#define MPIC_VECPRI_POLARITY_POSITIVE 0x00800000 -#define MPIC_VECPRI_POLARITY_NEGATIVE 0x00000000 -#define MPIC_VECPRI_POLARITY_MASK 0x00800000 -#define MPIC_VECPRI_SENSE_LEVEL 0x00400000 -#define MPIC_VECPRI_SENSE_EDGE 0x00000000 -#define MPIC_VECPRI_SENSE_MASK 0x00400000 -#define MPIC_IRQ_DESTINATION 0x00010 - -#define MPIC_MAX_IRQ_SOURCES 2048 -#define MPIC_MAX_CPUS 32 -#define MPIC_MAX_ISU 32 - -/* - * Tsi108 implementation of MPIC has many differences from the original one - */ - -/* - * Global registers - */ - -#define TSI108_GREG_BASE 0x00000 -#define TSI108_GREG_FEATURE_0 0x00000 -#define TSI108_GREG_GLOBAL_CONF_0 0x00004 -#define TSI108_GREG_VENDOR_ID 0x0000c -#define TSI108_GREG_IPI_VECTOR_PRI_0 0x00204 /* Doorbell 0 */ -#define TSI108_GREG_IPI_STRIDE 0x0c -#define TSI108_GREG_SPURIOUS 0x00010 -#define TSI108_GREG_TIMER_FREQ 0x00014 - -/* - * Timer registers - */ -#define TSI108_TIMER_BASE 0x0030 -#define TSI108_TIMER_STRIDE 0x10 -#define TSI108_TIMER_CURRENT_CNT 0x00000 -#define TSI108_TIMER_BASE_CNT 0x00004 -#define TSI108_TIMER_VECTOR_PRI 0x00008 -#define TSI108_TIMER_DESTINATION 0x0000c - -/* - * Per-Processor registers - */ -#define TSI108_CPU_BASE 0x00300 -#define TSI108_CPU_STRIDE 0x00040 -#define TSI108_CPU_IPI_DISPATCH_0 0x00200 -#define TSI108_CPU_IPI_DISPATCH_STRIDE 0x00000 -#define TSI108_CPU_CURRENT_TASK_PRI 0x00000 -#define TSI108_CPU_WHOAMI 0xffffffff -#define TSI108_CPU_INTACK 0x00004 -#define TSI108_CPU_EOI 0x00008 -#define TSI108_CPU_MCACK 0x00004 /* Doesn't really exist here */ - -/* - * Per-source registers - */ -#define TSI108_IRQ_BASE 0x00100 -#define TSI108_IRQ_STRIDE 0x00008 -#define TSI108_IRQ_VECTOR_PRI 0x00000 -#define TSI108_VECPRI_VECTOR_MASK 0x000000ff -#define TSI108_VECPRI_POLARITY_POSITIVE 0x01000000 -#define TSI108_VECPRI_POLARITY_NEGATIVE 0x00000000 -#define TSI108_VECPRI_SENSE_LEVEL 0x02000000 -#define TSI108_VECPRI_SENSE_EDGE 0x00000000 -#define TSI108_VECPRI_POLARITY_MASK 0x01000000 -#define TSI108_VECPRI_SENSE_MASK 0x02000000 -#define TSI108_IRQ_DESTINATION 0x00004 - -/* weird mpic register indices and mask bits in the HW info array */ -enum { - MPIC_IDX_GREG_BASE = 0, - MPIC_IDX_GREG_FEATURE_0, - MPIC_IDX_GREG_GLOBAL_CONF_0, - MPIC_IDX_GREG_VENDOR_ID, - MPIC_IDX_GREG_IPI_VECTOR_PRI_0, - MPIC_IDX_GREG_IPI_STRIDE, - MPIC_IDX_GREG_SPURIOUS, - MPIC_IDX_GREG_TIMER_FREQ, - - MPIC_IDX_TIMER_BASE, - MPIC_IDX_TIMER_STRIDE, - MPIC_IDX_TIMER_CURRENT_CNT, - MPIC_IDX_TIMER_BASE_CNT, - MPIC_IDX_TIMER_VECTOR_PRI, - MPIC_IDX_TIMER_DESTINATION, - - MPIC_IDX_CPU_BASE, - MPIC_IDX_CPU_STRIDE, - MPIC_IDX_CPU_IPI_DISPATCH_0, - MPIC_IDX_CPU_IPI_DISPATCH_STRIDE, - MPIC_IDX_CPU_CURRENT_TASK_PRI, - MPIC_IDX_CPU_WHOAMI, - MPIC_IDX_CPU_INTACK, - MPIC_IDX_CPU_EOI, - MPIC_IDX_CPU_MCACK, - - MPIC_IDX_IRQ_BASE, - MPIC_IDX_IRQ_STRIDE, - MPIC_IDX_IRQ_VECTOR_PRI, - - MPIC_IDX_VECPRI_VECTOR_MASK, - MPIC_IDX_VECPRI_POLARITY_POSITIVE, - MPIC_IDX_VECPRI_POLARITY_NEGATIVE, - MPIC_IDX_VECPRI_SENSE_LEVEL, - MPIC_IDX_VECPRI_SENSE_EDGE, - MPIC_IDX_VECPRI_POLARITY_MASK, - MPIC_IDX_VECPRI_SENSE_MASK, - MPIC_IDX_IRQ_DESTINATION, - MPIC_IDX_END -}; - - -#ifdef CONFIG_MPIC_U3_HT_IRQS -/* Fixup table entry */ -struct mpic_irq_fixup -{ - u8 __iomem *base; - u8 __iomem *applebase; - u32 data; - unsigned int index; -}; -#endif /* CONFIG_MPIC_U3_HT_IRQS */ - - -enum mpic_reg_type { - mpic_access_mmio_le, - mpic_access_mmio_be, -#ifdef CONFIG_PPC_DCR - mpic_access_dcr -#endif -}; - -struct mpic_reg_bank { - u32 __iomem *base; -#ifdef CONFIG_PPC_DCR - dcr_host_t dhost; -#endif /* CONFIG_PPC_DCR */ -}; - -struct mpic_irq_save { - u32 vecprio, - dest; -#ifdef CONFIG_MPIC_U3_HT_IRQS - u32 fixup_data; -#endif -}; - -/* The instance data of a given MPIC */ -struct mpic -{ - /* The remapper for this MPIC */ - struct irq_host *irqhost; - - /* The "linux" controller struct */ - struct irq_chip hc_irq; -#ifdef CONFIG_MPIC_U3_HT_IRQS - struct irq_chip hc_ht_irq; -#endif -#ifdef CONFIG_SMP - struct irq_chip hc_ipi; -#endif - const char *name; - /* Flags */ - unsigned int flags; - /* How many irq sources in a given ISU */ - unsigned int isu_size; - unsigned int isu_shift; - unsigned int isu_mask; - unsigned int irq_count; - /* Number of sources */ - unsigned int num_sources; - /* Number of CPUs */ - unsigned int num_cpus; - /* default senses array */ - unsigned char *senses; - unsigned int senses_count; - - /* vector numbers used for internal sources (ipi/timers) */ - unsigned int ipi_vecs[4]; - unsigned int timer_vecs[4]; - - /* Spurious vector to program into unused sources */ - unsigned int spurious_vec; - -#ifdef CONFIG_MPIC_U3_HT_IRQS - /* The fixup table */ - struct mpic_irq_fixup *fixups; - spinlock_t fixup_lock; -#endif - - /* Register access method */ - enum mpic_reg_type reg_type; - - /* The various ioremap'ed bases */ - struct mpic_reg_bank gregs; - struct mpic_reg_bank tmregs; - struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS]; - struct mpic_reg_bank isus[MPIC_MAX_ISU]; - - /* Protected sources */ - unsigned long *protected; - -#ifdef CONFIG_MPIC_WEIRD - /* Pointer to HW info array */ - u32 *hw_set; -#endif - -#ifdef CONFIG_PCI_MSI - spinlock_t bitmap_lock; - unsigned long *hwirq_bitmap; -#endif - -#ifdef CONFIG_MPIC_BROKEN_REGREAD - u32 isu_reg0_shadow[MPIC_MAX_IRQ_SOURCES]; -#endif - - /* link */ - struct mpic *next; - - struct sys_device sysdev; - -#ifdef CONFIG_PM - struct mpic_irq_save *save_data; -#endif -}; - -/* - * MPIC flags (passed to mpic_alloc) - * - * The top 4 bits contain an MPIC bhw id that is used to index the - * register offsets and some masks when CONFIG_MPIC_WEIRD is set. - * Note setting any ID (leaving those bits to 0) means standard MPIC - */ - -/* This is the primary controller, only that one has IPIs and - * has afinity control. A non-primary MPIC always uses CPU0 - * registers only - */ -#define MPIC_PRIMARY 0x00000001 - -/* Set this for a big-endian MPIC */ -#define MPIC_BIG_ENDIAN 0x00000002 -/* Broken U3 MPIC */ -#define MPIC_U3_HT_IRQS 0x00000004 -/* Broken IPI registers (autodetected) */ -#define MPIC_BROKEN_IPI 0x00000008 -/* MPIC wants a reset */ -#define MPIC_WANTS_RESET 0x00000010 -/* Spurious vector requires EOI */ -#define MPIC_SPV_EOI 0x00000020 -/* No passthrough disable */ -#define MPIC_NO_PTHROU_DIS 0x00000040 -/* DCR based MPIC */ -#define MPIC_USES_DCR 0x00000080 -/* MPIC has 11-bit vector fields (or larger) */ -#define MPIC_LARGE_VECTORS 0x00000100 -/* Enable delivery of prio 15 interrupts as MCK instead of EE */ -#define MPIC_ENABLE_MCK 0x00000200 -/* Disable bias among target selection, spread interrupts evenly */ -#define MPIC_NO_BIAS 0x00000400 -/* Ignore NIRQS as reported by FRR */ -#define MPIC_BROKEN_FRR_NIRQS 0x00000800 - -/* MPIC HW modification ID */ -#define MPIC_REGSET_MASK 0xf0000000 -#define MPIC_REGSET(val) (((val) & 0xf ) << 28) -#define MPIC_GET_REGSET(flags) (((flags) >> 28) & 0xf) - -#define MPIC_REGSET_STANDARD MPIC_REGSET(0) /* Original MPIC */ -#define MPIC_REGSET_TSI108 MPIC_REGSET(1) /* Tsi108/109 PIC */ - -/* Allocate the controller structure and setup the linux irq descs - * for the range if interrupts passed in. No HW initialization is - * actually performed. - * - * @phys_addr: physial base address of the MPIC - * @flags: flags, see constants above - * @isu_size: number of interrupts in an ISU. Use 0 to use a - * standard ISU-less setup (aka powermac) - * @irq_offset: first irq number to assign to this mpic - * @irq_count: number of irqs to use with this mpic IRQ sources. Pass 0 - * to match the number of sources - * @ipi_offset: first irq number to assign to this mpic IPI sources, - * used only on primary mpic - * @senses: array of sense values - * @senses_num: number of entries in the array - * - * Note about the sense array. If none is passed, all interrupts are - * setup to be level negative unless MPIC_U3_HT_IRQS is set in which - * case they are edge positive (and the array is ignored anyway). - * The values in the array start at the first source of the MPIC, - * that is senses[0] correspond to linux irq "irq_offset". - */ -extern struct mpic *mpic_alloc(struct device_node *node, - phys_addr_t phys_addr, - unsigned int flags, - unsigned int isu_size, - unsigned int irq_count, - const char *name); - -/* Assign ISUs, to call before mpic_init() - * - * @mpic: controller structure as returned by mpic_alloc() - * @isu_num: ISU number - * @phys_addr: physical address of the ISU - */ -extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, - phys_addr_t phys_addr); - -/* Set default sense codes - * - * @mpic: controller - * @senses: array of sense codes - * @count: size of above array - * - * Optionally provide an array (indexed on hardware interrupt numbers - * for this MPIC) of default sense codes for the chip. Those are linux - * sense codes IRQ_TYPE_* - * - * The driver gets ownership of the pointer, don't dispose of it or - * anything like that. __init only. - */ -extern void mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count); - - -/* Initialize the controller. After this has been called, none of the above - * should be called again for this mpic - */ -extern void mpic_init(struct mpic *mpic); - -/* - * All of the following functions must only be used after the - * ISUs have been assigned and the controller fully initialized - * with mpic_init() - */ - - -/* Change the priority of an interrupt. Default is 8 for irqs and - * 10 for IPIs. You can call this on both IPIs and IRQ numbers, but the - * IPI number is then the offset'ed (linux irq number mapped to the IPI) - */ -extern void mpic_irq_set_priority(unsigned int irq, unsigned int pri); - -/* Setup a non-boot CPU */ -extern void mpic_setup_this_cpu(void); - -/* Clean up for kexec (or cpu offline or ...) */ -extern void mpic_teardown_this_cpu(int secondary); - -/* Get the current cpu priority for this cpu (0..15) */ -extern int mpic_cpu_get_priority(void); - -/* Set the current cpu priority for this cpu */ -extern void mpic_cpu_set_priority(int prio); - -/* Request IPIs on primary mpic */ -extern void mpic_request_ipis(void); - -/* Send an IPI (non offseted number 0..3) */ -extern void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask); - -/* Send a message (IPI) to a given target (cpu number or MSG_*) */ -void smp_mpic_message_pass(int target, int msg); - -/* Unmask a specific virq */ -extern void mpic_unmask_irq(unsigned int irq); -/* Mask a specific virq */ -extern void mpic_mask_irq(unsigned int irq); -/* EOI a specific virq */ -extern void mpic_end_irq(unsigned int irq); - -/* Fetch interrupt from a given mpic */ -extern unsigned int mpic_get_one_irq(struct mpic *mpic); -/* This one gets from the primary mpic */ -extern unsigned int mpic_get_irq(void); -/* Fetch Machine Check interrupt from primary mpic */ -extern unsigned int mpic_get_mcirq(void); - -/* Set the EPIC clock ratio */ -void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio); - -/* Enable/Disable EPIC serial interrupt mode */ -void mpic_set_serial_int(struct mpic *mpic, int enable); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_MPIC_H */ diff --git a/include/asm-powerpc/msgbuf.h b/include/asm-powerpc/msgbuf.h deleted file mode 100644 index dd76743..0000000 --- a/include/asm-powerpc/msgbuf.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef _ASM_POWERPC_MSGBUF_H -#define _ASM_POWERPC_MSGBUF_H - -/* - * The msqid64_ds structure for the PowerPC architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; -#ifndef __powerpc64__ - unsigned int __unused1; -#endif - __kernel_time_t msg_stime; /* last msgsnd time */ -#ifndef __powerpc64__ - unsigned int __unused2; -#endif - __kernel_time_t msg_rtime; /* last msgrcv time */ -#ifndef __powerpc64__ - unsigned int __unused3; -#endif - __kernel_time_t msg_ctime; /* last change time */ - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* _ASM_POWERPC_MSGBUF_H */ diff --git a/include/asm-powerpc/mutex.h b/include/asm-powerpc/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-powerpc/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-powerpc/nvram.h b/include/asm-powerpc/nvram.h deleted file mode 100644 index efde5ac..0000000 --- a/include/asm-powerpc/nvram.h +++ /dev/null @@ -1,139 +0,0 @@ -/* - * NVRAM definitions and access functions. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_NVRAM_H -#define _ASM_POWERPC_NVRAM_H - -#include - -#define NVRW_CNT 0x20 -#define NVRAM_HEADER_LEN 16 /* sizeof(struct nvram_header) */ -#define NVRAM_BLOCK_LEN 16 -#define NVRAM_MAX_REQ (2080/NVRAM_BLOCK_LEN) -#define NVRAM_MIN_REQ (1056/NVRAM_BLOCK_LEN) - -#define NVRAM_AS0 0x74 -#define NVRAM_AS1 0x75 -#define NVRAM_DATA 0x77 - - -/* RTC Offsets */ - -#define MOTO_RTC_SECONDS 0x1FF9 -#define MOTO_RTC_MINUTES 0x1FFA -#define MOTO_RTC_HOURS 0x1FFB -#define MOTO_RTC_DAY_OF_WEEK 0x1FFC -#define MOTO_RTC_DAY_OF_MONTH 0x1FFD -#define MOTO_RTC_MONTH 0x1FFE -#define MOTO_RTC_YEAR 0x1FFF -#define MOTO_RTC_CONTROLA 0x1FF8 -#define MOTO_RTC_CONTROLB 0x1FF9 - -#define NVRAM_SIG_SP 0x02 /* support processor */ -#define NVRAM_SIG_OF 0x50 /* open firmware config */ -#define NVRAM_SIG_FW 0x51 /* general firmware */ -#define NVRAM_SIG_HW 0x52 /* hardware (VPD) */ -#define NVRAM_SIG_FLIP 0x5a /* Apple flip/flop header */ -#define NVRAM_SIG_APPL 0x5f /* Apple "system" (???) */ -#define NVRAM_SIG_SYS 0x70 /* system env vars */ -#define NVRAM_SIG_CFG 0x71 /* config data */ -#define NVRAM_SIG_ELOG 0x72 /* error log */ -#define NVRAM_SIG_VEND 0x7e /* vendor defined */ -#define NVRAM_SIG_FREE 0x7f /* Free space */ -#define NVRAM_SIG_OS 0xa0 /* OS defined */ -#define NVRAM_SIG_PANIC 0xa1 /* Apple OSX "panic" */ - -/* If change this size, then change the size of NVNAME_LEN */ -struct nvram_header { - unsigned char signature; - unsigned char checksum; - unsigned short length; - char name[12]; -}; - -#ifdef __KERNEL__ - -#include - -struct nvram_partition { - struct list_head partition; - struct nvram_header header; - unsigned int index; -}; - - -extern int nvram_write_error_log(char * buff, int length, - unsigned int err_type, unsigned int err_seq); -extern int nvram_read_error_log(char * buff, int length, - unsigned int * err_type, unsigned int *err_seq); -extern int nvram_clear_error_log(void); -extern struct nvram_partition *nvram_find_partition(int sig, const char *name); - -extern int pSeries_nvram_init(void); - -#ifdef CONFIG_MMIO_NVRAM -extern int mmio_nvram_init(void); -#else -static inline int mmio_nvram_init(void) -{ - return -ENODEV; -} -#endif - -#endif /* __KERNEL__ */ - -/* PowerMac specific nvram stuffs */ - -enum { - pmac_nvram_OF, /* Open Firmware partition */ - pmac_nvram_XPRAM, /* MacOS XPRAM partition */ - pmac_nvram_NR /* MacOS Name Registry partition */ -}; - -#ifdef __KERNEL__ -/* Return partition offset in nvram */ -extern int pmac_get_partition(int partition); - -/* Direct access to XPRAM on PowerMacs */ -extern u8 pmac_xpram_read(int xpaddr); -extern void pmac_xpram_write(int xpaddr, u8 data); - -/* Synchronize NVRAM */ -extern void nvram_sync(void); - -/* Normal access to NVRAM */ -extern unsigned char nvram_read_byte(int i); -extern void nvram_write_byte(unsigned char c, int i); -#endif - -/* Some offsets in XPRAM */ -#define PMAC_XPRAM_MACHINE_LOC 0xe4 -#define PMAC_XPRAM_SOUND_VOLUME 0x08 - -/* Machine location structure in PowerMac XPRAM */ -struct pmac_machine_location { - unsigned int latitude; /* 2+30 bit Fractional number */ - unsigned int longitude; /* 2+30 bit Fractional number */ - unsigned int delta; /* mix of GMT delta and DLS */ -}; - -/* - * /dev/nvram ioctls - * - * Note that PMAC_NVRAM_GET_OFFSET is still supported, but is - * definitely obsolete. Do not use it if you can avoid it - */ - -#define OBSOLETE_PMAC_NVRAM_GET_OFFSET \ - _IOWR('p', 0x40, int) - -#define IOC_NVRAM_GET_OFFSET _IOWR('p', 0x42, int) /* Get NVRAM partition offset */ -#define IOC_NVRAM_SYNC _IO('p', 0x43) /* Sync NVRAM image */ - -#endif /* _ASM_POWERPC_NVRAM_H */ diff --git a/include/asm-powerpc/of_device.h b/include/asm-powerpc/of_device.h deleted file mode 100644 index 3c12399..0000000 --- a/include/asm-powerpc/of_device.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef _ASM_POWERPC_OF_DEVICE_H -#define _ASM_POWERPC_OF_DEVICE_H -#ifdef __KERNEL__ - -#include -#include - -/* - * The of_device is a kind of "base class" that is a superset of - * struct device for use by devices attached to an OF node and - * probed using OF properties. - */ -struct of_device -{ - struct device_node *node; /* to be obsoleted */ - u64 dma_mask; /* DMA mask */ - struct device dev; /* Generic device interface */ -}; - -extern struct of_device *of_device_alloc(struct device_node *np, - const char *bus_id, - struct device *parent); - -extern int of_device_uevent(struct device *dev, - struct kobj_uevent_env *env); - -/* This is just here during the transition */ -#include - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_OF_DEVICE_H */ diff --git a/include/asm-powerpc/of_platform.h b/include/asm-powerpc/of_platform.h deleted file mode 100644 index 18659ef..0000000 --- a/include/asm-powerpc/of_platform.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef _ASM_POWERPC_OF_PLATFORM_H -#define _ASM_POWERPC_OF_PLATFORM_H -/* - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. - * - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -/* This is just here during the transition */ -#include - -/* Platform drivers register/unregister */ -static inline int of_register_platform_driver(struct of_platform_driver *drv) -{ - return of_register_driver(drv, &of_platform_bus_type); -} -static inline void of_unregister_platform_driver(struct of_platform_driver *drv) -{ - of_unregister_driver(drv); -} - -/* Platform devices and busses creation */ -extern struct of_device *of_platform_device_create(struct device_node *np, - const char *bus_id, - struct device *parent); -/* pseudo "matches" value to not do deep probe */ -#define OF_NO_DEEP_PROBE ((struct of_device_id *)-1) - -extern int of_platform_bus_probe(struct device_node *root, - const struct of_device_id *matches, - struct device *parent); - -extern struct of_device *of_find_device_by_phandle(phandle ph); - -extern void of_instantiate_rtc(void); - -#endif /* _ASM_POWERPC_OF_PLATFORM_H */ diff --git a/include/asm-powerpc/ohare.h b/include/asm-powerpc/ohare.h deleted file mode 100644 index 0d030f9..0000000 --- a/include/asm-powerpc/ohare.h +++ /dev/null @@ -1,54 +0,0 @@ -#ifndef _ASM_POWERPC_OHARE_H -#define _ASM_POWERPC_OHARE_H -#ifdef __KERNEL__ -/* - * ohare.h: definitions for using the "O'Hare" I/O controller chip. - * - * Copyright (C) 1997 Paul Mackerras. - * - * BenH: Changed to match those of heathrow (but not all of them). Please - * check if I didn't break anything (especially the media bay). - */ - -/* offset from ohare base for feature control register */ -#define OHARE_MBCR 0x34 -#define OHARE_FCR 0x38 - -/* - * Bits in feature control register. - * These were mostly derived by experiment on a powerbook 3400 - * and may differ for other machines. - */ -#define OH_SCC_RESET 1 -#define OH_BAY_POWER_N 2 /* a guess */ -#define OH_BAY_PCI_ENABLE 4 /* a guess */ -#define OH_BAY_IDE_ENABLE 8 -#define OH_BAY_FLOPPY_ENABLE 0x10 -#define OH_IDE0_ENABLE 0x20 -#define OH_IDE0_RESET_N 0x40 /* a guess */ -#define OH_BAY_DEV_MASK 0x1c -#define OH_BAY_RESET_N 0x80 -#define OH_IOBUS_ENABLE 0x100 /* IOBUS seems to be IDE */ -#define OH_SCC_ENABLE 0x200 -#define OH_MESH_ENABLE 0x400 -#define OH_FLOPPY_ENABLE 0x800 -#define OH_SCCA_IO 0x4000 -#define OH_SCCB_IO 0x8000 -#define OH_VIA_ENABLE 0x10000 /* Is apparently wrong, to be verified */ -#define OH_IDE1_RESET_N 0x800000 - -/* - * Bits to set in the feature control register on PowerBooks. - */ -#define PBOOK_FEATURES (OH_IDE_ENABLE | OH_SCC_ENABLE | \ - OH_MESH_ENABLE | OH_SCCA_IO | OH_SCCB_IO) - -/* - * A magic value to put into the feature control register of the - * "ohare" I/O controller on Starmaxes to enable the IDE CD interface. - * Contributed by Harry Eaton. - */ -#define STARMAX_FEATURES 0xbeff7a - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_OHARE_H */ diff --git a/include/asm-powerpc/oprofile_impl.h b/include/asm-powerpc/oprofile_impl.h deleted file mode 100644 index 95035c6..0000000 --- a/include/asm-powerpc/oprofile_impl.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (C) 2004 Anton Blanchard , IBM - * - * Based on alpha version. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_OPROFILE_IMPL_H -#define _ASM_POWERPC_OPROFILE_IMPL_H -#ifdef __KERNEL__ - -#define OP_MAX_COUNTER 8 - -/* Per-counter configuration as set via oprofilefs. */ -struct op_counter_config { - unsigned long enabled; - unsigned long event; - unsigned long count; - /* Classic doesn't support per-counter user/kernel selection */ - unsigned long kernel; - unsigned long user; - unsigned long unit_mask; -}; - -/* System-wide configuration as set via oprofilefs. */ -struct op_system_config { -#ifdef CONFIG_PPC64 - unsigned long mmcr0; - unsigned long mmcr1; - unsigned long mmcra; -#endif - unsigned long enable_kernel; - unsigned long enable_user; -}; - -/* Per-arch configuration */ -struct op_powerpc_model { - int (*reg_setup) (struct op_counter_config *, - struct op_system_config *, - int num_counters); - int (*cpu_setup) (struct op_counter_config *); - int (*start) (struct op_counter_config *); - int (*global_start) (struct op_counter_config *); - void (*stop) (void); - void (*global_stop) (void); - int (*sync_start)(void); - int (*sync_stop)(void); - void (*handle_interrupt) (struct pt_regs *, - struct op_counter_config *); - int num_counters; -}; - -extern struct op_powerpc_model op_model_fsl_emb; -extern struct op_powerpc_model op_model_rs64; -extern struct op_powerpc_model op_model_power4; -extern struct op_powerpc_model op_model_7450; -extern struct op_powerpc_model op_model_cell; -extern struct op_powerpc_model op_model_pa6t; - - -/* All the classic PPC parts use these */ -static inline unsigned int classic_ctr_read(unsigned int i) -{ - switch(i) { - case 0: - return mfspr(SPRN_PMC1); - case 1: - return mfspr(SPRN_PMC2); - case 2: - return mfspr(SPRN_PMC3); - case 3: - return mfspr(SPRN_PMC4); - case 4: - return mfspr(SPRN_PMC5); - case 5: - return mfspr(SPRN_PMC6); - -/* No PPC32 chip has more than 6 so far */ -#ifdef CONFIG_PPC64 - case 6: - return mfspr(SPRN_PMC7); - case 7: - return mfspr(SPRN_PMC8); -#endif - default: - return 0; - } -} - -static inline void classic_ctr_write(unsigned int i, unsigned int val) -{ - switch(i) { - case 0: - mtspr(SPRN_PMC1, val); - break; - case 1: - mtspr(SPRN_PMC2, val); - break; - case 2: - mtspr(SPRN_PMC3, val); - break; - case 3: - mtspr(SPRN_PMC4, val); - break; - case 4: - mtspr(SPRN_PMC5, val); - break; - case 5: - mtspr(SPRN_PMC6, val); - break; - -/* No PPC32 chip has more than 6, yet */ -#ifdef CONFIG_PPC64 - case 6: - mtspr(SPRN_PMC7, val); - break; - case 7: - mtspr(SPRN_PMC8, val); - break; -#endif - default: - break; - } -} - - -extern void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_OPROFILE_IMPL_H */ diff --git a/include/asm-powerpc/pSeries_reconfig.h b/include/asm-powerpc/pSeries_reconfig.h deleted file mode 100644 index e482e53..0000000 --- a/include/asm-powerpc/pSeries_reconfig.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef _PPC64_PSERIES_RECONFIG_H -#define _PPC64_PSERIES_RECONFIG_H -#ifdef __KERNEL__ - -#include - -/* - * Use this API if your code needs to know about OF device nodes being - * added or removed on pSeries systems. - */ - -#define PSERIES_RECONFIG_ADD 0x0001 -#define PSERIES_RECONFIG_REMOVE 0x0002 -#define PSERIES_DRCONF_MEM_ADD 0x0003 -#define PSERIES_DRCONF_MEM_REMOVE 0x0004 - -#ifdef CONFIG_PPC_PSERIES -extern int pSeries_reconfig_notifier_register(struct notifier_block *); -extern void pSeries_reconfig_notifier_unregister(struct notifier_block *); -#else /* !CONFIG_PPC_PSERIES */ -static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb) -{ - return 0; -} -static inline void pSeries_reconfig_notifier_unregister(struct notifier_block *nb) { } -#endif /* CONFIG_PPC_PSERIES */ - -#endif /* __KERNEL__ */ -#endif /* _PPC64_PSERIES_RECONFIG_H */ diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h deleted file mode 100644 index 7b56444..0000000 --- a/include/asm-powerpc/paca.h +++ /dev/null @@ -1,114 +0,0 @@ -/* - * include/asm-powerpc/paca.h - * - * This control block defines the PACA which defines the processor - * specific data for each logical processor on the system. - * There are some pointers defined that are utilized by PLIC. - * - * C 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _ASM_POWERPC_PACA_H -#define _ASM_POWERPC_PACA_H -#ifdef __KERNEL__ - -#include -#include -#include - -register struct paca_struct *local_paca asm("r13"); - -#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP) -extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */ -/* - * Add standard checks that preemption cannot occur when using get_paca(): - * otherwise the paca_struct it points to may be the wrong one just after. - */ -#define get_paca() ((void) debug_smp_processor_id(), local_paca) -#else -#define get_paca() local_paca -#endif - -#define get_lppaca() (get_paca()->lppaca_ptr) -#define get_slb_shadow() (get_paca()->slb_shadow_ptr) - -struct task_struct; - -/* - * Defines the layout of the paca. - * - * This structure is not directly accessed by firmware or the service - * processor. - */ -struct paca_struct { - /* - * Because hw_cpu_id, unlike other paca fields, is accessed - * routinely from other CPUs (from the IRQ code), we stick to - * read-only (after boot) fields in the first cacheline to - * avoid cacheline bouncing. - */ - - struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */ - - /* - * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c - * load lock_token and paca_index with a single lwz - * instruction. They must travel together and be properly - * aligned. - */ - u16 lock_token; /* Constant 0x8000, used in locks */ - u16 paca_index; /* Logical processor number */ - - u64 kernel_toc; /* Kernel TOC address */ - u64 stab_real; /* Absolute address of segment table */ - u64 stab_addr; /* Virtual address of segment table */ - void *emergency_sp; /* pointer to emergency stack */ - u64 data_offset; /* per cpu data offset */ - s16 hw_cpu_id; /* Physical processor number */ - u8 cpu_start; /* At startup, processor spins until */ - /* this becomes non-zero. */ - struct slb_shadow *slb_shadow_ptr; - - /* - * Now, starting in cacheline 2, the exception save areas - */ - /* used for most interrupts/exceptions */ - u64 exgen[10] __attribute__((aligned(0x80))); - u64 exmc[10]; /* used for machine checks */ - u64 exslb[10]; /* used for SLB/segment table misses - * on the linear mapping */ - - mm_context_t context; - u16 vmalloc_sllp; - u16 slb_cache_ptr; - u16 slb_cache[SLB_CACHE_ENTRIES]; - - /* - * then miscellaneous read-write fields - */ - struct task_struct *__current; /* Pointer to current */ - u64 kstack; /* Saved Kernel stack addr */ - u64 stab_rr; /* stab/slb round-robin counter */ - u64 saved_r1; /* r1 save for RTAS calls */ - u64 saved_msr; /* MSR saved here by enter_rtas */ - u16 trap_save; /* Used when bad stack is encountered */ - u8 soft_enabled; /* irq soft-enable flag */ - u8 hard_enabled; /* set if irqs are enabled in MSR */ - u8 io_sync; /* writel() needs spin_unlock sync */ - - /* Stuff for accurate time accounting */ - u64 user_time; /* accumulated usermode TB ticks */ - u64 system_time; /* accumulated system TB ticks */ - u64 startpurr; /* PURR/TB value snapshot */ - u64 startspurr; /* SPURR value snapshot */ -}; - -extern struct paca_struct paca[]; -extern void initialise_pacas(void); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_PACA_H */ diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h deleted file mode 100644 index e088545..0000000 --- a/include/asm-powerpc/page.h +++ /dev/null @@ -1,225 +0,0 @@ -#ifndef _ASM_POWERPC_PAGE_H -#define _ASM_POWERPC_PAGE_H - -/* - * Copyright (C) 2001,2005 IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include - -/* - * On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software - * page size. When using 64K pages however, whether we are really supporting - * 64K pages in HW or not is irrelevant to those definitions. - */ -#ifdef CONFIG_PPC_64K_PAGES -#define PAGE_SHIFT 16 -#else -#define PAGE_SHIFT 12 -#endif - -#define PAGE_SIZE (ASM_CONST(1) << PAGE_SHIFT) - -/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */ -#define __HAVE_ARCH_GATE_AREA 1 - -/* - * Subtle: (1 << PAGE_SHIFT) is an int, not an unsigned long. So if we - * assign PAGE_MASK to a larger type it gets extended the way we want - * (i.e. with 1s in the high bits) - */ -#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) - -/* - * KERNELBASE is the virtual address of the start of the kernel, it's often - * the same as PAGE_OFFSET, but _might not be_. - * - * The kdump dump kernel is one example where KERNELBASE != PAGE_OFFSET. - * - * PAGE_OFFSET is the virtual address of the start of lowmem. - * - * PHYSICAL_START is the physical address of the start of the kernel. - * - * MEMORY_START is the physical address of the start of lowmem. - * - * KERNELBASE, PAGE_OFFSET, and PHYSICAL_START are all configurable on - * ppc32 and based on how they are set we determine MEMORY_START. - * - * For the linear mapping the following equation should be true: - * KERNELBASE - PAGE_OFFSET = PHYSICAL_START - MEMORY_START - * - * Also, KERNELBASE >= PAGE_OFFSET and PHYSICAL_START >= MEMORY_START - * - * There are two was to determine a physical address from a virtual one: - * va = pa + PAGE_OFFSET - MEMORY_START - * va = pa + KERNELBASE - PHYSICAL_START - * - * If you want to know something's offset from the start of the kernel you - * should subtract KERNELBASE. - * - * If you want to test if something's a kernel address, use is_kernel_addr(). - */ - -#define KERNELBASE ASM_CONST(CONFIG_KERNEL_START) -#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET) -#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START)) - -#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_FLATMEM) -#ifndef __ASSEMBLY__ -extern phys_addr_t memstart_addr; -extern phys_addr_t kernstart_addr; -#endif -#define PHYSICAL_START kernstart_addr -#define MEMORY_START memstart_addr -#else -#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START) -#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE) -#endif - -#ifdef CONFIG_FLATMEM -#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT) -#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr)) -#endif - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define __va(x) ((void *)((unsigned long)(x) - PHYSICAL_START + KERNELBASE)) -#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE) - -/* - * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, - * and needs to be executable. This means the whole heap ends - * up being executable. - */ -#define VM_DATA_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_DATA_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#ifdef __powerpc64__ -#include -#else -#include -#endif - -/* align addr on a size boundary - adjust address up/down if needed */ -#define _ALIGN_UP(addr,size) (((addr)+((size)-1))&(~((size)-1))) -#define _ALIGN_DOWN(addr,size) ((addr)&(~((size)-1))) - -/* align addr on a size boundary - adjust address up if needed */ -#define _ALIGN(addr,size) _ALIGN_UP(addr,size) - -/* - * Don't compare things with KERNELBASE or PAGE_OFFSET to test for - * "kernelness", use is_kernel_addr() - it should do what you want. - */ -#define is_kernel_addr(x) ((x) >= PAGE_OFFSET) - -#ifndef __ASSEMBLY__ - -#undef STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* These are used to make use of C type-checking. */ - -/* PTE level */ -typedef struct { pte_basic_t pte; } pte_t; -#define pte_val(x) ((x).pte) -#define __pte(x) ((pte_t) { (x) }) - -/* 64k pages additionally define a bigger "real PTE" type that gathers - * the "second half" part of the PTE for pseudo 64k pages - */ -#ifdef CONFIG_PPC_64K_PAGES -typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; -#else -typedef struct { pte_t pte; } real_pte_t; -#endif - -/* PMD level */ -#ifdef CONFIG_PPC64 -typedef struct { unsigned long pmd; } pmd_t; -#define pmd_val(x) ((x).pmd) -#define __pmd(x) ((pmd_t) { (x) }) - -/* PUD level exusts only on 4k pages */ -#ifndef CONFIG_PPC_64K_PAGES -typedef struct { unsigned long pud; } pud_t; -#define pud_val(x) ((x).pud) -#define __pud(x) ((pud_t) { (x) }) -#endif /* !CONFIG_PPC_64K_PAGES */ -#endif /* CONFIG_PPC64 */ - -/* PGD level */ -typedef struct { unsigned long pgd; } pgd_t; -#define pgd_val(x) ((x).pgd) -#define __pgd(x) ((pgd_t) { (x) }) - -/* Page protection bits */ -typedef struct { unsigned long pgprot; } pgprot_t; -#define pgprot_val(x) ((x).pgprot) -#define __pgprot(x) ((pgprot_t) { (x) }) - -#else - -/* - * .. while these make it easier on the compiler - */ - -typedef pte_basic_t pte_t; -#define pte_val(x) (x) -#define __pte(x) (x) - -#ifdef CONFIG_PPC_64K_PAGES -typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; -#else -typedef unsigned long real_pte_t; -#endif - - -#ifdef CONFIG_PPC64 -typedef unsigned long pmd_t; -#define pmd_val(x) (x) -#define __pmd(x) (x) - -#ifndef CONFIG_PPC_64K_PAGES -typedef unsigned long pud_t; -#define pud_val(x) (x) -#define __pud(x) (x) -#endif /* !CONFIG_PPC_64K_PAGES */ -#endif /* CONFIG_PPC64 */ - -typedef unsigned long pgd_t; -#define pgd_val(x) (x) -#define pgprot_val(x) (x) - -typedef unsigned long pgprot_t; -#define __pgd(x) (x) -#define __pgprot(x) (x) - -#endif - -struct page; -extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); -extern void copy_user_page(void *to, void *from, unsigned long vaddr, - struct page *p); -extern int page_is_ram(unsigned long pfn); - -struct vm_area_struct; - -typedef struct page *pgtable_t; - -#include -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_PAGE_H */ diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h deleted file mode 100644 index ebfae53..0000000 --- a/include/asm-powerpc/page_32.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef _ASM_POWERPC_PAGE_32_H -#define _ASM_POWERPC_PAGE_32_H - -#if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0) -#if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0 -#error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN" -#endif -#endif - -#define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32 - -#ifdef CONFIG_NOT_COHERENT_CACHE -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES -#endif - -#ifndef __ASSEMBLY__ -/* - * The basic type of a PTE - 64 bits for those CPUs with > 32 bit - * physical addressing. For now this just the IBM PPC440. - */ -#ifdef CONFIG_PTE_64BIT -typedef unsigned long long pte_basic_t; -#define PTE_SHIFT (PAGE_SHIFT - 3) /* 512 ptes per page */ -#else -typedef unsigned long pte_basic_t; -#define PTE_SHIFT (PAGE_SHIFT - 2) /* 1024 ptes per page */ -#endif - -struct page; -extern void clear_pages(void *page, int order); -static inline void clear_page(void *page) { clear_pages(page, 0); } -extern void copy_page(void *to, void *from); - -#include - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_PAGE_32_H */ diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h deleted file mode 100644 index 043bfdf..0000000 --- a/include/asm-powerpc/page_64.h +++ /dev/null @@ -1,185 +0,0 @@ -#ifndef _ASM_POWERPC_PAGE_64_H -#define _ASM_POWERPC_PAGE_64_H - -/* - * Copyright (C) 2001 PPC64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux - * specific, every notion of page number shared with the firmware, TCEs, - * iommu, etc... still uses a page size of 4K. - */ -#define HW_PAGE_SHIFT 12 -#define HW_PAGE_SIZE (ASM_CONST(1) << HW_PAGE_SHIFT) -#define HW_PAGE_MASK (~(HW_PAGE_SIZE-1)) - -/* - * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and - * HW_PAGE_SHIFT, that is 4K pages. - */ -#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT) - -/* Segment size; normal 256M segments */ -#define SID_SHIFT 28 -#define SID_MASK ASM_CONST(0xfffffffff) -#define ESID_MASK 0xfffffffff0000000UL -#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK) - -/* 1T segments */ -#define SID_SHIFT_1T 40 -#define SID_MASK_1T 0xffffffUL -#define ESID_MASK_1T 0xffffff0000000000UL -#define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T) - -#ifndef __ASSEMBLY__ -#include - -typedef unsigned long pte_basic_t; - -static __inline__ void clear_page(void *addr) -{ - unsigned long lines, line_size; - - line_size = ppc64_caches.dline_size; - lines = ppc64_caches.dlines_per_page; - - __asm__ __volatile__( - "mtctr %1 # clear_page\n\ -1: dcbz 0,%0\n\ - add %0,%0,%3\n\ - bdnz+ 1b" - : "=r" (addr) - : "r" (lines), "0" (addr), "r" (line_size) - : "ctr", "memory"); -} - -extern void copy_4K_page(void *to, void *from); - -#ifdef CONFIG_PPC_64K_PAGES -static inline void copy_page(void *to, void *from) -{ - unsigned int i; - for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) { - copy_4K_page(to, from); - to += 4096; - from += 4096; - } -} -#else /* CONFIG_PPC_64K_PAGES */ -static inline void copy_page(void *to, void *from) -{ - copy_4K_page(to, from); -} -#endif /* CONFIG_PPC_64K_PAGES */ - -/* Log 2 of page table size */ -extern u64 ppc64_pft_size; - -/* Large pages size */ -#ifdef CONFIG_HUGETLB_PAGE -extern unsigned int HPAGE_SHIFT; -#else -#define HPAGE_SHIFT PAGE_SHIFT -#endif -#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) -#define HUGE_MAX_HSTATE 3 - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_PPC_MM_SLICES - -#define SLICE_LOW_SHIFT 28 -#define SLICE_HIGH_SHIFT 40 - -#define SLICE_LOW_TOP (0x100000000ul) -#define SLICE_NUM_LOW (SLICE_LOW_TOP >> SLICE_LOW_SHIFT) -#define SLICE_NUM_HIGH (PGTABLE_RANGE >> SLICE_HIGH_SHIFT) - -#define GET_LOW_SLICE_INDEX(addr) ((addr) >> SLICE_LOW_SHIFT) -#define GET_HIGH_SLICE_INDEX(addr) ((addr) >> SLICE_HIGH_SHIFT) - -#ifndef __ASSEMBLY__ - -struct slice_mask { - u16 low_slices; - u16 high_slices; -}; - -struct mm_struct; - -extern unsigned long slice_get_unmapped_area(unsigned long addr, - unsigned long len, - unsigned long flags, - unsigned int psize, - int topdown, - int use_cache); - -extern unsigned int get_slice_psize(struct mm_struct *mm, - unsigned long addr); - -extern void slice_init_context(struct mm_struct *mm, unsigned int psize); -extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize); -extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start, - unsigned long len, unsigned int psize); - -#define slice_mm_new_context(mm) ((mm)->context.id == 0) - -#endif /* __ASSEMBLY__ */ -#else -#define slice_init() -#define get_slice_psize(mm, addr) ((mm)->context.user_psize) -#define slice_set_user_psize(mm, psize) \ -do { \ - (mm)->context.user_psize = (psize); \ - (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \ -} while (0) -#define slice_set_range_psize(mm, start, len, psize) \ - slice_set_user_psize((mm), (psize)) -#define slice_mm_new_context(mm) 1 -#endif /* CONFIG_PPC_MM_SLICES */ - -#ifdef CONFIG_HUGETLB_PAGE - -#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA - -#endif /* !CONFIG_HUGETLB_PAGE */ - -#ifdef MODULE -#define __page_aligned __attribute__((__aligned__(PAGE_SIZE))) -#else -#define __page_aligned \ - __attribute__((__aligned__(PAGE_SIZE), \ - __section__(".data.page_aligned"))) -#endif - -#define VM_DATA_DEFAULT_FLAGS \ - (test_thread_flag(TIF_32BIT) ? \ - VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64) - -/* - * This is the default if a program doesn't have a PT_GNU_STACK - * program header entry. The PPC64 ELF ABI has a non executable stack - * stack by default, so in the absense of a PT_GNU_STACK program header - * we turn execute permission off. - */ -#define VM_STACK_DEFAULT_FLAGS32 (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_STACK_DEFAULT_FLAGS64 (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#define VM_STACK_DEFAULT_FLAGS \ - (test_thread_flag(TIF_32BIT) ? \ - VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64) - -#include - -#endif /* _ASM_POWERPC_PAGE_64_H */ diff --git a/include/asm-powerpc/param.h b/include/asm-powerpc/param.h deleted file mode 100644 index 094f63d..0000000 --- a/include/asm-powerpc/param.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASM_POWERPC_PARAM_H -#define _ASM_POWERPC_PARAM_H - -#ifdef __KERNEL__ -#define HZ CONFIG_HZ /* internal kernel timer frequency */ -#define USER_HZ 100 /* for user interfaces in "ticks" */ -#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ -#endif /* __KERNEL__ */ - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif /* _ASM_POWERPC_PARAM_H */ diff --git a/include/asm-powerpc/parport.h b/include/asm-powerpc/parport.h deleted file mode 100644 index 414c50e..0000000 --- a/include/asm-powerpc/parport.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * parport.h: platform-specific PC-style parport initialisation - * - * Copyright (C) 1999, 2000 Tim Waugh - * - * This file should only be included by drivers/parport/parport_pc.c. - */ - -#ifndef _ASM_POWERPC_PARPORT_H -#define _ASM_POWERPC_PARPORT_H -#ifdef __KERNEL__ - -#include - -static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma) -{ - struct device_node *np; - const u32 *prop; - u32 io1, io2; - int propsize; - int count = 0; - for (np = NULL; (np = of_find_compatible_node(np, - "parallel", - "pnpPNP,400")) != NULL;) { - prop = of_get_property(np, "reg", &propsize); - if (!prop || propsize > 6*sizeof(u32)) - continue; - io1 = prop[1]; io2 = prop[2]; - prop = of_get_property(np, "interrupts", NULL); - if (!prop) - continue; - if (parport_pc_probe_port(io1, io2, prop[0], autodma, NULL) != NULL) - count++; - } - return count; -} - -#endif /* __KERNEL__ */ -#endif /* !(_ASM_POWERPC_PARPORT_H) */ diff --git a/include/asm-powerpc/pasemi_dma.h b/include/asm-powerpc/pasemi_dma.h deleted file mode 100644 index 19fd793..0000000 --- a/include/asm-powerpc/pasemi_dma.h +++ /dev/null @@ -1,538 +0,0 @@ -/* - * Copyright (C) 2006-2008 PA Semi, Inc - * - * Hardware register layout and descriptor formats for the on-board - * DMA engine on PA Semi PWRficient. Used by ethernet, function and security - * drivers. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef ASM_PASEMI_DMA_H -#define ASM_PASEMI_DMA_H - -/* status register layout in IOB region, at 0xfb800000 */ -struct pasdma_status { - u64 rx_sta[64]; /* RX channel status */ - u64 tx_sta[20]; /* TX channel status */ -}; - - -/* All these registers live in the PCI configuration space for the DMA PCI - * device. Use the normal PCI config access functions for them. - */ -enum { - PAS_DMA_CAP_TXCH = 0x44, /* Transmit Channel Info */ - PAS_DMA_CAP_RXCH = 0x48, /* Transmit Channel Info */ - PAS_DMA_CAP_IFI = 0x4c, /* Interface Info */ - PAS_DMA_COM_TXCMD = 0x100, /* Transmit Command Register */ - PAS_DMA_COM_TXSTA = 0x104, /* Transmit Status Register */ - PAS_DMA_COM_RXCMD = 0x108, /* Receive Command Register */ - PAS_DMA_COM_RXSTA = 0x10c, /* Receive Status Register */ - PAS_DMA_COM_CFG = 0x114, /* Common config reg */ - PAS_DMA_TXF_SFLG0 = 0x140, /* Set flags */ - PAS_DMA_TXF_SFLG1 = 0x144, /* Set flags */ - PAS_DMA_TXF_CFLG0 = 0x148, /* Set flags */ - PAS_DMA_TXF_CFLG1 = 0x14c, /* Set flags */ -}; - - -#define PAS_DMA_CAP_TXCH_TCHN_M 0x00ff0000 /* # of TX channels */ -#define PAS_DMA_CAP_TXCH_TCHN_S 16 - -#define PAS_DMA_CAP_RXCH_RCHN_M 0x00ff0000 /* # of RX channels */ -#define PAS_DMA_CAP_RXCH_RCHN_S 16 - -#define PAS_DMA_CAP_IFI_IOFF_M 0xff000000 /* Cfg reg for intf pointers */ -#define PAS_DMA_CAP_IFI_IOFF_S 24 -#define PAS_DMA_CAP_IFI_NIN_M 0x00ff0000 /* # of interfaces */ -#define PAS_DMA_CAP_IFI_NIN_S 16 - -#define PAS_DMA_COM_TXCMD_EN 0x00000001 /* enable */ -#define PAS_DMA_COM_TXSTA_ACT 0x00000001 /* active */ -#define PAS_DMA_COM_RXCMD_EN 0x00000001 /* enable */ -#define PAS_DMA_COM_RXSTA_ACT 0x00000001 /* active */ - - -/* Per-interface and per-channel registers */ -#define _PAS_DMA_RXINT_STRIDE 0x20 -#define PAS_DMA_RXINT_RCMDSTA(i) (0x200+(i)*_PAS_DMA_RXINT_STRIDE) -#define PAS_DMA_RXINT_RCMDSTA_EN 0x00000001 -#define PAS_DMA_RXINT_RCMDSTA_ST 0x00000002 -#define PAS_DMA_RXINT_RCMDSTA_MBT 0x00000008 -#define PAS_DMA_RXINT_RCMDSTA_MDR 0x00000010 -#define PAS_DMA_RXINT_RCMDSTA_MOO 0x00000020 -#define PAS_DMA_RXINT_RCMDSTA_MBP 0x00000040 -#define PAS_DMA_RXINT_RCMDSTA_BT 0x00000800 -#define PAS_DMA_RXINT_RCMDSTA_DR 0x00001000 -#define PAS_DMA_RXINT_RCMDSTA_OO 0x00002000 -#define PAS_DMA_RXINT_RCMDSTA_BP 0x00004000 -#define PAS_DMA_RXINT_RCMDSTA_TB 0x00008000 -#define PAS_DMA_RXINT_RCMDSTA_ACT 0x00010000 -#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000 -#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17 -#define PAS_DMA_RXINT_CFG(i) (0x204+(i)*_PAS_DMA_RXINT_STRIDE) -#define PAS_DMA_RXINT_CFG_RBP 0x80000000 -#define PAS_DMA_RXINT_CFG_ITRR 0x40000000 -#define PAS_DMA_RXINT_CFG_DHL_M 0x07000000 -#define PAS_DMA_RXINT_CFG_DHL_S 24 -#define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \ - PAS_DMA_RXINT_CFG_DHL_M) -#define PAS_DMA_RXINT_CFG_ITR 0x00400000 -#define PAS_DMA_RXINT_CFG_LW 0x00200000 -#define PAS_DMA_RXINT_CFG_L2 0x00100000 -#define PAS_DMA_RXINT_CFG_HEN 0x00080000 -#define PAS_DMA_RXINT_CFG_WIF 0x00000002 -#define PAS_DMA_RXINT_CFG_WIL 0x00000001 - -#define PAS_DMA_RXINT_INCR(i) (0x210+(i)*_PAS_DMA_RXINT_STRIDE) -#define PAS_DMA_RXINT_INCR_INCR_M 0x0000ffff -#define PAS_DMA_RXINT_INCR_INCR_S 0 -#define PAS_DMA_RXINT_INCR_INCR(x) ((x) & 0x0000ffff) -#define PAS_DMA_RXINT_BASEL(i) (0x218+(i)*_PAS_DMA_RXINT_STRIDE) -#define PAS_DMA_RXINT_BASEL_BRBL(x) ((x) & ~0x3f) -#define PAS_DMA_RXINT_BASEU(i) (0x21c+(i)*_PAS_DMA_RXINT_STRIDE) -#define PAS_DMA_RXINT_BASEU_BRBH(x) ((x) & 0xfff) -#define PAS_DMA_RXINT_BASEU_SIZ_M 0x3fff0000 /* # of cache lines worth of buffer ring */ -#define PAS_DMA_RXINT_BASEU_SIZ_S 16 /* 0 = 16K */ -#define PAS_DMA_RXINT_BASEU_SIZ(x) (((x) << PAS_DMA_RXINT_BASEU_SIZ_S) & \ - PAS_DMA_RXINT_BASEU_SIZ_M) - - -#define _PAS_DMA_TXCHAN_STRIDE 0x20 /* Size per channel */ -#define _PAS_DMA_TXCHAN_TCMDSTA 0x300 /* Command / Status */ -#define _PAS_DMA_TXCHAN_CFG 0x304 /* Configuration */ -#define _PAS_DMA_TXCHAN_DSCRBU 0x308 /* Descriptor BU Allocation */ -#define _PAS_DMA_TXCHAN_INCR 0x310 /* Descriptor increment */ -#define _PAS_DMA_TXCHAN_CNT 0x314 /* Descriptor count/offset */ -#define _PAS_DMA_TXCHAN_BASEL 0x318 /* Descriptor ring base (low) */ -#define _PAS_DMA_TXCHAN_BASEU 0x31c /* (high) */ -#define PAS_DMA_TXCHAN_TCMDSTA(c) (0x300+(c)*_PAS_DMA_TXCHAN_STRIDE) -#define PAS_DMA_TXCHAN_TCMDSTA_EN 0x00000001 /* Enabled */ -#define PAS_DMA_TXCHAN_TCMDSTA_ST 0x00000002 /* Stop interface */ -#define PAS_DMA_TXCHAN_TCMDSTA_ACT 0x00010000 /* Active */ -#define PAS_DMA_TXCHAN_TCMDSTA_SZ 0x00000800 -#define PAS_DMA_TXCHAN_TCMDSTA_DB 0x00000400 -#define PAS_DMA_TXCHAN_TCMDSTA_DE 0x00000200 -#define PAS_DMA_TXCHAN_TCMDSTA_DA 0x00000100 -#define PAS_DMA_TXCHAN_CFG(c) (0x304+(c)*_PAS_DMA_TXCHAN_STRIDE) -#define PAS_DMA_TXCHAN_CFG_TY_IFACE 0x00000000 /* Type = interface */ -#define PAS_DMA_TXCHAN_CFG_TY_COPY 0x00000001 /* Type = copy only */ -#define PAS_DMA_TXCHAN_CFG_TY_FUNC 0x00000002 /* Type = function */ -#define PAS_DMA_TXCHAN_CFG_TY_XOR 0x00000003 /* Type = xor only */ -#define PAS_DMA_TXCHAN_CFG_TATTR_M 0x0000003c -#define PAS_DMA_TXCHAN_CFG_TATTR_S 2 -#define PAS_DMA_TXCHAN_CFG_TATTR(x) (((x) << PAS_DMA_TXCHAN_CFG_TATTR_S) & \ - PAS_DMA_TXCHAN_CFG_TATTR_M) -#define PAS_DMA_TXCHAN_CFG_LPDQ 0x00000800 -#define PAS_DMA_TXCHAN_CFG_LPSQ 0x00000400 -#define PAS_DMA_TXCHAN_CFG_WT_M 0x000003c0 -#define PAS_DMA_TXCHAN_CFG_WT_S 6 -#define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \ - PAS_DMA_TXCHAN_CFG_WT_M) -#define PAS_DMA_TXCHAN_CFG_TRD 0x00010000 /* translate data */ -#define PAS_DMA_TXCHAN_CFG_TRR 0x00008000 /* translate rings */ -#define PAS_DMA_TXCHAN_CFG_UP 0x00004000 /* update tx descr when sent */ -#define PAS_DMA_TXCHAN_CFG_CL 0x00002000 /* Clean last line */ -#define PAS_DMA_TXCHAN_CFG_CF 0x00001000 /* Clean first line */ -#define PAS_DMA_TXCHAN_INCR(c) (0x310+(c)*_PAS_DMA_TXCHAN_STRIDE) -#define PAS_DMA_TXCHAN_BASEL(c) (0x318+(c)*_PAS_DMA_TXCHAN_STRIDE) -#define PAS_DMA_TXCHAN_BASEL_BRBL_M 0xffffffc0 -#define PAS_DMA_TXCHAN_BASEL_BRBL_S 0 -#define PAS_DMA_TXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_TXCHAN_BASEL_BRBL_S) & \ - PAS_DMA_TXCHAN_BASEL_BRBL_M) -#define PAS_DMA_TXCHAN_BASEU(c) (0x31c+(c)*_PAS_DMA_TXCHAN_STRIDE) -#define PAS_DMA_TXCHAN_BASEU_BRBH_M 0x00000fff -#define PAS_DMA_TXCHAN_BASEU_BRBH_S 0 -#define PAS_DMA_TXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_TXCHAN_BASEU_BRBH_S) & \ - PAS_DMA_TXCHAN_BASEU_BRBH_M) -/* # of cache lines worth of buffer ring */ -#define PAS_DMA_TXCHAN_BASEU_SIZ_M 0x3fff0000 -#define PAS_DMA_TXCHAN_BASEU_SIZ_S 16 /* 0 = 16K */ -#define PAS_DMA_TXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_TXCHAN_BASEU_SIZ_S) & \ - PAS_DMA_TXCHAN_BASEU_SIZ_M) - -#define _PAS_DMA_RXCHAN_STRIDE 0x20 /* Size per channel */ -#define _PAS_DMA_RXCHAN_CCMDSTA 0x800 /* Command / Status */ -#define _PAS_DMA_RXCHAN_CFG 0x804 /* Configuration */ -#define _PAS_DMA_RXCHAN_INCR 0x810 /* Descriptor increment */ -#define _PAS_DMA_RXCHAN_CNT 0x814 /* Descriptor count/offset */ -#define _PAS_DMA_RXCHAN_BASEL 0x818 /* Descriptor ring base (low) */ -#define _PAS_DMA_RXCHAN_BASEU 0x81c /* (high) */ -#define PAS_DMA_RXCHAN_CCMDSTA(c) (0x800+(c)*_PAS_DMA_RXCHAN_STRIDE) -#define PAS_DMA_RXCHAN_CCMDSTA_EN 0x00000001 /* Enabled */ -#define PAS_DMA_RXCHAN_CCMDSTA_ST 0x00000002 /* Stop interface */ -#define PAS_DMA_RXCHAN_CCMDSTA_ACT 0x00010000 /* Active */ -#define PAS_DMA_RXCHAN_CCMDSTA_DU 0x00020000 -#define PAS_DMA_RXCHAN_CCMDSTA_OD 0x00002000 -#define PAS_DMA_RXCHAN_CCMDSTA_FD 0x00001000 -#define PAS_DMA_RXCHAN_CCMDSTA_DT 0x00000800 -#define PAS_DMA_RXCHAN_CFG(c) (0x804+(c)*_PAS_DMA_RXCHAN_STRIDE) -#define PAS_DMA_RXCHAN_CFG_CTR 0x00000400 -#define PAS_DMA_RXCHAN_CFG_HBU_M 0x00000380 -#define PAS_DMA_RXCHAN_CFG_HBU_S 7 -#define PAS_DMA_RXCHAN_CFG_HBU(x) (((x) << PAS_DMA_RXCHAN_CFG_HBU_S) & \ - PAS_DMA_RXCHAN_CFG_HBU_M) -#define PAS_DMA_RXCHAN_INCR(c) (0x810+(c)*_PAS_DMA_RXCHAN_STRIDE) -#define PAS_DMA_RXCHAN_BASEL(c) (0x818+(c)*_PAS_DMA_RXCHAN_STRIDE) -#define PAS_DMA_RXCHAN_BASEL_BRBL_M 0xffffffc0 -#define PAS_DMA_RXCHAN_BASEL_BRBL_S 0 -#define PAS_DMA_RXCHAN_BASEL_BRBL(x) (((x) << PAS_DMA_RXCHAN_BASEL_BRBL_S) & \ - PAS_DMA_RXCHAN_BASEL_BRBL_M) -#define PAS_DMA_RXCHAN_BASEU(c) (0x81c+(c)*_PAS_DMA_RXCHAN_STRIDE) -#define PAS_DMA_RXCHAN_BASEU_BRBH_M 0x00000fff -#define PAS_DMA_RXCHAN_BASEU_BRBH_S 0 -#define PAS_DMA_RXCHAN_BASEU_BRBH(x) (((x) << PAS_DMA_RXCHAN_BASEU_BRBH_S) & \ - PAS_DMA_RXCHAN_BASEU_BRBH_M) -/* # of cache lines worth of buffer ring */ -#define PAS_DMA_RXCHAN_BASEU_SIZ_M 0x3fff0000 -#define PAS_DMA_RXCHAN_BASEU_SIZ_S 16 /* 0 = 16K */ -#define PAS_DMA_RXCHAN_BASEU_SIZ(x) (((x) << PAS_DMA_RXCHAN_BASEU_SIZ_S) & \ - PAS_DMA_RXCHAN_BASEU_SIZ_M) - -#define PAS_STATUS_PCNT_M 0x000000000000ffffull -#define PAS_STATUS_PCNT_S 0 -#define PAS_STATUS_DCNT_M 0x00000000ffff0000ull -#define PAS_STATUS_DCNT_S 16 -#define PAS_STATUS_BPCNT_M 0x0000ffff00000000ull -#define PAS_STATUS_BPCNT_S 32 -#define PAS_STATUS_CAUSE_M 0xf000000000000000ull -#define PAS_STATUS_TIMER 0x1000000000000000ull -#define PAS_STATUS_ERROR 0x2000000000000000ull -#define PAS_STATUS_SOFT 0x4000000000000000ull -#define PAS_STATUS_INT 0x8000000000000000ull - -#define PAS_IOB_COM_PKTHDRCNT 0x120 -#define PAS_IOB_COM_PKTHDRCNT_PKTHDR1_M 0x0fff0000 -#define PAS_IOB_COM_PKTHDRCNT_PKTHDR1_S 16 -#define PAS_IOB_COM_PKTHDRCNT_PKTHDR0_M 0x00000fff -#define PAS_IOB_COM_PKTHDRCNT_PKTHDR0_S 0 - -#define PAS_IOB_DMA_RXCH_CFG(i) (0x1100 + (i)*4) -#define PAS_IOB_DMA_RXCH_CFG_CNTTH_M 0x00000fff -#define PAS_IOB_DMA_RXCH_CFG_CNTTH_S 0 -#define PAS_IOB_DMA_RXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_RXCH_CFG_CNTTH_S) & \ - PAS_IOB_DMA_RXCH_CFG_CNTTH_M) -#define PAS_IOB_DMA_TXCH_CFG(i) (0x1200 + (i)*4) -#define PAS_IOB_DMA_TXCH_CFG_CNTTH_M 0x00000fff -#define PAS_IOB_DMA_TXCH_CFG_CNTTH_S 0 -#define PAS_IOB_DMA_TXCH_CFG_CNTTH(x) (((x) << PAS_IOB_DMA_TXCH_CFG_CNTTH_S) & \ - PAS_IOB_DMA_TXCH_CFG_CNTTH_M) -#define PAS_IOB_DMA_RXCH_STAT(i) (0x1300 + (i)*4) -#define PAS_IOB_DMA_RXCH_STAT_INTGEN 0x00001000 -#define PAS_IOB_DMA_RXCH_STAT_CNTDEL_M 0x00000fff -#define PAS_IOB_DMA_RXCH_STAT_CNTDEL_S 0 -#define PAS_IOB_DMA_RXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_RXCH_STAT_CNTDEL_S) &\ - PAS_IOB_DMA_RXCH_STAT_CNTDEL_M) -#define PAS_IOB_DMA_TXCH_STAT(i) (0x1400 + (i)*4) -#define PAS_IOB_DMA_TXCH_STAT_INTGEN 0x00001000 -#define PAS_IOB_DMA_TXCH_STAT_CNTDEL_M 0x00000fff -#define PAS_IOB_DMA_TXCH_STAT_CNTDEL_S 0 -#define PAS_IOB_DMA_TXCH_STAT_CNTDEL(x) (((x) << PAS_IOB_DMA_TXCH_STAT_CNTDEL_S) &\ - PAS_IOB_DMA_TXCH_STAT_CNTDEL_M) -#define PAS_IOB_DMA_RXCH_RESET(i) (0x1500 + (i)*4) -#define PAS_IOB_DMA_RXCH_RESET_PCNT_M 0xffff0000 -#define PAS_IOB_DMA_RXCH_RESET_PCNT_S 16 -#define PAS_IOB_DMA_RXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_RXCH_RESET_PCNT_S) & \ - PAS_IOB_DMA_RXCH_RESET_PCNT_M) -#define PAS_IOB_DMA_RXCH_RESET_PCNTRST 0x00000020 -#define PAS_IOB_DMA_RXCH_RESET_DCNTRST 0x00000010 -#define PAS_IOB_DMA_RXCH_RESET_TINTC 0x00000008 -#define PAS_IOB_DMA_RXCH_RESET_DINTC 0x00000004 -#define PAS_IOB_DMA_RXCH_RESET_SINTC 0x00000002 -#define PAS_IOB_DMA_RXCH_RESET_PINTC 0x00000001 -#define PAS_IOB_DMA_TXCH_RESET(i) (0x1600 + (i)*4) -#define PAS_IOB_DMA_TXCH_RESET_PCNT_M 0xffff0000 -#define PAS_IOB_DMA_TXCH_RESET_PCNT_S 16 -#define PAS_IOB_DMA_TXCH_RESET_PCNT(x) (((x) << PAS_IOB_DMA_TXCH_RESET_PCNT_S) & \ - PAS_IOB_DMA_TXCH_RESET_PCNT_M) -#define PAS_IOB_DMA_TXCH_RESET_PCNTRST 0x00000020 -#define PAS_IOB_DMA_TXCH_RESET_DCNTRST 0x00000010 -#define PAS_IOB_DMA_TXCH_RESET_TINTC 0x00000008 -#define PAS_IOB_DMA_TXCH_RESET_DINTC 0x00000004 -#define PAS_IOB_DMA_TXCH_RESET_SINTC 0x00000002 -#define PAS_IOB_DMA_TXCH_RESET_PINTC 0x00000001 - -#define PAS_IOB_DMA_COM_TIMEOUTCFG 0x1700 -#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M 0x00ffffff -#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S 0 -#define PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(x) (((x) << PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_S) & \ - PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT_M) - -/* Transmit descriptor fields */ -#define XCT_MACTX_T 0x8000000000000000ull -#define XCT_MACTX_ST 0x4000000000000000ull -#define XCT_MACTX_NORES 0x0000000000000000ull -#define XCT_MACTX_8BRES 0x1000000000000000ull -#define XCT_MACTX_24BRES 0x2000000000000000ull -#define XCT_MACTX_40BRES 0x3000000000000000ull -#define XCT_MACTX_I 0x0800000000000000ull -#define XCT_MACTX_O 0x0400000000000000ull -#define XCT_MACTX_E 0x0200000000000000ull -#define XCT_MACTX_VLAN_M 0x0180000000000000ull -#define XCT_MACTX_VLAN_NOP 0x0000000000000000ull -#define XCT_MACTX_VLAN_REMOVE 0x0080000000000000ull -#define XCT_MACTX_VLAN_INSERT 0x0100000000000000ull -#define XCT_MACTX_VLAN_REPLACE 0x0180000000000000ull -#define XCT_MACTX_CRC_M 0x0060000000000000ull -#define XCT_MACTX_CRC_NOP 0x0000000000000000ull -#define XCT_MACTX_CRC_INSERT 0x0020000000000000ull -#define XCT_MACTX_CRC_PAD 0x0040000000000000ull -#define XCT_MACTX_CRC_REPLACE 0x0060000000000000ull -#define XCT_MACTX_SS 0x0010000000000000ull -#define XCT_MACTX_LLEN_M 0x00007fff00000000ull -#define XCT_MACTX_LLEN_S 32ull -#define XCT_MACTX_LLEN(x) ((((long)(x)) << XCT_MACTX_LLEN_S) & \ - XCT_MACTX_LLEN_M) -#define XCT_MACTX_IPH_M 0x00000000f8000000ull -#define XCT_MACTX_IPH_S 27ull -#define XCT_MACTX_IPH(x) ((((long)(x)) << XCT_MACTX_IPH_S) & \ - XCT_MACTX_IPH_M) -#define XCT_MACTX_IPO_M 0x0000000007c00000ull -#define XCT_MACTX_IPO_S 22ull -#define XCT_MACTX_IPO(x) ((((long)(x)) << XCT_MACTX_IPO_S) & \ - XCT_MACTX_IPO_M) -#define XCT_MACTX_CSUM_M 0x0000000000000060ull -#define XCT_MACTX_CSUM_NOP 0x0000000000000000ull -#define XCT_MACTX_CSUM_TCP 0x0000000000000040ull -#define XCT_MACTX_CSUM_UDP 0x0000000000000060ull -#define XCT_MACTX_V6 0x0000000000000010ull -#define XCT_MACTX_C 0x0000000000000004ull -#define XCT_MACTX_AL2 0x0000000000000002ull - -/* Receive descriptor fields */ -#define XCT_MACRX_T 0x8000000000000000ull -#define XCT_MACRX_ST 0x4000000000000000ull -#define XCT_MACRX_RR_M 0x3000000000000000ull -#define XCT_MACRX_RR_NORES 0x0000000000000000ull -#define XCT_MACRX_RR_8BRES 0x1000000000000000ull -#define XCT_MACRX_O 0x0400000000000000ull -#define XCT_MACRX_E 0x0200000000000000ull -#define XCT_MACRX_FF 0x0100000000000000ull -#define XCT_MACRX_PF 0x0080000000000000ull -#define XCT_MACRX_OB 0x0040000000000000ull -#define XCT_MACRX_OD 0x0020000000000000ull -#define XCT_MACRX_FS 0x0010000000000000ull -#define XCT_MACRX_NB_M 0x000fc00000000000ull -#define XCT_MACRX_NB_S 46ULL -#define XCT_MACRX_NB(x) ((((long)(x)) << XCT_MACRX_NB_S) & \ - XCT_MACRX_NB_M) -#define XCT_MACRX_LLEN_M 0x00003fff00000000ull -#define XCT_MACRX_LLEN_S 32ULL -#define XCT_MACRX_LLEN(x) ((((long)(x)) << XCT_MACRX_LLEN_S) & \ - XCT_MACRX_LLEN_M) -#define XCT_MACRX_CRC 0x0000000080000000ull -#define XCT_MACRX_LEN_M 0x0000000060000000ull -#define XCT_MACRX_LEN_TOOSHORT 0x0000000020000000ull -#define XCT_MACRX_LEN_BELOWMIN 0x0000000040000000ull -#define XCT_MACRX_LEN_TRUNC 0x0000000060000000ull -#define XCT_MACRX_CAST_M 0x0000000018000000ull -#define XCT_MACRX_CAST_UNI 0x0000000000000000ull -#define XCT_MACRX_CAST_MULTI 0x0000000008000000ull -#define XCT_MACRX_CAST_BROAD 0x0000000010000000ull -#define XCT_MACRX_CAST_PAUSE 0x0000000018000000ull -#define XCT_MACRX_VLC_M 0x0000000006000000ull -#define XCT_MACRX_FM 0x0000000001000000ull -#define XCT_MACRX_HTY_M 0x0000000000c00000ull -#define XCT_MACRX_HTY_IPV4_OK 0x0000000000000000ull -#define XCT_MACRX_HTY_IPV6 0x0000000000400000ull -#define XCT_MACRX_HTY_IPV4_BAD 0x0000000000800000ull -#define XCT_MACRX_HTY_NONIP 0x0000000000c00000ull -#define XCT_MACRX_IPP_M 0x00000000003f0000ull -#define XCT_MACRX_IPP_S 16 -#define XCT_MACRX_CSUM_M 0x000000000000ffffull -#define XCT_MACRX_CSUM_S 0 - -#define XCT_PTR_T 0x8000000000000000ull -#define XCT_PTR_LEN_M 0x7ffff00000000000ull -#define XCT_PTR_LEN_S 44 -#define XCT_PTR_LEN(x) ((((long)(x)) << XCT_PTR_LEN_S) & \ - XCT_PTR_LEN_M) -#define XCT_PTR_ADDR_M 0x00000fffffffffffull -#define XCT_PTR_ADDR_S 0 -#define XCT_PTR_ADDR(x) ((((long)(x)) << XCT_PTR_ADDR_S) & \ - XCT_PTR_ADDR_M) - -/* Receive interface 8byte result fields */ -#define XCT_RXRES_8B_L4O_M 0xff00000000000000ull -#define XCT_RXRES_8B_L4O_S 56 -#define XCT_RXRES_8B_RULE_M 0x00ffff0000000000ull -#define XCT_RXRES_8B_RULE_S 40 -#define XCT_RXRES_8B_EVAL_M 0x000000ffff000000ull -#define XCT_RXRES_8B_EVAL_S 24 -#define XCT_RXRES_8B_HTYPE_M 0x0000000000f00000ull -#define XCT_RXRES_8B_HASH_M 0x00000000000fffffull -#define XCT_RXRES_8B_HASH_S 0 - -/* Receive interface buffer fields */ -#define XCT_RXB_LEN_M 0x0ffff00000000000ull -#define XCT_RXB_LEN_S 44 -#define XCT_RXB_LEN(x) ((((long)(x)) << XCT_RXB_LEN_S) & \ - XCT_RXB_LEN_M) -#define XCT_RXB_ADDR_M 0x00000fffffffffffull -#define XCT_RXB_ADDR_S 0 -#define XCT_RXB_ADDR(x) ((((long)(x)) << XCT_RXB_ADDR_S) & \ - XCT_RXB_ADDR_M) - -/* Copy descriptor fields */ -#define XCT_COPY_T 0x8000000000000000ull -#define XCT_COPY_ST 0x4000000000000000ull -#define XCT_COPY_RR_M 0x3000000000000000ull -#define XCT_COPY_RR_NORES 0x0000000000000000ull -#define XCT_COPY_RR_8BRES 0x1000000000000000ull -#define XCT_COPY_RR_24BRES 0x2000000000000000ull -#define XCT_COPY_RR_40BRES 0x3000000000000000ull -#define XCT_COPY_I 0x0800000000000000ull -#define XCT_COPY_O 0x0400000000000000ull -#define XCT_COPY_E 0x0200000000000000ull -#define XCT_COPY_STY_ZERO 0x01c0000000000000ull -#define XCT_COPY_DTY_PREF 0x0038000000000000ull -#define XCT_COPY_LLEN_M 0x0007ffff00000000ull -#define XCT_COPY_LLEN_S 32 -#define XCT_COPY_LLEN(x) ((((long)(x)) << XCT_COPY_LLEN_S) & \ - XCT_COPY_LLEN_M) -#define XCT_COPY_SE 0x0000000000000001ull - -/* Function descriptor fields */ -#define XCT_FUN_T 0x8000000000000000ull -#define XCT_FUN_ST 0x4000000000000000ull -#define XCT_FUN_RR_M 0x3000000000000000ull -#define XCT_FUN_RR_NORES 0x0000000000000000ull -#define XCT_FUN_RR_8BRES 0x1000000000000000ull -#define XCT_FUN_RR_24BRES 0x2000000000000000ull -#define XCT_FUN_RR_40BRES 0x3000000000000000ull -#define XCT_FUN_I 0x0800000000000000ull -#define XCT_FUN_O 0x0400000000000000ull -#define XCT_FUN_E 0x0200000000000000ull -#define XCT_FUN_FUN_M 0x01c0000000000000ull -#define XCT_FUN_FUN_S 54 -#define XCT_FUN_FUN(x) ((((long)(x)) << XCT_FUN_FUN_S) & XCT_FUN_FUN_M) -#define XCT_FUN_CRM_M 0x0038000000000000ull -#define XCT_FUN_CRM_NOP 0x0000000000000000ull -#define XCT_FUN_CRM_SIG 0x0008000000000000ull -#define XCT_FUN_LLEN_M 0x0007ffff00000000ull -#define XCT_FUN_LLEN_S 32 -#define XCT_FUN_LLEN(x) ((((long)(x)) << XCT_FUN_LLEN_S) & XCT_FUN_LLEN_M) -#define XCT_FUN_SHL_M 0x00000000f8000000ull -#define XCT_FUN_SHL_S 27 -#define XCT_FUN_SHL(x) ((((long)(x)) << XCT_FUN_SHL_S) & XCT_FUN_SHL_M) -#define XCT_FUN_CHL_M 0x0000000007c00000ull -#define XCT_FUN_HSZ_M 0x00000000003c0000ull -#define XCT_FUN_ALG_M 0x0000000000038000ull -#define XCT_FUN_HP 0x0000000000004000ull -#define XCT_FUN_BCM_M 0x0000000000003800ull -#define XCT_FUN_BCP_M 0x0000000000000600ull -#define XCT_FUN_SIG_M 0x00000000000001f0ull -#define XCT_FUN_SIG_TCP4 0x0000000000000140ull -#define XCT_FUN_SIG_TCP6 0x0000000000000150ull -#define XCT_FUN_SIG_UDP4 0x0000000000000160ull -#define XCT_FUN_SIG_UDP6 0x0000000000000170ull -#define XCT_FUN_A 0x0000000000000008ull -#define XCT_FUN_C 0x0000000000000004ull -#define XCT_FUN_AL2 0x0000000000000002ull -#define XCT_FUN_SE 0x0000000000000001ull - -/* Function descriptor 8byte result fields */ -#define XCT_FUNRES_8B_CS_M 0x0000ffff00000000ull -#define XCT_FUNRES_8B_CS_S 32 -#define XCT_FUNRES_8B_CRC_M 0x00000000ffffffffull -#define XCT_FUNRES_8B_CRC_S 0 - -/* Control descriptor fields */ -#define CTRL_CMD_T 0x8000000000000000ull -#define CTRL_CMD_META_EVT 0x2000000000000000ull -#define CTRL_CMD_O 0x0400000000000000ull -#define CTRL_CMD_ETYPE_M 0x0038000000000000ull -#define CTRL_CMD_ETYPE_EXT 0x0000000000000000ull -#define CTRL_CMD_ETYPE_WSET 0x0020000000000000ull -#define CTRL_CMD_ETYPE_WCLR 0x0028000000000000ull -#define CTRL_CMD_ETYPE_SET 0x0030000000000000ull -#define CTRL_CMD_ETYPE_CLR 0x0038000000000000ull -#define CTRL_CMD_REG_M 0x000000000000007full -#define CTRL_CMD_REG_S 0 -#define CTRL_CMD_REG(x) ((((long)(x)) << CTRL_CMD_REG_S) & \ - CTRL_CMD_REG_M) - - - -/* Prototypes for the shared DMA functions in the platform code. */ - -/* DMA TX Channel type. Right now only limitations used are event types 0/1, - * for event-triggered DMA transactions. - */ - -enum pasemi_dmachan_type { - RXCHAN = 0, /* Any RX chan */ - TXCHAN = 1, /* Any TX chan */ - TXCHAN_EVT0 = 0x1001, /* TX chan in event class 0 (chan 0-9) */ - TXCHAN_EVT1 = 0x2001, /* TX chan in event class 1 (chan 10-19) */ -}; - -struct pasemi_dmachan { - int chno; /* Channel number */ - enum pasemi_dmachan_type chan_type; /* TX / RX */ - u64 *status; /* Ptr to cacheable status */ - int irq; /* IRQ used by channel */ - unsigned int ring_size; /* size of allocated ring */ - dma_addr_t ring_dma; /* DMA address for ring */ - u64 *ring_virt; /* Virt address for ring */ - void *priv; /* Ptr to start of client struct */ -}; - -/* Read/write the different registers in the I/O Bridge, Ethernet - * and DMA Controller - */ -extern unsigned int pasemi_read_iob_reg(unsigned int reg); -extern void pasemi_write_iob_reg(unsigned int reg, unsigned int val); - -extern unsigned int pasemi_read_mac_reg(int intf, unsigned int reg); -extern void pasemi_write_mac_reg(int intf, unsigned int reg, unsigned int val); - -extern unsigned int pasemi_read_dma_reg(unsigned int reg); -extern void pasemi_write_dma_reg(unsigned int reg, unsigned int val); - -/* Channel management routines */ - -extern void *pasemi_dma_alloc_chan(enum pasemi_dmachan_type type, - int total_size, int offset); -extern void pasemi_dma_free_chan(struct pasemi_dmachan *chan); - -extern void pasemi_dma_start_chan(const struct pasemi_dmachan *chan, - const u32 cmdsta); -extern int pasemi_dma_stop_chan(const struct pasemi_dmachan *chan); - -/* Common routines to allocate rings and buffers */ - -extern int pasemi_dma_alloc_ring(struct pasemi_dmachan *chan, int ring_size); -extern void pasemi_dma_free_ring(struct pasemi_dmachan *chan); - -extern void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size, - dma_addr_t *handle); -extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size, - dma_addr_t *handle); - -/* Routines to allocate flags (events) for channel syncronization */ -extern int pasemi_dma_alloc_flag(void); -extern void pasemi_dma_free_flag(int flag); -extern void pasemi_dma_set_flag(int flag); -extern void pasemi_dma_clear_flag(int flag); - -/* Routines to allocate function engines */ -extern int pasemi_dma_alloc_fun(void); -extern void pasemi_dma_free_fun(int fun); - -/* Initialize the library, must be called before any other functions */ -extern int pasemi_dma_init(void); - -#endif /* ASM_PASEMI_DMA_H */ diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h deleted file mode 100644 index ae2ea80..0000000 --- a/include/asm-powerpc/pci-bridge.h +++ /dev/null @@ -1,302 +0,0 @@ -#ifndef _ASM_POWERPC_PCI_BRIDGE_H -#define _ASM_POWERPC_PCI_BRIDGE_H -#ifdef __KERNEL__ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include -#include - -struct device_node; - -extern unsigned int ppc_pci_flags; -enum { - /* Force re-assigning all resources (ignore firmware - * setup completely) - */ - PPC_PCI_REASSIGN_ALL_RSRC = 0x00000001, - - /* Re-assign all bus numbers */ - PPC_PCI_REASSIGN_ALL_BUS = 0x00000002, - - /* Do not try to assign, just use existing setup */ - PPC_PCI_PROBE_ONLY = 0x00000004, - - /* Don't bother with ISA alignment unless the bridge has - * ISA forwarding enabled - */ - PPC_PCI_CAN_SKIP_ISA_ALIGN = 0x00000008, - - /* Enable domain numbers in /proc */ - PPC_PCI_ENABLE_PROC_DOMAINS = 0x00000010, - /* ... except for domain 0 */ - PPC_PCI_COMPAT_DOMAIN_0 = 0x00000020, -}; - - -/* - * Structure of a PCI controller (host bridge) - */ -struct pci_controller { - struct pci_bus *bus; - char is_dynamic; -#ifdef CONFIG_PPC64 - int node; -#endif - struct device_node *dn; - struct list_head list_node; - struct device *parent; - - int first_busno; - int last_busno; -#ifndef CONFIG_PPC64 - int self_busno; -#endif - - void __iomem *io_base_virt; -#ifdef CONFIG_PPC64 - void *io_base_alloc; -#endif - resource_size_t io_base_phys; -#ifndef CONFIG_PPC64 - resource_size_t pci_io_size; -#endif - - /* Some machines (PReP) have a non 1:1 mapping of - * the PCI memory space in the CPU bus space - */ - resource_size_t pci_mem_offset; -#ifdef CONFIG_PPC64 - unsigned long pci_io_size; -#endif - - struct pci_ops *ops; - unsigned int __iomem *cfg_addr; - void __iomem *cfg_data; - -#ifndef CONFIG_PPC64 - /* - * Used for variants of PCI indirect handling and possible quirks: - * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 - * EXT_REG - provides access to PCI-e extended registers - * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS - * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS - * to determine which bus number to match on when generating type0 - * config cycles - * NO_PCIE_LINK - the Freescale PCI-e controllers have issues with - * hanging if we don't have link and try to do config cycles to - * anything but the PHB. Only allow talking to the PHB if this is - * set. - * BIG_ENDIAN - cfg_addr is a big endian register - * BROKEN_MRM - the 440EPx/GRx chips have an errata that causes hangs on - * the PLB4. Effectively disable MRM commands by setting this. - */ -#define PPC_INDIRECT_TYPE_SET_CFG_TYPE 0x00000001 -#define PPC_INDIRECT_TYPE_EXT_REG 0x00000002 -#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS 0x00000004 -#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008 -#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010 -#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x00000020 - u32 indirect_type; -#endif /* !CONFIG_PPC64 */ - /* Currently, we limit ourselves to 1 IO range and 3 mem - * ranges since the common pci_bus structure can't handle more - */ - struct resource io_resource; - struct resource mem_resources[3]; - int global_number; /* PCI domain number */ -#ifdef CONFIG_PPC64 - unsigned long buid; - unsigned long dma_window_base_cur; - unsigned long dma_window_size; - - void *private_data; -#endif /* CONFIG_PPC64 */ -}; - -#ifndef CONFIG_PPC64 - -static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) -{ - return bus->sysdata; -} - -static inline int isa_vaddr_is_ioport(void __iomem *address) -{ - /* No specific ISA handling on ppc32 at this stage, it - * all goes through PCI - */ - return 0; -} - -/* These are used for config access before all the PCI probing - has been done. */ -extern int early_read_config_byte(struct pci_controller *hose, int bus, - int dev_fn, int where, u8 *val); -extern int early_read_config_word(struct pci_controller *hose, int bus, - int dev_fn, int where, u16 *val); -extern int early_read_config_dword(struct pci_controller *hose, int bus, - int dev_fn, int where, u32 *val); -extern int early_write_config_byte(struct pci_controller *hose, int bus, - int dev_fn, int where, u8 val); -extern int early_write_config_word(struct pci_controller *hose, int bus, - int dev_fn, int where, u16 val); -extern int early_write_config_dword(struct pci_controller *hose, int bus, - int dev_fn, int where, u32 val); - -extern int early_find_capability(struct pci_controller *hose, int bus, - int dev_fn, int cap); - -extern void setup_indirect_pci(struct pci_controller* hose, - resource_size_t cfg_addr, - resource_size_t cfg_data, u32 flags); -extern void setup_grackle(struct pci_controller *hose); -#else /* CONFIG_PPC64 */ - -/* - * PCI stuff, for nodes representing PCI devices, pointed to - * by device_node->data. - */ -struct iommu_table; - -struct pci_dn { - int busno; /* pci bus number */ - int devfn; /* pci device and function number */ - - struct pci_controller *phb; /* for pci devices */ - struct iommu_table *iommu_table; /* for phb's or bridges */ - struct device_node *node; /* back-pointer to the device_node */ - - int pci_ext_config_space; /* for pci devices */ - -#ifdef CONFIG_EEH - struct pci_dev *pcidev; /* back-pointer to the pci device */ - int class_code; /* pci device class */ - int eeh_mode; /* See eeh.h for possible EEH_MODEs */ - int eeh_config_addr; - int eeh_pe_config_addr; /* new-style partition endpoint address */ - int eeh_check_count; /* # times driver ignored error */ - int eeh_freeze_count; /* # times this device froze up. */ - int eeh_false_positives; /* # times this device reported #ff's */ - u32 config_space[16]; /* saved PCI config space */ -#endif -}; - -/* Get the pointer to a device_node's pci_dn */ -#define PCI_DN(dn) ((struct pci_dn *) (dn)->data) - -extern struct device_node *fetch_dev_dn(struct pci_dev *dev); - -/* Get a device_node from a pci_dev. This code must be fast except - * in the case where the sysdata is incorrect and needs to be fixed - * up (this will only happen once). - * In this case the sysdata will have been inherited from a PCI host - * bridge or a PCI-PCI bridge further up the tree, so it will point - * to a valid struct pci_dn, just not the one we want. - */ -static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev) -{ - struct device_node *dn = dev->sysdata; - struct pci_dn *pdn = dn->data; - - if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number) - return dn; /* fast path. sysdata is good */ - return fetch_dev_dn(dev); -} - -static inline int pci_device_from_OF_node(struct device_node *np, - u8 *bus, u8 *devfn) -{ - if (!PCI_DN(np)) - return -ENODEV; - *bus = PCI_DN(np)->busno; - *devfn = PCI_DN(np)->devfn; - return 0; -} - -static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) -{ - if (bus->self) - return pci_device_to_OF_node(bus->self); - else - return bus->sysdata; /* Must be root bus (PHB) */ -} - -/** Find the bus corresponding to the indicated device node */ -extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn); - -/** Remove all of the PCI devices under this bus */ -extern void pcibios_remove_pci_devices(struct pci_bus *bus); - -/** Discover new pci devices under this bus, and add them */ -extern void pcibios_add_pci_devices(struct pci_bus *bus); -extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus); - -extern int pcibios_remove_root_bus(struct pci_controller *phb); - -static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus) -{ - struct device_node *busdn = bus->sysdata; - - BUG_ON(busdn == NULL); - return PCI_DN(busdn)->phb; -} - - -extern void isa_bridge_find_early(struct pci_controller *hose); - -static inline int isa_vaddr_is_ioport(void __iomem *address) -{ - /* Check if address hits the reserved legacy IO range */ - unsigned long ea = (unsigned long)address; - return ea >= ISA_IO_BASE && ea < ISA_IO_END; -} - -extern int pcibios_unmap_io_space(struct pci_bus *bus); -extern int pcibios_map_io_space(struct pci_bus *bus); - -/* Return values for ppc_md.pci_probe_mode function */ -#define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ -#define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ -#define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ - -#ifdef CONFIG_NUMA -#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = (NODE)) -#else -#define PHB_SET_NODE(PHB, NODE) ((PHB)->node = -1) -#endif - -#endif /* CONFIG_PPC64 */ - -/* Get the PCI host controller for an OF device */ -extern struct pci_controller *pci_find_hose_for_OF_device( - struct device_node* node); - -/* Fill up host controller resources from the OF node */ -extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, - struct device_node *dev, int primary); - -/* Allocate & free a PCI host bridge structure */ -extern struct pci_controller *pcibios_alloc_controller(struct device_node *dev); -extern void pcibios_free_controller(struct pci_controller *phb); - -#ifdef CONFIG_PCI -extern unsigned long pci_address_to_pio(phys_addr_t address); -extern int pcibios_vaddr_is_ioport(void __iomem *address); -#else -static inline unsigned long pci_address_to_pio(phys_addr_t address) -{ - return (unsigned long)-1; -} -static inline int pcibios_vaddr_is_ioport(void __iomem *address) -{ - return 0; -} -#endif /* CONFIG_PCI */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_PCI_BRIDGE_H */ diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h deleted file mode 100644 index a05a942..0000000 --- a/include/asm-powerpc/pci.h +++ /dev/null @@ -1,228 +0,0 @@ -#ifndef __ASM_POWERPC_PCI_H -#define __ASM_POWERPC_PCI_H -#ifdef __KERNEL__ - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include - -#define PCIBIOS_MIN_IO 0x1000 -#define PCIBIOS_MIN_MEM 0x10000000 - -struct pci_dev; - -/* Values for the `which' argument to sys_pciconfig_iobase syscall. */ -#define IOBASE_BRIDGE_NUMBER 0 -#define IOBASE_MEMORY 1 -#define IOBASE_IO 2 -#define IOBASE_ISA_IO 3 -#define IOBASE_ISA_MEM 4 - -/* - * Set this to 1 if you want the kernel to re-assign all PCI - * bus numbers (don't do that on ppc64 yet !) - */ -#define pcibios_assign_all_busses() (ppc_pci_flags & \ - PPC_PCI_REASSIGN_ALL_BUS) -#define pcibios_scan_all_fns(a, b) 0 - -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) -{ - if (ppc_md.pci_get_legacy_ide_irq) - return ppc_md.pci_get_legacy_ide_irq(dev, channel); - return channel ? 15 : 14; -} - -#ifdef CONFIG_PPC64 - -/* - * We want to avoid touching the cacheline size or MWI bit. - * pSeries firmware sets the cacheline size (which is not the cpu cacheline - * size in all cases) and hardware treats MWI the same as memory write. - */ -#define PCI_DISABLE_MWI - -#ifdef CONFIG_PCI -extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops); -extern struct dma_mapping_ops *get_pci_dma_ops(void); - -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - unsigned long cacheline_size; - u8 byte; - - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); - if (byte == 0) - cacheline_size = 1024; - else - cacheline_size = (int) byte * 4; - - *strat = PCI_DMA_BURST_MULTIPLE; - *strategy_parameter = cacheline_size; -} -#else /* CONFIG_PCI */ -#define set_pci_dma_ops(d) -#define get_pci_dma_ops() NULL -#endif - -#else /* 32-bit */ - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} -#endif -#endif /* CONFIG_PPC64 */ - -extern int pci_domain_nr(struct pci_bus *bus); - -/* Decide whether to display the domain number in /proc */ -extern int pci_proc_domain(struct pci_bus *bus); - - -struct vm_area_struct; -/* Map a range of PCI memory or I/O space for a device into user space */ -int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, int write_combine); - -/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ -#define HAVE_PCI_MMAP 1 - -#if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE) -/* - * For 64-bit kernels, pci_unmap_{single,page} is not a nop. - * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and - * so on are not nops. - * and thus... - */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -#else /* 32-bit && coherent */ - -/* pci_unmap_{page,single} is a nop so... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) -#define pci_unmap_addr(PTR, ADDR_NAME) (0) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) -#define pci_unmap_len(PTR, LEN_NAME) (0) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) - -#endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */ - -#ifdef CONFIG_PPC64 - -/* The PCI address space does not equal the physical memory address - * space (we have an IOMMU). The IDE and SCSI device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -#else /* 32-bit */ - -/* The PCI address space does equal the physical memory - * address space (no IOMMU). The IDE and SCSI device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (1) - -#endif /* CONFIG_PPC64 */ - -extern void pcibios_resource_to_bus(struct pci_dev *dev, - struct pci_bus_region *region, - struct resource *res); - -extern void pcibios_bus_to_resource(struct pci_dev *dev, - struct resource *res, - struct pci_bus_region *region); - -static inline struct resource *pcibios_select_root(struct pci_dev *pdev, - struct resource *res) -{ - struct resource *root = NULL; - - if (res->flags & IORESOURCE_IO) - root = &ioport_resource; - if (res->flags & IORESOURCE_MEM) - root = &iomem_resource; - - return root; -} - -extern void pcibios_setup_new_device(struct pci_dev *dev); - -extern void pcibios_claim_one_bus(struct pci_bus *b); - -extern void pcibios_resource_survey(void); - -extern struct pci_controller *init_phb_dynamic(struct device_node *dn); - -extern struct pci_dev *of_create_pci_dev(struct device_node *node, - struct pci_bus *bus, int devfn); - -extern void of_scan_pci_bridge(struct device_node *node, - struct pci_dev *dev); - -extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); - -extern int pci_read_irq_line(struct pci_dev *dev); - -struct file; -extern pgprot_t pci_phys_mem_access_prot(struct file *file, - unsigned long pfn, - unsigned long size, - pgprot_t prot); - -#define HAVE_ARCH_PCI_RESOURCE_TO_USER -extern void pci_resource_to_user(const struct pci_dev *dev, int bar, - const struct resource *rsrc, - resource_size_t *start, resource_size_t *end); - -extern void pcibios_do_bus_setup(struct pci_bus *bus); -extern void pcibios_fixup_of_probed_bus(struct pci_bus *bus); - -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_PCI_H */ diff --git a/include/asm-powerpc/percpu.h b/include/asm-powerpc/percpu.h deleted file mode 100644 index f879252..0000000 --- a/include/asm-powerpc/percpu.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _ASM_POWERPC_PERCPU_H_ -#define _ASM_POWERPC_PERCPU_H_ -#ifdef __powerpc64__ -#include - -/* - * Same as asm-generic/percpu.h, except that we store the per cpu offset - * in the paca. Based on the x86-64 implementation. - */ - -#ifdef CONFIG_SMP - -#include - -#define __per_cpu_offset(cpu) (paca[cpu].data_offset) -#define __my_cpu_offset local_paca->data_offset -#define per_cpu_offset(x) (__per_cpu_offset(x)) - -#endif /* CONFIG_SMP */ -#endif /* __powerpc64__ */ - -#include - -#endif /* _ASM_POWERPC_PERCPU_H_ */ diff --git a/include/asm-powerpc/pgalloc-32.h b/include/asm-powerpc/pgalloc-32.h deleted file mode 100644 index 58c0714..0000000 --- a/include/asm-powerpc/pgalloc-32.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef _ASM_POWERPC_PGALLOC_32_H -#define _ASM_POWERPC_PGALLOC_32_H - -#include - -extern void __bad_pte(pmd_t *pmd); - -extern pgd_t *pgd_alloc(struct mm_struct *mm); -extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); - -/* - * We don't have any real pmd's, and this code never triggers because - * the pgd will always be present.. - */ -/* #define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); }) */ -#define pmd_free(mm, x) do { } while (0) -#define __pmd_free_tlb(tlb,x) do { } while (0) -/* #define pgd_populate(mm, pmd, pte) BUG() */ - -#ifndef CONFIG_BOOKE -#define pmd_populate_kernel(mm, pmd, pte) \ - (pmd_val(*(pmd)) = __pa(pte) | _PMD_PRESENT) -#define pmd_populate(mm, pmd, pte) \ - (pmd_val(*(pmd)) = (page_to_pfn(pte) << PAGE_SHIFT) | _PMD_PRESENT) -#define pmd_pgtable(pmd) pmd_page(pmd) -#else -#define pmd_populate_kernel(mm, pmd, pte) \ - (pmd_val(*(pmd)) = (unsigned long)pte | _PMD_PRESENT) -#define pmd_populate(mm, pmd, pte) \ - (pmd_val(*(pmd)) = (unsigned long)lowmem_page_address(pte) | _PMD_PRESENT) -#define pmd_pgtable(pmd) pmd_page(pmd) -#endif - -extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); -extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); -extern void pte_free_kernel(struct mm_struct *mm, pte_t *pte); -extern void pte_free(struct mm_struct *mm, pgtable_t pte); - -#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, (pte)) - -#define check_pgt_cache() do { } while (0) - -#endif /* _ASM_POWERPC_PGALLOC_32_H */ diff --git a/include/asm-powerpc/pgalloc-64.h b/include/asm-powerpc/pgalloc-64.h deleted file mode 100644 index 812a1d8..0000000 --- a/include/asm-powerpc/pgalloc-64.h +++ /dev/null @@ -1,166 +0,0 @@ -#ifndef _ASM_POWERPC_PGALLOC_64_H -#define _ASM_POWERPC_PGALLOC_64_H -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include - -#ifndef CONFIG_PPC_SUBPAGE_PROT -static inline void subpage_prot_free(pgd_t *pgd) {} -#endif - -extern struct kmem_cache *pgtable_cache[]; - -#define PGD_CACHE_NUM 0 -#define PUD_CACHE_NUM 1 -#define PMD_CACHE_NUM 1 -#define HUGEPTE_CACHE_NUM 2 -#define PTE_NONCACHE_NUM 7 /* from GFP rather than kmem_cache */ - -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return kmem_cache_alloc(pgtable_cache[PGD_CACHE_NUM], GFP_KERNEL); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - subpage_prot_free(pgd); - kmem_cache_free(pgtable_cache[PGD_CACHE_NUM], pgd); -} - -#ifndef CONFIG_PPC_64K_PAGES - -#define pgd_populate(MM, PGD, PUD) pgd_set(PGD, PUD) - -static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return kmem_cache_alloc(pgtable_cache[PUD_CACHE_NUM], - GFP_KERNEL|__GFP_REPEAT); -} - -static inline void pud_free(struct mm_struct *mm, pud_t *pud) -{ - kmem_cache_free(pgtable_cache[PUD_CACHE_NUM], pud); -} - -static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) -{ - pud_set(pud, (unsigned long)pmd); -} - -#define pmd_populate(mm, pmd, pte_page) \ - pmd_populate_kernel(mm, pmd, page_address(pte_page)) -#define pmd_populate_kernel(mm, pmd, pte) pmd_set(pmd, (unsigned long)(pte)) -#define pmd_pgtable(pmd) pmd_page(pmd) - - -#else /* CONFIG_PPC_64K_PAGES */ - -#define pud_populate(mm, pud, pmd) pud_set(pud, (unsigned long)pmd) - -static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, - pte_t *pte) -{ - pmd_set(pmd, (unsigned long)pte); -} - -#define pmd_populate(mm, pmd, pte_page) \ - pmd_populate_kernel(mm, pmd, page_address(pte_page)) -#define pmd_pgtable(pmd) pmd_page(pmd) - -#endif /* CONFIG_PPC_64K_PAGES */ - -static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return kmem_cache_alloc(pgtable_cache[PMD_CACHE_NUM], - GFP_KERNEL|__GFP_REPEAT); -} - -static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) -{ - kmem_cache_free(pgtable_cache[PMD_CACHE_NUM], pmd); -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) -{ - return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, - unsigned long address) -{ - struct page *page; - pte_t *pte; - - pte = pte_alloc_one_kernel(mm, address); - if (!pte) - return NULL; - page = virt_to_page(pte); - pgtable_page_ctor(page); - return page; -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - free_page((unsigned long)pte); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) -{ - pgtable_page_dtor(ptepage); - __free_page(ptepage); -} - -#define PGF_CACHENUM_MASK 0x7 - -typedef struct pgtable_free { - unsigned long val; -} pgtable_free_t; - -static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum, - unsigned long mask) -{ - BUG_ON(cachenum > PGF_CACHENUM_MASK); - - return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum}; -} - -static inline void pgtable_free(pgtable_free_t pgf) -{ - void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK); - int cachenum = pgf.val & PGF_CACHENUM_MASK; - - if (cachenum == PTE_NONCACHE_NUM) - free_page((unsigned long)p); - else - kmem_cache_free(pgtable_cache[cachenum], p); -} - -extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); - -#define __pte_free_tlb(tlb,ptepage) \ -do { \ - pgtable_page_dtor(ptepage); \ - pgtable_free_tlb(tlb, pgtable_free_cache(page_address(ptepage), \ - PTE_NONCACHE_NUM, PTE_TABLE_SIZE-1)); \ -} while (0) -#define __pmd_free_tlb(tlb, pmd) \ - pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \ - PMD_CACHE_NUM, PMD_TABLE_SIZE-1)) -#ifndef CONFIG_PPC_64K_PAGES -#define __pud_free_tlb(tlb, pud) \ - pgtable_free_tlb(tlb, pgtable_free_cache(pud, \ - PUD_CACHE_NUM, PUD_TABLE_SIZE-1)) -#endif /* CONFIG_PPC_64K_PAGES */ - -#define check_pgt_cache() do { } while (0) - -#endif /* _ASM_POWERPC_PGALLOC_64_H */ diff --git a/include/asm-powerpc/pgalloc.h b/include/asm-powerpc/pgalloc.h deleted file mode 100644 index b4505ed..0000000 --- a/include/asm-powerpc/pgalloc.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_POWERPC_PGALLOC_H -#define _ASM_POWERPC_PGALLOC_H -#ifdef __KERNEL__ - -#ifdef CONFIG_PPC64 -#include -#else -#include -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_PGALLOC_H */ diff --git a/include/asm-powerpc/pgtable-4k.h b/include/asm-powerpc/pgtable-4k.h deleted file mode 100644 index 6b18ba9..0000000 --- a/include/asm-powerpc/pgtable-4k.h +++ /dev/null @@ -1,117 +0,0 @@ -#ifndef _ASM_POWERPC_PGTABLE_4K_H -#define _ASM_POWERPC_PGTABLE_4K_H -/* - * Entries per page directory level. The PTE level must use a 64b record - * for each page table entry. The PMD and PGD level use a 32b record for - * each entry by assuming that each entry is page aligned. - */ -#define PTE_INDEX_SIZE 9 -#define PMD_INDEX_SIZE 7 -#define PUD_INDEX_SIZE 7 -#define PGD_INDEX_SIZE 9 - -#ifndef __ASSEMBLY__ -#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE) -#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) -#define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE) -#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) -#endif /* __ASSEMBLY__ */ - -#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) -#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) -#define PTRS_PER_PUD (1 << PMD_INDEX_SIZE) -#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) - -/* PMD_SHIFT determines what a second-level page table entry can map */ -#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - -/* With 4k base page size, hugepage PTEs go at the PMD level */ -#define MIN_HUGEPTE_SHIFT PMD_SHIFT - -/* PUD_SHIFT determines what a third-level page table entry can map */ -#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) -#define PUD_SIZE (1UL << PUD_SHIFT) -#define PUD_MASK (~(PUD_SIZE-1)) - -/* PGDIR_SHIFT determines what a fourth-level page table entry can map */ -#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* PTE bits */ -#define _PAGE_HASHPTE 0x0400 /* software: pte has an associated HPTE */ -#define _PAGE_SECONDARY 0x8000 /* software: HPTE is in secondary group */ -#define _PAGE_GROUP_IX 0x7000 /* software: HPTE index within group */ -#define _PAGE_F_SECOND _PAGE_SECONDARY -#define _PAGE_F_GIX _PAGE_GROUP_IX -#define _PAGE_SPECIAL 0x10000 /* software: special page */ -#define __HAVE_ARCH_PTE_SPECIAL - -/* PTE flags to conserve for HPTE identification */ -#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | \ - _PAGE_SECONDARY | _PAGE_GROUP_IX) - -/* There is no 4K PFN hack on 4K pages */ -#define _PAGE_4K_PFN 0 - -/* PAGE_MASK gives the right answer below, but only by accident */ -/* It should be preserving the high 48 bits and then specifically */ -/* preserving _PAGE_SECONDARY | _PAGE_GROUP_IX */ -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY | \ - _PAGE_HPTEFLAGS) - -/* Bits to mask out from a PMD to get to the PTE page */ -#define PMD_MASKED_BITS 0 -/* Bits to mask out from a PUD to get to the PMD page */ -#define PUD_MASKED_BITS 0 -/* Bits to mask out from a PGD to get to the PUD page */ -#define PGD_MASKED_BITS 0 - -/* shift to put page number into pte */ -#define PTE_RPN_SHIFT (17) - -#ifdef STRICT_MM_TYPECHECKS -#define __real_pte(e,p) ((real_pte_t){(e)}) -#define __rpte_to_pte(r) ((r).pte) -#else -#define __real_pte(e,p) (e) -#define __rpte_to_pte(r) (__pte(r)) -#endif -#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12) - -#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ - do { \ - index = 0; \ - shift = mmu_psize_defs[psize].shift; \ - -#define pte_iterate_hashed_end() } while(0) - -#ifdef CONFIG_PPC_HAS_HASH_64K -#define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr) -#else -#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K -#endif - -/* - * 4-level page tables related bits - */ - -#define pgd_none(pgd) (!pgd_val(pgd)) -#define pgd_bad(pgd) (pgd_val(pgd) == 0) -#define pgd_present(pgd) (pgd_val(pgd) != 0) -#define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0) -#define pgd_page_vaddr(pgd) (pgd_val(pgd) & ~PGD_MASKED_BITS) -#define pgd_page(pgd) virt_to_page(pgd_page_vaddr(pgd)) - -#define pud_offset(pgdp, addr) \ - (((pud_t *) pgd_page_vaddr(*(pgdp))) + \ - (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))) - -#define pud_ERROR(e) \ - printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e)) - -#define remap_4k_pfn(vma, addr, pfn, prot) \ - remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot)) -#endif /* _ASM_POWERPC_PGTABLE_4K_H */ diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h deleted file mode 100644 index 07b0d8f..0000000 --- a/include/asm-powerpc/pgtable-64k.h +++ /dev/null @@ -1,155 +0,0 @@ -#ifndef _ASM_POWERPC_PGTABLE_64K_H -#define _ASM_POWERPC_PGTABLE_64K_H - -#include - - -#define PTE_INDEX_SIZE 12 -#define PMD_INDEX_SIZE 12 -#define PUD_INDEX_SIZE 0 -#define PGD_INDEX_SIZE 4 - -#ifndef __ASSEMBLY__ -#define PTE_TABLE_SIZE (sizeof(real_pte_t) << PTE_INDEX_SIZE) -#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE) -#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE) - -#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE) -#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE) -#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE) - -#ifdef CONFIG_PPC_SUBPAGE_PROT -/* - * For the sub-page protection option, we extend the PGD with one of - * these. Basically we have a 3-level tree, with the top level being - * the protptrs array. To optimize speed and memory consumption when - * only addresses < 4GB are being protected, pointers to the first - * four pages of sub-page protection words are stored in the low_prot - * array. - * Each page of sub-page protection words protects 1GB (4 bytes - * protects 64k). For the 3-level tree, each page of pointers then - * protects 8TB. - */ -struct subpage_prot_table { - unsigned long maxaddr; /* only addresses < this are protected */ - unsigned int **protptrs[2]; - unsigned int *low_prot[4]; -}; - -#undef PGD_TABLE_SIZE -#define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \ - sizeof(struct subpage_prot_table)) - -#define SBP_L1_BITS (PAGE_SHIFT - 2) -#define SBP_L2_BITS (PAGE_SHIFT - 3) -#define SBP_L1_COUNT (1 << SBP_L1_BITS) -#define SBP_L2_COUNT (1 << SBP_L2_BITS) -#define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS) -#define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS) - -extern void subpage_prot_free(pgd_t *pgd); - -static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) -{ - return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD); -} -#endif /* CONFIG_PPC_SUBPAGE_PROT */ -#endif /* __ASSEMBLY__ */ - -/* With 4k base page size, hugepage PTEs go at the PMD level */ -#define MIN_HUGEPTE_SHIFT PAGE_SHIFT - -/* PMD_SHIFT determines what a second-level page table entry can map */ -#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* Additional PTE bits (don't change without checking asm in hash_low.S) */ -#define __HAVE_ARCH_PTE_SPECIAL -#define _PAGE_SPECIAL 0x00000400 /* software: special page */ -#define _PAGE_HPTE_SUB 0x0ffff000 /* combo only: sub pages HPTE bits */ -#define _PAGE_HPTE_SUB0 0x08000000 /* combo only: first sub page */ -#define _PAGE_COMBO 0x10000000 /* this is a combo 4k page */ -#define _PAGE_4K_PFN 0x20000000 /* PFN is for a single 4k page */ - -/* For 64K page, we don't have a separate _PAGE_HASHPTE bit. Instead, - * we set that to be the whole sub-bits mask. The C code will only - * test this, so a multi-bit mask will work. For combo pages, this - * is equivalent as effectively, the old _PAGE_HASHPTE was an OR of - * all the sub bits. For real 64k pages, we now have the assembly set - * _PAGE_HPTE_SUB0 in addition to setting the HIDX bits which overlap - * that mask. This is fine as long as the HIDX bits are never set on - * a PTE that isn't hashed, which is the case today. - * - * A little nit is for the huge page C code, which does the hashing - * in C, we need to provide which bit to use. - */ -#define _PAGE_HASHPTE _PAGE_HPTE_SUB - -/* Note the full page bits must be in the same location as for normal - * 4k pages as the same asssembly will be used to insert 64K pages - * wether the kernel has CONFIG_PPC_64K_PAGES or not - */ -#define _PAGE_F_SECOND 0x00008000 /* full page: hidx bits */ -#define _PAGE_F_GIX 0x00007000 /* full page: hidx bits */ - -/* PTE flags to conserve for HPTE identification */ -#define _PAGE_HPTEFLAGS (_PAGE_BUSY | _PAGE_HASHPTE | _PAGE_COMBO) - -/* Shift to put page number into pte. - * - * That gives us a max RPN of 34 bits, which means a max of 50 bits - * of addressable physical space, or 46 bits for the special 4k PFNs. - */ -#define PTE_RPN_SHIFT (30) -#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT)) -#define PTE_RPN_MASK (~((1UL<> ((index)<<2)) & 0xf) : ((pte_val((r).pte) >> 12) & 0xf)) -#define __rpte_to_pte(r) ((r).pte) -#define __rpte_sub_valid(rpte, index) \ - (pte_val(rpte.pte) & (_PAGE_HPTE_SUB0 >> (index))) - - -/* Trick: we set __end to va + 64k, which happens works for - * a 16M page as well as we want only one iteration - */ -#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \ - do { \ - unsigned long __end = va + PAGE_SIZE; \ - unsigned __split = (psize == MMU_PAGE_4K || \ - psize == MMU_PAGE_64K_AP); \ - shift = mmu_psize_defs[psize].shift; \ - for (index = 0; va < __end; index++, va += (1L << shift)) { \ - if (!__split || __rpte_sub_valid(rpte, index)) do { \ - -#define pte_iterate_hashed_end() } while(0); } } while(0) - -#define pte_pagesize_index(mm, addr, pte) \ - (((pte) & _PAGE_COMBO)? MMU_PAGE_4K: MMU_PAGE_64K) - -#define remap_4k_pfn(vma, addr, pfn, prot) \ - remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ - __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) - -#endif /* _ASM_POWERPC_PGTABLE_64K_H */ diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h deleted file mode 100644 index 6fe39e3..0000000 --- a/include/asm-powerpc/pgtable-ppc32.h +++ /dev/null @@ -1,802 +0,0 @@ -#ifndef _ASM_POWERPC_PGTABLE_PPC32_H -#define _ASM_POWERPC_PGTABLE_PPC32_H - -#include - -#ifndef __ASSEMBLY__ -#include -#include -#include /* For sub-arch specific PPC_PIN_SIZE */ - -extern unsigned long va_to_phys(unsigned long address); -extern pte_t *va_to_pte(unsigned long address); -extern unsigned long ioremap_bot, ioremap_base; - -#ifdef CONFIG_44x -extern int icache_44x_need_flush; -#endif - -#endif /* __ASSEMBLY__ */ - -/* - * The PowerPC MMU uses a hash table containing PTEs, together with - * a set of 16 segment registers (on 32-bit implementations), to define - * the virtual to physical address mapping. - * - * We use the hash table as an extended TLB, i.e. a cache of currently - * active mappings. We maintain a two-level page table tree, much - * like that used by the i386, for the sake of the Linux memory - * management code. Low-level assembler code in hashtable.S - * (procedure hash_page) is responsible for extracting ptes from the - * tree and putting them into the hash table when necessary, and - * updating the accessed and modified bits in the page table tree. - */ - -/* - * The PowerPC MPC8xx uses a TLB with hardware assisted, software tablewalk. - * We also use the two level tables, but we can put the real bits in them - * needed for the TLB and tablewalk. These definitions require Mx_CTR.PPM = 0, - * Mx_CTR.PPCS = 0, and MD_CTR.TWAM = 1. The level 2 descriptor has - * additional page protection (when Mx_CTR.PPCS = 1) that allows TLB hit - * based upon user/super access. The TLB does not have accessed nor write - * protect. We assume that if the TLB get loaded with an entry it is - * accessed, and overload the changed bit for write protect. We use - * two bits in the software pte that are supposed to be set to zero in - * the TLB entry (24 and 25) for these indicators. Although the level 1 - * descriptor contains the guarded and writethrough/copyback bits, we can - * set these at the page level since they get copied from the Mx_TWC - * register when the TLB entry is loaded. We will use bit 27 for guard, since - * that is where it exists in the MD_TWC, and bit 26 for writethrough. - * These will get masked from the level 2 descriptor at TLB load time, and - * copied to the MD_TWC before it gets loaded. - * Large page sizes added. We currently support two sizes, 4K and 8M. - * This also allows a TLB hander optimization because we can directly - * load the PMD into MD_TWC. The 8M pages are only used for kernel - * mapping of well known areas. The PMD (PGD) entries contain control - * flags in addition to the address, so care must be taken that the - * software no longer assumes these are only pointers. - */ - -/* - * At present, all PowerPC 400-class processors share a similar TLB - * architecture. The instruction and data sides share a unified, - * 64-entry, fully-associative TLB which is maintained totally under - * software control. In addition, the instruction side has a - * hardware-managed, 4-entry, fully-associative TLB which serves as a - * first level to the shared TLB. These two TLBs are known as the UTLB - * and ITLB, respectively (see "mmu.h" for definitions). - */ - -/* - * The normal case is that PTEs are 32-bits and we have a 1-page - * 1024-entry pgdir pointing to 1-page 1024-entry PTE pages. -- paulus - * - * For any >32-bit physical address platform, we can use the following - * two level page table layout where the pgdir is 8KB and the MS 13 bits - * are an index to the second level table. The combined pgdir/pmd first - * level has 2048 entries and the second level has 512 64-bit PTE entries. - * -Matt - */ -/* PGDIR_SHIFT determines what a top-level page table entry can map */ -#define PGDIR_SHIFT (PAGE_SHIFT + PTE_SHIFT) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -/* - * entries per page directory level: our page-table tree is two-level, so - * we don't really have any PMD directory. - */ -#ifndef __ASSEMBLY__ -#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_SHIFT) -#define PGD_TABLE_SIZE (sizeof(pgd_t) << (32 - PGDIR_SHIFT)) -#endif /* __ASSEMBLY__ */ - -#define PTRS_PER_PTE (1 << PTE_SHIFT) -#define PTRS_PER_PMD 1 -#define PTRS_PER_PGD (1 << (32 - PGDIR_SHIFT)) - -#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) -#define FIRST_USER_ADDRESS 0 - -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %llx.\n", __FILE__, __LINE__, \ - (unsigned long long)pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 64MB value just means that there will be a 64MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - * - * We no longer map larger than phys RAM with the BATs so we don't have - * to worry about the VMALLOC_OFFSET causing problems. We do have to worry - * about clashes between our early calls to ioremap() that start growing down - * from ioremap_base being run into the VM area allocations (growing upwards - * from VMALLOC_START). For this reason we have ioremap_bot to check when - * we actually run into our mappings setup in the early boot with the VM - * system. This really does become a problem for machines with good amounts - * of RAM. -- Cort - */ -#define VMALLOC_OFFSET (0x1000000) /* 16M */ -#ifdef PPC_PIN_SIZE -#define VMALLOC_START (((_ALIGN((long)high_memory, PPC_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) -#else -#define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))) -#endif -#define VMALLOC_END ioremap_bot - -/* - * Bits in a linux-style PTE. These match the bits in the - * (hardware-defined) PowerPC PTE as closely as possible. - */ - -#if defined(CONFIG_40x) - -/* There are several potential gotchas here. The 40x hardware TLBLO - field looks like this: - - 0 1 2 3 4 ... 18 19 20 21 22 23 24 25 26 27 28 29 30 31 - RPN..................... 0 0 EX WR ZSEL....... W I M G - - Where possible we make the Linux PTE bits match up with this - - - bits 20 and 21 must be cleared, because we use 4k pages (40x can - support down to 1k pages), this is done in the TLBMiss exception - handler. - - We use only zones 0 (for kernel pages) and 1 (for user pages) - of the 16 available. Bit 24-26 of the TLB are cleared in the TLB - miss handler. Bit 27 is PAGE_USER, thus selecting the correct - zone. - - PRESENT *must* be in the bottom two bits because swap cache - entries use the top 30 bits. Because 40x doesn't support SMP - anyway, M is irrelevant so we borrow it for PAGE_PRESENT. Bit 30 - is cleared in the TLB miss handler before the TLB entry is loaded. - - All other bits of the PTE are loaded into TLBLO without - modification, leaving us only the bits 20, 21, 24, 25, 26, 30 for - software PTE bits. We actually use use bits 21, 24, 25, and - 30 respectively for the software bits: ACCESSED, DIRTY, RW, and - PRESENT. -*/ - -/* Definitions for 40x embedded chips. */ -#define _PAGE_GUARDED 0x001 /* G: page is guarded from prefetch */ -#define _PAGE_FILE 0x001 /* when !present: nonlinear file mapping */ -#define _PAGE_PRESENT 0x002 /* software: PTE contains a translation */ -#define _PAGE_NO_CACHE 0x004 /* I: caching is inhibited */ -#define _PAGE_WRITETHRU 0x008 /* W: caching is write-through */ -#define _PAGE_USER 0x010 /* matches one of the zone permission bits */ -#define _PAGE_RW 0x040 /* software: Writes permitted */ -#define _PAGE_DIRTY 0x080 /* software: dirty page */ -#define _PAGE_HWWRITE 0x100 /* hardware: Dirty & RW, set in exception */ -#define _PAGE_HWEXEC 0x200 /* hardware: EX permission */ -#define _PAGE_ACCESSED 0x400 /* software: R: page referenced */ - -#define _PMD_PRESENT 0x400 /* PMD points to page of PTEs */ -#define _PMD_BAD 0x802 -#define _PMD_SIZE 0x0e0 /* size field, != 0 for large-page PMD entry */ -#define _PMD_SIZE_4M 0x0c0 -#define _PMD_SIZE_16M 0x0e0 -#define PMD_PAGE_SIZE(pmdval) (1024 << (((pmdval) & _PMD_SIZE) >> 4)) - -/* Until my rework is finished, 40x still needs atomic PTE updates */ -#define PTE_ATOMIC_UPDATES 1 - -#elif defined(CONFIG_44x) -/* - * Definitions for PPC440 - * - * Because of the 3 word TLB entries to support 36-bit addressing, - * the attribute are difficult to map in such a fashion that they - * are easily loaded during exception processing. I decided to - * organize the entry so the ERPN is the only portion in the - * upper word of the PTE and the attribute bits below are packed - * in as sensibly as they can be in the area below a 4KB page size - * oriented RPN. This at least makes it easy to load the RPN and - * ERPN fields in the TLB. -Matt - * - * Note that these bits preclude future use of a page size - * less than 4KB. - * - * - * PPC 440 core has following TLB attribute fields; - * - * TLB1: - * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 - * RPN................................. - - - - - - ERPN....... - * - * TLB2: - * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 - * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR - * - * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional - * TLB2 storage attibute fields. Those are: - * - * TLB2: - * 0...10 11 12 13 14 15 16...31 - * no change WL1 IL1I IL1D IL2I IL2D no change - * - * There are some constrains and options, to decide mapping software bits - * into TLB entry. - * - * - PRESENT *must* be in the bottom three bits because swap cache - * entries use the top 29 bits for TLB2. - * - * - FILE *must* be in the bottom three bits because swap cache - * entries use the top 29 bits for TLB2. - * - * - CACHE COHERENT bit (M) has no effect on PPC440 core, because it - * doesn't support SMP. So we can use this as software bit, like - * DIRTY. - * - * With the PPC 44x Linux implementation, the 0-11th LSBs of the PTE are used - * for memory protection related functions (see PTE structure in - * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the - * above bits. Note that the bit values are CPU specific, not architecture - * specific. - * - * The kernel PTE entry holds an arch-dependent swp_entry structure under - * certain situations. In other words, in such situations some portion of - * the PTE bits are used as a swp_entry. In the PPC implementation, the - * 3-24th LSB are shared with swp_entry, however the 0-2nd three LSB still - * hold protection values. That means the three protection bits are - * reserved for both PTE and SWAP entry at the most significant three - * LSBs. - * - * There are three protection bits available for SWAP entry: - * _PAGE_PRESENT - * _PAGE_FILE - * _PAGE_HASHPTE (if HW has) - * - * So those three bits have to be inside of 0-2nd LSB of PTE. - * - */ - -#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */ -#define _PAGE_RW 0x00000002 /* S: Write permission */ -#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */ -#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ -#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ -#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ -#define _PAGE_USER 0x00000040 /* S: User page */ -#define _PAGE_ENDIAN 0x00000080 /* H: E bit */ -#define _PAGE_GUARDED 0x00000100 /* H: G bit */ -#define _PAGE_COHERENT 0x00000200 /* H: M bit */ -#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */ -#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */ - -/* TODO: Add large page lowmem mapping support */ -#define _PMD_PRESENT 0 -#define _PMD_PRESENT_MASK (PAGE_MASK) -#define _PMD_BAD (~PAGE_MASK) - -/* ERPN in a PTE never gets cleared, ignore it */ -#define _PTE_NONE_MASK 0xffffffff00000000ULL - - -#elif defined(CONFIG_FSL_BOOKE) -/* - MMU Assist Register 3: - - 32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63 - RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR - - - PRESENT *must* be in the bottom three bits because swap cache - entries use the top 29 bits. - - - FILE *must* be in the bottom three bits because swap cache - entries use the top 29 bits. -*/ - -/* Definitions for FSL Book-E Cores */ -#define _PAGE_PRESENT 0x00001 /* S: PTE contains a translation */ -#define _PAGE_USER 0x00002 /* S: User page (maps to UR) */ -#define _PAGE_FILE 0x00002 /* S: when !present: nonlinear file mapping */ -#define _PAGE_RW 0x00004 /* S: Write permission (SW) */ -#define _PAGE_DIRTY 0x00008 /* S: Page dirty */ -#define _PAGE_HWEXEC 0x00010 /* H: SX permission */ -#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */ - -#define _PAGE_ENDIAN 0x00040 /* H: E bit */ -#define _PAGE_GUARDED 0x00080 /* H: G bit */ -#define _PAGE_COHERENT 0x00100 /* H: M bit */ -#define _PAGE_NO_CACHE 0x00200 /* H: I bit */ -#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ - -#ifdef CONFIG_PTE_64BIT -/* ERPN in a PTE never gets cleared, ignore it */ -#define _PTE_NONE_MASK 0xffffffffffff0000ULL -#endif - -#define _PMD_PRESENT 0 -#define _PMD_PRESENT_MASK (PAGE_MASK) -#define _PMD_BAD (~PAGE_MASK) - -#elif defined(CONFIG_8xx) -/* Definitions for 8xx embedded chips. */ -#define _PAGE_PRESENT 0x0001 /* Page is valid */ -#define _PAGE_FILE 0x0002 /* when !present: nonlinear file mapping */ -#define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ -#define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ - -/* These five software bits must be masked out when the entry is loaded - * into the TLB. - */ -#define _PAGE_EXEC 0x0008 /* software: i-cache coherency required */ -#define _PAGE_GUARDED 0x0010 /* software: guarded access */ -#define _PAGE_DIRTY 0x0020 /* software: page changed */ -#define _PAGE_RW 0x0040 /* software: user write access allowed */ -#define _PAGE_ACCESSED 0x0080 /* software: page referenced */ - -/* Setting any bits in the nibble with the follow two controls will - * require a TLB exception handler change. It is assumed unused bits - * are always zero. - */ -#define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */ -#define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */ - -#define _PMD_PRESENT 0x0001 -#define _PMD_BAD 0x0ff0 -#define _PMD_PAGE_MASK 0x000c -#define _PMD_PAGE_8M 0x000c - -#define _PTE_NONE_MASK _PAGE_ACCESSED - -/* Until my rework is finished, 8xx still needs atomic PTE updates */ -#define PTE_ATOMIC_UPDATES 1 - -#else /* CONFIG_6xx */ -/* Definitions for 60x, 740/750, etc. */ -#define _PAGE_PRESENT 0x001 /* software: pte contains a translation */ -#define _PAGE_HASHPTE 0x002 /* hash_page has made an HPTE for this pte */ -#define _PAGE_FILE 0x004 /* when !present: nonlinear file mapping */ -#define _PAGE_USER 0x004 /* usermode access allowed */ -#define _PAGE_GUARDED 0x008 /* G: prohibit speculative access */ -#define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */ -#define _PAGE_NO_CACHE 0x020 /* I: cache inhibit */ -#define _PAGE_WRITETHRU 0x040 /* W: cache write-through */ -#define _PAGE_DIRTY 0x080 /* C: page changed */ -#define _PAGE_ACCESSED 0x100 /* R: page referenced */ -#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ -#define _PAGE_RW 0x400 /* software: user write access allowed */ - -#define _PTE_NONE_MASK _PAGE_HASHPTE - -#define _PMD_PRESENT 0 -#define _PMD_PRESENT_MASK (PAGE_MASK) -#define _PMD_BAD (~PAGE_MASK) - -/* Hash table based platforms need atomic updates of the linux PTE */ -#define PTE_ATOMIC_UPDATES 1 - -#endif - -/* - * Some bits are only used on some cpu families... - */ -#ifndef _PAGE_HASHPTE -#define _PAGE_HASHPTE 0 -#endif -#ifndef _PTE_NONE_MASK -#define _PTE_NONE_MASK 0 -#endif -#ifndef _PAGE_SHARED -#define _PAGE_SHARED 0 -#endif -#ifndef _PAGE_HWWRITE -#define _PAGE_HWWRITE 0 -#endif -#ifndef _PAGE_HWEXEC -#define _PAGE_HWEXEC 0 -#endif -#ifndef _PAGE_EXEC -#define _PAGE_EXEC 0 -#endif -#ifndef _PAGE_ENDIAN -#define _PAGE_ENDIAN 0 -#endif -#ifndef _PAGE_COHERENT -#define _PAGE_COHERENT 0 -#endif -#ifndef _PAGE_WRITETHRU -#define _PAGE_WRITETHRU 0 -#endif -#ifndef _PMD_PRESENT_MASK -#define _PMD_PRESENT_MASK _PMD_PRESENT -#endif -#ifndef _PMD_SIZE -#define _PMD_SIZE 0 -#define PMD_PAGE_SIZE(pmd) bad_call_to_PMD_PAGE_SIZE() -#endif - -#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) - - -#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | _PAGE_NO_CACHE | \ - _PAGE_WRITETHRU | _PAGE_ENDIAN | \ - _PAGE_USER | _PAGE_ACCESSED | \ - _PAGE_RW | _PAGE_HWWRITE | _PAGE_DIRTY | \ - _PAGE_EXEC | _PAGE_HWEXEC) -/* - * Note: the _PAGE_COHERENT bit automatically gets set in the hardware - * PTE if CONFIG_SMP is defined (hash_page does this); there is no need - * to have it in the Linux PTE, and in fact the bit could be reused for - * another purpose. -- paulus. - */ - -#ifdef CONFIG_44x -#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_GUARDED) -#else -#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED) -#endif -#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY | _PAGE_HWWRITE) -#define _PAGE_KERNEL (_PAGE_BASE | _PAGE_SHARED | _PAGE_WRENABLE) - -#ifdef CONFIG_PPC_STD_MMU -/* On standard PPC MMU, no user access implies kernel read/write access, - * so to write-protect kernel memory we must turn on user access */ -#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED | _PAGE_USER) -#else -#define _PAGE_KERNEL_RO (_PAGE_BASE | _PAGE_SHARED) -#endif - -#define _PAGE_IO (_PAGE_KERNEL | _PAGE_NO_CACHE | _PAGE_GUARDED) -#define _PAGE_RAM (_PAGE_KERNEL | _PAGE_HWEXEC) - -#if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\ - defined(CONFIG_KPROBES) -/* We want the debuggers to be able to set breakpoints anywhere, so - * don't write protect the kernel text */ -#define _PAGE_RAM_TEXT _PAGE_RAM -#else -#define _PAGE_RAM_TEXT (_PAGE_KERNEL_RO | _PAGE_HWEXEC) -#endif - -#define PAGE_NONE __pgprot(_PAGE_BASE) -#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) -#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) -#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW) -#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_RW | _PAGE_EXEC) -#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) -#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) - -#define PAGE_KERNEL __pgprot(_PAGE_RAM) -#define PAGE_KERNEL_NOCACHE __pgprot(_PAGE_IO) - -/* - * The PowerPC can only do execute protection on a segment (256MB) basis, - * not on a page basis. So we consider execute permission the same as read. - * Also, write permissions imply read permissions. - * This is the closest we can get.. - */ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY_X -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY_X -#define __P100 PAGE_READONLY -#define __P101 PAGE_READONLY_X -#define __P110 PAGE_COPY -#define __P111 PAGE_COPY_X - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY_X -#define __S010 PAGE_SHARED -#define __S011 PAGE_SHARED_X -#define __S100 PAGE_READONLY -#define __S101 PAGE_READONLY_X -#define __S110 PAGE_SHARED -#define __S111 PAGE_SHARED_X - -#ifndef __ASSEMBLY__ -/* Make sure we get a link error if PMD_PAGE_SIZE is ever called on a - * kernel without large page PMD support */ -extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); - -/* - * Conversions between PTE values and page frame numbers. - */ - -/* in some case we want to additionaly adjust where the pfn is in the pte to - * allow room for more flags */ -#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_PTE_64BIT) -#define PFN_SHIFT_OFFSET (PAGE_SHIFT + 8) -#else -#define PFN_SHIFT_OFFSET (PAGE_SHIFT) -#endif - -#define pte_pfn(x) (pte_val(x) >> PFN_SHIFT_OFFSET) -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -#define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ - pgprot_val(prot)) -#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) -#endif /* __ASSEMBLY__ */ - -#define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) -#define pte_clear(mm,addr,ptep) do { set_pte_at((mm), (addr), (ptep), __pte(0)); } while (0) - -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) (pmd_val(pmd) & _PMD_BAD) -#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT_MASK) -#define pmd_clear(pmdp) do { pmd_val(*(pmdp)) = 0; } while (0) - -#ifndef __ASSEMBLY__ -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; } -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } -static inline int pte_special(pte_t pte) { return 0; } - -static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } -static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } - -static inline pte_t pte_wrprotect(pte_t pte) { - pte_val(pte) &= ~(_PAGE_RW | _PAGE_HWWRITE); return pte; } -static inline pte_t pte_mkclean(pte_t pte) { - pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HWWRITE); return pte; } -static inline pte_t pte_mkold(pte_t pte) { - pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } - -static inline pte_t pte_mkwrite(pte_t pte) { - pte_val(pte) |= _PAGE_RW; return pte; } -static inline pte_t pte_mkdirty(pte_t pte) { - pte_val(pte) |= _PAGE_DIRTY; return pte; } -static inline pte_t pte_mkyoung(pte_t pte) { - pte_val(pte) |= _PAGE_ACCESSED; return pte; } -static inline pte_t pte_mkspecial(pte_t pte) { - return pte; } -static inline unsigned long pte_pgprot(pte_t pte) -{ - return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; -} - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); - return pte; -} - -/* - * When flushing the tlb entry for a page, we also need to flush the hash - * table entry. flush_hash_pages is assembler (for speed) in hashtable.S. - */ -extern int flush_hash_pages(unsigned context, unsigned long va, - unsigned long pmdval, int count); - -/* Add an HPTE to the hash table */ -extern void add_hash_page(unsigned context, unsigned long va, - unsigned long pmdval); - -/* - * Atomic PTE updates. - * - * pte_update clears and sets bit atomically, and returns - * the old pte value. In the 64-bit PTE case we lock around the - * low PTE word since we expect ALL flag bits to be there - */ -#ifndef CONFIG_PTE_64BIT -static inline unsigned long pte_update(pte_t *p, - unsigned long clr, - unsigned long set) -{ -#ifdef PTE_ATOMIC_UPDATES - unsigned long old, tmp; - - __asm__ __volatile__("\ -1: lwarx %0,0,%3\n\ - andc %1,%0,%4\n\ - or %1,%1,%5\n" - PPC405_ERR77(0,%3) -" stwcx. %1,0,%3\n\ - bne- 1b" - : "=&r" (old), "=&r" (tmp), "=m" (*p) - : "r" (p), "r" (clr), "r" (set), "m" (*p) - : "cc" ); -#else /* PTE_ATOMIC_UPDATES */ - unsigned long old = pte_val(*p); - *p = __pte((old & ~clr) | set); -#endif /* !PTE_ATOMIC_UPDATES */ - -#ifdef CONFIG_44x - if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC)) - icache_44x_need_flush = 1; -#endif - return old; -} -#else /* CONFIG_PTE_64BIT */ -/* TODO: Change that to only modify the low word and move set_pte_at() - * out of line - */ -static inline unsigned long long pte_update(pte_t *p, - unsigned long clr, - unsigned long set) -{ -#ifdef PTE_ATOMIC_UPDATES - unsigned long long old; - unsigned long tmp; - - __asm__ __volatile__("\ -1: lwarx %L0,0,%4\n\ - lwzx %0,0,%3\n\ - andc %1,%L0,%5\n\ - or %1,%1,%6\n" - PPC405_ERR77(0,%3) -" stwcx. %1,0,%4\n\ - bne- 1b" - : "=&r" (old), "=&r" (tmp), "=m" (*p) - : "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p) - : "cc" ); -#else /* PTE_ATOMIC_UPDATES */ - unsigned long long old = pte_val(*p); - *p = __pte((old & ~(unsigned long long)clr) | set); -#endif /* !PTE_ATOMIC_UPDATES */ - -#ifdef CONFIG_44x - if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC)) - icache_44x_need_flush = 1; -#endif - return old; -} -#endif /* CONFIG_PTE_64BIT */ - -/* - * set_pte stores a linux PTE into the linux page table. - * On machines which use an MMU hash table we avoid changing the - * _PAGE_HASHPTE bit. - */ -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ -#if _PAGE_HASHPTE != 0 - pte_update(ptep, ~_PAGE_HASHPTE, pte_val(pte) & ~_PAGE_HASHPTE); -#else - *ptep = pte; -#endif -} - -/* - * 2.6 calls this without flushing the TLB entry; this is wrong - * for our hash-based implementation, we fix that up here. - */ -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -static inline int __ptep_test_and_clear_young(unsigned int context, unsigned long addr, pte_t *ptep) -{ - unsigned long old; - old = pte_update(ptep, _PAGE_ACCESSED, 0); -#if _PAGE_HASHPTE != 0 - if (old & _PAGE_HASHPTE) { - unsigned long ptephys = __pa(ptep) & PAGE_MASK; - flush_hash_pages(context, addr, ptephys, 1); - } -#endif - return (old & _PAGE_ACCESSED) != 0; -} -#define ptep_test_and_clear_young(__vma, __addr, __ptep) \ - __ptep_test_and_clear_young((__vma)->vm_mm->context.id, __addr, __ptep) - -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, - pte_t *ptep) -{ - return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0)); -} - -#define __HAVE_ARCH_PTEP_SET_WRPROTECT -static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, - pte_t *ptep) -{ - pte_update(ptep, (_PAGE_RW | _PAGE_HWWRITE), 0); -} -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - ptep_set_wrprotect(mm, addr, ptep); -} - - -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) -{ - unsigned long bits = pte_val(entry) & - (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW); - pte_update(ptep, 0, bits); -} - -#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - __ptep_set_access_flags(__ptep, __entry, __dirty); \ - flush_tlb_page_nohash(__vma, __address); \ - } \ - __changed; \ -}) - -/* - * Macro to mark a page protection value as "uncacheable". - */ -#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) - -struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot); -#define __HAVE_PHYS_MEM_ACCESS_PROT - -#define __HAVE_ARCH_PTE_SAME -#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HASHPTE) == 0) - -/* - * Note that on Book E processors, the pmd contains the kernel virtual - * (lowmem) address of the pte page. The physical address is less useful - * because everything runs with translation enabled (even the TLB miss - * handler). On everything else the pmd contains the physical address - * of the pte page. -- paulus - */ -#ifndef CONFIG_BOOKE -#define pmd_page_vaddr(pmd) \ - ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK)) -#define pmd_page(pmd) \ - (mem_map + (pmd_val(pmd) >> PAGE_SHIFT)) -#else -#define pmd_page_vaddr(pmd) \ - ((unsigned long) (pmd_val(pmd) & PAGE_MASK)) -#define pmd_page(pmd) \ - pfn_to_page((__pa(pmd_val(pmd)) >> PAGE_SHIFT)) -#endif - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* to find an entry in a page-table-directory */ -#define pgd_index(address) ((address) >> PGDIR_SHIFT) -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* Find an entry in the third-level page table.. */ -#define pte_index(address) \ - (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset_kernel(dir, addr) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr)) -#define pte_offset_map(dir, addr) \ - ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr)) -#define pte_offset_map_nested(dir, addr) \ - ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr)) - -#define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0) -#define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1) - -/* - * Encode and decode a swap entry. - * Note that the bits we use in a PTE for representing a swap entry - * must not include the _PAGE_PRESENT bit, the _PAGE_FILE bit, or the - *_PAGE_HASHPTE bit (if used). -- paulus - */ -#define __swp_type(entry) ((entry).val & 0x1f) -#define __swp_offset(entry) ((entry).val >> 5) -#define __swp_entry(type, offset) ((swp_entry_t) { (type) | ((offset) << 5) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 3 }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 3 }) - -/* Encode and decode a nonlinear file mapping entry */ -#define PTE_FILE_MAX_BITS 29 -#define pte_to_pgoff(pte) (pte_val(pte) >> 3) -#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE }) - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -extern int get_pteptr(struct mm_struct *mm, unsigned long addr, pte_t **ptep, - pmd_t **pmdp); - -#endif /* !__ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_PGTABLE_PPC32_H */ diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h deleted file mode 100644 index 74c6f38..0000000 --- a/include/asm-powerpc/pgtable-ppc64.h +++ /dev/null @@ -1,468 +0,0 @@ -#ifndef _ASM_POWERPC_PGTABLE_PPC64_H_ -#define _ASM_POWERPC_PGTABLE_PPC64_H_ -/* - * This file contains the functions and defines necessary to modify and use - * the ppc64 hashed page table. - */ - -#ifndef __ASSEMBLY__ -#include -#include -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_PPC_64K_PAGES -#include -#else -#include -#endif - -#define FIRST_USER_ADDRESS 0 - -/* - * Size of EA range mapped by our pagetables. - */ -#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ - PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) -#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) - -#if TASK_SIZE_USER64 > PGTABLE_RANGE -#error TASK_SIZE_USER64 exceeds pagetable range -#endif - -#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT)) -#error TASK_SIZE_USER64 exceeds user VSID range -#endif - - -/* - * Define the address range of the vmalloc VM area. - */ -#define VMALLOC_START ASM_CONST(0xD000000000000000) -#define VMALLOC_SIZE (PGTABLE_RANGE >> 1) -#define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) - -/* - * Define the address ranges for MMIO and IO space : - * - * ISA_IO_BASE = VMALLOC_END, 64K reserved area - * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces - * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE - */ -#define FULL_IO_SIZE 0x80000000ul -#define ISA_IO_BASE (VMALLOC_END) -#define ISA_IO_END (VMALLOC_END + 0x10000ul) -#define PHB_IO_BASE (ISA_IO_END) -#define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE) -#define IOREMAP_BASE (PHB_IO_END) -#define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE) - -/* - * Region IDs - */ -#define REGION_SHIFT 60UL -#define REGION_MASK (0xfUL << REGION_SHIFT) -#define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT) - -#define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START)) -#define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET)) -#define VMEMMAP_REGION_ID (0xfUL) -#define USER_REGION_ID (0UL) - -/* - * Defines the address of the vmemap area, in its own region - */ -#define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT) -#define vmemmap ((struct page *)VMEMMAP_BASE) - - -/* - * Common bits in a linux-style PTE. These match the bits in the - * (hardware-defined) PowerPC PTE as closely as possible. Additional - * bits may be defined in pgtable-*.h - */ -#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */ -#define _PAGE_USER 0x0002 /* matches one of the PP bits */ -#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */ -#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */ -#define _PAGE_GUARDED 0x0008 -#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */ -#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */ -#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */ -#define _PAGE_DIRTY 0x0080 /* C: page changed */ -#define _PAGE_ACCESSED 0x0100 /* R: page referenced */ -#define _PAGE_RW 0x0200 /* software: user write access allowed */ -#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */ - -/* Strong Access Ordering */ -#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT) - -#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT) - -#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY) - -/* __pgprot defined in asm-powerpc/page.h */ -#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED) - -#define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER) -#define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC) -#define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER) -#define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) -#define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER) -#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC) -#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE) -#define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \ - _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED) -#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC) - -#define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE) -#define HAVE_PAGE_AGP - -#define PAGE_PROT_BITS __pgprot(_PAGE_GUARDED | _PAGE_COHERENT | \ - _PAGE_NO_CACHE | _PAGE_WRITETHRU | \ - _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \ - _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC) -/* PTEIDX nibble */ -#define _PTEIDX_SECONDARY 0x8 -#define _PTEIDX_GROUP_IX 0x7 - - -/* - * POWER4 and newer have per page execute protection, older chips can only - * do this on a segment (256MB) basis. - * - * Also, write permissions imply read permissions. - * This is the closest we can get.. - * - * Note due to the way vm flags are laid out, the bits are XWR - */ -#define __P000 PAGE_NONE -#define __P001 PAGE_READONLY -#define __P010 PAGE_COPY -#define __P011 PAGE_COPY -#define __P100 PAGE_READONLY_X -#define __P101 PAGE_READONLY_X -#define __P110 PAGE_COPY_X -#define __P111 PAGE_COPY_X - -#define __S000 PAGE_NONE -#define __S001 PAGE_READONLY -#define __S010 PAGE_SHARED -#define __S011 PAGE_SHARED -#define __S100 PAGE_READONLY_X -#define __S101 PAGE_READONLY_X -#define __S110 PAGE_SHARED_X -#define __S111 PAGE_SHARED_X - -#ifdef CONFIG_HUGETLB_PAGE - -#define HAVE_ARCH_UNMAPPED_AREA -#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN - -#endif - -#ifndef __ASSEMBLY__ - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - * - * mk_pte takes a (struct page *) as input - */ -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot) -{ - pte_t pte; - - - pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot); - return pte; -} - -#define pte_modify(_pte, newprot) \ - (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))) - -#define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0) -#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT) - -/* pte_clear moved to later in this file */ - -#define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT))) -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -#define PMD_BAD_BITS (PTE_TABLE_SIZE-1) -#define PUD_BAD_BITS (PMD_TABLE_SIZE-1) - -#define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval)) -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \ - || (pmd_val(pmd) & PMD_BAD_BITS)) -#define pmd_present(pmd) (pmd_val(pmd) != 0) -#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0) -#define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS) -#define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd)) - -#define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval)) -#define pud_none(pud) (!pud_val(pud)) -#define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \ - || (pud_val(pud) & PUD_BAD_BITS)) -#define pud_present(pud) (pud_val(pud) != 0) -#define pud_clear(pudp) (pud_val(*(pudp)) = 0) -#define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS) -#define pud_page(pud) virt_to_page(pud_page_vaddr(pud)) - -#define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);}) - -/* - * Find an entry in a page-table-directory. We combine the address region - * (the high order N bits) and the pgd portion of the address. - */ -/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */ -#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff) - -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -#define pmd_offset(pudp,addr) \ - (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))) - -#define pte_offset_kernel(dir,addr) \ - (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) - -#define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr)) -#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr)) -#define pte_unmap(pte) do { } while(0) -#define pte_unmap_nested(pte) do { } while(0) - -/* to find an entry in a kernel page-table-directory */ -/* This now only contains the vmalloc pages */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;} -static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;} -static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;} -static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;} -static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; } - -static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } -static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } - -static inline pte_t pte_wrprotect(pte_t pte) { - pte_val(pte) &= ~(_PAGE_RW); return pte; } -static inline pte_t pte_mkclean(pte_t pte) { - pte_val(pte) &= ~(_PAGE_DIRTY); return pte; } -static inline pte_t pte_mkold(pte_t pte) { - pte_val(pte) &= ~_PAGE_ACCESSED; return pte; } -static inline pte_t pte_mkwrite(pte_t pte) { - pte_val(pte) |= _PAGE_RW; return pte; } -static inline pte_t pte_mkdirty(pte_t pte) { - pte_val(pte) |= _PAGE_DIRTY; return pte; } -static inline pte_t pte_mkyoung(pte_t pte) { - pte_val(pte) |= _PAGE_ACCESSED; return pte; } -static inline pte_t pte_mkhuge(pte_t pte) { - return pte; } -static inline pte_t pte_mkspecial(pte_t pte) { - pte_val(pte) |= _PAGE_SPECIAL; return pte; } -static inline unsigned long pte_pgprot(pte_t pte) -{ - return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; -} - -/* Atomic PTE updates */ -static inline unsigned long pte_update(struct mm_struct *mm, - unsigned long addr, - pte_t *ptep, unsigned long clr, - int huge) -{ - unsigned long old, tmp; - - __asm__ __volatile__( - "1: ldarx %0,0,%3 # pte_update\n\ - andi. %1,%0,%6\n\ - bne- 1b \n\ - andc %1,%0,%4 \n\ - stdcx. %1,0,%3 \n\ - bne- 1b" - : "=&r" (old), "=&r" (tmp), "=m" (*ptep) - : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY) - : "cc" ); - - if (old & _PAGE_HASHPTE) - hpte_need_flush(mm, addr, ptep, old, huge); - return old; -} - -static inline int __ptep_test_and_clear_young(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - unsigned long old; - - if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0) - return 0; - old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0); - return (old & _PAGE_ACCESSED) != 0; -} -#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG -#define ptep_test_and_clear_young(__vma, __addr, __ptep) \ -({ \ - int __r; \ - __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \ - __r; \ -}) - -#define __HAVE_ARCH_PTEP_SET_WRPROTECT -static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, - pte_t *ptep) -{ - unsigned long old; - - if ((pte_val(*ptep) & _PAGE_RW) == 0) - return; - old = pte_update(mm, addr, ptep, _PAGE_RW, 0); -} - -static inline void huge_ptep_set_wrprotect(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - unsigned long old; - - if ((pte_val(*ptep) & _PAGE_RW) == 0) - return; - old = pte_update(mm, addr, ptep, _PAGE_RW, 1); -} - -/* - * We currently remove entries from the hashtable regardless of whether - * the entry was young or dirty. The generic routines only flush if the - * entry was young or dirty which is not good enough. - * - * We should be more intelligent about this but for the moment we override - * these functions and force a tlb flush unconditionally - */ -#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH -#define ptep_clear_flush_young(__vma, __address, __ptep) \ -({ \ - int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \ - __ptep); \ - __young; \ -}) - -#define __HAVE_ARCH_PTEP_GET_AND_CLEAR -static inline pte_t ptep_get_and_clear(struct mm_struct *mm, - unsigned long addr, pte_t *ptep) -{ - unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0); - return __pte(old); -} - -static inline void pte_clear(struct mm_struct *mm, unsigned long addr, - pte_t * ptep) -{ - pte_update(mm, addr, ptep, ~0UL, 0); -} - -/* - * set_pte stores a linux PTE into the linux page table. - */ -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, pte_t pte) -{ - if (pte_present(*ptep)) - pte_clear(mm, addr, ptep); - pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); - *ptep = pte; -} - -/* Set the dirty and/or accessed bits atomically in a linux PTE, this - * function doesn't need to flush the hash entry - */ -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty) -{ - unsigned long bits = pte_val(entry) & - (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC); - unsigned long old, tmp; - - __asm__ __volatile__( - "1: ldarx %0,0,%4\n\ - andi. %1,%0,%6\n\ - bne- 1b \n\ - or %0,%3,%0\n\ - stdcx. %0,0,%4\n\ - bne- 1b" - :"=&r" (old), "=&r" (tmp), "=m" (*ptep) - :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY) - :"cc"); -} -#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - __ptep_set_access_flags(__ptep, __entry, __dirty); \ - flush_tlb_page_nohash(__vma, __address); \ - } \ - __changed; \ -}) - -/* - * Macro to mark a page protection value as "uncacheable". - */ -#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED)) - -struct file; -extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, - unsigned long size, pgprot_t vma_prot); -#define __HAVE_PHYS_MEM_ACCESS_PROT - -#define __HAVE_ARCH_PTE_SAME -#define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0) - -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pmd_ERROR(e) \ - printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* Encode and de-code a swap entry */ -#define __swp_type(entry) (((entry).val >> 1) & 0x3f) -#define __swp_offset(entry) ((entry).val >> 8) -#define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)}) -#define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT}) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT }) -#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT) -#define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) -#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) - -void pgtable_cache_init(void); - -/* - * find_linux_pte returns the address of a linux pte for a given - * effective address and directory. If not found, it returns zero. - */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea) -{ - pgd_t *pg; - pud_t *pu; - pmd_t *pm; - pte_t *pt = NULL; - - pg = pgdir + pgd_index(ea); - if (!pgd_none(*pg)) { - pu = pud_offset(pg, ea); - if (!pud_none(*pu)) { - pm = pmd_offset(pu, ea); - if (pmd_present(*pm)) - pt = pte_offset_kernel(pm, ea); - } - } - return pt; -} - -pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long address); - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */ diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h deleted file mode 100644 index dbb8ca1..0000000 --- a/include/asm-powerpc/pgtable.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef _ASM_POWERPC_PGTABLE_H -#define _ASM_POWERPC_PGTABLE_H -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ -#include /* For TASK_SIZE */ -#include -#include -struct mm_struct; -#endif /* !__ASSEMBLY__ */ - -#if defined(CONFIG_PPC64) -# include -#else -# include -#endif - -#ifndef __ASSEMBLY__ -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern unsigned long empty_zero_page[]; -#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) - -extern pgd_t swapper_pg_dir[]; - -extern void paging_init(void); - -/* - * kern_addr_valid is intended to indicate whether an address is a valid - * kernel address. Most 32-bit archs define it as always true (like this) - * but most 64-bit archs actually perform a test. What should we do here? - */ -#define kern_addr_valid(addr) (1) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - -#include - - -/* - * This gets called at the end of handling a page fault, when - * the kernel has put a new PTE into the page table for the process. - * We use it to ensure coherency between the i-cache and d-cache - * for the page which has just been mapped in. - * On machines which use an MMU hash table, we use this to put a - * corresponding HPTE into the hash table ahead of time, instead of - * waiting for the inevitable extra hash-table miss exception. - */ -extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_PGTABLE_H */ diff --git a/include/asm-powerpc/phyp_dump.h b/include/asm-powerpc/phyp_dump.h deleted file mode 100644 index fa74c6c..0000000 --- a/include/asm-powerpc/phyp_dump.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Hypervisor-assisted dump - * - * Linas Vepstas, Manish Ahuja 2008 - * Copyright 2008 IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _PPC64_PHYP_DUMP_H -#define _PPC64_PHYP_DUMP_H - -#ifdef CONFIG_PHYP_DUMP - -/* The RMR region will be saved for later dumping - * whenever the kernel crashes. Set this to 256MB. */ -#define PHYP_DUMP_RMR_START 0x0 -#define PHYP_DUMP_RMR_END (1UL<<28) - -struct phyp_dump { - /* Memory that is reserved during very early boot. */ - unsigned long init_reserve_start; - unsigned long init_reserve_size; - /* cmd line options during boot */ - unsigned long reserve_bootvar; - unsigned long phyp_dump_at_boot; - /* Check status during boot if dump supported, active & present*/ - unsigned long phyp_dump_configured; - unsigned long phyp_dump_is_active; - /* store cpu & hpte size */ - unsigned long cpu_state_size; - unsigned long hpte_region_size; - /* previous scratch area values */ - unsigned long reserved_scratch_addr; - unsigned long reserved_scratch_size; -}; - -extern struct phyp_dump *phyp_dump_info; - -int early_init_dt_scan_phyp_dump(unsigned long node, - const char *uname, int depth, void *data); - -#endif /* CONFIG_PHYP_DUMP */ -#endif /* _PPC64_PHYP_DUMP_H */ diff --git a/include/asm-powerpc/pmac_feature.h b/include/asm-powerpc/pmac_feature.h deleted file mode 100644 index 877c35a..0000000 --- a/include/asm-powerpc/pmac_feature.h +++ /dev/null @@ -1,405 +0,0 @@ -/* - * Definition of platform feature hooks for PowerMacs - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1998 Paul Mackerras & - * Ben. Herrenschmidt. - * - * - * Note: I removed media-bay details from the feature stuff, I believe it's - * not worth it, the media-bay driver can directly use the mac-io - * ASIC registers. - * - * Implementation note: Currently, none of these functions will block. - * However, they may internally protect themselves with a spinlock - * for way too long. Be prepared for at least some of these to block - * in the future. - * - * Unless specifically defined, the result code is assumed to be an - * error when negative, 0 is the default success result. Some functions - * may return additional positive result values. - * - * To keep implementation simple, all feature calls are assumed to have - * the prototype parameters (struct device_node* node, int value). - * When either is not used, pass 0. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_POWERPC_PMAC_FEATURE_H -#define __ASM_POWERPC_PMAC_FEATURE_H - -#include -#include - -/* - * Known Mac motherboard models - * - * Please, report any error here to benh@kernel.crashing.org, thanks ! - * - * Note that I don't fully maintain this list for Core99 & MacRISC2 - * and I'm considering removing all NewWorld entries from it and - * entirely rely on the model string. - */ - -/* PowerSurge are the first generation of PCI Pmacs. This include - * all of the Grand-Central based machines. We currently don't - * differenciate most of them. - */ -#define PMAC_TYPE_PSURGE 0x10 /* PowerSurge */ -#define PMAC_TYPE_ANS 0x11 /* Apple Network Server */ - -/* Here is the infamous serie of OHare based machines - */ -#define PMAC_TYPE_COMET 0x20 /* Beleived to be PowerBook 2400 */ -#define PMAC_TYPE_HOOPER 0x21 /* Beleived to be PowerBook 3400 */ -#define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ -#define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ -#define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ -#define PMAC_TYPE_UNKNOWN_OHARE 0x2f /* Unknown, but OHare based */ - -/* Here are the Heathrow based machines - * FIXME: Differenciate wallstreet,mainstreet,wallstreetII - */ -#define PMAC_TYPE_GOSSAMER 0x30 /* Gossamer motherboard */ -#define PMAC_TYPE_SILK 0x31 /* Desktop PowerMac G3 */ -#define PMAC_TYPE_WALLSTREET 0x32 /* Wallstreet/Mainstreet PowerBook*/ -#define PMAC_TYPE_UNKNOWN_HEATHROW 0x3f /* Unknown but heathrow based */ - -/* Here are newworld machines based on Paddington (heathrow derivative) - */ -#define PMAC_TYPE_101_PBOOK 0x40 /* 101 PowerBook (aka Lombard) */ -#define PMAC_TYPE_ORIG_IMAC 0x41 /* First generation iMac */ -#define PMAC_TYPE_YOSEMITE 0x42 /* B&W G3 */ -#define PMAC_TYPE_YIKES 0x43 /* Yikes G4 (PCI graphics) */ -#define PMAC_TYPE_UNKNOWN_PADDINGTON 0x4f /* Unknown but paddington based */ - -/* Core99 machines based on UniNorth 1.0 and 1.5 - * - * Note: A single entry here may cover several actual models according - * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most - * FireWire based iMacs, etc...). Those machines are too similar to be - * distinguished here, when they need to be differencied, use the - * device-tree "model" or "compatible" property. - */ -#define PMAC_TYPE_ORIG_IBOOK 0x40 /* First iBook model (no firewire) */ -#define PMAC_TYPE_SAWTOOTH 0x41 /* Desktop G4s */ -#define PMAC_TYPE_FW_IMAC 0x42 /* FireWire iMacs (except Pangea based) */ -#define PMAC_TYPE_FW_IBOOK 0x43 /* FireWire iBooks (except iBook2) */ -#define PMAC_TYPE_CUBE 0x44 /* Cube PowerMac */ -#define PMAC_TYPE_QUICKSILVER 0x45 /* QuickSilver G4s */ -#define PMAC_TYPE_PISMO 0x46 /* Pismo PowerBook */ -#define PMAC_TYPE_TITANIUM 0x47 /* Titanium PowerBook */ -#define PMAC_TYPE_TITANIUM2 0x48 /* Titanium II PowerBook (no L3, M6) */ -#define PMAC_TYPE_TITANIUM3 0x49 /* Titanium III PowerBook (with L3 & M7) */ -#define PMAC_TYPE_TITANIUM4 0x50 /* Titanium IV PowerBook (with L3 & M9) */ -#define PMAC_TYPE_EMAC 0x50 /* eMac */ -#define PMAC_TYPE_UNKNOWN_CORE99 0x5f - -/* MacRisc2 with UniNorth 2.0 */ -#define PMAC_TYPE_RACKMAC 0x80 /* XServe */ -#define PMAC_TYPE_WINDTUNNEL 0x81 - -/* MacRISC2 machines based on the Pangea chipset - */ -#define PMAC_TYPE_PANGEA_IMAC 0x100 /* Flower Power iMac */ -#define PMAC_TYPE_IBOOK2 0x101 /* iBook2 (polycarbonate) */ -#define PMAC_TYPE_FLAT_PANEL_IMAC 0x102 /* Flat panel iMac */ -#define PMAC_TYPE_UNKNOWN_PANGEA 0x10f - -/* MacRISC2 machines based on the Intrepid chipset - */ -#define PMAC_TYPE_UNKNOWN_INTREPID 0x11f /* Generic */ - -/* MacRISC4 / G5 machines. We don't have per-machine selection here anymore, - * but rather machine families - */ -#define PMAC_TYPE_POWERMAC_G5 0x150 /* U3 & U3H based */ -#define PMAC_TYPE_POWERMAC_G5_U3L 0x151 /* U3L based desktop */ -#define PMAC_TYPE_IMAC_G5 0x152 /* iMac G5 */ -#define PMAC_TYPE_XSERVE_G5 0x153 /* Xserve G5 */ -#define PMAC_TYPE_UNKNOWN_K2 0x19f /* Any other K2 based */ -#define PMAC_TYPE_UNKNOWN_SHASTA 0x19e /* Any other Shasta based */ - -/* - * Motherboard flags - */ - -#define PMAC_MB_CAN_SLEEP 0x00000001 -#define PMAC_MB_HAS_FW_POWER 0x00000002 -#define PMAC_MB_OLD_CORE99 0x00000004 -#define PMAC_MB_MOBILE 0x00000008 -#define PMAC_MB_MAY_SLEEP 0x00000010 - -/* - * Feature calls supported on pmac - * - */ - -/* - * Use this inline wrapper - */ -struct device_node; - -static inline long pmac_call_feature(int selector, struct device_node* node, - long param, long value) -{ - if (!ppc_md.feature_call || !machine_is(powermac)) - return -ENODEV; - return ppc_md.feature_call(selector, node, param, value); -} - -/* PMAC_FTR_SERIAL_ENABLE (struct device_node* node, int param, int value) - * enable/disable an SCC side. Pass the node corresponding to the - * channel side as a parameter. - * param is the type of port - * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled - * for use by xmon. - */ -#define PMAC_FTR_SCC_ENABLE PMAC_FTR_DEF(0) - #define PMAC_SCC_ASYNC 0 - #define PMAC_SCC_IRDA 1 - #define PMAC_SCC_I2S1 2 - #define PMAC_SCC_FLAG_XMON 0x00001000 - -/* PMAC_FTR_MODEM_ENABLE (struct device_node* node, 0, int value) - * enable/disable the internal modem. - */ -#define PMAC_FTR_MODEM_ENABLE PMAC_FTR_DEF(1) - -/* PMAC_FTR_SWIM3_ENABLE (struct device_node* node, 0,int value) - * enable/disable the swim3 (floppy) cell of a mac-io ASIC - */ -#define PMAC_FTR_SWIM3_ENABLE PMAC_FTR_DEF(2) - -/* PMAC_FTR_MESH_ENABLE (struct device_node* node, 0, int value) - * enable/disable the mesh (scsi) cell of a mac-io ASIC - */ -#define PMAC_FTR_MESH_ENABLE PMAC_FTR_DEF(3) - -/* PMAC_FTR_IDE_ENABLE (struct device_node* node, int busID, int value) - * enable/disable an IDE port of a mac-io ASIC - * pass the busID parameter - */ -#define PMAC_FTR_IDE_ENABLE PMAC_FTR_DEF(4) - -/* PMAC_FTR_IDE_RESET (struct device_node* node, int busID, int value) - * assert(1)/release(0) an IDE reset line (mac-io IDE only) - */ -#define PMAC_FTR_IDE_RESET PMAC_FTR_DEF(5) - -/* PMAC_FTR_BMAC_ENABLE (struct device_node* node, 0, int value) - * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive - * it's reset line - */ -#define PMAC_FTR_BMAC_ENABLE PMAC_FTR_DEF(6) - -/* PMAC_FTR_GMAC_ENABLE (struct device_node* node, 0, int value) - * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This - * control the cell's clock. - */ -#define PMAC_FTR_GMAC_ENABLE PMAC_FTR_DEF(7) - -/* PMAC_FTR_GMAC_PHY_RESET (struct device_node* node, 0, 0) - * Perform a HW reset of the PHY connected to a gmac controller. - * Pass the gmac device node, not the PHY node. - */ -#define PMAC_FTR_GMAC_PHY_RESET PMAC_FTR_DEF(8) - -/* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value) - * enable/disable the sound chip, whatever it is and provided it can - * acually be controlled - */ -#define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9) - -/* -- add various tweaks related to sound routing -- */ - -/* PMAC_FTR_AIRPORT_ENABLE (struct device_node* node, 0, int value) - * enable/disable the airport card - */ -#define PMAC_FTR_AIRPORT_ENABLE PMAC_FTR_DEF(10) - -/* PMAC_FTR_RESET_CPU (NULL, int cpu_nr, 0) - * toggle the reset line of a CPU on an uninorth-based SMP machine - */ -#define PMAC_FTR_RESET_CPU PMAC_FTR_DEF(11) - -/* PMAC_FTR_USB_ENABLE (struct device_node* node, 0, int value) - * enable/disable an USB cell, along with the power of the USB "pad" - * on keylargo based machines - */ -#define PMAC_FTR_USB_ENABLE PMAC_FTR_DEF(12) - -/* PMAC_FTR_1394_ENABLE (struct device_node* node, 0, int value) - * enable/disable the firewire cell of an uninorth ASIC. - */ -#define PMAC_FTR_1394_ENABLE PMAC_FTR_DEF(13) - -/* PMAC_FTR_1394_CABLE_POWER (struct device_node* node, 0, int value) - * enable/disable the firewire cable power supply of the uninorth - * firewire cell - */ -#define PMAC_FTR_1394_CABLE_POWER PMAC_FTR_DEF(14) - -/* PMAC_FTR_SLEEP_STATE (struct device_node* node, 0, int value) - * set the sleep state of the motherboard. - * - * Pass -1 as value to query for sleep capability - * Pass 1 to set IOs to sleep - * Pass 0 to set IOs to wake - */ -#define PMAC_FTR_SLEEP_STATE PMAC_FTR_DEF(15) - -/* PMAC_FTR_GET_MB_INFO (NULL, selector, 0) - * - * returns some motherboard infos. - * selector: 0 - model id - * 1 - model flags (capabilities) - * 2 - model name (cast to const char *) - */ -#define PMAC_FTR_GET_MB_INFO PMAC_FTR_DEF(16) -#define PMAC_MB_INFO_MODEL 0 -#define PMAC_MB_INFO_FLAGS 1 -#define PMAC_MB_INFO_NAME 2 - -/* PMAC_FTR_READ_GPIO (NULL, int index, 0) - * - * read a GPIO from a mac-io controller of type KeyLargo or Pangea. - * the value returned is a byte (positive), or a negative error code - */ -#define PMAC_FTR_READ_GPIO PMAC_FTR_DEF(17) - -/* PMAC_FTR_WRITE_GPIO (NULL, int index, int value) - * - * write a GPIO of a mac-io controller of type KeyLargo or Pangea. - */ -#define PMAC_FTR_WRITE_GPIO PMAC_FTR_DEF(18) - -/* PMAC_FTR_ENABLE_MPIC - * - * Enable the MPIC cell - */ -#define PMAC_FTR_ENABLE_MPIC PMAC_FTR_DEF(19) - -/* PMAC_FTR_AACK_DELAY_ENABLE (NULL, int enable, 0) - * - * Enable/disable the AACK delay on the northbridge for systems using DFS - */ -#define PMAC_FTR_AACK_DELAY_ENABLE PMAC_FTR_DEF(20) - -/* PMAC_FTR_DEVICE_CAN_WAKE - * - * Used by video drivers to inform system that they can actually perform - * wakeup from sleep - */ -#define PMAC_FTR_DEVICE_CAN_WAKE PMAC_FTR_DEF(22) - - -/* Don't use those directly, they are for the sake of pmac_setup.c */ -extern long pmac_do_feature_call(unsigned int selector, ...); -extern void pmac_feature_init(void); - -/* Video suspend tweak */ -extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data); -extern void pmac_call_early_video_resume(void); - -#define PMAC_FTR_DEF(x) ((0x6660000) | (x)) - -/* The AGP driver registers itself here */ -extern void pmac_register_agp_pm(struct pci_dev *bridge, - int (*suspend)(struct pci_dev *bridge), - int (*resume)(struct pci_dev *bridge)); - -/* Those are meant to be used by video drivers to deal with AGP - * suspend resume properly - */ -extern void pmac_suspend_agp_for_card(struct pci_dev *dev); -extern void pmac_resume_agp_for_card(struct pci_dev *dev); - -/* - * The part below is for use by macio_asic.c only, do not rely - * on the data structures or constants below in a normal driver - * - */ - -#define MAX_MACIO_CHIPS 2 - -enum { - macio_unknown = 0, - macio_grand_central, - macio_ohare, - macio_ohareII, - macio_heathrow, - macio_gatwick, - macio_paddington, - macio_keylargo, - macio_pangea, - macio_intrepid, - macio_keylargo2, - macio_shasta, -}; - -struct macio_chip -{ - struct device_node *of_node; - int type; - const char *name; - int rev; - volatile u32 __iomem *base; - unsigned long flags; - - /* For use by macio_asic PCI driver */ - struct macio_bus lbus; -}; - -extern struct macio_chip macio_chips[MAX_MACIO_CHIPS]; - -#define MACIO_FLAG_SCCA_ON 0x00000001 -#define MACIO_FLAG_SCCB_ON 0x00000002 -#define MACIO_FLAG_SCC_LOCKED 0x00000004 -#define MACIO_FLAG_AIRPORT_ON 0x00000010 -#define MACIO_FLAG_FW_SUPPORTED 0x00000020 - -extern struct macio_chip* macio_find(struct device_node* child, int type); - -#define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2)) -#define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r)) - -#define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r))) -#define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) -#define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) -#define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) -#define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r))) -#define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) - -/* - * Those are exported by pmac feature for internal use by arch code - * only like the platform function callbacks, do not use directly in drivers - */ -extern spinlock_t feature_lock; -extern struct device_node *uninorth_node; -extern u32 __iomem *uninorth_base; - -/* - * Uninorth reg. access. Note that Uni-N regs are big endian - */ - -#define UN_REG(r) (uninorth_base + ((r) >> 2)) -#define UN_IN(r) (in_be32(UN_REG(r))) -#define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) -#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) -#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) - -/* Uninorth variant: - * - * 0 = not uninorth - * 1 = U1.x or U2.x - * 3 = U3 - * 4 = U4 - */ -extern int pmac_get_uninorth_variant(void); - -#endif /* __ASM_POWERPC_PMAC_FEATURE_H */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/pmac_low_i2c.h b/include/asm-powerpc/pmac_low_i2c.h deleted file mode 100644 index 131011b..0000000 --- a/include/asm-powerpc/pmac_low_i2c.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * include/asm-ppc/pmac_low_i2c.h - * - * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ -#ifndef __PMAC_LOW_I2C_H__ -#define __PMAC_LOW_I2C_H__ -#ifdef __KERNEL__ - -/* i2c mode (based on the platform functions format) */ -enum { - pmac_i2c_mode_dumb = 1, - pmac_i2c_mode_std = 2, - pmac_i2c_mode_stdsub = 3, - pmac_i2c_mode_combined = 4, -}; - -/* RW bit in address */ -enum { - pmac_i2c_read = 0x01, - pmac_i2c_write = 0x00 -}; - -/* i2c bus type */ -enum { - pmac_i2c_bus_keywest = 0, - pmac_i2c_bus_pmu = 1, - pmac_i2c_bus_smu = 2, -}; - -/* i2c bus features */ -enum { - /* can_largesub : supports >1 byte subaddresses (SMU only) */ - pmac_i2c_can_largesub = 0x00000001u, - - /* multibus : device node holds multiple busses, bus number is - * encoded in bits 0xff00 of "reg" of a given device - */ - pmac_i2c_multibus = 0x00000002u, -}; - -/* i2c busses in the system */ -struct pmac_i2c_bus; -struct i2c_adapter; - -/* Init, called early during boot */ -extern int pmac_i2c_init(void); - -/* Lookup an i2c bus for a device-node. The node can be either the bus - * node itself or a device below it. In the case of a multibus, the bus - * node itself is the controller node, else, it's a child of the controller - * node - */ -extern struct pmac_i2c_bus *pmac_i2c_find_bus(struct device_node *node); - -/* Get the address for an i2c device. This strips the bus number if - * necessary. The 7 bits address is returned 1 bit right shifted so that the - * direction can be directly ored in - */ -extern u8 pmac_i2c_get_dev_addr(struct device_node *device); - -/* Get infos about a bus */ -extern struct device_node *pmac_i2c_get_controller(struct pmac_i2c_bus *bus); -extern struct device_node *pmac_i2c_get_bus_node(struct pmac_i2c_bus *bus); -extern int pmac_i2c_get_type(struct pmac_i2c_bus *bus); -extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus); -extern int pmac_i2c_get_channel(struct pmac_i2c_bus *bus); - -/* i2c layer adapter attach/detach */ -extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, - struct i2c_adapter *adapter); -extern void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus, - struct i2c_adapter *adapter); -extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus); -extern struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter); - -/* March a device or bus with an i2c adapter structure, to be used by drivers - * to match device-tree nodes with i2c adapters during adapter discovery - * callbacks - */ -extern int pmac_i2c_match_adapter(struct device_node *dev, - struct i2c_adapter *adapter); - - -/* (legacy) Locking functions exposed to i2c-keywest */ -extern int pmac_low_i2c_lock(struct device_node *np); -extern int pmac_low_i2c_unlock(struct device_node *np); - -/* Access functions for platform code */ -extern int pmac_i2c_open(struct pmac_i2c_bus *bus, int polled); -extern void pmac_i2c_close(struct pmac_i2c_bus *bus); -extern int pmac_i2c_setmode(struct pmac_i2c_bus *bus, int mode); -extern int pmac_i2c_xfer(struct pmac_i2c_bus *bus, u8 addrdir, int subsize, - u32 subaddr, u8 *data, int len); - -/* Suspend/resume code called by via-pmu directly for now */ -extern void pmac_pfunc_i2c_suspend(void); -extern void pmac_pfunc_i2c_resume(void); - -#endif /* __KERNEL__ */ -#endif /* __PMAC_LOW_I2C_H__ */ diff --git a/include/asm-powerpc/pmac_pfunc.h b/include/asm-powerpc/pmac_pfunc.h deleted file mode 100644 index 1330d6a..0000000 --- a/include/asm-powerpc/pmac_pfunc.h +++ /dev/null @@ -1,252 +0,0 @@ -#ifndef __PMAC_PFUNC_H__ -#define __PMAC_PFUNC_H__ - -#include -#include - -/* Flags in command lists */ -#define PMF_FLAGS_ON_INIT 0x80000000u -#define PMF_FLGAS_ON_TERM 0x40000000u -#define PMF_FLAGS_ON_SLEEP 0x20000000u -#define PMF_FLAGS_ON_WAKE 0x10000000u -#define PMF_FLAGS_ON_DEMAND 0x08000000u -#define PMF_FLAGS_INT_GEN 0x04000000u -#define PMF_FLAGS_HIGH_SPEED 0x02000000u -#define PMF_FLAGS_LOW_SPEED 0x01000000u -#define PMF_FLAGS_SIDE_EFFECTS 0x00800000u - -/* - * Arguments to a platform function call. - * - * NOTE: By convention, pointer arguments point to an u32 - */ -struct pmf_args { - union { - u32 v; - u32 *p; - } u[4]; - unsigned int count; -}; - -/* - * A driver capable of interpreting commands provides a handlers - * structure filled with whatever handlers are implemented by this - * driver. Non implemented handlers are left NULL. - * - * PMF_STD_ARGS are the same arguments that are passed to the parser - * and that gets passed back to the various handlers. - * - * Interpreting a given function always start with a begin() call which - * returns an instance data to be passed around subsequent calls, and - * ends with an end() call. This allows the low level driver to implement - * locking policy or per-function instance data. - * - * For interrupt capable functions, irq_enable() is called when a client - * registers, and irq_disable() is called when the last client unregisters - * Note that irq_enable & irq_disable are called within a semaphore held - * by the core, thus you should not try to register yourself to some other - * pmf interrupt during those calls. - */ - -#define PMF_STD_ARGS struct pmf_function *func, void *instdata, \ - struct pmf_args *args - -struct pmf_function; - -struct pmf_handlers { - void * (*begin)(struct pmf_function *func, struct pmf_args *args); - void (*end)(struct pmf_function *func, void *instdata); - - int (*irq_enable)(struct pmf_function *func); - int (*irq_disable)(struct pmf_function *func); - - int (*write_gpio)(PMF_STD_ARGS, u8 value, u8 mask); - int (*read_gpio)(PMF_STD_ARGS, u8 mask, int rshift, u8 xor); - - int (*write_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask); - int (*read_reg32)(PMF_STD_ARGS, u32 offset); - int (*write_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask); - int (*read_reg16)(PMF_STD_ARGS, u32 offset); - int (*write_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask); - int (*read_reg8)(PMF_STD_ARGS, u32 offset); - - int (*delay)(PMF_STD_ARGS, u32 duration); - - int (*wait_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask); - int (*wait_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask); - int (*wait_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask); - - int (*read_i2c)(PMF_STD_ARGS, u32 len); - int (*write_i2c)(PMF_STD_ARGS, u32 len, const u8 *data); - int (*rmw_i2c)(PMF_STD_ARGS, u32 masklen, u32 valuelen, u32 totallen, - const u8 *maskdata, const u8 *valuedata); - - int (*read_cfg)(PMF_STD_ARGS, u32 offset, u32 len); - int (*write_cfg)(PMF_STD_ARGS, u32 offset, u32 len, const u8 *data); - int (*rmw_cfg)(PMF_STD_ARGS, u32 offset, u32 masklen, u32 valuelen, - u32 totallen, const u8 *maskdata, const u8 *valuedata); - - int (*read_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 len); - int (*write_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 len, const u8 *data); - int (*set_i2c_mode)(PMF_STD_ARGS, int mode); - int (*rmw_i2c_sub)(PMF_STD_ARGS, u8 subaddr, u32 masklen, u32 valuelen, - u32 totallen, const u8 *maskdata, - const u8 *valuedata); - - int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, - u32 xor); - int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, - u32 xor); - int (*read_reg8_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift, - u32 xor); - - int (*write_reg32_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); - int (*write_reg16_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); - int (*write_reg8_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask); - - int (*mask_and_compare)(PMF_STD_ARGS, u32 len, const u8 *maskdata, - const u8 *valuedata); - - struct module *owner; -}; - - -/* - * Drivers who expose platform functions register at init time, this - * causes the platform functions for that device node to be parsed in - * advance and associated with the device. The data structures are - * partially public so a driver can walk the list of platform functions - * and eventually inspect the flags - */ -struct pmf_device; - -struct pmf_function { - /* All functions for a given driver are linked */ - struct list_head link; - - /* Function node & driver data */ - struct device_node *node; - void *driver_data; - - /* For internal use by core */ - struct pmf_device *dev; - - /* The name is the "xxx" in "platform-do-xxx", this is how - * platform functions are identified by this code. Some functions - * only operate for a given target, in which case the phandle is - * here (or 0 if the filter doesn't apply) - */ - const char *name; - u32 phandle; - - /* The flags for that function. You can have several functions - * with the same name and different flag - */ - u32 flags; - - /* The actual tokenized function blob */ - const void *data; - unsigned int length; - - /* Interrupt clients */ - struct list_head irq_clients; - - /* Refcounting */ - struct kref ref; -}; - -/* - * For platform functions that are interrupts, one can register - * irq_client structures. You canNOT use the same structure twice - * as it contains a link member. Also, the callback is called with - * a spinlock held, you must not call back into any of the pmf_* functions - * from within that callback - */ -struct pmf_irq_client { - void (*handler)(void *data); - void *data; - struct module *owner; - struct list_head link; - struct pmf_function *func; -}; - - -/* - * Register/Unregister a function-capable driver and its handlers - */ -extern int pmf_register_driver(struct device_node *np, - struct pmf_handlers *handlers, - void *driverdata); - -extern void pmf_unregister_driver(struct device_node *np); - - -/* - * Register/Unregister interrupt clients - */ -extern int pmf_register_irq_client(struct device_node *np, - const char *name, - struct pmf_irq_client *client); - -extern void pmf_unregister_irq_client(struct pmf_irq_client *client); - -/* - * Called by the handlers when an irq happens - */ -extern void pmf_do_irq(struct pmf_function *func); - - -/* - * Low level call to platform functions. - * - * The phandle can filter on the target object for functions that have - * multiple targets, the flags allow you to restrict the call to a given - * combination of flags. - * - * The args array contains as many arguments as is required by the function, - * this is dependent on the function you are calling, unfortunately Apple - * mechanism provides no way to encode that so you have to get it right at - * the call site. Some functions require no args, in which case, you can - * pass NULL. - * - * You can also pass NULL to the name. This will match any function that has - * the appropriate combination of flags & phandle or you can pass 0 to the - * phandle to match any - */ -extern int pmf_do_functions(struct device_node *np, const char *name, - u32 phandle, u32 flags, struct pmf_args *args); - - - -/* - * High level call to a platform function. - * - * This one looks for the platform-xxx first so you should call it to the - * actual target if any. It will fallback to platform-do-xxx if it can't - * find one. It will also exclusively target functions that have - * the "OnDemand" flag. - */ - -extern int pmf_call_function(struct device_node *target, const char *name, - struct pmf_args *args); - - -/* - * For low latency interrupt usage, you can lookup for on-demand functions - * using the functions below - */ - -extern struct pmf_function *pmf_find_function(struct device_node *target, - const char *name); - -extern struct pmf_function * pmf_get_function(struct pmf_function *func); -extern void pmf_put_function(struct pmf_function *func); - -extern int pmf_call_one(struct pmf_function *func, struct pmf_args *args); - - -/* Suspend/resume code called by via-pmu directly for now */ -extern void pmac_pfunc_base_suspend(void); -extern void pmac_pfunc_base_resume(void); - -#endif /* __PMAC_PFUNC_H__ */ diff --git a/include/asm-powerpc/pmc.h b/include/asm-powerpc/pmc.h deleted file mode 100644 index d6a616a..0000000 --- a/include/asm-powerpc/pmc.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * pmc.h - * Copyright (C) 2004 David Gibson, IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef _POWERPC_PMC_H -#define _POWERPC_PMC_H -#ifdef __KERNEL__ - -#include - -typedef void (*perf_irq_t)(struct pt_regs *); -extern perf_irq_t perf_irq; - -int reserve_pmc_hardware(perf_irq_t new_perf_irq); -void release_pmc_hardware(void); - -#ifdef CONFIG_PPC64 -void power4_enable_pmcs(void); -void pasemi_enable_pmcs(void); -#endif - -#endif /* __KERNEL__ */ -#endif /* _POWERPC_PMC_H */ diff --git a/include/asm-powerpc/pmi.h b/include/asm-powerpc/pmi.h deleted file mode 100644 index b4e91fb..0000000 --- a/include/asm-powerpc/pmi.h +++ /dev/null @@ -1,66 +0,0 @@ -#ifndef _POWERPC_PMI_H -#define _POWERPC_PMI_H - -/* - * Definitions for talking with PMI device on PowerPC - * - * PMI (Platform Management Interrupt) is a way to communicate - * with the BMC (Baseboard Management Controller) via interrupts. - * Unlike IPMI it is bidirectional and has a low latency. - * - * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 - * - * Author: Christian Krafft - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifdef __KERNEL__ - -#define PMI_TYPE_FREQ_CHANGE 0x01 -#define PMI_TYPE_POWER_BUTTON 0x02 -#define PMI_READ_TYPE 0 -#define PMI_READ_DATA0 1 -#define PMI_READ_DATA1 2 -#define PMI_READ_DATA2 3 -#define PMI_WRITE_TYPE 4 -#define PMI_WRITE_DATA0 5 -#define PMI_WRITE_DATA1 6 -#define PMI_WRITE_DATA2 7 - -#define PMI_ACK 0x80 - -#define PMI_TIMEOUT 100 - -typedef struct { - u8 type; - u8 data0; - u8 data1; - u8 data2; -} pmi_message_t; - -struct pmi_handler { - struct list_head node; - u8 type; - void (*handle_pmi_message) (pmi_message_t); -}; - -int pmi_register_handler(struct pmi_handler *); -void pmi_unregister_handler(struct pmi_handler *); - -int pmi_send_message(pmi_message_t); - -#endif /* __KERNEL__ */ -#endif /* _POWERPC_PMI_H */ diff --git a/include/asm-powerpc/poll.h b/include/asm-powerpc/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-powerpc/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-powerpc/posix_types.h b/include/asm-powerpc/posix_types.h deleted file mode 100644 index c4e396b..0000000 --- a/include/asm-powerpc/posix_types.h +++ /dev/null @@ -1,128 +0,0 @@ -#ifndef _ASM_POWERPC_POSIX_TYPES_H -#define _ASM_POWERPC_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef long __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef long __kernel_suseconds_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; -typedef unsigned int __kernel_old_uid_t; -typedef unsigned int __kernel_old_gid_t; - -#ifdef __powerpc64__ -typedef unsigned long __kernel_nlink_t; -typedef int __kernel_ipc_pid_t; -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; -typedef unsigned long __kernel_old_dev_t; -#else -typedef unsigned short __kernel_nlink_t; -typedef short __kernel_ipc_pid_t; -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef unsigned int __kernel_old_dev_t; -#endif - -#ifdef __powerpc64__ -typedef long long __kernel_loff_t; -#else -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#ifndef __GNUC__ - -#define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) -#define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) -#define __FD_ISSET(d, set) (((set)->fds_bits[__FDELT(d)] & __FDMASK(d)) != 0) -#define __FD_ZERO(set) \ - ((void) memset ((void *) (set), 0, sizeof (__kernel_fd_set))) - -#else /* __GNUC__ */ - -#if defined(__KERNEL__) -/* With GNU C, use inline functions instead so args are evaluated only once: */ - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long fd, __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = (unsigned long *)p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - - case 8: - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) */ -#endif /* __GNUC__ */ -#endif /* _ASM_POWERPC_POSIX_TYPES_H */ diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h deleted file mode 100644 index 854ab71..0000000 --- a/include/asm-powerpc/ppc-pci.h +++ /dev/null @@ -1,149 +0,0 @@ -/* - * c 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _ASM_POWERPC_PPC_PCI_H -#define _ASM_POWERPC_PPC_PCI_H -#ifdef __KERNEL__ - -#ifdef CONFIG_PCI - -#include -#include - -extern unsigned long isa_io_base; - -extern void pci_setup_phb_io(struct pci_controller *hose, int primary); -extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); - - -extern struct list_head hose_list; - -extern void find_and_init_phbs(void); - -extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ - -/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ -#define BUID_HI(buid) ((buid) >> 32) -#define BUID_LO(buid) ((buid) & 0xffffffff) - -/* PCI device_node operations */ -struct device_node; -typedef void *(*traverse_func)(struct device_node *me, void *data); -void *traverse_pci_devices(struct device_node *start, traverse_func pre, - void *data); - -extern void pci_devs_phb_init(void); -extern void pci_devs_phb_init_dynamic(struct pci_controller *phb); -extern void scan_phb(struct pci_controller *hose); - -/* From rtas_pci.h */ -extern void init_pci_config_tokens (void); -extern unsigned long get_phb_buid (struct device_node *); -extern int rtas_setup_phb(struct pci_controller *phb); - -extern unsigned long pci_probe_only; - -/* ---- EEH internal-use-only related routines ---- */ -#ifdef CONFIG_EEH - -void pci_addr_cache_insert_device(struct pci_dev *dev); -void pci_addr_cache_remove_device(struct pci_dev *dev); -void pci_addr_cache_build(void); -struct pci_dev *pci_get_device_by_addr(unsigned long addr); - -/** - * eeh_slot_error_detail -- record and EEH error condition to the log - * @pdn: pci device node - * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE - * - * Obtains the EEH error details from the RTAS subsystem, - * and then logs these details with the RTAS error log system. - */ -#define EEH_LOG_TEMP_FAILURE 1 -#define EEH_LOG_PERM_FAILURE 2 -void eeh_slot_error_detail (struct pci_dn *pdn, int severity); - -/** - * rtas_pci_enable - enable IO transfers for this slot - * @pdn: pci device node - * @function: either EEH_THAW_MMIO or EEH_THAW_DMA - * - * Enable I/O transfers to this slot - */ -#define EEH_THAW_MMIO 2 -#define EEH_THAW_DMA 3 -int rtas_pci_enable(struct pci_dn *pdn, int function); - -/** - * rtas_set_slot_reset -- unfreeze a frozen slot - * @pdn: pci device node - * - * Clear the EEH-frozen condition on a slot. This routine - * does this by asserting the PCI #RST line for 1/8th of - * a second; this routine will sleep while the adapter is - * being reset. - * - * Returns a non-zero value if the reset failed. - */ -int rtas_set_slot_reset (struct pci_dn *); -int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs); - -/** - * eeh_restore_bars - Restore device configuration info. - * @pdn: pci device node - * - * A reset of a PCI device will clear out its config space. - * This routines will restore the config space for this - * device, and is children, to values previously obtained - * from the firmware. - */ -void eeh_restore_bars(struct pci_dn *); - -/** - * rtas_configure_bridge -- firmware initialization of pci bridge - * @pdn: pci device node - * - * Ask the firmware to configure all PCI bridges devices - * located behind the indicated node. Required after a - * pci device reset. Does essentially the same hing as - * eeh_restore_bars, but for brdges, and lets firmware - * do the work. - */ -void rtas_configure_bridge(struct pci_dn *); - -int rtas_write_config(struct pci_dn *, int where, int size, u32 val); -int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); - -/** - * eeh_mark_slot -- set mode flags for pertition endpoint - * @pdn: pci device node - * - * mark and clear slots: find "partition endpoint" PE and set or - * clear the flags for each subnode of the PE. - */ -void eeh_mark_slot (struct device_node *dn, int mode_flag); -void eeh_clear_slot (struct device_node *dn, int mode_flag); - -/** - * find_device_pe -- Find the associated "Partiationable Endpoint" PE - * @pdn: pci device node - */ -struct device_node * find_device_pe(struct device_node *dn); - -void eeh_sysfs_add_device(struct pci_dev *pdev); -void eeh_sysfs_remove_device(struct pci_dev *pdev); - -#endif /* CONFIG_EEH */ - -#else /* CONFIG_PCI */ -static inline void find_and_init_phbs(void) { } -static inline void init_pci_config_tokens(void) { } -#endif /* !CONFIG_PCI */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_PPC_PCI_H */ diff --git a/include/asm-powerpc/ppc4xx.h b/include/asm-powerpc/ppc4xx.h deleted file mode 100644 index 033039a..0000000 --- a/include/asm-powerpc/ppc4xx.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * PPC4xx Prototypes and definitions - * - * Copyright 2008 DENX Software Engineering, Stefan Roese - * - * This is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_POWERPC_PPC4xx_H__ -#define __ASM_POWERPC_PPC4xx_H__ - -extern void ppc4xx_reset_system(char *cmd); - -#endif /* __ASM_POWERPC_PPC4xx_H__ */ diff --git a/include/asm-powerpc/ppc_asm.h b/include/asm-powerpc/ppc_asm.h deleted file mode 100644 index 0966899..0000000 --- a/include/asm-powerpc/ppc_asm.h +++ /dev/null @@ -1,689 +0,0 @@ -/* - * Copyright (C) 1995-1999 Gary Thomas, Paul Mackerras, Cort Dougan. - */ -#ifndef _ASM_POWERPC_PPC_ASM_H -#define _ASM_POWERPC_PPC_ASM_H - -#include -#include -#include - -#ifndef __ASSEMBLY__ -#error __FILE__ should only be used in assembler files -#else - -#define SZL (BITS_PER_LONG/8) - -/* - * Stuff for accurate CPU time accounting. - * These macros handle transitions between user and system state - * in exception entry and exit and accumulate time to the - * user_time and system_time fields in the paca. - */ - -#ifndef CONFIG_VIRT_CPU_ACCOUNTING -#define ACCOUNT_CPU_USER_ENTRY(ra, rb) -#define ACCOUNT_CPU_USER_EXIT(ra, rb) -#else -#define ACCOUNT_CPU_USER_ENTRY(ra, rb) \ - beq 2f; /* if from kernel mode */ \ -BEGIN_FTR_SECTION; \ - mfspr ra,SPRN_PURR; /* get processor util. reg */ \ -END_FTR_SECTION_IFSET(CPU_FTR_PURR); \ -BEGIN_FTR_SECTION; \ - MFTB(ra); /* or get TB if no PURR */ \ -END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \ - ld rb,PACA_STARTPURR(r13); \ - std ra,PACA_STARTPURR(r13); \ - subf rb,rb,ra; /* subtract start value */ \ - ld ra,PACA_USER_TIME(r13); \ - add ra,ra,rb; /* add on to user time */ \ - std ra,PACA_USER_TIME(r13); \ -2: - -#define ACCOUNT_CPU_USER_EXIT(ra, rb) \ -BEGIN_FTR_SECTION; \ - mfspr ra,SPRN_PURR; /* get processor util. reg */ \ -END_FTR_SECTION_IFSET(CPU_FTR_PURR); \ -BEGIN_FTR_SECTION; \ - MFTB(ra); /* or get TB if no PURR */ \ -END_FTR_SECTION_IFCLR(CPU_FTR_PURR); \ - ld rb,PACA_STARTPURR(r13); \ - std ra,PACA_STARTPURR(r13); \ - subf rb,rb,ra; /* subtract start value */ \ - ld ra,PACA_SYSTEM_TIME(r13); \ - add ra,ra,rb; /* add on to user time */ \ - std ra,PACA_SYSTEM_TIME(r13); -#endif - -/* - * Macros for storing registers into and loading registers from - * exception frames. - */ -#ifdef __powerpc64__ -#define SAVE_GPR(n, base) std n,GPR0+8*(n)(base) -#define REST_GPR(n, base) ld n,GPR0+8*(n)(base) -#define SAVE_NVGPRS(base) SAVE_8GPRS(14, base); SAVE_10GPRS(22, base) -#define REST_NVGPRS(base) REST_8GPRS(14, base); REST_10GPRS(22, base) -#else -#define SAVE_GPR(n, base) stw n,GPR0+4*(n)(base) -#define REST_GPR(n, base) lwz n,GPR0+4*(n)(base) -#define SAVE_NVGPRS(base) SAVE_GPR(13, base); SAVE_8GPRS(14, base); \ - SAVE_10GPRS(22, base) -#define REST_NVGPRS(base) REST_GPR(13, base); REST_8GPRS(14, base); \ - REST_10GPRS(22, base) -#endif - -/* - * Define what the VSX XX1 form instructions will look like, then add - * the 128 bit load store instructions based on that. - */ -#define VSX_XX1(xs, ra, rb) (((xs) & 0x1f) << 21 | ((ra) << 16) | \ - ((rb) << 11) | (((xs) >> 5))) - -#define STXVD2X(xs, ra, rb) .long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) -#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) - -#define SAVE_2GPRS(n, base) SAVE_GPR(n, base); SAVE_GPR(n+1, base) -#define SAVE_4GPRS(n, base) SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) -#define SAVE_8GPRS(n, base) SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) -#define SAVE_10GPRS(n, base) SAVE_8GPRS(n, base); SAVE_2GPRS(n+8, base) -#define REST_2GPRS(n, base) REST_GPR(n, base); REST_GPR(n+1, base) -#define REST_4GPRS(n, base) REST_2GPRS(n, base); REST_2GPRS(n+2, base) -#define REST_8GPRS(n, base) REST_4GPRS(n, base); REST_4GPRS(n+4, base) -#define REST_10GPRS(n, base) REST_8GPRS(n, base); REST_2GPRS(n+8, base) - -#define SAVE_FPR(n, base) stfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) -#define SAVE_2FPRS(n, base) SAVE_FPR(n, base); SAVE_FPR(n+1, base) -#define SAVE_4FPRS(n, base) SAVE_2FPRS(n, base); SAVE_2FPRS(n+2, base) -#define SAVE_8FPRS(n, base) SAVE_4FPRS(n, base); SAVE_4FPRS(n+4, base) -#define SAVE_16FPRS(n, base) SAVE_8FPRS(n, base); SAVE_8FPRS(n+8, base) -#define SAVE_32FPRS(n, base) SAVE_16FPRS(n, base); SAVE_16FPRS(n+16, base) -#define REST_FPR(n, base) lfd n,THREAD_FPR0+8*TS_FPRWIDTH*(n)(base) -#define REST_2FPRS(n, base) REST_FPR(n, base); REST_FPR(n+1, base) -#define REST_4FPRS(n, base) REST_2FPRS(n, base); REST_2FPRS(n+2, base) -#define REST_8FPRS(n, base) REST_4FPRS(n, base); REST_4FPRS(n+4, base) -#define REST_16FPRS(n, base) REST_8FPRS(n, base); REST_8FPRS(n+8, base) -#define REST_32FPRS(n, base) REST_16FPRS(n, base); REST_16FPRS(n+16, base) - -#define SAVE_VR(n,b,base) li b,THREAD_VR0+(16*(n)); stvx n,b,base -#define SAVE_2VRS(n,b,base) SAVE_VR(n,b,base); SAVE_VR(n+1,b,base) -#define SAVE_4VRS(n,b,base) SAVE_2VRS(n,b,base); SAVE_2VRS(n+2,b,base) -#define SAVE_8VRS(n,b,base) SAVE_4VRS(n,b,base); SAVE_4VRS(n+4,b,base) -#define SAVE_16VRS(n,b,base) SAVE_8VRS(n,b,base); SAVE_8VRS(n+8,b,base) -#define SAVE_32VRS(n,b,base) SAVE_16VRS(n,b,base); SAVE_16VRS(n+16,b,base) -#define REST_VR(n,b,base) li b,THREAD_VR0+(16*(n)); lvx n,b,base -#define REST_2VRS(n,b,base) REST_VR(n,b,base); REST_VR(n+1,b,base) -#define REST_4VRS(n,b,base) REST_2VRS(n,b,base); REST_2VRS(n+2,b,base) -#define REST_8VRS(n,b,base) REST_4VRS(n,b,base); REST_4VRS(n+4,b,base) -#define REST_16VRS(n,b,base) REST_8VRS(n,b,base); REST_8VRS(n+8,b,base) -#define REST_32VRS(n,b,base) REST_16VRS(n,b,base); REST_16VRS(n+16,b,base) - -/* Save the lower 32 VSRs in the thread VSR region */ -#define SAVE_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); STXVD2X(n,b,base) -#define SAVE_2VSRS(n,b,base) SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base) -#define SAVE_4VSRS(n,b,base) SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base) -#define SAVE_8VSRS(n,b,base) SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base) -#define SAVE_16VSRS(n,b,base) SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base) -#define SAVE_32VSRS(n,b,base) SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base) -#define REST_VSR(n,b,base) li b,THREAD_VSR0+(16*(n)); LXVD2X(n,b,base) -#define REST_2VSRS(n,b,base) REST_VSR(n,b,base); REST_VSR(n+1,b,base) -#define REST_4VSRS(n,b,base) REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base) -#define REST_8VSRS(n,b,base) REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base) -#define REST_16VSRS(n,b,base) REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base) -#define REST_32VSRS(n,b,base) REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base) -/* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */ -#define SAVE_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); STXVD2X(n+32,b,base) -#define SAVE_2VSRSU(n,b,base) SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base) -#define SAVE_4VSRSU(n,b,base) SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base) -#define SAVE_8VSRSU(n,b,base) SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base) -#define SAVE_16VSRSU(n,b,base) SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base) -#define SAVE_32VSRSU(n,b,base) SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base) -#define REST_VSRU(n,b,base) li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,b,base) -#define REST_2VSRSU(n,b,base) REST_VSRU(n,b,base); REST_VSRU(n+1,b,base) -#define REST_4VSRSU(n,b,base) REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base) -#define REST_8VSRSU(n,b,base) REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base) -#define REST_16VSRSU(n,b,base) REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base) -#define REST_32VSRSU(n,b,base) REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base) - -#define SAVE_EVR(n,s,base) evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base) -#define SAVE_2EVRS(n,s,base) SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base) -#define SAVE_4EVRS(n,s,base) SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base) -#define SAVE_8EVRS(n,s,base) SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base) -#define SAVE_16EVRS(n,s,base) SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base) -#define SAVE_32EVRS(n,s,base) SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base) -#define REST_EVR(n,s,base) lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n -#define REST_2EVRS(n,s,base) REST_EVR(n,s,base); REST_EVR(n+1,s,base) -#define REST_4EVRS(n,s,base) REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base) -#define REST_8EVRS(n,s,base) REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base) -#define REST_16EVRS(n,s,base) REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base) -#define REST_32EVRS(n,s,base) REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base) - -/* Macros to adjust thread priority for hardware multithreading */ -#define HMT_VERY_LOW or 31,31,31 # very low priority -#define HMT_LOW or 1,1,1 -#define HMT_MEDIUM_LOW or 6,6,6 # medium low priority -#define HMT_MEDIUM or 2,2,2 -#define HMT_MEDIUM_HIGH or 5,5,5 # medium high priority -#define HMT_HIGH or 3,3,3 - -/* handle instructions that older assemblers may not know */ -#define RFCI .long 0x4c000066 /* rfci instruction */ -#define RFDI .long 0x4c00004e /* rfdi instruction */ -#define RFMCI .long 0x4c00004c /* rfmci instruction */ - -#ifdef __KERNEL__ -#ifdef CONFIG_PPC64 - -#define XGLUE(a,b) a##b -#define GLUE(a,b) XGLUE(a,b) - -#define _GLOBAL(name) \ - .section ".text"; \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _INIT_GLOBAL(name) \ - .section ".text.init.refok"; \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _KPROBE(name) \ - .section ".kprobes.text","a"; \ - .align 2 ; \ - .globl name; \ - .globl GLUE(.,name); \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _STATIC(name) \ - .section ".text"; \ - .align 2 ; \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#define _INIT_STATIC(name) \ - .section ".text.init.refok"; \ - .align 2 ; \ - .section ".opd","aw"; \ -name: \ - .quad GLUE(.,name); \ - .quad .TOC.@tocbase; \ - .quad 0; \ - .previous; \ - .type GLUE(.,name),@function; \ -GLUE(.,name): - -#else /* 32-bit */ - -#define _ENTRY(n) \ - .globl n; \ -n: - -#define _GLOBAL(n) \ - .text; \ - .stabs __stringify(n:F-1),N_FUN,0,0,n;\ - .globl n; \ -n: - -#define _KPROBE(n) \ - .section ".kprobes.text","a"; \ - .globl n; \ -n: - -#endif - -/* - * LOAD_REG_IMMEDIATE(rn, expr) - * Loads the value of the constant expression 'expr' into register 'rn' - * using immediate instructions only. Use this when it's important not - * to reference other data (i.e. on ppc64 when the TOC pointer is not - * valid). - * - * LOAD_REG_ADDR(rn, name) - * Loads the address of label 'name' into register 'rn'. Use this when - * you don't particularly need immediate instructions only, but you need - * the whole address in one register (e.g. it's a structure address and - * you want to access various offsets within it). On ppc32 this is - * identical to LOAD_REG_IMMEDIATE. - * - * LOAD_REG_ADDRBASE(rn, name) - * ADDROFF(name) - * LOAD_REG_ADDRBASE loads part of the address of label 'name' into - * register 'rn'. ADDROFF(name) returns the remainder of the address as - * a constant expression. ADDROFF(name) is a signed expression < 16 bits - * in size, so is suitable for use directly as an offset in load and store - * instructions. Use this when loading/storing a single word or less as: - * LOAD_REG_ADDRBASE(rX, name) - * ld rY,ADDROFF(name)(rX) - */ -#ifdef __powerpc64__ -#define LOAD_REG_IMMEDIATE(reg,expr) \ - lis (reg),(expr)@highest; \ - ori (reg),(reg),(expr)@higher; \ - rldicr (reg),(reg),32,31; \ - oris (reg),(reg),(expr)@h; \ - ori (reg),(reg),(expr)@l; - -#define LOAD_REG_ADDR(reg,name) \ - ld (reg),name@got(r2) - -#define LOAD_REG_ADDRBASE(reg,name) LOAD_REG_ADDR(reg,name) -#define ADDROFF(name) 0 - -/* offsets for stack frame layout */ -#define LRSAVE 16 - -#else /* 32-bit */ - -#define LOAD_REG_IMMEDIATE(reg,expr) \ - lis (reg),(expr)@ha; \ - addi (reg),(reg),(expr)@l; - -#define LOAD_REG_ADDR(reg,name) LOAD_REG_IMMEDIATE(reg, name) - -#define LOAD_REG_ADDRBASE(reg, name) lis (reg),name@ha -#define ADDROFF(name) name@l - -/* offsets for stack frame layout */ -#define LRSAVE 4 - -#endif - -/* various errata or part fixups */ -#ifdef CONFIG_PPC601_SYNC_FIX -#define SYNC \ -BEGIN_FTR_SECTION \ - sync; \ - isync; \ -END_FTR_SECTION_IFSET(CPU_FTR_601) -#define SYNC_601 \ -BEGIN_FTR_SECTION \ - sync; \ -END_FTR_SECTION_IFSET(CPU_FTR_601) -#define ISYNC_601 \ -BEGIN_FTR_SECTION \ - isync; \ -END_FTR_SECTION_IFSET(CPU_FTR_601) -#else -#define SYNC -#define SYNC_601 -#define ISYNC_601 -#endif - -#ifdef CONFIG_PPC_CELL -#define MFTB(dest) \ -90: mftb dest; \ -BEGIN_FTR_SECTION_NESTED(96); \ - cmpwi dest,0; \ - beq- 90b; \ -END_FTR_SECTION_NESTED(CPU_FTR_CELL_TB_BUG, CPU_FTR_CELL_TB_BUG, 96) -#else -#define MFTB(dest) mftb dest -#endif - -#ifndef CONFIG_SMP -#define TLBSYNC -#else /* CONFIG_SMP */ -/* tlbsync is not implemented on 601 */ -#define TLBSYNC \ -BEGIN_FTR_SECTION \ - tlbsync; \ - sync; \ -END_FTR_SECTION_IFCLR(CPU_FTR_601) -#endif - - -/* - * This instruction is not implemented on the PPC 603 or 601; however, on - * the 403GCX and 405GP tlbia IS defined and tlbie is not. - * All of these instructions exist in the 8xx, they have magical powers, - * and they must be used. - */ - -#if !defined(CONFIG_4xx) && !defined(CONFIG_8xx) -#define tlbia \ - li r4,1024; \ - mtctr r4; \ - lis r4,KERNELBASE@h; \ -0: tlbie r4; \ - addi r4,r4,0x1000; \ - bdnz 0b -#endif - - -#ifdef CONFIG_IBM440EP_ERR42 -#define PPC440EP_ERR42 isync -#else -#define PPC440EP_ERR42 -#endif - - -#if defined(CONFIG_BOOKE) -#define toreal(rd) -#define fromreal(rd) - -/* - * We use addis to ensure compatibility with the "classic" ppc versions of - * these macros, which use rs = 0 to get the tophys offset in rd, rather than - * converting the address in r0, and so this version has to do that too - * (i.e. set register rd to 0 when rs == 0). - */ -#define tophys(rd,rs) \ - addis rd,rs,0 - -#define tovirt(rd,rs) \ - addis rd,rs,0 - -#elif defined(CONFIG_PPC64) -#define toreal(rd) /* we can access c000... in real mode */ -#define fromreal(rd) - -#define tophys(rd,rs) \ - clrldi rd,rs,2 - -#define tovirt(rd,rs) \ - rotldi rd,rs,16; \ - ori rd,rd,((KERNELBASE>>48)&0xFFFF);\ - rotldi rd,rd,48 -#else -/* - * On APUS (Amiga PowerPC cpu upgrade board), we don't know the - * physical base address of RAM at compile time. - */ -#define toreal(rd) tophys(rd,rd) -#define fromreal(rd) tovirt(rd,rd) - -#define tophys(rd,rs) \ -0: addis rd,rs,-KERNELBASE@h; \ - .section ".vtop_fixup","aw"; \ - .align 1; \ - .long 0b; \ - .previous - -#define tovirt(rd,rs) \ -0: addis rd,rs,KERNELBASE@h; \ - .section ".ptov_fixup","aw"; \ - .align 1; \ - .long 0b; \ - .previous -#endif - -#ifdef CONFIG_PPC64 -#define RFI rfid -#define MTMSRD(r) mtmsrd r - -#else -#define FIX_SRR1(ra, rb) -#ifndef CONFIG_40x -#define RFI rfi -#else -#define RFI rfi; b . /* Prevent prefetch past rfi */ -#endif -#define MTMSRD(r) mtmsr r -#define CLR_TOP32(r) -#endif - -#endif /* __KERNEL__ */ - -/* The boring bits... */ - -/* Condition Register Bit Fields */ - -#define cr0 0 -#define cr1 1 -#define cr2 2 -#define cr3 3 -#define cr4 4 -#define cr5 5 -#define cr6 6 -#define cr7 7 - - -/* General Purpose Registers (GPRs) */ - -#define r0 0 -#define r1 1 -#define r2 2 -#define r3 3 -#define r4 4 -#define r5 5 -#define r6 6 -#define r7 7 -#define r8 8 -#define r9 9 -#define r10 10 -#define r11 11 -#define r12 12 -#define r13 13 -#define r14 14 -#define r15 15 -#define r16 16 -#define r17 17 -#define r18 18 -#define r19 19 -#define r20 20 -#define r21 21 -#define r22 22 -#define r23 23 -#define r24 24 -#define r25 25 -#define r26 26 -#define r27 27 -#define r28 28 -#define r29 29 -#define r30 30 -#define r31 31 - - -/* Floating Point Registers (FPRs) */ - -#define fr0 0 -#define fr1 1 -#define fr2 2 -#define fr3 3 -#define fr4 4 -#define fr5 5 -#define fr6 6 -#define fr7 7 -#define fr8 8 -#define fr9 9 -#define fr10 10 -#define fr11 11 -#define fr12 12 -#define fr13 13 -#define fr14 14 -#define fr15 15 -#define fr16 16 -#define fr17 17 -#define fr18 18 -#define fr19 19 -#define fr20 20 -#define fr21 21 -#define fr22 22 -#define fr23 23 -#define fr24 24 -#define fr25 25 -#define fr26 26 -#define fr27 27 -#define fr28 28 -#define fr29 29 -#define fr30 30 -#define fr31 31 - -/* AltiVec Registers (VPRs) */ - -#define vr0 0 -#define vr1 1 -#define vr2 2 -#define vr3 3 -#define vr4 4 -#define vr5 5 -#define vr6 6 -#define vr7 7 -#define vr8 8 -#define vr9 9 -#define vr10 10 -#define vr11 11 -#define vr12 12 -#define vr13 13 -#define vr14 14 -#define vr15 15 -#define vr16 16 -#define vr17 17 -#define vr18 18 -#define vr19 19 -#define vr20 20 -#define vr21 21 -#define vr22 22 -#define vr23 23 -#define vr24 24 -#define vr25 25 -#define vr26 26 -#define vr27 27 -#define vr28 28 -#define vr29 29 -#define vr30 30 -#define vr31 31 - -/* VSX Registers (VSRs) */ - -#define vsr0 0 -#define vsr1 1 -#define vsr2 2 -#define vsr3 3 -#define vsr4 4 -#define vsr5 5 -#define vsr6 6 -#define vsr7 7 -#define vsr8 8 -#define vsr9 9 -#define vsr10 10 -#define vsr11 11 -#define vsr12 12 -#define vsr13 13 -#define vsr14 14 -#define vsr15 15 -#define vsr16 16 -#define vsr17 17 -#define vsr18 18 -#define vsr19 19 -#define vsr20 20 -#define vsr21 21 -#define vsr22 22 -#define vsr23 23 -#define vsr24 24 -#define vsr25 25 -#define vsr26 26 -#define vsr27 27 -#define vsr28 28 -#define vsr29 29 -#define vsr30 30 -#define vsr31 31 -#define vsr32 32 -#define vsr33 33 -#define vsr34 34 -#define vsr35 35 -#define vsr36 36 -#define vsr37 37 -#define vsr38 38 -#define vsr39 39 -#define vsr40 40 -#define vsr41 41 -#define vsr42 42 -#define vsr43 43 -#define vsr44 44 -#define vsr45 45 -#define vsr46 46 -#define vsr47 47 -#define vsr48 48 -#define vsr49 49 -#define vsr50 50 -#define vsr51 51 -#define vsr52 52 -#define vsr53 53 -#define vsr54 54 -#define vsr55 55 -#define vsr56 56 -#define vsr57 57 -#define vsr58 58 -#define vsr59 59 -#define vsr60 60 -#define vsr61 61 -#define vsr62 62 -#define vsr63 63 - -/* SPE Registers (EVPRs) */ - -#define evr0 0 -#define evr1 1 -#define evr2 2 -#define evr3 3 -#define evr4 4 -#define evr5 5 -#define evr6 6 -#define evr7 7 -#define evr8 8 -#define evr9 9 -#define evr10 10 -#define evr11 11 -#define evr12 12 -#define evr13 13 -#define evr14 14 -#define evr15 15 -#define evr16 16 -#define evr17 17 -#define evr18 18 -#define evr19 19 -#define evr20 20 -#define evr21 21 -#define evr22 22 -#define evr23 23 -#define evr24 24 -#define evr25 25 -#define evr26 26 -#define evr27 27 -#define evr28 28 -#define evr29 29 -#define evr30 30 -#define evr31 31 - -/* some stab codes */ -#define N_FUN 36 -#define N_RSYM 64 -#define N_SLINE 68 -#define N_SO 100 - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_POWERPC_PPC_ASM_H */ diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h deleted file mode 100644 index 101ed87..0000000 --- a/include/asm-powerpc/processor.h +++ /dev/null @@ -1,314 +0,0 @@ -#ifndef _ASM_POWERPC_PROCESSOR_H -#define _ASM_POWERPC_PROCESSOR_H - -/* - * Copyright (C) 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - -#ifdef CONFIG_VSX -#define TS_FPRWIDTH 2 -#else -#define TS_FPRWIDTH 1 -#endif - -#ifndef __ASSEMBLY__ -#include -#include -#include - -/* We do _not_ want to define new machine types at all, those must die - * in favor of using the device-tree - * -- BenH. - */ - -/* PREP sub-platform types see residual.h for these */ -#define _PREP_Motorola 0x01 /* motorola prep */ -#define _PREP_Firm 0x02 /* firmworks prep */ -#define _PREP_IBM 0x00 /* ibm prep */ -#define _PREP_Bull 0x03 /* bull prep */ - -/* CHRP sub-platform types. These are arbitrary */ -#define _CHRP_Motorola 0x04 /* motorola chrp, the cobra */ -#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */ -#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */ -#define _CHRP_briq 0x07 /* TotalImpact's briQ */ - -#if defined(__KERNEL__) && defined(CONFIG_PPC32) - -extern int _chrp_type; - -#ifdef CONFIG_PPC_PREP - -/* what kind of prep workstation we are */ -extern int _prep_type; - -#endif /* CONFIG_PPC_PREP */ - -#endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */ - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -/* Macros for adjusting thread priority (hardware multi-threading) */ -#define HMT_very_low() asm volatile("or 31,31,31 # very low priority") -#define HMT_low() asm volatile("or 1,1,1 # low priority") -#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority") -#define HMT_medium() asm volatile("or 2,2,2 # medium priority") -#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority") -#define HMT_high() asm volatile("or 3,3,3 # high priority") - -#ifdef __KERNEL__ - -extern int have_of; - -struct task_struct; -void start_thread(struct pt_regs *regs, unsigned long fdptr, unsigned long sp); -void release_thread(struct task_struct *); - -/* Prepare to copy thread state - unlazy all lazy status */ -extern void prepare_to_copy(struct task_struct *tsk); - -/* Create a new kernel thread. */ -extern long kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -/* Lazy FPU handling on uni-processor */ -extern struct task_struct *last_task_used_math; -extern struct task_struct *last_task_used_altivec; -extern struct task_struct *last_task_used_vsx; -extern struct task_struct *last_task_used_spe; - -#ifdef CONFIG_PPC32 - -#if CONFIG_TASK_SIZE > CONFIG_KERNEL_START -#error User TASK_SIZE overlaps with KERNEL_START address -#endif -#define TASK_SIZE (CONFIG_TASK_SIZE) - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE (TASK_SIZE / 8 * 3) -#endif - -#ifdef CONFIG_PPC64 -/* 64-bit user address space is 44-bits (16TB user VM) */ -#define TASK_SIZE_USER64 (0x0000100000000000UL) - -/* - * 32-bit user address space is 4GB - 1 page - * (this 1 page is needed so referencing of 0xFFFFFFFF generates EFAULT - */ -#define TASK_SIZE_USER32 (0x0000000100000000UL - (1*PAGE_SIZE)) - -#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \ - TASK_SIZE_USER32 : TASK_SIZE_USER64) -#define TASK_SIZE TASK_SIZE_OF(current) - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) -#define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4)) - -#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \ - TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 ) -#endif - -#ifdef __KERNEL__ -#ifdef __powerpc64__ - -#define STACK_TOP_USER64 TASK_SIZE_USER64 -#define STACK_TOP_USER32 TASK_SIZE_USER32 - -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ - STACK_TOP_USER32 : STACK_TOP_USER64) - -#define STACK_TOP_MAX STACK_TOP_USER64 - -#else /* __powerpc64__ */ - -#define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP - -#endif /* __powerpc64__ */ -#endif /* __KERNEL__ */ - -typedef struct { - unsigned long seg; -} mm_segment_t; - -#define TS_FPROFFSET 0 -#define TS_VSRLOWOFFSET 1 -#define TS_FPR(i) fpr[i][TS_FPROFFSET] - -struct thread_struct { - unsigned long ksp; /* Kernel stack pointer */ - unsigned long ksp_limit; /* if ksp <= ksp_limit stack overflow */ - -#ifdef CONFIG_PPC64 - unsigned long ksp_vsid; -#endif - struct pt_regs *regs; /* Pointer to saved register state */ - mm_segment_t fs; /* for get_fs() validation */ -#ifdef CONFIG_PPC32 - void *pgdir; /* root of page-table tree */ -#endif -#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) - unsigned long dbcr0; /* debug control register values */ - unsigned long dbcr1; -#endif - /* FP and VSX 0-31 register set */ - double fpr[32][TS_FPRWIDTH]; - struct { - - unsigned int pad; - unsigned int val; /* Floating point status */ - } fpscr; - int fpexc_mode; /* floating-point exception mode */ - unsigned int align_ctl; /* alignment handling control */ -#ifdef CONFIG_PPC64 - unsigned long start_tb; /* Start purr when proc switched in */ - unsigned long accum_tb; /* Total accumilated purr for process */ -#endif - unsigned long dabr; /* Data address breakpoint register */ -#ifdef CONFIG_ALTIVEC - /* Complete AltiVec register set */ - vector128 vr[32] __attribute__((aligned(16))); - /* AltiVec status */ - vector128 vscr __attribute__((aligned(16))); - unsigned long vrsave; - int used_vr; /* set if process has used altivec */ -#endif /* CONFIG_ALTIVEC */ -#ifdef CONFIG_VSX - /* VSR status */ - int used_vsr; /* set if process has used altivec */ -#endif /* CONFIG_VSX */ -#ifdef CONFIG_SPE - unsigned long evr[32]; /* upper 32-bits of SPE regs */ - u64 acc; /* Accumulator */ - unsigned long spefscr; /* SPE & eFP status */ - int used_spe; /* set if process has used spe */ -#endif /* CONFIG_SPE */ -}; - -#define ARCH_MIN_TASKALIGN 16 - -#define INIT_SP (sizeof(init_stack) + (unsigned long) &init_stack) -#define INIT_SP_LIMIT \ - (_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack) - - -#ifdef CONFIG_PPC32 -#define INIT_THREAD { \ - .ksp = INIT_SP, \ - .ksp_limit = INIT_SP_LIMIT, \ - .fs = KERNEL_DS, \ - .pgdir = swapper_pg_dir, \ - .fpexc_mode = MSR_FE0 | MSR_FE1, \ -} -#else -#define INIT_THREAD { \ - .ksp = INIT_SP, \ - .ksp_limit = INIT_SP_LIMIT, \ - .regs = (struct pt_regs *)INIT_SP - 1, /* XXX bogus, I think */ \ - .fs = KERNEL_DS, \ - .fpr = {{0}}, \ - .fpscr = { .val = 0, }, \ - .fpexc_mode = 0, \ -} -#endif - -/* - * Return saved PC of a blocked thread. For now, this is the "user" PC - */ -#define thread_saved_pc(tsk) \ - ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) - -#define task_pt_regs(tsk) ((struct pt_regs *)(tsk)->thread.regs) - -unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->nip: 0) -#define KSTK_ESP(tsk) ((tsk)->thread.regs? (tsk)->thread.regs->gpr[1]: 0) - -/* Get/set floating-point exception mode */ -#define GET_FPEXC_CTL(tsk, adr) get_fpexc_mode((tsk), (adr)) -#define SET_FPEXC_CTL(tsk, val) set_fpexc_mode((tsk), (val)) - -extern int get_fpexc_mode(struct task_struct *tsk, unsigned long adr); -extern int set_fpexc_mode(struct task_struct *tsk, unsigned int val); - -#define GET_ENDIAN(tsk, adr) get_endian((tsk), (adr)) -#define SET_ENDIAN(tsk, val) set_endian((tsk), (val)) - -extern int get_endian(struct task_struct *tsk, unsigned long adr); -extern int set_endian(struct task_struct *tsk, unsigned int val); - -#define GET_UNALIGN_CTL(tsk, adr) get_unalign_ctl((tsk), (adr)) -#define SET_UNALIGN_CTL(tsk, val) set_unalign_ctl((tsk), (val)) - -extern int get_unalign_ctl(struct task_struct *tsk, unsigned long adr); -extern int set_unalign_ctl(struct task_struct *tsk, unsigned int val); - -static inline unsigned int __unpack_fe01(unsigned long msr_bits) -{ - return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); -} - -static inline unsigned long __pack_fe01(unsigned int fpmode) -{ - return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); -} - -#ifdef CONFIG_PPC64 -#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0) -#else -#define cpu_relax() barrier() -#endif - -/* Check that a certain kernel stack pointer is valid in task_struct p */ -int validate_sp(unsigned long sp, struct task_struct *p, - unsigned long nbytes); - -/* - * Prefetch macros. - */ -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH - -static inline void prefetch(const void *x) -{ - if (unlikely(!x)) - return; - - __asm__ __volatile__ ("dcbt 0,%0" : : "r" (x)); -} - -static inline void prefetchw(const void *x) -{ - if (unlikely(!x)) - return; - - __asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x)); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -#ifdef CONFIG_PPC64 -#define HAVE_ARCH_PICK_MMAP_LAYOUT -#endif - -#endif /* __KERNEL__ */ -#endif /* __ASSEMBLY__ */ -#endif /* _ASM_POWERPC_PROCESSOR_H */ diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h deleted file mode 100644 index eb3bd2e..0000000 --- a/include/asm-powerpc/prom.h +++ /dev/null @@ -1,356 +0,0 @@ -#ifndef _POWERPC_PROM_H -#define _POWERPC_PROM_H -#ifdef __KERNEL__ - -/* - * Definitions for talking to the Open Firmware PROM on - * Power Macintosh computers. - * - * Copyright (C) 1996-2005 Paul Mackerras. - * - * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include -#include -#include -#include - -#define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 1 -#define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 - -#define of_compat_cmp(s1, s2, l) strcasecmp((s1), (s2)) -#define of_prop_cmp(s1, s2) strcmp((s1), (s2)) -#define of_node_cmp(s1, s2) strcasecmp((s1), (s2)) - -/* Definitions used by the flattened device tree */ -#define OF_DT_HEADER 0xd00dfeed /* marker */ -#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */ -#define OF_DT_END_NODE 0x2 /* End node */ -#define OF_DT_PROP 0x3 /* Property: name off, size, - * content */ -#define OF_DT_NOP 0x4 /* nop */ -#define OF_DT_END 0x9 - -#define OF_DT_VERSION 0x10 - -/* - * This is what gets passed to the kernel by prom_init or kexec - * - * The dt struct contains the device tree structure, full pathes and - * property contents. The dt strings contain a separate block with just - * the strings for the property names, and is fully page aligned and - * self contained in a page, so that it can be kept around by the kernel, - * each property name appears only once in this page (cheap compression) - * - * the mem_rsvmap contains a map of reserved ranges of physical memory, - * passing it here instead of in the device-tree itself greatly simplifies - * the job of everybody. It's just a list of u64 pairs (base/size) that - * ends when size is 0 - */ -struct boot_param_header -{ - u32 magic; /* magic word OF_DT_HEADER */ - u32 totalsize; /* total size of DT block */ - u32 off_dt_struct; /* offset to structure */ - u32 off_dt_strings; /* offset to strings */ - u32 off_mem_rsvmap; /* offset to memory reserve map */ - u32 version; /* format version */ - u32 last_comp_version; /* last compatible version */ - /* version 2 fields below */ - u32 boot_cpuid_phys; /* Physical CPU id we're booting on */ - /* version 3 fields below */ - u32 dt_strings_size; /* size of the DT strings block */ - /* version 17 fields below */ - u32 dt_struct_size; /* size of the DT structure block */ -}; - - - -typedef u32 phandle; -typedef u32 ihandle; - -struct property { - char *name; - int length; - void *value; - struct property *next; -}; - -struct device_node { - const char *name; - const char *type; - phandle node; - phandle linux_phandle; - char *full_name; - - struct property *properties; - struct property *deadprops; /* removed properties */ - struct device_node *parent; - struct device_node *child; - struct device_node *sibling; - struct device_node *next; /* next device of same type */ - struct device_node *allnext; /* next in list of all nodes */ - struct proc_dir_entry *pde; /* this node's proc directory */ - struct kref kref; - unsigned long _flags; - void *data; -}; - -extern struct device_node *of_chosen; - -static inline int of_node_check_flag(struct device_node *n, unsigned long flag) -{ - return test_bit(flag, &n->_flags); -} - -static inline void of_node_set_flag(struct device_node *n, unsigned long flag) -{ - set_bit(flag, &n->_flags); -} - - -#define HAVE_ARCH_DEVTREE_FIXUPS - -static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de) -{ - dn->pde = de; -} - - -extern struct device_node *of_find_all_nodes(struct device_node *prev); -extern struct device_node *of_node_get(struct device_node *node); -extern void of_node_put(struct device_node *node); - -/* For scanning the flat device-tree at boot time */ -extern int __init of_scan_flat_dt(int (*it)(unsigned long node, - const char *uname, int depth, - void *data), - void *data); -extern void* __init of_get_flat_dt_prop(unsigned long node, const char *name, - unsigned long *size); -extern int __init of_flat_dt_is_compatible(unsigned long node, const char *name); -extern unsigned long __init of_get_flat_dt_root(void); - -/* For updating the device tree at runtime */ -extern void of_attach_node(struct device_node *); -extern void of_detach_node(struct device_node *); - -/* Other Prototypes */ -extern void finish_device_tree(void); -extern void unflatten_device_tree(void); -extern void early_init_devtree(void *); -extern int machine_is_compatible(const char *compat); -extern void print_properties(struct device_node *node); -extern int prom_n_intr_cells(struct device_node* np); -extern void prom_get_irq_senses(unsigned char *senses, int off, int max); -extern int prom_add_property(struct device_node* np, struct property* prop); -extern int prom_remove_property(struct device_node *np, struct property *prop); -extern int prom_update_property(struct device_node *np, - struct property *newprop, - struct property *oldprop); - -#ifdef CONFIG_PPC32 -/* - * PCI <-> OF matching functions - * (XXX should these be here?) - */ -struct pci_bus; -struct pci_dev; -extern int pci_device_from_OF_node(struct device_node *node, - u8* bus, u8* devfn); -extern struct device_node* pci_busdev_to_OF_node(struct pci_bus *, int); -extern struct device_node* pci_device_to_OF_node(struct pci_dev *); -extern void pci_create_OF_bus_map(void); -#endif - -extern struct resource *request_OF_resource(struct device_node* node, - int index, const char* name_postfix); -extern int release_OF_resource(struct device_node* node, int index); - - -/* - * OF address retreival & translation - */ - - -/* Helper to read a big number; size is in cells (not bytes) */ -static inline u64 of_read_number(const u32 *cell, int size) -{ - u64 r = 0; - while (size--) - r = (r << 32) | *(cell++); - return r; -} - -/* Like of_read_number, but we want an unsigned long result */ -#ifdef CONFIG_PPC32 -static inline unsigned long of_read_ulong(const u32 *cell, int size) -{ - return cell[size-1]; -} -#else -#define of_read_ulong(cell, size) of_read_number(cell, size) -#endif - -/* Translate an OF address block into a CPU physical address - */ -extern u64 of_translate_address(struct device_node *np, const u32 *addr); - -/* Translate a DMA address from device space to CPU space */ -extern u64 of_translate_dma_address(struct device_node *dev, - const u32 *in_addr); - -/* Extract an address from a device, returns the region size and - * the address space flags too. The PCI version uses a BAR number - * instead of an absolute index - */ -extern const u32 *of_get_address(struct device_node *dev, int index, - u64 *size, unsigned int *flags); -#ifdef CONFIG_PCI -extern const u32 *of_get_pci_address(struct device_node *dev, int bar_no, - u64 *size, unsigned int *flags); -#else -static inline const u32 *of_get_pci_address(struct device_node *dev, - int bar_no, u64 *size, unsigned int *flags) -{ - return NULL; -} -#endif /* CONFIG_PCI */ - -/* Get an address as a resource. Note that if your address is - * a PIO address, the conversion will fail if the physical address - * can't be internally converted to an IO token with - * pci_address_to_pio(), that is because it's either called to early - * or it can't be matched to any host bridge IO space - */ -extern int of_address_to_resource(struct device_node *dev, int index, - struct resource *r); -#ifdef CONFIG_PCI -extern int of_pci_address_to_resource(struct device_node *dev, int bar, - struct resource *r); -#else -static inline int of_pci_address_to_resource(struct device_node *dev, int bar, - struct resource *r) -{ - return -ENOSYS; -} -#endif /* CONFIG_PCI */ - -/* Parse the ibm,dma-window property of an OF node into the busno, phys and - * size parameters. - */ -void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop, - unsigned long *busno, unsigned long *phys, unsigned long *size); - -extern void kdump_move_device_tree(void); - -/* CPU OF node matching */ -struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); - -/* Get the MAC address */ -extern const void *of_get_mac_address(struct device_node *np); - -/* - * OF interrupt mapping - */ - -/* This structure is returned when an interrupt is mapped. The controller - * field needs to be put() after use - */ - -#define OF_MAX_IRQ_SPEC 4 /* We handle specifiers of at most 4 cells */ - -struct of_irq { - struct device_node *controller; /* Interrupt controller node */ - u32 size; /* Specifier size */ - u32 specifier[OF_MAX_IRQ_SPEC]; /* Specifier copy */ -}; - -/** - * of_irq_map_init - Initialize the irq remapper - * @flags: flags defining workarounds to enable - * - * Some machines have bugs in the device-tree which require certain workarounds - * to be applied. Call this before any interrupt mapping attempts to enable - * those workarounds. - */ -#define OF_IMAP_OLDWORLD_MAC 0x00000001 -#define OF_IMAP_NO_PHANDLE 0x00000002 - -extern void of_irq_map_init(unsigned int flags); - -/** - * of_irq_map_raw - Low level interrupt tree parsing - * @parent: the device interrupt parent - * @intspec: interrupt specifier ("interrupts" property of the device) - * @ointsize: size of the passed in interrupt specifier - * @addr: address specifier (start of "reg" property of the device) - * @out_irq: structure of_irq filled by this function - * - * Returns 0 on success and a negative number on error - * - * This function is a low-level interrupt tree walking function. It - * can be used to do a partial walk with synthetized reg and interrupts - * properties, for example when resolving PCI interrupts when no device - * node exist for the parent. - * - */ - -extern int of_irq_map_raw(struct device_node *parent, const u32 *intspec, - u32 ointsize, const u32 *addr, - struct of_irq *out_irq); - - -/** - * of_irq_map_one - Resolve an interrupt for a device - * @device: the device whose interrupt is to be resolved - * @index: index of the interrupt to resolve - * @out_irq: structure of_irq filled by this function - * - * This function resolves an interrupt, walking the tree, for a given - * device-tree node. It's the high level pendant to of_irq_map_raw(). - * It also implements the workarounds for OldWolrd Macs. - */ -extern int of_irq_map_one(struct device_node *device, int index, - struct of_irq *out_irq); - -/** - * of_irq_map_pci - Resolve the interrupt for a PCI device - * @pdev: the device whose interrupt is to be resolved - * @out_irq: structure of_irq filled by this function - * - * This function resolves the PCI interrupt for a given PCI device. If a - * device-node exists for a given pci_dev, it will use normal OF tree - * walking. If not, it will implement standard swizzling and walk up the - * PCI tree until an device-node is found, at which point it will finish - * resolving using the OF tree walking. - */ -struct pci_dev; -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq); - -extern int of_irq_to_resource(struct device_node *dev, int index, - struct resource *r); - -/** - * of_iomap - Maps the memory mapped IO for a given device_node - * @device: the device whose io range will be mapped - * @index: index of the io range - * - * Returns a pointer to the mapped memory - */ -extern void __iomem *of_iomap(struct device_node *device, int index); - -/* - * NB: This is here while we transition from using asm/prom.h - * to linux/of.h - */ -#include - -#endif /* __KERNEL__ */ -#endif /* _POWERPC_PROM_H */ diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h deleted file mode 100644 index f9e34c4..0000000 --- a/include/asm-powerpc/ps3.h +++ /dev/null @@ -1,519 +0,0 @@ -/* - * PS3 platform declarations. - * - * Copyright (C) 2006 Sony Computer Entertainment Inc. - * Copyright 2006 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#if !defined(_ASM_POWERPC_PS3_H) -#define _ASM_POWERPC_PS3_H - -#include -#include -#include -#include "cell-pmu.h" - -union ps3_firmware_version { - u64 raw; - struct { - u16 pad; - u16 major; - u16 minor; - u16 rev; - }; -}; - -void ps3_get_firmware_version(union ps3_firmware_version *v); -int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev); - -/* 'Other OS' area */ - -enum ps3_param_av_multi_out { - PS3_PARAM_AV_MULTI_OUT_NTSC = 0, - PS3_PARAM_AV_MULTI_OUT_PAL_RGB = 1, - PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR = 2, - PS3_PARAM_AV_MULTI_OUT_SECAM = 3, -}; - -enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void); - -/* dma routines */ - -enum ps3_dma_page_size { - PS3_DMA_4K = 12U, - PS3_DMA_64K = 16U, - PS3_DMA_1M = 20U, - PS3_DMA_16M = 24U, -}; - -enum ps3_dma_region_type { - PS3_DMA_OTHER = 0, - PS3_DMA_INTERNAL = 2, -}; - -struct ps3_dma_region_ops; - -/** - * struct ps3_dma_region - A per device dma state variables structure - * @did: The HV device id. - * @page_size: The ioc pagesize. - * @region_type: The HV region type. - * @bus_addr: The 'translated' bus address of the region. - * @len: The length in bytes of the region. - * @offset: The offset from the start of memory of the region. - * @ioid: The IOID of the device who owns this region - * @chunk_list: Opaque variable used by the ioc page manager. - * @region_ops: struct ps3_dma_region_ops - dma region operations - */ - -struct ps3_dma_region { - struct ps3_system_bus_device *dev; - /* device variables */ - const struct ps3_dma_region_ops *region_ops; - unsigned char ioid; - enum ps3_dma_page_size page_size; - enum ps3_dma_region_type region_type; - unsigned long len; - unsigned long offset; - - /* driver variables (set by ps3_dma_region_create) */ - unsigned long bus_addr; - struct { - spinlock_t lock; - struct list_head head; - } chunk_list; -}; - -struct ps3_dma_region_ops { - int (*create)(struct ps3_dma_region *); - int (*free)(struct ps3_dma_region *); - int (*map)(struct ps3_dma_region *, - unsigned long virt_addr, - unsigned long len, - unsigned long *bus_addr, - u64 iopte_pp); - int (*unmap)(struct ps3_dma_region *, - unsigned long bus_addr, - unsigned long len); -}; -/** - * struct ps3_dma_region_init - Helper to initialize structure variables - * - * Helper to properly initialize variables prior to calling - * ps3_system_bus_device_register. - */ - -struct ps3_system_bus_device; - -int ps3_dma_region_init(struct ps3_system_bus_device *dev, - struct ps3_dma_region *r, enum ps3_dma_page_size page_size, - enum ps3_dma_region_type region_type, void *addr, unsigned long len); -int ps3_dma_region_create(struct ps3_dma_region *r); -int ps3_dma_region_free(struct ps3_dma_region *r); -int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr, - unsigned long len, unsigned long *bus_addr, - u64 iopte_pp); -int ps3_dma_unmap(struct ps3_dma_region *r, unsigned long bus_addr, - unsigned long len); - -/* mmio routines */ - -enum ps3_mmio_page_size { - PS3_MMIO_4K = 12U, - PS3_MMIO_64K = 16U -}; - -struct ps3_mmio_region_ops; -/** - * struct ps3_mmio_region - a per device mmio state variables structure - * - * Current systems can be supported with a single region per device. - */ - -struct ps3_mmio_region { - struct ps3_system_bus_device *dev; - const struct ps3_mmio_region_ops *mmio_ops; - unsigned long bus_addr; - unsigned long len; - enum ps3_mmio_page_size page_size; - unsigned long lpar_addr; -}; - -struct ps3_mmio_region_ops { - int (*create)(struct ps3_mmio_region *); - int (*free)(struct ps3_mmio_region *); -}; -/** - * struct ps3_mmio_region_init - Helper to initialize structure variables - * - * Helper to properly initialize variables prior to calling - * ps3_system_bus_device_register. - */ - -int ps3_mmio_region_init(struct ps3_system_bus_device *dev, - struct ps3_mmio_region *r, unsigned long bus_addr, unsigned long len, - enum ps3_mmio_page_size page_size); -int ps3_mmio_region_create(struct ps3_mmio_region *r); -int ps3_free_mmio_region(struct ps3_mmio_region *r); -unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr); - -/* inrerrupt routines */ - -enum ps3_cpu_binding { - PS3_BINDING_CPU_ANY = -1, - PS3_BINDING_CPU_0 = 0, - PS3_BINDING_CPU_1 = 1, -}; - -int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet, - unsigned int *virq); -int ps3_irq_plug_destroy(unsigned int virq); -int ps3_event_receive_port_setup(enum ps3_cpu_binding cpu, unsigned int *virq); -int ps3_event_receive_port_destroy(unsigned int virq); -int ps3_send_event_locally(unsigned int virq); - -int ps3_io_irq_setup(enum ps3_cpu_binding cpu, unsigned int interrupt_id, - unsigned int *virq); -int ps3_io_irq_destroy(unsigned int virq); -int ps3_vuart_irq_setup(enum ps3_cpu_binding cpu, void* virt_addr_bmp, - unsigned int *virq); -int ps3_vuart_irq_destroy(unsigned int virq); -int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id, - unsigned int class, unsigned int *virq); -int ps3_spe_irq_destroy(unsigned int virq); - -int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev, - enum ps3_cpu_binding cpu, unsigned int *virq); -int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev, - unsigned int virq); - -/* lv1 result codes */ - -enum lv1_result { - LV1_SUCCESS = 0, - /* not used -1 */ - LV1_RESOURCE_SHORTAGE = -2, - LV1_NO_PRIVILEGE = -3, - LV1_DENIED_BY_POLICY = -4, - LV1_ACCESS_VIOLATION = -5, - LV1_NO_ENTRY = -6, - LV1_DUPLICATE_ENTRY = -7, - LV1_TYPE_MISMATCH = -8, - LV1_BUSY = -9, - LV1_EMPTY = -10, - LV1_WRONG_STATE = -11, - /* not used -12 */ - LV1_NO_MATCH = -13, - LV1_ALREADY_CONNECTED = -14, - LV1_UNSUPPORTED_PARAMETER_VALUE = -15, - LV1_CONDITION_NOT_SATISFIED = -16, - LV1_ILLEGAL_PARAMETER_VALUE = -17, - LV1_BAD_OPTION = -18, - LV1_IMPLEMENTATION_LIMITATION = -19, - LV1_NOT_IMPLEMENTED = -20, - LV1_INVALID_CLASS_ID = -21, - LV1_CONSTRAINT_NOT_SATISFIED = -22, - LV1_ALIGNMENT_ERROR = -23, - LV1_HARDWARE_ERROR = -24, - LV1_INVALID_DATA_FORMAT = -25, - LV1_INVALID_OPERATION = -26, - LV1_INTERNAL_ERROR = -32768, -}; - -static inline const char* ps3_result(int result) -{ -#if defined(DEBUG) - switch (result) { - case LV1_SUCCESS: - return "LV1_SUCCESS (0)"; - case -1: - return "** unknown result ** (-1)"; - case LV1_RESOURCE_SHORTAGE: - return "LV1_RESOURCE_SHORTAGE (-2)"; - case LV1_NO_PRIVILEGE: - return "LV1_NO_PRIVILEGE (-3)"; - case LV1_DENIED_BY_POLICY: - return "LV1_DENIED_BY_POLICY (-4)"; - case LV1_ACCESS_VIOLATION: - return "LV1_ACCESS_VIOLATION (-5)"; - case LV1_NO_ENTRY: - return "LV1_NO_ENTRY (-6)"; - case LV1_DUPLICATE_ENTRY: - return "LV1_DUPLICATE_ENTRY (-7)"; - case LV1_TYPE_MISMATCH: - return "LV1_TYPE_MISMATCH (-8)"; - case LV1_BUSY: - return "LV1_BUSY (-9)"; - case LV1_EMPTY: - return "LV1_EMPTY (-10)"; - case LV1_WRONG_STATE: - return "LV1_WRONG_STATE (-11)"; - case -12: - return "** unknown result ** (-12)"; - case LV1_NO_MATCH: - return "LV1_NO_MATCH (-13)"; - case LV1_ALREADY_CONNECTED: - return "LV1_ALREADY_CONNECTED (-14)"; - case LV1_UNSUPPORTED_PARAMETER_VALUE: - return "LV1_UNSUPPORTED_PARAMETER_VALUE (-15)"; - case LV1_CONDITION_NOT_SATISFIED: - return "LV1_CONDITION_NOT_SATISFIED (-16)"; - case LV1_ILLEGAL_PARAMETER_VALUE: - return "LV1_ILLEGAL_PARAMETER_VALUE (-17)"; - case LV1_BAD_OPTION: - return "LV1_BAD_OPTION (-18)"; - case LV1_IMPLEMENTATION_LIMITATION: - return "LV1_IMPLEMENTATION_LIMITATION (-19)"; - case LV1_NOT_IMPLEMENTED: - return "LV1_NOT_IMPLEMENTED (-20)"; - case LV1_INVALID_CLASS_ID: - return "LV1_INVALID_CLASS_ID (-21)"; - case LV1_CONSTRAINT_NOT_SATISFIED: - return "LV1_CONSTRAINT_NOT_SATISFIED (-22)"; - case LV1_ALIGNMENT_ERROR: - return "LV1_ALIGNMENT_ERROR (-23)"; - case LV1_HARDWARE_ERROR: - return "LV1_HARDWARE_ERROR (-24)"; - case LV1_INVALID_DATA_FORMAT: - return "LV1_INVALID_DATA_FORMAT (-25)"; - case LV1_INVALID_OPERATION: - return "LV1_INVALID_OPERATION (-26)"; - case LV1_INTERNAL_ERROR: - return "LV1_INTERNAL_ERROR (-32768)"; - default: - BUG(); - return "** unknown result **"; - }; -#else - return ""; -#endif -} - -/* system bus routines */ - -enum ps3_match_id { - PS3_MATCH_ID_EHCI = 1, - PS3_MATCH_ID_OHCI = 2, - PS3_MATCH_ID_GELIC = 3, - PS3_MATCH_ID_AV_SETTINGS = 4, - PS3_MATCH_ID_SYSTEM_MANAGER = 5, - PS3_MATCH_ID_STOR_DISK = 6, - PS3_MATCH_ID_STOR_ROM = 7, - PS3_MATCH_ID_STOR_FLASH = 8, - PS3_MATCH_ID_SOUND = 9, - PS3_MATCH_ID_GRAPHICS = 10, - PS3_MATCH_ID_LPM = 11, -}; - -#define PS3_MODULE_ALIAS_EHCI "ps3:1" -#define PS3_MODULE_ALIAS_OHCI "ps3:2" -#define PS3_MODULE_ALIAS_GELIC "ps3:3" -#define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4" -#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5" -#define PS3_MODULE_ALIAS_STOR_DISK "ps3:6" -#define PS3_MODULE_ALIAS_STOR_ROM "ps3:7" -#define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8" -#define PS3_MODULE_ALIAS_SOUND "ps3:9" -#define PS3_MODULE_ALIAS_GRAPHICS "ps3:10" -#define PS3_MODULE_ALIAS_LPM "ps3:11" - -enum ps3_system_bus_device_type { - PS3_DEVICE_TYPE_IOC0 = 1, - PS3_DEVICE_TYPE_SB, - PS3_DEVICE_TYPE_VUART, - PS3_DEVICE_TYPE_LPM, -}; - -enum ps3_match_sub_id { - /* for PS3_MATCH_ID_GRAPHICS */ - PS3_MATCH_SUB_ID_FB = 1, -}; - -/** - * struct ps3_system_bus_device - a device on the system bus - */ - -struct ps3_system_bus_device { - enum ps3_match_id match_id; - enum ps3_match_sub_id match_sub_id; - enum ps3_system_bus_device_type dev_type; - - u64 bus_id; /* SB */ - u64 dev_id; /* SB */ - unsigned int interrupt_id; /* SB */ - struct ps3_dma_region *d_region; /* SB, IOC0 */ - struct ps3_mmio_region *m_region; /* SB, IOC0*/ - unsigned int port_number; /* VUART */ - struct { /* LPM */ - u64 node_id; - u64 pu_id; - u64 rights; - } lpm; - -/* struct iommu_table *iommu_table; -- waiting for BenH's cleanups */ - struct device core; - void *driver_priv; /* private driver variables */ -}; - -int ps3_open_hv_device(struct ps3_system_bus_device *dev); -int ps3_close_hv_device(struct ps3_system_bus_device *dev); - -/** - * struct ps3_system_bus_driver - a driver for a device on the system bus - */ - -struct ps3_system_bus_driver { - enum ps3_match_id match_id; - enum ps3_match_sub_id match_sub_id; - struct device_driver core; - int (*probe)(struct ps3_system_bus_device *); - int (*remove)(struct ps3_system_bus_device *); - int (*shutdown)(struct ps3_system_bus_device *); -/* int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */ -/* int (*resume)(struct ps3_system_bus_device *); */ -}; - -int ps3_system_bus_device_register(struct ps3_system_bus_device *dev); -int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv); -void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv); - -static inline struct ps3_system_bus_driver *ps3_drv_to_system_bus_drv( - struct device_driver *_drv) -{ - return container_of(_drv, struct ps3_system_bus_driver, core); -} -static inline struct ps3_system_bus_device *ps3_dev_to_system_bus_dev( - struct device *_dev) -{ - return container_of(_dev, struct ps3_system_bus_device, core); -} -static inline struct ps3_system_bus_driver * - ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device *_dev) -{ - BUG_ON(!_dev); - BUG_ON(!_dev->core.driver); - return ps3_drv_to_system_bus_drv(_dev->core.driver); -} - -/** - * ps3_system_bus_set_drvdata - - * @dev: device structure - * @data: Data to set - */ - -static inline void ps3_system_bus_set_driver_data( - struct ps3_system_bus_device *dev, void *data) -{ - dev->core.driver_data = data; -} -static inline void *ps3_system_bus_get_driver_data( - struct ps3_system_bus_device *dev) -{ - return dev->core.driver_data; -} - -/* These two need global scope for get_dma_ops(). */ - -extern struct bus_type ps3_system_bus_type; - -/* system manager */ - -struct ps3_sys_manager_ops { - struct ps3_system_bus_device *dev; - void (*power_off)(struct ps3_system_bus_device *dev); - void (*restart)(struct ps3_system_bus_device *dev); -}; - -void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops); -void __noreturn ps3_sys_manager_power_off(void); -void __noreturn ps3_sys_manager_restart(void); -void __noreturn ps3_sys_manager_halt(void); -int ps3_sys_manager_get_wol(void); -void ps3_sys_manager_set_wol(int state); - -struct ps3_prealloc { - const char *name; - void *address; - unsigned long size; - unsigned long align; -}; - -extern struct ps3_prealloc ps3fb_videomemory; -extern struct ps3_prealloc ps3flash_bounce_buffer; - -/* logical performance monitor */ - -/** - * enum ps3_lpm_rights - Rigths granted by the system policy module. - * - * @PS3_LPM_RIGHTS_USE_LPM: The right to use the lpm. - * @PS3_LPM_RIGHTS_USE_TB: The right to use the internal trace buffer. - */ - -enum ps3_lpm_rights { - PS3_LPM_RIGHTS_USE_LPM = 0x001, - PS3_LPM_RIGHTS_USE_TB = 0x100, -}; - -/** - * enum ps3_lpm_tb_type - Type of trace buffer lv1 should use. - * - * @PS3_LPM_TB_TYPE_NONE: Do not use a trace buffer. - * @PS3_LPM_RIGHTS_USE_TB: Use the lv1 internal trace buffer. Must have - * rights @PS3_LPM_RIGHTS_USE_TB. - */ - -enum ps3_lpm_tb_type { - PS3_LPM_TB_TYPE_NONE = 0, - PS3_LPM_TB_TYPE_INTERNAL = 1, -}; - -int ps3_lpm_open(enum ps3_lpm_tb_type tb_type, void *tb_cache, - u64 tb_cache_size); -int ps3_lpm_close(void); -int ps3_lpm_copy_tb(unsigned long offset, void *buf, unsigned long count, - unsigned long *bytes_copied); -int ps3_lpm_copy_tb_to_user(unsigned long offset, void __user *buf, - unsigned long count, unsigned long *bytes_copied); -void ps3_set_bookmark(u64 bookmark); -void ps3_set_pm_bookmark(u64 tag, u64 incident, u64 th_id); -int ps3_set_signal(u64 rtas_signal_group, u8 signal_bit, u16 sub_unit, - u8 bus_word); - -u32 ps3_read_phys_ctr(u32 cpu, u32 phys_ctr); -void ps3_write_phys_ctr(u32 cpu, u32 phys_ctr, u32 val); -u32 ps3_read_ctr(u32 cpu, u32 ctr); -void ps3_write_ctr(u32 cpu, u32 ctr, u32 val); - -u32 ps3_read_pm07_control(u32 cpu, u32 ctr); -void ps3_write_pm07_control(u32 cpu, u32 ctr, u32 val); -u32 ps3_read_pm(u32 cpu, enum pm_reg_name reg); -void ps3_write_pm(u32 cpu, enum pm_reg_name reg, u32 val); - -u32 ps3_get_ctr_size(u32 cpu, u32 phys_ctr); -void ps3_set_ctr_size(u32 cpu, u32 phys_ctr, u32 ctr_size); - -void ps3_enable_pm(u32 cpu); -void ps3_disable_pm(u32 cpu); -void ps3_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); -void ps3_disable_pm_interrupts(u32 cpu); - -u32 ps3_get_and_clear_pm_interrupts(u32 cpu); -void ps3_sync_irq(int node); -u32 ps3_get_hw_thread_id(int cpu); -u64 ps3_get_spe_id(void *arg); - -#endif diff --git a/include/asm-powerpc/ps3av.h b/include/asm-powerpc/ps3av.h deleted file mode 100644 index fda9871..0000000 --- a/include/asm-powerpc/ps3av.h +++ /dev/null @@ -1,744 +0,0 @@ -/* - * PS3 AV backend support. - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_PS3AV_H_ -#define _ASM_POWERPC_PS3AV_H_ - -/** command for ioctl() **/ -#define PS3AV_VERSION 0x205 /* version of ps3av command */ - -#define PS3AV_CID_AV_INIT 0x00000001 -#define PS3AV_CID_AV_FIN 0x00000002 -#define PS3AV_CID_AV_GET_HW_CONF 0x00000003 -#define PS3AV_CID_AV_GET_MONITOR_INFO 0x00000004 -#define PS3AV_CID_AV_ENABLE_EVENT 0x00000006 -#define PS3AV_CID_AV_DISABLE_EVENT 0x00000007 -#define PS3AV_CID_AV_TV_MUTE 0x0000000a - -#define PS3AV_CID_AV_VIDEO_CS 0x00010001 -#define PS3AV_CID_AV_VIDEO_MUTE 0x00010002 -#define PS3AV_CID_AV_VIDEO_DISABLE_SIG 0x00010003 -#define PS3AV_CID_AV_AUDIO_PARAM 0x00020001 -#define PS3AV_CID_AV_AUDIO_MUTE 0x00020002 -#define PS3AV_CID_AV_HDMI_MODE 0x00040001 - -#define PS3AV_CID_VIDEO_INIT 0x01000001 -#define PS3AV_CID_VIDEO_MODE 0x01000002 -#define PS3AV_CID_VIDEO_FORMAT 0x01000004 -#define PS3AV_CID_VIDEO_PITCH 0x01000005 - -#define PS3AV_CID_AUDIO_INIT 0x02000001 -#define PS3AV_CID_AUDIO_MODE 0x02000002 -#define PS3AV_CID_AUDIO_MUTE 0x02000003 -#define PS3AV_CID_AUDIO_ACTIVE 0x02000004 -#define PS3AV_CID_AUDIO_INACTIVE 0x02000005 -#define PS3AV_CID_AUDIO_SPDIF_BIT 0x02000006 -#define PS3AV_CID_AUDIO_CTRL 0x02000007 - -#define PS3AV_CID_EVENT_UNPLUGGED 0x10000001 -#define PS3AV_CID_EVENT_PLUGGED 0x10000002 -#define PS3AV_CID_EVENT_HDCP_DONE 0x10000003 -#define PS3AV_CID_EVENT_HDCP_FAIL 0x10000004 -#define PS3AV_CID_EVENT_HDCP_AUTH 0x10000005 -#define PS3AV_CID_EVENT_HDCP_ERROR 0x10000006 - -#define PS3AV_CID_AVB_PARAM 0x04000001 - -/* max backend ports */ -#define PS3AV_HDMI_MAX 2 /* HDMI_0 HDMI_1 */ -#define PS3AV_AVMULTI_MAX 1 /* AVMULTI_0 */ -#define PS3AV_AV_PORT_MAX (PS3AV_HDMI_MAX + PS3AV_AVMULTI_MAX) -#define PS3AV_OPT_PORT_MAX 1 /* SPDIF0 */ -#define PS3AV_HEAD_MAX 2 /* HEAD_A HEAD_B */ - -/* num of pkt for PS3AV_CID_AVB_PARAM */ -#define PS3AV_AVB_NUM_VIDEO PS3AV_HEAD_MAX -#define PS3AV_AVB_NUM_AUDIO 0 /* not supported */ -#define PS3AV_AVB_NUM_AV_VIDEO PS3AV_AV_PORT_MAX -#define PS3AV_AVB_NUM_AV_AUDIO PS3AV_HDMI_MAX - -#define PS3AV_MUTE_PORT_MAX 1 /* num of ports in mute pkt */ - -/* event_bit */ -#define PS3AV_CMD_EVENT_BIT_UNPLUGGED (1 << 0) -#define PS3AV_CMD_EVENT_BIT_PLUGGED (1 << 1) -#define PS3AV_CMD_EVENT_BIT_HDCP_DONE (1 << 2) -#define PS3AV_CMD_EVENT_BIT_HDCP_FAIL (1 << 3) -#define PS3AV_CMD_EVENT_BIT_HDCP_REAUTH (1 << 4) -#define PS3AV_CMD_EVENT_BIT_HDCP_TOPOLOGY (1 << 5) - -/* common params */ -/* mute */ -#define PS3AV_CMD_MUTE_OFF 0x0000 -#define PS3AV_CMD_MUTE_ON 0x0001 -/* avport */ -#define PS3AV_CMD_AVPORT_HDMI_0 0x0000 -#define PS3AV_CMD_AVPORT_HDMI_1 0x0001 -#define PS3AV_CMD_AVPORT_AVMULTI_0 0x0010 -#define PS3AV_CMD_AVPORT_SPDIF_0 0x0020 -#define PS3AV_CMD_AVPORT_SPDIF_1 0x0021 - -/* for av backend */ -/* av_mclk */ -#define PS3AV_CMD_AV_MCLK_128 0x0000 -#define PS3AV_CMD_AV_MCLK_256 0x0001 -#define PS3AV_CMD_AV_MCLK_512 0x0003 -/* av_inputlen */ -#define PS3AV_CMD_AV_INPUTLEN_16 0x02 -#define PS3AV_CMD_AV_INPUTLEN_20 0x0a -#define PS3AV_CMD_AV_INPUTLEN_24 0x0b -/* alayout */ -#define PS3AV_CMD_AV_LAYOUT_32 (1 << 0) -#define PS3AV_CMD_AV_LAYOUT_44 (1 << 1) -#define PS3AV_CMD_AV_LAYOUT_48 (1 << 2) -#define PS3AV_CMD_AV_LAYOUT_88 (1 << 3) -#define PS3AV_CMD_AV_LAYOUT_96 (1 << 4) -#define PS3AV_CMD_AV_LAYOUT_176 (1 << 5) -#define PS3AV_CMD_AV_LAYOUT_192 (1 << 6) -/* hdmi_mode */ -#define PS3AV_CMD_AV_HDMI_MODE_NORMAL 0xff -#define PS3AV_CMD_AV_HDMI_HDCP_OFF 0x01 -#define PS3AV_CMD_AV_HDMI_EDID_PASS 0x80 -#define PS3AV_CMD_AV_HDMI_DVI 0x40 - -/* for video module */ -/* video_head */ -#define PS3AV_CMD_VIDEO_HEAD_A 0x0000 -#define PS3AV_CMD_VIDEO_HEAD_B 0x0001 -/* video_cs_out video_cs_in */ -#define PS3AV_CMD_VIDEO_CS_NONE 0x0000 -#define PS3AV_CMD_VIDEO_CS_RGB_8 0x0001 -#define PS3AV_CMD_VIDEO_CS_YUV444_8 0x0002 -#define PS3AV_CMD_VIDEO_CS_YUV422_8 0x0003 -#define PS3AV_CMD_VIDEO_CS_XVYCC_8 0x0004 -#define PS3AV_CMD_VIDEO_CS_RGB_10 0x0005 -#define PS3AV_CMD_VIDEO_CS_YUV444_10 0x0006 -#define PS3AV_CMD_VIDEO_CS_YUV422_10 0x0007 -#define PS3AV_CMD_VIDEO_CS_XVYCC_10 0x0008 -#define PS3AV_CMD_VIDEO_CS_RGB_12 0x0009 -#define PS3AV_CMD_VIDEO_CS_YUV444_12 0x000a -#define PS3AV_CMD_VIDEO_CS_YUV422_12 0x000b -#define PS3AV_CMD_VIDEO_CS_XVYCC_12 0x000c -/* video_vid */ -#define PS3AV_CMD_VIDEO_VID_NONE 0x0000 -#define PS3AV_CMD_VIDEO_VID_480I 0x0001 -#define PS3AV_CMD_VIDEO_VID_576I 0x0003 -#define PS3AV_CMD_VIDEO_VID_480P 0x0005 -#define PS3AV_CMD_VIDEO_VID_576P 0x0006 -#define PS3AV_CMD_VIDEO_VID_1080I_60HZ 0x0007 -#define PS3AV_CMD_VIDEO_VID_1080I_50HZ 0x0008 -#define PS3AV_CMD_VIDEO_VID_720P_60HZ 0x0009 -#define PS3AV_CMD_VIDEO_VID_720P_50HZ 0x000a -#define PS3AV_CMD_VIDEO_VID_1080P_60HZ 0x000b -#define PS3AV_CMD_VIDEO_VID_1080P_50HZ 0x000c -#define PS3AV_CMD_VIDEO_VID_WXGA 0x000d -#define PS3AV_CMD_VIDEO_VID_SXGA 0x000e -#define PS3AV_CMD_VIDEO_VID_WUXGA 0x000f -#define PS3AV_CMD_VIDEO_VID_480I_A 0x0010 -/* video_format */ -#define PS3AV_CMD_VIDEO_FORMAT_BLACK 0x0000 -#define PS3AV_CMD_VIDEO_FORMAT_ARGB_8BIT 0x0007 -/* video_order */ -#define PS3AV_CMD_VIDEO_ORDER_RGB 0x0000 -#define PS3AV_CMD_VIDEO_ORDER_BGR 0x0001 -/* video_fmt */ -#define PS3AV_CMD_VIDEO_FMT_X8R8G8B8 0x0000 -/* video_out_format */ -#define PS3AV_CMD_VIDEO_OUT_FORMAT_RGB_12BIT 0x0000 -/* video_cl_cnv */ -#define PS3AV_CMD_VIDEO_CL_CNV_ENABLE_LUT 0x0000 -#define PS3AV_CMD_VIDEO_CL_CNV_DISABLE_LUT 0x0010 -/* video_sync */ -#define PS3AV_CMD_VIDEO_SYNC_VSYNC 0x0001 -#define PS3AV_CMD_VIDEO_SYNC_CSYNC 0x0004 -#define PS3AV_CMD_VIDEO_SYNC_HSYNC 0x0010 - -/* for audio module */ -/* num_of_ch */ -#define PS3AV_CMD_AUDIO_NUM_OF_CH_2 0x0000 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_3 0x0001 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_4 0x0002 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_5 0x0003 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_6 0x0004 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_7 0x0005 -#define PS3AV_CMD_AUDIO_NUM_OF_CH_8 0x0006 -/* audio_fs */ -#define PS3AV_CMD_AUDIO_FS_32K 0x0001 -#define PS3AV_CMD_AUDIO_FS_44K 0x0002 -#define PS3AV_CMD_AUDIO_FS_48K 0x0003 -#define PS3AV_CMD_AUDIO_FS_88K 0x0004 -#define PS3AV_CMD_AUDIO_FS_96K 0x0005 -#define PS3AV_CMD_AUDIO_FS_176K 0x0006 -#define PS3AV_CMD_AUDIO_FS_192K 0x0007 -/* audio_word_bits */ -#define PS3AV_CMD_AUDIO_WORD_BITS_16 0x0001 -#define PS3AV_CMD_AUDIO_WORD_BITS_20 0x0002 -#define PS3AV_CMD_AUDIO_WORD_BITS_24 0x0003 -/* audio_format */ -#define PS3AV_CMD_AUDIO_FORMAT_PCM 0x0001 -#define PS3AV_CMD_AUDIO_FORMAT_BITSTREAM 0x00ff -/* audio_source */ -#define PS3AV_CMD_AUDIO_SOURCE_SERIAL 0x0000 -#define PS3AV_CMD_AUDIO_SOURCE_SPDIF 0x0001 -/* audio_swap */ -#define PS3AV_CMD_AUDIO_SWAP_0 0x0000 -#define PS3AV_CMD_AUDIO_SWAP_1 0x0000 -/* audio_map */ -#define PS3AV_CMD_AUDIO_MAP_OUTPUT_0 0x0000 -#define PS3AV_CMD_AUDIO_MAP_OUTPUT_1 0x0001 -#define PS3AV_CMD_AUDIO_MAP_OUTPUT_2 0x0002 -#define PS3AV_CMD_AUDIO_MAP_OUTPUT_3 0x0003 -/* audio_layout */ -#define PS3AV_CMD_AUDIO_LAYOUT_2CH 0x0000 -#define PS3AV_CMD_AUDIO_LAYOUT_6CH 0x000b /* LREClr */ -#define PS3AV_CMD_AUDIO_LAYOUT_8CH 0x001f /* LREClrXY */ -/* audio_downmix */ -#define PS3AV_CMD_AUDIO_DOWNMIX_PERMITTED 0x0000 -#define PS3AV_CMD_AUDIO_DOWNMIX_PROHIBITED 0x0001 - -/* audio_port */ -#define PS3AV_CMD_AUDIO_PORT_HDMI_0 ( 1 << 0 ) -#define PS3AV_CMD_AUDIO_PORT_HDMI_1 ( 1 << 1 ) -#define PS3AV_CMD_AUDIO_PORT_AVMULTI_0 ( 1 << 10 ) -#define PS3AV_CMD_AUDIO_PORT_SPDIF_0 ( 1 << 20 ) -#define PS3AV_CMD_AUDIO_PORT_SPDIF_1 ( 1 << 21 ) - -/* audio_ctrl_id */ -#define PS3AV_CMD_AUDIO_CTRL_ID_DAC_RESET 0x0000 -#define PS3AV_CMD_AUDIO_CTRL_ID_DAC_DE_EMPHASIS 0x0001 -#define PS3AV_CMD_AUDIO_CTRL_ID_AVCLK 0x0002 -/* audio_ctrl_data[0] reset */ -#define PS3AV_CMD_AUDIO_CTRL_RESET_NEGATE 0x0000 -#define PS3AV_CMD_AUDIO_CTRL_RESET_ASSERT 0x0001 -/* audio_ctrl_data[0] de-emphasis */ -#define PS3AV_CMD_AUDIO_CTRL_DE_EMPHASIS_OFF 0x0000 -#define PS3AV_CMD_AUDIO_CTRL_DE_EMPHASIS_ON 0x0001 -/* audio_ctrl_data[0] avclk */ -#define PS3AV_CMD_AUDIO_CTRL_AVCLK_22 0x0000 -#define PS3AV_CMD_AUDIO_CTRL_AVCLK_18 0x0001 - -/* av_vid */ -/* do not use these params directly, use vid_video2av */ -#define PS3AV_CMD_AV_VID_480I 0x0000 -#define PS3AV_CMD_AV_VID_480P 0x0001 -#define PS3AV_CMD_AV_VID_720P_60HZ 0x0002 -#define PS3AV_CMD_AV_VID_1080I_60HZ 0x0003 -#define PS3AV_CMD_AV_VID_1080P_60HZ 0x0004 -#define PS3AV_CMD_AV_VID_576I 0x0005 -#define PS3AV_CMD_AV_VID_576P 0x0006 -#define PS3AV_CMD_AV_VID_720P_50HZ 0x0007 -#define PS3AV_CMD_AV_VID_1080I_50HZ 0x0008 -#define PS3AV_CMD_AV_VID_1080P_50HZ 0x0009 -#define PS3AV_CMD_AV_VID_WXGA 0x000a -#define PS3AV_CMD_AV_VID_SXGA 0x000b -#define PS3AV_CMD_AV_VID_WUXGA 0x000c -/* av_cs_out av_cs_in */ -/* use cs_video2av() */ -#define PS3AV_CMD_AV_CS_RGB_8 0x0000 -#define PS3AV_CMD_AV_CS_YUV444_8 0x0001 -#define PS3AV_CMD_AV_CS_YUV422_8 0x0002 -#define PS3AV_CMD_AV_CS_XVYCC_8 0x0003 -#define PS3AV_CMD_AV_CS_RGB_10 0x0004 -#define PS3AV_CMD_AV_CS_YUV444_10 0x0005 -#define PS3AV_CMD_AV_CS_YUV422_10 0x0006 -#define PS3AV_CMD_AV_CS_XVYCC_10 0x0007 -#define PS3AV_CMD_AV_CS_RGB_12 0x0008 -#define PS3AV_CMD_AV_CS_YUV444_12 0x0009 -#define PS3AV_CMD_AV_CS_YUV422_12 0x000a -#define PS3AV_CMD_AV_CS_XVYCC_12 0x000b -#define PS3AV_CMD_AV_CS_8 0x0000 -#define PS3AV_CMD_AV_CS_10 0x0001 -#define PS3AV_CMD_AV_CS_12 0x0002 -/* dither */ -#define PS3AV_CMD_AV_DITHER_OFF 0x0000 -#define PS3AV_CMD_AV_DITHER_ON 0x0001 -#define PS3AV_CMD_AV_DITHER_8BIT 0x0000 -#define PS3AV_CMD_AV_DITHER_10BIT 0x0002 -#define PS3AV_CMD_AV_DITHER_12BIT 0x0004 -/* super_white */ -#define PS3AV_CMD_AV_SUPER_WHITE_OFF 0x0000 -#define PS3AV_CMD_AV_SUPER_WHITE_ON 0x0001 -/* aspect */ -#define PS3AV_CMD_AV_ASPECT_16_9 0x0000 -#define PS3AV_CMD_AV_ASPECT_4_3 0x0001 -/* video_cs_cnv() */ -#define PS3AV_CMD_VIDEO_CS_RGB 0x0001 -#define PS3AV_CMD_VIDEO_CS_YUV422 0x0002 -#define PS3AV_CMD_VIDEO_CS_YUV444 0x0003 - -/* for broadcast automode */ -#define PS3AV_RESBIT_720x480P 0x0003 /* 0x0001 | 0x0002 */ -#define PS3AV_RESBIT_720x576P 0x0003 /* 0x0001 | 0x0002 */ -#define PS3AV_RESBIT_1280x720P 0x0004 -#define PS3AV_RESBIT_1920x1080I 0x0008 -#define PS3AV_RESBIT_1920x1080P 0x4000 -#define PS3AV_RES_MASK_60 (PS3AV_RESBIT_720x480P \ - | PS3AV_RESBIT_1280x720P \ - | PS3AV_RESBIT_1920x1080I \ - | PS3AV_RESBIT_1920x1080P) -#define PS3AV_RES_MASK_50 (PS3AV_RESBIT_720x576P \ - | PS3AV_RESBIT_1280x720P \ - | PS3AV_RESBIT_1920x1080I \ - | PS3AV_RESBIT_1920x1080P) - -/* for VESA automode */ -#define PS3AV_RESBIT_VGA 0x0001 -#define PS3AV_RESBIT_WXGA 0x0002 -#define PS3AV_RESBIT_SXGA 0x0004 -#define PS3AV_RESBIT_WUXGA 0x0008 -#define PS3AV_RES_MASK_VESA (PS3AV_RESBIT_WXGA |\ - PS3AV_RESBIT_SXGA |\ - PS3AV_RESBIT_WUXGA) - -#define PS3AV_MONITOR_TYPE_HDMI 1 /* HDMI */ -#define PS3AV_MONITOR_TYPE_DVI 2 /* DVI */ - - -/* for video mode */ -enum ps3av_mode_num { - PS3AV_MODE_AUTO = 0, - PS3AV_MODE_480I = 1, - PS3AV_MODE_480P = 2, - PS3AV_MODE_720P60 = 3, - PS3AV_MODE_1080I60 = 4, - PS3AV_MODE_1080P60 = 5, - PS3AV_MODE_576I = 6, - PS3AV_MODE_576P = 7, - PS3AV_MODE_720P50 = 8, - PS3AV_MODE_1080I50 = 9, - PS3AV_MODE_1080P50 = 10, - PS3AV_MODE_WXGA = 11, - PS3AV_MODE_SXGA = 12, - PS3AV_MODE_WUXGA = 13, -}; - -#define PS3AV_MODE_MASK 0x000F -#define PS3AV_MODE_HDCP_OFF 0x1000 /* Retail PS3 product doesn't support this */ -#define PS3AV_MODE_DITHER 0x0800 -#define PS3AV_MODE_COLOR 0x0400 -#define PS3AV_MODE_WHITE 0x0200 -#define PS3AV_MODE_FULL 0x0080 -#define PS3AV_MODE_DVI 0x0040 -#define PS3AV_MODE_RGB 0x0020 - - -#define PS3AV_DEFAULT_HDMI_MODE_ID_REG_60 PS3AV_MODE_480P -#define PS3AV_DEFAULT_AVMULTI_MODE_ID_REG_60 PS3AV_MODE_480I -#define PS3AV_DEFAULT_HDMI_MODE_ID_REG_50 PS3AV_MODE_576P -#define PS3AV_DEFAULT_AVMULTI_MODE_ID_REG_50 PS3AV_MODE_576I - -#define PS3AV_REGION_60 0x01 -#define PS3AV_REGION_50 0x02 -#define PS3AV_REGION_RGB 0x10 - -#define get_status(buf) (((__u32 *)buf)[2]) -#define PS3AV_HDR_SIZE 4 /* version + size */ - - -/** command packet structure **/ -struct ps3av_send_hdr { - u16 version; - u16 size; /* size of command packet */ - u32 cid; /* command id */ -}; - -struct ps3av_reply_hdr { - u16 version; - u16 size; - u32 cid; - u32 status; -}; - -/* backend: initialization */ -struct ps3av_pkt_av_init { - struct ps3av_send_hdr send_hdr; - u32 event_bit; -}; - -/* backend: finalize */ -struct ps3av_pkt_av_fin { - struct ps3av_send_hdr send_hdr; - /* recv */ - u32 reserved; -}; - -/* backend: get port */ -struct ps3av_pkt_av_get_hw_conf { - struct ps3av_send_hdr send_hdr; - /* recv */ - u32 status; - u16 num_of_hdmi; /* out: number of hdmi */ - u16 num_of_avmulti; /* out: number of avmulti */ - u16 num_of_spdif; /* out: number of hdmi */ - u16 reserved; -}; - -/* backend: get monitor info */ -struct ps3av_info_resolution { - u32 res_bits; - u32 native; -}; - -struct ps3av_info_cs { - u8 rgb; - u8 yuv444; - u8 yuv422; - u8 reserved; -}; - -struct ps3av_info_color { - u16 red_x; - u16 red_y; - u16 green_x; - u16 green_y; - u16 blue_x; - u16 blue_y; - u16 white_x; - u16 white_y; - u32 gamma; -}; - -struct ps3av_info_audio { - u8 type; - u8 max_num_of_ch; - u8 fs; - u8 sbit; -}; - -struct ps3av_info_monitor { - u8 avport; - u8 monitor_id[10]; - u8 monitor_type; - u8 monitor_name[16]; - struct ps3av_info_resolution res_60; - struct ps3av_info_resolution res_50; - struct ps3av_info_resolution res_other; - struct ps3av_info_resolution res_vesa; - struct ps3av_info_cs cs; - struct ps3av_info_color color; - u8 supported_ai; - u8 speaker_info; - u8 num_of_audio_block; - struct ps3av_info_audio audio[0]; /* 0 or more audio blocks */ - u8 reserved[169]; -} __attribute__ ((packed)); - -struct ps3av_pkt_av_get_monitor_info { - struct ps3av_send_hdr send_hdr; - u16 avport; /* in: avport */ - u16 reserved; - /* recv */ - struct ps3av_info_monitor info; /* out: monitor info */ -}; - -/* backend: enable/disable event */ -struct ps3av_pkt_av_event { - struct ps3av_send_hdr send_hdr; - u32 event_bit; /* in */ -}; - -/* backend: video cs param */ -struct ps3av_pkt_av_video_cs { - struct ps3av_send_hdr send_hdr; - u16 avport; /* in: avport */ - u16 av_vid; /* in: video resolution */ - u16 av_cs_out; /* in: output color space */ - u16 av_cs_in; /* in: input color space */ - u8 dither; /* in: dither bit length */ - u8 bitlen_out; /* in: bit length */ - u8 super_white; /* in: super white */ - u8 aspect; /* in: aspect ratio */ -}; - -/* backend: video mute */ -struct ps3av_av_mute { - u16 avport; /* in: avport */ - u16 mute; /* in: mute on/off */ -}; - -struct ps3av_pkt_av_video_mute { - struct ps3av_send_hdr send_hdr; - struct ps3av_av_mute mute[PS3AV_MUTE_PORT_MAX]; -}; - -/* backend: video disable signal */ -struct ps3av_pkt_av_video_disable_sig { - struct ps3av_send_hdr send_hdr; - u16 avport; /* in: avport */ - u16 reserved; -}; - -/* backend: audio param */ -struct ps3av_audio_info_frame { - struct pb1_bit { - u8 ct:4; - u8 rsv:1; - u8 cc:3; - } pb1; - struct pb2_bit { - u8 rsv:3; - u8 sf:3; - u8 ss:2; - } pb2; - u8 pb3; - u8 pb4; - struct pb5_bit { - u8 dm:1; - u8 lsv:4; - u8 rsv:3; - } pb5; -}; - -struct ps3av_pkt_av_audio_param { - struct ps3av_send_hdr send_hdr; - u16 avport; /* in: avport */ - u16 reserved; - u8 mclk; /* in: audio mclk */ - u8 ns[3]; /* in: audio ns val */ - u8 enable; /* in: audio enable */ - u8 swaplr; /* in: audio swap */ - u8 fifomap; /* in: audio fifomap */ - u8 inputctrl; /* in: audio input ctrl */ - u8 inputlen; /* in: sample bit size */ - u8 layout; /* in: speaker layout param */ - struct ps3av_audio_info_frame info; /* in: info */ - u8 chstat[5]; /* in: ch stat */ -}; - -/* backend: audio_mute */ -struct ps3av_pkt_av_audio_mute { - struct ps3av_send_hdr send_hdr; - struct ps3av_av_mute mute[PS3AV_MUTE_PORT_MAX]; -}; - -/* backend: hdmi_mode */ -struct ps3av_pkt_av_hdmi_mode { - struct ps3av_send_hdr send_hdr; - u8 mode; /* in: hdmi_mode */ - u8 reserved0; - u8 reserved1; - u8 reserved2; -}; - -/* backend: tv_mute */ -struct ps3av_pkt_av_tv_mute { - struct ps3av_send_hdr send_hdr; - u16 avport; /* in: avport HDMI only */ - u16 mute; /* in: mute */ -}; - -/* video: initialize */ -struct ps3av_pkt_video_init { - struct ps3av_send_hdr send_hdr; - /* recv */ - u32 reserved; -}; - -/* video: mode setting */ -struct ps3av_pkt_video_mode { - struct ps3av_send_hdr send_hdr; - u32 video_head; /* in: head */ - u32 reserved; - u32 video_vid; /* in: video resolution */ - u16 reserved1; - u16 width; /* in: width in pixel */ - u16 reserved2; - u16 height; /* in: height in pixel */ - u32 pitch; /* in: line size in byte */ - u32 video_out_format; /* in: out format */ - u32 video_format; /* in: input frame buffer format */ - u8 reserved3; - u8 video_cl_cnv; /* in: color conversion */ - u16 video_order; /* in: input RGB order */ - u32 reserved4; -}; - -/* video: format */ -struct ps3av_pkt_video_format { - struct ps3av_send_hdr send_hdr; - u32 video_head; /* in: head */ - u32 video_format; /* in: frame buffer format */ - u8 reserved; - u8 video_cl_cnv; /* in: color conversion */ - u16 video_order; /* in: input RGB order */ -}; - -/* video: pitch */ -struct ps3av_pkt_video_pitch { - u16 version; - u16 size; /* size of command packet */ - u32 cid; /* command id */ - u32 video_head; /* in: head */ - u32 pitch; /* in: line size in byte */ -}; - -/* audio: initialize */ -struct ps3av_pkt_audio_init { - struct ps3av_send_hdr send_hdr; - /* recv */ - u32 reserved; -}; - -/* audio: mode setting */ -struct ps3av_pkt_audio_mode { - struct ps3av_send_hdr send_hdr; - u8 avport; /* in: avport */ - u8 reserved0[3]; - u32 mask; /* in: mask */ - u32 audio_num_of_ch; /* in: number of ch */ - u32 audio_fs; /* in: sampling freq */ - u32 audio_word_bits; /* in: sample bit size */ - u32 audio_format; /* in: audio output format */ - u32 audio_source; /* in: audio source */ - u8 audio_enable[4]; /* in: audio enable */ - u8 audio_swap[4]; /* in: audio swap */ - u8 audio_map[4]; /* in: audio map */ - u32 audio_layout; /* in: speaker layout */ - u32 audio_downmix; /* in: audio downmix permission */ - u32 audio_downmix_level; - u8 audio_cs_info[8]; /* in: IEC channel status */ -}; - -/* audio: mute */ -struct ps3av_audio_mute { - u8 avport; /* in: opt_port optical */ - u8 reserved[3]; - u32 mute; /* in: mute */ -}; - -struct ps3av_pkt_audio_mute { - struct ps3av_send_hdr send_hdr; - struct ps3av_audio_mute mute[PS3AV_OPT_PORT_MAX]; -}; - -/* audio: active/inactive */ -struct ps3av_pkt_audio_active { - struct ps3av_send_hdr send_hdr; - u32 audio_port; /* in: audio active/inactive port */ -}; - -/* audio: SPDIF user bit */ -struct ps3av_pkt_audio_spdif_bit { - u16 version; - u16 size; /* size of command packet */ - u32 cid; /* command id */ - u8 avport; /* in: avport SPDIF only */ - u8 reserved[3]; - u32 audio_port; /* in: SPDIF only */ - u32 spdif_bit_data[12]; /* in: user bit data */ -}; - -/* audio: audio control */ -struct ps3av_pkt_audio_ctrl { - u16 version; - u16 size; /* size of command packet */ - u32 cid; /* command id */ - u32 audio_ctrl_id; /* in: control id */ - u32 audio_ctrl_data[4]; /* in: control data */ -}; - -/* avb:param */ -#define PS3AV_PKT_AVB_PARAM_MAX_BUF_SIZE \ - (PS3AV_AVB_NUM_VIDEO*sizeof(struct ps3av_pkt_video_mode) + \ - PS3AV_AVB_NUM_AUDIO*sizeof(struct ps3av_pkt_audio_mode) + \ - PS3AV_AVB_NUM_AV_VIDEO*sizeof(struct ps3av_pkt_av_video_cs) + \ - PS3AV_AVB_NUM_AV_AUDIO*sizeof(struct ps3av_pkt_av_audio_param)) - -struct ps3av_pkt_avb_param { - struct ps3av_send_hdr send_hdr; - u16 num_of_video_pkt; - u16 num_of_audio_pkt; - u16 num_of_av_video_pkt; - u16 num_of_av_audio_pkt; - /* - * The actual buffer layout depends on the fields above: - * - * struct ps3av_pkt_video_mode video[num_of_video_pkt]; - * struct ps3av_pkt_audio_mode audio[num_of_audio_pkt]; - * struct ps3av_pkt_av_video_cs av_video[num_of_av_video_pkt]; - * struct ps3av_pkt_av_audio_param av_audio[num_of_av_audio_pkt]; - */ - u8 buf[PS3AV_PKT_AVB_PARAM_MAX_BUF_SIZE]; -}; - - -/** command status **/ -#define PS3AV_STATUS_SUCCESS 0x0000 /* success */ -#define PS3AV_STATUS_RECEIVE_VUART_ERROR 0x0001 /* receive vuart error */ -#define PS3AV_STATUS_SYSCON_COMMUNICATE_FAIL 0x0002 /* syscon communication error */ -#define PS3AV_STATUS_INVALID_COMMAND 0x0003 /* obsolete invalid CID */ -#define PS3AV_STATUS_INVALID_PORT 0x0004 /* invalid port number */ -#define PS3AV_STATUS_INVALID_VID 0x0005 /* invalid video format */ -#define PS3AV_STATUS_INVALID_COLOR_SPACE 0x0006 /* invalid video colose space */ -#define PS3AV_STATUS_INVALID_FS 0x0007 /* invalid audio sampling freq */ -#define PS3AV_STATUS_INVALID_AUDIO_CH 0x0008 /* invalid audio channel number */ -#define PS3AV_STATUS_UNSUPPORTED_VERSION 0x0009 /* version mismatch */ -#define PS3AV_STATUS_INVALID_SAMPLE_SIZE 0x000a /* invalid audio sample bit size */ -#define PS3AV_STATUS_FAILURE 0x000b /* other failures */ -#define PS3AV_STATUS_UNSUPPORTED_COMMAND 0x000c /* unsupported cid */ -#define PS3AV_STATUS_BUFFER_OVERFLOW 0x000d /* write buffer overflow */ -#define PS3AV_STATUS_INVALID_VIDEO_PARAM 0x000e /* invalid video param */ -#define PS3AV_STATUS_NO_SEL 0x000f /* not exist selector */ -#define PS3AV_STATUS_INVALID_AV_PARAM 0x0010 /* invalid backend param */ -#define PS3AV_STATUS_INVALID_AUDIO_PARAM 0x0011 /* invalid audio param */ -#define PS3AV_STATUS_UNSUPPORTED_HDMI_MODE 0x0012 /* unsupported hdmi mode */ -#define PS3AV_STATUS_NO_SYNC_HEAD 0x0013 /* sync head failed */ - -extern void ps3av_set_hdr(u32, u16, struct ps3av_send_hdr *); -extern int ps3av_do_pkt(u32, u16, size_t, struct ps3av_send_hdr *); - -extern int ps3av_cmd_init(void); -extern int ps3av_cmd_fin(void); -extern int ps3av_cmd_av_video_mute(int, u32 *, u32); -extern int ps3av_cmd_av_video_disable_sig(u32); -extern int ps3av_cmd_av_tv_mute(u32, u32); -extern int ps3av_cmd_enable_event(void); -extern int ps3av_cmd_av_hdmi_mode(u8); -extern u32 ps3av_cmd_set_av_video_cs(void *, u32, int, int, int, u32); -extern u32 ps3av_cmd_set_video_mode(void *, u32, int, int, u32); -extern int ps3av_cmd_video_format_black(u32, u32, u32); -extern int ps3av_cmd_av_audio_mute(int, u32 *, u32); -extern u32 ps3av_cmd_set_av_audio_param(void *, u32, - const struct ps3av_pkt_audio_mode *, - u32); -extern void ps3av_cmd_set_audio_mode(struct ps3av_pkt_audio_mode *, u32, u32, - u32, u32, u32, u32); -extern int ps3av_cmd_audio_mode(struct ps3av_pkt_audio_mode *); -extern int ps3av_cmd_audio_mute(int, u32 *, u32); -extern int ps3av_cmd_audio_active(int, u32); -extern int ps3av_cmd_avb_param(struct ps3av_pkt_avb_param *, u32); -extern int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *); -extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *, - u32); - -extern int ps3av_set_video_mode(u32); -extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32); -extern int ps3av_get_auto_mode(void); -extern int ps3av_get_mode(void); -extern int ps3av_video_mode2res(u32, u32 *, u32 *); -extern int ps3av_video_mute(int); -extern int ps3av_audio_mute(int); -extern int ps3av_dev_open(void); -extern int ps3av_dev_close(void); -extern void ps3av_register_flip_ctl(void (*flip_ctl)(int on, void *data), - void *flip_data); -extern void ps3av_flip_ctl(int on); - -#endif /* _ASM_POWERPC_PS3AV_H_ */ diff --git a/include/asm-powerpc/ps3fb.h b/include/asm-powerpc/ps3fb.h deleted file mode 100644 index 3f121fe..0000000 --- a/include/asm-powerpc/ps3fb.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (C) 2006 Sony Computer Entertainment Inc. - * Copyright 2006, 2007 Sony Corporation - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published - * by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef _ASM_POWERPC_PS3FB_H_ -#define _ASM_POWERPC_PS3FB_H_ - -#include - -/* ioctl */ -#define PS3FB_IOCTL_SETMODE _IOW('r', 1, int) /* set video mode */ -#define PS3FB_IOCTL_GETMODE _IOR('r', 2, int) /* get video mode */ -#define PS3FB_IOCTL_SCREENINFO _IOR('r', 3, int) /* get screen info */ -#define PS3FB_IOCTL_ON _IO('r', 4) /* use IOCTL_FSEL */ -#define PS3FB_IOCTL_OFF _IO('r', 5) /* return to normal-flip */ -#define PS3FB_IOCTL_FSEL _IOW('r', 6, int) /* blit and flip request */ - -#ifndef FBIO_WAITFORVSYNC -#define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) /* wait for vsync */ -#endif - -struct ps3fb_ioctl_res { - __u32 xres; /* frame buffer x_size */ - __u32 yres; /* frame buffer y_size */ - __u32 xoff; /* margine x */ - __u32 yoff; /* margine y */ - __u32 num_frames; /* num of frame buffers */ -}; - -#endif /* _ASM_POWERPC_PS3FB_H_ */ diff --git a/include/asm-powerpc/ps3stor.h b/include/asm-powerpc/ps3stor.h deleted file mode 100644 index 6fcaf71..0000000 --- a/include/asm-powerpc/ps3stor.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * PS3 Storage Devices - * - * Copyright (C) 2007 Sony Computer Entertainment Inc. - * Copyright 2007 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published - * by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef _ASM_POWERPC_PS3STOR_H_ -#define _ASM_POWERPC_PS3STOR_H_ - -#include - -#include - - -struct ps3_storage_region { - unsigned int id; - u64 start; - u64 size; -}; - -struct ps3_storage_device { - struct ps3_system_bus_device sbd; - - struct ps3_dma_region dma_region; - unsigned int irq; - u64 blk_size; - - u64 tag; - u64 lv1_status; - struct completion done; - - unsigned long bounce_size; - void *bounce_buf; - u64 bounce_lpar; - dma_addr_t bounce_dma; - - unsigned int num_regions; - unsigned long accessible_regions; - unsigned int region_idx; /* first accessible region */ - struct ps3_storage_region regions[0]; /* Must be last */ -}; - -static inline struct ps3_storage_device *to_ps3_storage_device(struct device *dev) -{ - return container_of(dev, struct ps3_storage_device, sbd.core); -} - -extern int ps3stor_setup(struct ps3_storage_device *dev, - irq_handler_t handler); -extern void ps3stor_teardown(struct ps3_storage_device *dev); -extern u64 ps3stor_read_write_sectors(struct ps3_storage_device *dev, u64 lpar, - u64 start_sector, u64 sectors, - int write); -extern u64 ps3stor_send_command(struct ps3_storage_device *dev, u64 cmd, - u64 arg1, u64 arg2, u64 arg3, u64 arg4); - -#endif /* _ASM_POWERPC_PS3STOR_H_ */ diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h deleted file mode 100644 index 734e075..0000000 --- a/include/asm-powerpc/ptrace.h +++ /dev/null @@ -1,293 +0,0 @@ -#ifndef _ASM_POWERPC_PTRACE_H -#define _ASM_POWERPC_PTRACE_H - -/* - * Copyright (C) 2001 PPC64 Team, IBM Corp - * - * This struct defines the way the registers are stored on the - * kernel stack during a system call or other kernel entry. - * - * this should only contain volatile regs - * since we can keep non-volatile in the thread_struct - * should set this up when only volatiles are saved - * by intr code. - * - * Since this is going on the stack, *CARE MUST BE TAKEN* to insure - * that the overall structure is a multiple of 16 bytes in length. - * - * Note that the offsets of the fields in this struct correspond with - * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __ASSEMBLY__ - -struct pt_regs { - unsigned long gpr[32]; - unsigned long nip; - unsigned long msr; - unsigned long orig_gpr3; /* Used for restarting system calls */ - unsigned long ctr; - unsigned long link; - unsigned long xer; - unsigned long ccr; -#ifdef __powerpc64__ - unsigned long softe; /* Soft enabled/disabled */ -#else - unsigned long mq; /* 601 only (not used at present) */ - /* Used on APUS to hold IPL value. */ -#endif - unsigned long trap; /* Reason for being here */ - /* N.B. for critical exceptions on 4xx, the dar and dsisr - fields are overloaded to hold srr0 and srr1. */ - unsigned long dar; /* Fault registers */ - unsigned long dsisr; /* on 4xx/Book-E used for ESR */ - unsigned long result; /* Result of a system call */ -}; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ - -#ifdef __powerpc64__ - -#define __ARCH_WANT_COMPAT_SYS_PTRACE - -#define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */ -#define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */ -#define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265) -#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \ - STACK_FRAME_OVERHEAD + 288) -#define STACK_FRAME_MARKER 12 - -/* Size of dummy stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 128 -#define __SIGNAL_FRAMESIZE32 64 - -#else /* __powerpc64__ */ - -#define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */ -#define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */ -#define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773) -#define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD) -#define STACK_FRAME_MARKER 2 - -/* Size of stack frame allocated when calling signal handler. */ -#define __SIGNAL_FRAMESIZE 64 - -#endif /* __powerpc64__ */ - -#ifndef __ASSEMBLY__ - -#define instruction_pointer(regs) ((regs)->nip) -#define user_stack_pointer(regs) ((regs)->gpr[1]) -#define regs_return_value(regs) ((regs)->gpr[3]) - -#ifdef CONFIG_SMP -extern unsigned long profile_pc(struct pt_regs *regs); -#else -#define profile_pc(regs) instruction_pointer(regs) -#endif - -#ifdef __powerpc64__ -#define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1) -#else -#define user_mode(regs) (((regs)->msr & MSR_PR) != 0) -#endif - -#define force_successful_syscall_return() \ - do { \ - set_thread_flag(TIF_NOERROR); \ - } while(0) - -struct task_struct; -extern unsigned long ptrace_get_reg(struct task_struct *task, int regno); -extern int ptrace_put_reg(struct task_struct *task, int regno, - unsigned long data); - -/* - * We use the least-significant bit of the trap field to indicate - * whether we have saved the full set of registers, or only a - * partial set. A 1 there means the partial set. - * On 4xx we use the next bit to indicate whether the exception - * is a critical exception (1 means it is). - */ -#define FULL_REGS(regs) (((regs)->trap & 1) == 0) -#ifndef __powerpc64__ -#define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0) -#define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0) -#define IS_DEBUG_EXC(regs) (((regs)->trap & 8) != 0) -#endif /* ! __powerpc64__ */ -#define TRAP(regs) ((regs)->trap & ~0xF) -#ifdef __powerpc64__ -#define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1) -#else -#define CHECK_FULL_REGS(regs) \ -do { \ - if ((regs)->trap & 1) \ - printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \ -} while (0) -#endif /* __powerpc64__ */ - -/* - * These are defined as per linux/ptrace.h, which see. - */ -#define arch_has_single_step() (1) -extern void user_enable_single_step(struct task_struct *); -extern void user_disable_single_step(struct task_struct *); - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -/* - * Offsets used by 'ptrace' system call interface. - * These can't be changed without breaking binary compatibility - * with MkLinux, etc. - */ -#define PT_R0 0 -#define PT_R1 1 -#define PT_R2 2 -#define PT_R3 3 -#define PT_R4 4 -#define PT_R5 5 -#define PT_R6 6 -#define PT_R7 7 -#define PT_R8 8 -#define PT_R9 9 -#define PT_R10 10 -#define PT_R11 11 -#define PT_R12 12 -#define PT_R13 13 -#define PT_R14 14 -#define PT_R15 15 -#define PT_R16 16 -#define PT_R17 17 -#define PT_R18 18 -#define PT_R19 19 -#define PT_R20 20 -#define PT_R21 21 -#define PT_R22 22 -#define PT_R23 23 -#define PT_R24 24 -#define PT_R25 25 -#define PT_R26 26 -#define PT_R27 27 -#define PT_R28 28 -#define PT_R29 29 -#define PT_R30 30 -#define PT_R31 31 - -#define PT_NIP 32 -#define PT_MSR 33 -#define PT_ORIG_R3 34 -#define PT_CTR 35 -#define PT_LNK 36 -#define PT_XER 37 -#define PT_CCR 38 -#ifndef __powerpc64__ -#define PT_MQ 39 -#else -#define PT_SOFTE 39 -#endif -#define PT_TRAP 40 -#define PT_DAR 41 -#define PT_DSISR 42 -#define PT_RESULT 43 -#define PT_REGS_COUNT 44 - -#define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ - -#ifndef __powerpc64__ - -#define PT_FPR31 (PT_FPR0 + 2*31) -#define PT_FPSCR (PT_FPR0 + 2*32 + 1) - -#else /* __powerpc64__ */ - -#define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */ - -#ifdef __KERNEL__ -#define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */ -#endif - -#define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */ -#define PT_VSCR (PT_VR0 + 32*2 + 1) -#define PT_VRSAVE (PT_VR0 + 33*2) - -#ifdef __KERNEL__ -#define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */ -#define PT_VSCR_32 (PT_VR0 + 32*4 + 3) -#define PT_VRSAVE_32 (PT_VR0 + 33*4) -#endif - -/* - * Only store first 32 VSRs here. The second 32 VSRs in VR0-31 - */ -#define PT_VSR0 150 /* each VSR reg occupies 2 slots in 64-bit */ -#define PT_VSR31 (PT_VSR0 + 2*31) -#ifdef __KERNEL__ -#define PT_VSR0_32 300 /* each VSR reg occupies 4 slots in 32-bit */ -#endif -#endif /* __powerpc64__ */ - -/* - * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. - * The transfer totals 34 quadword. Quadwords 0-31 contain the - * corresponding vector registers. Quadword 32 contains the vscr as the - * last word (offset 12) within that quadword. Quadword 33 contains the - * vrsave as the first word (offset 0) within the quadword. - * - * This definition of the VMX state is compatible with the current PPC32 - * ptrace interface. This allows signal handling and ptrace to use the same - * structures. This also simplifies the implementation of a bi-arch - * (combined (32- and 64-bit) gdb. - */ -#define PTRACE_GETVRREGS 18 -#define PTRACE_SETVRREGS 19 - -/* Get/set all the upper 32-bits of the SPE registers, accumulator, and - * spefscr, in one go */ -#define PTRACE_GETEVRREGS 20 -#define PTRACE_SETEVRREGS 21 - -/* Get the first 32 128bit VSX registers */ -#define PTRACE_GETVSRREGS 27 -#define PTRACE_SETVSRREGS 28 - -/* - * Get or set a debug register. The first 16 are DABR registers and the - * second 16 are IABR registers. - */ -#define PTRACE_GET_DEBUGREG 25 -#define PTRACE_SET_DEBUGREG 26 - -/* (new) PTRACE requests using the same numbers as x86 and the same - * argument ordering. Additionally, they support more registers too - */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_GETREGS64 22 -#define PTRACE_SETREGS64 23 - -/* (old) PTRACE requests with inverted arguments */ -#define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ -#define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ -#define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */ -#define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */ - -/* Calls to trace a 64bit program from a 32bit program */ -#define PPC_PTRACE_PEEKTEXT_3264 0x95 -#define PPC_PTRACE_PEEKDATA_3264 0x94 -#define PPC_PTRACE_POKETEXT_3264 0x93 -#define PPC_PTRACE_POKEDATA_3264 0x92 -#define PPC_PTRACE_PEEKUSR_3264 0x91 -#define PPC_PTRACE_POKEUSR_3264 0x90 - -#endif /* _ASM_POWERPC_PTRACE_H */ diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h deleted file mode 100644 index edee15d..0000000 --- a/include/asm-powerpc/qe.h +++ /dev/null @@ -1,642 +0,0 @@ -/* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * Description: - * QUICC Engine (QE) external definitions and structure. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_POWERPC_QE_H -#define _ASM_POWERPC_QE_H -#ifdef __KERNEL__ - -#include -#include -#include - -#define QE_NUM_OF_SNUM 28 -#define QE_NUM_OF_BRGS 16 -#define QE_NUM_OF_PORTS 1024 - -/* Memory partitions -*/ -#define MEM_PART_SYSTEM 0 -#define MEM_PART_SECONDARY 1 -#define MEM_PART_MURAM 2 - -/* Clocks and BRGs */ -enum qe_clock { - QE_CLK_NONE = 0, - QE_BRG1, /* Baud Rate Generator 1 */ - QE_BRG2, /* Baud Rate Generator 2 */ - QE_BRG3, /* Baud Rate Generator 3 */ - QE_BRG4, /* Baud Rate Generator 4 */ - QE_BRG5, /* Baud Rate Generator 5 */ - QE_BRG6, /* Baud Rate Generator 6 */ - QE_BRG7, /* Baud Rate Generator 7 */ - QE_BRG8, /* Baud Rate Generator 8 */ - QE_BRG9, /* Baud Rate Generator 9 */ - QE_BRG10, /* Baud Rate Generator 10 */ - QE_BRG11, /* Baud Rate Generator 11 */ - QE_BRG12, /* Baud Rate Generator 12 */ - QE_BRG13, /* Baud Rate Generator 13 */ - QE_BRG14, /* Baud Rate Generator 14 */ - QE_BRG15, /* Baud Rate Generator 15 */ - QE_BRG16, /* Baud Rate Generator 16 */ - QE_CLK1, /* Clock 1 */ - QE_CLK2, /* Clock 2 */ - QE_CLK3, /* Clock 3 */ - QE_CLK4, /* Clock 4 */ - QE_CLK5, /* Clock 5 */ - QE_CLK6, /* Clock 6 */ - QE_CLK7, /* Clock 7 */ - QE_CLK8, /* Clock 8 */ - QE_CLK9, /* Clock 9 */ - QE_CLK10, /* Clock 10 */ - QE_CLK11, /* Clock 11 */ - QE_CLK12, /* Clock 12 */ - QE_CLK13, /* Clock 13 */ - QE_CLK14, /* Clock 14 */ - QE_CLK15, /* Clock 15 */ - QE_CLK16, /* Clock 16 */ - QE_CLK17, /* Clock 17 */ - QE_CLK18, /* Clock 18 */ - QE_CLK19, /* Clock 19 */ - QE_CLK20, /* Clock 20 */ - QE_CLK21, /* Clock 21 */ - QE_CLK22, /* Clock 22 */ - QE_CLK23, /* Clock 23 */ - QE_CLK24, /* Clock 24 */ - QE_CLK_DUMMY -}; - -static inline bool qe_clock_is_brg(enum qe_clock clk) -{ - return clk >= QE_BRG1 && clk <= QE_BRG16; -} - -extern spinlock_t cmxgcr_lock; - -/* Export QE common operations */ -extern void __init qe_reset(void); - -/* QE PIO */ -#define QE_PIO_PINS 32 - -struct qe_pio_regs { - __be32 cpodr; /* Open drain register */ - __be32 cpdata; /* Data register */ - __be32 cpdir1; /* Direction register */ - __be32 cpdir2; /* Direction register */ - __be32 cppar1; /* Pin assignment register */ - __be32 cppar2; /* Pin assignment register */ -#ifdef CONFIG_PPC_85xx - u8 pad[8]; -#endif -}; - -extern int par_io_init(struct device_node *np); -extern int par_io_of_config(struct device_node *np); -#define QE_PIO_DIR_IN 2 -#define QE_PIO_DIR_OUT 1 -extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, - int dir, int open_drain, int assignment, - int has_irq); -extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, - int assignment, int has_irq); -extern int par_io_data_set(u8 port, u8 pin, u8 val); - -/* QE internal API */ -int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input); -enum qe_clock qe_clock_source(const char *source); -unsigned int qe_get_brg_clk(void); -int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); -int qe_get_snum(void); -void qe_put_snum(u8 snum); -/* we actually use cpm_muram implementation, define this for convenience */ -#define qe_muram_init cpm_muram_init -#define qe_muram_alloc cpm_muram_alloc -#define qe_muram_alloc_fixed cpm_muram_alloc_fixed -#define qe_muram_free cpm_muram_free -#define qe_muram_addr cpm_muram_addr -#define qe_muram_offset cpm_muram_offset - -/* Structure that defines QE firmware binary files. - * - * See Documentation/powerpc/qe-firmware.txt for a description of these - * fields. - */ -struct qe_firmware { - struct qe_header { - __be32 length; /* Length of the entire structure, in bytes */ - u8 magic[3]; /* Set to { 'Q', 'E', 'F' } */ - u8 version; /* Version of this layout. First ver is '1' */ - } header; - u8 id[62]; /* Null-terminated identifier string */ - u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */ - u8 count; /* Number of microcode[] structures */ - struct { - __be16 model; /* The SOC model */ - u8 major; /* The SOC revision major */ - u8 minor; /* The SOC revision minor */ - } __attribute__ ((packed)) soc; - u8 padding[4]; /* Reserved, for alignment */ - __be64 extended_modes; /* Extended modes */ - __be32 vtraps[8]; /* Virtual trap addresses */ - u8 reserved[4]; /* Reserved, for future expansion */ - struct qe_microcode { - u8 id[32]; /* Null-terminated identifier */ - __be32 traps[16]; /* Trap addresses, 0 == ignore */ - __be32 eccr; /* The value for the ECCR register */ - __be32 iram_offset; /* Offset into I-RAM for the code */ - __be32 count; /* Number of 32-bit words of the code */ - __be32 code_offset; /* Offset of the actual microcode */ - u8 major; /* The microcode version major */ - u8 minor; /* The microcode version minor */ - u8 revision; /* The microcode version revision */ - u8 padding; /* Reserved, for alignment */ - u8 reserved[4]; /* Reserved, for future expansion */ - } __attribute__ ((packed)) microcode[1]; - /* All microcode binaries should be located here */ - /* CRC32 should be located here, after the microcode binaries */ -} __attribute__ ((packed)); - -struct qe_firmware_info { - char id[64]; /* Firmware name */ - u32 vtraps[8]; /* Virtual trap addresses */ - u64 extended_modes; /* Extended modes */ -}; - -/* Upload a firmware to the QE */ -int qe_upload_firmware(const struct qe_firmware *firmware); - -/* Obtain information on the uploaded firmware */ -struct qe_firmware_info *qe_get_firmware_info(void); - -/* QE USB */ -int qe_usb_clock_set(enum qe_clock clk, int rate); - -/* Buffer descriptors */ -struct qe_bd { - __be16 status; - __be16 length; - __be32 buf; -} __attribute__ ((packed)); - -#define BD_STATUS_MASK 0xffff0000 -#define BD_LENGTH_MASK 0x0000ffff - -/* Alignment */ -#define QE_INTR_TABLE_ALIGN 16 /* ??? */ -#define QE_ALIGNMENT_OF_BD 8 -#define QE_ALIGNMENT_OF_PRAM 64 - -/* RISC allocation */ -enum qe_risc_allocation { - QE_RISC_ALLOCATION_RISC1 = 1, /* RISC 1 */ - QE_RISC_ALLOCATION_RISC2 = 2, /* RISC 2 */ - QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* Dynamically choose - RISC 1 or RISC 2 */ -}; - -/* QE extended filtering Table Lookup Key Size */ -enum qe_fltr_tbl_lookup_key_size { - QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES - = 0x3f, /* LookupKey parsed by the Generate LookupKey - CMD is truncated to 8 bytes */ - QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES - = 0x5f, /* LookupKey parsed by the Generate LookupKey - CMD is truncated to 16 bytes */ -}; - -/* QE FLTR extended filtering Largest External Table Lookup Key Size */ -enum qe_fltr_largest_external_tbl_lookup_key_size { - QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_NONE - = 0x0,/* not used */ - QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_8_BYTES - = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_8_BYTES, /* 8 bytes */ - QE_FLTR_LARGEST_EXTERNAL_TABLE_LOOKUP_KEY_SIZE_16_BYTES - = QE_FLTR_TABLE_LOOKUP_KEY_SIZE_16_BYTES, /* 16 bytes */ -}; - -/* structure representing QE parameter RAM */ -struct qe_timer_tables { - u16 tm_base; /* QE timer table base adr */ - u16 tm_ptr; /* QE timer table pointer */ - u16 r_tmr; /* QE timer mode register */ - u16 r_tmv; /* QE timer valid register */ - u32 tm_cmd; /* QE timer cmd register */ - u32 tm_cnt; /* QE timer internal cnt */ -} __attribute__ ((packed)); - -#define QE_FLTR_TAD_SIZE 8 - -/* QE extended filtering Termination Action Descriptor (TAD) */ -struct qe_fltr_tad { - u8 serialized[QE_FLTR_TAD_SIZE]; -} __attribute__ ((packed)); - -/* Communication Direction */ -enum comm_dir { - COMM_DIR_NONE = 0, - COMM_DIR_RX = 1, - COMM_DIR_TX = 2, - COMM_DIR_RX_AND_TX = 3 -}; - -/* QE CMXUCR Registers. - * There are two UCCs represented in each of the four CMXUCR registers. - * These values are for the UCC in the LSBs - */ -#define QE_CMXUCR_MII_ENET_MNG 0x00007000 -#define QE_CMXUCR_MII_ENET_MNG_SHIFT 12 -#define QE_CMXUCR_GRANT 0x00008000 -#define QE_CMXUCR_TSA 0x00004000 -#define QE_CMXUCR_BKPT 0x00000100 -#define QE_CMXUCR_TX_CLK_SRC_MASK 0x0000000F - -/* QE CMXGCR Registers. -*/ -#define QE_CMXGCR_MII_ENET_MNG 0x00007000 -#define QE_CMXGCR_MII_ENET_MNG_SHIFT 12 -#define QE_CMXGCR_USBCS 0x0000000f -#define QE_CMXGCR_USBCS_CLK3 0x1 -#define QE_CMXGCR_USBCS_CLK5 0x2 -#define QE_CMXGCR_USBCS_CLK7 0x3 -#define QE_CMXGCR_USBCS_CLK9 0x4 -#define QE_CMXGCR_USBCS_CLK13 0x5 -#define QE_CMXGCR_USBCS_CLK17 0x6 -#define QE_CMXGCR_USBCS_CLK19 0x7 -#define QE_CMXGCR_USBCS_CLK21 0x8 -#define QE_CMXGCR_USBCS_BRG9 0x9 -#define QE_CMXGCR_USBCS_BRG10 0xa - -/* QE CECR Commands. -*/ -#define QE_CR_FLG 0x00010000 -#define QE_RESET 0x80000000 -#define QE_INIT_TX_RX 0x00000000 -#define QE_INIT_RX 0x00000001 -#define QE_INIT_TX 0x00000002 -#define QE_ENTER_HUNT_MODE 0x00000003 -#define QE_STOP_TX 0x00000004 -#define QE_GRACEFUL_STOP_TX 0x00000005 -#define QE_RESTART_TX 0x00000006 -#define QE_CLOSE_RX_BD 0x00000007 -#define QE_SWITCH_COMMAND 0x00000007 -#define QE_SET_GROUP_ADDRESS 0x00000008 -#define QE_START_IDMA 0x00000009 -#define QE_MCC_STOP_RX 0x00000009 -#define QE_ATM_TRANSMIT 0x0000000a -#define QE_HPAC_CLEAR_ALL 0x0000000b -#define QE_GRACEFUL_STOP_RX 0x0000001a -#define QE_RESTART_RX 0x0000001b -#define QE_HPAC_SET_PRIORITY 0x0000010b -#define QE_HPAC_STOP_TX 0x0000020b -#define QE_HPAC_STOP_RX 0x0000030b -#define QE_HPAC_GRACEFUL_STOP_TX 0x0000040b -#define QE_HPAC_GRACEFUL_STOP_RX 0x0000050b -#define QE_HPAC_START_TX 0x0000060b -#define QE_HPAC_START_RX 0x0000070b -#define QE_USB_STOP_TX 0x0000000a -#define QE_USB_RESTART_TX 0x0000000c -#define QE_QMC_STOP_TX 0x0000000c -#define QE_QMC_STOP_RX 0x0000000d -#define QE_SS7_SU_FIL_RESET 0x0000000e -/* jonathbr added from here down for 83xx */ -#define QE_RESET_BCS 0x0000000a -#define QE_MCC_INIT_TX_RX_16 0x00000003 -#define QE_MCC_STOP_TX 0x00000004 -#define QE_MCC_INIT_TX_1 0x00000005 -#define QE_MCC_INIT_RX_1 0x00000006 -#define QE_MCC_RESET 0x00000007 -#define QE_SET_TIMER 0x00000008 -#define QE_RANDOM_NUMBER 0x0000000c -#define QE_ATM_MULTI_THREAD_INIT 0x00000011 -#define QE_ASSIGN_PAGE 0x00000012 -#define QE_ADD_REMOVE_HASH_ENTRY 0x00000013 -#define QE_START_FLOW_CONTROL 0x00000014 -#define QE_STOP_FLOW_CONTROL 0x00000015 -#define QE_ASSIGN_PAGE_TO_DEVICE 0x00000016 - -#define QE_ASSIGN_RISC 0x00000010 -#define QE_CR_MCN_NORMAL_SHIFT 6 -#define QE_CR_MCN_USB_SHIFT 4 -#define QE_CR_MCN_RISC_ASSIGN_SHIFT 8 -#define QE_CR_SNUM_SHIFT 17 - -/* QE CECR Sub Block - sub block of QE command. -*/ -#define QE_CR_SUBBLOCK_INVALID 0x00000000 -#define QE_CR_SUBBLOCK_USB 0x03200000 -#define QE_CR_SUBBLOCK_UCCFAST1 0x02000000 -#define QE_CR_SUBBLOCK_UCCFAST2 0x02200000 -#define QE_CR_SUBBLOCK_UCCFAST3 0x02400000 -#define QE_CR_SUBBLOCK_UCCFAST4 0x02600000 -#define QE_CR_SUBBLOCK_UCCFAST5 0x02800000 -#define QE_CR_SUBBLOCK_UCCFAST6 0x02a00000 -#define QE_CR_SUBBLOCK_UCCFAST7 0x02c00000 -#define QE_CR_SUBBLOCK_UCCFAST8 0x02e00000 -#define QE_CR_SUBBLOCK_UCCSLOW1 0x00000000 -#define QE_CR_SUBBLOCK_UCCSLOW2 0x00200000 -#define QE_CR_SUBBLOCK_UCCSLOW3 0x00400000 -#define QE_CR_SUBBLOCK_UCCSLOW4 0x00600000 -#define QE_CR_SUBBLOCK_UCCSLOW5 0x00800000 -#define QE_CR_SUBBLOCK_UCCSLOW6 0x00a00000 -#define QE_CR_SUBBLOCK_UCCSLOW7 0x00c00000 -#define QE_CR_SUBBLOCK_UCCSLOW8 0x00e00000 -#define QE_CR_SUBBLOCK_MCC1 0x03800000 -#define QE_CR_SUBBLOCK_MCC2 0x03a00000 -#define QE_CR_SUBBLOCK_MCC3 0x03000000 -#define QE_CR_SUBBLOCK_IDMA1 0x02800000 -#define QE_CR_SUBBLOCK_IDMA2 0x02a00000 -#define QE_CR_SUBBLOCK_IDMA3 0x02c00000 -#define QE_CR_SUBBLOCK_IDMA4 0x02e00000 -#define QE_CR_SUBBLOCK_HPAC 0x01e00000 -#define QE_CR_SUBBLOCK_SPI1 0x01400000 -#define QE_CR_SUBBLOCK_SPI2 0x01600000 -#define QE_CR_SUBBLOCK_RAND 0x01c00000 -#define QE_CR_SUBBLOCK_TIMER 0x01e00000 -#define QE_CR_SUBBLOCK_GENERAL 0x03c00000 - -/* QE CECR Protocol - For non-MCC, specifies mode for QE CECR command */ -#define QE_CR_PROTOCOL_UNSPECIFIED 0x00 /* For all other protocols */ -#define QE_CR_PROTOCOL_HDLC_TRANSPARENT 0x00 -#define QE_CR_PROTOCOL_QMC 0x02 -#define QE_CR_PROTOCOL_UART 0x04 -#define QE_CR_PROTOCOL_ATM_POS 0x0A -#define QE_CR_PROTOCOL_ETHERNET 0x0C -#define QE_CR_PROTOCOL_L2_SWITCH 0x0D - -/* BRG configuration register */ -#define QE_BRGC_ENABLE 0x00010000 -#define QE_BRGC_DIVISOR_SHIFT 1 -#define QE_BRGC_DIVISOR_MAX 0xFFF -#define QE_BRGC_DIV16 1 - -/* QE Timers registers */ -#define QE_GTCFR1_PCAS 0x80 -#define QE_GTCFR1_STP2 0x20 -#define QE_GTCFR1_RST2 0x10 -#define QE_GTCFR1_GM2 0x08 -#define QE_GTCFR1_GM1 0x04 -#define QE_GTCFR1_STP1 0x02 -#define QE_GTCFR1_RST1 0x01 - -/* SDMA registers */ -#define QE_SDSR_BER1 0x02000000 -#define QE_SDSR_BER2 0x01000000 - -#define QE_SDMR_GLB_1_MSK 0x80000000 -#define QE_SDMR_ADR_SEL 0x20000000 -#define QE_SDMR_BER1_MSK 0x02000000 -#define QE_SDMR_BER2_MSK 0x01000000 -#define QE_SDMR_EB1_MSK 0x00800000 -#define QE_SDMR_ER1_MSK 0x00080000 -#define QE_SDMR_ER2_MSK 0x00040000 -#define QE_SDMR_CEN_MASK 0x0000E000 -#define QE_SDMR_SBER_1 0x00000200 -#define QE_SDMR_SBER_2 0x00000200 -#define QE_SDMR_EB1_PR_MASK 0x000000C0 -#define QE_SDMR_ER1_PR 0x00000008 - -#define QE_SDMR_CEN_SHIFT 13 -#define QE_SDMR_EB1_PR_SHIFT 6 - -#define QE_SDTM_MSNUM_SHIFT 24 - -#define QE_SDEBCR_BA_MASK 0x01FFFFFF - -/* Communication Processor */ -#define QE_CP_CERCR_MEE 0x8000 /* Multi-user RAM ECC enable */ -#define QE_CP_CERCR_IEE 0x4000 /* Instruction RAM ECC enable */ -#define QE_CP_CERCR_CIR 0x0800 /* Common instruction RAM */ - -/* I-RAM */ -#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */ -#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */ - -/* UPC */ -#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */ -#define UPGCR_TMS 0x40000000 /* Transmit master/slave mode */ -#define UPGCR_RMS 0x20000000 /* Receive master/slave mode */ -#define UPGCR_ADDR 0x10000000 /* Master MPHY Addr multiplexing */ -#define UPGCR_DIAG 0x01000000 /* Diagnostic mode */ - -/* UCC GUEMR register */ -#define UCC_GUEMR_MODE_MASK_RX 0x02 -#define UCC_GUEMR_MODE_FAST_RX 0x02 -#define UCC_GUEMR_MODE_SLOW_RX 0x00 -#define UCC_GUEMR_MODE_MASK_TX 0x01 -#define UCC_GUEMR_MODE_FAST_TX 0x01 -#define UCC_GUEMR_MODE_SLOW_TX 0x00 -#define UCC_GUEMR_MODE_MASK (UCC_GUEMR_MODE_MASK_RX | UCC_GUEMR_MODE_MASK_TX) -#define UCC_GUEMR_SET_RESERVED3 0x10 /* Bit 3 in the guemr is reserved but - must be set 1 */ - -/* structure representing UCC SLOW parameter RAM */ -struct ucc_slow_pram { - __be16 rbase; /* RX BD base address */ - __be16 tbase; /* TX BD base address */ - u8 rbmr; /* RX bus mode register (same as CPM's RFCR) */ - u8 tbmr; /* TX bus mode register (same as CPM's TFCR) */ - __be16 mrblr; /* Rx buffer length */ - __be32 rstate; /* Rx internal state */ - __be32 rptr; /* Rx internal data pointer */ - __be16 rbptr; /* rb BD Pointer */ - __be16 rcount; /* Rx internal byte count */ - __be32 rtemp; /* Rx temp */ - __be32 tstate; /* Tx internal state */ - __be32 tptr; /* Tx internal data pointer */ - __be16 tbptr; /* Tx BD pointer */ - __be16 tcount; /* Tx byte count */ - __be32 ttemp; /* Tx temp */ - __be32 rcrc; /* temp receive CRC */ - __be32 tcrc; /* temp transmit CRC */ -} __attribute__ ((packed)); - -/* General UCC SLOW Mode Register (GUMRH & GUMRL) */ -#define UCC_SLOW_GUMR_H_SAM_QMC 0x00000000 -#define UCC_SLOW_GUMR_H_SAM_SATM 0x00008000 -#define UCC_SLOW_GUMR_H_REVD 0x00002000 -#define UCC_SLOW_GUMR_H_TRX 0x00001000 -#define UCC_SLOW_GUMR_H_TTX 0x00000800 -#define UCC_SLOW_GUMR_H_CDP 0x00000400 -#define UCC_SLOW_GUMR_H_CTSP 0x00000200 -#define UCC_SLOW_GUMR_H_CDS 0x00000100 -#define UCC_SLOW_GUMR_H_CTSS 0x00000080 -#define UCC_SLOW_GUMR_H_TFL 0x00000040 -#define UCC_SLOW_GUMR_H_RFW 0x00000020 -#define UCC_SLOW_GUMR_H_TXSY 0x00000010 -#define UCC_SLOW_GUMR_H_4SYNC 0x00000004 -#define UCC_SLOW_GUMR_H_8SYNC 0x00000008 -#define UCC_SLOW_GUMR_H_16SYNC 0x0000000c -#define UCC_SLOW_GUMR_H_RTSM 0x00000002 -#define UCC_SLOW_GUMR_H_RSYN 0x00000001 - -#define UCC_SLOW_GUMR_L_TCI 0x10000000 -#define UCC_SLOW_GUMR_L_RINV 0x02000000 -#define UCC_SLOW_GUMR_L_TINV 0x01000000 -#define UCC_SLOW_GUMR_L_TEND 0x00040000 -#define UCC_SLOW_GUMR_L_TDCR_MASK 0x00030000 -#define UCC_SLOW_GUMR_L_TDCR_32 0x00030000 -#define UCC_SLOW_GUMR_L_TDCR_16 0x00020000 -#define UCC_SLOW_GUMR_L_TDCR_8 0x00010000 -#define UCC_SLOW_GUMR_L_TDCR_1 0x00000000 -#define UCC_SLOW_GUMR_L_RDCR_MASK 0x0000c000 -#define UCC_SLOW_GUMR_L_RDCR_32 0x0000c000 -#define UCC_SLOW_GUMR_L_RDCR_16 0x00008000 -#define UCC_SLOW_GUMR_L_RDCR_8 0x00004000 -#define UCC_SLOW_GUMR_L_RDCR_1 0x00000000 -#define UCC_SLOW_GUMR_L_RENC_NRZI 0x00000800 -#define UCC_SLOW_GUMR_L_RENC_NRZ 0x00000000 -#define UCC_SLOW_GUMR_L_TENC_NRZI 0x00000100 -#define UCC_SLOW_GUMR_L_TENC_NRZ 0x00000000 -#define UCC_SLOW_GUMR_L_DIAG_MASK 0x000000c0 -#define UCC_SLOW_GUMR_L_DIAG_LE 0x000000c0 -#define UCC_SLOW_GUMR_L_DIAG_ECHO 0x00000080 -#define UCC_SLOW_GUMR_L_DIAG_LOOP 0x00000040 -#define UCC_SLOW_GUMR_L_DIAG_NORM 0x00000000 -#define UCC_SLOW_GUMR_L_ENR 0x00000020 -#define UCC_SLOW_GUMR_L_ENT 0x00000010 -#define UCC_SLOW_GUMR_L_MODE_MASK 0x0000000F -#define UCC_SLOW_GUMR_L_MODE_BISYNC 0x00000008 -#define UCC_SLOW_GUMR_L_MODE_AHDLC 0x00000006 -#define UCC_SLOW_GUMR_L_MODE_UART 0x00000004 -#define UCC_SLOW_GUMR_L_MODE_QMC 0x00000002 - -/* General UCC FAST Mode Register */ -#define UCC_FAST_GUMR_TCI 0x20000000 -#define UCC_FAST_GUMR_TRX 0x10000000 -#define UCC_FAST_GUMR_TTX 0x08000000 -#define UCC_FAST_GUMR_CDP 0x04000000 -#define UCC_FAST_GUMR_CTSP 0x02000000 -#define UCC_FAST_GUMR_CDS 0x01000000 -#define UCC_FAST_GUMR_CTSS 0x00800000 -#define UCC_FAST_GUMR_TXSY 0x00020000 -#define UCC_FAST_GUMR_RSYN 0x00010000 -#define UCC_FAST_GUMR_RTSM 0x00002000 -#define UCC_FAST_GUMR_REVD 0x00000400 -#define UCC_FAST_GUMR_ENR 0x00000020 -#define UCC_FAST_GUMR_ENT 0x00000010 - -/* UART Slow UCC Event Register (UCCE) */ -#define UCC_UART_UCCE_AB 0x0200 -#define UCC_UART_UCCE_IDLE 0x0100 -#define UCC_UART_UCCE_GRA 0x0080 -#define UCC_UART_UCCE_BRKE 0x0040 -#define UCC_UART_UCCE_BRKS 0x0020 -#define UCC_UART_UCCE_CCR 0x0008 -#define UCC_UART_UCCE_BSY 0x0004 -#define UCC_UART_UCCE_TX 0x0002 -#define UCC_UART_UCCE_RX 0x0001 - -/* HDLC Slow UCC Event Register (UCCE) */ -#define UCC_HDLC_UCCE_GLR 0x1000 -#define UCC_HDLC_UCCE_GLT 0x0800 -#define UCC_HDLC_UCCE_IDLE 0x0100 -#define UCC_HDLC_UCCE_BRKE 0x0040 -#define UCC_HDLC_UCCE_BRKS 0x0020 -#define UCC_HDLC_UCCE_TXE 0x0010 -#define UCC_HDLC_UCCE_RXF 0x0008 -#define UCC_HDLC_UCCE_BSY 0x0004 -#define UCC_HDLC_UCCE_TXB 0x0002 -#define UCC_HDLC_UCCE_RXB 0x0001 - -/* BISYNC Slow UCC Event Register (UCCE) */ -#define UCC_BISYNC_UCCE_GRA 0x0080 -#define UCC_BISYNC_UCCE_TXE 0x0010 -#define UCC_BISYNC_UCCE_RCH 0x0008 -#define UCC_BISYNC_UCCE_BSY 0x0004 -#define UCC_BISYNC_UCCE_TXB 0x0002 -#define UCC_BISYNC_UCCE_RXB 0x0001 - -/* Gigabit Ethernet Fast UCC Event Register (UCCE) */ -#define UCC_GETH_UCCE_MPD 0x80000000 -#define UCC_GETH_UCCE_SCAR 0x40000000 -#define UCC_GETH_UCCE_GRA 0x20000000 -#define UCC_GETH_UCCE_CBPR 0x10000000 -#define UCC_GETH_UCCE_BSY 0x08000000 -#define UCC_GETH_UCCE_RXC 0x04000000 -#define UCC_GETH_UCCE_TXC 0x02000000 -#define UCC_GETH_UCCE_TXE 0x01000000 -#define UCC_GETH_UCCE_TXB7 0x00800000 -#define UCC_GETH_UCCE_TXB6 0x00400000 -#define UCC_GETH_UCCE_TXB5 0x00200000 -#define UCC_GETH_UCCE_TXB4 0x00100000 -#define UCC_GETH_UCCE_TXB3 0x00080000 -#define UCC_GETH_UCCE_TXB2 0x00040000 -#define UCC_GETH_UCCE_TXB1 0x00020000 -#define UCC_GETH_UCCE_TXB0 0x00010000 -#define UCC_GETH_UCCE_RXB7 0x00008000 -#define UCC_GETH_UCCE_RXB6 0x00004000 -#define UCC_GETH_UCCE_RXB5 0x00002000 -#define UCC_GETH_UCCE_RXB4 0x00001000 -#define UCC_GETH_UCCE_RXB3 0x00000800 -#define UCC_GETH_UCCE_RXB2 0x00000400 -#define UCC_GETH_UCCE_RXB1 0x00000200 -#define UCC_GETH_UCCE_RXB0 0x00000100 -#define UCC_GETH_UCCE_RXF7 0x00000080 -#define UCC_GETH_UCCE_RXF6 0x00000040 -#define UCC_GETH_UCCE_RXF5 0x00000020 -#define UCC_GETH_UCCE_RXF4 0x00000010 -#define UCC_GETH_UCCE_RXF3 0x00000008 -#define UCC_GETH_UCCE_RXF2 0x00000004 -#define UCC_GETH_UCCE_RXF1 0x00000002 -#define UCC_GETH_UCCE_RXF0 0x00000001 - -/* UPSMR, when used as a UART */ -#define UCC_UART_UPSMR_FLC 0x8000 -#define UCC_UART_UPSMR_SL 0x4000 -#define UCC_UART_UPSMR_CL_MASK 0x3000 -#define UCC_UART_UPSMR_CL_8 0x3000 -#define UCC_UART_UPSMR_CL_7 0x2000 -#define UCC_UART_UPSMR_CL_6 0x1000 -#define UCC_UART_UPSMR_CL_5 0x0000 -#define UCC_UART_UPSMR_UM_MASK 0x0c00 -#define UCC_UART_UPSMR_UM_NORMAL 0x0000 -#define UCC_UART_UPSMR_UM_MAN_MULTI 0x0400 -#define UCC_UART_UPSMR_UM_AUTO_MULTI 0x0c00 -#define UCC_UART_UPSMR_FRZ 0x0200 -#define UCC_UART_UPSMR_RZS 0x0100 -#define UCC_UART_UPSMR_SYN 0x0080 -#define UCC_UART_UPSMR_DRT 0x0040 -#define UCC_UART_UPSMR_PEN 0x0010 -#define UCC_UART_UPSMR_RPM_MASK 0x000c -#define UCC_UART_UPSMR_RPM_ODD 0x0000 -#define UCC_UART_UPSMR_RPM_LOW 0x0004 -#define UCC_UART_UPSMR_RPM_EVEN 0x0008 -#define UCC_UART_UPSMR_RPM_HIGH 0x000C -#define UCC_UART_UPSMR_TPM_MASK 0x0003 -#define UCC_UART_UPSMR_TPM_ODD 0x0000 -#define UCC_UART_UPSMR_TPM_LOW 0x0001 -#define UCC_UART_UPSMR_TPM_EVEN 0x0002 -#define UCC_UART_UPSMR_TPM_HIGH 0x0003 - -/* UCC Transmit On Demand Register (UTODR) */ -#define UCC_SLOW_TOD 0x8000 -#define UCC_FAST_TOD 0x8000 - -/* UCC Bus Mode Register masks */ -/* Not to be confused with the Bundle Mode Register */ -#define UCC_BMR_GBL 0x20 -#define UCC_BMR_BO_BE 0x10 -#define UCC_BMR_CETM 0x04 -#define UCC_BMR_DTB 0x02 -#define UCC_BMR_BDB 0x01 - -/* Function code masks */ -#define FC_GBL 0x20 -#define FC_DTB_LCL 0x02 -#define UCC_FAST_FUNCTION_CODE_GBL 0x20 -#define UCC_FAST_FUNCTION_CODE_DTB_LCL 0x02 -#define UCC_FAST_FUNCTION_CODE_BDB_LCL 0x01 - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_QE_H */ diff --git a/include/asm-powerpc/qe_ic.h b/include/asm-powerpc/qe_ic.h deleted file mode 100644 index a779b2c..0000000 --- a/include/asm-powerpc/qe_ic.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * include/asm-powerpc/qe_ic.h - * - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * Description: - * QE IC external definitions and structure. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_POWERPC_QE_IC_H -#define _ASM_POWERPC_QE_IC_H - -#include - -#define NUM_OF_QE_IC_GROUPS 6 - -/* Flags when we init the QE IC */ -#define QE_IC_SPREADMODE_GRP_W 0x00000001 -#define QE_IC_SPREADMODE_GRP_X 0x00000002 -#define QE_IC_SPREADMODE_GRP_Y 0x00000004 -#define QE_IC_SPREADMODE_GRP_Z 0x00000008 -#define QE_IC_SPREADMODE_GRP_RISCA 0x00000010 -#define QE_IC_SPREADMODE_GRP_RISCB 0x00000020 - -#define QE_IC_LOW_SIGNAL 0x00000100 -#define QE_IC_HIGH_SIGNAL 0x00000200 - -#define QE_IC_GRP_W_PRI0_DEST_SIGNAL_HIGH 0x00001000 -#define QE_IC_GRP_W_PRI1_DEST_SIGNAL_HIGH 0x00002000 -#define QE_IC_GRP_X_PRI0_DEST_SIGNAL_HIGH 0x00004000 -#define QE_IC_GRP_X_PRI1_DEST_SIGNAL_HIGH 0x00008000 -#define QE_IC_GRP_Y_PRI0_DEST_SIGNAL_HIGH 0x00010000 -#define QE_IC_GRP_Y_PRI1_DEST_SIGNAL_HIGH 0x00020000 -#define QE_IC_GRP_Z_PRI0_DEST_SIGNAL_HIGH 0x00040000 -#define QE_IC_GRP_Z_PRI1_DEST_SIGNAL_HIGH 0x00080000 -#define QE_IC_GRP_RISCA_PRI0_DEST_SIGNAL_HIGH 0x00100000 -#define QE_IC_GRP_RISCA_PRI1_DEST_SIGNAL_HIGH 0x00200000 -#define QE_IC_GRP_RISCB_PRI0_DEST_SIGNAL_HIGH 0x00400000 -#define QE_IC_GRP_RISCB_PRI1_DEST_SIGNAL_HIGH 0x00800000 -#define QE_IC_GRP_W_DEST_SIGNAL_SHIFT (12) - -/* QE interrupt sources groups */ -enum qe_ic_grp_id { - QE_IC_GRP_W = 0, /* QE interrupt controller group W */ - QE_IC_GRP_X, /* QE interrupt controller group X */ - QE_IC_GRP_Y, /* QE interrupt controller group Y */ - QE_IC_GRP_Z, /* QE interrupt controller group Z */ - QE_IC_GRP_RISCA, /* QE interrupt controller RISC group A */ - QE_IC_GRP_RISCB /* QE interrupt controller RISC group B */ -}; - -void qe_ic_init(struct device_node *node, unsigned int flags, - void (*low_handler)(unsigned int irq, struct irq_desc *desc), - void (*high_handler)(unsigned int irq, struct irq_desc *desc)); -void qe_ic_set_highest_priority(unsigned int virq, int high); -int qe_ic_set_priority(unsigned int virq, unsigned int priority); -int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high); - -struct qe_ic; -unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic); -unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic); - -static inline void qe_ic_cascade_low_ipic(unsigned int irq, - struct irq_desc *desc) -{ - struct qe_ic *qe_ic = desc->handler_data; - unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); - - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); -} - -static inline void qe_ic_cascade_high_ipic(unsigned int irq, - struct irq_desc *desc) -{ - struct qe_ic *qe_ic = desc->handler_data; - unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); - - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); -} - -static inline void qe_ic_cascade_low_mpic(unsigned int irq, - struct irq_desc *desc) -{ - struct qe_ic *qe_ic = desc->handler_data; - unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic); - - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); - - desc->chip->eoi(irq); -} - -static inline void qe_ic_cascade_high_mpic(unsigned int irq, - struct irq_desc *desc) -{ - struct qe_ic *qe_ic = desc->handler_data; - unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic); - - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); - - desc->chip->eoi(irq); -} - -static inline void qe_ic_cascade_muxed_mpic(unsigned int irq, - struct irq_desc *desc) -{ - struct qe_ic *qe_ic = desc->handler_data; - unsigned int cascade_irq; - - cascade_irq = qe_ic_get_high_irq(qe_ic); - if (cascade_irq == NO_IRQ) - cascade_irq = qe_ic_get_low_irq(qe_ic); - - if (cascade_irq != NO_IRQ) - generic_handle_irq(cascade_irq); - - desc->chip->eoi(irq); -} - -#endif /* _ASM_POWERPC_QE_IC_H */ diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h deleted file mode 100644 index c6d1ab6..0000000 --- a/include/asm-powerpc/reg.h +++ /dev/null @@ -1,788 +0,0 @@ -/* - * Contains the definition of registers common to all PowerPC variants. - * If a register definition has been changed in a different PowerPC - * variant, we will case it in #ifndef XXX ... #endif, and have the - * number used in the Programming Environments Manual For 32-Bit - * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. - */ - -#ifndef _ASM_POWERPC_REG_H -#define _ASM_POWERPC_REG_H -#ifdef __KERNEL__ - -#include -#include - -/* Pickup Book E specific registers. */ -#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) -#include -#endif /* CONFIG_BOOKE || CONFIG_40x */ - -#ifdef CONFIG_FSL_EMB_PERFMON -#include -#endif - -#ifdef CONFIG_8xx -#include -#endif /* CONFIG_8xx */ - -#define MSR_SF_LG 63 /* Enable 64 bit mode */ -#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ -#define MSR_HV_LG 60 /* Hypervisor state */ -#define MSR_VEC_LG 25 /* Enable AltiVec */ -#define MSR_VSX_LG 23 /* Enable VSX */ -#define MSR_POW_LG 18 /* Enable Power Management */ -#define MSR_WE_LG 18 /* Wait State Enable */ -#define MSR_TGPR_LG 17 /* TLB Update registers in use */ -#define MSR_CE_LG 17 /* Critical Interrupt Enable */ -#define MSR_ILE_LG 16 /* Interrupt Little Endian */ -#define MSR_EE_LG 15 /* External Interrupt Enable */ -#define MSR_PR_LG 14 /* Problem State / Privilege Level */ -#define MSR_FP_LG 13 /* Floating Point enable */ -#define MSR_ME_LG 12 /* Machine Check Enable */ -#define MSR_FE0_LG 11 /* Floating Exception mode 0 */ -#define MSR_SE_LG 10 /* Single Step */ -#define MSR_BE_LG 9 /* Branch Trace */ -#define MSR_DE_LG 9 /* Debug Exception Enable */ -#define MSR_FE1_LG 8 /* Floating Exception mode 1 */ -#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */ -#define MSR_IR_LG 5 /* Instruction Relocate */ -#define MSR_DR_LG 4 /* Data Relocate */ -#define MSR_PE_LG 3 /* Protection Enable */ -#define MSR_PX_LG 2 /* Protection Exclusive Mode */ -#define MSR_PMM_LG 2 /* Performance monitor */ -#define MSR_RI_LG 1 /* Recoverable Exception */ -#define MSR_LE_LG 0 /* Little Endian */ - -#ifdef __ASSEMBLY__ -#define __MASK(X) (1<<(X)) -#else -#define __MASK(X) (1UL<<(X)) -#endif - -#ifdef CONFIG_PPC64 -#define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */ -#define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */ -#define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */ -#else -/* so tests for these bits fail on 32-bit */ -#define MSR_SF 0 -#define MSR_ISF 0 -#define MSR_HV 0 -#endif - -#define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */ -#define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */ -#define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */ -#define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */ -#define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */ -#define MSR_CE __MASK(MSR_CE_LG) /* Critical Interrupt Enable */ -#define MSR_ILE __MASK(MSR_ILE_LG) /* Interrupt Little Endian */ -#define MSR_EE __MASK(MSR_EE_LG) /* External Interrupt Enable */ -#define MSR_PR __MASK(MSR_PR_LG) /* Problem State / Privilege Level */ -#define MSR_FP __MASK(MSR_FP_LG) /* Floating Point enable */ -#define MSR_ME __MASK(MSR_ME_LG) /* Machine Check Enable */ -#define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ -#define MSR_SE __MASK(MSR_SE_LG) /* Single Step */ -#define MSR_BE __MASK(MSR_BE_LG) /* Branch Trace */ -#define MSR_DE __MASK(MSR_DE_LG) /* Debug Exception Enable */ -#define MSR_FE1 __MASK(MSR_FE1_LG) /* Floating Exception mode 1 */ -#define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */ -#define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ -#define MSR_DR __MASK(MSR_DR_LG) /* Data Relocate */ -#define MSR_PE __MASK(MSR_PE_LG) /* Protection Enable */ -#define MSR_PX __MASK(MSR_PX_LG) /* Protection Exclusive Mode */ -#ifndef MSR_PMM -#define MSR_PMM __MASK(MSR_PMM_LG) /* Performance monitor */ -#endif -#define MSR_RI __MASK(MSR_RI_LG) /* Recoverable Exception */ -#define MSR_LE __MASK(MSR_LE_LG) /* Little Endian */ - -#ifdef CONFIG_PPC64 -#define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV -#define MSR_KERNEL MSR_ | MSR_SF - -#define MSR_USER32 MSR_ | MSR_PR | MSR_EE -#define MSR_USER64 MSR_USER32 | MSR_SF - -#else /* 32-bit */ -/* Default MSR for kernel mode. */ -#ifndef MSR_KERNEL /* reg_booke.h also defines this */ -#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR) -#endif - -#define MSR_USER (MSR_KERNEL|MSR_PR|MSR_EE) -#endif - -/* Floating Point Status and Control Register (FPSCR) Fields */ -#define FPSCR_FX 0x80000000 /* FPU exception summary */ -#define FPSCR_FEX 0x40000000 /* FPU enabled exception summary */ -#define FPSCR_VX 0x20000000 /* Invalid operation summary */ -#define FPSCR_OX 0x10000000 /* Overflow exception summary */ -#define FPSCR_UX 0x08000000 /* Underflow exception summary */ -#define FPSCR_ZX 0x04000000 /* Zero-divide exception summary */ -#define FPSCR_XX 0x02000000 /* Inexact exception summary */ -#define FPSCR_VXSNAN 0x01000000 /* Invalid op for SNaN */ -#define FPSCR_VXISI 0x00800000 /* Invalid op for Inv - Inv */ -#define FPSCR_VXIDI 0x00400000 /* Invalid op for Inv / Inv */ -#define FPSCR_VXZDZ 0x00200000 /* Invalid op for Zero / Zero */ -#define FPSCR_VXIMZ 0x00100000 /* Invalid op for Inv * Zero */ -#define FPSCR_VXVC 0x00080000 /* Invalid op for Compare */ -#define FPSCR_FR 0x00040000 /* Fraction rounded */ -#define FPSCR_FI 0x00020000 /* Fraction inexact */ -#define FPSCR_FPRF 0x0001f000 /* FPU Result Flags */ -#define FPSCR_FPCC 0x0000f000 /* FPU Condition Codes */ -#define FPSCR_VXSOFT 0x00000400 /* Invalid op for software request */ -#define FPSCR_VXSQRT 0x00000200 /* Invalid op for square root */ -#define FPSCR_VXCVI 0x00000100 /* Invalid op for integer convert */ -#define FPSCR_VE 0x00000080 /* Invalid op exception enable */ -#define FPSCR_OE 0x00000040 /* IEEE overflow exception enable */ -#define FPSCR_UE 0x00000020 /* IEEE underflow exception enable */ -#define FPSCR_ZE 0x00000010 /* IEEE zero divide exception enable */ -#define FPSCR_XE 0x00000008 /* FP inexact exception enable */ -#define FPSCR_NI 0x00000004 /* FPU non IEEE-Mode */ -#define FPSCR_RN 0x00000003 /* FPU rounding control */ - -/* Special Purpose Registers (SPRNs)*/ -#define SPRN_CTR 0x009 /* Count Register */ -#define SPRN_DSCR 0x11 -#define SPRN_CTRLF 0x088 -#define SPRN_CTRLT 0x098 -#define CTRL_CT 0xc0000000 /* current thread */ -#define CTRL_CT0 0x80000000 /* thread 0 */ -#define CTRL_CT1 0x40000000 /* thread 1 */ -#define CTRL_TE 0x00c00000 /* thread enable */ -#define CTRL_RUNLATCH 0x1 -#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */ -#define DABR_TRANSLATION (1UL << 2) -#define SPRN_DABR2 0x13D /* e300 */ -#define SPRN_DABRX 0x3F7 /* Data Address Breakpoint Register Extension */ -#define DABRX_USER (1UL << 0) -#define DABRX_KERNEL (1UL << 1) -#define SPRN_DAR 0x013 /* Data Address Register */ -#define SPRN_DBCR 0x136 /* e300 Data Breakpoint Control Reg */ -#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */ -#define DSISR_NOHPTE 0x40000000 /* no translation found */ -#define DSISR_PROTFAULT 0x08000000 /* protection fault */ -#define DSISR_ISSTORE 0x02000000 /* access was a store */ -#define DSISR_DABRMATCH 0x00400000 /* hit data breakpoint */ -#define DSISR_NOSEGMENT 0x00200000 /* STAB/SLB miss */ -#define SPRN_TBRL 0x10C /* Time Base Read Lower Register (user, R/O) */ -#define SPRN_TBRU 0x10D /* Time Base Read Upper Register (user, R/O) */ -#define SPRN_TBWL 0x11C /* Time Base Lower Register (super, R/W) */ -#define SPRN_TBWU 0x11D /* Time Base Upper Register (super, R/W) */ -#define SPRN_SPURR 0x134 /* Scaled PURR */ -#define SPRN_HIOR 0x137 /* 970 Hypervisor interrupt offset */ -#define SPRN_LPCR 0x13E /* LPAR Control Register */ -#define SPRN_DBAT0L 0x219 /* Data BAT 0 Lower Register */ -#define SPRN_DBAT0U 0x218 /* Data BAT 0 Upper Register */ -#define SPRN_DBAT1L 0x21B /* Data BAT 1 Lower Register */ -#define SPRN_DBAT1U 0x21A /* Data BAT 1 Upper Register */ -#define SPRN_DBAT2L 0x21D /* Data BAT 2 Lower Register */ -#define SPRN_DBAT2U 0x21C /* Data BAT 2 Upper Register */ -#define SPRN_DBAT3L 0x21F /* Data BAT 3 Lower Register */ -#define SPRN_DBAT3U 0x21E /* Data BAT 3 Upper Register */ -#define SPRN_DBAT4L 0x239 /* Data BAT 4 Lower Register */ -#define SPRN_DBAT4U 0x238 /* Data BAT 4 Upper Register */ -#define SPRN_DBAT5L 0x23B /* Data BAT 5 Lower Register */ -#define SPRN_DBAT5U 0x23A /* Data BAT 5 Upper Register */ -#define SPRN_DBAT6L 0x23D /* Data BAT 6 Lower Register */ -#define SPRN_DBAT6U 0x23C /* Data BAT 6 Upper Register */ -#define SPRN_DBAT7L 0x23F /* Data BAT 7 Lower Register */ -#define SPRN_DBAT7U 0x23E /* Data BAT 7 Upper Register */ - -#define SPRN_DEC 0x016 /* Decrement Register */ -#define SPRN_DER 0x095 /* Debug Enable Regsiter */ -#define DER_RSTE 0x40000000 /* Reset Interrupt */ -#define DER_CHSTPE 0x20000000 /* Check Stop */ -#define DER_MCIE 0x10000000 /* Machine Check Interrupt */ -#define DER_EXTIE 0x02000000 /* External Interrupt */ -#define DER_ALIE 0x01000000 /* Alignment Interrupt */ -#define DER_PRIE 0x00800000 /* Program Interrupt */ -#define DER_FPUVIE 0x00400000 /* FP Unavailable Interrupt */ -#define DER_DECIE 0x00200000 /* Decrementer Interrupt */ -#define DER_SYSIE 0x00040000 /* System Call Interrupt */ -#define DER_TRE 0x00020000 /* Trace Interrupt */ -#define DER_SEIE 0x00004000 /* FP SW Emulation Interrupt */ -#define DER_ITLBMSE 0x00002000 /* Imp. Spec. Instruction TLB Miss */ -#define DER_ITLBERE 0x00001000 /* Imp. Spec. Instruction TLB Error */ -#define DER_DTLBMSE 0x00000800 /* Imp. Spec. Data TLB Miss */ -#define DER_DTLBERE 0x00000400 /* Imp. Spec. Data TLB Error */ -#define DER_LBRKE 0x00000008 /* Load/Store Breakpoint Interrupt */ -#define DER_IBRKE 0x00000004 /* Instruction Breakpoint Interrupt */ -#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */ -#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */ -#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */ -#define SPRN_EAR 0x11A /* External Address Register */ -#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */ -#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */ -#define SPRN_HID0 0x3F0 /* Hardware Implementation Register 0 */ -#define HID0_EMCP (1<<31) /* Enable Machine Check pin */ -#define HID0_EBA (1<<29) /* Enable Bus Address Parity */ -#define HID0_EBD (1<<28) /* Enable Bus Data Parity */ -#define HID0_SBCLK (1<<27) -#define HID0_EICE (1<<26) -#define HID0_TBEN (1<<26) /* Timebase enable - 745x */ -#define HID0_ECLK (1<<25) -#define HID0_PAR (1<<24) -#define HID0_STEN (1<<24) /* Software table search enable - 745x */ -#define HID0_HIGH_BAT (1<<23) /* Enable high BATs - 7455 */ -#define HID0_DOZE (1<<23) -#define HID0_NAP (1<<22) -#define HID0_SLEEP (1<<21) -#define HID0_DPM (1<<20) -#define HID0_BHTCLR (1<<18) /* Clear branch history table - 7450 */ -#define HID0_XAEN (1<<17) /* Extended addressing enable - 7450 */ -#define HID0_NHR (1<<16) /* Not hard reset (software bit-7450)*/ -#define HID0_ICE (1<<15) /* Instruction Cache Enable */ -#define HID0_DCE (1<<14) /* Data Cache Enable */ -#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */ -#define HID0_DLOCK (1<<12) /* Data Cache Lock */ -#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */ -#define HID0_DCI (1<<10) /* Data Cache Invalidate */ -#define HID0_SPD (1<<9) /* Speculative disable */ -#define HID0_DAPUEN (1<<8) /* Debug APU enable */ -#define HID0_SGE (1<<7) /* Store Gathering Enable */ -#define HID0_SIED (1<<7) /* Serial Instr. Execution [Disable] */ -#define HID0_DCFA (1<<6) /* Data Cache Flush Assist */ -#define HID0_LRSTK (1<<4) /* Link register stack - 745x */ -#define HID0_BTIC (1<<5) /* Branch Target Instr Cache Enable */ -#define HID0_ABE (1<<3) /* Address Broadcast Enable */ -#define HID0_FOLD (1<<3) /* Branch Folding enable - 745x */ -#define HID0_BHTE (1<<2) /* Branch History Table Enable */ -#define HID0_BTCD (1<<1) /* Branch target cache disable */ -#define HID0_NOPDST (1<<1) /* No-op dst, dstt, etc. instr. */ -#define HID0_NOPTI (1<<0) /* No-op dcbt and dcbst instr. */ - -#define SPRN_HID1 0x3F1 /* Hardware Implementation Register 1 */ -#define HID1_EMCP (1<<31) /* 7450 Machine Check Pin Enable */ -#define HID1_DFS (1<<22) /* 7447A Dynamic Frequency Scaling */ -#define HID1_PC0 (1<<16) /* 7450 PLL_CFG[0] */ -#define HID1_PC1 (1<<15) /* 7450 PLL_CFG[1] */ -#define HID1_PC2 (1<<14) /* 7450 PLL_CFG[2] */ -#define HID1_PC3 (1<<13) /* 7450 PLL_CFG[3] */ -#define HID1_SYNCBE (1<<11) /* 7450 ABE for sync, eieio */ -#define HID1_ABE (1<<10) /* 7450 Address Broadcast Enable */ -#define HID1_PS (1<<16) /* 750FX PLL selection */ -#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */ -#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */ -#define SPRN_IABR2 0x3FA /* 83xx */ -#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */ -#define SPRN_HID4 0x3F4 /* 970 HID4 */ -#define SPRN_HID5 0x3F6 /* 970 HID5 */ -#define SPRN_HID6 0x3F9 /* BE HID 6 */ -#define HID6_LB (0x0F<<12) /* Concurrent Large Page Modes */ -#define HID6_DLP (1<<20) /* Disable all large page modes (4K only) */ -#define SPRN_TSC_CELL 0x399 /* Thread switch control on Cell */ -#define TSC_CELL_DEC_ENABLE_0 0x400000 /* Decrementer Interrupt */ -#define TSC_CELL_DEC_ENABLE_1 0x200000 /* Decrementer Interrupt */ -#define TSC_CELL_EE_ENABLE 0x100000 /* External Interrupt */ -#define TSC_CELL_EE_BOOST 0x080000 /* External Interrupt Boost */ -#define SPRN_TSC 0x3FD /* Thread switch control on others */ -#define SPRN_TST 0x3FC /* Thread switch timeout on others */ -#if !defined(SPRN_IAC1) && !defined(SPRN_IAC2) -#define SPRN_IAC1 0x3F4 /* Instruction Address Compare 1 */ -#define SPRN_IAC2 0x3F5 /* Instruction Address Compare 2 */ -#endif -#define SPRN_IBAT0L 0x211 /* Instruction BAT 0 Lower Register */ -#define SPRN_IBAT0U 0x210 /* Instruction BAT 0 Upper Register */ -#define SPRN_IBAT1L 0x213 /* Instruction BAT 1 Lower Register */ -#define SPRN_IBAT1U 0x212 /* Instruction BAT 1 Upper Register */ -#define SPRN_IBAT2L 0x215 /* Instruction BAT 2 Lower Register */ -#define SPRN_IBAT2U 0x214 /* Instruction BAT 2 Upper Register */ -#define SPRN_IBAT3L 0x217 /* Instruction BAT 3 Lower Register */ -#define SPRN_IBAT3U 0x216 /* Instruction BAT 3 Upper Register */ -#define SPRN_IBAT4L 0x231 /* Instruction BAT 4 Lower Register */ -#define SPRN_IBAT4U 0x230 /* Instruction BAT 4 Upper Register */ -#define SPRN_IBAT5L 0x233 /* Instruction BAT 5 Lower Register */ -#define SPRN_IBAT5U 0x232 /* Instruction BAT 5 Upper Register */ -#define SPRN_IBAT6L 0x235 /* Instruction BAT 6 Lower Register */ -#define SPRN_IBAT6U 0x234 /* Instruction BAT 6 Upper Register */ -#define SPRN_IBAT7L 0x237 /* Instruction BAT 7 Lower Register */ -#define SPRN_IBAT7U 0x236 /* Instruction BAT 7 Upper Register */ -#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */ -#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */ -#define SPRN_ICTRL 0x3F3 /* 1011 7450 icache and interrupt ctrl */ -#define ICTRL_EICE 0x08000000 /* enable icache parity errs */ -#define ICTRL_EDC 0x04000000 /* enable dcache parity errs */ -#define ICTRL_EICP 0x00000100 /* enable icache par. check */ -#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */ -#define SPRN_IMMR 0x27E /* Internal Memory Map Register */ -#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */ -#define SPRN_L2CR2 0x3f8 -#define L2CR_L2E 0x80000000 /* L2 enable */ -#define L2CR_L2PE 0x40000000 /* L2 parity enable */ -#define L2CR_L2SIZ_MASK 0x30000000 /* L2 size mask */ -#define L2CR_L2SIZ_256KB 0x10000000 /* L2 size 256KB */ -#define L2CR_L2SIZ_512KB 0x20000000 /* L2 size 512KB */ -#define L2CR_L2SIZ_1MB 0x30000000 /* L2 size 1MB */ -#define L2CR_L2CLK_MASK 0x0e000000 /* L2 clock mask */ -#define L2CR_L2CLK_DISABLED 0x00000000 /* L2 clock disabled */ -#define L2CR_L2CLK_DIV1 0x02000000 /* L2 clock / 1 */ -#define L2CR_L2CLK_DIV1_5 0x04000000 /* L2 clock / 1.5 */ -#define L2CR_L2CLK_DIV2 0x08000000 /* L2 clock / 2 */ -#define L2CR_L2CLK_DIV2_5 0x0a000000 /* L2 clock / 2.5 */ -#define L2CR_L2CLK_DIV3 0x0c000000 /* L2 clock / 3 */ -#define L2CR_L2RAM_MASK 0x01800000 /* L2 RAM type mask */ -#define L2CR_L2RAM_FLOW 0x00000000 /* L2 RAM flow through */ -#define L2CR_L2RAM_PIPE 0x01000000 /* L2 RAM pipelined */ -#define L2CR_L2RAM_PIPE_LW 0x01800000 /* L2 RAM pipelined latewr */ -#define L2CR_L2DO 0x00400000 /* L2 data only */ -#define L2CR_L2I 0x00200000 /* L2 global invalidate */ -#define L2CR_L2CTL 0x00100000 /* L2 RAM control */ -#define L2CR_L2WT 0x00080000 /* L2 write-through */ -#define L2CR_L2TS 0x00040000 /* L2 test support */ -#define L2CR_L2OH_MASK 0x00030000 /* L2 output hold mask */ -#define L2CR_L2OH_0_5 0x00000000 /* L2 output hold 0.5 ns */ -#define L2CR_L2OH_1_0 0x00010000 /* L2 output hold 1.0 ns */ -#define L2CR_L2SL 0x00008000 /* L2 DLL slow */ -#define L2CR_L2DF 0x00004000 /* L2 differential clock */ -#define L2CR_L2BYP 0x00002000 /* L2 DLL bypass */ -#define L2CR_L2IP 0x00000001 /* L2 GI in progress */ -#define L2CR_L2IO_745x 0x00100000 /* L2 instr. only (745x) */ -#define L2CR_L2DO_745x 0x00010000 /* L2 data only (745x) */ -#define L2CR_L2REP_745x 0x00001000 /* L2 repl. algorithm (745x) */ -#define L2CR_L2HWF_745x 0x00000800 /* L2 hardware flush (745x) */ -#define SPRN_L3CR 0x3FA /* Level 3 Cache Control Regsiter */ -#define L3CR_L3E 0x80000000 /* L3 enable */ -#define L3CR_L3PE 0x40000000 /* L3 data parity enable */ -#define L3CR_L3APE 0x20000000 /* L3 addr parity enable */ -#define L3CR_L3SIZ 0x10000000 /* L3 size */ -#define L3CR_L3CLKEN 0x08000000 /* L3 clock enable */ -#define L3CR_L3RES 0x04000000 /* L3 special reserved bit */ -#define L3CR_L3CLKDIV 0x03800000 /* L3 clock divisor */ -#define L3CR_L3IO 0x00400000 /* L3 instruction only */ -#define L3CR_L3SPO 0x00040000 /* L3 sample point override */ -#define L3CR_L3CKSP 0x00030000 /* L3 clock sample point */ -#define L3CR_L3PSP 0x0000e000 /* L3 P-clock sample point */ -#define L3CR_L3REP 0x00001000 /* L3 replacement algorithm */ -#define L3CR_L3HWF 0x00000800 /* L3 hardware flush */ -#define L3CR_L3I 0x00000400 /* L3 global invalidate */ -#define L3CR_L3RT 0x00000300 /* L3 SRAM type */ -#define L3CR_L3NIRCA 0x00000080 /* L3 non-integer ratio clock adj. */ -#define L3CR_L3DO 0x00000040 /* L3 data only mode */ -#define L3CR_PMEN 0x00000004 /* L3 private memory enable */ -#define L3CR_PMSIZ 0x00000001 /* L3 private memory size */ - -#define SPRN_MSSCR0 0x3f6 /* Memory Subsystem Control Register 0 */ -#define SPRN_MSSSR0 0x3f7 /* Memory Subsystem Status Register 1 */ -#define SPRN_LDSTCR 0x3f8 /* Load/Store control register */ -#define SPRN_LDSTDB 0x3f4 /* */ -#define SPRN_LR 0x008 /* Link Register */ -#ifndef SPRN_PIR -#define SPRN_PIR 0x3FF /* Processor Identification Register */ -#endif -#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */ -#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */ -#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */ -#define SPRN_PVR 0x11F /* Processor Version Register */ -#define SPRN_RPA 0x3D6 /* Required Physical Address Register */ -#define SPRN_SDA 0x3BF /* Sampled Data Address Register */ -#define SPRN_SDR1 0x019 /* MMU Hash Base Register */ -#define SPRN_ASR 0x118 /* Address Space Register */ -#define SPRN_SIA 0x3BB /* Sampled Instruction Address Register */ -#define SPRN_SPRG0 0x110 /* Special Purpose Register General 0 */ -#define SPRN_SPRG1 0x111 /* Special Purpose Register General 1 */ -#define SPRN_SPRG2 0x112 /* Special Purpose Register General 2 */ -#define SPRN_SPRG3 0x113 /* Special Purpose Register General 3 */ -#define SPRN_SPRG4 0x114 /* Special Purpose Register General 4 */ -#define SPRN_SPRG5 0x115 /* Special Purpose Register General 5 */ -#define SPRN_SPRG6 0x116 /* Special Purpose Register General 6 */ -#define SPRN_SPRG7 0x117 /* Special Purpose Register General 7 */ -#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */ -#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */ -#define SRR1_WAKEMASK 0x00380000 /* reason for wakeup */ -#define SRR1_WAKERESET 0x00380000 /* System reset */ -#define SRR1_WAKESYSERR 0x00300000 /* System error */ -#define SRR1_WAKEEE 0x00200000 /* External interrupt */ -#define SRR1_WAKEMT 0x00280000 /* mtctrl */ -#define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ -#define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */ -#define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ -#define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ - -#define SPRN_TBCTL 0x35f /* PA6T Timebase control register */ -#define TBCTL_FREEZE 0x0000000000000000ull /* Freeze all tbs */ -#define TBCTL_RESTART 0x0000000100000000ull /* Restart all tbs */ -#define TBCTL_UPDATE_UPPER 0x0000000200000000ull /* Set upper 32 bits */ -#define TBCTL_UPDATE_LOWER 0x0000000300000000ull /* Set lower 32 bits */ - -#ifndef SPRN_SVR -#define SPRN_SVR 0x11E /* System Version Register */ -#endif -#define SPRN_THRM1 0x3FC /* Thermal Management Register 1 */ -/* these bits were defined in inverted endian sense originally, ugh, confusing */ -#define THRM1_TIN (1 << 31) -#define THRM1_TIV (1 << 30) -#define THRM1_THRES(x) ((x&0x7f)<<23) -#define THRM3_SITV(x) ((x&0x3fff)<<1) -#define THRM1_TID (1<<2) -#define THRM1_TIE (1<<1) -#define THRM1_V (1<<0) -#define SPRN_THRM2 0x3FD /* Thermal Management Register 2 */ -#define SPRN_THRM3 0x3FE /* Thermal Management Register 3 */ -#define THRM3_E (1<<0) -#define SPRN_TLBMISS 0x3D4 /* 980 7450 TLB Miss Register */ -#define SPRN_UMMCR0 0x3A8 /* User Monitor Mode Control Register 0 */ -#define SPRN_UMMCR1 0x3AC /* User Monitor Mode Control Register 0 */ -#define SPRN_UPMC1 0x3A9 /* User Performance Counter Register 1 */ -#define SPRN_UPMC2 0x3AA /* User Performance Counter Register 2 */ -#define SPRN_UPMC3 0x3AD /* User Performance Counter Register 3 */ -#define SPRN_UPMC4 0x3AE /* User Performance Counter Register 4 */ -#define SPRN_USIA 0x3AB /* User Sampled Instruction Address Register */ -#define SPRN_VRSAVE 0x100 /* Vector Register Save Register */ -#define SPRN_XER 0x001 /* Fixed Point Exception Register */ - -#define SPRN_SCOMC 0x114 /* SCOM Access Control */ -#define SPRN_SCOMD 0x115 /* SCOM Access DATA */ - -/* Performance monitor SPRs */ -#ifdef CONFIG_PPC64 -#define SPRN_MMCR0 795 -#define MMCR0_FC 0x80000000UL /* freeze counters */ -#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ -#define MMCR0_KERNEL_DISABLE MMCR0_FCS -#define MMCR0_FCP 0x20000000UL /* freeze in problem state */ -#define MMCR0_PROBLEM_DISABLE MMCR0_FCP -#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ -#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ -#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ -#define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ -#define MMCR0_TBEE 0x00400000UL /* time base exception enable */ -#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ -#define MMCR0_PMCjCE 0x00004000UL /* PMCj count enable*/ -#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ -#define MMCR0_PMAO 0x00000080UL /* performance monitor alert has occurred, set to 0 after handling exception */ -#define MMCR0_SHRFC 0x00000040UL /* SHRre freeze conditions between threads */ -#define MMCR0_FCTI 0x00000008UL /* freeze counters in tags inactive mode */ -#define MMCR0_FCTA 0x00000004UL /* freeze counters in tags active mode */ -#define MMCR0_FCWAIT 0x00000002UL /* freeze counter in WAIT state */ -#define MMCR0_FCHV 0x00000001UL /* freeze conditions in hypervisor mode */ -#define SPRN_MMCR1 798 -#define SPRN_MMCRA 0x312 -#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ -#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ -#define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */ -#define MMCRA_SLOT_SHIFT 24 -#define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ -#define POWER6_MMCRA_SIHV 0x0000040000000000ULL -#define POWER6_MMCRA_SIPR 0x0000020000000000ULL -#define POWER6_MMCRA_THRM 0x00000020UL -#define POWER6_MMCRA_OTHER 0x0000000EUL -#define SPRN_PMC1 787 -#define SPRN_PMC2 788 -#define SPRN_PMC3 789 -#define SPRN_PMC4 790 -#define SPRN_PMC5 791 -#define SPRN_PMC6 792 -#define SPRN_PMC7 793 -#define SPRN_PMC8 794 -#define SPRN_SIAR 780 -#define SPRN_SDAR 781 - -#define SPRN_PA6T_MMCR0 795 -#define PA6T_MMCR0_EN0 0x0000000000000001UL -#define PA6T_MMCR0_EN1 0x0000000000000002UL -#define PA6T_MMCR0_EN2 0x0000000000000004UL -#define PA6T_MMCR0_EN3 0x0000000000000008UL -#define PA6T_MMCR0_EN4 0x0000000000000010UL -#define PA6T_MMCR0_EN5 0x0000000000000020UL -#define PA6T_MMCR0_SUPEN 0x0000000000000040UL -#define PA6T_MMCR0_PREN 0x0000000000000080UL -#define PA6T_MMCR0_HYPEN 0x0000000000000100UL -#define PA6T_MMCR0_FCM0 0x0000000000000200UL -#define PA6T_MMCR0_FCM1 0x0000000000000400UL -#define PA6T_MMCR0_INTGEN 0x0000000000000800UL -#define PA6T_MMCR0_INTEN0 0x0000000000001000UL -#define PA6T_MMCR0_INTEN1 0x0000000000002000UL -#define PA6T_MMCR0_INTEN2 0x0000000000004000UL -#define PA6T_MMCR0_INTEN3 0x0000000000008000UL -#define PA6T_MMCR0_INTEN4 0x0000000000010000UL -#define PA6T_MMCR0_INTEN5 0x0000000000020000UL -#define PA6T_MMCR0_DISCNT 0x0000000000040000UL -#define PA6T_MMCR0_UOP 0x0000000000080000UL -#define PA6T_MMCR0_TRG 0x0000000000100000UL -#define PA6T_MMCR0_TRGEN 0x0000000000200000UL -#define PA6T_MMCR0_TRGREG 0x0000000001600000UL -#define PA6T_MMCR0_SIARLOG 0x0000000002000000UL -#define PA6T_MMCR0_SDARLOG 0x0000000004000000UL -#define PA6T_MMCR0_PROEN 0x0000000008000000UL -#define PA6T_MMCR0_PROLOG 0x0000000010000000UL -#define PA6T_MMCR0_DAMEN2 0x0000000020000000UL -#define PA6T_MMCR0_DAMEN3 0x0000000040000000UL -#define PA6T_MMCR0_DAMEN4 0x0000000080000000UL -#define PA6T_MMCR0_DAMEN5 0x0000000100000000UL -#define PA6T_MMCR0_DAMSEL2 0x0000000200000000UL -#define PA6T_MMCR0_DAMSEL3 0x0000000400000000UL -#define PA6T_MMCR0_DAMSEL4 0x0000000800000000UL -#define PA6T_MMCR0_DAMSEL5 0x0000001000000000UL -#define PA6T_MMCR0_HANDDIS 0x0000002000000000UL -#define PA6T_MMCR0_PCTEN 0x0000004000000000UL -#define PA6T_MMCR0_SOCEN 0x0000008000000000UL -#define PA6T_MMCR0_SOCMOD 0x0000010000000000UL - -#define SPRN_PA6T_MMCR1 798 -#define PA6T_MMCR1_ES2 0x00000000000000ffUL -#define PA6T_MMCR1_ES3 0x000000000000ff00UL -#define PA6T_MMCR1_ES4 0x0000000000ff0000UL -#define PA6T_MMCR1_ES5 0x00000000ff000000UL - -#define SPRN_PA6T_UPMC0 771 /* User PerfMon Counter 0 */ -#define SPRN_PA6T_UPMC1 772 /* ... */ -#define SPRN_PA6T_UPMC2 773 -#define SPRN_PA6T_UPMC3 774 -#define SPRN_PA6T_UPMC4 775 -#define SPRN_PA6T_UPMC5 776 -#define SPRN_PA6T_UMMCR0 779 /* User Monitor Mode Control Register 0 */ -#define SPRN_PA6T_SIAR 780 /* Sampled Instruction Address */ -#define SPRN_PA6T_UMMCR1 782 /* User Monitor Mode Control Register 1 */ -#define SPRN_PA6T_SIER 785 /* Sampled Instruction Event Register */ -#define SPRN_PA6T_PMC0 787 -#define SPRN_PA6T_PMC1 788 -#define SPRN_PA6T_PMC2 789 -#define SPRN_PA6T_PMC3 790 -#define SPRN_PA6T_PMC4 791 -#define SPRN_PA6T_PMC5 792 -#define SPRN_PA6T_TSR0 793 /* Timestamp Register 0 */ -#define SPRN_PA6T_TSR1 794 /* Timestamp Register 1 */ -#define SPRN_PA6T_TSR2 799 /* Timestamp Register 2 */ -#define SPRN_PA6T_TSR3 784 /* Timestamp Register 3 */ - -#define SPRN_PA6T_IER 981 /* Icache Error Register */ -#define SPRN_PA6T_DER 982 /* Dcache Error Register */ -#define SPRN_PA6T_BER 862 /* BIU Error Address Register */ -#define SPRN_PA6T_MER 849 /* MMU Error Register */ - -#define SPRN_PA6T_IMA0 880 /* Instruction Match Array 0 */ -#define SPRN_PA6T_IMA1 881 /* ... */ -#define SPRN_PA6T_IMA2 882 -#define SPRN_PA6T_IMA3 883 -#define SPRN_PA6T_IMA4 884 -#define SPRN_PA6T_IMA5 885 -#define SPRN_PA6T_IMA6 886 -#define SPRN_PA6T_IMA7 887 -#define SPRN_PA6T_IMA8 888 -#define SPRN_PA6T_IMA9 889 -#define SPRN_PA6T_BTCR 978 /* Breakpoint and Tagging Control Register */ -#define SPRN_PA6T_IMAAT 979 /* Instruction Match Array Action Table */ -#define SPRN_PA6T_PCCR 1019 /* Power Counter Control Register */ -#define SPRN_BKMK 1020 /* Cell Bookmark Register */ -#define SPRN_PA6T_RPCCR 1021 /* Retire PC Trace Control Register */ - - -#else /* 32-bit */ -#define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */ -#define MMCR0_FC 0x80000000UL /* freeze counters */ -#define MMCR0_FCS 0x40000000UL /* freeze in supervisor state */ -#define MMCR0_FCP 0x20000000UL /* freeze in problem state */ -#define MMCR0_FCM1 0x10000000UL /* freeze counters while MSR mark = 1 */ -#define MMCR0_FCM0 0x08000000UL /* freeze counters while MSR mark = 0 */ -#define MMCR0_PMXE 0x04000000UL /* performance monitor exception enable */ -#define MMCR0_FCECE 0x02000000UL /* freeze ctrs on enabled cond or event */ -#define MMCR0_TBEE 0x00400000UL /* time base exception enable */ -#define MMCR0_PMC1CE 0x00008000UL /* PMC1 count enable*/ -#define MMCR0_PMCnCE 0x00004000UL /* count enable for all but PMC 1*/ -#define MMCR0_TRIGGER 0x00002000UL /* TRIGGER enable */ -#define MMCR0_PMC1SEL 0x00001fc0UL /* PMC 1 Event */ -#define MMCR0_PMC2SEL 0x0000003fUL /* PMC 2 Event */ - -#define SPRN_MMCR1 956 -#define MMCR1_PMC3SEL 0xf8000000UL /* PMC 3 Event */ -#define MMCR1_PMC4SEL 0x07c00000UL /* PMC 4 Event */ -#define MMCR1_PMC5SEL 0x003e0000UL /* PMC 5 Event */ -#define MMCR1_PMC6SEL 0x0001f800UL /* PMC 6 Event */ -#define SPRN_MMCR2 944 -#define SPRN_PMC1 953 /* Performance Counter Register 1 */ -#define SPRN_PMC2 954 /* Performance Counter Register 2 */ -#define SPRN_PMC3 957 /* Performance Counter Register 3 */ -#define SPRN_PMC4 958 /* Performance Counter Register 4 */ -#define SPRN_PMC5 945 /* Performance Counter Register 5 */ -#define SPRN_PMC6 946 /* Performance Counter Register 6 */ - -#define SPRN_SIAR 955 /* Sampled Instruction Address Register */ - -/* Bit definitions for MMCR0 and PMC1 / PMC2. */ -#define MMCR0_PMC1_CYCLES (1 << 7) -#define MMCR0_PMC1_ICACHEMISS (5 << 7) -#define MMCR0_PMC1_DTLB (6 << 7) -#define MMCR0_PMC2_DCACHEMISS 0x6 -#define MMCR0_PMC2_CYCLES 0x1 -#define MMCR0_PMC2_ITLB 0x7 -#define MMCR0_PMC2_LOADMISSTIME 0x5 -#endif - -/* - * An mtfsf instruction with the L bit set. On CPUs that support this a - * full 64bits of FPSCR is restored and on other CPUs the L bit is ignored. - * - * Until binutils gets the new form of mtfsf, hardwire the instruction. - */ -#ifdef CONFIG_PPC64 -#define MTFSF_L(REG) \ - .long (0xfc00058e | ((0xff) << 17) | ((REG) << 11) | (1 << 25)) -#else -#define MTFSF_L(REG) mtfsf 0xff, (REG) -#endif - -/* Processor Version Register (PVR) field extraction */ - -#define PVR_VER(pvr) (((pvr) >> 16) & 0xFFFF) /* Version field */ -#define PVR_REV(pvr) (((pvr) >> 0) & 0xFFFF) /* Revison field */ - -#define __is_processor(pv) (PVR_VER(mfspr(SPRN_PVR)) == (pv)) - -/* - * IBM has further subdivided the standard PowerPC 16-bit version and - * revision subfields of the PVR for the PowerPC 403s into the following: - */ - -#define PVR_FAM(pvr) (((pvr) >> 20) & 0xFFF) /* Family field */ -#define PVR_MEM(pvr) (((pvr) >> 16) & 0xF) /* Member field */ -#define PVR_CORE(pvr) (((pvr) >> 12) & 0xF) /* Core field */ -#define PVR_CFG(pvr) (((pvr) >> 8) & 0xF) /* Configuration field */ -#define PVR_MAJ(pvr) (((pvr) >> 4) & 0xF) /* Major revision field */ -#define PVR_MIN(pvr) (((pvr) >> 0) & 0xF) /* Minor revision field */ - -/* Processor Version Numbers */ - -#define PVR_403GA 0x00200000 -#define PVR_403GB 0x00200100 -#define PVR_403GC 0x00200200 -#define PVR_403GCX 0x00201400 -#define PVR_405GP 0x40110000 -#define PVR_STB03XXX 0x40310000 -#define PVR_NP405H 0x41410000 -#define PVR_NP405L 0x41610000 -#define PVR_601 0x00010000 -#define PVR_602 0x00050000 -#define PVR_603 0x00030000 -#define PVR_603e 0x00060000 -#define PVR_603ev 0x00070000 -#define PVR_603r 0x00071000 -#define PVR_604 0x00040000 -#define PVR_604e 0x00090000 -#define PVR_604r 0x000A0000 -#define PVR_620 0x00140000 -#define PVR_740 0x00080000 -#define PVR_750 PVR_740 -#define PVR_740P 0x10080000 -#define PVR_750P PVR_740P -#define PVR_7400 0x000C0000 -#define PVR_7410 0x800C0000 -#define PVR_7450 0x80000000 -#define PVR_8540 0x80200000 -#define PVR_8560 0x80200000 -/* - * For the 8xx processors, all of them report the same PVR family for - * the PowerPC core. The various versions of these processors must be - * differentiated by the version number in the Communication Processor - * Module (CPM). - */ -#define PVR_821 0x00500000 -#define PVR_823 PVR_821 -#define PVR_850 PVR_821 -#define PVR_860 PVR_821 -#define PVR_8240 0x00810100 -#define PVR_8245 0x80811014 -#define PVR_8260 PVR_8240 - -/* 64-bit processors */ -/* XXX the prefix should be PVR_, we'll do a global sweep to fix it one day */ -#define PV_NORTHSTAR 0x0033 -#define PV_PULSAR 0x0034 -#define PV_POWER4 0x0035 -#define PV_ICESTAR 0x0036 -#define PV_SSTAR 0x0037 -#define PV_POWER4p 0x0038 -#define PV_970 0x0039 -#define PV_POWER5 0x003A -#define PV_POWER5p 0x003B -#define PV_970FX 0x003C -#define PV_630 0x0040 -#define PV_630p 0x0041 -#define PV_970MP 0x0044 -#define PV_970GX 0x0045 -#define PV_BE 0x0070 -#define PV_PA6T 0x0090 - -/* Macros for setting and retrieving special purpose registers */ -#ifndef __ASSEMBLY__ -#define mfmsr() ({unsigned long rval; \ - asm volatile("mfmsr %0" : "=r" (rval)); rval;}) -#ifdef CONFIG_PPC64 -#define __mtmsrd(v, l) asm volatile("mtmsrd %0," __stringify(l) \ - : : "r" (v)) -#define mtmsrd(v) __mtmsrd((v), 0) -#define mtmsr(v) mtmsrd(v) -#else -#define mtmsr(v) asm volatile("mtmsr %0" : : "r" (v)) -#endif - -#define mfspr(rn) ({unsigned long rval; \ - asm volatile("mfspr %0," __stringify(rn) \ - : "=r" (rval)); rval;}) -#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) - -#ifdef __powerpc64__ -#ifdef CONFIG_PPC_CELL -#define mftb() ({unsigned long rval; \ - asm volatile( \ - "90: mftb %0;\n" \ - "97: cmpwi %0,0;\n" \ - " beq- 90b;\n" \ - "99:\n" \ - ".section __ftr_fixup,\"a\"\n" \ - ".align 3\n" \ - "98:\n" \ - " .llong %1\n" \ - " .llong %1\n" \ - " .llong 97b-98b\n" \ - " .llong 99b-98b\n" \ - " .llong 0\n" \ - " .llong 0\n" \ - ".previous" \ - : "=r" (rval) : "i" (CPU_FTR_CELL_TB_BUG)); rval;}) -#else -#define mftb() ({unsigned long rval; \ - asm volatile("mftb %0" : "=r" (rval)); rval;}) -#endif /* !CONFIG_PPC_CELL */ - -#else /* __powerpc64__ */ - -#define mftbl() ({unsigned long rval; \ - asm volatile("mftbl %0" : "=r" (rval)); rval;}) -#define mftbu() ({unsigned long rval; \ - asm volatile("mftbu %0" : "=r" (rval)); rval;}) -#endif /* !__powerpc64__ */ - -#define mttbl(v) asm volatile("mttbl %0":: "r"(v)) -#define mttbu(v) asm volatile("mttbu %0":: "r"(v)) - -#ifdef CONFIG_PPC32 -#define mfsrin(v) ({unsigned int rval; \ - asm volatile("mfsrin %0,%1" : "=r" (rval) : "r" (v)); \ - rval;}) -#endif - -#define proc_trap() asm volatile("trap") - -#ifdef CONFIG_PPC64 - -extern void ppc64_runlatch_on(void); -extern void ppc64_runlatch_off(void); - -extern unsigned long scom970_read(unsigned int address); -extern void scom970_write(unsigned int address, unsigned long value); - -#else -#define ppc64_runlatch_on() -#define ppc64_runlatch_off() - -#endif /* CONFIG_PPC64 */ - -#define __get_SP() ({unsigned long sp; \ - asm volatile("mr %0,1": "=r" (sp)); sp;}) - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_REG_H */ diff --git a/include/asm-powerpc/reg_8xx.h b/include/asm-powerpc/reg_8xx.h deleted file mode 100644 index e8ea346..0000000 --- a/include/asm-powerpc/reg_8xx.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Contains register definitions common to PowerPC 8xx CPUs. Notice - */ -#ifndef _ASM_POWERPC_REG_8xx_H -#define _ASM_POWERPC_REG_8xx_H - -/* Cache control on the MPC8xx is provided through some additional - * special purpose registers. - */ -#define SPRN_IC_CST 560 /* Instruction cache control/status */ -#define SPRN_IC_ADR 561 /* Address needed for some commands */ -#define SPRN_IC_DAT 562 /* Read-only data register */ -#define SPRN_DC_CST 568 /* Data cache control/status */ -#define SPRN_DC_ADR 569 /* Address needed for some commands */ -#define SPRN_DC_DAT 570 /* Read-only data register */ - -/* Commands. Only the first few are available to the instruction cache. -*/ -#define IDC_ENABLE 0x02000000 /* Cache enable */ -#define IDC_DISABLE 0x04000000 /* Cache disable */ -#define IDC_LDLCK 0x06000000 /* Load and lock */ -#define IDC_UNLINE 0x08000000 /* Unlock line */ -#define IDC_UNALL 0x0a000000 /* Unlock all */ -#define IDC_INVALL 0x0c000000 /* Invalidate all */ - -#define DC_FLINE 0x0e000000 /* Flush data cache line */ -#define DC_SFWT 0x01000000 /* Set forced writethrough mode */ -#define DC_CFWT 0x03000000 /* Clear forced writethrough mode */ -#define DC_SLES 0x05000000 /* Set little endian swap mode */ -#define DC_CLES 0x07000000 /* Clear little endian swap mode */ - -/* Status. -*/ -#define IDC_ENABLED 0x80000000 /* Cache is enabled */ -#define IDC_CERR1 0x00200000 /* Cache error 1 */ -#define IDC_CERR2 0x00100000 /* Cache error 2 */ -#define IDC_CERR3 0x00080000 /* Cache error 3 */ - -#define DC_DFWT 0x40000000 /* Data cache is forced write through */ -#define DC_LES 0x20000000 /* Caches are little endian mode */ - -#endif /* _ASM_POWERPC_REG_8xx_H */ diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h deleted file mode 100644 index be980f4..0000000 --- a/include/asm-powerpc/reg_booke.h +++ /dev/null @@ -1,501 +0,0 @@ -/* - * Contains register definitions common to the Book E PowerPC - * specification. Notice that while the IBM-40x series of CPUs - * are not true Book E PowerPCs, they borrowed a number of features - * before Book E was finalized, and are included here as well. Unfortunatly, - * they sometimes used different locations than true Book E CPUs did. - */ -#ifdef __KERNEL__ -#ifndef __ASM_POWERPC_REG_BOOKE_H__ -#define __ASM_POWERPC_REG_BOOKE_H__ - -/* Machine State Register (MSR) Fields */ -#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ -#define MSR_SPE (1<<25) /* Enable SPE */ -#define MSR_DWE (1<<10) /* Debug Wait Enable */ -#define MSR_UBLE (1<<10) /* BTB lock enable (e500) */ -#define MSR_IS MSR_IR /* Instruction Space */ -#define MSR_DS MSR_DR /* Data Space */ -#define MSR_PMM (1<<2) /* Performance monitor mark bit */ - -/* Default MSR for kernel mode. */ -#if defined (CONFIG_40x) -#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) -#elif defined(CONFIG_BOOKE) -#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE) -#endif - -/* Special Purpose Registers (SPRNs)*/ -#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */ -#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */ -#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */ -#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */ -#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */ -#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */ -#define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */ -#define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */ -#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */ -#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */ -#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */ -#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */ -#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */ -#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */ -#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */ -#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */ -#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */ -#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */ -#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */ -#define SPRN_IVOR3 0x193 /* Interrupt Vector Offset Register 3 */ -#define SPRN_IVOR4 0x194 /* Interrupt Vector Offset Register 4 */ -#define SPRN_IVOR5 0x195 /* Interrupt Vector Offset Register 5 */ -#define SPRN_IVOR6 0x196 /* Interrupt Vector Offset Register 6 */ -#define SPRN_IVOR7 0x197 /* Interrupt Vector Offset Register 7 */ -#define SPRN_IVOR8 0x198 /* Interrupt Vector Offset Register 8 */ -#define SPRN_IVOR9 0x199 /* Interrupt Vector Offset Register 9 */ -#define SPRN_IVOR10 0x19A /* Interrupt Vector Offset Register 10 */ -#define SPRN_IVOR11 0x19B /* Interrupt Vector Offset Register 11 */ -#define SPRN_IVOR12 0x19C /* Interrupt Vector Offset Register 12 */ -#define SPRN_IVOR13 0x19D /* Interrupt Vector Offset Register 13 */ -#define SPRN_IVOR14 0x19E /* Interrupt Vector Offset Register 14 */ -#define SPRN_IVOR15 0x19F /* Interrupt Vector Offset Register 15 */ -#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */ -#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */ -#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */ -#define SPRN_L1CFG0 0x203 /* L1 Cache Configure Register 0 */ -#define SPRN_L1CFG1 0x204 /* L1 Cache Configure Register 1 */ -#define SPRN_ATB 0x20E /* Alternate Time Base */ -#define SPRN_ATBL 0x20E /* Alternate Time Base Lower */ -#define SPRN_ATBU 0x20F /* Alternate Time Base Upper */ -#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */ -#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */ -#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */ -#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */ -#define SPRN_IVOR36 0x214 /* Interrupt Vector Offset Register 36 */ -#define SPRN_IVOR37 0x215 /* Interrupt Vector Offset Register 37 */ -#define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */ -#define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */ -#define SPRN_MCSR 0x23C /* Machine Check Status Register */ -#define SPRN_MCAR 0x23D /* Machine Check Address Register */ -#define SPRN_DSRR0 0x23E /* Debug Save and Restore Register 0 */ -#define SPRN_DSRR1 0x23F /* Debug Save and Restore Register 1 */ -#define SPRN_SPRG8 0x25C /* Special Purpose Register General 8 */ -#define SPRN_SPRG9 0x25D /* Special Purpose Register General 9 */ -#define SPRN_L1CSR2 0x25E /* L1 Cache Control and Status Register 2 */ -#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */ -#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */ -#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */ -#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */ -#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */ -#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */ -#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */ -#define SPRN_PID1 0x279 /* Process ID Register 1 */ -#define SPRN_PID2 0x27A /* Process ID Register 2 */ -#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */ -#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */ -#define SPRN_EPR 0x2BE /* External Proxy Register */ -#define SPRN_CCR1 0x378 /* Core Configuration Register 1 */ -#define SPRN_ZPR 0x3B0 /* Zone Protection Register (40x) */ -#define SPRN_MAS7 0x3B0 /* MMU Assist Register 7 */ -#define SPRN_MMUCR 0x3B2 /* MMU Control Register */ -#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */ -#define SPRN_EPLC 0x3B3 /* External Process ID Load Context */ -#define SPRN_EPSC 0x3B4 /* External Process ID Store Context */ -#define SPRN_SGR 0x3B9 /* Storage Guarded Register */ -#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */ -#define SPRN_SLER 0x3BB /* Little-endian real mode */ -#define SPRN_SU0R 0x3BC /* "User 0" real mode (40x) */ -#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */ -#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */ -#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */ -#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */ -#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */ -#define SPRN_PIT 0x3DB /* Programmable Interval Timer */ -#define SPRN_BUCSR 0x3F5 /* Branch Unit Control and Status */ -#define SPRN_L2CSR0 0x3F9 /* L2 Data Cache Control and Status Register 0 */ -#define SPRN_L2CSR1 0x3FA /* L2 Data Cache Control and Status Register 1 */ -#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */ -#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */ -#define SPRN_SVR 0x3FF /* System Version Register */ - -/* - * SPRs which have conflicting definitions on true Book E versus classic, - * or IBM 40x. - */ -#ifdef CONFIG_BOOKE -#define SPRN_PID 0x030 /* Process ID */ -#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */ -#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */ -#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */ -#define SPRN_DEAR 0x03D /* Data Error Address Register */ -#define SPRN_ESR 0x03E /* Exception Syndrome Register */ -#define SPRN_PIR 0x11E /* Processor Identification Register */ -#define SPRN_DBSR 0x130 /* Debug Status Register */ -#define SPRN_DBCR0 0x134 /* Debug Control Register 0 */ -#define SPRN_DBCR1 0x135 /* Debug Control Register 1 */ -#define SPRN_IAC1 0x138 /* Instruction Address Compare 1 */ -#define SPRN_IAC2 0x139 /* Instruction Address Compare 2 */ -#define SPRN_DAC1 0x13C /* Data Address Compare 1 */ -#define SPRN_DAC2 0x13D /* Data Address Compare 2 */ -#define SPRN_TSR 0x150 /* Timer Status Register */ -#define SPRN_TCR 0x154 /* Timer Control Register */ -#endif /* Book E */ -#ifdef CONFIG_40x -#define SPRN_PID 0x3B1 /* Process ID */ -#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */ -#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */ -#define SPRN_DEAR 0x3D5 /* Data Error Address Register */ -#define SPRN_TSR 0x3D8 /* Timer Status Register */ -#define SPRN_TCR 0x3DA /* Timer Control Register */ -#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */ -#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */ -#define SPRN_DBSR 0x3F0 /* Debug Status Register */ -#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */ -#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */ -#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */ -#define SPRN_CSRR0 SPRN_SRR2 /* Critical Save and Restore Register 0 */ -#define SPRN_CSRR1 SPRN_SRR3 /* Critical Save and Restore Register 1 */ -#endif - -/* Bit definitions for CCR1. */ -#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ -#define CCR1_TCS 0x00000080 /* Timer Clock Select */ - -/* Bit definitions for the MCSR. */ -#define MCSR_MCS 0x80000000 /* Machine Check Summary */ -#define MCSR_IB 0x40000000 /* Instruction PLB Error */ -#define MCSR_DRB 0x20000000 /* Data Read PLB Error */ -#define MCSR_DWB 0x10000000 /* Data Write PLB Error */ -#define MCSR_TLBP 0x08000000 /* TLB Parity Error */ -#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */ -#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */ -#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */ -#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */ - -#ifdef CONFIG_E500 -#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ -#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */ -#define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */ -#define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */ -#define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */ -#define MCSR_BUS_RAERR 0x00000040UL /* Read Address Error */ -#define MCSR_BUS_WAERR 0x00000020UL /* Write Address Error */ -#define MCSR_BUS_IBERR 0x00000010UL /* Instruction Data Error */ -#define MCSR_BUS_RBERR 0x00000008UL /* Read Data Bus Error */ -#define MCSR_BUS_WBERR 0x00000004UL /* Write Data Bus Error */ -#define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */ -#define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */ - -/* e500 parts may set unused bits in MCSR; mask these off */ -#define MCSR_MASK (MCSR_MCP | MCSR_ICPERR | MCSR_DCP_PERR | \ - MCSR_DCPERR | MCSR_BUS_IAERR | MCSR_BUS_RAERR | \ - MCSR_BUS_WAERR | MCSR_BUS_IBERR | MCSR_BUS_RBERR | \ - MCSR_BUS_WBERR | MCSR_BUS_IPERR | MCSR_BUS_RPERR) -#endif -#ifdef CONFIG_E200 -#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */ -#define MCSR_CP_PERR 0x20000000UL /* Cache Push Parity Error */ -#define MCSR_CPERR 0x10000000UL /* Cache Parity Error */ -#define MCSR_EXCP_ERR 0x08000000UL /* ISI, ITLB, or Bus Error on 1st insn - fetch for an exception handler */ -#define MCSR_BUS_IRERR 0x00000010UL /* Read Bus Error on instruction fetch*/ -#define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */ -#define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered - store or cache line push */ - -/* e200 parts may set unused bits in MCSR; mask these off */ -#define MCSR_MASK (MCSR_MCP | MCSR_CP_PERR | MCSR_CPERR | \ - MCSR_EXCP_ERR | MCSR_BUS_IRERR | MCSR_BUS_DRERR | \ - MCSR_BUS_WRERR) -#endif - -/* Bit definitions for the DBSR. */ -/* - * DBSR bits which have conflicting definitions on true Book E versus IBM 40x. - */ -#ifdef CONFIG_BOOKE -#define DBSR_IC 0x08000000 /* Instruction Completion */ -#define DBSR_BT 0x04000000 /* Branch Taken */ -#define DBSR_IRPT 0x02000000 /* Exception Debug Event */ -#define DBSR_TIE 0x01000000 /* Trap Instruction Event */ -#define DBSR_IAC1 0x00800000 /* Instr Address Compare 1 Event */ -#define DBSR_IAC2 0x00400000 /* Instr Address Compare 2 Event */ -#define DBSR_IAC3 0x00200000 /* Instr Address Compare 3 Event */ -#define DBSR_IAC4 0x00100000 /* Instr Address Compare 4 Event */ -#define DBSR_DAC1R 0x00080000 /* Data Addr Compare 1 Read Event */ -#define DBSR_DAC1W 0x00040000 /* Data Addr Compare 1 Write Event */ -#define DBSR_DAC2R 0x00020000 /* Data Addr Compare 2 Read Event */ -#define DBSR_DAC2W 0x00010000 /* Data Addr Compare 2 Write Event */ -#define DBSR_RET 0x00008000 /* Return Debug Event */ -#define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */ -#define DBSR_CRET 0x00000020 /* Critical Return Debug Event */ -#endif -#ifdef CONFIG_40x -#define DBSR_IC 0x80000000 /* Instruction Completion */ -#define DBSR_BT 0x40000000 /* Branch taken */ -#define DBSR_IRPT 0x20000000 /* Exception Debug Event */ -#define DBSR_TIE 0x10000000 /* Trap Instruction debug Event */ -#define DBSR_IAC1 0x04000000 /* Instruction Address Compare 1 Event */ -#define DBSR_IAC2 0x02000000 /* Instruction Address Compare 2 Event */ -#define DBSR_IAC3 0x00080000 /* Instruction Address Compare 3 Event */ -#define DBSR_IAC4 0x00040000 /* Instruction Address Compare 4 Event */ -#define DBSR_DAC1R 0x01000000 /* Data Address Compare 1 Read Event */ -#define DBSR_DAC1W 0x00800000 /* Data Address Compare 1 Write Event */ -#define DBSR_DAC2R 0x00400000 /* Data Address Compare 2 Read Event */ -#define DBSR_DAC2W 0x00200000 /* Data Address Compare 2 Write Event */ -#endif - -/* Bit definitions related to the ESR. */ -#define ESR_MCI 0x80000000 /* Machine Check - Instruction */ -#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */ -#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */ -#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */ -#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */ -#define ESR_PIL 0x08000000 /* Program Exception - Illegal */ -#define ESR_PPR 0x04000000 /* Program Exception - Privileged */ -#define ESR_PTR 0x02000000 /* Program Exception - Trap */ -#define ESR_FP 0x01000000 /* Floating Point Operation */ -#define ESR_DST 0x00800000 /* Storage Exception - Data miss */ -#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */ -#define ESR_ST 0x00800000 /* Store Operation */ -#define ESR_DLK 0x00200000 /* Data Cache Locking */ -#define ESR_ILK 0x00100000 /* Instr. Cache Locking */ -#define ESR_PUO 0x00040000 /* Unimplemented Operation exception */ -#define ESR_BO 0x00020000 /* Byte Ordering */ - -/* Bit definitions related to the DBCR0. */ -#if defined(CONFIG_40x) -#define DBCR0_EDM 0x80000000 /* External Debug Mode */ -#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ -#define DBCR0_RST 0x30000000 /* all the bits in the RST field */ -#define DBCR0_RST_SYSTEM 0x30000000 /* System Reset */ -#define DBCR0_RST_CHIP 0x20000000 /* Chip Reset */ -#define DBCR0_RST_CORE 0x10000000 /* Core Reset */ -#define DBCR0_RST_NONE 0x00000000 /* No Reset */ -#define DBCR0_IC 0x08000000 /* Instruction Completion */ -#define DBCR0_ICMP DBCR0_IC -#define DBCR0_BT 0x04000000 /* Branch Taken */ -#define DBCR0_BRT DBCR0_BT -#define DBCR0_EDE 0x02000000 /* Exception Debug Event */ -#define DBCR0_IRPT DBCR0_EDE -#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */ -#define DBCR0_IA1 0x00800000 /* Instr Addr compare 1 enable */ -#define DBCR0_IAC1 DBCR0_IA1 -#define DBCR0_IA2 0x00400000 /* Instr Addr compare 2 enable */ -#define DBCR0_IAC2 DBCR0_IA2 -#define DBCR0_IA12 0x00200000 /* Instr Addr 1-2 range enable */ -#define DBCR0_IA12X 0x00100000 /* Instr Addr 1-2 range eXclusive */ -#define DBCR0_IA3 0x00080000 /* Instr Addr compare 3 enable */ -#define DBCR0_IAC3 DBCR0_IA3 -#define DBCR0_IA4 0x00040000 /* Instr Addr compare 4 enable */ -#define DBCR0_IAC4 DBCR0_IA4 -#define DBCR0_IA34 0x00020000 /* Instr Addr 3-4 range Enable */ -#define DBCR0_IA34X 0x00010000 /* Instr Addr 3-4 range eXclusive */ -#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */ -#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */ -#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ -#elif defined(CONFIG_BOOKE) -#define DBCR0_EDM 0x80000000 /* External Debug Mode */ -#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ -#define DBCR0_RST 0x30000000 /* all the bits in the RST field */ -/* DBCR0_RST_* is 44x specific and not followed in fsl booke */ -#define DBCR0_RST_SYSTEM 0x30000000 /* System Reset */ -#define DBCR0_RST_CHIP 0x20000000 /* Chip Reset */ -#define DBCR0_RST_CORE 0x10000000 /* Core Reset */ -#define DBCR0_RST_NONE 0x00000000 /* No Reset */ -#define DBCR0_ICMP 0x08000000 /* Instruction Completion */ -#define DBCR0_IC DBCR0_ICMP -#define DBCR0_BRT 0x04000000 /* Branch Taken */ -#define DBCR0_BT DBCR0_BRT -#define DBCR0_IRPT 0x02000000 /* Exception Debug Event */ -#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */ -#define DBCR0_TIE DBCR0_TDE -#define DBCR0_IAC1 0x00800000 /* Instr Addr compare 1 enable */ -#define DBCR0_IAC2 0x00400000 /* Instr Addr compare 2 enable */ -#define DBCR0_IAC3 0x00200000 /* Instr Addr compare 3 enable */ -#define DBCR0_IAC4 0x00100000 /* Instr Addr compare 4 enable */ -#define DBCR0_DAC1R 0x00080000 /* DAC 1 Read enable */ -#define DBCR0_DAC1W 0x00040000 /* DAC 1 Write enable */ -#define DBCR0_DAC2R 0x00020000 /* DAC 2 Read enable */ -#define DBCR0_DAC2W 0x00010000 /* DAC 2 Write enable */ -#define DBCR0_RET 0x00008000 /* Return Debug Event */ -#define DBCR0_CIRPT 0x00000040 /* Critical Interrupt Taken Event */ -#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */ -#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ - -/* Bit definitions related to the DBCR1. */ -#define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */ -#define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */ -#define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */ -#define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */ -#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */ -#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */ - -/* Bit definitions related to the DBCR2. */ -#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */ -#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */ -#define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */ -#endif - -/* Bit definitions related to the TCR. */ -#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ -#define TCR_WP_MASK TCR_WP(3) -#define WP_2_17 0 /* 2^17 clocks */ -#define WP_2_21 1 /* 2^21 clocks */ -#define WP_2_25 2 /* 2^25 clocks */ -#define WP_2_29 3 /* 2^29 clocks */ -#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */ -#define TCR_WRC_MASK TCR_WRC(3) -#define WRC_NONE 0 /* No reset will occur */ -#define WRC_CORE 1 /* Core reset will occur */ -#define WRC_CHIP 2 /* Chip reset will occur */ -#define WRC_SYSTEM 3 /* System reset will occur */ -#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */ -#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */ -#define TCR_DIE TCR_PIE /* DEC Interrupt Enable */ -#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */ -#define TCR_FP_MASK TCR_FP(3) -#define FP_2_9 0 /* 2^9 clocks */ -#define FP_2_13 1 /* 2^13 clocks */ -#define FP_2_17 2 /* 2^17 clocks */ -#define FP_2_21 3 /* 2^21 clocks */ -#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */ -#define TCR_ARE 0x00400000 /* Auto Reload Enable */ - -/* Bit definitions for the TSR. */ -#define TSR_ENW 0x80000000 /* Enable Next Watchdog */ -#define TSR_WIS 0x40000000 /* WDT Interrupt Status */ -#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */ -#define WRS_NONE 0 /* No WDT reset occurred */ -#define WRS_CORE 1 /* WDT forced core reset */ -#define WRS_CHIP 2 /* WDT forced chip reset */ -#define WRS_SYSTEM 3 /* WDT forced system reset */ -#define TSR_PIS 0x08000000 /* PIT Interrupt Status */ -#define TSR_DIS TSR_PIS /* DEC Interrupt Status */ -#define TSR_FIS 0x04000000 /* FIT Interrupt Status */ - -/* Bit definitions for the DCCR. */ -#define DCCR_NOCACHE 0 /* Noncacheable */ -#define DCCR_CACHE 1 /* Cacheable */ - -/* Bit definitions for DCWR. */ -#define DCWR_COPY 0 /* Copy-back */ -#define DCWR_WRITE 1 /* Write-through */ - -/* Bit definitions for ICCR. */ -#define ICCR_NOCACHE 0 /* Noncacheable */ -#define ICCR_CACHE 1 /* Cacheable */ - -/* Bit definitions for L1CSR0. */ -#define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ -#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ -#define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ -#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ - -/* Bit definitions for L1CSR1. */ -#define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ -#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ -#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ - -/* Bit definitions for L2CSR0. */ -#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */ -#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */ -#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */ -#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */ -#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */ -#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */ -#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */ -#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */ -#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */ -#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */ -#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */ -#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */ - -/* Bit definitions for SGR. */ -#define SGR_NORMAL 0 /* Speculative fetching allowed. */ -#define SGR_GUARDED 1 /* Speculative fetching disallowed. */ - -/* Bit definitions for SPEFSCR. */ -#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */ -#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */ -#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */ -#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */ -#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */ -#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */ -#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */ -#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */ -#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */ -#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */ -#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */ -#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */ -#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */ -#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */ -#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */ -#define SPEFSCR_OV 0x00004000 /* Integer overflow */ -#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */ -#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */ -#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */ -#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */ -#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */ -#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */ -#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */ -#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */ -#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */ -#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */ -#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */ -#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */ - -/* - * The IBM-403 is an even more odd special case, as it is much - * older than the IBM-405 series. We put these down here incase someone - * wishes to support these machines again. - */ -#ifdef CONFIG_403GCX -/* Special Purpose Registers (SPRNs)*/ -#define SPRN_TBHU 0x3CC /* Time Base High User-mode */ -#define SPRN_TBLU 0x3CD /* Time Base Low User-mode */ -#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */ -#define SPRN_TBHI 0x3DC /* Time Base High */ -#define SPRN_TBLO 0x3DD /* Time Base Low */ -#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */ -#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */ -#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */ -#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */ -#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */ - - -/* Bit definitions for the DBCR. */ -#define DBCR_EDM DBCR0_EDM -#define DBCR_IDM DBCR0_IDM -#define DBCR_RST(x) (((x) & 0x3) << 28) -#define DBCR_RST_NONE 0 -#define DBCR_RST_CORE 1 -#define DBCR_RST_CHIP 2 -#define DBCR_RST_SYSTEM 3 -#define DBCR_IC DBCR0_IC /* Instruction Completion Debug Evnt */ -#define DBCR_BT DBCR0_BT /* Branch Taken Debug Event */ -#define DBCR_EDE DBCR0_EDE /* Exception Debug Event */ -#define DBCR_TDE DBCR0_TDE /* TRAP Debug Event */ -#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */ -#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */ -#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */ -#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */ -#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */ -#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */ -#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */ -#define DAC_BYTE 0 -#define DAC_HALF 1 -#define DAC_WORD 2 -#define DAC_QUAD 3 -#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */ -#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */ -#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */ -#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */ -#define DBCR_SED 0x00000020 /* Second Exception Debug Event */ -#define DBCR_STD 0x00000010 /* Second Trap Debug Event */ -#define DBCR_SIA 0x00000008 /* Second IAC Enable */ -#define DBCR_SDA 0x00000004 /* Second DAC Enable */ -#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */ -#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */ -#endif /* 403GCX */ -#endif /* __ASM_POWERPC_REG_BOOKE_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/reg_fsl_emb.h b/include/asm-powerpc/reg_fsl_emb.h deleted file mode 100644 index 1e180a5..0000000 --- a/include/asm-powerpc/reg_fsl_emb.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * Contains register definitions for the Freescale Embedded Performance - * Monitor. - */ -#ifdef __KERNEL__ -#ifndef __ASM_POWERPC_REG_FSL_EMB_H__ -#define __ASM_POWERPC_REG_FSL_EMB_H__ - -#ifndef __ASSEMBLY__ -/* Performance Monitor Registers */ -#define mfpmr(rn) ({unsigned int rval; \ - asm volatile("mfpmr %0," __stringify(rn) \ - : "=r" (rval)); rval;}) -#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v)) -#endif /* __ASSEMBLY__ */ - -/* Freescale Book E Performance Monitor APU Registers */ -#define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */ -#define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */ -#define PMRN_PMC2 0x012 /* Performance Monitor Counter 1 */ -#define PMRN_PMC3 0x013 /* Performance Monitor Counter 1 */ -#define PMRN_PMLCA0 0x090 /* PM Local Control A0 */ -#define PMRN_PMLCA1 0x091 /* PM Local Control A1 */ -#define PMRN_PMLCA2 0x092 /* PM Local Control A2 */ -#define PMRN_PMLCA3 0x093 /* PM Local Control A3 */ - -#define PMLCA_FC 0x80000000 /* Freeze Counter */ -#define PMLCA_FCS 0x40000000 /* Freeze in Supervisor */ -#define PMLCA_FCU 0x20000000 /* Freeze in User */ -#define PMLCA_FCM1 0x10000000 /* Freeze when PMM==1 */ -#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */ -#define PMLCA_CE 0x04000000 /* Condition Enable */ - -#define PMLCA_EVENT_MASK 0x007f0000 /* Event field */ -#define PMLCA_EVENT_SHIFT 16 - -#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */ -#define PMRN_PMLCB1 0x111 /* PM Local Control B1 */ -#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */ -#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */ - -#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */ -#define PMLCB_THRESHMUL_SHIFT 8 - -#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */ -#define PMLCB_THRESHOLD_SHIFT 0 - -#define PMRN_PMGC0 0x190 /* PM Global Control 0 */ - -#define PMGC0_FAC 0x80000000 /* Freeze all Counters */ -#define PMGC0_PMIE 0x40000000 /* Interrupt Enable */ -#define PMGC0_FCECE 0x20000000 /* Freeze countes on - Enabled Condition or - Event */ - -#define PMRN_UPMC0 0x000 /* User Performance Monitor Counter 0 */ -#define PMRN_UPMC1 0x001 /* User Performance Monitor Counter 1 */ -#define PMRN_UPMC2 0x002 /* User Performance Monitor Counter 1 */ -#define PMRN_UPMC3 0x003 /* User Performance Monitor Counter 1 */ -#define PMRN_UPMLCA0 0x080 /* User PM Local Control A0 */ -#define PMRN_UPMLCA1 0x081 /* User PM Local Control A1 */ -#define PMRN_UPMLCA2 0x082 /* User PM Local Control A2 */ -#define PMRN_UPMLCA3 0x083 /* User PM Local Control A3 */ -#define PMRN_UPMLCB0 0x100 /* User PM Local Control B0 */ -#define PMRN_UPMLCB1 0x101 /* User PM Local Control B1 */ -#define PMRN_UPMLCB2 0x102 /* User PM Local Control B2 */ -#define PMRN_UPMLCB3 0x103 /* User PM Local Control B3 */ -#define PMRN_UPMGC0 0x180 /* User PM Global Control 0 */ - - -#endif /* __ASM_POWERPC_REG_FSL_EMB_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/resource.h b/include/asm-powerpc/resource.h deleted file mode 100644 index 04bc4db..0000000 --- a/include/asm-powerpc/resource.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-powerpc/rheap.h b/include/asm-powerpc/rheap.h deleted file mode 100644 index 1723817..0000000 --- a/include/asm-powerpc/rheap.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * include/asm-ppc/rheap.h - * - * Header file for the implementation of a remote heap. - * - * Author: Pantelis Antoniou - * - * 2004 (c) INTRACOM S.A. Greece. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASM_PPC_RHEAP_H__ -#define __ASM_PPC_RHEAP_H__ - -#include - -typedef struct _rh_block { - struct list_head list; - unsigned long start; - int size; - const char *owner; -} rh_block_t; - -typedef struct _rh_info { - unsigned int alignment; - int max_blocks; - int empty_slots; - rh_block_t *block; - struct list_head empty_list; - struct list_head free_list; - struct list_head taken_list; - unsigned int flags; -} rh_info_t; - -#define RHIF_STATIC_INFO 0x1 -#define RHIF_STATIC_BLOCK 0x2 - -typedef struct _rh_stats { - unsigned long start; - int size; - const char *owner; -} rh_stats_t; - -#define RHGS_FREE 0 -#define RHGS_TAKEN 1 - -/* Create a remote heap dynamically */ -extern rh_info_t *rh_create(unsigned int alignment); - -/* Destroy a remote heap, created by rh_create() */ -extern void rh_destroy(rh_info_t * info); - -/* Initialize in place a remote info block */ -extern void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks, - rh_block_t * block); - -/* Attach a free region to manage */ -extern int rh_attach_region(rh_info_t * info, unsigned long start, int size); - -/* Detach a free region */ -extern unsigned long rh_detach_region(rh_info_t * info, unsigned long start, int size); - -/* Allocate the given size from the remote heap (with alignment) */ -extern unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment, - const char *owner); - -/* Allocate the given size from the remote heap */ -extern unsigned long rh_alloc(rh_info_t * info, int size, const char *owner); - -/* Allocate the given size from the given address */ -extern unsigned long rh_alloc_fixed(rh_info_t * info, unsigned long start, int size, - const char *owner); - -/* Free the allocated area */ -extern int rh_free(rh_info_t * info, unsigned long start); - -/* Get stats for debugging purposes */ -extern int rh_get_stats(rh_info_t * info, int what, int max_stats, - rh_stats_t * stats); - -/* Simple dump of remote heap info */ -extern void rh_dump(rh_info_t * info); - -/* Set owner of taken block */ -extern int rh_set_owner(rh_info_t * info, unsigned long start, const char *owner); - -#endif /* __ASM_PPC_RHEAP_H__ */ diff --git a/include/asm-powerpc/rio.h b/include/asm-powerpc/rio.h deleted file mode 100644 index 0018bf8..0000000 --- a/include/asm-powerpc/rio.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * RapidIO architecture support - * - * Copyright 2005 MontaVista Software, Inc. - * Matt Porter - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef ASM_PPC_RIO_H -#define ASM_PPC_RIO_H - -extern void platform_rio_init(void); - -#endif /* ASM_PPC_RIO_H */ diff --git a/include/asm-powerpc/rtas.h b/include/asm-powerpc/rtas.h deleted file mode 100644 index 8eaa7b2..0000000 --- a/include/asm-powerpc/rtas.h +++ /dev/null @@ -1,247 +0,0 @@ -#ifndef _POWERPC_RTAS_H -#define _POWERPC_RTAS_H -#ifdef __KERNEL__ - -#include -#include - -/* - * Definitions for talking to the RTAS on CHRP machines. - * - * Copyright (C) 2001 Peter Bergner - * Copyright (C) 2001 PPC 64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define RTAS_UNKNOWN_SERVICE (-1) -#define RTAS_INSTANTIATE_MAX (1UL<<30) /* Don't instantiate rtas at/above this value */ - -/* Buffer size for ppc_rtas system call. */ -#define RTAS_RMOBUF_MAX (64 * 1024) - -/* RTAS return status codes */ -#define RTAS_NOT_SUSPENDABLE -9004 -#define RTAS_BUSY -2 /* RTAS Busy */ -#define RTAS_EXTENDED_DELAY_MIN 9900 -#define RTAS_EXTENDED_DELAY_MAX 9905 - -/* - * In general to call RTAS use rtas_token("string") to lookup - * an RTAS token for the given string (e.g. "event-scan"). - * To actually perform the call use - * ret = rtas_call(token, n_in, n_out, ...) - * Where n_in is the number of input parameters and - * n_out is the number of output parameters - * - * If the "string" is invalid on this system, RTAS_UNKNOWN_SERVICE - * will be returned as a token. rtas_call() does look for this - * token and error out gracefully so rtas_call(rtas_token("str"), ...) - * may be safely used for one-shot calls to RTAS. - * - */ - -typedef u32 rtas_arg_t; - -struct rtas_args { - u32 token; - u32 nargs; - u32 nret; - rtas_arg_t args[16]; - rtas_arg_t *rets; /* Pointer to return values in args[]. */ -}; - -struct rtas_t { - unsigned long entry; /* physical address pointer */ - unsigned long base; /* physical address pointer */ - unsigned long size; - spinlock_t lock; - struct rtas_args args; - struct device_node *dev; /* virtual address pointer */ -}; - -/* RTAS event classes */ -#define RTAS_INTERNAL_ERROR 0x80000000 /* set bit 0 */ -#define RTAS_EPOW_WARNING 0x40000000 /* set bit 1 */ -#define RTAS_POWERMGM_EVENTS 0x20000000 /* set bit 2 */ -#define RTAS_HOTPLUG_EVENTS 0x10000000 /* set bit 3 */ -#define RTAS_EVENT_SCAN_ALL_EVENTS 0xf0000000 - -/* RTAS event severity */ -#define RTAS_SEVERITY_FATAL 0x5 -#define RTAS_SEVERITY_ERROR 0x4 -#define RTAS_SEVERITY_ERROR_SYNC 0x3 -#define RTAS_SEVERITY_WARNING 0x2 -#define RTAS_SEVERITY_EVENT 0x1 -#define RTAS_SEVERITY_NO_ERROR 0x0 - -/* RTAS event disposition */ -#define RTAS_DISP_FULLY_RECOVERED 0x0 -#define RTAS_DISP_LIMITED_RECOVERY 0x1 -#define RTAS_DISP_NOT_RECOVERED 0x2 - -/* RTAS event initiator */ -#define RTAS_INITIATOR_UNKNOWN 0x0 -#define RTAS_INITIATOR_CPU 0x1 -#define RTAS_INITIATOR_PCI 0x2 -#define RTAS_INITIATOR_ISA 0x3 -#define RTAS_INITIATOR_MEMORY 0x4 -#define RTAS_INITIATOR_POWERMGM 0x5 - -/* RTAS event target */ -#define RTAS_TARGET_UNKNOWN 0x0 -#define RTAS_TARGET_CPU 0x1 -#define RTAS_TARGET_PCI 0x2 -#define RTAS_TARGET_ISA 0x3 -#define RTAS_TARGET_MEMORY 0x4 -#define RTAS_TARGET_POWERMGM 0x5 - -/* RTAS event type */ -#define RTAS_TYPE_RETRY 0x01 -#define RTAS_TYPE_TCE_ERR 0x02 -#define RTAS_TYPE_INTERN_DEV_FAIL 0x03 -#define RTAS_TYPE_TIMEOUT 0x04 -#define RTAS_TYPE_DATA_PARITY 0x05 -#define RTAS_TYPE_ADDR_PARITY 0x06 -#define RTAS_TYPE_CACHE_PARITY 0x07 -#define RTAS_TYPE_ADDR_INVALID 0x08 -#define RTAS_TYPE_ECC_UNCORR 0x09 -#define RTAS_TYPE_ECC_CORR 0x0a -#define RTAS_TYPE_EPOW 0x40 -#define RTAS_TYPE_PLATFORM 0xE0 -#define RTAS_TYPE_IO 0xE1 -#define RTAS_TYPE_INFO 0xE2 -#define RTAS_TYPE_DEALLOC 0xE3 -#define RTAS_TYPE_DUMP 0xE4 -/* I don't add PowerMGM events right now, this is a different topic */ -#define RTAS_TYPE_PMGM_POWER_SW_ON 0x60 -#define RTAS_TYPE_PMGM_POWER_SW_OFF 0x61 -#define RTAS_TYPE_PMGM_LID_OPEN 0x62 -#define RTAS_TYPE_PMGM_LID_CLOSE 0x63 -#define RTAS_TYPE_PMGM_SLEEP_BTN 0x64 -#define RTAS_TYPE_PMGM_WAKE_BTN 0x65 -#define RTAS_TYPE_PMGM_BATTERY_WARN 0x66 -#define RTAS_TYPE_PMGM_BATTERY_CRIT 0x67 -#define RTAS_TYPE_PMGM_SWITCH_TO_BAT 0x68 -#define RTAS_TYPE_PMGM_SWITCH_TO_AC 0x69 -#define RTAS_TYPE_PMGM_KBD_OR_MOUSE 0x6a -#define RTAS_TYPE_PMGM_ENCLOS_OPEN 0x6b -#define RTAS_TYPE_PMGM_ENCLOS_CLOSED 0x6c -#define RTAS_TYPE_PMGM_RING_INDICATE 0x6d -#define RTAS_TYPE_PMGM_LAN_ATTENTION 0x6e -#define RTAS_TYPE_PMGM_TIME_ALARM 0x6f -#define RTAS_TYPE_PMGM_CONFIG_CHANGE 0x70 -#define RTAS_TYPE_PMGM_SERVICE_PROC 0x71 - -struct rtas_error_log { - unsigned long version:8; /* Architectural version */ - unsigned long severity:3; /* Severity level of error */ - unsigned long disposition:2; /* Degree of recovery */ - unsigned long extended:1; /* extended log present? */ - unsigned long /* reserved */ :2; /* Reserved for future use */ - unsigned long initiator:4; /* Initiator of event */ - unsigned long target:4; /* Target of failed operation */ - unsigned long type:8; /* General event or error*/ - unsigned long extended_log_length:32; /* length in bytes */ - unsigned char buffer[1]; -}; - -/* - * This can be set by the rtas_flash module so that it can get called - * as the absolutely last thing before the kernel terminates. - */ -extern void (*rtas_flash_term_hook)(int); - -extern struct rtas_t rtas; - -extern void enter_rtas(unsigned long); -extern int rtas_token(const char *service); -extern int rtas_service_present(const char *service); -extern int rtas_call(int token, int, int, int *, ...); -extern void rtas_restart(char *cmd); -extern void rtas_power_off(void); -extern void rtas_halt(void); -extern void rtas_os_term(char *str); -extern int rtas_get_sensor(int sensor, int index, int *state); -extern int rtas_get_power_level(int powerdomain, int *level); -extern int rtas_set_power_level(int powerdomain, int level, int *setlevel); -extern int rtas_set_indicator(int indicator, int index, int new_value); -extern int rtas_set_indicator_fast(int indicator, int index, int new_value); -extern void rtas_progress(char *s, unsigned short hex); -extern void rtas_initialize(void); - -struct rtc_time; -extern unsigned long rtas_get_boot_time(void); -extern void rtas_get_rtc_time(struct rtc_time *rtc_time); -extern int rtas_set_rtc_time(struct rtc_time *rtc_time); - -extern unsigned int rtas_busy_delay_time(int status); -extern unsigned int rtas_busy_delay(int status); - -extern int early_init_dt_scan_rtas(unsigned long node, - const char *uname, int depth, void *data); - -extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal); - -/* Error types logged. */ -#define ERR_FLAG_ALREADY_LOGGED 0x0 -#define ERR_FLAG_BOOT 0x1 /* log was pulled from NVRAM on boot */ -#define ERR_TYPE_RTAS_LOG 0x2 /* from rtas event-scan */ -#define ERR_TYPE_KERNEL_PANIC 0x4 /* from panic() */ - -/* All the types and not flags */ -#define ERR_TYPE_MASK (ERR_TYPE_RTAS_LOG | ERR_TYPE_KERNEL_PANIC) - -#define RTAS_DEBUG KERN_DEBUG "RTAS: " - -#define RTAS_ERROR_LOG_MAX 2048 - -/* - * Return the firmware-specified size of the error log buffer - * for all rtas calls that require an error buffer argument. - * This includes 'check-exception' and 'rtas-last-error'. - */ -extern int rtas_get_error_log_max(void); - -/* Event Scan Parameters */ -#define EVENT_SCAN_ALL_EVENTS 0xf0000000 -#define SURVEILLANCE_TOKEN 9000 -#define LOG_NUMBER 64 /* must be a power of two */ -#define LOG_NUMBER_MASK (LOG_NUMBER-1) - -/* Some RTAS ops require a data buffer and that buffer must be < 4G. - * Rather than having a memory allocator, just use this buffer - * (get the lock first), make the RTAS call. Copy the data instead - * of holding the buffer for long. - */ - -#define RTAS_DATA_BUF_SIZE 4096 -extern spinlock_t rtas_data_buf_lock; -extern char rtas_data_buf[RTAS_DATA_BUF_SIZE]; - -/* RMO buffer reserved for user-space RTAS use */ -extern unsigned long rtas_rmo_buf; - -#define GLOBAL_INTERRUPT_QUEUE 9005 - -/** - * rtas_config_addr - Format a busno, devfn and reg for RTAS. - * @busno: The bus number. - * @devfn: The device and function number as encoded by PCI_DEVFN(). - * @reg: The register number. - * - * This function encodes the given busno, devfn and register number as - * required for RTAS calls that take a "config_addr" parameter. - * See PAPR requirement 7.3.4-1 for more info. - */ -static inline u32 rtas_config_addr(int busno, int devfn, int reg) -{ - return ((reg & 0xf00) << 20) | ((busno & 0xff) << 16) | - (devfn << 8) | (reg & 0xff); -} - -#endif /* __KERNEL__ */ -#endif /* _POWERPC_RTAS_H */ diff --git a/include/asm-powerpc/rtc.h b/include/asm-powerpc/rtc.h deleted file mode 100644 index f580292..0000000 --- a/include/asm-powerpc/rtc.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * Real-time clock definitions and interfaces - * - * Author: Tom Rini - * - * 2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - * - * Based on: - * include/asm-m68k/rtc.h - * - * Copyright Richard Zidlicky - * implementation details for genrtc/q40rtc driver - * - * And the old drivers/macintosh/rtc.c which was heavily based on: - * Linux/SPARC Real Time Clock Driver - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - * - * With additional work by Paul Mackerras and Franz Sirl. - */ - -#ifndef __ASM_POWERPC_RTC_H__ -#define __ASM_POWERPC_RTC_H__ - -#ifdef __KERNEL__ - -#include - -#include -#include - -#define RTC_PIE 0x40 /* periodic interrupt enable */ -#define RTC_AIE 0x20 /* alarm interrupt enable */ -#define RTC_UIE 0x10 /* update-finished interrupt enable */ - -/* some dummy definitions */ -#define RTC_BATT_BAD 0x100 /* battery bad */ -#define RTC_SQWE 0x08 /* enable square-wave output */ -#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ -#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ -#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ - -static inline unsigned int get_rtc_time(struct rtc_time *time) -{ - if (ppc_md.get_rtc_time) - ppc_md.get_rtc_time(time); - return RTC_24H; -} - -/* Set the current date and time in the real time clock. */ -static inline int set_rtc_time(struct rtc_time *time) -{ - if (ppc_md.set_rtc_time) - return ppc_md.set_rtc_time(time); - return -EINVAL; -} - -static inline unsigned int get_rtc_ss(void) -{ - struct rtc_time h; - - get_rtc_time(&h); - return h.tm_sec; -} - -static inline int get_rtc_pll(struct rtc_pll_info *pll) -{ - return -EINVAL; -} -static inline int set_rtc_pll(struct rtc_pll_info *pll) -{ - return -EINVAL; -} - -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_RTC_H__ */ diff --git a/include/asm-powerpc/rwsem.h b/include/asm-powerpc/rwsem.h deleted file mode 100644 index a6cc93b..0000000 --- a/include/asm-powerpc/rwsem.h +++ /dev/null @@ -1,173 +0,0 @@ -#ifndef _ASM_POWERPC_RWSEM_H -#define _ASM_POWERPC_RWSEM_H - -#ifndef _LINUX_RWSEM_H -#error "Please don't include directly, use instead." -#endif - -#ifdef __KERNEL__ - -/* - * include/asm-powerpc/rwsem.h: R/W semaphores for PPC using the stuff - * in lib/rwsem.c. Adapted largely from include/asm-i386/rwsem.h - * by Paul Mackerras . - */ - -#include -#include -#include -#include - -/* - * the semaphore definition - */ -struct rw_semaphore { - /* XXX this should be able to be an atomic_t -- paulus */ - signed int count; -#define RWSEM_UNLOCKED_VALUE 0x00000000 -#define RWSEM_ACTIVE_BIAS 0x00000001 -#define RWSEM_ACTIVE_MASK 0x0000ffff -#define RWSEM_WAITING_BIAS (-0x00010000) -#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS -#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ - LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ - do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ - } while (0) - -/* - * lock for reading - */ -static inline void __down_read(struct rw_semaphore *sem) -{ - if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0)) - rwsem_down_read_failed(sem); -} - -static inline int __down_read_trylock(struct rw_semaphore *sem) -{ - int tmp; - - while ((tmp = sem->count) >= 0) { - if (tmp == cmpxchg(&sem->count, tmp, - tmp + RWSEM_ACTIVE_READ_BIAS)) { - return 1; - } - } - return 0; -} - -/* - * lock for writing - */ -static inline void __down_write_nested(struct rw_semaphore *sem, int subclass) -{ - int tmp; - - tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)); - if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS)) - rwsem_down_write_failed(sem); -} - -static inline void __down_write(struct rw_semaphore *sem) -{ - __down_write_nested(sem, 0); -} - -static inline int __down_write_trylock(struct rw_semaphore *sem) -{ - int tmp; - - tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE, - RWSEM_ACTIVE_WRITE_BIAS); - return tmp == RWSEM_UNLOCKED_VALUE; -} - -/* - * unlock after reading - */ -static inline void __up_read(struct rw_semaphore *sem) -{ - int tmp; - - tmp = atomic_dec_return((atomic_t *)(&sem->count)); - if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0)) - rwsem_wake(sem); -} - -/* - * unlock after writing - */ -static inline void __up_write(struct rw_semaphore *sem) -{ - if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS, - (atomic_t *)(&sem->count)) < 0)) - rwsem_wake(sem); -} - -/* - * implement atomic add functionality - */ -static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) -{ - atomic_add(delta, (atomic_t *)(&sem->count)); -} - -/* - * downgrade write lock to read lock - */ -static inline void __downgrade_write(struct rw_semaphore *sem) -{ - int tmp; - - tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count)); - if (tmp < 0) - rwsem_downgrade_wake(sem); -} - -/* - * implement exchange and add functionality - */ -static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) -{ - return atomic_add_return(delta, (atomic_t *)(&sem->count)); -} - -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_RWSEM_H */ diff --git a/include/asm-powerpc/scatterlist.h b/include/asm-powerpc/scatterlist.h deleted file mode 100644 index fcf7d55..0000000 --- a/include/asm-powerpc/scatterlist.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef _ASM_POWERPC_SCATTERLIST_H -#define _ASM_POWERPC_SCATTERLIST_H -/* - * Copyright (C) 2001 PPC64 Team, IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __KERNEL__ -#include -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - unsigned int length; - - /* For TCE support */ - dma_addr_t dma_address; - u32 dma_length; -}; - -/* - * These macros should be used after a dma_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns, or alternatively stop on the first sg_dma_len(sg) which - * is 0. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#ifdef __powerpc64__ -#define sg_dma_len(sg) ((sg)->dma_length) -#else -#define sg_dma_len(sg) ((sg)->length) -#endif - -#ifdef __powerpc64__ -#define ISA_DMA_THRESHOLD (~0UL) -#endif - -#define ARCH_HAS_SG_CHAIN - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SCATTERLIST_H */ diff --git a/include/asm-powerpc/seccomp.h b/include/asm-powerpc/seccomp.h deleted file mode 100644 index 853765e..0000000 --- a/include/asm-powerpc/seccomp.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_POWERPC_SECCOMP_H -#define _ASM_POWERPC_SECCOMP_H - -#ifdef __KERNEL__ -#include -#endif - -#include - -#define __NR_seccomp_read __NR_read -#define __NR_seccomp_write __NR_write -#define __NR_seccomp_exit __NR_exit -#define __NR_seccomp_sigreturn __NR_rt_sigreturn - -#define __NR_seccomp_read_32 __NR_read -#define __NR_seccomp_write_32 __NR_write -#define __NR_seccomp_exit_32 __NR_exit -#define __NR_seccomp_sigreturn_32 __NR_sigreturn - -#endif /* _ASM_POWERPC_SECCOMP_H */ diff --git a/include/asm-powerpc/sections.h b/include/asm-powerpc/sections.h deleted file mode 100644 index 916018e..0000000 --- a/include/asm-powerpc/sections.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _ASM_POWERPC_SECTIONS_H -#define _ASM_POWERPC_SECTIONS_H -#ifdef __KERNEL__ - -#include - -#ifdef __powerpc64__ - -extern char _end[]; - -static inline int in_kernel_text(unsigned long addr) -{ - if (addr >= (unsigned long)_stext && addr < (unsigned long)__init_end) - return 1; - - return 0; -} - -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SECTIONS_H */ diff --git a/include/asm-powerpc/sembuf.h b/include/asm-powerpc/sembuf.h deleted file mode 100644 index 99a4193..0000000 --- a/include/asm-powerpc/sembuf.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _ASM_POWERPC_SEMBUF_H -#define _ASM_POWERPC_SEMBUF_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * The semid64_ds structure for PPC architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ -#ifndef __powerpc64__ - unsigned long __unused1; -#endif - __kernel_time_t sem_otime; /* last semop time */ -#ifndef __powerpc64__ - unsigned long __unused2; -#endif - __kernel_time_t sem_ctime; /* last change time */ - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _ASM_POWERPC_SEMBUF_H */ diff --git a/include/asm-powerpc/serial.h b/include/asm-powerpc/serial.h deleted file mode 100644 index 3e8589b..0000000 --- a/include/asm-powerpc/serial.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _ASM_POWERPC_SERIAL_H -#define _ASM_POWERPC_SERIAL_H - -/* - * Serial ports are not listed here, because they are discovered - * through the device tree. - */ - -/* Default baud base if not found in device-tree */ -#define BASE_BAUD ( 1843200 / 16 ) - -#ifdef CONFIG_PPC_UDBG_16550 -extern void find_legacy_serial_ports(void); -#else -#define find_legacy_serial_ports() do { } while (0) -#endif - -#endif /* _PPC64_SERIAL_H */ diff --git a/include/asm-powerpc/setjmp.h b/include/asm-powerpc/setjmp.h deleted file mode 100644 index 279d03a..0000000 --- a/include/asm-powerpc/setjmp.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright © 2008 Michael Neuling IBM Corporation - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ -#ifndef _ASM_POWERPC_SETJMP_H -#define _ASM_POWERPC_SETJMP_H - -#define JMP_BUF_LEN 23 - -extern long setjmp(long *); -extern void longjmp(long *, long); - -#endif /* _ASM_POWERPC_SETJMP_H */ diff --git a/include/asm-powerpc/setup.h b/include/asm-powerpc/setup.h deleted file mode 100644 index 817fac0..0000000 --- a/include/asm-powerpc/setup.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_POWERPC_SETUP_H -#define _ASM_POWERPC_SETUP_H - -#define COMMAND_LINE_SIZE 512 - -#endif /* _ASM_POWERPC_SETUP_H */ diff --git a/include/asm-powerpc/shmbuf.h b/include/asm-powerpc/shmbuf.h deleted file mode 100644 index 8efa396..0000000 --- a/include/asm-powerpc/shmbuf.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef _ASM_POWERPC_SHMBUF_H -#define _ASM_POWERPC_SHMBUF_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* - * The shmid64_ds structure for PPC architecture. - * - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ -#ifndef __powerpc64__ - unsigned long __unused1; -#endif - __kernel_time_t shm_atime; /* last attach time */ -#ifndef __powerpc64__ - unsigned long __unused2; -#endif - __kernel_time_t shm_dtime; /* last detach time */ -#ifndef __powerpc64__ - unsigned long __unused3; -#endif - __kernel_time_t shm_ctime; /* last change time */ -#ifndef __powerpc64__ - unsigned long __unused4; -#endif - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused5; - unsigned long __unused6; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* _ASM_POWERPC_SHMBUF_H */ diff --git a/include/asm-powerpc/shmparam.h b/include/asm-powerpc/shmparam.h deleted file mode 100644 index 5cda42a..0000000 --- a/include/asm-powerpc/shmparam.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_POWERPC_SHMPARAM_H -#define _ASM_POWERPC_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* _ASM_POWERPC_SHMPARAM_H */ diff --git a/include/asm-powerpc/sigcontext.h b/include/asm-powerpc/sigcontext.h deleted file mode 100644 index 9c1f24f..0000000 --- a/include/asm-powerpc/sigcontext.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef _ASM_POWERPC_SIGCONTEXT_H -#define _ASM_POWERPC_SIGCONTEXT_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include -#ifdef __powerpc64__ -#include -#endif - -struct sigcontext { - unsigned long _unused[4]; - int signal; -#ifdef __powerpc64__ - int _pad0; -#endif - unsigned long handler; - unsigned long oldmask; - struct pt_regs __user *regs; -#ifdef __powerpc64__ - elf_gregset_t gp_regs; - elf_fpregset_t fp_regs; -/* - * To maintain compatibility with current implementations the sigcontext is - * extended by appending a pointer (v_regs) to a quadword type (elf_vrreg_t) - * followed by an unstructured (vmx_reserve) field of 69 doublewords. This - * allows the array of vector registers to be quadword aligned independent of - * the alignment of the containing sigcontext or ucontext. It is the - * responsibility of the code setting the sigcontext to set this pointer to - * either NULL (if this processor does not support the VMX feature) or the - * address of the first quadword within the allocated (vmx_reserve) area. - * - * The pointer (v_regs) of vector type (elf_vrreg_t) is type compatible with - * an array of 34 quadword entries (elf_vrregset_t). The entries with - * indexes 0-31 contain the corresponding vector registers. The entry with - * index 32 contains the vscr as the last word (offset 12) within the - * quadword. This allows the vscr to be stored as either a quadword (since - * it must be copied via a vector register to/from storage) or as a word. - * The entry with index 33 contains the vrsave as the first word (offset 0) - * within the quadword. - * - * Part of the VSX data is stored here also by extending vmx_restore - * by an additional 32 double words. Architecturally the layout of - * the VSR registers and how they overlap on top of the legacy FPR and - * VR registers is shown below: - * - * VSR doubleword 0 VSR doubleword 1 - * ---------------------------------------------------------------- - * VSR[0] | FPR[0] | | - * ---------------------------------------------------------------- - * VSR[1] | FPR[1] | | - * ---------------------------------------------------------------- - * | ... | | - * | ... | | - * ---------------------------------------------------------------- - * VSR[30] | FPR[30] | | - * ---------------------------------------------------------------- - * VSR[31] | FPR[31] | | - * ---------------------------------------------------------------- - * VSR[32] | VR[0] | - * ---------------------------------------------------------------- - * VSR[33] | VR[1] | - * ---------------------------------------------------------------- - * | ... | - * | ... | - * ---------------------------------------------------------------- - * VSR[62] | VR[30] | - * ---------------------------------------------------------------- - * VSR[63] | VR[31] | - * ---------------------------------------------------------------- - * - * FPR/VSR 0-31 doubleword 0 is stored in fp_regs, and VMX/VSR 32-63 - * is stored at the start of vmx_reserve. vmx_reserve is extended for - * backwards compatility to store VSR 0-31 doubleword 1 after the VMX - * registers and vscr/vrsave. - */ - elf_vrreg_t __user *v_regs; - long vmx_reserve[ELF_NVRREG+ELF_NVRREG+32+1]; -#endif -}; - -#endif /* _ASM_POWERPC_SIGCONTEXT_H */ diff --git a/include/asm-powerpc/siginfo.h b/include/asm-powerpc/siginfo.h deleted file mode 100644 index 12f1bce..0000000 --- a/include/asm-powerpc/siginfo.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _ASM_POWERPC_SIGINFO_H -#define _ASM_POWERPC_SIGINFO_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __powerpc64__ -# define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) -# define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) -#endif - -#include - -/* - * SIGTRAP si_codes - */ -#define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */ -#define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */ -#undef NSIGTRAP -#define NSIGTRAP 4 - -#endif /* _ASM_POWERPC_SIGINFO_H */ diff --git a/include/asm-powerpc/signal.h b/include/asm-powerpc/signal.h deleted file mode 100644 index a7360cd..0000000 --- a/include/asm-powerpc/signal.h +++ /dev/null @@ -1,150 +0,0 @@ -#ifndef _ASM_POWERPC_SIGNAL_H -#define _ASM_POWERPC_SIGNAL_H - -#include - -#define _NSIG 64 -#ifdef __powerpc64__ -#define _NSIG_BPW 64 -#else -#define _NSIG_BPW 32 -#endif -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK is not currently supported, but will allow sigaltstack(2). - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001U -#define SA_NOCLDWAIT 0x00000002U -#define SA_SIGINFO 0x00000004U -#define SA_ONSTACK 0x08000000U -#define SA_RESTART 0x10000000U -#define SA_NODEFER 0x40000000U -#define SA_RESETHAND 0x80000000U - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -#define SA_RESTORER 0x04000000U - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - __sigrestore_t sa_restorer; -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ -struct pt_regs; -extern void do_signal(struct pt_regs *regs, unsigned long thread_info_flags); -#define ptrace_signal_deliver(regs, cookie) do { } while (0) -#endif /* __KERNEL__ */ - -#ifndef __powerpc64__ -/* - * These are parameters to dbg_sigreturn syscall. They enable or - * disable certain debugging things that can be done from signal - * handlers. The dbg_sigreturn syscall *must* be called from a - * SA_SIGINFO signal so the ucontext can be passed to it. It takes an - * array of struct sig_dbg_op, which has the debug operations to - * perform before returning from the signal. - */ -struct sig_dbg_op { - int dbg_type; - unsigned long dbg_value; -}; - -/* Enable or disable single-stepping. The value sets the state. */ -#define SIG_DBG_SINGLE_STEPPING 1 - -/* Enable or disable branch tracing. The value sets the state. */ -#define SIG_DBG_BRANCH_TRACING 2 -#endif /* ! __powerpc64__ */ - -#endif /* _ASM_POWERPC_SIGNAL_H */ diff --git a/include/asm-powerpc/smp.h b/include/asm-powerpc/smp.h deleted file mode 100644 index 4d28e1e..0000000 --- a/include/asm-powerpc/smp.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * smp.h: PowerPC-specific SMP code. - * - * Original was a copy of sparc smp.h. Now heavily modified - * for PPC. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996-2001 Cort Dougan - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_SMP_H -#define _ASM_POWERPC_SMP_H -#ifdef __KERNEL__ - -#include -#include -#include - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_PPC64 -#include -#endif -#include - -extern int boot_cpuid; - -extern void cpu_die(void); - -#ifdef CONFIG_SMP - -extern void smp_send_debugger_break(int cpu); -extern void smp_message_recv(int); - -DECLARE_PER_CPU(unsigned int, pvr); - -#ifdef CONFIG_HOTPLUG_CPU -extern void fixup_irqs(cpumask_t map); -int generic_cpu_disable(void); -int generic_cpu_enable(unsigned int cpu); -void generic_cpu_die(unsigned int cpu); -void generic_mach_cpu_die(void); -#endif - -#ifdef CONFIG_PPC64 -#define raw_smp_processor_id() (local_paca->paca_index) -#define hard_smp_processor_id() (get_paca()->hw_cpu_id) -#else -/* 32-bit */ -extern int smp_hw_index[]; - -#define raw_smp_processor_id() (current_thread_info()->cpu) -#define hard_smp_processor_id() (smp_hw_index[smp_processor_id()]) -#define get_hard_smp_processor_id(cpu) (smp_hw_index[(cpu)]) -#define set_hard_smp_processor_id(cpu, phys)\ - (smp_hw_index[(cpu)] = (phys)) -#endif - -DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); -DECLARE_PER_CPU(cpumask_t, cpu_core_map); -extern int cpu_to_core_id(int cpu); - -/* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. - * - * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up - * in /proc/interrupts will be wrong!!! --Troy */ -#define PPC_MSG_CALL_FUNCTION 0 -#define PPC_MSG_RESCHEDULE 1 -#define PPC_MSG_CALL_FUNC_SINGLE 2 -#define PPC_MSG_DEBUGGER_BREAK 3 - -void smp_init_iSeries(void); -void smp_init_pSeries(void); -void smp_init_cell(void); -void smp_init_celleb(void); -void smp_setup_cpu_maps(void); -void smp_setup_cpu_sibling_map(void); - -extern int __cpu_disable(void); -extern void __cpu_die(unsigned int cpu); - -#else -/* for UP */ -#define hard_smp_processor_id() 0 -#define smp_setup_cpu_maps() - -#endif /* CONFIG_SMP */ - -#ifdef CONFIG_PPC64 -#define get_hard_smp_processor_id(CPU) (paca[(CPU)].hw_cpu_id) -#define set_hard_smp_processor_id(CPU, VAL) \ - do { (paca[(CPU)].hw_cpu_id = (VAL)); } while (0) - -extern void smp_release_cpus(void); - -#else -/* 32-bit */ -#ifndef CONFIG_SMP -extern int boot_cpuid_phys; -#define get_hard_smp_processor_id(cpu) boot_cpuid_phys -#define set_hard_smp_processor_id(cpu, phys) -#endif -#endif - -extern int smt_enabled_at_boot; - -extern int smp_mpic_probe(void); -extern void smp_mpic_setup_cpu(int cpu); -extern void smp_generic_kick_cpu(int nr); - -extern void smp_generic_give_timebase(void); -extern void smp_generic_take_timebase(void); - -extern struct smp_ops_t *smp_ops; - -extern void arch_send_call_function_single_ipi(int cpu); -extern void arch_send_call_function_ipi(cpumask_t mask); - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SMP_H) */ diff --git a/include/asm-powerpc/smu.h b/include/asm-powerpc/smu.h deleted file mode 100644 index 7ae2753..0000000 --- a/include/asm-powerpc/smu.h +++ /dev/null @@ -1,700 +0,0 @@ -#ifndef _SMU_H -#define _SMU_H - -/* - * Definitions for talking to the SMU chip in newer G5 PowerMacs - */ -#ifdef __KERNEL__ -#include -#endif -#include - -/* - * Known SMU commands - * - * Most of what is below comes from looking at the Open Firmware driver, - * though this is still incomplete and could use better documentation here - * or there... - */ - - -/* - * Partition info commands - * - * These commands are used to retrieve the sdb-partition-XX datas from - * the SMU. The length is always 2. First byte is the subcommand code - * and second byte is the partition ID. - * - * The reply is 6 bytes: - * - * - 0..1 : partition address - * - 2 : a byte containing the partition ID - * - 3 : length (maybe other bits are rest of header ?) - * - * The data must then be obtained with calls to another command: - * SMU_CMD_MISC_ee_GET_DATABLOCK_REC (described below). - */ -#define SMU_CMD_PARTITION_COMMAND 0x3e -#define SMU_CMD_PARTITION_LATEST 0x01 -#define SMU_CMD_PARTITION_BASE 0x02 -#define SMU_CMD_PARTITION_UPDATE 0x03 - - -/* - * Fan control - * - * This is a "mux" for fan control commands. The command seem to - * act differently based on the number of arguments. With 1 byte - * of argument, this seem to be queries for fans status, setpoint, - * etc..., while with 0xe arguments, we will set the fans speeds. - * - * Queries (1 byte arg): - * --------------------- - * - * arg=0x01: read RPM fans status - * arg=0x02: read RPM fans setpoint - * arg=0x11: read PWM fans status - * arg=0x12: read PWM fans setpoint - * - * the "status" queries return the current speed while the "setpoint" ones - * return the programmed/target speed. It _seems_ that the result is a bit - * mask in the first byte of active/available fans, followed by 6 words (16 - * bits) containing the requested speed. - * - * Setpoint (14 bytes arg): - * ------------------------ - * - * first arg byte is 0 for RPM fans and 0x10 for PWM. Second arg byte is the - * mask of fans affected by the command. Followed by 6 words containing the - * setpoint value for selected fans in the mask (or 0 if mask value is 0) - */ -#define SMU_CMD_FAN_COMMAND 0x4a - - -/* - * Battery access - * - * Same command number as the PMU, could it be same syntax ? - */ -#define SMU_CMD_BATTERY_COMMAND 0x6f -#define SMU_CMD_GET_BATTERY_INFO 0x00 - -/* - * Real time clock control - * - * This is a "mux", first data byte contains the "sub" command. - * The "RTC" part of the SMU controls the date, time, powerup - * timer, but also a PRAM - * - * Dates are in BCD format on 7 bytes: - * [sec] [min] [hour] [weekday] [month day] [month] [year] - * with month being 1 based and year minus 100 - */ -#define SMU_CMD_RTC_COMMAND 0x8e -#define SMU_CMD_RTC_SET_PWRUP_TIMER 0x00 /* i: 7 bytes date */ -#define SMU_CMD_RTC_GET_PWRUP_TIMER 0x01 /* o: 7 bytes date */ -#define SMU_CMD_RTC_STOP_PWRUP_TIMER 0x02 -#define SMU_CMD_RTC_SET_PRAM_BYTE_ACC 0x20 /* i: 1 byte (address?) */ -#define SMU_CMD_RTC_SET_PRAM_AUTOINC 0x21 /* i: 1 byte (data?) */ -#define SMU_CMD_RTC_SET_PRAM_LO_BYTES 0x22 /* i: 10 bytes */ -#define SMU_CMD_RTC_SET_PRAM_HI_BYTES 0x23 /* i: 10 bytes */ -#define SMU_CMD_RTC_GET_PRAM_BYTE 0x28 /* i: 1 bytes (address?) */ -#define SMU_CMD_RTC_GET_PRAM_LO_BYTES 0x29 /* o: 10 bytes */ -#define SMU_CMD_RTC_GET_PRAM_HI_BYTES 0x2a /* o: 10 bytes */ -#define SMU_CMD_RTC_SET_DATETIME 0x80 /* i: 7 bytes date */ -#define SMU_CMD_RTC_GET_DATETIME 0x81 /* o: 7 bytes date */ - - /* - * i2c commands - * - * To issue an i2c command, first is to send a parameter block to the - * the SMU. This is a command of type 0x9a with 9 bytes of header - * eventually followed by data for a write: - * - * 0: bus number (from device-tree usually, SMU has lots of busses !) - * 1: transfer type/format (see below) - * 2: device address. For combined and combined4 type transfers, this - * is the "write" version of the address (bit 0x01 cleared) - * 3: subaddress length (0..3) - * 4: subaddress byte 0 (or only byte for subaddress length 1) - * 5: subaddress byte 1 - * 6: subaddress byte 2 - * 7: combined address (device address for combined mode data phase) - * 8: data length - * - * The transfer types are the same good old Apple ones it seems, - * that is: - * - 0x00: Simple transfer - * - 0x01: Subaddress transfer (addr write + data tx, no restart) - * - 0x02: Combined transfer (addr write + restart + data tx) - * - * This is then followed by actual data for a write. - * - * At this point, the OF driver seems to have a limitation on transfer - * sizes of 0xd bytes on reads and 0x5 bytes on writes. I do not know - * wether this is just an OF limit due to some temporary buffer size - * or if this is an SMU imposed limit. This driver has the same limitation - * for now as I use a 0x10 bytes temporary buffer as well - * - * Once that is completed, a response is expected from the SMU. This is - * obtained via a command of type 0x9a with a length of 1 byte containing - * 0 as the data byte. OF also fills the rest of the data buffer with 0xff's - * though I can't tell yet if this is actually necessary. Once this command - * is complete, at this point, all I can tell is what OF does. OF tests - * byte 0 of the reply: - * - on read, 0xfe or 0xfc : bus is busy, wait (see below) or nak ? - * - on read, 0x00 or 0x01 : reply is in buffer (after the byte 0) - * - on write, < 0 -> failure (immediate exit) - * - else, OF just exists (without error, weird) - * - * So on read, there is this wait-for-busy thing when getting a 0xfc or - * 0xfe result. OF does a loop of up to 64 retries, waiting 20ms and - * doing the above again until either the retries expire or the result - * is no longer 0xfe or 0xfc - * - * The Darwin I2C driver is less subtle though. On any non-success status - * from the response command, it waits 5ms and tries again up to 20 times, - * it doesn't differenciate between fatal errors or "busy" status. - * - * This driver provides an asynchronous paramblock based i2c command - * interface to be used either directly by low level code or by a higher - * level driver interfacing to the linux i2c layer. The current - * implementation of this relies on working timers & timer interrupts - * though, so be careful of calling context for now. This may be "fixed" - * in the future by adding a polling facility. - */ -#define SMU_CMD_I2C_COMMAND 0x9a - /* transfer types */ -#define SMU_I2C_TRANSFER_SIMPLE 0x00 -#define SMU_I2C_TRANSFER_STDSUB 0x01 -#define SMU_I2C_TRANSFER_COMBINED 0x02 - -/* - * Power supply control - * - * The "sub" command is an ASCII string in the data, the - * data length is that of the string. - * - * The VSLEW command can be used to get or set the voltage slewing. - * - length 5 (only "VSLEW") : it returns "DONE" and 3 bytes of - * reply at data offset 6, 7 and 8. - * - length 8 ("VSLEWxyz") has 3 additional bytes appended, and is - * used to set the voltage slewing point. The SMU replies with "DONE" - * I yet have to figure out their exact meaning of those 3 bytes in - * both cases. They seem to be: - * x = processor mask - * y = op. point index - * z = processor freq. step index - * I haven't yet decyphered result codes - * - */ -#define SMU_CMD_POWER_COMMAND 0xaa -#define SMU_CMD_POWER_RESTART "RESTART" -#define SMU_CMD_POWER_SHUTDOWN "SHUTDOWN" -#define SMU_CMD_POWER_VOLTAGE_SLEW "VSLEW" - -/* - * Read ADC sensors - * - * This command takes one byte of parameter: the sensor ID (or "reg" - * value in the device-tree) and returns a 16 bits value - */ -#define SMU_CMD_READ_ADC 0xd8 - - -/* Misc commands - * - * This command seem to be a grab bag of various things - * - * Parameters: - * 1: subcommand - */ -#define SMU_CMD_MISC_df_COMMAND 0xdf - -/* - * Sets "system ready" status - * - * I did not yet understand how it exactly works or what it does. - * - * Guessing from OF code, 0x02 activates the display backlight. Apple uses/used - * the same codebase for all OF versions. On PowerBooks, this command would - * enable the backlight. For the G5s, it only activates the front LED. However, - * don't take this for granted. - * - * Parameters: - * 2: status [0x00, 0x01 or 0x02] - */ -#define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02 - -/* - * Sets mode of power switch. - * - * What this actually does is not yet known. Maybe it enables some interrupt. - * - * Parameters: - * 2: enable power switch? [0x00 or 0x01] - * 3 (optional): enable nmi? [0x00 or 0x01] - * - * Returns: - * If parameter 2 is 0x00 and parameter 3 is not specified, returns wether - * NMI is enabled. Otherwise unknown. - */ -#define SMU_CMD_MISC_df_NMI_OPTION 0x04 - -/* Sets LED dimm offset. - * - * The front LED dimms itself during sleep. Its brightness (or, well, the PWM - * frequency) depends on current time. Therefore, the SMU needs to know the - * timezone. - * - * Parameters: - * 2-8: unknown (BCD coding) - */ -#define SMU_CMD_MISC_df_DIMM_OFFSET 0x99 - - -/* - * Version info commands - * - * Parameters: - * 1 (optional): Specifies version part to retrieve - * - * Returns: - * Version value - */ -#define SMU_CMD_VERSION_COMMAND 0xea -#define SMU_VERSION_RUNNING 0x00 -#define SMU_VERSION_BASE 0x01 -#define SMU_VERSION_UPDATE 0x02 - - -/* - * Switches - * - * These are switches whose status seems to be known to the SMU. - * - * Parameters: - * none - * - * Result: - * Switch bits (ORed, see below) - */ -#define SMU_CMD_SWITCHES 0xdc - -/* Switches bits */ -#define SMU_SWITCH_CASE_CLOSED 0x01 -#define SMU_SWITCH_AC_POWER 0x04 -#define SMU_SWITCH_POWER_SWITCH 0x08 - - -/* - * Misc commands - * - * This command seem to be a grab bag of various things - * - * SMU_CMD_MISC_ee_GET_DATABLOCK_REC is used, among others, to - * transfer blocks of data from the SMU. So far, I've decrypted it's - * usage to retrieve partition data. In order to do that, you have to - * break your transfer in "chunks" since that command cannot transfer - * more than a chunk at a time. The chunk size used by OF is 0xe bytes, - * but it seems that the darwin driver will let you do 0x1e bytes if - * your "PMU" version is >= 0x30. You can get the "PMU" version apparently - * either in the last 16 bits of property "smu-version-pmu" or as the 16 - * bytes at offset 1 of "smu-version-info" - * - * For each chunk, the command takes 7 bytes of arguments: - * byte 0: subcommand code (0x02) - * byte 1: 0x04 (always, I don't know what it means, maybe the address - * space to use or some other nicety. It's hard coded in OF) - * byte 2..5: SMU address of the chunk (big endian 32 bits) - * byte 6: size to transfer (up to max chunk size) - * - * The data is returned directly - */ -#define SMU_CMD_MISC_ee_COMMAND 0xee -#define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02 - -/* Retrieves currently used watts. - * - * Parameters: - * 1: 0x03 (Meaning unknown) - */ -#define SMU_CMD_MISC_ee_GET_WATTS 0x03 - -#define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */ -#define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */ - - -/* - * Power related commands - * - * Parameters: - * 1: subcommand - */ -#define SMU_CMD_POWER_EVENTS_COMMAND 0x8f - -/* SMU_POWER_EVENTS subcommands */ -enum { - SMU_PWR_GET_POWERUP_EVENTS = 0x00, - SMU_PWR_SET_POWERUP_EVENTS = 0x01, - SMU_PWR_CLR_POWERUP_EVENTS = 0x02, - SMU_PWR_GET_WAKEUP_EVENTS = 0x03, - SMU_PWR_SET_WAKEUP_EVENTS = 0x04, - SMU_PWR_CLR_WAKEUP_EVENTS = 0x05, - - /* - * Get last shutdown cause - * - * Returns: - * 1 byte (signed char): Last shutdown cause. Exact meaning unknown. - */ - SMU_PWR_LAST_SHUTDOWN_CAUSE = 0x07, - - /* - * Sets or gets server ID. Meaning or use is unknown. - * - * Parameters: - * 2 (optional): Set server ID (1 byte) - * - * Returns: - * 1 byte (server ID?) - */ - SMU_PWR_SERVER_ID = 0x08, -}; - -/* Power events wakeup bits */ -enum { - SMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */ - SMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */ - SMU_PWR_WAKEUP_AC_CHANGE = 0x04, - SMU_PWR_WAKEUP_LID_OPEN = 0x08, - SMU_PWR_WAKEUP_RING = 0x10, -}; - - -/* - * - Kernel side interface - - */ - -#ifdef __KERNEL__ - -/* - * Asynchronous SMU commands - * - * Fill up this structure and submit it via smu_queue_command(), - * and get notified by the optional done() callback, or because - * status becomes != 1 - */ - -struct smu_cmd; - -struct smu_cmd -{ - /* public */ - u8 cmd; /* command */ - int data_len; /* data len */ - int reply_len; /* reply len */ - void *data_buf; /* data buffer */ - void *reply_buf; /* reply buffer */ - int status; /* command status */ - void (*done)(struct smu_cmd *cmd, void *misc); - void *misc; - - /* private */ - struct list_head link; -}; - -/* - * Queues an SMU command, all fields have to be initialized - */ -extern int smu_queue_cmd(struct smu_cmd *cmd); - -/* - * Simple command wrapper. This structure embeds a small buffer - * to ease sending simple SMU commands from the stack - */ -struct smu_simple_cmd -{ - struct smu_cmd cmd; - u8 buffer[16]; -}; - -/* - * Queues a simple command. All fields will be initialized by that - * function - */ -extern int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command, - unsigned int data_len, - void (*done)(struct smu_cmd *cmd, void *misc), - void *misc, - ...); - -/* - * Completion helper. Pass it to smu_queue_simple or as 'done' - * member to smu_queue_cmd, it will call complete() on the struct - * completion passed in the "misc" argument - */ -extern void smu_done_complete(struct smu_cmd *cmd, void *misc); - -/* - * Synchronous helpers. Will spin-wait for completion of a command - */ -extern void smu_spinwait_cmd(struct smu_cmd *cmd); - -static inline void smu_spinwait_simple(struct smu_simple_cmd *scmd) -{ - smu_spinwait_cmd(&scmd->cmd); -} - -/* - * Poll routine to call if blocked with irqs off - */ -extern void smu_poll(void); - - -/* - * Init routine, presence check.... - */ -extern int smu_init(void); -extern int smu_present(void); -struct of_device; -extern struct of_device *smu_get_ofdev(void); - - -/* - * Common command wrappers - */ -extern void smu_shutdown(void); -extern void smu_restart(void); -struct rtc_time; -extern int smu_get_rtc_time(struct rtc_time *time, int spinwait); -extern int smu_set_rtc_time(struct rtc_time *time, int spinwait); - -/* - * SMU command buffer absolute address, exported by pmac_setup, - * this is allocated very early during boot. - */ -extern unsigned long smu_cmdbuf_abs; - - -/* - * Kenrel asynchronous i2c interface - */ - -#define SMU_I2C_READ_MAX 0x1d -#define SMU_I2C_WRITE_MAX 0x15 - -/* SMU i2c header, exactly matches i2c header on wire */ -struct smu_i2c_param -{ - u8 bus; /* SMU bus ID (from device tree) */ - u8 type; /* i2c transfer type */ - u8 devaddr; /* device address (includes direction) */ - u8 sublen; /* subaddress length */ - u8 subaddr[3]; /* subaddress */ - u8 caddr; /* combined address, filled by SMU driver */ - u8 datalen; /* length of transfer */ - u8 data[SMU_I2C_READ_MAX]; /* data */ -}; - -struct smu_i2c_cmd -{ - /* public */ - struct smu_i2c_param info; - void (*done)(struct smu_i2c_cmd *cmd, void *misc); - void *misc; - int status; /* 1 = pending, 0 = ok, <0 = fail */ - - /* private */ - struct smu_cmd scmd; - int read; - int stage; - int retries; - u8 pdata[32]; - struct list_head link; -}; - -/* - * Call this to queue an i2c command to the SMU. You must fill info, - * including info.data for a write, done and misc. - * For now, no polling interface is provided so you have to use completion - * callback. - */ -extern int smu_queue_i2c(struct smu_i2c_cmd *cmd); - - -#endif /* __KERNEL__ */ - - -/* - * - SMU "sdb" partitions informations - - */ - - -/* - * Partition header format - */ -struct smu_sdbp_header { - __u8 id; - __u8 len; - __u8 version; - __u8 flags; -}; - - - /* - * demangle 16 and 32 bits integer in some SMU partitions - * (currently, afaik, this concerns only the FVT partition - * (0x12) - */ -#define SMU_U16_MIX(x) le16_to_cpu(x); -#define SMU_U32_MIX(x) ((((x) & 0xff00ff00u) >> 8)|(((x) & 0x00ff00ffu) << 8)) - - -/* This is the definition of the SMU sdb-partition-0x12 table (called - * CPU F/V/T operating points in Darwin). The definition for all those - * SMU tables should be moved to some separate file - */ -#define SMU_SDB_FVT_ID 0x12 - -struct smu_sdbp_fvt { - __u32 sysclk; /* Base SysClk frequency in Hz for - * this operating point. Value need to - * be unmixed with SMU_U32_MIX() - */ - __u8 pad; - __u8 maxtemp; /* Max temp. supported by this - * operating point - */ - - __u16 volts[3]; /* CPU core voltage for the 3 - * PowerTune modes, a mode with - * 0V = not supported. Value need - * to be unmixed with SMU_U16_MIX() - */ -}; - -/* This partition contains voltage & current sensor calibration - * informations - */ -#define SMU_SDB_CPUVCP_ID 0x21 - -struct smu_sdbp_cpuvcp { - __u16 volt_scale; /* u4.12 fixed point */ - __s16 volt_offset; /* s4.12 fixed point */ - __u16 curr_scale; /* u4.12 fixed point */ - __s16 curr_offset; /* s4.12 fixed point */ - __s32 power_quads[3]; /* s4.28 fixed point */ -}; - -/* This partition contains CPU thermal diode calibration - */ -#define SMU_SDB_CPUDIODE_ID 0x18 - -struct smu_sdbp_cpudiode { - __u16 m_value; /* u1.15 fixed point */ - __s16 b_value; /* s10.6 fixed point */ - -}; - -/* This partition contains Slots power calibration - */ -#define SMU_SDB_SLOTSPOW_ID 0x78 - -struct smu_sdbp_slotspow { - __u16 pow_scale; /* u4.12 fixed point */ - __s16 pow_offset; /* s4.12 fixed point */ -}; - -/* This partition contains machine specific version information about - * the sensor/control layout - */ -#define SMU_SDB_SENSORTREE_ID 0x25 - -struct smu_sdbp_sensortree { - __u8 model_id; - __u8 unknown[3]; -}; - -/* This partition contains CPU thermal control PID informations. So far - * only single CPU machines have been seen with an SMU, so we assume this - * carries only informations for those - */ -#define SMU_SDB_CPUPIDDATA_ID 0x17 - -struct smu_sdbp_cpupiddata { - __u8 unknown1; - __u8 target_temp_delta; - __u8 unknown2; - __u8 history_len; - __s16 power_adj; - __u16 max_power; - __s32 gp,gr,gd; -}; - - -/* Other partitions without known structures */ -#define SMU_SDB_DEBUG_SWITCHES_ID 0x05 - -#ifdef __KERNEL__ -/* - * This returns the pointer to an SMU "sdb" partition data or NULL - * if not found. The data format is described below - */ -extern const struct smu_sdbp_header *smu_get_sdb_partition(int id, - unsigned int *size); - -/* Get "sdb" partition data from an SMU satellite */ -extern struct smu_sdbp_header *smu_sat_get_sdb_partition(unsigned int sat_id, - int id, unsigned int *size); - - -#endif /* __KERNEL__ */ - - -/* - * - Userland interface - - */ - -/* - * A given instance of the device can be configured for 2 different - * things at the moment: - * - * - sending SMU commands (default at open() time) - * - receiving SMU events (not yet implemented) - * - * Commands are written with write() of a command block. They can be - * "driver" commands (for example to switch to event reception mode) - * or real SMU commands. They are made of a header followed by command - * data if any. - * - * For SMU commands (not for driver commands), you can then read() back - * a reply. The reader will be blocked or not depending on how the device - * file is opened. poll() isn't implemented yet. The reply will consist - * of a header as well, followed by the reply data if any. You should - * always provide a buffer large enough for the maximum reply data, I - * recommand one page. - * - * It is illegal to send SMU commands through a file descriptor configured - * for events reception - * - */ -struct smu_user_cmd_hdr -{ - __u32 cmdtype; -#define SMU_CMDTYPE_SMU 0 /* SMU command */ -#define SMU_CMDTYPE_WANTS_EVENTS 1 /* switch fd to events mode */ -#define SMU_CMDTYPE_GET_PARTITION 2 /* retrieve an sdb partition */ - - __u8 cmd; /* SMU command byte */ - __u8 pad[3]; /* padding */ - __u32 data_len; /* Length of data following */ -}; - -struct smu_user_reply_hdr -{ - __u32 status; /* Command status */ - __u32 reply_len; /* Length of data follwing */ -}; - -#endif /* _SMU_H */ diff --git a/include/asm-powerpc/socket.h b/include/asm-powerpc/socket.h deleted file mode 100644 index f5a4e168..0000000 --- a/include/asm-powerpc/socket.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef _ASM_POWERPC_SOCKET_H -#define _ASM_POWERPC_SOCKET_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_SNDBUFFORCE 32 -#define SO_RCVBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_RCVLOWAT 16 -#define SO_SNDLOWAT 17 -#define SO_RCVTIMEO 18 -#define SO_SNDTIMEO 19 -#define SO_PASSCRED 20 -#define SO_PEERCRED 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* _ASM_POWERPC_SOCKET_H */ diff --git a/include/asm-powerpc/sockios.h b/include/asm-powerpc/sockios.h deleted file mode 100644 index 55cef76..0000000 --- a/include/asm-powerpc/sockios.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_POWERPC_SOCKIOS_H -#define _ASM_POWERPC_SOCKIOS_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -/* Socket-level I/O control calls. */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif /* _ASM_POWERPC_SOCKIOS_H */ diff --git a/include/asm-powerpc/sparsemem.h b/include/asm-powerpc/sparsemem.h deleted file mode 100644 index 54a47ea..0000000 --- a/include/asm-powerpc/sparsemem.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _ASM_POWERPC_SPARSEMEM_H -#define _ASM_POWERPC_SPARSEMEM_H 1 -#ifdef __KERNEL__ - -#ifdef CONFIG_SPARSEMEM -/* - * SECTION_SIZE_BITS 2^N: how big each section will be - * MAX_PHYSADDR_BITS 2^N: how much physical address space we have - * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space - */ -#define SECTION_SIZE_BITS 24 - -#define MAX_PHYSADDR_BITS 44 -#define MAX_PHYSMEM_BITS 44 - -#endif /* CONFIG_SPARSEMEM */ - -#ifdef CONFIG_MEMORY_HOTPLUG -extern void create_section_mapping(unsigned long start, unsigned long end); -extern int remove_section_mapping(unsigned long start, unsigned long end); -#ifdef CONFIG_NUMA -extern int hot_add_scn_to_nid(unsigned long scn_addr); -#else -static inline int hot_add_scn_to_nid(unsigned long scn_addr) -{ - return 0; -} -#endif /* CONFIG_NUMA */ -#endif /* CONFIG_MEMORY_HOTPLUG */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SPARSEMEM_H */ diff --git a/include/asm-powerpc/spinlock.h b/include/asm-powerpc/spinlock.h deleted file mode 100644 index f56a843..0000000 --- a/include/asm-powerpc/spinlock.h +++ /dev/null @@ -1,295 +0,0 @@ -#ifndef __ASM_SPINLOCK_H -#define __ASM_SPINLOCK_H -#ifdef __KERNEL__ - -/* - * Simple spin lock operations. - * - * Copyright (C) 2001-2004 Paul Mackerras , IBM - * Copyright (C) 2001 Anton Blanchard , IBM - * Copyright (C) 2002 Dave Engebretsen , IBM - * Rework to support virtual processors - * - * Type of int is used as a full 64b word is not necessary. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * (the type definitions are in asm/spinlock_types.h) - */ -#include -#ifdef CONFIG_PPC64 -#include -#include -#include -#endif -#include -#include - -#define __raw_spin_is_locked(x) ((x)->slock != 0) - -#ifdef CONFIG_PPC64 -/* use 0x800000yy when locked, where yy == CPU number */ -#define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) -#else -#define LOCK_TOKEN 1 -#endif - -#if defined(CONFIG_PPC64) && defined(CONFIG_SMP) -#define CLEAR_IO_SYNC (get_paca()->io_sync = 0) -#define SYNC_IO do { \ - if (unlikely(get_paca()->io_sync)) { \ - mb(); \ - get_paca()->io_sync = 0; \ - } \ - } while (0) -#else -#define CLEAR_IO_SYNC -#define SYNC_IO -#endif - -/* - * This returns the old value in the lock, so we succeeded - * in getting the lock if the return value is 0. - */ -static inline unsigned long __spin_trylock(raw_spinlock_t *lock) -{ - unsigned long tmp, token; - - token = LOCK_TOKEN; - __asm__ __volatile__( -"1: lwarx %0,0,%2\n\ - cmpwi 0,%0,0\n\ - bne- 2f\n\ - stwcx. %1,0,%2\n\ - bne- 1b\n\ - isync\n\ -2:" : "=&r" (tmp) - : "r" (token), "r" (&lock->slock) - : "cr0", "memory"); - - return tmp; -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - CLEAR_IO_SYNC; - return __spin_trylock(lock) == 0; -} - -/* - * On a system with shared processors (that is, where a physical - * processor is multiplexed between several virtual processors), - * there is no point spinning on a lock if the holder of the lock - * isn't currently scheduled on a physical processor. Instead - * we detect this situation and ask the hypervisor to give the - * rest of our timeslice to the lock holder. - * - * So that we can tell which virtual processor is holding a lock, - * we put 0x80000000 | smp_processor_id() in the lock when it is - * held. Conveniently, we have a word in the paca that holds this - * value. - */ - -#if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) -/* We only yield to the hypervisor if we are in shared processor mode */ -#define SHARED_PROCESSOR (get_lppaca()->shared_proc) -extern void __spin_yield(raw_spinlock_t *lock); -extern void __rw_yield(raw_rwlock_t *lock); -#else /* SPLPAR || ISERIES */ -#define __spin_yield(x) barrier() -#define __rw_yield(x) barrier() -#define SHARED_PROCESSOR 0 -#endif - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - CLEAR_IO_SYNC; - while (1) { - if (likely(__spin_trylock(lock) == 0)) - break; - do { - HMT_low(); - if (SHARED_PROCESSOR) - __spin_yield(lock); - } while (unlikely(lock->slock != 0)); - HMT_medium(); - } -} - -static inline -void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) -{ - unsigned long flags_dis; - - CLEAR_IO_SYNC; - while (1) { - if (likely(__spin_trylock(lock) == 0)) - break; - local_save_flags(flags_dis); - local_irq_restore(flags); - do { - HMT_low(); - if (SHARED_PROCESSOR) - __spin_yield(lock); - } while (unlikely(lock->slock != 0)); - HMT_medium(); - local_irq_restore(flags_dis); - } -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - SYNC_IO; - __asm__ __volatile__("# __raw_spin_unlock\n\t" - LWSYNC_ON_SMP: : :"memory"); - lock->slock = 0; -} - -#ifdef CONFIG_PPC64 -extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); -#else -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) -#endif - -/* - * Read-write spinlocks, allowing multiple readers - * but only one writer. - * - * NOTE! it is quite common to have readers in interrupts - * but no interrupt writers. For those circumstances we - * can "mix" irq-safe locks - any writer needs to get a - * irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - */ - -#define __raw_read_can_lock(rw) ((rw)->lock >= 0) -#define __raw_write_can_lock(rw) (!(rw)->lock) - -#ifdef CONFIG_PPC64 -#define __DO_SIGN_EXTEND "extsw %0,%0\n" -#define WRLOCK_TOKEN LOCK_TOKEN /* it's negative */ -#else -#define __DO_SIGN_EXTEND -#define WRLOCK_TOKEN (-1) -#endif - -/* - * This returns the old value in the lock + 1, - * so we got a read lock if the return value is > 0. - */ -static inline long __read_trylock(raw_rwlock_t *rw) -{ - long tmp; - - __asm__ __volatile__( -"1: lwarx %0,0,%1\n" - __DO_SIGN_EXTEND -" addic. %0,%0,1\n\ - ble- 2f\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b\n\ - isync\n\ -2:" : "=&r" (tmp) - : "r" (&rw->lock) - : "cr0", "xer", "memory"); - - return tmp; -} - -/* - * This returns the old value in the lock, - * so we got the write lock if the return value is 0. - */ -static inline long __write_trylock(raw_rwlock_t *rw) -{ - long tmp, token; - - token = WRLOCK_TOKEN; - __asm__ __volatile__( -"1: lwarx %0,0,%2\n\ - cmpwi 0,%0,0\n\ - bne- 2f\n" - PPC405_ERR77(0,%1) -" stwcx. %1,0,%2\n\ - bne- 1b\n\ - isync\n\ -2:" : "=&r" (tmp) - : "r" (token), "r" (&rw->lock) - : "cr0", "memory"); - - return tmp; -} - -static inline void __raw_read_lock(raw_rwlock_t *rw) -{ - while (1) { - if (likely(__read_trylock(rw) > 0)) - break; - do { - HMT_low(); - if (SHARED_PROCESSOR) - __rw_yield(rw); - } while (unlikely(rw->lock < 0)); - HMT_medium(); - } -} - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - while (1) { - if (likely(__write_trylock(rw) == 0)) - break; - do { - HMT_low(); - if (SHARED_PROCESSOR) - __rw_yield(rw); - } while (unlikely(rw->lock != 0)); - HMT_medium(); - } -} - -static inline int __raw_read_trylock(raw_rwlock_t *rw) -{ - return __read_trylock(rw) > 0; -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - return __write_trylock(rw) == 0; -} - -static inline void __raw_read_unlock(raw_rwlock_t *rw) -{ - long tmp; - - __asm__ __volatile__( - "# read_unlock\n\t" - LWSYNC_ON_SMP -"1: lwarx %0,0,%1\n\ - addic %0,%0,-1\n" - PPC405_ERR77(0,%1) -" stwcx. %0,0,%1\n\ - bne- 1b" - : "=&r"(tmp) - : "r"(&rw->lock) - : "cr0", "memory"); -} - -static inline void __raw_write_unlock(raw_rwlock_t *rw) -{ - __asm__ __volatile__("# write_unlock\n\t" - LWSYNC_ON_SMP: : :"memory"); - rw->lock = 0; -} - -#define _raw_spin_relax(lock) __spin_yield(lock) -#define _raw_read_relax(lock) __rw_yield(lock) -#define _raw_write_relax(lock) __rw_yield(lock) - -#endif /* __KERNEL__ */ -#endif /* __ASM_SPINLOCK_H */ diff --git a/include/asm-powerpc/spinlock_types.h b/include/asm-powerpc/spinlock_types.h deleted file mode 100644 index 74236c9..0000000 --- a/include/asm-powerpc/spinlock_types.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef _ASM_POWERPC_SPINLOCK_TYPES_H -#define _ASM_POWERPC_SPINLOCK_TYPES_H - -#ifndef __LINUX_SPINLOCK_TYPES_H -# error "please don't include this file directly" -#endif - -typedef struct { - volatile unsigned int slock; -} raw_spinlock_t; - -#define __RAW_SPIN_LOCK_UNLOCKED { 0 } - -typedef struct { - volatile signed int lock; -} raw_rwlock_t; - -#define __RAW_RW_LOCK_UNLOCKED { 0 } - -#endif diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h deleted file mode 100644 index 8b2eb04..0000000 --- a/include/asm-powerpc/spu.h +++ /dev/null @@ -1,732 +0,0 @@ -/* - * SPU core / file system interface and HW structures - * - * (C) Copyright IBM Deutschland Entwicklung GmbH 2005 - * - * Author: Arnd Bergmann - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _SPU_H -#define _SPU_H -#ifdef __KERNEL__ - -#include -#include - -#define LS_SIZE (256 * 1024) -#define LS_ADDR_MASK (LS_SIZE - 1) - -#define MFC_PUT_CMD 0x20 -#define MFC_PUTS_CMD 0x28 -#define MFC_PUTR_CMD 0x30 -#define MFC_PUTF_CMD 0x22 -#define MFC_PUTB_CMD 0x21 -#define MFC_PUTFS_CMD 0x2A -#define MFC_PUTBS_CMD 0x29 -#define MFC_PUTRF_CMD 0x32 -#define MFC_PUTRB_CMD 0x31 -#define MFC_PUTL_CMD 0x24 -#define MFC_PUTRL_CMD 0x34 -#define MFC_PUTLF_CMD 0x26 -#define MFC_PUTLB_CMD 0x25 -#define MFC_PUTRLF_CMD 0x36 -#define MFC_PUTRLB_CMD 0x35 - -#define MFC_GET_CMD 0x40 -#define MFC_GETS_CMD 0x48 -#define MFC_GETF_CMD 0x42 -#define MFC_GETB_CMD 0x41 -#define MFC_GETFS_CMD 0x4A -#define MFC_GETBS_CMD 0x49 -#define MFC_GETL_CMD 0x44 -#define MFC_GETLF_CMD 0x46 -#define MFC_GETLB_CMD 0x45 - -#define MFC_SDCRT_CMD 0x80 -#define MFC_SDCRTST_CMD 0x81 -#define MFC_SDCRZ_CMD 0x89 -#define MFC_SDCRS_CMD 0x8D -#define MFC_SDCRF_CMD 0x8F - -#define MFC_GETLLAR_CMD 0xD0 -#define MFC_PUTLLC_CMD 0xB4 -#define MFC_PUTLLUC_CMD 0xB0 -#define MFC_PUTQLLUC_CMD 0xB8 -#define MFC_SNDSIG_CMD 0xA0 -#define MFC_SNDSIGB_CMD 0xA1 -#define MFC_SNDSIGF_CMD 0xA2 -#define MFC_BARRIER_CMD 0xC0 -#define MFC_EIEIO_CMD 0xC8 -#define MFC_SYNC_CMD 0xCC - -#define MFC_MIN_DMA_SIZE_SHIFT 4 /* 16 bytes */ -#define MFC_MAX_DMA_SIZE_SHIFT 14 /* 16384 bytes */ -#define MFC_MIN_DMA_SIZE (1 << MFC_MIN_DMA_SIZE_SHIFT) -#define MFC_MAX_DMA_SIZE (1 << MFC_MAX_DMA_SIZE_SHIFT) -#define MFC_MIN_DMA_SIZE_MASK (MFC_MIN_DMA_SIZE - 1) -#define MFC_MAX_DMA_SIZE_MASK (MFC_MAX_DMA_SIZE - 1) -#define MFC_MIN_DMA_LIST_SIZE 0x0008 /* 8 bytes */ -#define MFC_MAX_DMA_LIST_SIZE 0x4000 /* 16K bytes */ - -#define MFC_TAGID_TO_TAGMASK(tag_id) (1 << (tag_id & 0x1F)) - -/* Events for Channels 0-2 */ -#define MFC_DMA_TAG_STATUS_UPDATE_EVENT 0x00000001 -#define MFC_DMA_TAG_CMD_STALL_NOTIFY_EVENT 0x00000002 -#define MFC_DMA_QUEUE_AVAILABLE_EVENT 0x00000008 -#define MFC_SPU_MAILBOX_WRITTEN_EVENT 0x00000010 -#define MFC_DECREMENTER_EVENT 0x00000020 -#define MFC_PU_INT_MAILBOX_AVAILABLE_EVENT 0x00000040 -#define MFC_PU_MAILBOX_AVAILABLE_EVENT 0x00000080 -#define MFC_SIGNAL_2_EVENT 0x00000100 -#define MFC_SIGNAL_1_EVENT 0x00000200 -#define MFC_LLR_LOST_EVENT 0x00000400 -#define MFC_PRIV_ATTN_EVENT 0x00000800 -#define MFC_MULTI_SRC_EVENT 0x00001000 - -/* Flag indicating progress during context switch. */ -#define SPU_CONTEXT_SWITCH_PENDING 0UL -#define SPU_CONTEXT_FAULT_PENDING 1UL - -struct spu_context; -struct spu_runqueue; -struct spu_lscsa; -struct device_node; - -enum spu_utilization_state { - SPU_UTIL_USER, - SPU_UTIL_SYSTEM, - SPU_UTIL_IOWAIT, - SPU_UTIL_IDLE_LOADED, - SPU_UTIL_MAX -}; - -struct spu { - const char *name; - unsigned long local_store_phys; - u8 *local_store; - unsigned long problem_phys; - struct spu_problem __iomem *problem; - struct spu_priv2 __iomem *priv2; - struct list_head cbe_list; - struct list_head full_list; - enum { SPU_FREE, SPU_USED } alloc_state; - int number; - unsigned int irqs[3]; - u32 node; - u64 flags; - u64 class_0_pending; - u64 class_0_dar; - u64 class_1_dar; - u64 class_1_dsisr; - size_t ls_size; - unsigned int slb_replace; - struct mm_struct *mm; - struct spu_context *ctx; - struct spu_runqueue *rq; - unsigned long long timestamp; - pid_t pid; - pid_t tgid; - spinlock_t register_lock; - - void (* wbox_callback)(struct spu *spu); - void (* ibox_callback)(struct spu *spu); - void (* stop_callback)(struct spu *spu, int irq); - void (* mfc_callback)(struct spu *spu); - - char irq_c0[8]; - char irq_c1[8]; - char irq_c2[8]; - - u64 spe_id; - - void* pdata; /* platform private data */ - - /* of based platforms only */ - struct device_node *devnode; - - /* native only */ - struct spu_priv1 __iomem *priv1; - - /* beat only */ - u64 shadow_int_mask_RW[3]; - - struct sys_device sysdev; - - int has_mem_affinity; - struct list_head aff_list; - - struct { - /* protected by interrupt reentrancy */ - enum spu_utilization_state util_state; - unsigned long long tstamp; - unsigned long long times[SPU_UTIL_MAX]; - unsigned long long vol_ctx_switch; - unsigned long long invol_ctx_switch; - unsigned long long min_flt; - unsigned long long maj_flt; - unsigned long long hash_flt; - unsigned long long slb_flt; - unsigned long long class2_intr; - unsigned long long libassist; - } stats; -}; - -struct cbe_spu_info { - struct mutex list_mutex; - struct list_head spus; - int n_spus; - int nr_active; - atomic_t busy_spus; - atomic_t reserved_spus; -}; - -extern struct cbe_spu_info cbe_spu_info[]; - -void spu_init_channels(struct spu *spu); -void spu_irq_setaffinity(struct spu *spu, int cpu); - -void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, - void *code, int code_size); - -#ifdef CONFIG_KEXEC -void crash_register_spus(struct list_head *list); -#else -static inline void crash_register_spus(struct list_head *list) -{ -} -#endif - -extern void spu_invalidate_slbs(struct spu *spu); -extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm); -int spu_64k_pages_available(void); - -/* Calls from the memory management to the SPU */ -struct mm_struct; -extern void spu_flush_all_slbs(struct mm_struct *mm); - -/* This interface allows a profiler (e.g., OProfile) to store a ref - * to spu context information that it creates. This caching technique - * avoids the need to recreate this information after a save/restore operation. - * - * Assumes the caller has already incremented the ref count to - * profile_info; then spu_context_destroy must call kref_put - * on prof_info_kref. - */ -void spu_set_profile_private_kref(struct spu_context *ctx, - struct kref *prof_info_kref, - void ( * prof_info_release) (struct kref *kref)); - -void *spu_get_profile_private_kref(struct spu_context *ctx); - -/* system callbacks from the SPU */ -struct spu_syscall_block { - u64 nr_ret; - u64 parm[6]; -}; -extern long spu_sys_callback(struct spu_syscall_block *s); - -/* syscalls implemented in spufs */ -struct file; -struct spufs_calls { - long (*create_thread)(const char __user *name, - unsigned int flags, mode_t mode, - struct file *neighbor); - long (*spu_run)(struct file *filp, __u32 __user *unpc, - __u32 __user *ustatus); - int (*coredump_extra_notes_size)(void); - int (*coredump_extra_notes_write)(struct file *file, loff_t *foffset); - void (*notify_spus_active)(void); - struct module *owner; -}; - -/* return status from spu_run, same as in libspe */ -#define SPE_EVENT_DMA_ALIGNMENT 0x0008 /*A DMA alignment error */ -#define SPE_EVENT_SPE_ERROR 0x0010 /*An illegal instruction error*/ -#define SPE_EVENT_SPE_DATA_SEGMENT 0x0020 /*A DMA segmentation error */ -#define SPE_EVENT_SPE_DATA_STORAGE 0x0040 /*A DMA storage error */ -#define SPE_EVENT_INVALID_DMA 0x0800 /* Invalid MFC DMA */ - -/* - * Flags for sys_spu_create. - */ -#define SPU_CREATE_EVENTS_ENABLED 0x0001 -#define SPU_CREATE_GANG 0x0002 -#define SPU_CREATE_NOSCHED 0x0004 -#define SPU_CREATE_ISOLATE 0x0008 -#define SPU_CREATE_AFFINITY_SPU 0x0010 -#define SPU_CREATE_AFFINITY_MEM 0x0020 - -#define SPU_CREATE_FLAG_ALL 0x003f /* mask of all valid flags */ - - -int register_spu_syscalls(struct spufs_calls *calls); -void unregister_spu_syscalls(struct spufs_calls *calls); - -int spu_add_sysdev_attr(struct sysdev_attribute *attr); -void spu_remove_sysdev_attr(struct sysdev_attribute *attr); - -int spu_add_sysdev_attr_group(struct attribute_group *attrs); -void spu_remove_sysdev_attr_group(struct attribute_group *attrs); - -int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea, - unsigned long dsisr, unsigned *flt); - -/* - * Notifier blocks: - * - * oprofile can get notified when a context switch is performed - * on an spe. The notifer function that gets called is passed - * a pointer to the SPU structure as well as the object-id that - * identifies the binary running on that SPU now. - * - * For a context save, the object-id that is passed is zero, - * identifying that the kernel will run from that moment on. - * - * For a context restore, the object-id is the value written - * to object-id spufs file from user space and the notifer - * function can assume that spu->ctx is valid. - */ -struct notifier_block; -int spu_switch_event_register(struct notifier_block * n); -int spu_switch_event_unregister(struct notifier_block * n); - -extern void notify_spus_active(void); -extern void do_notify_spus_active(void); - -/* - * This defines the Local Store, Problem Area and Privilege Area of an SPU. - */ - -union mfc_tag_size_class_cmd { - struct { - u16 mfc_size; - u16 mfc_tag; - u8 pad; - u8 mfc_rclassid; - u16 mfc_cmd; - } u; - struct { - u32 mfc_size_tag32; - u32 mfc_class_cmd32; - } by32; - u64 all64; -}; - -struct mfc_cq_sr { - u64 mfc_cq_data0_RW; - u64 mfc_cq_data1_RW; - u64 mfc_cq_data2_RW; - u64 mfc_cq_data3_RW; -}; - -struct spu_problem { -#define MS_SYNC_PENDING 1L - u64 spc_mssync_RW; /* 0x0000 */ - u8 pad_0x0008_0x3000[0x3000 - 0x0008]; - - /* DMA Area */ - u8 pad_0x3000_0x3004[0x4]; /* 0x3000 */ - u32 mfc_lsa_W; /* 0x3004 */ - u64 mfc_ea_W; /* 0x3008 */ - union mfc_tag_size_class_cmd mfc_union_W; /* 0x3010 */ - u8 pad_0x3018_0x3104[0xec]; /* 0x3018 */ - u32 dma_qstatus_R; /* 0x3104 */ - u8 pad_0x3108_0x3204[0xfc]; /* 0x3108 */ - u32 dma_querytype_RW; /* 0x3204 */ - u8 pad_0x3208_0x321c[0x14]; /* 0x3208 */ - u32 dma_querymask_RW; /* 0x321c */ - u8 pad_0x3220_0x322c[0xc]; /* 0x3220 */ - u32 dma_tagstatus_R; /* 0x322c */ -#define DMA_TAGSTATUS_INTR_ANY 1u -#define DMA_TAGSTATUS_INTR_ALL 2u - u8 pad_0x3230_0x4000[0x4000 - 0x3230]; /* 0x3230 */ - - /* SPU Control Area */ - u8 pad_0x4000_0x4004[0x4]; /* 0x4000 */ - u32 pu_mb_R; /* 0x4004 */ - u8 pad_0x4008_0x400c[0x4]; /* 0x4008 */ - u32 spu_mb_W; /* 0x400c */ - u8 pad_0x4010_0x4014[0x4]; /* 0x4010 */ - u32 mb_stat_R; /* 0x4014 */ - u8 pad_0x4018_0x401c[0x4]; /* 0x4018 */ - u32 spu_runcntl_RW; /* 0x401c */ -#define SPU_RUNCNTL_STOP 0L -#define SPU_RUNCNTL_RUNNABLE 1L -#define SPU_RUNCNTL_ISOLATE 2L - u8 pad_0x4020_0x4024[0x4]; /* 0x4020 */ - u32 spu_status_R; /* 0x4024 */ -#define SPU_STOP_STATUS_SHIFT 16 -#define SPU_STATUS_STOPPED 0x0 -#define SPU_STATUS_RUNNING 0x1 -#define SPU_STATUS_STOPPED_BY_STOP 0x2 -#define SPU_STATUS_STOPPED_BY_HALT 0x4 -#define SPU_STATUS_WAITING_FOR_CHANNEL 0x8 -#define SPU_STATUS_SINGLE_STEP 0x10 -#define SPU_STATUS_INVALID_INSTR 0x20 -#define SPU_STATUS_INVALID_CH 0x40 -#define SPU_STATUS_ISOLATED_STATE 0x80 -#define SPU_STATUS_ISOLATED_LOAD_STATUS 0x200 -#define SPU_STATUS_ISOLATED_EXIT_STATUS 0x400 - u8 pad_0x4028_0x402c[0x4]; /* 0x4028 */ - u32 spu_spe_R; /* 0x402c */ - u8 pad_0x4030_0x4034[0x4]; /* 0x4030 */ - u32 spu_npc_RW; /* 0x4034 */ - u8 pad_0x4038_0x14000[0x14000 - 0x4038]; /* 0x4038 */ - - /* Signal Notification Area */ - u8 pad_0x14000_0x1400c[0xc]; /* 0x14000 */ - u32 signal_notify1; /* 0x1400c */ - u8 pad_0x14010_0x1c00c[0x7ffc]; /* 0x14010 */ - u32 signal_notify2; /* 0x1c00c */ -} __attribute__ ((aligned(0x20000))); - -/* SPU Privilege 2 State Area */ -struct spu_priv2 { - /* MFC Registers */ - u8 pad_0x0000_0x1100[0x1100 - 0x0000]; /* 0x0000 */ - - /* SLB Management Registers */ - u8 pad_0x1100_0x1108[0x8]; /* 0x1100 */ - u64 slb_index_W; /* 0x1108 */ -#define SLB_INDEX_MASK 0x7L - u64 slb_esid_RW; /* 0x1110 */ - u64 slb_vsid_RW; /* 0x1118 */ -#define SLB_VSID_SUPERVISOR_STATE (0x1ull << 11) -#define SLB_VSID_SUPERVISOR_STATE_MASK (0x1ull << 11) -#define SLB_VSID_PROBLEM_STATE (0x1ull << 10) -#define SLB_VSID_PROBLEM_STATE_MASK (0x1ull << 10) -#define SLB_VSID_EXECUTE_SEGMENT (0x1ull << 9) -#define SLB_VSID_NO_EXECUTE_SEGMENT (0x1ull << 9) -#define SLB_VSID_EXECUTE_SEGMENT_MASK (0x1ull << 9) -#define SLB_VSID_4K_PAGE (0x0 << 8) -#define SLB_VSID_LARGE_PAGE (0x1ull << 8) -#define SLB_VSID_PAGE_SIZE_MASK (0x1ull << 8) -#define SLB_VSID_CLASS_MASK (0x1ull << 7) -#define SLB_VSID_VIRTUAL_PAGE_SIZE_MASK (0x1ull << 6) - u64 slb_invalidate_entry_W; /* 0x1120 */ - u64 slb_invalidate_all_W; /* 0x1128 */ - u8 pad_0x1130_0x2000[0x2000 - 0x1130]; /* 0x1130 */ - - /* Context Save / Restore Area */ - struct mfc_cq_sr spuq[16]; /* 0x2000 */ - struct mfc_cq_sr puq[8]; /* 0x2200 */ - u8 pad_0x2300_0x3000[0x3000 - 0x2300]; /* 0x2300 */ - - /* MFC Control */ - u64 mfc_control_RW; /* 0x3000 */ -#define MFC_CNTL_RESUME_DMA_QUEUE (0ull << 0) -#define MFC_CNTL_SUSPEND_DMA_QUEUE (1ull << 0) -#define MFC_CNTL_SUSPEND_DMA_QUEUE_MASK (1ull << 0) -#define MFC_CNTL_SUSPEND_MASK (1ull << 4) -#define MFC_CNTL_NORMAL_DMA_QUEUE_OPERATION (0ull << 8) -#define MFC_CNTL_SUSPEND_IN_PROGRESS (1ull << 8) -#define MFC_CNTL_SUSPEND_COMPLETE (3ull << 8) -#define MFC_CNTL_SUSPEND_DMA_STATUS_MASK (3ull << 8) -#define MFC_CNTL_DMA_QUEUES_EMPTY (1ull << 14) -#define MFC_CNTL_DMA_QUEUES_EMPTY_MASK (1ull << 14) -#define MFC_CNTL_PURGE_DMA_REQUEST (1ull << 15) -#define MFC_CNTL_PURGE_DMA_IN_PROGRESS (1ull << 24) -#define MFC_CNTL_PURGE_DMA_COMPLETE (3ull << 24) -#define MFC_CNTL_PURGE_DMA_STATUS_MASK (3ull << 24) -#define MFC_CNTL_RESTART_DMA_COMMAND (1ull << 32) -#define MFC_CNTL_DMA_COMMAND_REISSUE_PENDING (1ull << 32) -#define MFC_CNTL_DMA_COMMAND_REISSUE_STATUS_MASK (1ull << 32) -#define MFC_CNTL_MFC_PRIVILEGE_STATE (2ull << 33) -#define MFC_CNTL_MFC_PROBLEM_STATE (3ull << 33) -#define MFC_CNTL_MFC_KEY_PROTECTION_STATE_MASK (3ull << 33) -#define MFC_CNTL_DECREMENTER_HALTED (1ull << 35) -#define MFC_CNTL_DECREMENTER_RUNNING (1ull << 40) -#define MFC_CNTL_DECREMENTER_STATUS_MASK (1ull << 40) - u8 pad_0x3008_0x4000[0x4000 - 0x3008]; /* 0x3008 */ - - /* Interrupt Mailbox */ - u64 puint_mb_R; /* 0x4000 */ - u8 pad_0x4008_0x4040[0x4040 - 0x4008]; /* 0x4008 */ - - /* SPU Control */ - u64 spu_privcntl_RW; /* 0x4040 */ -#define SPU_PRIVCNTL_MODE_NORMAL (0x0ull << 0) -#define SPU_PRIVCNTL_MODE_SINGLE_STEP (0x1ull << 0) -#define SPU_PRIVCNTL_MODE_MASK (0x1ull << 0) -#define SPU_PRIVCNTL_NO_ATTENTION_EVENT (0x0ull << 1) -#define SPU_PRIVCNTL_ATTENTION_EVENT (0x1ull << 1) -#define SPU_PRIVCNTL_ATTENTION_EVENT_MASK (0x1ull << 1) -#define SPU_PRIVCNT_LOAD_REQUEST_NORMAL (0x0ull << 2) -#define SPU_PRIVCNT_LOAD_REQUEST_ENABLE_MASK (0x1ull << 2) - u8 pad_0x4048_0x4058[0x10]; /* 0x4048 */ - u64 spu_lslr_RW; /* 0x4058 */ - u64 spu_chnlcntptr_RW; /* 0x4060 */ - u64 spu_chnlcnt_RW; /* 0x4068 */ - u64 spu_chnldata_RW; /* 0x4070 */ - u64 spu_cfg_RW; /* 0x4078 */ - u8 pad_0x4080_0x5000[0x5000 - 0x4080]; /* 0x4080 */ - - /* PV2_ImplRegs: Implementation-specific privileged-state 2 regs */ - u64 spu_pm_trace_tag_status_RW; /* 0x5000 */ - u64 spu_tag_status_query_RW; /* 0x5008 */ -#define TAG_STATUS_QUERY_CONDITION_BITS (0x3ull << 32) -#define TAG_STATUS_QUERY_MASK_BITS (0xffffffffull) - u64 spu_cmd_buf1_RW; /* 0x5010 */ -#define SPU_COMMAND_BUFFER_1_LSA_BITS (0x7ffffull << 32) -#define SPU_COMMAND_BUFFER_1_EAH_BITS (0xffffffffull) - u64 spu_cmd_buf2_RW; /* 0x5018 */ -#define SPU_COMMAND_BUFFER_2_EAL_BITS ((0xffffffffull) << 32) -#define SPU_COMMAND_BUFFER_2_TS_BITS (0xffffull << 16) -#define SPU_COMMAND_BUFFER_2_TAG_BITS (0x3full) - u64 spu_atomic_status_RW; /* 0x5020 */ -} __attribute__ ((aligned(0x20000))); - -/* SPU Privilege 1 State Area */ -struct spu_priv1 { - /* Control and Configuration Area */ - u64 mfc_sr1_RW; /* 0x000 */ -#define MFC_STATE1_LOCAL_STORAGE_DECODE_MASK 0x01ull -#define MFC_STATE1_BUS_TLBIE_MASK 0x02ull -#define MFC_STATE1_REAL_MODE_OFFSET_ENABLE_MASK 0x04ull -#define MFC_STATE1_PROBLEM_STATE_MASK 0x08ull -#define MFC_STATE1_RELOCATE_MASK 0x10ull -#define MFC_STATE1_MASTER_RUN_CONTROL_MASK 0x20ull -#define MFC_STATE1_TABLE_SEARCH_MASK 0x40ull - u64 mfc_lpid_RW; /* 0x008 */ - u64 spu_idr_RW; /* 0x010 */ - u64 mfc_vr_RO; /* 0x018 */ -#define MFC_VERSION_BITS (0xffff << 16) -#define MFC_REVISION_BITS (0xffff) -#define MFC_GET_VERSION_BITS(vr) (((vr) & MFC_VERSION_BITS) >> 16) -#define MFC_GET_REVISION_BITS(vr) ((vr) & MFC_REVISION_BITS) - u64 spu_vr_RO; /* 0x020 */ -#define SPU_VERSION_BITS (0xffff << 16) -#define SPU_REVISION_BITS (0xffff) -#define SPU_GET_VERSION_BITS(vr) (vr & SPU_VERSION_BITS) >> 16 -#define SPU_GET_REVISION_BITS(vr) (vr & SPU_REVISION_BITS) - u8 pad_0x28_0x100[0x100 - 0x28]; /* 0x28 */ - - /* Interrupt Area */ - u64 int_mask_RW[3]; /* 0x100 */ -#define CLASS0_ENABLE_DMA_ALIGNMENT_INTR 0x1L -#define CLASS0_ENABLE_INVALID_DMA_COMMAND_INTR 0x2L -#define CLASS0_ENABLE_SPU_ERROR_INTR 0x4L -#define CLASS0_ENABLE_MFC_FIR_INTR 0x8L -#define CLASS1_ENABLE_SEGMENT_FAULT_INTR 0x1L -#define CLASS1_ENABLE_STORAGE_FAULT_INTR 0x2L -#define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_GET_INTR 0x4L -#define CLASS1_ENABLE_LS_COMPARE_SUSPEND_ON_PUT_INTR 0x8L -#define CLASS2_ENABLE_MAILBOX_INTR 0x1L -#define CLASS2_ENABLE_SPU_STOP_INTR 0x2L -#define CLASS2_ENABLE_SPU_HALT_INTR 0x4L -#define CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR 0x8L -#define CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR 0x10L - u8 pad_0x118_0x140[0x28]; /* 0x118 */ - u64 int_stat_RW[3]; /* 0x140 */ -#define CLASS0_DMA_ALIGNMENT_INTR 0x1L -#define CLASS0_INVALID_DMA_COMMAND_INTR 0x2L -#define CLASS0_SPU_ERROR_INTR 0x4L -#define CLASS0_INTR_MASK 0x7L -#define CLASS1_SEGMENT_FAULT_INTR 0x1L -#define CLASS1_STORAGE_FAULT_INTR 0x2L -#define CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR 0x4L -#define CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR 0x8L -#define CLASS1_INTR_MASK 0xfL -#define CLASS2_MAILBOX_INTR 0x1L -#define CLASS2_SPU_STOP_INTR 0x2L -#define CLASS2_SPU_HALT_INTR 0x4L -#define CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR 0x8L -#define CLASS2_MAILBOX_THRESHOLD_INTR 0x10L -#define CLASS2_INTR_MASK 0x1fL - u8 pad_0x158_0x180[0x28]; /* 0x158 */ - u64 int_route_RW; /* 0x180 */ - - /* Interrupt Routing */ - u8 pad_0x188_0x200[0x200 - 0x188]; /* 0x188 */ - - /* Atomic Unit Control Area */ - u64 mfc_atomic_flush_RW; /* 0x200 */ -#define mfc_atomic_flush_enable 0x1L - u8 pad_0x208_0x280[0x78]; /* 0x208 */ - u64 resource_allocation_groupID_RW; /* 0x280 */ - u64 resource_allocation_enable_RW; /* 0x288 */ - u8 pad_0x290_0x3c8[0x3c8 - 0x290]; /* 0x290 */ - - /* SPU_Cache_ImplRegs: Implementation-dependent cache registers */ - - u64 smf_sbi_signal_sel; /* 0x3c8 */ -#define smf_sbi_mask_lsb 56 -#define smf_sbi_shift (63 - smf_sbi_mask_lsb) -#define smf_sbi_mask (0x301LL << smf_sbi_shift) -#define smf_sbi_bus0_bits (0x001LL << smf_sbi_shift) -#define smf_sbi_bus2_bits (0x100LL << smf_sbi_shift) -#define smf_sbi2_bus0_bits (0x201LL << smf_sbi_shift) -#define smf_sbi2_bus2_bits (0x300LL << smf_sbi_shift) - u64 smf_ato_signal_sel; /* 0x3d0 */ -#define smf_ato_mask_lsb 35 -#define smf_ato_shift (63 - smf_ato_mask_lsb) -#define smf_ato_mask (0x3LL << smf_ato_shift) -#define smf_ato_bus0_bits (0x2LL << smf_ato_shift) -#define smf_ato_bus2_bits (0x1LL << smf_ato_shift) - u8 pad_0x3d8_0x400[0x400 - 0x3d8]; /* 0x3d8 */ - - /* TLB Management Registers */ - u64 mfc_sdr_RW; /* 0x400 */ - u8 pad_0x408_0x500[0xf8]; /* 0x408 */ - u64 tlb_index_hint_RO; /* 0x500 */ - u64 tlb_index_W; /* 0x508 */ - u64 tlb_vpn_RW; /* 0x510 */ - u64 tlb_rpn_RW; /* 0x518 */ - u8 pad_0x520_0x540[0x20]; /* 0x520 */ - u64 tlb_invalidate_entry_W; /* 0x540 */ - u64 tlb_invalidate_all_W; /* 0x548 */ - u8 pad_0x550_0x580[0x580 - 0x550]; /* 0x550 */ - - /* SPU_MMU_ImplRegs: Implementation-dependent MMU registers */ - u64 smm_hid; /* 0x580 */ -#define PAGE_SIZE_MASK 0xf000000000000000ull -#define PAGE_SIZE_16MB_64KB 0x2000000000000000ull - u8 pad_0x588_0x600[0x600 - 0x588]; /* 0x588 */ - - /* MFC Status/Control Area */ - u64 mfc_accr_RW; /* 0x600 */ -#define MFC_ACCR_EA_ACCESS_GET (1 << 0) -#define MFC_ACCR_EA_ACCESS_PUT (1 << 1) -#define MFC_ACCR_LS_ACCESS_GET (1 << 3) -#define MFC_ACCR_LS_ACCESS_PUT (1 << 4) - u8 pad_0x608_0x610[0x8]; /* 0x608 */ - u64 mfc_dsisr_RW; /* 0x610 */ -#define MFC_DSISR_PTE_NOT_FOUND (1 << 30) -#define MFC_DSISR_ACCESS_DENIED (1 << 27) -#define MFC_DSISR_ATOMIC (1 << 26) -#define MFC_DSISR_ACCESS_PUT (1 << 25) -#define MFC_DSISR_ADDR_MATCH (1 << 22) -#define MFC_DSISR_LS (1 << 17) -#define MFC_DSISR_L (1 << 16) -#define MFC_DSISR_ADDRESS_OVERFLOW (1 << 0) - u8 pad_0x618_0x620[0x8]; /* 0x618 */ - u64 mfc_dar_RW; /* 0x620 */ - u8 pad_0x628_0x700[0x700 - 0x628]; /* 0x628 */ - - /* Replacement Management Table (RMT) Area */ - u64 rmt_index_RW; /* 0x700 */ - u8 pad_0x708_0x710[0x8]; /* 0x708 */ - u64 rmt_data1_RW; /* 0x710 */ - u8 pad_0x718_0x800[0x800 - 0x718]; /* 0x718 */ - - /* Control/Configuration Registers */ - u64 mfc_dsir_R; /* 0x800 */ -#define MFC_DSIR_Q (1 << 31) -#define MFC_DSIR_SPU_QUEUE MFC_DSIR_Q - u64 mfc_lsacr_RW; /* 0x808 */ -#define MFC_LSACR_COMPARE_MASK ((~0ull) << 32) -#define MFC_LSACR_COMPARE_ADDR ((~0ull) >> 32) - u64 mfc_lscrr_R; /* 0x810 */ -#define MFC_LSCRR_Q (1 << 31) -#define MFC_LSCRR_SPU_QUEUE MFC_LSCRR_Q -#define MFC_LSCRR_QI_SHIFT 32 -#define MFC_LSCRR_QI_MASK ((~0ull) << MFC_LSCRR_QI_SHIFT) - u8 pad_0x818_0x820[0x8]; /* 0x818 */ - u64 mfc_tclass_id_RW; /* 0x820 */ -#define MFC_TCLASS_ID_ENABLE (1L << 0L) -#define MFC_TCLASS_SLOT2_ENABLE (1L << 5L) -#define MFC_TCLASS_SLOT1_ENABLE (1L << 6L) -#define MFC_TCLASS_SLOT0_ENABLE (1L << 7L) -#define MFC_TCLASS_QUOTA_2_SHIFT 8L -#define MFC_TCLASS_QUOTA_1_SHIFT 16L -#define MFC_TCLASS_QUOTA_0_SHIFT 24L -#define MFC_TCLASS_QUOTA_2_MASK (0x1FL << MFC_TCLASS_QUOTA_2_SHIFT) -#define MFC_TCLASS_QUOTA_1_MASK (0x1FL << MFC_TCLASS_QUOTA_1_SHIFT) -#define MFC_TCLASS_QUOTA_0_MASK (0x1FL << MFC_TCLASS_QUOTA_0_SHIFT) - u8 pad_0x828_0x900[0x900 - 0x828]; /* 0x828 */ - - /* Real Mode Support Registers */ - u64 mfc_rm_boundary; /* 0x900 */ - u8 pad_0x908_0x938[0x30]; /* 0x908 */ - u64 smf_dma_signal_sel; /* 0x938 */ -#define mfc_dma1_mask_lsb 41 -#define mfc_dma1_shift (63 - mfc_dma1_mask_lsb) -#define mfc_dma1_mask (0x3LL << mfc_dma1_shift) -#define mfc_dma1_bits (0x1LL << mfc_dma1_shift) -#define mfc_dma2_mask_lsb 43 -#define mfc_dma2_shift (63 - mfc_dma2_mask_lsb) -#define mfc_dma2_mask (0x3LL << mfc_dma2_shift) -#define mfc_dma2_bits (0x1LL << mfc_dma2_shift) - u8 pad_0x940_0xa38[0xf8]; /* 0x940 */ - u64 smm_signal_sel; /* 0xa38 */ -#define smm_sig_mask_lsb 12 -#define smm_sig_shift (63 - smm_sig_mask_lsb) -#define smm_sig_mask (0x3LL << smm_sig_shift) -#define smm_sig_bus0_bits (0x2LL << smm_sig_shift) -#define smm_sig_bus2_bits (0x1LL << smm_sig_shift) - u8 pad_0xa40_0xc00[0xc00 - 0xa40]; /* 0xa40 */ - - /* DMA Command Error Area */ - u64 mfc_cer_R; /* 0xc00 */ -#define MFC_CER_Q (1 << 31) -#define MFC_CER_SPU_QUEUE MFC_CER_Q - u8 pad_0xc08_0x1000[0x1000 - 0xc08]; /* 0xc08 */ - - /* PV1_ImplRegs: Implementation-dependent privileged-state 1 regs */ - /* DMA Command Error Area */ - u64 spu_ecc_cntl_RW; /* 0x1000 */ -#define SPU_ECC_CNTL_E (1ull << 0ull) -#define SPU_ECC_CNTL_ENABLE SPU_ECC_CNTL_E -#define SPU_ECC_CNTL_DISABLE (~SPU_ECC_CNTL_E & 1L) -#define SPU_ECC_CNTL_S (1ull << 1ull) -#define SPU_ECC_STOP_AFTER_ERROR SPU_ECC_CNTL_S -#define SPU_ECC_CONTINUE_AFTER_ERROR (~SPU_ECC_CNTL_S & 2L) -#define SPU_ECC_CNTL_B (1ull << 2ull) -#define SPU_ECC_BACKGROUND_ENABLE SPU_ECC_CNTL_B -#define SPU_ECC_BACKGROUND_DISABLE (~SPU_ECC_CNTL_B & 4L) -#define SPU_ECC_CNTL_I_SHIFT 3ull -#define SPU_ECC_CNTL_I_MASK (3ull << SPU_ECC_CNTL_I_SHIFT) -#define SPU_ECC_WRITE_ALWAYS (~SPU_ECC_CNTL_I & 12L) -#define SPU_ECC_WRITE_CORRECTABLE (1ull << SPU_ECC_CNTL_I_SHIFT) -#define SPU_ECC_WRITE_UNCORRECTABLE (3ull << SPU_ECC_CNTL_I_SHIFT) -#define SPU_ECC_CNTL_D (1ull << 5ull) -#define SPU_ECC_DETECTION_ENABLE SPU_ECC_CNTL_D -#define SPU_ECC_DETECTION_DISABLE (~SPU_ECC_CNTL_D & 32L) - u64 spu_ecc_stat_RW; /* 0x1008 */ -#define SPU_ECC_CORRECTED_ERROR (1ull << 0ul) -#define SPU_ECC_UNCORRECTED_ERROR (1ull << 1ul) -#define SPU_ECC_SCRUB_COMPLETE (1ull << 2ul) -#define SPU_ECC_SCRUB_IN_PROGRESS (1ull << 3ul) -#define SPU_ECC_INSTRUCTION_ERROR (1ull << 4ul) -#define SPU_ECC_DATA_ERROR (1ull << 5ul) -#define SPU_ECC_DMA_ERROR (1ull << 6ul) -#define SPU_ECC_STATUS_CNT_MASK (256ull << 8) - u64 spu_ecc_addr_RW; /* 0x1010 */ - u64 spu_err_mask_RW; /* 0x1018 */ -#define SPU_ERR_ILLEGAL_INSTR (1ull << 0ul) -#define SPU_ERR_ILLEGAL_CHANNEL (1ull << 1ul) - u8 pad_0x1020_0x1028[0x1028 - 0x1020]; /* 0x1020 */ - - /* SPU Debug-Trace Bus (DTB) Selection Registers */ - u64 spu_trig0_sel; /* 0x1028 */ - u64 spu_trig1_sel; /* 0x1030 */ - u64 spu_trig2_sel; /* 0x1038 */ - u64 spu_trig3_sel; /* 0x1040 */ - u64 spu_trace_sel; /* 0x1048 */ -#define spu_trace_sel_mask 0x1f1fLL -#define spu_trace_sel_bus0_bits 0x1000LL -#define spu_trace_sel_bus2_bits 0x0010LL - u64 spu_event0_sel; /* 0x1050 */ - u64 spu_event1_sel; /* 0x1058 */ - u64 spu_event2_sel; /* 0x1060 */ - u64 spu_event3_sel; /* 0x1068 */ - u64 spu_trace_cntl; /* 0x1070 */ -} __attribute__ ((aligned(0x2000))); - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h deleted file mode 100644 index a40fd49..0000000 --- a/include/asm-powerpc/spu_csa.h +++ /dev/null @@ -1,266 +0,0 @@ -/* - * spu_csa.h: Definitions for SPU context save area (CSA). - * - * (C) Copyright IBM 2005 - * - * Author: Mark Nutter - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _SPU_CSA_H_ -#define _SPU_CSA_H_ -#ifdef __KERNEL__ - -/* - * Total number of 128-bit registers. - */ -#define NR_SPU_GPRS 128 -#define NR_SPU_SPRS 9 -#define NR_SPU_REGS_PAD 7 -#define NR_SPU_SPILL_REGS 144 /* GPRS + SPRS + PAD */ -#define SIZEOF_SPU_SPILL_REGS NR_SPU_SPILL_REGS * 16 - -#define SPU_SAVE_COMPLETE 0x3FFB -#define SPU_RESTORE_COMPLETE 0x3FFC - -/* - * Definitions for various 'stopped' status conditions, - * to be recreated during context restore. - */ -#define SPU_STOPPED_STATUS_P 1 -#define SPU_STOPPED_STATUS_I 2 -#define SPU_STOPPED_STATUS_H 3 -#define SPU_STOPPED_STATUS_S 4 -#define SPU_STOPPED_STATUS_S_I 5 -#define SPU_STOPPED_STATUS_S_P 6 -#define SPU_STOPPED_STATUS_P_H 7 -#define SPU_STOPPED_STATUS_P_I 8 -#define SPU_STOPPED_STATUS_R 9 - -/* - * Definitions for software decrementer status flag. - */ -#define SPU_DECR_STATUS_RUNNING 0x1 -#define SPU_DECR_STATUS_WRAPPED 0x2 - -#ifndef __ASSEMBLY__ -/** - * spu_reg128 - generic 128-bit register definition. - */ -struct spu_reg128 { - u32 slot[4]; -}; - -/** - * struct spu_lscsa - Local Store Context Save Area. - * @gprs: Array of saved registers. - * @fpcr: Saved floating point status control register. - * @decr: Saved decrementer value. - * @decr_status: Indicates software decrementer status flags. - * @ppu_mb: Saved PPU mailbox data. - * @ppuint_mb: Saved PPU interrupting mailbox data. - * @tag_mask: Saved tag group mask. - * @event_mask: Saved event mask. - * @srr0: Saved SRR0. - * @stopped_status: Conditions to be recreated by restore. - * @ls: Saved contents of Local Storage Area. - * - * The LSCSA represents state that is primarily saved and - * restored by SPU-side code. - */ -struct spu_lscsa { - struct spu_reg128 gprs[128]; - struct spu_reg128 fpcr; - struct spu_reg128 decr; - struct spu_reg128 decr_status; - struct spu_reg128 ppu_mb; - struct spu_reg128 ppuint_mb; - struct spu_reg128 tag_mask; - struct spu_reg128 event_mask; - struct spu_reg128 srr0; - struct spu_reg128 stopped_status; - - /* - * 'ls' must be page-aligned on all configurations. - * Since we don't want to rely on having the spu-gcc - * installed to build the kernel and this structure - * is used in the SPU-side code, make it 64k-page - * aligned for now. - */ - unsigned char ls[LS_SIZE] __attribute__((aligned(65536))); -}; - -#ifndef __SPU__ -/* - * struct spu_problem_collapsed - condensed problem state area, w/o pads. - */ -struct spu_problem_collapsed { - u64 spc_mssync_RW; - u32 mfc_lsa_W; - u32 unused_pad0; - u64 mfc_ea_W; - union mfc_tag_size_class_cmd mfc_union_W; - u32 dma_qstatus_R; - u32 dma_querytype_RW; - u32 dma_querymask_RW; - u32 dma_tagstatus_R; - u32 pu_mb_R; - u32 spu_mb_W; - u32 mb_stat_R; - u32 spu_runcntl_RW; - u32 spu_status_R; - u32 spu_spc_R; - u32 spu_npc_RW; - u32 signal_notify1; - u32 signal_notify2; - u32 unused_pad1; -}; - -/* - * struct spu_priv1_collapsed - condensed privileged 1 area, w/o pads. - */ -struct spu_priv1_collapsed { - u64 mfc_sr1_RW; - u64 mfc_lpid_RW; - u64 spu_idr_RW; - u64 mfc_vr_RO; - u64 spu_vr_RO; - u64 int_mask_class0_RW; - u64 int_mask_class1_RW; - u64 int_mask_class2_RW; - u64 int_stat_class0_RW; - u64 int_stat_class1_RW; - u64 int_stat_class2_RW; - u64 int_route_RW; - u64 mfc_atomic_flush_RW; - u64 resource_allocation_groupID_RW; - u64 resource_allocation_enable_RW; - u64 mfc_fir_R; - u64 mfc_fir_status_or_W; - u64 mfc_fir_status_and_W; - u64 mfc_fir_mask_R; - u64 mfc_fir_mask_or_W; - u64 mfc_fir_mask_and_W; - u64 mfc_fir_chkstp_enable_RW; - u64 smf_sbi_signal_sel; - u64 smf_ato_signal_sel; - u64 tlb_index_hint_RO; - u64 tlb_index_W; - u64 tlb_vpn_RW; - u64 tlb_rpn_RW; - u64 tlb_invalidate_entry_W; - u64 tlb_invalidate_all_W; - u64 smm_hid; - u64 mfc_accr_RW; - u64 mfc_dsisr_RW; - u64 mfc_dar_RW; - u64 rmt_index_RW; - u64 rmt_data1_RW; - u64 mfc_dsir_R; - u64 mfc_lsacr_RW; - u64 mfc_lscrr_R; - u64 mfc_tclass_id_RW; - u64 mfc_rm_boundary; - u64 smf_dma_signal_sel; - u64 smm_signal_sel; - u64 mfc_cer_R; - u64 pu_ecc_cntl_RW; - u64 pu_ecc_stat_RW; - u64 spu_ecc_addr_RW; - u64 spu_err_mask_RW; - u64 spu_trig0_sel; - u64 spu_trig1_sel; - u64 spu_trig2_sel; - u64 spu_trig3_sel; - u64 spu_trace_sel; - u64 spu_event0_sel; - u64 spu_event1_sel; - u64 spu_event2_sel; - u64 spu_event3_sel; - u64 spu_trace_cntl; -}; - -/* - * struct spu_priv2_collapsed - condensed privileged 2 area, w/o pads. - */ -struct spu_priv2_collapsed { - u64 slb_index_W; - u64 slb_esid_RW; - u64 slb_vsid_RW; - u64 slb_invalidate_entry_W; - u64 slb_invalidate_all_W; - struct mfc_cq_sr spuq[16]; - struct mfc_cq_sr puq[8]; - u64 mfc_control_RW; - u64 puint_mb_R; - u64 spu_privcntl_RW; - u64 spu_lslr_RW; - u64 spu_chnlcntptr_RW; - u64 spu_chnlcnt_RW; - u64 spu_chnldata_RW; - u64 spu_cfg_RW; - u64 spu_tag_status_query_RW; - u64 spu_cmd_buf1_RW; - u64 spu_cmd_buf2_RW; - u64 spu_atomic_status_RW; -}; - -/** - * struct spu_state - * @lscsa: Local Store Context Save Area. - * @prob: Collapsed Problem State Area, w/o pads. - * @priv1: Collapsed Privileged 1 Area, w/o pads. - * @priv2: Collapsed Privileged 2 Area, w/o pads. - * @spu_chnlcnt_RW: Array of saved channel counts. - * @spu_chnldata_RW: Array of saved channel data. - * @suspend_time: Time stamp when decrementer disabled. - * - * Structure representing the whole of the SPU - * context save area (CSA). This struct contains - * all of the state necessary to suspend and then - * later optionally resume execution of an SPU - * context. - * - * The @lscsa region is by far the largest, and is - * allocated separately so that it may either be - * pinned or mapped to/from application memory, as - * appropriate for the OS environment. - */ -struct spu_state { - struct spu_lscsa *lscsa; -#ifdef CONFIG_SPU_FS_64K_LS - int use_big_pages; - /* One struct page per 64k page */ -#define SPU_LSCSA_NUM_BIG_PAGES (sizeof(struct spu_lscsa) / 0x10000) - struct page *lscsa_pages[SPU_LSCSA_NUM_BIG_PAGES]; -#endif - struct spu_problem_collapsed prob; - struct spu_priv1_collapsed priv1; - struct spu_priv2_collapsed priv2; - u64 spu_chnlcnt_RW[32]; - u64 spu_chnldata_RW[32]; - u32 spu_mailbox_data[4]; - u32 pu_mailbox_data[1]; - u64 class_0_dar, class_0_pending; - u64 class_1_dar, class_1_dsisr; - unsigned long suspend_time; - spinlock_t register_lock; -}; - -#endif /* !__SPU__ */ -#endif /* __KERNEL__ */ -#endif /* !__ASSEMBLY__ */ -#endif /* _SPU_CSA_H_ */ diff --git a/include/asm-powerpc/spu_info.h b/include/asm-powerpc/spu_info.h deleted file mode 100644 index 3545efb..0000000 --- a/include/asm-powerpc/spu_info.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * SPU info structures - * - * (C) Copyright 2006 IBM Corp. - * - * Author: Dwayne Grant McConnell - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef _SPU_INFO_H -#define _SPU_INFO_H - -#ifdef __KERNEL__ -#include -#include -#else -struct mfc_cq_sr { - __u64 mfc_cq_data0_RW; - __u64 mfc_cq_data1_RW; - __u64 mfc_cq_data2_RW; - __u64 mfc_cq_data3_RW; -}; -#endif /* __KERNEL__ */ - -struct spu_dma_info { - __u64 dma_info_type; - __u64 dma_info_mask; - __u64 dma_info_status; - __u64 dma_info_stall_and_notify; - __u64 dma_info_atomic_command_status; - struct mfc_cq_sr dma_info_command_data[16]; -}; - -struct spu_proxydma_info { - __u64 proxydma_info_type; - __u64 proxydma_info_mask; - __u64 proxydma_info_status; - struct mfc_cq_sr proxydma_info_command_data[8]; -}; - -#endif diff --git a/include/asm-powerpc/spu_priv1.h b/include/asm-powerpc/spu_priv1.h deleted file mode 100644 index 25020a3..0000000 --- a/include/asm-powerpc/spu_priv1.h +++ /dev/null @@ -1,236 +0,0 @@ -/* - * Defines an spu hypervisor abstraction layer. - * - * Copyright 2006 Sony Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#if !defined(_SPU_PRIV1_H) -#define _SPU_PRIV1_H -#if defined(__KERNEL__) - -#include - -struct spu; -struct spu_context; - -/* access to priv1 registers */ - -struct spu_priv1_ops { - void (*int_mask_and) (struct spu *spu, int class, u64 mask); - void (*int_mask_or) (struct spu *spu, int class, u64 mask); - void (*int_mask_set) (struct spu *spu, int class, u64 mask); - u64 (*int_mask_get) (struct spu *spu, int class); - void (*int_stat_clear) (struct spu *spu, int class, u64 stat); - u64 (*int_stat_get) (struct spu *spu, int class); - void (*cpu_affinity_set) (struct spu *spu, int cpu); - u64 (*mfc_dar_get) (struct spu *spu); - u64 (*mfc_dsisr_get) (struct spu *spu); - void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr); - void (*mfc_sdr_setup) (struct spu *spu); - void (*mfc_sr1_set) (struct spu *spu, u64 sr1); - u64 (*mfc_sr1_get) (struct spu *spu); - void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id); - u64 (*mfc_tclass_id_get) (struct spu *spu); - void (*tlb_invalidate) (struct spu *spu); - void (*resource_allocation_groupID_set) (struct spu *spu, u64 id); - u64 (*resource_allocation_groupID_get) (struct spu *spu); - void (*resource_allocation_enable_set) (struct spu *spu, u64 enable); - u64 (*resource_allocation_enable_get) (struct spu *spu); -}; - -extern const struct spu_priv1_ops* spu_priv1_ops; - -static inline void -spu_int_mask_and (struct spu *spu, int class, u64 mask) -{ - spu_priv1_ops->int_mask_and(spu, class, mask); -} - -static inline void -spu_int_mask_or (struct spu *spu, int class, u64 mask) -{ - spu_priv1_ops->int_mask_or(spu, class, mask); -} - -static inline void -spu_int_mask_set (struct spu *spu, int class, u64 mask) -{ - spu_priv1_ops->int_mask_set(spu, class, mask); -} - -static inline u64 -spu_int_mask_get (struct spu *spu, int class) -{ - return spu_priv1_ops->int_mask_get(spu, class); -} - -static inline void -spu_int_stat_clear (struct spu *spu, int class, u64 stat) -{ - spu_priv1_ops->int_stat_clear(spu, class, stat); -} - -static inline u64 -spu_int_stat_get (struct spu *spu, int class) -{ - return spu_priv1_ops->int_stat_get (spu, class); -} - -static inline void -spu_cpu_affinity_set (struct spu *spu, int cpu) -{ - spu_priv1_ops->cpu_affinity_set(spu, cpu); -} - -static inline u64 -spu_mfc_dar_get (struct spu *spu) -{ - return spu_priv1_ops->mfc_dar_get(spu); -} - -static inline u64 -spu_mfc_dsisr_get (struct spu *spu) -{ - return spu_priv1_ops->mfc_dsisr_get(spu); -} - -static inline void -spu_mfc_dsisr_set (struct spu *spu, u64 dsisr) -{ - spu_priv1_ops->mfc_dsisr_set(spu, dsisr); -} - -static inline void -spu_mfc_sdr_setup (struct spu *spu) -{ - spu_priv1_ops->mfc_sdr_setup(spu); -} - -static inline void -spu_mfc_sr1_set (struct spu *spu, u64 sr1) -{ - spu_priv1_ops->mfc_sr1_set(spu, sr1); -} - -static inline u64 -spu_mfc_sr1_get (struct spu *spu) -{ - return spu_priv1_ops->mfc_sr1_get(spu); -} - -static inline void -spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id) -{ - spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id); -} - -static inline u64 -spu_mfc_tclass_id_get (struct spu *spu) -{ - return spu_priv1_ops->mfc_tclass_id_get(spu); -} - -static inline void -spu_tlb_invalidate (struct spu *spu) -{ - spu_priv1_ops->tlb_invalidate(spu); -} - -static inline void -spu_resource_allocation_groupID_set (struct spu *spu, u64 id) -{ - spu_priv1_ops->resource_allocation_groupID_set(spu, id); -} - -static inline u64 -spu_resource_allocation_groupID_get (struct spu *spu) -{ - return spu_priv1_ops->resource_allocation_groupID_get(spu); -} - -static inline void -spu_resource_allocation_enable_set (struct spu *spu, u64 enable) -{ - spu_priv1_ops->resource_allocation_enable_set(spu, enable); -} - -static inline u64 -spu_resource_allocation_enable_get (struct spu *spu) -{ - return spu_priv1_ops->resource_allocation_enable_get(spu); -} - -/* spu management abstraction */ - -struct spu_management_ops { - int (*enumerate_spus)(int (*fn)(void *data)); - int (*create_spu)(struct spu *spu, void *data); - int (*destroy_spu)(struct spu *spu); - void (*enable_spu)(struct spu_context *ctx); - void (*disable_spu)(struct spu_context *ctx); - int (*init_affinity)(void); -}; - -extern const struct spu_management_ops* spu_management_ops; - -static inline int -spu_enumerate_spus (int (*fn)(void *data)) -{ - return spu_management_ops->enumerate_spus(fn); -} - -static inline int -spu_create_spu (struct spu *spu, void *data) -{ - return spu_management_ops->create_spu(spu, data); -} - -static inline int -spu_destroy_spu (struct spu *spu) -{ - return spu_management_ops->destroy_spu(spu); -} - -static inline int -spu_init_affinity (void) -{ - return spu_management_ops->init_affinity(); -} - -static inline void -spu_enable_spu (struct spu_context *ctx) -{ - spu_management_ops->enable_spu(ctx); -} - -static inline void -spu_disable_spu (struct spu_context *ctx) -{ - spu_management_ops->disable_spu(ctx); -} - -/* - * The declarations folowing are put here for convenience - * and only intended to be used by the platform setup code. - */ - -extern const struct spu_priv1_ops spu_priv1_mmio_ops; -extern const struct spu_priv1_ops spu_priv1_beat_ops; - -extern const struct spu_management_ops spu_management_of_ops; - -#endif /* __KERNEL__ */ -#endif diff --git a/include/asm-powerpc/sstep.h b/include/asm-powerpc/sstep.h deleted file mode 100644 index f593b0f..0000000 --- a/include/asm-powerpc/sstep.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2004 Paul Mackerras , IBM - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -struct pt_regs; - -/* - * We don't allow single-stepping an mtmsrd that would clear - * MSR_RI, since that would make the exception unrecoverable. - * Since we need to single-step to proceed from a breakpoint, - * we don't allow putting a breakpoint on an mtmsrd instruction. - * Similarly we don't allow breakpoints on rfid instructions. - * These macros tell us if an instruction is a mtmsrd or rfid. - * Note that IS_MTMSRD returns true for both an mtmsr (32-bit) - * and an mtmsrd (64-bit). - */ -#define IS_MTMSRD(instr) (((instr) & 0xfc0007be) == 0x7c000124) -#define IS_RFID(instr) (((instr) & 0xfc0007fe) == 0x4c000024) -#define IS_RFI(instr) (((instr) & 0xfc0007fe) == 0x4c000064) - -/* Emulate instructions that cause a transfer of control. */ -extern int emulate_step(struct pt_regs *regs, unsigned int instr); diff --git a/include/asm-powerpc/stat.h b/include/asm-powerpc/stat.h deleted file mode 100644 index e4edc51..0000000 --- a/include/asm-powerpc/stat.h +++ /dev/null @@ -1,81 +0,0 @@ -#ifndef _ASM_POWERPC_STAT_H -#define _ASM_POWERPC_STAT_H -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include - -#define STAT_HAVE_NSEC 1 - -#ifndef __powerpc64__ -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; -#endif /* !__powerpc64__ */ - -struct stat { - unsigned long st_dev; - ino_t st_ino; -#ifdef __powerpc64__ - nlink_t st_nlink; - mode_t st_mode; -#else - mode_t st_mode; - nlink_t st_nlink; -#endif - uid_t st_uid; - gid_t st_gid; - unsigned long st_rdev; - off_t st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -#ifdef __powerpc64__ - unsigned long __unused6; -#endif -}; - -/* This matches struct stat64 in glibc2.1. Only used for 32 bit. */ -struct stat64 { - unsigned long long st_dev; /* Device. */ - unsigned long long st_ino; /* File serial number. */ - unsigned int st_mode; /* File mode. */ - unsigned int st_nlink; /* Link count. */ - unsigned int st_uid; /* User ID of the file's owner. */ - unsigned int st_gid; /* Group ID of the file's group. */ - unsigned long long st_rdev; /* Device number, if device. */ - unsigned short __pad2; - long long st_size; /* Size of file, in bytes. */ - int st_blksize; /* Optimal block size for I/O. */ - long long st_blocks; /* Number 512-byte blocks allocated. */ - int st_atime; /* Time of last access. */ - unsigned int st_atime_nsec; - int st_mtime; /* Time of last modification. */ - unsigned int st_mtime_nsec; - int st_ctime; /* Time of last status change. */ - unsigned int st_ctime_nsec; - unsigned int __unused4; - unsigned int __unused5; -}; - -#endif /* _ASM_POWERPC_STAT_H */ diff --git a/include/asm-powerpc/statfs.h b/include/asm-powerpc/statfs.h deleted file mode 100644 index 6702402..0000000 --- a/include/asm-powerpc/statfs.h +++ /dev/null @@ -1,60 +0,0 @@ -#ifndef _ASM_POWERPC_STATFS_H -#define _ASM_POWERPC_STATFS_H - -/* For ppc32 we just use the generic definitions, not so simple on ppc64 */ - -#ifndef __powerpc64__ -#include -#else - -#ifndef __KERNEL_STRICT_NAMES -#include -typedef __kernel_fsid_t fsid_t; -#endif - -/* - * We're already 64-bit, so duplicate the definition - */ -struct statfs { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct statfs64 { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct compat_statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; -#endif /* ! __powerpc64__ */ -#endif diff --git a/include/asm-powerpc/string.h b/include/asm-powerpc/string.h deleted file mode 100644 index e40010a..0000000 --- a/include/asm-powerpc/string.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _ASM_POWERPC_STRING_H -#define _ASM_POWERPC_STRING_H - -#ifdef __KERNEL__ - -#define __HAVE_ARCH_STRCPY -#define __HAVE_ARCH_STRNCPY -#define __HAVE_ARCH_STRLEN -#define __HAVE_ARCH_STRCMP -#define __HAVE_ARCH_STRNCMP -#define __HAVE_ARCH_STRCAT -#define __HAVE_ARCH_MEMSET -#define __HAVE_ARCH_MEMCPY -#define __HAVE_ARCH_MEMMOVE -#define __HAVE_ARCH_MEMCMP -#define __HAVE_ARCH_MEMCHR - -extern char * strcpy(char *,const char *); -extern char * strncpy(char *,const char *, __kernel_size_t); -extern __kernel_size_t strlen(const char *); -extern int strcmp(const char *,const char *); -extern int strncmp(const char *, const char *, __kernel_size_t); -extern char * strcat(char *, const char *); -extern void * memset(void *,int,__kernel_size_t); -extern void * memcpy(void *,const void *,__kernel_size_t); -extern void * memmove(void *,const void *,__kernel_size_t); -extern int memcmp(const void *,const void *,__kernel_size_t); -extern void * memchr(const void *,int,__kernel_size_t); - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_STRING_H */ diff --git a/include/asm-powerpc/suspend.h b/include/asm-powerpc/suspend.h deleted file mode 100644 index cbf2c94..0000000 --- a/include/asm-powerpc/suspend.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_POWERPC_SUSPEND_H -#define __ASM_POWERPC_SUSPEND_H - -static inline int arch_prepare_suspend(void) { return 0; } - -void save_processor_state(void); -void restore_processor_state(void); - -#endif /* __ASM_POWERPC_SUSPEND_H */ diff --git a/include/asm-powerpc/synch.h b/include/asm-powerpc/synch.h deleted file mode 100644 index 45963e8..0000000 --- a/include/asm-powerpc/synch.h +++ /dev/null @@ -1,44 +0,0 @@ -#ifndef _ASM_POWERPC_SYNCH_H -#define _ASM_POWERPC_SYNCH_H -#ifdef __KERNEL__ - -#include -#include - -#ifndef __ASSEMBLY__ -extern unsigned int __start___lwsync_fixup, __stop___lwsync_fixup; -extern void do_lwsync_fixups(unsigned long value, void *fixup_start, - void *fixup_end); - -static inline void eieio(void) -{ - __asm__ __volatile__ ("eieio" : : : "memory"); -} - -static inline void isync(void) -{ - __asm__ __volatile__ ("isync" : : : "memory"); -} -#endif /* __ASSEMBLY__ */ - -#if defined(__powerpc64__) -# define LWSYNC lwsync -#elif defined(CONFIG_E500) -# define LWSYNC \ - START_LWSYNC_SECTION(96); \ - sync; \ - MAKE_LWSYNC_SECTION_ENTRY(96, __lwsync_fixup); -#else -# define LWSYNC sync -#endif - -#ifdef CONFIG_SMP -#define ISYNC_ON_SMP "\n\tisync\n" -#define LWSYNC_ON_SMP stringify_in_c(LWSYNC) "\n" -#else -#define ISYNC_ON_SMP -#define LWSYNC_ON_SMP -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SYNCH_H */ diff --git a/include/asm-powerpc/syscall.h b/include/asm-powerpc/syscall.h deleted file mode 100644 index efa7f0b..0000000 --- a/include/asm-powerpc/syscall.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Access to user system call parameters and results - * - * Copyright (C) 2008 Red Hat, Inc. All rights reserved. - * - * This copyrighted material is made available to anyone wishing to use, - * modify, copy, or redistribute it subject to the terms and conditions - * of the GNU General Public License v.2. - * - * See asm-generic/syscall.h for descriptions of what we must do here. - */ - -#ifndef _ASM_SYSCALL_H -#define _ASM_SYSCALL_H 1 - -#include - -static inline long syscall_get_nr(struct task_struct *task, - struct pt_regs *regs) -{ - return TRAP(regs) == 0xc00 ? regs->gpr[0] : -1L; -} - -static inline void syscall_rollback(struct task_struct *task, - struct pt_regs *regs) -{ - regs->gpr[3] = regs->orig_gpr3; -} - -static inline long syscall_get_error(struct task_struct *task, - struct pt_regs *regs) -{ - return (regs->ccr & 0x1000) ? -regs->gpr[3] : 0; -} - -static inline long syscall_get_return_value(struct task_struct *task, - struct pt_regs *regs) -{ - return regs->gpr[3]; -} - -static inline void syscall_set_return_value(struct task_struct *task, - struct pt_regs *regs, - int error, long val) -{ - if (error) { - regs->ccr |= 0x1000L; - regs->gpr[3] = -error; - } else { - regs->ccr &= ~0x1000L; - regs->gpr[3] = val; - } -} - -static inline void syscall_get_arguments(struct task_struct *task, - struct pt_regs *regs, - unsigned int i, unsigned int n, - unsigned long *args) -{ - BUG_ON(i + n > 6); -#ifdef CONFIG_PPC64 - if (test_tsk_thread_flag(task, TIF_32BIT)) { - /* - * Zero-extend 32-bit argument values. The high bits are - * garbage ignored by the actual syscall dispatch. - */ - while (n-- > 0) - args[n] = (u32) regs->gpr[3 + i + n]; - return; - } -#endif - memcpy(args, ®s->gpr[3 + i], n * sizeof(args[0])); -} - -static inline void syscall_set_arguments(struct task_struct *task, - struct pt_regs *regs, - unsigned int i, unsigned int n, - const unsigned long *args) -{ - BUG_ON(i + n > 6); - memcpy(®s->gpr[3 + i], args, n * sizeof(args[0])); -} - -#endif /* _ASM_SYSCALL_H */ diff --git a/include/asm-powerpc/syscalls.h b/include/asm-powerpc/syscalls.h deleted file mode 100644 index eb8eb40..0000000 --- a/include/asm-powerpc/syscalls.h +++ /dev/null @@ -1,52 +0,0 @@ -#ifndef __ASM_POWERPC_SYSCALLS_H -#define __ASM_POWERPC_SYSCALLS_H -#ifdef __KERNEL__ - -#include -#include -#include -#include - -struct new_utsname; -struct pt_regs; -struct rtas_args; -struct sigaction; - -asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, off_t offset); -asmlinkage unsigned long sys_mmap2(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff); -asmlinkage int sys_execve(unsigned long a0, unsigned long a1, - unsigned long a2, unsigned long a3, unsigned long a4, - unsigned long a5, struct pt_regs *regs); -asmlinkage int sys_clone(unsigned long clone_flags, unsigned long usp, - int __user *parent_tidp, void __user *child_threadptr, - int __user *child_tidp, int p6, struct pt_regs *regs); -asmlinkage int sys_fork(unsigned long p1, unsigned long p2, - unsigned long p3, unsigned long p4, unsigned long p5, - unsigned long p6, struct pt_regs *regs); -asmlinkage int sys_vfork(unsigned long p1, unsigned long p2, - unsigned long p3, unsigned long p4, unsigned long p5, - unsigned long p6, struct pt_regs *regs); -asmlinkage long sys_pipe(int __user *fildes); -asmlinkage long sys_pipe2(int __user *fildes, int flags); -asmlinkage long sys_rt_sigaction(int sig, - const struct sigaction __user *act, - struct sigaction __user *oact, size_t sigsetsize); -asmlinkage int sys_ipc(uint call, int first, unsigned long second, - long third, void __user *ptr, long fifth); -asmlinkage long ppc64_personality(unsigned long personality); -asmlinkage int ppc_rtas(struct rtas_args __user *uargs); -asmlinkage time_t sys64_time(time_t __user * tloc); -asmlinkage long ppc_newuname(struct new_utsname __user * name); - -asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, - size_t sigsetsize); -asmlinkage long sys_sigaltstack(const stack_t __user *uss, - stack_t __user *uoss, unsigned long r5, unsigned long r6, - unsigned long r7, unsigned long r8, struct pt_regs *regs); - -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_SYSCALLS_H */ diff --git a/include/asm-powerpc/systbl.h b/include/asm-powerpc/systbl.h deleted file mode 100644 index e084272..0000000 --- a/include/asm-powerpc/systbl.h +++ /dev/null @@ -1,324 +0,0 @@ -/* - * List of powerpc syscalls. For the meaning of the _SPU suffix see - * arch/powerpc/platforms/cell/spu_callbacks.c - */ - -SYSCALL(restart_syscall) -SYSCALL(exit) -PPC_SYS(fork) -SYSCALL_SPU(read) -SYSCALL_SPU(write) -COMPAT_SYS_SPU(open) -SYSCALL_SPU(close) -COMPAT_SYS_SPU(waitpid) -COMPAT_SYS_SPU(creat) -SYSCALL_SPU(link) -SYSCALL_SPU(unlink) -COMPAT_SYS(execve) -SYSCALL_SPU(chdir) -COMPAT_SYS_SPU(time) -SYSCALL_SPU(mknod) -SYSCALL_SPU(chmod) -SYSCALL_SPU(lchown) -SYSCALL(ni_syscall) -OLDSYS(stat) -SYSX_SPU(sys_lseek,ppc32_lseek,sys_lseek) -SYSCALL_SPU(getpid) -COMPAT_SYS(mount) -SYSX(sys_ni_syscall,sys_oldumount,sys_oldumount) -SYSCALL_SPU(setuid) -SYSCALL_SPU(getuid) -COMPAT_SYS_SPU(stime) -COMPAT_SYS(ptrace) -SYSCALL_SPU(alarm) -OLDSYS(fstat) -COMPAT_SYS(pause) -COMPAT_SYS(utime) -SYSCALL(ni_syscall) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(access) -COMPAT_SYS_SPU(nice) -SYSCALL(ni_syscall) -SYSCALL_SPU(sync) -COMPAT_SYS_SPU(kill) -SYSCALL_SPU(rename) -COMPAT_SYS_SPU(mkdir) -SYSCALL_SPU(rmdir) -SYSCALL_SPU(dup) -SYSCALL_SPU(pipe) -COMPAT_SYS_SPU(times) -SYSCALL(ni_syscall) -SYSCALL_SPU(brk) -SYSCALL_SPU(setgid) -SYSCALL_SPU(getgid) -SYSCALL(signal) -SYSCALL_SPU(geteuid) -SYSCALL_SPU(getegid) -SYSCALL(acct) -SYSCALL(umount) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(ioctl) -COMPAT_SYS_SPU(fcntl) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(setpgid) -SYSCALL(ni_syscall) -SYSX(sys_ni_syscall,sys_olduname, sys_olduname) -COMPAT_SYS_SPU(umask) -SYSCALL_SPU(chroot) -SYSCALL(ustat) -SYSCALL_SPU(dup2) -SYSCALL_SPU(getppid) -SYSCALL_SPU(getpgrp) -SYSCALL_SPU(setsid) -SYS32ONLY(sigaction) -SYSCALL_SPU(sgetmask) -COMPAT_SYS_SPU(ssetmask) -SYSCALL_SPU(setreuid) -SYSCALL_SPU(setregid) -SYS32ONLY(sigsuspend) -COMPAT_SYS(sigpending) -COMPAT_SYS_SPU(sethostname) -COMPAT_SYS_SPU(setrlimit) -COMPAT_SYS(old_getrlimit) -COMPAT_SYS_SPU(getrusage) -COMPAT_SYS_SPU(gettimeofday) -COMPAT_SYS_SPU(settimeofday) -COMPAT_SYS_SPU(getgroups) -COMPAT_SYS_SPU(setgroups) -SYSX(sys_ni_syscall,sys_ni_syscall,ppc_select) -SYSCALL_SPU(symlink) -OLDSYS(lstat) -COMPAT_SYS_SPU(readlink) -SYSCALL(uselib) -SYSCALL(swapon) -SYSCALL(reboot) -SYSX(sys_ni_syscall,old32_readdir,old_readdir) -SYSCALL_SPU(mmap) -SYSCALL_SPU(munmap) -SYSCALL_SPU(truncate) -SYSCALL_SPU(ftruncate) -SYSCALL_SPU(fchmod) -SYSCALL_SPU(fchown) -COMPAT_SYS_SPU(getpriority) -COMPAT_SYS_SPU(setpriority) -SYSCALL(ni_syscall) -COMPAT_SYS(statfs) -COMPAT_SYS(fstatfs) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(socketcall) -COMPAT_SYS_SPU(syslog) -COMPAT_SYS_SPU(setitimer) -COMPAT_SYS_SPU(getitimer) -COMPAT_SYS_SPU(newstat) -COMPAT_SYS_SPU(newlstat) -COMPAT_SYS_SPU(newfstat) -SYSX(sys_ni_syscall,sys_uname,sys_uname) -SYSCALL(ni_syscall) -SYSCALL_SPU(vhangup) -SYSCALL(ni_syscall) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(wait4) -SYSCALL(swapoff) -COMPAT_SYS_SPU(sysinfo) -COMPAT_SYS(ipc) -SYSCALL_SPU(fsync) -SYS32ONLY(sigreturn) -PPC_SYS(clone) -COMPAT_SYS_SPU(setdomainname) -PPC_SYS_SPU(newuname) -SYSCALL(ni_syscall) -COMPAT_SYS_SPU(adjtimex) -SYSCALL_SPU(mprotect) -SYSX(sys_ni_syscall,compat_sys_sigprocmask,sys_sigprocmask) -SYSCALL(ni_syscall) -SYSCALL(init_module) -SYSCALL(delete_module) -SYSCALL(ni_syscall) -SYSCALL(quotactl) -COMPAT_SYS_SPU(getpgid) -SYSCALL_SPU(fchdir) -SYSCALL_SPU(bdflush) -COMPAT_SYS(sysfs) -SYSX_SPU(ppc64_personality,ppc64_personality,sys_personality) -SYSCALL(ni_syscall) -SYSCALL_SPU(setfsuid) -SYSCALL_SPU(setfsgid) -SYSCALL_SPU(llseek) -COMPAT_SYS_SPU(getdents) -SYSX_SPU(sys_select,ppc32_select,ppc_select) -SYSCALL_SPU(flock) -SYSCALL_SPU(msync) -COMPAT_SYS_SPU(readv) -COMPAT_SYS_SPU(writev) -COMPAT_SYS_SPU(getsid) -SYSCALL_SPU(fdatasync) -COMPAT_SYS(sysctl) -SYSCALL_SPU(mlock) -SYSCALL_SPU(munlock) -SYSCALL_SPU(mlockall) -SYSCALL_SPU(munlockall) -COMPAT_SYS_SPU(sched_setparam) -COMPAT_SYS_SPU(sched_getparam) -COMPAT_SYS_SPU(sched_setscheduler) -COMPAT_SYS_SPU(sched_getscheduler) -SYSCALL_SPU(sched_yield) -COMPAT_SYS_SPU(sched_get_priority_max) -COMPAT_SYS_SPU(sched_get_priority_min) -COMPAT_SYS_SPU(sched_rr_get_interval) -COMPAT_SYS_SPU(nanosleep) -SYSCALL_SPU(mremap) -SYSCALL_SPU(setresuid) -SYSCALL_SPU(getresuid) -SYSCALL(ni_syscall) -SYSCALL_SPU(poll) -COMPAT_SYS(nfsservctl) -SYSCALL_SPU(setresgid) -SYSCALL_SPU(getresgid) -COMPAT_SYS_SPU(prctl) -COMPAT_SYS(rt_sigreturn) -COMPAT_SYS(rt_sigaction) -COMPAT_SYS(rt_sigprocmask) -COMPAT_SYS(rt_sigpending) -COMPAT_SYS(rt_sigtimedwait) -COMPAT_SYS(rt_sigqueueinfo) -COMPAT_SYS(rt_sigsuspend) -COMPAT_SYS_SPU(pread64) -COMPAT_SYS_SPU(pwrite64) -SYSCALL_SPU(chown) -SYSCALL_SPU(getcwd) -SYSCALL_SPU(capget) -SYSCALL_SPU(capset) -COMPAT_SYS(sigaltstack) -SYSX_SPU(sys_sendfile64,compat_sys_sendfile,sys_sendfile) -SYSCALL(ni_syscall) -SYSCALL(ni_syscall) -PPC_SYS(vfork) -COMPAT_SYS_SPU(getrlimit) -COMPAT_SYS_SPU(readahead) -SYS32ONLY(mmap2) -SYS32ONLY(truncate64) -SYS32ONLY(ftruncate64) -SYSX(sys_ni_syscall,sys_stat64,sys_stat64) -SYSX(sys_ni_syscall,sys_lstat64,sys_lstat64) -SYSX(sys_ni_syscall,sys_fstat64,sys_fstat64) -SYSCALL(pciconfig_read) -SYSCALL(pciconfig_write) -SYSCALL(pciconfig_iobase) -SYSCALL(ni_syscall) -SYSCALL_SPU(getdents64) -SYSCALL_SPU(pivot_root) -SYSX(sys_ni_syscall,compat_sys_fcntl64,sys_fcntl64) -SYSCALL_SPU(madvise) -SYSCALL_SPU(mincore) -SYSCALL_SPU(gettid) -SYSCALL_SPU(tkill) -SYSCALL_SPU(setxattr) -SYSCALL_SPU(lsetxattr) -SYSCALL_SPU(fsetxattr) -SYSCALL_SPU(getxattr) -SYSCALL_SPU(lgetxattr) -SYSCALL_SPU(fgetxattr) -SYSCALL_SPU(listxattr) -SYSCALL_SPU(llistxattr) -SYSCALL_SPU(flistxattr) -SYSCALL_SPU(removexattr) -SYSCALL_SPU(lremovexattr) -SYSCALL_SPU(fremovexattr) -COMPAT_SYS_SPU(futex) -COMPAT_SYS_SPU(sched_setaffinity) -COMPAT_SYS_SPU(sched_getaffinity) -SYSCALL(ni_syscall) -SYSCALL(ni_syscall) -SYS32ONLY(sendfile64) -COMPAT_SYS_SPU(io_setup) -SYSCALL_SPU(io_destroy) -COMPAT_SYS_SPU(io_getevents) -COMPAT_SYS_SPU(io_submit) -SYSCALL_SPU(io_cancel) -SYSCALL(set_tid_address) -SYSX_SPU(sys_fadvise64,ppc32_fadvise64,sys_fadvise64) -SYSCALL(exit_group) -SYSX(sys_lookup_dcookie,ppc32_lookup_dcookie,sys_lookup_dcookie) -SYSCALL_SPU(epoll_create) -SYSCALL_SPU(epoll_ctl) -SYSCALL_SPU(epoll_wait) -SYSCALL_SPU(remap_file_pages) -SYSX_SPU(sys_timer_create,compat_sys_timer_create,sys_timer_create) -COMPAT_SYS_SPU(timer_settime) -COMPAT_SYS_SPU(timer_gettime) -SYSCALL_SPU(timer_getoverrun) -SYSCALL_SPU(timer_delete) -COMPAT_SYS_SPU(clock_settime) -COMPAT_SYS_SPU(clock_gettime) -COMPAT_SYS_SPU(clock_getres) -COMPAT_SYS_SPU(clock_nanosleep) -SYSX(ppc64_swapcontext,ppc32_swapcontext,ppc_swapcontext) -COMPAT_SYS_SPU(tgkill) -COMPAT_SYS_SPU(utimes) -COMPAT_SYS_SPU(statfs64) -COMPAT_SYS_SPU(fstatfs64) -SYSX(sys_ni_syscall, ppc_fadvise64_64, ppc_fadvise64_64) -PPC_SYS_SPU(rtas) -OLDSYS(debug_setcontext) -SYSCALL(ni_syscall) -COMPAT_SYS(migrate_pages) -COMPAT_SYS(mbind) -COMPAT_SYS(get_mempolicy) -COMPAT_SYS(set_mempolicy) -COMPAT_SYS(mq_open) -SYSCALL(mq_unlink) -COMPAT_SYS(mq_timedsend) -COMPAT_SYS(mq_timedreceive) -COMPAT_SYS(mq_notify) -COMPAT_SYS(mq_getsetattr) -COMPAT_SYS(kexec_load) -COMPAT_SYS(add_key) -COMPAT_SYS(request_key) -COMPAT_SYS(keyctl) -COMPAT_SYS(waitid) -COMPAT_SYS(ioprio_set) -COMPAT_SYS(ioprio_get) -SYSCALL(inotify_init) -SYSCALL(inotify_add_watch) -SYSCALL(inotify_rm_watch) -SYSCALL(spu_run) -SYSCALL(spu_create) -COMPAT_SYS(pselect6) -COMPAT_SYS(ppoll) -SYSCALL_SPU(unshare) -SYSCALL_SPU(splice) -SYSCALL_SPU(tee) -COMPAT_SYS_SPU(vmsplice) -COMPAT_SYS_SPU(openat) -SYSCALL_SPU(mkdirat) -SYSCALL_SPU(mknodat) -SYSCALL_SPU(fchownat) -COMPAT_SYS_SPU(futimesat) -SYSX_SPU(sys_newfstatat, sys_fstatat64, sys_fstatat64) -SYSCALL_SPU(unlinkat) -SYSCALL_SPU(renameat) -SYSCALL_SPU(linkat) -SYSCALL_SPU(symlinkat) -SYSCALL_SPU(readlinkat) -SYSCALL_SPU(fchmodat) -SYSCALL_SPU(faccessat) -COMPAT_SYS_SPU(get_robust_list) -COMPAT_SYS_SPU(set_robust_list) -COMPAT_SYS_SPU(move_pages) -SYSCALL_SPU(getcpu) -COMPAT_SYS(epoll_pwait) -COMPAT_SYS_SPU(utimensat) -COMPAT_SYS_SPU(signalfd) -SYSCALL_SPU(timerfd_create) -SYSCALL_SPU(eventfd) -COMPAT_SYS_SPU(sync_file_range2) -COMPAT_SYS(fallocate) -SYSCALL(subpage_prot) -COMPAT_SYS_SPU(timerfd_settime) -COMPAT_SYS_SPU(timerfd_gettime) -COMPAT_SYS_SPU(signalfd4) -SYSCALL_SPU(eventfd2) -SYSCALL_SPU(epoll_create1) -SYSCALL_SPU(dup3) -SYSCALL_SPU(pipe2) -SYSCALL(inotify_init1) diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h deleted file mode 100644 index d6648c143..0000000 --- a/include/asm-powerpc/system.h +++ /dev/null @@ -1,548 +0,0 @@ -/* - * Copyright (C) 1999 Cort Dougan - */ -#ifndef _ASM_POWERPC_SYSTEM_H -#define _ASM_POWERPC_SYSTEM_H - -#include -#include - -#include - -/* - * Memory barrier. - * The sync instruction guarantees that all memory accesses initiated - * by this processor have been performed (with respect to all other - * mechanisms that access memory). The eieio instruction is a barrier - * providing an ordering (separately) for (a) cacheable stores and (b) - * loads and stores to non-cacheable memory (e.g. I/O devices). - * - * mb() prevents loads and stores being reordered across this point. - * rmb() prevents loads being reordered across this point. - * wmb() prevents stores being reordered across this point. - * read_barrier_depends() prevents data-dependent loads being reordered - * across this point (nop on PPC). - * - * We have to use the sync instructions for mb(), since lwsync doesn't - * order loads with respect to previous stores. Lwsync is fine for - * rmb(), though. Note that rmb() actually uses a sync on 32-bit - * architectures. - * - * For wmb(), we use sync since wmb is used in drivers to order - * stores to system memory with respect to writes to the device. - * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier - * on SMP since it is only used to order updates to system memory. - */ -#define mb() __asm__ __volatile__ ("sync" : : : "memory") -#define rmb() __asm__ __volatile__ ("sync" : : : "memory") -#define wmb() __asm__ __volatile__ ("sync" : : : "memory") -#define read_barrier_depends() do { } while(0) - -#define set_mb(var, value) do { var = value; mb(); } while (0) - -#ifdef __KERNEL__ -#define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ -#ifdef CONFIG_SMP - -#ifdef __SUBARCH_HAS_LWSYNC -# define SMPWMB lwsync -#else -# define SMPWMB eieio -#endif - -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() __asm__ __volatile__ (__stringify(SMPWMB) : : :"memory") -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif /* CONFIG_SMP */ - -/* - * This is a barrier which prevents following instructions from being - * started until the value of the argument x is known. For example, if - * x is a variable loaded from memory, this prevents following - * instructions from being executed until the load has been performed. - */ -#define data_barrier(x) \ - asm volatile("twi 0,%0,0; isync" : : "r" (x) : "memory"); - -struct task_struct; -struct pt_regs; - -#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) - -extern int (*__debugger)(struct pt_regs *regs); -extern int (*__debugger_ipi)(struct pt_regs *regs); -extern int (*__debugger_bpt)(struct pt_regs *regs); -extern int (*__debugger_sstep)(struct pt_regs *regs); -extern int (*__debugger_iabr_match)(struct pt_regs *regs); -extern int (*__debugger_dabr_match)(struct pt_regs *regs); -extern int (*__debugger_fault_handler)(struct pt_regs *regs); - -#define DEBUGGER_BOILERPLATE(__NAME) \ -static inline int __NAME(struct pt_regs *regs) \ -{ \ - if (unlikely(__ ## __NAME)) \ - return __ ## __NAME(regs); \ - return 0; \ -} - -DEBUGGER_BOILERPLATE(debugger) -DEBUGGER_BOILERPLATE(debugger_ipi) -DEBUGGER_BOILERPLATE(debugger_bpt) -DEBUGGER_BOILERPLATE(debugger_sstep) -DEBUGGER_BOILERPLATE(debugger_iabr_match) -DEBUGGER_BOILERPLATE(debugger_dabr_match) -DEBUGGER_BOILERPLATE(debugger_fault_handler) - -#else -static inline int debugger(struct pt_regs *regs) { return 0; } -static inline int debugger_ipi(struct pt_regs *regs) { return 0; } -static inline int debugger_bpt(struct pt_regs *regs) { return 0; } -static inline int debugger_sstep(struct pt_regs *regs) { return 0; } -static inline int debugger_iabr_match(struct pt_regs *regs) { return 0; } -static inline int debugger_dabr_match(struct pt_regs *regs) { return 0; } -static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } -#endif - -extern int set_dabr(unsigned long dabr); -extern void do_dabr(struct pt_regs *regs, unsigned long address, - unsigned long error_code); -extern void print_backtrace(unsigned long *); -extern void show_regs(struct pt_regs * regs); -extern void flush_instruction_cache(void); -extern void hard_reset_now(void); -extern void poweroff_now(void); - -#ifdef CONFIG_6xx -extern long _get_L2CR(void); -extern long _get_L3CR(void); -extern void _set_L2CR(unsigned long); -extern void _set_L3CR(unsigned long); -#else -#define _get_L2CR() 0L -#define _get_L3CR() 0L -#define _set_L2CR(val) do { } while(0) -#define _set_L3CR(val) do { } while(0) -#endif - -extern void via_cuda_init(void); -extern void read_rtc_time(void); -extern void pmac_find_display(void); -extern void giveup_fpu(struct task_struct *); -extern void disable_kernel_fp(void); -extern void enable_kernel_fp(void); -extern void flush_fp_to_thread(struct task_struct *); -extern void enable_kernel_altivec(void); -extern void giveup_altivec(struct task_struct *); -extern void load_up_altivec(struct task_struct *); -extern int emulate_altivec(struct pt_regs *); -extern void __giveup_vsx(struct task_struct *); -extern void giveup_vsx(struct task_struct *); -extern void enable_kernel_spe(void); -extern void giveup_spe(struct task_struct *); -extern void load_up_spe(struct task_struct *); -extern int fix_alignment(struct pt_regs *); -extern void cvt_fd(float *from, double *to, struct thread_struct *thread); -extern void cvt_df(double *from, float *to, struct thread_struct *thread); - -#ifndef CONFIG_SMP -extern void discard_lazy_cpu_state(void); -#else -static inline void discard_lazy_cpu_state(void) -{ -} -#endif - -#ifdef CONFIG_ALTIVEC -extern void flush_altivec_to_thread(struct task_struct *); -#else -static inline void flush_altivec_to_thread(struct task_struct *t) -{ -} -#endif - -#ifdef CONFIG_VSX -extern void flush_vsx_to_thread(struct task_struct *); -#else -static inline void flush_vsx_to_thread(struct task_struct *t) -{ -} -#endif - -#ifdef CONFIG_SPE -extern void flush_spe_to_thread(struct task_struct *); -#else -static inline void flush_spe_to_thread(struct task_struct *t) -{ -} -#endif - -extern int call_rtas(const char *, int, int, unsigned long *, ...); -extern void cacheable_memzero(void *p, unsigned int nb); -extern void *cacheable_memcpy(void *, const void *, unsigned int); -extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long); -extern void bad_page_fault(struct pt_regs *, unsigned long, int); -extern int die(const char *, struct pt_regs *, long); -extern void _exception(int, struct pt_regs *, int, unsigned long); -extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); - -#ifdef CONFIG_BOOKE_WDT -extern u32 booke_wdt_enabled; -extern u32 booke_wdt_period; -#endif /* CONFIG_BOOKE_WDT */ - -struct device_node; -extern void note_scsi_host(struct device_node *, void *); - -extern struct task_struct *__switch_to(struct task_struct *, - struct task_struct *); -#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next))) - -struct thread_struct; -extern struct task_struct *_switch(struct thread_struct *prev, - struct thread_struct *next); - -extern unsigned int rtas_data; -extern int mem_init_done; /* set on boot once kmalloc can be called */ -extern int init_bootmem_done; /* set on !NUMA once bootmem is available */ -extern unsigned long memory_limit; -extern unsigned long klimit; - -extern void *alloc_maybe_bootmem(size_t size, gfp_t mask); -extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask); - -extern int powersave_nap; /* set if nap mode can be used in idle loop */ - -/* - * Atomic exchange - * - * Changes the memory location '*ptr' to be val and returns - * the previous value stored there. - */ -static __always_inline unsigned long -__xchg_u32(volatile void *p, unsigned long val) -{ - unsigned long prev; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: lwarx %0,0,%2 \n" - PPC405_ERR77(0,%2) -" stwcx. %3,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (prev), "+m" (*(volatile unsigned int *)p) - : "r" (p), "r" (val) - : "cc", "memory"); - - return prev; -} - -/* - * Atomic exchange - * - * Changes the memory location '*ptr' to be val and returns - * the previous value stored there. - */ -static __always_inline unsigned long -__xchg_u32_local(volatile void *p, unsigned long val) -{ - unsigned long prev; - - __asm__ __volatile__( -"1: lwarx %0,0,%2 \n" - PPC405_ERR77(0,%2) -" stwcx. %3,0,%2 \n\ - bne- 1b" - : "=&r" (prev), "+m" (*(volatile unsigned int *)p) - : "r" (p), "r" (val) - : "cc", "memory"); - - return prev; -} - -#ifdef CONFIG_PPC64 -static __always_inline unsigned long -__xchg_u64(volatile void *p, unsigned long val) -{ - unsigned long prev; - - __asm__ __volatile__( - LWSYNC_ON_SMP -"1: ldarx %0,0,%2 \n" - PPC405_ERR77(0,%2) -" stdcx. %3,0,%2 \n\ - bne- 1b" - ISYNC_ON_SMP - : "=&r" (prev), "+m" (*(volatile unsigned long *)p) - : "r" (p), "r" (val) - : "cc", "memory"); - - return prev; -} - -static __always_inline unsigned long -__xchg_u64_local(volatile void *p, unsigned long val) -{ - unsigned long prev; - - __asm__ __volatile__( -"1: ldarx %0,0,%2 \n" - PPC405_ERR77(0,%2) -" stdcx. %3,0,%2 \n\ - bne- 1b" - : "=&r" (prev), "+m" (*(volatile unsigned long *)p) - : "r" (p), "r" (val) - : "cc", "memory"); - - return prev; -} -#endif - -/* - * This function doesn't exist, so you'll get a linker error - * if something tries to do an invalid xchg(). - */ -extern void __xchg_called_with_bad_pointer(void); - -static __always_inline unsigned long -__xchg(volatile void *ptr, unsigned long x, unsigned int size) -{ - switch (size) { - case 4: - return __xchg_u32(ptr, x); -#ifdef CONFIG_PPC64 - case 8: - return __xchg_u64(ptr, x); -#endif - } - __xchg_called_with_bad_pointer(); - return x; -} - -static __always_inline unsigned long -__xchg_local(volatile void *ptr, unsigned long x, unsigned int size) -{ - switch (size) { - case 4: - return __xchg_u32_local(ptr, x); -#ifdef CONFIG_PPC64 - case 8: - return __xchg_u64_local(ptr, x); -#endif - } - __xchg_called_with_bad_pointer(); - return x; -} -#define xchg(ptr,x) \ - ({ \ - __typeof__(*(ptr)) _x_ = (x); \ - (__typeof__(*(ptr))) __xchg((ptr), (unsigned long)_x_, sizeof(*(ptr))); \ - }) - -#define xchg_local(ptr,x) \ - ({ \ - __typeof__(*(ptr)) _x_ = (x); \ - (__typeof__(*(ptr))) __xchg_local((ptr), \ - (unsigned long)_x_, sizeof(*(ptr))); \ - }) - -/* - * Compare and exchange - if *p == old, set it to new, - * and return the old value of *p. - */ -#define __HAVE_ARCH_CMPXCHG 1 - -static __always_inline unsigned long -__cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) -{ - unsigned int prev; - - __asm__ __volatile__ ( - LWSYNC_ON_SMP -"1: lwarx %0,0,%2 # __cmpxchg_u32\n\ - cmpw 0,%0,%3\n\ - bne- 2f\n" - PPC405_ERR77(0,%2) -" stwcx. %4,0,%2\n\ - bne- 1b" - ISYNC_ON_SMP - "\n\ -2:" - : "=&r" (prev), "+m" (*p) - : "r" (p), "r" (old), "r" (new) - : "cc", "memory"); - - return prev; -} - -static __always_inline unsigned long -__cmpxchg_u32_local(volatile unsigned int *p, unsigned long old, - unsigned long new) -{ - unsigned int prev; - - __asm__ __volatile__ ( -"1: lwarx %0,0,%2 # __cmpxchg_u32\n\ - cmpw 0,%0,%3\n\ - bne- 2f\n" - PPC405_ERR77(0,%2) -" stwcx. %4,0,%2\n\ - bne- 1b" - "\n\ -2:" - : "=&r" (prev), "+m" (*p) - : "r" (p), "r" (old), "r" (new) - : "cc", "memory"); - - return prev; -} - -#ifdef CONFIG_PPC64 -static __always_inline unsigned long -__cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new) -{ - unsigned long prev; - - __asm__ __volatile__ ( - LWSYNC_ON_SMP -"1: ldarx %0,0,%2 # __cmpxchg_u64\n\ - cmpd 0,%0,%3\n\ - bne- 2f\n\ - stdcx. %4,0,%2\n\ - bne- 1b" - ISYNC_ON_SMP - "\n\ -2:" - : "=&r" (prev), "+m" (*p) - : "r" (p), "r" (old), "r" (new) - : "cc", "memory"); - - return prev; -} - -static __always_inline unsigned long -__cmpxchg_u64_local(volatile unsigned long *p, unsigned long old, - unsigned long new) -{ - unsigned long prev; - - __asm__ __volatile__ ( -"1: ldarx %0,0,%2 # __cmpxchg_u64\n\ - cmpd 0,%0,%3\n\ - bne- 2f\n\ - stdcx. %4,0,%2\n\ - bne- 1b" - "\n\ -2:" - : "=&r" (prev), "+m" (*p) - : "r" (p), "r" (old), "r" (new) - : "cc", "memory"); - - return prev; -} -#endif - -/* This function doesn't exist, so you'll get a linker error - if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -static __always_inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, - unsigned int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); -#ifdef CONFIG_PPC64 - case 8: - return __cmpxchg_u64(ptr, old, new); -#endif - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -static __always_inline unsigned long -__cmpxchg_local(volatile void *ptr, unsigned long old, unsigned long new, - unsigned int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32_local(ptr, old, new); -#ifdef CONFIG_PPC64 - case 8: - return __cmpxchg_u64_local(ptr, old, new); -#endif - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr, o, n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - - -#define cmpxchg_local(ptr, o, n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg_local((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -#ifdef CONFIG_PPC64 -/* - * We handle most unaligned accesses in hardware. On the other hand - * unaligned DMA can be very expensive on some ppc64 IO chips (it does - * powers of 2 writes until it reaches sufficient alignment). - * - * Based on this we disable the IP header alignment in network drivers. - * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining - * cacheline alignment of buffers. - */ -#define NET_IP_ALIGN 0 -#define NET_SKB_PAD L1_CACHE_BYTES - -#define cmpxchg64(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg((ptr), (o), (n)); \ - }) -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) -#else -#include -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) -#endif - -#define arch_align_stack(x) (x) - -/* Used in very early kernel initialization. */ -extern unsigned long reloc_offset(void); -extern unsigned long add_reloc_offset(unsigned long); -extern void reloc_got2(unsigned long); - -#define PTRRELOC(x) ((typeof(x)) add_reloc_offset((unsigned long)(x))) - -#ifdef CONFIG_VIRT_CPU_ACCOUNTING -extern void account_system_vtime(struct task_struct *); -#endif - -extern struct dentry *powerpc_debugfs_root; - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_SYSTEM_H */ diff --git a/include/asm-powerpc/tce.h b/include/asm-powerpc/tce.h deleted file mode 100644 index f663634..0000000 --- a/include/asm-powerpc/tce.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation - * Rewrite, cleanup: - * Copyright (C) 2004 Olof Johansson , IBM Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _ASM_POWERPC_TCE_H -#define _ASM_POWERPC_TCE_H -#ifdef __KERNEL__ - -#include - -/* - * Tces come in two formats, one for the virtual bus and a different - * format for PCI - */ -#define TCE_VB 0 -#define TCE_PCI 1 - -/* TCE page size is 4096 bytes (1 << 12) */ - -#define TCE_SHIFT 12 -#define TCE_PAGE_SIZE (1 << TCE_SHIFT) - -#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */ - -#define TCE_RPN_MASK 0xfffffffffful /* 40-bit RPN (4K pages) */ -#define TCE_RPN_SHIFT 12 -#define TCE_VALID 0x800 /* TCE valid */ -#define TCE_ALLIO 0x400 /* TCE valid for all lpars */ -#define TCE_PCI_WRITE 0x2 /* write from PCI allowed */ -#define TCE_PCI_READ 0x1 /* read from PCI allowed */ -#define TCE_VB_WRITE 0x1 /* write from VB allowed */ - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_TCE_H */ diff --git a/include/asm-powerpc/termbits.h b/include/asm-powerpc/termbits.h deleted file mode 100644 index 6698188..0000000 --- a/include/asm-powerpc/termbits.h +++ /dev/null @@ -1,209 +0,0 @@ -#ifndef _ASM_POWERPC_TERMBITS_H -#define _ASM_POWERPC_TERMBITS_H - -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -/* - * termios type and macro definitions. Be careful about adding stuff - * to this file since it's used in GNU libc and there are strict rules - * concerning namespace pollution. - */ - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_cc[NCCS]; /* control characters */ - cc_t c_line; /* line discipline (== c_cc[19]) */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* For PowerPC the termios and ktermios are the same */ - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_cc[NCCS]; /* control characters */ - cc_t c_line; /* line discipline (== c_cc[19]) */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VMIN 5 -#define VEOL 6 -#define VTIME 7 -#define VEOL2 8 -#define VSWTC 9 -#define VWERASE 10 -#define VREPRINT 11 -#define VSUSP 12 -#define VSTART 13 -#define VSTOP 14 -#define VLNEXT 15 -#define VDISCARD 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IXON 0001000 -#define IXOFF 0002000 -#define IXANY 0004000 -#define IUCLC 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define ONLCR 0000002 -#define OLCUC 0000004 - -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 - -#define OFILL 00000100 -#define OFDEL 00000200 -#define NLDLY 00001400 -#define NL0 00000000 -#define NL1 00000400 -#define NL2 00001000 -#define NL3 00001400 -#define TABDLY 00006000 -#define TAB0 00000000 -#define TAB1 00002000 -#define TAB2 00004000 -#define TAB3 00006000 -#define XTABS 00006000 /* required by POSIX to == TAB3 */ -#define CRDLY 00030000 -#define CR0 00000000 -#define CR1 00010000 -#define CR2 00020000 -#define CR3 00030000 -#define FFDLY 00040000 -#define FF0 00000000 -#define FF1 00040000 -#define BSDLY 00100000 -#define BS0 00000000 -#define BS1 00100000 -#define VTDLY 00200000 -#define VT0 00000000 -#define VT1 00200000 - -/* c_cflag bit meaning */ -#define CBAUD 0000377 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CBAUDEX 0000000 -#define B57600 00020 -#define B115200 00021 -#define B230400 00022 -#define B460800 00023 -#define B500000 00024 -#define B576000 00025 -#define B921600 00026 -#define B1000000 00027 -#define B1152000 00030 -#define B1500000 00031 -#define B2000000 00032 -#define B2500000 00033 -#define B3000000 00034 -#define B3500000 00035 -#define B4000000 00036 -#define BOTHER 00037 - -#define CIBAUD 077600000 -#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ - -#define CSIZE 00001400 -#define CS5 00000000 -#define CS6 00000400 -#define CS7 00001000 -#define CS8 00001400 - -#define CSTOPB 00002000 -#define CREAD 00004000 -#define PARENB 00010000 -#define PARODD 00020000 -#define HUPCL 00040000 - -#define CLOCAL 00100000 -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -/* c_lflag bits */ -#define ISIG 0x00000080 -#define ICANON 0x00000100 -#define XCASE 0x00004000 -#define ECHO 0x00000008 -#define ECHOE 0x00000002 -#define ECHOK 0x00000004 -#define ECHONL 0x00000010 -#define NOFLSH 0x80000000 -#define TOSTOP 0x00400000 -#define ECHOCTL 0x00000040 -#define ECHOPRT 0x00000020 -#define ECHOKE 0x00000001 -#define FLUSHO 0x00800000 -#define PENDIN 0x20000000 -#define IEXTEN 0x00000400 - -/* Values for the ACTION argument to `tcflow'. */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* Values for the QUEUE_SELECTOR argument to `tcflush'. */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* Values for the OPTIONAL_ACTIONS argument to `tcsetattr'. */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* _ASM_POWERPC_TERMBITS_H */ diff --git a/include/asm-powerpc/termios.h b/include/asm-powerpc/termios.h deleted file mode 100644 index 2c14fea..0000000 --- a/include/asm-powerpc/termios.h +++ /dev/null @@ -1,85 +0,0 @@ -#ifndef _ASM_POWERPC_TERMIOS_H -#define _ASM_POWERPC_TERMIOS_H - -/* - * Liberally adapted from alpha/termios.h. In particular, the c_cc[] - * fields have been reordered so that termio & termios share the - * common subset in the same order (for brain dead programs that don't - * know or care about the differences). - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include - -struct sgttyb { - char sg_ispeed; - char sg_ospeed; - char sg_erase; - char sg_kill; - short sg_flags; -}; - -struct tchars { - char t_intrc; - char t_quitc; - char t_startc; - char t_stopc; - char t_eofc; - char t_brkc; -}; - -struct ltchars { - char t_suspc; - char t_dsuspc; - char t_rprntc; - char t_flushc; - char t_werasc; - char t_lnextc; -}; - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 10 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* c_cc characters */ -#define _VINTR 0 -#define _VQUIT 1 -#define _VERASE 2 -#define _VKILL 3 -#define _VEOF 4 -#define _VMIN 5 -#define _VEOL 6 -#define _VTIME 7 -#define _VEOL2 8 -#define _VSWTC 9 - -#ifdef __KERNEL__ -/* ^C ^\ del ^U ^D 1 0 0 0 0 ^W ^R ^Z ^Q ^S ^V ^U */ -#define INIT_C_CC "\003\034\177\025\004\001\000\000\000\000\027\022\032\021\023\026\025" -#endif - -#ifdef __KERNEL__ - -#include - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_TERMIOS_H */ diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h deleted file mode 100644 index 9665a26..0000000 --- a/include/asm-powerpc/thread_info.h +++ /dev/null @@ -1,161 +0,0 @@ -/* thread_info.h: PowerPC low-level thread information - * adapted from the i386 version by Paul Mackerras - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ - -#ifndef _ASM_POWERPC_THREAD_INFO_H -#define _ASM_POWERPC_THREAD_INFO_H - -#ifdef __KERNEL__ - -/* We have 8k stacks on ppc32 and 16k on ppc64 */ - -#ifdef CONFIG_PPC64 -#define THREAD_SHIFT 14 -#else -#define THREAD_SHIFT 13 -#endif - -#define THREAD_SIZE (1 << THREAD_SHIFT) - -#ifndef __ASSEMBLY__ -#include -#include -#include -#include - -/* - * low level task data. - */ -struct thread_info { - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, - <0 => BUG */ - struct restart_block restart_block; - unsigned long local_flags; /* private flags for thread */ - - /* low level flags - has atomic operations done on it */ - unsigned long flags ____cacheline_aligned_in_smp; -}; - -/* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. - */ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ - .flags = 0, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* thread information allocation */ - -#if THREAD_SHIFT >= PAGE_SHIFT - -#define THREAD_SIZE_ORDER (THREAD_SHIFT - PAGE_SHIFT) - -#else /* THREAD_SHIFT < PAGE_SHIFT */ - -#define __HAVE_ARCH_THREAD_INFO_ALLOCATOR - -extern struct thread_info *alloc_thread_info(struct task_struct *tsk); -extern void free_thread_info(struct thread_info *ti); - -#endif /* THREAD_SHIFT < PAGE_SHIFT */ - -/* how to get the thread information struct from C */ -static inline struct thread_info *current_thread_info(void) -{ - register unsigned long sp asm("r1"); - - /* gcc4, at least, is smart enough to turn this into a single - * rlwinm for ppc32 and clrrdi for ppc64 */ - return (struct thread_info *)(sp & ~(THREAD_SIZE-1)); -} - -#endif /* __ASSEMBLY__ */ - -#define PREEMPT_ACTIVE 0x10000000 - -/* - * thread information flag bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_SIGPENDING 1 /* signal pending */ -#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling - TIF_NEED_RESCHED */ -#define TIF_32BIT 4 /* 32 bit binary */ -#define TIF_PERFMON_WORK 5 /* work for pfm_handle_work() */ -#define TIF_PERFMON_CTXSW 6 /* perfmon needs ctxsw calls */ -#define TIF_SYSCALL_AUDIT 7 /* syscall auditing active */ -#define TIF_SINGLESTEP 8 /* singlestepping active */ -#define TIF_MEMDIE 9 -#define TIF_SECCOMP 10 /* secure computing */ -#define TIF_RESTOREALL 11 /* Restore all regs (implies NOERROR) */ -#define TIF_NOERROR 12 /* Force successful syscall return */ -#define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ -#define TIF_FREEZE 14 /* Freezing for suspend */ -#define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ -#define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ - -/* as above, but as bit values */ -#define _TIF_SYSCALL_TRACE (1<local_flags |= _TLF_RESTORE_SIGMASK; - set_bit(TIF_SIGPENDING, &ti->flags); -} -#endif /* !__ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_THREAD_INFO_H */ diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h deleted file mode 100644 index febd581..0000000 --- a/include/asm-powerpc/time.h +++ /dev/null @@ -1,255 +0,0 @@ -/* - * Common time prototypes and such for all ppc machines. - * - * Written by Cort Dougan (cort@cs.nmt.edu) to merge - * Paul Mackerras' version and mine for PReP and Pmac. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __POWERPC_TIME_H -#define __POWERPC_TIME_H - -#ifdef __KERNEL__ -#include -#include - -#include -#ifdef CONFIG_PPC_ISERIES -#include -#include -#include -#endif - -/* time.c */ -extern unsigned long tb_ticks_per_jiffy; -extern unsigned long tb_ticks_per_usec; -extern unsigned long tb_ticks_per_sec; -extern u64 tb_to_xs; -extern unsigned tb_to_us; - -struct rtc_time; -extern void to_tm(int tim, struct rtc_time * tm); -extern void GregorianDay(struct rtc_time *tm); -extern time_t last_rtc_update; - -extern void generic_calibrate_decr(void); -extern void wakeup_decrementer(void); -extern void snapshot_timebase(void); - -extern void set_dec_cpu6(unsigned int val); - -/* Some sane defaults: 125 MHz timebase, 1GHz processor */ -extern unsigned long ppc_proc_freq; -#define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) -extern unsigned long ppc_tb_freq; -#define DEFAULT_TB_FREQ 125000000UL - -/* - * By putting all of this stuff into a single struct we - * reduce the number of cache lines touched by do_gettimeofday. - * Both by collecting all of the data in one cache line and - * by touching only one TOC entry on ppc64. - */ -struct gettimeofday_vars { - u64 tb_to_xs; - u64 stamp_xsec; - u64 tb_orig_stamp; -}; - -struct gettimeofday_struct { - unsigned long tb_ticks_per_sec; - struct gettimeofday_vars vars[2]; - struct gettimeofday_vars * volatile varp; - unsigned var_idx; - unsigned tb_to_us; -}; - -struct div_result { - u64 result_high; - u64 result_low; -}; - -/* Accessor functions for the timebase (RTC on 601) registers. */ -/* If one day CONFIG_POWER is added just define __USE_RTC as 1 */ -#ifdef CONFIG_6xx -#define __USE_RTC() (!cpu_has_feature(CPU_FTR_USE_TB)) -#else -#define __USE_RTC() 0 -#endif - -#ifdef CONFIG_PPC64 - -/* For compatibility, get_tbl() is defined as get_tb() on ppc64 */ -#define get_tbl get_tb - -#else - -static inline unsigned long get_tbl(void) -{ -#if defined(CONFIG_403GCX) - unsigned long tbl; - asm volatile("mfspr %0, 0x3dd" : "=r" (tbl)); - return tbl; -#else - return mftbl(); -#endif -} - -static inline unsigned int get_tbu(void) -{ -#ifdef CONFIG_403GCX - unsigned int tbu; - asm volatile("mfspr %0, 0x3dc" : "=r" (tbu)); - return tbu; -#else - return mftbu(); -#endif -} -#endif /* !CONFIG_PPC64 */ - -static inline unsigned int get_rtcl(void) -{ - unsigned int rtcl; - - asm volatile("mfrtcl %0" : "=r" (rtcl)); - return rtcl; -} - -static inline u64 get_rtc(void) -{ - unsigned int hi, lo, hi2; - - do { - asm volatile("mfrtcu %0; mfrtcl %1; mfrtcu %2" - : "=r" (hi), "=r" (lo), "=r" (hi2)); - } while (hi2 != hi); - return (u64)hi * 1000000000 + lo; -} - -#ifdef CONFIG_PPC64 -static inline u64 get_tb(void) -{ - return mftb(); -} -#else /* CONFIG_PPC64 */ -static inline u64 get_tb(void) -{ - unsigned int tbhi, tblo, tbhi2; - - do { - tbhi = get_tbu(); - tblo = get_tbl(); - tbhi2 = get_tbu(); - } while (tbhi != tbhi2); - - return ((u64)tbhi << 32) | tblo; -} -#endif /* !CONFIG_PPC64 */ - -static inline u64 get_tb_or_rtc(void) -{ - return __USE_RTC() ? get_rtc() : get_tb(); -} - -static inline void set_tb(unsigned int upper, unsigned int lower) -{ - mtspr(SPRN_TBWL, 0); - mtspr(SPRN_TBWU, upper); - mtspr(SPRN_TBWL, lower); -} - -/* Accessor functions for the decrementer register. - * The 4xx doesn't even have a decrementer. I tried to use the - * generic timer interrupt code, which seems OK, with the 4xx PIT - * in auto-reload mode. The problem is PIT stops counting when it - * hits zero. If it would wrap, we could use it just like a decrementer. - */ -static inline unsigned int get_dec(void) -{ -#if defined(CONFIG_40x) - return (mfspr(SPRN_PIT)); -#else - return (mfspr(SPRN_DEC)); -#endif -} - -/* - * Note: Book E and 4xx processors differ from other PowerPC processors - * in when the decrementer generates its interrupt: on the 1 to 0 - * transition for Book E/4xx, but on the 0 to -1 transition for others. - */ -static inline void set_dec(int val) -{ -#if defined(CONFIG_40x) - mtspr(SPRN_PIT, val); -#elif defined(CONFIG_8xx_CPU6) - set_dec_cpu6(val - 1); -#else -#ifndef CONFIG_BOOKE - --val; -#endif -#ifdef CONFIG_PPC_ISERIES - if (firmware_has_feature(FW_FEATURE_ISERIES) && - get_lppaca()->shared_proc) { - get_lppaca()->virtual_decr = val; - if (get_dec() > val) - HvCall_setVirtualDecr(); - return; - } -#endif - mtspr(SPRN_DEC, val); -#endif /* not 40x or 8xx_CPU6 */ -} - -static inline unsigned long tb_ticks_since(unsigned long tstamp) -{ - if (__USE_RTC()) { - int delta = get_rtcl() - (unsigned int) tstamp; - return delta < 0 ? delta + 1000000000 : delta; - } - return get_tbl() - tstamp; -} - -#define mulhwu(x,y) \ -({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) - -#ifdef CONFIG_PPC64 -#define mulhdu(x,y) \ -({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) -#else -extern u64 mulhdu(u64, u64); -#endif - -extern void smp_space_timers(unsigned int); - -extern unsigned mulhwu_scale_factor(unsigned, unsigned); -extern void div128_by_32(u64 dividend_high, u64 dividend_low, - unsigned divisor, struct div_result *dr); - -/* Used to store Processor Utilization register (purr) values */ - -struct cpu_usage { - u64 current_tb; /* Holds the current purr register values */ -}; - -DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array); - -#if defined(CONFIG_VIRT_CPU_ACCOUNTING) -extern void calculate_steal_time(void); -extern void snapshot_timebases(void); -#define account_process_vtime(tsk) account_process_tick(tsk, 0) -#else -#define calculate_steal_time() do { } while (0) -#define snapshot_timebases() do { } while (0) -#define account_process_vtime(tsk) do { } while (0) -#endif - -extern void secondary_cpu_time_init(void); -extern void iSeries_time_init_early(void); - -#endif /* __KERNEL__ */ -#endif /* __POWERPC_TIME_H */ diff --git a/include/asm-powerpc/timex.h b/include/asm-powerpc/timex.h deleted file mode 100644 index c55e14f..0000000 --- a/include/asm-powerpc/timex.h +++ /dev/null @@ -1,50 +0,0 @@ -#ifndef _ASM_POWERPC_TIMEX_H -#define _ASM_POWERPC_TIMEX_H - -#ifdef __KERNEL__ - -/* - * PowerPC architecture timex specifications - */ - -#include -#include - -#define CLOCK_TICK_RATE 1024000 /* Underlying HZ */ - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles(void) -{ -#ifdef __powerpc64__ - return mftb(); -#else - cycles_t ret; - - /* - * For the "cycle" counter we use the timebase lower half. - * Currently only used on SMP. - */ - - ret = 0; - - __asm__ __volatile__( - "97: mftb %0\n" - "99:\n" - ".section __ftr_fixup,\"a\"\n" - ".align 2\n" - "98:\n" - " .long %1\n" - " .long 0\n" - " .long 97b-98b\n" - " .long 99b-98b\n" - " .long 0\n" - " .long 0\n" - ".previous" - : "=r" (ret) : "i" (CPU_FTR_601)); - return ret; -#endif -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_TIMEX_H */ diff --git a/include/asm-powerpc/tlb.h b/include/asm-powerpc/tlb.h deleted file mode 100644 index e20ff75..0000000 --- a/include/asm-powerpc/tlb.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * TLB shootdown specifics for powerpc - * - * Copyright (C) 2002 Anton Blanchard, IBM Corp. - * Copyright (C) 2002 Paul Mackerras, IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifndef _ASM_POWERPC_TLB_H -#define _ASM_POWERPC_TLB_H -#ifdef __KERNEL__ - -#ifndef __powerpc64__ -#include -#endif -#include -#include -#ifndef __powerpc64__ -#include -#include -#endif - -#include - -struct mmu_gather; - -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) - -#if !defined(CONFIG_PPC_STD_MMU) - -#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) - -#elif defined(__powerpc64__) - -extern void pte_free_finish(void); - -static inline void tlb_flush(struct mmu_gather *tlb) -{ - struct ppc64_tlb_batch *tlbbatch = &__get_cpu_var(ppc64_tlb_batch); - - /* If there's a TLB batch pending, then we must flush it because the - * pages are going to be freed and we really don't want to have a CPU - * access a freed page because it has a stale TLB - */ - if (tlbbatch->index) - __flush_tlb_pending(tlbbatch); - - pte_free_finish(); -} - -#else - -extern void tlb_flush(struct mmu_gather *tlb); - -#endif - -/* Get the generic bits... */ -#include - -#if !defined(CONFIG_PPC_STD_MMU) || defined(__powerpc64__) - -#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0) - -#else -extern void flush_hash_entry(struct mm_struct *mm, pte_t *ptep, - unsigned long address); - -static inline void __tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, - unsigned long address) -{ - if (pte_val(*ptep) & _PAGE_HASHPTE) - flush_hash_entry(tlb->mm, ptep, address); -} - -#endif -#endif /* __KERNEL__ */ -#endif /* __ASM_POWERPC_TLB_H */ diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h deleted file mode 100644 index 361cd5c..0000000 --- a/include/asm-powerpc/tlbflush.h +++ /dev/null @@ -1,166 +0,0 @@ -#ifndef _ASM_POWERPC_TLBFLUSH_H -#define _ASM_POWERPC_TLBFLUSH_H - -/* - * TLB flushing: - * - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#ifdef __KERNEL__ - -#if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE) -/* - * TLB flushing for software loaded TLB chips - * - * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range & - * flush_tlb_kernel_range are best implemented as tlbia vs - * specific tlbie's - */ - -#include - -extern void _tlbie(unsigned long address, unsigned int pid); - -#if defined(CONFIG_40x) || defined(CONFIG_8xx) -#define _tlbia() asm volatile ("tlbia; sync" : : : "memory") -#else /* CONFIG_44x || CONFIG_FSL_BOOKE */ -extern void _tlbia(void); -#endif - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - _tlbia(); -} - -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long vmaddr) -{ - _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); -} - -static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, - unsigned long vmaddr) -{ - _tlbie(vmaddr, vma ? vma->vm_mm->context.id : 0); -} - -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) -{ - _tlbia(); -} - -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ - _tlbia(); -} - -#elif defined(CONFIG_PPC32) -/* - * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx - */ -extern void _tlbie(unsigned long address); -extern void _tlbia(void); - -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); -extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr); -extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#else -/* - * TLB flushing for 64-bit has-MMU CPUs - */ - -#include -#include - -#define PPC64_TLB_BATCH_NR 192 - -struct ppc64_tlb_batch { - int active; - unsigned long index; - struct mm_struct *mm; - real_pte_t pte[PPC64_TLB_BATCH_NR]; - unsigned long vaddr[PPC64_TLB_BATCH_NR]; - unsigned int psize; - int ssize; -}; -DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); - -extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); - -extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, - pte_t *ptep, unsigned long pte, int huge); - -#define __HAVE_ARCH_ENTER_LAZY_MMU_MODE - -static inline void arch_enter_lazy_mmu_mode(void) -{ - struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); - - batch->active = 1; -} - -static inline void arch_leave_lazy_mmu_mode(void) -{ - struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); - - if (batch->index) - __flush_tlb_pending(batch); - batch->active = 0; -} - -#define arch_flush_lazy_mmu_mode() do {} while (0) - - -extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize, - int ssize, int local); -extern void flush_hash_range(unsigned long number, int local); - - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ -} - -static inline void flush_tlb_page(struct vm_area_struct *vma, - unsigned long vmaddr) -{ -} - -static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, - unsigned long vmaddr) -{ -} - -static inline void flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, unsigned long end) -{ -} - -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ -} - -/* Private function for use by PCI IO mapping code */ -extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start, - unsigned long end); - - -#endif - -#endif /*__KERNEL__ */ -#endif /* _ASM_POWERPC_TLBFLUSH_H */ diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h deleted file mode 100644 index c32da6f..0000000 --- a/include/asm-powerpc/topology.h +++ /dev/null @@ -1,117 +0,0 @@ -#ifndef _ASM_POWERPC_TOPOLOGY_H -#define _ASM_POWERPC_TOPOLOGY_H -#ifdef __KERNEL__ - - -struct sys_device; -struct device_node; - -#ifdef CONFIG_NUMA - -#include - -static inline int cpu_to_node(int cpu) -{ - return numa_cpu_lookup_table[cpu]; -} - -#define parent_node(node) (node) - -static inline cpumask_t node_to_cpumask(int node) -{ - return numa_cpumask_lookup_table[node]; -} - -static inline int node_to_first_cpu(int node) -{ - cpumask_t tmp; - tmp = node_to_cpumask(node); - return first_cpu(tmp); -} - -int of_node_to_nid(struct device_node *device); - -struct pci_bus; -#ifdef CONFIG_PCI -extern int pcibus_to_node(struct pci_bus *bus); -#else -static inline int pcibus_to_node(struct pci_bus *bus) -{ - return -1; -} -#endif - -#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus)) \ - ) - -/* sched_domains SD_NODE_INIT for PPC64 machines */ -#define SD_NODE_INIT (struct sched_domain) { \ - .span = CPU_MASK_NONE, \ - .parent = NULL, \ - .child = NULL, \ - .groups = NULL, \ - .min_interval = 8, \ - .max_interval = 32, \ - .busy_factor = 32, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 1, \ - .busy_idx = 3, \ - .idle_idx = 1, \ - .newidle_idx = 2, \ - .wake_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_EXEC \ - | SD_BALANCE_NEWIDLE \ - | SD_WAKE_IDLE \ - | SD_SERIALIZE \ - | SD_WAKE_BALANCE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ - .nr_balance_failed = 0, \ -} - -extern void __init dump_numa_cpu_topology(void); - -extern int sysfs_add_device_to_node(struct sys_device *dev, int nid); -extern void sysfs_remove_device_from_node(struct sys_device *dev, int nid); - -#else - -static inline int of_node_to_nid(struct device_node *device) -{ - return 0; -} - -static inline void dump_numa_cpu_topology(void) {} - -static inline int sysfs_add_device_to_node(struct sys_device *dev, int nid) -{ - return 0; -} - -static inline void sysfs_remove_device_from_node(struct sys_device *dev, - int nid) -{ -} - -#endif /* CONFIG_NUMA */ - -#include - -#ifdef CONFIG_SMP -#include -#define smt_capable() (cpu_has_feature(CPU_FTR_SMT)) - -#ifdef CONFIG_PPC64 -#include - -#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) -#define topology_core_siblings(cpu) (per_cpu(cpu_core_map, cpu)) -#define topology_core_id(cpu) (cpu_to_core_id(cpu)) -#endif -#endif - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_TOPOLOGY_H */ diff --git a/include/asm-powerpc/tsi108.h b/include/asm-powerpc/tsi108.h deleted file mode 100644 index f8b6079..0000000 --- a/include/asm-powerpc/tsi108.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * common routine and memory layout for Tundra TSI108(Grendel) host bridge - * memory controller. - * - * Author: Jacob Pan (jacob.pan@freescale.com) - * Alex Bounine (alexandreb@tundra.com) - * - * Copyright 2004-2006 Freescale Semiconductor, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef __PPC_KERNEL_TSI108_H -#define __PPC_KERNEL_TSI108_H - -#include - -/* Size of entire register space */ -#define TSI108_REG_SIZE (0x10000) - -/* Sizes of register spaces for individual blocks */ -#define TSI108_HLP_SIZE 0x1000 -#define TSI108_PCI_SIZE 0x1000 -#define TSI108_CLK_SIZE 0x1000 -#define TSI108_PB_SIZE 0x1000 -#define TSI108_SD_SIZE 0x1000 -#define TSI108_DMA_SIZE 0x1000 -#define TSI108_ETH_SIZE 0x1000 -#define TSI108_I2C_SIZE 0x400 -#define TSI108_MPIC_SIZE 0x400 -#define TSI108_UART0_SIZE 0x200 -#define TSI108_GPIO_SIZE 0x200 -#define TSI108_UART1_SIZE 0x200 - -/* Offsets within Tsi108(A) CSR space for individual blocks */ -#define TSI108_HLP_OFFSET 0x0000 -#define TSI108_PCI_OFFSET 0x1000 -#define TSI108_CLK_OFFSET 0x2000 -#define TSI108_PB_OFFSET 0x3000 -#define TSI108_SD_OFFSET 0x4000 -#define TSI108_DMA_OFFSET 0x5000 -#define TSI108_ETH_OFFSET 0x6000 -#define TSI108_I2C_OFFSET 0x7000 -#define TSI108_MPIC_OFFSET 0x7400 -#define TSI108_UART0_OFFSET 0x7800 -#define TSI108_GPIO_OFFSET 0x7A00 -#define TSI108_UART1_OFFSET 0x7C00 - -/* Tsi108 registers used by common code components */ -#define TSI108_PCI_CSR (0x004) -#define TSI108_PCI_IRP_CFG_CTL (0x180) -#define TSI108_PCI_IRP_STAT (0x184) -#define TSI108_PCI_IRP_ENABLE (0x188) -#define TSI108_PCI_IRP_INTAD (0x18C) - -#define TSI108_PCI_IRP_STAT_P_INT (0x00400000) -#define TSI108_PCI_IRP_ENABLE_P_INT (0x00400000) - -#define TSI108_CG_PWRUP_STATUS (0x234) - -#define TSI108_PB_ISR (0x00C) -#define TSI108_PB_ERRCS (0x404) -#define TSI108_PB_AERR (0x408) - -#define TSI108_PB_ERRCS_ES (1 << 1) -#define TSI108_PB_ISR_PBS_RD_ERR (1 << 8) - -#define TSI108_PCI_CFG_SIZE (0x01000000) - -/* - * PHY Configuration Options - * - * Specify "bcm54xx" in the compatible property of your device tree phy - * nodes if your board uses the Broadcom PHYs - */ -#define TSI108_PHY_MV88E 0 /* Marvel 88Exxxx PHY */ -#define TSI108_PHY_BCM54XX 1 /* Broardcom BCM54xx PHY */ - -/* Global variables */ - -extern u32 tsi108_pci_cfg_base; -/* Exported functions */ - -extern int tsi108_bridge_init(struct pci_controller *hose, uint phys_csr_base); -extern unsigned long tsi108_get_mem_size(void); -extern unsigned long tsi108_get_cpu_clk(void); -extern unsigned long tsi108_get_sdc_clk(void); -extern int tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfn, - int offset, int len, u32 val); -extern int tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, - int offset, int len, u32 * val); -extern void tsi108_clear_pci_error(u32 pci_cfg_base); - -extern phys_addr_t get_csrbase(void); - -typedef struct { - u32 regs; /* hw registers base address */ - u32 phyregs; /* phy registers base address */ - u16 phy; /* phy address */ - u16 irq_num; /* irq number */ - u8 mac_addr[6]; /* phy mac address */ - u16 phy_type; /* type of phy on board */ -} hw_info; - -extern u32 get_vir_csrbase(void); -extern u32 tsi108_csr_vir_base; - -static inline u32 tsi108_read_reg(u32 reg_offset) -{ - return in_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset)); -} - -static inline void tsi108_write_reg(u32 reg_offset, u32 val) -{ - out_be32((volatile u32 *)(tsi108_csr_vir_base + reg_offset), val); -} - -#endif /* __PPC_KERNEL_TSI108_H */ diff --git a/include/asm-powerpc/tsi108_irq.h b/include/asm-powerpc/tsi108_irq.h deleted file mode 100644 index 6ed9397..0000000 --- a/include/asm-powerpc/tsi108_irq.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * (C) Copyright 2005 Tundra Semiconductor Corp. - * Alex Bounine, - -/* Register definitions */ -#define TSI108_PCI_P2O_BAR0 (TSI108_PCI_OFFSET + 0x10) -#define TSI108_PCI_P2O_BAR0_UPPER (TSI108_PCI_OFFSET + 0x14) -#define TSI108_PCI_P2O_BAR2 (TSI108_PCI_OFFSET + 0x18) -#define TSI108_PCI_P2O_BAR2_UPPER (TSI108_PCI_OFFSET + 0x1c) -#define TSI108_PCI_P2O_PAGE_SIZES (TSI108_PCI_OFFSET + 0x4c) -#define TSI108_PCI_PFAB_BAR0 (TSI108_PCI_OFFSET + 0x204) -#define TSI108_PCI_PFAB_BAR0_UPPER (TSI108_PCI_OFFSET + 0x208) -#define TSI108_PCI_PFAB_IO (TSI108_PCI_OFFSET + 0x20c) -#define TSI108_PCI_PFAB_IO_UPPER (TSI108_PCI_OFFSET + 0x210) -#define TSI108_PCI_PFAB_MEM32 (TSI108_PCI_OFFSET + 0x214) -#define TSI108_PCI_PFAB_PFM3 (TSI108_PCI_OFFSET + 0x220) -#define TSI108_PCI_PFAB_PFM4 (TSI108_PCI_OFFSET + 0x230) - -extern int tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary); -extern void tsi108_pci_int_init(struct device_node *node); -extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc); -extern void tsi108_clear_pci_cfg_error(void); - -#endif /* _ASM_POWERPC_TSI108_PCI_H */ diff --git a/include/asm-powerpc/types.h b/include/asm-powerpc/types.h deleted file mode 100644 index d3374bc..0000000 --- a/include/asm-powerpc/types.h +++ /dev/null @@ -1,75 +0,0 @@ -#ifndef _ASM_POWERPC_TYPES_H -#define _ASM_POWERPC_TYPES_H - -#ifdef __powerpc64__ -# include -#else -# include -#endif - -#ifndef __ASSEMBLY__ - -/* - * This file is never included by application software unless - * explicitly requested (e.g., via linux/types.h) in which case the - * application is Linux specific so (user-) name space pollution is - * not a major issue. However, for interoperability, libraries still - * need to be careful to avoid a name clashes. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __powerpc64__ -typedef unsigned int umode_t; -#else -typedef unsigned short umode_t; -#endif - -typedef struct { - __u32 u[4]; -} __attribute__((aligned(16))) __vector128; - -#endif /* __ASSEMBLY__ */ - -#ifdef __KERNEL__ -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __powerpc64__ -#define BITS_PER_LONG 64 -#else -#define BITS_PER_LONG 32 -#endif - -#ifndef __ASSEMBLY__ - -typedef __vector128 vector128; - -/* Physical address used by some IO functions */ -#if defined(CONFIG_PPC64) || defined(CONFIG_PHYS_64BIT) -typedef u64 phys_addr_t; -#else -typedef u32 phys_addr_t; -#endif - -#ifdef __powerpc64__ -typedef u64 dma_addr_t; -#else -typedef u32 dma_addr_t; -#endif -typedef u64 dma64_addr_t; - -typedef struct { - unsigned long entry; - unsigned long toc; - unsigned long env; -} func_descr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_TYPES_H */ diff --git a/include/asm-powerpc/uaccess.h b/include/asm-powerpc/uaccess.h deleted file mode 100644 index bd0fb84..0000000 --- a/include/asm-powerpc/uaccess.h +++ /dev/null @@ -1,496 +0,0 @@ -#ifndef _ARCH_POWERPC_UACCESS_H -#define _ARCH_POWERPC_UACCESS_H - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ - -#include -#include -#include -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons, these macros are grossly misnamed. - * - * The fs/ds values are now the highest legal address in the "segment". - * This simplifies the checking in the routines below. - */ - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) - -#define KERNEL_DS MAKE_MM_SEG(~0UL) -#ifdef __powerpc64__ -/* We use TASK_SIZE_USER64 as TASK_SIZE is not constant */ -#define USER_DS MAKE_MM_SEG(TASK_SIZE_USER64 - 1) -#else -#define USER_DS MAKE_MM_SEG(TASK_SIZE - 1) -#endif - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.fs) -#define set_fs(val) (current->thread.fs = (val)) - -#define segment_eq(a, b) ((a).seg == (b).seg) - -#ifdef __powerpc64__ -/* - * This check is sufficient because there is a large enough - * gap between user addresses and the kernel addresses - */ -#define __access_ok(addr, size, segment) \ - (((addr) <= (segment).seg) && ((size) <= (segment).seg)) - -#else - -#define __access_ok(addr, size, segment) \ - (((addr) <= (segment).seg) && \ - (((size) == 0) || (((size) - 1) <= ((segment).seg - (addr))))) - -#endif - -#define access_ok(type, addr, size) \ - (__chk_user_ptr(addr), \ - __access_ok((__force unsigned long)(addr), (size), get_fs())) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry { - unsigned long insn; - unsigned long fixup; -}; - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - * - * The "__xxx" versions of the user access functions are versions that - * do not verify the address space, that must have been done previously - * with a separate "access_ok()" call (this is used when we do multiple - * accesses to the same area of user memory). - * - * As we use the same address space for kernel and user data on the - * PowerPC, we can just do these as direct assignments. (Of course, the - * exception handling means that it's no longer "just"...) - * - * The "user64" versions of the user access functions are versions that - * allow access of 64-bit data. The "get_user" functions do not - * properly handle 64-bit data because the value gets down cast to a long. - * The "put_user" functions already handle 64-bit data properly but we add - * "user64" versions for completeness - */ -#define get_user(x, ptr) \ - __get_user_check((x), (ptr), sizeof(*(ptr))) -#define put_user(x, ptr) \ - __put_user_check((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) - -#define __get_user(x, ptr) \ - __get_user_nocheck((x), (ptr), sizeof(*(ptr))) -#define __put_user(x, ptr) \ - __put_user_nocheck((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) - -#ifndef __powerpc64__ -#define __get_user64(x, ptr) \ - __get_user64_nocheck((x), (ptr), sizeof(*(ptr))) -#define __put_user64(x, ptr) __put_user(x, ptr) -#endif - -#define __get_user_inatomic(x, ptr) \ - __get_user_nosleep((x), (ptr), sizeof(*(ptr))) -#define __put_user_inatomic(x, ptr) \ - __put_user_nosleep((__typeof__(*(ptr)))(x), (ptr), sizeof(*(ptr))) - -#define __get_user_unaligned __get_user -#define __put_user_unaligned __put_user - -extern long __put_user_bad(void); - -/* - * We don't tell gcc that we are accessing memory, but this is OK - * because we do not write to any memory gcc knows about, so there - * are no aliasing issues. - */ -#define __put_user_asm(x, addr, err, op) \ - __asm__ __volatile__( \ - "1: " op " %1,0(%2) # put_user\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - PPC_LONG_ALIGN "\n" \ - PPC_LONG "1b,3b\n" \ - ".previous" \ - : "=r" (err) \ - : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) - -#ifdef __powerpc64__ -#define __put_user_asm2(x, ptr, retval) \ - __put_user_asm(x, ptr, retval, "std") -#else /* __powerpc64__ */ -#define __put_user_asm2(x, addr, err) \ - __asm__ __volatile__( \ - "1: stw %1,0(%2)\n" \ - "2: stw %1+1,4(%2)\n" \ - "3:\n" \ - ".section .fixup,\"ax\"\n" \ - "4: li %0,%3\n" \ - " b 3b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - PPC_LONG_ALIGN "\n" \ - PPC_LONG "1b,4b\n" \ - PPC_LONG "2b,4b\n" \ - ".previous" \ - : "=r" (err) \ - : "r" (x), "b" (addr), "i" (-EFAULT), "0" (err)) -#endif /* __powerpc64__ */ - -#define __put_user_size(x, ptr, size, retval) \ -do { \ - retval = 0; \ - switch (size) { \ - case 1: __put_user_asm(x, ptr, retval, "stb"); break; \ - case 2: __put_user_asm(x, ptr, retval, "sth"); break; \ - case 4: __put_user_asm(x, ptr, retval, "stw"); break; \ - case 8: __put_user_asm2(x, ptr, retval); break; \ - default: __put_user_bad(); \ - } \ -} while (0) - -#define __put_user_nocheck(x, ptr, size) \ -({ \ - long __pu_err; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - if (!is_kernel_addr((unsigned long)__pu_addr)) \ - might_sleep(); \ - __chk_user_ptr(ptr); \ - __put_user_size((x), __pu_addr, (size), __pu_err); \ - __pu_err; \ -}) - -#define __put_user_check(x, ptr, size) \ -({ \ - long __pu_err = -EFAULT; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - might_sleep(); \ - if (access_ok(VERIFY_WRITE, __pu_addr, size)) \ - __put_user_size((x), __pu_addr, (size), __pu_err); \ - __pu_err; \ -}) - -#define __put_user_nosleep(x, ptr, size) \ -({ \ - long __pu_err; \ - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __put_user_size((x), __pu_addr, (size), __pu_err); \ - __pu_err; \ -}) - - -extern long __get_user_bad(void); - -#define __get_user_asm(x, addr, err, op) \ - __asm__ __volatile__( \ - "1: "op" %1,0(%2) # get_user\n" \ - "2:\n" \ - ".section .fixup,\"ax\"\n" \ - "3: li %0,%3\n" \ - " li %1,0\n" \ - " b 2b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - PPC_LONG_ALIGN "\n" \ - PPC_LONG "1b,3b\n" \ - ".previous" \ - : "=r" (err), "=r" (x) \ - : "b" (addr), "i" (-EFAULT), "0" (err)) - -#ifdef __powerpc64__ -#define __get_user_asm2(x, addr, err) \ - __get_user_asm(x, addr, err, "ld") -#else /* __powerpc64__ */ -#define __get_user_asm2(x, addr, err) \ - __asm__ __volatile__( \ - "1: lwz %1,0(%2)\n" \ - "2: lwz %1+1,4(%2)\n" \ - "3:\n" \ - ".section .fixup,\"ax\"\n" \ - "4: li %0,%3\n" \ - " li %1,0\n" \ - " li %1+1,0\n" \ - " b 3b\n" \ - ".previous\n" \ - ".section __ex_table,\"a\"\n" \ - PPC_LONG_ALIGN "\n" \ - PPC_LONG "1b,4b\n" \ - PPC_LONG "2b,4b\n" \ - ".previous" \ - : "=r" (err), "=&r" (x) \ - : "b" (addr), "i" (-EFAULT), "0" (err)) -#endif /* __powerpc64__ */ - -#define __get_user_size(x, ptr, size, retval) \ -do { \ - retval = 0; \ - __chk_user_ptr(ptr); \ - if (size > sizeof(x)) \ - (x) = __get_user_bad(); \ - switch (size) { \ - case 1: __get_user_asm(x, ptr, retval, "lbz"); break; \ - case 2: __get_user_asm(x, ptr, retval, "lhz"); break; \ - case 4: __get_user_asm(x, ptr, retval, "lwz"); break; \ - case 8: __get_user_asm2(x, ptr, retval); break; \ - default: (x) = __get_user_bad(); \ - } \ -} while (0) - -#define __get_user_nocheck(x, ptr, size) \ -({ \ - long __gu_err; \ - unsigned long __gu_val; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - if (!is_kernel_addr((unsigned long)__gu_addr)) \ - might_sleep(); \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#ifndef __powerpc64__ -#define __get_user64_nocheck(x, ptr, size) \ -({ \ - long __gu_err; \ - long long __gu_val; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - if (!is_kernel_addr((unsigned long)__gu_addr)) \ - might_sleep(); \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) -#endif /* __powerpc64__ */ - -#define __get_user_check(x, ptr, size) \ -({ \ - long __gu_err = -EFAULT; \ - unsigned long __gu_val = 0; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - might_sleep(); \ - if (access_ok(VERIFY_READ, __gu_addr, (size))) \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_nosleep(x, ptr, size) \ -({ \ - long __gu_err; \ - unsigned long __gu_val; \ - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ - __chk_user_ptr(ptr); \ - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ - (x) = (__typeof__(*(ptr)))__gu_val; \ - __gu_err; \ -}) - - -/* more complex routines */ - -extern unsigned long __copy_tofrom_user(void __user *to, - const void __user *from, unsigned long size); - -#ifndef __powerpc64__ - -static inline unsigned long copy_from_user(void *to, - const void __user *from, unsigned long n) -{ - unsigned long over; - - if (access_ok(VERIFY_READ, from, n)) - return __copy_tofrom_user((__force void __user *)to, from, n); - if ((unsigned long)from < TASK_SIZE) { - over = (unsigned long)from + n - TASK_SIZE; - return __copy_tofrom_user((__force void __user *)to, from, - n - over) + over; - } - return n; -} - -static inline unsigned long copy_to_user(void __user *to, - const void *from, unsigned long n) -{ - unsigned long over; - - if (access_ok(VERIFY_WRITE, to, n)) - return __copy_tofrom_user(to, (__force void __user *)from, n); - if ((unsigned long)to < TASK_SIZE) { - over = (unsigned long)to + n - TASK_SIZE; - return __copy_tofrom_user(to, (__force void __user *)from, - n - over) + over; - } - return n; -} - -#else /* __powerpc64__ */ - -#define __copy_in_user(to, from, size) \ - __copy_tofrom_user((to), (from), (size)) - -extern unsigned long copy_from_user(void *to, const void __user *from, - unsigned long n); -extern unsigned long copy_to_user(void __user *to, const void *from, - unsigned long n); -extern unsigned long copy_in_user(void __user *to, const void __user *from, - unsigned long n); - -#endif /* __powerpc64__ */ - -static inline unsigned long __copy_from_user_inatomic(void *to, - const void __user *from, unsigned long n) -{ - if (__builtin_constant_p(n) && (n <= 8)) { - unsigned long ret = 1; - - switch (n) { - case 1: - __get_user_size(*(u8 *)to, from, 1, ret); - break; - case 2: - __get_user_size(*(u16 *)to, from, 2, ret); - break; - case 4: - __get_user_size(*(u32 *)to, from, 4, ret); - break; - case 8: - __get_user_size(*(u64 *)to, from, 8, ret); - break; - } - if (ret == 0) - return 0; - } - return __copy_tofrom_user((__force void __user *)to, from, n); -} - -static inline unsigned long __copy_to_user_inatomic(void __user *to, - const void *from, unsigned long n) -{ - if (__builtin_constant_p(n) && (n <= 8)) { - unsigned long ret = 1; - - switch (n) { - case 1: - __put_user_size(*(u8 *)from, (u8 __user *)to, 1, ret); - break; - case 2: - __put_user_size(*(u16 *)from, (u16 __user *)to, 2, ret); - break; - case 4: - __put_user_size(*(u32 *)from, (u32 __user *)to, 4, ret); - break; - case 8: - __put_user_size(*(u64 *)from, (u64 __user *)to, 8, ret); - break; - } - if (ret == 0) - return 0; - } - return __copy_tofrom_user(to, (__force const void __user *)from, n); -} - -static inline unsigned long __copy_from_user(void *to, - const void __user *from, unsigned long size) -{ - might_sleep(); - return __copy_from_user_inatomic(to, from, size); -} - -static inline unsigned long __copy_to_user(void __user *to, - const void *from, unsigned long size) -{ - might_sleep(); - return __copy_to_user_inatomic(to, from, size); -} - -extern unsigned long __clear_user(void __user *addr, unsigned long size); - -static inline unsigned long clear_user(void __user *addr, unsigned long size) -{ - might_sleep(); - if (likely(access_ok(VERIFY_WRITE, addr, size))) - return __clear_user(addr, size); - if ((unsigned long)addr < TASK_SIZE) { - unsigned long over = (unsigned long)addr + size - TASK_SIZE; - return __clear_user(addr, size - over) + over; - } - return size; -} - -extern int __strncpy_from_user(char *dst, const char __user *src, long count); - -static inline long strncpy_from_user(char *dst, const char __user *src, - long count) -{ - might_sleep(); - if (likely(access_ok(VERIFY_READ, src, 1))) - return __strncpy_from_user(dst, src, count); - return -EFAULT; -} - -/* - * Return the size of a string (including the ending 0) - * - * Return 0 for error - */ -extern int __strnlen_user(const char __user *str, long len, unsigned long top); - -/* - * Returns the length of the string at str (including the null byte), - * or 0 if we hit a page we can't access, - * or something > len if we didn't find a null byte. - * - * The `top' parameter to __strnlen_user is to make sure that - * we can never overflow from the user area into kernel space. - */ -static inline int strnlen_user(const char __user *str, long len) -{ - unsigned long top = current->thread.fs.seg; - - if ((unsigned long)str > top) - return 0; - return __strnlen_user(str, len, top); -} - -#define strlen_user(str) strnlen_user((str), 0x7ffffffe) - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ - -#endif /* _ARCH_POWERPC_UACCESS_H */ diff --git a/include/asm-powerpc/ucc.h b/include/asm-powerpc/ucc.h deleted file mode 100644 index 46b09ba..0000000 --- a/include/asm-powerpc/ucc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * Description: - * Internal header file for UCC unit routines. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __UCC_H__ -#define __UCC_H__ - -#include -#include - -#define STATISTICS - -#define UCC_MAX_NUM 8 - -/* Slow or fast type for UCCs. -*/ -enum ucc_speed_type { - UCC_SPEED_TYPE_FAST = UCC_GUEMR_MODE_FAST_RX | UCC_GUEMR_MODE_FAST_TX, - UCC_SPEED_TYPE_SLOW = UCC_GUEMR_MODE_SLOW_RX | UCC_GUEMR_MODE_SLOW_TX -}; - -/* ucc_set_type - * Sets UCC to slow or fast mode. - * - * ucc_num - (In) number of UCC (0-7). - * speed - (In) slow or fast mode for UCC. - */ -int ucc_set_type(unsigned int ucc_num, enum ucc_speed_type speed); - -int ucc_set_qe_mux_mii_mng(unsigned int ucc_num); - -int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, - enum comm_dir mode); - -int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask); - -/* QE MUX clock routing for UCC -*/ -static inline int ucc_set_qe_mux_grant(unsigned int ucc_num, int set) -{ - return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_GRANT); -} - -static inline int ucc_set_qe_mux_tsa(unsigned int ucc_num, int set) -{ - return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_TSA); -} - -static inline int ucc_set_qe_mux_bkpt(unsigned int ucc_num, int set) -{ - return ucc_mux_set_grant_tsa_bkpt(ucc_num, set, QE_CMXUCR_BKPT); -} - -#endif /* __UCC_H__ */ diff --git a/include/asm-powerpc/ucc_fast.h b/include/asm-powerpc/ucc_fast.h deleted file mode 100644 index fce16ab..0000000 --- a/include/asm-powerpc/ucc_fast.h +++ /dev/null @@ -1,246 +0,0 @@ -/* - * include/asm-powerpc/ucc_fast.h - * - * Internal header file for UCC FAST unit routines. - * - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __UCC_FAST_H__ -#define __UCC_FAST_H__ - -#include - -#include -#include - -#include "ucc.h" - -/* Receive BD's status */ -#define R_E 0x80000000 /* buffer empty */ -#define R_W 0x20000000 /* wrap bit */ -#define R_I 0x10000000 /* interrupt on reception */ -#define R_L 0x08000000 /* last */ -#define R_F 0x04000000 /* first */ - -/* transmit BD's status */ -#define T_R 0x80000000 /* ready bit */ -#define T_W 0x20000000 /* wrap bit */ -#define T_I 0x10000000 /* interrupt on completion */ -#define T_L 0x08000000 /* last */ - -/* Rx Data buffer must be 4 bytes aligned in most cases */ -#define UCC_FAST_RX_ALIGN 4 -#define UCC_FAST_MRBLR_ALIGNMENT 4 -#define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT 8 - -/* Sizes */ -#define UCC_FAST_URFS_MIN_VAL 0x88 -#define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR 8 - -/* ucc_fast_channel_protocol_mode - UCC FAST mode */ -enum ucc_fast_channel_protocol_mode { - UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000, - UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001, - UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002, - UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003, - UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004, - UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005, - UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006, - UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007, - UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008, - UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009, - UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A, - UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B, - UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C, - UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D, - UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E, - UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F -}; - -/* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */ -enum ucc_fast_transparent_txrx { - UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000, - UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000 -}; - -/* UCC fast diagnostic mode */ -enum ucc_fast_diag_mode { - UCC_FAST_DIAGNOSTIC_NORMAL = 0x0, - UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000, - UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000, - UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000 -}; - -/* UCC fast Sync length (transparent mode only) */ -enum ucc_fast_sync_len { - UCC_FAST_SYNC_LEN_NOT_USED = 0x0, - UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000, - UCC_FAST_SYNC_LEN_8_BIT = 0x00008000, - UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000 -}; - -/* UCC fast RTS mode */ -enum ucc_fast_ready_to_send { - UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000, - UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000 -}; - -/* UCC fast receiver decoding mode */ -enum ucc_fast_rx_decoding_method { - UCC_FAST_RX_ENCODING_NRZ = 0x00000000, - UCC_FAST_RX_ENCODING_NRZI = 0x00000800, - UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000, - UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800 -}; - -/* UCC fast transmitter encoding mode */ -enum ucc_fast_tx_encoding_method { - UCC_FAST_TX_ENCODING_NRZ = 0x00000000, - UCC_FAST_TX_ENCODING_NRZI = 0x00000100, - UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200, - UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300 -}; - -/* UCC fast CRC length */ -enum ucc_fast_transparent_tcrc { - UCC_FAST_16_BIT_CRC = 0x00000000, - UCC_FAST_CRC_RESERVED0 = 0x00000040, - UCC_FAST_32_BIT_CRC = 0x00000080, - UCC_FAST_CRC_RESERVED1 = 0x000000C0 -}; - -/* Fast UCC initialization structure */ -struct ucc_fast_info { - int ucc_num; - enum qe_clock rx_clock; - enum qe_clock tx_clock; - u32 regs; - int irq; - u32 uccm_mask; - int bd_mem_part; - int brkpt_support; - int grant_support; - int tsa; - int cdp; - int cds; - int ctsp; - int ctss; - int tci; - int txsy; - int rtsm; - int revd; - int rsyn; - u16 max_rx_buf_length; - u16 urfs; - u16 urfet; - u16 urfset; - u16 utfs; - u16 utfet; - u16 utftt; - u16 ufpt; - enum ucc_fast_channel_protocol_mode mode; - enum ucc_fast_transparent_txrx ttx_trx; - enum ucc_fast_tx_encoding_method tenc; - enum ucc_fast_rx_decoding_method renc; - enum ucc_fast_transparent_tcrc tcrc; - enum ucc_fast_sync_len synl; -}; - -struct ucc_fast_private { - struct ucc_fast_info *uf_info; - struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */ - u32 __iomem *p_ucce; /* a pointer to the event register in memory. */ - u32 __iomem *p_uccm; /* a pointer to the mask register in memory. */ -#ifdef CONFIG_UGETH_TX_ON_DEMAND - u16 __iomem *p_utodr; /* pointer to the transmit on demand register */ -#endif - int enabled_tx; /* Whether channel is enabled for Tx (ENT) */ - int enabled_rx; /* Whether channel is enabled for Rx (ENR) */ - int stopped_tx; /* Whether channel has been stopped for Tx - (STOP_TX, etc.) */ - int stopped_rx; /* Whether channel has been stopped for Rx */ - u32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx - virtual fifo */ - u32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx - virtual fifo */ -#ifdef STATISTICS - u32 tx_frames; /* Transmitted frames counter. */ - u32 rx_frames; /* Received frames counter (only frames - passed to application). */ - u32 tx_discarded; /* Discarded tx frames counter (frames that - were discarded by the driver due to errors). - */ - u32 rx_discarded; /* Discarded rx frames counter (frames that - were discarded by the driver due to errors). - */ -#endif /* STATISTICS */ - u16 mrblr; /* maximum receive buffer length */ -}; - -/* ucc_fast_init - * Initializes Fast UCC according to user provided parameters. - * - * uf_info - (In) pointer to the fast UCC info structure. - * uccf_ret - (Out) pointer to the fast UCC structure. - */ -int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret); - -/* ucc_fast_free - * Frees all resources for fast UCC. - * - * uccf - (In) pointer to the fast UCC structure. - */ -void ucc_fast_free(struct ucc_fast_private * uccf); - -/* ucc_fast_enable - * Enables a fast UCC port. - * This routine enables Tx and/or Rx through the General UCC Mode Register. - * - * uccf - (In) pointer to the fast UCC structure. - * mode - (In) TX, RX, or both. - */ -void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode); - -/* ucc_fast_disable - * Disables a fast UCC port. - * This routine disables Tx and/or Rx through the General UCC Mode Register. - * - * uccf - (In) pointer to the fast UCC structure. - * mode - (In) TX, RX, or both. - */ -void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode); - -/* ucc_fast_irq - * Handles interrupts on fast UCC. - * Called from the general interrupt routine to handle interrupts on fast UCC. - * - * uccf - (In) pointer to the fast UCC structure. - */ -void ucc_fast_irq(struct ucc_fast_private * uccf); - -/* ucc_fast_transmit_on_demand - * Immediately forces a poll of the transmitter for data to be sent. - * Typically, the hardware performs a periodic poll for data that the - * transmit routine has set up to be transmitted. In cases where - * this polling cycle is not soon enough, this optional routine can - * be invoked to force a poll right away, instead. Proper use for - * each transmission for which this functionality is desired is to - * call the transmit routine and then this routine right after. - * - * uccf - (In) pointer to the fast UCC structure. - */ -void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf); - -u32 ucc_fast_get_qe_cr_subblock(int uccf_num); - -void ucc_fast_dump_regs(struct ucc_fast_private * uccf); - -#endif /* __UCC_FAST_H__ */ diff --git a/include/asm-powerpc/ucc_slow.h b/include/asm-powerpc/ucc_slow.h deleted file mode 100644 index 0980e6a..0000000 --- a/include/asm-powerpc/ucc_slow.h +++ /dev/null @@ -1,290 +0,0 @@ -/* - * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved. - * - * Authors: Shlomi Gridish - * Li Yang - * - * Description: - * Internal header file for UCC SLOW unit routines. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __UCC_SLOW_H__ -#define __UCC_SLOW_H__ - -#include - -#include -#include - -#include "ucc.h" - -/* transmit BD's status */ -#define T_R 0x80000000 /* ready bit */ -#define T_PAD 0x40000000 /* add pads to short frames */ -#define T_W 0x20000000 /* wrap bit */ -#define T_I 0x10000000 /* interrupt on completion */ -#define T_L 0x08000000 /* last */ - -#define T_A 0x04000000 /* Address - the data transmitted as address - chars */ -#define T_TC 0x04000000 /* transmit CRC */ -#define T_CM 0x02000000 /* continuous mode */ -#define T_DEF 0x02000000 /* collision on previous attempt to transmit */ -#define T_P 0x01000000 /* Preamble - send Preamble sequence before - data */ -#define T_HB 0x01000000 /* heartbeat */ -#define T_NS 0x00800000 /* No Stop */ -#define T_LC 0x00800000 /* late collision */ -#define T_RL 0x00400000 /* retransmission limit */ -#define T_UN 0x00020000 /* underrun */ -#define T_CT 0x00010000 /* CTS lost */ -#define T_CSL 0x00010000 /* carrier sense lost */ -#define T_RC 0x003c0000 /* retry count */ - -/* Receive BD's status */ -#define R_E 0x80000000 /* buffer empty */ -#define R_W 0x20000000 /* wrap bit */ -#define R_I 0x10000000 /* interrupt on reception */ -#define R_L 0x08000000 /* last */ -#define R_C 0x08000000 /* the last byte in this buffer is a cntl - char */ -#define R_F 0x04000000 /* first */ -#define R_A 0x04000000 /* the first byte in this buffer is address - byte */ -#define R_CM 0x02000000 /* continuous mode */ -#define R_ID 0x01000000 /* buffer close on reception of idles */ -#define R_M 0x01000000 /* Frame received because of promiscuous - mode */ -#define R_AM 0x00800000 /* Address match */ -#define R_DE 0x00800000 /* Address match */ -#define R_LG 0x00200000 /* Break received */ -#define R_BR 0x00200000 /* Frame length violation */ -#define R_NO 0x00100000 /* Rx Non Octet Aligned Packet */ -#define R_FR 0x00100000 /* Framing Error (no stop bit) character - received */ -#define R_PR 0x00080000 /* Parity Error character received */ -#define R_AB 0x00080000 /* Frame Aborted */ -#define R_SH 0x00080000 /* frame is too short */ -#define R_CR 0x00040000 /* CRC Error */ -#define R_OV 0x00020000 /* Overrun */ -#define R_CD 0x00010000 /* CD lost */ -#define R_CL 0x00010000 /* this frame is closed because of a - collision */ - -/* Rx Data buffer must be 4 bytes aligned in most cases.*/ -#define UCC_SLOW_RX_ALIGN 4 -#define UCC_SLOW_MRBLR_ALIGNMENT 4 -#define UCC_SLOW_PRAM_SIZE 0x100 -#define ALIGNMENT_OF_UCC_SLOW_PRAM 64 - -/* UCC Slow Channel Protocol Mode */ -enum ucc_slow_channel_protocol_mode { - UCC_SLOW_CHANNEL_PROTOCOL_MODE_QMC = 0x00000002, - UCC_SLOW_CHANNEL_PROTOCOL_MODE_UART = 0x00000004, - UCC_SLOW_CHANNEL_PROTOCOL_MODE_BISYNC = 0x00000008, -}; - -/* UCC Slow Transparent Transmit CRC (TCRC) */ -enum ucc_slow_transparent_tcrc { - /* 16-bit CCITT CRC (HDLC). (X16 + X12 + X5 + 1) */ - UCC_SLOW_TRANSPARENT_TCRC_CCITT_CRC16 = 0x00000000, - /* CRC16 (BISYNC). (X16 + X15 + X2 + 1) */ - UCC_SLOW_TRANSPARENT_TCRC_CRC16 = 0x00004000, - /* 32-bit CCITT CRC (Ethernet and HDLC) */ - UCC_SLOW_TRANSPARENT_TCRC_CCITT_CRC32 = 0x00008000, -}; - -/* UCC Slow oversampling rate for transmitter (TDCR) */ -enum ucc_slow_tx_oversampling_rate { - /* 1x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_TX_TDCR_1 = 0x00000000, - /* 8x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_TX_TDCR_8 = 0x00010000, - /* 16x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_TX_TDCR_16 = 0x00020000, - /* 32x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_TX_TDCR_32 = 0x00030000, -}; - -/* UCC Slow Oversampling rate for receiver (RDCR) -*/ -enum ucc_slow_rx_oversampling_rate { - /* 1x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_RX_RDCR_1 = 0x00000000, - /* 8x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_RX_RDCR_8 = 0x00004000, - /* 16x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_RX_RDCR_16 = 0x00008000, - /* 32x clock mode */ - UCC_SLOW_OVERSAMPLING_RATE_RX_RDCR_32 = 0x0000c000, -}; - -/* UCC Slow Transmitter encoding method (TENC) -*/ -enum ucc_slow_tx_encoding_method { - UCC_SLOW_TRANSMITTER_ENCODING_METHOD_TENC_NRZ = 0x00000000, - UCC_SLOW_TRANSMITTER_ENCODING_METHOD_TENC_NRZI = 0x00000100 -}; - -/* UCC Slow Receiver decoding method (RENC) -*/ -enum ucc_slow_rx_decoding_method { - UCC_SLOW_RECEIVER_DECODING_METHOD_RENC_NRZ = 0x00000000, - UCC_SLOW_RECEIVER_DECODING_METHOD_RENC_NRZI = 0x00000800 -}; - -/* UCC Slow Diagnostic mode (DIAG) -*/ -enum ucc_slow_diag_mode { - UCC_SLOW_DIAG_MODE_NORMAL = 0x00000000, - UCC_SLOW_DIAG_MODE_LOOPBACK = 0x00000040, - UCC_SLOW_DIAG_MODE_ECHO = 0x00000080, - UCC_SLOW_DIAG_MODE_LOOPBACK_ECHO = 0x000000c0 -}; - -struct ucc_slow_info { - int ucc_num; - int protocol; /* QE_CR_PROTOCOL_xxx */ - enum qe_clock rx_clock; - enum qe_clock tx_clock; - phys_addr_t regs; - int irq; - u16 uccm_mask; - int data_mem_part; - int init_tx; - int init_rx; - u32 tx_bd_ring_len; - u32 rx_bd_ring_len; - int rx_interrupts; - int brkpt_support; - int grant_support; - int tsa; - int cdp; - int cds; - int ctsp; - int ctss; - int rinv; - int tinv; - int rtsm; - int rfw; - int tci; - int tend; - int tfl; - int txsy; - u16 max_rx_buf_length; - enum ucc_slow_transparent_tcrc tcrc; - enum ucc_slow_channel_protocol_mode mode; - enum ucc_slow_diag_mode diag; - enum ucc_slow_tx_oversampling_rate tdcr; - enum ucc_slow_rx_oversampling_rate rdcr; - enum ucc_slow_tx_encoding_method tenc; - enum ucc_slow_rx_decoding_method renc; -}; - -struct ucc_slow_private { - struct ucc_slow_info *us_info; - struct ucc_slow __iomem *us_regs; /* Ptr to memory map of UCC regs */ - struct ucc_slow_pram *us_pram; /* a pointer to the parameter RAM */ - u32 us_pram_offset; - int enabled_tx; /* Whether channel is enabled for Tx (ENT) */ - int enabled_rx; /* Whether channel is enabled for Rx (ENR) */ - int stopped_tx; /* Whether channel has been stopped for Tx - (STOP_TX, etc.) */ - int stopped_rx; /* Whether channel has been stopped for Rx */ - struct list_head confQ; /* frames passed to chip waiting for tx */ - u32 first_tx_bd_mask; /* mask is used in Tx routine to save status - and length for first BD in a frame */ - u32 tx_base_offset; /* first BD in Tx BD table offset (In MURAM) */ - u32 rx_base_offset; /* first BD in Rx BD table offset (In MURAM) */ - struct qe_bd *confBd; /* next BD for confirm after Tx */ - struct qe_bd *tx_bd; /* next BD for new Tx request */ - struct qe_bd *rx_bd; /* next BD to collect after Rx */ - void *p_rx_frame; /* accumulating receive frame */ - u16 *p_ucce; /* a pointer to the event register in memory. - */ - u16 *p_uccm; /* a pointer to the mask register in memory */ - u16 saved_uccm; /* a saved mask for the RX Interrupt bits */ -#ifdef STATISTICS - u32 tx_frames; /* Transmitted frames counters */ - u32 rx_frames; /* Received frames counters (only frames - passed to application) */ - u32 rx_discarded; /* Discarded frames counters (frames that - were discarded by the driver due to - errors) */ -#endif /* STATISTICS */ -}; - -/* ucc_slow_init - * Initializes Slow UCC according to provided parameters. - * - * us_info - (In) pointer to the slow UCC info structure. - * uccs_ret - (Out) pointer to the slow UCC structure. - */ -int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** uccs_ret); - -/* ucc_slow_free - * Frees all resources for slow UCC. - * - * uccs - (In) pointer to the slow UCC structure. - */ -void ucc_slow_free(struct ucc_slow_private * uccs); - -/* ucc_slow_enable - * Enables a fast UCC port. - * This routine enables Tx and/or Rx through the General UCC Mode Register. - * - * uccs - (In) pointer to the slow UCC structure. - * mode - (In) TX, RX, or both. - */ -void ucc_slow_enable(struct ucc_slow_private * uccs, enum comm_dir mode); - -/* ucc_slow_disable - * Disables a fast UCC port. - * This routine disables Tx and/or Rx through the General UCC Mode Register. - * - * uccs - (In) pointer to the slow UCC structure. - * mode - (In) TX, RX, or both. - */ -void ucc_slow_disable(struct ucc_slow_private * uccs, enum comm_dir mode); - -/* ucc_slow_poll_transmitter_now - * Immediately forces a poll of the transmitter for data to be sent. - * Typically, the hardware performs a periodic poll for data that the - * transmit routine has set up to be transmitted. In cases where - * this polling cycle is not soon enough, this optional routine can - * be invoked to force a poll right away, instead. Proper use for - * each transmission for which this functionality is desired is to - * call the transmit routine and then this routine right after. - * - * uccs - (In) pointer to the slow UCC structure. - */ -void ucc_slow_poll_transmitter_now(struct ucc_slow_private * uccs); - -/* ucc_slow_graceful_stop_tx - * Smoothly stops transmission on a specified slow UCC. - * - * uccs - (In) pointer to the slow UCC structure. - */ -void ucc_slow_graceful_stop_tx(struct ucc_slow_private * uccs); - -/* ucc_slow_stop_tx - * Stops transmission on a specified slow UCC. - * - * uccs - (In) pointer to the slow UCC structure. - */ -void ucc_slow_stop_tx(struct ucc_slow_private * uccs); - -/* ucc_slow_restart_tx - * Restarts transmitting on a specified slow UCC. - * - * uccs - (In) pointer to the slow UCC structure. - */ -void ucc_slow_restart_tx(struct ucc_slow_private *uccs); - -u32 ucc_slow_get_qe_cr_subblock(int uccs_num); - -#endif /* __UCC_SLOW_H__ */ diff --git a/include/asm-powerpc/ucontext.h b/include/asm-powerpc/ucontext.h deleted file mode 100644 index d9a4ddf..0000000 --- a/include/asm-powerpc/ucontext.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef _ASM_POWERPC_UCONTEXT_H -#define _ASM_POWERPC_UCONTEXT_H - -#ifdef __powerpc64__ -#include -#else -#include -#endif -#include - -#ifndef __powerpc64__ -struct mcontext { - elf_gregset_t mc_gregs; - elf_fpregset_t mc_fregs; - unsigned long mc_pad[2]; - elf_vrregset_t mc_vregs __attribute__((__aligned__(16))); -}; -#endif - -struct ucontext { - unsigned long uc_flags; - struct ucontext __user *uc_link; - stack_t uc_stack; -#ifndef __powerpc64__ - int uc_pad[7]; - struct mcontext __user *uc_regs;/* points to uc_mcontext field */ -#endif - sigset_t uc_sigmask; - /* glibc has 1024-bit signal masks, ours are 64-bit */ -#ifdef __powerpc64__ - sigset_t __unused[15]; /* Allow for uc_sigmask growth */ - struct sigcontext uc_mcontext; /* last for extensibility */ -#else - int uc_maskext[30]; - int uc_pad2[3]; - struct mcontext uc_mcontext; -#endif -}; - -#endif /* _ASM_POWERPC_UCONTEXT_H */ diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h deleted file mode 100644 index 6418cee..0000000 --- a/include/asm-powerpc/udbg.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (c) 2001, 2006 IBM Corporation. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_UDBG_H -#define _ASM_POWERPC_UDBG_H -#ifdef __KERNEL__ - -#include -#include - -extern void (*udbg_putc)(char c); -extern int (*udbg_getc)(void); -extern int (*udbg_getc_poll)(void); - -extern void udbg_puts(const char *s); -extern int udbg_write(const char *s, int n); -extern int udbg_read(char *buf, int buflen); - -extern void register_early_udbg_console(void); -extern void udbg_printf(const char *fmt, ...) - __attribute__ ((format (printf, 1, 2))); -extern void udbg_progress(char *s, unsigned short hex); - -extern void udbg_init_uart(void __iomem *comport, unsigned int speed, - unsigned int clock); -extern unsigned int udbg_probe_uart_speed(void __iomem *comport, - unsigned int clock); - -struct device_node; -extern void udbg_scc_init(int force_scc); -extern int udbg_adb_init(int force_btext); -extern void udbg_adb_init_early(void); - -extern void __init udbg_early_init(void); -extern void __init udbg_init_debug_lpar(void); -extern void __init udbg_init_pmac_realmode(void); -extern void __init udbg_init_maple_realmode(void); -extern void __init udbg_init_pas_realmode(void); -extern void __init udbg_init_iseries(void); -extern void __init udbg_init_rtas_panel(void); -extern void __init udbg_init_rtas_console(void); -extern void __init udbg_init_debug_beat(void); -extern void __init udbg_init_btext(void); -extern void __init udbg_init_44x_as1(void); -extern void __init udbg_init_40x_realmode(void); -extern void __init udbg_init_cpm(void); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_UDBG_H */ diff --git a/include/asm-powerpc/uic.h b/include/asm-powerpc/uic.h deleted file mode 100644 index 970eb7e..0000000 --- a/include/asm-powerpc/uic.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * include/asm-powerpc/uic.h - * - * IBM PPC4xx UIC external definitions and structure. - * - * Maintainer: David Gibson - * Copyright 2007 IBM Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_POWERPC_UIC_H -#define _ASM_POWERPC_UIC_H - -#ifdef __KERNEL__ - -extern void __init uic_init_tree(void); -extern unsigned int uic_get_irq(void); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_UIC_H */ diff --git a/include/asm-powerpc/unaligned.h b/include/asm-powerpc/unaligned.h deleted file mode 100644 index 5f1b1e3..0000000 --- a/include/asm-powerpc/unaligned.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _ASM_POWERPC_UNALIGNED_H -#define _ASM_POWERPC_UNALIGNED_H - -#ifdef __KERNEL__ - -/* - * The PowerPC can do unaligned accesses itself in big endian mode. - */ -#include -#include - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_UNALIGNED_H */ diff --git a/include/asm-powerpc/uninorth.h b/include/asm-powerpc/uninorth.h deleted file mode 100644 index f737732..0000000 --- a/include/asm-powerpc/uninorth.h +++ /dev/null @@ -1,229 +0,0 @@ -/* - * uninorth.h: definitions for using the "UniNorth" host bridge chip - * from Apple. This chip is used on "Core99" machines - * This also includes U2 used on more recent MacRISC2/3 - * machines and U3 (G5) - * - */ -#ifdef __KERNEL__ -#ifndef __ASM_UNINORTH_H__ -#define __ASM_UNINORTH_H__ - -/* - * Uni-N and U3 config space reg. definitions - * - * (Little endian) - */ - -/* Address ranges selection. This one should work with Bandit too */ -/* Not U3 */ -#define UNI_N_ADDR_SELECT 0x48 -#define UNI_N_ADDR_COARSE_MASK 0xffff0000 /* 256Mb regions at *0000000 */ -#define UNI_N_ADDR_FINE_MASK 0x0000ffff /* 16Mb regions at f*000000 */ - -/* AGP registers */ -/* Not U3 */ -#define UNI_N_CFG_GART_BASE 0x8c -#define UNI_N_CFG_AGP_BASE 0x90 -#define UNI_N_CFG_GART_CTRL 0x94 -#define UNI_N_CFG_INTERNAL_STATUS 0x98 -#define UNI_N_CFG_GART_DUMMY_PAGE 0xa4 - -/* UNI_N_CFG_GART_CTRL bits definitions */ -#define UNI_N_CFG_GART_INVAL 0x00000001 -#define UNI_N_CFG_GART_ENABLE 0x00000100 -#define UNI_N_CFG_GART_2xRESET 0x00010000 -#define UNI_N_CFG_GART_DISSBADET 0x00020000 -/* The following seems to only be used only on U3 */ -#define U3_N_CFG_GART_SYNCMODE 0x00040000 -#define U3_N_CFG_GART_PERFRD 0x00080000 -#define U3_N_CFG_GART_B2BGNT 0x00200000 -#define U3_N_CFG_GART_FASTDDR 0x00400000 - -/* My understanding of UniNorth AGP as of UniNorth rev 1.0x, - * revision 1.5 (x4 AGP) may need further changes. - * - * AGP_BASE register contains the base address of the AGP aperture on - * the AGP bus. It doesn't seem to be visible to the CPU as of UniNorth 1.x, - * even if decoding of this address range is enabled in the address select - * register. Apparently, the only supported bases are 256Mb multiples - * (high 4 bits of that register). - * - * GART_BASE register appear to contain the physical address of the GART - * in system memory in the high address bits (page aligned), and the - * GART size in the low order bits (number of GART pages) - * - * The GART format itself is one 32bits word per physical memory page. - * This word contains, in little-endian format (!!!), the physical address - * of the page in the high bits, and what appears to be an "enable" bit - * in the LSB bit (0) that must be set to 1 when the entry is valid. - * - * Obviously, the GART is not cache coherent and so any change to it - * must be flushed to memory (or maybe just make the GART space non - * cachable). AGP memory itself doens't seem to be cache coherent neither. - * - * In order to invalidate the GART (which is probably necessary to inval - * the bridge internal TLBs), the following sequence has to be written, - * in order, to the GART_CTRL register: - * - * UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL - * UNI_N_CFG_GART_ENABLE - * UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET - * UNI_N_CFG_GART_ENABLE - * - * As far as AGP "features" are concerned, it looks like fast write may - * not be supported but this has to be confirmed. - * - * Turning on AGP seem to require a double invalidate operation, one before - * setting the AGP command register, on after. - * - * Turning off AGP seems to require the following sequence: first wait - * for the AGP to be idle by reading the internal status register, then - * write in that order to the GART_CTRL register: - * - * UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL - * 0 - * UNI_N_CFG_GART_2xRESET - * 0 - */ - -/* - * Uni-N memory mapped reg. definitions - * - * Those registers are Big-Endian !! - * - * Their meaning come from either Darwin and/or from experiments I made with - * the bootrom, I'm not sure about their exact meaning yet - * - */ - -/* Version of the UniNorth chip */ -#define UNI_N_VERSION 0x0000 /* Known versions: 3,7 and 8 */ - -#define UNI_N_VERSION_107 0x0003 /* 1.0.7 */ -#define UNI_N_VERSION_10A 0x0007 /* 1.0.10 */ -#define UNI_N_VERSION_150 0x0011 /* 1.5 */ -#define UNI_N_VERSION_200 0x0024 /* 2.0 */ -#define UNI_N_VERSION_PANGEA 0x00C0 /* Integrated U1 + K */ -#define UNI_N_VERSION_INTREPID 0x00D2 /* Integrated U2 + K */ -#define UNI_N_VERSION_300 0x0030 /* 3.0 (U3 on G5) */ - -/* This register is used to enable/disable various clocks */ -#define UNI_N_CLOCK_CNTL 0x0020 -#define UNI_N_CLOCK_CNTL_PCI 0x00000001 /* PCI2 clock control */ -#define UNI_N_CLOCK_CNTL_GMAC 0x00000002 /* GMAC clock control */ -#define UNI_N_CLOCK_CNTL_FW 0x00000004 /* FireWire clock control */ -#define UNI_N_CLOCK_CNTL_ATA100 0x00000010 /* ATA-100 clock control (U2) */ - -/* Power Management control */ -#define UNI_N_POWER_MGT 0x0030 -#define UNI_N_POWER_MGT_NORMAL 0x00 -#define UNI_N_POWER_MGT_IDLE2 0x01 -#define UNI_N_POWER_MGT_SLEEP 0x02 - -/* This register is configured by Darwin depending on the UniN - * revision - */ -#define UNI_N_ARB_CTRL 0x0040 -#define UNI_N_ARB_CTRL_QACK_DELAY_SHIFT 15 -#define UNI_N_ARB_CTRL_QACK_DELAY_MASK 0x0e1f8000 -#define UNI_N_ARB_CTRL_QACK_DELAY 0x30 -#define UNI_N_ARB_CTRL_QACK_DELAY105 0x00 - -/* This one _might_ return the CPU number of the CPU reading it; - * the bootROM decides whether to boot or to sleep/spinloop depending - * on this register beeing 0 or not - */ -#define UNI_N_CPU_NUMBER 0x0050 - -/* This register appear to be read by the bootROM to decide what - * to do on a non-recoverable reset (powerup or wakeup) - */ -#define UNI_N_HWINIT_STATE 0x0070 -#define UNI_N_HWINIT_STATE_SLEEPING 0x01 -#define UNI_N_HWINIT_STATE_RUNNING 0x02 -/* This last bit appear to be used by the bootROM to know the second - * CPU has started and will enter it's sleep loop with IP=0 - */ -#define UNI_N_HWINIT_STATE_CPU1_FLAG 0x10000000 - -/* This register controls AACK delay, which is set when 2004 iBook/PowerBook - * is in low speed mode. - */ -#define UNI_N_AACK_DELAY 0x0100 -#define UNI_N_AACK_DELAY_ENABLE 0x00000001 - -/* Clock status for Intrepid */ -#define UNI_N_CLOCK_STOP_STATUS0 0x0150 -#define UNI_N_CLOCK_STOPPED_EXTAGP 0x00200000 -#define UNI_N_CLOCK_STOPPED_AGPDEL 0x00100000 -#define UNI_N_CLOCK_STOPPED_I2S0_45_49 0x00080000 -#define UNI_N_CLOCK_STOPPED_I2S0_18 0x00040000 -#define UNI_N_CLOCK_STOPPED_I2S1_45_49 0x00020000 -#define UNI_N_CLOCK_STOPPED_I2S1_18 0x00010000 -#define UNI_N_CLOCK_STOPPED_TIMER 0x00008000 -#define UNI_N_CLOCK_STOPPED_SCC_RTCLK18 0x00004000 -#define UNI_N_CLOCK_STOPPED_SCC_RTCLK32 0x00002000 -#define UNI_N_CLOCK_STOPPED_SCC_VIA32 0x00001000 -#define UNI_N_CLOCK_STOPPED_SCC_SLOT0 0x00000800 -#define UNI_N_CLOCK_STOPPED_SCC_SLOT1 0x00000400 -#define UNI_N_CLOCK_STOPPED_SCC_SLOT2 0x00000200 -#define UNI_N_CLOCK_STOPPED_PCI_FBCLKO 0x00000100 -#define UNI_N_CLOCK_STOPPED_VEO0 0x00000080 -#define UNI_N_CLOCK_STOPPED_VEO1 0x00000040 -#define UNI_N_CLOCK_STOPPED_USB0 0x00000020 -#define UNI_N_CLOCK_STOPPED_USB1 0x00000010 -#define UNI_N_CLOCK_STOPPED_USB2 0x00000008 -#define UNI_N_CLOCK_STOPPED_32 0x00000004 -#define UNI_N_CLOCK_STOPPED_45 0x00000002 -#define UNI_N_CLOCK_STOPPED_49 0x00000001 - -#define UNI_N_CLOCK_STOP_STATUS1 0x0160 -#define UNI_N_CLOCK_STOPPED_PLL4REF 0x00080000 -#define UNI_N_CLOCK_STOPPED_CPUDEL 0x00040000 -#define UNI_N_CLOCK_STOPPED_CPU 0x00020000 -#define UNI_N_CLOCK_STOPPED_BUF_REFCKO 0x00010000 -#define UNI_N_CLOCK_STOPPED_PCI2 0x00008000 -#define UNI_N_CLOCK_STOPPED_FW 0x00004000 -#define UNI_N_CLOCK_STOPPED_GB 0x00002000 -#define UNI_N_CLOCK_STOPPED_ATA66 0x00001000 -#define UNI_N_CLOCK_STOPPED_ATA100 0x00000800 -#define UNI_N_CLOCK_STOPPED_MAX 0x00000400 -#define UNI_N_CLOCK_STOPPED_PCI1 0x00000200 -#define UNI_N_CLOCK_STOPPED_KLPCI 0x00000100 -#define UNI_N_CLOCK_STOPPED_USB0PCI 0x00000080 -#define UNI_N_CLOCK_STOPPED_USB1PCI 0x00000040 -#define UNI_N_CLOCK_STOPPED_USB2PCI 0x00000020 -#define UNI_N_CLOCK_STOPPED_7PCI1 0x00000008 -#define UNI_N_CLOCK_STOPPED_AGP 0x00000004 -#define UNI_N_CLOCK_STOPPED_PCI0 0x00000002 -#define UNI_N_CLOCK_STOPPED_18 0x00000001 - -/* Intrepid registe to OF do-platform-clockspreading */ -#define UNI_N_CLOCK_SPREADING 0x190 - -/* Uninorth 1.5 rev. has additional perf. monitor registers at 0xf00-0xf50 */ - - -/* - * U3 specific registers - */ - - -/* U3 Toggle */ -#define U3_TOGGLE_REG 0x00e0 -#define U3_PMC_START_STOP 0x0001 -#define U3_MPIC_RESET 0x0002 -#define U3_MPIC_OUTPUT_ENABLE 0x0004 - -/* U3 API PHY Config 1 */ -#define U3_API_PHY_CONFIG_1 0x23030 - -/* U3 HyperTransport registers */ -#define U3_HT_CONFIG_BASE 0x70000 -#define U3_HT_LINK_COMMAND 0x100 -#define U3_HT_LINK_CONFIG 0x110 -#define U3_HT_LINK_FREQ 0x120 - -#endif /* __ASM_UNINORTH_H__ */ -#endif /* __KERNEL__ */ diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h deleted file mode 100644 index e07d0c7..0000000 --- a/include/asm-powerpc/unistd.h +++ /dev/null @@ -1,398 +0,0 @@ -#ifndef _ASM_POWERPC_UNISTD_H_ -#define _ASM_POWERPC_UNISTD_H_ - -/* - * This file contains the system call numbers. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_lchown 16 -#define __NR_break 17 -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_mpx 56 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_olduname 109 -#define __NR_iopl 110 -#define __NR_vhangup 111 -#define __NR_idle 112 -#define __NR_vm86 113 -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_modify_ldt 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_query_module 166 -#define __NR_poll 167 -#define __NR_nfsservctl 168 -#define __NR_setresgid 169 -#define __NR_getresgid 170 -#define __NR_prctl 171 -#define __NR_rt_sigreturn 172 -#define __NR_rt_sigaction 173 -#define __NR_rt_sigprocmask 174 -#define __NR_rt_sigpending 175 -#define __NR_rt_sigtimedwait 176 -#define __NR_rt_sigqueueinfo 177 -#define __NR_rt_sigsuspend 178 -#define __NR_pread64 179 -#define __NR_pwrite64 180 -#define __NR_chown 181 -#define __NR_getcwd 182 -#define __NR_capget 183 -#define __NR_capset 184 -#define __NR_sigaltstack 185 -#define __NR_sendfile 186 -#define __NR_getpmsg 187 /* some people actually want streams */ -#define __NR_putpmsg 188 /* some people actually want streams */ -#define __NR_vfork 189 -#define __NR_ugetrlimit 190 /* SuS compliant getrlimit */ -#define __NR_readahead 191 -#ifndef __powerpc64__ /* these are 32-bit only */ -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#endif -#define __NR_pciconfig_read 198 -#define __NR_pciconfig_write 199 -#define __NR_pciconfig_iobase 200 -#define __NR_multiplexer 201 -#define __NR_getdents64 202 -#define __NR_pivot_root 203 -#ifndef __powerpc64__ -#define __NR_fcntl64 204 -#endif -#define __NR_madvise 205 -#define __NR_mincore 206 -#define __NR_gettid 207 -#define __NR_tkill 208 -#define __NR_setxattr 209 -#define __NR_lsetxattr 210 -#define __NR_fsetxattr 211 -#define __NR_getxattr 212 -#define __NR_lgetxattr 213 -#define __NR_fgetxattr 214 -#define __NR_listxattr 215 -#define __NR_llistxattr 216 -#define __NR_flistxattr 217 -#define __NR_removexattr 218 -#define __NR_lremovexattr 219 -#define __NR_fremovexattr 220 -#define __NR_futex 221 -#define __NR_sched_setaffinity 222 -#define __NR_sched_getaffinity 223 -/* 224 currently unused */ -#define __NR_tuxcall 225 -#ifndef __powerpc64__ -#define __NR_sendfile64 226 -#endif -#define __NR_io_setup 227 -#define __NR_io_destroy 228 -#define __NR_io_getevents 229 -#define __NR_io_submit 230 -#define __NR_io_cancel 231 -#define __NR_set_tid_address 232 -#define __NR_fadvise64 233 -#define __NR_exit_group 234 -#define __NR_lookup_dcookie 235 -#define __NR_epoll_create 236 -#define __NR_epoll_ctl 237 -#define __NR_epoll_wait 238 -#define __NR_remap_file_pages 239 -#define __NR_timer_create 240 -#define __NR_timer_settime 241 -#define __NR_timer_gettime 242 -#define __NR_timer_getoverrun 243 -#define __NR_timer_delete 244 -#define __NR_clock_settime 245 -#define __NR_clock_gettime 246 -#define __NR_clock_getres 247 -#define __NR_clock_nanosleep 248 -#define __NR_swapcontext 249 -#define __NR_tgkill 250 -#define __NR_utimes 251 -#define __NR_statfs64 252 -#define __NR_fstatfs64 253 -#ifndef __powerpc64__ -#define __NR_fadvise64_64 254 -#endif -#define __NR_rtas 255 -#define __NR_sys_debug_setcontext 256 -/* Number 257 is reserved for vserver */ -#define __NR_migrate_pages 258 -#define __NR_mbind 259 -#define __NR_get_mempolicy 260 -#define __NR_set_mempolicy 261 -#define __NR_mq_open 262 -#define __NR_mq_unlink 263 -#define __NR_mq_timedsend 264 -#define __NR_mq_timedreceive 265 -#define __NR_mq_notify 266 -#define __NR_mq_getsetattr 267 -#define __NR_kexec_load 268 -#define __NR_add_key 269 -#define __NR_request_key 270 -#define __NR_keyctl 271 -#define __NR_waitid 272 -#define __NR_ioprio_set 273 -#define __NR_ioprio_get 274 -#define __NR_inotify_init 275 -#define __NR_inotify_add_watch 276 -#define __NR_inotify_rm_watch 277 -#define __NR_spu_run 278 -#define __NR_spu_create 279 -#define __NR_pselect6 280 -#define __NR_ppoll 281 -#define __NR_unshare 282 -#define __NR_splice 283 -#define __NR_tee 284 -#define __NR_vmsplice 285 -#define __NR_openat 286 -#define __NR_mkdirat 287 -#define __NR_mknodat 288 -#define __NR_fchownat 289 -#define __NR_futimesat 290 -#ifdef __powerpc64__ -#define __NR_newfstatat 291 -#else -#define __NR_fstatat64 291 -#endif -#define __NR_unlinkat 292 -#define __NR_renameat 293 -#define __NR_linkat 294 -#define __NR_symlinkat 295 -#define __NR_readlinkat 296 -#define __NR_fchmodat 297 -#define __NR_faccessat 298 -#define __NR_get_robust_list 299 -#define __NR_set_robust_list 300 -#define __NR_move_pages 301 -#define __NR_getcpu 302 -#define __NR_epoll_pwait 303 -#define __NR_utimensat 304 -#define __NR_signalfd 305 -#define __NR_timerfd_create 306 -#define __NR_eventfd 307 -#define __NR_sync_file_range2 308 -#define __NR_fallocate 309 -#define __NR_subpage_prot 310 -#define __NR_timerfd_settime 311 -#define __NR_timerfd_gettime 312 -#define __NR_signalfd4 313 -#define __NR_eventfd2 314 -#define __NR_epoll_create1 315 -#define __NR_dup3 316 -#define __NR_pipe2 317 -#define __NR_inotify_init1 318 - -#ifdef __KERNEL__ - -#define __NR_syscalls 319 - -#define __NR__exit __NR_exit -#define NR_syscalls __NR_syscalls - -#ifndef __ASSEMBLY__ - -#include -#include -#include - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND -#ifdef CONFIG_PPC32 -#define __ARCH_WANT_OLD_STAT -#endif -#ifdef CONFIG_PPC64 -#define __ARCH_WANT_COMPAT_SYS_TIME -#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND -#define __ARCH_WANT_SYS_NEWFSTATAT -#endif - -/* - * "Conditional" syscalls - */ -#define cond_syscall(x) \ - asmlinkage long x (void) __attribute__((weak,alias("sys_ni_syscall"))) - -#endif /* __ASSEMBLY__ */ -#endif /* __KERNEL__ */ - -#endif /* _ASM_POWERPC_UNISTD_H_ */ diff --git a/include/asm-powerpc/user.h b/include/asm-powerpc/user.h deleted file mode 100644 index 3fd4545..0000000 --- a/include/asm-powerpc/user.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _ASM_POWERPC_USER_H -#define _ASM_POWERPC_USER_H - -#include -#include - -/* - * Adapted from - * - * Core file format: The core file is written in such a way that gdb - * can understand it and provide useful information to the user (under - * linux we use the `trad-core' bfd, NOT the osf-core). The file contents - * are as follows: - * - * upage: 1 page consisting of a user struct that tells gdb - * what is present in the file. Directly after this is a - * copy of the task_struct, which is currently not used by gdb, - * but it may come in handy at some point. All of the registers - * are stored as part of the upage. The upage should always be - * only one page long. - * data: The data segment follows next. We use current->end_text to - * current->brk to pick up all of the user variables, plus any memory - * that may have been sbrk'ed. No attempt is made to determine if a - * page is demand-zero or if a page is totally unused, we just cover - * the entire range. All of the addresses are rounded in such a way - * that an integral number of pages is written. - * stack: We need the stack information in order to get a meaningful - * backtrace. We need to write the data from usp to - * current->start_stack, so we round each of these in order to be able - * to write an integer number of pages. - */ -struct user { - struct pt_regs regs; /* entire machine state */ - size_t u_tsize; /* text size (pages) */ - size_t u_dsize; /* data size (pages) */ - size_t u_ssize; /* stack size (pages) */ - unsigned long start_code; /* text starting address */ - unsigned long start_data; /* data starting address */ - unsigned long start_stack; /* stack starting address */ - long int signal; /* signal causing core dump */ - unsigned long u_ar0; /* help gdb find registers */ - unsigned long magic; /* identifies a core file */ - char u_comm[32]; /* user command name */ -}; - -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_DATA_START_ADDR (u.start_data) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) -#endif /* _ASM_POWERPC_USER_H */ diff --git a/include/asm-powerpc/vdso.h b/include/asm-powerpc/vdso.h deleted file mode 100644 index 26fc449..0000000 --- a/include/asm-powerpc/vdso.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef __PPC64_VDSO_H__ -#define __PPC64_VDSO_H__ - -#ifdef __KERNEL__ - -/* Default link addresses for the vDSOs */ -#define VDSO32_LBASE 0x100000 -#define VDSO64_LBASE 0x100000 - -/* Default map addresses */ -#define VDSO32_MBASE VDSO32_LBASE -#define VDSO64_MBASE VDSO64_LBASE - -#define VDSO_VERSION_STRING LINUX_2.6.15 - -/* Define if 64 bits VDSO has procedure descriptors */ -#undef VDS64_HAS_DESCRIPTORS - -#ifndef __ASSEMBLY__ - -/* Offsets relative to thread->vdso_base */ -extern unsigned long vdso64_rt_sigtramp; -extern unsigned long vdso32_sigtramp; -extern unsigned long vdso32_rt_sigtramp; - -#else /* __ASSEMBLY__ */ - -#ifdef __VDSO64__ -#ifdef VDS64_HAS_DESCRIPTORS -#define V_FUNCTION_BEGIN(name) \ - .globl name; \ - .section ".opd","a"; \ - .align 3; \ - name: \ - .quad .name,.TOC.@tocbase,0; \ - .previous; \ - .globl .name; \ - .type .name,@function; \ - .name: \ - -#define V_FUNCTION_END(name) \ - .size .name,.-.name; - -#define V_LOCAL_FUNC(name) (.name) - -#else /* VDS64_HAS_DESCRIPTORS */ - -#define V_FUNCTION_BEGIN(name) \ - .globl name; \ - name: \ - -#define V_FUNCTION_END(name) \ - .size name,.-name; - -#define V_LOCAL_FUNC(name) (name) - -#endif /* VDS64_HAS_DESCRIPTORS */ -#endif /* __VDSO64__ */ - -#ifdef __VDSO32__ - -#define V_FUNCTION_BEGIN(name) \ - .globl name; \ - .type name,@function; \ - name: \ - -#define V_FUNCTION_END(name) \ - .size name,.-name; - -#define V_LOCAL_FUNC(name) (name) - -#endif /* __VDSO32__ */ - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* __PPC64_VDSO_H__ */ diff --git a/include/asm-powerpc/vdso_datapage.h b/include/asm-powerpc/vdso_datapage.h deleted file mode 100644 index f013932..0000000 --- a/include/asm-powerpc/vdso_datapage.h +++ /dev/null @@ -1,121 +0,0 @@ -#ifndef _VDSO_DATAPAGE_H -#define _VDSO_DATAPAGE_H -#ifdef __KERNEL__ - -/* - * Copyright (C) 2002 Peter Bergner , IBM - * Copyright (C) 2005 Benjamin Herrenschmidy , - * IBM Corp. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - - -/* - * Note about this structure: - * - * This structure was historically called systemcfg and exposed to - * userland via /proc/ppc64/systemcfg. Unfortunately, this became an - * ABI issue as some proprietary software started relying on being able - * to mmap() it, thus we have to keep the base layout at least for a - * few kernel versions. - * - * However, since ppc32 doesn't suffer from this backward handicap, - * a simpler version of the data structure is used there with only the - * fields actually used by the vDSO. - * - */ - -/* - * If the major version changes we are incompatible. - * Minor version changes are a hint. - */ -#define SYSTEMCFG_MAJOR 1 -#define SYSTEMCFG_MINOR 1 - -#ifndef __ASSEMBLY__ - -#include - -#define SYSCALL_MAP_SIZE ((__NR_syscalls + 31) / 32) - -/* - * So here is the ppc64 backward compatible version - */ - -#ifdef CONFIG_PPC64 - -struct vdso_data { - __u8 eye_catcher[16]; /* Eyecatcher: SYSTEMCFG:PPC64 0x00 */ - struct { /* Systemcfg version numbers */ - __u32 major; /* Major number 0x10 */ - __u32 minor; /* Minor number 0x14 */ - } version; - - /* Note about the platform flags: it now only contains the lpar - * bit. The actual platform number is dead and burried - */ - __u32 platform; /* Platform flags 0x18 */ - __u32 processor; /* Processor type 0x1C */ - __u64 processorCount; /* # of physical processors 0x20 */ - __u64 physicalMemorySize; /* Size of real memory(B) 0x28 */ - __u64 tb_orig_stamp; /* Timebase at boot 0x30 */ - __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ - __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ - __u64 stamp_xsec; /* 0x48 */ - __u64 tb_update_count; /* Timebase atomicity ctr 0x50 */ - __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ - __u32 tz_dsttime; /* Type of dst correction 0x5C */ - __u32 dcache_size; /* L1 d-cache size 0x60 */ - __u32 dcache_line_size; /* L1 d-cache line size 0x64 */ - __u32 icache_size; /* L1 i-cache size 0x68 */ - __u32 icache_line_size; /* L1 i-cache line size 0x6C */ - - /* those additional ones don't have to be located anywhere - * special as they were not part of the original systemcfg - */ - __u32 dcache_block_size; /* L1 d-cache block size */ - __u32 icache_block_size; /* L1 i-cache block size */ - __u32 dcache_log_block_size; /* L1 d-cache log block size */ - __u32 icache_log_block_size; /* L1 i-cache log block size */ - __s32 wtom_clock_sec; /* Wall to monotonic clock */ - __s32 wtom_clock_nsec; - __u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */ - __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ -}; - -#else /* CONFIG_PPC64 */ - -/* - * And here is the simpler 32 bits version - */ -struct vdso_data { - __u64 tb_orig_stamp; /* Timebase at boot 0x30 */ - __u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ - __u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ - __u64 stamp_xsec; /* 0x48 */ - __u32 tb_update_count; /* Timebase atomicity ctr 0x50 */ - __u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ - __u32 tz_dsttime; /* Type of dst correction 0x5C */ - __s32 wtom_clock_sec; /* Wall to monotonic clock */ - __s32 wtom_clock_nsec; - __u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */ - __u32 dcache_block_size; /* L1 d-cache block size */ - __u32 icache_block_size; /* L1 i-cache block size */ - __u32 dcache_log_block_size; /* L1 d-cache log block size */ - __u32 icache_log_block_size; /* L1 i-cache log block size */ -}; - -#endif /* CONFIG_PPC64 */ - -#ifdef __KERNEL__ -extern struct vdso_data *vdso_data; -#endif - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ -#endif /* _SYSTEMCFG_H */ diff --git a/include/asm-powerpc/vga.h b/include/asm-powerpc/vga.h deleted file mode 100644 index a2eac40..0000000 --- a/include/asm-powerpc/vga.h +++ /dev/null @@ -1,53 +0,0 @@ -#ifndef _ASM_POWERPC_VGA_H_ -#define _ASM_POWERPC_VGA_H_ - -#ifdef __KERNEL__ - -/* - * Access to VGA videoram - * - * (c) 1998 Martin Mares - */ - - -#include - - -#if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_MDA_CONSOLE) - -#define VT_BUF_HAVE_RW -/* - * These are only needed for supporting VGA or MDA text mode, which use little - * endian byte ordering. - * In other cases, we can optimize by using native byte ordering and - * has already done the right job for us. - */ - -static inline void scr_writew(u16 val, volatile u16 *addr) -{ - st_le16(addr, val); -} - -static inline u16 scr_readw(volatile const u16 *addr) -{ - return ld_le16(addr); -} - -#define VT_BUF_HAVE_MEMCPYW -#define scr_memcpyw memcpy - -#endif /* !CONFIG_VGA_CONSOLE && !CONFIG_MDA_CONSOLE */ - -extern unsigned long vgacon_remap_base; - -#ifdef __powerpc64__ -#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap((x), s)) -#else -#define VGA_MAP_MEM(x,s) (x + vgacon_remap_base) -#endif - -#define vga_readb(x) (*(x)) -#define vga_writeb(x,y) (*(y) = (x)) - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_VGA_H_ */ diff --git a/include/asm-powerpc/vio.h b/include/asm-powerpc/vio.h deleted file mode 100644 index 0a290a1..0000000 --- a/include/asm-powerpc/vio.h +++ /dev/null @@ -1,118 +0,0 @@ -/* - * IBM PowerPC Virtual I/O Infrastructure Support. - * - * Copyright (c) 2003 IBM Corp. - * Dave Engebretsen engebret@us.ibm.com - * Santiago Leon santil@us.ibm.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef _ASM_POWERPC_VIO_H -#define _ASM_POWERPC_VIO_H -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -#include -#include - -/* - * Architecture-specific constants for drivers to - * extract attributes of the device using vio_get_attribute() - */ -#define VETH_MAC_ADDR "local-mac-address" -#define VETH_MCAST_FILTER_SIZE "ibm,mac-address-filters" - -/* End architecture-specific constants */ - -#define h_vio_signal(ua, mode) \ - plpar_hcall_norets(H_VIO_SIGNAL, ua, mode) - -#define VIO_IRQ_DISABLE 0UL -#define VIO_IRQ_ENABLE 1UL - -/* - * VIO CMO minimum entitlement for all devices and spare entitlement - */ -#define VIO_CMO_MIN_ENT 1562624 - -struct iommu_table; - -/** - * vio_dev - This structure is used to describe virtual I/O devices. - * - * @desired: set from return of driver's get_desired_dma() function - * @entitled: bytes of IO data that has been reserved for this device. - * @allocated: bytes of IO data currently in use by the device. - * @allocs_failed: number of DMA failures due to insufficient entitlement. - */ -struct vio_dev { - const char *name; - const char *type; - uint32_t unit_address; - unsigned int irq; - struct { - size_t desired; - size_t entitled; - size_t allocated; - atomic_t allocs_failed; - } cmo; - struct device dev; -}; - -struct vio_driver { - const struct vio_device_id *id_table; - int (*probe)(struct vio_dev *dev, const struct vio_device_id *id); - int (*remove)(struct vio_dev *dev); - /* A driver must have a get_desired_dma() function to - * be loaded in a CMO environment if it uses DMA. - */ - unsigned long (*get_desired_dma)(struct vio_dev *dev); - struct device_driver driver; -}; - -extern int vio_register_driver(struct vio_driver *drv); -extern void vio_unregister_driver(struct vio_driver *drv); - -extern int vio_cmo_entitlement_update(size_t); -extern void vio_cmo_set_dev_desired(struct vio_dev *viodev, size_t desired); - -extern void __devinit vio_unregister_device(struct vio_dev *dev); - -struct device_node; - -extern struct vio_dev *vio_register_device_node( - struct device_node *node_vdev); -extern const void *vio_get_attribute(struct vio_dev *vdev, char *which, - int *length); -#ifdef CONFIG_PPC_PSERIES -extern struct vio_dev *vio_find_node(struct device_node *vnode); -extern int vio_enable_interrupts(struct vio_dev *dev); -extern int vio_disable_interrupts(struct vio_dev *dev); -#else -static inline int vio_enable_interrupts(struct vio_dev *dev) -{ - return 0; -} -#endif - -static inline struct vio_driver *to_vio_driver(struct device_driver *drv) -{ - return container_of(drv, struct vio_driver, driver); -} - -static inline struct vio_dev *to_vio_dev(struct device *dev) -{ - return container_of(dev, struct vio_dev, dev); -} - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_VIO_H */ diff --git a/include/asm-powerpc/xilinx_intc.h b/include/asm-powerpc/xilinx_intc.h deleted file mode 100644 index 343612f..0000000 --- a/include/asm-powerpc/xilinx_intc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Xilinx intc external definitions - * - * Copyright 2007 Secret Lab Technologies Ltd. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _ASM_POWERPC_XILINX_INTC_H -#define _ASM_POWERPC_XILINX_INTC_H - -#ifdef __KERNEL__ - -extern void __init xilinx_intc_init_tree(void); -extern unsigned int xilinx_intc_get_irq(void); - -#endif /* __KERNEL__ */ -#endif /* _ASM_POWERPC_XILINX_INTC_H */ diff --git a/include/asm-powerpc/xmon.h b/include/asm-powerpc/xmon.h deleted file mode 100644 index 5eb8e59..0000000 --- a/include/asm-powerpc/xmon.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __ASM_POWERPC_XMON_H -#define __ASM_POWERPC_XMON_H - -/* - * Copyrignt (C) 2006 IBM Corp - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifdef __KERNEL__ - -#include - -#ifdef CONFIG_XMON -extern void xmon_setup(void); -extern void xmon_register_spus(struct list_head *list); -struct pt_regs; -extern int xmon(struct pt_regs *excp); -extern irqreturn_t xmon_irq(int, void *); -#else -static inline void xmon_setup(void) { }; -static inline void xmon_register_spus(struct list_head *list) { }; -#endif - -#if defined(CONFIG_XMON) && defined(CONFIG_SMP) -extern int cpus_are_in_xmon(void); -#endif - -#endif /* __KERNEL __ */ -#endif /* __ASM_POWERPC_XMON_H */ diff --git a/include/asm-powerpc/xor.h b/include/asm-powerpc/xor.h deleted file mode 100644 index c82eb12..0000000 --- a/include/asm-powerpc/xor.h +++ /dev/null @@ -1 +0,0 @@ -#include -- cgit v1.1 From f880374c2fe37aad3fa62253a4bc125d7a933aad Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Sun, 3 Aug 2008 21:15:08 -0700 Subject: sctp: Drop ipfargok in sctp_xmit function The ipfragok flag controls whether the packet may be fragmented either on the local host on beyond. The latter is only valid on IPv4. In fact, we never want to do the latter even on IPv4 when PMTU is enabled. This is because even though we can't fragment packets within SCTP due to the prtocol's inherent faults, we can still fragment it at IP layer. By setting the DF bit we will improve the PMTU process. RFC 2960 only says that we SHOULD clear the DF bit in this case, so we're compliant even if we set the DF bit. In fact RFC 4960 no longer has this statement. Once we make this change, we only need to control the local fragmentation. There is already a bit in the skb which controls that, local_df. So this patch sets that instead of using the ipfragok argument. The only complication is that there isn't a struct sock object per transport, so for IPv4 we have to resort to changing the pmtudisc field for every packet. This should be safe though as the protocol is single-threaded. Note that after this patch we can remove ipfragok from the rest of the stack too. Signed-off-by: Herbert Xu Signed-off-by: David S. Miller --- include/net/sctp/structs.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h index 535a18f..ab1c472 100644 --- a/include/net/sctp/structs.h +++ b/include/net/sctp/structs.h @@ -524,8 +524,7 @@ static inline void sctp_ssn_skip(struct sctp_stream *stream, __u16 id, */ struct sctp_af { int (*sctp_xmit) (struct sk_buff *skb, - struct sctp_transport *, - int ipfragok); + struct sctp_transport *); int (*setsockopt) (struct sock *sk, int level, int optname, -- cgit v1.1 From 3f44675439b136d51179d31eb5a498383cb38624 Mon Sep 17 00:00:00 2001 From: Roland Dreier Date: Mon, 4 Aug 2008 11:02:14 -0700 Subject: RDMA/cma: Remove padding arrays by using struct sockaddr_storage There are a few places where the RDMA CM code handles IPv6 by doing struct sockaddr addr; u8 pad[sizeof(struct sockaddr_in6) - sizeof(struct sockaddr)]; This is fragile and ugly; handle this in a better way with just struct sockaddr_storage addr; [ Also roll in patch from Aleksey Senin to switch to struct sockaddr_storage and get rid of padding arrays in struct rdma_addr. ] Signed-off-by: Roland Dreier --- include/rdma/rdma_cm.h | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/rdma/rdma_cm.h b/include/rdma/rdma_cm.h index df7faf0..c6b2962 100644 --- a/include/rdma/rdma_cm.h +++ b/include/rdma/rdma_cm.h @@ -71,12 +71,8 @@ enum rdma_port_space { }; struct rdma_addr { - struct sockaddr src_addr; - u8 src_pad[sizeof(struct sockaddr_in6) - - sizeof(struct sockaddr)]; - struct sockaddr dst_addr; - u8 dst_pad[sizeof(struct sockaddr_in6) - - sizeof(struct sockaddr)]; + struct sockaddr_storage src_addr; + struct sockaddr_storage dst_addr; struct rdma_dev_addr dev_addr; }; -- cgit v1.1 From 98f7dfd86cbbd377e2cbc293529681b914296f68 Mon Sep 17 00:00:00 2001 From: Emmanuel Grumbach Date: Fri, 18 Jul 2008 13:52:59 +0800 Subject: mac80211: pass dtim_period to low level driver This patch adds the dtim_period in ieee80211_bss_conf, this allows the low level driver to know the dtim_period, and to plan power save accordingly. Signed-off-by: Emmanuel Grumbach Signed-off-by: Tomas Winkler Signed-off-by: Zhu Yi Acked-by: Johannes Berg Signed-off-by: John W. Linville --- include/linux/ieee80211.h | 13 +++++++++++++ include/net/mac80211.h | 4 +++- 2 files changed, 16 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/ieee80211.h b/include/linux/ieee80211.h index a1630ba..7f4df7c 100644 --- a/include/linux/ieee80211.h +++ b/include/linux/ieee80211.h @@ -506,6 +506,19 @@ struct ieee80211_channel_sw_ie { u8 count; } __attribute__ ((packed)); +/** + * struct ieee80211_tim + * + * This structure refers to "Traffic Indication Map information element" + */ +struct ieee80211_tim_ie { + u8 dtim_count; + u8 dtim_period; + u8 bitmap_ctrl; + /* variable size: 1 - 251 bytes */ + u8 virtual_map[0]; +} __attribute__ ((packed)); + struct ieee80211_mgmt { __le16 frame_control; __le16 duration; diff --git a/include/net/mac80211.h b/include/net/mac80211.h index b527210..9d99f2e 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -177,9 +177,10 @@ enum ieee80211_bss_change { * @aid: association ID number, valid only when @assoc is true * @use_cts_prot: use CTS protection * @use_short_preamble: use 802.11b short preamble + * @dtim_period: num of beacons before the next DTIM, for PSM * @timestamp: beacon timestamp * @beacon_int: beacon interval - * @assoc_capability: capabbilities taken from assoc resp + * @assoc_capability: capabilities taken from assoc resp * @assoc_ht: association in HT mode * @ht_conf: ht capabilities * @ht_bss_conf: ht extended capabilities @@ -191,6 +192,7 @@ struct ieee80211_bss_conf { /* erp related data */ bool use_cts_prot; bool use_short_preamble; + u8 dtim_period; u16 beacon_int; u16 assoc_capability; u64 timestamp; -- cgit v1.1 From ea95bba41e69c616bb1512cf59d22f33266b8568 Mon Sep 17 00:00:00 2001 From: Tomas Winkler Date: Fri, 18 Jul 2008 13:53:00 +0800 Subject: mac80211: make listen_interval be limited by low level driver This patch makes possible for a driver to specify maximal listen interval The possibility for user to configure listen interval is not implemented yet, currently the maximum provided by the driver or 1 is used. Mac80211 uses config handler to set listen interval for to the driver. Signed-off-by: Tomas Winkler Signed-off-by: Emmanuel Grumbach Signed-off-by: Zhu Yi Signed-off-by: John W. Linville --- include/net/mac80211.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/mac80211.h b/include/net/mac80211.h index 9d99f2e..b397e4d 100644 --- a/include/net/mac80211.h +++ b/include/net/mac80211.h @@ -432,6 +432,7 @@ enum ieee80211_conf_flags { * @radio_enabled: when zero, driver is required to switch off the radio. * TODO make a flag * @beacon_int: beacon interval (TODO make interface config) + * @listen_interval: listen interval in units of beacon interval * @flags: configuration flags defined above * @power_level: requested transmit power (in dBm) * @max_antenna_gain: maximum antenna gain (in dBi) @@ -446,6 +447,7 @@ struct ieee80211_conf { int radio_enabled; int beacon_int; + u16 listen_interval; u32 flags; int power_level; int max_antenna_gain; @@ -787,6 +789,9 @@ enum ieee80211_hw_flags { * @max_signal: Maximum value for signal (rssi) in RX information, used * only when @IEEE80211_HW_SIGNAL_UNSPEC or @IEEE80211_HW_SIGNAL_DB * + * @max_listen_interval: max listen interval in units of beacon interval + * that HW supports + * * @queues: number of available hardware transmit queues for * data packets. WMM/QoS requires at least four, these * queues need to have configurable access parameters. @@ -814,7 +819,9 @@ struct ieee80211_hw { unsigned int extra_tx_headroom; int channel_change_time; int vif_data_size; - u16 queues, ampdu_queues; + u16 queues; + u16 ampdu_queues; + u16 max_listen_interval; s8 max_signal; }; -- cgit v1.1 From fca082c9f1e11ec07efa8d2f9f13688521253f36 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 4 Aug 2008 16:36:20 -0700 Subject: Revert "[SCSI] extend the last_sector_bug flag to cover more sectors" This reverts commit 2b142900784c6e38c8d39fa57d5f95ef08e735d8, since it seems to break some other USB storage devices (at least a JMicron USB to ATA bridge). As such, while it apparently fixes some cardreaders, it would need to be made conditional on the exact reader it fixes in order to avoid causing regressions. Cc: Alan Jenkins Cc: James Bottomley Signed-off-by: Linus Torvalds --- include/scsi/scsi_device.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 291d56a..9cecc40 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -140,8 +140,7 @@ struct scsi_device { unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ unsigned guess_capacity:1; /* READ_CAPACITY might be too high by 1 */ unsigned retry_hwerror:1; /* Retry HARDWARE_ERROR */ - unsigned last_sector_bug:1; /* do not use multisector accesses on - SD_LAST_BUGGY_SECTORS */ + unsigned last_sector_bug:1; /* Always read last sector in a 1 sector read */ DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */ struct list_head event_list; /* asserted events */ -- cgit v1.1 From 1a3f7d98e5f50f21ce6fb1406a35531d9596c5c6 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 4 Aug 2008 16:50:38 -0700 Subject: Revert "UFS: add const to parser token table" This reverts commit f9247273cb69ba101877e946d2d83044409cc8c5 (and fb2e405fc1fc8b20d9c78eaa1c7fd5a297efde43 - "fix fs/nfs/nfsroot.c compilation" - that fixed a missed conversion). The changes cause problems for at least the sparc build. Let's re-do them when the exact issues are resolved. Requested-by: Andrew Morton Requested-by: Steven Whitehouse Cc: David Miller Signed-off-by: Linus Torvalds --- include/linux/parser.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/parser.h b/include/linux/parser.h index cc554ca..7dcd050 100644 --- a/include/linux/parser.h +++ b/include/linux/parser.h @@ -14,7 +14,7 @@ struct match_token { const char *pattern; }; -typedef const struct match_token match_table_t[]; +typedef struct match_token match_table_t[]; /* Maximum number of arguments that match_token will find in a pattern */ enum {MAX_OPT_ARGS = 3}; -- cgit v1.1 From 7274264f60cc0b71389efed286001ff0860c3141 Mon Sep 17 00:00:00 2001 From: Stephen Rothwell Date: Sun, 3 Aug 2008 22:02:10 +0200 Subject: m68k: some asm-sparc include files moved So copy their contents into the asm-m68k files. Signed-off-by: Stephen Rothwell Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- include/asm-m68k/contregs.h | 51 ++++++- include/asm-m68k/fbio.h | 331 +++++++++++++++++++++++++++++++++++++++++++- include/asm-m68k/idprom.h | 21 ++- 3 files changed, 400 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-m68k/contregs.h b/include/asm-m68k/contregs.h index 1e233e7..d1ea750 100644 --- a/include/asm-m68k/contregs.h +++ b/include/asm-m68k/contregs.h @@ -1,4 +1,53 @@ #ifndef _M68K_CONTREGS_H #define _M68K_CONTREGS_H -#include + +/* contregs.h: Addresses of registers in the ASI_CONTROL alternate address + * space. These are for the mmu's context register, etc. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +/* 3=sun3 + 4=sun4 (as in sun4 sysmaint student book) + c=sun4c (according to davem) */ + +#define AC_IDPROM 0x00000000 /* 34 ID PROM, R/O, byte, 32 bytes */ +#define AC_PAGEMAP 0x10000000 /* 3 Pagemap R/W, long */ +#define AC_SEGMAP 0x20000000 /* 3 Segment map, byte */ +#define AC_CONTEXT 0x30000000 /* 34c current mmu-context */ +#define AC_SENABLE 0x40000000 /* 34c system dvma/cache/reset enable reg*/ +#define AC_UDVMA_ENB 0x50000000 /* 34 Not used on Sun boards, byte */ +#define AC_BUS_ERROR 0x60000000 /* 34 Not cleared on read, byte. */ +#define AC_SYNC_ERR 0x60000000 /* c fault type */ +#define AC_SYNC_VA 0x60000004 /* c fault virtual address */ +#define AC_ASYNC_ERR 0x60000008 /* c asynchronous fault type */ +#define AC_ASYNC_VA 0x6000000c /* c async fault virtual address */ +#define AC_LEDS 0x70000000 /* 34 Zero turns on LEDs, byte */ +#define AC_CACHETAGS 0x80000000 /* 34c direct access to the VAC tags */ +#define AC_CACHEDDATA 0x90000000 /* 3 c direct access to the VAC data */ +#define AC_UDVMA_MAP 0xD0000000 /* 4 Not used on Sun boards, byte */ +#define AC_VME_VECTOR 0xE0000000 /* 4 For non-Autovector VME, byte */ +#define AC_BOOT_SCC 0xF0000000 /* 34 bypass to access Zilog 8530. byte.*/ + +/* s=Swift, h=Ross_HyperSPARC, v=TI_Viking, t=Tsunami, r=Ross_Cypress */ +#define AC_M_PCR 0x0000 /* shv Processor Control Reg */ +#define AC_M_CTPR 0x0100 /* shv Context Table Pointer Reg */ +#define AC_M_CXR 0x0200 /* shv Context Register */ +#define AC_M_SFSR 0x0300 /* shv Synchronous Fault Status Reg */ +#define AC_M_SFAR 0x0400 /* shv Synchronous Fault Address Reg */ +#define AC_M_AFSR 0x0500 /* hv Asynchronous Fault Status Reg */ +#define AC_M_AFAR 0x0600 /* hv Asynchronous Fault Address Reg */ +#define AC_M_RESET 0x0700 /* hv Reset Reg */ +#define AC_M_RPR 0x1000 /* hv Root Pointer Reg */ +#define AC_M_TSUTRCR 0x1000 /* s TLB Replacement Ctrl Reg */ +#define AC_M_IAPTP 0x1100 /* hv Instruction Access PTP */ +#define AC_M_DAPTP 0x1200 /* hv Data Access PTP */ +#define AC_M_ITR 0x1300 /* hv Index Tag Register */ +#define AC_M_TRCR 0x1400 /* hv TLB Replacement Control Reg */ +#define AC_M_SFSRX 0x1300 /* s Synch Fault Status Reg prim */ +#define AC_M_SFARX 0x1400 /* s Synch Fault Address Reg prim */ +#define AC_M_RPR1 0x1500 /* h Root Pointer Reg (entry 2) */ +#define AC_M_IAPTP1 0x1600 /* h Instruction Access PTP (entry 2) */ +#define AC_M_DAPTP1 0x1700 /* h Data Access PTP (entry 2) */ + #endif /* _M68K_CONTREGS_H */ diff --git a/include/asm-m68k/fbio.h b/include/asm-m68k/fbio.h index c17edf8..b9215a0 100644 --- a/include/asm-m68k/fbio.h +++ b/include/asm-m68k/fbio.h @@ -1 +1,330 @@ -#include +#ifndef __LINUX_FBIO_H +#define __LINUX_FBIO_H + +#include +#include + +/* Constants used for fbio SunOS compatibility */ +/* (C) 1996 Miguel de Icaza */ + +/* Frame buffer types */ +#define FBTYPE_NOTYPE -1 +#define FBTYPE_SUN1BW 0 /* mono */ +#define FBTYPE_SUN1COLOR 1 +#define FBTYPE_SUN2BW 2 +#define FBTYPE_SUN2COLOR 3 +#define FBTYPE_SUN2GP 4 +#define FBTYPE_SUN5COLOR 5 +#define FBTYPE_SUN3COLOR 6 +#define FBTYPE_MEMCOLOR 7 +#define FBTYPE_SUN4COLOR 8 + +#define FBTYPE_NOTSUN1 9 +#define FBTYPE_NOTSUN2 10 +#define FBTYPE_NOTSUN3 11 + +#define FBTYPE_SUNFAST_COLOR 12 /* cg6 */ +#define FBTYPE_SUNROP_COLOR 13 +#define FBTYPE_SUNFB_VIDEO 14 +#define FBTYPE_SUNGIFB 15 +#define FBTYPE_SUNGPLAS 16 +#define FBTYPE_SUNGP3 17 +#define FBTYPE_SUNGT 18 +#define FBTYPE_SUNLEO 19 /* zx Leo card */ +#define FBTYPE_MDICOLOR 20 /* cg14 */ +#define FBTYPE_TCXCOLOR 21 /* SUNW,tcx card */ + +#define FBTYPE_LASTPLUSONE 21 /* This is not last + 1 in fact... */ + +/* Does not seem to be listed in the Sun file either */ +#define FBTYPE_CREATOR 22 +#define FBTYPE_PCI_IGA1682 23 +#define FBTYPE_P9100COLOR 24 + +#define FBTYPE_PCI_GENERIC 1000 +#define FBTYPE_PCI_MACH64 1001 + +/* fbio ioctls */ +/* Returned by FBIOGTYPE */ +struct fbtype { + int fb_type; /* fb type, see above */ + int fb_height; /* pixels */ + int fb_width; /* pixels */ + int fb_depth; + int fb_cmsize; /* color map entries */ + int fb_size; /* fb size in bytes */ +}; +#define FBIOGTYPE _IOR('F', 0, struct fbtype) + +struct fbcmap { + int index; /* first element (0 origin) */ + int count; + unsigned char __user *red; + unsigned char __user *green; + unsigned char __user *blue; +}; + +#ifdef __KERNEL__ +#define FBIOPUTCMAP_SPARC _IOW('F', 3, struct fbcmap) +#define FBIOGETCMAP_SPARC _IOW('F', 4, struct fbcmap) +#else +#define FBIOPUTCMAP _IOW('F', 3, struct fbcmap) +#define FBIOGETCMAP _IOW('F', 4, struct fbcmap) +#endif + +/* # of device specific values */ +#define FB_ATTR_NDEVSPECIFIC 8 +/* # of possible emulations */ +#define FB_ATTR_NEMUTYPES 4 + +struct fbsattr { + int flags; + int emu_type; /* -1 if none */ + int dev_specific[FB_ATTR_NDEVSPECIFIC]; +}; + +struct fbgattr { + int real_type; /* real frame buffer type */ + int owner; /* unknown */ + struct fbtype fbtype; /* real frame buffer fbtype */ + struct fbsattr sattr; + int emu_types[FB_ATTR_NEMUTYPES]; /* supported emulations */ +}; +#define FBIOSATTR _IOW('F', 5, struct fbgattr) /* Unsupported: */ +#define FBIOGATTR _IOR('F', 6, struct fbgattr) /* supported */ + +#define FBIOSVIDEO _IOW('F', 7, int) +#define FBIOGVIDEO _IOR('F', 8, int) + +struct fbcursor { + short set; /* what to set, choose from the list above */ + short enable; /* cursor on/off */ + struct fbcurpos pos; /* cursor position */ + struct fbcurpos hot; /* cursor hot spot */ + struct fbcmap cmap; /* color map info */ + struct fbcurpos size; /* cursor bit map size */ + char __user *image; /* cursor image bits */ + char __user *mask; /* cursor mask bits */ +}; + +/* set/get cursor attributes/shape */ +#define FBIOSCURSOR _IOW('F', 24, struct fbcursor) +#define FBIOGCURSOR _IOWR('F', 25, struct fbcursor) + +/* set/get cursor position */ +#define FBIOSCURPOS _IOW('F', 26, struct fbcurpos) +#define FBIOGCURPOS _IOW('F', 27, struct fbcurpos) + +/* get max cursor size */ +#define FBIOGCURMAX _IOR('F', 28, struct fbcurpos) + +/* wid manipulation */ +struct fb_wid_alloc { +#define FB_WID_SHARED_8 0 +#define FB_WID_SHARED_24 1 +#define FB_WID_DBL_8 2 +#define FB_WID_DBL_24 3 + __u32 wa_type; + __s32 wa_index; /* Set on return */ + __u32 wa_count; +}; +struct fb_wid_item { + __u32 wi_type; + __s32 wi_index; + __u32 wi_attrs; + __u32 wi_values[32]; +}; +struct fb_wid_list { + __u32 wl_flags; + __u32 wl_count; + struct fb_wid_item *wl_list; +}; + +#define FBIO_WID_ALLOC _IOWR('F', 30, struct fb_wid_alloc) +#define FBIO_WID_FREE _IOW('F', 31, struct fb_wid_alloc) +#define FBIO_WID_PUT _IOW('F', 32, struct fb_wid_list) +#define FBIO_WID_GET _IOWR('F', 33, struct fb_wid_list) + +/* Creator ioctls */ +#define FFB_IOCTL ('F'<<8) +#define FFB_SYS_INFO (FFB_IOCTL|80) +#define FFB_CLUTREAD (FFB_IOCTL|81) +#define FFB_CLUTPOST (FFB_IOCTL|82) +#define FFB_SETDIAGMODE (FFB_IOCTL|83) +#define FFB_GETMONITORID (FFB_IOCTL|84) +#define FFB_GETVIDEOMODE (FFB_IOCTL|85) +#define FFB_SETVIDEOMODE (FFB_IOCTL|86) +#define FFB_SETSERVER (FFB_IOCTL|87) +#define FFB_SETOVCTL (FFB_IOCTL|88) +#define FFB_GETOVCTL (FFB_IOCTL|89) +#define FFB_GETSAXNUM (FFB_IOCTL|90) +#define FFB_FBDEBUG (FFB_IOCTL|91) + +/* Cg14 ioctls */ +#define MDI_IOCTL ('M'<<8) +#define MDI_RESET (MDI_IOCTL|1) +#define MDI_GET_CFGINFO (MDI_IOCTL|2) +#define MDI_SET_PIXELMODE (MDI_IOCTL|3) +# define MDI_32_PIX 32 +# define MDI_16_PIX 16 +# define MDI_8_PIX 8 + +struct mdi_cfginfo { + int mdi_ncluts; /* Number of implemented CLUTs in this MDI */ + int mdi_type; /* FBTYPE name */ + int mdi_height; /* height */ + int mdi_width; /* widht */ + int mdi_size; /* available ram */ + int mdi_mode; /* 8bpp, 16bpp or 32bpp */ + int mdi_pixfreq; /* pixel clock (from PROM) */ +}; + +/* SparcLinux specific ioctl for the MDI, should be replaced for + * the SET_XLUT/SET_CLUTn ioctls instead + */ +#define MDI_CLEAR_XLUT (MDI_IOCTL|9) + +/* leo & ffb ioctls */ +struct fb_clut_alloc { + __u32 clutid; /* Set on return */ + __u32 flag; + __u32 index; +}; + +struct fb_clut { +#define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */ + __u32 flag; + __u32 clutid; + __u32 offset; + __u32 count; + char * red; + char * green; + char * blue; +}; + +struct fb_clut32 { + __u32 flag; + __u32 clutid; + __u32 offset; + __u32 count; + __u32 red; + __u32 green; + __u32 blue; +}; + +#define LEO_CLUTALLOC _IOWR('L', 53, struct fb_clut_alloc) +#define LEO_CLUTFREE _IOW('L', 54, struct fb_clut_alloc) +#define LEO_CLUTREAD _IOW('L', 55, struct fb_clut) +#define LEO_CLUTPOST _IOW('L', 56, struct fb_clut) +#define LEO_SETGAMMA _IOW('L', 68, int) /* Not yet implemented */ +#define LEO_GETGAMMA _IOR('L', 69, int) /* Not yet implemented */ + +#ifdef __KERNEL__ +/* Addresses on the fd of a cgsix that are mappable */ +#define CG6_FBC 0x70000000 +#define CG6_TEC 0x70001000 +#define CG6_BTREGS 0x70002000 +#define CG6_FHC 0x70004000 +#define CG6_THC 0x70005000 +#define CG6_ROM 0x70006000 +#define CG6_RAM 0x70016000 +#define CG6_DHC 0x80000000 + +#define CG3_MMAP_OFFSET 0x4000000 + +/* Addresses on the fd of a tcx that are mappable */ +#define TCX_RAM8BIT 0x00000000 +#define TCX_RAM24BIT 0x01000000 +#define TCX_UNK3 0x10000000 +#define TCX_UNK4 0x20000000 +#define TCX_CONTROLPLANE 0x28000000 +#define TCX_UNK6 0x30000000 +#define TCX_UNK7 0x38000000 +#define TCX_TEC 0x70000000 +#define TCX_BTREGS 0x70002000 +#define TCX_THC 0x70004000 +#define TCX_DHC 0x70008000 +#define TCX_ALT 0x7000a000 +#define TCX_SYNC 0x7000e000 +#define TCX_UNK2 0x70010000 + +/* CG14 definitions */ + +/* Offsets into the OBIO space: */ +#define CG14_REGS 0 /* registers */ +#define CG14_CURSORREGS 0x1000 /* cursor registers */ +#define CG14_DACREGS 0x2000 /* DAC registers */ +#define CG14_XLUT 0x3000 /* X Look Up Table -- ??? */ +#define CG14_CLUT1 0x4000 /* Color Look Up Table */ +#define CG14_CLUT2 0x5000 /* Color Look Up Table */ +#define CG14_CLUT3 0x6000 /* Color Look Up Table */ +#define CG14_AUTO 0xf000 + +#endif /* KERNEL */ + +/* These are exported to userland for applications to use */ +/* Mappable offsets for the cg14: control registers */ +#define MDI_DIRECT_MAP 0x10000000 +#define MDI_CTLREG_MAP 0x20000000 +#define MDI_CURSOR_MAP 0x30000000 +#define MDI_SHDW_VRT_MAP 0x40000000 + +/* Mappable offsets for the cg14: frame buffer resolutions */ +/* 32 bits */ +#define MDI_CHUNKY_XBGR_MAP 0x50000000 +#define MDI_CHUNKY_BGR_MAP 0x60000000 + +/* 16 bits */ +#define MDI_PLANAR_X16_MAP 0x70000000 +#define MDI_PLANAR_C16_MAP 0x80000000 + +/* 8 bit is done as CG3 MMAP offset */ +/* 32 bits, planar */ +#define MDI_PLANAR_X32_MAP 0x90000000 +#define MDI_PLANAR_B32_MAP 0xa0000000 +#define MDI_PLANAR_G32_MAP 0xb0000000 +#define MDI_PLANAR_R32_MAP 0xc0000000 + +/* Mappable offsets on leo */ +#define LEO_SS0_MAP 0x00000000 +#define LEO_LC_SS0_USR_MAP 0x00800000 +#define LEO_LD_SS0_MAP 0x00801000 +#define LEO_LX_CURSOR_MAP 0x00802000 +#define LEO_SS1_MAP 0x00803000 +#define LEO_LC_SS1_USR_MAP 0x01003000 +#define LEO_LD_SS1_MAP 0x01004000 +#define LEO_UNK_MAP 0x01005000 +#define LEO_LX_KRN_MAP 0x01006000 +#define LEO_LC_SS0_KRN_MAP 0x01007000 +#define LEO_LC_SS1_KRN_MAP 0x01008000 +#define LEO_LD_GBL_MAP 0x01009000 +#define LEO_UNK2_MAP 0x0100a000 + +#ifdef __KERNEL__ +struct fbcmap32 { + int index; /* first element (0 origin) */ + int count; + u32 red; + u32 green; + u32 blue; +}; + +#define FBIOPUTCMAP32 _IOW('F', 3, struct fbcmap32) +#define FBIOGETCMAP32 _IOW('F', 4, struct fbcmap32) + +struct fbcursor32 { + short set; /* what to set, choose from the list above */ + short enable; /* cursor on/off */ + struct fbcurpos pos; /* cursor position */ + struct fbcurpos hot; /* cursor hot spot */ + struct fbcmap32 cmap; /* color map info */ + struct fbcurpos size; /* cursor bit map size */ + u32 image; /* cursor image bits */ + u32 mask; /* cursor mask bits */ +}; + +#define FBIOSCURSOR32 _IOW('F', 24, struct fbcursor32) +#define FBIOGCURSOR32 _IOW('F', 25, struct fbcursor32) +#endif + +#endif /* __LINUX_FBIO_H */ diff --git a/include/asm-m68k/idprom.h b/include/asm-m68k/idprom.h index 4349eaf..160616a 100644 --- a/include/asm-m68k/idprom.h +++ b/include/asm-m68k/idprom.h @@ -1,6 +1,25 @@ #ifndef _M68K_IDPROM_H #define _M68K_IDPROM_H -#include +/* + * idprom.h: Macros and defines for idprom routines + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#include + +struct idprom { + u8 id_format; /* Format identifier (always 0x01) */ + u8 id_machtype; /* Machine type */ + u8 id_ethaddr[6]; /* Hardware ethernet address */ + s32 id_date; /* Date of manufacture */ + u32 id_sernum:24; /* Unique serial number */ + u8 id_cksum; /* Checksum - xor of the data bytes */ + u8 reserved[16]; +}; + +extern struct idprom *idprom; +extern void idprom_init(void); /* Sun3: in control space */ #define SUN3_IDPROM_BASE 0x00000000 -- cgit v1.1 From 115a326c1e5cab457924356123bbfd7d783ecf9d Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Mon, 4 Aug 2008 13:56:01 -0700 Subject: tracehook: kerneldoc fix My last change to tracehook.h made it confuse the kerneldoc parser. Move the #define's before the comment so it's happy again. Signed-off-by: Roland McGrath Acked-by: Randy Dunlap Signed-off-by: Linus Torvalds --- include/linux/tracehook.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index 1253283..ab3ef7a 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -487,6 +487,9 @@ static inline int tracehook_notify_jctl(int notify, int why) return notify || (current->ptrace & PT_PTRACED); } +#define DEATH_REAP -1 +#define DEATH_DELAYED_GROUP_LEADER -2 + /** * tracehook_notify_death - task is dead, ready to notify parent * @task: @current task now exiting @@ -501,8 +504,6 @@ static inline int tracehook_notify_jctl(int notify, int why) * * Called with write_lock_irq(&tasklist_lock) held. */ -#define DEATH_REAP -1 -#define DEATH_DELAYED_GROUP_LEADER -2 static inline int tracehook_notify_death(struct task_struct *task, void **death_cookie, int group_dead) { -- cgit v1.1 From 529ae9aaa08378cfe2a4350bded76f32cc8ff0ce Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Sat, 2 Aug 2008 12:01:03 +0200 Subject: mm: rename page trylock Converting page lock to new locking bitops requires a change of page flag operation naming, so we might as well convert it to something nicer (!TestSetPageLocked_Lock => trylock_page, SetPageLocked => set_page_locked). This also facilitates lockdeping of page lock. Signed-off-by: Nick Piggin Acked-by: KOSAKI Motohiro Acked-by: Peter Zijlstra Acked-by: Andrew Morton Acked-by: Benjamin Herrenschmidt Signed-off-by: Linus Torvalds --- include/linux/page-flags.h | 2 +- include/linux/pagemap.h | 67 ++++++++++++++++++++++++++++------------------ 2 files changed, 42 insertions(+), 27 deletions(-) (limited to 'include') diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index 25aaccd..c74d3e8 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h @@ -163,7 +163,7 @@ static inline int Page##uname(struct page *page) \ struct page; /* forward declaration */ -PAGEFLAG(Locked, locked) TESTSCFLAG(Locked, locked) +TESTPAGEFLAG(Locked, locked) PAGEFLAG(Error, error) PAGEFLAG(Referenced, referenced) TESTCLEARFLAG(Referenced, referenced) PAGEFLAG(Dirty, dirty) TESTSCFLAG(Dirty, dirty) __CLEARPAGEFLAG(Dirty, dirty) diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h index 69ed3cb..5da31c1 100644 --- a/include/linux/pagemap.h +++ b/include/linux/pagemap.h @@ -250,29 +250,6 @@ static inline struct page *read_mapping_page(struct address_space *mapping, return read_cache_page(mapping, index, filler, data); } -int add_to_page_cache_locked(struct page *page, struct address_space *mapping, - pgoff_t index, gfp_t gfp_mask); -int add_to_page_cache_lru(struct page *page, struct address_space *mapping, - pgoff_t index, gfp_t gfp_mask); -extern void remove_from_page_cache(struct page *page); -extern void __remove_from_page_cache(struct page *page); - -/* - * Like add_to_page_cache_locked, but used to add newly allocated pages: - * the page is new, so we can just run SetPageLocked() against it. - */ -static inline int add_to_page_cache(struct page *page, - struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) -{ - int error; - - SetPageLocked(page); - error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); - if (unlikely(error)) - ClearPageLocked(page); - return error; -} - /* * Return byte-offset into filesystem object for page. */ @@ -294,13 +271,28 @@ extern int __lock_page_killable(struct page *page); extern void __lock_page_nosync(struct page *page); extern void unlock_page(struct page *page); +static inline void set_page_locked(struct page *page) +{ + set_bit(PG_locked, &page->flags); +} + +static inline void clear_page_locked(struct page *page) +{ + clear_bit(PG_locked, &page->flags); +} + +static inline int trylock_page(struct page *page) +{ + return !test_and_set_bit(PG_locked, &page->flags); +} + /* * lock_page may only be called if we have the page's inode pinned. */ static inline void lock_page(struct page *page) { might_sleep(); - if (TestSetPageLocked(page)) + if (!trylock_page(page)) __lock_page(page); } @@ -312,7 +304,7 @@ static inline void lock_page(struct page *page) static inline int lock_page_killable(struct page *page) { might_sleep(); - if (TestSetPageLocked(page)) + if (!trylock_page(page)) return __lock_page_killable(page); return 0; } @@ -324,7 +316,7 @@ static inline int lock_page_killable(struct page *page) static inline void lock_page_nosync(struct page *page) { might_sleep(); - if (TestSetPageLocked(page)) + if (!trylock_page(page)) __lock_page_nosync(page); } @@ -409,4 +401,27 @@ static inline int fault_in_pages_readable(const char __user *uaddr, int size) return ret; } +int add_to_page_cache_locked(struct page *page, struct address_space *mapping, + pgoff_t index, gfp_t gfp_mask); +int add_to_page_cache_lru(struct page *page, struct address_space *mapping, + pgoff_t index, gfp_t gfp_mask); +extern void remove_from_page_cache(struct page *page); +extern void __remove_from_page_cache(struct page *page); + +/* + * Like add_to_page_cache_locked, but used to add newly allocated pages: + * the page is new, so we can just run set_page_locked() against it. + */ +static inline int add_to_page_cache(struct page *page, + struct address_space *mapping, pgoff_t offset, gfp_t gfp_mask) +{ + int error; + + set_page_locked(page); + error = add_to_page_cache_locked(page, mapping, offset, gfp_mask); + if (unlikely(error)) + clear_page_locked(page); + return error; +} + #endif /* _LINUX_PAGEMAP_H */ -- cgit v1.1 From ca5de404ff036a29b25e9a83f6919c9f606c5841 Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Sat, 2 Aug 2008 12:02:13 +0200 Subject: fs: rename buffer trylock Like the page lock change, this also requires name change, so convert the raw test_and_set bitop to a trylock. Signed-off-by: Nick Piggin Signed-off-by: Linus Torvalds --- include/linux/buffer_head.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h index 50cfe8c..eadaab4 100644 --- a/include/linux/buffer_head.h +++ b/include/linux/buffer_head.h @@ -115,7 +115,6 @@ BUFFER_FNS(Uptodate, uptodate) BUFFER_FNS(Dirty, dirty) TAS_BUFFER_FNS(Dirty, dirty) BUFFER_FNS(Lock, locked) -TAS_BUFFER_FNS(Lock, locked) BUFFER_FNS(Req, req) TAS_BUFFER_FNS(Req, req) BUFFER_FNS(Mapped, mapped) @@ -321,10 +320,15 @@ static inline void wait_on_buffer(struct buffer_head *bh) __wait_on_buffer(bh); } +static inline int trylock_buffer(struct buffer_head *bh) +{ + return likely(!test_and_set_bit(BH_Lock, &bh->b_state)); +} + static inline void lock_buffer(struct buffer_head *bh) { might_sleep(); - if (test_set_buffer_locked(bh)) + if (!trylock_buffer(bh)) __lock_buffer(bh); } -- cgit v1.1 From 378a2f090f7a478704a372a4869b8a9ac206234e Mon Sep 17 00:00:00 2001 From: Jarek Poplawski Date: Mon, 4 Aug 2008 22:31:03 -0700 Subject: net_sched: Add qdisc __NET_XMIT_STOLEN flag Patrick McHardy noticed: "The other problem that affects all qdiscs supporting actions is TC_ACT_QUEUED/TC_ACT_STOLEN getting mapped to NET_XMIT_SUCCESS even though the packet is not queued, corrupting upper qdiscs' qlen counters." and later explained: "The reason why it translates it at all seems to be to not increase the drops counter. Within a single qdisc this could be avoided by other means easily, upper qdiscs would still increase the counter when we return anything besides NET_XMIT_SUCCESS though. This means we need a new NET_XMIT return value to indicate this to the upper qdiscs. So I'd suggest to introduce NET_XMIT_STOLEN, return that to upper qdiscs and translate it to NET_XMIT_SUCCESS in dev_queue_xmit, similar to NET_XMIT_BYPASS." David Miller noticed: "Maybe these NET_XMIT_* values being passed around should be a set of bits. They could be composed of base meanings, combined with specific attributes. So you could say "NET_XMIT_DROP | __NET_XMIT_NO_DROP_COUNT" The attributes get masked out by the top-level ->enqueue() caller, such that the base meanings are the only thing that make their way up into the stack. If it's only about communication within the qdisc tree, let's simply code it that way." This patch is trying to realize these ideas. Signed-off-by: Jarek Poplawski Signed-off-by: David S. Miller --- include/linux/netdevice.h | 1 + include/net/sch_generic.h | 14 +++++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index ee583f6..abbf5d5 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -64,6 +64,7 @@ struct wireless_dev; #define NET_XMIT_BYPASS 4 /* packet does not leave via dequeue; (TC use only - dev_queue_xmit returns this as NET_XMIT_SUCCESS) */ +#define NET_XMIT_MASK 0xFFFF /* qdisc flags in net/sch_generic.h */ /* Backlog congestion levels */ #define NET_RX_SUCCESS 0 /* keep 'em coming, baby */ diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h index c5bb130..f15b045a 100644 --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h @@ -343,6 +343,18 @@ static inline unsigned int qdisc_pkt_len(struct sk_buff *skb) return qdisc_skb_cb(skb)->pkt_len; } +#ifdef CONFIG_NET_CLS_ACT +/* additional qdisc xmit flags */ +enum net_xmit_qdisc_t { + __NET_XMIT_STOLEN = 0x00010000, +}; + +#define net_xmit_drop_count(e) ((e) & __NET_XMIT_STOLEN ? 0 : 1) + +#else +#define net_xmit_drop_count(e) (1) +#endif + static inline int qdisc_enqueue(struct sk_buff *skb, struct Qdisc *sch) { #ifdef CONFIG_NET_SCHED @@ -355,7 +367,7 @@ static inline int qdisc_enqueue(struct sk_buff *skb, struct Qdisc *sch) static inline int qdisc_enqueue_root(struct sk_buff *skb, struct Qdisc *sch) { qdisc_skb_cb(skb)->pkt_len = skb->len; - return qdisc_enqueue(skb, sch); + return qdisc_enqueue(skb, sch) & NET_XMIT_MASK; } static inline int __qdisc_enqueue_tail(struct sk_buff *skb, struct Qdisc *sch, -- cgit v1.1 From c27f339af90bb874a7a9c680b17abfd32d4a727b Mon Sep 17 00:00:00 2001 From: Jarek Poplawski Date: Mon, 4 Aug 2008 22:39:11 -0700 Subject: net_sched: Add qdisc __NET_XMIT_BYPASS flag Patrick McHardy noticed that it would be nice to handle NET_XMIT_BYPASS by NET_XMIT_SUCCESS with an internal qdisc flag __NET_XMIT_BYPASS and to remove the mapping from dev_queue_xmit(). David Miller spotted a serious bug in the first version of this patch. Signed-off-by: Jarek Poplawski Signed-off-by: David S. Miller --- include/net/sch_generic.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/net/sch_generic.h b/include/net/sch_generic.h index f15b045a..a7abfda 100644 --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h @@ -343,14 +343,14 @@ static inline unsigned int qdisc_pkt_len(struct sk_buff *skb) return qdisc_skb_cb(skb)->pkt_len; } -#ifdef CONFIG_NET_CLS_ACT -/* additional qdisc xmit flags */ +/* additional qdisc xmit flags (NET_XMIT_MASK in linux/netdevice.h) */ enum net_xmit_qdisc_t { __NET_XMIT_STOLEN = 0x00010000, + __NET_XMIT_BYPASS = 0x00020000, }; +#ifdef CONFIG_NET_CLS_ACT #define net_xmit_drop_count(e) ((e) & __NET_XMIT_STOLEN ? 0 : 1) - #else #define net_xmit_drop_count(e) (1) #endif -- cgit v1.1 From cc6533e98a7f3cb7fce9d740da49195c7aa523a4 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 4 Aug 2008 23:04:08 -0700 Subject: net: Kill plain NET_XMIT_BYPASS. dst_input() was doing something completely absurd, looping on skb->dst->input() if NET_XMIT_BYPASS was seen, but these functions never return such an error. And as a result plain ole' NET_XMIT_BYPASS has no more references and can be completely killed off. Signed-off-by: David S. Miller --- include/linux/netdevice.h | 3 --- include/net/dst.h | 12 +----------- 2 files changed, 1 insertion(+), 14 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index abbf5d5..488c56e 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -61,9 +61,6 @@ struct wireless_dev; #define NET_XMIT_DROP 1 /* skb dropped */ #define NET_XMIT_CN 2 /* congestion notification */ #define NET_XMIT_POLICED 3 /* skb is shot by police */ -#define NET_XMIT_BYPASS 4 /* packet does not leave via dequeue; - (TC use only - dev_queue_xmit - returns this as NET_XMIT_SUCCESS) */ #define NET_XMIT_MASK 0xFFFF /* qdisc flags in net/sch_generic.h */ /* Backlog congestion levels */ diff --git a/include/net/dst.h b/include/net/dst.h index c5c318a..8a8b71e 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -252,17 +252,7 @@ static inline int dst_output(struct sk_buff *skb) /* Input packet from network to transport. */ static inline int dst_input(struct sk_buff *skb) { - int err; - - for (;;) { - err = skb->dst->input(skb); - - if (likely(err == 0)) - return err; - /* Oh, Jamal... Seems, I will not forgive you this mess. :-) */ - if (unlikely(err != NET_XMIT_BYPASS)) - return err; - } + return skb->dst->input(skb); } static inline struct dst_entry *dst_check(struct dst_entry *dst, u32 cookie) -- cgit v1.1 From 95c3e8bfcdea8676e2d4d61910c379f4502049bf Mon Sep 17 00:00:00 2001 From: Rami Rosen Date: Tue, 5 Aug 2008 01:19:50 -0700 Subject: ipv4: remove unused field in struct flowi (include/net/flow.h). This patch removes an unused field (flags) from struct flowi; it seems that this "flags" field was used once in the past for multipath routing with FLOWI_FLAG_MULTIPATHOLDROUTE flag (which does no longer exist); however, the "flags" field of struct flowi is not used anymore. Signed-off-by: Rami Rosen Signed-off-by: David S. Miller --- include/net/flow.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/net/flow.h b/include/net/flow.h index ad16e00..228b247 100644 --- a/include/net/flow.h +++ b/include/net/flow.h @@ -47,7 +47,6 @@ struct flowi { #define fl4_scope nl_u.ip4_u.scope __u8 proto; - __u8 flags; union { struct { __be16 sport; -- cgit v1.1 From 84db8d7cdb072866f5a6c6ac2c9a74c5c48dd22f Mon Sep 17 00:00:00 2001 From: Haavard Skinnemoen Date: Tue, 5 Aug 2008 13:35:07 +0200 Subject: avr32: Move include/asm-avr32 to arch/avr32/include/asm Leaving include/asm/arch alone for now. Signed-off-by: Haavard Skinnemoen --- include/asm-avr32/Kbuild | 3 - include/asm-avr32/a.out.h | 20 -- include/asm-avr32/addrspace.h | 43 --- include/asm-avr32/asm.h | 102 ------- include/asm-avr32/atmel-mci.h | 9 - include/asm-avr32/atomic.h | 201 ------------- include/asm-avr32/auxvec.h | 4 - include/asm-avr32/bitops.h | 301 ------------------- include/asm-avr32/bug.h | 73 ----- include/asm-avr32/bugs.h | 15 - include/asm-avr32/byteorder.h | 31 -- include/asm-avr32/cache.h | 38 --- include/asm-avr32/cachectl.h | 11 - include/asm-avr32/cacheflush.h | 131 -------- include/asm-avr32/checksum.h | 152 ---------- include/asm-avr32/cputime.h | 6 - include/asm-avr32/current.h | 15 - include/asm-avr32/delay.h | 26 -- include/asm-avr32/device.h | 7 - include/asm-avr32/div64.h | 6 - include/asm-avr32/dma-mapping.h | 349 ---------------------- include/asm-avr32/dma.h | 8 - include/asm-avr32/elf.h | 108 ------- include/asm-avr32/emergency-restart.h | 6 - include/asm-avr32/errno.h | 6 - include/asm-avr32/fb.h | 21 -- include/asm-avr32/fcntl.h | 6 - include/asm-avr32/futex.h | 6 - include/asm-avr32/gpio.h | 6 - include/asm-avr32/hardirq.h | 34 --- include/asm-avr32/hw_irq.h | 9 - include/asm-avr32/io.h | 312 ------------------- include/asm-avr32/ioctl.h | 6 - include/asm-avr32/ioctls.h | 87 ------ include/asm-avr32/ipcbuf.h | 29 -- include/asm-avr32/irq.h | 24 -- include/asm-avr32/irq_regs.h | 1 - include/asm-avr32/irqflags.h | 68 ----- include/asm-avr32/kdebug.h | 11 - include/asm-avr32/kmap_types.h | 30 -- include/asm-avr32/kprobes.h | 35 --- include/asm-avr32/linkage.h | 7 - include/asm-avr32/local.h | 6 - include/asm-avr32/mach/serial_at91.h | 33 --- include/asm-avr32/mman.h | 17 -- include/asm-avr32/mmu.h | 10 - include/asm-avr32/mmu_context.h | 148 --------- include/asm-avr32/module.h | 28 -- include/asm-avr32/msgbuf.h | 31 -- include/asm-avr32/mutex.h | 9 - include/asm-avr32/numnodes.h | 7 - include/asm-avr32/ocd.h | 543 ---------------------------------- include/asm-avr32/page.h | 104 ------- include/asm-avr32/param.h | 23 -- include/asm-avr32/pci.h | 10 - include/asm-avr32/percpu.h | 6 - include/asm-avr32/pgalloc.h | 98 ------ include/asm-avr32/pgtable-2level.h | 47 --- include/asm-avr32/pgtable.h | 377 ----------------------- include/asm-avr32/poll.h | 1 - include/asm-avr32/posix_types.h | 125 -------- include/asm-avr32/processor.h | 178 ----------- include/asm-avr32/ptrace.h | 157 ---------- include/asm-avr32/resource.h | 6 - include/asm-avr32/scatterlist.h | 26 -- include/asm-avr32/sections.h | 6 - include/asm-avr32/sembuf.h | 25 -- include/asm-avr32/serial.h | 13 - include/asm-avr32/setup.h | 138 --------- include/asm-avr32/shmbuf.h | 42 --- include/asm-avr32/shmparam.h | 6 - include/asm-avr32/sigcontext.h | 34 --- include/asm-avr32/siginfo.h | 6 - include/asm-avr32/signal.h | 168 ----------- include/asm-avr32/socket.h | 57 ---- include/asm-avr32/sockios.h | 13 - include/asm-avr32/stat.h | 79 ----- include/asm-avr32/statfs.h | 6 - include/asm-avr32/string.h | 17 -- include/asm-avr32/sysreg.h | 291 ------------------ include/asm-avr32/system.h | 178 ----------- include/asm-avr32/termbits.h | 195 ------------ include/asm-avr32/termios.h | 62 ---- include/asm-avr32/thread_info.h | 115 ------- include/asm-avr32/timex.h | 39 --- include/asm-avr32/tlb.h | 32 -- include/asm-avr32/tlbflush.h | 32 -- include/asm-avr32/topology.h | 6 - include/asm-avr32/traps.h | 23 -- include/asm-avr32/types.h | 37 --- include/asm-avr32/uaccess.h | 324 -------------------- include/asm-avr32/ucontext.h | 12 - include/asm-avr32/unaligned.h | 21 -- include/asm-avr32/unistd.h | 345 --------------------- include/asm-avr32/user.h | 65 ---- include/asm-avr32/xor.h | 6 - 96 files changed, 6746 deletions(-) delete mode 100644 include/asm-avr32/Kbuild delete mode 100644 include/asm-avr32/a.out.h delete mode 100644 include/asm-avr32/addrspace.h delete mode 100644 include/asm-avr32/asm.h delete mode 100644 include/asm-avr32/atmel-mci.h delete mode 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delete mode 100644 include/asm-avr32/msgbuf.h delete mode 100644 include/asm-avr32/mutex.h delete mode 100644 include/asm-avr32/numnodes.h delete mode 100644 include/asm-avr32/ocd.h delete mode 100644 include/asm-avr32/page.h delete mode 100644 include/asm-avr32/param.h delete mode 100644 include/asm-avr32/pci.h delete mode 100644 include/asm-avr32/percpu.h delete mode 100644 include/asm-avr32/pgalloc.h delete mode 100644 include/asm-avr32/pgtable-2level.h delete mode 100644 include/asm-avr32/pgtable.h delete mode 100644 include/asm-avr32/poll.h delete mode 100644 include/asm-avr32/posix_types.h delete mode 100644 include/asm-avr32/processor.h delete mode 100644 include/asm-avr32/ptrace.h delete mode 100644 include/asm-avr32/resource.h delete mode 100644 include/asm-avr32/scatterlist.h delete mode 100644 include/asm-avr32/sections.h delete mode 100644 include/asm-avr32/sembuf.h delete mode 100644 include/asm-avr32/serial.h delete mode 100644 include/asm-avr32/setup.h delete mode 100644 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include/asm-avr32/uaccess.h delete mode 100644 include/asm-avr32/ucontext.h delete mode 100644 include/asm-avr32/unaligned.h delete mode 100644 include/asm-avr32/unistd.h delete mode 100644 include/asm-avr32/user.h delete mode 100644 include/asm-avr32/xor.h (limited to 'include') diff --git a/include/asm-avr32/Kbuild b/include/asm-avr32/Kbuild deleted file mode 100644 index 3136628..0000000 --- a/include/asm-avr32/Kbuild +++ /dev/null @@ -1,3 +0,0 @@ -include include/asm-generic/Kbuild.asm - -header-y += cachectl.h diff --git a/include/asm-avr32/a.out.h b/include/asm-avr32/a.out.h deleted file mode 100644 index e46375a3..0000000 --- a/include/asm-avr32/a.out.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_AVR32_A_OUT_H -#define __ASM_AVR32_A_OUT_H - -struct exec -{ - unsigned long a_info; /* Use macros N_MAGIC, etc for access */ - unsigned a_text; /* length of text, in bytes */ - unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ -}; - -#define N_TRSIZE(a) ((a).a_trsize) -#define N_DRSIZE(a) ((a).a_drsize) -#define N_SYMSIZE(a) ((a).a_syms) - -#endif /* __ASM_AVR32_A_OUT_H */ diff --git a/include/asm-avr32/addrspace.h b/include/asm-avr32/addrspace.h deleted file mode 100644 index 3667948..0000000 --- a/include/asm-avr32/addrspace.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Defitions for the address spaces of the AVR32 CPUs. Heavily based on - * include/asm-sh/addrspace.h - * - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_ADDRSPACE_H -#define __ASM_AVR32_ADDRSPACE_H - -#ifdef CONFIG_MMU - -/* Memory segments when segmentation is enabled */ -#define P0SEG 0x00000000 -#define P1SEG 0x80000000 -#define P2SEG 0xa0000000 -#define P3SEG 0xc0000000 -#define P4SEG 0xe0000000 - -/* Returns the privileged segment base of a given address */ -#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) - -/* Returns the physical address of a PnSEG (n=1,2) address */ -#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) - -/* - * Map an address to a certain privileged segment - */ -#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ - | P1SEG)) -#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ - | P2SEG)) -#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ - | P3SEG)) -#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ - | P4SEG)) - -#endif /* CONFIG_MMU */ - -#endif /* __ASM_AVR32_ADDRSPACE_H */ diff --git a/include/asm-avr32/asm.h b/include/asm-avr32/asm.h deleted file mode 100644 index a2c64f4..0000000 --- a/include/asm-avr32/asm.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_ASM_H__ -#define __ASM_AVR32_ASM_H__ - -#include -#include -#include - -#define mask_interrupts ssrf SYSREG_GM_OFFSET -#define mask_exceptions ssrf SYSREG_EM_OFFSET -#define unmask_interrupts csrf SYSREG_GM_OFFSET -#define unmask_exceptions csrf SYSREG_EM_OFFSET - -#ifdef CONFIG_FRAME_POINTER - .macro save_fp - st.w --sp, r7 - .endm - .macro restore_fp - ld.w r7, sp++ - .endm - .macro zero_fp - mov r7, 0 - .endm -#else - .macro save_fp - .endm - .macro restore_fp - .endm - .macro zero_fp - .endm -#endif - .macro get_thread_info reg - mov \reg, sp - andl \reg, ~(THREAD_SIZE - 1) & 0xffff - .endm - - /* Save and restore registers */ - .macro save_min sr, tmp=lr - pushm lr - mfsr \tmp, \sr - zero_fp - st.w --sp, \tmp - .endm - - .macro restore_min sr, tmp=lr - ld.w \tmp, sp++ - mtsr \sr, \tmp - popm lr - .endm - - .macro save_half sr, tmp=lr - save_fp - pushm r8-r9,r10,r11,r12,lr - zero_fp - mfsr \tmp, \sr - st.w --sp, \tmp - .endm - - .macro restore_half sr, tmp=lr - ld.w \tmp, sp++ - mtsr \sr, \tmp - popm r8-r9,r10,r11,r12,lr - restore_fp - .endm - - .macro save_full_user sr, tmp=lr - stmts --sp, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr - st.w --sp, lr - zero_fp - mfsr \tmp, \sr - st.w --sp, \tmp - .endm - - .macro restore_full_user sr, tmp=lr - ld.w \tmp, sp++ - mtsr \sr, \tmp - ld.w lr, sp++ - ldmts sp++, r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,sp,lr - .endm - - /* uaccess macros */ - .macro branch_if_kernel scratch, label - get_thread_info \scratch - ld.w \scratch, \scratch[TI_flags] - bld \scratch, TIF_USERSPACE - brcc \label - .endm - - .macro ret_if_privileged scratch, addr, size, ret - sub \scratch, \size, 1 - add \scratch, \addr - retcs \ret - retmi \ret - .endm - -#endif /* __ASM_AVR32_ASM_H__ */ diff --git a/include/asm-avr32/atmel-mci.h b/include/asm-avr32/atmel-mci.h deleted file mode 100644 index c2ea6e1..0000000 --- a/include/asm-avr32/atmel-mci.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_AVR32_ATMEL_MCI_H -#define __ASM_AVR32_ATMEL_MCI_H - -struct mci_platform_data { - int detect_pin; - int wp_pin; -}; - -#endif /* __ASM_AVR32_ATMEL_MCI_H */ diff --git a/include/asm-avr32/atomic.h b/include/asm-avr32/atomic.h deleted file mode 100644 index 7ef3862..0000000 --- a/include/asm-avr32/atomic.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc. - * - * But use these as seldom as possible since they are slower than - * regular operations. - * - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_ATOMIC_H -#define __ASM_AVR32_ATOMIC_H - -#include - -typedef struct { volatile int counter; } atomic_t; -#define ATOMIC_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v, i) (((v)->counter) = i) - -/* - * atomic_sub_return - subtract the atomic variable - * @i: integer value to subtract - * @v: pointer of type atomic_t - * - * Atomically subtracts @i from @v. Returns the resulting value. - */ -static inline int atomic_sub_return(int i, atomic_t *v) -{ - int result; - - asm volatile( - "/* atomic_sub_return */\n" - "1: ssrf 5\n" - " ld.w %0, %2\n" - " sub %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(result), "=o"(v->counter) - : "m"(v->counter), "rKs21"(i) - : "cc"); - - return result; -} - -/* - * atomic_add_return - add integer to atomic variable - * @i: integer value to add - * @v: pointer of type atomic_t - * - * Atomically adds @i to @v. Returns the resulting value. - */ -static inline int atomic_add_return(int i, atomic_t *v) -{ - int result; - - if (__builtin_constant_p(i) && (i >= -1048575) && (i <= 1048576)) - result = atomic_sub_return(-i, v); - else - asm volatile( - "/* atomic_add_return */\n" - "1: ssrf 5\n" - " ld.w %0, %1\n" - " add %0, %3\n" - " stcond %2, %0\n" - " brne 1b" - : "=&r"(result), "=o"(v->counter) - : "m"(v->counter), "r"(i) - : "cc", "memory"); - - return result; -} - -/* - * atomic_sub_unless - sub unless the number is a given value - * @v: pointer of type atomic_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * If the atomic value v is not equal to u, this function subtracts a - * from v, and returns non zero. If v is equal to u then it returns - * zero. This is done as an atomic operation. -*/ -static inline int atomic_sub_unless(atomic_t *v, int a, int u) -{ - int tmp, result = 0; - - asm volatile( - "/* atomic_sub_unless */\n" - "1: ssrf 5\n" - " ld.w %0, %3\n" - " cp.w %0, %5\n" - " breq 1f\n" - " sub %0, %4\n" - " stcond %2, %0\n" - " brne 1b\n" - " mov %1, 1\n" - "1:" - : "=&r"(tmp), "=&r"(result), "=o"(v->counter) - : "m"(v->counter), "rKs21"(a), "rKs21"(u), "1"(result) - : "cc", "memory"); - - return result; -} - -/* - * atomic_add_unless - add unless the number is a given value - * @v: pointer of type atomic_t - * @a: the amount to add to v... - * @u: ...unless v is equal to u. - * - * If the atomic value v is not equal to u, this function adds a to v, - * and returns non zero. If v is equal to u then it returns zero. This - * is done as an atomic operation. -*/ -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int tmp, result; - - if (__builtin_constant_p(a) && (a >= -1048575) && (a <= 1048576)) - result = atomic_sub_unless(v, -a, u); - else { - result = 0; - asm volatile( - "/* atomic_add_unless */\n" - "1: ssrf 5\n" - " ld.w %0, %3\n" - " cp.w %0, %5\n" - " breq 1f\n" - " add %0, %4\n" - " stcond %2, %0\n" - " brne 1b\n" - " mov %1, 1\n" - "1:" - : "=&r"(tmp), "=&r"(result), "=o"(v->counter) - : "m"(v->counter), "r"(a), "ir"(u), "1"(result) - : "cc", "memory"); - } - - return result; -} - -/* - * atomic_sub_if_positive - conditionally subtract integer from atomic variable - * @i: integer value to subtract - * @v: pointer of type atomic_t - * - * Atomically test @v and subtract @i if @v is greater or equal than @i. - * The function returns the old value of @v minus @i. - */ -static inline int atomic_sub_if_positive(int i, atomic_t *v) -{ - int result; - - asm volatile( - "/* atomic_sub_if_positive */\n" - "1: ssrf 5\n" - " ld.w %0, %2\n" - " sub %0, %3\n" - " brlt 1f\n" - " stcond %1, %0\n" - " brne 1b\n" - "1:" - : "=&r"(result), "=o"(v->counter) - : "m"(v->counter), "ir"(i) - : "cc", "memory"); - - return result; -} - -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) - -#define atomic_sub(i, v) (void)atomic_sub_return(i, v) -#define atomic_add(i, v) (void)atomic_add_return(i, v) -#define atomic_dec(v) atomic_sub(1, (v)) -#define atomic_inc(v) atomic_add(1, (v)) - -#define atomic_dec_return(v) atomic_sub_return(1, v) -#define atomic_inc_return(v) atomic_add_return(1, v) - -#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) -#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0) -#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0) -#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0) - -#define atomic_inc_not_zero(v) atomic_add_unless(v, 1, 0) -#define atomic_dec_if_positive(v) atomic_sub_if_positive(1, v) - -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#include - -#endif /* __ASM_AVR32_ATOMIC_H */ diff --git a/include/asm-avr32/auxvec.h b/include/asm-avr32/auxvec.h deleted file mode 100644 index d5dd435..0000000 --- a/include/asm-avr32/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASM_AVR32_AUXVEC_H -#define __ASM_AVR32_AUXVEC_H - -#endif /* __ASM_AVR32_AUXVEC_H */ diff --git a/include/asm-avr32/bitops.h b/include/asm-avr32/bitops.h deleted file mode 100644 index 1a50b69..0000000 --- a/include/asm-avr32/bitops.h +++ /dev/null @@ -1,301 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_BITOPS_H -#define __ASM_AVR32_BITOPS_H - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#include -#include - -/* - * clear_bit() doesn't provide any barrier for the compiler - */ -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() - -/* - * set_bit - Atomically set a bit in memory - * @nr: the bit to set - * @addr: the address to start counting from - * - * This function is atomic and may not be reordered. See __set_bit() - * if you do not require the atomic guarantees. - * - * Note that @nr may be almost arbitrarily large; this function is not - * restricted to acting on a single-word quantity. - */ -static inline void set_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long tmp; - - if (__builtin_constant_p(nr)) { - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %2\n" - " sbr %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p) - : "m"(*p), "i"(nr) - : "cc"); - } else { - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %2\n" - " or %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p) - : "m"(*p), "r"(mask) - : "cc"); - } -} - -/* - * clear_bit - Clears a bit in memory - * @nr: Bit to clear - * @addr: Address to start counting from - * - * clear_bit() is atomic and may not be reordered. However, it does - * not contain a memory barrier, so if it is used for locking purposes, - * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit() - * in order to ensure changes are visible on other processors. - */ -static inline void clear_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long tmp; - - if (__builtin_constant_p(nr)) { - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %2\n" - " cbr %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p) - : "m"(*p), "i"(nr) - : "cc"); - } else { - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %2\n" - " andn %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p) - : "m"(*p), "r"(mask) - : "cc"); - } -} - -/* - * change_bit - Toggle a bit in memory - * @nr: Bit to change - * @addr: Address to start counting from - * - * change_bit() is atomic and may not be reordered. - * Note that @nr may be almost arbitrarily large; this function is not - * restricted to acting on a single-word quantity. - */ -static inline void change_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - unsigned long tmp; - - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %2\n" - " eor %0, %3\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p) - : "m"(*p), "r"(mask) - : "cc"); -} - -/* - * test_and_set_bit - Set a bit and return its old value - * @nr: Bit to set - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. - */ -static inline int test_and_set_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - unsigned long tmp, old; - - if (__builtin_constant_p(nr)) { - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %3\n" - " mov %2, %0\n" - " sbr %0, %4\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p), "=&r"(old) - : "m"(*p), "i"(nr) - : "memory", "cc"); - } else { - asm volatile( - "1: ssrf 5\n" - " ld.w %2, %3\n" - " or %0, %2, %4\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p), "=&r"(old) - : "m"(*p), "r"(mask) - : "memory", "cc"); - } - - return (old & mask) != 0; -} - -/* - * test_and_clear_bit - Clear a bit and return its old value - * @nr: Bit to clear - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. - */ -static inline int test_and_clear_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - unsigned long tmp, old; - - if (__builtin_constant_p(nr)) { - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %3\n" - " mov %2, %0\n" - " cbr %0, %4\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p), "=&r"(old) - : "m"(*p), "i"(nr) - : "memory", "cc"); - } else { - asm volatile( - "1: ssrf 5\n" - " ld.w %0, %3\n" - " mov %2, %0\n" - " andn %0, %4\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p), "=&r"(old) - : "m"(*p), "r"(mask) - : "memory", "cc"); - } - - return (old & mask) != 0; -} - -/* - * test_and_change_bit - Change a bit and return its old value - * @nr: Bit to change - * @addr: Address to count from - * - * This operation is atomic and cannot be reordered. - * It also implies a memory barrier. - */ -static inline int test_and_change_bit(int nr, volatile void * addr) -{ - unsigned long *p = ((unsigned long *)addr) + nr / BITS_PER_LONG; - unsigned long mask = 1UL << (nr % BITS_PER_LONG); - unsigned long tmp, old; - - asm volatile( - "1: ssrf 5\n" - " ld.w %2, %3\n" - " eor %0, %2, %4\n" - " stcond %1, %0\n" - " brne 1b" - : "=&r"(tmp), "=o"(*p), "=&r"(old) - : "m"(*p), "r"(mask) - : "memory", "cc"); - - return (old & mask) != 0; -} - -#include - -/* Find First bit Set */ -static inline unsigned long __ffs(unsigned long word) -{ - unsigned long result; - - asm("brev %1\n\t" - "clz %0,%1" - : "=r"(result), "=&r"(word) - : "1"(word)); - return result; -} - -/* Find First Zero */ -static inline unsigned long ffz(unsigned long word) -{ - return __ffs(~word); -} - -/* Find Last bit Set */ -static inline int fls(unsigned long word) -{ - unsigned long result; - - asm("clz %0,%1" : "=r"(result) : "r"(word)); - return 32 - result; -} - -unsigned long find_first_zero_bit(const unsigned long *addr, - unsigned long size); -unsigned long find_next_zero_bit(const unsigned long *addr, - unsigned long size, - unsigned long offset); -unsigned long find_first_bit(const unsigned long *addr, - unsigned long size); -unsigned long find_next_bit(const unsigned long *addr, - unsigned long size, - unsigned long offset); - -/* - * ffs: find first bit set. This is defined the same way as - * the libc and compiler builtin ffs routines, therefore - * differs in spirit from the above ffz (man ffs). - * - * The difference is that bit numbering starts at 1, and if no bit is set, - * the function returns 0. - */ -static inline int ffs(unsigned long word) -{ - if(word == 0) - return 0; - return __ffs(word) + 1; -} - -#include -#include -#include -#include - -#include -#include -#include - -#endif /* __ASM_AVR32_BITOPS_H */ diff --git a/include/asm-avr32/bug.h b/include/asm-avr32/bug.h deleted file mode 100644 index 331d45b..0000000 --- a/include/asm-avr32/bug.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_BUG_H -#define __ASM_AVR32_BUG_H - -#ifdef CONFIG_BUG - -/* - * According to our Chief Architect, this compact opcode is very - * unlikely to ever be implemented. - */ -#define AVR32_BUG_OPCODE 0x5df0 - -#ifdef CONFIG_DEBUG_BUGVERBOSE - -#define _BUG_OR_WARN(flags) \ - asm volatile( \ - "1: .hword %0\n" \ - " .section __bug_table,\"a\",@progbits\n" \ - "2: .long 1b\n" \ - " .long %1\n" \ - " .short %2\n" \ - " .short %3\n" \ - " .org 2b + %4\n" \ - " .previous" \ - : \ - : "i"(AVR32_BUG_OPCODE), "i"(__FILE__), \ - "i"(__LINE__), "i"(flags), \ - "i"(sizeof(struct bug_entry))) - -#else - -#define _BUG_OR_WARN(flags) \ - asm volatile( \ - "1: .hword %0\n" \ - " .section __bug_table,\"a\",@progbits\n" \ - "2: .long 1b\n" \ - " .short %1\n" \ - " .org 2b + %2\n" \ - " .previous" \ - : \ - : "i"(AVR32_BUG_OPCODE), "i"(flags), \ - "i"(sizeof(struct bug_entry))) - -#endif /* CONFIG_DEBUG_BUGVERBOSE */ - -#define BUG() \ - do { \ - _BUG_OR_WARN(0); \ - for (;;); \ - } while (0) - -#define WARN_ON(condition) \ - ({ \ - int __ret_warn_on = !!(condition); \ - if (unlikely(__ret_warn_on)) \ - _BUG_OR_WARN(BUGFLAG_WARNING); \ - unlikely(__ret_warn_on); \ - }) - -#define HAVE_ARCH_BUG -#define HAVE_ARCH_WARN_ON - -#endif /* CONFIG_BUG */ - -#include - -#endif /* __ASM_AVR32_BUG_H */ diff --git a/include/asm-avr32/bugs.h b/include/asm-avr32/bugs.h deleted file mode 100644 index 7635e77..0000000 --- a/include/asm-avr32/bugs.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ -#ifndef __ASM_AVR32_BUGS_H -#define __ASM_AVR32_BUGS_H - -static void __init check_bugs(void) -{ - cpu_data->loops_per_jiffy = loops_per_jiffy; -} - -#endif /* __ASM_AVR32_BUGS_H */ diff --git a/include/asm-avr32/byteorder.h b/include/asm-avr32/byteorder.h deleted file mode 100644 index d77b48b..0000000 --- a/include/asm-avr32/byteorder.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * AVR32 endian-conversion functions. - */ -#ifndef __ASM_AVR32_BYTEORDER_H -#define __ASM_AVR32_BYTEORDER_H - -#include -#include - -#ifdef __CHECKER__ -extern unsigned long __builtin_bswap_32(unsigned long x); -extern unsigned short __builtin_bswap_16(unsigned short x); -#endif - -/* - * avr32-linux-gcc versions earlier than 4.2 improperly sign-extends - * the result. - */ -#if !(__GNUC__ == 4 && __GNUC_MINOR__ < 2) -#define __arch__swab32(x) __builtin_bswap_32(x) -#define __arch__swab16(x) __builtin_bswap_16(x) -#endif - -#if !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#include - -#endif /* __ASM_AVR32_BYTEORDER_H */ diff --git a/include/asm-avr32/cache.h b/include/asm-avr32/cache.h deleted file mode 100644 index d3cf35a..0000000 --- a/include/asm-avr32/cache.h +++ /dev/null @@ -1,38 +0,0 @@ -#ifndef __ASM_AVR32_CACHE_H -#define __ASM_AVR32_CACHE_H - -#define L1_CACHE_SHIFT 5 -#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) - -/* - * Memory returned by kmalloc() may be used for DMA, so we must make - * sure that all such allocations are cache aligned. Otherwise, - * unrelated code may cause parts of the buffer to be read into the - * cache before the transfer is done, causing old data to be seen by - * the CPU. - */ -#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES - -#ifndef __ASSEMBLER__ -struct cache_info { - unsigned int ways; - unsigned int sets; - unsigned int linesz; -}; -#endif /* __ASSEMBLER */ - -/* Cache operation constants */ -#define ICACHE_FLUSH 0x00 -#define ICACHE_INVALIDATE 0x01 -#define ICACHE_LOCK 0x02 -#define ICACHE_UNLOCK 0x03 -#define ICACHE_PREFETCH 0x04 - -#define DCACHE_FLUSH 0x08 -#define DCACHE_LOCK 0x09 -#define DCACHE_UNLOCK 0x0a -#define DCACHE_INVALIDATE 0x0b -#define DCACHE_CLEAN 0x0c -#define DCACHE_CLEAN_INVAL 0x0d - -#endif /* __ASM_AVR32_CACHE_H */ diff --git a/include/asm-avr32/cachectl.h b/include/asm-avr32/cachectl.h deleted file mode 100644 index 4faf1ce..0000000 --- a/include/asm-avr32/cachectl.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_AVR32_CACHECTL_H -#define __ASM_AVR32_CACHECTL_H - -/* - * Operations that can be performed through the cacheflush system call - */ - -/* Clean the data cache, then invalidate the icache */ -#define CACHE_IFLUSH 0 - -#endif /* __ASM_AVR32_CACHECTL_H */ diff --git a/include/asm-avr32/cacheflush.h b/include/asm-avr32/cacheflush.h deleted file mode 100644 index 6706747..0000000 --- a/include/asm-avr32/cacheflush.h +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_CACHEFLUSH_H -#define __ASM_AVR32_CACHEFLUSH_H - -/* Keep includes the same across arches. */ -#include - -#define CACHE_OP_ICACHE_INVALIDATE 0x01 -#define CACHE_OP_DCACHE_INVALIDATE 0x0b -#define CACHE_OP_DCACHE_CLEAN 0x0c -#define CACHE_OP_DCACHE_CLEAN_INVAL 0x0d - -/* - * Invalidate any cacheline containing virtual address vaddr without - * writing anything back to memory. - * - * Note that this function may corrupt unrelated data structures when - * applied on buffers that are not cacheline aligned in both ends. - */ -static inline void invalidate_dcache_line(void *vaddr) -{ - asm volatile("cache %0[0], %1" - : - : "r"(vaddr), "n"(CACHE_OP_DCACHE_INVALIDATE) - : "memory"); -} - -/* - * Make sure any cacheline containing virtual address vaddr is written - * to memory. - */ -static inline void clean_dcache_line(void *vaddr) -{ - asm volatile("cache %0[0], %1" - : - : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN) - : "memory"); -} - -/* - * Make sure any cacheline containing virtual address vaddr is written - * to memory and then invalidate it. - */ -static inline void flush_dcache_line(void *vaddr) -{ - asm volatile("cache %0[0], %1" - : - : "r"(vaddr), "n"(CACHE_OP_DCACHE_CLEAN_INVAL) - : "memory"); -} - -/* - * Invalidate any instruction cacheline containing virtual address - * vaddr. - */ -static inline void invalidate_icache_line(void *vaddr) -{ - asm volatile("cache %0[0], %1" - : - : "r"(vaddr), "n"(CACHE_OP_ICACHE_INVALIDATE) - : "memory"); -} - -/* - * Applies the above functions on all lines that are touched by the - * specified virtual address range. - */ -void invalidate_dcache_region(void *start, size_t len); -void clean_dcache_region(void *start, size_t len); -void flush_dcache_region(void *start, size_t len); -void invalidate_icache_region(void *start, size_t len); - -/* - * Make sure any pending writes are completed before continuing. - */ -#define flush_write_buffer() asm volatile("sync 0" : : : "memory") - -/* - * The following functions are called when a virtual mapping changes. - * We do not need to flush anything in this case. - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -/* - * I think we need to implement this one to be able to reliably - * execute pages from RAMDISK. However, if we implement the - * flush_dcache_*() functions, it might not be needed anymore. - * - * #define flush_icache_page(vma, page) do { } while (0) - */ -extern void flush_icache_page(struct vm_area_struct *vma, struct page *page); - -/* - * These are (I think) related to D-cache aliasing. We might need to - * do something here, but only for certain configurations. No such - * configurations exist at this time. - */ -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(page) do { } while (0) -#define flush_dcache_mmap_unlock(page) do { } while (0) - -/* - * These are for I/D cache coherency. In this case, we do need to - * flush with all configurations. - */ -extern void flush_icache_range(unsigned long start, unsigned long end); - -extern void copy_to_user_page(struct vm_area_struct *vma, struct page *page, - unsigned long vaddr, void *dst, const void *src, - unsigned long len); - -static inline void copy_from_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, - const void *src, unsigned long len) -{ - memcpy(dst, src, len); -} - -#endif /* __ASM_AVR32_CACHEFLUSH_H */ diff --git a/include/asm-avr32/checksum.h b/include/asm-avr32/checksum.h deleted file mode 100644 index 4ddbfd2..0000000 --- a/include/asm-avr32/checksum.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_CHECKSUM_H -#define __ASM_AVR32_CHECKSUM_H - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -__wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * the same as csum_partial, but copies from src while it - * checksums, and handles user-space pointer exceptions correctly, when needed. - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ -__wsum csum_partial_copy_generic(const void *src, void *dst, int len, - __wsum sum, int *src_err_ptr, - int *dst_err_ptr); - -/* - * Note: when you get a NULL pointer exception here this means someone - * passed in an incorrect kernel address to one of these functions. - * - * If you use these functions directly please don't forget the - * access_ok(). - */ -static inline -__wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum) -{ - return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL); -} - -static inline -__wsum csum_partial_copy_from_user(const void __user *src, void *dst, - int len, __wsum sum, int *err_ptr) -{ - return csum_partial_copy_generic((const void __force *)src, dst, len, - sum, err_ptr, NULL); -} - -/* - * This is a version of ip_compute_csum() optimized for IP headers, - * which always checksum on 4 octet boundaries. - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - unsigned int sum, tmp; - - __asm__ __volatile__( - " ld.w %0, %1++\n" - " ld.w %3, %1++\n" - " sub %2, 4\n" - " add %0, %3\n" - " ld.w %3, %1++\n" - " adc %0, %0, %3\n" - " ld.w %3, %1++\n" - " adc %0, %0, %3\n" - " acr %0\n" - "1: ld.w %3, %1++\n" - " add %0, %3\n" - " acr %0\n" - " sub %2, 1\n" - " brne 1b\n" - " lsl %3, %0, 16\n" - " andl %0, 0\n" - " mov %2, 0xffff\n" - " add %0, %3\n" - " adc %0, %0, %2\n" - " com %0\n" - " lsr %0, 16\n" - : "=r"(sum), "=r"(iph), "=r"(ihl), "=r"(tmp) - : "1"(iph), "2"(ihl) - : "memory", "cc"); - return (__force __sum16)sum; -} - -/* - * Fold a partial checksum - */ - -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - asm(" bfextu %1, %0, 0, 16\n" - " lsr %0, 16\n" - " add %0, %1\n" - " bfextu %1, %0, 16, 16\n" - " add %0, %1" - : "=&r"(sum), "=&r"(tmp) - : "0"(sum)); - - return (__force __sum16)~sum; -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - asm(" add %0, %1\n" - " adc %0, %0, %2\n" - " adc %0, %0, %3\n" - " acr %0" - : "=r"(sum) - : "r"(daddr), "r"(saddr), "r"(len + proto), - "0"(sum) - : "cc"); - - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ - -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* __ASM_AVR32_CHECKSUM_H */ diff --git a/include/asm-avr32/cputime.h b/include/asm-avr32/cputime.h deleted file mode 100644 index e87e0f8..0000000 --- a/include/asm-avr32/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_CPUTIME_H -#define __ASM_AVR32_CPUTIME_H - -#include - -#endif /* __ASM_AVR32_CPUTIME_H */ diff --git a/include/asm-avr32/current.h b/include/asm-avr32/current.h deleted file mode 100644 index c7b0549..0000000 --- a/include/asm-avr32/current.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __ASM_AVR32_CURRENT_H -#define __ASM_AVR32_CURRENT_H - -#include - -struct task_struct; - -inline static struct task_struct * get_current(void) -{ - return current_thread_info()->task; -} - -#define current get_current() - -#endif /* __ASM_AVR32_CURRENT_H */ diff --git a/include/asm-avr32/delay.h b/include/asm-avr32/delay.h deleted file mode 100644 index a0ed9a9..0000000 --- a/include/asm-avr32/delay.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __ASM_AVR32_DELAY_H -#define __ASM_AVR32_DELAY_H - -/* - * Copyright (C) 1993 Linus Torvalds - * - * Delay routines calling functions in arch/avr32/lib/delay.c - */ - -extern void __bad_udelay(void); -extern void __bad_ndelay(void); - -extern void __udelay(unsigned long usecs); -extern void __ndelay(unsigned long nsecs); -extern void __const_udelay(unsigned long xloops); -extern void __delay(unsigned long loops); - -#define udelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ - __udelay(n)) - -#define ndelay(n) (__builtin_constant_p(n) ? \ - ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ - __ndelay(n)) - -#endif /* __ASM_AVR32_DELAY_H */ diff --git a/include/asm-avr32/device.h b/include/asm-avr32/device.h deleted file mode 100644 index d8f9872..0000000 --- a/include/asm-avr32/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include - diff --git a/include/asm-avr32/div64.h b/include/asm-avr32/div64.h deleted file mode 100644 index d7ddd4f..0000000 --- a/include/asm-avr32/div64.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_DIV64_H -#define __ASM_AVR32_DIV64_H - -#include - -#endif /* __ASM_AVR32_DIV64_H */ diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h deleted file mode 100644 index 0399359..0000000 --- a/include/asm-avr32/dma-mapping.h +++ /dev/null @@ -1,349 +0,0 @@ -#ifndef __ASM_AVR32_DMA_MAPPING_H -#define __ASM_AVR32_DMA_MAPPING_H - -#include -#include -#include -#include -#include -#include - -extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, - int direction); - -/* - * Return whether the given device DMA address mask can be supported - * properly. For example, if your device can only drive the low 24-bits - * during bus mastering, then you would pass 0x00ffffff as the mask - * to this function. - */ -static inline int dma_supported(struct device *dev, u64 mask) -{ - /* Fix when needed. I really don't know of any limitations */ - return 1; -} - -static inline int dma_set_mask(struct device *dev, u64 dma_mask) -{ - if (!dev->dma_mask || !dma_supported(dev, dma_mask)) - return -EIO; - - *dev->dma_mask = dma_mask; - return 0; -} - -/* - * dma_map_single can't fail as it is implemented now. - */ -static inline int dma_mapping_error(struct device *dev, dma_addr_t addr) -{ - return 0; -} - -/** - * dma_alloc_coherent - allocate consistent memory for DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: required memory size - * @handle: bus-specific DMA address - * - * Allocate some uncached, unbuffered memory for a device for - * performing DMA. This function allocates pages, and will - * return the CPU-viewed address, and sets @handle to be the - * device-viewed address. - */ -extern void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *handle, gfp_t gfp); - -/** - * dma_free_coherent - free memory allocated by dma_alloc_coherent - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: size of memory originally requested in dma_alloc_coherent - * @cpu_addr: CPU-view address returned from dma_alloc_coherent - * @handle: device-view address returned from dma_alloc_coherent - * - * Free (and unmap) a DMA buffer previously allocated by - * dma_alloc_coherent(). - * - * References to memory and mappings associated with cpu_addr/handle - * during and after this call executing are illegal. - */ -extern void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t handle); - -/** - * dma_alloc_writecombine - allocate write-combining memory for DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: required memory size - * @handle: bus-specific DMA address - * - * Allocate some uncached, buffered memory for a device for - * performing DMA. This function allocates pages, and will - * return the CPU-viewed address, and sets @handle to be the - * device-viewed address. - */ -extern void *dma_alloc_writecombine(struct device *dev, size_t size, - dma_addr_t *handle, gfp_t gfp); - -/** - * dma_free_coherent - free memory allocated by dma_alloc_writecombine - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @size: size of memory originally requested in dma_alloc_writecombine - * @cpu_addr: CPU-view address returned from dma_alloc_writecombine - * @handle: device-view address returned from dma_alloc_writecombine - * - * Free (and unmap) a DMA buffer previously allocated by - * dma_alloc_writecombine(). - * - * References to memory and mappings associated with cpu_addr/handle - * during and after this call executing are illegal. - */ -extern void dma_free_writecombine(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t handle); - -/** - * dma_map_single - map a single buffer for streaming DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @cpu_addr: CPU direct mapped address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Ensure that any data held in the cache is appropriately discarded - * or written back. - * - * The device owns this memory once this call has completed. The CPU - * can regain ownership by calling dma_unmap_single() or dma_sync_single(). - */ -static inline dma_addr_t -dma_map_single(struct device *dev, void *cpu_addr, size_t size, - enum dma_data_direction direction) -{ - dma_cache_sync(dev, cpu_addr, size, direction); - return virt_to_bus(cpu_addr); -} - -/** - * dma_unmap_single - unmap a single buffer previously mapped - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Unmap a single streaming mode DMA translation. The handle and size - * must match what was provided in the previous dma_map_single() call. - * All other usages are undefined. - * - * After this call, reads by the CPU to the buffer are guaranteed to see - * whatever the device wrote there. - */ -static inline void -dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, - enum dma_data_direction direction) -{ - -} - -/** - * dma_map_page - map a portion of a page for streaming DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @page: page that buffer resides in - * @offset: offset into page for start of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Ensure that any data held in the cache is appropriately discarded - * or written back. - * - * The device owns this memory once this call has completed. The CPU - * can regain ownership by calling dma_unmap_page() or dma_sync_single(). - */ -static inline dma_addr_t -dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - return dma_map_single(dev, page_address(page) + offset, - size, direction); -} - -/** - * dma_unmap_page - unmap a buffer previously mapped through dma_map_page() - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Unmap a single streaming mode DMA translation. The handle and size - * must match what was provided in the previous dma_map_single() call. - * All other usages are undefined. - * - * After this call, reads by the CPU to the buffer are guaranteed to see - * whatever the device wrote there. - */ -static inline void -dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, - enum dma_data_direction direction) -{ - dma_unmap_single(dev, dma_address, size, direction); -} - -/** - * dma_map_sg - map a set of SG buffers for streaming mode DMA - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Map a set of buffers described by scatterlist in streaming - * mode for DMA. This is the scatter-gather version of the - * above pci_map_single interface. Here the scatter gather list - * elements are each tagged with the appropriate dma address - * and length. They are obtained via sg_dma_{address,length}(SG). - * - * NOTE: An implementation may be able to use a smaller number of - * DMA address/length pairs than there are SG table elements. - * (for example via virtual mapping capabilities) - * The routine returns the number of addr/length pairs actually - * used, at most nents. - * - * Device ownership issues as mentioned above for pci_map_single are - * the same here. - */ -static inline int -dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction) -{ - int i; - - for (i = 0; i < nents; i++) { - char *virt; - - sg[i].dma_address = page_to_bus(sg_page(&sg[i])) + sg[i].offset; - virt = sg_virt(&sg[i]); - dma_cache_sync(dev, virt, sg[i].length, direction); - } - - return nents; -} - -/** - * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Unmap a set of streaming mode DMA translations. - * Again, CPU read rules concerning calls here are the same as for - * pci_unmap_single() above. - */ -static inline void -dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, - enum dma_data_direction direction) -{ - -} - -/** - * dma_sync_single_for_cpu - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @handle: DMA address of buffer - * @size: size of buffer to map - * @dir: DMA transfer direction - * - * Make physical memory consistent for a single streaming mode DMA - * translation after a transfer. - * - * If you perform a dma_map_single() but wish to interrogate the - * buffer using the cpu, yet do not wish to teardown the DMA mapping, - * you must call this function before doing so. At the next point you - * give the DMA address back to the card, you must first perform a - * dma_sync_single_for_device, and then the device again owns the - * buffer. - */ -static inline void -dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) -{ - /* - * No need to do anything since the CPU isn't supposed to - * touch this memory after we flushed it at mapping- or - * sync-for-device time. - */ -} - -static inline void -dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) -{ - dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); -} - -static inline void -dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything, that's all the pci API can do */ - dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction); -} - -static inline void -dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - /* just sync everything, that's all the pci API can do */ - dma_sync_single_for_device(dev, dma_handle, offset+size, direction); -} - -/** - * dma_sync_sg_for_cpu - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices - * @sg: list of buffers - * @nents: number of buffers to map - * @dir: DMA transfer direction - * - * Make physical memory consistent for a set of streaming - * mode DMA translations after a transfer. - * - * The same as dma_sync_single_for_* but for a scatter-gather list, - * same rules and usage. - */ -static inline void -dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - /* - * No need to do anything since the CPU isn't supposed to - * touch this memory after we flushed it at mapping- or - * sync-for-device time. - */ -} - -static inline void -dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - int i; - - for (i = 0; i < nents; i++) { - dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, direction); - } -} - -/* Now for the API extensions over the pci_ one */ - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) - -static inline int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) -{ - return 1; -} - -static inline int dma_get_cache_alignment(void) -{ - return boot_cpu_data.dcache.linesz; -} - -#endif /* __ASM_AVR32_DMA_MAPPING_H */ diff --git a/include/asm-avr32/dma.h b/include/asm-avr32/dma.h deleted file mode 100644 index 9e91205..0000000 --- a/include/asm-avr32/dma.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef __ASM_AVR32_DMA_H -#define __ASM_AVR32_DMA_H - -/* The maximum address that we can perform a DMA transfer to on this platform. - * Not really applicable to AVR32, but some functions need it. */ -#define MAX_DMA_ADDRESS 0xffffffff - -#endif /* __ASM_AVR32_DMA_H */ diff --git a/include/asm-avr32/elf.h b/include/asm-avr32/elf.h deleted file mode 100644 index 64ce40e..0000000 --- a/include/asm-avr32/elf.h +++ /dev/null @@ -1,108 +0,0 @@ -#ifndef __ASM_AVR32_ELF_H -#define __ASM_AVR32_ELF_H - -/* AVR32 relocation numbers */ -#define R_AVR32_NONE 0 -#define R_AVR32_32 1 -#define R_AVR32_16 2 -#define R_AVR32_8 3 -#define R_AVR32_32_PCREL 4 -#define R_AVR32_16_PCREL 5 -#define R_AVR32_8_PCREL 6 -#define R_AVR32_DIFF32 7 -#define R_AVR32_DIFF16 8 -#define R_AVR32_DIFF8 9 -#define R_AVR32_GOT32 10 -#define R_AVR32_GOT16 11 -#define R_AVR32_GOT8 12 -#define R_AVR32_21S 13 -#define R_AVR32_16U 14 -#define R_AVR32_16S 15 -#define R_AVR32_8S 16 -#define R_AVR32_8S_EXT 17 -#define R_AVR32_22H_PCREL 18 -#define R_AVR32_18W_PCREL 19 -#define R_AVR32_16B_PCREL 20 -#define R_AVR32_16N_PCREL 21 -#define R_AVR32_14UW_PCREL 22 -#define R_AVR32_11H_PCREL 23 -#define R_AVR32_10UW_PCREL 24 -#define R_AVR32_9H_PCREL 25 -#define R_AVR32_9UW_PCREL 26 -#define R_AVR32_HI16 27 -#define R_AVR32_LO16 28 -#define R_AVR32_GOTPC 29 -#define R_AVR32_GOTCALL 30 -#define R_AVR32_LDA_GOT 31 -#define R_AVR32_GOT21S 32 -#define R_AVR32_GOT18SW 33 -#define R_AVR32_GOT16S 34 -#define R_AVR32_GOT7UW 35 -#define R_AVR32_32_CPENT 36 -#define R_AVR32_CPCALL 37 -#define R_AVR32_16_CP 38 -#define R_AVR32_9W_CP 39 -#define R_AVR32_RELATIVE 40 -#define R_AVR32_GLOB_DAT 41 -#define R_AVR32_JMP_SLOT 42 -#define R_AVR32_ALIGN 43 - -/* - * ELF register definitions.. - */ - -#include -#include - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof (struct pt_regs) / sizeof (elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_fpu_struct elf_fpregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ( (x)->e_machine == EM_AVR32 ) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#ifdef __LITTLE_ENDIAN__ -#define ELF_DATA ELFDATA2LSB -#else -#define ELF_DATA ELFDATA2MSB -#endif -#define ELF_ARCH EM_AVR32 - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) - - -/* This yields a mask that user programs can use to figure out what - instruction set this CPU supports. This could be done in user space, - but it's not easy, and we've already done it here. */ - -#define ELF_HWCAP (0) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. - - For the moment, we have only optimizations for the Intel generations, - but that could change... */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) - -#endif /* __ASM_AVR32_ELF_H */ diff --git a/include/asm-avr32/emergency-restart.h b/include/asm-avr32/emergency-restart.h deleted file mode 100644 index 3e7e014..0000000 --- a/include/asm-avr32/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_EMERGENCY_RESTART_H -#define __ASM_AVR32_EMERGENCY_RESTART_H - -#include - -#endif /* __ASM_AVR32_EMERGENCY_RESTART_H */ diff --git a/include/asm-avr32/errno.h b/include/asm-avr32/errno.h deleted file mode 100644 index 558a724..0000000 --- a/include/asm-avr32/errno.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_ERRNO_H -#define __ASM_AVR32_ERRNO_H - -#include - -#endif /* __ASM_AVR32_ERRNO_H */ diff --git a/include/asm-avr32/fb.h b/include/asm-avr32/fb.h deleted file mode 100644 index 41baf84..0000000 --- a/include/asm-avr32/fb.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ - -#include -#include -#include - -static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma, - unsigned long off) -{ - vma->vm_page_prot = __pgprot((pgprot_val(vma->vm_page_prot) - & ~_PAGE_CACHABLE) - | (_PAGE_BUFFER | _PAGE_DIRTY)); -} - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-avr32/fcntl.h b/include/asm-avr32/fcntl.h deleted file mode 100644 index 14c0c44..0000000 --- a/include/asm-avr32/fcntl.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_FCNTL_H -#define __ASM_AVR32_FCNTL_H - -#include - -#endif /* __ASM_AVR32_FCNTL_H */ diff --git a/include/asm-avr32/futex.h b/include/asm-avr32/futex.h deleted file mode 100644 index 10419f1..0000000 --- a/include/asm-avr32/futex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_FUTEX_H -#define __ASM_AVR32_FUTEX_H - -#include - -#endif /* __ASM_AVR32_FUTEX_H */ diff --git a/include/asm-avr32/gpio.h b/include/asm-avr32/gpio.h deleted file mode 100644 index 19e8ccc..0000000 --- a/include/asm-avr32/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_GPIO_H -#define __ASM_AVR32_GPIO_H - -#include - -#endif /* __ASM_AVR32_GPIO_H */ diff --git a/include/asm-avr32/hardirq.h b/include/asm-avr32/hardirq.h deleted file mode 100644 index 2673543..0000000 --- a/include/asm-avr32/hardirq.h +++ /dev/null @@ -1,34 +0,0 @@ -#ifndef __ASM_AVR32_HARDIRQ_H -#define __ASM_AVR32_HARDIRQ_H - -#include -#include - -#ifndef __ASSEMBLY__ - -#include - -/* entry.S is sensitive to the offsets of these fields */ -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -void ack_bad_irq(unsigned int irq); - -/* Standard mappings for irq_cpustat_t above */ -#include - -#endif /* __ASSEMBLY__ */ - -#define HARDIRQ_BITS 12 - -/* - * The hardirq mask has to be large enough to have - * space for potentially all IRQ sources in the system - * nesting on a single CPU: - */ -#if (1 << HARDIRQ_BITS) < NR_IRQS -# error HARDIRQ_BITS is too low! -#endif - -#endif /* __ASM_AVR32_HARDIRQ_H */ diff --git a/include/asm-avr32/hw_irq.h b/include/asm-avr32/hw_irq.h deleted file mode 100644 index 218b0a6..0000000 --- a/include/asm-avr32/hw_irq.h +++ /dev/null @@ -1,9 +0,0 @@ -#ifndef __ASM_AVR32_HW_IRQ_H -#define __ASM_AVR32_HW_IRQ_H - -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) -{ - /* Nothing to do */ -} - -#endif /* __ASM_AVR32_HW_IRQ_H */ diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h deleted file mode 100644 index 8be7ea9..0000000 --- a/include/asm-avr32/io.h +++ /dev/null @@ -1,312 +0,0 @@ -#ifndef __ASM_AVR32_IO_H -#define __ASM_AVR32_IO_H - -#include -#include -#include - -#include -#include - -#include - -/* virt_to_phys will only work when address is in P1 or P2 */ -static __inline__ unsigned long virt_to_phys(volatile void *address) -{ - return PHYSADDR(address); -} - -static __inline__ void * phys_to_virt(unsigned long address) -{ - return (void *)P1SEGADDR(address); -} - -#define cached_to_phys(addr) ((unsigned long)PHYSADDR(addr)) -#define uncached_to_phys(addr) ((unsigned long)PHYSADDR(addr)) -#define phys_to_cached(addr) ((void *)P1SEGADDR(addr)) -#define phys_to_uncached(addr) ((void *)P2SEGADDR(addr)) - -/* - * Generic IO read/write. These perform native-endian accesses. Note - * that some architectures will want to re-define __raw_{read,write}w. - */ -extern void __raw_writesb(void __iomem *addr, const void *data, int bytelen); -extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); -extern void __raw_writesl(void __iomem *addr, const void *data, int longlen); - -extern void __raw_readsb(const void __iomem *addr, void *data, int bytelen); -extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); -extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); - -static inline void __raw_writeb(u8 v, volatile void __iomem *addr) -{ - *(volatile u8 __force *)addr = v; -} -static inline void __raw_writew(u16 v, volatile void __iomem *addr) -{ - *(volatile u16 __force *)addr = v; -} -static inline void __raw_writel(u32 v, volatile void __iomem *addr) -{ - *(volatile u32 __force *)addr = v; -} - -static inline u8 __raw_readb(const volatile void __iomem *addr) -{ - return *(const volatile u8 __force *)addr; -} -static inline u16 __raw_readw(const volatile void __iomem *addr) -{ - return *(const volatile u16 __force *)addr; -} -static inline u32 __raw_readl(const volatile void __iomem *addr) -{ - return *(const volatile u32 __force *)addr; -} - -/* Convert I/O port address to virtual address */ -#ifndef __io -# define __io(p) ((void *)phys_to_uncached(p)) -#endif - -/* - * Not really sure about the best way to slow down I/O on - * AVR32. Defining it as a no-op until we have an actual test case. - */ -#define SLOW_DOWN_IO do { } while (0) - -#define __BUILD_MEMORY_SINGLE(pfx, bwl, type) \ -static inline void \ -pfx##write##bwl(type val, volatile void __iomem *addr) \ -{ \ - volatile type *__addr; \ - type __val; \ - \ - __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \ - __val = pfx##ioswab##bwl(__addr, val); \ - \ - BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ - \ - *__addr = __val; \ -} \ - \ -static inline type pfx##read##bwl(const volatile void __iomem *addr) \ -{ \ - volatile type *__addr; \ - type __val; \ - \ - __addr = (void *)__swizzle_addr_##bwl((unsigned long)(addr)); \ - \ - BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ - \ - __val = *__addr; \ - return pfx##ioswab##bwl(__addr, __val); \ -} - -#define __BUILD_IOPORT_SINGLE(pfx, bwl, type, p, slow) \ -static inline void pfx##out##bwl##p(type val, unsigned long port) \ -{ \ - volatile type *__addr; \ - type __val; \ - \ - __addr = __io(__swizzle_addr_##bwl(port)); \ - __val = pfx##ioswab##bwl(__addr, val); \ - \ - BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ - \ - *__addr = __val; \ - slow; \ -} \ - \ -static inline type pfx##in##bwl##p(unsigned long port) \ -{ \ - volatile type *__addr; \ - type __val; \ - \ - __addr = __io(__swizzle_addr_##bwl(port)); \ - \ - BUILD_BUG_ON(sizeof(type) > sizeof(unsigned long)); \ - \ - __val = *__addr; \ - slow; \ - \ - return pfx##ioswab##bwl(__addr, __val); \ -} - -#define __BUILD_MEMORY_PFX(bus, bwl, type) \ - __BUILD_MEMORY_SINGLE(bus, bwl, type) - -#define BUILDIO_MEM(bwl, type) \ - __BUILD_MEMORY_PFX(, bwl, type) \ - __BUILD_MEMORY_PFX(__mem_, bwl, type) - -#define __BUILD_IOPORT_PFX(bus, bwl, type) \ - __BUILD_IOPORT_SINGLE(bus, bwl, type, ,) \ - __BUILD_IOPORT_SINGLE(bus, bwl, type, _p, SLOW_DOWN_IO) - -#define BUILDIO_IOPORT(bwl, type) \ - __BUILD_IOPORT_PFX(, bwl, type) \ - __BUILD_IOPORT_PFX(__mem_, bwl, type) - -BUILDIO_MEM(b, u8) -BUILDIO_MEM(w, u16) -BUILDIO_MEM(l, u32) - -BUILDIO_IOPORT(b, u8) -BUILDIO_IOPORT(w, u16) -BUILDIO_IOPORT(l, u32) - -#define readb_relaxed readb -#define readw_relaxed readw -#define readl_relaxed readl - -#define __BUILD_MEMORY_STRING(bwl, type) \ -static inline void writes##bwl(volatile void __iomem *addr, \ - const void *data, unsigned int count) \ -{ \ - const type *__data = data; \ - \ - while (count--) \ - __mem_write##bwl(*__data++, addr); \ -} \ - \ -static inline void reads##bwl(const volatile void __iomem *addr, \ - void *data, unsigned int count) \ -{ \ - type *__data = data; \ - \ - while (count--) \ - *__data++ = __mem_read##bwl(addr); \ -} - -#define __BUILD_IOPORT_STRING(bwl, type) \ -static inline void outs##bwl(unsigned long port, const void *data, \ - unsigned int count) \ -{ \ - const type *__data = data; \ - \ - while (count--) \ - __mem_out##bwl(*__data++, port); \ -} \ - \ -static inline void ins##bwl(unsigned long port, void *data, \ - unsigned int count) \ -{ \ - type *__data = data; \ - \ - while (count--) \ - *__data++ = __mem_in##bwl(port); \ -} - -#define BUILDSTRING(bwl, type) \ - __BUILD_MEMORY_STRING(bwl, type) \ - __BUILD_IOPORT_STRING(bwl, type) - -BUILDSTRING(b, u8) -BUILDSTRING(w, u16) -BUILDSTRING(l, u32) - -/* - * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be - */ -#ifndef ioread8 - -#define ioread8(p) ((unsigned int)readb(p)) - -#define ioread16(p) ((unsigned int)readw(p)) -#define ioread16be(p) ((unsigned int)__raw_readw(p)) - -#define ioread32(p) ((unsigned int)readl(p)) -#define ioread32be(p) ((unsigned int)__raw_readl(p)) - -#define iowrite8(v,p) writeb(v, p) - -#define iowrite16(v,p) writew(v, p) -#define iowrite16be(v,p) __raw_writew(v, p) - -#define iowrite32(v,p) writel(v, p) -#define iowrite32be(v,p) __raw_writel(v, p) - -#define ioread8_rep(p,d,c) readsb(p,d,c) -#define ioread16_rep(p,d,c) readsw(p,d,c) -#define ioread32_rep(p,d,c) readsl(p,d,c) - -#define iowrite8_rep(p,s,c) writesb(p,s,c) -#define iowrite16_rep(p,s,c) writesw(p,s,c) -#define iowrite32_rep(p,s,c) writesl(p,s,c) - -#endif - -static inline void memcpy_fromio(void * to, const volatile void __iomem *from, - unsigned long count) -{ - memcpy(to, (const void __force *)from, count); -} - -static inline void memcpy_toio(volatile void __iomem *to, const void * from, - unsigned long count) -{ - memcpy((void __force *)to, from, count); -} - -static inline void memset_io(volatile void __iomem *addr, unsigned char val, - unsigned long count) -{ - memset((void __force *)addr, val, count); -} - -#define mmiowb() - -#define IO_SPACE_LIMIT 0xffffffff - -extern void __iomem *__ioremap(unsigned long offset, size_t size, - unsigned long flags); -extern void __iounmap(void __iomem *addr); - -/* - * ioremap - map bus memory into CPU space - * @offset bus address of the memory - * @size size of the resource to map - * - * ioremap performs a platform specific sequence of operations to make - * bus memory CPU accessible via the readb/.../writel functions and - * the other mmio helpers. The returned address is not guaranteed to - * be usable directly as a virtual address. - */ -#define ioremap(offset, size) \ - __ioremap((offset), (size), 0) - -#define ioremap_nocache(offset, size) \ - __ioremap((offset), (size), 0) - -#define iounmap(addr) \ - __iounmap(addr) - -#define cached(addr) P1SEGADDR(addr) -#define uncached(addr) P2SEGADDR(addr) - -#define virt_to_bus virt_to_phys -#define bus_to_virt phys_to_virt -#define page_to_bus page_to_phys -#define bus_to_page phys_to_page - -/* - * Create a virtual mapping cookie for an IO port range. There exists - * no such thing as port-based I/O on AVR32, so a regular ioremap() - * should do what we need. - */ -#define ioport_map(port, nr) ioremap(port, nr) -#define ioport_unmap(port) iounmap(port) - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* __ASM_AVR32_IO_H */ diff --git a/include/asm-avr32/ioctl.h b/include/asm-avr32/ioctl.h deleted file mode 100644 index c8472c1..0000000 --- a/include/asm-avr32/ioctl.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_IOCTL_H -#define __ASM_AVR32_IOCTL_H - -#include - -#endif /* __ASM_AVR32_IOCTL_H */ diff --git a/include/asm-avr32/ioctls.h b/include/asm-avr32/ioctls.h deleted file mode 100644 index 0cf2c0a..0000000 --- a/include/asm-avr32/ioctls.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef __ASM_AVR32_IOCTLS_H -#define __ASM_AVR32_IOCTLS_H - -#include - -/* 0x54 is just a magic number to make these relatively unique ('T') */ - -#define TCGETS 0x5401 -#define TCSETS 0x5402 /* Clashes with SNDCTL_TMR_START sound ioctl */ -#define TCSETSW 0x5403 -#define TCSETSF 0x5404 -#define TCGETA 0x5405 -#define TCSETA 0x5406 -#define TCSETAW 0x5407 -#define TCSETAF 0x5408 -#define TCSBRK 0x5409 -#define TCXONC 0x540A -#define TCFLSH 0x540B -#define TIOCEXCL 0x540C -#define TIOCNXCL 0x540D -#define TIOCSCTTY 0x540E -#define TIOCGPGRP 0x540F -#define TIOCSPGRP 0x5410 -#define TIOCOUTQ 0x5411 -#define TIOCSTI 0x5412 -#define TIOCGWINSZ 0x5413 -#define TIOCSWINSZ 0x5414 -#define TIOCMGET 0x5415 -#define TIOCMBIS 0x5416 -#define TIOCMBIC 0x5417 -#define TIOCMSET 0x5418 -#define TIOCGSOFTCAR 0x5419 -#define TIOCSSOFTCAR 0x541A -#define FIONREAD 0x541B -#define TIOCINQ FIONREAD -#define TIOCLINUX 0x541C -#define TIOCCONS 0x541D -#define TIOCGSERIAL 0x541E -#define TIOCSSERIAL 0x541F -#define TIOCPKT 0x5420 -#define FIONBIO 0x5421 -#define TIOCNOTTY 0x5422 -#define TIOCSETD 0x5423 -#define TIOCGETD 0x5424 -#define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ -/* #define TIOCTTYGSTRUCT 0x5426 - Former debugging-only ioctl */ -#define TIOCSBRK 0x5427 /* BSD compatibility */ -#define TIOCCBRK 0x5428 /* BSD compatibility */ -#define TIOCGSID 0x5429 /* Return the session ID of FD */ -#define TCGETS2 _IOR('T',0x2A, struct termios2) -#define TCSETS2 _IOW('T',0x2B, struct termios2) -#define TCSETSW2 _IOW('T',0x2C, struct termios2) -#define TCSETSF2 _IOW('T',0x2D, struct termios2) -#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ -#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ - -#define FIONCLEX 0x5450 -#define FIOCLEX 0x5451 -#define FIOASYNC 0x5452 -#define TIOCSERCONFIG 0x5453 -#define TIOCSERGWILD 0x5454 -#define TIOCSERSWILD 0x5455 -#define TIOCGLCKTRMIOS 0x5456 -#define TIOCSLCKTRMIOS 0x5457 -#define TIOCSERGSTRUCT 0x5458 /* For debugging only */ -#define TIOCSERGETLSR 0x5459 /* Get line status register */ -#define TIOCSERGETMULTI 0x545A /* Get multiport config */ -#define TIOCSERSETMULTI 0x545B /* Set multiport config */ - -#define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ -#define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ -#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ -#define FIOQSIZE 0x5460 - -/* Used for packet mode */ -#define TIOCPKT_DATA 0 -#define TIOCPKT_FLUSHREAD 1 -#define TIOCPKT_FLUSHWRITE 2 -#define TIOCPKT_STOP 4 -#define TIOCPKT_START 8 -#define TIOCPKT_NOSTOP 16 -#define TIOCPKT_DOSTOP 32 - -#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ - -#endif /* __ASM_AVR32_IOCTLS_H */ diff --git a/include/asm-avr32/ipcbuf.h b/include/asm-avr32/ipcbuf.h deleted file mode 100644 index 1552c96..0000000 --- a/include/asm-avr32/ipcbuf.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef __ASM_AVR32_IPCBUF_H -#define __ASM_AVR32_IPCBUF_H - -/* -* The user_ipc_perm structure for AVR32 architecture. -* Note extra padding because this structure is passed back and forth -* between kernel and user space. -* -* Pad space is left for: -* - 32-bit mode_t and seq -* - 2 miscellaneous 32-bit values -*/ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned short __pad2; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __ASM_AVR32_IPCBUF_H */ diff --git a/include/asm-avr32/irq.h b/include/asm-avr32/irq.h deleted file mode 100644 index c563b77..0000000 --- a/include/asm-avr32/irq.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef __ASM_AVR32_IRQ_H -#define __ASM_AVR32_IRQ_H - -#define NR_INTERNAL_IRQS 64 - -#include - -#ifndef NR_IRQS -#define NR_IRQS (NR_INTERNAL_IRQS) -#endif - -#define irq_canonicalize(i) (i) - -#ifndef __ASSEMBLER__ -int nmi_enable(void); -void nmi_disable(void); - -/* - * Returns a bitmask of pending interrupts in a group. - */ -extern unsigned long intc_get_pending(unsigned int group); -#endif - -#endif /* __ASM_AVR32_IOCTLS_H */ diff --git a/include/asm-avr32/irq_regs.h b/include/asm-avr32/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-avr32/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-avr32/irqflags.h b/include/asm-avr32/irqflags.h deleted file mode 100644 index 93570da..0000000 --- a/include/asm-avr32/irqflags.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_IRQFLAGS_H -#define __ASM_AVR32_IRQFLAGS_H - -#include - -static inline unsigned long __raw_local_save_flags(void) -{ - return sysreg_read(SR); -} - -#define raw_local_save_flags(x) \ - do { (x) = __raw_local_save_flags(); } while (0) - -/* - * This will restore ALL status register flags, not only the interrupt - * mask flag. - * - * The empty asm statement informs the compiler of this fact while - * also serving as a barrier. - */ -static inline void raw_local_irq_restore(unsigned long flags) -{ - sysreg_write(SR, flags); - asm volatile("" : : : "memory", "cc"); -} - -static inline void raw_local_irq_disable(void) -{ - asm volatile("ssrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory"); -} - -static inline void raw_local_irq_enable(void) -{ - asm volatile("csrf %0" : : "n"(SYSREG_GM_OFFSET) : "memory"); -} - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return (flags & SYSREG_BIT(GM)) != 0; -} - -static inline int raw_irqs_disabled(void) -{ - unsigned long flags = __raw_local_save_flags(); - - return raw_irqs_disabled_flags(flags); -} - -static inline unsigned long __raw_local_irq_save(void) -{ - unsigned long flags = __raw_local_save_flags(); - - raw_local_irq_disable(); - - return flags; -} - -#define raw_local_irq_save(flags) \ - do { (flags) = __raw_local_irq_save(); } while (0) - -#endif /* __ASM_AVR32_IRQFLAGS_H */ diff --git a/include/asm-avr32/kdebug.h b/include/asm-avr32/kdebug.h deleted file mode 100644 index ca4f954..0000000 --- a/include/asm-avr32/kdebug.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __ASM_AVR32_KDEBUG_H -#define __ASM_AVR32_KDEBUG_H - -/* Grossly misnamed. */ -enum die_val { - DIE_BREAKPOINT, - DIE_SSTEP, - DIE_NMI, -}; - -#endif /* __ASM_AVR32_KDEBUG_H */ diff --git a/include/asm-avr32/kmap_types.h b/include/asm-avr32/kmap_types.h deleted file mode 100644 index b7f5c68..0000000 --- a/include/asm-avr32/kmap_types.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef __ASM_AVR32_KMAP_TYPES_H -#define __ASM_AVR32_KMAP_TYPES_H - -#ifdef CONFIG_DEBUG_HIGHMEM -# define D(n) __KM_FENCE_##n , -#else -# define D(n) -#endif - -enum km_type { -D(0) KM_BOUNCE_READ, -D(1) KM_SKB_SUNRPC_DATA, -D(2) KM_SKB_DATA_SOFTIRQ, -D(3) KM_USER0, -D(4) KM_USER1, -D(5) KM_BIO_SRC_IRQ, -D(6) KM_BIO_DST_IRQ, -D(7) KM_PTE0, -D(8) KM_PTE1, -D(9) KM_PTE2, -D(10) KM_IRQ0, -D(11) KM_IRQ1, -D(12) KM_SOFTIRQ0, -D(13) KM_SOFTIRQ1, -D(14) KM_TYPE_NR -}; - -#undef D - -#endif /* __ASM_AVR32_KMAP_TYPES_H */ diff --git a/include/asm-avr32/kprobes.h b/include/asm-avr32/kprobes.h deleted file mode 100644 index 996cb65..0000000 --- a/include/asm-avr32/kprobes.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Kernel Probes (KProbes) - * - * Copyright (C) 2005-2006 Atmel Corporation - * Copyright (C) IBM Corporation, 2002, 2004 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_KPROBES_H -#define __ASM_AVR32_KPROBES_H - -#include - -typedef u16 kprobe_opcode_t; -#define BREAKPOINT_INSTRUCTION 0xd673 /* breakpoint */ -#define MAX_INSN_SIZE 2 - -#define kretprobe_blacklist_size 0 - -#define arch_remove_kprobe(p) do { } while (0) - -/* Architecture specific copy of original instruction */ -struct arch_specific_insn { - kprobe_opcode_t insn[MAX_INSN_SIZE]; -}; - -extern int kprobe_fault_handler(struct pt_regs *regs, int trapnr); -extern int kprobe_exceptions_notify(struct notifier_block *self, - unsigned long val, void *data); - -#define flush_insn_slot(p) do { } while (0) - -#endif /* __ASM_AVR32_KPROBES_H */ diff --git a/include/asm-avr32/linkage.h b/include/asm-avr32/linkage.h deleted file mode 100644 index f7b285e..0000000 --- a/include/asm-avr32/linkage.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_LINKAGE_H -#define __ASM_LINKAGE_H - -#define __ALIGN .balign 2 -#define __ALIGN_STR ".balign 2" - -#endif /* __ASM_LINKAGE_H */ diff --git a/include/asm-avr32/local.h b/include/asm-avr32/local.h deleted file mode 100644 index 1c16196..0000000 --- a/include/asm-avr32/local.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_LOCAL_H -#define __ASM_AVR32_LOCAL_H - -#include - -#endif /* __ASM_AVR32_LOCAL_H */ diff --git a/include/asm-avr32/mach/serial_at91.h b/include/asm-avr32/mach/serial_at91.h deleted file mode 100644 index 55b317a..0000000 --- a/include/asm-avr32/mach/serial_at91.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/mach/serial_at91.h - * - * Based on serial_sa1100.h by Nicolas Pitre - * - * Copyright (C) 2002 ATMEL Rousset - * - * Low level machine dependent UART functions. - */ - -struct uart_port; - -/* - * This is a temporary structure for registering these - * functions; it is intended to be discarded after boot. - */ -struct atmel_port_fns { - void (*set_mctrl)(struct uart_port *, u_int); - u_int (*get_mctrl)(struct uart_port *); - void (*enable_ms)(struct uart_port *); - void (*pm)(struct uart_port *, u_int, u_int); - int (*set_wake)(struct uart_port *, u_int); - int (*open)(struct uart_port *); - void (*close)(struct uart_port *); -}; - -#if defined(CONFIG_SERIAL_ATMEL) -void atmel_register_uart_fns(struct atmel_port_fns *fns); -#else -#define atmel_register_uart_fns(fns) do { } while (0) -#endif - - diff --git a/include/asm-avr32/mman.h b/include/asm-avr32/mman.h deleted file mode 100644 index 648f91e..0000000 --- a/include/asm-avr32/mman.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_AVR32_MMAN_H__ -#define __ASM_AVR32_MMAN_H__ - -#include - -#define MAP_GROWSDOWN 0x0100 /* stack-like segment */ -#define MAP_DENYWRITE 0x0800 /* ETXTBSY */ -#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ -#define MAP_LOCKED 0x2000 /* pages are locked */ -#define MAP_NORESERVE 0x4000 /* don't check for reservations */ -#define MAP_POPULATE 0x8000 /* populate (prefault) page tables */ -#define MAP_NONBLOCK 0x10000 /* do not block on IO */ - -#define MCL_CURRENT 1 /* lock all current mappings */ -#define MCL_FUTURE 2 /* lock all future mappings */ - -#endif /* __ASM_AVR32_MMAN_H__ */ diff --git a/include/asm-avr32/mmu.h b/include/asm-avr32/mmu.h deleted file mode 100644 index 60c2d26..0000000 --- a/include/asm-avr32/mmu.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_AVR32_MMU_H -#define __ASM_AVR32_MMU_H - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_t; - -#define MMU_ITLB_ENTRIES 64 -#define MMU_DTLB_ENTRIES 64 - -#endif /* __ASM_AVR32_MMU_H */ diff --git a/include/asm-avr32/mmu_context.h b/include/asm-avr32/mmu_context.h deleted file mode 100644 index 27ff234..0000000 --- a/include/asm-avr32/mmu_context.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * ASID handling taken from SH implementation. - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_MMU_CONTEXT_H -#define __ASM_AVR32_MMU_CONTEXT_H - -#include -#include -#include - -/* - * The MMU "context" consists of two things: - * (a) TLB cache version - * (b) ASID (Address Space IDentifier) - */ -#define MMU_CONTEXT_ASID_MASK 0x000000ff -#define MMU_CONTEXT_VERSION_MASK 0xffffff00 -#define MMU_CONTEXT_FIRST_VERSION 0x00000100 -#define NO_CONTEXT 0 - -#define MMU_NO_ASID 0x100 - -/* Virtual Page Number mask */ -#define MMU_VPN_MASK 0xfffff000 - -/* Cache of MMU context last used */ -extern unsigned long mmu_context_cache; - -/* - * Get MMU context if needed - */ -static inline void -get_mmu_context(struct mm_struct *mm) -{ - unsigned long mc = mmu_context_cache; - - if (((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK) == 0) - /* It's up to date, do nothing */ - return; - - /* It's old, we need to get new context with new version */ - mc = ++mmu_context_cache; - if (!(mc & MMU_CONTEXT_ASID_MASK)) { - /* - * We have exhausted all ASIDs of this version. - * Flush the TLB and start new cycle. - */ - flush_tlb_all(); - /* - * Fix version. Note that we avoid version #0 - * to distinguish NO_CONTEXT. - */ - if (!mc) - mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION; - } - mm->context = mc; -} - -/* - * Initialize the context related info for a new mm_struct - * instance. - */ -static inline int init_new_context(struct task_struct *tsk, - struct mm_struct *mm) -{ - mm->context = NO_CONTEXT; - return 0; -} - -/* - * Destroy context related info for an mm_struct that is about - * to be put to rest. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - /* Do nothing */ -} - -static inline void set_asid(unsigned long asid) -{ - /* XXX: We're destroying TLBEHI[8:31] */ - sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK); - cpu_sync_pipeline(); -} - -static inline unsigned long get_asid(void) -{ - unsigned long asid; - - asid = sysreg_read(TLBEHI); - return asid & MMU_CONTEXT_ASID_MASK; -} - -static inline void activate_context(struct mm_struct *mm) -{ - get_mmu_context(mm); - set_asid(mm->context & MMU_CONTEXT_ASID_MASK); -} - -static inline void switch_mm(struct mm_struct *prev, - struct mm_struct *next, - struct task_struct *tsk) -{ - if (likely(prev != next)) { - unsigned long __pgdir = (unsigned long)next->pgd; - - sysreg_write(PTBR, __pgdir); - activate_context(next); - } -} - -#define deactivate_mm(tsk,mm) do { } while(0) - -#define activate_mm(prev, next) switch_mm((prev), (next), NULL) - -static inline void -enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - - -static inline void enable_mmu(void) -{ - sysreg_write(MMUCR, (SYSREG_BIT(MMUCR_S) - | SYSREG_BIT(E) - | SYSREG_BIT(MMUCR_I))); - nop(); nop(); nop(); nop(); nop(); nop(); nop(); nop(); - - if (mmu_context_cache == NO_CONTEXT) - mmu_context_cache = MMU_CONTEXT_FIRST_VERSION; - - set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK); -} - -static inline void disable_mmu(void) -{ - sysreg_write(MMUCR, SYSREG_BIT(MMUCR_S)); -} - -#endif /* __ASM_AVR32_MMU_CONTEXT_H */ diff --git a/include/asm-avr32/module.h b/include/asm-avr32/module.h deleted file mode 100644 index 4514445..0000000 --- a/include/asm-avr32/module.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ASM_AVR32_MODULE_H -#define __ASM_AVR32_MODULE_H - -struct mod_arch_syminfo { - unsigned long got_offset; - int got_initialized; -}; - -struct mod_arch_specific { - /* Starting offset of got in the module core memory. */ - unsigned long got_offset; - /* Size of the got. */ - unsigned long got_size; - /* Number of symbols in syminfo. */ - int nsyms; - /* Additional symbol information (got offsets). */ - struct mod_arch_syminfo *syminfo; -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -#define MODULE_PROC_FAMILY "AVR32v1" - -#define MODULE_ARCH_VERMAGIC MODULE_PROC_FAMILY - -#endif /* __ASM_AVR32_MODULE_H */ diff --git a/include/asm-avr32/msgbuf.h b/include/asm-avr32/msgbuf.h deleted file mode 100644 index ac18bc4..0000000 --- a/include/asm-avr32/msgbuf.h +++ /dev/null @@ -1,31 +0,0 @@ -#ifndef __ASM_AVR32_MSGBUF_H -#define __ASM_AVR32_MSGBUF_H - -/* - * The msqid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct msqid64_ds { - struct ipc64_perm msg_perm; - __kernel_time_t msg_stime; /* last msgsnd time */ - unsigned long __unused1; - __kernel_time_t msg_rtime; /* last msgrcv time */ - unsigned long __unused2; - __kernel_time_t msg_ctime; /* last change time */ - unsigned long __unused3; - unsigned long msg_cbytes; /* current number of bytes on queue */ - unsigned long msg_qnum; /* number of messages in queue */ - unsigned long msg_qbytes; /* max number of bytes on queue */ - __kernel_pid_t msg_lspid; /* pid of last msgsnd */ - __kernel_pid_t msg_lrpid; /* last receive pid */ - unsigned long __unused4; - unsigned long __unused5; -}; - -#endif /* __ASM_AVR32_MSGBUF_H */ diff --git a/include/asm-avr32/mutex.h b/include/asm-avr32/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-avr32/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-avr32/numnodes.h b/include/asm-avr32/numnodes.h deleted file mode 100644 index 0b864d7..0000000 --- a/include/asm-avr32/numnodes.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_AVR32_NUMNODES_H -#define __ASM_AVR32_NUMNODES_H - -/* Max 4 nodes */ -#define NODES_SHIFT 2 - -#endif /* __ASM_AVR32_NUMNODES_H */ diff --git a/include/asm-avr32/ocd.h b/include/asm-avr32/ocd.h deleted file mode 100644 index 6bef094..0000000 --- a/include/asm-avr32/ocd.h +++ /dev/null @@ -1,543 +0,0 @@ -/* - * AVR32 OCD Interface and register definitions - * - * Copyright (C) 2004-2007 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_OCD_H -#define __ASM_AVR32_OCD_H - -/* OCD Register offsets. Abbreviations used below: - * - * BP Breakpoint - * Comm Communication - * DT Data Trace - * PC Program Counter - * PID Process ID - * R/W Read/Write - * WP Watchpoint - */ -#define OCD_DID 0x0000 /* Device ID */ -#define OCD_DC 0x0008 /* Development Control */ -#define OCD_DS 0x0010 /* Development Status */ -#define OCD_RWCS 0x001c /* R/W Access Control */ -#define OCD_RWA 0x0024 /* R/W Access Address */ -#define OCD_RWD 0x0028 /* R/W Access Data */ -#define OCD_WT 0x002c /* Watchpoint Trigger */ -#define OCD_DTC 0x0034 /* Data Trace Control */ -#define OCD_DTSA0 0x0038 /* DT Start Addr Channel 0 */ -#define OCD_DTSA1 0x003c /* DT Start Addr Channel 1 */ -#define OCD_DTEA0 0x0048 /* DT End Addr Channel 0 */ -#define OCD_DTEA1 0x004c /* DT End Addr Channel 1 */ -#define OCD_BWC0A 0x0058 /* PC BP/WP Control 0A */ -#define OCD_BWC0B 0x005c /* PC BP/WP Control 0B */ -#define OCD_BWC1A 0x0060 /* PC BP/WP Control 1A */ -#define OCD_BWC1B 0x0064 /* PC BP/WP Control 1B */ -#define OCD_BWC2A 0x0068 /* PC BP/WP Control 2A */ -#define OCD_BWC2B 0x006c /* PC BP/WP Control 2B */ -#define OCD_BWC3A 0x0070 /* Data BP/WP Control 3A */ -#define OCD_BWC3B 0x0074 /* Data BP/WP Control 3B */ -#define OCD_BWA0A 0x0078 /* PC BP/WP Address 0A */ -#define OCD_BWA0B 0x007c /* PC BP/WP Address 0B */ -#define OCD_BWA1A 0x0080 /* PC BP/WP Address 1A */ -#define OCD_BWA1B 0x0084 /* PC BP/WP Address 1B */ -#define OCD_BWA2A 0x0088 /* PC BP/WP Address 2A */ -#define OCD_BWA2B 0x008c /* PC BP/WP Address 2B */ -#define OCD_BWA3A 0x0090 /* Data BP/WP Address 3A */ -#define OCD_BWA3B 0x0094 /* Data BP/WP Address 3B */ -#define OCD_NXCFG 0x0100 /* Nexus Configuration */ -#define OCD_DINST 0x0104 /* Debug Instruction */ -#define OCD_DPC 0x0108 /* Debug Program Counter */ -#define OCD_CPUCM 0x010c /* CPU Control Mask */ -#define OCD_DCCPU 0x0110 /* Debug Comm CPU */ -#define OCD_DCEMU 0x0114 /* Debug Comm Emulator */ -#define OCD_DCSR 0x0118 /* Debug Comm Status */ -#define OCD_PID 0x011c /* Ownership Trace PID */ -#define OCD_EPC0 0x0120 /* Event Pair Control 0 */ -#define OCD_EPC1 0x0124 /* Event Pair Control 1 */ -#define OCD_EPC2 0x0128 /* Event Pair Control 2 */ -#define OCD_EPC3 0x012c /* Event Pair Control 3 */ -#define OCD_AXC 0x0130 /* AUX port Control */ - -/* Bits in DID */ -#define OCD_DID_MID_START 1 -#define OCD_DID_MID_SIZE 11 -#define OCD_DID_PN_START 12 -#define OCD_DID_PN_SIZE 16 -#define OCD_DID_RN_START 28 -#define OCD_DID_RN_SIZE 4 - -/* Bits in DC */ -#define OCD_DC_TM_START 0 -#define OCD_DC_TM_SIZE 2 -#define OCD_DC_EIC_START 3 -#define OCD_DC_EIC_SIZE 2 -#define OCD_DC_OVC_START 5 -#define OCD_DC_OVC_SIZE 3 -#define OCD_DC_SS_BIT 8 -#define OCD_DC_DBR_BIT 12 -#define OCD_DC_DBE_BIT 13 -#define OCD_DC_EOS_START 20 -#define OCD_DC_EOS_SIZE 2 -#define OCD_DC_SQA_BIT 22 -#define OCD_DC_IRP_BIT 23 -#define OCD_DC_IFM_BIT 24 -#define OCD_DC_TOZ_BIT 25 -#define OCD_DC_TSR_BIT 26 -#define OCD_DC_RID_BIT 27 -#define OCD_DC_ORP_BIT 28 -#define OCD_DC_MM_BIT 29 -#define OCD_DC_RES_BIT 30 -#define OCD_DC_ABORT_BIT 31 - -/* Bits in DS */ -#define OCD_DS_SSS_BIT 0 -#define OCD_DS_SWB_BIT 1 -#define OCD_DS_HWB_BIT 2 -#define OCD_DS_HWE_BIT 3 -#define OCD_DS_STP_BIT 4 -#define OCD_DS_DBS_BIT 5 -#define OCD_DS_BP_START 8 -#define OCD_DS_BP_SIZE 8 -#define OCD_DS_INC_BIT 24 -#define OCD_DS_BOZ_BIT 25 -#define OCD_DS_DBA_BIT 26 -#define OCD_DS_EXB_BIT 27 -#define OCD_DS_NTBF_BIT 28 - -/* Bits in RWCS */ -#define OCD_RWCS_DV_BIT 0 -#define OCD_RWCS_ERR_BIT 1 -#define OCD_RWCS_CNT_START 2 -#define OCD_RWCS_CNT_SIZE 14 -#define OCD_RWCS_CRC_BIT 19 -#define OCD_RWCS_NTBC_START 20 -#define OCD_RWCS_NTBC_SIZE 2 -#define OCD_RWCS_NTE_BIT 22 -#define OCD_RWCS_NTAP_BIT 23 -#define OCD_RWCS_WRAPPED_BIT 24 -#define OCD_RWCS_CCTRL_START 25 -#define OCD_RWCS_CCTRL_SIZE 2 -#define OCD_RWCS_SZ_START 27 -#define OCD_RWCS_SZ_SIZE 3 -#define OCD_RWCS_RW_BIT 30 -#define OCD_RWCS_AC_BIT 31 - -/* Bits in RWA */ -#define OCD_RWA_RWA_START 0 -#define OCD_RWA_RWA_SIZE 32 - -/* Bits in RWD */ -#define OCD_RWD_RWD_START 0 -#define OCD_RWD_RWD_SIZE 32 - -/* Bits in WT */ -#define OCD_WT_DTE_START 20 -#define OCD_WT_DTE_SIZE 3 -#define OCD_WT_DTS_START 23 -#define OCD_WT_DTS_SIZE 3 -#define OCD_WT_PTE_START 26 -#define OCD_WT_PTE_SIZE 3 -#define OCD_WT_PTS_START 29 -#define OCD_WT_PTS_SIZE 3 - -/* Bits in DTC */ -#define OCD_DTC_T0WP_BIT 0 -#define OCD_DTC_T1WP_BIT 1 -#define OCD_DTC_ASID0EN_BIT 2 -#define OCD_DTC_ASID0_START 3 -#define OCD_DTC_ASID0_SIZE 8 -#define OCD_DTC_ASID1EN_BIT 11 -#define OCD_DTC_ASID1_START 12 -#define OCD_DTC_ASID1_SIZE 8 -#define OCD_DTC_RWT1_START 28 -#define OCD_DTC_RWT1_SIZE 2 -#define OCD_DTC_RWT0_START 30 -#define OCD_DTC_RWT0_SIZE 2 - -/* Bits in DTSA0 */ -#define OCD_DTSA0_DTSA_START 0 -#define OCD_DTSA0_DTSA_SIZE 32 - -/* Bits in DTSA1 */ -#define OCD_DTSA1_DTSA_START 0 -#define OCD_DTSA1_DTSA_SIZE 32 - -/* Bits in DTEA0 */ -#define OCD_DTEA0_DTEA_START 0 -#define OCD_DTEA0_DTEA_SIZE 32 - -/* Bits in DTEA1 */ -#define OCD_DTEA1_DTEA_START 0 -#define OCD_DTEA1_DTEA_SIZE 32 - -/* Bits in BWC0A */ -#define OCD_BWC0A_ASIDEN_BIT 0 -#define OCD_BWC0A_ASID_START 1 -#define OCD_BWC0A_ASID_SIZE 8 -#define OCD_BWC0A_EOC_BIT 14 -#define OCD_BWC0A_AME_BIT 25 -#define OCD_BWC0A_BWE_START 30 -#define OCD_BWC0A_BWE_SIZE 2 - -/* Bits in BWC0B */ -#define OCD_BWC0B_ASIDEN_BIT 0 -#define OCD_BWC0B_ASID_START 1 -#define OCD_BWC0B_ASID_SIZE 8 -#define OCD_BWC0B_EOC_BIT 14 -#define OCD_BWC0B_AME_BIT 25 -#define OCD_BWC0B_BWE_START 30 -#define OCD_BWC0B_BWE_SIZE 2 - -/* Bits in BWC1A */ -#define OCD_BWC1A_ASIDEN_BIT 0 -#define OCD_BWC1A_ASID_START 1 -#define OCD_BWC1A_ASID_SIZE 8 -#define OCD_BWC1A_EOC_BIT 14 -#define OCD_BWC1A_AME_BIT 25 -#define OCD_BWC1A_BWE_START 30 -#define OCD_BWC1A_BWE_SIZE 2 - -/* Bits in BWC1B */ -#define OCD_BWC1B_ASIDEN_BIT 0 -#define OCD_BWC1B_ASID_START 1 -#define OCD_BWC1B_ASID_SIZE 8 -#define OCD_BWC1B_EOC_BIT 14 -#define OCD_BWC1B_AME_BIT 25 -#define OCD_BWC1B_BWE_START 30 -#define OCD_BWC1B_BWE_SIZE 2 - -/* Bits in BWC2A */ -#define OCD_BWC2A_ASIDEN_BIT 0 -#define OCD_BWC2A_ASID_START 1 -#define OCD_BWC2A_ASID_SIZE 8 -#define OCD_BWC2A_EOC_BIT 14 -#define OCD_BWC2A_AMB_START 20 -#define OCD_BWC2A_AMB_SIZE 5 -#define OCD_BWC2A_AME_BIT 25 -#define OCD_BWC2A_BWE_START 30 -#define OCD_BWC2A_BWE_SIZE 2 - -/* Bits in BWC2B */ -#define OCD_BWC2B_ASIDEN_BIT 0 -#define OCD_BWC2B_ASID_START 1 -#define OCD_BWC2B_ASID_SIZE 8 -#define OCD_BWC2B_EOC_BIT 14 -#define OCD_BWC2B_AME_BIT 25 -#define OCD_BWC2B_BWE_START 30 -#define OCD_BWC2B_BWE_SIZE 2 - -/* Bits in BWC3A */ -#define OCD_BWC3A_ASIDEN_BIT 0 -#define OCD_BWC3A_ASID_START 1 -#define OCD_BWC3A_ASID_SIZE 8 -#define OCD_BWC3A_SIZE_START 9 -#define OCD_BWC3A_SIZE_SIZE 3 -#define OCD_BWC3A_EOC_BIT 14 -#define OCD_BWC3A_BWO_START 16 -#define OCD_BWC3A_BWO_SIZE 2 -#define OCD_BWC3A_BME_START 20 -#define OCD_BWC3A_BME_SIZE 4 -#define OCD_BWC3A_BRW_START 28 -#define OCD_BWC3A_BRW_SIZE 2 -#define OCD_BWC3A_BWE_START 30 -#define OCD_BWC3A_BWE_SIZE 2 - -/* Bits in BWC3B */ -#define OCD_BWC3B_ASIDEN_BIT 0 -#define OCD_BWC3B_ASID_START 1 -#define OCD_BWC3B_ASID_SIZE 8 -#define OCD_BWC3B_SIZE_START 9 -#define OCD_BWC3B_SIZE_SIZE 3 -#define OCD_BWC3B_EOC_BIT 14 -#define OCD_BWC3B_BWO_START 16 -#define OCD_BWC3B_BWO_SIZE 2 -#define OCD_BWC3B_BME_START 20 -#define OCD_BWC3B_BME_SIZE 4 -#define OCD_BWC3B_BRW_START 28 -#define OCD_BWC3B_BRW_SIZE 2 -#define OCD_BWC3B_BWE_START 30 -#define OCD_BWC3B_BWE_SIZE 2 - -/* Bits in BWA0A */ -#define OCD_BWA0A_BWA_START 0 -#define OCD_BWA0A_BWA_SIZE 32 - -/* Bits in BWA0B */ -#define OCD_BWA0B_BWA_START 0 -#define OCD_BWA0B_BWA_SIZE 32 - -/* Bits in BWA1A */ -#define OCD_BWA1A_BWA_START 0 -#define OCD_BWA1A_BWA_SIZE 32 - -/* Bits in BWA1B */ -#define OCD_BWA1B_BWA_START 0 -#define OCD_BWA1B_BWA_SIZE 32 - -/* Bits in BWA2A */ -#define OCD_BWA2A_BWA_START 0 -#define OCD_BWA2A_BWA_SIZE 32 - -/* Bits in BWA2B */ -#define OCD_BWA2B_BWA_START 0 -#define OCD_BWA2B_BWA_SIZE 32 - -/* Bits in BWA3A */ -#define OCD_BWA3A_BWA_START 0 -#define OCD_BWA3A_BWA_SIZE 32 - -/* Bits in BWA3B */ -#define OCD_BWA3B_BWA_START 0 -#define OCD_BWA3B_BWA_SIZE 32 - -/* Bits in NXCFG */ -#define OCD_NXCFG_NXARCH_START 0 -#define OCD_NXCFG_NXARCH_SIZE 4 -#define OCD_NXCFG_NXOCD_START 4 -#define OCD_NXCFG_NXOCD_SIZE 4 -#define OCD_NXCFG_NXPCB_START 8 -#define OCD_NXCFG_NXPCB_SIZE 4 -#define OCD_NXCFG_NXDB_START 12 -#define OCD_NXCFG_NXDB_SIZE 4 -#define OCD_NXCFG_MXMSEO_BIT 16 -#define OCD_NXCFG_NXMDO_START 17 -#define OCD_NXCFG_NXMDO_SIZE 4 -#define OCD_NXCFG_NXPT_BIT 21 -#define OCD_NXCFG_NXOT_BIT 22 -#define OCD_NXCFG_NXDWT_BIT 23 -#define OCD_NXCFG_NXDRT_BIT 24 -#define OCD_NXCFG_NXDTC_START 25 -#define OCD_NXCFG_NXDTC_SIZE 3 -#define OCD_NXCFG_NXDMA_BIT 28 - -/* Bits in DINST */ -#define OCD_DINST_DINST_START 0 -#define OCD_DINST_DINST_SIZE 32 - -/* Bits in CPUCM */ -#define OCD_CPUCM_BEM_BIT 1 -#define OCD_CPUCM_FEM_BIT 2 -#define OCD_CPUCM_REM_BIT 3 -#define OCD_CPUCM_IBEM_BIT 4 -#define OCD_CPUCM_IEEM_BIT 5 - -/* Bits in DCCPU */ -#define OCD_DCCPU_DATA_START 0 -#define OCD_DCCPU_DATA_SIZE 32 - -/* Bits in DCEMU */ -#define OCD_DCEMU_DATA_START 0 -#define OCD_DCEMU_DATA_SIZE 32 - -/* Bits in DCSR */ -#define OCD_DCSR_CPUD_BIT 0 -#define OCD_DCSR_EMUD_BIT 1 - -/* Bits in PID */ -#define OCD_PID_PROCESS_START 0 -#define OCD_PID_PROCESS_SIZE 32 - -/* Bits in EPC0 */ -#define OCD_EPC0_RNG_START 0 -#define OCD_EPC0_RNG_SIZE 2 -#define OCD_EPC0_CE_BIT 4 -#define OCD_EPC0_ECNT_START 16 -#define OCD_EPC0_ECNT_SIZE 16 - -/* Bits in EPC1 */ -#define OCD_EPC1_RNG_START 0 -#define OCD_EPC1_RNG_SIZE 2 -#define OCD_EPC1_ATB_BIT 5 -#define OCD_EPC1_AM_BIT 6 - -/* Bits in EPC2 */ -#define OCD_EPC2_RNG_START 0 -#define OCD_EPC2_RNG_SIZE 2 -#define OCD_EPC2_DB_START 2 -#define OCD_EPC2_DB_SIZE 2 - -/* Bits in EPC3 */ -#define OCD_EPC3_RNG_START 0 -#define OCD_EPC3_RNG_SIZE 2 -#define OCD_EPC3_DWE_BIT 2 - -/* Bits in AXC */ -#define OCD_AXC_DIV_START 0 -#define OCD_AXC_DIV_SIZE 4 -#define OCD_AXC_AXE_BIT 8 -#define OCD_AXC_AXS_BIT 9 -#define OCD_AXC_DDR_BIT 10 -#define OCD_AXC_LS_BIT 11 -#define OCD_AXC_REX_BIT 12 -#define OCD_AXC_REXTEN_BIT 13 - -/* Constants for DC:EIC */ -#define OCD_EIC_PROGRAM_AND_DATA_TRACE 0 -#define OCD_EIC_BREAKPOINT 1 -#define OCD_EIC_NOP 2 - -/* Constants for DC:OVC */ -#define OCD_OVC_OVERRUN 0 -#define OCD_OVC_DELAY_CPU_BTM 1 -#define OCD_OVC_DELAY_CPU_DTM 2 -#define OCD_OVC_DELAY_CPU_BTM_DTM 3 - -/* Constants for DC:EOS */ -#define OCD_EOS_NOP 0 -#define OCD_EOS_DEBUG_MODE 1 -#define OCD_EOS_BREAKPOINT_WATCHPOINT 2 -#define OCD_EOS_THQ 3 - -/* Constants for RWCS:NTBC */ -#define OCD_NTBC_OVERWRITE 0 -#define OCD_NTBC_DISABLE 1 -#define OCD_NTBC_BREAKPOINT 2 - -/* Constants for RWCS:CCTRL */ -#define OCD_CCTRL_AUTO 0 -#define OCD_CCTRL_CACHED 1 -#define OCD_CCTRL_UNCACHED 2 - -/* Constants for RWCS:SZ */ -#define OCD_SZ_BYTE 0 -#define OCD_SZ_HALFWORD 1 -#define OCD_SZ_WORD 2 - -/* Constants for WT:PTS */ -#define OCD_PTS_DISABLED 0 -#define OCD_PTS_PROGRAM_0B 1 -#define OCD_PTS_PROGRAM_1A 2 -#define OCD_PTS_PROGRAM_1B 3 -#define OCD_PTS_PROGRAM_2A 4 -#define OCD_PTS_PROGRAM_2B 5 -#define OCD_PTS_DATA_3A 6 -#define OCD_PTS_DATA_3B 7 - -/* Constants for DTC:RWT1 */ -#define OCD_RWT1_NO_TRACE 0 -#define OCD_RWT1_DATA_READ 1 -#define OCD_RWT1_DATA_WRITE 2 -#define OCD_RWT1_DATA_READ_WRITE 3 - -/* Constants for DTC:RWT0 */ -#define OCD_RWT0_NO_TRACE 0 -#define OCD_RWT0_DATA_READ 1 -#define OCD_RWT0_DATA_WRITE 2 -#define OCD_RWT0_DATA_READ_WRITE 3 - -/* Constants for BWC0A:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC0B:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC1A:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC1B:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC2A:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC2B:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC3A:SIZE */ -#define OCD_SIZE_BYTE_ACCESS 4 -#define OCD_SIZE_HALFWORD_ACCESS 5 -#define OCD_SIZE_WORD_ACCESS 6 -#define OCD_SIZE_DOUBLE_WORD_ACCESS 7 - -/* Constants for BWC3A:BRW */ -#define OCD_BRW_READ_BREAK 0 -#define OCD_BRW_WRITE_BREAK 1 -#define OCD_BRW_ANY_ACCES_BREAK 2 - -/* Constants for BWC3A:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for BWC3B:SIZE */ -#define OCD_SIZE_BYTE_ACCESS 4 -#define OCD_SIZE_HALFWORD_ACCESS 5 -#define OCD_SIZE_WORD_ACCESS 6 -#define OCD_SIZE_DOUBLE_WORD_ACCESS 7 - -/* Constants for BWC3B:BRW */ -#define OCD_BRW_READ_BREAK 0 -#define OCD_BRW_WRITE_BREAK 1 -#define OCD_BRW_ANY_ACCES_BREAK 2 - -/* Constants for BWC3B:BWE */ -#define OCD_BWE_DISABLED 0 -#define OCD_BWE_BREAKPOINT_ENABLED 1 -#define OCD_BWE_WATCHPOINT_ENABLED 3 - -/* Constants for EPC0:RNG */ -#define OCD_RNG_DISABLED 0 -#define OCD_RNG_EXCLUSIVE 1 -#define OCD_RNG_INCLUSIVE 2 - -/* Constants for EPC1:RNG */ -#define OCD_RNG_DISABLED 0 -#define OCD_RNG_EXCLUSIVE 1 -#define OCD_RNG_INCLUSIVE 2 - -/* Constants for EPC2:RNG */ -#define OCD_RNG_DISABLED 0 -#define OCD_RNG_EXCLUSIVE 1 -#define OCD_RNG_INCLUSIVE 2 - -/* Constants for EPC2:DB */ -#define OCD_DB_DISABLED 0 -#define OCD_DB_CHAINED_B 1 -#define OCD_DB_CHAINED_A 2 -#define OCD_DB_AHAINED_A_AND_B 3 - -/* Constants for EPC3:RNG */ -#define OCD_RNG_DISABLED 0 -#define OCD_RNG_EXCLUSIVE 1 -#define OCD_RNG_INCLUSIVE 2 - -#ifndef __ASSEMBLER__ - -/* Register access macros */ -static inline unsigned long __ocd_read(unsigned int reg) -{ - return __builtin_mfdr(reg); -} - -static inline void __ocd_write(unsigned int reg, unsigned long value) -{ - __builtin_mtdr(reg, value); -} - -#define ocd_read(reg) __ocd_read(OCD_##reg) -#define ocd_write(reg, value) __ocd_write(OCD_##reg, value) - -struct task_struct; - -void ocd_enable(struct task_struct *child); -void ocd_disable(struct task_struct *child); - -#endif /* !__ASSEMBLER__ */ - -#endif /* __ASM_AVR32_OCD_H */ diff --git a/include/asm-avr32/page.h b/include/asm-avr32/page.h deleted file mode 100644 index f805d1c..0000000 --- a/include/asm-avr32/page.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PAGE_H -#define __ASM_AVR32_PAGE_H - -#include - -/* PAGE_SHIFT determines the page size */ -#define PAGE_SHIFT 12 -#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) -#define PTE_MASK PAGE_MASK - -#ifndef __ASSEMBLY__ - -#include - -extern void clear_page(void *to); -extern void copy_page(void *to, void *from); - -#define clear_user_page(page, vaddr, pg) clear_page(page) -#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) - -/* - * These are used to make use of C type-checking.. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct page *pgtable_t; - -#define pte_val(x) ((x).pte) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) }) -#define __pgd(x) ((pgd_t) { (x) }) -#define __pgprot(x) ((pgprot_t) { (x) }) - -/* FIXME: These should be removed soon */ -extern unsigned long memory_start, memory_end; - -/* Pure 2^n version of get_order */ -static inline int get_order(unsigned long size) -{ - unsigned lz; - - size = (size - 1) >> PAGE_SHIFT; - asm("clz %0, %1" : "=r"(lz) : "r"(size)); - return 32 - lz; -} - -#endif /* !__ASSEMBLY__ */ - -/* - * The hardware maps the virtual addresses 0x80000000 -> 0x9fffffff - * permanently to the physical addresses 0x00000000 -> 0x1fffffff when - * segmentation is enabled. We want to make use of this in order to - * minimize TLB pressure. - */ -#define PAGE_OFFSET (0x80000000UL) - -/* - * ALSA uses virt_to_page() on DMA pages, which I'm not entirely sure - * is a good idea. Anyway, we can't simply subtract PAGE_OFFSET here - * in that case, so we'll have to mask out the three most significant - * bits of the address instead... - * - * What's the difference between __pa() and virt_to_phys() anyway? - */ -#define __pa(x) PHYSADDR(x) -#define __va(x) ((void *)(P1SEGADDR(x))) - -#define MAP_NR(addr) (((unsigned long)(addr) - PAGE_OFFSET) >> PAGE_SHIFT) - -#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) - -#ifndef CONFIG_NEED_MULTIPLE_NODES - -#define PHYS_PFN_OFFSET (CONFIG_PHYS_OFFSET >> PAGE_SHIFT) - -#define pfn_to_page(pfn) (mem_map + ((pfn) - PHYS_PFN_OFFSET)) -#define page_to_pfn(page) ((unsigned long)((page) - mem_map) + PHYS_PFN_OFFSET) -#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr)) -#endif /* CONFIG_NEED_MULTIPLE_NODES */ - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -/* - * Memory above this physical address will be considered highmem. - */ -#define HIGHMEM_START 0x20000000UL - -#endif /* __ASM_AVR32_PAGE_H */ diff --git a/include/asm-avr32/param.h b/include/asm-avr32/param.h deleted file mode 100644 index 34bc8d4..0000000 --- a/include/asm-avr32/param.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef __ASM_AVR32_PARAM_H -#define __ASM_AVR32_PARAM_H - -#ifdef __KERNEL__ -# define HZ CONFIG_HZ -# define USER_HZ 100 /* User interfaces are in "ticks" */ -# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ -#endif - -#ifndef HZ -# define HZ 100 -#endif - -/* TODO: Should be configurable */ -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -# define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 - -#endif /* __ASM_AVR32_PARAM_H */ diff --git a/include/asm-avr32/pci.h b/include/asm-avr32/pci.h deleted file mode 100644 index a32a023..0000000 --- a/include/asm-avr32/pci.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef __ASM_AVR32_PCI_H__ -#define __ASM_AVR32_PCI_H__ - -/* We don't support PCI yet, but some drivers require this file anyway */ - -#define PCI_DMA_BUS_IS_PHYS (1) - -#include - -#endif /* __ASM_AVR32_PCI_H__ */ diff --git a/include/asm-avr32/percpu.h b/include/asm-avr32/percpu.h deleted file mode 100644 index 69227b4..0000000 --- a/include/asm-avr32/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_PERCPU_H -#define __ASM_AVR32_PERCPU_H - -#include - -#endif /* __ASM_AVR32_PERCPU_H */ diff --git a/include/asm-avr32/pgalloc.h b/include/asm-avr32/pgalloc.h deleted file mode 100644 index 6408213..0000000 --- a/include/asm-avr32/pgalloc.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PGALLOC_H -#define __ASM_AVR32_PGALLOC_H - -#include -#include -#include - -#define QUICK_PGD 0 /* Preserve kernel mappings over free */ -#define QUICK_PT 1 /* Zero on free */ - -static inline void pmd_populate_kernel(struct mm_struct *mm, - pmd_t *pmd, pte_t *pte) -{ - set_pmd(pmd, __pmd((unsigned long)pte)); -} - -static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, - pgtable_t pte) -{ - set_pmd(pmd, __pmd((unsigned long)page_address(pte))); -} -#define pmd_pgtable(pmd) pmd_page(pmd) - -static inline void pgd_ctor(void *x) -{ - pgd_t *pgd = x; - - memcpy(pgd + USER_PTRS_PER_PGD, - swapper_pg_dir + USER_PTRS_PER_PGD, - (PTRS_PER_PGD - USER_PTRS_PER_PGD) * sizeof(pgd_t)); -} - -/* - * Allocate and free page tables - */ -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(QUICK_PGD, GFP_KERNEL | __GFP_REPEAT, pgd_ctor); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(QUICK_PGD, NULL, pgd); -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) -{ - return quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, - unsigned long address) -{ - struct page *page; - void *pg; - - pg = quicklist_alloc(QUICK_PT, GFP_KERNEL | __GFP_REPEAT, NULL); - if (!pg) - return NULL; - - page = virt_to_page(pg); - pgtable_page_ctor(page); - - return page; -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - quicklist_free(QUICK_PT, NULL, pte); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t pte) -{ - pgtable_page_dtor(pte); - quicklist_free_page(QUICK_PT, NULL, pte); -} - -#define __pte_free_tlb(tlb,pte) \ -do { \ - pgtable_page_dtor(pte); \ - tlb_remove_page((tlb), pte); \ -} while (0) - -static inline void check_pgt_cache(void) -{ - quicklist_trim(QUICK_PGD, NULL, 25, 16); - quicklist_trim(QUICK_PT, NULL, 25, 16); -} - -#endif /* __ASM_AVR32_PGALLOC_H */ diff --git a/include/asm-avr32/pgtable-2level.h b/include/asm-avr32/pgtable-2level.h deleted file mode 100644 index 425dd56..0000000 --- a/include/asm-avr32/pgtable-2level.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PGTABLE_2LEVEL_H -#define __ASM_AVR32_PGTABLE_2LEVEL_H - -#include - -/* - * Traditional 2-level paging structure - */ -#define PGDIR_SHIFT 22 -#define PTRS_PER_PGD 1024 - -#define PTRS_PER_PTE 1024 - -#ifndef __ASSEMBLY__ -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * Certain architectures need to do special things when PTEs - * within a page table are directly modified. Thus, the following - * hook is made available. - */ -#define set_pte(pteptr, pteval) (*(pteptr) = pteval) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep, pteval) - -/* - * (pmds are folded into pgds so this doesn't get actually called, - * but the define is needed for a generic inline function.) - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) - -#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT))) -#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) -#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) - -#endif /* !__ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PGTABLE_2LEVEL_H */ diff --git a/include/asm-avr32/pgtable.h b/include/asm-avr32/pgtable.h deleted file mode 100644 index fecdda1..0000000 --- a/include/asm-avr32/pgtable.h +++ /dev/null @@ -1,377 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PGTABLE_H -#define __ASM_AVR32_PGTABLE_H - -#include - -#ifndef __ASSEMBLY__ -#include - -#endif /* !__ASSEMBLY__ */ - -/* - * Use two-level page tables just as the i386 (without PAE) - */ -#include - -/* - * The following code might need some cleanup when the values are - * final... - */ -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PGDIR_SIZE (1UL << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) - -#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE) -#define FIRST_USER_ADDRESS 0 - -#ifndef __ASSEMBLY__ -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; -extern void paging_init(void); - -/* - * ZERO_PAGE is a global shared page that is always zero: used for - * zero-mapped memory areas etc. - */ -extern struct page *empty_zero_page; -#define ZERO_PAGE(vaddr) (empty_zero_page) - -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8 MiB value just means that there will be a 8 MiB "hole" - * after the uncached physical memory (P2 segment) until the vmalloc - * area starts. That means that any out-of-bounds memory accesses will - * hopefully be caught; we don't know if the end of the P1/P2 segments - * are actually used for anything, but it is anyway safer to let the - * MMU catch these kinds of errors than to rely on the memory bus. - * - * A "hole" of the same size is added to the end of the P3 segment as - * well. It might seem wasteful to use 16 MiB of virtual address space - * on this, but we do have 512 MiB of it... - * - * The vmalloc() routines leave a hole of 4 KiB between each vmalloced - * area for the same reason. - */ -#define VMALLOC_OFFSET (8 * 1024 * 1024) -#define VMALLOC_START (P3SEG + VMALLOC_OFFSET) -#define VMALLOC_END (P4SEG - VMALLOC_OFFSET) -#endif /* !__ASSEMBLY__ */ - -/* - * Page flags. Some of these flags are not directly supported by - * hardware, so we have to emulate them. - */ -#define _TLBEHI_BIT_VALID 9 -#define _TLBEHI_VALID (1 << _TLBEHI_BIT_VALID) - -#define _PAGE_BIT_WT 0 /* W-bit : write-through */ -#define _PAGE_BIT_DIRTY 1 /* D-bit : page changed */ -#define _PAGE_BIT_SZ0 2 /* SZ0-bit : Size of page */ -#define _PAGE_BIT_SZ1 3 /* SZ1-bit : Size of page */ -#define _PAGE_BIT_EXECUTE 4 /* X-bit : execute access allowed */ -#define _PAGE_BIT_RW 5 /* AP0-bit : write access allowed */ -#define _PAGE_BIT_USER 6 /* AP1-bit : user space access allowed */ -#define _PAGE_BIT_BUFFER 7 /* B-bit : bufferable */ -#define _PAGE_BIT_GLOBAL 8 /* G-bit : global (ignore ASID) */ -#define _PAGE_BIT_CACHABLE 9 /* C-bit : cachable */ - -/* If we drop support for 1K pages, we get two extra bits */ -#define _PAGE_BIT_PRESENT 10 -#define _PAGE_BIT_ACCESSED 11 /* software: page was accessed */ - -/* The following flags are only valid when !PRESENT */ -#define _PAGE_BIT_FILE 0 /* software: pagecache or swap? */ - -#define _PAGE_WT (1 << _PAGE_BIT_WT) -#define _PAGE_DIRTY (1 << _PAGE_BIT_DIRTY) -#define _PAGE_EXECUTE (1 << _PAGE_BIT_EXECUTE) -#define _PAGE_RW (1 << _PAGE_BIT_RW) -#define _PAGE_USER (1 << _PAGE_BIT_USER) -#define _PAGE_BUFFER (1 << _PAGE_BIT_BUFFER) -#define _PAGE_GLOBAL (1 << _PAGE_BIT_GLOBAL) -#define _PAGE_CACHABLE (1 << _PAGE_BIT_CACHABLE) - -/* Software flags */ -#define _PAGE_ACCESSED (1 << _PAGE_BIT_ACCESSED) -#define _PAGE_PRESENT (1 << _PAGE_BIT_PRESENT) -#define _PAGE_FILE (1 << _PAGE_BIT_FILE) - -/* - * Page types, i.e. sizes. _PAGE_TYPE_NONE corresponds to what is - * usually called _PAGE_PROTNONE on other architectures. - * - * XXX: Find out if _PAGE_PROTNONE is equivalent with !_PAGE_USER. If - * so, we can encode all possible page sizes (although we can't really - * support 1K pages anyway due to the _PAGE_PRESENT and _PAGE_ACCESSED - * bits) - * - */ -#define _PAGE_TYPE_MASK ((1 << _PAGE_BIT_SZ0) | (1 << _PAGE_BIT_SZ1)) -#define _PAGE_TYPE_NONE (0 << _PAGE_BIT_SZ0) -#define _PAGE_TYPE_SMALL (1 << _PAGE_BIT_SZ0) -#define _PAGE_TYPE_MEDIUM (2 << _PAGE_BIT_SZ0) -#define _PAGE_TYPE_LARGE (3 << _PAGE_BIT_SZ0) - -/* - * Mask which drop software flags. We currently can't handle more than - * 512 MiB of physical memory, so we can use bits 29-31 for other - * stuff. With a fixed 4K page size, we can use bits 10-11 as well as - * bits 2-3 (SZ) - */ -#define _PAGE_FLAGS_HARDWARE_MASK 0xfffff3ff - -#define _PAGE_FLAGS_CACHE_MASK (_PAGE_CACHABLE | _PAGE_BUFFER | _PAGE_WT) - -/* Flags that may be modified by software */ -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY \ - | _PAGE_FLAGS_CACHE_MASK) - -#define _PAGE_FLAGS_READ (_PAGE_CACHABLE | _PAGE_BUFFER) -#define _PAGE_FLAGS_WRITE (_PAGE_FLAGS_READ | _PAGE_RW | _PAGE_DIRTY) - -#define _PAGE_NORMAL(x) __pgprot((x) | _PAGE_PRESENT | _PAGE_TYPE_SMALL \ - | _PAGE_ACCESSED) - -#define PAGE_NONE (_PAGE_ACCESSED | _PAGE_TYPE_NONE) -#define PAGE_READ (_PAGE_FLAGS_READ | _PAGE_USER) -#define PAGE_EXEC (_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_USER) -#define PAGE_WRITE (_PAGE_FLAGS_WRITE | _PAGE_USER) -#define PAGE_KERNEL _PAGE_NORMAL(_PAGE_FLAGS_WRITE | _PAGE_EXECUTE | _PAGE_GLOBAL) -#define PAGE_KERNEL_RO _PAGE_NORMAL(_PAGE_FLAGS_READ | _PAGE_EXECUTE | _PAGE_GLOBAL) - -#define _PAGE_P(x) _PAGE_NORMAL((x) & ~(_PAGE_RW | _PAGE_DIRTY)) -#define _PAGE_S(x) _PAGE_NORMAL(x) - -#define PAGE_COPY _PAGE_P(PAGE_WRITE | PAGE_READ) -#define PAGE_SHARED _PAGE_S(PAGE_WRITE | PAGE_READ) - -#ifndef __ASSEMBLY__ -/* - * The hardware supports flags for write- and execute access. Read is - * always allowed if the page is loaded into the TLB, so the "-w-", - * "--x" and "-wx" mappings are implemented as "rw-", "r-x" and "rwx", - * respectively. - * - * The "---" case is handled by software; the page will simply not be - * loaded into the TLB if the page type is _PAGE_TYPE_NONE. - */ - -#define __P000 __pgprot(PAGE_NONE) -#define __P001 _PAGE_P(PAGE_READ) -#define __P010 _PAGE_P(PAGE_WRITE) -#define __P011 _PAGE_P(PAGE_WRITE | PAGE_READ) -#define __P100 _PAGE_P(PAGE_EXEC) -#define __P101 _PAGE_P(PAGE_EXEC | PAGE_READ) -#define __P110 _PAGE_P(PAGE_EXEC | PAGE_WRITE) -#define __P111 _PAGE_P(PAGE_EXEC | PAGE_WRITE | PAGE_READ) - -#define __S000 __pgprot(PAGE_NONE) -#define __S001 _PAGE_S(PAGE_READ) -#define __S010 _PAGE_S(PAGE_WRITE) -#define __S011 _PAGE_S(PAGE_WRITE | PAGE_READ) -#define __S100 _PAGE_S(PAGE_EXEC) -#define __S101 _PAGE_S(PAGE_EXEC | PAGE_READ) -#define __S110 _PAGE_S(PAGE_EXEC | PAGE_WRITE) -#define __S111 _PAGE_S(PAGE_EXEC | PAGE_WRITE | PAGE_READ) - -#define pte_none(x) (!pte_val(x)) -#define pte_present(x) (pte_val(x) & _PAGE_PRESENT) - -#define pte_clear(mm,addr,xp) \ - do { \ - set_pte_at(mm, addr, xp, __pte(0)); \ - } while (0) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -static inline int pte_write(pte_t pte) -{ - return pte_val(pte) & _PAGE_RW; -} -static inline int pte_dirty(pte_t pte) -{ - return pte_val(pte) & _PAGE_DIRTY; -} -static inline int pte_young(pte_t pte) -{ - return pte_val(pte) & _PAGE_ACCESSED; -} -static inline int pte_special(pte_t pte) -{ - return 0; -} - -/* - * The following only work if pte_present() is not true. - */ -static inline int pte_file(pte_t pte) -{ - return pte_val(pte) & _PAGE_FILE; -} - -/* Mutator functions for PTE bits */ -static inline pte_t pte_wrprotect(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_RW)); - return pte; -} -static inline pte_t pte_mkclean(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_DIRTY)); - return pte; -} -static inline pte_t pte_mkold(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) & ~_PAGE_ACCESSED)); - return pte; -} -static inline pte_t pte_mkwrite(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) | _PAGE_RW)); - return pte; -} -static inline pte_t pte_mkdirty(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) | _PAGE_DIRTY)); - return pte; -} -static inline pte_t pte_mkyoung(pte_t pte) -{ - set_pte(&pte, __pte(pte_val(pte) | _PAGE_ACCESSED)); - return pte; -} -static inline pte_t pte_mkspecial(pte_t pte) -{ - return pte; -} - -#define pmd_none(x) (!pmd_val(x)) -#define pmd_present(x) (pmd_val(x)) - -static inline void pmd_clear(pmd_t *pmdp) -{ - set_pmd(pmdp, __pmd(0)); -} - -#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) - -/* - * Permanent address of a page. We don't support highmem, so this is - * trivial. - */ -#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) -#define pte_page(x) (pfn_to_page(pte_pfn(x))) - -/* - * Mark the prot value as uncacheable and unbufferable - */ -#define pgprot_noncached(prot) \ - __pgprot(pgprot_val(prot) & ~(_PAGE_BUFFER | _PAGE_CACHABLE)) - -/* - * Mark the prot value as uncacheable but bufferable - */ -#define pgprot_writecombine(prot) \ - __pgprot((pgprot_val(prot) & ~_PAGE_CACHABLE) | _PAGE_BUFFER) - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - * - * extern pte_t mk_pte(struct page *page, pgprot_t pgprot) - */ -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) - | pgprot_val(newprot))); - return pte; -} - -#define page_pte(page) page_pte_prot(page, __pgprot(0)) - -#define pmd_page_vaddr(pmd) pmd_val(pmd) -#define pmd_page(pmd) (virt_to_page(pmd_val(pmd))) - -/* to find an entry in a page-table-directory. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) \ - & (PTRS_PER_PGD - 1)) -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the third-level page table.. */ -#define pte_index(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) -#define pte_offset(dir, address) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) -#define pte_offset_kernel(dir, address) \ - ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address)) -#define pte_offset_map(dir, address) pte_offset_kernel(dir, address) -#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address) -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -struct vm_area_struct; -extern void update_mmu_cache(struct vm_area_struct * vma, - unsigned long address, pte_t pte); - -/* - * Encode and decode a swap entry - * - * Constraints: - * _PAGE_FILE at bit 0 - * _PAGE_TYPE_* at bits 2-3 (for emulating _PAGE_PROTNONE) - * _PAGE_PRESENT at bit 10 - * - * We encode the type into bits 4-9 and offset into bits 11-31. This - * gives us a 21 bits offset, or 2**21 * 4K = 8G usable swap space per - * device, and 64 possible types. - * - * NOTE: We should set ZEROs at the position of _PAGE_PRESENT - * and _PAGE_PROTNONE bits - */ -#define __swp_type(x) (((x).val >> 4) & 0x3f) -#define __swp_offset(x) ((x).val >> 11) -#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 4) | ((offset) << 11) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* - * Encode and decode a nonlinear file mapping entry. We have to - * preserve _PAGE_FILE and _PAGE_PRESENT here. _PAGE_TYPE_* isn't - * necessary, since _PAGE_FILE implies !_PAGE_PROTNONE (?) - */ -#define PTE_FILE_MAX_BITS 30 -#define pte_to_pgoff(pte) (((pte_val(pte) >> 1) & 0x1ff) \ - | ((pte_val(pte) >> 11) << 9)) -#define pgoff_to_pte(off) ((pte_t) { ((((off) & 0x1ff) << 1) \ - | (((off) >> 9) << 11) \ - | _PAGE_FILE) }) - -typedef pte_t *pte_addr_t; - -#define kern_addr_valid(addr) (1) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - -/* No page table caches to initialize (?) */ -#define pgtable_cache_init() do { } while(0) - -#include - -#endif /* !__ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PGTABLE_H */ diff --git a/include/asm-avr32/poll.h b/include/asm-avr32/poll.h deleted file mode 100644 index c98509d..0000000 --- a/include/asm-avr32/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-avr32/posix_types.h b/include/asm-avr32/posix_types.h deleted file mode 100644 index fe0c0c0..0000000 --- a/include/asm-avr32/posix_types.h +++ /dev/null @@ -1,125 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_POSIX_TYPES_H -#define __ASM_AVR32_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_nlink_t; -typedef long __kernel_off_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; -typedef int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_timer_t; -typedef int __kernel_clockid_t; -typedef int __kernel_daddr_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] |= (1UL<<__rem); -} - -#undef __FD_CLR -static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem); -} - - -#undef __FD_ISSET -static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ - unsigned long __tmp = __fd / __NFDBITS; - unsigned long __rem = __fd % __NFDBITS; - return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant case (8 ints, - * for a 256-bit fd_set) - */ -#undef __FD_ZERO -static __inline__ void __FD_ZERO(__kernel_fd_set *__p) -{ - unsigned long *__tmp = __p->fds_bits; - int __i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 16: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - __tmp[ 8] = 0; __tmp[ 9] = 0; - __tmp[10] = 0; __tmp[11] = 0; - __tmp[12] = 0; __tmp[13] = 0; - __tmp[14] = 0; __tmp[15] = 0; - return; - - case 8: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - __tmp[ 4] = 0; __tmp[ 5] = 0; - __tmp[ 6] = 0; __tmp[ 7] = 0; - return; - - case 4: - __tmp[ 0] = 0; __tmp[ 1] = 0; - __tmp[ 2] = 0; __tmp[ 3] = 0; - return; - } - } - __i = __FDSET_LONGS; - while (__i) { - __i--; - *__tmp = 0; - __tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* __ASM_AVR32_POSIX_TYPES_H */ diff --git a/include/asm-avr32/processor.h b/include/asm-avr32/processor.h deleted file mode 100644 index 49a88f5..0000000 --- a/include/asm-avr32/processor.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PROCESSOR_H -#define __ASM_AVR32_PROCESSOR_H - -#include -#include - -#define TASK_SIZE 0x80000000 - -#ifdef __KERNEL__ -#define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP -#endif - -#ifndef __ASSEMBLY__ - -static inline void *current_text_addr(void) -{ - register void *pc asm("pc"); - return pc; -} - -enum arch_type { - ARCH_AVR32A, - ARCH_AVR32B, - ARCH_MAX -}; - -enum cpu_type { - CPU_MORGAN, - CPU_AT32AP, - CPU_MAX -}; - -enum tlb_config { - TLB_NONE, - TLB_SPLIT, - TLB_UNIFIED, - TLB_INVALID -}; - -#define AVR32_FEATURE_RMW (1 << 0) -#define AVR32_FEATURE_DSP (1 << 1) -#define AVR32_FEATURE_SIMD (1 << 2) -#define AVR32_FEATURE_OCD (1 << 3) -#define AVR32_FEATURE_PCTR (1 << 4) -#define AVR32_FEATURE_JAVA (1 << 5) -#define AVR32_FEATURE_FPU (1 << 6) - -struct avr32_cpuinfo { - struct clk *clk; - unsigned long loops_per_jiffy; - enum arch_type arch_type; - enum cpu_type cpu_type; - unsigned short arch_revision; - unsigned short cpu_revision; - enum tlb_config tlb_config; - unsigned long features; - u32 device_id; - - struct cache_info icache; - struct cache_info dcache; -}; - -static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu) -{ - return (cpu->device_id >> 1) & 0x7f; -} -static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu) -{ - return (cpu->device_id >> 12) & 0xffff; -} -static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu) -{ - return (cpu->device_id >> 28) & 0x0f; -} - -extern struct avr32_cpuinfo boot_cpu_data; - -#ifdef CONFIG_SMP -extern struct avr32_cpuinfo cpu_data[]; -#define current_cpu_data cpu_data[smp_processor_id()] -#else -#define cpu_data (&boot_cpu_data) -#define current_cpu_data boot_cpu_data -#endif - -/* This decides where the kernel will search for a free chunk of vm - * space during mmap's - */ -#define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3)) - -#define cpu_relax() barrier() -#define cpu_sync_pipeline() asm volatile("sub pc, -2" : : : "memory") - -struct cpu_context { - unsigned long sr; - unsigned long pc; - unsigned long ksp; /* Kernel stack pointer */ - unsigned long r7; - unsigned long r6; - unsigned long r5; - unsigned long r4; - unsigned long r3; - unsigned long r2; - unsigned long r1; - unsigned long r0; -}; - -/* This struct contains the CPU context as stored by switch_to() */ -struct thread_struct { - struct cpu_context cpu_context; - unsigned long single_step_addr; - u16 single_step_insn; -}; - -#define INIT_THREAD { \ - .cpu_context = { \ - .ksp = sizeof(init_stack) + (long)&init_stack, \ - }, \ -} - -/* - * Do necessary setup to start up a newly executed thread. - */ -#define start_thread(regs, new_pc, new_sp) \ - do { \ - set_fs(USER_DS); \ - memset(regs, 0, sizeof(*regs)); \ - regs->sr = MODE_USER; \ - regs->pc = new_pc & ~1; \ - regs->sp = new_sp; \ - } while(0) - -struct task_struct; - -/* Free all resources held by a thread */ -extern void release_thread(struct task_struct *); - -/* Create a kernel thread without removing it from tasklists */ -extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while(0) - -/* Return saved PC of a blocked thread */ -#define thread_saved_pc(tsk) ((tsk)->thread.cpu_context.pc) - -struct pt_regs; -extern unsigned long get_wchan(struct task_struct *p); -extern void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl); -extern void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp, - struct pt_regs *regs, const char *log_lvl); - -#define task_pt_regs(p) \ - ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1) - -#define KSTK_EIP(tsk) ((tsk)->thread.cpu_context.pc) -#define KSTK_ESP(tsk) ((tsk)->thread.cpu_context.ksp) - -#define ARCH_HAS_PREFETCH - -static inline void prefetch(const void *x) -{ - const char *c = x; - asm volatile("pref %0" : : "r"(c)); -} -#define PREFETCH_STRIDE L1_CACHE_BYTES - -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PROCESSOR_H */ diff --git a/include/asm-avr32/ptrace.h b/include/asm-avr32/ptrace.h deleted file mode 100644 index 9e2d44f..0000000 --- a/include/asm-avr32/ptrace.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_PTRACE_H -#define __ASM_AVR32_PTRACE_H - -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 - -/* - * Status Register bits - */ -#define SR_H 0x20000000 -#define SR_J 0x10000000 -#define SR_DM 0x08000000 -#define SR_D 0x04000000 -#define MODE_NMI 0x01c00000 -#define MODE_EXCEPTION 0x01800000 -#define MODE_INT3 0x01400000 -#define MODE_INT2 0x01000000 -#define MODE_INT1 0x00c00000 -#define MODE_INT0 0x00800000 -#define MODE_SUPERVISOR 0x00400000 -#define MODE_USER 0x00000000 -#define MODE_MASK 0x01c00000 -#define SR_EM 0x00200000 -#define SR_I3M 0x00100000 -#define SR_I2M 0x00080000 -#define SR_I1M 0x00040000 -#define SR_I0M 0x00020000 -#define SR_GM 0x00010000 - -#define SR_H_BIT 29 -#define SR_J_BIT 28 -#define SR_DM_BIT 27 -#define SR_D_BIT 26 -#define MODE_SHIFT 22 -#define SR_EM_BIT 21 -#define SR_I3M_BIT 20 -#define SR_I2M_BIT 19 -#define SR_I1M_BIT 18 -#define SR_I0M_BIT 17 -#define SR_GM_BIT 16 - -/* The user-visible part */ -#define SR_L 0x00000020 -#define SR_Q 0x00000010 -#define SR_V 0x00000008 -#define SR_N 0x00000004 -#define SR_Z 0x00000002 -#define SR_C 0x00000001 - -#define SR_L_BIT 5 -#define SR_Q_BIT 4 -#define SR_V_BIT 3 -#define SR_N_BIT 2 -#define SR_Z_BIT 1 -#define SR_C_BIT 0 - -/* - * The order is defined by the stmts instruction. r0 is stored first, - * so it gets the highest address. - * - * Registers 0-12 are general-purpose registers (r12 is normally used for - * the function return value). - * Register 13 is the stack pointer - * Register 14 is the link register - * Register 15 is the program counter (retrieved from the RAR sysreg) - */ -#define FRAME_SIZE_FULL 72 -#define REG_R12_ORIG 68 -#define REG_R0 64 -#define REG_R1 60 -#define REG_R2 56 -#define REG_R3 52 -#define REG_R4 48 -#define REG_R5 44 -#define REG_R6 40 -#define REG_R7 36 -#define REG_R8 32 -#define REG_R9 28 -#define REG_R10 24 -#define REG_R11 20 -#define REG_R12 16 -#define REG_SP 12 -#define REG_LR 8 - -#define FRAME_SIZE_MIN 8 -#define REG_PC 4 -#define REG_SR 0 - -#ifndef __ASSEMBLY__ -struct pt_regs { - /* These are always saved */ - unsigned long sr; - unsigned long pc; - - /* These are sometimes saved */ - unsigned long lr; - unsigned long sp; - unsigned long r12; - unsigned long r11; - unsigned long r10; - unsigned long r9; - unsigned long r8; - unsigned long r7; - unsigned long r6; - unsigned long r5; - unsigned long r4; - unsigned long r3; - unsigned long r2; - unsigned long r1; - unsigned long r0; - - /* Only saved on system call */ - unsigned long r12_orig; -}; - -#ifdef __KERNEL__ - -#include - -#define arch_ptrace_attach(child) ocd_enable(child) - -#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) -#define instruction_pointer(regs) ((regs)->pc) -#define profile_pc(regs) instruction_pointer(regs) - -extern void show_regs (struct pt_regs *); - -static __inline__ int valid_user_regs(struct pt_regs *regs) -{ - /* - * Some of the Java bits might be acceptable if/when we - * implement some support for that stuff... - */ - if ((regs->sr & 0xffff0000) == 0) - return 1; - - /* - * Force status register flags to be sane and report this - * illegal behaviour... - */ - regs->sr &= 0x0000ffff; - return 0; -} - - -#endif /* __KERNEL__ */ - -#endif /* ! __ASSEMBLY__ */ - -#endif /* __ASM_AVR32_PTRACE_H */ diff --git a/include/asm-avr32/resource.h b/include/asm-avr32/resource.h deleted file mode 100644 index c6dd101..0000000 --- a/include/asm-avr32/resource.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_RESOURCE_H -#define __ASM_AVR32_RESOURCE_H - -#include - -#endif /* __ASM_AVR32_RESOURCE_H */ diff --git a/include/asm-avr32/scatterlist.h b/include/asm-avr32/scatterlist.h deleted file mode 100644 index 377320e..0000000 --- a/include/asm-avr32/scatterlist.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef __ASM_AVR32_SCATTERLIST_H -#define __ASM_AVR32_SCATTERLIST_H - -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - dma_addr_t dma_address; - unsigned int length; -}; - -/* These macros should be used after a pci_map_sg call has been done - * to get bus addresses of each of the SG entries and their lengths. - * You should only work with the number of sg entries pci_map_sg - * returns. - */ -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#define ISA_DMA_THRESHOLD (0xffffffff) - -#endif /* __ASM_AVR32_SCATTERLIST_H */ diff --git a/include/asm-avr32/sections.h b/include/asm-avr32/sections.h deleted file mode 100644 index aa14252..0000000 --- a/include/asm-avr32/sections.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_SECTIONS_H -#define __ASM_AVR32_SECTIONS_H - -#include - -#endif /* __ASM_AVR32_SECTIONS_H */ diff --git a/include/asm-avr32/sembuf.h b/include/asm-avr32/sembuf.h deleted file mode 100644 index e472216..0000000 --- a/include/asm-avr32/sembuf.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef __ASM_AVR32_SEMBUF_H -#define __ASM_AVR32_SEMBUF_H - -/* -* The semid64_ds structure for AVR32 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct semid64_ds { - struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ - __kernel_time_t sem_otime; /* last semop time */ - unsigned long __unused1; - __kernel_time_t sem_ctime; /* last change time */ - unsigned long __unused2; - unsigned long sem_nsems; /* no. of semaphores in array */ - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_AVR32_SEMBUF_H */ diff --git a/include/asm-avr32/serial.h b/include/asm-avr32/serial.h deleted file mode 100644 index 5ecaebc..0000000 --- a/include/asm-avr32/serial.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _ASM_SERIAL_H -#define _ASM_SERIAL_H - -/* - * This assumes you have a 1.8432 MHz clock for your UART. - * - * It'd be nice if someone built a serial card with a 24.576 MHz - * clock, since the 16550A is capable of handling a top speed of 1.5 - * megabits/second; but this requires the faster clock. - */ -#define BASE_BAUD (1843200 / 16) - -#endif /* _ASM_SERIAL_H */ diff --git a/include/asm-avr32/setup.h b/include/asm-avr32/setup.h deleted file mode 100644 index ff5b7cf..0000000 --- a/include/asm-avr32/setup.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * Based on linux/include/asm-arm/setup.h - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_SETUP_H__ -#define __ASM_AVR32_SETUP_H__ - -#define COMMAND_LINE_SIZE 256 - -#ifdef __KERNEL__ - -/* Magic number indicating that a tag table is present */ -#define ATAG_MAGIC 0xa2a25441 - -#ifndef __ASSEMBLY__ - -/* - * Generic memory range, used by several tags. - * - * addr is always physical. - * size is measured in bytes. - * next is for use by the OS, e.g. for grouping regions into - * linked lists. - */ -struct tag_mem_range { - u32 addr; - u32 size; - struct tag_mem_range * next; -}; - -/* The list ends with an ATAG_NONE node. */ -#define ATAG_NONE 0x00000000 - -struct tag_header { - u32 size; - u32 tag; -}; - -/* The list must start with an ATAG_CORE node */ -#define ATAG_CORE 0x54410001 - -struct tag_core { - u32 flags; - u32 pagesize; - u32 rootdev; -}; - -/* it is allowed to have multiple ATAG_MEM nodes */ -#define ATAG_MEM 0x54410002 -/* ATAG_MEM uses tag_mem_range */ - -/* command line: \0 terminated string */ -#define ATAG_CMDLINE 0x54410003 - -struct tag_cmdline { - char cmdline[1]; /* this is the minimum size */ -}; - -/* Ramdisk image (may be compressed) */ -#define ATAG_RDIMG 0x54410004 -/* ATAG_RDIMG uses tag_mem_range */ - -/* Information about various clocks present in the system */ -#define ATAG_CLOCK 0x54410005 - -struct tag_clock { - u32 clock_id; /* Which clock are we talking about? */ - u32 clock_flags; /* Special features */ - u64 clock_hz; /* Clock speed in Hz */ -}; - -/* The clock types we know about */ -#define CLOCK_BOOTCPU 0 - -/* Memory reserved for the system (e.g. the bootloader) */ -#define ATAG_RSVD_MEM 0x54410006 -/* ATAG_RSVD_MEM uses tag_mem_range */ - -/* Ethernet information */ - -#define ATAG_ETHERNET 0x54410007 - -struct tag_ethernet { - u8 mac_index; - u8 mii_phy_addr; - u8 hw_address[6]; -}; - -#define ETH_INVALID_PHY 0xff - -struct tag { - struct tag_header hdr; - union { - struct tag_core core; - struct tag_mem_range mem_range; - struct tag_cmdline cmdline; - struct tag_clock clock; - struct tag_ethernet ethernet; - } u; -}; - -struct tagtable { - u32 tag; - int (*parse)(struct tag *); -}; - -#define __tag __used __attribute__((__section__(".taglist.init"))) -#define __tagtable(tag, fn) \ - static struct tagtable __tagtable_##fn __tag = { tag, fn } - -#define tag_member_present(tag,member) \ - ((unsigned long)(&((struct tag *)0L)->member + 1) \ - <= (tag)->hdr.size * 4) - -#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) -#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) - -#define for_each_tag(t,base) \ - for (t = base; t->hdr.size; t = tag_next(t)) - -extern struct tag *bootloader_tags; - -extern resource_size_t fbmem_start; -extern resource_size_t fbmem_size; - -void setup_processor(void); - -#endif /* !__ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* __ASM_AVR32_SETUP_H__ */ diff --git a/include/asm-avr32/shmbuf.h b/include/asm-avr32/shmbuf.h deleted file mode 100644 index c62fba4..0000000 --- a/include/asm-avr32/shmbuf.h +++ /dev/null @@ -1,42 +0,0 @@ -#ifndef __ASM_AVR32_SHMBUF_H -#define __ASM_AVR32_SHMBUF_H - -/* - * The shmid64_ds structure for i386 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 64-bit time_t to solve y2038 problem - * - 2 miscellaneous 32-bit values - */ - -struct shmid64_ds { - struct ipc64_perm shm_perm; /* operation perms */ - size_t shm_segsz; /* size of segment (bytes) */ - __kernel_time_t shm_atime; /* last attach time */ - unsigned long __unused1; - __kernel_time_t shm_dtime; /* last detach time */ - unsigned long __unused2; - __kernel_time_t shm_ctime; /* last change time */ - unsigned long __unused3; - __kernel_pid_t shm_cpid; /* pid of creator */ - __kernel_pid_t shm_lpid; /* pid of last operator */ - unsigned long shm_nattch; /* no. of current attaches */ - unsigned long __unused4; - unsigned long __unused5; -}; - -struct shminfo64 { - unsigned long shmmax; - unsigned long shmmin; - unsigned long shmmni; - unsigned long shmseg; - unsigned long shmall; - unsigned long __unused1; - unsigned long __unused2; - unsigned long __unused3; - unsigned long __unused4; -}; - -#endif /* __ASM_AVR32_SHMBUF_H */ diff --git a/include/asm-avr32/shmparam.h b/include/asm-avr32/shmparam.h deleted file mode 100644 index 3681266..0000000 --- a/include/asm-avr32/shmparam.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_SHMPARAM_H -#define __ASM_AVR32_SHMPARAM_H - -#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ - -#endif /* __ASM_AVR32_SHMPARAM_H */ diff --git a/include/asm-avr32/sigcontext.h b/include/asm-avr32/sigcontext.h deleted file mode 100644 index e04062b..0000000 --- a/include/asm-avr32/sigcontext.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_SIGCONTEXT_H -#define __ASM_AVR32_SIGCONTEXT_H - -struct sigcontext { - unsigned long oldmask; - - /* CPU registers */ - unsigned long sr; - unsigned long pc; - unsigned long lr; - unsigned long sp; - unsigned long r12; - unsigned long r11; - unsigned long r10; - unsigned long r9; - unsigned long r8; - unsigned long r7; - unsigned long r6; - unsigned long r5; - unsigned long r4; - unsigned long r3; - unsigned long r2; - unsigned long r1; - unsigned long r0; -}; - -#endif /* __ASM_AVR32_SIGCONTEXT_H */ diff --git a/include/asm-avr32/siginfo.h b/include/asm-avr32/siginfo.h deleted file mode 100644 index 5ee93f4..0000000 --- a/include/asm-avr32/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _AVR32_SIGINFO_H -#define _AVR32_SIGINFO_H - -#include - -#endif diff --git a/include/asm-avr32/signal.h b/include/asm-avr32/signal.h deleted file mode 100644 index caffefe..0000000 --- a/include/asm-avr32/signal.h +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_SIGNAL_H -#define __ASM_AVR32_SIGNAL_H - -#include - -/* Avoid too many header ordering problems. */ -struct siginfo; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX (_NSIG-1) - -/* - * SA_FLAGS values: - * - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_SIGINFO deliver the signal with SIGINFO structs - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NODEFER prevents the current signal from being masked in the handler. - * SA_RESETHAND clears the handler when the signal is delivered. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_RESTORER 0x04000000 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -#ifdef __KERNEL__ -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - __sigrestore_t sa_restorer; -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - -#include -#undef __HAVE_ARCH_SIG_BITOPS - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* __KERNEL__ */ - -#endif diff --git a/include/asm-avr32/socket.h b/include/asm-avr32/socket.h deleted file mode 100644 index 35863f2..0000000 --- a/include/asm-avr32/socket.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef __ASM_AVR32_SOCKET_H -#define __ASM_AVR32_SOCKET_H - -#include - -/* For setsockopt(2) */ -#define SOL_SOCKET 1 - -#define SO_DEBUG 1 -#define SO_REUSEADDR 2 -#define SO_TYPE 3 -#define SO_ERROR 4 -#define SO_DONTROUTE 5 -#define SO_BROADCAST 6 -#define SO_SNDBUF 7 -#define SO_RCVBUF 8 -#define SO_SNDBUFFORCE 32 -#define SO_RCVBUFFORCE 33 -#define SO_KEEPALIVE 9 -#define SO_OOBINLINE 10 -#define SO_NO_CHECK 11 -#define SO_PRIORITY 12 -#define SO_LINGER 13 -#define SO_BSDCOMPAT 14 -/* To add :#define SO_REUSEPORT 15 */ -#define SO_PASSCRED 16 -#define SO_PEERCRED 17 -#define SO_RCVLOWAT 18 -#define SO_SNDLOWAT 19 -#define SO_RCVTIMEO 20 -#define SO_SNDTIMEO 21 - -/* Security levels - as per NRL IPv6 - don't actually do anything */ -#define SO_SECURITY_AUTHENTICATION 22 -#define SO_SECURITY_ENCRYPTION_TRANSPORT 23 -#define SO_SECURITY_ENCRYPTION_NETWORK 24 - -#define SO_BINDTODEVICE 25 - -/* Socket filtering */ -#define SO_ATTACH_FILTER 26 -#define SO_DETACH_FILTER 27 - -#define SO_PEERNAME 28 -#define SO_TIMESTAMP 29 -#define SCM_TIMESTAMP SO_TIMESTAMP - -#define SO_ACCEPTCONN 30 - -#define SO_PEERSEC 31 -#define SO_PASSSEC 34 -#define SO_TIMESTAMPNS 35 -#define SCM_TIMESTAMPNS SO_TIMESTAMPNS - -#define SO_MARK 36 - -#endif /* __ASM_AVR32_SOCKET_H */ diff --git a/include/asm-avr32/sockios.h b/include/asm-avr32/sockios.h deleted file mode 100644 index 0802d74..0000000 --- a/include/asm-avr32/sockios.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_AVR32_SOCKIOS_H -#define __ASM_AVR32_SOCKIOS_H - -/* Socket-level I/O control calls. */ -#define FIOSETOWN 0x8901 -#define SIOCSPGRP 0x8902 -#define FIOGETOWN 0x8903 -#define SIOCGPGRP 0x8904 -#define SIOCATMARK 0x8905 -#define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ -#define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ - -#endif /* __ASM_AVR32_SOCKIOS_H */ diff --git a/include/asm-avr32/stat.h b/include/asm-avr32/stat.h deleted file mode 100644 index e72881e..0000000 --- a/include/asm-avr32/stat.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_STAT_H -#define __ASM_AVR32_STAT_H - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -struct stat { - unsigned long st_dev; - unsigned long st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned long st_rdev; - unsigned long st_size; - unsigned long st_blksize; - unsigned long st_blocks; - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - unsigned long __unused4; - unsigned long __unused5; -}; - -#define STAT_HAVE_NSEC 1 - -struct stat64 { - unsigned long long st_dev; - - unsigned long long st_ino; - unsigned int st_mode; - unsigned int st_nlink; - - unsigned long st_uid; - unsigned long st_gid; - - unsigned long long st_rdev; - - long long st_size; - unsigned long __pad1; /* align 64-bit st_blocks */ - unsigned long st_blksize; - - unsigned long long st_blocks; /* Number 512-byte blocks allocated. */ - - unsigned long st_atime; - unsigned long st_atime_nsec; - - unsigned long st_mtime; - unsigned long st_mtime_nsec; - - unsigned long st_ctime; - unsigned long st_ctime_nsec; - - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* __ASM_AVR32_STAT_H */ diff --git a/include/asm-avr32/statfs.h b/include/asm-avr32/statfs.h deleted file mode 100644 index 2961bd1..0000000 --- a/include/asm-avr32/statfs.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_STATFS_H -#define __ASM_AVR32_STATFS_H - -#include - -#endif /* __ASM_AVR32_STATFS_H */ diff --git a/include/asm-avr32/string.h b/include/asm-avr32/string.h deleted file mode 100644 index c91a623..0000000 --- a/include/asm-avr32/string.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_STRING_H -#define __ASM_AVR32_STRING_H - -#define __HAVE_ARCH_MEMSET -extern void *memset(void *b, int c, size_t len); - -#define __HAVE_ARCH_MEMCPY -extern void *memcpy(void *to, const void *from, size_t len); - -#endif /* __ASM_AVR32_STRING_H */ diff --git a/include/asm-avr32/sysreg.h b/include/asm-avr32/sysreg.h deleted file mode 100644 index d4e0950..0000000 --- a/include/asm-avr32/sysreg.h +++ /dev/null @@ -1,291 +0,0 @@ -/* - * AVR32 System Registers - * - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_SYSREG_H -#define __ASM_AVR32_SYSREG_H - -/* sysreg register offsets */ -#define SYSREG_SR 0x0000 -#define SYSREG_EVBA 0x0004 -#define SYSREG_ACBA 0x0008 -#define SYSREG_CPUCR 0x000c -#define SYSREG_ECR 0x0010 -#define SYSREG_RSR_SUP 0x0014 -#define SYSREG_RSR_INT0 0x0018 -#define SYSREG_RSR_INT1 0x001c -#define SYSREG_RSR_INT2 0x0020 -#define SYSREG_RSR_INT3 0x0024 -#define SYSREG_RSR_EX 0x0028 -#define SYSREG_RSR_NMI 0x002c -#define SYSREG_RSR_DBG 0x0030 -#define SYSREG_RAR_SUP 0x0034 -#define SYSREG_RAR_INT0 0x0038 -#define SYSREG_RAR_INT1 0x003c -#define SYSREG_RAR_INT2 0x0040 -#define SYSREG_RAR_INT3 0x0044 -#define SYSREG_RAR_EX 0x0048 -#define SYSREG_RAR_NMI 0x004c -#define SYSREG_RAR_DBG 0x0050 -#define SYSREG_JECR 0x0054 -#define SYSREG_JOSP 0x0058 -#define SYSREG_JAVA_LV0 0x005c -#define SYSREG_JAVA_LV1 0x0060 -#define SYSREG_JAVA_LV2 0x0064 -#define SYSREG_JAVA_LV3 0x0068 -#define SYSREG_JAVA_LV4 0x006c -#define SYSREG_JAVA_LV5 0x0070 -#define SYSREG_JAVA_LV6 0x0074 -#define SYSREG_JAVA_LV7 0x0078 -#define SYSREG_JTBA 0x007c -#define SYSREG_JBCR 0x0080 -#define SYSREG_CONFIG0 0x0100 -#define SYSREG_CONFIG1 0x0104 -#define SYSREG_COUNT 0x0108 -#define SYSREG_COMPARE 0x010c -#define SYSREG_TLBEHI 0x0110 -#define SYSREG_TLBELO 0x0114 -#define SYSREG_PTBR 0x0118 -#define SYSREG_TLBEAR 0x011c -#define SYSREG_MMUCR 0x0120 -#define SYSREG_TLBARLO 0x0124 -#define SYSREG_TLBARHI 0x0128 -#define SYSREG_PCCNT 0x012c -#define SYSREG_PCNT0 0x0130 -#define SYSREG_PCNT1 0x0134 -#define SYSREG_PCCR 0x0138 -#define SYSREG_BEAR 0x013c -#define SYSREG_SABAL 0x0300 -#define SYSREG_SABAH 0x0304 -#define SYSREG_SABD 0x0308 - -/* Bitfields in SR */ -#define SYSREG_SR_C_OFFSET 0 -#define SYSREG_SR_C_SIZE 1 -#define SYSREG_Z_OFFSET 1 -#define SYSREG_Z_SIZE 1 -#define SYSREG_SR_N_OFFSET 2 -#define SYSREG_SR_N_SIZE 1 -#define SYSREG_SR_V_OFFSET 3 -#define SYSREG_SR_V_SIZE 1 -#define SYSREG_Q_OFFSET 4 -#define SYSREG_Q_SIZE 1 -#define SYSREG_L_OFFSET 5 -#define SYSREG_L_SIZE 1 -#define SYSREG_T_OFFSET 14 -#define SYSREG_T_SIZE 1 -#define SYSREG_SR_R_OFFSET 15 -#define SYSREG_SR_R_SIZE 1 -#define SYSREG_GM_OFFSET 16 -#define SYSREG_GM_SIZE 1 -#define SYSREG_I0M_OFFSET 17 -#define SYSREG_I0M_SIZE 1 -#define SYSREG_I1M_OFFSET 18 -#define SYSREG_I1M_SIZE 1 -#define SYSREG_I2M_OFFSET 19 -#define SYSREG_I2M_SIZE 1 -#define SYSREG_I3M_OFFSET 20 -#define SYSREG_I3M_SIZE 1 -#define SYSREG_EM_OFFSET 21 -#define SYSREG_EM_SIZE 1 -#define SYSREG_MODE_OFFSET 22 -#define SYSREG_MODE_SIZE 3 -#define SYSREG_M0_OFFSET 22 -#define SYSREG_M0_SIZE 1 -#define SYSREG_M1_OFFSET 23 -#define SYSREG_M1_SIZE 1 -#define SYSREG_M2_OFFSET 24 -#define SYSREG_M2_SIZE 1 -#define SYSREG_SR_D_OFFSET 26 -#define SYSREG_SR_D_SIZE 1 -#define SYSREG_DM_OFFSET 27 -#define SYSREG_DM_SIZE 1 -#define SYSREG_SR_J_OFFSET 28 -#define SYSREG_SR_J_SIZE 1 -#define SYSREG_H_OFFSET 29 -#define SYSREG_H_SIZE 1 - -/* Bitfields in CPUCR */ -#define SYSREG_BI_OFFSET 0 -#define SYSREG_BI_SIZE 1 -#define SYSREG_BE_OFFSET 1 -#define SYSREG_BE_SIZE 1 -#define SYSREG_FE_OFFSET 2 -#define SYSREG_FE_SIZE 1 -#define SYSREG_RE_OFFSET 3 -#define SYSREG_RE_SIZE 1 -#define SYSREG_IBE_OFFSET 4 -#define SYSREG_IBE_SIZE 1 -#define SYSREG_IEE_OFFSET 5 -#define SYSREG_IEE_SIZE 1 - -/* Bitfields in CONFIG0 */ -#define SYSREG_CONFIG0_R_OFFSET 0 -#define SYSREG_CONFIG0_R_SIZE 1 -#define SYSREG_CONFIG0_D_OFFSET 1 -#define SYSREG_CONFIG0_D_SIZE 1 -#define SYSREG_CONFIG0_S_OFFSET 2 -#define SYSREG_CONFIG0_S_SIZE 1 -#define SYSREG_CONFIG0_O_OFFSET 3 -#define SYSREG_CONFIG0_O_SIZE 1 -#define SYSREG_CONFIG0_P_OFFSET 4 -#define SYSREG_CONFIG0_P_SIZE 1 -#define SYSREG_CONFIG0_J_OFFSET 5 -#define SYSREG_CONFIG0_J_SIZE 1 -#define SYSREG_CONFIG0_F_OFFSET 6 -#define SYSREG_CONFIG0_F_SIZE 1 -#define SYSREG_MMUT_OFFSET 7 -#define SYSREG_MMUT_SIZE 3 -#define SYSREG_AR_OFFSET 10 -#define SYSREG_AR_SIZE 3 -#define SYSREG_AT_OFFSET 13 -#define SYSREG_AT_SIZE 3 -#define SYSREG_PROCESSORREVISION_OFFSET 16 -#define SYSREG_PROCESSORREVISION_SIZE 8 -#define SYSREG_PROCESSORID_OFFSET 24 -#define SYSREG_PROCESSORID_SIZE 8 - -/* Bitfields in CONFIG1 */ -#define SYSREG_DASS_OFFSET 0 -#define SYSREG_DASS_SIZE 3 -#define SYSREG_DLSZ_OFFSET 3 -#define SYSREG_DLSZ_SIZE 3 -#define SYSREG_DSET_OFFSET 6 -#define SYSREG_DSET_SIZE 4 -#define SYSREG_IASS_OFFSET 10 -#define SYSREG_IASS_SIZE 3 -#define SYSREG_ILSZ_OFFSET 13 -#define SYSREG_ILSZ_SIZE 3 -#define SYSREG_ISET_OFFSET 16 -#define SYSREG_ISET_SIZE 4 -#define SYSREG_DMMUSZ_OFFSET 20 -#define SYSREG_DMMUSZ_SIZE 6 -#define SYSREG_IMMUSZ_OFFSET 26 -#define SYSREG_IMMUSZ_SIZE 6 - -/* Bitfields in TLBEHI */ -#define SYSREG_ASID_OFFSET 0 -#define SYSREG_ASID_SIZE 8 -#define SYSREG_TLBEHI_I_OFFSET 8 -#define SYSREG_TLBEHI_I_SIZE 1 -#define SYSREG_TLBEHI_V_OFFSET 9 -#define SYSREG_TLBEHI_V_SIZE 1 -#define SYSREG_VPN_OFFSET 10 -#define SYSREG_VPN_SIZE 22 - -/* Bitfields in TLBELO */ -#define SYSREG_W_OFFSET 0 -#define SYSREG_W_SIZE 1 -#define SYSREG_TLBELO_D_OFFSET 1 -#define SYSREG_TLBELO_D_SIZE 1 -#define SYSREG_SZ_OFFSET 2 -#define SYSREG_SZ_SIZE 2 -#define SYSREG_AP_OFFSET 4 -#define SYSREG_AP_SIZE 3 -#define SYSREG_B_OFFSET 7 -#define SYSREG_B_SIZE 1 -#define SYSREG_G_OFFSET 8 -#define SYSREG_G_SIZE 1 -#define SYSREG_TLBELO_C_OFFSET 9 -#define SYSREG_TLBELO_C_SIZE 1 -#define SYSREG_PFN_OFFSET 10 -#define SYSREG_PFN_SIZE 22 - -/* Bitfields in MMUCR */ -#define SYSREG_E_OFFSET 0 -#define SYSREG_E_SIZE 1 -#define SYSREG_M_OFFSET 1 -#define SYSREG_M_SIZE 1 -#define SYSREG_MMUCR_I_OFFSET 2 -#define SYSREG_MMUCR_I_SIZE 1 -#define SYSREG_MMUCR_N_OFFSET 3 -#define SYSREG_MMUCR_N_SIZE 1 -#define SYSREG_MMUCR_S_OFFSET 4 -#define SYSREG_MMUCR_S_SIZE 1 -#define SYSREG_DLA_OFFSET 8 -#define SYSREG_DLA_SIZE 6 -#define SYSREG_DRP_OFFSET 14 -#define SYSREG_DRP_SIZE 6 -#define SYSREG_ILA_OFFSET 20 -#define SYSREG_ILA_SIZE 6 -#define SYSREG_IRP_OFFSET 26 -#define SYSREG_IRP_SIZE 6 - -/* Bitfields in PCCR */ -#define SYSREG_PCCR_E_OFFSET 0 -#define SYSREG_PCCR_E_SIZE 1 -#define SYSREG_PCCR_R_OFFSET 1 -#define SYSREG_PCCR_R_SIZE 1 -#define SYSREG_PCCR_C_OFFSET 2 -#define SYSREG_PCCR_C_SIZE 1 -#define SYSREG_PCCR_S_OFFSET 3 -#define SYSREG_PCCR_S_SIZE 1 -#define SYSREG_IEC_OFFSET 4 -#define SYSREG_IEC_SIZE 1 -#define SYSREG_IE0_OFFSET 5 -#define SYSREG_IE0_SIZE 1 -#define SYSREG_IE1_OFFSET 6 -#define SYSREG_IE1_SIZE 1 -#define SYSREG_FC_OFFSET 8 -#define SYSREG_FC_SIZE 1 -#define SYSREG_F0_OFFSET 9 -#define SYSREG_F0_SIZE 1 -#define SYSREG_F1_OFFSET 10 -#define SYSREG_F1_SIZE 1 -#define SYSREG_CONF0_OFFSET 12 -#define SYSREG_CONF0_SIZE 6 -#define SYSREG_CONF1_OFFSET 18 -#define SYSREG_CONF1_SIZE 6 - -/* Constants for ECR */ -#define ECR_UNRECOVERABLE 0 -#define ECR_TLB_MULTIPLE 1 -#define ECR_BUS_ERROR_WRITE 2 -#define ECR_BUS_ERROR_READ 3 -#define ECR_NMI 4 -#define ECR_ADDR_ALIGN_X 5 -#define ECR_PROTECTION_X 6 -#define ECR_DEBUG 7 -#define ECR_ILLEGAL_OPCODE 8 -#define ECR_UNIMPL_INSTRUCTION 9 -#define ECR_PRIVILEGE_VIOLATION 10 -#define ECR_FPE 11 -#define ECR_COPROC_ABSENT 12 -#define ECR_ADDR_ALIGN_R 13 -#define ECR_ADDR_ALIGN_W 14 -#define ECR_PROTECTION_R 15 -#define ECR_PROTECTION_W 16 -#define ECR_DTLB_MODIFIED 17 -#define ECR_TLB_MISS_X 20 -#define ECR_TLB_MISS_R 24 -#define ECR_TLB_MISS_W 28 - -/* Bit manipulation macros */ -#define SYSREG_BIT(name) \ - (1 << SYSREG_##name##_OFFSET) -#define SYSREG_BF(name,value) \ - (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \ - << SYSREG_##name##_OFFSET) -#define SYSREG_BFEXT(name,value)\ - (((value) >> SYSREG_##name##_OFFSET) \ - & ((1 << SYSREG_##name##_SIZE) - 1)) -#define SYSREG_BFINS(name,value,old) \ - (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \ - << SYSREG_##name##_OFFSET)) \ - | SYSREG_BF(name,value)) - -/* Register access macros */ -#ifdef __CHECKER__ -extern unsigned long __builtin_mfsr(unsigned long reg); -extern void __builtin_mtsr(unsigned long reg, unsigned long value); -#endif - -#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg) -#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value) - -#endif /* __ASM_AVR32_SYSREG_H */ diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h deleted file mode 100644 index 9702c221..0000000 --- a/include/asm-avr32/system.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_SYSTEM_H -#define __ASM_AVR32_SYSTEM_H - -#include -#include -#include - -#include -#include - -#define xchg(ptr,x) \ - ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -#define nop() asm volatile("nop") - -#define mb() asm volatile("" : : : "memory") -#define rmb() mb() -#define wmb() asm volatile("sync 0" : : : "memory") -#define read_barrier_depends() do { } while(0) -#define set_mb(var, value) do { var = value; mb(); } while(0) - -/* - * Help PathFinder and other Nexus-compliant debuggers keep track of - * the current PID by emitting an Ownership Trace Message each time we - * switch task. - */ -#ifdef CONFIG_OWNERSHIP_TRACE -#include -#define finish_arch_switch(prev) \ - do { \ - ocd_write(PID, prev->pid); \ - ocd_write(PID, current->pid); \ - } while(0) -#endif - -/* - * switch_to(prev, next, last) should switch from task `prev' to task - * `next'. `prev' will never be the same as `next'. - * - * We just delegate everything to the __switch_to assembly function, - * which is implemented in arch/avr32/kernel/switch_to.S - * - * mb() tells GCC not to cache `current' across this call. - */ -struct cpu_context; -struct task_struct; -extern struct task_struct *__switch_to(struct task_struct *, - struct cpu_context *, - struct cpu_context *); -#define switch_to(prev, next, last) \ - do { \ - last = __switch_to(prev, &prev->thread.cpu_context + 1, \ - &next->thread.cpu_context); \ - } while (0) - -#ifdef CONFIG_SMP -# error "The AVR32 port does not support SMP" -#else -# define smp_mb() barrier() -# define smp_rmb() barrier() -# define smp_wmb() barrier() -# define smp_read_barrier_depends() do { } while(0) -#endif - -#include - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long xchg_u32(u32 val, volatile u32 *m) -{ - u32 ret; - - asm volatile("xchg %[ret], %[m], %[val]" - : [ret] "=&r"(ret), "=m"(*m) - : "m"(*m), [m] "r"(m), [val] "r"(val) - : "memory"); - return ret; -} - -static inline unsigned long __xchg(unsigned long x, - volatile void *ptr, - int size) -{ - switch(size) { - case 4: - return xchg_u32(x, ptr); - default: - __xchg_called_with_bad_pointer(); - return x; - } -} - -static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old, - unsigned long new) -{ - __u32 ret; - - asm volatile( - "1: ssrf 5\n" - " ld.w %[ret], %[m]\n" - " cp.w %[ret], %[old]\n" - " brne 2f\n" - " stcond %[m], %[new]\n" - " brne 1b\n" - "2:\n" - : [ret] "=&r"(ret), [m] "=m"(*m) - : "m"(m), [old] "ir"(old), [new] "r"(new) - : "memory", "cc"); - return ret; -} - -extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels( - volatile int * m, unsigned long old, unsigned long new); -#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels - -/* This function doesn't exist, so you'll get a linker error - if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - case 8: - return __cmpxchg_u64(ptr, old, new); - } - - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr, old, new) \ - ((typeof(*(ptr)))__cmpxchg((ptr), (unsigned long)(old), \ - (unsigned long)(new), \ - sizeof(*(ptr)))) - -#include - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - default: - return __cmpxchg_local_generic(ptr, old, new, size); - } - - return old; -} - -#define cmpxchg_local(ptr, old, new) \ - ((typeof(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(old), \ - (unsigned long)(new), \ - sizeof(*(ptr)))) - -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - -struct pt_regs; -void NORET_TYPE die(const char *str, struct pt_regs *regs, long err); -void _exception(long signr, struct pt_regs *regs, int code, - unsigned long addr); - -#define arch_align_stack(x) (x) - -#endif /* __ASM_AVR32_SYSTEM_H */ diff --git a/include/asm-avr32/termbits.h b/include/asm-avr32/termbits.h deleted file mode 100644 index db2daab..0000000 --- a/include/asm-avr32/termbits.h +++ /dev/null @@ -1,195 +0,0 @@ -#ifndef __ASM_AVR32_TERMBITS_H -#define __ASM_AVR32_TERMBITS_H - -#include - -typedef unsigned char cc_t; -typedef unsigned int speed_t; -typedef unsigned int tcflag_t; - -#define NCCS 19 -struct termios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ -}; - -struct termios2 { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -struct ktermios { - tcflag_t c_iflag; /* input mode flags */ - tcflag_t c_oflag; /* output mode flags */ - tcflag_t c_cflag; /* control mode flags */ - tcflag_t c_lflag; /* local mode flags */ - cc_t c_line; /* line discipline */ - cc_t c_cc[NCCS]; /* control characters */ - speed_t c_ispeed; /* input speed */ - speed_t c_ospeed; /* output speed */ -}; - -/* c_cc characters */ -#define VINTR 0 -#define VQUIT 1 -#define VERASE 2 -#define VKILL 3 -#define VEOF 4 -#define VTIME 5 -#define VMIN 6 -#define VSWTC 7 -#define VSTART 8 -#define VSTOP 9 -#define VSUSP 10 -#define VEOL 11 -#define VREPRINT 12 -#define VDISCARD 13 -#define VWERASE 14 -#define VLNEXT 15 -#define VEOL2 16 - -/* c_iflag bits */ -#define IGNBRK 0000001 -#define BRKINT 0000002 -#define IGNPAR 0000004 -#define PARMRK 0000010 -#define INPCK 0000020 -#define ISTRIP 0000040 -#define INLCR 0000100 -#define IGNCR 0000200 -#define ICRNL 0000400 -#define IUCLC 0001000 -#define IXON 0002000 -#define IXANY 0004000 -#define IXOFF 0010000 -#define IMAXBEL 0020000 -#define IUTF8 0040000 - -/* c_oflag bits */ -#define OPOST 0000001 -#define OLCUC 0000002 -#define ONLCR 0000004 -#define OCRNL 0000010 -#define ONOCR 0000020 -#define ONLRET 0000040 -#define OFILL 0000100 -#define OFDEL 0000200 -#define NLDLY 0000400 -#define NL0 0000000 -#define NL1 0000400 -#define CRDLY 0003000 -#define CR0 0000000 -#define CR1 0001000 -#define CR2 0002000 -#define CR3 0003000 -#define TABDLY 0014000 -#define TAB0 0000000 -#define TAB1 0004000 -#define TAB2 0010000 -#define TAB3 0014000 -#define XTABS 0014000 -#define BSDLY 0020000 -#define BS0 0000000 -#define BS1 0020000 -#define VTDLY 0040000 -#define VT0 0000000 -#define VT1 0040000 -#define FFDLY 0100000 -#define FF0 0000000 -#define FF1 0100000 - -/* c_cflag bit meaning */ -#define CBAUD 0010017 -#define B0 0000000 /* hang up */ -#define B50 0000001 -#define B75 0000002 -#define B110 0000003 -#define B134 0000004 -#define B150 0000005 -#define B200 0000006 -#define B300 0000007 -#define B600 0000010 -#define B1200 0000011 -#define B1800 0000012 -#define B2400 0000013 -#define B4800 0000014 -#define B9600 0000015 -#define B19200 0000016 -#define B38400 0000017 -#define EXTA B19200 -#define EXTB B38400 -#define CSIZE 0000060 -#define CS5 0000000 -#define CS6 0000020 -#define CS7 0000040 -#define CS8 0000060 -#define CSTOPB 0000100 -#define CREAD 0000200 -#define PARENB 0000400 -#define PARODD 0001000 -#define HUPCL 0002000 -#define CLOCAL 0004000 -#define CBAUDEX 0010000 -#define B57600 0010001 -#define B115200 0010002 -#define B230400 0010003 -#define B460800 0010004 -#define B500000 0010005 -#define B576000 0010006 -#define B921600 0010007 -#define B1000000 0010010 -#define B1152000 0010011 -#define B1500000 0010012 -#define B2000000 0010013 -#define B2500000 0010014 -#define B3000000 0010015 -#define B3500000 0010016 -#define B4000000 0010017 -#define CIBAUD 002003600000 /* input baud rate (not used) */ -#define CMSPAR 010000000000 /* mark or space (stick) parity */ -#define CRTSCTS 020000000000 /* flow control */ - -/* c_lflag bits */ -#define ISIG 0000001 -#define ICANON 0000002 -#define XCASE 0000004 -#define ECHO 0000010 -#define ECHOE 0000020 -#define ECHOK 0000040 -#define ECHONL 0000100 -#define NOFLSH 0000200 -#define TOSTOP 0000400 -#define ECHOCTL 0001000 -#define ECHOPRT 0002000 -#define ECHOKE 0004000 -#define FLUSHO 0010000 -#define PENDIN 0040000 -#define IEXTEN 0100000 - -/* tcflow() and TCXONC use these */ -#define TCOOFF 0 -#define TCOON 1 -#define TCIOFF 2 -#define TCION 3 - -/* tcflush() and TCFLSH use these */ -#define TCIFLUSH 0 -#define TCOFLUSH 1 -#define TCIOFLUSH 2 - -/* tcsetattr uses these */ -#define TCSANOW 0 -#define TCSADRAIN 1 -#define TCSAFLUSH 2 - -#endif /* __ASM_AVR32_TERMBITS_H */ diff --git a/include/asm-avr32/termios.h b/include/asm-avr32/termios.h deleted file mode 100644 index 0152aba..0000000 --- a/include/asm-avr32/termios.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TERMIOS_H -#define __ASM_AVR32_TERMIOS_H - -#include -#include - -struct winsize { - unsigned short ws_row; - unsigned short ws_col; - unsigned short ws_xpixel; - unsigned short ws_ypixel; -}; - -#define NCC 8 -struct termio { - unsigned short c_iflag; /* input mode flags */ - unsigned short c_oflag; /* output mode flags */ - unsigned short c_cflag; /* control mode flags */ - unsigned short c_lflag; /* local mode flags */ - unsigned char c_line; /* line discipline */ - unsigned char c_cc[NCC]; /* control characters */ -}; - -/* modem lines */ -#define TIOCM_LE 0x001 -#define TIOCM_DTR 0x002 -#define TIOCM_RTS 0x004 -#define TIOCM_ST 0x008 -#define TIOCM_SR 0x010 -#define TIOCM_CTS 0x020 -#define TIOCM_CAR 0x040 -#define TIOCM_RNG 0x080 -#define TIOCM_DSR 0x100 -#define TIOCM_CD TIOCM_CAR -#define TIOCM_RI TIOCM_RNG -#define TIOCM_OUT1 0x2000 -#define TIOCM_OUT2 0x4000 -#define TIOCM_LOOP 0x8000 - -/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ - -#ifdef __KERNEL__ -/* intr=^C quit=^\ erase=del kill=^U - eof=^D vtime=\0 vmin=\1 sxtc=\0 - start=^Q stop=^S susp=^Z eol=\0 - reprint=^R discard=^U werase=^W lnext=^V - eol2=\0 -*/ -#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" - -#include - -#endif /* __KERNEL__ */ - -#endif /* __ASM_AVR32_TERMIOS_H */ diff --git a/include/asm-avr32/thread_info.h b/include/asm-avr32/thread_info.h deleted file mode 100644 index 294b25f..0000000 --- a/include/asm-avr32/thread_info.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_THREAD_INFO_H -#define __ASM_AVR32_THREAD_INFO_H - -#include - -#define THREAD_SIZE_ORDER 1 -#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) - -#ifndef __ASSEMBLY__ -#include - -struct task_struct; -struct exec_domain; - -struct thread_info { - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - __u32 cpu; - __s32 preempt_count; /* 0 => preemptable, <0 => BUG */ - __u32 rar_saved; /* return address... */ - __u32 rsr_saved; /* ...and status register - saved by debug handler - when setting up - trampoline */ - struct restart_block restart_block; - __u8 supervisor_stack[0]; -}; - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall \ - } \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* - * Get the thread information struct from C. - * We do the usual trick and use the lower end of the stack for this - */ -static inline struct thread_info *current_thread_info(void) -{ - unsigned long addr = ~(THREAD_SIZE - 1); - - asm("and %0, sp" : "=r"(addr) : "0"(addr)); - return (struct thread_info *)addr; -} - -#define get_thread_info(ti) get_task_struct((ti)->task) -#define put_thread_info(ti) put_task_struct((ti)->task) - -#endif /* !__ASSEMBLY__ */ - -#define PREEMPT_ACTIVE 0x40000000 - -/* - * Thread information flags - * - these are process state flags that various assembly files may need to access - * - pending work-to-be-done flags are in LSW - * - other flags in MSW - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_SIGPENDING 1 /* signal pending */ -#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling - TIF_NEED_RESCHED */ -#define TIF_BREAKPOINT 4 /* enter monitor mode on return */ -#define TIF_SINGLE_STEP 5 /* single step in progress */ -#define TIF_MEMDIE 6 -#define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */ -#define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */ -#define TIF_FREEZE 29 -#define TIF_DEBUG 30 /* debugging enabled */ -#define TIF_USERSPACE 31 /* true if FS sets userspace */ - -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) -#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) -#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) -#define _TIF_SINGLE_STEP (1 << TIF_SINGLE_STEP) -#define _TIF_MEMDIE (1 << TIF_MEMDIE) -#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK) -#define _TIF_CPU_GOING_TO_SLEEP (1 << TIF_CPU_GOING_TO_SLEEP) - -/* Note: The masks below must never span more than 16 bits! */ - -/* work to do on interrupt/exception return */ -#define _TIF_WORK_MASK \ - ((1 << TIF_SIGPENDING) \ - | (1 << TIF_NEED_RESCHED) \ - | (1 << TIF_POLLING_NRFLAG) \ - | (1 << TIF_BREAKPOINT) \ - | (1 << TIF_RESTORE_SIGMASK)) - -/* work to do on any return to userspace */ -#define _TIF_ALLWORK_MASK (_TIF_WORK_MASK | (1 << TIF_SYSCALL_TRACE)) -/* work to do on return from debug mode */ -#define _TIF_DBGWORK_MASK (_TIF_WORK_MASK & ~(1 << TIF_BREAKPOINT)) - -#endif /* __ASM_AVR32_THREAD_INFO_H */ diff --git a/include/asm-avr32/timex.h b/include/asm-avr32/timex.h deleted file mode 100644 index 187dcf3..0000000 --- a/include/asm-avr32/timex.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TIMEX_H -#define __ASM_AVR32_TIMEX_H - -/* - * This is the frequency of the timer used for Linux's timer interrupt. - * The value should be defined as accurate as possible or under certain - * circumstances Linux timekeeping might become inaccurate or fail. - * - * For many system the exact clockrate of the timer isn't known but due to - * the way this value is used we can get away with a wrong value as long - * as this value is: - * - * - a multiple of HZ - * - a divisor of the actual rate - * - * 500000 is a good such cheat value. - * - * The obscure number 1193182 is the same as used by the original i8254 - * time in legacy PC hardware; the chip is never found in AVR32 systems. - */ -#define CLOCK_TICK_RATE 500000 /* Underlying HZ */ - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles (void) -{ - return 0; -} - -#define ARCH_HAS_READ_CURRENT_TIMER - -#endif /* __ASM_AVR32_TIMEX_H */ diff --git a/include/asm-avr32/tlb.h b/include/asm-avr32/tlb.h deleted file mode 100644 index 5c55f9c..0000000 --- a/include/asm-avr32/tlb.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TLB_H -#define __ASM_AVR32_TLB_H - -#define tlb_start_vma(tlb, vma) \ - flush_cache_range(vma, vma->vm_start, vma->vm_end) - -#define tlb_end_vma(tlb, vma) \ - flush_tlb_range(vma, vma->vm_start, vma->vm_end) - -#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while(0) - -/* - * Flush whole TLB for MM - */ -#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) - -#include - -/* - * For debugging purposes - */ -extern void show_dtlb_entry(unsigned int index); -extern void dump_dtlb(void); - -#endif /* __ASM_AVR32_TLB_H */ diff --git a/include/asm-avr32/tlbflush.h b/include/asm-avr32/tlbflush.h deleted file mode 100644 index bf90a78..0000000 --- a/include/asm-avr32/tlbflush.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TLBFLUSH_H -#define __ASM_AVR32_TLBFLUSH_H - -#include - -/* - * TLB flushing: - * - * - flush_tlb() flushes the current mm struct TLBs - * - flush_tlb_all() flushes all processes' TLB entries - * - flush_tlb_mm(mm) flushes the specified mm context TLBs - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - */ -extern void flush_tlb(void); -extern void flush_tlb_all(void); -extern void flush_tlb_mm(struct mm_struct *mm); -extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page); - -extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#endif /* __ASM_AVR32_TLBFLUSH_H */ diff --git a/include/asm-avr32/topology.h b/include/asm-avr32/topology.h deleted file mode 100644 index 5b766cb..0000000 --- a/include/asm-avr32/topology.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_AVR32_TOPOLOGY_H -#define __ASM_AVR32_TOPOLOGY_H - -#include - -#endif /* __ASM_AVR32_TOPOLOGY_H */ diff --git a/include/asm-avr32/traps.h b/include/asm-avr32/traps.h deleted file mode 100644 index 6a8fb94..0000000 --- a/include/asm-avr32/traps.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TRAPS_H -#define __ASM_AVR32_TRAPS_H - -#include - -struct undef_hook { - struct list_head node; - u32 insn_mask; - u32 insn_val; - int (*fn)(struct pt_regs *regs, u32 insn); -}; - -void register_undef_hook(struct undef_hook *hook); -void unregister_undef_hook(struct undef_hook *hook); - -#endif /* __ASM_AVR32_TRAPS_H */ diff --git a/include/asm-avr32/types.h b/include/asm-avr32/types.h deleted file mode 100644 index 9cefda6..0000000 --- a/include/asm-avr32/types.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_TYPES_H -#define __ASM_AVR32_TYPES_H - -#include - -#ifndef __ASSEMBLY__ - -typedef unsigned short umode_t; - -#endif /* __ASSEMBLY__ */ - -/* - * These aren't exported outside the kernel to avoid name space clashes - */ -#ifdef __KERNEL__ - -#define BITS_PER_LONG 32 - -#ifndef __ASSEMBLY__ - -/* Dma addresses are 32-bits wide. */ - -typedef u32 dma_addr_t; - -#endif /* __ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - - -#endif /* __ASM_AVR32_TYPES_H */ diff --git a/include/asm-avr32/uaccess.h b/include/asm-avr32/uaccess.h deleted file mode 100644 index ed09239..0000000 --- a/include/asm-avr32/uaccess.h +++ /dev/null @@ -1,324 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_UACCESS_H -#define __ASM_AVR32_UACCESS_H - -#include -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -typedef struct { - unsigned int is_user_space; -} mm_segment_t; - -/* - * The fs value determines whether argument validity checking should be - * performed or not. If get_fs() == USER_DS, checking is performed, with - * get_fs() == KERNEL_DS, checking is bypassed. - * - * For historical reasons (Data Segment Register?), these macros are misnamed. - */ -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define segment_eq(a,b) ((a).is_user_space == (b).is_user_space) - -#define USER_ADDR_LIMIT 0x80000000 - -#define KERNEL_DS MAKE_MM_SEG(0) -#define USER_DS MAKE_MM_SEG(1) - -#define get_ds() (KERNEL_DS) - -static inline mm_segment_t get_fs(void) -{ - return MAKE_MM_SEG(test_thread_flag(TIF_USERSPACE)); -} - -static inline void set_fs(mm_segment_t s) -{ - if (s.is_user_space) - set_thread_flag(TIF_USERSPACE); - else - clear_thread_flag(TIF_USERSPACE); -} - -/* - * Test whether a block of memory is a valid user space address. - * Returns 0 if the range is valid, nonzero otherwise. - * - * We do the following checks: - * 1. Is the access from kernel space? - * 2. Does (addr + size) set the carry bit? - * 3. Is (addr + size) a negative number (i.e. >= 0x80000000)? - * - * If yes on the first check, access is granted. - * If no on any of the others, access is denied. - */ -#define __range_ok(addr, size) \ - (test_thread_flag(TIF_USERSPACE) \ - && (((unsigned long)(addr) >= 0x80000000) \ - || ((unsigned long)(size) > 0x80000000) \ - || (((unsigned long)(addr) + (unsigned long)(size)) > 0x80000000))) - -#define access_ok(type, addr, size) (likely(__range_ok(addr, size) == 0)) - -/* Generic arbitrary sized copy. Return the number of bytes NOT copied */ -extern __kernel_size_t __copy_user(void *to, const void *from, - __kernel_size_t n); - -extern __kernel_size_t copy_to_user(void __user *to, const void *from, - __kernel_size_t n); -extern __kernel_size_t copy_from_user(void *to, const void __user *from, - __kernel_size_t n); - -static inline __kernel_size_t __copy_to_user(void __user *to, const void *from, - __kernel_size_t n) -{ - return __copy_user((void __force *)to, from, n); -} -static inline __kernel_size_t __copy_from_user(void *to, - const void __user *from, - __kernel_size_t n) -{ - return __copy_user(to, (const void __force *)from, n); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -/* - * put_user: - Write a simple value into user space. - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * - * Context: User context only. This function may sleep. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger - * data types like structures or arrays. - * - * @ptr must have pointer-to-simple-variable type, and @x must be assignable - * to the result of dereferencing @ptr. - * - * Returns zero on success, or -EFAULT on error. - */ -#define put_user(x,ptr) \ - __put_user_check((x),(ptr),sizeof(*(ptr))) - -/* - * get_user: - Get a simple variable from user space. - * @x: Variable to store result. - * @ptr: Source address, in user space. - * - * Context: User context only. This function may sleep. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger - * data types like structures or arrays. - * - * @ptr must have pointer-to-simple-variable type, and the result of - * dereferencing @ptr must be assignable to @x without a cast. - * - * Returns zero on success, or -EFAULT on error. - * On error, the variable @x is set to zero. - */ -#define get_user(x,ptr) \ - __get_user_check((x),(ptr),sizeof(*(ptr))) - -/* - * __put_user: - Write a simple value into user space, with less checking. - * @x: Value to copy to user space. - * @ptr: Destination address, in user space. - * - * Context: User context only. This function may sleep. - * - * This macro copies a single simple value from kernel space to user - * space. It supports simple types like char and int, but not larger - * data types like structures or arrays. - * - * @ptr must have pointer-to-simple-variable type, and @x must be assignable - * to the result of dereferencing @ptr. - * - * Caller must check the pointer with access_ok() before calling this - * function. - * - * Returns zero on success, or -EFAULT on error. - */ -#define __put_user(x,ptr) \ - __put_user_nocheck((x),(ptr),sizeof(*(ptr))) - -/* - * __get_user: - Get a simple variable from user space, with less checking. - * @x: Variable to store result. - * @ptr: Source address, in user space. - * - * Context: User context only. This function may sleep. - * - * This macro copies a single simple variable from user space to kernel - * space. It supports simple types like char and int, but not larger - * data types like structures or arrays. - * - * @ptr must have pointer-to-simple-variable type, and the result of - * dereferencing @ptr must be assignable to @x without a cast. - * - * Caller must check the pointer with access_ok() before calling this - * function. - * - * Returns zero on success, or -EFAULT on error. - * On error, the variable @x is set to zero. - */ -#define __get_user(x,ptr) \ - __get_user_nocheck((x),(ptr),sizeof(*(ptr))) - -extern int __get_user_bad(void); -extern int __put_user_bad(void); - -#define __get_user_nocheck(x, ptr, size) \ -({ \ - unsigned long __gu_val = 0; \ - int __gu_err = 0; \ - \ - switch (size) { \ - case 1: __get_user_asm("ub", __gu_val, ptr, __gu_err); break; \ - case 2: __get_user_asm("uh", __gu_val, ptr, __gu_err); break; \ - case 4: __get_user_asm("w", __gu_val, ptr, __gu_err); break; \ - default: __gu_err = __get_user_bad(); break; \ - } \ - \ - x = (typeof(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_check(x, ptr, size) \ -({ \ - unsigned long __gu_val = 0; \ - const typeof(*(ptr)) __user * __gu_addr = (ptr); \ - int __gu_err = 0; \ - \ - if (access_ok(VERIFY_READ, __gu_addr, size)) { \ - switch (size) { \ - case 1: \ - __get_user_asm("ub", __gu_val, __gu_addr, \ - __gu_err); \ - break; \ - case 2: \ - __get_user_asm("uh", __gu_val, __gu_addr, \ - __gu_err); \ - break; \ - case 4: \ - __get_user_asm("w", __gu_val, __gu_addr, \ - __gu_err); \ - break; \ - default: \ - __gu_err = __get_user_bad(); \ - break; \ - } \ - } else { \ - __gu_err = -EFAULT; \ - } \ - x = (typeof(*(ptr)))__gu_val; \ - __gu_err; \ -}) - -#define __get_user_asm(suffix, __gu_val, ptr, __gu_err) \ - asm volatile( \ - "1: ld." suffix " %1, %3 \n" \ - "2: \n" \ - " .section .fixup, \"ax\" \n" \ - "3: mov %0, %4 \n" \ - " rjmp 2b \n" \ - " .previous \n" \ - " .section __ex_table, \"a\" \n" \ - " .long 1b, 3b \n" \ - " .previous \n" \ - : "=r"(__gu_err), "=r"(__gu_val) \ - : "0"(__gu_err), "m"(*(ptr)), "i"(-EFAULT)) - -#define __put_user_nocheck(x, ptr, size) \ -({ \ - typeof(*(ptr)) __pu_val; \ - int __pu_err = 0; \ - \ - __pu_val = (x); \ - switch (size) { \ - case 1: __put_user_asm("b", ptr, __pu_val, __pu_err); break; \ - case 2: __put_user_asm("h", ptr, __pu_val, __pu_err); break; \ - case 4: __put_user_asm("w", ptr, __pu_val, __pu_err); break; \ - case 8: __put_user_asm("d", ptr, __pu_val, __pu_err); break; \ - default: __pu_err = __put_user_bad(); break; \ - } \ - __pu_err; \ -}) - -#define __put_user_check(x, ptr, size) \ -({ \ - typeof(*(ptr)) __pu_val; \ - typeof(*(ptr)) __user *__pu_addr = (ptr); \ - int __pu_err = 0; \ - \ - __pu_val = (x); \ - if (access_ok(VERIFY_WRITE, __pu_addr, size)) { \ - switch (size) { \ - case 1: \ - __put_user_asm("b", __pu_addr, __pu_val, \ - __pu_err); \ - break; \ - case 2: \ - __put_user_asm("h", __pu_addr, __pu_val, \ - __pu_err); \ - break; \ - case 4: \ - __put_user_asm("w", __pu_addr, __pu_val, \ - __pu_err); \ - break; \ - case 8: \ - __put_user_asm("d", __pu_addr, __pu_val, \ - __pu_err); \ - break; \ - default: \ - __pu_err = __put_user_bad(); \ - break; \ - } \ - } else { \ - __pu_err = -EFAULT; \ - } \ - __pu_err; \ -}) - -#define __put_user_asm(suffix, ptr, __pu_val, __gu_err) \ - asm volatile( \ - "1: st." suffix " %1, %3 \n" \ - "2: \n" \ - " .section .fixup, \"ax\" \n" \ - "3: mov %0, %4 \n" \ - " rjmp 2b \n" \ - " .previous \n" \ - " .section __ex_table, \"a\" \n" \ - " .long 1b, 3b \n" \ - " .previous \n" \ - : "=r"(__gu_err), "=m"(*(ptr)) \ - : "0"(__gu_err), "r"(__pu_val), "i"(-EFAULT)) - -extern __kernel_size_t clear_user(void __user *addr, __kernel_size_t size); -extern __kernel_size_t __clear_user(void __user *addr, __kernel_size_t size); - -extern long strncpy_from_user(char *dst, const char __user *src, long count); -extern long __strncpy_from_user(char *dst, const char __user *src, long count); - -extern long strnlen_user(const char __user *__s, long __n); -extern long __strnlen_user(const char __user *__s, long __n); - -#define strlen_user(s) strnlen_user(s, ~0UL >> 1) - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -#endif /* __ASM_AVR32_UACCESS_H */ diff --git a/include/asm-avr32/ucontext.h b/include/asm-avr32/ucontext.h deleted file mode 100644 index ac7259c..0000000 --- a/include/asm-avr32/ucontext.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ASM_AVR32_UCONTEXT_H -#define __ASM_AVR32_UCONTEXT_H - -struct ucontext { - unsigned long uc_flags; - struct ucontext * uc_link; - stack_t uc_stack; - struct sigcontext uc_mcontext; - sigset_t uc_sigmask; -}; - -#endif /* __ASM_AVR32_UCONTEXT_H */ diff --git a/include/asm-avr32/unaligned.h b/include/asm-avr32/unaligned.h deleted file mode 100644 index 0418772..0000000 --- a/include/asm-avr32/unaligned.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef _ASM_AVR32_UNALIGNED_H -#define _ASM_AVR32_UNALIGNED_H - -/* - * AVR32 can handle some unaligned accesses, depending on the - * implementation. The AVR32 AP implementation can handle unaligned - * words, but halfwords must be halfword-aligned, and doublewords must - * be word-aligned. - * - * However, swapped word loads must be word-aligned so we can't - * optimize word loads in general. - */ - -#include -#include -#include - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif /* _ASM_AVR32_UNALIGNED_H */ diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h deleted file mode 100644 index 89861a2..0000000 --- a/include/asm-avr32/unistd.h +++ /dev/null @@ -1,345 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_AVR32_UNISTD_H -#define __ASM_AVR32_UNISTD_H - -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_umask 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_chown 16 -#define __NR_lchown 17 -#define __NR_lseek 18 -#define __NR__llseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount2 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_pause 28 -#define __NR_utime 29 -#define __NR_stat 30 -#define __NR_fstat 31 -#define __NR_lstat 32 -#define __NR_access 33 -#define __NR_chroot 34 -#define __NR_sync 35 -#define __NR_fsync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_clone 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_getcwd 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_setfsuid 52 -#define __NR_setfsgid 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_setpgid 56 -#define __NR_mremap 57 -#define __NR_setresuid 58 -#define __NR_getresuid 59 -#define __NR_setreuid 60 -#define __NR_setregid 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_rt_sigaction 67 -#define __NR_rt_sigreturn 68 -#define __NR_rt_sigprocmask 69 -#define __NR_rt_sigpending 70 -#define __NR_rt_sigtimedwait 71 -#define __NR_rt_sigqueueinfo 72 -#define __NR_rt_sigsuspend 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 /* SuS compliant getrlimit */ -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_fchdir 84 -#define __NR_readlink 85 -#define __NR_pread 86 -#define __NR_pwrite 87 -#define __NR_swapon 88 -#define __NR_reboot 89 -#define __NR_mmap2 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_wait4 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_vhangup 101 -#define __NR_sigaltstack 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_swapoff 106 -#define __NR_sysinfo 107 -/* 108 was __NR_ipc for a little while */ -#define __NR_sendfile 109 -#define __NR_setdomainname 110 -#define __NR_uname 111 -#define __NR_adjtimex 112 -#define __NR_mprotect 113 -#define __NR_vfork 114 -#define __NR_init_module 115 -#define __NR_delete_module 116 -#define __NR_quotactl 117 -#define __NR_getpgid 118 -#define __NR_bdflush 119 -#define __NR_sysfs 120 -#define __NR_personality 121 -#define __NR_afs_syscall 122 /* Syscall for Andrew File System */ -#define __NR_getdents 123 -#define __NR_flock 124 -#define __NR_msync 125 -#define __NR_readv 126 -#define __NR_writev 127 -#define __NR_getsid 128 -#define __NR_fdatasync 129 -#define __NR__sysctl 130 -#define __NR_mlock 131 -#define __NR_munlock 132 -#define __NR_mlockall 133 -#define __NR_munlockall 134 -#define __NR_sched_setparam 135 -#define __NR_sched_getparam 136 -#define __NR_sched_setscheduler 137 -#define __NR_sched_getscheduler 138 -#define __NR_sched_yield 139 -#define __NR_sched_get_priority_max 140 -#define __NR_sched_get_priority_min 141 -#define __NR_sched_rr_get_interval 142 -#define __NR_nanosleep 143 -#define __NR_poll 144 -#define __NR_nfsservctl 145 -#define __NR_setresgid 146 -#define __NR_getresgid 147 -#define __NR_prctl 148 -#define __NR_socket 149 -#define __NR_bind 150 -#define __NR_connect 151 -#define __NR_listen 152 -#define __NR_accept 153 -#define __NR_getsockname 154 -#define __NR_getpeername 155 -#define __NR_socketpair 156 -#define __NR_send 157 -#define __NR_recv 158 -#define __NR_sendto 159 -#define __NR_recvfrom 160 -#define __NR_shutdown 161 -#define __NR_setsockopt 162 -#define __NR_getsockopt 163 -#define __NR_sendmsg 164 -#define __NR_recvmsg 165 -#define __NR_truncate64 166 -#define __NR_ftruncate64 167 -#define __NR_stat64 168 -#define __NR_lstat64 169 -#define __NR_fstat64 170 -#define __NR_pivot_root 171 -#define __NR_mincore 172 -#define __NR_madvise 173 -#define __NR_getdents64 174 -#define __NR_fcntl64 175 -#define __NR_gettid 176 -#define __NR_readahead 177 -#define __NR_setxattr 178 -#define __NR_lsetxattr 179 -#define __NR_fsetxattr 180 -#define __NR_getxattr 181 -#define __NR_lgetxattr 182 -#define __NR_fgetxattr 183 -#define __NR_listxattr 184 -#define __NR_llistxattr 185 -#define __NR_flistxattr 186 -#define __NR_removexattr 187 -#define __NR_lremovexattr 188 -#define __NR_fremovexattr 189 -#define __NR_tkill 190 -#define __NR_sendfile64 191 -#define __NR_futex 192 -#define __NR_sched_setaffinity 193 -#define __NR_sched_getaffinity 194 -#define __NR_capget 195 -#define __NR_capset 196 -#define __NR_io_setup 197 -#define __NR_io_destroy 198 -#define __NR_io_getevents 199 -#define __NR_io_submit 200 -#define __NR_io_cancel 201 -#define __NR_fadvise64 202 -#define __NR_exit_group 203 -#define __NR_lookup_dcookie 204 -#define __NR_epoll_create 205 -#define __NR_epoll_ctl 206 -#define __NR_epoll_wait 207 -#define __NR_remap_file_pages 208 -#define __NR_set_tid_address 209 - -#define __NR_timer_create 210 -#define __NR_timer_settime 211 -#define __NR_timer_gettime 212 -#define __NR_timer_getoverrun 213 -#define __NR_timer_delete 214 -#define __NR_clock_settime 215 -#define __NR_clock_gettime 216 -#define __NR_clock_getres 217 -#define __NR_clock_nanosleep 218 -#define __NR_statfs64 219 -#define __NR_fstatfs64 220 -#define __NR_tgkill 221 - /* 222 reserved for tux */ -#define __NR_utimes 223 -#define __NR_fadvise64_64 224 - -#define __NR_cacheflush 225 - -#define __NR_vserver 226 -#define __NR_mq_open 227 -#define __NR_mq_unlink 228 -#define __NR_mq_timedsend 229 -#define __NR_mq_timedreceive 230 -#define __NR_mq_notify 231 -#define __NR_mq_getsetattr 232 -#define __NR_kexec_load 233 -#define __NR_waitid 234 -#define __NR_add_key 235 -#define __NR_request_key 236 -#define __NR_keyctl 237 -#define __NR_ioprio_set 238 -#define __NR_ioprio_get 239 -#define __NR_inotify_init 240 -#define __NR_inotify_add_watch 241 -#define __NR_inotify_rm_watch 242 -#define __NR_openat 243 -#define __NR_mkdirat 244 -#define __NR_mknodat 245 -#define __NR_fchownat 246 -#define __NR_futimesat 247 -#define __NR_fstatat64 248 -#define __NR_unlinkat 249 -#define __NR_renameat 250 -#define __NR_linkat 251 -#define __NR_symlinkat 252 -#define __NR_readlinkat 253 -#define __NR_fchmodat 254 -#define __NR_faccessat 255 -#define __NR_pselect6 256 -#define __NR_ppoll 257 -#define __NR_unshare 258 -#define __NR_set_robust_list 259 -#define __NR_get_robust_list 260 -#define __NR_splice 261 -#define __NR_sync_file_range 262 -#define __NR_tee 263 -#define __NR_vmsplice 264 -#define __NR_epoll_pwait 265 - -#define __NR_msgget 266 -#define __NR_msgsnd 267 -#define __NR_msgrcv 268 -#define __NR_msgctl 269 -#define __NR_semget 270 -#define __NR_semop 271 -#define __NR_semctl 272 -#define __NR_semtimedop 273 -#define __NR_shmat 274 -#define __NR_shmget 275 -#define __NR_shmdt 276 -#define __NR_shmctl 277 - -#define __NR_utimensat 278 -#define __NR_signalfd 279 -/* 280 was __NR_timerfd */ -#define __NR_eventfd 281 - -#ifdef __KERNEL__ -#define NR_syscalls 282 - -/* Old stuff */ -#define __IGNORE_uselib -#define __IGNORE_mmap - -/* NUMA stuff */ -#define __IGNORE_mbind -#define __IGNORE_get_mempolicy -#define __IGNORE_set_mempolicy -#define __IGNORE_migrate_pages -#define __IGNORE_move_pages - -/* SMP stuff */ -#define __IGNORE_getcpu - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_RT_SIGACTION -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall"); - -#endif /* __KERNEL__ */ - -#endif /* __ASM_AVR32_UNISTD_H */ diff --git a/include/asm-avr32/user.h b/include/asm-avr32/user.h deleted file mode 100644 index 7e9152f..0000000 --- a/include/asm-avr32/user.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Copyright (C) 2004-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Note: We may not need these definitions for AVR32, as we don't - * support a.out. - */ -#ifndef __ASM_AVR32_USER_H -#define __ASM_AVR32_USER_H - -#include -#include -#include - -/* - * Core file format: The core file is written in such a way that gdb - * can understand it and provide useful information to the user (under - * linux we use the `trad-core' bfd). The file contents are as follows: - * - * upage: 1 page consisting of a user struct that tells gdb - * what is present in the file. Directly after this is a - * copy of the task_struct, which is currently not used by gdb, - * but it may come in handy at some point. All of the registers - * are stored as part of the upage. The upage should always be - * only one page long. - * data: The data segment follows next. We use current->end_text to - * current->brk to pick up all of the user variables, plus any memory - * that may have been sbrk'ed. No attempt is made to determine if a - * page is demand-zero or if a page is totally unused, we just cover - * the entire range. All of the addresses are rounded in such a way - * that an integral number of pages is written. - * stack: We need the stack information in order to get a meaningful - * backtrace. We need to write the data from usp to - * current->start_stack, so we round each of these in order to be able - * to write an integer number of pages. - */ - -struct user_fpu_struct { - /* We have no FPU (yet) */ -}; - -struct user { - struct pt_regs regs; /* entire machine state */ - size_t u_tsize; /* text size (pages) */ - size_t u_dsize; /* data size (pages) */ - size_t u_ssize; /* stack size (pages) */ - unsigned long start_code; /* text starting address */ - unsigned long start_data; /* data starting address */ - unsigned long start_stack; /* stack starting address */ - long int signal; /* signal causing core dump */ - unsigned long u_ar0; /* help gdb find registers */ - unsigned long magic; /* identifies a core file */ - char u_comm[32]; /* user command name */ -}; - -#define NBPG PAGE_SIZE -#define UPAGES 1 -#define HOST_TEXT_START_ADDR (u.start_code) -#define HOST_DATA_START_ADDR (u.start_data) -#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) - -#endif /* __ASM_AVR32_USER_H */ diff --git a/include/asm-avr32/xor.h b/include/asm-avr32/xor.h deleted file mode 100644 index 99c87aa..0000000 --- a/include/asm-avr32/xor.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_XOR_H -#define _ASM_XOR_H - -#include - -#endif -- cgit v1.1 From 39b986a6c73434d122967dc86efb295ab9a28437 Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Tue, 5 Aug 2008 18:16:57 +0200 Subject: ide: sanitize struct ide_port_ops documentation (take 2) v2: Add missing '@'-s. (Noticed by Randy Dunlap) Cc: Randy Dunlap Signed-off-by: Bartlomiej Zolnierkiewicz --- include/linux/ide.h | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/ide.h b/include/linux/ide.h index b846bc4..b1fb15f 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -509,24 +509,33 @@ struct ide_tp_ops { extern const struct ide_tp_ops default_tp_ops; +/** + * struct ide_port_ops - IDE port operations + * + * @init_dev: host specific initialization of a device + * @set_pio_mode: routine to program host for PIO mode + * @set_dma_mode: routine to program host for DMA mode + * @selectproc: tweaks hardware to select drive + * @reset_poll: chipset polling based on hba specifics + * @pre_reset: chipset specific changes to default for device-hba resets + * @resetproc: routine to reset controller after a disk reset + * @maskproc: special host masking for drive selection + * @quirkproc: check host's drive quirk list + * + * @mdma_filter: filter MDMA modes + * @udma_filter: filter UDMA modes + * + * @cable_detect: detect cable type + */ struct ide_port_ops { - /* host specific initialization of a device */ void (*init_dev)(ide_drive_t *); - /* routine to program host for PIO mode */ void (*set_pio_mode)(ide_drive_t *, const u8); - /* routine to program host for DMA mode */ void (*set_dma_mode)(ide_drive_t *, const u8); - /* tweaks hardware to select drive */ void (*selectproc)(ide_drive_t *); - /* chipset polling based on hba specifics */ int (*reset_poll)(ide_drive_t *); - /* chipset specific changes to default for device-hba resets */ void (*pre_reset)(ide_drive_t *); - /* routine to reset controller after a disk reset */ void (*resetproc)(ide_drive_t *); - /* special host masking for drive selection */ void (*maskproc)(ide_drive_t *, int); - /* check host's drive quirk list */ void (*quirkproc)(ide_drive_t *); u8 (*mdma_filter)(ide_drive_t *); -- cgit v1.1 From c5bfc3757f1d843a8e1261840c1f53c5062f8e92 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Tue, 5 Aug 2008 18:17:01 +0200 Subject: ide: remove CONFIG_IDE_MAX_HWIFS The benefits of a user settable CONFIG_IDE_MAX_HWIFS have become pretty tiny and are no longer considered worth the trouble of an own option. Simply always #define MAX_HWIFS to 10. Signed-off-by: Adrian Bunk Signed-off-by: Bartlomiej Zolnierkiewicz --- include/linux/ide.h | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/ide.h b/include/linux/ide.h index b1fb15f..87c12ed 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -219,18 +219,7 @@ static inline int __ide_default_irq(unsigned long base) #include #endif -#ifndef MAX_HWIFS -#if defined(CONFIG_BLACKFIN) || defined(CONFIG_H8300) || defined(CONFIG_XTENSA) -# define MAX_HWIFS 1 -#else -# define MAX_HWIFS 10 -#endif -#endif - -#if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED) -#undef MAX_HWIFS -#define MAX_HWIFS CONFIG_IDE_MAX_HWIFS -#endif +#define MAX_HWIFS 10 /* Currently only m68k, apus and m8xx need it */ #ifndef IDE_ARCH_ACK_INTR -- cgit v1.1 From c6e2bee26eee190b20cd87e71b288bca6a5357a4 Mon Sep 17 00:00:00 2001 From: Bernhard Walle Date: Tue, 5 Aug 2008 13:01:05 -0700 Subject: kdump: report actual value of VMCOREINFO_OSRELEASE in VMCOREINFO The current implementation reports the structure name as VMCOREINFO_OSRELEASE in VMCOREINFO, e.g. VMCOREINFO_OSRELEASE=init_uts_ns.name.release That doesn't make sense because it's always the same. Instead, use the value, e.g. VMCOREINFO_OSRELEASE=2.6.26-rc3 That's also what the 'makedumpfile -g' does. Signed-off-by: Bernhard Walle Cc: "Ken'ichi Ohmichi" Acked-by: Vivek Goyal Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kexec.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/kexec.h b/include/linux/kexec.h index 82f88a8..32110ce 100644 --- a/include/linux/kexec.h +++ b/include/linux/kexec.h @@ -130,8 +130,8 @@ void vmcoreinfo_append_str(const char *fmt, ...) __attribute__ ((format (printf, 1, 2))); unsigned long paddr_vmcoreinfo_note(void); -#define VMCOREINFO_OSRELEASE(name) \ - vmcoreinfo_append_str("OSRELEASE=%s\n", #name) +#define VMCOREINFO_OSRELEASE(value) \ + vmcoreinfo_append_str("OSRELEASE=%s\n", value) #define VMCOREINFO_PAGESIZE(value) \ vmcoreinfo_append_str("PAGESIZE=%ld\n", value) #define VMCOREINFO_SYMBOL(name) \ -- cgit v1.1 From 60cadec9da7b6c91aca51f408c828f7e74a68379 Mon Sep 17 00:00:00 2001 From: Shadi Ammouri Date: Tue, 5 Aug 2008 13:01:09 -0700 Subject: spi: new orion_spi driver This adds an SPI driver for the SPI controller found in various Marvell Orion ARM SoCs. It currently supports only one slave, which must use SPI mode 0. [dbrownell@users.sourceforge.net: cleanups, meet specs, pass "sparse"] Signed-off-by: Shadi Ammouri Signed-off-by: Saeed Bishara Signed-off-by: Lennert Buytenhek Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/spi/orion_spi.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 include/linux/spi/orion_spi.h (limited to 'include') diff --git a/include/linux/spi/orion_spi.h b/include/linux/spi/orion_spi.h new file mode 100644 index 0000000..b4d9fa6 --- /dev/null +++ b/include/linux/spi/orion_spi.h @@ -0,0 +1,17 @@ +/* + * orion_spi.h + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __LINUX_SPI_ORION_SPI_H +#define __LINUX_SPI_ORION_SPI_H + +struct orion_spi_info { + u32 tclk; /* no support yet */ +}; + + +#endif -- cgit v1.1 From f6ac436dcc4c34709bcde355f3f2254ac0a183d4 Mon Sep 17 00:00:00 2001 From: Mark Asselstine Date: Tue, 5 Aug 2008 13:01:24 -0700 Subject: Remove the deprecated cli() sti() functions These functions have been deprecated for some time now but remained until all legacy callers could be removed. With a few commits in 2.6.26 this has happened so now we can remove these deprecated functions. Signed-off-by: Mark Asselstine Reviewed-by: Matthew Wilcox Cc: Alan Cox Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/interrupt.h | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'include') diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h index 62aa4f8..58ff4e7 100644 --- a/include/linux/interrupt.h +++ b/include/linux/interrupt.h @@ -223,35 +223,6 @@ static inline int disable_irq_wake(unsigned int irq) #define or_softirq_pending(x) (local_softirq_pending() |= (x)) #endif -/* - * Temporary defines for UP kernels, until all code gets fixed. - */ -#ifndef CONFIG_SMP -static inline void __deprecated cli(void) -{ - local_irq_disable(); -} -static inline void __deprecated sti(void) -{ - local_irq_enable(); -} -static inline void __deprecated save_flags(unsigned long *x) -{ - local_save_flags(*x); -} -#define save_flags(x) save_flags(&x) -static inline void __deprecated restore_flags(unsigned long x) -{ - local_irq_restore(x); -} - -static inline void __deprecated save_and_cli(unsigned long *x) -{ - local_irq_save(*x); -} -#define save_and_cli(x) save_and_cli(&x) -#endif /* CONFIG_SMP */ - /* Some architectures might implement lazy enabling/disabling of * interrupts. In some cases, such as stop_machine, we might want * to ensure that after a local_irq_disable(), interrupts have -- cgit v1.1 From efc491814308f89d5ef6c4fe19ae4552a67d4132 Mon Sep 17 00:00:00 2001 From: David Miller Date: Tue, 5 Aug 2008 13:01:25 -0700 Subject: radeon: misc corrections I have a new PCI-E radeon RV380 series card (PCI device ID 5b64) that hangs in my sparc64 boxes when the init scripts set the font. The problem goes away if I disable acceleration. I haven't figured out that bug yet, but along the way I found some corrections to make based upon some auditing. 1) The RB2D_DC_FLUSH_ALL value used by the kernel fb driver and the XORG video driver differ. I've made the kernel match what XORG is using. 2) In radeonfb_engine_reset() we have top-level code structure that roughly looks like: if (family is 300, 350, or V350) do this; else do that; ... if (family is NOT 300, OR family is NOT 350, OR family is NOT V350) do another thing; this last conditional makes no sense, is always true, and obviously was likely meant to be "family is NOT 300, 350, or V350". So I've made the code match the intent. Signed-off-by: David S. Miller Acked-by: Benjamin Herrenschmidt Tested-by: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/video/radeon.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/video/radeon.h b/include/video/radeon.h index 83467e1..95a1f20 100644 --- a/include/video/radeon.h +++ b/include/video/radeon.h @@ -527,8 +527,9 @@ /* DSTCACHE_CTLSTAT bit constants */ -#define RB2D_DC_FLUSH (3 << 0) -#define RB2D_DC_FLUSH_ALL 0xf +#define RB2D_DC_FLUSH_2D (1 << 0) +#define RB2D_DC_FREE_2D (1 << 2) +#define RB2D_DC_FLUSH_ALL (RB2D_DC_FLUSH_2D | RB2D_DC_FREE_2D) #define RB2D_DC_BUSY (1 << 31) -- cgit v1.1 From bf1db69fbf4ff511e88736ce2e6318846f34492b Mon Sep 17 00:00:00 2001 From: Richard Hughes Date: Tue, 5 Aug 2008 13:01:35 -0700 Subject: pm_qos: spelling fixes A documentation cleanup patch. With a minor tweak to clarify units for kbs. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: mark gross Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/pm_qos_params.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pm_qos_params.h b/include/linux/pm_qos_params.h index 2e4e97b..d74f75e 100644 --- a/include/linux/pm_qos_params.h +++ b/include/linux/pm_qos_params.h @@ -1,6 +1,6 @@ /* interface for the pm_qos_power infrastructure of the linux kernel. * - * Mark Gross + * Mark Gross */ #include #include -- cgit v1.1 From 18351070b86d155713cf790b26af4f21b1fd0b29 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 5 Aug 2008 21:42:21 -0700 Subject: Re-introduce "[SCSI] extend the last_sector_bug flag to cover more sectors" This re-introduces commit 2b142900784c6e38c8d39fa57d5f95ef08e735d8, which was reverted due to the regression it caused by commit fca082c9f1e11ec07efa8d2f9f13688521253f36. That regression was not root-caused by the original commit, it was just uncovered by it, and the real fix was done by Alan Stern in commit 580da34847488b404218d1d7f53b156f245f5555 ("Fix USB storage hang on command abort"). We can thus re-introduce the change that was confirmed by Alan Jenkins to be still required by his odd card reader. Cc: Alan Jenkins Cc: Alan Stern Cc: James Bottomley Signed-off-by: Linus Torvalds --- include/scsi/scsi_device.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 9cecc40..291d56a 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -140,7 +140,8 @@ struct scsi_device { unsigned fix_capacity:1; /* READ_CAPACITY is too high by 1 */ unsigned guess_capacity:1; /* READ_CAPACITY might be too high by 1 */ unsigned retry_hwerror:1; /* Retry HARDWARE_ERROR */ - unsigned last_sector_bug:1; /* Always read last sector in a 1 sector read */ + unsigned last_sector_bug:1; /* do not use multisector accesses on + SD_LAST_BUGGY_SECTORS */ DECLARE_BITMAP(supported_events, SDEV_EVT_MAXBITS); /* supported events */ struct list_head event_list; /* asserted events */ -- cgit v1.1 From 2e521061db61a35dd64ea85a1642f9a9dfde2872 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 1 Aug 2008 20:14:50 -0300 Subject: V4L/DVB (8610): Add suspend/resume capabilities to soc_camera. Add suspend/resume hooks to call soc operation specific suspend and resume functions. This ensures the camera chip has been previously resumed, as well as the camera bus. These hooks in camera chip drivers should save/restore chip context between suspend and resume time. Signed-off-by: Robert Jarzmik Signed-off-by: Guennadi Liakhovetski Signed-off-by: Mauro Carvalho Chehab --- include/media/soc_camera.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/media/soc_camera.h b/include/media/soc_camera.h index 1de98f1..d548de3 100644 --- a/include/media/soc_camera.h +++ b/include/media/soc_camera.h @@ -14,6 +14,7 @@ #include #include +#include struct soc_camera_device { struct list_head list; @@ -63,6 +64,8 @@ struct soc_camera_host_ops { struct module *owner; int (*add)(struct soc_camera_device *); void (*remove)(struct soc_camera_device *); + int (*suspend)(struct soc_camera_device *, pm_message_t state); + int (*resume)(struct soc_camera_device *); int (*set_fmt_cap)(struct soc_camera_device *, __u32, struct v4l2_rect *); int (*try_fmt_cap)(struct soc_camera_device *, struct v4l2_format *); @@ -111,6 +114,8 @@ struct soc_camera_ops { struct module *owner; int (*probe)(struct soc_camera_device *); void (*remove)(struct soc_camera_device *); + int (*suspend)(struct soc_camera_device *, pm_message_t state); + int (*resume)(struct soc_camera_device *); int (*init)(struct soc_camera_device *); int (*release)(struct soc_camera_device *); int (*start_capture)(struct soc_camera_device *); -- cgit v1.1 From f780a9f119caa48088b230836a7fa73d1096de7c Mon Sep 17 00:00:00 2001 From: Yevgeny Petrilin Date: Wed, 6 Aug 2008 20:14:06 -0700 Subject: mlx4_core: Add ethernet fields to CQE struct Add ethernet-related fields to struct mlx4_cqe so that the mlx4_en ethernet NIC driver can share the same definition. Signed-off-by: Yevgeny Petrilin Signed-off-by: Roland Dreier --- include/linux/mlx4/cq.h | 36 ++++++++++++++++++++++++------------ 1 file changed, 24 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/mlx4/cq.h b/include/linux/mlx4/cq.h index 071cf96..6f65b2c 100644 --- a/include/linux/mlx4/cq.h +++ b/include/linux/mlx4/cq.h @@ -39,17 +39,18 @@ #include struct mlx4_cqe { - __be32 my_qpn; + __be32 vlan_my_qpn; __be32 immed_rss_invalid; __be32 g_mlpath_rqpn; - u8 sl; - u8 reserved1; + __be16 sl_vid; __be16 rlid; - __be32 ipoib_status; + __be16 status; + u8 ipv6_ext_mask; + u8 badfcs_enc; __be32 byte_cnt; __be16 wqe_index; __be16 checksum; - u8 reserved2[3]; + u8 reserved[3]; u8 owner_sr_opcode; }; @@ -64,6 +65,11 @@ struct mlx4_err_cqe { }; enum { + MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29, + MLX4_CQE_QPN_MASK = 0xffffff, +}; + +enum { MLX4_CQE_OWNER_MASK = 0x80, MLX4_CQE_IS_SEND_MASK = 0x40, MLX4_CQE_OPCODE_MASK = 0x1f @@ -86,13 +92,19 @@ enum { }; enum { - MLX4_CQE_IPOIB_STATUS_IPV4 = 1 << 22, - MLX4_CQE_IPOIB_STATUS_IPV4F = 1 << 23, - MLX4_CQE_IPOIB_STATUS_IPV6 = 1 << 24, - MLX4_CQE_IPOIB_STATUS_IPV4OPT = 1 << 25, - MLX4_CQE_IPOIB_STATUS_TCP = 1 << 26, - MLX4_CQE_IPOIB_STATUS_UDP = 1 << 27, - MLX4_CQE_IPOIB_STATUS_IPOK = 1 << 28, + MLX4_CQE_STATUS_IPV4 = 1 << 6, + MLX4_CQE_STATUS_IPV4F = 1 << 7, + MLX4_CQE_STATUS_IPV6 = 1 << 8, + MLX4_CQE_STATUS_IPV4OPT = 1 << 9, + MLX4_CQE_STATUS_TCP = 1 << 10, + MLX4_CQE_STATUS_UDP = 1 << 11, + MLX4_CQE_STATUS_IPOK = 1 << 12, +}; + +enum { + MLX4_CQE_LLC = 1, + MLX4_CQE_SNAP = 1 << 1, + MLX4_CQE_BAD_FCS = 1 << 4, }; static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd, -- cgit v1.1 From 58750139001bae11a1f9b074f3a9c774fecf5ba8 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Thu, 31 Jul 2008 14:38:07 +1000 Subject: Move all of include/asm-m68knommu to arch/m68knommu/include/asm. With the current kbuild infrastructure in place no other changes are required for this to work. Signed-off-by: Greg Ungerer --- include/asm-m68knommu/Kbuild | 1 - include/asm-m68knommu/MC68328.h | 1266 ---------------- include/asm-m68knommu/MC68332.h | 152 -- include/asm-m68knommu/MC68EZ328.h | 1253 ---------------- include/asm-m68knommu/MC68VZ328.h | 1349 ----------------- include/asm-m68knommu/a.out.h | 1 - include/asm-m68knommu/anchor.h | 112 -- include/asm-m68knommu/atomic.h | 155 -- include/asm-m68knommu/auxvec.h | 4 - include/asm-m68knommu/bitops.h | 336 ----- include/asm-m68knommu/bootinfo.h | 2 - include/asm-m68knommu/bootstd.h | 132 -- include/asm-m68knommu/bug.h | 4 - include/asm-m68knommu/bugs.h | 16 - include/asm-m68knommu/byteorder.h | 27 - include/asm-m68knommu/cache.h | 12 - include/asm-m68knommu/cachectl.h | 1 - include/asm-m68knommu/cacheflush.h | 84 -- include/asm-m68knommu/checksum.h | 132 -- include/asm-m68knommu/coldfire.h | 51 - include/asm-m68knommu/commproc.h | 703 --------- include/asm-m68knommu/cputime.h | 6 - include/asm-m68knommu/current.h | 24 - include/asm-m68knommu/dbg.h | 6 - include/asm-m68knommu/delay.h | 76 - include/asm-m68knommu/device.h | 7 - include/asm-m68knommu/div64.h | 1 - include/asm-m68knommu/dma-mapping.h | 10 - include/asm-m68knommu/dma.h | 494 ------- include/asm-m68knommu/elf.h | 110 -- include/asm-m68knommu/elia.h | 41 - include/asm-m68knommu/emergency-restart.h | 6 - include/asm-m68knommu/entry.h | 182 --- include/asm-m68knommu/errno.h | 1 - include/asm-m68knommu/fb.h | 12 - include/asm-m68knommu/fcntl.h | 1 - include/asm-m68knommu/flat.h | 17 - include/asm-m68knommu/fpu.h | 21 - include/asm-m68knommu/futex.h | 6 - include/asm-m68knommu/hardirq.h | 27 - include/asm-m68knommu/hw_irq.h | 4 - include/asm-m68knommu/hwtest.h | 1 - include/asm-m68knommu/io.h | 194 --- include/asm-m68knommu/ioctl.h | 1 - include/asm-m68knommu/ioctls.h | 1 - include/asm-m68knommu/ipcbuf.h | 1 - include/asm-m68knommu/irq.h | 26 - include/asm-m68knommu/irq_regs.h | 1 - include/asm-m68knommu/kdebug.h | 1 - include/asm-m68knommu/kmap_types.h | 21 - include/asm-m68knommu/linkage.h | 1 - include/asm-m68knommu/local.h | 6 - include/asm-m68knommu/m5206sim.h | 131 -- include/asm-m68knommu/m520xsim.h | 63 - include/asm-m68knommu/m523xsim.h | 45 - include/asm-m68knommu/m5249sim.h | 209 --- include/asm-m68knommu/m5272sim.h | 78 - include/asm-m68knommu/m527xsim.h | 74 - include/asm-m68knommu/m528xsim.h | 159 -- include/asm-m68knommu/m5307sim.h | 181 --- include/asm-m68knommu/m532xsim.h | 2238 ----------------------------- include/asm-m68knommu/m5407sim.h | 157 -- include/asm-m68knommu/m68360.h | 13 - include/asm-m68knommu/m68360_enet.h | 177 --- include/asm-m68knommu/m68360_pram.h | 431 ------ include/asm-m68knommu/m68360_quicc.h | 362 ----- include/asm-m68knommu/m68360_regs.h | 408 ------ include/asm-m68knommu/machdep.h | 26 - include/asm-m68knommu/math-emu.h | 1 - include/asm-m68knommu/mc146818rtc.h | 9 - include/asm-m68knommu/mcfcache.h | 150 -- include/asm-m68knommu/mcfdma.h | 144 -- include/asm-m68knommu/mcfmbus.h | 77 - include/asm-m68knommu/mcfne.h | 325 ----- include/asm-m68knommu/mcfpci.h | 119 -- include/asm-m68knommu/mcfpit.h | 64 - include/asm-m68knommu/mcfsim.h | 126 -- include/asm-m68knommu/mcfsmc.h | 187 --- include/asm-m68knommu/mcftimer.h | 80 -- include/asm-m68knommu/mcfuart.h | 216 --- include/asm-m68knommu/mcfwdebug.h | 118 -- include/asm-m68knommu/md.h | 1 - include/asm-m68knommu/mman.h | 1 - include/asm-m68knommu/mmu.h | 11 - include/asm-m68knommu/mmu_context.h | 33 - include/asm-m68knommu/module.h | 11 - include/asm-m68knommu/movs.h | 1 - include/asm-m68knommu/msgbuf.h | 1 - include/asm-m68knommu/mutex.h | 9 - include/asm-m68knommu/nettel.h | 108 -- include/asm-m68knommu/openprom.h | 1 - include/asm-m68knommu/oplib.h | 1 - include/asm-m68knommu/page.h | 77 - include/asm-m68knommu/page_offset.h | 5 - include/asm-m68knommu/param.h | 22 - include/asm-m68knommu/pci.h | 29 - include/asm-m68knommu/percpu.h | 6 - include/asm-m68knommu/pgalloc.h | 8 - include/asm-m68knommu/pgtable.h | 70 - include/asm-m68knommu/poll.h | 1 - include/asm-m68knommu/posix_types.h | 1 - include/asm-m68knommu/processor.h | 143 -- include/asm-m68knommu/ptrace.h | 87 -- include/asm-m68knommu/quicc_simple.h | 52 - include/asm-m68knommu/resource.h | 1 - include/asm-m68knommu/rtc.h | 1 - include/asm-m68knommu/scatterlist.h | 22 - include/asm-m68knommu/sections.h | 7 - include/asm-m68knommu/segment.h | 51 - include/asm-m68knommu/sembuf.h | 1 - include/asm-m68knommu/setup.h | 10 - include/asm-m68knommu/shm.h | 1 - include/asm-m68knommu/shmbuf.h | 1 - include/asm-m68knommu/shmparam.h | 1 - include/asm-m68knommu/sigcontext.h | 17 - include/asm-m68knommu/siginfo.h | 6 - include/asm-m68knommu/signal.h | 159 -- include/asm-m68knommu/smp.h | 1 - include/asm-m68knommu/socket.h | 1 - include/asm-m68knommu/sockios.h | 1 - include/asm-m68knommu/spinlock.h | 1 - include/asm-m68knommu/stat.h | 1 - include/asm-m68knommu/statfs.h | 1 - include/asm-m68knommu/string.h | 126 -- include/asm-m68knommu/system.h | 324 ----- include/asm-m68knommu/termbits.h | 1 - include/asm-m68knommu/termios.h | 1 - include/asm-m68knommu/thread_info.h | 98 -- include/asm-m68knommu/timex.h | 23 - include/asm-m68knommu/tlb.h | 1 - include/asm-m68knommu/tlbflush.h | 55 - include/asm-m68knommu/topology.h | 6 - include/asm-m68knommu/traps.h | 154 -- include/asm-m68knommu/types.h | 1 - include/asm-m68knommu/uaccess.h | 181 --- include/asm-m68knommu/ucontext.h | 32 - include/asm-m68knommu/unaligned.h | 25 - include/asm-m68knommu/unistd.h | 366 ----- include/asm-m68knommu/user.h | 1 - 139 files changed, 15825 deletions(-) delete mode 100644 include/asm-m68knommu/Kbuild delete mode 100644 include/asm-m68knommu/MC68328.h delete mode 100644 include/asm-m68knommu/MC68332.h delete mode 100644 include/asm-m68knommu/MC68EZ328.h delete mode 100644 include/asm-m68knommu/MC68VZ328.h delete mode 100644 include/asm-m68knommu/a.out.h delete mode 100644 include/asm-m68knommu/anchor.h delete mode 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100644 include/asm-m68knommu/termbits.h delete mode 100644 include/asm-m68knommu/termios.h delete mode 100644 include/asm-m68knommu/thread_info.h delete mode 100644 include/asm-m68knommu/timex.h delete mode 100644 include/asm-m68knommu/tlb.h delete mode 100644 include/asm-m68knommu/tlbflush.h delete mode 100644 include/asm-m68knommu/topology.h delete mode 100644 include/asm-m68knommu/traps.h delete mode 100644 include/asm-m68knommu/types.h delete mode 100644 include/asm-m68knommu/uaccess.h delete mode 100644 include/asm-m68knommu/ucontext.h delete mode 100644 include/asm-m68knommu/unaligned.h delete mode 100644 include/asm-m68knommu/unistd.h delete mode 100644 include/asm-m68knommu/user.h (limited to 'include') diff --git a/include/asm-m68knommu/Kbuild b/include/asm-m68knommu/Kbuild deleted file mode 100644 index c68e168..0000000 --- a/include/asm-m68knommu/Kbuild +++ /dev/null @@ -1 +0,0 @@ -include include/asm-generic/Kbuild.asm diff --git a/include/asm-m68knommu/MC68328.h b/include/asm-m68knommu/MC68328.h deleted file mode 100644 index a337e56..0000000 --- a/include/asm-m68knommu/MC68328.h +++ /dev/null @@ -1,1266 +0,0 @@ - -/* include/asm-m68knommu/MC68328.h: '328 control registers - * - * Copyright (C) 1999 Vladimir Gurevich - * Bear & Hare Software, Inc. - * - * Based on include/asm-m68knommu/MC68332.h - * Copyright (C) 1998 Kenneth Albanowski , - * - */ - -#ifndef _MC68328_H_ -#define _MC68328_H_ - -#define BYTE_REF(addr) (*((volatile unsigned char*)addr)) -#define WORD_REF(addr) (*((volatile unsigned short*)addr)) -#define LONG_REF(addr) (*((volatile unsigned long*)addr)) - -#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK) -#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT) - -/********** - * - * 0xFFFFF0xx -- System Control - * - **********/ - -/* - * System Control Register (SCR) - */ -#define SCR_ADDR 0xfffff000 -#define SCR BYTE_REF(SCR_ADDR) - -#define SCR_WDTH8 0x01 /* 8-Bit Width Select */ -#define SCR_DMAP 0x04 /* Double Map */ -#define SCR_SO 0x08 /* Supervisor Only */ -#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */ -#define SCR_PRV 0x20 /* Privilege Violation */ -#define SCR_WPV 0x40 /* Write Protect Violation */ -#define SCR_BETO 0x80 /* Bus-Error TimeOut */ - -/* - * Mask Revision Register - */ -#define MRR_ADDR 0xfffff004 -#define MRR LONG_REF(MRR_ADDR) - -/********** - * - * 0xFFFFF1xx -- Chip-Select logic - * - **********/ - -/********** - * - * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control - * - **********/ - -/* - * Group Base Address Registers - */ -#define GRPBASEA_ADDR 0xfffff100 -#define GRPBASEB_ADDR 0xfffff102 -#define GRPBASEC_ADDR 0xfffff104 -#define GRPBASED_ADDR 0xfffff106 - -#define GRPBASEA WORD_REF(GRPBASEA_ADDR) -#define GRPBASEB WORD_REF(GRPBASEB_ADDR) -#define GRPBASEC WORD_REF(GRPBASEC_ADDR) -#define GRPBASED WORD_REF(GRPBASED_ADDR) - -#define GRPBASE_V 0x0001 /* Valid */ -#define GRPBASE_GBA_MASK 0xfff0 /* Group Base Address (bits 31-20) */ - -/* - * Group Base Address Mask Registers - */ -#define GRPMASKA_ADDR 0xfffff108 -#define GRPMASKB_ADDR 0xfffff10a -#define GRPMASKC_ADDR 0xfffff10c -#define GRPMASKD_ADDR 0xfffff10e - -#define GRPMASKA WORD_REF(GRPMASKA_ADDR) -#define GRPMASKB WORD_REF(GRPMASKB_ADDR) -#define GRPMASKC WORD_REF(GRPMASKC_ADDR) -#define GRPMASKD WORD_REF(GRPMASKD_ADDR) - -#define GRMMASK_GMA_MASK 0xfffff0 /* Group Base Mask (bits 31-20) */ - -/* - * Chip-Select Option Registers (group A) - */ -#define CSA0_ADDR 0xfffff110 -#define CSA1_ADDR 0xfffff114 -#define CSA2_ADDR 0xfffff118 -#define CSA3_ADDR 0xfffff11c - -#define CSA0 LONG_REF(CSA0_ADDR) -#define CSA1 LONG_REF(CSA1_ADDR) -#define CSA2 LONG_REF(CSA2_ADDR) -#define CSA3 LONG_REF(CSA3_ADDR) - -#define CSA_WAIT_MASK 0x00000007 /* Wait State Selection */ -#define CSA_WAIT_SHIFT 0 -#define CSA_RO 0x00000008 /* Read-Only */ -#define CSA_AM_MASK 0x0000ff00 /* Address Mask (bits 23-16) */ -#define CSA_AM_SHIFT 8 -#define CSA_BUSW 0x00010000 /* Bus Width Select */ -#define CSA_AC_MASK 0xff000000 /* Address Compare (bits 23-16) */ -#define CSA_AC_SHIFT 24 - -/* - * Chip-Select Option Registers (group B) - */ -#define CSB0_ADDR 0xfffff120 -#define CSB1_ADDR 0xfffff124 -#define CSB2_ADDR 0xfffff128 -#define CSB3_ADDR 0xfffff12c - -#define CSB0 LONG_REF(CSB0_ADDR) -#define CSB1 LONG_REF(CSB1_ADDR) -#define CSB2 LONG_REF(CSB2_ADDR) -#define CSB3 LONG_REF(CSB3_ADDR) - -#define CSB_WAIT_MASK 0x00000007 /* Wait State Selection */ -#define CSB_WAIT_SHIFT 0 -#define CSB_RO 0x00000008 /* Read-Only */ -#define CSB_AM_MASK 0x0000ff00 /* Address Mask (bits 23-16) */ -#define CSB_AM_SHIFT 8 -#define CSB_BUSW 0x00010000 /* Bus Width Select */ -#define CSB_AC_MASK 0xff000000 /* Address Compare (bits 23-16) */ -#define CSB_AC_SHIFT 24 - -/* - * Chip-Select Option Registers (group C) - */ -#define CSC0_ADDR 0xfffff130 -#define CSC1_ADDR 0xfffff134 -#define CSC2_ADDR 0xfffff138 -#define CSC3_ADDR 0xfffff13c - -#define CSC0 LONG_REF(CSC0_ADDR) -#define CSC1 LONG_REF(CSC1_ADDR) -#define CSC2 LONG_REF(CSC2_ADDR) -#define CSC3 LONG_REF(CSC3_ADDR) - -#define CSC_WAIT_MASK 0x00000007 /* Wait State Selection */ -#define CSC_WAIT_SHIFT 0 -#define CSC_RO 0x00000008 /* Read-Only */ -#define CSC_AM_MASK 0x0000fff0 /* Address Mask (bits 23-12) */ -#define CSC_AM_SHIFT 4 -#define CSC_BUSW 0x00010000 /* Bus Width Select */ -#define CSC_AC_MASK 0xfff00000 /* Address Compare (bits 23-12) */ -#define CSC_AC_SHIFT 20 - -/* - * Chip-Select Option Registers (group D) - */ -#define CSD0_ADDR 0xfffff140 -#define CSD1_ADDR 0xfffff144 -#define CSD2_ADDR 0xfffff148 -#define CSD3_ADDR 0xfffff14c - -#define CSD0 LONG_REF(CSD0_ADDR) -#define CSD1 LONG_REF(CSD1_ADDR) -#define CSD2 LONG_REF(CSD2_ADDR) -#define CSD3 LONG_REF(CSD3_ADDR) - -#define CSD_WAIT_MASK 0x00000007 /* Wait State Selection */ -#define CSD_WAIT_SHIFT 0 -#define CSD_RO 0x00000008 /* Read-Only */ -#define CSD_AM_MASK 0x0000fff0 /* Address Mask (bits 23-12) */ -#define CSD_AM_SHIFT 4 -#define CSD_BUSW 0x00010000 /* Bus Width Select */ -#define CSD_AC_MASK 0xfff00000 /* Address Compare (bits 23-12) */ -#define CSD_AC_SHIFT 20 - -/********** - * - * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control - * - **********/ - -/* - * PLL Control Register - */ -#define PLLCR_ADDR 0xfffff200 -#define PLLCR WORD_REF(PLLCR_ADDR) - -#define PLLCR_DISPLL 0x0008 /* Disable PLL */ -#define PLLCR_CLKEN 0x0010 /* Clock (CLKO pin) enable */ -#define PLLCR_SYSCLK_SEL_MASK 0x0700 /* System Clock Selection */ -#define PLLCR_SYSCLK_SEL_SHIFT 8 -#define PLLCR_PIXCLK_SEL_MASK 0x3800 /* LCD Clock Selection */ -#define PLLCR_PIXCLK_SEL_SHIFT 11 - -/* 'EZ328-compatible definitions */ -#define PLLCR_LCDCLK_SEL_MASK PLLCR_PIXCLK_SEL_MASK -#define PLLCR_LCDCLK_SEL_SHIFT PLLCR_PIXCLK_SEL_SHIFT - -/* - * PLL Frequency Select Register - */ -#define PLLFSR_ADDR 0xfffff202 -#define PLLFSR WORD_REF(PLLFSR_ADDR) - -#define PLLFSR_PC_MASK 0x00ff /* P Count */ -#define PLLFSR_PC_SHIFT 0 -#define PLLFSR_QC_MASK 0x0f00 /* Q Count */ -#define PLLFSR_QC_SHIFT 8 -#define PLLFSR_PROT 0x4000 /* Protect P & Q */ -#define PLLFSR_CLK32 0x8000 /* Clock 32 (kHz) */ - -/* - * Power Control Register - */ -#define PCTRL_ADDR 0xfffff207 -#define PCTRL BYTE_REF(PCTRL_ADDR) - -#define PCTRL_WIDTH_MASK 0x1f /* CPU Clock bursts width */ -#define PCTRL_WIDTH_SHIFT 0 -#define PCTRL_STOP 0x40 /* Enter power-save mode immediately */ -#define PCTRL_PCEN 0x80 /* Power Control Enable */ - -/********** - * - * 0xFFFFF3xx -- Interrupt Controller - * - **********/ - -/* - * Interrupt Vector Register - */ -#define IVR_ADDR 0xfffff300 -#define IVR BYTE_REF(IVR_ADDR) - -#define IVR_VECTOR_MASK 0xF8 - -/* - * Interrupt control Register - */ -#define ICR_ADRR 0xfffff302 -#define ICR WORD_REF(ICR_ADDR) - -#define ICR_ET6 0x0100 /* Edge Trigger Select for IRQ6 */ -#define ICR_ET3 0x0200 /* Edge Trigger Select for IRQ3 */ -#define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */ -#define ICR_ET1 0x0800 /* Edge Trigger Select for IRQ1 */ -#define ICR_POL6 0x1000 /* Polarity Control for IRQ6 */ -#define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */ -#define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */ -#define ICR_POL1 0x8000 /* Polarity Control for IRQ1 */ - -/* - * Interrupt Mask Register - */ -#define IMR_ADDR 0xfffff304 -#define IMR LONG_REF(IMR_ADDR) - -/* - * Define the names for bit positions first. This is useful for - * request_irq - */ -#define SPIM_IRQ_NUM 0 /* SPI Master interrupt */ -#define TMR2_IRQ_NUM 1 /* Timer 2 interrupt */ -#define UART_IRQ_NUM 2 /* UART interrupt */ -#define WDT_IRQ_NUM 3 /* Watchdog Timer interrupt */ -#define RTC_IRQ_NUM 4 /* RTC interrupt */ -#define KB_IRQ_NUM 6 /* Keyboard Interrupt */ -#define PWM_IRQ_NUM 7 /* Pulse-Width Modulator int. */ -#define INT0_IRQ_NUM 8 /* External INT0 */ -#define INT1_IRQ_NUM 9 /* External INT1 */ -#define INT2_IRQ_NUM 10 /* External INT2 */ -#define INT3_IRQ_NUM 11 /* External INT3 */ -#define INT4_IRQ_NUM 12 /* External INT4 */ -#define INT5_IRQ_NUM 13 /* External INT5 */ -#define INT6_IRQ_NUM 14 /* External INT6 */ -#define INT7_IRQ_NUM 15 /* External INT7 */ -#define IRQ1_IRQ_NUM 16 /* IRQ1 */ -#define IRQ2_IRQ_NUM 17 /* IRQ2 */ -#define IRQ3_IRQ_NUM 18 /* IRQ3 */ -#define IRQ6_IRQ_NUM 19 /* IRQ6 */ -#define PEN_IRQ_NUM 20 /* Pen Interrupt */ -#define SPIS_IRQ_NUM 21 /* SPI Slave Interrupt */ -#define TMR1_IRQ_NUM 22 /* Timer 1 interrupt */ -#define IRQ7_IRQ_NUM 23 /* IRQ7 */ - -/* '328-compatible definitions */ -#define SPI_IRQ_NUM SPIM_IRQ_NUM -#define TMR_IRQ_NUM TMR1_IRQ_NUM - -/* - * Here go the bitmasks themselves - */ -#define IMR_MSPIM (1 << SPIM _IRQ_NUM) /* Mask SPI Master interrupt */ -#define IMR_MTMR2 (1 << TMR2_IRQ_NUM) /* Mask Timer 2 interrupt */ -#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */ -#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */ -#define IMR_MRTC (1 << RTC_IRQ_NUM) /* Mask RTC interrupt */ -#define IMR_MKB (1 << KB_IRQ_NUM) /* Mask Keyboard Interrupt */ -#define IMR_MPWM (1 << PWM_IRQ_NUM) /* Mask Pulse-Width Modulator int. */ -#define IMR_MINT0 (1 << INT0_IRQ_NUM) /* Mask External INT0 */ -#define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */ -#define IMR_MINT2 (1 << INT2_IRQ_NUM) /* Mask External INT2 */ -#define IMR_MINT3 (1 << INT3_IRQ_NUM) /* Mask External INT3 */ -#define IMR_MINT4 (1 << INT4_IRQ_NUM) /* Mask External INT4 */ -#define IMR_MINT5 (1 << INT5_IRQ_NUM) /* Mask External INT5 */ -#define IMR_MINT6 (1 << INT6_IRQ_NUM) /* Mask External INT6 */ -#define IMR_MINT7 (1 << INT7_IRQ_NUM) /* Mask External INT7 */ -#define IMR_MIRQ1 (1 << IRQ1_IRQ_NUM) /* Mask IRQ1 */ -#define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */ -#define IMR_MIRQ3 (1 << IRQ3_IRQ_NUM) /* Mask IRQ3 */ -#define IMR_MIRQ6 (1 << IRQ6_IRQ_NUM) /* Mask IRQ6 */ -#define IMR_MPEN (1 << PEN_IRQ_NUM) /* Mask Pen Interrupt */ -#define IMR_MSPIS (1 << SPIS_IRQ_NUM) /* Mask SPI Slave Interrupt */ -#define IMR_MTMR1 (1 << TMR1_IRQ_NUM) /* Mask Timer 1 interrupt */ -#define IMR_MIRQ7 (1 << IRQ7_IRQ_NUM) /* Mask IRQ7 */ - -/* 'EZ328-compatible definitions */ -#define IMR_MSPI IMR_MSPIM -#define IMR_MTMR IMR_MTMR1 - -/* - * Interrupt Wake-Up Enable Register - */ -#define IWR_ADDR 0xfffff308 -#define IWR LONG_REF(IWR_ADDR) - -#define IWR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ -#define IWR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ -#define IWR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define IWR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define IWR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define IWR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define IWR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator int. */ -#define IWR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define IWR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define IWR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define IWR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define IWR_INT4 (1 << INT4_IRQ_NUM) /* External INT4 */ -#define IWR_INT5 (1 << INT5_IRQ_NUM) /* External INT5 */ -#define IWR_INT6 (1 << INT6_IRQ_NUM) /* External INT6 */ -#define IWR_INT7 (1 << INT7_IRQ_NUM) /* External INT7 */ -#define IWR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define IWR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define IWR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define IWR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define IWR_PEN (1 << PEN_IRQ_NUM) /* Pen Interrupt */ -#define IWR_SPIS (1 << SPIS_IRQ_NUM) /* SPI Slave Interrupt */ -#define IWR_TMR1 (1 << TMR1_IRQ_NUM) /* Timer 1 interrupt */ -#define IWR_IRQ7 (1 << IRQ7_IRQ_NUM) /* IRQ7 */ - -/* - * Interrupt Status Register - */ -#define ISR_ADDR 0xfffff30c -#define ISR LONG_REF(ISR_ADDR) - -#define ISR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ -#define ISR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ -#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define ISR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define ISR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define ISR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator int. */ -#define ISR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define ISR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define ISR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define ISR_INT4 (1 << INT4_IRQ_NUM) /* External INT4 */ -#define ISR_INT5 (1 << INT5_IRQ_NUM) /* External INT5 */ -#define ISR_INT6 (1 << INT6_IRQ_NUM) /* External INT6 */ -#define ISR_INT7 (1 << INT7_IRQ_NUM) /* External INT7 */ -#define ISR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define ISR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define ISR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define ISR_PEN (1 << PEN_IRQ_NUM) /* Pen Interrupt */ -#define ISR_SPIS (1 << SPIS_IRQ_NUM) /* SPI Slave Interrupt */ -#define ISR_TMR1 (1 << TMR1_IRQ_NUM) /* Timer 1 interrupt */ -#define ISR_IRQ7 (1 << IRQ7_IRQ_NUM) /* IRQ7 */ - -/* 'EZ328-compatible definitions */ -#define ISR_SPI ISR_SPIM -#define ISR_TMR ISR_TMR1 - -/* - * Interrupt Pending Register - */ -#define IPR_ADDR 0xfffff310 -#define IPR LONG_REF(IPR_ADDR) - -#define IPR_SPIM (1 << SPIM _IRQ_NUM) /* SPI Master interrupt */ -#define IPR_TMR2 (1 << TMR2_IRQ_NUM) /* Timer 2 interrupt */ -#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define IPR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define IPR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define IPR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator int. */ -#define IPR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define IPR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define IPR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define IPR_INT4 (1 << INT4_IRQ_NUM) /* External INT4 */ -#define IPR_INT5 (1 << INT5_IRQ_NUM) /* External INT5 */ -#define IPR_INT6 (1 << INT6_IRQ_NUM) /* External INT6 */ -#define IPR_INT7 (1 << INT7_IRQ_NUM) /* External INT7 */ -#define IPR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define IPR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define IPR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define IPR_PEN (1 << PEN_IRQ_NUM) /* Pen Interrupt */ -#define IPR_SPIS (1 << SPIS_IRQ_NUM) /* SPI Slave Interrupt */ -#define IPR_TMR1 (1 << TMR1_IRQ_NUM) /* Timer 1 interrupt */ -#define IPR_IRQ7 (1 << IRQ7_IRQ_NUM) /* IRQ7 */ - -/* 'EZ328-compatible definitions */ -#define IPR_SPI IPR_SPIM -#define IPR_TMR IPR_TMR1 - -/********** - * - * 0xFFFFF4xx -- Parallel Ports - * - **********/ - -/* - * Port A - */ -#define PADIR_ADDR 0xfffff400 /* Port A direction reg */ -#define PADATA_ADDR 0xfffff401 /* Port A data register */ -#define PASEL_ADDR 0xfffff403 /* Port A Select register */ - -#define PADIR BYTE_REF(PADIR_ADDR) -#define PADATA BYTE_REF(PADATA_ADDR) -#define PASEL BYTE_REF(PASEL_ADDR) - -#define PA(x) (1 << (x)) -#define PA_A(x) PA((x) - 16) /* This is specific to PA only! */ - -#define PA_A16 PA(0) /* Use A16 as PA(0) */ -#define PA_A17 PA(1) /* Use A17 as PA(1) */ -#define PA_A18 PA(2) /* Use A18 as PA(2) */ -#define PA_A19 PA(3) /* Use A19 as PA(3) */ -#define PA_A20 PA(4) /* Use A20 as PA(4) */ -#define PA_A21 PA(5) /* Use A21 as PA(5) */ -#define PA_A22 PA(6) /* Use A22 as PA(6) */ -#define PA_A23 PA(7) /* Use A23 as PA(7) */ - -/* - * Port B - */ -#define PBDIR_ADDR 0xfffff408 /* Port B direction reg */ -#define PBDATA_ADDR 0xfffff409 /* Port B data register */ -#define PBSEL_ADDR 0xfffff40b /* Port B Select Register */ - -#define PBDIR BYTE_REF(PBDIR_ADDR) -#define PBDATA BYTE_REF(PBDATA_ADDR) -#define PBSEL BYTE_REF(PBSEL_ADDR) - -#define PB(x) (1 << (x)) -#define PB_D(x) PB(x) /* This is specific to port B only */ - -#define PB_D0 PB(0) /* Use D0 as PB(0) */ -#define PB_D1 PB(1) /* Use D1 as PB(1) */ -#define PB_D2 PB(2) /* Use D2 as PB(2) */ -#define PB_D3 PB(3) /* Use D3 as PB(3) */ -#define PB_D4 PB(4) /* Use D4 as PB(4) */ -#define PB_D5 PB(5) /* Use D5 as PB(5) */ -#define PB_D6 PB(6) /* Use D6 as PB(6) */ -#define PB_D7 PB(7) /* Use D7 as PB(7) */ - -/* - * Port C - */ -#define PCDIR_ADDR 0xfffff410 /* Port C direction reg */ -#define PCDATA_ADDR 0xfffff411 /* Port C data register */ -#define PCSEL_ADDR 0xfffff413 /* Port C Select Register */ - -#define PCDIR BYTE_REF(PCDIR_ADDR) -#define PCDATA BYTE_REF(PCDATA_ADDR) -#define PCSEL BYTE_REF(PCSEL_ADDR) - -#define PC(x) (1 << (x)) - -#define PC_WE PC(6) /* Use WE as PC(6) */ -#define PC_DTACK PC(5) /* Use DTACK as PC(5) */ -#define PC_IRQ7 PC(4) /* Use IRQ7 as PC(4) */ -#define PC_LDS PC(2) /* Use LDS as PC(2) */ -#define PC_UDS PC(1) /* Use UDS as PC(1) */ -#define PC_MOCLK PC(0) /* Use MOCLK as PC(0) */ - -/* - * Port D - */ -#define PDDIR_ADDR 0xfffff418 /* Port D direction reg */ -#define PDDATA_ADDR 0xfffff419 /* Port D data register */ -#define PDPUEN_ADDR 0xfffff41a /* Port D Pull-Up enable reg */ -#define PDPOL_ADDR 0xfffff41c /* Port D Polarity Register */ -#define PDIRQEN_ADDR 0xfffff41d /* Port D IRQ enable register */ -#define PDIQEG_ADDR 0xfffff41f /* Port D IRQ Edge Register */ - -#define PDDIR BYTE_REF(PDDIR_ADDR) -#define PDDATA BYTE_REF(PDDATA_ADDR) -#define PDPUEN BYTE_REF(PDPUEN_ADDR) -#define PDPOL BYTE_REF(PDPOL_ADDR) -#define PDIRQEN BYTE_REF(PDIRQEN_ADDR) -#define PDIQEG BYTE_REF(PDIQEG_ADDR) - -#define PD(x) (1 << (x)) -#define PD_KB(x) PD(x) /* This is specific for Port D only */ - -#define PD_KB0 PD(0) /* Use KB0 as PD(0) */ -#define PD_KB1 PD(1) /* Use KB1 as PD(1) */ -#define PD_KB2 PD(2) /* Use KB2 as PD(2) */ -#define PD_KB3 PD(3) /* Use KB3 as PD(3) */ -#define PD_KB4 PD(4) /* Use KB4 as PD(4) */ -#define PD_KB5 PD(5) /* Use KB5 as PD(5) */ -#define PD_KB6 PD(6) /* Use KB6 as PD(6) */ -#define PD_KB7 PD(7) /* Use KB7 as PD(7) */ - -/* - * Port E - */ -#define PEDIR_ADDR 0xfffff420 /* Port E direction reg */ -#define PEDATA_ADDR 0xfffff421 /* Port E data register */ -#define PEPUEN_ADDR 0xfffff422 /* Port E Pull-Up enable reg */ -#define PESEL_ADDR 0xfffff423 /* Port E Select Register */ - -#define PEDIR BYTE_REF(PEDIR_ADDR) -#define PEDATA BYTE_REF(PEDATA_ADDR) -#define PEPUEN BYTE_REF(PEPUEN_ADDR) -#define PESEL BYTE_REF(PESEL_ADDR) - -#define PE(x) (1 << (x)) - -#define PE_CSA1 PE(1) /* Use CSA1 as PE(1) */ -#define PE_CSA2 PE(2) /* Use CSA2 as PE(2) */ -#define PE_CSA3 PE(3) /* Use CSA3 as PE(3) */ -#define PE_CSB0 PE(4) /* Use CSB0 as PE(4) */ -#define PE_CSB1 PE(5) /* Use CSB1 as PE(5) */ -#define PE_CSB2 PE(6) /* Use CSB2 as PE(6) */ -#define PE_CSB3 PE(7) /* Use CSB3 as PE(7) */ - -/* - * Port F - */ -#define PFDIR_ADDR 0xfffff428 /* Port F direction reg */ -#define PFDATA_ADDR 0xfffff429 /* Port F data register */ -#define PFPUEN_ADDR 0xfffff42a /* Port F Pull-Up enable reg */ -#define PFSEL_ADDR 0xfffff42b /* Port F Select Register */ - -#define PFDIR BYTE_REF(PFDIR_ADDR) -#define PFDATA BYTE_REF(PFDATA_ADDR) -#define PFPUEN BYTE_REF(PFPUEN_ADDR) -#define PFSEL BYTE_REF(PFSEL_ADDR) - -#define PF(x) (1 << (x)) -#define PF_A(x) PF((x) - 24) /* This is Port F specific only */ - -#define PF_A24 PF(0) /* Use A24 as PF(0) */ -#define PF_A25 PF(1) /* Use A25 as PF(1) */ -#define PF_A26 PF(2) /* Use A26 as PF(2) */ -#define PF_A27 PF(3) /* Use A27 as PF(3) */ -#define PF_A28 PF(4) /* Use A28 as PF(4) */ -#define PF_A29 PF(5) /* Use A29 as PF(5) */ -#define PF_A30 PF(6) /* Use A30 as PF(6) */ -#define PF_A31 PF(7) /* Use A31 as PF(7) */ - -/* - * Port G - */ -#define PGDIR_ADDR 0xfffff430 /* Port G direction reg */ -#define PGDATA_ADDR 0xfffff431 /* Port G data register */ -#define PGPUEN_ADDR 0xfffff432 /* Port G Pull-Up enable reg */ -#define PGSEL_ADDR 0xfffff433 /* Port G Select Register */ - -#define PGDIR BYTE_REF(PGDIR_ADDR) -#define PGDATA BYTE_REF(PGDATA_ADDR) -#define PGPUEN BYTE_REF(PGPUEN_ADDR) -#define PGSEL BYTE_REF(PGSEL_ADDR) - -#define PG(x) (1 << (x)) - -#define PG_UART_TXD PG(0) /* Use UART_TXD as PG(0) */ -#define PG_UART_RXD PG(1) /* Use UART_RXD as PG(1) */ -#define PG_PWMOUT PG(2) /* Use PWMOUT as PG(2) */ -#define PG_TOUT2 PG(3) /* Use TOUT2 as PG(3) */ -#define PG_TIN2 PG(4) /* Use TIN2 as PG(4) */ -#define PG_TOUT1 PG(5) /* Use TOUT1 as PG(5) */ -#define PG_TIN1 PG(6) /* Use TIN1 as PG(6) */ -#define PG_RTCOUT PG(7) /* Use RTCOUT as PG(7) */ - -/* - * Port J - */ -#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */ -#define PJDATA_ADDR 0xfffff439 /* Port J data register */ -#define PJSEL_ADDR 0xfffff43b /* Port J Select Register */ - -#define PJDIR BYTE_REF(PJDIR_ADDR) -#define PJDATA BYTE_REF(PJDATA_ADDR) -#define PJSEL BYTE_REF(PJSEL_ADDR) - -#define PJ(x) (1 << (x)) - -#define PJ_CSD3 PJ(7) /* Use CSD3 as PJ(7) */ - -/* - * Port K - */ -#define PKDIR_ADDR 0xfffff440 /* Port K direction reg */ -#define PKDATA_ADDR 0xfffff441 /* Port K data register */ -#define PKPUEN_ADDR 0xfffff442 /* Port K Pull-Up enable reg */ -#define PKSEL_ADDR 0xfffff443 /* Port K Select Register */ - -#define PKDIR BYTE_REF(PKDIR_ADDR) -#define PKDATA BYTE_REF(PKDATA_ADDR) -#define PKPUEN BYTE_REF(PKPUEN_ADDR) -#define PKSEL BYTE_REF(PKSEL_ADDR) - -#define PK(x) (1 << (x)) - -/* - * Port M - */ -#define PMDIR_ADDR 0xfffff438 /* Port M direction reg */ -#define PMDATA_ADDR 0xfffff439 /* Port M data register */ -#define PMPUEN_ADDR 0xfffff43a /* Port M Pull-Up enable reg */ -#define PMSEL_ADDR 0xfffff43b /* Port M Select Register */ - -#define PMDIR BYTE_REF(PMDIR_ADDR) -#define PMDATA BYTE_REF(PMDATA_ADDR) -#define PMPUEN BYTE_REF(PMPUEN_ADDR) -#define PMSEL BYTE_REF(PMSEL_ADDR) - -#define PM(x) (1 << (x)) - -/********** - * - * 0xFFFFF5xx -- Pulse-Width Modulator (PWM) - * - **********/ - -/* - * PWM Control Register - */ -#define PWMC_ADDR 0xfffff500 -#define PWMC WORD_REF(PWMC_ADDR) - -#define PWMC_CLKSEL_MASK 0x0007 /* Clock Selection */ -#define PWMC_CLKSEL_SHIFT 0 -#define PWMC_PWMEN 0x0010 /* Enable PWM */ -#define PMNC_POL 0x0020 /* PWM Output Bit Polarity */ -#define PWMC_PIN 0x0080 /* Current PWM output pin status */ -#define PWMC_LOAD 0x0100 /* Force a new period */ -#define PWMC_IRQEN 0x4000 /* Interrupt Request Enable */ -#define PWMC_CLKSRC 0x8000 /* Clock Source Select */ - -/* 'EZ328-compatible definitions */ -#define PWMC_EN PWMC_PWMEN - -/* - * PWM Period Register - */ -#define PWMP_ADDR 0xfffff502 -#define PWMP WORD_REF(PWMP_ADDR) - -/* - * PWM Width Register - */ -#define PWMW_ADDR 0xfffff504 -#define PWMW WORD_REF(PWMW_ADDR) - -/* - * PWM Counter Register - */ -#define PWMCNT_ADDR 0xfffff506 -#define PWMCNT WORD_REF(PWMCNT_ADDR) - -/********** - * - * 0xFFFFF6xx -- General-Purpose Timers - * - **********/ - -/* - * Timer Unit 1 and 2 Control Registers - */ -#define TCTL1_ADDR 0xfffff600 -#define TCTL1 WORD_REF(TCTL1_ADDR) -#define TCTL2_ADDR 0xfffff60c -#define TCTL2 WORD_REF(TCTL2_ADDR) - -#define TCTL_TEN 0x0001 /* Timer Enable */ -#define TCTL_CLKSOURCE_MASK 0x000e /* Clock Source: */ -#define TCTL_CLKSOURCE_STOP 0x0000 /* Stop count (disabled) */ -#define TCTL_CLKSOURCE_SYSCLK 0x0002 /* SYSCLK to prescaler */ -#define TCTL_CLKSOURCE_SYSCLK_16 0x0004 /* SYSCLK/16 to prescaler */ -#define TCTL_CLKSOURCE_TIN 0x0006 /* TIN to prescaler */ -#define TCTL_CLKSOURCE_32KHZ 0x0008 /* 32kHz clock to prescaler */ -#define TCTL_IRQEN 0x0010 /* IRQ Enable */ -#define TCTL_OM 0x0020 /* Output Mode */ -#define TCTL_CAP_MASK 0x00c0 /* Capture Edge: */ -#define TCTL_CAP_RE 0x0040 /* Capture on rizing edge */ -#define TCTL_CAP_FE 0x0080 /* Capture on falling edge */ -#define TCTL_FRR 0x0010 /* Free-Run Mode */ - -/* 'EZ328-compatible definitions */ -#define TCTL_ADDR TCTL1_ADDR -#define TCTL TCTL1 - -/* - * Timer Unit 1 and 2 Prescaler Registers - */ -#define TPRER1_ADDR 0xfffff602 -#define TPRER1 WORD_REF(TPRER1_ADDR) -#define TPRER2_ADDR 0xfffff60e -#define TPRER2 WORD_REF(TPRER2_ADDR) - -/* 'EZ328-compatible definitions */ -#define TPRER_ADDR TPRER1_ADDR -#define TPRER TPRER1 - -/* - * Timer Unit 1 and 2 Compare Registers - */ -#define TCMP1_ADDR 0xfffff604 -#define TCMP1 WORD_REF(TCMP1_ADDR) -#define TCMP2_ADDR 0xfffff610 -#define TCMP2 WORD_REF(TCMP2_ADDR) - -/* 'EZ328-compatible definitions */ -#define TCMP_ADDR TCMP1_ADDR -#define TCMP TCMP1 - -/* - * Timer Unit 1 and 2 Capture Registers - */ -#define TCR1_ADDR 0xfffff606 -#define TCR1 WORD_REF(TCR1_ADDR) -#define TCR2_ADDR 0xfffff612 -#define TCR2 WORD_REF(TCR2_ADDR) - -/* 'EZ328-compatible definitions */ -#define TCR_ADDR TCR1_ADDR -#define TCR TCR1 - -/* - * Timer Unit 1 and 2 Counter Registers - */ -#define TCN1_ADDR 0xfffff608 -#define TCN1 WORD_REF(TCN1_ADDR) -#define TCN2_ADDR 0xfffff614 -#define TCN2 WORD_REF(TCN2_ADDR) - -/* 'EZ328-compatible definitions */ -#define TCN_ADDR TCN1_ADDR -#define TCN TCN - -/* - * Timer Unit 1 and 2 Status Registers - */ -#define TSTAT1_ADDR 0xfffff60a -#define TSTAT1 WORD_REF(TSTAT1_ADDR) -#define TSTAT2_ADDR 0xfffff616 -#define TSTAT2 WORD_REF(TSTAT2_ADDR) - -#define TSTAT_COMP 0x0001 /* Compare Event occurred */ -#define TSTAT_CAPT 0x0001 /* Capture Event occurred */ - -/* 'EZ328-compatible definitions */ -#define TSTAT_ADDR TSTAT1_ADDR -#define TSTAT TSTAT1 - -/* - * Watchdog Compare Register - */ -#define WRR_ADDR 0xfffff61a -#define WRR WORD_REF(WRR_ADDR) - -/* - * Watchdog Counter Register - */ -#define WCN_ADDR 0xfffff61c -#define WCN WORD_REF(WCN_ADDR) - -/* - * Watchdog Control and Status Register - */ -#define WCSR_ADDR 0xfffff618 -#define WCSR WORD_REF(WCSR_ADDR) - -#define WCSR_WDEN 0x0001 /* Watchdog Enable */ -#define WCSR_FI 0x0002 /* Forced Interrupt (instead of SW reset)*/ -#define WCSR_WRST 0x0004 /* Watchdog Reset */ - -/********** - * - * 0xFFFFF7xx -- Serial Periferial Interface Slave (SPIS) - * - **********/ - -/* - * SPI Slave Register - */ -#define SPISR_ADDR 0xfffff700 -#define SPISR WORD_REF(SPISR_ADDR) - -#define SPISR_DATA_ADDR 0xfffff701 -#define SPISR_DATA BYTE_REF(SPISR_DATA_ADDR) - -#define SPISR_DATA_MASK 0x00ff /* Shifted data from the external device */ -#define SPISR_DATA_SHIFT 0 -#define SPISR_SPISEN 0x0100 /* SPIS module enable */ -#define SPISR_POL 0x0200 /* SPSCLK polarity control */ -#define SPISR_PHA 0x0400 /* Phase relationship between SPSCLK & SPSRxD */ -#define SPISR_OVWR 0x0800 /* Data buffer has been overwritten */ -#define SPISR_DATARDY 0x1000 /* Data ready */ -#define SPISR_ENPOL 0x2000 /* Enable Polarity */ -#define SPISR_IRQEN 0x4000 /* SPIS IRQ Enable */ -#define SPISR_SPISIRQ 0x8000 /* SPIS IRQ posted */ - -/********** - * - * 0xFFFFF8xx -- Serial Periferial Interface Master (SPIM) - * - **********/ - -/* - * SPIM Data Register - */ -#define SPIMDATA_ADDR 0xfffff800 -#define SPIMDATA WORD_REF(SPIMDATA_ADDR) - -/* - * SPIM Control/Status Register - */ -#define SPIMCONT_ADDR 0xfffff802 -#define SPIMCONT WORD_REF(SPIMCONT_ADDR) - -#define SPIMCONT_BIT_COUNT_MASK 0x000f /* Transfer Length in Bytes */ -#define SPIMCONT_BIT_COUNT_SHIFT 0 -#define SPIMCONT_POL 0x0010 /* SPMCLK Signel Polarity */ -#define SPIMCONT_PHA 0x0020 /* Clock/Data phase relationship */ -#define SPIMCONT_IRQEN 0x0040 /* IRQ Enable */ -#define SPIMCONT_SPIMIRQ 0x0080 /* Interrupt Request */ -#define SPIMCONT_XCH 0x0100 /* Exchange */ -#define SPIMCONT_RSPIMEN 0x0200 /* Enable SPIM */ -#define SPIMCONT_DATA_RATE_MASK 0xe000 /* SPIM Data Rate */ -#define SPIMCONT_DATA_RATE_SHIFT 13 - -/* 'EZ328-compatible definitions */ -#define SPIMCONT_IRQ SPIMCONT_SPIMIRQ -#define SPIMCONT_ENABLE SPIMCONT_SPIMEN -/********** - * - * 0xFFFFF9xx -- UART - * - **********/ - -/* - * UART Status/Control Register - */ -#define USTCNT_ADDR 0xfffff900 -#define USTCNT WORD_REF(USTCNT_ADDR) - -#define USTCNT_TXAVAILEN 0x0001 /* Transmitter Available Int Enable */ -#define USTCNT_TXHALFEN 0x0002 /* Transmitter Half Empty Int Enable */ -#define USTCNT_TXEMPTYEN 0x0004 /* Transmitter Empty Int Enable */ -#define USTCNT_RXREADYEN 0x0008 /* Receiver Ready Interrupt Enable */ -#define USTCNT_RXHALFEN 0x0010 /* Receiver Half-Full Int Enable */ -#define USTCNT_RXFULLEN 0x0020 /* Receiver Full Interrupt Enable */ -#define USTCNT_CTSDELTAEN 0x0040 /* CTS Delta Interrupt Enable */ -#define USTCNT_GPIODELTAEN 0x0080 /* Old Data Interrupt Enable */ -#define USTCNT_8_7 0x0100 /* Eight or seven-bit transmission */ -#define USTCNT_STOP 0x0200 /* Stop bit transmission */ -#define USTCNT_ODD_EVEN 0x0400 /* Odd Parity */ -#define USTCNT_PARITYEN 0x0800 /* Parity Enable */ -#define USTCNT_CLKMODE 0x1000 /* Clock Mode Select */ -#define USTCNT_TXEN 0x2000 /* Transmitter Enable */ -#define USTCNT_RXEN 0x4000 /* Receiver Enable */ -#define USTCNT_UARTEN 0x8000 /* UART Enable */ - -/* 'EZ328-compatible definitions */ -#define USTCNT_TXAE USTCNT_TXAVAILEN -#define USTCNT_TXHE USTCNT_TXHALFEN -#define USTCNT_TXEE USTCNT_TXEMPTYEN -#define USTCNT_RXRE USTCNT_RXREADYEN -#define USTCNT_RXHE USTCNT_RXHALFEN -#define USTCNT_RXFE USTCNT_RXFULLEN -#define USTCNT_CTSD USTCNT_CTSDELTAEN -#define USTCNT_ODD USTCNT_ODD_EVEN -#define USTCNT_PEN USTCNT_PARITYEN -#define USTCNT_CLKM USTCNT_CLKMODE -#define USTCNT_UEN USTCNT_UARTEN - -/* - * UART Baud Control Register - */ -#define UBAUD_ADDR 0xfffff902 -#define UBAUD WORD_REF(UBAUD_ADDR) - -#define UBAUD_PRESCALER_MASK 0x003f /* Actual divisor is 65 - PRESCALER */ -#define UBAUD_PRESCALER_SHIFT 0 -#define UBAUD_DIVIDE_MASK 0x0700 /* Baud Rate freq. divizor */ -#define UBAUD_DIVIDE_SHIFT 8 -#define UBAUD_BAUD_SRC 0x0800 /* Baud Rate Source */ -#define UBAUD_GPIOSRC 0x1000 /* GPIO source */ -#define UBAUD_GPIODIR 0x2000 /* GPIO Direction */ -#define UBAUD_GPIO 0x4000 /* Current GPIO pin status */ -#define UBAUD_GPIODELTA 0x8000 /* GPIO pin value changed */ - -/* - * UART Receiver Register - */ -#define URX_ADDR 0xfffff904 -#define URX WORD_REF(URX_ADDR) - -#define URX_RXDATA_ADDR 0xfffff905 -#define URX_RXDATA BYTE_REF(URX_RXDATA_ADDR) - -#define URX_RXDATA_MASK 0x00ff /* Received data */ -#define URX_RXDATA_SHIFT 0 -#define URX_PARITY_ERROR 0x0100 /* Parity Error */ -#define URX_BREAK 0x0200 /* Break Detected */ -#define URX_FRAME_ERROR 0x0400 /* Framing Error */ -#define URX_OVRUN 0x0800 /* Serial Overrun */ -#define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */ -#define URX_FIFO_HALF 0x4000 /* FIFO is Half-Full */ -#define URX_FIFO_FULL 0x8000 /* FIFO is Full */ - -/* - * UART Transmitter Register - */ -#define UTX_ADDR 0xfffff906 -#define UTX WORD_REF(UTX_ADDR) - -#define UTX_TXDATA_ADDR 0xfffff907 -#define UTX_TXDATA BYTE_REF(UTX_TXDATA_ADDR) - -#define UTX_TXDATA_MASK 0x00ff /* Data to be transmitted */ -#define UTX_TXDATA_SHIFT 0 -#define UTX_CTS_DELTA 0x0100 /* CTS changed */ -#define UTX_CTS_STATUS 0x0200 /* CTS State */ -#define UTX_IGNORE_CTS 0x0800 /* Ignore CTS */ -#define UTX_SEND_BREAK 0x1000 /* Send a BREAK */ -#define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */ -#define UTX_FIFO_HALF 0x4000 /* Transmit FIFO is half empty */ -#define UTX_FIFO_EMPTY 0x8000 /* Transmit FIFO is empty */ - -/* 'EZ328-compatible definitions */ -#define UTX_CTS_STAT UTX_CTS_STATUS -#define UTX_NOCTS UTX_IGNORE_CTS - -/* - * UART Miscellaneous Register - */ -#define UMISC_ADDR 0xfffff908 -#define UMISC WORD_REF(UMISC_ADDR) - -#define UMISC_TX_POL 0x0004 /* Transmit Polarity */ -#define UMISC_RX_POL 0x0008 /* Receive Polarity */ -#define UMISC_IRDA_LOOP 0x0010 /* IrDA Loopback Enable */ -#define UMISC_IRDA_EN 0x0020 /* Infra-Red Enable */ -#define UMISC_RTS 0x0040 /* Set RTS status */ -#define UMISC_RTSCONT 0x0080 /* Choose RTS control */ -#define UMISC_LOOP 0x1000 /* Serial Loopback Enable */ -#define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */ -#define UMISC_CLKSRC 0x4000 /* Clock Source */ - - -/* generalization of uart control registers to support multiple ports: */ -typedef volatile struct { - volatile unsigned short int ustcnt; - volatile unsigned short int ubaud; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char rxdata; - } b; - } urx; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char txdata; - } b; - } utx; - volatile unsigned short int umisc; - volatile unsigned short int pad1; - volatile unsigned short int pad2; - volatile unsigned short int pad3; -} __attribute__((packed)) m68328_uart; - - -/********** - * - * 0xFFFFFAxx -- LCD Controller - * - **********/ - -/* - * LCD Screen Starting Address Register - */ -#define LSSA_ADDR 0xfffffa00 -#define LSSA LONG_REF(LSSA_ADDR) - -#define LSSA_SSA_MASK 0xfffffffe /* Bit 0 is reserved */ - -/* - * LCD Virtual Page Width Register - */ -#define LVPW_ADDR 0xfffffa05 -#define LVPW BYTE_REF(LVPW_ADDR) - -/* - * LCD Screen Width Register (not compatible with 'EZ328 !!!) - */ -#define LXMAX_ADDR 0xfffffa08 -#define LXMAX WORD_REF(LXMAX_ADDR) - -#define LXMAX_XM_MASK 0x02ff /* Bits 0-3 are reserved */ - -/* - * LCD Screen Height Register - */ -#define LYMAX_ADDR 0xfffffa0a -#define LYMAX WORD_REF(LYMAX_ADDR) - -#define LYMAX_YM_MASK 0x02ff /* Bits 10-15 are reserved */ - -/* - * LCD Cursor X Position Register - */ -#define LCXP_ADDR 0xfffffa18 -#define LCXP WORD_REF(LCXP_ADDR) - -#define LCXP_CC_MASK 0xc000 /* Cursor Control */ -#define LCXP_CC_TRAMSPARENT 0x0000 -#define LCXP_CC_BLACK 0x4000 -#define LCXP_CC_REVERSED 0x8000 -#define LCXP_CC_WHITE 0xc000 -#define LCXP_CXP_MASK 0x02ff /* Cursor X position */ - -/* - * LCD Cursor Y Position Register - */ -#define LCYP_ADDR 0xfffffa1a -#define LCYP WORD_REF(LCYP_ADDR) - -#define LCYP_CYP_MASK 0x01ff /* Cursor Y Position */ - -/* - * LCD Cursor Width and Heigth Register - */ -#define LCWCH_ADDR 0xfffffa1c -#define LCWCH WORD_REF(LCWCH_ADDR) - -#define LCWCH_CH_MASK 0x001f /* Cursor Height */ -#define LCWCH_CH_SHIFT 0 -#define LCWCH_CW_MASK 0x1f00 /* Cursor Width */ -#define LCWCH_CW_SHIFT 8 - -/* - * LCD Blink Control Register - */ -#define LBLKC_ADDR 0xfffffa1f -#define LBLKC BYTE_REF(LBLKC_ADDR) - -#define LBLKC_BD_MASK 0x7f /* Blink Divisor */ -#define LBLKC_BD_SHIFT 0 -#define LBLKC_BKEN 0x80 /* Blink Enabled */ - -/* - * LCD Panel Interface Configuration Register - */ -#define LPICF_ADDR 0xfffffa20 -#define LPICF BYTE_REF(LPICF_ADDR) - -#define LPICF_GS_MASK 0x01 /* Gray-Scale Mode */ -#define LPICF_GS_BW 0x00 -#define LPICF_GS_GRAY_4 0x01 -#define LPICF_PBSIZ_MASK 0x06 /* Panel Bus Width */ -#define LPICF_PBSIZ_1 0x00 -#define LPICF_PBSIZ_2 0x02 -#define LPICF_PBSIZ_4 0x04 - -/* - * LCD Polarity Configuration Register - */ -#define LPOLCF_ADDR 0xfffffa21 -#define LPOLCF BYTE_REF(LPOLCF_ADDR) - -#define LPOLCF_PIXPOL 0x01 /* Pixel Polarity */ -#define LPOLCF_LPPOL 0x02 /* Line Pulse Polarity */ -#define LPOLCF_FLMPOL 0x04 /* Frame Marker Polarity */ -#define LPOLCF_LCKPOL 0x08 /* LCD Shift Lock Polarity */ - -/* - * LACD (LCD Alternate Crystal Direction) Rate Control Register - */ -#define LACDRC_ADDR 0xfffffa23 -#define LACDRC BYTE_REF(LACDRC_ADDR) - -#define LACDRC_ACD_MASK 0x0f /* Alternate Crystal Direction Control */ -#define LACDRC_ACD_SHIFT 0 - -/* - * LCD Pixel Clock Divider Register - */ -#define LPXCD_ADDR 0xfffffa25 -#define LPXCD BYTE_REF(LPXCD_ADDR) - -#define LPXCD_PCD_MASK 0x3f /* Pixel Clock Divider */ -#define LPXCD_PCD_SHIFT 0 - -/* - * LCD Clocking Control Register - */ -#define LCKCON_ADDR 0xfffffa27 -#define LCKCON BYTE_REF(LCKCON_ADDR) - -#define LCKCON_PCDS 0x01 /* Pixel Clock Divider Source Select */ -#define LCKCON_DWIDTH 0x02 /* Display Memory Width */ -#define LCKCON_DWS_MASK 0x3c /* Display Wait-State */ -#define LCKCON_DWS_SHIFT 2 -#define LCKCON_DMA16 0x40 /* DMA burst length */ -#define LCKCON_LCDON 0x80 /* Enable LCD Controller */ - -/* 'EZ328-compatible definitions */ -#define LCKCON_DW_MASK LCKCON_DWS_MASK -#define LCKCON_DW_SHIFT LCKCON_DWS_SHIFT - -/* - * LCD Last Buffer Address Register - */ -#define LLBAR_ADDR 0xfffffa29 -#define LLBAR BYTE_REF(LLBAR_ADDR) - -#define LLBAR_LBAR_MASK 0x7f /* Number of memory words to fill 1 line */ -#define LLBAR_LBAR_SHIFT 0 - -/* - * LCD Octet Terminal Count Register - */ -#define LOTCR_ADDR 0xfffffa2b -#define LOTCR BYTE_REF(LOTCR_ADDR) - -/* - * LCD Panning Offset Register - */ -#define LPOSR_ADDR 0xfffffa2d -#define LPOSR BYTE_REF(LPOSR_ADDR) - -#define LPOSR_BOS 0x08 /* Byte offset (for B/W mode only */ -#define LPOSR_POS_MASK 0x07 /* Pixel Offset Code */ -#define LPOSR_POS_SHIFT 0 - -/* - * LCD Frame Rate Control Modulation Register - */ -#define LFRCM_ADDR 0xfffffa31 -#define LFRCM BYTE_REF(LFRCM_ADDR) - -#define LFRCM_YMOD_MASK 0x0f /* Vertical Modulation */ -#define LFRCM_YMOD_SHIFT 0 -#define LFRCM_XMOD_MASK 0xf0 /* Horizontal Modulation */ -#define LFRCM_XMOD_SHIFT 4 - -/* - * LCD Gray Palette Mapping Register - */ -#define LGPMR_ADDR 0xfffffa32 -#define LGPMR WORD_REF(LGPMR_ADDR) - -#define LGPMR_GLEVEL3_MASK 0x000f -#define LGPMR_GLEVEL3_SHIFT 0 -#define LGPMR_GLEVEL2_MASK 0x00f0 -#define LGPMR_GLEVEL2_SHIFT 4 -#define LGPMR_GLEVEL0_MASK 0x0f00 -#define LGPMR_GLEVEL0_SHIFT 8 -#define LGPMR_GLEVEL1_MASK 0xf000 -#define LGPMR_GLEVEL1_SHIFT 12 - -/********** - * - * 0xFFFFFBxx -- Real-Time Clock (RTC) - * - **********/ - -/* - * RTC Hours Minutes and Seconds Register - */ -#define RTCTIME_ADDR 0xfffffb00 -#define RTCTIME LONG_REF(RTCTIME_ADDR) - -#define RTCTIME_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCTIME_SECONDS_SHIFT 0 -#define RTCTIME_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCTIME_MINUTES_SHIFT 16 -#define RTCTIME_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCTIME_HOURS_SHIFT 24 - -/* - * RTC Alarm Register - */ -#define RTCALRM_ADDR 0xfffffb04 -#define RTCALRM LONG_REF(RTCALRM_ADDR) - -#define RTCALRM_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCALRM_SECONDS_SHIFT 0 -#define RTCALRM_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCALRM_MINUTES_SHIFT 16 -#define RTCALRM_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCALRM_HOURS_SHIFT 24 - -/* - * RTC Control Register - */ -#define RTCCTL_ADDR 0xfffffb0c -#define RTCCTL WORD_REF(RTCCTL_ADDR) - -#define RTCCTL_384 0x0020 /* Crystal Selection */ -#define RTCCTL_ENABLE 0x0080 /* RTC Enable */ - -/* 'EZ328-compatible definitions */ -#define RTCCTL_XTL RTCCTL_384 -#define RTCCTL_EN RTCCTL_ENABLE - -/* - * RTC Interrupt Status Register - */ -#define RTCISR_ADDR 0xfffffb0e -#define RTCISR WORD_REF(RTCISR_ADDR) - -#define RTCISR_SW 0x0001 /* Stopwatch timed out */ -#define RTCISR_MIN 0x0002 /* 1-minute interrupt has occurred */ -#define RTCISR_ALM 0x0004 /* Alarm interrupt has occurred */ -#define RTCISR_DAY 0x0008 /* 24-hour rollover interrupt has occurred */ -#define RTCISR_1HZ 0x0010 /* 1Hz interrupt has occurred */ - -/* - * RTC Interrupt Enable Register - */ -#define RTCIENR_ADDR 0xfffffb10 -#define RTCIENR WORD_REF(RTCIENR_ADDR) - -#define RTCIENR_SW 0x0001 /* Stopwatch interrupt enable */ -#define RTCIENR_MIN 0x0002 /* 1-minute interrupt enable */ -#define RTCIENR_ALM 0x0004 /* Alarm interrupt enable */ -#define RTCIENR_DAY 0x0008 /* 24-hour rollover interrupt enable */ -#define RTCIENR_1HZ 0x0010 /* 1Hz interrupt enable */ - -/* - * Stopwatch Minutes Register - */ -#define STPWCH_ADDR 0xfffffb12 -#define STPWCH WORD_REF(STPWCH) - -#define STPWCH_CNT_MASK 0x00ff /* Stopwatch countdown value */ -#define SPTWCH_CNT_SHIFT 0 - -#endif /* _MC68328_H_ */ diff --git a/include/asm-m68knommu/MC68332.h b/include/asm-m68knommu/MC68332.h deleted file mode 100644 index 6bb8f02..0000000 --- a/include/asm-m68knommu/MC68332.h +++ /dev/null @@ -1,152 +0,0 @@ - -/* include/asm-m68knommu/MC68332.h: '332 control registers - * - * Copyright (C) 1998 Kenneth Albanowski , - * - */ - -#ifndef _MC68332_H_ -#define _MC68332_H_ - -#define BYTE_REF(addr) (*((volatile unsigned char*)addr)) -#define WORD_REF(addr) (*((volatile unsigned short*)addr)) - -#define PORTE_ADDR 0xfffa11 -#define PORTE BYTE_REF(PORTE_ADDR) -#define DDRE_ADDR 0xfffa15 -#define DDRE BYTE_REF(DDRE_ADDR) -#define PEPAR_ADDR 0xfffa17 -#define PEPAR BYTE_REF(PEPAR_ADDR) - -#define PORTF_ADDR 0xfffa19 -#define PORTF BYTE_REF(PORTF_ADDR) -#define DDRF_ADDR 0xfffa1d -#define DDRF BYTE_REF(DDRF_ADDR) -#define PFPAR_ADDR 0xfffa1f -#define PFPAR BYTE_REF(PFPAR_ADDR) - -#define PORTQS_ADDR 0xfffc15 -#define PORTQS BYTE_REF(PORTQS_ADDR) -#define DDRQS_ADDR 0xfffc17 -#define DDRQS BYTE_REF(DDRQS_ADDR) -#define PQSPAR_ADDR 0xfffc16 -#define PQSPAR BYTE_REF(PQSPAR_ADDR) - -#define CSPAR0_ADDR 0xFFFA44 -#define CSPAR0 WORD_REF(CSPAR0_ADDR) -#define CSPAR1_ADDR 0xFFFA46 -#define CSPAR1 WORD_REF(CSPAR1_ADDR) -#define CSARBT_ADDR 0xFFFA48 -#define CSARBT WORD_REF(CSARBT_ADDR) -#define CSOPBT_ADDR 0xFFFA4A -#define CSOPBT WORD_REF(CSOPBT_ADDR) -#define CSBAR0_ADDR 0xFFFA4C -#define CSBAR0 WORD_REF(CSBAR0_ADDR) -#define CSOR0_ADDR 0xFFFA4E -#define CSOR0 WORD_REF(CSOR0_ADDR) -#define CSBAR1_ADDR 0xFFFA50 -#define CSBAR1 WORD_REF(CSBAR1_ADDR) -#define CSOR1_ADDR 0xFFFA52 -#define CSOR1 WORD_REF(CSOR1_ADDR) -#define CSBAR2_ADDR 0xFFFA54 -#define CSBAR2 WORD_REF(CSBAR2_ADDR) -#define CSOR2_ADDR 0xFFFA56 -#define CSOR2 WORD_REF(CSOR2_ADDR) -#define CSBAR3_ADDR 0xFFFA58 -#define CSBAR3 WORD_REF(CSBAR3_ADDR) -#define CSOR3_ADDR 0xFFFA5A -#define CSOR3 WORD_REF(CSOR3_ADDR) -#define CSBAR4_ADDR 0xFFFA5C -#define CSBAR4 WORD_REF(CSBAR4_ADDR) -#define CSOR4_ADDR 0xFFFA5E -#define CSOR4 WORD_REF(CSOR4_ADDR) -#define CSBAR5_ADDR 0xFFFA60 -#define CSBAR5 WORD_REF(CSBAR5_ADDR) -#define CSOR5_ADDR 0xFFFA62 -#define CSOR5 WORD_REF(CSOR5_ADDR) -#define CSBAR6_ADDR 0xFFFA64 -#define CSBAR6 WORD_REF(CSBAR6_ADDR) -#define CSOR6_ADDR 0xFFFA66 -#define CSOR6 WORD_REF(CSOR6_ADDR) -#define CSBAR7_ADDR 0xFFFA68 -#define CSBAR7 WORD_REF(CSBAR7_ADDR) -#define CSOR7_ADDR 0xFFFA6A -#define CSOR7 WORD_REF(CSOR7_ADDR) -#define CSBAR8_ADDR 0xFFFA6C -#define CSBAR8 WORD_REF(CSBAR8_ADDR) -#define CSOR8_ADDR 0xFFFA6E -#define CSOR8 WORD_REF(CSOR8_ADDR) -#define CSBAR9_ADDR 0xFFFA70 -#define CSBAR9 WORD_REF(CSBAR9_ADDR) -#define CSOR9_ADDR 0xFFFA72 -#define CSOR9 WORD_REF(CSOR9_ADDR) -#define CSBAR10_ADDR 0xFFFA74 -#define CSBAR10 WORD_REF(CSBAR10_ADDR) -#define CSOR10_ADDR 0xFFFA76 -#define CSOR10 WORD_REF(CSOR10_ADDR) - -#define CSOR_MODE_ASYNC 0x0000 -#define CSOR_MODE_SYNC 0x8000 -#define CSOR_MODE_MASK 0x8000 -#define CSOR_BYTE_DISABLE 0x0000 -#define CSOR_BYTE_UPPER 0x4000 -#define CSOR_BYTE_LOWER 0x2000 -#define CSOR_BYTE_BOTH 0x6000 -#define CSOR_BYTE_MASK 0x6000 -#define CSOR_RW_RSVD 0x0000 -#define CSOR_RW_READ 0x0800 -#define CSOR_RW_WRITE 0x1000 -#define CSOR_RW_BOTH 0x1800 -#define CSOR_RW_MASK 0x1800 -#define CSOR_STROBE_DS 0x0400 -#define CSOR_STROBE_AS 0x0000 -#define CSOR_STROBE_MASK 0x0400 -#define CSOR_DSACK_WAIT(x) (wait << 6) -#define CSOR_DSACK_FTERM (14 << 6) -#define CSOR_DSACK_EXTERNAL (15 << 6) -#define CSOR_DSACK_MASK 0x03c0 -#define CSOR_SPACE_CPU 0x0000 -#define CSOR_SPACE_USER 0x0010 -#define CSOR_SPACE_SU 0x0020 -#define CSOR_SPACE_BOTH 0x0030 -#define CSOR_SPACE_MASK 0x0030 -#define CSOR_IPL_ALL 0x0000 -#define CSOR_IPL_PRIORITY(x) (x << 1) -#define CSOR_IPL_MASK 0x000e -#define CSOR_AVEC_ON 0x0001 -#define CSOR_AVEC_OFF 0x0000 -#define CSOR_AVEC_MASK 0x0001 - -#define CSBAR_ADDR(x) ((addr >> 11) << 3) -#define CSBAR_ADDR_MASK 0xfff8 -#define CSBAR_BLKSIZE_2K 0x0000 -#define CSBAR_BLKSIZE_8K 0x0001 -#define CSBAR_BLKSIZE_16K 0x0002 -#define CSBAR_BLKSIZE_64K 0x0003 -#define CSBAR_BLKSIZE_128K 0x0004 -#define CSBAR_BLKSIZE_256K 0x0005 -#define CSBAR_BLKSIZE_512K 0x0006 -#define CSBAR_BLKSIZE_1M 0x0007 -#define CSBAR_BLKSIZE_MASK 0x0007 - -#define CSPAR_DISC 0 -#define CSPAR_ALT 1 -#define CSPAR_CS8 2 -#define CSPAR_CS16 3 -#define CSPAR_MASK 3 - -#define CSPAR0_CSBOOT(x) (x << 0) -#define CSPAR0_CS0(x) (x << 2) -#define CSPAR0_CS1(x) (x << 4) -#define CSPAR0_CS2(x) (x << 6) -#define CSPAR0_CS3(x) (x << 8) -#define CSPAR0_CS4(x) (x << 10) -#define CSPAR0_CS5(x) (x << 12) - -#define CSPAR1_CS6(x) (x << 0) -#define CSPAR1_CS7(x) (x << 2) -#define CSPAR1_CS8(x) (x << 4) -#define CSPAR1_CS9(x) (x << 6) -#define CSPAR1_CS10(x) (x << 8) - -#endif diff --git a/include/asm-m68knommu/MC68EZ328.h b/include/asm-m68knommu/MC68EZ328.h deleted file mode 100644 index 69b7f91..0000000 --- a/include/asm-m68knommu/MC68EZ328.h +++ /dev/null @@ -1,1253 +0,0 @@ - -/* include/asm-m68knommu/MC68EZ328.h: 'EZ328 control registers - * - * Copyright (C) 1999 Vladimir Gurevich - * Bear & Hare Software, Inc. - * - * Based on include/asm-m68knommu/MC68332.h - * Copyright (C) 1998 Kenneth Albanowski , - * The Silver Hammer Group, Ltd. - * - */ - -#ifndef _MC68EZ328_H_ -#define _MC68EZ328_H_ - -#define BYTE_REF(addr) (*((volatile unsigned char*)addr)) -#define WORD_REF(addr) (*((volatile unsigned short*)addr)) -#define LONG_REF(addr) (*((volatile unsigned long*)addr)) - -#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK) -#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT) - -/********** - * - * 0xFFFFF0xx -- System Control - * - **********/ - -/* - * System Control Register (SCR) - */ -#define SCR_ADDR 0xfffff000 -#define SCR BYTE_REF(SCR_ADDR) - -#define SCR_WDTH8 0x01 /* 8-Bit Width Select */ -#define SCR_DMAP 0x04 /* Double Map */ -#define SCR_SO 0x08 /* Supervisor Only */ -#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */ -#define SCR_PRV 0x20 /* Privilege Violation */ -#define SCR_WPV 0x40 /* Write Protect Violation */ -#define SCR_BETO 0x80 /* Bus-Error TimeOut */ - -/* - * Silicon ID Register (Mask Revision Register (MRR) for '328 Compatibility) - */ -#define MRR_ADDR 0xfffff004 -#define MRR LONG_REF(MRR_ADDR) - -/********** - * - * 0xFFFFF1xx -- Chip-Select logic - * - **********/ - -/* - * Chip Select Group Base Registers - */ -#define CSGBA_ADDR 0xfffff100 -#define CSGBB_ADDR 0xfffff102 - -#define CSGBC_ADDR 0xfffff104 -#define CSGBD_ADDR 0xfffff106 - -#define CSGBA WORD_REF(CSGBA_ADDR) -#define CSGBB WORD_REF(CSGBB_ADDR) -#define CSGBC WORD_REF(CSGBC_ADDR) -#define CSGBD WORD_REF(CSGBD_ADDR) - -/* - * Chip Select Registers - */ -#define CSA_ADDR 0xfffff110 -#define CSB_ADDR 0xfffff112 -#define CSC_ADDR 0xfffff114 -#define CSD_ADDR 0xfffff116 - -#define CSA WORD_REF(CSA_ADDR) -#define CSB WORD_REF(CSB_ADDR) -#define CSC WORD_REF(CSC_ADDR) -#define CSD WORD_REF(CSD_ADDR) - -#define CSA_EN 0x0001 /* Chip-Select Enable */ -#define CSA_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSA_SIZ_SHIFT 1 -#define CSA_WS_MASK 0x0070 /* Wait State */ -#define CSA_WS_SHIFT 4 -#define CSA_BSW 0x0080 /* Data Bus Width */ -#define CSA_FLASH 0x0100 /* FLASH Memory Support */ -#define CSA_RO 0x8000 /* Read-Only */ - -#define CSB_EN 0x0001 /* Chip-Select Enable */ -#define CSB_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSB_SIZ_SHIFT 1 -#define CSB_WS_MASK 0x0070 /* Wait State */ -#define CSB_WS_SHIFT 4 -#define CSB_BSW 0x0080 /* Data Bus Width */ -#define CSB_FLASH 0x0100 /* FLASH Memory Support */ -#define CSB_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSB_UPSIZ_SHIFT 11 -#define CSB_ROP 0x2000 /* Readonly if protected */ -#define CSB_SOP 0x4000 /* Supervisor only if protected */ -#define CSB_RO 0x8000 /* Read-Only */ - -#define CSC_EN 0x0001 /* Chip-Select Enable */ -#define CSC_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSC_SIZ_SHIFT 1 -#define CSC_WS_MASK 0x0070 /* Wait State */ -#define CSC_WS_SHIFT 4 -#define CSC_BSW 0x0080 /* Data Bus Width */ -#define CSC_FLASH 0x0100 /* FLASH Memory Support */ -#define CSC_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSC_UPSIZ_SHIFT 11 -#define CSC_ROP 0x2000 /* Readonly if protected */ -#define CSC_SOP 0x4000 /* Supervisor only if protected */ -#define CSC_RO 0x8000 /* Read-Only */ - -#define CSD_EN 0x0001 /* Chip-Select Enable */ -#define CSD_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSD_SIZ_SHIFT 1 -#define CSD_WS_MASK 0x0070 /* Wait State */ -#define CSD_WS_SHIFT 4 -#define CSD_BSW 0x0080 /* Data Bus Width */ -#define CSD_FLASH 0x0100 /* FLASH Memory Support */ -#define CSD_DRAM 0x0200 /* Dram Selection */ -#define CSD_COMB 0x0400 /* Combining */ -#define CSD_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSD_UPSIZ_SHIFT 11 -#define CSD_ROP 0x2000 /* Readonly if protected */ -#define CSD_SOP 0x4000 /* Supervisor only if protected */ -#define CSD_RO 0x8000 /* Read-Only */ - -/* - * Emulation Chip-Select Register - */ -#define EMUCS_ADDR 0xfffff118 -#define EMUCS WORD_REF(EMUCS_ADDR) - -#define EMUCS_WS_MASK 0x0070 -#define EMUCS_WS_SHIFT 4 - -/********** - * - * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control - * - **********/ - -/* - * PLL Control Register - */ -#define PLLCR_ADDR 0xfffff200 -#define PLLCR WORD_REF(PLLCR_ADDR) - -#define PLLCR_DISPLL 0x0008 /* Disable PLL */ -#define PLLCR_CLKEN 0x0010 /* Clock (CLKO pin) enable */ -#define PLLCR_PRESC 0x0020 /* VCO prescaler */ -#define PLLCR_SYSCLK_SEL_MASK 0x0700 /* System Clock Selection */ -#define PLLCR_SYSCLK_SEL_SHIFT 8 -#define PLLCR_LCDCLK_SEL_MASK 0x3800 /* LCD Clock Selection */ -#define PLLCR_LCDCLK_SEL_SHIFT 11 - -/* '328-compatible definitions */ -#define PLLCR_PIXCLK_SEL_MASK PLLCR_LCDCLK_SEL_MASK -#define PLLCR_PIXCLK_SEL_SHIFT PLLCR_LCDCLK_SEL_SHIFT - -/* - * PLL Frequency Select Register - */ -#define PLLFSR_ADDR 0xfffff202 -#define PLLFSR WORD_REF(PLLFSR_ADDR) - -#define PLLFSR_PC_MASK 0x00ff /* P Count */ -#define PLLFSR_PC_SHIFT 0 -#define PLLFSR_QC_MASK 0x0f00 /* Q Count */ -#define PLLFSR_QC_SHIFT 8 -#define PLLFSR_PROT 0x4000 /* Protect P & Q */ -#define PLLFSR_CLK32 0x8000 /* Clock 32 (kHz) */ - -/* - * Power Control Register - */ -#define PCTRL_ADDR 0xfffff207 -#define PCTRL BYTE_REF(PCTRL_ADDR) - -#define PCTRL_WIDTH_MASK 0x1f /* CPU Clock bursts width */ -#define PCTRL_WIDTH_SHIFT 0 -#define PCTRL_PCEN 0x80 /* Power Control Enable */ - -/********** - * - * 0xFFFFF3xx -- Interrupt Controller - * - **********/ - -/* - * Interrupt Vector Register - */ -#define IVR_ADDR 0xfffff300 -#define IVR BYTE_REF(IVR_ADDR) - -#define IVR_VECTOR_MASK 0xF8 - -/* - * Interrupt control Register - */ -#define ICR_ADDR 0xfffff302 -#define ICR WORD_REF(ICR_ADDR) - -#define ICR_POL5 0x0080 /* Polarity Control for IRQ5 */ -#define ICR_ET6 0x0100 /* Edge Trigger Select for IRQ6 */ -#define ICR_ET3 0x0200 /* Edge Trigger Select for IRQ3 */ -#define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */ -#define ICR_ET1 0x0800 /* Edge Trigger Select for IRQ1 */ -#define ICR_POL6 0x1000 /* Polarity Control for IRQ6 */ -#define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */ -#define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */ -#define ICR_POL1 0x8000 /* Polarity Control for IRQ1 */ - -/* - * Interrupt Mask Register - */ -#define IMR_ADDR 0xfffff304 -#define IMR LONG_REF(IMR_ADDR) - -/* - * Define the names for bit positions first. This is useful for - * request_irq - */ -#define SPI_IRQ_NUM 0 /* SPI interrupt */ -#define TMR_IRQ_NUM 1 /* Timer interrupt */ -#define UART_IRQ_NUM 2 /* UART interrupt */ -#define WDT_IRQ_NUM 3 /* Watchdog Timer interrupt */ -#define RTC_IRQ_NUM 4 /* RTC interrupt */ -#define KB_IRQ_NUM 6 /* Keyboard Interrupt */ -#define PWM_IRQ_NUM 7 /* Pulse-Width Modulator int. */ -#define INT0_IRQ_NUM 8 /* External INT0 */ -#define INT1_IRQ_NUM 9 /* External INT1 */ -#define INT2_IRQ_NUM 10 /* External INT2 */ -#define INT3_IRQ_NUM 11 /* External INT3 */ -#define IRQ1_IRQ_NUM 16 /* IRQ1 */ -#define IRQ2_IRQ_NUM 17 /* IRQ2 */ -#define IRQ3_IRQ_NUM 18 /* IRQ3 */ -#define IRQ6_IRQ_NUM 19 /* IRQ6 */ -#define IRQ5_IRQ_NUM 20 /* IRQ5 */ -#define SAM_IRQ_NUM 22 /* Sampling Timer for RTC */ -#define EMIQ_IRQ_NUM 23 /* Emulator Interrupt */ - -/* '328-compatible definitions */ -#define SPIM_IRQ_NUM SPI_IRQ_NUM -#define TMR1_IRQ_NUM TMR_IRQ_NUM - -/* - * Here go the bitmasks themselves - */ -#define IMR_MSPI (1 << SPI_IRQ_NUM) /* Mask SPI interrupt */ -#define IMR_MTMR (1 << TMR_IRQ_NUM) /* Mask Timer interrupt */ -#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */ -#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */ -#define IMR_MRTC (1 << RTC_IRQ_NUM) /* Mask RTC interrupt */ -#define IMR_MKB (1 << KB_IRQ_NUM) /* Mask Keyboard Interrupt */ -#define IMR_MPWM (1 << PWM_IRQ_NUM) /* Mask Pulse-Width Modulator int. */ -#define IMR_MINT0 (1 << INT0_IRQ_NUM) /* Mask External INT0 */ -#define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */ -#define IMR_MINT2 (1 << INT2_IRQ_NUM) /* Mask External INT2 */ -#define IMR_MINT3 (1 << INT3_IRQ_NUM) /* Mask External INT3 */ -#define IMR_MIRQ1 (1 << IRQ1_IRQ_NUM) /* Mask IRQ1 */ -#define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */ -#define IMR_MIRQ3 (1 << IRQ3_IRQ_NUM) /* Mask IRQ3 */ -#define IMR_MIRQ6 (1 << IRQ6_IRQ_NUM) /* Mask IRQ6 */ -#define IMR_MIRQ5 (1 << IRQ5_IRQ_NUM) /* Mask IRQ5 */ -#define IMR_MSAM (1 << SAM_IRQ_NUM) /* Mask Sampling Timer for RTC */ -#define IMR_MEMIQ (1 << EMIQ_IRQ_NUM) /* Mask Emulator Interrupt */ - -/* '328-compatible definitions */ -#define IMR_MSPIM IMR_MSPI -#define IMR_MTMR1 IMR_MTMR - -/* - * Interrupt Status Register - */ -#define ISR_ADDR 0xfffff30c -#define ISR LONG_REF(ISR_ADDR) - -#define ISR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ -#define ISR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ -#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define ISR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define ISR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define ISR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ -#define ISR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define ISR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define ISR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define ISR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define ISR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define ISR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define ISR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ -#define ISR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ -#define ISR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ - -/* '328-compatible definitions */ -#define ISR_SPIM ISR_SPI -#define ISR_TMR1 ISR_TMR - -/* - * Interrupt Pending Register - */ -#define IPR_ADDR 0xfffff30c -#define IPR LONG_REF(IPR_ADDR) - -#define IPR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ -#define IPR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ -#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define IPR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define IPR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define IPR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ -#define IPR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define IPR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define IPR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define IPR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define IPR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define IPR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define IPR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ -#define IPR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ -#define IPR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ - -/* '328-compatible definitions */ -#define IPR_SPIM IPR_SPI -#define IPR_TMR1 IPR_TMR - -/********** - * - * 0xFFFFF4xx -- Parallel Ports - * - **********/ - -/* - * Port A - */ -#define PADIR_ADDR 0xfffff400 /* Port A direction reg */ -#define PADATA_ADDR 0xfffff401 /* Port A data register */ -#define PAPUEN_ADDR 0xfffff402 /* Port A Pull-Up enable reg */ - -#define PADIR BYTE_REF(PADIR_ADDR) -#define PADATA BYTE_REF(PADATA_ADDR) -#define PAPUEN BYTE_REF(PAPUEN_ADDR) - -#define PA(x) (1 << (x)) - -/* - * Port B - */ -#define PBDIR_ADDR 0xfffff408 /* Port B direction reg */ -#define PBDATA_ADDR 0xfffff409 /* Port B data register */ -#define PBPUEN_ADDR 0xfffff40a /* Port B Pull-Up enable reg */ -#define PBSEL_ADDR 0xfffff40b /* Port B Select Register */ - -#define PBDIR BYTE_REF(PBDIR_ADDR) -#define PBDATA BYTE_REF(PBDATA_ADDR) -#define PBPUEN BYTE_REF(PBPUEN_ADDR) -#define PBSEL BYTE_REF(PBSEL_ADDR) - -#define PB(x) (1 << (x)) - -#define PB_CSB0 0x01 /* Use CSB0 as PB[0] */ -#define PB_CSB1 0x02 /* Use CSB1 as PB[1] */ -#define PB_CSC0_RAS0 0x04 /* Use CSC0/RAS0 as PB[2] */ -#define PB_CSC1_RAS1 0x08 /* Use CSC1/RAS1 as PB[3] */ -#define PB_CSD0_CAS0 0x10 /* Use CSD0/CAS0 as PB[4] */ -#define PB_CSD1_CAS1 0x20 /* Use CSD1/CAS1 as PB[5] */ -#define PB_TIN_TOUT 0x40 /* Use TIN/TOUT as PB[6] */ -#define PB_PWMO 0x80 /* Use PWMO as PB[7] */ - -/* - * Port C - */ -#define PCDIR_ADDR 0xfffff410 /* Port C direction reg */ -#define PCDATA_ADDR 0xfffff411 /* Port C data register */ -#define PCPDEN_ADDR 0xfffff412 /* Port C Pull-Down enb. reg */ -#define PCSEL_ADDR 0xfffff413 /* Port C Select Register */ - -#define PCDIR BYTE_REF(PCDIR_ADDR) -#define PCDATA BYTE_REF(PCDATA_ADDR) -#define PCPDEN BYTE_REF(PCPDEN_ADDR) -#define PCSEL BYTE_REF(PCSEL_ADDR) - -#define PC(x) (1 << (x)) - -#define PC_LD0 0x01 /* Use LD0 as PC[0] */ -#define PC_LD1 0x02 /* Use LD1 as PC[1] */ -#define PC_LD2 0x04 /* Use LD2 as PC[2] */ -#define PC_LD3 0x08 /* Use LD3 as PC[3] */ -#define PC_LFLM 0x10 /* Use LFLM as PC[4] */ -#define PC_LLP 0x20 /* Use LLP as PC[5] */ -#define PC_LCLK 0x40 /* Use LCLK as PC[6] */ -#define PC_LACD 0x80 /* Use LACD as PC[7] */ - -/* - * Port D - */ -#define PDDIR_ADDR 0xfffff418 /* Port D direction reg */ -#define PDDATA_ADDR 0xfffff419 /* Port D data register */ -#define PDPUEN_ADDR 0xfffff41a /* Port D Pull-Up enable reg */ -#define PDSEL_ADDR 0xfffff41b /* Port D Select Register */ -#define PDPOL_ADDR 0xfffff41c /* Port D Polarity Register */ -#define PDIRQEN_ADDR 0xfffff41d /* Port D IRQ enable register */ -#define PDKBEN_ADDR 0xfffff41e /* Port D Keyboard Enable reg */ -#define PDIQEG_ADDR 0xfffff41f /* Port D IRQ Edge Register */ - -#define PDDIR BYTE_REF(PDDIR_ADDR) -#define PDDATA BYTE_REF(PDDATA_ADDR) -#define PDPUEN BYTE_REF(PDPUEN_ADDR) -#define PDSEL BYTE_REF(PDSEL_ADDR) -#define PDPOL BYTE_REF(PDPOL_ADDR) -#define PDIRQEN BYTE_REF(PDIRQEN_ADDR) -#define PDKBEN BYTE_REF(PDKBEN_ADDR) -#define PDIQEG BYTE_REF(PDIQEG_ADDR) - -#define PD(x) (1 << (x)) - -#define PD_INT0 0x01 /* Use INT0 as PD[0] */ -#define PD_INT1 0x02 /* Use INT1 as PD[1] */ -#define PD_INT2 0x04 /* Use INT2 as PD[2] */ -#define PD_INT3 0x08 /* Use INT3 as PD[3] */ -#define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ -#define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ -#define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ -#define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */ - -/* - * Port E - */ -#define PEDIR_ADDR 0xfffff420 /* Port E direction reg */ -#define PEDATA_ADDR 0xfffff421 /* Port E data register */ -#define PEPUEN_ADDR 0xfffff422 /* Port E Pull-Up enable reg */ -#define PESEL_ADDR 0xfffff423 /* Port E Select Register */ - -#define PEDIR BYTE_REF(PEDIR_ADDR) -#define PEDATA BYTE_REF(PEDATA_ADDR) -#define PEPUEN BYTE_REF(PEPUEN_ADDR) -#define PESEL BYTE_REF(PESEL_ADDR) - -#define PE(x) (1 << (x)) - -#define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */ -#define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */ -#define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */ -#define PE_DWE 0x08 /* Use DWE as PE[3] */ -#define PE_RXD 0x10 /* Use RXD as PE[4] */ -#define PE_TXD 0x20 /* Use TXD as PE[5] */ -#define PE_RTS 0x40 /* Use RTS as PE[6] */ -#define PE_CTS 0x80 /* Use CTS as PE[7] */ - -/* - * Port F - */ -#define PFDIR_ADDR 0xfffff428 /* Port F direction reg */ -#define PFDATA_ADDR 0xfffff429 /* Port F data register */ -#define PFPUEN_ADDR 0xfffff42a /* Port F Pull-Up enable reg */ -#define PFSEL_ADDR 0xfffff42b /* Port F Select Register */ - -#define PFDIR BYTE_REF(PFDIR_ADDR) -#define PFDATA BYTE_REF(PFDATA_ADDR) -#define PFPUEN BYTE_REF(PFPUEN_ADDR) -#define PFSEL BYTE_REF(PFSEL_ADDR) - -#define PF(x) (1 << (x)) - -#define PF_LCONTRAST 0x01 /* Use LCONTRAST as PF[0] */ -#define PF_IRQ5 0x02 /* Use IRQ5 as PF[1] */ -#define PF_CLKO 0x04 /* Use CLKO as PF[2] */ -#define PF_A20 0x08 /* Use A20 as PF[3] */ -#define PF_A21 0x10 /* Use A21 as PF[4] */ -#define PF_A22 0x20 /* Use A22 as PF[5] */ -#define PF_A23 0x40 /* Use A23 as PF[6] */ -#define PF_CSA1 0x80 /* Use CSA1 as PF[7] */ - -/* - * Port G - */ -#define PGDIR_ADDR 0xfffff430 /* Port G direction reg */ -#define PGDATA_ADDR 0xfffff431 /* Port G data register */ -#define PGPUEN_ADDR 0xfffff432 /* Port G Pull-Up enable reg */ -#define PGSEL_ADDR 0xfffff433 /* Port G Select Register */ - -#define PGDIR BYTE_REF(PGDIR_ADDR) -#define PGDATA BYTE_REF(PGDATA_ADDR) -#define PGPUEN BYTE_REF(PGPUEN_ADDR) -#define PGSEL BYTE_REF(PGSEL_ADDR) - -#define PG(x) (1 << (x)) - -#define PG_BUSW_DTACK 0x01 /* Use BUSW/DTACK as PG[0] */ -#define PG_A0 0x02 /* Use A0 as PG[1] */ -#define PG_EMUIRQ 0x04 /* Use EMUIRQ as PG[2] */ -#define PG_HIZ_P_D 0x08 /* Use HIZ/P/D as PG[3] */ -#define PG_EMUCS 0x10 /* Use EMUCS as PG[4] */ -#define PG_EMUBRK 0x20 /* Use EMUBRK as PG[5] */ - -/********** - * - * 0xFFFFF5xx -- Pulse-Width Modulator (PWM) - * - **********/ - -/* - * PWM Control Register - */ -#define PWMC_ADDR 0xfffff500 -#define PWMC WORD_REF(PWMC_ADDR) - -#define PWMC_CLKSEL_MASK 0x0003 /* Clock Selection */ -#define PWMC_CLKSEL_SHIFT 0 -#define PWMC_REPEAT_MASK 0x000c /* Sample Repeats */ -#define PWMC_REPEAT_SHIFT 2 -#define PWMC_EN 0x0010 /* Enable PWM */ -#define PMNC_FIFOAV 0x0020 /* FIFO Available */ -#define PWMC_IRQEN 0x0040 /* Interrupt Request Enable */ -#define PWMC_IRQ 0x0080 /* Interrupt Request (FIFO empty) */ -#define PWMC_PRESCALER_MASK 0x7f00 /* Incoming Clock prescaler */ -#define PWMC_PRESCALER_SHIFT 8 -#define PWMC_CLKSRC 0x8000 /* Clock Source Select */ - -/* '328-compatible definitions */ -#define PWMC_PWMEN PWMC_EN - -/* - * PWM Sample Register - */ -#define PWMS_ADDR 0xfffff502 -#define PWMS WORD_REF(PWMS_ADDR) - -/* - * PWM Period Register - */ -#define PWMP_ADDR 0xfffff504 -#define PWMP BYTE_REF(PWMP_ADDR) - -/* - * PWM Counter Register - */ -#define PWMCNT_ADDR 0xfffff505 -#define PWMCNT BYTE_REF(PWMCNT_ADDR) - -/********** - * - * 0xFFFFF6xx -- General-Purpose Timer - * - **********/ - -/* - * Timer Control register - */ -#define TCTL_ADDR 0xfffff600 -#define TCTL WORD_REF(TCTL_ADDR) - -#define TCTL_TEN 0x0001 /* Timer Enable */ -#define TCTL_CLKSOURCE_MASK 0x000e /* Clock Source: */ -#define TCTL_CLKSOURCE_STOP 0x0000 /* Stop count (disabled) */ -#define TCTL_CLKSOURCE_SYSCLK 0x0002 /* SYSCLK to prescaler */ -#define TCTL_CLKSOURCE_SYSCLK_16 0x0004 /* SYSCLK/16 to prescaler */ -#define TCTL_CLKSOURCE_TIN 0x0006 /* TIN to prescaler */ -#define TCTL_CLKSOURCE_32KHZ 0x0008 /* 32kHz clock to prescaler */ -#define TCTL_IRQEN 0x0010 /* IRQ Enable */ -#define TCTL_OM 0x0020 /* Output Mode */ -#define TCTL_CAP_MASK 0x00c0 /* Capture Edge: */ -#define TCTL_CAP_RE 0x0040 /* Capture on rizing edge */ -#define TCTL_CAP_FE 0x0080 /* Capture on falling edge */ -#define TCTL_FRR 0x0010 /* Free-Run Mode */ - -/* '328-compatible definitions */ -#define TCTL1_ADDR TCTL_ADDR -#define TCTL1 TCTL - -/* - * Timer Prescaler Register - */ -#define TPRER_ADDR 0xfffff602 -#define TPRER WORD_REF(TPRER_ADDR) - -/* '328-compatible definitions */ -#define TPRER1_ADDR TPRER_ADDR -#define TPRER1 TPRER - -/* - * Timer Compare Register - */ -#define TCMP_ADDR 0xfffff604 -#define TCMP WORD_REF(TCMP_ADDR) - -/* '328-compatible definitions */ -#define TCMP1_ADDR TCMP_ADDR -#define TCMP1 TCMP - -/* - * Timer Capture register - */ -#define TCR_ADDR 0xfffff606 -#define TCR WORD_REF(TCR_ADDR) - -/* '328-compatible definitions */ -#define TCR1_ADDR TCR_ADDR -#define TCR1 TCR - -/* - * Timer Counter Register - */ -#define TCN_ADDR 0xfffff608 -#define TCN WORD_REF(TCN_ADDR) - -/* '328-compatible definitions */ -#define TCN1_ADDR TCN_ADDR -#define TCN1 TCN - -/* - * Timer Status Register - */ -#define TSTAT_ADDR 0xfffff60a -#define TSTAT WORD_REF(TSTAT_ADDR) - -#define TSTAT_COMP 0x0001 /* Compare Event occurred */ -#define TSTAT_CAPT 0x0001 /* Capture Event occurred */ - -/* '328-compatible definitions */ -#define TSTAT1_ADDR TSTAT_ADDR -#define TSTAT1 TSTAT - -/********** - * - * 0xFFFFF8xx -- Serial Periferial Interface Master (SPIM) - * - **********/ - -/* - * SPIM Data Register - */ -#define SPIMDATA_ADDR 0xfffff800 -#define SPIMDATA WORD_REF(SPIMDATA_ADDR) - -/* - * SPIM Control/Status Register - */ -#define SPIMCONT_ADDR 0xfffff802 -#define SPIMCONT WORD_REF(SPIMCONT_ADDR) - -#define SPIMCONT_BIT_COUNT_MASK 0x000f /* Transfer Length in Bytes */ -#define SPIMCONT_BIT_COUNT_SHIFT 0 -#define SPIMCONT_POL 0x0010 /* SPMCLK Signel Polarity */ -#define SPIMCONT_PHA 0x0020 /* Clock/Data phase relationship */ -#define SPIMCONT_IRQEN 0x0040 /* IRQ Enable */ -#define SPIMCONT_IRQ 0x0080 /* Interrupt Request */ -#define SPIMCONT_XCH 0x0100 /* Exchange */ -#define SPIMCONT_ENABLE 0x0200 /* Enable SPIM */ -#define SPIMCONT_DATA_RATE_MASK 0xe000 /* SPIM Data Rate */ -#define SPIMCONT_DATA_RATE_SHIFT 13 - -/* '328-compatible definitions */ -#define SPIMCONT_SPIMIRQ SPIMCONT_IRQ -#define SPIMCONT_SPIMEN SPIMCONT_ENABLE - -/********** - * - * 0xFFFFF9xx -- UART - * - **********/ - -/* - * UART Status/Control Register - */ -#define USTCNT_ADDR 0xfffff900 -#define USTCNT WORD_REF(USTCNT_ADDR) - -#define USTCNT_TXAE 0x0001 /* Transmitter Available Interrupt Enable */ -#define USTCNT_TXHE 0x0002 /* Transmitter Half Empty Enable */ -#define USTCNT_TXEE 0x0004 /* Transmitter Empty Interrupt Enable */ -#define USTCNT_RXRE 0x0008 /* Receiver Ready Interrupt Enable */ -#define USTCNT_RXHE 0x0010 /* Receiver Half-Full Interrupt Enable */ -#define USTCNT_RXFE 0x0020 /* Receiver Full Interrupt Enable */ -#define USTCNT_CTSD 0x0040 /* CTS Delta Interrupt Enable */ -#define USTCNT_ODEN 0x0080 /* Old Data Interrupt Enable */ -#define USTCNT_8_7 0x0100 /* Eight or seven-bit transmission */ -#define USTCNT_STOP 0x0200 /* Stop bit transmission */ -#define USTCNT_ODD 0x0400 /* Odd Parity */ -#define USTCNT_PEN 0x0800 /* Parity Enable */ -#define USTCNT_CLKM 0x1000 /* Clock Mode Select */ -#define USTCNT_TXEN 0x2000 /* Transmitter Enable */ -#define USTCNT_RXEN 0x4000 /* Receiver Enable */ -#define USTCNT_UEN 0x8000 /* UART Enable */ - -/* '328-compatible definitions */ -#define USTCNT_TXAVAILEN USTCNT_TXAE -#define USTCNT_TXHALFEN USTCNT_TXHE -#define USTCNT_TXEMPTYEN USTCNT_TXEE -#define USTCNT_RXREADYEN USTCNT_RXRE -#define USTCNT_RXHALFEN USTCNT_RXHE -#define USTCNT_RXFULLEN USTCNT_RXFE -#define USTCNT_CTSDELTAEN USTCNT_CTSD -#define USTCNT_ODD_EVEN USTCNT_ODD -#define USTCNT_PARITYEN USTCNT_PEN -#define USTCNT_CLKMODE USTCNT_CLKM -#define USTCNT_UARTEN USTCNT_UEN - -/* - * UART Baud Control Register - */ -#define UBAUD_ADDR 0xfffff902 -#define UBAUD WORD_REF(UBAUD_ADDR) - -#define UBAUD_PRESCALER_MASK 0x003f /* Actual divisor is 65 - PRESCALER */ -#define UBAUD_PRESCALER_SHIFT 0 -#define UBAUD_DIVIDE_MASK 0x0700 /* Baud Rate freq. divizor */ -#define UBAUD_DIVIDE_SHIFT 8 -#define UBAUD_BAUD_SRC 0x0800 /* Baud Rate Source */ -#define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */ - -/* - * UART Receiver Register - */ -#define URX_ADDR 0xfffff904 -#define URX WORD_REF(URX_ADDR) - -#define URX_RXDATA_ADDR 0xfffff905 -#define URX_RXDATA BYTE_REF(URX_RXDATA_ADDR) - -#define URX_RXDATA_MASK 0x00ff /* Received data */ -#define URX_RXDATA_SHIFT 0 -#define URX_PARITY_ERROR 0x0100 /* Parity Error */ -#define URX_BREAK 0x0200 /* Break Detected */ -#define URX_FRAME_ERROR 0x0400 /* Framing Error */ -#define URX_OVRUN 0x0800 /* Serial Overrun */ -#define URX_OLD_DATA 0x1000 /* Old data in FIFO */ -#define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */ -#define URX_FIFO_HALF 0x4000 /* FIFO is Half-Full */ -#define URX_FIFO_FULL 0x8000 /* FIFO is Full */ - -/* - * UART Transmitter Register - */ -#define UTX_ADDR 0xfffff906 -#define UTX WORD_REF(UTX_ADDR) - -#define UTX_TXDATA_ADDR 0xfffff907 -#define UTX_TXDATA BYTE_REF(UTX_TXDATA_ADDR) - -#define UTX_TXDATA_MASK 0x00ff /* Data to be transmitted */ -#define UTX_TXDATA_SHIFT 0 -#define UTX_CTS_DELTA 0x0100 /* CTS changed */ -#define UTX_CTS_STAT 0x0200 /* CTS State */ -#define UTX_BUSY 0x0400 /* FIFO is busy, sending a character */ -#define UTX_NOCTS 0x0800 /* Ignore CTS */ -#define UTX_SEND_BREAK 0x1000 /* Send a BREAK */ -#define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */ -#define UTX_FIFO_HALF 0x4000 /* Transmit FIFO is half empty */ -#define UTX_FIFO_EMPTY 0x8000 /* Transmit FIFO is empty */ - -/* '328-compatible definitions */ -#define UTX_CTS_STATUS UTX_CTS_STAT -#define UTX_IGNORE_CTS UTX_NOCTS - -/* - * UART Miscellaneous Register - */ -#define UMISC_ADDR 0xfffff908 -#define UMISC WORD_REF(UMISC_ADDR) - -#define UMISC_TX_POL 0x0004 /* Transmit Polarity */ -#define UMISC_RX_POL 0x0008 /* Receive Polarity */ -#define UMISC_IRDA_LOOP 0x0010 /* IrDA Loopback Enable */ -#define UMISC_IRDA_EN 0x0020 /* Infra-Red Enable */ -#define UMISC_RTS 0x0040 /* Set RTS status */ -#define UMISC_RTSCONT 0x0080 /* Choose RTS control */ -#define UMISC_IR_TEST 0x0400 /* IRDA Test Enable */ -#define UMISC_BAUD_RESET 0x0800 /* Reset Baud Rate Generation Counters */ -#define UMISC_LOOP 0x1000 /* Serial Loopback Enable */ -#define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */ -#define UMISC_CLKSRC 0x4000 /* Clock Source */ -#define UMISC_BAUD_TEST 0x8000 /* Enable Baud Test Mode */ - -/* - * UART Non-integer Prescaler Register - */ -#define NIPR_ADDR 0xfffff90a -#define NIPR WORD_REF(NIPR_ADDR) - -#define NIPR_STEP_VALUE_MASK 0x00ff /* NI prescaler step value */ -#define NIPR_STEP_VALUE_SHIFT 0 -#define NIPR_SELECT_MASK 0x0700 /* Tap Selection */ -#define NIPR_SELECT_SHIFT 8 -#define NIPR_PRE_SEL 0x8000 /* Non-integer prescaler select */ - - -/* generalization of uart control registers to support multiple ports: */ -typedef volatile struct { - volatile unsigned short int ustcnt; - volatile unsigned short int ubaud; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char rxdata; - } b; - } urx; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char txdata; - } b; - } utx; - volatile unsigned short int umisc; - volatile unsigned short int nipr; - volatile unsigned short int pad1; - volatile unsigned short int pad2; -} __attribute__((packed)) m68328_uart; - - -/********** - * - * 0xFFFFFAxx -- LCD Controller - * - **********/ - -/* - * LCD Screen Starting Address Register - */ -#define LSSA_ADDR 0xfffffa00 -#define LSSA LONG_REF(LSSA_ADDR) - -#define LSSA_SSA_MASK 0x1ffffffe /* Bits 0 and 29-31 are reserved */ - -/* - * LCD Virtual Page Width Register - */ -#define LVPW_ADDR 0xfffffa05 -#define LVPW BYTE_REF(LVPW_ADDR) - -/* - * LCD Screen Width Register (not compatible with '328 !!!) - */ -#define LXMAX_ADDR 0xfffffa08 -#define LXMAX WORD_REF(LXMAX_ADDR) - -#define LXMAX_XM_MASK 0x02f0 /* Bits 0-3 and 10-15 are reserved */ - -/* - * LCD Screen Height Register - */ -#define LYMAX_ADDR 0xfffffa0a -#define LYMAX WORD_REF(LYMAX_ADDR) - -#define LYMAX_YM_MASK 0x01ff /* Bits 9-15 are reserved */ - -/* - * LCD Cursor X Position Register - */ -#define LCXP_ADDR 0xfffffa18 -#define LCXP WORD_REF(LCXP_ADDR) - -#define LCXP_CC_MASK 0xc000 /* Cursor Control */ -#define LCXP_CC_TRAMSPARENT 0x0000 -#define LCXP_CC_BLACK 0x4000 -#define LCXP_CC_REVERSED 0x8000 -#define LCXP_CC_WHITE 0xc000 -#define LCXP_CXP_MASK 0x02ff /* Cursor X position */ - -/* - * LCD Cursor Y Position Register - */ -#define LCYP_ADDR 0xfffffa1a -#define LCYP WORD_REF(LCYP_ADDR) - -#define LCYP_CYP_MASK 0x01ff /* Cursor Y Position */ - -/* - * LCD Cursor Width and Heigth Register - */ -#define LCWCH_ADDR 0xfffffa1c -#define LCWCH WORD_REF(LCWCH_ADDR) - -#define LCWCH_CH_MASK 0x001f /* Cursor Height */ -#define LCWCH_CH_SHIFT 0 -#define LCWCH_CW_MASK 0x1f00 /* Cursor Width */ -#define LCWCH_CW_SHIFT 8 - -/* - * LCD Blink Control Register - */ -#define LBLKC_ADDR 0xfffffa1f -#define LBLKC BYTE_REF(LBLKC_ADDR) - -#define LBLKC_BD_MASK 0x7f /* Blink Divisor */ -#define LBLKC_BD_SHIFT 0 -#define LBLKC_BKEN 0x80 /* Blink Enabled */ - -/* - * LCD Panel Interface Configuration Register - */ -#define LPICF_ADDR 0xfffffa20 -#define LPICF BYTE_REF(LPICF_ADDR) - -#define LPICF_GS_MASK 0x03 /* Gray-Scale Mode */ -#define LPICF_GS_BW 0x00 -#define LPICF_GS_GRAY_4 0x01 -#define LPICF_GS_GRAY_16 0x02 -#define LPICF_PBSIZ_MASK 0x0c /* Panel Bus Width */ -#define LPICF_PBSIZ_1 0x00 -#define LPICF_PBSIZ_2 0x04 -#define LPICF_PBSIZ_4 0x08 - -/* - * LCD Polarity Configuration Register - */ -#define LPOLCF_ADDR 0xfffffa21 -#define LPOLCF BYTE_REF(LPOLCF_ADDR) - -#define LPOLCF_PIXPOL 0x01 /* Pixel Polarity */ -#define LPOLCF_LPPOL 0x02 /* Line Pulse Polarity */ -#define LPOLCF_FLMPOL 0x04 /* Frame Marker Polarity */ -#define LPOLCF_LCKPOL 0x08 /* LCD Shift Lock Polarity */ - -/* - * LACD (LCD Alternate Crystal Direction) Rate Control Register - */ -#define LACDRC_ADDR 0xfffffa23 -#define LACDRC BYTE_REF(LACDRC_ADDR) - -#define LACDRC_ACDSLT 0x80 /* Signal Source Select */ -#define LACDRC_ACD_MASK 0x0f /* Alternate Crystal Direction Control */ -#define LACDRC_ACD_SHIFT 0 - -/* - * LCD Pixel Clock Divider Register - */ -#define LPXCD_ADDR 0xfffffa25 -#define LPXCD BYTE_REF(LPXCD_ADDR) - -#define LPXCD_PCD_MASK 0x3f /* Pixel Clock Divider */ -#define LPXCD_PCD_SHIFT 0 - -/* - * LCD Clocking Control Register - */ -#define LCKCON_ADDR 0xfffffa27 -#define LCKCON BYTE_REF(LCKCON_ADDR) - -#define LCKCON_DWS_MASK 0x0f /* Display Wait-State */ -#define LCKCON_DWS_SHIFT 0 -#define LCKCON_DWIDTH 0x40 /* Display Memory Width */ -#define LCKCON_LCDON 0x80 /* Enable LCD Controller */ - -/* '328-compatible definitions */ -#define LCKCON_DW_MASK LCKCON_DWS_MASK -#define LCKCON_DW_SHIFT LCKCON_DWS_SHIFT - -/* - * LCD Refresh Rate Adjustment Register - */ -#define LRRA_ADDR 0xfffffa29 -#define LRRA BYTE_REF(LRRA_ADDR) - -/* - * LCD Panning Offset Register - */ -#define LPOSR_ADDR 0xfffffa2d -#define LPOSR BYTE_REF(LPOSR_ADDR) - -#define LPOSR_POS_MASK 0x0f /* Pixel Offset Code */ -#define LPOSR_POS_SHIFT 0 - -/* - * LCD Frame Rate Control Modulation Register - */ -#define LFRCM_ADDR 0xfffffa31 -#define LFRCM BYTE_REF(LFRCM_ADDR) - -#define LFRCM_YMOD_MASK 0x0f /* Vertical Modulation */ -#define LFRCM_YMOD_SHIFT 0 -#define LFRCM_XMOD_MASK 0xf0 /* Horizontal Modulation */ -#define LFRCM_XMOD_SHIFT 4 - -/* - * LCD Gray Palette Mapping Register - */ -#define LGPMR_ADDR 0xfffffa33 -#define LGPMR BYTE_REF(LGPMR_ADDR) - -#define LGPMR_G1_MASK 0x0f -#define LGPMR_G1_SHIFT 0 -#define LGPMR_G2_MASK 0xf0 -#define LGPMR_G2_SHIFT 4 - -/* - * PWM Contrast Control Register - */ -#define PWMR_ADDR 0xfffffa36 -#define PWMR WORD_REF(PWMR_ADDR) - -#define PWMR_PW_MASK 0x00ff /* Pulse Width */ -#define PWMR_PW_SHIFT 0 -#define PWMR_CCPEN 0x0100 /* Contrast Control Enable */ -#define PWMR_SRC_MASK 0x0600 /* Input Clock Source */ -#define PWMR_SRC_LINE 0x0000 /* Line Pulse */ -#define PWMR_SRC_PIXEL 0x0200 /* Pixel Clock */ -#define PWMR_SRC_LCD 0x4000 /* LCD clock */ - -/********** - * - * 0xFFFFFBxx -- Real-Time Clock (RTC) - * - **********/ - -/* - * RTC Hours Minutes and Seconds Register - */ -#define RTCTIME_ADDR 0xfffffb00 -#define RTCTIME LONG_REF(RTCTIME_ADDR) - -#define RTCTIME_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCTIME_SECONDS_SHIFT 0 -#define RTCTIME_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCTIME_MINUTES_SHIFT 16 -#define RTCTIME_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCTIME_HOURS_SHIFT 24 - -/* - * RTC Alarm Register - */ -#define RTCALRM_ADDR 0xfffffb04 -#define RTCALRM LONG_REF(RTCALRM_ADDR) - -#define RTCALRM_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCALRM_SECONDS_SHIFT 0 -#define RTCALRM_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCALRM_MINUTES_SHIFT 16 -#define RTCALRM_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCALRM_HOURS_SHIFT 24 - -/* - * Watchdog Timer Register - */ -#define WATCHDOG_ADDR 0xfffffb0a -#define WATCHDOG WORD_REF(WATCHDOG_ADDR) - -#define WATCHDOG_EN 0x0001 /* Watchdog Enabled */ -#define WATCHDOG_ISEL 0x0002 /* Select the watchdog interrupt */ -#define WATCHDOG_INTF 0x0080 /* Watchdog interrupt occcured */ -#define WATCHDOG_CNT_MASK 0x0300 /* Watchdog Counter */ -#define WATCHDOG_CNT_SHIFT 8 - -/* - * RTC Control Register - */ -#define RTCCTL_ADDR 0xfffffb0c -#define RTCCTL WORD_REF(RTCCTL_ADDR) - -#define RTCCTL_XTL 0x0020 /* Crystal Selection */ -#define RTCCTL_EN 0x0080 /* RTC Enable */ - -/* '328-compatible definitions */ -#define RTCCTL_384 RTCCTL_XTL -#define RTCCTL_ENABLE RTCCTL_EN - -/* - * RTC Interrupt Status Register - */ -#define RTCISR_ADDR 0xfffffb0e -#define RTCISR WORD_REF(RTCISR_ADDR) - -#define RTCISR_SW 0x0001 /* Stopwatch timed out */ -#define RTCISR_MIN 0x0002 /* 1-minute interrupt has occurred */ -#define RTCISR_ALM 0x0004 /* Alarm interrupt has occurred */ -#define RTCISR_DAY 0x0008 /* 24-hour rollover interrupt has occurred */ -#define RTCISR_1HZ 0x0010 /* 1Hz interrupt has occurred */ -#define RTCISR_HR 0x0020 /* 1-hour interrupt has occurred */ -#define RTCISR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt has occurred */ -#define RTCISR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt has occurred */ -#define RTCISR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt has occurred */ -#define RTCISR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt has occurred */ -#define RTCISR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt has occurred */ -#define RTCISR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt has occurred */ -#define RTCISR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt has occurred */ -#define RTCISR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt has occurred */ - -/* - * RTC Interrupt Enable Register - */ -#define RTCIENR_ADDR 0xfffffb10 -#define RTCIENR WORD_REF(RTCIENR_ADDR) - -#define RTCIENR_SW 0x0001 /* Stopwatch interrupt enable */ -#define RTCIENR_MIN 0x0002 /* 1-minute interrupt enable */ -#define RTCIENR_ALM 0x0004 /* Alarm interrupt enable */ -#define RTCIENR_DAY 0x0008 /* 24-hour rollover interrupt enable */ -#define RTCIENR_1HZ 0x0010 /* 1Hz interrupt enable */ -#define RTCIENR_HR 0x0020 /* 1-hour interrupt enable */ -#define RTCIENR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt enable */ -#define RTCIENR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt enable */ -#define RTCIENR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt enable */ -#define RTCIENR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt enable */ -#define RTCIENR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt enable */ -#define RTCIENR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt enable */ -#define RTCIENR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt enable */ -#define RTCIENR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt enable */ - -/* - * Stopwatch Minutes Register - */ -#define STPWCH_ADDR 0xfffffb12 -#define STPWCH WORD_REF(STPWCH) - -#define STPWCH_CNT_MASK 0x003f /* Stopwatch countdown value */ -#define SPTWCH_CNT_SHIFT 0 - -/* - * RTC Day Count Register - */ -#define DAYR_ADDR 0xfffffb1a -#define DAYR WORD_REF(DAYR_ADDR) - -#define DAYR_DAYS_MASK 0x1ff /* Day Setting */ -#define DAYR_DAYS_SHIFT 0 - -/* - * RTC Day Alarm Register - */ -#define DAYALARM_ADDR 0xfffffb1c -#define DAYALARM WORD_REF(DAYALARM_ADDR) - -#define DAYALARM_DAYSAL_MASK 0x01ff /* Day Setting of the Alarm */ -#define DAYALARM_DAYSAL_SHIFT 0 - -/********** - * - * 0xFFFFFCxx -- DRAM Controller - * - **********/ - -/* - * DRAM Memory Configuration Register - */ -#define DRAMMC_ADDR 0xfffffc00 -#define DRAMMC WORD_REF(DRAMMC_ADDR) - -#define DRAMMC_ROW12_MASK 0xc000 /* Row address bit for MD12 */ -#define DRAMMC_ROW12_PA10 0x0000 -#define DRAMMC_ROW12_PA21 0x4000 -#define DRAMMC_ROW12_PA23 0x8000 -#define DRAMMC_ROW0_MASK 0x3000 /* Row address bit for MD0 */ -#define DRAMMC_ROW0_PA11 0x0000 -#define DRAMMC_ROW0_PA22 0x1000 -#define DRAMMC_ROW0_PA23 0x2000 -#define DRAMMC_ROW11 0x0800 /* Row address bit for MD11 PA20/PA22 */ -#define DRAMMC_ROW10 0x0400 /* Row address bit for MD10 PA19/PA21 */ -#define DRAMMC_ROW9 0x0200 /* Row address bit for MD9 PA9/PA19 */ -#define DRAMMC_ROW8 0x0100 /* Row address bit for MD8 PA10/PA20 */ -#define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */ -#define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */ -#define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */ -#define DRAMMC_REF_MASK 0x001f /* Reresh Cycle */ -#define DRAMMC_REF_SHIFT 0 - -/* - * DRAM Control Register - */ -#define DRAMC_ADDR 0xfffffc02 -#define DRAMC WORD_REF(DRAMC_ADDR) - -#define DRAMC_DWE 0x0001 /* DRAM Write Enable */ -#define DRAMC_RST 0x0002 /* Reset Burst Refresh Enable */ -#define DRAMC_LPR 0x0004 /* Low-Power Refresh Enable */ -#define DRAMC_SLW 0x0008 /* Slow RAM */ -#define DRAMC_LSP 0x0010 /* Light Sleep */ -#define DRAMC_MSW 0x0020 /* Slow Multiplexing */ -#define DRAMC_WS_MASK 0x00c0 /* Wait-states */ -#define DRAMC_WS_SHIFT 6 -#define DRAMC_PGSZ_MASK 0x0300 /* Page Size for fast page mode */ -#define DRAMC_PGSZ_SHIFT 8 -#define DRAMC_PGSZ_256K 0x0000 -#define DRAMC_PGSZ_512K 0x0100 -#define DRAMC_PGSZ_1024K 0x0200 -#define DRAMC_PGSZ_2048K 0x0300 -#define DRAMC_EDO 0x0400 /* EDO DRAM */ -#define DRAMC_CLK 0x0800 /* Refresh Timer Clock source select */ -#define DRAMC_BC_MASK 0x3000 /* Page Access Clock Cycle (FP mode) */ -#define DRAMC_BC_SHIFT 12 -#define DRAMC_RM 0x4000 /* Refresh Mode */ -#define DRAMC_EN 0x8000 /* DRAM Controller enable */ - - -/********** - * - * 0xFFFFFDxx -- In-Circuit Emulation (ICE) - * - **********/ - -/* - * ICE Module Address Compare Register - */ -#define ICEMACR_ADDR 0xfffffd00 -#define ICEMACR LONG_REF(ICEMACR_ADDR) - -/* - * ICE Module Address Mask Register - */ -#define ICEMAMR_ADDR 0xfffffd04 -#define ICEMAMR LONG_REF(ICEMAMR_ADDR) - -/* - * ICE Module Control Compare Register - */ -#define ICEMCCR_ADDR 0xfffffd08 -#define ICEMCCR WORD_REF(ICEMCCR_ADDR) - -#define ICEMCCR_PD 0x0001 /* Program/Data Cycle Selection */ -#define ICEMCCR_RW 0x0002 /* Read/Write Cycle Selection */ - -/* - * ICE Module Control Mask Register - */ -#define ICEMCMR_ADDR 0xfffffd0a -#define ICEMCMR WORD_REF(ICEMCMR_ADDR) - -#define ICEMCMR_PDM 0x0001 /* Program/Data Cycle Mask */ -#define ICEMCMR_RWM 0x0002 /* Read/Write Cycle Mask */ - -/* - * ICE Module Control Register - */ -#define ICEMCR_ADDR 0xfffffd0c -#define ICEMCR WORD_REF(ICEMCR_ADDR) - -#define ICEMCR_CEN 0x0001 /* Compare Enable */ -#define ICEMCR_PBEN 0x0002 /* Program Break Enable */ -#define ICEMCR_SB 0x0004 /* Single Breakpoint */ -#define ICEMCR_HMDIS 0x0008 /* HardMap disable */ -#define ICEMCR_BBIEN 0x0010 /* Bus Break Interrupt Enable */ - -/* - * ICE Module Status Register - */ -#define ICEMSR_ADDR 0xfffffd0e -#define ICEMSR WORD_REF(ICEMSR_ADDR) - -#define ICEMSR_EMUEN 0x0001 /* Emulation Enable */ -#define ICEMSR_BRKIRQ 0x0002 /* A-Line Vector Fetch Detected */ -#define ICEMSR_BBIRQ 0x0004 /* Bus Break Interrupt Detected */ -#define ICEMSR_EMIRQ 0x0008 /* EMUIRQ Falling Edge Detected */ - -#endif /* _MC68EZ328_H_ */ diff --git a/include/asm-m68knommu/MC68VZ328.h b/include/asm-m68knommu/MC68VZ328.h deleted file mode 100644 index 2b9bf62..0000000 --- a/include/asm-m68knommu/MC68VZ328.h +++ /dev/null @@ -1,1349 +0,0 @@ - -/* include/asm-m68knommu/MC68VZ328.h: 'VZ328 control registers - * - * Copyright (c) 2000-2001 Lineo Inc. - * Copyright (c) 2000-2001 Lineo Canada Corp. - * Copyright (C) 1999 Vladimir Gurevich - * Bare & Hare Software, Inc. - * Based on include/asm-m68knommu/MC68332.h - * Copyright (C) 1998 Kenneth Albanowski , - * The Silver Hammer Group, Ltd. - * - * M68VZ328 fixes by Evan Stawnyczy - * vz multiport fixes by Michael Leslie - */ - -#ifndef _MC68VZ328_H_ -#define _MC68VZ328_H_ - -#define BYTE_REF(addr) (*((volatile unsigned char*)addr)) -#define WORD_REF(addr) (*((volatile unsigned short*)addr)) -#define LONG_REF(addr) (*((volatile unsigned long*)addr)) - -#define PUT_FIELD(field, val) (((val) << field##_SHIFT) & field##_MASK) -#define GET_FIELD(reg, field) (((reg) & field##_MASK) >> field##_SHIFT) - -/********** - * - * 0xFFFFF0xx -- System Control - * - **********/ - -/* - * System Control Register (SCR) - */ -#define SCR_ADDR 0xfffff000 -#define SCR BYTE_REF(SCR_ADDR) - -#define SCR_WDTH8 0x01 /* 8-Bit Width Select */ -#define SCR_DMAP 0x04 /* Double Map */ -#define SCR_SO 0x08 /* Supervisor Only */ -#define SCR_BETEN 0x10 /* Bus-Error Time-Out Enable */ -#define SCR_PRV 0x20 /* Privilege Violation */ -#define SCR_WPV 0x40 /* Write Protect Violation */ -#define SCR_BETO 0x80 /* Bus-Error TimeOut */ - -/* - * Silicon ID Register (Mask Revision Register (MRR) for '328 Compatibility) - */ -#define MRR_ADDR 0xfffff004 -#define MRR LONG_REF(MRR_ADDR) - -/********** - * - * 0xFFFFF1xx -- Chip-Select logic - * - **********/ - -/* - * Chip Select Group Base Registers - */ -#define CSGBA_ADDR 0xfffff100 -#define CSGBB_ADDR 0xfffff102 - -#define CSGBC_ADDR 0xfffff104 -#define CSGBD_ADDR 0xfffff106 - -#define CSGBA WORD_REF(CSGBA_ADDR) -#define CSGBB WORD_REF(CSGBB_ADDR) -#define CSGBC WORD_REF(CSGBC_ADDR) -#define CSGBD WORD_REF(CSGBD_ADDR) - -/* - * Chip Select Registers - */ -#define CSA_ADDR 0xfffff110 -#define CSB_ADDR 0xfffff112 -#define CSC_ADDR 0xfffff114 -#define CSD_ADDR 0xfffff116 - -#define CSA WORD_REF(CSA_ADDR) -#define CSB WORD_REF(CSB_ADDR) -#define CSC WORD_REF(CSC_ADDR) -#define CSD WORD_REF(CSD_ADDR) - -#define CSA_EN 0x0001 /* Chip-Select Enable */ -#define CSA_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSA_SIZ_SHIFT 1 -#define CSA_WS_MASK 0x0070 /* Wait State */ -#define CSA_WS_SHIFT 4 -#define CSA_BSW 0x0080 /* Data Bus Width */ -#define CSA_FLASH 0x0100 /* FLASH Memory Support */ -#define CSA_RO 0x8000 /* Read-Only */ - -#define CSB_EN 0x0001 /* Chip-Select Enable */ -#define CSB_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSB_SIZ_SHIFT 1 -#define CSB_WS_MASK 0x0070 /* Wait State */ -#define CSB_WS_SHIFT 4 -#define CSB_BSW 0x0080 /* Data Bus Width */ -#define CSB_FLASH 0x0100 /* FLASH Memory Support */ -#define CSB_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSB_UPSIZ_SHIFT 11 -#define CSB_ROP 0x2000 /* Readonly if protected */ -#define CSB_SOP 0x4000 /* Supervisor only if protected */ -#define CSB_RO 0x8000 /* Read-Only */ - -#define CSC_EN 0x0001 /* Chip-Select Enable */ -#define CSC_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSC_SIZ_SHIFT 1 -#define CSC_WS_MASK 0x0070 /* Wait State */ -#define CSC_WS_SHIFT 4 -#define CSC_BSW 0x0080 /* Data Bus Width */ -#define CSC_FLASH 0x0100 /* FLASH Memory Support */ -#define CSC_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSC_UPSIZ_SHIFT 11 -#define CSC_ROP 0x2000 /* Readonly if protected */ -#define CSC_SOP 0x4000 /* Supervisor only if protected */ -#define CSC_RO 0x8000 /* Read-Only */ - -#define CSD_EN 0x0001 /* Chip-Select Enable */ -#define CSD_SIZ_MASK 0x000e /* Chip-Select Size */ -#define CSD_SIZ_SHIFT 1 -#define CSD_WS_MASK 0x0070 /* Wait State */ -#define CSD_WS_SHIFT 4 -#define CSD_BSW 0x0080 /* Data Bus Width */ -#define CSD_FLASH 0x0100 /* FLASH Memory Support */ -#define CSD_DRAM 0x0200 /* Dram Selection */ -#define CSD_COMB 0x0400 /* Combining */ -#define CSD_UPSIZ_MASK 0x1800 /* Unprotected memory block size */ -#define CSD_UPSIZ_SHIFT 11 -#define CSD_ROP 0x2000 /* Readonly if protected */ -#define CSD_SOP 0x4000 /* Supervisor only if protected */ -#define CSD_RO 0x8000 /* Read-Only */ - -/* - * Emulation Chip-Select Register - */ -#define EMUCS_ADDR 0xfffff118 -#define EMUCS WORD_REF(EMUCS_ADDR) - -#define EMUCS_WS_MASK 0x0070 -#define EMUCS_WS_SHIFT 4 - -/********** - * - * 0xFFFFF2xx -- Phase Locked Loop (PLL) & Power Control - * - **********/ - -/* - * PLL Control Register - */ -#define PLLCR_ADDR 0xfffff200 -#define PLLCR WORD_REF(PLLCR_ADDR) - -#define PLLCR_DISPLL 0x0008 /* Disable PLL */ -#define PLLCR_CLKEN 0x0010 /* Clock (CLKO pin) enable */ -#define PLLCR_PRESC 0x0020 /* VCO prescaler */ -#define PLLCR_SYSCLK_SEL_MASK 0x0700 /* System Clock Selection */ -#define PLLCR_SYSCLK_SEL_SHIFT 8 -#define PLLCR_LCDCLK_SEL_MASK 0x3800 /* LCD Clock Selection */ -#define PLLCR_LCDCLK_SEL_SHIFT 11 - -/* '328-compatible definitions */ -#define PLLCR_PIXCLK_SEL_MASK PLLCR_LCDCLK_SEL_MASK -#define PLLCR_PIXCLK_SEL_SHIFT PLLCR_LCDCLK_SEL_SHIFT - -/* - * PLL Frequency Select Register - */ -#define PLLFSR_ADDR 0xfffff202 -#define PLLFSR WORD_REF(PLLFSR_ADDR) - -#define PLLFSR_PC_MASK 0x00ff /* P Count */ -#define PLLFSR_PC_SHIFT 0 -#define PLLFSR_QC_MASK 0x0f00 /* Q Count */ -#define PLLFSR_QC_SHIFT 8 -#define PLLFSR_PROT 0x4000 /* Protect P & Q */ -#define PLLFSR_CLK32 0x8000 /* Clock 32 (kHz) */ - -/* - * Power Control Register - */ -#define PCTRL_ADDR 0xfffff207 -#define PCTRL BYTE_REF(PCTRL_ADDR) - -#define PCTRL_WIDTH_MASK 0x1f /* CPU Clock bursts width */ -#define PCTRL_WIDTH_SHIFT 0 -#define PCTRL_PCEN 0x80 /* Power Control Enable */ - -/********** - * - * 0xFFFFF3xx -- Interrupt Controller - * - **********/ - -/* - * Interrupt Vector Register - */ -#define IVR_ADDR 0xfffff300 -#define IVR BYTE_REF(IVR_ADDR) - -#define IVR_VECTOR_MASK 0xF8 - -/* - * Interrupt control Register - */ -#define ICR_ADDR 0xfffff302 -#define ICR WORD_REF(ICR_ADDR) - -#define ICR_POL5 0x0080 /* Polarity Control for IRQ5 */ -#define ICR_ET6 0x0100 /* Edge Trigger Select for IRQ6 */ -#define ICR_ET3 0x0200 /* Edge Trigger Select for IRQ3 */ -#define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */ -#define ICR_ET1 0x0800 /* Edge Trigger Select for IRQ1 */ -#define ICR_POL6 0x1000 /* Polarity Control for IRQ6 */ -#define ICR_POL3 0x2000 /* Polarity Control for IRQ3 */ -#define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */ -#define ICR_POL1 0x8000 /* Polarity Control for IRQ1 */ - -/* - * Interrupt Mask Register - */ -#define IMR_ADDR 0xfffff304 -#define IMR LONG_REF(IMR_ADDR) - -/* - * Define the names for bit positions first. This is useful for - * request_irq - */ -#define SPI2_IRQ_NUM 0 /* SPI 2 interrupt */ -#define TMR_IRQ_NUM 1 /* Timer 1 interrupt */ -#define UART1_IRQ_NUM 2 /* UART 1 interrupt */ -#define WDT_IRQ_NUM 3 /* Watchdog Timer interrupt */ -#define RTC_IRQ_NUM 4 /* RTC interrupt */ -#define TMR2_IRQ_NUM 5 /* Timer 2 interrupt */ -#define KB_IRQ_NUM 6 /* Keyboard Interrupt */ -#define PWM1_IRQ_NUM 7 /* Pulse-Width Modulator 1 int. */ -#define INT0_IRQ_NUM 8 /* External INT0 */ -#define INT1_IRQ_NUM 9 /* External INT1 */ -#define INT2_IRQ_NUM 10 /* External INT2 */ -#define INT3_IRQ_NUM 11 /* External INT3 */ -#define UART2_IRQ_NUM 12 /* UART 2 interrupt */ -#define PWM2_IRQ_NUM 13 /* Pulse-Width Modulator 1 int. */ -#define IRQ1_IRQ_NUM 16 /* IRQ1 */ -#define IRQ2_IRQ_NUM 17 /* IRQ2 */ -#define IRQ3_IRQ_NUM 18 /* IRQ3 */ -#define IRQ6_IRQ_NUM 19 /* IRQ6 */ -#define IRQ5_IRQ_NUM 20 /* IRQ5 */ -#define SPI1_IRQ_NUM 21 /* SPI 1 interrupt */ -#define SAM_IRQ_NUM 22 /* Sampling Timer for RTC */ -#define EMIQ_IRQ_NUM 23 /* Emulator Interrupt */ - -#define SPI_IRQ_NUM SPI2_IRQ_NUM - -/* '328-compatible definitions */ -#define SPIM_IRQ_NUM SPI_IRQ_NUM -#define TMR1_IRQ_NUM TMR_IRQ_NUM -#define UART_IRQ_NUM UART1_IRQ_NUM - -/* - * Here go the bitmasks themselves - */ -#define IMR_MSPI (1 << SPI_IRQ_NUM) /* Mask SPI interrupt */ -#define IMR_MTMR (1 << TMR_IRQ_NUM) /* Mask Timer interrupt */ -#define IMR_MUART (1 << UART_IRQ_NUM) /* Mask UART interrupt */ -#define IMR_MWDT (1 << WDT_IRQ_NUM) /* Mask Watchdog Timer interrupt */ -#define IMR_MRTC (1 << RTC_IRQ_NUM) /* Mask RTC interrupt */ -#define IMR_MKB (1 << KB_IRQ_NUM) /* Mask Keyboard Interrupt */ -#define IMR_MPWM (1 << PWM_IRQ_NUM) /* Mask Pulse-Width Modulator int. */ -#define IMR_MINT0 (1 << INT0_IRQ_NUM) /* Mask External INT0 */ -#define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */ -#define IMR_MINT2 (1 << INT2_IRQ_NUM) /* Mask External INT2 */ -#define IMR_MINT3 (1 << INT3_IRQ_NUM) /* Mask External INT3 */ -#define IMR_MIRQ1 (1 << IRQ1_IRQ_NUM) /* Mask IRQ1 */ -#define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */ -#define IMR_MIRQ3 (1 << IRQ3_IRQ_NUM) /* Mask IRQ3 */ -#define IMR_MIRQ6 (1 << IRQ6_IRQ_NUM) /* Mask IRQ6 */ -#define IMR_MIRQ5 (1 << IRQ5_IRQ_NUM) /* Mask IRQ5 */ -#define IMR_MSAM (1 << SAM_IRQ_NUM) /* Mask Sampling Timer for RTC */ -#define IMR_MEMIQ (1 << EMIQ_IRQ_NUM) /* Mask Emulator Interrupt */ - -/* '328-compatible definitions */ -#define IMR_MSPIM IMR_MSPI -#define IMR_MTMR1 IMR_MTMR - -/* - * Interrupt Status Register - */ -#define ISR_ADDR 0xfffff30c -#define ISR LONG_REF(ISR_ADDR) - -#define ISR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ -#define ISR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ -#define ISR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define ISR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define ISR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define ISR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define ISR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ -#define ISR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define ISR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define ISR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define ISR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define ISR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define ISR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define ISR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ -#define ISR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ -#define ISR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ - -/* '328-compatible definitions */ -#define ISR_SPIM ISR_SPI -#define ISR_TMR1 ISR_TMR - -/* - * Interrupt Pending Register - */ -#define IPR_ADDR 0xfffff30c -#define IPR LONG_REF(IPR_ADDR) - -#define IPR_SPI (1 << SPI_IRQ_NUM) /* SPI interrupt */ -#define IPR_TMR (1 << TMR_IRQ_NUM) /* Timer interrupt */ -#define IPR_UART (1 << UART_IRQ_NUM) /* UART interrupt */ -#define IPR_WDT (1 << WDT_IRQ_NUM) /* Watchdog Timer interrupt */ -#define IPR_RTC (1 << RTC_IRQ_NUM) /* RTC interrupt */ -#define IPR_KB (1 << KB_IRQ_NUM) /* Keyboard Interrupt */ -#define IPR_PWM (1 << PWM_IRQ_NUM) /* Pulse-Width Modulator interrupt */ -#define IPR_INT0 (1 << INT0_IRQ_NUM) /* External INT0 */ -#define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */ -#define IPR_INT2 (1 << INT2_IRQ_NUM) /* External INT2 */ -#define IPR_INT3 (1 << INT3_IRQ_NUM) /* External INT3 */ -#define IPR_IRQ1 (1 << IRQ1_IRQ_NUM) /* IRQ1 */ -#define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */ -#define IPR_IRQ3 (1 << IRQ3_IRQ_NUM) /* IRQ3 */ -#define IPR_IRQ6 (1 << IRQ6_IRQ_NUM) /* IRQ6 */ -#define IPR_IRQ5 (1 << IRQ5_IRQ_NUM) /* IRQ5 */ -#define IPR_SAM (1 << SAM_IRQ_NUM) /* Sampling Timer for RTC */ -#define IPR_EMIQ (1 << EMIQ_IRQ_NUM) /* Emulator Interrupt */ - -/* '328-compatible definitions */ -#define IPR_SPIM IPR_SPI -#define IPR_TMR1 IPR_TMR - -/********** - * - * 0xFFFFF4xx -- Parallel Ports - * - **********/ - -/* - * Port A - */ -#define PADIR_ADDR 0xfffff400 /* Port A direction reg */ -#define PADATA_ADDR 0xfffff401 /* Port A data register */ -#define PAPUEN_ADDR 0xfffff402 /* Port A Pull-Up enable reg */ - -#define PADIR BYTE_REF(PADIR_ADDR) -#define PADATA BYTE_REF(PADATA_ADDR) -#define PAPUEN BYTE_REF(PAPUEN_ADDR) - -#define PA(x) (1 << (x)) - -/* - * Port B - */ -#define PBDIR_ADDR 0xfffff408 /* Port B direction reg */ -#define PBDATA_ADDR 0xfffff409 /* Port B data register */ -#define PBPUEN_ADDR 0xfffff40a /* Port B Pull-Up enable reg */ -#define PBSEL_ADDR 0xfffff40b /* Port B Select Register */ - -#define PBDIR BYTE_REF(PBDIR_ADDR) -#define PBDATA BYTE_REF(PBDATA_ADDR) -#define PBPUEN BYTE_REF(PBPUEN_ADDR) -#define PBSEL BYTE_REF(PBSEL_ADDR) - -#define PB(x) (1 << (x)) - -#define PB_CSB0 0x01 /* Use CSB0 as PB[0] */ -#define PB_CSB1 0x02 /* Use CSB1 as PB[1] */ -#define PB_CSC0_RAS0 0x04 /* Use CSC0/RAS0 as PB[2] */ -#define PB_CSC1_RAS1 0x08 /* Use CSC1/RAS1 as PB[3] */ -#define PB_CSD0_CAS0 0x10 /* Use CSD0/CAS0 as PB[4] */ -#define PB_CSD1_CAS1 0x20 /* Use CSD1/CAS1 as PB[5] */ -#define PB_TIN_TOUT 0x40 /* Use TIN/TOUT as PB[6] */ -#define PB_PWMO 0x80 /* Use PWMO as PB[7] */ - -/* - * Port C - */ -#define PCDIR_ADDR 0xfffff410 /* Port C direction reg */ -#define PCDATA_ADDR 0xfffff411 /* Port C data register */ -#define PCPDEN_ADDR 0xfffff412 /* Port C Pull-Down enb. reg */ -#define PCSEL_ADDR 0xfffff413 /* Port C Select Register */ - -#define PCDIR BYTE_REF(PCDIR_ADDR) -#define PCDATA BYTE_REF(PCDATA_ADDR) -#define PCPDEN BYTE_REF(PCPDEN_ADDR) -#define PCSEL BYTE_REF(PCSEL_ADDR) - -#define PC(x) (1 << (x)) - -#define PC_LD0 0x01 /* Use LD0 as PC[0] */ -#define PC_LD1 0x02 /* Use LD1 as PC[1] */ -#define PC_LD2 0x04 /* Use LD2 as PC[2] */ -#define PC_LD3 0x08 /* Use LD3 as PC[3] */ -#define PC_LFLM 0x10 /* Use LFLM as PC[4] */ -#define PC_LLP 0x20 /* Use LLP as PC[5] */ -#define PC_LCLK 0x40 /* Use LCLK as PC[6] */ -#define PC_LACD 0x80 /* Use LACD as PC[7] */ - -/* - * Port D - */ -#define PDDIR_ADDR 0xfffff418 /* Port D direction reg */ -#define PDDATA_ADDR 0xfffff419 /* Port D data register */ -#define PDPUEN_ADDR 0xfffff41a /* Port D Pull-Up enable reg */ -#define PDSEL_ADDR 0xfffff41b /* Port D Select Register */ -#define PDPOL_ADDR 0xfffff41c /* Port D Polarity Register */ -#define PDIRQEN_ADDR 0xfffff41d /* Port D IRQ enable register */ -#define PDKBEN_ADDR 0xfffff41e /* Port D Keyboard Enable reg */ -#define PDIQEG_ADDR 0xfffff41f /* Port D IRQ Edge Register */ - -#define PDDIR BYTE_REF(PDDIR_ADDR) -#define PDDATA BYTE_REF(PDDATA_ADDR) -#define PDPUEN BYTE_REF(PDPUEN_ADDR) -#define PDSEL BYTE_REF(PDSEL_ADDR) -#define PDPOL BYTE_REF(PDPOL_ADDR) -#define PDIRQEN BYTE_REF(PDIRQEN_ADDR) -#define PDKBEN BYTE_REF(PDKBEN_ADDR) -#define PDIQEG BYTE_REF(PDIQEG_ADDR) - -#define PD(x) (1 << (x)) - -#define PD_INT0 0x01 /* Use INT0 as PD[0] */ -#define PD_INT1 0x02 /* Use INT1 as PD[1] */ -#define PD_INT2 0x04 /* Use INT2 as PD[2] */ -#define PD_INT3 0x08 /* Use INT3 as PD[3] */ -#define PD_IRQ1 0x10 /* Use IRQ1 as PD[4] */ -#define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */ -#define PD_IRQ3 0x40 /* Use IRQ3 as PD[6] */ -#define PD_IRQ6 0x80 /* Use IRQ6 as PD[7] */ - -/* - * Port E - */ -#define PEDIR_ADDR 0xfffff420 /* Port E direction reg */ -#define PEDATA_ADDR 0xfffff421 /* Port E data register */ -#define PEPUEN_ADDR 0xfffff422 /* Port E Pull-Up enable reg */ -#define PESEL_ADDR 0xfffff423 /* Port E Select Register */ - -#define PEDIR BYTE_REF(PEDIR_ADDR) -#define PEDATA BYTE_REF(PEDATA_ADDR) -#define PEPUEN BYTE_REF(PEPUEN_ADDR) -#define PESEL BYTE_REF(PESEL_ADDR) - -#define PE(x) (1 << (x)) - -#define PE_SPMTXD 0x01 /* Use SPMTXD as PE[0] */ -#define PE_SPMRXD 0x02 /* Use SPMRXD as PE[1] */ -#define PE_SPMCLK 0x04 /* Use SPMCLK as PE[2] */ -#define PE_DWE 0x08 /* Use DWE as PE[3] */ -#define PE_RXD 0x10 /* Use RXD as PE[4] */ -#define PE_TXD 0x20 /* Use TXD as PE[5] */ -#define PE_RTS 0x40 /* Use RTS as PE[6] */ -#define PE_CTS 0x80 /* Use CTS as PE[7] */ - -/* - * Port F - */ -#define PFDIR_ADDR 0xfffff428 /* Port F direction reg */ -#define PFDATA_ADDR 0xfffff429 /* Port F data register */ -#define PFPUEN_ADDR 0xfffff42a /* Port F Pull-Up enable reg */ -#define PFSEL_ADDR 0xfffff42b /* Port F Select Register */ - -#define PFDIR BYTE_REF(PFDIR_ADDR) -#define PFDATA BYTE_REF(PFDATA_ADDR) -#define PFPUEN BYTE_REF(PFPUEN_ADDR) -#define PFSEL BYTE_REF(PFSEL_ADDR) - -#define PF(x) (1 << (x)) - -#define PF_LCONTRAST 0x01 /* Use LCONTRAST as PF[0] */ -#define PF_IRQ5 0x02 /* Use IRQ5 as PF[1] */ -#define PF_CLKO 0x04 /* Use CLKO as PF[2] */ -#define PF_A20 0x08 /* Use A20 as PF[3] */ -#define PF_A21 0x10 /* Use A21 as PF[4] */ -#define PF_A22 0x20 /* Use A22 as PF[5] */ -#define PF_A23 0x40 /* Use A23 as PF[6] */ -#define PF_CSA1 0x80 /* Use CSA1 as PF[7] */ - -/* - * Port G - */ -#define PGDIR_ADDR 0xfffff430 /* Port G direction reg */ -#define PGDATA_ADDR 0xfffff431 /* Port G data register */ -#define PGPUEN_ADDR 0xfffff432 /* Port G Pull-Up enable reg */ -#define PGSEL_ADDR 0xfffff433 /* Port G Select Register */ - -#define PGDIR BYTE_REF(PGDIR_ADDR) -#define PGDATA BYTE_REF(PGDATA_ADDR) -#define PGPUEN BYTE_REF(PGPUEN_ADDR) -#define PGSEL BYTE_REF(PGSEL_ADDR) - -#define PG(x) (1 << (x)) - -#define PG_BUSW_DTACK 0x01 /* Use BUSW/DTACK as PG[0] */ -#define PG_A0 0x02 /* Use A0 as PG[1] */ -#define PG_EMUIRQ 0x04 /* Use EMUIRQ as PG[2] */ -#define PG_HIZ_P_D 0x08 /* Use HIZ/P/D as PG[3] */ -#define PG_EMUCS 0x10 /* Use EMUCS as PG[4] */ -#define PG_EMUBRK 0x20 /* Use EMUBRK as PG[5] */ - -/* - * Port J - */ -#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */ -#define PJDATA_ADDR 0xfffff439 /* Port J data register */ -#define PJPUEN_ADDR 0xfffff43A /* Port J Pull-Up enb. reg */ -#define PJSEL_ADDR 0xfffff43B /* Port J Select Register */ - -#define PJDIR BYTE_REF(PJDIR_ADDR) -#define PJDATA BYTE_REF(PJDATA_ADDR) -#define PJPUEN BYTE_REF(PJPUEN_ADDR) -#define PJSEL BYTE_REF(PJSEL_ADDR) - -#define PJ(x) (1 << (x)) - -/* - * Port K - */ -#define PKDIR_ADDR 0xfffff440 /* Port K direction reg */ -#define PKDATA_ADDR 0xfffff441 /* Port K data register */ -#define PKPUEN_ADDR 0xfffff442 /* Port K Pull-Up enb. reg */ -#define PKSEL_ADDR 0xfffff443 /* Port K Select Register */ - -#define PKDIR BYTE_REF(PKDIR_ADDR) -#define PKDATA BYTE_REF(PKDATA_ADDR) -#define PKPUEN BYTE_REF(PKPUEN_ADDR) -#define PKSEL BYTE_REF(PKSEL_ADDR) - -#define PK(x) (1 << (x)) - -#define PK_DATAREADY 0x01 /* Use ~DATA_READY as PK[0] */ -#define PK_PWM2 0x01 /* Use PWM2 as PK[0] */ -#define PK_R_W 0x02 /* Use R/W as PK[1] */ -#define PK_LDS 0x04 /* Use /LDS as PK[2] */ -#define PK_UDS 0x08 /* Use /UDS as PK[3] */ -#define PK_LD4 0x10 /* Use LD4 as PK[4] */ -#define PK_LD5 0x20 /* Use LD5 as PK[5] */ -#define PK_LD6 0x40 /* Use LD6 as PK[6] */ -#define PK_LD7 0x80 /* Use LD7 as PK[7] */ - -#define PJDIR_ADDR 0xfffff438 /* Port J direction reg */ -#define PJDATA_ADDR 0xfffff439 /* Port J data register */ -#define PJPUEN_ADDR 0xfffff43A /* Port J Pull-Up enable reg */ -#define PJSEL_ADDR 0xfffff43B /* Port J Select Register */ - -#define PJDIR BYTE_REF(PJDIR_ADDR) -#define PJDATA BYTE_REF(PJDATA_ADDR) -#define PJPUEN BYTE_REF(PJPUEN_ADDR) -#define PJSEL BYTE_REF(PJSEL_ADDR) - -#define PJ(x) (1 << (x)) - -#define PJ_MOSI 0x01 /* Use MOSI as PJ[0] */ -#define PJ_MISO 0x02 /* Use MISO as PJ[1] */ -#define PJ_SPICLK1 0x04 /* Use SPICLK1 as PJ[2] */ -#define PJ_SS 0x08 /* Use SS as PJ[3] */ -#define PJ_RXD2 0x10 /* Use RXD2 as PJ[4] */ -#define PJ_TXD2 0x20 /* Use TXD2 as PJ[5] */ -#define PJ_RTS2 0x40 /* Use RTS2 as PJ[5] */ -#define PJ_CTS2 0x80 /* Use CTS2 as PJ[5] */ - -/* - * Port M - */ -#define PMDIR_ADDR 0xfffff448 /* Port M direction reg */ -#define PMDATA_ADDR 0xfffff449 /* Port M data register */ -#define PMPUEN_ADDR 0xfffff44a /* Port M Pull-Up enable reg */ -#define PMSEL_ADDR 0xfffff44b /* Port M Select Register */ - -#define PMDIR BYTE_REF(PMDIR_ADDR) -#define PMDATA BYTE_REF(PMDATA_ADDR) -#define PMPUEN BYTE_REF(PMPUEN_ADDR) -#define PMSEL BYTE_REF(PMSEL_ADDR) - -#define PM(x) (1 << (x)) - -#define PM_SDCLK 0x01 /* Use SDCLK as PM[0] */ -#define PM_SDCE 0x02 /* Use SDCE as PM[1] */ -#define PM_DQMH 0x04 /* Use DQMH as PM[2] */ -#define PM_DQML 0x08 /* Use DQML as PM[3] */ -#define PM_SDA10 0x10 /* Use SDA10 as PM[4] */ -#define PM_DMOE 0x20 /* Use DMOE as PM[5] */ - -/********** - * - * 0xFFFFF5xx -- Pulse-Width Modulator (PWM) - * - **********/ - -/* - * PWM Control Register - */ -#define PWMC_ADDR 0xfffff500 -#define PWMC WORD_REF(PWMC_ADDR) - -#define PWMC_CLKSEL_MASK 0x0003 /* Clock Selection */ -#define PWMC_CLKSEL_SHIFT 0 -#define PWMC_REPEAT_MASK 0x000c /* Sample Repeats */ -#define PWMC_REPEAT_SHIFT 2 -#define PWMC_EN 0x0010 /* Enable PWM */ -#define PMNC_FIFOAV 0x0020 /* FIFO Available */ -#define PWMC_IRQEN 0x0040 /* Interrupt Request Enable */ -#define PWMC_IRQ 0x0080 /* Interrupt Request (FIFO empty) */ -#define PWMC_PRESCALER_MASK 0x7f00 /* Incoming Clock prescaler */ -#define PWMC_PRESCALER_SHIFT 8 -#define PWMC_CLKSRC 0x8000 /* Clock Source Select */ - -/* '328-compatible definitions */ -#define PWMC_PWMEN PWMC_EN - -/* - * PWM Sample Register - */ -#define PWMS_ADDR 0xfffff502 -#define PWMS WORD_REF(PWMS_ADDR) - -/* - * PWM Period Register - */ -#define PWMP_ADDR 0xfffff504 -#define PWMP BYTE_REF(PWMP_ADDR) - -/* - * PWM Counter Register - */ -#define PWMCNT_ADDR 0xfffff505 -#define PWMCNT BYTE_REF(PWMCNT_ADDR) - -/********** - * - * 0xFFFFF6xx -- General-Purpose Timer - * - **********/ - -/* - * Timer Control register - */ -#define TCTL_ADDR 0xfffff600 -#define TCTL WORD_REF(TCTL_ADDR) - -#define TCTL_TEN 0x0001 /* Timer Enable */ -#define TCTL_CLKSOURCE_MASK 0x000e /* Clock Source: */ -#define TCTL_CLKSOURCE_STOP 0x0000 /* Stop count (disabled) */ -#define TCTL_CLKSOURCE_SYSCLK 0x0002 /* SYSCLK to prescaler */ -#define TCTL_CLKSOURCE_SYSCLK_16 0x0004 /* SYSCLK/16 to prescaler */ -#define TCTL_CLKSOURCE_TIN 0x0006 /* TIN to prescaler */ -#define TCTL_CLKSOURCE_32KHZ 0x0008 /* 32kHz clock to prescaler */ -#define TCTL_IRQEN 0x0010 /* IRQ Enable */ -#define TCTL_OM 0x0020 /* Output Mode */ -#define TCTL_CAP_MASK 0x00c0 /* Capture Edge: */ -#define TCTL_CAP_RE 0x0040 /* Capture on rizing edge */ -#define TCTL_CAP_FE 0x0080 /* Capture on falling edge */ -#define TCTL_FRR 0x0010 /* Free-Run Mode */ - -/* '328-compatible definitions */ -#define TCTL1_ADDR TCTL_ADDR -#define TCTL1 TCTL - -/* - * Timer Prescaler Register - */ -#define TPRER_ADDR 0xfffff602 -#define TPRER WORD_REF(TPRER_ADDR) - -/* '328-compatible definitions */ -#define TPRER1_ADDR TPRER_ADDR -#define TPRER1 TPRER - -/* - * Timer Compare Register - */ -#define TCMP_ADDR 0xfffff604 -#define TCMP WORD_REF(TCMP_ADDR) - -/* '328-compatible definitions */ -#define TCMP1_ADDR TCMP_ADDR -#define TCMP1 TCMP - -/* - * Timer Capture register - */ -#define TCR_ADDR 0xfffff606 -#define TCR WORD_REF(TCR_ADDR) - -/* '328-compatible definitions */ -#define TCR1_ADDR TCR_ADDR -#define TCR1 TCR - -/* - * Timer Counter Register - */ -#define TCN_ADDR 0xfffff608 -#define TCN WORD_REF(TCN_ADDR) - -/* '328-compatible definitions */ -#define TCN1_ADDR TCN_ADDR -#define TCN1 TCN - -/* - * Timer Status Register - */ -#define TSTAT_ADDR 0xfffff60a -#define TSTAT WORD_REF(TSTAT_ADDR) - -#define TSTAT_COMP 0x0001 /* Compare Event occurred */ -#define TSTAT_CAPT 0x0001 /* Capture Event occurred */ - -/* '328-compatible definitions */ -#define TSTAT1_ADDR TSTAT_ADDR -#define TSTAT1 TSTAT - -/********** - * - * 0xFFFFF8xx -- Serial Periferial Interface Master (SPIM) - * - **********/ - -/* - * SPIM Data Register - */ -#define SPIMDATA_ADDR 0xfffff800 -#define SPIMDATA WORD_REF(SPIMDATA_ADDR) - -/* - * SPIM Control/Status Register - */ -#define SPIMCONT_ADDR 0xfffff802 -#define SPIMCONT WORD_REF(SPIMCONT_ADDR) - -#define SPIMCONT_BIT_COUNT_MASK 0x000f /* Transfer Length in Bytes */ -#define SPIMCONT_BIT_COUNT_SHIFT 0 -#define SPIMCONT_POL 0x0010 /* SPMCLK Signel Polarity */ -#define SPIMCONT_PHA 0x0020 /* Clock/Data phase relationship */ -#define SPIMCONT_IRQEN 0x0040 /* IRQ Enable */ -#define SPIMCONT_IRQ 0x0080 /* Interrupt Request */ -#define SPIMCONT_XCH 0x0100 /* Exchange */ -#define SPIMCONT_ENABLE 0x0200 /* Enable SPIM */ -#define SPIMCONT_DATA_RATE_MASK 0xe000 /* SPIM Data Rate */ -#define SPIMCONT_DATA_RATE_SHIFT 13 - -/* '328-compatible definitions */ -#define SPIMCONT_SPIMIRQ SPIMCONT_IRQ -#define SPIMCONT_SPIMEN SPIMCONT_ENABLE - -/********** - * - * 0xFFFFF9xx -- UART - * - **********/ - -/* - * UART Status/Control Register - */ - -#define USTCNT_ADDR 0xfffff900 -#define USTCNT WORD_REF(USTCNT_ADDR) - -#define USTCNT_TXAE 0x0001 /* Transmitter Available Interrupt Enable */ -#define USTCNT_TXHE 0x0002 /* Transmitter Half Empty Enable */ -#define USTCNT_TXEE 0x0004 /* Transmitter Empty Interrupt Enable */ -#define USTCNT_RXRE 0x0008 /* Receiver Ready Interrupt Enable */ -#define USTCNT_RXHE 0x0010 /* Receiver Half-Full Interrupt Enable */ -#define USTCNT_RXFE 0x0020 /* Receiver Full Interrupt Enable */ -#define USTCNT_CTSD 0x0040 /* CTS Delta Interrupt Enable */ -#define USTCNT_ODEN 0x0080 /* Old Data Interrupt Enable */ -#define USTCNT_8_7 0x0100 /* Eight or seven-bit transmission */ -#define USTCNT_STOP 0x0200 /* Stop bit transmission */ -#define USTCNT_ODD 0x0400 /* Odd Parity */ -#define USTCNT_PEN 0x0800 /* Parity Enable */ -#define USTCNT_CLKM 0x1000 /* Clock Mode Select */ -#define USTCNT_TXEN 0x2000 /* Transmitter Enable */ -#define USTCNT_RXEN 0x4000 /* Receiver Enable */ -#define USTCNT_UEN 0x8000 /* UART Enable */ - -/* '328-compatible definitions */ -#define USTCNT_TXAVAILEN USTCNT_TXAE -#define USTCNT_TXHALFEN USTCNT_TXHE -#define USTCNT_TXEMPTYEN USTCNT_TXEE -#define USTCNT_RXREADYEN USTCNT_RXRE -#define USTCNT_RXHALFEN USTCNT_RXHE -#define USTCNT_RXFULLEN USTCNT_RXFE -#define USTCNT_CTSDELTAEN USTCNT_CTSD -#define USTCNT_ODD_EVEN USTCNT_ODD -#define USTCNT_PARITYEN USTCNT_PEN -#define USTCNT_CLKMODE USTCNT_CLKM -#define USTCNT_UARTEN USTCNT_UEN - -/* - * UART Baud Control Register - */ -#define UBAUD_ADDR 0xfffff902 -#define UBAUD WORD_REF(UBAUD_ADDR) - -#define UBAUD_PRESCALER_MASK 0x003f /* Actual divisor is 65 - PRESCALER */ -#define UBAUD_PRESCALER_SHIFT 0 -#define UBAUD_DIVIDE_MASK 0x0700 /* Baud Rate freq. divizor */ -#define UBAUD_DIVIDE_SHIFT 8 -#define UBAUD_BAUD_SRC 0x0800 /* Baud Rate Source */ -#define UBAUD_UCLKDIR 0x2000 /* UCLK Direction */ - -/* - * UART Receiver Register - */ -#define URX_ADDR 0xfffff904 -#define URX WORD_REF(URX_ADDR) - -#define URX_RXDATA_ADDR 0xfffff905 -#define URX_RXDATA BYTE_REF(URX_RXDATA_ADDR) - -#define URX_RXDATA_MASK 0x00ff /* Received data */ -#define URX_RXDATA_SHIFT 0 -#define URX_PARITY_ERROR 0x0100 /* Parity Error */ -#define URX_BREAK 0x0200 /* Break Detected */ -#define URX_FRAME_ERROR 0x0400 /* Framing Error */ -#define URX_OVRUN 0x0800 /* Serial Overrun */ -#define URX_OLD_DATA 0x1000 /* Old data in FIFO */ -#define URX_DATA_READY 0x2000 /* Data Ready (FIFO not empty) */ -#define URX_FIFO_HALF 0x4000 /* FIFO is Half-Full */ -#define URX_FIFO_FULL 0x8000 /* FIFO is Full */ - -/* - * UART Transmitter Register - */ -#define UTX_ADDR 0xfffff906 -#define UTX WORD_REF(UTX_ADDR) - -#define UTX_TXDATA_ADDR 0xfffff907 -#define UTX_TXDATA BYTE_REF(UTX_TXDATA_ADDR) - -#define UTX_TXDATA_MASK 0x00ff /* Data to be transmitted */ -#define UTX_TXDATA_SHIFT 0 -#define UTX_CTS_DELTA 0x0100 /* CTS changed */ -#define UTX_CTS_STAT 0x0200 /* CTS State */ -#define UTX_BUSY 0x0400 /* FIFO is busy, sending a character */ -#define UTX_NOCTS 0x0800 /* Ignore CTS */ -#define UTX_SEND_BREAK 0x1000 /* Send a BREAK */ -#define UTX_TX_AVAIL 0x2000 /* Transmit FIFO has a slot available */ -#define UTX_FIFO_HALF 0x4000 /* Transmit FIFO is half empty */ -#define UTX_FIFO_EMPTY 0x8000 /* Transmit FIFO is empty */ - -/* '328-compatible definitions */ -#define UTX_CTS_STATUS UTX_CTS_STAT -#define UTX_IGNORE_CTS UTX_NOCTS - -/* - * UART Miscellaneous Register - */ -#define UMISC_ADDR 0xfffff908 -#define UMISC WORD_REF(UMISC_ADDR) - -#define UMISC_TX_POL 0x0004 /* Transmit Polarity */ -#define UMISC_RX_POL 0x0008 /* Receive Polarity */ -#define UMISC_IRDA_LOOP 0x0010 /* IrDA Loopback Enable */ -#define UMISC_IRDA_EN 0x0020 /* Infra-Red Enable */ -#define UMISC_RTS 0x0040 /* Set RTS status */ -#define UMISC_RTSCONT 0x0080 /* Choose RTS control */ -#define UMISC_IR_TEST 0x0400 /* IRDA Test Enable */ -#define UMISC_BAUD_RESET 0x0800 /* Reset Baud Rate Generation Counters */ -#define UMISC_LOOP 0x1000 /* Serial Loopback Enable */ -#define UMISC_FORCE_PERR 0x2000 /* Force Parity Error */ -#define UMISC_CLKSRC 0x4000 /* Clock Source */ -#define UMISC_BAUD_TEST 0x8000 /* Enable Baud Test Mode */ - -/* - * UART Non-integer Prescaler Register - */ -#define NIPR_ADDR 0xfffff90a -#define NIPR WORD_REF(NIPR_ADDR) - -#define NIPR_STEP_VALUE_MASK 0x00ff /* NI prescaler step value */ -#define NIPR_STEP_VALUE_SHIFT 0 -#define NIPR_SELECT_MASK 0x0700 /* Tap Selection */ -#define NIPR_SELECT_SHIFT 8 -#define NIPR_PRE_SEL 0x8000 /* Non-integer prescaler select */ - - -/* generalization of uart control registers to support multiple ports: */ -typedef struct { - volatile unsigned short int ustcnt; - volatile unsigned short int ubaud; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char rxdata; - } b; - } urx; - union { - volatile unsigned short int w; - struct { - volatile unsigned char status; - volatile unsigned char txdata; - } b; - } utx; - volatile unsigned short int umisc; - volatile unsigned short int nipr; - volatile unsigned short int hmark; - volatile unsigned short int unused; -} __attribute__((packed)) m68328_uart; - - - - -/********** - * - * 0xFFFFFAxx -- LCD Controller - * - **********/ - -/* - * LCD Screen Starting Address Register - */ -#define LSSA_ADDR 0xfffffa00 -#define LSSA LONG_REF(LSSA_ADDR) - -#define LSSA_SSA_MASK 0x1ffffffe /* Bits 0 and 29-31 are reserved */ - -/* - * LCD Virtual Page Width Register - */ -#define LVPW_ADDR 0xfffffa05 -#define LVPW BYTE_REF(LVPW_ADDR) - -/* - * LCD Screen Width Register (not compatible with '328 !!!) - */ -#define LXMAX_ADDR 0xfffffa08 -#define LXMAX WORD_REF(LXMAX_ADDR) - -#define LXMAX_XM_MASK 0x02f0 /* Bits 0-3 and 10-15 are reserved */ - -/* - * LCD Screen Height Register - */ -#define LYMAX_ADDR 0xfffffa0a -#define LYMAX WORD_REF(LYMAX_ADDR) - -#define LYMAX_YM_MASK 0x01ff /* Bits 9-15 are reserved */ - -/* - * LCD Cursor X Position Register - */ -#define LCXP_ADDR 0xfffffa18 -#define LCXP WORD_REF(LCXP_ADDR) - -#define LCXP_CC_MASK 0xc000 /* Cursor Control */ -#define LCXP_CC_TRAMSPARENT 0x0000 -#define LCXP_CC_BLACK 0x4000 -#define LCXP_CC_REVERSED 0x8000 -#define LCXP_CC_WHITE 0xc000 -#define LCXP_CXP_MASK 0x02ff /* Cursor X position */ - -/* - * LCD Cursor Y Position Register - */ -#define LCYP_ADDR 0xfffffa1a -#define LCYP WORD_REF(LCYP_ADDR) - -#define LCYP_CYP_MASK 0x01ff /* Cursor Y Position */ - -/* - * LCD Cursor Width and Heigth Register - */ -#define LCWCH_ADDR 0xfffffa1c -#define LCWCH WORD_REF(LCWCH_ADDR) - -#define LCWCH_CH_MASK 0x001f /* Cursor Height */ -#define LCWCH_CH_SHIFT 0 -#define LCWCH_CW_MASK 0x1f00 /* Cursor Width */ -#define LCWCH_CW_SHIFT 8 - -/* - * LCD Blink Control Register - */ -#define LBLKC_ADDR 0xfffffa1f -#define LBLKC BYTE_REF(LBLKC_ADDR) - -#define LBLKC_BD_MASK 0x7f /* Blink Divisor */ -#define LBLKC_BD_SHIFT 0 -#define LBLKC_BKEN 0x80 /* Blink Enabled */ - -/* - * LCD Panel Interface Configuration Register - */ -#define LPICF_ADDR 0xfffffa20 -#define LPICF BYTE_REF(LPICF_ADDR) - -#define LPICF_GS_MASK 0x03 /* Gray-Scale Mode */ -#define LPICF_GS_BW 0x00 -#define LPICF_GS_GRAY_4 0x01 -#define LPICF_GS_GRAY_16 0x02 -#define LPICF_PBSIZ_MASK 0x0c /* Panel Bus Width */ -#define LPICF_PBSIZ_1 0x00 -#define LPICF_PBSIZ_2 0x04 -#define LPICF_PBSIZ_4 0x08 - -/* - * LCD Polarity Configuration Register - */ -#define LPOLCF_ADDR 0xfffffa21 -#define LPOLCF BYTE_REF(LPOLCF_ADDR) - -#define LPOLCF_PIXPOL 0x01 /* Pixel Polarity */ -#define LPOLCF_LPPOL 0x02 /* Line Pulse Polarity */ -#define LPOLCF_FLMPOL 0x04 /* Frame Marker Polarity */ -#define LPOLCF_LCKPOL 0x08 /* LCD Shift Lock Polarity */ - -/* - * LACD (LCD Alternate Crystal Direction) Rate Control Register - */ -#define LACDRC_ADDR 0xfffffa23 -#define LACDRC BYTE_REF(LACDRC_ADDR) - -#define LACDRC_ACDSLT 0x80 /* Signal Source Select */ -#define LACDRC_ACD_MASK 0x0f /* Alternate Crystal Direction Control */ -#define LACDRC_ACD_SHIFT 0 - -/* - * LCD Pixel Clock Divider Register - */ -#define LPXCD_ADDR 0xfffffa25 -#define LPXCD BYTE_REF(LPXCD_ADDR) - -#define LPXCD_PCD_MASK 0x3f /* Pixel Clock Divider */ -#define LPXCD_PCD_SHIFT 0 - -/* - * LCD Clocking Control Register - */ -#define LCKCON_ADDR 0xfffffa27 -#define LCKCON BYTE_REF(LCKCON_ADDR) - -#define LCKCON_DWS_MASK 0x0f /* Display Wait-State */ -#define LCKCON_DWS_SHIFT 0 -#define LCKCON_DWIDTH 0x40 /* Display Memory Width */ -#define LCKCON_LCDON 0x80 /* Enable LCD Controller */ - -/* '328-compatible definitions */ -#define LCKCON_DW_MASK LCKCON_DWS_MASK -#define LCKCON_DW_SHIFT LCKCON_DWS_SHIFT - -/* - * LCD Refresh Rate Adjustment Register - */ -#define LRRA_ADDR 0xfffffa29 -#define LRRA BYTE_REF(LRRA_ADDR) - -/* - * LCD Panning Offset Register - */ -#define LPOSR_ADDR 0xfffffa2d -#define LPOSR BYTE_REF(LPOSR_ADDR) - -#define LPOSR_POS_MASK 0x0f /* Pixel Offset Code */ -#define LPOSR_POS_SHIFT 0 - -/* - * LCD Frame Rate Control Modulation Register - */ -#define LFRCM_ADDR 0xfffffa31 -#define LFRCM BYTE_REF(LFRCM_ADDR) - -#define LFRCM_YMOD_MASK 0x0f /* Vertical Modulation */ -#define LFRCM_YMOD_SHIFT 0 -#define LFRCM_XMOD_MASK 0xf0 /* Horizontal Modulation */ -#define LFRCM_XMOD_SHIFT 4 - -/* - * LCD Gray Palette Mapping Register - */ -#define LGPMR_ADDR 0xfffffa33 -#define LGPMR BYTE_REF(LGPMR_ADDR) - -#define LGPMR_G1_MASK 0x0f -#define LGPMR_G1_SHIFT 0 -#define LGPMR_G2_MASK 0xf0 -#define LGPMR_G2_SHIFT 4 - -/* - * PWM Contrast Control Register - */ -#define PWMR_ADDR 0xfffffa36 -#define PWMR WORD_REF(PWMR_ADDR) - -#define PWMR_PW_MASK 0x00ff /* Pulse Width */ -#define PWMR_PW_SHIFT 0 -#define PWMR_CCPEN 0x0100 /* Contrast Control Enable */ -#define PWMR_SRC_MASK 0x0600 /* Input Clock Source */ -#define PWMR_SRC_LINE 0x0000 /* Line Pulse */ -#define PWMR_SRC_PIXEL 0x0200 /* Pixel Clock */ -#define PWMR_SRC_LCD 0x4000 /* LCD clock */ - -/********** - * - * 0xFFFFFBxx -- Real-Time Clock (RTC) - * - **********/ - -/* - * RTC Hours Minutes and Seconds Register - */ -#define RTCTIME_ADDR 0xfffffb00 -#define RTCTIME LONG_REF(RTCTIME_ADDR) - -#define RTCTIME_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCTIME_SECONDS_SHIFT 0 -#define RTCTIME_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCTIME_MINUTES_SHIFT 16 -#define RTCTIME_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCTIME_HOURS_SHIFT 24 - -/* - * RTC Alarm Register - */ -#define RTCALRM_ADDR 0xfffffb04 -#define RTCALRM LONG_REF(RTCALRM_ADDR) - -#define RTCALRM_SECONDS_MASK 0x0000003f /* Seconds */ -#define RTCALRM_SECONDS_SHIFT 0 -#define RTCALRM_MINUTES_MASK 0x003f0000 /* Minutes */ -#define RTCALRM_MINUTES_SHIFT 16 -#define RTCALRM_HOURS_MASK 0x1f000000 /* Hours */ -#define RTCALRM_HOURS_SHIFT 24 - -/* - * Watchdog Timer Register - */ -#define WATCHDOG_ADDR 0xfffffb0a -#define WATCHDOG WORD_REF(WATCHDOG_ADDR) - -#define WATCHDOG_EN 0x0001 /* Watchdog Enabled */ -#define WATCHDOG_ISEL 0x0002 /* Select the watchdog interrupt */ -#define WATCHDOG_INTF 0x0080 /* Watchdog interrupt occcured */ -#define WATCHDOG_CNT_MASK 0x0300 /* Watchdog Counter */ -#define WATCHDOG_CNT_SHIFT 8 - -/* - * RTC Control Register - */ -#define RTCCTL_ADDR 0xfffffb0c -#define RTCCTL WORD_REF(RTCCTL_ADDR) - -#define RTCCTL_XTL 0x0020 /* Crystal Selection */ -#define RTCCTL_EN 0x0080 /* RTC Enable */ - -/* '328-compatible definitions */ -#define RTCCTL_384 RTCCTL_XTL -#define RTCCTL_ENABLE RTCCTL_EN - -/* - * RTC Interrupt Status Register - */ -#define RTCISR_ADDR 0xfffffb0e -#define RTCISR WORD_REF(RTCISR_ADDR) - -#define RTCISR_SW 0x0001 /* Stopwatch timed out */ -#define RTCISR_MIN 0x0002 /* 1-minute interrupt has occurred */ -#define RTCISR_ALM 0x0004 /* Alarm interrupt has occurred */ -#define RTCISR_DAY 0x0008 /* 24-hour rollover interrupt has occurred */ -#define RTCISR_1HZ 0x0010 /* 1Hz interrupt has occurred */ -#define RTCISR_HR 0x0020 /* 1-hour interrupt has occurred */ -#define RTCISR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt has occurred */ -#define RTCISR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt has occurred */ -#define RTCISR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt has occurred */ -#define RTCISR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt has occurred */ -#define RTCISR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt has occurred */ -#define RTCISR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt has occurred */ -#define RTCISR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt has occurred */ -#define RTCISR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt has occurred */ - -/* - * RTC Interrupt Enable Register - */ -#define RTCIENR_ADDR 0xfffffb10 -#define RTCIENR WORD_REF(RTCIENR_ADDR) - -#define RTCIENR_SW 0x0001 /* Stopwatch interrupt enable */ -#define RTCIENR_MIN 0x0002 /* 1-minute interrupt enable */ -#define RTCIENR_ALM 0x0004 /* Alarm interrupt enable */ -#define RTCIENR_DAY 0x0008 /* 24-hour rollover interrupt enable */ -#define RTCIENR_1HZ 0x0010 /* 1Hz interrupt enable */ -#define RTCIENR_HR 0x0020 /* 1-hour interrupt enable */ -#define RTCIENR_SAM0 0x0100 /* 4Hz / 4.6875Hz interrupt enable */ -#define RTCIENR_SAM1 0x0200 /* 8Hz / 9.3750Hz interrupt enable */ -#define RTCIENR_SAM2 0x0400 /* 16Hz / 18.7500Hz interrupt enable */ -#define RTCIENR_SAM3 0x0800 /* 32Hz / 37.5000Hz interrupt enable */ -#define RTCIENR_SAM4 0x1000 /* 64Hz / 75.0000Hz interrupt enable */ -#define RTCIENR_SAM5 0x2000 /* 128Hz / 150.0000Hz interrupt enable */ -#define RTCIENR_SAM6 0x4000 /* 256Hz / 300.0000Hz interrupt enable */ -#define RTCIENR_SAM7 0x8000 /* 512Hz / 600.0000Hz interrupt enable */ - -/* - * Stopwatch Minutes Register - */ -#define STPWCH_ADDR 0xfffffb12 -#define STPWCH WORD_REF(STPWCH_ADDR) - -#define STPWCH_CNT_MASK 0x003f /* Stopwatch countdown value */ -#define SPTWCH_CNT_SHIFT 0 - -/* - * RTC Day Count Register - */ -#define DAYR_ADDR 0xfffffb1a -#define DAYR WORD_REF(DAYR_ADDR) - -#define DAYR_DAYS_MASK 0x1ff /* Day Setting */ -#define DAYR_DAYS_SHIFT 0 - -/* - * RTC Day Alarm Register - */ -#define DAYALARM_ADDR 0xfffffb1c -#define DAYALARM WORD_REF(DAYALARM_ADDR) - -#define DAYALARM_DAYSAL_MASK 0x01ff /* Day Setting of the Alarm */ -#define DAYALARM_DAYSAL_SHIFT 0 - -/********** - * - * 0xFFFFFCxx -- DRAM Controller - * - **********/ - -/* - * DRAM Memory Configuration Register - */ -#define DRAMMC_ADDR 0xfffffc00 -#define DRAMMC WORD_REF(DRAMMC_ADDR) - -#define DRAMMC_ROW12_MASK 0xc000 /* Row address bit for MD12 */ -#define DRAMMC_ROW12_PA10 0x0000 -#define DRAMMC_ROW12_PA21 0x4000 -#define DRAMMC_ROW12_PA23 0x8000 -#define DRAMMC_ROW0_MASK 0x3000 /* Row address bit for MD0 */ -#define DRAMMC_ROW0_PA11 0x0000 -#define DRAMMC_ROW0_PA22 0x1000 -#define DRAMMC_ROW0_PA23 0x2000 -#define DRAMMC_ROW11 0x0800 /* Row address bit for MD11 PA20/PA22 */ -#define DRAMMC_ROW10 0x0400 /* Row address bit for MD10 PA19/PA21 */ -#define DRAMMC_ROW9 0x0200 /* Row address bit for MD9 PA9/PA19 */ -#define DRAMMC_ROW8 0x0100 /* Row address bit for MD8 PA10/PA20 */ -#define DRAMMC_COL10 0x0080 /* Col address bit for MD10 PA11/PA0 */ -#define DRAMMC_COL9 0x0040 /* Col address bit for MD9 PA10/PA0 */ -#define DRAMMC_COL8 0x0020 /* Col address bit for MD8 PA9/PA0 */ -#define DRAMMC_REF_MASK 0x001f /* Reresh Cycle */ -#define DRAMMC_REF_SHIFT 0 - -/* - * DRAM Control Register - */ -#define DRAMC_ADDR 0xfffffc02 -#define DRAMC WORD_REF(DRAMC_ADDR) - -#define DRAMC_DWE 0x0001 /* DRAM Write Enable */ -#define DRAMC_RST 0x0002 /* Reset Burst Refresh Enable */ -#define DRAMC_LPR 0x0004 /* Low-Power Refresh Enable */ -#define DRAMC_SLW 0x0008 /* Slow RAM */ -#define DRAMC_LSP 0x0010 /* Light Sleep */ -#define DRAMC_MSW 0x0020 /* Slow Multiplexing */ -#define DRAMC_WS_MASK 0x00c0 /* Wait-states */ -#define DRAMC_WS_SHIFT 6 -#define DRAMC_PGSZ_MASK 0x0300 /* Page Size for fast page mode */ -#define DRAMC_PGSZ_SHIFT 8 -#define DRAMC_PGSZ_256K 0x0000 -#define DRAMC_PGSZ_512K 0x0100 -#define DRAMC_PGSZ_1024K 0x0200 -#define DRAMC_PGSZ_2048K 0x0300 -#define DRAMC_EDO 0x0400 /* EDO DRAM */ -#define DRAMC_CLK 0x0800 /* Refresh Timer Clock source select */ -#define DRAMC_BC_MASK 0x3000 /* Page Access Clock Cycle (FP mode) */ -#define DRAMC_BC_SHIFT 12 -#define DRAMC_RM 0x4000 /* Refresh Mode */ -#define DRAMC_EN 0x8000 /* DRAM Controller enable */ - - -/********** - * - * 0xFFFFFDxx -- In-Circuit Emulation (ICE) - * - **********/ - -/* - * ICE Module Address Compare Register - */ -#define ICEMACR_ADDR 0xfffffd00 -#define ICEMACR LONG_REF(ICEMACR_ADDR) - -/* - * ICE Module Address Mask Register - */ -#define ICEMAMR_ADDR 0xfffffd04 -#define ICEMAMR LONG_REF(ICEMAMR_ADDR) - -/* - * ICE Module Control Compare Register - */ -#define ICEMCCR_ADDR 0xfffffd08 -#define ICEMCCR WORD_REF(ICEMCCR_ADDR) - -#define ICEMCCR_PD 0x0001 /* Program/Data Cycle Selection */ -#define ICEMCCR_RW 0x0002 /* Read/Write Cycle Selection */ - -/* - * ICE Module Control Mask Register - */ -#define ICEMCMR_ADDR 0xfffffd0a -#define ICEMCMR WORD_REF(ICEMCMR_ADDR) - -#define ICEMCMR_PDM 0x0001 /* Program/Data Cycle Mask */ -#define ICEMCMR_RWM 0x0002 /* Read/Write Cycle Mask */ - -/* - * ICE Module Control Register - */ -#define ICEMCR_ADDR 0xfffffd0c -#define ICEMCR WORD_REF(ICEMCR_ADDR) - -#define ICEMCR_CEN 0x0001 /* Compare Enable */ -#define ICEMCR_PBEN 0x0002 /* Program Break Enable */ -#define ICEMCR_SB 0x0004 /* Single Breakpoint */ -#define ICEMCR_HMDIS 0x0008 /* HardMap disable */ -#define ICEMCR_BBIEN 0x0010 /* Bus Break Interrupt Enable */ - -/* - * ICE Module Status Register - */ -#define ICEMSR_ADDR 0xfffffd0e -#define ICEMSR WORD_REF(ICEMSR_ADDR) - -#define ICEMSR_EMUEN 0x0001 /* Emulation Enable */ -#define ICEMSR_BRKIRQ 0x0002 /* A-Line Vector Fetch Detected */ -#define ICEMSR_BBIRQ 0x0004 /* Bus Break Interrupt Detected */ -#define ICEMSR_EMIRQ 0x0008 /* EMUIRQ Falling Edge Detected */ - -#endif /* _MC68VZ328_H_ */ diff --git a/include/asm-m68knommu/a.out.h b/include/asm-m68knommu/a.out.h deleted file mode 100644 index ce18ef9..0000000 --- a/include/asm-m68knommu/a.out.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/anchor.h b/include/asm-m68knommu/anchor.h deleted file mode 100644 index 871c0d5..0000000 --- a/include/asm-m68knommu/anchor.h +++ /dev/null @@ -1,112 +0,0 @@ -/****************************************************************************/ - -/* - * anchor.h -- Anchor CO-MEM Lite PCI host bridge part. - * - * (C) Copyright 2000, Moreton Bay (www.moreton.com.au) - */ - -/****************************************************************************/ -#ifndef anchor_h -#define anchor_h -/****************************************************************************/ - -/* - * Define basic addressing info. - */ -#if defined(CONFIG_M5407C3) -#define COMEM_BASE 0xFFFF0000 /* Base of CO-MEM address space */ -#define COMEM_IRQ 25 /* IRQ of anchor part */ -#else -#define COMEM_BASE 0x80000000 /* Base of CO-MEM address space */ -#define COMEM_IRQ 25 /* IRQ of anchor part */ -#endif - -/****************************************************************************/ - -/* - * 4-byte registers of CO-MEM, so adjust register addresses for - * easy access. Handy macro for word access too. - */ -#define LREG(a) ((a) >> 2) -#define WREG(a) ((a) >> 1) - - -/* - * Define base addresses within CO-MEM Lite register address space. - */ -#define COMEM_I2O 0x0000 /* I2O registers */ -#define COMEM_OPREGS 0x0400 /* Operation registers */ -#define COMEM_PCIBUS 0x2000 /* Direct access to PCI bus */ -#define COMEM_SHMEM 0x4000 /* Shared memory region */ - -#define COMEM_SHMEMSIZE 0x4000 /* Size of shared memory */ - - -/* - * Define CO-MEM Registers. - */ -#define COMEM_I2OHISR 0x0030 /* I2O host interrupt status */ -#define COMEM_I2OHIMR 0x0034 /* I2O host interrupt mask */ -#define COMEM_I2OLISR 0x0038 /* I2O local interrupt status */ -#define COMEM_I2OLIMR 0x003c /* I2O local interrupt mask */ -#define COMEM_IBFPFIFO 0x0040 /* I2O inbound free/post FIFO */ -#define COMEM_OBPFFIFO 0x0044 /* I2O outbound post/free FIFO */ -#define COMEM_IBPFFIFO 0x0048 /* I2O inbound post/free FIFO */ -#define COMEM_OBFPFIFO 0x004c /* I2O outbound free/post FIFO */ - -#define COMEM_DAHBASE 0x0460 /* Direct access base address */ - -#define COMEM_NVCMD 0x04a0 /* I2C serial command */ -#define COMEM_NVREAD 0x04a4 /* I2C serial read */ -#define COMEM_NVSTAT 0x04a8 /* I2C status */ - -#define COMEM_DMALBASE 0x04b0 /* DMA local base address */ -#define COMEM_DMAHBASE 0x04b4 /* DMA host base address */ -#define COMEM_DMASIZE 0x04b8 /* DMA size */ -#define COMEM_DMACTL 0x04bc /* DMA control */ - -#define COMEM_HCTL 0x04e0 /* Host control */ -#define COMEM_HINT 0x04e4 /* Host interrupt control/status */ -#define COMEM_HLDATA 0x04e8 /* Host to local data mailbox */ -#define COMEM_LINT 0x04f4 /* Local interrupt contole status */ -#define COMEM_LHDATA 0x04f8 /* Local to host data mailbox */ - -#define COMEM_LBUSCFG 0x04fc /* Local bus configuration */ - - -/* - * Commands and flags for use with Direct Access Register. - */ -#define COMEM_DA_IACK 0x00000000 /* Interrupt acknowledge (read) */ -#define COMEM_DA_SPCL 0x00000010 /* Special cycle (write) */ -#define COMEM_DA_MEMRD 0x00000004 /* Memory read cycle */ -#define COMEM_DA_MEMWR 0x00000004 /* Memory write cycle */ -#define COMEM_DA_IORD 0x00000002 /* I/O read cycle */ -#define COMEM_DA_IOWR 0x00000002 /* I/O write cycle */ -#define COMEM_DA_CFGRD 0x00000006 /* Configuration read cycle */ -#define COMEM_DA_CFGWR 0x00000006 /* Configuration write cycle */ - -#define COMEM_DA_ADDR(a) ((a) & 0xffffe000) - -#define COMEM_DA_OFFSET(a) ((a) & 0x00001fff) - - -/* - * The PCI bus will be limited in what slots will actually be used. - * Define valid device numbers for different boards. - */ -#if defined(CONFIG_M5407C3) -#define COMEM_MINDEV 14 /* Minimum valid DEVICE */ -#define COMEM_MAXDEV 14 /* Maximum valid DEVICE */ -#define COMEM_BRIDGEDEV 15 /* Slot bridge is in */ -#else -#define COMEM_MINDEV 0 /* Minimum valid DEVICE */ -#define COMEM_MAXDEV 3 /* Maximum valid DEVICE */ -#endif - -#define COMEM_MAXPCI (COMEM_MAXDEV+1) /* Maximum PCI devices */ - - -/****************************************************************************/ -#endif /* anchor_h */ diff --git a/include/asm-m68knommu/atomic.h b/include/asm-m68knommu/atomic.h deleted file mode 100644 index d5632a3..0000000 --- a/include/asm-m68knommu/atomic.h +++ /dev/null @@ -1,155 +0,0 @@ -#ifndef __ARCH_M68KNOMMU_ATOMIC__ -#define __ARCH_M68KNOMMU_ATOMIC__ - -#include - -/* - * Atomic operations that C can't guarantee us. Useful for - * resource counting etc.. - */ - -/* - * We do not have SMP m68k systems, so we don't have to deal with that. - */ - -typedef struct { int counter; } atomic_t; -#define ATOMIC_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic_set(v, i) (((v)->counter) = i) - -static __inline__ void atomic_add(int i, atomic_t *v) -{ -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "d" (i)); -#else - __asm__ __volatile__("addl %1,%0" : "+m" (*v) : "di" (i)); -#endif -} - -static __inline__ void atomic_sub(int i, atomic_t *v) -{ -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "d" (i)); -#else - __asm__ __volatile__("subl %1,%0" : "+m" (*v) : "di" (i)); -#endif -} - -static __inline__ int atomic_sub_and_test(int i, atomic_t * v) -{ - char c; -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__("subl %2,%1; seq %0" - : "=d" (c), "+m" (*v) - : "d" (i)); -#else - __asm__ __volatile__("subl %2,%1; seq %0" - : "=d" (c), "+m" (*v) - : "di" (i)); -#endif - return c != 0; -} - -static __inline__ void atomic_inc(volatile atomic_t *v) -{ - __asm__ __volatile__("addql #1,%0" : "+m" (*v)); -} - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ - -static __inline__ int atomic_inc_and_test(volatile atomic_t *v) -{ - char c; - __asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v)); - return c != 0; -} - -static __inline__ void atomic_dec(volatile atomic_t *v) -{ - __asm__ __volatile__("subql #1,%0" : "+m" (*v)); -} - -static __inline__ int atomic_dec_and_test(volatile atomic_t *v) -{ - char c; - __asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v)); - return c != 0; -} - -static __inline__ void atomic_clear_mask(unsigned long mask, unsigned long *v) -{ - __asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask))); -} - -static __inline__ void atomic_set_mask(unsigned long mask, unsigned long *v) -{ - __asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask)); -} - -/* Atomic operations are already serializing */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -static inline int atomic_add_return(int i, atomic_t * v) -{ - unsigned long temp, flags; - - local_irq_save(flags); - temp = *(long *)v; - temp += i; - *(long *)v = temp; - local_irq_restore(flags); - - return temp; -} - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -static inline int atomic_sub_return(int i, atomic_t * v) -{ - unsigned long temp, flags; - - local_irq_save(flags); - temp = *(long *)v; - temp -= i; - *(long *)v = temp; - local_irq_restore(flags); - - return temp; -} - -#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n))) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic_dec_return(v) atomic_sub_return(1,(v)) -#define atomic_inc_return(v) atomic_add_return(1,(v)) - -#include -#endif /* __ARCH_M68KNOMMU_ATOMIC __ */ diff --git a/include/asm-m68knommu/auxvec.h b/include/asm-m68knommu/auxvec.h deleted file mode 100644 index 844d6d5..0000000 --- a/include/asm-m68knommu/auxvec.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __ASMm68k_AUXVEC_H -#define __ASMm68k_AUXVEC_H - -#endif diff --git a/include/asm-m68knommu/bitops.h b/include/asm-m68knommu/bitops.h deleted file mode 100644 index 6f3685e..0000000 --- a/include/asm-m68knommu/bitops.h +++ /dev/null @@ -1,336 +0,0 @@ -#ifndef _M68KNOMMU_BITOPS_H -#define _M68KNOMMU_BITOPS_H - -/* - * Copyright 1992, Linus Torvalds. - */ - -#include -#include /* swab32 */ - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only can be included directly -#endif - -#if defined (__mcfisaaplus__) || defined (__mcfisac__) -static inline int ffs(unsigned int val) -{ - if (!val) - return 0; - - asm volatile( - "bitrev %0\n\t" - "ff1 %0\n\t" - : "=d" (val) - : "0" (val) - ); - val++; - return val; -} - -static inline int __ffs(unsigned int val) -{ - asm volatile( - "bitrev %0\n\t" - "ff1 %0\n\t" - : "=d" (val) - : "0" (val) - ); - return val; -} - -#else -#include -#include -#endif - -#include -#include - -static __inline__ void set_bit(int nr, volatile unsigned long * addr) -{ -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0", "cc"); -#else - __asm__ __volatile__ ("bset %1,%0" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - : "cc"); -#endif -} - -#define __set_bit(nr, addr) set_bit(nr, addr) - -/* - * clear_bit() doesn't provide any barrier for the compiler. - */ -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() - -static __inline__ void clear_bit(int nr, volatile unsigned long * addr) -{ -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0", "cc"); -#else - __asm__ __volatile__ ("bclr %1,%0" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - : "cc"); -#endif -} - -#define __clear_bit(nr, addr) clear_bit(nr, addr) - -static __inline__ void change_bit(int nr, volatile unsigned long * addr) -{ -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0", "cc"); -#else - __asm__ __volatile__ ("bchg %1,%0" - : "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - : "cc"); -#endif -} - -#define __change_bit(nr, addr) change_bit(nr, addr) - -static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("bset %2,%1; sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -#define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr) - -static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("bclr %2,%1; sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -#define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr) - -static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("bchg %2,%1; sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3]) - : "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -#define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr) - -/* - * This routine doesn't need to be atomic. - */ -static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr) -{ - return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0; -} - -static __inline__ int __test_bit(int nr, const volatile unsigned long * addr) -{ - int * a = (int *) addr; - int mask; - - a += nr >> 5; - mask = 1 << (nr & 0x1f); - return ((mask & *a) != 0); -} - -#define test_bit(nr,addr) \ -(__builtin_constant_p(nr) ? \ - __constant_test_bit((nr),(addr)) : \ - __test_bit((nr),(addr))) - -#include -#include -#include - -static __inline__ int ext2_set_bit(int nr, volatile void * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3]) - : "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("bset %2,%1; sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3]) - : "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -static __inline__ int ext2_clear_bit(int nr, volatile void * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3]) - : "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("bclr %2,%1; sne %0" - : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3]) - : "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -#define ext2_set_bit_atomic(lock, nr, addr) \ - ({ \ - int ret; \ - spin_lock(lock); \ - ret = ext2_set_bit((nr), (addr)); \ - spin_unlock(lock); \ - ret; \ - }) - -#define ext2_clear_bit_atomic(lock, nr, addr) \ - ({ \ - int ret; \ - spin_lock(lock); \ - ret = ext2_clear_bit((nr), (addr)); \ - spin_unlock(lock); \ - ret; \ - }) - -static __inline__ int ext2_test_bit(int nr, const volatile void * addr) -{ - char retval; - -#ifdef CONFIG_COLDFIRE - __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0" - : "=d" (retval) - : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr) - : "%a0"); -#else - __asm__ __volatile__ ("btst %2,%1; sne %0" - : "=d" (retval) - : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr) - /* No clobber */); -#endif - - return retval; -} - -#define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) - -static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) -{ - unsigned long *p = ((unsigned long *) addr) + (offset >> 5); - unsigned long result = offset & ~31UL; - unsigned long tmp; - - if (offset >= size) - return size; - size -= result; - offset &= 31UL; - if(offset) { - /* We hold the little endian value in tmp, but then the - * shift is illegal. So we could keep a big endian value - * in tmp, like this: - * - * tmp = __swab32(*(p++)); - * tmp |= ~0UL >> (32-offset); - * - * but this would decrease performance, so we change the - * shift: - */ - tmp = *(p++); - tmp |= __swab32(~0UL >> (32-offset)); - if(size < 32) - goto found_first; - if(~tmp) - goto found_middle; - size -= 32; - result += 32; - } - while(size & ~31UL) { - if(~(tmp = *(p++))) - goto found_middle; - result += 32; - size -= 32; - } - if(!size) - return result; - tmp = *p; - -found_first: - /* tmp is little endian, so we would have to swab the shift, - * see above. But then we have to swab tmp below for ffz, so - * we might as well do this here. - */ - return result + ffz(__swab32(tmp) | (~0UL << size)); -found_middle: - return result + ffz(__swab32(tmp)); -} - -#define ext2_find_next_bit(addr, size, off) \ - generic_find_next_le_bit((unsigned long *)(addr), (size), (off)) -#include - -#endif /* __KERNEL__ */ - -#include -#include - -#endif /* _M68KNOMMU_BITOPS_H */ diff --git a/include/asm-m68knommu/bootinfo.h b/include/asm-m68knommu/bootinfo.h deleted file mode 100644 index c12e526..0000000 --- a/include/asm-m68knommu/bootinfo.h +++ /dev/null @@ -1,2 +0,0 @@ - -/* Nothing for m68knommu */ diff --git a/include/asm-m68knommu/bootstd.h b/include/asm-m68knommu/bootstd.h deleted file mode 100644 index bdc1a4a..0000000 --- a/include/asm-m68knommu/bootstd.h +++ /dev/null @@ -1,132 +0,0 @@ -/* bootstd.h: Bootloader system call interface - * - * (c) 1999, Rt-Control, Inc. - */ - -#ifndef __BOOTSTD_H__ -#define __BOOTSTD_H__ - -#define NR_BSC 21 /* last used bootloader system call */ - -#define __BN_reset 0 /* reset and start the bootloader */ -#define __BN_test 1 /* tests the system call interface */ -#define __BN_exec 2 /* executes a bootloader image */ -#define __BN_exit 3 /* terminates a bootloader image */ -#define __BN_program 4 /* program FLASH from a chain */ -#define __BN_erase 5 /* erase sector(s) of FLASH */ -#define __BN_open 6 -#define __BN_write 7 -#define __BN_read 8 -#define __BN_close 9 -#define __BN_mmap 10 /* map a file descriptor into memory */ -#define __BN_munmap 11 /* remove a file to memory mapping */ -#define __BN_gethwaddr 12 /* get the hardware address of my interfaces */ -#define __BN_getserialnum 13 /* get the serial number of this board */ -#define __BN_getbenv 14 /* get a bootloader envvar */ -#define __BN_setbenv 15 /* get a bootloader envvar */ -#define __BN_setpmask 16 /* set the protection mask */ -#define __BN_readenv 17 /* read environment variables */ -#define __BN_flash_chattr_range 18 -#define __BN_flash_erase_range 19 -#define __BN_flash_write_range 20 - -/* Calling conventions compatible to (uC)linux/68k - * We use simmilar macros to call into the bootloader as for uClinux - */ - -#define __bsc_return(type, res) \ -do { \ - if ((unsigned long)(res) >= (unsigned long)(-64)) { \ - /* let errno be a function, preserve res in %d0 */ \ - int __err = -(res); \ - errno = __err; \ - res = -1; \ - } \ - return (type)(res); \ -} while (0) - -#define _bsc0(type,name) \ -type name(void) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res) \ - ); \ - __bsc_return(type,__res); \ -} - -#define _bsc1(type,name,atype,a) \ -type name(atype a) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - register long __a __asm__ ("%d1") = (long)a; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res), "d" (__a) \ - ); \ - __bsc_return(type,__res); \ -} - -#define _bsc2(type,name,atype,a,btype,b) \ -type name(atype a, btype b) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - register long __a __asm__ ("%d1") = (long)a; \ - register long __b __asm__ ("%d2") = (long)b; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res), "d" (__a), "d" (__b) \ - ); \ - __bsc_return(type,__res); \ -} - -#define _bsc3(type,name,atype,a,btype,b,ctype,c) \ -type name(atype a, btype b, ctype c) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - register long __a __asm__ ("%d1") = (long)a; \ - register long __b __asm__ ("%d2") = (long)b; \ - register long __c __asm__ ("%d3") = (long)c; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res), "d" (__a), "d" (__b), \ - "d" (__c) \ - ); \ - __bsc_return(type,__res); \ -} - -#define _bsc4(type,name,atype,a,btype,b,ctype,c,dtype,d) \ -type name(atype a, btype b, ctype c, dtype d) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - register long __a __asm__ ("%d1") = (long)a; \ - register long __b __asm__ ("%d2") = (long)b; \ - register long __c __asm__ ("%d3") = (long)c; \ - register long __d __asm__ ("%d4") = (long)d; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res), "d" (__a), "d" (__b), \ - "d" (__c), "d" (__d) \ - ); \ - __bsc_return(type,__res); \ -} - -#define _bsc5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \ -type name(atype a, btype b, ctype c, dtype d, etype e) \ -{ \ - register long __res __asm__ ("%d0") = __BN_##name; \ - register long __a __asm__ ("%d1") = (long)a; \ - register long __b __asm__ ("%d2") = (long)b; \ - register long __c __asm__ ("%d3") = (long)c; \ - register long __d __asm__ ("%d4") = (long)d; \ - register long __e __asm__ ("%d5") = (long)e; \ - __asm__ __volatile__ ("trap #2" \ - : "=g" (__res) \ - : "0" (__res), "d" (__a), "d" (__b), \ - "d" (__c), "d" (__d), "d" (__e) \ - ); \ - __bsc_return(type,__res); \ -} - -#endif /* __BOOTSTD_H__ */ diff --git a/include/asm-m68knommu/bug.h b/include/asm-m68knommu/bug.h deleted file mode 100644 index 70e7dc0..0000000 --- a/include/asm-m68knommu/bug.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _M68KNOMMU_BUG_H -#define _M68KNOMMU_BUG_H -#include -#endif diff --git a/include/asm-m68knommu/bugs.h b/include/asm-m68knommu/bugs.h deleted file mode 100644 index 5f382da..0000000 --- a/include/asm-m68knommu/bugs.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-m68k/bugs.h - * - * Copyright (C) 1994 Linus Torvalds - */ - -/* - * This is included by init/main.c to check for architecture-dependent bugs. - * - * Needs: - * void check_bugs(void); - */ - -static void check_bugs(void) -{ -} diff --git a/include/asm-m68knommu/byteorder.h b/include/asm-m68knommu/byteorder.h deleted file mode 100644 index 20bb442..0000000 --- a/include/asm-m68knommu/byteorder.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef _M68KNOMMU_BYTEORDER_H -#define _M68KNOMMU_BYTEORDER_H - -#include - -#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) -# define __BYTEORDER_HAS_U64__ -# define __SWAB_64_THRU_32__ -#endif - -#if defined (__mcfisaaplus__) || defined (__mcfisac__) -static inline __attribute_const__ __u32 ___arch__swab32(__u32 val) -{ - asm( - "byterev %0" - : "=d" (val) - : "0" (val) - ); - return val; -} - -#define __arch__swab32(x) ___arch__swab32(x) -#endif - -#include - -#endif /* _M68KNOMMU_BYTEORDER_H */ diff --git a/include/asm-m68knommu/cache.h b/include/asm-m68knommu/cache.h deleted file mode 100644 index 24e9eac..0000000 --- a/include/asm-m68knommu/cache.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef __ARCH_M68KNOMMU_CACHE_H -#define __ARCH_M68KNOMMU_CACHE_H - -/* bytes per L1 cache line */ -#define L1_CACHE_BYTES 16 /* this need to be at least 1 */ - -/* m68k-elf-gcc 2.95.2 doesn't like these */ - -#define __cacheline_aligned -#define ____cacheline_aligned - -#endif diff --git a/include/asm-m68knommu/cachectl.h b/include/asm-m68knommu/cachectl.h deleted file mode 100644 index bcf5a6a..0000000 --- a/include/asm-m68knommu/cachectl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h deleted file mode 100644 index 87e5dc04..0000000 --- a/include/asm-m68knommu/cacheflush.h +++ /dev/null @@ -1,84 +0,0 @@ -#ifndef _M68KNOMMU_CACHEFLUSH_H -#define _M68KNOMMU_CACHEFLUSH_H - -/* - * (C) Copyright 2000-2004, Greg Ungerer - */ -#include - -#define flush_cache_all() __flush_cache_all() -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) __flush_cache_all() -#define flush_cache_page(vma, vmaddr) do { } while (0) -#define flush_dcache_range(start,len) __flush_cache_all() -#define flush_dcache_page(page) do { } while (0) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) -#define flush_icache_range(start,len) __flush_cache_all() -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - memcpy(dst, src, len) - -static inline void __flush_cache_all(void) -{ -#ifdef CONFIG_M5407 - /* - * Use cpushl to push and invalidate all cache lines. - * Gas doesn't seem to know how to generate the ColdFire - * cpushl instruction... Oh well, bit stuff it for now. - */ - __asm__ __volatile__ ( - "nop\n\t" - "clrl %%d0\n\t" - "1:\n\t" - "movel %%d0,%%a0\n\t" - "2:\n\t" - ".word 0xf468\n\t" - "addl #0x10,%%a0\n\t" - "cmpl #0x00000800,%%a0\n\t" - "blt 2b\n\t" - "addql #1,%%d0\n\t" - "cmpil #4,%%d0\n\t" - "bne 1b\n\t" - "movel #0xb6088500,%%d0\n\t" - "movec %%d0,%%CACR\n\t" - : : : "d0", "a0" ); -#endif /* CONFIG_M5407 */ -#if defined(CONFIG_M527x) || defined(CONFIG_M528x) - __asm__ __volatile__ ( - "movel #0x81000200, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M527x || CONFIG_M528x */ -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272) - __asm__ __volatile__ ( - "movel #0x81000100, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */ -#ifdef CONFIG_M5249 - __asm__ __volatile__ ( - "movel #0xa1000200, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M5249 */ -#ifdef CONFIG_M532x - __asm__ __volatile__ ( - "movel #0x81000200, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - : : : "d0" ); -#endif /* CONFIG_M532x */ -} - -#endif /* _M68KNOMMU_CACHEFLUSH_H */ diff --git a/include/asm-m68knommu/checksum.h b/include/asm-m68knommu/checksum.h deleted file mode 100644 index 8188348..0000000 --- a/include/asm-m68knommu/checksum.h +++ /dev/null @@ -1,132 +0,0 @@ -#ifndef _M68K_CHECKSUM_H -#define _M68K_CHECKSUM_H - -#include - -/* - * computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -__wsum csum_partial(const void *buff, int len, __wsum sum); - -/* - * the same as csum_partial, but copies from src while it - * checksums - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -__wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum); - - -/* - * the same as csum_partial_copy, but copies from user space. - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -extern __wsum csum_partial_copy_from_user(const void __user *src, - void *dst, int len, __wsum sum, int *csum_err); - -__sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -/* - * Fold a partial checksum - */ - -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp = (__force u32)sum; -#ifdef CONFIG_COLDFIRE - tmp = (tmp & 0xffff) + (tmp >> 16); - tmp = (tmp & 0xffff) + (tmp >> 16); - return (__force __sum16)~tmp; -#else - __asm__("swap %1\n\t" - "addw %1, %0\n\t" - "clrw %1\n\t" - "addxw %1, %0" - : "=&d" (sum), "=&d" (tmp) - : "0" (sum), "1" (sum)); - return (__force __sum16)~sum; -#endif -} - - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ - -static inline __wsum -csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, __wsum sum) -{ - __asm__ ("addl %1,%0\n\t" - "addxl %4,%0\n\t" - "addxl %5,%0\n\t" - "clrl %1\n\t" - "addxl %1,%0" - : "=&d" (sum), "=&d" (saddr) - : "0" (daddr), "1" (saddr), "d" (len + proto), - "d"(sum)); - return sum; -} - -static inline __sum16 -csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, - unsigned short proto, __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -/* - * this routine is used for miscellaneous IP-like checksums, mainly - * in icmp.c - */ - -extern __sum16 ip_compute_csum(const void *buff, int len); - -#define _HAVE_ARCH_IPV6_CSUM -static __inline__ __sum16 -csum_ipv6_magic(const struct in6_addr *saddr, const struct in6_addr *daddr, - __u32 len, unsigned short proto, __wsum sum) -{ - register unsigned long tmp; - __asm__("addl %2@,%0\n\t" - "movel %2@(4),%1\n\t" - "addxl %1,%0\n\t" - "movel %2@(8),%1\n\t" - "addxl %1,%0\n\t" - "movel %2@(12),%1\n\t" - "addxl %1,%0\n\t" - "movel %3@,%1\n\t" - "addxl %1,%0\n\t" - "movel %3@(4),%1\n\t" - "addxl %1,%0\n\t" - "movel %3@(8),%1\n\t" - "addxl %1,%0\n\t" - "movel %3@(12),%1\n\t" - "addxl %1,%0\n\t" - "addxl %4,%0\n\t" - "clrl %1\n\t" - "addxl %1,%0" - : "=&d" (sum), "=&d" (tmp) - : "a" (saddr), "a" (daddr), "d" (len + proto), - "0" (sum)); - - return csum_fold(sum); -} - -#endif /* _M68K_CHECKSUM_H */ diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h deleted file mode 100644 index 83a9fa4..0000000 --- a/include/asm-m68knommu/coldfire.h +++ /dev/null @@ -1,51 +0,0 @@ -/****************************************************************************/ - -/* - * coldfire.h -- Motorola ColdFire CPU sepecific defines - * - * (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef coldfire_h -#define coldfire_h -/****************************************************************************/ - - -/* - * Define master clock frequency. This is essentially done at config - * time now. No point enumerating dozens of possible clock options - * here. Also the peripheral clock (bus clock) divide ratio is set - * at config time too. - */ -#ifdef CONFIG_CLOCK_SET -#define MCF_CLK CONFIG_CLOCK_FREQ -#define MCF_BUSCLK (CONFIG_CLOCK_FREQ / CONFIG_CLOCK_DIV) -#else -#error "Don't know what your ColdFire CPU clock frequency is??" -#endif - -/* - * Define the processor support peripherals base address. - * This is generally setup by the boards start up code. - */ -#define MCF_MBAR 0x10000000 -#define MCF_MBAR2 0x80000000 -#if defined(CONFIG_M520x) -#define MCF_IPSBAR 0xFC000000 -#else -#define MCF_IPSBAR 0x40000000 -#endif - -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ - defined(CONFIG_M520x) -#undef MCF_MBAR -#define MCF_MBAR MCF_IPSBAR -#elif defined(CONFIG_M532x) -#undef MCF_MBAR -#define MCF_MBAR 0x00000000 -#endif - -/****************************************************************************/ -#endif /* coldfire_h */ diff --git a/include/asm-m68knommu/commproc.h b/include/asm-m68knommu/commproc.h deleted file mode 100644 index edf5eb6..0000000 --- a/include/asm-m68knommu/commproc.h +++ /dev/null @@ -1,703 +0,0 @@ - -/* - * 68360 Communication Processor Module. - * Copyright (c) 2000 Michael Leslie (mc68360) after: - * Copyright (c) 1997 Dan Malek (mpc8xx) - * - * This file contains structures and information for the communication - * processor channels. Some CPM control and status is available - * through the 68360 internal memory map. See include/asm/360_immap.h for details. - * This file is not a complete map of all of the 360 QUICC's capabilities - * - * On the MBX board, EPPC-Bug loads CPM microcode into the first 512 - * bytes of the DP RAM and relocates the I2C parameter area to the - * IDMA1 space. The remaining DP RAM is available for buffer descriptors - * or other use. - */ -#ifndef __CPM_360__ -#define __CPM_360__ - - -/* CPM Command register masks: */ -#define CPM_CR_RST ((ushort)0x8000) -#define CPM_CR_OPCODE ((ushort)0x0f00) -#define CPM_CR_CHAN ((ushort)0x00f0) -#define CPM_CR_FLG ((ushort)0x0001) - -/* CPM Command set (opcodes): */ -#define CPM_CR_INIT_TRX ((ushort)0x0000) -#define CPM_CR_INIT_RX ((ushort)0x0001) -#define CPM_CR_INIT_TX ((ushort)0x0002) -#define CPM_CR_HUNT_MODE ((ushort)0x0003) -#define CPM_CR_STOP_TX ((ushort)0x0004) -#define CPM_CR_GRSTOP_TX ((ushort)0x0005) -#define CPM_CR_RESTART_TX ((ushort)0x0006) -#define CPM_CR_CLOSE_RXBD ((ushort)0x0007) -#define CPM_CR_SET_GADDR ((ushort)0x0008) -#define CPM_CR_GCI_TIMEOUT ((ushort)0x0009) -#define CPM_CR_GCI_ABORT ((ushort)0x000a) -#define CPM_CR_RESET_BCS ((ushort)0x000a) - -/* CPM Channel numbers. */ -#define CPM_CR_CH_SCC1 ((ushort)0x0000) -#define CPM_CR_CH_SCC2 ((ushort)0x0004) -#define CPM_CR_CH_SPI ((ushort)0x0005) /* SPI / Timers */ -#define CPM_CR_CH_TMR ((ushort)0x0005) -#define CPM_CR_CH_SCC3 ((ushort)0x0008) -#define CPM_CR_CH_SMC1 ((ushort)0x0009) /* SMC1 / IDMA1 */ -#define CPM_CR_CH_IDMA1 ((ushort)0x0009) -#define CPM_CR_CH_SCC4 ((ushort)0x000c) -#define CPM_CR_CH_SMC2 ((ushort)0x000d) /* SMC2 / IDMA2 */ -#define CPM_CR_CH_IDMA2 ((ushort)0x000d) - - -#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4)) - -#if 1 /* mleslie: I dinna think we have any such restrictions on - * DP RAM aboard the 360 board - see the MC68360UM p.3-3 */ - -/* The dual ported RAM is multi-functional. Some areas can be (and are - * being) used for microcode. There is an area that can only be used - * as data ram for buffer descriptors, which is all we use right now. - * Currently the first 512 and last 256 bytes are used for microcode. - */ -/* mleslie: The uCquicc board is using no extra microcode in DPRAM */ -#define CPM_DATAONLY_BASE ((uint)0x0000) -#define CPM_DATAONLY_SIZE ((uint)0x0800) -#define CPM_DP_NOSPACE ((uint)0x7fffffff) - -#endif - - -/* Export the base address of the communication processor registers - * and dual port ram. */ -/* extern cpm360_t *cpmp; */ /* Pointer to comm processor */ -extern QUICC *pquicc; -uint m360_cpm_dpalloc(uint size); -/* void *m360_cpm_hostalloc(uint size); */ -void m360_cpm_setbrg(uint brg, uint rate); - -#if 0 /* use QUICC_BD declared in include/asm/m68360_quicc.h */ -/* Buffer descriptors used by many of the CPM protocols. */ -typedef struct cpm_buf_desc { - ushort cbd_sc; /* Status and Control */ - ushort cbd_datlen; /* Data length in buffer */ - uint cbd_bufaddr; /* Buffer address in host memory */ -} cbd_t; -#endif - - -/* rx bd status/control bits */ -#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */ -#define BD_SC_WRAP ((ushort)0x2000) /* Last buffer descriptor in table */ -#define BD_SC_INTRPT ((ushort)0x1000) /* Interrupt on change */ -#define BD_SC_LAST ((ushort)0x0800) /* Last buffer in frame OR control char */ - -#define BD_SC_FIRST ((ushort)0x0400) /* 1st buffer in an HDLC frame */ -#define BD_SC_ADDR ((ushort)0x0400) /* 1st byte is a multidrop address */ - -#define BD_SC_CM ((ushort)0x0200) /* Continous mode */ -#define BD_SC_ID ((ushort)0x0100) /* Received too many idles */ - -#define BD_SC_AM ((ushort)0x0080) /* Multidrop address match */ -#define BD_SC_DE ((ushort)0x0080) /* DPLL Error (HDLC) */ - -#define BD_SC_BR ((ushort)0x0020) /* Break received */ -#define BD_SC_LG ((ushort)0x0020) /* Frame length violation (HDLC) */ - -#define BD_SC_FR ((ushort)0x0010) /* Framing error */ -#define BD_SC_NO ((ushort)0x0010) /* Nonoctet aligned frame (HDLC) */ - -#define BD_SC_PR ((ushort)0x0008) /* Parity error */ -#define BD_SC_AB ((ushort)0x0008) /* Received abort Sequence (HDLC) */ - -#define BD_SC_OV ((ushort)0x0002) /* Overrun */ -#define BD_SC_CD ((ushort)0x0001) /* Carrier Detect lost */ - -/* tx bd status/control bits (as differ from rx bd) */ -#define BD_SC_READY ((ushort)0x8000) /* Transmit is ready */ -#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */ -#define BD_SC_P ((ushort)0x0100) /* xmt preamble */ -#define BD_SC_UN ((ushort)0x0002) /* Underrun */ - - - - -/* Parameter RAM offsets. */ - - - -/* In 2.4 ppc, the PROFF_S?C? are used as byte offsets into DPRAM. - * In 2.0, we use a more structured C struct map of DPRAM, and so - * instead, we need only a parameter ram `slot' */ - -#define PRSLOT_SCC1 0 -#define PRSLOT_SCC2 1 -#define PRSLOT_SCC3 2 -#define PRSLOT_SMC1 2 -#define PRSLOT_SCC4 3 -#define PRSLOT_SMC2 3 - - -/* #define PROFF_SCC1 ((uint)0x0000) */ -/* #define PROFF_SCC2 ((uint)0x0100) */ -/* #define PROFF_SCC3 ((uint)0x0200) */ -/* #define PROFF_SMC1 ((uint)0x0280) */ -/* #define PROFF_SCC4 ((uint)0x0300) */ -/* #define PROFF_SMC2 ((uint)0x0380) */ - - -/* Define enough so I can at least use the serial port as a UART. - * The MBX uses SMC1 as the host serial port. - */ -typedef struct smc_uart { - ushort smc_rbase; /* Rx Buffer descriptor base address */ - ushort smc_tbase; /* Tx Buffer descriptor base address */ - u_char smc_rfcr; /* Rx function code */ - u_char smc_tfcr; /* Tx function code */ - ushort smc_mrblr; /* Max receive buffer length */ - uint smc_rstate; /* Internal */ - uint smc_idp; /* Internal */ - ushort smc_rbptr; /* Internal */ - ushort smc_ibc; /* Internal */ - uint smc_rxtmp; /* Internal */ - uint smc_tstate; /* Internal */ - uint smc_tdp; /* Internal */ - ushort smc_tbptr; /* Internal */ - ushort smc_tbc; /* Internal */ - uint smc_txtmp; /* Internal */ - ushort smc_maxidl; /* Maximum idle characters */ - ushort smc_tmpidl; /* Temporary idle counter */ - ushort smc_brklen; /* Last received break length */ - ushort smc_brkec; /* rcv'd break condition counter */ - ushort smc_brkcr; /* xmt break count register */ - ushort smc_rmask; /* Temporary bit mask */ -} smc_uart_t; - -/* Function code bits. -*/ -#define SMC_EB ((u_char)0x10) /* Set big endian byte order */ - -/* SMC uart mode register. -*/ -#define SMCMR_REN ((ushort)0x0001) -#define SMCMR_TEN ((ushort)0x0002) -#define SMCMR_DM ((ushort)0x000c) -#define SMCMR_SM_GCI ((ushort)0x0000) -#define SMCMR_SM_UART ((ushort)0x0020) -#define SMCMR_SM_TRANS ((ushort)0x0030) -#define SMCMR_SM_MASK ((ushort)0x0030) -#define SMCMR_PM_EVEN ((ushort)0x0100) /* Even parity, else odd */ -#define SMCMR_REVD SMCMR_PM_EVEN -#define SMCMR_PEN ((ushort)0x0200) /* Parity enable */ -#define SMCMR_BS SMCMR_PEN -#define SMCMR_SL ((ushort)0x0400) /* Two stops, else one */ -#define SMCR_CLEN_MASK ((ushort)0x7800) /* Character length */ -#define smcr_mk_clen(C) (((C) << 11) & SMCR_CLEN_MASK) - -/* SMC2 as Centronics parallel printer. It is half duplex, in that - * it can only receive or transmit. The parameter ram values for - * each direction are either unique or properly overlap, so we can - * include them in one structure. - */ -typedef struct smc_centronics { - ushort scent_rbase; - ushort scent_tbase; - u_char scent_cfcr; - u_char scent_smask; - ushort scent_mrblr; - uint scent_rstate; - uint scent_r_ptr; - ushort scent_rbptr; - ushort scent_r_cnt; - uint scent_rtemp; - uint scent_tstate; - uint scent_t_ptr; - ushort scent_tbptr; - ushort scent_t_cnt; - uint scent_ttemp; - ushort scent_max_sl; - ushort scent_sl_cnt; - ushort scent_character1; - ushort scent_character2; - ushort scent_character3; - ushort scent_character4; - ushort scent_character5; - ushort scent_character6; - ushort scent_character7; - ushort scent_character8; - ushort scent_rccm; - ushort scent_rccr; -} smc_cent_t; - -/* Centronics Status Mask Register. -*/ -#define SMC_CENT_F ((u_char)0x08) -#define SMC_CENT_PE ((u_char)0x04) -#define SMC_CENT_S ((u_char)0x02) - -/* SMC Event and Mask register. -*/ -#define SMCM_BRKE ((unsigned char)0x40) /* When in UART Mode */ -#define SMCM_BRK ((unsigned char)0x10) /* When in UART Mode */ -#define SMCM_TXE ((unsigned char)0x10) /* When in Transparent Mode */ -#define SMCM_BSY ((unsigned char)0x04) -#define SMCM_TX ((unsigned char)0x02) -#define SMCM_RX ((unsigned char)0x01) - -/* Baud rate generators. -*/ -#define CPM_BRG_RST ((uint)0x00020000) -#define CPM_BRG_EN ((uint)0x00010000) -#define CPM_BRG_EXTC_INT ((uint)0x00000000) -#define CPM_BRG_EXTC_CLK2 ((uint)0x00004000) -#define CPM_BRG_EXTC_CLK6 ((uint)0x00008000) -#define CPM_BRG_ATB ((uint)0x00002000) -#define CPM_BRG_CD_MASK ((uint)0x00001ffe) -#define CPM_BRG_DIV16 ((uint)0x00000001) - -/* SCCs. -*/ -#define SCC_GSMRH_IRP ((uint)0x00040000) -#define SCC_GSMRH_GDE ((uint)0x00010000) -#define SCC_GSMRH_TCRC_CCITT ((uint)0x00008000) -#define SCC_GSMRH_TCRC_BISYNC ((uint)0x00004000) -#define SCC_GSMRH_TCRC_HDLC ((uint)0x00000000) -#define SCC_GSMRH_REVD ((uint)0x00002000) -#define SCC_GSMRH_TRX ((uint)0x00001000) -#define SCC_GSMRH_TTX ((uint)0x00000800) -#define SCC_GSMRH_CDP ((uint)0x00000400) -#define SCC_GSMRH_CTSP ((uint)0x00000200) -#define SCC_GSMRH_CDS ((uint)0x00000100) -#define SCC_GSMRH_CTSS ((uint)0x00000080) -#define SCC_GSMRH_TFL ((uint)0x00000040) -#define SCC_GSMRH_RFW ((uint)0x00000020) -#define SCC_GSMRH_TXSY ((uint)0x00000010) -#define SCC_GSMRH_SYNL16 ((uint)0x0000000c) -#define SCC_GSMRH_SYNL8 ((uint)0x00000008) -#define SCC_GSMRH_SYNL4 ((uint)0x00000004) -#define SCC_GSMRH_RTSM ((uint)0x00000002) -#define SCC_GSMRH_RSYN ((uint)0x00000001) - -#define SCC_GSMRL_SIR ((uint)0x80000000) /* SCC2 only */ -#define SCC_GSMRL_EDGE_NONE ((uint)0x60000000) -#define SCC_GSMRL_EDGE_NEG ((uint)0x40000000) -#define SCC_GSMRL_EDGE_POS ((uint)0x20000000) -#define SCC_GSMRL_EDGE_BOTH ((uint)0x00000000) -#define SCC_GSMRL_TCI ((uint)0x10000000) -#define SCC_GSMRL_TSNC_3 ((uint)0x0c000000) -#define SCC_GSMRL_TSNC_4 ((uint)0x08000000) -#define SCC_GSMRL_TSNC_14 ((uint)0x04000000) -#define SCC_GSMRL_TSNC_INF ((uint)0x00000000) -#define SCC_GSMRL_RINV ((uint)0x02000000) -#define SCC_GSMRL_TINV ((uint)0x01000000) -#define SCC_GSMRL_TPL_128 ((uint)0x00c00000) -#define SCC_GSMRL_TPL_64 ((uint)0x00a00000) -#define SCC_GSMRL_TPL_48 ((uint)0x00800000) -#define SCC_GSMRL_TPL_32 ((uint)0x00600000) -#define SCC_GSMRL_TPL_16 ((uint)0x00400000) -#define SCC_GSMRL_TPL_8 ((uint)0x00200000) -#define SCC_GSMRL_TPL_NONE ((uint)0x00000000) -#define SCC_GSMRL_TPP_ALL1 ((uint)0x00180000) -#define SCC_GSMRL_TPP_01 ((uint)0x00100000) -#define SCC_GSMRL_TPP_10 ((uint)0x00080000) -#define SCC_GSMRL_TPP_ZEROS ((uint)0x00000000) -#define SCC_GSMRL_TEND ((uint)0x00040000) -#define SCC_GSMRL_TDCR_32 ((uint)0x00030000) -#define SCC_GSMRL_TDCR_16 ((uint)0x00020000) -#define SCC_GSMRL_TDCR_8 ((uint)0x00010000) -#define SCC_GSMRL_TDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RDCR_32 ((uint)0x0000c000) -#define SCC_GSMRL_RDCR_16 ((uint)0x00008000) -#define SCC_GSMRL_RDCR_8 ((uint)0x00004000) -#define SCC_GSMRL_RDCR_1 ((uint)0x00000000) -#define SCC_GSMRL_RENC_DFMAN ((uint)0x00003000) -#define SCC_GSMRL_RENC_MANCH ((uint)0x00002000) -#define SCC_GSMRL_RENC_FM0 ((uint)0x00001000) -#define SCC_GSMRL_RENC_NRZI ((uint)0x00000800) -#define SCC_GSMRL_RENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_TENC_DFMAN ((uint)0x00000600) -#define SCC_GSMRL_TENC_MANCH ((uint)0x00000400) -#define SCC_GSMRL_TENC_FM0 ((uint)0x00000200) -#define SCC_GSMRL_TENC_NRZI ((uint)0x00000100) -#define SCC_GSMRL_TENC_NRZ ((uint)0x00000000) -#define SCC_GSMRL_DIAG_LE ((uint)0x000000c0) /* Loop and echo */ -#define SCC_GSMRL_DIAG_ECHO ((uint)0x00000080) -#define SCC_GSMRL_DIAG_LOOP ((uint)0x00000040) -#define SCC_GSMRL_DIAG_NORM ((uint)0x00000000) -#define SCC_GSMRL_ENR ((uint)0x00000020) -#define SCC_GSMRL_ENT ((uint)0x00000010) -#define SCC_GSMRL_MODE_ENET ((uint)0x0000000c) -#define SCC_GSMRL_MODE_DDCMP ((uint)0x00000009) -#define SCC_GSMRL_MODE_BISYNC ((uint)0x00000008) -#define SCC_GSMRL_MODE_V14 ((uint)0x00000007) -#define SCC_GSMRL_MODE_AHDLC ((uint)0x00000006) -#define SCC_GSMRL_MODE_PROFIBUS ((uint)0x00000005) -#define SCC_GSMRL_MODE_UART ((uint)0x00000004) -#define SCC_GSMRL_MODE_SS7 ((uint)0x00000003) -#define SCC_GSMRL_MODE_ATALK ((uint)0x00000002) -#define SCC_GSMRL_MODE_HDLC ((uint)0x00000000) - -#define SCC_TODR_TOD ((ushort)0x8000) - -/* SCC Event and Mask register. -*/ -#define SCCM_TXE ((unsigned char)0x10) -#define SCCM_BSY ((unsigned char)0x04) -#define SCCM_TX ((unsigned char)0x02) -#define SCCM_RX ((unsigned char)0x01) - -typedef struct scc_param { - ushort scc_rbase; /* Rx Buffer descriptor base address */ - ushort scc_tbase; /* Tx Buffer descriptor base address */ - u_char scc_rfcr; /* Rx function code */ - u_char scc_tfcr; /* Tx function code */ - ushort scc_mrblr; /* Max receive buffer length */ - uint scc_rstate; /* Internal */ - uint scc_idp; /* Internal */ - ushort scc_rbptr; /* Internal */ - ushort scc_ibc; /* Internal */ - uint scc_rxtmp; /* Internal */ - uint scc_tstate; /* Internal */ - uint scc_tdp; /* Internal */ - ushort scc_tbptr; /* Internal */ - ushort scc_tbc; /* Internal */ - uint scc_txtmp; /* Internal */ - uint scc_rcrc; /* Internal */ - uint scc_tcrc; /* Internal */ -} sccp_t; - - -/* Function code bits. - */ -#define SCC_EB ((u_char)0x10) /* Set big endian byte order */ -#define SCC_FC_DMA ((u_char)0x08) /* Set SDMA */ - -/* CPM Ethernet through SCC1. - */ -typedef struct scc_enet { - sccp_t sen_genscc; - uint sen_cpres; /* Preset CRC */ - uint sen_cmask; /* Constant mask for CRC */ - uint sen_crcec; /* CRC Error counter */ - uint sen_alec; /* alignment error counter */ - uint sen_disfc; /* discard frame counter */ - ushort sen_pads; /* Tx short frame pad character */ - ushort sen_retlim; /* Retry limit threshold */ - ushort sen_retcnt; /* Retry limit counter */ - ushort sen_maxflr; /* maximum frame length register */ - ushort sen_minflr; /* minimum frame length register */ - ushort sen_maxd1; /* maximum DMA1 length */ - ushort sen_maxd2; /* maximum DMA2 length */ - ushort sen_maxd; /* Rx max DMA */ - ushort sen_dmacnt; /* Rx DMA counter */ - ushort sen_maxb; /* Max BD byte count */ - ushort sen_gaddr1; /* Group address filter */ - ushort sen_gaddr2; - ushort sen_gaddr3; - ushort sen_gaddr4; - uint sen_tbuf0data0; /* Save area 0 - current frame */ - uint sen_tbuf0data1; /* Save area 1 - current frame */ - uint sen_tbuf0rba; /* Internal */ - uint sen_tbuf0crc; /* Internal */ - ushort sen_tbuf0bcnt; /* Internal */ - ushort sen_paddrh; /* physical address (MSB) */ - ushort sen_paddrm; - ushort sen_paddrl; /* physical address (LSB) */ - ushort sen_pper; /* persistence */ - ushort sen_rfbdptr; /* Rx first BD pointer */ - ushort sen_tfbdptr; /* Tx first BD pointer */ - ushort sen_tlbdptr; /* Tx last BD pointer */ - uint sen_tbuf1data0; /* Save area 0 - current frame */ - uint sen_tbuf1data1; /* Save area 1 - current frame */ - uint sen_tbuf1rba; /* Internal */ - uint sen_tbuf1crc; /* Internal */ - ushort sen_tbuf1bcnt; /* Internal */ - ushort sen_txlen; /* Tx Frame length counter */ - ushort sen_iaddr1; /* Individual address filter */ - ushort sen_iaddr2; - ushort sen_iaddr3; - ushort sen_iaddr4; - ushort sen_boffcnt; /* Backoff counter */ - - /* NOTE: Some versions of the manual have the following items - * incorrectly documented. Below is the proper order. - */ - ushort sen_taddrh; /* temp address (MSB) */ - ushort sen_taddrm; - ushort sen_taddrl; /* temp address (LSB) */ -} scc_enet_t; - - - -#if defined (CONFIG_UCQUICC) -/* uCquicc has the following signals connected to Ethernet: - * 68360 - lxt905 - * PA0/RXD1 - rxd - * PA1/TXD1 - txd - * PA8/CLK1 - tclk - * PA9/CLK2 - rclk - * PC0/!RTS1 - t_en - * PC1/!CTS1 - col - * PC5/!CD1 - cd - */ -#define PA_ENET_RXD PA_RXD1 -#define PA_ENET_TXD PA_TXD1 -#define PA_ENET_TCLK PA_CLK1 -#define PA_ENET_RCLK PA_CLK2 -#define PC_ENET_TENA PC_RTS1 -#define PC_ENET_CLSN PC_CTS1 -#define PC_ENET_RENA PC_CD1 - -/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to - * SCC1. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000002c) - -#endif /* config_ucquicc */ - - -#ifdef MBX -/* Bits in parallel I/O port registers that have to be set/cleared - * to configure the pins for SCC1 use. The TCLK and RCLK seem unique - * to the MBX860 board. Any two of the four available clocks could be - * used, and the MPC860 cookbook manual has an example using different - * clock pins. - */ -#define PA_ENET_RXD ((ushort)0x0001) -#define PA_ENET_TXD ((ushort)0x0002) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PC_ENET_TENA ((ushort)0x0001) -#define PC_ENET_CLSN ((ushort)0x0010) -#define PC_ENET_RENA ((ushort)0x0020) - -/* Control bits in the SICR to route TCLK (CLK2) and RCLK (CLK4) to - * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero. - */ -#define SICR_ENET_MASK ((uint)0x000000ff) -#define SICR_ENET_CLKRT ((uint)0x0000003d) -#endif - -#ifdef CONFIG_RPXLITE -/* This ENET stuff is for the MPC850 with ethernet on SCC2. Some of - * this may be unique to the RPX-Lite configuration. - * Note TENA is on Port B. - */ -#define PA_ENET_RXD ((ushort)0x0004) -#define PA_ENET_TXD ((ushort)0x0008) -#define PA_ENET_TCLK ((ushort)0x0200) -#define PA_ENET_RCLK ((ushort)0x0800) -#define PB_ENET_TENA ((uint)0x00002000) -#define PC_ENET_CLSN ((ushort)0x0040) -#define PC_ENET_RENA ((ushort)0x0080) - -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00003d00) -#endif - -#ifdef CONFIG_BSEIP -/* This ENET stuff is for the MPC823 with ethernet on SCC2. - * This is unique to the BSE ip-Engine board. - */ -#define PA_ENET_RXD ((ushort)0x0004) -#define PA_ENET_TXD ((ushort)0x0008) -#define PA_ENET_TCLK ((ushort)0x0100) -#define PA_ENET_RCLK ((ushort)0x0200) -#define PB_ENET_TENA ((uint)0x00002000) -#define PC_ENET_CLSN ((ushort)0x0040) -#define PC_ENET_RENA ((ushort)0x0080) - -/* BSE uses port B and C bits for PHY control also. -*/ -#define PB_BSE_POWERUP ((uint)0x00000004) -#define PB_BSE_FDXDIS ((uint)0x00008000) -#define PC_BSE_LOOPBACK ((ushort)0x0800) - -#define SICR_ENET_MASK ((uint)0x0000ff00) -#define SICR_ENET_CLKRT ((uint)0x00002c00) -#endif - -/* SCC Event register as used by Ethernet. -*/ -#define SCCE_ENET_GRA ((ushort)0x0080) /* Graceful stop complete */ -#define SCCE_ENET_TXE ((ushort)0x0010) /* Transmit Error */ -#define SCCE_ENET_RXF ((ushort)0x0008) /* Full frame received */ -#define SCCE_ENET_BSY ((ushort)0x0004) /* All incoming buffers full */ -#define SCCE_ENET_TXB ((ushort)0x0002) /* A buffer was transmitted */ -#define SCCE_ENET_RXB ((ushort)0x0001) /* A buffer was received */ - -/* SCC Mode Register (PMSR) as used by Ethernet. -*/ -#define SCC_PMSR_HBC ((ushort)0x8000) /* Enable heartbeat */ -#define SCC_PMSR_FC ((ushort)0x4000) /* Force collision */ -#define SCC_PMSR_RSH ((ushort)0x2000) /* Receive short frames */ -#define SCC_PMSR_IAM ((ushort)0x1000) /* Check individual hash */ -#define SCC_PMSR_ENCRC ((ushort)0x0800) /* Ethernet CRC mode */ -#define SCC_PMSR_PRO ((ushort)0x0200) /* Promiscuous mode */ -#define SCC_PMSR_BRO ((ushort)0x0100) /* Catch broadcast pkts */ -#define SCC_PMSR_SBT ((ushort)0x0080) /* Special backoff timer */ -#define SCC_PMSR_LPB ((ushort)0x0040) /* Set Loopback mode */ -#define SCC_PMSR_SIP ((ushort)0x0020) /* Sample Input Pins */ -#define SCC_PMSR_LCW ((ushort)0x0010) /* Late collision window */ -#define SCC_PMSR_NIB22 ((ushort)0x000a) /* Start frame search */ -#define SCC_PMSR_FDE ((ushort)0x0001) /* Full duplex enable */ - -/* Buffer descriptor control/status used by Ethernet receive. -*/ -#define BD_ENET_RX_EMPTY ((ushort)0x8000) -#define BD_ENET_RX_WRAP ((ushort)0x2000) -#define BD_ENET_RX_INTR ((ushort)0x1000) -#define BD_ENET_RX_LAST ((ushort)0x0800) -#define BD_ENET_RX_FIRST ((ushort)0x0400) -#define BD_ENET_RX_MISS ((ushort)0x0100) -#define BD_ENET_RX_LG ((ushort)0x0020) -#define BD_ENET_RX_NO ((ushort)0x0010) -#define BD_ENET_RX_SH ((ushort)0x0008) -#define BD_ENET_RX_CR ((ushort)0x0004) -#define BD_ENET_RX_OV ((ushort)0x0002) -#define BD_ENET_RX_CL ((ushort)0x0001) -#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */ - -/* Buffer descriptor control/status used by Ethernet transmit. -*/ -#define BD_ENET_TX_READY ((ushort)0x8000) -#define BD_ENET_TX_PAD ((ushort)0x4000) -#define BD_ENET_TX_WRAP ((ushort)0x2000) -#define BD_ENET_TX_INTR ((ushort)0x1000) -#define BD_ENET_TX_LAST ((ushort)0x0800) -#define BD_ENET_TX_TC ((ushort)0x0400) -#define BD_ENET_TX_DEF ((ushort)0x0200) -#define BD_ENET_TX_HB ((ushort)0x0100) -#define BD_ENET_TX_LC ((ushort)0x0080) -#define BD_ENET_TX_RL ((ushort)0x0040) -#define BD_ENET_TX_RCMASK ((ushort)0x003c) -#define BD_ENET_TX_UN ((ushort)0x0002) -#define BD_ENET_TX_CSL ((ushort)0x0001) -#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */ - -/* SCC as UART -*/ -typedef struct scc_uart { - sccp_t scc_genscc; - uint scc_res1; /* Reserved */ - uint scc_res2; /* Reserved */ - ushort scc_maxidl; /* Maximum idle chars */ - ushort scc_idlc; /* temp idle counter */ - ushort scc_brkcr; /* Break count register */ - ushort scc_parec; /* receive parity error counter */ - ushort scc_frmec; /* receive framing error counter */ - ushort scc_nosec; /* receive noise counter */ - ushort scc_brkec; /* receive break condition counter */ - ushort scc_brkln; /* last received break length */ - ushort scc_uaddr1; /* UART address character 1 */ - ushort scc_uaddr2; /* UART address character 2 */ - ushort scc_rtemp; /* Temp storage */ - ushort scc_toseq; /* Transmit out of sequence char */ - ushort scc_char1; /* control character 1 */ - ushort scc_char2; /* control character 2 */ - ushort scc_char3; /* control character 3 */ - ushort scc_char4; /* control character 4 */ - ushort scc_char5; /* control character 5 */ - ushort scc_char6; /* control character 6 */ - ushort scc_char7; /* control character 7 */ - ushort scc_char8; /* control character 8 */ - ushort scc_rccm; /* receive control character mask */ - ushort scc_rccr; /* receive control character register */ - ushort scc_rlbc; /* receive last break character */ -} scc_uart_t; - -/* SCC Event and Mask registers when it is used as a UART. -*/ -#define UART_SCCM_GLR ((ushort)0x1000) -#define UART_SCCM_GLT ((ushort)0x0800) -#define UART_SCCM_AB ((ushort)0x0200) -#define UART_SCCM_IDL ((ushort)0x0100) -#define UART_SCCM_GRA ((ushort)0x0080) -#define UART_SCCM_BRKE ((ushort)0x0040) -#define UART_SCCM_BRKS ((ushort)0x0020) -#define UART_SCCM_CCR ((ushort)0x0008) -#define UART_SCCM_BSY ((ushort)0x0004) -#define UART_SCCM_TX ((ushort)0x0002) -#define UART_SCCM_RX ((ushort)0x0001) - -/* The SCC PMSR when used as a UART. -*/ -#define SCU_PMSR_FLC ((ushort)0x8000) -#define SCU_PMSR_SL ((ushort)0x4000) -#define SCU_PMSR_CL ((ushort)0x3000) -#define SCU_PMSR_UM ((ushort)0x0c00) -#define SCU_PMSR_FRZ ((ushort)0x0200) -#define SCU_PMSR_RZS ((ushort)0x0100) -#define SCU_PMSR_SYN ((ushort)0x0080) -#define SCU_PMSR_DRT ((ushort)0x0040) -#define SCU_PMSR_PEN ((ushort)0x0010) -#define SCU_PMSR_RPM ((ushort)0x000c) -#define SCU_PMSR_REVP ((ushort)0x0008) -#define SCU_PMSR_TPM ((ushort)0x0003) -#define SCU_PMSR_TEVP ((ushort)0x0003) - -/* CPM Transparent mode SCC. - */ -typedef struct scc_trans { - sccp_t st_genscc; - uint st_cpres; /* Preset CRC */ - uint st_cmask; /* Constant mask for CRC */ -} scc_trans_t; - -#define BD_SCC_TX_LAST ((ushort)0x0800) - - - -/* CPM interrupts. There are nearly 32 interrupts generated by CPM - * channels or devices. All of these are presented to the PPC core - * as a single interrupt. The CPM interrupt handler dispatches its - * own handlers, in a similar fashion to the PPC core handler. We - * use the table as defined in the manuals (i.e. no special high - * priority and SCC1 == SCCa, etc...). - */ -/* #define CPMVEC_NR 32 */ -/* #define CPMVEC_PIO_PC15 ((ushort)0x1f) */ -/* #define CPMVEC_SCC1 ((ushort)0x1e) */ -/* #define CPMVEC_SCC2 ((ushort)0x1d) */ -/* #define CPMVEC_SCC3 ((ushort)0x1c) */ -/* #define CPMVEC_SCC4 ((ushort)0x1b) */ -/* #define CPMVEC_PIO_PC14 ((ushort)0x1a) */ -/* #define CPMVEC_TIMER1 ((ushort)0x19) */ -/* #define CPMVEC_PIO_PC13 ((ushort)0x18) */ -/* #define CPMVEC_PIO_PC12 ((ushort)0x17) */ -/* #define CPMVEC_SDMA_CB_ERR ((ushort)0x16) */ -/* #define CPMVEC_IDMA1 ((ushort)0x15) */ -/* #define CPMVEC_IDMA2 ((ushort)0x14) */ -/* #define CPMVEC_TIMER2 ((ushort)0x12) */ -/* #define CPMVEC_RISCTIMER ((ushort)0x11) */ -/* #define CPMVEC_I2C ((ushort)0x10) */ -/* #define CPMVEC_PIO_PC11 ((ushort)0x0f) */ -/* #define CPMVEC_PIO_PC10 ((ushort)0x0e) */ -/* #define CPMVEC_TIMER3 ((ushort)0x0c) */ -/* #define CPMVEC_PIO_PC9 ((ushort)0x0b) */ -/* #define CPMVEC_PIO_PC8 ((ushort)0x0a) */ -/* #define CPMVEC_PIO_PC7 ((ushort)0x09) */ -/* #define CPMVEC_TIMER4 ((ushort)0x07) */ -/* #define CPMVEC_PIO_PC6 ((ushort)0x06) */ -/* #define CPMVEC_SPI ((ushort)0x05) */ -/* #define CPMVEC_SMC1 ((ushort)0x04) */ -/* #define CPMVEC_SMC2 ((ushort)0x03) */ -/* #define CPMVEC_PIO_PC5 ((ushort)0x02) */ -/* #define CPMVEC_PIO_PC4 ((ushort)0x01) */ -/* #define CPMVEC_ERROR ((ushort)0x00) */ - -extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id); - -/* CPM interrupt configuration vector. -*/ -#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */ -#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ -#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ -#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ -#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */ -#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ -#define CICR_IEN ((uint)0x00000080) /* Int. enable */ -#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ -#endif /* __CPM_360__ */ diff --git a/include/asm-m68knommu/cputime.h b/include/asm-m68knommu/cputime.h deleted file mode 100644 index a0c4a66..0000000 --- a/include/asm-m68knommu/cputime.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __M68KNOMMU_CPUTIME_H -#define __M68KNOMMU_CPUTIME_H - -#include - -#endif /* __M68KNOMMU_CPUTIME_H */ diff --git a/include/asm-m68knommu/current.h b/include/asm-m68knommu/current.h deleted file mode 100644 index 53ee0f9..0000000 --- a/include/asm-m68knommu/current.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef _M68KNOMMU_CURRENT_H -#define _M68KNOMMU_CURRENT_H -/* - * current.h - * (C) Copyright 2000, Lineo, David McCullough - * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) - * - * rather than dedicate a register (as the m68k source does), we - * just keep a global, we should probably just change it all to be - * current and lose _current_task. - */ - -#include - -struct task_struct; - -static inline struct task_struct *get_current(void) -{ - return(current_thread_info()->task); -} - -#define current get_current() - -#endif /* _M68KNOMMU_CURRENT_H */ diff --git a/include/asm-m68knommu/dbg.h b/include/asm-m68knommu/dbg.h deleted file mode 100644 index 27af327..0000000 --- a/include/asm-m68knommu/dbg.h +++ /dev/null @@ -1,6 +0,0 @@ -#define DEBUG 1 -#ifdef CONFIG_COLDFIRE -#define BREAK asm volatile ("halt") -#else -#define BREAK *(volatile unsigned char *)0xdeadbee0 = 0 -#endif diff --git a/include/asm-m68knommu/delay.h b/include/asm-m68knommu/delay.h deleted file mode 100644 index 55cbd62..0000000 --- a/include/asm-m68knommu/delay.h +++ /dev/null @@ -1,76 +0,0 @@ -#ifndef _M68KNOMMU_DELAY_H -#define _M68KNOMMU_DELAY_H - -/* - * Copyright (C) 1994 Hamish Macdonald - * Copyright (C) 2004 Greg Ungerer - */ - -#include - -static inline void __delay(unsigned long loops) -{ -#if defined(CONFIG_COLDFIRE) - /* The coldfire runs this loop at significantly different speeds - * depending upon long word alignment or not. We'll pad it to - * long word alignment which is the faster version. - * The 0x4a8e is of course a 'tstl %fp' instruction. This is better - * than using a NOP (0x4e71) instruction because it executes in one - * cycle not three and doesn't allow for an arbitary delay waiting - * for bus cycles to finish. Also fp/a6 isn't likely to cause a - * stall waiting for the register to become valid if such is added - * to the coldfire at some stage. - */ - __asm__ __volatile__ ( ".balignw 4, 0x4a8e\n\t" - "1: subql #1, %0\n\t" - "jcc 1b" - : "=d" (loops) : "0" (loops)); -#else - __asm__ __volatile__ ( "1: subql #1, %0\n\t" - "jcc 1b" - : "=d" (loops) : "0" (loops)); -#endif -} - -/* - * Ideally we use a 32*32->64 multiply to calculate the number of - * loop iterations, but the older standard 68k and ColdFire do not - * have this instruction. So for them we have a clsoe approximation - * loop using 32*32->32 multiplies only. This calculation based on - * the ARM version of delay. - * - * We want to implement: - * - * loops = (usecs * 0x10c6 * HZ * loops_per_jiffy) / 2^32 - */ - -#define HZSCALE (268435456 / (1000000/HZ)) - -extern unsigned long loops_per_jiffy; - -static inline void _udelay(unsigned long usecs) -{ -#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \ - defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \ - defined(CONFIG_COLDFIRE) - __delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6); -#else - unsigned long tmp; - - usecs *= 4295; /* 2**32 / 1000000 */ - __asm__ ("mulul %2,%0:%1" - : "=d" (usecs), "=d" (tmp) - : "d" (usecs), "1" (loops_per_jiffy*HZ)); - __delay(usecs); -#endif -} - -/* - * Moved the udelay() function into library code, no longer inlined. - * I had to change the algorithm because we are overflowing now on - * the faster ColdFire parts. The code is a little bigger, so it makes - * sense to library it. - */ -extern void udelay(unsigned long usecs); - -#endif /* defined(_M68KNOMMU_DELAY_H) */ diff --git a/include/asm-m68knommu/device.h b/include/asm-m68knommu/device.h deleted file mode 100644 index d8f9872..0000000 --- a/include/asm-m68knommu/device.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * Arch specific extensions to struct device - * - * This file is released under the GPLv2 - */ -#include - diff --git a/include/asm-m68knommu/div64.h b/include/asm-m68knommu/div64.h deleted file mode 100644 index 6cd978c..0000000 --- a/include/asm-m68knommu/div64.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/dma-mapping.h b/include/asm-m68knommu/dma-mapping.h deleted file mode 100644 index 6aeab18..0000000 --- a/include/asm-m68knommu/dma-mapping.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _M68KNOMMU_DMA_MAPPING_H -#define _M68KNOMMU_DMA_MAPPING_H - -#ifdef CONFIG_PCI -#include -#else -#include -#endif - -#endif /* _M68KNOMMU_DMA_MAPPING_H */ diff --git a/include/asm-m68knommu/dma.h b/include/asm-m68knommu/dma.h deleted file mode 100644 index 939a020..0000000 --- a/include/asm-m68knommu/dma.h +++ /dev/null @@ -1,494 +0,0 @@ -#ifndef _M68K_DMA_H -#define _M68K_DMA_H 1 - -//#define DMA_DEBUG 1 - - -#ifdef CONFIG_COLDFIRE -/* - * ColdFire DMA Model: - * ColdFire DMA supports two forms of DMA: Single and Dual address. Single - * address mode emits a source address, and expects that the device will either - * pick up the data (DMA READ) or source data (DMA WRITE). This implies that - * the device will place data on the correct byte(s) of the data bus, as the - * memory transactions are always 32 bits. This implies that only 32 bit - * devices will find single mode transfers useful. Dual address DMA mode - * performs two cycles: source read and destination write. ColdFire will - * align the data so that the device will always get the correct bytes, thus - * is useful for 8 and 16 bit devices. This is the mode that is supported - * below. - * - * AUG/22/2000 : added support for 32-bit Dual-Address-Mode (K) 2000 - * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) - * - * AUG/25/2000 : addad support for 8, 16 and 32-bit Single-Address-Mode (K)2000 - * Oliver Kamphenkel (O.Kamphenkel@tu-bs.de) - * - * APR/18/2002 : added proper support for MCF5272 DMA controller. - * Arthur Shipkowski (art@videon-central.com) - */ - -#include -#include -#include - -/* - * Set number of channels of DMA on ColdFire for different implementations. - */ -#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \ - defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) -#define MAX_M68K_DMA_CHANNELS 4 -#elif defined(CONFIG_M5272) -#define MAX_M68K_DMA_CHANNELS 1 -#elif defined(CONFIG_M532x) -#define MAX_M68K_DMA_CHANNELS 0 -#else -#define MAX_M68K_DMA_CHANNELS 2 -#endif - -extern unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS]; -extern unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; - -#if !defined(CONFIG_M5272) -#define DMA_MODE_WRITE_BIT 0x01 /* Memory/IO to IO/Memory select */ -#define DMA_MODE_WORD_BIT 0x02 /* 8 or 16 bit transfers */ -#define DMA_MODE_LONG_BIT 0x04 /* or 32 bit transfers */ -#define DMA_MODE_SINGLE_BIT 0x08 /* single-address-mode */ - -/* I/O to memory, 8 bits, mode */ -#define DMA_MODE_READ 0 -/* memory to I/O, 8 bits, mode */ -#define DMA_MODE_WRITE 1 -/* I/O to memory, 16 bits, mode */ -#define DMA_MODE_READ_WORD 2 -/* memory to I/O, 16 bits, mode */ -#define DMA_MODE_WRITE_WORD 3 -/* I/O to memory, 32 bits, mode */ -#define DMA_MODE_READ_LONG 4 -/* memory to I/O, 32 bits, mode */ -#define DMA_MODE_WRITE_LONG 5 -/* I/O to memory, 8 bits, single-address-mode */ -#define DMA_MODE_READ_SINGLE 8 -/* memory to I/O, 8 bits, single-address-mode */ -#define DMA_MODE_WRITE_SINGLE 9 -/* I/O to memory, 16 bits, single-address-mode */ -#define DMA_MODE_READ_WORD_SINGLE 10 -/* memory to I/O, 16 bits, single-address-mode */ -#define DMA_MODE_WRITE_WORD_SINGLE 11 -/* I/O to memory, 32 bits, single-address-mode */ -#define DMA_MODE_READ_LONG_SINGLE 12 -/* memory to I/O, 32 bits, single-address-mode */ -#define DMA_MODE_WRITE_LONG_SINGLE 13 - -#else /* CONFIG_M5272 is defined */ - -/* Source static-address mode */ -#define DMA_MODE_SRC_SA_BIT 0x01 -/* Two bits to select between all four modes */ -#define DMA_MODE_SSIZE_MASK 0x06 -/* Offset to shift bits in */ -#define DMA_MODE_SSIZE_OFF 0x01 -/* Destination static-address mode */ -#define DMA_MODE_DES_SA_BIT 0x10 -/* Two bits to select between all four modes */ -#define DMA_MODE_DSIZE_MASK 0x60 -/* Offset to shift bits in */ -#define DMA_MODE_DSIZE_OFF 0x05 -/* Size modifiers */ -#define DMA_MODE_SIZE_LONG 0x00 -#define DMA_MODE_SIZE_BYTE 0x01 -#define DMA_MODE_SIZE_WORD 0x02 -#define DMA_MODE_SIZE_LINE 0x03 - -/* - * Aliases to help speed quick ports; these may be suboptimal, however. They - * do not include the SINGLE mode modifiers since the MCF5272 does not have a - * mode where the device is in control of its addressing. - */ - -/* I/O to memory, 8 bits, mode */ -#define DMA_MODE_READ ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 8 bits, mode */ -#define DMA_MODE_WRITE ((DMA_MODE_SIZE_BYTE << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_BYTE << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) -/* I/O to memory, 16 bits, mode */ -#define DMA_MODE_READ_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 16 bits, mode */ -#define DMA_MODE_WRITE_WORD ((DMA_MODE_SIZE_WORD << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_WORD << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) -/* I/O to memory, 32 bits, mode */ -#define DMA_MODE_READ_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_SRC_SA_BIT) -/* memory to I/O, 32 bits, mode */ -#define DMA_MODE_WRITE_LONG ((DMA_MODE_SIZE_LONG << DMA_MODE_DSIZE_OFF) | (DMA_MODE_SIZE_LONG << DMA_MODE_SSIZE_OFF) | DMA_DES_SA_BIT) - -#endif /* !defined(CONFIG_M5272) */ - -#if !defined(CONFIG_M5272) -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("enable_dma(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmawp[MCFDMA_DCR] |= MCFDMA_DCR_EEXT; -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - volatile unsigned char *dmapb; - -#ifdef DMA_DEBUG - printk("disable_dma(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmapb = (unsigned char *) dma_base_addr[dmanr]; - - /* Turn off external requests, and stop any DMA in progress */ - dmawp[MCFDMA_DCR] &= ~MCFDMA_DCR_EEXT; - dmapb[MCFDMA_DSR] = MCFDMA_DSR_DONE; -} - -/* - * Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - * - * This is a NOP for ColdFire. Provide a stub for compatibility. - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - - volatile unsigned char *dmabp; - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode); -#endif - - dmabp = (unsigned char *) dma_base_addr[dmanr]; - dmawp = (unsigned short *) dma_base_addr[dmanr]; - - // Clear config errors - dmabp[MCFDMA_DSR] = MCFDMA_DSR_DONE; - - // Set command register - dmawp[MCFDMA_DCR] = - MCFDMA_DCR_INT | // Enable completion irq - MCFDMA_DCR_CS | // Force one xfer per request - MCFDMA_DCR_AA | // Enable auto alignment - // single-address-mode - ((mode & DMA_MODE_SINGLE_BIT) ? MCFDMA_DCR_SAA : 0) | - // sets s_rw (-> r/w) high if Memory to I/0 - ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_S_RW : 0) | - // Memory to I/O or I/O to Memory - ((mode & DMA_MODE_WRITE_BIT) ? MCFDMA_DCR_SINC : MCFDMA_DCR_DINC) | - // 32 bit, 16 bit or 8 bit transfers - ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_SSIZE_WORD : - ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_SSIZE_LONG : - MCFDMA_DCR_SSIZE_BYTE)) | - ((mode & DMA_MODE_WORD_BIT) ? MCFDMA_DCR_DSIZE_WORD : - ((mode & DMA_MODE_LONG_BIT) ? MCFDMA_DCR_DSIZE_LONG : - MCFDMA_DCR_DSIZE_BYTE)); - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DSR[%x]=%x DCR[%x]=%x\n", __FILE__, __LINE__, - dmanr, (int) &dmabp[MCFDMA_DSR], dmabp[MCFDMA_DSR], - (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR]); -#endif -} - -/* Set transfer address for specific DMA channel */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - volatile unsigned short *dmawp; - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - // Determine which address registers are used for memory/device accesses - if (dmawp[MCFDMA_DCR] & MCFDMA_DCR_SINC) { - // Source incrementing, must be memory - dmalp[MCFDMA_SAR] = a; - // Set dest address, must be device - dmalp[MCFDMA_DAR] = dma_device_address[dmanr]; - } else { - // Destination incrementing, must be memory - dmalp[MCFDMA_DAR] = a; - // Set source address, must be device - dmalp[MCFDMA_SAR] = dma_device_address[dmanr]; - } - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DCR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n", - __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DCR], dmawp[MCFDMA_DCR], - (int) &dmalp[MCFDMA_SAR], dmalp[MCFDMA_SAR], - (int) &dmalp[MCFDMA_DAR], dmalp[MCFDMA_DAR]); -#endif -} - -/* - * Specific for Coldfire - sets device address. - * Should be called after the mode set call, and before set DMA address. - */ -static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a) -{ -#ifdef DMA_DEBUG - printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dma_device_address[dmanr] = a; -} - -/* - * NOTE 2: "count" represents _bytes_. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - dmawp[MCFDMA_BCR] = (unsigned short)count; -} - -/* - * Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * Otherwise, it returns the number of _bytes_ left to transfer. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - volatile unsigned short *dmawp; - unsigned short count; - -#ifdef DMA_DEBUG - printk("get_dma_residue(dmanr=%d)\n", dmanr); -#endif - - dmawp = (unsigned short *) dma_base_addr[dmanr]; - count = dmawp[MCFDMA_BCR]; - return((int) count); -} -#else /* CONFIG_M5272 is defined */ - -/* - * The MCF5272 DMA controller is very different than the controller defined above - * in terms of register mapping. For instance, with the exception of the 16-bit - * interrupt register (IRQ#85, for reference), all of the registers are 32-bit. - * - * The big difference, however, is the lack of device-requested DMA. All modes - * are dual address transfer, and there is no 'device' setup or direction bit. - * You can DMA between a device and memory, between memory and memory, or even between - * two devices directly, with any combination of incrementing and non-incrementing - * addresses you choose. This puts a crimp in distinguishing between the 'device - * address' set up by set_dma_device_addr. - * - * Therefore, there are two options. One is to use set_dma_addr and set_dma_device_addr, - * which will act exactly as above in -- it will look to see if the source is set to - * autoincrement, and if so it will make the source use the set_dma_addr value and the - * destination the set_dma_device_addr value. Otherwise the source will be set to the - * set_dma_device_addr value and the destination will get the set_dma_addr value. - * - * The other is to use the provided set_dma_src_addr and set_dma_dest_addr functions - * and make it explicit. Depending on what you're doing, one of these two should work - * for you, but don't mix them in the same transfer setup. - */ - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("enable_dma(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_EN; -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("disable_dma(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - /* Turn off external requests, and stop any DMA in progress */ - dmalp[MCFDMA_DMR] &= ~MCFDMA_DMR_EN; - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET; -} - -/* - * Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while interrupts are disabled! --- - * - * This is a NOP for ColdFire. Provide a stub for compatibility. - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - - volatile unsigned int *dmalp; - volatile unsigned short *dmawp; - -#ifdef DMA_DEBUG - printk("set_dma_mode(dmanr=%d,mode=%d)\n", dmanr, mode); -#endif - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmawp = (unsigned short *) dma_base_addr[dmanr]; - - // Clear config errors - dmalp[MCFDMA_DMR] |= MCFDMA_DMR_RESET; - - // Set command register - dmalp[MCFDMA_DMR] = - MCFDMA_DMR_RQM_DUAL | // Mandatory Request Mode setting - MCFDMA_DMR_DSTT_SD | // Set up addressing types; set to supervisor-data. - MCFDMA_DMR_SRCT_SD | // Set up addressing types; set to supervisor-data. - // source static-address-mode - ((mode & DMA_MODE_SRC_SA_BIT) ? MCFDMA_DMR_SRCM_SA : MCFDMA_DMR_SRCM_IA) | - // dest static-address-mode - ((mode & DMA_MODE_DES_SA_BIT) ? MCFDMA_DMR_DSTM_SA : MCFDMA_DMR_DSTM_IA) | - // burst, 32 bit, 16 bit or 8 bit transfers are separately configurable on the MCF5272 - (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_DSTS_OFF) | - (((mode & DMA_MODE_SSIZE_MASK) >> DMA_MODE_SSIZE_OFF) << MCFDMA_DMR_SRCS_OFF); - - dmawp[MCFDMA_DIR] |= MCFDMA_DIR_ASCEN; /* Enable completion interrupts */ - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DMR[%x]=%x DIR[%x]=%x\n", __FILE__, __LINE__, - dmanr, (int) &dmalp[MCFDMA_DMR], dmabp[MCFDMA_DMR], - (int) &dmawp[MCFDMA_DIR], dmawp[MCFDMA_DIR]); -#endif -} - -/* Set transfer address for specific DMA channel */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - - // Determine which address registers are used for memory/device accesses - if (dmalp[MCFDMA_DMR] & MCFDMA_DMR_SRCM) { - // Source incrementing, must be memory - dmalp[MCFDMA_DSAR] = a; - // Set dest address, must be device - dmalp[MCFDMA_DDAR] = dma_device_address[dmanr]; - } else { - // Destination incrementing, must be memory - dmalp[MCFDMA_DDAR] = a; - // Set source address, must be device - dmalp[MCFDMA_DSAR] = dma_device_address[dmanr]; - } - -#ifdef DEBUG_DMA - printk("%s(%d): dmanr=%d DMR[%x]=%x SAR[%x]=%08x DAR[%x]=%08x\n", - __FILE__, __LINE__, dmanr, (int) &dmawp[MCFDMA_DMR], dmawp[MCFDMA_DMR], - (int) &dmalp[MCFDMA_DSAR], dmalp[MCFDMA_DSAR], - (int) &dmalp[MCFDMA_DDAR], dmalp[MCFDMA_DDAR]); -#endif -} - -/* - * Specific for Coldfire - sets device address. - * Should be called after the mode set call, and before set DMA address. - */ -static __inline__ void set_dma_device_addr(unsigned int dmanr, unsigned int a) -{ -#ifdef DMA_DEBUG - printk("set_dma_device_addr(dmanr=%d,a=%x)\n", dmanr, a); -#endif - - dma_device_address[dmanr] = a; -} - -/* - * NOTE 2: "count" represents _bytes_. - * - * NOTE 3: While a 32-bit register, "count" is only a maximum 24-bit value. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - volatile unsigned int *dmalp; - -#ifdef DMA_DEBUG - printk("set_dma_count(dmanr=%d,count=%d)\n", dmanr, count); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - dmalp[MCFDMA_DBCR] = count; -} - -/* - * Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * Otherwise, it returns the number of _bytes_ left to transfer. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - volatile unsigned int *dmalp; - unsigned int count; - -#ifdef DMA_DEBUG - printk("get_dma_residue(dmanr=%d)\n", dmanr); -#endif - - dmalp = (unsigned int *) dma_base_addr[dmanr]; - count = dmalp[MCFDMA_DBCR]; - return(count); -} - -#endif /* !defined(CONFIG_M5272) */ -#endif /* CONFIG_COLDFIRE */ - -#define MAX_DMA_CHANNELS 8 - -/* Don't define MAX_DMA_ADDRESS; it's useless on the m68k/coldfire and any - occurrence should be flagged as an error. */ -/* under 2.4 it is actually needed by the new bootmem allocator */ -#define MAX_DMA_ADDRESS PAGE_OFFSET - -/* These are in kernel/dma.c: */ -extern int request_dma(unsigned int dmanr, const char *device_id); /* reserve a DMA channel */ -extern void free_dma(unsigned int dmanr); /* release it again */ - -#endif /* _M68K_DMA_H */ diff --git a/include/asm-m68knommu/elf.h b/include/asm-m68knommu/elf.h deleted file mode 100644 index 27f0ec7..0000000 --- a/include/asm-m68knommu/elf.h +++ /dev/null @@ -1,110 +0,0 @@ -#ifndef __ASMm68k_ELF_H -#define __ASMm68k_ELF_H - -/* - * ELF register definitions.. - */ - -#include -#include - -/* - * 68k ELF relocation types - */ -#define R_68K_NONE 0 -#define R_68K_32 1 -#define R_68K_16 2 -#define R_68K_8 3 -#define R_68K_PC32 4 -#define R_68K_PC16 5 -#define R_68K_PC8 6 -#define R_68K_GOT32 7 -#define R_68K_GOT16 8 -#define R_68K_GOT8 9 -#define R_68K_GOT32O 10 -#define R_68K_GOT16O 11 -#define R_68K_GOT8O 12 -#define R_68K_PLT32 13 -#define R_68K_PLT16 14 -#define R_68K_PLT8 15 -#define R_68K_PLT32O 16 -#define R_68K_PLT16O 17 -#define R_68K_PLT8O 18 -#define R_68K_COPY 19 -#define R_68K_GLOB_DAT 20 -#define R_68K_JMP_SLOT 21 -#define R_68K_RELATIVE 22 - -typedef unsigned long elf_greg_t; - -#define ELF_NGREG (sizeof(struct user_regs_struct) / sizeof(elf_greg_t)) -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct user_m68kfp_struct elf_fpregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_68K) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB -#define ELF_ARCH EM_68K - -/* For SVR4/m68k the function pointer to be registered with `atexit' is - passed in %a1. Although my copy of the ABI has no such statement, it - is actually used on ASV. */ -#define ELF_PLAT_INIT(_r, load_addr) _r->a1 = 0 - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE 4096 - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE 0xD0000000UL - -#define ELF_CORE_COPY_REGS(pr_reg, regs) \ - /* Bleech. */ \ - pr_reg[0] = regs->d1; \ - pr_reg[1] = regs->d2; \ - pr_reg[2] = regs->d3; \ - pr_reg[3] = regs->d4; \ - pr_reg[4] = regs->d5; \ - pr_reg[7] = regs->a0; \ - pr_reg[8] = regs->a1; \ - pr_reg[14] = regs->d0; \ - pr_reg[15] = rdusp(); \ - pr_reg[16] = 0 /* regs->orig_d0 */; \ - pr_reg[17] = regs->sr; \ - pr_reg[18] = regs->pc; \ - /* pr_reg[19] = (regs->format << 12) | regs->vector; */ \ - { \ - struct switch_stack *sw = ((struct switch_stack *)regs) - 1; \ - pr_reg[5] = sw->d6; \ - pr_reg[6] = sw->d7; \ - pr_reg[10] = sw->a3; \ - pr_reg[11] = sw->a4; \ - pr_reg[12] = sw->a5; \ - pr_reg[13] = sw->a6; \ - } - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ - -#define ELF_HWCAP (0) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) - -#endif diff --git a/include/asm-m68knommu/elia.h b/include/asm-m68knommu/elia.h deleted file mode 100644 index e037d4e..0000000 --- a/include/asm-m68knommu/elia.h +++ /dev/null @@ -1,41 +0,0 @@ -/****************************************************************************/ - -/* - * elia.h -- Lineo (formerly Moreton Bay) eLIA platform support. - * - * (C) Copyright 1999-2000, Moreton Bay (www.moreton.com.au) - * (C) Copyright 1999-2000, Lineo (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef elia_h -#define elia_h -/****************************************************************************/ - -#include - -#ifdef CONFIG_eLIA - -/* - * The serial port DTR and DCD lines are also on the Parallel I/O - * as well, so define those too. - */ - -#define eLIA_DCD1 0x0001 -#define eLIA_DCD0 0x0002 -#define eLIA_DTR1 0x0004 -#define eLIA_DTR0 0x0008 - -#define eLIA_PCIRESET 0x0020 - -/* - * Kernel macros to set and unset the LEDs. - */ -#ifndef __ASSEMBLY__ -extern unsigned short ppdata; -#endif /* __ASSEMBLY__ */ - -#endif /* CONFIG_eLIA */ - -/****************************************************************************/ -#endif /* elia_h */ diff --git a/include/asm-m68knommu/emergency-restart.h b/include/asm-m68knommu/emergency-restart.h deleted file mode 100644 index 108d8c4..0000000 --- a/include/asm-m68knommu/emergency-restart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_EMERGENCY_RESTART_H -#define _ASM_EMERGENCY_RESTART_H - -#include - -#endif /* _ASM_EMERGENCY_RESTART_H */ diff --git a/include/asm-m68knommu/entry.h b/include/asm-m68knommu/entry.h deleted file mode 100644 index c2553d2..0000000 --- a/include/asm-m68knommu/entry.h +++ /dev/null @@ -1,182 +0,0 @@ -#ifndef __M68KNOMMU_ENTRY_H -#define __M68KNOMMU_ENTRY_H - -#include -#include - -/* - * Stack layout in 'ret_from_exception': - * - * This allows access to the syscall arguments in registers d1-d5 - * - * 0(sp) - d1 - * 4(sp) - d2 - * 8(sp) - d3 - * C(sp) - d4 - * 10(sp) - d5 - * 14(sp) - a0 - * 18(sp) - a1 - * 1C(sp) - a2 - * 20(sp) - d0 - * 24(sp) - orig_d0 - * 28(sp) - stack adjustment - * 2C(sp) - [ sr ] [ format & vector ] - * 2E(sp) - [ pc-hiword ] [ sr ] - * 30(sp) - [ pc-loword ] [ pc-hiword ] - * 32(sp) - [ format & vector ] [ pc-loword ] - * ^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^ - * M68K COLDFIRE - */ - -#define ALLOWINT 0xf8ff - -#ifdef __ASSEMBLY__ - -/* process bits for task_struct.flags */ -PF_TRACESYS_OFF = 3 -PF_TRACESYS_BIT = 5 -PF_PTRACED_OFF = 3 -PF_PTRACED_BIT = 4 -PF_DTRACE_OFF = 1 -PF_DTRACE_BIT = 5 - -LENOSYS = 38 - -#define SWITCH_STACK_SIZE (6*4+4) /* Includes return address */ - -/* - * This defines the normal kernel pt-regs layout. - * - * regs are a2-a6 and d6-d7 preserved by C code - * the kernel doesn't mess with usp unless it needs to - */ - -#ifdef CONFIG_COLDFIRE -/* - * This is made a little more tricky on the ColdFire. There is no - * separate kernel and user stack pointers. Need to artificially - * construct a usp in software... When doing this we need to disable - * interrupts, otherwise bad things could happen. - */ -.macro SAVE_ALL - move #0x2700,%sr /* disable intrs */ - btst #5,%sp@(2) /* from user? */ - bnes 6f /* no, skip */ - movel %sp,sw_usp /* save user sp */ - addql #8,sw_usp /* remove exception */ - movel sw_ksp,%sp /* kernel sp */ - subql #8,%sp /* room for exception */ - clrl %sp@- /* stkadj */ - movel %d0,%sp@- /* orig d0 */ - movel %d0,%sp@- /* d0 */ - lea %sp@(-32),%sp /* space for 8 regs */ - moveml %d1-%d5/%a0-%a2,%sp@ - movel sw_usp,%a0 /* get usp */ - movel %a0@-,%sp@(PT_PC) /* copy exception program counter */ - movel %a0@-,%sp@(PT_FORMATVEC)/* copy exception format/vector/sr */ - bra 7f - 6: - clrl %sp@- /* stkadj */ - movel %d0,%sp@- /* orig d0 */ - movel %d0,%sp@- /* d0 */ - lea %sp@(-32),%sp /* space for 8 regs */ - moveml %d1-%d5/%a0-%a2,%sp@ - 7: -.endm - -.macro RESTORE_ALL - btst #5,%sp@(PT_SR) /* going user? */ - bnes 8f /* no, skip */ - move #0x2700,%sr /* disable intrs */ - movel sw_usp,%a0 /* get usp */ - movel %sp@(PT_PC),%a0@- /* copy exception program counter */ - movel %sp@(PT_FORMATVEC),%a0@-/* copy exception format/vector/sr */ - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stkadj */ - addql #8,%sp /* remove exception */ - movel %sp,sw_ksp /* save ksp */ - subql #8,sw_usp /* set exception */ - movel sw_usp,%sp /* restore usp */ - rte - 8: - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stkadj */ - rte -.endm - -/* - * Quick exception save, use current stack only. - */ -.macro SAVE_LOCAL - move #0x2700,%sr /* disable intrs */ - clrl %sp@- /* stkadj */ - movel %d0,%sp@- /* orig d0 */ - movel %d0,%sp@- /* d0 */ - lea %sp@(-32),%sp /* space for 8 regs */ - moveml %d1-%d5/%a0-%a2,%sp@ -.endm - -.macro RESTORE_LOCAL - moveml %sp@,%d1-%d5/%a0-%a2 - lea %sp@(32),%sp /* space for 8 regs */ - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stkadj */ - rte -.endm - -.macro SAVE_SWITCH_STACK - lea %sp@(-24),%sp /* 6 regs */ - moveml %a3-%a6/%d6-%d7,%sp@ -.endm - -.macro RESTORE_SWITCH_STACK - moveml %sp@,%a3-%a6/%d6-%d7 - lea %sp@(24),%sp /* 6 regs */ -.endm - -/* - * Software copy of the user and kernel stack pointers... Ugh... - * Need these to get around ColdFire not having separate kernel - * and user stack pointers. - */ -.globl sw_usp -.globl sw_ksp - -#else /* !CONFIG_COLDFIRE */ - -/* - * Standard 68k interrupt entry and exit macros. - */ -.macro SAVE_ALL - clrl %sp@- /* stkadj */ - movel %d0,%sp@- /* orig d0 */ - movel %d0,%sp@- /* d0 */ - moveml %d1-%d5/%a0-%a2,%sp@- -.endm - -.macro RESTORE_ALL - moveml %sp@+,%a0-%a2/%d1-%d5 - movel %sp@+,%d0 - addql #4,%sp /* orig d0 */ - addl %sp@+,%sp /* stkadj */ - rte -.endm - -.macro SAVE_SWITCH_STACK - moveml %a3-%a6/%d6-%d7,%sp@- -.endm - -.macro RESTORE_SWITCH_STACK - moveml %sp@+,%a3-%a6/%d6-%d7 -.endm - -#endif /* !CONFIG_COLDFIRE */ -#endif /* __ASSEMBLY__ */ -#endif /* __M68KNOMMU_ENTRY_H */ diff --git a/include/asm-m68knommu/errno.h b/include/asm-m68knommu/errno.h deleted file mode 100644 index 7e8c22b..0000000 --- a/include/asm-m68knommu/errno.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/fb.h b/include/asm-m68knommu/fb.h deleted file mode 100644 index c7df380..0000000 --- a/include/asm-m68knommu/fb.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _ASM_FB_H_ -#define _ASM_FB_H_ -#include - -#define fb_pgprotect(...) do {} while (0) - -static inline int fb_is_primary_device(struct fb_info *info) -{ - return 0; -} - -#endif /* _ASM_FB_H_ */ diff --git a/include/asm-m68knommu/fcntl.h b/include/asm-m68knommu/fcntl.h deleted file mode 100644 index f6a552c..0000000 --- a/include/asm-m68knommu/fcntl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/flat.h b/include/asm-m68knommu/flat.h deleted file mode 100644 index 814b517..0000000 --- a/include/asm-m68knommu/flat.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-m68knommu/flat.h -- uClinux flat-format executables - */ - -#ifndef __M68KNOMMU_FLAT_H__ -#define __M68KNOMMU_FLAT_H__ - -#define flat_stack_align(sp) /* nothing needed */ -#define flat_argvp_envp_on_stack() 1 -#define flat_old_ram_flag(flags) (flags) -#define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp) -#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) -#define flat_get_relocate_addr(rel) (rel) -#define flat_set_persistent(relval, p) 0 - -#endif /* __M68KNOMMU_FLAT_H__ */ diff --git a/include/asm-m68knommu/fpu.h b/include/asm-m68knommu/fpu.h deleted file mode 100644 index b16b2e4..0000000 --- a/include/asm-m68knommu/fpu.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __M68KNOMMU_FPU_H -#define __M68KNOMMU_FPU_H - - -/* - * MAX floating point unit state size (FSAVE/FRESTORE) - */ -#if defined(CONFIG_M68020) || defined(CONFIG_M68030) -#define FPSTATESIZE (216/sizeof(unsigned char)) -#elif defined(CONFIG_M68040) -#define FPSTATESIZE (96/sizeof(unsigned char)) -#elif defined(CONFIG_M68KFPU_EMU) -#define FPSTATESIZE (28/sizeof(unsigned char)) -#elif defined(CONFIG_M68060) -#define FPSTATESIZE (12/sizeof(unsigned char)) -#else -/* Assume no FP unit present then... */ -#define FPSTATESIZE (2) /* dummy size */ -#endif - -#endif /* __M68K_FPU_H */ diff --git a/include/asm-m68knommu/futex.h b/include/asm-m68knommu/futex.h deleted file mode 100644 index 6a332a9..0000000 --- a/include/asm-m68knommu/futex.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include - -#endif diff --git a/include/asm-m68knommu/hardirq.h b/include/asm-m68knommu/hardirq.h deleted file mode 100644 index bfad281..0000000 --- a/include/asm-m68knommu/hardirq.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __M68K_HARDIRQ_H -#define __M68K_HARDIRQ_H - -#include -#include -#include - -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -#include /* Standard mappings for irq_cpustat_t above */ - -#define HARDIRQ_BITS 8 - -/* - * The hardirq mask has to be large enough to have - * space for potentially all IRQ sources in the system - * nesting on a single CPU: - */ -#if (1 << HARDIRQ_BITS) < NR_IRQS -# error HARDIRQ_BITS is too low! -#endif - -void ack_bad_irq(unsigned int irq); - -#endif /* __M68K_HARDIRQ_H */ diff --git a/include/asm-m68knommu/hw_irq.h b/include/asm-m68knommu/hw_irq.h deleted file mode 100644 index f3ec9e5..0000000 --- a/include/asm-m68knommu/hw_irq.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef __M68KNOMMU_HW_IRQ_H__ -#define __M68KNOMMU_HW_IRQ_H__ - -#endif /* __M68KNOMMU_HW_IRQ_H__ */ diff --git a/include/asm-m68knommu/hwtest.h b/include/asm-m68knommu/hwtest.h deleted file mode 100644 index 700626a..0000000 --- a/include/asm-m68knommu/hwtest.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/io.h b/include/asm-m68knommu/io.h deleted file mode 100644 index 6adef1e..0000000 --- a/include/asm-m68knommu/io.h +++ /dev/null @@ -1,194 +0,0 @@ -#ifndef _M68KNOMMU_IO_H -#define _M68KNOMMU_IO_H - -#ifdef __KERNEL__ - - -/* - * These are for ISA/PCI shared memory _only_ and should never be used - * on any other type of memory, including Zorro memory. They are meant to - * access the bus in the bus byte order which is little-endian!. - * - * readX/writeX() are used to access memory mapped devices. On some - * architectures the memory mapped IO stuff needs to be accessed - * differently. On the m68k architecture, we just read/write the - * memory location directly. - */ -/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates - * two accesses to memory, which may be undesireable for some devices. - */ - -/* - * swap functions are sometimes needed to interface little-endian hardware - */ -static inline unsigned short _swapw(volatile unsigned short v) -{ - return ((v << 8) | (v >> 8)); -} - -static inline unsigned int _swapl(volatile unsigned long v) -{ - return ((v << 24) | ((v & 0xff00) << 8) | ((v & 0xff0000) >> 8) | (v >> 24)); -} - -#define readb(addr) \ - ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; }) -#define readw(addr) \ - ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; }) -#define readl(addr) \ - ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) - -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) - -#define writeb(b,addr) (void)((*(volatile unsigned char *) (addr)) = (b)) -#define writew(b,addr) (void)((*(volatile unsigned short *) (addr)) = (b)) -#define writel(b,addr) (void)((*(volatile unsigned int *) (addr)) = (b)) - -#define __raw_readb readb -#define __raw_readw readw -#define __raw_readl readl -#define __raw_writeb writeb -#define __raw_writew writew -#define __raw_writel writel - -static inline void io_outsb(unsigned int addr, void *buf, int len) -{ - volatile unsigned char *ap = (volatile unsigned char *) addr; - unsigned char *bp = (unsigned char *) buf; - while (len--) - *ap = *bp++; -} - -static inline void io_outsw(unsigned int addr, void *buf, int len) -{ - volatile unsigned short *ap = (volatile unsigned short *) addr; - unsigned short *bp = (unsigned short *) buf; - while (len--) - *ap = _swapw(*bp++); -} - -static inline void io_outsl(unsigned int addr, void *buf, int len) -{ - volatile unsigned int *ap = (volatile unsigned int *) addr; - unsigned int *bp = (unsigned int *) buf; - while (len--) - *ap = _swapl(*bp++); -} - -static inline void io_insb(unsigned int addr, void *buf, int len) -{ - volatile unsigned char *ap = (volatile unsigned char *) addr; - unsigned char *bp = (unsigned char *) buf; - while (len--) - *bp++ = *ap; -} - -static inline void io_insw(unsigned int addr, void *buf, int len) -{ - volatile unsigned short *ap = (volatile unsigned short *) addr; - unsigned short *bp = (unsigned short *) buf; - while (len--) - *bp++ = _swapw(*ap); -} - -static inline void io_insl(unsigned int addr, void *buf, int len) -{ - volatile unsigned int *ap = (volatile unsigned int *) addr; - unsigned int *bp = (unsigned int *) buf; - while (len--) - *bp++ = _swapl(*ap); -} - -#define mmiowb() - -/* - * make the short names macros so specific devices - * can override them as required - */ - -#define memset_io(a,b,c) memset((void *)(a),(b),(c)) -#define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) -#define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) - -#define inb(addr) readb(addr) -#define inw(addr) readw(addr) -#define inl(addr) readl(addr) -#define outb(x,addr) ((void) writeb(x,addr)) -#define outw(x,addr) ((void) writew(x,addr)) -#define outl(x,addr) ((void) writel(x,addr)) - -#define inb_p(addr) inb(addr) -#define inw_p(addr) inw(addr) -#define inl_p(addr) inl(addr) -#define outb_p(x,addr) outb(x,addr) -#define outw_p(x,addr) outw(x,addr) -#define outl_p(x,addr) outl(x,addr) - -#define outsb(a,b,l) io_outsb(a,b,l) -#define outsw(a,b,l) io_outsw(a,b,l) -#define outsl(a,b,l) io_outsl(a,b,l) - -#define insb(a,b,l) io_insb(a,b,l) -#define insw(a,b,l) io_insw(a,b,l) -#define insl(a,b,l) io_insl(a,b,l) - -#define IO_SPACE_LIMIT 0xffff - - -/* Values for nocacheflag and cmode */ -#define IOMAP_FULL_CACHING 0 -#define IOMAP_NOCACHE_SER 1 -#define IOMAP_NOCACHE_NONSER 2 -#define IOMAP_WRITETHROUGH 3 - -extern void *__ioremap(unsigned long physaddr, unsigned long size, int cacheflag); -extern void __iounmap(void *addr, unsigned long size); - -static inline void *ioremap(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); -} -static inline void *ioremap_nocache(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_NOCACHE_SER); -} -static inline void *ioremap_writethrough(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_WRITETHROUGH); -} -static inline void *ioremap_fullcache(unsigned long physaddr, unsigned long size) -{ - return __ioremap(physaddr, size, IOMAP_FULL_CACHING); -} - -extern void iounmap(void *addr); - -/* Pages to physical address... */ -#define page_to_phys(page) ((page - mem_map) << PAGE_SHIFT) -#define page_to_bus(page) ((page - mem_map) << PAGE_SHIFT) - -/* - * Macros used for converting between virtual and physical mappings. - */ -#define phys_to_virt(vaddr) ((void *) (vaddr)) -#define virt_to_phys(vaddr) ((unsigned long) (vaddr)) - -#define virt_to_bus virt_to_phys -#define bus_to_virt phys_to_virt - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* __KERNEL__ */ - -#endif /* _M68KNOMMU_IO_H */ diff --git a/include/asm-m68knommu/ioctl.h b/include/asm-m68knommu/ioctl.h deleted file mode 100644 index b279fe0..0000000 --- a/include/asm-m68knommu/ioctl.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/ioctls.h b/include/asm-m68knommu/ioctls.h deleted file mode 100644 index 0b1eb4d..0000000 --- a/include/asm-m68knommu/ioctls.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/ipcbuf.h b/include/asm-m68knommu/ipcbuf.h deleted file mode 100644 index e4a7be6..0000000 --- a/include/asm-m68knommu/ipcbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h deleted file mode 100644 index 9373c31..0000000 --- a/include/asm-m68knommu/irq.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _M68KNOMMU_IRQ_H_ -#define _M68KNOMMU_IRQ_H_ - -#ifdef CONFIG_COLDFIRE -/* - * On the ColdFire we keep track of all vectors. That way drivers - * can register whatever vector number they wish, and we can deal - * with it. - */ -#define SYS_IRQS 256 -#define NR_IRQS SYS_IRQS - -#else - -/* - * # of m68k interrupts - */ -#define SYS_IRQS 8 -#define NR_IRQS (24 + SYS_IRQS) - -#endif /* CONFIG_COLDFIRE */ - - -#define irq_canonicalize(irq) (irq) - -#endif /* _M68KNOMMU_IRQ_H_ */ diff --git a/include/asm-m68knommu/irq_regs.h b/include/asm-m68knommu/irq_regs.h deleted file mode 100644 index 3dd9c0b..0000000 --- a/include/asm-m68knommu/irq_regs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/kdebug.h b/include/asm-m68knommu/kdebug.h deleted file mode 100644 index 6ece1b0..0000000 --- a/include/asm-m68knommu/kdebug.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/kmap_types.h b/include/asm-m68knommu/kmap_types.h deleted file mode 100644 index bfb6707..0000000 --- a/include/asm-m68knommu/kmap_types.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __ASM_M68K_KMAP_TYPES_H -#define __ASM_M68K_KMAP_TYPES_H - -enum km_type { - KM_BOUNCE_READ, - KM_SKB_SUNRPC_DATA, - KM_SKB_DATA_SOFTIRQ, - KM_USER0, - KM_USER1, - KM_BIO_SRC_IRQ, - KM_BIO_DST_IRQ, - KM_PTE0, - KM_PTE1, - KM_IRQ0, - KM_IRQ1, - KM_SOFTIRQ0, - KM_SOFTIRQ1, - KM_TYPE_NR -}; - -#endif diff --git a/include/asm-m68knommu/linkage.h b/include/asm-m68knommu/linkage.h deleted file mode 100644 index c288a19..0000000 --- a/include/asm-m68knommu/linkage.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/local.h b/include/asm-m68knommu/local.h deleted file mode 100644 index 84a39c1..0000000 --- a/include/asm-m68knommu/local.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __M68KNOMMU_LOCAL_H -#define __M68KNOMMU_LOCAL_H - -#include - -#endif /* __M68KNOMMU_LOCAL_H */ diff --git a/include/asm-m68knommu/m5206sim.h b/include/asm-m68knommu/m5206sim.h deleted file mode 100644 index 7e3594d..0000000 --- a/include/asm-m68knommu/m5206sim.h +++ /dev/null @@ -1,131 +0,0 @@ -/****************************************************************************/ - -/* - * m5206sim.h -- ColdFire 5206 System Integration Module support. - * - * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef m5206sim_h -#define m5206sim_h -/****************************************************************************/ - - -/* - * Define the 5206 SIM register set addresses. - */ -#define MCFSIM_SIMR 0x03 /* SIM Config reg (r/w) */ -#define MCFSIM_ICR1 0x14 /* Intr Ctrl reg 1 (r/w) */ -#define MCFSIM_ICR2 0x15 /* Intr Ctrl reg 2 (r/w) */ -#define MCFSIM_ICR3 0x16 /* Intr Ctrl reg 3 (r/w) */ -#define MCFSIM_ICR4 0x17 /* Intr Ctrl reg 4 (r/w) */ -#define MCFSIM_ICR5 0x18 /* Intr Ctrl reg 5 (r/w) */ -#define MCFSIM_ICR6 0x19 /* Intr Ctrl reg 6 (r/w) */ -#define MCFSIM_ICR7 0x1a /* Intr Ctrl reg 7 (r/w) */ -#define MCFSIM_ICR8 0x1b /* Intr Ctrl reg 8 (r/w) */ -#define MCFSIM_ICR9 0x1c /* Intr Ctrl reg 9 (r/w) */ -#define MCFSIM_ICR10 0x1d /* Intr Ctrl reg 10 (r/w) */ -#define MCFSIM_ICR11 0x1e /* Intr Ctrl reg 11 (r/w) */ -#define MCFSIM_ICR12 0x1f /* Intr Ctrl reg 12 (r/w) */ -#define MCFSIM_ICR13 0x20 /* Intr Ctrl reg 13 (r/w) */ -#ifdef CONFIG_M5206e -#define MCFSIM_ICR14 0x21 /* Intr Ctrl reg 14 (r/w) */ -#define MCFSIM_ICR15 0x22 /* Intr Ctrl reg 15 (r/w) */ -#endif - -#define MCFSIM_IMR 0x36 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_IPR 0x3a /* Interrupt Pend reg (r/w) */ - -#define MCFSIM_RSR 0x40 /* Reset Status reg (r/w) */ -#define MCFSIM_SYPCR 0x41 /* System Protection reg (r/w)*/ - -#define MCFSIM_SWIVR 0x42 /* SW Watchdog intr reg (r/w) */ -#define MCFSIM_SWSR 0x43 /* SW Watchdog service (r/w) */ - -#define MCFSIM_DCRR 0x46 /* DRAM Refresh reg (r/w) */ -#define MCFSIM_DCTR 0x4a /* DRAM Timing reg (r/w) */ -#define MCFSIM_DAR0 0x4c /* DRAM 0 Address reg(r/w) */ -#define MCFSIM_DMR0 0x50 /* DRAM 0 Mask reg (r/w) */ -#define MCFSIM_DCR0 0x57 /* DRAM 0 Control reg (r/w) */ -#define MCFSIM_DAR1 0x58 /* DRAM 1 Address reg (r/w) */ -#define MCFSIM_DMR1 0x5c /* DRAM 1 Mask reg (r/w) */ -#define MCFSIM_DCR1 0x63 /* DRAM 1 Control reg (r/w) */ - -#define MCFSIM_CSAR0 0x64 /* CS 0 Address 0 reg (r/w) */ -#define MCFSIM_CSMR0 0x68 /* CS 0 Mask 0 reg (r/w) */ -#define MCFSIM_CSCR0 0x6e /* CS 0 Control reg (r/w) */ -#define MCFSIM_CSAR1 0x70 /* CS 1 Address reg (r/w) */ -#define MCFSIM_CSMR1 0x74 /* CS 1 Mask reg (r/w) */ -#define MCFSIM_CSCR1 0x7a /* CS 1 Control reg (r/w) */ -#define MCFSIM_CSAR2 0x7c /* CS 2 Address reg (r/w) */ -#define MCFSIM_CSMR2 0x80 /* CS 2 Mask reg (r/w) */ -#define MCFSIM_CSCR2 0x86 /* CS 2 Control reg (r/w) */ -#define MCFSIM_CSAR3 0x88 /* CS 3 Address reg (r/w) */ -#define MCFSIM_CSMR3 0x8c /* CS 3 Mask reg (r/w) */ -#define MCFSIM_CSCR3 0x92 /* CS 3 Control reg (r/w) */ -#define MCFSIM_CSAR4 0x94 /* CS 4 Address reg (r/w) */ -#define MCFSIM_CSMR4 0x98 /* CS 4 Mask reg (r/w) */ -#define MCFSIM_CSCR4 0x9e /* CS 4 Control reg (r/w) */ -#define MCFSIM_CSAR5 0xa0 /* CS 5 Address reg (r/w) */ -#define MCFSIM_CSMR5 0xa4 /* CS 5 Mask reg (r/w) */ -#define MCFSIM_CSCR5 0xaa /* CS 5 Control reg (r/w) */ -#define MCFSIM_CSAR6 0xac /* CS 6 Address reg (r/w) */ -#define MCFSIM_CSMR6 0xb0 /* CS 6 Mask reg (r/w) */ -#define MCFSIM_CSCR6 0xb6 /* CS 6 Control reg (r/w) */ -#define MCFSIM_CSAR7 0xb8 /* CS 7 Address reg (r/w) */ -#define MCFSIM_CSMR7 0xbc /* CS 7 Mask reg (r/w) */ -#define MCFSIM_CSCR7 0xc2 /* CS 7 Control reg (r/w) */ -#define MCFSIM_DMCR 0xc6 /* Default control */ - -#ifdef CONFIG_M5206e -#define MCFSIM_PAR 0xca /* Pin Assignment reg (r/w) */ -#else -#define MCFSIM_PAR 0xcb /* Pin Assignment reg (r/w) */ -#endif - -#define MCFSIM_PADDR 0x1c5 /* Parallel Direction (r/w) */ -#define MCFSIM_PADAT 0x1c9 /* Parallel Port Value (r/w) */ - -/* - * Some symbol defines for the Parallel Port Pin Assignment Register - */ -#ifdef CONFIG_M5206e -#define MCFSIM_PAR_DREQ0 0x100 /* Set to select DREQ0 input */ - /* Clear to select T0 input */ -#define MCFSIM_PAR_DREQ1 0x200 /* Select DREQ1 input */ - /* Clear to select T0 output */ -#endif - -/* - * Some symbol defines for the Interrupt Control Register - */ -#define MCFSIM_SWDICR MCFSIM_ICR8 /* Watchdog timer ICR */ -#define MCFSIM_TIMER1ICR MCFSIM_ICR9 /* Timer 1 ICR */ -#define MCFSIM_TIMER2ICR MCFSIM_ICR10 /* Timer 2 ICR */ -#define MCFSIM_UART1ICR MCFSIM_ICR12 /* UART 1 ICR */ -#define MCFSIM_UART2ICR MCFSIM_ICR13 /* UART 2 ICR */ -#ifdef CONFIG_M5206e -#define MCFSIM_DMA1ICR MCFSIM_ICR14 /* DMA 1 ICR */ -#define MCFSIM_DMA2ICR MCFSIM_ICR15 /* DMA 2 ICR */ -#endif - -#if defined(CONFIG_M5206e) -#define MCFSIM_IMR_MASKALL 0xfffe /* All SIM intr sources */ -#endif - -/* - * Macro to get and set IMR register. It is 16 bits on the 5206. - */ -#define mcf_getimr() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IMR)) = (imr) - -#define mcf_getipr() \ - *((volatile unsigned short *) (MCF_MBAR + MCFSIM_IPR)) - -/****************************************************************************/ -#endif /* m5206sim_h */ diff --git a/include/asm-m68knommu/m520xsim.h b/include/asm-m68knommu/m520xsim.h deleted file mode 100644 index 49d016e..0000000 --- a/include/asm-m68knommu/m520xsim.h +++ /dev/null @@ -1,63 +0,0 @@ -/****************************************************************************/ - -/* - * m520xsim.h -- ColdFire 5207/5208 System Integration Module support. - * - * (C) Copyright 2005, Intec Automation (mike@steroidmicros.com) - */ - -/****************************************************************************/ -#ifndef m520xsim_h -#define m520xsim_h -/****************************************************************************/ - - -/* - * Define the 5282 SIM register set addresses. - */ -#define MCFICM_INTC0 0x48000 /* Base for Interrupt Ctrl 0 */ -#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ -#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ -#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ -#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ -#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ -#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ -#define MCFINTC_ICR0 0x40 /* Base ICR register */ - -#define MCFINT_VECBASE 64 -#define MCFINT_UART0 26 /* Interrupt number for UART0 */ -#define MCFINT_UART1 27 /* Interrupt number for UART1 */ -#define MCFINT_UART2 28 /* Interrupt number for UART2 */ -#define MCFINT_QSPI 31 /* Interrupt number for QSPI */ -#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */ - -/* - * SDRAM configuration registers. - */ -#define MCFSIM_SDMR 0x000a8000 /* SDRAM Mode/Extended Mode Register */ -#define MCFSIM_SDCR 0x000a8004 /* SDRAM Control Register */ -#define MCFSIM_SDCFG1 0x000a8008 /* SDRAM Configuration Register 1 */ -#define MCFSIM_SDCFG2 0x000a800c /* SDRAM Configuration Register 2 */ -#define MCFSIM_SDCS0 0x000a8110 /* SDRAM Chip Select 0 Configuration */ -#define MCFSIM_SDCS1 0x000a8114 /* SDRAM Chip Select 1 Configuration */ - - -#define MCF_GPIO_PAR_UART (0xA4036) -#define MCF_GPIO_PAR_FECI2C (0xA4033) -#define MCF_GPIO_PAR_FEC (0xA4038) - -#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0001) -#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0002) - -#define MCF_GPIO_PAR_UART_PAR_URXD1 (0x0040) -#define MCF_GPIO_PAR_UART_PAR_UTXD1 (0x0080) - -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) - -#define ICR_INTRCONF 0x05 -#define MCFPIT_IMR MCFINTC_IMRL -#define MCFPIT_IMR_IBIT (1 << MCFINT_PIT1) - -/****************************************************************************/ -#endif /* m520xsim_h */ diff --git a/include/asm-m68knommu/m523xsim.h b/include/asm-m68knommu/m523xsim.h deleted file mode 100644 index bf39731..0000000 --- a/include/asm-m68knommu/m523xsim.h +++ /dev/null @@ -1,45 +0,0 @@ -/****************************************************************************/ - -/* - * m523xsim.h -- ColdFire 523x System Integration Module support. - * - * (C) Copyright 2003-2005, Greg Ungerer - */ - -/****************************************************************************/ -#ifndef m523xsim_h -#define m523xsim_h -/****************************************************************************/ - - -/* - * Define the 523x SIM register set addresses. - */ -#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */ -#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */ -#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ -#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ -#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ -#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ -#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ -#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ -#define MCFINTC_IRLR 0x18 /* */ -#define MCFINTC_IACKL 0x19 /* */ -#define MCFINTC_ICR0 0x40 /* Base ICR register */ - -#define MCFINT_VECBASE 64 /* Vector base number */ -#define MCFINT_UART0 13 /* Interrupt number for UART0 */ -#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ -#define MCFINT_QSPI 18 /* Interrupt number for QSPI */ - -/* - * SDRAM configuration registers. - */ -#define MCFSIM_DCR 0x44 /* SDRAM control */ -#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ -#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ -#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ -#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ - -/****************************************************************************/ -#endif /* m523xsim_h */ diff --git a/include/asm-m68knommu/m5249sim.h b/include/asm-m68knommu/m5249sim.h deleted file mode 100644 index 366eb86..0000000 --- a/include/asm-m68knommu/m5249sim.h +++ /dev/null @@ -1,209 +0,0 @@ -/****************************************************************************/ - -/* - * m5249sim.h -- ColdFire 5249 System Integration Module support. - * - * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) - */ - -/****************************************************************************/ -#ifndef m5249sim_h -#define m5249sim_h -/****************************************************************************/ - -/* - * Define the 5249 SIM register set addresses. - */ -#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */ -#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w)*/ -#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ -#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ -#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ -#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ -#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ -#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ -#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ -#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */ -#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */ -#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */ -#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */ -#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */ -#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ -#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */ -#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */ -#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */ - -#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */ -#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */ -#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */ -#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */ -#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */ -#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */ -#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */ -#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */ -#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ -#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */ -#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */ -#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ - -#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */ -#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */ -#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ - - -/* - * Some symbol defines for the above... - */ -#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ -#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */ -#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */ -#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */ -#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */ -#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */ -#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ -#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ -#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ - -/* - * General purpose IO registers (in MBAR2). - */ -#define MCFSIM2_GPIOREAD 0x0 /* GPIO read values */ -#define MCFSIM2_GPIOWRITE 0x4 /* GPIO write values */ -#define MCFSIM2_GPIOENABLE 0x8 /* GPIO enabled */ -#define MCFSIM2_GPIOFUNC 0xc /* GPIO function */ -#define MCFSIM2_GPIO1READ 0xb0 /* GPIO1 read values */ -#define MCFSIM2_GPIO1WRITE 0xb4 /* GPIO1 write values */ -#define MCFSIM2_GPIO1ENABLE 0xb8 /* GPIO1 enabled */ -#define MCFSIM2_GPIO1FUNC 0xbc /* GPIO1 function */ - -#define MCFSIM2_GPIOINTSTAT 0xc0 /* GPIO interrupt status */ -#define MCFSIM2_GPIOINTCLEAR 0xc0 /* GPIO interrupt clear */ -#define MCFSIM2_GPIOINTENABLE 0xc4 /* GPIO interrupt enable */ - -#define MCFSIM2_INTLEVEL1 0x140 /* Interrupt level reg 1 */ -#define MCFSIM2_INTLEVEL2 0x144 /* Interrupt level reg 2 */ -#define MCFSIM2_INTLEVEL3 0x148 /* Interrupt level reg 3 */ -#define MCFSIM2_INTLEVEL4 0x14c /* Interrupt level reg 4 */ -#define MCFSIM2_INTLEVEL5 0x150 /* Interrupt level reg 5 */ -#define MCFSIM2_INTLEVEL6 0x154 /* Interrupt level reg 6 */ -#define MCFSIM2_INTLEVEL7 0x158 /* Interrupt level reg 7 */ -#define MCFSIM2_INTLEVEL8 0x15c /* Interrupt level reg 8 */ - -#define MCFSIM2_DMAROUTE 0x188 /* DMA routing */ - -#define MCFSIM2_IDECONFIG1 0x18c /* IDEconfig1 */ -#define MCFSIM2_IDECONFIG2 0x190 /* IDEconfig2 */ - - -/* - * Macro to set IMR register. It is 32 bits on the 5249. - */ -#define MCFSIM_IMR_MASKALL 0x7fffe /* All SIM intr sources */ - -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) - -/****************************************************************************/ - -#ifdef __ASSEMBLER__ - -/* - * The M5249C3 board needs a little help getting all its SIM devices - * initialized at kernel start time. dBUG doesn't set much up, so - * we need to do it manually. - */ -.macro m5249c3_setup - /* - * Set MBAR1 and MBAR2, just incase they are not set. - */ - movel #0x10000001,%a0 - movec %a0,%MBAR /* map MBAR region */ - subql #1,%a0 /* get MBAR address in a0 */ - - movel #0x80000001,%a1 - movec %a1,#3086 /* map MBAR2 region */ - subql #1,%a1 /* get MBAR2 address in a1 */ - - /* - * Move secondary interrupts to base at 128. - */ - moveb #0x80,%d0 - moveb %d0,0x16b(%a1) /* interrupt base register */ - - /* - * Work around broken CSMR0/DRAM vector problem. - */ - movel #0x001F0021,%d0 /* disable C/I bit */ - movel %d0,0x84(%a0) /* set CSMR0 */ - - /* - * Disable the PLL firstly. (Who knows what state it is - * in here!). - */ - movel 0x180(%a1),%d0 /* get current PLL value */ - andl #0xfffffffe,%d0 /* PLL bypass first */ - movel %d0,0x180(%a1) /* set PLL register */ - nop - -#if CONFIG_CLOCK_FREQ == 140000000 - /* - * Set initial clock frequency. This assumes M5249C3 board - * is fitted with 11.2896MHz crystal. It will program the - * PLL for 140MHz. Lets go fast :-) - */ - movel #0x125a40f0,%d0 /* set for 140MHz */ - movel %d0,0x180(%a1) /* set PLL register */ - orl #0x1,%d0 - movel %d0,0x180(%a1) /* set PLL register */ -#endif - - /* - * Setup CS1 for ethernet controller. - * (Setup as per M5249C3 doco). - */ - movel #0xe0000000,%d0 /* CS1 mapped at 0xe0000000 */ - movel %d0,0x8c(%a0) - movel #0x001f0021,%d0 /* CS1 size of 1Mb */ - movel %d0,0x90(%a0) - movew #0x0080,%d0 /* CS1 = 16bit port, AA */ - movew %d0,0x96(%a0) - - /* - * Setup CS2 for IDE interface. - */ - movel #0x50000000,%d0 /* CS2 mapped at 0x50000000 */ - movel %d0,0x98(%a0) - movel #0x001f0001,%d0 /* CS2 size of 1MB */ - movel %d0,0x9c(%a0) - movew #0x0080,%d0 /* CS2 = 16bit, TA */ - movew %d0,0xa2(%a0) - - movel #0x00107000,%d0 /* IDEconfig1 */ - movel %d0,0x18c(%a1) - movel #0x000c0400,%d0 /* IDEconfig2 */ - movel %d0,0x190(%a1) - - movel #0x00080000,%d0 /* GPIO19, IDE reset bit */ - orl %d0,0xc(%a1) /* function GPIO19 */ - orl %d0,0x8(%a1) /* enable GPIO19 as output */ - orl %d0,0x4(%a1) /* de-assert IDE reset */ -.endm - -#define PLATFORM_SETUP m5249c3_setup - -#endif /* __ASSEMBLER__ */ - -/****************************************************************************/ -#endif /* m5249sim_h */ diff --git a/include/asm-m68knommu/m5272sim.h b/include/asm-m68knommu/m5272sim.h deleted file mode 100644 index 6217edc..0000000 --- a/include/asm-m68knommu/m5272sim.h +++ /dev/null @@ -1,78 +0,0 @@ -/****************************************************************************/ - -/* - * m5272sim.h -- ColdFire 5272 System Integration Module support. - * - * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef m5272sim_h -#define m5272sim_h -/****************************************************************************/ - - -/* - * Define the 5272 SIM register set addresses. - */ -#define MCFSIM_SCR 0x04 /* SIM Config reg (r/w) */ -#define MCFSIM_SPR 0x06 /* System Protection reg (r/w)*/ -#define MCFSIM_PMR 0x08 /* Power Management reg (r/w) */ -#define MCFSIM_APMR 0x0e /* Active Low Power reg (r/w) */ -#define MCFSIM_DIR 0x10 /* Device Identity reg (r/w) */ - -#define MCFSIM_ICR1 0x20 /* Intr Ctrl reg 1 (r/w) */ -#define MCFSIM_ICR2 0x24 /* Intr Ctrl reg 2 (r/w) */ -#define MCFSIM_ICR3 0x28 /* Intr Ctrl reg 3 (r/w) */ -#define MCFSIM_ICR4 0x2c /* Intr Ctrl reg 4 (r/w) */ - -#define MCFSIM_ISR 0x30 /* Interrupt Source reg (r/w) */ -#define MCFSIM_PITR 0x34 /* Interrupt Transition (r/w) */ -#define MCFSIM_PIWR 0x38 /* Interrupt Wakeup reg (r/w) */ -#define MCFSIM_PIVR 0x3f /* Interrupt Vector reg (r/w( */ - -#define MCFSIM_WRRR 0x280 /* Watchdog reference (r/w) */ -#define MCFSIM_WIRR 0x284 /* Watchdog interrupt (r/w) */ -#define MCFSIM_WCR 0x288 /* Watchdog counter (r/w) */ -#define MCFSIM_WER 0x28c /* Watchdog event (r/w) */ - -#define MCFSIM_CSBR0 0x40 /* CS0 Base Address (r/w) */ -#define MCFSIM_CSOR0 0x44 /* CS0 Option (r/w) */ -#define MCFSIM_CSBR1 0x48 /* CS1 Base Address (r/w) */ -#define MCFSIM_CSOR1 0x4c /* CS1 Option (r/w) */ -#define MCFSIM_CSBR2 0x50 /* CS2 Base Address (r/w) */ -#define MCFSIM_CSOR2 0x54 /* CS2 Option (r/w) */ -#define MCFSIM_CSBR3 0x58 /* CS3 Base Address (r/w) */ -#define MCFSIM_CSOR3 0x5c /* CS3 Option (r/w) */ -#define MCFSIM_CSBR4 0x60 /* CS4 Base Address (r/w) */ -#define MCFSIM_CSOR4 0x64 /* CS4 Option (r/w) */ -#define MCFSIM_CSBR5 0x68 /* CS5 Base Address (r/w) */ -#define MCFSIM_CSOR5 0x6c /* CS5 Option (r/w) */ -#define MCFSIM_CSBR6 0x70 /* CS6 Base Address (r/w) */ -#define MCFSIM_CSOR6 0x74 /* CS6 Option (r/w) */ -#define MCFSIM_CSBR7 0x78 /* CS7 Base Address (r/w) */ -#define MCFSIM_CSOR7 0x7c /* CS7 Option (r/w) */ - -#define MCFSIM_SDCR 0x180 /* SDRAM Configuration (r/w) */ -#define MCFSIM_SDTR 0x184 /* SDRAM Timing (r/w) */ -#define MCFSIM_DCAR0 0x4c /* DRAM 0 Address reg(r/w) */ -#define MCFSIM_DCMR0 0x50 /* DRAM 0 Mask reg (r/w) */ -#define MCFSIM_DCCR0 0x57 /* DRAM 0 Control reg (r/w) */ -#define MCFSIM_DCAR1 0x58 /* DRAM 1 Address reg (r/w) */ -#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */ -#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */ - -#define MCFSIM_PACNT 0x80 /* Port A Control (r/w) */ -#define MCFSIM_PADDR 0x84 /* Port A Direction (r/w) */ -#define MCFSIM_PADAT 0x86 /* Port A Data (r/w) */ -#define MCFSIM_PBCNT 0x88 /* Port B Control (r/w) */ -#define MCFSIM_PBDDR 0x8c /* Port B Direction (r/w) */ -#define MCFSIM_PBDAT 0x8e /* Port B Data (r/w) */ -#define MCFSIM_PCDDR 0x94 /* Port C Direction (r/w) */ -#define MCFSIM_PCDAT 0x96 /* Port C Data (r/w) */ -#define MCFSIM_PDCNT 0x98 /* Port D Control (r/w) */ - - -/****************************************************************************/ -#endif /* m5272sim_h */ diff --git a/include/asm-m68knommu/m527xsim.h b/include/asm-m68knommu/m527xsim.h deleted file mode 100644 index 1f63ab3..0000000 --- a/include/asm-m68knommu/m527xsim.h +++ /dev/null @@ -1,74 +0,0 @@ -/****************************************************************************/ - -/* - * m527xsim.h -- ColdFire 5270/5271 System Integration Module support. - * - * (C) Copyright 2004, Greg Ungerer (gerg@snapgear.com) - */ - -/****************************************************************************/ -#ifndef m527xsim_h -#define m527xsim_h -/****************************************************************************/ - - -/* - * Define the 5270/5271 SIM register set addresses. - */ -#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */ -#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 1 */ -#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ -#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ -#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ -#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ -#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ -#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ -#define MCFINTC_IRLR 0x18 /* */ -#define MCFINTC_IACKL 0x19 /* */ -#define MCFINTC_ICR0 0x40 /* Base ICR register */ - -#define MCFINT_VECBASE 64 /* Vector base number */ -#define MCFINT_UART0 13 /* Interrupt number for UART0 */ -#define MCFINT_UART1 14 /* Interrupt number for UART1 */ -#define MCFINT_UART2 15 /* Interrupt number for UART2 */ -#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */ - -/* - * SDRAM configuration registers. - */ -#ifdef CONFIG_M5271 -#define MCFSIM_DCR 0x40 /* SDRAM control */ -#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ -#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ -#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ -#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ -#endif -#ifdef CONFIG_M5275 -#define MCFSIM_DMR 0x40 /* SDRAM mode */ -#define MCFSIM_DCR 0x44 /* SDRAM control */ -#define MCFSIM_DCFG1 0x48 /* SDRAM configuration 1 */ -#define MCFSIM_DCFG2 0x4c /* SDRAM configuration 2 */ -#define MCFSIM_DBAR0 0x50 /* SDRAM base address 0 */ -#define MCFSIM_DMR0 0x54 /* SDRAM address mask 0 */ -#define MCFSIM_DBAR1 0x58 /* SDRAM base address 1 */ -#define MCFSIM_DMR1 0x5c /* SDRAM address mask 1 */ -#endif - -/* - * GPIO pins setups to enable the UARTs. - */ -#ifdef CONFIG_M5271 -#define MCF_GPIO_PAR_UART 0x100048 /* PAR UART address */ -#define UART0_ENABLE_MASK 0x000f -#define UART1_ENABLE_MASK 0x0ff0 -#define UART2_ENABLE_MASK 0x3000 -#endif -#ifdef CONFIG_M5275 -#define MCF_GPIO_PAR_UART 0x10007c /* PAR UART address */ -#define UART0_ENABLE_MASK 0x000f -#define UART1_ENABLE_MASK 0x00f0 -#define UART2_ENABLE_MASK 0x3f00 -#endif - -/****************************************************************************/ -#endif /* m527xsim_h */ diff --git a/include/asm-m68knommu/m528xsim.h b/include/asm-m68knommu/m528xsim.h deleted file mode 100644 index 28bf783..0000000 --- a/include/asm-m68knommu/m528xsim.h +++ /dev/null @@ -1,159 +0,0 @@ -/****************************************************************************/ - -/* - * m528xsim.h -- ColdFire 5280/5282 System Integration Module support. - * - * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com) - */ - -/****************************************************************************/ -#ifndef m528xsim_h -#define m528xsim_h -/****************************************************************************/ - - -/* - * Define the 5280/5282 SIM register set addresses. - */ -#define MCFICM_INTC0 0x0c00 /* Base for Interrupt Ctrl 0 */ -#define MCFICM_INTC1 0x0d00 /* Base for Interrupt Ctrl 0 */ -#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */ -#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */ -#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */ -#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ -#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ -#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ -#define MCFINTC_IRLR 0x18 /* */ -#define MCFINTC_IACKL 0x19 /* */ -#define MCFINTC_ICR0 0x40 /* Base ICR register */ - -#define MCFINT_VECBASE 64 /* Vector base number */ -#define MCFINT_UART0 13 /* Interrupt number for UART0 */ -#define MCFINT_PIT1 55 /* Interrupt number for PIT1 */ - -/* - * SDRAM configuration registers. - */ -#define MCFSIM_DCR 0x44 /* SDRAM control */ -#define MCFSIM_DACR0 0x48 /* SDRAM base address 0 */ -#define MCFSIM_DMR0 0x4c /* SDRAM address mask 0 */ -#define MCFSIM_DACR1 0x50 /* SDRAM base address 1 */ -#define MCFSIM_DMR1 0x54 /* SDRAM address mask 1 */ - -/* - * Derek Cheung - 6 Feb 2005 - * add I2C and QSPI register definition using Freescale's MCF5282 - */ -/* set Port AS pin for I2C or UART */ -#define MCF5282_GPIO_PASPAR (volatile u16 *) (MCF_IPSBAR + 0x00100056) - -/* Port UA Pin Assignment Register (8 Bit) */ -#define MCF5282_GPIO_PUAPAR 0x10005C - -/* Interrupt Mask Register Register Low */ -#define MCF5282_INTC0_IMRL (volatile u32 *) (MCF_IPSBAR + 0x0C0C) -/* Interrupt Control Register 7 */ -#define MCF5282_INTC0_ICR17 (volatile u8 *) (MCF_IPSBAR + 0x0C51) - - - -/********************************************************************* -* -* Inter-IC (I2C) Module -* -*********************************************************************/ -/* Read/Write access macros for general use */ -#define MCF5282_I2C_I2ADR (volatile u8 *) (MCF_IPSBAR + 0x0300) // Address -#define MCF5282_I2C_I2FDR (volatile u8 *) (MCF_IPSBAR + 0x0304) // Freq Divider -#define MCF5282_I2C_I2CR (volatile u8 *) (MCF_IPSBAR + 0x0308) // Control -#define MCF5282_I2C_I2SR (volatile u8 *) (MCF_IPSBAR + 0x030C) // Status -#define MCF5282_I2C_I2DR (volatile u8 *) (MCF_IPSBAR + 0x0310) // Data I/O - -/* Bit level definitions and macros */ -#define MCF5282_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01) - -#define MCF5282_I2C_I2FDR_IC(x) (((x)&0x3F)) - -#define MCF5282_I2C_I2CR_IEN (0x80) // I2C enable -#define MCF5282_I2C_I2CR_IIEN (0x40) // interrupt enable -#define MCF5282_I2C_I2CR_MSTA (0x20) // master/slave mode -#define MCF5282_I2C_I2CR_MTX (0x10) // transmit/receive mode -#define MCF5282_I2C_I2CR_TXAK (0x08) // transmit acknowledge enable -#define MCF5282_I2C_I2CR_RSTA (0x04) // repeat start - -#define MCF5282_I2C_I2SR_ICF (0x80) // data transfer bit -#define MCF5282_I2C_I2SR_IAAS (0x40) // I2C addressed as a slave -#define MCF5282_I2C_I2SR_IBB (0x20) // I2C bus busy -#define MCF5282_I2C_I2SR_IAL (0x10) // aribitration lost -#define MCF5282_I2C_I2SR_SRW (0x04) // slave read/write -#define MCF5282_I2C_I2SR_IIF (0x02) // I2C interrupt -#define MCF5282_I2C_I2SR_RXAK (0x01) // received acknowledge - - - -/********************************************************************* -* -* Queued Serial Peripheral Interface (QSPI) Module -* -*********************************************************************/ -/* Derek - 21 Feb 2005 */ -/* change to the format used in I2C */ -/* Read/Write access macros for general use */ -#define MCF5282_QSPI_QMR MCF_IPSBAR + 0x0340 -#define MCF5282_QSPI_QDLYR MCF_IPSBAR + 0x0344 -#define MCF5282_QSPI_QWR MCF_IPSBAR + 0x0348 -#define MCF5282_QSPI_QIR MCF_IPSBAR + 0x034C -#define MCF5282_QSPI_QAR MCF_IPSBAR + 0x0350 -#define MCF5282_QSPI_QDR MCF_IPSBAR + 0x0354 -#define MCF5282_QSPI_QCR MCF_IPSBAR + 0x0354 - -/* Bit level definitions and macros */ -#define MCF5282_QSPI_QMR_MSTR (0x8000) -#define MCF5282_QSPI_QMR_DOHIE (0x4000) -#define MCF5282_QSPI_QMR_BITS_16 (0x0000) -#define MCF5282_QSPI_QMR_BITS_8 (0x2000) -#define MCF5282_QSPI_QMR_BITS_9 (0x2400) -#define MCF5282_QSPI_QMR_BITS_10 (0x2800) -#define MCF5282_QSPI_QMR_BITS_11 (0x2C00) -#define MCF5282_QSPI_QMR_BITS_12 (0x3000) -#define MCF5282_QSPI_QMR_BITS_13 (0x3400) -#define MCF5282_QSPI_QMR_BITS_14 (0x3800) -#define MCF5282_QSPI_QMR_BITS_15 (0x3C00) -#define MCF5282_QSPI_QMR_CPOL (0x0200) -#define MCF5282_QSPI_QMR_CPHA (0x0100) -#define MCF5282_QSPI_QMR_BAUD(x) (((x)&0x00FF)) - -#define MCF5282_QSPI_QDLYR_SPE (0x80) -#define MCF5282_QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8) -#define MCF5282_QSPI_QDLYR_DTL(x) (((x)&0x00FF)) - -#define MCF5282_QSPI_QWR_HALT (0x8000) -#define MCF5282_QSPI_QWR_WREN (0x4000) -#define MCF5282_QSPI_QWR_WRTO (0x2000) -#define MCF5282_QSPI_QWR_CSIV (0x1000) -#define MCF5282_QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8) -#define MCF5282_QSPI_QWR_CPTQP(x) (((x)&0x000F)<<4) -#define MCF5282_QSPI_QWR_NEWQP(x) (((x)&0x000F)) - -#define MCF5282_QSPI_QIR_WCEFB (0x8000) -#define MCF5282_QSPI_QIR_ABRTB (0x4000) -#define MCF5282_QSPI_QIR_ABRTL (0x1000) -#define MCF5282_QSPI_QIR_WCEFE (0x0800) -#define MCF5282_QSPI_QIR_ABRTE (0x0400) -#define MCF5282_QSPI_QIR_SPIFE (0x0100) -#define MCF5282_QSPI_QIR_WCEF (0x0008) -#define MCF5282_QSPI_QIR_ABRT (0x0004) -#define MCF5282_QSPI_QIR_SPIF (0x0001) - -#define MCF5282_QSPI_QAR_ADDR(x) (((x)&0x003F)) - -#define MCF5282_QSPI_QDR_COMMAND(x) (((x)&0xFF00)) -#define MCF5282_QSPI_QCR_DATA(x) (((x)&0x00FF)<<8) -#define MCF5282_QSPI_QCR_CONT (0x8000) -#define MCF5282_QSPI_QCR_BITSE (0x4000) -#define MCF5282_QSPI_QCR_DT (0x2000) -#define MCF5282_QSPI_QCR_DSCK (0x1000) -#define MCF5282_QSPI_QCR_CS (((x)&0x000F)<<8) - -/****************************************************************************/ -#endif /* m528xsim_h */ diff --git a/include/asm-m68knommu/m5307sim.h b/include/asm-m68knommu/m5307sim.h deleted file mode 100644 index 5886728..0000000 --- a/include/asm-m68knommu/m5307sim.h +++ /dev/null @@ -1,181 +0,0 @@ -/****************************************************************************/ - -/* - * m5307sim.h -- ColdFire 5307 System Integration Module support. - * - * (C) Copyright 1999, Moreton Bay Ventures Pty Ltd. - * (C) Copyright 1999, Lineo (www.lineo.com) - * - * Modified by David W. Miller for the MCF5307 Eval Board. - */ - -/****************************************************************************/ -#ifndef m5307sim_h -#define m5307sim_h -/****************************************************************************/ - -/* - * Define the 5307 SIM register set addresses. - */ -#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */ -#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w)*/ -#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ -#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ -#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ -#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ -#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ -#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ -#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ -#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ -#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */ -#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */ -#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */ -#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */ -#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */ -#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ -#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */ -#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */ -#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */ - -#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */ -#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */ -#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */ -#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */ -#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */ -#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */ - -#ifdef CONFIG_OLDMASK -#define MCFSIM_CSBAR 0x98 /* CS Base Address reg (r/w) */ -#define MCFSIM_CSBAMR 0x9c /* CS Base Mask reg (r/w) */ -#define MCFSIM_CSMR2 0x9e /* CS 2 Mask reg (r/w) */ -#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ -#define MCFSIM_CSMR3 0xaa /* CS 3 Mask reg (r/w) */ -#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ -#define MCFSIM_CSMR4 0xb6 /* CS 4 Mask reg (r/w) */ -#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */ -#define MCFSIM_CSMR5 0xc2 /* CS 5 Mask reg (r/w) */ -#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */ -#define MCFSIM_CSMR6 0xce /* CS 6 Mask reg (r/w) */ -#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */ -#define MCFSIM_CSMR7 0xda /* CS 7 Mask reg (r/w) */ -#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ -#else -#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */ -#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */ -#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ -#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */ -#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */ -#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ -#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */ -#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */ -#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */ -#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */ -#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */ -#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */ -#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */ -#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */ -#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */ -#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */ -#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */ -#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ -#endif /* CONFIG_OLDMASK */ - -#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */ -#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */ -#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ - -#define MCFSIM_PADDR 0x244 /* Parallel Direction (r/w) */ -#define MCFSIM_PADAT 0x248 /* Parallel Data (r/w) */ - - -/* Definition offset address for CS2-7 -- old mask 5307 */ - -#define MCF5307_CS2 (0x400000) -#define MCF5307_CS3 (0x600000) -#define MCF5307_CS4 (0x800000) -#define MCF5307_CS5 (0xA00000) -#define MCF5307_CS6 (0xC00000) -#define MCF5307_CS7 (0xE00000) - - -/* - * Some symbol defines for the above... - */ -#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ -#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */ -#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */ -#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */ -#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */ -#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */ -#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ -#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ -#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ - -#if defined(CONFIG_M5307) -#define MCFSIM_IMR_MASKALL 0x3fffe /* All SIM intr sources */ -#endif - -/* - * Macro to set IMR register. It is 32 bits on the 5307. - */ -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) - - -/* - * Some symbol defines for the Parallel Port Pin Assignment Register - */ -#define MCFSIM_PAR_DREQ0 0x40 /* Set to select DREQ0 input */ - /* Clear to select par I/O */ -#define MCFSIM_PAR_DREQ1 0x20 /* Select DREQ1 input */ - /* Clear to select par I/O */ - -/* - * Defines for the IRQPAR Register - */ -#define IRQ5_LEVEL4 0x80 -#define IRQ3_LEVEL6 0x40 -#define IRQ1_LEVEL2 0x20 - - -/* - * Define the Cache register flags. - */ -#define CACR_EC (1<<31) -#define CACR_ESB (1<<29) -#define CACR_DPI (1<<28) -#define CACR_HLCK (1<<27) -#define CACR_CINVA (1<<24) -#define CACR_DNFB (1<<10) -#define CACR_DCM_WTHRU (0<<8) -#define CACR_DCM_WBACK (1<<8) -#define CACR_DCM_OFF_PRE (2<<8) -#define CACR_DCM_OFF_IMP (3<<8) -#define CACR_DW (1<<5) - -#define ACR_BASE_POS 24 -#define ACR_MASK_POS 16 -#define ACR_ENABLE (1<<15) -#define ACR_USER (0<<13) -#define ACR_SUPER (1<<13) -#define ACR_ANY (2<<13) -#define ACR_CM_WTHRU (0<<5) -#define ACR_CM_WBACK (1<<5) -#define ACR_CM_OFF_PRE (2<<5) -#define ACR_CM_OFF_IMP (3<<5) -#define ACR_WPROTECT (1<<2) - -/****************************************************************************/ -#endif /* m5307sim_h */ diff --git a/include/asm-m68knommu/m532xsim.h b/include/asm-m68knommu/m532xsim.h deleted file mode 100644 index 1835fd2..0000000 --- a/include/asm-m68knommu/m532xsim.h +++ /dev/null @@ -1,2238 +0,0 @@ -/****************************************************************************/ - -/* - * m532xsim.h -- ColdFire 5329 registers - */ - -/****************************************************************************/ -#ifndef m532xsim_h -#define m532xsim_h -/****************************************************************************/ - -#define MCF_REG32(x) (*(volatile unsigned long *)(x)) -#define MCF_REG16(x) (*(volatile unsigned short *)(x)) -#define MCF_REG08(x) (*(volatile unsigned char *)(x)) - -#define MCFINT_VECBASE 64 -#define MCFINT_UART0 26 /* Interrupt number for UART0 */ -#define MCFINT_UART1 27 /* Interrupt number for UART1 */ - -#define MCF_WTM_WCR MCF_REG16(0xFC098000) - -/* - * Define the 532x SIM register set addresses. - */ -#define MCFSIM_IPRL 0xFC048004 -#define MCFSIM_IPRH 0xFC048000 -#define MCFSIM_IPR MCFSIM_IPRL -#define MCFSIM_IMRL 0xFC04800C -#define MCFSIM_IMRH 0xFC048008 -#define MCFSIM_IMR MCFSIM_IMRL -#define MCFSIM_ICR0 0xFC048040 -#define MCFSIM_ICR1 0xFC048041 -#define MCFSIM_ICR2 0xFC048042 -#define MCFSIM_ICR3 0xFC048043 -#define MCFSIM_ICR4 0xFC048044 -#define MCFSIM_ICR5 0xFC048045 -#define MCFSIM_ICR6 0xFC048046 -#define MCFSIM_ICR7 0xFC048047 -#define MCFSIM_ICR8 0xFC048048 -#define MCFSIM_ICR9 0xFC048049 -#define MCFSIM_ICR10 0xFC04804A -#define MCFSIM_ICR11 0xFC04804B - -/* - * Some symbol defines for the above... - */ -#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ -#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */ -#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */ -#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */ -#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */ -#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */ -#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ -#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ -#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ - - -#define MCFSIM_IMR_MASKALL 0xFFFFFFFF /* All SIM intr sources */ - -#define MCFSIM_IMR_SIMR0 0xFC04801C -#define MCFSIM_IMR_SIMR1 0xFC04C01C -#define MCFSIM_IMR_CIMR0 0xFC04801D -#define MCFSIM_IMR_CIMR1 0xFC04C01D - -#define MCFSIM_ICR_TIMER1 (0xFC048040+32) -#define MCFSIM_ICR_TIMER2 (0xFC048040+33) - - -/* - * Macro to set IMR register. It is 32 bits on the 5307. - */ -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) - -#define mcf_getiprl() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRL)) - -#define mcf_getiprh() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRH)) - - -#define mcf_enable_irq0(irq) \ - *((volatile unsigned char*) (MCFSIM_IMR_CIMR0)) = (irq); - -#define mcf_enable_irq1(irq) \ - *((volatile unsigned char*) (MCFSIM_IMR_CIMR1)) = (irq); - -#define mcf_disable_irq0(irq) \ - *((volatile unsigned char*) (MCFSIM_IMR_SIMR0)) = (irq); - -#define mcf_disable_irq1(irq) \ - *((volatile unsigned char*) (MCFSIM_IMR_SIMR1)) = (irq); - -/* - * Define the Cache register flags. - */ -#define CACR_EC (1<<31) -#define CACR_ESB (1<<29) -#define CACR_DPI (1<<28) -#define CACR_HLCK (1<<27) -#define CACR_CINVA (1<<24) -#define CACR_DNFB (1<<10) -#define CACR_DCM_WTHRU (0<<8) -#define CACR_DCM_WBACK (1<<8) -#define CACR_DCM_OFF_PRE (2<<8) -#define CACR_DCM_OFF_IMP (3<<8) -#define CACR_DW (1<<5) - -#define ACR_BASE_POS 24 -#define ACR_MASK_POS 16 -#define ACR_ENABLE (1<<15) -#define ACR_USER (0<<13) -#define ACR_SUPER (1<<13) -#define ACR_ANY (2<<13) -#define ACR_CM_WTHRU (0<<5) -#define ACR_CM_WBACK (1<<5) -#define ACR_CM_OFF_PRE (2<<5) -#define ACR_CM_OFF_IMP (3<<5) -#define ACR_WPROTECT (1<<2) - -/********************************************************************* - * - * Inter-IC (I2C) Module - * - *********************************************************************/ - -/* Read/Write access macros for general use */ -#define MCF532x_I2C_I2ADR (volatile u8 *) (0xFC058000) // Address -#define MCF532x_I2C_I2FDR (volatile u8 *) (0xFC058004) // Freq Divider -#define MCF532x_I2C_I2CR (volatile u8 *) (0xFC058008) // Control -#define MCF532x_I2C_I2SR (volatile u8 *) (0xFC05800C) // Status -#define MCF532x_I2C_I2DR (volatile u8 *) (0xFC058010) // Data I/O - -/* Bit level definitions and macros */ -#define MCF532x_I2C_I2ADR_ADDR(x) (((x)&0x7F)<<0x01) - -#define MCF532x_I2C_I2FDR_IC(x) (((x)&0x3F)) - -#define MCF532x_I2C_I2CR_IEN (0x80) // I2C enable -#define MCF532x_I2C_I2CR_IIEN (0x40) // interrupt enable -#define MCF532x_I2C_I2CR_MSTA (0x20) // master/slave mode -#define MCF532x_I2C_I2CR_MTX (0x10) // transmit/receive mode -#define MCF532x_I2C_I2CR_TXAK (0x08) // transmit acknowledge enable -#define MCF532x_I2C_I2CR_RSTA (0x04) // repeat start - -#define MCF532x_I2C_I2SR_ICF (0x80) // data transfer bit -#define MCF532x_I2C_I2SR_IAAS (0x40) // I2C addressed as a slave -#define MCF532x_I2C_I2SR_IBB (0x20) // I2C bus busy -#define MCF532x_I2C_I2SR_IAL (0x10) // aribitration lost -#define MCF532x_I2C_I2SR_SRW (0x04) // slave read/write -#define MCF532x_I2C_I2SR_IIF (0x02) // I2C interrupt -#define MCF532x_I2C_I2SR_RXAK (0x01) // received acknowledge - -#define MCF532x_PAR_FECI2C (volatile u8 *) (0xFC0A4053) - - -/* - * The M5329EVB board needs a help getting its devices initialized - * at kernel start time if dBUG doesn't set it up (for example - * it is not used), so we need to do it manually. - */ -#ifdef __ASSEMBLER__ -.macro m5329EVB_setup - movel #0xFC098000, %a7 - movel #0x0, (%a7) -#define CORE_SRAM 0x80000000 -#define CORE_SRAM_SIZE 0x8000 - movel #CORE_SRAM, %d0 - addl #0x221, %d0 - movec %d0,%RAMBAR1 - movel #CORE_SRAM, %sp - addl #CORE_SRAM_SIZE, %sp - jsr sysinit -.endm -#define PLATFORM_SETUP m5329EVB_setup - -#endif /* __ASSEMBLER__ */ - -/********************************************************************* - * - * Chip Configuration Module (CCM) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_CCM_CCR MCF_REG16(0xFC0A0004) -#define MCF_CCM_RCON MCF_REG16(0xFC0A0008) -#define MCF_CCM_CIR MCF_REG16(0xFC0A000A) -#define MCF_CCM_MISCCR MCF_REG16(0xFC0A0010) -#define MCF_CCM_CDR MCF_REG16(0xFC0A0012) -#define MCF_CCM_UHCSR MCF_REG16(0xFC0A0014) -#define MCF_CCM_UOCSR MCF_REG16(0xFC0A0016) - -/* Bit definitions and macros for MCF_CCM_CCR */ -#define MCF_CCM_CCR_RESERVED (0x0001) -#define MCF_CCM_CCR_PLL_MODE (0x0003) -#define MCF_CCM_CCR_OSC_MODE (0x0005) -#define MCF_CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001) -#define MCF_CCM_CCR_LOAD (0x0021) -#define MCF_CCM_CCR_LIMP (0x0041) -#define MCF_CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001) - -/* Bit definitions and macros for MCF_CCM_RCON */ -#define MCF_CCM_RCON_RESERVED (0x0001) -#define MCF_CCM_RCON_PLL_MODE (0x0003) -#define MCF_CCM_RCON_OSC_MODE (0x0005) -#define MCF_CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001) -#define MCF_CCM_RCON_LOAD (0x0021) -#define MCF_CCM_RCON_LIMP (0x0041) -#define MCF_CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001) - -/* Bit definitions and macros for MCF_CCM_CIR */ -#define MCF_CCM_CIR_PRN(x) (((x)&0x003F)<<0) -#define MCF_CCM_CIR_PIN(x) (((x)&0x03FF)<<6) - -/* Bit definitions and macros for MCF_CCM_MISCCR */ -#define MCF_CCM_MISCCR_USBSRC (0x0001) -#define MCF_CCM_MISCCR_USBDIV (0x0002) -#define MCF_CCM_MISCCR_SSI_SRC (0x0010) -#define MCF_CCM_MISCCR_TIM_DMA (0x0020) -#define MCF_CCM_MISCCR_SSI_PUS (0x0040) -#define MCF_CCM_MISCCR_SSI_PUE (0x0080) -#define MCF_CCM_MISCCR_LCD_CHEN (0x0100) -#define MCF_CCM_MISCCR_LIMP (0x1000) -#define MCF_CCM_MISCCR_PLL_LOCK (0x2000) - -/* Bit definitions and macros for MCF_CCM_CDR */ -#define MCF_CCM_CDR_SSIDIV(x) (((x)&0x000F)<<0) -#define MCF_CCM_CDR_LPDIV(x) (((x)&0x000F)<<8) - -/* Bit definitions and macros for MCF_CCM_UHCSR */ -#define MCF_CCM_UHCSR_XPDE (0x0001) -#define MCF_CCM_UHCSR_UHMIE (0x0002) -#define MCF_CCM_UHCSR_WKUP (0x0004) -#define MCF_CCM_UHCSR_PORTIND(x) (((x)&0x0003)<<14) - -/* Bit definitions and macros for MCF_CCM_UOCSR */ -#define MCF_CCM_UOCSR_XPDE (0x0001) -#define MCF_CCM_UOCSR_UOMIE (0x0002) -#define MCF_CCM_UOCSR_WKUP (0x0004) -#define MCF_CCM_UOCSR_PWRFLT (0x0008) -#define MCF_CCM_UOCSR_SEND (0x0010) -#define MCF_CCM_UOCSR_VVLD (0x0020) -#define MCF_CCM_UOCSR_BVLD (0x0040) -#define MCF_CCM_UOCSR_AVLD (0x0080) -#define MCF_CCM_UOCSR_DPPU (0x0100) -#define MCF_CCM_UOCSR_DCR_VBUS (0x0200) -#define MCF_CCM_UOCSR_CRG_VBUS (0x0400) -#define MCF_CCM_UOCSR_DRV_VBUS (0x0800) -#define MCF_CCM_UOCSR_DMPD (0x1000) -#define MCF_CCM_UOCSR_DPPD (0x2000) -#define MCF_CCM_UOCSR_PORTIND(x) (((x)&0x0003)<<14) - -/********************************************************************* - * - * DMA Timers (DTIM) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_DTIM0_DTMR MCF_REG16(0xFC070000) -#define MCF_DTIM0_DTXMR MCF_REG08(0xFC070002) -#define MCF_DTIM0_DTER MCF_REG08(0xFC070003) -#define MCF_DTIM0_DTRR MCF_REG32(0xFC070004) -#define MCF_DTIM0_DTCR MCF_REG32(0xFC070008) -#define MCF_DTIM0_DTCN MCF_REG32(0xFC07000C) -#define MCF_DTIM1_DTMR MCF_REG16(0xFC074000) -#define MCF_DTIM1_DTXMR MCF_REG08(0xFC074002) -#define MCF_DTIM1_DTER MCF_REG08(0xFC074003) -#define MCF_DTIM1_DTRR MCF_REG32(0xFC074004) -#define MCF_DTIM1_DTCR MCF_REG32(0xFC074008) -#define MCF_DTIM1_DTCN MCF_REG32(0xFC07400C) -#define MCF_DTIM2_DTMR MCF_REG16(0xFC078000) -#define MCF_DTIM2_DTXMR MCF_REG08(0xFC078002) -#define MCF_DTIM2_DTER MCF_REG08(0xFC078003) -#define MCF_DTIM2_DTRR MCF_REG32(0xFC078004) -#define MCF_DTIM2_DTCR MCF_REG32(0xFC078008) -#define MCF_DTIM2_DTCN MCF_REG32(0xFC07800C) -#define MCF_DTIM3_DTMR MCF_REG16(0xFC07C000) -#define MCF_DTIM3_DTXMR MCF_REG08(0xFC07C002) -#define MCF_DTIM3_DTER MCF_REG08(0xFC07C003) -#define MCF_DTIM3_DTRR MCF_REG32(0xFC07C004) -#define MCF_DTIM3_DTCR MCF_REG32(0xFC07C008) -#define MCF_DTIM3_DTCN MCF_REG32(0xFC07C00C) -#define MCF_DTIM_DTMR(x) MCF_REG16(0xFC070000+((x)*0x4000)) -#define MCF_DTIM_DTXMR(x) MCF_REG08(0xFC070002+((x)*0x4000)) -#define MCF_DTIM_DTER(x) MCF_REG08(0xFC070003+((x)*0x4000)) -#define MCF_DTIM_DTRR(x) MCF_REG32(0xFC070004+((x)*0x4000)) -#define MCF_DTIM_DTCR(x) MCF_REG32(0xFC070008+((x)*0x4000)) -#define MCF_DTIM_DTCN(x) MCF_REG32(0xFC07000C+((x)*0x4000)) - -/* Bit definitions and macros for MCF_DTIM_DTMR */ -#define MCF_DTIM_DTMR_RST (0x0001) -#define MCF_DTIM_DTMR_CLK(x) (((x)&0x0003)<<1) -#define MCF_DTIM_DTMR_FRR (0x0008) -#define MCF_DTIM_DTMR_ORRI (0x0010) -#define MCF_DTIM_DTMR_OM (0x0020) -#define MCF_DTIM_DTMR_CE(x) (((x)&0x0003)<<6) -#define MCF_DTIM_DTMR_PS(x) (((x)&0x00FF)<<8) -#define MCF_DTIM_DTMR_CE_ANY (0x00C0) -#define MCF_DTIM_DTMR_CE_FALL (0x0080) -#define MCF_DTIM_DTMR_CE_RISE (0x0040) -#define MCF_DTIM_DTMR_CE_NONE (0x0000) -#define MCF_DTIM_DTMR_CLK_DTIN (0x0006) -#define MCF_DTIM_DTMR_CLK_DIV16 (0x0004) -#define MCF_DTIM_DTMR_CLK_DIV1 (0x0002) -#define MCF_DTIM_DTMR_CLK_STOP (0x0000) - -/* Bit definitions and macros for MCF_DTIM_DTXMR */ -#define MCF_DTIM_DTXMR_MODE16 (0x01) -#define MCF_DTIM_DTXMR_DMAEN (0x80) - -/* Bit definitions and macros for MCF_DTIM_DTER */ -#define MCF_DTIM_DTER_CAP (0x01) -#define MCF_DTIM_DTER_REF (0x02) - -/* Bit definitions and macros for MCF_DTIM_DTRR */ -#define MCF_DTIM_DTRR_REF(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DTIM_DTCR */ -#define MCF_DTIM_DTCR_CAP(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_DTIM_DTCN */ -#define MCF_DTIM_DTCN_CNT(x) (((x)&0xFFFFFFFF)<<0) - -/********************************************************************* - * - * FlexBus Chip Selects (FBCS) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_FBCS0_CSAR MCF_REG32(0xFC008000) -#define MCF_FBCS0_CSMR MCF_REG32(0xFC008004) -#define MCF_FBCS0_CSCR MCF_REG32(0xFC008008) -#define MCF_FBCS1_CSAR MCF_REG32(0xFC00800C) -#define MCF_FBCS1_CSMR MCF_REG32(0xFC008010) -#define MCF_FBCS1_CSCR MCF_REG32(0xFC008014) -#define MCF_FBCS2_CSAR MCF_REG32(0xFC008018) -#define MCF_FBCS2_CSMR MCF_REG32(0xFC00801C) -#define MCF_FBCS2_CSCR MCF_REG32(0xFC008020) -#define MCF_FBCS3_CSAR MCF_REG32(0xFC008024) -#define MCF_FBCS3_CSMR MCF_REG32(0xFC008028) -#define MCF_FBCS3_CSCR MCF_REG32(0xFC00802C) -#define MCF_FBCS4_CSAR MCF_REG32(0xFC008030) -#define MCF_FBCS4_CSMR MCF_REG32(0xFC008034) -#define MCF_FBCS4_CSCR MCF_REG32(0xFC008038) -#define MCF_FBCS5_CSAR MCF_REG32(0xFC00803C) -#define MCF_FBCS5_CSMR MCF_REG32(0xFC008040) -#define MCF_FBCS5_CSCR MCF_REG32(0xFC008044) -#define MCF_FBCS_CSAR(x) MCF_REG32(0xFC008000+((x)*0x00C)) -#define MCF_FBCS_CSMR(x) MCF_REG32(0xFC008004+((x)*0x00C)) -#define MCF_FBCS_CSCR(x) MCF_REG32(0xFC008008+((x)*0x00C)) - -/* Bit definitions and macros for MCF_FBCS_CSAR */ -#define MCF_FBCS_CSAR_BA(x) ((x)&0xFFFF0000) - -/* Bit definitions and macros for MCF_FBCS_CSMR */ -#define MCF_FBCS_CSMR_V (0x00000001) -#define MCF_FBCS_CSMR_WP (0x00000100) -#define MCF_FBCS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) -#define MCF_FBCS_CSMR_BAM_4G (0xFFFF0000) -#define MCF_FBCS_CSMR_BAM_2G (0x7FFF0000) -#define MCF_FBCS_CSMR_BAM_1G (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_1024M (0x3FFF0000) -#define MCF_FBCS_CSMR_BAM_512M (0x1FFF0000) -#define MCF_FBCS_CSMR_BAM_256M (0x0FFF0000) -#define MCF_FBCS_CSMR_BAM_128M (0x07FF0000) -#define MCF_FBCS_CSMR_BAM_64M (0x03FF0000) -#define MCF_FBCS_CSMR_BAM_32M (0x01FF0000) -#define MCF_FBCS_CSMR_BAM_16M (0x00FF0000) -#define MCF_FBCS_CSMR_BAM_8M (0x007F0000) -#define MCF_FBCS_CSMR_BAM_4M (0x003F0000) -#define MCF_FBCS_CSMR_BAM_2M (0x001F0000) -#define MCF_FBCS_CSMR_BAM_1M (0x000F0000) -#define MCF_FBCS_CSMR_BAM_1024K (0x000F0000) -#define MCF_FBCS_CSMR_BAM_512K (0x00070000) -#define MCF_FBCS_CSMR_BAM_256K (0x00030000) -#define MCF_FBCS_CSMR_BAM_128K (0x00010000) -#define MCF_FBCS_CSMR_BAM_64K (0x00000000) - -/* Bit definitions and macros for MCF_FBCS_CSCR */ -#define MCF_FBCS_CSCR_BSTW (0x00000008) -#define MCF_FBCS_CSCR_BSTR (0x00000010) -#define MCF_FBCS_CSCR_BEM (0x00000020) -#define MCF_FBCS_CSCR_PS(x) (((x)&0x00000003)<<6) -#define MCF_FBCS_CSCR_AA (0x00000100) -#define MCF_FBCS_CSCR_SBM (0x00000200) -#define MCF_FBCS_CSCR_WS(x) (((x)&0x0000003F)<<10) -#define MCF_FBCS_CSCR_WRAH(x) (((x)&0x00000003)<<16) -#define MCF_FBCS_CSCR_RDAH(x) (((x)&0x00000003)<<18) -#define MCF_FBCS_CSCR_ASET(x) (((x)&0x00000003)<<20) -#define MCF_FBCS_CSCR_SWSEN (0x00800000) -#define MCF_FBCS_CSCR_SWS(x) (((x)&0x0000003F)<<26) -#define MCF_FBCS_CSCR_PS_8 (0x0040) -#define MCF_FBCS_CSCR_PS_16 (0x0080) -#define MCF_FBCS_CSCR_PS_32 (0x0000) - -/********************************************************************* - * - * General Purpose I/O (GPIO) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_GPIO_PODR_FECH MCF_REG08(0xFC0A4000) -#define MCF_GPIO_PODR_FECL MCF_REG08(0xFC0A4001) -#define MCF_GPIO_PODR_SSI MCF_REG08(0xFC0A4002) -#define MCF_GPIO_PODR_BUSCTL MCF_REG08(0xFC0A4003) -#define MCF_GPIO_PODR_BE MCF_REG08(0xFC0A4004) -#define MCF_GPIO_PODR_CS MCF_REG08(0xFC0A4005) -#define MCF_GPIO_PODR_PWM MCF_REG08(0xFC0A4006) -#define MCF_GPIO_PODR_FECI2C MCF_REG08(0xFC0A4007) -#define MCF_GPIO_PODR_UART MCF_REG08(0xFC0A4009) -#define MCF_GPIO_PODR_QSPI MCF_REG08(0xFC0A400A) -#define MCF_GPIO_PODR_TIMER MCF_REG08(0xFC0A400B) -#define MCF_GPIO_PODR_LCDDATAH MCF_REG08(0xFC0A400D) -#define MCF_GPIO_PODR_LCDDATAM MCF_REG08(0xFC0A400E) -#define MCF_GPIO_PODR_LCDDATAL MCF_REG08(0xFC0A400F) -#define MCF_GPIO_PODR_LCDCTLH MCF_REG08(0xFC0A4010) -#define MCF_GPIO_PODR_LCDCTLL MCF_REG08(0xFC0A4011) -#define MCF_GPIO_PDDR_FECH MCF_REG08(0xFC0A4014) -#define MCF_GPIO_PDDR_FECL MCF_REG08(0xFC0A4015) -#define MCF_GPIO_PDDR_SSI MCF_REG08(0xFC0A4016) -#define MCF_GPIO_PDDR_BUSCTL MCF_REG08(0xFC0A4017) -#define MCF_GPIO_PDDR_BE MCF_REG08(0xFC0A4018) -#define MCF_GPIO_PDDR_CS MCF_REG08(0xFC0A4019) -#define MCF_GPIO_PDDR_PWM MCF_REG08(0xFC0A401A) -#define MCF_GPIO_PDDR_FECI2C MCF_REG08(0xFC0A401B) -#define MCF_GPIO_PDDR_UART MCF_REG08(0xFC0A401C) -#define MCF_GPIO_PDDR_QSPI MCF_REG08(0xFC0A401E) -#define MCF_GPIO_PDDR_TIMER MCF_REG08(0xFC0A401F) -#define MCF_GPIO_PDDR_LCDDATAH MCF_REG08(0xFC0A4021) -#define MCF_GPIO_PDDR_LCDDATAM MCF_REG08(0xFC0A4022) -#define MCF_GPIO_PDDR_LCDDATAL MCF_REG08(0xFC0A4023) -#define MCF_GPIO_PDDR_LCDCTLH MCF_REG08(0xFC0A4024) -#define MCF_GPIO_PDDR_LCDCTLL MCF_REG08(0xFC0A4025) -#define MCF_GPIO_PPDSDR_FECH MCF_REG08(0xFC0A4028) -#define MCF_GPIO_PPDSDR_FECL MCF_REG08(0xFC0A4029) -#define MCF_GPIO_PPDSDR_SSI MCF_REG08(0xFC0A402A) -#define MCF_GPIO_PPDSDR_BUSCTL MCF_REG08(0xFC0A402B) -#define MCF_GPIO_PPDSDR_BE MCF_REG08(0xFC0A402C) -#define MCF_GPIO_PPDSDR_CS MCF_REG08(0xFC0A402D) -#define MCF_GPIO_PPDSDR_PWM MCF_REG08(0xFC0A402E) -#define MCF_GPIO_PPDSDR_FECI2C MCF_REG08(0xFC0A402F) -#define MCF_GPIO_PPDSDR_UART MCF_REG08(0xFC0A4031) -#define MCF_GPIO_PPDSDR_QSPI MCF_REG08(0xFC0A4032) -#define MCF_GPIO_PPDSDR_TIMER MCF_REG08(0xFC0A4033) -#define MCF_GPIO_PPDSDR_LCDDATAH MCF_REG08(0xFC0A4035) -#define MCF_GPIO_PPDSDR_LCDDATAM MCF_REG08(0xFC0A4036) -#define MCF_GPIO_PPDSDR_LCDDATAL MCF_REG08(0xFC0A4037) -#define MCF_GPIO_PPDSDR_LCDCTLH MCF_REG08(0xFC0A4038) -#define MCF_GPIO_PPDSDR_LCDCTLL MCF_REG08(0xFC0A4039) -#define MCF_GPIO_PCLRR_FECH MCF_REG08(0xFC0A403C) -#define MCF_GPIO_PCLRR_FECL MCF_REG08(0xFC0A403D) -#define MCF_GPIO_PCLRR_SSI MCF_REG08(0xFC0A403E) -#define MCF_GPIO_PCLRR_BUSCTL MCF_REG08(0xFC0A403F) -#define MCF_GPIO_PCLRR_BE MCF_REG08(0xFC0A4040) -#define MCF_GPIO_PCLRR_CS MCF_REG08(0xFC0A4041) -#define MCF_GPIO_PCLRR_PWM MCF_REG08(0xFC0A4042) -#define MCF_GPIO_PCLRR_FECI2C MCF_REG08(0xFC0A4043) -#define MCF_GPIO_PCLRR_UART MCF_REG08(0xFC0A4045) -#define MCF_GPIO_PCLRR_QSPI MCF_REG08(0xFC0A4046) -#define MCF_GPIO_PCLRR_TIMER MCF_REG08(0xFC0A4047) -#define MCF_GPIO_PCLRR_LCDDATAH MCF_REG08(0xFC0A4049) -#define MCF_GPIO_PCLRR_LCDDATAM MCF_REG08(0xFC0A404A) -#define MCF_GPIO_PCLRR_LCDDATAL MCF_REG08(0xFC0A404B) -#define MCF_GPIO_PCLRR_LCDCTLH MCF_REG08(0xFC0A404C) -#define MCF_GPIO_PCLRR_LCDCTLL MCF_REG08(0xFC0A404D) -#define MCF_GPIO_PAR_FEC MCF_REG08(0xFC0A4050) -#define MCF_GPIO_PAR_PWM MCF_REG08(0xFC0A4051) -#define MCF_GPIO_PAR_BUSCTL MCF_REG08(0xFC0A4052) -#define MCF_GPIO_PAR_FECI2C MCF_REG08(0xFC0A4053) -#define MCF_GPIO_PAR_BE MCF_REG08(0xFC0A4054) -#define MCF_GPIO_PAR_CS MCF_REG08(0xFC0A4055) -#define MCF_GPIO_PAR_SSI MCF_REG16(0xFC0A4056) -#define MCF_GPIO_PAR_UART MCF_REG16(0xFC0A4058) -#define MCF_GPIO_PAR_QSPI MCF_REG16(0xFC0A405A) -#define MCF_GPIO_PAR_TIMER MCF_REG08(0xFC0A405C) -#define MCF_GPIO_PAR_LCDDATA MCF_REG08(0xFC0A405D) -#define MCF_GPIO_PAR_LCDCTL MCF_REG16(0xFC0A405E) -#define MCF_GPIO_PAR_IRQ MCF_REG16(0xFC0A4060) -#define MCF_GPIO_MSCR_FLEXBUS MCF_REG08(0xFC0A4064) -#define MCF_GPIO_MSCR_SDRAM MCF_REG08(0xFC0A4065) -#define MCF_GPIO_DSCR_I2C MCF_REG08(0xFC0A4068) -#define MCF_GPIO_DSCR_PWM MCF_REG08(0xFC0A4069) -#define MCF_GPIO_DSCR_FEC MCF_REG08(0xFC0A406A) -#define MCF_GPIO_DSCR_UART MCF_REG08(0xFC0A406B) -#define MCF_GPIO_DSCR_QSPI MCF_REG08(0xFC0A406C) -#define MCF_GPIO_DSCR_TIMER MCF_REG08(0xFC0A406D) -#define MCF_GPIO_DSCR_SSI MCF_REG08(0xFC0A406E) -#define MCF_GPIO_DSCR_LCD MCF_REG08(0xFC0A406F) -#define MCF_GPIO_DSCR_DEBUG MCF_REG08(0xFC0A4070) -#define MCF_GPIO_DSCR_CLKRST MCF_REG08(0xFC0A4071) -#define MCF_GPIO_DSCR_IRQ MCF_REG08(0xFC0A4072) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECH */ -#define MCF_GPIO_PODR_FECH_PODR_FECH0 (0x01) -#define MCF_GPIO_PODR_FECH_PODR_FECH1 (0x02) -#define MCF_GPIO_PODR_FECH_PODR_FECH2 (0x04) -#define MCF_GPIO_PODR_FECH_PODR_FECH3 (0x08) -#define MCF_GPIO_PODR_FECH_PODR_FECH4 (0x10) -#define MCF_GPIO_PODR_FECH_PODR_FECH5 (0x20) -#define MCF_GPIO_PODR_FECH_PODR_FECH6 (0x40) -#define MCF_GPIO_PODR_FECH_PODR_FECH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECL */ -#define MCF_GPIO_PODR_FECL_PODR_FECL0 (0x01) -#define MCF_GPIO_PODR_FECL_PODR_FECL1 (0x02) -#define MCF_GPIO_PODR_FECL_PODR_FECL2 (0x04) -#define MCF_GPIO_PODR_FECL_PODR_FECL3 (0x08) -#define MCF_GPIO_PODR_FECL_PODR_FECL4 (0x10) -#define MCF_GPIO_PODR_FECL_PODR_FECL5 (0x20) -#define MCF_GPIO_PODR_FECL_PODR_FECL6 (0x40) -#define MCF_GPIO_PODR_FECL_PODR_FECL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_SSI */ -#define MCF_GPIO_PODR_SSI_PODR_SSI0 (0x01) -#define MCF_GPIO_PODR_SSI_PODR_SSI1 (0x02) -#define MCF_GPIO_PODR_SSI_PODR_SSI2 (0x04) -#define MCF_GPIO_PODR_SSI_PODR_SSI3 (0x08) -#define MCF_GPIO_PODR_SSI_PODR_SSI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */ -#define MCF_GPIO_PODR_BUSCTL_POSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1 (0x02) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2 (0x04) -#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_BE */ -#define MCF_GPIO_PODR_BE_PODR_BE0 (0x01) -#define MCF_GPIO_PODR_BE_PODR_BE1 (0x02) -#define MCF_GPIO_PODR_BE_PODR_BE2 (0x04) -#define MCF_GPIO_PODR_BE_PODR_BE3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_CS */ -#define MCF_GPIO_PODR_CS_PODR_CS1 (0x02) -#define MCF_GPIO_PODR_CS_PODR_CS2 (0x04) -#define MCF_GPIO_PODR_CS_PODR_CS3 (0x08) -#define MCF_GPIO_PODR_CS_PODR_CS4 (0x10) -#define MCF_GPIO_PODR_CS_PODR_CS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_PWM */ -#define MCF_GPIO_PODR_PWM_PODR_PWM2 (0x04) -#define MCF_GPIO_PODR_PWM_PODR_PWM3 (0x08) -#define MCF_GPIO_PODR_PWM_PODR_PWM4 (0x10) -#define MCF_GPIO_PODR_PWM_PODR_PWM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */ -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0 (0x01) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1 (0x02) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2 (0x04) -#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_UART */ -#define MCF_GPIO_PODR_UART_PODR_UART0 (0x01) -#define MCF_GPIO_PODR_UART_PODR_UART1 (0x02) -#define MCF_GPIO_PODR_UART_PODR_UART2 (0x04) -#define MCF_GPIO_PODR_UART_PODR_UART3 (0x08) -#define MCF_GPIO_PODR_UART_PODR_UART4 (0x10) -#define MCF_GPIO_PODR_UART_PODR_UART5 (0x20) -#define MCF_GPIO_PODR_UART_PODR_UART6 (0x40) -#define MCF_GPIO_PODR_UART_PODR_UART7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */ -#define MCF_GPIO_PODR_QSPI_PODR_QSPI0 (0x01) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI1 (0x02) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI2 (0x04) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI3 (0x08) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI4 (0x10) -#define MCF_GPIO_PODR_QSPI_PODR_QSPI5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */ -#define MCF_GPIO_PODR_TIMER_PODR_TIMER0 (0x01) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER1 (0x02) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER2 (0x04) -#define MCF_GPIO_PODR_TIMER_PODR_TIMER3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAH */ -#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH0 (0x01) -#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAM */ -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM0 (0x01) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM1 (0x02) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM2 (0x04) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM3 (0x08) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM4 (0x10) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM5 (0x20) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM6 (0x40) -#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAL */ -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL0 (0x01) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL1 (0x02) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL2 (0x04) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL3 (0x08) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL4 (0x10) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL5 (0x20) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL6 (0x40) -#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PODR_LCDCTLH */ -#define MCF_GPIO_PODR_LCDCTLH_PODR_LCDCTLH0 (0x01) - -/* Bit definitions and macros for MCF_GPIO_PODR_LCDCTLL */ -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL0 (0x01) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL1 (0x02) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL2 (0x04) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL3 (0x08) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL4 (0x10) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL5 (0x20) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL6 (0x40) -#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECH */ -#define MCF_GPIO_PDDR_FECH_PDDR_FECH0 (0x01) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH1 (0x02) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH2 (0x04) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH3 (0x08) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH4 (0x10) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH5 (0x20) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH6 (0x40) -#define MCF_GPIO_PDDR_FECH_PDDR_FECH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECL */ -#define MCF_GPIO_PDDR_FECL_PDDR_FECL0 (0x01) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL1 (0x02) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL2 (0x04) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL3 (0x08) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL4 (0x10) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL5 (0x20) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL6 (0x40) -#define MCF_GPIO_PDDR_FECL_PDDR_FECL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_SSI */ -#define MCF_GPIO_PDDR_SSI_PDDR_SSI0 (0x01) -#define MCF_GPIO_PDDR_SSI_PDDR_SSI1 (0x02) -#define MCF_GPIO_PDDR_SSI_PDDR_SSI2 (0x04) -#define MCF_GPIO_PDDR_SSI_PDDR_SSI3 (0x08) -#define MCF_GPIO_PDDR_SSI_PDDR_SSI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */ -#define MCF_GPIO_PDDR_BUSCTL_POSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1 (0x02) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2 (0x04) -#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_BE */ -#define MCF_GPIO_PDDR_BE_PDDR_BE0 (0x01) -#define MCF_GPIO_PDDR_BE_PDDR_BE1 (0x02) -#define MCF_GPIO_PDDR_BE_PDDR_BE2 (0x04) -#define MCF_GPIO_PDDR_BE_PDDR_BE3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_CS */ -#define MCF_GPIO_PDDR_CS_PDDR_CS1 (0x02) -#define MCF_GPIO_PDDR_CS_PDDR_CS2 (0x04) -#define MCF_GPIO_PDDR_CS_PDDR_CS3 (0x08) -#define MCF_GPIO_PDDR_CS_PDDR_CS4 (0x10) -#define MCF_GPIO_PDDR_CS_PDDR_CS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_PWM */ -#define MCF_GPIO_PDDR_PWM_PDDR_PWM2 (0x04) -#define MCF_GPIO_PDDR_PWM_PDDR_PWM3 (0x08) -#define MCF_GPIO_PDDR_PWM_PDDR_PWM4 (0x10) -#define MCF_GPIO_PDDR_PWM_PDDR_PWM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */ -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0 (0x01) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1 (0x02) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2 (0x04) -#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_UART */ -#define MCF_GPIO_PDDR_UART_PDDR_UART0 (0x01) -#define MCF_GPIO_PDDR_UART_PDDR_UART1 (0x02) -#define MCF_GPIO_PDDR_UART_PDDR_UART2 (0x04) -#define MCF_GPIO_PDDR_UART_PDDR_UART3 (0x08) -#define MCF_GPIO_PDDR_UART_PDDR_UART4 (0x10) -#define MCF_GPIO_PDDR_UART_PDDR_UART5 (0x20) -#define MCF_GPIO_PDDR_UART_PDDR_UART6 (0x40) -#define MCF_GPIO_PDDR_UART_PDDR_UART7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */ -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0 (0x01) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1 (0x02) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2 (0x04) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3 (0x08) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4 (0x10) -#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */ -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0 (0x01) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1 (0x02) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2 (0x04) -#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAH */ -#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH0 (0x01) -#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAM */ -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM0 (0x01) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM1 (0x02) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM2 (0x04) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM3 (0x08) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM4 (0x10) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM5 (0x20) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM6 (0x40) -#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAL */ -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL0 (0x01) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL1 (0x02) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL2 (0x04) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL3 (0x08) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL4 (0x10) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL5 (0x20) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL6 (0x40) -#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PDDR_LCDCTLH */ -#define MCF_GPIO_PDDR_LCDCTLH_PDDR_LCDCTLH0 (0x01) - -/* Bit definitions and macros for MCF_GPIO_PDDR_LCDCTLL */ -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL0 (0x01) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL1 (0x02) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL2 (0x04) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL3 (0x08) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL4 (0x10) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL5 (0x20) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL6 (0x40) -#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECH */ -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH0 (0x01) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH1 (0x02) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH2 (0x04) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH3 (0x08) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH4 (0x10) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH5 (0x20) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH6 (0x40) -#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECL */ -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL0 (0x01) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL1 (0x02) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL2 (0x04) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL3 (0x08) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL4 (0x10) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL5 (0x20) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL6 (0x40) -#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_SSI */ -#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI0 (0x01) -#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI1 (0x02) -#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI2 (0x04) -#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI3 (0x08) -#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */ -#define MCF_GPIO_PPDSDR_BUSCTL_POSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1 (0x02) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2 (0x04) -#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_BE */ -#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE0 (0x01) -#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE1 (0x02) -#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE2 (0x04) -#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */ -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1 (0x02) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2 (0x04) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3 (0x08) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4 (0x10) -#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_PWM */ -#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM2 (0x04) -#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM3 (0x08) -#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM4 (0x10) -#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */ -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0 (0x01) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1 (0x02) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2 (0x04) -#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_UART */ -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART0 (0x01) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART1 (0x02) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART2 (0x04) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART3 (0x08) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART4 (0x10) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART5 (0x20) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART6 (0x40) -#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */ -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0 (0x01) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1 (0x02) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2 (0x04) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3 (0x08) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4 (0x10) -#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */ -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0 (0x01) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1 (0x02) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2 (0x04) -#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAH */ -#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH0 (0x01) -#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAM */ -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM0 (0x01) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM1 (0x02) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM2 (0x04) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM3 (0x08) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM4 (0x10) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM5 (0x20) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM6 (0x40) -#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAL */ -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL0 (0x01) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL1 (0x02) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL2 (0x04) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL3 (0x08) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL4 (0x10) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL5 (0x20) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL6 (0x40) -#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDCTLH */ -#define MCF_GPIO_PPDSDR_LCDCTLH_PPDSDR_LCDCTLH0 (0x01) - -/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDCTLL */ -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL0 (0x01) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL1 (0x02) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL2 (0x04) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL3 (0x08) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL4 (0x10) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL5 (0x20) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL6 (0x40) -#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECH */ -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH0 (0x01) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH1 (0x02) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH2 (0x04) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH3 (0x08) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH4 (0x10) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH5 (0x20) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH6 (0x40) -#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECL */ -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL0 (0x01) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL1 (0x02) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL2 (0x04) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL3 (0x08) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL4 (0x10) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL5 (0x20) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL6 (0x40) -#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_SSI */ -#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI0 (0x01) -#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI1 (0x02) -#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI2 (0x04) -#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI3 (0x08) -#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI4 (0x10) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */ -#define MCF_GPIO_PCLRR_BUSCTL_POSDR_BUSCTL0 (0x01) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1 (0x02) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2 (0x04) -#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_BE */ -#define MCF_GPIO_PCLRR_BE_PCLRR_BE0 (0x01) -#define MCF_GPIO_PCLRR_BE_PCLRR_BE1 (0x02) -#define MCF_GPIO_PCLRR_BE_PCLRR_BE2 (0x04) -#define MCF_GPIO_PCLRR_BE_PCLRR_BE3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */ -#define MCF_GPIO_PCLRR_CS_PCLRR_CS1 (0x02) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS2 (0x04) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS3 (0x08) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS4 (0x10) -#define MCF_GPIO_PCLRR_CS_PCLRR_CS5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_PWM */ -#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM2 (0x04) -#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM3 (0x08) -#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM4 (0x10) -#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */ -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0 (0x01) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1 (0x02) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2 (0x04) -#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_UART */ -#define MCF_GPIO_PCLRR_UART_PCLRR_UART0 (0x01) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART1 (0x02) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART2 (0x04) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART3 (0x08) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART4 (0x10) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART5 (0x20) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART6 (0x40) -#define MCF_GPIO_PCLRR_UART_PCLRR_UART7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */ -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0 (0x01) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1 (0x02) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2 (0x04) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3 (0x08) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4 (0x10) -#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI5 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */ -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0 (0x01) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1 (0x02) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2 (0x04) -#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAH */ -#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH0 (0x01) -#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH1 (0x02) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAM */ -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM0 (0x01) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM1 (0x02) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM2 (0x04) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM3 (0x08) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM4 (0x10) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM5 (0x20) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM6 (0x40) -#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAL */ -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL0 (0x01) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL1 (0x02) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL2 (0x04) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL3 (0x08) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL4 (0x10) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL5 (0x20) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL6 (0x40) -#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDCTLH */ -#define MCF_GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0 (0x01) - -/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDCTLL */ -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL0 (0x01) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL1 (0x02) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL2 (0x04) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL3 (0x08) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL4 (0x10) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL5 (0x20) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL6 (0x40) -#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL7 (0x80) - -/* Bit definitions and macros for MCF_GPIO_PAR_FEC */ -#define MCF_GPIO_PAR_FEC_PAR_FEC_MII(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FEC_PAR_FEC_7W(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_GPIO (0x00) -#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_URTS1 (0x04) -#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC (0x0C) -#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_GPIO (0x00) -#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_UART (0x01) -#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_PWM */ -#define MCF_GPIO_PAR_PWM_PAR_PWM1(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_PWM_PAR_PWM3(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_PWM_PAR_PWM5 (0x10) -#define MCF_GPIO_PAR_PWM_PAR_PWM7 (0x20) - -/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */ -#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x) (((x)&0x03)<<3) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB (0x20) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA (0x40) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE (0x80) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE_GPIO (0x00) -#define MCF_GPIO_PAR_BUSCTL_PAR_OE_OE (0x80) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA_GPIO (0x00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TA_TA (0x40) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_GPIO (0x00) -#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_RWB (0x20) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO (0x00) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DACK0 (0x10) -#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS (0x18) - -/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */ -#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_FECI2C_PAR_MDIO(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_FECI2C_PAR_MDC(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_FECI2C_PAR_MDC_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_MDC_UTXD2 (0x40) -#define MCF_GPIO_PAR_FECI2C_PAR_MDC_SCL (0x80) -#define MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC (0xC0) -#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_URXD2 (0x10) -#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_SDA (0x20) -#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO (0x30) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 (0x04) -#define MCF_GPIO_PAR_FECI2C_PAR_SCL_SCL (0x0C) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO (0x00) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2 (0x02) -#define MCF_GPIO_PAR_FECI2C_PAR_SDA_SDA (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_BE */ -#define MCF_GPIO_PAR_BE_PAR_BE0 (0x01) -#define MCF_GPIO_PAR_BE_PAR_BE1 (0x02) -#define MCF_GPIO_PAR_BE_PAR_BE2 (0x04) -#define MCF_GPIO_PAR_BE_PAR_BE3 (0x08) - -/* Bit definitions and macros for MCF_GPIO_PAR_CS */ -#define MCF_GPIO_PAR_CS_PAR_CS1 (0x02) -#define MCF_GPIO_PAR_CS_PAR_CS2 (0x04) -#define MCF_GPIO_PAR_CS_PAR_CS3 (0x08) -#define MCF_GPIO_PAR_CS_PAR_CS4 (0x10) -#define MCF_GPIO_PAR_CS_PAR_CS5 (0x20) -#define MCF_GPIO_PAR_CS_PAR_CS_CS1_GPIO (0x00) -#define MCF_GPIO_PAR_CS_PAR_CS_CS1_SDCS1 (0x01) -#define MCF_GPIO_PAR_CS_PAR_CS_CS1_CS1 (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_SSI */ -#define MCF_GPIO_PAR_SSI_PAR_MCLK (0x0080) -#define MCF_GPIO_PAR_SSI_PAR_TXD(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_SSI_PAR_RXD(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_SSI_PAR_FS(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_SSI_PAR_BCLK(x) (((x)&0x0003)<<14) - -/* Bit definitions and macros for MCF_GPIO_PAR_UART */ -#define MCF_GPIO_PAR_UART_PAR_UTXD0 (0x0001) -#define MCF_GPIO_PAR_UART_PAR_URXD0 (0x0002) -#define MCF_GPIO_PAR_UART_PAR_URTS0 (0x0004) -#define MCF_GPIO_PAR_UART_PAR_UCTS0 (0x0008) -#define MCF_GPIO_PAR_UART_PAR_UTXD1(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_UART_PAR_URXD1(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_UART_PAR_URTS1(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_UART_PAR_UCTS1(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_UART_PAR_UCTS1_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_UCTS1_SSI_BCLK (0x0800) -#define MCF_GPIO_PAR_UART_PAR_UCTS1_ULPI_D7 (0x0400) -#define MCF_GPIO_PAR_UART_PAR_UCTS1_UCTS1 (0x0C00) -#define MCF_GPIO_PAR_UART_PAR_URTS1_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_URTS1_SSI_FS (0x0200) -#define MCF_GPIO_PAR_UART_PAR_URTS1_ULPI_D6 (0x0100) -#define MCF_GPIO_PAR_UART_PAR_URTS1_URTS1 (0x0300) -#define MCF_GPIO_PAR_UART_PAR_URXD1_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_URXD1_SSI_RXD (0x0080) -#define MCF_GPIO_PAR_UART_PAR_URXD1_ULPI_D5 (0x0040) -#define MCF_GPIO_PAR_UART_PAR_URXD1_URXD1 (0x00C0) -#define MCF_GPIO_PAR_UART_PAR_UTXD1_GPIO (0x0000) -#define MCF_GPIO_PAR_UART_PAR_UTXD1_SSI_TXD (0x0020) -#define MCF_GPIO_PAR_UART_PAR_UTXD1_ULPI_D4 (0x0010) -#define MCF_GPIO_PAR_UART_PAR_UTXD1_UTXD1 (0x0030) - -/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */ -#define MCF_GPIO_PAR_QSPI_PAR_SCK(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_QSPI_PAR_DOUT(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_QSPI_PAR_DIN(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_QSPI_PAR_PCS0(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x) (((x)&0x0003)<<12) -#define MCF_GPIO_PAR_QSPI_PAR_PCS2(x) (((x)&0x0003)<<14) - -/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */ -#define MCF_GPIO_PAR_TIMER_PAR_TIN0(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_TIMER_PAR_TIN1(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_TIMER_PAR_TIN2(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_TIMER_PAR_TIN3(x) (((x)&0x03)<<6) -#define MCF_GPIO_PAR_TIMER_PAR_TIN3_GPIO (0x00) -#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TOUT3 (0x80) -#define MCF_GPIO_PAR_TIMER_PAR_TIN3_URXD2 (0x40) -#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TIN3 (0xC0) -#define MCF_GPIO_PAR_TIMER_PAR_TIN2_GPIO (0x00) -#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TOUT2 (0x20) -#define MCF_GPIO_PAR_TIMER_PAR_TIN2_UTXD2 (0x10) -#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TIN2 (0x30) -#define MCF_GPIO_PAR_TIMER_PAR_TIN1_GPIO (0x00) -#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TOUT1 (0x08) -#define MCF_GPIO_PAR_TIMER_PAR_TIN1_DACK1 (0x04) -#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TIN1 (0x0C) -#define MCF_GPIO_PAR_TIMER_PAR_TIN0_GPIO (0x00) -#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TOUT0 (0x02) -#define MCF_GPIO_PAR_TIMER_PAR_TIN0_DREQ0 (0x01) -#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TIN0 (0x03) - -/* Bit definitions and macros for MCF_GPIO_PAR_LCDDATA */ -#define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0(x) (((x)&0x03)<<0) -#define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8(x) (((x)&0x03)<<2) -#define MCF_GPIO_PAR_LCDDATA_PAR_LD16(x) (((x)&0x03)<<4) -#define MCF_GPIO_PAR_LCDDATA_PAR_LD17(x) (((x)&0x03)<<6) - -/* Bit definitions and macros for MCF_GPIO_PAR_LCDCTL */ -#define MCF_GPIO_PAR_LCDCTL_PAR_CLS (0x0001) -#define MCF_GPIO_PAR_LCDCTL_PAR_PS (0x0002) -#define MCF_GPIO_PAR_LCDCTL_PAR_REV (0x0004) -#define MCF_GPIO_PAR_LCDCTL_PAR_SPL_SPR (0x0008) -#define MCF_GPIO_PAR_LCDCTL_PAR_CONTRAST (0x0010) -#define MCF_GPIO_PAR_LCDCTL_PAR_LSCLK (0x0020) -#define MCF_GPIO_PAR_LCDCTL_PAR_LP_HSYNC (0x0040) -#define MCF_GPIO_PAR_LCDCTL_PAR_FLM_VSYNC (0x0080) -#define MCF_GPIO_PAR_LCDCTL_PAR_ACD_OE (0x0100) - -/* Bit definitions and macros for MCF_GPIO_PAR_IRQ */ -#define MCF_GPIO_PAR_IRQ_PAR_IRQ1(x) (((x)&0x0003)<<4) -#define MCF_GPIO_PAR_IRQ_PAR_IRQ2(x) (((x)&0x0003)<<6) -#define MCF_GPIO_PAR_IRQ_PAR_IRQ4(x) (((x)&0x0003)<<8) -#define MCF_GPIO_PAR_IRQ_PAR_IRQ5(x) (((x)&0x0003)<<10) -#define MCF_GPIO_PAR_IRQ_PAR_IRQ6(x) (((x)&0x0003)<<12) - -/* Bit definitions and macros for MCF_GPIO_MSCR_FLEXBUS */ -#define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL(x) (((x)&0x03)<<0) -#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER(x) (((x)&0x03)<<2) -#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER(x) (((x)&0x03)<<4) - -/* Bit definitions and macros for MCF_GPIO_MSCR_SDRAM */ -#define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM(x) (((x)&0x03)<<0) -#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK(x) (((x)&0x03)<<2) -#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB(x) (((x)&0x03)<<4) - -/* Bit definitions and macros for MCF_GPIO_DSCR_I2C */ -#define MCF_GPIO_DSCR_I2C_I2C_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_PWM */ -#define MCF_GPIO_DSCR_PWM_PWM_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_FEC */ -#define MCF_GPIO_DSCR_FEC_FEC_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_UART */ -#define MCF_GPIO_DSCR_UART_UART0_DSE(x) (((x)&0x03)<<0) -#define MCF_GPIO_DSCR_UART_UART1_DSE(x) (((x)&0x03)<<2) - -/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */ -#define MCF_GPIO_DSCR_QSPI_QSPI_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */ -#define MCF_GPIO_DSCR_TIMER_TIMER_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_SSI */ -#define MCF_GPIO_DSCR_SSI_SSI_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_LCD */ -#define MCF_GPIO_DSCR_LCD_LCD_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_DEBUG */ -#define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_CLKRST */ -#define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE(x) (((x)&0x03)<<0) - -/* Bit definitions and macros for MCF_GPIO_DSCR_IRQ */ -#define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x) (((x)&0x03)<<0) - -/********************************************************************* - * - * Interrupt Controller (INTC) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_INTC0_IPRH MCF_REG32(0xFC048000) -#define MCF_INTC0_IPRL MCF_REG32(0xFC048004) -#define MCF_INTC0_IMRH MCF_REG32(0xFC048008) -#define MCF_INTC0_IMRL MCF_REG32(0xFC04800C) -#define MCF_INTC0_INTFRCH MCF_REG32(0xFC048010) -#define MCF_INTC0_INTFRCL MCF_REG32(0xFC048014) -#define MCF_INTC0_ICONFIG MCF_REG16(0xFC04801A) -#define MCF_INTC0_SIMR MCF_REG08(0xFC04801C) -#define MCF_INTC0_CIMR MCF_REG08(0xFC04801D) -#define MCF_INTC0_CLMASK MCF_REG08(0xFC04801E) -#define MCF_INTC0_SLMASK MCF_REG08(0xFC04801F) -#define MCF_INTC0_ICR0 MCF_REG08(0xFC048040) -#define MCF_INTC0_ICR1 MCF_REG08(0xFC048041) -#define MCF_INTC0_ICR2 MCF_REG08(0xFC048042) -#define MCF_INTC0_ICR3 MCF_REG08(0xFC048043) -#define MCF_INTC0_ICR4 MCF_REG08(0xFC048044) -#define MCF_INTC0_ICR5 MCF_REG08(0xFC048045) -#define MCF_INTC0_ICR6 MCF_REG08(0xFC048046) -#define MCF_INTC0_ICR7 MCF_REG08(0xFC048047) -#define MCF_INTC0_ICR8 MCF_REG08(0xFC048048) -#define MCF_INTC0_ICR9 MCF_REG08(0xFC048049) -#define MCF_INTC0_ICR10 MCF_REG08(0xFC04804A) -#define MCF_INTC0_ICR11 MCF_REG08(0xFC04804B) -#define MCF_INTC0_ICR12 MCF_REG08(0xFC04804C) -#define MCF_INTC0_ICR13 MCF_REG08(0xFC04804D) -#define MCF_INTC0_ICR14 MCF_REG08(0xFC04804E) -#define MCF_INTC0_ICR15 MCF_REG08(0xFC04804F) -#define MCF_INTC0_ICR16 MCF_REG08(0xFC048050) -#define MCF_INTC0_ICR17 MCF_REG08(0xFC048051) -#define MCF_INTC0_ICR18 MCF_REG08(0xFC048052) -#define MCF_INTC0_ICR19 MCF_REG08(0xFC048053) -#define MCF_INTC0_ICR20 MCF_REG08(0xFC048054) -#define MCF_INTC0_ICR21 MCF_REG08(0xFC048055) -#define MCF_INTC0_ICR22 MCF_REG08(0xFC048056) -#define MCF_INTC0_ICR23 MCF_REG08(0xFC048057) -#define MCF_INTC0_ICR24 MCF_REG08(0xFC048058) -#define MCF_INTC0_ICR25 MCF_REG08(0xFC048059) -#define MCF_INTC0_ICR26 MCF_REG08(0xFC04805A) -#define MCF_INTC0_ICR27 MCF_REG08(0xFC04805B) -#define MCF_INTC0_ICR28 MCF_REG08(0xFC04805C) -#define MCF_INTC0_ICR29 MCF_REG08(0xFC04805D) -#define MCF_INTC0_ICR30 MCF_REG08(0xFC04805E) -#define MCF_INTC0_ICR31 MCF_REG08(0xFC04805F) -#define MCF_INTC0_ICR32 MCF_REG08(0xFC048060) -#define MCF_INTC0_ICR33 MCF_REG08(0xFC048061) -#define MCF_INTC0_ICR34 MCF_REG08(0xFC048062) -#define MCF_INTC0_ICR35 MCF_REG08(0xFC048063) -#define MCF_INTC0_ICR36 MCF_REG08(0xFC048064) -#define MCF_INTC0_ICR37 MCF_REG08(0xFC048065) -#define MCF_INTC0_ICR38 MCF_REG08(0xFC048066) -#define MCF_INTC0_ICR39 MCF_REG08(0xFC048067) -#define MCF_INTC0_ICR40 MCF_REG08(0xFC048068) -#define MCF_INTC0_ICR41 MCF_REG08(0xFC048069) -#define MCF_INTC0_ICR42 MCF_REG08(0xFC04806A) -#define MCF_INTC0_ICR43 MCF_REG08(0xFC04806B) -#define MCF_INTC0_ICR44 MCF_REG08(0xFC04806C) -#define MCF_INTC0_ICR45 MCF_REG08(0xFC04806D) -#define MCF_INTC0_ICR46 MCF_REG08(0xFC04806E) -#define MCF_INTC0_ICR47 MCF_REG08(0xFC04806F) -#define MCF_INTC0_ICR48 MCF_REG08(0xFC048070) -#define MCF_INTC0_ICR49 MCF_REG08(0xFC048071) -#define MCF_INTC0_ICR50 MCF_REG08(0xFC048072) -#define MCF_INTC0_ICR51 MCF_REG08(0xFC048073) -#define MCF_INTC0_ICR52 MCF_REG08(0xFC048074) -#define MCF_INTC0_ICR53 MCF_REG08(0xFC048075) -#define MCF_INTC0_ICR54 MCF_REG08(0xFC048076) -#define MCF_INTC0_ICR55 MCF_REG08(0xFC048077) -#define MCF_INTC0_ICR56 MCF_REG08(0xFC048078) -#define MCF_INTC0_ICR57 MCF_REG08(0xFC048079) -#define MCF_INTC0_ICR58 MCF_REG08(0xFC04807A) -#define MCF_INTC0_ICR59 MCF_REG08(0xFC04807B) -#define MCF_INTC0_ICR60 MCF_REG08(0xFC04807C) -#define MCF_INTC0_ICR61 MCF_REG08(0xFC04807D) -#define MCF_INTC0_ICR62 MCF_REG08(0xFC04807E) -#define MCF_INTC0_ICR63 MCF_REG08(0xFC04807F) -#define MCF_INTC0_ICR(x) MCF_REG08(0xFC048040+((x)*0x001)) -#define MCF_INTC0_SWIACK MCF_REG08(0xFC0480E0) -#define MCF_INTC0_L1IACK MCF_REG08(0xFC0480E4) -#define MCF_INTC0_L2IACK MCF_REG08(0xFC0480E8) -#define MCF_INTC0_L3IACK MCF_REG08(0xFC0480EC) -#define MCF_INTC0_L4IACK MCF_REG08(0xFC0480F0) -#define MCF_INTC0_L5IACK MCF_REG08(0xFC0480F4) -#define MCF_INTC0_L6IACK MCF_REG08(0xFC0480F8) -#define MCF_INTC0_L7IACK MCF_REG08(0xFC0480FC) -#define MCF_INTC0_LIACK(x) MCF_REG08(0xFC0480E4+((x)*0x004)) -#define MCF_INTC1_IPRH MCF_REG32(0xFC04C000) -#define MCF_INTC1_IPRL MCF_REG32(0xFC04C004) -#define MCF_INTC1_IMRH MCF_REG32(0xFC04C008) -#define MCF_INTC1_IMRL MCF_REG32(0xFC04C00C) -#define MCF_INTC1_INTFRCH MCF_REG32(0xFC04C010) -#define MCF_INTC1_INTFRCL MCF_REG32(0xFC04C014) -#define MCF_INTC1_ICONFIG MCF_REG16(0xFC04C01A) -#define MCF_INTC1_SIMR MCF_REG08(0xFC04C01C) -#define MCF_INTC1_CIMR MCF_REG08(0xFC04C01D) -#define MCF_INTC1_CLMASK MCF_REG08(0xFC04C01E) -#define MCF_INTC1_SLMASK MCF_REG08(0xFC04C01F) -#define MCF_INTC1_ICR0 MCF_REG08(0xFC04C040) -#define MCF_INTC1_ICR1 MCF_REG08(0xFC04C041) -#define MCF_INTC1_ICR2 MCF_REG08(0xFC04C042) -#define MCF_INTC1_ICR3 MCF_REG08(0xFC04C043) -#define MCF_INTC1_ICR4 MCF_REG08(0xFC04C044) -#define MCF_INTC1_ICR5 MCF_REG08(0xFC04C045) -#define MCF_INTC1_ICR6 MCF_REG08(0xFC04C046) -#define MCF_INTC1_ICR7 MCF_REG08(0xFC04C047) -#define MCF_INTC1_ICR8 MCF_REG08(0xFC04C048) -#define MCF_INTC1_ICR9 MCF_REG08(0xFC04C049) -#define MCF_INTC1_ICR10 MCF_REG08(0xFC04C04A) -#define MCF_INTC1_ICR11 MCF_REG08(0xFC04C04B) -#define MCF_INTC1_ICR12 MCF_REG08(0xFC04C04C) -#define MCF_INTC1_ICR13 MCF_REG08(0xFC04C04D) -#define MCF_INTC1_ICR14 MCF_REG08(0xFC04C04E) -#define MCF_INTC1_ICR15 MCF_REG08(0xFC04C04F) -#define MCF_INTC1_ICR16 MCF_REG08(0xFC04C050) -#define MCF_INTC1_ICR17 MCF_REG08(0xFC04C051) -#define MCF_INTC1_ICR18 MCF_REG08(0xFC04C052) -#define MCF_INTC1_ICR19 MCF_REG08(0xFC04C053) -#define MCF_INTC1_ICR20 MCF_REG08(0xFC04C054) -#define MCF_INTC1_ICR21 MCF_REG08(0xFC04C055) -#define MCF_INTC1_ICR22 MCF_REG08(0xFC04C056) -#define MCF_INTC1_ICR23 MCF_REG08(0xFC04C057) -#define MCF_INTC1_ICR24 MCF_REG08(0xFC04C058) -#define MCF_INTC1_ICR25 MCF_REG08(0xFC04C059) -#define MCF_INTC1_ICR26 MCF_REG08(0xFC04C05A) -#define MCF_INTC1_ICR27 MCF_REG08(0xFC04C05B) -#define MCF_INTC1_ICR28 MCF_REG08(0xFC04C05C) -#define MCF_INTC1_ICR29 MCF_REG08(0xFC04C05D) -#define MCF_INTC1_ICR30 MCF_REG08(0xFC04C05E) -#define MCF_INTC1_ICR31 MCF_REG08(0xFC04C05F) -#define MCF_INTC1_ICR32 MCF_REG08(0xFC04C060) -#define MCF_INTC1_ICR33 MCF_REG08(0xFC04C061) -#define MCF_INTC1_ICR34 MCF_REG08(0xFC04C062) -#define MCF_INTC1_ICR35 MCF_REG08(0xFC04C063) -#define MCF_INTC1_ICR36 MCF_REG08(0xFC04C064) -#define MCF_INTC1_ICR37 MCF_REG08(0xFC04C065) -#define MCF_INTC1_ICR38 MCF_REG08(0xFC04C066) -#define MCF_INTC1_ICR39 MCF_REG08(0xFC04C067) -#define MCF_INTC1_ICR40 MCF_REG08(0xFC04C068) -#define MCF_INTC1_ICR41 MCF_REG08(0xFC04C069) -#define MCF_INTC1_ICR42 MCF_REG08(0xFC04C06A) -#define MCF_INTC1_ICR43 MCF_REG08(0xFC04C06B) -#define MCF_INTC1_ICR44 MCF_REG08(0xFC04C06C) -#define MCF_INTC1_ICR45 MCF_REG08(0xFC04C06D) -#define MCF_INTC1_ICR46 MCF_REG08(0xFC04C06E) -#define MCF_INTC1_ICR47 MCF_REG08(0xFC04C06F) -#define MCF_INTC1_ICR48 MCF_REG08(0xFC04C070) -#define MCF_INTC1_ICR49 MCF_REG08(0xFC04C071) -#define MCF_INTC1_ICR50 MCF_REG08(0xFC04C072) -#define MCF_INTC1_ICR51 MCF_REG08(0xFC04C073) -#define MCF_INTC1_ICR52 MCF_REG08(0xFC04C074) -#define MCF_INTC1_ICR53 MCF_REG08(0xFC04C075) -#define MCF_INTC1_ICR54 MCF_REG08(0xFC04C076) -#define MCF_INTC1_ICR55 MCF_REG08(0xFC04C077) -#define MCF_INTC1_ICR56 MCF_REG08(0xFC04C078) -#define MCF_INTC1_ICR57 MCF_REG08(0xFC04C079) -#define MCF_INTC1_ICR58 MCF_REG08(0xFC04C07A) -#define MCF_INTC1_ICR59 MCF_REG08(0xFC04C07B) -#define MCF_INTC1_ICR60 MCF_REG08(0xFC04C07C) -#define MCF_INTC1_ICR61 MCF_REG08(0xFC04C07D) -#define MCF_INTC1_ICR62 MCF_REG08(0xFC04C07E) -#define MCF_INTC1_ICR63 MCF_REG08(0xFC04C07F) -#define MCF_INTC1_ICR(x) MCF_REG08(0xFC04C040+((x)*0x001)) -#define MCF_INTC1_SWIACK MCF_REG08(0xFC04C0E0) -#define MCF_INTC1_L1IACK MCF_REG08(0xFC04C0E4) -#define MCF_INTC1_L2IACK MCF_REG08(0xFC04C0E8) -#define MCF_INTC1_L3IACK MCF_REG08(0xFC04C0EC) -#define MCF_INTC1_L4IACK MCF_REG08(0xFC04C0F0) -#define MCF_INTC1_L5IACK MCF_REG08(0xFC04C0F4) -#define MCF_INTC1_L6IACK MCF_REG08(0xFC04C0F8) -#define MCF_INTC1_L7IACK MCF_REG08(0xFC04C0FC) -#define MCF_INTC1_LIACK(x) MCF_REG08(0xFC04C0E4+((x)*0x004)) -#define MCF_INTC_IPRH(x) MCF_REG32(0xFC048000+((x)*0x4000)) -#define MCF_INTC_IPRL(x) MCF_REG32(0xFC048004+((x)*0x4000)) -#define MCF_INTC_IMRH(x) MCF_REG32(0xFC048008+((x)*0x4000)) -#define MCF_INTC_IMRL(x) MCF_REG32(0xFC04800C+((x)*0x4000)) -#define MCF_INTC_INTFRCH(x) MCF_REG32(0xFC048010+((x)*0x4000)) -#define MCF_INTC_INTFRCL(x) MCF_REG32(0xFC048014+((x)*0x4000)) -#define MCF_INTC_ICONFIG(x) MCF_REG16(0xFC04801A+((x)*0x4000)) -#define MCF_INTC_SIMR(x) MCF_REG08(0xFC04801C+((x)*0x4000)) -#define MCF_INTC_CIMR(x) MCF_REG08(0xFC04801D+((x)*0x4000)) -#define MCF_INTC_CLMASK(x) MCF_REG08(0xFC04801E+((x)*0x4000)) -#define MCF_INTC_SLMASK(x) MCF_REG08(0xFC04801F+((x)*0x4000)) -#define MCF_INTC_ICR0(x) MCF_REG08(0xFC048040+((x)*0x4000)) -#define MCF_INTC_ICR1(x) MCF_REG08(0xFC048041+((x)*0x4000)) -#define MCF_INTC_ICR2(x) MCF_REG08(0xFC048042+((x)*0x4000)) -#define MCF_INTC_ICR3(x) MCF_REG08(0xFC048043+((x)*0x4000)) -#define MCF_INTC_ICR4(x) MCF_REG08(0xFC048044+((x)*0x4000)) -#define MCF_INTC_ICR5(x) MCF_REG08(0xFC048045+((x)*0x4000)) -#define MCF_INTC_ICR6(x) MCF_REG08(0xFC048046+((x)*0x4000)) -#define MCF_INTC_ICR7(x) MCF_REG08(0xFC048047+((x)*0x4000)) -#define MCF_INTC_ICR8(x) MCF_REG08(0xFC048048+((x)*0x4000)) -#define MCF_INTC_ICR9(x) MCF_REG08(0xFC048049+((x)*0x4000)) -#define MCF_INTC_ICR10(x) MCF_REG08(0xFC04804A+((x)*0x4000)) -#define MCF_INTC_ICR11(x) MCF_REG08(0xFC04804B+((x)*0x4000)) -#define MCF_INTC_ICR12(x) MCF_REG08(0xFC04804C+((x)*0x4000)) -#define MCF_INTC_ICR13(x) MCF_REG08(0xFC04804D+((x)*0x4000)) -#define MCF_INTC_ICR14(x) MCF_REG08(0xFC04804E+((x)*0x4000)) -#define MCF_INTC_ICR15(x) MCF_REG08(0xFC04804F+((x)*0x4000)) -#define MCF_INTC_ICR16(x) MCF_REG08(0xFC048050+((x)*0x4000)) -#define MCF_INTC_ICR17(x) MCF_REG08(0xFC048051+((x)*0x4000)) -#define MCF_INTC_ICR18(x) MCF_REG08(0xFC048052+((x)*0x4000)) -#define MCF_INTC_ICR19(x) MCF_REG08(0xFC048053+((x)*0x4000)) -#define MCF_INTC_ICR20(x) MCF_REG08(0xFC048054+((x)*0x4000)) -#define MCF_INTC_ICR21(x) MCF_REG08(0xFC048055+((x)*0x4000)) -#define MCF_INTC_ICR22(x) MCF_REG08(0xFC048056+((x)*0x4000)) -#define MCF_INTC_ICR23(x) MCF_REG08(0xFC048057+((x)*0x4000)) -#define MCF_INTC_ICR24(x) MCF_REG08(0xFC048058+((x)*0x4000)) -#define MCF_INTC_ICR25(x) MCF_REG08(0xFC048059+((x)*0x4000)) -#define MCF_INTC_ICR26(x) MCF_REG08(0xFC04805A+((x)*0x4000)) -#define MCF_INTC_ICR27(x) MCF_REG08(0xFC04805B+((x)*0x4000)) -#define MCF_INTC_ICR28(x) MCF_REG08(0xFC04805C+((x)*0x4000)) -#define MCF_INTC_ICR29(x) MCF_REG08(0xFC04805D+((x)*0x4000)) -#define MCF_INTC_ICR30(x) MCF_REG08(0xFC04805E+((x)*0x4000)) -#define MCF_INTC_ICR31(x) MCF_REG08(0xFC04805F+((x)*0x4000)) -#define MCF_INTC_ICR32(x) MCF_REG08(0xFC048060+((x)*0x4000)) -#define MCF_INTC_ICR33(x) MCF_REG08(0xFC048061+((x)*0x4000)) -#define MCF_INTC_ICR34(x) MCF_REG08(0xFC048062+((x)*0x4000)) -#define MCF_INTC_ICR35(x) MCF_REG08(0xFC048063+((x)*0x4000)) -#define MCF_INTC_ICR36(x) MCF_REG08(0xFC048064+((x)*0x4000)) -#define MCF_INTC_ICR37(x) MCF_REG08(0xFC048065+((x)*0x4000)) -#define MCF_INTC_ICR38(x) MCF_REG08(0xFC048066+((x)*0x4000)) -#define MCF_INTC_ICR39(x) MCF_REG08(0xFC048067+((x)*0x4000)) -#define MCF_INTC_ICR40(x) MCF_REG08(0xFC048068+((x)*0x4000)) -#define MCF_INTC_ICR41(x) MCF_REG08(0xFC048069+((x)*0x4000)) -#define MCF_INTC_ICR42(x) MCF_REG08(0xFC04806A+((x)*0x4000)) -#define MCF_INTC_ICR43(x) MCF_REG08(0xFC04806B+((x)*0x4000)) -#define MCF_INTC_ICR44(x) MCF_REG08(0xFC04806C+((x)*0x4000)) -#define MCF_INTC_ICR45(x) MCF_REG08(0xFC04806D+((x)*0x4000)) -#define MCF_INTC_ICR46(x) MCF_REG08(0xFC04806E+((x)*0x4000)) -#define MCF_INTC_ICR47(x) MCF_REG08(0xFC04806F+((x)*0x4000)) -#define MCF_INTC_ICR48(x) MCF_REG08(0xFC048070+((x)*0x4000)) -#define MCF_INTC_ICR49(x) MCF_REG08(0xFC048071+((x)*0x4000)) -#define MCF_INTC_ICR50(x) MCF_REG08(0xFC048072+((x)*0x4000)) -#define MCF_INTC_ICR51(x) MCF_REG08(0xFC048073+((x)*0x4000)) -#define MCF_INTC_ICR52(x) MCF_REG08(0xFC048074+((x)*0x4000)) -#define MCF_INTC_ICR53(x) MCF_REG08(0xFC048075+((x)*0x4000)) -#define MCF_INTC_ICR54(x) MCF_REG08(0xFC048076+((x)*0x4000)) -#define MCF_INTC_ICR55(x) MCF_REG08(0xFC048077+((x)*0x4000)) -#define MCF_INTC_ICR56(x) MCF_REG08(0xFC048078+((x)*0x4000)) -#define MCF_INTC_ICR57(x) MCF_REG08(0xFC048079+((x)*0x4000)) -#define MCF_INTC_ICR58(x) MCF_REG08(0xFC04807A+((x)*0x4000)) -#define MCF_INTC_ICR59(x) MCF_REG08(0xFC04807B+((x)*0x4000)) -#define MCF_INTC_ICR60(x) MCF_REG08(0xFC04807C+((x)*0x4000)) -#define MCF_INTC_ICR61(x) MCF_REG08(0xFC04807D+((x)*0x4000)) -#define MCF_INTC_ICR62(x) MCF_REG08(0xFC04807E+((x)*0x4000)) -#define MCF_INTC_ICR63(x) MCF_REG08(0xFC04807F+((x)*0x4000)) -#define MCF_INTC_SWIACK(x) MCF_REG08(0xFC0480E0+((x)*0x4000)) -#define MCF_INTC_L1IACK(x) MCF_REG08(0xFC0480E4+((x)*0x4000)) -#define MCF_INTC_L2IACK(x) MCF_REG08(0xFC0480E8+((x)*0x4000)) -#define MCF_INTC_L3IACK(x) MCF_REG08(0xFC0480EC+((x)*0x4000)) -#define MCF_INTC_L4IACK(x) MCF_REG08(0xFC0480F0+((x)*0x4000)) -#define MCF_INTC_L5IACK(x) MCF_REG08(0xFC0480F4+((x)*0x4000)) -#define MCF_INTC_L6IACK(x) MCF_REG08(0xFC0480F8+((x)*0x4000)) -#define MCF_INTC_L7IACK(x) MCF_REG08(0xFC0480FC+((x)*0x4000)) - -/* Bit definitions and macros for MCF_INTC_IPRH */ -#define MCF_INTC_IPRH_INT32 (0x00000001) -#define MCF_INTC_IPRH_INT33 (0x00000002) -#define MCF_INTC_IPRH_INT34 (0x00000004) -#define MCF_INTC_IPRH_INT35 (0x00000008) -#define MCF_INTC_IPRH_INT36 (0x00000010) -#define MCF_INTC_IPRH_INT37 (0x00000020) -#define MCF_INTC_IPRH_INT38 (0x00000040) -#define MCF_INTC_IPRH_INT39 (0x00000080) -#define MCF_INTC_IPRH_INT40 (0x00000100) -#define MCF_INTC_IPRH_INT41 (0x00000200) -#define MCF_INTC_IPRH_INT42 (0x00000400) -#define MCF_INTC_IPRH_INT43 (0x00000800) -#define MCF_INTC_IPRH_INT44 (0x00001000) -#define MCF_INTC_IPRH_INT45 (0x00002000) -#define MCF_INTC_IPRH_INT46 (0x00004000) -#define MCF_INTC_IPRH_INT47 (0x00008000) -#define MCF_INTC_IPRH_INT48 (0x00010000) -#define MCF_INTC_IPRH_INT49 (0x00020000) -#define MCF_INTC_IPRH_INT50 (0x00040000) -#define MCF_INTC_IPRH_INT51 (0x00080000) -#define MCF_INTC_IPRH_INT52 (0x00100000) -#define MCF_INTC_IPRH_INT53 (0x00200000) -#define MCF_INTC_IPRH_INT54 (0x00400000) -#define MCF_INTC_IPRH_INT55 (0x00800000) -#define MCF_INTC_IPRH_INT56 (0x01000000) -#define MCF_INTC_IPRH_INT57 (0x02000000) -#define MCF_INTC_IPRH_INT58 (0x04000000) -#define MCF_INTC_IPRH_INT59 (0x08000000) -#define MCF_INTC_IPRH_INT60 (0x10000000) -#define MCF_INTC_IPRH_INT61 (0x20000000) -#define MCF_INTC_IPRH_INT62 (0x40000000) -#define MCF_INTC_IPRH_INT63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IPRL */ -#define MCF_INTC_IPRL_INT0 (0x00000001) -#define MCF_INTC_IPRL_INT1 (0x00000002) -#define MCF_INTC_IPRL_INT2 (0x00000004) -#define MCF_INTC_IPRL_INT3 (0x00000008) -#define MCF_INTC_IPRL_INT4 (0x00000010) -#define MCF_INTC_IPRL_INT5 (0x00000020) -#define MCF_INTC_IPRL_INT6 (0x00000040) -#define MCF_INTC_IPRL_INT7 (0x00000080) -#define MCF_INTC_IPRL_INT8 (0x00000100) -#define MCF_INTC_IPRL_INT9 (0x00000200) -#define MCF_INTC_IPRL_INT10 (0x00000400) -#define MCF_INTC_IPRL_INT11 (0x00000800) -#define MCF_INTC_IPRL_INT12 (0x00001000) -#define MCF_INTC_IPRL_INT13 (0x00002000) -#define MCF_INTC_IPRL_INT14 (0x00004000) -#define MCF_INTC_IPRL_INT15 (0x00008000) -#define MCF_INTC_IPRL_INT16 (0x00010000) -#define MCF_INTC_IPRL_INT17 (0x00020000) -#define MCF_INTC_IPRL_INT18 (0x00040000) -#define MCF_INTC_IPRL_INT19 (0x00080000) -#define MCF_INTC_IPRL_INT20 (0x00100000) -#define MCF_INTC_IPRL_INT21 (0x00200000) -#define MCF_INTC_IPRL_INT22 (0x00400000) -#define MCF_INTC_IPRL_INT23 (0x00800000) -#define MCF_INTC_IPRL_INT24 (0x01000000) -#define MCF_INTC_IPRL_INT25 (0x02000000) -#define MCF_INTC_IPRL_INT26 (0x04000000) -#define MCF_INTC_IPRL_INT27 (0x08000000) -#define MCF_INTC_IPRL_INT28 (0x10000000) -#define MCF_INTC_IPRL_INT29 (0x20000000) -#define MCF_INTC_IPRL_INT30 (0x40000000) -#define MCF_INTC_IPRL_INT31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRH */ -#define MCF_INTC_IMRH_INT_MASK32 (0x00000001) -#define MCF_INTC_IMRH_INT_MASK33 (0x00000002) -#define MCF_INTC_IMRH_INT_MASK34 (0x00000004) -#define MCF_INTC_IMRH_INT_MASK35 (0x00000008) -#define MCF_INTC_IMRH_INT_MASK36 (0x00000010) -#define MCF_INTC_IMRH_INT_MASK37 (0x00000020) -#define MCF_INTC_IMRH_INT_MASK38 (0x00000040) -#define MCF_INTC_IMRH_INT_MASK39 (0x00000080) -#define MCF_INTC_IMRH_INT_MASK40 (0x00000100) -#define MCF_INTC_IMRH_INT_MASK41 (0x00000200) -#define MCF_INTC_IMRH_INT_MASK42 (0x00000400) -#define MCF_INTC_IMRH_INT_MASK43 (0x00000800) -#define MCF_INTC_IMRH_INT_MASK44 (0x00001000) -#define MCF_INTC_IMRH_INT_MASK45 (0x00002000) -#define MCF_INTC_IMRH_INT_MASK46 (0x00004000) -#define MCF_INTC_IMRH_INT_MASK47 (0x00008000) -#define MCF_INTC_IMRH_INT_MASK48 (0x00010000) -#define MCF_INTC_IMRH_INT_MASK49 (0x00020000) -#define MCF_INTC_IMRH_INT_MASK50 (0x00040000) -#define MCF_INTC_IMRH_INT_MASK51 (0x00080000) -#define MCF_INTC_IMRH_INT_MASK52 (0x00100000) -#define MCF_INTC_IMRH_INT_MASK53 (0x00200000) -#define MCF_INTC_IMRH_INT_MASK54 (0x00400000) -#define MCF_INTC_IMRH_INT_MASK55 (0x00800000) -#define MCF_INTC_IMRH_INT_MASK56 (0x01000000) -#define MCF_INTC_IMRH_INT_MASK57 (0x02000000) -#define MCF_INTC_IMRH_INT_MASK58 (0x04000000) -#define MCF_INTC_IMRH_INT_MASK59 (0x08000000) -#define MCF_INTC_IMRH_INT_MASK60 (0x10000000) -#define MCF_INTC_IMRH_INT_MASK61 (0x20000000) -#define MCF_INTC_IMRH_INT_MASK62 (0x40000000) -#define MCF_INTC_IMRH_INT_MASK63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_IMRL */ -#define MCF_INTC_IMRL_INT_MASK0 (0x00000001) -#define MCF_INTC_IMRL_INT_MASK1 (0x00000002) -#define MCF_INTC_IMRL_INT_MASK2 (0x00000004) -#define MCF_INTC_IMRL_INT_MASK3 (0x00000008) -#define MCF_INTC_IMRL_INT_MASK4 (0x00000010) -#define MCF_INTC_IMRL_INT_MASK5 (0x00000020) -#define MCF_INTC_IMRL_INT_MASK6 (0x00000040) -#define MCF_INTC_IMRL_INT_MASK7 (0x00000080) -#define MCF_INTC_IMRL_INT_MASK8 (0x00000100) -#define MCF_INTC_IMRL_INT_MASK9 (0x00000200) -#define MCF_INTC_IMRL_INT_MASK10 (0x00000400) -#define MCF_INTC_IMRL_INT_MASK11 (0x00000800) -#define MCF_INTC_IMRL_INT_MASK12 (0x00001000) -#define MCF_INTC_IMRL_INT_MASK13 (0x00002000) -#define MCF_INTC_IMRL_INT_MASK14 (0x00004000) -#define MCF_INTC_IMRL_INT_MASK15 (0x00008000) -#define MCF_INTC_IMRL_INT_MASK16 (0x00010000) -#define MCF_INTC_IMRL_INT_MASK17 (0x00020000) -#define MCF_INTC_IMRL_INT_MASK18 (0x00040000) -#define MCF_INTC_IMRL_INT_MASK19 (0x00080000) -#define MCF_INTC_IMRL_INT_MASK20 (0x00100000) -#define MCF_INTC_IMRL_INT_MASK21 (0x00200000) -#define MCF_INTC_IMRL_INT_MASK22 (0x00400000) -#define MCF_INTC_IMRL_INT_MASK23 (0x00800000) -#define MCF_INTC_IMRL_INT_MASK24 (0x01000000) -#define MCF_INTC_IMRL_INT_MASK25 (0x02000000) -#define MCF_INTC_IMRL_INT_MASK26 (0x04000000) -#define MCF_INTC_IMRL_INT_MASK27 (0x08000000) -#define MCF_INTC_IMRL_INT_MASK28 (0x10000000) -#define MCF_INTC_IMRL_INT_MASK29 (0x20000000) -#define MCF_INTC_IMRL_INT_MASK30 (0x40000000) -#define MCF_INTC_IMRL_INT_MASK31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCH */ -#define MCF_INTC_INTFRCH_INTFRC32 (0x00000001) -#define MCF_INTC_INTFRCH_INTFRC33 (0x00000002) -#define MCF_INTC_INTFRCH_INTFRC34 (0x00000004) -#define MCF_INTC_INTFRCH_INTFRC35 (0x00000008) -#define MCF_INTC_INTFRCH_INTFRC36 (0x00000010) -#define MCF_INTC_INTFRCH_INTFRC37 (0x00000020) -#define MCF_INTC_INTFRCH_INTFRC38 (0x00000040) -#define MCF_INTC_INTFRCH_INTFRC39 (0x00000080) -#define MCF_INTC_INTFRCH_INTFRC40 (0x00000100) -#define MCF_INTC_INTFRCH_INTFRC41 (0x00000200) -#define MCF_INTC_INTFRCH_INTFRC42 (0x00000400) -#define MCF_INTC_INTFRCH_INTFRC43 (0x00000800) -#define MCF_INTC_INTFRCH_INTFRC44 (0x00001000) -#define MCF_INTC_INTFRCH_INTFRC45 (0x00002000) -#define MCF_INTC_INTFRCH_INTFRC46 (0x00004000) -#define MCF_INTC_INTFRCH_INTFRC47 (0x00008000) -#define MCF_INTC_INTFRCH_INTFRC48 (0x00010000) -#define MCF_INTC_INTFRCH_INTFRC49 (0x00020000) -#define MCF_INTC_INTFRCH_INTFRC50 (0x00040000) -#define MCF_INTC_INTFRCH_INTFRC51 (0x00080000) -#define MCF_INTC_INTFRCH_INTFRC52 (0x00100000) -#define MCF_INTC_INTFRCH_INTFRC53 (0x00200000) -#define MCF_INTC_INTFRCH_INTFRC54 (0x00400000) -#define MCF_INTC_INTFRCH_INTFRC55 (0x00800000) -#define MCF_INTC_INTFRCH_INTFRC56 (0x01000000) -#define MCF_INTC_INTFRCH_INTFRC57 (0x02000000) -#define MCF_INTC_INTFRCH_INTFRC58 (0x04000000) -#define MCF_INTC_INTFRCH_INTFRC59 (0x08000000) -#define MCF_INTC_INTFRCH_INTFRC60 (0x10000000) -#define MCF_INTC_INTFRCH_INTFRC61 (0x20000000) -#define MCF_INTC_INTFRCH_INTFRC62 (0x40000000) -#define MCF_INTC_INTFRCH_INTFRC63 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_INTFRCL */ -#define MCF_INTC_INTFRCL_INTFRC0 (0x00000001) -#define MCF_INTC_INTFRCL_INTFRC1 (0x00000002) -#define MCF_INTC_INTFRCL_INTFRC2 (0x00000004) -#define MCF_INTC_INTFRCL_INTFRC3 (0x00000008) -#define MCF_INTC_INTFRCL_INTFRC4 (0x00000010) -#define MCF_INTC_INTFRCL_INTFRC5 (0x00000020) -#define MCF_INTC_INTFRCL_INTFRC6 (0x00000040) -#define MCF_INTC_INTFRCL_INTFRC7 (0x00000080) -#define MCF_INTC_INTFRCL_INTFRC8 (0x00000100) -#define MCF_INTC_INTFRCL_INTFRC9 (0x00000200) -#define MCF_INTC_INTFRCL_INTFRC10 (0x00000400) -#define MCF_INTC_INTFRCL_INTFRC11 (0x00000800) -#define MCF_INTC_INTFRCL_INTFRC12 (0x00001000) -#define MCF_INTC_INTFRCL_INTFRC13 (0x00002000) -#define MCF_INTC_INTFRCL_INTFRC14 (0x00004000) -#define MCF_INTC_INTFRCL_INTFRC15 (0x00008000) -#define MCF_INTC_INTFRCL_INTFRC16 (0x00010000) -#define MCF_INTC_INTFRCL_INTFRC17 (0x00020000) -#define MCF_INTC_INTFRCL_INTFRC18 (0x00040000) -#define MCF_INTC_INTFRCL_INTFRC19 (0x00080000) -#define MCF_INTC_INTFRCL_INTFRC20 (0x00100000) -#define MCF_INTC_INTFRCL_INTFRC21 (0x00200000) -#define MCF_INTC_INTFRCL_INTFRC22 (0x00400000) -#define MCF_INTC_INTFRCL_INTFRC23 (0x00800000) -#define MCF_INTC_INTFRCL_INTFRC24 (0x01000000) -#define MCF_INTC_INTFRCL_INTFRC25 (0x02000000) -#define MCF_INTC_INTFRCL_INTFRC26 (0x04000000) -#define MCF_INTC_INTFRCL_INTFRC27 (0x08000000) -#define MCF_INTC_INTFRCL_INTFRC28 (0x10000000) -#define MCF_INTC_INTFRCL_INTFRC29 (0x20000000) -#define MCF_INTC_INTFRCL_INTFRC30 (0x40000000) -#define MCF_INTC_INTFRCL_INTFRC31 (0x80000000) - -/* Bit definitions and macros for MCF_INTC_ICONFIG */ -#define MCF_INTC_ICONFIG_EMASK (0x0020) -#define MCF_INTC_ICONFIG_ELVLPRI1 (0x0200) -#define MCF_INTC_ICONFIG_ELVLPRI2 (0x0400) -#define MCF_INTC_ICONFIG_ELVLPRI3 (0x0800) -#define MCF_INTC_ICONFIG_ELVLPRI4 (0x1000) -#define MCF_INTC_ICONFIG_ELVLPRI5 (0x2000) -#define MCF_INTC_ICONFIG_ELVLPRI6 (0x4000) -#define MCF_INTC_ICONFIG_ELVLPRI7 (0x8000) - -/* Bit definitions and macros for MCF_INTC_SIMR */ -#define MCF_INTC_SIMR_SIMR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_INTC_CIMR */ -#define MCF_INTC_CIMR_CIMR(x) (((x)&0x7F)<<0) - -/* Bit definitions and macros for MCF_INTC_CLMASK */ -#define MCF_INTC_CLMASK_CLMASK(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_INTC_SLMASK */ -#define MCF_INTC_SLMASK_SLMASK(x) (((x)&0x0F)<<0) - -/* Bit definitions and macros for MCF_INTC_ICR */ -#define MCF_INTC_ICR_IL(x) (((x)&0x07)<<0) - -/* Bit definitions and macros for MCF_INTC_SWIACK */ -#define MCF_INTC_SWIACK_VECTOR(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_INTC_LIACK */ -#define MCF_INTC_LIACK_VECTOR(x) (((x)&0xFF)<<0) - -/********************************************************************/ -/********************************************************************* -* -* LCD Controller (LCDC) -* -*********************************************************************/ - -/* Register read/write macros */ -#define MCF_LCDC_LSSAR MCF_REG32(0xFC0AC000) -#define MCF_LCDC_LSR MCF_REG32(0xFC0AC004) -#define MCF_LCDC_LVPWR MCF_REG32(0xFC0AC008) -#define MCF_LCDC_LCPR MCF_REG32(0xFC0AC00C) -#define MCF_LCDC_LCWHBR MCF_REG32(0xFC0AC010) -#define MCF_LCDC_LCCMR MCF_REG32(0xFC0AC014) -#define MCF_LCDC_LPCR MCF_REG32(0xFC0AC018) -#define MCF_LCDC_LHCR MCF_REG32(0xFC0AC01C) -#define MCF_LCDC_LVCR MCF_REG32(0xFC0AC020) -#define MCF_LCDC_LPOR MCF_REG32(0xFC0AC024) -#define MCF_LCDC_LSCR MCF_REG32(0xFC0AC028) -#define MCF_LCDC_LPCCR MCF_REG32(0xFC0AC02C) -#define MCF_LCDC_LDCR MCF_REG32(0xFC0AC030) -#define MCF_LCDC_LRMCR MCF_REG32(0xFC0AC034) -#define MCF_LCDC_LICR MCF_REG32(0xFC0AC038) -#define MCF_LCDC_LIER MCF_REG32(0xFC0AC03C) -#define MCF_LCDC_LISR MCF_REG32(0xFC0AC040) -#define MCF_LCDC_LGWSAR MCF_REG32(0xFC0AC050) -#define MCF_LCDC_LGWSR MCF_REG32(0xFC0AC054) -#define MCF_LCDC_LGWVPWR MCF_REG32(0xFC0AC058) -#define MCF_LCDC_LGWPOR MCF_REG32(0xFC0AC05C) -#define MCF_LCDC_LGWPR MCF_REG32(0xFC0AC060) -#define MCF_LCDC_LGWCR MCF_REG32(0xFC0AC064) -#define MCF_LCDC_LGWDCR MCF_REG32(0xFC0AC068) -#define MCF_LCDC_BPLUT_BASE MCF_REG32(0xFC0AC800) -#define MCF_LCDC_GWLUT_BASE MCF_REG32(0xFC0ACC00) - -/* Bit definitions and macros for MCF_LCDC_LSSAR */ -#define MCF_LCDC_LSSAR_SSA(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_LCDC_LSR */ -#define MCF_LCDC_LSR_YMAX(x) (((x)&0x000003FF)<<0) -#define MCF_LCDC_LSR_XMAX(x) (((x)&0x0000003F)<<20) - -/* Bit definitions and macros for MCF_LCDC_LVPWR */ -#define MCF_LCDC_LVPWR_VPW(x) (((x)&0x000003FF)<<0) - -/* Bit definitions and macros for MCF_LCDC_LCPR */ -#define MCF_LCDC_LCPR_CYP(x) (((x)&0x000003FF)<<0) -#define MCF_LCDC_LCPR_CXP(x) (((x)&0x000003FF)<<16) -#define MCF_LCDC_LCPR_OP (0x10000000) -#define MCF_LCDC_LCPR_CC(x) (((x)&0x00000003)<<30) -#define MCF_LCDC_LCPR_CC_TRANSPARENT (0x00000000) -#define MCF_LCDC_LCPR_CC_OR (0x40000000) -#define MCF_LCDC_LCPR_CC_XOR (0x80000000) -#define MCF_LCDC_LCPR_CC_AND (0xC0000000) -#define MCF_LCDC_LCPR_OP_ON (0x10000000) -#define MCF_LCDC_LCPR_OP_OFF (0x00000000) - -/* Bit definitions and macros for MCF_LCDC_LCWHBR */ -#define MCF_LCDC_LCWHBR_BD(x) (((x)&0x000000FF)<<0) -#define MCF_LCDC_LCWHBR_CH(x) (((x)&0x0000001F)<<16) -#define MCF_LCDC_LCWHBR_CW(x) (((x)&0x0000001F)<<24) -#define MCF_LCDC_LCWHBR_BK_EN (0x80000000) -#define MCF_LCDC_LCWHBR_BK_EN_ON (0x80000000) -#define MCF_LCDC_LCWHBR_BK_EN_OFF (0x00000000) - -/* Bit definitions and macros for MCF_LCDC_LCCMR */ -#define MCF_LCDC_LCCMR_CUR_COL_B(x) (((x)&0x0000003F)<<0) -#define MCF_LCDC_LCCMR_CUR_COL_G(x) (((x)&0x0000003F)<<6) -#define MCF_LCDC_LCCMR_CUR_COL_R(x) (((x)&0x0000003F)<<12) - -/* Bit definitions and macros for MCF_LCDC_LPCR */ -#define MCF_LCDC_LPCR_PCD(x) (((x)&0x0000003F)<<0) -#define MCF_LCDC_LPCR_SHARP (0x00000040) -#define MCF_LCDC_LPCR_SCLKSEL (0x00000080) -#define MCF_LCDC_LPCR_ACD(x) (((x)&0x0000007F)<<8) -#define MCF_LCDC_LPCR_ACDSEL (0x00008000) -#define MCF_LCDC_LPCR_REV_VS (0x00010000) -#define MCF_LCDC_LPCR_SWAP_SEL (0x00020000) -#define MCF_LCDC_LPCR_ENDSEL (0x00040000) -#define MCF_LCDC_LPCR_SCLKIDLE (0x00080000) -#define MCF_LCDC_LPCR_OEPOL (0x00100000) -#define MCF_LCDC_LPCR_CLKPOL (0x00200000) -#define MCF_LCDC_LPCR_LPPOL (0x00400000) -#define MCF_LCDC_LPCR_FLM (0x00800000) -#define MCF_LCDC_LPCR_PIXPOL (0x01000000) -#define MCF_LCDC_LPCR_BPIX(x) (((x)&0x00000007)<<25) -#define MCF_LCDC_LPCR_PBSIZ(x) (((x)&0x00000003)<<28) -#define MCF_LCDC_LPCR_COLOR (0x40000000) -#define MCF_LCDC_LPCR_TFT (0x80000000) -#define MCF_LCDC_LPCR_MODE_MONOCGROME (0x00000000) -#define MCF_LCDC_LPCR_MODE_CSTN (0x40000000) -#define MCF_LCDC_LPCR_MODE_TFT (0xC0000000) -#define MCF_LCDC_LPCR_PBSIZ_1 (0x00000000) -#define MCF_LCDC_LPCR_PBSIZ_2 (0x10000000) -#define MCF_LCDC_LPCR_PBSIZ_4 (0x20000000) -#define MCF_LCDC_LPCR_PBSIZ_8 (0x30000000) -#define MCF_LCDC_LPCR_BPIX_1bpp (0x00000000) -#define MCF_LCDC_LPCR_BPIX_2bpp (0x02000000) -#define MCF_LCDC_LPCR_BPIX_4bpp (0x04000000) -#define MCF_LCDC_LPCR_BPIX_8bpp (0x06000000) -#define MCF_LCDC_LPCR_BPIX_12bpp (0x08000000) -#define MCF_LCDC_LPCR_BPIX_16bpp (0x0A000000) -#define MCF_LCDC_LPCR_BPIX_18bpp (0x0C000000) - -#define MCF_LCDC_LPCR_PANEL_TYPE(x) (((x)&0x00000003)<<30) - -/* Bit definitions and macros for MCF_LCDC_LHCR */ -#define MCF_LCDC_LHCR_H_WAIT_2(x) (((x)&0x000000FF)<<0) -#define MCF_LCDC_LHCR_H_WAIT_1(x) (((x)&0x000000FF)<<8) -#define MCF_LCDC_LHCR_H_WIDTH(x) (((x)&0x0000003F)<<26) - -/* Bit definitions and macros for MCF_LCDC_LVCR */ -#define MCF_LCDC_LVCR_V_WAIT_2(x) (((x)&0x000000FF)<<0) -#define MCF_LCDC_LVCR_V_WAIT_1(x) (((x)&0x000000FF)<<8) -#define MCF_LCDC_LVCR_V_WIDTH(x) (((x)&0x0000003F)<<26) - -/* Bit definitions and macros for MCF_LCDC_LPOR */ -#define MCF_LCDC_LPOR_POS(x) (((x)&0x0000001F)<<0) - -/* Bit definitions and macros for MCF_LCDC_LPCCR */ -#define MCF_LCDC_LPCCR_PW(x) (((x)&0x000000FF)<<0) -#define MCF_LCDC_LPCCR_CC_EN (0x00000100) -#define MCF_LCDC_LPCCR_SCR(x) (((x)&0x00000003)<<9) -#define MCF_LCDC_LPCCR_LDMSK (0x00008000) -#define MCF_LCDC_LPCCR_CLS_HI_WIDTH(x) (((x)&0x000001FF)<<16) -#define MCF_LCDC_LPCCR_SCR_LINEPULSE (0x00000000) -#define MCF_LCDC_LPCCR_SCR_PIXELCLK (0x00002000) -#define MCF_LCDC_LPCCR_SCR_LCDCLOCK (0x00004000) - -/* Bit definitions and macros for MCF_LCDC_LDCR */ -#define MCF_LCDC_LDCR_TM(x) (((x)&0x0000001F)<<0) -#define MCF_LCDC_LDCR_HM(x) (((x)&0x0000001F)<<16) -#define MCF_LCDC_LDCR_BURST (0x80000000) - -/* Bit definitions and macros for MCF_LCDC_LRMCR */ -#define MCF_LCDC_LRMCR_SEL_REF (0x00000001) - -/* Bit definitions and macros for MCF_LCDC_LICR */ -#define MCF_LCDC_LICR_INTCON (0x00000001) -#define MCF_LCDC_LICR_INTSYN (0x00000004) -#define MCF_LCDC_LICR_GW_INT_CON (0x00000010) - -/* Bit definitions and macros for MCF_LCDC_LIER */ -#define MCF_LCDC_LIER_BOF_EN (0x00000001) -#define MCF_LCDC_LIER_EOF_EN (0x00000002) -#define MCF_LCDC_LIER_ERR_RES_EN (0x00000004) -#define MCF_LCDC_LIER_UDR_ERR_EN (0x00000008) -#define MCF_LCDC_LIER_GW_BOF_EN (0x00000010) -#define MCF_LCDC_LIER_GW_EOF_EN (0x00000020) -#define MCF_LCDC_LIER_GW_ERR_RES_EN (0x00000040) -#define MCF_LCDC_LIER_GW_UDR_ERR_EN (0x00000080) - -/* Bit definitions and macros for MCF_LCDC_LISR */ -#define MCF_LCDC_LISR_BOF (0x00000001) -#define MCF_LCDC_LISR_EOF (0x00000002) -#define MCF_LCDC_LISR_ERR_RES (0x00000004) -#define MCF_LCDC_LISR_UDR_ERR (0x00000008) -#define MCF_LCDC_LISR_GW_BOF (0x00000010) -#define MCF_LCDC_LISR_GW_EOF (0x00000020) -#define MCF_LCDC_LISR_GW_ERR_RES (0x00000040) -#define MCF_LCDC_LISR_GW_UDR_ERR (0x00000080) - -/* Bit definitions and macros for MCF_LCDC_LGWSAR */ -#define MCF_LCDC_LGWSAR_GWSA(x) (((x)&0x3FFFFFFF)<<2) - -/* Bit definitions and macros for MCF_LCDC_LGWSR */ -#define MCF_LCDC_LGWSR_GWH(x) (((x)&0x000003FF)<<0) -#define MCF_LCDC_LGWSR_GWW(x) (((x)&0x0000003F)<<20) - -/* Bit definitions and macros for MCF_LCDC_LGWVPWR */ -#define MCF_LCDC_LGWVPWR_GWVPW(x) (((x)&0x000003FF)<<0) - -/* Bit definitions and macros for MCF_LCDC_LGWPOR */ -#define MCF_LCDC_LGWPOR_GWPO(x) (((x)&0x0000001F)<<0) - -/* Bit definitions and macros for MCF_LCDC_LGWPR */ -#define MCF_LCDC_LGWPR_GWYP(x) (((x)&0x000003FF)<<0) -#define MCF_LCDC_LGWPR_GWXP(x) (((x)&0x000003FF)<<16) - -/* Bit definitions and macros for MCF_LCDC_LGWCR */ -#define MCF_LCDC_LGWCR_GWCKB(x) (((x)&0x0000003F)<<0) -#define MCF_LCDC_LGWCR_GWCKG(x) (((x)&0x0000003F)<<6) -#define MCF_LCDC_LGWCR_GWCKR(x) (((x)&0x0000003F)<<12) -#define MCF_LCDC_LGWCR_GW_RVS (0x00200000) -#define MCF_LCDC_LGWCR_GWE (0x00400000) -#define MCF_LCDC_LGWCR_GWCKE (0x00800000) -#define MCF_LCDC_LGWCR_GWAV(x) (((x)&0x000000FF)<<24) - -/* Bit definitions and macros for MCF_LCDC_LGWDCR */ -#define MCF_LCDC_LGWDCR_GWTM(x) (((x)&0x0000001F)<<0) -#define MCF_LCDC_LGWDCR_GWHM(x) (((x)&0x0000001F)<<16) -#define MCF_LCDC_LGWDCR_GWBT (0x80000000) - -/* Bit definitions and macros for MCF_LCDC_LSCR */ -#define MCF_LCDC_LSCR_PS_RISE_DELAY(x) (((x)&0x0000003F)<<26) -#define MCF_LCDC_LSCR_CLS_RISE_DELAY(x) (((x)&0x000000FF)<<16) -#define MCF_LCDC_LSCR_REV_TOGGLE_DELAY(x) (((x)&0x0000000F)<<8) -#define MCF_LCDC_LSCR_GRAY_2(x) (((x)&0x0000000F)<<4) -#define MCF_LCDC_LSCR_GRAY_1(x) (((x)&0x0000000F)<<0) - -/* Bit definitions and macros for MCF_LCDC_BPLUT_BASE */ -#define MCF_LCDC_BPLUT_BASE_BASE(x) (((x)&0xFFFFFFFF)<<0) - -/* Bit definitions and macros for MCF_LCDC_GWLUT_BASE */ -#define MCF_LCDC_GWLUT_BASE_BASE(x) (((x)&0xFFFFFFFF)<<0) - -/********************************************************************* - * - * Phase Locked Loop (PLL) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_PLL_PODR MCF_REG08(0xFC0C0000) -#define MCF_PLL_PLLCR MCF_REG08(0xFC0C0004) -#define MCF_PLL_PMDR MCF_REG08(0xFC0C0008) -#define MCF_PLL_PFDR MCF_REG08(0xFC0C000C) - -/* Bit definitions and macros for MCF_PLL_PODR */ -#define MCF_PLL_PODR_BUSDIV(x) (((x)&0x0F)<<0) -#define MCF_PLL_PODR_CPUDIV(x) (((x)&0x0F)<<4) - -/* Bit definitions and macros for MCF_PLL_PLLCR */ -#define MCF_PLL_PLLCR_DITHDEV(x) (((x)&0x07)<<0) -#define MCF_PLL_PLLCR_DITHEN (0x80) - -/* Bit definitions and macros for MCF_PLL_PMDR */ -#define MCF_PLL_PMDR_MODDIV(x) (((x)&0xFF)<<0) - -/* Bit definitions and macros for MCF_PLL_PFDR */ -#define MCF_PLL_PFDR_MFD(x) (((x)&0xFF)<<0) - -/********************************************************************* - * - * System Control Module Registers (SCM) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_SCM_MPR MCF_REG32(0xFC000000) -#define MCF_SCM_PACRA MCF_REG32(0xFC000020) -#define MCF_SCM_PACRB MCF_REG32(0xFC000024) -#define MCF_SCM_PACRC MCF_REG32(0xFC000028) -#define MCF_SCM_PACRD MCF_REG32(0xFC00002C) -#define MCF_SCM_PACRE MCF_REG32(0xFC000040) -#define MCF_SCM_PACRF MCF_REG32(0xFC000044) - -#define MCF_SCM_BCR MCF_REG32(0xFC040024) - -/********************************************************************* - * - * SDRAM Controller (SDRAMC) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_SDRAMC_SDMR MCF_REG32(0xFC0B8000) -#define MCF_SDRAMC_SDCR MCF_REG32(0xFC0B8004) -#define MCF_SDRAMC_SDCFG1 MCF_REG32(0xFC0B8008) -#define MCF_SDRAMC_SDCFG2 MCF_REG32(0xFC0B800C) -#define MCF_SDRAMC_LIMP_FIX MCF_REG32(0xFC0B8080) -#define MCF_SDRAMC_SDDS MCF_REG32(0xFC0B8100) -#define MCF_SDRAMC_SDCS0 MCF_REG32(0xFC0B8110) -#define MCF_SDRAMC_SDCS1 MCF_REG32(0xFC0B8114) -#define MCF_SDRAMC_SDCS2 MCF_REG32(0xFC0B8118) -#define MCF_SDRAMC_SDCS3 MCF_REG32(0xFC0B811C) -#define MCF_SDRAMC_SDCS(x) MCF_REG32(0xFC0B8110+((x)*0x004)) - -/* Bit definitions and macros for MCF_SDRAMC_SDMR */ -#define MCF_SDRAMC_SDMR_CMD (0x00010000) -#define MCF_SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18) -#define MCF_SDRAMC_SDMR_BNKAD(x) (((x)&0x00000003)<<30) -#define MCF_SDRAMC_SDMR_BNKAD_LMR (0x00000000) -#define MCF_SDRAMC_SDMR_BNKAD_LEMR (0x40000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCR */ -#define MCF_SDRAMC_SDCR_IPALL (0x00000002) -#define MCF_SDRAMC_SDCR_IREF (0x00000004) -#define MCF_SDRAMC_SDCR_DQS_OE(x) (((x)&0x0000000F)<<8) -#define MCF_SDRAMC_SDCR_PS(x) (((x)&0x00000003)<<12) -#define MCF_SDRAMC_SDCR_RCNT(x) (((x)&0x0000003F)<<16) -#define MCF_SDRAMC_SDCR_OE_RULE (0x00400000) -#define MCF_SDRAMC_SDCR_MUX(x) (((x)&0x00000003)<<24) -#define MCF_SDRAMC_SDCR_REF (0x10000000) -#define MCF_SDRAMC_SDCR_DDR (0x20000000) -#define MCF_SDRAMC_SDCR_CKE (0x40000000) -#define MCF_SDRAMC_SDCR_MODE_EN (0x80000000) -#define MCF_SDRAMC_SDCR_PS_16 (0x00002000) -#define MCF_SDRAMC_SDCR_PS_32 (0x00000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG1 */ -#define MCF_SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4) -#define MCF_SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8) -#define MCF_SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12) -#define MCF_SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16) -#define MCF_SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20) -#define MCF_SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24) -#define MCF_SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28) - -/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */ -#define MCF_SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16) -#define MCF_SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20) -#define MCF_SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24) -#define MCF_SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28) - -/* Device Errata - LIMP mode work around */ -#define MCF_SDRAMC_REFRESH (0x40000000) - -/* Bit definitions and macros for MCF_SDRAMC_SDDS */ -#define MCF_SDRAMC_SDDS_SB_D(x) (((x)&0x00000003)<<0) -#define MCF_SDRAMC_SDDS_SB_S(x) (((x)&0x00000003)<<2) -#define MCF_SDRAMC_SDDS_SB_A(x) (((x)&0x00000003)<<4) -#define MCF_SDRAMC_SDDS_SB_C(x) (((x)&0x00000003)<<6) -#define MCF_SDRAMC_SDDS_SB_E(x) (((x)&0x00000003)<<8) - -/* Bit definitions and macros for MCF_SDRAMC_SDCS */ -#define MCF_SDRAMC_SDCS_CSSZ(x) (((x)&0x0000001F)<<0) -#define MCF_SDRAMC_SDCS_BASE(x) (((x)&0x00000FFF)<<20) -#define MCF_SDRAMC_SDCS_BA(x) ((x)&0xFFF00000) -#define MCF_SDRAMC_SDCS_CSSZ_DIABLE (0x00000000) -#define MCF_SDRAMC_SDCS_CSSZ_1MBYTE (0x00000013) -#define MCF_SDRAMC_SDCS_CSSZ_2MBYTE (0x00000014) -#define MCF_SDRAMC_SDCS_CSSZ_4MBYTE (0x00000015) -#define MCF_SDRAMC_SDCS_CSSZ_8MBYTE (0x00000016) -#define MCF_SDRAMC_SDCS_CSSZ_16MBYTE (0x00000017) -#define MCF_SDRAMC_SDCS_CSSZ_32MBYTE (0x00000018) -#define MCF_SDRAMC_SDCS_CSSZ_64MBYTE (0x00000019) -#define MCF_SDRAMC_SDCS_CSSZ_128MBYTE (0x0000001A) -#define MCF_SDRAMC_SDCS_CSSZ_256MBYTE (0x0000001B) -#define MCF_SDRAMC_SDCS_CSSZ_512MBYTE (0x0000001C) -#define MCF_SDRAMC_SDCS_CSSZ_1GBYTE (0x0000001D) -#define MCF_SDRAMC_SDCS_CSSZ_2GBYTE (0x0000001E) -#define MCF_SDRAMC_SDCS_CSSZ_4GBYTE (0x0000001F) - -/********************************************************************* - * - * FlexCAN module registers - * - *********************************************************************/ -#define MCF_FLEXCAN_BASEADDR(x) (0xFC020000+(x)*0x0800) -#define MCF_FLEXCAN_CANMCR(x) MCF_REG32(0xFC020000+(x)*0x0800+0x00) -#define MCF_FLEXCAN_CANCTRL(x) MCF_REG32(0xFC020000+(x)*0x0800+0x04) -#define MCF_FLEXCAN_TIMER(x) MCF_REG32(0xFC020000+(x)*0x0800+0x08) -#define MCF_FLEXCAN_RXGMASK(x) MCF_REG32(0xFC020000+(x)*0x0800+0x10) -#define MCF_FLEXCAN_RX14MASK(x) MCF_REG32(0xFC020000+(x)*0x0800+0x14) -#define MCF_FLEXCAN_RX15MASK(x) MCF_REG32(0xFC020000+(x)*0x0800+0x18) -#define MCF_FLEXCAN_ERRCNT(x) MCF_REG32(0xFC020000+(x)*0x0800+0x1C) -#define MCF_FLEXCAN_ERRSTAT(x) MCF_REG32(0xFC020000+(x)*0x0800+0x20) -#define MCF_FLEXCAN_IMASK(x) MCF_REG32(0xFC020000+(x)*0x0800+0x28) -#define MCF_FLEXCAN_IFLAG(x) MCF_REG32(0xFC020000+(x)*0x0800+0x30) - -#define MCF_FLEXCAN_MB_CNT(x,y) MCF_REG32(0xFC020080+(x)*0x0800+(y)*0x10+0x0) -#define MCF_FLEXCAN_MB_ID(x,y) MCF_REG32(0xFC020080+(x)*0x0800+(y)*0x10+0x4) -#define MCF_FLEXCAN_MB_DB(x,y,z) MCF_REG08(0xFC020080+(x)*0x0800+(y)*0x10+0x8+(z)*0x1) - -/* - * FlexCAN Module Configuration Register - */ -#define CANMCR_MDIS (0x80000000) -#define CANMCR_FRZ (0x40000000) -#define CANMCR_HALT (0x10000000) -#define CANMCR_SOFTRST (0x02000000) -#define CANMCR_FRZACK (0x01000000) -#define CANMCR_SUPV (0x00800000) -#define CANMCR_MAXMB(x) ((x)&0x0F) - -/* - * FlexCAN Control Register - */ -#define CANCTRL_PRESDIV(x) (((x)&0xFF)<<24) -#define CANCTRL_RJW(x) (((x)&0x03)<<22) -#define CANCTRL_PSEG1(x) (((x)&0x07)<<19) -#define CANCTRL_PSEG2(x) (((x)&0x07)<<16) -#define CANCTRL_BOFFMSK (0x00008000) -#define CANCTRL_ERRMSK (0x00004000) -#define CANCTRL_CLKSRC (0x00002000) -#define CANCTRL_LPB (0x00001000) -#define CANCTRL_SAMP (0x00000080) -#define CANCTRL_BOFFREC (0x00000040) -#define CANCTRL_TSYNC (0x00000020) -#define CANCTRL_LBUF (0x00000010) -#define CANCTRL_LOM (0x00000008) -#define CANCTRL_PROPSEG(x) ((x)&0x07) - -/* - * FlexCAN Error Counter Register - */ -#define ERRCNT_RXECTR(x) (((x)&0xFF)<<8) -#define ERRCNT_TXECTR(x) ((x)&0xFF) - -/* - * FlexCAN Error and Status Register - */ -#define ERRSTAT_BITERR(x) (((x)&0x03)<<14) -#define ERRSTAT_ACKERR (0x00002000) -#define ERRSTAT_CRCERR (0x00001000) -#define ERRSTAT_FRMERR (0x00000800) -#define ERRSTAT_STFERR (0x00000400) -#define ERRSTAT_TXWRN (0x00000200) -#define ERRSTAT_RXWRN (0x00000100) -#define ERRSTAT_IDLE (0x00000080) -#define ERRSTAT_TXRX (0x00000040) -#define ERRSTAT_FLTCONF(x) (((x)&0x03)<<4) -#define ERRSTAT_BOFFINT (0x00000004) -#define ERRSTAT_ERRINT (0x00000002) - -/* - * Interrupt Mask Register - */ -#define IMASK_BUF15M (0x8000) -#define IMASK_BUF14M (0x4000) -#define IMASK_BUF13M (0x2000) -#define IMASK_BUF12M (0x1000) -#define IMASK_BUF11M (0x0800) -#define IMASK_BUF10M (0x0400) -#define IMASK_BUF9M (0x0200) -#define IMASK_BUF8M (0x0100) -#define IMASK_BUF7M (0x0080) -#define IMASK_BUF6M (0x0040) -#define IMASK_BUF5M (0x0020) -#define IMASK_BUF4M (0x0010) -#define IMASK_BUF3M (0x0008) -#define IMASK_BUF2M (0x0004) -#define IMASK_BUF1M (0x0002) -#define IMASK_BUF0M (0x0001) -#define IMASK_BUFnM(x) (0x1<<(x)) -#define IMASK_BUFF_ENABLE_ALL (0x1111) -#define IMASK_BUFF_DISABLE_ALL (0x0000) - -/* - * Interrupt Flag Register - */ -#define IFLAG_BUF15M (0x8000) -#define IFLAG_BUF14M (0x4000) -#define IFLAG_BUF13M (0x2000) -#define IFLAG_BUF12M (0x1000) -#define IFLAG_BUF11M (0x0800) -#define IFLAG_BUF10M (0x0400) -#define IFLAG_BUF9M (0x0200) -#define IFLAG_BUF8M (0x0100) -#define IFLAG_BUF7M (0x0080) -#define IFLAG_BUF6M (0x0040) -#define IFLAG_BUF5M (0x0020) -#define IFLAG_BUF4M (0x0010) -#define IFLAG_BUF3M (0x0008) -#define IFLAG_BUF2M (0x0004) -#define IFLAG_BUF1M (0x0002) -#define IFLAG_BUF0M (0x0001) -#define IFLAG_BUFF_SET_ALL (0xFFFF) -#define IFLAG_BUFF_CLEAR_ALL (0x0000) -#define IFLAG_BUFnM(x) (0x1<<(x)) - -/* - * Message Buffers - */ -#define MB_CNT_CODE(x) (((x)&0x0F)<<24) -#define MB_CNT_SRR (0x00400000) -#define MB_CNT_IDE (0x00200000) -#define MB_CNT_RTR (0x00100000) -#define MB_CNT_LENGTH(x) (((x)&0x0F)<<16) -#define MB_CNT_TIMESTAMP(x) ((x)&0xFFFF) -#define MB_ID_STD(x) (((x)&0x07FF)<<18) -#define MB_ID_EXT(x) ((x)&0x3FFFF) - -/********************************************************************* - * - * Edge Port Module (EPORT) - * - *********************************************************************/ - -/* Register read/write macros */ -#define MCF_EPORT_EPPAR MCF_REG16(0xFC094000) -#define MCF_EPORT_EPDDR MCF_REG08(0xFC094002) -#define MCF_EPORT_EPIER MCF_REG08(0xFC094003) -#define MCF_EPORT_EPDR MCF_REG08(0xFC094004) -#define MCF_EPORT_EPPDR MCF_REG08(0xFC094005) -#define MCF_EPORT_EPFR MCF_REG08(0xFC094006) - -/* Bit definitions and macros for MCF_EPORT_EPPAR */ -#define MCF_EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2) -#define MCF_EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4) -#define MCF_EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6) -#define MCF_EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8) -#define MCF_EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10) -#define MCF_EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12) -#define MCF_EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14) -#define MCF_EPORT_EPPAR_LEVEL (0) -#define MCF_EPORT_EPPAR_RISING (1) -#define MCF_EPORT_EPPAR_FALLING (2) -#define MCF_EPORT_EPPAR_BOTH (3) -#define MCF_EPORT_EPPAR_EPPA7_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA7_RISING (0x4000) -#define MCF_EPORT_EPPAR_EPPA7_FALLING (0x8000) -#define MCF_EPORT_EPPAR_EPPA7_BOTH (0xC000) -#define MCF_EPORT_EPPAR_EPPA6_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA6_RISING (0x1000) -#define MCF_EPORT_EPPAR_EPPA6_FALLING (0x2000) -#define MCF_EPORT_EPPAR_EPPA6_BOTH (0x3000) -#define MCF_EPORT_EPPAR_EPPA5_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA5_RISING (0x0400) -#define MCF_EPORT_EPPAR_EPPA5_FALLING (0x0800) -#define MCF_EPORT_EPPAR_EPPA5_BOTH (0x0C00) -#define MCF_EPORT_EPPAR_EPPA4_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA4_RISING (0x0100) -#define MCF_EPORT_EPPAR_EPPA4_FALLING (0x0200) -#define MCF_EPORT_EPPAR_EPPA4_BOTH (0x0300) -#define MCF_EPORT_EPPAR_EPPA3_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA3_RISING (0x0040) -#define MCF_EPORT_EPPAR_EPPA3_FALLING (0x0080) -#define MCF_EPORT_EPPAR_EPPA3_BOTH (0x00C0) -#define MCF_EPORT_EPPAR_EPPA2_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA2_RISING (0x0010) -#define MCF_EPORT_EPPAR_EPPA2_FALLING (0x0020) -#define MCF_EPORT_EPPAR_EPPA2_BOTH (0x0030) -#define MCF_EPORT_EPPAR_EPPA1_LEVEL (0x0000) -#define MCF_EPORT_EPPAR_EPPA1_RISING (0x0004) -#define MCF_EPORT_EPPAR_EPPA1_FALLING (0x0008) -#define MCF_EPORT_EPPAR_EPPA1_BOTH (0x000C) - -/* Bit definitions and macros for MCF_EPORT_EPDDR */ -#define MCF_EPORT_EPDDR_EPDD1 (0x02) -#define MCF_EPORT_EPDDR_EPDD2 (0x04) -#define MCF_EPORT_EPDDR_EPDD3 (0x08) -#define MCF_EPORT_EPDDR_EPDD4 (0x10) -#define MCF_EPORT_EPDDR_EPDD5 (0x20) -#define MCF_EPORT_EPDDR_EPDD6 (0x40) -#define MCF_EPORT_EPDDR_EPDD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPIER */ -#define MCF_EPORT_EPIER_EPIE1 (0x02) -#define MCF_EPORT_EPIER_EPIE2 (0x04) -#define MCF_EPORT_EPIER_EPIE3 (0x08) -#define MCF_EPORT_EPIER_EPIE4 (0x10) -#define MCF_EPORT_EPIER_EPIE5 (0x20) -#define MCF_EPORT_EPIER_EPIE6 (0x40) -#define MCF_EPORT_EPIER_EPIE7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPDR */ -#define MCF_EPORT_EPDR_EPD1 (0x02) -#define MCF_EPORT_EPDR_EPD2 (0x04) -#define MCF_EPORT_EPDR_EPD3 (0x08) -#define MCF_EPORT_EPDR_EPD4 (0x10) -#define MCF_EPORT_EPDR_EPD5 (0x20) -#define MCF_EPORT_EPDR_EPD6 (0x40) -#define MCF_EPORT_EPDR_EPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPPDR */ -#define MCF_EPORT_EPPDR_EPPD1 (0x02) -#define MCF_EPORT_EPPDR_EPPD2 (0x04) -#define MCF_EPORT_EPPDR_EPPD3 (0x08) -#define MCF_EPORT_EPPDR_EPPD4 (0x10) -#define MCF_EPORT_EPPDR_EPPD5 (0x20) -#define MCF_EPORT_EPPDR_EPPD6 (0x40) -#define MCF_EPORT_EPPDR_EPPD7 (0x80) - -/* Bit definitions and macros for MCF_EPORT_EPFR */ -#define MCF_EPORT_EPFR_EPF1 (0x02) -#define MCF_EPORT_EPFR_EPF2 (0x04) -#define MCF_EPORT_EPFR_EPF3 (0x08) -#define MCF_EPORT_EPFR_EPF4 (0x10) -#define MCF_EPORT_EPFR_EPF5 (0x20) -#define MCF_EPORT_EPFR_EPF6 (0x40) -#define MCF_EPORT_EPFR_EPF7 (0x80) - -/********************************************************************/ -#endif /* m532xsim_h */ diff --git a/include/asm-m68knommu/m5407sim.h b/include/asm-m68knommu/m5407sim.h deleted file mode 100644 index cc22c4a..0000000 --- a/include/asm-m68knommu/m5407sim.h +++ /dev/null @@ -1,157 +0,0 @@ -/****************************************************************************/ - -/* - * m5407sim.h -- ColdFire 5407 System Integration Module support. - * - * (C) Copyright 2000, Lineo (www.lineo.com) - * (C) Copyright 1999, Moreton Bay Ventures Pty Ltd. - * - * Modified by David W. Miller for the MCF5307 Eval Board. - */ - -/****************************************************************************/ -#ifndef m5407sim_h -#define m5407sim_h -/****************************************************************************/ - -/* - * Define the 5407 SIM register set addresses. - */ -#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */ -#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w)*/ -#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */ -#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */ -#define MCFSIM_PAR 0x04 /* Pin Assignment reg (r/w) */ -#define MCFSIM_IRQPAR 0x06 /* Interrupt Assignment reg (r/w) */ -#define MCFSIM_PLLCR 0x08 /* PLL Controll Reg*/ -#define MCFSIM_MPARK 0x0C /* BUS Master Control Reg*/ -#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */ -#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */ -#define MCFSIM_AVR 0x4b /* Autovector Ctrl reg (r/w) */ -#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */ -#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */ -#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */ -#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */ -#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */ -#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */ -#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */ -#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */ -#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */ -#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */ -#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */ -#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */ - -#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */ -#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */ -#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */ -#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */ -#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */ -#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */ - -#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */ -#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */ -#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */ -#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */ -#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */ -#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */ -#define MCFSIM_CSAR4 0xb0 /* CS 4 Address reg (r/w) */ -#define MCFSIM_CSMR4 0xb4 /* CS 4 Mask reg (r/w) */ -#define MCFSIM_CSCR4 0xba /* CS 4 Control reg (r/w) */ -#define MCFSIM_CSAR5 0xbc /* CS 5 Address reg (r/w) */ -#define MCFSIM_CSMR5 0xc0 /* CS 5 Mask reg (r/w) */ -#define MCFSIM_CSCR5 0xc6 /* CS 5 Control reg (r/w) */ -#define MCFSIM_CSAR6 0xc8 /* CS 6 Address reg (r/w) */ -#define MCFSIM_CSMR6 0xcc /* CS 6 Mask reg (r/w) */ -#define MCFSIM_CSCR6 0xd2 /* CS 6 Control reg (r/w) */ -#define MCFSIM_CSAR7 0xd4 /* CS 7 Address reg (r/w) */ -#define MCFSIM_CSMR7 0xd8 /* CS 7 Mask reg (r/w) */ -#define MCFSIM_CSCR7 0xde /* CS 7 Control reg (r/w) */ - -#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */ -#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */ -#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */ -#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */ - -#define MCFSIM_PADDR 0x244 /* Parallel Direction (r/w) */ -#define MCFSIM_PADAT 0x248 /* Parallel Data (r/w) */ - - -/* - * Some symbol defines for the above... - */ -#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */ -#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */ -#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */ -#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */ -#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */ -#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */ -#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */ -#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */ -#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ - -/* - * Macro to set IMR register. It is 32 bits on the 5407. - */ -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) - - -/* - * Some symbol defines for the Parallel Port Pin Assignment Register - */ -#define MCFSIM_PAR_DREQ0 0x40 /* Set to select DREQ0 input */ - /* Clear to select par I/O */ -#define MCFSIM_PAR_DREQ1 0x20 /* Select DREQ1 input */ - /* Clear to select par I/O */ - -/* - * Defines for the IRQPAR Register - */ -#define IRQ5_LEVEL4 0x80 -#define IRQ3_LEVEL6 0x40 -#define IRQ1_LEVEL2 0x20 - - -/* - * Define the Cache register flags. - */ -#define CACR_DEC 0x80000000 /* Enable data cache */ -#define CACR_DWP 0x40000000 /* Data write protection */ -#define CACR_DESB 0x20000000 /* Enable data store buffer */ -#define CACR_DDPI 0x10000000 /* Disable CPUSHL */ -#define CACR_DHCLK 0x08000000 /* Half data cache lock mode */ -#define CACR_DDCM_WT 0x00000000 /* Write through cache*/ -#define CACR_DDCM_CP 0x02000000 /* Copyback cache */ -#define CACR_DDCM_P 0x04000000 /* No cache, precise */ -#define CACR_DDCM_IMP 0x06000000 /* No cache, imprecise */ -#define CACR_DCINVA 0x01000000 /* Invalidate data cache */ -#define CACR_BEC 0x00080000 /* Enable branch cache */ -#define CACR_BCINVA 0x00040000 /* Invalidate branch cache */ -#define CACR_IEC 0x00008000 /* Enable instruction cache */ -#define CACR_DNFB 0x00002000 /* Inhibited fill buffer */ -#define CACR_IDPI 0x00001000 /* Disable CPUSHL */ -#define CACR_IHLCK 0x00000800 /* Intruction cache half lock */ -#define CACR_IDCM 0x00000400 /* Intruction cache inhibit */ -#define CACR_ICINVA 0x00000100 /* Invalidate instr cache */ - -#define ACR_BASE_POS 24 /* Address Base */ -#define ACR_MASK_POS 16 /* Address Mask */ -#define ACR_ENABLE 0x00008000 /* Enable address */ -#define ACR_USER 0x00000000 /* User mode access only */ -#define ACR_SUPER 0x00002000 /* Supervisor mode only */ -#define ACR_ANY 0x00004000 /* Match any access mode */ -#define ACR_CM_WT 0x00000000 /* Write through mode */ -#define ACR_CM_CP 0x00000020 /* Copyback mode */ -#define ACR_CM_OFF_PRE 0x00000040 /* No cache, precise */ -#define ACR_CM_OFF_IMP 0x00000060 /* No cache, imprecise */ -#define ACR_WPROTECT 0x00000004 /* Write protect */ - -/****************************************************************************/ -#endif /* m5407sim_h */ diff --git a/include/asm-m68knommu/m68360.h b/include/asm-m68knommu/m68360.h deleted file mode 100644 index eb7d39e..0000000 --- a/include/asm-m68knommu/m68360.h +++ /dev/null @@ -1,13 +0,0 @@ -#include "m68360_regs.h" -#include "m68360_pram.h" -#include "m68360_quicc.h" -#include "m68360_enet.h" - -#ifdef CONFIG_M68360 - -#define CPM_INTERRUPT 4 - -/* see MC68360 User's Manual, p. 7-377 */ -#define CPM_VECTOR_BASE 0x04 /* 3 MSbits of CPM vector */ - -#endif /* CONFIG_M68360 */ diff --git a/include/asm-m68knommu/m68360_enet.h b/include/asm-m68knommu/m68360_enet.h deleted file mode 100644 index c36f4d0..0000000 --- a/include/asm-m68knommu/m68360_enet.h +++ /dev/null @@ -1,177 +0,0 @@ -/*********************************** - * $Id: m68360_enet.h,v 1.1 2002/03/02 15:01:07 gerg Exp $ - *********************************** - * - *************************************** - * Definitions for the ETHERNET controllers - *************************************** - */ - -#ifndef __ETHER_H -#define __ETHER_H - -#include "quicc_simple.h" - -/* - * transmit BD's - */ -#define T_R 0x8000 /* ready bit */ -#define E_T_PAD 0x4000 /* short frame padding */ -#define T_W 0x2000 /* wrap bit */ -#define T_I 0x1000 /* interrupt on completion */ -#define T_L 0x0800 /* last in frame */ -#define T_TC 0x0400 /* transmit CRC (when last) */ - -#define T_DEF 0x0200 /* defer indication */ -#define T_HB 0x0100 /* heartbeat */ -#define T_LC 0x0080 /* error: late collision */ -#define T_RL 0x0040 /* error: retransmission limit */ -#define T_RC 0x003c /* retry count */ -#define T_UN 0x0002 /* error: underrun */ -#define T_CSL 0x0001 /* carier sense lost */ -#define T_ERROR (T_HB | T_LC | T_RL | T_UN | T_CSL) - -/* - * receive BD's - */ -#define R_E 0x8000 /* buffer empty */ -#define R_W 0x2000 /* wrap bit */ -#define R_I 0x1000 /* interrupt on reception */ -#define R_L 0x0800 /* last BD in frame */ -#define R_F 0x0400 /* first BD in frame */ -#define R_M 0x0100 /* received because of promisc. mode */ - -#define R_LG 0x0020 /* frame too long */ -#define R_NO 0x0010 /* non-octet aligned */ -#define R_SH 0x0008 /* short frame */ -#define R_CR 0x0004 /* receive CRC error */ -#define R_OV 0x0002 /* receive overrun */ -#define R_CL 0x0001 /* collision */ -#define ETHER_R_ERROR (R_LG | R_NO | R_SH | R_CR | R_OV | R_CL) - - -/* - * ethernet interrupts - */ -#define ETHERNET_GRA 0x0080 /* graceful stop complete */ -#define ETHERNET_TXE 0x0010 /* transmit error */ -#define ETHERNET_RXF 0x0008 /* receive frame */ -#define ETHERNET_BSY 0x0004 /* busy condition */ -#define ETHERNET_TXB 0x0002 /* transmit buffer */ -#define ETHERNET_RXB 0x0001 /* receive buffer */ - -/* - * ethernet protocol specific mode register (PSMR) - */ -#define ETHER_HBC 0x8000 /* heartbeat checking */ -#define ETHER_FC 0x4000 /* force collision */ -#define ETHER_RSH 0x2000 /* receive short frames */ -#define ETHER_IAM 0x1000 /* individual address mode */ -#define ETHER_CRC_32 (0x2<<10) /* Enable CRC */ -#define ETHER_PRO 0x0200 /* promiscuous */ -#define ETHER_BRO 0x0100 /* broadcast address */ -#define ETHER_SBT 0x0080 /* stop backoff timer */ -#define ETHER_LPB 0x0040 /* Loop Back Mode */ -#define ETHER_SIP 0x0020 /* sample input pins */ -#define ETHER_LCW 0x0010 /* late collision window */ -#define ETHER_NIB_13 (0x0<<1) /* # of ignored bits 13 */ -#define ETHER_NIB_14 (0x1<<1) /* # of ignored bits 14 */ -#define ETHER_NIB_15 (0x2<<1) /* # of ignored bits 15 */ -#define ETHER_NIB_16 (0x3<<1) /* # of ignored bits 16 */ -#define ETHER_NIB_21 (0x4<<1) /* # of ignored bits 21 */ -#define ETHER_NIB_22 (0x5<<1) /* # of ignored bits 22 */ -#define ETHER_NIB_23 (0x6<<1) /* # of ignored bits 23 */ -#define ETHER_NIB_24 (0x7<<1) /* # of ignored bits 24 */ - -/* - * ethernet specific parameters - */ -#define CRC_WORD 4 /* Length in bytes of CRC */ -#define C_PRES 0xffffffff /* preform 32 bit CRC */ -#define C_MASK 0xdebb20e3 /* comply with 32 bit CRC */ -#define CRCEC 0x00000000 -#define ALEC 0x00000000 -#define DISFC 0x00000000 -#define PADS 0x00000000 -#define RET_LIM 0x000f /* retry 15 times to send a frame before interrupt */ -#define ETH_MFLR 0x05ee /* 1518 max frame size */ -#define MINFLR 0x0040 /* Minimum frame size 64 */ -#define MAXD1 0x05ee /* Max dma count 1518 */ -#define MAXD2 0x05ee -#define GADDR1 0x00000000 /* Clear group address */ -#define GADDR2 0x00000000 -#define GADDR3 0x00000000 -#define GADDR4 0x00000000 -#define P_PER 0x00000000 /*not used */ -#define IADDR1 0x00000000 /* Individual hash table not used */ -#define IADDR2 0x00000000 -#define IADDR3 0x00000000 -#define IADDR4 0x00000000 -#define TADDR_H 0x00000000 /* clear this regs */ -#define TADDR_M 0x00000000 -#define TADDR_L 0x00000000 - -/* SCC Parameter Ram */ -#define RFCR 0x18 /* normal operation */ -#define TFCR 0x18 /* normal operation */ -#define E_MRBLR 1518 /* Max ethernet frame length */ - -/* - * ethernet specific structure - */ -typedef union { - unsigned char b[6]; - struct { - unsigned short high; - unsigned short middl; - unsigned short low; - } w; -} ETHER_ADDR; - -typedef struct { - int max_frame_length; - int promisc_mode; - int reject_broadcast; - ETHER_ADDR phys_adr; -} ETHER_SPECIFIC; - -typedef struct { - ETHER_ADDR dst_addr; - ETHER_ADDR src_addr; - unsigned short type_or_len; - unsigned char data[1]; -} ETHER_FRAME; - -#define MAX_DATALEN 1500 -typedef struct { - ETHER_ADDR dst_addr; - ETHER_ADDR src_addr; - unsigned short type_or_len; - unsigned char data[MAX_DATALEN]; - unsigned char fcs[CRC_WORD]; -} ETHER_MAX_FRAME; - - -/* - * Internal ethernet function prototypes - */ -void ether_interrupt(int scc_num); -/* mleslie: debug */ -/* static void ethernet_rx_internal(int scc_num); */ -/* static void ethernet_tx_internal(int scc_num); */ - -/* - * User callable routines prototypes (ethernet specific) - */ -void ethernet_init(int scc_number, - alloc_routine *alloc_buffer, - free_routine *free_buffer, - store_rx_buffer_routine *store_rx_buffer, - handle_tx_error_routine *handle_tx_error, - handle_rx_error_routine *handle_rx_error, - handle_lost_error_routine *handle_lost_error, - ETHER_SPECIFIC *ether_spec); -int ethernet_tx(int scc_number, void *buf, int length); - -#endif - diff --git a/include/asm-m68knommu/m68360_pram.h b/include/asm-m68knommu/m68360_pram.h deleted file mode 100644 index e6088bb..0000000 --- a/include/asm-m68knommu/m68360_pram.h +++ /dev/null @@ -1,431 +0,0 @@ -/*********************************** - * $Id: m68360_pram.h,v 1.1 2002/03/02 15:01:07 gerg Exp $ - *********************************** - * - *************************************** - * Definitions of the parameter area RAM. - * Note that different structures are overlaid - * at the same offsets for the different modes - * of operation. - *************************************** - */ - -#ifndef __PRAM_H -#define __PRAM_H - -/* Time slot assignment table */ -#define VALID_SLOT 0x8000 -#define WRAP_SLOT 0x4000 - -/***************************************************************** - Global Multichannel parameter RAM -*****************************************************************/ -struct global_multi_pram { - /* - * Global Multichannel parameter RAM - */ - unsigned long mcbase; /* Multichannel Base pointer */ - unsigned short qmcstate; /* Multichannel Controller state */ - unsigned short mrblr; /* Maximum Receive Buffer Length */ - unsigned short tx_s_ptr; /* TSTATx Pointer */ - unsigned short rxptr; /* Current Time slot entry in TSATRx */ - unsigned short grfthr; /* Global Receive frame threshold */ - unsigned short grfcnt; /* Global Receive Frame Count */ - unsigned long intbase; /* Multichannel Base address */ - unsigned long iintptr; /* Pointer to interrupt queue */ - unsigned short rx_s_ptr; /* TSTARx Pointer */ - - unsigned short txptr; /* Current Time slot entry in TSATTx */ - unsigned long c_mask32; /* CRC Constant (debb20e3) */ - unsigned short tsatrx[32]; /* Time Slot Assignment Table Rx */ - unsigned short tsattx[32]; /* Time Slot Assignment Table Tx */ - unsigned short c_mask16; /* CRC Constant (f0b8) */ -}; - -/***************************************************************** - Quicc32 HDLC parameter RAM -*****************************************************************/ -struct quicc32_pram { - - unsigned short tbase; /* Tx Buffer Descriptors Base Address */ - unsigned short chamr; /* Channel Mode Register */ - unsigned long tstate; /* Tx Internal State */ - unsigned long txintr; /* Tx Internal Data Pointer */ - unsigned short tbptr; /* Tx Buffer Descriptor Pointer */ - unsigned short txcntr; /* Tx Internal Byte Count */ - unsigned long tupack; /* (Tx Temp) */ - unsigned long zistate; /* Zero Insertion machine state */ - unsigned long tcrc; /* Temp Transmit CRC */ - unsigned short intmask; /* Channel's interrupt mask flags */ - unsigned short bdflags; - unsigned short rbase; /* Rx Buffer Descriptors Base Address */ - unsigned short mflr; /* Max Frame Length Register */ - unsigned long rstate; /* Rx Internal State */ - unsigned long rxintr; /* Rx Internal Data Pointer */ - unsigned short rbptr; /* Rx Buffer Descriptor Pointer */ - unsigned short rxbyc; /* Rx Internal Byte Count */ - unsigned long rpack; /* (Rx Temp) */ - unsigned long zdstate; /* Zero Deletion machine state */ - unsigned long rcrc; /* Temp Transmit CRC */ - unsigned short maxc; /* Max_length counter */ - unsigned short tmp_mb; /* Temp */ -}; - - -/***************************************************************** - HDLC parameter RAM -*****************************************************************/ - -struct hdlc_pram { - /* - * SCC parameter RAM - */ - unsigned short rbase; /* RX BD base address */ - unsigned short tbase; /* TX BD base address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned long rcrc; /* temp receive CRC */ - unsigned long tcrc; /* temp transmit CRC */ - - /* - * HDLC specific parameter RAM - */ - unsigned char RESERVED1[4]; /* Reserved area */ - unsigned long c_mask; /* CRC constant */ - unsigned long c_pres; /* CRC preset */ - unsigned short disfc; /* discarded frame counter */ - unsigned short crcec; /* CRC error counter */ - unsigned short abtsc; /* abort sequence counter */ - unsigned short nmarc; /* nonmatching address rx cnt */ - unsigned short retrc; /* frame retransmission cnt */ - unsigned short mflr; /* maximum frame length reg */ - unsigned short max_cnt; /* maximum length counter */ - unsigned short rfthr; /* received frames threshold */ - unsigned short rfcnt; /* received frames count */ - unsigned short hmask; /* user defined frm addr mask */ - unsigned short haddr1; /* user defined frm address 1 */ - unsigned short haddr2; /* user defined frm address 2 */ - unsigned short haddr3; /* user defined frm address 3 */ - unsigned short haddr4; /* user defined frm address 4 */ - unsigned short tmp; /* temp */ - unsigned short tmp_mb; /* temp */ -}; - - - -/***************************************************************** - UART parameter RAM -*****************************************************************/ - -/* - * bits in uart control characters table - */ -#define CC_INVALID 0x8000 /* control character is valid */ -#define CC_REJ 0x4000 /* don't store char in buffer */ -#define CC_CHAR 0x00ff /* control character */ - -/* UART */ -struct uart_pram { - /* - * SCC parameter RAM - */ - unsigned short rbase; /* RX BD base address */ - unsigned short tbase; /* TX BD base address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rx_temp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned long rcrc; /* temp receive CRC */ - unsigned long tcrc; /* temp transmit CRC */ - - /* - * UART specific parameter RAM - */ - unsigned char RESERVED1[8]; /* Reserved area */ - unsigned short max_idl; /* maximum idle characters */ - unsigned short idlc; /* rx idle counter (internal) */ - unsigned short brkcr; /* break count register */ - - unsigned short parec; /* Rx parity error counter */ - unsigned short frmer; /* Rx framing error counter */ - unsigned short nosec; /* Rx noise counter */ - unsigned short brkec; /* Rx break character counter */ - unsigned short brkln; /* Reaceive break length */ - - unsigned short uaddr1; /* address character 1 */ - unsigned short uaddr2; /* address character 2 */ - unsigned short rtemp; /* temp storage */ - unsigned short toseq; /* Tx out of sequence char */ - unsigned short cc[8]; /* Rx control characters */ - unsigned short rccm; /* Rx control char mask */ - unsigned short rccr; /* Rx control char register */ - unsigned short rlbc; /* Receive last break char */ -}; - - - -/***************************************************************** - BISYNC parameter RAM -*****************************************************************/ - -struct bisync_pram { - /* - * SCC parameter RAM - */ - unsigned short rbase; /* RX BD base address */ - unsigned short tbase; /* TX BD base address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned long rcrc; /* temp receive CRC */ - unsigned long tcrc; /* temp transmit CRC */ - - /* - * BISYNC specific parameter RAM - */ - unsigned char RESERVED1[4]; /* Reserved area */ - unsigned long crcc; /* CRC Constant Temp Value */ - unsigned short prcrc; /* Preset Receiver CRC-16/LRC */ - unsigned short ptcrc; /* Preset Transmitter CRC-16/LRC */ - unsigned short parec; /* Receive Parity Error Counter */ - unsigned short bsync; /* BISYNC SYNC Character */ - unsigned short bdle; /* BISYNC DLE Character */ - unsigned short cc[8]; /* Rx control characters */ - unsigned short rccm; /* Receive Control Character Mask */ -}; - -/***************************************************************** - IOM2 parameter RAM - (overlaid on tx bd[5] of SCC channel[2]) -*****************************************************************/ -struct iom2_pram { - unsigned short ci_data; /* ci data */ - unsigned short monitor_data; /* monitor data */ - unsigned short tstate; /* transmitter state */ - unsigned short rstate; /* receiver state */ -}; - -/***************************************************************** - SPI/SMC parameter RAM - (overlaid on tx bd[6,7] of SCC channel[2]) -*****************************************************************/ - -#define SPI_R 0x8000 /* Ready bit in BD */ - -struct spi_pram { - unsigned short rbase; /* Rx BD Base Address */ - unsigned short tbase; /* Tx BD Base Address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ -}; - -struct smc_uart_pram { - unsigned short rbase; /* Rx BD Base Address */ - unsigned short tbase; /* Tx BD Base Address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned short max_idl; /* Maximum IDLE Characters */ - unsigned short idlc; /* Temporary IDLE Counter */ - unsigned short brkln; /* Last Rx Break Length */ - unsigned short brkec; /* Rx Break Condition Counter */ - unsigned short brkcr; /* Break Count Register (Tx) */ - unsigned short r_mask; /* Temporary bit mask */ -}; - -struct smc_trnsp_pram { - unsigned short rbase; /* rx BD Base Address */ - unsigned short tbase; /* Tx BD Base Address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned short reserved[5]; /* Reserved */ -}; - -struct idma_pram { - unsigned short ibase; /* IDMA BD Base Address */ - unsigned short ibptr; /* IDMA buffer descriptor pointer */ - unsigned long istate; /* IDMA internal state */ - unsigned long itemp; /* IDMA temp */ -}; - -struct ethernet_pram { - /* - * SCC parameter RAM - */ - unsigned short rbase; /* RX BD base address */ - unsigned short tbase; /* TX BD base address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned long rcrc; /* temp receive CRC */ - unsigned long tcrc; /* temp transmit CRC */ - - /* - * ETHERNET specific parameter RAM - */ - unsigned long c_pres; /* preset CRC */ - unsigned long c_mask; /* constant mask for CRC */ - unsigned long crcec; /* CRC error counter */ - unsigned long alec; /* alighnment error counter */ - unsigned long disfc; /* discard frame counter */ - unsigned short pads; /* short frame PAD characters */ - unsigned short ret_lim; /* retry limit threshold */ - unsigned short ret_cnt; /* retry limit counter */ - unsigned short mflr; /* maximum frame length reg */ - unsigned short minflr; /* minimum frame length reg */ - unsigned short maxd1; /* maximum DMA1 length reg */ - unsigned short maxd2; /* maximum DMA2 length reg */ - unsigned short maxd; /* rx max DMA */ - unsigned short dma_cnt; /* rx dma counter */ - unsigned short max_b; /* max bd byte count */ - unsigned short gaddr1; /* group address filter 1 */ - unsigned short gaddr2; /* group address filter 2 */ - unsigned short gaddr3; /* group address filter 3 */ - unsigned short gaddr4; /* group address filter 4 */ - unsigned long tbuf0_data0; /* save area 0 - current frm */ - unsigned long tbuf0_data1; /* save area 1 - current frm */ - unsigned long tbuf0_rba0; - unsigned long tbuf0_crc; - unsigned short tbuf0_bcnt; - union { - unsigned char b[6]; - struct { - unsigned short high; - unsigned short middl; - unsigned short low; - } w; - } paddr; - unsigned short p_per; /* persistence */ - unsigned short rfbd_ptr; /* rx first bd pointer */ - unsigned short tfbd_ptr; /* tx first bd pointer */ - unsigned short tlbd_ptr; /* tx last bd pointer */ - unsigned long tbuf1_data0; /* save area 0 - next frame */ - unsigned long tbuf1_data1; /* save area 1 - next frame */ - unsigned long tbuf1_rba0; - unsigned long tbuf1_crc; - unsigned short tbuf1_bcnt; - unsigned short tx_len; /* tx frame length counter */ - unsigned short iaddr1; /* individual address filter 1*/ - unsigned short iaddr2; /* individual address filter 2*/ - unsigned short iaddr3; /* individual address filter 3*/ - unsigned short iaddr4; /* individual address filter 4*/ - unsigned short boff_cnt; /* back-off counter */ - unsigned short taddr_h; /* temp address (MSB) */ - unsigned short taddr_m; /* temp address */ - unsigned short taddr_l; /* temp address (LSB) */ -}; - -struct transparent_pram { - /* - * SCC parameter RAM - */ - unsigned short rbase; /* RX BD base address */ - unsigned short tbase; /* TX BD base address */ - unsigned char rfcr; /* Rx function code */ - unsigned char tfcr; /* Tx function code */ - unsigned short mrblr; /* Rx buffer length */ - unsigned long rstate; /* Rx internal state */ - unsigned long rptr; /* Rx internal data pointer */ - unsigned short rbptr; /* rb BD Pointer */ - unsigned short rcount; /* Rx internal byte count */ - unsigned long rtemp; /* Rx temp */ - unsigned long tstate; /* Tx internal state */ - unsigned long tptr; /* Tx internal data pointer */ - unsigned short tbptr; /* Tx BD pointer */ - unsigned short tcount; /* Tx byte count */ - unsigned long ttemp; /* Tx temp */ - unsigned long rcrc; /* temp receive CRC */ - unsigned long tcrc; /* temp transmit CRC */ - - /* - * TRANSPARENT specific parameter RAM - */ - unsigned long crc_p; /* CRC Preset */ - unsigned long crc_c; /* CRC constant */ -}; - -struct timer_pram { - /* - * RISC timers parameter RAM - */ - unsigned short tm_base; /* RISC timer table base adr */ - unsigned short tm_ptr; /* RISC timer table pointer */ - unsigned short r_tmr; /* RISC timer mode register */ - unsigned short r_tmv; /* RISC timer valid register */ - unsigned long tm_cmd; /* RISC timer cmd register */ - unsigned long tm_cnt; /* RISC timer internal cnt */ -}; - -#endif diff --git a/include/asm-m68knommu/m68360_quicc.h b/include/asm-m68knommu/m68360_quicc.h deleted file mode 100644 index 6d40f4d..0000000 --- a/include/asm-m68knommu/m68360_quicc.h +++ /dev/null @@ -1,362 +0,0 @@ -/*********************************** - * $Id: m68360_quicc.h,v 1.1 2002/03/02 15:01:07 gerg Exp $ - *********************************** - * - *************************************** - * Definitions of QUICC memory structures - *************************************** - */ - -#ifndef __M68360_QUICC_H -#define __M68360_QUICC_H - -/* - * include registers and - * parameter ram definitions files - */ -#include -#include - - - -/* Buffer Descriptors */ -typedef struct quicc_bd { - volatile unsigned short status; - volatile unsigned short length; - volatile unsigned char *buf; /* WARNING: This is only true if *char is 32 bits */ -} QUICC_BD; - - -#ifdef MOTOROLA_ORIGINAL -struct user_data { - /* BASE + 0x000: user data memory */ - volatile unsigned char udata_bd_ucode[0x400]; /*user data bd's Ucode*/ - volatile unsigned char udata_bd[0x200]; /*user data Ucode */ - volatile unsigned char ucode_ext[0x100]; /*Ucode Extention ram */ - volatile unsigned char RESERVED1[0x500]; /* Reserved area */ -}; -#else -struct user_data { - /* BASE + 0x000: user data memory */ - volatile unsigned char udata_bd_ucode[0x400]; /* user data, bds, Ucode*/ - volatile unsigned char udata_bd1[0x200]; /* user, bds */ - volatile unsigned char ucode_bd_scratch[0x100]; /* user, bds, ucode scratch */ - volatile unsigned char udata_bd2[0x100]; /* user, bds */ - volatile unsigned char RESERVED1[0x400]; /* Reserved area */ -}; -#endif - - -/* - * internal ram - */ -typedef struct quicc { - union { - struct quicc32_pram ch_pram_tbl[32]; /* 32*64(bytes) per channel */ - struct user_data u; - }ch_or_u; /* multipul or user space */ - - /* BASE + 0xc00: PARAMETER RAM */ - union { - struct scc_pram { - union { - struct hdlc_pram h; - struct uart_pram u; - struct bisync_pram b; - struct transparent_pram t; - unsigned char RESERVED66[0x70]; - } pscc; /* scc parameter area (protocol dependent) */ - union { - struct { - unsigned char RESERVED70[0x10]; - struct spi_pram spi; - unsigned char RESERVED72[0x8]; - struct timer_pram timer; - } timer_spi; - struct { - struct idma_pram idma; - unsigned char RESERVED67[0x4]; - union { - struct smc_uart_pram u; - struct smc_trnsp_pram t; - } psmc; - } idma_smc; - } pothers; - } scc; - struct ethernet_pram enet_scc; - struct global_multi_pram m; - unsigned char pr[0x100]; - } pram[4]; - - /* reserved */ - - /* BASE + 0x1000: INTERNAL REGISTERS */ - /* SIM */ - volatile unsigned long sim_mcr; /* module configuration reg */ - volatile unsigned short sim_simtr; /* module test register */ - volatile unsigned char RESERVED2[0x2]; /* Reserved area */ - volatile unsigned char sim_avr; /* auto vector reg */ - volatile unsigned char sim_rsr; /* reset status reg */ - volatile unsigned char RESERVED3[0x2]; /* Reserved area */ - volatile unsigned char sim_clkocr; /* CLCO control register */ - volatile unsigned char RESERVED62[0x3]; /* Reserved area */ - volatile unsigned short sim_pllcr; /* PLL control register */ - volatile unsigned char RESERVED63[0x2]; /* Reserved area */ - volatile unsigned short sim_cdvcr; /* Clock devider control register */ - volatile unsigned short sim_pepar; /* Port E pin assignment register */ - volatile unsigned char RESERVED64[0xa]; /* Reserved area */ - volatile unsigned char sim_sypcr; /* system protection control*/ - volatile unsigned char sim_swiv; /* software interrupt vector*/ - volatile unsigned char RESERVED6[0x2]; /* Reserved area */ - volatile unsigned short sim_picr; /* periodic interrupt control reg */ - volatile unsigned char RESERVED7[0x2]; /* Reserved area */ - volatile unsigned short sim_pitr; /* periodic interrupt timing reg */ - volatile unsigned char RESERVED8[0x3]; /* Reserved area */ - volatile unsigned char sim_swsr; /* software service */ - volatile unsigned long sim_bkar; /* breakpoint address register*/ - volatile unsigned long sim_bkcr; /* breakpoint control register*/ - volatile unsigned char RESERVED10[0x8]; /* Reserved area */ - /* MEMC */ - volatile unsigned long memc_gmr; /* Global memory register */ - volatile unsigned short memc_mstat; /* MEMC status register */ - volatile unsigned char RESERVED11[0xa]; /* Reserved area */ - volatile unsigned long memc_br0; /* base register 0 */ - volatile unsigned long memc_or0; /* option register 0 */ - volatile unsigned char RESERVED12[0x8]; /* Reserved area */ - volatile unsigned long memc_br1; /* base register 1 */ - volatile unsigned long memc_or1; /* option register 1 */ - volatile unsigned char RESERVED13[0x8]; /* Reserved area */ - volatile unsigned long memc_br2; /* base register 2 */ - volatile unsigned long memc_or2; /* option register 2 */ - volatile unsigned char RESERVED14[0x8]; /* Reserved area */ - volatile unsigned long memc_br3; /* base register 3 */ - volatile unsigned long memc_or3; /* option register 3 */ - volatile unsigned char RESERVED15[0x8]; /* Reserved area */ - volatile unsigned long memc_br4; /* base register 3 */ - volatile unsigned long memc_or4; /* option register 3 */ - volatile unsigned char RESERVED16[0x8]; /* Reserved area */ - volatile unsigned long memc_br5; /* base register 3 */ - volatile unsigned long memc_or5; /* option register 3 */ - volatile unsigned char RESERVED17[0x8]; /* Reserved area */ - volatile unsigned long memc_br6; /* base register 3 */ - volatile unsigned long memc_or6; /* option register 3 */ - volatile unsigned char RESERVED18[0x8]; /* Reserved area */ - volatile unsigned long memc_br7; /* base register 3 */ - volatile unsigned long memc_or7; /* option register 3 */ - volatile unsigned char RESERVED9[0x28]; /* Reserved area */ - /* TEST */ - volatile unsigned short test_tstmra; /* master shift a */ - volatile unsigned short test_tstmrb; /* master shift b */ - volatile unsigned short test_tstsc; /* shift count */ - volatile unsigned short test_tstrc; /* repetition counter */ - volatile unsigned short test_creg; /* control */ - volatile unsigned short test_dreg; /* destributed register */ - volatile unsigned char RESERVED58[0x404]; /* Reserved area */ - /* IDMA1 */ - volatile unsigned short idma_iccr; /* channel configuration reg*/ - volatile unsigned char RESERVED19[0x2]; /* Reserved area */ - volatile unsigned short idma1_cmr; /* dma mode reg */ - volatile unsigned char RESERVED68[0x2]; /* Reserved area */ - volatile unsigned long idma1_sapr; /* dma source addr ptr */ - volatile unsigned long idma1_dapr; /* dma destination addr ptr */ - volatile unsigned long idma1_bcr; /* dma byte count reg */ - volatile unsigned char idma1_fcr; /* function code reg */ - volatile unsigned char RESERVED20; /* Reserved area */ - volatile unsigned char idma1_cmar; /* channel mask reg */ - volatile unsigned char RESERVED21; /* Reserved area */ - volatile unsigned char idma1_csr; /* channel status reg */ - volatile unsigned char RESERVED22[0x3]; /* Reserved area */ - /* SDMA */ - volatile unsigned char sdma_sdsr; /* status reg */ - volatile unsigned char RESERVED23; /* Reserved area */ - volatile unsigned short sdma_sdcr; /* configuration reg */ - volatile unsigned long sdma_sdar; /* address reg */ - /* IDMA2 */ - volatile unsigned char RESERVED69[0x2]; /* Reserved area */ - volatile unsigned short idma2_cmr; /* dma mode reg */ - volatile unsigned long idma2_sapr; /* dma source addr ptr */ - volatile unsigned long idma2_dapr; /* dma destination addr ptr */ - volatile unsigned long idma2_bcr; /* dma byte count reg */ - volatile unsigned char idma2_fcr; /* function code reg */ - volatile unsigned char RESERVED24; /* Reserved area */ - volatile unsigned char idma2_cmar; /* channel mask reg */ - volatile unsigned char RESERVED25; /* Reserved area */ - volatile unsigned char idma2_csr; /* channel status reg */ - volatile unsigned char RESERVED26[0x7]; /* Reserved area */ - /* Interrupt Controller */ - volatile unsigned long intr_cicr; /* CP interrupt configuration reg*/ - volatile unsigned long intr_cipr; /* CP interrupt pending reg */ - volatile unsigned long intr_cimr; /* CP interrupt mask reg */ - volatile unsigned long intr_cisr; /* CP interrupt in service reg*/ - /* Parallel I/O */ - volatile unsigned short pio_padir; /* port A data direction reg */ - volatile unsigned short pio_papar; /* port A pin assignment reg */ - volatile unsigned short pio_paodr; /* port A open drain reg */ - volatile unsigned short pio_padat; /* port A data register */ - volatile unsigned char RESERVED28[0x8]; /* Reserved area */ - volatile unsigned short pio_pcdir; /* port C data direction reg*/ - volatile unsigned short pio_pcpar; /* port C pin assignment reg*/ - volatile unsigned short pio_pcso; /* port C special options */ - volatile unsigned short pio_pcdat; /* port C data register */ - volatile unsigned short pio_pcint; /* port C interrupt cntrl reg */ - volatile unsigned char RESERVED29[0x16]; /* Reserved area */ - /* Timer */ - volatile unsigned short timer_tgcr; /* timer global configuration reg */ - volatile unsigned char RESERVED30[0xe]; /* Reserved area */ - volatile unsigned short timer_tmr1; /* timer 1 mode reg */ - volatile unsigned short timer_tmr2; /* timer 2 mode reg */ - volatile unsigned short timer_trr1; /* timer 1 referance reg */ - volatile unsigned short timer_trr2; /* timer 2 referance reg */ - volatile unsigned short timer_tcr1; /* timer 1 capture reg */ - volatile unsigned short timer_tcr2; /* timer 2 capture reg */ - volatile unsigned short timer_tcn1; /* timer 1 counter reg */ - volatile unsigned short timer_tcn2; /* timer 2 counter reg */ - volatile unsigned short timer_tmr3; /* timer 3 mode reg */ - volatile unsigned short timer_tmr4; /* timer 4 mode reg */ - volatile unsigned short timer_trr3; /* timer 3 referance reg */ - volatile unsigned short timer_trr4; /* timer 4 referance reg */ - volatile unsigned short timer_tcr3; /* timer 3 capture reg */ - volatile unsigned short timer_tcr4; /* timer 4 capture reg */ - volatile unsigned short timer_tcn3; /* timer 3 counter reg */ - volatile unsigned short timer_tcn4; /* timer 4 counter reg */ - volatile unsigned short timer_ter1; /* timer 1 event reg */ - volatile unsigned short timer_ter2; /* timer 2 event reg */ - volatile unsigned short timer_ter3; /* timer 3 event reg */ - volatile unsigned short timer_ter4; /* timer 4 event reg */ - volatile unsigned char RESERVED34[0x8]; /* Reserved area */ - /* CP */ - volatile unsigned short cp_cr; /* command register */ - volatile unsigned char RESERVED35[0x2]; /* Reserved area */ - volatile unsigned short cp_rccr; /* main configuration reg */ - volatile unsigned char RESERVED37; /* Reserved area */ - volatile unsigned char cp_rmds; /* development support status reg */ - volatile unsigned long cp_rmdr; /* development support control reg */ - volatile unsigned short cp_rctr1; /* ram break register 1 */ - volatile unsigned short cp_rctr2; /* ram break register 2 */ - volatile unsigned short cp_rctr3; /* ram break register 3 */ - volatile unsigned short cp_rctr4; /* ram break register 4 */ - volatile unsigned char RESERVED59[0x2]; /* Reserved area */ - volatile unsigned short cp_rter; /* RISC timers event reg */ - volatile unsigned char RESERVED38[0x2]; /* Reserved area */ - volatile unsigned short cp_rtmr; /* RISC timers mask reg */ - volatile unsigned char RESERVED39[0x14]; /* Reserved area */ - /* BRG */ - union { - volatile unsigned long l; - struct { - volatile unsigned short BRGC_RESERV:14; - volatile unsigned short rst:1; - volatile unsigned short en:1; - volatile unsigned short extc:2; - volatile unsigned short atb:1; - volatile unsigned short cd:12; - volatile unsigned short div16:1; - } b; - } brgc[4]; /* BRG1-BRG4 configuration regs*/ - /* SCC registers */ - struct scc_regs { - union { - struct { - /* Low word. */ - volatile unsigned short GSMR_RESERV2:1; - volatile unsigned short edge:2; - volatile unsigned short tci:1; - volatile unsigned short tsnc:2; - volatile unsigned short rinv:1; - volatile unsigned short tinv:1; - volatile unsigned short tpl:3; - volatile unsigned short tpp:2; - volatile unsigned short tend:1; - volatile unsigned short tdcr:2; - volatile unsigned short rdcr:2; - volatile unsigned short renc:3; - volatile unsigned short tenc:3; - volatile unsigned short diag:2; - volatile unsigned short enr:1; - volatile unsigned short ent:1; - volatile unsigned short mode:4; - /* High word. */ - volatile unsigned short GSMR_RESERV1:14; - volatile unsigned short pri:1; - volatile unsigned short gde:1; - volatile unsigned short tcrc:2; - volatile unsigned short revd:1; - volatile unsigned short trx:1; - volatile unsigned short ttx:1; - volatile unsigned short cdp:1; - volatile unsigned short ctsp:1; - volatile unsigned short cds:1; - volatile unsigned short ctss:1; - volatile unsigned short tfl:1; - volatile unsigned short rfw:1; - volatile unsigned short txsy:1; - volatile unsigned short synl:2; - volatile unsigned short rtsm:1; - volatile unsigned short rsyn:1; - } b; - struct { - volatile unsigned long low; - volatile unsigned long high; - } w; - } scc_gsmr; /* SCC general mode reg */ - volatile unsigned short scc_psmr; /* protocol specific mode reg */ - volatile unsigned char RESERVED42[0x2]; /* Reserved area */ - volatile unsigned short scc_todr; /* SCC transmit on demand */ - volatile unsigned short scc_dsr; /* SCC data sync reg */ - volatile unsigned short scc_scce; /* SCC event reg */ - volatile unsigned char RESERVED43[0x2];/* Reserved area */ - volatile unsigned short scc_sccm; /* SCC mask reg */ - volatile unsigned char RESERVED44[0x1];/* Reserved area */ - volatile unsigned char scc_sccs; /* SCC status reg */ - volatile unsigned char RESERVED45[0x8]; /* Reserved area */ - } scc_regs[4]; - /* SMC */ - struct smc_regs { - volatile unsigned char RESERVED46[0x2]; /* Reserved area */ - volatile unsigned short smc_smcmr; /* SMC mode reg */ - volatile unsigned char RESERVED60[0x2]; /* Reserved area */ - volatile unsigned char smc_smce; /* SMC event reg */ - volatile unsigned char RESERVED47[0x3]; /* Reserved area */ - volatile unsigned char smc_smcm; /* SMC mask reg */ - volatile unsigned char RESERVED48[0x5]; /* Reserved area */ - } smc_regs[2]; - /* SPI */ - volatile unsigned short spi_spmode; /* SPI mode reg */ - volatile unsigned char RESERVED51[0x4]; /* Reserved area */ - volatile unsigned char spi_spie; /* SPI event reg */ - volatile unsigned char RESERVED52[0x3]; /* Reserved area */ - volatile unsigned char spi_spim; /* SPI mask reg */ - volatile unsigned char RESERVED53[0x2]; /* Reserved area */ - volatile unsigned char spi_spcom; /* SPI command reg */ - volatile unsigned char RESERVED54[0x4]; /* Reserved area */ - /* PIP */ - volatile unsigned short pip_pipc; /* pip configuration reg */ - volatile unsigned char RESERVED65[0x2]; /* Reserved area */ - volatile unsigned short pip_ptpr; /* pip timing parameters reg */ - volatile unsigned long pip_pbdir; /* port b data direction reg */ - volatile unsigned long pip_pbpar; /* port b pin assignment reg */ - volatile unsigned long pip_pbodr; /* port b open drain reg */ - volatile unsigned long pip_pbdat; /* port b data reg */ - volatile unsigned char RESERVED71[0x18]; /* Reserved area */ - /* Serial Interface */ - volatile unsigned long si_simode; /* SI mode register */ - volatile unsigned char si_sigmr; /* SI global mode register */ - volatile unsigned char RESERVED55; /* Reserved area */ - volatile unsigned char si_sistr; /* SI status register */ - volatile unsigned char si_sicmr; /* SI command register */ - volatile unsigned char RESERVED56[0x4]; /* Reserved area */ - volatile unsigned long si_sicr; /* SI clock routing */ - volatile unsigned long si_sirp; /* SI ram pointers */ - volatile unsigned char RESERVED57[0xc]; /* Reserved area */ - volatile unsigned short si_siram[0x80]; /* SI routing ram */ -} QUICC; - -#endif - -/* - * Local variables: - * c-indent-level: 4 - * c-basic-offset: 4 - * tab-width: 4 - * End: - */ diff --git a/include/asm-m68knommu/m68360_regs.h b/include/asm-m68knommu/m68360_regs.h deleted file mode 100644 index d57217c..0000000 --- a/include/asm-m68knommu/m68360_regs.h +++ /dev/null @@ -1,408 +0,0 @@ -/*********************************** - * $Id: m68360_regs.h,v 1.2 2002/10/26 15:03:55 gerg Exp $ - *********************************** - * - *************************************** - * Definitions of the QUICC registers - *************************************** - */ - -#ifndef __REGISTERS_H -#define __REGISTERS_H - -#define CLEAR_BIT(x, bit) x =bit - -/***************************************************************** - Command Register -*****************************************************************/ - -/* bit fields within command register */ -#define SOFTWARE_RESET 0x8000 -#define CMD_OPCODE 0x0f00 -#define CMD_CHANNEL 0x00f0 -#define CMD_FLAG 0x0001 - -/* general command opcodes */ -#define INIT_RXTX_PARAMS 0x0000 -#define INIT_RX_PARAMS 0x0100 -#define INIT_TX_PARAMS 0x0200 -#define ENTER_HUNT_MODE 0x0300 -#define STOP_TX 0x0400 -#define GR_STOP_TX 0x0500 -#define RESTART_TX 0x0600 -#define CLOSE_RX_BD 0x0700 -#define SET_ENET_GROUP 0x0800 -#define RESET_ENET_GROUP 0x0900 - -/* quicc32 CP commands */ -#define STOP_TX_32 0x0e00 /*add chan# bits 2-6 */ -#define ENTER_HUNT_MODE_32 0x1e00 - -/* quicc32 mask/event SCC register */ -#define GOV 0x01 -#define GUN 0x02 -#define GINT 0x04 -#define IQOV 0x08 - - -/* Timer commands */ -#define SET_TIMER 0x0800 - -/* Multi channel Interrupt structure */ -#define INTR_VALID 0x8000 /* Valid interrupt entry */ -#define INTR_WRAP 0x4000 /* Wrap bit in the interrupt entry table */ -#define INTR_CH_NU 0x07c0 /* Channel Num in interrupt table */ -#define INTR_MASK_BITS 0x383f - -/* - * General SCC mode register (GSMR) - */ - -#define MODE_HDLC 0x0 -#define MODE_APPLE_TALK 0x2 -#define MODE_SS7 0x3 -#define MODE_UART 0x4 -#define MODE_PROFIBUS 0x5 -#define MODE_ASYNC_HDLC 0x6 -#define MODE_V14 0x7 -#define MODE_BISYNC 0x8 -#define MODE_DDCMP 0x9 -#define MODE_MULTI_CHANNEL 0xa -#define MODE_ETHERNET 0xc - -#define DIAG_NORMAL 0x0 -#define DIAG_LOCAL_LPB 0x1 -#define DIAG_AUTO_ECHO 0x2 -#define DIAG_LBP_ECHO 0x3 - -/* For RENC and TENC fields in GSMR */ -#define ENC_NRZ 0x0 -#define ENC_NRZI 0x1 -#define ENC_FM0 0x2 -#define ENC_MANCH 0x4 -#define ENC_DIFF_MANC 0x6 - -/* For TDCR and RDCR fields in GSMR */ -#define CLOCK_RATE_1 0x0 -#define CLOCK_RATE_8 0x1 -#define CLOCK_RATE_16 0x2 -#define CLOCK_RATE_32 0x3 - -#define TPP_00 0x0 -#define TPP_10 0x1 -#define TPP_01 0x2 -#define TPP_11 0x3 - -#define TPL_NO 0x0 -#define TPL_8 0x1 -#define TPL_16 0x2 -#define TPL_32 0x3 -#define TPL_48 0x4 -#define TPL_64 0x5 -#define TPL_128 0x6 - -#define TSNC_INFINITE 0x0 -#define TSNC_14_65 0x1 -#define TSNC_4_15 0x2 -#define TSNC_3_1 0x3 - -#define EDGE_BOTH 0x0 -#define EDGE_POS 0x1 -#define EDGE_NEG 0x2 -#define EDGE_NO 0x3 - -#define SYNL_NO 0x0 -#define SYNL_4 0x1 -#define SYNL_8 0x2 -#define SYNL_16 0x3 - -#define TCRC_CCITT16 0x0 -#define TCRC_CRC16 0x1 -#define TCRC_CCITT32 0x2 - - -/***************************************************************** - TODR (Transmit on demand) Register -*****************************************************************/ -#define TODR_TOD 0x8000 /* Transmit on demand */ - - -/***************************************************************** - CICR register settings -*****************************************************************/ - -/* note that relative irq priorities of the SCCs can be reordered - * if desired - see p. 7-377 of the MC68360UM */ -#define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ -#define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ -#define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ -#define CICR_SCD_SCC4 ((uint)0x00c00000) /* SCC4 @ SCCd */ - -#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */ -#define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ -#define CICR_VBA_MASK ((uint)0x000000e0) /* Vector Base Address */ -#define CICR_SPS ((uint)0x00000001) /* SCC Spread */ - - -/***************************************************************** - Interrupt bits for CIPR and CIMR (MC68360UM p. 7-379) -*****************************************************************/ - -#define INTR_PIO_PC0 0x80000000 /* parallel I/O C bit 0 */ -#define INTR_SCC1 0x40000000 /* SCC port 1 */ -#define INTR_SCC2 0x20000000 /* SCC port 2 */ -#define INTR_SCC3 0x10000000 /* SCC port 3 */ -#define INTR_SCC4 0x08000000 /* SCC port 4 */ -#define INTR_PIO_PC1 0x04000000 /* parallel i/o C bit 1 */ -#define INTR_TIMER1 0x02000000 /* timer 1 */ -#define INTR_PIO_PC2 0x01000000 /* parallel i/o C bit 2 */ -#define INTR_PIO_PC3 0x00800000 /* parallel i/o C bit 3 */ -#define INTR_SDMA_BERR 0x00400000 /* SDMA channel bus error */ -#define INTR_DMA1 0x00200000 /* idma 1 */ -#define INTR_DMA2 0x00100000 /* idma 2 */ -#define INTR_TIMER2 0x00040000 /* timer 2 */ -#define INTR_CP_TIMER 0x00020000 /* CP timer */ -#define INTR_PIP_STATUS 0x00010000 /* PIP status */ -#define INTR_PIO_PC4 0x00008000 /* parallel i/o C bit 4 */ -#define INTR_PIO_PC5 0x00004000 /* parallel i/o C bit 5 */ -#define INTR_TIMER3 0x00001000 /* timer 3 */ -#define INTR_PIO_PC6 0x00000800 /* parallel i/o C bit 6 */ -#define INTR_PIO_PC7 0x00000400 /* parallel i/o C bit 7 */ -#define INTR_PIO_PC8 0x00000200 /* parallel i/o C bit 8 */ -#define INTR_TIMER4 0x00000080 /* timer 4 */ -#define INTR_PIO_PC9 0x00000040 /* parallel i/o C bit 9 */ -#define INTR_SCP 0x00000020 /* SCP */ -#define INTR_SMC1 0x00000010 /* SMC 1 */ -#define INTR_SMC2 0x00000008 /* SMC 2 */ -#define INTR_PIO_PC10 0x00000004 /* parallel i/o C bit 10 */ -#define INTR_PIO_PC11 0x00000002 /* parallel i/o C bit 11 */ -#define INTR_ERR 0x00000001 /* error */ - - -/***************************************************************** - CPM Interrupt vector encodings (MC68360UM p. 7-376) -*****************************************************************/ - -#define CPMVEC_NR 32 -#define CPMVEC_PIO_PC0 0x1f -#define CPMVEC_SCC1 0x1e -#define CPMVEC_SCC2 0x1d -#define CPMVEC_SCC3 0x1c -#define CPMVEC_SCC4 0x1b -#define CPMVEC_PIO_PC1 0x1a -#define CPMVEC_TIMER1 0x19 -#define CPMVEC_PIO_PC2 0x18 -#define CPMVEC_PIO_PC3 0x17 -#define CPMVEC_SDMA_CB_ERR 0x16 -#define CPMVEC_IDMA1 0x15 -#define CPMVEC_IDMA2 0x14 -#define CPMVEC_RESERVED3 0x13 -#define CPMVEC_TIMER2 0x12 -#define CPMVEC_RISCTIMER 0x11 -#define CPMVEC_RESERVED2 0x10 -#define CPMVEC_PIO_PC4 0x0f -#define CPMVEC_PIO_PC5 0x0e -#define CPMVEC_TIMER3 0x0c -#define CPMVEC_PIO_PC6 0x0b -#define CPMVEC_PIO_PC7 0x0a -#define CPMVEC_PIO_PC8 0x09 -#define CPMVEC_RESERVED1 0x08 -#define CPMVEC_TIMER4 0x07 -#define CPMVEC_PIO_PC9 0x06 -#define CPMVEC_SPI 0x05 -#define CPMVEC_SMC1 0x04 -#define CPMVEC_SMC2 0x03 -#define CPMVEC_PIO_PC10 0x02 -#define CPMVEC_PIO_PC11 0x01 -#define CPMVEC_ERROR 0x00 - -/* #define CPMVEC_PIO_PC0 ((ushort)0x1f) */ -/* #define CPMVEC_SCC1 ((ushort)0x1e) */ -/* #define CPMVEC_SCC2 ((ushort)0x1d) */ -/* #define CPMVEC_SCC3 ((ushort)0x1c) */ -/* #define CPMVEC_SCC4 ((ushort)0x1b) */ -/* #define CPMVEC_PIO_PC1 ((ushort)0x1a) */ -/* #define CPMVEC_TIMER1 ((ushort)0x19) */ -/* #define CPMVEC_PIO_PC2 ((ushort)0x18) */ -/* #define CPMVEC_PIO_PC3 ((ushort)0x17) */ -/* #define CPMVEC_SDMA_CB_ERR ((ushort)0x16) */ -/* #define CPMVEC_IDMA1 ((ushort)0x15) */ -/* #define CPMVEC_IDMA2 ((ushort)0x14) */ -/* #define CPMVEC_RESERVED3 ((ushort)0x13) */ -/* #define CPMVEC_TIMER2 ((ushort)0x12) */ -/* #define CPMVEC_RISCTIMER ((ushort)0x11) */ -/* #define CPMVEC_RESERVED2 ((ushort)0x10) */ -/* #define CPMVEC_PIO_PC4 ((ushort)0x0f) */ -/* #define CPMVEC_PIO_PC5 ((ushort)0x0e) */ -/* #define CPMVEC_TIMER3 ((ushort)0x0c) */ -/* #define CPMVEC_PIO_PC6 ((ushort)0x0b) */ -/* #define CPMVEC_PIO_PC7 ((ushort)0x0a) */ -/* #define CPMVEC_PIO_PC8 ((ushort)0x09) */ -/* #define CPMVEC_RESERVED1 ((ushort)0x08) */ -/* #define CPMVEC_TIMER4 ((ushort)0x07) */ -/* #define CPMVEC_PIO_PC9 ((ushort)0x06) */ -/* #define CPMVEC_SPI ((ushort)0x05) */ -/* #define CPMVEC_SMC1 ((ushort)0x04) */ -/* #define CPMVEC_SMC2 ((ushort)0x03) */ -/* #define CPMVEC_PIO_PC10 ((ushort)0x02) */ -/* #define CPMVEC_PIO_PC11 ((ushort)0x01) */ -/* #define CPMVEC_ERROR ((ushort)0x00) */ - - -/***************************************************************** - * PIO control registers - *****************************************************************/ - -/* Port A - See 360UM p. 7-358 - * - * Note that most of these pins have alternate functions - */ - - -/* The macros are nice, but there are all sorts of references to 1-indexed - * facilities on the 68360... */ -/* #define PA_RXD(n) ((ushort)(0x01<<(2*n))) */ -/* #define PA_TXD(n) ((ushort)(0x02<<(2*n))) */ - -#define PA_RXD1 ((ushort)0x0001) -#define PA_TXD1 ((ushort)0x0002) -#define PA_RXD2 ((ushort)0x0004) -#define PA_TXD2 ((ushort)0x0008) -#define PA_RXD3 ((ushort)0x0010) -#define PA_TXD3 ((ushort)0x0020) -#define PA_RXD4 ((ushort)0x0040) -#define PA_TXD4 ((ushort)0x0080) - -#define PA_CLK1 ((ushort)0x0100) -#define PA_CLK2 ((ushort)0x0200) -#define PA_CLK3 ((ushort)0x0400) -#define PA_CLK4 ((ushort)0x0800) -#define PA_CLK5 ((ushort)0x1000) -#define PA_CLK6 ((ushort)0x2000) -#define PA_CLK7 ((ushort)0x4000) -#define PA_CLK8 ((ushort)0x8000) - - -/* Port B - See 360UM p. 7-362 - */ - - -/* Port C - See 360UM p. 7-365 - */ - -#define PC_RTS1 ((ushort)0x0001) -#define PC_RTS2 ((ushort)0x0002) -#define PC__RTS3 ((ushort)0x0004) /* !RTS3 */ -#define PC__RTS4 ((ushort)0x0008) /* !RTS4 */ - -#define PC_CTS1 ((ushort)0x0010) -#define PC_CD1 ((ushort)0x0020) -#define PC_CTS2 ((ushort)0x0040) -#define PC_CD2 ((ushort)0x0080) -#define PC_CTS3 ((ushort)0x0100) -#define PC_CD3 ((ushort)0x0200) -#define PC_CTS4 ((ushort)0x0400) -#define PC_CD4 ((ushort)0x0800) - - - -/***************************************************************** - chip select option register -*****************************************************************/ -#define DTACK 0xe000 -#define ADR_MASK 0x1ffc -#define RDWR_MASK 0x0002 -#define FC_MASK 0x0001 - -/***************************************************************** - tbase and rbase registers -*****************************************************************/ -#define TBD_ADDR(quicc,pram) ((struct quicc_bd *) \ - (quicc->ch_or_u.u.udata_bd_ucode + pram->tbase)) -#define RBD_ADDR(quicc,pram) ((struct quicc_bd *) \ - (quicc->ch_or_u.u.udata_bd_ucode + pram->rbase)) -#define TBD_CUR_ADDR(quicc,pram) ((struct quicc_bd *) \ - (quicc->ch_or_u.u.udata_bd_ucode + pram->tbptr)) -#define RBD_CUR_ADDR(quicc,pram) ((struct quicc_bd *) \ - (quicc->ch_or_u.u.udata_bd_ucode + pram->rbptr)) -#define TBD_SET_CUR_ADDR(bd,quicc,pram) pram->tbptr = \ - ((unsigned short)((char *)(bd) - (char *)(quicc->ch_or_u.u.udata_bd_ucode))) -#define RBD_SET_CUR_ADDR(bd,quicc,pram) pram->rbptr = \ - ((unsigned short)((char *)(bd) - (char *)(quicc->ch_or_u.u.udata_bd_ucode))) -#define INCREASE_TBD(bd,quicc,pram) { \ - if((bd)->status & T_W) \ - (bd) = TBD_ADDR(quicc,pram); \ - else \ - (bd)++; \ -} -#define DECREASE_TBD(bd,quicc,pram) { \ - if ((bd) == TBD_ADDR(quicc, pram)) \ - while (!((bd)->status & T_W)) \ - (bd)++; \ - else \ - (bd)--; \ -} -#define INCREASE_RBD(bd,quicc,pram) { \ - if((bd)->status & R_W) \ - (bd) = RBD_ADDR(quicc,pram); \ - else \ - (bd)++; \ -} -#define DECREASE_RBD(bd,quicc,pram) { \ - if ((bd) == RBD_ADDR(quicc, pram)) \ - while (!((bd)->status & T_W)) \ - (bd)++; \ - else \ - (bd)--; \ -} - -/***************************************************************** - Macros for Multi channel -*****************************************************************/ -#define QMC_BASE(quicc,page) (struct global_multi_pram *)(&quicc->pram[page]) -#define MCBASE(quicc,page) (unsigned long)(quicc->pram[page].m.mcbase) -#define CHANNEL_PRAM_BASE(quicc,channel) ((struct quicc32_pram *) \ - (&(quicc->ch_or_u.ch_pram_tbl[channel]))) -#define TBD_32_ADDR(quicc,page,channel) ((struct quicc_bd *) \ - (MCBASE(quicc,page) + (CHANNEL_PRAM_BASE(quicc,channel)->tbase))) -#define RBD_32_ADDR(quicc,page,channel) ((struct quicc_bd *) \ - (MCBASE(quicc,page) + (CHANNEL_PRAM_BASE(quicc,channel)->rbase))) -#define TBD_32_CUR_ADDR(quicc,page,channel) ((struct quicc_bd *) \ - (MCBASE(quicc,page) + (CHANNEL_PRAM_BASE(quicc,channel)->tbptr))) -#define RBD_32_CUR_ADDR(quicc,page,channel) ((struct quicc_bd *) \ - (MCBASE(quicc,page) + (CHANNEL_PRAM_BASE(quicc,channel)->rbptr))) -#define TBD_32_SET_CUR_ADDR(bd,quicc,page,channel) \ - CHANNEL_PRAM_BASE(quicc,channel)->tbptr = \ - ((unsigned short)((char *)(bd) - (char *)(MCBASE(quicc,page)))) -#define RBD_32_SET_CUR_ADDR(bd,quicc,page,channel) \ - CHANNEL_PRAM_BASE(quicc,channel)->rbptr = \ - ((unsigned short)((char *)(bd) - (char *)(MCBASE(quicc,page)))) - -#define INCREASE_TBD_32(bd,quicc,page,channel) { \ - if((bd)->status & T_W) \ - (bd) = TBD_32_ADDR(quicc,page,channel); \ - else \ - (bd)++; \ -} -#define DECREASE_TBD_32(bd,quicc,page,channel) { \ - if ((bd) == TBD_32_ADDR(quicc, page,channel)) \ - while (!((bd)->status & T_W)) \ - (bd)++; \ - else \ - (bd)--; \ -} -#define INCREASE_RBD_32(bd,quicc,page,channel) { \ - if((bd)->status & R_W) \ - (bd) = RBD_32_ADDR(quicc,page,channel); \ - else \ - (bd)++; \ -} -#define DECREASE_RBD_32(bd,quicc,page,channel) { \ - if ((bd) == RBD_32_ADDR(quicc, page,channel)) \ - while (!((bd)->status & T_W)) \ - (bd)++; \ - else \ - (bd)--; \ -} - -#endif diff --git a/include/asm-m68knommu/machdep.h b/include/asm-m68knommu/machdep.h deleted file mode 100644 index de9f47a..0000000 --- a/include/asm-m68knommu/machdep.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef _M68KNOMMU_MACHDEP_H -#define _M68KNOMMU_MACHDEP_H - -#include - -/* Hardware clock functions */ -extern void hw_timer_init(void); -extern unsigned long hw_timer_offset(void); - -extern irqreturn_t arch_timer_interrupt(int irq, void *dummy); - -/* Machine dependent time handling */ -extern void (*mach_gettod)(int *year, int *mon, int *day, int *hour, - int *min, int *sec); -extern int (*mach_set_clock_mmss)(unsigned long); - -/* machine dependent power off functions */ -extern void (*mach_reset)( void ); -extern void (*mach_halt)( void ); -extern void (*mach_power_off)( void ); - -extern void config_BSP(char *command, int len); - -extern void do_IRQ(int irq, struct pt_regs *fp); - -#endif /* _M68KNOMMU_MACHDEP_H */ diff --git a/include/asm-m68knommu/math-emu.h b/include/asm-m68knommu/math-emu.h deleted file mode 100644 index 7e70905..0000000 --- a/include/asm-m68knommu/math-emu.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/mc146818rtc.h b/include/asm-m68knommu/mc146818rtc.h deleted file mode 100644 index 907a0481..0000000 --- a/include/asm-m68knommu/mc146818rtc.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef _M68KNOMMU_MC146818RTC_H -#define _M68KNOMMU_MC146818RTC_H - -/* empty include file to satisfy the include in genrtc.c/ide-geometry.c */ - -#endif /* _M68KNOMMU_MC146818RTC_H */ diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h deleted file mode 100644 index c042634..0000000 --- a/include/asm-m68knommu/mcfcache.h +++ /dev/null @@ -1,150 +0,0 @@ -/****************************************************************************/ - -/* - * mcfcache.h -- ColdFire CPU cache support code - * - * (C) Copyright 2004, Greg Ungerer - */ - -/****************************************************************************/ -#ifndef __M68KNOMMU_MCFCACHE_H -#define __M68KNOMMU_MCFCACHE_H -/****************************************************************************/ - - -/* - * The different ColdFire families have different cache arrangments. - * Everything from a small instruction only cache, to configurable - * data and/or instruction cache, to unified instruction/data, to - * harvard style separate instruction and data caches. - */ - -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272) -/* - * Simple version 2 core cache. These have instruction cache only, - * we just need to invalidate it and enable it. - */ -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate cache cmd */ - movec %d0,%CACR /* do invalidate cache */ - movel #0x80000100,%d0 /* setup cache mask */ - movec %d0,%CACR /* enable cache */ -.endm -#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */ - -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) -/* - * New version 2 cores have a configurable split cache arrangement. - * For now I am just enabling instruction cache - but ultimately I - * think a split instruction/data cache would be better. - */ -.macro CACHE_ENABLE - movel #0x01400000,%d0 - movec %d0,%CACR /* invalidate cache */ - nop - movel #0x0000c000,%d0 /* set SDRAM cached only */ - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0x80400100,%d0 /* configure cache */ - movec %d0,%CACR /* enable cache */ - nop -.endm -#endif /* CONFIG_M523x || CONFIG_M527x */ - -#if defined(CONFIG_M528x) -.macro CACHE_ENABLE - nop - movel #0x01000000, %d0 - movec %d0, %CACR /* Invalidate cache */ - nop - movel #0x0000c020, %d0 /* Set SDRAM cached only */ - movec %d0, %ACR0 - movel #0x00000000, %d0 /* No other regions cached */ - movec %d0, %ACR1 - movel #0x80000200, %d0 /* Setup cache mask */ - movec %d0, %CACR /* Enable cache */ - nop -.endm -#endif /* CONFIG_M528x */ - -#if defined(CONFIG_M5249) || defined(CONFIG_M5307) -/* - * The version 3 core cache. Oddly enough the version 2 core 5249 - * has the same SDRAM and cache setup as the version 3 cores. - * This is a single unified instruction/data cache. - */ -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop -#if defined(DEBUGGER_COMPATIBLE_CACHE) || defined(CONFIG_SECUREEDGEMP3) - movel #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ -#else - movel #0x0000c020,%d0 /* set SDRAM cached (copyback) */ -#endif - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0xa0000200,%d0 /* enable cache */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M5249 || CONFIG_M5307 */ - -#if defined(CONFIG_M532x) -.macro CACHE_ENABLE - movel #0x01000000,%d0 /* invalidate cache cmd */ - movec %d0,%CACR /* do invalidate cache */ - nop - movel #0x4001C000,%d0 /* set SDRAM cached (write-thru) */ - movec %d0,%ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - movel #0x80000200,%d0 /* setup cache mask */ - movec %d0,%CACR /* enable cache */ - nop -.endm -#endif /* CONFIG_M532x */ - -#if defined(CONFIG_M5407) -/* - * Version 4 cores have a true harvard style separate instruction - * and data cache. Invalidate and enable cache, also enable write - * buffers and branch accelerator. - */ -.macro CACHE_ENABLE - movel #0x01040100,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop - movel #0x000fc000,%d0 /* set SDRAM cached only */ - movec %d0, %ACR0 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0, %ACR1 - movel #0x000fc000,%d0 /* set SDRAM cached only */ - movec %d0, %ACR2 - movel #0x00000000,%d0 /* no other regions cached */ - movec %d0, %ACR3 - movel #0xb6088400,%d0 /* enable caches */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M5407 */ - -#if defined(CONFIG_M520x) -.macro CACHE_ENABLE - move.l #0x01000000,%d0 /* invalidate whole cache */ - movec %d0,%CACR - nop - move.l #0x0000c000,%d0 /* set SDRAM cached (write-thru) */ - movec %d0,%ACR0 - move.l #0x00000000,%d0 /* no other regions cached */ - movec %d0,%ACR1 - move.l #0x80400000,%d0 /* enable 8K instruction cache */ - movec %d0,%CACR - nop -.endm -#endif /* CONFIG_M520x */ - -/****************************************************************************/ -#endif /* __M68KNOMMU_MCFCACHE_H */ diff --git a/include/asm-m68knommu/mcfdma.h b/include/asm-m68knommu/mcfdma.h deleted file mode 100644 index 705c52c..0000000 --- a/include/asm-m68knommu/mcfdma.h +++ /dev/null @@ -1,144 +0,0 @@ -/****************************************************************************/ - -/* - * mcfdma.h -- Coldfire internal DMA support defines. - * - * (C) Copyright 1999, Rob Scott (rscott@mtrob.ml.org) - */ - -/****************************************************************************/ -#ifndef mcfdma_h -#define mcfdma_h -/****************************************************************************/ - - -/* - * Get address specific defines for this Coldfire member. - */ -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) -#define MCFDMA_BASE0 0x200 /* Base address of DMA 0 */ -#define MCFDMA_BASE1 0x240 /* Base address of DMA 1 */ -#elif defined(CONFIG_M5272) -#define MCFDMA_BASE0 0x0e0 /* Base address of DMA 0 */ -#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) -/* These are relative to the IPSBAR, not MBAR */ -#define MCFDMA_BASE0 0x100 /* Base address of DMA 0 */ -#define MCFDMA_BASE1 0x140 /* Base address of DMA 1 */ -#define MCFDMA_BASE2 0x180 /* Base address of DMA 2 */ -#define MCFDMA_BASE3 0x1C0 /* Base address of DMA 3 */ -#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) -#define MCFDMA_BASE0 0x300 /* Base address of DMA 0 */ -#define MCFDMA_BASE1 0x340 /* Base address of DMA 1 */ -#define MCFDMA_BASE2 0x380 /* Base address of DMA 2 */ -#define MCFDMA_BASE3 0x3C0 /* Base address of DMA 3 */ -#endif - - -#if !defined(CONFIG_M5272) - -/* - * Define the DMA register set addresses. - * Note: these are longword registers, use unsigned long as data type - */ -#define MCFDMA_SAR 0x00 /* DMA source address (r/w) */ -#define MCFDMA_DAR 0x01 /* DMA destination adr (r/w) */ -/* these are word registers, use unsigned short data type */ -#define MCFDMA_DCR 0x04 /* DMA control reg (r/w) */ -#define MCFDMA_BCR 0x06 /* DMA byte count reg (r/w) */ -/* these are byte registers, use unsiged char data type */ -#define MCFDMA_DSR 0x10 /* DMA status reg (r/w) */ -#define MCFDMA_DIVR 0x14 /* DMA interrupt vec (r/w) */ - -/* - * Bit definitions for the DMA Control Register (DCR). - */ -#define MCFDMA_DCR_INT 0x8000 /* Enable completion irq */ -#define MCFDMA_DCR_EEXT 0x4000 /* Enable external DMA req */ -#define MCFDMA_DCR_CS 0x2000 /* Enable cycle steal */ -#define MCFDMA_DCR_AA 0x1000 /* Enable auto alignment */ -#define MCFDMA_DCR_BWC_MASK 0x0E00 /* Bandwidth ctl mask */ -#define MCFDMA_DCR_BWC_512 0x0200 /* Bandwidth: 512 Bytes */ -#define MCFDMA_DCR_BWC_1024 0x0400 /* Bandwidth: 1024 Bytes */ -#define MCFDMA_DCR_BWC_2048 0x0600 /* Bandwidth: 2048 Bytes */ -#define MCFDMA_DCR_BWC_4096 0x0800 /* Bandwidth: 4096 Bytes */ -#define MCFDMA_DCR_BWC_8192 0x0a00 /* Bandwidth: 8192 Bytes */ -#define MCFDMA_DCR_BWC_16384 0x0c00 /* Bandwidth: 16384 Bytes */ -#define MCFDMA_DCR_BWC_32768 0x0e00 /* Bandwidth: 32768 Bytes */ -#define MCFDMA_DCR_SAA 0x0100 /* Single Address Access */ -#define MCFDMA_DCR_S_RW 0x0080 /* SAA read/write value */ -#define MCFDMA_DCR_SINC 0x0040 /* Source addr inc enable */ -#define MCFDMA_DCR_SSIZE_MASK 0x0030 /* Src xfer size */ -#define MCFDMA_DCR_SSIZE_LONG 0x0000 /* Src xfer size, 00 = longw */ -#define MCFDMA_DCR_SSIZE_BYTE 0x0010 /* Src xfer size, 01 = byte */ -#define MCFDMA_DCR_SSIZE_WORD 0x0020 /* Src xfer size, 10 = word */ -#define MCFDMA_DCR_SSIZE_LINE 0x0030 /* Src xfer size, 11 = line */ -#define MCFDMA_DCR_DINC 0x0008 /* Dest addr inc enable */ -#define MCFDMA_DCR_DSIZE_MASK 0x0006 /* Dest xfer size */ -#define MCFDMA_DCR_DSIZE_LONG 0x0000 /* Dest xfer size, 00 = long */ -#define MCFDMA_DCR_DSIZE_BYTE 0x0002 /* Dest xfer size, 01 = byte */ -#define MCFDMA_DCR_DSIZE_WORD 0x0004 /* Dest xfer size, 10 = word */ -#define MCFDMA_DCR_DSIZE_LINE 0x0006 /* Dest xfer size, 11 = line */ -#define MCFDMA_DCR_START 0x0001 /* Start transfer */ - -/* - * Bit definitions for the DMA Status Register (DSR). - */ -#define MCFDMA_DSR_CE 0x40 /* Config error */ -#define MCFDMA_DSR_BES 0x20 /* Bus Error on source */ -#define MCFDMA_DSR_BED 0x10 /* Bus Error on dest */ -#define MCFDMA_DSR_REQ 0x04 /* Requests remaining */ -#define MCFDMA_DSR_BSY 0x02 /* Busy */ -#define MCFDMA_DSR_DONE 0x01 /* DMA transfer complete */ - -#else /* This is an MCF5272 */ - -#define MCFDMA_DMR 0x00 /* Mode Register (r/w) */ -#define MCFDMA_DIR 0x03 /* Interrupt trigger register (r/w) */ -#define MCFDMA_DSAR 0x03 /* Source Address register (r/w) */ -#define MCFDMA_DDAR 0x04 /* Destination Address register (r/w) */ -#define MCFDMA_DBCR 0x02 /* Byte Count Register (r/w) */ - -/* Bit definitions for the DMA Mode Register (DMR) */ -#define MCFDMA_DMR_RESET 0x80000000L /* Reset bit */ -#define MCFDMA_DMR_EN 0x40000000L /* DMA enable */ -#define MCFDMA_DMR_RQM 0x000C0000L /* Request Mode Mask */ -#define MCFDMA_DMR_RQM_DUAL 0x000C0000L /* Dual address mode, the only valid mode */ -#define MCFDMA_DMR_DSTM 0x00002000L /* Destination addressing mask */ -#define MCFDMA_DMR_DSTM_SA 0x00000000L /* Destination uses static addressing */ -#define MCFDMA_DMR_DSTM_IA 0x00002000L /* Destination uses incremental addressing */ -#define MCFDMA_DMR_DSTT_UD 0x00000400L /* Destination is user data */ -#define MCFDMA_DMR_DSTT_UC 0x00000800L /* Destination is user code */ -#define MCFDMA_DMR_DSTT_SD 0x00001400L /* Destination is supervisor data */ -#define MCFDMA_DMR_DSTT_SC 0x00001800L /* Destination is supervisor code */ -#define MCFDMA_DMR_DSTS_OFF 0x8 /* offset to the destination size bits */ -#define MCFDMA_DMR_DSTS_LONG 0x00000000L /* Long destination size */ -#define MCFDMA_DMR_DSTS_BYTE 0x00000100L /* Byte destination size */ -#define MCFDMA_DMR_DSTS_WORD 0x00000200L /* Word destination size */ -#define MCFDMA_DMR_DSTS_LINE 0x00000300L /* Line destination size */ -#define MCFDMA_DMR_SRCM 0x00000020L /* Source addressing mask */ -#define MCFDMA_DMR_SRCM_SA 0x00000000L /* Source uses static addressing */ -#define MCFDMA_DMR_SRCM_IA 0x00000020L /* Source uses incremental addressing */ -#define MCFDMA_DMR_SRCT_UD 0x00000004L /* Source is user data */ -#define MCFDMA_DMR_SRCT_UC 0x00000008L /* Source is user code */ -#define MCFDMA_DMR_SRCT_SD 0x00000014L /* Source is supervisor data */ -#define MCFDMA_DMR_SRCT_SC 0x00000018L /* Source is supervisor code */ -#define MCFDMA_DMR_SRCS_OFF 0x0 /* Offset to the source size bits */ -#define MCFDMA_DMR_SRCS_LONG 0x00000000L /* Long source size */ -#define MCFDMA_DMR_SRCS_BYTE 0x00000001L /* Byte source size */ -#define MCFDMA_DMR_SRCS_WORD 0x00000002L /* Word source size */ -#define MCFDMA_DMR_SRCS_LINE 0x00000003L /* Line source size */ - -/* Bit definitions for the DMA interrupt register (DIR) */ -#define MCFDMA_DIR_INVEN 0x1000 /* Invalid Combination interrupt enable */ -#define MCFDMA_DIR_ASCEN 0x0800 /* Address Sequence Complete (Completion) interrupt enable */ -#define MCFDMA_DIR_TEEN 0x0200 /* Transfer Error interrupt enable */ -#define MCFDMA_DIR_TCEN 0x0100 /* Transfer Complete (a bus transfer, that is) interrupt enable */ -#define MCFDMA_DIR_INV 0x0010 /* Invalid Combination */ -#define MCFDMA_DIR_ASC 0x0008 /* Address Sequence Complete (DMA Completion) */ -#define MCFDMA_DIR_TE 0x0002 /* Transfer Error */ -#define MCFDMA_DIR_TC 0x0001 /* Transfer Complete */ - -#endif /* !defined(CONFIG_M5272) */ - -/****************************************************************************/ -#endif /* mcfdma_h */ diff --git a/include/asm-m68knommu/mcfmbus.h b/include/asm-m68knommu/mcfmbus.h deleted file mode 100644 index 319899c..0000000 --- a/include/asm-m68knommu/mcfmbus.h +++ /dev/null @@ -1,77 +0,0 @@ -/****************************************************************************/ - -/* - * mcfmbus.h -- Coldfire MBUS support defines. - * - * (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de) - */ - -/****************************************************************************/ - - -#ifndef mcfmbus_h -#define mcfmbus_h - - -#define MCFMBUS_BASE 0x280 -#define MCFMBUS_IRQ_VECTOR 0x19 -#define MCFMBUS_IRQ 0x1 -#define MCFMBUS_CLK 0x3f -#define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/ -#define MCFMBUS_ADDRESS 0x01 - - -/* -* Define the 5307 MBUS register set addresses -*/ - -#define MCFMBUS_MADR 0x00 -#define MCFMBUS_MFDR 0x04 -#define MCFMBUS_MBCR 0x08 -#define MCFMBUS_MBSR 0x0C -#define MCFMBUS_MBDR 0x10 - - -#define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/ - -#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/ - -/* -* Define bit flags in Control Register -*/ - -#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */ -#define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */ -#define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */ -#define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */ -#define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */ -#define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */ - -/* -* Define bit flags in Status Register -*/ - -#define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */ -#define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */ -#define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */ -#define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */ -#define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */ -#define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */ -#define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */ - -/* -* Define bit flags in DATA I/O Register -*/ - -#define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */ - -#define MBUSIOCSCLOCK 1 -#define MBUSIOCGCLOCK 2 -#define MBUSIOCSADDR 3 -#define MBUSIOCGADDR 4 -#define MBUSIOCSSLADDR 5 -#define MBUSIOCGSLADDR 6 -#define MBUSIOCSSUBADDR 7 -#define MBUSIOCGSUBADDR 8 - -#endif diff --git a/include/asm-m68knommu/mcfne.h b/include/asm-m68knommu/mcfne.h deleted file mode 100644 index 431f63a..0000000 --- a/include/asm-m68knommu/mcfne.h +++ /dev/null @@ -1,325 +0,0 @@ -/****************************************************************************/ - -/* - * mcfne.h -- NE2000 in ColdFire eval boards. - * - * (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo (www.lineo.com) - * (C) Copyright 2001, SnapGear (www.snapgear.com) - * - * 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board - * - * Hacked support for m5206e Cadre III evaluation board - * Fred Stevens (fred.stevens@pemstar.com) 13 April 1999 - */ - -/****************************************************************************/ -#ifndef mcfne_h -#define mcfne_h -/****************************************************************************/ - - -/* - * Support for NE2000 clones devices in ColdFire based boards. - * Not all boards address these parts the same way, some use a - * direct addressing method, others use a side-band address space - * to access odd address registers, some require byte swapping - * others do not. - */ -#define BSWAP(w) (((w) << 8) | ((w) >> 8)) -#define RSWAP(w) (w) - - -/* - * Define the basic hardware resources of NE2000 boards. - */ - -#if defined(CONFIG_ARN5206) -#define NE2000_ADDR 0x40000300 -#define NE2000_ODDOFFSET 0x00010000 -#define NE2000_IRQ_VECTOR 0xf0 -#define NE2000_IRQ_PRIORITY 2 -#define NE2000_IRQ_LEVEL 4 -#define NE2000_BYTE volatile unsigned short -#endif - -#if defined(CONFIG_M5206eC3) -#define NE2000_ADDR 0x40000300 -#define NE2000_ODDOFFSET 0x00010000 -#define NE2000_IRQ_VECTOR 0x1c -#define NE2000_IRQ_PRIORITY 2 -#define NE2000_IRQ_LEVEL 4 -#define NE2000_BYTE volatile unsigned short -#endif - -#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel) -#define NE2000_ADDR 0x30000300 -#define NE2000_IRQ_VECTOR 25 -#define NE2000_IRQ_PRIORITY 1 -#define NE2000_IRQ_LEVEL 3 -#define NE2000_BYTE volatile unsigned char -#endif - -#if defined(CONFIG_M5307C3) -#define NE2000_ADDR 0x40000300 -#define NE2000_ODDOFFSET 0x00010000 -#define NE2000_IRQ_VECTOR 0x1b -#define NE2000_BYTE volatile unsigned short -#endif - -#if defined(CONFIG_M5272) && defined(CONFIG_NETtel) -#define NE2000_ADDR 0x30600300 -#define NE2000_ODDOFFSET 0x00008000 -#define NE2000_IRQ_VECTOR 67 -#undef BSWAP -#define BSWAP(w) (w) -#define NE2000_BYTE volatile unsigned short -#undef RSWAP -#define RSWAP(w) (((w) << 8) | ((w) >> 8)) -#endif - -#if defined(CONFIG_M5307) && defined(CONFIG_NETtel) -#define NE2000_ADDR0 0x30600300 -#define NE2000_ADDR1 0x30800300 -#define NE2000_ODDOFFSET 0x00008000 -#define NE2000_IRQ_VECTOR0 27 -#define NE2000_IRQ_VECTOR1 29 -#undef BSWAP -#define BSWAP(w) (w) -#define NE2000_BYTE volatile unsigned short -#undef RSWAP -#define RSWAP(w) (((w) << 8) | ((w) >> 8)) -#endif - -#if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3) -#define NE2000_ADDR 0x30600300 -#define NE2000_ODDOFFSET 0x00008000 -#define NE2000_IRQ_VECTOR 27 -#undef BSWAP -#define BSWAP(w) (w) -#define NE2000_BYTE volatile unsigned short -#undef RSWAP -#define RSWAP(w) (((w) << 8) | ((w) >> 8)) -#endif - -#if defined(CONFIG_ARN5307) -#define NE2000_ADDR 0xfe600300 -#define NE2000_ODDOFFSET 0x00010000 -#define NE2000_IRQ_VECTOR 0x1b -#define NE2000_IRQ_PRIORITY 2 -#define NE2000_IRQ_LEVEL 3 -#define NE2000_BYTE volatile unsigned short -#endif - -#if defined(CONFIG_M5407C3) -#define NE2000_ADDR 0x40000300 -#define NE2000_ODDOFFSET 0x00010000 -#define NE2000_IRQ_VECTOR 0x1b -#define NE2000_BYTE volatile unsigned short -#endif - -/****************************************************************************/ - -/* - * Side-band address space for odd address requires re-mapping - * many of the standard ISA access functions. - */ -#ifdef NE2000_ODDOFFSET - -#undef outb -#undef outb_p -#undef inb -#undef inb_p -#undef outsb -#undef outsw -#undef insb -#undef insw - -#define outb ne2000_outb -#define inb ne2000_inb -#define outb_p ne2000_outb -#define inb_p ne2000_inb -#define outsb ne2000_outsb -#define outsw ne2000_outsw -#define insb ne2000_insb -#define insw ne2000_insw - - -#ifndef COLDFIRE_NE2000_FUNCS - -void ne2000_outb(unsigned int val, unsigned int addr); -int ne2000_inb(unsigned int addr); -void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len); -void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len); -void ne2000_outsb(unsigned int addr, void *vbuf, unsigned long len); -void ne2000_outsw(unsigned int addr, void *vbuf, unsigned long len); - -#else - -/* - * This macro converts a conventional register address into the - * real memory pointer of the mapped NE2000 device. - * On most NE2000 implementations on ColdFire boards the chip is - * mapped in kinda funny, due to its ISA heritage. - */ -#define NE2000_PTR(addr) ((addr&0x1)?(NE2000_ODDOFFSET+addr-1):(addr)) -#define NE2000_DATA_PTR(addr) (addr) - - -void ne2000_outb(unsigned int val, unsigned int addr) -{ - NE2000_BYTE *rp; - - rp = (NE2000_BYTE *) NE2000_PTR(addr); - *rp = RSWAP(val); -} - -int ne2000_inb(unsigned int addr) -{ - NE2000_BYTE *rp, val; - - rp = (NE2000_BYTE *) NE2000_PTR(addr); - val = *rp; - return((int) ((NE2000_BYTE) RSWAP(val))); -} - -void ne2000_insb(unsigned int addr, void *vbuf, int unsigned long len) -{ - NE2000_BYTE *rp, val; - unsigned char *buf; - - buf = (unsigned char *) vbuf; - rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr); - for (; (len > 0); len--) { - val = *rp; - *buf++ = RSWAP(val); - } -} - -void ne2000_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short w, *buf; - - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) NE2000_DATA_PTR(addr); - for (; (len > 0); len--) { - w = *rp; - *buf++ = BSWAP(w); - } -} - -void ne2000_outsb(unsigned int addr, const void *vbuf, unsigned long len) -{ - NE2000_BYTE *rp, val; - unsigned char *buf; - - buf = (unsigned char *) vbuf; - rp = (NE2000_BYTE *) NE2000_DATA_PTR(addr); - for (; (len > 0); len--) { - val = *buf++; - *rp = RSWAP(val); - } -} - -void ne2000_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short w, *buf; - - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) NE2000_DATA_PTR(addr); - for (; (len > 0); len--) { - w = *buf++; - *rp = BSWAP(w); - } -} - -#endif /* COLDFIRE_NE2000_FUNCS */ -#endif /* NE2000_OFFOFFSET */ - -/****************************************************************************/ - -#ifdef COLDFIRE_NE2000_FUNCS - -/* - * Lastly the interrupt set up code... - * Minor differences between the different board types. - */ - -#if defined(CONFIG_ARN5206) -void ne2000_irqsetup(int irq) -{ - volatile unsigned char *icrp; - - icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4); - *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2; - mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4); -} -#endif - -#if defined(CONFIG_M5206eC3) -void ne2000_irqsetup(int irq) -{ - volatile unsigned char *icrp; - - icrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_ICR4); - *icrp = MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI2 | MCFSIM_ICR_AUTOVEC; - mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT4); -} -#endif - -#if defined(CONFIG_M5206e) && defined(CONFIG_NETtel) -void ne2000_irqsetup(int irq) -{ - mcf_autovector(irq); -} -#endif - -#if defined(CONFIG_M5272) && defined(CONFIG_NETtel) -void ne2000_irqsetup(int irq) -{ - volatile unsigned long *icrp; - volatile unsigned long *pitr; - - /* The NE2000 device uses external IRQ3 */ - icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); - *icrp = (*icrp & 0x77077777) | 0x00d00000; - - pitr = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PITR); - *pitr = *pitr | 0x20000000; -} - -void ne2000_irqack(int irq) -{ - volatile unsigned long *icrp; - - /* The NE2000 device uses external IRQ3 */ - icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); - *icrp = (*icrp & 0x77777777) | 0x00800000; -} -#endif - -#if defined(CONFIG_M5307) || defined(CONFIG_M5407) -#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) - -void ne2000_irqsetup(int irq) -{ - mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3); - mcf_autovector(irq); -} - -#else - -void ne2000_irqsetup(int irq) -{ - mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_EINT3); -} - -#endif /* ! CONFIG_NETtel || CONFIG_SECUREEDGEMP3 */ -#endif /* CONFIG_M5307 || CONFIG_M5407 */ - -#endif /* COLDFIRE_NE2000_FUNCS */ - -/****************************************************************************/ -#endif /* mcfne_h */ diff --git a/include/asm-m68knommu/mcfpci.h b/include/asm-m68knommu/mcfpci.h deleted file mode 100644 index f1507dd..0000000 --- a/include/asm-m68knommu/mcfpci.h +++ /dev/null @@ -1,119 +0,0 @@ -/****************************************************************************/ - -/* - * mcfpci.h -- PCI bridge on ColdFire eval boards. - * - * (C) Copyright 2000, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfpci_h -#define mcfpci_h -/****************************************************************************/ - - -#ifdef CONFIG_PCI - -/* - * Address regions in the PCI address space are not mapped into the - * normal memory space of the ColdFire. They must be accessed via - * handler routines. This is easy for I/O space (inb/outb/etc) but - * needs some code changes to support ordinary memory. Interrupts - * also need to be vectored through the PCI handler first, then it - * will call the actual driver sub-handlers. - */ - -/* - * Un-define all the standard I/O access routines. - */ -#undef inb -#undef inw -#undef inl -#undef inb_p -#undef inw_p -#undef insb -#undef insw -#undef insl -#undef outb -#undef outw -#undef outl -#undef outb_p -#undef outw_p -#undef outsb -#undef outsw -#undef outsl - -#undef request_irq -#undef free_irq - -#undef bus_to_virt -#undef virt_to_bus - - -/* - * Re-direct all I/O memory accesses functions to PCI specific ones. - */ -#define inb pci_inb -#define inw pci_inw -#define inl pci_inl -#define inb_p pci_inb -#define inw_p pci_inw -#define insb pci_insb -#define insw pci_insw -#define insl pci_insl - -#define outb pci_outb -#define outw pci_outw -#define outl pci_outl -#define outb_p pci_outb -#define outw_p pci_outw -#define outsb pci_outsb -#define outsw pci_outsw -#define outsl pci_outsl - -#define request_irq pci_request_irq -#define free_irq pci_free_irq - -#define virt_to_bus pci_virt_to_bus -#define bus_to_virt pci_bus_to_virt - -#define CONFIG_COMEMPCI 1 - - -/* - * Prototypes of the real PCI functions (defined in bios32.c). - */ -unsigned char pci_inb(unsigned int addr); -unsigned short pci_inw(unsigned int addr); -unsigned int pci_inl(unsigned int addr); -void pci_insb(void *addr, void *buf, int len); -void pci_insw(void *addr, void *buf, int len); -void pci_insl(void *addr, void *buf, int len); - -void pci_outb(unsigned char val, unsigned int addr); -void pci_outw(unsigned short val, unsigned int addr); -void pci_outl(unsigned int val, unsigned int addr); -void pci_outsb(void *addr, void *buf, int len); -void pci_outsw(void *addr, void *buf, int len); -void pci_outsl(void *addr, void *buf, int len); - -int pci_request_irq(unsigned int irq, - void (*handler)(int, void *, struct pt_regs *), - unsigned long flags, - const char *device, - void *dev_id); -void pci_free_irq(unsigned int irq, void *dev_id); - -void *pci_bmalloc(int size); -void pci_bmfree(void *bmp, int len); -void pci_copytoshmem(unsigned long bmp, void *src, int size); -void pci_copyfromshmem(void *dst, unsigned long bmp, int size); -unsigned long pci_virt_to_bus(volatile void *address); -void *pci_bus_to_virt(unsigned long address); -void pci_bmcpyto(void *dst, void *src, int len); -void pci_bmcpyfrom(void *dst, void *src, int len); - -#endif /* CONFIG_PCI */ -/****************************************************************************/ -#endif /* mcfpci_h */ diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h deleted file mode 100644 index f570cf6..0000000 --- a/include/asm-m68knommu/mcfpit.h +++ /dev/null @@ -1,64 +0,0 @@ -/****************************************************************************/ - -/* - * mcfpit.h -- ColdFire internal PIT timer support defines. - * - * (C) Copyright 2003, Greg Ungerer (gerg@snapgear.com) - */ - -/****************************************************************************/ -#ifndef mcfpit_h -#define mcfpit_h -/****************************************************************************/ - - -/* - * Get address specific defines for the 5270/5271, 5280/5282, and 5208. - */ -#if defined(CONFIG_M520x) -#define MCFPIT_BASE1 0x00080000 /* Base address of TIMER1 */ -#define MCFPIT_BASE2 0x00084000 /* Base address of TIMER2 */ -#else -#define MCFPIT_BASE1 0x00150000 /* Base address of TIMER1 */ -#define MCFPIT_BASE2 0x00160000 /* Base address of TIMER2 */ -#define MCFPIT_BASE3 0x00170000 /* Base address of TIMER3 */ -#define MCFPIT_BASE4 0x00180000 /* Base address of TIMER4 */ -#endif - -/* - * Define the PIT timer register set addresses. - */ -#define MCFPIT_PCSR 0x0 /* PIT control register */ -#define MCFPIT_PMR 0x2 /* PIT modulus register */ -#define MCFPIT_PCNTR 0x4 /* PIT count register */ - -/* - * Bit definitions for the PIT Control and Status register. - */ -#define MCFPIT_PCSR_CLK1 0x0000 /* System clock divisor */ -#define MCFPIT_PCSR_CLK2 0x0100 /* System clock divisor */ -#define MCFPIT_PCSR_CLK4 0x0200 /* System clock divisor */ -#define MCFPIT_PCSR_CLK8 0x0300 /* System clock divisor */ -#define MCFPIT_PCSR_CLK16 0x0400 /* System clock divisor */ -#define MCFPIT_PCSR_CLK32 0x0500 /* System clock divisor */ -#define MCFPIT_PCSR_CLK64 0x0600 /* System clock divisor */ -#define MCFPIT_PCSR_CLK128 0x0700 /* System clock divisor */ -#define MCFPIT_PCSR_CLK256 0x0800 /* System clock divisor */ -#define MCFPIT_PCSR_CLK512 0x0900 /* System clock divisor */ -#define MCFPIT_PCSR_CLK1024 0x0a00 /* System clock divisor */ -#define MCFPIT_PCSR_CLK2048 0x0b00 /* System clock divisor */ -#define MCFPIT_PCSR_CLK4096 0x0c00 /* System clock divisor */ -#define MCFPIT_PCSR_CLK8192 0x0d00 /* System clock divisor */ -#define MCFPIT_PCSR_CLK16384 0x0e00 /* System clock divisor */ -#define MCFPIT_PCSR_CLK32768 0x0f00 /* System clock divisor */ -#define MCFPIT_PCSR_DOZE 0x0040 /* Clock run in doze mode */ -#define MCFPIT_PCSR_HALTED 0x0020 /* Clock run in halt mode */ -#define MCFPIT_PCSR_OVW 0x0010 /* Overwrite PIT counter now */ -#define MCFPIT_PCSR_PIE 0x0008 /* Enable PIT interrupt */ -#define MCFPIT_PCSR_PIF 0x0004 /* PIT interrupt flag */ -#define MCFPIT_PCSR_RLD 0x0002 /* Reload counter */ -#define MCFPIT_PCSR_EN 0x0001 /* Enable PIT */ -#define MCFPIT_PCSR_DISABLE 0x0000 /* Disable PIT */ - -/****************************************************************************/ -#endif /* mcfpit_h */ diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h deleted file mode 100644 index da3f2ce..0000000 --- a/include/asm-m68knommu/mcfsim.h +++ /dev/null @@ -1,126 +0,0 @@ -/****************************************************************************/ - -/* - * mcfsim.h -- ColdFire System Integration Module support. - * - * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfsim_h -#define mcfsim_h -/****************************************************************************/ - - -/* - * Include 5204, 5206/e, 5235, 5249, 5270/5271, 5272, 5280/5282, - * 5307 or 5407 specific addresses. - */ -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) -#include -#elif defined(CONFIG_M520x) -#include -#elif defined(CONFIG_M523x) -#include -#elif defined(CONFIG_M5249) -#include -#elif defined(CONFIG_M527x) -#include -#elif defined(CONFIG_M5272) -#include -#elif defined(CONFIG_M528x) -#include -#elif defined(CONFIG_M5307) -#include -#elif defined(CONFIG_M532x) -#include -#elif defined(CONFIG_M5407) -#include -#endif - - -/* - * Define the base address of the SIM within the MBAR address space. - */ -#define MCFSIM_BASE 0x0 /* Base address of SIM */ - - -/* - * Bit definitions for the ICR family of registers. - */ -#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */ -#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */ -#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */ -#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */ -#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */ -#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */ -#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */ -#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */ -#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */ - -#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */ -#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */ -#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */ -#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */ - -/* - * Bit definitions for the Interrupt Mask register (IMR). - */ -#define MCFSIM_IMR_EINT1 0x0002 /* External intr # 1 */ -#define MCFSIM_IMR_EINT2 0x0004 /* External intr # 2 */ -#define MCFSIM_IMR_EINT3 0x0008 /* External intr # 3 */ -#define MCFSIM_IMR_EINT4 0x0010 /* External intr # 4 */ -#define MCFSIM_IMR_EINT5 0x0020 /* External intr # 5 */ -#define MCFSIM_IMR_EINT6 0x0040 /* External intr # 6 */ -#define MCFSIM_IMR_EINT7 0x0080 /* External intr # 7 */ - -#define MCFSIM_IMR_SWD 0x0100 /* Software Watchdog intr */ -#define MCFSIM_IMR_TIMER1 0x0200 /* TIMER 1 intr */ -#define MCFSIM_IMR_TIMER2 0x0400 /* TIMER 2 intr */ -#define MCFSIM_IMR_MBUS 0x0800 /* MBUS intr */ -#define MCFSIM_IMR_UART1 0x1000 /* UART 1 intr */ -#define MCFSIM_IMR_UART2 0x2000 /* UART 2 intr */ - -#if defined(CONFIG_M5206e) -#define MCFSIM_IMR_DMA1 0x4000 /* DMA 1 intr */ -#define MCFSIM_IMR_DMA2 0x8000 /* DMA 2 intr */ -#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) -#define MCFSIM_IMR_DMA0 0x4000 /* DMA 0 intr */ -#define MCFSIM_IMR_DMA1 0x8000 /* DMA 1 intr */ -#define MCFSIM_IMR_DMA2 0x10000 /* DMA 2 intr */ -#define MCFSIM_IMR_DMA3 0x20000 /* DMA 3 intr */ -#endif - -/* - * Mask for all of the SIM devices. Some parts have more or less - * SIM devices. This is a catchall for the sandard set. - */ -#ifndef MCFSIM_IMR_MASKALL -#define MCFSIM_IMR_MASKALL 0x3ffe /* All intr sources */ -#endif - - -/* - * PIT interrupt settings, if not found in mXXXXsim.h file. - */ -#ifndef ICR_INTRCONF -#define ICR_INTRCONF 0x2b /* PIT1 level 5, priority 3 */ -#endif -#ifndef MCFPIT_IMR -#define MCFPIT_IMR MCFINTC_IMRH -#endif -#ifndef MCFPIT_IMR_IBIT -#define MCFPIT_IMR_IBIT (1 << (MCFINT_PIT1 - 32)) -#endif - - -#ifndef __ASSEMBLY__ -/* - * Definition for the interrupt auto-vectoring support. - */ -extern void mcf_autovector(unsigned int vec); -#endif /* __ASSEMBLY__ */ - -/****************************************************************************/ -#endif /* mcfsim_h */ diff --git a/include/asm-m68knommu/mcfsmc.h b/include/asm-m68knommu/mcfsmc.h deleted file mode 100644 index 2d7a4db..0000000 --- a/include/asm-m68knommu/mcfsmc.h +++ /dev/null @@ -1,187 +0,0 @@ -/****************************************************************************/ - -/* - * mcfsmc.h -- SMC ethernet support for ColdFire environments. - * - * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfsmc_h -#define mcfsmc_h -/****************************************************************************/ - -/* - * None of the current ColdFire targets that use the SMC91x111 - * allow 8 bit accesses. So this code is 16bit access only. - */ - - -#undef outb -#undef inb -#undef outw -#undef outwd -#undef inw -#undef outl -#undef inl - -#undef outsb -#undef outsw -#undef outsl -#undef insb -#undef insw -#undef insl - -/* - * Re-defines for ColdFire environment... The SMC part is - * mapped into memory space, so remap the PC-style in/out - * routines to handle that. - */ -#define outb smc_outb -#define inb smc_inb -#define outw smc_outw -#define outwd smc_outwd -#define inw smc_inw -#define outl smc_outl -#define inl smc_inl - -#define outsb smc_outsb -#define outsw smc_outsw -#define outsl smc_outsl -#define insb smc_insb -#define insw smc_insw -#define insl smc_insl - - -static inline int smc_inb(unsigned int addr) -{ - register unsigned short w; - w = *((volatile unsigned short *) (addr & ~0x1)); - return(((addr & 0x1) ? w : (w >> 8)) & 0xff); -} - -static inline void smc_outw(unsigned int val, unsigned int addr) -{ - *((volatile unsigned short *) addr) = (val << 8) | (val >> 8); -} - -static inline int smc_inw(unsigned int addr) -{ - register unsigned short w; - w = *((volatile unsigned short *) addr); - return(((w << 8) | (w >> 8)) & 0xffff); -} - -static inline void smc_outl(unsigned long val, unsigned int addr) -{ - *((volatile unsigned long *) addr) = - ((val << 8) & 0xff000000) | ((val >> 8) & 0x00ff0000) | - ((val << 8) & 0x0000ff00) | ((val >> 8) & 0x000000ff); -} - -static inline void smc_outwd(unsigned int val, unsigned int addr) -{ - *((volatile unsigned short *) addr) = val; -} - - -/* - * The rep* functions are used to feed the data port with - * raw data. So we do not byte swap them when copying. - */ - -static inline void smc_insb(unsigned int addr, void *vbuf, int unsigned long len) -{ - volatile unsigned short *rp; - unsigned short *buf, *ebuf; - - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) addr; - - /* Copy as words for as long as possible */ - for (ebuf = buf + (len >> 1); (buf < ebuf); ) - *buf++ = *rp; - - /* Lastly, handle left over byte */ - if (len & 0x1) - *((unsigned char *) buf) = (*rp >> 8) & 0xff; -} - -static inline void smc_insw(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short *buf, *ebuf; - - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) addr; - for (ebuf = buf + len; (buf < ebuf); ) - *buf++ = *rp; -} - -static inline void smc_insl(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned long *rp; - unsigned long *buf, *ebuf; - - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) addr; - for (ebuf = buf + len; (buf < ebuf); ) - *buf++ = *rp; -} - -static inline void smc_outsw(unsigned int addr, const void *vbuf, unsigned long len) -{ - volatile unsigned short *rp; - unsigned short *buf, *ebuf; - - buf = (unsigned short *) vbuf; - rp = (volatile unsigned short *) addr; - for (ebuf = buf + len; (buf < ebuf); ) - *rp = *buf++; -} - -static inline void smc_outsl(unsigned int addr, void *vbuf, unsigned long len) -{ - volatile unsigned long *rp; - unsigned long *buf, *ebuf; - - buf = (unsigned long *) vbuf; - rp = (volatile unsigned long *) addr; - for (ebuf = buf + len; (buf < ebuf); ) - *rp = *buf++; -} - - -#ifdef CONFIG_NETtel -/* - * Re-map the address space of at least one of the SMC ethernet - * parts. Both parts power up decoding the same address, so we - * need to move one of them first, before doing enything else. - * - * We also increase the number of wait states for this part by one. - */ - -void smc_remap(unsigned int ioaddr) -{ - static int once = 0; - extern unsigned short ppdata; - if (once++ == 0) { - *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADDR)) = 0x00ec; - ppdata |= 0x0080; - *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADAT)) = ppdata; - outw(0x0001, ioaddr + BANK_SELECT); - outw(0x0001, ioaddr + BANK_SELECT); - outw(0x0067, ioaddr + BASE); - - ppdata &= ~0x0080; - *((volatile unsigned short *)(MCF_MBAR+MCFSIM_PADAT)) = ppdata; - } - - *((volatile unsigned short *)(MCF_MBAR+MCFSIM_CSCR3)) = 0x1180; -} - -#endif - -/****************************************************************************/ -#endif /* mcfsmc_h */ diff --git a/include/asm-m68knommu/mcftimer.h b/include/asm-m68knommu/mcftimer.h deleted file mode 100644 index 0f90f6d..0000000 --- a/include/asm-m68knommu/mcftimer.h +++ /dev/null @@ -1,80 +0,0 @@ -/****************************************************************************/ - -/* - * mcftimer.h -- ColdFire internal TIMER support defines. - * - * (C) Copyright 1999-2006, Greg Ungerer - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcftimer_h -#define mcftimer_h -/****************************************************************************/ - - -/* - * Get address specific defines for this ColdFire member. - */ -#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) -#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */ -#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */ -#elif defined(CONFIG_M5272) -#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */ -#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */ -#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */ -#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */ -#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) -#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */ -#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */ -#elif defined(CONFIG_M532x) -#define MCFTIMER_BASE1 0xfc070000 /* Base address of TIMER1 */ -#define MCFTIMER_BASE2 0xfc074000 /* Base address of TIMER2 */ -#define MCFTIMER_BASE3 0xfc078000 /* Base address of TIMER3 */ -#define MCFTIMER_BASE4 0xfc07c000 /* Base address of TIMER4 */ -#endif - - -/* - * Define the TIMER register set addresses. - */ -#define MCFTIMER_TMR 0x00 /* Timer Mode reg (r/w) */ -#define MCFTIMER_TRR 0x04 /* Timer Reference (r/w) */ -#define MCFTIMER_TCR 0x08 /* Timer Capture reg (r/w) */ -#define MCFTIMER_TCN 0x0C /* Timer Counter reg (r/w) */ -#if defined(CONFIG_M532x) -#define MCFTIMER_TER 0x03 /* Timer Event reg (r/w) */ -#else -#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */ -#endif - -/* - * Bit definitions for the Timer Mode Register (TMR). - * Register bit flags are common accross ColdFires. - */ -#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */ -#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */ -#define MCFTIMER_TMR_ANYCE 0x00c0 /* Capture any edge */ -#define MCFTIMER_TMR_FALLCE 0x0080 /* Capture fallingedge */ -#define MCFTIMER_TMR_RISECE 0x0040 /* Capture rising edge */ -#define MCFTIMER_TMR_ENOM 0x0020 /* Enable output toggle */ -#define MCFTIMER_TMR_DISOM 0x0000 /* Do single output pulse */ -#define MCFTIMER_TMR_ENORI 0x0010 /* Enable ref interrupt */ -#define MCFTIMER_TMR_DISORI 0x0000 /* Disable ref interrupt */ -#define MCFTIMER_TMR_RESTART 0x0008 /* Restart counter */ -#define MCFTIMER_TMR_FREERUN 0x0000 /* Free running counter */ -#define MCFTIMER_TMR_CLKTIN 0x0006 /* Input clock is TIN */ -#define MCFTIMER_TMR_CLK16 0x0004 /* Input clock is /16 */ -#define MCFTIMER_TMR_CLK1 0x0002 /* Input clock is /1 */ -#define MCFTIMER_TMR_CLKSTOP 0x0000 /* Stop counter */ -#define MCFTIMER_TMR_ENABLE 0x0001 /* Enable timer */ -#define MCFTIMER_TMR_DISABLE 0x0000 /* Disable timer */ - -/* - * Bit definitions for the Timer Event Registers (TER). - */ -#define MCFTIMER_TER_CAP 0x01 /* Capture event */ -#define MCFTIMER_TER_REF 0x02 /* Refernece event */ - -/****************************************************************************/ -#endif /* mcftimer_h */ diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h deleted file mode 100644 index ef22938..0000000 --- a/include/asm-m68knommu/mcfuart.h +++ /dev/null @@ -1,216 +0,0 @@ -/****************************************************************************/ - -/* - * mcfuart.h -- ColdFire internal UART support defines. - * - * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2000, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfuart_h -#define mcfuart_h -/****************************************************************************/ - -/* - * Define the base address of the UARTS within the MBAR address - * space. - */ -#if defined(CONFIG_M5272) -#define MCFUART_BASE1 0x100 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ -#elif defined(CONFIG_M5206) || defined(CONFIG_M5206e) -#if defined(CONFIG_NETtel) -#define MCFUART_BASE1 0x180 /* Base address of UART1 */ -#define MCFUART_BASE2 0x140 /* Base address of UART2 */ -#else -#define MCFUART_BASE1 0x140 /* Base address of UART1 */ -#define MCFUART_BASE2 0x180 /* Base address of UART2 */ -#endif -#elif defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) -#define MCFUART_BASE1 0x200 /* Base address of UART1 */ -#define MCFUART_BASE2 0x240 /* Base address of UART2 */ -#define MCFUART_BASE3 0x280 /* Base address of UART3 */ -#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) -#if defined(CONFIG_NETtel) || defined(CONFIG_SECUREEDGEMP3) -#define MCFUART_BASE1 0x200 /* Base address of UART1 */ -#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */ -#else -#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */ -#define MCFUART_BASE2 0x200 /* Base address of UART2 */ -#endif -#elif defined(CONFIG_M520x) -#define MCFUART_BASE1 0x60000 /* Base address of UART1 */ -#define MCFUART_BASE2 0x64000 /* Base address of UART2 */ -#define MCFUART_BASE3 0x68000 /* Base address of UART2 */ -#elif defined(CONFIG_M532x) -#define MCFUART_BASE1 0xfc060000 /* Base address of UART1 */ -#define MCFUART_BASE2 0xfc064000 /* Base address of UART2 */ -#define MCFUART_BASE3 0xfc068000 /* Base address of UART3 */ -#endif - - -#include -#include - -struct mcf_platform_uart { - unsigned long mapbase; /* Physical address base */ - void __iomem *membase; /* Virtual address if mapped */ - unsigned int irq; /* Interrupt vector */ - unsigned int uartclk; /* UART clock rate */ -}; - -/* - * Define the ColdFire UART register set addresses. - */ -#define MCFUART_UMR 0x00 /* Mode register (r/w) */ -#define MCFUART_USR 0x04 /* Status register (r) */ -#define MCFUART_UCSR 0x04 /* Clock Select (w) */ -#define MCFUART_UCR 0x08 /* Command register (w) */ -#define MCFUART_URB 0x0c /* Receiver Buffer (r) */ -#define MCFUART_UTB 0x0c /* Transmit Buffer (w) */ -#define MCFUART_UIPCR 0x10 /* Input Port Change (r) */ -#define MCFUART_UACR 0x10 /* Auxiliary Control (w) */ -#define MCFUART_UISR 0x14 /* Interrupt Status (r) */ -#define MCFUART_UIMR 0x14 /* Interrupt Mask (w) */ -#define MCFUART_UBG1 0x18 /* Baud Rate MSB (r/w) */ -#define MCFUART_UBG2 0x1c /* Baud Rate LSB (r/w) */ -#ifdef CONFIG_M5272 -#define MCFUART_UTF 0x28 /* Transmitter FIFO (r/w) */ -#define MCFUART_URF 0x2c /* Receiver FIFO (r/w) */ -#define MCFUART_UFPD 0x30 /* Frac Prec. Divider (r/w) */ -#else -#define MCFUART_UIVR 0x30 /* Interrupt Vector (r/w) */ -#endif -#define MCFUART_UIPR 0x34 /* Input Port (r) */ -#define MCFUART_UOP1 0x38 /* Output Port Bit Set (w) */ -#define MCFUART_UOP0 0x3c /* Output Port Bit Reset (w) */ - - -/* - * Define bit flags in Mode Register 1 (MR1). - */ -#define MCFUART_MR1_RXRTS 0x80 /* Auto RTS flow control */ -#define MCFUART_MR1_RXIRQFULL 0x40 /* RX IRQ type FULL */ -#define MCFUART_MR1_RXIRQRDY 0x00 /* RX IRQ type RDY */ -#define MCFUART_MR1_RXERRBLOCK 0x20 /* RX block error mode */ -#define MCFUART_MR1_RXERRCHAR 0x00 /* RX char error mode */ - -#define MCFUART_MR1_PARITYNONE 0x10 /* No parity */ -#define MCFUART_MR1_PARITYEVEN 0x00 /* Even parity */ -#define MCFUART_MR1_PARITYODD 0x04 /* Odd parity */ -#define MCFUART_MR1_PARITYSPACE 0x08 /* Space parity */ -#define MCFUART_MR1_PARITYMARK 0x0c /* Mark parity */ - -#define MCFUART_MR1_CS5 0x00 /* 5 bits per char */ -#define MCFUART_MR1_CS6 0x01 /* 6 bits per char */ -#define MCFUART_MR1_CS7 0x02 /* 7 bits per char */ -#define MCFUART_MR1_CS8 0x03 /* 8 bits per char */ - -/* - * Define bit flags in Mode Register 2 (MR2). - */ -#define MCFUART_MR2_LOOPBACK 0x80 /* Loopback mode */ -#define MCFUART_MR2_REMOTELOOP 0xc0 /* Remote loopback mode */ -#define MCFUART_MR2_AUTOECHO 0x40 /* Automatic echo */ -#define MCFUART_MR2_TXRTS 0x20 /* Assert RTS on TX */ -#define MCFUART_MR2_TXCTS 0x10 /* Auto CTS flow control */ - -#define MCFUART_MR2_STOP1 0x07 /* 1 stop bit */ -#define MCFUART_MR2_STOP15 0x08 /* 1.5 stop bits */ -#define MCFUART_MR2_STOP2 0x0f /* 2 stop bits */ - -/* - * Define bit flags in Status Register (USR). - */ -#define MCFUART_USR_RXBREAK 0x80 /* Received BREAK */ -#define MCFUART_USR_RXFRAMING 0x40 /* Received framing error */ -#define MCFUART_USR_RXPARITY 0x20 /* Received parity error */ -#define MCFUART_USR_RXOVERRUN 0x10 /* Received overrun error */ -#define MCFUART_USR_TXEMPTY 0x08 /* Transmitter empty */ -#define MCFUART_USR_TXREADY 0x04 /* Transmitter ready */ -#define MCFUART_USR_RXFULL 0x02 /* Receiver full */ -#define MCFUART_USR_RXREADY 0x01 /* Receiver ready */ - -#define MCFUART_USR_RXERR (MCFUART_USR_RXBREAK | MCFUART_USR_RXFRAMING | \ - MCFUART_USR_RXPARITY | MCFUART_USR_RXOVERRUN) - -/* - * Define bit flags in Clock Select Register (UCSR). - */ -#define MCFUART_UCSR_RXCLKTIMER 0xd0 /* RX clock is timer */ -#define MCFUART_UCSR_RXCLKEXT16 0xe0 /* RX clock is external x16 */ -#define MCFUART_UCSR_RXCLKEXT1 0xf0 /* RX clock is external x1 */ - -#define MCFUART_UCSR_TXCLKTIMER 0x0d /* TX clock is timer */ -#define MCFUART_UCSR_TXCLKEXT16 0x0e /* TX clock is external x16 */ -#define MCFUART_UCSR_TXCLKEXT1 0x0f /* TX clock is external x1 */ - -/* - * Define bit flags in Command Register (UCR). - */ -#define MCFUART_UCR_CMDNULL 0x00 /* No command */ -#define MCFUART_UCR_CMDRESETMRPTR 0x10 /* Reset MR pointer */ -#define MCFUART_UCR_CMDRESETRX 0x20 /* Reset receiver */ -#define MCFUART_UCR_CMDRESETTX 0x30 /* Reset transmitter */ -#define MCFUART_UCR_CMDRESETERR 0x40 /* Reset error status */ -#define MCFUART_UCR_CMDRESETBREAK 0x50 /* Reset BREAK change */ -#define MCFUART_UCR_CMDBREAKSTART 0x60 /* Start BREAK */ -#define MCFUART_UCR_CMDBREAKSTOP 0x70 /* Stop BREAK */ - -#define MCFUART_UCR_TXNULL 0x00 /* No TX command */ -#define MCFUART_UCR_TXENABLE 0x04 /* Enable TX */ -#define MCFUART_UCR_TXDISABLE 0x08 /* Disable TX */ -#define MCFUART_UCR_RXNULL 0x00 /* No RX command */ -#define MCFUART_UCR_RXENABLE 0x01 /* Enable RX */ -#define MCFUART_UCR_RXDISABLE 0x02 /* Disable RX */ - -/* - * Define bit flags in Input Port Change Register (UIPCR). - */ -#define MCFUART_UIPCR_CTSCOS 0x10 /* CTS change of state */ -#define MCFUART_UIPCR_CTS 0x01 /* CTS value */ - -/* - * Define bit flags in Input Port Register (UIP). - */ -#define MCFUART_UIPR_CTS 0x01 /* CTS value */ - -/* - * Define bit flags in Output Port Registers (UOP). - * Clear bit by writing to UOP0, set by writing to UOP1. - */ -#define MCFUART_UOP_RTS 0x01 /* RTS set or clear */ - -/* - * Define bit flags in the Auxiliary Control Register (UACR). - */ -#define MCFUART_UACR_IEC 0x01 /* Input enable control */ - -/* - * Define bit flags in Interrupt Status Register (UISR). - * These same bits are used for the Interrupt Mask Register (UIMR). - */ -#define MCFUART_UIR_COS 0x80 /* Change of state (CTS) */ -#define MCFUART_UIR_DELTABREAK 0x04 /* Break start or stop */ -#define MCFUART_UIR_RXREADY 0x02 /* Receiver ready */ -#define MCFUART_UIR_TXREADY 0x01 /* Transmitter ready */ - -#ifdef CONFIG_M5272 -/* - * Define bit flags in the Transmitter FIFO Register (UTF). - */ -#define MCFUART_UTF_TXB 0x1f /* Transmitter data level */ -#define MCFUART_UTF_FULL 0x20 /* Transmitter fifo full */ -#define MCFUART_UTF_TXS 0xc0 /* Transmitter status */ - -/* - * Define bit flags in the Receiver FIFO Register (URF). - */ -#define MCFUART_URF_RXB 0x1f /* Receiver data level */ -#define MCFUART_URF_FULL 0x20 /* Receiver fifo full */ -#define MCFUART_URF_RXS 0xc0 /* Receiver status */ -#endif - -/****************************************************************************/ -#endif /* mcfuart_h */ diff --git a/include/asm-m68knommu/mcfwdebug.h b/include/asm-m68knommu/mcfwdebug.h deleted file mode 100644 index 27f70e4..0000000 --- a/include/asm-m68knommu/mcfwdebug.h +++ /dev/null @@ -1,118 +0,0 @@ -/****************************************************************************/ - -/* - * mcfdebug.h -- ColdFire Debug Module support. - * - * (C) Copyright 2001, Lineo Inc. (www.lineo.com) - */ - -/****************************************************************************/ -#ifndef mcfdebug_h -#define mcfdebug_h -/****************************************************************************/ - -/* Define the debug module registers */ -#define MCFDEBUG_CSR 0x0 /* Configuration status */ -#define MCFDEBUG_BAAR 0x5 /* BDM address attribute */ -#define MCFDEBUG_AATR 0x6 /* Address attribute trigger */ -#define MCFDEBUG_TDR 0x7 /* Trigger definition */ -#define MCFDEBUG_PBR 0x8 /* PC breakpoint */ -#define MCFDEBUG_PBMR 0x9 /* PC breakpoint mask */ -#define MCFDEBUG_ABHR 0xc /* High address breakpoint */ -#define MCFDEBUG_ABLR 0xd /* Low address breakpoint */ -#define MCFDEBUG_DBR 0xe /* Data breakpoint */ -#define MCFDEBUG_DBMR 0xf /* Data breakpoint mask */ - -/* Define some handy constants for the trigger definition register */ -#define MCFDEBUG_TDR_TRC_DISP 0x00000000 /* display on DDATA only */ -#define MCFDEBUG_TDR_TRC_HALT 0x40000000 /* Processor halt on BP */ -#define MCFDEBUG_TDR_TRC_INTR 0x80000000 /* Debug intr on BP */ -#define MCFDEBUG_TDR_LXT1 0x00004000 /* TDR level 1 */ -#define MCFDEBUG_TDR_LXT2 0x00008000 /* TDR level 2 */ -#define MCFDEBUG_TDR_EBL1 0x00002000 /* Enable breakpoint level 1 */ -#define MCFDEBUG_TDR_EBL2 0x20000000 /* Enable breakpoint level 2 */ -#define MCFDEBUG_TDR_EDLW1 0x00001000 /* Enable data BP longword */ -#define MCFDEBUG_TDR_EDLW2 0x10000000 -#define MCFDEBUG_TDR_EDWL1 0x00000800 /* Enable data BP lower word */ -#define MCFDEBUG_TDR_EDWL2 0x08000000 -#define MCFDEBUG_TDR_EDWU1 0x00000400 /* Enable data BP upper word */ -#define MCFDEBUG_TDR_EDWU2 0x04000000 -#define MCFDEBUG_TDR_EDLL1 0x00000200 /* Enable data BP low low byte */ -#define MCFDEBUG_TDR_EDLL2 0x02000000 -#define MCFDEBUG_TDR_EDLM1 0x00000100 /* Enable data BP low mid byte */ -#define MCFDEBUG_TDR_EDLM2 0x01000000 -#define MCFDEBUG_TDR_EDUM1 0x00000080 /* Enable data BP up mid byte */ -#define MCFDEBUG_TDR_EDUM2 0x00800000 -#define MCFDEBUG_TDR_EDUU1 0x00000040 /* Enable data BP up up byte */ -#define MCFDEBUG_TDR_EDUU2 0x00400000 -#define MCFDEBUG_TDR_DI1 0x00000020 /* Data BP invert */ -#define MCFDEBUG_TDR_DI2 0x00200000 -#define MCFDEBUG_TDR_EAI1 0x00000010 /* Enable address BP inverted */ -#define MCFDEBUG_TDR_EAI2 0x00100000 -#define MCFDEBUG_TDR_EAR1 0x00000008 /* Enable address BP range */ -#define MCFDEBUG_TDR_EAR2 0x00080000 -#define MCFDEBUG_TDR_EAL1 0x00000004 /* Enable address BP low */ -#define MCFDEBUG_TDR_EAL2 0x00040000 -#define MCFDEBUG_TDR_EPC1 0x00000002 /* Enable PC BP */ -#define MCFDEBUG_TDR_EPC2 0x00020000 -#define MCFDEBUG_TDR_PCI1 0x00000001 /* PC BP invert */ -#define MCFDEBUG_TDR_PCI2 0x00010000 - -/* Constants for the address attribute trigger register */ -#define MCFDEBUG_AAR_RESET 0x00000005 -/* Fields not yet implemented */ - -/* And some definitions for the writable sections of the CSR */ -#define MCFDEBUG_CSR_RESET 0x00100000 -#define MCFDEBUG_CSR_PSTCLK 0x00020000 /* PSTCLK disable */ -#define MCFDEBUG_CSR_IPW 0x00010000 /* Inhibit processor writes */ -#define MCFDEBUG_CSR_MAP 0x00008000 /* Processor refs in emul mode */ -#define MCFDEBUG_CSR_TRC 0x00004000 /* Emul mode on trace exception */ -#define MCFDEBUG_CSR_EMU 0x00002000 /* Force emulation mode */ -#define MCFDEBUG_CSR_DDC_READ 0x00000800 /* Debug data control */ -#define MCFDEBUG_CSR_DDC_WRITE 0x00001000 -#define MCFDEBUG_CSR_UHE 0x00000400 /* User mode halt enable */ -#define MCFDEBUG_CSR_BTB0 0x00000000 /* Branch target 0 bytes */ -#define MCFDEBUG_CSR_BTB2 0x00000100 /* Branch target 2 bytes */ -#define MCFDEBUG_CSR_BTB3 0x00000200 /* Branch target 3 bytes */ -#define MCFDEBUG_CSR_BTB4 0x00000300 /* Branch target 4 bytes */ -#define MCFDEBUG_CSR_NPL 0x00000040 /* Non-pipelined mode */ -#define MCFDEBUG_CSR_SSM 0x00000010 /* Single step mode */ - -/* Constants for the BDM address attribute register */ -#define MCFDEBUG_BAAR_RESET 0x00000005 -/* Fields not yet implemented */ - - -/* This routine wrappers up the wdebug asm instruction so that the register - * and value can be relatively easily specified. The biggest hassle here is - * that the debug module instructions (2 longs) must be long word aligned and - * some pointer fiddling is performed to ensure this. - */ -static inline void wdebug(int reg, unsigned long data) { - unsigned short dbg_spc[6]; - unsigned short *dbg; - - // Force alignment to long word boundary - dbg = (unsigned short *)((((unsigned long)dbg_spc) + 3) & 0xfffffffc); - - // Build up the debug instruction - dbg[0] = 0x2c80 | (reg & 0xf); - dbg[1] = (data >> 16) & 0xffff; - dbg[2] = data & 0xffff; - dbg[3] = 0; - - // Perform the wdebug instruction -#if 0 - // This strain is for gas which doesn't have the wdebug instructions defined - asm( "move.l %0, %%a0\n\t" - ".word 0xfbd0\n\t" - ".word 0x0003\n\t" - :: "g" (dbg) : "a0"); -#else - // And this is for when it does - asm( "wdebug (%0)" :: "a" (dbg)); -#endif -} - -#endif diff --git a/include/asm-m68knommu/md.h b/include/asm-m68knommu/md.h deleted file mode 100644 index d810c78..0000000 --- a/include/asm-m68knommu/md.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/mman.h b/include/asm-m68knommu/mman.h deleted file mode 100644 index 4846c68..0000000 --- a/include/asm-m68knommu/mman.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/mmu.h b/include/asm-m68knommu/mmu.h deleted file mode 100644 index 5fa6b68..0000000 --- a/include/asm-m68knommu/mmu.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __M68KNOMMU_MMU_H -#define __M68KNOMMU_MMU_H - -/* Copyright (C) 2002, David McCullough */ - -typedef struct { - struct vm_list_struct *vmlist; - unsigned long end_brk; -} mm_context_t; - -#endif /* __M68KNOMMU_MMU_H */ diff --git a/include/asm-m68knommu/mmu_context.h b/include/asm-m68knommu/mmu_context.h deleted file mode 100644 index 9ccee42..0000000 --- a/include/asm-m68knommu/mmu_context.h +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __M68KNOMMU_MMU_CONTEXT_H -#define __M68KNOMMU_MMU_CONTEXT_H - -#include -#include -#include -#include - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -static inline int -init_new_context(struct task_struct *tsk, struct mm_struct *mm) -{ - // mm->context = virt_to_phys(mm->pgd); - return(0); -} - -#define destroy_context(mm) do { } while(0) - -static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk) -{ -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -static inline void activate_mm(struct mm_struct *prev_mm, - struct mm_struct *next_mm) -{ -} - -#endif diff --git a/include/asm-m68knommu/module.h b/include/asm-m68knommu/module.h deleted file mode 100644 index 2e45ab5..0000000 --- a/include/asm-m68knommu/module.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef ASM_M68KNOMMU_MODULE_H -#define ASM_M68KNOMMU_MODULE_H - -struct mod_arch_specific { -}; - -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -#endif /* ASM_M68KNOMMU_MODULE_H */ diff --git a/include/asm-m68knommu/movs.h b/include/asm-m68knommu/movs.h deleted file mode 100644 index 81a1677..0000000 --- a/include/asm-m68knommu/movs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/msgbuf.h b/include/asm-m68knommu/msgbuf.h deleted file mode 100644 index bdfadec4..0000000 --- a/include/asm-m68knommu/msgbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/mutex.h b/include/asm-m68knommu/mutex.h deleted file mode 100644 index 458c1f7..0000000 --- a/include/asm-m68knommu/mutex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * Pull in the generic implementation for the mutex fastpath. - * - * TODO: implement optimized primitives instead, or leave the generic - * implementation in place, or pick the atomic_xchg() based generic - * implementation. (see asm-generic/mutex-xchg.h for details) - */ - -#include diff --git a/include/asm-m68knommu/nettel.h b/include/asm-m68knommu/nettel.h deleted file mode 100644 index 0299f6a..0000000 --- a/include/asm-m68knommu/nettel.h +++ /dev/null @@ -1,108 +0,0 @@ -/****************************************************************************/ - -/* - * nettel.h -- Lineo (formerly Moreton Bay) NETtel support. - * - * (C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com) - * (C) Copyright 2000-2001, Lineo Inc. (www.lineo.com) - * (C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com) - */ - -/****************************************************************************/ -#ifndef nettel_h -#define nettel_h -/****************************************************************************/ - - -/****************************************************************************/ -#ifdef CONFIG_NETtel -/****************************************************************************/ - -#ifdef CONFIG_COLDFIRE -#include -#include -#endif - -/*---------------------------------------------------------------------------*/ -#if defined(CONFIG_M5307) -/* - * NETtel/5307 based hardware first. DTR/DCD lines are wired to - * GPIO lines. Most of the LED's are driver through a latch - * connected to CS2. - */ -#define MCFPP_DCD1 0x0001 -#define MCFPP_DCD0 0x0002 -#define MCFPP_DTR1 0x0004 -#define MCFPP_DTR0 0x0008 - -#define NETtel_LEDADDR 0x30400000 - -#ifndef __ASSEMBLY__ - -extern volatile unsigned short ppdata; - -/* - * These functions defined to give quasi generic access to the - * PPIO bits used for DTR/DCD. - */ -static __inline__ unsigned int mcf_getppdata(void) -{ - volatile unsigned short *pp; - pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT); - return((unsigned int) *pp); -} - -static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) -{ - volatile unsigned short *pp; - pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT); - ppdata = (ppdata & ~mask) | bits; - *pp = ppdata; -} -#endif - -/*---------------------------------------------------------------------------*/ -#elif defined(CONFIG_M5206e) -/* - * NETtel/5206e based hardware has leds on latch on CS3. - * No support modem for lines?? - */ -#define NETtel_LEDADDR 0x50000000 - -/*---------------------------------------------------------------------------*/ -#elif defined(CONFIG_M5272) -/* - * NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines. - */ -#define MCFPP_DCD0 0x0080 -#define MCFPP_DCD1 0x0000 /* Port 1 no DCD support */ -#define MCFPP_DTR0 0x0040 -#define MCFPP_DTR1 0x0000 /* Port 1 no DTR support */ - -#ifndef __ASSEMBLY__ -/* - * These functions defined to give quasi generic access to the - * PPIO bits used for DTR/DCD. - */ -static __inline__ unsigned int mcf_getppdata(void) -{ - volatile unsigned short *pp; - pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT); - return((unsigned int) *pp); -} - -static __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits) -{ - volatile unsigned short *pp; - pp = (volatile unsigned short *) (MCF_MBAR + MCFSIM_PBDAT); - *pp = (*pp & ~mask) | bits; -} -#endif - -#endif -/*---------------------------------------------------------------------------*/ - -/****************************************************************************/ -#endif /* CONFIG_NETtel */ -/****************************************************************************/ -#endif /* nettel_h */ diff --git a/include/asm-m68knommu/openprom.h b/include/asm-m68knommu/openprom.h deleted file mode 100644 index fdba795..0000000 --- a/include/asm-m68knommu/openprom.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/oplib.h b/include/asm-m68knommu/oplib.h deleted file mode 100644 index ce079dc..0000000 --- a/include/asm-m68knommu/oplib.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/page.h b/include/asm-m68knommu/page.h deleted file mode 100644 index 3a1ede4..0000000 --- a/include/asm-m68knommu/page.h +++ /dev/null @@ -1,77 +0,0 @@ -#ifndef _M68KNOMMU_PAGE_H -#define _M68KNOMMU_PAGE_H - -/* PAGE_SHIFT determines the page size */ - -#define PAGE_SHIFT (12) -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#include - -#ifndef __ASSEMBLY__ - -#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) -#define free_user_page(page, addr) free_page(addr) - -#define clear_page(page) memset((page), 0, PAGE_SIZE) -#define copy_page(to,from) memcpy((to), (from), PAGE_SIZE) - -#define clear_user_page(page, vaddr, pg) clear_page(page) -#define copy_user_page(to, from, vaddr, pg) copy_page(to, from) - -#define __alloc_zeroed_user_highpage(movableflags, vma, vaddr) \ - alloc_page_vma(GFP_HIGHUSER | __GFP_ZERO | movableflags, vma, vaddr) -#define __HAVE_ARCH_ALLOC_ZEROED_USER_HIGHPAGE - -/* - * These are used to make use of C type-checking.. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long pmd[16]; } pmd_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct page *pgtable_t; - -#define pte_val(x) ((x).pte) -#define pmd_val(x) ((&x)->pmd[0]) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgd(x) ((pgd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -extern unsigned long memory_start; -extern unsigned long memory_end; - -#endif /* !__ASSEMBLY__ */ - -#include - -#define PAGE_OFFSET (PAGE_OFFSET_RAW) - -#ifndef __ASSEMBLY__ - -#define __pa(vaddr) virt_to_phys((void *)(vaddr)) -#define __va(paddr) phys_to_virt((unsigned long)(paddr)) - -#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) -#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) - -#define virt_to_page(addr) (mem_map + (((unsigned long)(addr)-PAGE_OFFSET) >> PAGE_SHIFT)) -#define page_to_virt(page) ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET) - -#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) -#define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) -#define pfn_valid(pfn) ((pfn) < max_mapnr) - -#define virt_addr_valid(kaddr) (((void *)(kaddr) >= (void *)PAGE_OFFSET) && \ - ((void *)(kaddr) < (void *)memory_end)) - -#endif /* __ASSEMBLY__ */ - -#include - -#endif /* _M68KNOMMU_PAGE_H */ diff --git a/include/asm-m68knommu/page_offset.h b/include/asm-m68knommu/page_offset.h deleted file mode 100644 index d4e73e0..0000000 --- a/include/asm-m68knommu/page_offset.h +++ /dev/null @@ -1,5 +0,0 @@ - - -/* This handles the memory map.. */ -#define PAGE_OFFSET_RAW CONFIG_RAMBASE - diff --git a/include/asm-m68knommu/param.h b/include/asm-m68knommu/param.h deleted file mode 100644 index 6044397..0000000 --- a/include/asm-m68knommu/param.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _M68KNOMMU_PARAM_H -#define _M68KNOMMU_PARAM_H - -#ifdef __KERNEL__ -#define HZ CONFIG_HZ -#define USER_HZ HZ -#define CLOCKS_PER_SEC (USER_HZ) -#endif - -#ifndef HZ -#define HZ 100 -#endif - -#define EXEC_PAGESIZE 4096 - -#ifndef NOGROUP -#define NOGROUP (-1) -#endif - -#define MAXHOSTNAMELEN 64 /* max length of hostname */ - -#endif /* _M68KNOMMU_PARAM_H */ diff --git a/include/asm-m68knommu/pci.h b/include/asm-m68knommu/pci.h deleted file mode 100644 index a13f3cc..0000000 --- a/include/asm-m68knommu/pci.h +++ /dev/null @@ -1,29 +0,0 @@ -#ifndef M68KNOMMU_PCI_H -#define M68KNOMMU_PCI_H - -#include - -#ifdef CONFIG_COMEMPCI -/* - * These are pretty much arbitary with the CoMEM implementation. - * We have the whole address space to ourselves. - */ -#define PCIBIOS_MIN_IO 0x100 -#define PCIBIOS_MIN_MEM 0x00010000 - -#define pcibios_scan_all_fns(a, b) 0 - -/* - * Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) -{ - return 1; -} - -#endif /* CONFIG_COMEMPCI */ - -#endif /* M68KNOMMU_PCI_H */ diff --git a/include/asm-m68knommu/percpu.h b/include/asm-m68knommu/percpu.h deleted file mode 100644 index 5de72c3..0000000 --- a/include/asm-m68knommu/percpu.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ARCH_M68KNOMMU_PERCPU__ -#define __ARCH_M68KNOMMU_PERCPU__ - -#include - -#endif /* __ARCH_M68KNOMMU_PERCPU__ */ diff --git a/include/asm-m68knommu/pgalloc.h b/include/asm-m68knommu/pgalloc.h deleted file mode 100644 index d6352f6..0000000 --- a/include/asm-m68knommu/pgalloc.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef _M68KNOMMU_PGALLOC_H -#define _M68KNOMMU_PGALLOC_H - -#include - -#define check_pgt_cache() do { } while (0) - -#endif /* _M68KNOMMU_PGALLOC_H */ diff --git a/include/asm-m68knommu/pgtable.h b/include/asm-m68knommu/pgtable.h deleted file mode 100644 index 4625101..0000000 --- a/include/asm-m68knommu/pgtable.h +++ /dev/null @@ -1,70 +0,0 @@ -#ifndef _M68KNOMMU_PGTABLE_H -#define _M68KNOMMU_PGTABLE_H - -#include - -/* - * (C) Copyright 2000-2002, Greg Ungerer - */ - -#include -#include -#include -#include - -/* - * Trivial page table functions. - */ -#define pgd_present(pgd) (1) -#define pgd_none(pgd) (0) -#define pgd_bad(pgd) (0) -#define pgd_clear(pgdp) -#define kern_addr_valid(addr) (1) -#define pmd_offset(a, b) ((void *)0) - -#define PAGE_NONE __pgprot(0) -#define PAGE_SHARED __pgprot(0) -#define PAGE_COPY __pgprot(0) -#define PAGE_READONLY __pgprot(0) -#define PAGE_KERNEL __pgprot(0) - -extern void paging_init(void); -#define swapper_pg_dir ((pgd_t *) 0) - -#define __swp_type(x) (0) -#define __swp_offset(x) (0) -#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -static inline int pte_file(pte_t pte) { return 0; } - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -#define ZERO_PAGE(vaddr) (virt_to_page(0)) - -/* - * These would be in other places but having them here reduces the diffs. - */ -extern unsigned int kobjsize(const void *objp); - -/* - * No page table caches to initialise. - */ -#define pgtable_cache_init() do { } while (0) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - -/* - * All 32bit addresses are effectively valid for vmalloc... - * Sort of meaningless for non-VM targets. - */ -#define VMALLOC_START 0 -#define VMALLOC_END 0xffffffff - -#include - -#endif /* _M68KNOMMU_PGTABLE_H */ diff --git a/include/asm-m68knommu/poll.h b/include/asm-m68knommu/poll.h deleted file mode 100644 index ee1b6cb..0000000 --- a/include/asm-m68knommu/poll.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/posix_types.h b/include/asm-m68knommu/posix_types.h deleted file mode 100644 index 6205fb9..0000000 --- a/include/asm-m68knommu/posix_types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h deleted file mode 100644 index 91cba18..0000000 --- a/include/asm-m68knommu/processor.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * include/asm-m68knommu/processor.h - * - * Copyright (C) 1995 Hamish Macdonald - */ - -#ifndef __ASM_M68K_PROCESSOR_H -#define __ASM_M68K_PROCESSOR_H - -/* - * Default implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ __label__ _l; _l: &&_l;}) - -#include -#include -#include -#include -#include -#include -#include - -static inline unsigned long rdusp(void) -{ -#ifdef CONFIG_COLDFIRE - extern unsigned int sw_usp; - return(sw_usp); -#else - unsigned long usp; - __asm__ __volatile__("move %/usp,%0" : "=a" (usp)); - return usp; -#endif -} - -static inline void wrusp(unsigned long usp) -{ -#ifdef CONFIG_COLDFIRE - extern unsigned int sw_usp; - sw_usp = usp; -#else - __asm__ __volatile__("move %0,%/usp" : : "a" (usp)); -#endif -} - -/* - * User space process size: 3.75GB. This is hardcoded into a few places, - * so don't change it unless you know what you are doing. - */ -#define TASK_SIZE (0xF0000000UL) - -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. We won't be using it - */ -#define TASK_UNMAPPED_BASE 0 - -/* - * if you change this structure, you must change the code and offsets - * in m68k/machasm.S - */ - -struct thread_struct { - unsigned long ksp; /* kernel stack pointer */ - unsigned long usp; /* user stack pointer */ - unsigned short sr; /* saved status register */ - unsigned short fs; /* saved fs (sfc, dfc) */ - unsigned long crp[2]; /* cpu root pointer */ - unsigned long esp0; /* points to SR of stack frame */ - unsigned long fp[8*3]; - unsigned long fpcntl[3]; /* fp control regs */ - unsigned char fpstate[FPSTATESIZE]; /* floating point state */ -}; - -#define INIT_THREAD { \ - sizeof(init_stack) + (unsigned long) init_stack, 0, \ - PS_S, __KERNEL_DS, \ - {0, 0}, 0, {0,}, {0, 0, 0}, {0,}, \ -} - -/* - * Coldfire stacks need to be re-aligned on trap exit, conventional - * 68k can handle this case cleanly. - */ -#if defined(CONFIG_COLDFIRE) -#define reformat(_regs) do { (_regs)->format = 0x4; } while(0) -#else -#define reformat(_regs) do { } while (0) -#endif - -/* - * Do necessary setup to start up a newly executed thread. - * - * pass the data segment into user programs if it exists, - * it can't hurt anything as far as I can tell - */ -#define start_thread(_regs, _pc, _usp) \ -do { \ - set_fs(USER_DS); /* reads from user space */ \ - (_regs)->pc = (_pc); \ - ((struct switch_stack *)(_regs))[-1].a6 = 0; \ - reformat(_regs); \ - if (current->mm) \ - (_regs)->d5 = current->mm->start_data; \ - (_regs)->sr &= ~0x2000; \ - wrusp(_usp); \ -} while(0) - -/* Forward declaration, a strange C thing */ -struct task_struct; - -/* Free all resources held by a thread. */ -static inline void release_thread(struct task_struct *dead_task) -{ -} - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -/* - * Free current thread data structures etc.. - */ -static inline void exit_thread(void) -{ -} - -unsigned long thread_saved_pc(struct task_struct *tsk); -unsigned long get_wchan(struct task_struct *p); - -#define KSTK_EIP(tsk) \ - ({ \ - unsigned long eip = 0; \ - if ((tsk)->thread.esp0 > PAGE_SIZE && \ - (virt_addr_valid((tsk)->thread.esp0))) \ - eip = ((struct pt_regs *) (tsk)->thread.esp0)->pc; \ - eip; }) -#define KSTK_ESP(tsk) ((tsk) == current ? rdusp() : (tsk)->thread.usp) - -#define cpu_relax() barrier() - -#endif diff --git a/include/asm-m68knommu/ptrace.h b/include/asm-m68knommu/ptrace.h deleted file mode 100644 index 8c9194b..0000000 --- a/include/asm-m68knommu/ptrace.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef _M68K_PTRACE_H -#define _M68K_PTRACE_H - -#define PT_D1 0 -#define PT_D2 1 -#define PT_D3 2 -#define PT_D4 3 -#define PT_D5 4 -#define PT_D6 5 -#define PT_D7 6 -#define PT_A0 7 -#define PT_A1 8 -#define PT_A2 9 -#define PT_A3 10 -#define PT_A4 11 -#define PT_A5 12 -#define PT_A6 13 -#define PT_D0 14 -#define PT_USP 15 -#define PT_ORIG_D0 16 -#define PT_SR 17 -#define PT_PC 18 - -#ifndef __ASSEMBLY__ - -/* this struct defines the way the registers are stored on the - stack during a system call. */ - -struct pt_regs { - long d1; - long d2; - long d3; - long d4; - long d5; - long a0; - long a1; - long a2; - long d0; - long orig_d0; - long stkadj; -#ifdef CONFIG_COLDFIRE - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ - unsigned short sr; - unsigned long pc; -#else - unsigned short sr; - unsigned long pc; - unsigned format : 4; /* frame format specifier */ - unsigned vector : 12; /* vector offset */ -#endif -}; - -/* - * This is the extended stack used by signal handlers and the context - * switcher: it's pushed after the normal "struct pt_regs". - */ -struct switch_stack { - unsigned long d6; - unsigned long d7; - unsigned long a3; - unsigned long a4; - unsigned long a5; - unsigned long a6; - unsigned long retpc; -}; - -/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */ -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 - -#ifdef __KERNEL__ - -#ifndef PS_S -#define PS_S (0x2000) -#define PS_M (0x1000) -#endif - -#define user_mode(regs) (!((regs)->sr & PS_S)) -#define instruction_pointer(regs) ((regs)->pc) -#define profile_pc(regs) instruction_pointer(regs) -extern void show_regs(struct pt_regs *); -#endif /* __KERNEL__ */ -#endif /* __ASSEMBLY__ */ -#endif /* _M68K_PTRACE_H */ diff --git a/include/asm-m68knommu/quicc_simple.h b/include/asm-m68knommu/quicc_simple.h deleted file mode 100644 index c363693..0000000 --- a/include/asm-m68knommu/quicc_simple.h +++ /dev/null @@ -1,52 +0,0 @@ -/*********************************** - * $Id: quicc_simple.h,v 1.1 2002/03/02 15:01:10 gerg Exp $ - *********************************** - * - *************************************** - * Simple drivers common header - *************************************** - */ - -#ifndef __SIMPLE_H -#define __SIMPLE_H - -/* #include "quicc.h" */ - -#define GLB_SCC_0 0 -#define GLB_SCC_1 1 -#define GLB_SCC_2 2 -#define GLB_SCC_3 3 - -typedef void (int_routine)(unsigned short interrupt_event); -typedef int_routine *int_routine_ptr; -typedef void *(alloc_routine)(int length); -typedef void (free_routine)(int scc_num, int channel_num, void *buf); -typedef void (store_rx_buffer_routine)(int scc_num, int channel_num, void *buff, int length); -typedef int (handle_tx_error_routine)(int scc_num, int channel_num, QUICC_BD *tbd); -typedef void (handle_rx_error_routine)(int scc_num, int channel_num, QUICC_BD *rbd); -typedef void (handle_lost_error_routine)(int scc_num, int channel_num); - -/* user defined functions for global errors */ -typedef void (handle_glob_overrun_routine)(int scc_number); -typedef void (handle_glob_underrun_routine)(int scc_number); -typedef void (glob_intr_q_overflow_routine)(int scc_number); - -/* - * General initialization and command routines - */ -void quicc_issue_cmd (unsigned short cmd, int scc_num); -void quicc_init(void); -void quicc_scc_init(int scc_number, int number_of_rx_buf, int number_of_tx_buf); -void quicc_smc_init(int smc_number, int number_of_rx_buf, int number_of_tx_buf); -void quicc_scc_start(int scc_num); -void quicc_scc_loopback(int scc_num); - -/* Interrupt enable/disable routines for critical pieces of code*/ -unsigned short IntrDis(void); -void IntrEna(unsigned short old_sr); - -/* For debugging */ -void print_rbd(int scc_num); -void print_tbd(int scc_num); - -#endif diff --git a/include/asm-m68knommu/resource.h b/include/asm-m68knommu/resource.h deleted file mode 100644 index 7fa63d5..0000000 --- a/include/asm-m68knommu/resource.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/rtc.h b/include/asm-m68knommu/rtc.h deleted file mode 100644 index eaf18ec..0000000 --- a/include/asm-m68knommu/rtc.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/scatterlist.h b/include/asm-m68knommu/scatterlist.h deleted file mode 100644 index afc4788..0000000 --- a/include/asm-m68knommu/scatterlist.h +++ /dev/null @@ -1,22 +0,0 @@ -#ifndef _M68KNOMMU_SCATTERLIST_H -#define _M68KNOMMU_SCATTERLIST_H - -#include -#include - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - dma_addr_t dma_address; - unsigned int length; -}; - -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->length) - -#define ISA_DMA_THRESHOLD (0xffffffff) - -#endif /* !(_M68KNOMMU_SCATTERLIST_H) */ diff --git a/include/asm-m68knommu/sections.h b/include/asm-m68knommu/sections.h deleted file mode 100644 index dd0ecb9..0000000 --- a/include/asm-m68knommu/sections.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _M68KNOMMU_SECTIONS_H -#define _M68KNOMMU_SECTIONS_H - -/* nothing to see, move along */ -#include - -#endif diff --git a/include/asm-m68knommu/segment.h b/include/asm-m68knommu/segment.h deleted file mode 100644 index 42318eb..0000000 --- a/include/asm-m68knommu/segment.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef _M68K_SEGMENT_H -#define _M68K_SEGMENT_H - -/* define constants */ -/* Address spaces (FC0-FC2) */ -#define USER_DATA (1) -#ifndef __USER_DS -#define __USER_DS (USER_DATA) -#endif -#define USER_PROGRAM (2) -#define SUPER_DATA (5) -#ifndef __KERNEL_DS -#define __KERNEL_DS (SUPER_DATA) -#endif -#define SUPER_PROGRAM (6) -#define CPU_SPACE (7) - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned long seg; -} mm_segment_t; - -#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) -#define USER_DS MAKE_MM_SEG(__USER_DS) -#define KERNEL_DS MAKE_MM_SEG(__KERNEL_DS) - -/* - * Get/set the SFC/DFC registers for MOVES instructions - */ - -static inline mm_segment_t get_fs(void) -{ - return USER_DS; -} - -static inline mm_segment_t get_ds(void) -{ - /* return the supervisor data space code */ - return KERNEL_DS; -} - -static inline void set_fs(mm_segment_t val) -{ -} - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#endif /* __ASSEMBLY__ */ - -#endif /* _M68K_SEGMENT_H */ diff --git a/include/asm-m68knommu/sembuf.h b/include/asm-m68knommu/sembuf.h deleted file mode 100644 index 3a634f9..0000000 --- a/include/asm-m68knommu/sembuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/setup.h b/include/asm-m68knommu/setup.h deleted file mode 100644 index fb86bb2..0000000 --- a/include/asm-m68knommu/setup.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifdef __KERNEL__ - -#include - -/* We have a bigger command line buffer. */ -#undef COMMAND_LINE_SIZE - -#endif /* __KERNEL__ */ - -#define COMMAND_LINE_SIZE 512 diff --git a/include/asm-m68knommu/shm.h b/include/asm-m68knommu/shm.h deleted file mode 100644 index cc8e522..0000000 --- a/include/asm-m68knommu/shm.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/shmbuf.h b/include/asm-m68knommu/shmbuf.h deleted file mode 100644 index bc34cf8..0000000 --- a/include/asm-m68knommu/shmbuf.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/shmparam.h b/include/asm-m68knommu/shmparam.h deleted file mode 100644 index d7ee696..0000000 --- a/include/asm-m68knommu/shmparam.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/sigcontext.h b/include/asm-m68knommu/sigcontext.h deleted file mode 100644 index 36c293f..0000000 --- a/include/asm-m68knommu/sigcontext.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef _ASM_M68KNOMMU_SIGCONTEXT_H -#define _ASM_M68KNOMMU_SIGCONTEXT_H - -struct sigcontext { - unsigned long sc_mask; /* old sigmask */ - unsigned long sc_usp; /* old user stack pointer */ - unsigned long sc_d0; - unsigned long sc_d1; - unsigned long sc_a0; - unsigned long sc_a1; - unsigned long sc_a5; - unsigned short sc_sr; - unsigned long sc_pc; - unsigned short sc_formatvec; -}; - -#endif diff --git a/include/asm-m68knommu/siginfo.h b/include/asm-m68knommu/siginfo.h deleted file mode 100644 index b18e5f4..0000000 --- a/include/asm-m68knommu/siginfo.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _M68KNOMMU_SIGINFO_H -#define _M68KNOMMU_SIGINFO_H - -#include - -#endif diff --git a/include/asm-m68knommu/signal.h b/include/asm-m68knommu/signal.h deleted file mode 100644 index 216c08b..0000000 --- a/include/asm-m68knommu/signal.h +++ /dev/null @@ -1,159 +0,0 @@ -#ifndef _M68KNOMMU_SIGNAL_H -#define _M68KNOMMU_SIGNAL_H - -#include - -/* Avoid too many header ordering problems. */ -struct siginfo; - -#ifdef __KERNEL__ -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define _NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (_NSIG / _NSIG_BPW) - -typedef unsigned long old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} sigset_t; - -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -#define NSIG 32 -typedef unsigned long sigset_t; - -#endif /* __KERNEL__ */ - -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 -#define SIGBUS 7 -#define SIGFPE 8 -#define SIGKILL 9 -#define SIGUSR1 10 -#define SIGSEGV 11 -#define SIGUSR2 12 -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGSTKFLT 16 -#define SIGCHLD 17 -#define SIGCONT 18 -#define SIGSTOP 19 -#define SIGTSTP 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGURG 23 -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGIO 29 -#define SIGPOLL SIGIO -/* -#define SIGLOST 29 -*/ -#define SIGPWR 30 -#define SIGSYS 31 -#define SIGUNUSED 31 - -/* These should not be considered constants from userland. */ -#define SIGRTMIN 32 -#define SIGRTMAX _NSIG - -/* - * SA_FLAGS values: - * - * SA_ONSTACK indicates that a registered stack_t will be used. - * SA_RESTART flag to get restarting signals (which were the default long ago) - * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. - * SA_RESETHAND clears the handler when the signal is delivered. - * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. - * SA_NODEFER prevents the current signal from being masked in the handler. - * - * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single - * Unix names RESETHAND and NODEFER respectively. - */ -#define SA_NOCLDSTOP 0x00000001 -#define SA_NOCLDWAIT 0x00000002 -#define SA_SIGINFO 0x00000004 -#define SA_ONSTACK 0x08000000 -#define SA_RESTART 0x10000000 -#define SA_NODEFER 0x40000000 -#define SA_RESETHAND 0x80000000 - -#define SA_NOMASK SA_NODEFER -#define SA_ONESHOT SA_RESETHAND - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 2048 -#define SIGSTKSZ 8192 - -#include - -#ifdef __KERNEL__ -struct old_sigaction { - __sighandler_t sa_handler; - old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -struct sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); - sigset_t sa_mask; /* mask last for extensibility */ -}; - -struct k_sigaction { - struct sigaction sa; -}; -#else -/* Here we must cater to libcs that poke about in kernel headers. */ - -struct sigaction { - union { - __sighandler_t _sa_handler; - void (*_sa_sigaction)(int, struct siginfo *, void *); - } _u; - sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); -}; - -#define sa_handler _u._sa_handler -#define sa_sigaction _u._sa_sigaction - -#endif /* __KERNEL__ */ - -typedef struct sigaltstack { - void *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - -#include -#undef __HAVE_ARCH_SIG_BITOPS - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* __KERNEL__ */ - -#endif /* _M68KNOMMU_SIGNAL_H */ diff --git a/include/asm-m68knommu/smp.h b/include/asm-m68knommu/smp.h deleted file mode 100644 index 9e9bd7e..0000000 --- a/include/asm-m68knommu/smp.h +++ /dev/null @@ -1 +0,0 @@ -/* nothing required here yet */ diff --git a/include/asm-m68knommu/socket.h b/include/asm-m68knommu/socket.h deleted file mode 100644 index ac5478b..0000000 --- a/include/asm-m68knommu/socket.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/sockios.h b/include/asm-m68knommu/sockios.h deleted file mode 100644 index dcc6a89..0000000 --- a/include/asm-m68knommu/sockios.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/spinlock.h b/include/asm-m68knommu/spinlock.h deleted file mode 100644 index 6bb1f06..0000000 --- a/include/asm-m68knommu/spinlock.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/stat.h b/include/asm-m68knommu/stat.h deleted file mode 100644 index 3d4b260..0000000 --- a/include/asm-m68knommu/stat.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/statfs.h b/include/asm-m68knommu/statfs.h deleted file mode 100644 index 2ce99ea..0000000 --- a/include/asm-m68knommu/statfs.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/string.h b/include/asm-m68knommu/string.h deleted file mode 100644 index af09e17..0000000 --- a/include/asm-m68knommu/string.h +++ /dev/null @@ -1,126 +0,0 @@ -#ifndef _M68KNOMMU_STRING_H_ -#define _M68KNOMMU_STRING_H_ - -#ifdef __KERNEL__ /* only set these up for kernel code */ - -#include -#include - -#define __HAVE_ARCH_STRCPY -static inline char * strcpy(char * dest,const char *src) -{ - char *xdest = dest; - - __asm__ __volatile__ - ("1:\tmoveb %1@+,%0@+\n\t" - "jne 1b" - : "=a" (dest), "=a" (src) - : "0" (dest), "1" (src) : "memory"); - return xdest; -} - -#define __HAVE_ARCH_STRNCPY -static inline char * strncpy(char *dest, const char *src, size_t n) -{ - char *xdest = dest; - - if (n == 0) - return xdest; - - __asm__ __volatile__ - ("1:\tmoveb %1@+,%0@+\n\t" - "jeq 2f\n\t" - "subql #1,%2\n\t" - "jne 1b\n\t" - "2:" - : "=a" (dest), "=a" (src), "=d" (n) - : "0" (dest), "1" (src), "2" (n) - : "memory"); - return xdest; -} - - -#ifndef CONFIG_COLDFIRE - -#define __HAVE_ARCH_STRCMP -static inline int strcmp(const char * cs,const char * ct) -{ - char __res; - - __asm__ - ("1:\tmoveb %0@+,%2\n\t" /* get *cs */ - "cmpb %1@+,%2\n\t" /* compare a byte */ - "jne 2f\n\t" /* not equal, break out */ - "tstb %2\n\t" /* at end of cs? */ - "jne 1b\n\t" /* no, keep going */ - "jra 3f\n\t" /* strings are equal */ - "2:\tsubb %1@-,%2\n\t" /* *cs - *ct */ - "3:" - : "=a" (cs), "=a" (ct), "=d" (__res) - : "0" (cs), "1" (ct)); - - return __res; -} - -#define __HAVE_ARCH_STRNCMP -static inline int strncmp(const char * cs,const char * ct,size_t count) -{ - char __res; - - if (!count) - return 0; - __asm__ - ("1:\tmovb %0@+,%3\n\t" /* get *cs */ - "cmpb %1@+,%3\n\t" /* compare a byte */ - "jne 3f\n\t" /* not equal, break out */ - "tstb %3\n\t" /* at end of cs? */ - "jeq 4f\n\t" /* yes, all done */ - "subql #1,%2\n\t" /* no, adjust count */ - "jne 1b\n\t" /* more to do, keep going */ - "2:\tmoveq #0,%3\n\t" /* strings are equal */ - "jra 4f\n\t" - "3:\tsubb %1@-,%3\n\t" /* *cs - *ct */ - "4:" - : "=a" (cs), "=a" (ct), "=d" (count), "=d" (__res) - : "0" (cs), "1" (ct), "2" (count)); - return __res; -} - -#endif /* CONFIG_COLDFIRE */ - -#define __HAVE_ARCH_MEMSET -extern void * memset(void * s, int c, size_t count); - -#define __HAVE_ARCH_MEMCPY -extern void * memcpy(void *d, const void *s, size_t count); - -#else /* KERNEL */ - -/* - * let user libraries deal with these, - * IMHO the kernel has no place defining these functions for user apps - */ - -#define __HAVE_ARCH_STRCPY 1 -#define __HAVE_ARCH_STRNCPY 1 -#define __HAVE_ARCH_STRCAT 1 -#define __HAVE_ARCH_STRNCAT 1 -#define __HAVE_ARCH_STRCMP 1 -#define __HAVE_ARCH_STRNCMP 1 -#define __HAVE_ARCH_STRNICMP 1 -#define __HAVE_ARCH_STRCHR 1 -#define __HAVE_ARCH_STRRCHR 1 -#define __HAVE_ARCH_STRSTR 1 -#define __HAVE_ARCH_STRLEN 1 -#define __HAVE_ARCH_STRNLEN 1 -#define __HAVE_ARCH_MEMSET 1 -#define __HAVE_ARCH_MEMCPY 1 -#define __HAVE_ARCH_MEMMOVE 1 -#define __HAVE_ARCH_MEMSCAN 1 -#define __HAVE_ARCH_MEMCMP 1 -#define __HAVE_ARCH_MEMCHR 1 -#define __HAVE_ARCH_STRTOK 1 - -#endif /* KERNEL */ - -#endif /* _M68K_STRING_H_ */ diff --git a/include/asm-m68knommu/system.h b/include/asm-m68knommu/system.h deleted file mode 100644 index 40f49de..0000000 --- a/include/asm-m68knommu/system.h +++ /dev/null @@ -1,324 +0,0 @@ -#ifndef _M68KNOMMU_SYSTEM_H -#define _M68KNOMMU_SYSTEM_H - -#include -#include -#include - -/* - * switch_to(n) should switch tasks to task ptr, first checking that - * ptr isn't the current task, in which case it does nothing. This - * also clears the TS-flag if the task we switched to has used the - * math co-processor latest. - */ -/* - * switch_to() saves the extra registers, that are not saved - * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and - * a0-a1. Some of these are used by schedule() and its predecessors - * and so we might get see unexpected behaviors when a task returns - * with unexpected register values. - * - * syscall stores these registers itself and none of them are used - * by syscall after the function in the syscall has been called. - * - * Beware that resume now expects *next to be in d1 and the offset of - * tss to be in a1. This saves a few instructions as we no longer have - * to push them onto the stack and read them back right after. - * - * 02/17/96 - Jes Sorensen (jds@kom.auc.dk) - * - * Changed 96/09/19 by Andreas Schwab - * pass prev in a0, next in a1, offset of tss in d1, and whether - * the mm structures are shared in d2 (to avoid atc flushing). - */ -asmlinkage void resume(void); -#define switch_to(prev,next,last) \ -{ \ - void *_last; \ - __asm__ __volatile__( \ - "movel %1, %%a0\n\t" \ - "movel %2, %%a1\n\t" \ - "jbsr resume\n\t" \ - "movel %%d1, %0\n\t" \ - : "=d" (_last) \ - : "d" (prev), "d" (next) \ - : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \ - (last) = _last; \ -} - -#ifdef CONFIG_COLDFIRE -#define local_irq_enable() __asm__ __volatile__ ( \ - "move %/sr,%%d0\n\t" \ - "andi.l #0xf8ff,%%d0\n\t" \ - "move %%d0,%/sr\n" \ - : /* no outputs */ \ - : \ - : "cc", "%d0", "memory") -#define local_irq_disable() __asm__ __volatile__ ( \ - "move %/sr,%%d0\n\t" \ - "ori.l #0x0700,%%d0\n\t" \ - "move %%d0,%/sr\n" \ - : /* no outputs */ \ - : \ - : "cc", "%d0", "memory") -/* For spinlocks etc */ -#define local_irq_save(x) __asm__ __volatile__ ( \ - "movew %%sr,%0\n\t" \ - "movew #0x0700,%%d0\n\t" \ - "or.l %0,%%d0\n\t" \ - "movew %%d0,%/sr" \ - : "=d" (x) \ - : \ - : "cc", "%d0", "memory") -#else - -/* portable version */ /* FIXME - see entry.h*/ -#define ALLOWINT 0xf8ff - -#define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory") -#define local_irq_disable() asm volatile ("oriw #0x0700,%%sr": : : "memory") -#endif - -#define local_save_flags(x) asm volatile ("movew %%sr,%0":"=d" (x) : : "memory") -#define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory") - -/* For spinlocks etc */ -#ifndef local_irq_save -#define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0) -#endif - -#define irqs_disabled() \ -({ \ - unsigned long flags; \ - local_save_flags(flags); \ - ((flags & 0x0700) == 0x0700); \ -}) - -#define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc") - -/* - * Force strict CPU ordering. - * Not really required on m68k... - */ -#define nop() asm volatile ("nop"::) -#define mb() asm volatile ("" : : :"memory") -#define rmb() asm volatile ("" : : :"memory") -#define wmb() asm volatile ("" : : :"memory") -#define set_mb(var, value) ({ (var) = (value); wmb(); }) - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() barrier() -#define smp_rmb() barrier() -#define smp_wmb() barrier() -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define read_barrier_depends() ((void)0) - -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -struct __xchg_dummy { unsigned long a[100]; }; -#define __xg(x) ((volatile struct __xchg_dummy *)(x)) - -#ifndef CONFIG_RMW_INSNS -static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) -{ - unsigned long tmp, flags; - - local_irq_save(flags); - - switch (size) { - case 1: - __asm__ __volatile__ - ("moveb %2,%0\n\t" - "moveb %1,%2" - : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - case 2: - __asm__ __volatile__ - ("movew %2,%0\n\t" - "movew %1,%2" - : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - case 4: - __asm__ __volatile__ - ("movel %2,%0\n\t" - "movel %1,%2" - : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - } - local_irq_restore(flags); - return tmp; -} -#else -static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size) -{ - switch (size) { - case 1: - __asm__ __volatile__ - ("moveb %2,%0\n\t" - "1:\n\t" - "casb %0,%1,%2\n\t" - "jne 1b" - : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - case 2: - __asm__ __volatile__ - ("movew %2,%0\n\t" - "1:\n\t" - "casw %0,%1,%2\n\t" - "jne 1b" - : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - case 4: - __asm__ __volatile__ - ("movel %2,%0\n\t" - "1:\n\t" - "casl %0,%1,%2\n\t" - "jne 1b" - : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory"); - break; - } - return x; -} -#endif - -#include - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - -#ifndef CONFIG_SMP -#include -#endif - -#if defined( CONFIG_M68328 ) || defined( CONFIG_M68EZ328 ) || \ - defined (CONFIG_M68360) || defined( CONFIG_M68VZ328 ) -#define HARD_RESET_NOW() ({ \ - local_irq_disable(); \ - asm(" \ - moveal #0x10c00000, %a0; \ - moveb #0, 0xFFFFF300; \ - moveal 0(%a0), %sp; \ - moveal 4(%a0), %a0; \ - jmp (%a0); \ - "); \ -}) -#endif - -#ifdef CONFIG_COLDFIRE -#if defined(CONFIG_M5272) && defined(CONFIG_NETtel) -/* - * Need to account for broken early mask of 5272 silicon. So don't - * jump through the original start address. Jump strait into the - * known start of the FLASH code. - */ -#define HARD_RESET_NOW() ({ \ - asm(" \ - movew #0x2700, %sr; \ - jmp 0xf0000400; \ - "); \ -}) -#elif defined(CONFIG_NETtel) || defined(CONFIG_eLIA) || \ - defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA) -#define HARD_RESET_NOW() ({ \ - asm(" \ - movew #0x2700, %sr; \ - moveal #0x10000044, %a0; \ - movel #0xffffffff, (%a0); \ - moveal #0x10000001, %a0; \ - moveb #0x00, (%a0); \ - moveal #0xf0000004, %a0; \ - moveal (%a0), %a0; \ - jmp (%a0); \ - "); \ -}) -#elif defined(CONFIG_M5272) -/* - * Retrieve the boot address in flash using CSBR0 and CSOR0 - * find the reset vector at flash_address + 4 (e.g. 0x400) - * remap it in the flash's current location (e.g. 0xf0000400) - * and jump there. - */ -#define HARD_RESET_NOW() ({ \ - asm(" \ - movew #0x2700, %%sr; \ - move.l %0+0x40,%%d0; \ - and.l %0+0x44,%%d0; \ - andi.l #0xfffff000,%%d0; \ - mov.l %%d0,%%a0; \ - or.l 4(%%a0),%%d0; \ - mov.l %%d0,%%a0; \ - jmp (%%a0);" \ - : /* No output */ \ - : "o" (*(char *)MCF_MBAR) ); \ -}) -#elif defined(CONFIG_M528x) -/* - * The MCF528x has a bit (SOFTRST) in memory (Reset Control Register RCR), - * that when set, resets the MCF528x. - */ -#define HARD_RESET_NOW() \ -({ \ - unsigned char volatile *reset; \ - asm("move.w #0x2700, %sr"); \ - reset = ((volatile unsigned char *)(MCF_IPSBAR + 0x110000)); \ - while(1) \ - *reset |= (0x01 << 7);\ -}) -#elif defined(CONFIG_M523x) -#define HARD_RESET_NOW() ({ \ - asm(" \ - movew #0x2700, %sr; \ - movel #0x01000000, %sp; \ - moveal #0x40110000, %a0; \ - moveb #0x80, (%a0); \ - "); \ -}) -#elif defined(CONFIG_M520x) - /* - * The MCF5208 has a bit (SOFTRST) in memory (Reset Control Register - * RCR), that when set, resets the MCF5208. - */ -#define HARD_RESET_NOW() \ -({ \ - unsigned char volatile *reset; \ - asm("move.w #0x2700, %sr"); \ - reset = ((volatile unsigned char *)(MCF_IPSBAR + 0xA0000)); \ - while(1) \ - *reset |= 0x80; \ -}) -#else -#define HARD_RESET_NOW() ({ \ - asm(" \ - movew #0x2700, %sr; \ - moveal #0x4, %a0; \ - moveal (%a0), %a0; \ - jmp (%a0); \ - "); \ -}) -#endif -#endif -#define arch_align_stack(x) (x) - - -static inline int irqs_disabled_flags(unsigned long flags) -{ - if (flags & 0x0700) - return 0; - else - return 1; -} - -#endif /* _M68KNOMMU_SYSTEM_H */ diff --git a/include/asm-m68knommu/termbits.h b/include/asm-m68knommu/termbits.h deleted file mode 100644 index 05dd6bc..0000000 --- a/include/asm-m68knommu/termbits.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/termios.h b/include/asm-m68knommu/termios.h deleted file mode 100644 index e733788..0000000 --- a/include/asm-m68knommu/termios.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/thread_info.h b/include/asm-m68knommu/thread_info.h deleted file mode 100644 index 0c9bc09..0000000 --- a/include/asm-m68knommu/thread_info.h +++ /dev/null @@ -1,98 +0,0 @@ -/* thread_info.h: m68knommu low-level thread information - * adapted from the i386 and PPC versions by Greg Ungerer (gerg@snapgear.com) - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#include - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -/* - * Size of kernel stack for each process. This must be a power of 2... - */ -#ifdef CONFIG_4KSTACKS -#define THREAD_SIZE_ORDER (0) -#else -#define THREAD_SIZE_ORDER (1) -#endif - -/* - * for asm files, THREAD_SIZE is now generated by asm-offsets.c - */ -#define THREAD_SIZE (PAGE_SIZE< preemptable, <0 => BUG */ - struct restart_block restart_block; -}; - -/* - * macros/functions for gaining access to the thread information structure - */ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - - -/* how to get the thread information struct from C */ -static inline struct thread_info *current_thread_info(void) -{ - struct thread_info *ti; - __asm__( - "move.l %%sp, %0 \n\t" - "and.l %1, %0" - : "=&d"(ti) - : "di" (~(THREAD_SIZE-1)) - ); - return ti; -} - -#endif /* __ASSEMBLY__ */ - -#define PREEMPT_ACTIVE 0x4000000 - -/* - * thread information flag bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_SIGPENDING 1 /* signal pending */ -#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ -#define TIF_POLLING_NRFLAG 3 /* true if poll_idle() is polling - TIF_NEED_RESCHED */ -#define TIF_MEMDIE 4 - -/* as above, but as bit values */ -#define _TIF_SYSCALL_TRACE (1< -#define CLOCK_TICK_RATE MCF_CLK -#else -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ -#endif - -typedef unsigned long cycles_t; - -static inline cycles_t get_cycles(void) -{ - return 0; -} - -#endif diff --git a/include/asm-m68knommu/tlb.h b/include/asm-m68knommu/tlb.h deleted file mode 100644 index 77a7c51..0000000 --- a/include/asm-m68knommu/tlb.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/tlbflush.h b/include/asm-m68knommu/tlbflush.h deleted file mode 100644 index a470cfb..0000000 --- a/include/asm-m68knommu/tlbflush.h +++ /dev/null @@ -1,55 +0,0 @@ -#ifndef _M68KNOMMU_TLBFLUSH_H -#define _M68KNOMMU_TLBFLUSH_H - -/* - * Copyright (C) 2000 Lineo, David McCullough - * Copyright (C) 2000-2002, Greg Ungerer - */ - -#include - -/* - * flush all user-space atc entries. - */ -static inline void __flush_tlb(void) -{ - BUG(); -} - -static inline void __flush_tlb_one(unsigned long addr) -{ - BUG(); -} - -#define flush_tlb() __flush_tlb() - -/* - * flush all atc entries (both kernel and user-space entries). - */ -static inline void flush_tlb_all(void) -{ - BUG(); -} - -static inline void flush_tlb_mm(struct mm_struct *mm) -{ - BUG(); -} - -static inline void flush_tlb_page(struct vm_area_struct *vma, unsigned long addr) -{ - BUG(); -} - -static inline void flush_tlb_range(struct mm_struct *mm, - unsigned long start, unsigned long end) -{ - BUG(); -} - -static inline void flush_tlb_kernel_page(unsigned long addr) -{ - BUG(); -} - -#endif /* _M68KNOMMU_TLBFLUSH_H */ diff --git a/include/asm-m68knommu/topology.h b/include/asm-m68knommu/topology.h deleted file mode 100644 index ca173e9..0000000 --- a/include/asm-m68knommu/topology.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _ASM_M68K_TOPOLOGY_H -#define _ASM_M68K_TOPOLOGY_H - -#include - -#endif /* _ASM_M68K_TOPOLOGY_H */ diff --git a/include/asm-m68knommu/traps.h b/include/asm-m68knommu/traps.h deleted file mode 100644 index d0671e5..0000000 --- a/include/asm-m68knommu/traps.h +++ /dev/null @@ -1,154 +0,0 @@ -/* - * linux/include/asm/traps.h - * - * Copyright (C) 1993 Hamish Macdonald - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#ifndef _M68KNOMMU_TRAPS_H -#define _M68KNOMMU_TRAPS_H - -#ifndef __ASSEMBLY__ - -typedef void (*e_vector)(void); - -extern e_vector vectors[]; -extern void init_vectors(void); -extern void enable_vector(unsigned int irq); -extern void disable_vector(unsigned int irq); -extern void ack_vector(unsigned int irq); - -#endif - -#define VEC_BUSERR (2) -#define VEC_ADDRERR (3) -#define VEC_ILLEGAL (4) -#define VEC_ZERODIV (5) -#define VEC_CHK (6) -#define VEC_TRAP (7) -#define VEC_PRIV (8) -#define VEC_TRACE (9) -#define VEC_LINE10 (10) -#define VEC_LINE11 (11) -#define VEC_RESV1 (12) -#define VEC_COPROC (13) -#define VEC_FORMAT (14) -#define VEC_UNINT (15) -#define VEC_SPUR (24) -#define VEC_INT1 (25) -#define VEC_INT2 (26) -#define VEC_INT3 (27) -#define VEC_INT4 (28) -#define VEC_INT5 (29) -#define VEC_INT6 (30) -#define VEC_INT7 (31) -#define VEC_SYS (32) -#define VEC_TRAP1 (33) -#define VEC_TRAP2 (34) -#define VEC_TRAP3 (35) -#define VEC_TRAP4 (36) -#define VEC_TRAP5 (37) -#define VEC_TRAP6 (38) -#define VEC_TRAP7 (39) -#define VEC_TRAP8 (40) -#define VEC_TRAP9 (41) -#define VEC_TRAP10 (42) -#define VEC_TRAP11 (43) -#define VEC_TRAP12 (44) -#define VEC_TRAP13 (45) -#define VEC_TRAP14 (46) -#define VEC_TRAP15 (47) -#define VEC_FPBRUC (48) -#define VEC_FPIR (49) -#define VEC_FPDIVZ (50) -#define VEC_FPUNDER (51) -#define VEC_FPOE (52) -#define VEC_FPOVER (53) -#define VEC_FPNAN (54) -#define VEC_FPUNSUP (55) -#define VEC_UNIMPEA (60) -#define VEC_UNIMPII (61) -#define VEC_USER (64) - -#define VECOFF(vec) ((vec)<<2) - -#ifndef __ASSEMBLY__ - -/* Status register bits */ -#define PS_T (0x8000) -#define PS_S (0x2000) -#define PS_M (0x1000) -#define PS_C (0x0001) - -/* structure for stack frames */ - -struct frame { - struct pt_regs ptregs; - union { - struct { - unsigned long iaddr; /* instruction address */ - } fmt2; - struct { - unsigned long effaddr; /* effective address */ - } fmt3; - struct { - unsigned long effaddr; /* effective address */ - unsigned long pc; /* pc of faulted instr */ - } fmt4; - struct { - unsigned long effaddr; /* effective address */ - unsigned short ssw; /* special status word */ - unsigned short wb3s; /* write back 3 status */ - unsigned short wb2s; /* write back 2 status */ - unsigned short wb1s; /* write back 1 status */ - unsigned long faddr; /* fault address */ - unsigned long wb3a; /* write back 3 address */ - unsigned long wb3d; /* write back 3 data */ - unsigned long wb2a; /* write back 2 address */ - unsigned long wb2d; /* write back 2 data */ - unsigned long wb1a; /* write back 1 address */ - unsigned long wb1dpd0; /* write back 1 data/push data 0*/ - unsigned long pd1; /* push data 1*/ - unsigned long pd2; /* push data 2*/ - unsigned long pd3; /* push data 3*/ - } fmt7; - struct { - unsigned long iaddr; /* instruction address */ - unsigned short int1[4]; /* internal registers */ - } fmt9; - struct { - unsigned short int1; - unsigned short ssw; /* special status word */ - unsigned short isc; /* instruction stage c */ - unsigned short isb; /* instruction stage b */ - unsigned long daddr; /* data cycle fault address */ - unsigned short int2[2]; - unsigned long dobuf; /* data cycle output buffer */ - unsigned short int3[2]; - } fmta; - struct { - unsigned short int1; - unsigned short ssw; /* special status word */ - unsigned short isc; /* instruction stage c */ - unsigned short isb; /* instruction stage b */ - unsigned long daddr; /* data cycle fault address */ - unsigned short int2[2]; - unsigned long dobuf; /* data cycle output buffer */ - unsigned short int3[4]; - unsigned long baddr; /* stage B address */ - unsigned short int4[2]; - unsigned long dibuf; /* data cycle input buffer */ - unsigned short int5[3]; - unsigned ver : 4; /* stack frame version # */ - unsigned int6:12; - unsigned short int7[18]; - } fmtb; - } un; -}; - -#endif /* __ASSEMBLY__ */ - -#endif /* _M68KNOMMU_TRAPS_H */ diff --git a/include/asm-m68knommu/types.h b/include/asm-m68knommu/types.h deleted file mode 100644 index 031238c..0000000 --- a/include/asm-m68knommu/types.h +++ /dev/null @@ -1 +0,0 @@ -#include diff --git a/include/asm-m68knommu/uaccess.h b/include/asm-m68knommu/uaccess.h deleted file mode 100644 index 68bbe9b..0000000 --- a/include/asm-m68knommu/uaccess.h +++ /dev/null @@ -1,181 +0,0 @@ -#ifndef __M68KNOMMU_UACCESS_H -#define __M68KNOMMU_UACCESS_H - -/* - * User space memory access functions - */ -#include -#include -#include - -#include - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define access_ok(type,addr,size) _access_ok((unsigned long)(addr),(size)) - -/* - * It is not enough to just have access_ok check for a real RAM address. - * This would disallow the case of code/ro-data running XIP in flash/rom. - * Ideally we would check the possible flash ranges too, but that is - * currently not so easy. - */ -static inline int _access_ok(unsigned long addr, unsigned long size) -{ - return 1; -} - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -/* Returns 0 if exception not found and fixup otherwise. */ -extern unsigned long search_exception_table(unsigned long); - - -/* - * These are the main single-value transfer routines. They automatically - * use the right size if we just have the right pointer type. - */ - -#define put_user(x, ptr) \ -({ \ - int __pu_err = 0; \ - typeof(*(ptr)) __pu_val = (x); \ - switch (sizeof (*(ptr))) { \ - case 1: \ - __put_user_asm(__pu_err, __pu_val, ptr, b); \ - break; \ - case 2: \ - __put_user_asm(__pu_err, __pu_val, ptr, w); \ - break; \ - case 4: \ - __put_user_asm(__pu_err, __pu_val, ptr, l); \ - break; \ - case 8: \ - memcpy(ptr, &__pu_val, sizeof (*(ptr))); \ - break; \ - default: \ - __pu_err = __put_user_bad(); \ - break; \ - } \ - __pu_err; \ -}) -#define __put_user(x, ptr) put_user(x, ptr) - -extern int __put_user_bad(void); - -/* - * Tell gcc we read from memory instead of writing: this is because - * we do not write to any memory gcc knows about, so there are no - * aliasing issues. - */ - -#define __ptr(x) ((unsigned long *)(x)) - -#define __put_user_asm(err,x,ptr,bwl) \ - __asm__ ("move" #bwl " %0,%1" \ - : /* no outputs */ \ - :"d" (x),"m" (*__ptr(ptr)) : "memory") - -#define get_user(x, ptr) \ -({ \ - int __gu_err = 0; \ - typeof(x) __gu_val = 0; \ - switch (sizeof(*(ptr))) { \ - case 1: \ - __get_user_asm(__gu_err, __gu_val, ptr, b, "=d"); \ - break; \ - case 2: \ - __get_user_asm(__gu_err, __gu_val, ptr, w, "=r"); \ - break; \ - case 4: \ - __get_user_asm(__gu_err, __gu_val, ptr, l, "=r"); \ - break; \ - case 8: \ - memcpy((void *) &__gu_val, ptr, sizeof (*(ptr))); \ - break; \ - default: \ - __gu_val = 0; \ - __gu_err = __get_user_bad(); \ - break; \ - } \ - (x) = (typeof(*(ptr))) __gu_val; \ - __gu_err; \ -}) -#define __get_user(x, ptr) get_user(x, ptr) - -extern int __get_user_bad(void); - -#define __get_user_asm(err,x,ptr,bwl,reg) \ - __asm__ ("move" #bwl " %1,%0" \ - : "=d" (x) \ - : "m" (*__ptr(ptr))) - -#define copy_from_user(to, from, n) (memcpy(to, from, n), 0) -#define copy_to_user(to, from, n) (memcpy(to, from, n), 0) - -#define __copy_from_user(to, from, n) copy_from_user(to, from, n) -#define __copy_to_user(to, from, n) copy_to_user(to, from, n) -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -#define copy_to_user_ret(to,from,n,retval) ({ if (copy_to_user(to,from,n)) return retval; }) - -#define copy_from_user_ret(to,from,n,retval) ({ if (copy_from_user(to,from,n)) return retval; }) - -/* - * Copy a null terminated string from userspace. - */ - -static inline long -strncpy_from_user(char *dst, const char *src, long count) -{ - char *tmp; - strncpy(dst, src, count); - for (tmp = dst; *tmp && count > 0; tmp++, count--) - ; - return(tmp - dst); /* DAVIDM should we count a NUL ? check getname */ -} - -/* - * Return the size of a string (including the ending 0) - * - * Return 0 on exception, a value greater than N if too long - */ -static inline long strnlen_user(const char *src, long n) -{ - return(strlen(src) + 1); /* DAVIDM make safer */ -} - -#define strlen_user(str) strnlen_user(str, 32767) - -/* - * Zero Userspace - */ - -static inline unsigned long -__clear_user(void *to, unsigned long n) -{ - memset(to, 0, n); - return 0; -} - -#define clear_user(to,n) __clear_user(to,n) - -#endif /* _M68KNOMMU_UACCESS_H */ diff --git a/include/asm-m68knommu/ucontext.h b/include/asm-m68knommu/ucontext.h deleted file mode 100644 index 713a27f..0000000 --- a/include/asm-m68knommu/ucontext.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef _M68KNOMMU_UCONTEXT_H -#define _M68KNOMMU_UCONTEXT_H - -typedef int greg_t; -#define NGREG 18 -typedef greg_t gregset_t[NGREG]; - -typedef struct fpregset { - int f_pcr; - int f_psr; - int f_fpiaddr; - int f_fpregs[8][3]; -} fpregset_t; - -struct mcontext { - int version; - gregset_t gregs; - fpregset_t fpregs; -}; - -#define MCONTEXT_VERSION 2 - -struct ucontext { - unsigned long uc_flags; - struct ucontext *uc_link; - stack_t uc_stack; - struct mcontext uc_mcontext; - unsigned long uc_filler[80]; - sigset_t uc_sigmask; /* mask last for extensibility */ -}; - -#endif diff --git a/include/asm-m68knommu/unaligned.h b/include/asm-m68knommu/unaligned.h deleted file mode 100644 index eb1ea4c..0000000 --- a/include/asm-m68knommu/unaligned.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef _ASM_M68KNOMMU_UNALIGNED_H -#define _ASM_M68KNOMMU_UNALIGNED_H - - -#ifdef CONFIG_COLDFIRE -#include -#include -#include - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#else -/* - * The m68k can do unaligned accesses itself. - */ -#include -#include - -#define get_unaligned __get_unaligned_be -#define put_unaligned __put_unaligned_be - -#endif - -#endif /* _ASM_M68KNOMMU_UNALIGNED_H */ diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h deleted file mode 100644 index 4ba98b9..0000000 --- a/include/asm-m68knommu/unistd.h +++ /dev/null @@ -1,366 +0,0 @@ -#ifndef _ASM_M68K_UNISTD_H_ -#define _ASM_M68K_UNISTD_H_ - -/* - * This file contains the system call numbers. - */ - -#define __NR_restart_syscall 0 -#define __NR_exit 1 -#define __NR_fork 2 -#define __NR_read 3 -#define __NR_write 4 -#define __NR_open 5 -#define __NR_close 6 -#define __NR_waitpid 7 -#define __NR_creat 8 -#define __NR_link 9 -#define __NR_unlink 10 -#define __NR_execve 11 -#define __NR_chdir 12 -#define __NR_time 13 -#define __NR_mknod 14 -#define __NR_chmod 15 -#define __NR_chown 16 -#define __NR_break 17 -#define __NR_oldstat 18 -#define __NR_lseek 19 -#define __NR_getpid 20 -#define __NR_mount 21 -#define __NR_umount 22 -#define __NR_setuid 23 -#define __NR_getuid 24 -#define __NR_stime 25 -#define __NR_ptrace 26 -#define __NR_alarm 27 -#define __NR_oldfstat 28 -#define __NR_pause 29 -#define __NR_utime 30 -#define __NR_stty 31 -#define __NR_gtty 32 -#define __NR_access 33 -#define __NR_nice 34 -#define __NR_ftime 35 -#define __NR_sync 36 -#define __NR_kill 37 -#define __NR_rename 38 -#define __NR_mkdir 39 -#define __NR_rmdir 40 -#define __NR_dup 41 -#define __NR_pipe 42 -#define __NR_times 43 -#define __NR_prof 44 -#define __NR_brk 45 -#define __NR_setgid 46 -#define __NR_getgid 47 -#define __NR_signal 48 -#define __NR_geteuid 49 -#define __NR_getegid 50 -#define __NR_acct 51 -#define __NR_umount2 52 -#define __NR_lock 53 -#define __NR_ioctl 54 -#define __NR_fcntl 55 -#define __NR_mpx 56 -#define __NR_setpgid 57 -#define __NR_ulimit 58 -#define __NR_oldolduname 59 -#define __NR_umask 60 -#define __NR_chroot 61 -#define __NR_ustat 62 -#define __NR_dup2 63 -#define __NR_getppid 64 -#define __NR_getpgrp 65 -#define __NR_setsid 66 -#define __NR_sigaction 67 -#define __NR_sgetmask 68 -#define __NR_ssetmask 69 -#define __NR_setreuid 70 -#define __NR_setregid 71 -#define __NR_sigsuspend 72 -#define __NR_sigpending 73 -#define __NR_sethostname 74 -#define __NR_setrlimit 75 -#define __NR_getrlimit 76 -#define __NR_getrusage 77 -#define __NR_gettimeofday 78 -#define __NR_settimeofday 79 -#define __NR_getgroups 80 -#define __NR_setgroups 81 -#define __NR_select 82 -#define __NR_symlink 83 -#define __NR_oldlstat 84 -#define __NR_readlink 85 -#define __NR_uselib 86 -#define __NR_swapon 87 -#define __NR_reboot 88 -#define __NR_readdir 89 -#define __NR_mmap 90 -#define __NR_munmap 91 -#define __NR_truncate 92 -#define __NR_ftruncate 93 -#define __NR_fchmod 94 -#define __NR_fchown 95 -#define __NR_getpriority 96 -#define __NR_setpriority 97 -#define __NR_profil 98 -#define __NR_statfs 99 -#define __NR_fstatfs 100 -#define __NR_ioperm 101 -#define __NR_socketcall 102 -#define __NR_syslog 103 -#define __NR_setitimer 104 -#define __NR_getitimer 105 -#define __NR_stat 106 -#define __NR_lstat 107 -#define __NR_fstat 108 -#define __NR_olduname 109 -#define __NR_iopl /* 110 */ not supported -#define __NR_vhangup 111 -#define __NR_idle /* 112 */ Obsolete -#define __NR_vm86 /* 113 */ not supported -#define __NR_wait4 114 -#define __NR_swapoff 115 -#define __NR_sysinfo 116 -#define __NR_ipc 117 -#define __NR_fsync 118 -#define __NR_sigreturn 119 -#define __NR_clone 120 -#define __NR_setdomainname 121 -#define __NR_uname 122 -#define __NR_cacheflush 123 -#define __NR_adjtimex 124 -#define __NR_mprotect 125 -#define __NR_sigprocmask 126 -#define __NR_create_module 127 -#define __NR_init_module 128 -#define __NR_delete_module 129 -#define __NR_get_kernel_syms 130 -#define __NR_quotactl 131 -#define __NR_getpgid 132 -#define __NR_fchdir 133 -#define __NR_bdflush 134 -#define __NR_sysfs 135 -#define __NR_personality 136 -#define __NR_afs_syscall 137 /* Syscall for Andrew File System */ -#define __NR_setfsuid 138 -#define __NR_setfsgid 139 -#define __NR__llseek 140 -#define __NR_getdents 141 -#define __NR__newselect 142 -#define __NR_flock 143 -#define __NR_msync 144 -#define __NR_readv 145 -#define __NR_writev 146 -#define __NR_getsid 147 -#define __NR_fdatasync 148 -#define __NR__sysctl 149 -#define __NR_mlock 150 -#define __NR_munlock 151 -#define __NR_mlockall 152 -#define __NR_munlockall 153 -#define __NR_sched_setparam 154 -#define __NR_sched_getparam 155 -#define __NR_sched_setscheduler 156 -#define __NR_sched_getscheduler 157 -#define __NR_sched_yield 158 -#define __NR_sched_get_priority_max 159 -#define __NR_sched_get_priority_min 160 -#define __NR_sched_rr_get_interval 161 -#define __NR_nanosleep 162 -#define __NR_mremap 163 -#define __NR_setresuid 164 -#define __NR_getresuid 165 -#define __NR_getpagesize 166 -#define __NR_query_module 167 -#define __NR_poll 168 -#define __NR_nfsservctl 169 -#define __NR_setresgid 170 -#define __NR_getresgid 171 -#define __NR_prctl 172 -#define __NR_rt_sigreturn 173 -#define __NR_rt_sigaction 174 -#define __NR_rt_sigprocmask 175 -#define __NR_rt_sigpending 176 -#define __NR_rt_sigtimedwait 177 -#define __NR_rt_sigqueueinfo 178 -#define __NR_rt_sigsuspend 179 -#define __NR_pread64 180 -#define __NR_pwrite64 181 -#define __NR_lchown 182 -#define __NR_getcwd 183 -#define __NR_capget 184 -#define __NR_capset 185 -#define __NR_sigaltstack 186 -#define __NR_sendfile 187 -#define __NR_getpmsg 188 /* some people actually want streams */ -#define __NR_putpmsg 189 /* some people actually want streams */ -#define __NR_vfork 190 -#define __NR_ugetrlimit 191 -#define __NR_mmap2 192 -#define __NR_truncate64 193 -#define __NR_ftruncate64 194 -#define __NR_stat64 195 -#define __NR_lstat64 196 -#define __NR_fstat64 197 -#define __NR_chown32 198 -#define __NR_getuid32 199 -#define __NR_getgid32 200 -#define __NR_geteuid32 201 -#define __NR_getegid32 202 -#define __NR_setreuid32 203 -#define __NR_setregid32 204 -#define __NR_getgroups32 205 -#define __NR_setgroups32 206 -#define __NR_fchown32 207 -#define __NR_setresuid32 208 -#define __NR_getresuid32 209 -#define __NR_setresgid32 210 -#define __NR_getresgid32 211 -#define __NR_lchown32 212 -#define __NR_setuid32 213 -#define __NR_setgid32 214 -#define __NR_setfsuid32 215 -#define __NR_setfsgid32 216 -#define __NR_pivot_root 217 -#define __NR_getdents64 220 -#define __NR_gettid 221 -#define __NR_tkill 222 -#define __NR_setxattr 223 -#define __NR_lsetxattr 224 -#define __NR_fsetxattr 225 -#define __NR_getxattr 226 -#define __NR_lgetxattr 227 -#define __NR_fgetxattr 228 -#define __NR_listxattr 229 -#define __NR_llistxattr 230 -#define __NR_flistxattr 231 -#define __NR_removexattr 232 -#define __NR_lremovexattr 233 -#define __NR_fremovexattr 234 -#define __NR_futex 235 -#define __NR_sendfile64 236 -#define __NR_mincore 237 -#define __NR_madvise 238 -#define __NR_fcntl64 239 -#define __NR_readahead 240 -#define __NR_io_setup 241 -#define __NR_io_destroy 242 -#define __NR_io_getevents 243 -#define __NR_io_submit 244 -#define __NR_io_cancel 245 -#define __NR_fadvise64 246 -#define __NR_exit_group 247 -#define __NR_lookup_dcookie 248 -#define __NR_epoll_create 249 -#define __NR_epoll_ctl 250 -#define __NR_epoll_wait 251 -#define __NR_remap_file_pages 252 -#define __NR_set_tid_address 253 -#define __NR_timer_create 254 -#define __NR_timer_settime 255 -#define __NR_timer_gettime 256 -#define __NR_timer_getoverrun 257 -#define __NR_timer_delete 258 -#define __NR_clock_settime 259 -#define __NR_clock_gettime 260 -#define __NR_clock_getres 261 -#define __NR_clock_nanosleep 262 -#define __NR_statfs64 263 -#define __NR_fstatfs64 264 -#define __NR_tgkill 265 -#define __NR_utimes 266 -#define __NR_fadvise64_64 267 -#define __NR_mbind 268 -#define __NR_get_mempolicy 269 -#define __NR_set_mempolicy 270 -#define __NR_mq_open 271 -#define __NR_mq_unlink 272 -#define __NR_mq_timedsend 273 -#define __NR_mq_timedreceive 274 -#define __NR_mq_notify 275 -#define __NR_mq_getsetattr 276 -#define __NR_waitid 277 -#define __NR_vserver 278 -#define __NR_add_key 279 -#define __NR_request_key 280 -#define __NR_keyctl 281 -#define __NR_ioprio_set 282 -#define __NR_ioprio_get 283 -#define __NR_inotify_init 284 -#define __NR_inotify_add_watch 285 -#define __NR_inotify_rm_watch 286 -#define __NR_migrate_pages 287 -#define __NR_openat 288 -#define __NR_mkdirat 289 -#define __NR_mknodat 290 -#define __NR_fchownat 291 -#define __NR_futimesat 292 -#define __NR_fstatat64 293 -#define __NR_unlinkat 294 -#define __NR_renameat 295 -#define __NR_linkat 296 -#define __NR_symlinkat 297 -#define __NR_readlinkat 298 -#define __NR_fchmodat 299 -#define __NR_faccessat 300 -#define __NR_pselect6 301 -#define __NR_ppoll 302 -#define __NR_unshare 303 -#define __NR_set_robust_list 304 -#define __NR_get_robust_list 305 -#define __NR_splice 306 -#define __NR_sync_file_range 307 -#define __NR_tee 308 -#define __NR_vmsplice 309 -#define __NR_move_pages 310 -#define __NR_sched_setaffinity 311 -#define __NR_sched_getaffinity 312 -#define __NR_kexec_load 313 -#define __NR_getcpu 314 -#define __NR_epoll_pwait 315 -#define __NR_utimensat 316 -#define __NR_signalfd 317 -#define __NR_timerfd_create 318 -#define __NR_eventfd 319 -#define __NR_fallocate 320 -#define __NR_timerfd_settime 321 -#define __NR_timerfd_gettime 322 - -#ifdef __KERNEL__ - -#define NR_syscalls 323 - -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_OLD_STAT -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLD_GETRLIMIT -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGACTION - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _ASM_M68K_UNISTD_H_ */ diff --git a/include/asm-m68knommu/user.h b/include/asm-m68knommu/user.h deleted file mode 100644 index a5a555b..0000000 --- a/include/asm-m68knommu/user.h +++ /dev/null @@ -1 +0,0 @@ -#include -- cgit v1.1 From b11f8d8cc3bb2fa6fa55286babc1a5ebb2e932c4 Mon Sep 17 00:00:00 2001 From: Brandon Philips Date: Tue, 15 Jul 2008 02:18:41 -0700 Subject: ethtool: Expand ethtool_cmd.speed to 32 bits Introduce the speed_hi field to ethtool_cmd, using the reserved space, to expand the speed field to 2^32 Megabits/second. Making this field expansion now gives us plenty of time to fix up the user-space pieces that use SIOCETHTOOL before hardware faster than 64 Gb/s is available. Signed-off-by: Brandon Philips Signed-off-by: Jeff Garzik --- include/linux/ethtool.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 8bb5e87..b4b038b 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -27,9 +27,24 @@ struct ethtool_cmd { __u8 autoneg; /* Enable or disable autonegotiation */ __u32 maxtxpkt; /* Tx pkts before generating tx int */ __u32 maxrxpkt; /* Rx pkts before generating rx int */ - __u32 reserved[4]; + __u16 speed_hi; + __u16 reserved2; + __u32 reserved[3]; }; +static inline void ethtool_cmd_speed_set(struct ethtool_cmd *ep, + __u32 speed) +{ + + ep->speed = (__u16)speed; + ep->speed_hi = (__u16)(speed >> 16); +} + +static inline __u32 ethtool_cmd_speed(struct ethtool_cmd *ep) +{ + return (ep->speed_hi << 16) | ep->speed; +} + #define ETHTOOL_BUSINFO_LEN 32 /* these strings are set to whatever the driver author decides... */ struct ethtool_drvinfo { -- cgit v1.1 From fe414248551e2880fe8913577699003ff145ab9d Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Wed, 23 Jul 2008 17:41:52 +0200 Subject: dm9000: Support MAC address setting through platform data. The dm9000 driver reads the chip's MAC address from the attached EEPROM. When no EEPROM is present, or when the MAC address is invalid, it falls back to reading the address from the chip. This patch lets platform code set the desired MAC address through platform data. Signed-off-by: Laurent Pinchart Signed-off-by: Jeff Garzik --- include/linux/dm9000.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/dm9000.h b/include/linux/dm9000.h index fc82446..c30879c 100644 --- a/include/linux/dm9000.h +++ b/include/linux/dm9000.h @@ -27,6 +27,7 @@ struct dm9000_plat_data { unsigned int flags; + unsigned char dev_addr[6]; /* allow replacement IO routines */ -- cgit v1.1 From 6edafaaf6f5e70ef1e620ff01bd6bacebe1e0718 Mon Sep 17 00:00:00 2001 From: Gui Jianfeng Date: Wed, 6 Aug 2008 23:50:04 -0700 Subject: tcp: Fix kernel panic when calling tcp_v(4/6)_md5_do_lookup If the following packet flow happen, kernel will panic. MathineA MathineB SYN ----------------------> SYN+ACK <---------------------- ACK(bad seq) ----------------------> When a bad seq ACK is received, tcp_v4_md5_do_lookup(skb->sk, ip_hdr(skb)->daddr)) is finally called by tcp_v4_reqsk_send_ack(), but the first parameter(skb->sk) is NULL at that moment, so kernel panic happens. This patch fixes this bug. OOPS output is as following: [ 302.812793] IP: [] tcp_v4_md5_do_lookup+0x12/0x42 [ 302.817075] Oops: 0000 [#1] SMP [ 302.819815] Modules linked in: ipv6 loop dm_multipath rtc_cmos rtc_core rtc_lib pcspkr pcnet32 mii i2c_piix4 parport_pc i2c_core parport ac button ata_piix libata dm_mod mptspi mptscsih mptbase scsi_transport_spi sd_mod scsi_mod crc_t10dif ext3 jbd mbcache uhci_hcd ohci_hcd ehci_hcd [last unloaded: scsi_wait_scan] [ 302.849946] [ 302.851198] Pid: 0, comm: swapper Not tainted (2.6.27-rc1-guijf #5) [ 302.855184] EIP: 0060:[] EFLAGS: 00010296 CPU: 0 [ 302.858296] EIP is at tcp_v4_md5_do_lookup+0x12/0x42 [ 302.861027] EAX: 0000001e EBX: 00000000 ECX: 00000046 EDX: 00000046 [ 302.864867] ESI: ceb69e00 EDI: 1467a8c0 EBP: cf75f180 ESP: c0792e54 [ 302.868333] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 [ 302.871287] Process swapper (pid: 0, ti=c0792000 task=c0712340 task.ti=c0746000) [ 302.875592] Stack: c06f413a 00000000 cf75f180 ceb69e00 00000000 c05d0d86 000016d0 ceac5400 [ 302.883275] c05d28f8 000016d0 ceb69e00 ceb69e20 681bf6e3 00001000 00000000 0a67a8c0 [ 302.890971] ceac5400 c04250a3 c06f413a c0792eb0 c0792edc cf59a620 cf59a620 cf59a634 [ 302.900140] Call Trace: [ 302.902392] [] tcp_v4_reqsk_send_ack+0x17/0x35 [ 302.907060] [] tcp_check_req+0x156/0x372 [ 302.910082] [] printk+0x14/0x18 [ 302.912868] [] tcp_v4_do_rcv+0x1d3/0x2bf [ 302.917423] [] tcp_v4_rcv+0x563/0x5b9 [ 302.920453] [] ip_local_deliver_finish+0xe8/0x183 [ 302.923865] [] ip_rcv_finish+0x286/0x2a3 [ 302.928569] [] dev_alloc_skb+0x11/0x25 [ 302.931563] [] netif_receive_skb+0x2d6/0x33a [ 302.934914] [] pcnet32_poll+0x333/0x680 [pcnet32] [ 302.938735] [] net_rx_action+0x5c/0xfe [ 302.941792] [] __do_softirq+0x5d/0xc1 [ 302.944788] [] __do_softirq+0x0/0xc1 [ 302.948999] [] do_softirq+0x55/0x88 [ 302.951870] [] handle_fasteoi_irq+0x0/0xa4 [ 302.954986] [] irq_exit+0x35/0x69 [ 302.959081] [] do_IRQ+0x99/0xae [ 302.961896] [] common_interrupt+0x23/0x28 [ 302.966279] [] default_idle+0x2a/0x3d [ 302.969212] [] cpu_idle+0xb2/0xd2 [ 302.972169] ======================= [ 302.974274] Code: fc ff 84 d2 0f 84 df fd ff ff e9 34 fe ff ff 83 c4 0c 5b 5e 5f 5d c3 90 90 57 89 d7 56 53 89 c3 50 68 3a 41 6f c0 e8 e9 55 e5 ff <8b> 93 9c 04 00 00 58 85 d2 59 74 1e 8b 72 10 31 db 31 c9 85 f6 [ 303.011610] EIP: [] tcp_v4_md5_do_lookup+0x12/0x42 SS:ESP 0068:c0792e54 [ 303.018360] Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Gui Jianfeng Signed-off-by: David S. Miller --- include/net/request_sock.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/request_sock.h b/include/net/request_sock.h index 8d6e991..cac811e 100644 --- a/include/net/request_sock.h +++ b/include/net/request_sock.h @@ -33,7 +33,7 @@ struct request_sock_ops { struct kmem_cache *slab; int (*rtx_syn_ack)(struct sock *sk, struct request_sock *req); - void (*send_ack)(struct sk_buff *skb, + void (*send_ack)(struct sock *sk, struct sk_buff *skb, struct request_sock *req); void (*send_reset)(struct sock *sk, struct sk_buff *skb); -- cgit v1.1 From 0f8469a54f7bd65f2c740a5480c56260dc8a7ae0 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 3 Aug 2008 15:06:16 +0100 Subject: [ARM] Eliminate useless includes of asm/mach-types.h There are 43 includes of asm/mach-types.h by files that don't reference anything from that file. Remove these unnecessary includes. Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/memory.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h index 6d859d7..6940a14 100644 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ b/include/asm-arm/arch-ixp23xx/memory.h @@ -28,7 +28,6 @@ * to an address that the kernel can use. */ #ifndef __ASSEMBLY__ -#include #define __virt_to_bus(v) \ ({ unsigned int ret; \ -- cgit v1.1 From be509729356b7433f73df2b9a966674a437fbbc1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 4 Aug 2008 10:41:28 +0100 Subject: [ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: Russell King --- include/asm-arm/arch-aaec2000/io.h | 2 +- include/asm-arm/arch-at91/cpu.h | 2 +- include/asm-arm/arch-at91/debug-macro.S | 2 +- include/asm-arm/arch-at91/entry-macro.S | 2 +- include/asm-arm/arch-at91/memory.h | 2 +- include/asm-arm/arch-at91/system.h | 2 +- include/asm-arm/arch-at91/timex.h | 2 +- include/asm-arm/arch-cl7500/entry-macro.S | 2 +- include/asm-arm/arch-cl7500/io.h | 2 +- include/asm-arm/arch-clps711x/entry-macro.S | 2 +- include/asm-arm/arch-clps711x/io.h | 2 +- include/asm-arm/arch-clps711x/system.h | 2 +- include/asm-arm/arch-clps711x/uncompress.h | 2 +- include/asm-arm/arch-davinci/gpio.h | 2 +- include/asm-arm/arch-davinci/system.h | 2 +- include/asm-arm/arch-ebsa285/entry-macro.S | 2 +- include/asm-arm/arch-ebsa285/io.h | 2 +- include/asm-arm/arch-ebsa285/system.h | 2 +- include/asm-arm/arch-ep93xx/hardware.h | 4 ++++ include/asm-arm/arch-ep93xx/system.h | 2 +- include/asm-arm/arch-h720x/io.h | 2 +- include/asm-arm/arch-h720x/system.h | 2 +- include/asm-arm/arch-h720x/uncompress.h | 2 +- include/asm-arm/arch-imx/entry-macro.S | 2 +- include/asm-arm/arch-imx/io.h | 2 +- include/asm-arm/arch-imx/irqs.h | 2 +- include/asm-arm/arch-integrator/entry-macro.S | 2 +- include/asm-arm/arch-iop13xx/adma.h | 2 +- include/asm-arm/arch-iop13xx/timex.h | 2 +- include/asm-arm/arch-iop13xx/uncompress.h | 2 +- include/asm-arm/arch-iop32x/io.h | 2 +- include/asm-arm/arch-iop32x/memory.h | 2 +- include/asm-arm/arch-iop32x/timex.h | 2 +- include/asm-arm/arch-iop32x/uncompress.h | 2 +- include/asm-arm/arch-iop33x/io.h | 2 +- include/asm-arm/arch-iop33x/memory.h | 2 +- include/asm-arm/arch-iop33x/timex.h | 2 +- include/asm-arm/arch-iop33x/uncompress.h | 2 +- include/asm-arm/arch-ixp2000/io.h | 2 +- include/asm-arm/arch-ixp2000/system.h | 2 +- include/asm-arm/arch-ixp23xx/memory.h | 2 +- include/asm-arm/arch-ixp23xx/system.h | 2 +- include/asm-arm/arch-ixp4xx/avila.h | 2 +- include/asm-arm/arch-ixp4xx/coyote.h | 2 +- include/asm-arm/arch-ixp4xx/dma.h | 2 +- include/asm-arm/arch-ixp4xx/dsmg600.h | 2 +- include/asm-arm/arch-ixp4xx/entry-macro.S | 2 +- include/asm-arm/arch-ixp4xx/fsg.h | 2 +- include/asm-arm/arch-ixp4xx/gpio.h | 2 +- include/asm-arm/arch-ixp4xx/gtwx5715.h | 2 +- include/asm-arm/arch-ixp4xx/io.h | 2 +- include/asm-arm/arch-ixp4xx/ixdp425.h | 2 +- include/asm-arm/arch-ixp4xx/nas100d.h | 2 +- include/asm-arm/arch-ixp4xx/nslu2.h | 2 +- include/asm-arm/arch-ixp4xx/platform.h | 2 +- include/asm-arm/arch-ixp4xx/prpmc1100.h | 2 +- include/asm-arm/arch-ixp4xx/system.h | 2 +- include/asm-arm/arch-ixp4xx/timex.h | 2 +- include/asm-arm/arch-ks8695/debug-macro.S | 2 +- include/asm-arm/arch-ks8695/entry-macro.S | 2 +- include/asm-arm/arch-ks8695/memory.h | 2 +- include/asm-arm/arch-l7200/aux_reg.h | 2 +- include/asm-arm/arch-l7200/entry-macro.S | 2 +- include/asm-arm/arch-l7200/gp_timers.h | 2 +- include/asm-arm/arch-l7200/io.h | 2 +- include/asm-arm/arch-l7200/system.h | 2 +- include/asm-arm/arch-l7200/uncompress.h | 2 +- include/asm-arm/arch-lh7a40x/entry-macro.S | 2 +- include/asm-arm/arch-lh7a40x/io.h | 2 +- include/asm-arm/arch-msm/debug-macro.S | 2 +- include/asm-arm/arch-msm/system.h | 2 +- include/asm-arm/arch-mxc/gpio.h | 2 +- include/asm-arm/arch-mxc/irqs.h | 2 +- include/asm-arm/arch-mxc/memory.h | 2 +- include/asm-arm/arch-mxc/mxc_timer.h | 2 +- include/asm-arm/arch-mxc/timex.h | 2 +- include/asm-arm/arch-mxc/uncompress.h | 2 +- include/asm-arm/arch-netx/entry-macro.S | 2 +- include/asm-arm/arch-netx/system.h | 2 +- include/asm-arm/arch-ns9xxx/debug-macro.S | 2 +- include/asm-arm/arch-ns9xxx/entry-macro.S | 2 +- include/asm-arm/arch-ns9xxx/regs-bbu.h | 2 +- include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h | 2 +- include/asm-arm/arch-ns9xxx/regs-mem.h | 2 +- include/asm-arm/arch-ns9xxx/regs-sys-common.h | 2 +- include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h | 2 +- include/asm-arm/arch-omap/entry-macro.S | 2 +- include/asm-arm/arch-omap/io.h | 2 +- include/asm-arm/arch-omap/irqs.h | 2 +- include/asm-arm/arch-omap/mcbsp.h | 2 +- include/asm-arm/arch-omap/mtd-xip.h | 2 +- include/asm-arm/arch-omap/system.h | 2 +- include/asm-arm/arch-pnx4008/system.h | 2 +- include/asm-arm/arch-pnx4008/timex.h | 2 +- include/asm-arm/arch-pxa/entry-macro.S | 2 +- include/asm-arm/arch-pxa/gpio.h | 2 +- include/asm-arm/arch-pxa/io.h | 2 +- include/asm-arm/arch-realview/entry-macro.S | 2 +- include/asm-arm/arch-realview/system.h | 2 +- include/asm-arm/arch-realview/uncompress.h | 2 +- include/asm-arm/arch-rpc/entry-macro.S | 2 +- include/asm-arm/arch-rpc/io.h | 2 +- include/asm-arm/arch-rpc/system.h | 2 +- include/asm-arm/arch-rpc/uncompress.h | 2 +- include/asm-arm/arch-s3c2410/dma.h | 2 +- include/asm-arm/arch-s3c2410/entry-macro.S | 2 +- include/asm-arm/arch-s3c2410/hardware.h | 4 ---- include/asm-arm/arch-s3c2410/io.h | 2 +- include/asm-arm/arch-s3c2410/system-reset.h | 2 +- include/asm-arm/arch-s3c2410/system.h | 2 +- include/asm-arm/arch-sa1100/badge4.h | 2 +- include/asm-arm/arch-sa1100/debug-macro.S | 2 +- include/asm-arm/arch-sa1100/gpio.h | 2 +- include/asm-arm/arch-sa1100/ide.h | 2 +- include/asm-arm/arch-sa1100/system.h | 2 +- include/asm-arm/arch-shark/io.h | 2 +- include/asm-arm/arch-versatile/entry-macro.S | 2 +- include/asm-arm/arch-versatile/system.h | 2 +- 118 files changed, 120 insertions(+), 120 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h index d710204..bc2364ab 100644 --- a/include/asm-arm/arch-aaec2000/io.h +++ b/include/asm-arm/arch-aaec2000/io.h @@ -6,7 +6,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-at91/cpu.h b/include/asm-arm/arch-at91/cpu.h index 52df794..f24b55c 100644 --- a/include/asm-arm/arch-at91/cpu.h +++ b/include/asm-arm/arch-at91/cpu.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_CPU_H #define __ASM_ARCH_CPU_H -#include +#include #include diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S index 13e9f5e..ff28696 100644 --- a/include/asm-arm/arch-at91/debug-macro.S +++ b/include/asm-arm/arch-at91/debug-macro.S @@ -11,7 +11,7 @@ * */ -#include +#include #include .macro addruart,rx diff --git a/include/asm-arm/arch-at91/entry-macro.S b/include/asm-arm/arch-at91/entry-macro.S index 1005eee..cbaf605 100644 --- a/include/asm-arm/arch-at91/entry-macro.S +++ b/include/asm-arm/arch-at91/entry-macro.S @@ -10,7 +10,7 @@ * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-at91/memory.h b/include/asm-arm/arch-at91/memory.h index 4835d67..904fbd6 100644 --- a/include/asm-arm/arch-at91/memory.h +++ b/include/asm-arm/arch-at91/memory.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include +#include #define PHYS_OFFSET (AT91_SDRAM_BASE) diff --git a/include/asm-arm/arch-at91/system.h b/include/asm-arm/arch-at91/system.h index 6bf8460..c5e3d03 100644 --- a/include/asm-arm/arch-at91/system.h +++ b/include/asm-arm/arch-at91/system.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include #include #include diff --git a/include/asm-arm/arch-at91/timex.h b/include/asm-arm/arch-at91/timex.h index 298d8313..67c86a8 100644 --- a/include/asm-arm/arch-at91/timex.h +++ b/include/asm-arm/arch-at91/timex.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_TIMEX_H #define __ASM_ARCH_TIMEX_H -#include +#include #if defined(CONFIG_ARCH_AT91RM9200) diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S index 038b761..5bd5555 100644 --- a/include/asm-arm/arch-cl7500/entry-macro.S +++ b/include/asm-arm/arch-cl7500/entry-macro.S @@ -1,4 +1,4 @@ -#include +#include #include .equ ioc_base_high, IOC_BASE & 0xff000000 diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h index 89a3328..80f9b19 100644 --- a/include/asm-arm/arch-cl7500/io.h +++ b/include/asm-arm/arch-cl7500/io.h @@ -10,7 +10,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S index cd8c5a0..3554887 100644 --- a/include/asm-arm/arch-clps711x/entry-macro.S +++ b/include/asm-arm/arch-clps711x/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h index 53d7902..2b84dac 100644 --- a/include/asm-arm/arch-clps711x/io.h +++ b/include/asm-arm/arch-clps711x/io.h @@ -20,7 +20,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-clps711x/system.h b/include/asm-arm/arch-clps711x/system.h index 11e1491..1f56177 100644 --- a/include/asm-arm/arch-clps711x/system.h +++ b/include/asm-arm/arch-clps711x/system.h @@ -20,7 +20,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include #include #include diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h index 03d233a..8c5684a 100644 --- a/include/asm-arm/arch-clps711x/uncompress.h +++ b/include/asm-arm/arch-clps711x/uncompress.h @@ -18,7 +18,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #include -#include +#include #include #undef CLPS7111_BASE diff --git a/include/asm-arm/arch-davinci/gpio.h b/include/asm-arm/arch-davinci/gpio.h index ff8de30..54fda73 100644 --- a/include/asm-arm/arch-davinci/gpio.h +++ b/include/asm-arm/arch-davinci/gpio.h @@ -14,7 +14,7 @@ #define __DAVINCI_GPIO_H #include -#include +#include /* * basic gpio routines diff --git a/include/asm-arm/arch-davinci/system.h b/include/asm-arm/arch-davinci/system.h index 440ac51..6713e4a 100644 --- a/include/asm-arm/arch-davinci/system.h +++ b/include/asm-arm/arch-davinci/system.h @@ -12,7 +12,7 @@ #define __ASM_ARCH_SYSTEM_H #include -#include +#include extern void davinci_watchdog_reset(void); diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S index e63064e..e203c62 100644 --- a/include/asm-arm/arch-ebsa285/entry-macro.S +++ b/include/asm-arm/arch-ebsa285/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include #include diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h index f9c7291..e88c6e2 100644 --- a/include/asm-arm/arch-ebsa285/io.h +++ b/include/asm-arm/arch-ebsa285/io.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffff diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h index bf91c69..a720bf7 100644 --- a/include/asm-arm/arch-ebsa285/system.h +++ b/include/asm-arm/arch-ebsa285/system.h @@ -9,7 +9,7 @@ */ #include #include -#include +#include #include #include diff --git a/include/asm-arm/arch-ep93xx/hardware.h b/include/asm-arm/arch-ep93xx/hardware.h index 9b69f45..4233f6e 100644 --- a/include/asm-arm/arch-ep93xx/hardware.h +++ b/include/asm-arm/arch-ep93xx/hardware.h @@ -1,6 +1,8 @@ /* * linux/include/asm-arm/arch-ep93xx/hardware.h */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H #include "ep93xx-regs.h" @@ -10,3 +12,5 @@ #include "gesbc9312.h" #include "ts72xx.h" + +#endif diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h index 79b7185..f1a5acf 100644 --- a/include/asm-arm/arch-ep93xx/system.h +++ b/include/asm-arm/arch-ep93xx/system.h @@ -2,7 +2,7 @@ * linux/include/asm-arm/arch-ep93xx/system.h */ -#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h index d3ccfd8..6881482 100644 --- a/include/asm-arm/arch-h720x/io.h +++ b/include/asm-arm/arch-h720x/io.h @@ -14,7 +14,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-h720x/system.h b/include/asm-arm/arch-h720x/system.h index 8dc1460..ddba937 100644 --- a/include/asm-arm/arch-h720x/system.h +++ b/include/asm-arm/arch-h720x/system.h @@ -12,7 +12,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include static void arch_idle(void) { diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h index 18c69e0..61584cd 100644 --- a/include/asm-arm/arch-h720x/uncompress.h +++ b/include/asm-arm/arch-h720x/uncompress.h @@ -7,7 +7,7 @@ #ifndef __ASM_ARCH_UNCOMPRESS_H #define __ASM_ARCH_UNCOMPRESS_H -#include +#include #define LSR 0x14 #define TEMPTY 0x40 diff --git a/include/asm-arm/arch-imx/entry-macro.S b/include/asm-arm/arch-imx/entry-macro.S index 0b84e81..5dc0f30 100644 --- a/include/asm-arm/arch-imx/entry-macro.S +++ b/include/asm-arm/arch-imx/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include .macro disable_fiq .endm diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h index b191cdd..1a1d9bb 100644 --- a/include/asm-arm/arch-imx/io.h +++ b/include/asm-arm/arch-imx/io.h @@ -20,7 +20,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h index f195542..238197c 100644 --- a/include/asm-arm/arch-imx/irqs.h +++ b/include/asm-arm/arch-imx/irqs.h @@ -23,7 +23,7 @@ #define __ARM_IRQS_H__ /* Use the imx definitions */ -#include +#include /* * IMX Interrupt numbers diff --git a/include/asm-arm/arch-integrator/entry-macro.S b/include/asm-arm/arch-integrator/entry-macro.S index 491af1a..ef535a6 100644 --- a/include/asm-arm/arch-integrator/entry-macro.S +++ b/include/asm-arm/arch-integrator/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-iop13xx/adma.h b/include/asm-arm/arch-iop13xx/adma.h index ef4f5da..26f60af 100644 --- a/include/asm-arm/arch-iop13xx/adma.h +++ b/include/asm-arm/arch-iop13xx/adma.h @@ -19,7 +19,7 @@ #define _ADMA_H #include #include -#include +#include #include #define ADMA_ACCR(chan) (chan->mmr_base + 0x0) diff --git a/include/asm-arm/arch-iop13xx/timex.h b/include/asm-arm/arch-iop13xx/timex.h index f0c51dd..47564ec 100644 --- a/include/asm-arm/arch-iop13xx/timex.h +++ b/include/asm-arm/arch-iop13xx/timex.h @@ -1,3 +1,3 @@ -#include +#include #define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop13xx/uncompress.h b/include/asm-arm/arch-iop13xx/uncompress.h index dd9c293..5d4418d 100644 --- a/include/asm-arm/arch-iop13xx/uncompress.h +++ b/include/asm-arm/arch-iop13xx/uncompress.h @@ -1,6 +1,6 @@ #include #include -#include +#include #define UART_BASE ((volatile u32 *)IOP13XX_UART1_PHYS) #define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h index 958af75..47b2736 100644 --- a/include/asm-arm/arch-iop32x/io.h +++ b/include/asm-arm/arch-iop32x/io.h @@ -11,7 +11,7 @@ #ifndef __IO_H #define __IO_H -#include +#include extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned int mtype); diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h index c51072a..bdcf038 100644 --- a/include/asm-arm/arch-iop32x/memory.h +++ b/include/asm-arm/arch-iop32x/memory.h @@ -5,7 +5,7 @@ #ifndef __MEMORY_H #define __MEMORY_H -#include +#include /* * Physical DRAM offset. diff --git a/include/asm-arm/arch-iop32x/timex.h b/include/asm-arm/arch-iop32x/timex.h index 9934b08..4457046 100644 --- a/include/asm-arm/arch-iop32x/timex.h +++ b/include/asm-arm/arch-iop32x/timex.h @@ -4,6 +4,6 @@ * IOP32x architecture timex specifications */ -#include +#include #define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop32x/uncompress.h b/include/asm-arm/arch-iop32x/uncompress.h index 070f158..0702878 100644 --- a/include/asm-arm/arch-iop32x/uncompress.h +++ b/include/asm-arm/arch-iop32x/uncompress.h @@ -5,7 +5,7 @@ #include #include #include -#include +#include static volatile u8 *uart_base; diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h index fec9c53..3fc607c 100644 --- a/include/asm-arm/arch-iop33x/io.h +++ b/include/asm-arm/arch-iop33x/io.h @@ -11,7 +11,7 @@ #ifndef __IO_H #define __IO_H -#include +#include extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, unsigned int mtype); diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h index c874912..d798d83 100644 --- a/include/asm-arm/arch-iop33x/memory.h +++ b/include/asm-arm/arch-iop33x/memory.h @@ -5,7 +5,7 @@ #ifndef __MEMORY_H #define __MEMORY_H -#include +#include /* * Physical DRAM offset. diff --git a/include/asm-arm/arch-iop33x/timex.h b/include/asm-arm/arch-iop33x/timex.h index fe3e1e3..75a001e 100644 --- a/include/asm-arm/arch-iop33x/timex.h +++ b/include/asm-arm/arch-iop33x/timex.h @@ -4,6 +4,6 @@ * IOP3xx architecture timex specifications */ -#include +#include #define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop33x/uncompress.h b/include/asm-arm/arch-iop33x/uncompress.h index e17fbc0..34d9e8e 100644 --- a/include/asm-arm/arch-iop33x/uncompress.h +++ b/include/asm-arm/arch-iop33x/uncompress.h @@ -5,7 +5,7 @@ #include #include #include -#include +#include static volatile u32 *uart_base; diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h index c0ff2c6..5dc1d25 100644 --- a/include/asm-arm/arch-ixp2000/io.h +++ b/include/asm-arm/arch-ixp2000/io.h @@ -15,7 +15,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff #define __mem_pci(a) (a) diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h index 3cc9a04..8731dd3 100644 --- a/include/asm-arm/arch-ixp2000/system.h +++ b/include/asm-arm/arch-ixp2000/system.h @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -#include +#include #include static inline void arch_idle(void) diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h index 6940a14..c3d906a 100644 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ b/include/asm-arm/arch-ixp23xx/memory.h @@ -12,7 +12,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include +#include /* * Physical DRAM offset. diff --git a/include/asm-arm/arch-ixp23xx/system.h b/include/asm-arm/arch-ixp23xx/system.h index 925e6b0..54e8a51 100644 --- a/include/asm-arm/arch-ixp23xx/system.h +++ b/include/asm-arm/arch-ixp23xx/system.h @@ -8,7 +8,7 @@ * published by the Free Software Foundation. */ -#include +#include #include static inline void arch_idle(void) diff --git a/include/asm-arm/arch-ixp4xx/avila.h b/include/asm-arm/arch-ixp4xx/avila.h index 0dfea0c..88f053d 100644 --- a/include/asm-arm/arch-ixp4xx/avila.h +++ b/include/asm-arm/arch-ixp4xx/avila.h @@ -16,7 +16,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define AVILA_SDA_PIN 7 diff --git a/include/asm-arm/arch-ixp4xx/coyote.h b/include/asm-arm/arch-ixp4xx/coyote.h index 7ac9ba2..428b298a 100644 --- a/include/asm-arm/arch-ixp4xx/coyote.h +++ b/include/asm-arm/arch-ixp4xx/coyote.h @@ -13,7 +13,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif /* PCI controller GPIO to IRQ pin mappings */ diff --git a/include/asm-arm/arch-ixp4xx/dma.h b/include/asm-arm/arch-ixp4xx/dma.h index 2c7f532..0b755d6 100644 --- a/include/asm-arm/arch-ixp4xx/dma.h +++ b/include/asm-arm/arch-ixp4xx/dma.h @@ -14,7 +14,7 @@ #include #include #include -#include +#include #define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) diff --git a/include/asm-arm/arch-ixp4xx/dsmg600.h b/include/asm-arm/arch-ixp4xx/dsmg600.h index b7673e1..5afae8c 100644 --- a/include/asm-arm/arch-ixp4xx/dsmg600.h +++ b/include/asm-arm/arch-ixp4xx/dsmg600.h @@ -13,7 +13,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define DSMG600_SDA_PIN 5 diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S index f144a00..ed313c5 100644 --- a/include/asm-arm/arch-ixp4xx/entry-macro.S +++ b/include/asm-arm/arch-ixp4xx/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include .macro disable_fiq .endm diff --git a/include/asm-arm/arch-ixp4xx/fsg.h b/include/asm-arm/arch-ixp4xx/fsg.h index c0100cc..168b984 100644 --- a/include/asm-arm/arch-ixp4xx/fsg.h +++ b/include/asm-arm/arch-ixp4xx/fsg.h @@ -16,7 +16,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define FSG_SDA_PIN 12 diff --git a/include/asm-arm/arch-ixp4xx/gpio.h b/include/asm-arm/arch-ixp4xx/gpio.h index 3a4c5b8..28e7d27 100644 --- a/include/asm-arm/arch-ixp4xx/gpio.h +++ b/include/asm-arm/arch-ixp4xx/gpio.h @@ -25,7 +25,7 @@ #ifndef __ASM_ARCH_IXP4XX_GPIO_H #define __ASM_ARCH_IXP4XX_GPIO_H -#include +#include static inline int gpio_request(unsigned gpio, const char *label) { diff --git a/include/asm-arm/arch-ixp4xx/gtwx5715.h b/include/asm-arm/arch-ixp4xx/gtwx5715.h index c3069d6..2192ded 100644 --- a/include/asm-arm/arch-ixp4xx/gtwx5715.h +++ b/include/asm-arm/arch-ixp4xx/gtwx5715.h @@ -21,7 +21,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #include "irqs.h" diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h index de181ce..8e74260 100644 --- a/include/asm-arm/arch-ixp4xx/io.h +++ b/include/asm-arm/arch-ixp4xx/io.h @@ -15,7 +15,7 @@ #include -#include +#include #define IO_SPACE_LIMIT 0xffff0000 diff --git a/include/asm-arm/arch-ixp4xx/ixdp425.h b/include/asm-arm/arch-ixp4xx/ixdp425.h index e0791af..d0a1dcb 100644 --- a/include/asm-arm/arch-ixp4xx/ixdp425.h +++ b/include/asm-arm/arch-ixp4xx/ixdp425.h @@ -13,7 +13,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define IXDP425_SDA_PIN 7 diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h index 98d9378..ecb12d6 100644 --- a/include/asm-arm/arch-ixp4xx/nas100d.h +++ b/include/asm-arm/arch-ixp4xx/nas100d.h @@ -16,7 +16,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define NAS100D_SDA_PIN 5 diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h index 714bbc6..fa895f4 100644 --- a/include/asm-arm/arch-ixp4xx/nslu2.h +++ b/include/asm-arm/arch-ixp4xx/nslu2.h @@ -15,7 +15,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define NSLU2_SDA_PIN 7 diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h index a1f2b54..b2af515 100644 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ b/include/asm-arm/arch-ixp4xx/platform.h @@ -8,7 +8,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-ixp4xx/prpmc1100.h b/include/asm-arm/arch-ixp4xx/prpmc1100.h index e2532ab..100855f 100644 --- a/include/asm-arm/arch-ixp4xx/prpmc1100.h +++ b/include/asm-arm/arch-ixp4xx/prpmc1100.h @@ -13,7 +13,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " +#error "Do not include this directly, instead #include " #endif #define PRPMC1100_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS diff --git a/include/asm-arm/arch-ixp4xx/system.h b/include/asm-arm/arch-ixp4xx/system.h index 8e1db42..f11b922 100644 --- a/include/asm-arm/arch-ixp4xx/system.h +++ b/include/asm-arm/arch-ixp4xx/system.h @@ -9,7 +9,7 @@ * */ -#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-ixp4xx/timex.h b/include/asm-arm/arch-ixp4xx/timex.h index 3745e35..c2559e2 100644 --- a/include/asm-arm/arch-ixp4xx/timex.h +++ b/include/asm-arm/arch-ixp4xx/timex.h @@ -3,7 +3,7 @@ * */ -#include +#include /* * We use IXP425 General purpose timer for our timer needs, it runs at diff --git a/include/asm-arm/arch-ks8695/debug-macro.S b/include/asm-arm/arch-ks8695/debug-macro.S index cd5f2fb..d2583ff 100644 --- a/include/asm-arm/arch-ks8695/debug-macro.S +++ b/include/asm-arm/arch-ks8695/debug-macro.S @@ -11,7 +11,7 @@ * published by the Free Software Foundation. */ -#include +#include #include .macro addruart, rx diff --git a/include/asm-arm/arch-ks8695/entry-macro.S b/include/asm-arm/arch-ks8695/entry-macro.S index e34bdf8..3993cfe 100644 --- a/include/asm-arm/arch-ks8695/entry-macro.S +++ b/include/asm-arm/arch-ks8695/entry-macro.S @@ -11,7 +11,7 @@ * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-ks8695/memory.h b/include/asm-arm/arch-ks8695/memory.h index 24f6a6e..1b542f7 100644 --- a/include/asm-arm/arch-ks8695/memory.h +++ b/include/asm-arm/arch-ks8695/memory.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#include +#include /* * Physical SRAM offset. diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h index 5b4396d..762cbc7 100644 --- a/include/asm-arm/arch-l7200/aux_reg.h +++ b/include/asm-arm/arch-l7200/aux_reg.h @@ -9,7 +9,7 @@ #ifndef _ASM_ARCH_AUXREG_H #define _ASM_ARCH_AUXREG_H -#include +#include #define l7200aux_reg *((volatile unsigned int *) (AUX_BASE)) diff --git a/include/asm-arm/arch-l7200/entry-macro.S b/include/asm-arm/arch-l7200/entry-macro.S index 63411d3..d5e7294 100644 --- a/include/asm-arm/arch-l7200/entry-macro.S +++ b/include/asm-arm/arch-l7200/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include .equ irq_base_addr, IO_BASE_2 diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h index 9c4804d..6f20962 100644 --- a/include/asm-arm/arch-l7200/gp_timers.h +++ b/include/asm-arm/arch-l7200/gp_timers.h @@ -10,7 +10,7 @@ #ifndef _ASM_ARCH_GPTIMERS_H #define _ASM_ARCH_GPTIMERS_H -#include +#include /* * Layout of L7200 general purpose timer registers diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h index 645dbdf..e24a10a 100644 --- a/include/asm-arm/arch-l7200/io.h +++ b/include/asm-arm/arch-l7200/io.h @@ -10,7 +10,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-l7200/system.h b/include/asm-arm/arch-l7200/system.h index 18825cf..efef950 100644 --- a/include/asm-arm/arch-l7200/system.h +++ b/include/asm-arm/arch-l7200/system.h @@ -12,7 +12,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h index 04be2a0..c5ba0ad 100644 --- a/include/asm-arm/arch-l7200/uncompress.h +++ b/include/asm-arm/arch-l7200/uncompress.h @@ -9,7 +9,7 @@ * 07-26-2000 SJH Removed hard coded baud rate */ -#include +#include #define IO_UART IO_START + 0x00044000 diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S index ffe3972..34468e0 100644 --- a/include/asm-arm/arch-lh7a40x/entry-macro.S +++ b/include/asm-arm/arch-lh7a40x/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include /* In order to allow there to be support for both of the processor diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h index 17bc94097..8d591d0 100644 --- a/include/asm-arm/arch-lh7a40x/io.h +++ b/include/asm-arm/arch-lh7a40x/io.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-msm/debug-macro.S b/include/asm-arm/arch-msm/debug-macro.S index 393d527..e131b44 100644 --- a/include/asm-arm/arch-msm/debug-macro.S +++ b/include/asm-arm/arch-msm/debug-macro.S @@ -14,7 +14,7 @@ * */ -#include +#include #include .macro addruart,rx diff --git a/include/asm-arm/arch-msm/system.h b/include/asm-arm/arch-msm/system.h index 7c5544b..fb31b3a 100644 --- a/include/asm-arm/arch-msm/system.h +++ b/include/asm-arm/arch-msm/system.h @@ -13,7 +13,7 @@ * */ -#include +#include void arch_idle(void); diff --git a/include/asm-arm/arch-mxc/gpio.h b/include/asm-arm/arch-mxc/gpio.h index d393e15..5f13a65 100644 --- a/include/asm-arm/arch-mxc/gpio.h +++ b/include/asm-arm/arch-mxc/gpio.h @@ -19,7 +19,7 @@ #ifndef __ASM_ARCH_MXC_GPIO_H__ #define __ASM_ARCH_MXC_GPIO_H__ -#include +#include #include /* use gpiolib dispatchers */ diff --git a/include/asm-arm/arch-mxc/irqs.h b/include/asm-arm/arch-mxc/irqs.h index f416130..21411ef 100644 --- a/include/asm-arm/arch-mxc/irqs.h +++ b/include/asm-arm/arch-mxc/irqs.h @@ -11,6 +11,6 @@ #ifndef __ASM_ARCH_MXC_IRQS_H__ #define __ASM_ARCH_MXC_IRQS_H__ -#include +#include #endif /* __ASM_ARCH_MXC_IRQS_H__ */ diff --git a/include/asm-arm/arch-mxc/memory.h b/include/asm-arm/arch-mxc/memory.h index 059f830..7e669ee 100644 --- a/include/asm-arm/arch-mxc/memory.h +++ b/include/asm-arm/arch-mxc/memory.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_MXC_MEMORY_H__ #define __ASM_ARCH_MXC_MEMORY_H__ -#include +#include /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-mxc/mxc_timer.h b/include/asm-arm/arch-mxc/mxc_timer.h index 6cb11f4..5439fa6 100644 --- a/include/asm-arm/arch-mxc/mxc_timer.h +++ b/include/asm-arm/arch-mxc/mxc_timer.h @@ -24,7 +24,7 @@ #define __PLAT_MXC_TIMER_H #include -#include +#include #ifdef CONFIG_ARCH_IMX #define TIMER_BASE IO_ADDRESS(TIM1_BASE_ADDR) diff --git a/include/asm-arm/arch-mxc/timex.h b/include/asm-arm/arch-mxc/timex.h index 59019fa..432e0c8 100644 --- a/include/asm-arm/arch-mxc/timex.h +++ b/include/asm-arm/arch-mxc/timex.h @@ -20,6 +20,6 @@ #ifndef __ASM_ARCH_MXC_TIMEX_H__ #define __ASM_ARCH_MXC_TIMEX_H__ -#include /* for CLOCK_TICK_RATE */ +#include /* for CLOCK_TICK_RATE */ #endif /* __ASM_ARCH_MXC_TIMEX_H__ */ diff --git a/include/asm-arm/arch-mxc/uncompress.h b/include/asm-arm/arch-mxc/uncompress.h index 42cc0cb..18f33b0 100644 --- a/include/asm-arm/arch-mxc/uncompress.h +++ b/include/asm-arm/arch-mxc/uncompress.h @@ -25,7 +25,7 @@ #define __MXC_BOOT_UNCOMPRESS -#include +#include #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) diff --git a/include/asm-arm/arch-netx/entry-macro.S b/include/asm-arm/arch-netx/entry-macro.S index 83ad188..4115bbd 100644 --- a/include/asm-arm/arch-netx/entry-macro.S +++ b/include/asm-arm/arch-netx/entry-macro.S @@ -18,7 +18,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include +#include .macro disable_fiq .endm diff --git a/include/asm-arm/arch-netx/system.h b/include/asm-arm/arch-netx/system.h index 52adf36..0624d87 100644 --- a/include/asm-arm/arch-netx/system.h +++ b/include/asm-arm/arch-netx/system.h @@ -20,7 +20,7 @@ #define __ASM_ARCH_SYSTEM_H #include -#include +#include #include "netx-regs.h" static inline void arch_idle(void) diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S index 9468095..c78908d 100644 --- a/include/asm-arm/arch-ns9xxx/debug-macro.S +++ b/include/asm-arm/arch-ns9xxx/debug-macro.S @@ -7,7 +7,7 @@ * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. */ -#include +#include #include diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S index 2f6c89d..e9d9449 100644 --- a/include/asm-arm/arch-ns9xxx/entry-macro.S +++ b/include/asm-arm/arch-ns9xxx/entry-macro.S @@ -8,7 +8,7 @@ * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. */ -#include +#include #include .macro get_irqnr_preamble, base, tmp diff --git a/include/asm-arm/arch-ns9xxx/regs-bbu.h b/include/asm-arm/arch-ns9xxx/regs-bbu.h index 7ee194d..b41b31d 100644 --- a/include/asm-arm/arch-ns9xxx/regs-bbu.h +++ b/include/asm-arm/arch-ns9xxx/regs-bbu.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_REGSBBU_H #define __ASM_ARCH_REGSBBU_H -#include +#include /* BBus Utility */ diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h index afa3a9d..6bf1ed2 100644 --- a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h +++ b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_REGSBOARDA9M9750_H #define __ASM_ARCH_REGSBOARDA9M9750_H -#include +#include #define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0)) #define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08) diff --git a/include/asm-arm/arch-ns9xxx/regs-mem.h b/include/asm-arm/arch-ns9xxx/regs-mem.h index fb455a0..023f7be 100644 --- a/include/asm-arm/arch-ns9xxx/regs-mem.h +++ b/include/asm-arm/arch-ns9xxx/regs-mem.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_REGSMEM_H #define __ASM_ARCH_REGSMEM_H -#include +#include /* Memory Module */ diff --git a/include/asm-arm/arch-ns9xxx/regs-sys-common.h b/include/asm-arm/arch-ns9xxx/regs-sys-common.h index 956c57c..bc82d5e 100644 --- a/include/asm-arm/arch-ns9xxx/regs-sys-common.h +++ b/include/asm-arm/arch-ns9xxx/regs-sys-common.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_REGSSYSCOMMON_H #define __ASM_ARCH_REGSSYSCOMMON_H -#include +#include /* Interrupt Vector Address Register Level x */ #define SYS_IVA(x) __REG2(0xa09000c4, (x)) diff --git a/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h b/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h index 318b694..821275a 100644 --- a/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h +++ b/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARCH_REGSSYSNS9360_H #define __ASM_ARCH_REGSSYSNS9360_H -#include +#include /* System Control Module */ diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index 369093a..67ed783 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include #include diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h index 0b13557..449e356 100644 --- a/include/asm-arm/arch-omap/io.h +++ b/include/asm-arm/arch-omap/io.h @@ -34,7 +34,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 7464c69..afbf1e8 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h @@ -327,6 +327,6 @@ extern void omap_init_irq(void); #endif -#include +#include #endif diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h index 26c78f6..3da459a 100644 --- a/include/asm-arm/arch-omap/mcbsp.h +++ b/include/asm-arm/arch-omap/mcbsp.h @@ -27,7 +27,7 @@ #include #include -#include +#include #include #define OMAP730_MCBSP1_BASE 0xfffb1000 diff --git a/include/asm-arm/arch-omap/mtd-xip.h b/include/asm-arm/arch-omap/mtd-xip.h index a73a285..f4714b5 100644 --- a/include/asm-arm/arch-omap/mtd-xip.h +++ b/include/asm-arm/arch-omap/mtd-xip.h @@ -14,7 +14,7 @@ #ifndef __ARCH_OMAP_MTD_XIP_H__ #define __ARCH_OMAP_MTD_XIP_H__ -#include +#include #define OMAP_MPU_TIMER_BASE (0xfffec500) #define OMAP_MPU_TIMER_OFFSET 0x100 diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index ac2bfa4..176d9d6 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h @@ -7,7 +7,7 @@ #include #include -#include +#include #ifndef CONFIG_MACH_VOICEBLUE #define voiceblue_reset() do {} while (0) diff --git a/include/asm-arm/arch-pnx4008/system.h b/include/asm-arm/arch-pnx4008/system.h index 6e3da70..17f9d7f9 100644 --- a/include/asm-arm/arch-pnx4008/system.h +++ b/include/asm-arm/arch-pnx4008/system.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include #include #include diff --git a/include/asm-arm/arch-pnx4008/timex.h b/include/asm-arm/arch-pnx4008/timex.h index ee470a3..f22ee24 100644 --- a/include/asm-arm/arch-pnx4008/timex.h +++ b/include/asm-arm/arch-pnx4008/timex.h @@ -14,7 +14,7 @@ #ifndef __PNX4008_TIMEX_H #define __PNX4008_TIMEX_H -#include +#include #include #define CLOCK_TICK_RATE 1000000 diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index c145bb0..897d164 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h index bdbf5f9..2c1e3d8 100644 --- a/include/asm-arm/arch-pxa/gpio.h +++ b/include/asm-arm/arch-pxa/gpio.h @@ -26,7 +26,7 @@ #include #include -#include +#include #include diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h index 7f8d817..af34e0f 100644 --- a/include/asm-arm/arch-pxa/io.h +++ b/include/asm-arm/arch-pxa/io.h @@ -6,7 +6,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S index cd26306..31a39a7 100644 --- a/include/asm-arm/arch-realview/entry-macro.S +++ b/include/asm-arm/arch-realview/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h index 6f3d0ce..bff3d3f 100644 --- a/include/asm-arm/arch-realview/system.h +++ b/include/asm-arm/arch-realview/system.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include #include #include diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h index 4c905d7..3f7ae2e 100644 --- a/include/asm-arm/arch-realview/uncompress.h +++ b/include/asm-arm/arch-realview/uncompress.h @@ -17,7 +17,7 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#include +#include #include #include diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S index 038b761..5bd5555 100644 --- a/include/asm-arm/arch-rpc/entry-macro.S +++ b/include/asm-arm/arch-rpc/entry-macro.S @@ -1,4 +1,4 @@ -#include +#include #include .equ ioc_base_high, IOC_BASE & 0xff000000 diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h index 6bd2295..0d10d45 100644 --- a/include/asm-arm/arch-rpc/io.h +++ b/include/asm-arm/arch-rpc/io.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h index 729c2ae..ca3277d 100644 --- a/include/asm-arm/arch-rpc/system.h +++ b/include/asm-arm/arch-rpc/system.h @@ -7,7 +7,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include +#include #include #include diff --git a/include/asm-arm/arch-rpc/uncompress.h b/include/asm-arm/arch-rpc/uncompress.h index b8e29ef..844e4d4 100644 --- a/include/asm-arm/arch-rpc/uncompress.h +++ b/include/asm-arm/arch-rpc/uncompress.h @@ -9,7 +9,7 @@ */ #define VIDMEM ((char *)SCREEN_START) -#include +#include #include #include #include diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 4f291d9..86eaa0c 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -14,7 +14,7 @@ #define __ASM_ARCH_DMA_H __FILE__ #include -#include +#include /* * This is the maximum DMA address(physical address) that can be DMAd to. diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index bbec0a8..f70d051 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -19,7 +19,7 @@ #define INTPND (0x10) #define INTOFFSET (0x14) -#include +#include #include .macro get_irqnr_preamble, base, tmp diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 29592c3..6dd10be 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -13,10 +13,6 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H -#ifndef __ASM_HARDWARE_H -#error "Do not include this directly, instead #include " -#endif - #ifndef __ASSEMBLY__ /* external functions for GPIO support diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h index 6b35a4f..3756c99 100644 --- a/include/asm-arm/arch-s3c2410/io.h +++ b/include/asm-arm/arch-s3c2410/io.h @@ -9,7 +9,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-s3c2410/system-reset.h b/include/asm-arm/arch-s3c2410/system-reset.h index 1615bce..beeec77 100644 --- a/include/asm-arm/arch-s3c2410/system-reset.h +++ b/include/asm-arm/arch-s3c2410/system-reset.h @@ -10,7 +10,7 @@ * published by the Free Software Foundation. */ -#include +#include #include #include diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h index ad25808..98f690e 100644 --- a/include/asm-arm/arch-s3c2410/system.h +++ b/include/asm-arm/arch-s3c2410/system.h @@ -10,7 +10,7 @@ * published by the Free Software Foundation. */ -#include +#include #include #include diff --git a/include/asm-arm/arch-sa1100/badge4.h b/include/asm-arm/arch-sa1100/badge4.h index 8d7a671..d93a9a8 100644 --- a/include/asm-arm/arch-sa1100/badge4.h +++ b/include/asm-arm/arch-sa1100/badge4.h @@ -13,7 +13,7 @@ */ #ifndef __ASM_ARCH_HARDWARE_H -#error "include instead" +#error "include instead" #endif #define BADGE4_SA1111_BASE (0x48000000) diff --git a/include/asm-arm/arch-sa1100/debug-macro.S b/include/asm-arm/arch-sa1100/debug-macro.S index 267c317..1b77536 100644 --- a/include/asm-arm/arch-sa1100/debug-macro.S +++ b/include/asm-arm/arch-sa1100/debug-macro.S @@ -10,7 +10,7 @@ * published by the Free Software Foundation. * */ -#include +#include .macro addruart,rx mrc p15, 0, \rx, c1, c0 diff --git a/include/asm-arm/arch-sa1100/gpio.h b/include/asm-arm/arch-sa1100/gpio.h index 93d3395..e66ecf7 100644 --- a/include/asm-arm/arch-sa1100/gpio.h +++ b/include/asm-arm/arch-sa1100/gpio.h @@ -24,7 +24,7 @@ #ifndef __ASM_ARCH_SA1100_GPIO_H #define __ASM_ARCH_SA1100_GPIO_H -#include +#include #include #include diff --git a/include/asm-arm/arch-sa1100/ide.h b/include/asm-arm/arch-sa1100/ide.h index 193f6c1..24972f3 100644 --- a/include/asm-arm/arch-sa1100/ide.h +++ b/include/asm-arm/arch-sa1100/ide.h @@ -10,7 +10,7 @@ */ #include -#include +#include #include #error "This code is broken and needs update to match with current ide support" diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h index aef91e3..63375a0 100644 --- a/include/asm-arm/arch-sa1100/system.h +++ b/include/asm-arm/arch-sa1100/system.h @@ -3,7 +3,7 @@ * * Copyright (c) 1999 Nicolas Pitre */ -#include +#include static inline void arch_idle(void) { diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h index 87ffa27..b11d786 100644 --- a/include/asm-arm/arch-shark/io.h +++ b/include/asm-arm/arch-shark/io.h @@ -11,7 +11,7 @@ #ifndef __ASM_ARM_ARCH_IO_H #define __ASM_ARM_ARCH_IO_H -#include +#include #define IO_SPACE_LIMIT 0xffffffff diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S index 924d1a8..cd11416 100644 --- a/include/asm-arm/arch-versatile/entry-macro.S +++ b/include/asm-arm/arch-versatile/entry-macro.S @@ -7,7 +7,7 @@ * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ -#include +#include #include .macro disable_fiq diff --git a/include/asm-arm/arch-versatile/system.h b/include/asm-arm/arch-versatile/system.h index 71c6254..3ea4e07 100644 --- a/include/asm-arm/arch-versatile/system.h +++ b/include/asm-arm/arch-versatile/system.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H -#include +#include #include #include -- cgit v1.1 From a09e64fbc0094e3073dbb09c3b4bfe4ab669244b Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 5 Aug 2008 16:14:15 +0100 Subject: [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King --- include/asm-arm/arch-aaec2000/aaec2000.h | 207 -- include/asm-arm/arch-aaec2000/aaed2000.h | 40 - include/asm-arm/arch-aaec2000/debug-macro.S | 37 - include/asm-arm/arch-aaec2000/dma.h | 9 - include/asm-arm/arch-aaec2000/entry-macro.S | 40 - include/asm-arm/arch-aaec2000/hardware.h | 50 - include/asm-arm/arch-aaec2000/io.h | 20 - include/asm-arm/arch-aaec2000/irqs.h | 46 - include/asm-arm/arch-aaec2000/memory.h | 30 - include/asm-arm/arch-aaec2000/system.h | 24 - include/asm-arm/arch-aaec2000/timex.h | 18 - include/asm-arm/arch-aaec2000/uncompress.h | 46 - include/asm-arm/arch-aaec2000/vmalloc.h | 16 - include/asm-arm/arch-at91/at91_adc.h | 61 - include/asm-arm/arch-at91/at91_aic.h | 53 - include/asm-arm/arch-at91/at91_dbgu.h | 66 - include/asm-arm/arch-at91/at91_mci.h | 113 -- include/asm-arm/arch-at91/at91_pio.h | 49 - include/asm-arm/arch-at91/at91_pit.h | 29 - include/asm-arm/arch-at91/at91_pmc.h | 111 -- include/asm-arm/arch-at91/at91_rstc.h | 38 - include/asm-arm/arch-at91/at91_rtc.h | 75 - include/asm-arm/arch-at91/at91_rtt.h | 32 - include/asm-arm/arch-at91/at91_shdwc.h | 35 - include/asm-arm/arch-at91/at91_spi.h | 81 - include/asm-arm/arch-at91/at91_ssc.h | 106 - include/asm-arm/arch-at91/at91_st.h | 49 - include/asm-arm/arch-at91/at91_tc.h | 146 -- include/asm-arm/arch-at91/at91_twi.h | 68 - include/asm-arm/arch-at91/at91_wdt.h | 34 - include/asm-arm/arch-at91/at91cap9.h | 126 -- include/asm-arm/arch-at91/at91cap9_ddrsdr.h | 100 - include/asm-arm/arch-at91/at91cap9_matrix.h | 137 -- include/asm-arm/arch-at91/at91rm9200.h | 115 -- include/asm-arm/arch-at91/at91rm9200_emac.h | 138 -- include/asm-arm/arch-at91/at91rm9200_mc.h | 160 -- include/asm-arm/arch-at91/at91sam9260.h | 138 -- include/asm-arm/arch-at91/at91sam9260_matrix.h | 78 - include/asm-arm/arch-at91/at91sam9261.h | 105 - include/asm-arm/arch-at91/at91sam9261_matrix.h | 62 - include/asm-arm/arch-at91/at91sam9263.h | 127 -- include/asm-arm/arch-at91/at91sam9263_matrix.h | 129 -- include/asm-arm/arch-at91/at91sam9_sdramc.h | 83 - include/asm-arm/arch-at91/at91sam9_smc.h | 73 - include/asm-arm/arch-at91/at91sam9rl.h | 115 -- include/asm-arm/arch-at91/at91sam9rl_matrix.h | 96 - include/asm-arm/arch-at91/at91x40.h | 55 - include/asm-arm/arch-at91/board.h | 172 -- include/asm-arm/arch-at91/cpu.h | 103 - include/asm-arm/arch-at91/debug-macro.S | 39 - include/asm-arm/arch-at91/dma.h | 19 - include/asm-arm/arch-at91/entry-macro.S | 32 - include/asm-arm/arch-at91/gpio.h | 252 --- include/asm-arm/arch-at91/hardware.h | 92 - include/asm-arm/arch-at91/io.h | 48 - include/asm-arm/arch-at91/irqs.h | 48 - include/asm-arm/arch-at91/memory.h | 39 - include/asm-arm/arch-at91/system.h | 53 - include/asm-arm/arch-at91/timex.h | 77 - include/asm-arm/arch-at91/uncompress.h | 76 - include/asm-arm/arch-at91/vmalloc.h | 26 - include/asm-arm/arch-cl7500/acornfb.h | 33 - include/asm-arm/arch-cl7500/debug-macro.S | 21 - include/asm-arm/arch-cl7500/dma.h | 21 - include/asm-arm/arch-cl7500/entry-macro.S | 16 - include/asm-arm/arch-cl7500/hardware.h | 67 - include/asm-arm/arch-cl7500/io.h | 255 --- include/asm-arm/arch-cl7500/irq.h | 32 - include/asm-arm/arch-cl7500/irqs.h | 66 - include/asm-arm/arch-cl7500/memory.h | 35 - include/asm-arm/arch-cl7500/system.h | 23 - include/asm-arm/arch-cl7500/timex.h | 13 - include/asm-arm/arch-cl7500/uncompress.h | 35 - include/asm-arm/arch-cl7500/vmalloc.h | 4 - include/asm-arm/arch-clps711x/autcpu12.h | 78 - include/asm-arm/arch-clps711x/debug-macro.S | 46 - include/asm-arm/arch-clps711x/dma.h | 19 - include/asm-arm/arch-clps711x/entry-macro.S | 58 - include/asm-arm/arch-clps711x/hardware.h | 237 --- include/asm-arm/arch-clps711x/io.h | 38 - include/asm-arm/arch-clps711x/irqs.h | 53 - include/asm-arm/arch-clps711x/memory.h | 94 - include/asm-arm/arch-clps711x/syspld.h | 121 -- include/asm-arm/arch-clps711x/system.h | 40 - include/asm-arm/arch-clps711x/time.h | 49 - include/asm-arm/arch-clps711x/timex.h | 23 - include/asm-arm/arch-clps711x/uncompress.h | 59 - include/asm-arm/arch-clps711x/vmalloc.h | 20 - include/asm-arm/arch-davinci/clock.h | 22 - include/asm-arm/arch-davinci/common.h | 19 - include/asm-arm/arch-davinci/debug-macro.S | 21 - include/asm-arm/arch-davinci/dma.h | 16 - include/asm-arm/arch-davinci/entry-macro.S | 32 - include/asm-arm/arch-davinci/gpio.h | 159 -- include/asm-arm/arch-davinci/hardware.h | 52 - include/asm-arm/arch-davinci/i2c.h | 21 - include/asm-arm/arch-davinci/io.h | 79 - include/asm-arm/arch-davinci/irqs.h | 105 - include/asm-arm/arch-davinci/memory.h | 64 - include/asm-arm/arch-davinci/mux.h | 55 - include/asm-arm/arch-davinci/psc.h | 76 - include/asm-arm/arch-davinci/serial.h | 20 - include/asm-arm/arch-davinci/system.h | 29 - include/asm-arm/arch-davinci/timex.h | 17 - include/asm-arm/arch-davinci/uncompress.h | 35 - include/asm-arm/arch-davinci/vmalloc.h | 15 - include/asm-arm/arch-ebsa110/debug-macro.S | 21 - include/asm-arm/arch-ebsa110/dma.h | 11 - include/asm-arm/arch-ebsa110/entry-macro.S | 39 - include/asm-arm/arch-ebsa110/hardware.h | 63 - include/asm-arm/arch-ebsa110/io.h | 92 - include/asm-arm/arch-ebsa110/irqs.h | 20 - include/asm-arm/arch-ebsa110/memory.h | 37 - include/asm-arm/arch-ebsa110/system.h | 39 - include/asm-arm/arch-ebsa110/timex.h | 19 - include/asm-arm/arch-ebsa110/uncompress.h | 45 - include/asm-arm/arch-ebsa110/vmalloc.h | 10 - include/asm-arm/arch-ebsa285/debug-macro.S | 57 - include/asm-arm/arch-ebsa285/dma.h | 25 - include/asm-arm/arch-ebsa285/entry-macro.S | 113 -- include/asm-arm/arch-ebsa285/hardware.h | 105 - include/asm-arm/arch-ebsa285/io.h | 39 - include/asm-arm/arch-ebsa285/irqs.h | 98 - include/asm-arm/arch-ebsa285/memory.h | 67 - include/asm-arm/arch-ebsa285/system.h | 69 - include/asm-arm/arch-ebsa285/timex.h | 18 - include/asm-arm/arch-ebsa285/uncompress.h | 38 - include/asm-arm/arch-ebsa285/vmalloc.h | 10 - include/asm-arm/arch-ep93xx/debug-macro.S | 22 - include/asm-arm/arch-ep93xx/dma.h | 3 - include/asm-arm/arch-ep93xx/entry-macro.S | 59 - include/asm-arm/arch-ep93xx/ep93xx-regs.h | 133 -- include/asm-arm/arch-ep93xx/gesbc9312.h | 3 - include/asm-arm/arch-ep93xx/gpio.h | 128 -- include/asm-arm/arch-ep93xx/hardware.h | 16 - include/asm-arm/arch-ep93xx/io.h | 8 - include/asm-arm/arch-ep93xx/irqs.h | 78 - include/asm-arm/arch-ep93xx/memory.h | 14 - include/asm-arm/arch-ep93xx/platform.h | 20 - include/asm-arm/arch-ep93xx/system.h | 26 - include/asm-arm/arch-ep93xx/timex.h | 5 - include/asm-arm/arch-ep93xx/ts72xx.h | 101 - include/asm-arm/arch-ep93xx/uncompress.h | 85 - include/asm-arm/arch-ep93xx/vmalloc.h | 5 - include/asm-arm/arch-h720x/boards.h | 53 - include/asm-arm/arch-h720x/debug-macro.S | 40 - include/asm-arm/arch-h720x/dma.h | 26 - include/asm-arm/arch-h720x/entry-macro.S | 66 - include/asm-arm/arch-h720x/h7201-regs.h | 67 - include/asm-arm/arch-h720x/h7202-regs.h | 155 -- include/asm-arm/arch-h720x/hardware.h | 192 -- include/asm-arm/arch-h720x/io.h | 24 - include/asm-arm/arch-h720x/irqs.h | 116 -- include/asm-arm/arch-h720x/memory.h | 29 - include/asm-arm/arch-h720x/system.h | 33 - include/asm-arm/arch-h720x/timex.h | 15 - include/asm-arm/arch-h720x/uncompress.h | 37 - include/asm-arm/arch-h720x/vmalloc.h | 10 - include/asm-arm/arch-imx/debug-macro.S | 34 - include/asm-arm/arch-imx/dma.h | 56 - include/asm-arm/arch-imx/entry-macro.S | 32 - include/asm-arm/arch-imx/gpio.h | 102 - include/asm-arm/arch-imx/hardware.h | 91 - include/asm-arm/arch-imx/imx-dma.h | 94 - include/asm-arm/arch-imx/imx-regs.h | 482 ----- include/asm-arm/arch-imx/imx-uart.h | 12 - include/asm-arm/arch-imx/imxfb.h | 37 - include/asm-arm/arch-imx/io.h | 30 - include/asm-arm/arch-imx/irqs.h | 116 -- include/asm-arm/arch-imx/memory.h | 36 - include/asm-arm/arch-imx/mmc.h | 15 - include/asm-arm/arch-imx/mx1ads.h | 36 - include/asm-arm/arch-imx/spi_imx.h | 72 - include/asm-arm/arch-imx/system.h | 40 - include/asm-arm/arch-imx/timex.h | 26 - include/asm-arm/arch-imx/uncompress.h | 71 - include/asm-arm/arch-imx/vmalloc.h | 20 - include/asm-arm/arch-integrator/bits.h | 61 - include/asm-arm/arch-integrator/cm.h | 36 - include/asm-arm/arch-integrator/debug-macro.S | 22 - include/asm-arm/arch-integrator/dma.h | 19 - include/asm-arm/arch-integrator/entry-macro.S | 44 - include/asm-arm/arch-integrator/hardware.h | 48 - include/asm-arm/arch-integrator/impd1.h | 18 - include/asm-arm/arch-integrator/io.h | 36 - include/asm-arm/arch-integrator/irqs.h | 82 - include/asm-arm/arch-integrator/lm.h | 23 - include/asm-arm/arch-integrator/memory.h | 39 - include/asm-arm/arch-integrator/platform.h | 469 ----- include/asm-arm/arch-integrator/system.h | 44 - include/asm-arm/arch-integrator/timex.h | 26 - include/asm-arm/arch-integrator/uncompress.h | 50 - include/asm-arm/arch-integrator/vmalloc.h | 20 - include/asm-arm/arch-iop13xx/adma.h | 537 ----- include/asm-arm/arch-iop13xx/debug-macro.S | 26 - include/asm-arm/arch-iop13xx/dma.h | 3 - include/asm-arm/arch-iop13xx/entry-macro.S | 45 - include/asm-arm/arch-iop13xx/hardware.h | 28 - include/asm-arm/arch-iop13xx/io.h | 41 - include/asm-arm/arch-iop13xx/iop13xx.h | 526 ----- include/asm-arm/arch-iop13xx/iq81340.h | 28 - include/asm-arm/arch-iop13xx/irqs.h | 196 -- include/asm-arm/arch-iop13xx/memory.h | 64 - include/asm-arm/arch-iop13xx/msi.h | 11 - include/asm-arm/arch-iop13xx/pci.h | 57 - include/asm-arm/arch-iop13xx/system.h | 27 - include/asm-arm/arch-iop13xx/time.h | 107 - include/asm-arm/arch-iop13xx/timex.h | 3 - include/asm-arm/arch-iop13xx/uncompress.h | 23 - include/asm-arm/arch-iop13xx/vmalloc.h | 4 - include/asm-arm/arch-iop32x/adma.h | 5 - include/asm-arm/arch-iop32x/debug-macro.S | 20 - include/asm-arm/arch-iop32x/dma.h | 9 - include/asm-arm/arch-iop32x/entry-macro.S | 36 - include/asm-arm/arch-iop32x/glantank.h | 13 - include/asm-arm/arch-iop32x/gpio.h | 6 - include/asm-arm/arch-iop32x/hardware.h | 44 - include/asm-arm/arch-iop32x/io.h | 27 - include/asm-arm/arch-iop32x/iop32x.h | 37 - include/asm-arm/arch-iop32x/iq31244.h | 17 - include/asm-arm/arch-iop32x/iq80321.h | 17 - include/asm-arm/arch-iop32x/irqs.h | 50 - include/asm-arm/arch-iop32x/memory.h | 26 - include/asm-arm/arch-iop32x/n2100.h | 19 - include/asm-arm/arch-iop32x/system.h | 33 - include/asm-arm/arch-iop32x/time.h | 4 - include/asm-arm/arch-iop32x/timex.h | 9 - include/asm-arm/arch-iop32x/uncompress.h | 39 - include/asm-arm/arch-iop32x/vmalloc.h | 5 - include/asm-arm/arch-iop33x/adma.h | 5 - include/asm-arm/arch-iop33x/debug-macro.S | 24 - include/asm-arm/arch-iop33x/dma.h | 9 - include/asm-arm/arch-iop33x/entry-macro.S | 37 - include/asm-arm/arch-iop33x/gpio.h | 6 - include/asm-arm/arch-iop33x/hardware.h | 46 - include/asm-arm/arch-iop33x/io.h | 27 - include/asm-arm/arch-iop33x/iop33x.h | 43 - include/asm-arm/arch-iop33x/iq80331.h | 16 - include/asm-arm/arch-iop33x/iq80332.h | 16 - include/asm-arm/arch-iop33x/irqs.h | 60 - include/asm-arm/arch-iop33x/memory.h | 26 - include/asm-arm/arch-iop33x/system.h | 22 - include/asm-arm/arch-iop33x/time.h | 4 - include/asm-arm/arch-iop33x/timex.h | 9 - include/asm-arm/arch-iop33x/uncompress.h | 37 - include/asm-arm/arch-iop33x/vmalloc.h | 5 - include/asm-arm/arch-ixp2000/debug-macro.S | 27 - include/asm-arm/arch-ixp2000/dma.h | 9 - include/asm-arm/arch-ixp2000/enp2611.h | 46 - include/asm-arm/arch-ixp2000/entry-macro.S | 60 - include/asm-arm/arch-ixp2000/gpio.h | 48 - include/asm-arm/arch-ixp2000/hardware.h | 44 - include/asm-arm/arch-ixp2000/io.h | 134 -- include/asm-arm/arch-ixp2000/irqs.h | 207 -- include/asm-arm/arch-ixp2000/ixdp2x00.h | 92 - include/asm-arm/arch-ixp2000/ixdp2x01.h | 57 - include/asm-arm/arch-ixp2000/ixp2000-regs.h | 457 ----- include/asm-arm/arch-ixp2000/memory.h | 34 - include/asm-arm/arch-ixp2000/platform.h | 152 -- include/asm-arm/arch-ixp2000/system.h | 49 - include/asm-arm/arch-ixp2000/timex.h | 13 - include/asm-arm/arch-ixp2000/uncompress.h | 47 - include/asm-arm/arch-ixp2000/vmalloc.h | 20 - include/asm-arm/arch-ixp23xx/debug-macro.S | 26 - include/asm-arm/arch-ixp23xx/dma.h | 3 - include/asm-arm/arch-ixp23xx/entry-macro.S | 37 - include/asm-arm/arch-ixp23xx/hardware.h | 37 - include/asm-arm/arch-ixp23xx/io.h | 54 - include/asm-arm/arch-ixp23xx/irqs.h | 223 --- include/asm-arm/arch-ixp23xx/ixdp2351.h | 89 - include/asm-arm/arch-ixp23xx/ixp23xx.h | 298 --- include/asm-arm/arch-ixp23xx/memory.h | 48 - include/asm-arm/arch-ixp23xx/platform.h | 57 - include/asm-arm/arch-ixp23xx/system.h | 33 - include/asm-arm/arch-ixp23xx/time.h | 3 - include/asm-arm/arch-ixp23xx/timex.h | 7 - include/asm-arm/arch-ixp23xx/uncompress.h | 40 - include/asm-arm/arch-ixp23xx/vmalloc.h | 10 - include/asm-arm/arch-ixp4xx/avila.h | 39 - include/asm-arm/arch-ixp4xx/coyote.h | 33 - include/asm-arm/arch-ixp4xx/cpu.h | 46 - include/asm-arm/arch-ixp4xx/debug-macro.S | 24 - include/asm-arm/arch-ixp4xx/dma.h | 21 - include/asm-arm/arch-ixp4xx/dsmg600.h | 52 - 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/dev/null @@ -1,207 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/aaec2000.h - * - * AAEC-2000 registers definition - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_AAEC2000_H -#define __ASM_ARCH_AAEC2000_H - -#ifndef __ASM_ARCH_HARDWARE_H -#error You must include hardware.h not this file -#endif /* __ASM_ARCH_HARDWARE_H */ - -/* Chip selects */ -#define AAEC_CS0 0x00000000 -#define AAEC_CS1 0x10000000 -#define AAEC_CS2 0x20000000 -#define AAEC_CS3 0x30000000 - -/* Flash */ -#define AAEC_FLASH_BASE AAEC_CS0 -#define AAEC_FLASH_SIZE SZ_64M - -/* Interrupt controller */ -#define IRQ_BASE __REG(0x80000500) -#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */ -#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */ -#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */ -#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */ - -/* UART 1 */ -#define UART1_BASE __REG(0x80000600) -#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */ -#define UART1_LCR __REG(0x80000604) /* Link Control Register */ -#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */ -#define UART1_CR __REG(0x8000060c) /* Control Register */ -#define UART1_SR __REG(0x80000610) /* Status Register */ -#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */ -#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */ -#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */ - -/* UART 2 */ -#define UART2_BASE __REG(0x80000700) -#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */ -#define UART2_LCR __REG(0x80000704) /* Link Control Register */ -#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */ -#define UART2_CR __REG(0x8000070c) /* Control Register */ -#define UART2_SR __REG(0x80000710) /* Status Register */ -#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */ -#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */ -#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */ - -/* UART 3 */ -#define UART3_BASE __REG(0x80000800) -#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */ -#define UART3_LCR __REG(0x80000804) /* Link Control Register */ -#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */ -#define UART3_CR __REG(0x8000080c) /* Control Register */ -#define UART3_SR __REG(0x80000810) /* Status Register */ -#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */ -#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */ -#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */ - -/* These are used in some places */ -#define _UART1_BASE __PREG(UART1_BASE) -#define _UART2_BASE __PREG(UART2_BASE) -#define _UART3_BASE __PREG(UART3_BASE) - -/* UART Registers Offsets */ -#define UART_DR 0x00 -#define UART_LCR 0x04 -#define UART_BRCR 0x08 -#define UART_CR 0x0c -#define UART_SR 0x10 -#define UART_INT 0x14 -#define UART_INTM 0x18 -#define UART_INTRES 0x1c - -/* UART_LCR Bitmask */ -#define UART_LCR_BRK (1 << 0) /* Send Break */ -#define UART_LCR_PEN (1 << 1) /* Parity Enable */ -#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */ -#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */ -#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */ -#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */ -#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */ -#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */ -#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */ - -/* UART_CR Bitmask */ -#define UART_CR_EN (1 << 0) /* UART Enable */ -#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */ -#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */ -#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */ -#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */ -#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */ -#define UART_CR_LOOP (1 << 6) /* Loopback Mode */ - -/* UART_SR Bitmask */ -#define UART_SR_CTS (1 << 0) /* Clear To Send Status */ -#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */ -#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */ -#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */ -#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */ -#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */ -#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */ -#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */ - -/* UART_INT Bitmask */ -#define UART_INT_RIS (1 << 0) /* Rx Interrupt */ -#define UART_INT_TIS (1 << 1) /* Tx Interrupt */ -#define UART_INT_MIS (1 << 2) /* Modem Interrupt */ -#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */ - -/* Timer 1 */ -#define TIMER1_BASE __REG(0x80000c00) -#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */ -#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */ -#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */ -#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */ - -/* Timer 2 */ -#define TIMER2_BASE __REG(0x80000d00) -#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */ -#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */ -#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */ -#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */ - -/* Timer 3 */ -#define TIMER3_BASE __REG(0x80000e00) -#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */ -#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */ -#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */ -#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */ - -/* Timer Control register bits */ -#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start Timer) */ -#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */ -#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */ -#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */ -#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2) */ - -/* Power and State Control */ -#define POWER_BASE __REG(0x80000400) -#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */ -#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */ -#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */ -#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */ -#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */ -#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */ -#define POWER_TEOI __REG(0x80000418) /* Tick EoI */ -#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */ -#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */ - -/* GPIO Registers */ -#define AAEC_GPIO_PHYS 0x80000e00 - -#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00) -#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04) -#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08) -#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c) -#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10) -#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14) -#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18) -#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c) -#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20) -#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24) -#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28) -#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c) -#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30) -#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34) -#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38) -#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c) -#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40) -#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44) -#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48) -#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c) -#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50) -#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54) -#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58) -#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c) -#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60) -#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64) -#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68) -#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c) -#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70) -#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74) -#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78) -#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c) -#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80) -#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84) - -#define AAEC_GPIO_PINMUX_PE0CON (1 << 0) -#define AAEC_GPIO_PINMUX_PD0CON (1 << 1) -#define AAEC_GPIO_PINMUX_CODECON (1 << 2) -#define AAEC_GPIO_PINMUX_UART3CON (1 << 3) - -/* LCD Controller */ -#define AAEC_CLCD_PHYS 0x80003000 - -#endif /* __ARM_ARCH_AAEC2000_H */ diff --git a/include/asm-arm/arch-aaec2000/aaed2000.h b/include/asm-arm/arch-aaec2000/aaed2000.h deleted file mode 100644 index bc76d2b..0000000 --- a/include/asm-arm/arch-aaec2000/aaed2000.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/aaed2000.h - * - * AAED-2000 specific bits definition - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_AAED2000_H -#define __ASM_ARCH_AAED2000_H - -/* External GPIOs. */ - -#define EXT_GPIO_PBASE AAEC_CS3 -#define EXT_GPIO_VBASE 0xf8100000 -#define EXT_GPIO_LENGTH 0x00001000 - -#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE) -#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE) - -#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x))) -#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x))) - -#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE) - -#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */ -#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */ -#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */ -#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */ -#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */ -#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */ -#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */ -#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */ - - -#endif /* __ARM_ARCH_AAED2000_H */ diff --git a/include/asm-arm/arch-aaec2000/debug-macro.S b/include/asm-arm/arch-aaec2000/debug-macro.S deleted file mode 100644 index 7b1fce0..0000000 --- a/include/asm-arm/arch-aaec2000/debug-macro.S +++ /dev/null @@ -1,37 +0,0 @@ -/* linux/include/asm-arm/arch-aaec2000/debug-macro.S - * - * Debugging macro include header - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include "hardware.h" - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x80000000 @ physical - movne \rx, #io_p2v(0x80000000) @ virtual - orr \rx, \rx, #0x00000800 - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0] - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #0x10] - tst \rd, #(1 << 7) - beq 1002b - .endm - - .macro waituart,rd,rx -#if 0 -1001: ldr \rd, [\rx, #0x10] - tst \rd, #(1 << 5) - beq 1001b -#endif - .endm diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h deleted file mode 100644 index e100b1e..0000000 --- a/include/asm-arm/arch-aaec2000/dma.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/dma.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S deleted file mode 100644 index 83fdf68..0000000 --- a/include/asm-arm/arch-aaec2000/entry-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/entry-macro.S - * - * Low-level IRQ helper for aaec-2000 based platforms - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov r4, #0xf8000000 - add r4, r4, #0x00000500 - mov \base, r4 - ldr \irqstat, [\base, #0] - cmp \irqstat, #0 - bne 1001f - ldr \irqnr, =NR_IRQS+1 - b 1003f -1001: mov \irqnr, #0 -1002: ands \tmp, \irqstat, #1 - mov \irqstat, \irqstat, LSR #1 - add \irqnr, \irqnr, #1 - beq 1002b - sub \irqnr, \irqnr, #1 -1003: - .endm diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h deleted file mode 100644 index 153506f..0000000 --- a/include/asm-arm/arch-aaec2000/hardware.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/hardware.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -/* The kernel is loaded at physical address 0xf8000000. - * We map the IO space a bit after - */ -#define PIO_APB_BASE 0x80000000 -#define VIO_APB_BASE 0xf8000000 -#define IO_APB_LENGTH 0x2000 -#define PIO_AHB_BASE 0x80002000 -#define VIO_AHB_BASE 0xf8002000 -#define IO_AHB_LENGTH 0x2000 - -#define VIO_BASE VIO_APB_BASE -#define PIO_BASE PIO_APB_BASE - -#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE ) -#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE ) - -#ifndef __ASSEMBLY__ - -#include - -/* FIXME: Is it needed to optimize this a la pxa ?? */ -#define __REG(x) (*((volatile u32 *)io_p2v(x))) -#define __PREG(x) (io_v2p((u32)&(x))) - -#else /* __ASSEMBLY__ */ - -#define __REG(x) io_p2v(x) -#define __PREG(x) io_v2p(x) - -#endif - -#include "aaec2000.h" - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h deleted file mode 100644 index bc2364ab..0000000 --- a/include/asm-arm/arch-aaec2000/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/io.h - * - * Copied from asm/arch/sa1100/io.h - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-aaec2000/irqs.h b/include/asm-arm/arch-aaec2000/irqs.h deleted file mode 100644 index de25222..0000000 --- a/include/asm-arm/arch-aaec2000/irqs.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/irqs.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - - -#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */ -#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */ -#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */ -#define INT_MV_FIQ 3 /* Media Changed Interrupt */ -#define INT_SC 4 /* Sound Codec Interrupt */ -#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */ -#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */ -#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */ -#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */ -#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */ -#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */ -#define INT_TICK 11 /* 64Hz Tick Interrupt */ -#define INT_UART1 12 /* UART1 Interrupt */ -#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */ -#define INT_LCD 14 /* LCD Interrupt */ -#define INT_SSI 15 /* SSI End of Transfer Interrupt */ -#define INT_UART3 16 /* UART3 Interrupt */ -#define INT_SCI 17 /* SCI Interrupt */ -#define INT_AAC 18 /* Advanced Audio Codec Interrupt */ -#define INT_MMC 19 /* MMC Interrupt */ -#define INT_USB 20 /* USB Interrupt */ -#define INT_DMA 21 /* DMA Interrupt */ -#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */ -#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */ -#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */ -#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */ -#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */ -#define INT_BMI 27 /* BMI Interrupt */ - -#define NR_IRQS (INT_BMI + 1) - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h deleted file mode 100644 index 9eceb41..0000000 --- a/include/asm-arm/arch-aaec2000/memory.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/memory.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - - -#define PHYS_OFFSET UL(0xf0000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * The nodes are the followings: - * - * node 0: 0xf000.0000 - 0xf3ff.ffff - * node 1: 0xf400.0000 - 0xf7ff.ffff - * node 2: 0xf800.0000 - 0xfbff.ffff - * node 3: 0xfc00.0000 - 0xffff.ffff - */ -#define NODE_MEM_SIZE_BITS 26 - -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/include/asm-arm/arch-aaec2000/system.h b/include/asm-arm/arch-aaec2000/system.h deleted file mode 100644 index 08de97b..0000000 --- a/include/asm-arm/arch-aaec2000/system.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaed2000/system.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - cpu_reset(0); -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/include/asm-arm/arch-aaec2000/timex.h b/include/asm-arm/arch-aaec2000/timex.h deleted file mode 100644 index f5708b3..0000000 --- a/include/asm-arm/arch-aaec2000/timex.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/timex.h - * - * AAEC-2000 Architecture timex specification - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#define CLOCK_TICK_RATE 508000 - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h deleted file mode 100644 index 300f4bf..0000000 --- a/include/asm-arm/arch-aaec2000/uncompress.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/uncompress.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include "hardware.h" - -#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) - -static void putc(int c) -{ - unsigned long serial_port; - do { - serial_port = _UART3_BASE; - if (UART(UART_CR) & UART_CR_EN) break; - serial_port = _UART1_BASE; - if (UART(UART_CR) & UART_CR_EN) break; - serial_port = _UART2_BASE; - if (UART(UART_CR) & UART_CR_EN) break; - return; - } while (0); - - /* wait for space in the UART's transmitter */ - while ((UART(UART_SR) & UART_SR_TxFF)) - barrier(); - - /* send the character out. */ - UART(UART_DR) = c; -} - -static inline void flush(void) -{ -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() - -#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/include/asm-arm/arch-aaec2000/vmalloc.h b/include/asm-arm/arch-aaec2000/vmalloc.h deleted file mode 100644 index ecb991e..0000000 --- a/include/asm-arm/arch-aaec2000/vmalloc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * linux/include/asm-arm/arch-aaec2000/vmalloc.h - * - * Copyright (c) 2005 Nicolas Bellido Y Ortega - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/include/asm-arm/arch-at91/at91_adc.h b/include/asm-arm/arch-at91/at91_adc.h deleted file mode 100644 index 6d71ea26..0000000 --- a/include/asm-arm/arch-at91/at91_adc.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_adc.h - * - * Copyright (C) SAN People - * - * Analog-to-Digital Converter (ADC) registers. - * Based on AT91SAM9260 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_ADC_H -#define AT91_ADC_H - -#define AT91_ADC_CR 0x00 /* Control Register */ -#define AT91_ADC_SWRST (1 << 0) /* Software Reset */ -#define AT91_ADC_START (1 << 1) /* Start Conversion */ - -#define AT91_ADC_MR 0x04 /* Mode Register */ -#define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */ -#define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */ -#define AT91_ADC_TRGSEL_TC0 (0 << 1) -#define AT91_ADC_TRGSEL_TC1 (1 << 1) -#define AT91_ADC_TRGSEL_TC2 (2 << 1) -#define AT91_ADC_TRGSEL_EXTERNAL (6 << 1) -#define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */ -#define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */ -#define AT91_ADC_PRESCAL (0x3f << 8) /* Prescalar Rate Selection */ -#define AT91_ADC_PRESCAL_(x) ((x) << 8) -#define AT91_ADC_STARTUP (0x1f << 16) /* Startup Up Time */ -#define AT91_ADC_STARTUP_(x) ((x) << 16) -#define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */ -#define AT91_ADC_SHTIM_(x) ((x) << 24) - -#define AT91_ADC_CHER 0x10 /* Channel Enable Register */ -#define AT91_ADC_CHDR 0x14 /* Channel Disable Register */ -#define AT91_ADC_CHSR 0x18 /* Channel Status Register */ -#define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */ - -#define AT91_ADC_SR 0x1C /* Status Register */ -#define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */ -#define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */ -#define AT91_ADC_DRDY (1 << 16) /* Data Ready */ -#define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */ -#define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */ -#define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */ - -#define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */ -#define AT91_ADC_LDATA (0x3ff) - -#define AT91_ADC_IER 0x24 /* Interrupt Enable Register */ -#define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */ -#define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */ - -#define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */ -#define AT91_ADC_DATA (0x3ff) - -#endif diff --git a/include/asm-arm/arch-at91/at91_aic.h b/include/asm-arm/arch-at91/at91_aic.h deleted file mode 100644 index df44c12..0000000 --- a/include/asm-arm/arch-at91/at91_aic.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_aic.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Advanced Interrupt Controller (AIC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_AIC_H -#define AT91_AIC_H - -#define AT91_AIC_SMR(n) (AT91_AIC + ((n) * 4)) /* Source Mode Registers 0-31 */ -#define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ -#define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ -#define AT91_AIC_SRCTYPE_LOW (0 << 5) -#define AT91_AIC_SRCTYPE_FALLING (1 << 5) -#define AT91_AIC_SRCTYPE_HIGH (2 << 5) -#define AT91_AIC_SRCTYPE_RISING (3 << 5) - -#define AT91_AIC_SVR(n) (AT91_AIC + 0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -#define AT91_AIC_IVR (AT91_AIC + 0x100) /* Interrupt Vector Register */ -#define AT91_AIC_FVR (AT91_AIC + 0x104) /* Fast Interrupt Vector Register */ -#define AT91_AIC_ISR (AT91_AIC + 0x108) /* Interrupt Status Register */ -#define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ - -#define AT91_AIC_IPR (AT91_AIC + 0x10c) /* Interrupt Pending Register */ -#define AT91_AIC_IMR (AT91_AIC + 0x110) /* Interrupt Mask Register */ -#define AT91_AIC_CISR (AT91_AIC + 0x114) /* Core Interrupt Status Register */ -#define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ -#define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ - -#define AT91_AIC_IECR (AT91_AIC + 0x120) /* Interrupt Enable Command Register */ -#define AT91_AIC_IDCR (AT91_AIC + 0x124) /* Interrupt Disable Command Register */ -#define AT91_AIC_ICCR (AT91_AIC + 0x128) /* Interrupt Clear Command Register */ -#define AT91_AIC_ISCR (AT91_AIC + 0x12c) /* Interrupt Set Command Register */ -#define AT91_AIC_EOICR (AT91_AIC + 0x130) /* End of Interrupt Command Register */ -#define AT91_AIC_SPU (AT91_AIC + 0x134) /* Spurious Interrupt Vector Register */ -#define AT91_AIC_DCR (AT91_AIC + 0x138) /* Debug Control Register */ -#define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ -#define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ - -#define AT91_AIC_FFER (AT91_AIC + 0x140) /* Fast Forcing Enable Register [SAM9 only] */ -#define AT91_AIC_FFDR (AT91_AIC + 0x144) /* Fast Forcing Disable Register [SAM9 only] */ -#define AT91_AIC_FFSR (AT91_AIC + 0x148) /* Fast Forcing Status Register [SAM9 only] */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h deleted file mode 100644 index 8019ffd..0000000 --- a/include/asm-arm/arch-at91/at91_dbgu.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_dbgu.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Debug Unit (DBGU) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_DBGU_H -#define AT91_DBGU_H - -#ifdef AT91_DBGU -#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ -#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ -#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ -#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ -#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ -#define AT91_DBGU_IDR (AT91_DBGU + 0x0c) /* Interrupt Disable Register */ -#define AT91_DBGU_IMR (AT91_DBGU + 0x10) /* Interrupt Mask Register */ -#define AT91_DBGU_SR (AT91_DBGU + 0x14) /* Status Register */ -#define AT91_DBGU_RHR (AT91_DBGU + 0x18) /* Receiver Holding Register */ -#define AT91_DBGU_THR (AT91_DBGU + 0x1c) /* Transmitter Holding Register */ -#define AT91_DBGU_BRGR (AT91_DBGU + 0x20) /* Baud Rate Generator Register */ - -#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ -#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ -#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ -#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ - -#endif /* AT91_DBGU */ - -/* - * Some AT91 parts that don't have full DEBUG units still support the ID - * and extensions register. - */ -#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ -#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ -#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ -#define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */ -#define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */ -#define AT91_CIDR_SRAMSIZ_1K (1 << 16) -#define AT91_CIDR_SRAMSIZ_2K (2 << 16) -#define AT91_CIDR_SRAMSIZ_112K (4 << 16) -#define AT91_CIDR_SRAMSIZ_4K (5 << 16) -#define AT91_CIDR_SRAMSIZ_80K (6 << 16) -#define AT91_CIDR_SRAMSIZ_160K (7 << 16) -#define AT91_CIDR_SRAMSIZ_8K (8 << 16) -#define AT91_CIDR_SRAMSIZ_16K (9 << 16) -#define AT91_CIDR_SRAMSIZ_32K (10 << 16) -#define AT91_CIDR_SRAMSIZ_64K (11 << 16) -#define AT91_CIDR_SRAMSIZ_128K (12 << 16) -#define AT91_CIDR_SRAMSIZ_256K (13 << 16) -#define AT91_CIDR_SRAMSIZ_96K (14 << 16) -#define AT91_CIDR_SRAMSIZ_512K (15 << 16) -#define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */ -#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ -#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h deleted file mode 100644 index 400ec10..0000000 --- a/include/asm-arm/arch-at91/at91_mci.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_mci.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * MultiMedia Card Interface (MCI) registers. - * Based on AT91RM9200 datasheet revision F. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_MCI_H -#define AT91_MCI_H - -#define AT91_MCI_CR 0x00 /* Control Register */ -#define AT91_MCI_MCIEN (1 << 0) /* Multi-Media Interface Enable */ -#define AT91_MCI_MCIDIS (1 << 1) /* Multi-Media Interface Disable */ -#define AT91_MCI_PWSEN (1 << 2) /* Power Save Mode Enable */ -#define AT91_MCI_PWSDIS (1 << 3) /* Power Save Mode Disable */ -#define AT91_MCI_SWRST (1 << 7) /* Software Reset */ - -#define AT91_MCI_MR 0x04 /* Mode Register */ -#define AT91_MCI_CLKDIV (0xff << 0) /* Clock Divider */ -#define AT91_MCI_PWSDIV (7 << 8) /* Power Saving Divider */ -#define AT91_MCI_RDPROOF (1 << 11) /* Read Proof Enable [SAM926[03] only] */ -#define AT91_MCI_WRPROOF (1 << 12) /* Write Proof Enable [SAM926[03] only] */ -#define AT91_MCI_PDCFBYTE (1 << 13) /* PDC Force Byte Transfer [SAM926[03] only] */ -#define AT91_MCI_PDCPADV (1 << 14) /* PDC Padding Value */ -#define AT91_MCI_PDCMODE (1 << 15) /* PDC-orientated Mode */ -#define AT91_MCI_BLKLEN (0xfff << 18) /* Data Block Length */ - -#define AT91_MCI_DTOR 0x08 /* Data Timeout Register */ -#define AT91_MCI_DTOCYC (0xf << 0) /* Data Timeout Cycle Number */ -#define AT91_MCI_DTOMUL (7 << 4) /* Data Timeout Multiplier */ -#define AT91_MCI_DTOMUL_1 (0 << 4) -#define AT91_MCI_DTOMUL_16 (1 << 4) -#define AT91_MCI_DTOMUL_128 (2 << 4) -#define AT91_MCI_DTOMUL_256 (3 << 4) -#define AT91_MCI_DTOMUL_1K (4 << 4) -#define AT91_MCI_DTOMUL_4K (5 << 4) -#define AT91_MCI_DTOMUL_64K (6 << 4) -#define AT91_MCI_DTOMUL_1M (7 << 4) - -#define AT91_MCI_SDCR 0x0c /* SD Card Register */ -#define AT91_MCI_SDCSEL (3 << 0) /* SD Card Selector */ -#define AT91_MCI_SDCBUS (1 << 7) /* 1-bit or 4-bit bus */ - -#define AT91_MCI_ARGR 0x10 /* Argument Register */ - -#define AT91_MCI_CMDR 0x14 /* Command Register */ -#define AT91_MCI_CMDNB (0x3f << 0) /* Command Number */ -#define AT91_MCI_RSPTYP (3 << 6) /* Response Type */ -#define AT91_MCI_RSPTYP_NONE (0 << 6) -#define AT91_MCI_RSPTYP_48 (1 << 6) -#define AT91_MCI_RSPTYP_136 (2 << 6) -#define AT91_MCI_SPCMD (7 << 8) /* Special Command */ -#define AT91_MCI_SPCMD_NONE (0 << 8) -#define AT91_MCI_SPCMD_INIT (1 << 8) -#define AT91_MCI_SPCMD_SYNC (2 << 8) -#define AT91_MCI_SPCMD_ICMD (4 << 8) -#define AT91_MCI_SPCMD_IRESP (5 << 8) -#define AT91_MCI_OPDCMD (1 << 11) /* Open Drain Command */ -#define AT91_MCI_MAXLAT (1 << 12) /* Max Latency for Command to Response */ -#define AT91_MCI_TRCMD (3 << 16) /* Transfer Command */ -#define AT91_MCI_TRCMD_NONE (0 << 16) -#define AT91_MCI_TRCMD_START (1 << 16) -#define AT91_MCI_TRCMD_STOP (2 << 16) -#define AT91_MCI_TRDIR (1 << 18) /* Transfer Direction */ -#define AT91_MCI_TRTYP (3 << 19) /* Transfer Type */ -#define AT91_MCI_TRTYP_BLOCK (0 << 19) -#define AT91_MCI_TRTYP_MULTIPLE (1 << 19) -#define AT91_MCI_TRTYP_STREAM (2 << 19) - -#define AT91_MCI_BLKR 0x18 /* Block Register */ -#define AT91_MCI_BLKR_BCNT(n) ((0xffff & (n)) << 0) /* Block count */ -#define AT91_MCI_BLKR_BLKLEN(n) ((0xffff & (n)) << 16) /* Block lenght */ - -#define AT91_MCI_RSPR(n) (0x20 + ((n) * 4)) /* Response Registers 0-3 */ -#define AT91_MCR_RDR 0x30 /* Receive Data Register */ -#define AT91_MCR_TDR 0x34 /* Transmit Data Register */ - -#define AT91_MCI_SR 0x40 /* Status Register */ -#define AT91_MCI_CMDRDY (1 << 0) /* Command Ready */ -#define AT91_MCI_RXRDY (1 << 1) /* Receiver Ready */ -#define AT91_MCI_TXRDY (1 << 2) /* Transmit Ready */ -#define AT91_MCI_BLKE (1 << 3) /* Data Block Ended */ -#define AT91_MCI_DTIP (1 << 4) /* Data Transfer in Progress */ -#define AT91_MCI_NOTBUSY (1 << 5) /* Data Not Busy */ -#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ -#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ -#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */ -#define AT91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B */ -#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ -#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ -#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ -#define AT91_MCI_RDIRE (1 << 17) /* Response Direction Error */ -#define AT91_MCI_RCRCE (1 << 18) /* Response CRC Error */ -#define AT91_MCI_RENDE (1 << 19) /* Response End Bit Error */ -#define AT91_MCI_RTOE (1 << 20) /* Reponse Time-out Error */ -#define AT91_MCI_DCRCE (1 << 21) /* Data CRC Error */ -#define AT91_MCI_DTOE (1 << 22) /* Data Time-out Error */ -#define AT91_MCI_OVRE (1 << 30) /* Overrun */ -#define AT91_MCI_UNRE (1 << 31) /* Underrun */ - -#define AT91_MCI_IER 0x44 /* Interrupt Enable Register */ -#define AT91_MCI_IDR 0x48 /* Interrupt Disable Register */ -#define AT91_MCI_IMR 0x4c /* Interrupt Mask Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_pio.h b/include/asm-arm/arch-at91/at91_pio.h deleted file mode 100644 index 84c3866..0000000 --- a/include/asm-arm/arch-at91/at91_pio.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_pio.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_pit.h b/include/asm-arm/arch-at91/at91_pit.h deleted file mode 100644 index 5026325..0000000 --- a/include/asm-arm/arch-at91/at91_pit.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_pit.h - * - * Periodic Interval Timer (PIT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIT_H -#define AT91_PIT_H - -#define AT91_PIT_MR (AT91_PIT + 0x00) /* Mode Register */ -#define AT91_PIT_PITIEN (1 << 25) /* Timer Interrupt Enable */ -#define AT91_PIT_PITEN (1 << 24) /* Timer Enabled */ -#define AT91_PIT_PIV (0xfffff) /* Periodic Interval Value */ - -#define AT91_PIT_SR (AT91_PIT + 0x04) /* Status Register */ -#define AT91_PIT_PITS (1 << 0) /* Timer Status */ - -#define AT91_PIT_PIVR (AT91_PIT + 0x08) /* Periodic Interval Value Register */ -#define AT91_PIT_PIIR (AT91_PIT + 0x0c) /* Periodic Interval Image Register */ -#define AT91_PIT_PICNT (0xfff << 20) /* Interval Counter */ -#define AT91_PIT_CPIV (0xfffff) /* Inverval Value */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_pmc.h b/include/asm-arm/arch-at91/at91_pmc.h deleted file mode 100644 index 2001e81..0000000 --- a/include/asm-arm/arch-at91/at91_pmc.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_pmc.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Power Management Controller (PMC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PMC_H -#define AT91_PMC_H - -#define AT91_PMC_SCER (AT91_PMC + 0x00) /* System Clock Enable Register */ -#define AT91_PMC_SCDR (AT91_PMC + 0x04) /* System Clock Disable Register */ - -#define AT91_PMC_SCSR (AT91_PMC + 0x08) /* System Clock Status Register */ -#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ -#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ -#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91CAP9_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91CAP9 only] */ -#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ -#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ -#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ - -#define AT91_PMC_PCER (AT91_PMC + 0x10) /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ - -#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL, CAP9] */ -#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ -#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ -#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ -#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI PLL Start-up Time */ - -#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [SAM9x, CAP9] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ - -#define AT91_CKGR_MCFR (AT91_PMC + 0x24) /* Main Clock Frequency Register */ -#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ - -#define AT91_CKGR_PLLAR (AT91_PMC + 0x28) /* PLL A Register */ -#define AT91_CKGR_PLLBR (AT91_PMC + 0x2c) /* PLL B Register */ -#define AT91_PMC_DIV (0xff << 0) /* Divider */ -#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ -#define AT91_PMC_USBDIV_1 (0 << 28) -#define AT91_PMC_USBDIV_2 (1 << 28) -#define AT91_PMC_USBDIV_4 (2 << 28) -#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ - -#define AT91_PMC_MCKR (AT91_PMC + 0x30) /* Master Clock Register */ -#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -#define AT91_PMC_CSS_SLOW (0 << 0) -#define AT91_PMC_CSS_MAIN (1 << 0) -#define AT91_PMC_CSS_PLLA (2 << 0) -#define AT91_PMC_CSS_PLLB (3 << 0) -#define AT91_PMC_PRES (7 << 2) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << 2) -#define AT91_PMC_PRES_2 (1 << 2) -#define AT91_PMC_PRES_4 (2 << 2) -#define AT91_PMC_PRES_8 (3 << 2) -#define AT91_PMC_PRES_16 (4 << 2) -#define AT91_PMC_PRES_32 (5 << 2) -#define AT91_PMC_PRES_64 (6 << 2) -#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ -#define AT91RM9200_PMC_MDIV_2 (1 << 8) -#define AT91RM9200_PMC_MDIV_3 (2 << 8) -#define AT91RM9200_PMC_MDIV_4 (3 << 8) -#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9,CAP9 only] */ -#define AT91SAM9_PMC_MDIV_2 (1 << 8) -#define AT91SAM9_PMC_MDIV_4 (2 << 8) -#define AT91SAM9_PMC_MDIV_6 (3 << 8) -#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */ -#define AT91_PMC_PDIV_1 (0 << 12) -#define AT91_PMC_PDIV_2 (1 << 12) - -#define AT91_PMC_PCKR(n) (AT91_PMC + 0x40 + ((n) * 4)) /* Programmable Clock 0-3 Registers */ - -#define AT91_PMC_IER (AT91_PMC + 0x60) /* Interrupt Enable Register */ -#define AT91_PMC_IDR (AT91_PMC + 0x64) /* Interrupt Disable Register */ -#define AT91_PMC_SR (AT91_PMC + 0x68) /* Status Register */ -#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [AT91CAP9 only] */ -#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_IMR (AT91_PMC + 0x6c) /* Interrupt Mask Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_rstc.h b/include/asm-arm/arch-at91/at91_rstc.h deleted file mode 100644 index fb8d161..0000000 --- a/include/asm-arm/arch-at91/at91_rstc.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_rstc.h - * - * Reset Controller (RSTC) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RSTC_H -#define AT91_RSTC_H - -#define AT91_RSTC_CR (AT91_RSTC + 0x00) /* Reset Controller Control Register */ -#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ -#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ -#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ -#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */ - -#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ -#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ -#define AT91_RSTC_RSTTYP (7 << 8) /* Reset Type */ -#define AT91_RSTC_RSTTYP_GENERAL (0 << 8) -#define AT91_RSTC_RSTTYP_WAKEUP (1 << 8) -#define AT91_RSTC_RSTTYP_WATCHDOG (2 << 8) -#define AT91_RSTC_RSTTYP_SOFTWARE (3 << 8) -#define AT91_RSTC_RSTTYP_USER (4 << 8) -#define AT91_RSTC_NRSTL (1 << 16) /* NRST Pin Level */ -#define AT91_RSTC_SRCMP (1 << 17) /* Software Reset Command in Progress */ - -#define AT91_RSTC_MR (AT91_RSTC + 0x08) /* Reset Controller Mode Register */ -#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ -#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ -#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_rtc.h b/include/asm-arm/arch-at91/at91_rtc.h deleted file mode 100644 index af9bd28..0000000 --- a/include/asm-arm/arch-at91/at91_rtc.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_rtc.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Real Time Clock (RTC) - System peripheral registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTC_H -#define AT91_RTC_H - -#define AT91_RTC_CR (AT91_RTC + 0x00) /* Control Register */ -#define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time Register */ -#define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar Register */ -#define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ -#define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) -#define AT91_RTC_TIMEVSEL_HOUR (1 << 8) -#define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) -#define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) -#define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ -#define AT91_RTC_CALEVSEL_WEEK (0 << 16) -#define AT91_RTC_CALEVSEL_MONTH (1 << 16) -#define AT91_RTC_CALEVSEL_YEAR (2 << 16) - -#define AT91_RTC_MR (AT91_RTC + 0x04) /* Mode Register */ -#define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ - -#define AT91_RTC_TIMR (AT91_RTC + 0x08) /* Time Register */ -#define AT91_RTC_SEC (0x7f << 0) /* Current Second */ -#define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ -#define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ -#define AT91_RTC_AMPM (1 << 22) /* Ante Meridiem Post Meridiem Indicator */ - -#define AT91_RTC_CALR (AT91_RTC + 0x0c) /* Calendar Register */ -#define AT91_RTC_CENT (0x7f << 0) /* Current Century */ -#define AT91_RTC_YEAR (0xff << 8) /* Current Year */ -#define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ -#define AT91_RTC_DAY (7 << 21) /* Current Day */ -#define AT91_RTC_DATE (0x3f << 24) /* Current Date */ - -#define AT91_RTC_TIMALR (AT91_RTC + 0x10) /* Time Alarm Register */ -#define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enable */ -#define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enable */ -#define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ - -#define AT91_RTC_CALALR (AT91_RTC + 0x14) /* Calendar Alarm Register */ -#define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ -#define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ - -#define AT91_RTC_SR (AT91_RTC + 0x18) /* Status Register */ -#define AT91_RTC_ACKUPD (1 << 0) /* Acknowledge for Update */ -#define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ -#define AT91_RTC_SECEV (1 << 2) /* Second Event */ -#define AT91_RTC_TIMEV (1 << 3) /* Time Event */ -#define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ - -#define AT91_RTC_SCCR (AT91_RTC + 0x1c) /* Status Clear Command Register */ -#define AT91_RTC_IER (AT91_RTC + 0x20) /* Interrupt Enable Register */ -#define AT91_RTC_IDR (AT91_RTC + 0x24) /* Interrupt Disable Register */ -#define AT91_RTC_IMR (AT91_RTC + 0x28) /* Interrupt Mask Register */ - -#define AT91_RTC_VER (AT91_RTC + 0x2c) /* Valid Entry Register */ -#define AT91_RTC_NVTIM (1 << 0) /* Non valid Time */ -#define AT91_RTC_NVCAL (1 << 1) /* Non valid Calendar */ -#define AT91_RTC_NVTIMALR (1 << 2) /* Non valid Time Alarm */ -#define AT91_RTC_NVCALALR (1 << 3) /* Non valid Calendar Alarm */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_rtt.h b/include/asm-arm/arch-at91/at91_rtt.h deleted file mode 100644 index 39a3263..0000000 --- a/include/asm-arm/arch-at91/at91_rtt.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_rtt.h - * - * Real-time Timer (RTT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#define AT91_RTT_MR 0x00 /* Real-time Mode Register */ -#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ - -#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ -#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ - -#define AT91_RTT_VR 0x08 /* Real-time Value Register */ -#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ - -#define AT91_RTT_SR 0x0c /* Real-time Status Register */ -#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_shdwc.h b/include/asm-arm/arch-at91/at91_shdwc.h deleted file mode 100644 index 581fa41..0000000 --- a/include/asm-arm/arch-at91/at91_shdwc.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_shdwc.h - * - * Shutdown Controller (SHDWC) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SHDWC_H -#define AT91_SHDWC_H - -#define AT91_SHDW_CR (AT91_SHDWC + 0x00) /* Shut Down Control Register */ -#define AT91_SHDW_SHDW (1 << 0) /* Shut Down command */ -#define AT91_SHDW_KEY (0xa5 << 24) /* KEY Password */ - -#define AT91_SHDW_MR (AT91_SHDWC + 0x04) /* Shut Down Mode Register */ -#define AT91_SHDW_WKMODE0 (3 << 0) /* Wake-up 0 Mode Selection */ -#define AT91_SHDW_WKMODE0_NONE 0 -#define AT91_SHDW_WKMODE0_HIGH 1 -#define AT91_SHDW_WKMODE0_LOW 2 -#define AT91_SHDW_WKMODE0_ANYLEVEL 3 -#define AT91_SHDW_CPTWK0 (0xf << 4) /* Counter On Wake Up 0 */ -#define AT91_SHDW_CPTWK0_(x) ((x) << 4) -#define AT91_SHDW_RTTWKEN (1 << 16) /* Real Time Timer Wake-up Enable */ - -#define AT91_SHDW_SR (AT91_SHDWC + 0x08) /* Shut Down Status Register */ -#define AT91_SHDW_WAKEUP0 (1 << 0) /* Wake-up 0 Status */ -#define AT91_SHDW_RTTWK (1 << 16) /* Real-time Timer Wake-up */ -#define AT91_SHDW_RTCWK (1 << 17) /* Real-time Clock Wake-up [SAM9RL] */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_spi.h b/include/asm-arm/arch-at91/at91_spi.h deleted file mode 100644 index f9b9a84..0000000 --- a/include/asm-arm/arch-at91/at91_spi.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_spi.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Serial Peripheral Interface (SPI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SPI_H -#define AT91_SPI_H - -#define AT91_SPI_CR 0x00 /* Control Register */ -#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ -#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ -#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_MR 0x04 /* Mode Register */ -#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ -#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ -#define AT91_SPI_PS_FIXED (0 << 1) -#define AT91_SPI_PS_VARIABLE (1 << 1) -#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ -#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ -#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ -#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ - -#define AT91_SPI_RDR 0x08 /* Receive Data Register */ -#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ - -#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ -#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ -#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ -#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ - -#define AT91_SPI_SR 0x10 /* Status Register */ -#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ -#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ -#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ -#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ -#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ -#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ -#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ -#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ -#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ -#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ -#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ - -#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ -#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ -#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ - -#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ -#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ -#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ -#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ -#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ -#define AT91_SPI_BITS_8 (0 << 4) -#define AT91_SPI_BITS_9 (1 << 4) -#define AT91_SPI_BITS_10 (2 << 4) -#define AT91_SPI_BITS_11 (3 << 4) -#define AT91_SPI_BITS_12 (4 << 4) -#define AT91_SPI_BITS_13 (5 << 4) -#define AT91_SPI_BITS_14 (6 << 4) -#define AT91_SPI_BITS_15 (7 << 4) -#define AT91_SPI_BITS_16 (8 << 4) -#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ -#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ -#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_ssc.h b/include/asm-arm/arch-at91/at91_ssc.h deleted file mode 100644 index 0ecc734..0000000 --- a/include/asm-arm/arch-at91/at91_ssc.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_ssc.h - * - * Copyright (C) SAN People - * - * Serial Synchronous Controller (SSC) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_SSC_H -#define AT91_SSC_H - -#define AT91_SSC_CR 0x00 /* Control Register */ -#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ -#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ -#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ -#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ -#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ - -#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ -#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ - -#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ -#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ -#define AT91_SSC_CKS_DIV (0 << 0) -#define AT91_SSC_CKS_CLOCK (1 << 0) -#define AT91_SSC_CKS_PIN (2 << 0) -#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ -#define AT91_SSC_CKO_NONE (0 << 2) -#define AT91_SSC_CKO_CONTINUOUS (1 << 2) -#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ -#define AT91_SSC_CKI_FALLING (0 << 5) -#define AT91_SSC_CK_RISING (1 << 5) -#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ -#define AT91_SSC_CKG_NONE (0 << 6) -#define AT91_SSC_CKG_RFLOW (1 << 6) -#define AT91_SSC_CKG_RFHIGH (2 << 6) -#define AT91_SSC_START (0xf << 8) /* Start Selection */ -#define AT91_SSC_START_CONTINUOUS (0 << 8) -#define AT91_SSC_START_TX_RX (1 << 8) -#define AT91_SSC_START_LOW_RF (2 << 8) -#define AT91_SSC_START_HIGH_RF (3 << 8) -#define AT91_SSC_START_FALLING_RF (4 << 8) -#define AT91_SSC_START_RISING_RF (5 << 8) -#define AT91_SSC_START_LEVEL_RF (6 << 8) -#define AT91_SSC_START_EDGE_RF (7 << 8) -#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ -#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ -#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ - -#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ -#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ -#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ -#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ -#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ -#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ -#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ -#define AT91_SSC_FSOS_NONE (0 << 20) -#define AT91_SSC_FSOS_NEGATIVE (1 << 20) -#define AT91_SSC_FSOS_POSITIVE (2 << 20) -#define AT91_SSC_FSOS_LOW (3 << 20) -#define AT91_SSC_FSOS_HIGH (4 << 20) -#define AT91_SSC_FSOS_TOGGLE (5 << 20) -#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ -#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) -#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) - -#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ -#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ -#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ -#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ - -#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ -#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ -#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ -#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ - -#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ -#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ - -#define AT91_SSC_SR 0x40 /* Status Register */ -#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ -#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ -#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ -#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ -#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ -#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ -#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ -#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ -#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ -#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ -#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ -#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ -#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ -#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ - -#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ -#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ -#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_st.h b/include/asm-arm/arch-at91/at91_st.h deleted file mode 100644 index 30446e2e..0000000 --- a/include/asm-arm/arch-at91/at91_st.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_st.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * System Timer (ST) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_ST_H -#define AT91_ST_H - -#define AT91_ST_CR (AT91_ST + 0x00) /* Control Register */ -#define AT91_ST_WDRST (1 << 0) /* Watchdog Timer Restart */ - -#define AT91_ST_PIMR (AT91_ST + 0x04) /* Period Interval Mode Register */ -#define AT91_ST_PIV (0xffff << 0) /* Period Interval Value */ - -#define AT91_ST_WDMR (AT91_ST + 0x08) /* Watchdog Mode Register */ -#define AT91_ST_WDV (0xffff << 0) /* Watchdog Counter Value */ -#define AT91_ST_RSTEN (1 << 16) /* Reset Enable */ -#define AT91_ST_EXTEN (1 << 17) /* External Signal Assertion Enable */ - -#define AT91_ST_RTMR (AT91_ST + 0x0c) /* Real-time Mode Register */ -#define AT91_ST_RTPRES (0xffff << 0) /* Real-time Prescalar Value */ - -#define AT91_ST_SR (AT91_ST + 0x10) /* Status Register */ -#define AT91_ST_PITS (1 << 0) /* Period Interval Timer Status */ -#define AT91_ST_WDOVF (1 << 1) /* Watchdog Overflow */ -#define AT91_ST_RTTINC (1 << 2) /* Real-time Timer Increment */ -#define AT91_ST_ALMS (1 << 3) /* Alarm Status */ - -#define AT91_ST_IER (AT91_ST + 0x14) /* Interrupt Enable Register */ -#define AT91_ST_IDR (AT91_ST + 0x18) /* Interrupt Disable Register */ -#define AT91_ST_IMR (AT91_ST + 0x1c) /* Interrupt Mask Register */ - -#define AT91_ST_RTAR (AT91_ST + 0x20) /* Real-time Alarm Register */ -#define AT91_ST_ALMV (0xfffff << 0) /* Alarm Value */ - -#define AT91_ST_CRTR (AT91_ST + 0x24) /* Current Real-time Register */ -#define AT91_ST_CRTV (0xfffff << 0) /* Current Real-Time Value */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_tc.h b/include/asm-arm/arch-at91/at91_tc.h deleted file mode 100644 index b85d3fa..0000000 --- a/include/asm-arm/arch-at91/at91_tc.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_tc.h - * - * Copyright (C) SAN People - * - * Timer/Counter Unit (TC) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_TC_H -#define AT91_TC_H - -#define AT91_TC_BCR 0xc0 /* TC Block Control Register */ -#define AT91_TC_SYNC (1 << 0) /* Synchro Command */ - -#define AT91_TC_BMR 0xc4 /* TC Block Mode Register */ -#define AT91_TC_TC0XC0S (3 << 0) /* External Clock Signal 0 Selection */ -#define AT91_TC_TC0XC0S_TCLK0 (0 << 0) -#define AT91_TC_TC0XC0S_NONE (1 << 0) -#define AT91_TC_TC0XC0S_TIOA1 (2 << 0) -#define AT91_TC_TC0XC0S_TIOA2 (3 << 0) -#define AT91_TC_TC1XC1S (3 << 2) /* External Clock Signal 1 Selection */ -#define AT91_TC_TC1XC1S_TCLK1 (0 << 2) -#define AT91_TC_TC1XC1S_NONE (1 << 2) -#define AT91_TC_TC1XC1S_TIOA0 (2 << 2) -#define AT91_TC_TC1XC1S_TIOA2 (3 << 2) -#define AT91_TC_TC2XC2S (3 << 4) /* External Clock Signal 2 Selection */ -#define AT91_TC_TC2XC2S_TCLK2 (0 << 4) -#define AT91_TC_TC2XC2S_NONE (1 << 4) -#define AT91_TC_TC2XC2S_TIOA0 (2 << 4) -#define AT91_TC_TC2XC2S_TIOA1 (3 << 4) - - -#define AT91_TC_CCR 0x00 /* Channel Control Register */ -#define AT91_TC_CLKEN (1 << 0) /* Counter Clock Enable Command */ -#define AT91_TC_CLKDIS (1 << 1) /* Counter CLock Disable Command */ -#define AT91_TC_SWTRG (1 << 2) /* Software Trigger Command */ - -#define AT91_TC_CMR 0x04 /* Channel Mode Register */ -#define AT91_TC_TCCLKS (7 << 0) /* Capture/Waveform Mode: Clock Selection */ -#define AT91_TC_TIMER_CLOCK1 (0 << 0) -#define AT91_TC_TIMER_CLOCK2 (1 << 0) -#define AT91_TC_TIMER_CLOCK3 (2 << 0) -#define AT91_TC_TIMER_CLOCK4 (3 << 0) -#define AT91_TC_TIMER_CLOCK5 (4 << 0) -#define AT91_TC_XC0 (5 << 0) -#define AT91_TC_XC1 (6 << 0) -#define AT91_TC_XC2 (7 << 0) -#define AT91_TC_CLKI (1 << 3) /* Capture/Waveform Mode: Clock Invert */ -#define AT91_TC_BURST (3 << 4) /* Capture/Waveform Mode: Burst Signal Selection */ -#define AT91_TC_LDBSTOP (1 << 6) /* Capture Mode: Counter Clock Stopped with TB Loading */ -#define AT91_TC_LDBDIS (1 << 7) /* Capture Mode: Counter Clock Disable with RB Loading */ -#define AT91_TC_ETRGEDG (3 << 8) /* Capture Mode: External Trigger Edge Selection */ -#define AT91_TC_ABETRG (1 << 10) /* Capture Mode: TIOA or TIOB External Trigger Selection */ -#define AT91_TC_CPCTRG (1 << 14) /* Capture Mode: RC Compare Trigger Enable */ -#define AT91_TC_WAVE (1 << 15) /* Capture/Waveform mode */ -#define AT91_TC_LDRA (3 << 16) /* Capture Mode: RA Loading Selection */ -#define AT91_TC_LDRB (3 << 18) /* Capture Mode: RB Loading Selection */ - -#define AT91_TC_CPCSTOP (1 << 6) /* Waveform Mode: Counter Clock Stopped with RC Compare */ -#define AT91_TC_CPCDIS (1 << 7) /* Waveform Mode: Counter Clock Disable with RC Compare */ -#define AT91_TC_EEVTEDG (3 << 8) /* Waveform Mode: External Event Edge Selection */ -#define AT91_TC_EEVTEDG_NONE (0 << 8) -#define AT91_TC_EEVTEDG_RISING (1 << 8) -#define AT91_TC_EEVTEDG_FALLING (2 << 8) -#define AT91_TC_EEVTEDG_BOTH (3 << 8) -#define AT91_TC_EEVT (3 << 10) /* Waveform Mode: External Event Selection */ -#define AT91_TC_EEVT_TIOB (0 << 10) -#define AT91_TC_EEVT_XC0 (1 << 10) -#define AT91_TC_EEVT_XC1 (2 << 10) -#define AT91_TC_EEVT_XC2 (3 << 10) -#define AT91_TC_ENETRG (1 << 12) /* Waveform Mode: External Event Trigger Enable */ -#define AT91_TC_WAVESEL (3 << 13) /* Waveform Mode: Waveform Selection */ -#define AT91_TC_WAVESEL_UP (0 << 13) -#define AT91_TC_WAVESEL_UP_AUTO (2 << 13) -#define AT91_TC_WAVESEL_UPDOWN (1 << 13) -#define AT91_TC_WAVESEL_UPDOWN_AUTO (3 << 13) -#define AT91_TC_ACPA (3 << 16) /* Waveform Mode: RA Compare Effect on TIOA */ -#define AT91_TC_ACPA_NONE (0 << 16) -#define AT91_TC_ACPA_SET (1 << 16) -#define AT91_TC_ACPA_CLEAR (2 << 16) -#define AT91_TC_ACPA_TOGGLE (3 << 16) -#define AT91_TC_ACPC (3 << 18) /* Waveform Mode: RC Compre Effect on TIOA */ -#define AT91_TC_ACPC_NONE (0 << 18) -#define AT91_TC_ACPC_SET (1 << 18) -#define AT91_TC_ACPC_CLEAR (2 << 18) -#define AT91_TC_ACPC_TOGGLE (3 << 18) -#define AT91_TC_AEEVT (3 << 20) /* Waveform Mode: External Event Effect on TIOA */ -#define AT91_TC_AEEVT_NONE (0 << 20) -#define AT91_TC_AEEVT_SET (1 << 20) -#define AT91_TC_AEEVT_CLEAR (2 << 20) -#define AT91_TC_AEEVT_TOGGLE (3 << 20) -#define AT91_TC_ASWTRG (3 << 22) /* Waveform Mode: Software Trigger Effect on TIOA */ -#define AT91_TC_ASWTRG_NONE (0 << 22) -#define AT91_TC_ASWTRG_SET (1 << 22) -#define AT91_TC_ASWTRG_CLEAR (2 << 22) -#define AT91_TC_ASWTRG_TOGGLE (3 << 22) -#define AT91_TC_BCPB (3 << 24) /* Waveform Mode: RB Compare Effect on TIOB */ -#define AT91_TC_BCPB_NONE (0 << 24) -#define AT91_TC_BCPB_SET (1 << 24) -#define AT91_TC_BCPB_CLEAR (2 << 24) -#define AT91_TC_BCPB_TOGGLE (3 << 24) -#define AT91_TC_BCPC (3 << 26) /* Waveform Mode: RC Compare Effect on TIOB */ -#define AT91_TC_BCPC_NONE (0 << 26) -#define AT91_TC_BCPC_SET (1 << 26) -#define AT91_TC_BCPC_CLEAR (2 << 26) -#define AT91_TC_BCPC_TOGGLE (3 << 26) -#define AT91_TC_BEEVT (3 << 28) /* Waveform Mode: External Event Effect on TIOB */ -#define AT91_TC_BEEVT_NONE (0 << 28) -#define AT91_TC_BEEVT_SET (1 << 28) -#define AT91_TC_BEEVT_CLEAR (2 << 28) -#define AT91_TC_BEEVT_TOGGLE (3 << 28) -#define AT91_TC_BSWTRG (3 << 30) /* Waveform Mode: Software Trigger Effect on TIOB */ -#define AT91_TC_BSWTRG_NONE (0 << 30) -#define AT91_TC_BSWTRG_SET (1 << 30) -#define AT91_TC_BSWTRG_CLEAR (2 << 30) -#define AT91_TC_BSWTRG_TOGGLE (3 << 30) - -#define AT91_TC_CV 0x10 /* Counter Value */ -#define AT91_TC_RA 0x14 /* Register A */ -#define AT91_TC_RB 0x18 /* Register B */ -#define AT91_TC_RC 0x1c /* Register C */ - -#define AT91_TC_SR 0x20 /* Status Register */ -#define AT91_TC_COVFS (1 << 0) /* Counter Overflow Status */ -#define AT91_TC_LOVRS (1 << 1) /* Load Overrun Status */ -#define AT91_TC_CPAS (1 << 2) /* RA Compare Status */ -#define AT91_TC_CPBS (1 << 3) /* RB Compare Status */ -#define AT91_TC_CPCS (1 << 4) /* RC Compare Status */ -#define AT91_TC_LDRAS (1 << 5) /* RA Loading Status */ -#define AT91_TC_LDRBS (1 << 6) /* RB Loading Status */ -#define AT91_TC_ETRGS (1 << 7) /* External Trigger Status */ -#define AT91_TC_CLKSTA (1 << 16) /* Clock Enabling Status */ -#define AT91_TC_MTIOA (1 << 17) /* TIOA Mirror */ -#define AT91_TC_MTIOB (1 << 18) /* TIOB Mirror */ - -#define AT91_TC_IER 0x24 /* Interrupt Enable Register */ -#define AT91_TC_IDR 0x28 /* Interrupt Disable Register */ -#define AT91_TC_IMR 0x2c /* Interrupt Mask Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91_twi.h b/include/asm-arm/arch-at91/at91_twi.h deleted file mode 100644 index f9f2e3c..0000000 --- a/include/asm-arm/arch-at91/at91_twi.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_twi.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Two-wire Interface (TWI) registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_TWI_H -#define AT91_TWI_H - -#define AT91_TWI_CR 0x00 /* Control Register */ -#define AT91_TWI_START (1 << 0) /* Send a Start Condition */ -#define AT91_TWI_STOP (1 << 1) /* Send a Stop Condition */ -#define AT91_TWI_MSEN (1 << 2) /* Master Transfer Enable */ -#define AT91_TWI_MSDIS (1 << 3) /* Master Transfer Disable */ -#define AT91_TWI_SVEN (1 << 4) /* Slave Transfer Enable [SAM9260 only] */ -#define AT91_TWI_SVDIS (1 << 5) /* Slave Transfer Disable [SAM9260 only] */ -#define AT91_TWI_SWRST (1 << 7) /* Software Reset */ - -#define AT91_TWI_MMR 0x04 /* Master Mode Register */ -#define AT91_TWI_IADRSZ (3 << 8) /* Internal Device Address Size */ -#define AT91_TWI_IADRSZ_NO (0 << 8) -#define AT91_TWI_IADRSZ_1 (1 << 8) -#define AT91_TWI_IADRSZ_2 (2 << 8) -#define AT91_TWI_IADRSZ_3 (3 << 8) -#define AT91_TWI_MREAD (1 << 12) /* Master Read Direction */ -#define AT91_TWI_DADR (0x7f << 16) /* Device Address */ - -#define AT91_TWI_SMR 0x08 /* Slave Mode Register [SAM9260 only] */ -#define AT91_TWI_SADR (0x7f << 16) /* Slave Address */ - -#define AT91_TWI_IADR 0x0c /* Internal Address Register */ - -#define AT91_TWI_CWGR 0x10 /* Clock Waveform Generator Register */ -#define AT91_TWI_CLDIV (0xff << 0) /* Clock Low Divisor */ -#define AT91_TWI_CHDIV (0xff << 8) /* Clock High Divisor */ -#define AT91_TWI_CKDIV (7 << 16) /* Clock Divider */ - -#define AT91_TWI_SR 0x20 /* Status Register */ -#define AT91_TWI_TXCOMP (1 << 0) /* Transmission Complete */ -#define AT91_TWI_RXRDY (1 << 1) /* Receive Holding Register Ready */ -#define AT91_TWI_TXRDY (1 << 2) /* Transmit Holding Register Ready */ -#define AT91_TWI_SVREAD (1 << 3) /* Slave Read [SAM9260 only] */ -#define AT91_TWI_SVACC (1 << 4) /* Slave Access [SAM9260 only] */ -#define AT91_TWI_GACC (1 << 5) /* General Call Access [SAM9260 only] */ -#define AT91_TWI_OVRE (1 << 6) /* Overrun Error [AT91RM9200 only] */ -#define AT91_TWI_UNRE (1 << 7) /* Underrun Error [AT91RM9200 only] */ -#define AT91_TWI_NACK (1 << 8) /* Not Acknowledged */ -#define AT91_TWI_ARBLST (1 << 9) /* Arbitration Lost [SAM9260 only] */ -#define AT91_TWI_SCLWS (1 << 10) /* Clock Wait State [SAM9260 only] */ -#define AT91_TWI_EOSACC (1 << 11) /* End of Slave Address [SAM9260 only] */ - -#define AT91_TWI_IER 0x24 /* Interrupt Enable Register */ -#define AT91_TWI_IDR 0x28 /* Interrupt Disable Register */ -#define AT91_TWI_IMR 0x2c /* Interrupt Mask Register */ -#define AT91_TWI_RHR 0x30 /* Receive Holding Register */ -#define AT91_TWI_THR 0x34 /* Transmit Holding Register */ - -#endif - diff --git a/include/asm-arm/arch-at91/at91_wdt.h b/include/asm-arm/arch-at91/at91_wdt.h deleted file mode 100644 index 1014e9b..0000000 --- a/include/asm-arm/arch-at91/at91_wdt.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91_wdt.h - * - * Watchdog Timer (WDT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_WDT_H -#define AT91_WDT_H - -#define AT91_WDT_CR (AT91_WDT + 0x00) /* Watchdog Control Register */ -#define AT91_WDT_WDRSTT (1 << 0) /* Restart */ -#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */ - -#define AT91_WDT_MR (AT91_WDT + 0x04) /* Watchdog Mode Register */ -#define AT91_WDT_WDV (0xfff << 0) /* Counter Value */ -#define AT91_WDT_WDFIEN (1 << 12) /* Fault Interrupt Enable */ -#define AT91_WDT_WDRSTEN (1 << 13) /* Reset Processor */ -#define AT91_WDT_WDRPROC (1 << 14) /* Timer Restart */ -#define AT91_WDT_WDDIS (1 << 15) /* Watchdog Disable */ -#define AT91_WDT_WDD (0xfff << 16) /* Delta Value */ -#define AT91_WDT_WDDBGHLT (1 << 28) /* Debug Halt */ -#define AT91_WDT_WDIDLEHLT (1 << 29) /* Idle Halt */ - -#define AT91_WDT_SR (AT91_WDT + 0x08) /* Watchdog Status Register */ -#define AT91_WDT_WDUNF (1 << 0) /* Watchdog Underflow */ -#define AT91_WDT_WDERR (1 << 1) /* Watchdog Error */ - -#endif diff --git a/include/asm-arm/arch-at91/at91cap9.h b/include/asm-arm/arch-at91/at91cap9.h deleted file mode 100644 index 6f14d90..0000000 --- a/include/asm-arm/arch-at91/at91cap9.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91cap9.h - * - * Copyright (C) 2007 Stelian Pop - * Copyright (C) 2007 Lead Tech Design - * Copyright (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_H -#define AT91CAP9_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91CAP9_ID_PIOABCD 2 /* Parallel IO Controller A, B, C and D */ -#define AT91CAP9_ID_MPB0 3 /* MP Block Peripheral 0 */ -#define AT91CAP9_ID_MPB1 4 /* MP Block Peripheral 1 */ -#define AT91CAP9_ID_MPB2 5 /* MP Block Peripheral 2 */ -#define AT91CAP9_ID_MPB3 6 /* MP Block Peripheral 3 */ -#define AT91CAP9_ID_MPB4 7 /* MP Block Peripheral 4 */ -#define AT91CAP9_ID_US0 8 /* USART 0 */ -#define AT91CAP9_ID_US1 9 /* USART 1 */ -#define AT91CAP9_ID_US2 10 /* USART 2 */ -#define AT91CAP9_ID_MCI0 11 /* Multimedia Card Interface 0 */ -#define AT91CAP9_ID_MCI1 12 /* Multimedia Card Interface 1 */ -#define AT91CAP9_ID_CAN 13 /* CAN */ -#define AT91CAP9_ID_TWI 14 /* Two-Wire Interface */ -#define AT91CAP9_ID_SPI0 15 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SPI1 16 /* Serial Peripheral Interface 0 */ -#define AT91CAP9_ID_SSC0 17 /* Serial Synchronous Controller 0 */ -#define AT91CAP9_ID_SSC1 18 /* Serial Synchronous Controller 1 */ -#define AT91CAP9_ID_AC97C 19 /* AC97 Controller */ -#define AT91CAP9_ID_TCB 20 /* Timer Counter 0, 1 and 2 */ -#define AT91CAP9_ID_PWMC 21 /* Pulse Width Modulation Controller */ -#define AT91CAP9_ID_EMAC 22 /* Ethernet */ -#define AT91CAP9_ID_AESTDES 23 /* Advanced Encryption Standard, Triple DES */ -#define AT91CAP9_ID_ADC 24 /* Analog-to-Digital Converter */ -#define AT91CAP9_ID_ISI 25 /* Image Sensor Interface */ -#define AT91CAP9_ID_LCDC 26 /* LCD Controller */ -#define AT91CAP9_ID_DMA 27 /* DMA Controller */ -#define AT91CAP9_ID_UDPHS 28 /* USB High Speed Device Port */ -#define AT91CAP9_ID_UHP 29 /* USB Host Port */ -#define AT91CAP9_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91CAP9_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - -/* - * User Peripheral physical base addresses. - */ -#define AT91CAP9_BASE_UDPHS 0xfff78000 -#define AT91CAP9_BASE_TCB0 0xfff7c000 -#define AT91CAP9_BASE_TC0 0xfff7c000 -#define AT91CAP9_BASE_TC1 0xfff7c040 -#define AT91CAP9_BASE_TC2 0xfff7c080 -#define AT91CAP9_BASE_MCI0 0xfff80000 -#define AT91CAP9_BASE_MCI1 0xfff84000 -#define AT91CAP9_BASE_TWI 0xfff88000 -#define AT91CAP9_BASE_US0 0xfff8c000 -#define AT91CAP9_BASE_US1 0xfff90000 -#define AT91CAP9_BASE_US2 0xfff94000 -#define AT91CAP9_BASE_SSC0 0xfff98000 -#define AT91CAP9_BASE_SSC1 0xfff9c000 -#define AT91CAP9_BASE_AC97C 0xfffa0000 -#define AT91CAP9_BASE_SPI0 0xfffa4000 -#define AT91CAP9_BASE_SPI1 0xfffa8000 -#define AT91CAP9_BASE_CAN 0xfffac000 -#define AT91CAP9_BASE_PWMC 0xfffb8000 -#define AT91CAP9_BASE_EMAC 0xfffbc000 -#define AT91CAP9_BASE_ADC 0xfffc0000 -#define AT91CAP9_BASE_ISI 0xfffc4000 -#define AT91_BASE_SYS 0xffffe200 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe200 - AT91_BASE_SYS) -#define AT91_BCRAMC (0xffffe400 - AT91_BASE_SYS) -#define AT91_DDRSDRC (0xffffe600 - AT91_BASE_SYS) -#define AT91_SMC (0xffffe800 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffea00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffeb10 - AT91_BASE_SYS) -#define AT91_DMA (0xffffec00 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91CAP9_BASE_US0 -#define AT91_USART1 AT91CAP9_BASE_US1 -#define AT91_USART2 AT91CAP9_BASE_US2 - - -/* - * Internal Memory. - */ -#define AT91CAP9_SRAM_BASE 0x00100000 /* Internal SRAM base address */ -#define AT91CAP9_SRAM_SIZE (32 * SZ_1K) /* Internal SRAM size (32Kb) */ - -#define AT91CAP9_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91CAP9_ROM_SIZE (32 * SZ_1K) /* Internal ROM size (32Kb) */ - -#define AT91CAP9_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91CAP9_UDPHS_FIFO 0x00600000 /* USB High Speed Device Port */ -#define AT91CAP9_UHP_BASE 0x00700000 /* USB Host controller */ - -#define CONFIG_DRAM_BASE AT91_CHIPSELECT_6 - -#endif diff --git a/include/asm-arm/arch-at91/at91cap9_ddrsdr.h b/include/asm-arm/arch-at91/at91cap9_ddrsdr.h deleted file mode 100644 index efdb23a..0000000 --- a/include/asm-arm/arch-at91/at91cap9_ddrsdr.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91cap9_ddrsdr.h - * - * DDR/SDR Controller (DDRSDRC) - System peripherals registers. - * Based on AT91CAP9 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_DDRSDR_H -#define AT91CAP9_DDRSDR_H - -#define AT91_DDRSDRC_MR (AT91_DDRSDRC + 0x00) /* Mode Register */ -#define AT91_DDRSDRC_MODE (0xf << 0) /* Command Mode */ -#define AT91_DDRSDRC_MODE_NORMAL 0 -#define AT91_DDRSDRC_MODE_NOP 1 -#define AT91_DDRSDRC_MODE_PRECHARGE 2 -#define AT91_DDRSDRC_MODE_LMR 3 -#define AT91_DDRSDRC_MODE_REFRESH 4 -#define AT91_DDRSDRC_MODE_EXT_LMR 5 -#define AT91_DDRSDRC_MODE_DEEP 6 - -#define AT91_DDRSDRC_RTR (AT91_DDRSDRC + 0x04) /* Refresh Timer Register */ -#define AT91_DDRSDRC_COUNT (0xfff << 0) /* Refresh Timer Counter */ - -#define AT91_DDRSDRC_CR (AT91_DDRSDRC + 0x08) /* Configuration Register */ -#define AT91_DDRSDRC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_DDRSDRC_NC_SDR8 (0 << 0) -#define AT91_DDRSDRC_NC_SDR9 (1 << 0) -#define AT91_DDRSDRC_NC_SDR10 (2 << 0) -#define AT91_DDRSDRC_NC_SDR11 (3 << 0) -#define AT91_DDRSDRC_NC_DDR9 (0 << 0) -#define AT91_DDRSDRC_NC_DDR10 (1 << 0) -#define AT91_DDRSDRC_NC_DDR11 (2 << 0) -#define AT91_DDRSDRC_NC_DDR12 (3 << 0) -#define AT91_DDRSDRC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_DDRSDRC_NR_11 (0 << 2) -#define AT91_DDRSDRC_NR_12 (1 << 2) -#define AT91_DDRSDRC_NR_13 (2 << 2) -#define AT91_DDRSDRC_CAS (7 << 4) /* CAS Latency */ -#define AT91_DDRSDRC_CAS_2 (2 << 4) -#define AT91_DDRSDRC_CAS_3 (3 << 4) -#define AT91_DDRSDRC_CAS_25 (6 << 4) -#define AT91_DDRSDRC_DLL (1 << 7) /* Reset DLL */ -#define AT91_DDRSDRC_DICDS (1 << 8) /* Output impedance control */ - -#define AT91_DDRSDRC_T0PR (AT91_DDRSDRC + 0x0C) /* Timing 0 Register */ -#define AT91_DDRSDRC_TRAS (0xf << 0) /* Active to Precharge delay */ -#define AT91_DDRSDRC_TRCD (0xf << 4) /* Row to Column delay */ -#define AT91_DDRSDRC_TWR (0xf << 8) /* Write recovery delay */ -#define AT91_DDRSDRC_TRC (0xf << 12) /* Row cycle delay */ -#define AT91_DDRSDRC_TRP (0xf << 16) /* Row precharge delay */ -#define AT91_DDRSDRC_TRRD (0xf << 20) /* Active BankA to BankB */ -#define AT91_DDRSDRC_TWTR (1 << 24) /* Internal Write to Read delay */ -#define AT91_DDRSDRC_TMRD (0xf << 28) /* Load mode to active/refresh delay */ - -#define AT91_DDRSDRC_T1PR (AT91_DDRSDRC + 0x10) /* Timing 1 Register */ -#define AT91_DDRSDRC_TRFC (0x1f << 0) /* Row Cycle Delay */ -#define AT91_DDRSDRC_TXSNR (0xff << 8) /* Exit self-refresh to non-read */ -#define AT91_DDRSDRC_TXSRD (0xff << 16) /* Exit self-refresh to read */ -#define AT91_DDRSDRC_TXP (0xf << 24) /* Exit power-down delay */ - -#define AT91_DDRSDRC_LPR (AT91_DDRSDRC + 0x18) /* Low Power Register */ -#define AT91_DDRSDRC_LPCB (3 << 0) /* Low-power Configurations */ -#define AT91_DDRSDRC_LPCB_DISABLE 0 -#define AT91_DDRSDRC_LPCB_SELF_REFRESH 1 -#define AT91_DDRSDRC_LPCB_POWER_DOWN 2 -#define AT91_DDRSDRC_LPCB_DEEP_POWER_DOWN 3 -#define AT91_DDRSDRC_CLKFR (1 << 2) /* Clock Frozen */ -#define AT91_DDRSDRC_PASR (7 << 4) /* Partial Array Self Refresh */ -#define AT91_DDRSDRC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ -#define AT91_DDRSDRC_DS (3 << 10) /* Drive Strength */ -#define AT91_DDRSDRC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ -#define AT91_DDRSDRC_TIMEOUT_0_CLK_CYCLES (0 << 12) -#define AT91_DDRSDRC_TIMEOUT_64_CLK_CYCLES (1 << 12) -#define AT91_DDRSDRC_TIMEOUT_128_CLK_CYCLES (2 << 12) - -#define AT91_DDRSDRC_MDR (AT91_DDRSDRC + 0x1C) /* Memory Device Register */ -#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ -#define AT91_DDRSDRC_MD_SDR 0 -#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 -#define AT91_DDRSDRC_MD_DDR 2 -#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 - -#define AT91_DDRSDRC_DLLR (AT91_DDRSDRC + 0x20) /* DLL Information Register */ -#define AT91_DDRSDRC_MDINC (1 << 0) /* Master Delay increment */ -#define AT91_DDRSDRC_MDDEC (1 << 1) /* Master Delay decrement */ -#define AT91_DDRSDRC_MDOVF (1 << 2) /* Master Delay Overflow */ -#define AT91_DDRSDRC_SDCOVF (1 << 3) /* Slave Delay Correction Overflow */ -#define AT91_DDRSDRC_SDCUDF (1 << 4) /* Slave Delay Correction Underflow */ -#define AT91_DDRSDRC_SDERF (1 << 5) /* Slave Delay Correction error */ -#define AT91_DDRSDRC_MDVAL (0xff << 8) /* Master Delay value */ -#define AT91_DDRSDRC_SDVAL (0xff << 16) /* Slave Delay value */ -#define AT91_DDRSDRC_SDCVAL (0xff << 24) /* Slave Delay Correction value */ - - -#endif diff --git a/include/asm-arm/arch-at91/at91cap9_matrix.h b/include/asm-arm/arch-at91/at91cap9_matrix.h deleted file mode 100644 index ddbd487..0000000 --- a/include/asm-arm/arch-at91/at91cap9_matrix.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91cap9_matrix.h - * - * Copyright (C) 2007 Stelian Pop - * Copyright (C) 2007 Lead Tech Design - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91CAP9 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91CAP9_MATRIX_H -#define AT91CAP9_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */ -#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */ -#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SCFG8 (AT91_MATRIX + 0x60) /* Slave Configuration Register 8 */ -#define AT91_MATRIX_SCFG9 (AT91_MATRIX + 0x64) /* Slave Configuration Register 9 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_PRAS8 (AT91_MATRIX + 0xC0) /* Priority Register A for Slave 8 */ -#define AT91_MATRIX_PRBS8 (AT91_MATRIX + 0xC4) /* Priority Register B for Slave 8 */ -#define AT91_MATRIX_PRAS9 (AT91_MATRIX + 0xC8) /* Priority Register A for Slave 9 */ -#define AT91_MATRIX_PRBS9 (AT91_MATRIX + 0xCC) /* Priority Register B for Slave 9 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ -#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */ -#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */ -#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) -#define AT91_MATRIX_RCB9 (1 << 9) -#define AT91_MATRIX_RCB10 (1 << 10) -#define AT91_MATRIX_RCB11 (1 << 11) - -#define AT91_MPBS0_SFR (AT91_MATRIX + 0x114) /* MPBlock Slave 0 Special Function Register */ -#define AT91_MPBS1_SFR (AT91_MATRIX + 0x11C) /* MPBlock Slave 1 Special Function Register */ - -#define AT91_MATRIX_UDPHS (AT91_MATRIX + 0x118) /* USBHS Special Function Register [AT91CAP9 only] */ -#define AT91_MATRIX_SELECT_UDPHS (0 << 31) /* select High Speed UDP */ -#define AT91_MATRIX_SELECT_UDP (1 << 31) /* select standard UDP */ -#define AT91_MATRIX_UDPHS_BYPASS_LOCK (1 << 30) /* bypass lock bit */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI_CS1A_BCRAMC (1 << 1) -#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI_DQSPDC (1 << 9) /* Data Qualifier Strobe Pull-Down Configuration */ -#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MPBS2_SFR (AT91_MATRIX + 0x12C) /* MPBlock Slave 2 Special Function Register */ -#define AT91_MPBS3_SFR (AT91_MATRIX + 0x130) /* MPBlock Slave 3 Special Function Register */ -#define AT91_APB_SFR (AT91_MATRIX + 0x134) /* APB Bridge Special Function Register */ - -#endif diff --git a/include/asm-arm/arch-at91/at91rm9200.h b/include/asm-arm/arch-at91/at91rm9200.h deleted file mode 100644 index e8fc0b1..0000000 --- a/include/asm-arm/arch-at91/at91rm9200.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91rm9200.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Common definitions. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91RM9200_H -#define AT91RM9200_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripheral */ -#define AT91RM9200_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91RM9200_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91RM9200_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91RM9200_ID_PIOD 5 /* Parallel IO Controller D */ -#define AT91RM9200_ID_US0 6 /* USART 0 */ -#define AT91RM9200_ID_US1 7 /* USART 1 */ -#define AT91RM9200_ID_US2 8 /* USART 2 */ -#define AT91RM9200_ID_US3 9 /* USART 3 */ -#define AT91RM9200_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91RM9200_ID_UDP 11 /* USB Device Port */ -#define AT91RM9200_ID_TWI 12 /* Two-Wire Interface */ -#define AT91RM9200_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91RM9200_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91RM9200_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91RM9200_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -#define AT91RM9200_ID_TC0 17 /* Timer Counter 0 */ -#define AT91RM9200_ID_TC1 18 /* Timer Counter 1 */ -#define AT91RM9200_ID_TC2 19 /* Timer Counter 2 */ -#define AT91RM9200_ID_TC3 20 /* Timer Counter 3 */ -#define AT91RM9200_ID_TC4 21 /* Timer Counter 4 */ -#define AT91RM9200_ID_TC5 22 /* Timer Counter 5 */ -#define AT91RM9200_ID_UHP 23 /* USB Host port */ -#define AT91RM9200_ID_EMAC 24 /* Ethernet MAC */ -#define AT91RM9200_ID_IRQ0 25 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91RM9200_ID_IRQ1 26 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91RM9200_ID_IRQ2 27 /* Advanced Interrupt Controller (IRQ2) */ -#define AT91RM9200_ID_IRQ3 28 /* Advanced Interrupt Controller (IRQ3) */ -#define AT91RM9200_ID_IRQ4 29 /* Advanced Interrupt Controller (IRQ4) */ -#define AT91RM9200_ID_IRQ5 30 /* Advanced Interrupt Controller (IRQ5) */ -#define AT91RM9200_ID_IRQ6 31 /* Advanced Interrupt Controller (IRQ6) */ - - -/* - * Peripheral physical base addresses. - */ -#define AT91RM9200_BASE_TCB0 0xfffa0000 -#define AT91RM9200_BASE_TC0 0xfffa0000 -#define AT91RM9200_BASE_TC1 0xfffa0040 -#define AT91RM9200_BASE_TC2 0xfffa0080 -#define AT91RM9200_BASE_TCB1 0xfffa4000 -#define AT91RM9200_BASE_TC3 0xfffa4000 -#define AT91RM9200_BASE_TC4 0xfffa4040 -#define AT91RM9200_BASE_TC5 0xfffa4080 -#define AT91RM9200_BASE_UDP 0xfffb0000 -#define AT91RM9200_BASE_MCI 0xfffb4000 -#define AT91RM9200_BASE_TWI 0xfffb8000 -#define AT91RM9200_BASE_EMAC 0xfffbc000 -#define AT91RM9200_BASE_US0 0xfffc0000 -#define AT91RM9200_BASE_US1 0xfffc4000 -#define AT91RM9200_BASE_US2 0xfffc8000 -#define AT91RM9200_BASE_US3 0xfffcc000 -#define AT91RM9200_BASE_SSC0 0xfffd0000 -#define AT91RM9200_BASE_SSC1 0xfffd4000 -#define AT91RM9200_BASE_SSC2 0xfffd8000 -#define AT91RM9200_BASE_SPI 0xfffe0000 -#define AT91_BASE_SYS 0xfffff000 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) /* Debug Unit */ -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) /* PIO Controller A */ -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) /* PIO Controller B */ -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) /* PIO Controller C */ -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) /* PIO Controller D */ -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) /* Power Management Controller */ -#define AT91_ST (0xfffffd00 - AT91_BASE_SYS) /* System Timer */ -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ -#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ - -#define AT91_USART0 AT91RM9200_BASE_US0 -#define AT91_USART1 AT91RM9200_BASE_US1 -#define AT91_USART2 AT91RM9200_BASE_US2 -#define AT91_USART3 AT91RM9200_BASE_US3 - -#define AT91_MATRIX 0 /* not supported */ - -/* - * Internal Memory. - */ -#define AT91RM9200_ROM_BASE 0x00100000 /* Internal ROM base address */ -#define AT91RM9200_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */ - -#define AT91RM9200_SRAM_BASE 0x00200000 /* Internal SRAM base address */ -#define AT91RM9200_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ - -#define AT91RM9200_UHP_BASE 0x00300000 /* USB Host controller */ - - -#endif diff --git a/include/asm-arm/arch-at91/at91rm9200_emac.h b/include/asm-arm/arch-at91/at91rm9200_emac.h deleted file mode 100644 index 0c417af..0000000 --- a/include/asm-arm/arch-at91/at91rm9200_emac.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91rm9200_emac.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Ethernet MAC registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91RM9200_EMAC_H -#define AT91RM9200_EMAC_H - -#define AT91_EMAC_CTL 0x00 /* Control Register */ -#define AT91_EMAC_LB (1 << 0) /* Loopback */ -#define AT91_EMAC_LBL (1 << 1) /* Loopback Local */ -#define AT91_EMAC_RE (1 << 2) /* Receive Enable */ -#define AT91_EMAC_TE (1 << 3) /* Transmit Enable */ -#define AT91_EMAC_MPE (1 << 4) /* Management Port Enable */ -#define AT91_EMAC_CSR (1 << 5) /* Clear Statistics Registers */ -#define AT91_EMAC_INCSTAT (1 << 6) /* Increment Statistics Registers */ -#define AT91_EMAC_WES (1 << 7) /* Write Enable for Statistics Registers */ -#define AT91_EMAC_BP (1 << 8) /* Back Pressure */ - -#define AT91_EMAC_CFG 0x04 /* Configuration Register */ -#define AT91_EMAC_SPD (1 << 0) /* Speed */ -#define AT91_EMAC_FD (1 << 1) /* Full Duplex */ -#define AT91_EMAC_BR (1 << 2) /* Bit Rate */ -#define AT91_EMAC_CAF (1 << 4) /* Copy All Frames */ -#define AT91_EMAC_NBC (1 << 5) /* No Broadcast */ -#define AT91_EMAC_MTI (1 << 6) /* Multicast Hash Enable */ -#define AT91_EMAC_UNI (1 << 7) /* Unicast Hash Enable */ -#define AT91_EMAC_BIG (1 << 8) /* Receive 1522 Bytes */ -#define AT91_EMAC_EAE (1 << 9) /* External Address Match Enable */ -#define AT91_EMAC_CLK (3 << 10) /* MDC Clock Divisor */ -#define AT91_EMAC_CLK_DIV8 (0 << 10) -#define AT91_EMAC_CLK_DIV16 (1 << 10) -#define AT91_EMAC_CLK_DIV32 (2 << 10) -#define AT91_EMAC_CLK_DIV64 (3 << 10) -#define AT91_EMAC_RTY (1 << 12) /* Retry Test */ -#define AT91_EMAC_RMII (1 << 13) /* Reduce MII (RMII) */ - -#define AT91_EMAC_SR 0x08 /* Status Register */ -#define AT91_EMAC_SR_LINK (1 << 0) /* Link */ -#define AT91_EMAC_SR_MDIO (1 << 1) /* MDIO pin */ -#define AT91_EMAC_SR_IDLE (1 << 2) /* PHY idle */ - -#define AT91_EMAC_TAR 0x0c /* Transmit Address Register */ - -#define AT91_EMAC_TCR 0x10 /* Transmit Control Register */ -#define AT91_EMAC_LEN (0x7ff << 0) /* Transmit Frame Length */ -#define AT91_EMAC_NCRC (1 << 15) /* No CRC */ - -#define AT91_EMAC_TSR 0x14 /* Transmit Status Register */ -#define AT91_EMAC_TSR_OVR (1 << 0) /* Transmit Buffer Overrun */ -#define AT91_EMAC_TSR_COL (1 << 1) /* Collision Occurred */ -#define AT91_EMAC_TSR_RLE (1 << 2) /* Retry Limit Exceeded */ -#define AT91_EMAC_TSR_IDLE (1 << 3) /* Transmitter Idle */ -#define AT91_EMAC_TSR_BNQ (1 << 4) /* Transmit Buffer not Queued */ -#define AT91_EMAC_TSR_COMP (1 << 5) /* Transmit Complete */ -#define AT91_EMAC_TSR_UND (1 << 6) /* Transmit Underrun */ - -#define AT91_EMAC_RBQP 0x18 /* Receive Buffer Queue Pointer */ - -#define AT91_EMAC_RSR 0x20 /* Receive Status Register */ -#define AT91_EMAC_RSR_BNA (1 << 0) /* Buffer Not Available */ -#define AT91_EMAC_RSR_REC (1 << 1) /* Frame Received */ -#define AT91_EMAC_RSR_OVR (1 << 2) /* RX Overrun */ - -#define AT91_EMAC_ISR 0x24 /* Interrupt Status Register */ -#define AT91_EMAC_DONE (1 << 0) /* Management Done */ -#define AT91_EMAC_RCOM (1 << 1) /* Receive Complete */ -#define AT91_EMAC_RBNA (1 << 2) /* Receive Buffer Not Available */ -#define AT91_EMAC_TOVR (1 << 3) /* Transmit Buffer Overrun */ -#define AT91_EMAC_TUND (1 << 4) /* Transmit Buffer Underrun */ -#define AT91_EMAC_RTRY (1 << 5) /* Retry Limit */ -#define AT91_EMAC_TBRE (1 << 6) /* Transmit Buffer Register Empty */ -#define AT91_EMAC_TCOM (1 << 7) /* Transmit Complete */ -#define AT91_EMAC_TIDLE (1 << 8) /* Transmit Idle */ -#define AT91_EMAC_LINK (1 << 9) /* Link */ -#define AT91_EMAC_ROVR (1 << 10) /* RX Overrun */ -#define AT91_EMAC_ABT (1 << 11) /* Abort */ - -#define AT91_EMAC_IER 0x28 /* Interrupt Enable Register */ -#define AT91_EMAC_IDR 0x2c /* Interrupt Disable Register */ -#define AT91_EMAC_IMR 0x30 /* Interrupt Mask Register */ - -#define AT91_EMAC_MAN 0x34 /* PHY Maintenance Register */ -#define AT91_EMAC_DATA (0xffff << 0) /* MDIO Data */ -#define AT91_EMAC_REGA (0x1f << 18) /* MDIO Register */ -#define AT91_EMAC_PHYA (0x1f << 23) /* MDIO PHY Address */ -#define AT91_EMAC_RW (3 << 28) /* Read/Write operation */ -#define AT91_EMAC_RW_W (1 << 28) -#define AT91_EMAC_RW_R (2 << 28) -#define AT91_EMAC_MAN_802_3 0x40020000 /* IEEE 802.3 value */ - -/* - * Statistics Registers. - */ -#define AT91_EMAC_FRA 0x40 /* Frames Transmitted OK */ -#define AT91_EMAC_SCOL 0x44 /* Single Collision Frame */ -#define AT91_EMAC_MCOL 0x48 /* Multiple Collision Frame */ -#define AT91_EMAC_OK 0x4c /* Frames Received OK */ -#define AT91_EMAC_SEQE 0x50 /* Frame Check Sequence Error */ -#define AT91_EMAC_ALE 0x54 /* Alignmemt Error */ -#define AT91_EMAC_DTE 0x58 /* Deffered Transmission Frame */ -#define AT91_EMAC_LCOL 0x5c /* Late Collision */ -#define AT91_EMAC_ECOL 0x60 /* Excessive Collision */ -#define AT91_EMAC_TUE 0x64 /* Transmit Underrun Error */ -#define AT91_EMAC_CSE 0x68 /* Carrier Sense Error */ -#define AT91_EMAC_DRFC 0x6c /* Discard RX Frame */ -#define AT91_EMAC_ROV 0x70 /* Receive Overrun */ -#define AT91_EMAC_CDE 0x74 /* Code Error */ -#define AT91_EMAC_ELR 0x78 /* Excessive Length Error */ -#define AT91_EMAC_RJB 0x7c /* Receive Jabber */ -#define AT91_EMAC_USF 0x80 /* Undersize Frame */ -#define AT91_EMAC_SQEE 0x84 /* SQE Test Error */ - -/* - * Address Registers. - */ -#define AT91_EMAC_HSL 0x90 /* Hash Address Low [31:0] */ -#define AT91_EMAC_HSH 0x94 /* Hash Address High [63:32] */ -#define AT91_EMAC_SA1L 0x98 /* Specific Address 1 Low, bytes 0-3 */ -#define AT91_EMAC_SA1H 0x9c /* Specific Address 1 High, bytes 4-5 */ -#define AT91_EMAC_SA2L 0xa0 /* Specific Address 2 Low, bytes 0-3 */ -#define AT91_EMAC_SA2H 0xa4 /* Specific Address 2 High, bytes 4-5 */ -#define AT91_EMAC_SA3L 0xa8 /* Specific Address 3 Low, bytes 0-3 */ -#define AT91_EMAC_SA3H 0xac /* Specific Address 3 High, bytes 4-5 */ -#define AT91_EMAC_SA4L 0xb0 /* Specific Address 4 Low, bytes 0-3 */ -#define AT91_EMAC_SA4H 0xb4 /* Specific Address 4 High, bytes 4-5 */ - -#endif diff --git a/include/asm-arm/arch-at91/at91rm9200_mc.h b/include/asm-arm/arch-at91/at91rm9200_mc.h deleted file mode 100644 index 24d0129..0000000 --- a/include/asm-arm/arch-at91/at91rm9200_mc.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91rm9200_mc.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Memory Controllers (MC, EBI, SMC, SDRAMC, BFC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91RM9200_MC_H -#define AT91RM9200_MC_H - -/* Memory Controller */ -#define AT91_MC_RCR (AT91_MC + 0x00) /* MC Remap Control Register */ -#define AT91_MC_RCB (1 << 0) /* Remap Command Bit */ - -#define AT91_MC_ASR (AT91_MC + 0x04) /* MC Abort Status Register */ -#define AT91_MC_UNADD (1 << 0) /* Undefined Address Abort Status */ -#define AT91_MC_MISADD (1 << 1) /* Misaligned Address Abort Status */ -#define AT91_MC_ABTSZ (3 << 8) /* Abort Size Status */ -#define AT91_MC_ABTSZ_BYTE (0 << 8) -#define AT91_MC_ABTSZ_HALFWORD (1 << 8) -#define AT91_MC_ABTSZ_WORD (2 << 8) -#define AT91_MC_ABTTYP (3 << 10) /* Abort Type Status */ -#define AT91_MC_ABTTYP_DATAREAD (0 << 10) -#define AT91_MC_ABTTYP_DATAWRITE (1 << 10) -#define AT91_MC_ABTTYP_FETCH (2 << 10) -#define AT91_MC_MST0 (1 << 16) /* ARM920T Abort Source */ -#define AT91_MC_MST1 (1 << 17) /* PDC Abort Source */ -#define AT91_MC_MST2 (1 << 18) /* UHP Abort Source */ -#define AT91_MC_MST3 (1 << 19) /* EMAC Abort Source */ -#define AT91_MC_SVMST0 (1 << 24) /* Saved ARM920T Abort Source */ -#define AT91_MC_SVMST1 (1 << 25) /* Saved PDC Abort Source */ -#define AT91_MC_SVMST2 (1 << 26) /* Saved UHP Abort Source */ -#define AT91_MC_SVMST3 (1 << 27) /* Saved EMAC Abort Source */ - -#define AT91_MC_AASR (AT91_MC + 0x08) /* MC Abort Address Status Register */ - -#define AT91_MC_MPR (AT91_MC + 0x0c) /* MC Master Priority Register */ -#define AT91_MPR_MSTP0 (7 << 0) /* ARM920T Priority */ -#define AT91_MPR_MSTP1 (7 << 4) /* PDC Priority */ -#define AT91_MPR_MSTP2 (7 << 8) /* UHP Priority */ -#define AT91_MPR_MSTP3 (7 << 12) /* EMAC Priority */ - -/* External Bus Interface (EBI) registers */ -#define AT91_EBI_CSA (AT91_MC + 0x60) /* Chip Select Assignment Register */ -#define AT91_EBI_CS0A (1 << 0) /* Chip Select 0 Assignment */ -#define AT91_EBI_CS0A_SMC (0 << 0) -#define AT91_EBI_CS0A_BFC (1 << 0) -#define AT91_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_EBI_CS1A_SMC (0 << 1) -#define AT91_EBI_CS1A_SDRAMC (1 << 1) -#define AT91_EBI_CS3A (1 << 3) /* Chip Select 2 Assignment */ -#define AT91_EBI_CS3A_SMC (0 << 3) -#define AT91_EBI_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_EBI_CS4A (1 << 4) /* Chip Select 3 Assignment */ -#define AT91_EBI_CS4A_SMC (0 << 4) -#define AT91_EBI_CS4A_SMC_COMPACTFLASH (1 << 4) -#define AT91_EBI_CFGR (AT91_MC + 0x64) /* Configuration Register */ -#define AT91_EBI_DBPUC (1 << 0) /* Data Bus Pull-Up Configuration */ - -/* Static Memory Controller (SMC) registers */ -#define AT91_SMC_CSR(n) (AT91_MC + 0x70 + ((n) * 4))/* SMC Chip Select Register */ -#define AT91_SMC_NWS (0x7f << 0) /* Number of Wait States */ -#define AT91_SMC_NWS_(x) ((x) << 0) -#define AT91_SMC_WSEN (1 << 7) /* Wait State Enable */ -#define AT91_SMC_TDF (0xf << 8) /* Data Float Time */ -#define AT91_SMC_TDF_(x) ((x) << 8) -#define AT91_SMC_BAT (1 << 12) /* Byte Access Type */ -#define AT91_SMC_DBW (3 << 13) /* Data Bus Width */ -#define AT91_SMC_DBW_16 (1 << 13) -#define AT91_SMC_DBW_8 (2 << 13) -#define AT91_SMC_DPR (1 << 15) /* Data Read Protocol */ -#define AT91_SMC_ACSS (3 << 16) /* Address to Chip Select Setup */ -#define AT91_SMC_ACSS_STD (0 << 16) -#define AT91_SMC_ACSS_1 (1 << 16) -#define AT91_SMC_ACSS_2 (2 << 16) -#define AT91_SMC_ACSS_3 (3 << 16) -#define AT91_SMC_RWSETUP (7 << 24) /* Read & Write Signal Time Setup */ -#define AT91_SMC_RWSETUP_(x) ((x) << 24) -#define AT91_SMC_RWHOLD (7 << 28) /* Read & Write Signal Hold Time */ -#define AT91_SMC_RWHOLD_(x) ((x) << 28) - -/* SDRAM Controller registers */ -#define AT91_SDRAMC_MR (AT91_MC + 0x90) /* Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL (0 << 0) -#define AT91_SDRAMC_MODE_NOP (1 << 0) -#define AT91_SDRAMC_MODE_PRECHARGE (2 << 0) -#define AT91_SDRAMC_MODE_LMR (3 << 0) -#define AT91_SDRAMC_MODE_REFRESH (4 << 0) -#define AT91_SDRAMC_DBW (1 << 4) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 4) -#define AT91_SDRAMC_DBW_16 (1 << 4) - -#define AT91_SDRAMC_TR (AT91_MC + 0x94) /* Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Count */ - -#define AT91_SDRAMC_CR (AT91_MC + 0x98) /* Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_TWR (0xf << 7) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 11) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 15) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 19) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 23) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 27) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_SRR (AT91_MC + 0x9c) /* Self Refresh Register */ -#define AT91_SDRAMC_LPR (AT91_MC + 0xa0) /* Low Power Register */ -#define AT91_SDRAMC_IER (AT91_MC + 0xa4) /* Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_MC + 0xa8) /* Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_MC + 0xac) /* Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_MC + 0xb0) /* Interrupt Status Register */ - -/* Burst Flash Controller register */ -#define AT91_BFC_MR (AT91_MC + 0xc0) /* Mode Register */ -#define AT91_BFC_BFCOM (3 << 0) /* Burst Flash Controller Operating Mode */ -#define AT91_BFC_BFCOM_DISABLED (0 << 0) -#define AT91_BFC_BFCOM_ASYNC (1 << 0) -#define AT91_BFC_BFCOM_BURST (2 << 0) -#define AT91_BFC_BFCC (3 << 2) /* Burst Flash Controller Clock */ -#define AT91_BFC_BFCC_MCK (1 << 2) -#define AT91_BFC_BFCC_DIV2 (2 << 2) -#define AT91_BFC_BFCC_DIV4 (3 << 2) -#define AT91_BFC_AVL (0xf << 4) /* Address Valid Latency */ -#define AT91_BFC_PAGES (7 << 8) /* Page Size */ -#define AT91_BFC_PAGES_NO_PAGE (0 << 8) -#define AT91_BFC_PAGES_16 (1 << 8) -#define AT91_BFC_PAGES_32 (2 << 8) -#define AT91_BFC_PAGES_64 (3 << 8) -#define AT91_BFC_PAGES_128 (4 << 8) -#define AT91_BFC_PAGES_256 (5 << 8) -#define AT91_BFC_PAGES_512 (6 << 8) -#define AT91_BFC_PAGES_1024 (7 << 8) -#define AT91_BFC_OEL (3 << 12) /* Output Enable Latency */ -#define AT91_BFC_BAAEN (1 << 16) /* Burst Address Advance Enable */ -#define AT91_BFC_BFOEH (1 << 17) /* Burst Flash Output Enable Handling */ -#define AT91_BFC_MUXEN (1 << 18) /* Multiplexed Bus Enable */ -#define AT91_BFC_RDYEN (1 << 19) /* Ready Enable Mode */ - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h deleted file mode 100644 index 889872a..0000000 --- a/include/asm-arm/arch-at91/at91sam9260.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9260.h - * - * (C) 2006 Andrew Victor - * - * Common definitions. - * Based on AT91SAM9260 datasheet revision A (Preliminary). - * - * Includes also definitions for AT91SAM9XE and AT91SAM9G families - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_H -#define AT91SAM9260_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9260_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9260_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9260_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9260_ID_ADC 5 /* Analog-to-Digital Converter */ -#define AT91SAM9260_ID_US0 6 /* USART 0 */ -#define AT91SAM9260_ID_US1 7 /* USART 1 */ -#define AT91SAM9260_ID_US2 8 /* USART 2 */ -#define AT91SAM9260_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9260_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9260_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9260_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9260_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9260_ID_SSC 14 /* Serial Synchronous Controller */ -#define AT91SAM9260_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9260_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9260_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9260_ID_UHP 20 /* USB Host port */ -#define AT91SAM9260_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9260_ID_ISI 22 /* Image Sensor Interface */ -#define AT91SAM9260_ID_US3 23 /* USART 3 */ -#define AT91SAM9260_ID_US4 24 /* USART 4 */ -#define AT91SAM9260_ID_US5 25 /* USART 5 */ -#define AT91SAM9260_ID_TC3 26 /* Timer Counter 3 */ -#define AT91SAM9260_ID_TC4 27 /* Timer Counter 4 */ -#define AT91SAM9260_ID_TC5 28 /* Timer Counter 5 */ -#define AT91SAM9260_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9260_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9260_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9260_BASE_TCB0 0xfffa0000 -#define AT91SAM9260_BASE_TC0 0xfffa0000 -#define AT91SAM9260_BASE_TC1 0xfffa0040 -#define AT91SAM9260_BASE_TC2 0xfffa0080 -#define AT91SAM9260_BASE_UDP 0xfffa4000 -#define AT91SAM9260_BASE_MCI 0xfffa8000 -#define AT91SAM9260_BASE_TWI 0xfffac000 -#define AT91SAM9260_BASE_US0 0xfffb0000 -#define AT91SAM9260_BASE_US1 0xfffb4000 -#define AT91SAM9260_BASE_US2 0xfffb8000 -#define AT91SAM9260_BASE_SSC 0xfffbc000 -#define AT91SAM9260_BASE_ISI 0xfffc0000 -#define AT91SAM9260_BASE_EMAC 0xfffc4000 -#define AT91SAM9260_BASE_SPI0 0xfffc8000 -#define AT91SAM9260_BASE_SPI1 0xfffcc000 -#define AT91SAM9260_BASE_US3 0xfffd0000 -#define AT91SAM9260_BASE_US4 0xfffd4000 -#define AT91SAM9260_BASE_US5 0xfffd8000 -#define AT91SAM9260_BASE_TCB1 0xfffdc000 -#define AT91SAM9260_BASE_TC3 0xfffdc000 -#define AT91SAM9260_BASE_TC4 0xfffdc040 -#define AT91SAM9260_BASE_TC5 0xfffdc080 -#define AT91SAM9260_BASE_ADC 0xfffe0000 -#define AT91_BASE_SYS 0xffffe800 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9260_BASE_US0 -#define AT91_USART1 AT91SAM9260_BASE_US1 -#define AT91_USART2 AT91SAM9260_BASE_US2 -#define AT91_USART3 AT91SAM9260_BASE_US3 -#define AT91_USART4 AT91SAM9260_BASE_US4 -#define AT91_USART5 AT91SAM9260_BASE_US5 - - -/* - * Internal Memory. - */ -#define AT91SAM9260_ROM_BASE 0x00100000 /* Internal ROM base address */ -#define AT91SAM9260_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9260_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ -#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */ -#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ -#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */ - -#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */ - -#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */ -#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */ - -#define AT91SAM9G20_ROM_BASE 0x00100000 /* Internal ROM base address */ -#define AT91SAM9G20_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9G20_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */ -#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */ -#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */ -#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ - -#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */ - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h deleted file mode 100644 index a8e9fec..0000000 --- a/include/asm-arm/arch-at91/at91sam9260_matrix.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9260_matrix.h - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9260 datasheet revision B. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9260_MATRIX_H -#define AT91SAM9260_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h deleted file mode 100644 index c7c4778..0000000 --- a/include/asm-arm/arch-at91/at91sam9261.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9261.h - * - * Copyright (C) SAN People - * - * Common definitions. - * Based on AT91SAM9261 datasheet revision E. (Preliminary) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_H -#define AT91SAM9261_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9261_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9261_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9261_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9261_ID_US0 6 /* USART 0 */ -#define AT91SAM9261_ID_US1 7 /* USART 1 */ -#define AT91SAM9261_ID_US2 8 /* USART 2 */ -#define AT91SAM9261_ID_MCI 9 /* Multimedia Card Interface */ -#define AT91SAM9261_ID_UDP 10 /* USB Device Port */ -#define AT91SAM9261_ID_TWI 11 /* Two-Wire Interface */ -#define AT91SAM9261_ID_SPI0 12 /* Serial Peripheral Interface 0 */ -#define AT91SAM9261_ID_SPI1 13 /* Serial Peripheral Interface 1 */ -#define AT91SAM9261_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9261_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9261_ID_SSC2 16 /* Serial Synchronous Controller 2 */ -#define AT91SAM9261_ID_TC0 17 /* Timer Counter 0 */ -#define AT91SAM9261_ID_TC1 18 /* Timer Counter 1 */ -#define AT91SAM9261_ID_TC2 19 /* Timer Counter 2 */ -#define AT91SAM9261_ID_UHP 20 /* USB Host port */ -#define AT91SAM9261_ID_LCDC 21 /* LDC Controller */ -#define AT91SAM9261_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9261_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */ -#define AT91SAM9261_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9261_BASE_TCB0 0xfffa0000 -#define AT91SAM9261_BASE_TC0 0xfffa0000 -#define AT91SAM9261_BASE_TC1 0xfffa0040 -#define AT91SAM9261_BASE_TC2 0xfffa0080 -#define AT91SAM9261_BASE_UDP 0xfffa4000 -#define AT91SAM9261_BASE_MCI 0xfffa8000 -#define AT91SAM9261_BASE_TWI 0xfffac000 -#define AT91SAM9261_BASE_US0 0xfffb0000 -#define AT91SAM9261_BASE_US1 0xfffb4000 -#define AT91SAM9261_BASE_US2 0xfffb8000 -#define AT91SAM9261_BASE_SSC0 0xfffbc000 -#define AT91SAM9261_BASE_SSC1 0xfffc0000 -#define AT91SAM9261_BASE_SSC2 0xfffc4000 -#define AT91SAM9261_BASE_SPI0 0xfffc8000 -#define AT91SAM9261_BASE_SPI1 0xfffcc000 -#define AT91_BASE_SYS 0xffffea00 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9261_BASE_US0 -#define AT91_USART1 AT91SAM9261_BASE_US1 -#define AT91_USART2 AT91SAM9261_BASE_US2 - - -/* - * Internal Memory. - */ -#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */ - -#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ - -#define AT91SAM9261_UHP_BASE 0x00500000 /* USB Host controller */ -#define AT91SAM9261_LCDC_BASE 0x00600000 /* LDC controller */ - - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9261_matrix.h b/include/asm-arm/arch-at91/at91sam9261_matrix.h deleted file mode 100644 index 6f07242..0000000 --- a/include/asm-arm/arch-at91/at91sam9261_matrix.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9261_matrix.h - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9261_MATRIX_H -#define AT91SAM9261_MATRIX_H - -#define AT91_MATRIX_MCFG (AT91_MATRIX + 0x00) /* Master Configuration Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x04) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x08) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x0C) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x10) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x14) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ - -#define AT91_MATRIX_TCR (AT91_MATRIX + 0x24) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_ITCM_64 (7 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) -#define AT91_MATRIX_DTCM_64 (7 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x30) /* EBI Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ - -#define AT91_MATRIX_USBPUCR (AT91_MATRIX + 0x34) /* USB Pad Pull-Up Control Register */ -#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h deleted file mode 100644 index 018a647..0000000 --- a/include/asm-arm/arch-at91/at91sam9263.h +++ /dev/null @@ -1,127 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9263.h - * - * (C) 2007 Atmel Corporation. - * - * Common definitions. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_H -#define AT91SAM9263_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Peripherals */ -#define AT91SAM9263_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9263_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9263_ID_PIOCDE 4 /* Parallel IO Controller C, D and E */ -#define AT91SAM9263_ID_US0 7 /* USART 0 */ -#define AT91SAM9263_ID_US1 8 /* USART 1 */ -#define AT91SAM9263_ID_US2 9 /* USART 2 */ -#define AT91SAM9263_ID_MCI0 10 /* Multimedia Card Interface 0 */ -#define AT91SAM9263_ID_MCI1 11 /* Multimedia Card Interface 1 */ -#define AT91SAM9263_ID_CAN 12 /* CAN */ -#define AT91SAM9263_ID_TWI 13 /* Two-Wire Interface */ -#define AT91SAM9263_ID_SPI0 14 /* Serial Peripheral Interface 0 */ -#define AT91SAM9263_ID_SPI1 15 /* Serial Peripheral Interface 1 */ -#define AT91SAM9263_ID_SSC0 16 /* Serial Synchronous Controller 0 */ -#define AT91SAM9263_ID_SSC1 17 /* Serial Synchronous Controller 1 */ -#define AT91SAM9263_ID_AC97C 18 /* AC97 Controller */ -#define AT91SAM9263_ID_TCB 19 /* Timer Counter 0, 1 and 2 */ -#define AT91SAM9263_ID_PWMC 20 /* Pulse Width Modulation Controller */ -#define AT91SAM9263_ID_EMAC 21 /* Ethernet */ -#define AT91SAM9263_ID_2DGE 23 /* 2D Graphic Engine */ -#define AT91SAM9263_ID_UDP 24 /* USB Device Port */ -#define AT91SAM9263_ID_ISI 25 /* Image Sensor Interface */ -#define AT91SAM9263_ID_LCDC 26 /* LCD Controller */ -#define AT91SAM9263_ID_DMA 27 /* DMA Controller */ -#define AT91SAM9263_ID_UHP 29 /* USB Host port */ -#define AT91SAM9263_ID_IRQ0 30 /* Advanced Interrupt Controller (IRQ0) */ -#define AT91SAM9263_ID_IRQ1 31 /* Advanced Interrupt Controller (IRQ1) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9263_BASE_UDP 0xfff78000 -#define AT91SAM9263_BASE_TCB0 0xfff7c000 -#define AT91SAM9263_BASE_TC0 0xfff7c000 -#define AT91SAM9263_BASE_TC1 0xfff7c040 -#define AT91SAM9263_BASE_TC2 0xfff7c080 -#define AT91SAM9263_BASE_MCI0 0xfff80000 -#define AT91SAM9263_BASE_MCI1 0xfff84000 -#define AT91SAM9263_BASE_TWI 0xfff88000 -#define AT91SAM9263_BASE_US0 0xfff8c000 -#define AT91SAM9263_BASE_US1 0xfff90000 -#define AT91SAM9263_BASE_US2 0xfff94000 -#define AT91SAM9263_BASE_SSC0 0xfff98000 -#define AT91SAM9263_BASE_SSC1 0xfff9c000 -#define AT91SAM9263_BASE_AC97C 0xfffa0000 -#define AT91SAM9263_BASE_SPI0 0xfffa4000 -#define AT91SAM9263_BASE_SPI1 0xfffa8000 -#define AT91SAM9263_BASE_CAN 0xfffac000 -#define AT91SAM9263_BASE_PWMC 0xfffb8000 -#define AT91SAM9263_BASE_EMAC 0xfffbc000 -#define AT91SAM9263_BASE_ISI 0xfffc4000 -#define AT91SAM9263_BASE_2DGE 0xfffc8000 -#define AT91_BASE_SYS 0xffffe000 - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_ECC0 (0xffffe000 - AT91_BASE_SYS) -#define AT91_SDRAMC0 (0xffffe200 - AT91_BASE_SYS) -#define AT91_SMC0 (0xffffe400 - AT91_BASE_SYS) -#define AT91_ECC1 (0xffffe600 - AT91_BASE_SYS) -#define AT91_SDRAMC1 (0xffffe800 - AT91_BASE_SYS) -#define AT91_SMC1 (0xffffea00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffec00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffed10 - AT91_BASE_SYS) -#define AT91_DBGU (0xffffee00 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOE (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT0 (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9263_BASE_US0 -#define AT91_USART1 AT91SAM9263_BASE_US1 -#define AT91_USART2 AT91SAM9263_BASE_US2 - -#define AT91_SMC AT91_SMC0 - -/* - * Internal Memory. - */ -#define AT91SAM9263_SRAM0_BASE 0x00300000 /* Internal SRAM 0 base address */ -#define AT91SAM9263_SRAM0_SIZE (80 * SZ_1K) /* Internal SRAM 0 size (80Kb) */ - -#define AT91SAM9263_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9263_ROM_SIZE SZ_128K /* Internal ROM size (128Kb) */ - -#define AT91SAM9263_SRAM1_BASE 0x00500000 /* Internal SRAM 1 base address */ -#define AT91SAM9263_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */ - -#define AT91SAM9263_LCDC_BASE 0x00700000 /* LCD Controller */ -#define AT91SAM9263_DMAC_BASE 0x00800000 /* DMA Controller */ -#define AT91SAM9263_UHP_BASE 0x00a00000 /* USB Host controller */ - - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9263_matrix.h b/include/asm-arm/arch-at91/at91sam9263_matrix.h deleted file mode 100644 index 72f6e66..0000000 --- a/include/asm-arm/arch-at91/at91sam9263_matrix.h +++ /dev/null @@ -1,129 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9263_matrix.h - * - * Copyright (C) 2006 Atmel Corporation. - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9263 datasheet revision B (Preliminary). - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9263_MATRIX_H -#define AT91SAM9263_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */ -#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */ -#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */ -#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */ -#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */ -#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */ -#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */ -#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ -#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ -#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */ -#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) -#define AT91_MATRIX_RCB6 (1 << 6) -#define AT91_MATRIX_RCB7 (1 << 7) -#define AT91_MATRIX_RCB8 (1 << 8) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBI0CSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3) -#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4) -#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5) -#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16) - -#define AT91_MATRIX_EBI1CSA (AT91_MATRIX + 0x124) /* EBI1 Chip Select Assignment Register */ -#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1) -#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3) -#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16) - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9_sdramc.h b/include/asm-arm/arch-at91/at91sam9_sdramc.h deleted file mode 100644 index d3b8b3d..0000000 --- a/include/asm-arm/arch-at91/at91sam9_sdramc.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9_sdramc.h - * - * SDRAM Controllers (SDRAMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9_SDRAMC_H -#define AT91SAM9_SDRAMC_H - -/* SDRAM Controller (SDRAMC) registers */ -#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL 0 -#define AT91_SDRAMC_MODE_NOP 1 -#define AT91_SDRAMC_MODE_PRECHARGE 2 -#define AT91_SDRAMC_MODE_LMR 3 -#define AT91_SDRAMC_MODE_REFRESH 4 -#define AT91_SDRAMC_MODE_EXT_LMR 5 -#define AT91_SDRAMC_MODE_DEEP 6 - -#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */ - -#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_1 (1 << 5) -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_CAS_3 (3 << 5) -#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 7) -#define AT91_SDRAMC_DBW_16 (1 << 7) -#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */ -#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */ -#define AT91_SDRAMC_LPCB_DISABLE 0 -#define AT91_SDRAMC_LPCB_SELF_REFRESH 1 -#define AT91_SDRAMC_LPCB_POWER_DOWN 2 -#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3 -#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */ -#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ -#define AT91_SDRAMC_DS (3 << 10) /* Drive Strength */ -#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ -#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12) -#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12) -#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12) - -#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ -#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */ - -#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */ -#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */ -#define AT91_SDRAMC_MD_SDRAM 0 -#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 - - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9_smc.h b/include/asm-arm/arch-at91/at91sam9_smc.h deleted file mode 100644 index 9e49eed..0000000 --- a/include/asm-arm/arch-at91/at91sam9_smc.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9_smc.h - * - * Static Memory Controllers (SMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM9_SMC_H -#define AT91SAM9_SMC_H - -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ -#define AT91_SMC_NWESETUP_(x) ((x) << 0) -#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ -#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) -#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ -#define AT91_SMC_NRDSETUP_(x) ((x) << 16) -#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ -#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) - -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ -#define AT91_SMC_NWEPULSE_(x) ((x) << 0) -#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ -#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) -#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ -#define AT91_SMC_NRDPULSE_(x) ((x) << 16) -#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ -#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) - -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ -#define AT91_SMC_NWECYCLE_(x) ((x) << 0) -#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ -#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) - -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ -#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ -#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) -#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) -#define AT91_SMC_EXNWMODE_READY (3 << 4) -#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ -#define AT91_SMC_BAT_SELECT (0 << 8) -#define AT91_SMC_BAT_WRITE (1 << 8) -#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ -#define AT91_SMC_DBW_8 (0 << 12) -#define AT91_SMC_DBW_16 (1 << 12) -#define AT91_SMC_DBW_32 (2 << 12) -#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ -#define AT91_SMC_TDF_(x) ((x) << 16) -#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ -#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ -#define AT91_SMC_PS (3 << 28) /* Page Size */ -#define AT91_SMC_PS_4 (0 << 28) -#define AT91_SMC_PS_8 (1 << 28) -#define AT91_SMC_PS_16 (2 << 28) -#define AT91_SMC_PS_32 (3 << 28) - -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#endif - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h deleted file mode 100644 index 622e56f..0000000 --- a/include/asm-arm/arch-at91/at91sam9rl.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9260.h - * - * Copyright (C) 2007 Atmel Corporation - * - * Common definitions. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_H -#define AT91SAM9RL_H - -/* - * Peripheral identifiers/interrupts. - */ -#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ -#define AT91_ID_SYS 1 /* System Controller */ -#define AT91SAM9RL_ID_PIOA 2 /* Parallel IO Controller A */ -#define AT91SAM9RL_ID_PIOB 3 /* Parallel IO Controller B */ -#define AT91SAM9RL_ID_PIOC 4 /* Parallel IO Controller C */ -#define AT91SAM9RL_ID_PIOD 5 /* Parallel IO Controller D */ -#define AT91SAM9RL_ID_US0 6 /* USART 0 */ -#define AT91SAM9RL_ID_US1 7 /* USART 1 */ -#define AT91SAM9RL_ID_US2 8 /* USART 2 */ -#define AT91SAM9RL_ID_US3 9 /* USART 3 */ -#define AT91SAM9RL_ID_MCI 10 /* Multimedia Card Interface */ -#define AT91SAM9RL_ID_TWI0 11 /* TWI 0 */ -#define AT91SAM9RL_ID_TWI1 12 /* TWI 1 */ -#define AT91SAM9RL_ID_SPI 13 /* Serial Peripheral Interface */ -#define AT91SAM9RL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ -#define AT91SAM9RL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ -#define AT91SAM9RL_ID_TC0 16 /* Timer Counter 0 */ -#define AT91SAM9RL_ID_TC1 17 /* Timer Counter 1 */ -#define AT91SAM9RL_ID_TC2 18 /* Timer Counter 2 */ -#define AT91SAM9RL_ID_PWMC 19 /* Pulse Width Modulation Controller */ -#define AT91SAM9RL_ID_TSC 20 /* Touch Screen Controller */ -#define AT91SAM9RL_ID_DMA 21 /* DMA Controller */ -#define AT91SAM9RL_ID_UDPHS 22 /* USB Device HS */ -#define AT91SAM9RL_ID_LCDC 23 /* LCD Controller */ -#define AT91SAM9RL_ID_AC97C 24 /* AC97 Controller */ -#define AT91SAM9RL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ - - -/* - * User Peripheral physical base addresses. - */ -#define AT91SAM9RL_BASE_TCB0 0xfffa0000 -#define AT91SAM9RL_BASE_TC0 0xfffa0000 -#define AT91SAM9RL_BASE_TC1 0xfffa0040 -#define AT91SAM9RL_BASE_TC2 0xfffa0080 -#define AT91SAM9RL_BASE_MCI 0xfffa4000 -#define AT91SAM9RL_BASE_TWI0 0xfffa8000 -#define AT91SAM9RL_BASE_TWI1 0xfffac000 -#define AT91SAM9RL_BASE_US0 0xfffb0000 -#define AT91SAM9RL_BASE_US1 0xfffb4000 -#define AT91SAM9RL_BASE_US2 0xfffb8000 -#define AT91SAM9RL_BASE_US3 0xfffbc000 -#define AT91SAM9RL_BASE_SSC0 0xfffc0000 -#define AT91SAM9RL_BASE_SSC1 0xfffc4000 -#define AT91SAM9RL_BASE_PWMC 0xfffc8000 -#define AT91SAM9RL_BASE_SPI 0xfffcc000 -#define AT91SAM9RL_BASE_TSC 0xfffd0000 -#define AT91SAM9RL_BASE_UDPHS 0xfffd4000 -#define AT91SAM9RL_BASE_AC97C 0xfffd8000 -#define AT91_BASE_SYS 0xffffc000 - - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) -#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) -#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) -#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) -#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) -#define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) -#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) - -#define AT91_USART0 AT91SAM9RL_BASE_US0 -#define AT91_USART1 AT91SAM9RL_BASE_US1 -#define AT91_USART2 AT91SAM9RL_BASE_US2 -#define AT91_USART3 AT91SAM9RL_BASE_US3 - - -/* - * Internal Memory. - */ -#define AT91SAM9RL_SRAM_BASE 0x00300000 /* Internal SRAM base address */ -#define AT91SAM9RL_SRAM_SIZE SZ_16K /* Internal SRAM size (16Kb) */ - -#define AT91SAM9RL_ROM_BASE 0x00400000 /* Internal ROM base address */ -#define AT91SAM9RL_ROM_SIZE (2 * SZ_16K) /* Internal ROM size (32Kb) */ - -#define AT91SAM9RL_LCDC_BASE 0x00500000 /* LCD Controller */ -#define AT91SAM9RL_UDPHS_FIFO 0x00600000 /* USB Device HS controller */ - -#endif diff --git a/include/asm-arm/arch-at91/at91sam9rl_matrix.h b/include/asm-arm/arch-at91/at91sam9rl_matrix.h deleted file mode 100644 index 8422417..0000000 --- a/include/asm-arm/arch-at91/at91sam9rl_matrix.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam9rl_matrix.h - * - * Copyright (C) 2007 Atmel Corporation - * - * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9RL datasheet revision A. (Preliminary) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -#ifndef AT91SAM9RL_MATRIX_H -#define AT91SAM9RL_MATRIX_H - -#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ -#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ -#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ -#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ -#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ -#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ -#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ -#define AT91_MATRIX_ULBT_INFINITE (0 << 0) -#define AT91_MATRIX_ULBT_SINGLE (1 << 0) -#define AT91_MATRIX_ULBT_FOUR (2 << 0) -#define AT91_MATRIX_ULBT_EIGHT (3 << 0) -#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) - -#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ -#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ -#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ -#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ -#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ -#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */ -#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ -#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ -#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) -#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) -#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */ -#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ -#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) -#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) - -#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ -#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ -#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ -#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ -#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ -#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */ -#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ -#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ -#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ -#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ -#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ -#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ - -#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ -#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ -#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ -#define AT91_MATRIX_RCB2 (1 << 2) -#define AT91_MATRIX_RCB3 (1 << 3) -#define AT91_MATRIX_RCB4 (1 << 4) -#define AT91_MATRIX_RCB5 (1 << 5) - -#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x114) /* TCM Configuration Register */ -#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ -#define AT91_MATRIX_ITCM_0 (0 << 0) -#define AT91_MATRIX_ITCM_16 (5 << 0) -#define AT91_MATRIX_ITCM_32 (6 << 0) -#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ -#define AT91_MATRIX_DTCM_0 (0 << 4) -#define AT91_MATRIX_DTCM_16 (5 << 4) -#define AT91_MATRIX_DTCM_32 (6 << 4) - -#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI0 Chip Select Assignment Register */ -#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ -#define AT91_MATRIX_CS1A_SMC (0 << 1) -#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) -#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ -#define AT91_MATRIX_CS3A_SMC (0 << 3) -#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) -#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ -#define AT91_MATRIX_CS4A_SMC (0 << 4) -#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) -#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ -#define AT91_MATRIX_CS5A_SMC (0 << 5) -#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) -#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ -#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */ -#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16) -#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16) - - -#endif diff --git a/include/asm-arm/arch-at91/at91x40.h b/include/asm-arm/arch-at91/at91x40.h deleted file mode 100644 index 612203e..0000000 --- a/include/asm-arm/arch-at91/at91x40.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91x40.h - * - * (C) Copyright 2007, Greg Ungerer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91X40_H -#define AT91X40_H - -/* - * IRQ list. - */ -#define AT91_ID_FIQ 0 /* FIQ */ -#define AT91_ID_SYS 1 /* System Peripheral */ -#define AT91X40_ID_USART0 2 /* USART port 0 */ -#define AT91X40_ID_USART1 3 /* USART port 1 */ -#define AT91X40_ID_TC0 4 /* Timer/Counter 0 */ -#define AT91X40_ID_TC1 5 /* Timer/Counter 1*/ -#define AT91X40_ID_TC2 6 /* Timer/Counter 2*/ -#define AT91X40_ID_WD 7 /* Watchdog? */ -#define AT91X40_ID_PIOA 8 /* Parallel IO Controller A */ - -#define AT91X40_ID_IRQ0 16 /* External IRQ 0 */ -#define AT91X40_ID_IRQ1 17 /* External IRQ 1 */ -#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */ - -/* - * System Peripherals (offset from AT91_BASE_SYS) - */ -#define AT91_BASE_SYS 0xffc00000 - -#define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */ -#define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */ -#define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */ -#define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */ -#define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */ -#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ -#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ -#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ - -/* - * The AT91x40 series doesn't have a debug unit like the other AT91 parts. - * But it does have a chip identify register and extension ID, so define at - * least these here. - */ -#define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */ -#define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */ - -#endif /* AT91X40_H */ diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h deleted file mode 100644 index 48bbd85..0000000 --- a/include/asm-arm/arch-at91/board.h +++ /dev/null @@ -1,172 +0,0 @@ -/* - * include/asm-arm/arch-at91/board.h - * - * Copyright (C) 2005 HP Labs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * These are data structures found in platform_device.dev.platform_data, - * and describing board-specific data needed by drivers. For example, - * which pin is used for a given GPIO role. - * - * In 2.6, drivers should strongly avoid board-specific knowledge so - * that supporting new boards normally won't require driver patches. - * Most board-specific knowledge should be in arch/.../board-*.c files. - */ - -#ifndef __ASM_ARCH_BOARD_H -#define __ASM_ARCH_BOARD_H - -#include -#include -#include -#include -#include -#include - - /* USB Device */ -struct at91_udc_data { - u8 vbus_pin; /* high == host powering us */ - u8 pullup_pin; /* active == D+ pulled up */ - u8 pullup_active_low; /* true == pullup_pin is active low */ -}; -extern void __init at91_add_device_udc(struct at91_udc_data *data); - - /* USB High Speed Device */ -extern void __init at91_add_device_usba(struct usba_platform_data *data); - - /* Compact Flash */ -struct at91_cf_data { - u8 irq_pin; /* I/O IRQ */ - u8 det_pin; /* Card detect */ - u8 vcc_pin; /* power switching */ - u8 rst_pin; /* card reset */ - u8 chipselect; /* EBI Chip Select number */ -}; -extern void __init at91_add_device_cf(struct at91_cf_data *data); - - /* MMC / SD */ -struct at91_mmc_data { - u8 det_pin; /* card detect IRQ */ - unsigned slot_b:1; /* uses Slot B */ - unsigned wire4:1; /* (SD) supports DAT0..DAT3 */ - u8 wp_pin; /* (SD) writeprotect detect */ - u8 vcc_pin; /* power switching (high == on) */ -}; -extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); - - /* Ethernet (EMAC & MACB) */ -struct at91_eth_data { - u32 phy_mask; - u8 phy_irq_pin; /* PHY IRQ */ - u8 is_rmii; /* using RMII interface? */ -}; -extern void __init at91_add_device_eth(struct at91_eth_data *data); - -#if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) -#define eth_platform_data at91_eth_data -#endif - - /* USB Host */ -struct at91_usbh_data { - u8 ports; /* number of ports on root hub */ - u8 vbus_pin[]; /* port power-control pin */ -}; -extern void __init at91_add_device_usbh(struct at91_usbh_data *data); - - /* NAND / SmartMedia */ -struct atmel_nand_data { - u8 enable_pin; /* chip enable */ - u8 det_pin; /* card detect */ - u8 rdy_pin; /* ready/busy */ - u8 ale; /* address line number connected to ALE */ - u8 cle; /* address line number connected to CLE */ - u8 bus_width_16; /* buswidth is 16 bit */ - struct mtd_partition* (*partition_info)(int, int*); -}; -extern void __init at91_add_device_nand(struct atmel_nand_data *data); - - /* I2C*/ -extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices); - - /* SPI */ -extern void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices); - - /* Serial */ -#define ATMEL_UART_CTS 0x01 -#define ATMEL_UART_RTS 0x02 -#define ATMEL_UART_DSR 0x04 -#define ATMEL_UART_DTR 0x08 -#define ATMEL_UART_DCD 0x10 -#define ATMEL_UART_RI 0x20 - -extern void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins); -extern void __init at91_set_serial_console(unsigned portnr); - -struct at91_uart_config { - unsigned short console_tty; /* tty number of serial console */ - unsigned short nr_tty; /* number of serial tty's */ - short tty_map[]; /* map UART to tty number */ -}; -extern struct platform_device *atmel_default_console_device; -extern void __init __deprecated at91_init_serial(struct at91_uart_config *config); - -struct atmel_uart_data { - short use_dma_tx; /* use transmit DMA? */ - short use_dma_rx; /* use receive DMA? */ - void __iomem *regs; /* virtual base address, if any */ -}; -extern void __init at91_add_device_serial(void); - -/* - * SSC -- accessed through ssc_request(id). Drivers don't bind to SSC - * platform devices. Their SSC ID is part of their configuration data, - * along with information about which SSC signals they should use. - */ -#define ATMEL_SSC_TK 0x01 -#define ATMEL_SSC_TF 0x02 -#define ATMEL_SSC_TD 0x04 -#define ATMEL_SSC_TX (ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD) - -#define ATMEL_SSC_RK 0x10 -#define ATMEL_SSC_RF 0x20 -#define ATMEL_SSC_RD 0x40 -#define ATMEL_SSC_RX (ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD) - -extern void __init at91_add_device_ssc(unsigned id, unsigned pins); - - /* LCD Controller */ -struct atmel_lcdfb_info; -extern void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data); - - /* AC97 */ -struct atmel_ac97_data { - u8 reset_pin; /* reset */ -}; -extern void __init at91_add_device_ac97(struct atmel_ac97_data *data); - - /* ISI */ -extern void __init at91_add_device_isi(void); - - /* LEDs */ -extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); -extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); - -/* FIXME: this needs a better location, but gets stuff building again */ -extern int at91_suspend_entering_slow_clock(void); - -#endif diff --git a/include/asm-arm/arch-at91/cpu.h b/include/asm-arm/arch-at91/cpu.h deleted file mode 100644 index f24b55c..0000000 --- a/include/asm-arm/arch-at91/cpu.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * include/asm-arm/arch-at91/cpu.h - * - * Copyright (C) 2006 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_CPU_H -#define __ASM_ARCH_CPU_H - -#include -#include - - -#define ARCH_ID_AT91RM9200 0x09290780 -#define ARCH_ID_AT91SAM9260 0x019803a0 -#define ARCH_ID_AT91SAM9261 0x019703a0 -#define ARCH_ID_AT91SAM9263 0x019607a0 -#define ARCH_ID_AT91SAM9G20 0x019905a0 -#define ARCH_ID_AT91SAM9RL64 0x019b03a0 -#define ARCH_ID_AT91CAP9 0x039A03A0 - -#define ARCH_ID_AT91SAM9XE128 0x329973a0 -#define ARCH_ID_AT91SAM9XE256 0x329a93a0 -#define ARCH_ID_AT91SAM9XE512 0x329aa3a0 - -#define ARCH_ID_AT91M40800 0x14080044 -#define ARCH_ID_AT91R40807 0x44080746 -#define ARCH_ID_AT91M40807 0x14080745 -#define ARCH_ID_AT91R40008 0x44000840 - -static inline unsigned long at91_cpu_identify(void) -{ - return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); -} - - -#define ARCH_FAMILY_AT91X92 0x09200000 -#define ARCH_FAMILY_AT91SAM9 0x01900000 -#define ARCH_FAMILY_AT91SAM9XE 0x02900000 - -static inline unsigned long at91_arch_identify(void) -{ - return (at91_sys_read(AT91_DBGU_CIDR) & AT91_CIDR_ARCH); -} - - -#ifdef CONFIG_ARCH_AT91RM9200 -#define cpu_is_at91rm9200() (at91_cpu_identify() == ARCH_ID_AT91RM9200) -#else -#define cpu_is_at91rm9200() (0) -#endif - -#ifdef CONFIG_ARCH_AT91SAM9260 -#define cpu_is_at91sam9xe() (at91_arch_identify() == ARCH_FAMILY_AT91SAM9XE) -#define cpu_is_at91sam9260() ((at91_cpu_identify() == ARCH_ID_AT91SAM9260) || cpu_is_at91sam9xe()) -#else -#define cpu_is_at91sam9xe() (0) -#define cpu_is_at91sam9260() (0) -#endif - -#ifdef CONFIG_ARCH_AT91SAM9G20 -#define cpu_is_at91sam9g20() (at91_cpu_identify() == ARCH_ID_AT91SAM9G20) -#else -#define cpu_is_at91sam9g20() (0) -#endif - -#ifdef CONFIG_ARCH_AT91SAM9261 -#define cpu_is_at91sam9261() (at91_cpu_identify() == ARCH_ID_AT91SAM9261) -#else -#define cpu_is_at91sam9261() (0) -#endif - -#ifdef CONFIG_ARCH_AT91SAM9263 -#define cpu_is_at91sam9263() (at91_cpu_identify() == ARCH_ID_AT91SAM9263) -#else -#define cpu_is_at91sam9263() (0) -#endif - -#ifdef CONFIG_ARCH_AT91SAM9RL -#define cpu_is_at91sam9rl() (at91_cpu_identify() == ARCH_ID_AT91SAM9RL64) -#else -#define cpu_is_at91sam9rl() (0) -#endif - -#ifdef CONFIG_ARCH_AT91CAP9 -#define cpu_is_at91cap9() (at91_cpu_identify() == ARCH_ID_AT91CAP9) -#else -#define cpu_is_at91cap9() (0) -#endif - -/* - * Since this is ARM, we will never run on any AVR32 CPU. But these - * definitions may reduce clutter in common drivers. - */ -#define cpu_is_at32ap7000() (0) - -#endif diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S deleted file mode 100644 index ff28696..0000000 --- a/include/asm-arm/arch-at91/debug-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-at91/debug-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Debugging macro include header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) - ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)] @ Write to Transmitter Holding Register - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register - tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register - tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete - beq 1001b - .endm - diff --git a/include/asm-arm/arch-at91/dma.h b/include/asm-arm/arch-at91/dma.h deleted file mode 100644 index 7745654..0000000 --- a/include/asm-arm/arch-at91/dma.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/arch-at91/dma.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-at91/entry-macro.S b/include/asm-arm/arch-at91/entry-macro.S deleted file mode 100644 index cbaf605..0000000 --- a/include/asm-arm/arch-at91/entry-macro.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-at91/entry-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Low-level IRQ helper macros for AT91RM9200 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) - ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number - teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt - streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. - .endm - diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h deleted file mode 100644 index 0a241e2..0000000 --- a/include/asm-arm/arch-at91/gpio.h +++ /dev/null @@ -1,252 +0,0 @@ -/* - * include/asm-arm/arch-at91/gpio.h - * - * Copyright (C) 2005 HP Labs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_AT91RM9200_GPIO_H -#define __ASM_ARCH_AT91RM9200_GPIO_H - -#include - -#define PIN_BASE NR_AIC_IRQS - -#define MAX_GPIO_BANKS 5 - -/* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ - -#define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) -#define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) -#define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) -#define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) -#define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) -#define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) -#define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) -#define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) -#define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) -#define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) -#define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) -#define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) -#define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) -#define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) -#define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) -#define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) -#define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) -#define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) -#define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) -#define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) -#define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) -#define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) -#define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) -#define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) -#define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) -#define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) -#define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) -#define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) -#define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) -#define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) -#define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) -#define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) - -#define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) -#define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) -#define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) -#define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) -#define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) -#define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) -#define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) -#define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) -#define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) -#define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) -#define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) -#define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) -#define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) -#define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) -#define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) -#define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) -#define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) -#define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) -#define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) -#define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) -#define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) -#define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) -#define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) -#define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) -#define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) -#define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) -#define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) -#define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) -#define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) -#define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) -#define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) -#define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) - -#define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) -#define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) -#define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) -#define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) -#define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) -#define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) -#define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) -#define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) -#define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) -#define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) -#define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) -#define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) -#define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) -#define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) -#define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) -#define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) -#define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) -#define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) -#define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) -#define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) -#define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) -#define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) -#define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) -#define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) -#define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) -#define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) -#define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) -#define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) -#define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) -#define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) -#define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) -#define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) - -#define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) -#define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) -#define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) -#define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) -#define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) -#define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) -#define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) -#define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) -#define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) -#define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) -#define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) -#define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) -#define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) -#define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) -#define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) -#define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) -#define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) -#define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) -#define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) -#define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) -#define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) -#define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) -#define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) -#define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) -#define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) -#define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) -#define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) -#define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) -#define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) -#define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) -#define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) -#define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) - -#define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) -#define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) -#define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) -#define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) -#define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) -#define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) -#define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) -#define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) -#define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) -#define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) -#define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) -#define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) -#define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) -#define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) -#define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) -#define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) -#define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) -#define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) -#define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) -#define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) -#define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) -#define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) -#define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) -#define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) -#define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) -#define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) -#define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) -#define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) -#define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) -#define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) -#define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) -#define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) - -#ifndef __ASSEMBLY__ -/* setup setup routines, called from board init or driver probe() */ -extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup); -extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); -extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup); -extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup); -extern int __init_or_module at91_set_gpio_output(unsigned pin, int value); -extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on); -extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on); - -/* callable at any time */ -extern int at91_set_gpio_value(unsigned pin, int value); -extern int at91_get_gpio_value(unsigned pin); - -/* callable only from core power-management code */ -extern void at91_gpio_suspend(void); -extern void at91_gpio_resume(void); - -/*-------------------------------------------------------------------------*/ - -/* wrappers for "new style" GPIO calls. the old AT91-specfic ones should - * eventually be removed (along with this errno.h inclusion), and the - * gpio request/free calls should probably be implemented. - */ - -#include - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return 0; -} - -static inline void gpio_free(unsigned gpio) -{ -} - -extern int gpio_direction_input(unsigned gpio); -extern int gpio_direction_output(unsigned gpio, int value); - -static inline int gpio_get_value(unsigned gpio) -{ - return at91_get_gpio_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - at91_set_gpio_value(gpio, value); -} - -#include /* cansleep wrappers */ - -static inline int gpio_to_irq(unsigned gpio) -{ - return gpio; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return irq; -} - -#endif /* __ASSEMBLY__ */ - -#endif diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h deleted file mode 100644 index 016a3a3..0000000 --- a/include/asm-arm/arch-at91/hardware.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-arm/arch-at91/hardware.h - * - * Copyright (C) 2003 SAN People - * Copyright (C) 2003 ATMEL - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -#if defined(CONFIG_ARCH_AT91RM9200) -#include -#elif defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9G20) -#include -#elif defined(CONFIG_ARCH_AT91SAM9261) -#include -#elif defined(CONFIG_ARCH_AT91SAM9263) -#include -#elif defined(CONFIG_ARCH_AT91SAM9RL) -#include -#elif defined(CONFIG_ARCH_AT91CAP9) -#include -#elif defined(CONFIG_ARCH_AT91X40) -#include -#else -#error "Unsupported AT91 processor" -#endif - - -#ifdef CONFIG_MMU -/* - * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF - * to 0xFEF78000 .. 0xFF000000. (544Kb) - */ -#define AT91_IO_PHYS_BASE 0xFFF78000 -#define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) -#else -/* - * Identity mapping for the non MMU case. - */ -#define AT91_IO_PHYS_BASE AT91_BASE_SYS -#define AT91_IO_VIRT_BASE AT91_IO_PHYS_BASE -#endif - -#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) - - /* Convert a physical IO address to virtual IO address */ -#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) - -/* - * Virtual to Physical Address mapping for IO devices. - */ -#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) -#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) - - /* Internal SRAM is mapped below the IO devices */ -#define AT91_SRAM_MAX SZ_1M -#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX) - -/* Serial ports */ -#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */ - -/* External Memory Map */ -#define AT91_CHIPSELECT_0 0x10000000 -#define AT91_CHIPSELECT_1 0x20000000 -#define AT91_CHIPSELECT_2 0x30000000 -#define AT91_CHIPSELECT_3 0x40000000 -#define AT91_CHIPSELECT_4 0x50000000 -#define AT91_CHIPSELECT_5 0x60000000 -#define AT91_CHIPSELECT_6 0x70000000 -#define AT91_CHIPSELECT_7 0x80000000 - -/* SDRAM */ -#ifdef CONFIG_DRAM_BASE -#define AT91_SDRAM_BASE CONFIG_DRAM_BASE -#else -#define AT91_SDRAM_BASE AT91_CHIPSELECT_1 -#endif - -/* Clocks */ -#define AT91_SLOW_CLOCK 32768 /* slow clock */ - - -#endif diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h deleted file mode 100644 index f8beaa2..0000000 --- a/include/asm-arm/arch-at91/io.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-arm/arch-at91/io.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xFFFFFFFF - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - - -#ifndef __ASSEMBLY__ - -static inline unsigned int at91_sys_read(unsigned int reg_offset) -{ - void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - - return __raw_readl(addr + reg_offset); -} - -static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) -{ - void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; - - __raw_writel(value, addr + reg_offset); -} - -#endif - -#endif diff --git a/include/asm-arm/arch-at91/irqs.h b/include/asm-arm/arch-at91/irqs.h deleted file mode 100644 index 70b1216..0000000 --- a/include/asm-arm/arch-at91/irqs.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-arm/arch-at91/irqs.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include -#include - -#define NR_AIC_IRQS 32 - - -/* - * Acknowledge interrupt with AIC after interrupt has been handled. - * (by kernel/irq.c) - */ -#define irq_finish(irq) do { at91_sys_write(AT91_AIC_EOICR, 0); } while (0) - - -/* - * IRQ interrupt symbols are the AT91xxx_ID_* symbols - * for IRQs handled directly through the AIC, or else the AT91_PIN_* - * symbols in gpio.h for ones handled indirectly as GPIOs. - * We make provision for 5 banks of GPIO. - */ -#define NR_IRQS (NR_AIC_IRQS + (5 * 32)) - -/* FIQ is AIC source 0. */ -#define FIQ_START AT91_ID_FIQ - -#endif diff --git a/include/asm-arm/arch-at91/memory.h b/include/asm-arm/arch-at91/memory.h deleted file mode 100644 index 904fbd6..0000000 --- a/include/asm-arm/arch-at91/memory.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-at91/memory.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -#define PHYS_OFFSET (AT91_SDRAM_BASE) - - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-at91/system.h b/include/asm-arm/arch-at91/system.h deleted file mode 100644 index c5e3d03..0000000 --- a/include/asm-arm/arch-at91/system.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * include/asm-arm/arch-at91/system.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static inline void arch_idle(void) -{ - /* - * Disable the processor clock. The processor will be automatically - * re-enabled by an interrupt or by a reset. - */ -// at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); - - /* - * Set the processor (CP15) into 'Wait for Interrupt' mode. - * Unlike disabling the processor clock via the PMC (above) - * this allows the processor to be woken via JTAG. - */ - cpu_do_idle(); -} - -void (*at91_arch_reset)(void); - -static inline void arch_reset(char mode) -{ - /* call the CPU-specific reset function */ - if (at91_arch_reset) - (at91_arch_reset)(); -} - -#endif diff --git a/include/asm-arm/arch-at91/timex.h b/include/asm-arm/arch-at91/timex.h deleted file mode 100644 index 67c86a8..0000000 --- a/include/asm-arm/arch-at91/timex.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * include/asm-arm/arch-at91/timex.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#include - -#if defined(CONFIG_ARCH_AT91RM9200) - -#define CLOCK_TICK_RATE (AT91_SLOW_CLOCK) - -#elif defined(CONFIG_ARCH_AT91SAM9260) - -#if defined(CONFIG_MACH_USB_A9260) || defined(CONFIG_MACH_QIL_A9260) -#define AT91SAM9_MASTER_CLOCK 90000000 -#else -#define AT91SAM9_MASTER_CLOCK 99300000 -#endif - -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9261) - -#define AT91SAM9_MASTER_CLOCK 99300000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9263) - -#if defined(CONFIG_MACH_USB_A9263) -#define AT91SAM9_MASTER_CLOCK 90000000 -#else -#define AT91SAM9_MASTER_CLOCK 99959500 -#endif - -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9RL) - -#define AT91SAM9_MASTER_CLOCK 100000000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91SAM9G20) - -#define AT91SAM9_MASTER_CLOCK 132096000 -#define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91CAP9) - -#define AT91CAP9_MASTER_CLOCK 100000000 -#define CLOCK_TICK_RATE (AT91CAP9_MASTER_CLOCK/16) - -#elif defined(CONFIG_ARCH_AT91X40) - -#define AT91X40_MASTER_CLOCK 40000000 -#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) - -#endif - -#endif diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h deleted file mode 100644 index f5636a8..0000000 --- a/include/asm-arm/arch-at91/uncompress.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * include/asm-arm/arch-at91/uncompress.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include -#include - -#if defined(CONFIG_AT91_EARLY_DBGU) -#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS) -#elif defined(CONFIG_AT91_EARLY_USART0) -#define UART_OFFSET AT91_USART0 -#elif defined(CONFIG_AT91_EARLY_USART1) -#define UART_OFFSET AT91_USART1 -#elif defined(CONFIG_AT91_EARLY_USART2) -#define UART_OFFSET AT91_USART2 -#elif defined(CONFIG_AT91_EARLY_USART3) -#define UART_OFFSET AT91_USART3 -#elif defined(CONFIG_AT91_EARLY_USART4) -#define UART_OFFSET AT91_USART4 -#elif defined(CONFIG_AT91_EARLY_USART5) -#define UART_OFFSET AT91_USART5 -#endif - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline - */ -static void putc(int c) -{ -#ifdef UART_OFFSET - void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ - - while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY)) - barrier(); - __raw_writel(c, sys + ATMEL_US_THR); -#endif -} - -static inline void flush(void) -{ -#ifdef UART_OFFSET - void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */ - - /* wait for transmission to complete */ - while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY)) - barrier(); -#endif -} - -#define arch_decomp_setup() - -#define arch_decomp_wdog() - -#endif diff --git a/include/asm-arm/arch-at91/vmalloc.h b/include/asm-arm/arch-at91/vmalloc.h deleted file mode 100644 index bb05e70..0000000 --- a/include/asm-arm/arch-at91/vmalloc.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-at91/vmalloc.h - * - * Copyright (C) 2003 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (AT91_VIRT_BASE & PGDIR_MASK) - -#endif diff --git a/include/asm-arm/arch-cl7500/acornfb.h b/include/asm-arm/arch-cl7500/acornfb.h deleted file mode 100644 index aea6330..0000000 --- a/include/asm-arm/arch-cl7500/acornfb.h +++ /dev/null @@ -1,33 +0,0 @@ -#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119) - -static inline void -acornfb_vidc20_find_rates(struct vidc_timing *vidc, - struct fb_var_screeninfo *var) -{ - u_int bandwidth; - - vidc->control |= VIDC20_CTRL_PIX_CK; - - /* Calculate bandwidth */ - bandwidth = var->pixclock * 8 / var->bits_per_pixel; - - /* Encode bandwidth as VIDC20 setting */ - if (bandwidth > 16667*2) - vidc->control |= VIDC20_CTRL_FIFO_16; - else if (bandwidth > 13333*2) - vidc->control |= VIDC20_CTRL_FIFO_20; - else if (bandwidth > 11111*2) - vidc->control |= VIDC20_CTRL_FIFO_24; - else - vidc->control |= VIDC20_CTRL_FIFO_28; - - vidc->pll_ctl = 0x2020; -} - -#ifdef CONFIG_CHRONTEL_7003 -#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK -#else -#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK -#endif - -#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK diff --git a/include/asm-arm/arch-cl7500/debug-macro.S b/include/asm-arm/arch-cl7500/debug-macro.S deleted file mode 100644 index 9a2b67d..0000000 --- a/include/asm-arm/arch-cl7500/debug-macro.S +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/include/asm-arm/arch-cl7500/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mov \rx, #0xe0000000 - orr \rx, \rx, #0x00010000 - orr \rx, \rx, #0x00000be0 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-cl7500/dma.h b/include/asm-arm/arch-cl7500/dma.h deleted file mode 100644 index 591ed25..0000000 --- a/include/asm-arm/arch-cl7500/dma.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/dma.h - * - * Copyright (C) 1999 Nexus Electronics Ltd. - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* DMA is not yet implemented! It should be the same as acorn, copy over.. */ - -/* - * This is the maximum DMA address that can be DMAd to. - * There should not be more than (0xd0000000 - 0xc0000000) - * bytes of RAM. - */ -#define MAX_DMA_ADDRESS 0xd0000000 - -#define DMA_S0 0 - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S deleted file mode 100644 index 5bd5555..0000000 --- a/include/asm-arm/arch-cl7500/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -#include -#include - - .equ ioc_base_high, IOC_BASE & 0xff000000 - .equ ioc_base_low, IOC_BASE & 0x00ff0000 - - .macro get_irqnr_preamble, base, tmp - mov \base, #ioc_base_high @ point at IOC - .if ioc_base_low - orr \base, \base, #ioc_base_low - .endif - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h deleted file mode 100644 index 1adfd18..0000000 --- a/include/asm-arm/arch-cl7500/hardware.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/hardware.h - * - * Copyright (C) 1996-1999 Russell King. - * Copyright (C) 1999 Nexus Electronics Ltd. - * - * This file contains the hardware definitions of the - * CL7500 evaluation board. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -#ifdef __ASSEMBLY__ -#define IOMEM(x) x -#else -#define IOMEM(x) ((void __iomem *)(x)) -#endif - -/* - * What hardware must be present - */ -#define HAS_IOMD -#define HAS_VIDC20 - -/* Hardware addresses of major areas. - * *_START is the physical address - * *_SIZE is the size of the region - * *_BASE is the virtual address - */ - -#define IO_START 0x03000000 /* I/O */ -#define IO_SIZE 0x01000000 -#define IO_BASE IOMEM(0xe0000000) - -#define ISA_START 0x0c000000 /* ISA */ -#define ISA_SIZE 0x00010000 -#define ISA_BASE 0xe1000000 - -#define FLASH_START 0x01000000 /* XXX */ -#define FLASH_SIZE 0x01000000 -#define FLASH_BASE 0xe2000000 - -#define LED_START 0x0302B000 -#define LED_SIZE 0x00001000 -#define LED_BASE 0xe3000000 -#define LED_ADDRESS (LED_BASE + 0xa00) - -/* Let's define SCREEN_START for CL7500, even though it's a lie. */ -#define SCREEN_START 0x02000000 /* VRAM */ -#define SCREEN_END 0xdfc00000 -#define SCREEN_BASE 0xdf800000 - -#define VIDC_BASE (void __iomem *)0xe0400000 -#define IOMD_BASE IOMEM(0xe0200000) -#define IOC_BASE IOMEM(0xe0200000) -#define FLOPPYDMA_BASE IOMEM(0xe002a000) -#define PCIO_BASE IOMEM(0xe0010000) - -#define vidc_writel(val) __raw_writel(val, VIDC_BASE) - -/* in/out bias for the ISA slot region */ -#define ISASLOT_IO 0x80400000 - -#endif diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h deleted file mode 100644 index 80f9b19..0000000 --- a/include/asm-arm/arch-cl7500/io.h +++ /dev/null @@ -1,255 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/io.h - * from linux/include/asm-arm/arch-rpc/io.h - * - * Copyright (C) 1997 Russell King - * - * Modifications: - * 06-Dec-1997 RMK Created. - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * GCC is totally crap at loading/storing data. We try to persuade it - * to do the right thing by using these whereever possible instead of - * the above. - */ -#define __arch_base_getb(b,o) \ - ({ \ - unsigned int v, r = (b); \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2]" \ - : "=r" (v) \ - : "r" (r), "Ir" (o)); \ - v; \ - }) - -#define __arch_base_getl(b,o) \ - ({ \ - unsigned int v, r = (b); \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2]" \ - : "=r" (v) \ - : "r" (r), "Ir" (o)); \ - v; \ - }) - -#define __arch_base_putb(v,b,o) \ - ({ \ - unsigned int r = (b); \ - __asm__ __volatile__( \ - "strb %0, [%1, %2]" \ - : \ - : "r" (v), "r" (r), "Ir" (o)); \ - }) - -#define __arch_base_putl(v,b,o) \ - ({ \ - unsigned int r = (b); \ - __asm__ __volatile__( \ - "str %0, [%1, %2]" \ - : \ - : "r" (v), "r" (r), "Ir" (o)); \ - }) - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! - */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) - -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ -static inline void __outb (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "strb %1, [%0, %2, lsl #2] @ outb" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outw (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outw" - : "=&r" (temp) - : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outl (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outl" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline unsigned int __ioaddr (unsigned int port) \ -{ \ - if (__PORT_PCIO(port)) \ - return (unsigned int)(PCIO_BASE + (port << 2)); \ - else \ - return (unsigned int)(IO_BASE + (port << 2)); \ -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __ioaddrc(port) \ - (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2)) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) -/* the following macro is deprecated */ -#define ioaddr(port) __ioaddr((port)) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) - -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - -#endif diff --git a/include/asm-arm/arch-cl7500/irq.h b/include/asm-arm/arch-cl7500/irq.h deleted file mode 100644 index 4b28633..0000000 --- a/include/asm-arm/arch-cl7500/irq.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-cl7500/irq.h - * - * Copyright (C) 1996 Russell King - * Copyright (C) 1999, 2001 Nexus Electronics Ltd. - * - * Changelog: - * 10-10-1996 RMK Brought up to date with arch-sa110eval - * 22-08-1998 RMK Restructured IRQ routines - * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code - */ - -#include -#include - -static inline int fixup_irq(unsigned int irq) -{ - if (irq == IRQ_ISA) { - int isabits = *((volatile unsigned int *)0xe002b700); - if (isabits == 0) { - printk("Spurious ISA IRQ!\n"); - return irq; - } - irq = IRQ_ISA_BASE; - while (!(isabits & 1)) { - irq++; - isabits >>= 1; - } - } - - return irq; -} diff --git a/include/asm-arm/arch-cl7500/irqs.h b/include/asm-arm/arch-cl7500/irqs.h deleted file mode 100644 index f20996e..0000000 --- a/include/asm-arm/arch-cl7500/irqs.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/irqs.h - * - * Copyright (C) 1999 Nexus Electronics Ltd - */ - -#define IRQ_INT2 0 -#define IRQ_INT1 2 -#define IRQ_VSYNCPULSE 3 -#define IRQ_POWERON 4 -#define IRQ_TIMER0 5 -#define IRQ_TIMER1 6 -#define IRQ_FORCE 7 -#define IRQ_INT8 8 -#define IRQ_ISA 9 -#define IRQ_INT6 10 -#define IRQ_INT5 11 -#define IRQ_INT4 12 -#define IRQ_INT3 13 -#define IRQ_KEYBOARDTX 14 -#define IRQ_KEYBOARDRX 15 - -#define IRQ_DMA0 16 -#define IRQ_DMA1 17 -#define IRQ_DMA2 18 -#define IRQ_DMA3 19 -#define IRQ_DMAS0 20 -#define IRQ_DMAS1 21 - -#define IRQ_IOP0 24 -#define IRQ_IOP1 25 -#define IRQ_IOP2 26 -#define IRQ_IOP3 27 -#define IRQ_IOP4 28 -#define IRQ_IOP5 29 -#define IRQ_IOP6 30 -#define IRQ_IOP7 31 - -#define IRQ_MOUSERX 40 -#define IRQ_MOUSETX 41 -#define IRQ_ADC 42 -#define IRQ_EVENT1 43 -#define IRQ_EVENT2 44 - -#define IRQ_ISA_BASE 48 -#define IRQ_ISA_3 48 -#define IRQ_ISA_4 49 -#define IRQ_ISA_5 50 -#define IRQ_ISA_7 51 -#define IRQ_ISA_9 52 -#define IRQ_ISA_10 53 -#define IRQ_ISA_11 54 -#define IRQ_ISA_14 55 - -#define FIQ_INT9 0 -#define FIQ_INT5 1 -#define FIQ_INT6 4 -#define FIQ_INT8 6 -#define FIQ_FORCE 7 - -/* - * This is the offset of the FIQ "IRQ" numbers - */ -#define FIQ_START 64 - -#define IRQ_TIMER IRQ_TIMER0 diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h deleted file mode 100644 index 3178140..0000000 --- a/include/asm-arm/arch-cl7500/memory.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/memory.h - * - * Copyright (c) 1996,1997,1998 Russell King. - * - * Changelog: - * 20-Oct-1996 RMK Created - * 31-Dec-1997 RMK Fixed definitions to reduce warnings - * 11-Jan-1998 RMK Uninlined to reduce hits on cache - * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt - * 21-Mar-1999 RMK Renamed to memory.h - * RMK Added TASK_SIZE and PAGE_OFFSET - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x10000000) - -/* - * These are exactly the same on the RiscPC as the - * physical memory view. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * Cache flushing area - ROM - */ -#define FLUSH_BASE_PHYS 0x00000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/include/asm-arm/arch-cl7500/system.h b/include/asm-arm/arch-cl7500/system.h deleted file mode 100644 index a9505d6..0000000 --- a/include/asm-arm/arch-cl7500/system.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/system.h - * - * Copyright (c) 1999 Nexus Electronics Ltd. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static inline void arch_idle(void) -{ - iomd_writeb(0, IOMD_SUSMODE); -} - -#define arch_reset(mode) \ - do { \ - iomd_writeb(0, IOMD_ROMCR0); \ - cpu_reset(0); \ - } while (0) - -#endif diff --git a/include/asm-arm/arch-cl7500/timex.h b/include/asm-arm/arch-cl7500/timex.h deleted file mode 100644 index 8a4175f..0000000 --- a/include/asm-arm/arch-cl7500/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/timex.h - * - * CL7500 architecture timex specifications - * - * Copyright (C) 1999 Nexus Electronics Ltd - */ - -/* - * On the ARM7500, the clock ticks at 2MHz. - */ -#define CLOCK_TICK_RATE 2000000 - diff --git a/include/asm-arm/arch-cl7500/uncompress.h b/include/asm-arm/arch-cl7500/uncompress.h deleted file mode 100644 index c437e0c..0000000 --- a/include/asm-arm/arch-cl7500/uncompress.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/uncompress.h - * - * Copyright (C) 1999, 2000 Nexus Electronics Ltd. - */ -#define BASE 0x03010000 -#define SERBASE (BASE + (0x2f8 << 2)) - -static inline void putc(char c) -{ - while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20)) - barrier(); - - *((volatile unsigned int *)(SERBASE)) = c; -} - -static inline void flush(void) -{ -} - -static __inline__ void arch_decomp_setup(void) -{ - int baud = 3686400 / (9600 * 32); - - *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80; - *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff; - *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8; - *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */ - *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */ -} - -/* - * nothing to do - */ -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-cl7500/vmalloc.h b/include/asm-arm/arch-cl7500/vmalloc.h deleted file mode 100644 index ba8d7a8..0000000 --- a/include/asm-arm/arch-cl7500/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * linux/include/asm-arm/arch-cl7500/vmalloc.h - */ -#define VMALLOC_END (PAGE_OFFSET + 0x1c000000) diff --git a/include/asm-arm/arch-clps711x/autcpu12.h b/include/asm-arm/arch-clps711x/autcpu12.h deleted file mode 100644 index 1588a36..0000000 --- a/include/asm-arm/arch-clps711x/autcpu12.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * AUTCPU12 specific defines - * - * (c) 2001 Thomas Gleixner, autronix automation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_AUTCPU12_H -#define __ASM_ARCH_AUTCPU12_H - -/* - * The CS8900A ethernet chip has its I/O registers wired to chip select 2 - * (nCS2). This is the mapping for it. - */ -#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */ -#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */ - -/* - * The flash bank is wired to chip select 0 - */ -#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */ - -/* offset for device specific information structure */ -#define AUTCPU12_LCDINFO_OFFS (0x00010000) -/* -* Videomemory is the internal SRAM (CS 6) -*/ -#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE -#define AUTCPU12_VIRT_VIDEO (0xfd000000) - -/* -* All special IO's are tied to CS1 -*/ -#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */ - -#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */ - -#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */ - -#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */ - -#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */ - -#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */ - -#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */ - -#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */ - -/* -* defines for smartmedia card access -*/ -#define AUTCPU12_SMC_RDY (1<<2) -#define AUTCPU12_SMC_ALE (1<<3) -#define AUTCPU12_SMC_CLE (1<<4) -#define AUTCPU12_SMC_PORT_OFFSET PBDR -#define AUTCPU12_SMC_SELECT_OFFSET 0x10 -/* -* defines for lcd contrast -*/ -#define AUTCPU12_DPOT_PORT_OFFSET PEDR -#define AUTCPU12_DPOT_CS (1<<0) -#define AUTCPU12_DPOT_CLK (1<<1) -#define AUTCPU12_DPOT_UD (1<<2) - -#endif diff --git a/include/asm-arm/arch-clps711x/debug-macro.S b/include/asm-arm/arch-clps711x/debug-macro.S deleted file mode 100644 index bc0a576..0000000 --- a/include/asm-arm/arch-clps711x/debug-macro.S +++ /dev/null @@ -1,46 +0,0 @@ -/* linux/include/asm-arm/arch-clps711x/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #CLPS7111_PHYS_BASE - movne \rx, #CLPS7111_VIRT_BASE -#ifndef CONFIG_DEBUG_CLPS711X_UART2 - add \rx, \rx, #0x0000 @ UART1 -#else - add \rx, \rx, #0x1000 @ UART2 -#endif - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x0480] @ UARTDR - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx - tst \rd, #1 << 11 @ UBUSYx - bne 1001b - .endm - - .macro busyuart,rd,rx - tst \rx, #0x1000 @ UART2 does not have CTS here - bne 1002f -1001: ldr \rd, [\rx, #0x0140] @ SYSFLGx - tst \rd, #1 << 8 @ CTS - bne 1001b -1002: - .endm - diff --git a/include/asm-arm/arch-clps711x/dma.h b/include/asm-arm/arch-clps711x/dma.h deleted file mode 100644 index 6109979..0000000 --- a/include/asm-arm/arch-clps711x/dma.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/dma.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S deleted file mode 100644 index 3554887..0000000 --- a/include/asm-arm/arch-clps711x/entry-macro.S +++ /dev/null @@ -1,58 +0,0 @@ -/* - * include/asm-arm/arch-clps711x/entry-macro.S - * - * Low-level IRQ helper macros for CLPS711X-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - -#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) -#error INTSR stride != INTMR stride -#endif - - .macro get_irqnr_and_base, irqnr, stat, base, mask - mov \base, #CLPS7111_BASE - ldr \stat, [\base, #INTSR1] - ldr \mask, [\base, #INTMR1] - mov \irqnr, #4 - mov \mask, \mask, lsl #16 - and \stat, \stat, \mask, lsr #16 - movs \stat, \stat, lsr #4 - bne 1001f - - add \base, \base, #INTSR2 - INTSR1 - ldr \stat, [\base, #INTSR1] - ldr \mask, [\base, #INTMR1] - mov \irqnr, #16 - mov \mask, \mask, lsl #16 - and \stat, \stat, \mask, lsr #16 - -1001: tst \stat, #255 - addeq \irqnr, \irqnr, #8 - moveq \stat, \stat, lsr #8 - tst \stat, #15 - addeq \irqnr, \irqnr, #4 - moveq \stat, \stat, lsr #4 - tst \stat, #3 - addeq \irqnr, \irqnr, #2 - moveq \stat, \stat, lsr #2 - tst \stat, #1 - addeq \irqnr, \irqnr, #1 - moveq \stat, \stat, lsr #1 - tst \stat, #1 @ bit 0 should be set - .endm - - diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h deleted file mode 100644 index 0fdbe72..0000000 --- a/include/asm-arm/arch-clps711x/hardware.h +++ /dev/null @@ -1,237 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/hardware.h - * - * This file contains the hardware definitions of the Prospector P720T. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - - -#define CLPS7111_VIRT_BASE 0xff000000 -#define CLPS7111_BASE CLPS7111_VIRT_BASE - -/* - * The physical addresses that the external chip select signals map to is - * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212 - * processors. CONFIG_EP72XX_BOOT_ROM is only available if these - * processors are in use. - */ -#ifndef CONFIG_EP72XX_ROM_BOOT -#define CS0_PHYS_BASE (0x00000000) -#define CS1_PHYS_BASE (0x10000000) -#define CS2_PHYS_BASE (0x20000000) -#define CS3_PHYS_BASE (0x30000000) -#define CS4_PHYS_BASE (0x40000000) -#define CS5_PHYS_BASE (0x50000000) -#define CS6_PHYS_BASE (0x60000000) -#define CS7_PHYS_BASE (0x70000000) -#else -#define CS0_PHYS_BASE (0x70000000) -#define CS1_PHYS_BASE (0x60000000) -#define CS2_PHYS_BASE (0x50000000) -#define CS3_PHYS_BASE (0x40000000) -#define CS4_PHYS_BASE (0x30000000) -#define CS5_PHYS_BASE (0x20000000) -#define CS6_PHYS_BASE (0x10000000) -#define CS7_PHYS_BASE (0x00000000) -#endif - -#if defined (CONFIG_ARCH_EP7211) - -#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE -#define EP7211_BASE CLPS7111_VIRT_BASE -#include - -#elif defined (CONFIG_ARCH_EP7212) - -#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE -#define EP7212_BASE CLPS7111_VIRT_BASE -#include - -#endif - -#define SYSPLD_VIRT_BASE 0xfe000000 -#define SYSPLD_BASE SYSPLD_VIRT_BASE - -#ifndef __ASSEMBLER__ - -#define PCIO_BASE IO_BASE - -#endif - - -#if defined (CONFIG_ARCH_AUTCPU12) - -#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE -#define CS89712_BASE CLPS7111_VIRT_BASE - -#include -#include -#include - -#endif - - -#if defined (CONFIG_ARCH_CDB89712) - -#include -#include -#include - -/* dynamic ioremap() areas */ -#define FLASH_START 0x00000000 -#define FLASH_SIZE 0x800000 -#define FLASH_WIDTH 4 - -#define SRAM_START 0x60000000 -#define SRAM_SIZE 0xc000 -#define SRAM_WIDTH 4 - -#define BOOTROM_START 0x70000000 -#define BOOTROM_SIZE 0x80 -#define BOOTROM_WIDTH 4 - - -/* static cdb89712_map_io() areas */ -#define REGISTER_START 0x80000000 -#define REGISTER_SIZE 0x4000 -#define REGISTER_BASE 0xff000000 - -#define ETHER_START 0x20000000 -#define ETHER_SIZE 0x1000 -#define ETHER_BASE 0xfe000000 - -#endif - - -#if defined (CONFIG_ARCH_EDB7211) - -/* - * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3) - * and repeat across it. This is the mapping for it. - * - * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This - * was cause for much consternation and headscratching. This should probably - * be made a compile/run time kernel option. - */ -#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */ - -#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */ - - -/* - * The CS8900A ethernet chip has its I/O registers wired to chip select 2 - * (nCS2). This is the mapping for it. - * - * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This - * was cause for much consternation and headscratching. This should probably - * be made a compile/run time kernel option. - */ -#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */ - -#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */ - - -/* - * The two flash banks are wired to chip selects 0 and 1. This is the mapping - * for them. - * - * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running - * in jumpered boot mode. - */ -#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ -#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ - -#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */ -#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */ - -#endif /* CONFIG_ARCH_EDB7211 */ - - -/* - * Relevant bits in port D, which controls power to the various parts of - * the LCD on the EDB7211. - */ -#define EDB_PD1_LCD_DC_DC_EN (1<<1) -#define EDB_PD2_LCDEN (1<<2) -#define EDB_PD3_LCDBL (1<<3) - - -#if defined (CONFIG_ARCH_CEIVA) - -#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE -#define CEIVA_BASE CLPS7111_VIRT_BASE - -#include -#include - - -/* - * The two flash banks are wired to chip selects 0 and 1. This is the mapping - * for them. - * - * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running - * in jumpered boot mode. - */ -#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */ -#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */ - -#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */ -#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */ - -#define CEIVA_FLASH_SIZE 0x100000 -#define CEIVA_FLASH_WIDTH 2 - -#define SRAM_START 0x60000000 -#define SRAM_SIZE 0xc000 -#define SRAM_WIDTH 4 - -#define BOOTROM_START 0x70000000 -#define BOOTROM_SIZE 0x80 -#define BOOTROM_WIDTH 4 - -/* - * SED1355 LCD controller - */ -#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE -#define CEIVA_VIRT_SED1355 (0xfc000000) - -/* - * Relevant bits in port D, which controls power to the various parts of - * the LCD on the Ceiva Photo Max, and reset to the LCD controller. - */ - -// Reset line to SED1355 (must be high to operate) -#define CEIVA_PD1_LCDRST (1<<1) -// LCD panel enable (set to one, to enable LCD) -#define CEIVA_PD4_LCDEN (1<<4) -// Backlight (set to one, to turn on backlight -#define CEIVA_PD5_LCDBL (1<<5) - -/* - * Relevant bits in port B, which report the status of the buttons. - */ - -// White button -#define CEIVA_PB4_WHT_BTN (1<<4) -// Black button -#define CEIVA_PB0_BLK_BTN (1<<0) -#endif // #if defined (CONFIG_ARCH_CEIVA) - -#endif diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h deleted file mode 100644 index 2b84dac..0000000 --- a/include/asm-arm/arch-clps711x/io.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/io.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -/* - * We don't support ins[lb]/outs[lb]. Make them fault. - */ -#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0) -#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0) - -#endif diff --git a/include/asm-arm/arch-clps711x/irqs.h b/include/asm-arm/arch-clps711x/irqs.h deleted file mode 100644 index 76025dc..0000000 --- a/include/asm-arm/arch-clps711x/irqs.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/irqs.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * Interrupts from INTSR1 - */ -#define IRQ_CSINT 4 -#define IRQ_EINT1 5 -#define IRQ_EINT2 6 -#define IRQ_EINT3 7 -#define IRQ_TC1OI 8 -#define IRQ_TC2OI 9 -#define IRQ_RTCMI 10 -#define IRQ_TINT 11 -#define IRQ_UTXINT1 12 -#define IRQ_URXINT1 13 -#define IRQ_UMSINT 14 -#define IRQ_SSEOTI 15 - -#define INT1_IRQS (0x0000fff0) -#define INT1_ACK_IRQS (0x00004f10) - -/* - * Interrupts from INTSR2 - */ -#define IRQ_KBDINT (16+0) /* bit 0 */ -#define IRQ_SS2RX (16+1) /* bit 1 */ -#define IRQ_SS2TX (16+2) /* bit 2 */ -#define IRQ_UTXINT2 (16+12) /* bit 12 */ -#define IRQ_URXINT2 (16+13) /* bit 13 */ - -#define INT2_IRQS (0x30070000) -#define INT2_ACK_IRQS (0x00010000) - -#define NR_IRQS 30 - diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h deleted file mode 100644 index 42768cc..0000000 --- a/include/asm-arm/arch-clps711x/memory.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/memory.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0xc0000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ - -#if defined(CONFIG_ARCH_CDB89712) - -#define __virt_to_bus(x) (x) -#define __bus_to_virt(x) (x) - -#elif defined (CONFIG_ARCH_AUTCPU12) - -#define __virt_to_bus(x) (x) -#define __bus_to_virt(x) (x) - -#else - -#define __virt_to_bus(x) ((x) - PAGE_OFFSET) -#define __bus_to_virt(x) ((x) + PAGE_OFFSET) - -#endif - - -/* - * Like the SA1100, the EDB7211 has a large gap between physical RAM - * banks. In 2.2, the Psion (CL-PS7110) port added custom support for - * discontiguous physical memory. In 2.4, we can use the standard - * Linux NUMA support. - * - * This is not necessary for EP7211 implementations with only one used - * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. - */ - -/* - * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 - * uses only one of the two banks (bank #1). However, even within - * bank #1, memory is discontiguous. - * - * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between - * them, so we use 24 for the node max shift to get 16MB node sizes. - */ - -/* - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much more convenient to use Linux's NUMA support to implement - * our memory map representation. Assuming all memory nodes have equal access - * characteristics, we then have generic discontiguous memory support. - * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. - * - * node 0: 0xc0000000 - 0xc7ffffff - * node 1: 0xc8000000 - 0xcfffffff - * node 2: 0xd0000000 - 0xd7ffffff - * node 3: 0xd8000000 - 0xdfffffff - */ -#define NODE_MEM_SIZE_BITS 24 - -#endif - diff --git a/include/asm-arm/arch-clps711x/syspld.h b/include/asm-arm/arch-clps711x/syspld.h deleted file mode 100644 index 960578a..0000000 --- a/include/asm-arm/arch-clps711x/syspld.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/syspld.h - * - * System Control PLD register definitions. - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSPLD_H -#define __ASM_ARCH_SYSPLD_H - -#define SYSPLD_PHYS_BASE (0x10000000) - -#ifndef __ASSEMBLY__ -#include - -#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off)) -#else -#define SYSPLD_REG(type,off) (off) -#endif - -#define PLD_INT SYSPLD_REG(u32, 0x000000) -#define PLD_INT_PENIRQ (1 << 5) -#define PLD_INT_UCB_IRQ (1 << 1) -#define PLD_INT_KBD_ATN (1 << 0) /* EINT1 */ - -#define PLD_PWR SYSPLD_REG(u32, 0x000004) -#define PLD_PWR_EXT (1 << 5) -#define PLD_PWR_MODE (1 << 4) /* 1 = PWM, 0 = PFM */ -#define PLD_S4_ON (1 << 3) /* LCD bias voltage enable */ -#define PLD_S3_ON (1 << 2) /* LCD backlight enable */ -#define PLD_S2_ON (1 << 1) /* LCD 3V3 supply enable */ -#define PLD_S1_ON (1 << 0) /* LCD 3V supply enable */ - -#define PLD_KBD SYSPLD_REG(u32, 0x000008) -#define PLD_KBD_WAKE (1 << 1) -#define PLD_KBD_EN (1 << 0) - -#define PLD_SPI SYSPLD_REG(u32, 0x00000c) -#define PLD_SPI_EN (1 << 0) - -#define PLD_IO SYSPLD_REG(u32, 0x000010) -#define PLD_IO_BOOTSEL (1 << 6) /* boot sel switch */ -#define PLD_IO_USER (1 << 5) /* user defined switch */ -#define PLD_IO_LED3 (1 << 4) -#define PLD_IO_LED2 (1 << 3) -#define PLD_IO_LED1 (1 << 2) -#define PLD_IO_LED0 (1 << 1) -#define PLD_IO_LEDEN (1 << 0) - -#define PLD_IRDA SYSPLD_REG(u32, 0x000014) -#define PLD_IRDA_EN (1 << 0) - -#define PLD_COM2 SYSPLD_REG(u32, 0x000018) -#define PLD_COM2_EN (1 << 0) - -#define PLD_COM1 SYSPLD_REG(u32, 0x00001c) -#define PLD_COM1_EN (1 << 0) - -#define PLD_AUD SYSPLD_REG(u32, 0x000020) -#define PLD_AUD_DIV1 (1 << 6) -#define PLD_AUD_DIV0 (1 << 5) -#define PLD_AUD_CLK_SEL1 (1 << 4) -#define PLD_AUD_CLK_SEL0 (1 << 3) -#define PLD_AUD_MIC_PWR (1 << 2) -#define PLD_AUD_MIC_GAIN (1 << 1) -#define PLD_AUD_CODEC_EN (1 << 0) - -#define PLD_CF SYSPLD_REG(u32, 0x000024) -#define PLD_CF2_SLEEP (1 << 5) -#define PLD_CF1_SLEEP (1 << 4) -#define PLD_CF2_nPDREQ (1 << 3) -#define PLD_CF1_nPDREQ (1 << 2) -#define PLD_CF2_nIRQ (1 << 1) -#define PLD_CF1_nIRQ (1 << 0) - -#define PLD_SDC SYSPLD_REG(u32, 0x000028) -#define PLD_SDC_INT_EN (1 << 2) -#define PLD_SDC_WP (1 << 1) -#define PLD_SDC_CD (1 << 0) - -#define PLD_FPGA SYSPLD_REG(u32, 0x00002c) - -#define PLD_CODEC SYSPLD_REG(u32, 0x400000) -#define PLD_CODEC_IRQ3 (1 << 4) -#define PLD_CODEC_IRQ2 (1 << 3) -#define PLD_CODEC_IRQ1 (1 << 2) -#define PLD_CODEC_EN (1 << 0) - -#define PLD_BRITE SYSPLD_REG(u32, 0x400004) -#define PLD_BRITE_UP (1 << 1) -#define PLD_BRITE_DN (1 << 0) - -#define PLD_LCDEN SYSPLD_REG(u32, 0x400008) -#define PLD_LCDEN_EN (1 << 0) - -#define PLD_ID SYSPLD_REG(u32, 0x40000c) - -#define PLD_TCH SYSPLD_REG(u32, 0x400010) -#define PLD_TCH_PENIRQ (1 << 1) -#define PLD_TCH_EN (1 << 0) - -#define PLD_GPIO SYSPLD_REG(u32, 0x400014) -#define PLD_GPIO2 (1 << 2) -#define PLD_GPIO1 (1 << 1) -#define PLD_GPIO0 (1 << 0) - -#endif diff --git a/include/asm-arm/arch-clps711x/system.h b/include/asm-arm/arch-clps711x/system.h deleted file mode 100644 index 1f56177..0000000 --- a/include/asm-arm/arch-clps711x/system.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/system.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static inline void arch_idle(void) -{ - clps_writel(1, HALT); - __asm__ __volatile__( - "mov r0, r0\n\ - mov r0, r0"); -} - -static inline void arch_reset(char mode) -{ - cpu_reset(0); -} - -#endif diff --git a/include/asm-arm/arch-clps711x/time.h b/include/asm-arm/arch-clps711x/time.h deleted file mode 100644 index 5edaae1..0000000 --- a/include/asm-arm/arch-clps711x/time.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/time.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include - -extern void clps711x_setup_timer(void); - -/* - * IRQ handler for the timer - */ -static irqreturn_t -p720t_timer_interrupt(int irq, void *dev_id) -{ - struct pt_regs *regs = get_irq_regs(); - do_leds(); - do_timer(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(regs)); -#endif - do_profile(regs); - return IRQ_HANDLED; -} - -/* - * Set up timer interrupt, and return the current time in seconds. - */ -void __init time_init(void) -{ - clps711x_setup_timer(); - timer_irq.handler = p720t_timer_interrupt; - setup_irq(IRQ_TC2OI, &timer_irq); -} diff --git a/include/asm-arm/arch-clps711x/timex.h b/include/asm-arm/arch-clps711x/timex.h deleted file mode 100644 index dcbb381..0000000 --- a/include/asm-arm/arch-clps711x/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/timex.h - * - * Prospector 720T architecture timex specifications - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE 512000 diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h deleted file mode 100644 index 8c5684a..0000000 --- a/include/asm-arm/arch-clps711x/uncompress.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/uncompress.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include - -#undef CLPS7111_BASE -#define CLPS7111_BASE CLPS7111_PHYS_BASE - -#define __raw_readl(p) (*(unsigned long *)(p)) -#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) - -#ifdef CONFIG_DEBUG_CLPS711X_UART2 -#define SYSFLGx SYSFLG2 -#define UARTDRx UARTDR2 -#else -#define SYSFLGx SYSFLG1 -#define UARTDRx UARTDR1 -#endif - -/* - * This does not append a newline - */ -static inline void putc(int c) -{ - while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) - barrier(); - clps_writel(c, UARTDRx); -} - -static inline void flush(void) -{ - while (clps_readl(SYSFLGx) & SYSFLG_UBUSY) - barrier(); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() - -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-clps711x/vmalloc.h b/include/asm-arm/arch-clps711x/vmalloc.h deleted file mode 100644 index a5dfe96..0000000 --- a/include/asm-arm/arch-clps711x/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-clps711x/vmalloc.h - * - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-davinci/clock.h b/include/asm-arm/arch-davinci/clock.h deleted file mode 100644 index cc168b7..0000000 --- a/include/asm-arm/arch-davinci/clock.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-arm/arch-davinci/clock.h - * - * Clock control driver for DaVinci - header file - * - * Authors: Vladimir Barinov - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_DAVINCI_CLOCK_H -#define __ASM_ARCH_DAVINCI_CLOCK_H - -struct clk; - -extern int clk_register(struct clk *clk); -extern void clk_unregister(struct clk *clk); -extern int davinci_clk_init(void); - -#endif diff --git a/include/asm-arm/arch-davinci/common.h b/include/asm-arm/arch-davinci/common.h deleted file mode 100644 index a97dfbb..0000000 --- a/include/asm-arm/arch-davinci/common.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Header for code common to all DaVinci machines. - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H -#define __ARCH_ARM_MACH_DAVINCI_COMMON_H - -struct sys_timer; - -extern struct sys_timer davinci_timer; - -#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */ diff --git a/include/asm-arm/arch-davinci/debug-macro.S b/include/asm-arm/arch-davinci/debug-macro.S deleted file mode 100644 index e6c0f0d..0000000 --- a/include/asm-arm/arch-davinci/debug-macro.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Debugging macro for DaVinci - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x01000000 @ physical base address - movne \rx, #0xfe000000 @ virtual base - orr \rx, \rx, #0x00c20000 @ UART 0 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-davinci/dma.h b/include/asm-arm/arch-davinci/dma.h deleted file mode 100644 index 8e2f2d0..0000000 --- a/include/asm-arm/arch-davinci/dma.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * DaVinci DMA definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#define MAX_DMA_ADDRESS 0xffffffff - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-davinci/entry-macro.S b/include/asm-arm/arch-davinci/entry-macro.S deleted file mode 100644 index 3ebfcc5..0000000 --- a/include/asm-arm/arch-davinci/entry-macro.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Low-level IRQ helper macros for TI DaVinci-based platforms - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IO_ADDRESS(DAVINCI_ARM_INTC_BASE) - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \tmp, [\base, #0x14] - mov \tmp, \tmp, lsr #2 - sub \irqnr, \tmp, #1 - cmp \tmp, #0 - .endm - - .macro irq_prio_table - .endm diff --git a/include/asm-arm/arch-davinci/gpio.h b/include/asm-arm/arch-davinci/gpio.h deleted file mode 100644 index 54fda73..0000000 --- a/include/asm-arm/arch-davinci/gpio.h +++ /dev/null @@ -1,159 +0,0 @@ -/* - * TI DaVinci GPIO Support - * - * Copyright (c) 2006 David Brownell - * Copyright (c) 2007, MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef __DAVINCI_GPIO_H -#define __DAVINCI_GPIO_H - -#include -#include - -/* - * basic gpio routines - * - * board-specific init should be done by arch/.../.../board-XXX.c (maybe - * initializing banks together) rather than boot loaders; kexec() won't - * go through boot loaders. - * - * the gpio clock will be turned on when gpios are used, and you may also - * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are - * used as gpios, not with other peripherals. - * - * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe - * for later updates, code should write GPIO(N) or: - * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) - * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) - * - * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc - * for now, that's != GPIO(N) - */ -#define GPIO(X) (X) /* 0 <= X <= 70 */ -#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ -#define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */ - -struct gpio_controller { - u32 dir; - u32 out_data; - u32 set_data; - u32 clr_data; - u32 in_data; - u32 set_rising; - u32 clr_rising; - u32 set_falling; - u32 clr_falling; - u32 intstat; -}; - -/* The __gpio_to_controller() and __gpio_mask() functions inline to constants - * with constant parameters; or in outlined code they execute at runtime. - * - * You'd access the controller directly when reading or writing more than - * one gpio value at a time, and to support wired logic where the value - * being driven by the cpu need not match the value read back. - * - * These are NOT part of the cross-platform GPIO interface - */ -static inline struct gpio_controller *__iomem -__gpio_to_controller(unsigned gpio) -{ - void *__iomem ptr; - - if (gpio < 32) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); - else if (gpio < 64) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); - else if (gpio < DAVINCI_N_GPIO) - ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); - else - ptr = NULL; - return ptr; -} - -static inline u32 __gpio_mask(unsigned gpio) -{ - return 1 << (gpio % 32); -} - -/* The get/set/clear functions will inline when called with constant - * parameters, for low-overhead bitbanging. Illegal constant parameters - * cause link-time errors. - * - * Otherwise, calls with variable parameters use outlined functions. - */ -extern int __error_inval_gpio(void); - -extern void __gpio_set(unsigned gpio, int value); -extern int __gpio_get(unsigned gpio); - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (__builtin_constant_p(value)) { - struct gpio_controller *__iomem g; - u32 mask; - - if (gpio >= DAVINCI_N_GPIO) - __error_inval_gpio(); - - g = __gpio_to_controller(gpio); - mask = __gpio_mask(gpio); - if (value) - __raw_writel(mask, &g->set_data); - else - __raw_writel(mask, &g->clr_data); - return; - } - - __gpio_set(gpio, value); -} - -/* Returns zero or nonzero; works for gpios configured as inputs OR - * as outputs. - * - * NOTE: changes in reported values are synchronized to the GPIO clock. - * This is most easily seen after calling gpio_set_value() and then immediatly - * gpio_get_value(), where the gpio_get_value() would return the old value - * until the GPIO clock ticks and the new value gets latched. - */ - -static inline int gpio_get_value(unsigned gpio) -{ - struct gpio_controller *__iomem g; - - if (!__builtin_constant_p(gpio)) - return __gpio_get(gpio); - - if (gpio >= DAVINCI_N_GPIO) - return __error_inval_gpio(); - - g = __gpio_to_controller(gpio); - return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); -} - -/* powerup default direction is IN */ -extern int gpio_direction_input(unsigned gpio); -extern int gpio_direction_output(unsigned gpio, int value); - -#include /* cansleep wrappers */ - -extern int gpio_request(unsigned gpio, const char *tag); -extern void gpio_free(unsigned gpio); - -static inline int gpio_to_irq(unsigned gpio) -{ - return DAVINCI_N_AINTC_IRQ + gpio; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return irq - DAVINCI_N_AINTC_IRQ; -} - -#endif /* __DAVINCI_GPIO_H */ diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h deleted file mode 100644 index a2e8969..0000000 --- a/include/asm-arm/arch-davinci/hardware.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Common hardware definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * Base register addresses - */ -#define DAVINCI_DMA_3PCC_BASE (0x01C00000) -#define DAVINCI_DMA_3PTC0_BASE (0x01C10000) -#define DAVINCI_DMA_3PTC1_BASE (0x01C10400) -#define DAVINCI_I2C_BASE (0x01C21000) -#define DAVINCI_PWM0_BASE (0x01C22000) -#define DAVINCI_PWM1_BASE (0x01C22400) -#define DAVINCI_PWM2_BASE (0x01C22800) -#define DAVINCI_SYSTEM_MODULE_BASE (0x01C40000) -#define DAVINCI_PLL_CNTRL0_BASE (0x01C40800) -#define DAVINCI_PLL_CNTRL1_BASE (0x01C40C00) -#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01C41000) -#define DAVINCI_SYSTEM_DFT_BASE (0x01C42000) -#define DAVINCI_IEEE1394_BASE (0x01C60000) -#define DAVINCI_USB_OTG_BASE (0x01C64000) -#define DAVINCI_CFC_ATA_BASE (0x01C66000) -#define DAVINCI_SPI_BASE (0x01C66800) -#define DAVINCI_GPIO_BASE (0x01C67000) -#define DAVINCI_UHPI_BASE (0x01C67800) -#define DAVINCI_VPSS_REGS_BASE (0x01C70000) -#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01C80000) -#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01C81000) -#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01C82000) -#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01C84000) -#define DAVINCI_IMCOP_BASE (0x01CC0000) -#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000) -#define DAVINCI_VLYNQ_BASE (0x01E01000) -#define DAVINCI_MCBSP_BASE (0x01E02000) -#define DAVINCI_MMC_SD_BASE (0x01E10000) -#define DAVINCI_MS_BASE (0x01E20000) -#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) -#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) -#define DAVINCI_VLYNQ_REMOTE_BASE (0x0C000000) - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-davinci/i2c.h b/include/asm-arm/arch-davinci/i2c.h deleted file mode 100644 index e2f5416..0000000 --- a/include/asm-arm/arch-davinci/i2c.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * DaVinci I2C controller platfrom_device info - * - * Author: Vladimir Barinov, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. -*/ - -#ifndef __ASM_ARCH_I2C_H -#define __ASM_ARCH_I2C_H - -/* All frequencies are expressed in kHz */ -struct davinci_i2c_platform_data { - unsigned int bus_freq; /* standard bus frequency */ - unsigned int bus_delay; /* transaction delay */ -}; - -#endif /* __ASM_ARCH_I2C_H */ diff --git a/include/asm-arm/arch-davinci/io.h b/include/asm-arm/arch-davinci/io.h deleted file mode 100644 index e7accb9..0000000 --- a/include/asm-arm/arch-davinci/io.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * DaVinci IO address definitions - * - * Copied from include/asm/arm/arch-omap/io.h - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * ---------------------------------------------------------------------------- - * I/O mapping - * ---------------------------------------------------------------------------- - */ -#define IO_PHYS 0x01c00000 -#define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ -#define IO_SIZE 0x00400000 -#define IO_VIRT (IO_PHYS + IO_OFFSET) -#define io_p2v(pa) ((pa) + IO_OFFSET) -#define io_v2p(va) ((va) - IO_OFFSET) -#define IO_ADDRESS(x) io_p2v(x) - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define PCIO_BASE 0 -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#define __mem_pci(a) (a) -#define __mem_isa(a) (a) - -#ifndef __ASSEMBLER__ - -/* - * Functions to access the DaVinci IO region - * - * NOTE: - Use davinci_read/write[bwl] for physical register addresses - * - Use __raw_read/write[bwl]() for virtual register addresses - * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses - * - DO NOT use hardcoded virtual addresses to allow changing the - * IO address space again if needed - */ -#define davinci_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define davinci_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define davinci_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) - -#define davinci_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define davinci_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define davinci_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) - -/* 16 bit uses LDRH/STRH, base +/- offset_8 */ -typedef struct { volatile u16 offset[256]; } __regbase16; -#define __REGV16(vaddr) ((__regbase16 *)((vaddr)&~0xff)) \ - ->offset[((vaddr)&0xff)>>1] -#define __REG16(paddr) __REGV16(io_p2v(paddr)) - -/* 8/32 bit uses LDR/STR, base +/- offset_12 */ -typedef struct { volatile u8 offset[4096]; } __regbase8; -#define __REGV8(vaddr) ((__regbase8 *)((vaddr)&~4095)) \ - ->offset[((vaddr)&4095)>>0] -#define __REG8(paddr) __REGV8(io_p2v(paddr)) - -typedef struct { volatile u32 offset[4096]; } __regbase32; -#define __REGV32(vaddr) ((__regbase32 *)((vaddr)&~4095)) \ - ->offset[((vaddr)&4095)>>2] - -#define __REG(paddr) __REGV32(io_p2v(paddr)) -#else - -#define __REG(x) (*((volatile unsigned long *)io_p2v(x))) - -#endif /* __ASSEMBLER__ */ -#endif /* __ASM_ARCH_IO_H */ diff --git a/include/asm-arm/arch-davinci/irqs.h b/include/asm-arm/arch-davinci/irqs.h deleted file mode 100644 index f4c5ca6..0000000 --- a/include/asm-arm/arch-davinci/irqs.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * DaVinci interrupt controller definitions - * - * Copyright (C) 2006 Texas Instruments. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -/* Base address */ -#define DAVINCI_ARM_INTC_BASE 0x01C48000 - -/* Interrupt lines */ -#define IRQ_VDINT0 0 -#define IRQ_VDINT1 1 -#define IRQ_VDINT2 2 -#define IRQ_HISTINT 3 -#define IRQ_H3AINT 4 -#define IRQ_PRVUINT 5 -#define IRQ_RSZINT 6 -#define IRQ_VFOCINT 7 -#define IRQ_VENCINT 8 -#define IRQ_ASQINT 9 -#define IRQ_IMXINT 10 -#define IRQ_VLCDINT 11 -#define IRQ_USBINT 12 -#define IRQ_EMACINT 13 - -#define IRQ_CCINT0 16 -#define IRQ_CCERRINT 17 -#define IRQ_TCERRINT0 18 -#define IRQ_TCERRINT 19 -#define IRQ_PSCIN 20 - -#define IRQ_IDE 22 -#define IRQ_HPIINT 23 -#define IRQ_MBXINT 24 -#define IRQ_MBRINT 25 -#define IRQ_MMCINT 26 -#define IRQ_SDIOINT 27 -#define IRQ_MSINT 28 -#define IRQ_DDRINT 29 -#define IRQ_AEMIFINT 30 -#define IRQ_VLQINT 31 -#define IRQ_TINT0_TINT12 32 -#define IRQ_TINT0_TINT34 33 -#define IRQ_TINT1_TINT12 34 -#define IRQ_TINT1_TINT34 35 -#define IRQ_PWMINT0 36 -#define IRQ_PWMINT1 37 -#define IRQ_PWMINT2 38 -#define IRQ_I2C 39 -#define IRQ_UARTINT0 40 -#define IRQ_UARTINT1 41 -#define IRQ_UARTINT2 42 -#define IRQ_SPINT0 43 -#define IRQ_SPINT1 44 - -#define IRQ_DSP2ARM0 46 -#define IRQ_DSP2ARM1 47 -#define IRQ_GPIO0 48 -#define IRQ_GPIO1 49 -#define IRQ_GPIO2 50 -#define IRQ_GPIO3 51 -#define IRQ_GPIO4 52 -#define IRQ_GPIO5 53 -#define IRQ_GPIO6 54 -#define IRQ_GPIO7 55 -#define IRQ_GPIOBNK0 56 -#define IRQ_GPIOBNK1 57 -#define IRQ_GPIOBNK2 58 -#define IRQ_GPIOBNK3 59 -#define IRQ_GPIOBNK4 60 -#define IRQ_COMMTX 61 -#define IRQ_COMMRX 62 -#define IRQ_EMUINT 63 - -#define DAVINCI_N_AINTC_IRQ 64 -#define DAVINCI_N_GPIO 71 - -#define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) - -#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/include/asm-arm/arch-davinci/memory.h b/include/asm-arm/arch-davinci/memory.h deleted file mode 100644 index dd1625c..0000000 --- a/include/asm-arm/arch-davinci/memory.h +++ /dev/null @@ -1,64 +0,0 @@ -/* - * DaVinci memory space definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/************************************************************************** - * Included Files - **************************************************************************/ -#include -#include - -/************************************************************************** - * Definitions - **************************************************************************/ -#define DAVINCI_DDR_BASE 0x80000000 -#define DAVINCI_IRAM_BASE 0x00008000 /* ARM Internal RAM */ - -#define PHYS_OFFSET DAVINCI_DDR_BASE - -/* - * Increase size of DMA-consistent memory region - */ -#define CONSISTENT_DMA_SIZE (14<<20) - -#ifndef __ASSEMBLY__ -/* - * Restrict DMA-able region to workaround silicon bug. The bug - * restricts buffers available for DMA to video hardware to be - * below 128M - */ -static inline void -__arch_adjust_zones(int node, unsigned long *size, unsigned long *holes) -{ - unsigned int sz = (128<<20) >> PAGE_SHIFT; - - if (node != 0) - sz = 0; - - size[1] = size[0] - sz; - size[0] = sz; -} - -#define arch_adjust_zones(node, zone_size, holes) \ - if ((meminfo.bank[0].size >> 20) > 128) __arch_adjust_zones(node, zone_size, holes) - -#define ISA_DMA_THRESHOLD (PHYS_OFFSET + (128<<20) - 1) - -#endif - -/* - * Bus address is physical address - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif /* __ASM_ARCH_MEMORY_H */ diff --git a/include/asm-arm/arch-davinci/mux.h b/include/asm-arm/arch-davinci/mux.h deleted file mode 100644 index c24b678..0000000 --- a/include/asm-arm/arch-davinci/mux.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * DaVinci pin multiplexing defines - * - * Author: Vladimir Barinov, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -#define DAVINCI_MUX_AEAW0 0 -#define DAVINCI_MUX_AEAW1 1 -#define DAVINCI_MUX_AEAW2 2 -#define DAVINCI_MUX_AEAW3 3 -#define DAVINCI_MUX_AEAW4 4 -#define DAVINCI_MUX_AECS4 10 -#define DAVINCI_MUX_AECS5 11 -#define DAVINCI_MUX_VLYNQWD0 12 -#define DAVINCI_MUX_VLYNQWD1 13 -#define DAVINCI_MUX_VLSCREN 14 -#define DAVINCI_MUX_VLYNQEN 15 -#define DAVINCI_MUX_HDIREN 16 -#define DAVINCI_MUX_ATAEN 17 -#define DAVINCI_MUX_RGB666 22 -#define DAVINCI_MUX_RGB888 23 -#define DAVINCI_MUX_LOEEN 24 -#define DAVINCI_MUX_LFLDEN 25 -#define DAVINCI_MUX_CWEN 26 -#define DAVINCI_MUX_CFLDEN 27 -#define DAVINCI_MUX_HPIEN 29 -#define DAVINCI_MUX_1394EN 30 -#define DAVINCI_MUX_EMACEN 31 - -#define DAVINCI_MUX_LEVEL2 32 -#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0) -#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1) -#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2) -#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3) -#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4) -#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5) -#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6) -#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7) -#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8) -#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9) -#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10) -#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16) -#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17) -#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18) - -extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable); - -#endif /* __ASM_ARCH_MUX_H */ diff --git a/include/asm-arm/arch-davinci/psc.h b/include/asm-arm/arch-davinci/psc.h deleted file mode 100644 index 4977aa0..0000000 --- a/include/asm-arm/arch-davinci/psc.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * DaVinci Power & Sleep Controller (PSC) defines - * - * Copyright (C) 2006 Texas Instruments. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - */ -#ifndef __ASM_ARCH_PSC_H -#define __ASM_ARCH_PSC_H - -/* Power and Sleep Controller (PSC) Domains */ -#define DAVINCI_GPSC_ARMDOMAIN 0 -#define DAVINCI_GPSC_DSPDOMAIN 1 - -#define DAVINCI_LPSC_VPSSMSTR 0 -#define DAVINCI_LPSC_VPSSSLV 1 -#define DAVINCI_LPSC_TPCC 2 -#define DAVINCI_LPSC_TPTC0 3 -#define DAVINCI_LPSC_TPTC1 4 -#define DAVINCI_LPSC_EMAC 5 -#define DAVINCI_LPSC_EMAC_WRAPPER 6 -#define DAVINCI_LPSC_MDIO 7 -#define DAVINCI_LPSC_IEEE1394 8 -#define DAVINCI_LPSC_USB 9 -#define DAVINCI_LPSC_ATA 10 -#define DAVINCI_LPSC_VLYNQ 11 -#define DAVINCI_LPSC_UHPI 12 -#define DAVINCI_LPSC_DDR_EMIF 13 -#define DAVINCI_LPSC_AEMIF 14 -#define DAVINCI_LPSC_MMC_SD 15 -#define DAVINCI_LPSC_MEMSTICK 16 -#define DAVINCI_LPSC_McBSP 17 -#define DAVINCI_LPSC_I2C 18 -#define DAVINCI_LPSC_UART0 19 -#define DAVINCI_LPSC_UART1 20 -#define DAVINCI_LPSC_UART2 21 -#define DAVINCI_LPSC_SPI 22 -#define DAVINCI_LPSC_PWM0 23 -#define DAVINCI_LPSC_PWM1 24 -#define DAVINCI_LPSC_PWM2 25 -#define DAVINCI_LPSC_GPIO 26 -#define DAVINCI_LPSC_TIMER0 27 -#define DAVINCI_LPSC_TIMER1 28 -#define DAVINCI_LPSC_TIMER2 29 -#define DAVINCI_LPSC_SYSTEM_SUBSYS 30 -#define DAVINCI_LPSC_ARM 31 -#define DAVINCI_LPSC_SCR2 32 -#define DAVINCI_LPSC_SCR3 33 -#define DAVINCI_LPSC_SCR4 34 -#define DAVINCI_LPSC_CROSSBAR 35 -#define DAVINCI_LPSC_CFG27 36 -#define DAVINCI_LPSC_CFG3 37 -#define DAVINCI_LPSC_CFG5 38 -#define DAVINCI_LPSC_GEM 39 -#define DAVINCI_LPSC_IMCOP 40 - -#endif /* __ASM_ARCH_PSC_H */ diff --git a/include/asm-arm/arch-davinci/serial.h b/include/asm-arm/arch-davinci/serial.h deleted file mode 100644 index ed418ef..0000000 --- a/include/asm-arm/arch-davinci/serial.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * DaVinci serial device definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_SERIAL_H -#define __ASM_ARCH_SERIAL_H - -#include - -#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) -#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) -#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) - -#endif /* __ASM_ARCH_SERIAL_H */ diff --git a/include/asm-arm/arch-davinci/system.h b/include/asm-arm/arch-davinci/system.h deleted file mode 100644 index 6713e4a..0000000 --- a/include/asm-arm/arch-davinci/system.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * DaVinci system defines - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -extern void davinci_watchdog_reset(void); - -static void arch_idle(void) -{ - cpu_do_idle(); -} - -static void arch_reset(char mode) -{ - davinci_watchdog_reset(); -} - -#endif /* __ASM_ARCH_SYSTEM_H */ diff --git a/include/asm-arm/arch-davinci/timex.h b/include/asm-arm/arch-davinci/timex.h deleted file mode 100644 index 5282756..0000000 --- a/include/asm-arm/arch-davinci/timex.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * DaVinci timer defines - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* The source frequency for the timers is the 27MHz clock */ -#define CLOCK_TICK_RATE 27000000 - -#endif /* __ASM_ARCH_TIMEX_H__ */ diff --git a/include/asm-arm/arch-davinci/uncompress.h b/include/asm-arm/arch-davinci/uncompress.h deleted file mode 100644 index f6d1570..0000000 --- a/include/asm-arm/arch-davinci/uncompress.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Serial port stubs for kernel decompress status messages - * - * Author: Anant Gole - * (C) Copyright (C) 2006, Texas Instruments, Inc - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include - -/* PORT_16C550A, in polled non-fifo mode */ - -static void putc(char c) -{ - volatile u32 *uart = (volatile void *) DAVINCI_UART0_BASE; - - while (!(uart[UART_LSR] & UART_LSR_THRE)) - barrier(); - uart[UART_TX] = c; -} - -static inline void flush(void) -{ - volatile u32 *uart = (volatile void *) DAVINCI_UART0_BASE; - while (!(uart[UART_LSR] & UART_LSR_THRE)) - barrier(); -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-davinci/vmalloc.h b/include/asm-arm/arch-davinci/vmalloc.h deleted file mode 100644 index 9b47fa8..0000000 --- a/include/asm-arm/arch-davinci/vmalloc.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * DaVinci vmalloc definitions - * - * Author: Kevin Hilman, MontaVista Software, Inc. - * - * 2007 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include -#include - -/* Allow vmalloc range until the IO virtual range minus a 2M "hole" */ -#define VMALLOC_END (IO_VIRT - (2<<20)) diff --git a/include/asm-arm/arch-ebsa110/debug-macro.S b/include/asm-arm/arch-ebsa110/debug-macro.S deleted file mode 100644 index 9213bfe..0000000 --- a/include/asm-arm/arch-ebsa110/debug-macro.S +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/include/asm-arm/arch-ebsa110/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -**/ - - .macro addruart,rx - mov \rx, #0xf0000000 - orr \rx, \rx, #0x00000be0 - .endm - -#define UART_SHIFT 2 -#define FLOW_CONTROL -#include diff --git a/include/asm-arm/arch-ebsa110/dma.h b/include/asm-arm/arch-ebsa110/dma.h deleted file mode 100644 index c52f9e2a..0000000 --- a/include/asm-arm/arch-ebsa110/dma.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/dma.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EBSA110 DMA definitions - */ diff --git a/include/asm-arm/arch-ebsa110/entry-macro.S b/include/asm-arm/arch-ebsa110/entry-macro.S deleted file mode 100644 index f242be5..0000000 --- a/include/asm-arm/arch-ebsa110/entry-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-ebsa110/entry-macro.S - * - * Low-level IRQ helper macros for ebsa110 platform. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - - -#define IRQ_STAT 0xff000000 /* read */ - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mov \base, #IRQ_STAT - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, stat, base, tmp - ldrb \stat, [\base] @ get interrupts - mov \irqnr, #0 - tst \stat, #15 - addeq \irqnr, \irqnr, #4 - moveq \stat, \stat, lsr #4 - tst \stat, #3 - addeq \irqnr, \irqnr, #2 - moveq \stat, \stat, lsr #2 - tst \stat, #1 - addeq \irqnr, \irqnr, #1 - moveq \stat, \stat, lsr #1 - tst \stat, #1 @ bit 0 should be set - .endm - diff --git a/include/asm-arm/arch-ebsa110/hardware.h b/include/asm-arm/arch-ebsa110/hardware.h deleted file mode 100644 index 3ce864d..0000000 --- a/include/asm-arm/arch-ebsa110/hardware.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/hardware.h - * - * Copyright (C) 1996-2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains the hardware definitions of the EBSA-110. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * The EBSA110 has a weird "ISA IO" region: - * - * Region 0 (addr = 0xf0000000 + io << 2) - * -------------------------------------------------------- - * Physical region IO region - * f0000fe0 - f0000ffc 3f8 - 3ff ttyS0 - * f0000e60 - f0000e64 398 - 399 - * f0000de0 - f0000dfc 378 - 37f lp0 - * f0000be0 - f0000bfc 2f8 - 2ff ttyS1 - * - * Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1)) - * -------------------------------------------------------- - * Physical region IO region - * f00014f1 a79 pnp write data - * f00007c0 - f00007c1 3e0 - 3e1 pcmcia - * f00004f1 279 pnp address - * f0000440 - f000046c 220 - 236 eth0 - * f0000405 203 pnp read data - */ - -#define ISAMEM_PHYS 0xe0000000 -#define ISAMEM_SIZE 0x10000000 - -#define ISAIO_PHYS 0xf0000000 -#define ISAIO_SIZE PGDIR_SIZE - -#define TRICK0_PHYS 0xf2000000 -#define TRICK1_PHYS 0xf2400000 -#define TRICK2_PHYS 0xf2800000 -#define TRICK3_PHYS 0xf2c00000 -#define TRICK4_PHYS 0xf3000000 -#define TRICK5_PHYS 0xf3400000 -#define TRICK6_PHYS 0xf3800000 -#define TRICK7_PHYS 0xf3c00000 - -#define ISAMEM_BASE 0xe0000000 -#define ISAIO_BASE 0xf0000000 - -#define PIT_BASE 0xfc000000 -#define SOFT_BASE 0xfd000000 - -/* - * RAM definitions - */ -#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */ - -#endif - diff --git a/include/asm-arm/arch-ebsa110/io.h b/include/asm-arm/arch-ebsa110/io.h deleted file mode 100644 index 44a4001..0000000 --- a/include/asm-arm/arch-ebsa110/io.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/io.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Modifications: - * 06-Dec-1997 RMK Created. - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffff - -u8 __inb8(unsigned int port); -void __outb8(u8 val, unsigned int port); - -u8 __inb16(unsigned int port); -void __outb16(u8 val, unsigned int port); - -u16 __inw(unsigned int port); -void __outw(u16 val, unsigned int port); - -u32 __inl(unsigned int port); -void __outl(u32 val, unsigned int port); - -u8 __readb(const volatile void __iomem *addr); -u16 __readw(const volatile void __iomem *addr); -u32 __readl(const volatile void __iomem *addr); - -void __writeb(u8 val, void __iomem *addr); -void __writew(u16 val, void __iomem *addr); -void __writel(u32 val, void __iomem *addr); - -/* - * Argh, someone forgot the IOCS16 line. We therefore have to handle - * the byte stearing by selecting the correct byte IO functions here. - */ -#ifdef ISA_SIXTEEN_BIT_PERIPHERAL -#define inb(p) __inb16(p) -#define outb(v,p) __outb16(v,p) -#else -#define inb(p) __inb8(p) -#define outb(v,p) __outb8(v,p) -#endif - -#define inw(p) __inw(p) -#define outw(v,p) __outw(v,p) - -#define inl(p) __inl(p) -#define outl(v,p) __outl(v,p) - -#define readb(b) __readb(b) -#define readw(b) __readw(b) -#define readl(b) __readl(b) -#define readb_relaxed(addr) readb(addr) -#define readw_relaxed(addr) readw(addr) -#define readl_relaxed(addr) readl(addr) - -#define writeb(v,b) __writeb(v,b) -#define writew(v,b) __writew(v,b) -#define writel(v,b) __writel(v,b) - -static inline void __iomem *__arch_ioremap(unsigned long cookie, size_t size, - unsigned int flags) -{ - return (void __iomem *)cookie; -} - -#define __arch_ioremap __arch_ioremap -#define __arch_iounmap(cookie) do { } while (0) - -extern void insb(unsigned int port, void *buf, int sz); -extern void insw(unsigned int port, void *buf, int sz); -extern void insl(unsigned int port, void *buf, int sz); - -extern void outsb(unsigned int port, const void *buf, int sz); -extern void outsw(unsigned int port, const void *buf, int sz); -extern void outsl(unsigned int port, const void *buf, int sz); - -/* can't support writesb atm */ -extern void writesw(void __iomem *addr, const void *data, int wordlen); -extern void writesl(void __iomem *addr, const void *data, int longlen); - -/* can't support readsb atm */ -extern void readsw(const void __iomem *addr, void *data, int wordlen); -extern void readsl(const void __iomem *addr, void *data, int longlen); - -#endif diff --git a/include/asm-arm/arch-ebsa110/irqs.h b/include/asm-arm/arch-ebsa110/irqs.h deleted file mode 100644 index ded9bd9..0000000 --- a/include/asm-arm/arch-ebsa110/irqs.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/irqs.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define NR_IRQS 8 - -#define IRQ_EBSA110_PRINTER 0 -#define IRQ_EBSA110_COM1 1 -#define IRQ_EBSA110_COM2 2 -#define IRQ_EBSA110_ETHERNET 3 -#define IRQ_EBSA110_TIMER0 4 -#define IRQ_EBSA110_TIMER1 5 -#define IRQ_EBSA110_PCMCIA 6 -#define IRQ_EBSA110_IMMEDIATE 7 diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h deleted file mode 100644 index c7c500e1..0000000 --- a/include/asm-arm/arch-ebsa110/memory.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/memory.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 20-Oct-1996 RMK Created - * 31-Dec-1997 RMK Fixed definitions to reduce warnings - * 21-Mar-1999 RMK Renamed to memory.h - * RMK Moved TASK_SIZE and PAGE_OFFSET here - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -/* - * We keep this 1:1 so that we don't interfere - * with the PCMCIA memory regions - */ -#define __virt_to_bus(x) (x) -#define __bus_to_virt(x) (x) - -/* - * Cache flushing area - SRAM - */ -#define FLUSH_BASE_PHYS 0x40000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/include/asm-arm/arch-ebsa110/system.h b/include/asm-arm/arch-ebsa110/system.h deleted file mode 100644 index d7c8fec..0000000 --- a/include/asm-arm/arch-ebsa110/system.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/system.h - * - * Copyright (C) 1996-2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -/* - * EBSA110 idling methodology: - * - * We can not execute the "wait for interrupt" instruction since that - * will stop our MCLK signal (which provides the clock for the glue - * logic, and therefore the timer interrupt). - * - * Instead, we spin, polling the IRQ_STAT register for the occurrence - * of any interrupt with core clock down to the memory clock. - */ -static inline void arch_idle(void) -{ - const char *irq_stat = (char *)0xff000000; - - /* disable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); - - /* wait for an interrupt to occur */ - while (!*irq_stat); - - /* enable clock switching */ - asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); -} - -#define arch_reset(mode) cpu_reset(0x80000000) - -#endif diff --git a/include/asm-arm/arch-ebsa110/timex.h b/include/asm-arm/arch-ebsa110/timex.h deleted file mode 100644 index 1e9ef04..0000000 --- a/include/asm-arm/arch-ebsa110/timex.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/timex.h - * - * Copyright (C) 1997, 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EBSA110 architecture timex specifications - */ - -/* - * On the EBSA, the clock ticks at weird rates. - * This is therefore not used to calculate the - * divisor. - */ -#define CLOCK_TICK_RATE 47894000 - diff --git a/include/asm-arm/arch-ebsa110/uncompress.h b/include/asm-arm/arch-ebsa110/uncompress.h deleted file mode 100644 index ae5b775..0000000 --- a/include/asm-arm/arch-ebsa110/uncompress.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/uncompress.h - * - * Copyright (C) 1996,1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -#define SERIAL_BASE ((unsigned char *)0xf0000be0) - -/* - * This does not append a newline - */ -static inline void putc(int c) -{ - unsigned char v, *base = SERIAL_BASE; - - do { - v = base[UART_LSR << 2]; - barrier(); - } while (!(v & UART_LSR_THRE)); - - base[UART_TX << 2] = c; -} - -static inline void flush(void) -{ - unsigned char v, *base = SERIAL_BASE; - - do { - v = base[UART_LSR << 2]; - barrier(); - } while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) != - (UART_LSR_TEMT|UART_LSR_THRE)); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-ebsa110/vmalloc.h b/include/asm-arm/arch-ebsa110/vmalloc.h deleted file mode 100644 index 26674ba..0000000 --- a/include/asm-arm/arch-ebsa110/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa110/vmalloc.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END (PAGE_OFFSET + 0x1f000000) diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S deleted file mode 100644 index b48cec4..0000000 --- a/include/asm-arm/arch-ebsa285/debug-macro.S +++ /dev/null @@ -1,57 +0,0 @@ -/* linux/include/asm-arm/arch-ebsa285/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include - -#ifndef CONFIG_DEBUG_DC21285_PORT - /* For NetWinder debugging */ - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x7c000000 @ physical - movne \rx, #0xff000000 @ virtual - orr \rx, \rx, #0x000003f8 - .endm - -#define UART_SHIFT 0 -#define FLOW_CONTROL -#include - -#else - /* For EBSA285 debugging */ - .equ dc21285_high, ARMCSR_BASE & 0xff000000 - .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x42000000 - movne \rx, #dc21285_high - .if dc21285_low - orrne \rx, \rx, #dc21285_low - .endif - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x160] @ UARTDR - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #0x178] @ UARTFLG - tst \rd, #1 << 3 - bne 1001b - .endm - - .macro waituart,rd,rx - .endm -#endif diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h deleted file mode 100644 index 0259ad4..0000000 --- a/include/asm-arm/arch-ebsa285/dma.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/dma.h - * - * Architecture DMA routines - * - * Copyright (C) 1998,1999 Russell King - * Copyright (C) 1998,1999 Philip Blundell - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* - * The 21285 has two internal DMA channels; we call these 8 and 9. - * On CATS hardware we have an additional eight ISA dma channels - * numbered 0..7. - */ -#define _ISA_DMA(x) (0+(x)) -#define _DC21285_DMA(x) (8+(x)) - -#define MAX_DMA_CHANNELS 10 - -#define DMA_FLOPPY _ISA_DMA(2) -#define DMA_ISA_CASCADE _ISA_DMA(4) - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S deleted file mode 100644 index e203c62..0000000 --- a/include/asm-arm/arch-ebsa285/entry-macro.S +++ /dev/null @@ -1,113 +0,0 @@ -/* - * include/asm-arm/arch-ebsa285/entry-macro.S - * - * Low-level IRQ helper macros for footbridge-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include -#include - - .equ dc21285_high, ARMCSR_BASE & 0xff000000 - .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mov \base, #dc21285_high - .if dc21285_low - orr \base, \base, #dc21285_low - .endif - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0x180] @ get interrupts - - mov \irqnr, #IRQ_SDRAMPARITY - tst \irqstat, #IRQ_MASK_SDRAMPARITY - bne 1001f - - tst \irqstat, #IRQ_MASK_UART_RX - movne \irqnr, #IRQ_CONRX - bne 1001f - - tst \irqstat, #IRQ_MASK_DMA1 - movne \irqnr, #IRQ_DMA1 - bne 1001f - - tst \irqstat, #IRQ_MASK_DMA2 - movne \irqnr, #IRQ_DMA2 - bne 1001f - - tst \irqstat, #IRQ_MASK_IN0 - movne \irqnr, #IRQ_IN0 - bne 1001f - - tst \irqstat, #IRQ_MASK_IN1 - movne \irqnr, #IRQ_IN1 - bne 1001f - - tst \irqstat, #IRQ_MASK_IN2 - movne \irqnr, #IRQ_IN2 - bne 1001f - - tst \irqstat, #IRQ_MASK_IN3 - movne \irqnr, #IRQ_IN3 - bne 1001f - - tst \irqstat, #IRQ_MASK_PCI - movne \irqnr, #IRQ_PCI - bne 1001f - - tst \irqstat, #IRQ_MASK_DOORBELLHOST - movne \irqnr, #IRQ_DOORBELLHOST - bne 1001f - - tst \irqstat, #IRQ_MASK_I2OINPOST - movne \irqnr, #IRQ_I2OINPOST - bne 1001f - - tst \irqstat, #IRQ_MASK_TIMER1 - movne \irqnr, #IRQ_TIMER1 - bne 1001f - - tst \irqstat, #IRQ_MASK_TIMER2 - movne \irqnr, #IRQ_TIMER2 - bne 1001f - - tst \irqstat, #IRQ_MASK_TIMER3 - movne \irqnr, #IRQ_TIMER3 - bne 1001f - - tst \irqstat, #IRQ_MASK_UART_TX - movne \irqnr, #IRQ_CONTX - bne 1001f - - tst \irqstat, #IRQ_MASK_PCI_ABORT - movne \irqnr, #IRQ_PCI_ABORT - bne 1001f - - tst \irqstat, #IRQ_MASK_PCI_SERR - movne \irqnr, #IRQ_PCI_SERR - bne 1001f - - tst \irqstat, #IRQ_MASK_DISCARD_TIMER - movne \irqnr, #IRQ_DISCARD_TIMER - bne 1001f - - tst \irqstat, #IRQ_MASK_PCI_DPERR - movne \irqnr, #IRQ_PCI_DPERR - bne 1001f - - tst \irqstat, #IRQ_MASK_PCI_PERR - movne \irqnr, #IRQ_PCI_PERR -1001: - .endm - diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h deleted file mode 100644 index 74610c2..0000000 --- a/include/asm-arm/arch-ebsa285/hardware.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/hardware.h - * - * Copyright (C) 1998-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains the hardware definitions of the EBSA-285. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -/* Virtual Physical Size - * 0xff800000 0x40000000 1MB X-Bus - * 0xff000000 0x7c000000 1MB PCI I/O space - * 0xfe000000 0x42000000 1MB CSR - * 0xfd000000 0x78000000 1MB Outbound write flush (not supported) - * 0xfc000000 0x79000000 1MB PCI IACK/special space - * 0xfb000000 0x7a000000 16MB PCI Config type 1 - * 0xfa000000 0x7b000000 16MB PCI Config type 0 - * 0xf9000000 0x50000000 1MB Cache flush - * 0xf0000000 0x80000000 16MB ISA memory - */ -#define XBUS_SIZE 0x00100000 -#define XBUS_BASE 0xff800000 - -#define PCIO_SIZE 0x00100000 -#define PCIO_BASE 0xff000000 - -#define ARMCSR_SIZE 0x00100000 -#define ARMCSR_BASE 0xfe000000 - -#define WFLUSH_SIZE 0x00100000 -#define WFLUSH_BASE 0xfd000000 - -#define PCIIACK_SIZE 0x00100000 -#define PCIIACK_BASE 0xfc000000 - -#define PCICFG1_SIZE 0x01000000 -#define PCICFG1_BASE 0xfb000000 - -#define PCICFG0_SIZE 0x01000000 -#define PCICFG0_BASE 0xfa000000 - -#define PCIMEM_SIZE 0x01000000 -#define PCIMEM_BASE 0xf0000000 - -#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000)) -#define XBUS_LED_AMBER (1 << 0) -#define XBUS_LED_GREEN (1 << 1) -#define XBUS_LED_RED (1 << 2) -#define XBUS_LED_TOGGLE (1 << 8) - -#define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000)) -#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15) -#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4)) -#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) -#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) - -#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) - - -/* PIC irq control */ -#define PIC_LO 0x20 -#define PIC_MASK_LO 0x21 -#define PIC_HI 0xA0 -#define PIC_MASK_HI 0xA1 - -/* GPIO pins */ -#define GPIO_CCLK 0x800 -#define GPIO_DSCLK 0x400 -#define GPIO_E2CLK 0x200 -#define GPIO_IOLOAD 0x100 -#define GPIO_RED_LED 0x080 -#define GPIO_WDTIMER 0x040 -#define GPIO_DATA 0x020 -#define GPIO_IOCLK 0x010 -#define GPIO_DONE 0x008 -#define GPIO_FAN 0x004 -#define GPIO_GREEN_LED 0x002 -#define GPIO_RESET 0x001 - -/* CPLD pins */ -#define CPLD_DS_ENABLE 8 -#define CPLD_7111_DISABLE 4 -#define CPLD_UNMUTE 2 -#define CPLD_FLASH_WR_ENABLE 1 - -#ifndef __ASSEMBLY__ -extern void gpio_modify_op(int mask, int set); -extern void gpio_modify_io(int mask, int in); -extern int gpio_read(void); -extern void cpld_modify(int mask, int set); -#endif - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x1000 -#define PCIBIOS_MIN_MEM 0x81000000 - -#endif diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h deleted file mode 100644 index e88c6e2..0000000 --- a/include/asm-arm/arch-ebsa285/io.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/io.h - * - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffff - -/* - * Translation of various region addresses to virtual addresses - */ -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#if 1 -#define __mem_pci(a) (a) -#else - -static inline void __iomem *___mem_pci(void __iomem *p) -{ - unsigned long a = (unsigned long)p; - BUG_ON(a <= 0xc0000000 || a >= 0xe0000000); - return p; -} - -#define __mem_pci(a) ___mem_pci(a) -#endif - -#endif diff --git a/include/asm-arm/arch-ebsa285/irqs.h b/include/asm-arm/arch-ebsa285/irqs.h deleted file mode 100644 index 3e766f1..0000000 --- a/include/asm-arm/arch-ebsa285/irqs.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/irqs.h - * - * Copyright (C) 1998 Russell King - * Copyright (C) 1998 Phil Blundell - * - * Changelog: - * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder - * 01-Feb-1999 PJB ISA IRQs start at 0 not 16 - */ -#include - -#define NR_IRQS 36 -#define NR_DC21285_IRQS 16 - -#define _ISA_IRQ(x) (0 + (x)) -#define _ISA_INR(x) ((x) - 0) -#define _DC21285_IRQ(x) (16 + (x)) -#define _DC21285_INR(x) ((x) - 16) - -/* - * This is a list of all interrupts that the 21285 - * can generate and we handle. - */ -#define IRQ_CONRX _DC21285_IRQ(0) -#define IRQ_CONTX _DC21285_IRQ(1) -#define IRQ_TIMER1 _DC21285_IRQ(2) -#define IRQ_TIMER2 _DC21285_IRQ(3) -#define IRQ_TIMER3 _DC21285_IRQ(4) -#define IRQ_IN0 _DC21285_IRQ(5) -#define IRQ_IN1 _DC21285_IRQ(6) -#define IRQ_IN2 _DC21285_IRQ(7) -#define IRQ_IN3 _DC21285_IRQ(8) -#define IRQ_DOORBELLHOST _DC21285_IRQ(9) -#define IRQ_DMA1 _DC21285_IRQ(10) -#define IRQ_DMA2 _DC21285_IRQ(11) -#define IRQ_PCI _DC21285_IRQ(12) -#define IRQ_SDRAMPARITY _DC21285_IRQ(13) -#define IRQ_I2OINPOST _DC21285_IRQ(14) -#define IRQ_PCI_ABORT _DC21285_IRQ(15) -#define IRQ_PCI_SERR _DC21285_IRQ(16) -#define IRQ_DISCARD_TIMER _DC21285_IRQ(17) -#define IRQ_PCI_DPERR _DC21285_IRQ(18) -#define IRQ_PCI_PERR _DC21285_IRQ(19) - -#define IRQ_ISA_TIMER _ISA_IRQ(0) -#define IRQ_ISA_KEYBOARD _ISA_IRQ(1) -#define IRQ_ISA_CASCADE _ISA_IRQ(2) -#define IRQ_ISA_UART2 _ISA_IRQ(3) -#define IRQ_ISA_UART _ISA_IRQ(4) -#define IRQ_ISA_FLOPPY _ISA_IRQ(6) -#define IRQ_ISA_PRINTER _ISA_IRQ(7) -#define IRQ_ISA_RTC_ALARM _ISA_IRQ(8) -#define IRQ_ISA_2 _ISA_IRQ(9) -#define IRQ_ISA_PS2MOUSE _ISA_IRQ(12) -#define IRQ_ISA_HARDDISK1 _ISA_IRQ(14) -#define IRQ_ISA_HARDDISK2 _ISA_IRQ(15) - -#define IRQ_MASK_UART_RX (1 << 2) -#define IRQ_MASK_UART_TX (1 << 3) -#define IRQ_MASK_TIMER1 (1 << 4) -#define IRQ_MASK_TIMER2 (1 << 5) -#define IRQ_MASK_TIMER3 (1 << 6) -#define IRQ_MASK_IN0 (1 << 8) -#define IRQ_MASK_IN1 (1 << 9) -#define IRQ_MASK_IN2 (1 << 10) -#define IRQ_MASK_IN3 (1 << 11) -#define IRQ_MASK_DOORBELLHOST (1 << 15) -#define IRQ_MASK_DMA1 (1 << 16) -#define IRQ_MASK_DMA2 (1 << 17) -#define IRQ_MASK_PCI (1 << 18) -#define IRQ_MASK_SDRAMPARITY (1 << 24) -#define IRQ_MASK_I2OINPOST (1 << 25) -#define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30)) -#define IRQ_MASK_PCI_SERR (1 << 23) -#define IRQ_MASK_DISCARD_TIMER (1 << 27) -#define IRQ_MASK_PCI_DPERR (1 << 28) -#define IRQ_MASK_PCI_PERR (1 << 31) - -/* - * Netwinder interrupt allocations - */ -#define IRQ_NETWINDER_ETHER10 IRQ_IN0 -#define IRQ_NETWINDER_ETHER100 IRQ_IN1 -#define IRQ_NETWINDER_VIDCOMP IRQ_IN2 -#define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5) -#define IRQ_NETWINDER_IR _ISA_IRQ(6) -#define IRQ_NETWINDER_BUTTON _ISA_IRQ(10) -#define IRQ_NETWINDER_VGA _ISA_IRQ(11) -#define IRQ_NETWINDER_SOUND _ISA_IRQ(12) - -#undef RTC_IRQ -#define RTC_IRQ IRQ_ISA_RTC_ALARM -#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD -#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) -#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY - -#define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i) diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h deleted file mode 100644 index 9019a3b..0000000 --- a/include/asm-arm/arch-ebsa285/memory.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/memory.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 20-Oct-1996 RMK Created - * 31-Dec-1997 RMK Fixed definitions to reduce warnings. - * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions. - * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros. - * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture. - * Renamed to memory.h - * Moved PAGE_OFFSET and TASK_SIZE here - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - - -#if defined(CONFIG_FOOTBRIDGE_ADDIN) -/* - * If we may be using add-in footbridge mode, then we must - * use the out-of-line translation that makes use of the - * PCI BAR - */ -#ifndef __ASSEMBLY__ -extern unsigned long __virt_to_bus(unsigned long); -extern unsigned long __bus_to_virt(unsigned long); -#endif - -#elif defined(CONFIG_FOOTBRIDGE_HOST) - -#define __virt_to_bus(x) ((x) - 0xe0000000) -#define __bus_to_virt(x) ((x) + 0xe0000000) - -#else - -#error "Undefined footbridge mode" - -#endif - -/* Task size and page offset at 3GB */ -#define TASK_SIZE UL(0xbf000000) -#define PAGE_OFFSET UL(0xc0000000) - -/* - * Cache flushing area. - */ -#define FLUSH_BASE 0xf9000000 - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -/* - * This decides where the kernel will search for a free chunk of vm - * space during mmap's. - */ -#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) - -#define FLUSH_BASE_PHYS 0x50000000 - -#endif diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h deleted file mode 100644 index a720bf7..0000000 --- a/include/asm-arm/arch-ebsa285/system.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/system.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - if (mode == 's') { - /* - * Jump into the ROM - */ - cpu_reset(0x41000000); - } else { - if (machine_is_netwinder()) { - /* open up the SuperIO chip - */ - outb(0x87, 0x370); - outb(0x87, 0x370); - - /* aux function group 1 (logical device 7) - */ - outb(0x07, 0x370); - outb(0x07, 0x371); - - /* set GP16 for WD-TIMER output - */ - outb(0xe6, 0x370); - outb(0x00, 0x371); - - /* set a RED LED and toggle WD_TIMER for rebooting - */ - outb(0xc4, 0x338); - } else { - /* - * Force the watchdog to do a CPU reset. - * - * After making sure that the watchdog is disabled - * (so we can change the timer registers) we first - * enable the timer to autoreload itself. Next, the - * timer interval is set really short and any - * current interrupt request is cleared (so we can - * see an edge transition). Finally, TIMER4 is - * enabled as the watchdog. - */ - *CSR_SA110_CNTL &= ~(1 << 13); - *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | - TIMER_CNTL_AUTORELOAD | - TIMER_CNTL_DIV16; - *CSR_TIMER4_LOAD = 0x2; - *CSR_TIMER4_CLR = 0; - *CSR_SA110_CNTL |= (1 << 13); - } - } -} diff --git a/include/asm-arm/arch-ebsa285/timex.h b/include/asm-arm/arch-ebsa285/timex.h deleted file mode 100644 index df60b38..0000000 --- a/include/asm-arm/arch-ebsa285/timex.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/timex.h - * - * Copyright (C) 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * EBSA285 architecture timex specifications - */ - -/* - * We assume a constant here; this satisfies the maths in linux/timex.h - * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but - * this must be a constant. - */ -#define CLOCK_TICK_RATE (50000000/16) diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h deleted file mode 100644 index 86142c8..0000000 --- a/include/asm-arm/arch-ebsa285/uncompress.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/uncompress.h - * - * Copyright (C) 1996-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - -/* - * Note! This could cause problems on the NetWinder - */ -#define DC21285_BASE ((volatile unsigned int *)0x42000160) -#define SER0_BASE ((volatile unsigned char *)0x7c0003f8) - -static inline void putc(char c) -{ - if (machine_is_netwinder()) { - while ((SER0_BASE[5] & 0x60) != 0x60) - barrier(); - SER0_BASE[0] = c; - } else { - while (DC21285_BASE[6] & 8); - DC21285_BASE[0] = c; - } -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h deleted file mode 100644 index e487d7e..0000000 --- a/include/asm-arm/arch-ebsa285/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-ebsa285/vmalloc.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -#define VMALLOC_END (PAGE_OFFSET + 0x30000000) diff --git a/include/asm-arm/arch-ep93xx/debug-macro.S b/include/asm-arm/arch-ep93xx/debug-macro.S deleted file mode 100644 index 397565a..0000000 --- a/include/asm-arm/arch-ep93xx/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/debug-macro.S - * Debugging macro include header - * - * Copyright (C) 2006 Lennert Buytenhek - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base - ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base - orr \rx, \rx, #0x000c0000 - .endm - -#include diff --git a/include/asm-arm/arch-ep93xx/dma.h b/include/asm-arm/arch-ep93xx/dma.h deleted file mode 100644 index 898b3ab..0000000 --- a/include/asm-arm/arch-ep93xx/dma.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/dma.h - */ diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S deleted file mode 100644 index 241ec22..0000000 --- a/include/asm-arm/arch-ep93xx/entry-macro.S +++ /dev/null @@ -1,59 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/entry-macro.S - * IRQ demultiplexing for EP93xx - * - * Copyright (C) 2006 Lennert Buytenhek - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =(EP93XX_AHB_VIRT_BASE) - orr \base, \base, #0x000b0000 - mov \irqnr, #0 - ldr \irqstat, [\base] @ lower 32 interrupts - cmp \irqstat, #0 - bne 1001f - - eor \base, \base, #0x00070000 - ldr \irqstat, [\base] @ upper 32 interrupts - cmp \irqstat, #0 - beq 1002f - mov \irqnr, #0x20 - -1001: - movs \tmp, \irqstat, lsl #16 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #16 - - movs \tmp, \irqstat, lsl #8 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #8 - - movs \tmp, \irqstat, lsl #4 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #4 - - movs \tmp, \irqstat, lsl #2 - movne \irqstat, \tmp - addeq \irqnr, \irqnr, #2 - - movs \tmp, \irqstat, lsl #1 - addeq \irqnr, \irqnr, #1 - orrs \base, \base, #1 - -1002: - .endm diff --git a/include/asm-arm/arch-ep93xx/ep93xx-regs.h b/include/asm-arm/arch-ep93xx/ep93xx-regs.h deleted file mode 100644 index 625c6f0..0000000 --- a/include/asm-arm/arch-ep93xx/ep93xx-regs.h +++ /dev/null @@ -1,133 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h - */ - -#ifndef __ASM_ARCH_EP93XX_REGS_H -#define __ASM_ARCH_EP93XX_REGS_H - -/* - * EP93xx linux memory map: - * - * virt phys size - * fe800000 5M per-platform mappings - * fed00000 80800000 2M APB - * fef00000 80000000 1M AHB - */ - -#define EP93XX_AHB_PHYS_BASE 0x80000000 -#define EP93XX_AHB_VIRT_BASE 0xfef00000 -#define EP93XX_AHB_SIZE 0x00100000 - -#define EP93XX_APB_PHYS_BASE 0x80800000 -#define EP93XX_APB_VIRT_BASE 0xfed00000 -#define EP93XX_APB_SIZE 0x00200000 - - -/* AHB peripherals */ -#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000) - -#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) -#define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) - -#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000) -#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000) - -#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000) - -#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000) - -#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000) - -#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000) - -#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000) - -#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000) - -#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000) - -#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000) - - -/* APB peripherals */ -#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000) -#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x)) -#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00) -#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04) -#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08) -#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c) -#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20) -#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24) -#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28) -#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c) -#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60) -#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64) -#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80) -#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84) -#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88) -#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c) - -#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000) - -#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000) - -#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000) -#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x)) -#define EP93XX_GPIO_F_INT_TYPE1 EP93XX_GPIO_REG(0x4c) -#define EP93XX_GPIO_F_INT_TYPE2 EP93XX_GPIO_REG(0x50) -#define EP93XX_GPIO_F_INT_ACK EP93XX_GPIO_REG(0x54) -#define EP93XX_GPIO_F_INT_ENABLE EP93XX_GPIO_REG(0x58) -#define EP93XX_GPIO_F_INT_STATUS EP93XX_GPIO_REG(0x5c) -#define EP93XX_GPIO_A_INT_TYPE1 EP93XX_GPIO_REG(0x90) -#define EP93XX_GPIO_A_INT_TYPE2 EP93XX_GPIO_REG(0x94) -#define EP93XX_GPIO_A_INT_ACK EP93XX_GPIO_REG(0x98) -#define EP93XX_GPIO_A_INT_ENABLE EP93XX_GPIO_REG(0x9c) -#define EP93XX_GPIO_A_INT_STATUS EP93XX_GPIO_REG(0xa0) -#define EP93XX_GPIO_B_INT_TYPE1 EP93XX_GPIO_REG(0xac) -#define EP93XX_GPIO_B_INT_TYPE2 EP93XX_GPIO_REG(0xb0) -#define EP93XX_GPIO_B_INT_ACK EP93XX_GPIO_REG(0xb4) -#define EP93XX_GPIO_B_INT_ENABLE EP93XX_GPIO_REG(0xb8) -#define EP93XX_GPIO_B_INT_STATUS EP93XX_GPIO_REG(0xbc) - -#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000) - -#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000) - -#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000) - -#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000) -#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000) - -#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000) -#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000) - -#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000) -#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000) - -#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000) - -#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000) -#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000) - -#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000) - -#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000) - -#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000) -#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x)) -#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00) -#define EP93XX_SYSCON_CLOCK_CONTROL EP93XX_SYSCON_REG(0x04) -#define EP93XX_SYSCON_CLOCK_UARTBAUD 0x20000000 -#define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000 -#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08) -#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c) -#define EP93XX_SYSCON_CLOCK_SET1 EP93XX_SYSCON_REG(0x20) -#define EP93XX_SYSCON_CLOCK_SET2 EP93XX_SYSCON_REG(0x24) -#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80) -#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000 -#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0) - -#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000) - - -#endif diff --git a/include/asm-arm/arch-ep93xx/gesbc9312.h b/include/asm-arm/arch-ep93xx/gesbc9312.h deleted file mode 100644 index 4d0b302..0000000 --- a/include/asm-arm/arch-ep93xx/gesbc9312.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/gesbc9312.h - */ diff --git a/include/asm-arm/arch-ep93xx/gpio.h b/include/asm-arm/arch-ep93xx/gpio.h deleted file mode 100644 index 186e7c7..0000000 --- a/include/asm-arm/arch-ep93xx/gpio.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/gpio.h - */ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -/* GPIO port A. */ -#define EP93XX_GPIO_LINE_A(x) ((x) + 0) -#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0) -#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1) -#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2) -#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3) -#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4) -#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5) -#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6) -#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7) - -/* GPIO port B. */ -#define EP93XX_GPIO_LINE_B(x) ((x) + 8) -#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0) -#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1) -#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2) -#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3) -#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4) -#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5) -#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6) -#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7) - -/* GPIO port C. */ -#define EP93XX_GPIO_LINE_C(x) ((x) + 40) -#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0) -#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1) -#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2) -#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3) -#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4) -#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5) -#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6) -#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7) - -/* GPIO port D. */ -#define EP93XX_GPIO_LINE_D(x) ((x) + 24) -#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0) -#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1) -#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2) -#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3) -#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4) -#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5) -#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6) -#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7) - -/* GPIO port E. */ -#define EP93XX_GPIO_LINE_E(x) ((x) + 32) -#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0) -#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1) -#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2) -#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3) -#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4) -#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5) -#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6) -#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7) - -/* GPIO port F. */ -#define EP93XX_GPIO_LINE_F(x) ((x) + 16) -#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0) -#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1) -#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2) -#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3) -#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4) -#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5) -#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6) -#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7) - -/* GPIO port G. */ -#define EP93XX_GPIO_LINE_G(x) ((x) + 48) -#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0) -#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1) -#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2) -#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3) -#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4) -#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5) -#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6) -#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7) - -/* GPIO port H. */ -#define EP93XX_GPIO_LINE_H(x) ((x) + 56) -#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0) -#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1) -#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2) -#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3) -#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4) -#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5) -#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6) -#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7) - -/* maximum value for gpio line identifiers */ -#define EP93XX_GPIO_LINE_MAX EP93XX_GPIO_LINE_H(7) - -/* maximum value for irq capable line identifiers */ -#define EP93XX_GPIO_LINE_MAX_IRQ EP93XX_GPIO_LINE_F(7) - -/* new generic GPIO API - see Documentation/gpio.txt */ - -#include - -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep - -/* - * Map GPIO A0..A7 (0..7) to irq 64..71, - * B0..B7 (7..15) to irq 72..79, and - * F0..F7 (16..24) to irq 80..87. - */ -static inline int gpio_to_irq(unsigned gpio) -{ - if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ) - return 64 + gpio; - - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return irq - gpio_to_irq(0); -} - -#endif diff --git a/include/asm-arm/arch-ep93xx/hardware.h b/include/asm-arm/arch-ep93xx/hardware.h deleted file mode 100644 index 4233f6e..0000000 --- a/include/asm-arm/arch-ep93xx/hardware.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/hardware.h - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "ep93xx-regs.h" - -#define pcibios_assign_all_busses() 0 - -#include "platform.h" - -#include "gesbc9312.h" -#include "ts72xx.h" - -#endif diff --git a/include/asm-arm/arch-ep93xx/io.h b/include/asm-arm/arch-ep93xx/io.h deleted file mode 100644 index 7b4d25e..0000000 --- a/include/asm-arm/arch-ep93xx/io.h +++ /dev/null @@ -1,8 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/io.h - */ - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(p) ((void __iomem *)(p)) -#define __mem_pci(p) (p) diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h deleted file mode 100644 index 53d4a68..0000000 --- a/include/asm-arm/arch-ep93xx/irqs.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/irqs.h - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#define IRQ_EP93XX_COMMRX 2 -#define IRQ_EP93XX_COMMTX 3 -#define IRQ_EP93XX_TIMER1 4 -#define IRQ_EP93XX_TIMER2 5 -#define IRQ_EP93XX_AACINTR 6 -#define IRQ_EP93XX_DMAM2P0 7 -#define IRQ_EP93XX_DMAM2P1 8 -#define IRQ_EP93XX_DMAM2P2 9 -#define IRQ_EP93XX_DMAM2P3 10 -#define IRQ_EP93XX_DMAM2P4 11 -#define IRQ_EP93XX_DMAM2P5 12 -#define IRQ_EP93XX_DMAM2P6 13 -#define IRQ_EP93XX_DMAM2P7 14 -#define IRQ_EP93XX_DMAM2P8 15 -#define IRQ_EP93XX_DMAM2P9 16 -#define IRQ_EP93XX_DMAM2M0 17 -#define IRQ_EP93XX_DMAM2M1 18 -#define IRQ_EP93XX_GPIO0MUX 19 -#define IRQ_EP93XX_GPIO1MUX 20 -#define IRQ_EP93XX_GPIO2MUX 21 -#define IRQ_EP93XX_GPIO3MUX 22 -#define IRQ_EP93XX_UART1RX 23 -#define IRQ_EP93XX_UART1TX 24 -#define IRQ_EP93XX_UART2RX 25 -#define IRQ_EP93XX_UART2TX 26 -#define IRQ_EP93XX_UART3RX 27 -#define IRQ_EP93XX_UART3TX 28 -#define IRQ_EP93XX_KEY 29 -#define IRQ_EP93XX_TOUCH 30 -#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc - -#define IRQ_EP93XX_EXT0 32 -#define IRQ_EP93XX_EXT1 33 -#define IRQ_EP93XX_EXT2 34 -#define IRQ_EP93XX_64HZ 35 -#define IRQ_EP93XX_WATCHDOG 36 -#define IRQ_EP93XX_RTC 37 -#define IRQ_EP93XX_IRDA 38 -#define IRQ_EP93XX_ETHERNET 39 -#define IRQ_EP93XX_EXT3 40 -#define IRQ_EP93XX_PROG 41 -#define IRQ_EP93XX_1HZ 42 -#define IRQ_EP93XX_VSYNC 43 -#define IRQ_EP93XX_VIDEO_FIFO 44 -#define IRQ_EP93XX_SSP1RX 45 -#define IRQ_EP93XX_SSP1TX 46 -#define IRQ_EP93XX_GPIO4MUX 47 -#define IRQ_EP93XX_GPIO5MUX 48 -#define IRQ_EP93XX_GPIO6MUX 49 -#define IRQ_EP93XX_GPIO7MUX 50 -#define IRQ_EP93XX_TIMER3 51 -#define IRQ_EP93XX_UART1 52 -#define IRQ_EP93XX_SSP 53 -#define IRQ_EP93XX_UART2 54 -#define IRQ_EP93XX_UART3 55 -#define IRQ_EP93XX_USB 56 -#define IRQ_EP93XX_ETHERNET_PME 57 -#define IRQ_EP93XX_DSP 58 -#define IRQ_EP93XX_GPIO_AB 59 -#define IRQ_EP93XX_SAI 60 -#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff - -#define NR_EP93XX_IRQS (64 + 24) - -#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x)) -#define EP93XX_BOARD_IRQS 32 - -#define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS) - - -#endif diff --git a/include/asm-arm/arch-ep93xx/memory.h b/include/asm-arm/arch-ep93xx/memory.h deleted file mode 100644 index 4b1a5c7..0000000 --- a/include/asm-arm/arch-ep93xx/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#define __bus_to_virt(x) __phys_to_virt(x) -#define __virt_to_bus(x) __virt_to_phys(x) - - -#endif diff --git a/include/asm-arm/arch-ep93xx/platform.h b/include/asm-arm/arch-ep93xx/platform.h deleted file mode 100644 index 44eccec..0000000 --- a/include/asm-arm/arch-ep93xx/platform.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/platform.h - */ - -#ifndef __ASSEMBLY__ - -void ep93xx_map_io(void); -void ep93xx_init_irq(void); -void ep93xx_init_time(unsigned long); -void ep93xx_init_devices(void); -extern struct sys_timer ep93xx_timer; - -struct ep93xx_eth_data -{ - unsigned char dev_addr[6]; - unsigned char phy_id; -}; - - -#endif diff --git a/include/asm-arm/arch-ep93xx/system.h b/include/asm-arm/arch-ep93xx/system.h deleted file mode 100644 index f1a5acf..0000000 --- a/include/asm-arm/arch-ep93xx/system.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/system.h - */ - -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - u32 devicecfg; - - local_irq_disable(); - - devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG); - __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); - __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); - __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); - __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG); - - while (1) - ; -} diff --git a/include/asm-arm/arch-ep93xx/timex.h b/include/asm-arm/arch-ep93xx/timex.h deleted file mode 100644 index 4140bdd..0000000 --- a/include/asm-arm/arch-ep93xx/timex.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/timex.h - */ - -#define CLOCK_TICK_RATE 983040 diff --git a/include/asm-arm/arch-ep93xx/ts72xx.h b/include/asm-arm/arch-ep93xx/ts72xx.h deleted file mode 100644 index a94f63f..0000000 --- a/include/asm-arm/arch-ep93xx/ts72xx.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/ts72xx.h - */ - -/* - * TS72xx memory map: - * - * virt phys size - * febff000 22000000 4K model number register - * febfe000 22400000 4K options register - * febfd000 22800000 4K options register #2 - * febfc000 [67]0000000 4K NAND data register - * febfb000 [67]0400000 4K NAND control register - * febfa000 [67]0800000 4K NAND busy register - * febf9000 10800000 4K TS-5620 RTC index register - * febf8000 11700000 4K TS-5620 RTC data register - */ - -#define TS72XX_MODEL_PHYS_BASE 0x22000000 -#define TS72XX_MODEL_VIRT_BASE 0xfebff000 -#define TS72XX_MODEL_SIZE 0x00001000 - -#define TS72XX_MODEL_TS7200 0x00 -#define TS72XX_MODEL_TS7250 0x01 -#define TS72XX_MODEL_TS7260 0x02 - - -#define TS72XX_OPTIONS_PHYS_BASE 0x22400000 -#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000 -#define TS72XX_OPTIONS_SIZE 0x00001000 - -#define TS72XX_OPTIONS_COM2_RS485 0x02 -#define TS72XX_OPTIONS_MAX197 0x01 - - -#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000 -#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000 -#define TS72XX_OPTIONS2_SIZE 0x00001000 - -#define TS72XX_OPTIONS2_TS9420 0x04 -#define TS72XX_OPTIONS2_TS9420_BOOT 0x02 - - -#define TS72XX_NOR_PHYS_BASE 0x60000000 -#define TS72XX_NOR2_PHYS_BASE 0x62000000 - -#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000 -#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000 -#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000 -#define TS72XX_NAND_DATA_SIZE 0x00001000 - -#define TS72XX_NAND1_CONTROL_PHYS_BASE 0x60400000 -#define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000 -#define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000 -#define TS72XX_NAND_CONTROL_SIZE 0x00001000 - -#define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000 -#define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000 -#define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000 -#define TS72XX_NAND_BUSY_SIZE 0x00001000 - - -#define TS72XX_RTC_INDEX_VIRT_BASE 0xfebf9000 -#define TS72XX_RTC_INDEX_PHYS_BASE 0x10800000 -#define TS72XX_RTC_INDEX_SIZE 0x00001000 - -#define TS72XX_RTC_DATA_VIRT_BASE 0xfebf8000 -#define TS72XX_RTC_DATA_PHYS_BASE 0x11700000 -#define TS72XX_RTC_DATA_SIZE 0x00001000 - - -#ifndef __ASSEMBLY__ -#include - -static inline int board_is_ts7200(void) -{ - return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200; -} - -static inline int board_is_ts7250(void) -{ - return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250; -} - -static inline int board_is_ts7260(void) -{ - return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260; -} - -static inline int is_max197_installed(void) -{ - return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) & - TS72XX_OPTIONS_MAX197); -} - -static inline int is_ts9420_installed(void) -{ - return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) & - TS72XX_OPTIONS2_TS9420); -} -#endif diff --git a/include/asm-arm/arch-ep93xx/uncompress.h b/include/asm-arm/arch-ep93xx/uncompress.h deleted file mode 100644 index c15274c..0000000 --- a/include/asm-arm/arch-ep93xx/uncompress.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/uncompress.h - * - * Copyright (C) 2006 Lennert Buytenhek - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - -#include - -static unsigned char __raw_readb(unsigned int ptr) -{ - return *((volatile unsigned char *)ptr); -} - -static unsigned int __raw_readl(unsigned int ptr) -{ - return *((volatile unsigned int *)ptr); -} - -static void __raw_writeb(unsigned char value, unsigned int ptr) -{ - *((volatile unsigned char *)ptr) = value; -} - -static void __raw_writel(unsigned int value, unsigned int ptr) -{ - *((volatile unsigned int *)ptr) = value; -} - - -#define PHYS_UART1_DATA 0x808c0000 -#define PHYS_UART1_FLAG 0x808c0018 -#define UART1_FLAG_TXFF 0x20 - -static inline void putc(int c) -{ - int i; - - for (i = 0; i < 1000; i++) { - /* Transmit fifo not full? */ - if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF)) - break; - } - - __raw_writeb(c, PHYS_UART1_DATA); -} - -static inline void flush(void) -{ -} - - -/* - * Some bootloaders don't turn off DMA from the ethernet MAC before - * jumping to linux, which means that we might end up with bits of RX - * status and packet data scribbled over the uncompressed kernel image. - * Work around this by resetting the ethernet MAC before we uncompress. - */ -#define PHYS_ETH_SELF_CTL 0x80010020 -#define ETH_SELF_CTL_RESET 0x00000001 - -static void ethernet_reset(void) -{ - unsigned int v; - - /* Reset the ethernet MAC. */ - v = __raw_readl(PHYS_ETH_SELF_CTL); - __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL); - - /* Wait for reset to finish. */ - while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET) - ; -} - - -static void arch_decomp_setup(void) -{ - ethernet_reset(); -} - -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-ep93xx/vmalloc.h b/include/asm-arm/arch-ep93xx/vmalloc.h deleted file mode 100644 index 205ea6b..0000000 --- a/include/asm-arm/arch-ep93xx/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * linux/include/asm-arm/arch-ep93xx/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000 diff --git a/include/asm-arm/arch-h720x/boards.h b/include/asm-arm/arch-h720x/boards.h deleted file mode 100644 index 8021f81..0000000 --- a/include/asm-arm/arch-h720x/boards.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/boards.h - * - * Copyright (C) 2003 Thomas Gleixner - * (C) 2003 Robert Schwebel - * - * This file contains the board specific defines for various devices - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_INCMACH_H -#error Do not include this file directly. Include asm/hardware.h instead ! -#endif - -/* Hynix H7202 developer board specific device defines */ -#ifdef CONFIG_ARCH_H7202 - -/* FLASH */ -#define FLASH_VIRT 0xd0000000 -#define FLASH_PHYS 0x00000000 -#define FLASH_SIZE 0x02000000 - -/* onboard LAN controller */ -# define ETH0_PHYS 0x08000000 - -/* Touch screen defines */ -/* GPIO Port */ -#define PEN_GPIO GPIO_B_VIRT -/* Bitmask for pen down interrupt */ -#define PEN_INT_BIT (1<<7) -/* Bitmask for pen up interrupt */ -#define PEN_ENA_BIT (1<<6) -/* pen up interrupt */ -#define IRQ_PEN IRQ_MUX_GPIOB(7) - -#endif - -/* Hynix H7201 developer board specific device defines */ -#if defined (CONFIG_ARCH_H7201) -/* ROM DISK SPACE */ -#define ROM_DISK_BASE 0xc1800000 -#define ROM_DISK_START 0x41800000 -#define ROM_DISK_SIZE 0x00700000 - -/* SRAM DISK SPACE */ -#define SRAM_DISK_BASE 0xf1000000 -#define SRAM_DISK_START 0x04000000 -#define SRAM_DISK_SIZE 0x00400000 -#endif - diff --git a/include/asm-arm/arch-h720x/debug-macro.S b/include/asm-arm/arch-h720x/debug-macro.S deleted file mode 100644 index 82822d3..0000000 --- a/include/asm-arm/arch-h720x/debug-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/include/asm-arm/arch-h720x/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .equ io_virt, IO_BASE - .equ io_phys, IO_START - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #io_phys @ physical base address - movne \rx, #io_virt @ virtual address - add \rx, \rx, #0x00020000 @ UART1 - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x0] @ UARTDR - - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full - bne 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy - bne 1001b - .endm diff --git a/include/asm-arm/arch-h720x/dma.h b/include/asm-arm/arch-h720x/dma.h deleted file mode 100644 index bfc6636..0000000 --- a/include/asm-arm/arch-h720x/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/dma.h - * - * Architecture DMA routes - * - * Copyright (C) 1997.1998 Russell King - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* - * This is the maximum DMA address that can be DMAd to. - * There should not be more than (0xd0000000 - 0xc0000000) - * bytes of RAM. - */ -#define MAX_DMA_ADDRESS 0xd0000000 - -#if defined (CONFIG_CPU_H7201) -#define MAX_DMA_CHANNELS 3 -#elif defined (CONFIG_CPU_H7202) -#define MAX_DMA_CHANNELS 4 -#else -#error processor definition missmatch -#endif - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-h720x/entry-macro.S b/include/asm-arm/arch-h720x/entry-macro.S deleted file mode 100644 index 38dd63a..0000000 --- a/include/asm-arm/arch-h720x/entry-macro.S +++ /dev/null @@ -1,66 +0,0 @@ -/* - * include/asm-arm/arch-h720x/entry-macro.S - * - * Low-level IRQ helper macros for Hynix HMS720x based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp -#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) - @ we could use the id register on H7202, but this is not - @ properly updated when we come back from asm_do_irq - @ without a previous return from interrupt - @ (see loops below in irq_svc, irq_usr) - @ We see unmasked pending ints only, as the masked pending ints - @ are not visible here - - mov \base, #0xf0000000 @ base register - orr \base, \base, #0x24000 @ irqbase - ldr \irqstat, [\base, #0x04] @ get interrupt status -#if defined (CONFIG_CPU_H7201) - ldr \tmp, =0x001fffff -#else - mvn \tmp, #0xc0000000 -#endif - and \irqstat, \irqstat, \tmp @ mask out unused ints - mov \irqnr, #0 - - mov \tmp, #0xff00 - orr \tmp, \tmp, #0xff - tst \irqstat, \tmp - addeq \irqnr, \irqnr, #16 - moveq \irqstat, \irqstat, lsr #16 - tst \irqstat, #255 - addeq \irqnr, \irqnr, #8 - moveq \irqstat, \irqstat, lsr #8 - tst \irqstat, #15 - addeq \irqnr, \irqnr, #4 - moveq \irqstat, \irqstat, lsr #4 - tst \irqstat, #3 - addeq \irqnr, \irqnr, #2 - moveq \irqstat, \irqstat, lsr #2 - tst \irqstat, #1 - addeq \irqnr, \irqnr, #1 - moveq \irqstat, \irqstat, lsr #1 - tst \irqstat, #1 @ bit 0 should be set - .endm - - .macro irq_prio_table - .endm - -#else -#error hynix processor selection missmatch -#endif - diff --git a/include/asm-arm/arch-h720x/h7201-regs.h b/include/asm-arm/arch-h720x/h7201-regs.h deleted file mode 100644 index 49d4f6b..0000000 --- a/include/asm-arm/arch-h720x/h7201-regs.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/h7201-regs.h - * - * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc. - * (C) 2003 Thomas Gleixner - * (C) 2003 Robert Schwebel - * (C) 2004 Sascha Hauer - * - * This file contains the hardware definitions of the h720x processors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Do not add implementations specific defines here. This files contains - * only defines of the onchip peripherals. Add those defines to boards.h, - * which is included by this file. - */ - -#define SERIAL2_VIRT (IO_VIRT + 0x50100) -#define SERIAL3_VIRT (IO_VIRT + 0x50200) - -/* - * PCMCIA - */ -#define PCMCIA0_ATT_BASE 0xe5000000 -#define PCMCIA0_ATT_SIZE 0x00200000 -#define PCMCIA0_ATT_START 0x20000000 -#define PCMCIA0_MEM_BASE 0xe5200000 -#define PCMCIA0_MEM_SIZE 0x00200000 -#define PCMCIA0_MEM_START 0x24000000 -#define PCMCIA0_IO_BASE 0xe5400000 -#define PCMCIA0_IO_SIZE 0x00200000 -#define PCMCIA0_IO_START 0x28000000 - -#define PCMCIA1_ATT_BASE 0xe5600000 -#define PCMCIA1_ATT_SIZE 0x00200000 -#define PCMCIA1_ATT_START 0x30000000 -#define PCMCIA1_MEM_BASE 0xe5800000 -#define PCMCIA1_MEM_SIZE 0x00200000 -#define PCMCIA1_MEM_START 0x34000000 -#define PCMCIA1_IO_BASE 0xe5a00000 -#define PCMCIA1_IO_SIZE 0x00200000 -#define PCMCIA1_IO_START 0x38000000 - -#define PRIME3C_BASE 0xf0050000 -#define PRIME3C_SIZE 0x00001000 -#define PRIME3C_START 0x10000000 - -/* VGA Controller */ -#define VGA_RAMBASE 0x50 -#define VGA_TIMING0 0x60 -#define VGA_TIMING1 0x64 -#define VGA_TIMING2 0x68 -#define VGA_TIMING3 0x6c - -#define LCD_CTRL_VGA_ENABLE 0x00000100 -#define LCD_CTRL_VGA_BPP_MASK 0x00000600 -#define LCD_CTRL_VGA_4BPP 0x00000000 -#define LCD_CTRL_VGA_8BPP 0x00000200 -#define LCD_CTRL_VGA_16BPP 0x00000300 -#define LCD_CTRL_SHARE_DMA 0x00000800 -#define LCD_CTRL_VDE 0x00100000 -#define LCD_CTRL_LPE 0x00400000 /* LCD Power enable */ -#define LCD_CTRL_BLE 0x00800000 /* LCD backlight enable */ - -#define VGA_PALETTE_BASE (IO_VIRT + 0x10800) diff --git a/include/asm-arm/arch-h720x/h7202-regs.h b/include/asm-arm/arch-h720x/h7202-regs.h deleted file mode 100644 index 43d8ba8..0000000 --- a/include/asm-arm/arch-h720x/h7202-regs.h +++ /dev/null @@ -1,155 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/h7202-regs.h - * - * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc. - * (C) 2003 Thomas Gleixner - * (C) 2003 Robert Schwebel - * (C) 2004 Sascha Hauer - * - * This file contains the hardware definitions of the h720x processors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Do not add implementations specific defines here. This files contains - * only defines of the onchip peripherals. Add those defines to boards.h, - * which is included by this file. - */ - -#define SERIAL2_OFS 0x2d000 -#define SERIAL2_BASE (IO_PHYS + SERIAL2_OFS) -#define SERIAL2_VIRT (IO_VIRT + SERIAL2_OFS) -#define SERIAL3_OFS 0x2e000 -#define SERIAL3_BASE (IO_PHYS + SERIAL3_OFS) -#define SERIAL3_VIRT (IO_VIRT + SERIAL3_OFS) - -/* Matrix Keyboard Controller */ -#define KBD_VIRT (IO_VIRT + 0x22000) -#define KBD_KBCR 0x00 -#define KBD_KBSC 0x04 -#define KBD_KBTR 0x08 -#define KBD_KBVR0 0x0C -#define KBD_KBVR1 0x10 -#define KBD_KBSR 0x18 - -#define KBD_KBCR_SCANENABLE (1 << 7) -#define KBD_KBCR_NPOWERDOWN (1 << 2) -#define KBD_KBCR_CLKSEL_MASK (3) -#define KBD_KBCR_CLKSEL_PCLK2 0x0 -#define KBD_KBCR_CLKSEL_PCLK128 0x1 -#define KBD_KBCR_CLKSEL_PCLK256 0x2 -#define KBD_KBCR_CLKSEL_PCLK512 0x3 - -#define KBD_KBSR_INTR (1 << 0) -#define KBD_KBSR_WAKEUP (1 << 1) - -/* USB device controller */ - -#define USBD_BASE (IO_VIRT + 0x12000) -#define USBD_LENGTH 0x3C - -#define USBD_GCTRL 0x00 -#define USBD_EPCTRL 0x04 -#define USBD_INTMASK 0x08 -#define USBD_INTSTAT 0x0C -#define USBD_PWR 0x10 -#define USBD_DMARXTX 0x14 -#define USBD_DEVID 0x18 -#define USBD_DEVCLASS 0x1C -#define USBD_INTCLASS 0x20 -#define USBD_SETUP0 0x24 -#define USBD_SETUP1 0x28 -#define USBD_ENDP0RD 0x2C -#define USBD_ENDP0WT 0x30 -#define USBD_ENDP1RD 0x34 -#define USBD_ENDP2WT 0x38 - -/* PS/2 port */ -#define PSDATA 0x00 -#define PSSTAT 0x04 -#define PSSTAT_TXEMPTY (1<<0) -#define PSSTAT_TXBUSY (1<<1) -#define PSSTAT_RXFULL (1<<2) -#define PSSTAT_RXBUSY (1<<3) -#define PSSTAT_CLKIN (1<<4) -#define PSSTAT_DATAIN (1<<5) -#define PSSTAT_PARITY (1<<6) - -#define PSCONF 0x08 -#define PSCONF_ENABLE (1<<0) -#define PSCONF_TXINTEN (1<<2) -#define PSCONF_RXINTEN (1<<3) -#define PSCONF_FORCECLKLOW (1<<4) -#define PSCONF_FORCEDATLOW (1<<5) -#define PSCONF_LCE (1<<6) - -#define PSINTR 0x0C -#define PSINTR_TXINT (1<<0) -#define PSINTR_RXINT (1<<1) -#define PSINTR_PAR (1<<2) -#define PSINTR_RXTO (1<<3) -#define PSINTR_TXTO (1<<4) - -#define PSTDLO 0x10 /* clk low before start transmission */ -#define PSTPRI 0x14 /* PRI clock */ -#define PSTXMT 0x18 /* maximum transmission time */ -#define PSTREC 0x20 /* maximum receive time */ -#define PSPWDN 0x3c - -/* ADC converter */ -#define ADC_BASE (IO_VIRT + 0x29000) -#define ADC_CR 0x00 -#define ADC_TSCTRL 0x04 -#define ADC_BT_CTRL 0x08 -#define ADC_MC_CTRL 0x0C -#define ADC_STATUS 0x10 - -/* ADC control register bits */ -#define ADC_CR_PW_CTRL 0x80 -#define ADC_CR_DIRECTC 0x04 -#define ADC_CR_CONTIME_NO 0x00 -#define ADC_CR_CONTIME_2 0x04 -#define ADC_CR_CONTIME_4 0x08 -#define ADC_CR_CONTIME_ADE 0x0c -#define ADC_CR_LONGCALTIME 0x01 - -/* ADC touch panel register bits */ -#define ADC_TSCTRL_ENABLE 0x80 -#define ADC_TSCTRL_INTR 0x40 -#define ADC_TSCTRL_SWBYPSS 0x20 -#define ADC_TSCTRL_SWINVT 0x10 -#define ADC_TSCTRL_S400 0x03 -#define ADC_TSCTRL_S200 0x02 -#define ADC_TSCTRL_S100 0x01 -#define ADC_TSCTRL_S50 0x00 - -/* ADC Interrupt Status Register bits */ -#define ADC_STATUS_TS_BIT 0x80 -#define ADC_STATUS_MBT_BIT 0x40 -#define ADC_STATUS_BBT_BIT 0x20 -#define ADC_STATUS_MIC_BIT 0x10 - -/* Touch data registers */ -#define ADC_TS_X0X1 0x30 -#define ADC_TS_X2X3 0x34 -#define ADC_TS_Y0Y1 0x38 -#define ADC_TS_Y2Y3 0x3c -#define ADC_TS_X4X5 0x40 -#define ADC_TS_X6X7 0x44 -#define ADC_TS_Y4Y5 0x48 -#define ADC_TS_Y6Y7 0x50 - -/* battery data */ -#define ADC_MB_DATA 0x54 -#define ADC_BB_DATA 0x58 - -/* Sound data register */ -#define ADC_SD_DAT0 0x60 -#define ADC_SD_DAT1 0x64 -#define ADC_SD_DAT2 0x68 -#define ADC_SD_DAT3 0x6c -#define ADC_SD_DAT4 0x70 -#define ADC_SD_DAT5 0x74 -#define ADC_SD_DAT6 0x78 -#define ADC_SD_DAT7 0x7c diff --git a/include/asm-arm/arch-h720x/hardware.h b/include/asm-arm/arch-h720x/hardware.h deleted file mode 100644 index dfb7789..0000000 --- a/include/asm-arm/arch-h720x/hardware.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/hardware.h - * - * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc. - * (C) 2003 Thomas Gleixner - * (C) 2003 Robert Schwebel - * - * This file contains the hardware definitions of the h720x processors - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Do not add implementations specific defines here. This files contains - * only defines of the onchip peripherals. Add those defines to boards.h, - * which is included by this file. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#define IOCLK (3686400L) - -/* Onchip peripherals */ - -#define IO_VIRT 0xf0000000 /* IO peripherals */ -#define IO_PHYS 0x80000000 -#define IO_SIZE 0x00050000 - -#ifdef CONFIG_CPU_H7202 -#include "h7202-regs.h" -#elif defined CONFIG_CPU_H7201 -#include "h7201-regs.h" -#else -#error machine definition mismatch -#endif - -/* Macro to access the CPU IO */ -#define CPU_IO(x) (*(volatile u32*)(x)) - -/* Macro to access general purpose regs (base, offset) */ -#define CPU_REG(x,y) CPU_IO(x+y) - -/* Macro to access irq related regs */ -#define IRQ_REG(x) CPU_REG(IRQC_VIRT,x) - -/* CPU registers */ -/* general purpose I/O */ -#define GPIO_VIRT(x) (IO_VIRT + 0x23000 + ((x)<<5)) -#define GPIO_A_VIRT (GPIO_VIRT(0)) -#define GPIO_B_VIRT (GPIO_VIRT(1)) -#define GPIO_C_VIRT (GPIO_VIRT(2)) -#define GPIO_D_VIRT (GPIO_VIRT(3)) -#define GPIO_E_VIRT (GPIO_VIRT(4)) -#define GPIO_AMULSEL (GPIO_VIRT(0) + 0xA4) - -#define AMULSEL_USIN2 (1<<5) -#define AMULSEL_USOUT2 (1<<6) -#define AMULSEL_USIN3 (1<<13) -#define AMULSEL_USOUT3 (1<<14) -#define AMULSEL_IRDIN (1<<15) -#define AMULSEL_IRDOUT (1<<7) - -/* Register offsets general purpose I/O */ -#define GPIO_DATA 0x00 -#define GPIO_DIR 0x04 -#define GPIO_MASK 0x08 -#define GPIO_STAT 0x0C -#define GPIO_EDGE 0x10 -#define GPIO_CLR 0x14 -#define GPIO_POL 0x18 -#define GPIO_EN 0x1C - -/*interrupt controller */ -#define IRQC_VIRT (IO_VIRT + 0x24000) -/* register offset interrupt controller */ -#define IRQC_IER 0x00 -#define IRQC_ISR 0x04 - -/* timer unit */ -#define TIMER_VIRT (IO_VIRT + 0x25000) -/* Register offsets timer unit */ -#define TM0_PERIOD 0x00 -#define TM0_COUNT 0x08 -#define TM0_CTRL 0x10 -#define TM1_PERIOD 0x20 -#define TM1_COUNT 0x28 -#define TM1_CTRL 0x30 -#define TM2_PERIOD 0x40 -#define TM2_COUNT 0x48 -#define TM2_CTRL 0x50 -#define TIMER_TOPCTRL 0x60 -#define TIMER_TOPSTAT 0x64 -#define T64_COUNTL 0x80 -#define T64_COUNTH 0x84 -#define T64_CTRL 0x88 -#define T64_BASEL 0x94 -#define T64_BASEH 0x98 -/* Bitmaks timer unit TOPSTAT reg */ -#define TSTAT_T0INT 0x1 -#define TSTAT_T1INT 0x2 -#define TSTAT_T2INT 0x4 -#define TSTAT_T3INT 0x8 -/* Bit description of TMx_CTRL register */ -#define TM_START 0x1 -#define TM_REPEAT 0x2 -#define TM_RESET 0x4 -/* Bit description of TIMER_CTRL register */ -#define ENABLE_TM0_INTR 0x1 -#define ENABLE_TM1_INTR 0x2 -#define ENABLE_TM2_INTR 0x4 -#define TIMER_ENABLE_BIT 0x8 -#define ENABLE_TIMER64 0x10 -#define ENABLE_TIMER64_INT 0x20 - -/* PMU & PLL */ -#define PMU_BASE (IO_VIRT + 0x1000) -#define PMU_MODE 0x00 -#define PMU_STAT 0x20 -#define PMU_PLL_CTRL 0x28 - -/* PMU Mode bits */ -#define PMU_MODE_SLOW 0x00 -#define PMU_MODE_RUN 0x01 -#define PMU_MODE_IDLE 0x02 -#define PMU_MODE_SLEEP 0x03 -#define PMU_MODE_INIT 0x04 -#define PMU_MODE_DEEPSLEEP 0x07 -#define PMU_MODE_WAKEUP 0x08 - -/* PMU ... */ -#define PLL_2_EN 0x8000 -#define PLL_1_EN 0x4000 -#define PLL_3_MUTE 0x0080 - -/* Control bits for PMU/ PLL */ -#define PMU_WARMRESET 0x00010000 -#define PLL_CTRL_MASK23 0x000080ff - -/* LCD Controller */ -#define LCD_BASE (IO_VIRT + 0x10000) -#define LCD_CTRL 0x00 -#define LCD_STATUS 0x04 -#define LCD_STATUS_M 0x08 -#define LCD_INTERRUPT 0x0C -#define LCD_DBAR 0x10 -#define LCD_DCAR 0x14 -#define LCD_TIMING0 0x20 -#define LCD_TIMING1 0x24 -#define LCD_TIMING2 0x28 -#define LCD_TEST 0x40 - -/* LCD Control Bits */ -#define LCD_CTRL_LCD_ENABLE 0x00000001 -/* Bits per pixel */ -#define LCD_CTRL_LCD_BPP_MASK 0x00000006 -#define LCD_CTRL_LCD_4BPP 0x00000000 -#define LCD_CTRL_LCD_8BPP 0x00000002 -#define LCD_CTRL_LCD_16BPP 0x00000004 -#define LCD_CTRL_LCD_BW 0x00000008 -#define LCD_CTRL_LCD_TFT 0x00000010 -#define LCD_CTRL_BGR 0x00001000 -#define LCD_CTRL_LCD_VCOMP 0x00080000 -#define LCD_CTRL_LCD_MONO8 0x00200000 -#define LCD_CTRL_LCD_PWR 0x00400000 -#define LCD_CTRL_LCD_BLE 0x00800000 -#define LCD_CTRL_LDBUSEN 0x01000000 - -/* Palette */ -#define LCD_PALETTE_BASE (IO_VIRT + 0x10400) - -/* Serial ports */ -#define SERIAL0_OFS 0x20000 -#define SERIAL0_VIRT (IO_VIRT + SERIAL0_OFS) -#define SERIAL0_BASE (IO_PHYS + SERIAL0_OFS) - -#define SERIAL1_OFS 0x21000 -#define SERIAL1_VIRT (IO_VIRT + SERIAL1_OFS) -#define SERIAL1_BASE (IO_PHYS + SERIAL1_OFS) - -#define SERIAL_ENABLE 0x30 -#define SERIAL_ENABLE_EN (1<<0) - -/* General defines to pacify gcc */ -#define PCIO_BASE (0) /* for inb, outb and friends */ -#define PCIO_VIRT PCIO_BASE - -#define __ASM_ARCH_HARDWARE_INCMACH_H -#include "boards.h" -#undef __ASM_ARCH_HARDWARE_INCMACH_H - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h deleted file mode 100644 index 6881482..0000000 --- a/include/asm-arm/arch-h720x/io.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/io.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * - * 09-19-2001 JJKIM - * Created from linux/include/asm-arm/arch-l7200/io.h - * - * 03-27-2003 Robert Schwebel : - * re-unified header files for h720x - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-h720x/irqs.h b/include/asm-arm/arch-h720x/irqs.h deleted file mode 100644 index 8244413..0000000 --- a/include/asm-arm/arch-h720x/irqs.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/irqs.h - * - * Copyright (C) 2000 Jungjun Kim - * (C) 2003 Robert Schwebel - * (C) 2003 Thomas Gleixner - * - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#if defined (CONFIG_CPU_H7201) - -#define IRQ_PMU 0 /* 0x000001 */ -#define IRQ_DMA 1 /* 0x000002 */ -#define IRQ_LCD 2 /* 0x000004 */ -#define IRQ_VGA 3 /* 0x000008 */ -#define IRQ_PCMCIA1 4 /* 0x000010 */ -#define IRQ_PCMCIA2 5 /* 0x000020 */ -#define IRQ_AFE 6 /* 0x000040 */ -#define IRQ_AIC 7 /* 0x000080 */ -#define IRQ_KEYBOARD 8 /* 0x000100 */ -#define IRQ_TIMER0 9 /* 0x000200 */ -#define IRQ_RTC 10 /* 0x000400 */ -#define IRQ_SOUND 11 /* 0x000800 */ -#define IRQ_USB 12 /* 0x001000 */ -#define IRQ_IrDA 13 /* 0x002000 */ -#define IRQ_UART0 14 /* 0x004000 */ -#define IRQ_UART1 15 /* 0x008000 */ -#define IRQ_SPI 16 /* 0x010000 */ -#define IRQ_GPIOA 17 /* 0x020000 */ -#define IRQ_GPIOB 18 /* 0x040000 */ -#define IRQ_GPIOC 19 /* 0x080000 */ -#define IRQ_GPIOD 20 /* 0x100000 */ -#define IRQ_CommRX 21 /* 0x200000 */ -#define IRQ_CommTX 22 /* 0x400000 */ -#define IRQ_Soft 23 /* 0x800000 */ - -#define NR_GLBL_IRQS 24 - -#define IRQ_CHAINED_GPIOA(x) (NR_GLBL_IRQS + x) -#define IRQ_CHAINED_GPIOB(x) (IRQ_CHAINED_GPIOA(32) + x) -#define IRQ_CHAINED_GPIOC(x) (IRQ_CHAINED_GPIOB(32) + x) -#define IRQ_CHAINED_GPIOD(x) (IRQ_CHAINED_GPIOC(32) + x) -#define NR_IRQS IRQ_CHAINED_GPIOD(32) - -/* Enable mask for multiplexed interrupts */ -#define IRQ_ENA_MUX (1<> 5) -#define IRQ_TO_BIT(irq) (1 << ((irq - NR_GLBL_IRQS) % 32)) - -#endif diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h deleted file mode 100644 index 53e923d..0000000 --- a/include/asm-arm/arch-h720x/memory.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/memory.h - * - * Copyright (c) 2000 Jungjun Kim - * - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Page offset: - * ( 0xc0000000UL ) - */ -#define PHYS_OFFSET UL(0x40000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - * - * There is something to do here later !, Mar 2000, Jungjun Kim - */ - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-h720x/system.h b/include/asm-arm/arch-h720x/system.h deleted file mode 100644 index ddba937..0000000 --- a/include/asm-arm/arch-h720x/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/system.h - * - * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * linux/include/asm-arm/arch-h720x/system.h - * - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H -#include - -static void arch_idle(void) -{ - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; - nop(); - nop(); - CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; - nop(); - nop(); -} - - -static __inline__ void arch_reset(char mode) -{ - CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; -} - -#endif diff --git a/include/asm-arm/arch-h720x/timex.h b/include/asm-arm/arch-h720x/timex.h deleted file mode 100644 index 48a391c..0000000 --- a/include/asm-arm/arch-h720x/timex.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/timex.h - * Copyright (C) 2000 Jungjun Kim, Hynix Semiconductor Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_TIMEX -#define __ASM_ARCH_TIMEX - -#define CLOCK_TICK_RATE 3686400 - -#endif diff --git a/include/asm-arm/arch-h720x/uncompress.h b/include/asm-arm/arch-h720x/uncompress.h deleted file mode 100644 index 61584cd..0000000 --- a/include/asm-arm/arch-h720x/uncompress.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/uncompress.h - * - * Copyright (C) 2001-2002 Jungjun Kim - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include - -#define LSR 0x14 -#define TEMPTY 0x40 - -static inline void putc(int c) -{ - volatile unsigned char *p = (volatile unsigned char *)(IO_PHYS+0x20000); - - /* wait until transmit buffer is empty */ - while((p[LSR] & TEMPTY) == 0x0) - barrier(); - - /* write next character */ - *p = c; -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() - -#endif diff --git a/include/asm-arm/arch-h720x/vmalloc.h b/include/asm-arm/arch-h720x/vmalloc.h deleted file mode 100644 index b4693cb..0000000 --- a/include/asm-arm/arch-h720x/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-h720x/vmalloc.h - */ - -#ifndef __ARCH_ARM_VMALLOC_H -#define __ARCH_ARM_VMALLOC_H - -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) - -#endif diff --git a/include/asm-arm/arch-imx/debug-macro.S b/include/asm-arm/arch-imx/debug-macro.S deleted file mode 100644 index c611871..0000000 --- a/include/asm-arm/arch-imx/debug-macro.S +++ /dev/null @@ -1,34 +0,0 @@ -/* linux/include/asm-arm/arch-imx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x00000000 @ physical - movne \rx, #0xe0000000 @ virtual - orreq \rx, \rx, #0x00200000 @ physical - orr \rx, \rx, #0x00006000 @ UART1 offset - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x40] @ TXDATA - .endm - - .macro waituart,rd,rx - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #0x98] @ SR2 - tst \rd, #1 << 3 @ TXDC - beq 1002b @ wait until transmit done - .endm diff --git a/include/asm-arm/arch-imx/dma.h b/include/asm-arm/arch-imx/dma.h deleted file mode 100644 index 621ff2c..0000000 --- a/include/asm-arm/arch-imx/dma.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * linux/include/asm-arm/imxads/dma.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -typedef enum { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -} imx_dma_prio; - -#define DMA_REQ_UART3_T 2 -#define DMA_REQ_UART3_R 3 -#define DMA_REQ_SSI2_T 4 -#define DMA_REQ_SSI2_R 5 -#define DMA_REQ_CSI_STAT 6 -#define DMA_REQ_CSI_R 7 -#define DMA_REQ_MSHC 8 -#define DMA_REQ_DSPA_DCT_DOUT 9 -#define DMA_REQ_DSPA_DCT_DIN 10 -#define DMA_REQ_DSPA_MAC 11 -#define DMA_REQ_EXT 12 -#define DMA_REQ_SDHC 13 -#define DMA_REQ_SPI1_R 14 -#define DMA_REQ_SPI1_T 15 -#define DMA_REQ_SSI_T 16 -#define DMA_REQ_SSI_R 17 -#define DMA_REQ_ASP_DAC 18 -#define DMA_REQ_ASP_ADC 19 -#define DMA_REQ_USP_EP(x) (20+(x)) -#define DMA_REQ_SPI2_R 26 -#define DMA_REQ_SPI2_T 27 -#define DMA_REQ_UART2_T 28 -#define DMA_REQ_UART2_R 29 -#define DMA_REQ_UART1_T 30 -#define DMA_REQ_UART1_R 31 - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-imx/entry-macro.S b/include/asm-arm/arch-imx/entry-macro.S deleted file mode 100644 index 5dc0f30..0000000 --- a/include/asm-arm/arch-imx/entry-macro.S +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-imx/entry-macro.S - * - * Low-level IRQ helper macros for iMX-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - -#define AITC_NIVECSR 0x40 - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IO_ADDRESS(IMX_AITC_BASE) - @ Load offset & priority of the highest priority - @ interrupt pending. - ldr \irqstat, [\base, #AITC_NIVECSR] - @ Shift off the priority leaving the offset or - @ "interrupt number", use arithmetic shift to - @ transform illegal source (0xffff) as -1 - mov \irqnr, \irqstat, asr #16 - adds \tmp, \irqnr, #1 - .endm diff --git a/include/asm-arm/arch-imx/gpio.h b/include/asm-arm/arch-imx/gpio.h deleted file mode 100644 index 4860232..0000000 --- a/include/asm-arm/arch-imx/gpio.h +++ /dev/null @@ -1,102 +0,0 @@ -#ifndef _IMX_GPIO_H - -#include - -#define IMX_GPIO_ALLOC_MODE_NORMAL 0 -#define IMX_GPIO_ALLOC_MODE_NO_ALLOC 1 -#define IMX_GPIO_ALLOC_MODE_TRY_ALLOC 2 -#define IMX_GPIO_ALLOC_MODE_ALLOC_ONLY 4 -#define IMX_GPIO_ALLOC_MODE_RELEASE 8 - -extern int imx_gpio_request(unsigned gpio, const char *label); - -extern void imx_gpio_free(unsigned gpio); - -extern int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count, - int alloc_mode, const char *label); - -extern int imx_gpio_direction_input(unsigned gpio); - -extern int imx_gpio_direction_output(unsigned gpio, int value); - -extern void __imx_gpio_set_value(unsigned gpio, int value); - -static inline int imx_gpio_get_value(unsigned gpio) -{ - return SSR(gpio >> GPIO_PORT_SHIFT) & (1 << (gpio & GPIO_PIN_MASK)); -} - -static inline void imx_gpio_set_value_inline(unsigned gpio, int value) -{ - unsigned long flags; - - raw_local_irq_save(flags); - if(value) - DR(gpio >> GPIO_PORT_SHIFT) |= (1 << (gpio & GPIO_PIN_MASK)); - else - DR(gpio >> GPIO_PORT_SHIFT) &= ~(1 << (gpio & GPIO_PIN_MASK)); - raw_local_irq_restore(flags); -} - -static inline void imx_gpio_set_value(unsigned gpio, int value) -{ - if(__builtin_constant_p(gpio)) - imx_gpio_set_value_inline(gpio, value); - else - __imx_gpio_set_value(gpio, value); -} - -extern int imx_gpio_to_irq(unsigned gpio); - -extern int imx_irq_to_gpio(unsigned irq); - -/*-------------------------------------------------------------------------*/ - -/* Wrappers for "new style" GPIO calls. These calls i.MX specific versions - * to allow future extension of GPIO logic. - */ - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return imx_gpio_request(gpio, label); -} - -static inline void gpio_free(unsigned gpio) -{ - imx_gpio_free(gpio); -} - -static inline int gpio_direction_input(unsigned gpio) -{ - return imx_gpio_direction_input(gpio); -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - return imx_gpio_direction_output(gpio, value); -} - -static inline int gpio_get_value(unsigned gpio) -{ - return imx_gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - imx_gpio_set_value(gpio, value); -} - -#include /* cansleep wrappers */ - -static inline int gpio_to_irq(unsigned gpio) -{ - return imx_gpio_to_irq(gpio); -} - -static inline int irq_to_gpio(unsigned irq) -{ - return imx_irq_to_gpio(irq); -} - - -#endif diff --git a/include/asm-arm/arch-imx/hardware.h b/include/asm-arm/arch-imx/hardware.h deleted file mode 100644 index 6542ca5..0000000 --- a/include/asm-arm/arch-imx/hardware.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * linux/include/asm-arm/arch-imx/hardware.h - * - * Copyright (C) 1999 ARM Limited. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include "imx-regs.h" - -#ifndef __ASSEMBLY__ -# define __REG(x) (*((volatile u32 *)IO_ADDRESS(x))) - -# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) -#endif - -/* - * Memory map - */ - -#define IMX_IO_PHYS 0x00200000 -#define IMX_IO_SIZE 0x00100000 -#define IMX_IO_BASE 0xe0000000 - -#define IMX_CS0_PHYS 0x10000000 -#define IMX_CS0_SIZE 0x02000000 -#define IMX_CS0_VIRT 0xe8000000 - -#define IMX_CS1_PHYS 0x12000000 -#define IMX_CS1_SIZE 0x01000000 -#define IMX_CS1_VIRT 0xea000000 - -#define IMX_CS2_PHYS 0x13000000 -#define IMX_CS2_SIZE 0x01000000 -#define IMX_CS2_VIRT 0xeb000000 - -#define IMX_CS3_PHYS 0x14000000 -#define IMX_CS3_SIZE 0x01000000 -#define IMX_CS3_VIRT 0xec000000 - -#define IMX_CS4_PHYS 0x15000000 -#define IMX_CS4_SIZE 0x01000000 -#define IMX_CS4_VIRT 0xed000000 - -#define IMX_CS5_PHYS 0x16000000 -#define IMX_CS5_SIZE 0x01000000 -#define IMX_CS5_VIRT 0xee000000 - -#define IMX_FB_VIRT 0xF1000000 -#define IMX_FB_SIZE (256*1024) - -/* macro to get at IO space when running virtually */ -#define IO_ADDRESS(x) ((x) | IMX_IO_BASE) - -#ifndef __ASSEMBLY__ -/* - * Handy routine to set GPIO functions - */ -extern void imx_gpio_mode( int gpio_mode ); - -#endif - -#define MAXIRQNUM 62 -#define MAXFIQNUM 62 -#define MAXSWINUM 62 - -/* - * Use SDRAM for memory - */ -#define MEM_SIZE 0x01000000 - -#ifdef CONFIG_ARCH_MX1ADS -#include "mx1ads.h" -#endif - -#endif diff --git a/include/asm-arm/arch-imx/imx-dma.h b/include/asm-arm/arch-imx/imx-dma.h deleted file mode 100644 index 44d89c3..0000000 --- a/include/asm-arm/arch-imx/imx-dma.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * linux/include/asm-arm/imxads/dma.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include - -#ifndef __ASM_ARCH_IMX_DMA_H -#define __ASM_ARCH_IMX_DMA_H - -#define IMX_DMA_CHANNELS 11 - -/* - * struct imx_dma_channel - i.MX specific DMA extension - * @name: name specified by DMA client - * @irq_handler: client callback for end of transfer - * @err_handler: client callback for error condition - * @data: clients context data for callbacks - * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE - * @sg: pointer to the actual read/written chunk for scatter-gather emulation - * @sgbc: counter of processed bytes in the actual read/written chunk - * @resbytes: total residual number of bytes to transfer - * (it can be lower or same as sum of SG mapped chunk sizes) - * @sgcount: number of chunks to be read/written - * - * Structure is used for IMX DMA processing. It would be probably good - * @struct dma_struct in the future for external interfacing and use - * @struct imx_dma_channel only as extension to it. - */ - -struct imx_dma_channel { - const char *name; - void (*irq_handler) (int, void *); - void (*err_handler) (int, void *, int errcode); - void *data; - dmamode_t dma_mode; - struct scatterlist *sg; - unsigned int sgbc; - unsigned int sgcount; - unsigned int resbytes; - int dma_num; -}; - -extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; - -#define IMX_DMA_ERR_BURST 1 -#define IMX_DMA_ERR_REQUEST 2 -#define IMX_DMA_ERR_TRANSFER 4 -#define IMX_DMA_ERR_BUFFER 8 - -/* The type to distinguish channel numbers parameter from ordinal int type */ -typedef int imx_dmach_t; - -int -imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, - unsigned int dma_length, unsigned int dev_addr, dmamode_t dmamode); - -int -imx_dma_setup_sg(imx_dmach_t dma_ch, - struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, - unsigned int dev_addr, dmamode_t dmamode); - -int -imx_dma_setup_handlers(imx_dmach_t dma_ch, - void (*irq_handler) (int, void *), - void (*err_handler) (int, void *, int), void *data); - -void imx_dma_enable(imx_dmach_t dma_ch); - -void imx_dma_disable(imx_dmach_t dma_ch); - -int imx_dma_request(imx_dmach_t dma_ch, const char *name); - -void imx_dma_free(imx_dmach_t dma_ch); - -imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio); - - -#endif /* _ASM_ARCH_IMX_DMA_H */ diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h deleted file mode 100644 index fb9de27..0000000 --- a/include/asm-arm/arch-imx/imx-regs.h +++ /dev/null @@ -1,482 +0,0 @@ -#ifndef _IMX_REGS_H -#define _IMX_REGS_H -/* ------------------------------------------------------------------------ - * Motorola IMX system registers - * ------------------------------------------------------------------------ - * - */ - -/* - * Register BASEs, based on OFFSETs - * - */ -#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) -#define IMX_WDT_BASE (0x01000 + IMX_IO_BASE) -#define IMX_TIM1_BASE (0x02000 + IMX_IO_BASE) -#define IMX_TIM2_BASE (0x03000 + IMX_IO_BASE) -#define IMX_RTC_BASE (0x04000 + IMX_IO_BASE) -#define IMX_LCDC_BASE (0x05000 + IMX_IO_BASE) -#define IMX_UART1_BASE (0x06000 + IMX_IO_BASE) -#define IMX_UART2_BASE (0x07000 + IMX_IO_BASE) -#define IMX_PWM_BASE (0x08000 + IMX_IO_BASE) -#define IMX_DMAC_BASE (0x09000 + IMX_IO_BASE) -#define IMX_AIPI2_BASE (0x10000 + IMX_IO_BASE) -#define IMX_SIM_BASE (0x11000 + IMX_IO_BASE) -#define IMX_USBD_BASE (0x12000 + IMX_IO_BASE) -#define IMX_SPI1_BASE (0x13000 + IMX_IO_BASE) -#define IMX_MMC_BASE (0x14000 + IMX_IO_BASE) -#define IMX_ASP_BASE (0x15000 + IMX_IO_BASE) -#define IMX_BTA_BASE (0x16000 + IMX_IO_BASE) -#define IMX_I2C_BASE (0x17000 + IMX_IO_BASE) -#define IMX_SSI_BASE (0x18000 + IMX_IO_BASE) -#define IMX_SPI2_BASE (0x19000 + IMX_IO_BASE) -#define IMX_MSHC_BASE (0x1A000 + IMX_IO_BASE) -#define IMX_PLL_BASE (0x1B000 + IMX_IO_BASE) -#define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) -#define IMX_EIM_BASE (0x20000 + IMX_IO_BASE) -#define IMX_SDRAMC_BASE (0x21000 + IMX_IO_BASE) -#define IMX_MMA_BASE (0x22000 + IMX_IO_BASE) -#define IMX_AITC_BASE (0x23000 + IMX_IO_BASE) -#define IMX_CSI_BASE (0x24000 + IMX_IO_BASE) - -/* PLL registers */ -#define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ -#define CSCR_SPLL_RESTART (1<<22) -#define CSCR_MPLL_RESTART (1<<21) -#define CSCR_SYSTEM_SEL (1<<16) -#define CSCR_BCLK_DIV (0xf<<10) -#define CSCR_MPU_PRESC (1<<15) -#define CSCR_SPEN (1<<1) -#define CSCR_MPEN (1<<0) - -#define MPCTL0 __REG(IMX_PLL_BASE + 0x4) /* MCU PLL Control Register 0 */ -#define MPCTL1 __REG(IMX_PLL_BASE + 0x8) /* MCU PLL and System Clock Register 1 */ -#define SPCTL0 __REG(IMX_PLL_BASE + 0xc) /* System PLL Control Register 0 */ -#define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */ -#define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ - -/* - * GPIO Module and I/O Multiplexer - * x = 0..3 for reg_A, reg_B, reg_C, reg_D - */ -#define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) -#define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) -#define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) -#define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) -#define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) -#define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) -#define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) -#define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) -#define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) -#define SSR(x) __REG2(IMX_GPIO_BASE + 0x24, ((x) & 3) << 8) -#define ICR1(x) __REG2(IMX_GPIO_BASE + 0x28, ((x) & 3) << 8) -#define ICR2(x) __REG2(IMX_GPIO_BASE + 0x2c, ((x) & 3) << 8) -#define IMR(x) __REG2(IMX_GPIO_BASE + 0x30, ((x) & 3) << 8) -#define ISR(x) __REG2(IMX_GPIO_BASE + 0x34, ((x) & 3) << 8) -#define GPR(x) __REG2(IMX_GPIO_BASE + 0x38, ((x) & 3) << 8) -#define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8) -#define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8) - -#define GPIO_PORT_MAX 3 - -#define GPIO_PIN_MASK 0x1f -#define GPIO_PORT_MASK (0x3 << 5) - -#define GPIO_PORT_SHIFT 5 -#define GPIO_PORTA (0<<5) -#define GPIO_PORTB (1<<5) -#define GPIO_PORTC (2<<5) -#define GPIO_PORTD (3<<5) - -#define GPIO_OUT (1<<7) -#define GPIO_IN (0<<7) -#define GPIO_PUEN (1<<8) - -#define GPIO_PF (0<<9) -#define GPIO_AF (1<<9) - -#define GPIO_OCR_SHIFT 10 -#define GPIO_OCR_MASK (3<<10) -#define GPIO_AIN (0<<10) -#define GPIO_BIN (1<<10) -#define GPIO_CIN (2<<10) -#define GPIO_DR (3<<10) - -#define GPIO_AOUT_SHIFT 12 -#define GPIO_AOUT_MASK (3<<12) -#define GPIO_AOUT (0<<12) -#define GPIO_AOUT_ISR (1<<12) -#define GPIO_AOUT_0 (2<<12) -#define GPIO_AOUT_1 (3<<12) - -#define GPIO_BOUT_SHIFT 14 -#define GPIO_BOUT_MASK (3<<14) -#define GPIO_BOUT (0<<14) -#define GPIO_BOUT_ISR (1<<14) -#define GPIO_BOUT_0 (2<<14) -#define GPIO_BOUT_1 (3<<14) - -#define GPIO_GIUS (1<<16) - -/* assignements for GPIO alternate/primary functions */ - -/* FIXME: This list is not completed. The correct directions are - * missing on some (many) pins - */ -#define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 ) -#define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) -#define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 ) -#define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) -#define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) -#define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) -#define PA4_PF_CSI_D0 ( GPIO_PORTA | GPIO_PF | 4 ) -#define PA5_PF_CSI_D1 ( GPIO_PORTA | GPIO_PF | 5 ) -#define PA6_PF_CSI_D2 ( GPIO_PORTA | GPIO_PF | 6 ) -#define PA7_PF_CSI_D3 ( GPIO_PORTA | GPIO_PF | 7 ) -#define PA8_PF_CSI_D4 ( GPIO_PORTA | GPIO_PF | 8 ) -#define PA9_PF_CSI_D5 ( GPIO_PORTA | GPIO_PF | 9 ) -#define PA10_PF_CSI_D6 ( GPIO_PORTA | GPIO_PF | 10 ) -#define PA11_PF_CSI_D7 ( GPIO_PORTA | GPIO_PF | 11 ) -#define PA12_PF_CSI_VSYNC ( GPIO_PORTA | GPIO_PF | 12 ) -#define PA13_PF_CSI_HSYNC ( GPIO_PORTA | GPIO_PF | 13 ) -#define PA14_PF_CSI_PIXCLK ( GPIO_PORTA | GPIO_PF | 14 ) -#define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) -#define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) -#define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) -#define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 ) -#define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) -#define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) -#define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) -#define PA21_PF_A0 ( GPIO_PORTA | GPIO_PF | 21 ) -#define PA22_PF_CS4 ( GPIO_PORTA | GPIO_PF | 22 ) -#define PA23_PF_CS5 ( GPIO_PORTA | GPIO_PF | 23 ) -#define PA24_PF_A16 ( GPIO_PORTA | GPIO_PF | 24 ) -#define PA24_AF_ETMTRACEPKT0 ( GPIO_PORTA | GPIO_AF | 24 ) -#define PA25_PF_A17 ( GPIO_PORTA | GPIO_PF | 25 ) -#define PA25_AF_ETMTRACEPKT1 ( GPIO_PORTA | GPIO_AF | 25 ) -#define PA26_PF_A18 ( GPIO_PORTA | GPIO_PF | 26 ) -#define PA26_AF_ETMTRACEPKT2 ( GPIO_PORTA | GPIO_AF | 26 ) -#define PA27_PF_A19 ( GPIO_PORTA | GPIO_PF | 27 ) -#define PA27_AF_ETMTRACEPKT3 ( GPIO_PORTA | GPIO_AF | 27 ) -#define PA28_PF_A20 ( GPIO_PORTA | GPIO_PF | 28 ) -#define PA28_AF_ETMPIPESTAT0 ( GPIO_PORTA | GPIO_AF | 28 ) -#define PA29_PF_A21 ( GPIO_PORTA | GPIO_PF | 29 ) -#define PA29_AF_ETMPIPESTAT1 ( GPIO_PORTA | GPIO_AF | 29 ) -#define PA30_PF_A22 ( GPIO_PORTA | GPIO_PF | 30 ) -#define PA30_AF_ETMPIPESTAT2 ( GPIO_PORTA | GPIO_AF | 30 ) -#define PA31_PF_A23 ( GPIO_PORTA | GPIO_PF | 31 ) -#define PA31_AF_ETMTRACECLK ( GPIO_PORTA | GPIO_AF | 31 ) -#define PB8_PF_SD_DAT0 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8 ) -#define PB8_AF_MS_PIO ( GPIO_PORTB | GPIO_AF | 8 ) -#define PB9_PF_SD_DAT1 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9 ) -#define PB9_AF_MS_PI1 ( GPIO_PORTB | GPIO_AF | 9 ) -#define PB10_PF_SD_DAT2 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10 ) -#define PB10_AF_MS_SCLKI ( GPIO_PORTB | GPIO_AF | 10 ) -#define PB11_PF_SD_DAT3 ( GPIO_PORTB | GPIO_PF | 11 ) -#define PB11_AF_MS_SDIO ( GPIO_PORTB | GPIO_AF | 11 ) -#define PB12_PF_SD_CLK ( GPIO_PORTB | GPIO_PF | 12 ) -#define PB12_AF_MS_SCLK0 ( GPIO_PORTB | GPIO_AF | 12 ) -#define PB13_PF_SD_CMD ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13 ) -#define PB13_AF_MS_BS ( GPIO_PORTB | GPIO_AF | 13 ) -#define PB14_AF_SSI_RXFS ( GPIO_PORTB | GPIO_AF | 14 ) -#define PB15_AF_SSI_RXCLK ( GPIO_PORTB | GPIO_AF | 15 ) -#define PB16_AF_SSI_RXDAT ( GPIO_PORTB | GPIO_IN | GPIO_AF | 16 ) -#define PB17_AF_SSI_TXDAT ( GPIO_PORTB | GPIO_OUT | GPIO_AF | 17 ) -#define PB18_AF_SSI_TXFS ( GPIO_PORTB | GPIO_AF | 18 ) -#define PB19_AF_SSI_TXCLK ( GPIO_PORTB | GPIO_AF | 19 ) -#define PB20_PF_USBD_AFE ( GPIO_PORTB | GPIO_PF | 20 ) -#define PB21_PF_USBD_OE ( GPIO_PORTB | GPIO_PF | 21 ) -#define PB22_PFUSBD_RCV ( GPIO_PORTB | GPIO_PF | 22 ) -#define PB23_PF_USBD_SUSPND ( GPIO_PORTB | GPIO_PF | 23 ) -#define PB24_PF_USBD_VP ( GPIO_PORTB | GPIO_PF | 24 ) -#define PB25_PF_USBD_VM ( GPIO_PORTB | GPIO_PF | 25 ) -#define PB26_PF_USBD_VPO ( GPIO_PORTB | GPIO_PF | 26 ) -#define PB27_PF_USBD_VMO ( GPIO_PORTB | GPIO_PF | 27 ) -#define PB28_PF_UART2_CTS ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 28 ) -#define PB29_PF_UART2_RTS ( GPIO_PORTB | GPIO_IN | GPIO_PF | 29 ) -#define PB30_PF_UART2_TXD ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 30 ) -#define PB31_PF_UART2_RXD ( GPIO_PORTB | GPIO_IN | GPIO_PF | 31 ) -#define PC3_PF_SSI_RXFS ( GPIO_PORTC | GPIO_PF | 3 ) -#define PC4_PF_SSI_RXCLK ( GPIO_PORTC | GPIO_PF | 4 ) -#define PC5_PF_SSI_RXDAT ( GPIO_PORTC | GPIO_IN | GPIO_PF | 5 ) -#define PC6_PF_SSI_TXDAT ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 6 ) -#define PC7_PF_SSI_TXFS ( GPIO_PORTC | GPIO_PF | 7 ) -#define PC8_PF_SSI_TXCLK ( GPIO_PORTC | GPIO_PF | 8 ) -#define PC9_PF_UART1_CTS ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 9 ) -#define PC10_PF_UART1_RTS ( GPIO_PORTC | GPIO_IN | GPIO_PF | 10 ) -#define PC11_PF_UART1_TXD ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 11 ) -#define PC12_PF_UART1_RXD ( GPIO_PORTC | GPIO_IN | GPIO_PF | 12 ) -#define PC13_PF_SPI1_SPI_RDY ( GPIO_PORTC | GPIO_PF | 13 ) -#define PC14_PF_SPI1_SCLK ( GPIO_PORTC | GPIO_PF | 14 ) -#define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) -#define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) -#define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) -#define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 ) -#define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 ) -#define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 ) -#define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 ) -#define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 ) -#define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 ) -#define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 ) -#define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) -#define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) -#define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) -#define PD7_AF_UART2_DTR ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) -#define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 ) -#define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) -#define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) -#define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 ) -#define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) -#define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) -#define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 ) -#define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) -#define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) -#define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 ) -#define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) -#define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) -#define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) -#define PD14_PF_FLM_VSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 14 ) -#define PD15_PF_LD0 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 15 ) -#define PD16_PF_LD1 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 16 ) -#define PD17_PF_LD2 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 17 ) -#define PD18_PF_LD3 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 18 ) -#define PD19_PF_LD4 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 19 ) -#define PD20_PF_LD5 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 20 ) -#define PD21_PF_LD6 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 21 ) -#define PD22_PF_LD7 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 22 ) -#define PD23_PF_LD8 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 23 ) -#define PD24_PF_LD9 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 24 ) -#define PD25_PF_LD10 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 25 ) -#define PD26_PF_LD11 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 26 ) -#define PD27_PF_LD12 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 27 ) -#define PD28_PF_LD13 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 28 ) -#define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) -#define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) -#define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) -#define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 ) - -/* - * PWM controller - */ -#define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */ -#define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */ -#define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */ -#define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */ - -#define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */ -#define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */ -#define PWMC_SWR (0x01<<16) /* Software Reset */ -#define PWMC_CLKSRC (0x01<<15) /* Clock Source */ -#define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */ -#define PWMC_IRQ (0x01<< 7) /* Interrupt Request */ -#define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */ -#define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */ -#define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */ -#define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ -#define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */ - -#define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ -#define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ -#define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ - -/* - * DMA Controller - */ -#define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ -#define DISR __REG(IMX_DMAC_BASE +0x04) /* DMA Interrupt status Register */ -#define DIMR __REG(IMX_DMAC_BASE +0x08) /* DMA Interrupt mask Register */ -#define DBTOSR __REG(IMX_DMAC_BASE +0x0c) /* DMA Burst timeout status Register */ -#define DRTOSR __REG(IMX_DMAC_BASE +0x10) /* DMA Request timeout Register */ -#define DSESR __REG(IMX_DMAC_BASE +0x14) /* DMA Transfer Error Status Register */ -#define DBOSR __REG(IMX_DMAC_BASE +0x18) /* DMA Buffer overflow status Register */ -#define DBTOCR __REG(IMX_DMAC_BASE +0x1c) /* DMA Burst timeout control Register */ -#define WSRA __REG(IMX_DMAC_BASE +0x40) /* W-Size Register A */ -#define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */ -#define YSRA __REG(IMX_DMAC_BASE +0x48) /* Y-Size Register A */ -#define WSRB __REG(IMX_DMAC_BASE +0x4c) /* W-Size Register B */ -#define XSRB __REG(IMX_DMAC_BASE +0x50) /* X-Size Register B */ -#define YSRB __REG(IMX_DMAC_BASE +0x54) /* Y-Size Register B */ -#define SAR(x) __REG2( IMX_DMAC_BASE + 0x80, (x) << 6) /* Source Address Registers */ -#define DAR(x) __REG2( IMX_DMAC_BASE + 0x84, (x) << 6) /* Destination Address Registers */ -#define CNTR(x) __REG2( IMX_DMAC_BASE + 0x88, (x) << 6) /* Count Registers */ -#define CCR(x) __REG2( IMX_DMAC_BASE + 0x8c, (x) << 6) /* Control Registers */ -#define RSSR(x) __REG2( IMX_DMAC_BASE + 0x90, (x) << 6) /* Request source select Registers */ -#define BLR(x) __REG2( IMX_DMAC_BASE + 0x94, (x) << 6) /* Burst length Registers */ -#define RTOR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Request timeout Registers */ -#define BUCR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Bus Utilization Registers */ - -#define DCR_DRST (1<<1) -#define DCR_DEN (1<<0) -#define DBTOCR_EN (1<<15) -#define DBTOCR_CNT(x) ((x) & 0x7fff ) -#define CNTR_CNT(x) ((x) & 0xffffff ) -#define CCR_DMOD_LINEAR ( 0x0 << 12 ) -#define CCR_DMOD_2D ( 0x1 << 12 ) -#define CCR_DMOD_FIFO ( 0x2 << 12 ) -#define CCR_DMOD_EOBFIFO ( 0x3 << 12 ) -#define CCR_SMOD_LINEAR ( 0x0 << 10 ) -#define CCR_SMOD_2D ( 0x1 << 10 ) -#define CCR_SMOD_FIFO ( 0x2 << 10 ) -#define CCR_SMOD_EOBFIFO ( 0x3 << 10 ) -#define CCR_MDIR_DEC (1<<9) -#define CCR_MSEL_B (1<<8) -#define CCR_DSIZ_32 ( 0x0 << 6 ) -#define CCR_DSIZ_8 ( 0x1 << 6 ) -#define CCR_DSIZ_16 ( 0x2 << 6 ) -#define CCR_SSIZ_32 ( 0x0 << 4 ) -#define CCR_SSIZ_8 ( 0x1 << 4 ) -#define CCR_SSIZ_16 ( 0x2 << 4 ) -#define CCR_REN (1<<3) -#define CCR_RPT (1<<2) -#define CCR_FRC (1<<1) -#define CCR_CEN (1<<0) -#define RTOR_EN (1<<15) -#define RTOR_CLK (1<<14) -#define RTOR_PSC (1<<13) - -/* - * Interrupt controller - */ - -#define IMX_INTCNTL __REG(IMX_AITC_BASE+0x00) -#define INTCNTL_FIAD (1<<19) -#define INTCNTL_NIAD (1<<20) - -#define IMX_NIMASK __REG(IMX_AITC_BASE+0x04) -#define IMX_INTENNUM __REG(IMX_AITC_BASE+0x08) -#define IMX_INTDISNUM __REG(IMX_AITC_BASE+0x0c) -#define IMX_INTENABLEH __REG(IMX_AITC_BASE+0x10) -#define IMX_INTENABLEL __REG(IMX_AITC_BASE+0x14) - -/* - * General purpose timers - */ -#define IMX_TCTL(x) __REG( 0x00 + (x)) -#define TCTL_SWR (1<<15) -#define TCTL_FRR (1<<8) -#define TCTL_CAP_RIS (1<<6) -#define TCTL_CAP_FAL (2<<6) -#define TCTL_CAP_RIS_FAL (3<<6) -#define TCTL_OM (1<<5) -#define TCTL_IRQEN (1<<4) -#define TCTL_CLK_PCLK1 (1<<1) -#define TCTL_CLK_PCLK1_16 (2<<1) -#define TCTL_CLK_TIN (3<<1) -#define TCTL_CLK_32 (4<<1) -#define TCTL_TEN (1<<0) - -#define IMX_TPRER(x) __REG( 0x04 + (x)) -#define IMX_TCMP(x) __REG( 0x08 + (x)) -#define IMX_TCR(x) __REG( 0x0C + (x)) -#define IMX_TCN(x) __REG( 0x10 + (x)) -#define IMX_TSTAT(x) __REG( 0x14 + (x)) -#define TSTAT_CAPT (1<<1) -#define TSTAT_COMP (1<<0) - -/* - * LCD Controller - */ - -#define LCDC_SSA __REG(IMX_LCDC_BASE+0x00) - -#define LCDC_SIZE __REG(IMX_LCDC_BASE+0x04) -#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20) -#define SIZE_YMAX(y) ( (y) & 0x1ff ) - -#define LCDC_VPW __REG(IMX_LCDC_BASE+0x08) -#define VPW_VPW(x) ( (x) & 0x3ff ) - -#define LCDC_CPOS __REG(IMX_LCDC_BASE+0x0C) -#define CPOS_CC1 (1<<31) -#define CPOS_CC0 (1<<30) -#define CPOS_OP (1<<28) -#define CPOS_CXP(x) (((x) & 3ff) << 16) -#define CPOS_CYP(y) ((y) & 0x1ff) - -#define LCDC_LCWHB __REG(IMX_LCDC_BASE+0x10) -#define LCWHB_BK_EN (1<<31) -#define LCWHB_CW(w) (((w) & 0x1f) << 24) -#define LCWHB_CH(h) (((h) & 0x1f) << 16) -#define LCWHB_BD(x) ((x) & 0xff) - -#define LCDC_LCHCC __REG(IMX_LCDC_BASE+0x14) -#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11) -#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5) -#define LCHCC_CUR_COL_B(b) ((b) & 0x1f) - -#define LCDC_PCR __REG(IMX_LCDC_BASE+0x18) -#define PCR_TFT (1<<31) -#define PCR_COLOR (1<<30) -#define PCR_PBSIZ_1 (0<<28) -#define PCR_PBSIZ_2 (1<<28) -#define PCR_PBSIZ_4 (2<<28) -#define PCR_PBSIZ_8 (3<<28) -#define PCR_BPIX_1 (0<<25) -#define PCR_BPIX_2 (1<<25) -#define PCR_BPIX_4 (2<<25) -#define PCR_BPIX_8 (3<<25) -#define PCR_BPIX_12 (4<<25) -#define PCR_BPIX_16 (4<<25) -#define PCR_PIXPOL (1<<24) -#define PCR_FLMPOL (1<<23) -#define PCR_LPPOL (1<<22) -#define PCR_CLKPOL (1<<21) -#define PCR_OEPOL (1<<20) -#define PCR_SCLKIDLE (1<<19) -#define PCR_END_SEL (1<<18) -#define PCR_END_BYTE_SWAP (1<<17) -#define PCR_REV_VS (1<<16) -#define PCR_ACD_SEL (1<<15) -#define PCR_ACD(x) (((x) & 0x7f) << 8) -#define PCR_SCLK_SEL (1<<7) -#define PCR_SHARP (1<<6) -#define PCR_PCD(x) ((x) & 0x3f) - -#define LCDC_HCR __REG(IMX_LCDC_BASE+0x1C) -#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26) -#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8) -#define HCR_H_WAIT_2(x) ((x) & 0xff) - -#define LCDC_VCR __REG(IMX_LCDC_BASE+0x20) -#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26) -#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8) -#define VCR_V_WAIT_2(x) ((x) & 0xff) - -#define LCDC_POS __REG(IMX_LCDC_BASE+0x24) -#define POS_POS(x) ((x) & 1f) - -#define LCDC_LSCR1 __REG(IMX_LCDC_BASE+0x28) -#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) -#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) -#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) -#define LSCR1_GRAY2(x) (((x) & 0xf) << 4) -#define LSCR1_GRAY1(x) (((x) & 0xf)) - -#define LCDC_PWMR __REG(IMX_LCDC_BASE+0x2C) -#define PWMR_CLS(x) (((x) & 0x1ff) << 16) -#define PWMR_LDMSK (1<<15) -#define PWMR_SCR1 (1<<10) -#define PWMR_SCR0 (1<<9) -#define PWMR_CC_EN (1<<8) -#define PWMR_PW(x) ((x) & 0xff) - -#define LCDC_DMACR __REG(IMX_LCDC_BASE+0x30) -#define DMACR_BURST (1<<31) -#define DMACR_HM(x) (((x) & 0xf) << 16) -#define DMACR_TM(x) ((x) &0xf) - -#define LCDC_RMCR __REG(IMX_LCDC_BASE+0x34) -#define RMCR_LCDC_EN (1<<1) -#define RMCR_SELF_REF (1<<0) - -#define LCDC_LCDICR __REG(IMX_LCDC_BASE+0x38) -#define LCDICR_INT_SYN (1<<2) -#define LCDICR_INT_CON (1) - -#define LCDC_LCDISR __REG(IMX_LCDC_BASE+0x40) -#define LCDISR_UDR_ERR (1<<3) -#define LCDISR_ERR_RES (1<<2) -#define LCDISR_EOF (1<<1) -#define LCDISR_BOF (1<<0) - -#endif // _IMX_REGS_H diff --git a/include/asm-arm/arch-imx/imx-uart.h b/include/asm-arm/arch-imx/imx-uart.h deleted file mode 100644 index d54eb1d..0000000 --- a/include/asm-arm/arch-imx/imx-uart.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef ASMARM_ARCH_UART_H -#define ASMARM_ARCH_UART_H - -#define IMXUART_HAVE_RTSCTS (1<<0) - -struct imxuart_platform_data { - int (*init)(struct platform_device *pdev); - void (*exit)(struct platform_device *pdev); - unsigned int flags; -}; - -#endif diff --git a/include/asm-arm/arch-imx/imxfb.h b/include/asm-arm/arch-imx/imxfb.h deleted file mode 100644 index 3ed9ec8..0000000 --- a/include/asm-arm/arch-imx/imxfb.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This structure describes the machine which we are running on. - */ -struct imxfb_mach_info { - u_long pixclock; - - u_short xres; - u_short yres; - - u_int nonstd; - u_char bpp; - u_char hsync_len; - u_char left_margin; - u_char right_margin; - - u_char vsync_len; - u_char upper_margin; - u_char lower_margin; - u_char sync; - - u_int cmap_greyscale:1, - cmap_inverse:1, - cmap_static:1, - unused:29; - - u_int pcr; - u_int pwmr; - u_int lscr1; - u_int dmacr; - - u_char * fixed_screen_cpu; - dma_addr_t fixed_screen_dma; - - void (*lcd_power)(int); - void (*backlight_power)(int); -}; -void set_imx_fb_info(struct imxfb_mach_info *hard_imx_fb_info); diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h deleted file mode 100644 index 1a1d9bb..0000000 --- a/include/asm-arm/arch-imx/io.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * linux/include/asm-arm/arch-imxads/io.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-imx/irqs.h b/include/asm-arm/arch-imx/irqs.h deleted file mode 100644 index 238197c..0000000 --- a/include/asm-arm/arch-imx/irqs.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/include/asm-arm/arch-imxads/irqs.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ARM_IRQS_H__ -#define __ARM_IRQS_H__ - -/* Use the imx definitions */ -#include - -/* - * IMX Interrupt numbers - * - */ -#define INT_SOFTINT 0 -#define CSI_INT 6 -#define DSPA_MAC_INT 7 -#define DSPA_INT 8 -#define COMP_INT 9 -#define MSHC_XINT 10 -#define GPIO_INT_PORTA 11 -#define GPIO_INT_PORTB 12 -#define GPIO_INT_PORTC 13 -#define LCDC_INT 14 -#define SIM_INT 15 -#define SIM_DATA_INT 16 -#define RTC_INT 17 -#define RTC_SAMINT 18 -#define UART2_MINT_PFERR 19 -#define UART2_MINT_RTS 20 -#define UART2_MINT_DTR 21 -#define UART2_MINT_UARTC 22 -#define UART2_MINT_TX 23 -#define UART2_MINT_RX 24 -#define UART1_MINT_PFERR 25 -#define UART1_MINT_RTS 26 -#define UART1_MINT_DTR 27 -#define UART1_MINT_UARTC 28 -#define UART1_MINT_TX 29 -#define UART1_MINT_RX 30 -#define VOICE_DAC_INT 31 -#define VOICE_ADC_INT 32 -#define PEN_DATA_INT 33 -#define PWM_INT 34 -#define SDHC_INT 35 -#define I2C_INT 39 -#define CSPI_INT 41 -#define SSI_TX_INT 42 -#define SSI_TX_ERR_INT 43 -#define SSI_RX_INT 44 -#define SSI_RX_ERR_INT 45 -#define TOUCH_INT 46 -#define USBD_INT0 47 -#define USBD_INT1 48 -#define USBD_INT2 49 -#define USBD_INT3 50 -#define USBD_INT4 51 -#define USBD_INT5 52 -#define USBD_INT6 53 -#define BTSYS_INT 55 -#define BTTIM_INT 56 -#define BTWUI_INT 57 -#define TIM2_INT 58 -#define TIM1_INT 59 -#define DMA_ERR 60 -#define DMA_INT 61 -#define GPIO_INT_PORTD 62 - -#define IMX_IRQS (64) - -/* note: the IMX has four gpio ports (A-D), but only - * the following pins are connected to the outside - * world: - * - * PORT A: bits 0-31 - * PORT B: bits 8-31 - * PORT C: bits 3-17 - * PORT D: bits 6-31 - * - * We map these interrupts straight on. As a result we have - * several holes in the interrupt mapping. We do this for two - * reasons: - * - mapping the interrupts without holes would get - * far more complicated - * - Motorola could well decide to bring some processor - * with more pins connected - */ - -#define IRQ_GPIOA(x) (IMX_IRQS + x) -#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) -#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) -#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) - -/* decode irq number to use with IMR(x), ISR(x) and friends */ -#define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) - -#define NR_IRQS (IRQ_GPIOD(32) + 1) -#define IRQ_GPIO(x) -#endif diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h deleted file mode 100644 index 5ad9012..0000000 --- a/include/asm-arm/arch-imx/memory.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/arch-imx/memory.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2002 Shane Nay (shane@minirl.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MMU_H -#define __ASM_ARCH_MMU_H - -#define PHYS_OFFSET UL(0x08000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) (x - PAGE_OFFSET + PHYS_OFFSET) -#define __bus_to_virt(x) (x - PHYS_OFFSET + PAGE_OFFSET) - -#endif diff --git a/include/asm-arm/arch-imx/mmc.h b/include/asm-arm/arch-imx/mmc.h deleted file mode 100644 index 4712f35..0000000 --- a/include/asm-arm/arch-imx/mmc.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef ASMARM_ARCH_MMC_H -#define ASMARM_ARCH_MMC_H - -#include - -struct device; - -struct imxmmc_platform_data { - int (*card_present)(struct device *); - int (*get_ro)(struct device *); -}; - -extern void imx_set_mmc_info(struct imxmmc_platform_data *info); - -#endif diff --git a/include/asm-arm/arch-imx/mx1ads.h b/include/asm-arm/arch-imx/mx1ads.h deleted file mode 100644 index d90fa4b..0000000 --- a/include/asm-arm/arch-imx/mx1ads.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/arch-imx/mx1ads.h - * - * Copyright (C) 2004 Robert Schwebel, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_MX1ADS_H -#define __ASM_ARCH_MX1ADS_H - -/* ------------------------------------------------------------------------ */ -/* Memory Map for the M9328MX1ADS (MX1ADS) Board */ -/* ------------------------------------------------------------------------ */ - -#define MX1ADS_FLASH_PHYS 0x10000000 -#define MX1ADS_FLASH_SIZE (16*1024*1024) - -#define IMX_FB_PHYS (0x0C000000 - 0x40000) - -#define CLK32 32000 - -#endif /* __ASM_ARCH_MX1ADS_H */ diff --git a/include/asm-arm/arch-imx/spi_imx.h b/include/asm-arm/arch-imx/spi_imx.h deleted file mode 100644 index 2165449..0000000 --- a/include/asm-arm/arch-imx/spi_imx.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * include/asm-arm/arch-imx/spi_imx.h - * - * Copyright (C) 2006 SWAPP - * Andrea Paterniani - * - * Initial version inspired by: - * linux-2.6.17-rc3-mm1/include/asm-arm/arch-pxa/pxa2xx_spi.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef SPI_IMX_H_ -#define SPI_IMX_H_ - - -/*-------------------------------------------------------------------------*/ -/** - * struct spi_imx_master - device.platform_data for SPI controller devices. - * @num_chipselect: chipselects are used to distinguish individual - * SPI slaves, and are numbered from zero to num_chipselects - 1. - * each slave has a chipselect signal, but it's common that not - * every chipselect is connected to a slave. - * @enable_dma: if true enables DMA driven transfers. -*/ -struct spi_imx_master { - u8 num_chipselect; - u8 enable_dma:1; -}; -/*-------------------------------------------------------------------------*/ - - -/*-------------------------------------------------------------------------*/ -/** - * struct spi_imx_chip - spi_board_info.controller_data for SPI - * slave devices, copied to spi_device.controller_data. - * @enable_loopback : used for test purpouse to internally connect RX and TX - * sections. - * @enable_dma : enables dma transfer (provided that controller driver has - * dma enabled too). - * @ins_ss_pulse : enable /SS pulse insertion between SPI burst. - * @bclk_wait : number of bclk waits between each bits_per_word SPI burst. - * @cs_control : function pointer to board-specific function to assert/deassert - * I/O port to control HW generation of devices chip-select. -*/ -struct spi_imx_chip { - u8 enable_loopback:1; - u8 enable_dma:1; - u8 ins_ss_pulse:1; - u16 bclk_wait:15; - void (*cs_control)(u32 control); -}; - -/* Chip-select state */ -#define SPI_CS_ASSERT (1 << 0) -#define SPI_CS_DEASSERT (1 << 1) -/*-------------------------------------------------------------------------*/ - - -#endif /* SPI_IMX_H_*/ diff --git a/include/asm-arm/arch-imx/system.h b/include/asm-arm/arch-imx/system.h deleted file mode 100644 index c645fe9..0000000 --- a/include/asm-arm/arch-imx/system.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-imxads/system.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -static void -arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -static inline void -arch_reset(char mode) -{ - cpu_reset(0); -} - -#endif diff --git a/include/asm-arm/arch-imx/timex.h b/include/asm-arm/arch-imx/timex.h deleted file mode 100644 index e22ba78..0000000 --- a/include/asm-arm/arch-imx/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/imx/timex.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -#define CLOCK_TICK_RATE (16000000) - -#endif diff --git a/include/asm-arm/arch-imx/uncompress.h b/include/asm-arm/arch-imx/uncompress.h deleted file mode 100644 index da333f6..0000000 --- a/include/asm-arm/arch-imx/uncompress.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * linux/include/asm-arm/arch-imxads/uncompress.h - * - * - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) Shane Nay (shane@minirl.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) - -#define UART1_BASE 0x206000 -#define UART2_BASE 0x207000 -#define USR2 0x98 -#define USR2_TXFE (1<<14) -#define TXR 0x40 -#define UCR1 0x80 -#define UCR1_UARTEN 1 - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline - */ -static void putc(int c) -{ - unsigned long serial_port; - - do { - serial_port = UART1_BASE; - if ( UART(UCR1) & UCR1_UARTEN ) - break; - serial_port = UART2_BASE; - if ( UART(UCR1) & UCR1_UARTEN ) - break; - return; - } while(0); - - while (!(UART(USR2) & USR2_TXFE)) - barrier(); - - UART(TXR) = c; -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() - -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-imx/vmalloc.h b/include/asm-arm/arch-imx/vmalloc.h deleted file mode 100644 index cb61691..0000000 --- a/include/asm-arm/arch-imx/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-imx/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-integrator/bits.h b/include/asm-arm/arch-integrator/bits.h deleted file mode 100644 index 09b024e..0000000 --- a/include/asm-arm/arch-integrator/bits.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Bit field definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __bits_h -#define __bits_h 1 - -#define BIT0 0x00000001 -#define BIT1 0x00000002 -#define BIT2 0x00000004 -#define BIT3 0x00000008 -#define BIT4 0x00000010 -#define BIT5 0x00000020 -#define BIT6 0x00000040 -#define BIT7 0x00000080 -#define BIT8 0x00000100 -#define BIT9 0x00000200 -#define BIT10 0x00000400 -#define BIT11 0x00000800 -#define BIT12 0x00001000 -#define BIT13 0x00002000 -#define BIT14 0x00004000 -#define BIT15 0x00008000 -#define BIT16 0x00010000 -#define BIT17 0x00020000 -#define BIT18 0x00040000 -#define BIT19 0x00080000 -#define BIT20 0x00100000 -#define BIT21 0x00200000 -#define BIT22 0x00400000 -#define BIT23 0x00800000 -#define BIT24 0x01000000 -#define BIT25 0x02000000 -#define BIT26 0x04000000 -#define BIT27 0x08000000 -#define BIT28 0x10000000 -#define BIT29 0x20000000 -#define BIT30 0x40000000 -#define BIT31 0x80000000 - -#endif - -/* END */ diff --git a/include/asm-arm/arch-integrator/cm.h b/include/asm-arm/arch-integrator/cm.h deleted file mode 100644 index 1ab353e..0000000 --- a/include/asm-arm/arch-integrator/cm.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * update the core module control register. - */ -void cm_control(u32, u32); - -#define CM_CTRL_LED (1 << 0) -#define CM_CTRL_nMBDET (1 << 1) -#define CM_CTRL_REMAP (1 << 2) -#define CM_CTRL_RESET (1 << 3) - -/* - * Integrator/AP,PP2 specific - */ -#define CM_CTRL_HIGHVECTORS (1 << 4) -#define CM_CTRL_BIGENDIAN (1 << 5) -#define CM_CTRL_FASTBUS (1 << 6) -#define CM_CTRL_SYNC (1 << 7) - -/* - * ARM926/946/966 Integrator/CP specific - */ -#define CM_CTRL_LCDBIASEN (1 << 8) -#define CM_CTRL_LCDBIASUP (1 << 9) -#define CM_CTRL_LCDBIASDN (1 << 10) -#define CM_CTRL_LCDMUXSEL_MASK (7 << 11) -#define CM_CTRL_LCDMUXSEL_GENLCD (1 << 11) -#define CM_CTRL_LCDMUXSEL_VGA_16BPP (2 << 11) -#define CM_CTRL_LCDMUXSEL_SHARPLCD (3 << 11) -#define CM_CTRL_LCDMUXSEL_VGA_8421BPP (4 << 11) -#define CM_CTRL_LCDEN0 (1 << 14) -#define CM_CTRL_LCDEN1 (1 << 15) -#define CM_CTRL_STATIC1 (1 << 16) -#define CM_CTRL_STATIC2 (1 << 17) -#define CM_CTRL_STATIC (1 << 18) -#define CM_CTRL_n24BITEN (1 << 19) -#define CM_CTRL_EBIWP (1 << 20) diff --git a/include/asm-arm/arch-integrator/debug-macro.S b/include/asm-arm/arch-integrator/debug-macro.S deleted file mode 100644 index 85b327c..0000000 --- a/include/asm-arm/arch-integrator/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/include/asm-arm/arch-integrator/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x16000000 @ physical base address - movne \rx, #0xf0000000 @ virtual base - addne \rx, \rx, #0x16000000 >> 4 - .endm - -#include diff --git a/include/asm-arm/arch-integrator/dma.h b/include/asm-arm/arch-integrator/dma.h deleted file mode 100644 index 83fd6bb..0000000 --- a/include/asm-arm/arch-integrator/dma.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/dma.h - * - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-integrator/entry-macro.S b/include/asm-arm/arch-integrator/entry-macro.S deleted file mode 100644 index ef535a6..0000000 --- a/include/asm-arm/arch-integrator/entry-macro.S +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-arm/arch-integrator/entry-macro.S - * - * Low-level IRQ helper macros for Integrator platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp -/* FIXME: should not be using soo many LDRs here */ - ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) - mov \irqnr, #IRQ_PIC_START - ldr \irqstat, [\base, #IRQ_STATUS] @ get masked status - ldr \base, =IO_ADDRESS(INTEGRATOR_HDR_BASE) - teq \irqstat, #0 - ldreq \irqstat, [\base, #(INTEGRATOR_HDR_IC_OFFSET+IRQ_STATUS)] - moveq \irqnr, #IRQ_CIC_START - -1001: tst \irqstat, #15 - bne 1002f - add \irqnr, \irqnr, #4 - movs \irqstat, \irqstat, lsr #4 - bne 1001b -1002: tst \irqstat, #1 - bne 1003f - add \irqnr, \irqnr, #1 - movs \irqstat, \irqstat, lsr #1 - bne 1002b -1003: /* EQ will be set if no irqs pending */ - .endm - diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h deleted file mode 100644 index 6f0947b..0000000 --- a/include/asm-arm/arch-integrator/hardware.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/hardware.h - * - * This file contains the hardware definitions of the Integrator. - * - * Copyright (C) 1999 ARM Limited. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -/* - * Where in virtual memory the IO devices (timers, system controllers - * and so on) - */ -#define IO_BASE 0xF0000000 // VA of IO -#define IO_SIZE 0x0B000000 // How much? -#define IO_START INTEGRATOR_HDR_BASE // PA of IO - -#define PCIO_BASE PCI_IO_VADDR -#define PCIMEM_BASE PCI_MEMORY_VADDR - -/* macro to get at IO space when running virtually */ -#define IO_ADDRESS(x) (((x) >> 4) + IO_BASE) - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x6000 -#define PCIBIOS_MIN_MEM 0x00100000 - -#endif - diff --git a/include/asm-arm/arch-integrator/impd1.h b/include/asm-arm/arch-integrator/impd1.h deleted file mode 100644 index d75de4b..0000000 --- a/include/asm-arm/arch-integrator/impd1.h +++ /dev/null @@ -1,18 +0,0 @@ -#define IMPD1_OSC1 0x00 -#define IMPD1_OSC2 0x04 -#define IMPD1_LOCK 0x08 -#define IMPD1_LEDS 0x0c -#define IMPD1_INT 0x10 -#define IMPD1_SW 0x14 -#define IMPD1_CTRL 0x18 - -#define IMPD1_CTRL_DISP_LCD (0 << 0) -#define IMPD1_CTRL_DISP_VGA (1 << 0) -#define IMPD1_CTRL_DISP_LCD1 (2 << 0) -#define IMPD1_CTRL_DISP_ENABLE (1 << 2) -#define IMPD1_CTRL_DISP_MASK (7 << 0) - -struct device; - -void impd1_tweak_control(struct device *dev, u32 mask, u32 val); - diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h deleted file mode 100644 index c8f2175..0000000 --- a/include/asm-arm/arch-integrator/io.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/io.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffff - -/* - * WARNING: this has to mirror definitions in platform.h - */ -#define PCI_MEMORY_VADDR 0xe8000000 -#define PCI_CONFIG_VADDR 0xec000000 -#define PCI_V3_VADDR 0xed000000 -#define PCI_IO_VADDR 0xee000000 - -#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-integrator/irqs.h b/include/asm-arm/arch-integrator/irqs.h deleted file mode 100644 index ba7b3af..0000000 --- a/include/asm-arm/arch-integrator/irqs.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/irqs.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * Interrupt numbers - */ -#define IRQ_PIC_START 0 -#define IRQ_SOFTINT 0 -#define IRQ_UARTINT0 1 -#define IRQ_UARTINT1 2 -#define IRQ_KMIINT0 3 -#define IRQ_KMIINT1 4 -#define IRQ_TIMERINT0 5 -#define IRQ_TIMERINT1 6 -#define IRQ_TIMERINT2 7 -#define IRQ_RTCINT 8 -#define IRQ_AP_EXPINT0 9 -#define IRQ_AP_EXPINT1 10 -#define IRQ_AP_EXPINT2 11 -#define IRQ_AP_EXPINT3 12 -#define IRQ_AP_PCIINT0 13 -#define IRQ_AP_PCIINT1 14 -#define IRQ_AP_PCIINT2 15 -#define IRQ_AP_PCIINT3 16 -#define IRQ_AP_V3INT 17 -#define IRQ_AP_CPINT0 18 -#define IRQ_AP_CPINT1 19 -#define IRQ_AP_LBUSTIMEOUT 20 -#define IRQ_AP_APCINT 21 -#define IRQ_CP_CLCDCINT 22 -#define IRQ_CP_MMCIINT0 23 -#define IRQ_CP_MMCIINT1 24 -#define IRQ_CP_AACIINT 25 -#define IRQ_CP_CPPLDINT 26 -#define IRQ_CP_ETHINT 27 -#define IRQ_CP_TSPENINT 28 -#define IRQ_PIC_END 31 - -#define IRQ_CIC_START 32 -#define IRQ_CM_SOFTINT 32 -#define IRQ_CM_COMMRX 33 -#define IRQ_CM_COMMTX 34 -#define IRQ_CIC_END 34 - -/* - * IntegratorCP only - */ -#define IRQ_SIC_START 35 -#define IRQ_SIC_CP_SOFTINT 35 -#define IRQ_SIC_CP_RI0 36 -#define IRQ_SIC_CP_RI1 37 -#define IRQ_SIC_CP_CARDIN 38 -#define IRQ_SIC_CP_LMINT0 39 -#define IRQ_SIC_CP_LMINT1 40 -#define IRQ_SIC_CP_LMINT2 41 -#define IRQ_SIC_CP_LMINT3 42 -#define IRQ_SIC_CP_LMINT4 43 -#define IRQ_SIC_CP_LMINT5 44 -#define IRQ_SIC_CP_LMINT6 45 -#define IRQ_SIC_CP_LMINT7 46 -#define IRQ_SIC_END 46 - -#define NR_IRQS 47 - diff --git a/include/asm-arm/arch-integrator/lm.h b/include/asm-arm/arch-integrator/lm.h deleted file mode 100644 index 28186b6..0000000 --- a/include/asm-arm/arch-integrator/lm.h +++ /dev/null @@ -1,23 +0,0 @@ - -struct lm_device { - struct device dev; - struct resource resource; - unsigned int irq; - unsigned int id; -}; - -struct lm_driver { - struct device_driver drv; - int (*probe)(struct lm_device *); - void (*remove)(struct lm_device *); - int (*suspend)(struct lm_device *, pm_message_t); - int (*resume)(struct lm_device *); -}; - -int lm_driver_register(struct lm_driver *drv); -void lm_driver_unregister(struct lm_driver *drv); - -int lm_device_register(struct lm_device *dev); - -#define lm_get_drvdata(lm) dev_get_drvdata(&(lm)->dev) -#define lm_set_drvdata(lm,d) dev_set_drvdata(&(lm)->dev, d) diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h deleted file mode 100644 index 1ab56d7..0000000 --- a/include/asm-arm/arch-integrator/memory.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/memory.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) -#define BUS_OFFSET UL(0x80000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) (x - PAGE_OFFSET + BUS_OFFSET) -#define __bus_to_virt(x) (x - BUS_OFFSET + PAGE_OFFSET) - -#endif diff --git a/include/asm-arm/arch-integrator/platform.h b/include/asm-arm/arch-integrator/platform.h deleted file mode 100644 index 83c4c1c..0000000 --- a/include/asm-arm/arch-integrator/platform.h +++ /dev/null @@ -1,469 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/************************************************************************** - * * Copyright © ARM Limited 1998. All rights reserved. - * ***********************************************************************/ -/* ************************************************************************ - * - * Integrator address map - * - * NOTE: This is a multi-hosted header file for use with uHAL and - * supported debuggers. - * - * $Id: platform.s,v 1.32 2000/02/18 10:51:39 asims Exp $ - * - * ***********************************************************************/ - -#ifndef __address_h -#define __address_h 1 - -/* ======================================================================== - * Integrator definitions - * ======================================================================== - * ------------------------------------------------------------------------ - * Memory definitions - * ------------------------------------------------------------------------ - * Integrator memory map - * - */ -#define INTEGRATOR_BOOT_ROM_LO 0x00000000 -#define INTEGRATOR_BOOT_ROM_HI 0x20000000 -#define INTEGRATOR_BOOT_ROM_BASE INTEGRATOR_BOOT_ROM_HI /* Normal position */ -#define INTEGRATOR_BOOT_ROM_SIZE SZ_512K - -/* - * New Core Modules have different amounts of SSRAM, the amount of SSRAM - * fitted can be found in HDR_STAT. - * - * The symbol INTEGRATOR_SSRAM_SIZE is kept, however this now refers to - * the minimum amount of SSRAM fitted on any core module. - * - * New Core Modules also alias the SSRAM. - * - */ -#define INTEGRATOR_SSRAM_BASE 0x00000000 -#define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 -#define INTEGRATOR_SSRAM_SIZE SZ_256K - -#define INTEGRATOR_FLASH_BASE 0x24000000 -#define INTEGRATOR_FLASH_SIZE SZ_32M - -#define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 -#define INTEGRATOR_MBRD_SSRAM_SIZE SZ_512K - -/* - * SDRAM is a SIMM therefore the size is not known. - * - */ -#define INTEGRATOR_SDRAM_BASE 0x00040000 - -#define INTEGRATOR_SDRAM_ALIAS_BASE 0x80000000 -#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000 -#define INTEGRATOR_HDR1_SDRAM_BASE 0x90000000 -#define INTEGRATOR_HDR2_SDRAM_BASE 0xA0000000 -#define INTEGRATOR_HDR3_SDRAM_BASE 0xB0000000 - -/* - * Logic expansion modules - * - */ -#define INTEGRATOR_LOGIC_MODULES_BASE 0xC0000000 -#define INTEGRATOR_LOGIC_MODULE0_BASE 0xC0000000 -#define INTEGRATOR_LOGIC_MODULE1_BASE 0xD0000000 -#define INTEGRATOR_LOGIC_MODULE2_BASE 0xE0000000 -#define INTEGRATOR_LOGIC_MODULE3_BASE 0xF0000000 - -/* ------------------------------------------------------------------------ - * Integrator header card registers - * ------------------------------------------------------------------------ - * - */ -#define INTEGRATOR_HDR_ID_OFFSET 0x00 -#define INTEGRATOR_HDR_PROC_OFFSET 0x04 -#define INTEGRATOR_HDR_OSC_OFFSET 0x08 -#define INTEGRATOR_HDR_CTRL_OFFSET 0x0C -#define INTEGRATOR_HDR_STAT_OFFSET 0x10 -#define INTEGRATOR_HDR_LOCK_OFFSET 0x14 -#define INTEGRATOR_HDR_SDRAM_OFFSET 0x20 -#define INTEGRATOR_HDR_INIT_OFFSET 0x24 /* CM9x6 */ -#define INTEGRATOR_HDR_IC_OFFSET 0x40 -#define INTEGRATOR_HDR_SPDBASE_OFFSET 0x100 -#define INTEGRATOR_HDR_SPDTOP_OFFSET 0x200 - -#define INTEGRATOR_HDR_BASE 0x10000000 -#define INTEGRATOR_HDR_ID (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_ID_OFFSET) -#define INTEGRATOR_HDR_PROC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_PROC_OFFSET) -#define INTEGRATOR_HDR_OSC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_OSC_OFFSET) -#define INTEGRATOR_HDR_CTRL (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_CTRL_OFFSET) -#define INTEGRATOR_HDR_STAT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_STAT_OFFSET) -#define INTEGRATOR_HDR_LOCK (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_LOCK_OFFSET) -#define INTEGRATOR_HDR_SDRAM (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SDRAM_OFFSET) -#define INTEGRATOR_HDR_INIT (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_INIT_OFFSET) -#define INTEGRATOR_HDR_IC (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_IC_OFFSET) -#define INTEGRATOR_HDR_SPDBASE (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDBASE_OFFSET) -#define INTEGRATOR_HDR_SPDTOP (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDTOP_OFFSET) - -#define INTEGRATOR_HDR_CTRL_LED 0x01 -#define INTEGRATOR_HDR_CTRL_MBRD_DETECH 0x02 -#define INTEGRATOR_HDR_CTRL_REMAP 0x04 -#define INTEGRATOR_HDR_CTRL_RESET 0x08 -#define INTEGRATOR_HDR_CTRL_HIGHVECTORS 0x10 -#define INTEGRATOR_HDR_CTRL_BIG_ENDIAN 0x20 -#define INTEGRATOR_HDR_CTRL_FASTBUS 0x40 -#define INTEGRATOR_HDR_CTRL_SYNC 0x80 - -#define INTEGRATOR_HDR_OSC_CORE_10MHz 0x102 -#define INTEGRATOR_HDR_OSC_CORE_15MHz 0x107 -#define INTEGRATOR_HDR_OSC_CORE_20MHz 0x10C -#define INTEGRATOR_HDR_OSC_CORE_25MHz 0x111 -#define INTEGRATOR_HDR_OSC_CORE_30MHz 0x116 -#define INTEGRATOR_HDR_OSC_CORE_35MHz 0x11B -#define INTEGRATOR_HDR_OSC_CORE_40MHz 0x120 -#define INTEGRATOR_HDR_OSC_CORE_45MHz 0x125 -#define INTEGRATOR_HDR_OSC_CORE_50MHz 0x12A -#define INTEGRATOR_HDR_OSC_CORE_55MHz 0x12F -#define INTEGRATOR_HDR_OSC_CORE_60MHz 0x134 -#define INTEGRATOR_HDR_OSC_CORE_65MHz 0x139 -#define INTEGRATOR_HDR_OSC_CORE_70MHz 0x13E -#define INTEGRATOR_HDR_OSC_CORE_75MHz 0x143 -#define INTEGRATOR_HDR_OSC_CORE_80MHz 0x148 -#define INTEGRATOR_HDR_OSC_CORE_85MHz 0x14D -#define INTEGRATOR_HDR_OSC_CORE_90MHz 0x152 -#define INTEGRATOR_HDR_OSC_CORE_95MHz 0x157 -#define INTEGRATOR_HDR_OSC_CORE_100MHz 0x15C -#define INTEGRATOR_HDR_OSC_CORE_105MHz 0x161 -#define INTEGRATOR_HDR_OSC_CORE_110MHz 0x166 -#define INTEGRATOR_HDR_OSC_CORE_115MHz 0x16B -#define INTEGRATOR_HDR_OSC_CORE_120MHz 0x170 -#define INTEGRATOR_HDR_OSC_CORE_125MHz 0x175 -#define INTEGRATOR_HDR_OSC_CORE_130MHz 0x17A -#define INTEGRATOR_HDR_OSC_CORE_135MHz 0x17F -#define INTEGRATOR_HDR_OSC_CORE_140MHz 0x184 -#define INTEGRATOR_HDR_OSC_CORE_145MHz 0x189 -#define INTEGRATOR_HDR_OSC_CORE_150MHz 0x18E -#define INTEGRATOR_HDR_OSC_CORE_155MHz 0x193 -#define INTEGRATOR_HDR_OSC_CORE_160MHz 0x198 -#define INTEGRATOR_HDR_OSC_CORE_MASK 0x7FF - -#define INTEGRATOR_HDR_OSC_MEM_10MHz 0x10C000 -#define INTEGRATOR_HDR_OSC_MEM_15MHz 0x116000 -#define INTEGRATOR_HDR_OSC_MEM_20MHz 0x120000 -#define INTEGRATOR_HDR_OSC_MEM_25MHz 0x12A000 -#define INTEGRATOR_HDR_OSC_MEM_30MHz 0x134000 -#define INTEGRATOR_HDR_OSC_MEM_33MHz 0x13A000 -#define INTEGRATOR_HDR_OSC_MEM_40MHz 0x148000 -#define INTEGRATOR_HDR_OSC_MEM_50MHz 0x15C000 -#define INTEGRATOR_HDR_OSC_MEM_60MHz 0x170000 -#define INTEGRATOR_HDR_OSC_MEM_66MHz 0x17C000 -#define INTEGRATOR_HDR_OSC_MEM_MASK 0x7FF000 - -#define INTEGRATOR_HDR_OSC_BUS_MODE_CM7x0 0x0 -#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x0 0x0800000 -#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x6 0x1000000 -#define INTEGRATOR_HDR_OSC_BUS_MODE_CM10x00 0x1800000 -#define INTEGRATOR_HDR_OSC_BUS_MODE_MASK 0x1800000 - -#define INTEGRATOR_HDR_SDRAM_SPD_OK (1 << 5) - - -/* ------------------------------------------------------------------------ - * Integrator system registers - * ------------------------------------------------------------------------ - * - */ - -/* - * System Controller - * - */ -#define INTEGRATOR_SC_ID_OFFSET 0x00 -#define INTEGRATOR_SC_OSC_OFFSET 0x04 -#define INTEGRATOR_SC_CTRLS_OFFSET 0x08 -#define INTEGRATOR_SC_CTRLC_OFFSET 0x0C -#define INTEGRATOR_SC_DEC_OFFSET 0x10 -#define INTEGRATOR_SC_ARB_OFFSET 0x14 -#define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 -#define INTEGRATOR_SC_LOCK_OFFSET 0x1C - -#define INTEGRATOR_SC_BASE 0x11000000 -#define INTEGRATOR_SC_ID (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ID_OFFSET) -#define INTEGRATOR_SC_OSC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_OSC_OFFSET) -#define INTEGRATOR_SC_CTRLS (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET) -#define INTEGRATOR_SC_CTRLC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET) -#define INTEGRATOR_SC_DEC (INTEGRATOR_SC_BASE + INTEGRATOR_SC_DEC_OFFSET) -#define INTEGRATOR_SC_ARB (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ARB_OFFSET) -#define INTEGRATOR_SC_PCIENABLE (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET) -#define INTEGRATOR_SC_LOCK (INTEGRATOR_SC_BASE + INTEGRATOR_SC_LOCK_OFFSET) - -#define INTEGRATOR_SC_OSC_SYS_10MHz 0x20 -#define INTEGRATOR_SC_OSC_SYS_15MHz 0x34 -#define INTEGRATOR_SC_OSC_SYS_20MHz 0x48 -#define INTEGRATOR_SC_OSC_SYS_25MHz 0x5C -#define INTEGRATOR_SC_OSC_SYS_33MHz 0x7C -#define INTEGRATOR_SC_OSC_SYS_MASK 0xFF - -#define INTEGRATOR_SC_OSC_PCI_25MHz 0x100 -#define INTEGRATOR_SC_OSC_PCI_33MHz 0x0 -#define INTEGRATOR_SC_OSC_PCI_MASK 0x100 - -#define INTEGRATOR_SC_CTRL_SOFTRST (1 << 0) -#define INTEGRATOR_SC_CTRL_nFLVPPEN (1 << 1) -#define INTEGRATOR_SC_CTRL_nFLWP (1 << 2) -#define INTEGRATOR_SC_CTRL_URTS0 (1 << 4) -#define INTEGRATOR_SC_CTRL_UDTR0 (1 << 5) -#define INTEGRATOR_SC_CTRL_URTS1 (1 << 6) -#define INTEGRATOR_SC_CTRL_UDTR1 (1 << 7) - -/* - * External Bus Interface - * - */ -#define INTEGRATOR_EBI_BASE 0x12000000 - -#define INTEGRATOR_EBI_CSR0_OFFSET 0x00 -#define INTEGRATOR_EBI_CSR1_OFFSET 0x04 -#define INTEGRATOR_EBI_CSR2_OFFSET 0x08 -#define INTEGRATOR_EBI_CSR3_OFFSET 0x0C -#define INTEGRATOR_EBI_LOCK_OFFSET 0x20 - -#define INTEGRATOR_EBI_CSR0 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET) -#define INTEGRATOR_EBI_CSR1 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET) -#define INTEGRATOR_EBI_CSR2 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET) -#define INTEGRATOR_EBI_CSR3 (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET) -#define INTEGRATOR_EBI_LOCK (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET) - -#define INTEGRATOR_EBI_8_BIT 0x00 -#define INTEGRATOR_EBI_16_BIT 0x01 -#define INTEGRATOR_EBI_32_BIT 0x02 -#define INTEGRATOR_EBI_WRITE_ENABLE 0x04 -#define INTEGRATOR_EBI_SYNC 0x08 -#define INTEGRATOR_EBI_WS_2 0x00 -#define INTEGRATOR_EBI_WS_3 0x10 -#define INTEGRATOR_EBI_WS_4 0x20 -#define INTEGRATOR_EBI_WS_5 0x30 -#define INTEGRATOR_EBI_WS_6 0x40 -#define INTEGRATOR_EBI_WS_7 0x50 -#define INTEGRATOR_EBI_WS_8 0x60 -#define INTEGRATOR_EBI_WS_9 0x70 -#define INTEGRATOR_EBI_WS_10 0x80 -#define INTEGRATOR_EBI_WS_11 0x90 -#define INTEGRATOR_EBI_WS_12 0xA0 -#define INTEGRATOR_EBI_WS_13 0xB0 -#define INTEGRATOR_EBI_WS_14 0xC0 -#define INTEGRATOR_EBI_WS_15 0xD0 -#define INTEGRATOR_EBI_WS_16 0xE0 -#define INTEGRATOR_EBI_WS_17 0xF0 - - -#define INTEGRATOR_CT_BASE 0x13000000 /* Counter/Timers */ -#define INTEGRATOR_IC_BASE 0x14000000 /* Interrupt Controller */ -#define INTEGRATOR_RTC_BASE 0x15000000 /* Real Time Clock */ -#define INTEGRATOR_UART0_BASE 0x16000000 /* UART 0 */ -#define INTEGRATOR_UART1_BASE 0x17000000 /* UART 1 */ -#define INTEGRATOR_KBD_BASE 0x18000000 /* Keyboard */ -#define INTEGRATOR_MOUSE_BASE 0x19000000 /* Mouse */ - -/* - * LED's & Switches - * - */ -#define INTEGRATOR_DBG_ALPHA_OFFSET 0x00 -#define INTEGRATOR_DBG_LEDS_OFFSET 0x04 -#define INTEGRATOR_DBG_SWITCH_OFFSET 0x08 - -#define INTEGRATOR_DBG_BASE 0x1A000000 -#define INTEGRATOR_DBG_ALPHA (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_ALPHA_OFFSET) -#define INTEGRATOR_DBG_LEDS (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET) -#define INTEGRATOR_DBG_SWITCH (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET) - - -#if defined(CONFIG_ARCH_INTEGRATOR_AP) -#define INTEGRATOR_GPIO_BASE 0x1B000000 /* GPIO */ -#elif defined(CONFIG_ARCH_INTEGRATOR_CP) -#define INTEGRATOR_GPIO_BASE 0xC9000000 /* GPIO */ -#endif - -/* ------------------------------------------------------------------------ - * KMI keyboard/mouse definitions - * ------------------------------------------------------------------------ - */ -/* PS2 Keyboard interface */ -#define KMI0_BASE INTEGRATOR_KBD_BASE - -/* PS2 Mouse interface */ -#define KMI1_BASE INTEGRATOR_MOUSE_BASE - -/* KMI definitions are now in include/asm-arm/hardware/amba_kmi.h -- rmk */ - -/* ------------------------------------------------------------------------ - * Where in the memory map does PCI live? - * ------------------------------------------------------------------------ - * This represents a fairly liberal usage of address space. Even though - * the V3 only has two windows (therefore we need to map stuff on the fly), - * we maintain the same addresses, even if they're not mapped. - * - */ -#define PHYS_PCI_MEM_BASE 0x40000000 /* 512M to xxx */ -/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? - */ -#define PHYS_PCI_IO_BASE 0x60000000 /* 16M to xxx */ -/* unused (128-16)M from B1000000-B7FFFFFF - */ -#define PHYS_PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */ -/* unused ((128-16)M - 64K) from XXX - */ -#define PHYS_PCI_V3_BASE 0x62000000 - -#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE - -/* 'export' these to UHAL */ -#define UHAL_PCI_IO PCI_IO_BASE -#define UHAL_PCI_MEM PCI_MEM_BASE -#define UHAL_PCI_ALLOC_IO_BASE 0x00004000 -#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE -#define UHAL_PCI_MAX_SLOT 20 - -/* ======================================================================== - * Start of uHAL definitions - * ======================================================================== - */ - -/* ------------------------------------------------------------------------ - * Integrator Interrupt Controllers - * ------------------------------------------------------------------------ - * - * Offsets from interrupt controller base - * - * System Controller interrupt controller base is - * - * INTEGRATOR_IC_BASE + (header_number << 6) - * - * Core Module interrupt controller base is - * - * INTEGRATOR_HDR_IC - * - */ -#define IRQ_STATUS 0 -#define IRQ_RAW_STATUS 0x04 -#define IRQ_ENABLE 0x08 -#define IRQ_ENABLE_SET 0x08 -#define IRQ_ENABLE_CLEAR 0x0C - -#define INT_SOFT_SET 0x10 -#define INT_SOFT_CLEAR 0x14 - -#define FIQ_STATUS 0x20 -#define FIQ_RAW_STATUS 0x24 -#define FIQ_ENABLE 0x28 -#define FIQ_ENABLE_SET 0x28 -#define FIQ_ENABLE_CLEAR 0x2C - - -/* ------------------------------------------------------------------------ - * Interrupts - * ------------------------------------------------------------------------ - * - * - * Each Core Module has two interrupts controllers, one on the core module - * itself and one in the system controller on the motherboard. The - * READ_INT macro in target.s reads both interrupt controllers and returns - * a 32 bit bitmask, bits 0 to 23 are interrupts from the system controller - * and bits 24 to 31 are from the core module. - * - * The following definitions relate to the bitmask returned by READ_INT. - * - */ - -/* ------------------------------------------------------------------------ - * LED's - The header LED is not accessible via the uHAL API - * ------------------------------------------------------------------------ - * - */ -#define GREEN_LED 0x01 -#define YELLOW_LED 0x02 -#define RED_LED 0x04 -#define GREEN_LED_2 0x08 -#define ALL_LEDS 0x0F - -#define LED_BANK INTEGRATOR_DBG_LEDS - -/* - * Memory definitions - run uHAL out of SSRAM. - * - */ -#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE - -/* - * Application Flash - * - */ -#define FLASH_BASE INTEGRATOR_FLASH_BASE -#define FLASH_SIZE INTEGRATOR_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI -#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) - -/* - * Clean base - dummy - * - */ -#define CLEAN_BASE EPROM_BASE - -/* - * Timer definitions - * - * Only use timer 1 & 2 - * (both run at 24MHz and will need the clock divider set to 16). - * - * Timer 0 runs at bus frequency and therefore could vary and currently - * uHAL can't handle that. - * - */ - -#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE -#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100) -#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200) - -#define MAX_TIMER 2 -#define MAX_PERIOD 699050 -#define TICKS_PER_uSEC 24 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_5 (mSEC_1 * 5) -#define mSEC_10 (mSEC_1 * 10) -#define mSEC_25 (mSEC_1 * 25) -#define SEC_1 (mSEC_1 * 1000) - -#define INTEGRATOR_CSR_BASE 0x10000000 -#define INTEGRATOR_CSR_SIZE 0x10000000 - -#endif - -/* END */ diff --git a/include/asm-arm/arch-integrator/system.h b/include/asm-arm/arch-integrator/system.h deleted file mode 100644 index 8ea4422..0000000 --- a/include/asm-arm/arch-integrator/system.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/system.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - cm_control(CM_CTRL_RESET, CM_CTRL_RESET); -} - -#endif diff --git a/include/asm-arm/arch-integrator/timex.h b/include/asm-arm/arch-integrator/timex.h deleted file mode 100644 index 87a7628..0000000 --- a/include/asm-arm/arch-integrator/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/timex.h - * - * Integrator architecture timex specifications - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * ?? - */ -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-integrator/uncompress.h b/include/asm-arm/arch-integrator/uncompress.h deleted file mode 100644 index f61825c..0000000 --- a/include/asm-arm/arch-integrator/uncompress.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/uncompress.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define AMBA_UART_DR (*(volatile unsigned char *)0x16000000) -#define AMBA_UART_LCRH (*(volatile unsigned char *)0x16000008) -#define AMBA_UART_LCRM (*(volatile unsigned char *)0x1600000c) -#define AMBA_UART_LCRL (*(volatile unsigned char *)0x16000010) -#define AMBA_UART_CR (*(volatile unsigned char *)0x16000014) -#define AMBA_UART_FR (*(volatile unsigned char *)0x16000018) - -/* - * This does not append a newline - */ -static void putc(int c) -{ - while (AMBA_UART_FR & (1 << 5)) - barrier(); - - AMBA_UART_DR = c; -} - -static inline void flush(void) -{ - while (AMBA_UART_FR & (1 << 3)) - barrier(); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() - -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-integrator/vmalloc.h b/include/asm-arm/arch-integrator/vmalloc.h deleted file mode 100644 index 170ccce..0000000 --- a/include/asm-arm/arch-integrator/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-integrator/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-iop13xx/adma.h b/include/asm-arm/arch-iop13xx/adma.h deleted file mode 100644 index 26f60af..0000000 --- a/include/asm-arm/arch-iop13xx/adma.h +++ /dev/null @@ -1,537 +0,0 @@ -/* - * Copyright(c) 2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - * - */ -#ifndef _ADMA_H -#define _ADMA_H -#include -#include -#include -#include - -#define ADMA_ACCR(chan) (chan->mmr_base + 0x0) -#define ADMA_ACSR(chan) (chan->mmr_base + 0x4) -#define ADMA_ADAR(chan) (chan->mmr_base + 0x8) -#define ADMA_IIPCR(chan) (chan->mmr_base + 0x18) -#define ADMA_IIPAR(chan) (chan->mmr_base + 0x1c) -#define ADMA_IIPUAR(chan) (chan->mmr_base + 0x20) -#define ADMA_ANDAR(chan) (chan->mmr_base + 0x24) -#define ADMA_ADCR(chan) (chan->mmr_base + 0x28) -#define ADMA_CARMD(chan) (chan->mmr_base + 0x2c) -#define ADMA_ABCR(chan) (chan->mmr_base + 0x30) -#define ADMA_DLADR(chan) (chan->mmr_base + 0x34) -#define ADMA_DUADR(chan) (chan->mmr_base + 0x38) -#define ADMA_SLAR(src, chan) (chan->mmr_base + (0x3c + (src << 3))) -#define ADMA_SUAR(src, chan) (chan->mmr_base + (0x40 + (src << 3))) - -struct iop13xx_adma_src { - u32 src_addr; - union { - u32 upper_src_addr; - struct { - unsigned int pq_upper_src_addr:24; - unsigned int pq_dmlt:8; - }; - }; -}; - -struct iop13xx_adma_desc_ctrl { - unsigned int int_en:1; - unsigned int xfer_dir:2; - unsigned int src_select:4; - unsigned int zero_result:1; - unsigned int block_fill_en:1; - unsigned int crc_gen_en:1; - unsigned int crc_xfer_dis:1; - unsigned int crc_seed_fetch_dis:1; - unsigned int status_write_back_en:1; - unsigned int endian_swap_en:1; - unsigned int reserved0:2; - unsigned int pq_update_xfer_en:1; - unsigned int dual_xor_en:1; - unsigned int pq_xfer_en:1; - unsigned int p_xfer_dis:1; - unsigned int reserved1:10; - unsigned int relax_order_en:1; - unsigned int no_snoop_en:1; -}; - -struct iop13xx_adma_byte_count { - unsigned int byte_count:24; - unsigned int host_if:3; - unsigned int reserved:2; - unsigned int zero_result_err_q:1; - unsigned int zero_result_err:1; - unsigned int tx_complete:1; -}; - -struct iop13xx_adma_desc_hw { - u32 next_desc; - union { - u32 desc_ctrl; - struct iop13xx_adma_desc_ctrl desc_ctrl_field; - }; - union { - u32 crc_addr; - u32 block_fill_data; - u32 q_dest_addr; - }; - union { - u32 byte_count; - struct iop13xx_adma_byte_count byte_count_field; - }; - union { - u32 dest_addr; - u32 p_dest_addr; - }; - union { - u32 upper_dest_addr; - u32 pq_upper_dest_addr; - }; - struct iop13xx_adma_src src[1]; -}; - -struct iop13xx_adma_desc_dual_xor { - u32 next_desc; - u32 desc_ctrl; - u32 reserved; - u32 byte_count; - u32 h_dest_addr; - u32 h_upper_dest_addr; - u32 src0_addr; - u32 upper_src0_addr; - u32 src1_addr; - u32 upper_src1_addr; - u32 h_src_addr; - u32 h_upper_src_addr; - u32 d_src_addr; - u32 d_upper_src_addr; - u32 d_dest_addr; - u32 d_upper_dest_addr; -}; - -struct iop13xx_adma_desc_pq_update { - u32 next_desc; - u32 desc_ctrl; - u32 reserved; - u32 byte_count; - u32 p_dest_addr; - u32 p_upper_dest_addr; - u32 src0_addr; - u32 upper_src0_addr; - u32 src1_addr; - u32 upper_src1_addr; - u32 p_src_addr; - u32 p_upper_src_addr; - u32 q_src_addr; - struct { - unsigned int q_upper_src_addr:24; - unsigned int q_dmlt:8; - }; - u32 q_dest_addr; - u32 q_upper_dest_addr; -}; - -static inline int iop_adma_get_max_xor(void) -{ - return 16; -} - -static inline u32 iop_chan_get_current_descriptor(struct iop_adma_chan *chan) -{ - return __raw_readl(ADMA_ADAR(chan)); -} - -static inline void iop_chan_set_next_descriptor(struct iop_adma_chan *chan, - u32 next_desc_addr) -{ - __raw_writel(next_desc_addr, ADMA_ANDAR(chan)); -} - -#define ADMA_STATUS_BUSY (1 << 13) - -static inline char iop_chan_is_busy(struct iop_adma_chan *chan) -{ - if (__raw_readl(ADMA_ACSR(chan)) & - ADMA_STATUS_BUSY) - return 1; - else - return 0; -} - -static inline int -iop_chan_get_desc_align(struct iop_adma_chan *chan, int num_slots) -{ - return 1; -} -#define iop_desc_is_aligned(x, y) 1 - -static inline int -iop_chan_memcpy_slot_count(size_t len, int *slots_per_op) -{ - *slots_per_op = 1; - return 1; -} - -#define iop_chan_interrupt_slot_count(s, c) iop_chan_memcpy_slot_count(0, s) - -static inline int -iop_chan_memset_slot_count(size_t len, int *slots_per_op) -{ - *slots_per_op = 1; - return 1; -} - -static inline int -iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op) -{ - static const char slot_count_table[] = { 1, 2, 2, 2, - 2, 3, 3, 3, - 3, 4, 4, 4, - 4, 5, 5, 5, - }; - *slots_per_op = slot_count_table[src_cnt - 1]; - return *slots_per_op; -} - -#define ADMA_MAX_BYTE_COUNT (16 * 1024 * 1024) -#define IOP_ADMA_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT -#define IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT -#define IOP_ADMA_XOR_MAX_BYTE_COUNT ADMA_MAX_BYTE_COUNT -#define iop_chan_zero_sum_slot_count(l, s, o) iop_chan_xor_slot_count(l, s, o) - -static inline u32 iop_desc_get_dest_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - return hw_desc->dest_addr; -} - -static inline u32 iop_desc_get_byte_count(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - return hw_desc->byte_count_field.byte_count; -} - -static inline u32 iop_desc_get_src_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - int src_idx) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - return hw_desc->src[src_idx].src_addr; -} - -static inline u32 iop_desc_get_src_count(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - return hw_desc->desc_ctrl_field.src_select + 1; -} - -static inline void -iop_desc_init_memcpy(struct iop_adma_desc_slot *desc, unsigned long flags) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop13xx_adma_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - hw_desc->crc_addr = 0; -} - -static inline void -iop_desc_init_memset(struct iop_adma_desc_slot *desc, unsigned long flags) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop13xx_adma_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.block_fill_en = 1; - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - hw_desc->crc_addr = 0; -} - -/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ -static inline void -iop_desc_init_xor(struct iop_adma_desc_slot *desc, int src_cnt, - unsigned long flags) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop13xx_adma_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.src_select = src_cnt - 1; - u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - hw_desc->crc_addr = 0; - -} -#define iop_desc_init_null_xor(d, s, i) iop_desc_init_xor(d, s, i) - -/* to do: support buffers larger than ADMA_MAX_BYTE_COUNT */ -static inline int -iop_desc_init_zero_sum(struct iop_adma_desc_slot *desc, int src_cnt, - unsigned long flags) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - union { - u32 value; - struct iop13xx_adma_desc_ctrl field; - } u_desc_ctrl; - - u_desc_ctrl.value = 0; - u_desc_ctrl.field.src_select = src_cnt - 1; - u_desc_ctrl.field.xfer_dir = 3; /* local to internal bus */ - u_desc_ctrl.field.zero_result = 1; - u_desc_ctrl.field.status_write_back_en = 1; - u_desc_ctrl.field.int_en = flags & DMA_PREP_INTERRUPT; - hw_desc->desc_ctrl = u_desc_ctrl.value; - hw_desc->crc_addr = 0; - - return 1; -} - -static inline void iop_desc_set_byte_count(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - u32 byte_count) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - hw_desc->byte_count = byte_count; -} - -static inline void -iop_desc_set_zero_sum_byte_count(struct iop_adma_desc_slot *desc, u32 len) -{ - int slots_per_op = desc->slots_per_op; - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc, *iter; - int i = 0; - - if (len <= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT) { - hw_desc->byte_count = len; - } else { - do { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iter->byte_count = IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - len -= IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT; - i += slots_per_op; - } while (len > IOP_ADMA_ZERO_SUM_MAX_BYTE_COUNT); - - if (len) { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iter->byte_count = len; - } - } -} - - -static inline void iop_desc_set_dest_addr(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan, - dma_addr_t addr) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - hw_desc->dest_addr = addr; - hw_desc->upper_dest_addr = 0; -} - -static inline void iop_desc_set_memcpy_src_addr(struct iop_adma_desc_slot *desc, - dma_addr_t addr) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - hw_desc->src[0].src_addr = addr; - hw_desc->src[0].upper_src_addr = 0; -} - -static inline void iop_desc_set_xor_src_addr(struct iop_adma_desc_slot *desc, - int src_idx, dma_addr_t addr) -{ - int slot_cnt = desc->slot_cnt, slots_per_op = desc->slots_per_op; - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc, *iter; - int i = 0; - - do { - iter = iop_hw_desc_slot_idx(hw_desc, i); - iter->src[src_idx].src_addr = addr; - iter->src[src_idx].upper_src_addr = 0; - slot_cnt -= slots_per_op; - if (slot_cnt) { - i += slots_per_op; - addr += IOP_ADMA_XOR_MAX_BYTE_COUNT; - } - } while (slot_cnt); -} - -static inline void -iop_desc_init_interrupt(struct iop_adma_desc_slot *desc, - struct iop_adma_chan *chan) -{ - iop_desc_init_memcpy(desc, 1); - iop_desc_set_byte_count(desc, chan, 0); - iop_desc_set_dest_addr(desc, chan, 0); - iop_desc_set_memcpy_src_addr(desc, 0); -} - -#define iop_desc_set_zero_sum_src_addr iop_desc_set_xor_src_addr - -static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, - u32 next_desc_addr) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - BUG_ON(hw_desc->next_desc); - hw_desc->next_desc = next_desc_addr; -} - -static inline u32 iop_desc_get_next_desc(struct iop_adma_desc_slot *desc) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - return hw_desc->next_desc; -} - -static inline void iop_desc_clear_next_desc(struct iop_adma_desc_slot *desc) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - hw_desc->next_desc = 0; -} - -static inline void iop_desc_set_block_fill_val(struct iop_adma_desc_slot *desc, - u32 val) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - hw_desc->block_fill_data = val; -} - -static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc) -{ - struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - struct iop13xx_adma_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field; - struct iop13xx_adma_byte_count byte_count = hw_desc->byte_count_field; - - BUG_ON(!(byte_count.tx_complete && desc_ctrl.zero_result)); - - if (desc_ctrl.pq_xfer_en) - return byte_count.zero_result_err_q; - else - return byte_count.zero_result_err; -} - -static inline void iop_chan_append(struct iop_adma_chan *chan) -{ - u32 adma_accr; - - adma_accr = __raw_readl(ADMA_ACCR(chan)); - adma_accr |= 0x2; - __raw_writel(adma_accr, ADMA_ACCR(chan)); -} - -static inline u32 iop_chan_get_status(struct iop_adma_chan *chan) -{ - return __raw_readl(ADMA_ACSR(chan)); -} - -static inline void iop_chan_disable(struct iop_adma_chan *chan) -{ - u32 adma_chan_ctrl = __raw_readl(ADMA_ACCR(chan)); - adma_chan_ctrl &= ~0x1; - __raw_writel(adma_chan_ctrl, ADMA_ACCR(chan)); -} - -static inline void iop_chan_enable(struct iop_adma_chan *chan) -{ - u32 adma_chan_ctrl; - - adma_chan_ctrl = __raw_readl(ADMA_ACCR(chan)); - adma_chan_ctrl |= 0x1; - __raw_writel(adma_chan_ctrl, ADMA_ACCR(chan)); -} - -static inline void iop_adma_device_clear_eot_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(ADMA_ACSR(chan)); - status &= (1 << 12); - __raw_writel(status, ADMA_ACSR(chan)); -} - -static inline void iop_adma_device_clear_eoc_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(ADMA_ACSR(chan)); - status &= (1 << 11); - __raw_writel(status, ADMA_ACSR(chan)); -} - -static inline void iop_adma_device_clear_err_status(struct iop_adma_chan *chan) -{ - u32 status = __raw_readl(ADMA_ACSR(chan)); - status &= (1 << 9) | (1 << 5) | (1 << 4) | (1 << 3); - __raw_writel(status, ADMA_ACSR(chan)); -} - -static inline int -iop_is_err_int_parity(unsigned long status, struct iop_adma_chan *chan) -{ - return test_bit(9, &status); -} - -static inline int -iop_is_err_mcu_abort(unsigned long status, struct iop_adma_chan *chan) -{ - return test_bit(5, &status); -} - -static inline int -iop_is_err_int_tabort(unsigned long status, struct iop_adma_chan *chan) -{ - return test_bit(4, &status); -} - -static inline int -iop_is_err_int_mabort(unsigned long status, struct iop_adma_chan *chan) -{ - return test_bit(3, &status); -} - -static inline int -iop_is_err_pci_tabort(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -static inline int -iop_is_err_pci_mabort(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -static inline int -iop_is_err_split_tx(unsigned long status, struct iop_adma_chan *chan) -{ - return 0; -} - -#endif /* _ADMA_H */ diff --git a/include/asm-arm/arch-iop13xx/debug-macro.S b/include/asm-arm/arch-iop13xx/debug-macro.S deleted file mode 100644 index 788b4e3..0000000 --- a/include/asm-arm/arch-iop13xx/debug-macro.S +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-iop13xx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - moveq \rx, #0xff000000 @ physical - orreq \rx, \rx, #0x00d80000 - movne \rx, #0xfe000000 @ virtual - orrne \rx, \rx, #0x00e80000 - orr \rx, \rx, #0x00002300 - orr \rx, \rx, #0x00000040 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-iop13xx/dma.h b/include/asm-arm/arch-iop13xx/dma.h deleted file mode 100644 index d79846f..0000000 --- a/include/asm-arm/arch-iop13xx/dma.h +++ /dev/null @@ -1,3 +0,0 @@ -#ifndef _IOP13XX_DMA_H -#define _IOP13XX_DMA_H -#endif diff --git a/include/asm-arm/arch-iop13xx/entry-macro.S b/include/asm-arm/arch-iop13xx/entry-macro.S deleted file mode 100644 index a624a78..0000000 --- a/include/asm-arm/arch-iop13xx/entry-macro.S +++ /dev/null @@ -1,45 +0,0 @@ -/* - * iop13xx low level irq macros - * Copyright (c) 2005-2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c15, c1, 0 - orr \tmp, \tmp, #(1 << 6) - mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access - .endm - - /* - * Note: a 1-cycle window exists where iintvec will return the value - * of iintbase, so we explicitly check for "bad zeros" - */ - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC - cmp \irqnr, #0 - mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero - adds \irqstat, \irqnr, #1 @ Check for 0xffffffff - movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - mrc p15, 0, \tmp1, c15, c1, 0 - ands \tmp2, \tmp1, #(1 << 6) - bicne \tmp1, \tmp1, #(1 << 6) - mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access - .endm diff --git a/include/asm-arm/arch-iop13xx/hardware.h b/include/asm-arm/arch-iop13xx/hardware.h deleted file mode 100644 index 8e1d562..0000000 --- a/include/asm-arm/arch-iop13xx/hardware.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H -#include - -#define pcibios_assign_all_busses() 1 - -#ifndef __ASSEMBLY__ -extern unsigned long iop13xx_pcibios_min_io; -extern unsigned long iop13xx_pcibios_min_mem; -extern u16 iop13xx_dev_id(void); -extern void iop13xx_set_atu_mmr_bases(void); -#endif - -#define PCIBIOS_MIN_IO (iop13xx_pcibios_min_io) -#define PCIBIOS_MIN_MEM (iop13xx_pcibios_min_mem) - -/* - * Generic chipset bits - * - */ -#include "iop13xx.h" - -/* - * Board specific bits - */ -#include "iq81340.h" - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h deleted file mode 100644 index a6e0f9e..0000000 --- a/include/asm-arm/arch-iop13xx/io.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * iop13xx custom ioremap implementation - * Copyright (c) 2005-2006, Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms and conditions of the GNU General Public License, - * version 2, as published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - * more details. - * - * You should have received a copy of the GNU General Public License along with - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple - * Place - Suite 330, Boston, MA 02111-1307 USA. - * - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) __iop13xx_io(a) -#define __mem_pci(a) (a) -#define __mem_isa(a) (a) - -extern void __iomem * __iop13xx_io(unsigned long io_addr); -extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop13xx_iounmap(void __iomem *addr); - -extern u32 iop13xx_atue_mem_base; -extern u32 iop13xx_atux_mem_base; -extern size_t iop13xx_atue_mem_size; -extern size_t iop13xx_atux_mem_size; - -#define __arch_ioremap(a, s, f) __iop13xx_ioremap(a, s, f) -#define __arch_iounmap(a) __iop13xx_iounmap(a) - -#endif diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h deleted file mode 100644 index 52b7fab..0000000 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ /dev/null @@ -1,526 +0,0 @@ -#ifndef _IOP13XX_HW_H_ -#define _IOP13XX_HW_H_ - -#ifndef __ASSEMBLY__ -/* The ATU offsets can change based on the strapping */ -extern u32 iop13xx_atux_pmmr_offset; -extern u32 iop13xx_atue_pmmr_offset; -void iop13xx_init_irq(void); -void iop13xx_map_io(void); -void iop13xx_platform_init(void); -void iop13xx_add_tpmi_devices(void); -void iop13xx_init_irq(void); - -/* CPUID CP6 R0 Page 0 */ -static inline int iop13xx_cpu_id(void) -{ - int id; - asm volatile("mrc p6, 0, %0, c0, c0, 0":"=r" (id)); - return id; -} - -/* WDTCR CP6 R7 Page 9 */ -static inline u32 read_wdtcr(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c7, c9, 0":"=r" (val)); - return val; -} -static inline void write_wdtcr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c7, c9, 0"::"r" (val)); -} - -/* WDTSR CP6 R8 Page 9 */ -static inline u32 read_wdtsr(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c8, c9, 0":"=r" (val)); - return val; -} -static inline void write_wdtsr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c8, c9, 0"::"r" (val)); -} - -/* RCSR - Reset Cause Status Register */ -static inline u32 read_rcsr(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c0, c1, 0":"=r" (val)); - return val; -} - -extern unsigned long get_iop_tick_rate(void); -#endif - -/* - * IOP13XX I/O and Mem space regions for PCI autoconfiguration - */ -#define IOP13XX_MAX_RAM_SIZE 0x80000000UL /* 2GB */ -#define IOP13XX_PCI_OFFSET IOP13XX_MAX_RAM_SIZE - -/* PCI MAP - * bus range cpu phys cpu virt note - * 0x0000.0000 + 2GB (n/a) (n/a) inbound, 1:1 mapping with Physical RAM - * 0x8000.0000 + 928M 0x1.8000.0000 (ioremap) PCIX outbound memory window - * 0x8000.0000 + 928M 0x2.8000.0000 (ioremap) PCIE outbound memory window - * - * IO MAP - * 0x1000 + 64K 0x0.fffb.1000 0xfec6.1000 PCIX outbound i/o window - * 0x1000 + 64K 0x0.fffd.1000 0xfed7.1000 PCIE outbound i/o window - */ -#define IOP13XX_PCIX_IO_WINDOW_SIZE 0x10000UL -#define IOP13XX_PCIX_LOWER_IO_PA 0xfffb0000UL -#define IOP13XX_PCIX_LOWER_IO_VA 0xfec60000UL -#define IOP13XX_PCIX_LOWER_IO_BA 0x0UL /* OIOTVR */ -#define IOP13XX_PCIX_IO_BUS_OFFSET 0x1000UL -#define IOP13XX_PCIX_UPPER_IO_PA (IOP13XX_PCIX_LOWER_IO_PA +\ - IOP13XX_PCIX_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_UPPER_IO_VA (IOP13XX_PCIX_LOWER_IO_VA +\ - IOP13XX_PCIX_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PCIX_LOWER_IO_PA\ - - IOP13XX_PCIX_LOWER_IO_VA)) - -#define IOP13XX_PCIX_MEM_PHYS_OFFSET 0x100000000ULL -#define IOP13XX_PCIX_MEM_WINDOW_SIZE 0x3a000000UL -#define IOP13XX_PCIX_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET) -#define IOP13XX_PCIX_LOWER_MEM_PA (IOP13XX_PCIX_MEM_PHYS_OFFSET +\ - IOP13XX_PCIX_LOWER_MEM_BA) -#define IOP13XX_PCIX_UPPER_MEM_PA (IOP13XX_PCIX_LOWER_MEM_PA +\ - IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_UPPER_MEM_BA (IOP13XX_PCIX_LOWER_MEM_BA +\ - IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) - -#define IOP13XX_PCIX_MEM_COOKIE 0x80000000UL -#define IOP13XX_PCIX_LOWER_MEM_RA IOP13XX_PCIX_MEM_COOKIE -#define IOP13XX_PCIX_UPPER_MEM_RA (IOP13XX_PCIX_LOWER_MEM_RA +\ - IOP13XX_PCIX_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PCIX_MEM_OFFSET (IOP13XX_PCIX_MEM_COOKIE -\ - IOP13XX_PCIX_LOWER_MEM_BA) - -/* PCI-E ranges */ -#define IOP13XX_PCIE_IO_WINDOW_SIZE 0x10000UL -#define IOP13XX_PCIE_LOWER_IO_PA 0xfffd0000UL -#define IOP13XX_PCIE_LOWER_IO_VA 0xfed70000UL -#define IOP13XX_PCIE_LOWER_IO_BA 0x0UL /* OIOTVR */ -#define IOP13XX_PCIE_IO_BUS_OFFSET 0x1000UL -#define IOP13XX_PCIE_UPPER_IO_PA (IOP13XX_PCIE_LOWER_IO_PA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_UPPER_IO_VA (IOP13XX_PCIE_LOWER_IO_VA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_UPPER_IO_BA (IOP13XX_PCIE_LOWER_IO_BA +\ - IOP13XX_PCIE_IO_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_IO_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PCIE_LOWER_IO_PA\ - - IOP13XX_PCIE_LOWER_IO_VA)) - -#define IOP13XX_PCIE_MEM_PHYS_OFFSET 0x200000000ULL -#define IOP13XX_PCIE_MEM_WINDOW_SIZE 0x3a000000UL -#define IOP13XX_PCIE_LOWER_MEM_BA (PHYS_OFFSET + IOP13XX_PCI_OFFSET) -#define IOP13XX_PCIE_LOWER_MEM_PA (IOP13XX_PCIE_MEM_PHYS_OFFSET +\ - IOP13XX_PCIE_LOWER_MEM_BA) -#define IOP13XX_PCIE_UPPER_MEM_PA (IOP13XX_PCIE_LOWER_MEM_PA +\ - IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_UPPER_MEM_BA (IOP13XX_PCIE_LOWER_MEM_BA +\ - IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) - -/* All 0xc000.0000 - 0xfdff.ffff addresses belong to PCIe */ -#define IOP13XX_PCIE_MEM_COOKIE 0xc0000000UL -#define IOP13XX_PCIE_LOWER_MEM_RA IOP13XX_PCIE_MEM_COOKIE -#define IOP13XX_PCIE_UPPER_MEM_RA (IOP13XX_PCIE_LOWER_MEM_RA +\ - IOP13XX_PCIE_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PCIE_MEM_OFFSET (IOP13XX_PCIE_MEM_COOKIE -\ - IOP13XX_PCIE_LOWER_MEM_BA) - -/* PBI Ranges */ -#define IOP13XX_PBI_LOWER_MEM_PA 0xf0000000UL -#define IOP13XX_PBI_MEM_WINDOW_SIZE 0x04000000UL -#define IOP13XX_PBI_MEM_COOKIE 0xfa000000UL -#define IOP13XX_PBI_LOWER_MEM_RA IOP13XX_PBI_MEM_COOKIE -#define IOP13XX_PBI_UPPER_MEM_RA (IOP13XX_PBI_LOWER_MEM_RA +\ - IOP13XX_PBI_MEM_WINDOW_SIZE - 1) - -/* - * IOP13XX chipset registers - */ -#define IOP13XX_PMMR_PHYS_MEM_BASE 0xffd80000UL /* PMMR phys. address */ -#define IOP13XX_PMMR_VIRT_MEM_BASE 0xfee80000UL /* PMMR phys. address */ -#define IOP13XX_PMMR_MEM_WINDOW_SIZE 0x80000 -#define IOP13XX_PMMR_UPPER_MEM_VA (IOP13XX_PMMR_VIRT_MEM_BASE +\ - IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PMMR_UPPER_MEM_PA (IOP13XX_PMMR_PHYS_MEM_BASE +\ - IOP13XX_PMMR_MEM_WINDOW_SIZE - 1) -#define IOP13XX_PMMR_VIRT_TO_PHYS(addr) (u32) ((u32) addr +\ - (IOP13XX_PMMR_PHYS_MEM_BASE\ - - IOP13XX_PMMR_VIRT_MEM_BASE)) -#define IOP13XX_PMMR_PHYS_TO_VIRT(addr) (u32) ((u32) addr -\ - (IOP13XX_PMMR_PHYS_MEM_BASE\ - - IOP13XX_PMMR_VIRT_MEM_BASE)) -#define IOP13XX_REG_ADDR32(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) -#define IOP13XX_REG_ADDR16(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) -#define IOP13XX_REG_ADDR8(reg) (IOP13XX_PMMR_VIRT_MEM_BASE + (reg)) -#define IOP13XX_REG_ADDR32_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) -#define IOP13XX_REG_ADDR16_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) -#define IOP13XX_REG_ADDR8_PHYS(reg) (IOP13XX_PMMR_PHYS_MEM_BASE + (reg)) -#define IOP13XX_PMMR_SIZE 0x00080000 - -/*=================== Defines for Platform Devices =====================*/ -#define IOP13XX_UART0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002300) -#define IOP13XX_UART1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002340) -#define IOP13XX_UART0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002300) -#define IOP13XX_UART1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002340) - -#define IOP13XX_I2C0_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002500) -#define IOP13XX_I2C1_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002520) -#define IOP13XX_I2C2_PHYS (IOP13XX_PMMR_PHYS_MEM_BASE | 0x00002540) -#define IOP13XX_I2C0_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002500) -#define IOP13XX_I2C1_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002520) -#define IOP13XX_I2C2_VIRT (IOP13XX_PMMR_VIRT_MEM_BASE | 0x00002540) - -/* ATU selection flags */ -/* IOP13XX_INIT_ATU_DEFAULT = Rely on CONFIG_IOP13XX_ATU* */ -#define IOP13XX_INIT_ATU_DEFAULT (0) -#define IOP13XX_INIT_ATU_ATUX (1 << 0) -#define IOP13XX_INIT_ATU_ATUE (1 << 1) -#define IOP13XX_INIT_ATU_NONE (1 << 2) - -/* UART selection flags */ -/* IOP13XX_INIT_UART_DEFAULT = Rely on CONFIG_IOP13XX_UART* */ -#define IOP13XX_INIT_UART_DEFAULT (0) -#define IOP13XX_INIT_UART_0 (1 << 0) -#define IOP13XX_INIT_UART_1 (1 << 1) - -/* I2C selection flags */ -/* IOP13XX_INIT_I2C_DEFAULT = Rely on CONFIG_IOP13XX_I2C* */ -#define IOP13XX_INIT_I2C_DEFAULT (0) -#define IOP13XX_INIT_I2C_0 (1 << 0) -#define IOP13XX_INIT_I2C_1 (1 << 1) -#define IOP13XX_INIT_I2C_2 (1 << 2) - -/* ADMA selection flags */ -/* INIT_ADMA_DEFAULT = Rely on CONFIG_IOP13XX_ADMA* */ -#define IOP13XX_INIT_ADMA_DEFAULT (0) -#define IOP13XX_INIT_ADMA_0 (1 << 0) -#define IOP13XX_INIT_ADMA_1 (1 << 1) -#define IOP13XX_INIT_ADMA_2 (1 << 2) - -/* Platform devices */ -#define IQ81340_NUM_UART 2 -#define IQ81340_NUM_I2C 3 -#define IQ81340_NUM_PHYS_MAP_FLASH 1 -#define IQ81340_NUM_ADMA 3 -#define IQ81340_MAX_PLAT_DEVICES (IQ81340_NUM_UART + \ - IQ81340_NUM_I2C + \ - IQ81340_NUM_PHYS_MAP_FLASH + \ - IQ81340_NUM_ADMA) - -/*========================== PMMR offsets for key registers ============*/ -#define IOP13XX_ATU0_PMMR_OFFSET 0x00048000 -#define IOP13XX_ATU1_PMMR_OFFSET 0x0004c000 -#define IOP13XX_ATU2_PMMR_OFFSET 0x0004d000 -#define IOP13XX_ADMA0_PMMR_OFFSET 0x00000000 -#define IOP13XX_ADMA1_PMMR_OFFSET 0x00000200 -#define IOP13XX_ADMA2_PMMR_OFFSET 0x00000400 -#define IOP13XX_PBI_PMMR_OFFSET 0x00001580 -#define IOP13XX_MU_PMMR_OFFSET 0x00004000 -#define IOP13XX_ESSR0_PMMR_OFFSET 0x00002188 -#define IOP13XX_ESSR0 IOP13XX_REG_ADDR32(0x00002188) - -#define IOP13XX_ESSR0_IFACE_MASK 0x00004000 /* Interface PCI-X / PCI-E */ -#define IOP13XX_CONTROLLER_ONLY (1 << 14) -#define IOP13XX_INTERFACE_SEL_PCIX (1 << 15) - -#define IOP13XX_PMON_PMMR_OFFSET 0x0001A000 -#define IOP13XX_PMON_BASE (IOP13XX_PMMR_VIRT_MEM_BASE +\ - IOP13XX_PMON_PMMR_OFFSET) -#define IOP13XX_PMON_PHYSBASE (IOP13XX_PMMR_PHYS_MEM_BASE +\ - IOP13XX_PMON_PMMR_OFFSET) - -#define IOP13XX_PMON_CMD0 (IOP13XX_PMON_BASE + 0x0) -#define IOP13XX_PMON_EVR0 (IOP13XX_PMON_BASE + 0x4) -#define IOP13XX_PMON_STS0 (IOP13XX_PMON_BASE + 0x8) -#define IOP13XX_PMON_DATA0 (IOP13XX_PMON_BASE + 0xC) - -#define IOP13XX_PMON_CMD3 (IOP13XX_PMON_BASE + 0x30) -#define IOP13XX_PMON_EVR3 (IOP13XX_PMON_BASE + 0x34) -#define IOP13XX_PMON_STS3 (IOP13XX_PMON_BASE + 0x38) -#define IOP13XX_PMON_DATA3 (IOP13XX_PMON_BASE + 0x3C) - -#define IOP13XX_PMON_CMD7 (IOP13XX_PMON_BASE + 0x70) -#define IOP13XX_PMON_EVR7 (IOP13XX_PMON_BASE + 0x74) -#define IOP13XX_PMON_STS7 (IOP13XX_PMON_BASE + 0x78) -#define IOP13XX_PMON_DATA7 (IOP13XX_PMON_BASE + 0x7C) - -#define IOP13XX_PMONEN (IOP13XX_PMMR_VIRT_MEM_BASE + 0x4E040) -#define IOP13XX_PMONSTAT (IOP13XX_PMMR_VIRT_MEM_BASE + 0x4E044) - -/*================================ATU===================================*/ -#define IOP13XX_ATUX_OFFSET(ofs) IOP13XX_REG_ADDR32(\ - iop13xx_atux_pmmr_offset + (ofs)) - -#define IOP13XX_ATUX_DID IOP13XX_REG_ADDR16(\ - iop13xx_atux_pmmr_offset + 0x2) - -#define IOP13XX_ATUX_ATUCMD IOP13XX_REG_ADDR16(\ - iop13xx_atux_pmmr_offset + 0x4) -#define IOP13XX_ATUX_ATUSR IOP13XX_REG_ADDR16(\ - iop13xx_atux_pmmr_offset + 0x6) - -#define IOP13XX_ATUX_IABAR0 IOP13XX_ATUX_OFFSET(0x10) -#define IOP13XX_ATUX_IAUBAR0 IOP13XX_ATUX_OFFSET(0x14) -#define IOP13XX_ATUX_IABAR1 IOP13XX_ATUX_OFFSET(0x18) -#define IOP13XX_ATUX_IAUBAR1 IOP13XX_ATUX_OFFSET(0x1c) -#define IOP13XX_ATUX_IABAR2 IOP13XX_ATUX_OFFSET(0x20) -#define IOP13XX_ATUX_IAUBAR2 IOP13XX_ATUX_OFFSET(0x24) -#define IOP13XX_ATUX_IALR0 IOP13XX_ATUX_OFFSET(0x40) -#define IOP13XX_ATUX_IATVR0 IOP13XX_ATUX_OFFSET(0x44) -#define IOP13XX_ATUX_IAUTVR0 IOP13XX_ATUX_OFFSET(0x48) -#define IOP13XX_ATUX_IALR1 IOP13XX_ATUX_OFFSET(0x4c) -#define IOP13XX_ATUX_IATVR1 IOP13XX_ATUX_OFFSET(0x50) -#define IOP13XX_ATUX_IAUTVR1 IOP13XX_ATUX_OFFSET(0x54) -#define IOP13XX_ATUX_IALR2 IOP13XX_ATUX_OFFSET(0x58) -#define IOP13XX_ATUX_IATVR2 IOP13XX_ATUX_OFFSET(0x5c) -#define IOP13XX_ATUX_IAUTVR2 IOP13XX_ATUX_OFFSET(0x60) -#define IOP13XX_ATUX_ATUCR IOP13XX_ATUX_OFFSET(0x70) -#define IOP13XX_ATUX_PCSR IOP13XX_ATUX_OFFSET(0x74) -#define IOP13XX_ATUX_ATUISR IOP13XX_ATUX_OFFSET(0x78) -#define IOP13XX_ATUX_PCIXSR IOP13XX_ATUX_OFFSET(0xD4) -#define IOP13XX_ATUX_IABAR3 IOP13XX_ATUX_OFFSET(0x200) -#define IOP13XX_ATUX_IAUBAR3 IOP13XX_ATUX_OFFSET(0x204) -#define IOP13XX_ATUX_IALR3 IOP13XX_ATUX_OFFSET(0x208) -#define IOP13XX_ATUX_IATVR3 IOP13XX_ATUX_OFFSET(0x20c) -#define IOP13XX_ATUX_IAUTVR3 IOP13XX_ATUX_OFFSET(0x210) - -#define IOP13XX_ATUX_OIOBAR IOP13XX_ATUX_OFFSET(0x300) -#define IOP13XX_ATUX_OIOWTVR IOP13XX_ATUX_OFFSET(0x304) -#define IOP13XX_ATUX_OUMBAR0 IOP13XX_ATUX_OFFSET(0x308) -#define IOP13XX_ATUX_OUMWTVR0 IOP13XX_ATUX_OFFSET(0x30c) -#define IOP13XX_ATUX_OUMBAR1 IOP13XX_ATUX_OFFSET(0x310) -#define IOP13XX_ATUX_OUMWTVR1 IOP13XX_ATUX_OFFSET(0x314) -#define IOP13XX_ATUX_OUMBAR2 IOP13XX_ATUX_OFFSET(0x318) -#define IOP13XX_ATUX_OUMWTVR2 IOP13XX_ATUX_OFFSET(0x31c) -#define IOP13XX_ATUX_OUMBAR3 IOP13XX_ATUX_OFFSET(0x320) -#define IOP13XX_ATUX_OUMWTVR3 IOP13XX_ATUX_OFFSET(0x324) -#define IOP13XX_ATUX_OUDMABAR IOP13XX_ATUX_OFFSET(0x328) -#define IOP13XX_ATUX_OUMSIBAR IOP13XX_ATUX_OFFSET(0x32c) -#define IOP13XX_ATUX_OCCAR IOP13XX_ATUX_OFFSET(0x330) -#define IOP13XX_ATUX_OCCDR IOP13XX_ATUX_OFFSET(0x334) - -#define IOP13XX_ATUX_ATUCR_OUT_EN (1 << 1) -#define IOP13XX_ATUX_PCSR_CENTRAL_RES (1 << 25) -#define IOP13XX_ATUX_PCSR_P_RSTOUT (1 << 21) -#define IOP13XX_ATUX_PCSR_OUT_Q_BUSY (1 << 15) -#define IOP13XX_ATUX_PCSR_IN_Q_BUSY (1 << 14) -#define IOP13XX_ATUX_PCSR_FREQ_OFFSET (16) - -#define IOP13XX_ATUX_STAT_PCI_IFACE_ERR (1 << 18) -#define IOP13XX_ATUX_STAT_VPD_ADDR (1 << 17) -#define IOP13XX_ATUX_STAT_INT_PAR_ERR (1 << 16) -#define IOP13XX_ATUX_STAT_CFG_WRITE (1 << 15) -#define IOP13XX_ATUX_STAT_ERR_COR (1 << 14) -#define IOP13XX_ATUX_STAT_TX_SCEM (1 << 13) -#define IOP13XX_ATUX_STAT_REC_SCEM (1 << 12) -#define IOP13XX_ATUX_STAT_POWER_TRAN (1 << 11) -#define IOP13XX_ATUX_STAT_TX_SERR (1 << 10) -#define IOP13XX_ATUX_STAT_DET_PAR_ERR (1 << 9 ) -#define IOP13XX_ATUX_STAT_BIST (1 << 8 ) -#define IOP13XX_ATUX_STAT_INT_REC_MABORT (1 << 7 ) -#define IOP13XX_ATUX_STAT_REC_SERR (1 << 4 ) -#define IOP13XX_ATUX_STAT_EXT_REC_MABORT (1 << 3 ) -#define IOP13XX_ATUX_STAT_EXT_REC_TABORT (1 << 2 ) -#define IOP13XX_ATUX_STAT_EXT_SIG_TABORT (1 << 1 ) -#define IOP13XX_ATUX_STAT_MASTER_DATA_PAR (1 << 0 ) - -#define IOP13XX_ATUX_PCIXSR_BUS_NUM (8) -#define IOP13XX_ATUX_PCIXSR_DEV_NUM (3) -#define IOP13XX_ATUX_PCIXSR_FUNC_NUM (0) - -#define IOP13XX_ATUX_IALR_DISABLE 0x00000001 -#define IOP13XX_ATUX_OUMBAR_ENABLE 0x80000000 - -#define IOP13XX_ATUE_OFFSET(ofs) IOP13XX_REG_ADDR32(\ - iop13xx_atue_pmmr_offset + (ofs)) - -#define IOP13XX_ATUE_DID IOP13XX_REG_ADDR16(\ - iop13xx_atue_pmmr_offset + 0x2) -#define IOP13XX_ATUE_ATUCMD IOP13XX_REG_ADDR16(\ - iop13xx_atue_pmmr_offset + 0x4) -#define IOP13XX_ATUE_ATUSR IOP13XX_REG_ADDR16(\ - iop13xx_atue_pmmr_offset + 0x6) - -#define IOP13XX_ATUE_IABAR0 IOP13XX_ATUE_OFFSET(0x10) -#define IOP13XX_ATUE_IAUBAR0 IOP13XX_ATUE_OFFSET(0x14) -#define IOP13XX_ATUE_IABAR1 IOP13XX_ATUE_OFFSET(0x18) -#define IOP13XX_ATUE_IAUBAR1 IOP13XX_ATUE_OFFSET(0x1c) -#define IOP13XX_ATUE_IABAR2 IOP13XX_ATUE_OFFSET(0x20) -#define IOP13XX_ATUE_IAUBAR2 IOP13XX_ATUE_OFFSET(0x24) -#define IOP13XX_ATUE_IALR0 IOP13XX_ATUE_OFFSET(0x40) -#define IOP13XX_ATUE_IATVR0 IOP13XX_ATUE_OFFSET(0x44) -#define IOP13XX_ATUE_IAUTVR0 IOP13XX_ATUE_OFFSET(0x48) -#define IOP13XX_ATUE_IALR1 IOP13XX_ATUE_OFFSET(0x4c) -#define IOP13XX_ATUE_IATVR1 IOP13XX_ATUE_OFFSET(0x50) -#define IOP13XX_ATUE_IAUTVR1 IOP13XX_ATUE_OFFSET(0x54) -#define IOP13XX_ATUE_IALR2 IOP13XX_ATUE_OFFSET(0x58) -#define IOP13XX_ATUE_IATVR2 IOP13XX_ATUE_OFFSET(0x5c) -#define IOP13XX_ATUE_IAUTVR2 IOP13XX_ATUE_OFFSET(0x60) -#define IOP13XX_ATUE_PE_LSTS IOP13XX_REG_ADDR16(\ - iop13xx_atue_pmmr_offset + 0xe2) -#define IOP13XX_ATUE_OIOWTVR IOP13XX_ATUE_OFFSET(0x304) -#define IOP13XX_ATUE_OUMBAR0 IOP13XX_ATUE_OFFSET(0x308) -#define IOP13XX_ATUE_OUMWTVR0 IOP13XX_ATUE_OFFSET(0x30c) -#define IOP13XX_ATUE_OUMBAR1 IOP13XX_ATUE_OFFSET(0x310) -#define IOP13XX_ATUE_OUMWTVR1 IOP13XX_ATUE_OFFSET(0x314) -#define IOP13XX_ATUE_OUMBAR2 IOP13XX_ATUE_OFFSET(0x318) -#define IOP13XX_ATUE_OUMWTVR2 IOP13XX_ATUE_OFFSET(0x31c) -#define IOP13XX_ATUE_OUMBAR3 IOP13XX_ATUE_OFFSET(0x320) -#define IOP13XX_ATUE_OUMWTVR3 IOP13XX_ATUE_OFFSET(0x324) - -#define IOP13XX_ATUE_ATUCR IOP13XX_ATUE_OFFSET(0x70) -#define IOP13XX_ATUE_PCSR IOP13XX_ATUE_OFFSET(0x74) -#define IOP13XX_ATUE_ATUISR IOP13XX_ATUE_OFFSET(0x78) -#define IOP13XX_ATUE_OIOBAR IOP13XX_ATUE_OFFSET(0x300) -#define IOP13XX_ATUE_OCCAR IOP13XX_ATUE_OFFSET(0x32c) -#define IOP13XX_ATUE_OCCDR IOP13XX_ATUE_OFFSET(0x330) - -#define IOP13XX_ATUE_PIE_STS IOP13XX_ATUE_OFFSET(0x384) -#define IOP13XX_ATUE_PIE_MSK IOP13XX_ATUE_OFFSET(0x388) - -#define IOP13XX_ATUE_ATUCR_IVM (1 << 6) -#define IOP13XX_ATUE_ATUCR_OUT_EN (1 << 1) -#define IOP13XX_ATUE_OCCAR_BUS_NUM (24) -#define IOP13XX_ATUE_OCCAR_DEV_NUM (19) -#define IOP13XX_ATUE_OCCAR_FUNC_NUM (16) -#define IOP13XX_ATUE_OCCAR_EXT_REG (8) -#define IOP13XX_ATUE_OCCAR_REG (2) - -#define IOP13XX_ATUE_PCSR_BUS_NUM (24) -#define IOP13XX_ATUE_PCSR_DEV_NUM (19) -#define IOP13XX_ATUE_PCSR_FUNC_NUM (16) -#define IOP13XX_ATUE_PCSR_OUT_Q_BUSY (1 << 15) -#define IOP13XX_ATUE_PCSR_IN_Q_BUSY (1 << 14) -#define IOP13XX_ATUE_PCSR_END_POINT (1 << 13) -#define IOP13XX_ATUE_PCSR_LLRB_BUSY (1 << 12) - -#define IOP13XX_ATUE_PCSR_BUS_NUM_MASK (0xff) -#define IOP13XX_ATUE_PCSR_DEV_NUM_MASK (0x1f) -#define IOP13XX_ATUE_PCSR_FUNC_NUM_MASK (0x7) - -#define IOP13XX_ATUE_PCSR_CORE_RESET (8) -#define IOP13XX_ATUE_PCSR_FUNC_NUM (16) - -#define IOP13XX_ATUE_LSTS_TRAINING (1 << 11) -#define IOP13XX_ATUE_STAT_SLOT_PWR_MSG (1 << 28) -#define IOP13XX_ATUE_STAT_PME (1 << 27) -#define IOP13XX_ATUE_STAT_HOT_PLUG_MSG (1 << 26) -#define IOP13XX_ATUE_STAT_IVM (1 << 25) -#define IOP13XX_ATUE_STAT_BIST (1 << 24) -#define IOP13XX_ATUE_STAT_CFG_WRITE (1 << 18) -#define IOP13XX_ATUE_STAT_VPD_ADDR (1 << 17) -#define IOP13XX_ATUE_STAT_POWER_TRAN (1 << 16) -#define IOP13XX_ATUE_STAT_HALT_ON_ERROR (1 << 13) -#define IOP13XX_ATUE_STAT_ROOT_SYS_ERR (1 << 12) -#define IOP13XX_ATUE_STAT_ROOT_ERR_MSG (1 << 11) -#define IOP13XX_ATUE_STAT_PCI_IFACE_ERR (1 << 10) -#define IOP13XX_ATUE_STAT_ERR_COR (1 << 9 ) -#define IOP13XX_ATUE_STAT_ERR_UNCOR (1 << 8 ) -#define IOP13XX_ATUE_STAT_CRS (1 << 7 ) -#define IOP13XX_ATUE_STAT_LNK_DWN (1 << 6 ) -#define IOP13XX_ATUE_STAT_INT_REC_MABORT (1 << 5 ) -#define IOP13XX_ATUE_STAT_DET_PAR_ERR (1 << 4 ) -#define IOP13XX_ATUE_STAT_EXT_REC_MABORT (1 << 3 ) -#define IOP13XX_ATUE_STAT_SIG_TABORT (1 << 2 ) -#define IOP13XX_ATUE_STAT_EXT_REC_TABORT (1 << 1 ) -#define IOP13XX_ATUE_STAT_MASTER_DATA_PAR (1 << 0 ) - -#define IOP13XX_ATUE_ESTAT_REC_UNSUPPORTED_COMP_REQ (1 << 31) -#define IOP13XX_ATUE_ESTAT_REC_COMPLETER_ABORT (1 << 30) -#define IOP13XX_ATUE_ESTAT_TX_POISONED_TLP (1 << 29) -#define IOP13XX_ATUE_ESTAT_TX_PAR_ERR (1 << 28) -#define IOP13XX_ATUE_ESTAT_REC_UNSUPPORTED_REQ (1 << 20) -#define IOP13XX_ATUE_ESTAT_REC_ECRC_ERR (1 << 19) -#define IOP13XX_ATUE_ESTAT_REC_MALFORMED_TLP (1 << 18) -#define IOP13XX_ATUE_ESTAT_TX_RECEIVER_OVERFLOW (1 << 17) -#define IOP13XX_ATUE_ESTAT_REC_UNEXPECTED_COMP (1 << 16) -#define IOP13XX_ATUE_ESTAT_INT_COMP_ABORT (1 << 15) -#define IOP13XX_ATUE_ESTAT_COMP_TIMEOUT (1 << 14) -#define IOP13XX_ATUE_ESTAT_FLOW_CONTROL_ERR (1 << 13) -#define IOP13XX_ATUE_ESTAT_REC_POISONED_TLP (1 << 12) -#define IOP13XX_ATUE_ESTAT_DATA_LNK_ERR (1 << 4 ) -#define IOP13XX_ATUE_ESTAT_TRAINING_ERR (1 << 0 ) - -#define IOP13XX_ATUE_IALR_DISABLE (0x00000001) -#define IOP13XX_ATUE_OUMBAR_ENABLE (0x80000000) -#define IOP13XX_ATU_OUMBAR_FUNC_NUM (28) -#define IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK (0x7) -/*=======================================================================*/ - -/*============================MESSAGING UNIT=============================*/ -#define IOP13XX_MU_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_MU_PMMR_OFFSET +\ - (ofs)) - -#define IOP13XX_MU_IMR0 IOP13XX_MU_OFFSET(0x10) -#define IOP13XX_MU_IMR1 IOP13XX_MU_OFFSET(0x14) -#define IOP13XX_MU_OMR0 IOP13XX_MU_OFFSET(0x18) -#define IOP13XX_MU_OMR1 IOP13XX_MU_OFFSET(0x1C) -#define IOP13XX_MU_IDR IOP13XX_MU_OFFSET(0x20) -#define IOP13XX_MU_IISR IOP13XX_MU_OFFSET(0x24) -#define IOP13XX_MU_IIMR IOP13XX_MU_OFFSET(0x28) -#define IOP13XX_MU_ODR IOP13XX_MU_OFFSET(0x2C) -#define IOP13XX_MU_OISR IOP13XX_MU_OFFSET(0x30) -#define IOP13XX_MU_OIMR IOP13XX_MU_OFFSET(0x34) -#define IOP13XX_MU_IRCSR IOP13XX_MU_OFFSET(0x38) -#define IOP13XX_MU_ORCSR IOP13XX_MU_OFFSET(0x3C) -#define IOP13XX_MU_MIMR IOP13XX_MU_OFFSET(0x48) -#define IOP13XX_MU_MUCR IOP13XX_MU_OFFSET(0x50) -#define IOP13XX_MU_QBAR IOP13XX_MU_OFFSET(0x54) -#define IOP13XX_MU_MUBAR IOP13XX_MU_OFFSET(0x84) - -#define IOP13XX_MU_WINDOW_SIZE (8 * 1024) -#define IOP13XX_MU_BASE_PHYS (0xff000000) -#define IOP13XX_MU_BASE_PCI (0xff000000) -#define IOP13XX_MU_MIMR_PCI (IOP13XX_MU_BASE_PCI + 0x48) -#define IOP13XX_MU_MIMR_CORE_SELECT (15) -/*=======================================================================*/ - -/*==============================ADMA UNITS===============================*/ -#define IOP13XX_ADMA_PHYS_BASE(chan) IOP13XX_REG_ADDR32_PHYS((chan << 9)) -#define IOP13XX_ADMA_UPPER_PA(chan) (IOP13XX_ADMA_PHYS_BASE(chan) + 0xc0) - -/*==============================XSI BRIDGE===============================*/ -#define IOP13XX_XBG_BECSR IOP13XX_REG_ADDR32(0x178c) -#define IOP13XX_XBG_BERAR IOP13XX_REG_ADDR32(0x1790) -#define IOP13XX_XBG_BERUAR IOP13XX_REG_ADDR32(0x1794) -#define is_atue_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \ - IOP13XX_PMMR_VIRT_TO_PHYS(\ - IOP13XX_ATUE_OCCDR))\ - && (__raw_readl(IOP13XX_XBG_BECSR) & 1)) -#define is_atux_occdr_error(x) ((__raw_readl(IOP13XX_XBG_BERAR) == \ - IOP13XX_PMMR_VIRT_TO_PHYS(\ - IOP13XX_ATUX_OCCDR))\ - && (__raw_readl(IOP13XX_XBG_BECSR) & 1)) -/*=======================================================================*/ - -#define IOP13XX_PBI_OFFSET(ofs) IOP13XX_REG_ADDR32(IOP13XX_PBI_PMMR_OFFSET +\ - (ofs)) - -#define IOP13XX_PBI_CR IOP13XX_PBI_OFFSET(0x0) -#define IOP13XX_PBI_SR IOP13XX_PBI_OFFSET(0x4) -#define IOP13XX_PBI_BAR0 IOP13XX_PBI_OFFSET(0x8) -#define IOP13XX_PBI_LR0 IOP13XX_PBI_OFFSET(0xc) -#define IOP13XX_PBI_BAR1 IOP13XX_PBI_OFFSET(0x10) -#define IOP13XX_PBI_LR1 IOP13XX_PBI_OFFSET(0x14) - -#define IOP13XX_PROCESSOR_FREQ IOP13XX_REG_ADDR32(0x2180) - -/* Watchdog timer definitions */ -#define IOP_WDTCR_EN_ARM 0x1e1e1e1e -#define IOP_WDTCR_EN 0xe1e1e1e1 -#define IOP_WDTCR_DIS_ARM 0x1f1f1f1f -#define IOP_WDTCR_DIS 0xf1f1f1f1 -#define IOP_RCSR_WDT (1 << 5) /* reset caused by watchdog timer */ -#define IOP13XX_WDTSR_WRITE_EN (1 << 31) /* used to speed up reset requests */ -#define IOP13XX_WDTCR_IB_RESET (1 << 0) - -#endif /* _IOP13XX_HW_H_ */ diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h deleted file mode 100644 index ba2cf93..0000000 --- a/include/asm-arm/arch-iop13xx/iq81340.h +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef _IQ81340_H_ -#define _IQ81340_H_ - -#define IQ81340_PCE_BAR0 IOP13XX_PBI_LOWER_MEM_RA -#define IQ81340_PCE_BAR1 (IQ81340_PCE_BAR0 + 0x02000000) - -#define IQ81340_FLASHBASE IQ81340_PCE_BAR0 /* Flash */ - -#define IQ81340_PCE_BAR1_OFFSET(a) (IQ81340_PCE_BAR1 + (a)) - -#define IQ81340_PRD_CODE IQ81340_PCE_BAR1_OFFSET(0) -#define IQ81340_BRD_STEP IQ81340_PCE_BAR1_OFFSET(0x10000) -#define IQ81340_CPLD_REV IQ81340_PCE_BAR1_OFFSET(0x20000) -#define IQ81340_LED IQ81340_PCE_BAR1_OFFSET(0x30000) -#define IQ81340_LHEX IQ81340_PCE_BAR1_OFFSET(0x40000) -#define IQ81340_RHEX IQ81340_PCE_BAR1_OFFSET(0x50000) -#define IQ81340_BUZZER IQ81340_PCE_BAR1_OFFSET(0x60000) -#define IQ81340_32K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x70000) -#define IQ81340_256K_NVRAM IQ81340_PCE_BAR1_OFFSET(0x80000) -#define IQ81340_ROTARY_SW IQ81340_PCE_BAR1_OFFSET(0xd0000) -#define IQ81340_BATT_STAT IQ81340_PCE_BAR1_OFFSET(0xf0000) -#define IQ81340_CMP_FLSH IQ81340_PCE_BAR1_OFFSET(0x1000000) /* 16MB */ - -#define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) -#define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) - - -#endif /* _IQ81340_H_ */ diff --git a/include/asm-arm/arch-iop13xx/irqs.h b/include/asm-arm/arch-iop13xx/irqs.h deleted file mode 100644 index 054e7ac..0000000 --- a/include/asm-arm/arch-iop13xx/irqs.h +++ /dev/null @@ -1,196 +0,0 @@ -#ifndef _IOP13XX_IRQS_H_ -#define _IOP13XX_IRQS_H_ - -#ifndef __ASSEMBLER__ -#include - -/* INTPND0 CP6 R0 Page 3 - */ -static inline u32 read_intpnd_0(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c0, c3, 0":"=r" (val)); - return val; -} - -/* INTPND1 CP6 R1 Page 3 - */ -static inline u32 read_intpnd_1(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c1, c3, 0":"=r" (val)); - return val; -} - -/* INTPND2 CP6 R2 Page 3 - */ -static inline u32 read_intpnd_2(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c2, c3, 0":"=r" (val)); - return val; -} - -/* INTPND3 CP6 R3 Page 3 - */ -static inline u32 read_intpnd_3(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c3, c3, 0":"=r" (val)); - return val; -} -#endif - -#define INTBASE 0 -#define INTSIZE_4 1 - -/* - * iop34x chipset interrupts - */ -#define IOP13XX_IRQ(x) (IOP13XX_IRQ_OFS + (x)) - -/* - * On IRQ or FIQ register - */ -#define IRQ_IOP13XX_ADMA0_EOT (0) -#define IRQ_IOP13XX_ADMA0_EOC (1) -#define IRQ_IOP13XX_ADMA1_EOT (2) -#define IRQ_IOP13XX_ADMA1_EOC (3) -#define IRQ_IOP13XX_ADMA2_EOT (4) -#define IRQ_IOP13XX_ADMA2_EOC (5) -#define IRQ_IOP134_WATCHDOG (6) -#define IRQ_IOP13XX_RSVD_7 (7) -#define IRQ_IOP13XX_TIMER0 (8) -#define IRQ_IOP13XX_TIMER1 (9) -#define IRQ_IOP13XX_I2C_0 (10) -#define IRQ_IOP13XX_I2C_1 (11) -#define IRQ_IOP13XX_MSG (12) -#define IRQ_IOP13XX_MSGIBQ (13) -#define IRQ_IOP13XX_ATU_IM (14) -#define IRQ_IOP13XX_ATU_BIST (15) -#define IRQ_IOP13XX_PPMU (16) -#define IRQ_IOP13XX_COREPMU (17) -#define IRQ_IOP13XX_CORECACHE (18) -#define IRQ_IOP13XX_RSVD_19 (19) -#define IRQ_IOP13XX_RSVD_20 (20) -#define IRQ_IOP13XX_RSVD_21 (21) -#define IRQ_IOP13XX_RSVD_22 (22) -#define IRQ_IOP13XX_RSVD_23 (23) -#define IRQ_IOP13XX_XINT0 (24) -#define IRQ_IOP13XX_XINT1 (25) -#define IRQ_IOP13XX_XINT2 (26) -#define IRQ_IOP13XX_XINT3 (27) -#define IRQ_IOP13XX_XINT4 (28) -#define IRQ_IOP13XX_XINT5 (29) -#define IRQ_IOP13XX_XINT6 (30) -#define IRQ_IOP13XX_XINT7 (31) - /* IINTSRC1 bit */ -#define IRQ_IOP13XX_XINT8 (32) /* 0 */ -#define IRQ_IOP13XX_XINT9 (33) /* 1 */ -#define IRQ_IOP13XX_XINT10 (34) /* 2 */ -#define IRQ_IOP13XX_XINT11 (35) /* 3 */ -#define IRQ_IOP13XX_XINT12 (36) /* 4 */ -#define IRQ_IOP13XX_XINT13 (37) /* 5 */ -#define IRQ_IOP13XX_XINT14 (38) /* 6 */ -#define IRQ_IOP13XX_XINT15 (39) /* 7 */ -#define IRQ_IOP13XX_RSVD_40 (40) /* 8 */ -#define IRQ_IOP13XX_RSVD_41 (41) /* 9 */ -#define IRQ_IOP13XX_RSVD_42 (42) /* 10 */ -#define IRQ_IOP13XX_RSVD_43 (43) /* 11 */ -#define IRQ_IOP13XX_RSVD_44 (44) /* 12 */ -#define IRQ_IOP13XX_RSVD_45 (45) /* 13 */ -#define IRQ_IOP13XX_RSVD_46 (46) /* 14 */ -#define IRQ_IOP13XX_RSVD_47 (47) /* 15 */ -#define IRQ_IOP13XX_RSVD_48 (48) /* 16 */ -#define IRQ_IOP13XX_RSVD_49 (49) /* 17 */ -#define IRQ_IOP13XX_RSVD_50 (50) /* 18 */ -#define IRQ_IOP13XX_UART0 (51) /* 19 */ -#define IRQ_IOP13XX_UART1 (52) /* 20 */ -#define IRQ_IOP13XX_PBIE (53) /* 21 */ -#define IRQ_IOP13XX_ATU_CRW (54) /* 22 */ -#define IRQ_IOP13XX_ATU_ERR (55) /* 23 */ -#define IRQ_IOP13XX_MCU_ERR (56) /* 24 */ -#define IRQ_IOP13XX_ADMA0_ERR (57) /* 25 */ -#define IRQ_IOP13XX_ADMA1_ERR (58) /* 26 */ -#define IRQ_IOP13XX_ADMA2_ERR (59) /* 27 */ -#define IRQ_IOP13XX_RSVD_60 (60) /* 28 */ -#define IRQ_IOP13XX_RSVD_61 (61) /* 29 */ -#define IRQ_IOP13XX_MSG_ERR (62) /* 30 */ -#define IRQ_IOP13XX_RSVD_63 (63) /* 31 */ - /* IINTSRC2 bit */ -#define IRQ_IOP13XX_INTERPROC (64) /* 0 */ -#define IRQ_IOP13XX_RSVD_65 (65) /* 1 */ -#define IRQ_IOP13XX_RSVD_66 (66) /* 2 */ -#define IRQ_IOP13XX_RSVD_67 (67) /* 3 */ -#define IRQ_IOP13XX_RSVD_68 (68) /* 4 */ -#define IRQ_IOP13XX_RSVD_69 (69) /* 5 */ -#define IRQ_IOP13XX_RSVD_70 (70) /* 6 */ -#define IRQ_IOP13XX_RSVD_71 (71) /* 7 */ -#define IRQ_IOP13XX_RSVD_72 (72) /* 8 */ -#define IRQ_IOP13XX_RSVD_73 (73) /* 9 */ -#define IRQ_IOP13XX_RSVD_74 (74) /* 10 */ -#define IRQ_IOP13XX_RSVD_75 (75) /* 11 */ -#define IRQ_IOP13XX_RSVD_76 (76) /* 12 */ -#define IRQ_IOP13XX_RSVD_77 (77) /* 13 */ -#define IRQ_IOP13XX_RSVD_78 (78) /* 14 */ -#define IRQ_IOP13XX_RSVD_79 (79) /* 15 */ -#define IRQ_IOP13XX_RSVD_80 (80) /* 16 */ -#define IRQ_IOP13XX_RSVD_81 (81) /* 17 */ -#define IRQ_IOP13XX_RSVD_82 (82) /* 18 */ -#define IRQ_IOP13XX_RSVD_83 (83) /* 19 */ -#define IRQ_IOP13XX_RSVD_84 (84) /* 20 */ -#define IRQ_IOP13XX_RSVD_85 (85) /* 21 */ -#define IRQ_IOP13XX_RSVD_86 (86) /* 22 */ -#define IRQ_IOP13XX_RSVD_87 (87) /* 23 */ -#define IRQ_IOP13XX_RSVD_88 (88) /* 24 */ -#define IRQ_IOP13XX_RSVD_89 (89) /* 25 */ -#define IRQ_IOP13XX_RSVD_90 (90) /* 26 */ -#define IRQ_IOP13XX_RSVD_91 (91) /* 27 */ -#define IRQ_IOP13XX_RSVD_92 (92) /* 28 */ -#define IRQ_IOP13XX_RSVD_93 (93) /* 29 */ -#define IRQ_IOP13XX_SIB_ERR (94) /* 30 */ -#define IRQ_IOP13XX_SRAM_ERR (95) /* 31 */ - /* IINTSRC3 bit */ -#define IRQ_IOP13XX_I2C_2 (96) /* 0 */ -#define IRQ_IOP13XX_ATUE_BIST (97) /* 1 */ -#define IRQ_IOP13XX_ATUE_CRW (98) /* 2 */ -#define IRQ_IOP13XX_ATUE_ERR (99) /* 3 */ -#define IRQ_IOP13XX_IMU (100) /* 4 */ -#define IRQ_IOP13XX_RSVD_101 (101) /* 5 */ -#define IRQ_IOP13XX_RSVD_102 (102) /* 6 */ -#define IRQ_IOP13XX_TPMI0_OUT (103) /* 7 */ -#define IRQ_IOP13XX_TPMI1_OUT (104) /* 8 */ -#define IRQ_IOP13XX_TPMI2_OUT (105) /* 9 */ -#define IRQ_IOP13XX_TPMI3_OUT (106) /* 10 */ -#define IRQ_IOP13XX_ATUE_IMA (107) /* 11 */ -#define IRQ_IOP13XX_ATUE_IMB (108) /* 12 */ -#define IRQ_IOP13XX_ATUE_IMC (109) /* 13 */ -#define IRQ_IOP13XX_ATUE_IMD (110) /* 14 */ -#define IRQ_IOP13XX_MU_MSI_TB (111) /* 15 */ -#define IRQ_IOP13XX_RSVD_112 (112) /* 16 */ -#define IRQ_IOP13XX_INBD_MSI (113) /* 17 */ -#define IRQ_IOP13XX_RSVD_114 (114) /* 18 */ -#define IRQ_IOP13XX_RSVD_115 (115) /* 19 */ -#define IRQ_IOP13XX_RSVD_116 (116) /* 20 */ -#define IRQ_IOP13XX_RSVD_117 (117) /* 21 */ -#define IRQ_IOP13XX_RSVD_118 (118) /* 22 */ -#define IRQ_IOP13XX_RSVD_119 (119) /* 23 */ -#define IRQ_IOP13XX_RSVD_120 (120) /* 24 */ -#define IRQ_IOP13XX_RSVD_121 (121) /* 25 */ -#define IRQ_IOP13XX_RSVD_122 (122) /* 26 */ -#define IRQ_IOP13XX_RSVD_123 (123) /* 27 */ -#define IRQ_IOP13XX_RSVD_124 (124) /* 28 */ -#define IRQ_IOP13XX_RSVD_125 (125) /* 29 */ -#define IRQ_IOP13XX_RSVD_126 (126) /* 30 */ -#define IRQ_IOP13XX_HPI (127) /* 31 */ - -#ifdef CONFIG_PCI_MSI -#define IRQ_IOP13XX_MSI_0 (IRQ_IOP13XX_HPI + 1) -#define NR_IOP13XX_IRQS (IRQ_IOP13XX_MSI_0 + 128) -#else -#define NR_IOP13XX_IRQS (IRQ_IOP13XX_HPI + 1) -#endif - -#define NR_IRQS NR_IOP13XX_IRQS - -#endif /* _IOP13XX_IRQ_H_ */ diff --git a/include/asm-arm/arch-iop13xx/memory.h b/include/asm-arm/arch-iop13xx/memory.h deleted file mode 100644 index 031a0fa..0000000 --- a/include/asm-arm/arch-iop13xx/memory.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) -#define TASK_SIZE UL(0x3f000000) -#define PAGE_OFFSET UL(0x40000000) -#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3) - -#ifndef __ASSEMBLY__ - -#if defined(CONFIG_ARCH_IOP13XX) -#define IOP13XX_PMMR_V_START (IOP13XX_PMMR_VIRT_MEM_BASE) -#define IOP13XX_PMMR_V_END (IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_SIZE) -#define IOP13XX_PMMR_P_START (IOP13XX_PMMR_PHYS_MEM_BASE) -#define IOP13XX_PMMR_P_END (IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_SIZE) - -/* - * Virtual view <-> PCI DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ - -/* RAM has 1:1 mapping on the PCIe/x Busses */ -#define __virt_to_bus(x) (__virt_to_phys(x)) -#define __bus_to_virt(x) (__phys_to_virt(x)) - -#define virt_to_lbus(x) \ -(( ((void*)(x) >= (void*)IOP13XX_PMMR_V_START) && \ -((void*)(x) < (void*)IOP13XX_PMMR_V_END) ) ? \ -((x) - IOP13XX_PMMR_VIRT_MEM_BASE + IOP13XX_PMMR_PHYS_MEM_BASE) : \ -((x) - PAGE_OFFSET + PHYS_OFFSET)) - -#define lbus_to_virt(x) \ -(( ((x) >= IOP13XX_PMMR_P_START) && ((x) < IOP13XX_PMMR_P_END) ) ? \ -((x) - IOP13XX_PMMR_PHYS_MEM_BASE + IOP13XX_PMMR_VIRT_MEM_BASE ) : \ -((x) - PHYS_OFFSET + PAGE_OFFSET)) - -/* Device is an lbus device if it is on the platform bus of the IOP13XX */ -#define is_lbus_device(dev) (dev &&\ - (strncmp(dev->bus->name, "platform", 8) == 0)) - -#define __arch_page_to_dma(dev, page) \ -({is_lbus_device(dev) ? (dma_addr_t)virt_to_lbus(page_address(page)) : \ -(dma_addr_t)__virt_to_bus(page_address(page));}) - -#define __arch_dma_to_virt(dev, addr) \ -({is_lbus_device(dev) ? lbus_to_virt(addr) : __bus_to_virt(addr);}) - -#define __arch_virt_to_dma(dev, addr) \ -({is_lbus_device(dev) ? virt_to_lbus(addr) : __virt_to_bus(addr);}) - -#endif /* CONFIG_ARCH_IOP13XX */ -#endif /* !ASSEMBLY */ - -#define PFN_TO_NID(addr) (0) - -#endif diff --git a/include/asm-arm/arch-iop13xx/msi.h b/include/asm-arm/arch-iop13xx/msi.h deleted file mode 100644 index b80c5ae..0000000 --- a/include/asm-arm/arch-iop13xx/msi.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef _IOP13XX_MSI_H_ -#define _IOP13XX_MSI_H_ -#ifdef CONFIG_PCI_MSI -void iop13xx_msi_init(void); -#else -static inline void iop13xx_msi_init(void) -{ - return; -} -#endif -#endif diff --git a/include/asm-arm/arch-iop13xx/pci.h b/include/asm-arm/arch-iop13xx/pci.h deleted file mode 100644 index 4041f30..0000000 --- a/include/asm-arm/arch-iop13xx/pci.h +++ /dev/null @@ -1,57 +0,0 @@ -#ifndef _IOP13XX_PCI_H_ -#define _IOP13XX_PCI_H_ -#include -#include - -struct pci_sys_data; -struct hw_pci; -int iop13xx_pci_setup(int nr, struct pci_sys_data *sys); -struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *); -void iop13xx_atu_select(struct hw_pci *plat_pci); -void iop13xx_pci_init(void); -void iop13xx_map_pci_memory(void); - -#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY | \ - PCI_STATUS_SIG_TARGET_ABORT | \ - PCI_STATUS_REC_TARGET_ABORT | \ - PCI_STATUS_REC_TARGET_ABORT | \ - PCI_STATUS_REC_MASTER_ABORT | \ - PCI_STATUS_SIG_SYSTEM_ERROR | \ - PCI_STATUS_DETECTED_PARITY) - -#define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR | \ - IOP13XX_ATUE_STAT_ROOT_SYS_ERR | \ - IOP13XX_ATUE_STAT_PCI_IFACE_ERR | \ - IOP13XX_ATUE_STAT_ERR_COR | \ - IOP13XX_ATUE_STAT_ERR_UNCOR | \ - IOP13XX_ATUE_STAT_CRS | \ - IOP13XX_ATUE_STAT_DET_PAR_ERR | \ - IOP13XX_ATUE_STAT_EXT_REC_MABORT | \ - IOP13XX_ATUE_STAT_SIG_TABORT | \ - IOP13XX_ATUE_STAT_EXT_REC_TABORT | \ - IOP13XX_ATUE_STAT_MASTER_DATA_PAR) - -#define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM | \ - IOP13XX_ATUX_STAT_REC_SCEM | \ - IOP13XX_ATUX_STAT_TX_SERR | \ - IOP13XX_ATUX_STAT_DET_PAR_ERR | \ - IOP13XX_ATUX_STAT_INT_REC_MABORT | \ - IOP13XX_ATUX_STAT_REC_SERR | \ - IOP13XX_ATUX_STAT_EXT_REC_MABORT | \ - IOP13XX_ATUX_STAT_EXT_REC_TABORT | \ - IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \ - IOP13XX_ATUX_STAT_MASTER_DATA_PAR) - -/* PCI interrupts - */ -#define ATUX_INTA IRQ_IOP13XX_XINT0 -#define ATUX_INTB IRQ_IOP13XX_XINT1 -#define ATUX_INTC IRQ_IOP13XX_XINT2 -#define ATUX_INTD IRQ_IOP13XX_XINT3 - -#define ATUE_INTA IRQ_IOP13XX_ATUE_IMA -#define ATUE_INTB IRQ_IOP13XX_ATUE_IMB -#define ATUE_INTC IRQ_IOP13XX_ATUE_IMC -#define ATUE_INTD IRQ_IOP13XX_ATUE_IMD - -#endif /* _IOP13XX_PCI_H_ */ diff --git a/include/asm-arm/arch-iop13xx/system.h b/include/asm-arm/arch-iop13xx/system.h deleted file mode 100644 index 8575af8..0000000 --- a/include/asm-arm/arch-iop13xx/system.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * linux/include/asm-arm/arch-iop13xx/system.h - * - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * Reset the internal bus (warning both cores are reset) - */ - write_wdtcr(IOP_WDTCR_EN_ARM); - write_wdtcr(IOP_WDTCR_EN); - write_wdtsr(IOP13XX_WDTSR_WRITE_EN | IOP13XX_WDTCR_IB_RESET); - write_wdtcr(0x1000); - - for(;;); -} diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h deleted file mode 100644 index 49213d9..0000000 --- a/include/asm-arm/arch-iop13xx/time.h +++ /dev/null @@ -1,107 +0,0 @@ -#ifndef _IOP13XX_TIME_H_ -#define _IOP13XX_TIME_H_ -#define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0 - -#define IOP_TMR_EN 0x02 -#define IOP_TMR_RELOAD 0x04 -#define IOP_TMR_PRIVILEGED 0x08 -#define IOP_TMR_RATIO_1_1 0x00 - -#define IOP13XX_XSI_FREQ_RATIO_MASK (3 << 19) -#define IOP13XX_XSI_FREQ_RATIO_2 (0 << 19) -#define IOP13XX_XSI_FREQ_RATIO_3 (1 << 19) -#define IOP13XX_XSI_FREQ_RATIO_4 (2 << 19) -#define IOP13XX_CORE_FREQ_MASK (7 << 16) -#define IOP13XX_CORE_FREQ_600 (0 << 16) -#define IOP13XX_CORE_FREQ_667 (1 << 16) -#define IOP13XX_CORE_FREQ_800 (2 << 16) -#define IOP13XX_CORE_FREQ_933 (3 << 16) -#define IOP13XX_CORE_FREQ_1000 (4 << 16) -#define IOP13XX_CORE_FREQ_1200 (5 << 16) - -void iop_init_time(unsigned long tickrate); -unsigned long iop_gettimeoffset(void); - -static inline unsigned long iop13xx_core_freq(void) -{ - unsigned long freq = __raw_readl(IOP13XX_PROCESSOR_FREQ); - freq &= IOP13XX_CORE_FREQ_MASK; - switch (freq) { - case IOP13XX_CORE_FREQ_600: - return 600000000; - case IOP13XX_CORE_FREQ_667: - return 667000000; - case IOP13XX_CORE_FREQ_800: - return 800000000; - case IOP13XX_CORE_FREQ_933: - return 933000000; - case IOP13XX_CORE_FREQ_1000: - return 1000000000; - case IOP13XX_CORE_FREQ_1200: - return 1200000000; - default: - printk("%s: warning unknown frequency, defaulting to 800Mhz\n", - __FUNCTION__); - } - - return 800000000; -} - -static inline unsigned long iop13xx_xsi_bus_ratio(void) -{ - unsigned long ratio = __raw_readl(IOP13XX_PROCESSOR_FREQ); - ratio &= IOP13XX_XSI_FREQ_RATIO_MASK; - switch (ratio) { - case IOP13XX_XSI_FREQ_RATIO_2: - return 2; - case IOP13XX_XSI_FREQ_RATIO_3: - return 3; - case IOP13XX_XSI_FREQ_RATIO_4: - return 4; - default: - printk("%s: warning unknown ratio, defaulting to 2\n", - __FUNCTION__); - } - - return 2; -} - -static inline void write_tmr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val)); -} - -static inline void write_tmr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val)); -} - -static inline u32 read_tcr0(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val)); - return val; -} - -static inline u32 read_tcr1(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val)); - return val; -} - -static inline void write_trr0(u32 val) -{ - asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val)); -} - -static inline void write_trr1(u32 val) -{ - asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val)); -} - -static inline void write_tisr(u32 val) -{ - asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val)); -} -#endif diff --git a/include/asm-arm/arch-iop13xx/timex.h b/include/asm-arm/arch-iop13xx/timex.h deleted file mode 100644 index 47564ec..0000000 --- a/include/asm-arm/arch-iop13xx/timex.h +++ /dev/null @@ -1,3 +0,0 @@ -#include - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop13xx/uncompress.h b/include/asm-arm/arch-iop13xx/uncompress.h deleted file mode 100644 index 5d4418d..0000000 --- a/include/asm-arm/arch-iop13xx/uncompress.h +++ /dev/null @@ -1,23 +0,0 @@ -#include -#include -#include - -#define UART_BASE ((volatile u32 *)IOP13XX_UART1_PHYS) -#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) - -static inline void putc(char c) -{ - while ((UART_BASE[UART_LSR] & TX_DONE) != TX_DONE) - barrier(); - UART_BASE[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-iop13xx/vmalloc.h b/include/asm-arm/arch-iop13xx/vmalloc.h deleted file mode 100644 index c534567..0000000 --- a/include/asm-arm/arch-iop13xx/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _VMALLOC_H_ -#define _VMALLOC_H_ -#define VMALLOC_END 0xfa000000UL -#endif diff --git a/include/asm-arm/arch-iop32x/adma.h b/include/asm-arm/arch-iop32x/adma.h deleted file mode 100644 index 5ed9203..0000000 --- a/include/asm-arm/arch-iop32x/adma.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef IOP32X_ADMA_H -#define IOP32X_ADMA_H -#include -#endif - diff --git a/include/asm-arm/arch-iop32x/debug-macro.S b/include/asm-arm/arch-iop32x/debug-macro.S deleted file mode 100644 index 9022b68..0000000 --- a/include/asm-arm/arch-iop32x/debug-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - .macro addruart, rx - mov \rx, #0xfe000000 @ physical as well as virtual - orr \rx, \rx, #0x00800000 @ location of the UART - .endm - -#define UART_SHIFT 0 -#include diff --git a/include/asm-arm/arch-iop32x/dma.h b/include/asm-arm/arch-iop32x/dma.h deleted file mode 100644 index e977a9e..0000000 --- a/include/asm-arm/arch-iop32x/dma.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/dma.h - * - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S deleted file mode 100644 index 207db99..0000000 --- a/include/asm-arm/arch-iop32x/entry-macro.S +++ /dev/null @@ -1,36 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/entry-macro.S - * - * Low-level IRQ helper macros for IOP32x-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c15, c1, 0 - orr \tmp, \tmp, #(1 << 6) - mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access - mrc p15, 0, \tmp, c15, c1, 0 - mov \tmp, \tmp - sub pc, pc, #4 @ cp_wait - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC - cmp \irqstat, #0 - clzne \irqnr, \irqstat - rsbne \irqnr, \irqnr, #31 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - mrc p15, 0, \tmp1, c15, c1, 0 - ands \tmp2, \tmp1, #(1 << 6) - bicne \tmp1, \tmp1, #(1 << 6) - mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access - .endm diff --git a/include/asm-arm/arch-iop32x/glantank.h b/include/asm-arm/arch-iop32x/glantank.h deleted file mode 100644 index bf0665a..0000000 --- a/include/asm-arm/arch-iop32x/glantank.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/glantank.h - * - * IO-Data GLAN Tank board registers - */ - -#ifndef __GLANTANK_H -#define __GLANTANK_H - -#define GLANTANK_UART 0xfe800000 /* UART */ - - -#endif diff --git a/include/asm-arm/arch-iop32x/gpio.h b/include/asm-arm/arch-iop32x/gpio.h deleted file mode 100644 index 708f4ec..0000000 --- a/include/asm-arm/arch-iop32x/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_IOP32X_GPIO_H -#define __ASM_ARCH_IOP32X_GPIO_H - -#include - -#endif diff --git a/include/asm-arm/arch-iop32x/hardware.h b/include/asm-arm/arch-iop32x/hardware.h deleted file mode 100644 index 6556ed5..0000000 --- a/include/asm-arm/arch-iop32x/hardware.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/hardware.h - */ - -#ifndef __HARDWARE_H -#define __HARDWARE_H - -#include - -/* - * Note about PCI IO space mappings - * - * To make IO space accesses efficient, we store virtual addresses in - * the IO resources. - * - * The PCI IO space is located at virtual 0xfe000000 from physical - * 0x90000000. The PCI BARs must be programmed with physical addresses, - * but when we read them, we convert them to virtual addresses. See - * arch/arm/plat-iop/pci.c. - */ -#define pcibios_assign_all_busses() 1 -#define PCIBIOS_MIN_IO 0x00000000 -#define PCIBIOS_MIN_MEM 0x00000000 - -#ifndef __ASSEMBLY__ -void iop32x_init_irq(void); -#endif - - -/* - * Generic chipset bits - */ -#include "iop32x.h" - -/* - * Board specific bits - */ -#include "glantank.h" -#include "iq80321.h" -#include "iq31244.h" -#include "n2100.h" - - -#endif diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h deleted file mode 100644 index 47b2736..0000000 --- a/include/asm-arm/arch-iop32x/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/io.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IO_H -#define __IO_H - -#include - -extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop3xx_iounmap(void __iomem *addr); - -#define IO_SPACE_LIMIT 0xffffffff -#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) -#define __mem_pci(a) (a) - -#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f) -#define __arch_iounmap(a) __iop3xx_iounmap(a) - -#endif diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h deleted file mode 100644 index 0d8af57..0000000 --- a/include/asm-arm/arch-iop32x/iop32x.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/iop32x.h - * - * Intel IOP32X Chip definitions - * - * Author: Rory Bolt - * Copyright (C) 2002 Rory Bolt - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IOP32X_H -#define __IOP32X_H - -/* - * Peripherals that are shared between the iop32x and iop33x but - * located at different addresses. - */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg)) -#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) - -#include - -/* ATU Parameters - * set up a 1:1 bus to physical ram relationship - * w/ physical ram on top of pci in the memory map - */ -#define IOP32X_MAX_RAM_SIZE 0x40000000UL -#define IOP3XX_MAX_RAM_SIZE IOP32X_MAX_RAM_SIZE -#define IOP3XX_PCI_LOWER_MEM_BA 0x80000000 -#define IOP32X_PCI_MEM_WINDOW_SIZE 0x04000000 -#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP32X_PCI_MEM_WINDOW_SIZE - -#endif diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h deleted file mode 100644 index fff4eaf..0000000 --- a/include/asm-arm/arch-iop32x/iq31244.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/iq31244.h - * - * Intel IQ31244 evaluation board registers - */ - -#ifndef __IQ31244_H -#define __IQ31244_H - -#define IQ31244_UART 0xfe800000 /* UART #1 */ -#define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ31244_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ31244_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h deleted file mode 100644 index eb69db9..0000000 --- a/include/asm-arm/arch-iop32x/iq80321.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/iq80321.h - * - * Intel IQ80321 evaluation board registers - */ - -#ifndef __IQ80321_H -#define __IQ80321_H - -#define IQ80321_UART 0xfe800000 /* UART #1 */ -#define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ -#define IQ80321_7SEG_0 0xfe850000 /* 7-Segment LSB (WO) */ -#define IQ80321_ROTARY_SW 0xfe8d0000 /* Rotary Switch */ -#define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ - - -#endif diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h deleted file mode 100644 index bbaef87..0000000 --- a/include/asm-arm/arch-iop32x/irqs.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/irqs.h - * - * Author: Rory Bolt - * Copyright: (C) 2002 Rory Bolt - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IRQS_H -#define __IRQS_H - -/* - * IOP80321 chipset interrupts - */ -#define IRQ_IOP32X_DMA0_EOT 0 -#define IRQ_IOP32X_DMA0_EOC 1 -#define IRQ_IOP32X_DMA1_EOT 2 -#define IRQ_IOP32X_DMA1_EOC 3 -#define IRQ_IOP32X_AA_EOT 6 -#define IRQ_IOP32X_AA_EOC 7 -#define IRQ_IOP32X_CORE_PMON 8 -#define IRQ_IOP32X_TIMER0 9 -#define IRQ_IOP32X_TIMER1 10 -#define IRQ_IOP32X_I2C_0 11 -#define IRQ_IOP32X_I2C_1 12 -#define IRQ_IOP32X_MESSAGING 13 -#define IRQ_IOP32X_ATU_BIST 14 -#define IRQ_IOP32X_PERFMON 15 -#define IRQ_IOP32X_CORE_PMU 16 -#define IRQ_IOP32X_BIU_ERR 17 -#define IRQ_IOP32X_ATU_ERR 18 -#define IRQ_IOP32X_MCU_ERR 19 -#define IRQ_IOP32X_DMA0_ERR 20 -#define IRQ_IOP32X_DMA1_ERR 21 -#define IRQ_IOP32X_AA_ERR 23 -#define IRQ_IOP32X_MSG_ERR 24 -#define IRQ_IOP32X_SSP 25 -#define IRQ_IOP32X_XINT0 27 -#define IRQ_IOP32X_XINT1 28 -#define IRQ_IOP32X_XINT2 29 -#define IRQ_IOP32X_XINT3 30 -#define IRQ_IOP32X_HPI 31 - -#define NR_IRQS 32 - - -#endif diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h deleted file mode 100644 index bdcf038..0000000 --- a/include/asm-arm/arch-iop32x/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/memory.h - */ - -#ifndef __MEMORY_H -#define __MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0xa0000000) - -/* - * Virtual view <-> PCI DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) (__virt_to_phys(x)) -#define __bus_to_virt(x) (__phys_to_virt(x)) - - -#endif diff --git a/include/asm-arm/arch-iop32x/n2100.h b/include/asm-arm/arch-iop32x/n2100.h deleted file mode 100644 index 77a8af4..0000000 --- a/include/asm-arm/arch-iop32x/n2100.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/n2100.h - * - * Thecus N2100 board registers - */ - -#ifndef __N2100_H -#define __N2100_H - -#define N2100_UART 0xfe800000 /* UART */ - -#define N2100_COPY_BUTTON IOP3XX_GPIO_LINE(0) -#define N2100_PCA9532_RESET IOP3XX_GPIO_LINE(2) -#define N2100_RESET_BUTTON IOP3XX_GPIO_LINE(3) -#define N2100_HARDWARE_RESET IOP3XX_GPIO_LINE(4) -#define N2100_POWER_BUTTON IOP3XX_GPIO_LINE(5) - - -#endif diff --git a/include/asm-arm/arch-iop32x/system.h b/include/asm-arm/arch-iop32x/system.h deleted file mode 100644 index 17b7eb7..0000000 --- a/include/asm-arm/arch-iop32x/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/system.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - local_irq_disable(); - - if (machine_is_n2100()) { - gpio_line_set(N2100_HARDWARE_RESET, GPIO_LOW); - gpio_line_config(N2100_HARDWARE_RESET, GPIO_OUT); - while (1) - ; - } - - *IOP3XX_PCSR = 0x30; - - /* Jump into ROM at address 0 */ - cpu_reset(0); -} diff --git a/include/asm-arm/arch-iop32x/time.h b/include/asm-arm/arch-iop32x/time.h deleted file mode 100644 index 0f28c99..0000000 --- a/include/asm-arm/arch-iop32x/time.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _IOP32X_TIME_H_ -#define _IOP32X_TIME_H_ -#define IRQ_IOP_TIMER0 IRQ_IOP32X_TIMER0 -#endif diff --git a/include/asm-arm/arch-iop32x/timex.h b/include/asm-arm/arch-iop32x/timex.h deleted file mode 100644 index 4457046..0000000 --- a/include/asm-arm/arch-iop32x/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/timex.h - * - * IOP32x architecture timex specifications - */ - -#include - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop32x/uncompress.h b/include/asm-arm/arch-iop32x/uncompress.h deleted file mode 100644 index 0702878..0000000 --- a/include/asm-arm/arch-iop32x/uncompress.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/uncompress.h - */ - -#include -#include -#include -#include - -static volatile u8 *uart_base; - -#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) - -static inline void putc(char c) -{ - while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) - barrier(); - uart_base[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -static __inline__ void __arch_decomp_setup(unsigned long arch_id) -{ - if (machine_is_iq80321()) - uart_base = (volatile u8 *)IQ80321_UART; - else if (machine_is_iq31244() || machine_is_em7210()) - uart_base = (volatile u8 *)IQ31244_UART; - else - uart_base = (volatile u8 *)0xfe800000; -} - -/* - * nothing to do - */ -#define arch_decomp_setup() __arch_decomp_setup(arch_id) -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-iop32x/vmalloc.h b/include/asm-arm/arch-iop32x/vmalloc.h deleted file mode 100644 index 0a70baa..0000000 --- a/include/asm-arm/arch-iop32x/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-iop32x/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000 diff --git a/include/asm-arm/arch-iop33x/adma.h b/include/asm-arm/arch-iop33x/adma.h deleted file mode 100644 index 4b92f79..0000000 --- a/include/asm-arm/arch-iop33x/adma.h +++ /dev/null @@ -1,5 +0,0 @@ -#ifndef IOP33X_ADMA_H -#define IOP33X_ADMA_H -#include -#endif - diff --git a/include/asm-arm/arch-iop33x/debug-macro.S b/include/asm-arm/arch-iop33x/debug-macro.S deleted file mode 100644 index 9e7132e..0000000 --- a/include/asm-arm/arch-iop33x/debug-macro.S +++ /dev/null @@ -1,24 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - moveq \rx, #0xff000000 @ physical - movne \rx, #0xfe000000 @ virtual - orr \rx, \rx, #0x00ff0000 - orr \rx, \rx, #0x0000f700 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-iop33x/dma.h b/include/asm-arm/arch-iop33x/dma.h deleted file mode 100644 index b7775fd..0000000 --- a/include/asm-arm/arch-iop33x/dma.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/dma.h - * - * Copyright (C) 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ diff --git a/include/asm-arm/arch-iop33x/entry-macro.S b/include/asm-arm/arch-iop33x/entry-macro.S deleted file mode 100644 index b8e3d44..0000000 --- a/include/asm-arm/arch-iop33x/entry-macro.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/entry-macro.S - * - * Low-level IRQ helper macros for IOP33x-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mrc p15, 0, \tmp, c15, c1, 0 - orr \tmp, \tmp, #(1 << 6) - mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access - mrc p15, 0, \tmp, c15, c1, 0 - mov \tmp, \tmp - sub pc, pc, #4 @ cp_wait - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p6, 0, \irqstat, c14, c0, 0 @ Read IINTVEC - cmp \irqstat, #0 - mrceq p6, 0, \irqstat, c14, c0, 0 @ erratum 63 workaround - adds \irqnr, \irqstat, #1 - movne \irqnr, \irqstat, lsr #2 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - mrc p15, 0, \tmp1, c15, c1, 0 - ands \tmp2, \tmp1, #(1 << 6) - bicne \tmp1, \tmp1, #(1 << 6) - mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access - .endm diff --git a/include/asm-arm/arch-iop33x/gpio.h b/include/asm-arm/arch-iop33x/gpio.h deleted file mode 100644 index ddd55bb..0000000 --- a/include/asm-arm/arch-iop33x/gpio.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_IOP33X_GPIO_H -#define __ASM_ARCH_IOP33X_GPIO_H - -#include - -#endif diff --git a/include/asm-arm/arch-iop33x/hardware.h b/include/asm-arm/arch-iop33x/hardware.h deleted file mode 100644 index 0659cf9..0000000 --- a/include/asm-arm/arch-iop33x/hardware.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/hardware.h - */ - -#ifndef __HARDWARE_H -#define __HARDWARE_H - -#include - -/* - * Note about PCI IO space mappings - * - * To make IO space accesses efficient, we store virtual addresses in - * the IO resources. - * - * The PCI IO space is located at virtual 0xfe000000 from physical - * 0x90000000. The PCI BARs must be programmed with physical addresses, - * but when we read them, we convert them to virtual addresses. See - * arch/arm/mach-iop3xx/iop3xx-pci.c - */ -#define pcibios_assign_all_busses() 1 -#define PCIBIOS_MIN_IO 0x00000000 -#define PCIBIOS_MIN_MEM 0x00000000 - -#ifndef __ASSEMBLY__ -void iop33x_init_irq(void); - -extern struct platform_device iop33x_uart0_device; -extern struct platform_device iop33x_uart1_device; -#endif - - -/* - * Generic chipset bits - * - */ -#include "iop33x.h" - -/* - * Board specific bits - */ -#include "iq80331.h" -#include "iq80332.h" - - -#endif diff --git a/include/asm-arm/arch-iop33x/io.h b/include/asm-arm/arch-iop33x/io.h deleted file mode 100644 index 3fc607c..0000000 --- a/include/asm-arm/arch-iop33x/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/io.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IO_H -#define __IO_H - -#include - -extern void __iomem *__iop3xx_ioremap(unsigned long cookie, size_t size, - unsigned int mtype); -extern void __iop3xx_iounmap(void __iomem *addr); - -#define IO_SPACE_LIMIT 0xffffffff -#define __io(p) ((void __iomem *)IOP3XX_PCI_IO_PHYS_TO_VIRT(p)) -#define __mem_pci(a) (a) - -#define __arch_ioremap(a, s, f) __iop3xx_ioremap(a, s, f) -#define __arch_iounmap(a) __iop3xx_iounmap(a) - -#endif diff --git a/include/asm-arm/arch-iop33x/iop33x.h b/include/asm-arm/arch-iop33x/iop33x.h deleted file mode 100644 index 766985b..0000000 --- a/include/asm-arm/arch-iop33x/iop33x.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/iop33x.h - * - * Intel IOP33X Chip definitions - * - * Author: Dave Jiang (dave.jiang@intel.com) - * Copyright (C) 2003, 2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IOP33X_H -#define __IOP33X_H - -/* - * Peripherals that are shared between the iop32x and iop33x but - * located at different addresses. - */ -#define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg)) -#define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg)) - -#include - -/* UARTs */ -#define IOP33X_UART0_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700) -#define IOP33X_UART0_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700) -#define IOP33X_UART1_PHYS (IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740) -#define IOP33X_UART1_VIRT (IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740) - -/* ATU Parameters - * set up a 1:1 bus to physical ram relationship - * w/ pci on top of physical ram in memory map - */ -#define IOP33X_MAX_RAM_SIZE 0x80000000UL -#define IOP3XX_MAX_RAM_SIZE IOP33X_MAX_RAM_SIZE -#define IOP3XX_PCI_LOWER_MEM_BA (PHYS_OFFSET + IOP33X_MAX_RAM_SIZE) -#define IOP33X_PCI_MEM_WINDOW_SIZE 0x08000000 -#define IOP3XX_PCI_MEM_WINDOW_SIZE IOP33X_PCI_MEM_WINDOW_SIZE - - -#endif diff --git a/include/asm-arm/arch-iop33x/iq80331.h b/include/asm-arm/arch-iop33x/iq80331.h deleted file mode 100644 index 79b9302..0000000 --- a/include/asm-arm/arch-iop33x/iq80331.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/iq80331.h - * - * Intel IQ80331 evaluation board registers - */ - -#ifndef __IQ80331_H -#define __IQ80331_H - -#define IQ80331_7SEG_1 0xce840000 /* 7-Segment MSB */ -#define IQ80331_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */ -#define IQ80331_ROTARY_SW 0xce8d0000 /* Rotary Switch */ -#define IQ80331_BATT_STAT 0xce8f0000 /* Battery Status */ - - -#endif diff --git a/include/asm-arm/arch-iop33x/iq80332.h b/include/asm-arm/arch-iop33x/iq80332.h deleted file mode 100644 index 0531656..0000000 --- a/include/asm-arm/arch-iop33x/iq80332.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/iq80332.h - * - * Intel IQ80332 evaluation board registers - */ - -#ifndef __IQ80332_H -#define __IQ80332_H - -#define IQ80332_7SEG_1 0xce840000 /* 7-Segment MSB */ -#define IQ80332_7SEG_0 0xce850000 /* 7-Segment LSB (WO) */ -#define IQ80332_ROTARY_SW 0xce8d0000 /* Rotary Switch */ -#define IQ80332_BATT_STAT 0xce8f0000 /* Battery Status */ - - -#endif diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h deleted file mode 100644 index d045f84..0000000 --- a/include/asm-arm/arch-iop33x/irqs.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/irqs.h - * - * Author: Dave Jiang (dave.jiang@intel.com) - * Copyright: (C) 2003 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __IRQS_H -#define __IRQS_H - -/* - * IOP80331 chipset interrupts - */ -#define IRQ_IOP33X_DMA0_EOT 0 -#define IRQ_IOP33X_DMA0_EOC 1 -#define IRQ_IOP33X_DMA1_EOT 2 -#define IRQ_IOP33X_DMA1_EOC 3 -#define IRQ_IOP33X_AA_EOT 6 -#define IRQ_IOP33X_AA_EOC 7 -#define IRQ_IOP33X_TIMER0 8 -#define IRQ_IOP33X_TIMER1 9 -#define IRQ_IOP33X_I2C_0 10 -#define IRQ_IOP33X_I2C_1 11 -#define IRQ_IOP33X_MSG 12 -#define IRQ_IOP33X_MSGIBQ 13 -#define IRQ_IOP33X_ATU_BIST 14 -#define IRQ_IOP33X_PERFMON 15 -#define IRQ_IOP33X_CORE_PMU 16 -#define IRQ_IOP33X_XINT0 24 -#define IRQ_IOP33X_XINT1 25 -#define IRQ_IOP33X_XINT2 26 -#define IRQ_IOP33X_XINT3 27 -#define IRQ_IOP33X_XINT8 32 -#define IRQ_IOP33X_XINT9 33 -#define IRQ_IOP33X_XINT10 34 -#define IRQ_IOP33X_XINT11 35 -#define IRQ_IOP33X_XINT12 36 -#define IRQ_IOP33X_XINT13 37 -#define IRQ_IOP33X_XINT14 38 -#define IRQ_IOP33X_XINT15 39 -#define IRQ_IOP33X_UART0 51 -#define IRQ_IOP33X_UART1 52 -#define IRQ_IOP33X_PBIE 53 -#define IRQ_IOP33X_ATU_CRW 54 -#define IRQ_IOP33X_ATU_ERR 55 -#define IRQ_IOP33X_MCU_ERR 56 -#define IRQ_IOP33X_DMA0_ERR 57 -#define IRQ_IOP33X_DMA1_ERR 58 -#define IRQ_IOP33X_AA_ERR 60 -#define IRQ_IOP33X_MSG_ERR 62 -#define IRQ_IOP33X_HPI 63 - -#define NR_IRQS 64 - - -#endif diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h deleted file mode 100644 index d798d83..0000000 --- a/include/asm-arm/arch-iop33x/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/memory.h - */ - -#ifndef __MEMORY_H -#define __MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -/* - * Virtual view <-> PCI DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) (__virt_to_phys(x)) -#define __bus_to_virt(x) (__phys_to_virt(x)) - - -#endif diff --git a/include/asm-arm/arch-iop33x/system.h b/include/asm-arm/arch-iop33x/system.h deleted file mode 100644 index 00dd07e..0000000 --- a/include/asm-arm/arch-iop33x/system.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/system.h - * - * Copyright (C) 2001 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - *IOP3XX_PCSR = 0x30; - - /* Jump into ROM at address 0 */ - cpu_reset(0); -} diff --git a/include/asm-arm/arch-iop33x/time.h b/include/asm-arm/arch-iop33x/time.h deleted file mode 100644 index 4ac4d76..0000000 --- a/include/asm-arm/arch-iop33x/time.h +++ /dev/null @@ -1,4 +0,0 @@ -#ifndef _IOP33X_TIME_H_ -#define _IOP33X_TIME_H_ -#define IRQ_IOP_TIMER0 IRQ_IOP33X_TIMER0 -#endif diff --git a/include/asm-arm/arch-iop33x/timex.h b/include/asm-arm/arch-iop33x/timex.h deleted file mode 100644 index 75a001e..0000000 --- a/include/asm-arm/arch-iop33x/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/timex.h - * - * IOP3xx architecture timex specifications - */ - -#include - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-iop33x/uncompress.h b/include/asm-arm/arch-iop33x/uncompress.h deleted file mode 100644 index 34d9e8e..0000000 --- a/include/asm-arm/arch-iop33x/uncompress.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/uncompress.h - */ - -#include -#include -#include -#include - -static volatile u32 *uart_base; - -#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) - -static inline void putc(char c) -{ - while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) - barrier(); - uart_base[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -static __inline__ void __arch_decomp_setup(unsigned long arch_id) -{ - if (machine_is_iq80331() || machine_is_iq80332()) - uart_base = (volatile u32 *)IOP33X_UART0_PHYS; - else - uart_base = (volatile u32 *)0xfe800000; -} - -/* - * nothing to do - */ -#define arch_decomp_setup() __arch_decomp_setup(arch_id) -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-iop33x/vmalloc.h b/include/asm-arm/arch-iop33x/vmalloc.h deleted file mode 100644 index 66f545a..0000000 --- a/include/asm-arm/arch-iop33x/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-iop33x/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000 diff --git a/include/asm-arm/arch-ixp2000/debug-macro.S b/include/asm-arm/arch-ixp2000/debug-macro.S deleted file mode 100644 index bc8b396..0000000 --- a/include/asm-arm/arch-ixp2000/debug-macro.S +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/include/asm-arm/arch-ixp2000/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0xc0000000 @ Physical base - movne \rx, #0xfe000000 @ virtual base - orrne \rx, \rx, #0x00f00000 - orr \rx, \rx, #0x00030000 -#ifdef __ARMEB__ - orr \rx, \rx, #0x00000003 -#endif - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-ixp2000/dma.h b/include/asm-arm/arch-ixp2000/dma.h deleted file mode 100644 index 548d8dc..0000000 --- a/include/asm-arm/arch-ixp2000/dma.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/dma.h - * - * Copyright (C) 2002 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ diff --git a/include/asm-arm/arch-ixp2000/enp2611.h b/include/asm-arm/arch-ixp2000/enp2611.h deleted file mode 100644 index 42f3c28..0000000 --- a/include/asm-arm/arch-ixp2000/enp2611.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/enp2611.h - * - * Register and other defines for Radisys ENP-2611 - * - * Created 2004 by Lennert Buytenhek from the ixdp2x01 code. The - * original version carries the following notices: - * - * Original Author: Naeem Afzal - * Maintainer: Deepak Saxena - * - * Copyright (C) 2002 Intel Corp. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ENP2611_H -#define __ENP2611_H - -#define ENP2611_CALEB_PHYS_BASE 0xc5000000 -#define ENP2611_CALEB_VIRT_BASE 0xfe000000 -#define ENP2611_CALEB_SIZE 0x00100000 - -#define ENP2611_PM3386_0_PHYS_BASE 0xc6000000 -#define ENP2611_PM3386_0_VIRT_BASE 0xfe100000 -#define ENP2611_PM3386_0_SIZE 0x00100000 - -#define ENP2611_PM3386_1_PHYS_BASE 0xc6400000 -#define ENP2611_PM3386_1_VIRT_BASE 0xfe200000 -#define ENP2611_PM3386_1_SIZE 0x00100000 - -#define ENP2611_GPIO_SCL 7 -#define ENP2611_GPIO_SDA 6 - -#define IRQ_ENP2611_THERMAL IRQ_IXP2000_GPIO4 -#define IRQ_ENP2611_OPTION_BOARD IRQ_IXP2000_GPIO3 -#define IRQ_ENP2611_CALEB IRQ_IXP2000_GPIO2 -#define IRQ_ENP2611_PM3386_1 IRQ_IXP2000_GPIO1 -#define IRQ_ENP2611_PM3386_0 IRQ_IXP2000_GPIO0 - - -#endif diff --git a/include/asm-arm/arch-ixp2000/entry-macro.S b/include/asm-arm/arch-ixp2000/entry-macro.S deleted file mode 100644 index 11d512a..0000000 --- a/include/asm-arm/arch-ixp2000/entry-macro.S +++ /dev/null @@ -1,60 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/entry-macro.S - * - * Low-level IRQ helper macros for IXP2000-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - mov \irqnr, #0x0 @clear out irqnr as default - mov \base, #0xfe000000 - orr \base, \base, #0x00e00000 - orr \base, \base, #0x08 - ldr \irqstat, [\base] @ get interrupts - - cmp \irqstat, #0 - beq 1001f - - clz \irqnr, \irqstat - mov \base, #31 - subs \irqnr, \base, \irqnr - - /* - * We handle PCIA and PCIB here so we don't have an - * extra layer of code just to check these two bits. - */ - cmp \irqnr, #IRQ_IXP2000_PCI - bne 1001f - - mov \base, #0xfe000000 - orr \base, \base, #0x00c00000 - orr \base, \base, #0x00000100 - orr \base, \base, #0x00000058 - ldr \irqstat, [\base] - - mov \tmp, #(1<<26) - tst \irqstat, \tmp - movne \irqnr, #IRQ_IXP2000_PCIA - bne 1001f - - mov \tmp, #(1<<27) - tst \irqstat, \tmp - movne \irqnr, #IRQ_IXP2000_PCIB - -1001: - .endm - diff --git a/include/asm-arm/arch-ixp2000/gpio.h b/include/asm-arm/arch-ixp2000/gpio.h deleted file mode 100644 index 03cbbe1..0000000 --- a/include/asm-arm/arch-ixp2000/gpio.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/gpio.h - * - * Copyright (C) 2002 Intel Corporation. - * - * This program is free software, you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -/* - * IXP2000 GPIO in/out, edge/level detection for IRQs: - * IRQs are generated on Falling-edge, Rising-Edge, Level-low, Level-High - * or both Falling-edge and Rising-edge. - * This must be called *before* the corresponding IRQ is registerd. - * Use this instead of directly setting the GPIO registers. - * GPIOs may also be used as GPIOs (e.g. for emulating i2c/smb) - */ -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#ifndef __ASSEMBLY__ - -#define GPIO_IN 0 -#define GPIO_OUT 1 - -#define IXP2000_GPIO_LOW 0 -#define IXP2000_GPIO_HIGH 1 - -extern void gpio_line_config(int line, int direction); - -static inline int gpio_line_get(int line) -{ - return (((*IXP2000_GPIO_PLR) >> line) & 1); -} - -static inline void gpio_line_set(int line, int value) -{ - if (value == IXP2000_GPIO_HIGH) { - ixp2000_reg_write(IXP2000_GPIO_POSR, 1 << line); - } else if (value == IXP2000_GPIO_LOW) { - ixp2000_reg_write(IXP2000_GPIO_POCR, 1 << line); - } -} - -#endif /* !__ASSEMBLY__ */ - -#endif /* ASM_ARCH_IXP2000_GPIO_H_ */ diff --git a/include/asm-arm/arch-ixp2000/hardware.h b/include/asm-arm/arch-ixp2000/hardware.h deleted file mode 100644 index e7ea781..0000000 --- a/include/asm-arm/arch-ixp2000/hardware.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/hardware.h - * - * Hardware definitions for IXP2400/2800 based systems - * - * Original Author: Naeem M Afzal - * - * Maintainer: Deepak Saxena - * - * Copyright (C) 2001-2002 Intel Corp. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#define __ASM_ARCH_HARDWARE_H__ - -/* - * This needs to be platform-specific? - */ -#define PCIBIOS_MIN_IO 0x00000000 -#define PCIBIOS_MIN_MEM 0x00000000 - -#include "ixp2000-regs.h" /* Chipset Registers */ - -#define pcibios_assign_all_busses() 0 - -/* - * Platform helper functions - */ -#include "platform.h" - -/* - * Platform-specific bits - */ -#include "enp2611.h" /* ENP-2611 */ -#include "ixdp2x00.h" /* IXDP2400/2800 */ -#include "ixdp2x01.h" /* IXDP2401/2801 */ - -#endif /* _ASM_ARCH_HARDWARE_H__ */ diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h deleted file mode 100644 index 5dc1d25..0000000 --- a/include/asm-arm/arch-ixp2000/io.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/io.h - * - * Original Author: Naeem M Afzal - * Maintainer: Deepak Saxena - * - * Copyright (C) 2002 Intel Corp. - * Copyrgiht (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff -#define __mem_pci(a) (a) - -/* - * The A? revisions of the IXP2000s assert byte lanes for PCI I/O - * transactions the other way round (MEM transactions don't have this - * issue), so if we want to support those models, we need to override - * the standard I/O functions. - * - * B0 and later have a bit that can be set to 1 to get the proper - * behavior for I/O transactions, which then allows us to use the - * standard I/O functions. This is what we do if the user does not - * explicitly ask for support for pre-B0. - */ -#ifdef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO -#define ___io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) - -#define alignb(addr) (void __iomem *)((unsigned long)(addr) ^ 3) -#define alignw(addr) (void __iomem *)((unsigned long)(addr) ^ 2) - -#define outb(v,p) __raw_writeb((v),alignb(___io(p))) -#define outw(v,p) __raw_writew((v),alignw(___io(p))) -#define outl(v,p) __raw_writel((v),___io(p)) - -#define inb(p) ({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; }) -#define inw(p) \ - ({ unsigned int __v = (__raw_readw(alignw(___io(p)))); __v; }) -#define inl(p) \ - ({ unsigned int __v = (__raw_readl(___io(p))); __v; }) - -#define outsb(p,d,l) __raw_writesb(alignb(___io(p)),d,l) -#define outsw(p,d,l) __raw_writesw(alignw(___io(p)),d,l) -#define outsl(p,d,l) __raw_writesl(___io(p),d,l) - -#define insb(p,d,l) __raw_readsb(alignb(___io(p)),d,l) -#define insw(p,d,l) __raw_readsw(alignw(___io(p)),d,l) -#define insl(p,d,l) __raw_readsl(___io(p),d,l) - -#define __is_io_address(p) ((((unsigned long)(p)) & ~(IXP2000_PCI_IO_SIZE - 1)) == IXP2000_PCI_IO_VIRT_BASE) - -#define ioread8(p) \ - ({ \ - unsigned int __v; \ - \ - if (__is_io_address(p)) { \ - __v = __raw_readb(alignb(p)); \ - } else { \ - __v = __raw_readb(p); \ - } \ - \ - __v; \ - }) \ - -#define ioread16(p) \ - ({ \ - unsigned int __v; \ - \ - if (__is_io_address(p)) { \ - __v = __raw_readw(alignw(p)); \ - } else { \ - __v = le16_to_cpu(__raw_readw(p)); \ - } \ - \ - __v; \ - }) - -#define ioread32(p) \ - ({ \ - unsigned int __v; \ - \ - if (__is_io_address(p)) { \ - __v = __raw_readl(p); \ - } else { \ - __v = le32_to_cpu(__raw_readl(p)); \ - } \ - \ - __v; \ - }) - -#define iowrite8(v,p) \ - ({ \ - if (__is_io_address(p)) { \ - __raw_writeb((v), alignb(p)); \ - } else { \ - __raw_writeb((v), p); \ - } \ - }) - -#define iowrite16(v,p) \ - ({ \ - if (__is_io_address(p)) { \ - __raw_writew((v), alignw(p)); \ - } else { \ - __raw_writew(cpu_to_le16(v), p); \ - } \ - }) - -#define iowrite32(v,p) \ - ({ \ - if (__is_io_address(p)) { \ - __raw_writel((v), p); \ - } else { \ - __raw_writel(cpu_to_le32(v), p); \ - } \ - }) - -#define ioport_map(port, nr) ___io(port) - -#define ioport_unmap(addr) -#else -#define __io(p) ((void __iomem *)((p)+IXP2000_PCI_IO_VIRT_BASE)) -#endif - - -#endif diff --git a/include/asm-arm/arch-ixp2000/irqs.h b/include/asm-arm/arch-ixp2000/irqs.h deleted file mode 100644 index 62f09c7..0000000 --- a/include/asm-arm/arch-ixp2000/irqs.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/irqs.h - * - * Original Author: Naeem Afzal - * Maintainer: Deepak Saxena - * - * Copyright (C) 2002 Intel Corp. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _IRQS_H -#define _IRQS_H - -/* - * Do NOT add #ifdef MACHINE_FOO in here. - * Simpy add your machine IRQs here and increase NR_IRQS if needed to - * hold your machine's IRQ table. - */ - -/* - * Some interrupt numbers go unused b/c the IRQ mask/ummask/status - * register has those bit reserved. We just mark those interrupts - * as invalid and this allows us to do mask/unmask with a single - * shift operation instead of having to map the IRQ number to - * a HW IRQ number. - */ -#define IRQ_IXP2000_SOFT_INT 0 /* soft interrupt */ -#define IRQ_IXP2000_ERRSUM 1 /* OR of all bits in ErrorStatus reg*/ -#define IRQ_IXP2000_UART 2 -#define IRQ_IXP2000_GPIO 3 -#define IRQ_IXP2000_TIMER1 4 -#define IRQ_IXP2000_TIMER2 5 -#define IRQ_IXP2000_TIMER3 6 -#define IRQ_IXP2000_TIMER4 7 -#define IRQ_IXP2000_PMU 8 -#define IRQ_IXP2000_SPF 9 /* Slow port framer IRQ */ -#define IRQ_IXP2000_DMA1 10 -#define IRQ_IXP2000_DMA2 11 -#define IRQ_IXP2000_DMA3 12 -#define IRQ_IXP2000_PCI_DOORBELL 13 -#define IRQ_IXP2000_ME_ATTN 14 -#define IRQ_IXP2000_PCI 15 /* PCI INTA or INTB */ -#define IRQ_IXP2000_THDA0 16 /* thread 0-31A */ -#define IRQ_IXP2000_THDA1 17 /* thread 32-63A, IXP2800 only */ -#define IRQ_IXP2000_THDA2 18 /* thread 64-95A */ -#define IRQ_IXP2000_THDA3 19 /* thread 96-127A, IXP2800 only */ -#define IRQ_IXP2000_THDB0 24 /* thread 0-31B */ -#define IRQ_IXP2000_THDB1 25 /* thread 32-63B, IXP2800 only */ -#define IRQ_IXP2000_THDB2 26 /* thread 64-95B */ -#define IRQ_IXP2000_THDB3 27 /* thread 96-127B, IXP2800 only */ - -/* define generic GPIOs */ -#define IRQ_IXP2000_GPIO0 32 -#define IRQ_IXP2000_GPIO1 33 -#define IRQ_IXP2000_GPIO2 34 -#define IRQ_IXP2000_GPIO3 35 -#define IRQ_IXP2000_GPIO4 36 -#define IRQ_IXP2000_GPIO5 37 -#define IRQ_IXP2000_GPIO6 38 -#define IRQ_IXP2000_GPIO7 39 - -/* split off the 2 PCI sources */ -#define IRQ_IXP2000_PCIA 40 -#define IRQ_IXP2000_PCIB 41 - -/* Int sources from IRQ_ERROR_STATUS */ -#define IRQ_IXP2000_DRAM0_MIN_ERR 42 -#define IRQ_IXP2000_DRAM0_MAJ_ERR 43 -#define IRQ_IXP2000_DRAM1_MIN_ERR 44 -#define IRQ_IXP2000_DRAM1_MAJ_ERR 45 -#define IRQ_IXP2000_DRAM2_MIN_ERR 46 -#define IRQ_IXP2000_DRAM2_MAJ_ERR 47 -/* 48-57 reserved */ -#define IRQ_IXP2000_SRAM0_ERR 58 -#define IRQ_IXP2000_SRAM1_ERR 59 -#define IRQ_IXP2000_SRAM2_ERR 60 -#define IRQ_IXP2000_SRAM3_ERR 61 -/* 62-65 reserved */ -#define IRQ_IXP2000_MEDIA_ERR 66 -#define IRQ_IXP2000_PCI_ERR 67 -#define IRQ_IXP2000_SP_INT 68 - -#define NR_IXP2000_IRQS 69 - -#define IXP2000_BOARD_IRQ(x) (NR_IXP2000_IRQS + (x)) - -#define IXP2000_BOARD_IRQ_MASK(irq) (1 << (irq - NR_IXP2000_IRQS)) - -#define IXP2000_ERR_IRQ_MASK(irq) ( 1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) -#define IXP2000_VALID_ERR_IRQ_MASK (\ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MIN_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM0_MAJ_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MIN_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM1_MAJ_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MIN_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_DRAM2_MAJ_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM0_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM1_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM2_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SRAM3_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_MEDIA_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_PCI_ERR) | \ - IXP2000_ERR_IRQ_MASK(IRQ_IXP2000_SP_INT) ) - -/* - * This allows for all the on-chip sources plus up to 32 CPLD based - * IRQs. Should be more than enough. - */ -#define IXP2000_BOARD_IRQS 32 -#define NR_IRQS (NR_IXP2000_IRQS + IXP2000_BOARD_IRQS) - - -/* - * IXDP2400 specific IRQs - */ -#define IRQ_IXDP2400_INGRESS_NPU IXP2000_BOARD_IRQ(0) -#define IRQ_IXDP2400_ENET IXP2000_BOARD_IRQ(1) -#define IRQ_IXDP2400_MEDIA_PCI IXP2000_BOARD_IRQ(2) -#define IRQ_IXDP2400_MEDIA_SP IXP2000_BOARD_IRQ(3) -#define IRQ_IXDP2400_SF_PCI IXP2000_BOARD_IRQ(4) -#define IRQ_IXDP2400_SF_SP IXP2000_BOARD_IRQ(5) -#define IRQ_IXDP2400_PMC IXP2000_BOARD_IRQ(6) -#define IRQ_IXDP2400_TVM IXP2000_BOARD_IRQ(7) - -#define NR_IXDP2400_IRQS ((IRQ_IXDP2400_TVM)+1) -#define IXDP2400_NR_IRQS NR_IXDP2400_IRQS - NR_IXP2000_IRQS - -/* IXDP2800 specific IRQs */ -#define IRQ_IXDP2800_EGRESS_ENET IXP2000_BOARD_IRQ(0) -#define IRQ_IXDP2800_INGRESS_NPU IXP2000_BOARD_IRQ(1) -#define IRQ_IXDP2800_PMC IXP2000_BOARD_IRQ(2) -#define IRQ_IXDP2800_FABRIC_PCI IXP2000_BOARD_IRQ(3) -#define IRQ_IXDP2800_FABRIC IXP2000_BOARD_IRQ(4) -#define IRQ_IXDP2800_MEDIA IXP2000_BOARD_IRQ(5) - -#define NR_IXDP2800_IRQS ((IRQ_IXDP2800_MEDIA)+1) -#define IXDP2800_NR_IRQS NR_IXDP2800_IRQS - NR_IXP2000_IRQS - -/* - * IRQs on both IXDP2x01 boards - */ -#define IRQ_IXDP2X01_SPCI_DB_0 IXP2000_BOARD_IRQ(2) -#define IRQ_IXDP2X01_SPCI_DB_1 IXP2000_BOARD_IRQ(3) -#define IRQ_IXDP2X01_SPCI_PMC_INTA IXP2000_BOARD_IRQ(4) -#define IRQ_IXDP2X01_SPCI_PMC_INTB IXP2000_BOARD_IRQ(5) -#define IRQ_IXDP2X01_SPCI_PMC_INTC IXP2000_BOARD_IRQ(6) -#define IRQ_IXDP2X01_SPCI_PMC_INTD IXP2000_BOARD_IRQ(7) -#define IRQ_IXDP2X01_SPCI_FIC_INT IXP2000_BOARD_IRQ(8) -#define IRQ_IXDP2X01_IPMI_FROM IXP2000_BOARD_IRQ(16) -#define IRQ_IXDP2X01_125US IXP2000_BOARD_IRQ(17) -#define IRQ_IXDP2X01_DB_0_ADD IXP2000_BOARD_IRQ(18) -#define IRQ_IXDP2X01_DB_1_ADD IXP2000_BOARD_IRQ(19) -#define IRQ_IXDP2X01_UART1 IXP2000_BOARD_IRQ(21) -#define IRQ_IXDP2X01_UART2 IXP2000_BOARD_IRQ(22) -#define IRQ_IXDP2X01_FIC_ADD_INT IXP2000_BOARD_IRQ(24) -#define IRQ_IXDP2X01_CS8900 IXP2000_BOARD_IRQ(25) -#define IRQ_IXDP2X01_BBSRAM IXP2000_BOARD_IRQ(26) - -#define IXDP2X01_VALID_IRQ_MASK ( \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_0) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_DB_1) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTA) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTB) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTC) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_PMC_INTD) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_SPCI_FIC_INT) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_IPMI_FROM) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_125US) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_0_ADD) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_DB_1_ADD) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART1) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_UART2) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_FIC_ADD_INT) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_CS8900) | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2X01_BBSRAM) ) - -/* - * IXDP2401 specific IRQs - */ -#define IRQ_IXDP2401_INTA_82546 IXP2000_BOARD_IRQ(0) -#define IRQ_IXDP2401_INTB_82546 IXP2000_BOARD_IRQ(1) - -#define IXDP2401_VALID_IRQ_MASK ( \ - IXDP2X01_VALID_IRQ_MASK | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTA_82546) |\ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2401_INTB_82546)) - -/* - * IXDP2801-specific IRQs - */ -#define IRQ_IXDP2801_RIV IXP2000_BOARD_IRQ(0) -#define IRQ_IXDP2801_CNFG_MEDIA IXP2000_BOARD_IRQ(27) -#define IRQ_IXDP2801_CLOCK_REF IXP2000_BOARD_IRQ(28) - -#define IXDP2801_VALID_IRQ_MASK ( \ - IXDP2X01_VALID_IRQ_MASK | \ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_RIV) |\ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CNFG_MEDIA) |\ - IXP2000_BOARD_IRQ_MASK(IRQ_IXDP2801_CLOCK_REF)) - -#define NR_IXDP2X01_IRQS ((IRQ_IXDP2801_CLOCK_REF) + 1) - -#endif /*_IRQS_H*/ diff --git a/include/asm-arm/arch-ixp2000/ixdp2x00.h b/include/asm-arm/arch-ixp2000/ixdp2x00.h deleted file mode 100644 index 546e2e8..0000000 --- a/include/asm-arm/arch-ixp2000/ixdp2x00.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/ixdp2x00.h - * - * Register and other defines for IXDP2[48]00 platforms - * - * Original Author: Naeem Afzal - * Maintainer: Deepak Saxena - * - * Copyright (C) 2002 Intel Corp. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _IXDP2X00_H_ -#define _IXDP2X00_H_ - -/* - * On board CPLD memory map - */ -#define IXDP2X00_PHYS_CPLD_BASE 0xc7000000 -#define IXDP2X00_VIRT_CPLD_BASE 0xfe000000 -#define IXDP2X00_CPLD_SIZE 0x00100000 - - -#define IXDP2X00_CPLD_REG(x) \ - (volatile unsigned long *)(IXDP2X00_VIRT_CPLD_BASE | x) - -/* - * IXDP2400 CPLD registers - */ -#define IXDP2400_CPLD_SYSLED IXDP2X00_CPLD_REG(0x0) -#define IXDP2400_CPLD_DISP_DATA IXDP2X00_CPLD_REG(0x4) -#define IXDP2400_CPLD_CLOCK_SPEED IXDP2X00_CPLD_REG(0x8) -#define IXDP2400_CPLD_INT_STAT IXDP2X00_CPLD_REG(0xc) -#define IXDP2400_CPLD_REV IXDP2X00_CPLD_REG(0x10) -#define IXDP2400_CPLD_SYS_CLK_M IXDP2X00_CPLD_REG(0x14) -#define IXDP2400_CPLD_SYS_CLK_N IXDP2X00_CPLD_REG(0x18) -#define IXDP2400_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x48) - -/* - * IXDP2800 CPLD registers - */ -#define IXDP2800_CPLD_INT_STAT IXDP2X00_CPLD_REG(0x0) -#define IXDP2800_CPLD_INT_MASK IXDP2X00_CPLD_REG(0x140) - - -#define IXDP2X00_GPIO_I2C_ENABLE 0x02 -#define IXDP2X00_GPIO_SCL 0x07 -#define IXDP2X00_GPIO_SDA 0x06 - -/* - * PCI devfns for on-board devices. We need these to be able to - * properly translate IRQs and for device removal. - */ -#define IXDP2400_SLAVE_ENET_DEVFN 0x18 /* Bus 1 */ -#define IXDP2400_MASTER_ENET_DEVFN 0x20 /* Bus 1 */ -#define IXDP2400_MEDIA_DEVFN 0x28 /* Bus 1 */ -#define IXDP2400_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ - -#define IXDP2800_SLAVE_ENET_DEVFN 0x20 /* Bus 1 */ -#define IXDP2800_MASTER_ENET_DEVFN 0x18 /* Bus 1 */ -#define IXDP2800_SWITCH_FABRIC_DEVFN 0x30 /* Bus 1 */ - -#define IXDP2X00_P2P_DEVFN 0x20 /* Bus 0 */ -#define IXDP2X00_21555_DEVFN 0x30 /* Bus 0 */ -#define IXDP2X00_SLAVE_NPU_DEVFN 0x28 /* Bus 1 */ -#define IXDP2X00_PMC_DEVFN 0x38 /* Bus 1 */ -#define IXDP2X00_MASTER_NPU_DEVFN 0x38 /* Bus 1 */ - -#ifndef __ASSEMBLY__ -/* - * The master NPU is always PCI master. - */ -static inline unsigned int ixdp2x00_master_npu(void) -{ - return !!ixp2000_is_pcimaster(); -} - -/* - * Helper functions used by ixdp2400 and ixdp2800 specific code - */ -void ixdp2x00_init_irq(volatile unsigned long*, volatile unsigned long *, unsigned long); -void ixdp2x00_slave_pci_postinit(void); -void ixdp2x00_init_machine(void); -void ixdp2x00_map_io(void); - -#endif - -#endif /*_IXDP2X00_H_ */ diff --git a/include/asm-arm/arch-ixp2000/ixdp2x01.h b/include/asm-arm/arch-ixp2000/ixdp2x01.h deleted file mode 100644 index c6d5142..0000000 --- a/include/asm-arm/arch-ixp2000/ixdp2x01.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/ixdp2x01.h - * - * Platform definitions for IXDP2X01 && IXDP2801 systems - * - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista Software, Inc. - * - * Based on original code Copyright (c) 2002-2003 Intel Corporation - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __IXDP2X01_H__ -#define __IXDP2X01_H__ - -#define IXDP2X01_PHYS_CPLD_BASE 0xc6024000 -#define IXDP2X01_VIRT_CPLD_BASE 0xfe000000 -#define IXDP2X01_CPLD_REGION_SIZE 0x00100000 - -#define IXDP2X01_CPLD_VIRT_REG(reg) (volatile unsigned long*)(IXDP2X01_VIRT_CPLD_BASE | reg) -#define IXDP2X01_CPLD_PHYS_REG(reg) (IXDP2X01_PHYS_CPLD_BASE | reg) - -#define IXDP2X01_UART1_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x40) -#define IXDP2X01_UART1_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x40) - -#define IXDP2X01_UART2_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x60) -#define IXDP2X01_UART2_PHYS_BASE IXDP2X01_CPLD_PHYS_REG(0x60) - -#define IXDP2X01_CS8900_VIRT_BASE IXDP2X01_CPLD_VIRT_REG(0x80) -#define IXDP2X01_CS8900_VIRT_END (IXDP2X01_CS8900_VIRT_BASE + 16) - -#define IXDP2X01_CPLD_RESET_REG IXDP2X01_CPLD_VIRT_REG(0x00) -#define IXDP2X01_INT_MASK_SET_REG IXDP2X01_CPLD_VIRT_REG(0x08) -#define IXDP2X01_INT_STAT_REG IXDP2X01_CPLD_VIRT_REG(0x0C) -#define IXDP2X01_INT_RAW_REG IXDP2X01_CPLD_VIRT_REG(0x10) -#define IXDP2X01_INT_MASK_CLR_REG IXDP2X01_INT_RAW_REG -#define IXDP2X01_INT_SIM_REG IXDP2X01_CPLD_VIRT_REG(0x14) - -#define IXDP2X01_CPLD_FLASH_REG IXDP2X01_CPLD_VIRT_REG(0x20) - -#define IXDP2X01_CPLD_FLASH_INTERN 0x8000 -#define IXDP2X01_CPLD_FLASH_BANK_MASK 0xF -#define IXDP2X01_FLASH_WINDOW_BITS 25 -#define IXDP2X01_FLASH_WINDOW_SIZE (1 << IXDP2X01_FLASH_WINDOW_BITS) -#define IXDP2X01_FLASH_WINDOW_MASK (IXDP2X01_FLASH_WINDOW_SIZE - 1) - -#define IXDP2X01_UART_CLK 1843200 - -#define IXDP2X01_GPIO_I2C_ENABLE 0x02 -#define IXDP2X01_GPIO_SCL 0x07 -#define IXDP2X01_GPIO_SDA 0x06 - -#endif /* __IXDP2x01_H__ */ diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h deleted file mode 100644 index ccae4be..0000000 --- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h +++ /dev/null @@ -1,457 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/ixp2000-regs.h - * - * Chipset register definitions for IXP2400/2800 based systems. - * - * Original Author: Naeem Afzal - * - * Maintainer: Deepak Saxena - * - * Copyright (C) 2002 Intel Corp. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef _IXP2000_REGS_H_ -#define _IXP2000_REGS_H_ - -/* - * IXP2000 linux memory map: - * - * virt phys size - * fb000000 db000000 16M PCI CFG1 - * fc000000 da000000 16M PCI CFG0 - * fd000000 d8000000 16M PCI I/O - * fe[0-7]00000 8M per-platform mappings - * fe900000 80000000 1M SRAM #0 (first MB) - * fea00000 cb400000 1M SCRATCH ring get/put - * feb00000 c8000000 1M MSF - * fec00000 df000000 1M PCI CSRs - * fed00000 de000000 1M PCI CREG - * fee00000 d6000000 1M INTCTL - * fef00000 c0000000 1M CAP - */ - -/* - * Static I/O regions. - * - * Most of the registers are clumped in 4K regions spread throughout - * the 0xc0000000 -> 0xc0100000 address range, but we just map in - * the whole range using a single 1 MB section instead of small - * 4K pages. This has two advantages for us: - * - * 1) We use only one TLB entry for large number of on-chip I/O devices. - * - * 2) We can easily set the Section attributes to XCB=101 on the IXP2400 - * as required per erratum #66. We accomplish this by using a - * new MT_IXP2000_DEVICE memory type with the bits set as required. - * - * CAP stands for CSR Access Proxy. - * - * If you change the virtual address of this mapping, please propagate - * the change to arch/arm/kernel/debug.S, which hardcodes the virtual - * address of the UART located in this region. - */ - -#define IXP2000_CAP_PHYS_BASE 0xc0000000 -#define IXP2000_CAP_VIRT_BASE 0xfef00000 -#define IXP2000_CAP_SIZE 0x00100000 - -/* - * Addresses for specific on-chip peripherals. - */ -#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 -#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 -#define IXP2000_UART_PHYS_BASE 0xc0030000 -#define IXP2000_UART_VIRT_BASE 0xfef30000 -#define IXP2000_TIMER_VIRT_BASE 0xfef20000 -#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000 -#define IXP2000_GPIO_VIRT_BASE 0xfef10000 - -/* - * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual - * addresses of the INTCTL and PCI_CSR mappings are hardcoded in - * entry-macro.S, so if you ever change these please propagate - * the change. - */ -#define IXP2000_INTCTL_PHYS_BASE 0xd6000000 -#define IXP2000_INTCTL_VIRT_BASE 0xfee00000 -#define IXP2000_INTCTL_SIZE 0x00100000 - -#define IXP2000_PCI_CREG_PHYS_BASE 0xde000000 -#define IXP2000_PCI_CREG_VIRT_BASE 0xfed00000 -#define IXP2000_PCI_CREG_SIZE 0x00100000 - -#define IXP2000_PCI_CSR_PHYS_BASE 0xdf000000 -#define IXP2000_PCI_CSR_VIRT_BASE 0xfec00000 -#define IXP2000_PCI_CSR_SIZE 0x00100000 - -#define IXP2000_MSF_PHYS_BASE 0xc8000000 -#define IXP2000_MSF_VIRT_BASE 0xfeb00000 -#define IXP2000_MSF_SIZE 0x00100000 - -#define IXP2000_SCRATCH_RING_PHYS_BASE 0xcb400000 -#define IXP2000_SCRATCH_RING_VIRT_BASE 0xfea00000 -#define IXP2000_SCRATCH_RING_SIZE 0x00100000 - -#define IXP2000_SRAM0_PHYS_BASE 0x80000000 -#define IXP2000_SRAM0_VIRT_BASE 0xfe900000 -#define IXP2000_SRAM0_SIZE 0x00100000 - -#define IXP2000_PCI_IO_PHYS_BASE 0xd8000000 -#define IXP2000_PCI_IO_VIRT_BASE 0xfd000000 -#define IXP2000_PCI_IO_SIZE 0x01000000 - -#define IXP2000_PCI_CFG0_PHYS_BASE 0xda000000 -#define IXP2000_PCI_CFG0_VIRT_BASE 0xfc000000 -#define IXP2000_PCI_CFG0_SIZE 0x01000000 - -#define IXP2000_PCI_CFG1_PHYS_BASE 0xdb000000 -#define IXP2000_PCI_CFG1_VIRT_BASE 0xfb000000 -#define IXP2000_PCI_CFG1_SIZE 0x01000000 - -/* - * Timers - */ -#define IXP2000_TIMER_REG(x) ((volatile unsigned long*)(IXP2000_TIMER_VIRT_BASE | (x))) -/* Timer control */ -#define IXP2000_T1_CTL IXP2000_TIMER_REG(0x00) -#define IXP2000_T2_CTL IXP2000_TIMER_REG(0x04) -#define IXP2000_T3_CTL IXP2000_TIMER_REG(0x08) -#define IXP2000_T4_CTL IXP2000_TIMER_REG(0x0c) -/* Store initial value */ -#define IXP2000_T1_CLD IXP2000_TIMER_REG(0x10) -#define IXP2000_T2_CLD IXP2000_TIMER_REG(0x14) -#define IXP2000_T3_CLD IXP2000_TIMER_REG(0x18) -#define IXP2000_T4_CLD IXP2000_TIMER_REG(0x1c) -/* Read current value */ -#define IXP2000_T1_CSR IXP2000_TIMER_REG(0x20) -#define IXP2000_T2_CSR IXP2000_TIMER_REG(0x24) -#define IXP2000_T3_CSR IXP2000_TIMER_REG(0x28) -#define IXP2000_T4_CSR IXP2000_TIMER_REG(0x2c) -/* Clear associated timer interrupt */ -#define IXP2000_T1_CLR IXP2000_TIMER_REG(0x30) -#define IXP2000_T2_CLR IXP2000_TIMER_REG(0x34) -#define IXP2000_T3_CLR IXP2000_TIMER_REG(0x38) -#define IXP2000_T4_CLR IXP2000_TIMER_REG(0x3c) -/* Timer watchdog enable for T4 */ -#define IXP2000_TWDE IXP2000_TIMER_REG(0x40) - -#define WDT_ENABLE 0x00000001 -#define TIMER_DIVIDER_256 0x00000008 -#define TIMER_ENABLE 0x00000080 -#define IRQ_MASK_TIMER1 (1 << 4) - -/* - * Interrupt controller registers - */ -#define IXP2000_INTCTL_REG(x) (volatile unsigned long*)(IXP2000_INTCTL_VIRT_BASE | (x)) -#define IXP2000_IRQ_STATUS IXP2000_INTCTL_REG(0x08) -#define IXP2000_IRQ_ENABLE IXP2000_INTCTL_REG(0x10) -#define IXP2000_IRQ_ENABLE_SET IXP2000_INTCTL_REG(0x10) -#define IXP2000_IRQ_ENABLE_CLR IXP2000_INTCTL_REG(0x18) -#define IXP2000_FIQ_ENABLE_CLR IXP2000_INTCTL_REG(0x14) -#define IXP2000_IRQ_ERR_STATUS IXP2000_INTCTL_REG(0x24) -#define IXP2000_IRQ_ERR_ENABLE_SET IXP2000_INTCTL_REG(0x2c) -#define IXP2000_FIQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x30) -#define IXP2000_IRQ_ERR_ENABLE_CLR IXP2000_INTCTL_REG(0x34) -#define IXP2000_IRQ_THD_RAW_STATUS_A_0 IXP2000_INTCTL_REG(0x60) -#define IXP2000_IRQ_THD_RAW_STATUS_A_1 IXP2000_INTCTL_REG(0x64) -#define IXP2000_IRQ_THD_RAW_STATUS_A_2 IXP2000_INTCTL_REG(0x68) -#define IXP2000_IRQ_THD_RAW_STATUS_A_3 IXP2000_INTCTL_REG(0x6c) -#define IXP2000_IRQ_THD_RAW_STATUS_B_0 IXP2000_INTCTL_REG(0x80) -#define IXP2000_IRQ_THD_RAW_STATUS_B_1 IXP2000_INTCTL_REG(0x84) -#define IXP2000_IRQ_THD_RAW_STATUS_B_2 IXP2000_INTCTL_REG(0x88) -#define IXP2000_IRQ_THD_RAW_STATUS_B_3 IXP2000_INTCTL_REG(0x8c) -#define IXP2000_IRQ_THD_STATUS_A_0 IXP2000_INTCTL_REG(0xe0) -#define IXP2000_IRQ_THD_STATUS_A_1 IXP2000_INTCTL_REG(0xe4) -#define IXP2000_IRQ_THD_STATUS_A_2 IXP2000_INTCTL_REG(0xe8) -#define IXP2000_IRQ_THD_STATUS_A_3 IXP2000_INTCTL_REG(0xec) -#define IXP2000_IRQ_THD_STATUS_B_0 IXP2000_INTCTL_REG(0x100) -#define IXP2000_IRQ_THD_STATUS_B_1 IXP2000_INTCTL_REG(0x104) -#define IXP2000_IRQ_THD_STATUS_B_2 IXP2000_INTCTL_REG(0x108) -#define IXP2000_IRQ_THD_STATUS_B_3 IXP2000_INTCTL_REG(0x10c) -#define IXP2000_IRQ_THD_ENABLE_SET_A_0 IXP2000_INTCTL_REG(0x160) -#define IXP2000_IRQ_THD_ENABLE_SET_A_1 IXP2000_INTCTL_REG(0x164) -#define IXP2000_IRQ_THD_ENABLE_SET_A_2 IXP2000_INTCTL_REG(0x168) -#define IXP2000_IRQ_THD_ENABLE_SET_A_3 IXP2000_INTCTL_REG(0x16c) -#define IXP2000_IRQ_THD_ENABLE_SET_B_0 IXP2000_INTCTL_REG(0x180) -#define IXP2000_IRQ_THD_ENABLE_SET_B_1 IXP2000_INTCTL_REG(0x184) -#define IXP2000_IRQ_THD_ENABLE_SET_B_2 IXP2000_INTCTL_REG(0x188) -#define IXP2000_IRQ_THD_ENABLE_SET_B_3 IXP2000_INTCTL_REG(0x18c) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_0 IXP2000_INTCTL_REG(0x1e0) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_1 IXP2000_INTCTL_REG(0x1e4) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_2 IXP2000_INTCTL_REG(0x1e8) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_A_3 IXP2000_INTCTL_REG(0x1ec) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_0 IXP2000_INTCTL_REG(0x200) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_1 IXP2000_INTCTL_REG(0x204) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_2 IXP2000_INTCTL_REG(0x208) -#define IXP2000_IRQ_THD_ENABLE_CLEAR_B_3 IXP2000_INTCTL_REG(0x20c) - -/* - * Mask of valid IRQs in the 32-bit IRQ register. We use - * this to mark certain IRQs as being invalid. - */ -#define IXP2000_VALID_IRQ_MASK 0x0f0fffff - -/* - * PCI config register access from core - */ -#define IXP2000_PCI_CREG(x) (volatile unsigned long*)(IXP2000_PCI_CREG_VIRT_BASE | (x)) -#define IXP2000_PCI_CMDSTAT IXP2000_PCI_CREG(0x04) -#define IXP2000_PCI_CSR_BAR IXP2000_PCI_CREG(0x10) -#define IXP2000_PCI_SRAM_BAR IXP2000_PCI_CREG(0x14) -#define IXP2000_PCI_SDRAM_BAR IXP2000_PCI_CREG(0x18) - -/* - * PCI CSRs - */ -#define IXP2000_PCI_CSR(x) (volatile unsigned long*)(IXP2000_PCI_CSR_VIRT_BASE | (x)) - -/* - * PCI outbound interrupts - */ -#define IXP2000_PCI_OUT_INT_STATUS IXP2000_PCI_CSR(0x30) -#define IXP2000_PCI_OUT_INT_MASK IXP2000_PCI_CSR(0x34) -/* - * PCI communications - */ -#define IXP2000_PCI_MAILBOX0 IXP2000_PCI_CSR(0x50) -#define IXP2000_PCI_MAILBOX1 IXP2000_PCI_CSR(0x54) -#define IXP2000_PCI_MAILBOX2 IXP2000_PCI_CSR(0x58) -#define IXP2000_PCI_MAILBOX3 IXP2000_PCI_CSR(0x5C) -#define IXP2000_XSCALE_DOORBELL IXP2000_PCI_CSR(0x60) -#define IXP2000_XSCALE_DOORBELL_SETUP IXP2000_PCI_CSR(0x64) -#define IXP2000_PCI_DOORBELL IXP2000_PCI_CSR(0x70) -#define IXP2000_PCI_DOORBELL_SETUP IXP2000_PCI_CSR(0x74) - -/* - * DMA engines - */ -#define IXP2000_PCI_CH1_BYTE_CNT IXP2000_PCI_CSR(0x80) -#define IXP2000_PCI_CH1_ADDR IXP2000_PCI_CSR(0x84) -#define IXP2000_PCI_CH1_DRAM_ADDR IXP2000_PCI_CSR(0x88) -#define IXP2000_PCI_CH1_DESC_PTR IXP2000_PCI_CSR(0x8C) -#define IXP2000_PCI_CH1_CNTRL IXP2000_PCI_CSR(0x90) -#define IXP2000_PCI_CH1_ME_PARAM IXP2000_PCI_CSR(0x94) -#define IXP2000_PCI_CH2_BYTE_CNT IXP2000_PCI_CSR(0xA0) -#define IXP2000_PCI_CH2_ADDR IXP2000_PCI_CSR(0xA4) -#define IXP2000_PCI_CH2_DRAM_ADDR IXP2000_PCI_CSR(0xA8) -#define IXP2000_PCI_CH2_DESC_PTR IXP2000_PCI_CSR(0xAC) -#define IXP2000_PCI_CH2_CNTRL IXP2000_PCI_CSR(0xB0) -#define IXP2000_PCI_CH2_ME_PARAM IXP2000_PCI_CSR(0xB4) -#define IXP2000_PCI_CH3_BYTE_CNT IXP2000_PCI_CSR(0xC0) -#define IXP2000_PCI_CH3_ADDR IXP2000_PCI_CSR(0xC4) -#define IXP2000_PCI_CH3_DRAM_ADDR IXP2000_PCI_CSR(0xC8) -#define IXP2000_PCI_CH3_DESC_PTR IXP2000_PCI_CSR(0xCC) -#define IXP2000_PCI_CH3_CNTRL IXP2000_PCI_CSR(0xD0) -#define IXP2000_PCI_CH3_ME_PARAM IXP2000_PCI_CSR(0xD4) -#define IXP2000_DMA_INF_MODE IXP2000_PCI_CSR(0xE0) -/* - * Size masks for BARs - */ -#define IXP2000_PCI_SRAM_BASE_ADDR_MASK IXP2000_PCI_CSR(0xFC) -#define IXP2000_PCI_DRAM_BASE_ADDR_MASK IXP2000_PCI_CSR(0x100) -/* - * Control and uEngine related - */ -#define IXP2000_PCI_CONTROL IXP2000_PCI_CSR(0x13C) -#define IXP2000_PCI_ADDR_EXT IXP2000_PCI_CSR(0x140) -#define IXP2000_PCI_ME_PUSH_STATUS IXP2000_PCI_CSR(0x148) -#define IXP2000_PCI_ME_PUSH_EN IXP2000_PCI_CSR(0x14C) -#define IXP2000_PCI_ERR_STATUS IXP2000_PCI_CSR(0x150) -#define IXP2000_PCI_ERR_ENABLE IXP2000_PCI_CSR(0x154) -/* - * Inbound PCI interrupt control - */ -#define IXP2000_PCI_XSCALE_INT_STATUS IXP2000_PCI_CSR(0x158) -#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) - -#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ -#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */ -#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ - -/* These are from the IRQ register in the PCI ISR register */ -#define PCI_CONTROL_BE_DEO (1 << 22) /* Big Endian Data Enable Out */ -#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */ -#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */ -#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */ -#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */ - -#define IXP2000_PCI_RST_REL (1 << 2) -#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF) -#define CFG_PCI_BOOT_HOST (1 << 2) -#define CFG_BOOT_PROM (1 << 1) - -/* - * SlowPort CSRs - * - * The slowport is used to access things like flash, SONET framer control - * ports, slave microprocessors, CPLDs, and others of chip memory mapped - * peripherals. - */ -#define SLOWPORT_CSR(x) (volatile unsigned long*)(IXP2000_SLOWPORT_CSR_VIRT_BASE | (x)) - -#define IXP2000_SLOWPORT_CCR SLOWPORT_CSR(0x00) -#define IXP2000_SLOWPORT_WTC1 SLOWPORT_CSR(0x04) -#define IXP2000_SLOWPORT_WTC2 SLOWPORT_CSR(0x08) -#define IXP2000_SLOWPORT_RTC1 SLOWPORT_CSR(0x0c) -#define IXP2000_SLOWPORT_RTC2 SLOWPORT_CSR(0x10) -#define IXP2000_SLOWPORT_FSR SLOWPORT_CSR(0x14) -#define IXP2000_SLOWPORT_PCR SLOWPORT_CSR(0x18) -#define IXP2000_SLOWPORT_ADC SLOWPORT_CSR(0x1C) -#define IXP2000_SLOWPORT_FAC SLOWPORT_CSR(0x20) -#define IXP2000_SLOWPORT_FRM SLOWPORT_CSR(0x24) -#define IXP2000_SLOWPORT_FIN SLOWPORT_CSR(0x28) - -/* - * CCR values. - * The CCR configures the clock division for the slowport interface. - */ -#define SLOWPORT_CCR_DIV_1 0x00 -#define SLOWPORT_CCR_DIV_2 0x01 -#define SLOWPORT_CCR_DIV_4 0x02 -#define SLOWPORT_CCR_DIV_6 0x03 -#define SLOWPORT_CCR_DIV_8 0x04 -#define SLOWPORT_CCR_DIV_10 0x05 -#define SLOWPORT_CCR_DIV_12 0x06 -#define SLOWPORT_CCR_DIV_14 0x07 -#define SLOWPORT_CCR_DIV_16 0x08 -#define SLOWPORT_CCR_DIV_18 0x09 -#define SLOWPORT_CCR_DIV_20 0x0a -#define SLOWPORT_CCR_DIV_22 0x0b -#define SLOWPORT_CCR_DIV_24 0x0c -#define SLOWPORT_CCR_DIV_26 0x0d -#define SLOWPORT_CCR_DIV_28 0x0e -#define SLOWPORT_CCR_DIV_30 0x0f - -/* - * PCR values. PCR configure the mode of the interface. - */ -#define SLOWPORT_MODE_FLASH 0x00 -#define SLOWPORT_MODE_LUCENT 0x01 -#define SLOWPORT_MODE_PMC_SIERRA 0x02 -#define SLOWPORT_MODE_INTEL_UP 0x03 -#define SLOWPORT_MODE_MOTOROLA_UP 0x04 - -/* - * ADC values. Defines data and address bus widths. - */ -#define SLOWPORT_ADDR_WIDTH_8 0x00 -#define SLOWPORT_ADDR_WIDTH_16 0x01 -#define SLOWPORT_ADDR_WIDTH_24 0x02 -#define SLOWPORT_ADDR_WIDTH_32 0x03 -#define SLOWPORT_DATA_WIDTH_8 0x00 -#define SLOWPORT_DATA_WIDTH_16 0x10 -#define SLOWPORT_DATA_WIDTH_24 0x20 -#define SLOWPORT_DATA_WIDTH_32 0x30 - -/* - * Masks and shifts for various fields in the WTC and RTC registers. - */ -#define SLOWPORT_WRTC_MASK_HD 0x0003 -#define SLOWPORT_WRTC_MASK_PW 0x003c -#define SLOWPORT_WRTC_MASK_SU 0x03c0 - -#define SLOWPORT_WRTC_SHIFT_HD 0x00 -#define SLOWPORT_WRTC_SHIFT_SU 0x02 -#define SLOWPORT_WRTC_SHFIT_PW 0x06 - - -/* - * GPIO registers & GPIO interface. - */ -#define IXP2000_GPIO_REG(x) ((volatile unsigned long*)(IXP2000_GPIO_VIRT_BASE+(x))) -#define IXP2000_GPIO_PLR IXP2000_GPIO_REG(0x00) -#define IXP2000_GPIO_PDPR IXP2000_GPIO_REG(0x04) -#define IXP2000_GPIO_PDSR IXP2000_GPIO_REG(0x08) -#define IXP2000_GPIO_PDCR IXP2000_GPIO_REG(0x0c) -#define IXP2000_GPIO_POPR IXP2000_GPIO_REG(0x10) -#define IXP2000_GPIO_POSR IXP2000_GPIO_REG(0x14) -#define IXP2000_GPIO_POCR IXP2000_GPIO_REG(0x18) -#define IXP2000_GPIO_REDR IXP2000_GPIO_REG(0x1c) -#define IXP2000_GPIO_FEDR IXP2000_GPIO_REG(0x20) -#define IXP2000_GPIO_EDSR IXP2000_GPIO_REG(0x24) -#define IXP2000_GPIO_LSHR IXP2000_GPIO_REG(0x28) -#define IXP2000_GPIO_LSLR IXP2000_GPIO_REG(0x2c) -#define IXP2000_GPIO_LDSR IXP2000_GPIO_REG(0x30) -#define IXP2000_GPIO_INER IXP2000_GPIO_REG(0x34) -#define IXP2000_GPIO_INSR IXP2000_GPIO_REG(0x38) -#define IXP2000_GPIO_INCR IXP2000_GPIO_REG(0x3c) -#define IXP2000_GPIO_INST IXP2000_GPIO_REG(0x40) - -/* - * "Global" registers...whatever that's supposed to mean. - */ -#define GLOBAL_REG_BASE (IXP2000_GLOBAL_REG_VIRT_BASE + 0x0a00) -#define GLOBAL_REG(x) (volatile unsigned long*)(GLOBAL_REG_BASE | (x)) - -#define IXP2000_MAJ_PROD_TYPE_MASK 0x001F0000 -#define IXP2000_MAJ_PROD_TYPE_IXP2000 0x00000000 -#define IXP2000_MIN_PROD_TYPE_MASK 0x0000FF00 -#define IXP2000_MIN_PROD_TYPE_IXP2400 0x00000200 -#define IXP2000_MIN_PROD_TYPE_IXP2850 0x00000100 -#define IXP2000_MIN_PROD_TYPE_IXP2800 0x00000000 -#define IXP2000_MAJ_REV_MASK 0x000000F0 -#define IXP2000_MIN_REV_MASK 0x0000000F -#define IXP2000_PROD_ID_MASK 0xFFFFFFFF - -#define IXP2000_PRODUCT_ID GLOBAL_REG(0x00) -#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04) -#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08) -#define IXP2000_RESET0 GLOBAL_REG(0x0c) -#define IXP2000_RESET1 GLOBAL_REG(0x10) -#define IXP2000_CCR GLOBAL_REG(0x14) -#define IXP2000_STRAP_OPTIONS GLOBAL_REG(0x18) - -#define RSTALL (1 << 16) -#define WDT_RESET_ENABLE 0x01000000 - - -/* - * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF - * units, but the registers that differ between the two don't overlap, - * so we can have one register list for both. - */ -#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x))) -#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000) -#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004) -#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008) -#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c) -#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010) -#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014) -#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018) -#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024) -#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028) -#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c) -#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040) -#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044) -#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048) -#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048) -#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050) -#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054) -#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058) -#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060) -#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064) -#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068) -#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070) -#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070) -#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080) -#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084) -#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088) -#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c) -#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090) -#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094) -#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098) -#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c) -#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0) -#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4) -#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8) -#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000) -#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400) - - -#endif /* _IXP2000_H_ */ diff --git a/include/asm-arm/arch-ixp2000/memory.h b/include/asm-arm/arch-ixp2000/memory.h deleted file mode 100644 index 21e1de5..0000000 --- a/include/asm-arm/arch-ixp2000/memory.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/memory.h - * - * Copyright (c) 2002 Intel Corp. - * Copyright (c) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#include - -#define __virt_to_bus(v) \ - (((__virt_to_phys(v) - 0x0) + (*IXP2000_PCI_SDRAM_BAR & 0xfffffff0))) - -#define __bus_to_virt(b) \ - __phys_to_virt((((b - (*IXP2000_PCI_SDRAM_BAR & 0xfffffff0)) + 0x0))) - -#endif - diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h deleted file mode 100644 index a66317a..0000000 --- a/include/asm-arm/arch-ixp2000/platform.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * include/asm-arm/arch-ixp2000/platform.h - * - * Various bits of code used by platform-level code. - * - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - -#ifndef __ASSEMBLY__ - -static inline unsigned long ixp2000_reg_read(volatile void *reg) -{ - return *((volatile unsigned long *)reg); -} - -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) -{ - *((volatile unsigned long *)reg) = val; -} - -/* - * On the IXP2400, we can't use XCB=000 due to chip bugs. We use - * XCB=101 instead, but that makes all I/O accesses bufferable. This - * is not a problem in general, but we do have to be slightly more - * careful because I/O writes are no longer automatically flushed out - * of the write buffer. - * - * In cases where we want to make sure that a write has been flushed - * out of the write buffer before we proceed, for example when masking - * a device interrupt before re-enabling IRQs in CPSR, we can use this - * function, ixp2000_reg_wrb, which performs a write, a readback, and - * issues a dummy instruction dependent on the value of the readback - * (mov rX, rX) to make sure that the readback has completed before we - * continue. - */ -static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) -{ - unsigned long dummy; - - *((volatile unsigned long *)reg) = val; - - dummy = *((volatile unsigned long *)reg); - __asm__ __volatile__("mov %0, %0" : "+r" (dummy)); -} - -/* - * Boards may multiplex different devices on the 2nd channel of - * the slowport interface that each need different configuration - * settings. For example, the IXDP2400 uses channel 2 on the interface - * to access the CPLD, the switch fabric card, and the media card. Each - * one needs a different mode so drivers must save/restore the mode - * before and after each operation. - * - * acquire_slowport(&your_config); - * ... - * do slowport operations - * ... - * release_slowport(); - * - * Note that while you have the slowport, you are holding a spinlock, - * so your code should be written as if you explicitly acquired a lock. - * - * The configuration only affects device 2 on the slowport, so the - * MTD map driver does not acquire/release the slowport. - */ -struct slowport_cfg { - unsigned long CCR; /* Clock divide */ - unsigned long WTC; /* Write Timing Control */ - unsigned long RTC; /* Read Timing Control */ - unsigned long PCR; /* Protocol Control Register */ - unsigned long ADC; /* Address/Data Width Control */ -}; - - -void ixp2000_acquire_slowport(struct slowport_cfg *, struct slowport_cfg *); -void ixp2000_release_slowport(struct slowport_cfg *); - -/* - * IXP2400 A0/A1 and IXP2800 A0/A1/A2 have broken slowport that requires - * tweaking of addresses in the MTD driver. - */ -static inline unsigned ixp2000_has_broken_slowport(void) -{ - unsigned long id = *IXP2000_PRODUCT_ID; - unsigned long id_prod = id & (IXP2000_MAJ_PROD_TYPE_MASK | - IXP2000_MIN_PROD_TYPE_MASK); - return (((id_prod == - /* fixed in IXP2400-B0 */ - (IXP2000_MAJ_PROD_TYPE_IXP2000 | - IXP2000_MIN_PROD_TYPE_IXP2400)) && - ((id & IXP2000_MAJ_REV_MASK) == 0)) || - ((id_prod == - /* fixed in IXP2800-B0 */ - (IXP2000_MAJ_PROD_TYPE_IXP2000 | - IXP2000_MIN_PROD_TYPE_IXP2800)) && - ((id & IXP2000_MAJ_REV_MASK) == 0)) || - ((id_prod == - /* fixed in IXP2850-B0 */ - (IXP2000_MAJ_PROD_TYPE_IXP2000 | - IXP2000_MIN_PROD_TYPE_IXP2850)) && - ((id & IXP2000_MAJ_REV_MASK) == 0))); -} - -static inline unsigned int ixp2000_has_flash(void) -{ - return ((*IXP2000_STRAP_OPTIONS) & (CFG_BOOT_PROM)); -} - -static inline unsigned int ixp2000_is_pcimaster(void) -{ - return ((*IXP2000_STRAP_OPTIONS) & (CFG_PCI_BOOT_HOST)); -} - -void ixp2000_map_io(void); -void ixp2000_uart_init(void); -void ixp2000_init_irq(void); -void ixp2000_init_time(unsigned long); -unsigned long ixp2000_gettimeoffset(void); - -struct pci_sys_data; - -u32 *ixp2000_pci_config_addr(unsigned int bus, unsigned int devfn, int where); -void ixp2000_pci_preinit(void); -int ixp2000_pci_setup(int, struct pci_sys_data*); -struct pci_bus* ixp2000_pci_scan_bus(int, struct pci_sys_data*); -int ixp2000_pci_read_config(struct pci_bus*, unsigned int, int, int, u32 *); -int ixp2000_pci_write_config(struct pci_bus*, unsigned int, int, int, u32); - -/* - * Several of the IXP2000 systems have banked flash so we need to extend the - * flash_platform_data structure with some private pointers - */ -struct ixp2000_flash_data { - struct flash_platform_data *platform_data; - int nr_banks; - unsigned long (*bank_setup)(unsigned long); -}; - -struct ixp2000_i2c_pins { - unsigned long sda_pin; - unsigned long scl_pin; -}; - - -#endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/arch-ixp2000/system.h b/include/asm-arm/arch-ixp2000/system.h deleted file mode 100644 index 8731dd3..0000000 --- a/include/asm-arm/arch-ixp2000/system.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/system.h - * - * Copyright (C) 2002 Intel Corp. - * Copyricht (C) 2003-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - local_irq_disable(); - - /* - * Reset flash banking register so that we are pointing at - * RedBoot bank. - */ - if (machine_is_ixdp2401()) { - ixp2000_reg_write(IXDP2X01_CPLD_FLASH_REG, - ((0 >> IXDP2X01_FLASH_WINDOW_BITS) - | IXDP2X01_CPLD_FLASH_INTERN)); - ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0xffffffff); - } - - /* - * On IXDP2801 we need to write this magic sequence to the CPLD - * to cause a complete reset of the CPU and all external devices - * and move the flash bank register back to 0. - */ - if (machine_is_ixdp2801() || machine_is_ixdp28x5()) { - unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG; - - reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF); - ixp2000_reg_write(IXDP2X01_CPLD_RESET_REG, reset_reg); - ixp2000_reg_wrb(IXDP2X01_CPLD_RESET_REG, 0x80000000); - } - - ixp2000_reg_wrb(IXP2000_RESET0, RSTALL); -} diff --git a/include/asm-arm/arch-ixp2000/timex.h b/include/asm-arm/arch-ixp2000/timex.h deleted file mode 100644 index b78a183..0000000 --- a/include/asm-arm/arch-ixp2000/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/timex.h - * - * IXP2000 architecture timex specifications - */ - - -/* - * Default clock is 50MHz APB, but platform code can override this - */ -#define CLOCK_TICK_RATE 50000000 - - diff --git a/include/asm-arm/arch-ixp2000/uncompress.h b/include/asm-arm/arch-ixp2000/uncompress.h deleted file mode 100644 index f66b408..0000000 --- a/include/asm-arm/arch-ixp2000/uncompress.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/uncompress.h - * - * - * Original Author: Naeem Afzal - * Maintainer: Deepak Saxena - * - * Copyright 2002 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - */ - -#include - -#define UART_BASE 0xc0030000 - -#define PHYS(x) ((volatile unsigned long *)(UART_BASE + x)) - -#define UARTDR PHYS(0x00) /* Transmit reg dlab=0 */ -#define UARTDLL PHYS(0x00) /* Divisor Latch reg dlab=1*/ -#define UARTDLM PHYS(0x04) /* Divisor Latch reg dlab=1*/ -#define UARTIER PHYS(0x04) /* Interrupt enable reg */ -#define UARTFCR PHYS(0x08) /* FIFO control reg dlab =0*/ -#define UARTLCR PHYS(0x0c) /* Control reg */ -#define UARTSR PHYS(0x14) /* Status reg */ - - -static inline void putc(int c) -{ - int j = 0x1000; - - while (--j && !(*UARTSR & UART_LSR_THRE)) - barrier(); - - *UARTDR = c; -} - -static inline void flush(void) -{ -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-ixp2000/vmalloc.h b/include/asm-arm/arch-ixp2000/vmalloc.h deleted file mode 100644 index 2751369..0000000 --- a/include/asm-arm/arch-ixp2000/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp2000/vmalloc.h - * - * Author: Naeem Afzal - * - * Copyright 2002 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - */ -#define VMALLOC_END 0xfb000000 diff --git a/include/asm-arm/arch-ixp23xx/debug-macro.S b/include/asm-arm/arch-ixp23xx/debug-macro.S deleted file mode 100644 index 2b25e64..0000000 --- a/include/asm-arm/arch-ixp23xx/debug-macro.S +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ mmu enabled? - ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical - ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual -#ifdef __ARMEB__ - orr \rx, \rx, #0x00000003 -#endif - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-ixp23xx/dma.h b/include/asm-arm/arch-ixp23xx/dma.h deleted file mode 100644 index 2f4335e..0000000 --- a/include/asm-arm/arch-ixp23xx/dma.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/dma.h - */ diff --git a/include/asm-arm/arch-ixp23xx/entry-macro.S b/include/asm-arm/arch-ixp23xx/entry-macro.S deleted file mode 100644 index ec9dd6f..0000000 --- a/include/asm-arm/arch-ixp23xx/entry-macro.S +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/entry-macro.S - */ - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) - ldr \irqnr, [\irqnr] @ get interrupt number - cmp \irqnr, #0x0 @ spurious interrupt ? - movne \irqnr, \irqnr, lsr #2 @ skip unwanted low order bits - subne \irqnr, \irqnr, #1 @ convert to 0 based - -#if 0 - cmp \irqnr, #IRQ_IXP23XX_PCI_INT_RPH - bne 1001f - mov \irqnr, #IRQ_IXP23XX_INTA - - ldr \irqnr, =0xf5000030 - - mov \tmp, #(1<<26) - tst \irqnr, \tmp - movne \irqnr, #IRQ_IXP23XX_INTB - - mov \tmp, #(1<<27) - tst \irqnr, \tmp - movne \irqnr, #IRQ_IXP23XX_INTA -1001: -#endif - .endm diff --git a/include/asm-arm/arch-ixp23xx/hardware.h b/include/asm-arm/arch-ixp23xx/hardware.h deleted file mode 100644 index c0010d2..0000000 --- a/include/asm-arm/arch-ixp23xx/hardware.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/hardware.h - * - * Copyright (C) 2002-2004 Intel Corporation. - * Copyricht (C) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Hardware definitions for IXP23XX based systems - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* PCI IO info */ -#define PCIO_BASE IXP23XX_PCI_IO_VIRT -#define PCIBIOS_MIN_IO 0x00000000 -#define PCIBIOS_MIN_MEM 0xe0000000 - -#include "ixp23xx.h" - -#define pcibios_assign_all_busses() 0 - -/* - * Platform helper functions - */ -#include "platform.h" - -/* - * Platform-specific headers - */ -#include "ixdp2351.h" - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/io.h b/include/asm-arm/arch-ixp23xx/io.h deleted file mode 100644 index 66f5baf..0000000 --- a/include/asm-arm/arch-ixp23xx/io.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/io.h - * - * Original Author: Naeem M Afzal - * Maintainer: Deepak Saxena - * - * Copyright (C) 2003-2005 Intel Corp. - * Copyright (C) 2005 MontaVista Software, Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(p) ((void __iomem*)((p) + IXP23XX_PCI_IO_VIRT)) -#define __mem_pci(a) (a) - -#include /* For BUG */ - -static inline void __iomem * -ixp23xx_ioremap(unsigned long addr, unsigned long size, unsigned int mtype) -{ - if (addr >= IXP23XX_PCI_MEM_START && - addr <= IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) { - if (addr + size > IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE) - return NULL; - - return (void __iomem *) - ((addr - IXP23XX_PCI_MEM_START) + IXP23XX_PCI_MEM_VIRT); - } - - return __arm_ioremap(addr, size, mtype); -} - -static inline void -ixp23xx_iounmap(void __iomem *addr) -{ - if ((((u32)addr) >= IXP23XX_PCI_MEM_VIRT) && - (((u32)addr) < IXP23XX_PCI_MEM_VIRT + IXP23XX_PCI_MEM_SIZE)) - return; - - __iounmap(addr); -} - -#define __arch_ioremap(a,s,f) ixp23xx_ioremap(a,s,f) -#define __arch_iounmap(a) ixp23xx_iounmap(a) - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/irqs.h b/include/asm-arm/arch-ixp23xx/irqs.h deleted file mode 100644 index 27c5808..0000000 --- a/include/asm-arm/arch-ixp23xx/irqs.h +++ /dev/null @@ -1,223 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/irqs.h - * - * IRQ definitions for IXP23XX based systems - * - * Author: Naeem Afzal - * - * Copyright (C) 2003-2004 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#define NR_IXP23XX_IRQS IRQ_IXP23XX_INTB+1 -#define IRQ_IXP23XX_EXTIRQS NR_IXP23XX_IRQS - - -#define IRQ_IXP23XX_DBG0 0 /* Debug/Execution/MBox */ -#define IRQ_IXP23XX_DBG1 1 /* Debug/Execution/MBox */ -#define IRQ_IXP23XX_NPE_TRG 2 /* npe_trigger */ -#define IRQ_IXP23XX_TIMER1 3 /* Timer[0] */ -#define IRQ_IXP23XX_TIMER2 4 /* Timer[1] */ -#define IRQ_IXP23XX_TIMESTAMP 5 /* Timer[2], Time-stamp */ -#define IRQ_IXP23XX_WDOG 6 /* Time[3], Watchdog Timer */ -#define IRQ_IXP23XX_PCI_DBELL 7 /* PCI Doorbell */ -#define IRQ_IXP23XX_PCI_DMA1 8 /* PCI DMA Channel 1 */ -#define IRQ_IXP23XX_PCI_DMA2 9 /* PCI DMA Channel 2 */ -#define IRQ_IXP23XX_PCI_DMA3 10 /* PCI DMA Channel 3 */ -#define IRQ_IXP23XX_PCI_INT_RPH 11 /* pcxg_pci_int_rph */ -#define IRQ_IXP23XX_CPP_PMU 12 /* xpxg_pm_int_rpl */ -#define IRQ_IXP23XX_SWINT0 13 /* S/W Interrupt0 */ -#define IRQ_IXP23XX_SWINT1 14 /* S/W Interrupt1 */ -#define IRQ_IXP23XX_UART2 15 /* UART1 Interrupt */ -#define IRQ_IXP23XX_UART1 16 /* UART0 Interrupt */ -#define IRQ_IXP23XX_XSI_PMU_ROLLOVER 17 /* AHB Performance M. Unit counter rollover */ -#define IRQ_IXP23XX_XSI_AHB_PM0 18 /* intr_pm_o */ -#define IRQ_IXP23XX_XSI_AHB_ECE0 19 /* intr_ece_o */ -#define IRQ_IXP23XX_XSI_AHB_GASKET 20 /* gas_intr_o */ -#define IRQ_IXP23XX_XSI_CPP 21 /* xsi2cpp_int */ -#define IRQ_IXP23XX_CPP_XSI 22 /* cpp2xsi_int */ -#define IRQ_IXP23XX_ME_ATTN0 23 /* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN1 24 /* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN2 25 /* ME_ATTN */ -#define IRQ_IXP23XX_ME_ATTN3 26 /* ME_ATTN */ -#define IRQ_IXP23XX_PCI_ERR_RPH 27 /* PCXG_PCI_ERR_RPH */ -#define IRQ_IXP23XX_D0XG_ECC_CORR 28 /* D0XG_DRAM_ECC_CORR */ -#define IRQ_IXP23XX_D0XG_ECC_UNCORR 29 /* D0XG_DRAM_ECC_UNCORR */ -#define IRQ_IXP23XX_SRAM_ERR1 30 /* SRAM1_ERR */ -#define IRQ_IXP23XX_SRAM_ERR0 31 /* SRAM0_ERR */ -#define IRQ_IXP23XX_MEDIA_ERR 32 /* MEDIA_ERR */ -#define IRQ_IXP23XX_STH_DRAM_ECC_MAJ 33 /* STH_DRAM0_ECC_MAJ */ -#define IRQ_IXP23XX_GPIO6 34 /* GPIO0 interrupts */ -#define IRQ_IXP23XX_GPIO7 35 /* GPIO1 interrupts */ -#define IRQ_IXP23XX_GPIO8 36 /* GPIO2 interrupts */ -#define IRQ_IXP23XX_GPIO9 37 /* GPIO3 interrupts */ -#define IRQ_IXP23XX_GPIO10 38 /* GPIO4 interrupts */ -#define IRQ_IXP23XX_GPIO11 39 /* GPIO5 interrupts */ -#define IRQ_IXP23XX_GPIO12 40 /* GPIO6 interrupts */ -#define IRQ_IXP23XX_GPIO13 41 /* GPIO7 interrupts */ -#define IRQ_IXP23XX_GPIO14 42 /* GPIO8 interrupts */ -#define IRQ_IXP23XX_GPIO15 43 /* GPIO9 interrupts */ -#define IRQ_IXP23XX_SHAC_RING0 44 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING1 45 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING2 46 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING3 47 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING4 48 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING5 49 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING6 50 /* SHAC RING Full */ -#define IRQ_IXP23XX_SHAC_RING7 51 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING8 52 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING9 53 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING10 54 /* SHAC Ring Full */ -#define IRQ_IXP23XX_SHAC_RING11 55 /* SHAC Ring Full */ -#define IRQ_IXP23XX_ME_THREAD_A0_ME0 56 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A1_ME0 57 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A2_ME0 58 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A3_ME0 59 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A4_ME0 60 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A5_ME0 61 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A6_ME0 62 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A7_ME0 63 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A8_ME1 64 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A9_ME1 65 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A10_ME1 66 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A11_ME1 67 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A12_ME1 68 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A13_ME1 69 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A14_ME1 70 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A15_ME1 71 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A16_ME2 72 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A17_ME2 73 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A18_ME2 74 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A19_ME2 75 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A20_ME2 76 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A21_ME2 77 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A22_ME2 78 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A23_ME2 79 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A24_ME3 80 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A25_ME3 81 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A26_ME3 82 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A27_ME3 83 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A28_ME3 84 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A29_ME3 85 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A30_ME3 86 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_A31_ME3 87 /* ME_THREAD_A */ -#define IRQ_IXP23XX_ME_THREAD_B0_ME0 88 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B1_ME0 89 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B2_ME0 90 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B3_ME0 91 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B4_ME0 92 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B5_ME0 93 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B6_ME0 94 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B7_ME0 95 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B8_ME1 96 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B9_ME1 97 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B10_ME1 98 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B11_ME1 99 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B12_ME1 100 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B13_ME1 101 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B14_ME1 102 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B15_ME1 103 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B16_ME2 104 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B17_ME2 105 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B18_ME2 106 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B19_ME2 107 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B20_ME2 108 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B21_ME2 109 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B22_ME2 110 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B23_ME2 111 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B24_ME3 112 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B25_ME3 113 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B26_ME3 114 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B27_ME3 115 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B28_ME3 116 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B29_ME3 117 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B30_ME3 118 /* ME_THREAD_B */ -#define IRQ_IXP23XX_ME_THREAD_B31_ME3 119 /* ME_THREAD_B */ - -#define NUM_IXP23XX_RAW_IRQS 120 - -#define IRQ_IXP23XX_INTA 120 /* Indirect pcxg_pci_int_rph */ -#define IRQ_IXP23XX_INTB 121 /* Indirect pcxg_pci_int_rph */ - -#define NR_IXP23XX_IRQ (IRQ_IXP23XX_INTB + 1) - -/* - * We default to 32 per-board IRQs. Increase this number if you need - * more, but keep it realistic. - */ -#define NR_IXP23XX_MACH_IRQS 32 - -#define NR_IRQS (NR_IXP23XX_IRQS + NR_IXP23XX_MACH_IRQS) - -#define IXP23XX_MACH_IRQ(irq) (NR_IXP23XX_IRQ + (irq)) - - -/* - * IXDP2351-specific interrupts - */ - -/* - * External PCI interrupts signaled through INTB - * - */ -#define IXDP2351_INTB_IRQ_BASE 0 -#define IRQ_IXDP2351_INTA_82546 IXP23XX_MACH_IRQ(0) -#define IRQ_IXDP2351_INTB_82546 IXP23XX_MACH_IRQ(1) -#define IRQ_IXDP2351_SPCI_DB_0 IXP23XX_MACH_IRQ(2) -#define IRQ_IXDP2351_SPCI_DB_1 IXP23XX_MACH_IRQ(3) -#define IRQ_IXDP2351_SPCI_PMC_INTA IXP23XX_MACH_IRQ(4) -#define IRQ_IXDP2351_SPCI_PMC_INTB IXP23XX_MACH_IRQ(5) -#define IRQ_IXDP2351_SPCI_PMC_INTC IXP23XX_MACH_IRQ(6) -#define IRQ_IXDP2351_SPCI_PMC_INTD IXP23XX_MACH_IRQ(7) -#define IRQ_IXDP2351_SPCI_FIC IXP23XX_MACH_IRQ(8) - -#define IXDP2351_INTB_IRQ_BIT(irq) (irq - IXP23XX_MACH_IRQ(0)) -#define IXDP2351_INTB_IRQ_MASK(irq) (1 << IXDP2351_INTB_IRQ_BIT(irq)) -#define IXDP2351_INTB_IRQ_VALID 0x01FF -#define IXDP2351_INTB_IRQ_NUM 16 - -/* - * Other external interrupts signaled through INTA - */ -#define IXDP2351_INTA_IRQ_BASE 16 -#define IRQ_IXDP2351_IPMI_FROM IXP23XX_MACH_IRQ(16) -#define IRQ_IXDP2351_125US IXP23XX_MACH_IRQ(17) -#define IRQ_IXDP2351_DB_0_ADD IXP23XX_MACH_IRQ(18) -#define IRQ_IXDP2351_DB_1_ADD IXP23XX_MACH_IRQ(19) -#define IRQ_IXDP2351_DEBUG1 IXP23XX_MACH_IRQ(20) -#define IRQ_IXDP2351_ADD_UART IXP23XX_MACH_IRQ(21) -#define IRQ_IXDP2351_FIC_ADD IXP23XX_MACH_IRQ(24) -#define IRQ_IXDP2351_CS8900 IXP23XX_MACH_IRQ(25) -#define IRQ_IXDP2351_BBSRAM IXP23XX_MACH_IRQ(26) -#define IRQ_IXDP2351_CONFIG_MEDIA IXP23XX_MACH_IRQ(27) -#define IRQ_IXDP2351_CLOCK_REF IXP23XX_MACH_IRQ(28) -#define IRQ_IXDP2351_A10_NP IXP23XX_MACH_IRQ(29) -#define IRQ_IXDP2351_A11_NP IXP23XX_MACH_IRQ(30) -#define IRQ_IXDP2351_DEBUG_NP IXP23XX_MACH_IRQ(31) - -#define IXDP2351_INTA_IRQ_BIT(irq) (irq - IXP23XX_MACH_IRQ(16)) -#define IXDP2351_INTA_IRQ_MASK(irq) (1 << IXDP2351_INTA_IRQ_BIT(irq)) -#define IXDP2351_INTA_IRQ_VALID 0xFF3F -#define IXDP2351_INTA_IRQ_NUM 16 - - -/* - * ADI RoadRunner IRQs - */ -#define IRQ_ROADRUNNER_PCI_INTA IRQ_IXP23XX_INTA -#define IRQ_ROADRUNNER_PCI_INTB IRQ_IXP23XX_INTB -#define IRQ_ROADRUNNER_PCI_INTC IRQ_IXP23XX_GPIO11 -#define IRQ_ROADRUNNER_PCI_INTD IRQ_IXP23XX_GPIO12 - -/* - * Put new board definitions here - */ - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/ixdp2351.h b/include/asm-arm/arch-ixp23xx/ixdp2351.h deleted file mode 100644 index d5e8a43..0000000 --- a/include/asm-arm/arch-ixp23xx/ixdp2351.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/ixdp2351.h - * - * Register and other defines for IXDP2351 - * - * Copyright (c) 2002-2004 Intel Corp. - * Copytight (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_IXDP2351_H -#define __ASM_ARCH_IXDP2351_H - -/* - * NP module memory map - */ -#define IXDP2351_NP_PHYS_BASE (IXP23XX_EXP_BUS_CS4_BASE) -#define IXDP2351_NP_PHYS_SIZE 0x00100000 -#define IXDP2351_NP_VIRT_BASE 0xeff00000 - -#define IXDP2351_VIRT_CS8900_BASE (IXDP2351_NP_VIRT_BASE) -#define IXDP2351_VIRT_CS8900_END (IXDP2351_VIRT_CS8900_BASE + 16) - -#define IXDP2351_VIRT_NP_CPLD_BASE (IXP23XX_EXP_BUS_CS4_BASE_VIRT + 0x00010000) - -#define IXDP2351_NP_CPLD_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_NP_CPLD_BASE + reg)) - -#define IXDP2351_NP_CPLD_RESET1_REG IXDP2351_NP_CPLD_REG(0x00) -#define IXDP2351_NP_CPLD_LED_REG IXDP2351_NP_CPLD_REG(0x02) -#define IXDP2351_NP_CPLD_VERSION_REG IXDP2351_NP_CPLD_REG(0x04) - -/* - * Base board module memory map - */ - -#define IXDP2351_BB_BASE_PHYS (IXP23XX_EXP_BUS_CS5_BASE) -#define IXDP2351_BB_SIZE 0x01000000 -#define IXDP2351_BB_BASE_VIRT (0xee000000) - -#define IXDP2351_BB_AREA_BASE(offset) (IXDP2351_BB_BASE_VIRT + offset) - -#define IXDP2351_VIRT_NVRAM_BASE IXDP2351_BB_AREA_BASE(0x0) -#define IXDP2351_NVRAM_SIZE (0x20000) - -#define IXDP2351_VIRT_MB_IXF1104_BASE IXDP2351_BB_AREA_BASE(0x00020000) -#define IXDP2351_VIRT_ADD_UART_BASE IXDP2351_BB_AREA_BASE(0x000240C0) -#define IXDP2351_VIRT_FIC_BASE IXDP2351_BB_AREA_BASE(0x00200000) -#define IXDP2351_VIRT_DB0_BASE IXDP2351_BB_AREA_BASE(0x00400000) -#define IXDP2351_VIRT_DB1_BASE IXDP2351_BB_AREA_BASE(0x00600000) -#define IXDP2351_VIRT_CPLD_BASE IXDP2351_BB_AREA_BASE(0x00024000) - -/* - * On board CPLD registers - */ -#define IXDP2351_CPLD_BB_REG(reg) ((volatile u16 *)(IXDP2351_VIRT_CPLD_BASE + reg)) - -#define IXDP2351_CPLD_RESET0_REG IXDP2351_CPLD_BB_REG(0x00) -#define IXDP2351_CPLD_RESET1_REG IXDP2351_CPLD_BB_REG(0x04) - -#define IXDP2351_CPLD_RESET1_MAGIC 0x55AA -#define IXDP2351_CPLD_RESET1_ENABLE 0x8000 - -#define IXDP2351_CPLD_FPGA_CONFIG_REG IXDP2351_CPLD_BB_REG(0x08) -#define IXDP2351_CPLD_INTB_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x10) -#define IXDP2351_CPLD_INTA_MASK_SET_REG IXDP2351_CPLD_BB_REG(0x14) -#define IXDP2351_CPLD_INTB_STAT_REG IXDP2351_CPLD_BB_REG(0x18) -#define IXDP2351_CPLD_INTA_STAT_REG IXDP2351_CPLD_BB_REG(0x1C) -#define IXDP2351_CPLD_INTB_RAW_REG IXDP2351_CPLD_BB_REG(0x20) /* read */ -#define IXDP2351_CPLD_INTA_RAW_REG IXDP2351_CPLD_BB_REG(0x24) /* read */ -#define IXDP2351_CPLD_INTB_MASK_CLR_REG IXDP2351_CPLD_INTB_RAW_REG /* write */ -#define IXDP2351_CPLD_INTA_MASK_CLR_REG IXDP2351_CPLD_INTA_RAW_REG /* write */ -#define IXDP2351_CPLD_INTB_SIM_REG IXDP2351_CPLD_BB_REG(0x28) -#define IXDP2351_CPLD_INTA_SIM_REG IXDP2351_CPLD_BB_REG(0x2C) - /* Interrupt bits are defined in irqs.h */ -#define IXDP2351_CPLD_BB_GBE0_REG IXDP2351_CPLD_BB_REG(0x30) -#define IXDP2351_CPLD_BB_GBE1_REG IXDP2351_CPLD_BB_REG(0x34) - -/* #define IXDP2351_CPLD_BB_MISC_REG IXDP2351_CPLD_REG(0x1C) */ -/* #define IXDP2351_CPLD_BB_MISC_REV_MASK 0xFF */ -/* #define IXDP2351_CPLD_BB_GDXCS0_REG IXDP2351_CPLD_REG(0x24) */ -/* #define IXDP2351_CPLD_BB_GDXCS1_REG IXDP2351_CPLD_REG(0x28) */ -/* #define IXDP2351_CPLD_BB_CLOCK_REG IXDP2351_CPLD_REG(0x04) */ - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h deleted file mode 100644 index 3927b1d..0000000 --- a/include/asm-arm/arch-ixp23xx/ixp23xx.h +++ /dev/null @@ -1,298 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/ixp23xx.h - * - * Register definitions for IXP23XX - * - * Copyright (C) 2003-2005 Intel Corporation. - * Copyright (C) 2005 MontaVista Software, Inc. - * - * Maintainer: Deepak Saxena - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IXP23XX_H -#define __ASM_ARCH_IXP23XX_H - -/* - * IXP2300 linux memory map: - * - * virt phys size - * fffd0000 a0000000 64K XSI2CPP_CSR - * fffc0000 c4000000 4K EXP_CFG - * fff00000 c8000000 64K PERIPHERAL - * fe000000 1c0000000 16M CAP_CSR - * fd000000 1c8000000 16M MSF_CSR - * fb000000 16M --- - * fa000000 1d8000000 32M PCI_IO - * f8000000 1da000000 32M PCI_CFG - * f6000000 1de000000 32M PCI_CREG - * f4000000 32M --- - * f0000000 1e0000000 64M PCI_MEM - * e[c-f]000000 per-platform mappings - */ - - -/**************************************************************************** - * Static mappings. - ****************************************************************************/ -#define IXP23XX_XSI2CPP_CSR_PHYS 0xa0000000 -#define IXP23XX_XSI2CPP_CSR_VIRT 0xfffd0000 -#define IXP23XX_XSI2CPP_CSR_SIZE 0x00010000 - -#define IXP23XX_EXP_CFG_PHYS 0xc4000000 -#define IXP23XX_EXP_CFG_VIRT 0xfffc0000 -#define IXP23XX_EXP_CFG_SIZE 0x00001000 - -#define IXP23XX_PERIPHERAL_PHYS 0xc8000000 -#define IXP23XX_PERIPHERAL_VIRT 0xfff00000 -#define IXP23XX_PERIPHERAL_SIZE 0x00010000 - -#define IXP23XX_CAP_CSR_PHYS 0x1c0000000ULL -#define IXP23XX_CAP_CSR_VIRT 0xfe000000 -#define IXP23XX_CAP_CSR_SIZE 0x01000000 - -#define IXP23XX_MSF_CSR_PHYS 0x1c8000000ULL -#define IXP23XX_MSF_CSR_VIRT 0xfd000000 -#define IXP23XX_MSF_CSR_SIZE 0x01000000 - -#define IXP23XX_PCI_IO_PHYS 0x1d8000000ULL -#define IXP23XX_PCI_IO_VIRT 0xfa000000 -#define IXP23XX_PCI_IO_SIZE 0x02000000 - -#define IXP23XX_PCI_CFG_PHYS 0x1da000000ULL -#define IXP23XX_PCI_CFG_VIRT 0xf8000000 -#define IXP23XX_PCI_CFG_SIZE 0x02000000 -#define IXP23XX_PCI_CFG0_VIRT IXP23XX_PCI_CFG_VIRT -#define IXP23XX_PCI_CFG1_VIRT (IXP23XX_PCI_CFG_VIRT + 0x01000000) - -#define IXP23XX_PCI_CREG_PHYS 0x1de000000ULL -#define IXP23XX_PCI_CREG_VIRT 0xf6000000 -#define IXP23XX_PCI_CREG_SIZE 0x02000000 -#define IXP23XX_PCI_CSR_VIRT (IXP23XX_PCI_CREG_VIRT + 0x01000000) - -#define IXP23XX_PCI_MEM_START 0xe0000000 -#define IXP23XX_PCI_MEM_PHYS 0x1e0000000ULL -#define IXP23XX_PCI_MEM_VIRT 0xf0000000 -#define IXP23XX_PCI_MEM_SIZE 0x04000000 - - -/**************************************************************************** - * XSI2CPP CSRs. - ****************************************************************************/ -#define IXP23XX_XSI2CPP_REG(x) ((volatile unsigned long *)(IXP23XX_XSI2CPP_CSR_VIRT + (x))) -#define IXP23XX_CPP2XSI_CURR_XFER_REG3 IXP23XX_XSI2CPP_REG(0xf8) -#define IXP23XX_CPP2XSI_ADDR_31 (1 << 19) -#define IXP23XX_CPP2XSI_PSH_OFF (1 << 20) -#define IXP23XX_CPP2XSI_COH_OFF (1 << 21) - - -/**************************************************************************** - * Expansion Bus Config. - ****************************************************************************/ -#define IXP23XX_EXP_CFG_REG(x) ((volatile unsigned long *)(IXP23XX_EXP_CFG_VIRT + (x))) -#define IXP23XX_EXP_CS0 IXP23XX_EXP_CFG_REG(0x00) -#define IXP23XX_EXP_CS1 IXP23XX_EXP_CFG_REG(0x04) -#define IXP23XX_EXP_CS2 IXP23XX_EXP_CFG_REG(0x08) -#define IXP23XX_EXP_CS3 IXP23XX_EXP_CFG_REG(0x0c) -#define IXP23XX_EXP_CS4 IXP23XX_EXP_CFG_REG(0x10) -#define IXP23XX_EXP_CS5 IXP23XX_EXP_CFG_REG(0x14) -#define IXP23XX_EXP_CS6 IXP23XX_EXP_CFG_REG(0x18) -#define IXP23XX_EXP_CS7 IXP23XX_EXP_CFG_REG(0x1c) -#define IXP23XX_FLASH_WRITABLE (0x2) -#define IXP23XX_FLASH_BUS8 (0x1) - -#define IXP23XX_EXP_CFG0 IXP23XX_EXP_CFG_REG(0x20) -#define IXP23XX_EXP_CFG1 IXP23XX_EXP_CFG_REG(0x24) -#define IXP23XX_EXP_CFG0_MEM_MAP (1 << 31) -#define IXP23XX_EXP_CFG0_XSCALE_SPEED_SEL (3 << 22) -#define IXP23XX_EXP_CFG0_XSCALE_SPEED_EN (1 << 21) -#define IXP23XX_EXP_CFG0_CPP_SPEED_SEL (3 << 19) -#define IXP23XX_EXP_CFG0_CPP_SPEED_EN (1 << 18) -#define IXP23XX_EXP_CFG0_PCI_SWIN (3 << 16) -#define IXP23XX_EXP_CFG0_PCI_DWIN (3 << 14) -#define IXP23XX_EXP_CFG0_PCI33_MODE (1 << 13) -#define IXP23XX_EXP_CFG0_QDR_SPEED_SEL (1 << 12) -#define IXP23XX_EXP_CFG0_CPP_DIV_SEL (1 << 5) -#define IXP23XX_EXP_CFG0_XSI_NOT_PRES (1 << 4) -#define IXP23XX_EXP_CFG0_PROM_BOOT (1 << 3) -#define IXP23XX_EXP_CFG0_PCI_ARB (1 << 2) -#define IXP23XX_EXP_CFG0_PCI_HOST (1 << 1) -#define IXP23XX_EXP_CFG0_FLASH_WIDTH (1 << 0) - -#define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) -#define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) -#define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34) - -#define IXP23XX_EXP_BUS_PHYS 0x90000000 -#define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 - -#define IXP23XX_EXP_BUS_CS0_BASE (IXP23XX_EXP_BUS_PHYS + 0x00000000) -#define IXP23XX_EXP_BUS_CS1_BASE (IXP23XX_EXP_BUS_PHYS + 0x01000000) -#define IXP23XX_EXP_BUS_CS2_BASE (IXP23XX_EXP_BUS_PHYS + 0x02000000) -#define IXP23XX_EXP_BUS_CS3_BASE (IXP23XX_EXP_BUS_PHYS + 0x03000000) -#define IXP23XX_EXP_BUS_CS4_BASE (IXP23XX_EXP_BUS_PHYS + 0x04000000) -#define IXP23XX_EXP_BUS_CS5_BASE (IXP23XX_EXP_BUS_PHYS + 0x05000000) -#define IXP23XX_EXP_BUS_CS6_BASE (IXP23XX_EXP_BUS_PHYS + 0x06000000) -#define IXP23XX_EXP_BUS_CS7_BASE (IXP23XX_EXP_BUS_PHYS + 0x07000000) - - -/**************************************************************************** - * Peripherals. - ****************************************************************************/ -#define IXP23XX_UART1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x0000) -#define IXP23XX_UART2_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x1000) -#define IXP23XX_PMU_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x2000) -#define IXP23XX_INTC_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x3000) -#define IXP23XX_GPIO_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x4000) -#define IXP23XX_TIMER_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x5000) -#define IXP23XX_NPE0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x6000) -#define IXP23XX_DSR_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x7000) -#define IXP23XX_NPE1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x8000) -#define IXP23XX_ETH0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0x9000) -#define IXP23XX_ETH1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xA000) -#define IXP23XX_GIG0_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xB000) -#define IXP23XX_GIG1_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xC000) -#define IXP23XX_DDRS_VIRT (IXP23XX_PERIPHERAL_VIRT + 0xD000) - -#define IXP23XX_UART1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x0000) -#define IXP23XX_UART2_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x1000) -#define IXP23XX_PMU_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x2000) -#define IXP23XX_INTC_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x3000) -#define IXP23XX_GPIO_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x4000) -#define IXP23XX_TIMER_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x5000) -#define IXP23XX_NPE0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x6000) -#define IXP23XX_DSR_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x7000) -#define IXP23XX_NPE1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x8000) -#define IXP23XX_ETH0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0x9000) -#define IXP23XX_ETH1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xA000) -#define IXP23XX_GIG0_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xB000) -#define IXP23XX_GIG1_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xC000) -#define IXP23XX_DDRS_PHYS (IXP23XX_PERIPHERAL_PHYS + 0xD000) - - -/**************************************************************************** - * Interrupt controller. - ****************************************************************************/ -#define IXP23XX_INTC_REG(x) ((volatile unsigned long *)(IXP23XX_INTC_VIRT + (x))) -#define IXP23XX_INTR_ST1 IXP23XX_INTC_REG(0x00) -#define IXP23XX_INTR_ST2 IXP23XX_INTC_REG(0x04) -#define IXP23XX_INTR_ST3 IXP23XX_INTC_REG(0x08) -#define IXP23XX_INTR_ST4 IXP23XX_INTC_REG(0x0c) -#define IXP23XX_INTR_EN1 IXP23XX_INTC_REG(0x10) -#define IXP23XX_INTR_EN2 IXP23XX_INTC_REG(0x14) -#define IXP23XX_INTR_EN3 IXP23XX_INTC_REG(0x18) -#define IXP23XX_INTR_EN4 IXP23XX_INTC_REG(0x1c) -#define IXP23XX_INTR_SEL1 IXP23XX_INTC_REG(0x20) -#define IXP23XX_INTR_SEL2 IXP23XX_INTC_REG(0x24) -#define IXP23XX_INTR_SEL3 IXP23XX_INTC_REG(0x28) -#define IXP23XX_INTR_SEL4 IXP23XX_INTC_REG(0x2c) -#define IXP23XX_INTR_IRQ_ST1 IXP23XX_INTC_REG(0x30) -#define IXP23XX_INTR_IRQ_ST2 IXP23XX_INTC_REG(0x34) -#define IXP23XX_INTR_IRQ_ST3 IXP23XX_INTC_REG(0x38) -#define IXP23XX_INTR_IRQ_ST4 IXP23XX_INTC_REG(0x3c) -#define IXP23XX_INTR_IRQ_ENC_ST_OFFSET 0x54 - - -/**************************************************************************** - * GPIO. - ****************************************************************************/ -#define IXP23XX_GPIO_REG(x) ((volatile unsigned long *)(IXP23XX_GPIO_VIRT + (x))) -#define IXP23XX_GPIO_GPOUTR IXP23XX_GPIO_REG(0x00) -#define IXP23XX_GPIO_GPOER IXP23XX_GPIO_REG(0x04) -#define IXP23XX_GPIO_GPINR IXP23XX_GPIO_REG(0x08) -#define IXP23XX_GPIO_GPISR IXP23XX_GPIO_REG(0x0c) -#define IXP23XX_GPIO_GPIT1R IXP23XX_GPIO_REG(0x10) -#define IXP23XX_GPIO_GPIT2R IXP23XX_GPIO_REG(0x14) -#define IXP23XX_GPIO_GPCLKR IXP23XX_GPIO_REG(0x18) -#define IXP23XX_GPIO_GPDBSELR IXP23XX_GPIO_REG(0x1c) - -#define IXP23XX_GPIO_STYLE_MASK 0x7 -#define IXP23XX_GPIO_STYLE_ACTIVE_HIGH 0x0 -#define IXP23XX_GPIO_STYLE_ACTIVE_LOW 0x1 -#define IXP23XX_GPIO_STYLE_RISING_EDGE 0x2 -#define IXP23XX_GPIO_STYLE_FALLING_EDGE 0x3 -#define IXP23XX_GPIO_STYLE_TRANSITIONAL 0x4 - -#define IXP23XX_GPIO_STYLE_SIZE 3 - - -/**************************************************************************** - * Timer. - ****************************************************************************/ -#define IXP23XX_TIMER_REG(x) ((volatile unsigned long *)(IXP23XX_TIMER_VIRT + (x))) -#define IXP23XX_TIMER_CONT IXP23XX_TIMER_REG(0x00) -#define IXP23XX_TIMER1_TIMESTAMP IXP23XX_TIMER_REG(0x04) -#define IXP23XX_TIMER1_RELOAD IXP23XX_TIMER_REG(0x08) -#define IXP23XX_TIMER2_TIMESTAMP IXP23XX_TIMER_REG(0x0c) -#define IXP23XX_TIMER2_RELOAD IXP23XX_TIMER_REG(0x10) -#define IXP23XX_TIMER_WDOG IXP23XX_TIMER_REG(0x14) -#define IXP23XX_TIMER_WDOG_EN IXP23XX_TIMER_REG(0x18) -#define IXP23XX_TIMER_WDOG_KEY IXP23XX_TIMER_REG(0x1c) -#define IXP23XX_TIMER_WDOG_KEY_MAGIC 0x482e -#define IXP23XX_TIMER_STATUS IXP23XX_TIMER_REG(0x20) -#define IXP23XX_TIMER_SOFT_RESET IXP23XX_TIMER_REG(0x24) -#define IXP23XX_TIMER_SOFT_RESET_EN IXP23XX_TIMER_REG(0x28) - -#define IXP23XX_TIMER_ENABLE (1 << 0) -#define IXP23XX_TIMER_ONE_SHOT (1 << 1) -/* Low order bits of reload value ignored */ -#define IXP23XX_TIMER_RELOAD_MASK (0x3) -#define IXP23XX_TIMER_DISABLED (0x0) -#define IXP23XX_TIMER1_INT_PEND (1 << 0) -#define IXP23XX_TIMER2_INT_PEND (1 << 1) -#define IXP23XX_TIMER_STATUS_TS_PEND (1 << 2) -#define IXP23XX_TIMER_STATUS_WDOG_PEND (1 << 3) -#define IXP23XX_TIMER_STATUS_WARM_RESET (1 << 4) - - -/**************************************************************************** - * CAP CSRs. - ****************************************************************************/ -#define IXP23XX_GLOBAL_REG(x) ((volatile unsigned long *)(IXP23XX_CAP_CSR_VIRT + 0x4a00 + (x))) -#define IXP23XX_PRODUCT_ID IXP23XX_GLOBAL_REG(0x00) -#define IXP23XX_MISC_CONTROL IXP23XX_GLOBAL_REG(0x04) -#define IXP23XX_MSF_CLK_CNTRL IXP23XX_GLOBAL_REG(0x08) -#define IXP23XX_RESET0 IXP23XX_GLOBAL_REG(0x0c) -#define IXP23XX_RESET1 IXP23XX_GLOBAL_REG(0x10) -#define IXP23XX_STRAP_OPTIONS IXP23XX_GLOBAL_REG(0x18) - -#define IXP23XX_ENABLE_WATCHDOG (1 << 24) -#define IXP23XX_SHPC_INIT_COMP (1 << 21) -#define IXP23XX_RST_ALL (1 << 16) -#define IXP23XX_RESET_PCI (1 << 2) -#define IXP23XX_PCI_UNIT_RESET (1 << 1) -#define IXP23XX_XSCALE_RESET (1 << 0) - -#define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000) - - -/**************************************************************************** - * PCI CSRs. - ****************************************************************************/ -#define IXP23XX_PCI_CREG(x) ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + (x))) -#define IXP23XX_PCI_CMDSTAT IXP23XX_PCI_CREG(0x04) -#define IXP23XX_PCI_SRAM_BAR IXP23XX_PCI_CREG(0x14) -#define IXP23XX_PCI_SDRAM_BAR IXP23XX_PCI_CREG(0x18) - - -#define IXP23XX_PCI_CSR(x) ((volatile unsigned long *)(IXP23XX_PCI_CREG_VIRT + 0x01000000 + (x))) -#define IXP23XX_PCI_OUT_INT_STATUS IXP23XX_PCI_CSR(0x0030) -#define IXP23XX_PCI_OUT_INT_MASK IXP23XX_PCI_CSR(0x0034) -#define IXP23XX_PCI_SRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x00fc) -#define IXP23XX_PCI_DRAM_BASE_ADDR_MASK IXP23XX_PCI_CSR(0x0100) -#define IXP23XX_PCI_CONTROL IXP23XX_PCI_CSR(0x013c) -#define IXP23XX_PCI_ADDR_EXT IXP23XX_PCI_CSR(0x0140) -#define IXP23XX_PCI_ME_PUSH_STATUS IXP23XX_PCI_CSR(0x0148) -#define IXP23XX_PCI_ME_PUSH_EN IXP23XX_PCI_CSR(0x014c) -#define IXP23XX_PCI_ERR_STATUS IXP23XX_PCI_CSR(0x0150) -#define IXP23XX_PCI_ERROR_STATUS IXP23XX_PCI_CSR(0x0150) -#define IXP23XX_PCI_ERR_ENABLE IXP23XX_PCI_CSR(0x0154) -#define IXP23XX_PCI_XSCALE_INT_STATUS IXP23XX_PCI_CSR(0x0158) -#define IXP23XX_PCI_XSCALE_INT_ENABLE IXP23XX_PCI_CSR(0x015c) -#define IXP23XX_PCI_CPP_ADDR_BITS IXP23XX_PCI_CSR(0x0160) - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/memory.h b/include/asm-arm/arch-ixp23xx/memory.h deleted file mode 100644 index c3d906a..0000000 --- a/include/asm-arm/arch-ixp23xx/memory.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/memory.h - * - * Copyright (c) 2003-2004 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET (0x00000000) - - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#ifndef __ASSEMBLY__ - -#define __virt_to_bus(v) \ - ({ unsigned int ret; \ - ret = ((__virt_to_phys(v) - 0x00000000) + \ - (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)); \ - ret; }) - -#define __bus_to_virt(b) \ - ({ unsigned int data; \ - data = *((volatile int *)IXP23XX_PCI_SDRAM_BAR); \ - __phys_to_virt((((b - (data & 0xfffffff0)) + 0x00000000))); }) - -#define arch_is_coherent() 1 - -#endif - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h deleted file mode 100644 index db8aa30..0000000 --- a/include/asm-arm/arch-ixp23xx/platform.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/platform.h - * - * Various bits of code used by platform-level code. - * - * Author: Deepak Saxena - * - * Copyright 2005 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASSEMBLY__ - -static inline unsigned long ixp2000_reg_read(volatile void *reg) -{ - return *((volatile unsigned long *)reg); -} - -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) -{ - *((volatile unsigned long *)reg) = val; -} - -static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) -{ - *((volatile unsigned long *)reg) = val; -} - -struct pci_sys_data; - -void ixp23xx_map_io(void); -void ixp23xx_init_irq(void); -void ixp23xx_sys_init(void); -int ixp23xx_pci_setup(int, struct pci_sys_data *); -void ixp23xx_pci_preinit(void); -struct pci_bus *ixp23xx_pci_scan_bus(int, struct pci_sys_data*); -void ixp23xx_pci_slave_init(void); - -extern struct sys_timer ixp23xx_timer; - -#define IXP23XX_UART_XTAL 14745600 - -#ifndef __ASSEMBLY__ -/* - * Is system memory on the XSI or CPP bus? - */ -static inline unsigned ixp23xx_cpp_boot(void) -{ - return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES); -} -#endif - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/system.h b/include/asm-arm/arch-ixp23xx/system.h deleted file mode 100644 index 54e8a51..0000000 --- a/include/asm-arm/arch-ixp23xx/system.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/system.h - * - * Copyright (C) 2003 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - -static inline void arch_idle(void) -{ -#if 0 - if (!hlt_counter) - cpu_do_idle(); -#endif -} - -static inline void arch_reset(char mode) -{ - /* First try machine specific support */ - if (machine_is_ixdp2351()) { - *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_MAGIC; - (void) *IXDP2351_CPLD_RESET1_REG; - *IXDP2351_CPLD_RESET1_REG = IXDP2351_CPLD_RESET1_ENABLE; - } - - /* Use on-chip reset capability */ - *IXP23XX_RESET0 |= IXP23XX_RST_ALL; -} diff --git a/include/asm-arm/arch-ixp23xx/time.h b/include/asm-arm/arch-ixp23xx/time.h deleted file mode 100644 index f6828fd..0000000 --- a/include/asm-arm/arch-ixp23xx/time.h +++ /dev/null @@ -1,3 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/time.h - */ diff --git a/include/asm-arm/arch-ixp23xx/timex.h b/include/asm-arm/arch-ixp23xx/timex.h deleted file mode 100644 index 516f72f..0000000 --- a/include/asm-arm/arch-ixp23xx/timex.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/timex.h - * - * XScale architecture timex specifications - */ - -#define CLOCK_TICK_RATE 75000000 diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h deleted file mode 100644 index 16c1110..0000000 --- a/include/asm-arm/arch-ixp23xx/uncompress.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/uncompress.h - * - * Copyright (C) 2002-2004 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include -#include - -#define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS) - -static inline void putc(char c) -{ - int j; - - for (j = 0; j < 0x1000; j++) { - if (UART_BASE[UART_LSR] & UART_LSR_THRE) - break; - barrier(); - } - - UART_BASE[UART_TX] = c; -} - -static inline void flush(void) -{ -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() - - -#endif diff --git a/include/asm-arm/arch-ixp23xx/vmalloc.h b/include/asm-arm/arch-ixp23xx/vmalloc.h deleted file mode 100644 index 9f25666..0000000 --- a/include/asm-arm/arch-ixp23xx/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * include/asm-arm/arch-ixp23xx/vmalloc.h - * - * Copyright (c) 2005 MontaVista Software, Inc. - * - * NPU mappings end at 0xf0000000 and we allocate 64MB for board - * specific static I/O. - */ - -#define VMALLOC_END (0xec000000) diff --git a/include/asm-arm/arch-ixp4xx/avila.h b/include/asm-arm/arch-ixp4xx/avila.h deleted file mode 100644 index 88f053d..0000000 --- a/include/asm-arm/arch-ixp4xx/avila.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/avila.h - * - * Gateworks Avila platform specific definitions - * - * Author: Michael-Luke Jones - * - * Based on ixdp425.h - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define AVILA_SDA_PIN 7 -#define AVILA_SCL_PIN 6 - -/* - * AVILA PCI IRQs - */ -#define AVILA_PCI_MAX_DEV 4 -#define LOFT_PCI_MAX_DEV 6 -#define AVILA_PCI_IRQ_LINES 4 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define AVILA_PCI_INTA_PIN 11 -#define AVILA_PCI_INTB_PIN 10 -#define AVILA_PCI_INTC_PIN 9 -#define AVILA_PCI_INTD_PIN 8 - - diff --git a/include/asm-arm/arch-ixp4xx/coyote.h b/include/asm-arm/arch-ixp4xx/coyote.h deleted file mode 100644 index 428b298a..0000000 --- a/include/asm-arm/arch-ixp4xx/coyote.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/coyote.h - * - * ADI Engineering platform specific definitions - * - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -/* PCI controller GPIO to IRQ pin mappings */ -#define COYOTE_PCI_SLOT0_PIN 6 -#define COYOTE_PCI_SLOT1_PIN 11 - -#define COYOTE_PCI_SLOT0_DEVID 14 -#define COYOTE_PCI_SLOT1_DEVID 15 - -#define COYOTE_IDE_BASE_PHYS IXP4XX_EXP_BUS_BASE(3) -#define COYOTE_IDE_BASE_VIRT 0xFFFE1000 -#define COYOTE_IDE_REGION_SIZE 0x1000 - -#define COYOTE_IDE_DATA_PORT 0xFFFE10E0 -#define COYOTE_IDE_CTRL_PORT 0xFFFE10FC -#define COYOTE_IDE_ERROR_PORT 0xFFFE10E2 - diff --git a/include/asm-arm/arch-ixp4xx/cpu.h b/include/asm-arm/arch-ixp4xx/cpu.h deleted file mode 100644 index 2fa3d6b..0000000 --- a/include/asm-arm/arch-ixp4xx/cpu.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/cpu.h - * - * IXP4XX cpu type detection - * - * Copyright (C) 2007 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_CPU_H__ -#define __ASM_ARCH_CPU_H__ - -extern unsigned int processor_id; -/* Processor id value in CP15 Register 0 */ -#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 -#define IXP435_PROCESSOR_ID_VALUE 0x69054040 -#define IXP465_PROCESSOR_ID_VALUE 0x69054200 -#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 - -#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ - IXP425_PROCESSOR_ID_VALUE) -#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ - IXP435_PROCESSOR_ID_VALUE) -#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ - IXP465_PROCESSOR_ID_VALUE) - -static inline u32 ixp4xx_read_feature_bits(void) -{ - unsigned int val = ~*IXP4XX_EXP_CFG2; - val &= ~IXP4XX_FEATURE_RESERVED; - if (!cpu_is_ixp46x()) - val &= ~IXP4XX_FEATURE_IXP46X_ONLY; - - return val; -} - -static inline void ixp4xx_write_feature_bits(u32 value) -{ - *IXP4XX_EXP_CFG2 = ~value; -} - -#endif /* _ASM_ARCH_CPU_H */ diff --git a/include/asm-arm/arch-ixp4xx/debug-macro.S b/include/asm-arm/arch-ixp4xx/debug-macro.S deleted file mode 100644 index 37bc8ef..0000000 --- a/include/asm-arm/arch-ixp4xx/debug-macro.S +++ /dev/null @@ -1,24 +0,0 @@ -/* linux/include/asm-arm/arch-ixp4xx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0xc8000000 - movne \rx, #0xff000000 - orrne \rx, \rx, #0x00b00000 - add \rx,\rx,#3 @ Uart regs are at off set of 3 if - @ byte writes used - Big Endian. - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-ixp4xx/dma.h b/include/asm-arm/arch-ixp4xx/dma.h deleted file mode 100644 index 0b755d6..0000000 --- a/include/asm-arm/arch-ixp4xx/dma.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/dma.h - * - * Copyright (C) 2001-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include -#include -#include -#include - -#define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M) - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-ixp4xx/dsmg600.h b/include/asm-arm/arch-ixp4xx/dsmg600.h deleted file mode 100644 index 5afae8c..0000000 --- a/include/asm-arm/arch-ixp4xx/dsmg600.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * DSM-G600 platform specific definitions - * - * Copyright (C) 2006 Tower Technologies - * Author: Alessandro Zummo - * - * based on ixdp425.h: - * Copyright 2004 (C) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define DSMG600_SDA_PIN 5 -#define DSMG600_SCL_PIN 4 - -/* - * DSMG600 PCI IRQs - */ -#define DSMG600_PCI_MAX_DEV 4 -#define DSMG600_PCI_IRQ_LINES 3 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define DSMG600_PCI_INTA_PIN 11 -#define DSMG600_PCI_INTB_PIN 10 -#define DSMG600_PCI_INTC_PIN 9 -#define DSMG600_PCI_INTD_PIN 8 -#define DSMG600_PCI_INTE_PIN 7 -#define DSMG600_PCI_INTF_PIN 6 - -/* DSM-G600 Timer Setting */ -#define DSMG600_FREQ 66000000 - -/* Buttons */ - -#define DSMG600_PB_GPIO 15 /* power button */ -#define DSMG600_RB_GPIO 3 /* reset button */ - -/* Power control */ - -#define DSMG600_PO_GPIO 2 /* power off */ - -/* LEDs */ - -#define DSMG600_LED_PWR_GPIO 0 -#define DSMG600_LED_WLAN_GPIO 14 diff --git a/include/asm-arm/arch-ixp4xx/entry-macro.S b/include/asm-arm/arch-ixp4xx/entry-macro.S deleted file mode 100644 index ed313c5..0000000 --- a/include/asm-arm/arch-ixp4xx/entry-macro.S +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/entry-macro.S - * - * Low-level IRQ helper macros for IXP4xx-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) - ldr \irqstat, [\irqstat] @ get interrupts - cmp \irqstat, #0 - beq 1001f @ upper IRQ? - clz \irqnr, \irqstat - mov \base, #31 - sub \irqnr, \base, \irqnr - b 1002f @ lower IRQ being - @ handled - -1001: - /* - * IXP465/IXP435 has an upper IRQ status register - */ -#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) - ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET) - ldr \irqstat, [\irqstat] @ get upper interrupts - mov \irqnr, #63 - clz \irqstat, \irqstat - cmp \irqstat, #32 - subne \irqnr, \irqnr, \irqstat -#endif -1002: - .endm - - diff --git a/include/asm-arm/arch-ixp4xx/fsg.h b/include/asm-arm/arch-ixp4xx/fsg.h deleted file mode 100644 index 168b984..0000000 --- a/include/asm-arm/arch-ixp4xx/fsg.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/fsg.h - * - * Freecom FSG-3 platform specific definitions - * - * Author: Rod Whitby - * Author: Tomasz Chmielewski - * Maintainers: http://www.nslu2-linux.org - * - * Based on coyote.h by - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define FSG_SDA_PIN 12 -#define FSG_SCL_PIN 13 - -/* - * FSG PCI IRQs - */ -#define FSG_PCI_MAX_DEV 3 -#define FSG_PCI_IRQ_LINES 3 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define FSG_PCI_INTA_PIN 6 -#define FSG_PCI_INTB_PIN 7 -#define FSG_PCI_INTC_PIN 5 - -/* Buttons */ - -#define FSG_SB_GPIO 4 /* sync button */ -#define FSG_RB_GPIO 9 /* reset button */ -#define FSG_UB_GPIO 10 /* usb button */ - -/* LEDs */ - -#define FSG_LED_WLAN_BIT 0 -#define FSG_LED_WAN_BIT 1 -#define FSG_LED_SATA_BIT 2 -#define FSG_LED_USB_BIT 4 -#define FSG_LED_RING_BIT 5 -#define FSG_LED_SYNC_BIT 7 diff --git a/include/asm-arm/arch-ixp4xx/gpio.h b/include/asm-arm/arch-ixp4xx/gpio.h deleted file mode 100644 index 28e7d27..0000000 --- a/include/asm-arm/arch-ixp4xx/gpio.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/gpio.h - * - * IXP4XX GPIO wrappers for arch-neutral GPIO calls - * - * Written by Milan Svoboda - * Based on PXA implementation by Philipp Zabel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_IXP4XX_GPIO_H -#define __ASM_ARCH_IXP4XX_GPIO_H - -#include - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return 0; -} - -static inline void gpio_free(unsigned gpio) -{ - return; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - gpio_line_config(gpio, IXP4XX_GPIO_IN); - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int level) -{ - gpio_line_set(gpio, level); - gpio_line_config(gpio, IXP4XX_GPIO_OUT); - return 0; -} - -static inline int gpio_get_value(unsigned gpio) -{ - int value; - - gpio_line_get(gpio, &value); - - return value; -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - gpio_line_set(gpio, value); -} - -#include /* cansleep wrappers */ - -extern int gpio_to_irq(int gpio); -extern int irq_to_gpio(int gpio); - -#endif - diff --git a/include/asm-arm/arch-ixp4xx/gtwx5715.h b/include/asm-arm/arch-ixp4xx/gtwx5715.h deleted file mode 100644 index 2192ded..0000000 --- a/include/asm-arm/arch-ixp4xx/gtwx5715.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/gtwx5715.h - * - * Gemtek GTWX5715 Gateway (Linksys WRV54G) - * - * Copyright 2004 (c) George T. Joseph - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif -#include "irqs.h" - -#define GTWX5715_GPIO0 0 -#define GTWX5715_GPIO1 1 -#define GTWX5715_GPIO2 2 -#define GTWX5715_GPIO3 3 -#define GTWX5715_GPIO4 4 -#define GTWX5715_GPIO5 5 -#define GTWX5715_GPIO6 6 -#define GTWX5715_GPIO7 7 -#define GTWX5715_GPIO8 8 -#define GTWX5715_GPIO9 9 -#define GTWX5715_GPIO10 10 -#define GTWX5715_GPIO11 11 -#define GTWX5715_GPIO12 12 -#define GTWX5715_GPIO13 13 -#define GTWX5715_GPIO14 14 - -#define GTWX5715_GPIO0_IRQ IRQ_IXP4XX_GPIO0 -#define GTWX5715_GPIO1_IRQ IRQ_IXP4XX_GPIO1 -#define GTWX5715_GPIO2_IRQ IRQ_IXP4XX_GPIO2 -#define GTWX5715_GPIO3_IRQ IRQ_IXP4XX_GPIO3 -#define GTWX5715_GPIO4_IRQ IRQ_IXP4XX_GPIO4 -#define GTWX5715_GPIO5_IRQ IRQ_IXP4XX_GPIO5 -#define GTWX5715_GPIO6_IRQ IRQ_IXP4XX_GPIO6 -#define GTWX5715_GPIO7_IRQ IRQ_IXP4XX_GPIO7 -#define GTWX5715_GPIO8_IRQ IRQ_IXP4XX_GPIO8 -#define GTWX5715_GPIO9_IRQ IRQ_IXP4XX_GPIO9 -#define GTWX5715_GPIO10_IRQ IRQ_IXP4XX_GPIO10 -#define GTWX5715_GPIO11_IRQ IRQ_IXP4XX_GPIO11 -#define GTWX5715_GPIO12_IRQ IRQ_IXP4XX_GPIO12 -#define GTWX5715_GPIO13_IRQ IRQ_IXP4XX_SW_INT1 -#define GTWX5715_GPIO14_IRQ IRQ_IXP4XX_SW_INT2 - -/* PCI controller GPIO to IRQ pin mappings - - INTA INTB -SLOT 0 10 11 -SLOT 1 11 10 - -*/ - -#define GTWX5715_PCI_SLOT0_DEVID 0 -#define GTWX5715_PCI_SLOT0_INTA_GPIO GTWX5715_GPIO10 -#define GTWX5715_PCI_SLOT0_INTB_GPIO GTWX5715_GPIO11 -#define GTWX5715_PCI_SLOT0_INTA_IRQ GTWX5715_GPIO10_IRQ -#define GTWX5715_PCI_SLOT0_INTB_IRQ GTWX5715_GPIO11_IRQ - -#define GTWX5715_PCI_SLOT1_DEVID 1 -#define GTWX5715_PCI_SLOT1_INTA_GPIO GTWX5715_GPIO11 -#define GTWX5715_PCI_SLOT1_INTB_GPIO GTWX5715_GPIO10 -#define GTWX5715_PCI_SLOT1_INTA_IRQ GTWX5715_GPIO11_IRQ -#define GTWX5715_PCI_SLOT1_INTB_IRQ GTWX5715_GPIO10_IRQ - -#define GTWX5715_PCI_SLOT_COUNT 2 -#define GTWX5715_PCI_INT_PIN_COUNT 2 - -/* - * GPIO 5,6,7 and12 are hard wired to the Kendin KS8995M Switch - * and operate as an SPI type interface. The details of the interface - * are available on Kendin/Micrel's web site. - */ - -#define GTWX5715_KSSPI_SELECT GTWX5715_GPIO5 -#define GTWX5715_KSSPI_TXD GTWX5715_GPIO6 -#define GTWX5715_KSSPI_CLOCK GTWX5715_GPIO7 -#define GTWX5715_KSSPI_RXD GTWX5715_GPIO12 - -/* - * The "reset" button is wired to GPIO 3. - * The GPIO is brought "low" when the button is pushed. - */ - -#define GTWX5715_BUTTON_GPIO GTWX5715_GPIO3 -#define GTWX5715_BUTTON_IRQ GTWX5715_GPIO3_IRQ - -/* - * Board Label Front Label - * LED1 Power - * LED2 Wireless-G - * LED3 not populated but could be - * LED4 Internet - * LED5 - LED8 Controlled by KS8995M Switch - * LED9 DMZ - */ - -#define GTWX5715_LED1_GPIO GTWX5715_GPIO2 -#define GTWX5715_LED2_GPIO GTWX5715_GPIO9 -#define GTWX5715_LED3_GPIO GTWX5715_GPIO8 -#define GTWX5715_LED4_GPIO GTWX5715_GPIO1 -#define GTWX5715_LED9_GPIO GTWX5715_GPIO4 diff --git a/include/asm-arm/arch-ixp4xx/hardware.h b/include/asm-arm/arch-ixp4xx/hardware.h deleted file mode 100644 index fa723a6..0000000 --- a/include/asm-arm/arch-ixp4xx/hardware.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/hardware.h - * - * Copyright (C) 2002 Intel Corporation. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -/* - * Hardware definitions for IXP4xx based systems - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#define __ASM_ARCH_HARDWARE_H__ - -#define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000) - -/* - * We override the standard dma-mask routines for bouncing. - */ -#define HAVE_ARCH_PCI_SET_DMA_MASK - -#define pcibios_assign_all_busses() 1 - -/* Register locations and bits */ -#include "ixp4xx-regs.h" - -#ifndef __ASSEMBLER__ -#include -#endif - -/* Platform helper functions and definitions */ -#include "platform.h" - -/* Platform specific details */ -#include "ixdp425.h" -#include "avila.h" -#include "coyote.h" -#include "prpmc1100.h" -#include "nslu2.h" -#include "nas100d.h" -#include "dsmg600.h" -#include "fsg.h" - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-ixp4xx/io.h b/include/asm-arm/arch-ixp4xx/io.h deleted file mode 100644 index 8e74260..0000000 --- a/include/asm-arm/arch-ixp4xx/io.h +++ /dev/null @@ -1,569 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/io.h - * - * Author: Deepak Saxena - * - * Copyright (C) 2002-2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#include - -#define IO_SPACE_LIMIT 0xffff0000 - -extern int (*ixp4xx_pci_read)(u32 addr, u32 cmd, u32* data); -extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data); - - -/* - * IXP4xx provides two methods of accessing PCI memory space: - * - * 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB). - * To access PCI via this space, we simply ioremap() the BAR - * into the kernel and we can use the standard read[bwl]/write[bwl] - * macros. This is the preffered method due to speed but it - * limits the system to just 64MB of PCI memory. This can be - * problamatic if using video cards and other memory-heavy - * targets. - * - * 2) If > 64MB of memory space is required, the IXP4xx can be configured - * to use indirect registers to access PCI (as we do below for I/O - * transactions). This allows for up to 128MB (0x48000000 to 0x4fffffff) - * of memory on the bus. The disadvantage of this is that every - * PCI access requires three local register accesses plus a spinlock, - * but in some cases the performance hit is acceptable. In addition, - * you cannot mmap() PCI devices in this case. - * - */ -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - -#define __mem_pci(a) (a) - -#else - -#include - -/* - * In the case of using indirect PCI, we simply return the actual PCI - * address and our read/write implementation use that to drive the - * access registers. If something outside of PCI is ioremap'd, we - * fallback to the default. - */ -static inline void __iomem * -__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype) -{ - if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff)) - return __arm_ioremap(addr, size, mtype); - - return (void __iomem *)addr; -} - -static inline void -__ixp4xx_iounmap(void __iomem *addr) -{ - if ((__force u32)addr >= VMALLOC_START) - __iounmap(addr); -} - -#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f) -#define __arch_iounmap(a) __ixp4xx_iounmap(a) - -#define writeb(v, p) __ixp4xx_writeb(v, p) -#define writew(v, p) __ixp4xx_writew(v, p) -#define writel(v, p) __ixp4xx_writel(v, p) - -#define writesb(p, v, l) __ixp4xx_writesb(p, v, l) -#define writesw(p, v, l) __ixp4xx_writesw(p, v, l) -#define writesl(p, v, l) __ixp4xx_writesl(p, v, l) - -#define readb(p) __ixp4xx_readb(p) -#define readw(p) __ixp4xx_readw(p) -#define readl(p) __ixp4xx_readl(p) - -#define readsb(p, v, l) __ixp4xx_readsb(p, v, l) -#define readsw(p, v, l) __ixp4xx_readsw(p, v, l) -#define readsl(p, v, l) __ixp4xx_readsl(p, v, l) - -static inline void -__ixp4xx_writeb(u8 value, volatile void __iomem *p) -{ - u32 addr = (u32)p; - u32 n, byte_enables, data; - - if (addr >= VMALLOC_START) { - __raw_writeb(value, addr); - return; - } - - n = addr % 4; - byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; - data = value << (8*n); - ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data); -} - -static inline void -__ixp4xx_writesb(volatile void __iomem *bus_addr, const u8 *vaddr, int count) -{ - while (count--) - writeb(*vaddr++, bus_addr); -} - -static inline void -__ixp4xx_writew(u16 value, volatile void __iomem *p) -{ - u32 addr = (u32)p; - u32 n, byte_enables, data; - - if (addr >= VMALLOC_START) { - __raw_writew(value, addr); - return; - } - - n = addr % 4; - byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; - data = value << (8*n); - ixp4xx_pci_write(addr, byte_enables | NP_CMD_MEMWRITE, data); -} - -static inline void -__ixp4xx_writesw(volatile void __iomem *bus_addr, const u16 *vaddr, int count) -{ - while (count--) - writew(*vaddr++, bus_addr); -} - -static inline void -__ixp4xx_writel(u32 value, volatile void __iomem *p) -{ - u32 addr = (__force u32)p; - if (addr >= VMALLOC_START) { - __raw_writel(value, p); - return; - } - - ixp4xx_pci_write(addr, NP_CMD_MEMWRITE, value); -} - -static inline void -__ixp4xx_writesl(volatile void __iomem *bus_addr, const u32 *vaddr, int count) -{ - while (count--) - writel(*vaddr++, bus_addr); -} - -static inline unsigned char -__ixp4xx_readb(const volatile void __iomem *p) -{ - u32 addr = (u32)p; - u32 n, byte_enables, data; - - if (addr >= VMALLOC_START) - return __raw_readb(addr); - - n = addr % 4; - byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; - if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data)) - return 0xff; - - return data >> (8*n); -} - -static inline void -__ixp4xx_readsb(const volatile void __iomem *bus_addr, u8 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = readb(bus_addr); -} - -static inline unsigned short -__ixp4xx_readw(const volatile void __iomem *p) -{ - u32 addr = (u32)p; - u32 n, byte_enables, data; - - if (addr >= VMALLOC_START) - return __raw_readw(addr); - - n = addr % 4; - byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; - if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_MEMREAD, &data)) - return 0xffff; - - return data>>(8*n); -} - -static inline void -__ixp4xx_readsw(const volatile void __iomem *bus_addr, u16 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = readw(bus_addr); -} - -static inline unsigned long -__ixp4xx_readl(const volatile void __iomem *p) -{ - u32 addr = (__force u32)p; - u32 data; - - if (addr >= VMALLOC_START) - return __raw_readl(p); - - if (ixp4xx_pci_read(addr, NP_CMD_MEMREAD, &data)) - return 0xffffffff; - - return data; -} - -static inline void -__ixp4xx_readsl(const volatile void __iomem *bus_addr, u32 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = readl(bus_addr); -} - - -/* - * We can use the built-in functions b/c they end up calling writeb/readb - */ -#define memset_io(c,v,l) _memset_io((c),(v),(l)) -#define memcpy_fromio(a,c,l) _memcpy_fromio((a),(c),(l)) -#define memcpy_toio(c,a,l) _memcpy_toio((c),(a),(l)) - -#endif - -#ifndef CONFIG_PCI - -#define __io(v) v - -#else - -/* - * IXP4xx does not have a transparent cpu -> PCI I/O translation - * window. Instead, it has a set of registers that must be tweaked - * with the proper byte lanes, command types, and address for the - * transaction. This means that we need to override the default - * I/O functions. - */ -#define outb(p, v) __ixp4xx_outb(p, v) -#define outw(p, v) __ixp4xx_outw(p, v) -#define outl(p, v) __ixp4xx_outl(p, v) - -#define outsb(p, v, l) __ixp4xx_outsb(p, v, l) -#define outsw(p, v, l) __ixp4xx_outsw(p, v, l) -#define outsl(p, v, l) __ixp4xx_outsl(p, v, l) - -#define inb(p) __ixp4xx_inb(p) -#define inw(p) __ixp4xx_inw(p) -#define inl(p) __ixp4xx_inl(p) - -#define insb(p, v, l) __ixp4xx_insb(p, v, l) -#define insw(p, v, l) __ixp4xx_insw(p, v, l) -#define insl(p, v, l) __ixp4xx_insl(p, v, l) - - -static inline void -__ixp4xx_outb(u8 value, u32 addr) -{ - u32 n, byte_enables, data; - n = addr % 4; - byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; - data = value << (8*n); - ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data); -} - -static inline void -__ixp4xx_outsb(u32 io_addr, const u8 *vaddr, u32 count) -{ - while (count--) - outb(*vaddr++, io_addr); -} - -static inline void -__ixp4xx_outw(u16 value, u32 addr) -{ - u32 n, byte_enables, data; - n = addr % 4; - byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; - data = value << (8*n); - ixp4xx_pci_write(addr, byte_enables | NP_CMD_IOWRITE, data); -} - -static inline void -__ixp4xx_outsw(u32 io_addr, const u16 *vaddr, u32 count) -{ - while (count--) - outw(cpu_to_le16(*vaddr++), io_addr); -} - -static inline void -__ixp4xx_outl(u32 value, u32 addr) -{ - ixp4xx_pci_write(addr, NP_CMD_IOWRITE, value); -} - -static inline void -__ixp4xx_outsl(u32 io_addr, const u32 *vaddr, u32 count) -{ - while (count--) - outl(*vaddr++, io_addr); -} - -static inline u8 -__ixp4xx_inb(u32 addr) -{ - u32 n, byte_enables, data; - n = addr % 4; - byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL; - if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data)) - return 0xff; - - return data >> (8*n); -} - -static inline void -__ixp4xx_insb(u32 io_addr, u8 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = inb(io_addr); -} - -static inline u16 -__ixp4xx_inw(u32 addr) -{ - u32 n, byte_enables, data; - n = addr % 4; - byte_enables = (0xf & ~(BIT(n) | BIT(n+1))) << IXP4XX_PCI_NP_CBE_BESL; - if (ixp4xx_pci_read(addr, byte_enables | NP_CMD_IOREAD, &data)) - return 0xffff; - - return data>>(8*n); -} - -static inline void -__ixp4xx_insw(u32 io_addr, u16 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = le16_to_cpu(inw(io_addr)); -} - -static inline u32 -__ixp4xx_inl(u32 addr) -{ - u32 data; - if (ixp4xx_pci_read(addr, NP_CMD_IOREAD, &data)) - return 0xffffffff; - - return data; -} - -static inline void -__ixp4xx_insl(u32 io_addr, u32 *vaddr, u32 count) -{ - while (count--) - *vaddr++ = inl(io_addr); -} - -#define PIO_OFFSET 0x10000UL -#define PIO_MASK 0x0ffffUL - -#define __is_io_address(p) (((unsigned long)p >= PIO_OFFSET) && \ - ((unsigned long)p <= (PIO_MASK + PIO_OFFSET))) -static inline unsigned int -__ixp4xx_ioread8(const void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - return (unsigned int)__ixp4xx_inb(port & PIO_MASK); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - return (unsigned int)__raw_readb(port); -#else - return (unsigned int)__ixp4xx_readb(addr); -#endif -} - -static inline void -__ixp4xx_ioread8_rep(const void __iomem *addr, void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_insb(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_readsb(addr, vaddr, count); -#else - __ixp4xx_readsb(addr, vaddr, count); -#endif -} - -static inline unsigned int -__ixp4xx_ioread16(const void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - return (unsigned int)__ixp4xx_inw(port & PIO_MASK); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - return le16_to_cpu(__raw_readw((u32)port)); -#else - return (unsigned int)__ixp4xx_readw(addr); -#endif -} - -static inline void -__ixp4xx_ioread16_rep(const void __iomem *addr, void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_insw(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_readsw(addr, vaddr, count); -#else - __ixp4xx_readsw(addr, vaddr, count); -#endif -} - -static inline unsigned int -__ixp4xx_ioread32(const void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - return (unsigned int)__ixp4xx_inl(port & PIO_MASK); - else { -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - return le32_to_cpu((__force __le32)__raw_readl(addr)); -#else - return (unsigned int)__ixp4xx_readl(addr); -#endif - } -} - -static inline void -__ixp4xx_ioread32_rep(const void __iomem *addr, void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_insl(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_readsl(addr, vaddr, count); -#else - __ixp4xx_readsl(addr, vaddr, count); -#endif -} - -static inline void -__ixp4xx_iowrite8(u8 value, void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outb(value, port & PIO_MASK); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writeb(value, port); -#else - __ixp4xx_writeb(value, addr); -#endif -} - -static inline void -__ixp4xx_iowrite8_rep(void __iomem *addr, const void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outsb(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writesb(addr, vaddr, count); -#else - __ixp4xx_writesb(addr, vaddr, count); -#endif -} - -static inline void -__ixp4xx_iowrite16(u16 value, void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outw(value, port & PIO_MASK); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writew(cpu_to_le16(value), addr); -#else - __ixp4xx_writew(value, addr); -#endif -} - -static inline void -__ixp4xx_iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outsw(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writesw(addr, vaddr, count); -#else - __ixp4xx_writesw(addr, vaddr, count); -#endif -} - -static inline void -__ixp4xx_iowrite32(u32 value, void __iomem *addr) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outl(value, port & PIO_MASK); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writel((u32 __force)cpu_to_le32(value), addr); -#else - __ixp4xx_writel(value, addr); -#endif -} - -static inline void -__ixp4xx_iowrite32_rep(void __iomem *addr, const void *vaddr, u32 count) -{ - unsigned long port = (unsigned long __force)addr; - if (__is_io_address(port)) - __ixp4xx_outsl(port & PIO_MASK, vaddr, count); - else -#ifndef CONFIG_IXP4XX_INDIRECT_PCI - __raw_writesl(addr, vaddr, count); -#else - __ixp4xx_writesl(addr, vaddr, count); -#endif -} - -#define ioread8(p) __ixp4xx_ioread8(p) -#define ioread16(p) __ixp4xx_ioread16(p) -#define ioread32(p) __ixp4xx_ioread32(p) - -#define ioread8_rep(p, v, c) __ixp4xx_ioread8_rep(p, v, c) -#define ioread16_rep(p, v, c) __ixp4xx_ioread16_rep(p, v, c) -#define ioread32_rep(p, v, c) __ixp4xx_ioread32_rep(p, v, c) - -#define iowrite8(v,p) __ixp4xx_iowrite8(v,p) -#define iowrite16(v,p) __ixp4xx_iowrite16(v,p) -#define iowrite32(v,p) __ixp4xx_iowrite32(v,p) - -#define iowrite8_rep(p, v, c) __ixp4xx_iowrite8_rep(p, v, c) -#define iowrite16_rep(p, v, c) __ixp4xx_iowrite16_rep(p, v, c) -#define iowrite32_rep(p, v, c) __ixp4xx_iowrite32_rep(p, v, c) - -#define ioport_map(port, nr) ((void __iomem*)(port + PIO_OFFSET)) -#define ioport_unmap(addr) -#endif // !CONFIG_PCI - -#endif // __ASM_ARM_ARCH_IO_H - diff --git a/include/asm-arm/arch-ixp4xx/irqs.h b/include/asm-arm/arch-ixp4xx/irqs.h deleted file mode 100644 index 674af4a..0000000 --- a/include/asm-arm/arch-ixp4xx/irqs.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/irqs.h - * - * IRQ definitions for IXP4XX based systems - * - * Copyright (C) 2002 Intel Corporation. - * Copyright (C) 2003 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _ARCH_IXP4XX_IRQS_H_ -#define _ARCH_IXP4XX_IRQS_H_ - - -#define IRQ_IXP4XX_NPEA 0 -#define IRQ_IXP4XX_NPEB 1 -#define IRQ_IXP4XX_NPEC 2 -#define IRQ_IXP4XX_QM1 3 -#define IRQ_IXP4XX_QM2 4 -#define IRQ_IXP4XX_TIMER1 5 -#define IRQ_IXP4XX_GPIO0 6 -#define IRQ_IXP4XX_GPIO1 7 -#define IRQ_IXP4XX_PCI_INT 8 -#define IRQ_IXP4XX_PCI_DMA1 9 -#define IRQ_IXP4XX_PCI_DMA2 10 -#define IRQ_IXP4XX_TIMER2 11 -#define IRQ_IXP4XX_USB 12 -#define IRQ_IXP4XX_UART2 13 -#define IRQ_IXP4XX_TIMESTAMP 14 -#define IRQ_IXP4XX_UART1 15 -#define IRQ_IXP4XX_WDOG 16 -#define IRQ_IXP4XX_AHB_PMU 17 -#define IRQ_IXP4XX_XSCALE_PMU 18 -#define IRQ_IXP4XX_GPIO2 19 -#define IRQ_IXP4XX_GPIO3 20 -#define IRQ_IXP4XX_GPIO4 21 -#define IRQ_IXP4XX_GPIO5 22 -#define IRQ_IXP4XX_GPIO6 23 -#define IRQ_IXP4XX_GPIO7 24 -#define IRQ_IXP4XX_GPIO8 25 -#define IRQ_IXP4XX_GPIO9 26 -#define IRQ_IXP4XX_GPIO10 27 -#define IRQ_IXP4XX_GPIO11 28 -#define IRQ_IXP4XX_GPIO12 29 -#define IRQ_IXP4XX_SW_INT1 30 -#define IRQ_IXP4XX_SW_INT2 31 -#define IRQ_IXP4XX_USB_HOST 32 -#define IRQ_IXP4XX_I2C 33 -#define IRQ_IXP4XX_SSP 34 -#define IRQ_IXP4XX_TSYNC 35 -#define IRQ_IXP4XX_EAU_DONE 36 -#define IRQ_IXP4XX_SHA_DONE 37 -#define IRQ_IXP4XX_SWCP_PE 58 -#define IRQ_IXP4XX_QM_PE 60 -#define IRQ_IXP4XX_MCU_ECC 61 -#define IRQ_IXP4XX_EXP_PE 62 - -/* - * Only first 32 sources are valid if running on IXP42x systems - */ -#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X) -#define NR_IRQS 64 -#else -#define NR_IRQS 32 -#endif - -#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU) - -/* - * IXDP425 board IRQs - */ -#define IRQ_IXDP425_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_IXDP425_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_IXDP425_PCI_INTC IRQ_IXP4XX_GPIO9 -#define IRQ_IXDP425_PCI_INTD IRQ_IXP4XX_GPIO8 - -/* - * Gateworks Avila board IRQs - */ -#define IRQ_AVILA_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_AVILA_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_AVILA_PCI_INTC IRQ_IXP4XX_GPIO9 -#define IRQ_AVILA_PCI_INTD IRQ_IXP4XX_GPIO8 - - -/* - * PrPMC1100 Board IRQs - */ -#define IRQ_PRPMC1100_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_PRPMC1100_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_PRPMC1100_PCI_INTC IRQ_IXP4XX_GPIO9 -#define IRQ_PRPMC1100_PCI_INTD IRQ_IXP4XX_GPIO8 - -/* - * ADI Coyote Board IRQs - */ -#define IRQ_COYOTE_PCI_SLOT0 IRQ_IXP4XX_GPIO6 -#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11 -#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5 - -/* - * NSLU2 board IRQs - */ -#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9 - -/* - * NAS100D board IRQs - */ -#define IRQ_NAS100D_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_NAS100D_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_NAS100D_PCI_INTC IRQ_IXP4XX_GPIO9 -#define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8 -#define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7 - -/* - * D-Link DSM-G600 RevA board IRQs - */ -#define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11 -#define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10 -#define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9 -#define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8 -#define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7 -#define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6 - -/* - * Freecom FSG-3 Board IRQs - */ -#define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6 -#define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7 -#define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5 - -#endif diff --git a/include/asm-arm/arch-ixp4xx/ixdp425.h b/include/asm-arm/arch-ixp4xx/ixdp425.h deleted file mode 100644 index d0a1dcb..0000000 --- a/include/asm-arm/arch-ixp4xx/ixdp425.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/ixdp425.h - * - * IXDP425 platform specific definitions - * - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define IXDP425_SDA_PIN 7 -#define IXDP425_SCL_PIN 6 - -/* - * IXDP425 PCI IRQs - */ -#define IXDP425_PCI_MAX_DEV 4 -#define IXDP425_PCI_IRQ_LINES 4 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define IXDP425_PCI_INTA_PIN 11 -#define IXDP425_PCI_INTB_PIN 10 -#define IXDP425_PCI_INTC_PIN 9 -#define IXDP425_PCI_INTD_PIN 8 - -/* NAND Flash pins */ -#define IXDP425_NAND_NCE_PIN 12 - -#define IXDP425_NAND_CMD_BYTE 0x01 -#define IXDP425_NAND_ADDR_BYTE 0x02 diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h deleted file mode 100644 index 68aca85..0000000 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ /dev/null @@ -1,638 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/ixp4xx-regs.h - * - * Register definitions for IXP4xx chipset. This file contains - * register location and bit definitions only. Platform specific - * definitions and helper function declarations are in platform.h - * and machine-name.h. - * - * Copyright (C) 2002 Intel Corporation. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _ASM_ARM_IXP4XX_H_ -#define _ASM_ARM_IXP4XX_H_ - -/* - * IXP4xx Linux Memory Map: - * - * Phy Size Virt Description - * ========================================================================= - * - * 0x00000000 0x10000000(max) PAGE_OFFSET System RAM - * - * 0x48000000 0x04000000 ioremap'd PCI Memory Space - * - * 0x50000000 0x10000000 ioremap'd EXP BUS - * - * 0x6000000 0x00004000 ioremap'd QMgr - * - * 0xC0000000 0x00001000 0xffbff000 PCI CFG - * - * 0xC4000000 0x00001000 0xffbfe000 EXP CFG - * - * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals - */ - -/* - * Queue Manager - */ -#define IXP4XX_QMGR_BASE_PHYS (0x60000000) -#define IXP4XX_QMGR_REGION_SIZE (0x00004000) - -/* - * Expansion BUS Configuration registers - */ -#define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) -#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) -#define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) - -/* - * PCI Config registers - */ -#define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) -#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) -#define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) - -/* - * Peripheral space - */ -#define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) -#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) -#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) - -/* - * Debug UART - * - * This is basically a remap of UART1 into a region that is section - * aligned so that it * can be used with the low-level debug code. - */ -#define IXP4XX_DEBUG_UART_BASE_PHYS (0xC8000000) -#define IXP4XX_DEBUG_UART_BASE_VIRT (0xffb00000) -#define IXP4XX_DEBUG_UART_REGION_SIZE (0x00001000) - -#define IXP4XX_EXP_CS0_OFFSET 0x00 -#define IXP4XX_EXP_CS1_OFFSET 0x04 -#define IXP4XX_EXP_CS2_OFFSET 0x08 -#define IXP4XX_EXP_CS3_OFFSET 0x0C -#define IXP4XX_EXP_CS4_OFFSET 0x10 -#define IXP4XX_EXP_CS5_OFFSET 0x14 -#define IXP4XX_EXP_CS6_OFFSET 0x18 -#define IXP4XX_EXP_CS7_OFFSET 0x1C -#define IXP4XX_EXP_CFG0_OFFSET 0x20 -#define IXP4XX_EXP_CFG1_OFFSET 0x24 -#define IXP4XX_EXP_CFG2_OFFSET 0x28 -#define IXP4XX_EXP_CFG3_OFFSET 0x2C - -/* - * Expansion Bus Controller registers. - */ -#define IXP4XX_EXP_REG(x) ((volatile u32 *)(IXP4XX_EXP_CFG_BASE_VIRT+(x))) - -#define IXP4XX_EXP_CS0 IXP4XX_EXP_REG(IXP4XX_EXP_CS0_OFFSET) -#define IXP4XX_EXP_CS1 IXP4XX_EXP_REG(IXP4XX_EXP_CS1_OFFSET) -#define IXP4XX_EXP_CS2 IXP4XX_EXP_REG(IXP4XX_EXP_CS2_OFFSET) -#define IXP4XX_EXP_CS3 IXP4XX_EXP_REG(IXP4XX_EXP_CS3_OFFSET) -#define IXP4XX_EXP_CS4 IXP4XX_EXP_REG(IXP4XX_EXP_CS4_OFFSET) -#define IXP4XX_EXP_CS5 IXP4XX_EXP_REG(IXP4XX_EXP_CS5_OFFSET) -#define IXP4XX_EXP_CS6 IXP4XX_EXP_REG(IXP4XX_EXP_CS6_OFFSET) -#define IXP4XX_EXP_CS7 IXP4XX_EXP_REG(IXP4XX_EXP_CS7_OFFSET) - -#define IXP4XX_EXP_CFG0 IXP4XX_EXP_REG(IXP4XX_EXP_CFG0_OFFSET) -#define IXP4XX_EXP_CFG1 IXP4XX_EXP_REG(IXP4XX_EXP_CFG1_OFFSET) -#define IXP4XX_EXP_CFG2 IXP4XX_EXP_REG(IXP4XX_EXP_CFG2_OFFSET) -#define IXP4XX_EXP_CFG3 IXP4XX_EXP_REG(IXP4XX_EXP_CFG3_OFFSET) - - -/* - * Peripheral Space Register Region Base Addresses - */ -#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) -#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) -#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) -#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) -#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) -#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) -#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) -#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) -#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) -#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) -#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) -#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) -/* ixp46X only */ -#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000) -#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000) -#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000) -#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000) -#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000) -#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000) -#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000) - - -#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) -#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) -#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) -#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) -#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) -#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) -#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x6000) -#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x7000) -#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x8000) -#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) -#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) -#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) -/* ixp46X only */ -#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000) -#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000) -#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000) -#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000) -#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000) -#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000) -#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000) - -/* - * Constants to make it easy to access Interrupt Controller registers - */ -#define IXP4XX_ICPR_OFFSET 0x00 /* Interrupt Status */ -#define IXP4XX_ICMR_OFFSET 0x04 /* Interrupt Enable */ -#define IXP4XX_ICLR_OFFSET 0x08 /* Interrupt IRQ/FIQ Select */ -#define IXP4XX_ICIP_OFFSET 0x0C /* IRQ Status */ -#define IXP4XX_ICFP_OFFSET 0x10 /* FIQ Status */ -#define IXP4XX_ICHR_OFFSET 0x14 /* Interrupt Priority */ -#define IXP4XX_ICIH_OFFSET 0x18 /* IRQ Highest Pri Int */ -#define IXP4XX_ICFH_OFFSET 0x1C /* FIQ Highest Pri Int */ - -/* - * IXP465-only - */ -#define IXP4XX_ICPR2_OFFSET 0x20 /* Interrupt Status 2 */ -#define IXP4XX_ICMR2_OFFSET 0x24 /* Interrupt Enable 2 */ -#define IXP4XX_ICLR2_OFFSET 0x28 /* Interrupt IRQ/FIQ Select 2 */ -#define IXP4XX_ICIP2_OFFSET 0x2C /* IRQ Status */ -#define IXP4XX_ICFP2_OFFSET 0x30 /* FIQ Status */ -#define IXP4XX_ICEEN_OFFSET 0x34 /* Error High Pri Enable */ - - -/* - * Interrupt Controller Register Definitions. - */ - -#define IXP4XX_INTC_REG(x) ((volatile u32 *)(IXP4XX_INTC_BASE_VIRT+(x))) - -#define IXP4XX_ICPR IXP4XX_INTC_REG(IXP4XX_ICPR_OFFSET) -#define IXP4XX_ICMR IXP4XX_INTC_REG(IXP4XX_ICMR_OFFSET) -#define IXP4XX_ICLR IXP4XX_INTC_REG(IXP4XX_ICLR_OFFSET) -#define IXP4XX_ICIP IXP4XX_INTC_REG(IXP4XX_ICIP_OFFSET) -#define IXP4XX_ICFP IXP4XX_INTC_REG(IXP4XX_ICFP_OFFSET) -#define IXP4XX_ICHR IXP4XX_INTC_REG(IXP4XX_ICHR_OFFSET) -#define IXP4XX_ICIH IXP4XX_INTC_REG(IXP4XX_ICIH_OFFSET) -#define IXP4XX_ICFH IXP4XX_INTC_REG(IXP4XX_ICFH_OFFSET) -#define IXP4XX_ICPR2 IXP4XX_INTC_REG(IXP4XX_ICPR2_OFFSET) -#define IXP4XX_ICMR2 IXP4XX_INTC_REG(IXP4XX_ICMR2_OFFSET) -#define IXP4XX_ICLR2 IXP4XX_INTC_REG(IXP4XX_ICLR2_OFFSET) -#define IXP4XX_ICIP2 IXP4XX_INTC_REG(IXP4XX_ICIP2_OFFSET) -#define IXP4XX_ICFP2 IXP4XX_INTC_REG(IXP4XX_ICFP2_OFFSET) -#define IXP4XX_ICEEN IXP4XX_INTC_REG(IXP4XX_ICEEN_OFFSET) - -/* - * Constants to make it easy to access GPIO registers - */ -#define IXP4XX_GPIO_GPOUTR_OFFSET 0x00 -#define IXP4XX_GPIO_GPOER_OFFSET 0x04 -#define IXP4XX_GPIO_GPINR_OFFSET 0x08 -#define IXP4XX_GPIO_GPISR_OFFSET 0x0C -#define IXP4XX_GPIO_GPIT1R_OFFSET 0x10 -#define IXP4XX_GPIO_GPIT2R_OFFSET 0x14 -#define IXP4XX_GPIO_GPCLKR_OFFSET 0x18 -#define IXP4XX_GPIO_GPDBSELR_OFFSET 0x1C - -/* - * GPIO Register Definitions. - * [Only perform 32bit reads/writes] - */ -#define IXP4XX_GPIO_REG(x) ((volatile u32 *)(IXP4XX_GPIO_BASE_VIRT+(x))) - -#define IXP4XX_GPIO_GPOUTR IXP4XX_GPIO_REG(IXP4XX_GPIO_GPOUTR_OFFSET) -#define IXP4XX_GPIO_GPOER IXP4XX_GPIO_REG(IXP4XX_GPIO_GPOER_OFFSET) -#define IXP4XX_GPIO_GPINR IXP4XX_GPIO_REG(IXP4XX_GPIO_GPINR_OFFSET) -#define IXP4XX_GPIO_GPISR IXP4XX_GPIO_REG(IXP4XX_GPIO_GPISR_OFFSET) -#define IXP4XX_GPIO_GPIT1R IXP4XX_GPIO_REG(IXP4XX_GPIO_GPIT1R_OFFSET) -#define IXP4XX_GPIO_GPIT2R IXP4XX_GPIO_REG(IXP4XX_GPIO_GPIT2R_OFFSET) -#define IXP4XX_GPIO_GPCLKR IXP4XX_GPIO_REG(IXP4XX_GPIO_GPCLKR_OFFSET) -#define IXP4XX_GPIO_GPDBSELR IXP4XX_GPIO_REG(IXP4XX_GPIO_GPDBSELR_OFFSET) - -/* - * GPIO register bit definitions - */ - -/* Interrupt styles - */ -#define IXP4XX_GPIO_STYLE_ACTIVE_HIGH 0x0 -#define IXP4XX_GPIO_STYLE_ACTIVE_LOW 0x1 -#define IXP4XX_GPIO_STYLE_RISING_EDGE 0x2 -#define IXP4XX_GPIO_STYLE_FALLING_EDGE 0x3 -#define IXP4XX_GPIO_STYLE_TRANSITIONAL 0x4 - -/* - * Mask used to clear interrupt styles - */ -#define IXP4XX_GPIO_STYLE_CLEAR 0x7 -#define IXP4XX_GPIO_STYLE_SIZE 3 - -/* - * Constants to make it easy to access Timer Control/Status registers - */ -#define IXP4XX_OSTS_OFFSET 0x00 /* Continious TimeStamp */ -#define IXP4XX_OST1_OFFSET 0x04 /* Timer 1 Timestamp */ -#define IXP4XX_OSRT1_OFFSET 0x08 /* Timer 1 Reload */ -#define IXP4XX_OST2_OFFSET 0x0C /* Timer 2 Timestamp */ -#define IXP4XX_OSRT2_OFFSET 0x10 /* Timer 2 Reload */ -#define IXP4XX_OSWT_OFFSET 0x14 /* Watchdog Timer */ -#define IXP4XX_OSWE_OFFSET 0x18 /* Watchdog Enable */ -#define IXP4XX_OSWK_OFFSET 0x1C /* Watchdog Key */ -#define IXP4XX_OSST_OFFSET 0x20 /* Timer Status */ - -/* - * Operating System Timer Register Definitions. - */ - -#define IXP4XX_TIMER_REG(x) ((volatile u32 *)(IXP4XX_TIMER_BASE_VIRT+(x))) - -#define IXP4XX_OSTS IXP4XX_TIMER_REG(IXP4XX_OSTS_OFFSET) -#define IXP4XX_OST1 IXP4XX_TIMER_REG(IXP4XX_OST1_OFFSET) -#define IXP4XX_OSRT1 IXP4XX_TIMER_REG(IXP4XX_OSRT1_OFFSET) -#define IXP4XX_OST2 IXP4XX_TIMER_REG(IXP4XX_OST2_OFFSET) -#define IXP4XX_OSRT2 IXP4XX_TIMER_REG(IXP4XX_OSRT2_OFFSET) -#define IXP4XX_OSWT IXP4XX_TIMER_REG(IXP4XX_OSWT_OFFSET) -#define IXP4XX_OSWE IXP4XX_TIMER_REG(IXP4XX_OSWE_OFFSET) -#define IXP4XX_OSWK IXP4XX_TIMER_REG(IXP4XX_OSWK_OFFSET) -#define IXP4XX_OSST IXP4XX_TIMER_REG(IXP4XX_OSST_OFFSET) - -/* - * Timer register values and bit definitions - */ -#define IXP4XX_OST_ENABLE 0x00000001 -#define IXP4XX_OST_ONE_SHOT 0x00000002 -/* Low order bits of reload value ignored */ -#define IXP4XX_OST_RELOAD_MASK 0x00000003 -#define IXP4XX_OST_DISABLED 0x00000000 -#define IXP4XX_OSST_TIMER_1_PEND 0x00000001 -#define IXP4XX_OSST_TIMER_2_PEND 0x00000002 -#define IXP4XX_OSST_TIMER_TS_PEND 0x00000004 -#define IXP4XX_OSST_TIMER_WDOG_PEND 0x00000008 -#define IXP4XX_OSST_TIMER_WARM_RESET 0x00000010 - -#define IXP4XX_WDT_KEY 0x0000482E - -#define IXP4XX_WDT_RESET_ENABLE 0x00000001 -#define IXP4XX_WDT_IRQ_ENABLE 0x00000002 -#define IXP4XX_WDT_COUNT_ENABLE 0x00000004 - - -/* - * Constants to make it easy to access PCI Control/Status registers - */ -#define PCI_NP_AD_OFFSET 0x00 -#define PCI_NP_CBE_OFFSET 0x04 -#define PCI_NP_WDATA_OFFSET 0x08 -#define PCI_NP_RDATA_OFFSET 0x0c -#define PCI_CRP_AD_CBE_OFFSET 0x10 -#define PCI_CRP_WDATA_OFFSET 0x14 -#define PCI_CRP_RDATA_OFFSET 0x18 -#define PCI_CSR_OFFSET 0x1c -#define PCI_ISR_OFFSET 0x20 -#define PCI_INTEN_OFFSET 0x24 -#define PCI_DMACTRL_OFFSET 0x28 -#define PCI_AHBMEMBASE_OFFSET 0x2c -#define PCI_AHBIOBASE_OFFSET 0x30 -#define PCI_PCIMEMBASE_OFFSET 0x34 -#define PCI_AHBDOORBELL_OFFSET 0x38 -#define PCI_PCIDOORBELL_OFFSET 0x3C -#define PCI_ATPDMA0_AHBADDR_OFFSET 0x40 -#define PCI_ATPDMA0_PCIADDR_OFFSET 0x44 -#define PCI_ATPDMA0_LENADDR_OFFSET 0x48 -#define PCI_ATPDMA1_AHBADDR_OFFSET 0x4C -#define PCI_ATPDMA1_PCIADDR_OFFSET 0x50 -#define PCI_ATPDMA1_LENADDR_OFFSET 0x54 - -/* - * PCI Control/Status Registers - */ -#define IXP4XX_PCI_CSR(x) ((volatile u32 *)(IXP4XX_PCI_CFG_BASE_VIRT+(x))) - -#define PCI_NP_AD IXP4XX_PCI_CSR(PCI_NP_AD_OFFSET) -#define PCI_NP_CBE IXP4XX_PCI_CSR(PCI_NP_CBE_OFFSET) -#define PCI_NP_WDATA IXP4XX_PCI_CSR(PCI_NP_WDATA_OFFSET) -#define PCI_NP_RDATA IXP4XX_PCI_CSR(PCI_NP_RDATA_OFFSET) -#define PCI_CRP_AD_CBE IXP4XX_PCI_CSR(PCI_CRP_AD_CBE_OFFSET) -#define PCI_CRP_WDATA IXP4XX_PCI_CSR(PCI_CRP_WDATA_OFFSET) -#define PCI_CRP_RDATA IXP4XX_PCI_CSR(PCI_CRP_RDATA_OFFSET) -#define PCI_CSR IXP4XX_PCI_CSR(PCI_CSR_OFFSET) -#define PCI_ISR IXP4XX_PCI_CSR(PCI_ISR_OFFSET) -#define PCI_INTEN IXP4XX_PCI_CSR(PCI_INTEN_OFFSET) -#define PCI_DMACTRL IXP4XX_PCI_CSR(PCI_DMACTRL_OFFSET) -#define PCI_AHBMEMBASE IXP4XX_PCI_CSR(PCI_AHBMEMBASE_OFFSET) -#define PCI_AHBIOBASE IXP4XX_PCI_CSR(PCI_AHBIOBASE_OFFSET) -#define PCI_PCIMEMBASE IXP4XX_PCI_CSR(PCI_PCIMEMBASE_OFFSET) -#define PCI_AHBDOORBELL IXP4XX_PCI_CSR(PCI_AHBDOORBELL_OFFSET) -#define PCI_PCIDOORBELL IXP4XX_PCI_CSR(PCI_PCIDOORBELL_OFFSET) -#define PCI_ATPDMA0_AHBADDR IXP4XX_PCI_CSR(PCI_ATPDMA0_AHBADDR_OFFSET) -#define PCI_ATPDMA0_PCIADDR IXP4XX_PCI_CSR(PCI_ATPDMA0_PCIADDR_OFFSET) -#define PCI_ATPDMA0_LENADDR IXP4XX_PCI_CSR(PCI_ATPDMA0_LENADDR_OFFSET) -#define PCI_ATPDMA1_AHBADDR IXP4XX_PCI_CSR(PCI_ATPDMA1_AHBADDR_OFFSET) -#define PCI_ATPDMA1_PCIADDR IXP4XX_PCI_CSR(PCI_ATPDMA1_PCIADDR_OFFSET) -#define PCI_ATPDMA1_LENADDR IXP4XX_PCI_CSR(PCI_ATPDMA1_LENADDR_OFFSET) - -/* - * PCI register values and bit definitions - */ - -/* CSR bit definitions */ -#define PCI_CSR_HOST 0x00000001 -#define PCI_CSR_ARBEN 0x00000002 -#define PCI_CSR_ADS 0x00000004 -#define PCI_CSR_PDS 0x00000008 -#define PCI_CSR_ABE 0x00000010 -#define PCI_CSR_DBT 0x00000020 -#define PCI_CSR_ASE 0x00000100 -#define PCI_CSR_IC 0x00008000 - -/* ISR (Interrupt status) Register bit definitions */ -#define PCI_ISR_PSE 0x00000001 -#define PCI_ISR_PFE 0x00000002 -#define PCI_ISR_PPE 0x00000004 -#define PCI_ISR_AHBE 0x00000008 -#define PCI_ISR_APDC 0x00000010 -#define PCI_ISR_PADC 0x00000020 -#define PCI_ISR_ADB 0x00000040 -#define PCI_ISR_PDB 0x00000080 - -/* INTEN (Interrupt Enable) Register bit definitions */ -#define PCI_INTEN_PSE 0x00000001 -#define PCI_INTEN_PFE 0x00000002 -#define PCI_INTEN_PPE 0x00000004 -#define PCI_INTEN_AHBE 0x00000008 -#define PCI_INTEN_APDC 0x00000010 -#define PCI_INTEN_PADC 0x00000020 -#define PCI_INTEN_ADB 0x00000040 -#define PCI_INTEN_PDB 0x00000080 - -/* - * Shift value for byte enable on NP cmd/byte enable register - */ -#define IXP4XX_PCI_NP_CBE_BESL 4 - -/* - * PCI commands supported by NP access unit - */ -#define NP_CMD_IOREAD 0x2 -#define NP_CMD_IOWRITE 0x3 -#define NP_CMD_CONFIGREAD 0xa -#define NP_CMD_CONFIGWRITE 0xb -#define NP_CMD_MEMREAD 0x6 -#define NP_CMD_MEMWRITE 0x7 - -/* - * Constants for CRP access into local config space - */ -#define CRP_AD_CBE_BESL 20 -#define CRP_AD_CBE_WRITE 0x00010000 - - -/* - * USB Device Controller - * - * These are used by the USB gadget driver, so they don't follow the - * IXP4XX_ naming convetions. - * - */ -# define IXP4XX_USB_REG(x) (*((volatile u32 *)(x))) - -/* UDC Undocumented - Reserved1 */ -#define UDC_RES1 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0004) -/* UDC Undocumented - Reserved2 */ -#define UDC_RES2 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0008) -/* UDC Undocumented - Reserved3 */ -#define UDC_RES3 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x000C) -/* UDC Control Register */ -#define UDCCR IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0000) -/* UDC Endpoint 0 Control/Status Register */ -#define UDCCS0 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0010) -/* UDC Endpoint 1 (IN) Control/Status Register */ -#define UDCCS1 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0014) -/* UDC Endpoint 2 (OUT) Control/Status Register */ -#define UDCCS2 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0018) -/* UDC Endpoint 3 (IN) Control/Status Register */ -#define UDCCS3 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x001C) -/* UDC Endpoint 4 (OUT) Control/Status Register */ -#define UDCCS4 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0020) -/* UDC Endpoint 5 (Interrupt) Control/Status Register */ -#define UDCCS5 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0024) -/* UDC Endpoint 6 (IN) Control/Status Register */ -#define UDCCS6 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0028) -/* UDC Endpoint 7 (OUT) Control/Status Register */ -#define UDCCS7 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x002C) -/* UDC Endpoint 8 (IN) Control/Status Register */ -#define UDCCS8 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0030) -/* UDC Endpoint 9 (OUT) Control/Status Register */ -#define UDCCS9 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0034) -/* UDC Endpoint 10 (Interrupt) Control/Status Register */ -#define UDCCS10 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0038) -/* UDC Endpoint 11 (IN) Control/Status Register */ -#define UDCCS11 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x003C) -/* UDC Endpoint 12 (OUT) Control/Status Register */ -#define UDCCS12 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0040) -/* UDC Endpoint 13 (IN) Control/Status Register */ -#define UDCCS13 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0044) -/* UDC Endpoint 14 (OUT) Control/Status Register */ -#define UDCCS14 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0048) -/* UDC Endpoint 15 (Interrupt) Control/Status Register */ -#define UDCCS15 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x004C) -/* UDC Frame Number Register High */ -#define UFNRH IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0060) -/* UDC Frame Number Register Low */ -#define UFNRL IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0064) -/* UDC Byte Count Reg 2 */ -#define UBCR2 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0068) -/* UDC Byte Count Reg 4 */ -#define UBCR4 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x006c) -/* UDC Byte Count Reg 7 */ -#define UBCR7 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0070) -/* UDC Byte Count Reg 9 */ -#define UBCR9 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0074) -/* UDC Byte Count Reg 12 */ -#define UBCR12 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0078) -/* UDC Byte Count Reg 14 */ -#define UBCR14 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x007c) -/* UDC Endpoint 0 Data Register */ -#define UDDR0 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0080) -/* UDC Endpoint 1 Data Register */ -#define UDDR1 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0100) -/* UDC Endpoint 2 Data Register */ -#define UDDR2 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0180) -/* UDC Endpoint 3 Data Register */ -#define UDDR3 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0200) -/* UDC Endpoint 4 Data Register */ -#define UDDR4 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0400) -/* UDC Endpoint 5 Data Register */ -#define UDDR5 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x00A0) -/* UDC Endpoint 6 Data Register */ -#define UDDR6 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0600) -/* UDC Endpoint 7 Data Register */ -#define UDDR7 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0680) -/* UDC Endpoint 8 Data Register */ -#define UDDR8 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0700) -/* UDC Endpoint 9 Data Register */ -#define UDDR9 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0900) -/* UDC Endpoint 10 Data Register */ -#define UDDR10 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x00C0) -/* UDC Endpoint 11 Data Register */ -#define UDDR11 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0B00) -/* UDC Endpoint 12 Data Register */ -#define UDDR12 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0B80) -/* UDC Endpoint 13 Data Register */ -#define UDDR13 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0C00) -/* UDC Endpoint 14 Data Register */ -#define UDDR14 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0E00) -/* UDC Endpoint 15 Data Register */ -#define UDDR15 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x00E0) -/* UDC Interrupt Control Register 0 */ -#define UICR0 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0050) -/* UDC Interrupt Control Register 1 */ -#define UICR1 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0054) -/* UDC Status Interrupt Register 0 */ -#define USIR0 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0058) -/* UDC Status Interrupt Register 1 */ -#define USIR1 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x005C) - -#define UDCCR_UDE (1 << 0) /* UDC enable */ -#define UDCCR_UDA (1 << 1) /* UDC active */ -#define UDCCR_RSM (1 << 2) /* Device resume */ -#define UDCCR_RESIR (1 << 3) /* Resume interrupt request */ -#define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */ -#define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */ -#define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ -#define UDCCR_REM (1 << 7) /* Reset interrupt mask */ - -#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ -#define UDCCS0_IPR (1 << 1) /* IN packet ready */ -#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */ -#define UDCCS0_SST (1 << 4) /* Sent stall */ -#define UDCCS0_FST (1 << 5) /* Force stall */ -#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ -#define UDCCS0_SA (1 << 7) /* Setup active */ - -#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_BI_SST (1 << 4) /* Sent stall */ -#define UDCCS_BI_FST (1 << 5) /* Force stall */ -#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ - -#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_BO_DME (1 << 3) /* DMA enable */ -#define UDCCS_BO_SST (1 << 4) /* Sent stall */ -#define UDCCS_BO_FST (1 << 5) /* Force stall */ -#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ - -#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ - -#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_IO_ROF (1 << 3) /* Receive overflow */ -#define UDCCS_IO_DME (1 << 3) /* DMA enable */ -#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ - -#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_INT_SST (1 << 4) /* Sent stall */ -#define UDCCS_INT_FST (1 << 5) /* Force stall */ -#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ - -#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ -#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ -#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ -#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ -#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ -#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ -#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ -#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ - -#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ -#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ -#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ -#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ -#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ -#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ -#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ -#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ - -#define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */ -#define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */ -#define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */ -#define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */ -#define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */ -#define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */ -#define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */ -#define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */ - -#define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */ -#define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */ -#define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */ -#define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */ -#define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */ -#define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */ -#define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */ -#define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */ - -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - -/* "fuse" bits of IXP_EXP_CFG2 */ -#define IXP4XX_FEATURE_RCOMP (1 << 0) -#define IXP4XX_FEATURE_USB_DEVICE (1 << 1) -#define IXP4XX_FEATURE_HASH (1 << 2) -#define IXP4XX_FEATURE_AES (1 << 3) -#define IXP4XX_FEATURE_DES (1 << 4) -#define IXP4XX_FEATURE_HDLC (1 << 5) -#define IXP4XX_FEATURE_AAL (1 << 6) -#define IXP4XX_FEATURE_HSS (1 << 7) -#define IXP4XX_FEATURE_UTOPIA (1 << 8) -#define IXP4XX_FEATURE_NPEB_ETH0 (1 << 9) -#define IXP4XX_FEATURE_NPEC_ETH (1 << 10) -#define IXP4XX_FEATURE_RESET_NPEA (1 << 11) -#define IXP4XX_FEATURE_RESET_NPEB (1 << 12) -#define IXP4XX_FEATURE_RESET_NPEC (1 << 13) -#define IXP4XX_FEATURE_PCI (1 << 14) -#define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15) -#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) -#define IXP4XX_FEATURE_USB_HOST (1 << 18) -#define IXP4XX_FEATURE_NPEA_ETH (1 << 19) -#define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20) -#define IXP4XX_FEATURE_RSA (1 << 21) -#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) -#define IXP4XX_FEATURE_RESERVED (0xFF << 24) - -#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC | \ - IXP4XX_FEATURE_USB_HOST | \ - IXP4XX_FEATURE_NPEA_ETH | \ - IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ - IXP4XX_FEATURE_RSA | \ - IXP4XX_FEATURE_XSCALE_MAX_FREQ) - -#endif diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h deleted file mode 100644 index af9667b..0000000 --- a/include/asm-arm/arch-ixp4xx/memory.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/memory.h - * - * Copyright (c) 2001-2004 MontaVista Software, Inc. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -#if !defined(__ASSEMBLY__) && defined(CONFIG_PCI) - -void ixp4xx_adjust_zones(int node, unsigned long *size, unsigned long *holes); - -#define arch_adjust_zones(node, size, holes) \ - ixp4xx_adjust_zones(node, size, holes) - -#define ISA_DMA_THRESHOLD (SZ_64M - 1) - -#endif - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - * - * These are dummies for now. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h deleted file mode 100644 index ecb12d6..0000000 --- a/include/asm-arm/arch-ixp4xx/nas100d.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/nas100d.h - * - * NAS100D platform specific definitions - * - * Copyright (c) 2005 Tower Technologies - * - * Author: Alessandro Zummo - * - * based on ixdp425.h: - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define NAS100D_SDA_PIN 5 -#define NAS100D_SCL_PIN 6 - -/* - * NAS100D PCI IRQs - */ -#define NAS100D_PCI_MAX_DEV 3 -#define NAS100D_PCI_IRQ_LINES 3 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define NAS100D_PCI_INTA_PIN 11 -#define NAS100D_PCI_INTB_PIN 10 -#define NAS100D_PCI_INTC_PIN 9 -#define NAS100D_PCI_INTD_PIN 8 -#define NAS100D_PCI_INTE_PIN 7 - -/* Buttons */ - -#define NAS100D_PB_GPIO 14 /* power button */ -#define NAS100D_RB_GPIO 4 /* reset button */ - -/* Power control */ - -#define NAS100D_PO_GPIO 12 /* power off */ - -/* LEDs */ - -#define NAS100D_LED_WLAN_GPIO 0 -#define NAS100D_LED_DISK_GPIO 3 -#define NAS100D_LED_PWR_GPIO 15 diff --git a/include/asm-arm/arch-ixp4xx/npe.h b/include/asm-arm/arch-ixp4xx/npe.h deleted file mode 100644 index 37d0511..0000000 --- a/include/asm-arm/arch-ixp4xx/npe.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef __IXP4XX_NPE_H -#define __IXP4XX_NPE_H - -#include - -extern const char *npe_names[]; - -struct npe_regs { - u32 exec_addr, exec_data, exec_status_cmd, exec_count; - u32 action_points[4]; - u32 watchpoint_fifo, watch_count; - u32 profile_count; - u32 messaging_status, messaging_control; - u32 mailbox_status, /*messaging_*/ in_out_fifo; -}; - -struct npe { - struct resource *mem_res; - struct npe_regs __iomem *regs; - u32 regs_phys; - int id; - int valid; -}; - - -static inline const char *npe_name(struct npe *npe) -{ - return npe_names[npe->id]; -} - -int npe_running(struct npe *npe); -int npe_send_message(struct npe *npe, const void *msg, const char *what); -int npe_recv_message(struct npe *npe, void *msg, const char *what); -int npe_send_recv_message(struct npe *npe, void *msg, const char *what); -int npe_load_firmware(struct npe *npe, const char *name, struct device *dev); -struct npe *npe_request(int id); -void npe_release(struct npe *npe); - -#endif /* __IXP4XX_NPE_H */ diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h deleted file mode 100644 index fa895f4..0000000 --- a/include/asm-arm/arch-ixp4xx/nslu2.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/nslu2.h - * - * NSLU2 platform specific definitions - * - * Author: Mark Rakes - * Maintainers: http://www.nslu2-linux.org - * - * based on ixdp425.h: - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define NSLU2_SDA_PIN 7 -#define NSLU2_SCL_PIN 6 - -/* - * NSLU2 PCI IRQs - */ -#define NSLU2_PCI_MAX_DEV 3 -#define NSLU2_PCI_IRQ_LINES 3 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define NSLU2_PCI_INTA_PIN 11 -#define NSLU2_PCI_INTB_PIN 10 -#define NSLU2_PCI_INTC_PIN 9 -#define NSLU2_PCI_INTD_PIN 8 - -/* NSLU2 Timer */ -#define NSLU2_FREQ 66000000 - -/* Buttons */ - -#define NSLU2_PB_GPIO 5 /* power button */ -#define NSLU2_PO_GPIO 8 /* power off */ -#define NSLU2_RB_GPIO 12 /* reset button */ - -/* Buzzer */ - -#define NSLU2_GPIO_BUZZ 4 - -/* LEDs */ - -#define NSLU2_LED_RED_GPIO 0 -#define NSLU2_LED_GRN_GPIO 1 -#define NSLU2_LED_DISK1_GPIO 3 -#define NSLU2_LED_DISK2_GPIO 2 diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h deleted file mode 100644 index b2af515..0000000 --- a/include/asm-arm/arch-ixp4xx/platform.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/platform.h - * - * Constants and functions that are useful to IXP4xx platform-specific code - * and device drivers. - * - * Copyright (C) 2004 MontaVista Software, Inc. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#ifndef __ASSEMBLY__ - -#include - -#ifndef __ARMEB__ -#define REG_OFFSET 0 -#else -#define REG_OFFSET 3 -#endif - -/* - * Expansion bus memory regions - */ -#define IXP4XX_EXP_BUS_BASE_PHYS (0x50000000) - -/* - * The expansion bus on the IXP4xx can be configured for either 16 or - * 32MB windows and the CS offset for each region changes based on the - * current configuration. This means that we cannot simply hardcode - * each offset. ixp4xx_sys_init() looks at the expansion bus configuration - * as setup by the bootloader to determine our window size. - */ -extern unsigned long ixp4xx_exp_bus_size; - -#define IXP4XX_EXP_BUS_BASE(region)\ - (IXP4XX_EXP_BUS_BASE_PHYS + ((region) * ixp4xx_exp_bus_size)) - -#define IXP4XX_EXP_BUS_END(region)\ - (IXP4XX_EXP_BUS_BASE(region) + ixp4xx_exp_bus_size - 1) - -/* Those macros can be used to adjust timing and configure - * other features for each region. - */ - -#define IXP4XX_EXP_BUS_RECOVERY_T(x) (((x) & 0x0f) << 16) -#define IXP4XX_EXP_BUS_HOLD_T(x) (((x) & 0x03) << 20) -#define IXP4XX_EXP_BUS_STROBE_T(x) (((x) & 0x0f) << 22) -#define IXP4XX_EXP_BUS_SETUP_T(x) (((x) & 0x03) << 26) -#define IXP4XX_EXP_BUS_ADDR_T(x) (((x) & 0x03) << 28) -#define IXP4XX_EXP_BUS_SIZE(x) (((x) & 0x0f) << 10) -#define IXP4XX_EXP_BUS_CYCLES(x) (((x) & 0x03) << 14) - -#define IXP4XX_EXP_BUS_CS_EN (1L << 31) -#define IXP4XX_EXP_BUS_BYTE_RD16 (1L << 6) -#define IXP4XX_EXP_BUS_HRDY_POL (1L << 5) -#define IXP4XX_EXP_BUS_MUX_EN (1L << 4) -#define IXP4XX_EXP_BUS_SPLT_EN (1L << 3) -#define IXP4XX_EXP_BUS_WR_EN (1L << 1) -#define IXP4XX_EXP_BUS_BYTE_EN (1L << 0) - -#define IXP4XX_EXP_BUS_CYCLES_INTEL 0x00 -#define IXP4XX_EXP_BUS_CYCLES_MOTOROLA 0x01 -#define IXP4XX_EXP_BUS_CYCLES_HPI 0x02 - -#define IXP4XX_FLASH_WRITABLE (0x2) -#define IXP4XX_FLASH_DEFAULT (0xbcd23c40) -#define IXP4XX_FLASH_WRITE (0xbcd23c42) - -/* - * Clock Speed Definitions. - */ -#define IXP4XX_PERIPHERAL_BUS_CLOCK (66) /* 66Mhzi APB BUS */ -#define IXP4XX_UART_XTAL 14745600 - -/* - * This structure provide a means for the board setup code - * to give information to th pata_ixp4xx driver. It is - * passed as platform_data. - */ -struct ixp4xx_pata_data { - volatile u32 *cs0_cfg; - volatile u32 *cs1_cfg; - unsigned long cs0_bits; - unsigned long cs1_bits; - void __iomem *cs0; - void __iomem *cs1; -}; - -struct sys_timer; - -#define IXP4XX_ETH_NPEA 0x00 -#define IXP4XX_ETH_NPEB 0x10 -#define IXP4XX_ETH_NPEC 0x20 - -/* Information about built-in Ethernet MAC interfaces */ -struct eth_plat_info { - u8 phy; /* MII PHY ID, 0 - 31 */ - u8 rxq; /* configurable, currently 0 - 31 only */ - u8 txreadyq; - u8 hwaddr[6]; -}; - -/* Information about built-in HSS (synchronous serial) interfaces */ -struct hss_plat_info { - int (*set_clock)(int port, unsigned int clock_type); - int (*open)(int port, void *pdev, - void (*set_carrier_cb)(void *pdev, int carrier)); - void (*close)(int port, void *pdev); - u8 txreadyq; -}; - -/* - * Frequency of clock used for primary clocksource - */ -extern unsigned long ixp4xx_timer_freq; - -/* - * Functions used by platform-level setup code - */ -extern void ixp4xx_map_io(void); -extern void ixp4xx_init_irq(void); -extern void ixp4xx_sys_init(void); -extern void ixp4xx_timer_init(void); -extern struct sys_timer ixp4xx_timer; -extern void ixp4xx_pci_preinit(void); -struct pci_sys_data; -extern int ixp4xx_setup(int nr, struct pci_sys_data *sys); -extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys); - -/* - * GPIO-functions - */ -/* - * The following converted to the real HW bits the gpio_line_config - */ -/* GPIO pin types */ -#define IXP4XX_GPIO_OUT 0x1 -#define IXP4XX_GPIO_IN 0x2 - -/* GPIO signal types */ -#define IXP4XX_GPIO_LOW 0 -#define IXP4XX_GPIO_HIGH 1 - -/* GPIO Clocks */ -#define IXP4XX_GPIO_CLK_0 14 -#define IXP4XX_GPIO_CLK_1 15 - -static inline void gpio_line_config(u8 line, u32 direction) -{ - if (direction == IXP4XX_GPIO_IN) - *IXP4XX_GPIO_GPOER |= (1 << line); - else - *IXP4XX_GPIO_GPOER &= ~(1 << line); -} - -static inline void gpio_line_get(u8 line, int *value) -{ - *value = (*IXP4XX_GPIO_GPINR >> line) & 0x1; -} - -static inline void gpio_line_set(u8 line, int value) -{ - if (value == IXP4XX_GPIO_HIGH) - *IXP4XX_GPIO_GPOUTR |= (1 << line); - else if (value == IXP4XX_GPIO_LOW) - *IXP4XX_GPIO_GPOUTR &= ~(1 << line); -} - -#endif // __ASSEMBLY__ - diff --git a/include/asm-arm/arch-ixp4xx/prpmc1100.h b/include/asm-arm/arch-ixp4xx/prpmc1100.h deleted file mode 100644 index 100855f..0000000 --- a/include/asm-arm/arch-ixp4xx/prpmc1100.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/prpmc1100.h - * - * Motorolla PrPMC1100 platform specific definitions - * - * Author: Deepak Saxena - * - * Copyright 2004 (c) MontaVista, Software, Inc. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H__ -#error "Do not include this directly, instead #include " -#endif - -#define PRPMC1100_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS -#define PRPMC1100_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE - -#define PRPMC1100_PCI_MIN_DEVID 10 -#define PRPMC1100_PCI_MAX_DEVID 16 -#define PRPMC1100_PCI_IRQ_LINES 4 - - -/* PCI controller GPIO to IRQ pin mappings */ -#define PRPMC1100_PCI_INTA_PIN 11 -#define PRPMC1100_PCI_INTB_PIN 10 -#define PRPMC1100_PCI_INTC_PIN 9 -#define PRPMC1100_PCI_INTD_PIN 8 - - diff --git a/include/asm-arm/arch-ixp4xx/qmgr.h b/include/asm-arm/arch-ixp4xx/qmgr.h deleted file mode 100644 index 1e52b95..0000000 --- a/include/asm-arm/arch-ixp4xx/qmgr.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (C) 2007 Krzysztof Halasa - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - */ - -#ifndef IXP4XX_QMGR_H -#define IXP4XX_QMGR_H - -#include -#include - -#define HALF_QUEUES 32 -#define QUEUES 64 /* only 32 lower queues currently supported */ -#define MAX_QUEUE_LENGTH 4 /* in dwords */ - -#define QUEUE_STAT1_EMPTY 1 /* queue status bits */ -#define QUEUE_STAT1_NEARLY_EMPTY 2 -#define QUEUE_STAT1_NEARLY_FULL 4 -#define QUEUE_STAT1_FULL 8 -#define QUEUE_STAT2_UNDERFLOW 1 -#define QUEUE_STAT2_OVERFLOW 2 - -#define QUEUE_WATERMARK_0_ENTRIES 0 -#define QUEUE_WATERMARK_1_ENTRY 1 -#define QUEUE_WATERMARK_2_ENTRIES 2 -#define QUEUE_WATERMARK_4_ENTRIES 3 -#define QUEUE_WATERMARK_8_ENTRIES 4 -#define QUEUE_WATERMARK_16_ENTRIES 5 -#define QUEUE_WATERMARK_32_ENTRIES 6 -#define QUEUE_WATERMARK_64_ENTRIES 7 - -/* queue interrupt request conditions */ -#define QUEUE_IRQ_SRC_EMPTY 0 -#define QUEUE_IRQ_SRC_NEARLY_EMPTY 1 -#define QUEUE_IRQ_SRC_NEARLY_FULL 2 -#define QUEUE_IRQ_SRC_FULL 3 -#define QUEUE_IRQ_SRC_NOT_EMPTY 4 -#define QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY 5 -#define QUEUE_IRQ_SRC_NOT_NEARLY_FULL 6 -#define QUEUE_IRQ_SRC_NOT_FULL 7 - -struct qmgr_regs { - u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */ - u32 stat1[4]; /* 0x400 - 0x40F */ - u32 stat2[2]; /* 0x410 - 0x417 */ - u32 statne_h; /* 0x418 - queue nearly empty */ - u32 statf_h; /* 0x41C - queue full */ - u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */ - u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */ - u32 irqstat[2]; /* 0x438 - 0x43F - IRQ access only */ - u32 reserved[1776]; - u32 sram[2048]; /* 0x2000 - 0x3FFF - config and buffer */ -}; - -void qmgr_set_irq(unsigned int queue, int src, - void (*handler)(void *pdev), void *pdev); -void qmgr_enable_irq(unsigned int queue); -void qmgr_disable_irq(unsigned int queue); - -/* request_ and release_queue() must be called from non-IRQ context */ -int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */, - unsigned int nearly_empty_watermark, - unsigned int nearly_full_watermark); -void qmgr_release_queue(unsigned int queue); - - -static inline void qmgr_put_entry(unsigned int queue, u32 val) -{ - extern struct qmgr_regs __iomem *qmgr_regs; - __raw_writel(val, &qmgr_regs->acc[queue][0]); -} - -static inline u32 qmgr_get_entry(unsigned int queue) -{ - extern struct qmgr_regs __iomem *qmgr_regs; - return __raw_readl(&qmgr_regs->acc[queue][0]); -} - -static inline int qmgr_get_stat1(unsigned int queue) -{ - extern struct qmgr_regs __iomem *qmgr_regs; - return (__raw_readl(&qmgr_regs->stat1[queue >> 3]) - >> ((queue & 7) << 2)) & 0xF; -} - -static inline int qmgr_get_stat2(unsigned int queue) -{ - extern struct qmgr_regs __iomem *qmgr_regs; - return (__raw_readl(&qmgr_regs->stat2[queue >> 4]) - >> ((queue & 0xF) << 1)) & 0x3; -} - -static inline int qmgr_stat_empty(unsigned int queue) -{ - return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_EMPTY); -} - -static inline int qmgr_stat_nearly_empty(unsigned int queue) -{ - return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_EMPTY); -} - -static inline int qmgr_stat_nearly_full(unsigned int queue) -{ - return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_NEARLY_FULL); -} - -static inline int qmgr_stat_full(unsigned int queue) -{ - return !!(qmgr_get_stat1(queue) & QUEUE_STAT1_FULL); -} - -static inline int qmgr_stat_underflow(unsigned int queue) -{ - return !!(qmgr_get_stat2(queue) & QUEUE_STAT2_UNDERFLOW); -} - -static inline int qmgr_stat_overflow(unsigned int queue) -{ - return !!(qmgr_get_stat2(queue) & QUEUE_STAT2_OVERFLOW); -} - -#endif diff --git a/include/asm-arm/arch-ixp4xx/system.h b/include/asm-arm/arch-ixp4xx/system.h deleted file mode 100644 index f11b922..0000000 --- a/include/asm-arm/arch-ixp4xx/system.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/system.h - * - * Copyright (C) 2002 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include - -static inline void arch_idle(void) -{ -#if 0 - if (!hlt_counter) - cpu_do_idle(0); -#endif -} - - -static inline void arch_reset(char mode) -{ - if ( 1 && mode == 's') { - /* Jump into ROM at address 0 */ - cpu_reset(0); - } else { - /* Use on-chip reset capability */ - - /* set the "key" register to enable access to - * "timer" and "enable" registers - */ - *IXP4XX_OSWK = IXP4XX_WDT_KEY; - - /* write 0 to the timer register for an immediate reset */ - *IXP4XX_OSWT = 0; - - *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; - } -} - diff --git a/include/asm-arm/arch-ixp4xx/timex.h b/include/asm-arm/arch-ixp4xx/timex.h deleted file mode 100644 index c2559e2..0000000 --- a/include/asm-arm/arch-ixp4xx/timex.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/timex.h - * - */ - -#include - -/* - * We use IXP425 General purpose timer for our timer needs, it runs at - * 66.66... MHz. We do a convulted calculation of CLOCK_TICK_RATE b/c the - * timer register ignores the bottom 2 bits of the LATCH value. - */ -#define FREQ 66666666 -#define CLOCK_TICK_RATE (((FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ) - diff --git a/include/asm-arm/arch-ixp4xx/udc.h b/include/asm-arm/arch-ixp4xx/udc.h deleted file mode 100644 index dbdec36f..0000000 --- a/include/asm-arm/arch-ixp4xx/udc.h +++ /dev/null @@ -1,8 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/udc.h - * - */ -#include - -extern void ixp4xx_set_udc_info(struct pxa2xx_udc_mach_info *info); - diff --git a/include/asm-arm/arch-ixp4xx/uncompress.h b/include/asm-arm/arch-ixp4xx/uncompress.h deleted file mode 100644 index 34ef48f..0000000 --- a/include/asm-arm/arch-ixp4xx/uncompress.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * include/asm-arm/arch-ixp4xx/uncompress.h - * - * Copyright (C) 2002 Intel Corporation. - * Copyright (C) 2003-2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _ARCH_UNCOMPRESS_H_ -#define _ARCH_UNCOMPRESS_H_ - -#include "ixp4xx-regs.h" -#include -#include - -#define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE) - -static volatile u32* uart_base; - -static inline void putc(int c) -{ - /* Check THRE and TEMT bits before we transmit the character. - */ - while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) - barrier(); - - *uart_base = c; -} - -static void flush(void) -{ -} - -static __inline__ void __arch_decomp_setup(unsigned long arch_id) -{ - /* - * Some boards are using UART2 as console - */ - if (machine_is_adi_coyote() || machine_is_gtwx5715() || - machine_is_gateway7001() || machine_is_wg302v2()) - uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; - else - uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; -} - -/* - * arch_id is a variable in decompress_kernel() - */ -#define arch_decomp_setup() __arch_decomp_setup(arch_id) - -#define arch_decomp_wdog() - -#endif diff --git a/include/asm-arm/arch-ixp4xx/vmalloc.h b/include/asm-arm/arch-ixp4xx/vmalloc.h deleted file mode 100644 index 050d46e..0000000 --- a/include/asm-arm/arch-ixp4xx/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * linux/include/asm-arm/arch-ixp4xx/vmalloc.h - */ -#define VMALLOC_END (0xFF000000) - diff --git a/include/asm-arm/arch-kirkwood/debug-macro.S b/include/asm-arm/arch-kirkwood/debug-macro.S deleted file mode 100644 index f55fb8a..0000000 --- a/include/asm-arm/arch-kirkwood/debug-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE - ldrne \rx, =KIRKWOOD_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-kirkwood/dma.h b/include/asm-arm/arch-kirkwood/dma.h deleted file mode 100644 index 40a8c17..0000000 --- a/include/asm-arm/arch-kirkwood/dma.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/include/asm-arm/arch-kirkwood/entry-macro.S b/include/asm-arm/arch-kirkwood/entry-macro.S deleted file mode 100644 index fc6a43d..0000000 --- a/include/asm-arm/arch-kirkwood/entry-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Kirkwood platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - bne 1001f - - @ if no low interrupts set, check high interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF] - mov \irqnr, #63 - ands \irqstat, \irqstat, \tmp - - @ find first active interrupt source -1001: clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/include/asm-arm/arch-kirkwood/hardware.h b/include/asm-arm/arch-kirkwood/hardware.h deleted file mode 100644 index e695719..0000000 --- a/include/asm-arm/arch-kirkwood/hardware.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/hardware.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "kirkwood.h" - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM 0x01000000 -#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */ - - -#endif diff --git a/include/asm-arm/arch-kirkwood/io.h b/include/asm-arm/arch-kirkwood/io.h deleted file mode 100644 index 0ef6e95..0000000 --- a/include/asm-arm/arch-kirkwood/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/io.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "kirkwood.h" - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)((addr - KIRKWOOD_PCIE_IO_PHYS_BASE) - + KIRKWOOD_PCIE_IO_VIRT_BASE); -} - -#define __io(a) __io(a) -#define __mem_pci(a) (a) - - -#endif diff --git a/include/asm-arm/arch-kirkwood/irqs.h b/include/asm-arm/arch-kirkwood/irqs.h deleted file mode 100644 index 2e7b5da..0000000 --- a/include/asm-arm/arch-kirkwood/irqs.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/irqs.h - * - * IRQ definitions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include "kirkwood.h" /* need GPIO_MAX */ - -/* - * Low Interrupt Controller - */ -#define IRQ_KIRKWOOD_HIGH_SUM 0 -#define IRQ_KIRKWOOD_BRIDGE 1 -#define IRQ_KIRKWOOD_HOST2CPU 2 -#define IRQ_KIRKWOOD_CPU2HOST 3 -#define IRQ_KIRKWOOD_XOR_00 5 -#define IRQ_KIRKWOOD_XOR_01 6 -#define IRQ_KIRKWOOD_XOR_10 7 -#define IRQ_KIRKWOOD_XOR_11 8 -#define IRQ_KIRKWOOD_PCIE 9 -#define IRQ_KIRKWOOD_GE00_SUM 11 -#define IRQ_KIRKWOOD_GE01_SUM 15 -#define IRQ_KIRKWOOD_USB 19 -#define IRQ_KIRKWOOD_SATA 21 -#define IRQ_KIRKWOOD_CRYPTO 22 -#define IRQ_KIRKWOOD_SPI 23 -#define IRQ_KIRKWOOD_I2S 24 -#define IRQ_KIRKWOOD_TS_0 26 -#define IRQ_KIRKWOOD_SDIO 28 -#define IRQ_KIRKWOOD_TWSI 29 -#define IRQ_KIRKWOOD_AVB 30 -#define IRQ_KIRKWOOD_TDMI 31 - -/* - * High Interrupt Controller - */ -#define IRQ_KIRKWOOD_UART_0 33 -#define IRQ_KIRKWOOD_UART_1 34 -#define IRQ_KIRKWOOD_GPIO_LOW_0_7 35 -#define IRQ_KIRKWOOD_GPIO_LOW_8_15 36 -#define IRQ_KIRKWOOD_GPIO_LOW_16_23 37 -#define IRQ_KIRKWOOD_GPIO_LOW_24_31 38 -#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 -#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 -#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 - -/* - * KIRKWOOD General Purpose Pins - */ -#define IRQ_KIRKWOOD_GPIO_START 64 -#define NR_GPIO_IRQS GPIO_MAX - -#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/include/asm-arm/arch-kirkwood/kirkwood.h b/include/asm-arm/arch-kirkwood/kirkwood.h deleted file mode 100644 index bb31b315..0000000 --- a/include/asm-arm/arch-kirkwood/kirkwood.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/kirkwood.h - * - * Generic definitions for Marvell Kirkwood SoC flavors: - * 88F6180, 88F6192 and 88F6281. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_KIRKWOOD_H -#define __ASM_ARCH_KIRKWOOD_H - -/* - * Marvell Kirkwood address maps. - * - * phys - * e0000000 PCIe Memory space - * f1000000 on-chip peripheral registers - * f2000000 PCIe I/O space - * f3000000 NAND controller address window - * - * virt phys size - * fee00000 f1000000 1M on-chip peripheral registers - * fef00000 f2000000 1M PCIe I/O space - */ - -#define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000 -#define KIRKWOOD_NAND_MEM_SIZE SZ_64K /* 1K is sufficient, but 64K - * is the minimal window size - */ - -#define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 -#define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfef00000 -#define KIRKWOOD_PCIE_IO_BUS_BASE 0x00000000 -#define KIRKWOOD_PCIE_IO_SIZE SZ_1M - -#define KIRKWOOD_REGS_PHYS_BASE 0xf1000000 -#define KIRKWOOD_REGS_VIRT_BASE 0xfee00000 -#define KIRKWOOD_REGS_SIZE SZ_1M - -#define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 -#define KIRKWOOD_PCIE_MEM_SIZE SZ_128M - -/* - * MBUS bridge registers. - */ -#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) -#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) -#define CPU_RESET 0x00000002 -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_LOW_OFF 0x0000 -#define IRQ_MASK_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) -#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) -#define L2_WRITETHROUGH 0x00000010 - -/* - * Register Map - */ -#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) -#define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500) - -#define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000) -#define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000) -#define SAMPLE_AT_RESET (DEV_BUS_VIRT_BASE | 0x0030) -#define DEVICE_ID (DEV_BUS_VIRT_BASE | 0x0034) -#define RTC_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0300) -#define SPI_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x0600) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) - -#define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) - -#define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) - -#define GE00_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x70000) -#define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) - -#define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) - - -#define GPIO_MAX 50 - - -#endif diff --git a/include/asm-arm/arch-kirkwood/memory.h b/include/asm-arm/arch-kirkwood/memory.h deleted file mode 100644 index e5108f4..0000000 --- a/include/asm-arm/arch-kirkwood/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - - -#endif diff --git a/include/asm-arm/arch-kirkwood/system.h b/include/asm-arm/arch-kirkwood/system.h deleted file mode 100644 index 8dde7e3..0000000 --- a/include/asm-arm/arch-kirkwood/system.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - -#endif diff --git a/include/asm-arm/arch-kirkwood/timex.h b/include/asm-arm/arch-kirkwood/timex.h deleted file mode 100644 index 82122e1..0000000 --- a/include/asm-arm/arch-kirkwood/timex.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) - -#define KIRKWOOD_TCLK 166666667 diff --git a/include/asm-arm/arch-kirkwood/uncompress.h b/include/asm-arm/arch-kirkwood/uncompress.h deleted file mode 100644 index a9062b6..0000000 --- a/include/asm-arm/arch-kirkwood/uncompress.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/uncompress.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-kirkwood/vmalloc.h b/include/asm-arm/arch-kirkwood/vmalloc.h deleted file mode 100644 index 41852c6..0000000 --- a/include/asm-arm/arch-kirkwood/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-kirkwood/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000 diff --git a/include/asm-arm/arch-ks8695/debug-macro.S b/include/asm-arm/arch-ks8695/debug-macro.S deleted file mode 100644 index d2583ff..0000000 --- a/include/asm-arm/arch-ks8695/debug-macro.S +++ /dev/null @@ -1,38 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/debug-macro.S - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - Debug macros - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =KS8695_UART_PA @ physical base address - ldrne \rx, =KS8695_UART_VA @ virtual base address - .endm - - .macro senduart, rd, rx - str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register - .endm - - .macro busyuart, rd, rx -1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register - tst \rd, #URLS_URTE @ Holding & Shift registers empty? - beq 1001b - .endm - - .macro waituart, rd, rx -1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register - tst \rd, #URLS_URTHRE @ Holding Register empty? - beq 1001b - .endm diff --git a/include/asm-arm/arch-ks8695/devices.h b/include/asm-arm/arch-ks8695/devices.h deleted file mode 100644 index 7ad2c65..0000000 --- a/include/asm-arm/arch-ks8695/devices.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/devices.h - * - * Copyright (C) 2006 Andrew Victor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_DEVICES_H -#define __ASM_ARCH_DEVICES_H - -#include - - /* Ethernet */ -extern void __init ks8695_add_device_wan(void); -extern void __init ks8695_add_device_lan(void); -extern void __init ks8695_add_device_hpna(void); - - /* LEDs */ -extern short ks8695_leds_cpu; -extern short ks8695_leds_timer; -extern void __init ks8695_init_leds(u8 cpu_led, u8 timer_led); - - /* PCI */ -#define KS8695_MODE_PCI 0 -#define KS8695_MODE_MINIPCI 1 -#define KS8695_MODE_CARDBUS 2 - -struct ks8695_pci_cfg { - short mode; - int (*map_irq)(struct pci_dev *, u8, u8); -}; -extern __init void ks8695_init_pci(struct ks8695_pci_cfg *); - -#endif diff --git a/include/asm-arm/arch-ks8695/dma.h b/include/asm-arm/arch-ks8695/dma.h deleted file mode 100644 index e5159ed..0000000 --- a/include/asm-arm/arch-ks8695/dma.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/dma.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-ks8695/entry-macro.S b/include/asm-arm/arch-ks8695/entry-macro.S deleted file mode 100644 index 3993cfe..0000000 --- a/include/asm-arm/arch-ks8695/entry-macro.S +++ /dev/null @@ -1,53 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/entry-macro.S - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * Low-level IRQ helper macros for KS8695 - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register - - teq \irqstat, #0 - beq 1001f - - mov \irqnr, #0 - - tst \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tst \irqstat, #0x0f - moveq \irqstat, \irqstat, lsr #4 - addeq \irqnr, \irqnr, #4 - tst \irqstat, #0x03 - moveq \irqstat, \irqstat, lsr #2 - addeq \irqnr, \irqnr, #2 - tst \irqstat, #0x01 - addeqs \irqnr, \irqnr, #1 -1001: - .endm diff --git a/include/asm-arm/arch-ks8695/gpio.h b/include/asm-arm/arch-ks8695/gpio.h deleted file mode 100644 index 65ceea2..0000000 --- a/include/asm-arm/arch-ks8695/gpio.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/gpio.h - * - * Copyright (C) 2006 Andrew Victor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_GPIO_H_ -#define __ASM_ARCH_GPIO_H_ - -#define KS8695_GPIO_0 0 -#define KS8695_GPIO_1 1 -#define KS8695_GPIO_2 2 -#define KS8695_GPIO_3 3 -#define KS8695_GPIO_4 4 -#define KS8695_GPIO_5 5 -#define KS8695_GPIO_6 6 -#define KS8695_GPIO_7 7 -#define KS8695_GPIO_8 8 -#define KS8695_GPIO_9 9 -#define KS8695_GPIO_10 10 -#define KS8695_GPIO_11 11 -#define KS8695_GPIO_12 12 -#define KS8695_GPIO_13 13 -#define KS8695_GPIO_14 14 -#define KS8695_GPIO_15 15 - - -/* - * Configure GPIO pin as external interrupt source. - */ -int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type); - -/* - * Configure the GPIO line as an input. - */ -int __init_or_module gpio_direction_input(unsigned int pin); - -/* - * Configure the GPIO line as an output, with default state. - */ -int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state); - -/* - * Set the state of an output GPIO line. - */ -void gpio_set_value(unsigned int pin, unsigned int state); - -/* - * Read the state of a GPIO line. - */ -int gpio_get_value(unsigned int pin); - -/* - * Map GPIO line to IRQ number. - */ -int gpio_to_irq(unsigned int pin); - -/* - * Map IRQ number to GPIO line. - */ -int irq_to_gpio(unsigned int irq); - - -#include - -static inline int gpio_request(unsigned int pin, const char *label) -{ - return 0; -} - -static inline void gpio_free(unsigned int pin) -{ -} - -#endif diff --git a/include/asm-arm/arch-ks8695/hardware.h b/include/asm-arm/arch-ks8695/hardware.h deleted file mode 100644 index cb732bf..0000000 --- a/include/asm-arm/arch-ks8695/hardware.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/hardware.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - Memory Map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -/* - * Physical RAM address. - */ -#define KS8695_SDRAM_PA 0x00000000 - - -/* - * We map an entire MiB with the System Configuration Registers in even - * though only 64KiB is needed. This makes it easier for use with the - * head debug code as the initial MMU setup only deals in L1 sections. - */ -#define KS8695_IO_PA 0x03F00000 -#define KS8695_IO_VA 0xF0000000 -#define KS8695_IO_SIZE SZ_1M - -#define KS8695_PCIMEM_PA 0x60000000 -#define KS8695_PCIMEM_SIZE SZ_512M - -#define KS8695_PCIIO_PA 0x80000000 -#define KS8695_PCIIO_SIZE SZ_64K - - -/* - * PCI support - */ -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0 -#define PCIBIOS_MIN_MEM 0 - -#endif diff --git a/include/asm-arm/arch-ks8695/io.h b/include/asm-arm/arch-ks8695/io.h deleted file mode 100644 index 8edc4bd..0000000 --- a/include/asm-arm/arch-ks8695/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/io.h - * - * Copyright (C) 2006 Andrew Victor - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-ks8695/irqs.h b/include/asm-arm/arch-ks8695/irqs.h deleted file mode 100644 index 8b1c4fe..0000000 --- a/include/asm-arm/arch-ks8695/irqs.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * linux/include/asm-arm/arch-ks8695/irqs.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - - -#define NR_IRQS 32 - -/* - * IRQ definitions - */ -#define KS8695_IRQ_COMM_RX 0 -#define KS8695_IRQ_COMM_TX 1 -#define KS8695_IRQ_EXTERN0 2 -#define KS8695_IRQ_EXTERN1 3 -#define KS8695_IRQ_EXTERN2 4 -#define KS8695_IRQ_EXTERN3 5 -#define KS8695_IRQ_TIMER0 6 -#define KS8695_IRQ_TIMER1 7 -#define KS8695_IRQ_UART_TX 8 -#define KS8695_IRQ_UART_RX 9 -#define KS8695_IRQ_UART_LINE_STATUS 10 -#define KS8695_IRQ_UART_MODEM_STATUS 11 -#define KS8695_IRQ_LAN_RX_STOP 12 -#define KS8695_IRQ_LAN_TX_STOP 13 -#define KS8695_IRQ_LAN_RX_BUF 14 -#define KS8695_IRQ_LAN_TX_BUF 15 -#define KS8695_IRQ_LAN_RX_STATUS 16 -#define KS8695_IRQ_LAN_TX_STATUS 17 -#define KS8695_IRQ_HPNA_RX_STOP 18 -#define KS8695_IRQ_HPNA_TX_STOP 19 -#define KS8695_IRQ_HPNA_RX_BUF 20 -#define KS8695_IRQ_HPNA_TX_BUF 21 -#define KS8695_IRQ_HPNA_RX_STATUS 22 -#define KS8695_IRQ_HPNA_TX_STATUS 23 -#define KS8695_IRQ_BUS_ERROR 24 -#define KS8695_IRQ_WAN_RX_STOP 25 -#define KS8695_IRQ_WAN_TX_STOP 26 -#define KS8695_IRQ_WAN_RX_BUF 27 -#define KS8695_IRQ_WAN_TX_BUF 28 -#define KS8695_IRQ_WAN_RX_STATUS 29 -#define KS8695_IRQ_WAN_TX_STATUS 30 -#define KS8695_IRQ_WAN_LINK 31 - -#endif diff --git a/include/asm-arm/arch-ks8695/memory.h b/include/asm-arm/arch-ks8695/memory.h deleted file mode 100644 index 1b542f7..0000000 --- a/include/asm-arm/arch-ks8695/memory.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/memory.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 Memory definitions - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical SRAM offset. - */ -#define PHYS_OFFSET KS8695_SDRAM_PA - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_PCI - -/* PCI mappings */ -#define __virt_to_bus(x) ((x) - PAGE_OFFSET + KS8695_PCIMEM_PA) -#define __bus_to_virt(x) ((x) - KS8695_PCIMEM_PA + PAGE_OFFSET) - -/* Platform-bus mapping */ -extern struct bus_type platform_bus_type; -#define is_lbus_device(dev) (dev && dev->bus == &platform_bus_type) -#define __arch_dma_to_virt(dev, x) ({ is_lbus_device(dev) ? \ - __phys_to_virt(x) : __bus_to_virt(x); }) -#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \ - (dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) -#define __arch_page_to_dma(dev, x) __arch_virt_to_dma(dev, page_address(x)) - -#else - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif - -#endif - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-gpio.h b/include/asm-arm/arch-ks8695/regs-gpio.h deleted file mode 100644 index 6b95d77..0000000 --- a/include/asm-arm/arch-ks8695/regs-gpio.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-gpio.h - * - * Copyright (C) 2007 Andrew Victor - * - * KS8695 - GPIO control registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_GPIO_H -#define KS8695_GPIO_H - -#define KS8695_GPIO_OFFSET (0xF0000 + 0xE600) -#define KS8695_GPIO_VA (KS8695_IO_VA + KS8695_GPIO_OFFSET) -#define KS8695_GPIO_PA (KS8695_IO_PA + KS8695_GPIO_OFFSET) - - -#define KS8695_IOPM (0x00) /* I/O Port Mode Register */ -#define KS8695_IOPC (0x04) /* I/O Port Control Register */ -#define KS8695_IOPD (0x08) /* I/O Port Data Register */ - - -/* Port Mode Register */ -#define IOPM_(x) (1 << (x)) /* Mode for GPIO Pin x */ - -/* Port Control Register */ -#define IOPC_IOTIM1EN (1 << 17) /* GPIO Pin for Timer1 Enable */ -#define IOPC_IOTIM0EN (1 << 16) /* GPIO Pin for Timer0 Enable */ -#define IOPC_IOEINT3EN (1 << 15) /* GPIO Pin for External/Soft Interrupt 3 Enable */ -#define IOPC_IOEINT3TM (7 << 12) /* GPIO Pin for External/Soft Interrupt 3 Trigger Mode */ -#define IOPC_IOEINT3_MODE(x) ((x) << 12) -#define IOPC_IOEINT2EN (1 << 11) /* GPIO Pin for External/Soft Interrupt 2 Enable */ -#define IOPC_IOEINT2TM (7 << 8) /* GPIO Pin for External/Soft Interrupt 2 Trigger Mode */ -#define IOPC_IOEINT2_MODE(x) ((x) << 8) -#define IOPC_IOEINT1EN (1 << 7) /* GPIO Pin for External/Soft Interrupt 1 Enable */ -#define IOPC_IOEINT1TM (7 << 4) /* GPIO Pin for External/Soft Interrupt 1 Trigger Mode */ -#define IOPC_IOEINT1_MODE(x) ((x) << 4) -#define IOPC_IOEINT0EN (1 << 3) /* GPIO Pin for External/Soft Interrupt 0 Enable */ -#define IOPC_IOEINT0TM (7 << 0) /* GPIO Pin for External/Soft Interrupt 0 Trigger Mode */ -#define IOPC_IOEINT0_MODE(x) ((x) << 0) - - /* Trigger Modes */ -#define IOPC_TM_LOW (0) /* Level Detection (Active Low) */ -#define IOPC_TM_HIGH (1) /* Level Detection (Active High) */ -#define IOPC_TM_RISING (2) /* Rising Edge Detection */ -#define IOPC_TM_FALLING (4) /* Falling Edge Detection */ -#define IOPC_TM_EDGE (6) /* Both Edge Detection */ - -/* Port Data Register */ -#define IOPD_(x) (1 << (x)) /* Signal Level of GPIO Pin x */ - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-hpna.h b/include/asm-arm/arch-ks8695/regs-hpna.h deleted file mode 100644 index 14091cd..0000000 --- a/include/asm-arm/arch-ks8695/regs-hpna.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-wan.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - HPNA Registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_HPNA_H -#define KS8695_HPNA_H - -#define KS8695_HPNA_OFFSET (0xF0000 + 0xA000) -#define KS8695_HPNA_VA (KS8695_IO_VA + KS8695_HPNA_OFFSET) -#define KS8695_HPNA_PA (KS8695_IO_PA + KS8695_HPNA_OFFSET) - - -/* - * HPNA registers - */ - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-irq.h b/include/asm-arm/arch-ks8695/regs-irq.h deleted file mode 100644 index 70b193f..0000000 --- a/include/asm-arm/arch-ks8695/regs-irq.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-irq.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - IRQ registers and bit definitions - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_IRQ_H -#define KS8695_IRQ_H - -#define KS8695_IRQ_OFFSET (0xF0000 + 0xE200) -#define KS8695_IRQ_VA (KS8695_IO_VA + KS8695_IRQ_OFFSET) -#define KS8695_IRQ_PA (KS8695_IO_PA + KS8695_IRQ_OFFSET) - - -/* - * Interrupt Controller registers - */ -#define KS8695_INTMC (0x00) /* Mode Control Register */ -#define KS8695_INTEN (0x04) /* Interrupt Enable Register */ -#define KS8695_INTST (0x08) /* Interrupt Status Register */ -#define KS8695_INTPW (0x0c) /* Interrupt Priority (WAN MAC) */ -#define KS8695_INTPH (0x10) /* Interrupt Priority (HPNA) [KS8695 only] */ -#define KS8695_INTPL (0x14) /* Interrupt Priority (LAN MAC) */ -#define KS8695_INTPT (0x18) /* Interrupt Priority (Timer) */ -#define KS8695_INTPU (0x1c) /* Interrupt Priority (UART) */ -#define KS8695_INTPE (0x20) /* Interrupt Priority (External Interrupt) */ -#define KS8695_INTPC (0x24) /* Interrupt Priority (Communications Channel) */ -#define KS8695_INTPBE (0x28) /* Interrupt Priority (Bus Error Response) */ -#define KS8695_INTMS (0x2c) /* Interrupt Mask Status Register */ -#define KS8695_INTHPF (0x30) /* Interrupt Pending Highest Priority (FIQ) */ -#define KS8695_INTHPI (0x34) /* Interrupt Pending Highest Priority (IRQ) */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-lan.h b/include/asm-arm/arch-ks8695/regs-lan.h deleted file mode 100644 index a63bd61..0000000 --- a/include/asm-arm/arch-ks8695/regs-lan.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-lan.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - LAN Registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_LAN_H -#define KS8695_LAN_H - -#define KS8695_LAN_OFFSET (0xF0000 + 0x8000) -#define KS8695_LAN_VA (KS8695_IO_VA + KS8695_LAN_OFFSET) -#define KS8695_LAN_PA (KS8695_IO_PA + KS8695_LAN_OFFSET) - - -/* - * LAN registers - */ -#define KS8695_LMDTXC (0x00) /* DMA Transmit Control */ -#define KS8695_LMDRXC (0x04) /* DMA Receive Control */ -#define KS8695_LMDTSC (0x08) /* DMA Transmit Start Command */ -#define KS8695_LMDRSC (0x0c) /* DMA Receive Start Command */ -#define KS8695_LTDLB (0x10) /* Transmit Descriptor List Base Address */ -#define KS8695_LRDLB (0x14) /* Receive Descriptor List Base Address */ -#define KS8695_LMAL (0x18) /* MAC Station Address Low */ -#define KS8695_LMAH (0x1c) /* MAC Station Address High */ -#define KS8695_LMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ -#define KS8695_LMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ - - -/* DMA Transmit Control Register */ -#define LMDTXC_LMTRST (1 << 31) /* Soft Reset */ -#define LMDTXC_LMTBS (0x3f << 24) /* Transmit Burst Size */ -#define LMDTXC_LMTUCG (1 << 18) /* Transmit UDP Checksum Generate */ -#define LMDTXC_LMTTCG (1 << 17) /* Transmit TCP Checksum Generate */ -#define LMDTXC_LMTICG (1 << 16) /* Transmit IP Checksum Generate */ -#define LMDTXC_LMTFCE (1 << 9) /* Transmit Flow Control Enable */ -#define LMDTXC_LMTLB (1 << 8) /* Loopback mode */ -#define LMDTXC_LMTEP (1 << 2) /* Transmit Enable Padding */ -#define LMDTXC_LMTAC (1 << 1) /* Transmit Add CRC */ -#define LMDTXC_LMTE (1 << 0) /* TX Enable */ - -/* DMA Receive Control Register */ -#define LMDRXC_LMRBS (0x3f << 24) /* Receive Burst Size */ -#define LMDRXC_LMRUCC (1 << 18) /* Receive UDP Checksum check */ -#define LMDRXC_LMRTCG (1 << 17) /* Receive TCP Checksum check */ -#define LMDRXC_LMRICG (1 << 16) /* Receive IP Checksum check */ -#define LMDRXC_LMRFCE (1 << 9) /* Receive Flow Control Enable */ -#define LMDRXC_LMRB (1 << 6) /* Receive Broadcast */ -#define LMDRXC_LMRM (1 << 5) /* Receive Multicast */ -#define LMDRXC_LMRU (1 << 4) /* Receive Unicast */ -#define LMDRXC_LMRERR (1 << 3) /* Receive Error Frame */ -#define LMDRXC_LMRA (1 << 2) /* Receive All */ -#define LMDRXC_LMRE (1 << 1) /* RX Enable */ - -/* Additional Station Address High */ -#define LMAAH_E (1 << 31) /* Address Enabled */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-mem.h b/include/asm-arm/arch-ks8695/regs-mem.h deleted file mode 100644 index 76b38e0..0000000 --- a/include/asm-arm/arch-ks8695/regs-mem.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-mem.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - Memory Controller registers and bit definitions - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_MEM_H -#define KS8695_MEM_H - -#define KS8695_MEM_OFFSET (0xF0000 + 0x4000) -#define KS8695_MEM_VA (KS8695_IO_VA + KS8695_MEM_OFFSET) -#define KS8695_MEM_PA (KS8695_IO_PA + KS8695_MEM_OFFSET) - - -/* - * Memory Controller Registers - */ -#define KS8695_EXTACON0 (0x00) /* External I/O 0 Access Control */ -#define KS8695_EXTACON1 (0x04) /* External I/O 1 Access Control */ -#define KS8695_EXTACON2 (0x08) /* External I/O 2 Access Control */ -#define KS8695_ROMCON0 (0x10) /* ROM/SRAM/Flash 1 Control Register */ -#define KS8695_ROMCON1 (0x14) /* ROM/SRAM/Flash 2 Control Register */ -#define KS8695_ERGCON (0x20) /* External I/O and ROM/SRAM/Flash General Register */ -#define KS8695_SDCON0 (0x30) /* SDRAM Control Register 0 */ -#define KS8695_SDCON1 (0x34) /* SDRAM Control Register 1 */ -#define KS8695_SDGCON (0x38) /* SDRAM General Control */ -#define KS8695_SDBCON (0x3c) /* SDRAM Buffer Control */ -#define KS8695_REFTIM (0x40) /* SDRAM Refresh Timer */ - - -/* External I/O Access Control Registers */ -#define EXTACON_EBNPTR (0x3ff << 22) /* Last Address Pointer */ -#define EXTACON_EBBPTR (0x3ff << 12) /* Base Pointer */ -#define EXTACON_EBTACT (7 << 9) /* Write Enable/Output Enable Active Time */ -#define EXTACON_EBTCOH (7 << 6) /* Chip Select Hold Time */ -#define EXTACON_EBTACS (7 << 3) /* Address Setup Time before ECSN */ -#define EXTACON_EBTCOS (7 << 0) /* Chip Select Time before OEN */ - -/* ROM/SRAM/Flash Control Register */ -#define ROMCON_RBNPTR (0x3ff << 22) /* Next Pointer */ -#define ROMCON_RBBPTR (0x3ff << 12) /* Base Pointer */ -#define ROMCON_RBTACC (7 << 4) /* Access Cycle Time */ -#define ROMCON_RBTPA (3 << 2) /* Page Address Access Time */ -#define ROMCON_PMC (3 << 0) /* Page Mode Configuration */ -#define PMC_NORMAL (0 << 0) -#define PMC_4WORD (1 << 0) -#define PMC_8WORD (2 << 0) -#define PMC_16WORD (3 << 0) - -/* External I/O and ROM/SRAM/Flash General Register */ -#define ERGCON_TMULT (3 << 28) /* Time Multiplier */ -#define ERGCON_DSX2 (3 << 20) /* Data Width (External I/O Bank 2) */ -#define ERGCON_DSX1 (3 << 18) /* Data Width (External I/O Bank 1) */ -#define ERGCON_DSX0 (3 << 16) /* Data Width (External I/O Bank 0) */ -#define ERGCON_DSR1 (3 << 2) /* Data Width (ROM/SRAM/Flash Bank 1) */ -#define ERGCON_DSR0 (3 << 0) /* Data Width (ROM/SRAM/Flash Bank 0) */ - -/* SDRAM Control Register */ -#define SDCON_DBNPTR (0x3ff << 22) /* Last Address Pointer */ -#define SDCON_DBBPTR (0x3ff << 12) /* Base Pointer */ -#define SDCON_DBCAB (3 << 8) /* Column Address Bits */ -#define SDCON_DBBNUM (1 << 3) /* Number of Banks */ -#define SDCON_DBDBW (3 << 1) /* Data Bus Width */ - -/* SDRAM General Control Register */ -#define SDGCON_SDTRC (3 << 2) /* RAS to CAS latency */ -#define SDGCON_SDCAS (3 << 0) /* CAS latency */ - -/* SDRAM Buffer Control Register */ -#define SDBCON_SDESTA (1 << 31) /* SDRAM Engine Status */ -#define SDBCON_RBUFBDIS (1 << 24) /* Read Buffer Burst Enable */ -#define SDBCON_WFIFOEN (1 << 23) /* Write FIFO Enable */ -#define SDBCON_RBUFEN (1 << 22) /* Read Buffer Enable */ -#define SDBCON_FLUSHWFIFO (1 << 21) /* Flush Write FIFO */ -#define SDBCON_RBUFINV (1 << 20) /* Read Buffer Invalidate */ -#define SDBCON_SDINI (3 << 16) /* SDRAM Initialization Control */ -#define SDBCON_SDMODE (0x3fff << 0) /* SDRAM Mode Register Value Program */ - -/* SDRAM Refresh Timer Register */ -#define REFTIM_REFTIM (0xffff << 0) /* Refresh Timer Value */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-misc.h b/include/asm-arm/arch-ks8695/regs-misc.h deleted file mode 100644 index 632ca66..0000000 --- a/include/asm-arm/arch-ks8695/regs-misc.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-misc.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - Miscellaneous Registers - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_MISC_H -#define KS8695_MISC_H - -#define KS8695_MISC_OFFSET (0xF0000 + 0xEA00) -#define KS8695_MISC_VA (KS8695_IO_VA + KS8695_MISC_OFFSET) -#define KS8695_MISC_PA (KS8695_IO_PA + KS8695_MISC_OFFSET) - - -/* - * Miscellaneous registers - */ -#define KS8695_DID (0x00) /* Device ID */ -#define KS8695_RID (0x04) /* Revision ID */ -#define KS8695_HMC (0x08) /* HPNA Miscellaneous Control [KS8695 only] */ -#define KS8695_WMC (0x0c) /* WAN Miscellaneous Control */ -#define KS8695_WPPM (0x10) /* WAN PHY Power Management */ -#define KS8695_PPS (0x1c) /* PHY PowerSave */ - -/* Device ID Register */ -#define DID_ID (0xffff << 0) /* Device ID */ - -/* Revision ID Register */ -#define RID_SUBID (0xf << 4) /* Sub-Device ID */ -#define RID_REVISION (0xf << 0) /* Revision ID */ - -/* HPNA Miscellaneous Control Register */ -#define HMC_HSS (1 << 1) /* Speed */ -#define HMC_HDS (1 << 0) /* Duplex */ - -/* WAN Miscellaneous Control Register */ -#define WMC_WANC (1 << 30) /* Auto-negotiation complete */ -#define WMC_WANR (1 << 29) /* Auto-negotiation restart */ -#define WMC_WANAP (1 << 28) /* Advertise Pause */ -#define WMC_WANA100F (1 << 27) /* Advertise 100 FDX */ -#define WMC_WANA100H (1 << 26) /* Advertise 100 HDX */ -#define WMC_WANA10F (1 << 25) /* Advertise 10 FDX */ -#define WMC_WANA10H (1 << 24) /* Advertise 10 HDX */ -#define WMC_WLS (1 << 23) /* Link status */ -#define WMC_WDS (1 << 22) /* Duplex status */ -#define WMC_WSS (1 << 21) /* Speed status */ -#define WMC_WLPP (1 << 20) /* Link Partner Pause */ -#define WMC_WLP100F (1 << 19) /* Link Partner 100 FDX */ -#define WMC_WLP100H (1 << 18) /* Link Partner 100 HDX */ -#define WMC_WLP10F (1 << 17) /* Link Partner 10 FDX */ -#define WMC_WLP10H (1 << 16) /* Link Partner 10 HDX */ -#define WMC_WAND (1 << 15) /* Auto-negotiation disable */ -#define WMC_WANF100 (1 << 14) /* Force 100 */ -#define WMC_WANFF (1 << 13) /* Force FDX */ -#define WMC_WLED1S (7 << 4) /* LED1 Select */ -#define WLED1S_SPEED (0 << 4) -#define WLED1S_LINK (1 << 4) -#define WLED1S_DUPLEX (2 << 4) -#define WLED1S_COLLISION (3 << 4) -#define WLED1S_ACTIVITY (4 << 4) -#define WLED1S_FDX_COLLISION (5 << 4) -#define WLED1S_LINK_ACTIVITY (6 << 4) -#define WMC_WLED0S (7 << 0) /* LED0 Select */ -#define WLED0S_SPEED (0 << 0) -#define WLED0S_LINK (1 << 0) -#define WLED0S_DUPLEX (2 << 0) -#define WLED0S_COLLISION (3 << 0) -#define WLED0S_ACTIVITY (4 << 0) -#define WLED0S_FDX_COLLISION (5 << 0) -#define WLED0S_LINK_ACTIVITY (6 << 0) - -/* WAN PHY Power Management Register */ -#define WPPM_WLPBK (1 << 14) /* Local Loopback */ -#define WPPM_WRLPKB (1 << 13) /* Remove Loopback */ -#define WPPM_WPI (1 << 12) /* PHY isolate */ -#define WPPM_WFL (1 << 10) /* Force link */ -#define WPPM_MDIXS (1 << 9) /* MDIX Status */ -#define WPPM_FEF (1 << 8) /* Far End Fault */ -#define WPPM_AMDIXP (1 << 7) /* Auto MDIX Parameter */ -#define WPPM_TXDIS (1 << 6) /* Disable transmitter */ -#define WPPM_DFEF (1 << 5) /* Disable Far End Fault */ -#define WPPM_PD (1 << 4) /* Power Down */ -#define WPPM_DMDX (1 << 3) /* Disable Auto MDI/MDIX */ -#define WPPM_FMDX (1 << 2) /* Force MDIX */ -#define WPPM_LPBK (1 << 1) /* MAX Loopback */ - -/* PHY Power Save Register */ -#define PPS_PPSM (1 << 0) /* PHY Power Save Mode */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-pci.h b/include/asm-arm/arch-ks8695/regs-pci.h deleted file mode 100644 index 286d6d4..0000000 --- a/include/asm-arm/arch-ks8695/regs-pci.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-pci.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - PCI bridge registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define KS8695_PCI_OFFSET (0xF0000 + 0x2000) -#define KS8695_PCI_VA (KS8695_IO_VA + KS8695_PCI_OFFSET) -#define KS8695_PCI_PA (KS8695_IO_PA + KS8695_PCI_OFFSET) - - -#define KS8695_CRCFID (0x000) /* Configuration: Identification */ -#define KS8695_CRCFCS (0x004) /* Configuration: Command and Status */ -#define KS8695_CRCFRV (0x008) /* Configuration: Revision */ -#define KS8695_CRCFLT (0x00C) /* Configuration: Latency Timer */ -#define KS8695_CRCBMA (0x010) /* Configuration: Base Memory Address */ -#define KS8695_CRCSID (0x02C) /* Configuration: Subsystem ID */ -#define KS8695_CRCFIT (0x03C) /* Configuration: Interrupt */ -#define KS8695_PBCA (0x100) /* Bridge Configuration Address */ -#define KS8695_PBCD (0x104) /* Bridge Configuration Data */ -#define KS8695_PBM (0x200) /* Bridge Mode */ -#define KS8695_PBCS (0x204) /* Bridge Control and Status */ -#define KS8695_PMBA (0x208) /* Bridge Memory Base Address */ -#define KS8695_PMBAC (0x20C) /* Bridge Memory Base Address Control */ -#define KS8695_PMBAM (0x210) /* Bridge Memory Base Address Mask */ -#define KS8695_PMBAT (0x214) /* Bridge Memory Base Address Translation */ -#define KS8695_PIOBA (0x218) /* Bridge I/O Base Address */ -#define KS8695_PIOBAC (0x21C) /* Bridge I/O Base Address Control */ -#define KS8695_PIOBAM (0x220) /* Bridge I/O Base Address Mask */ -#define KS8695_PIOBAT (0x224) /* Bridge I/O Base Address Translation */ - - -/* Configuration: Identification */ - -/* Configuration: Command and Status */ - -/* Configuration: Revision */ - - - -#define CFRV_GUEST (1 << 23) - -#define PBCA_TYPE1 (1) -#define PBCA_ENABLE (1 << 31) - - diff --git a/include/asm-arm/arch-ks8695/regs-switch.h b/include/asm-arm/arch-ks8695/regs-switch.h deleted file mode 100644 index 5f37be3..0000000 --- a/include/asm-arm/arch-ks8695/regs-switch.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-switch.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - Switch Registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_SWITCH_H -#define KS8695_SWITCH_H - -#define KS8695_SWITCH_OFFSET (0xF0000 + 0xe800) -#define KS8695_SWITCH_VA (KS8695_IO_VA + KS8695_SWITCH_OFFSET) -#define KS8695_SWITCH_PA (KS8695_IO_PA + KS8695_SWITCH_OFFSET) - - -/* - * Switch registers - */ -#define KS8695_SEC0 (0x00) /* Switch Engine Control 0 */ -#define KS8695_SEC1 (0x04) /* Switch Engine Control 1 */ -#define KS8695_SEC2 (0x08) /* Switch Engine Control 2 */ - -#define KS8695_P(x)_C(z) (0xc0 + (((x)-1)*3 + ((z)-1))*4) /* Port Configuration Registers */ - -#define KS8695_SEP12AN (0x48) /* Port 1 & 2 Auto-Negotiation */ -#define KS8695_SEP34AN (0x4c) /* Port 3 & 4 Auto-Negotiation */ -#define KS8695_SEIAC (0x50) /* Indirect Access Control */ -#define KS8695_SEIADH2 (0x54) /* Indirect Access Data High 2 */ -#define KS8695_SEIADH1 (0x58) /* Indirect Access Data High 1 */ -#define KS8695_SEIADL (0x5c) /* Indirect Access Data Low */ -#define KS8695_SEAFC (0x60) /* Advance Feature Control */ -#define KS8695_SEDSCPH (0x64) /* TOS Priority High */ -#define KS8695_SEDSCPL (0x68) /* TOS Priority Low */ -#define KS8695_SEMAH (0x6c) /* Switch Engine MAC Address High */ -#define KS8695_SEMAL (0x70) /* Switch Engine MAC Address Low */ -#define KS8695_LPPM12 (0x74) /* Port 1 & 2 PHY Power Management */ -#define KS8695_LPPM34 (0x78) /* Port 3 & 4 PHY Power Management */ - - -/* Switch Engine Control 0 */ -#define SEC0_LLED1S (7 << 25) /* LED1 Select */ -#define LLED1S_SPEED (0 << 25) -#define LLED1S_LINK (1 << 25) -#define LLED1S_DUPLEX (2 << 25) -#define LLED1S_COLLISION (3 << 25) -#define LLED1S_ACTIVITY (4 << 25) -#define LLED1S_FDX_COLLISION (5 << 25) -#define LLED1S_LINK_ACTIVITY (6 << 25) -#define SEC0_LLED0S (7 << 22) /* LED0 Select */ -#define LLED0S_SPEED (0 << 22) -#define LLED0S_LINK (1 << 22) -#define LLED0S_DUPLEX (2 << 22) -#define LLED0S_COLLISION (3 << 22) -#define LLED0S_ACTIVITY (4 << 22) -#define LLED0S_FDX_COLLISION (5 << 22) -#define LLED0S_LINK_ACTIVITY (6 << 22) -#define SEC0_ENABLE (1 << 0) /* Enable Switch */ - - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-sys.h b/include/asm-arm/arch-ks8695/regs-sys.h deleted file mode 100644 index f317981..0000000 --- a/include/asm-arm/arch-ks8695/regs-sys.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-sys.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - System control registers and bit definitions - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_SYS_H -#define KS8695_SYS_H - -#define KS8695_SYS_OFFSET (0xF0000 + 0x0000) -#define KS8695_SYS_VA (KS8695_IO_VA + KS8695_SYS_OFFSET) -#define KS8695_SYS_PA (KS8695_IO_PA + KS8695_SYS_OFFSET) - - -#define KS8695_SYSCFG (0x00) /* System Configuration Register */ -#define KS8695_CLKCON (0x04) /* System Clock and Bus Control Register */ - - -/* System Configuration Register */ -#define SYSCFG_SPRBP (0x3ff << 16) /* Register Bank Base Pointer */ - -/* System Clock and Bus Control Register */ -#define CLKCON_SFMODE (1 << 8) /* System Fast Mode for Simulation */ -#define CLKCON_SCDC (7 << 0) /* System Clock Divider Select */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-timer.h b/include/asm-arm/arch-ks8695/regs-timer.h deleted file mode 100644 index 0a9f7f9..0000000 --- a/include/asm-arm/arch-ks8695/regs-timer.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-timer.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - Timer registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_TIMER_H -#define KS8695_TIMER_H - -#define KS8695_TMR_OFFSET (0xF0000 + 0xE400) -#define KS8695_TMR_VA (KS8695_IO_VA + KS8695_TMR_OFFSET) -#define KS8695_TMR_PA (KS8695_IO_PA + KS8695_TMR_OFFSET) - - -/* - * Timer registers - */ -#define KS8695_TMCON (0x00) /* Timer Control Register */ -#define KS8695_T1TC (0x04) /* Timer 1 Timeout Count Register */ -#define KS8695_T0TC (0x08) /* Timer 0 Timeout Count Register */ -#define KS8695_T1PD (0x0C) /* Timer 1 Pulse Count Register */ -#define KS8695_T0PD (0x10) /* Timer 0 Pulse Count Register */ - - -/* Timer Control Register */ -#define TMCON_T1EN (1 << 1) /* Timer 1 Enable */ -#define TMCON_T0EN (1 << 0) /* Timer 0 Enable */ - -/* Timer0 Timeout Counter Register */ -#define T0TC_WATCHDOG (0xff) /* Enable watchdog mode */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-uart.h b/include/asm-arm/arch-ks8695/regs-uart.h deleted file mode 100644 index a27cb20..0000000 --- a/include/asm-arm/arch-ks8695/regs-uart.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * linux/include/asm-arm/arch-ks8695/regs-uart.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - UART register and bit definitions. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef KS8695_UART_H -#define KS8695_UART_H - -#define KS8695_UART_OFFSET (0xF0000 + 0xE000) -#define KS8695_UART_VA (KS8695_IO_VA + KS8695_UART_OFFSET) -#define KS8695_UART_PA (KS8695_IO_PA + KS8695_UART_OFFSET) - - -/* - * UART registers - */ -#define KS8695_URRB (0x00) /* Receive Buffer Register */ -#define KS8695_URTH (0x04) /* Transmit Holding Register */ -#define KS8695_URFC (0x08) /* FIFO Control Register */ -#define KS8695_URLC (0x0C) /* Line Control Register */ -#define KS8695_URMC (0x10) /* Modem Control Register */ -#define KS8695_URLS (0x14) /* Line Status Register */ -#define KS8695_URMS (0x18) /* Modem Status Register */ -#define KS8695_URBD (0x1C) /* Baud Rate Divisor Register */ -#define KS8695_USR (0x20) /* Status Register */ - - -/* FIFO Control Register */ -#define URFC_URFRT (3 << 6) /* Receive FIFO Trigger Level */ -#define URFC_URFRT_1 (0 << 6) -#define URFC_URFRT_4 (1 << 6) -#define URFC_URFRT_8 (2 << 6) -#define URFC_URFRT_14 (3 << 6) -#define URFC_URTFR (1 << 2) /* Transmit FIFO Reset */ -#define URFC_URRFR (1 << 1) /* Receive FIFO Reset */ -#define URFC_URFE (1 << 0) /* FIFO Enable */ - -/* Line Control Register */ -#define URLC_URSBC (1 << 6) /* Set Break Condition */ -#define URLC_PARITY (7 << 3) /* Parity */ -#define URPE_NONE (0 << 3) -#define URPE_ODD (1 << 3) -#define URPE_EVEN (3 << 3) -#define URPE_MARK (5 << 3) -#define URPE_SPACE (7 << 3) -#define URLC_URSB (1 << 2) /* Stop Bits */ -#define URLC_URCL (3 << 0) /* Character Length */ -#define URCL_5 (0 << 0) -#define URCL_6 (1 << 0) -#define URCL_7 (2 << 0) -#define URCL_8 (3 << 0) - -/* Modem Control Register */ -#define URMC_URLB (1 << 4) /* Loop-back mode */ -#define URMC_UROUT2 (1 << 3) /* OUT2 signal */ -#define URMC_UROUT1 (1 << 2) /* OUT1 signal */ -#define URMC_URRTS (1 << 1) /* Request to Send */ -#define URMC_URDTR (1 << 0) /* Data Terminal Ready */ - -/* Line Status Register */ -#define URLS_URRFE (1 << 7) /* Receive FIFO Error */ -#define URLS_URTE (1 << 6) /* Transmit Empty */ -#define URLS_URTHRE (1 << 5) /* Transmit Holding Register Empty */ -#define URLS_URBI (1 << 4) /* Break Interrupt */ -#define URLS_URFE (1 << 3) /* Framing Error */ -#define URLS_URPE (1 << 2) /* Parity Error */ -#define URLS_URROE (1 << 1) /* Receive Overrun Error */ -#define URLS_URDR (1 << 0) /* Receive Data Ready */ - -/* Modem Status Register */ -#define URMS_URDCD (1 << 7) /* Data Carrier Detect */ -#define URMS_URRI (1 << 6) /* Ring Indicator */ -#define URMS_URDSR (1 << 5) /* Data Set Ready */ -#define URMS_URCTS (1 << 4) /* Clear to Send */ -#define URMS_URDDCD (1 << 3) /* Delta Data Carrier Detect */ -#define URMS_URTERI (1 << 2) /* Trailing Edge Ring Indicator */ -#define URMS_URDDST (1 << 1) /* Delta Data Set Ready */ -#define URMS_URDCTS (1 << 0) /* Delta Clear to Send */ - -/* Status Register */ -#define USR_UTI (1 << 0) /* Timeout Indication */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/regs-wan.h b/include/asm-arm/arch-ks8695/regs-wan.h deleted file mode 100644 index 52e35b0..0000000 --- a/include/asm-arm/arch-ks8695/regs-wan.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/regs-wan.h - * - * Copyright (C) 2006 Andrew Victor - * - * KS8695 - WAN Registers and bit definitions. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef KS8695_WAN_H -#define KS8695_WAN_H - -#define KS8695_WAN_OFFSET (0xF0000 + 0x6000) -#define KS8695_WAN_VA (KS8695_IO_VA + KS8695_WAN_OFFSET) -#define KS8695_WAN_PA (KS8695_IO_PA + KS8695_WAN_OFFSET) - - -/* - * WAN registers - */ -#define KS8695_WMDTXC (0x00) /* DMA Transmit Control */ -#define KS8695_WMDRXC (0x04) /* DMA Receive Control */ -#define KS8695_WMDTSC (0x08) /* DMA Transmit Start Command */ -#define KS8695_WMDRSC (0x0c) /* DMA Receive Start Command */ -#define KS8695_WTDLB (0x10) /* Transmit Descriptor List Base Address */ -#define KS8695_WRDLB (0x14) /* Receive Descriptor List Base Address */ -#define KS8695_WMAL (0x18) /* MAC Station Address Low */ -#define KS8695_WMAH (0x1c) /* MAC Station Address High */ -#define KS8695_WMAAL_(n) (0x80 + ((n)*8)) /* MAC Additional Station Address (0..15) Low */ -#define KS8695_WMAAH_(n) (0x84 + ((n)*8)) /* MAC Additional Station Address (0..15) High */ - - -/* DMA Transmit Control Register */ -#define WMDTXC_WMTRST (1 << 31) /* Soft Reset */ -#define WMDTXC_WMTBS (0x3f << 24) /* Transmit Burst Size */ -#define WMDTXC_WMTUCG (1 << 18) /* Transmit UDP Checksum Generate */ -#define WMDTXC_WMTTCG (1 << 17) /* Transmit TCP Checksum Generate */ -#define WMDTXC_WMTICG (1 << 16) /* Transmit IP Checksum Generate */ -#define WMDTXC_WMTFCE (1 << 9) /* Transmit Flow Control Enable */ -#define WMDTXC_WMTLB (1 << 8) /* Loopback mode */ -#define WMDTXC_WMTEP (1 << 2) /* Transmit Enable Padding */ -#define WMDTXC_WMTAC (1 << 1) /* Transmit Add CRC */ -#define WMDTXC_WMTE (1 << 0) /* TX Enable */ - -/* DMA Receive Control Register */ -#define WMDRXC_WMRBS (0x3f << 24) /* Receive Burst Size */ -#define WMDRXC_WMRUCC (1 << 18) /* Receive UDP Checksum check */ -#define WMDRXC_WMRTCG (1 << 17) /* Receive TCP Checksum check */ -#define WMDRXC_WMRICG (1 << 16) /* Receive IP Checksum check */ -#define WMDRXC_WMRFCE (1 << 9) /* Receive Flow Control Enable */ -#define WMDRXC_WMRB (1 << 6) /* Receive Broadcast */ -#define WMDRXC_WMRM (1 << 5) /* Receive Multicast */ -#define WMDRXC_WMRU (1 << 4) /* Receive Unicast */ -#define WMDRXC_WMRERR (1 << 3) /* Receive Error Frame */ -#define WMDRXC_WMRA (1 << 2) /* Receive All */ -#define WMDRXC_WMRE (1 << 0) /* RX Enable */ - -/* Additional Station Address High */ -#define WMAAH_E (1 << 31) /* Address Enabled */ - - -#endif diff --git a/include/asm-arm/arch-ks8695/system.h b/include/asm-arm/arch-ks8695/system.h deleted file mode 100644 index 3bc2810..0000000 --- a/include/asm-arm/arch-ks8695/system.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * include/asm-arm/arch-s3c2410/system.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks - * - * KS8695 - System function defines and includes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks, - */ - cpu_do_idle(); - -} - -static void arch_reset(char mode) -{ - unsigned int reg; - - if (mode == 's') - cpu_reset(0); - - /* disable timer0 */ - reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); - __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); - - /* enable watchdog mode */ - __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); - - /* re-enable timer0 */ - __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); -} - -#endif diff --git a/include/asm-arm/arch-ks8695/timex.h b/include/asm-arm/arch-ks8695/timex.h deleted file mode 100644 index 8320d52..0000000 --- a/include/asm-arm/arch-ks8695/timex.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/timex.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks - * - * KS8695 - Time Parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* timers are derived from MCLK, which is 25MHz */ -#define CLOCK_TICK_RATE 25000000 - -#endif diff --git a/include/asm-arm/arch-ks8695/uncompress.h b/include/asm-arm/arch-ks8695/uncompress.h deleted file mode 100644 index 733a508..0000000 --- a/include/asm-arm/arch-ks8695/uncompress.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/uncompress.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 - Kernel uncompressor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include -#include - -static void putc(char c) -{ - while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTHRE)) - barrier(); - - __raw_writel(c, KS8695_UART_PA + KS8695_URTH); -} - -static inline void flush(void) -{ - while (!(__raw_readl(KS8695_UART_PA + KS8695_URLS) & URLS_URTE)) - barrier(); -} - -#define arch_decomp_setup() -#define arch_decomp_wdog() - -#endif diff --git a/include/asm-arm/arch-ks8695/vmalloc.h b/include/asm-arm/arch-ks8695/vmalloc.h deleted file mode 100644 index d1d88e58..0000000 --- a/include/asm-arm/arch-ks8695/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-arm/arch-ks8695/vmalloc.h - * - * Copyright (C) 2006 Ben Dooks - * Copyright (C) 2006 Simtec Electronics - * - * KS8695 vmalloc definition - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (KS8695_IO_VA & PGDIR_MASK) - -#endif diff --git a/include/asm-arm/arch-l7200/aux_reg.h b/include/asm-arm/arch-l7200/aux_reg.h deleted file mode 100644 index 762cbc7..0000000 --- a/include/asm-arm/arch-l7200/aux_reg.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/aux_reg.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 08-02-2000 SJH Created file - */ -#ifndef _ASM_ARCH_AUXREG_H -#define _ASM_ARCH_AUXREG_H - -#include - -#define l7200aux_reg *((volatile unsigned int *) (AUX_BASE)) - -/* - * Auxillary register values - */ -#define AUX_CLEAR 0x00000000 -#define AUX_DIAG_LED_ON 0x00000002 -#define AUX_RTS_UART1 0x00000004 -#define AUX_DTR_UART1 0x00000008 -#define AUX_KBD_COLUMN_12_HIGH 0x00000010 -#define AUX_KBD_COLUMN_12_OFF 0x00000020 -#define AUX_KBD_COLUMN_13_HIGH 0x00000040 -#define AUX_KBD_COLUMN_13_OFF 0x00000080 - -#endif diff --git a/include/asm-arm/arch-l7200/debug-macro.S b/include/asm-arm/arch-l7200/debug-macro.S deleted file mode 100644 index 8464733..0000000 --- a/include/asm-arm/arch-l7200/debug-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/include/asm-arm/arch-l7200/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .equ io_virt, IO_BASE - .equ io_phys, IO_START - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #io_phys @ physical base address - movne \rx, #io_virt @ virtual address - add \rx, \rx, #0x00044000 @ UART1 -@ add \rx, \rx, #0x00045000 @ UART2 - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x0] @ UARTDR - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full - bne 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #0x18] @ UARTFLG - tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy - bne 1001b - .endm diff --git a/include/asm-arm/arch-l7200/dma.h b/include/asm-arm/arch-l7200/dma.h deleted file mode 100644 index 4c7eca6..0000000 --- a/include/asm-arm/arch-l7200/dma.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/dma.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 08-29-2000 SJH Created - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* DMA is not yet implemented! It should be the same as acorn, copy over.. */ - -/* - * This is the maximum DMA address that can be DMAd to. - * There should not be more than (0xd0000000 - 0xc0000000) - * bytes of RAM. - */ -#define MAX_DMA_ADDRESS 0xd0000000 - -#define DMA_S0 0 - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-l7200/entry-macro.S b/include/asm-arm/arch-l7200/entry-macro.S deleted file mode 100644 index d5e7294..0000000 --- a/include/asm-arm/arch-l7200/entry-macro.S +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-arm/arch-l7200/entry-macro.S - * - * Low-level IRQ helper macros for L7200-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include - - .equ irq_base_addr, IO_BASE_2 - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqstat, #irq_base_addr @ Virt addr IRQ regs - add \irqstat, \irqstat, #0x00001000 @ Status reg - ldr \irqstat, [\irqstat, #0] @ get interrupts - mov \irqnr, #0 -1001: tst \irqstat, #1 - addeq \irqnr, \irqnr, #1 - moveq \irqstat, \irqstat, lsr #1 - tsteq \irqnr, #32 - beq 1001b - teq \irqnr, #32 - .endm - diff --git a/include/asm-arm/arch-l7200/gp_timers.h b/include/asm-arm/arch-l7200/gp_timers.h deleted file mode 100644 index 6f20962..0000000 --- a/include/asm-arm/arch-l7200/gp_timers.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/gp_timers.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 07-28-2000 SJH Created file - * 08-02-2000 SJH Used structure for registers - */ -#ifndef _ASM_ARCH_GPTIMERS_H -#define _ASM_ARCH_GPTIMERS_H - -#include - -/* - * Layout of L7200 general purpose timer registers - */ -struct GPT_Regs { - unsigned int TIMERLOAD; - unsigned int TIMERVALUE; - unsigned int TIMERCONTROL; - unsigned int TIMERCLEAR; -}; - -#define GPT_BASE (IO_BASE_2 + 0x3000) -#define l7200_timer1_regs ((volatile struct GPT_Regs *) (GPT_BASE)) -#define l7200_timer2_regs ((volatile struct GPT_Regs *) (GPT_BASE + 0x20)) - -/* - * General register values - */ -#define GPT_PRESCALE_1 0x00000000 -#define GPT_PRESCALE_16 0x00000004 -#define GPT_PRESCALE_256 0x00000008 -#define GPT_MODE_FREERUN 0x00000000 -#define GPT_MODE_PERIODIC 0x00000040 -#define GPT_ENABLE 0x00000080 -#define GPT_BZTOG 0x00000100 -#define GPT_BZMOD 0x00000200 -#define GPT_LOAD_MASK 0x0000ffff - -#endif diff --git a/include/asm-arm/arch-l7200/gpio.h b/include/asm-arm/arch-l7200/gpio.h deleted file mode 100644 index 0b63e42..0000000 --- a/include/asm-arm/arch-l7200/gpio.h +++ /dev/null @@ -1,105 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-arm/arch-l7200/gpio.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * GPIO. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define GPIO_OFF 0x00005000 /* Offset from IO_START to the GPIO reg's. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define GPIO_START (IO_START_2 + GPIO_OFF) /* Physical addr of the GPIO reg. */ -#define GPIO_BASE (IO_BASE_2 + GPIO_OFF) /* Virtual addr of the GPIO reg. */ - -/* Offsets from the start of the GPIO for all the registers. */ -#define PADR_OFF 0x000 -#define PADDR_OFF 0x004 -#define PASBSR_OFF 0x008 -#define PAEENR_OFF 0x00c -#define PAESNR_OFF 0x010 -#define PAESTR_OFF 0x014 -#define PAIMR_OFF 0x018 -#define PAINT_OFF 0x01c - -#define PBDR_OFF 0x020 -#define PBDDR_OFF 0x024 -#define PBSBSR_OFF 0x028 -#define PBIMR_OFF 0x038 -#define PBINT_OFF 0x03c - -#define PCDR_OFF 0x040 -#define PCDDR_OFF 0x044 -#define PCSBSR_OFF 0x048 -#define PCIMR_OFF 0x058 -#define PCINT_OFF 0x05c - -#define PDDR_OFF 0x060 -#define PDDDR_OFF 0x064 -#define PDSBSR_OFF 0x068 -#define PDEENR_OFF 0x06c -#define PDESNR_OFF 0x070 -#define PDESTR_OFF 0x074 -#define PDIMR_OFF 0x078 -#define PDINT_OFF 0x07c - -#define PEDR_OFF 0x080 -#define PEDDR_OFF 0x084 -#define PESBSR_OFF 0x088 -#define PEEENR_OFF 0x08c -#define PEESNR_OFF 0x090 -#define PEESTR_OFF 0x094 -#define PEIMR_OFF 0x098 -#define PEINT_OFF 0x09c - -/* Define the GPIO registers for use by device drivers and the kernel. */ -#define PADR (*(volatile unsigned long *)(GPIO_BASE+PADR_OFF)) -#define PADDR (*(volatile unsigned long *)(GPIO_BASE+PADDR_OFF)) -#define PASBSR (*(volatile unsigned long *)(GPIO_BASE+PASBSR_OFF)) -#define PAEENR (*(volatile unsigned long *)(GPIO_BASE+PAEENR_OFF)) -#define PAESNR (*(volatile unsigned long *)(GPIO_BASE+PAESNR_OFF)) -#define PAESTR (*(volatile unsigned long *)(GPIO_BASE+PAESTR_OFF)) -#define PAIMR (*(volatile unsigned long *)(GPIO_BASE+PAIMR_OFF)) -#define PAINT (*(volatile unsigned long *)(GPIO_BASE+PAINT_OFF)) - -#define PBDR (*(volatile unsigned long *)(GPIO_BASE+PBDR_OFF)) -#define PBDDR (*(volatile unsigned long *)(GPIO_BASE+PBDDR_OFF)) -#define PBSBSR (*(volatile unsigned long *)(GPIO_BASE+PBSBSR_OFF)) -#define PBIMR (*(volatile unsigned long *)(GPIO_BASE+PBIMR_OFF)) -#define PBINT (*(volatile unsigned long *)(GPIO_BASE+PBINT_OFF)) - -#define PCDR (*(volatile unsigned long *)(GPIO_BASE+PCDR_OFF)) -#define PCDDR (*(volatile unsigned long *)(GPIO_BASE+PCDDR_OFF)) -#define PCSBSR (*(volatile unsigned long *)(GPIO_BASE+PCSBSR_OFF)) -#define PCIMR (*(volatile unsigned long *)(GPIO_BASE+PCIMR_OFF)) -#define PCINT (*(volatile unsigned long *)(GPIO_BASE+PCINT_OFF)) - -#define PDDR (*(volatile unsigned long *)(GPIO_BASE+PDDR_OFF)) -#define PDDDR (*(volatile unsigned long *)(GPIO_BASE+PDDDR_OFF)) -#define PDSBSR (*(volatile unsigned long *)(GPIO_BASE+PDSBSR_OFF)) -#define PDEENR (*(volatile unsigned long *)(GPIO_BASE+PDEENR_OFF)) -#define PDESNR (*(volatile unsigned long *)(GPIO_BASE+PDESNR_OFF)) -#define PDESTR (*(volatile unsigned long *)(GPIO_BASE+PDESTR_OFF)) -#define PDIMR (*(volatile unsigned long *)(GPIO_BASE+PDIMR_OFF)) -#define PDINT (*(volatile unsigned long *)(GPIO_BASE+PDINT_OFF)) - -#define PEDR (*(volatile unsigned long *)(GPIO_BASE+PEDR_OFF)) -#define PEDDR (*(volatile unsigned long *)(GPIO_BASE+PEDDR_OFF)) -#define PESBSR (*(volatile unsigned long *)(GPIO_BASE+PESBSR_OFF)) -#define PEEENR (*(volatile unsigned long *)(GPIO_BASE+PEEENR_OFF)) -#define PEESNR (*(volatile unsigned long *)(GPIO_BASE+PEESNR_OFF)) -#define PEESTR (*(volatile unsigned long *)(GPIO_BASE+PEESTR_OFF)) -#define PEIMR (*(volatile unsigned long *)(GPIO_BASE+PEIMR_OFF)) -#define PEINT (*(volatile unsigned long *)(GPIO_BASE+PEINT_OFF)) - -#define VEE_EN 0x02 -#define BACKLIGHT_EN 0x04 diff --git a/include/asm-arm/arch-l7200/hardware.h b/include/asm-arm/arch-l7200/hardware.h deleted file mode 100644 index 2ab43f3..0000000 --- a/include/asm-arm/arch-l7200/hardware.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/hardware.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * This file contains the hardware definitions for the - * LinkUp Systems L7200 SOC development board. - * - * Changelog: - * 02-01-2000 RS Created L7200 version, derived from rpc code - * 03-21-2000 SJH Cleaned up file - * 04-21-2000 RS Changed mapping of I/O in virtual space - * 04-25-2000 SJH Removed unused symbols and such - * 05-05-2000 SJH Complete rewrite - * 07-31-2000 SJH Added undocumented debug auxillary port to - * get at last two columns for keyboard driver - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* Hardware addresses of major areas. - * *_START is the physical address - * *_SIZE is the size of the region - * *_BASE is the virtual address - */ -#define RAM_START 0xf0000000 -#define RAM_SIZE 0x02000000 -#define RAM_BASE 0xc0000000 - -#define IO_START 0x80000000 /* I/O */ -#define IO_SIZE 0x01000000 -#define IO_BASE 0xd0000000 - -#define IO_START_2 0x90000000 /* I/O */ -#define IO_SIZE_2 0x01000000 -#define IO_BASE_2 0xd1000000 - -#define AUX_START 0x1a000000 /* AUX PORT */ -#define AUX_SIZE 0x01000000 -#define AUX_BASE 0xd2000000 - -#define FLASH1_START 0x00000000 /* FLASH BANK 1 */ -#define FLASH1_SIZE 0x01000000 -#define FLASH1_BASE 0xd3000000 - -#define FLASH2_START 0x10000000 /* FLASH BANK 2 */ -#define FLASH2_SIZE 0x01000000 -#define FLASH2_BASE 0xd4000000 - -#define ISA_START 0x20000000 /* ISA */ -#define ISA_SIZE 0x20000000 -#define ISA_BASE 0xe0000000 - -#define PCIO_BASE IO_BASE - -#endif diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h deleted file mode 100644 index e24a10a..0000000 --- a/include/asm-arm/arch-l7200/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/io.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 03-21-2000 SJH Created from linux/include/asm-arm/arch-nexuspci/io.h - * 08-31-2000 SJH Added in IO functions necessary for new drivers - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * There are not real ISA nor PCI buses, so we fake it. - */ -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-l7200/irqs.h b/include/asm-arm/arch-l7200/irqs.h deleted file mode 100644 index 7120c01..0000000 --- a/include/asm-arm/arch-l7200/irqs.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * include/asm-arm/arch-l7200/irqs.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 01-02-2000 RS Create l7200 version - * 03-28-2000 SJH Removed unused interrupt - * 07-28-2000 SJH Added pseudo-keyboard interrupt - */ - -/* - * NOTE: The second timer (Timer 2) is used as the keyboard - * interrupt when the keyboard driver is enabled. - */ - -#define NR_IRQS 32 - -#define IRQ_STWDOG 0 /* Watchdog timer */ -#define IRQ_PROG 1 /* Programmable interrupt */ -#define IRQ_DEBUG_RX 2 /* Comm Rx debug */ -#define IRQ_DEBUG_TX 3 /* Comm Tx debug */ -#define IRQ_GCTC1 4 /* Timer 1 */ -#define IRQ_GCTC2 5 /* Timer 2 / Keyboard */ -#define IRQ_DMA 6 /* DMA controller */ -#define IRQ_CLCD 7 /* Color LCD controller */ -#define IRQ_SM_RX 8 /* Smart card */ -#define IRQ_SM_TX 9 /* Smart cart */ -#define IRQ_SM_RST 10 /* Smart card */ -#define IRQ_SIB 11 /* Serial Interface Bus */ -#define IRQ_MMC 12 /* MultiMediaCard */ -#define IRQ_SSP1 13 /* Synchronous Serial Port 1 */ -#define IRQ_SSP2 14 /* Synchronous Serial Port 1 */ -#define IRQ_SPI 15 /* SPI slave */ -#define IRQ_UART_1 16 /* UART 1 */ -#define IRQ_UART_2 17 /* UART 2 */ -#define IRQ_IRDA 18 /* IRDA */ -#define IRQ_RTC_TICK 19 /* Real Time Clock tick */ -#define IRQ_RTC_ALARM 20 /* Real Time Clock alarm */ -#define IRQ_GPIO 21 /* General Purpose IO */ -#define IRQ_GPIO_DMA 22 /* General Purpose IO, DMA */ -#define IRQ_M2M 23 /* Memory to memory DMA */ -#define IRQ_RESERVED 24 /* RESERVED, don't use */ -#define IRQ_INTF 25 /* External active low interrupt */ -#define IRQ_INT0 26 /* External active low interrupt */ -#define IRQ_INT1 27 /* External active low interrupt */ -#define IRQ_INT2 28 /* External active low interrupt */ -#define IRQ_UCB1200 29 /* Interrupt generated by UCB1200*/ -#define IRQ_BAT_LO 30 /* Low batery or external power */ -#define IRQ_MEDIA_CHG 31 /* Media change interrupt */ - -/* - * This is the offset of the FIQ "IRQ" numbers - */ -#define FIQ_START 64 diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h deleted file mode 100644 index 402df63..0000000 --- a/include/asm-arm/arch-l7200/memory.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/memory.h - * - * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) - * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net) - * - * Changelog: - * 03-13-2000 SJH Created - * 04-13-2000 RS Changed bus macros for new addr - * 05-03-2000 SJH Removed bus macros and fixed virt_to_phys macro - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset on the L7200 SDB. - */ -#define PHYS_OFFSET UL(0xf0000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * Cache flushing area - ROM - */ -#define FLUSH_BASE_PHYS 0x40000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/include/asm-arm/arch-l7200/pmpcon.h b/include/asm-arm/arch-l7200/pmpcon.h deleted file mode 100644 index 730056c..0000000 --- a/include/asm-arm/arch-l7200/pmpcon.h +++ /dev/null @@ -1,46 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-arm/arch-l7200/pmpcon.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * DC/DC converter register. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define PMPCON_OFF 0x00006000 /* Offset from IO_START_2. */ - -/* IO_START_2 and IO_BASE_2 are defined in hardware.h */ - -#define PMPCON_START (IO_START_2 + PMPCON_OFF) /* Physical address of reg. */ -#define PMPCON_BASE (IO_BASE_2 + PMPCON_OFF) /* Virtual address of reg. */ - - -#define PMPCON (*(volatile unsigned int *)(PMPCON_BASE)) - -#define PWM2_50CYCLE 0x800 -#define CONTRAST 0x9 - -#define PWM1H (CONTRAST) -#define PWM1L (CONTRAST << 4) - -#define PMPCON_VALUE (PWM2_50CYCLE | PWM1L | PWM1H) - -/* PMPCON = 0x811; // too light and fuzzy - * PMPCON = 0x844; - * PMPCON = 0x866; // better color poor depth - * PMPCON = 0x888; // Darker but better depth - * PMPCON = 0x899; // Darker even better depth - * PMPCON = 0x8aa; // too dark even better depth - * PMPCON = 0X8cc; // Way too dark - */ - -/* As CONTRAST value increases the greater the depth perception and - * the darker the colors. - */ diff --git a/include/asm-arm/arch-l7200/pmu.h b/include/asm-arm/arch-l7200/pmu.h deleted file mode 100644 index 57faea7..0000000 --- a/include/asm-arm/arch-l7200/pmu.h +++ /dev/null @@ -1,125 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-arm/arch-l7200/pmu.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * Power Management Unit (PMU). - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define PMU_OFF 0x00050000 /* Offset from IO_START to the PMU registers. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define PMU_START (IO_START + PMU_OFF) /* Physical addr. of the PMU reg. */ -#define PMU_BASE (IO_BASE + PMU_OFF) /* Virtual addr. of the PMU reg. */ - - -/* Define the PMU registers for use by device drivers and the kernel. */ - -typedef struct { - unsigned int CURRENT; /* Current configuration register */ - unsigned int NEXT; /* Next configuration register */ - unsigned int reserved; - unsigned int RUN; /* Run configuration register */ - unsigned int COMM; /* Configuration command register */ - unsigned int SDRAM; /* SDRAM configuration bypass register */ -} pmu_interface; - -#define PMU ((volatile pmu_interface *)(PMU_BASE)) - - -/* Macro's for reading the common register fields. */ - -#define GET_TRANSOP(reg) ((reg >> 25) & 0x03) /* Bits 26-25 */ -#define GET_OSCEN(reg) ((reg >> 16) & 0x01) -#define GET_OSCMUX(reg) ((reg >> 15) & 0x01) -#define GET_PLLMUL(reg) ((reg >> 9) & 0x3f) /* Bits 14-9 */ -#define GET_PLLEN(reg) ((reg >> 8) & 0x01) -#define GET_PLLMUX(reg) ((reg >> 7) & 0x01) -#define GET_BCLK_DIV(reg) ((reg >> 3) & 0x03) /* Bits 4-3 */ -#define GET_SDRB_SEL(reg) ((reg >> 2) & 0x01) -#define GET_SDRF_SEL(reg) ((reg >> 1) & 0x01) -#define GET_FASTBUS(reg) (reg & 0x1) - -/* CFG_NEXT register */ - -#define CFG_NEXT_CLOCKRECOVERY ((PMU->NEXT >> 18) & 0x7f) /* Bits 24-18 */ -#define CFG_NEXT_INTRET ((PMU->NEXT >> 17) & 0x01) -#define CFG_NEXT_SDR_STOP ((PMU->NEXT >> 6) & 0x01) -#define CFG_NEXT_SYSCLKEN ((PMU->NEXT >> 5) & 0x01) - -/* Useful field values that can be used to construct the - * CFG_NEXT and CFG_RUN registers. - */ - -#define TRANSOP_NOP 0<<25 /* NOCHANGE_NOSTALL */ -#define NOCHANGE_STALL 1<<25 -#define CHANGE_NOSTALL 2<<25 -#define CHANGE_STALL 3<<25 - -#define INTRET 1<<17 -#define OSCEN 1<<16 -#define OSCMUX 1<<15 - -/* PLL frequencies */ - -#define PLLMUL_0 0<<9 /* 3.6864 MHz */ -#define PLLMUL_1 1<<9 /* ?????? MHz */ -#define PLLMUL_5 5<<9 /* 18.432 MHz */ -#define PLLMUL_10 10<<9 /* 36.864 MHz */ -#define PLLMUL_18 18<<9 /* ?????? MHz */ -#define PLLMUL_20 20<<9 /* 73.728 MHz */ -#define PLLMUL_32 32<<9 /* ?????? MHz */ -#define PLLMUL_35 35<<9 /* 129.024 MHz */ -#define PLLMUL_36 36<<9 /* ?????? MHz */ -#define PLLMUL_39 39<<9 /* ?????? MHz */ -#define PLLMUL_40 40<<9 /* 147.456 MHz */ - -/* Clock recovery times */ - -#define CRCLOCK_1 1<<18 -#define CRCLOCK_2 2<<18 -#define CRCLOCK_4 4<<18 -#define CRCLOCK_8 8<<18 -#define CRCLOCK_16 16<<18 -#define CRCLOCK_32 32<<18 -#define CRCLOCK_63 63<<18 -#define CRCLOCK_127 127<<18 - -#define PLLEN 1<<8 -#define PLLMUX 1<<7 -#define SDR_STOP 1<<6 -#define SYSCLKEN 1<<5 - -#define BCLK_DIV_4 2<<3 -#define BCLK_DIV_2 1<<3 -#define BCLK_DIV_1 0<<3 - -#define SDRB_SEL 1<<2 -#define SDRF_SEL 1<<1 -#define FASTBUS 1<<0 - - -/* CFG_SDRAM */ - -#define SDRREFFQ 1<<0 /* Only if SDRSTOPRQ is not set. */ -#define SDRREFACK 1<<1 /* Read-only */ -#define SDRSTOPRQ 1<<2 /* Only if SDRREFFQ is not set. */ -#define SDRSTOPACK 1<<3 /* Read-only */ -#define PICEN 1<<4 /* Enable Co-procesor */ -#define PICTEST 1<<5 - -#define GET_SDRREFFQ ((PMU->SDRAM >> 0) & 0x01) -#define GET_SDRREFACK ((PMU->SDRAM >> 1) & 0x01) /* Read-only */ -#define GET_SDRSTOPRQ ((PMU->SDRAM >> 2) & 0x01) -#define GET_SDRSTOPACK ((PMU->SDRAM >> 3) & 0x01) /* Read-only */ -#define GET_PICEN ((PMU->SDRAM >> 4) & 0x01) -#define GET_PICTEST ((PMU->SDRAM >> 5) & 0x01) diff --git a/include/asm-arm/arch-l7200/serial.h b/include/asm-arm/arch-l7200/serial.h deleted file mode 100644 index defb8b7..0000000 --- a/include/asm-arm/arch-l7200/serial.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/serial.h - * - * Copyright (c) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 03-20-2000 SJH Created - * 03-26-2000 SJH Added flags for serial ports - * 03-27-2000 SJH Corrected BASE_BAUD value - * 04-14-2000 RS Made register addr dependent on IO_BASE - * 05-03-2000 SJH Complete rewrite - * 05-09-2000 SJH Stripped out architecture specific serial stuff - * and placed it in a separate file - * 07-28-2000 SJH Moved base baud rate variable - */ -#ifndef __ASM_ARCH_SERIAL_H -#define __ASM_ARCH_SERIAL_H - -/* - * This assumes you have a 3.6864 MHz clock for your UART. - */ -#define BASE_BAUD 3686400 - -/* - * Standard COM flags - */ -#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST) - -#define STD_SERIAL_PORT_DEFNS \ - /* MAGIC UART CLK PORT IRQ FLAGS */ \ - { 0, BASE_BAUD, UART1_BASE, IRQ_UART_1, STD_COM_FLAGS }, /* ttyLU0 */ \ - { 0, BASE_BAUD, UART2_BASE, IRQ_UART_2, STD_COM_FLAGS }, /* ttyLU1 */ \ - -#define EXTRA_SERIAL_PORT_DEFNS - -#endif diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h deleted file mode 100644 index b1008a9..0000000 --- a/include/asm-arm/arch-l7200/serial_l7200.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/serial_l7200.h - * - * Copyright (c) 2000 Steven Hill (sjhill@cotw.com) - * - * Changelog: - * 05-09-2000 SJH Created - */ -#ifndef __ASM_ARCH_SERIAL_L7200_H -#define __ASM_ARCH_SERIAL_L7200_H - -#include - -/* - * This assumes you have a 3.6864 MHz clock for your UART. - */ -#define BASE_BAUD 3686400 - -/* - * UART base register addresses - */ -#define UART1_BASE (IO_BASE + 0x00044000) -#define UART2_BASE (IO_BASE + 0x00045000) - -/* - * UART register offsets - */ -#define UARTDR 0x00 /* Tx/Rx data */ -#define RXSTAT 0x04 /* Rx status */ -#define H_UBRLCR 0x08 /* mode register high */ -#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/ -#define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ -#define UARTCON 0x14 /* control register */ -#define UARTFLG 0x18 /* flag register */ -#define UARTINTSTAT 0x1C /* FIFO IRQ status register */ -#define UARTINTMASK 0x20 /* FIFO IRQ mask register */ - -/* - * UART baud rate register values - */ -#define BR_110 0x827 -#define BR_1200 0x06e -#define BR_2400 0x05f -#define BR_4800 0x02f -#define BR_9600 0x017 -#define BR_14400 0x00f -#define BR_19200 0x00b -#define BR_38400 0x005 -#define BR_57600 0x003 -#define BR_76800 0x002 -#define BR_115200 0x001 - -/* - * Receiver status register (RXSTAT) mask values - */ -#define RXSTAT_NO_ERR 0x00 /* No error */ -#define RXSTAT_FRM_ERR 0x01 /* Framing error */ -#define RXSTAT_PAR_ERR 0x02 /* Parity error */ -#define RXSTAT_OVR_ERR 0x04 /* Overrun error */ - -/* - * High byte of UART bit rate and line control register (H_UBRLCR) values - */ -#define UBRLCR_BRK 0x01 /* generate break on tx */ -#define UBRLCR_PEN 0x02 /* enable parity */ -#define UBRLCR_PDIS 0x00 /* disable parity */ -#define UBRLCR_EVEN 0x04 /* 1= even parity,0 = odd parity */ -#define UBRLCR_STP2 0x08 /* transmit 2 stop bits */ -#define UBRLCR_FIFO 0x10 /* enable FIFO */ -#define UBRLCR_LEN5 0x60 /* word length5 */ -#define UBRLCR_LEN6 0x40 /* word length6 */ -#define UBRLCR_LEN7 0x20 /* word length7 */ -#define UBRLCR_LEN8 0x00 /* word length8 */ - -/* - * UART control register (UARTCON) values - */ -#define UARTCON_UARTEN 0x01 /* Enable UART */ -#define UARTCON_DMAONERR 0x08 /* Mask RxDmaRq when errors occur */ - -/* - * UART flag register (UARTFLG) mask values - */ -#define UARTFLG_UTXFF 0x20 /* Transmit FIFO full */ -#define UARTFLG_URXFE 0x10 /* Receiver FIFO empty */ -#define UARTFLG_UBUSY 0x08 /* Transmitter busy */ -#define UARTFLG_DCD 0x04 /* Data carrier detect */ -#define UARTFLG_DSR 0x02 /* Data set ready */ -#define UARTFLG_CTS 0x01 /* Clear to send */ - -/* - * UART interrupt status/clear registers (UARTINTSTAT/CLR) values - */ -#define UART_TXINT 0x01 /* TX interrupt */ -#define UART_RXINT 0x02 /* RX interrupt */ -#define UART_RXERRINT 0x04 /* RX error interrupt */ -#define UART_MSINT 0x08 /* Modem Status interrupt */ -#define UART_UDINT 0x10 /* UART Disabled interrupt */ -#define UART_ALLIRQS 0x1f /* All interrupts */ - -#endif diff --git a/include/asm-arm/arch-l7200/sib.h b/include/asm-arm/arch-l7200/sib.h deleted file mode 100644 index bf4364e..0000000 --- a/include/asm-arm/arch-l7200/sib.h +++ /dev/null @@ -1,119 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-arm/arch-l7200/sib.h - * - * Registers and helper functions for the Serial Interface Bus. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define SIB_OFF 0x00040000 /* Offset from IO_START to the SIB reg's. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define SIB_START (IO_START + SIB_OFF) /* Physical addr of the SIB reg. */ -#define SIB_BASE (IO_BASE + SIB_OFF) /* Virtual addr of the SIB reg. */ - -/* Offsets from the start of the SIB for all the registers. */ - -/* Define the SIB registers for use by device drivers and the kernel. */ - -typedef struct -{ - unsigned int MCCR; /* SIB Control Register Offset: 0x00 */ - unsigned int RES1; /* Reserved Offset: 0x04 */ - unsigned int MCDR0; /* SIB Data Register 0 Offset: 0x08 */ - unsigned int MCDR1; /* SIB Data Register 1 Offset: 0x0c */ - unsigned int MCDR2; /* SIB Data Register 2 (UCB1x00) Offset: 0x10 */ - unsigned int RES2; /* Reserved Offset: 0x14 */ - unsigned int MCSR; /* SIB Status Register Offset: 0x18 */ -} SIB_Interface; - -#define SIB ((volatile SIB_Interface *) (SIB_BASE)) - -/* MCCR */ - -#define INTERNAL_FREQ 9216000 /* Hertz */ -#define AUDIO_FREQ 5000 /* Hertz */ -#define TELECOM_FREQ 5000 /* Hertz */ - -#define AUDIO_DIVIDE (INTERNAL_FREQ / (32 * AUDIO_FREQ)) -#define TELECOM_DIVIDE (INTERNAL_FREQ / (32 * TELECOM_FREQ)) - -#define MCCR_ASD57 AUDIO_DIVIDE -#define MCCR_TSD57 (TELECOM_DIVIDE << 8) -#define MCCR_MCE (1 << 16) /* SIB enable */ -#define MCCR_ECS (1 << 17) /* External Clock Select */ -#define MCCR_ADM (1 << 18) /* A/D Data Sampling */ -#define MCCR_PMC (1 << 26) /* PIN Multiplexer Control */ - - -#define GET_ASD ((SIB->MCCR >> 0) & 0x3f) /* Audio Sample Rate Div. */ -#define GET_TSD ((SIB->MCCR >> 8) & 0x3f) /* Telcom Sample Rate Div. */ -#define GET_MCE ((SIB->MCCR >> 16) & 0x01) /* SIB Enable */ -#define GET_ECS ((SIB->MCCR >> 17) & 0x01) /* External Clock Select */ -#define GET_ADM ((SIB->MCCR >> 18) & 0x01) /* A/D Data Sampling Mode */ -#define GET_TTM ((SIB->MCCR >> 19) & 0x01) /* Telco Trans. FIFO I mask */ -#define GET_TRM ((SIB->MCCR >> 20) & 0x01) /* Telco Recv. FIFO I mask */ -#define GET_ATM ((SIB->MCCR >> 21) & 0x01) /* Audio Trans. FIFO I mask */ -#define GET_ARM ((SIB->MCCR >> 22) & 0x01) /* Audio Recv. FIFO I mask */ -#define GET_LBM ((SIB->MCCR >> 23) & 0x01) /* Loop Back Mode */ -#define GET_ECP ((SIB->MCCR >> 24) & 0x03) /* Extern. Clck Prescale sel */ -#define GET_PMC ((SIB->MCCR >> 26) & 0x01) /* PIN Multiplexer Control */ -#define GET_ERI ((SIB->MCCR >> 27) & 0x01) /* External Read Interrupt */ -#define GET_EWI ((SIB->MCCR >> 28) & 0x01) /* External Write Interrupt */ - -/* MCDR0 */ - -#define AUDIO_RECV ((SIB->MCDR0 >> 4) & 0xfff) -#define AUDIO_WRITE(v) ((SIB->MCDR0 = (v & 0xfff) << 4)) - -/* MCDR1 */ - -#define TELECOM_RECV ((SIB->MCDR1 >> 2) & 032fff) -#define TELECOM_WRITE(v) ((SIB->MCDR1 = (v & 0x3fff) << 2)) - - -/* MCSR */ - -#define MCSR_ATU (1 << 4) /* Audio Transmit FIFO Underrun */ -#define MCSR_ARO (1 << 5) /* Audio Receive FIFO Underrun */ -#define MCSR_TTU (1 << 6) /* TELECOM Transmit FIFO Underrun */ -#define MCSR_TRO (1 << 7) /* TELECOM Receive FIFO Underrun */ - -#define MCSR_CLEAR_UNDERUN_BITS (MCSR_ATU | MCSR_ARO | MCSR_TTU | MCSR_TRO) - - -#define GET_ATS ((SIB->MCSR >> 0) & 0x01) /* Audio Transmit FIFO Service Req*/ -#define GET_ARS ((SIB->MCSR >> 1) & 0x01) /* Audio Recv FIFO Service Request*/ -#define GET_TTS ((SIB->MCSR >> 2) & 0x01) /* TELECOM Transmit FIFO Flag */ -#define GET_TRS ((SIB->MCSR >> 3) & 0x01) /* TELECOM Recv FIFO Service Req. */ -#define GET_ATU ((SIB->MCSR >> 4) & 0x01) /* Audio Transmit FIFO Underrun */ -#define GET_ARO ((SIB->MCSR >> 5) & 0x01) /* Audio Receive FIFO Underrun */ -#define GET_TTU ((SIB->MCSR >> 6) & 0x01) /* TELECOM Transmit FIFO Underrun */ -#define GET_TRO ((SIB->MCSR >> 7) & 0x01) /* TELECOM Receive FIFO Underrun */ -#define GET_ANF ((SIB->MCSR >> 8) & 0x01) /* Audio Transmit FIFO not full */ -#define GET_ANE ((SIB->MCSR >> 9) & 0x01) /* Audio Receive FIFO not empty */ -#define GET_TNF ((SIB->MCSR >> 10) & 0x01) /* Telecom Transmit FIFO not full */ -#define GET_TNE ((SIB->MCSR >> 11) & 0x01) /* Telecom Receive FIFO not empty */ -#define GET_CWC ((SIB->MCSR >> 12) & 0x01) /* Codec Write Complete */ -#define GET_CRC ((SIB->MCSR >> 13) & 0x01) /* Codec Read Complete */ -#define GET_ACE ((SIB->MCSR >> 14) & 0x01) /* Audio Codec Enabled */ -#define GET_TCE ((SIB->MCSR >> 15) & 0x01) /* Telecom Codec Enabled */ - -/* MCDR2 */ - -#define MCDR2_rW (1 << 16) - -#define WRITE_MCDR2(reg, data) (SIB->MCDR2 =((reg<<17)|MCDR2_rW|(data&0xffff))) -#define MCDR2_WRITE_COMPLETE GET_CWC - -#define INITIATE_MCDR2_READ(reg) (SIB->MCDR2 = (reg << 17)) -#define MCDR2_READ_COMPLETE GET_CRC -#define MCDR2_READ (SIB->MCDR2 & 0xffff) diff --git a/include/asm-arm/arch-l7200/sys-clock.h b/include/asm-arm/arch-l7200/sys-clock.h deleted file mode 100644 index 771c774..0000000 --- a/include/asm-arm/arch-l7200/sys-clock.h +++ /dev/null @@ -1,67 +0,0 @@ -/****************************************************************************/ -/* - * linux/include/asm-arm/arch-l7200/sys-clock.h - * - * Registers and helper functions for the L7200 Link-Up Systems - * System clocks. - * - * (C) Copyright 2000, S A McConnell (samcconn@cotw.com) - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - */ - -/****************************************************************************/ - -#define SYS_CLOCK_OFF 0x00050030 /* Offset from IO_START. */ - -/* IO_START and IO_BASE are defined in hardware.h */ - -#define SYS_CLOCK_START (IO_START + SYS_CLCOK_OFF) /* Physical address */ -#define SYS_CLOCK_BASE (IO_BASE + SYS_CLOCK_OFF) /* Virtual address */ - -/* Define the interface to the SYS_CLOCK */ - -typedef struct -{ - unsigned int ENABLE; - unsigned int ESYNC; - unsigned int SELECT; -} sys_clock_interface; - -#define SYS_CLOCK ((volatile sys_clock_interface *)(SYS_CLOCK_BASE)) - -//#define CLOCK_EN (*(volatile unsigned long *)(PMU_BASE+CLOCK_EN_OFF)) -//#define CLOCK_ESYNC (*(volatile unsigned long *)(PMU_BASE+CLOCK_ESYNC_OFF)) -//#define CLOCK_SEL (*(volatile unsigned long *)(PMU_BASE+CLOCK_SEL_OFF)) - -/* SYS_CLOCK -> ENABLE */ - -#define SYN_EN 1<<0 -#define B18M_EN 1<<1 -#define CLK3M6_EN 1<<2 -#define BUART_EN 1<<3 -#define CLK18MU_EN 1<<4 -#define FIR_EN 1<<5 -#define MIRN_EN 1<<6 -#define UARTM_EN 1<<7 -#define SIBADC_EN 1<<8 -#define ALTD_EN 1<<9 -#define CLCLK_EN 1<<10 - -/* SYS_CLOCK -> SELECT */ - -#define CLK18M_DIV 1<<0 -#define MIR_SEL 1<<1 -#define SSP_SEL 1<<4 -#define MM_DIV 1<<5 -#define MM_SEL 1<<6 -#define ADC_SEL_2 0<<7 -#define ADC_SEL_4 1<<7 -#define ADC_SEL_8 3<<7 -#define ADC_SEL_16 7<<7 -#define ADC_SEL_32 0x0f<<7 -#define ADC_SEL_64 0x1f<<7 -#define ADC_SEL_128 0x3f<<7 -#define ALTD_SEL 1<<13 diff --git a/include/asm-arm/arch-l7200/system.h b/include/asm-arm/arch-l7200/system.h deleted file mode 100644 index efef950..0000000 --- a/include/asm-arm/arch-l7200/system.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/system.h - * - * Copyright (c) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog - * 03-21-2000 SJH Created - * 04-26-2000 SJH Fixed functions - * 05-03-2000 SJH Removed usage of obsolete 'iomd.h' - * 05-31-2000 SJH Properly implemented 'arch_idle' - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include - -static inline void arch_idle(void) -{ - *(unsigned long *)(IO_BASE + 0x50004) = 1; /* idle mode */ -} - -static inline void arch_reset(char mode) -{ - if (mode == 's') { - cpu_reset(0); - } -} - -#endif diff --git a/include/asm-arm/arch-l7200/time.h b/include/asm-arm/arch-l7200/time.h deleted file mode 100644 index ea22f7f..0000000 --- a/include/asm-arm/arch-l7200/time.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/time.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 01-02-2000 RS Created l7200 version, derived from rpc code - * 05-03-2000 SJH Complete rewrite - */ -#ifndef _ASM_ARCH_TIME_H -#define _ASM_ARCH_TIME_H - -#include - -/* - * RTC base register address - */ -#define RTC_BASE (IO_BASE_2 + 0x2000) - -/* - * RTC registers - */ -#define RTC_RTCDR (*(volatile unsigned char *) (RTC_BASE + 0x000)) -#define RTC_RTCMR (*(volatile unsigned char *) (RTC_BASE + 0x004)) -#define RTC_RTCS (*(volatile unsigned char *) (RTC_BASE + 0x008)) -#define RTC_RTCC (*(volatile unsigned char *) (RTC_BASE + 0x008)) -#define RTC_RTCDV (*(volatile unsigned char *) (RTC_BASE + 0x00c)) -#define RTC_RTCCR (*(volatile unsigned char *) (RTC_BASE + 0x010)) - -/* - * RTCCR register values - */ -#define RTC_RATE_32 0x00 /* 32 Hz tick */ -#define RTC_RATE_64 0x10 /* 64 Hz tick */ -#define RTC_RATE_128 0x20 /* 128 Hz tick */ -#define RTC_RATE_256 0x30 /* 256 Hz tick */ -#define RTC_EN_ALARM 0x01 /* Enable alarm */ -#define RTC_EN_TIC 0x04 /* Enable counter */ -#define RTC_EN_STWDOG 0x08 /* Enable watchdog */ - -/* - * Handler for RTC timer interrupt - */ -static irqreturn_t -timer_interrupt(int irq, void *dev_id) -{ - struct pt_regs *regs = get_irq_regs(); - do_timer(1); -#ifndef CONFIG_SMP - update_process_times(user_mode(regs)); -#endif - do_profile(regs); - RTC_RTCC = 0; /* Clear interrupt */ - - return IRQ_HANDLED; -} - -/* - * Set up RTC timer interrupt, and return the current time in seconds. - */ -void __init time_init(void) -{ - RTC_RTCC = 0; /* Clear interrupt */ - - timer_irq.handler = timer_interrupt; - - setup_irq(IRQ_RTC_TICK, &timer_irq); - - RTC_RTCCR = RTC_RATE_128 | RTC_EN_TIC; /* Set rate and enable timer */ -} - -#endif diff --git a/include/asm-arm/arch-l7200/timex.h b/include/asm-arm/arch-l7200/timex.h deleted file mode 100644 index 3c32026..0000000 --- a/include/asm-arm/arch-l7200/timex.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/timex.h - * - * Copyright (C) 2000 Rob Scott (rscott@mtrob.fdns.net) - * Steve Hill (sjhill@cotw.com) - * - * 04-21-2000 RS Created file - * 05-03-2000 SJH Tick rate was wrong - * - */ - -/* - * On the ARM720T, clock ticks are set to 128 Hz. - * - * NOTE: The actual RTC value is set in 'time.h' which - * must be changed when choosing a different tick - * rate. The value of HZ in 'param.h' must also - * be changed to match below. - */ -#define CLOCK_TICK_RATE 128 diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h deleted file mode 100644 index c5ba0ad..0000000 --- a/include/asm-arm/arch-l7200/uncompress.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/uncompress.h - * - * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) - * - * Changelog: - * 05-01-2000 SJH Created - * 05-13-2000 SJH Filled in function bodies - * 07-26-2000 SJH Removed hard coded baud rate - */ - -#include - -#define IO_UART IO_START + 0x00044000 - -#define __raw_writeb(v,p) (*(volatile unsigned char *)(p) = (v)) -#define __raw_readb(p) (*(volatile unsigned char *)(p)) - -static inline void putc(int c) -{ - while(__raw_readb(IO_UART + 0x18) & 0x20 || - __raw_readb(IO_UART + 0x18) & 0x08) - barrier(); - - __raw_writeb(c, IO_UART + 0x00); -} - -static inline void flush(void) -{ -} - -static __inline__ void arch_decomp_setup(void) -{ - __raw_writeb(0x00, IO_UART + 0x08); /* Set HSB */ - __raw_writeb(0x00, IO_UART + 0x20); /* Disable IRQs */ - __raw_writeb(0x01, IO_UART + 0x14); /* Enable UART */ -} - -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-l7200/vmalloc.h b/include/asm-arm/arch-l7200/vmalloc.h deleted file mode 100644 index 816231e..0000000 --- a/include/asm-arm/arch-l7200/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * linux/include/asm-arm/arch-l7200/vmalloc.h - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-lh7a40x/clocks.h b/include/asm-arm/arch-lh7a40x/clocks.h deleted file mode 100644 index 7d0ba18..0000000 --- a/include/asm-arm/arch-lh7a40x/clocks.h +++ /dev/null @@ -1,18 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/clocks.h - * - * Copyright (C) 2004 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_CLOCKS_H -#define __ASM_ARCH_CLOCKS_H - -unsigned int fclkfreq_get (void); -unsigned int hclkfreq_get (void); -unsigned int pclkfreq_get (void); - -#endif /* _ASM_ARCH_CLOCKS_H */ diff --git a/include/asm-arm/arch-lh7a40x/constants.h b/include/asm-arm/arch-lh7a40x/constants.h deleted file mode 100644 index 51de96e..0000000 --- a/include/asm-arm/arch-lh7a40x/constants.h +++ /dev/null @@ -1,91 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/constants.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_CONSTANTS_H -#define __ASM_ARCH_CONSTANTS_H - - -/* Addressing constants */ - - /* SoC CPU IO addressing */ -#define IO_PHYS (0x80000000) -#define IO_VIRT (0xf8000000) -#define IO_SIZE (0x0000B000) - -#ifdef CONFIG_MACH_KEV7A400 -# define CPLD_PHYS (0x20000000) -# define CPLD_VIRT (0xf2000000) -# define CPLD_SIZE PAGE_SIZE -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) - -# define IOBARRIER_PHYS 0x10000000 /* Second bank, fastest timing */ -# define IOBARRIER_VIRT 0xf0000000 -# define IOBARRIER_SIZE PAGE_SIZE - -# define CF_PHYS 0x60200000 -# define CF_VIRT 0xf6020000 -# define CF_SIZE (8*1024) - - /* The IO mappings for the LPD CPLD are, unfortunately, sparse. */ -# define CPLDX_PHYS(x) (0x70000000 | ((x) << 20)) -# define CPLDX_VIRT(x) (0xf7000000 | ((x) << 16)) -# define CPLD00_PHYS CPLDX_PHYS (0x00) /* Wired LAN */ -# define CPLD00_VIRT CPLDX_VIRT (0x00) -# define CPLD00_SIZE PAGE_SIZE -# define CPLD02_PHYS CPLDX_PHYS (0x02) -# define CPLD02_VIRT CPLDX_VIRT (0x02) -# define CPLD02_SIZE PAGE_SIZE -# define CPLD06_PHYS CPLDX_PHYS (0x06) -# define CPLD06_VIRT CPLDX_VIRT (0x06) -# define CPLD06_SIZE PAGE_SIZE -# define CPLD08_PHYS CPLDX_PHYS (0x08) -# define CPLD08_VIRT CPLDX_VIRT (0x08) -# define CPLD08_SIZE PAGE_SIZE -# define CPLD0A_PHYS CPLDX_PHYS (0x0a) -# define CPLD0A_VIRT CPLDX_VIRT (0x0a) -# define CPLD0A_SIZE PAGE_SIZE -# define CPLD0C_PHYS CPLDX_PHYS (0x0c) -# define CPLD0C_VIRT CPLDX_VIRT (0x0c) -# define CPLD0C_SIZE PAGE_SIZE -# define CPLD0E_PHYS CPLDX_PHYS (0x0e) -# define CPLD0E_VIRT CPLDX_VIRT (0x0e) -# define CPLD0E_SIZE PAGE_SIZE -# define CPLD10_PHYS CPLDX_PHYS (0x10) -# define CPLD10_VIRT CPLDX_VIRT (0x10) -# define CPLD10_SIZE PAGE_SIZE -# define CPLD12_PHYS CPLDX_PHYS (0x12) -# define CPLD12_VIRT CPLDX_VIRT (0x12) -# define CPLD12_SIZE PAGE_SIZE -# define CPLD14_PHYS CPLDX_PHYS (0x14) -# define CPLD14_VIRT CPLDX_VIRT (0x14) -# define CPLD14_SIZE PAGE_SIZE -# define CPLD16_PHYS CPLDX_PHYS (0x16) -# define CPLD16_VIRT CPLDX_VIRT (0x16) -# define CPLD16_SIZE PAGE_SIZE -# define CPLD18_PHYS CPLDX_PHYS (0x18) -# define CPLD18_VIRT CPLDX_VIRT (0x18) -# define CPLD18_SIZE PAGE_SIZE -# define CPLD1A_PHYS CPLDX_PHYS (0x1a) -# define CPLD1A_VIRT CPLDX_VIRT (0x1a) -# define CPLD1A_SIZE PAGE_SIZE -#endif - - /* Timing constants */ - -#define XTAL_IN 14745600 /* 14.7456 MHz crystal */ -#define PLL_CLOCK (XTAL_IN * 21) /* 309 MHz PLL clock */ -#define MAX_HCLK_KHZ 100000 /* HCLK max limit ~100MHz */ -#define HCLK (99993600) -//#define HCLK (119808000) - -#endif /* __ASM_ARCH_CONSTANTS_H */ diff --git a/include/asm-arm/arch-lh7a40x/debug-macro.S b/include/asm-arm/arch-lh7a40x/debug-macro.S deleted file mode 100644 index 421dcd6..0000000 --- a/include/asm-arm/arch-lh7a40x/debug-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* linux/include/asm-arm/arch-lh7a40x/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - @ It is not known if this will be appropriate for every 40x - @ board. - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - mov \rx, #0x00000700 @ offset from base - orreq \rx, \rx, #0x80000000 @ physical base - orrne \rx, \rx, #0xf8000000 @ virtual base - .endm - - .macro senduart,rd,rx - strb \rd, [\rx] @ DATA - .endm - - .macro busyuart,rd,rx @ spin while busy -1001: ldr \rd, [\rx, #0x10] @ STATUS - tst \rd, #1 << 3 @ BUSY (TX FIFO not empty) - bne 1001b @ yes, spin - .endm - - .macro waituart,rd,rx @ wait for Tx FIFO room -1001: ldrb \rd, [\rx, #0x10] @ STATUS - tst \rd, #1 << 5 @ TXFF (TX FIFO full) - bne 1001b @ yes, spin - .endm diff --git a/include/asm-arm/arch-lh7a40x/dma.h b/include/asm-arm/arch-lh7a40x/dma.h deleted file mode 100644 index a8cbd14..0000000 --- a/include/asm-arm/arch-lh7a40x/dma.h +++ /dev/null @@ -1,86 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/dma.h - * - * Copyright (C) 2005 Marc Singer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -typedef enum { - DMA_M2M0 = 0, - DMA_M2M1 = 1, - DMA_M2P0 = 2, /* Tx */ - DMA_M2P1 = 3, /* Rx */ - DMA_M2P2 = 4, /* Tx */ - DMA_M2P3 = 5, /* Rx */ - DMA_M2P4 = 6, /* Tx - AC97 */ - DMA_M2P5 = 7, /* Rx - AC97 */ - DMA_M2P6 = 8, /* Tx */ - DMA_M2P7 = 9, /* Rx */ -} dma_device_t; - -#define DMA_LENGTH_MAX ((64*1024) - 4) /* bytes */ - -#define DMAC_GCA __REG(DMAC_PHYS + 0x2b80) -#define DMAC_GIR __REG(DMAC_PHYS + 0x2bc0) - -#define DMAC_GIR_MMI1 (1<<11) -#define DMAC_GIR_MMI0 (1<<10) -#define DMAC_GIR_MPI8 (1<<9) -#define DMAC_GIR_MPI9 (1<<8) -#define DMAC_GIR_MPI6 (1<<7) -#define DMAC_GIR_MPI7 (1<<6) -#define DMAC_GIR_MPI4 (1<<5) -#define DMAC_GIR_MPI5 (1<<4) -#define DMAC_GIR_MPI2 (1<<3) -#define DMAC_GIR_MPI3 (1<<2) -#define DMAC_GIR_MPI0 (1<<1) -#define DMAC_GIR_MPI1 (1<<0) - -#define DMAC_M2P0 0x0000 -#define DMAC_M2P1 0x0040 -#define DMAC_M2P2 0x0080 -#define DMAC_M2P3 0x00c0 -#define DMAC_M2P4 0x0240 -#define DMAC_M2P5 0x0200 -#define DMAC_M2P6 0x02c0 -#define DMAC_M2P7 0x0280 -#define DMAC_M2P8 0x0340 -#define DMAC_M2P9 0x0300 -#define DMAC_M2M0 0x0100 -#define DMAC_M2M1 0x0140 - -#define DMAC_P_PCONTROL(c) __REG(DMAC_PHYS + (c) + 0x00) -#define DMAC_P_PINTERRUPT(c) __REG(DMAC_PHYS + (c) + 0x04) -#define DMAC_P_PPALLOC(c) __REG(DMAC_PHYS + (c) + 0x08) -#define DMAC_P_PSTATUS(c) __REG(DMAC_PHYS + (c) + 0x0c) -#define DMAC_P_REMAIN(c) __REG(DMAC_PHYS + (c) + 0x14) -#define DMAC_P_MAXCNT0(c) __REG(DMAC_PHYS + (c) + 0x20) -#define DMAC_P_BASE0(c) __REG(DMAC_PHYS + (c) + 0x24) -#define DMAC_P_CURRENT0(c) __REG(DMAC_PHYS + (c) + 0x28) -#define DMAC_P_MAXCNT1(c) __REG(DMAC_PHYS + (c) + 0x30) -#define DMAC_P_BASE1(c) __REG(DMAC_PHYS + (c) + 0x34) -#define DMAC_P_CURRENT1(c) __REG(DMAC_PHYS + (c) + 0x38) - -#define DMAC_PCONTROL_ENABLE (1<<4) - -#define DMAC_PORT_USB 0 -#define DMAC_PORT_SDMMC 1 -#define DMAC_PORT_AC97_1 2 -#define DMAC_PORT_AC97_2 3 -#define DMAC_PORT_AC97_3 4 -#define DMAC_PORT_UART1 6 -#define DMAC_PORT_UART2 7 -#define DMAC_PORT_UART3 8 - -#define DMAC_PSTATUS_CURRSTATE_SHIFT 4 -#define DMAC_PSTATUS_CURRSTATE_MASK 0x3 - -#define DMAC_PSTATUS_NEXTBUF (1<<6) -#define DMAC_PSTATUS_STALLRINT (1<<0) - -#define DMAC_INT_CHE (1<<3) -#define DMAC_INT_NFB (1<<1) -#define DMAC_INT_STALL (1<<0) diff --git a/include/asm-arm/arch-lh7a40x/entry-macro.S b/include/asm-arm/arch-lh7a40x/entry-macro.S deleted file mode 100644 index 34468e0..0000000 --- a/include/asm-arm/arch-lh7a40x/entry-macro.S +++ /dev/null @@ -1,149 +0,0 @@ -/* - * include/asm-arm/arch-lh7a40x/entry-macro.S - * - * Low-level IRQ helper macros for LH7A40x platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - -/* In order to allow there to be support for both of the processor - classes at the same time, we make a hack here that isn't very - pretty. At startup, the link pointed to with the - branch_irq_lh7a400 symbol is replaced with a NOP when the CPU is - detected as a lh7a404. - - *** FIXME: we should clean this up so that there is only one - implementation for each CPU's design. - -*/ - -#if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404) - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - -branch_irq_lh7a400: b 1000f - -@ Implementation of the LH7A404 get_irqnr_and_base. - - mov \irqnr, #0 @ VIC1 irq base - mov \base, #io_p2v(0x80000000) @ APB registers - add \base, \base, #0x8000 - ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 - ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS - bne 1001f - add \base, \base, #(0xa000 - 0x8000) - ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS - mov \irqnr, #32 @ VIC2 irq base - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits -1008: movs \irqstat, #1 @ Force !Z - str \tmp, [\base, #0x0030] @ Clear vector - b 1009f - -@ Implementation of the LH7A400 get_irqnr_and_base. - -1000: mov \irqnr, #0 - mov \base, #io_p2v(0x80000000) @ APB registers - ldr \irqstat, [\base, #0x500] @ PIC INTSR - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1008: movs \irqstat, #1 @ Force !Z - -1009: - .endm - - - -#elif defined (CONFIG_ARCH_LH7A400) - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqnr, #0 - mov \base, #io_p2v(0x80000000) @ APB registers - ldr \irqstat, [\base, #0x500] @ PIC INTSR - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1008: movs \irqstat, #1 @ Force !Z -1009: - .endm - -#elif defined(CONFIG_ARCH_LH7A404) - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqnr, #0 @ VIC1 irq base - mov \base, #io_p2v(0x80000000) @ APB registers - add \base, \base, #0x8000 - ldr \tmp, [\base, #0x0030] @ VIC1_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - tst \tmp, #VA_VIC1DEFAULT @ Default vectored VIC1 - ldrne \irqstat, [\base, #0] @ VIC1_IRQSTATUS - bne 1001f - add \base, \base, #(0xa000 - 0x8000) - ldr \tmp, [\base, #0x0030] @ VIC2_VECTADDR - tst \tmp, #VA_VECTORED @ Direct vectored - bne 1002f - ldr \irqstat, [\base, #0] @ VIC2_IRQSTATUS - mov \irqnr, #32 @ VIC2 irq base - -1001: movs \irqstat, \irqstat, lsr #1 @ Shift into carry - bcs 1008f @ Bit set; irq found - add \irqnr, \irqnr, #1 - bne 1001b @ Until no bits - b 1009f @ Nothing? Hmm. -1002: and \irqnr, \tmp, #0x3f @ Mask for valid bits -1008: movs \irqstat, #1 @ Force !Z - str \tmp, [\base, #0x0030] @ Clear vector -1009: - .endm -#endif - - diff --git a/include/asm-arm/arch-lh7a40x/hardware.h b/include/asm-arm/arch-lh7a40x/hardware.h deleted file mode 100644 index e9ff74f..0000000 --- a/include/asm-arm/arch-lh7a40x/hardware.h +++ /dev/null @@ -1,62 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/hardware.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * [ Substantially cribbed from include/asm-arm/arch-pxa/hardware.h ] - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include /* Added for the sake of amba-clcd driver */ - -#define io_p2v(x) (0xf0000000 | (((x) & 0xfff00000) >> 4) | ((x) & 0x0000ffff)) -#define io_v2p(x) ( (((x) & 0x0fff0000) << 4) | ((x) & 0x0000ffff)) - -#ifdef __ASSEMBLY__ - -# define __REG(x) io_p2v(x) -# define __PREG(x) io_v2p(x) - -#else - -# if 0 -# define __REG(x) (*((volatile u32 *)io_p2v(x))) -# else -/* - * This __REG() version gives the same results as the one above, except - * that we are fooling gcc somehow so it generates far better and smaller - * assembly code for access to contigous registers. It's a shame that gcc - * doesn't guess this by itself. - */ -#include -typedef struct { volatile u32 offset[4096]; } __regbase; -# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2] -# define __REG(x) __REGP(io_p2v(x)) -typedef struct { volatile u16 offset[4096]; } __regbase16; -# define __REGP16(x) ((__regbase16 *)((x)&~4095))->offset[((x)&4095)>>1] -# define __REG16(x) __REGP16(io_p2v(x)) -typedef struct { volatile u8 offset[4096]; } __regbase8; -# define __REGP8(x) ((__regbase8 *)((x)&~4095))->offset[(x)&4095] -# define __REG8(x) __REGP8(io_p2v(x)) -#endif - -/* Let's kick gcc's ass again... */ -# define __REG2(x,y) \ - ( __builtin_constant_p(y) ? (__REG((x) + (y))) \ - : (*(volatile u32 *)((u32)&__REG(x) + (y))) ) - -# define __PREG(x) (io_v2p((u32)&(x))) - -#endif - -#define MASK_AND_SET(v,m,s) (v) = ((v)&~(m))|(s) - -#include "registers.h" - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h deleted file mode 100644 index 8d591d0..0000000 --- a/include/asm-arm/arch-lh7a40x/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/io.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* No ISA or PCI bus on this machine. */ -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif /* __ASM_ARCH_IO_H */ diff --git a/include/asm-arm/arch-lh7a40x/irqs.h b/include/asm-arm/arch-lh7a40x/irqs.h deleted file mode 100644 index afe8c7c..0000000 --- a/include/asm-arm/arch-lh7a40x/irqs.h +++ /dev/null @@ -1,200 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/irqs.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -/* It is to be seen whether or not we can build a kernel for more than - * one board. For the time being, these macros assume that we cannot. - * Thus, it is OK to ifdef machine/board specific IRQ assignments. - */ - - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - - -#define FIQ_START 80 - -#if defined (CONFIG_ARCH_LH7A400) - - /* FIQs */ - -# define IRQ_GPIO0FIQ 0 /* GPIO External FIQ Interrupt on F0 */ -# define IRQ_BLINT 1 /* Battery Low */ -# define IRQ_WEINT 2 /* Watchdog Timer, WDT overflow */ -# define IRQ_MCINT 3 /* Media Change, MEDCHG pin rising */ - - /* IRQs */ - -# define IRQ_CSINT 4 /* Audio Codec (ACI) */ -# define IRQ_GPIO1INTR 5 /* GPIO External IRQ Interrupt on F1 */ -# define IRQ_GPIO2INTR 6 /* GPIO External IRQ Interrupt on F2 */ -# define IRQ_GPIO3INTR 7 /* GPIO External IRQ Interrupt on F3 */ -# define IRQ_T1UI 8 /* Timer 1 underflow */ -# define IRQ_T2UI 9 /* Timer 2 underflow */ -# define IRQ_RTCMI 10 -# define IRQ_TINTR 11 /* Clock State Controller 64 Hz tick (CSC) */ -# define IRQ_UART1INTR 12 -# define IRQ_UART2INTR 13 -# define IRQ_LCDINTR 14 -# define IRQ_SSIEOT 15 /* Synchronous Serial Interface (SSI) */ -# define IRQ_UART3INTR 16 -# define IRQ_SCIINTR 17 /* Smart Card Interface (SCI) */ -# define IRQ_AACINTR 18 /* Advanced Audio Codec (AAC) */ -# define IRQ_MMCINTR 19 /* Multimedia Card (MMC) */ -# define IRQ_USBINTR 20 -# define IRQ_DMAINTR 21 -# define IRQ_T3UI 22 /* Timer 3 underflow */ -# define IRQ_GPIO4INTR 23 /* GPIO External IRQ Interrupt on F4 */ -# define IRQ_GPIO5INTR 24 /* GPIO External IRQ Interrupt on F5 */ -# define IRQ_GPIO6INTR 25 /* GPIO External IRQ Interrupt on F6 */ -# define IRQ_GPIO7INTR 26 /* GPIO External IRQ Interrupt on F7 */ -# define IRQ_BMIINTR 27 /* Battery Monitor Interface (BMI) */ - -# define NR_IRQ_CPU 28 /* IRQs directly recognized by CPU */ - - /* Given IRQ, return GPIO interrupt number 0-7 */ -# define IRQ_TO_GPIO(i) ((i) \ - - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\ - - (((i) > IRQ_GPIO0INTR) ? IRQ_GPIO1INTR - IRQ_GPIO0INTR - 1 : 0)) - -#endif - -#if defined (CONFIG_ARCH_LH7A404) - -# define IRQ_BROWN 0 /* Brownout */ -# define IRQ_WDTINTR 1 /* Watchdog Timer */ -# define IRQ_COMMRX 2 /* ARM Comm Rx for Debug */ -# define IRQ_COMMTX 3 /* ARM Comm Tx for Debug */ -# define IRQ_T1UI 4 /* Timer 1 underflow */ -# define IRQ_T2UI 5 /* Timer 2 underflow */ -# define IRQ_CSINT 6 /* Codec Interrupt (shared by AAC on 404) */ -# define IRQ_DMAM2P0 7 /* -- DMA Memory to Peripheral */ -# define IRQ_DMAM2P1 8 -# define IRQ_DMAM2P2 9 -# define IRQ_DMAM2P3 10 -# define IRQ_DMAM2P4 11 -# define IRQ_DMAM2P5 12 -# define IRQ_DMAM2P6 13 -# define IRQ_DMAM2P7 14 -# define IRQ_DMAM2P8 15 -# define IRQ_DMAM2P9 16 -# define IRQ_DMAM2M0 17 /* -- DMA Memory to Memory */ -# define IRQ_DMAM2M1 18 -# define IRQ_GPIO0INTR 19 /* -- GPIOF Interrupt */ -# define IRQ_GPIO1INTR 20 -# define IRQ_GPIO2INTR 21 -# define IRQ_GPIO3INTR 22 -# define IRQ_SOFT_V1_23 23 /* -- Unassigned */ -# define IRQ_SOFT_V1_24 24 -# define IRQ_SOFT_V1_25 25 -# define IRQ_SOFT_V1_26 26 -# define IRQ_SOFT_V1_27 27 -# define IRQ_SOFT_V1_28 28 -# define IRQ_SOFT_V1_29 29 -# define IRQ_SOFT_V1_30 30 -# define IRQ_SOFT_V1_31 31 - -# define IRQ_BLINT 32 /* Battery Low */ -# define IRQ_BMIINTR 33 /* Battery Monitor */ -# define IRQ_MCINTR 34 /* Media Change */ -# define IRQ_TINTR 35 /* 64Hz Tick */ -# define IRQ_WEINT 36 /* Watchdog Expired */ -# define IRQ_RTCMI 37 /* Real-time Clock Match */ -# define IRQ_UART1INTR 38 /* UART1 Interrupt (including error) */ -# define IRQ_UART1ERR 39 /* UART1 Error */ -# define IRQ_UART2INTR 40 /* UART2 Interrupt (including error) */ -# define IRQ_UART2ERR 41 /* UART2 Error */ -# define IRQ_UART3INTR 42 /* UART3 Interrupt (including error) */ -# define IRQ_UART3ERR 43 /* UART3 Error */ -# define IRQ_SCIINTR 44 /* Smart Card */ -# define IRQ_TSCINTR 45 /* Touchscreen */ -# define IRQ_KMIINTR 46 /* Keyboard/Mouse (PS/2) */ -# define IRQ_GPIO4INTR 47 /* -- GPIOF Interrupt */ -# define IRQ_GPIO5INTR 48 -# define IRQ_GPIO6INTR 49 -# define IRQ_GPIO7INTR 50 -# define IRQ_T3UI 51 /* Timer 3 underflow */ -# define IRQ_LCDINTR 52 /* LCD Controller */ -# define IRQ_SSPINTR 53 /* Synchronous Serial Port */ -# define IRQ_SDINTR 54 /* Secure Digital Port (MMC) */ -# define IRQ_USBINTR 55 /* USB Device Port */ -# define IRQ_USHINTR 56 /* USB Host Port */ -# define IRQ_SOFT_V2_25 57 /* -- Unassigned */ -# define IRQ_SOFT_V2_26 58 -# define IRQ_SOFT_V2_27 59 -# define IRQ_SOFT_V2_28 60 -# define IRQ_SOFT_V2_29 61 -# define IRQ_SOFT_V2_30 62 -# define IRQ_SOFT_V2_31 63 - -# define NR_IRQ_CPU 64 /* IRQs directly recognized by CPU */ - - /* Given IRQ, return GPIO interrupt number 0-7 */ -# define IRQ_TO_GPIO(i) ((i) \ - - (((i) > IRQ_GPIO3INTR) ? IRQ_GPIO4INTR - IRQ_GPIO3INTR - 1 : 0)\ - - IRQ_GPIO0INTR) - - /* Vector Address constants */ -# define VA_VECTORED 0x100 /* Set for vectored interrupt */ -# define VA_VIC1DEFAULT 0x200 /* Set as default VECTADDR for VIC1 */ -# define VA_VIC2DEFAULT 0x400 /* Set as default VECTADDR for VIC2 */ - -#endif - - /* IRQ aliases */ - -#if !defined (IRQ_GPIO0INTR) -# define IRQ_GPIO0INTR IRQ_GPIO0FIQ -#endif -#define IRQ_TICK IRQ_TINTR -#define IRQ_PCC1_RDY IRQ_GPIO6INTR /* PCCard 1 ready */ -#define IRQ_PCC2_RDY IRQ_GPIO7INTR /* PCCard 2 ready */ -#define IRQ_USB IRQ_USBINTR /* USB device */ - -#ifdef CONFIG_MACH_KEV7A400 -# define IRQ_TS IRQ_GPIOFIQ /* Touchscreen */ -# define IRQ_CPLD IRQ_GPIO1INTR /* CPLD cascade */ -# define IRQ_PCC1_CD IRQ_GPIO_F2 /* PCCard 1 card detect */ -# define IRQ_PCC2_CD IRQ_GPIO_F3 /* PCCard 2 card detect */ -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define IRQ_CPLD_V28 IRQ_GPIO7INTR /* CPLD cascade through GPIO_PF7 */ -# define IRQ_CPLD_V34 IRQ_GPIO3INTR /* CPLD cascade through GPIO_PF3 */ -#endif - - /* System specific IRQs */ - -#define IRQ_BOARD_START NR_IRQ_CPU - -#ifdef CONFIG_MACH_KEV7A400 -# define IRQ_KEV7A400_CPLD IRQ_BOARD_START -# define NR_IRQ_BOARD 5 -# define IRQ_KEV7A400_MMC_CD IRQ_KEV7A400_CPLD + 0 /* MMC Card Detect */ -# define IRQ_KEV7A400_RI2 IRQ_KEV7A400_CPLD + 1 /* Ring Indicator 2 */ -# define IRQ_KEV7A400_IDE_CF IRQ_KEV7A400_CPLD + 2 /* Compact Flash (?) */ -# define IRQ_KEV7A400_ETH_INT IRQ_KEV7A400_CPLD + 3 /* Ethernet chip */ -# define IRQ_KEV7A400_INT IRQ_KEV7A400_CPLD + 4 -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) -# define IRQ_LPD7A40X_CPLD IRQ_BOARD_START -# define NR_IRQ_BOARD 2 -# define IRQ_LPD7A40X_ETH_INT IRQ_LPD7A40X_CPLD + 0 /* Ethernet chip */ -# define IRQ_LPD7A400_TS IRQ_LPD7A40X_CPLD + 1 /* Touch screen */ -#endif - -#if defined (CONFIG_MACH_LPD7A400) -# define IRQ_TOUCH IRQ_LPD7A400_TS -#endif - -#define NR_IRQS (NR_IRQ_CPU + NR_IRQ_BOARD) - -#endif diff --git a/include/asm-arm/arch-lh7a40x/memory.h b/include/asm-arm/arch-lh7a40x/memory.h deleted file mode 100644 index 9b0c801..0000000 --- a/include/asm-arm/arch-lh7a40x/memory.h +++ /dev/null @@ -1,76 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/memory.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * - * Refer to for more information. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0xc0000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#ifdef CONFIG_DISCONTIGMEM - -/* - * Given a kernel address, find the home node of the underlying memory. - */ - -# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE -# define KVADDR_TO_NID(addr) \ - ( ((((unsigned long) (addr) - PAGE_OFFSET) >> 24) & 1)\ - | ((((unsigned long) (addr) - PAGE_OFFSET) >> 25) & ~1)) -# else /* 2 banks per node */ -# define KVADDR_TO_NID(addr) \ - (((unsigned long) (addr) - PAGE_OFFSET) >> 26) -# endif - -/* - * Given a page frame number, convert it to a node id. - */ - -# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE -# define PFN_TO_NID(pfn) \ - (((((pfn) - PHYS_PFN_OFFSET) >> (24 - PAGE_SHIFT)) & 1)\ - | ((((pfn) - PHYS_PFN_OFFSET) >> (25 - PAGE_SHIFT)) & ~1)) -# else /* 2 banks per node */ -# define PFN_TO_NID(pfn) \ - (((pfn) - PHYS_PFN_OFFSET) >> (26 - PAGE_SHIFT)) -#endif - -/* - * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory - * and returns the index corresponding to the appropriate page in the - * node's mem_map. - */ - -# ifdef CONFIG_LH7A40X_ONE_BANK_PER_NODE -# define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & 0x003fffff) >> PAGE_SHIFT) -# else /* 2 banks per node */ -# define LOCAL_MAP_NR(addr) \ - (((unsigned long)(addr) & 0x01ffffff) >> PAGE_SHIFT) -# endif - -#endif - -#endif diff --git a/include/asm-arm/arch-lh7a40x/registers.h b/include/asm-arm/arch-lh7a40x/registers.h deleted file mode 100644 index b4f09b3..0000000 --- a/include/asm-arm/arch-lh7a40x/registers.h +++ /dev/null @@ -1,224 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/registers.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * Copyright (C) 2004 Logic Product Development - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include - -#ifndef __ASM_ARCH_REGISTERS_H -#define __ASM_ARCH_REGISTERS_H - - - /* Physical register base addresses */ - -#define AC97C_PHYS (0x80000000) /* AC97 Controller */ -#define MMC_PHYS (0x80000100) /* Multimedia Card Controller */ -#define USB_PHYS (0x80000200) /* USB Client */ -#define SCI_PHYS (0x80000300) /* Secure Card Interface */ -#define CSC_PHYS (0x80000400) /* Clock/State Controller */ -#define INTC_PHYS (0x80000500) /* Interrupt Controller */ -#define UART1_PHYS (0x80000600) /* UART1 Controller */ -#define SIR_PHYS (0x80000600) /* IR Controller, same are UART1 */ -#define UART2_PHYS (0x80000700) /* UART2 Controller */ -#define UART3_PHYS (0x80000800) /* UART3 Controller */ -#define DCDC_PHYS (0x80000900) /* DC to DC Controller */ -#define ACI_PHYS (0x80000a00) /* Audio Codec Interface */ -#define SSP_PHYS (0x80000b00) /* Synchronous ... */ -#define TIMER_PHYS (0x80000c00) /* Timer Controller */ -#define RTC_PHYS (0x80000d00) /* Real-time Clock */ -#define GPIO_PHYS (0x80000e00) /* General Purpose IO */ -#define BMI_PHYS (0x80000f00) /* Battery Monitor Interface */ -#define HRTFTC_PHYS (0x80001000) /* High-res TFT Controller (LH7A400) */ -#define ALI_PHYS (0x80001000) /* Advanced LCD Interface (LH7A404) */ -#define WDT_PHYS (0x80001400) /* Watchdog Timer */ -#define SMC_PHYS (0x80002000) /* Static Memory Controller */ -#define SDRC_PHYS (0x80002400) /* SDRAM Controller */ -#define DMAC_PHYS (0x80002800) /* DMA Controller */ -#define CLCDC_PHYS (0x80003000) /* Color LCD Controller */ - - /* Physical registers of the LH7A404 */ - -#define ADC_PHYS (0x80001300) /* A/D & Touchscreen Controller */ -#define VIC1_PHYS (0x80008000) /* Vectored Interrupt Controller 1 */ -#define USBH_PHYS (0x80009000) /* USB OHCI host controller */ -#define VIC2_PHYS (0x8000a000) /* Vectored Interrupt Controller 2 */ - -/*#define KBD_PHYS (0x80000e00) */ -/*#define LCDICP_PHYS (0x80001000) */ - - - /* Clock/State Controller register */ - -#define CSC_PWRSR __REG(CSC_PHYS + 0x00) /* Reset register & ID */ -#define CSC_PWRCNT __REG(CSC_PHYS + 0x04) /* Power control */ -#define CSC_CLKSET __REG(CSC_PHYS + 0x20) /* Clock speed control */ -#define CSC_USBDRESET __REG(CSC_PHYS + 0x4c) /* USB Device resets */ - -#define CSC_PWRCNT_USBH_EN (1<<28) /* USB Host power enable */ -#define CSC_PWRCNT_DMAC_M2M1_EN (1<<27) -#define CSC_PWRCNT_DMAC_M2M0_EN (1<<26) -#define CSC_PWRCNT_DMAC_M2P8_EN (1<<25) -#define CSC_PWRCNT_DMAC_M2P9_EN (1<<24) -#define CSC_PWRCNT_DMAC_M2P6_EN (1<<23) -#define CSC_PWRCNT_DMAC_M2P7_EN (1<<22) -#define CSC_PWRCNT_DMAC_M2P4_EN (1<<21) -#define CSC_PWRCNT_DMAC_M2P5_EN (1<<20) -#define CSC_PWRCNT_DMAC_M2P2_EN (1<<19) -#define CSC_PWRCNT_DMAC_M2P3_EN (1<<18) -#define CSC_PWRCNT_DMAC_M2P0_EN (1<<17) -#define CSC_PWRCNT_DMAC_M2P1_EN (1<<16) - -#define CSC_PWRSR_CHIPMAN_SHIFT (24) -#define CSC_PWRSR_CHIPMAN_MASK (0xff) -#define CSC_PWRSR_CHIPID_SHIFT (16) -#define CSC_PWRSR_CHIPID_MASK (0xff) - -#define CSC_USBDRESET_APBRESETREG (1<<1) -#define CSC_USBDRESET_IORESETREG (1<<0) - - /* Interrupt Controller registers */ - -#define INTC_INTSR __REG(INTC_PHYS + 0x00) /* Status */ -#define INTC_INTRSR __REG(INTC_PHYS + 0x04) /* Raw Status */ -#define INTC_INTENS __REG(INTC_PHYS + 0x08) /* Enable Set */ -#define INTC_INTENC __REG(INTC_PHYS + 0x0c) /* Enable Clear */ - - - /* Vectored Interrupted Controller registers */ - -#define VIC1_IRQSTATUS __REG(VIC1_PHYS + 0x00) -#define VIC1_FIQSTATUS __REG(VIC1_PHYS + 0x04) -#define VIC1_RAWINTR __REG(VIC1_PHYS + 0x08) -#define VIC1_INTSEL __REG(VIC1_PHYS + 0x0c) -#define VIC1_INTEN __REG(VIC1_PHYS + 0x10) -#define VIC1_INTENCLR __REG(VIC1_PHYS + 0x14) -#define VIC1_SOFTINT __REG(VIC1_PHYS + 0x18) -#define VIC1_SOFTINTCLR __REG(VIC1_PHYS + 0x1c) -#define VIC1_PROTECT __REG(VIC1_PHYS + 0x20) -#define VIC1_VECTADDR __REG(VIC1_PHYS + 0x30) -#define VIC1_NVADDR __REG(VIC1_PHYS + 0x34) -#define VIC1_VAD0 __REG(VIC1_PHYS + 0x100) -#define VIC1_VECTCNTL0 __REG(VIC1_PHYS + 0x200) -#define VIC2_IRQSTATUS __REG(VIC2_PHYS + 0x00) -#define VIC2_FIQSTATUS __REG(VIC2_PHYS + 0x04) -#define VIC2_RAWINTR __REG(VIC2_PHYS + 0x08) -#define VIC2_INTSEL __REG(VIC2_PHYS + 0x0c) -#define VIC2_INTEN __REG(VIC2_PHYS + 0x10) -#define VIC2_INTENCLR __REG(VIC2_PHYS + 0x14) -#define VIC2_SOFTINT __REG(VIC2_PHYS + 0x18) -#define VIC2_SOFTINTCLR __REG(VIC2_PHYS + 0x1c) -#define VIC2_PROTECT __REG(VIC2_PHYS + 0x20) -#define VIC2_VECTADDR __REG(VIC2_PHYS + 0x30) -#define VIC2_NVADDR __REG(VIC2_PHYS + 0x34) -#define VIC2_VAD0 __REG(VIC2_PHYS + 0x100) -#define VIC2_VECTCNTL0 __REG(VIC2_PHYS + 0x200) - -#define VIC_CNTL_ENABLE (0x20) - - /* USB Host registers (Open HCI compatible) */ - -#define USBH_CMDSTATUS __REG(USBH_PHYS + 0x08) - - - /* GPIO registers */ - -#define GPIO_INTTYPE1 __REG(GPIO_PHYS + 0x4c) /* Interrupt Type 1 (Edge) */ -#define GPIO_INTTYPE2 __REG(GPIO_PHYS + 0x50) /* Interrupt Type 2 */ -#define GPIO_GPIOFEOI __REG(GPIO_PHYS + 0x54) /* GPIO End-of-Interrupt */ -#define GPIO_GPIOINTEN __REG(GPIO_PHYS + 0x58) /* GPIO Interrupt Enable */ -#define GPIO_INTSTATUS __REG(GPIO_PHYS + 0x5c) /* GPIO Interrupt Status */ -#define GPIO_PINMUX __REG(GPIO_PHYS + 0x2c) -#define GPIO_PADD __REG(GPIO_PHYS + 0x10) -#define GPIO_PAD __REG(GPIO_PHYS + 0x00) -#define GPIO_PCD __REG(GPIO_PHYS + 0x08) -#define GPIO_PCDD __REG(GPIO_PHYS + 0x18) -#define GPIO_PEDD __REG(GPIO_PHYS + 0x24) -#define GPIO_PED __REG(GPIO_PHYS + 0x20) - - - /* Static Memory Controller registers */ - -#define SMC_BCR0 __REG(SMC_PHYS + 0x00) /* Bank 0 Configuration */ -#define SMC_BCR1 __REG(SMC_PHYS + 0x04) /* Bank 1 Configuration */ -#define SMC_BCR2 __REG(SMC_PHYS + 0x08) /* Bank 2 Configuration */ -#define SMC_BCR3 __REG(SMC_PHYS + 0x0C) /* Bank 3 Configuration */ -#define SMC_BCR6 __REG(SMC_PHYS + 0x18) /* Bank 6 Configuration */ -#define SMC_BCR7 __REG(SMC_PHYS + 0x1c) /* Bank 7 Configuration */ - - -#ifdef CONFIG_MACH_KEV7A400 -# define CPLD_RD_OPT_DIP_SW __REG16(CPLD_PHYS + 0x00) /* Read Option SW */ -# define CPLD_WR_IO_BRD_CTL __REG16(CPLD_PHYS + 0x00) /* Write Control */ -# define CPLD_RD_PB_KEYS __REG16(CPLD_PHYS + 0x02) /* Read Btn Keys */ -# define CPLD_LATCHED_INTS __REG16(CPLD_PHYS + 0x04) /* Read INTR stat. */ -# define CPLD_CL_INT __REG16(CPLD_PHYS + 0x04) /* Clear INTR stat */ -# define CPLD_BOOT_MMC_STATUS __REG16(CPLD_PHYS + 0x06) /* R/O */ -# define CPLD_RD_KPD_ROW_SENSE __REG16(CPLD_PHYS + 0x08) -# define CPLD_WR_PB_INT_MASK __REG16(CPLD_PHYS + 0x08) -# define CPLD_RD_BRD_DISP_SW __REG16(CPLD_PHYS + 0x0a) -# define CPLD_WR_EXT_INT_MASK __REG16(CPLD_PHYS + 0x0a) -# define CPLD_LCD_PWR_CNTL __REG16(CPLD_PHYS + 0x0c) -# define CPLD_SEVEN_SEG __REG16(CPLD_PHYS + 0x0e) /* 7 seg. LED mask */ - -#endif - -#if defined (CONFIG_MACH_LPD7A400) || defined (CONFIG_MACH_LPD7A404) - -# define CPLD_CONTROL __REG16(CPLD02_PHYS) -# define CPLD_SPI_DATA __REG16(CPLD06_PHYS) -# define CPLD_SPI_CONTROL __REG16(CPLD08_PHYS) -# define CPLD_SPI_EEPROM __REG16(CPLD0A_PHYS) -# define CPLD_INTERRUPTS __REG16(CPLD0C_PHYS) /* IRQ mask/status */ -# define CPLD_BOOT_MODE __REG16(CPLD0E_PHYS) -# define CPLD_FLASH __REG16(CPLD10_PHYS) -# define CPLD_POWER_MGMT __REG16(CPLD12_PHYS) -# define CPLD_REVISION __REG16(CPLD14_PHYS) -# define CPLD_GPIO_EXT __REG16(CPLD16_PHYS) -# define CPLD_GPIO_DATA __REG16(CPLD18_PHYS) -# define CPLD_GPIO_DIR __REG16(CPLD1A_PHYS) - -#endif - - /* Timer registers */ - -#define TIMER_LOAD1 __REG(TIMER_PHYS + 0x00) /* Timer 1 initial value */ -#define TIMER_VALUE1 __REG(TIMER_PHYS + 0x04) /* Timer 1 current value */ -#define TIMER_CONTROL1 __REG(TIMER_PHYS + 0x08) /* Timer 1 control word */ -#define TIMER_EOI1 __REG(TIMER_PHYS + 0x0c) /* Timer 1 interrupt clear */ - -#define TIMER_LOAD2 __REG(TIMER_PHYS + 0x20) /* Timer 2 initial value */ -#define TIMER_VALUE2 __REG(TIMER_PHYS + 0x24) /* Timer 2 current value */ -#define TIMER_CONTROL2 __REG(TIMER_PHYS + 0x28) /* Timer 2 control word */ -#define TIMER_EOI2 __REG(TIMER_PHYS + 0x2c) /* Timer 2 interrupt clear */ - -#define TIMER_BUZZCON __REG(TIMER_PHYS + 0x40) /* Buzzer configuration */ - -#define TIMER_LOAD3 __REG(TIMER_PHYS + 0x80) /* Timer 3 initial value */ -#define TIMER_VALUE3 __REG(TIMER_PHYS + 0x84) /* Timer 3 current value */ -#define TIMER_CONTROL3 __REG(TIMER_PHYS + 0x88) /* Timer 3 control word */ -#define TIMER_EOI3 __REG(TIMER_PHYS + 0x8c) /* Timer 3 interrupt clear */ - -#define TIMER_C_ENABLE (1<<7) -#define TIMER_C_PERIODIC (1<<6) -#define TIMER_C_FREERUNNING (0) -#define TIMER_C_2KHZ (0x00) /* 1.986 kHz */ -#define TIMER_C_508KHZ (0x08) - - /* GPIO registers */ - -#define GPIO_PFDD __REG(GPIO_PHYS + 0x34) /* PF direction */ -#define GPIO_INTTYPE1 __REG(GPIO_PHYS + 0x4c) /* IRQ edge or lvl */ -#define GPIO_INTTYPE2 __REG(GPIO_PHYS + 0x50) /* IRQ activ hi/lo */ -#define GPIO_GPIOFEOI __REG(GPIO_PHYS + 0x54) /* GPIOF end of IRQ */ -#define GPIO_GPIOFINTEN __REG(GPIO_PHYS + 0x58) /* GPIOF IRQ enable */ -#define GPIO_INTSTATUS __REG(GPIO_PHYS + 0x5c) /* GPIOF IRQ latch */ -#define GPIO_RAWINTSTATUS __REG(GPIO_PHYS + 0x60) /* GPIOF IRQ raw */ - - -#endif /* _ASM_ARCH_REGISTERS_H */ diff --git a/include/asm-arm/arch-lh7a40x/ssp.h b/include/asm-arm/arch-lh7a40x/ssp.h deleted file mode 100644 index 132b1c4..0000000 --- a/include/asm-arm/arch-lh7a40x/ssp.h +++ /dev/null @@ -1,71 +0,0 @@ -/* ssp.h - $Id$ - - written by Marc Singer - 6 Dec 2004 - - Copyright (C) 2004 Marc Singer - - ----------- - DESCRIPTION - ----------- - - This SSP header is available throughout the kernel, for this - machine/architecture, because drivers that use it may be dispersed. - - This file was cloned from the 7952x implementation. It would be - better to share them, but we're taking an easier approach for the - time being. - -*/ - -#if !defined (__SSP_H__) -# define __SSP_H__ - -/* ----- Includes */ - -/* ----- Types */ - -struct ssp_driver { - int (*init) (void); - void (*exit) (void); - void (*acquire) (void); - void (*release) (void); - int (*configure) (int device, int mode, int speed, - int frame_size_write, int frame_size_read); - void (*chip_select) (int enable); - void (*set_callbacks) (void* handle, - irqreturn_t (*callback_tx)(void*), - irqreturn_t (*callback_rx)(void*)); - void (*enable) (void); - void (*disable) (void); -// int (*save_state) (void*); -// void (*restore_state) (void*); - int (*read) (void); - int (*write) (u16 data); - int (*write_read) (u16 data); - void (*flush) (void); - void (*write_async) (void* pv, size_t cb); - size_t (*write_pos) (void); -}; - - /* These modes are only available on the LH79524 */ -#define SSP_MODE_SPI (1) -#define SSP_MODE_SSI (2) -#define SSP_MODE_MICROWIRE (3) -#define SSP_MODE_I2S (4) - - /* CPLD SPI devices */ -#define DEVICE_EEPROM 0 /* Configuration eeprom */ -#define DEVICE_MAC 1 /* MAC eeprom (LPD79524) */ -#define DEVICE_CODEC 2 /* Audio codec */ -#define DEVICE_TOUCH 3 /* Touch screen (LPD79520) */ - -/* ----- Globals */ - -/* ----- Prototypes */ - -//extern struct ssp_driver lh79520_i2s_driver; -extern struct ssp_driver lh7a400_cpld_ssp_driver; - -#endif /* __SSP_H__ */ diff --git a/include/asm-arm/arch-lh7a40x/system.h b/include/asm-arm/arch-lh7a40x/system.h deleted file mode 100644 index e1df8aa..0000000 --- a/include/asm-arm/arch-lh7a40x/system.h +++ /dev/null @@ -1,19 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/system.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -static inline void arch_idle(void) -{ - cpu_do_idle (); -} - -static inline void arch_reset(char mode) -{ - cpu_reset (0); -} diff --git a/include/asm-arm/arch-lh7a40x/timex.h b/include/asm-arm/arch-lh7a40x/timex.h deleted file mode 100644 index fa726b6..0000000 --- a/include/asm-arm/arch-lh7a40x/timex.h +++ /dev/null @@ -1,17 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/timex.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include - -#define CLOCK_TICK_RATE (PLL_CLOCK/6/16) - -/* -#define CLOCK_TICK_RATE 3686400 -*/ diff --git a/include/asm-arm/arch-lh7a40x/uncompress.h b/include/asm-arm/arch-lh7a40x/uncompress.h deleted file mode 100644 index 3d1ce04..0000000 --- a/include/asm-arm/arch-lh7a40x/uncompress.h +++ /dev/null @@ -1,38 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/uncompress.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ - -#include - -#ifndef UART_R_DATA -# define UART_R_DATA (0x00) -#endif -#ifndef UART_R_STATUS -# define UART_R_STATUS (0x10) -#endif -#define nTxRdy (0x20) /* Not TxReady (literally Tx FIFO full) */ - - /* Access UART with physical addresses before MMU is setup */ -#define UART_STATUS (*(volatile unsigned long*) (UART2_PHYS + UART_R_STATUS)) -#define UART_DATA (*(volatile unsigned long*) (UART2_PHYS + UART_R_DATA)) - -static inline void putc(int ch) -{ - while (UART_STATUS & nTxRdy) - barrier(); - UART_DATA = ch; -} - -static inline void flush(void) -{ -} - - /* NULL functions; we don't presently need them */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-lh7a40x/vmalloc.h b/include/asm-arm/arch-lh7a40x/vmalloc.h deleted file mode 100644 index 8163e45..0000000 --- a/include/asm-arm/arch-lh7a40x/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* include/asm-arm/arch-lh7a40x/vmalloc.h - * - * Copyright (C) 2004 Coastal Environmental Systems - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - */ -#define VMALLOC_END (0xe8000000) diff --git a/include/asm-arm/arch-loki/debug-macro.S b/include/asm-arm/arch-loki/debug-macro.S deleted file mode 100644 index 585502e..0000000 --- a/include/asm-arm/arch-loki/debug-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-loki/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =LOKI_REGS_PHYS_BASE - ldrne \rx, =LOKI_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-loki/dma.h b/include/asm-arm/arch-loki/dma.h deleted file mode 100644 index 40a8c17..0000000 --- a/include/asm-arm/arch-loki/dma.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/include/asm-arm/arch-loki/entry-macro.S b/include/asm-arm/arch-loki/entry-macro.S deleted file mode 100644 index 693257c..0000000 --- a/include/asm-arm/arch-loki/entry-macro.S +++ /dev/null @@ -1,30 +0,0 @@ -/* - * include/asm-arm/arch-loki/entry-macro.S - * - * Low-level IRQ helper macros for Marvell Loki (88RC8480) platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #IRQ_CAUSE_OFF] - ldr \tmp, [\base, #IRQ_MASK_OFF] - mov \irqnr, #0 - ands \irqstat, \irqstat, \tmp - clzne \irqnr, \irqstat - rsbne \irqnr, \irqnr, #31 - .endm diff --git a/include/asm-arm/arch-loki/hardware.h b/include/asm-arm/arch-loki/hardware.h deleted file mode 100644 index f65b01c..0000000 --- a/include/asm-arm/arch-loki/hardware.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * include/asm-arm/arch-loki/hardware.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "loki.h" - - -#endif diff --git a/include/asm-arm/arch-loki/io.h b/include/asm-arm/arch-loki/io.h deleted file mode 100644 index e7418a9..0000000 --- a/include/asm-arm/arch-loki/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-loki/io.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "loki.h" - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)((addr - LOKI_PCIE0_IO_PHYS_BASE) - + LOKI_PCIE0_IO_VIRT_BASE); -} - -#define __io(a) __io(a) -#define __mem_pci(a) (a) - - -#endif diff --git a/include/asm-arm/arch-loki/irqs.h b/include/asm-arm/arch-loki/irqs.h deleted file mode 100644 index 7e49714..0000000 --- a/include/asm-arm/arch-loki/irqs.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * include/asm-arm/arch-loki/irqs.h - * - * IRQ definitions for Marvell Loki (88RC8480) SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include "loki.h" /* need GPIO_MAX */ - -/* - * Interrupt Controller - */ -#define IRQ_LOKI_PCIE_A_CPU_DRBL 0 -#define IRQ_LOKI_CPU_PCIE_A_DRBL 1 -#define IRQ_LOKI_PCIE_B_CPU_DRBL 2 -#define IRQ_LOKI_CPU_PCIE_B_DRBL 3 -#define IRQ_LOKI_COM_A_ERR 6 -#define IRQ_LOKI_COM_A_IN 7 -#define IRQ_LOKI_COM_A_OUT 8 -#define IRQ_LOKI_COM_B_ERR 9 -#define IRQ_LOKI_COM_B_IN 10 -#define IRQ_LOKI_COM_B_OUT 11 -#define IRQ_LOKI_DMA_A 12 -#define IRQ_LOKI_DMA_B 13 -#define IRQ_LOKI_SAS_A 14 -#define IRQ_LOKI_SAS_B 15 -#define IRQ_LOKI_DDR 16 -#define IRQ_LOKI_XOR 17 -#define IRQ_LOKI_BRIDGE 18 -#define IRQ_LOKI_PCIE_A_ERR 20 -#define IRQ_LOKI_PCIE_A_INT 21 -#define IRQ_LOKI_PCIE_B_ERR 22 -#define IRQ_LOKI_PCIE_B_INT 23 -#define IRQ_LOKI_GBE_A_INT 24 -#define IRQ_LOKI_GBE_B_INT 25 -#define IRQ_LOKI_DEV_ERR 26 -#define IRQ_LOKI_UART0 27 -#define IRQ_LOKI_UART1 28 -#define IRQ_LOKI_TWSI 29 -#define IRQ_LOKI_GPIO_23_0 30 -#define IRQ_LOKI_GPIO_25_24 31 - -/* - * Loki General Purpose Pins - */ -#define IRQ_LOKI_GPIO_START 32 -#define NR_GPIO_IRQS GPIO_MAX - -#define NR_IRQS (IRQ_LOKI_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/include/asm-arm/arch-loki/loki.h b/include/asm-arm/arch-loki/loki.h deleted file mode 100644 index 5dd05ee..0000000 --- a/include/asm-arm/arch-loki/loki.h +++ /dev/null @@ -1,97 +0,0 @@ -/* - * include/asm-arm/arch-loki/loki.h - * - * Generic definitions for Marvell Loki (88RC8480) SoC flavors - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_LOKI_H -#define __ASM_ARCH_LOKI_H - -/* - * Marvell Loki (88RC8480) address maps. - * - * phys - * d0000000 on-chip peripheral registers - * e0000000 PCIe 0 Memory space - * e8000000 PCIe 1 Memory space - * f0000000 PCIe 0 I/O space - * f0100000 PCIe 1 I/O space - * - * virt phys size - * fed00000 d0000000 1M on-chip peripheral registers - * fee00000 f0000000 64K PCIe 0 I/O space - * fef00000 f0100000 64K PCIe 1 I/O space - */ - -#define LOKI_REGS_PHYS_BASE 0xd0000000 -#define LOKI_REGS_VIRT_BASE 0xfed00000 -#define LOKI_REGS_SIZE SZ_1M - -#define LOKI_PCIE0_IO_PHYS_BASE 0xf0000000 -#define LOKI_PCIE0_IO_VIRT_BASE 0xfee00000 -#define LOKI_PCIE0_IO_BUS_BASE 0x00000000 -#define LOKI_PCIE0_IO_SIZE SZ_64K - -#define LOKI_PCIE1_IO_PHYS_BASE 0xf0100000 -#define LOKI_PCIE1_IO_VIRT_BASE 0xfef00000 -#define LOKI_PCIE1_IO_BUS_BASE 0x00000000 -#define LOKI_PCIE1_IO_SIZE SZ_64K - -#define LOKI_PCIE0_MEM_PHYS_BASE 0xe0000000 -#define LOKI_PCIE0_MEM_SIZE SZ_128M - -#define LOKI_PCIE1_MEM_PHYS_BASE 0xe8000000 -#define LOKI_PCIE1_MEM_SIZE SZ_128M - -/* - * Register Map - */ -#define DEV_BUS_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x10000) -#define DEV_BUS_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x10000) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) - -#define BRIDGE_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x20000) -#define BRIDGE_REG(x) (BRIDGE_VIRT_BASE | (x)) -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR 0x0004 -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_OFF 0x0000 -#define IRQ_MASK_OFF 0x0004 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) - -#define PCIE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x30000) - -#define PCIE1_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0x40000) - -#define SAS0_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x80000) - -#define SAS1_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0x90000) - -#define GE0_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0xa0000) -#define GE0_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xa0000) - -#define GE1_PHYS_BASE (LOKI_REGS_PHYS_BASE | 0xb0000) -#define GE1_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xb0000) - -#define DDR_VIRT_BASE (LOKI_REGS_VIRT_BASE | 0xf0000) -#define DDR_REG(x) (DDR_VIRT_BASE | (x)) - - -#define GPIO_MAX 8 - - -#endif diff --git a/include/asm-arm/arch-loki/memory.h b/include/asm-arm/arch-loki/memory.h deleted file mode 100644 index 835101e..0000000 --- a/include/asm-arm/arch-loki/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-arm/arch-loki/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - - -#endif diff --git a/include/asm-arm/arch-loki/system.h b/include/asm-arm/arch-loki/system.h deleted file mode 100644 index a3568ac..0000000 --- a/include/asm-arm/arch-loki/system.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-loki/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - -#endif diff --git a/include/asm-arm/arch-loki/timex.h b/include/asm-arm/arch-loki/timex.h deleted file mode 100644 index 940014f..0000000 --- a/include/asm-arm/arch-loki/timex.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * include/asm-arm/arch-loki/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) - -#define LOKI_TCLK 180000000 diff --git a/include/asm-arm/arch-loki/uncompress.h b/include/asm-arm/arch-loki/uncompress.h deleted file mode 100644 index 89a0cf8..0000000 --- a/include/asm-arm/arch-loki/uncompress.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-loki/uncompress.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-loki/vmalloc.h b/include/asm-arm/arch-loki/vmalloc.h deleted file mode 100644 index f5be062..0000000 --- a/include/asm-arm/arch-loki/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-loki/vmalloc.h - */ - -#define VMALLOC_END 0xfe800000 diff --git a/include/asm-arm/arch-msm/board.h b/include/asm-arm/arch-msm/board.h deleted file mode 100644 index 763051f..0000000 --- a/include/asm-arm/arch-msm/board.h +++ /dev/null @@ -1,37 +0,0 @@ -/* linux/include/asm-arm/arch-msm/board.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_BOARD_H -#define __ASM_ARCH_MSM_BOARD_H - -#include - -/* platform device data structures */ - -struct msm_mddi_platform_data -{ - void (*panel_power)(int on); - unsigned has_vsync_irq:1; -}; - -/* common init routines for use by arch/arm/mach-msm/board-*.c */ - -void __init msm_add_devices(void); -void __init msm_map_common_io(void); -void __init msm_init_irq(void); -void __init msm_init_gpio(void); - -#endif diff --git a/include/asm-arm/arch-msm/debug-macro.S b/include/asm-arm/arch-msm/debug-macro.S deleted file mode 100644 index e131b44..0000000 --- a/include/asm-arm/arch-msm/debug-macro.S +++ /dev/null @@ -1,40 +0,0 @@ -/* include/asm-arm/arch-msm7200/debug-macro.S - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include - - .macro addruart,rx - @ see if the MMU is enabled and select appropriate base address - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, =MSM_UART1_PHYS - ldrne \rx, =MSM_UART1_BASE - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x0C] - .endm - - .macro waituart,rd,rx - @ wait for TX_READY -1: ldr \rd, [\rx, #0x08] - tst \rd, #0x04 - beq 1b - .endm - - .macro busyuart,rd,rx - .endm diff --git a/include/asm-arm/arch-msm/dma.h b/include/asm-arm/arch-msm/dma.h deleted file mode 100644 index e4b565b..0000000 --- a/include/asm-arm/arch-msm/dma.h +++ /dev/null @@ -1,151 +0,0 @@ -/* linux/include/asm-arm/arch-msm/dma.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_DMA_H - -#include -#include - -struct msm_dmov_cmd { - struct list_head list; - unsigned int cmdptr; - void (*complete_func)(struct msm_dmov_cmd *cmd, unsigned int result); -/* void (*user_result_func)(struct msm_dmov_cmd *cmd); */ -}; - -void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); -void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd); -int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); -/* int msm_dmov_exec_cmd_etc(unsigned id, unsigned int cmdptr, int timeout, int interruptible); */ - - - -#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) -#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) -#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) -#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) - -/* only security domain 3 is available to the ARM11 - * SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM - */ - -#define DMOV_CMD_PTR(ch) DMOV_SD3(0x000, ch) -#define DMOV_CMD_LIST (0 << 29) /* does not work */ -#define DMOV_CMD_PTR_LIST (1 << 29) /* works */ -#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ -#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ -#define DMOV_CMD_ADDR(addr) ((addr) >> 3) - -#define DMOV_RSLT(ch) DMOV_SD3(0x040, ch) -#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ -#define DMOV_RSLT_ERROR (1 << 3) -#define DMOV_RSLT_FLUSH (1 << 2) -#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ -#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ - -#define DMOV_FLUSH0(ch) DMOV_SD3(0x080, ch) -#define DMOV_FLUSH1(ch) DMOV_SD3(0x0C0, ch) -#define DMOV_FLUSH2(ch) DMOV_SD3(0x100, ch) -#define DMOV_FLUSH3(ch) DMOV_SD3(0x140, ch) -#define DMOV_FLUSH4(ch) DMOV_SD3(0x180, ch) -#define DMOV_FLUSH5(ch) DMOV_SD3(0x1C0, ch) - -#define DMOV_STATUS(ch) DMOV_SD3(0x200, ch) -#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) -#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) -#define DMOV_STATUS_RSLT_VALID (1 << 1) -#define DMOV_STATUS_CMD_PTR_RDY (1 << 0) - -#define DMOV_ISR DMOV_SD3(0x380, 0) - -#define DMOV_CONFIG(ch) DMOV_SD3(0x300, ch) -#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) -#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1) -#define DMOV_CONFIG_IRQ_EN (1 << 0) - -/* channel assignments */ - -#define DMOV_NAND_CHAN 7 -#define DMOV_NAND_CRCI_CMD 5 -#define DMOV_NAND_CRCI_DATA 4 - -#define DMOV_SDC1_CHAN 8 -#define DMOV_SDC1_CRCI 6 - -#define DMOV_SDC2_CHAN 8 -#define DMOV_SDC2_CRCI 7 - -#define DMOV_TSIF_CHAN 10 -#define DMOV_TSIF_CRCI 10 - -#define DMOV_USB_CHAN 11 - -/* no client rate control ifc (eg, ram) */ -#define DMOV_NONE_CRCI 0 - - -/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover - * is going to walk a list of 32bit pointers as described below. Each - * pointer points to a *array* of dmov_s, etc structs. The last pointer - * in the list is marked with CMD_PTR_LP. The last struct in each array - * is marked with CMD_LC (see below). - */ -#define CMD_PTR_ADDR(addr) ((addr) >> 3) -#define CMD_PTR_LP (1 << 31) /* last pointer */ -#define CMD_PTR_PT (3 << 29) /* ? */ - -/* Single Item Mode */ -typedef struct { - unsigned cmd; - unsigned src; - unsigned dst; - unsigned len; -} dmov_s; - -/* Scatter/Gather Mode */ -typedef struct { - unsigned cmd; - unsigned src_dscr; - unsigned dst_dscr; - unsigned _reserved; -} dmov_sg; - -/* bits for the cmd field of the above structures */ - -#define CMD_LC (1 << 31) /* last command */ -#define CMD_FR (1 << 22) /* force result -- does not work? */ -#define CMD_OCU (1 << 21) /* other channel unblock */ -#define CMD_OCB (1 << 20) /* other channel block */ -#define CMD_TCB (1 << 19) /* ? */ -#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/ -#define CMD_SAH (1 << 17) /* source address hold -- does not work? */ - -#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */ -#define CMD_MODE_SG (1 << 0) /* untested */ -#define CMD_MODE_IND_SG (2 << 0) /* untested */ -#define CMD_MODE_BOX (3 << 0) /* untested */ - -#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */ -#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */ -#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */ - -#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */ -#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */ -#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */ - -#define CMD_DST_CRCI(n) (((n) & 15) << 7) -#define CMD_SRC_CRCI(n) (((n) & 15) << 3) - -#endif diff --git a/include/asm-arm/arch-msm/entry-macro.S b/include/asm-arm/arch-msm/entry-macro.S deleted file mode 100644 index ee24aec..0000000 --- a/include/asm-arm/arch-msm/entry-macro.S +++ /dev/null @@ -1,38 +0,0 @@ -/* include/asm-arm/arch-msm7200/entry-macro.S - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - @ enable imprecise aborts - cpsie a - mov \base, #MSM_VIC_BASE - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ 0xD0 has irq# or old irq# if the irq has been handled - @ 0xD4 has irq# or -1 if none pending *but* if you just - @ read 0xD4 you never get the first irq for some reason - ldr \irqnr, [\base, #0xD0] - ldr \irqnr, [\base, #0xD4] - cmp \irqnr, #0xffffffff - .endm diff --git a/include/asm-arm/arch-msm/hardware.h b/include/asm-arm/arch-msm/hardware.h deleted file mode 100644 index 89af2b7..0000000 --- a/include/asm-arm/arch-msm/hardware.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/include/asm-arm/arch-msm/hardware.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_HARDWARE_H - -#endif diff --git a/include/asm-arm/arch-msm/io.h b/include/asm-arm/arch-msm/io.h deleted file mode 100644 index 4645ae2..0000000 --- a/include/asm-arm/arch-msm/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* include/asm-arm/arch-msm/io.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __arch_ioremap __msm_ioremap -#define __arch_iounmap __iounmap - -void __iomem *__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype); - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-msm/irqs.h b/include/asm-arm/arch-msm/irqs.h deleted file mode 100644 index e62a108..0000000 --- a/include/asm-arm/arch-msm/irqs.h +++ /dev/null @@ -1,90 +0,0 @@ -/* linux/include/asm-arm/arch-msm/irqs.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_IRQS_H -#define __ASM_ARCH_MSM_IRQS_H - -/* MSM ARM11 Interrupt Numbers */ -/* See 80-VE113-1 A, pp219-221 */ - -#define INT_A9_M2A_0 0 -#define INT_A9_M2A_1 1 -#define INT_A9_M2A_2 2 -#define INT_A9_M2A_3 3 -#define INT_A9_M2A_4 4 -#define INT_A9_M2A_5 5 -#define INT_A9_M2A_6 6 -#define INT_GP_TIMER_EXP 7 -#define INT_DEBUG_TIMER_EXP 8 -#define INT_UART1 9 -#define INT_UART2 10 -#define INT_UART3 11 -#define INT_UART1_RX 12 -#define INT_UART2_RX 13 -#define INT_UART3_RX 14 -#define INT_USB_OTG 15 -#define INT_MDDI_PRI 16 -#define INT_MDDI_EXT 17 -#define INT_MDDI_CLIENT 18 -#define INT_MDP 19 -#define INT_GRAPHICS 20 -#define INT_ADM_AARM 21 -#define INT_ADSP_A11 22 -#define INT_ADSP_A9_A11 23 -#define INT_SDC1_0 24 -#define INT_SDC1_1 25 -#define INT_SDC2_0 26 -#define INT_SDC2_1 27 -#define INT_KEYSENSE 28 -#define INT_TCHSCRN_SSBI 29 -#define INT_TCHSCRN1 30 -#define INT_TCHSCRN2 31 - -#define INT_GPIO_GROUP1 (32 + 0) -#define INT_GPIO_GROUP2 (32 + 1) -#define INT_PWB_I2C (32 + 2) -#define INT_SOFTRESET (32 + 3) -#define INT_NAND_WR_ER_DONE (32 + 4) -#define INT_NAND_OP_DONE (32 + 5) -#define INT_PBUS_ARM11 (32 + 6) -#define INT_AXI_MPU_SMI (32 + 7) -#define INT_AXI_MPU_EBI1 (32 + 8) -#define INT_AD_HSSD (32 + 9) -#define INT_ARM11_PMU (32 + 10) -#define INT_ARM11_DMA (32 + 11) -#define INT_TSIF_IRQ (32 + 12) -#define INT_UART1DM_IRQ (32 + 13) -#define INT_UART1DM_RX (32 + 14) -#define INT_USB_HS (32 + 15) -#define INT_SDC3_0 (32 + 16) -#define INT_SDC3_1 (32 + 17) -#define INT_SDC4_0 (32 + 18) -#define INT_SDC4_1 (32 + 19) -#define INT_UART2DM_RX (32 + 20) -#define INT_UART2DM_IRQ (32 + 21) - -/* 22-31 are reserved */ - -#define MSM_IRQ_BIT(irq) (1 << ((irq) & 31)) - -#define NR_MSM_IRQS 64 -#define NR_GPIO_IRQS 122 -#define NR_BOARD_IRQS 64 -#define NR_IRQS (NR_MSM_IRQS + NR_GPIO_IRQS + NR_BOARD_IRQS) - -#define MSM_GPIO_TO_INT(n) (NR_MSM_IRQS + (n)) - -#endif diff --git a/include/asm-arm/arch-msm/memory.h b/include/asm-arm/arch-msm/memory.h deleted file mode 100644 index b5ce0e9..0000000 --- a/include/asm-arm/arch-msm/memory.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/include/asm-arm/arch-msm/memory.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* physical offset of RAM */ -#define PHYS_OFFSET UL(0x10000000) - -/* bus address and physical addresses are identical */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif - diff --git a/include/asm-arm/arch-msm/msm_iomap.h b/include/asm-arm/arch-msm/msm_iomap.h deleted file mode 100644 index b8955cc..0000000 --- a/include/asm-arm/arch-msm/msm_iomap.h +++ /dev/null @@ -1,104 +0,0 @@ -/* linux/include/asm-arm/arch-msm/msm_iomap.h - * - * Copyright (C) 2007 Google, Inc. - * Author: Brian Swetland - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * - * The MSM peripherals are spread all over across 768MB of physical - * space, which makes just having a simple IO_ADDRESS macro to slide - * them into the right virtual location rough. Instead, we will - * provide a master phys->virt mapping for peripherals here. - * - */ - -#ifndef __ASM_ARCH_MSM_IOMAP_H -#define __ASM_ARCH_MSM_IOMAP_H - -#include - -/* Physical base address and size of peripherals. - * Ordered by the virtual base addresses they will be mapped at. - * - * MSM_VIC_BASE must be an value that can be loaded via a "mov" - * instruction, otherwise entry-macro.S will not compile. - * - * If you add or remove entries here, you'll want to edit the - * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your - * changes. - * - */ - -#define MSM_VIC_BASE 0xE0000000 -#define MSM_VIC_PHYS 0xC0000000 -#define MSM_VIC_SIZE SZ_4K - -#define MSM_CSR_BASE 0xE0001000 -#define MSM_CSR_PHYS 0xC0100000 -#define MSM_CSR_SIZE SZ_4K - -#define MSM_GPT_PHYS MSM_CSR_PHYS -#define MSM_GPT_BASE MSM_CSR_BASE -#define MSM_GPT_SIZE SZ_4K - -#define MSM_DMOV_BASE 0xE0002000 -#define MSM_DMOV_PHYS 0xA9700000 -#define MSM_DMOV_SIZE SZ_4K - -#define MSM_UART1_BASE 0xE0003000 -#define MSM_UART1_PHYS 0xA9A00000 -#define MSM_UART1_SIZE SZ_4K - -#define MSM_UART2_BASE 0xE0004000 -#define MSM_UART2_PHYS 0xA9B00000 -#define MSM_UART2_SIZE SZ_4K - -#define MSM_UART3_BASE 0xE0005000 -#define MSM_UART3_PHYS 0xA9C00000 -#define MSM_UART3_SIZE SZ_4K - -#define MSM_I2C_BASE 0xE0006000 -#define MSM_I2C_PHYS 0xA9900000 -#define MSM_I2C_SIZE SZ_4K - -#define MSM_GPIO1_BASE 0xE0007000 -#define MSM_GPIO1_PHYS 0xA9200000 -#define MSM_GPIO1_SIZE SZ_4K - -#define MSM_GPIO2_BASE 0xE0008000 -#define MSM_GPIO2_PHYS 0xA9300000 -#define MSM_GPIO2_SIZE SZ_4K - -#define MSM_HSUSB_BASE 0xE0009000 -#define MSM_HSUSB_PHYS 0xA0800000 -#define MSM_HSUSB_SIZE SZ_4K - -#define MSM_CLK_CTL_BASE 0xE000A000 -#define MSM_CLK_CTL_PHYS 0xA8600000 -#define MSM_CLK_CTL_SIZE SZ_4K - -#define MSM_PMDH_BASE 0xE000B000 -#define MSM_PMDH_PHYS 0xAA600000 -#define MSM_PMDH_SIZE SZ_4K - -#define MSM_EMDH_BASE 0xE000C000 -#define MSM_EMDH_PHYS 0xAA700000 -#define MSM_EMDH_SIZE SZ_4K - -#define MSM_MDP_BASE 0xE0010000 -#define MSM_MDP_PHYS 0xAA200000 -#define MSM_MDP_SIZE 0x000F0000 - -#define MSM_SHARED_RAM_BASE 0xE0100000 -#define MSM_SHARED_RAM_PHYS 0x01F00000 -#define MSM_SHARED_RAM_SIZE SZ_1M - -#endif diff --git a/include/asm-arm/arch-msm/system.h b/include/asm-arm/arch-msm/system.h deleted file mode 100644 index fb31b3a..0000000 --- a/include/asm-arm/arch-msm/system.h +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/include/asm-arm/arch-msm/system.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include - -void arch_idle(void); - -static inline void arch_reset(char mode) -{ - for (;;) ; /* depends on IPC w/ other core */ -} diff --git a/include/asm-arm/arch-msm/timex.h b/include/asm-arm/arch-msm/timex.h deleted file mode 100644 index 8724487..0000000 --- a/include/asm-arm/arch-msm/timex.h +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/include/asm-arm/arch-msm/timex.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_TIMEX_H -#define __ASM_ARCH_MSM_TIMEX_H - -#define CLOCK_TICK_RATE 1000000 - -#endif diff --git a/include/asm-arm/arch-msm/uncompress.h b/include/asm-arm/arch-msm/uncompress.h deleted file mode 100644 index e91ed78..0000000 --- a/include/asm-arm/arch-msm/uncompress.h +++ /dev/null @@ -1,36 +0,0 @@ -/* linux/include/asm-arm/arch-msm/uncompress.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H - -#include "hardware.h" - -static void putc(int c) -{ -} - -static inline void flush(void) -{ -} - -static inline void arch_decomp_setup(void) -{ -} - -static inline void arch_decomp_wdog(void) -{ -} - -#endif diff --git a/include/asm-arm/arch-msm/vmalloc.h b/include/asm-arm/arch-msm/vmalloc.h deleted file mode 100644 index 60f8d91..0000000 --- a/include/asm-arm/arch-msm/vmalloc.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/include/asm-arm/arch-msm/vmalloc.h - * - * Copyright (C) 2007 Google, Inc. - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __ASM_ARCH_MSM_VMALLOC_H -#define __ASM_ARCH_MSM_VMALLOC_H - -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) - -#endif - diff --git a/include/asm-arm/arch-mv78xx0/debug-macro.S b/include/asm-arm/arch-mv78xx0/debug-macro.S deleted file mode 100644 index d0595bd..0000000 --- a/include/asm-arm/arch-mv78xx0/debug-macro.S +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/debug-macro.S - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =MV78XX0_REGS_PHYS_BASE - ldrne \rx, =MV78XX0_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-mv78xx0/dma.h b/include/asm-arm/arch-mv78xx0/dma.h deleted file mode 100644 index 40a8c17..0000000 --- a/include/asm-arm/arch-mv78xx0/dma.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/include/asm-arm/arch-mv78xx0/entry-macro.S b/include/asm-arm/arch-mv78xx0/entry-macro.S deleted file mode 100644 index e9a606b..0000000 --- a/include/asm-arm/arch-mv78xx0/entry-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/entry-macro.S - * - * Low-level IRQ helper macros for Marvell MV78xx0 platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IRQ_VIRT_BASE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - @ check low interrupts - ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF] - ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] - mov \irqnr, #31 - ands \irqstat, \irqstat, \tmp - - @ if no low interrupts set, check high interrupts - ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] - ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] - moveq \irqnr, #63 - andeqs \irqstat, \irqstat, \tmp - - @ find first active interrupt source - clzne \irqstat, \irqstat - subne \irqnr, \irqnr, \irqstat - .endm diff --git a/include/asm-arm/arch-mv78xx0/hardware.h b/include/asm-arm/arch-mv78xx0/hardware.h deleted file mode 100644 index 8e179260..0000000 --- a/include/asm-arm/arch-mv78xx0/hardware.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/hardware.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "mv78xx0.h" - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM 0x01000000 -#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */ - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/io.h b/include/asm-arm/arch-mv78xx0/io.h deleted file mode 100644 index 415d4c9..0000000 --- a/include/asm-arm/arch-mv78xx0/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/io.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "mv78xx0.h" - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)((addr - MV78XX0_PCIE_IO_PHYS_BASE(0)) - + MV78XX0_PCIE_IO_VIRT_BASE(0)); -} - -#define __io(a) __io(a) -#define __mem_pci(a) (a) - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/irqs.h b/include/asm-arm/arch-mv78xx0/irqs.h deleted file mode 100644 index 7593045..0000000 --- a/include/asm-arm/arch-mv78xx0/irqs.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/irqs.h - * - * IRQ definitions for Marvell MV78xx0 SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include "mv78xx0.h" /* need GPIO_MAX */ - -/* - * MV78xx0 Low Interrupt Controller - */ -#define IRQ_MV78XX0_ERR 0 -#define IRQ_MV78XX0_SPI 1 -#define IRQ_MV78XX0_I2C_0 2 -#define IRQ_MV78XX0_I2C_1 3 -#define IRQ_MV78XX0_IDMA_0 4 -#define IRQ_MV78XX0_IDMA_1 5 -#define IRQ_MV78XX0_IDMA_2 6 -#define IRQ_MV78XX0_IDMA_3 7 -#define IRQ_MV78XX0_TIMER_0 8 -#define IRQ_MV78XX0_TIMER_1 9 -#define IRQ_MV78XX0_TIMER_2 10 -#define IRQ_MV78XX0_TIMER_3 11 -#define IRQ_MV78XX0_UART_0 12 -#define IRQ_MV78XX0_UART_1 13 -#define IRQ_MV78XX0_UART_2 14 -#define IRQ_MV78XX0_UART_3 15 -#define IRQ_MV78XX0_USB_0 16 -#define IRQ_MV78XX0_USB_1 17 -#define IRQ_MV78XX0_USB_2 18 -#define IRQ_MV78XX0_CRYPTO 19 -#define IRQ_MV78XX0_SDIO_0 20 -#define IRQ_MV78XX0_SDIO_1 21 -#define IRQ_MV78XX0_XOR_0 22 -#define IRQ_MV78XX0_XOR_1 23 -#define IRQ_MV78XX0_I2S_0 24 -#define IRQ_MV78XX0_I2S_1 25 -#define IRQ_MV78XX0_SATA 26 -#define IRQ_MV78XX0_TDMI 27 - -/* - * MV78xx0 High Interrupt Controller - */ -#define IRQ_MV78XX0_PCIE_00 32 -#define IRQ_MV78XX0_PCIE_01 33 -#define IRQ_MV78XX0_PCIE_02 34 -#define IRQ_MV78XX0_PCIE_03 35 -#define IRQ_MV78XX0_PCIE_10 36 -#define IRQ_MV78XX0_PCIE_11 37 -#define IRQ_MV78XX0_PCIE_12 38 -#define IRQ_MV78XX0_PCIE_13 39 -#define IRQ_MV78XX0_GE00_SUM 40 -#define IRQ_MV78XX0_GE00_RX 41 -#define IRQ_MV78XX0_GE00_TX 42 -#define IRQ_MV78XX0_GE00_MISC 43 -#define IRQ_MV78XX0_GE01_SUM 44 -#define IRQ_MV78XX0_GE01_RX 45 -#define IRQ_MV78XX0_GE01_TX 46 -#define IRQ_MV78XX0_GE01_MISC 47 -#define IRQ_MV78XX0_GE10_SUM 48 -#define IRQ_MV78XX0_GE10_RX 49 -#define IRQ_MV78XX0_GE10_TX 50 -#define IRQ_MV78XX0_GE10_MISC 51 -#define IRQ_MV78XX0_GE11_SUM 52 -#define IRQ_MV78XX0_GE11_RX 53 -#define IRQ_MV78XX0_GE11_TX 54 -#define IRQ_MV78XX0_GE11_MISC 55 -#define IRQ_MV78XX0_GPIO_0_7 56 -#define IRQ_MV78XX0_GPIO_8_15 57 -#define IRQ_MV78XX0_GPIO_16_23 58 -#define IRQ_MV78XX0_GPIO_24_31 59 -#define IRQ_MV78XX0_DB_IN 60 -#define IRQ_MV78XX0_DB_OUT 61 - -/* - * MV78XX0 General Purpose Pins - */ -#define IRQ_MV78XX0_GPIO_START 64 -#define NR_GPIO_IRQS GPIO_MAX - -#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/memory.h b/include/asm-arm/arch-mv78xx0/memory.h deleted file mode 100644 index 721a6b1..0000000 --- a/include/asm-arm/arch-mv78xx0/memory.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/memory.h - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/mv78xx0.h b/include/asm-arm/arch-mv78xx0/mv78xx0.h deleted file mode 100644 index 9f5d83c..0000000 --- a/include/asm-arm/arch-mv78xx0/mv78xx0.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/mv78xx0.h - * - * Generic definitions for Marvell MV78xx0 SoC flavors: - * MV781x0 and MV782x0. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_MV78XX0_H -#define __ASM_ARCH_MV78XX0_H - -/* - * Marvell MV78xx0 address maps. - * - * phys - * c0000000 PCIe Memory space - * f0800000 PCIe #0 I/O space - * f0900000 PCIe #1 I/O space - * f0a00000 PCIe #2 I/O space - * f0b00000 PCIe #3 I/O space - * f0c00000 PCIe #4 I/O space - * f0d00000 PCIe #5 I/O space - * f0e00000 PCIe #6 I/O space - * f0f00000 PCIe #7 I/O space - * f1000000 on-chip peripheral registers - * - * virt phys size - * fe400000 f102x000 16K core-specific peripheral registers - * fe700000 f0800000 1M PCIe #0 I/O space - * fe800000 f0900000 1M PCIe #1 I/O space - * fe900000 f0a00000 1M PCIe #2 I/O space - * fea00000 f0b00000 1M PCIe #3 I/O space - * feb00000 f0c00000 1M PCIe #4 I/O space - * fec00000 f0d00000 1M PCIe #5 I/O space - * fed00000 f0e00000 1M PCIe #6 I/O space - * fee00000 f0f00000 1M PCIe #7 I/O space - * fef00000 f1000000 1M on-chip peripheral registers - */ -#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 -#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 -#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 -#define MV78XX0_CORE_REGS_SIZE SZ_16K - -#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) -#define MV78XX0_PCIE_IO_VIRT_BASE(i) (0xfe700000 + ((i) << 20)) -#define MV78XX0_PCIE_IO_SIZE SZ_1M - -#define MV78XX0_REGS_PHYS_BASE 0xf1000000 -#define MV78XX0_REGS_VIRT_BASE 0xfef00000 -#define MV78XX0_REGS_SIZE SZ_1M - -#define MV78XX0_PCIE_MEM_PHYS_BASE 0xc0000000 -#define MV78XX0_PCIE_MEM_SIZE 0x30000000 - -/* - * Core-specific peripheral registers. - */ -#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) -#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) -#define L2_WRITETHROUGH 0x00020000 -#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) -#define SOFT_RESET_OUT_EN 0x00000004 -#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) -#define SOFT_RESET 0x00000001 -#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) -#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) -#define IRQ_CAUSE_LOW_OFF 0x0004 -#define IRQ_CAUSE_HIGH_OFF 0x0008 -#define IRQ_MASK_LOW_OFF 0x0010 -#define IRQ_MASK_HIGH_OFF 0x0014 -#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) - -/* - * Register Map - */ -#define DDR_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x00000) -#define DDR_WINDOW_CPU0_BASE (DDR_VIRT_BASE | 0x1500) -#define DDR_WINDOW_CPU1_BASE (DDR_VIRT_BASE | 0x1700) - -#define DEV_BUS_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x10000) -#define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) -#define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) -#define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) -#define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) -#define UART2_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2200) -#define UART2_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2200) -#define UART3_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2300) -#define UART3_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2300) - -#define GE10_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x30000) -#define GE11_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x34000) - -#define PCIE00_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x40000) -#define PCIE01_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x44000) -#define PCIE02_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x48000) -#define PCIE03_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x4c000) - -#define USB0_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x50000) -#define USB1_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x51000) -#define USB2_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x52000) - -#define GE00_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x70000) -#define GE01_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0x74000) - -#define PCIE10_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x80000) -#define PCIE11_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x84000) -#define PCIE12_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x88000) -#define PCIE13_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x8c000) - -#define SATA_PHYS_BASE (MV78XX0_REGS_PHYS_BASE | 0xa0000) - - -#define GPIO_MAX 32 - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/system.h b/include/asm-arm/arch-mv78xx0/system.h deleted file mode 100644 index 7eb47d3..0000000 --- a/include/asm-arm/arch-mv78xx0/system.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/system.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * Enable soft reset to assert RSTOUTn. - */ - writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK); - - /* - * Assert soft reset. - */ - writel(SOFT_RESET, SYSTEM_SOFT_RESET); - - while (1) - ; -} - - -#endif diff --git a/include/asm-arm/arch-mv78xx0/timex.h b/include/asm-arm/arch-mv78xx0/timex.h deleted file mode 100644 index a854b1cc..0000000 --- a/include/asm-arm/arch-mv78xx0/timex.h +++ /dev/null @@ -1,9 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/timex.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) diff --git a/include/asm-arm/arch-mv78xx0/uncompress.h b/include/asm-arm/arch-mv78xx0/uncompress.h deleted file mode 100644 index 3bfe0a2..0000000 --- a/include/asm-arm/arch-mv78xx0/uncompress.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/uncompress.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-mv78xx0/vmalloc.h b/include/asm-arm/arch-mv78xx0/vmalloc.h deleted file mode 100644 index f2c5121..0000000 --- a/include/asm-arm/arch-mv78xx0/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-mv78xx0/vmalloc.h - */ - -#define VMALLOC_END 0xfe000000 diff --git a/include/asm-arm/arch-mxc/board-mx27ads.h b/include/asm-arm/arch-mxc/board-mx27ads.h deleted file mode 100644 index 61e66da..0000000 --- a/include/asm-arm/arch-mxc/board-mx27ads.h +++ /dev/null @@ -1,354 +0,0 @@ -/* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#ifndef __ASM_ARCH_MXC_BOARD_MX27ADS_H__ -#define __ASM_ARCH_MXC_BOARD_MX27ADS_H__ - -/* external interrupt multiplexer */ -#define MXC_EXP_IO_BASE (MXC_GPIO_BASE + MXC_MAX_GPIO_LINES) - -#define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES) -#define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE -#define MXC_SDIO2_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 1) -#define MXC_SDIO3_CARD_IRQ (MXC_VIRTUAL_INTS_BASE + 2) - -#define MXC_MAX_BOARD_INTS (MXC_MAX_EXP_IO_LINES + \ - MXC_MAX_VIRTUAL_INTS) - -/* - * MXC UART EVB board level configurations - */ - -#define MXC_LL_EXTUART_PADDR (CS4_BASE_ADDR + 0x20000) -#define MXC_LL_EXTUART_VADDR (CS4_BASE_ADDR_VIRT + 0x20000) -#define MXC_LL_EXTUART_16BIT_BUS - -#define MXC_LL_UART_PADDR UART1_BASE_ADDR -#define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR) - -/* - * @name Memory Size parameters - */ - -/* - * Size of SDRAM memory - */ -#define SDRAM_MEM_SIZE SZ_128M - -/* - * PBC Controller parameters - */ - -/* - * Base address of PBC controller, CS4 - */ -#define PBC_BASE_ADDRESS 0xEB000000 -#define PBC_REG_ADDR(offset) (PBC_BASE_ADDRESS + (offset)) - -/* - * PBC Interupt name definitions - */ -#define PBC_GPIO1_0 0 -#define PBC_GPIO1_1 1 -#define PBC_GPIO1_2 2 -#define PBC_GPIO1_3 3 -#define PBC_GPIO1_4 4 -#define PBC_GPIO1_5 5 - -#define PBC_INTR_MAX_NUM 6 -#define PBC_INTR_SHARED_MAX_NUM 8 - -/* When the PBC address connection is fixed in h/w, defined as 1 */ -#define PBC_ADDR_SH 0 - -/* Offsets for the PBC Controller register */ -/* - * PBC Board version register offset - */ -#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH) -/* - * PBC Board control register 1 set address. - */ -#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH) -/* - * PBC Board control register 1 clear address. - */ -#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH) -/* - * PBC Board control register 2 set address. - */ -#define PBC_BCTRL2_SET_REG PBC_REG_ADDR(0x00010 >> PBC_ADDR_SH) -/* - * PBC Board control register 2 clear address. - */ -#define PBC_BCTRL2_CLEAR_REG PBC_REG_ADDR(0x00014 >> PBC_ADDR_SH) -/* - * PBC Board control register 3 set address. - */ -#define PBC_BCTRL3_SET_REG PBC_REG_ADDR(0x00018 >> PBC_ADDR_SH) -/* - * PBC Board control register 3 clear address. - */ -#define PBC_BCTRL3_CLEAR_REG PBC_REG_ADDR(0x0001C >> PBC_ADDR_SH) -/* - * PBC Board control register 3 set address. - */ -#define PBC_BCTRL4_SET_REG PBC_REG_ADDR(0x00020 >> PBC_ADDR_SH) -/* - * PBC Board control register 4 clear address. - */ -#define PBC_BCTRL4_CLEAR_REG PBC_REG_ADDR(0x00024 >> PBC_ADDR_SH) -/*PBC_ADDR_SH - * PBC Board status register 1. - */ -#define PBC_BSTAT1_REG PBC_REG_ADDR(0x00028 >> PBC_ADDR_SH) -/* - * PBC Board interrupt status register. - */ -#define PBC_INTSTATUS_REG PBC_REG_ADDR(0x0002C >> PBC_ADDR_SH) -/* - * PBC Board interrupt current status register. - */ -#define PBC_INTCURR_STATUS_REG PBC_REG_ADDR(0x00034 >> PBC_ADDR_SH) -/* - * PBC Interrupt mask register set address. - */ -#define PBC_INTMASK_SET_REG PBC_REG_ADDR(0x00038 >> PBC_ADDR_SH) -/* - * PBC Interrupt mask register clear address. - */ -#define PBC_INTMASK_CLEAR_REG PBC_REG_ADDR(0x0003C >> PBC_ADDR_SH) -/* - * External UART A. - */ -#define PBC_SC16C652_UARTA_REG PBC_REG_ADDR(0x20000 >> PBC_ADDR_SH) -/* - * UART 4 Expanding Signal Status. - */ -#define PBC_UART_STATUS_REG PBC_REG_ADDR(0x22000 >> PBC_ADDR_SH) -/* - * UART 4 Expanding Signal Control Set. - */ -#define PBC_UCTRL_SET_REG PBC_REG_ADDR(0x24000 >> PBC_ADDR_SH) -/* - * UART 4 Expanding Signal Control Clear. - */ -#define PBC_UCTRL_CLR_REG PBC_REG_ADDR(0x26000 >> PBC_ADDR_SH) -/* - * Ethernet Controller IO base address. - */ -#define PBC_CS8900A_IOBASE_REG PBC_REG_ADDR(0x40000 >> PBC_ADDR_SH) -/* - * Ethernet Controller Memory base address. - */ -#define PBC_CS8900A_MEMBASE_REG PBC_REG_ADDR(0x42000 >> PBC_ADDR_SH) -/* - * Ethernet Controller DMA base address. - */ -#define PBC_CS8900A_DMABASE_REG PBC_REG_ADDR(0x44000 >> PBC_ADDR_SH) - -/* PBC Board Version Register bit definition */ -#define PBC_VERSION_ADS 0x8000 /* Bit15=1 means version for ads */ -#define PBC_VERSION_EVB_REVB 0x4000 /* BIT14=1 means version for evb revb */ - -/* PBC Board Control Register 1 bit definitions */ -#define PBC_BCTRL1_ERST 0x0001 /* Ethernet Reset */ -#define PBC_BCTRL1_URST 0x0002 /* Reset External UART controller */ -#define PBC_BCTRL1_FRST 0x0004 /* FEC Reset */ -#define PBC_BCTRL1_ESLEEP 0x0010 /* Enable ethernet Sleep */ -#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */ - -/* PBC Board Control Register 2 bit definitions */ -#define PBC_BCTRL2_VCC_EN 0x0004 /* Enable VCC */ -#define PBC_BCTRL2_VPP_EN 0x0008 /* Enable Vpp */ -#define PBC_BCTRL2_ATAFEC_EN 0X0010 -#define PBC_BCTRL2_ATAFEC_SEL 0X0020 -#define PBC_BCTRL2_ATA_EN 0X0040 -#define PBC_BCTRL2_IRDA_SD 0X0080 -#define PBC_BCTRL2_IRDA_EN 0X0100 -#define PBC_BCTRL2_CCTL10 0X0200 -#define PBC_BCTRL2_CCTL11 0X0400 - -/* PBC Board Control Register 3 bit definitions */ -#define PBC_BCTRL3_HSH_EN 0X0020 -#define PBC_BCTRL3_FSH_MOD 0X0040 -#define PBC_BCTRL3_OTG_HS_EN 0X0080 -#define PBC_BCTRL3_OTG_VBUS_EN 0X0100 -#define PBC_BCTRL3_FSH_VBUS_EN 0X0200 -#define PBC_BCTRL3_USB_OTG_ON 0X0800 -#define PBC_BCTRL3_USB_FSH_ON 0X1000 - -/* PBC Board Control Register 4 bit definitions */ -#define PBC_BCTRL4_REGEN_SEL 0X0001 -#define PBC_BCTRL4_USER_OFF 0X0002 -#define PBC_BCTRL4_VIB_EN 0X0004 -#define PBC_BCTRL4_PWRGT1_EN 0X0008 -#define PBC_BCTRL4_PWRGT2_EN 0X0010 -#define PBC_BCTRL4_STDBY_PRI 0X0020 - -#ifndef __ASSEMBLY__ -/* - * Enumerations for SD cards and memory stick card. This corresponds to - * the card EN bits in the IMR: SD1_EN | MS_EN | SD3_EN | SD2_EN. - */ -enum mxc_card_no { - MXC_CARD_SD2 = 0, - MXC_CARD_SD3, - MXC_CARD_MS, - MXC_CARD_SD1, - MXC_CARD_MIN = MXC_CARD_SD2, - MXC_CARD_MAX = MXC_CARD_SD1, -}; -#endif - -#define MXC_CPLD_VER_1_50 0x01 - -/* - * PBC BSTAT Register bit definitions - */ -#define PBC_BSTAT_PRI_INT 0X0001 -#define PBC_BSTAT_USB_BYP 0X0002 -#define PBC_BSTAT_ATA_IOCS16 0X0004 -#define PBC_BSTAT_ATA_CBLID 0X0008 -#define PBC_BSTAT_ATA_DASP 0X0010 -#define PBC_BSTAT_PWR_RDY 0X0020 -#define PBC_BSTAT_SD3_WP 0X0100 -#define PBC_BSTAT_SD2_WP 0X0200 -#define PBC_BSTAT_SD1_WP 0X0400 -#define PBC_BSTAT_SD3_DET 0X0800 -#define PBC_BSTAT_SD2_DET 0X1000 -#define PBC_BSTAT_SD1_DET 0X2000 -#define PBC_BSTAT_MS_DET 0X4000 -#define PBC_BSTAT_SD3_DET_BIT 11 -#define PBC_BSTAT_SD2_DET_BIT 12 -#define PBC_BSTAT_SD1_DET_BIT 13 -#define PBC_BSTAT_MS_DET_BIT 14 -#define MXC_BSTAT_BIT(n) ((n == MXC_CARD_SD2) ? PBC_BSTAT_SD2_DET : \ - ((n == MXC_CARD_SD3) ? PBC_BSTAT_SD3_DET : \ - ((n == MXC_CARD_SD1) ? PBC_BSTAT_SD1_DET : \ - ((n == MXC_CARD_MS) ? PBC_BSTAT_MS_DET : \ - 0x0)))) - -/* - * PBC UART Control Register bit definitions - */ -#define PBC_UCTRL_DCE_DCD 0X0001 -#define PBC_UCTRL_DCE_DSR 0X0002 -#define PBC_UCTRL_DCE_RI 0X0004 -#define PBC_UCTRL_DTE_DTR 0X0100 - -/* - * PBC UART Status Register bit definitions - */ -#define PBC_USTAT_DTE_DCD 0X0001 -#define PBC_USTAT_DTE_DSR 0X0002 -#define PBC_USTAT_DTE_RI 0X0004 -#define PBC_USTAT_DCE_DTR 0X0100 - -/* - * PBC Interupt mask register bit definitions - */ -#define PBC_INTR_SD3_R_EN_BIT 4 -#define PBC_INTR_SD2_R_EN_BIT 0 -#define PBC_INTR_SD1_R_EN_BIT 6 -#define PBC_INTR_MS_R_EN_BIT 5 -#define PBC_INTR_SD3_EN_BIT 13 -#define PBC_INTR_SD2_EN_BIT 12 -#define PBC_INTR_MS_EN_BIT 14 -#define PBC_INTR_SD1_EN_BIT 15 - -#define PBC_INTR_SD2_R_EN 0x0001 -#define PBC_INTR_LOW_BAT 0X0002 -#define PBC_INTR_OTG_FSOVER 0X0004 -#define PBC_INTR_FSH_OVER 0X0008 -#define PBC_INTR_SD3_R_EN 0x0010 -#define PBC_INTR_MS_R_EN 0x0020 -#define PBC_INTR_SD1_R_EN 0x0040 -#define PBC_INTR_FEC_INT 0X0080 -#define PBC_INTR_ENET_INT 0X0100 -#define PBC_INTR_OTGFS_INT 0X0200 -#define PBC_INTR_XUART_INT 0X0400 -#define PBC_INTR_CCTL12 0X0800 -#define PBC_INTR_SD2_EN 0x1000 -#define PBC_INTR_SD3_EN 0x2000 -#define PBC_INTR_MS_EN 0x4000 -#define PBC_INTR_SD1_EN 0x8000 - - - -/* For interrupts like xuart, enet etc */ -#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX27_PIN_TIN) -#define MXC_MAX_EXP_IO_LINES 16 - -/* - * This corresponds to PBC_INTMASK_SET_REG at offset 0x38. - * - */ -#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 1) -#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2) -#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3) -#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4) -#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5) -#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6) -#define EXPIO_INT_FEC (MXC_EXP_IO_BASE + 7) -#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8) -#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9) -#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10) -#define EXPIO_INT_CCTL12_INT (MXC_EXP_IO_BASE + 11) -#define EXPIO_INT_SD2_EN (MXC_EXP_IO_BASE + 12) -#define EXPIO_INT_SD3_EN (MXC_EXP_IO_BASE + 13) -#define EXPIO_INT_MS_EN (MXC_EXP_IO_BASE + 14) -#define EXPIO_INT_SD1_EN (MXC_EXP_IO_BASE + 15) - -/* - * This is System IRQ used by CS8900A for interrupt generation - * taken from platform.h - */ -#define CS8900AIRQ EXPIO_INT_ENET_INT -/* This is I/O Base address used to access registers of CS8900A on MXC ADS */ -#define CS8900A_BASE_ADDRESS (PBC_CS8900A_IOBASE_REG + 0x300) - -#define MXC_PMIC_INT_LINE IOMUX_TO_IRQ(MX27_PIN_TOUT) - -/* -* This is used to detect if the CPLD version is for mx27 evb board rev-a -*/ -#define PBC_CPLD_VERSION_IS_REVA() \ - ((__raw_readw(PBC_VERSION_REG) & \ - (PBC_VERSION_ADS | PBC_VERSION_EVB_REVB))\ - == 0) - -/* This is used to active or inactive ata signal in CPLD . - * It is dependent with hardware - */ -#define PBC_ATA_SIGNAL_ACTIVE() \ - __raw_writew( \ - PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \ - PBC_BCTRL2_CLEAR_REG) - -#define PBC_ATA_SIGNAL_INACTIVE() \ - __raw_writew( \ - PBC_BCTRL2_ATAFEC_EN|PBC_BCTRL2_ATAFEC_SEL|PBC_BCTRL2_ATA_EN, \ - PBC_BCTRL2_SET_REG) - -#define MXC_BD_LED1 (1 << 5) -#define MXC_BD_LED2 (1 << 6) -#define MXC_BD_LED_ON(led) \ - __raw_writew(led, PBC_BCTRL1_SET_REG) -#define MXC_BD_LED_OFF(led) \ - __raw_writew(led, PBC_BCTRL1_CLEAR_REG) - -/* to determine the correct external crystal reference */ -#define CKIH_27MHZ_BIT_SET (1 << 3) - -#endif /* __ASM_ARCH_MXC_BOARD_MX27ADS_H__ */ diff --git a/include/asm-arm/arch-mxc/board-mx31ads.h b/include/asm-arm/arch-mxc/board-mx31ads.h deleted file mode 100644 index 1bc6fb0..0000000 --- a/include/asm-arm/arch-mxc/board-mx31ads.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_BOARD_MX31ADS_H__ -#define __ASM_ARCH_MXC_BOARD_MX31ADS_H__ - -/* Base address of PBC controller */ -#define PBC_BASE_ADDRESS IO_ADDRESS(CS4_BASE_ADDR) -/* Offsets for the PBC Controller register */ - -/* PBC Board status register offset */ -#define PBC_BSTAT 0x000002 - -/* PBC Board control register 1 set address */ -#define PBC_BCTRL1_SET 0x000004 - -/* PBC Board control register 1 clear address */ -#define PBC_BCTRL1_CLEAR 0x000006 - -/* PBC Board control register 2 set address */ -#define PBC_BCTRL2_SET 0x000008 - -/* PBC Board control register 2 clear address */ -#define PBC_BCTRL2_CLEAR 0x00000A - -/* PBC Board control register 3 set address */ -#define PBC_BCTRL3_SET 0x00000C - -/* PBC Board control register 3 clear address */ -#define PBC_BCTRL3_CLEAR 0x00000E - -/* PBC Board control register 4 set address */ -#define PBC_BCTRL4_SET 0x000010 - -/* PBC Board control register 4 clear address */ -#define PBC_BCTRL4_CLEAR 0x000012 - -/* PBC Board status register 1 */ -#define PBC_BSTAT1 0x000014 - -/* PBC Board interrupt status register */ -#define PBC_INTSTATUS 0x000016 - -/* PBC Board interrupt current status register */ -#define PBC_INTCURR_STATUS 0x000018 - -/* PBC Interrupt mask register set address */ -#define PBC_INTMASK_SET 0x00001A - -/* PBC Interrupt mask register clear address */ -#define PBC_INTMASK_CLEAR 0x00001C - -/* External UART A */ -#define PBC_SC16C652_UARTA 0x010000 - -/* External UART B */ -#define PBC_SC16C652_UARTB 0x010010 - -/* Ethernet Controller IO base address */ -#define PBC_CS8900A_IOBASE 0x020000 - -/* Ethernet Controller Memory base address */ -#define PBC_CS8900A_MEMBASE 0x021000 - -/* Ethernet Controller DMA base address */ -#define PBC_CS8900A_DMABASE 0x022000 - -/* External chip select 0 */ -#define PBC_XCS0 0x040000 - -/* LCD Display enable */ -#define PBC_LCD_EN_B 0x060000 - -/* Code test debug enable */ -#define PBC_CODE_B 0x070000 - -/* PSRAM memory select */ -#define PBC_PSRAM_B 0x5000000 - -#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS) -#define PBC_INTCURR_STATUS_REG (PBC_INTCURR_STATUS + PBC_BASE_ADDRESS) -#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS) -#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) -#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) - -#define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) -#define EXPIO_INT_PB_IRQ (MXC_EXP_IO_BASE + 1) -#define EXPIO_INT_OTG_FS_OVR (MXC_EXP_IO_BASE + 2) -#define EXPIO_INT_FSH_OVR (MXC_EXP_IO_BASE + 3) -#define EXPIO_INT_RES4 (MXC_EXP_IO_BASE + 4) -#define EXPIO_INT_RES5 (MXC_EXP_IO_BASE + 5) -#define EXPIO_INT_RES6 (MXC_EXP_IO_BASE + 6) -#define EXPIO_INT_RES7 (MXC_EXP_IO_BASE + 7) -#define EXPIO_INT_ENET_INT (MXC_EXP_IO_BASE + 8) -#define EXPIO_INT_OTG_FS_INT (MXC_EXP_IO_BASE + 9) -#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10) -#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11) -#define EXPIO_INT_SYNTH_IRQ (MXC_EXP_IO_BASE + 12) -#define EXPIO_INT_CE_INT1 (MXC_EXP_IO_BASE + 13) -#define EXPIO_INT_CE_INT2 (MXC_EXP_IO_BASE + 14) -#define EXPIO_INT_RES15 (MXC_EXP_IO_BASE + 15) - -#define MXC_MAX_EXP_IO_LINES 16 - -/* mandatory for CONFIG_LL_DEBUG */ - -#define MXC_LL_UART_PADDR UART1_BASE_ADDR -#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) - -#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */ diff --git a/include/asm-arm/arch-mxc/board-mx31lite.h b/include/asm-arm/arch-mxc/board-mx31lite.h deleted file mode 100644 index e4e5cf5..0000000 --- a/include/asm-arm/arch-mxc/board-mx31lite.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__ -#define __ASM_ARCH_MXC_BOARD_MX31LITE_H__ - -#define MXC_MAX_EXP_IO_LINES 16 - - -/* - * Memory Size parameters - */ - -/* - * Size of SDRAM memory - */ -#define SDRAM_MEM_SIZE SZ_128M -/* - * Size of MBX buffer memory - */ -#define MXC_MBX_MEM_SIZE SZ_16M -/* - * Size of memory available to kernel - */ -#define MEM_SIZE (SDRAM_MEM_SIZE - MXC_MBX_MEM_SIZE) - -#define MXC_LL_UART_PADDR UART1_BASE_ADDR -#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) - -#endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */ - diff --git a/include/asm-arm/arch-mxc/board-pcm037.h b/include/asm-arm/arch-mxc/board-pcm037.h deleted file mode 100644 index 82232ba..0000000 --- a/include/asm-arm/arch-mxc/board-pcm037.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (C) 2008 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MXC_BOARD_PCM037_H__ -#define __ASM_ARCH_MXC_BOARD_PCM037_H__ - -/* mandatory for CONFIG_LL_DEBUG */ - -#define MXC_LL_UART_PADDR UART1_BASE_ADDR -#define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) - -#endif /* __ASM_ARCH_MXC_BOARD_PCM037_H__ */ diff --git a/include/asm-arm/arch-mxc/board-pcm038.h b/include/asm-arm/arch-mxc/board-pcm038.h deleted file mode 100644 index 750c62a..0000000 --- a/include/asm-arm/arch-mxc/board-pcm038.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_BOARD_PCM038_H__ -#define __ASM_ARCH_MXC_BOARD_PCM038_H__ - -/* mandatory for CONFIG_LL_DEBUG */ - -#define MXC_LL_UART_PADDR UART1_BASE_ADDR -#define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) - -#ifndef __ASSEMBLY__ -/* - * This CPU module needs a baseboard to work. After basic initializing - * its own devices, it calls baseboard's init function. - * TODO: Add your own baseboard init function and call it from - * inside pcm038_init(). - * - * This example here is for the development board. Refer pcm970-baseboard.c - */ - -extern void pcm970_baseboard_init(void); - -#endif - -#endif /* __ASM_ARCH_MXC_BOARD_PCM038_H__ */ diff --git a/include/asm-arm/arch-mxc/clock.h b/include/asm-arm/arch-mxc/clock.h deleted file mode 100644 index 24caa2b..0000000 --- a/include/asm-arm/arch-mxc/clock.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_CLOCK_H__ -#define __ASM_ARCH_MXC_CLOCK_H__ - -#ifndef __ASSEMBLY__ -#include - -struct module; - -struct clk { - struct list_head node; - struct module *owner; - const char *name; - int id; - /* Source clock this clk depends on */ - struct clk *parent; - /* Secondary clock to enable/disable with this clock */ - struct clk *secondary; - /* Reference count of clock enable/disable */ - __s8 usecount; - /* Register bit position for clock's enable/disable control. */ - u8 enable_shift; - /* Register address for clock's enable/disable control. */ - u32 enable_reg; - u32 flags; - /* get the current clock rate (always a fresh value) */ - unsigned long (*get_rate) (struct clk *); - /* Function ptr to set the clock to a new rate. The rate must match a - supported rate returned from round_rate. Leave blank if clock is not - programmable */ - int (*set_rate) (struct clk *, unsigned long); - /* Function ptr to round the requested clock rate to the nearest - supported rate that is less than or equal to the requested rate. */ - unsigned long (*round_rate) (struct clk *, unsigned long); - /* Function ptr to enable the clock. Leave blank if clock can not - be gated. */ - int (*enable) (struct clk *); - /* Function ptr to disable the clock. Leave blank if clock can not - be gated. */ - void (*disable) (struct clk *); - /* Function ptr to set the parent clock of the clock. */ - int (*set_parent) (struct clk *, struct clk *); -}; - -int clk_register(struct clk *clk); -void clk_unregister(struct clk *clk); - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_MXC_CLOCK_H__ */ diff --git a/include/asm-arm/arch-mxc/common.h b/include/asm-arm/arch-mxc/common.h deleted file mode 100644 index a6d2e24..0000000 --- a/include/asm-arm/arch-mxc/common.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_COMMON_H__ -#define __ASM_ARCH_MXC_COMMON_H__ - -extern void mxc_map_io(void); -extern void mxc_init_irq(void); -extern void mxc_timer_init(const char *clk_timer); -extern int mxc_clocks_init(unsigned long fref); -extern int mxc_register_gpios(void); - -#endif diff --git a/include/asm-arm/arch-mxc/debug-macro.S b/include/asm-arm/arch-mxc/debug-macro.S deleted file mode 100644 index 575087f..0000000 --- a/include/asm-arm/arch-mxc/debug-macro.S +++ /dev/null @@ -1,49 +0,0 @@ -/* linux/include/asm-arm/arch-imx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include - -#ifdef CONFIG_MACH_MX31ADS -#include -#endif -#ifdef CONFIG_MACH_PCM037 -#include -#endif -#ifdef CONFIG_MACH_MX31LITE -#include -#endif -#ifdef CONFIG_MACH_MX27ADS -#include -#endif -#ifdef CONFIG_MACH_PCM038 -#include -#endif - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =MXC_LL_UART_PADDR @ physical - ldrne \rx, =MXC_LL_UART_VADDR @ virtual - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0x40] @ TXDATA - .endm - - .macro waituart,rd,rx - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #0x98] @ SR2 - tst \rd, #1 << 3 @ TXDC - beq 1002b @ wait until transmit done - .endm diff --git a/include/asm-arm/arch-mxc/dma.h b/include/asm-arm/arch-mxc/dma.h deleted file mode 100644 index c822d56..0000000 --- a/include/asm-arm/arch-mxc/dma.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_DMA_H__ -#define __ASM_ARCH_MXC_DMA_H__ - -#endif diff --git a/include/asm-arm/arch-mxc/entry-macro.S b/include/asm-arm/arch-mxc/entry-macro.S deleted file mode 100644 index b542433..0000000 --- a/include/asm-arm/arch-mxc/entry-macro.S +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (C) 2007 Lennert Buytenhek - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - @ this macro disables fast irq (not implemented) - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - @ this macro checks which interrupt occured - @ and returns its number in irqnr - @ and returns if an interrupt occured in irqstat - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =AVIC_IO_ADDRESS(AVIC_BASE_ADDR) - @ Load offset & priority of the highest priority - @ interrupt pending from AVIC_NIVECSR - ldr \irqstat, [\base, #0x40] - @ Shift to get the decoded IRQ number, using ASR so - @ 'no interrupt pending' becomes 0xffffffff - mov \irqnr, \irqstat, asr #16 - @ set zero flag if IRQ + 1 == 0 - adds \tmp, \irqnr, #1 - .endm - - @ irq priority table (not used) - .macro irq_prio_table - .endm diff --git a/include/asm-arm/arch-mxc/gpio.h b/include/asm-arm/arch-mxc/gpio.h deleted file mode 100644 index 5f13a65..0000000 --- a/include/asm-arm/arch-mxc/gpio.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_GPIO_H__ -#define __ASM_ARCH_MXC_GPIO_H__ - -#include -#include - -/* use gpiolib dispatchers */ -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep - -#define gpio_to_irq(gpio) (MXC_MAX_INT_LINES + (gpio)) -#define irq_to_gpio(irq) ((irq) - MXC_MAX_INT_LINES) - -struct mxc_gpio_port { - void __iomem *base; - int irq; - int virtual_irq_start; - struct gpio_chip chip; -}; - -int mxc_gpio_init(struct mxc_gpio_port*, int); - -#endif diff --git a/include/asm-arm/arch-mxc/hardware.h b/include/asm-arm/arch-mxc/hardware.h deleted file mode 100644 index 37cddba..0000000 --- a/include/asm-arm/arch-mxc/hardware.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_HARDWARE_H__ -#define __ASM_ARCH_MXC_HARDWARE_H__ - -#include - -#ifdef CONFIG_ARCH_MX3 -# include -#endif - -#ifdef CONFIG_ARCH_MX2 -# ifdef CONFIG_MACH_MX27 -# include -# endif -#endif - -#include - -#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ diff --git a/include/asm-arm/arch-mxc/iim.h b/include/asm-arm/arch-mxc/iim.h deleted file mode 100644 index 315bffa..0000000 --- a/include/asm-arm/arch-mxc/iim.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_IIM_H__ -#define __ASM_ARCH_MXC_IIM_H__ - -/* Register offsets */ -#define MXC_IIMSTAT 0x0000 -#define MXC_IIMSTATM 0x0004 -#define MXC_IIMERR 0x0008 -#define MXC_IIMEMASK 0x000C -#define MXC_IIMFCTL 0x0010 -#define MXC_IIMUA 0x0014 -#define MXC_IIMLA 0x0018 -#define MXC_IIMSDAT 0x001C -#define MXC_IIMPREV 0x0020 -#define MXC_IIMSREV 0x0024 -#define MXC_IIMPRG_P 0x0028 -#define MXC_IIMSCS0 0x002C -#define MXC_IIMSCS1 0x0030 -#define MXC_IIMSCS2 0x0034 -#define MXC_IIMSCS3 0x0038 -#define MXC_IIMFBAC0 0x0800 -#define MXC_IIMJAC 0x0804 -#define MXC_IIMHWV1 0x0808 -#define MXC_IIMHWV2 0x080C -#define MXC_IIMHAB0 0x0810 -#define MXC_IIMHAB1 0x0814 -/* Definitions for i.MX27 TO2 */ -#define MXC_IIMMAC 0x0814 -#define MXC_IIMPREV_FUSE 0x0818 -#define MXC_IIMSREV_FUSE 0x081C -#define MXC_IIMSJC_CHALL_0 0x0820 -#define MXC_IIMSJC_CHALL_7 0x083C -#define MXC_IIMFB0UC17 0x0840 -#define MXC_IIMFB0UC255 0x0BFC -#define MXC_IIMFBAC1 0x0C00 -/* Definitions for i.MX27 TO2 */ -#define MXC_IIMSUID 0x0C04 -#define MXC_IIMKEY0 0x0C04 -#define MXC_IIMKEY20 0x0C54 -#define MXC_IIMSJC_RESP_0 0x0C58 -#define MXC_IIMSJC_RESP_7 0x0C74 -#define MXC_IIMFB1UC30 0x0C78 -#define MXC_IIMFB1UC255 0x0FFC - -/* Bit definitions */ - -#define MXC_IIMHWV1_WLOCK (0x1 << 7) -#define MXC_IIMHWV1_MCU_ENDIAN (0x1 << 6) -#define MXC_IIMHWV1_DSP_ENDIAN (0x1 << 5) -#define MXC_IIMHWV1_BOOT_INT (0x1 << 4) -#define MXC_IIMHWV1_SCC_DISABLE (0x1 << 3) -#define MXC_IIMHWV1_HANTRO_DISABLE (0x1 << 2) -#define MXC_IIMHWV1_MEMSTICK_DIS (0x1 << 1) - -#define MXC_IIMHWV2_WLOCK (0x1 << 7) -#define MXC_IIMHWV2_BP_SDMA (0x1 << 6) -#define MXC_IIMHWV2_SCM_DCM (0x1 << 5) - -#endif /* __ASM_ARCH_MXC_IIM_H__ */ diff --git a/include/asm-arm/arch-mxc/imx-uart.h b/include/asm-arm/arch-mxc/imx-uart.h deleted file mode 100644 index 83fb72c4..0000000 --- a/include/asm-arm/arch-mxc/imx-uart.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (C) 2008 by Sascha Hauer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef ASMARM_ARCH_UART_H -#define ASMARM_ARCH_UART_H - -#define IMXUART_HAVE_RTSCTS (1<<0) - -struct imxuart_platform_data { - int (*init)(struct platform_device *pdev); - int (*exit)(struct platform_device *pdev); - unsigned int flags; -}; - -int __init imx_init_uart(int uart_no, struct imxuart_platform_data *pdata); - -#endif diff --git a/include/asm-arm/arch-mxc/io.h b/include/asm-arm/arch-mxc/io.h deleted file mode 100644 index 65b6810..0000000 --- a/include/asm-arm/arch-mxc/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_IO_H__ -#define __ASM_ARCH_MXC_IO_H__ - -/* Allow IO space to be anywhere in the memory */ -#define IO_SPACE_LIMIT 0xffffffff - -/* io address mapping macro */ -#define __io(a) ((void __iomem *)(a)) - -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-mxc/iomux-mx1-mx2.h b/include/asm-arm/arch-mxc/iomux-mx1-mx2.h deleted file mode 100644 index 076d37b..0000000 --- a/include/asm-arm/arch-mxc/iomux-mx1-mx2.h +++ /dev/null @@ -1,372 +0,0 @@ -/* - * Copyright (C) 2008 by Sascha Hauer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef _MXC_GPIO_MX1_MX2_H -#define _MXC_GPIO_MX1_MX2_H - -#include - -#define MXC_GPIO_ALLOC_MODE_NORMAL 0 -#define MXC_GPIO_ALLOC_MODE_NO_ALLOC 1 -#define MXC_GPIO_ALLOC_MODE_TRY_ALLOC 2 -#define MXC_GPIO_ALLOC_MODE_ALLOC_ONLY 4 -#define MXC_GPIO_ALLOC_MODE_RELEASE 8 - -/* - * GPIO Module and I/O Multiplexer - * x = 0..3 for reg_A, reg_B, reg_C, reg_D - */ -#define VA_GPIO_BASE IO_ADDRESS(GPIO_BASE_ADDR) -#define MXC_DDIR(x) (0x00 + ((x) << 8)) -#define MXC_OCR1(x) (0x04 + ((x) << 8)) -#define MXC_OCR2(x) (0x08 + ((x) << 8)) -#define MXC_ICONFA1(x) (0x0c + ((x) << 8)) -#define MXC_ICONFA2(x) (0x10 + ((x) << 8)) -#define MXC_ICONFB1(x) (0x14 + ((x) << 8)) -#define MXC_ICONFB2(x) (0x18 + ((x) << 8)) -#define MXC_DR(x) (0x1c + ((x) << 8)) -#define MXC_GIUS(x) (0x20 + ((x) << 8)) -#define MXC_SSR(x) (0x24 + ((x) << 8)) -#define MXC_ICR1(x) (0x28 + ((x) << 8)) -#define MXC_ICR2(x) (0x2c + ((x) << 8)) -#define MXC_IMR(x) (0x30 + ((x) << 8)) -#define MXC_ISR(x) (0x34 + ((x) << 8)) -#define MXC_GPR(x) (0x38 + ((x) << 8)) -#define MXC_SWR(x) (0x3c + ((x) << 8)) -#define MXC_PUEN(x) (0x40 + ((x) << 8)) - -#ifdef CONFIG_ARCH_MX1 -# define GPIO_PORT_MAX 3 -#endif -#ifdef CONFIG_ARCH_MX2 -# define GPIO_PORT_MAX 5 -#endif - -#ifndef GPIO_PORT_MAX -# error "GPIO config port count unknown!" -#endif - -#define GPIO_PIN_MASK 0x1f - -#define GPIO_PORT_SHIFT 5 -#define GPIO_PORT_MASK (0x7 << GPIO_PORT_SHIFT) - -#define GPIO_PORTA (0 << GPIO_PORT_SHIFT) -#define GPIO_PORTB (1 << GPIO_PORT_SHIFT) -#define GPIO_PORTC (2 << GPIO_PORT_SHIFT) -#define GPIO_PORTD (3 << GPIO_PORT_SHIFT) -#define GPIO_PORTE (4 << GPIO_PORT_SHIFT) -#define GPIO_PORTF (5 << GPIO_PORT_SHIFT) - -#define GPIO_OUT (1 << 8) -#define GPIO_IN (0 << 8) -#define GPIO_PUEN (1 << 9) - -#define GPIO_PF (1 << 10) -#define GPIO_AF (1 << 11) - -#define GPIO_OCR_SHIFT 12 -#define GPIO_OCR_MASK (3 << GPIO_OCR_SHIFT) -#define GPIO_AIN (0 << GPIO_OCR_SHIFT) -#define GPIO_BIN (1 << GPIO_OCR_SHIFT) -#define GPIO_CIN (2 << GPIO_OCR_SHIFT) -#define GPIO_GPIO (3 << GPIO_OCR_SHIFT) - -#define GPIO_AOUT_SHIFT 14 -#define GPIO_AOUT_MASK (3 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT (0 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_ISR (1 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_0 (2 << GPIO_AOUT_SHIFT) -#define GPIO_AOUT_1 (3 << GPIO_AOUT_SHIFT) - -#define GPIO_BOUT_SHIFT 16 -#define GPIO_BOUT_MASK (3 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT (0 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_ISR (1 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_0 (2 << GPIO_BOUT_SHIFT) -#define GPIO_BOUT_1 (3 << GPIO_BOUT_SHIFT) - -extern void mxc_gpio_mode(int gpio_mode); -extern int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, - int alloc_mode, const char *label); - -/*-------------------------------------------------------------------------*/ - -/* assignements for GPIO alternate/primary functions */ - -/* FIXME: This list is not completed. The correct directions are - * missing on some (many) pins - */ -#ifdef CONFIG_ARCH_MX1 -#define PA0_AIN_SPI2_CLK (GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0) -#define PA0_AF_ETMTRACESYNC (GPIO_PORTA | GPIO_AF | 0) -#define PA1_AOUT_SPI2_RXD (GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1) -#define PA1_PF_TIN (GPIO_PORTA | GPIO_PF | 1) -#define PA2_PF_PWM0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 2) -#define PA3_PF_CSI_MCLK (GPIO_PORTA | GPIO_PF | 3) -#define PA4_PF_CSI_D0 (GPIO_PORTA | GPIO_PF | 4) -#define PA5_PF_CSI_D1 (GPIO_PORTA | GPIO_PF | 5) -#define PA6_PF_CSI_D2 (GPIO_PORTA | GPIO_PF | 6) -#define PA7_PF_CSI_D3 (GPIO_PORTA | GPIO_PF | 7) -#define PA8_PF_CSI_D4 (GPIO_PORTA | GPIO_PF | 8) -#define PA9_PF_CSI_D5 (GPIO_PORTA | GPIO_PF | 9) -#define PA10_PF_CSI_D6 (GPIO_PORTA | GPIO_PF | 10) -#define PA11_PF_CSI_D7 (GPIO_PORTA | GPIO_PF | 11) -#define PA12_PF_CSI_VSYNC (GPIO_PORTA | GPIO_PF | 12) -#define PA13_PF_CSI_HSYNC (GPIO_PORTA | GPIO_PF | 13) -#define PA14_PF_CSI_PIXCLK (GPIO_PORTA | GPIO_PF | 14) -#define PA15_PF_I2C_SDA (GPIO_PORTA | GPIO_OUT | GPIO_PF | 15) -#define PA16_PF_I2C_SCL (GPIO_PORTA | GPIO_OUT | GPIO_PF | 16) -#define PA17_AF_ETMTRACEPKT4 (GPIO_PORTA | GPIO_AF | 17) -#define PA17_AIN_SPI2_SS (GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17) -#define PA18_AF_ETMTRACEPKT5 (GPIO_PORTA | GPIO_AF | 18) -#define PA19_AF_ETMTRACEPKT6 (GPIO_PORTA | GPIO_AF | 19) -#define PA20_AF_ETMTRACEPKT7 (GPIO_PORTA | GPIO_AF | 20) -#define PA21_PF_A0 (GPIO_PORTA | GPIO_PF | 21) -#define PA22_PF_CS4 (GPIO_PORTA | GPIO_PF | 22) -#define PA23_PF_CS5 (GPIO_PORTA | GPIO_PF | 23) -#define PA24_PF_A16 (GPIO_PORTA | GPIO_PF | 24) -#define PA24_AF_ETMTRACEPKT0 (GPIO_PORTA | GPIO_AF | 24) -#define PA25_PF_A17 (GPIO_PORTA | GPIO_PF | 25) -#define PA25_AF_ETMTRACEPKT1 (GPIO_PORTA | GPIO_AF | 25) -#define PA26_PF_A18 (GPIO_PORTA | GPIO_PF | 26) -#define PA26_AF_ETMTRACEPKT2 (GPIO_PORTA | GPIO_AF | 26) -#define PA27_PF_A19 (GPIO_PORTA | GPIO_PF | 27) -#define PA27_AF_ETMTRACEPKT3 (GPIO_PORTA | GPIO_AF | 27) -#define PA28_PF_A20 (GPIO_PORTA | GPIO_PF | 28) -#define PA28_AF_ETMPIPESTAT0 (GPIO_PORTA | GPIO_AF | 28) -#define PA29_PF_A21 (GPIO_PORTA | GPIO_PF | 29) -#define PA29_AF_ETMPIPESTAT1 (GPIO_PORTA | GPIO_AF | 29) -#define PA30_PF_A22 (GPIO_PORTA | GPIO_PF | 30) -#define PA30_AF_ETMPIPESTAT2 (GPIO_PORTA | GPIO_AF | 30) -#define PA31_PF_A23 (GPIO_PORTA | GPIO_PF | 31) -#define PA31_AF_ETMTRACECLK (GPIO_PORTA | GPIO_AF | 31) -#define PB8_PF_SD_DAT0 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8) -#define PB8_AF_MS_PIO (GPIO_PORTB | GPIO_AF | 8) -#define PB9_PF_SD_DAT1 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9) -#define PB9_AF_MS_PI1 (GPIO_PORTB | GPIO_AF | 9) -#define PB10_PF_SD_DAT2 (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10) -#define PB10_AF_MS_SCLKI (GPIO_PORTB | GPIO_AF | 10) -#define PB11_PF_SD_DAT3 (GPIO_PORTB | GPIO_PF | 11) -#define PB11_AF_MS_SDIO (GPIO_PORTB | GPIO_AF | 11) -#define PB12_PF_SD_CLK (GPIO_PORTB | GPIO_PF | 12) -#define PB12_AF_MS_SCLK0 (GPIO_PORTB | GPIO_AF | 12) -#define PB13_PF_SD_CMD (GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13) -#define PB13_AF_MS_BS (GPIO_PORTB | GPIO_AF | 13) -#define PB14_AF_SSI_RXFS (GPIO_PORTB | GPIO_AF | 14) -#define PB15_AF_SSI_RXCLK (GPIO_PORTB | GPIO_AF | 15) -#define PB16_AF_SSI_RXDAT (GPIO_PORTB | GPIO_IN | GPIO_AF | 16) -#define PB17_AF_SSI_TXDAT (GPIO_PORTB | GPIO_OUT | GPIO_AF | 17) -#define PB18_AF_SSI_TXFS (GPIO_PORTB | GPIO_AF | 18) -#define PB19_AF_SSI_TXCLK (GPIO_PORTB | GPIO_AF | 19) -#define PB20_PF_USBD_AFE (GPIO_PORTB | GPIO_PF | 20) -#define PB21_PF_USBD_OE (GPIO_PORTB | GPIO_PF | 21) -#define PB22_PFUSBD_RCV (GPIO_PORTB | GPIO_PF | 22) -#define PB23_PF_USBD_SUSPND (GPIO_PORTB | GPIO_PF | 23) -#define PB24_PF_USBD_VP (GPIO_PORTB | GPIO_PF | 24) -#define PB25_PF_USBD_VM (GPIO_PORTB | GPIO_PF | 25) -#define PB26_PF_USBD_VPO (GPIO_PORTB | GPIO_PF | 26) -#define PB27_PF_USBD_VMO (GPIO_PORTB | GPIO_PF | 27) -#define PB28_PF_UART2_CTS (GPIO_PORTB | GPIO_OUT | GPIO_PF | 28) -#define PB29_PF_UART2_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 29) -#define PB30_PF_UART2_TXD (GPIO_PORTB | GPIO_OUT | GPIO_PF | 30) -#define PB31_PF_UART2_RXD (GPIO_PORTB | GPIO_IN | GPIO_PF | 31) -#define PC3_PF_SSI_RXFS (GPIO_PORTC | GPIO_PF | 3) -#define PC4_PF_SSI_RXCLK (GPIO_PORTC | GPIO_PF | 4) -#define PC5_PF_SSI_RXDAT (GPIO_PORTC | GPIO_IN | GPIO_PF | 5) -#define PC6_PF_SSI_TXDAT (GPIO_PORTC | GPIO_OUT | GPIO_PF | 6) -#define PC7_PF_SSI_TXFS (GPIO_PORTC | GPIO_PF | 7) -#define PC8_PF_SSI_TXCLK (GPIO_PORTC | GPIO_PF | 8) -#define PC9_PF_UART1_CTS (GPIO_PORTC | GPIO_OUT | GPIO_PF | 9) -#define PC10_PF_UART1_RTS (GPIO_PORTC | GPIO_IN | GPIO_PF | 10) -#define PC11_PF_UART1_TXD (GPIO_PORTC | GPIO_OUT | GPIO_PF | 11) -#define PC12_PF_UART1_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 12) -#define PC13_PF_SPI1_SPI_RDY (GPIO_PORTC | GPIO_PF | 13) -#define PC14_PF_SPI1_SCLK (GPIO_PORTC | GPIO_PF | 14) -#define PC15_PF_SPI1_SS (GPIO_PORTC | GPIO_PF | 15) -#define PC16_PF_SPI1_MISO (GPIO_PORTC | GPIO_PF | 16) -#define PC17_PF_SPI1_MOSI (GPIO_PORTC | GPIO_PF | 17) -#define PC24_BIN_UART3_RI (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24) -#define PC25_BIN_UART3_DSR (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25) -#define PC26_AOUT_UART3_DTR (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26) -#define PC27_BIN_UART3_DCD (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27) -#define PC28_BIN_UART3_CTS (GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28) -#define PC29_AOUT_UART3_RTS (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29) -#define PC30_BIN_UART3_TX (GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30) -#define PC31_AOUT_UART3_RX (GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) -#define PD6_PF_LSCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 6) -#define PD7_PF_REV (GPIO_PORTD | GPIO_PF | 7) -#define PD7_AF_UART2_DTR (GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7) -#define PD7_AIN_SPI2_SCLK (GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7) -#define PD8_PF_CLS (GPIO_PORTD | GPIO_PF | 8) -#define PD8_AF_UART2_DCD (GPIO_PORTD | GPIO_OUT | GPIO_AF | 8) -#define PD8_AIN_SPI2_SS (GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8) -#define PD9_PF_PS (GPIO_PORTD | GPIO_PF | 9) -#define PD9_AF_UART2_RI (GPIO_PORTD | GPIO_OUT | GPIO_AF | 9) -#define PD9_AOUT_SPI2_RXD (GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9) -#define PD10_PF_SPL_SPR (GPIO_PORTD | GPIO_OUT | GPIO_PF | 10) -#define PD10_AF_UART2_DSR (GPIO_PORTD | GPIO_OUT | GPIO_AF | 10) -#define PD10_AIN_SPI2_TXD (GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10) -#define PD11_PF_CONTRAST (GPIO_PORTD | GPIO_OUT | GPIO_PF | 11) -#define PD12_PF_ACD_OE (GPIO_PORTD | GPIO_OUT | GPIO_PF | 12) -#define PD13_PF_LP_HSYNC (GPIO_PORTD | GPIO_OUT | GPIO_PF | 13) -#define PD14_PF_FLM_VSYNC (GPIO_PORTD | GPIO_OUT | GPIO_PF | 14) -#define PD15_PF_LD0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 15) -#define PD16_PF_LD1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 16) -#define PD17_PF_LD2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) -#define PD18_PF_LD3 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) -#define PD19_PF_LD4 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 19) -#define PD20_PF_LD5 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 20) -#define PD21_PF_LD6 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 21) -#define PD22_PF_LD7 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 22) -#define PD23_PF_LD8 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 23) -#define PD24_PF_LD9 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 24) -#define PD25_PF_LD10 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) -#define PD26_PF_LD11 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) -#define PD27_PF_LD12 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) -#define PD28_PF_LD13 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) -#define PD29_PF_LD14 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) -#define PD30_PF_LD15 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 30) -#define PD31_PF_TMR2OUT (GPIO_PORTD | GPIO_PF | 31) -#define PD31_BIN_SPI2_TXD (GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31) -#endif - -#ifdef CONFIG_ARCH_MX2 -#define PA5_PF_LSCLK (GPIO_PORTA | GPIO_OUT | GPIO_PF | 5) -#define PA6_PF_LD0 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 6) -#define PA7_PF_LD1 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 7) -#define PA8_PF_LD2 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 8) -#define PA9_PF_LD3 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 9) -#define PA10_PF_LD4 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 10) -#define PA11_PF_LD5 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 11) -#define PA12_PF_LD6 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 12) -#define PA13_PF_LD7 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 13) -#define PA14_PF_LD8 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 14) -#define PA15_PF_LD9 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 15) -#define PA16_PF_LD10 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 16) -#define PA17_PF_LD11 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 17) -#define PA18_PF_LD12 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 18) -#define PA19_PF_LD13 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 19) -#define PA20_PF_LD14 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 20) -#define PA21_PF_LD15 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 21) -#define PA22_PF_LD16 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 22) -#define PA23_PF_LD17 (GPIO_PORTA | GPIO_OUT | GPIO_PF | 23) -#define PA24_PF_REV (GPIO_PORTA | GPIO_OUT | GPIO_PF | 24) -#define PA25_PF_CLS (GPIO_PORTA | GPIO_OUT | GPIO_PF | 25) -#define PA26_PF_PS (GPIO_PORTA | GPIO_OUT | GPIO_PF | 26) -#define PA27_PF_SPL_SPR (GPIO_PORTA | GPIO_OUT | GPIO_PF | 27) -#define PA28_PF_HSYNC (GPIO_PORTA | GPIO_OUT | GPIO_PF | 28) -#define PA29_PF_VSYNC (GPIO_PORTA | GPIO_OUT | GPIO_PF | 29) -#define PA30_PF_CONTRAST (GPIO_PORTA | GPIO_OUT | GPIO_PF | 30) -#define PA31_PF_OE_ACD (GPIO_PORTA | GPIO_OUT | GPIO_PF | 31) -#define PB10_PF_CSI_D0 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 10) -#define PB10_AF_UART6_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 10) -#define PB11_PF_CSI_D1 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 11) -#define PB11_AF_UART6_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 11) -#define PB12_PF_CSI_D2 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 12) -#define PB12_AF_UART6_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 12) -#define PB13_PF_CSI_D3 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 13) -#define PB13_AF_UART6_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 13) -#define PB14_PF_CSI_D4 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 14) -#define PB15_PF_CSI_MCLK (GPIO_PORTB | GPIO_OUT | GPIO_PF | 15) -#define PB16_PF_CSI_PIXCLK (GPIO_PORTB | GPIO_OUT | GPIO_PF | 16) -#define PB17_PF_CSI_D5 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 17) -#define PB18_PF_CSI_D6 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 18) -#define PB18_AF_UART5_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 18) -#define PB19_PF_CSI_D7 (GPIO_PORTB | GPIO_OUT | GPIO_PF | 19) -#define PB19_AF_UART5_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 19) -#define PB20_PF_CSI_VSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 20) -#define PB20_AF_UART5_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 20) -#define PB21_PF_CSI_HSYNC (GPIO_PORTB | GPIO_OUT | GPIO_PF | 21) -#define PB21_AF_UART5_RTS (GPIO_PORTB | GPIO_IN | GPIO_AF | 21) -#define PB26_AF_UART4_RTS (GPIO_PORTB | GPIO_IN | GPIO_PF | 26) -#define PB28_AF_UART4_TXD (GPIO_PORTB | GPIO_OUT | GPIO_AF | 28) -#define PB29_AF_UART4_CTS (GPIO_PORTB | GPIO_OUT | GPIO_AF | 29) -#define PB31_AF_UART4_RXD (GPIO_PORTB | GPIO_IN | GPIO_AF | 31) -#define PC5_PF_I2C2_SDA (GPIO_PORTC | GPIO_IN | GPIO_PF | 5) -#define PC6_PF_I2C2_SCL (GPIO_PORTC | GPIO_IN | GPIO_PF | 6) -#define PC16_PF_SSI4_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 16) -#define PC17_PF_SSI4_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 17) -#define PC18_PF_SSI4_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 18) -#define PC19_PF_SSI4_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 19) -#define PC20_PF_SSI1_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 20) -#define PC21_PF_SSI1_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 21) -#define PC22_PF_SSI1_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 22) -#define PC23_PF_SSI1_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 23) -#define PC24_PF_SSI2_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 24) -#define PC25_PF_SSI2_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 25) -#define PC26_PF_SSI2_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 26) -#define PC27_PF_SSI2_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 27) -#define PC28_PF_SSI3_FS (GPIO_PORTC | GPIO_IN | GPIO_PF | 28) -#define PC29_PF_SSI3_RXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 29) -#define PC30_PF_SSI3_TXD (GPIO_PORTC | GPIO_IN | GPIO_PF | 30) -#define PC31_PF_SSI3_CLK (GPIO_PORTC | GPIO_IN | GPIO_PF | 31) -#define PD0_AIN_FEC_TXD0 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 0) -#define PD1_AIN_FEC_TXD1 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 1) -#define PD2_AIN_FEC_TXD2 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 2) -#define PD3_AIN_FEC_TXD3 (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 3) -#define PD4_AOUT_FEC_RX_ER (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 4) -#define PD5_AOUT_FEC_RXD1 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 5) -#define PD6_AOUT_FEC_RXD2 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 6) -#define PD7_AOUT_FEC_RXD3 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 7) -#define PD8_AF_FEC_MDIO (GPIO_PORTD | GPIO_IN | GPIO_AF | 8) -#define PD9_AIN_FEC_MDC (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 9) -#define PD10_AOUT_FEC_CRS (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 10) -#define PD11_AOUT_FEC_TX_CLK (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 11) -#define PD12_AOUT_FEC_RXD0 (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 12) -#define PD13_AOUT_FEC_RX_DV (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 13) -#define PD14_AOUT_FEC_CLR (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 14) -#define PD15_AOUT_FEC_COL (GPIO_PORTD | GPIO_IN | GPIO_AOUT | 15) -#define PD16_AIN_FEC_TX_ER (GPIO_PORTD | GPIO_OUT | GPIO_AIN | 16) -#define PD17_PF_I2C_DATA (GPIO_PORTD | GPIO_OUT | GPIO_PF | 17) -#define PD18_PF_I2C_CLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 18) -#define PD25_PF_CSPI1_RDY (GPIO_PORTD | GPIO_OUT | GPIO_PF | 25) -#define PD26_PF_CSPI1_SS2 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 26) -#define PD27_PF_CSPI1_SS1 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 27) -#define PD28_PF_CSPI1_SS0 (GPIO_PORTD | GPIO_OUT | GPIO_PF | 28) -#define PD29_PF_CSPI1_SCLK (GPIO_PORTD | GPIO_OUT | GPIO_PF | 29) -#define PD30_PF_CSPI1_MISO (GPIO_PORTD | GPIO_IN | GPIO_PF | 30) -#define PD31_PF_CSPI1_MOSI (GPIO_PORTD | GPIO_OUT | GPIO_PF | 31) -#define PF23_AIN_FEC_TX_EN (GPIO_PORTF | GPIO_OUT | GPIO_AIN | 23) -#define PE3_PF_UART2_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 3) -#define PE4_PF_UART2_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 4) -#define PE6_PF_UART2_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 6) -#define PE7_PF_UART2_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 7) -#define PE8_PF_UART3_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 8) -#define PE9_PF_UART3_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 9) -#define PE10_PF_UART3_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 10) -#define PE11_PF_UART3_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 11) -#define PE12_PF_UART1_TXD (GPIO_PORTE | GPIO_OUT | GPIO_PF | 12) -#define PE13_PF_UART1_RXD (GPIO_PORTE | GPIO_IN | GPIO_PF | 13) -#define PE14_PF_UART1_CTS (GPIO_PORTE | GPIO_OUT | GPIO_PF | 14) -#define PE15_PF_UART1_RTS (GPIO_PORTE | GPIO_IN | GPIO_PF | 15) -#define PE18_AF_CSPI3_MISO (GPIO_PORTE | GPIO_IN | GPIO_AF | 18) -#define PE21_AF_CSPI3_SS (GPIO_PORTE | GPIO_OUT | GPIO_AF | 21) -#define PE22_AF_CSPI3_MOSI (GPIO_PORTE | GPIO_OUT | GPIO_AF | 22) -#define PE23_AF_CSPI3_SCLK (GPIO_PORTE | GPIO_OUT | GPIO_AF | 23) -#endif - -/* decode irq number to use with IMR(x), ISR(x) and friends */ -#define IRQ_TO_REG(irq) ((irq - MXC_MAX_INT_LINES) >> 5) - -#define IRQ_GPIOA(x) (MXC_MAX_INT_LINES + x) -#define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) -#define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) -#define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) - -#endif /* _MXC_GPIO_MX1_MX2_H */ diff --git a/include/asm-arm/arch-mxc/iomux-mx3.h b/include/asm-arm/arch-mxc/iomux-mx3.h deleted file mode 100644 index 7509e76..0000000 --- a/include/asm-arm/arch-mxc/iomux-mx3.h +++ /dev/null @@ -1,501 +0,0 @@ -/* - * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright (C) 2008 by Sascha Hauer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __MACH_MX31_IOMUX_H__ -#define __MACH_MX31_IOMUX_H__ - -#include - -/* - * various IOMUX output functions - */ - -#define IOMUX_OCONFIG_GPIO (0 << 4) /* used as GPIO */ -#define IOMUX_OCONFIG_FUNC (1 << 4) /* used as function */ -#define IOMUX_OCONFIG_ALT1 (2 << 4) /* used as alternate function 1 */ -#define IOMUX_OCONFIG_ALT2 (3 << 4) /* used as alternate function 2 */ -#define IOMUX_OCONFIG_ALT3 (4 << 4) /* used as alternate function 3 */ -#define IOMUX_OCONFIG_ALT4 (5 << 4) /* used as alternate function 4 */ -#define IOMUX_OCONFIG_ALT5 (6 << 4) /* used as alternate function 5 */ -#define IOMUX_OCONFIG_ALT6 (7 << 4) /* used as alternate function 6 */ -#define IOMUX_ICONFIG_NONE 0 /* not configured for input */ -#define IOMUX_ICONFIG_GPIO 1 /* used as GPIO */ -#define IOMUX_ICONFIG_FUNC 2 /* used as function */ -#define IOMUX_ICONFIG_ALT1 4 /* used as alternate function 1 */ -#define IOMUX_ICONFIG_ALT2 8 /* used as alternate function 2 */ - -#define IOMUX_CONFIG_GPIO (IOMUX_OCONFIG_GPIO | IOMUX_ICONFIG_GPIO) -#define IOMUX_CONFIG_FUNC (IOMUX_OCONFIG_FUNC | IOMUX_ICONFIG_FUNC) -#define IOMUX_CONFIG_ALT1 (IOMUX_OCONFIG_ALT1 | IOMUX_ICONFIG_ALT1) -#define IOMUX_CONFIG_ALT2 (IOMUX_OCONFIG_ALT2 | IOMUX_ICONFIG_ALT2) - -/* - * various IOMUX pad functions - */ -enum iomux_pad_config { - PAD_CTL_NOLOOPBACK = 0x0 << 9, - PAD_CTL_LOOPBACK = 0x1 << 9, - PAD_CTL_PKE_NONE = 0x0 << 8, - PAD_CTL_PKE_ENABLE = 0x1 << 8, - PAD_CTL_PUE_KEEPER = 0x0 << 7, - PAD_CTL_PUE_PUD = 0x1 << 7, - PAD_CTL_100K_PD = 0x0 << 5, - PAD_CTL_100K_PU = 0x1 << 5, - PAD_CTL_47K_PU = 0x2 << 5, - PAD_CTL_22K_PU = 0x3 << 5, - PAD_CTL_HYS_CMOS = 0x0 << 4, - PAD_CTL_HYS_SCHMITZ = 0x1 << 4, - PAD_CTL_ODE_CMOS = 0x0 << 3, - PAD_CTL_ODE_OpenDrain = 0x1 << 3, - PAD_CTL_DRV_NORMAL = 0x0 << 1, - PAD_CTL_DRV_HIGH = 0x1 << 1, - PAD_CTL_DRV_MAX = 0x2 << 1, - PAD_CTL_SRE_SLOW = 0x0 << 0, - PAD_CTL_SRE_FAST = 0x1 << 0 -}; - -/* - * various IOMUX general purpose functions - */ -enum iomux_gp_func { - MUX_PGP_FIRI = 1 << 0, - MUX_DDR_MODE = 1 << 1, - MUX_PGP_CSPI_BB = 1 << 2, - MUX_PGP_ATA_1 = 1 << 3, - MUX_PGP_ATA_2 = 1 << 4, - MUX_PGP_ATA_3 = 1 << 5, - MUX_PGP_ATA_4 = 1 << 6, - MUX_PGP_ATA_5 = 1 << 7, - MUX_PGP_ATA_6 = 1 << 8, - MUX_PGP_ATA_7 = 1 << 9, - MUX_PGP_ATA_8 = 1 << 10, - MUX_PGP_UH2 = 1 << 11, - MUX_SDCTL_CSD0_SEL = 1 << 12, - MUX_SDCTL_CSD1_SEL = 1 << 13, - MUX_CSPI1_UART3 = 1 << 14, - MUX_EXTDMAREQ2_MBX_SEL = 1 << 15, - MUX_TAMPER_DETECT_EN = 1 << 16, - MUX_PGP_USB_4WIRE = 1 << 17, - MUX_PGB_USB_COMMON = 1 << 18, - MUX_SDHC_MEMSTICK1 = 1 << 19, - MUX_SDHC_MEMSTICK2 = 1 << 20, - MUX_PGP_SPLL_BYP = 1 << 21, - MUX_PGP_UPLL_BYP = 1 << 22, - MUX_PGP_MSHC1_CLK_SEL = 1 << 23, - MUX_PGP_MSHC2_CLK_SEL = 1 << 24, - MUX_CSPI3_UART5_SEL = 1 << 25, - MUX_PGP_ATA_9 = 1 << 26, - MUX_PGP_USB_SUSPEND = 1 << 27, - MUX_PGP_USB_OTG_LOOPBACK = 1 << 28, - MUX_PGP_USB_HS1_LOOPBACK = 1 << 29, - MUX_PGP_USB_HS2_LOOPBACK = 1 << 30, - MUX_CLKO_DDR_MODE = 1 << 31, -}; - -/* - * This function enables/disables the general purpose function for a particular - * signal. - */ -void iomux_config_gpr(enum iomux_gp_func , bool); - -/* - * set the mode for a IOMUX pin. - */ -int mxc_iomux_mode(unsigned int); - -/* - * This function enables/disables the general purpose function for a particular - * signal. - */ -void mxc_iomux_set_gpr(enum iomux_gp_func, bool); - -#define IOMUX_PADNUM_MASK 0x1ff -#define IOMUX_GPIONUM_SHIFT 9 -#define IOMUX_GPIONUM_MASK (0xff << IOMUX_GPIONUM_SHIFT) -#define IOMUX_MODE_SHIFT 17 -#define IOMUX_MODE_MASK (0xff << IOMUX_MODE_SHIFT) - -#define IOMUX_PIN(gpionum, padnum) \ - (((gpionum << IOMUX_GPIONUM_SHIFT) & IOMUX_GPIONUM_MASK) | \ - (padnum & IOMUX_PADNUM_MASK)) - -#define IOMUX_MODE(pin, mode) (pin | mode << IOMUX_MODE_SHIFT) - -#define IOMUX_TO_GPIO(iomux_pin) \ - ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) -#define IOMUX_TO_IRQ(iomux_pin) \ - (((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \ - MXC_GPIO_INT_BASE) - -/* - * This enumeration is constructed based on the Section - * "sw_pad_ctl & sw_mux_ctl details" of the MX31 IC Spec. Each enumerated - * value is constructed based on the rules described above. - */ - -enum iomux_pins { - MX31_PIN_TTM_PAD = IOMUX_PIN(0xff, 0), - MX31_PIN_CSPI3_SPI_RDY = IOMUX_PIN(0xff, 1), - MX31_PIN_CSPI3_SCLK = IOMUX_PIN(0xff, 2), - MX31_PIN_CSPI3_MISO = IOMUX_PIN(0xff, 3), - MX31_PIN_CSPI3_MOSI = IOMUX_PIN(0xff, 4), - MX31_PIN_CLKSS = IOMUX_PIN(0xff, 5), - MX31_PIN_CE_CONTROL = IOMUX_PIN(0xff, 6), - MX31_PIN_ATA_RESET_B = IOMUX_PIN(95, 7), - MX31_PIN_ATA_DMACK = IOMUX_PIN(94, 8), - MX31_PIN_ATA_DIOW = IOMUX_PIN(93, 9), - MX31_PIN_ATA_DIOR = IOMUX_PIN(92, 10), - MX31_PIN_ATA_CS1 = IOMUX_PIN(91, 11), - MX31_PIN_ATA_CS0 = IOMUX_PIN(90, 12), - MX31_PIN_SD1_DATA3 = IOMUX_PIN(63, 13), - MX31_PIN_SD1_DATA2 = IOMUX_PIN(62, 14), - MX31_PIN_SD1_DATA1 = IOMUX_PIN(61, 15), - MX31_PIN_SD1_DATA0 = IOMUX_PIN(60, 16), - MX31_PIN_SD1_CLK = IOMUX_PIN(59, 17), - MX31_PIN_SD1_CMD = IOMUX_PIN(58, 18), - MX31_PIN_D3_SPL = IOMUX_PIN(0xff, 19), - MX31_PIN_D3_CLS = IOMUX_PIN(0xff, 20), - MX31_PIN_D3_REV = IOMUX_PIN(0xff, 21), - MX31_PIN_CONTRAST = IOMUX_PIN(0xff, 22), - MX31_PIN_VSYNC3 = IOMUX_PIN(0xff, 23), - MX31_PIN_READ = IOMUX_PIN(0xff, 24), - MX31_PIN_WRITE = IOMUX_PIN(0xff, 25), - MX31_PIN_PAR_RS = IOMUX_PIN(0xff, 26), - MX31_PIN_SER_RS = IOMUX_PIN(89, 27), - MX31_PIN_LCS1 = IOMUX_PIN(88, 28), - MX31_PIN_LCS0 = IOMUX_PIN(87, 29), - MX31_PIN_SD_D_CLK = IOMUX_PIN(86, 30), - MX31_PIN_SD_D_IO = IOMUX_PIN(85, 31), - MX31_PIN_SD_D_I = IOMUX_PIN(84, 32), - MX31_PIN_DRDY0 = IOMUX_PIN(0xff, 33), - MX31_PIN_FPSHIFT = IOMUX_PIN(0xff, 34), - MX31_PIN_HSYNC = IOMUX_PIN(0xff, 35), - MX31_PIN_VSYNC0 = IOMUX_PIN(0xff, 36), - MX31_PIN_LD17 = IOMUX_PIN(0xff, 37), - MX31_PIN_LD16 = IOMUX_PIN(0xff, 38), - MX31_PIN_LD15 = IOMUX_PIN(0xff, 39), - MX31_PIN_LD14 = IOMUX_PIN(0xff, 40), - MX31_PIN_LD13 = IOMUX_PIN(0xff, 41), - MX31_PIN_LD12 = IOMUX_PIN(0xff, 42), - MX31_PIN_LD11 = IOMUX_PIN(0xff, 43), - MX31_PIN_LD10 = IOMUX_PIN(0xff, 44), - MX31_PIN_LD9 = IOMUX_PIN(0xff, 45), - MX31_PIN_LD8 = IOMUX_PIN(0xff, 46), - MX31_PIN_LD7 = IOMUX_PIN(0xff, 47), - MX31_PIN_LD6 = IOMUX_PIN(0xff, 48), - MX31_PIN_LD5 = IOMUX_PIN(0xff, 49), - MX31_PIN_LD4 = IOMUX_PIN(0xff, 50), - MX31_PIN_LD3 = IOMUX_PIN(0xff, 51), - MX31_PIN_LD2 = IOMUX_PIN(0xff, 52), - MX31_PIN_LD1 = IOMUX_PIN(0xff, 53), - MX31_PIN_LD0 = IOMUX_PIN(0xff, 54), - MX31_PIN_USBH2_DATA1 = IOMUX_PIN(0xff, 55), - MX31_PIN_USBH2_DATA0 = IOMUX_PIN(0xff, 56), - MX31_PIN_USBH2_NXT = IOMUX_PIN(0xff, 57), - MX31_PIN_USBH2_STP = IOMUX_PIN(0xff, 58), - MX31_PIN_USBH2_DIR = IOMUX_PIN(0xff, 59), - MX31_PIN_USBH2_CLK = IOMUX_PIN(0xff, 60), - MX31_PIN_USBOTG_DATA7 = IOMUX_PIN(0xff, 61), - MX31_PIN_USBOTG_DATA6 = IOMUX_PIN(0xff, 62), - MX31_PIN_USBOTG_DATA5 = IOMUX_PIN(0xff, 63), - MX31_PIN_USBOTG_DATA4 = IOMUX_PIN(0xff, 64), - MX31_PIN_USBOTG_DATA3 = IOMUX_PIN(0xff, 65), - MX31_PIN_USBOTG_DATA2 = IOMUX_PIN(0xff, 66), - MX31_PIN_USBOTG_DATA1 = IOMUX_PIN(0xff, 67), - MX31_PIN_USBOTG_DATA0 = IOMUX_PIN(0xff, 68), - MX31_PIN_USBOTG_NXT = IOMUX_PIN(0xff, 69), - MX31_PIN_USBOTG_STP = IOMUX_PIN(0xff, 70), - MX31_PIN_USBOTG_DIR = IOMUX_PIN(0xff, 71), - MX31_PIN_USBOTG_CLK = IOMUX_PIN(0xff, 72), - MX31_PIN_USB_BYP = IOMUX_PIN(31, 73), - MX31_PIN_USB_OC = IOMUX_PIN(30, 74), - MX31_PIN_USB_PWR = IOMUX_PIN(29, 75), - MX31_PIN_SJC_MOD = IOMUX_PIN(0xff, 76), - MX31_PIN_DE_B = IOMUX_PIN(0xff, 77), - MX31_PIN_TRSTB = IOMUX_PIN(0xff, 78), - MX31_PIN_TDO = IOMUX_PIN(0xff, 79), - MX31_PIN_TDI = IOMUX_PIN(0xff, 80), - MX31_PIN_TMS = IOMUX_PIN(0xff, 81), - MX31_PIN_TCK = IOMUX_PIN(0xff, 82), - MX31_PIN_RTCK = IOMUX_PIN(0xff, 83), - MX31_PIN_KEY_COL7 = IOMUX_PIN(57, 84), - MX31_PIN_KEY_COL6 = IOMUX_PIN(56, 85), - MX31_PIN_KEY_COL5 = IOMUX_PIN(55, 86), - MX31_PIN_KEY_COL4 = IOMUX_PIN(54, 87), - MX31_PIN_KEY_COL3 = IOMUX_PIN(0xff, 88), - MX31_PIN_KEY_COL2 = IOMUX_PIN(0xff, 89), - MX31_PIN_KEY_COL1 = IOMUX_PIN(0xff, 90), - MX31_PIN_KEY_COL0 = IOMUX_PIN(0xff, 91), - MX31_PIN_KEY_ROW7 = IOMUX_PIN(53, 92), - MX31_PIN_KEY_ROW6 = IOMUX_PIN(52, 93), - MX31_PIN_KEY_ROW5 = IOMUX_PIN(51, 94), - MX31_PIN_KEY_ROW4 = IOMUX_PIN(50, 95), - MX31_PIN_KEY_ROW3 = IOMUX_PIN(0xff, 96), - MX31_PIN_KEY_ROW2 = IOMUX_PIN(0xff, 97), - MX31_PIN_KEY_ROW1 = IOMUX_PIN(0xff, 98), - MX31_PIN_KEY_ROW0 = IOMUX_PIN(0xff, 99), - MX31_PIN_BATT_LINE = IOMUX_PIN(49, 100), - MX31_PIN_CTS2 = IOMUX_PIN(0xff, 101), - MX31_PIN_RTS2 = IOMUX_PIN(0xff, 102), - MX31_PIN_TXD2 = IOMUX_PIN(28, 103), - MX31_PIN_RXD2 = IOMUX_PIN(27, 104), - MX31_PIN_DTR_DCE2 = IOMUX_PIN(48, 105), - MX31_PIN_DCD_DTE1 = IOMUX_PIN(47, 106), - MX31_PIN_RI_DTE1 = IOMUX_PIN(46, 107), - MX31_PIN_DSR_DTE1 = IOMUX_PIN(45, 108), - MX31_PIN_DTR_DTE1 = IOMUX_PIN(44, 109), - MX31_PIN_DCD_DCE1 = IOMUX_PIN(43, 110), - MX31_PIN_RI_DCE1 = IOMUX_PIN(42, 111), - MX31_PIN_DSR_DCE1 = IOMUX_PIN(41, 112), - MX31_PIN_DTR_DCE1 = IOMUX_PIN(40, 113), - MX31_PIN_CTS1 = IOMUX_PIN(39, 114), - MX31_PIN_RTS1 = IOMUX_PIN(38, 115), - MX31_PIN_TXD1 = IOMUX_PIN(37, 116), - MX31_PIN_RXD1 = IOMUX_PIN(36, 117), - MX31_PIN_CSPI2_SPI_RDY = IOMUX_PIN(0xff, 118), - MX31_PIN_CSPI2_SCLK = IOMUX_PIN(0xff, 119), - MX31_PIN_CSPI2_SS2 = IOMUX_PIN(0xff, 120), - MX31_PIN_CSPI2_SS1 = IOMUX_PIN(0xff, 121), - MX31_PIN_CSPI2_SS0 = IOMUX_PIN(0xff, 122), - MX31_PIN_CSPI2_MISO = IOMUX_PIN(0xff, 123), - MX31_PIN_CSPI2_MOSI = IOMUX_PIN(0xff, 124), - MX31_PIN_CSPI1_SPI_RDY = IOMUX_PIN(0xff, 125), - MX31_PIN_CSPI1_SCLK = IOMUX_PIN(0xff, 126), - MX31_PIN_CSPI1_SS2 = IOMUX_PIN(0xff, 127), - MX31_PIN_CSPI1_SS1 = IOMUX_PIN(0xff, 128), - MX31_PIN_CSPI1_SS0 = IOMUX_PIN(0xff, 129), - MX31_PIN_CSPI1_MISO = IOMUX_PIN(0xff, 130), - MX31_PIN_CSPI1_MOSI = IOMUX_PIN(0xff, 131), - MX31_PIN_SFS6 = IOMUX_PIN(26, 132), - MX31_PIN_SCK6 = IOMUX_PIN(25, 133), - MX31_PIN_SRXD6 = IOMUX_PIN(24, 134), - MX31_PIN_STXD6 = IOMUX_PIN(23, 135), - MX31_PIN_SFS5 = IOMUX_PIN(0xff, 136), - MX31_PIN_SCK5 = IOMUX_PIN(0xff, 137), - MX31_PIN_SRXD5 = IOMUX_PIN(22, 138), - MX31_PIN_STXD5 = IOMUX_PIN(21, 139), - MX31_PIN_SFS4 = IOMUX_PIN(0xff, 140), - MX31_PIN_SCK4 = IOMUX_PIN(0xff, 141), - MX31_PIN_SRXD4 = IOMUX_PIN(20, 142), - MX31_PIN_STXD4 = IOMUX_PIN(19, 143), - MX31_PIN_SFS3 = IOMUX_PIN(0xff, 144), - MX31_PIN_SCK3 = IOMUX_PIN(0xff, 145), - MX31_PIN_SRXD3 = IOMUX_PIN(18, 146), - MX31_PIN_STXD3 = IOMUX_PIN(17, 147), - MX31_PIN_I2C_DAT = IOMUX_PIN(0xff, 148), - MX31_PIN_I2C_CLK = IOMUX_PIN(0xff, 149), - MX31_PIN_CSI_PIXCLK = IOMUX_PIN(83, 150), - MX31_PIN_CSI_HSYNC = IOMUX_PIN(82, 151), - MX31_PIN_CSI_VSYNC = IOMUX_PIN(81, 152), - MX31_PIN_CSI_MCLK = IOMUX_PIN(80, 153), - MX31_PIN_CSI_D15 = IOMUX_PIN(79, 154), - MX31_PIN_CSI_D14 = IOMUX_PIN(78, 155), - MX31_PIN_CSI_D13 = IOMUX_PIN(77, 156), - MX31_PIN_CSI_D12 = IOMUX_PIN(76, 157), - MX31_PIN_CSI_D11 = IOMUX_PIN(75, 158), - MX31_PIN_CSI_D10 = IOMUX_PIN(74, 159), - MX31_PIN_CSI_D9 = IOMUX_PIN(73, 160), - MX31_PIN_CSI_D8 = IOMUX_PIN(72, 161), - MX31_PIN_CSI_D7 = IOMUX_PIN(71, 162), - MX31_PIN_CSI_D6 = IOMUX_PIN(70, 163), - MX31_PIN_CSI_D5 = IOMUX_PIN(69, 164), - MX31_PIN_CSI_D4 = IOMUX_PIN(68, 165), - MX31_PIN_M_GRANT = IOMUX_PIN(0xff, 166), - MX31_PIN_M_REQUEST = IOMUX_PIN(0xff, 167), - MX31_PIN_PC_POE = IOMUX_PIN(0xff, 168), - MX31_PIN_PC_RW_B = IOMUX_PIN(0xff, 169), - MX31_PIN_IOIS16 = IOMUX_PIN(0xff, 170), - MX31_PIN_PC_RST = IOMUX_PIN(0xff, 171), - MX31_PIN_PC_BVD2 = IOMUX_PIN(0xff, 172), - MX31_PIN_PC_BVD1 = IOMUX_PIN(0xff, 173), - MX31_PIN_PC_VS2 = IOMUX_PIN(0xff, 174), - MX31_PIN_PC_VS1 = IOMUX_PIN(0xff, 175), - MX31_PIN_PC_PWRON = IOMUX_PIN(0xff, 176), - MX31_PIN_PC_READY = IOMUX_PIN(0xff, 177), - MX31_PIN_PC_WAIT_B = IOMUX_PIN(0xff, 178), - MX31_PIN_PC_CD2_B = IOMUX_PIN(0xff, 179), - MX31_PIN_PC_CD1_B = IOMUX_PIN(0xff, 180), - MX31_PIN_D0 = IOMUX_PIN(0xff, 181), - MX31_PIN_D1 = IOMUX_PIN(0xff, 182), - MX31_PIN_D2 = IOMUX_PIN(0xff, 183), - MX31_PIN_D3 = IOMUX_PIN(0xff, 184), - MX31_PIN_D4 = IOMUX_PIN(0xff, 185), - MX31_PIN_D5 = IOMUX_PIN(0xff, 186), - MX31_PIN_D6 = IOMUX_PIN(0xff, 187), - MX31_PIN_D7 = IOMUX_PIN(0xff, 188), - MX31_PIN_D8 = IOMUX_PIN(0xff, 189), - MX31_PIN_D9 = IOMUX_PIN(0xff, 190), - MX31_PIN_D10 = IOMUX_PIN(0xff, 191), - MX31_PIN_D11 = IOMUX_PIN(0xff, 192), - MX31_PIN_D12 = IOMUX_PIN(0xff, 193), - MX31_PIN_D13 = IOMUX_PIN(0xff, 194), - MX31_PIN_D14 = IOMUX_PIN(0xff, 195), - MX31_PIN_D15 = IOMUX_PIN(0xff, 196), - MX31_PIN_NFRB = IOMUX_PIN(16, 197), - MX31_PIN_NFCE_B = IOMUX_PIN(15, 198), - MX31_PIN_NFWP_B = IOMUX_PIN(14, 199), - MX31_PIN_NFCLE = IOMUX_PIN(13, 200), - MX31_PIN_NFALE = IOMUX_PIN(12, 201), - MX31_PIN_NFRE_B = IOMUX_PIN(11, 202), - MX31_PIN_NFWE_B = IOMUX_PIN(10, 203), - MX31_PIN_SDQS3 = IOMUX_PIN(0xff, 204), - MX31_PIN_SDQS2 = IOMUX_PIN(0xff, 205), - MX31_PIN_SDQS1 = IOMUX_PIN(0xff, 206), - MX31_PIN_SDQS0 = IOMUX_PIN(0xff, 207), - MX31_PIN_SDCLK_B = IOMUX_PIN(0xff, 208), - MX31_PIN_SDCLK = IOMUX_PIN(0xff, 209), - MX31_PIN_SDCKE1 = IOMUX_PIN(0xff, 210), - MX31_PIN_SDCKE0 = IOMUX_PIN(0xff, 211), - MX31_PIN_SDWE = IOMUX_PIN(0xff, 212), - MX31_PIN_CAS = IOMUX_PIN(0xff, 213), - MX31_PIN_RAS = IOMUX_PIN(0xff, 214), - MX31_PIN_RW = IOMUX_PIN(0xff, 215), - MX31_PIN_BCLK = IOMUX_PIN(0xff, 216), - MX31_PIN_LBA = IOMUX_PIN(0xff, 217), - MX31_PIN_ECB = IOMUX_PIN(0xff, 218), - MX31_PIN_CS5 = IOMUX_PIN(0xff, 219), - MX31_PIN_CS4 = IOMUX_PIN(0xff, 220), - MX31_PIN_CS3 = IOMUX_PIN(0xff, 221), - MX31_PIN_CS2 = IOMUX_PIN(0xff, 222), - MX31_PIN_CS1 = IOMUX_PIN(0xff, 223), - MX31_PIN_CS0 = IOMUX_PIN(0xff, 224), - MX31_PIN_OE = IOMUX_PIN(0xff, 225), - MX31_PIN_EB1 = IOMUX_PIN(0xff, 226), - MX31_PIN_EB0 = IOMUX_PIN(0xff, 227), - MX31_PIN_DQM3 = IOMUX_PIN(0xff, 228), - MX31_PIN_DQM2 = IOMUX_PIN(0xff, 229), - MX31_PIN_DQM1 = IOMUX_PIN(0xff, 230), - MX31_PIN_DQM0 = IOMUX_PIN(0xff, 231), - MX31_PIN_SD31 = IOMUX_PIN(0xff, 232), - MX31_PIN_SD30 = IOMUX_PIN(0xff, 233), - MX31_PIN_SD29 = IOMUX_PIN(0xff, 234), - MX31_PIN_SD28 = IOMUX_PIN(0xff, 235), - MX31_PIN_SD27 = IOMUX_PIN(0xff, 236), - MX31_PIN_SD26 = IOMUX_PIN(0xff, 237), - MX31_PIN_SD25 = IOMUX_PIN(0xff, 238), - MX31_PIN_SD24 = IOMUX_PIN(0xff, 239), - MX31_PIN_SD23 = IOMUX_PIN(0xff, 240), - MX31_PIN_SD22 = IOMUX_PIN(0xff, 241), - MX31_PIN_SD21 = IOMUX_PIN(0xff, 242), - MX31_PIN_SD20 = IOMUX_PIN(0xff, 243), - MX31_PIN_SD19 = IOMUX_PIN(0xff, 244), - MX31_PIN_SD18 = IOMUX_PIN(0xff, 245), - MX31_PIN_SD17 = IOMUX_PIN(0xff, 246), - MX31_PIN_SD16 = IOMUX_PIN(0xff, 247), - MX31_PIN_SD15 = IOMUX_PIN(0xff, 248), - MX31_PIN_SD14 = IOMUX_PIN(0xff, 249), - MX31_PIN_SD13 = IOMUX_PIN(0xff, 250), - MX31_PIN_SD12 = IOMUX_PIN(0xff, 251), - MX31_PIN_SD11 = IOMUX_PIN(0xff, 252), - MX31_PIN_SD10 = IOMUX_PIN(0xff, 253), - MX31_PIN_SD9 = IOMUX_PIN(0xff, 254), - MX31_PIN_SD8 = IOMUX_PIN(0xff, 255), - MX31_PIN_SD7 = IOMUX_PIN(0xff, 256), - MX31_PIN_SD6 = IOMUX_PIN(0xff, 257), - MX31_PIN_SD5 = IOMUX_PIN(0xff, 258), - MX31_PIN_SD4 = IOMUX_PIN(0xff, 259), - MX31_PIN_SD3 = IOMUX_PIN(0xff, 260), - MX31_PIN_SD2 = IOMUX_PIN(0xff, 261), - MX31_PIN_SD1 = IOMUX_PIN(0xff, 262), - MX31_PIN_SD0 = IOMUX_PIN(0xff, 263), - MX31_PIN_SDBA0 = IOMUX_PIN(0xff, 264), - MX31_PIN_SDBA1 = IOMUX_PIN(0xff, 265), - MX31_PIN_A25 = IOMUX_PIN(0xff, 266), - MX31_PIN_A24 = IOMUX_PIN(0xff, 267), - MX31_PIN_A23 = IOMUX_PIN(0xff, 268), - MX31_PIN_A22 = IOMUX_PIN(0xff, 269), - MX31_PIN_A21 = IOMUX_PIN(0xff, 270), - MX31_PIN_A20 = IOMUX_PIN(0xff, 271), - MX31_PIN_A19 = IOMUX_PIN(0xff, 272), - MX31_PIN_A18 = IOMUX_PIN(0xff, 273), - MX31_PIN_A17 = IOMUX_PIN(0xff, 274), - MX31_PIN_A16 = IOMUX_PIN(0xff, 275), - MX31_PIN_A14 = IOMUX_PIN(0xff, 276), - MX31_PIN_A15 = IOMUX_PIN(0xff, 277), - MX31_PIN_A13 = IOMUX_PIN(0xff, 278), - MX31_PIN_A12 = IOMUX_PIN(0xff, 279), - MX31_PIN_A11 = IOMUX_PIN(0xff, 280), - MX31_PIN_MA10 = IOMUX_PIN(0xff, 281), - MX31_PIN_A10 = IOMUX_PIN(0xff, 282), - MX31_PIN_A9 = IOMUX_PIN(0xff, 283), - MX31_PIN_A8 = IOMUX_PIN(0xff, 284), - MX31_PIN_A7 = IOMUX_PIN(0xff, 285), - MX31_PIN_A6 = IOMUX_PIN(0xff, 286), - MX31_PIN_A5 = IOMUX_PIN(0xff, 287), - MX31_PIN_A4 = IOMUX_PIN(0xff, 288), - MX31_PIN_A3 = IOMUX_PIN(0xff, 289), - MX31_PIN_A2 = IOMUX_PIN(0xff, 290), - MX31_PIN_A1 = IOMUX_PIN(0xff, 291), - MX31_PIN_A0 = IOMUX_PIN(0xff, 292), - MX31_PIN_VPG1 = IOMUX_PIN(0xff, 293), - MX31_PIN_VPG0 = IOMUX_PIN(0xff, 294), - MX31_PIN_DVFS1 = IOMUX_PIN(0xff, 295), - MX31_PIN_DVFS0 = IOMUX_PIN(0xff, 296), - MX31_PIN_VSTBY = IOMUX_PIN(0xff, 297), - MX31_PIN_POWER_FAIL = IOMUX_PIN(0xff, 298), - MX31_PIN_CKIL = IOMUX_PIN(0xff, 299), - MX31_PIN_BOOT_MODE4 = IOMUX_PIN(0xff, 300), - MX31_PIN_BOOT_MODE3 = IOMUX_PIN(0xff, 301), - MX31_PIN_BOOT_MODE2 = IOMUX_PIN(0xff, 302), - MX31_PIN_BOOT_MODE1 = IOMUX_PIN(0xff, 303), - MX31_PIN_BOOT_MODE0 = IOMUX_PIN(0xff, 304), - MX31_PIN_CLKO = IOMUX_PIN(0xff, 305), - MX31_PIN_POR_B = IOMUX_PIN(0xff, 306), - MX31_PIN_RESET_IN_B = IOMUX_PIN(0xff, 307), - MX31_PIN_CKIH = IOMUX_PIN(0xff, 308), - MX31_PIN_SIMPD0 = IOMUX_PIN(35, 309), - MX31_PIN_SRX0 = IOMUX_PIN(34, 310), - MX31_PIN_STX0 = IOMUX_PIN(33, 311), - MX31_PIN_SVEN0 = IOMUX_PIN(32, 312), - MX31_PIN_SRST0 = IOMUX_PIN(67, 313), - MX31_PIN_SCLK0 = IOMUX_PIN(66, 314), - MX31_PIN_GPIO3_1 = IOMUX_PIN(65, 315), - MX31_PIN_GPIO3_0 = IOMUX_PIN(64, 316), - MX31_PIN_GPIO1_6 = IOMUX_PIN( 6, 317), - MX31_PIN_GPIO1_5 = IOMUX_PIN( 5, 318), - MX31_PIN_GPIO1_4 = IOMUX_PIN( 4, 319), - MX31_PIN_GPIO1_3 = IOMUX_PIN( 3, 320), - MX31_PIN_GPIO1_2 = IOMUX_PIN( 2, 321), - MX31_PIN_GPIO1_1 = IOMUX_PIN( 1, 322), - MX31_PIN_GPIO1_0 = IOMUX_PIN( 0, 323), - MX31_PIN_PWMO = IOMUX_PIN( 9, 324), - MX31_PIN_WATCHDOG_RST = IOMUX_PIN(0xff, 325), - MX31_PIN_COMPARE = IOMUX_PIN( 8, 326), - MX31_PIN_CAPTURE = IOMUX_PIN( 7, 327), -}; - -/* - * Convenience values for use with mxc_iomux_mode() - * - * Format here is MX31_PIN_(pin name)__(function) - */ -#define MX31_PIN_CSPI3_MOSI__RXD3 IOMUX_MODE(MX31_PIN_CSPI3_MOSI, IOMUX_CONFIG_ALT1) -#define MX31_PIN_CSPI3_MISO__TXD3 IOMUX_MODE(MX31_PIN_CSPI3_MISO, IOMUX_CONFIG_ALT1) -#define MX31_PIN_CTS1__CTS1 IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_FUNC) -#define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) -#define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) -#define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) - -/* - * This function configures the pad value for a IOMUX pin. - */ -void mxc_iomux_set_pad(enum iomux_pins, u32); - -#endif - diff --git a/include/asm-arm/arch-mxc/irqs.h b/include/asm-arm/arch-mxc/irqs.h deleted file mode 100644 index 21411ef..0000000 --- a/include/asm-arm/arch-mxc/irqs.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_IRQS_H__ -#define __ASM_ARCH_MXC_IRQS_H__ - -#include - -#endif /* __ASM_ARCH_MXC_IRQS_H__ */ diff --git a/include/asm-arm/arch-mxc/memory.h b/include/asm-arm/arch-mxc/memory.h deleted file mode 100644 index 7e669ee..0000000 --- a/include/asm-arm/arch-mxc/memory.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_MEMORY_H__ -#define __ASM_ARCH_MXC_MEMORY_H__ - -#include - -/* - * Virtual view <-> DMA view memory address translations - * This macro is used to translate the virtual address to an address - * suitable to be passed to set_dma_addr() - */ -#define __virt_to_bus(a) __virt_to_phys(a) - -/* - * Used to convert an address for DMA operations to an address that the - * kernel can use. - */ -#define __bus_to_virt(a) __phys_to_virt(a) - -#endif /* __ASM_ARCH_MXC_MEMORY_H__ */ diff --git a/include/asm-arm/arch-mxc/mx27.h b/include/asm-arm/arch-mxc/mx27.h deleted file mode 100644 index 212ecc2..0000000 --- a/include/asm-arm/arch-mxc/mx27.h +++ /dev/null @@ -1,302 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_MX27_H__ -#define __ASM_ARCH_MXC_MX27_H__ - -#ifndef __ASM_ARCH_MXC_HARDWARE_H__ -#error "Do not include directly." -#endif - -/* IRAM */ -#define IRAM_BASE_ADDR 0xFFFF4C00 /* internal ram */ - -/* Register offests */ -#define AIPI_BASE_ADDR 0x10000000 -#define AIPI_BASE_ADDR_VIRT 0xF4000000 -#define AIPI_SIZE SZ_1M - -#define DMA_BASE_ADDR (AIPI_BASE_ADDR + 0x01000) -#define WDOG_BASE_ADDR (AIPI_BASE_ADDR + 0x02000) -#define GPT1_BASE_ADDR (AIPI_BASE_ADDR + 0x03000) -#define GPT2_BASE_ADDR (AIPI_BASE_ADDR + 0x04000) -#define GPT3_BASE_ADDR (AIPI_BASE_ADDR + 0x05000) -#define PWM_BASE_ADDR (AIPI_BASE_ADDR + 0x06000) -#define RTC_BASE_ADDR (AIPI_BASE_ADDR + 0x07000) -#define KPP_BASE_ADDR (AIPI_BASE_ADDR + 0x08000) -#define OWIRE_BASE_ADDR (AIPI_BASE_ADDR + 0x09000) -#define UART1_BASE_ADDR (AIPI_BASE_ADDR + 0x0A000) -#define UART2_BASE_ADDR (AIPI_BASE_ADDR + 0x0B000) -#define UART3_BASE_ADDR (AIPI_BASE_ADDR + 0x0C000) -#define UART4_BASE_ADDR (AIPI_BASE_ADDR + 0x0D000) -#define CSPI1_BASE_ADDR (AIPI_BASE_ADDR + 0x0E000) -#define CSPI2_BASE_ADDR (AIPI_BASE_ADDR + 0x0F000) -#define SSI1_BASE_ADDR (AIPI_BASE_ADDR + 0x10000) -#define SSI2_BASE_ADDR (AIPI_BASE_ADDR + 0x11000) -#define I2C_BASE_ADDR (AIPI_BASE_ADDR + 0x12000) -#define SDHC1_BASE_ADDR (AIPI_BASE_ADDR + 0x13000) -#define SDHC2_BASE_ADDR (AIPI_BASE_ADDR + 0x14000) -#define GPIO_BASE_ADDR (AIPI_BASE_ADDR + 0x15000) -#define AUDMUX_BASE_ADDR (AIPI_BASE_ADDR + 0x16000) - -#define CSPI3_BASE_ADDR (AIPI_BASE_ADDR + 0x17000) -#define MSHC_BASE_ADDR (AIPI_BASE_ADDR + 0x18000) -#define GPT5_BASE_ADDR (AIPI_BASE_ADDR + 0x19000) -#define GPT4_BASE_ADDR (AIPI_BASE_ADDR + 0x1A000) -#define UART5_BASE_ADDR (AIPI_BASE_ADDR + 0x1B000) -#define UART6_BASE_ADDR (AIPI_BASE_ADDR + 0x1C000) -#define I2C2_BASE_ADDR (AIPI_BASE_ADDR + 0x1D000) -#define SDHC3_BASE_ADDR (AIPI_BASE_ADDR + 0x1E000) -#define GPT6_BASE_ADDR (AIPI_BASE_ADDR + 0x1F000) - -#define LCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x21000) -#define SLCDC_BASE_ADDR (AIPI_BASE_ADDR + 0x22000) -#define VPU_BASE_ADDR (AIPI_BASE_ADDR + 0x23000) -#define USBOTG_BASE_ADDR (AIPI_BASE_ADDR + 0x24000) -/* for mx27*/ -#define OTG_BASE_ADDR USBOTG_BASE_ADDR -#define SAHARA_BASE_ADDR (AIPI_BASE_ADDR + 0x25000) -#define EMMA_BASE_ADDR (AIPI_BASE_ADDR + 0x26400) -#define CCM_BASE_ADDR (AIPI_BASE_ADDR + 0x27000) -#define SYSCTRL_BASE_ADDR (AIPI_BASE_ADDR + 0x27800) -#define IIM_BASE_ADDR (AIPI_BASE_ADDR + 0x28000) - -#define RTIC_BASE_ADDR (AIPI_BASE_ADDR + 0x2A000) -#define FEC_BASE_ADDR (AIPI_BASE_ADDR + 0x2B000) -#define SCC_BASE_ADDR (AIPI_BASE_ADDR + 0x2C000) -#define ETB_BASE_ADDR (AIPI_BASE_ADDR + 0x3B000) -#define ETB_RAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3C000) - -#define JAM_BASE_ADDR (AIPI_BASE_ADDR + 0x3E000) -#define MAX_BASE_ADDR (AIPI_BASE_ADDR + 0x3F000) - -/* ROMP and AVIC */ -#define ROMP_BASE_ADDR 0x10041000 - -#define AVIC_BASE_ADDR 0x10040000 - -#define SAHB1_BASE_ADDR 0x80000000 -#define SAHB1_BASE_ADDR_VIRT 0xF4100000 -#define SAHB1_SIZE SZ_1M - -#define CSI_BASE_ADDR (SAHB1_BASE_ADDR + 0x0000) -#define ATA_BASE_ADDR (SAHB1_BASE_ADDR + 0x1000) - -/* NAND, SDRAM, WEIM, M3IF, EMI controllers */ -#define X_MEMC_BASE_ADDR 0xD8000000 -#define X_MEMC_BASE_ADDR_VIRT 0xF4200000 -#define X_MEMC_SIZE SZ_1M - -#define NFC_BASE_ADDR (X_MEMC_BASE_ADDR) -#define SDRAMC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) -#define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) -#define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) -#define PCMCIA_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) - -/* Memory regions and CS */ -#define SDRAM_BASE_ADDR 0xA0000000 -#define CSD1_BASE_ADDR 0xB0000000 - -#define CS0_BASE_ADDR 0xC0000000 -#define CS1_BASE_ADDR 0xC8000000 -#define CS2_BASE_ADDR 0xD0000000 -#define CS3_BASE_ADDR 0xD2000000 -#define CS4_BASE_ADDR 0xD4000000 -#define CS5_BASE_ADDR 0xD6000000 -#define PCMCIA_MEM_BASE_ADDR 0xDC000000 - -/* - * This macro defines the physical to virtual address mapping for all the - * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0xDEADBEEF - */ -#define IO_ADDRESS(x) \ - (((x >= AIPI_BASE_ADDR) && (x < (AIPI_BASE_ADDR + AIPI_SIZE))) ? \ - AIPI_IO_ADDRESS(x) : \ - ((x >= SAHB1_BASE_ADDR) && (x < (SAHB1_BASE_ADDR + SAHB1_SIZE))) ? \ - SAHB1_IO_ADDRESS(x) : \ - ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? \ - X_MEMC_IO_ADDRESS(x) : 0xDEADBEEF) - -/* define the address mapping macros: in physical address order */ -#define AIPI_IO_ADDRESS(x) \ - (((x) - AIPI_BASE_ADDR) + AIPI_BASE_ADDR_VIRT) - -#define AVIC_IO_ADDRESS(x) AIPI_IO_ADDRESS(x) - -#define SAHB1_IO_ADDRESS(x) \ - (((x) - SAHB1_BASE_ADDR) + SAHB1_BASE_ADDR_VIRT) - -#define CS4_IO_ADDRESS(x) \ - (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) - -#define X_MEMC_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -#define PCMCIA_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -/* fixed interrput numbers */ -#define MXC_INT_CCM 63 -#define MXC_INT_IIM 62 -#define MXC_INT_LCDC 61 -#define MXC_INT_SLCDC 60 -#define MXC_INT_SAHARA 59 -#define MXC_INT_SCC_SCM 58 -#define MXC_INT_SCC_SMN 57 -#define MXC_INT_USB3 56 -#define MXC_INT_USB2 55 -#define MXC_INT_USB1 54 -#define MXC_INT_VPU 53 -#define MXC_INT_EMMAPP 52 -#define MXC_INT_EMMAPRP 51 -#define MXC_INT_FEC 50 -#define MXC_INT_UART5 49 -#define MXC_INT_UART6 48 -#define MXC_INT_DMACH15 47 -#define MXC_INT_DMACH14 46 -#define MXC_INT_DMACH13 45 -#define MXC_INT_DMACH12 44 -#define MXC_INT_DMACH11 43 -#define MXC_INT_DMACH10 42 -#define MXC_INT_DMACH9 41 -#define MXC_INT_DMACH8 40 -#define MXC_INT_DMACH7 39 -#define MXC_INT_DMACH6 38 -#define MXC_INT_DMACH5 37 -#define MXC_INT_DMACH4 36 -#define MXC_INT_DMACH3 35 -#define MXC_INT_DMACH2 34 -#define MXC_INT_DMACH1 33 -#define MXC_INT_DMACH0 32 -#define MXC_INT_CSI 31 -#define MXC_INT_ATA 30 -#define MXC_INT_NANDFC 29 -#define MXC_INT_PCMCIA 28 -#define MXC_INT_WDOG 27 -#define MXC_INT_GPT1 26 -#define MXC_INT_GPT2 25 -#define MXC_INT_GPT3 24 -#define MXC_INT_GPT INT_GPT1 -#define MXC_INT_PWM 23 -#define MXC_INT_RTC 22 -#define MXC_INT_KPP 21 -#define MXC_INT_UART1 20 -#define MXC_INT_UART2 19 -#define MXC_INT_UART3 18 -#define MXC_INT_UART4 17 -#define MXC_INT_CSPI1 16 -#define MXC_INT_CSPI2 15 -#define MXC_INT_SSI1 14 -#define MXC_INT_SSI2 13 -#define MXC_INT_I2C 12 -#define MXC_INT_SDHC1 11 -#define MXC_INT_SDHC2 10 -#define MXC_INT_SDHC3 9 -#define MXC_INT_GPIO 8 -#define MXC_INT_SDHC 7 -#define MXC_INT_CSPI3 6 -#define MXC_INT_RTIC 5 -#define MXC_INT_GPT4 4 -#define MXC_INT_GPT5 3 -#define MXC_INT_GPT6 2 -#define MXC_INT_I2C2 1 - -/* fixed DMA request numbers */ -#define DMA_REQ_NFC 37 -#define DMA_REQ_SDHC3 36 -#define DMA_REQ_UART6_RX 35 -#define DMA_REQ_UART6_TX 34 -#define DMA_REQ_UART5_RX 33 -#define DMA_REQ_UART5_TX 32 -#define DMA_REQ_CSI_RX 31 -#define DMA_REQ_CSI_STAT 30 -#define DMA_REQ_ATA_RCV 29 -#define DMA_REQ_ATA_TX 28 -#define DMA_REQ_UART1_TX 27 -#define DMA_REQ_UART1_RX 26 -#define DMA_REQ_UART2_TX 25 -#define DMA_REQ_UART2_RX 24 -#define DMA_REQ_UART3_TX 23 -#define DMA_REQ_UART3_RX 22 -#define DMA_REQ_UART4_TX 21 -#define DMA_REQ_UART4_RX 20 -#define DMA_REQ_CSPI1_TX 19 -#define DMA_REQ_CSPI1_RX 18 -#define DMA_REQ_CSPI2_TX 17 -#define DMA_REQ_CSPI2_RX 16 -#define DMA_REQ_SSI1_TX1 15 -#define DMA_REQ_SSI1_RX1 14 -#define DMA_REQ_SSI1_TX0 13 -#define DMA_REQ_SSI1_RX0 12 -#define DMA_REQ_SSI2_TX1 11 -#define DMA_REQ_SSI2_RX1 10 -#define DMA_REQ_SSI2_TX0 9 -#define DMA_REQ_SSI2_RX0 8 -#define DMA_REQ_SDHC1 7 -#define DMA_REQ_SDHC2 6 -#define DMA_REQ_MSHC 4 -#define DMA_REQ_EXT 3 -#define DMA_REQ_CSPI3_TX 2 -#define DMA_REQ_CSPI3_RX 1 - -/* silicon revisions specific to i.MX27 */ -#define CHIP_REV_1_0 0x00 -#define CHIP_REV_2_0 0x01 - -#ifndef __ASSEMBLY__ -extern int mx27_revision(void); -#endif - -/* gpio and gpio based interrupt handling */ -#define GPIO_DR 0x1C -#define GPIO_GDIR 0x00 -#define GPIO_PSR 0x24 -#define GPIO_ICR1 0x28 -#define GPIO_ICR2 0x2C -#define GPIO_IMR 0x30 -#define GPIO_ISR 0x34 -#define GPIO_INT_LOW_LEV 0x3 -#define GPIO_INT_HIGH_LEV 0x2 -#define GPIO_INT_RISE_EDGE 0x0 -#define GPIO_INT_FALL_EDGE 0x1 -#define GPIO_INT_NONE 0x4 - -/* Mandatory defines used globally */ - -/* this is an i.MX27 CPU */ -#define cpu_is_mx27() (1) - -/* this CPU supports up to 192 GPIOs (don't forget the baseboard!) */ -#define ARCH_NR_GPIOS (192 + 16) - -/* OS clock tick rate */ -#define CLOCK_TICK_RATE 13300000 - -/* Start of RAM */ -#define PHYS_OFFSET SDRAM_BASE_ADDR - -/* max interrupt lines count */ -#define NR_IRQS 256 - -/* count of internal interrupt sources */ -#define MXC_MAX_INT_LINES 64 - -#endif /* __ASM_ARCH_MXC_MX27_H__ */ diff --git a/include/asm-arm/arch-mxc/mx31.h b/include/asm-arm/arch-mxc/mx31.h deleted file mode 100644 index a7373e4..0000000 --- a/include/asm-arm/arch-mxc/mx31.h +++ /dev/null @@ -1,384 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_MX31_H__ -#define __ASM_ARCH_MXC_MX31_H__ - -#ifndef __ASM_ARCH_MXC_HARDWARE_H__ -#error "Do not include directly." -#endif - -/*! - * defines the hardware clock tick rate - */ -#define CLOCK_TICK_RATE 16625000 - -/* - * MX31 memory map: - * - * Virt Phys Size What - * --------------------------------------------------------------------------- - * F8000000 1FFC0000 16K IRAM - * F9000000 30000000 256M L2CC - * FC000000 43F00000 1M AIPS 1 - * FC100000 50000000 1M SPBA - * FC200000 53F00000 1M AIPS 2 - * FC500000 60000000 128M ROMPATCH - * FC400000 68000000 128M AVIC - * 70000000 256M IPU (MAX M2) - * 80000000 256M CSD0 SDRAM/DDR - * 90000000 256M CSD1 SDRAM/DDR - * A0000000 128M CS0 Flash - * A8000000 128M CS1 Flash - * B0000000 32M CS2 - * B2000000 32M CS3 - * F4000000 B4000000 32M CS4 - * B6000000 32M CS5 - * FC320000 B8000000 64K NAND, SDRAM, WEIM, M3IF, EMI controllers - * C0000000 64M PCMCIA/CF - */ - -#define CS0_BASE_ADDR 0xA0000000 -#define CS1_BASE_ADDR 0xA8000000 -#define CS2_BASE_ADDR 0xB0000000 -#define CS3_BASE_ADDR 0xB2000000 - -#define CS4_BASE_ADDR 0xB4000000 -#define CS4_BASE_ADDR_VIRT 0xF4000000 -#define CS4_SIZE SZ_32M - -#define CS5_BASE_ADDR 0xB6000000 -#define PCMCIA_MEM_BASE_ADDR 0xBC000000 - -/* - * IRAM - */ -#define IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */ -#define IRAM_BASE_ADDR_VIRT 0xF8000000 -#define IRAM_SIZE SZ_16K - -/* - * L2CC - */ -#define L2CC_BASE_ADDR 0x30000000 -#define L2CC_BASE_ADDR_VIRT 0xF9000000 -#define L2CC_SIZE SZ_1M - -/* - * AIPS 1 - */ -#define AIPS1_BASE_ADDR 0x43F00000 -#define AIPS1_BASE_ADDR_VIRT 0xFC000000 -#define AIPS1_SIZE SZ_1M - -#define MAX_BASE_ADDR (AIPS1_BASE_ADDR + 0x00004000) -#define EVTMON_BASE_ADDR (AIPS1_BASE_ADDR + 0x00008000) -#define CLKCTL_BASE_ADDR (AIPS1_BASE_ADDR + 0x0000C000) -#define ETB_SLOT4_BASE_ADDR (AIPS1_BASE_ADDR + 0x00010000) -#define ETB_SLOT5_BASE_ADDR (AIPS1_BASE_ADDR + 0x00014000) -#define ECT_CTIO_BASE_ADDR (AIPS1_BASE_ADDR + 0x00018000) -#define I2C_BASE_ADDR (AIPS1_BASE_ADDR + 0x00080000) -#define I2C3_BASE_ADDR (AIPS1_BASE_ADDR + 0x00084000) -#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000) -#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000) -#define UART1_BASE_ADDR (AIPS1_BASE_ADDR + 0x00090000) -#define UART2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00094000) -#define I2C2_BASE_ADDR (AIPS1_BASE_ADDR + 0x00098000) -#define OWIRE_BASE_ADDR (AIPS1_BASE_ADDR + 0x0009C000) -#define SSI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A0000) -#define CSPI1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A4000) -#define KPP_BASE_ADDR (AIPS1_BASE_ADDR + 0x000A8000) -#define IOMUXC_BASE_ADDR (AIPS1_BASE_ADDR + 0x000AC000) -#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000) -#define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000) -#define ECT_IP1_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B8000) -#define ECT_IP2_BASE_ADDR (AIPS1_BASE_ADDR + 0x000BC000) - -/* - * SPBA global module enabled #0 - */ -#define SPBA0_BASE_ADDR 0x50000000 -#define SPBA0_BASE_ADDR_VIRT 0xFC100000 -#define SPBA0_SIZE SZ_1M - -#define MMC_SDHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00004000) -#define MMC_SDHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00008000) -#define UART3_BASE_ADDR (SPBA0_BASE_ADDR + 0x0000C000) -#define CSPI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00010000) -#define SSI2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00014000) -#define SIM1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00018000) -#define IIM_BASE_ADDR (SPBA0_BASE_ADDR + 0x0001C000) -#define ATA_DMA_BASE_ADDR (SPBA0_BASE_ADDR + 0x00020000) -#define MSHC1_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) -#define MSHC2_BASE_ADDR (SPBA0_BASE_ADDR + 0x00024000) -#define SPBA_CTRL_BASE_ADDR (SPBA0_BASE_ADDR + 0x0003C000) - -/* - * AIPS 2 - */ -#define AIPS2_BASE_ADDR 0x53F00000 -#define AIPS2_BASE_ADDR_VIRT 0xFC200000 -#define AIPS2_SIZE SZ_1M -#define CCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000) -#define CSPI3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000) -#define FIRI_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008C000) -#define GPT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00090000) -#define EPIT1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000) -#define EPIT2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000) -#define GPIO3_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A4000) -#define SCC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AC000) -#define SCM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AE000) -#define SMN_BASE_ADDR (AIPS2_BASE_ADDR + 0x000AF000) -#define RNGA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000B0000) -#define IPU_CTRL_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C0000) -#define AUDMUX_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C4000) -#define MPEG4_ENC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000C8000) -#define GPIO1_BASE_ADDR (AIPS2_BASE_ADDR + 0x000CC000) -#define GPIO2_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D0000) -#define SDMA_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D4000) -#define RTC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000D8000) -#define WDOG_BASE_ADDR (AIPS2_BASE_ADDR + 0x000DC000) -#define PWM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000E0000) -#define RTIC_BASE_ADDR (AIPS2_BASE_ADDR + 0x000EC000) - -/* - * ROMP and AVIC - */ -#define ROMP_BASE_ADDR 0x60000000 -#define ROMP_BASE_ADDR_VIRT 0xFC500000 -#define ROMP_SIZE SZ_1M - -#define AVIC_BASE_ADDR 0x68000000 -#define AVIC_BASE_ADDR_VIRT 0xFC400000 -#define AVIC_SIZE SZ_1M - -/* - * NAND, SDRAM, WEIM, M3IF, EMI controllers - */ -#define X_MEMC_BASE_ADDR 0xB8000000 -#define X_MEMC_BASE_ADDR_VIRT 0xFC320000 -#define X_MEMC_SIZE SZ_64K - -#define NFC_BASE_ADDR (X_MEMC_BASE_ADDR + 0x0000) -#define ESDCTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x1000) -#define WEIM_BASE_ADDR (X_MEMC_BASE_ADDR + 0x2000) -#define M3IF_BASE_ADDR (X_MEMC_BASE_ADDR + 0x3000) -#define EMI_CTL_BASE_ADDR (X_MEMC_BASE_ADDR + 0x4000) -#define PCMCIA_CTL_BASE_ADDR EMI_CTL_BASE_ADDR - -/* - * Memory regions and CS - */ -#define IPU_MEM_BASE_ADDR 0x70000000 -#define CSD0_BASE_ADDR 0x80000000 -#define CSD1_BASE_ADDR 0x90000000 -#define CS0_BASE_ADDR 0xA0000000 -#define CS1_BASE_ADDR 0xA8000000 -#define CS2_BASE_ADDR 0xB0000000 -#define CS3_BASE_ADDR 0xB2000000 - -#define CS4_BASE_ADDR 0xB4000000 -#define CS4_BASE_ADDR_VIRT 0xF4000000 -#define CS4_SIZE SZ_32M - -#define CS5_BASE_ADDR 0xB6000000 -#define PCMCIA_MEM_BASE_ADDR 0xBC000000 - -/*! - * This macro defines the physical to virtual address mapping for all the - * peripheral modules. It is used by passing in the physical address as x - * and returning the virtual address. If the physical address is not mapped, - * it returns 0xDEADBEEF - */ -#define IO_ADDRESS(x) \ - (((x >= IRAM_BASE_ADDR) && (x < (IRAM_BASE_ADDR + IRAM_SIZE))) ? IRAM_IO_ADDRESS(x):\ - ((x >= L2CC_BASE_ADDR) && (x < (L2CC_BASE_ADDR + L2CC_SIZE))) ? L2CC_IO_ADDRESS(x):\ - ((x >= AIPS1_BASE_ADDR) && (x < (AIPS1_BASE_ADDR + AIPS1_SIZE))) ? AIPS1_IO_ADDRESS(x):\ - ((x >= SPBA0_BASE_ADDR) && (x < (SPBA0_BASE_ADDR + SPBA0_SIZE))) ? SPBA0_IO_ADDRESS(x):\ - ((x >= AIPS2_BASE_ADDR) && (x < (AIPS2_BASE_ADDR + AIPS2_SIZE))) ? AIPS2_IO_ADDRESS(x):\ - ((x >= ROMP_BASE_ADDR) && (x < (ROMP_BASE_ADDR + ROMP_SIZE))) ? ROMP_IO_ADDRESS(x):\ - ((x >= AVIC_BASE_ADDR) && (x < (AVIC_BASE_ADDR + AVIC_SIZE))) ? AVIC_IO_ADDRESS(x):\ - ((x >= CS4_BASE_ADDR) && (x < (CS4_BASE_ADDR + CS4_SIZE))) ? CS4_IO_ADDRESS(x):\ - ((x >= X_MEMC_BASE_ADDR) && (x < (X_MEMC_BASE_ADDR + X_MEMC_SIZE))) ? X_MEMC_IO_ADDRESS(x):\ - 0xDEADBEEF) - -/* - * define the address mapping macros: in physical address order - */ - -#define IRAM_IO_ADDRESS(x) \ - (((x) - IRAM_BASE_ADDR) + IRAM_BASE_ADDR_VIRT) - -#define L2CC_IO_ADDRESS(x) \ - (((x) - L2CC_BASE_ADDR) + L2CC_BASE_ADDR_VIRT) - -#define AIPS1_IO_ADDRESS(x) \ - (((x) - AIPS1_BASE_ADDR) + AIPS1_BASE_ADDR_VIRT) - -#define SPBA0_IO_ADDRESS(x) \ - (((x) - SPBA0_BASE_ADDR) + SPBA0_BASE_ADDR_VIRT) - -#define AIPS2_IO_ADDRESS(x) \ - (((x) - AIPS2_BASE_ADDR) + AIPS2_BASE_ADDR_VIRT) - -#define ROMP_IO_ADDRESS(x) \ - (((x) - ROMP_BASE_ADDR) + ROMP_BASE_ADDR_VIRT) - -#define AVIC_IO_ADDRESS(x) \ - (((x) - AVIC_BASE_ADDR) + AVIC_BASE_ADDR_VIRT) - -#define CS4_IO_ADDRESS(x) \ - (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) - -#define X_MEMC_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -#define PCMCIA_IO_ADDRESS(x) \ - (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) - -/* Start of physical RAM - On many MX31 platforms, this is the first SDRAM bank (CSD0) */ -#define PHYS_OFFSET CSD0_BASE_ADDR - -/* - * Interrupt numbers - */ -#define MXC_INT_PEN_ADS7843 0 -#define MXC_INT_RESV1 1 -#define MXC_INT_CS8900A 2 -#define MXC_INT_I2C3 3 -#define MXC_INT_I2C2 4 -#define MXC_INT_MPEG4_ENCODER 5 -#define MXC_INT_RTIC 6 -#define MXC_INT_FIRI 7 -#define MXC_INT_MMC_SDHC2 8 -#define MXC_INT_MMC_SDHC1 9 -#define MXC_INT_I2C 10 -#define MXC_INT_SSI2 11 -#define MXC_INT_SSI1 12 -#define MXC_INT_CSPI2 13 -#define MXC_INT_CSPI1 14 -#define MXC_INT_ATA 15 -#define MXC_INT_MBX 16 -#define MXC_INT_CSPI3 17 -#define MXC_INT_UART3 18 -#define MXC_INT_IIM 19 -#define MXC_INT_SIM2 20 -#define MXC_INT_SIM1 21 -#define MXC_INT_RNGA 22 -#define MXC_INT_EVTMON 23 -#define MXC_INT_KPP 24 -#define MXC_INT_RTC 25 -#define MXC_INT_PWM 26 -#define MXC_INT_EPIT2 27 -#define MXC_INT_EPIT1 28 -#define MXC_INT_GPT 29 -#define MXC_INT_RESV30 30 -#define MXC_INT_RESV31 31 -#define MXC_INT_UART2 32 -#define MXC_INT_NANDFC 33 -#define MXC_INT_SDMA 34 -#define MXC_INT_USB1 35 -#define MXC_INT_USB2 36 -#define MXC_INT_USB3 37 -#define MXC_INT_USB4 38 -#define MXC_INT_MSHC1 39 -#define MXC_INT_MSHC2 40 -#define MXC_INT_IPU_ERR 41 -#define MXC_INT_IPU_SYN 42 -#define MXC_INT_RESV43 43 -#define MXC_INT_RESV44 44 -#define MXC_INT_UART1 45 -#define MXC_INT_UART4 46 -#define MXC_INT_UART5 47 -#define MXC_INT_ECT 48 -#define MXC_INT_SCC_SCM 49 -#define MXC_INT_SCC_SMN 50 -#define MXC_INT_GPIO2 51 -#define MXC_INT_GPIO1 52 -#define MXC_INT_CCM 53 -#define MXC_INT_PCMCIA 54 -#define MXC_INT_WDOG 55 -#define MXC_INT_GPIO3 56 -#define MXC_INT_RESV57 57 -#define MXC_INT_EXT_POWER 58 -#define MXC_INT_EXT_TEMPER 59 -#define MXC_INT_EXT_SENSOR60 60 -#define MXC_INT_EXT_SENSOR61 61 -#define MXC_INT_EXT_WDOG 62 -#define MXC_INT_EXT_TV 63 - -#define MXC_MAX_INT_LINES 64 - -#define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES -#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM) -#define MXC_MAX_VIRTUAL_INTS 16 - -#define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS) - -/*! - * Number of GPIO port as defined in the IC Spec - */ -#define GPIO_PORT_NUM 3 -/*! - * Number of GPIO pins per port - */ -#define GPIO_NUM_PIN 32 - -#define PROD_SIGNATURE 0x1 /* For MX31 */ - -/* silicon revisions specific to i.MX31 */ -#define CHIP_REV_1_0 0x10 -#define CHIP_REV_1_1 0x11 -#define CHIP_REV_1_2 0x12 -#define CHIP_REV_1_3 0x13 -#define CHIP_REV_2_0 0x20 -#define CHIP_REV_2_1 0x21 -#define CHIP_REV_2_2 0x22 -#define CHIP_REV_2_3 0x23 -#define CHIP_REV_3_0 0x30 -#define CHIP_REV_3_1 0x31 -#define CHIP_REV_3_2 0x32 - -#define SYSTEM_REV_MIN CHIP_REV_1_0 -#define SYSTEM_REV_NUM 3 - -/* gpio and gpio based interrupt handling */ -#define GPIO_DR 0x00 -#define GPIO_GDIR 0x04 -#define GPIO_PSR 0x08 -#define GPIO_ICR1 0x0C -#define GPIO_ICR2 0x10 -#define GPIO_IMR 0x14 -#define GPIO_ISR 0x18 -#define GPIO_INT_LOW_LEV 0x0 -#define GPIO_INT_HIGH_LEV 0x1 -#define GPIO_INT_RISE_EDGE 0x2 -#define GPIO_INT_FALL_EDGE 0x3 -#define GPIO_INT_NONE 0x4 - -/* Mandatory defines used globally */ - -/* this CPU supports up to 96 GPIOs */ -#define ARCH_NR_GPIOS 96 - -#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) - -/* this is a i.MX31 CPU */ -#define cpu_is_mx31() (1) - -extern unsigned int system_rev; - -static inline int mx31_revision(void) -{ - return system_rev; -} -#endif - -#endif /* __ASM_ARCH_MXC_MX31_H__ */ diff --git a/include/asm-arm/arch-mxc/mxc.h b/include/asm-arm/arch-mxc/mxc.h deleted file mode 100644 index 332eda4..0000000 --- a/include/asm-arm/arch-mxc/mxc.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_H__ -#define __ASM_ARCH_MXC_H__ - -#ifndef __ASM_ARCH_MXC_HARDWARE_H__ -#error "Do not include directly." -#endif - -/* clean up all things that are not used */ -#ifndef CONFIG_ARCH_MX3 -# define cpu_is_mx31() (0) -#endif - -#ifndef CONFIG_MACH_MX27 -# define cpu_is_mx27() (0) -#endif - -#endif /* __ASM_ARCH_MXC_H__ */ diff --git a/include/asm-arm/arch-mxc/mxc_timer.h b/include/asm-arm/arch-mxc/mxc_timer.h deleted file mode 100644 index 5439fa6..0000000 --- a/include/asm-arm/arch-mxc/mxc_timer.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * mxc_timer.h - * - * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) - * - * Platform independent (i.MX1, i.MX2, i.MX3) definition for timer handling. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, - * Boston, MA 02110-1301, USA. - */ - -#ifndef __PLAT_MXC_TIMER_H -#define __PLAT_MXC_TIMER_H - -#include -#include - -#ifdef CONFIG_ARCH_IMX -#define TIMER_BASE IO_ADDRESS(TIM1_BASE_ADDR) -#define TIMER_INTERRUPT TIM1_INT - -#define TCTL_VAL TCTL_CLK_PCLK1 -#define TCTL_IRQEN (1<<4) -#define TCTL_FRR (1<<8) -#define TCTL_CLK_PCLK1 (1<<1) -#define TCTL_CLK_PCLK1_4 (2<<1) -#define TCTL_CLK_TIN (3<<1) -#define TCTL_CLK_32 (4<<1) - -#define MXC_TCTL 0x00 -#define MXC_TPRER 0x04 -#define MXC_TCMP 0x08 -#define MXC_TCR 0x0c -#define MXC_TCN 0x10 -#define MXC_TSTAT 0x14 -#define TSTAT_CAPT (1<<1) -#define TSTAT_COMP (1<<0) - -static inline void gpt_irq_disable(void) -{ - unsigned int tmp; - - tmp = __raw_readl(TIMER_BASE + MXC_TCTL); - __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); -} - -static inline void gpt_irq_enable(void) -{ - __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, - TIMER_BASE + MXC_TCTL); -} - -static void gpt_irq_acknowledge(void) -{ - __raw_writel(0, TIMER_BASE + MXC_TSTAT); -} -#endif /* CONFIG_ARCH_IMX */ - -#ifdef CONFIG_ARCH_MX2 -#define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) -#define TIMER_INTERRUPT MXC_INT_GPT1 - -#define MXC_TCTL 0x00 -#define TCTL_VAL TCTL_CLK_PCLK1 -#define TCTL_CLK_PCLK1 (1<<1) -#define TCTL_CLK_PCLK1_4 (2<<1) -#define TCTL_IRQEN (1<<4) -#define TCTL_FRR (1<<8) -#define MXC_TPRER 0x04 -#define MXC_TCMP 0x08 -#define MXC_TCR 0x0c -#define MXC_TCN 0x10 -#define MXC_TSTAT 0x14 -#define TSTAT_CAPT (1<<1) -#define TSTAT_COMP (1<<0) - -static inline void gpt_irq_disable(void) -{ - unsigned int tmp; - - tmp = __raw_readl(TIMER_BASE + MXC_TCTL); - __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); -} - -static inline void gpt_irq_enable(void) -{ - __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, - TIMER_BASE + MXC_TCTL); -} - -static void gpt_irq_acknowledge(void) -{ - __raw_writel(TSTAT_CAPT | TSTAT_COMP, TIMER_BASE + MXC_TSTAT); -} -#endif /* CONFIG_ARCH_MX2 */ - -#ifdef CONFIG_ARCH_MX3 -#define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) -#define TIMER_INTERRUPT MXC_INT_GPT - -#define MXC_TCTL 0x00 -#define TCTL_VAL (TCTL_CLK_IPG | TCTL_WAITEN) -#define TCTL_CLK_IPG (1<<6) -#define TCTL_FRR (1<<9) -#define TCTL_WAITEN (1<<3) - -#define MXC_TPRER 0x04 -#define MXC_TSTAT 0x08 -#define TSTAT_OF1 (1<<0) -#define TSTAT_OF2 (1<<1) -#define TSTAT_OF3 (1<<2) -#define TSTAT_IF1 (1<<3) -#define TSTAT_IF2 (1<<4) -#define TSTAT_ROV (1<<5) -#define MXC_IR 0x0c -#define MXC_TCMP 0x10 -#define MXC_TCMP2 0x14 -#define MXC_TCMP3 0x18 -#define MXC_TCR 0x1c -#define MXC_TCN 0x24 - -static inline void gpt_irq_disable(void) -{ - __raw_writel(0, TIMER_BASE + MXC_IR); -} - -static inline void gpt_irq_enable(void) -{ - __raw_writel(1<<0, TIMER_BASE + MXC_IR); -} - -static inline void gpt_irq_acknowledge(void) -{ - __raw_writel(TSTAT_OF1, TIMER_BASE + MXC_TSTAT); -} -#endif /* CONFIG_ARCH_MX3 */ - -#define TCTL_SWR (1<<15) -#define TCTL_CC (1<<10) -#define TCTL_OM (1<<9) -#define TCTL_CAP_RIS (1<<6) -#define TCTL_CAP_FAL (2<<6) -#define TCTL_CAP_RIS_FAL (3<<6) -#define TCTL_CAP_ENA (1<<5) -#define TCTL_TEN (1<<0) - -#endif diff --git a/include/asm-arm/arch-mxc/system.h b/include/asm-arm/arch-mxc/system.h deleted file mode 100644 index bbfc374..0000000 --- a/include/asm-arm/arch-mxc/system.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MXC_SYSTEM_H__ -#define __ASM_ARCH_MXC_SYSTEM_H__ - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - cpu_reset(0); -} - -#endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ diff --git a/include/asm-arm/arch-mxc/timex.h b/include/asm-arm/arch-mxc/timex.h deleted file mode 100644 index 432e0c8..0000000 --- a/include/asm-arm/arch-mxc/timex.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (C) 1999 ARM Limited - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MXC_TIMEX_H__ -#define __ASM_ARCH_MXC_TIMEX_H__ - -#include /* for CLOCK_TICK_RATE */ - -#endif /* __ASM_ARCH_MXC_TIMEX_H__ */ diff --git a/include/asm-arm/arch-mxc/uncompress.h b/include/asm-arm/arch-mxc/uncompress.h deleted file mode 100644 index 18f33b0..0000000 --- a/include/asm-arm/arch-mxc/uncompress.h +++ /dev/null @@ -1,78 +0,0 @@ -/* - * include/asm-arm/arch-mxc/uncompress.h - * - * - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) Shane Nay (shane@minirl.com) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MXC_UNCOMPRESS_H__ -#define __ASM_ARCH_MXC_UNCOMPRESS_H__ - -#define __MXC_BOOT_UNCOMPRESS - -#include - -#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) - -#define USR2 0x98 -#define USR2_TXFE (1<<14) -#define TXR 0x40 -#define UCR1 0x80 -#define UCR1_UARTEN 1 - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline - */ - -static void putc(int ch) -{ - static unsigned long serial_port = 0; - - if (unlikely(serial_port == 0)) { - do { - serial_port = UART1_BASE_ADDR; - if (UART(UCR1) & UCR1_UARTEN) - break; - serial_port = UART2_BASE_ADDR; - if (UART(UCR1) & UCR1_UARTEN) - break; - return; - } while (0); - } - - while (!(UART(USR2) & USR2_TXFE)) - barrier(); - - UART(TXR) = ch; -} - -#define flush() do { } while (0) - -/* - * nothing to do - */ -#define arch_decomp_setup() - -#define arch_decomp_wdog() - -#endif /* __ASM_ARCH_MXC_UNCOMPRESS_H__ */ diff --git a/include/asm-arm/arch-mxc/vmalloc.h b/include/asm-arm/arch-mxc/vmalloc.h deleted file mode 100644 index 62d9762..0000000 --- a/include/asm-arm/arch-mxc/vmalloc.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2000 Russell King. - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MXC_VMALLOC_H__ -#define __ASM_ARCH_MXC_VMALLOC_H__ - -/* vmalloc ending address */ -#define VMALLOC_END 0xF4000000 - -#endif /* __ASM_ARCH_MXC_VMALLOC_H__ */ diff --git a/include/asm-arm/arch-netx/debug-macro.S b/include/asm-arm/arch-netx/debug-macro.S deleted file mode 100644 index a940d0e..0000000 --- a/include/asm-arm/arch-netx/debug-macro.S +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/include/asm-arm/arch-netx/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include "hardware.h" - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x00100000 @ physical - movne \rx, #io_p2v(0x00100000) @ virtual - orr \rx, \rx, #0x00000a00 - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #0] - .endm - - .macro busyuart,rd,rx -1002: ldr \rd, [\rx, #0x18] - tst \rd, #(1 << 3) - bne 1002b - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #0x18] - tst \rd, #(1 << 3) - bne 1001b - .endm diff --git a/include/asm-arm/arch-netx/dma.h b/include/asm-arm/arch-netx/dma.h deleted file mode 100644 index 4eda5fe..0000000 --- a/include/asm-arm/arch-netx/dma.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/dma.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define MAX_DMA_CHANNELS 0 -#define MAX_DMA_ADDRESS ~0 diff --git a/include/asm-arm/arch-netx/entry-macro.S b/include/asm-arm/arch-netx/entry-macro.S deleted file mode 100644 index 4115bbd..0000000 --- a/include/asm-arm/arch-netx/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * include/asm-arm/arch-netx/entry-macro.S - * - * Low-level IRQ helper macros for Hilscher netX based platforms - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \base, #io_p2v(0x00100000) - add \base, \base, #0x000ff000 - - ldr \irqstat, [\base, #0] - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 - cmp \irqstat, #0 - .endm - diff --git a/include/asm-arm/arch-netx/eth.h b/include/asm-arm/arch-netx/eth.h deleted file mode 100644 index 643c90e..0000000 --- a/include/asm-arm/arch-netx/eth.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-arm/arch-netx/eth.h - * - * Copyright (c) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef ASMARM_ARCH_ETH_H -#define ASMARM_ARCH_ETH_H - -struct netxeth_platform_data { - unsigned int xcno; /* number of xmac/xpec engine this eth uses */ -}; - -#endif diff --git a/include/asm-arm/arch-netx/hardware.h b/include/asm-arm/arch-netx/hardware.h deleted file mode 100644 index 7786c45..0000000 --- a/include/asm-arm/arch-netx/hardware.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * include/asm-arm/arch-netx/hardware.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#define NETX_IO_PHYS 0x00100000 -#define NETX_IO_VIRT 0xe0000000 -#define NETX_IO_SIZE 0x00100000 - -#define SRAM_INTERNAL_PHYS_0 0x00000 -#define SRAM_INTERNAL_PHYS_1 0x08000 -#define SRAM_INTERNAL_PHYS_2 0x10000 -#define SRAM_INTERNAL_PHYS_3 0x18000 -#define SRAM_INTERNAL_PHYS(no) ((no) * 0x8000) - -#define XPEC_MEM_SIZE 0x4000 -#define XMAC_MEM_SIZE 0x1000 -#define SRAM_MEM_SIZE 0x8000 - -#define io_p2v(x) ((x) - NETX_IO_PHYS + NETX_IO_VIRT) -#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) - -#endif diff --git a/include/asm-arm/arch-netx/io.h b/include/asm-arm/arch-netx/io.h deleted file mode 100644 index a7a53f8..0000000 --- a/include/asm-arm/arch-netx/io.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/io.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-netx/irqs.h b/include/asm-arm/arch-netx/irqs.h deleted file mode 100644 index a487dc6..0000000 --- a/include/asm-arm/arch-netx/irqs.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * include/asm-arm/arch-netx/irqs.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define NETX_IRQ_VIC_START 0 -#define NETX_IRQ_SOFTINT 0 -#define NETX_IRQ_TIMER0 1 -#define NETX_IRQ_TIMER1 2 -#define NETX_IRQ_TIMER2 3 -#define NETX_IRQ_SYSTIME_NS 4 -#define NETX_IRQ_SYSTIME_S 5 -#define NETX_IRQ_GPIO_15 6 -#define NETX_IRQ_WATCHDOG 7 -#define NETX_IRQ_UART0 8 -#define NETX_IRQ_UART1 9 -#define NETX_IRQ_UART2 10 -#define NETX_IRQ_USB 11 -#define NETX_IRQ_SPI 12 -#define NETX_IRQ_I2C 13 -#define NETX_IRQ_LCD 14 -#define NETX_IRQ_HIF 15 -#define NETX_IRQ_GPIO_0_14 16 -#define NETX_IRQ_XPEC0 17 -#define NETX_IRQ_XPEC1 18 -#define NETX_IRQ_XPEC2 19 -#define NETX_IRQ_XPEC3 20 -#define NETX_IRQ_XPEC(no) (17 + (no)) -#define NETX_IRQ_MSYNC0 21 -#define NETX_IRQ_MSYNC1 22 -#define NETX_IRQ_MSYNC2 23 -#define NETX_IRQ_MSYNC3 24 -#define NETX_IRQ_IRQ_PHY 25 -#define NETX_IRQ_ISO_AREA 26 -/* int 27 is reserved */ -/* int 28 is reserved */ -#define NETX_IRQ_TIMER3 29 -#define NETX_IRQ_TIMER4 30 -/* int 31 is reserved */ - -#define NETX_IRQS 32 - -/* for multiplexed irqs on gpio 0..14 */ -#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) -#define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14) - -/* Host interface interrupts */ -#define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x)) -#define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0) -#define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1) -#define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2) -#define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3) -#define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4) -#define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4) - -#define NR_IRQS (NETX_IRQ_HIF_LAST + 1) diff --git a/include/asm-arm/arch-netx/memory.h b/include/asm-arm/arch-netx/memory.h deleted file mode 100644 index 6d8d2df..0000000 --- a/include/asm-arm/arch-netx/memory.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/memory.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x80000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif - diff --git a/include/asm-arm/arch-netx/netx-regs.h b/include/asm-arm/arch-netx/netx-regs.h deleted file mode 100644 index fc9aa21..0000000 --- a/include/asm-arm/arch-netx/netx-regs.h +++ /dev/null @@ -1,410 +0,0 @@ -/* - * include/asm-arm/arch-netx/netx-regs.h - * - * Copyright (c) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_NETX_REGS_H -#define __ASM_ARCH_NETX_REGS_H - -/* offsets relative to the beginning of the io space */ -#define NETX_OFS_SYSTEM 0x00000 -#define NETX_OFS_MEMCR 0x00100 -#define NETX_OFS_DPMAS 0x03000 -#define NETX_OFS_GPIO 0x00800 -#define NETX_OFS_PIO 0x00900 -#define NETX_OFS_UART0 0x00a00 -#define NETX_OFS_UART1 0x00a40 -#define NETX_OFS_UART2 0x00a80 -#define NETX_OF_MIIMU 0x00b00 -#define NETX_OFS_SPI 0x00c00 -#define NETX_OFS_I2C 0x00d00 -#define NETX_OFS_SYSTIME 0x01100 -#define NETX_OFS_RTC 0x01200 -#define NETX_OFS_EXTBUS 0x03600 -#define NETX_OFS_LCD 0x04000 -#define NETX_OFS_USB 0x20000 -#define NETX_OFS_XMAC0 0x60000 -#define NETX_OFS_XMAC1 0x61000 -#define NETX_OFS_XMAC2 0x62000 -#define NETX_OFS_XMAC3 0x63000 -#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000) -#define NETX_OFS_PFIFO 0x64000 -#define NETX_OFS_XPEC0 0x70000 -#define NETX_OFS_XPEC1 0x74000 -#define NETX_OFS_XPEC2 0x78000 -#define NETX_OFS_XPEC3 0x7c000 -#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000) -#define NETX_OFS_VIC 0xff000 - -/* physical addresses */ -#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM) -#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR) -#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPMAS) -#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO) -#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO) -#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0) -#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1) -#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2) -#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU) -#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI) -#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C) -#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME) -#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC) -#define NETX_PA_EXTBUS (NETX_IO_PHYS + NETX_OFS_EXTBUS) -#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD) -#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB) -#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0) -#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1) -#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2) -#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3) -#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no)) -#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO) -#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0) -#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1) -#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2) -#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3) -#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no)) -#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC) - -/* virual addresses */ -#define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM) -#define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR) -#define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS) -#define NETX_VA_GPIO (NETX_IO_VIRT + NETX_OFS_GPIO) -#define NETX_VA_PIO (NETX_IO_VIRT + NETX_OFS_PIO) -#define NETX_VA_UART0 (NETX_IO_VIRT + NETX_OFS_UART0) -#define NETX_VA_UART1 (NETX_IO_VIRT + NETX_OFS_UART1) -#define NETX_VA_UART2 (NETX_IO_VIRT + NETX_OFS_UART2) -#define NETX_VA_MIIMU (NETX_IO_VIRT + NETX_OF_MIIMU) -#define NETX_VA_SPI (NETX_IO_VIRT + NETX_OFS_SPI) -#define NETX_VA_I2C (NETX_IO_VIRT + NETX_OFS_I2C) -#define NETX_VA_SYSTIME (NETX_IO_VIRT + NETX_OFS_SYSTIME) -#define NETX_VA_RTC (NETX_IO_VIRT + NETX_OFS_RTC) -#define NETX_VA_EXTBUS (NETX_IO_VIRT + NETX_OFS_EXTBUS) -#define NETX_VA_LCD (NETX_IO_VIRT + NETX_OFS_LCD) -#define NETX_VA_USB (NETX_IO_VIRT + NETX_OFS_USB) -#define NETX_VA_XMAC0 (NETX_IO_VIRT + NETX_OFS_XMAC0) -#define NETX_VA_XMAC1 (NETX_IO_VIRT + NETX_OFS_XMAC1) -#define NETX_VA_XMAC2 (NETX_IO_VIRT + NETX_OFS_XMAC2) -#define NETX_VA_XMAC3 (NETX_IO_VIRT + NETX_OFS_XMAC3) -#define NETX_VA_XMAC(no) (NETX_IO_VIRT + NETX_OFS_XMAC(no)) -#define NETX_VA_PFIFO (NETX_IO_VIRT + NETX_OFS_PFIFO) -#define NETX_VA_XPEC0 (NETX_IO_VIRT + NETX_OFS_XPEC0) -#define NETX_VA_XPEC1 (NETX_IO_VIRT + NETX_OFS_XPEC1) -#define NETX_VA_XPEC2 (NETX_IO_VIRT + NETX_OFS_XPEC2) -#define NETX_VA_XPEC3 (NETX_IO_VIRT + NETX_OFS_XPEC3) -#define NETX_VA_XPEC(no) (NETX_IO_VIRT + NETX_OFS_XPEC(no)) -#define NETX_VA_VIC (NETX_IO_VIRT + NETX_OFS_VIC) - -/********************************* - * System functions * - *********************************/ - -/* Registers */ -#define NETX_SYSTEM_REG(ofs) __io(NETX_VA_SYSTEM + (ofs)) -#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) -#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) -#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) - -/* FIXME: Docs are not consistent */ -/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08) */ -#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) - -#define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10) -#define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34) -#define NETX_SYSTEM_IOC_ACCESS_KEY NETX_SYSTEM_REG(0x70) -#define NETX_SYSTEM_WDG_TR NETX_SYSTEM_REG(0x200) -#define NETX_SYSTEM_WDG_CTR NETX_SYSTEM_REG(0x204) -#define NETX_SYSTEM_WDG_IRQ_TIMEOUT NETX_SYSTEM_REG(0x208) -#define NETX_SYSTEM_WDG_RES_TIMEOUT NETX_SYSTEM_REG(0x20c) - -/* Bits */ -#define NETX_SYSTEM_RES_CR_RSTIN (1<<0) -#define NETX_SYSTEM_RES_CR_WDG_RES (1<<1) -#define NETX_SYSTEM_RES_CR_HOST_RES (1<<2) -#define NETX_SYSTEM_RES_CR_FIRMW_RES (1<<3) -#define NETX_SYSTEM_RES_CR_XPEC0_RES (1<<4) -#define NETX_SYSTEM_RES_CR_XPEC1_RES (1<<5) -#define NETX_SYSTEM_RES_CR_XPEC2_RES (1<<6) -#define NETX_SYSTEM_RES_CR_XPEC3_RES (1<<7) -#define NETX_SYSTEM_RES_CR_DIS_XPEC0_RES (1<<16) -#define NETX_SYSTEM_RES_CR_DIS_XPEC1_RES (1<<17) -#define NETX_SYSTEM_RES_CR_DIS_XPEC2_RES (1<<18) -#define NETX_SYSTEM_RES_CR_DIS_XPEC3_RES (1<<19) -#define NETX_SYSTEM_RES_CR_FIRMW_FLG0 (1<<20) -#define NETX_SYSTEM_RES_CR_FIRMW_FLG1 (1<<21) -#define NETX_SYSTEM_RES_CR_FIRMW_FLG2 (1<<22) -#define NETX_SYSTEM_RES_CR_FIRMW_FLG3 (1<<23) -#define NETX_SYSTEM_RES_CR_FIRMW_RES_EN (1<<24) -#define NETX_SYSTEM_RES_CR_RSTOUT (1<<25) -#define NETX_SYSTEM_RES_CR_EN_RSTOUT (1<<26) - -#define PHY_CONTROL_RESET (1<<31) -#define PHY_CONTROL_SIM_BYP (1<<30) -#define PHY_CONTROL_CLK_XLATIN (1<<29) -#define PHY_CONTROL_PHY1_EN (1<<21) -#define PHY_CONTROL_PHY1_NP_MSG_CODE -#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17) -#define PHY_CONTROL_PHY1_FIXMODE (1<<16) -#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13) -#define PHY_CONTROL_PHY0_EN (1<<12) -#define PHY_CONTROL_PHY0_NP_MSG_CODE -#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8) -#define PHY_CONTROL_PHY0_FIXMODE (1<<7) -#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4) -#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) - -#define PHY_MODE_10BASE_T_HALF 0 -#define PHY_MODE_10BASE_T_FULL 1 -#define PHY_MODE_100BASE_TX_FX_FULL 2 -#define PHY_MODE_100BASE_TX_FX_HALF 3 -#define PHY_MODE_100BASE_TX_HALF 4 -#define PHY_MODE_REPEATER 5 -#define PHY_MODE_POWER_DOWN 6 -#define PHY_MODE_ALL 7 - -/* Bits */ -#define VECT_CNTL_ENABLE (1 << 5) - -/******************************* - * GPIO and timer module * - *******************************/ - -/* Registers */ -#define NETX_GPIO_REG(ofs) __io(NETX_VA_GPIO + (ofs)) -#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) -#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) -#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) -#define NETX_GPIO_COUNTER_MAX(counter) NETX_GPIO_REG(0x94 + ((counter)<<2)) -#define NETX_GPIO_COUNTER_CURRENT(counter) NETX_GPIO_REG(0xa8 + ((counter)<<2)) -#define NETX_GPIO_IRQ_ENABLE NETX_GPIO_REG(0xbc) -#define NETX_GPIO_IRQ_DISABLE NETX_GPIO_REG(0xc0) -#define NETX_GPIO_SYSTIME_NS_CMP NETX_GPIO_REG(0xc4) -#define NETX_GPIO_LINE NETX_GPIO_REG(0xc8) -#define NETX_GPIO_IRQ NETX_GPIO_REG(0xd0) - -/* Bits */ -#define NETX_GPIO_CFG_IOCFG_GP_INPUT (0x0) -#define NETX_GPIO_CFG_IOCFG_GP_OUTPUT (0x1) -#define NETX_GPIO_CFG_IOCFG_GP_UART (0x2) -#define NETX_GPIO_CFG_INV (1<<2) -#define NETX_GPIO_CFG_MODE_INPUT_READ (0<<3) -#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3) -#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3) -#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3) -#define NETX_GPIO_CFG_COUNT_REF_COUNTER0 (0<<5) -#define NETX_GPIO_CFG_COUNT_REF_COUNTER1 (1<<5) -#define NETX_GPIO_CFG_COUNT_REF_COUNTER2 (2<<5) -#define NETX_GPIO_CFG_COUNT_REF_COUNTER3 (3<<5) -#define NETX_GPIO_CFG_COUNT_REF_COUNTER4 (4<<5) -#define NETX_GPIO_CFG_COUNT_REF_SYSTIME (7<<5) - -#define NETX_GPIO_COUNTER_CTRL_RUN (1<<0) -#define NETX_GPIO_COUNTER_CTRL_SYM (1<<1) -#define NETX_GPIO_COUNTER_CTRL_ONCE (1<<2) -#define NETX_GPIO_COUNTER_CTRL_IRQ_EN (1<<3) -#define NETX_GPIO_COUNTER_CTRL_CNT_EVENT (1<<4) -#define NETX_GPIO_COUNTER_CTRL_RST_EN (1<<5) -#define NETX_GPIO_COUNTER_CTRL_SEL_EVENT (1<<6) -#define NETX_GPIO_COUNTER_CTRL_GPIO_REF /* FIXME */ - -#define GPIO_BIT(gpio) (1<<(gpio)) -#define COUNTER_BIT(counter) ((1<<16)<<(counter)) - -/******************************* - * PIO * - *******************************/ - -/* Registers */ -#define NETX_PIO_REG(ofs) __io(NETX_VA_PIO + (ofs)) -#define NETX_PIO_INPIO NETX_PIO_REG(0x0) -#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) -#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) - -/******************************* - * MII Unit * - *******************************/ - -/* Registers */ -#define NETX_MIIMU __io(NETX_VA_MIIMU) - -/* Bits */ -#define MIIMU_SNRDY (1<<0) -#define MIIMU_PREAMBLE (1<<1) -#define MIIMU_OPMODE_WRITE (1<<2) -#define MIIMU_MDC_PERIOD (1<<3) -#define MIIMU_PHY_NRES (1<<4) -#define MIIMU_RTA (1<<5) -#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) -#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) -#define MIIMU_DATA(data) (((data) & 0xffff) << 16) - -/******************************* - * xmac / xpec * - *******************************/ - -/* XPEC register offsets relative to NETX_VA_XPEC(no) */ -#define NETX_XPEC_R0_OFS 0x00 -#define NETX_XPEC_R1_OFS 0x04 -#define NETX_XPEC_R2_OFS 0x08 -#define NETX_XPEC_R3_OFS 0x0c -#define NETX_XPEC_R4_OFS 0x10 -#define NETX_XPEC_R5_OFS 0x14 -#define NETX_XPEC_R6_OFS 0x18 -#define NETX_XPEC_R7_OFS 0x1c -#define NETX_XPEC_RANGE01_OFS 0x20 -#define NETX_XPEC_RANGE23_OFS 0x24 -#define NETX_XPEC_RANGE45_OFS 0x28 -#define NETX_XPEC_RANGE67_OFS 0x2c -#define NETX_XPEC_PC_OFS 0x48 -#define NETX_XPEC_TIMER_OFS(timer) (0x30 + ((timer)<<2)) -#define NETX_XPEC_IRQ_OFS 0x8c -#define NETX_XPEC_SYSTIME_NS_OFS 0x90 -#define NETX_XPEC_FIFO_DATA_OFS 0x94 -#define NETX_XPEC_SYSTIME_S_OFS 0x98 -#define NETX_XPEC_ADC_OFS 0x9c -#define NETX_XPEC_URX_COUNT_OFS 0x40 -#define NETX_XPEC_UTX_COUNT_OFS 0x44 -#define NETX_XPEC_PC_OFS 0x48 -#define NETX_XPEC_ZERO_OFS 0x4c -#define NETX_XPEC_STATCFG_OFS 0x50 -#define NETX_XPEC_EC_MASKA_OFS 0x54 -#define NETX_XPEC_EC_MASKB_OFS 0x58 -#define NETX_XPEC_EC_MASK0_OFS 0x5c -#define NETX_XPEC_EC_MASK8_OFS 0x7c -#define NETX_XPEC_EC_MASK9_OFS 0x80 -#define NETX_XPEC_XPU_HOLD_PC_OFS 0x100 -#define NETX_XPEC_RAM_START_OFS 0x2000 - -/* Bits */ -#define XPU_HOLD_PC (1<<0) - -/* XMAC register offsets relative to NETX_VA_XMAC(no) */ -#define NETX_XMAC_RPU_PROGRAM_START_OFS 0x000 -#define NETX_XMAC_RPU_PROGRAM_END_OFS 0x3ff -#define NETX_XMAC_TPU_PROGRAM_START_OFS 0x400 -#define NETX_XMAC_TPU_PROGRAM_END_OFS 0x7ff -#define NETX_XMAC_RPU_HOLD_PC_OFS 0xa00 -#define NETX_XMAC_TPU_HOLD_PC_OFS 0xa04 -#define NETX_XMAC_STATUS_SHARED0_OFS 0x840 -#define NETX_XMAC_CONFIG_SHARED0_OFS 0x844 -#define NETX_XMAC_STATUS_SHARED1_OFS 0x848 -#define NETX_XMAC_CONFIG_SHARED1_OFS 0x84c -#define NETX_XMAC_STATUS_SHARED2_OFS 0x850 -#define NETX_XMAC_CONFIG_SHARED2_OFS 0x854 -#define NETX_XMAC_STATUS_SHARED3_OFS 0x858 -#define NETX_XMAC_CONFIG_SHARED3_OFS 0x85c - -#define RPU_HOLD_PC (1<<15) -#define TPU_HOLD_PC (1<<15) - -/******************************* - * Pointer FIFO * - *******************************/ - -/* Registers */ -#define NETX_PFIFO_REG(ofs) __io(NETX_VA_PFIFO + (ofs)) -#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) -#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) -#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) -#define NETX_PFIFO_FULL NETX_PFIFO_REG(0x104) -#define NETX_PFIFO_EMPTY NETX_PFIFO_REG(0x108) -#define NETX_PFIFO_OVEFLOW NETX_PFIFO_REG(0x10c) -#define NETX_PFIFO_UNDERRUN NETX_PFIFO_REG(0x110) -#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) -#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) - -/******************************* - * Dual Port Memory * - *******************************/ - -/* Registers */ -#define NETX_DPMAS_REG(ofs) __io(NETX_VA_DPMAS + (ofs)) -#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) -#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) -#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) -#define NETX_DPMAS_IF_CONF0 NETX_DPMAS_REG(0x608) -#define NETX_DPMAS_IF_CONF1 NETX_DPMAS_REG(0x60c) -#define NETX_DPMAS_EXT_CONFIG(cs) NETX_DPMAS_REG(0x610 + 4 * (cs)) -#define NETX_DPMAS_IO_MODE0 NETX_DPMAS_REG(0x620) /* I/O 32..63 */ -#define NETX_DPMAS_DRV_EN0 NETX_DPMAS_REG(0x624) -#define NETX_DPMAS_DATA0 NETX_DPMAS_REG(0x628) -#define NETX_DPMAS_IO_MODE1 NETX_DPMAS_REG(0x630) /* I/O 64..84 */ -#define NETX_DPMAS_DRV_EN1 NETX_DPMAS_REG(0x634) -#define NETX_DPMAS_DATA1 NETX_DPMAS_REG(0x638) - -/* Bits */ -#define NETX_DPMAS_INT_EN_GLB_EN (1<<31) -#define NETX_DPMAS_INT_EN_MEM_LCK (1<<30) -#define NETX_DPMAS_INT_EN_WDG (1<<29) -#define NETX_DPMAS_INT_EN_PIO72 (1<<28) -#define NETX_DPMAS_INT_EN_PIO47 (1<<27) -#define NETX_DPMAS_INT_EN_PIO40 (1<<26) -#define NETX_DPMAS_INT_EN_PIO36 (1<<25) -#define NETX_DPMAS_INT_EN_PIO35 (1<<24) - -#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28) -#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28) -#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28) -#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28) -#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28) -#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14) -#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14) -#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14) - -#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26) -#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27) -#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28) -#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29) -#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30) - -#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29) -#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26) -#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23) -#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20) -#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17) -#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12) -#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7) -#define NETX_EXT_CONFIG_WAIT_POL (1<<6) -#define NETX_EXT_CONFIG_WAIT_EN (1<<5) -#define NETX_EXT_CONFIG_NRD_MODE (1<<4) -#define NETX_EXT_CONFIG_DS_MODE (1<<3) -#define NETX_EXT_CONFIG_NWR_MODE (1<<2) -#define NETX_EXT_CONFIG_16BIT (1<<1) -#define NETX_EXT_CONFIG_CS_ENABLE (1<<0) - -#define NETX_DPMAS_IO_MODE0_WRL (1<<13) -#define NETX_DPMAS_IO_MODE0_WAIT (1<<14) -#define NETX_DPMAS_IO_MODE0_READY (1<<15) -#define NETX_DPMAS_IO_MODE0_CS0 (1<<19) -#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20) - -#define NETX_DPMAS_IO_MODE1_CS2 (1<<15) -#define NETX_DPMAS_IO_MODE1_CS1 (1<<16) -#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30) -#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30) -#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30) -#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30) - -/******************************* - * I2C * - *******************************/ -#define NETX_I2C_REG(ofs) __io(NETX_VA_I2C, (ofs)) -#define NETX_I2C_CTRL NETX_I2C_REG(0x0) -#define NETX_I2C_DATA NETX_I2C_REG(0x4) - -#endif /* __ASM_ARCH_NETX_REGS_H */ diff --git a/include/asm-arm/arch-netx/param.h b/include/asm-arm/arch-netx/param.h deleted file mode 100644 index 7a80c26..0000000 --- a/include/asm-arm/arch-netx/param.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/param.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-netx/pfifo.h b/include/asm-arm/arch-netx/pfifo.h deleted file mode 100644 index 4af2ee4..0000000 --- a/include/asm-arm/arch-netx/pfifo.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * include/asm-arm/arch-netx/pfifo.h - * - * Copyright (c) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - - -#ifndef ASM_ARCH_PFIFO_H -#define ASM_ARCH_PFIFO_H - -static inline int pfifo_push(int no, unsigned int pointer) -{ - writel(pointer, NETX_PFIFO_BASE(no)); - return 0; -} - -static inline unsigned int pfifo_pop(int no) -{ - return readl(NETX_PFIFO_BASE(no)); -} - -static inline int pfifo_fill_level(int no) -{ - - return readl(NETX_PFIFO_FILL_LEVEL(no)); -} - -static inline int pfifo_full(int no) -{ - return readl(NETX_PFIFO_FULL) & (1<, Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include "netx-regs.h" - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, - NETX_SYSTEM_RES_CR); -} - -#endif - diff --git a/include/asm-arm/arch-netx/timex.h b/include/asm-arm/arch-netx/timex.h deleted file mode 100644 index 7fdb42da..0000000 --- a/include/asm-arm/arch-netx/timex.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-netx/timex.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE 100000000 diff --git a/include/asm-arm/arch-netx/uncompress.h b/include/asm-arm/arch-netx/uncompress.h deleted file mode 100644 index f894345..0000000 --- a/include/asm-arm/arch-netx/uncompress.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * include/asm-arm/arch-netx/uncompress.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - * - * This does not append a newline - */ - -#define REG(x) (*(volatile unsigned long *)(x)) - -#define UART1_BASE 0x100a00 -#define UART2_BASE 0x100a80 - -#define UART_DR 0x0 - -#define UART_CR 0x14 -#define CR_UART_EN (1<<0) - -#define UART_FR 0x18 -#define FR_BUSY (1<<3) -#define FR_TXFF (1<<5) - -static void putc(char c) -{ - unsigned long base; - - if (REG(UART1_BASE + UART_CR) & CR_UART_EN) - base = UART1_BASE; - else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) - base = UART2_BASE; - else - return; - - while (REG(base + UART_FR) & FR_TXFF); - REG(base + UART_DR) = c; -} - -static inline void flush(void) -{ - unsigned long base; - - if (REG(UART1_BASE + UART_CR) & CR_UART_EN) - base = UART1_BASE; - else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) - base = UART2_BASE; - else - return; - - while (REG(base + UART_FR) & FR_BUSY); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-netx/vmalloc.h b/include/asm-arm/arch-netx/vmalloc.h deleted file mode 100644 index da2da5a..0000000 --- a/include/asm-arm/arch-netx/vmalloc.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/vmalloc.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-netx/xc.h b/include/asm-arm/arch-netx/xc.h deleted file mode 100644 index 659af19..0000000 --- a/include/asm-arm/arch-netx/xc.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * linux/include/asm-arm/arch-netx/xc.h - * - * Copyright (C) 2005 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_XC_H -#define __ASM_ARCH_XC_H - -struct xc { - int no; - unsigned int type; - unsigned int version; - void __iomem *xpec_base; - void __iomem *xmac_base; - void __iomem *sram_base; - int irq; - struct device *dev; -}; - -int xc_reset(struct xc *x); -int xc_stop(struct xc* x); -int xc_start(struct xc *x); -int xc_running(struct xc *x); -int xc_request_firmware(struct xc* x); -struct xc* request_xc(int xcno, struct device *dev); -void free_xc(struct xc *x); - -#endif /* __ASM_ARCH_XC_H */ diff --git a/include/asm-arm/arch-ns9xxx/board.h b/include/asm-arm/arch-ns9xxx/board.h deleted file mode 100644 index e57443b..0000000 --- a/include/asm-arm/arch-ns9xxx/board.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/board.h - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_BOARD_H -#define __ASM_ARCH_BOARD_H - -#include - -#define board_is_a9m9750dev() (0 \ - || machine_is_cc9p9360dev() \ - || machine_is_cc9p9750dev() \ - ) - -#define board_is_a9mvali() (0 \ - || machine_is_cc9p9360val() \ - || machine_is_cc9p9750val() \ - ) - -#define board_is_jscc9p9210() (0 \ - || machine_is_cc9p9210js() \ - ) - -#define board_is_jscc9p9215() (0 \ - || machine_is_cc9p9215js() \ - ) - -#define board_is_jscc9p9360() (0 \ - || machine_is_cc9p9360js() \ - ) - -#define board_is_uncbas() (0 \ - || machine_is_cc7ucamry() \ - ) - -#endif /* ifndef __ASM_ARCH_BOARD_H */ diff --git a/include/asm-arm/arch-ns9xxx/debug-macro.S b/include/asm-arm/arch-ns9xxx/debug-macro.S deleted file mode 100644 index c78908d..0000000 --- a/include/asm-arm/arch-ns9xxx/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/debug-macro.S - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#include - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0) - ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-ns9xxx/dma.h b/include/asm-arm/arch-ns9xxx/dma.h deleted file mode 100644 index a67cbbe..0000000 --- a/include/asm-arm/arch-ns9xxx/dma.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/dma.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#endif /* ifndef __ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-ns9xxx/entry-macro.S b/include/asm-arm/arch-ns9xxx/entry-macro.S deleted file mode 100644 index e9d9449..0000000 --- a/include/asm-arm/arch-ns9xxx/entry-macro.S +++ /dev/null @@ -1,28 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/entry-macro.S - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#include -#include - - .macro get_irqnr_preamble, base, tmp - ldr \base, =SYS_ISRADDR - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #(SYS_ISA - SYS_ISRADDR)] - cmp \irqstat, #0 - ldrne \irqnr, [\base] - .endm - - .macro disable_fiq - .endm diff --git a/include/asm-arm/arch-ns9xxx/gpio.h b/include/asm-arm/arch-ns9xxx/gpio.h deleted file mode 100644 index adbca08..0000000 --- a/include/asm-arm/arch-ns9xxx/gpio.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/gpio.h - * - * Copyright (C) 2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. -*/ -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#include - -int gpio_request(unsigned gpio, const char *label); - -void gpio_free(unsigned gpio); - -int ns9xxx_gpio_configure(unsigned gpio, int inv, int func); - -int gpio_direction_input(unsigned gpio); - -int gpio_direction_output(unsigned gpio, int value); - -int gpio_get_value(unsigned gpio); - -void gpio_set_value(unsigned gpio, int value); - -/* - * ns9xxx can use gpio pins to trigger an irq, but it's not generic - * enough to be supported by the gpio_to_irq/irq_to_gpio interface - */ -static inline int gpio_to_irq(unsigned gpio) -{ - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return -EINVAL; -} - -/* get the cansleep() stubs */ -#include - -#endif /* ifndef __ASM_ARCH_GPIO_H */ diff --git a/include/asm-arm/arch-ns9xxx/hardware.h b/include/asm-arm/arch-ns9xxx/hardware.h deleted file mode 100644 index 0dca11c..0000000 --- a/include/asm-arm/arch-ns9xxx/hardware.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/hardware.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -/* - * NetSilicon NS9xxx internal mapping: - * - * physical <--> virtual - * 0x90000000 - 0x906fffff <--> 0xf9000000 - 0xf96fffff - * 0xa0100000 - 0xa0afffff <--> 0xfa100000 - 0xfaafffff - */ -#define io_p2v(x) (0xf0000000 \ - + (((x) & 0xf0000000) >> 4) \ - + ((x) & 0x00ffffff)) - -#define io_v2p(x) ((((x) & 0x0f000000) << 4) \ - + ((x) & 0x00ffffff)) - -#define __REGSHIFT(mask) ((mask) & (-(mask))) - -#define __REGBIT(bit) ((u32)1 << (bit)) -#define __REGBITS(hbit, lbit) ((((u32)1 << ((hbit) - (lbit) + 1)) - 1) << (lbit)) -#define __REGVAL(mask, value) (((value) * __REGSHIFT(mask)) & (mask)) - -#ifndef __ASSEMBLY__ - -# define __REG(x) ((void __iomem __force *)io_p2v((x))) -# define __REG2(x, y) ((void __iomem __force *)(io_p2v((x)) + 4 * (y))) - -# define __REGSET(var, field, value) \ - ((var) = (((var) & ~((field) & ~(value))) | (value))) - -# define REGSET(var, reg, field, value) \ - __REGSET(var, reg ## _ ## field, reg ## _ ## field ## _ ## value) - -# define REGSET_IDX(var, reg, field, idx, value) \ - __REGSET(var, reg ## _ ## field((idx)), reg ## _ ## field ## _ ## value((idx))) - -# define REGSETIM(var, reg, field, value) \ - __REGSET(var, reg ## _ ## field, __REGVAL(reg ## _ ## field, (value))) - -# define REGSETIM_IDX(var, reg, field, idx, value) \ - __REGSET(var, reg ## _ ## field((idx)), __REGVAL(reg ## _ ## field((idx)), (value))) - -# define __REGGET(var, field) \ - (((var) & (field))) - -# define REGGET(var, reg, field) \ - __REGGET(var, reg ## _ ## field) - -# define REGGET_IDX(var, reg, field, idx) \ - __REGGET(var, reg ## _ ## field((idx))) - -# define REGGETIM(var, reg, field) \ - __REGGET(var, reg ## _ ## field) / __REGSHIFT(reg ## _ ## field) - -# define REGGETIM_IDX(var, reg, field, idx) \ - __REGGET(var, reg ## _ ## field((idx))) / \ - __REGSHIFT(reg ## _ ## field((idx))) - -#else - -# define __REG(x) io_p2v(x) -# define __REG2(x, y) io_p2v((x) + 4 * (y)) - -#endif - -#endif /* ifndef __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-ns9xxx/io.h b/include/asm-arm/arch-ns9xxx/io.h deleted file mode 100644 index 6f82d28..0000000 --- a/include/asm-arm/arch-ns9xxx/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/io.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff /* XXX */ - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) -#define __mem_isa(a) (IO_BASE + (a)) - -#endif /* ifndef __ASM_ARCH_IO_H */ diff --git a/include/asm-arm/arch-ns9xxx/irqs.h b/include/asm-arm/arch-ns9xxx/irqs.h deleted file mode 100644 index e83d48e..0000000 --- a/include/asm-arm/arch-ns9xxx/irqs.h +++ /dev/null @@ -1,86 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/irqs.h - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -/* NetSilicon 9360 */ -#define IRQ_NS9XXX_WATCHDOG 0 -#define IRQ_NS9XXX_AHBBUSERR 1 -#define IRQ_NS9360_BBUSAGG 2 -/* irq 3 is reserved for NS9360 */ -#define IRQ_NS9XXX_ETHRX 4 -#define IRQ_NS9XXX_ETHTX 5 -#define IRQ_NS9XXX_ETHPHY 6 -#define IRQ_NS9360_LCD 7 -#define IRQ_NS9360_SERBRX 8 -#define IRQ_NS9360_SERBTX 9 -#define IRQ_NS9360_SERARX 10 -#define IRQ_NS9360_SERATX 11 -#define IRQ_NS9360_SERCRX 12 -#define IRQ_NS9360_SERCTX 13 -#define IRQ_NS9360_I2C 14 -#define IRQ_NS9360_BBUSDMA 15 -#define IRQ_NS9360_TIMER0 16 -#define IRQ_NS9360_TIMER1 17 -#define IRQ_NS9360_TIMER2 18 -#define IRQ_NS9360_TIMER3 19 -#define IRQ_NS9360_TIMER4 20 -#define IRQ_NS9360_TIMER5 21 -#define IRQ_NS9360_TIMER6 22 -#define IRQ_NS9360_TIMER7 23 -#define IRQ_NS9360_RTC 24 -#define IRQ_NS9360_USBHOST 25 -#define IRQ_NS9360_USBDEVICE 26 -#define IRQ_NS9360_IEEE1284 27 -#define IRQ_NS9XXX_EXT0 28 -#define IRQ_NS9XXX_EXT1 29 -#define IRQ_NS9XXX_EXT2 30 -#define IRQ_NS9XXX_EXT3 31 - -#define BBUS_IRQ(irq) (32 + irq) - -#define IRQ_BBUS_DMA BBUS_IRQ(0) -#define IRQ_BBUS_SERBRX BBUS_IRQ(2) -#define IRQ_BBUS_SERBTX BBUS_IRQ(3) -#define IRQ_BBUS_SERARX BBUS_IRQ(4) -#define IRQ_BBUS_SERATX BBUS_IRQ(5) -#define IRQ_BBUS_SERCRX BBUS_IRQ(6) -#define IRQ_BBUS_SERCTX BBUS_IRQ(7) -#define IRQ_BBUS_SERDRX BBUS_IRQ(8) -#define IRQ_BBUS_SERDTX BBUS_IRQ(9) -#define IRQ_BBUS_I2C BBUS_IRQ(10) -#define IRQ_BBUS_1284 BBUS_IRQ(11) -#define IRQ_BBUS_UTIL BBUS_IRQ(12) -#define IRQ_BBUS_RTC BBUS_IRQ(13) -#define IRQ_BBUS_USBHST BBUS_IRQ(14) -#define IRQ_BBUS_USBDEV BBUS_IRQ(15) -#define IRQ_BBUS_AHBDMA1 BBUS_IRQ(24) -#define IRQ_BBUS_AHBDMA2 BBUS_IRQ(25) - -/* - * these Interrupts are specific for the a9m9750dev board. - * They are generated by an FPGA that interrupts the CPU on - * IRQ_NS9360_EXT2 - */ -#define FPGA_IRQ(irq) (64 + irq) - -#define IRQ_FPGA_UARTA FPGA_IRQ(0) -#define IRQ_FPGA_UARTB FPGA_IRQ(1) -#define IRQ_FPGA_UARTC FPGA_IRQ(2) -#define IRQ_FPGA_UARTD FPGA_IRQ(3) -#define IRQ_FPGA_TOUCH FPGA_IRQ(4) -#define IRQ_FPGA_CF FPGA_IRQ(5) -#define IRQ_FPGA_CAN0 FPGA_IRQ(6) -#define IRQ_FPGA_CAN1 FPGA_IRQ(7) - -#define NR_IRQS 72 - -#endif /* __ASM_ARCH_IRQS_H */ diff --git a/include/asm-arm/arch-ns9xxx/memory.h b/include/asm-arm/arch-ns9xxx/memory.h deleted file mode 100644 index ce1343e..0000000 --- a/include/asm-arm/arch-ns9xxx/memory.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/memory.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. -*/ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* x in [0..3] */ -#define NS9XXX_CSxSTAT_PHYS(x) UL(((x) + 4) << 28) - -#define NS9XXX_CS0STAT_LENGTH UL(0x1000) -#define NS9XXX_CS1STAT_LENGTH UL(0x1000) -#define NS9XXX_CS2STAT_LENGTH UL(0x1000) -#define NS9XXX_CS3STAT_LENGTH UL(0x1000) - -#define PHYS_OFFSET UL(0x00000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-ns9xxx/module.h b/include/asm-arm/arch-ns9xxx/module.h deleted file mode 100644 index ac08a31..0000000 --- a/include/asm-arm/arch-ns9xxx/module.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/module.h - * - * Copyright (C) 2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_MODULE_H -#define __ASM_ARCH_MODULE_H - -#include - -#define module_is_cc7ucamry() (0 \ - || machine_is_cc7ucamry() \ - ) - -#define module_is_cc9c() (0 \ - || machine_is_cc9c() \ - ) - -#define module_is_cc9p9210() (0 \ - || machine_is_cc9p9210() \ - || machine_is_cc9p9210js() \ - ) - -#define module_is_cc9p9215() (0 \ - || machine_is_cc9p9215() \ - || machine_is_cc9p9215js() \ - ) - -#define module_is_cc9p9360() (0 \ - || machine_is_a9m9360() \ - || machine_is_cc9p9360dev() \ - || machine_is_cc9p9360js() \ - || machine_is_cc9p9360val() \ - ) - -#define module_is_cc9p9750() (0 \ - || machine_is_a9m9750() \ - || machine_is_cc9p9750dev() \ - || machine_is_cc9p9750js() \ - || machine_is_cc9p9750val() \ - ) - -#define module_is_ccw9c() (0 \ - || machine_is_ccw9c() \ - ) - -#define module_is_inc20otter() (0 \ - || machine_is_inc20otter() \ - ) - -#define module_is_otter() (0 \ - || machine_is_otter() \ - ) - -#endif /* ifndef __ASM_ARCH_MODULE_H */ diff --git a/include/asm-arm/arch-ns9xxx/processor-ns9360.h b/include/asm-arm/arch-ns9xxx/processor-ns9360.h deleted file mode 100644 index f3aa6c5..0000000 --- a/include/asm-arm/arch-ns9xxx/processor-ns9360.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/processor-ns9360.h - * - * Copyright (C) 2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_PROCESSORNS9360_H -#define __ASM_ARCH_PROCESSORNS9360_H - -#include - -void ns9360_reset(char mode); - -unsigned long ns9360_systemclock(void) __attribute__((const)); - -static inline unsigned long ns9360_cpuclock(void) __attribute__((const)); -static inline unsigned long ns9360_cpuclock(void) -{ - return ns9360_systemclock() / 2; -} - -void __init ns9360_map_io(void); - -extern struct sys_timer ns9360_timer; - -int ns9360_gpio_configure(unsigned gpio, int inv, int func); - -#endif /* ifndef __ASM_ARCH_PROCESSORNS9360_H */ diff --git a/include/asm-arm/arch-ns9xxx/processor.h b/include/asm-arm/arch-ns9xxx/processor.h deleted file mode 100644 index 3137e5b..0000000 --- a/include/asm-arm/arch-ns9xxx/processor.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/processor.h - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_PROCESSOR_H -#define __ASM_ARCH_PROCESSOR_H - -#include - -#define processor_is_ns9210() (0 \ - || module_is_cc7ucamry() \ - || module_is_cc9p9210() \ - || module_is_inc20otter() \ - || module_is_otter() \ - ) - -#define processor_is_ns9215() (0 \ - || module_is_cc9p9215() \ - ) - -#define processor_is_ns9360() (0 \ - || module_is_cc9p9360() \ - || module_is_cc9c() \ - || module_is_ccw9c() \ - ) - -#define processor_is_ns9750() (0 \ - || module_is_cc9p9750() \ - ) - -#define processor_is_ns921x() (0 \ - || processor_is_ns9210() \ - || processor_is_ns9215() \ - ) - -#endif /* ifndef __ASM_ARCH_PROCESSOR_H */ diff --git a/include/asm-arm/arch-ns9xxx/regs-bbu.h b/include/asm-arm/arch-ns9xxx/regs-bbu.h deleted file mode 100644 index b41b31d..0000000 --- a/include/asm-arm/arch-ns9xxx/regs-bbu.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/regs-bbu.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_REGSBBU_H -#define __ASM_ARCH_REGSBBU_H - -#include - -/* BBus Utility */ - -/* GPIO Configuration Registers block 1 */ -/* NOTE: the HRM starts counting at 1 for the GPIO registers, here the start is - * at 0 for each block. That is, BBU_GCONFb1(0) is GPIO Configuration Register - * #1, BBU_GCONFb2(0) is GPIO Configuration Register #8. */ -#define BBU_GCONFb1(x) __REG2(0x90600010, (x)) -#define BBU_GCONFb2(x) __REG2(0x90600100, (x)) - -#define BBU_GCONFx_DIR(m) __REGBIT(3 + (((m) & 7) << 2)) -#define BBU_GCONFx_DIR_INPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 0) -#define BBU_GCONFx_DIR_OUTPUT(m) __REGVAL(BBU_GCONFx_DIR(m), 1) -#define BBU_GCONFx_INV(m) __REGBIT(2 + (((m) & 7) << 2)) -#define BBU_GCONFx_INV_NO(m) __REGVAL(BBU_GCONFx_INV(m), 0) -#define BBU_GCONFx_INV_YES(m) __REGVAL(BBU_GCONFx_INV(m), 1) -#define BBU_GCONFx_FUNC(m) __REGBITS(1 + (((m) & 7) << 2), ((m) & 7) << 2) -#define BBU_GCONFx_FUNC_0(m) __REGVAL(BBU_GCONFx_FUNC(m), 0) -#define BBU_GCONFx_FUNC_1(m) __REGVAL(BBU_GCONFx_FUNC(m), 1) -#define BBU_GCONFx_FUNC_2(m) __REGVAL(BBU_GCONFx_FUNC(m), 2) -#define BBU_GCONFx_FUNC_3(m) __REGVAL(BBU_GCONFx_FUNC(m), 3) - -#define BBU_GCTRL1 __REG(0x90600030) -#define BBU_GCTRL2 __REG(0x90600034) -#define BBU_GCTRL3 __REG(0x90600120) - -#define BBU_GSTAT1 __REG(0x90600040) -#define BBU_GSTAT2 __REG(0x90600044) -#define BBU_GSTAT3 __REG(0x90600130) - -#endif /* ifndef __ASM_ARCH_REGSBBU_H */ diff --git a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h b/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h deleted file mode 100644 index 6bf1ed2..0000000 --- a/include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/regs-board-a9m9750dev.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_REGSBOARDA9M9750_H -#define __ASM_ARCH_REGSBOARDA9M9750_H - -#include - -#define FPGA_UARTA_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0)) -#define FPGA_UARTB_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x08) -#define FPGA_UARTC_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x10) -#define FPGA_UARTD_BASE io_p2v(NS9XXX_CSxSTAT_PHYS(0) + 0x18) - -#define FPGA_IER __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x50) -#define FPGA_ISR __REG(NS9XXX_CSxSTAT_PHYS(0) + 0x60) - -#endif /* ifndef __ASM_ARCH_REGSBOARDA9M9750_H */ diff --git a/include/asm-arm/arch-ns9xxx/regs-mem.h b/include/asm-arm/arch-ns9xxx/regs-mem.h deleted file mode 100644 index 023f7be..0000000 --- a/include/asm-arm/arch-ns9xxx/regs-mem.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/regs-mem.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_REGSMEM_H -#define __ASM_ARCH_REGSMEM_H - -#include - -/* Memory Module */ - -/* Control register */ -#define MEM_CTRL __REG(0xa0700000) - -/* Status register */ -#define MEM_STAT __REG(0xa0700004) - -/* Configuration register */ -#define MEM_CONF __REG(0xa0700008) - -/* Dynamic Memory Control register */ -#define MEM_DMCTRL __REG(0xa0700020) - -/* Dynamic Memory Refresh Timer */ -#define MEM_DMRT __REG(0xa0700024) - -/* Dynamic Memory Read Configuration register */ -#define MEM_DMRC __REG(0xa0700028) - -/* Dynamic Memory Precharge Command Period (tRP) */ -#define MEM_DMPCP __REG(0xa0700030) - -/* Dynamic Memory Active to Precharge Command Period (tRAS) */ -#define MEM_DMAPCP __REG(0xa0700034) - -/* Dynamic Memory Self-Refresh Exit Time (tSREX) */ -#define MEM_DMSRET __REG(0xa0700038) - -/* Dynamic Memory Last Data Out to Active Time (tAPR) */ -#define MEM_DMLDOAT __REG(0xa070003c) - -/* Dynamic Memory Data-in to Active Command Time (tDAL or TAPW) */ -#define MEM_DMDIACT __REG(0xa0700040) - -/* Dynamic Memory Write Recovery Time (tWR, tDPL, tRWL, tRDL) */ -#define MEM_DMWRT __REG(0xa0700044) - -/* Dynamic Memory Active to Active Command Period (tRC) */ -#define MEM_DMAACP __REG(0xa0700048) - -/* Dynamic Memory Auto Refresh Period, and Auto Refresh to Active Command Period (tRFC) */ -#define MEM_DMARP __REG(0xa070004c) - -/* Dynamic Memory Exit Self-Refresh to Active Command (tXSR) */ -#define MEM_DMESRAC __REG(0xa0700050) - -/* Dynamic Memory Active Bank A to Active B Time (tRRD) */ -#define MEM_DMABAABT __REG(0xa0700054) - -/* Dynamic Memory Load Mode register to Active Command Time (tMRD) */ -#define MEM_DMLMACT __REG(0xa0700058) - -/* Static Memory Extended Wait */ -#define MEM_SMEW __REG(0xa0700080) - -/* Dynamic Memory Configuration Register x */ -#define MEM_DMCONF(x) __REG2(0xa0700100, (x) << 3) - -/* Dynamic Memory RAS and CAS Delay x */ -#define MEM_DMRCD(x) __REG2(0xa0700104, (x) << 3) - -/* Static Memory Configuration Register x */ -#define MEM_SMC(x) __REG2(0xa0700200, (x) << 3) - -/* Static Memory Configuration Register x: Write protect */ -#define MEM_SMC_PSMC __REGBIT(20) -#define MEM_SMC_PSMC_OFF __REGVAL(MEM_SMC_PSMC, 0) -#define MEM_SMC_PSMC_ON __REGVAL(MEM_SMC_PSMC, 1) - -/* Static Memory Configuration Register x: Buffer enable */ -#define MEM_SMC_BSMC __REGBIT(19) -#define MEM_SMC_BSMC_OFF __REGVAL(MEM_SMC_BSMC, 0) -#define MEM_SMC_BSMC_ON __REGVAL(MEM_SMC_BSMC, 1) - -/* Static Memory Configuration Register x: Extended Wait */ -#define MEM_SMC_EW __REGBIT(8) -#define MEM_SMC_EW_OFF __REGVAL(MEM_SMC_EW, 0) -#define MEM_SMC_EW_ON __REGVAL(MEM_SMC_EW, 1) - -/* Static Memory Configuration Register x: Byte lane state */ -#define MEM_SMC_PB __REGBIT(7) -#define MEM_SMC_PB_0 __REGVAL(MEM_SMC_PB, 0) -#define MEM_SMC_PB_1 __REGVAL(MEM_SMC_PB, 1) - -/* Static Memory Configuration Register x: Chip select polarity */ -#define MEM_SMC_PC __REGBIT(6) -#define MEM_SMC_PC_AL __REGVAL(MEM_SMC_PC, 0) -#define MEM_SMC_PC_AH __REGVAL(MEM_SMC_PC, 1) - -/* static memory configuration register x: page mode*/ -#define MEM_SMC_PM __REGBIT(3) -#define MEM_SMC_PM_DIS __REGVAL(MEM_SMC_PM, 0) -#define MEM_SMC_PM_ASYNC __REGVAL(MEM_SMC_PM, 1) - -/* static memory configuration register x: Memory width */ -#define MEM_SMC_MW __REGBITS(1, 0) -#define MEM_SMC_MW_8 __REGVAL(MEM_SMC_MW, 0) -#define MEM_SMC_MW_16 __REGVAL(MEM_SMC_MW, 1) -#define MEM_SMC_MW_32 __REGVAL(MEM_SMC_MW, 2) - -/* Static Memory Write Enable Delay x */ -#define MEM_SMWED(x) __REG2(0xa0700204, (x) << 3) - -/* Static Memory Output Enable Delay x */ -#define MEM_SMOED(x) __REG2(0xa0700208, (x) << 3) - -/* Static Memory Read Delay x */ -#define MEM_SMRD(x) __REG2(0xa070020c, (x) << 3) - -/* Static Memory Page Mode Read Delay 0 */ -#define MEM_SMPMRD(x) __REG2(0xa0700210, (x) << 3) - -/* Static Memory Write Delay */ -#define MEM_SMWD(x) __REG2(0xa0700214, (x) << 3) - -/* Static Memory Turn Round Delay x */ -#define MEM_SWT(x) __REG2(0xa0700218, (x) << 3) - -#endif /* ifndef __ASM_ARCH_REGSMEM_H */ diff --git a/include/asm-arm/arch-ns9xxx/regs-sys-common.h b/include/asm-arm/arch-ns9xxx/regs-sys-common.h deleted file mode 100644 index bc82d5e..0000000 --- a/include/asm-arm/arch-ns9xxx/regs-sys-common.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/regs-sys-common.h - * - * Copyright (C) 2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_REGSSYSCOMMON_H -#define __ASM_ARCH_REGSSYSCOMMON_H -#include - -/* Interrupt Vector Address Register Level x */ -#define SYS_IVA(x) __REG2(0xa09000c4, (x)) - -/* Interrupt Configuration registers */ -#define SYS_IC(x) __REG2(0xa0900144, (x)) - -/* ISRADDR */ -#define SYS_ISRADDR __REG(0xa0900164) - -/* Interrupt Status Active */ -#define SYS_ISA __REG(0xa0900168) - -/* Interrupt Status Raw */ -#define SYS_ISR __REG(0xa090016c) - -#endif /* ifndef __ASM_ARCH_REGSSYSCOMMON_H */ diff --git a/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h b/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h deleted file mode 100644 index 821275a..0000000 --- a/include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/regs-sys-ns9360.h - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_REGSSYSNS9360_H -#define __ASM_ARCH_REGSSYSNS9360_H - -#include - -/* System Control Module */ - -/* AHB Arbiter Gen Configuration */ -#define SYS_AHBAGENCONF __REG(0xa0900000) - -/* BRC */ -#define SYS_BRC(x) __REG2(0xa0900004, (x)) - -/* Timer x Reload Count register */ -#define SYS_TRC(x) __REG2(0xa0900044, (x)) - -/* Timer x Read register */ -#define SYS_TR(x) __REG2(0xa0900084, (x)) - -/* Timer Interrupt Status register */ -#define SYS_TIS __REG(0xa0900170) - -/* PLL Configuration register */ -#define SYS_PLL __REG(0xa0900188) - -/* PLL FS status */ -#define SYS_PLL_FS __REGBITS(24, 23) - -/* PLL ND status */ -#define SYS_PLL_ND __REGBITS(20, 16) - -/* PLL Configuration register: PLL SW change */ -#define SYS_PLL_SWC __REGBIT(15) -#define SYS_PLL_SWC_NO __REGVAL(SYS_PLL_SWC, 0) -#define SYS_PLL_SWC_YES __REGVAL(SYS_PLL_SWC, 1) - -/* Timer x Control register */ -#define SYS_TC(x) __REG2(0xa0900190, (x)) - -/* Timer x Control register: Timer enable */ -#define SYS_TCx_TEN __REGBIT(15) -#define SYS_TCx_TEN_DIS __REGVAL(SYS_TCx_TEN, 0) -#define SYS_TCx_TEN_EN __REGVAL(SYS_TCx_TEN, 1) - -/* Timer x Control register: CPU debug mode */ -#define SYS_TCx_TDBG __REGBIT(10) -#define SYS_TCx_TDBG_CONT __REGVAL(SYS_TCx_TDBG, 0) -#define SYS_TCx_TDBG_STOP __REGVAL(SYS_TCx_TDBG, 1) - -/* Timer x Control register: Interrupt clear */ -#define SYS_TCx_INTC __REGBIT(9) -#define SYS_TCx_INTC_UNSET __REGVAL(SYS_TCx_INTC, 0) -#define SYS_TCx_INTC_SET __REGVAL(SYS_TCx_INTC, 1) - -/* Timer x Control register: Timer clock select */ -#define SYS_TCx_TLCS __REGBITS(8, 6) -#define SYS_TCx_TLCS_CPU __REGVAL(SYS_TCx_TLCS, 0) /* CPU clock */ -#define SYS_TCx_TLCS_DIV2 __REGVAL(SYS_TCx_TLCS, 1) /* CPU clock / 2 */ -#define SYS_TCx_TLCS_DIV4 __REGVAL(SYS_TCx_TLCS, 2) /* CPU clock / 4 */ -#define SYS_TCx_TLCS_DIV8 __REGVAL(SYS_TCx_TLCS, 3) /* CPU clock / 8 */ -#define SYS_TCx_TLCS_DIV16 __REGVAL(SYS_TCx_TLCS, 4) /* CPU clock / 16 */ -#define SYS_TCx_TLCS_DIV32 __REGVAL(SYS_TCx_TLCS, 5) /* CPU clock / 32 */ -#define SYS_TCx_TLCS_DIV64 __REGVAL(SYS_TCx_TLCS, 6) /* CPU clock / 64 */ -#define SYS_TCx_TLCS_EXT __REGVAL(SYS_TCx_TLCS, 7) - -/* Timer x Control register: Timer mode */ -#define SYS_TCx_TM __REGBITS(5, 4) -#define SYS_TCx_TM_IEE __REGVAL(SYS_TCx_TM, 0) /* Internal timer or external event */ -#define SYS_TCx_TM_ELL __REGVAL(SYS_TCx_TM, 1) /* External low-level, gated timer */ -#define SYS_TCx_TM_EHL __REGVAL(SYS_TCx_TM, 2) /* External high-level, gated timer */ -#define SYS_TCx_TM_CONCAT __REGVAL(SYS_TCx_TM, 3) /* Concatenate the lower timer. */ - -/* Timer x Control register: Interrupt select */ -#define SYS_TCx_INTS __REGBIT(3) -#define SYS_TCx_INTS_DIS __REGVAL(SYS_TCx_INTS, 0) -#define SYS_TCx_INTS_EN __REGVAL(SYS_TCx_INTS, 1) - -/* Timer x Control register: Up/down select */ -#define SYS_TCx_UDS __REGBIT(2) -#define SYS_TCx_UDS_UP __REGVAL(SYS_TCx_UDS, 0) -#define SYS_TCx_UDS_DOWN __REGVAL(SYS_TCx_UDS, 1) - -/* Timer x Control register: 32- or 16-bit timer */ -#define SYS_TCx_TSZ __REGBIT(1) -#define SYS_TCx_TSZ_16 __REGVAL(SYS_TCx_TSZ, 0) -#define SYS_TCx_TSZ_32 __REGVAL(SYS_TCx_TSZ, 1) - -/* Timer x Control register: Reload enable */ -#define SYS_TCx_REN __REGBIT(0) -#define SYS_TCx_REN_DIS __REGVAL(SYS_TCx_REN, 0) -#define SYS_TCx_REN_EN __REGVAL(SYS_TCx_REN, 1) - -/* System Memory Chip Select x Dynamic Memory Base */ -#define SYS_SMCSDMB(x) __REG2(0xa09001d0, (x) << 1) - -/* System Memory Chip Select x Dynamic Memory Mask */ -#define SYS_SMCSDMM(x) __REG2(0xa09001d4, (x) << 1) - -/* System Memory Chip Select x Static Memory Base */ -#define SYS_SMCSSMB(x) __REG2(0xa09001f0, (x) << 1) - -/* System Memory Chip Select x Static Memory Base: Chip select x base */ -#define SYS_SMCSSMB_CSxB __REGBITS(31, 12) - -/* System Memory Chip Select x Static Memory Mask */ -#define SYS_SMCSSMM(x) __REG2(0xa09001f4, (x) << 1) - -/* System Memory Chip Select x Static Memory Mask: Chip select x mask */ -#define SYS_SMCSSMM_CSxM __REGBITS(31, 12) - -/* System Memory Chip Select x Static Memory Mask: Chip select x enable */ -#define SYS_SMCSSMM_CSEx __REGBIT(0) -#define SYS_SMCSSMM_CSEx_DIS __REGVAL(SYS_SMCSSMM_CSEx, 0) -#define SYS_SMCSSMM_CSEx_EN __REGVAL(SYS_SMCSSMM_CSEx, 1) - -/* General purpose, user-defined ID register */ -#define SYS_GENID __REG(0xa0900210) - -/* External Interrupt x Control register */ -#define SYS_EIC(x) __REG2(0xa0900214, (x)) - -/* External Interrupt x Control register: Status */ -#define SYS_EIC_STS __REGBIT(3) - -/* External Interrupt x Control register: Clear */ -#define SYS_EIC_CLR __REGBIT(2) - -/* External Interrupt x Control register: Polarity */ -#define SYS_EIC_PLTY __REGBIT(1) -#define SYS_EIC_PLTY_AH __REGVAL(SYS_EIC_PLTY, 0) -#define SYS_EIC_PLTY_AL __REGVAL(SYS_EIC_PLTY, 1) - -/* External Interrupt x Control register: Level edge */ -#define SYS_EIC_LVEDG __REGBIT(0) -#define SYS_EIC_LVEDG_LEVEL __REGVAL(SYS_EIC_LVEDG, 0) -#define SYS_EIC_LVEDG_EDGE __REGVAL(SYS_EIC_LVEDG, 1) - -#endif /* ifndef __ASM_ARCH_REGSSYSNS9360_H */ diff --git a/include/asm-arm/arch-ns9xxx/system.h b/include/asm-arm/arch-ns9xxx/system.h deleted file mode 100644 index c294168..0000000 --- a/include/asm-arm/arch-ns9xxx/system.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/system.h - * - * Copyright (C) 2006,2007 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ -#ifdef CONFIG_PROCESSOR_NS9360 - if (processor_is_ns9360()) - ns9360_reset(mode); - else -#endif - BUG(); - - BUG(); -} - -#endif /* ifndef __ASM_ARCH_SYSTEM_H */ diff --git a/include/asm-arm/arch-ns9xxx/timex.h b/include/asm-arm/arch-ns9xxx/timex.h deleted file mode 100644 index f776cbd..0000000 --- a/include/asm-arm/arch-ns9xxx/timex.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/timex.h - * - * Copyright (C) 2005-2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* - * value for CLOCK_TICK_RATE stolen from include/asm-arm/arch-s3c2410/timex.h. - * See there for an explanation. - */ -#define CLOCK_TICK_RATE 12000000 - -#endif /* ifndef __ASM_ARCH_TIMEX_H */ diff --git a/include/asm-arm/arch-ns9xxx/uncompress.h b/include/asm-arm/arch-ns9xxx/uncompress.h deleted file mode 100644 index 71066ba..0000000 --- a/include/asm-arm/arch-ns9xxx/uncompress.h +++ /dev/null @@ -1,164 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/uncompress.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include - -#define __REG(x) ((void __iomem __force *)(x)) - -static void putc_dummy(char c, void __iomem *base) -{ - /* nothing */ -} - -static void putc_ns9360(char c, void __iomem *base) -{ - static int t = 0x10000; - do { - if (t) - --t; - - if (__raw_readl(base + 8) & (1 << 3)) { - __raw_writeb(c, base + 16); - t = 0x10000; - break; - } - } while (t); -} - -static void putc_a9m9750dev(char c, void __iomem *base) -{ - static int t = 0x10000; - do { - if (t) - --t; - - if (__raw_readb(base + 5) & (1 << 5)) { - __raw_writeb(c, base); - t = 0x10000; - break; - } - } while (t); - -} - -static void putc_ns921x(char c, void __iomem *base) -{ - static int t = 0x10000; - do { - if (t) - --t; - - if (!(__raw_readl(base) & (1 << 11))) { - __raw_writeb(c, base + 0x0028); - t = 0x10000; - break; - } - } while (t); -} - -#define MSCS __REG(0xA0900184) - -#define NS9360_UARTA __REG(0x90200040) -#define NS9360_UARTB __REG(0x90200000) -#define NS9360_UARTC __REG(0x90300000) -#define NS9360_UARTD __REG(0x90300040) - -#define NS9360_UART_ENABLED(base) \ - (__raw_readl(NS9360_UARTA) & (1 << 31)) - -#define A9M9750DEV_UARTA __REG(0x40000000) - -#define NS921XSYS_CLOCK __REG(0xa090017c) -#define NS921X_UARTA __REG(0x90010000) -#define NS921X_UARTB __REG(0x90018000) -#define NS921X_UARTC __REG(0x90020000) -#define NS921X_UARTD __REG(0x90028000) - -#define NS921X_UART_ENABLED(base) \ - (__raw_readl((base) + 0x1000) & (1 << 29)) - -static void autodetect(void (**putc)(char, void __iomem *), void __iomem **base) -{ - if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x00) { - /* ns9360 or ns9750 */ - if (NS9360_UART_ENABLED(NS9360_UARTA)) { - *putc = putc_ns9360; - *base = NS9360_UARTA; - return; - } else if (NS9360_UART_ENABLED(NS9360_UARTB)) { - *putc = putc_ns9360; - *base = NS9360_UARTB; - return; - } else if (NS9360_UART_ENABLED(NS9360_UARTC)) { - *putc = putc_ns9360; - *base = NS9360_UARTC; - return; - } else if (NS9360_UART_ENABLED(NS9360_UARTD)) { - *putc = putc_ns9360; - *base = NS9360_UARTD; - return; - } else if (__raw_readl(__REG(0xa09001f4)) == 0xfffff001) { - *putc = putc_a9m9750dev; - *base = A9M9750DEV_UARTA; - return; - } - } else if (((__raw_readl(MSCS) >> 16) & 0xfe) == 0x02) { - /* ns921x */ - u32 clock = __raw_readl(NS921XSYS_CLOCK); - - if ((clock & (1 << 1)) && - NS921X_UART_ENABLED(NS921X_UARTA)) { - *putc = putc_ns921x; - *base = NS921X_UARTA; - return; - } else if ((clock & (1 << 2)) && - NS921X_UART_ENABLED(NS921X_UARTB)) { - *putc = putc_ns921x; - *base = NS921X_UARTB; - return; - } else if ((clock & (1 << 3)) && - NS921X_UART_ENABLED(NS921X_UARTC)) { - *putc = putc_ns921x; - *base = NS921X_UARTC; - return; - } else if ((clock & (1 << 4)) && - NS921X_UART_ENABLED(NS921X_UARTD)) { - *putc = putc_ns921x; - *base = NS921X_UARTD; - return; - } - } - - *putc = putc_dummy; -} - -void (*myputc)(char, void __iomem *); -void __iomem *base; - -static void putc(char c) -{ - myputc(c, base); -} - -static void arch_decomp_setup(void) -{ - autodetect(&myputc, &base); -} -#define arch_decomp_wdog() - -static void flush(void) -{ - /* nothing */ -} - -#endif /* ifndef __ASM_ARCH_UNCOMPRESS_H */ diff --git a/include/asm-arm/arch-ns9xxx/vmalloc.h b/include/asm-arm/arch-ns9xxx/vmalloc.h deleted file mode 100644 index 2f3cb6f..0000000 --- a/include/asm-arm/arch-ns9xxx/vmalloc.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-arm/arch-ns9xxx/vmalloc.h - * - * Copyright (C) 2006 by Digi International Inc. - * All rights reserved. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published by - * the Free Software Foundation. - */ -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (0xf0000000) - -#endif /* ifndef __ASM_ARCH_VMALLOC_H */ diff --git a/include/asm-arm/arch-omap/aic23.h b/include/asm-arm/arch-omap/aic23.h deleted file mode 100644 index aec2d65..0000000 --- a/include/asm-arm/arch-omap/aic23.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/aic23.h - * - * Hardware definitions for TI TLV320AIC23 audio codec - * - * Copyright (C) 2002 RidgeRun, Inc. - * Author: Steve Johnson - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_AIC23_H -#define __ASM_ARCH_AIC23_H - -// Codec TLV320AIC23 -#define LEFT_LINE_VOLUME_ADDR 0x00 -#define RIGHT_LINE_VOLUME_ADDR 0x01 -#define LEFT_CHANNEL_VOLUME_ADDR 0x02 -#define RIGHT_CHANNEL_VOLUME_ADDR 0x03 -#define ANALOG_AUDIO_CONTROL_ADDR 0x04 -#define DIGITAL_AUDIO_CONTROL_ADDR 0x05 -#define POWER_DOWN_CONTROL_ADDR 0x06 -#define DIGITAL_AUDIO_FORMAT_ADDR 0x07 -#define SAMPLE_RATE_CONTROL_ADDR 0x08 -#define DIGITAL_INTERFACE_ACT_ADDR 0x09 -#define RESET_CONTROL_ADDR 0x0F - -// Left (right) line input volume control register -#define LRS_ENABLED 0x0100 -#define LIM_MUTED 0x0080 -#define LIV_DEFAULT 0x0017 -#define LIV_MAX 0x001f -#define LIV_MIN 0x0000 - -// Left (right) channel headphone volume control register -#define LZC_ON 0x0080 -#define LHV_DEFAULT 0x0079 -#define LHV_MAX 0x007f -#define LHV_MIN 0x0000 - -// Analog audio path control register -#define STA_REG(x) ((x)<<6) -#define STE_ENABLED 0x0020 -#define DAC_SELECTED 0x0010 -#define BYPASS_ON 0x0008 -#define INSEL_MIC 0x0004 -#define MICM_MUTED 0x0002 -#define MICB_20DB 0x0001 - -// Digital audio path control register -#define DACM_MUTE 0x0008 -#define DEEMP_32K 0x0002 -#define DEEMP_44K 0x0004 -#define DEEMP_48K 0x0006 -#define ADCHP_ON 0x0001 - -// Power control down register -#define DEVICE_POWER_OFF 0x0080 -#define CLK_OFF 0x0040 -#define OSC_OFF 0x0020 -#define OUT_OFF 0x0010 -#define DAC_OFF 0x0008 -#define ADC_OFF 0x0004 -#define MIC_OFF 0x0002 -#define LINE_OFF 0x0001 - -// Digital audio interface register -#define MS_MASTER 0x0040 -#define LRSWAP_ON 0x0020 -#define LRP_ON 0x0010 -#define IWL_16 0x0000 -#define IWL_20 0x0004 -#define IWL_24 0x0008 -#define IWL_32 0x000C -#define FOR_I2S 0x0002 -#define FOR_DSP 0x0003 - -// Sample rate control register -#define CLKOUT_HALF 0x0080 -#define CLKIN_HALF 0x0040 -#define BOSR_384fs 0x0002 // BOSR_272fs when in USB mode -#define USB_CLK_ON 0x0001 -#define SR_MASK 0xf -#define CLKOUT_SHIFT 7 -#define CLKIN_SHIFT 6 -#define SR_SHIFT 2 -#define BOSR_SHIFT 1 - -// Digital interface register -#define ACT_ON 0x0001 - -#define TLV320AIC23ID1 (0x1a) // cs low -#define TLV320AIC23ID2 (0x1b) // cs high - -void aic23_power_up(void); -void aic23_power_down(void); - -#endif /* __ASM_ARCH_AIC23_H */ diff --git a/include/asm-arm/arch-omap/blizzard.h b/include/asm-arm/arch-omap/blizzard.h deleted file mode 100644 index 8d160f1..0000000 --- a/include/asm-arm/arch-omap/blizzard.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _BLIZZARD_H -#define _BLIZZARD_H - -struct blizzard_platform_data { - void (*power_up)(struct device *dev); - void (*power_down)(struct device *dev); - unsigned long (*get_clock_rate)(struct device *dev); - - unsigned te_connected : 1; -}; - -#endif diff --git a/include/asm-arm/arch-omap/board-2430sdp.h b/include/asm-arm/arch-omap/board-2430sdp.h deleted file mode 100644 index c7db900..0000000 --- a/include/asm-arm/arch-omap/board-2430sdp.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-2430sdp.h - * - * Hardware definitions for TI OMAP2430 SDP board. - * - * Based on board-h4.h by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_2430SDP_H -#define __ASM_ARCH_OMAP_2430SDP_H - -/* Placeholder for 2430SDP specific defines */ -#define OMAP24XX_ETHR_START 0x08000300 -#define OMAP24XX_ETHR_GPIO_IRQ 149 -#define SDP2430_CS0_BASE 0x04000000 - -#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ - -#endif /* __ASM_ARCH_OMAP_2430SDP_H */ diff --git a/include/asm-arm/arch-omap/board-ams-delta.h b/include/asm-arm/arch-omap/board-ams-delta.h deleted file mode 100644 index 9aee15d..0000000 --- a/include/asm-arm/arch-omap/board-ams-delta.h +++ /dev/null @@ -1,76 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-ams-delta.h - * - * Copyright (C) 2006 Jonathan McDowell - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __ASM_ARCH_OMAP_AMS_DELTA_H -#define __ASM_ARCH_OMAP_AMS_DELTA_H - -#if defined (CONFIG_MACH_AMS_DELTA) - -#define AMS_DELTA_LATCH1_PHYS 0x01000000 -#define AMS_DELTA_LATCH1_VIRT 0xEA000000 -#define AMS_DELTA_MODEM_PHYS 0x04000000 -#define AMS_DELTA_MODEM_VIRT 0xEB000000 -#define AMS_DELTA_LATCH2_PHYS 0x08000000 -#define AMS_DELTA_LATCH2_VIRT 0xEC000000 - -#define AMS_DELTA_LATCH1_LED_CAMERA 0x01 -#define AMS_DELTA_LATCH1_LED_ADVERT 0x02 -#define AMS_DELTA_LATCH1_LED_EMAIL 0x04 -#define AMS_DELTA_LATCH1_LED_HANDSFREE 0x08 -#define AMS_DELTA_LATCH1_LED_VOICEMAIL 0x10 -#define AMS_DELTA_LATCH1_LED_VOICE 0x20 - -#define AMS_DELTA_LATCH2_LCD_VBLEN 0x0001 -#define AMS_DELTA_LATCH2_LCD_NDISP 0x0002 -#define AMS_DELTA_LATCH2_NAND_NCE 0x0004 -#define AMS_DELTA_LATCH2_NAND_NRE 0x0008 -#define AMS_DELTA_LATCH2_NAND_NWP 0x0010 -#define AMS_DELTA_LATCH2_NAND_NWE 0x0020 -#define AMS_DELTA_LATCH2_NAND_ALE 0x0040 -#define AMS_DELTA_LATCH2_NAND_CLE 0x0080 -#define AMD_DELTA_LATCH2_KEYBRD_PWR 0x0100 -#define AMD_DELTA_LATCH2_KEYBRD_DATA 0x0200 -#define AMD_DELTA_LATCH2_SCARD_RSTIN 0x0400 -#define AMD_DELTA_LATCH2_SCARD_CMDVCC 0x0800 -#define AMS_DELTA_LATCH2_MODEM_NRESET 0x1000 -#define AMS_DELTA_LATCH2_MODEM_CODEC 0x2000 - -#define AMS_DELTA_GPIO_PIN_KEYBRD_DATA 0 -#define AMS_DELTA_GPIO_PIN_KEYBRD_CLK 1 -#define AMS_DELTA_GPIO_PIN_MODEM_IRQ 2 -#define AMS_DELTA_GPIO_PIN_HOOK_SWITCH 4 -#define AMS_DELTA_GPIO_PIN_SCARD_NOFF 6 -#define AMS_DELTA_GPIO_PIN_SCARD_IO 7 -#define AMS_DELTA_GPIO_PIN_CONFIG 11 -#define AMS_DELTA_GPIO_PIN_NAND_RB 12 - -#ifndef __ASSEMBLY__ -void ams_delta_latch1_write(u8 mask, u8 value); -void ams_delta_latch2_write(u16 mask, u16 value); -#endif - -#endif /* CONFIG_MACH_AMS_DELTA */ - -#endif /* __ASM_ARCH_OMAP_AMS_DELTA_H */ diff --git a/include/asm-arm/arch-omap/board-apollon.h b/include/asm-arm/arch-omap/board-apollon.h deleted file mode 100644 index 547125a..0000000 --- a/include/asm-arm/arch-omap/board-apollon.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-apollon.h - * - * Hardware definitions for Samsung OMAP24XX Apollon board. - * - * Initial creation by Kyungmin Park - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_APOLLON_H -#define __ASM_ARCH_OMAP_APOLLON_H - -extern void apollon_mmc_init(void); - -/* Placeholder for APOLLON specific defines */ -#define APOLLON_ETHR_GPIO_IRQ 74 - -#endif /* __ASM_ARCH_OMAP_APOLLON_H */ - diff --git a/include/asm-arm/arch-omap/board-fsample.h b/include/asm-arm/arch-omap/board-fsample.h deleted file mode 100644 index 89a1e52..0000000 --- a/include/asm-arm/arch-omap/board-fsample.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-fsample.h - * - * Board-specific goodies for TI F-Sample. - * - * Copyright (C) 2006 Google, Inc. - * Author: Brian Swetland - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_OMAP_FSAMPLE_H -#define __ASM_ARCH_OMAP_FSAMPLE_H - -/* fsample is pretty close to p2-sample */ -#include - -#define fsample_cpld_read(reg) __raw_readb(reg) -#define fsample_cpld_write(val, reg) __raw_writeb(val, reg) - -#define FSAMPLE_CPLD_BASE 0xE8100000 -#define FSAMPLE_CPLD_SIZE SZ_4K -#define FSAMPLE_CPLD_START 0x05080000 - -#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00) -#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02) -#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02) -#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04) -#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06) -#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06) - -#define FSAMPLE_CPLD_BIT_BT_RESET 0 -#define FSAMPLE_CPLD_BIT_LCD_RESET 1 -#define FSAMPLE_CPLD_BIT_CAM_PWDN 2 -#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3 -#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4 -#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5 -#define FSAMPLE_CPLD_BIT_BACKLIGHT 6 -#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7 -#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8 -#define FSAMPLE_CPLD_BIT_OTG_RESET 9 - -#define fsample_cpld_set(bit) \ - fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR) - -#define fsample_cpld_clear(bit) \ - fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR) - -#endif diff --git a/include/asm-arm/arch-omap/board-h2.h b/include/asm-arm/arch-omap/board-h2.h deleted file mode 100644 index c322796..0000000 --- a/include/asm-arm/arch-omap/board-h2.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-h2.h - * - * Hardware definitions for TI OMAP1610 H2 board. - * - * Cleanup for Linux-2.6 by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_H2_H -#define __ASM_ARCH_OMAP_H2_H - -/* Placeholder for H2 specific defines */ - -/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ -#define OMAP1610_ETHR_START 0x04000300 - -extern void h2_mmc_init(void); -extern void h2_mmc_slot_cover_handler(void *arg, int state); - -#endif /* __ASM_ARCH_OMAP_H2_H */ - diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h deleted file mode 100644 index c5d0f32..0000000 --- a/include/asm-arm/arch-omap/board-h3.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-h3.h - * - * Copyright (C) 2001 RidgeRun, Inc. - * Copyright (C) 2004 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __ASM_ARCH_OMAP_H3_H -#define __ASM_ARCH_OMAP_H3_H - -/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ -#define OMAP1710_ETHR_START 0x04000300 - -extern void h3_mmc_init(void); -extern void h3_mmc_slot_cover_handler(void *arg, int state); - -#endif /* __ASM_ARCH_OMAP_H3_H */ diff --git a/include/asm-arm/arch-omap/board-h4.h b/include/asm-arm/arch-omap/board-h4.h deleted file mode 100644 index 7e0efef..0000000 --- a/include/asm-arm/arch-omap/board-h4.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-h4.h - * - * Hardware definitions for TI OMAP1610 H4 board. - * - * Initial creation by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_H4_H -#define __ASM_ARCH_OMAP_H4_H - -/* Placeholder for H4 specific defines */ -#define OMAP24XX_ETHR_GPIO_IRQ 92 -#endif /* __ASM_ARCH_OMAP_H4_H */ - diff --git a/include/asm-arm/arch-omap/board-innovator.h b/include/asm-arm/arch-omap/board-innovator.h deleted file mode 100644 index 9ca03de..0000000 --- a/include/asm-arm/arch-omap/board-innovator.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-innovator.h - * - * Copyright (C) 2001 RidgeRun, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __ASM_ARCH_OMAP_INNOVATOR_H -#define __ASM_ARCH_OMAP_INNOVATOR_H - -#if defined (CONFIG_ARCH_OMAP15XX) - -#ifndef OMAP_SDRAM_DEVICE -#define OMAP_SDRAM_DEVICE D256M_1X16_4B -#endif - -#define OMAP1510P1_IMIF_PRI_VALUE 0x00 -#define OMAP1510P1_EMIFS_PRI_VALUE 0x00 -#define OMAP1510P1_EMIFF_PRI_VALUE 0x00 - -#ifndef __ASSEMBLY__ -void fpga_write(unsigned char val, int reg); -unsigned char fpga_read(int reg); -#endif - -#endif /* CONFIG_ARCH_OMAP15XX */ - -#if defined (CONFIG_ARCH_OMAP16XX) - -/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ -#define INNOVATOR1610_ETHR_START 0x04000300 - -#endif /* CONFIG_ARCH_OMAP1610 */ -#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */ diff --git a/include/asm-arm/arch-omap/board-nokia.h b/include/asm-arm/arch-omap/board-nokia.h deleted file mode 100644 index 72deea2..0000000 --- a/include/asm-arm/arch-omap/board-nokia.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-nokia.h - * - * Information structures for Nokia-specific board config data - * - * Copyright (C) 2005 Nokia Corporation - */ - -#ifndef _OMAP_BOARD_NOKIA_H -#define _OMAP_BOARD_NOKIA_H - -#include - -#define OMAP_TAG_NOKIA_BT 0x4e01 -#define OMAP_TAG_WLAN_CX3110X 0x4e02 -#define OMAP_TAG_CBUS 0x4e03 -#define OMAP_TAG_EM_ASIC_BB5 0x4e04 - - -#define BT_CHIP_CSR 1 -#define BT_CHIP_TI 2 - -#define BT_SYSCLK_12 1 -#define BT_SYSCLK_38_4 2 - -struct omap_bluetooth_config { - u8 chip_type; - u8 bt_wakeup_gpio; - u8 host_wakeup_gpio; - u8 reset_gpio; - u8 bt_uart; - u8 bd_addr[6]; - u8 bt_sysclk; -}; - -struct omap_wlan_cx3110x_config { - u8 chip_type; - s16 power_gpio; - s16 irq_gpio; - s16 spi_cs_gpio; -}; - -struct omap_cbus_config { - s16 clk_gpio; - s16 dat_gpio; - s16 sel_gpio; -}; - -struct omap_em_asic_bb5_config { - s16 retu_irq_gpio; - s16 tahvo_irq_gpio; -}; - -#endif diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h deleted file mode 100644 index 9492609..0000000 --- a/include/asm-arm/arch-omap/board-osk.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-osk.h - * - * Hardware definitions for TI OMAP5912 OSK board. - * - * Written by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_OSK_H -#define __ASM_ARCH_OMAP_OSK_H - -/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ -#define OMAP_OSK_ETHR_START 0x04800300 - -/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with - * alternate pin configurations for hardware-controlled blinking. - */ -#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) -# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0) -# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1) -# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2) -# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3) -# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4) -# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5) - -#endif /* __ASM_ARCH_OMAP_OSK_H */ - diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h deleted file mode 100644 index 6fac2c8..0000000 --- a/include/asm-arm/arch-omap/board-palmte.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-palmte.h - * - * Hardware definitions for the Palm Tungsten E device. - * - * Maintainters : http://palmtelinux.sf.net - * palmtelinux-developpers@lists.sf.net - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP_BOARD_PALMTE_H -#define __OMAP_BOARD_PALMTE_H - -#define PALMTE_USBDETECT_GPIO 0 -#define PALMTE_USB_OR_DC_GPIO 1 -#define PALMTE_TSC_GPIO 4 -#define PALMTE_PINTDAV_GPIO 6 -#define PALMTE_MMC_WP_GPIO 8 -#define PALMTE_MMC_POWER_GPIO 9 -#define PALMTE_HDQ_GPIO 11 -#define PALMTE_HEADPHONES_GPIO 14 -#define PALMTE_SPEAKER_GPIO 15 -#define PALMTE_DC_GPIO OMAP_MPUIO(2) -#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4) -#define PALMTE_MMC1_GPIO OMAP_MPUIO(6) -#define PALMTE_MMC2_GPIO OMAP_MPUIO(7) -#define PALMTE_MMC3_GPIO OMAP_MPUIO(11) - -#endif /* __OMAP_BOARD_PALMTE_H */ diff --git a/include/asm-arm/arch-omap/board-palmtt.h b/include/asm-arm/arch-omap/board-palmtt.h deleted file mode 100644 index d9590b0..0000000 --- a/include/asm-arm/arch-omap/board-palmtt.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-palmte.h - * - * Hardware definitions for the Palm Tungsten|T device. - * - * Maintainters : Marek Vasut - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP_BOARD_PALMTT_H -#define __OMAP_BOARD_PALMTT_H - -#define PALMTT_USBDETECT_GPIO 0 -#define PALMTT_CABLE_GPIO 1 -#define PALMTT_LED_GPIO 3 -#define PALMTT_PENIRQ_GPIO 6 -#define PALMTT_MMC_WP_GPIO 8 -#define PALMTT_HDQ_GPIO 11 - -#endif /* __OMAP_BOARD_PALMTT_H */ diff --git a/include/asm-arm/arch-omap/board-palmz71.h b/include/asm-arm/arch-omap/board-palmz71.h deleted file mode 100644 index 1252a85..0000000 --- a/include/asm-arm/arch-omap/board-palmz71.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-palmz71.h - * - * Hardware definitions for the Palm Zire71 device. - * - * Maintainters : Marek Vasut - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP_BOARD_PALMZ71_H -#define __OMAP_BOARD_PALMZ71_H - -#define PALMZ71_USBDETECT_GPIO 0 -#define PALMZ71_PENIRQ_GPIO 6 -#define PALMZ71_MMC_WP_GPIO 8 -#define PALMZ71_HDQ_GPIO 11 - -#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1) -#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2) -#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3) -#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4) - -#endif /* __OMAP_BOARD_PALMZ71_H */ diff --git a/include/asm-arm/arch-omap/board-perseus2.h b/include/asm-arm/arch-omap/board-perseus2.h deleted file mode 100644 index d7429cb..0000000 --- a/include/asm-arm/arch-omap/board-perseus2.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board-perseus2.h - * - * Copyright 2003 by Texas Instruments Incorporated - * OMAP730 / Perseus2 support by Jean Pihet - * - * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com) - * Author: RidgeRun, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#ifndef __ASM_ARCH_OMAP_PERSEUS2_H -#define __ASM_ARCH_OMAP_PERSEUS2_H - -#include - -#ifndef OMAP_SDRAM_DEVICE -#define OMAP_SDRAM_DEVICE D256M_1X16_4B -#endif - -#endif diff --git a/include/asm-arm/arch-omap/board-sx1.h b/include/asm-arm/arch-omap/board-sx1.h deleted file mode 100644 index 355adbd..0000000 --- a/include/asm-arm/arch-omap/board-sx1.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Siemens SX1 board definitions - * - * Copyright: Vovan888 at gmail com - * - * This package is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#ifndef __ASM_ARCH_SX1_I2C_CHIPS_H -#define __ASM_ARCH_SX1_I2C_CHIPS_H - -#define SOFIA_MAX_LIGHT_VAL 0x2B - -#define SOFIA_I2C_ADDR 0x32 -/* Sofia reg 3 bits masks */ -#define SOFIA_POWER1_REG 0x03 - -#define SOFIA_USB_POWER 0x01 -#define SOFIA_MMC_POWER 0x04 -#define SOFIA_BLUETOOTH_POWER 0x08 -#define SOFIA_MMILIGHT_POWER 0x20 - -#define SOFIA_POWER2_REG 0x04 -#define SOFIA_BACKLIGHT_REG 0x06 -#define SOFIA_KEYLIGHT_REG 0x07 -#define SOFIA_DIMMING_REG 0x09 - - -/* Function Prototypes for SX1 devices control on I2C bus */ - -int sx1_setbacklight(u8 backlight); -int sx1_getbacklight(u8 *backlight); -int sx1_setkeylight(u8 keylight); -int sx1_getkeylight(u8 *keylight); - -int sx1_setmmipower(u8 onoff); -int sx1_setusbpower(u8 onoff); -int sx1_i2c_read_byte(u8 devaddr, u8 regoffset, u8 *value); -int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value); - -/* MMC prototypes */ - -extern void sx1_mmc_init(void); -extern void sx1_mmc_slot_cover_handler(void *arg, int state); - -#endif /* __ASM_ARCH_SX1_I2C_CHIPS_H */ diff --git a/include/asm-arm/arch-omap/board-voiceblue.h b/include/asm-arm/arch-omap/board-voiceblue.h deleted file mode 100644 index ed6d346..0000000 --- a/include/asm-arm/arch-omap/board-voiceblue.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (C) 2004 2N Telekomunikace, Ladislav Michl - * - * Hardware definitions for OMAP5910 based VoiceBlue board. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_VOICEBLUE_H -#define __ASM_ARCH_VOICEBLUE_H - -extern void voiceblue_wdt_enable(void); -extern void voiceblue_wdt_disable(void); -extern void voiceblue_wdt_ping(void); -extern void voiceblue_reset(void); - -#endif /* __ASM_ARCH_VOICEBLUE_H */ - diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h deleted file mode 100644 index 99564c7..0000000 --- a/include/asm-arm/arch-omap/board.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/board.h - * - * Information structures for board-specific data - * - * Copyright (C) 2004 Nokia Corporation - * Written by Juha Yrjölä - */ - -#ifndef _OMAP_BOARD_H -#define _OMAP_BOARD_H - -#include - -#include - -/* Different peripheral ids */ -#define OMAP_TAG_CLOCK 0x4f01 -#define OMAP_TAG_MMC 0x4f02 -#define OMAP_TAG_SERIAL_CONSOLE 0x4f03 -#define OMAP_TAG_USB 0x4f04 -#define OMAP_TAG_LCD 0x4f05 -#define OMAP_TAG_GPIO_SWITCH 0x4f06 -#define OMAP_TAG_UART 0x4f07 -#define OMAP_TAG_FBMEM 0x4f08 -#define OMAP_TAG_STI_CONSOLE 0x4f09 -#define OMAP_TAG_CAMERA_SENSOR 0x4f0a - -#define OMAP_TAG_BOOT_REASON 0x4f80 -#define OMAP_TAG_FLASH_PART 0x4f81 -#define OMAP_TAG_VERSION_STR 0x4f82 - -struct omap_clock_config { - /* 0 for 12 MHz, 1 for 13 MHz and 2 for 19.2 MHz */ - u8 system_clock_type; -}; - -struct omap_mmc_conf { - unsigned enabled:1; - /* nomux means "standard" muxing is wrong on this board, and that - * board-specific code handled it before common init logic. - */ - unsigned nomux:1; - /* switch pin can be for card detect (default) or card cover */ - unsigned cover:1; - /* 4 wire signaling is optional, and is only used for SD/SDIO */ - unsigned wire4:1; - s16 power_pin; - s16 switch_pin; - s16 wp_pin; -}; - -struct omap_mmc_config { - struct omap_mmc_conf mmc[2]; -}; - -struct omap_serial_console_config { - u8 console_uart; - u32 console_speed; -}; - -struct omap_sti_console_config { - unsigned enable:1; - u8 channel; -}; - -struct omap_camera_sensor_config { - u16 reset_gpio; - int (*power_on)(void * data); - int (*power_off)(void * data); -}; - -struct omap_usb_config { - /* Configure drivers according to the connectors on your board: - * - "A" connector (rectagular) - * ... for host/OHCI use, set "register_host". - * - "B" connector (squarish) or "Mini-B" - * ... for device/gadget use, set "register_dev". - * - "Mini-AB" connector (very similar to Mini-B) - * ... for OTG use as device OR host, initialize "otg" - */ - unsigned register_host:1; - unsigned register_dev:1; - u8 otg; /* port number, 1-based: usb1 == 2 */ - - u8 hmc_mode; - - /* implicitly true if otg: host supports remote wakeup? */ - u8 rwc; - - /* signaling pins used to talk to transceiver on usbN: - * 0 == usbN unused - * 2 == usb0-only, using internal transceiver - * 3 == 3 wire bidirectional - * 4 == 4 wire bidirectional - * 6 == 6 wire unidirectional (or TLL) - */ - u8 pins[3]; -}; - -struct omap_lcd_config { - char panel_name[16]; - char ctrl_name[16]; - s16 nreset_gpio; - u8 data_lines; -}; - -struct device; -struct fb_info; -struct omap_backlight_config { - int default_intensity; - int (*set_power)(struct device *dev, int state); - int (*check_fb)(struct fb_info *fb); -}; - -struct omap_fbmem_config { - u32 start; - u32 size; -}; - -struct omap_pwm_led_platform_data { - const char *name; - int intensity_timer; - int blink_timer; - void (*set_power)(struct omap_pwm_led_platform_data *self, int on_off); -}; - -/* See include/asm-arm/arch-omap/gpio-switch.h for definitions */ -struct omap_gpio_switch_config { - char name[12]; - u16 gpio; - int flags:4; - int type:4; - int key_code:24; /* Linux key code */ -}; - -struct omap_uart_config { - /* Bit field of UARTs present; bit 0 --> UART1 */ - unsigned int enabled_uarts; -}; - - -struct omap_flash_part_config { - char part_table[0]; -}; - -struct omap_boot_reason_config { - char reason_str[12]; -}; - -struct omap_version_config { - char component[12]; - char version[12]; -}; - - -#include - -struct omap_board_config_entry { - u16 tag; - u16 len; - u8 data[0]; -}; - -struct omap_board_config_kernel { - u16 tag; - const void *data; -}; - -extern const void *__omap_get_config(u16 tag, size_t len, int nr); - -#define omap_get_config(tag, type) \ - ((const type *) __omap_get_config((tag), sizeof(type), 0)) -#define omap_get_nr_config(tag, type, nr) \ - ((const type *) __omap_get_config((tag), sizeof(type), (nr))) - -extern const void *omap_get_var_config(u16 tag, size_t *len); - -extern struct omap_board_config_kernel *omap_board_config; -extern int omap_board_config_size; - - -/* for TI reference platforms sharing the same debug card */ -extern int debug_card_init(u32 addr, unsigned gpio); - -#endif diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h deleted file mode 100644 index 4c7b351..0000000 --- a/include/asm-arm/arch-omap/clock.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/clock.h - * - * Copyright (C) 2004 - 2005 Nokia corporation - * Written by Tuukka Tikkanen - * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_OMAP_CLOCK_H -#define __ARCH_ARM_OMAP_CLOCK_H - -struct module; -struct clk; - -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) - -struct clksel_rate { - u8 div; - u32 val; - u8 flags; -}; - -struct clksel { - struct clk *parent; - const struct clksel_rate *rates; -}; - -struct dpll_data { - void __iomem *mult_div1_reg; - u32 mult_mask; - u32 div1_mask; - u16 last_rounded_m; - u8 last_rounded_n; - unsigned long last_rounded_rate; - unsigned int rate_tolerance; - u16 max_multiplier; - u8 max_divider; - u32 max_tolerance; -# if defined(CONFIG_ARCH_OMAP3) - u8 modes; - void __iomem *control_reg; - u32 enable_mask; - u8 auto_recal_bit; - u8 recal_en_bit; - u8 recal_st_bit; - void __iomem *autoidle_reg; - u32 autoidle_mask; - void __iomem *idlest_reg; - u8 idlest_bit; -# endif -}; - -#endif - -struct clk { - struct list_head node; - struct module *owner; - const char *name; - int id; - struct clk *parent; - unsigned long rate; - __u32 flags; - void __iomem *enable_reg; - __u8 enable_bit; - __s8 usecount; - void (*recalc)(struct clk *); - int (*set_rate)(struct clk *, unsigned long); - long (*round_rate)(struct clk *, unsigned long); - void (*init)(struct clk *); - int (*enable)(struct clk *); - void (*disable)(struct clk *); -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) - u8 fixed_div; - void __iomem *clksel_reg; - u32 clksel_mask; - const struct clksel *clksel; - struct dpll_data *dpll_data; -#else - __u8 rate_offset; - __u8 src_offset; -#endif -#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) - struct dentry *dent; /* For visible tree hierarchy */ -#endif -}; - -struct cpufreq_frequency_table; - -struct clk_functions { - int (*clk_enable)(struct clk *clk); - void (*clk_disable)(struct clk *clk); - long (*clk_round_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_rate)(struct clk *clk, unsigned long rate); - int (*clk_set_parent)(struct clk *clk, struct clk *parent); - struct clk * (*clk_get_parent)(struct clk *clk); - void (*clk_allow_idle)(struct clk *clk); - void (*clk_deny_idle)(struct clk *clk); - void (*clk_disable_unused)(struct clk *clk); -#ifdef CONFIG_CPU_FREQ - void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); -#endif -}; - -extern unsigned int mpurate; - -extern int clk_init(struct clk_functions * custom_clocks); -extern int clk_register(struct clk *clk); -extern void clk_unregister(struct clk *clk); -extern void propagate_rate(struct clk *clk); -extern void recalculate_root_clocks(void); -extern void followparent_recalc(struct clk * clk); -extern void clk_allow_idle(struct clk *clk); -extern void clk_deny_idle(struct clk *clk); -extern int clk_get_usecount(struct clk *clk); -extern void clk_enable_init_clocks(void); - -/* Clock flags */ -#define RATE_CKCTL (1 << 0) /* Main fixed ratio clocks */ -#define RATE_FIXED (1 << 1) /* Fixed clock rate */ -#define RATE_PROPAGATES (1 << 2) /* Program children too */ -#define VIRTUAL_CLOCK (1 << 3) /* Composite clock from table */ -#define ALWAYS_ENABLED (1 << 4) /* Clock cannot be disabled */ -#define ENABLE_REG_32BIT (1 << 5) /* Use 32-bit access */ -#define VIRTUAL_IO_ADDRESS (1 << 6) /* Clock in virtual address */ -#define CLOCK_IDLE_CONTROL (1 << 7) -#define CLOCK_NO_IDLE_PARENT (1 << 8) -#define DELAYED_APP (1 << 9) /* Delay application of clock */ -#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ -#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ -#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ -/* bits 13-20 are currently free */ -#define CLOCK_IN_OMAP310 (1 << 21) -#define CLOCK_IN_OMAP730 (1 << 22) -#define CLOCK_IN_OMAP1510 (1 << 23) -#define CLOCK_IN_OMAP16XX (1 << 24) -#define CLOCK_IN_OMAP242X (1 << 25) -#define CLOCK_IN_OMAP243X (1 << 26) -#define CLOCK_IN_OMAP343X (1 << 27) /* clocks common to all 343X */ -#define PARENT_CONTROLS_CLOCK (1 << 28) -#define CLOCK_IN_OMAP3430ES1 (1 << 29) /* 3430ES1 clocks only */ -#define CLOCK_IN_OMAP3430ES2 (1 << 30) /* 3430ES2 clocks only */ - -/* Clksel_rate flags */ -#define DEFAULT_RATE (1 << 0) -#define RATE_IN_242X (1 << 1) -#define RATE_IN_243X (1 << 2) -#define RATE_IN_343X (1 << 3) /* rates common to all 343X */ -#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ - -#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) - - -/* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */ -#define CORE_CLK_SRC_32K 0 -#define CORE_CLK_SRC_DPLL 1 -#define CORE_CLK_SRC_DPLL_X2 2 - -#endif diff --git a/include/asm-arm/arch-omap/common.h b/include/asm-arm/arch-omap/common.h deleted file mode 100644 index 8ac0307..0000000 --- a/include/asm-arm/arch-omap/common.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/common.h - * - * Header for code common to all OMAP machines. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ARCH_ARM_MACH_OMAP_COMMON_H -#define __ARCH_ARM_MACH_OMAP_COMMON_H - -#include - -struct sys_timer; - -extern void omap_map_common_io(void); -extern struct sys_timer omap_timer; -extern void omap_serial_init(void); -#ifdef CONFIG_I2C_OMAP -extern int omap_register_i2c_bus(int bus_id, u32 clkrate, - struct i2c_board_info const *info, - unsigned len); -#else -static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, - struct i2c_board_info const *info, - unsigned len) -{ - return 0; -} -#endif - -/* IO bases for various OMAP processors */ -struct omap_globals { - void __iomem *tap; /* Control module ID code */ - void __iomem *sdrc; /* SDRAM Controller */ - void __iomem *sms; /* SDRAM Memory Scheduler */ - void __iomem *ctrl; /* System Control Module */ - void __iomem *prm; /* Power and Reset Management */ - void __iomem *cm; /* Clock Management */ -}; - -void omap2_set_globals_242x(void); -void omap2_set_globals_243x(void); -void omap2_set_globals_343x(void); - -/* These get called from omap2_set_globals_xxxx(), do not call these */ -void omap2_set_globals_memory(struct omap_globals *); -void omap2_set_globals_control(struct omap_globals *); -void omap2_set_globals_prcm(struct omap_globals *); - -#endif /* __ARCH_ARM_MACH_OMAP_COMMON_H */ diff --git a/include/asm-arm/arch-omap/control.h b/include/asm-arm/arch-omap/control.h deleted file mode 100644 index 987553e..0000000 --- a/include/asm-arm/arch-omap/control.h +++ /dev/null @@ -1,189 +0,0 @@ -#ifndef __ASM_ARCH_CONTROL_H -#define __ASM_ARCH_CONTROL_H - -/* - * include/asm-arm/arch-omap/control.h - * - * OMAP2/3 System Control Module definitions - * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation. - */ - -#include - -#define OMAP242X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP242X_CTRL_BASE + (reg)) -#define OMAP243X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP243X_CTRL_BASE + (reg)) -#define OMAP343X_CTRL_REGADDR(reg) \ - (void __iomem *)IO_ADDRESS(OMAP343X_CTRL_BASE + (reg)) - -/* - * As elsewhere, the "OMAP2_" prefix indicates that the macro is valid for - * OMAP24XX and OMAP34XX. - */ - -/* Control submodule offsets */ - -#define OMAP2_CONTROL_INTERFACE 0x000 -#define OMAP2_CONTROL_PADCONFS 0x030 -#define OMAP2_CONTROL_GENERAL 0x270 -#define OMAP343X_CONTROL_MEM_WKUP 0x600 -#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00 -#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60 - -/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */ - -#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10) - -/* CONTROL_GENERAL register offsets common to OMAP2 & 3 */ -#define OMAP2_CONTROL_DEVCONF0 (OMAP2_CONTROL_GENERAL + 0x0004) -#define OMAP2_CONTROL_MSUSPENDMUX_0 (OMAP2_CONTROL_GENERAL + 0x0020) -#define OMAP2_CONTROL_MSUSPENDMUX_1 (OMAP2_CONTROL_GENERAL + 0x0024) -#define OMAP2_CONTROL_MSUSPENDMUX_2 (OMAP2_CONTROL_GENERAL + 0x0028) -#define OMAP2_CONTROL_MSUSPENDMUX_3 (OMAP2_CONTROL_GENERAL + 0x002c) -#define OMAP2_CONTROL_MSUSPENDMUX_4 (OMAP2_CONTROL_GENERAL + 0x0030) -#define OMAP2_CONTROL_MSUSPENDMUX_5 (OMAP2_CONTROL_GENERAL + 0x0034) -#define OMAP2_CONTROL_SEC_CTRL (OMAP2_CONTROL_GENERAL + 0x0040) -#define OMAP2_CONTROL_RPUB_KEY_H_0 (OMAP2_CONTROL_GENERAL + 0x0090) -#define OMAP2_CONTROL_RPUB_KEY_H_1 (OMAP2_CONTROL_GENERAL + 0x0094) -#define OMAP2_CONTROL_RPUB_KEY_H_2 (OMAP2_CONTROL_GENERAL + 0x0098) -#define OMAP2_CONTROL_RPUB_KEY_H_3 (OMAP2_CONTROL_GENERAL + 0x009c) - -/* 242x-only CONTROL_GENERAL register offsets */ -#define OMAP242X_CONTROL_DEVCONF OMAP2_CONTROL_DEVCONF0 /* match TRM */ -#define OMAP242X_CONTROL_OCM_RAM_PERM (OMAP2_CONTROL_GENERAL + 0x0068) - -/* 243x-only CONTROL_GENERAL register offsets */ -/* CONTROL_IVA2_BOOT{ADDR,MOD} are at the same place on 343x - noted below */ -#define OMAP243X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP243X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x007c) -#define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) -#define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) - -/* 24xx-only CONTROL_GENERAL register offsets */ -#define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP24XX_CONTROL_EMU_SUPPORT (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP24XX_CONTROL_SEC_TEST (OMAP2_CONTROL_GENERAL + 0x0044) -#define OMAP24XX_CONTROL_PSA_CTRL (OMAP2_CONTROL_GENERAL + 0x0048) -#define OMAP24XX_CONTROL_PSA_CMD (OMAP2_CONTROL_GENERAL + 0x004c) -#define OMAP24XX_CONTROL_PSA_VALUE (OMAP2_CONTROL_GENERAL + 0x0050) -#define OMAP24XX_CONTROL_SEC_EMU (OMAP2_CONTROL_GENERAL + 0x0060) -#define OMAP24XX_CONTROL_SEC_TAP (OMAP2_CONTROL_GENERAL + 0x0064) -#define OMAP24XX_CONTROL_OCM_PUB_RAM_ADD (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_START_ADD (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP24XX_CONTROL_EXT_SEC_RAM_STOP_ADD (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP24XX_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP24XX_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP24XX_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0088) -#define OMAP24XX_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x008c) -#define OMAP24XX_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP24XX_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00a4) -#define OMAP24XX_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP24XX_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP24XX_CONTROL_CUST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP24XX_CONTROL_CUST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP24XX_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c0) -#define OMAP24XX_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00c4) -#define OMAP24XX_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP24XX_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP24XX_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP24XX_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP24XX_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP24XX_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP24XX_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP24XX_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00e4) - -/* 34xx-only CONTROL_GENERAL register offsets */ -#define OMAP343X_CONTROL_PADCONF_OFF (OMAP2_CONTROL_GENERAL + 0x0000) -#define OMAP343X_CONTROL_MEM_DFTRW0 (OMAP2_CONTROL_GENERAL + 0x0008) -#define OMAP343X_CONTROL_MEM_DFTRW1 (OMAP2_CONTROL_GENERAL + 0x000c) -#define OMAP343X_CONTROL_DEVCONF1 (OMAP2_CONTROL_GENERAL + 0x0068) -#define OMAP343X_CONTROL_CSIRXFE (OMAP2_CONTROL_GENERAL + 0x006c) -#define OMAP343X_CONTROL_SEC_STATUS (OMAP2_CONTROL_GENERAL + 0x0070) -#define OMAP343X_CONTROL_SEC_ERR_STATUS (OMAP2_CONTROL_GENERAL + 0x0074) -#define OMAP343X_CONTROL_SEC_ERR_STATUS_DEBUG (OMAP2_CONTROL_GENERAL + 0x0078) -#define OMAP343X_CONTROL_STATUS (OMAP2_CONTROL_GENERAL + 0x0080) -#define OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS (OMAP2_CONTROL_GENERAL + 0x0084) -#define OMAP343X_CONTROL_RPUB_KEY_H_4 (OMAP2_CONTROL_GENERAL + 0x00a0) -#define OMAP343X_CONTROL_RAND_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00a8) -#define OMAP343X_CONTROL_RAND_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00ac) -#define OMAP343X_CONTROL_RAND_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00b0) -#define OMAP343X_CONTROL_RAND_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00b4) -#define OMAP343X_CONTROL_TEST_KEY_0 (OMAP2_CONTROL_GENERAL + 0x00c8) -#define OMAP343X_CONTROL_TEST_KEY_1 (OMAP2_CONTROL_GENERAL + 0x00cc) -#define OMAP343X_CONTROL_TEST_KEY_2 (OMAP2_CONTROL_GENERAL + 0x00d0) -#define OMAP343X_CONTROL_TEST_KEY_3 (OMAP2_CONTROL_GENERAL + 0x00d4) -#define OMAP343X_CONTROL_TEST_KEY_4 (OMAP2_CONTROL_GENERAL + 0x00d8) -#define OMAP343X_CONTROL_TEST_KEY_5 (OMAP2_CONTROL_GENERAL + 0x00dc) -#define OMAP343X_CONTROL_TEST_KEY_6 (OMAP2_CONTROL_GENERAL + 0x00e0) -#define OMAP343X_CONTROL_TEST_KEY_7 (OMAP2_CONTROL_GENERAL + 0x00e4) -#define OMAP343X_CONTROL_TEST_KEY_8 (OMAP2_CONTROL_GENERAL + 0x00e8) -#define OMAP343X_CONTROL_TEST_KEY_9 (OMAP2_CONTROL_GENERAL + 0x00ec) -#define OMAP343X_CONTROL_TEST_KEY_10 (OMAP2_CONTROL_GENERAL + 0x00f0) -#define OMAP343X_CONTROL_TEST_KEY_11 (OMAP2_CONTROL_GENERAL + 0x00f4) -#define OMAP343X_CONTROL_TEST_KEY_12 (OMAP2_CONTROL_GENERAL + 0x00f8) -#define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) -#define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) -#define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) - -/* - * REVISIT: This list of registers is not comprehensive - there are more - * that should be added. - */ - -/* - * Control module register bit defines - these should eventually go into - * their own regbits file. Some of these will be complicated, depending - * on the device type (general-purpose, emulator, test, secure, bad, other) - * and the security mode (secure, non-secure, don't care) - */ -/* CONTROL_DEVCONF0 bits */ -#define OMAP24XX_USBSTANDBYCTRL (1 << 15) -#define OMAP2_MCBSP2_CLKS_MASK (1 << 6) -#define OMAP2_MCBSP1_CLKS_MASK (1 << 2) - -/* CONTROL_DEVCONF1 bits */ -#define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ -#define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ -#define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ - -/* CONTROL_STATUS bits */ -#define OMAP2_DEVICETYPE_MASK (0x7 << 8) -#define OMAP2_SYSBOOT_5_MASK (1 << 5) -#define OMAP2_SYSBOOT_4_MASK (1 << 4) -#define OMAP2_SYSBOOT_3_MASK (1 << 3) -#define OMAP2_SYSBOOT_2_MASK (1 << 2) -#define OMAP2_SYSBOOT_1_MASK (1 << 1) -#define OMAP2_SYSBOOT_0_MASK (1 << 0) - -#ifndef __ASSEMBLY__ -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -extern void __iomem *omap_ctrl_base_get(void); -extern u8 omap_ctrl_readb(u16 offset); -extern u16 omap_ctrl_readw(u16 offset); -extern u32 omap_ctrl_readl(u16 offset); -extern void omap_ctrl_writeb(u8 val, u16 offset); -extern void omap_ctrl_writew(u16 val, u16 offset); -extern void omap_ctrl_writel(u32 val, u16 offset); -#else -#define omap_ctrl_base_get() 0 -#define omap_ctrl_readb(x) 0 -#define omap_ctrl_readw(x) 0 -#define omap_ctrl_readl(x) 0 -#define omap_ctrl_writeb(x, y) WARN_ON(1) -#define omap_ctrl_writew(x, y) WARN_ON(1) -#define omap_ctrl_writel(x, y) WARN_ON(1) -#endif -#endif /* __ASSEMBLY__ */ - -#endif /* __ASM_ARCH_CONTROL_H */ - diff --git a/include/asm-arm/arch-omap/cpu.h b/include/asm-arm/arch-omap/cpu.h deleted file mode 100644 index 52db09f..0000000 --- a/include/asm-arm/arch-omap/cpu.h +++ /dev/null @@ -1,402 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/cpu.h - * - * OMAP cpu type detection - * - * Copyright (C) 2004, 2008 Nokia Corporation - * - * Written by Tony Lindgren - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_OMAP_CPU_H -#define __ASM_ARCH_OMAP_CPU_H - -struct omap_chip_id { - u8 oc; -}; - -#define OMAP_CHIP_INIT(x) { .oc = x } - -extern unsigned int system_rev; - -#define omap2_cpu_rev() ((system_rev >> 12) & 0x0f) - -/* - * Test if multicore OMAP support is needed - */ -#undef MULTI_OMAP1 -#undef MULTI_OMAP2 -#undef OMAP_NAME - -#ifdef CONFIG_ARCH_OMAP730 -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap730 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP15XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap1510 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP16XX -# ifdef OMAP_NAME -# undef MULTI_OMAP1 -# define MULTI_OMAP1 -# else -# define OMAP_NAME omap16xx -# endif -#endif -#if (defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)) -# if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) -# error "OMAP1 and OMAP2 can't be selected at the same time" -# endif -#endif -#ifdef CONFIG_ARCH_OMAP2420 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2420 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP2430 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap2430 -# endif -#endif -#ifdef CONFIG_ARCH_OMAP3430 -# ifdef OMAP_NAME -# undef MULTI_OMAP2 -# define MULTI_OMAP2 -# else -# define OMAP_NAME omap3430 -# endif -#endif - -/* - * Macros to group OMAP into cpu classes. - * These can be used in most places. - * cpu_is_omap7xx(): True for OMAP730 - * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 - * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 - * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 - * cpu_is_omap242x(): True for OMAP2420, OMAP2422, OMAP2423 - * cpu_is_omap243x(): True for OMAP2430 - * cpu_is_omap343x(): True for OMAP3430 - */ -#define GET_OMAP_CLASS ((system_rev >> 24) & 0xff) - -#define IS_OMAP_CLASS(class, id) \ -static inline int is_omap ##class (void) \ -{ \ - return (GET_OMAP_CLASS == (id)) ? 1 : 0; \ -} - -#define GET_OMAP_SUBCLASS ((system_rev >> 20) & 0x0fff) - -#define IS_OMAP_SUBCLASS(subclass, id) \ -static inline int is_omap ##subclass (void) \ -{ \ - return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \ -} - -IS_OMAP_CLASS(7xx, 0x07) -IS_OMAP_CLASS(15xx, 0x15) -IS_OMAP_CLASS(16xx, 0x16) -IS_OMAP_CLASS(24xx, 0x24) -IS_OMAP_CLASS(34xx, 0x34) - -IS_OMAP_SUBCLASS(242x, 0x242) -IS_OMAP_SUBCLASS(243x, 0x243) -IS_OMAP_SUBCLASS(343x, 0x343) - -#define cpu_is_omap7xx() 0 -#define cpu_is_omap15xx() 0 -#define cpu_is_omap16xx() 0 -#define cpu_is_omap24xx() 0 -#define cpu_is_omap242x() 0 -#define cpu_is_omap243x() 0 -#define cpu_is_omap34xx() 0 -#define cpu_is_omap343x() 0 - -#if defined(MULTI_OMAP1) -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() is_omap7xx() -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() is_omap15xx() -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() is_omap16xx() -# endif -#else -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap7xx -# define cpu_is_omap7xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap15xx -# define cpu_is_omap15xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap16xx -# define cpu_is_omap16xx() 1 -# endif -#endif - -#if defined(MULTI_OMAP2) -# if defined(CONFIG_ARCH_OMAP24XX) -# undef cpu_is_omap24xx -# undef cpu_is_omap242x -# undef cpu_is_omap243x -# define cpu_is_omap24xx() is_omap24xx() -# define cpu_is_omap242x() is_omap242x() -# define cpu_is_omap243x() is_omap243x() -# endif -# if defined(CONFIG_ARCH_OMAP34XX) -# undef cpu_is_omap34xx -# undef cpu_is_omap343x -# define cpu_is_omap34xx() is_omap34xx() -# define cpu_is_omap343x() is_omap343x() -# endif -#else -# if defined(CONFIG_ARCH_OMAP24XX) -# undef cpu_is_omap24xx -# define cpu_is_omap24xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP2420) -# undef cpu_is_omap242x -# define cpu_is_omap242x() 1 -# endif -# if defined(CONFIG_ARCH_OMAP2430) -# undef cpu_is_omap243x -# define cpu_is_omap243x() 1 -# endif -# if defined(CONFIG_ARCH_OMAP34XX) -# undef cpu_is_omap34xx -# define cpu_is_omap34xx() 1 -# endif -# if defined(CONFIG_ARCH_OMAP3430) -# undef cpu_is_omap343x -# define cpu_is_omap343x() 1 -# endif -#endif - -/* - * Macros to detect individual cpu types. - * These are only rarely needed. - * cpu_is_omap330(): True for OMAP330 - * cpu_is_omap730(): True for OMAP730 - * cpu_is_omap1510(): True for OMAP1510 - * cpu_is_omap1610(): True for OMAP1610 - * cpu_is_omap1611(): True for OMAP1611 - * cpu_is_omap5912(): True for OMAP5912 - * cpu_is_omap1621(): True for OMAP1621 - * cpu_is_omap1710(): True for OMAP1710 - * cpu_is_omap2420(): True for OMAP2420 - * cpu_is_omap2422(): True for OMAP2422 - * cpu_is_omap2423(): True for OMAP2423 - * cpu_is_omap2430(): True for OMAP2430 - * cpu_is_omap3430(): True for OMAP3430 - */ -#define GET_OMAP_TYPE ((system_rev >> 16) & 0xffff) - -#define IS_OMAP_TYPE(type, id) \ -static inline int is_omap ##type (void) \ -{ \ - return (GET_OMAP_TYPE == (id)) ? 1 : 0; \ -} - -IS_OMAP_TYPE(310, 0x0310) -IS_OMAP_TYPE(730, 0x0730) -IS_OMAP_TYPE(1510, 0x1510) -IS_OMAP_TYPE(1610, 0x1610) -IS_OMAP_TYPE(1611, 0x1611) -IS_OMAP_TYPE(5912, 0x1611) -IS_OMAP_TYPE(1621, 0x1621) -IS_OMAP_TYPE(1710, 0x1710) -IS_OMAP_TYPE(2420, 0x2420) -IS_OMAP_TYPE(2422, 0x2422) -IS_OMAP_TYPE(2423, 0x2423) -IS_OMAP_TYPE(2430, 0x2430) -IS_OMAP_TYPE(3430, 0x3430) - -#define cpu_is_omap310() 0 -#define cpu_is_omap730() 0 -#define cpu_is_omap1510() 0 -#define cpu_is_omap1610() 0 -#define cpu_is_omap5912() 0 -#define cpu_is_omap1611() 0 -#define cpu_is_omap1621() 0 -#define cpu_is_omap1710() 0 -#define cpu_is_omap2420() 0 -#define cpu_is_omap2422() 0 -#define cpu_is_omap2423() 0 -#define cpu_is_omap2430() 0 -#define cpu_is_omap3430() 0 - -#if defined(MULTI_OMAP1) -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap730 -# define cpu_is_omap730() is_omap730() -# endif -#else -# if defined(CONFIG_ARCH_OMAP730) -# undef cpu_is_omap730 -# define cpu_is_omap730() 1 -# endif -#endif - -/* - * Whether we have MULTI_OMAP1 or not, we still need to distinguish - * between 330 vs. 1510 and 1611B/5912 vs. 1710. - */ -#if defined(CONFIG_ARCH_OMAP15XX) -# undef cpu_is_omap310 -# undef cpu_is_omap1510 -# define cpu_is_omap310() is_omap310() -# define cpu_is_omap1510() is_omap1510() -#endif - -#if defined(CONFIG_ARCH_OMAP16XX) -# undef cpu_is_omap1610 -# undef cpu_is_omap1611 -# undef cpu_is_omap5912 -# undef cpu_is_omap1621 -# undef cpu_is_omap1710 -# define cpu_is_omap1610() is_omap1610() -# define cpu_is_omap1611() is_omap1611() -# define cpu_is_omap5912() is_omap5912() -# define cpu_is_omap1621() is_omap1621() -# define cpu_is_omap1710() is_omap1710() -#endif - -#if defined(CONFIG_ARCH_OMAP24XX) -# undef cpu_is_omap2420 -# undef cpu_is_omap2422 -# undef cpu_is_omap2423 -# undef cpu_is_omap2430 -# define cpu_is_omap2420() is_omap2420() -# define cpu_is_omap2422() is_omap2422() -# define cpu_is_omap2423() is_omap2423() -# define cpu_is_omap2430() is_omap2430() -#endif - -#if defined(CONFIG_ARCH_OMAP34XX) -# undef cpu_is_omap3430 -# define cpu_is_omap3430() is_omap3430() -#endif - -/* Macros to detect if we have OMAP1 or OMAP2 */ -#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \ - cpu_is_omap16xx()) -#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) - -#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) -/* - * Macros to detect silicon revision of OMAP2/3 processors. - * is_sil_rev_greater_than: true if passed cpu type & its rev is greater. - * is_sil_rev_lesser_than: true if passed cpu type & its rev is lesser. - * is_sil_rev_equal_to: true if passed cpu type & its rev is equal. - * get_sil_rev: return the silicon rev value. - */ -#define get_sil_omap_type(rev) ((rev & 0xffff0000) >> 16) -#define get_sil_revision(rev) ((rev & 0x0000f000) >> 12) - -#define is_sil_rev_greater_than(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) > get_sil_revision(rev))) - -#define is_sil_rev_less_than(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) < get_sil_revision(rev))) - -#define is_sil_rev_equal_to(rev) \ - ((get_sil_omap_type(system_rev) == get_sil_omap_type(rev)) && \ - (get_sil_revision(system_rev) == get_sil_revision(rev))) - -#define get_sil_rev() \ - get_sil_revision(system_rev) - -/* Various silicon macros defined here */ -#define OMAP2420_REV_ES1_0 0x24200000 -#define OMAP2420_REV_ES2_0 0x24201000 -#define OMAP2430_REV_ES1_0 0x24300000 -#define OMAP3430_REV_ES1_0 0x34300000 -#define OMAP3430_REV_ES2_0 0x34301000 -#define OMAP3430_REV_ES2_1 0x34302000 -#define OMAP3430_REV_ES2_2 0x34303000 - -/* - * omap_chip bits - * - * CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is - * valid on all chips of that type. CHIP_IS_OMAP3430ES{1,2} indicates - * something that is only valid on that particular ES revision. - * - * These bits may be ORed together to indicate structures that are - * available on multiple chip types. - * - * To test whether a particular structure matches the current OMAP chip type, - * use omap_chip_is(). - * - */ -#define CHIP_IS_OMAP2420 (1 << 0) -#define CHIP_IS_OMAP2430 (1 << 1) -#define CHIP_IS_OMAP3430 (1 << 2) -#define CHIP_IS_OMAP3430ES1 (1 << 3) -#define CHIP_IS_OMAP3430ES2 (1 << 4) - -#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430) - -int omap_chip_is(struct omap_chip_id oci); - - -/* - * Macro to detect device type i.e. EMU/HS/TST/GP/BAD - */ -#define DEVICE_TYPE_TEST 0 -#define DEVICE_TYPE_EMU 1 -#define DEVICE_TYPE_SEC 2 -#define DEVICE_TYPE_GP 3 -#define DEVICE_TYPE_BAD 4 - -#define get_device_type() ((system_rev & 0x700) >> 8) -#define is_device_type_test() (get_device_type() == DEVICE_TYPE_TEST) -#define is_device_type_emu() (get_device_type() == DEVICE_TYPE_EMU) -#define is_device_type_sec() (get_device_type() == DEVICE_TYPE_SEC) -#define is_device_type_gp() (get_device_type() == DEVICE_TYPE_GP) -#define is_device_type_bad() (get_device_type() == DEVICE_TYPE_BAD) - -void omap2_check_revision(void); - -#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ - -#endif diff --git a/include/asm-arm/arch-omap/debug-macro.S b/include/asm-arm/arch-omap/debug-macro.S deleted file mode 100644 index ca4f577..0000000 --- a/include/asm-arm/arch-omap/debug-macro.S +++ /dev/null @@ -1,58 +0,0 @@ -/* linux/include/asm-arm/arch-omap/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? -#ifdef CONFIG_ARCH_OMAP1 - moveq \rx, #0xff000000 @ physical base address - movne \rx, #0xfe000000 @ virtual base - orr \rx, \rx, #0x00fb0000 -#ifdef CONFIG_OMAP_LL_DEBUG_UART3 - orr \rx, \rx, #0x00009000 @ UART 3 -#endif -#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3) - orr \rx, \rx, #0x00000800 @ UART 2 & 3 -#endif - -#elif CONFIG_ARCH_OMAP2 - moveq \rx, #0x48000000 @ physical base address - movne \rx, #0xd8000000 @ virtual base - orr \rx, \rx, #0x0006a000 -#ifdef CONFIG_OMAP_LL_DEBUG_UART2 - add \rx, \rx, #0x00002000 @ UART 2 -#endif -#ifdef CONFIG_OMAP_LL_DEBUG_UART3 - add \rx, \rx, #0x00004000 @ UART 3 -#endif -#endif - .endm - - .macro senduart,rd,rx - strb \rd, [\rx] - .endm - - .macro busyuart,rd,rx -1001: ldrb \rd, [\rx, #(0x5 << 2)] @ OMAP-1510 and friends - and \rd, \rd, #0x60 - teq \rd, #0x60 - beq 1002f - ldrb \rd, [\rx, #(0x5 << 0)] @ OMAP-730 only - and \rd, \rd, #0x60 - teq \rd, #0x60 - bne 1001b -1002: - .endm - - .macro waituart,rd,rx - .endm diff --git a/include/asm-arm/arch-omap/dma.h b/include/asm-arm/arch-omap/dma.h deleted file mode 100644 index f4dcb95..0000000 --- a/include/asm-arm/arch-omap/dma.h +++ /dev/null @@ -1,570 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/dma.h - * - * Copyright (C) 2003 Nokia Corporation - * Author: Juha Yrjölä - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* Hardware registers for omap1 */ -#define OMAP1_DMA_BASE (0xfffed800) - -#define OMAP1_DMA_GCR 0x400 -#define OMAP1_DMA_GSCR 0x404 -#define OMAP1_DMA_GRST 0x408 -#define OMAP1_DMA_HW_ID 0x442 -#define OMAP1_DMA_PCH2_ID 0x444 -#define OMAP1_DMA_PCH0_ID 0x446 -#define OMAP1_DMA_PCH1_ID 0x448 -#define OMAP1_DMA_PCHG_ID 0x44a -#define OMAP1_DMA_PCHD_ID 0x44c -#define OMAP1_DMA_CAPS_0_U 0x44e -#define OMAP1_DMA_CAPS_0_L 0x450 -#define OMAP1_DMA_CAPS_1_U 0x452 -#define OMAP1_DMA_CAPS_1_L 0x454 -#define OMAP1_DMA_CAPS_2 0x456 -#define OMAP1_DMA_CAPS_3 0x458 -#define OMAP1_DMA_CAPS_4 0x45a -#define OMAP1_DMA_PCH2_SR 0x460 -#define OMAP1_DMA_PCH0_SR 0x480 -#define OMAP1_DMA_PCH1_SR 0x482 -#define OMAP1_DMA_PCHD_SR 0x4c0 - -/* Hardware registers for omap2 and omap3 */ -#define OMAP24XX_DMA4_BASE (L4_24XX_BASE + 0x56000) -#define OMAP34XX_DMA4_BASE (L4_34XX_BASE + 0x56000) - -#define OMAP_DMA4_REVISION 0x00 -#define OMAP_DMA4_GCR 0x78 -#define OMAP_DMA4_IRQSTATUS_L0 0x08 -#define OMAP_DMA4_IRQSTATUS_L1 0x0c -#define OMAP_DMA4_IRQSTATUS_L2 0x10 -#define OMAP_DMA4_IRQSTATUS_L3 0x14 -#define OMAP_DMA4_IRQENABLE_L0 0x18 -#define OMAP_DMA4_IRQENABLE_L1 0x1c -#define OMAP_DMA4_IRQENABLE_L2 0x20 -#define OMAP_DMA4_IRQENABLE_L3 0x24 -#define OMAP_DMA4_SYSSTATUS 0x28 -#define OMAP_DMA4_OCP_SYSCONFIG 0x2c -#define OMAP_DMA4_CAPS_0 0x64 -#define OMAP_DMA4_CAPS_2 0x6c -#define OMAP_DMA4_CAPS_3 0x70 -#define OMAP_DMA4_CAPS_4 0x74 - -#define OMAP1_LOGICAL_DMA_CH_COUNT 17 -#define OMAP_DMA4_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */ - -/* Common channel specific registers for omap1 */ -#define OMAP1_DMA_CH_BASE(n) (0x40 * (n) + 0x00) -#define OMAP1_DMA_CSDP(n) (0x40 * (n) + 0x00) -#define OMAP1_DMA_CCR(n) (0x40 * (n) + 0x02) -#define OMAP1_DMA_CICR(n) (0x40 * (n) + 0x04) -#define OMAP1_DMA_CSR(n) (0x40 * (n) + 0x06) -#define OMAP1_DMA_CEN(n) (0x40 * (n) + 0x10) -#define OMAP1_DMA_CFN(n) (0x40 * (n) + 0x12) -#define OMAP1_DMA_CSFI(n) (0x40 * (n) + 0x14) -#define OMAP1_DMA_CSEI(n) (0x40 * (n) + 0x16) -#define OMAP1_DMA_CPC(n) (0x40 * (n) + 0x18) /* 15xx only */ -#define OMAP1_DMA_CSAC(n) (0x40 * (n) + 0x18) -#define OMAP1_DMA_CDAC(n) (0x40 * (n) + 0x1a) -#define OMAP1_DMA_CDEI(n) (0x40 * (n) + 0x1c) -#define OMAP1_DMA_CDFI(n) (0x40 * (n) + 0x1e) -#define OMAP1_DMA_CLNK_CTRL(n) (0x40 * (n) + 0x28) - -/* Common channel specific registers for omap2 */ -#define OMAP_DMA4_CH_BASE(n) (0x60 * (n) + 0x80) -#define OMAP_DMA4_CCR(n) (0x60 * (n) + 0x80) -#define OMAP_DMA4_CLNK_CTRL(n) (0x60 * (n) + 0x84) -#define OMAP_DMA4_CICR(n) (0x60 * (n) + 0x88) -#define OMAP_DMA4_CSR(n) (0x60 * (n) + 0x8c) -#define OMAP_DMA4_CSDP(n) (0x60 * (n) + 0x90) -#define OMAP_DMA4_CEN(n) (0x60 * (n) + 0x94) -#define OMAP_DMA4_CFN(n) (0x60 * (n) + 0x98) -#define OMAP_DMA4_CSEI(n) (0x60 * (n) + 0xa4) -#define OMAP_DMA4_CSFI(n) (0x60 * (n) + 0xa8) -#define OMAP_DMA4_CDEI(n) (0x60 * (n) + 0xac) -#define OMAP_DMA4_CDFI(n) (0x60 * (n) + 0xb0) -#define OMAP_DMA4_CSAC(n) (0x60 * (n) + 0xb4) -#define OMAP_DMA4_CDAC(n) (0x60 * (n) + 0xb8) - -/* Channel specific registers only on omap1 */ -#define OMAP1_DMA_CSSA_L(n) (0x40 * (n) + 0x08) -#define OMAP1_DMA_CSSA_U(n) (0x40 * (n) + 0x0a) -#define OMAP1_DMA_CDSA_L(n) (0x40 * (n) + 0x0c) -#define OMAP1_DMA_CDSA_U(n) (0x40 * (n) + 0x0e) -#define OMAP1_DMA_COLOR_L(n) (0x40 * (n) + 0x20) -#define OMAP1_DMA_COLOR_U(n) (0x40 * (n) + 0x22) -#define OMAP1_DMA_CCR2(n) (0x40 * (n) + 0x24) -#define OMAP1_DMA_LCH_CTRL(n) (0x40 * (n) + 0x2a) /* not on 15xx */ -#define OMAP1_DMA_CCEN(n) 0 -#define OMAP1_DMA_CCFN(n) 0 - -/* Channel specific registers only on omap2 */ -#define OMAP_DMA4_CSSA(n) (0x60 * (n) + 0x9c) -#define OMAP_DMA4_CDSA(n) (0x60 * (n) + 0xa0) -#define OMAP_DMA4_CCEN(n) (0x60 * (n) + 0xbc) -#define OMAP_DMA4_CCFN(n) (0x60 * (n) + 0xc0) -#define OMAP_DMA4_COLOR(n) (0x60 * (n) + 0xc4) - -/* Dummy defines to keep multi-omap compiles happy */ -#define OMAP1_DMA_REVISION 0 -#define OMAP1_DMA_IRQSTATUS_L0 0 -#define OMAP1_DMA_IRQENABLE_L0 0 -#define OMAP1_DMA_OCP_SYSCONFIG 0 -#define OMAP_DMA4_HW_ID 0 -#define OMAP_DMA4_CAPS_0_L 0 -#define OMAP_DMA4_CAPS_0_U 0 -#define OMAP_DMA4_CAPS_1_L 0 -#define OMAP_DMA4_CAPS_1_U 0 -#define OMAP_DMA4_GSCR 0 -#define OMAP_DMA4_CPC(n) 0 - -#define OMAP_DMA4_LCH_CTRL(n) 0 -#define OMAP_DMA4_COLOR_L(n) 0 -#define OMAP_DMA4_COLOR_U(n) 0 -#define OMAP_DMA4_CCR2(n) 0 -#define OMAP1_DMA_CSSA(n) 0 -#define OMAP1_DMA_CDSA(n) 0 -#define OMAP_DMA4_CSSA_L(n) 0 -#define OMAP_DMA4_CSSA_U(n) 0 -#define OMAP_DMA4_CDSA_L(n) 0 -#define OMAP_DMA4_CDSA_U(n) 0 - -/*----------------------------------------------------------------------------*/ - -/* DMA channels for omap1 */ -#define OMAP_DMA_NO_DEVICE 0 -#define OMAP_DMA_MCSI1_TX 1 -#define OMAP_DMA_MCSI1_RX 2 -#define OMAP_DMA_I2C_RX 3 -#define OMAP_DMA_I2C_TX 4 -#define OMAP_DMA_EXT_NDMA_REQ 5 -#define OMAP_DMA_EXT_NDMA_REQ2 6 -#define OMAP_DMA_UWIRE_TX 7 -#define OMAP_DMA_MCBSP1_TX 8 -#define OMAP_DMA_MCBSP1_RX 9 -#define OMAP_DMA_MCBSP3_TX 10 -#define OMAP_DMA_MCBSP3_RX 11 -#define OMAP_DMA_UART1_TX 12 -#define OMAP_DMA_UART1_RX 13 -#define OMAP_DMA_UART2_TX 14 -#define OMAP_DMA_UART2_RX 15 -#define OMAP_DMA_MCBSP2_TX 16 -#define OMAP_DMA_MCBSP2_RX 17 -#define OMAP_DMA_UART3_TX 18 -#define OMAP_DMA_UART3_RX 19 -#define OMAP_DMA_CAMERA_IF_RX 20 -#define OMAP_DMA_MMC_TX 21 -#define OMAP_DMA_MMC_RX 22 -#define OMAP_DMA_NAND 23 -#define OMAP_DMA_IRQ_LCD_LINE 24 -#define OMAP_DMA_MEMORY_STICK 25 -#define OMAP_DMA_USB_W2FC_RX0 26 -#define OMAP_DMA_USB_W2FC_RX1 27 -#define OMAP_DMA_USB_W2FC_RX2 28 -#define OMAP_DMA_USB_W2FC_TX0 29 -#define OMAP_DMA_USB_W2FC_TX1 30 -#define OMAP_DMA_USB_W2FC_TX2 31 - -/* These are only for 1610 */ -#define OMAP_DMA_CRYPTO_DES_IN 32 -#define OMAP_DMA_SPI_TX 33 -#define OMAP_DMA_SPI_RX 34 -#define OMAP_DMA_CRYPTO_HASH 35 -#define OMAP_DMA_CCP_ATTN 36 -#define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 -#define OMAP_DMA_CMT_APE_TX_CHAN_0 38 -#define OMAP_DMA_CMT_APE_RV_CHAN_0 39 -#define OMAP_DMA_CMT_APE_TX_CHAN_1 40 -#define OMAP_DMA_CMT_APE_RV_CHAN_1 41 -#define OMAP_DMA_CMT_APE_TX_CHAN_2 42 -#define OMAP_DMA_CMT_APE_RV_CHAN_2 43 -#define OMAP_DMA_CMT_APE_TX_CHAN_3 44 -#define OMAP_DMA_CMT_APE_RV_CHAN_3 45 -#define OMAP_DMA_CMT_APE_TX_CHAN_4 46 -#define OMAP_DMA_CMT_APE_RV_CHAN_4 47 -#define OMAP_DMA_CMT_APE_TX_CHAN_5 48 -#define OMAP_DMA_CMT_APE_RV_CHAN_5 49 -#define OMAP_DMA_CMT_APE_TX_CHAN_6 50 -#define OMAP_DMA_CMT_APE_RV_CHAN_6 51 -#define OMAP_DMA_CMT_APE_TX_CHAN_7 52 -#define OMAP_DMA_CMT_APE_RV_CHAN_7 53 -#define OMAP_DMA_MMC2_TX 54 -#define OMAP_DMA_MMC2_RX 55 -#define OMAP_DMA_CRYPTO_DES_OUT 56 - -/* DMA channels for 24xx */ -#define OMAP24XX_DMA_NO_DEVICE 0 -#define OMAP24XX_DMA_XTI_DMA 1 /* S_DMA_0 */ -#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */ -#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */ -#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */ -#define OMAP24XX_DMA_GFX 5 /* S_DMA_4 */ -#define OMAP24XX_DMA_DSS 6 /* S_DMA_5 */ -#define OMAP242X_DMA_VLYNQ_TX 7 /* S_DMA_6 */ -#define OMAP24XX_DMA_EXT_DMAREQ2 7 /* S_DMA_6 */ -#define OMAP24XX_DMA_CWT 8 /* S_DMA_7 */ -#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */ -#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */ -#define OMAP24XX_DMA_DES_TX 11 /* S_DMA_10 */ -#define OMAP24XX_DMA_DES_RX 12 /* S_DMA_11 */ -#define OMAP24XX_DMA_SHA1MD5_RX 13 /* S_DMA_12 */ -#define OMAP34XX_DMA_SHA2MD5_RX 13 /* S_DMA_12 */ -#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */ -#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */ -#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */ -#define OMAP242X_DMA_EAC_AC_RD 17 /* S_DMA_16 */ -#define OMAP242X_DMA_EAC_AC_WR 18 /* S_DMA_17 */ -#define OMAP242X_DMA_EAC_MD_UL_RD 19 /* S_DMA_18 */ -#define OMAP242X_DMA_EAC_MD_UL_WR 20 /* S_DMA_19 */ -#define OMAP242X_DMA_EAC_MD_DL_RD 21 /* S_DMA_20 */ -#define OMAP242X_DMA_EAC_MD_DL_WR 22 /* S_DMA_21 */ -#define OMAP242X_DMA_EAC_BT_UL_RD 23 /* S_DMA_22 */ -#define OMAP242X_DMA_EAC_BT_UL_WR 24 /* S_DMA_23 */ -#define OMAP242X_DMA_EAC_BT_DL_RD 25 /* S_DMA_24 */ -#define OMAP242X_DMA_EAC_BT_DL_WR 26 /* S_DMA_25 */ -#define OMAP243X_DMA_EXT_DMAREQ3 14 /* S_DMA_13 */ -#define OMAP24XX_DMA_SPI3_TX0 15 /* S_DMA_14 */ -#define OMAP24XX_DMA_SPI3_RX0 16 /* S_DMA_15 */ -#define OMAP24XX_DMA_MCBSP3_TX 17 /* S_DMA_16 */ -#define OMAP24XX_DMA_MCBSP3_RX 18 /* S_DMA_17 */ -#define OMAP24XX_DMA_MCBSP4_TX 19 /* S_DMA_18 */ -#define OMAP24XX_DMA_MCBSP4_RX 20 /* S_DMA_19 */ -#define OMAP24XX_DMA_MCBSP5_TX 21 /* S_DMA_20 */ -#define OMAP24XX_DMA_MCBSP5_RX 22 /* S_DMA_21 */ -#define OMAP24XX_DMA_SPI3_TX1 23 /* S_DMA_22 */ -#define OMAP24XX_DMA_SPI3_RX1 24 /* S_DMA_23 */ -#define OMAP243X_DMA_EXT_DMAREQ4 25 /* S_DMA_24 */ -#define OMAP243X_DMA_EXT_DMAREQ5 26 /* S_DMA_25 */ -#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */ -#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */ -#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */ -#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */ -#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */ -#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */ -#define OMAP24XX_DMA_MCBSP1_TX 31 /* S_DMA_30 */ -#define OMAP24XX_DMA_MCBSP1_RX 32 /* S_DMA_31 */ -#define OMAP24XX_DMA_MCBSP2_TX 33 /* S_DMA_32 */ -#define OMAP24XX_DMA_MCBSP2_RX 34 /* S_DMA_33 */ -#define OMAP24XX_DMA_SPI1_TX0 35 /* S_DMA_34 */ -#define OMAP24XX_DMA_SPI1_RX0 36 /* S_DMA_35 */ -#define OMAP24XX_DMA_SPI1_TX1 37 /* S_DMA_36 */ -#define OMAP24XX_DMA_SPI1_RX1 38 /* S_DMA_37 */ -#define OMAP24XX_DMA_SPI1_TX2 39 /* S_DMA_38 */ -#define OMAP24XX_DMA_SPI1_RX2 40 /* S_DMA_39 */ -#define OMAP24XX_DMA_SPI1_TX3 41 /* S_DMA_40 */ -#define OMAP24XX_DMA_SPI1_RX3 42 /* S_DMA_41 */ -#define OMAP24XX_DMA_SPI2_TX0 43 /* S_DMA_42 */ -#define OMAP24XX_DMA_SPI2_RX0 44 /* S_DMA_43 */ -#define OMAP24XX_DMA_SPI2_TX1 45 /* S_DMA_44 */ -#define OMAP24XX_DMA_SPI2_RX1 46 /* S_DMA_45 */ -#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */ -#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */ -#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */ -#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */ -#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */ -#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */ -#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */ -#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */ -#define OMAP24XX_DMA_USB_W2FC_TX0 55 /* S_DMA_54 */ -#define OMAP24XX_DMA_USB_W2FC_RX0 56 /* S_DMA_55 */ -#define OMAP24XX_DMA_USB_W2FC_TX1 57 /* S_DMA_56 */ -#define OMAP24XX_DMA_USB_W2FC_RX1 58 /* S_DMA_57 */ -#define OMAP24XX_DMA_USB_W2FC_TX2 59 /* S_DMA_58 */ -#define OMAP24XX_DMA_USB_W2FC_RX2 60 /* S_DMA_59 */ -#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */ -#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */ -#define OMAP24XX_DMA_MS 63 /* S_DMA_62 */ -#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */ -#define OMAP243X_DMA_EXT_DMAREQ6 64 /* S_DMA_63 */ -#define OMAP34XX_DMA_EXT_DMAREQ3 64 /* S_DMA_63 */ -#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */ -#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */ -#define OMAP34XX_DMA_DES2_TX 67 /* S_DMA_66 */ -#define OMAP34XX_DMA_DES2_RX 68 /* S_DMA_67 */ -#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */ -#define OMAP34XX_DMA_SPI4_TX0 70 /* S_DMA_69 */ -#define OMAP34XX_DMA_SPI4_RX0 71 /* S_DMA_70 */ -#define OMAP34XX_DSS_DMA0 72 /* S_DMA_71 */ -#define OMAP34XX_DSS_DMA1 73 /* S_DMA_72 */ -#define OMAP34XX_DSS_DMA2 74 /* S_DMA_73 */ -#define OMAP34XX_DSS_DMA3 75 /* S_DMA_74 */ -#define OMAP34XX_DMA_MMC3_TX 77 /* S_DMA_76 */ -#define OMAP34XX_DMA_MMC3_RX 78 /* S_DMA_77 */ -#define OMAP34XX_DMA_USIM_TX 79 /* S_DMA_78 */ -#define OMAP34XX_DMA_USIM_RX 80 /* S_DMA_79 */ - -/*----------------------------------------------------------------------------*/ - -/* Hardware registers for LCD DMA */ -#define OMAP1510_DMA_LCD_BASE (0xfffedb00) -#define OMAP1510_DMA_LCD_CTRL (OMAP1510_DMA_LCD_BASE + 0x00) -#define OMAP1510_DMA_LCD_TOP_F1_L (OMAP1510_DMA_LCD_BASE + 0x02) -#define OMAP1510_DMA_LCD_TOP_F1_U (OMAP1510_DMA_LCD_BASE + 0x04) -#define OMAP1510_DMA_LCD_BOT_F1_L (OMAP1510_DMA_LCD_BASE + 0x06) -#define OMAP1510_DMA_LCD_BOT_F1_U (OMAP1510_DMA_LCD_BASE + 0x08) - -#define OMAP1610_DMA_LCD_BASE (0xfffee300) -#define OMAP1610_DMA_LCD_CSDP (OMAP1610_DMA_LCD_BASE + 0xc0) -#define OMAP1610_DMA_LCD_CCR (OMAP1610_DMA_LCD_BASE + 0xc2) -#define OMAP1610_DMA_LCD_CTRL (OMAP1610_DMA_LCD_BASE + 0xc4) -#define OMAP1610_DMA_LCD_TOP_B1_L (OMAP1610_DMA_LCD_BASE + 0xc8) -#define OMAP1610_DMA_LCD_TOP_B1_U (OMAP1610_DMA_LCD_BASE + 0xca) -#define OMAP1610_DMA_LCD_BOT_B1_L (OMAP1610_DMA_LCD_BASE + 0xcc) -#define OMAP1610_DMA_LCD_BOT_B1_U (OMAP1610_DMA_LCD_BASE + 0xce) -#define OMAP1610_DMA_LCD_TOP_B2_L (OMAP1610_DMA_LCD_BASE + 0xd0) -#define OMAP1610_DMA_LCD_TOP_B2_U (OMAP1610_DMA_LCD_BASE + 0xd2) -#define OMAP1610_DMA_LCD_BOT_B2_L (OMAP1610_DMA_LCD_BASE + 0xd4) -#define OMAP1610_DMA_LCD_BOT_B2_U (OMAP1610_DMA_LCD_BASE + 0xd6) -#define OMAP1610_DMA_LCD_SRC_EI_B1 (OMAP1610_DMA_LCD_BASE + 0xd8) -#define OMAP1610_DMA_LCD_SRC_FI_B1_L (OMAP1610_DMA_LCD_BASE + 0xda) -#define OMAP1610_DMA_LCD_SRC_EN_B1 (OMAP1610_DMA_LCD_BASE + 0xe0) -#define OMAP1610_DMA_LCD_SRC_FN_B1 (OMAP1610_DMA_LCD_BASE + 0xe4) -#define OMAP1610_DMA_LCD_LCH_CTRL (OMAP1610_DMA_LCD_BASE + 0xea) -#define OMAP1610_DMA_LCD_SRC_FI_B1_U (OMAP1610_DMA_LCD_BASE + 0xf4) - -#define OMAP1_DMA_TOUT_IRQ (1 << 0) -#define OMAP_DMA_DROP_IRQ (1 << 1) -#define OMAP_DMA_HALF_IRQ (1 << 2) -#define OMAP_DMA_FRAME_IRQ (1 << 3) -#define OMAP_DMA_LAST_IRQ (1 << 4) -#define OMAP_DMA_BLOCK_IRQ (1 << 5) -#define OMAP1_DMA_SYNC_IRQ (1 << 6) -#define OMAP2_DMA_PKT_IRQ (1 << 7) -#define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8) -#define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9) -#define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10) -#define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) - -#define OMAP_DMA_DATA_TYPE_S8 0x00 -#define OMAP_DMA_DATA_TYPE_S16 0x01 -#define OMAP_DMA_DATA_TYPE_S32 0x02 - -#define OMAP_DMA_SYNC_ELEMENT 0x00 -#define OMAP_DMA_SYNC_FRAME 0x01 -#define OMAP_DMA_SYNC_BLOCK 0x02 -#define OMAP_DMA_SYNC_PACKET 0x03 - -#define OMAP_DMA_SRC_SYNC 0x01 -#define OMAP_DMA_DST_SYNC 0x00 - -#define OMAP_DMA_PORT_EMIFF 0x00 -#define OMAP_DMA_PORT_EMIFS 0x01 -#define OMAP_DMA_PORT_OCP_T1 0x02 -#define OMAP_DMA_PORT_TIPB 0x03 -#define OMAP_DMA_PORT_OCP_T2 0x04 -#define OMAP_DMA_PORT_MPUI 0x05 - -#define OMAP_DMA_AMODE_CONSTANT 0x00 -#define OMAP_DMA_AMODE_POST_INC 0x01 -#define OMAP_DMA_AMODE_SINGLE_IDX 0x02 -#define OMAP_DMA_AMODE_DOUBLE_IDX 0x03 - -#define DMA_DEFAULT_FIFO_DEPTH 0x10 -#define DMA_DEFAULT_ARB_RATE 0x01 -/* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */ -#define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */ -#define DMA_THREAD_RESERVE_ONET (0x01 << 12) -#define DMA_THREAD_RESERVE_TWOT (0x02 << 12) -#define DMA_THREAD_RESERVE_THREET (0x03 << 12) -#define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */ -#define DMA_THREAD_FIFO_75 (0x01 << 14) -#define DMA_THREAD_FIFO_25 (0x02 << 14) -#define DMA_THREAD_FIFO_50 (0x03 << 14) - -/* Chaining modes*/ -#ifndef CONFIG_ARCH_OMAP1 -#define OMAP_DMA_STATIC_CHAIN 0x1 -#define OMAP_DMA_DYNAMIC_CHAIN 0x2 -#define OMAP_DMA_CHAIN_ACTIVE 0x1 -#define OMAP_DMA_CHAIN_INACTIVE 0x0 -#endif - -#define DMA_CH_PRIO_HIGH 0x1 -#define DMA_CH_PRIO_LOW 0x0 /* Def */ - -/* LCD DMA block numbers */ -enum { - OMAP_LCD_DMA_B1_TOP, - OMAP_LCD_DMA_B1_BOTTOM, - OMAP_LCD_DMA_B2_TOP, - OMAP_LCD_DMA_B2_BOTTOM -}; - -enum omap_dma_burst_mode { - OMAP_DMA_DATA_BURST_DIS = 0, - OMAP_DMA_DATA_BURST_4, - OMAP_DMA_DATA_BURST_8, - OMAP_DMA_DATA_BURST_16, -}; - -enum end_type { - OMAP_DMA_LITTLE_ENDIAN = 0, - OMAP_DMA_BIG_ENDIAN -}; - -enum omap_dma_color_mode { - OMAP_DMA_COLOR_DIS = 0, - OMAP_DMA_CONSTANT_FILL, - OMAP_DMA_TRANSPARENT_COPY -}; - -enum omap_dma_write_mode { - OMAP_DMA_WRITE_NON_POSTED = 0, - OMAP_DMA_WRITE_POSTED, - OMAP_DMA_WRITE_LAST_NON_POSTED -}; - -enum omap_dma_channel_mode { - OMAP_DMA_LCH_2D = 0, - OMAP_DMA_LCH_G, - OMAP_DMA_LCH_P, - OMAP_DMA_LCH_PD -}; - -struct omap_dma_channel_params { - int data_type; /* data type 8,16,32 */ - int elem_count; /* number of elements in a frame */ - int frame_count; /* number of frames in a element */ - - int src_port; /* Only on OMAP1 REVISIT: Is this needed? */ - int src_amode; /* constant, post increment, indexed, - double indexed */ - unsigned long src_start; /* source address : physical */ - int src_ei; /* source element index */ - int src_fi; /* source frame index */ - - int dst_port; /* Only on OMAP1 REVISIT: Is this needed? */ - int dst_amode; /* constant, post increment, indexed, - double indexed */ - unsigned long dst_start; /* source address : physical */ - int dst_ei; /* source element index */ - int dst_fi; /* source frame index */ - - int trigger; /* trigger attached if the channel is - synchronized */ - int sync_mode; /* sycn on element, frame , block or packet */ - int src_or_dst_synch; /* source synch(1) or destination synch(0) */ - - int ie; /* interrupt enabled */ - - unsigned char read_prio;/* read priority */ - unsigned char write_prio;/* write priority */ - -#ifndef CONFIG_ARCH_OMAP1 - enum omap_dma_burst_mode burst_mode; /* Burst mode 4/8/16 words */ -#endif -}; - - -extern void omap_set_dma_priority(int lch, int dst_port, int priority); -extern int omap_request_dma(int dev_id, const char *dev_name, - void (*callback)(int lch, u16 ch_status, void *data), - void *data, int *dma_ch); -extern void omap_enable_dma_irq(int ch, u16 irq_bits); -extern void omap_disable_dma_irq(int ch, u16 irq_bits); -extern void omap_free_dma(int ch); -extern void omap_start_dma(int lch); -extern void omap_stop_dma(int lch); -extern void omap_set_dma_transfer_params(int lch, int data_type, - int elem_count, int frame_count, - int sync_mode, - int dma_trigger, int src_or_dst_synch); -extern void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, - u32 color); -extern void omap_set_dma_write_mode(int lch, enum omap_dma_write_mode mode); -extern void omap_set_dma_channel_mode(int lch, enum omap_dma_channel_mode mode); - -extern void omap_set_dma_src_params(int lch, int src_port, int src_amode, - unsigned long src_start, - int src_ei, int src_fi); -extern void omap_set_dma_src_index(int lch, int eidx, int fidx); -extern void omap_set_dma_src_data_pack(int lch, int enable); -extern void omap_set_dma_src_burst_mode(int lch, - enum omap_dma_burst_mode burst_mode); - -extern void omap_set_dma_dest_params(int lch, int dest_port, int dest_amode, - unsigned long dest_start, - int dst_ei, int dst_fi); -extern void omap_set_dma_dest_index(int lch, int eidx, int fidx); -extern void omap_set_dma_dest_data_pack(int lch, int enable); -extern void omap_set_dma_dest_burst_mode(int lch, - enum omap_dma_burst_mode burst_mode); - -extern void omap_set_dma_params(int lch, - struct omap_dma_channel_params *params); - -extern void omap_dma_link_lch(int lch_head, int lch_queue); -extern void omap_dma_unlink_lch(int lch_head, int lch_queue); - -extern int omap_set_dma_callback(int lch, - void (*callback)(int lch, u16 ch_status, void *data), - void *data); -extern dma_addr_t omap_get_dma_src_pos(int lch); -extern dma_addr_t omap_get_dma_dst_pos(int lch); -extern void omap_clear_dma(int lch); -extern int omap_get_dma_active_status(int lch); -extern int omap_dma_running(void); -extern void omap_dma_set_global_params(int arb_rate, int max_fifo_depth, - int tparams); -extern int omap_dma_set_prio_lch(int lch, unsigned char read_prio, - unsigned char write_prio); -extern void omap_set_dma_dst_endian_type(int lch, enum end_type etype); -extern void omap_set_dma_src_endian_type(int lch, enum end_type etype); -extern int omap_get_dma_index(int lch, int *ei, int *fi); - -/* Chaining APIs */ -#ifndef CONFIG_ARCH_OMAP1 -extern int omap_request_dma_chain(int dev_id, const char *dev_name, - void (*callback) (int chain_id, u16 ch_status, - void *data), - int *chain_id, int no_of_chans, - int chain_mode, - struct omap_dma_channel_params params); -extern int omap_free_dma_chain(int chain_id); -extern int omap_dma_chain_a_transfer(int chain_id, int src_start, - int dest_start, int elem_count, - int frame_count, void *callbk_data); -extern int omap_start_dma_chain_transfers(int chain_id); -extern int omap_stop_dma_chain_transfers(int chain_id); -extern int omap_get_dma_chain_index(int chain_id, int *ei, int *fi); -extern int omap_get_dma_chain_dst_pos(int chain_id); -extern int omap_get_dma_chain_src_pos(int chain_id); - -extern int omap_modify_dma_chain_params(int chain_id, - struct omap_dma_channel_params params); -extern int omap_dma_chain_status(int chain_id); -#endif - -/* LCD DMA functions */ -extern int omap_request_lcd_dma(void (*callback)(u16 status, void *data), - void *data); -extern void omap_free_lcd_dma(void); -extern void omap_setup_lcd_dma(void); -extern void omap_enable_lcd_dma(void); -extern void omap_stop_lcd_dma(void); -extern void omap_set_lcd_dma_ext_controller(int external); -extern void omap_set_lcd_dma_single_transfer(int single); -extern void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres, - int data_type); -extern void omap_set_lcd_dma_b1_rotation(int rotate); -extern void omap_set_lcd_dma_b1_vxres(unsigned long vxres); -extern void omap_set_lcd_dma_b1_mirror(int mirror); -extern void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale); - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-omap/dmtimer.h b/include/asm-arm/arch-omap/dmtimer.h deleted file mode 100644 index 02b29e8..0000000 --- a/include/asm-arm/arch-omap/dmtimer.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/dmtimer.h - * - * OMAP Dual-Mode Timers - * - * Copyright (C) 2005 Nokia Corporation - * Author: Lauri Leukkunen - * PWM and clock framwork support by Timo Teras. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_DMTIMER_H -#define __ASM_ARCH_DMTIMER_H - -/* clock sources */ -#define OMAP_TIMER_SRC_SYS_CLK 0x00 -#define OMAP_TIMER_SRC_32_KHZ 0x01 -#define OMAP_TIMER_SRC_EXT_CLK 0x02 - -/* timer interrupt enable bits */ -#define OMAP_TIMER_INT_CAPTURE (1 << 2) -#define OMAP_TIMER_INT_OVERFLOW (1 << 1) -#define OMAP_TIMER_INT_MATCH (1 << 0) - -/* trigger types */ -#define OMAP_TIMER_TRIGGER_NONE 0x00 -#define OMAP_TIMER_TRIGGER_OVERFLOW 0x01 -#define OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE 0x02 - -struct omap_dm_timer; -struct clk; - -int omap_dm_timer_init(void); - -struct omap_dm_timer *omap_dm_timer_request(void); -struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); -void omap_dm_timer_free(struct omap_dm_timer *timer); -void omap_dm_timer_enable(struct omap_dm_timer *timer); -void omap_dm_timer_disable(struct omap_dm_timer *timer); - -int omap_dm_timer_get_irq(struct omap_dm_timer *timer); - -u32 omap_dm_timer_modify_idlect_mask(u32 inputmask); -struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer); - -void omap_dm_timer_trigger(struct omap_dm_timer *timer); -void omap_dm_timer_start(struct omap_dm_timer *timer); -void omap_dm_timer_stop(struct omap_dm_timer *timer); - -void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); -void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); -void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); -void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); -void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger); -void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler); - -void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value); - -unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer); -void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value); -unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer); -void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value); - -int omap_dm_timers_active(void); - - -#endif /* __ASM_ARCH_DMTIMER_H */ diff --git a/include/asm-arm/arch-omap/dsp_common.h b/include/asm-arm/arch-omap/dsp_common.h deleted file mode 100644 index da97736..0000000 --- a/include/asm-arm/arch-omap/dsp_common.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of OMAP DSP driver (DSP Gateway version 3.3.1) - * - * Copyright (C) 2004-2006 Nokia Corporation. All rights reserved. - * - * Contact: Toshihiro Kobayashi - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#ifndef ASM_ARCH_DSP_COMMON_H -#define ASM_ARCH_DSP_COMMON_H - -#if defined(CONFIG_ARCH_OMAP1) && defined(CONFIG_OMAP_MMU_FWK) -extern void omap_dsp_request_mpui(void); -extern void omap_dsp_release_mpui(void); -extern int omap_dsp_request_mem(void); -extern int omap_dsp_release_mem(void); -#else -static inline int omap_dsp_request_mem(void) -{ - return 0; -} -#define omap_dsp_release_mem() do {} while (0) -#endif - -#endif /* ASM_ARCH_DSP_COMMON_H */ diff --git a/include/asm-arm/arch-omap/eac.h b/include/asm-arm/arch-omap/eac.h deleted file mode 100644 index ccee3b0..0000000 --- a/include/asm-arm/arch-omap/eac.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap2/eac.h - * - * Defines for Enhanced Audio Controller - * - * Contact: Jarkko Nikula - * - * Copyright (C) 2006 Nokia Corporation - * Copyright (C) 2004 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#ifndef __ASM_ARM_ARCH_OMAP2_EAC_H -#define __ASM_ARM_ARCH_OMAP2_EAC_H - -#include -#include -#include - -#include - -/* master codec clock source */ -#define EAC_MCLK_EXT_MASK 0x100 -enum eac_mclk_src { - EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */ - EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK, - EAC_MCLK_EXT_12288000, - EAC_MCLK_EXT_2x11289600, - EAC_MCLK_EXT_2x12288000, -}; - -/* codec port interface mode */ -enum eac_codec_mode { - EAC_CODEC_PCM, - EAC_CODEC_AC97, - EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */ - EAC_CODEC_I2S_SLAVE, -}; - -/* configuration structure for I2S mode */ -struct eac_i2s_conf { - /* if enabled, then first data slot (left channel) is signaled as - * positive level of frame sync EAC.AC_FS */ - unsigned polarity_changed_mode:1; - /* if enabled, then serial data starts one clock cycle after the - * of EAC.AC_FS for first audio slot */ - unsigned sync_delay_enable:1; -}; - -/* configuration structure for EAC codec port */ -struct eac_codec { - enum eac_mclk_src mclk_src; - - enum eac_codec_mode codec_mode; - union { - struct eac_i2s_conf i2s; - } codec_conf; - - int default_rate; /* audio sampling rate */ - - int (* set_power)(void *private_data, int dac, int adc); - int (* register_controls)(void *private_data, - struct snd_card *card); - const char *short_name; - - void *private_data; -}; - -/* structure for passing platform dependent data to the EAC driver */ -struct eac_platform_data { - int (* init)(struct device *eac_dev); - void (* cleanup)(struct device *eac_dev); - /* these callbacks are used to configure & control external MCLK - * source. NULL if not used */ - int (* enable_ext_clocks)(struct device *eac_dev); - void (* disable_ext_clocks)(struct device *eac_dev); -}; - -extern void omap_init_eac(struct eac_platform_data *pdata); - -extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec); -extern void eac_unregister_codec(struct device *eac_dev); - -extern int eac_set_mode(struct device *eac_dev, int play, int rec); - -#endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */ diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S deleted file mode 100644 index 67ed783..0000000 --- a/include/asm-arm/arch-omap/entry-macro.S +++ /dev/null @@ -1,89 +0,0 @@ -/* - * include/asm-arm/arch-omap/entry-macro.S - * - * Low-level IRQ helper macros for OMAP-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include -#include - -#if defined(CONFIG_ARCH_OMAP1) - -#if defined(CONFIG_ARCH_OMAP730) && \ - (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) -#error "FIXME: OMAP730 doesn't support multiple-OMAP" -#elif defined(CONFIG_ARCH_OMAP730) -#define INT_IH2_IRQ INT_730_IH2_IRQ -#elif defined(CONFIG_ARCH_OMAP15XX) -#define INT_IH2_IRQ INT_1510_IH2_IRQ -#elif defined(CONFIG_ARCH_OMAP16XX) -#define INT_IH2_IRQ INT_1610_IH2_IRQ -#else -#warning "IH2 IRQ defaulted" -#define INT_IH2_IRQ INT_1510_IH2_IRQ -#endif - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IO_ADDRESS(OMAP_IH1_BASE) - ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] - ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] - mov \irqstat, #0xffffffff - bic \tmp, \irqstat, \tmp - tst \irqnr, \tmp - beq 1510f - - ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] - cmp \irqnr, #0 - ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] - cmpeq \irqnr, #INT_IH2_IRQ - ldreq \base, =IO_ADDRESS(OMAP_IH2_BASE) - ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] - addeqs \irqnr, \irqnr, #32 -1510: - .endm - -#elif defined(CONFIG_ARCH_OMAP24XX) - -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =OMAP2_VA_IC_BASE - ldr \irqnr, [\base, #0x98] /* IRQ pending reg 1 */ - cmp \irqnr, #0x0 - bne 2222f - ldr \irqnr, [\base, #0xb8] /* IRQ pending reg 2 */ - cmp \irqnr, #0x0 - bne 2222f - ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ - cmp \irqnr, #0x0 -2222: - ldrne \irqnr, [\base, #IRQ_SIR_IRQ] - - .endm - - .macro irq_prio_table - .endm - -#endif diff --git a/include/asm-arm/arch-omap/fpga.h b/include/asm-arm/arch-omap/fpga.h deleted file mode 100644 index f420881..0000000 --- a/include/asm-arm/arch-omap/fpga.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/fpga.h - * - * Interrupt handler for OMAP-1510 FPGA - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: Greg Lonnon - * - * Copyright (C) 2002 MontaVista Software, Inc. - * - * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6 - * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_OMAP_FPGA_H -#define __ASM_ARCH_OMAP_FPGA_H - -#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX) -extern void omap1510_fpga_init_irq(void); -#else -#define omap1510_fpga_init_irq() (0) -#endif - -#define fpga_read(reg) __raw_readb(reg) -#define fpga_write(val, reg) __raw_writeb(val, reg) - -/* - * --------------------------------------------------------------------------- - * H2/P2 Debug board FPGA - * --------------------------------------------------------------------------- - */ -/* maps in the FPGA registers and the ETHR registers */ -#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ -#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ -#define H2P2_DBG_FPGA_START 0x04000000 /* PA */ - -#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) -#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ -#define H2P2_DBG_FPGA_BOARD_REV (H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ -#define H2P2_DBG_FPGA_GPIO (H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ -#define H2P2_DBG_FPGA_LEDS (H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ -#define H2P2_DBG_FPGA_MISC_INPUTS (H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ -#define H2P2_DBG_FPGA_LAN_STATUS (H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ -#define H2P2_DBG_FPGA_LAN_RESET (H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ - -/* NOTE: most boards don't have a static mapping for the FPGA ... */ -struct h2p2_dbg_fpga { - /* offset 0x00 */ - u16 smc91x[8]; - /* offset 0x10 */ - u16 fpga_rev; - u16 board_rev; - u16 gpio_outputs; - u16 leds; - /* offset 0x18 */ - u16 misc_inputs; - u16 lan_status; - u16 lan_reset; - u16 reserved0; - /* offset 0x20 */ - u16 ps2_data; - u16 ps2_ctrl; - /* plus also 4 rs232 ports ... */ -}; - -/* LEDs definition on debug board (16 LEDs, all physically green) */ -#define H2P2_DBG_FPGA_LED_GREEN (1 << 15) -#define H2P2_DBG_FPGA_LED_AMBER (1 << 14) -#define H2P2_DBG_FPGA_LED_RED (1 << 13) -#define H2P2_DBG_FPGA_LED_BLUE (1 << 12) -/* cpu0 load-meter LEDs */ -#define H2P2_DBG_FPGA_LOAD_METER (1 << 0) // A bit of fun on our board ... -#define H2P2_DBG_FPGA_LOAD_METER_SIZE 11 -#define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) - -#define H2P2_DBG_FPGA_P2_LED_TIMER (1 << 0) -#define H2P2_DBG_FPGA_P2_LED_IDLE (1 << 1) - -/* - * --------------------------------------------------------------------------- - * OMAP-1510 FPGA - * --------------------------------------------------------------------------- - */ -#define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ -#define OMAP1510_FPGA_SIZE SZ_4K -#define OMAP1510_FPGA_START 0x08000000 /* Physical */ - -/* Revision */ -#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) -#define OMAP1510_FPGA_REV_HIGH (OMAP1510_FPGA_BASE + 0x1) - -#define OMAP1510_FPGA_LCD_PANEL_CONTROL (OMAP1510_FPGA_BASE + 0x2) -#define OMAP1510_FPGA_LED_DIGIT (OMAP1510_FPGA_BASE + 0x3) -#define INNOVATOR_FPGA_HID_SPI (OMAP1510_FPGA_BASE + 0x4) -#define OMAP1510_FPGA_POWER (OMAP1510_FPGA_BASE + 0x5) - -/* Interrupt status */ -#define OMAP1510_FPGA_ISR_LO (OMAP1510_FPGA_BASE + 0x6) -#define OMAP1510_FPGA_ISR_HI (OMAP1510_FPGA_BASE + 0x7) - -/* Interrupt mask */ -#define OMAP1510_FPGA_IMR_LO (OMAP1510_FPGA_BASE + 0x8) -#define OMAP1510_FPGA_IMR_HI (OMAP1510_FPGA_BASE + 0x9) - -/* Reset registers */ -#define OMAP1510_FPGA_HOST_RESET (OMAP1510_FPGA_BASE + 0xa) -#define OMAP1510_FPGA_RST (OMAP1510_FPGA_BASE + 0xb) - -#define OMAP1510_FPGA_AUDIO (OMAP1510_FPGA_BASE + 0xc) -#define OMAP1510_FPGA_DIP (OMAP1510_FPGA_BASE + 0xe) -#define OMAP1510_FPGA_FPGA_IO (OMAP1510_FPGA_BASE + 0xf) -#define OMAP1510_FPGA_UART1 (OMAP1510_FPGA_BASE + 0x14) -#define OMAP1510_FPGA_UART2 (OMAP1510_FPGA_BASE + 0x15) -#define OMAP1510_FPGA_OMAP1510_STATUS (OMAP1510_FPGA_BASE + 0x16) -#define OMAP1510_FPGA_BOARD_REV (OMAP1510_FPGA_BASE + 0x18) -#define OMAP1510P1_PPT_DATA (OMAP1510_FPGA_BASE + 0x100) -#define OMAP1510P1_PPT_STATUS (OMAP1510_FPGA_BASE + 0x101) -#define OMAP1510P1_PPT_CONTROL (OMAP1510_FPGA_BASE + 0x102) - -#define OMAP1510_FPGA_TOUCHSCREEN (OMAP1510_FPGA_BASE + 0x204) - -#define INNOVATOR_FPGA_INFO (OMAP1510_FPGA_BASE + 0x205) -#define INNOVATOR_FPGA_LCD_BRIGHT_LO (OMAP1510_FPGA_BASE + 0x206) -#define INNOVATOR_FPGA_LCD_BRIGHT_HI (OMAP1510_FPGA_BASE + 0x207) -#define INNOVATOR_FPGA_LED_GRN_LO (OMAP1510_FPGA_BASE + 0x208) -#define INNOVATOR_FPGA_LED_GRN_HI (OMAP1510_FPGA_BASE + 0x209) -#define INNOVATOR_FPGA_LED_RED_LO (OMAP1510_FPGA_BASE + 0x20a) -#define INNOVATOR_FPGA_LED_RED_HI (OMAP1510_FPGA_BASE + 0x20b) -#define INNOVATOR_FPGA_CAM_USB_CONTROL (OMAP1510_FPGA_BASE + 0x20c) -#define INNOVATOR_FPGA_EXP_CONTROL (OMAP1510_FPGA_BASE + 0x20d) -#define INNOVATOR_FPGA_ISR2 (OMAP1510_FPGA_BASE + 0x20e) -#define INNOVATOR_FPGA_IMR2 (OMAP1510_FPGA_BASE + 0x210) - -#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) - -/* - * Power up Giga UART driver, turn on HID clock. - * Turn off BT power, since we're not using it and it - * draws power. - */ -#define OMAP1510_FPGA_RESET_VALUE 0x42 - -#define OMAP1510_FPGA_PCR_IF_PD0 (1 << 7) -#define OMAP1510_FPGA_PCR_COM2_EN (1 << 6) -#define OMAP1510_FPGA_PCR_COM1_EN (1 << 5) -#define OMAP1510_FPGA_PCR_EXP_PD0 (1 << 4) -#define OMAP1510_FPGA_PCR_EXP_PD1 (1 << 3) -#define OMAP1510_FPGA_PCR_48MHZ_CLK (1 << 2) -#define OMAP1510_FPGA_PCR_4MHZ_CLK (1 << 1) -#define OMAP1510_FPGA_PCR_RSRVD_BIT0 (1 << 0) - -/* - * Innovator/OMAP1510 FPGA HID register bit definitions - */ -#define OMAP1510_FPGA_HID_SCLK (1<<0) /* output */ -#define OMAP1510_FPGA_HID_MOSI (1<<1) /* output */ -#define OMAP1510_FPGA_HID_nSS (1<<2) /* output 0/1 chip idle/select */ -#define OMAP1510_FPGA_HID_nHSUS (1<<3) /* output 0/1 host active/suspended */ -#define OMAP1510_FPGA_HID_MISO (1<<4) /* input */ -#define OMAP1510_FPGA_HID_ATN (1<<5) /* input 0/1 chip idle/ATN */ -#define OMAP1510_FPGA_HID_rsrvd (1<<6) -#define OMAP1510_FPGA_HID_RESETn (1<<7) /* output - 0/1 USAR reset/run */ - -/* The FPGA IRQ is cascaded through GPIO_13 */ -#define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) - -/* IRQ Numbers for interrupts muxed through the FPGA */ -#define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) -#define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) -#define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) -#define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) -#define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) -#define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) -#define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) -#define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) -#define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) -#define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) -#define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) -#define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) -#define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) -#define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) -#define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) -#define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) -#define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) -#define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) -#define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) -#define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) -#define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) -#define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) -#define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) -#define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) - -#endif diff --git a/include/asm-arm/arch-omap/gpio-switch.h b/include/asm-arm/arch-omap/gpio-switch.h deleted file mode 100644 index 10da0e0..0000000 --- a/include/asm-arm/arch-omap/gpio-switch.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * GPIO switch definitions - * - * Copyright (C) 2006 Nokia Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_OMAP_GPIO_SWITCH_H -#define __ASM_ARCH_OMAP_GPIO_SWITCH_H - -#include - -/* Cover: - * high -> closed - * low -> open - * Connection: - * high -> connected - * low -> disconnected - * Activity: - * high -> active - * low -> inactive - * - */ -#define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 -#define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 -#define OMAP_GPIO_SWITCH_TYPE_ACTIVITY 0x0002 -#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 -#define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 - -struct omap_gpio_switch { - const char *name; - s16 gpio; - unsigned flags:4; - unsigned type:4; - - /* Time in ms to debounce when transitioning from - * inactive state to active state. */ - u16 debounce_rising; - /* Same for transition from active to inactive state. */ - u16 debounce_falling; - - /* notify board-specific code about state changes */ - void (* notify)(void *data, int state); - void *notify_data; -}; - -/* Call at init time only */ -extern void omap_register_gpio_switches(const struct omap_gpio_switch *tbl, - int count); - -#endif diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h deleted file mode 100644 index 5ee6a49..0000000 --- a/include/asm-arm/arch-omap/gpio.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/gpio.h - * - * OMAP GPIO handling defines and functions - * - * Copyright (C) 2003-2005 Nokia Corporation - * - * Written by Juha Yrjölä - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_OMAP_GPIO_H -#define __ASM_ARCH_OMAP_GPIO_H - -#include -#include - -#define OMAP_MPUIO_BASE (void __iomem *)0xfffb5000 - -#ifdef CONFIG_ARCH_OMAP730 -#define OMAP_MPUIO_INPUT_LATCH 0x00 -#define OMAP_MPUIO_OUTPUT 0x02 -#define OMAP_MPUIO_IO_CNTL 0x04 -#define OMAP_MPUIO_KBR_LATCH 0x08 -#define OMAP_MPUIO_KBC 0x0a -#define OMAP_MPUIO_GPIO_EVENT_MODE 0x0c -#define OMAP_MPUIO_GPIO_INT_EDGE 0x0e -#define OMAP_MPUIO_KBD_INT 0x10 -#define OMAP_MPUIO_GPIO_INT 0x12 -#define OMAP_MPUIO_KBD_MASKIT 0x14 -#define OMAP_MPUIO_GPIO_MASKIT 0x16 -#define OMAP_MPUIO_GPIO_DEBOUNCING 0x18 -#define OMAP_MPUIO_LATCH 0x1a -#else -#define OMAP_MPUIO_INPUT_LATCH 0x00 -#define OMAP_MPUIO_OUTPUT 0x04 -#define OMAP_MPUIO_IO_CNTL 0x08 -#define OMAP_MPUIO_KBR_LATCH 0x10 -#define OMAP_MPUIO_KBC 0x14 -#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18 -#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c -#define OMAP_MPUIO_KBD_INT 0x20 -#define OMAP_MPUIO_GPIO_INT 0x24 -#define OMAP_MPUIO_KBD_MASKIT 0x28 -#define OMAP_MPUIO_GPIO_MASKIT 0x2c -#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 -#define OMAP_MPUIO_LATCH 0x34 -#endif - -#define OMAP34XX_NR_GPIOS 6 - -#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) -#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) - -#define OMAP_GPIO_IRQ(nr) (OMAP_GPIO_IS_MPUIO(nr) ? \ - IH_MPUIO_BASE + ((nr) & 0x0f) : \ - IH_GPIO_BASE + (nr)) - -extern int omap_gpio_init(void); /* Call from board init only */ -extern int omap_request_gpio(int gpio); -extern void omap_free_gpio(int gpio); -extern void omap_set_gpio_direction(int gpio, int is_input); -extern void omap_set_gpio_dataout(int gpio, int enable); -extern int omap_get_gpio_datain(int gpio); -extern void omap_set_gpio_debounce(int gpio, int enable); -extern void omap_set_gpio_debounce_time(int gpio, int enable); - -/*-------------------------------------------------------------------------*/ - -/* Wrappers for "new style" GPIO calls, using the new infrastructure - * which lets us plug in FPGA, I2C, and other implementations. - * * - * The original OMAP-specfic calls should eventually be removed. - */ - -#include -#include - -static inline int gpio_get_value(unsigned gpio) -{ - return __gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - __gpio_set_value(gpio, value); -} - -static inline int gpio_cansleep(unsigned gpio) -{ - return __gpio_cansleep(gpio); -} - -static inline int gpio_to_irq(unsigned gpio) -{ - if (gpio < (OMAP_MAX_GPIO_LINES + 16)) - return OMAP_GPIO_IRQ(gpio); - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - if (cpu_class_is_omap1() && (irq < (IH_MPUIO_BASE + 16))) - return (irq - IH_MPUIO_BASE) + OMAP_MAX_GPIO_LINES; - return irq - IH_GPIO_BASE; -} - -#endif diff --git a/include/asm-arm/arch-omap/gpioexpander.h b/include/asm-arm/arch-omap/gpioexpander.h deleted file mode 100644 index 4eed1f8..0000000 --- a/include/asm-arm/arch-omap/gpioexpander.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/gpioexpander.h - * - * - * Copyright (C) 2004 Texas Instruments, Inc. - * - * This package is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED - * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. - */ - -#ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H -#define __ASM_ARCH_OMAP_GPIOEXPANDER_H - -/* Function Prototypes for GPIO Expander functions */ - -#ifdef CONFIG_GPIOEXPANDER_OMAP -int read_gpio_expa(u8 *, int); -int write_gpio_expa(u8 , int); -#else -static inline int read_gpio_expa(u8 *val, int addr) -{ - return 0; -} -static inline int write_gpio_expa(u8 val, int addr) -{ - return 0; -} -#endif - -#endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */ diff --git a/include/asm-arm/arch-omap/gpmc.h b/include/asm-arm/arch-omap/gpmc.h deleted file mode 100644 index 6a8e07f..0000000 --- a/include/asm-arm/arch-omap/gpmc.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * General-Purpose Memory Controller for OMAP2 - * - * Copyright (C) 2005-2006 Nokia Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP2_GPMC_H -#define __OMAP2_GPMC_H - -#define GPMC_CS_CONFIG1 0x00 -#define GPMC_CS_CONFIG2 0x04 -#define GPMC_CS_CONFIG3 0x08 -#define GPMC_CS_CONFIG4 0x0c -#define GPMC_CS_CONFIG5 0x10 -#define GPMC_CS_CONFIG6 0x14 -#define GPMC_CS_CONFIG7 0x18 -#define GPMC_CS_NAND_COMMAND 0x1c -#define GPMC_CS_NAND_ADDRESS 0x20 -#define GPMC_CS_NAND_DATA 0x24 - -#define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) -#define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) -#define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) -#define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) -#define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) -#define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) -#define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) -#define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) -#define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23) -#define GPMC_CONFIG1_WAIT_READ_MON (1 << 22) -#define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21) -#define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18) -#define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16) -#define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12) -#define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) -#define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) -#define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) -#define GPMC_CONFIG1_DEVICETYPE_NAND GPMC_CONFIG1_DEVICETYPE(1) -#define GPMC_CONFIG1_MUXADDDATA (1 << 9) -#define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) -#define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) -#define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) -#define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) -#define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) - -/* - * Note that all values in this struct are in nanoseconds, while - * the register values are in gpmc_fck cycles. - */ -struct gpmc_timings { - /* Minimum clock period for synchronous mode */ - u16 sync_clk; - - /* Chip-select signal timings corresponding to GPMC_CS_CONFIG2 */ - u16 cs_on; /* Assertion time */ - u16 cs_rd_off; /* Read deassertion time */ - u16 cs_wr_off; /* Write deassertion time */ - - /* ADV signal timings corresponding to GPMC_CONFIG3 */ - u16 adv_on; /* Assertion time */ - u16 adv_rd_off; /* Read deassertion time */ - u16 adv_wr_off; /* Write deassertion time */ - - /* WE signals timings corresponding to GPMC_CONFIG4 */ - u16 we_on; /* WE assertion time */ - u16 we_off; /* WE deassertion time */ - - /* OE signals timings corresponding to GPMC_CONFIG4 */ - u16 oe_on; /* OE assertion time */ - u16 oe_off; /* OE deassertion time */ - - /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */ - u16 page_burst_access; /* Multiple access word delay */ - u16 access; /* Start-cycle to first data valid delay */ - u16 rd_cycle; /* Total read cycle time */ - u16 wr_cycle; /* Total write cycle time */ -}; - -extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns); -extern unsigned int gpmc_round_ns_to_ticks(unsigned int time_ns); -extern unsigned long gpmc_get_fclk_period(void); - -extern void gpmc_cs_write_reg(int cs, int idx, u32 val); -extern u32 gpmc_cs_read_reg(int cs, int idx); -extern int gpmc_cs_calc_divider(int cs, unsigned int sync_clk); -extern int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t); -extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); -extern void gpmc_cs_free(int cs); -extern int gpmc_cs_set_reserved(int cs, int reserved); -extern int gpmc_cs_reserved(int cs); - -#endif diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h deleted file mode 100644 index 45fdfcc..0000000 --- a/include/asm-arm/arch-omap/hardware.h +++ /dev/null @@ -1,355 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/hardware.h - * - * Hardware definitions for TI OMAP processors and boards - * - * NOTE: Please put device driver specific defines into a separate header - * file for each driver. - * - * Copyright (C) 2001 RidgeRun, Inc. - * Author: RidgeRun, Inc. Greg Lonnon - * - * Reorganized for Linux-2.6 by Tony Lindgren - * and Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_HARDWARE_H -#define __ASM_ARCH_OMAP_HARDWARE_H - -#include -#ifndef __ASSEMBLER__ -#include -#include -#endif -#include - -/* - * --------------------------------------------------------------------------- - * Common definitions for all OMAP processors - * NOTE: Put all processor or board specific parts to the special header - * files. - * --------------------------------------------------------------------------- - */ - -/* - * ---------------------------------------------------------------------------- - * Timers - * ---------------------------------------------------------------------------- - */ -#define OMAP_MPU_TIMER1_BASE (0xfffec500) -#define OMAP_MPU_TIMER2_BASE (0xfffec600) -#define OMAP_MPU_TIMER3_BASE (0xfffec700) -#define MPU_TIMER_FREE (1 << 6) -#define MPU_TIMER_CLOCK_ENABLE (1 << 5) -#define MPU_TIMER_AR (1 << 1) -#define MPU_TIMER_ST (1 << 0) - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_BASE (0xfffece00) -#define ARM_CKCTL (CLKGEN_REG_BASE + 0x0) -#define ARM_IDLECT1 (CLKGEN_REG_BASE + 0x4) -#define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) -#define ARM_EWUPCT (CLKGEN_REG_BASE + 0xC) -#define ARM_RSTCT1 (CLKGEN_REG_BASE + 0x10) -#define ARM_RSTCT2 (CLKGEN_REG_BASE + 0x14) -#define ARM_SYSST (CLKGEN_REG_BASE + 0x18) -#define ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -#define CK_RATEF 1 -#define CK_IDLEF 2 -#define CK_ENABLEF 4 -#define CK_SELECTF 8 -#define SETARM_IDLE_SHIFT - -/* DPLL control registers */ -#define DPLL_CTL (0xfffecf00) - -/* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ -#define DSP_CONFIG_REG_BASE (0xe1008000) -#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) -#define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) -#define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) -#define DSP_RSTCT2 (DSP_CONFIG_REG_BASE + 0x14) - -/* - * --------------------------------------------------------------------------- - * UPLD - * --------------------------------------------------------------------------- - */ -#define ULPD_REG_BASE (0xfffe0800) -#define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) -#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) -#define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) -# define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ -# define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ -#define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) -# define SOFT_UDC_REQ (1 << 4) -# define SOFT_USB_CLK_REQ (1 << 3) -# define SOFT_DPLL_REQ (1 << 0) -#define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) -#define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) -#define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) -#define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) -#define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68) -# define DIS_MMC2_DPLL_REQ (1 << 11) -# define DIS_MMC1_DPLL_REQ (1 << 10) -# define DIS_UART3_DPLL_REQ (1 << 9) -# define DIS_UART2_DPLL_REQ (1 << 8) -# define DIS_UART1_DPLL_REQ (1 << 7) -# define DIS_USB_HOST_DPLL_REQ (1 << 6) -#define ULPD_SDW_CLK_DIV_CTRL_SEL (ULPD_REG_BASE + 0x74) -#define ULPD_CAM_CLK_CTRL (ULPD_REG_BASE + 0x7c) - -/* - * --------------------------------------------------------------------------- - * Watchdog timer - * --------------------------------------------------------------------------- - */ - -/* Watchdog timer within the OMAP3.2 gigacell */ -#define OMAP_MPU_WATCHDOG_BASE (0xfffec800) -#define OMAP_WDT_TIMER (OMAP_MPU_WATCHDOG_BASE + 0x0) -#define OMAP_WDT_LOAD_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) -#define OMAP_WDT_READ_TIM (OMAP_MPU_WATCHDOG_BASE + 0x4) -#define OMAP_WDT_TIMER_MODE (OMAP_MPU_WATCHDOG_BASE + 0x8) - -/* - * --------------------------------------------------------------------------- - * Interrupts - * --------------------------------------------------------------------------- - */ -#ifdef CONFIG_ARCH_OMAP1 - -/* - * XXX: These probably want to be moved to arch/arm/mach-omap/omap1/irq.c - * or something similar.. -- PFM. - */ - -#define OMAP_IH1_BASE 0xfffecb00 -#define OMAP_IH2_BASE 0xfffe0000 - -#define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00) -#define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04) -#define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10) -#define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14) -#define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18) -#define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c) -#define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c) - -#define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00) -#define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04) -#define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10) -#define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14) -#define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18) -#define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c) -#define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c) - -#define IRQ_ITR_REG_OFFSET 0x00 -#define IRQ_MIR_REG_OFFSET 0x04 -#define IRQ_SIR_IRQ_REG_OFFSET 0x10 -#define IRQ_SIR_FIQ_REG_OFFSET 0x14 -#define IRQ_CONTROL_REG_OFFSET 0x18 -#define IRQ_ISR_REG_OFFSET 0x9c -#define IRQ_ILR0_REG_OFFSET 0x1c -#define IRQ_GMR_REG_OFFSET 0xa0 - -#endif - -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define MOD_CONF_CTRL_0 0xfffe1080 -#define MOD_CONF_CTRL_1 0xfffe1110 - -/* - * ---------------------------------------------------------------------------- - * Pin multiplexing registers - * ---------------------------------------------------------------------------- - */ -#define FUNC_MUX_CTRL_0 0xfffe1000 -#define FUNC_MUX_CTRL_1 0xfffe1004 -#define FUNC_MUX_CTRL_2 0xfffe1008 -#define COMP_MODE_CTRL_0 0xfffe100c -#define FUNC_MUX_CTRL_3 0xfffe1010 -#define FUNC_MUX_CTRL_4 0xfffe1014 -#define FUNC_MUX_CTRL_5 0xfffe1018 -#define FUNC_MUX_CTRL_6 0xfffe101C -#define FUNC_MUX_CTRL_7 0xfffe1020 -#define FUNC_MUX_CTRL_8 0xfffe1024 -#define FUNC_MUX_CTRL_9 0xfffe1028 -#define FUNC_MUX_CTRL_A 0xfffe102C -#define FUNC_MUX_CTRL_B 0xfffe1030 -#define FUNC_MUX_CTRL_C 0xfffe1034 -#define FUNC_MUX_CTRL_D 0xfffe1038 -#define PULL_DWN_CTRL_0 0xfffe1040 -#define PULL_DWN_CTRL_1 0xfffe1044 -#define PULL_DWN_CTRL_2 0xfffe1048 -#define PULL_DWN_CTRL_3 0xfffe104c -#define PULL_DWN_CTRL_4 0xfffe10ac - -/* OMAP-1610 specific multiplexing registers */ -#define FUNC_MUX_CTRL_E 0xfffe1090 -#define FUNC_MUX_CTRL_F 0xfffe1094 -#define FUNC_MUX_CTRL_10 0xfffe1098 -#define FUNC_MUX_CTRL_11 0xfffe109c -#define FUNC_MUX_CTRL_12 0xfffe10a0 -#define PU_PD_SEL_0 0xfffe10b4 -#define PU_PD_SEL_1 0xfffe10b8 -#define PU_PD_SEL_2 0xfffe10bc -#define PU_PD_SEL_3 0xfffe10c0 -#define PU_PD_SEL_4 0xfffe10c4 - -/* Timer32K for 1610 and 1710*/ -#define OMAP_TIMER32K_BASE 0xFFFBC400 - -/* - * --------------------------------------------------------------------------- - * TIPB bus interface - * --------------------------------------------------------------------------- - */ -#define TIPB_PUBLIC_CNTL_BASE 0xfffed300 -#define MPU_PUBLIC_TIPB_CNTL (TIPB_PUBLIC_CNTL_BASE + 0x8) -#define TIPB_PRIVATE_CNTL_BASE 0xfffeca00 -#define MPU_PRIVATE_TIPB_CNTL (TIPB_PRIVATE_CNTL_BASE + 0x8) - -/* - * ---------------------------------------------------------------------------- - * MPUI interface - * ---------------------------------------------------------------------------- - */ -#define MPUI_BASE (0xfffec900) -#define MPUI_CTRL (MPUI_BASE + 0x0) -#define MPUI_DEBUG_ADDR (MPUI_BASE + 0x4) -#define MPUI_DEBUG_DATA (MPUI_BASE + 0x8) -#define MPUI_DEBUG_FLAG (MPUI_BASE + 0xc) -#define MPUI_STATUS_REG (MPUI_BASE + 0x10) -#define MPUI_DSP_STATUS (MPUI_BASE + 0x14) -#define MPUI_DSP_BOOT_CONFIG (MPUI_BASE + 0x18) -#define MPUI_DSP_API_CONFIG (MPUI_BASE + 0x1c) - -/* - * ---------------------------------------------------------------------------- - * LED Pulse Generator - * ---------------------------------------------------------------------------- - */ -#define OMAP_LPG1_BASE 0xfffbd000 -#define OMAP_LPG2_BASE 0xfffbd800 -#define OMAP_LPG1_LCR (OMAP_LPG1_BASE + 0x00) -#define OMAP_LPG1_PMR (OMAP_LPG1_BASE + 0x04) -#define OMAP_LPG2_LCR (OMAP_LPG2_BASE + 0x00) -#define OMAP_LPG2_PMR (OMAP_LPG2_BASE + 0x04) - -/* - * ---------------------------------------------------------------------------- - * Pulse-Width Light - * ---------------------------------------------------------------------------- - */ -#define OMAP_PWL_BASE 0xfffb5800 -#define OMAP_PWL_ENABLE (OMAP_PWL_BASE + 0x00) -#define OMAP_PWL_CLK_ENABLE (OMAP_PWL_BASE + 0x04) - -/* - * --------------------------------------------------------------------------- - * Processor specific defines - * --------------------------------------------------------------------------- - */ - -#include "omap730.h" -#include "omap1510.h" -#include "omap24xx.h" -#include "omap16xx.h" -#include "omap34xx.h" - -#ifndef __ASSEMBLER__ - -/* - * --------------------------------------------------------------------------- - * Board specific defines - * --------------------------------------------------------------------------- - */ - -#ifdef CONFIG_MACH_OMAP_INNOVATOR -#include "board-innovator.h" -#endif - -#ifdef CONFIG_MACH_OMAP_H2 -#include "board-h2.h" -#endif - -#ifdef CONFIG_MACH_OMAP_PERSEUS2 -#include "board-perseus2.h" -#endif - -#ifdef CONFIG_MACH_OMAP_FSAMPLE -#include "board-fsample.h" -#endif - -#ifdef CONFIG_MACH_OMAP_H3 -#include "board-h3.h" -#endif - -#ifdef CONFIG_MACH_OMAP_H4 -#include "board-h4.h" -#endif - -#ifdef CONFIG_MACH_OMAP_2430SDP -#include "board-2430sdp.h" -#endif - -#ifdef CONFIG_MACH_OMAP_APOLLON -#include "board-apollon.h" -#endif - -#ifdef CONFIG_MACH_OMAP_OSK -#include "board-osk.h" -#endif - -#ifdef CONFIG_MACH_VOICEBLUE -#include "board-voiceblue.h" -#endif - -#ifdef CONFIG_MACH_OMAP_PALMTE -#include "board-palmte.h" -#endif - -#ifdef CONFIG_MACH_OMAP_PALMZ71 -#include "board-palmz71.h" -#endif - -#ifdef CONFIG_MACH_OMAP_PALMTT -#include "board-palmtt.h" -#endif - -#ifdef CONFIG_MACH_SX1 -#include "board-sx1.h" -#endif - -#endif /* !__ASSEMBLER__ */ - -#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ diff --git a/include/asm-arm/arch-omap/hwa742.h b/include/asm-arm/arch-omap/hwa742.h deleted file mode 100644 index 577f492..0000000 --- a/include/asm-arm/arch-omap/hwa742.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef _HWA742_H -#define _HWA742_H - -struct hwa742_platform_data { - void (*power_up)(struct device *dev); - void (*power_down)(struct device *dev); - unsigned long (*get_clock_rate)(struct device *dev); - - unsigned te_connected:1; -}; - -#endif diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h deleted file mode 100644 index 449e356..0000000 --- a/include/asm-arm/arch-omap/io.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/io.h - * - * IO definitions for TI OMAP processors and boards - * - * Copied from linux/include/asm-arm/arch-sa1100/io.h - * Copyright (C) 1997-1999 Russell King - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) -#define __mem_pci(a) (a) - -/* - * ---------------------------------------------------------------------------- - * I/O mapping - * ---------------------------------------------------------------------------- - */ - -#define PCIO_BASE 0 - -#if defined(CONFIG_ARCH_OMAP1) - -#define IO_PHYS 0xFFFB0000 -#define IO_OFFSET 0x01000000 /* Virtual IO = 0xfefb0000 */ -#define IO_SIZE 0x40000 -#define IO_VIRT (IO_PHYS - IO_OFFSET) -#define IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define OMAP1_IO_ADDRESS(pa) ((pa) - IO_OFFSET) -#define io_p2v(pa) ((pa) - IO_OFFSET) -#define io_v2p(va) ((va) + IO_OFFSET) - -#elif defined(CONFIG_ARCH_OMAP2) - -/* We map both L3 and L4 on OMAP2 */ -#define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 */ -#define L3_24XX_VIRT 0xf8000000 -#define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ -#define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 */ -#define L4_24XX_VIRT 0xd8000000 -#define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */ - -#ifdef CONFIG_ARCH_OMAP2430 -#define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 */ -#define L4_WK_243X_VIRT 0xd9000000 -#define L4_WK_243X_SIZE SZ_1M -#define OMAP243X_GPMC_PHYS OMAP243X_GPMC_BASE /* 0x49000000 */ -#define OMAP243X_GPMC_VIRT 0xFE000000 -#define OMAP243X_GPMC_SIZE SZ_1M -#define OMAP243X_SDRC_PHYS OMAP243X_SDRC_BASE -#define OMAP243X_SDRC_VIRT 0xFD000000 -#define OMAP243X_SDRC_SIZE SZ_1M -#define OMAP243X_SMS_PHYS OMAP243X_SMS_BASE -#define OMAP243X_SMS_VIRT 0xFC000000 -#define OMAP243X_SMS_SIZE SZ_1M - -#endif - -#define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET) /* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET) /* Works for L3 and L4 */ - -/* DSP */ -#define DSP_MEM_24XX_PHYS OMAP2420_DSP_MEM_BASE /* 0x58000000 */ -#define DSP_MEM_24XX_VIRT 0xe0000000 -#define DSP_MEM_24XX_SIZE 0x28000 -#define DSP_IPI_24XX_PHYS OMAP2420_DSP_IPI_BASE /* 0x59000000 */ -#define DSP_IPI_24XX_VIRT 0xe1000000 -#define DSP_IPI_24XX_SIZE SZ_4K -#define DSP_MMU_24XX_PHYS OMAP2420_DSP_MMU_BASE /* 0x5a000000 */ -#define DSP_MMU_24XX_VIRT 0xe2000000 -#define DSP_MMU_24XX_SIZE SZ_4K - -#elif defined(CONFIG_ARCH_OMAP3) - -/* We map both L3 and L4 on OMAP3 */ -#define L3_34XX_PHYS L3_34XX_BASE /* 0x68000000 */ -#define L3_34XX_VIRT 0xf8000000 -#define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */ - -#define L4_34XX_PHYS L4_34XX_BASE /* 0x48000000 */ -#define L4_34XX_VIRT 0xd8000000 -#define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */ - -/* - * Need to look at the Size 4M for L4. - * VPOM3430 was not working for Int controller - */ - -#define L4_WK_34XX_PHYS L4_WK_34XX_BASE /* 0x48300000 */ -#define L4_WK_34XX_VIRT 0xd8300000 -#define L4_WK_34XX_SIZE SZ_1M - -#define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 */ -#define L4_PER_34XX_VIRT 0xd9000000 -#define L4_PER_34XX_SIZE SZ_1M - -#define L4_EMU_34XX_PHYS L4_EMU_34XX_BASE /* 0x54000000 */ -#define L4_EMU_34XX_VIRT 0xe4000000 -#define L4_EMU_34XX_SIZE SZ_64M - -#define OMAP34XX_GPMC_PHYS OMAP34XX_GPMC_BASE /* 0x6E000000 */ -#define OMAP34XX_GPMC_VIRT 0xFE000000 -#define OMAP34XX_GPMC_SIZE SZ_1M - -#define OMAP343X_SMS_PHYS OMAP343X_SMS_BASE /* 0x6C000000 */ -#define OMAP343X_SMS_VIRT 0xFC000000 -#define OMAP343X_SMS_SIZE SZ_1M - -#define OMAP343X_SDRC_PHYS OMAP343X_SDRC_BASE /* 0x6D000000 */ -#define OMAP343X_SDRC_VIRT 0xFD000000 -#define OMAP343X_SDRC_SIZE SZ_1M - - -#define IO_OFFSET 0x90000000 -#define IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define OMAP2_IO_ADDRESS(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_p2v(pa) ((pa) + IO_OFFSET)/* Works for L3 and L4 */ -#define io_v2p(va) ((va) - IO_OFFSET)/* Works for L3 and L4 */ - -/* DSP */ -#define DSP_MEM_34XX_PHYS OMAP34XX_DSP_MEM_BASE /* 0x58000000 */ -#define DSP_MEM_34XX_VIRT 0xe0000000 -#define DSP_MEM_34XX_SIZE 0x28000 -#define DSP_IPI_34XX_PHYS OMAP34XX_DSP_IPI_BASE /* 0x59000000 */ -#define DSP_IPI_34XX_VIRT 0xe1000000 -#define DSP_IPI_34XX_SIZE SZ_4K -#define DSP_MMU_34XX_PHYS OMAP34XX_DSP_MMU_BASE /* 0x5a000000 */ -#define DSP_MMU_34XX_VIRT 0xe2000000 -#define DSP_MMU_34XX_SIZE SZ_4K - -#endif - -#ifndef __ASSEMBLER__ - -/* - * Functions to access the OMAP IO region - * - * NOTE: - Use omap_read/write[bwl] for physical register addresses - * - Use __raw_read/write[bwl]() for virtual register addresses - * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses - * - DO NOT use hardcoded virtual addresses to allow changing the - * IO address space again if needed - */ -#define omap_readb(a) (*(volatile unsigned char *)IO_ADDRESS(a)) -#define omap_readw(a) (*(volatile unsigned short *)IO_ADDRESS(a)) -#define omap_readl(a) (*(volatile unsigned int *)IO_ADDRESS(a)) - -#define omap_writeb(v,a) (*(volatile unsigned char *)IO_ADDRESS(a) = (v)) -#define omap_writew(v,a) (*(volatile unsigned short *)IO_ADDRESS(a) = (v)) -#define omap_writel(v,a) (*(volatile unsigned int *)IO_ADDRESS(a) = (v)) - -extern void omap1_map_common_io(void); -extern void omap1_init_common_hw(void); - -extern void omap2_map_common_io(void); -extern void omap2_init_common_hw(void); - -#endif - -#endif diff --git a/include/asm-arm/arch-omap/irda.h b/include/asm-arm/arch-omap/irda.h deleted file mode 100644 index 96bb12f..0000000 --- a/include/asm-arm/arch-omap/irda.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/irda.h - * - * Copyright (C) 2005-2006 Komal Shah - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_ARCH_IRDA_H -#define ASMARM_ARCH_IRDA_H - -/* board specific transceiver capabilities */ - -#define IR_SEL 1 /* Selects IrDA */ -#define IR_SIRMODE 2 -#define IR_FIRMODE 4 -#define IR_MIRMODE 8 - -struct omap_irda_config { - int transceiver_cap; - int (*transceiver_mode)(struct device *dev, int mode); - int (*select_irda)(struct device *dev, int state); - /* Very specific to the needs of some platforms (h3,h4) - * having calls which can sleep in irda_set_speed. - */ - struct delayed_work gpio_expa; - int rx_channel; - int tx_channel; - unsigned long dest_start; - unsigned long src_start; - int tx_trigger; - int rx_trigger; - int mode; -}; - -#endif diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h deleted file mode 100644 index afbf1e8..0000000 --- a/include/asm-arm/arch-omap/irqs.h +++ /dev/null @@ -1,332 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/irqs.h - * - * Copyright (C) Greg Lonnon 2001 - * Updated for OMAP-1610 by Tony Lindgren - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * NOTE: The interrupt vectors for the OMAP-1509, OMAP-1510, and OMAP-1610 - * are different. - */ - -#ifndef __ASM_ARCH_OMAP15XX_IRQS_H -#define __ASM_ARCH_OMAP15XX_IRQS_H - -/* - * IRQ numbers for interrupt handler 1 - * - * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below - * - */ -#define INT_CAMERA 1 -#define INT_FIQ 3 -#define INT_RTDX 6 -#define INT_DSP_MMU_ABORT 7 -#define INT_HOST 8 -#define INT_ABORT 9 -#define INT_BRIDGE_PRIV 13 -#define INT_GPIO_BANK1 14 -#define INT_UART3 15 -#define INT_TIMER3 16 -#define INT_DMA_CH0_6 19 -#define INT_DMA_CH1_7 20 -#define INT_DMA_CH2_8 21 -#define INT_DMA_CH3 22 -#define INT_DMA_CH4 23 -#define INT_DMA_CH5 24 -#define INT_DMA_LCD 25 -#define INT_TIMER1 26 -#define INT_WD_TIMER 27 -#define INT_BRIDGE_PUB 28 -#define INT_TIMER2 30 -#define INT_LCD_CTRL 31 - -/* - * OMAP-1510 specific IRQ numbers for interrupt handler 1 - */ -#define INT_1510_IH2_IRQ 0 -#define INT_1510_RES2 2 -#define INT_1510_SPI_TX 4 -#define INT_1510_SPI_RX 5 -#define INT_1510_DSP_MAILBOX1 10 -#define INT_1510_DSP_MAILBOX2 11 -#define INT_1510_RES12 12 -#define INT_1510_LB_MMU 17 -#define INT_1510_RES18 18 -#define INT_1510_LOCAL_BUS 29 - -/* - * OMAP-1610 specific IRQ numbers for interrupt handler 1 - */ -#define INT_1610_IH2_IRQ 0 -#define INT_1610_IH2_FIQ 2 -#define INT_1610_McBSP2_TX 4 -#define INT_1610_McBSP2_RX 5 -#define INT_1610_DSP_MAILBOX1 10 -#define INT_1610_DSP_MAILBOX2 11 -#define INT_1610_LCD_LINE 12 -#define INT_1610_GPTIMER1 17 -#define INT_1610_GPTIMER2 18 -#define INT_1610_SSR_FIFO_0 29 - -/* - * OMAP-730 specific IRQ numbers for interrupt handler 1 - */ -#define INT_730_IH2_FIQ 0 -#define INT_730_IH2_IRQ 1 -#define INT_730_USB_NON_ISO 2 -#define INT_730_USB_ISO 3 -#define INT_730_ICR 4 -#define INT_730_EAC 5 -#define INT_730_GPIO_BANK1 6 -#define INT_730_GPIO_BANK2 7 -#define INT_730_GPIO_BANK3 8 -#define INT_730_McBSP2TX 10 -#define INT_730_McBSP2RX 11 -#define INT_730_McBSP2RX_OVF 12 -#define INT_730_LCD_LINE 14 -#define INT_730_GSM_PROTECT 15 -#define INT_730_TIMER3 16 -#define INT_730_GPIO_BANK5 17 -#define INT_730_GPIO_BANK6 18 -#define INT_730_SPGIO_WR 29 - -/* - * IRQ numbers for interrupt handler 2 - * - * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below - */ -#define IH2_BASE 32 - -#define INT_KEYBOARD (1 + IH2_BASE) -#define INT_uWireTX (2 + IH2_BASE) -#define INT_uWireRX (3 + IH2_BASE) -#define INT_I2C (4 + IH2_BASE) -#define INT_MPUIO (5 + IH2_BASE) -#define INT_USB_HHC_1 (6 + IH2_BASE) -#define INT_McBSP3TX (10 + IH2_BASE) -#define INT_McBSP3RX (11 + IH2_BASE) -#define INT_McBSP1TX (12 + IH2_BASE) -#define INT_McBSP1RX (13 + IH2_BASE) -#define INT_UART1 (14 + IH2_BASE) -#define INT_UART2 (15 + IH2_BASE) -#define INT_BT_MCSI1TX (16 + IH2_BASE) -#define INT_BT_MCSI1RX (17 + IH2_BASE) -#define INT_USB_W2FC (20 + IH2_BASE) -#define INT_1WIRE (21 + IH2_BASE) -#define INT_OS_TIMER (22 + IH2_BASE) -#define INT_MMC (23 + IH2_BASE) -#define INT_GAUGE_32K (24 + IH2_BASE) -#define INT_RTC_TIMER (25 + IH2_BASE) -#define INT_RTC_ALARM (26 + IH2_BASE) -#define INT_MEM_STICK (27 + IH2_BASE) - -/* - * OMAP-1510 specific IRQ numbers for interrupt handler 2 - */ -#define INT_1510_DSP_MMU (28 + IH2_BASE) -#define INT_1510_COM_SPI_RO (31 + IH2_BASE) - -/* - * OMAP-1610 specific IRQ numbers for interrupt handler 2 - */ -#define INT_1610_FAC (0 + IH2_BASE) -#define INT_1610_USB_HHC_2 (7 + IH2_BASE) -#define INT_1610_USB_OTG (8 + IH2_BASE) -#define INT_1610_SoSSI (9 + IH2_BASE) -#define INT_1610_SoSSI_MATCH (19 + IH2_BASE) -#define INT_1610_DSP_MMU (28 + IH2_BASE) -#define INT_1610_McBSP2RX_OF (31 + IH2_BASE) -#define INT_1610_STI (32 + IH2_BASE) -#define INT_1610_STI_WAKEUP (33 + IH2_BASE) -#define INT_1610_GPTIMER3 (34 + IH2_BASE) -#define INT_1610_GPTIMER4 (35 + IH2_BASE) -#define INT_1610_GPTIMER5 (36 + IH2_BASE) -#define INT_1610_GPTIMER6 (37 + IH2_BASE) -#define INT_1610_GPTIMER7 (38 + IH2_BASE) -#define INT_1610_GPTIMER8 (39 + IH2_BASE) -#define INT_1610_GPIO_BANK2 (40 + IH2_BASE) -#define INT_1610_GPIO_BANK3 (41 + IH2_BASE) -#define INT_1610_MMC2 (42 + IH2_BASE) -#define INT_1610_CF (43 + IH2_BASE) -#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) -#define INT_1610_GPIO_BANK4 (48 + IH2_BASE) -#define INT_1610_SPI (49 + IH2_BASE) -#define INT_1610_DMA_CH6 (53 + IH2_BASE) -#define INT_1610_DMA_CH7 (54 + IH2_BASE) -#define INT_1610_DMA_CH8 (55 + IH2_BASE) -#define INT_1610_DMA_CH9 (56 + IH2_BASE) -#define INT_1610_DMA_CH10 (57 + IH2_BASE) -#define INT_1610_DMA_CH11 (58 + IH2_BASE) -#define INT_1610_DMA_CH12 (59 + IH2_BASE) -#define INT_1610_DMA_CH13 (60 + IH2_BASE) -#define INT_1610_DMA_CH14 (61 + IH2_BASE) -#define INT_1610_DMA_CH15 (62 + IH2_BASE) -#define INT_1610_NAND (63 + IH2_BASE) - -/* - * OMAP-730 specific IRQ numbers for interrupt handler 2 - */ -#define INT_730_HW_ERRORS (0 + IH2_BASE) -#define INT_730_NFIQ_PWR_FAIL (1 + IH2_BASE) -#define INT_730_CFCD (2 + IH2_BASE) -#define INT_730_CFIREQ (3 + IH2_BASE) -#define INT_730_I2C (4 + IH2_BASE) -#define INT_730_PCC (5 + IH2_BASE) -#define INT_730_MPU_EXT_NIRQ (6 + IH2_BASE) -#define INT_730_SPI_100K_1 (7 + IH2_BASE) -#define INT_730_SYREN_SPI (8 + IH2_BASE) -#define INT_730_VLYNQ (9 + IH2_BASE) -#define INT_730_GPIO_BANK4 (10 + IH2_BASE) -#define INT_730_McBSP1TX (11 + IH2_BASE) -#define INT_730_McBSP1RX (12 + IH2_BASE) -#define INT_730_McBSP1RX_OF (13 + IH2_BASE) -#define INT_730_UART_MODEM_IRDA_2 (14 + IH2_BASE) -#define INT_730_UART_MODEM_1 (15 + IH2_BASE) -#define INT_730_MCSI (16 + IH2_BASE) -#define INT_730_uWireTX (17 + IH2_BASE) -#define INT_730_uWireRX (18 + IH2_BASE) -#define INT_730_SMC_CD (19 + IH2_BASE) -#define INT_730_SMC_IREQ (20 + IH2_BASE) -#define INT_730_HDQ_1WIRE (21 + IH2_BASE) -#define INT_730_TIMER32K (22 + IH2_BASE) -#define INT_730_MMC_SDIO (23 + IH2_BASE) -#define INT_730_UPLD (24 + IH2_BASE) -#define INT_730_USB_HHC_1 (27 + IH2_BASE) -#define INT_730_USB_HHC_2 (28 + IH2_BASE) -#define INT_730_USB_GENI (29 + IH2_BASE) -#define INT_730_USB_OTG (30 + IH2_BASE) -#define INT_730_CAMERA_IF (31 + IH2_BASE) -#define INT_730_RNG (32 + IH2_BASE) -#define INT_730_DUAL_MODE_TIMER (33 + IH2_BASE) -#define INT_730_DBB_RF_EN (34 + IH2_BASE) -#define INT_730_MPUIO_KEYPAD (35 + IH2_BASE) -#define INT_730_SHA1_MD5 (36 + IH2_BASE) -#define INT_730_SPI_100K_2 (37 + IH2_BASE) -#define INT_730_RNG_IDLE (38 + IH2_BASE) -#define INT_730_MPUIO (39 + IH2_BASE) -#define INT_730_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE) -#define INT_730_LLPC_OE_FALLING (41 + IH2_BASE) -#define INT_730_LLPC_OE_RISING (42 + IH2_BASE) -#define INT_730_LLPC_VSYNC (43 + IH2_BASE) -#define INT_730_WAKE_UP_REQ (46 + IH2_BASE) -#define INT_730_DMA_CH6 (53 + IH2_BASE) -#define INT_730_DMA_CH7 (54 + IH2_BASE) -#define INT_730_DMA_CH8 (55 + IH2_BASE) -#define INT_730_DMA_CH9 (56 + IH2_BASE) -#define INT_730_DMA_CH10 (57 + IH2_BASE) -#define INT_730_DMA_CH11 (58 + IH2_BASE) -#define INT_730_DMA_CH12 (59 + IH2_BASE) -#define INT_730_DMA_CH13 (60 + IH2_BASE) -#define INT_730_DMA_CH14 (61 + IH2_BASE) -#define INT_730_DMA_CH15 (62 + IH2_BASE) -#define INT_730_NAND (63 + IH2_BASE) - -#define INT_24XX_SYS_NIRQ 7 -#define INT_24XX_SDMA_IRQ0 12 -#define INT_24XX_SDMA_IRQ1 13 -#define INT_24XX_SDMA_IRQ2 14 -#define INT_24XX_SDMA_IRQ3 15 -#define INT_24XX_CAM_IRQ 24 -#define INT_24XX_DSS_IRQ 25 -#define INT_24XX_MAIL_U0_MPU 26 -#define INT_24XX_DSP_UMA 27 -#define INT_24XX_DSP_MMU 28 -#define INT_24XX_GPIO_BANK1 29 -#define INT_24XX_GPIO_BANK2 30 -#define INT_24XX_GPIO_BANK3 31 -#define INT_24XX_GPIO_BANK4 32 -#define INT_24XX_GPIO_BANK5 33 -#define INT_24XX_MAIL_U3_MPU 34 -#define INT_24XX_GPTIMER1 37 -#define INT_24XX_GPTIMER2 38 -#define INT_24XX_GPTIMER3 39 -#define INT_24XX_GPTIMER4 40 -#define INT_24XX_GPTIMER5 41 -#define INT_24XX_GPTIMER6 42 -#define INT_24XX_GPTIMER7 43 -#define INT_24XX_GPTIMER8 44 -#define INT_24XX_GPTIMER9 45 -#define INT_24XX_GPTIMER10 46 -#define INT_24XX_GPTIMER11 47 -#define INT_24XX_GPTIMER12 48 -#define INT_24XX_I2C1_IRQ 56 -#define INT_24XX_I2C2_IRQ 57 -#define INT_24XX_MCBSP1_IRQ_TX 59 -#define INT_24XX_MCBSP1_IRQ_RX 60 -#define INT_24XX_MCBSP2_IRQ_TX 62 -#define INT_24XX_MCBSP2_IRQ_RX 63 -#define INT_24XX_UART1_IRQ 72 -#define INT_24XX_UART2_IRQ 73 -#define INT_24XX_UART3_IRQ 74 -#define INT_24XX_USB_IRQ_GEN 75 -#define INT_24XX_USB_IRQ_NISO 76 -#define INT_24XX_USB_IRQ_ISO 77 -#define INT_24XX_USB_IRQ_HGEN 78 -#define INT_24XX_USB_IRQ_HSOF 79 -#define INT_24XX_USB_IRQ_OTG 80 -#define INT_24XX_MMC_IRQ 83 - -/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and - * 16 MPUIO lines */ -#define OMAP_MAX_GPIO_LINES 192 -#define IH_GPIO_BASE (128 + IH2_BASE) -#define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) -#define OMAP_IRQ_END (IH_MPUIO_BASE + 16) - -/* External FPGA handles interrupts on Innovator boards */ -#define OMAP_FPGA_IRQ_BASE (OMAP_IRQ_END) -#ifdef CONFIG_MACH_OMAP_INNOVATOR -#define OMAP_FPGA_NR_IRQS 24 -#else -#define OMAP_FPGA_NR_IRQS 0 -#endif -#define OMAP_FPGA_IRQ_END (OMAP_FPGA_IRQ_BASE + OMAP_FPGA_NR_IRQS) - -/* External TWL4030 can handle interrupts on 2430 and 34xx boards */ -#define TWL4030_IRQ_BASE (OMAP_FPGA_IRQ_END) -#ifdef CONFIG_TWL4030_CORE -#define TWL4030_BASE_NR_IRQS 8 -#define TWL4030_PWR_NR_IRQS 8 -#else -#define TWL4030_BASE_NR_IRQS 0 -#define TWL4030_PWR_NR_IRQS 0 -#endif -#define TWL4030_IRQ_END (TWL4030_IRQ_BASE + TWL4030_BASE_NR_IRQS) -#define TWL4030_PWR_IRQ_BASE TWL4030_IRQ_END -#define TWL4030_PWR_IRQ_END (TWL4030_PWR_IRQ_BASE + TWL4030_PWR_NR_IRQS) - -/* External TWL4030 gpio interrupts are optional */ -#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END -#ifdef CONFIG_TWL4030_GPIO -#define TWL4030_GPIO_NR_IRQS 18 -#else -#define TWL4030_GPIO_NR_IRQS 0 -#endif -#define TWL4030_GPIO_IRQ_END (TWL4030_GPIO_IRQ_BASE + TWL4030_GPIO_NR_IRQS) - -/* Total number of interrupts depends on the enabled blocks above */ -#define NR_IRQS TWL4030_GPIO_IRQ_END - -#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) - -#ifndef __ASSEMBLY__ -extern void omap_init_irq(void); -#endif - -#include - -#endif diff --git a/include/asm-arm/arch-omap/keypad.h b/include/asm-arm/arch-omap/keypad.h deleted file mode 100644 index b7f8307..0000000 --- a/include/asm-arm/arch-omap/keypad.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/keypad.h - * - * Copyright (C) 2006 Komal Shah - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_ARCH_KEYPAD_H -#define ASMARM_ARCH_KEYPAD_H - -struct omap_kp_platform_data { - int rows; - int cols; - int *keymap; - unsigned int keymapsize; - unsigned int rep:1; - unsigned long delay; - unsigned int dbounce:1; - /* specific to OMAP242x*/ - unsigned int *row_gpios; - unsigned int *col_gpios; -}; - -/* Group (0..3) -- when multiple keys are pressed, only the - * keys pressed in the same group are considered as pressed. This is - * in order to workaround certain crappy HW designs that produce ghost - * keypresses. */ -#define GROUP_0 (0 << 16) -#define GROUP_1 (1 << 16) -#define GROUP_2 (2 << 16) -#define GROUP_3 (3 << 16) -#define GROUP_MASK GROUP_3 - -#define KEY(col, row, val) (((col) << 28) | ((row) << 24) | (val)) - -#endif - diff --git a/include/asm-arm/arch-omap/lcd_mipid.h b/include/asm-arm/arch-omap/lcd_mipid.h deleted file mode 100644 index f8fbc48..0000000 --- a/include/asm-arm/arch-omap/lcd_mipid.h +++ /dev/null @@ -1,24 +0,0 @@ -#ifndef __LCD_MIPID_H -#define __LCD_MIPID_H - -enum mipid_test_num { - MIPID_TEST_RGB_LINES, -}; - -enum mipid_test_result { - MIPID_TEST_SUCCESS, - MIPID_TEST_INVALID, - MIPID_TEST_FAILED, -}; - -#ifdef __KERNEL__ - -struct mipid_platform_data { - int nreset_gpio; - int data_lines; - void (*shutdown)(struct mipid_platform_data *pdata); -}; - -#endif - -#endif diff --git a/include/asm-arm/arch-omap/led.h b/include/asm-arm/arch-omap/led.h deleted file mode 100644 index f3acae2..0000000 --- a/include/asm-arm/arch-omap/led.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/led.h - * - * Copyright (C) 2006 Samsung Electronics - * Kyungmin Park - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef ASMARM_ARCH_LED_H -#define ASMARM_ARCH_LED_H - -struct omap_led_config { - struct led_classdev cdev; - s16 gpio; -}; - -struct omap_led_platform_data { - s16 nr_leds; - struct omap_led_config *leds; -}; - -#endif diff --git a/include/asm-arm/arch-omap/mailbox.h b/include/asm-arm/arch-omap/mailbox.h deleted file mode 100644 index 7cbed93..0000000 --- a/include/asm-arm/arch-omap/mailbox.h +++ /dev/null @@ -1,73 +0,0 @@ -/* mailbox.h */ - -#ifndef MAILBOX_H -#define MAILBOX_H - -#include -#include -#include - -typedef u32 mbox_msg_t; -typedef void (mbox_receiver_t)(mbox_msg_t msg); -struct omap_mbox; - -typedef int __bitwise omap_mbox_irq_t; -#define IRQ_TX ((__force omap_mbox_irq_t) 1) -#define IRQ_RX ((__force omap_mbox_irq_t) 2) - -typedef int __bitwise omap_mbox_type_t; -#define OMAP_MBOX_TYPE1 ((__force omap_mbox_type_t) 1) -#define OMAP_MBOX_TYPE2 ((__force omap_mbox_type_t) 2) - -struct omap_mbox_ops { - omap_mbox_type_t type; - int (*startup)(struct omap_mbox *mbox); - void (*shutdown)(struct omap_mbox *mbox); - /* fifo */ - mbox_msg_t (*fifo_read)(struct omap_mbox *mbox); - void (*fifo_write)(struct omap_mbox *mbox, mbox_msg_t msg); - int (*fifo_empty)(struct omap_mbox *mbox); - int (*fifo_full)(struct omap_mbox *mbox); - /* irq */ - void (*enable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); - void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); - void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); - int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); -}; - -struct omap_mbox_queue { - spinlock_t lock; - struct request_queue *queue; - struct work_struct work; - int (*callback)(void *); - struct omap_mbox *mbox; -}; - -struct omap_mbox { - char *name; - unsigned int irq; - - struct omap_mbox_queue *txq, *rxq; - - struct omap_mbox_ops *ops; - - mbox_msg_t seq_snd, seq_rcv; - - struct device dev; - - struct omap_mbox *next; - void *priv; - - void (*err_notify)(void); -}; - -int omap_mbox_msg_send(struct omap_mbox *, mbox_msg_t msg, void *); -void omap_mbox_init_seq(struct omap_mbox *); - -struct omap_mbox *omap_mbox_get(const char *); -void omap_mbox_put(struct omap_mbox *); - -int omap_mbox_register(struct omap_mbox *); -int omap_mbox_unregister(struct omap_mbox *); - -#endif /* MAILBOX_H */ diff --git a/include/asm-arm/arch-omap/mcbsp.h b/include/asm-arm/arch-omap/mcbsp.h deleted file mode 100644 index 3da459a..0000000 --- a/include/asm-arm/arch-omap/mcbsp.h +++ /dev/null @@ -1,380 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/mcbsp.h - * - * Defines for Multi-Channel Buffered Serial Port - * - * Copyright (C) 2002 RidgeRun, Inc. - * Author: Steve Johnson - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ -#ifndef __ASM_ARCH_OMAP_MCBSP_H -#define __ASM_ARCH_OMAP_MCBSP_H - -#include -#include - -#include -#include - -#define OMAP730_MCBSP1_BASE 0xfffb1000 -#define OMAP730_MCBSP2_BASE 0xfffb1800 - -#define OMAP1510_MCBSP1_BASE 0xe1011800 -#define OMAP1510_MCBSP2_BASE 0xfffb1000 -#define OMAP1510_MCBSP3_BASE 0xe1017000 - -#define OMAP1610_MCBSP1_BASE 0xe1011800 -#define OMAP1610_MCBSP2_BASE 0xfffb1000 -#define OMAP1610_MCBSP3_BASE 0xe1017000 - -#define OMAP24XX_MCBSP1_BASE 0x48074000 -#define OMAP24XX_MCBSP2_BASE 0x48076000 - -#define OMAP34XX_MCBSP1_BASE 0x48074000 -#define OMAP34XX_MCBSP2_BASE 0x49022000 - -#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP730) - -#define OMAP_MCBSP_REG_DRR2 0x00 -#define OMAP_MCBSP_REG_DRR1 0x02 -#define OMAP_MCBSP_REG_DXR2 0x04 -#define OMAP_MCBSP_REG_DXR1 0x06 -#define OMAP_MCBSP_REG_SPCR2 0x08 -#define OMAP_MCBSP_REG_SPCR1 0x0a -#define OMAP_MCBSP_REG_RCR2 0x0c -#define OMAP_MCBSP_REG_RCR1 0x0e -#define OMAP_MCBSP_REG_XCR2 0x10 -#define OMAP_MCBSP_REG_XCR1 0x12 -#define OMAP_MCBSP_REG_SRGR2 0x14 -#define OMAP_MCBSP_REG_SRGR1 0x16 -#define OMAP_MCBSP_REG_MCR2 0x18 -#define OMAP_MCBSP_REG_MCR1 0x1a -#define OMAP_MCBSP_REG_RCERA 0x1c -#define OMAP_MCBSP_REG_RCERB 0x1e -#define OMAP_MCBSP_REG_XCERA 0x20 -#define OMAP_MCBSP_REG_XCERB 0x22 -#define OMAP_MCBSP_REG_PCR0 0x24 -#define OMAP_MCBSP_REG_RCERC 0x26 -#define OMAP_MCBSP_REG_RCERD 0x28 -#define OMAP_MCBSP_REG_XCERC 0x2A -#define OMAP_MCBSP_REG_XCERD 0x2C -#define OMAP_MCBSP_REG_RCERE 0x2E -#define OMAP_MCBSP_REG_RCERF 0x30 -#define OMAP_MCBSP_REG_XCERE 0x32 -#define OMAP_MCBSP_REG_XCERF 0x34 -#define OMAP_MCBSP_REG_RCERG 0x36 -#define OMAP_MCBSP_REG_RCERH 0x38 -#define OMAP_MCBSP_REG_XCERG 0x3A -#define OMAP_MCBSP_REG_XCERH 0x3C - -#define OMAP_MAX_MCBSP_COUNT 3 -#define MAX_MCBSP_CLOCKS 3 - -#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1) - -#define AUDIO_MCBSP OMAP_MCBSP1 -#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX -#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX - -#elif defined(CONFIG_ARCH_OMAP24XX) - -#define OMAP_MCBSP_REG_DRR2 0x00 -#define OMAP_MCBSP_REG_DRR1 0x04 -#define OMAP_MCBSP_REG_DXR2 0x08 -#define OMAP_MCBSP_REG_DXR1 0x0C -#define OMAP_MCBSP_REG_SPCR2 0x10 -#define OMAP_MCBSP_REG_SPCR1 0x14 -#define OMAP_MCBSP_REG_RCR2 0x18 -#define OMAP_MCBSP_REG_RCR1 0x1C -#define OMAP_MCBSP_REG_XCR2 0x20 -#define OMAP_MCBSP_REG_XCR1 0x24 -#define OMAP_MCBSP_REG_SRGR2 0x28 -#define OMAP_MCBSP_REG_SRGR1 0x2C -#define OMAP_MCBSP_REG_MCR2 0x30 -#define OMAP_MCBSP_REG_MCR1 0x34 -#define OMAP_MCBSP_REG_RCERA 0x38 -#define OMAP_MCBSP_REG_RCERB 0x3C -#define OMAP_MCBSP_REG_XCERA 0x40 -#define OMAP_MCBSP_REG_XCERB 0x44 -#define OMAP_MCBSP_REG_PCR0 0x48 -#define OMAP_MCBSP_REG_RCERC 0x4C -#define OMAP_MCBSP_REG_RCERD 0x50 -#define OMAP_MCBSP_REG_XCERC 0x54 -#define OMAP_MCBSP_REG_XCERD 0x58 -#define OMAP_MCBSP_REG_RCERE 0x5C -#define OMAP_MCBSP_REG_RCERF 0x60 -#define OMAP_MCBSP_REG_XCERE 0x64 -#define OMAP_MCBSP_REG_XCERF 0x68 -#define OMAP_MCBSP_REG_RCERG 0x6C -#define OMAP_MCBSP_REG_RCERH 0x70 -#define OMAP_MCBSP_REG_XCERG 0x74 -#define OMAP_MCBSP_REG_XCERH 0x78 - -#define OMAP_MAX_MCBSP_COUNT 2 -#define MAX_MCBSP_CLOCKS 2 - -#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1) -#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1) - -#define AUDIO_MCBSP OMAP_MCBSP2 -#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX -#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX - -#endif - -#define OMAP_MCBSP_READ(base, reg) __raw_readw((base) + OMAP_MCBSP_REG_##reg) -#define OMAP_MCBSP_WRITE(base, reg, val) __raw_writew((val), (base) + OMAP_MCBSP_REG_##reg) - - -/************************** McBSP SPCR1 bit definitions ***********************/ -#define RRST 0x0001 -#define RRDY 0x0002 -#define RFULL 0x0004 -#define RSYNC_ERR 0x0008 -#define RINTM(value) ((value)<<4) /* bits 4:5 */ -#define ABIS 0x0040 -#define DXENA 0x0080 -#define CLKSTP(value) ((value)<<11) /* bits 11:12 */ -#define RJUST(value) ((value)<<13) /* bits 13:14 */ -#define DLB 0x8000 - -/************************** McBSP SPCR2 bit definitions ***********************/ -#define XRST 0x0001 -#define XRDY 0x0002 -#define XEMPTY 0x0004 -#define XSYNC_ERR 0x0008 -#define XINTM(value) ((value)<<4) /* bits 4:5 */ -#define GRST 0x0040 -#define FRST 0x0080 -#define SOFT 0x0100 -#define FREE 0x0200 - -/************************** McBSP PCR bit definitions *************************/ -#define CLKRP 0x0001 -#define CLKXP 0x0002 -#define FSRP 0x0004 -#define FSXP 0x0008 -#define DR_STAT 0x0010 -#define DX_STAT 0x0020 -#define CLKS_STAT 0x0040 -#define SCLKME 0x0080 -#define CLKRM 0x0100 -#define CLKXM 0x0200 -#define FSRM 0x0400 -#define FSXM 0x0800 -#define RIOEN 0x1000 -#define XIOEN 0x2000 -#define IDLE_EN 0x4000 - -/************************** McBSP RCR1 bit definitions ************************/ -#define RWDLEN1(value) ((value)<<5) /* Bits 5:7 */ -#define RFRLEN1(value) ((value)<<8) /* Bits 8:14 */ - -/************************** McBSP XCR1 bit definitions ************************/ -#define XWDLEN1(value) ((value)<<5) /* Bits 5:7 */ -#define XFRLEN1(value) ((value)<<8) /* Bits 8:14 */ - -/*************************** McBSP RCR2 bit definitions ***********************/ -#define RDATDLY(value) (value) /* Bits 0:1 */ -#define RFIG 0x0004 -#define RCOMPAND(value) ((value)<<3) /* Bits 3:4 */ -#define RWDLEN2(value) ((value)<<5) /* Bits 5:7 */ -#define RFRLEN2(value) ((value)<<8) /* Bits 8:14 */ -#define RPHASE 0x8000 - -/*************************** McBSP XCR2 bit definitions ***********************/ -#define XDATDLY(value) (value) /* Bits 0:1 */ -#define XFIG 0x0004 -#define XCOMPAND(value) ((value)<<3) /* Bits 3:4 */ -#define XWDLEN2(value) ((value)<<5) /* Bits 5:7 */ -#define XFRLEN2(value) ((value)<<8) /* Bits 8:14 */ -#define XPHASE 0x8000 - -/************************* McBSP SRGR1 bit definitions ************************/ -#define CLKGDV(value) (value) /* Bits 0:7 */ -#define FWID(value) ((value)<<8) /* Bits 8:15 */ - -/************************* McBSP SRGR2 bit definitions ************************/ -#define FPER(value) (value) /* Bits 0:11 */ -#define FSGM 0x1000 -#define CLKSM 0x2000 -#define CLKSP 0x4000 -#define GSYNC 0x8000 - -/************************* McBSP MCR1 bit definitions *************************/ -#define RMCM 0x0001 -#define RCBLK(value) ((value)<<2) /* Bits 2:4 */ -#define RPABLK(value) ((value)<<5) /* Bits 5:6 */ -#define RPBBLK(value) ((value)<<7) /* Bits 7:8 */ - -/************************* McBSP MCR2 bit definitions *************************/ -#define XMCM(value) (value) /* Bits 0:1 */ -#define XCBLK(value) ((value)<<2) /* Bits 2:4 */ -#define XPABLK(value) ((value)<<5) /* Bits 5:6 */ -#define XPBBLK(value) ((value)<<7) /* Bits 7:8 */ - - -/* we don't do multichannel for now */ -struct omap_mcbsp_reg_cfg { - u16 spcr2; - u16 spcr1; - u16 rcr2; - u16 rcr1; - u16 xcr2; - u16 xcr1; - u16 srgr2; - u16 srgr1; - u16 mcr2; - u16 mcr1; - u16 pcr0; - u16 rcerc; - u16 rcerd; - u16 xcerc; - u16 xcerd; - u16 rcere; - u16 rcerf; - u16 xcere; - u16 xcerf; - u16 rcerg; - u16 rcerh; - u16 xcerg; - u16 xcerh; -}; - -typedef enum { - OMAP_MCBSP1 = 0, - OMAP_MCBSP2, - OMAP_MCBSP3, -} omap_mcbsp_id; - -typedef int __bitwise omap_mcbsp_io_type_t; -#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) -#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) - -typedef enum { - OMAP_MCBSP_WORD_8 = 0, - OMAP_MCBSP_WORD_12, - OMAP_MCBSP_WORD_16, - OMAP_MCBSP_WORD_20, - OMAP_MCBSP_WORD_24, - OMAP_MCBSP_WORD_32, -} omap_mcbsp_word_length; - -typedef enum { - OMAP_MCBSP_CLK_RISING = 0, - OMAP_MCBSP_CLK_FALLING, -} omap_mcbsp_clk_polarity; - -typedef enum { - OMAP_MCBSP_FS_ACTIVE_HIGH = 0, - OMAP_MCBSP_FS_ACTIVE_LOW, -} omap_mcbsp_fs_polarity; - -typedef enum { - OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0, - OMAP_MCBSP_CLK_STP_MODE_DELAY, -} omap_mcbsp_clk_stp_mode; - - -/******* SPI specific mode **********/ -typedef enum { - OMAP_MCBSP_SPI_MASTER = 0, - OMAP_MCBSP_SPI_SLAVE, -} omap_mcbsp_spi_mode; - -struct omap_mcbsp_spi_cfg { - omap_mcbsp_spi_mode spi_mode; - omap_mcbsp_clk_polarity rx_clock_polarity; - omap_mcbsp_clk_polarity tx_clock_polarity; - omap_mcbsp_fs_polarity fsx_polarity; - u8 clk_div; - omap_mcbsp_clk_stp_mode clk_stp_mode; - omap_mcbsp_word_length word_length; -}; - -/* Platform specific configuration */ -struct omap_mcbsp_ops { - void (*request)(unsigned int); - void (*free)(unsigned int); - int (*check)(unsigned int); -}; - -struct omap_mcbsp_platform_data { - u32 virt_base; - u8 dma_rx_sync, dma_tx_sync; - u16 rx_irq, tx_irq; - struct omap_mcbsp_ops *ops; - char const *clk_name; -}; - -struct omap_mcbsp { - struct device *dev; - u32 io_base; - u8 id; - u8 free; - omap_mcbsp_word_length rx_word_length; - omap_mcbsp_word_length tx_word_length; - - omap_mcbsp_io_type_t io_type; /* IRQ or poll */ - /* IRQ based TX/RX */ - int rx_irq; - int tx_irq; - - /* DMA stuff */ - u8 dma_rx_sync; - short dma_rx_lch; - u8 dma_tx_sync; - short dma_tx_lch; - - /* Completion queues */ - struct completion tx_irq_completion; - struct completion rx_irq_completion; - struct completion tx_dma_completion; - struct completion rx_dma_completion; - - /* Protect the field .free, while checking if the mcbsp is in use */ - spinlock_t lock; - struct omap_mcbsp_platform_data *pdata; - struct clk *clk; -}; - -int omap_mcbsp_init(void); -void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, - int size); -void omap_mcbsp_config(unsigned int id, const struct omap_mcbsp_reg_cfg * config); -int omap_mcbsp_request(unsigned int id); -void omap_mcbsp_free(unsigned int id); -void omap_mcbsp_start(unsigned int id); -void omap_mcbsp_stop(unsigned int id); -void omap_mcbsp_xmit_word(unsigned int id, u32 word); -u32 omap_mcbsp_recv_word(unsigned int id); - -int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); -int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); -int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); -int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); - - -/* SPI specific API */ -void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); - -/* Polled read/write functions */ -int omap_mcbsp_pollread(unsigned int id, u16 * buf); -int omap_mcbsp_pollwrite(unsigned int id, u16 buf); - -#endif diff --git a/include/asm-arm/arch-omap/mcspi.h b/include/asm-arm/arch-omap/mcspi.h deleted file mode 100644 index 1254e49..0000000 --- a/include/asm-arm/arch-omap/mcspi.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef _OMAP2_MCSPI_H -#define _OMAP2_MCSPI_H - -struct omap2_mcspi_platform_config { - unsigned short num_cs; -}; - -struct omap2_mcspi_device_config { - unsigned turbo_mode:1; - - /* Do we want one channel enabled at the same time? */ - unsigned single_channel:1; -}; - -#endif diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h deleted file mode 100644 index 14cba97..0000000 --- a/include/asm-arm/arch-omap/memory.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/memory.h - * - * Memory map for OMAP-1510 and 1610 - * - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * This file was derived from linux/include/asm-arm/arch-intergrator/memory.h - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#if defined(CONFIG_ARCH_OMAP1) -#define PHYS_OFFSET UL(0x10000000) -#elif defined(CONFIG_ARCH_OMAP2) -#define PHYS_OFFSET UL(0x80000000) -#endif - -/* - * Conversion between SDRAM and fake PCI bus, used by USB - * NOTE: Physical address must be converted to Local Bus address - * on OMAP-1510 only - */ - -/* - * Bus address is physical address, except for OMAP-1510 Local Bus. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * OMAP-1510 bus address is translated into a Local Bus address if the - * OMAP bus type is lbus. We do the address translation based on the - * device overriding the defaults used in the dma-mapping API. - * Note that the is_lbus_device() test is not very efficient on 1510 - * because of the strncmp(). - */ -#ifdef CONFIG_ARCH_OMAP15XX - -/* - * OMAP-1510 Local Bus address offset - */ -#define OMAP1510_LB_OFFSET UL(0x30000000) - -#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) -#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) -#define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev->bus_id, "ohci", 4) == 0)) - -#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \ - (dma_addr_t)virt_to_lbus(page_address(page)) : \ - (dma_addr_t)__virt_to_bus(page_address(page));}) - -#define __arch_dma_to_virt(dev, addr) ({is_lbus_device(dev) ? \ - lbus_to_virt(addr) : \ - __bus_to_virt(addr);}) - -#define __arch_virt_to_dma(dev, addr) ({is_lbus_device(dev) ? \ - virt_to_lbus(addr) : \ - __virt_to_bus(addr);}) - -#endif /* CONFIG_ARCH_OMAP15XX */ - -/* Override the ARM default */ -#ifdef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE - -#if (CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE == 0) -#undef CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE -#define CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE 2 -#endif - -#define CONSISTENT_DMA_SIZE \ - (((CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE + 1) & ~1) * 1024 * 1024) - -#endif - -#endif - diff --git a/include/asm-arm/arch-omap/menelaus.h b/include/asm-arm/arch-omap/menelaus.h deleted file mode 100644 index 69ed7ee..0000000 --- a/include/asm-arm/arch-omap/menelaus.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/menelaus.h - * - * Functions to access Menelaus power management chip - */ - -#ifndef __ASM_ARCH_MENELAUS_H -#define __ASM_ARCH_MENELAUS_H - -struct device; - -struct menelaus_platform_data { - int (* late_init)(struct device *dev); -}; - -extern int menelaus_register_mmc_callback(void (*callback)(void *data, u8 card_mask), - void *data); -extern void menelaus_unregister_mmc_callback(void); -extern int menelaus_set_mmc_opendrain(int slot, int enable); -extern int menelaus_set_mmc_slot(int slot, int enable, int power, int cd_on); - -extern int menelaus_set_vmem(unsigned int mV); -extern int menelaus_set_vio(unsigned int mV); -extern int menelaus_set_vmmc(unsigned int mV); -extern int menelaus_set_vaux(unsigned int mV); -extern int menelaus_set_vdcdc(int dcdc, unsigned int mV); -extern int menelaus_set_slot_sel(int enable); -extern int menelaus_get_slot_pin_states(void); -extern int menelaus_set_vcore_sw(unsigned int mV); -extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV); - -#define EN_VPLL_SLEEP (1 << 7) -#define EN_VMMC_SLEEP (1 << 6) -#define EN_VAUX_SLEEP (1 << 5) -#define EN_VIO_SLEEP (1 << 4) -#define EN_VMEM_SLEEP (1 << 3) -#define EN_DC3_SLEEP (1 << 2) -#define EN_DC2_SLEEP (1 << 1) -#define EN_VC_SLEEP (1 << 0) - -extern int menelaus_set_regulator_sleep(int enable, u32 val); - -#if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) -#define omap_has_menelaus() 1 -#else -#define omap_has_menelaus() 0 -#endif - -#endif diff --git a/include/asm-arm/arch-omap/mmc.h b/include/asm-arm/arch-omap/mmc.h deleted file mode 100644 index 7cfc5f2..0000000 --- a/include/asm-arm/arch-omap/mmc.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * MMC definitions for OMAP2 - * - * Copyright (C) 2006 Nokia Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __OMAP2_MMC_H -#define __OMAP2_MMC_H - -#include -#include -#include - -#include - -#define OMAP_MMC_MAX_SLOTS 2 - -struct omap_mmc_platform_data { - struct omap_mmc_conf conf; - - /* number of slots on board */ - unsigned nr_slots:2; - - /* set if your board has components or wiring that limits the - * maximum frequency on the MMC bus */ - unsigned int max_freq; - - /* switch the bus to a new slot */ - int (* switch_slot)(struct device *dev, int slot); - /* initialize board-specific MMC functionality, can be NULL if - * not supported */ - int (* init)(struct device *dev); - void (* cleanup)(struct device *dev); - void (* shutdown)(struct device *dev); - - /* To handle board related suspend/resume functionality for MMC */ - int (*suspend)(struct device *dev, int slot); - int (*resume)(struct device *dev, int slot); - - struct omap_mmc_slot_data { - int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); - int (* set_power)(struct device *dev, int slot, int power_on, int vdd); - int (* get_ro)(struct device *dev, int slot); - - /* return MMC cover switch state, can be NULL if not supported. - * - * possible return values: - * 0 - open - * 1 - closed - */ - int (* get_cover_state)(struct device *dev, int slot); - - const char *name; - u32 ocr_mask; - - /* Card detection IRQs */ - int card_detect_irq; - int (* card_detect)(int irq); - - unsigned int ban_openended:1; - - } slots[OMAP_MMC_MAX_SLOTS]; -}; - -extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); - -/* called from board-specific card detection service routine */ -extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); - -#endif diff --git a/include/asm-arm/arch-omap/mtd-xip.h b/include/asm-arm/arch-omap/mtd-xip.h deleted file mode 100644 index f4714b5..0000000 --- a/include/asm-arm/arch-omap/mtd-xip.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * MTD primitives for XIP support. Architecture specific functions. - * - * Do not include this file directly. It's included from linux/mtd/xip.h - * - * Author: Vladimir Barinov - * - * (c) 2005 MontaVista Software, Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express or - * implied. - */ - -#ifndef __ARCH_OMAP_MTD_XIP_H__ -#define __ARCH_OMAP_MTD_XIP_H__ - -#include -#define OMAP_MPU_TIMER_BASE (0xfffec500) -#define OMAP_MPU_TIMER_OFFSET 0x100 - -typedef struct { - u32 cntl; /* CNTL_TIMER, R/W */ - u32 load_tim; /* LOAD_TIM, W */ - u32 read_tim; /* READ_TIM, R */ -} xip_omap_mpu_timer_regs_t; - -#define xip_omap_mpu_timer_base(n) \ -((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE + \ - (n)*OMAP_MPU_TIMER_OFFSET)) - -static inline unsigned long xip_omap_mpu_timer_read(int nr) -{ - volatile xip_omap_mpu_timer_regs_t* timer = xip_omap_mpu_timer_base(nr); - return timer->read_tim; -} - -#define xip_irqpending() \ - (omap_readl(OMAP_IH1_ITR) & ~omap_readl(OMAP_IH1_MIR)) -#define xip_currtime() (~xip_omap_mpu_timer_read(0)) - -/* - * It's permitted to do approxmation for xip_elapsed_since macro - * (see linux/mtd/xip.h) - */ - -#ifdef CONFIG_MACH_OMAP_PERSEUS2 -#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 7) -#else -#define xip_elapsed_since(x) (signed)((~xip_omap_mpu_timer_read(0) - (x)) / 6) -#endif - -/* - * xip_cpu_idle() is used when waiting for a delay equal or larger than - * the system timer tick period. This should put the CPU into idle mode - * to save power and to be woken up only when some interrupts are pending. - * As above, this should not rely upon standard kernel code. - */ - -#define xip_cpu_idle() asm volatile ("mcr p15, 0, %0, c7, c0, 4" :: "r" (1)) - -#endif /* __ARCH_OMAP_MTD_XIP_H__ */ diff --git a/include/asm-arm/arch-omap/mux.h b/include/asm-arm/arch-omap/mux.h deleted file mode 100644 index ff9a5b5..0000000 --- a/include/asm-arm/arch-omap/mux.h +++ /dev/null @@ -1,615 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/mux.h - * - * Table of the Omap register configurations for the FUNC_MUX and - * PULL_DWN combinations. - * - * Copyright (C) 2004 - 2008 Texas Instruments Inc. - * Copyright (C) 2003 - 2008 Nokia Corporation - * - * Written by Tony Lindgren - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * NOTE: Please use the following naming style for new pin entries. - * For example, W8_1610_MMC2_DAT0, where: - * - W8 = ball - * - 1610 = 1510 or 1610, none if common for both 1510 and 1610 - * - MMC2_DAT0 = function - */ - -#ifndef __ASM_ARCH_MUX_H -#define __ASM_ARCH_MUX_H - -#define PU_PD_SEL_NA 0 /* No pu_pd reg available */ -#define PULL_DWN_CTRL_NA 0 /* No pull-down control needed */ - -#ifdef CONFIG_OMAP_MUX_DEBUG -#define MUX_REG(reg, mode_offset, mode) .mux_reg_name = "FUNC_MUX_CTRL_"#reg, \ - .mux_reg = FUNC_MUX_CTRL_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG(reg, bit, status) .pull_name = "PULL_DWN_CTRL_"#reg, \ - .pull_reg = PULL_DWN_CTRL_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#define PU_PD_REG(reg, status) .pu_pd_name = "PU_PD_SEL_"#reg, \ - .pu_pd_reg = PU_PD_SEL_##reg, \ - .pu_pd_val = status, - -#define MUX_REG_730(reg, mode_offset, mode) .mux_reg_name = "OMAP730_IO_CONF_"#reg, \ - .mux_reg = OMAP730_IO_CONF_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG_730(reg, bit, status) .pull_name = "OMAP730_IO_CONF_"#reg, \ - .pull_reg = OMAP730_IO_CONF_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#else - -#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG(reg, bit, status) .pull_reg = PULL_DWN_CTRL_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#define PU_PD_REG(reg, status) .pu_pd_reg = PU_PD_SEL_##reg, \ - .pu_pd_val = status, - -#define MUX_REG_730(reg, mode_offset, mode) \ - .mux_reg = OMAP730_IO_CONF_##reg, \ - .mask_offset = mode_offset, \ - .mask = mode, - -#define PULL_REG_730(reg, bit, status) .pull_reg = OMAP730_IO_CONF_##reg, \ - .pull_bit = bit, \ - .pull_val = status, - -#endif /* CONFIG_OMAP_MUX_DEBUG */ - -#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ - pull_reg, pull_bit, pull_status, \ - pu_pd_reg, pu_pd_status, debug_status) \ -{ \ - .name = desc, \ - .debug = debug_status, \ - MUX_REG(mux_reg, mode_offset, mode) \ - PULL_REG(pull_reg, pull_bit, pull_status) \ - PU_PD_REG(pu_pd_reg, pu_pd_status) \ -}, - - -/* - * OMAP730 has a slightly different config for the pin mux. - * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and - * not the FUNC_MUX_CTRL_x regs from hardware.h - * - for pull-up/down, only has one enable bit which is is in the same register - * as mux config - */ -#define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ - pull_bit, pull_status, debug_status)\ -{ \ - .name = desc, \ - .debug = debug_status, \ - MUX_REG_730(mux_reg, mode_offset, mode) \ - PULL_REG_730(mux_reg, pull_bit, pull_status) \ - PU_PD_REG(NA, 0) \ -}, - -#define MUX_CFG_24XX(desc, reg_offset, mode, \ - pull_en, pull_mode, dbg) \ -{ \ - .name = desc, \ - .debug = dbg, \ - .mux_reg = reg_offset, \ - .mask = mode, \ - .pull_val = pull_en, \ - .pu_pd_val = pull_mode, \ -}, - - -#define PULL_DISABLED 0 -#define PULL_ENABLED 1 - -#define PULL_DOWN 0 -#define PULL_UP 1 - -struct pin_config { - char *name; - unsigned char busy; - unsigned char debug; - - const char *mux_reg_name; - const unsigned int mux_reg; - const unsigned char mask_offset; - const unsigned char mask; - - const char *pull_name; - const unsigned int pull_reg; - const unsigned char pull_val; - const unsigned char pull_bit; - - const char *pu_pd_name; - const unsigned int pu_pd_reg; - const unsigned char pu_pd_val; -}; - -enum omap730_index { - /* OMAP 730 keyboard */ - E2_730_KBR0, - J7_730_KBR1, - E1_730_KBR2, - F3_730_KBR3, - D2_730_KBR4, - C2_730_KBC0, - D3_730_KBC1, - E4_730_KBC2, - F4_730_KBC3, - E3_730_KBC4, - - /* USB */ - AA17_730_USB_DM, - W16_730_USB_PU_EN, - W17_730_USB_VBUSI, -}; - -enum omap1xxx_index { - /* UART1 (BT_UART_GATING)*/ - UART1_TX = 0, - UART1_RTS, - - /* UART2 (COM_UART_GATING)*/ - UART2_TX, - UART2_RX, - UART2_CTS, - UART2_RTS, - - /* UART3 (GIGA_UART_GATING) */ - UART3_TX, - UART3_RX, - UART3_CTS, - UART3_RTS, - UART3_CLKREQ, - UART3_BCLK, /* 12MHz clock out */ - Y15_1610_UART3_RTS, - - /* PWT & PWL */ - PWT, - PWL, - - /* USB master generic */ - R18_USB_VBUS, - R18_1510_USB_GPIO0, - W4_USB_PUEN, - W4_USB_CLKO, - W4_USB_HIGHZ, - W4_GPIO58, - - /* USB1 master */ - USB1_SUSP, - USB1_SEO, - W13_1610_USB1_SE0, - USB1_TXEN, - USB1_TXD, - USB1_VP, - USB1_VM, - USB1_RCV, - USB1_SPEED, - R13_1610_USB1_SPEED, - R13_1710_USB1_SE0, - - /* USB2 master */ - USB2_SUSP, - USB2_VP, - USB2_TXEN, - USB2_VM, - USB2_RCV, - USB2_SEO, - USB2_TXD, - - /* OMAP-1510 GPIO */ - R18_1510_GPIO0, - R19_1510_GPIO1, - M14_1510_GPIO2, - - /* OMAP1610 GPIO */ - P18_1610_GPIO3, - Y15_1610_GPIO17, - - /* OMAP-1710 GPIO */ - R18_1710_GPIO0, - V2_1710_GPIO10, - N21_1710_GPIO14, - W15_1710_GPIO40, - - /* MPUIO */ - MPUIO2, - N15_1610_MPUIO2, - MPUIO4, - MPUIO5, - T20_1610_MPUIO5, - W11_1610_MPUIO6, - V10_1610_MPUIO7, - W11_1610_MPUIO9, - V10_1610_MPUIO10, - W10_1610_MPUIO11, - E20_1610_MPUIO13, - U20_1610_MPUIO14, - E19_1610_MPUIO15, - - /* MCBSP2 */ - MCBSP2_CLKR, - MCBSP2_CLKX, - MCBSP2_DR, - MCBSP2_DX, - MCBSP2_FSR, - MCBSP2_FSX, - - /* MCBSP3 */ - MCBSP3_CLKX, - - /* Misc ballouts */ - BALLOUT_V8_ARMIO3, - N20_HDQ, - - /* OMAP-1610 MMC2 */ - W8_1610_MMC2_DAT0, - V8_1610_MMC2_DAT1, - W15_1610_MMC2_DAT2, - R10_1610_MMC2_DAT3, - Y10_1610_MMC2_CLK, - Y8_1610_MMC2_CMD, - V9_1610_MMC2_CMDDIR, - V5_1610_MMC2_DATDIR0, - W19_1610_MMC2_DATDIR1, - R18_1610_MMC2_CLKIN, - - /* OMAP-1610 External Trace Interface */ - M19_1610_ETM_PSTAT0, - L15_1610_ETM_PSTAT1, - L18_1610_ETM_PSTAT2, - L19_1610_ETM_D0, - J19_1610_ETM_D6, - J18_1610_ETM_D7, - - /* OMAP16XX GPIO */ - P20_1610_GPIO4, - V9_1610_GPIO7, - W8_1610_GPIO9, - N20_1610_GPIO11, - N19_1610_GPIO13, - P10_1610_GPIO22, - V5_1610_GPIO24, - AA20_1610_GPIO_41, - W19_1610_GPIO48, - M7_1610_GPIO62, - V14_16XX_GPIO37, - R9_16XX_GPIO18, - L14_16XX_GPIO49, - - /* OMAP-1610 uWire */ - V19_1610_UWIRE_SCLK, - U18_1610_UWIRE_SDI, - W21_1610_UWIRE_SDO, - N14_1610_UWIRE_CS0, - P15_1610_UWIRE_CS3, - N15_1610_UWIRE_CS1, - - /* OMAP-1610 SPI */ - U19_1610_SPIF_SCK, - U18_1610_SPIF_DIN, - P20_1610_SPIF_DIN, - W21_1610_SPIF_DOUT, - R18_1610_SPIF_DOUT, - N14_1610_SPIF_CS0, - N15_1610_SPIF_CS1, - T19_1610_SPIF_CS2, - P15_1610_SPIF_CS3, - - /* OMAP-1610 Flash */ - L3_1610_FLASH_CS2B_OE, - M8_1610_FLASH_CS2B_WE, - - /* First MMC */ - MMC_CMD, - MMC_DAT1, - MMC_DAT2, - MMC_DAT0, - MMC_CLK, - MMC_DAT3, - - /* OMAP-1710 MMC CMDDIR and DATDIR0 */ - M15_1710_MMC_CLKI, - P19_1710_MMC_CMDDIR, - P20_1710_MMC_DATDIR0, - - /* OMAP-1610 USB0 alternate pin configuration */ - W9_USB0_TXEN, - AA9_USB0_VP, - Y5_USB0_RCV, - R9_USB0_VM, - V6_USB0_TXD, - W5_USB0_SE0, - V9_USB0_SPEED, - V9_USB0_SUSP, - - /* USB2 */ - W9_USB2_TXEN, - AA9_USB2_VP, - Y5_USB2_RCV, - R9_USB2_VM, - V6_USB2_TXD, - W5_USB2_SE0, - - /* 16XX UART */ - R13_1610_UART1_TX, - V14_16XX_UART1_RX, - R14_1610_UART1_CTS, - AA15_1610_UART1_RTS, - R9_16XX_UART2_RX, - L14_16XX_UART3_RX, - - /* I2C OMAP-1610 */ - I2C_SCL, - I2C_SDA, - - /* Keypad */ - F18_1610_KBC0, - D20_1610_KBC1, - D19_1610_KBC2, - E18_1610_KBC3, - C21_1610_KBC4, - G18_1610_KBR0, - F19_1610_KBR1, - H14_1610_KBR2, - E20_1610_KBR3, - E19_1610_KBR4, - N19_1610_KBR5, - - /* Power management */ - T20_1610_LOW_PWR, - - /* MCLK Settings */ - V5_1710_MCLK_ON, - V5_1710_MCLK_OFF, - R10_1610_MCLK_ON, - R10_1610_MCLK_OFF, - - /* CompactFlash controller */ - P11_1610_CF_CD2, - R11_1610_CF_IOIS16, - V10_1610_CF_IREQ, - W10_1610_CF_RESET, - W11_1610_CF_CD1, - - /* parallel camera */ - J15_1610_CAM_LCLK, - J18_1610_CAM_D7, - J19_1610_CAM_D6, - J14_1610_CAM_D5, - K18_1610_CAM_D4, - K19_1610_CAM_D3, - K15_1610_CAM_D2, - K14_1610_CAM_D1, - L19_1610_CAM_D0, - L18_1610_CAM_VS, - L15_1610_CAM_HS, - M19_1610_CAM_RSTZ, - Y15_1610_CAM_OUTCLK, - - /* serial camera */ - H19_1610_CAM_EXCLK, - Y12_1610_CCP_CLKP, - W13_1610_CCP_CLKM, - W14_1610_CCP_DATAP, - Y14_1610_CCP_DATAM, - -}; - -enum omap24xx_index { - /* 24xx I2C */ - M19_24XX_I2C1_SCL, - L15_24XX_I2C1_SDA, - J15_24XX_I2C2_SCL, - H19_24XX_I2C2_SDA, - - /* 24xx Menelaus interrupt */ - W19_24XX_SYS_NIRQ, - - /* 24xx clock */ - W14_24XX_SYS_CLKOUT, - - /* 24xx GPMC chipselects, wait pin monitoring */ - E2_GPMC_NCS2, - L2_GPMC_NCS7, - L3_GPMC_WAIT0, - N7_GPMC_WAIT1, - M1_GPMC_WAIT2, - P1_GPMC_WAIT3, - - /* 242X McBSP */ - Y15_24XX_MCBSP2_CLKX, - R14_24XX_MCBSP2_FSX, - W15_24XX_MCBSP2_DR, - V15_24XX_MCBSP2_DX, - - /* 24xx GPIO */ - M21_242X_GPIO11, - P21_242X_GPIO12, - AA10_242X_GPIO13, - AA6_242X_GPIO14, - AA4_242X_GPIO15, - Y11_242X_GPIO16, - AA12_242X_GPIO17, - AA8_242X_GPIO58, - Y20_24XX_GPIO60, - W4__24XX_GPIO74, - N15_24XX_GPIO85, - M15_24XX_GPIO92, - P20_24XX_GPIO93, - P18_24XX_GPIO95, - M18_24XX_GPIO96, - L14_24XX_GPIO97, - J15_24XX_GPIO99, - V14_24XX_GPIO117, - P14_24XX_GPIO125, - - /* 242x DBG GPIO */ - V4_242X_GPIO49, - W2_242X_GPIO50, - U4_242X_GPIO51, - V3_242X_GPIO52, - V2_242X_GPIO53, - V6_242X_GPIO53, - T4_242X_GPIO54, - Y4_242X_GPIO54, - T3_242X_GPIO55, - U2_242X_GPIO56, - - /* 24xx external DMA requests */ - AA10_242X_DMAREQ0, - AA6_242X_DMAREQ1, - E4_242X_DMAREQ2, - G4_242X_DMAREQ3, - D3_242X_DMAREQ4, - E3_242X_DMAREQ5, - - /* UART3 */ - K15_24XX_UART3_TX, - K14_24XX_UART3_RX, - - /* MMC/SDIO */ - G19_24XX_MMC_CLKO, - H18_24XX_MMC_CMD, - F20_24XX_MMC_DAT0, - H14_24XX_MMC_DAT1, - E19_24XX_MMC_DAT2, - D19_24XX_MMC_DAT3, - F19_24XX_MMC_DAT_DIR0, - E20_24XX_MMC_DAT_DIR1, - F18_24XX_MMC_DAT_DIR2, - E18_24XX_MMC_DAT_DIR3, - G18_24XX_MMC_CMD_DIR, - H15_24XX_MMC_CLKI, - - /* Full speed USB */ - J20_24XX_USB0_PUEN, - J19_24XX_USB0_VP, - K20_24XX_USB0_VM, - J18_24XX_USB0_RCV, - K19_24XX_USB0_TXEN, - J14_24XX_USB0_SE0, - K18_24XX_USB0_DAT, - - N14_24XX_USB1_SE0, - W12_24XX_USB1_SE0, - P15_24XX_USB1_DAT, - R13_24XX_USB1_DAT, - W20_24XX_USB1_TXEN, - P13_24XX_USB1_TXEN, - V19_24XX_USB1_RCV, - V12_24XX_USB1_RCV, - - AA10_24XX_USB2_SE0, - Y11_24XX_USB2_DAT, - AA12_24XX_USB2_TXEN, - AA6_24XX_USB2_RCV, - AA4_24XX_USB2_TLLSE0, - - /* Keypad GPIO*/ - T19_24XX_KBR0, - R19_24XX_KBR1, - V18_24XX_KBR2, - M21_24XX_KBR3, - E5__24XX_KBR4, - M18_24XX_KBR5, - R20_24XX_KBC0, - M14_24XX_KBC1, - H19_24XX_KBC2, - V17_24XX_KBC3, - P21_24XX_KBC4, - L14_24XX_KBC5, - N19_24XX_KBC6, - - /* 24xx Menelaus Keypad GPIO */ - B3__24XX_KBR5, - AA4_24XX_KBC2, - B13_24XX_KBC6, - - /* 2430 USB */ - AD9_2430_USB0_PUEN, - Y11_2430_USB0_VP, - AD7_2430_USB0_VM, - AE7_2430_USB0_RCV, - AD4_2430_USB0_TXEN, - AF9_2430_USB0_SE0, - AE6_2430_USB0_DAT, - AD24_2430_USB1_SE0, - AB24_2430_USB1_RCV, - Y25_2430_USB1_TXEN, - AA26_2430_USB1_DAT, - - /* 2430 HS-USB */ - AD9_2430_USB0HS_DATA3, - Y11_2430_USB0HS_DATA4, - AD7_2430_USB0HS_DATA5, - AE7_2430_USB0HS_DATA6, - AD4_2430_USB0HS_DATA2, - AF9_2430_USB0HS_DATA0, - AE6_2430_USB0HS_DATA1, - AE8_2430_USB0HS_CLK, - AD8_2430_USB0HS_DIR, - AE5_2430_USB0HS_STP, - AE9_2430_USB0HS_NXT, - AC7_2430_USB0HS_DATA7, - - /* 2430 McBSP */ - AC10_2430_MCBSP2_FSX, - AD16_2430_MCBSP2_CLX, - AE13_2430_MCBSP2_DX, - AD13_2430_MCBSP2_DR, - AC10_2430_MCBSP2_FSX_OFF, - AD16_2430_MCBSP2_CLX_OFF, - AE13_2430_MCBSP2_DX_OFF, - AD13_2430_MCBSP2_DR_OFF, - -}; - -struct omap_mux_cfg { - struct pin_config *pins; - unsigned long size; - int (*cfg_reg)(const struct pin_config *cfg); -}; - -#ifdef CONFIG_OMAP_MUX -/* setup pin muxing in Linux */ -extern int omap1_mux_init(void); -extern int omap2_mux_init(void); -extern int omap_mux_register(struct omap_mux_cfg *); -extern int omap_cfg_reg(unsigned long reg_cfg); -#else -/* boot loader does it all (no warnings from CONFIG_OMAP_MUX_WARNINGS) */ -static inline int omap1_mux_init(void) { return 0; } -static inline int omap2_mux_init(void) { return 0; } -static inline int omap_cfg_reg(unsigned long reg_cfg) { return 0; } -#endif - -#endif diff --git a/include/asm-arm/arch-omap/nand.h b/include/asm-arm/arch-omap/nand.h deleted file mode 100644 index 17ae26e..0000000 --- a/include/asm-arm/arch-omap/nand.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * include/asm-arm/arch-omap/nand.h - * - * Copyright (C) 2006 Micron Technology Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -struct omap_nand_platform_data { - unsigned int options; - int cs; - int gpio_irq; - struct mtd_partition *parts; - int nr_parts; - int (*nand_setup)(void __iomem *); - int (*dev_ready)(struct omap_nand_platform_data *); - int dma_channel; - void __iomem *gpmc_cs_baseaddr; - void __iomem *gpmc_baseaddr; -}; diff --git a/include/asm-arm/arch-omap/omap-alsa.h b/include/asm-arm/arch-omap/omap-alsa.h deleted file mode 100644 index faa0ed2..0000000 --- a/include/asm-arm/arch-omap/omap-alsa.h +++ /dev/null @@ -1,123 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/omap-alsa.h - * - * Alsa Driver for AIC23 and TSC2101 codecs on OMAP platform boards. - * - * Copyright (C) 2006 Mika Laitio - * - * Copyright (C) 2005 Instituto Nokia de Tecnologia - INdT - Manaus Brazil - * Written by Daniel Petrini, David Cohen, Anderson Briglia - * {daniel.petrini, david.cohen, anderson.briglia}@indt.org.br - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - * - * History - * ------- - * - * 2005/07/25 INdT-10LE Kernel Team - Alsa driver for omap osk, - * original version based in sa1100 driver - * and omap oss driver. - */ - -#ifndef __OMAP_ALSA_H -#define __OMAP_ALSA_H - -#include -#include -#include -#include -#include - -#define DMA_BUF_SIZE (1024 * 8) - -/* - * Buffer management for alsa and dma - */ -struct audio_stream { - char *id; /* identification string */ - int stream_id; /* numeric identification */ - int dma_dev; /* dma number of that device */ - int *lch; /* Chain of channels this stream is linked to */ - char started; /* to store if the chain was started or not */ - int dma_q_head; /* DMA Channel Q Head */ - int dma_q_tail; /* DMA Channel Q Tail */ - char dma_q_count; /* DMA Channel Q Count */ - int active:1; /* we are using this stream for transfer now */ - int period; /* current transfer period */ - int periods; /* current count of periods registerd in the DMA engine */ - spinlock_t dma_lock; /* for locking in DMA operations */ - struct snd_pcm_substream *stream; /* the pcm stream */ - unsigned linked:1; /* dma channels linked */ - int offset; /* store start position of the last period in the alsa buffer */ - int (*hw_start)(void); /* interface to start HW interface, e.g. McBSP */ - int (*hw_stop)(void); /* interface to stop HW interface, e.g. McBSP */ -}; - -/* - * Alsa card structure for aic23 - */ -struct snd_card_omap_codec { - struct snd_card *card; - struct snd_pcm *pcm; - long samplerate; - struct audio_stream s[2]; /* playback & capture */ -}; - -/* Codec specific information and function pointers. - * Codec (omap-alsa-aic23.c and omap-alsa-tsc2101.c) - * are responsible for defining the function pointers. - */ -struct omap_alsa_codec_config { - char *name; - struct omap_mcbsp_reg_cfg *mcbsp_regs_alsa; - struct snd_pcm_hw_constraint_list *hw_constraints_rates; - struct snd_pcm_hardware *snd_omap_alsa_playback; - struct snd_pcm_hardware *snd_omap_alsa_capture; - void (*codec_configure_dev)(void); - void (*codec_set_samplerate)(long); - void (*codec_clock_setup)(void); - int (*codec_clock_on)(void); - int (*codec_clock_off)(void); - int (*get_default_samplerate)(void); -}; - -/*********** Mixer function prototypes *************************/ -int snd_omap_mixer(struct snd_card_omap_codec *); -void snd_omap_init_mixer(void); - -#ifdef CONFIG_PM -void snd_omap_suspend_mixer(void); -void snd_omap_resume_mixer(void); -#endif - -int snd_omap_alsa_post_probe(struct platform_device *pdev, struct omap_alsa_codec_config *config); -int snd_omap_alsa_remove(struct platform_device *pdev); -#ifdef CONFIG_PM -int snd_omap_alsa_suspend(struct platform_device *pdev, pm_message_t state); -int snd_omap_alsa_resume(struct platform_device *pdev); -#else -#define snd_omap_alsa_suspend NULL -#define snd_omap_alsa_resume NULL -#endif - -void callback_omap_alsa_sound_dma(void *); - -#endif diff --git a/include/asm-arm/arch-omap/omap1510.h b/include/asm-arm/arch-omap/omap1510.h deleted file mode 100644 index c575d35..0000000 --- a/include/asm-arm/arch-omap/omap1510.h +++ /dev/null @@ -1,48 +0,0 @@ -/* linux/include/asm-arm/arch-omap/omap1510.h - * - * Hardware definitions for TI OMAP1510 processor. - * - * Cleanup for Linux-2.6 by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP15XX_H -#define __ASM_ARCH_OMAP15XX_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP1510_DSP_BASE 0xE0000000 -#define OMAP1510_DSP_SIZE 0x28000 -#define OMAP1510_DSP_START 0xE0000000 - -#define OMAP1510_DSPREG_BASE 0xE1000000 -#define OMAP1510_DSPREG_SIZE SZ_128K -#define OMAP1510_DSPREG_START 0xE1000000 - -#endif /* __ASM_ARCH_OMAP15XX_H */ - diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h deleted file mode 100644 index f7f5cdf..0000000 --- a/include/asm-arm/arch-omap/omap16xx.h +++ /dev/null @@ -1,197 +0,0 @@ -/* linux/include/asm-arm/arch-omap/omap16xx.h - * - * Hardware definitions for TI OMAP1610/5912/1710 processors. - * - * Cleanup for Linux-2.6 by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP16XX_H -#define __ASM_ARCH_OMAP16XX_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP16XX_DSP_BASE 0xE0000000 -#define OMAP16XX_DSP_SIZE 0x28000 -#define OMAP16XX_DSP_START 0xE0000000 - -#define OMAP16XX_DSPREG_BASE 0xE1000000 -#define OMAP16XX_DSPREG_SIZE SZ_128K -#define OMAP16XX_DSPREG_START 0xE1000000 - -/* - * --------------------------------------------------------------------------- - * Interrupts - * --------------------------------------------------------------------------- - */ -#define OMAP_IH2_0_BASE (0xfffe0000) -#define OMAP_IH2_1_BASE (0xfffe0100) -#define OMAP_IH2_2_BASE (0xfffe0200) -#define OMAP_IH2_3_BASE (0xfffe0300) - -#define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00) -#define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04) -#define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10) -#define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14) -#define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18) -#define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c) -#define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c) - -#define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00) -#define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04) -#define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10) -#define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14) -#define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18) -#define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c) -#define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c) - -#define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00) -#define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04) -#define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10) -#define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14) -#define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18) -#define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c) -#define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c) - -#define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00) -#define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04) -#define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10) -#define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14) -#define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18) -#define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c) -#define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c) - -/* - * ---------------------------------------------------------------------------- - * Clocks - * ---------------------------------------------------------------------------- - */ -#define OMAP16XX_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) - -/* - * ---------------------------------------------------------------------------- - * Pin configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP16XX_CONF_VOLTAGE_VDDSHV6 (1 << 8) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV7 (1 << 9) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV8 (1 << 10) -#define OMAP16XX_CONF_VOLTAGE_VDDSHV9 (1 << 11) -#define OMAP16XX_SUBLVDS_CONF_VALID (1 << 13) - -/* - * ---------------------------------------------------------------------------- - * System control registers - * ---------------------------------------------------------------------------- - */ -#define OMAP1610_RESET_CONTROL 0xfffe1140 - -/* - * --------------------------------------------------------------------------- - * TIPB bus interface - * --------------------------------------------------------------------------- - */ -#define TIPB_SWITCH_BASE (0xfffbc800) -#define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) - -/* UART3 Registers Maping through MPU bus */ -#define UART3_RHR (OMAP_UART3_BASE + 0) -#define UART3_THR (OMAP_UART3_BASE + 0) -#define UART3_DLL (OMAP_UART3_BASE + 0) -#define UART3_IER (OMAP_UART3_BASE + 4) -#define UART3_DLH (OMAP_UART3_BASE + 4) -#define UART3_IIR (OMAP_UART3_BASE + 8) -#define UART3_FCR (OMAP_UART3_BASE + 8) -#define UART3_EFR (OMAP_UART3_BASE + 8) -#define UART3_LCR (OMAP_UART3_BASE + 0x0C) -#define UART3_MCR (OMAP_UART3_BASE + 0x10) -#define UART3_XON1_ADDR1 (OMAP_UART3_BASE + 0x10) -#define UART3_XON2_ADDR2 (OMAP_UART3_BASE + 0x14) -#define UART3_LSR (OMAP_UART3_BASE + 0x14) -#define UART3_TCR (OMAP_UART3_BASE + 0x18) -#define UART3_MSR (OMAP_UART3_BASE + 0x18) -#define UART3_XOFF1 (OMAP_UART3_BASE + 0x18) -#define UART3_XOFF2 (OMAP_UART3_BASE + 0x1C) -#define UART3_SPR (OMAP_UART3_BASE + 0x1C) -#define UART3_TLR (OMAP_UART3_BASE + 0x1C) -#define UART3_MDR1 (OMAP_UART3_BASE + 0x20) -#define UART3_MDR2 (OMAP_UART3_BASE + 0x24) -#define UART3_SFLSR (OMAP_UART3_BASE + 0x28) -#define UART3_TXFLL (OMAP_UART3_BASE + 0x28) -#define UART3_RESUME (OMAP_UART3_BASE + 0x2C) -#define UART3_TXFLH (OMAP_UART3_BASE + 0x2C) -#define UART3_SFREGL (OMAP_UART3_BASE + 0x30) -#define UART3_RXFLL (OMAP_UART3_BASE + 0x30) -#define UART3_SFREGH (OMAP_UART3_BASE + 0x34) -#define UART3_RXFLH (OMAP_UART3_BASE + 0x34) -#define UART3_BLR (OMAP_UART3_BASE + 0x38) -#define UART3_ACREG (OMAP_UART3_BASE + 0x3C) -#define UART3_DIV16 (OMAP_UART3_BASE + 0x3C) -#define UART3_SCR (OMAP_UART3_BASE + 0x40) -#define UART3_SSR (OMAP_UART3_BASE + 0x44) -#define UART3_EBLR (OMAP_UART3_BASE + 0x48) -#define UART3_OSC_12M_SEL (OMAP_UART3_BASE + 0x4C) -#define UART3_MVR (OMAP_UART3_BASE + 0x50) - -/* - * --------------------------------------------------------------------------- - * Watchdog timer - * --------------------------------------------------------------------------- - */ - -/* 32-bit Watchdog timer in OMAP 16XX */ -#define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) -#define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) -#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) -#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) -#define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) -#define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) -#define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) -#define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) -#define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) -#define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) - -#define WCLR_PRE_SHIFT 5 -#define WCLR_PTV_SHIFT 2 - -#define WWPS_W_PEND_WSPR (1 << 4) -#define WWPS_W_PEND_WTGR (1 << 3) -#define WWPS_W_PEND_WLDR (1 << 2) -#define WWPS_W_PEND_WCRR (1 << 1) -#define WWPS_W_PEND_WCLR (1 << 0) - -#define WSPR_ENABLE_0 (0x0000bbbb) -#define WSPR_ENABLE_1 (0x00004444) -#define WSPR_DISABLE_0 (0x0000aaaa) -#define WSPR_DISABLE_1 (0x00005555) - -/* Mailbox */ -#define OMAP16XX_MAILBOX_BASE (0xfffcf000) - -#endif /* __ASM_ARCH_OMAP16XX_H */ - diff --git a/include/asm-arm/arch-omap/omap24xx.h b/include/asm-arm/arch-omap/omap24xx.h deleted file mode 100644 index b9fcaae..0000000 --- a/include/asm-arm/arch-omap/omap24xx.h +++ /dev/null @@ -1,107 +0,0 @@ -/* - * include/asm-arm/arch-omap/omap24xx.h - * - * This file contains the processor specific definitions - * of the TI OMAP24XX. - * - * Copyright (C) 2007 Texas Instruments. - * Copyright (C) 2007 Nokia Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_OMAP24XX_H -#define __ASM_ARCH_OMAP24XX_H - -/* - * Please place only base defines here and put the rest in device - * specific headers. Note also that some of these defines are needed - * for omap1 to compile without adding ifdefs. - */ - -#define L4_24XX_BASE 0x48000000 -#define L4_WK_243X_BASE 0x49000000 -#define L3_24XX_BASE 0x68000000 - -/* interrupt controller */ -#define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000) -#define OMAP24XX_IVA_INTC_BASE 0x40000000 -#define IRQ_SIR_IRQ 0x0040 - -#define OMAP2420_CTRL_BASE L4_24XX_BASE -#define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000) -#define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000) -#define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000) -#define OMAP2420_PRM_BASE OMAP2420_CM_BASE -#define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000) -#define OMAP2420_SMS_BASE 0x68008000 - -#define OMAP2430_32KSYNCT_BASE (L4_WK_243X_BASE + 0x20000) -#define OMAP2430_PRCM_BASE (L4_WK_243X_BASE + 0x6000) -#define OMAP2430_CM_BASE (L4_WK_243X_BASE + 0x6000) -#define OMAP2430_PRM_BASE OMAP2430_CM_BASE - -#define OMAP243X_SMS_BASE 0x6C000000 -#define OMAP243X_SDRC_BASE 0x6D000000 -#define OMAP243X_GPMC_BASE 0x6E000000 -#define OMAP243X_SCM_BASE (L4_WK_243X_BASE + 0x2000) -#define OMAP243X_CTRL_BASE OMAP243X_SCM_BASE -#define OMAP243X_HS_BASE (L4_24XX_BASE + 0x000ac000) - -/* DSP SS */ -#define OMAP2420_DSP_BASE 0x58000000 -#define OMAP2420_DSP_MEM_BASE (OMAP2420_DSP_BASE + 0x0) -#define OMAP2420_DSP_IPI_BASE (OMAP2420_DSP_BASE + 0x1000000) -#define OMAP2420_DSP_MMU_BASE (OMAP2420_DSP_BASE + 0x2000000) - -#define OMAP243X_DSP_BASE 0x5C000000 -#define OMAP243X_DSP_MEM_BASE (OMAP243X_DSP_BASE + 0x0) -#define OMAP243X_DSP_MMU_BASE (OMAP243X_DSP_BASE + 0x1000000) - -/* Mailbox */ -#define OMAP24XX_MAILBOX_BASE (L4_24XX_BASE + 0x94000) - -/* Camera */ -#define OMAP24XX_CAMERA_BASE (L4_24XX_BASE + 0x52000) - -/* Security */ -#define OMAP24XX_SEC_BASE (L4_24XX_BASE + 0xA0000) -#define OMAP24XX_SEC_RNG_BASE (OMAP24XX_SEC_BASE + 0x0000) -#define OMAP24XX_SEC_DES_BASE (OMAP24XX_SEC_BASE + 0x2000) -#define OMAP24XX_SEC_SHA1MD5_BASE (OMAP24XX_SEC_BASE + 0x4000) -#define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) -#define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) - -#if defined(CONFIG_ARCH_OMAP2420) - -#define OMAP2_32KSYNCT_BASE OMAP2420_32KSYNCT_BASE -#define OMAP2_PRCM_BASE OMAP2420_PRCM_BASE -#define OMAP2_CM_BASE OMAP2420_CM_BASE -#define OMAP2_PRM_BASE OMAP2420_PRM_BASE -#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) - -#elif defined(CONFIG_ARCH_OMAP2430) - -#define OMAP2_32KSYNCT_BASE OMAP2430_32KSYNCT_BASE -#define OMAP2_PRCM_BASE OMAP2430_PRCM_BASE -#define OMAP2_CM_BASE OMAP2430_CM_BASE -#define OMAP2_PRM_BASE OMAP2430_PRM_BASE -#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP24XX_IC_BASE) - -#endif - -#endif /* __ASM_ARCH_OMAP24XX_H */ - diff --git a/include/asm-arm/arch-omap/omap34xx.h b/include/asm-arm/arch-omap/omap34xx.h deleted file mode 100644 index aa30c6d..0000000 --- a/include/asm-arm/arch-omap/omap34xx.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * include/asm-arm/arch-omap/omap34xx.h - * - * This file contains the processor specific definitions of the TI OMAP34XX. - * - * Copyright (C) 2007 Texas Instruments. - * Copyright (C) 2007 Nokia Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_OMAP34XX_H -#define __ASM_ARCH_OMAP34XX_H - -/* - * Please place only base defines here and put the rest in device - * specific headers. - */ - -#define L4_34XX_BASE 0x48000000 -#define L4_WK_34XX_BASE 0x48300000 -#define L4_WK_OMAP_BASE L4_WK_34XX_BASE -#define L4_PER_34XX_BASE 0x49000000 -#define L4_PER_OMAP_BASE L4_PER_34XX_BASE -#define L4_EMU_34XX_BASE 0x54000000 -#define L4_EMU_BASE L4_EMU_34XX_BASE -#define L3_34XX_BASE 0x68000000 -#define L3_OMAP_BASE L3_34XX_BASE - -#define OMAP3430_32KSYNCT_BASE 0x48320000 -#define OMAP3430_CM_BASE 0x48004800 -#define OMAP3430_PRM_BASE 0x48306800 -#define OMAP343X_SMS_BASE 0x6C000000 -#define OMAP343X_SDRC_BASE 0x6D000000 -#define OMAP34XX_GPMC_BASE 0x6E000000 -#define OMAP343X_SCM_BASE 0x48002000 -#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE - -#define OMAP34XX_IC_BASE 0x48200000 -#define OMAP34XX_IVA_INTC_BASE 0x40000000 -#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) -#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) -#define OMAP34XX_USBTLL_BASE (L4_34XX_BASE + 0x62000) - - -#if defined(CONFIG_ARCH_OMAP3430) - -#define OMAP2_32KSYNCT_BASE OMAP3430_32KSYNCT_BASE -#define OMAP2_CM_BASE OMAP3430_CM_BASE -#define OMAP2_PRM_BASE OMAP3430_PRM_BASE -#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) - -#endif - -#define OMAP34XX_DSP_BASE 0x58000000 -#define OMAP34XX_DSP_MEM_BASE (OMAP34XX_DSP_BASE + 0x0) -#define OMAP34XX_DSP_IPI_BASE (OMAP34XX_DSP_BASE + 0x1000000) -#define OMAP34XX_DSP_MMU_BASE (OMAP34XX_DSP_BASE + 0x2000000) -#endif /* __ASM_ARCH_OMAP34XX_H */ - diff --git a/include/asm-arm/arch-omap/omap730.h b/include/asm-arm/arch-omap/omap730.h deleted file mode 100644 index 755b64c..0000000 --- a/include/asm-arm/arch-omap/omap730.h +++ /dev/null @@ -1,102 +0,0 @@ -/* linux/include/asm-arm/arch-omap/omap730.h - * - * Hardware definitions for TI OMAP730 processor. - * - * Cleanup for Linux-2.6 by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP730_H -#define __ASM_ARCH_OMAP730_H - -/* - * ---------------------------------------------------------------------------- - * Base addresses - * ---------------------------------------------------------------------------- - */ - -/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */ - -#define OMAP730_DSP_BASE 0xE0000000 -#define OMAP730_DSP_SIZE 0x50000 -#define OMAP730_DSP_START 0xE0000000 - -#define OMAP730_DSPREG_BASE 0xE1000000 -#define OMAP730_DSPREG_SIZE SZ_128K -#define OMAP730_DSPREG_START 0xE1000000 - -/* - * ---------------------------------------------------------------------------- - * OMAP730 specific configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP730_CONFIG_BASE 0xfffe1000 -#define OMAP730_IO_CONF_0 0xfffe1070 -#define OMAP730_IO_CONF_1 0xfffe1074 -#define OMAP730_IO_CONF_2 0xfffe1078 -#define OMAP730_IO_CONF_3 0xfffe107c -#define OMAP730_IO_CONF_4 0xfffe1080 -#define OMAP730_IO_CONF_5 0xfffe1084 -#define OMAP730_IO_CONF_6 0xfffe1088 -#define OMAP730_IO_CONF_7 0xfffe108c -#define OMAP730_IO_CONF_8 0xfffe1090 -#define OMAP730_IO_CONF_9 0xfffe1094 -#define OMAP730_IO_CONF_10 0xfffe1098 -#define OMAP730_IO_CONF_11 0xfffe109c -#define OMAP730_IO_CONF_12 0xfffe10a0 -#define OMAP730_IO_CONF_13 0xfffe10a4 - -#define OMAP730_MODE_1 0xfffe1010 -#define OMAP730_MODE_2 0xfffe1014 - -/* CSMI specials: in terms of base + offset */ -#define OMAP730_MODE2_OFFSET 0x14 - -/* - * ---------------------------------------------------------------------------- - * OMAP730 traffic controller configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP730_FLASH_CFG_0 0xfffecc10 -#define OMAP730_FLASH_ACFG_0 0xfffecc50 -#define OMAP730_FLASH_CFG_1 0xfffecc14 -#define OMAP730_FLASH_ACFG_1 0xfffecc54 - -/* - * ---------------------------------------------------------------------------- - * OMAP730 DSP control registers - * ---------------------------------------------------------------------------- - */ -#define OMAP730_ICR_BASE 0xfffbb800 -#define OMAP730_DSP_M_CTL 0xfffbb804 -#define OMAP730_DSP_MMU_BASE 0xfffed200 - -/* - * ---------------------------------------------------------------------------- - * OMAP730 PCC_UPLD configuration registers - * ---------------------------------------------------------------------------- - */ -#define OMAP730_PCC_UPLD_CTRL_BASE (0xfffe0900) -#define OMAP730_PCC_UPLD_CTRL (OMAP730_PCC_UPLD_CTRL_BASE + 0x00) - -#endif /* __ASM_ARCH_OMAP730_H */ - diff --git a/include/asm-arm/arch-omap/omapfb.h b/include/asm-arm/arch-omap/omapfb.h deleted file mode 100644 index 46d7a4f..0000000 --- a/include/asm-arm/arch-omap/omapfb.h +++ /dev/null @@ -1,395 +0,0 @@ -/* - * File: include/asm-arm/arch-omap/omapfb.h - * - * Framebuffer driver for TI OMAP boards - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __OMAPFB_H -#define __OMAPFB_H - -#include -#include - -/* IOCTL commands. */ - -#define OMAP_IOW(num, dtype) _IOW('O', num, dtype) -#define OMAP_IOR(num, dtype) _IOR('O', num, dtype) -#define OMAP_IOWR(num, dtype) _IOWR('O', num, dtype) -#define OMAP_IO(num) _IO('O', num) - -#define OMAPFB_MIRROR OMAP_IOW(31, int) -#define OMAPFB_SYNC_GFX OMAP_IO(37) -#define OMAPFB_VSYNC OMAP_IO(38) -#define OMAPFB_SET_UPDATE_MODE OMAP_IOW(40, int) -#define OMAPFB_GET_CAPS OMAP_IOR(42, struct omapfb_caps) -#define OMAPFB_GET_UPDATE_MODE OMAP_IOW(43, int) -#define OMAPFB_LCD_TEST OMAP_IOW(45, int) -#define OMAPFB_CTRL_TEST OMAP_IOW(46, int) -#define OMAPFB_UPDATE_WINDOW_OLD OMAP_IOW(47, struct omapfb_update_window_old) -#define OMAPFB_SET_COLOR_KEY OMAP_IOW(50, struct omapfb_color_key) -#define OMAPFB_GET_COLOR_KEY OMAP_IOW(51, struct omapfb_color_key) -#define OMAPFB_SETUP_PLANE OMAP_IOW(52, struct omapfb_plane_info) -#define OMAPFB_QUERY_PLANE OMAP_IOW(53, struct omapfb_plane_info) -#define OMAPFB_UPDATE_WINDOW OMAP_IOW(54, struct omapfb_update_window) -#define OMAPFB_SETUP_MEM OMAP_IOW(55, struct omapfb_mem_info) -#define OMAPFB_QUERY_MEM OMAP_IOW(56, struct omapfb_mem_info) - -#define OMAPFB_CAPS_GENERIC_MASK 0x00000fff -#define OMAPFB_CAPS_LCDC_MASK 0x00fff000 -#define OMAPFB_CAPS_PANEL_MASK 0xff000000 - -#define OMAPFB_CAPS_MANUAL_UPDATE 0x00001000 -#define OMAPFB_CAPS_TEARSYNC 0x00002000 -#define OMAPFB_CAPS_PLANE_RELOCATE_MEM 0x00004000 -#define OMAPFB_CAPS_PLANE_SCALE 0x00008000 -#define OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE 0x00010000 -#define OMAPFB_CAPS_WINDOW_SCALE 0x00020000 -#define OMAPFB_CAPS_WINDOW_OVERLAY 0x00040000 -#define OMAPFB_CAPS_SET_BACKLIGHT 0x01000000 - -/* Values from DSP must map to lower 16-bits */ -#define OMAPFB_FORMAT_MASK 0x00ff -#define OMAPFB_FORMAT_FLAG_DOUBLE 0x0100 -#define OMAPFB_FORMAT_FLAG_TEARSYNC 0x0200 -#define OMAPFB_FORMAT_FLAG_FORCE_VSYNC 0x0400 -#define OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY 0x0800 -#define OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY 0x1000 - -#define OMAPFB_EVENT_READY 1 -#define OMAPFB_EVENT_DISABLED 2 - -#define OMAPFB_MEMTYPE_SDRAM 0 -#define OMAPFB_MEMTYPE_SRAM 1 -#define OMAPFB_MEMTYPE_MAX 1 - -enum omapfb_color_format { - OMAPFB_COLOR_RGB565 = 0, - OMAPFB_COLOR_YUV422, - OMAPFB_COLOR_YUV420, - OMAPFB_COLOR_CLUT_8BPP, - OMAPFB_COLOR_CLUT_4BPP, - OMAPFB_COLOR_CLUT_2BPP, - OMAPFB_COLOR_CLUT_1BPP, - OMAPFB_COLOR_RGB444, - OMAPFB_COLOR_YUY422, -}; - -struct omapfb_update_window { - __u32 x, y; - __u32 width, height; - __u32 format; - __u32 out_x, out_y; - __u32 out_width, out_height; - __u32 reserved[8]; -}; - -struct omapfb_update_window_old { - __u32 x, y; - __u32 width, height; - __u32 format; -}; - -enum omapfb_plane { - OMAPFB_PLANE_GFX = 0, - OMAPFB_PLANE_VID1, - OMAPFB_PLANE_VID2, -}; - -enum omapfb_channel_out { - OMAPFB_CHANNEL_OUT_LCD = 0, - OMAPFB_CHANNEL_OUT_DIGIT, -}; - -struct omapfb_plane_info { - __u32 pos_x; - __u32 pos_y; - __u8 enabled; - __u8 channel_out; - __u8 mirror; - __u8 reserved1; - __u32 out_width; - __u32 out_height; - __u32 reserved2[12]; -}; - -struct omapfb_mem_info { - __u32 size; - __u8 type; - __u8 reserved[3]; -}; - -struct omapfb_caps { - __u32 ctrl; - __u32 plane_color; - __u32 wnd_color; -}; - -enum omapfb_color_key_type { - OMAPFB_COLOR_KEY_DISABLED = 0, - OMAPFB_COLOR_KEY_GFX_DST, - OMAPFB_COLOR_KEY_VID_SRC, -}; - -struct omapfb_color_key { - __u8 channel_out; - __u32 background; - __u32 trans_key; - __u8 key_type; -}; - -enum omapfb_update_mode { - OMAPFB_UPDATE_DISABLED = 0, - OMAPFB_AUTO_UPDATE, - OMAPFB_MANUAL_UPDATE -}; - -#ifdef __KERNEL__ - -#include -#include -#include -#include - -#include - -#define OMAP_LCDC_INV_VSYNC 0x0001 -#define OMAP_LCDC_INV_HSYNC 0x0002 -#define OMAP_LCDC_INV_PIX_CLOCK 0x0004 -#define OMAP_LCDC_INV_OUTPUT_EN 0x0008 -#define OMAP_LCDC_HSVS_RISING_EDGE 0x0010 -#define OMAP_LCDC_HSVS_OPPOSITE 0x0020 - -#define OMAP_LCDC_SIGNAL_MASK 0x003f - -#define OMAP_LCDC_PANEL_TFT 0x0100 - -#define OMAPFB_PLANE_XRES_MIN 8 -#define OMAPFB_PLANE_YRES_MIN 8 - -#ifdef CONFIG_ARCH_OMAP1 -#define OMAPFB_PLANE_NUM 1 -#else -#define OMAPFB_PLANE_NUM 3 -#endif - -struct omapfb_device; - -struct lcd_panel { - const char *name; - int config; /* TFT/STN, signal inversion */ - int bpp; /* Pixel format in fb mem */ - int data_lines; /* Lines on LCD HW interface */ - - int x_res, y_res; - int pixel_clock; /* In kHz */ - int hsw; /* Horizontal synchronization - pulse width */ - int hfp; /* Horizontal front porch */ - int hbp; /* Horizontal back porch */ - int vsw; /* Vertical synchronization - pulse width */ - int vfp; /* Vertical front porch */ - int vbp; /* Vertical back porch */ - int acb; /* ac-bias pin frequency */ - int pcd; /* pixel clock divider. - Obsolete use pixel_clock instead */ - - int (*init) (struct lcd_panel *panel, - struct omapfb_device *fbdev); - void (*cleanup) (struct lcd_panel *panel); - int (*enable) (struct lcd_panel *panel); - void (*disable) (struct lcd_panel *panel); - unsigned long (*get_caps) (struct lcd_panel *panel); - int (*set_bklight_level)(struct lcd_panel *panel, - unsigned int level); - unsigned int (*get_bklight_level)(struct lcd_panel *panel); - unsigned int (*get_bklight_max) (struct lcd_panel *panel); - int (*run_test) (struct lcd_panel *panel, int test_num); -}; - -struct extif_timings { - int cs_on_time; - int cs_off_time; - int we_on_time; - int we_off_time; - int re_on_time; - int re_off_time; - int we_cycle_time; - int re_cycle_time; - int cs_pulse_width; - int access_time; - - int clk_div; - - u32 tim[5]; /* set by extif->convert_timings */ - - int converted; -}; - -struct lcd_ctrl_extif { - int (*init) (struct omapfb_device *fbdev); - void (*cleanup) (void); - void (*get_clk_info) (u32 *clk_period, u32 *max_clk_div); - unsigned long (*get_max_tx_rate)(void); - int (*convert_timings) (struct extif_timings *timings); - void (*set_timings) (const struct extif_timings *timings); - void (*set_bits_per_cycle)(int bpc); - void (*write_command) (const void *buf, unsigned int len); - void (*read_data) (void *buf, unsigned int len); - void (*write_data) (const void *buf, unsigned int len); - void (*transfer_area) (int width, int height, - void (callback)(void * data), void *data); - int (*setup_tearsync) (unsigned pin_cnt, - unsigned hs_pulse_time, unsigned vs_pulse_time, - int hs_pol_inv, int vs_pol_inv, int div); - int (*enable_tearsync) (int enable, unsigned line); - - unsigned long max_transmit_size; -}; - -struct omapfb_notifier_block { - struct notifier_block nb; - void *data; - int plane_idx; -}; - -typedef int (*omapfb_notifier_callback_t)(struct notifier_block *, - unsigned long event, - void *fbi); - -struct omapfb_mem_region { - dma_addr_t paddr; - void *vaddr; - unsigned long size; - u8 type; /* OMAPFB_PLANE_MEM_* */ - unsigned alloc:1; /* allocated by the driver */ - unsigned map:1; /* kernel mapped by the driver */ -}; - -struct omapfb_mem_desc { - int region_cnt; - struct omapfb_mem_region region[OMAPFB_PLANE_NUM]; -}; - -struct lcd_ctrl { - const char *name; - void *data; - - int (*init) (struct omapfb_device *fbdev, - int ext_mode, - struct omapfb_mem_desc *req_md); - void (*cleanup) (void); - void (*bind_client) (struct omapfb_notifier_block *nb); - void (*get_caps) (int plane, struct omapfb_caps *caps); - int (*set_update_mode)(enum omapfb_update_mode mode); - enum omapfb_update_mode (*get_update_mode)(void); - int (*setup_plane) (int plane, int channel_out, - unsigned long offset, - int screen_width, - int pos_x, int pos_y, int width, - int height, int color_mode); - int (*setup_mem) (int plane, size_t size, - int mem_type, unsigned long *paddr); - int (*mmap) (struct fb_info *info, - struct vm_area_struct *vma); - int (*set_scale) (int plane, - int orig_width, int orig_height, - int out_width, int out_height); - int (*enable_plane) (int plane, int enable); - int (*update_window) (struct fb_info *fbi, - struct omapfb_update_window *win, - void (*callback)(void *), - void *callback_data); - void (*sync) (void); - void (*suspend) (void); - void (*resume) (void); - int (*run_test) (int test_num); - int (*setcolreg) (u_int regno, u16 red, u16 green, - u16 blue, u16 transp, - int update_hw_mem); - int (*set_color_key) (struct omapfb_color_key *ck); - int (*get_color_key) (struct omapfb_color_key *ck); -}; - -enum omapfb_state { - OMAPFB_DISABLED = 0, - OMAPFB_SUSPENDED= 99, - OMAPFB_ACTIVE = 100 -}; - -struct omapfb_plane_struct { - int idx; - struct omapfb_plane_info info; - enum omapfb_color_format color_mode; - struct omapfb_device *fbdev; -}; - -struct omapfb_device { - int state; - int ext_lcdc; /* Using external - LCD controller */ - struct mutex rqueue_mutex; - - int palette_size; - u32 pseudo_palette[17]; - - struct lcd_panel *panel; /* LCD panel */ - struct lcd_ctrl *ctrl; /* LCD controller */ - struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ - struct lcd_ctrl_extif *ext_if; /* LCD ctrl external - interface */ - struct device *dev; - struct fb_var_screeninfo new_var; /* for mode changes */ - - struct omapfb_mem_desc mem_desc; - struct fb_info *fb_info[OMAPFB_PLANE_NUM]; -}; - -struct omapfb_platform_data { - struct omap_lcd_config lcd; - struct omapfb_mem_desc mem_desc; - void *ctrl_platform_data; -}; - -#ifdef CONFIG_ARCH_OMAP1 -extern struct lcd_ctrl omap1_lcd_ctrl; -#else -extern struct lcd_ctrl omap2_disp_ctrl; -#endif - -extern void omapfb_register_panel(struct lcd_panel *panel); -extern void omapfb_write_first_pixel(struct omapfb_device *fbdev, u16 pixval); -extern void omapfb_notify_clients(struct omapfb_device *fbdev, - unsigned long event); -extern int omapfb_register_client(struct omapfb_notifier_block *nb, - omapfb_notifier_callback_t callback, - void *callback_data); -extern int omapfb_unregister_client(struct omapfb_notifier_block *nb); -extern int omapfb_update_window_async(struct fb_info *fbi, - struct omapfb_update_window *win, - void (*callback)(void *), - void *callback_data); - -/* in arch/arm/plat-omap/fb.c */ -extern void omapfb_set_ctrl_platform_data(void *pdata); - -#endif /* __KERNEL__ */ - -#endif /* __OMAPFB_H */ diff --git a/include/asm-arm/arch-omap/onenand.h b/include/asm-arm/arch-omap/onenand.h deleted file mode 100644 index 6c959d0ce..0000000 --- a/include/asm-arm/arch-omap/onenand.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-arm/arch-omap/onenand.h - * - * Copyright (C) 2006 Nokia Corporation - * Author: Juha Yrjola - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -struct omap_onenand_platform_data { - int cs; - int gpio_irq; - struct mtd_partition *parts; - int nr_parts; - int (*onenand_setup)(void __iomem *); - int dma_channel; -}; diff --git a/include/asm-arm/arch-omap/param.h b/include/asm-arm/arch-omap/param.h deleted file mode 100644 index face9ad..0000000 --- a/include/asm-arm/arch-omap/param.h +++ /dev/null @@ -1,8 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/param.h - * - */ - -#ifdef CONFIG_OMAP_32K_TIMER_HZ -#define HZ CONFIG_OMAP_32K_TIMER_HZ -#endif diff --git a/include/asm-arm/arch-omap/pm.h b/include/asm-arm/arch-omap/pm.h deleted file mode 100644 index 1458805..0000000 --- a/include/asm-arm/arch-omap/pm.h +++ /dev/null @@ -1,356 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/pm.h - * - * Header file for OMAP Power Management Routines - * - * Author: MontaVista Software, Inc. - * support@mvista.com - * - * Copyright 2002 MontaVista Software Inc. - * - * Cleanup 2004 for Linux 2.6 by Dirk Behme - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __ASM_ARCH_OMAP_PM_H -#define __ASM_ARCH_OMAP_PM_H - -/* - * ---------------------------------------------------------------------------- - * Register and offset definitions to be used in PM assembler code - * ---------------------------------------------------------------------------- - */ -#define CLKGEN_REG_ASM_BASE io_p2v(0xfffece00) -#define ARM_IDLECT1_ASM_OFFSET 0x04 -#define ARM_IDLECT2_ASM_OFFSET 0x08 - -#define TCMIF_ASM_BASE io_p2v(0xfffecc00) -#define EMIFS_CONFIG_ASM_OFFSET 0x0c -#define EMIFF_SDRAM_CONFIG_ASM_OFFSET 0x20 - -/* - * ---------------------------------------------------------------------------- - * Power management bitmasks - * ---------------------------------------------------------------------------- - */ -#define IDLE_WAIT_CYCLES 0x00000fff -#define PERIPHERAL_ENABLE 0x2 - -#define SELF_REFRESH_MODE 0x0c000001 -#define IDLE_EMIFS_REQUEST 0xc -#define MODEM_32K_EN 0x1 -#define PER_EN 0x1 - -#define CPU_SUSPEND_SIZE 200 -#define ULPD_LOW_PWR_EN 0x0001 -#define ULPD_DEEP_SLEEP_TRANSITION_EN 0x0010 -#define ULPD_SETUP_ANALOG_CELL_3_VAL 0 -#define ULPD_POWER_CTRL_REG_VAL 0x0219 - -#define DSP_IDLE_DELAY 10 -#define DSP_IDLE 0x0040 -#define DSP_RST 0x0004 -#define DSP_ENABLE 0x0002 -#define SUFFICIENT_DSP_RESET_TIME 1000 -#define DEFAULT_MPUI_CONFIG 0x05cf -#define ENABLE_XORCLK 0x2 -#define DSP_CLOCK_ENABLE 0x2000 -#define DSP_IDLE_MODE 0x2 -#define TC_IDLE_REQUEST (0x0000000c) - -#define IRQ_LEVEL2 (1<<0) -#define IRQ_KEYBOARD (1<<1) -#define IRQ_UART2 (1<<15) - -#define PDE_BIT 0x08 -#define PWD_EN_BIT 0x04 -#define EN_PERCK_BIT 0x04 - -#define OMAP1510_DEEP_SLEEP_REQUEST 0x0ec7 -#define OMAP1510_BIG_SLEEP_REQUEST 0x0cc5 -#define OMAP1510_IDLE_LOOP_REQUEST 0x0c00 -#define OMAP1510_IDLE_CLOCK_DOMAINS 0x2 - -/* Both big sleep and deep sleep use same values. Difference is in ULPD. */ -#define OMAP1610_IDLECT1_SLEEP_VAL 0x13c7 -#define OMAP1610_IDLECT2_SLEEP_VAL 0x09c7 -#define OMAP1610_IDLECT3_VAL 0x3f -#define OMAP1610_IDLECT3_SLEEP_ORMASK 0x2c -#define OMAP1610_IDLECT3 0xfffece24 -#define OMAP1610_IDLE_LOOP_REQUEST 0x0400 - -#define OMAP730_IDLECT1_SLEEP_VAL 0x16c7 -#define OMAP730_IDLECT2_SLEEP_VAL 0x09c7 -#define OMAP730_IDLECT3_VAL 0x3f -#define OMAP730_IDLECT3 0xfffece24 -#define OMAP730_IDLE_LOOP_REQUEST 0x0C00 - -#if !defined(CONFIG_ARCH_OMAP730) && \ - !defined(CONFIG_ARCH_OMAP15XX) && \ - !defined(CONFIG_ARCH_OMAP16XX) && \ - !defined(CONFIG_ARCH_OMAP24XX) -#error "Power management for this processor not implemented yet" -#endif - -#ifndef __ASSEMBLER__ - -#include - -extern void prevent_idle_sleep(void); -extern void allow_idle_sleep(void); - -/** - * clk_deny_idle - Prevents the clock from being idled during MPU idle - * @clk: clock signal handle - */ -void clk_deny_idle(struct clk *clk); - -/** - * clk_allow_idle - Counters previous clk_deny_idle - * @clk: clock signal handle - */ -void clk_deny_idle(struct clk *clk); - -extern void omap_pm_idle(void); -extern void omap_pm_suspend(void); -extern void omap730_cpu_suspend(unsigned short, unsigned short); -extern void omap1510_cpu_suspend(unsigned short, unsigned short); -extern void omap1610_cpu_suspend(unsigned short, unsigned short); -extern void omap24xx_cpu_suspend(u32 dll_ctrl, u32 cpu_revision); -extern void omap730_idle_loop_suspend(void); -extern void omap1510_idle_loop_suspend(void); -extern void omap1610_idle_loop_suspend(void); -extern void omap24xx_idle_loop_suspend(void); - -extern unsigned int omap730_cpu_suspend_sz; -extern unsigned int omap1510_cpu_suspend_sz; -extern unsigned int omap1610_cpu_suspend_sz; -extern unsigned int omap24xx_cpu_suspend_sz; -extern unsigned int omap730_idle_loop_suspend_sz; -extern unsigned int omap1510_idle_loop_suspend_sz; -extern unsigned int omap1610_idle_loop_suspend_sz; -extern unsigned int omap24xx_idle_loop_suspend_sz; - -#ifdef CONFIG_OMAP_SERIAL_WAKE -extern void omap_serial_wake_trigger(int enable); -#else -#define omap_serial_wakeup_init() {} -#define omap_serial_wake_trigger(x) {} -#endif /* CONFIG_OMAP_SERIAL_WAKE */ - -#define ARM_SAVE(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] = omap_readl(x) -#define ARM_RESTORE(x) omap_writel((arm_sleep_save[ARM_SLEEP_SAVE_##x]), (x)) -#define ARM_SHOW(x) arm_sleep_save[ARM_SLEEP_SAVE_##x] - -#define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x) -#define DSP_RESTORE(x) __raw_writew((dsp_sleep_save[DSP_SLEEP_SAVE_##x]), (x)) -#define DSP_SHOW(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] - -#define ULPD_SAVE(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] = omap_readw(x) -#define ULPD_RESTORE(x) omap_writew((ulpd_sleep_save[ULPD_SLEEP_SAVE_##x]), (x)) -#define ULPD_SHOW(x) ulpd_sleep_save[ULPD_SLEEP_SAVE_##x] - -#define MPUI730_SAVE(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] = omap_readl(x) -#define MPUI730_RESTORE(x) omap_writel((mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x]), (x)) -#define MPUI730_SHOW(x) mpui730_sleep_save[MPUI730_SLEEP_SAVE_##x] - -#define MPUI1510_SAVE(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] = omap_readl(x) -#define MPUI1510_RESTORE(x) omap_writel((mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x]), (x)) -#define MPUI1510_SHOW(x) mpui1510_sleep_save[MPUI1510_SLEEP_SAVE_##x] - -#define MPUI1610_SAVE(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] = omap_readl(x) -#define MPUI1610_RESTORE(x) omap_writel((mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x]), (x)) -#define MPUI1610_SHOW(x) mpui1610_sleep_save[MPUI1610_SLEEP_SAVE_##x] - -#define OMAP24XX_SAVE(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] = x -#define OMAP24XX_RESTORE(x) x = omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] -#define OMAP24XX_SHOW(x) omap24xx_sleep_save[OMAP24XX_SLEEP_SAVE_##x] - -/* - * List of global OMAP registers to preserve. - * More ones like CP and general purpose register values are preserved - * with the stack pointer in sleep.S. - */ - -enum arm_save_state { - ARM_SLEEP_SAVE_START = 0, - /* - * MPU control registers 32 bits - */ - ARM_SLEEP_SAVE_ARM_CKCTL, - ARM_SLEEP_SAVE_ARM_IDLECT1, - ARM_SLEEP_SAVE_ARM_IDLECT2, - ARM_SLEEP_SAVE_ARM_IDLECT3, - ARM_SLEEP_SAVE_ARM_EWUPCT, - ARM_SLEEP_SAVE_ARM_RSTCT1, - ARM_SLEEP_SAVE_ARM_RSTCT2, - ARM_SLEEP_SAVE_ARM_SYSST, - ARM_SLEEP_SAVE_SIZE -}; - -enum dsp_save_state { - DSP_SLEEP_SAVE_START = 0, - /* - * DSP registers 16 bits - */ - DSP_SLEEP_SAVE_DSP_IDLECT2, - DSP_SLEEP_SAVE_SIZE -}; - -enum ulpd_save_state { - ULPD_SLEEP_SAVE_START = 0, - /* - * ULPD registers 16 bits - */ - ULPD_SLEEP_SAVE_ULPD_IT_STATUS, - ULPD_SLEEP_SAVE_ULPD_CLOCK_CTRL, - ULPD_SLEEP_SAVE_ULPD_SOFT_REQ, - ULPD_SLEEP_SAVE_ULPD_STATUS_REQ, - ULPD_SLEEP_SAVE_ULPD_DPLL_CTRL, - ULPD_SLEEP_SAVE_ULPD_POWER_CTRL, - ULPD_SLEEP_SAVE_SIZE -}; - -enum mpui1510_save_state { - MPUI1510_SLEEP_SAVE_START = 0, - /* - * MPUI registers 32 bits - */ - MPUI1510_SLEEP_SAVE_MPUI_CTRL, - MPUI1510_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, - MPUI1510_SLEEP_SAVE_MPUI_DSP_API_CONFIG, - MPUI1510_SLEEP_SAVE_MPUI_DSP_STATUS, - MPUI1510_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, - MPUI1510_SLEEP_SAVE_EMIFS_CONFIG, - MPUI1510_SLEEP_SAVE_OMAP_IH1_MIR, - MPUI1510_SLEEP_SAVE_OMAP_IH2_MIR, -#if defined(CONFIG_ARCH_OMAP15XX) - MPUI1510_SLEEP_SAVE_SIZE -#else - MPUI1510_SLEEP_SAVE_SIZE = 0 -#endif -}; - -enum mpui730_save_state { - MPUI730_SLEEP_SAVE_START = 0, - /* - * MPUI registers 32 bits - */ - MPUI730_SLEEP_SAVE_MPUI_CTRL, - MPUI730_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, - MPUI730_SLEEP_SAVE_MPUI_DSP_API_CONFIG, - MPUI730_SLEEP_SAVE_MPUI_DSP_STATUS, - MPUI730_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, - MPUI730_SLEEP_SAVE_EMIFS_CONFIG, - MPUI730_SLEEP_SAVE_OMAP_IH1_MIR, - MPUI730_SLEEP_SAVE_OMAP_IH2_0_MIR, - MPUI730_SLEEP_SAVE_OMAP_IH2_1_MIR, -#if defined(CONFIG_ARCH_OMAP730) - MPUI730_SLEEP_SAVE_SIZE -#else - MPUI730_SLEEP_SAVE_SIZE = 0 -#endif -}; - -enum mpui1610_save_state { - MPUI1610_SLEEP_SAVE_START = 0, - /* - * MPUI registers 32 bits - */ - MPUI1610_SLEEP_SAVE_MPUI_CTRL, - MPUI1610_SLEEP_SAVE_MPUI_DSP_BOOT_CONFIG, - MPUI1610_SLEEP_SAVE_MPUI_DSP_API_CONFIG, - MPUI1610_SLEEP_SAVE_MPUI_DSP_STATUS, - MPUI1610_SLEEP_SAVE_EMIFF_SDRAM_CONFIG, - MPUI1610_SLEEP_SAVE_EMIFS_CONFIG, - MPUI1610_SLEEP_SAVE_OMAP_IH1_MIR, - MPUI1610_SLEEP_SAVE_OMAP_IH2_0_MIR, - MPUI1610_SLEEP_SAVE_OMAP_IH2_1_MIR, - MPUI1610_SLEEP_SAVE_OMAP_IH2_2_MIR, - MPUI1610_SLEEP_SAVE_OMAP_IH2_3_MIR, -#if defined(CONFIG_ARCH_OMAP16XX) - MPUI1610_SLEEP_SAVE_SIZE -#else - MPUI1610_SLEEP_SAVE_SIZE = 0 -#endif -}; - -enum omap24xx_save_state { - OMAP24XX_SLEEP_SAVE_START = 0, - OMAP24XX_SLEEP_SAVE_INTC_MIR0, - OMAP24XX_SLEEP_SAVE_INTC_MIR1, - OMAP24XX_SLEEP_SAVE_INTC_MIR2, - - OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MPU, - OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_CORE, - OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_GFX, - OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_DSP, - OMAP24XX_SLEEP_SAVE_CM_CLKSTCTRL_MDM, - - OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MPU, - OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_CORE, - OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_GFX, - OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_DSP, - OMAP24XX_SLEEP_SAVE_PM_PWSTCTRL_MDM, - - OMAP24XX_SLEEP_SAVE_CM_IDLEST1_CORE, - OMAP24XX_SLEEP_SAVE_CM_IDLEST2_CORE, - OMAP24XX_SLEEP_SAVE_CM_IDLEST3_CORE, - OMAP24XX_SLEEP_SAVE_CM_IDLEST4_CORE, - OMAP24XX_SLEEP_SAVE_CM_IDLEST_GFX, - OMAP24XX_SLEEP_SAVE_CM_IDLEST_WKUP, - OMAP24XX_SLEEP_SAVE_CM_IDLEST_CKGEN, - OMAP24XX_SLEEP_SAVE_CM_IDLEST_DSP, - OMAP24XX_SLEEP_SAVE_CM_IDLEST_MDM, - - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE1_CORE, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE2_CORE, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE3_CORE, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE4_CORE, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_WKUP, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_PLL, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_DSP, - OMAP24XX_SLEEP_SAVE_CM_AUTOIDLE_MDM, - - OMAP24XX_SLEEP_SAVE_CM_FCLKEN1_CORE, - OMAP24XX_SLEEP_SAVE_CM_FCLKEN2_CORE, - OMAP24XX_SLEEP_SAVE_CM_ICLKEN1_CORE, - OMAP24XX_SLEEP_SAVE_CM_ICLKEN2_CORE, - OMAP24XX_SLEEP_SAVE_CM_ICLKEN3_CORE, - OMAP24XX_SLEEP_SAVE_CM_ICLKEN4_CORE, - OMAP24XX_SLEEP_SAVE_GPIO1_IRQENABLE1, - OMAP24XX_SLEEP_SAVE_GPIO2_IRQENABLE1, - OMAP24XX_SLEEP_SAVE_GPIO3_IRQENABLE1, - OMAP24XX_SLEEP_SAVE_GPIO4_IRQENABLE1, - OMAP24XX_SLEEP_SAVE_GPIO3_OE, - OMAP24XX_SLEEP_SAVE_GPIO4_OE, - OMAP24XX_SLEEP_SAVE_GPIO3_RISINGDETECT, - OMAP24XX_SLEEP_SAVE_GPIO3_FALLINGDETECT, - OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SPI1_NCS2, - OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_MCBSP1_DX, - OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SSI1_FLAG_TX, - OMAP24XX_SLEEP_SAVE_CONTROL_PADCONF_SYS_NIRQW0, - OMAP24XX_SLEEP_SAVE_SIZE -}; - -#endif /* ASSEMBLER */ -#endif /* __ASM_ARCH_OMAP_PM_H */ diff --git a/include/asm-arm/arch-omap/prcm.h b/include/asm-arm/arch-omap/prcm.h deleted file mode 100644 index 7bcaf94..0000000 --- a/include/asm-arm/arch-omap/prcm.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/prcm.h - * - * Access definations for use in OMAP24XX clock and power management - * - * Copyright (C) 2005 Texas Instruments, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARM_ARCH_DPM_PRCM_H -#define __ASM_ARM_ARCH_DPM_PRCM_H - -u32 omap_prcm_get_reset_sources(void); - -#endif - - - - - diff --git a/include/asm-arm/arch-omap/sdrc.h b/include/asm-arm/arch-omap/sdrc.h deleted file mode 100644 index 673b396..0000000 --- a/include/asm-arm/arch-omap/sdrc.h +++ /dev/null @@ -1,75 +0,0 @@ -#ifndef ____ASM_ARCH_SDRC_H -#define ____ASM_ARCH_SDRC_H - -/* - * OMAP2/3 SDRC/SMS register definitions - * - * Copyright (C) 2007 Texas Instruments, Inc. - * Copyright (C) 2007 Nokia Corporation - * - * Written by Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include - -/* SDRC register offsets - read/write with sdrc_{read,write}_reg() */ - -#define SDRC_SYSCONFIG 0x010 -#define SDRC_DLLA_CTRL 0x060 -#define SDRC_DLLA_STATUS 0x064 -#define SDRC_DLLB_CTRL 0x068 -#define SDRC_DLLB_STATUS 0x06C -#define SDRC_POWER 0x070 -#define SDRC_MR_0 0x084 -#define SDRC_RFR_CTRL_0 0x0a4 - -/* - * These values represent the number of memory clock cycles between - * autorefresh initiation. They assume 1 refresh per 64 ms (JEDEC), 8192 - * rows per device, and include a subtraction of a 50 cycle window in the - * event that the autorefresh command is delayed due to other SDRC activity. - * The '| 1' sets the ARE field to send one autorefresh when the autorefresh - * counter reaches 0. - * - * These represent optimal values for common parts, it won't work for all. - * As long as you scale down, most parameters are still work, they just - * become sub-optimal. The RFR value goes in the opposite direction. If you - * don't adjust it down as your clock period increases the refresh interval - * will not be met. Setting all parameters for complete worst case may work, - * but may cut memory performance by 2x. Due to errata the DLLs need to be - * unlocked and their value needs run time calibration. A dynamic call is - * need for that as no single right value exists acorss production samples. - * - * Only the FULL speed values are given. Current code is such that rate - * changes must be made at DPLLoutx2. The actual value adjustment for low - * frequency operation will be handled by omap_set_performance() - * - * By having the boot loader boot up in the fastest L4 speed available likely - * will result in something which you can switch between. - */ -#define SDRC_RFR_CTRL_165MHz (0x00044c00 | 1) -#define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) -#define SDRC_RFR_CTRL_100MHz (0x0002da01 | 1) -#define SDRC_RFR_CTRL_110MHz (0x0002da01 | 1) /* Need to calc */ -#define SDRC_RFR_CTRL_BYPASS (0x00005000 | 1) /* Need to calc */ - - -/* - * SMS register access - */ - - -#define OMAP242X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg) -#define OMAP243X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg) -#define OMAP343X_SMS_REGADDR(reg) (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg) - -/* SMS register offsets - read/write with sms_{read,write}_reg() */ - -#define SMS_SYSCONFIG 0x010 -/* REVISIT: fill in other SMS registers here */ - -#endif diff --git a/include/asm-arm/arch-omap/serial.h b/include/asm-arm/arch-omap/serial.h deleted file mode 100644 index 79a5297..0000000 --- a/include/asm-arm/arch-omap/serial.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/serial.h - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_SERIAL_H -#define __ASM_ARCH_SERIAL_H - -#if defined(CONFIG_ARCH_OMAP1) -/* OMAP1 serial ports */ -#define OMAP_UART1_BASE 0xfffb0000 -#define OMAP_UART2_BASE 0xfffb0800 -#define OMAP_UART3_BASE 0xfffb9800 -#elif defined(CONFIG_ARCH_OMAP2) -/* OMAP2 serial ports */ -#define OMAP_UART1_BASE 0x4806a000 -#define OMAP_UART2_BASE 0x4806c000 -#define OMAP_UART3_BASE 0x4806e000 -#endif - -#define OMAP_MAX_NR_PORTS 3 -#define OMAP1510_BASE_BAUD (12000000/16) -#define OMAP16XX_BASE_BAUD (48000000/16) - -#define is_omap_port(p) ({int __ret = 0; \ - if (p == IO_ADDRESS(OMAP_UART1_BASE) || \ - p == IO_ADDRESS(OMAP_UART2_BASE) || \ - p == IO_ADDRESS(OMAP_UART3_BASE)) \ - __ret = 1; \ - __ret; \ - }) - -#endif diff --git a/include/asm-arm/arch-omap/sram.h b/include/asm-arm/arch-omap/sram.h deleted file mode 100644 index be59f4a..0000000 --- a/include/asm-arm/arch-omap/sram.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/sram.h - * - * Interface for functions that need to be run in internal SRAM - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ARCH_ARM_OMAP_SRAM_H -#define __ARCH_ARM_OMAP_SRAM_H - -extern int __init omap_sram_init(void); -extern void * omap_sram_push(void * start, unsigned long size); -extern void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl); - -extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); - -/* Do not use these */ -extern void omap1_sram_reprogram_clock(u32 ckctl, u32 dpllctl); -extern unsigned long omap1_sram_reprogram_clock_sz; - -extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl); -extern unsigned long omap24xx_sram_reprogram_clock_sz; - -extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern unsigned long omap242x_sram_ddr_init_sz; - -extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, - int bypass); -extern unsigned long omap242x_sram_set_prcm_sz; - -extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern unsigned long omap242x_sram_reprogram_sdrc_sz; - - -extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, - u32 base_cs, u32 force_unlock); -extern unsigned long omap243x_sram_ddr_init_sz; - -extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, - int bypass); -extern unsigned long omap243x_sram_set_prcm_sz; - -extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, - u32 mem_type); -extern unsigned long omap243x_sram_reprogram_sdrc_sz; - -#endif diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h deleted file mode 100644 index 176d9d6..0000000 --- a/include/asm-arm/arch-omap/system.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copied from linux/include/asm-arm/arch-sa1100/system.h - * Copyright (c) 1999 Nicolas Pitre - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H -#include - -#include -#include - -#ifndef CONFIG_MACH_VOICEBLUE -#define voiceblue_reset() do {} while (0) -#endif - -extern void omap_prcm_arch_reset(char mode); - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void omap1_arch_reset(char mode) -{ - /* - * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 - * "Global Software Reset Affects Traffic Controller Frequency". - */ - if (cpu_is_omap5912()) { - omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), - DPLL_CTL); - omap_writew(0x8, ARM_RSTCT1); - } - - if (machine_is_voiceblue()) - voiceblue_reset(); - else - omap_writew(1, ARM_RSTCT1); -} - -static inline void arch_reset(char mode) -{ - if (!cpu_is_omap24xx()) - omap1_arch_reset(mode); - else - omap_prcm_arch_reset(mode); -} - -#endif diff --git a/include/asm-arm/arch-omap/tc.h b/include/asm-arm/arch-omap/tc.h deleted file mode 100644 index 65a9c82..0000000 --- a/include/asm-arm/arch-omap/tc.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/tc.h - * - * OMAP Traffic Controller - * - * Copyright (C) 2004 Nokia Corporation - * Author: Imre Deak - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#ifndef __ASM_ARCH_TC_H -#define __ASM_ARCH_TC_H - -#define TCMIF_BASE 0xfffecc00 -#define OMAP_TC_OCPT1_PRIOR (TCMIF_BASE + 0x00) -#define OMAP_TC_EMIFS_PRIOR (TCMIF_BASE + 0x04) -#define OMAP_TC_EMIFF_PRIOR (TCMIF_BASE + 0x08) -#define EMIFS_CONFIG (TCMIF_BASE + 0x0c) -#define EMIFS_CS0_CONFIG (TCMIF_BASE + 0x10) -#define EMIFS_CS1_CONFIG (TCMIF_BASE + 0x14) -#define EMIFS_CS2_CONFIG (TCMIF_BASE + 0x18) -#define EMIFS_CS3_CONFIG (TCMIF_BASE + 0x1c) -#define EMIFF_SDRAM_CONFIG (TCMIF_BASE + 0x20) -#define EMIFF_MRS (TCMIF_BASE + 0x24) -#define TC_TIMEOUT1 (TCMIF_BASE + 0x28) -#define TC_TIMEOUT2 (TCMIF_BASE + 0x2c) -#define TC_TIMEOUT3 (TCMIF_BASE + 0x30) -#define TC_ENDIANISM (TCMIF_BASE + 0x34) -#define EMIFF_SDRAM_CONFIG_2 (TCMIF_BASE + 0x3c) -#define EMIF_CFG_DYNAMIC_WS (TCMIF_BASE + 0x40) -#define EMIFS_ACS0 (TCMIF_BASE + 0x50) -#define EMIFS_ACS1 (TCMIF_BASE + 0x54) -#define EMIFS_ACS2 (TCMIF_BASE + 0x58) -#define EMIFS_ACS3 (TCMIF_BASE + 0x5c) -#define OMAP_TC_OCPT2_PRIOR (TCMIF_BASE + 0xd0) - -/* external EMIFS chipselect regions */ -#define OMAP_CS0_PHYS 0x00000000 -#define OMAP_CS0_SIZE SZ_64M - -#define OMAP_CS1_PHYS 0x04000000 -#define OMAP_CS1_SIZE SZ_64M - -#define OMAP_CS1A_PHYS OMAP_CS1_PHYS -#define OMAP_CS1A_SIZE SZ_32M - -#define OMAP_CS1B_PHYS (OMAP_CS1A_PHYS + OMAP_CS1A_SIZE) -#define OMAP_CS1B_SIZE SZ_32M - -#define OMAP_CS2_PHYS 0x08000000 -#define OMAP_CS2_SIZE SZ_64M - -#define OMAP_CS2A_PHYS OMAP_CS2_PHYS -#define OMAP_CS2A_SIZE SZ_32M - -#define OMAP_CS2B_PHYS (OMAP_CS2A_PHYS + OMAP_CS2A_SIZE) -#define OMAP_CS2B_SIZE SZ_32M - -#define OMAP_CS3_PHYS 0x0c000000 -#define OMAP_CS3_SIZE SZ_64M - -#ifndef __ASSEMBLER__ - -/* EMIF Slow Interface Configuration Register */ -#define OMAP_EMIFS_CONFIG_FR (1 << 4) -#define OMAP_EMIFS_CONFIG_PDE (1 << 3) -#define OMAP_EMIFS_CONFIG_PWD_EN (1 << 2) -#define OMAP_EMIFS_CONFIG_BM (1 << 1) -#define OMAP_EMIFS_CONFIG_WP (1 << 0) - -#define EMIFS_CCS(n) (EMIFS_CS0_CONFIG + (4 * (n))) -#define EMIFS_ACS(n) (EMIFS_ACS0 + (4 * (n))) - -/* Almost all documentation for chip and board memory maps assumes - * BM is clear. Most devel boards have a switch to control booting - * from NOR flash (using external chipselect 3) rather than mask ROM, - * which uses BM to interchange the physical CS0 and CS3 addresses. - */ -static inline u32 omap_cs0_phys(void) -{ - return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) - ? OMAP_CS3_PHYS : 0; -} - -static inline u32 omap_cs3_phys(void) -{ - return (omap_readl(EMIFS_CONFIG) & OMAP_EMIFS_CONFIG_BM) - ? 0 : OMAP_CS3_PHYS; -} - -#endif /* __ASSEMBLER__ */ - -#endif /* __ASM_ARCH_TC_H */ diff --git a/include/asm-arm/arch-omap/timex.h b/include/asm-arm/arch-omap/timex.h deleted file mode 100644 index 21f2e36..0000000 --- a/include/asm-arm/arch-omap/timex.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/timex.h - * - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - * - * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED - * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN - * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON - * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#if !defined(__ASM_ARCH_OMAP_TIMEX_H) -#define __ASM_ARCH_OMAP_TIMEX_H - -/* - * OMAP 32KHz timer updates time one jiffie at a time from a secondary timer, - * and that's why the CLOCK_TICK_RATE is not 32768. - */ -#ifdef CONFIG_OMAP_32K_TIMER -#define CLOCK_TICK_RATE (CONFIG_OMAP_32K_TIMER_HZ) -#else -#define CLOCK_TICK_RATE (HZ * 100000UL) -#endif - -#endif /* __ASM_ARCH_OMAP_TIMEX_H */ diff --git a/include/asm-arm/arch-omap/uncompress.h b/include/asm-arm/arch-omap/uncompress.h deleted file mode 100644 index aca0adf..0000000 --- a/include/asm-arm/arch-omap/uncompress.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/uncompress.h - * - * Serial port stubs for kernel decompress status messages - * - * Initially based on: - * linux-2.4.15-rmk1-dsplinux1.6/include/asm-arm/arch-omap1510/uncompress.h - * Copyright (C) 2000 RidgeRun, Inc. - * Author: Greg Lonnon - * - * Rewritten by: - * Author: - * 2004 (c) MontaVista Software, Inc. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -#include -#include -#include - -unsigned int system_rev; - -#define UART_OMAP_MDR1 0x08 /* mode definition register */ -#define OMAP_ID_730 0x355F -#define ID_MASK 0x7fff -#define check_port(base, shift) ((base[UART_OMAP_MDR1 << shift] & 7) == 0) -#define omap_get_id() ((*(volatile unsigned int *)(0xfffed404)) >> 12) & ID_MASK - -static void putc(int c) -{ - volatile u8 * uart = 0; - int shift = 2; - -#ifdef CONFIG_MACH_OMAP_PALMTE - return; -#endif - -#ifdef CONFIG_ARCH_OMAP -#ifdef CONFIG_OMAP_LL_DEBUG_UART3 - uart = (volatile u8 *)(OMAP_UART3_BASE); -#elif defined(CONFIG_OMAP_LL_DEBUG_UART2) - uart = (volatile u8 *)(OMAP_UART2_BASE); -#else - uart = (volatile u8 *)(OMAP_UART1_BASE); -#endif - -#ifdef CONFIG_ARCH_OMAP1 - /* Determine which serial port to use */ - do { - /* MMU is not on, so cpu_is_omapXXXX() won't work here */ - unsigned int omap_id = omap_get_id(); - - if (omap_id == OMAP_ID_730) - shift = 0; - - if (check_port(uart, shift)) - break; - /* Silent boot if no serial ports are enabled. */ - return; - } while (0); -#endif /* CONFIG_ARCH_OMAP1 */ -#endif - - /* - * Now, xmit each character - */ - while (!(uart[UART_LSR << shift] & UART_LSR_THRE)) - barrier(); - uart[UART_TX << shift] = c; -} - -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-omap/usb.h b/include/asm-arm/arch-omap/usb.h deleted file mode 100644 index ddf1861..0000000 --- a/include/asm-arm/arch-omap/usb.h +++ /dev/null @@ -1,141 +0,0 @@ -// include/asm-arm/mach-omap/usb.h - -#ifndef __ASM_ARCH_OMAP_USB_H -#define __ASM_ARCH_OMAP_USB_H - -#include - -/*-------------------------------------------------------------------------*/ - -#define OMAP1_OTG_BASE 0xfffb0400 -#define OMAP1_UDC_BASE 0xfffb4000 -#define OMAP1_OHCI_BASE 0xfffba000 - -#define OMAP2_OHCI_BASE 0x4805e000 -#define OMAP2_UDC_BASE 0x4805e200 -#define OMAP2_OTG_BASE 0x4805e300 - -#ifdef CONFIG_ARCH_OMAP1 - -#define OTG_BASE OMAP1_OTG_BASE -#define UDC_BASE OMAP1_UDC_BASE -#define OMAP_OHCI_BASE OMAP1_OHCI_BASE - -#else - -#define OTG_BASE OMAP2_OTG_BASE -#define UDC_BASE OMAP2_UDC_BASE -#define OMAP_OHCI_BASE OMAP2_OHCI_BASE - -#endif - -/*-------------------------------------------------------------------------*/ - -/* - * OTG and transceiver registers, for OMAPs starting with ARM926 - */ -#define OTG_REV (OTG_BASE + 0x00) -#define OTG_SYSCON_1 (OTG_BASE + 0x04) -# define USB2_TRX_MODE(w) (((w)>>24)&0x07) -# define USB1_TRX_MODE(w) (((w)>>20)&0x07) -# define USB0_TRX_MODE(w) (((w)>>16)&0x07) -# define OTG_IDLE_EN (1 << 15) -# define HST_IDLE_EN (1 << 14) -# define DEV_IDLE_EN (1 << 13) -# define OTG_RESET_DONE (1 << 2) -# define OTG_SOFT_RESET (1 << 1) -#define OTG_SYSCON_2 (OTG_BASE + 0x08) -# define OTG_EN (1 << 31) -# define USBX_SYNCHRO (1 << 30) -# define OTG_MST16 (1 << 29) -# define SRP_GPDATA (1 << 28) -# define SRP_GPDVBUS (1 << 27) -# define SRP_GPUVBUS(w) (((w)>>24)&0x07) -# define A_WAIT_VRISE(w) (((w)>>20)&0x07) -# define B_ASE_BRST(w) (((w)>>16)&0x07) -# define SRP_DPW (1 << 14) -# define SRP_DATA (1 << 13) -# define SRP_VBUS (1 << 12) -# define OTG_PADEN (1 << 10) -# define HMC_PADEN (1 << 9) -# define UHOST_EN (1 << 8) -# define HMC_TLLSPEED (1 << 7) -# define HMC_TLLATTACH (1 << 6) -# define OTG_HMC(w) (((w)>>0)&0x3f) -#define OTG_CTRL (OTG_BASE + 0x0c) -# define OTG_USB2_EN (1 << 29) -# define OTG_USB2_DP (1 << 28) -# define OTG_USB2_DM (1 << 27) -# define OTG_USB1_EN (1 << 26) -# define OTG_USB1_DP (1 << 25) -# define OTG_USB1_DM (1 << 24) -# define OTG_USB0_EN (1 << 23) -# define OTG_USB0_DP (1 << 22) -# define OTG_USB0_DM (1 << 21) -# define OTG_ASESSVLD (1 << 20) -# define OTG_BSESSEND (1 << 19) -# define OTG_BSESSVLD (1 << 18) -# define OTG_VBUSVLD (1 << 17) -# define OTG_ID (1 << 16) -# define OTG_DRIVER_SEL (1 << 15) -# define OTG_A_SETB_HNPEN (1 << 12) -# define OTG_A_BUSREQ (1 << 11) -# define OTG_B_HNPEN (1 << 9) -# define OTG_B_BUSREQ (1 << 8) -# define OTG_BUSDROP (1 << 7) -# define OTG_PULLDOWN (1 << 5) -# define OTG_PULLUP (1 << 4) -# define OTG_DRV_VBUS (1 << 3) -# define OTG_PD_VBUS (1 << 2) -# define OTG_PU_VBUS (1 << 1) -# define OTG_PU_ID (1 << 0) -#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ -# define DRIVER_SWITCH (1 << 15) -# define A_VBUS_ERR (1 << 13) -# define A_REQ_TMROUT (1 << 12) -# define A_SRP_DETECT (1 << 11) -# define B_HNP_FAIL (1 << 10) -# define B_SRP_TMROUT (1 << 9) -# define B_SRP_DONE (1 << 8) -# define B_SRP_STARTED (1 << 7) -# define OPRT_CHG (1 << 0) -#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ - // same bits as in IRQ_EN -#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ -# define OTGVPD (1 << 14) -# define OTGVPU (1 << 13) -# define OTGPUID (1 << 12) -# define USB2VDR (1 << 10) -# define USB2PDEN (1 << 9) -# define USB2PUEN (1 << 8) -# define USB1VDR (1 << 6) -# define USB1PDEN (1 << 5) -# define USB1PUEN (1 << 4) -# define USB0VDR (1 << 2) -# define USB0PDEN (1 << 1) -# define USB0PUEN (1 << 0) -#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ -#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ - -/*-------------------------------------------------------------------------*/ - -/* OMAP1 */ -#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) -# define CONF_USB2_UNI_R (1 << 8) -# define CONF_USB1_UNI_R (1 << 7) -# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) -# define CONF_USB0_ISOLATE_R (1 << 3) -# define CONF_USB_PWRDN_DM_R (1 << 2) -# define CONF_USB_PWRDN_DP_R (1 << 1) - -/* OMAP2 */ -# define USB_UNIDIR 0x0 -# define USB_UNIDIR_TLL 0x1 -# define USB_BIDIR 0x2 -# define USB_BIDIR_TLL 0x3 -# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2))) -# define USBT2TLL5PI (1 << 17) -# define USB0PUENACTLOI (1 << 16) -# define USBSTANDBYCTRL (1 << 15) - -#endif /* __ASM_ARCH_OMAP_USB_H */ diff --git a/include/asm-arm/arch-omap/vmalloc.h b/include/asm-arm/arch-omap/vmalloc.h deleted file mode 100644 index 5b8bd8d..0000000 --- a/include/asm-arm/arch-omap/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-omap/vmalloc.h - * - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) - diff --git a/include/asm-arm/arch-orion5x/debug-macro.S b/include/asm-arm/arch-orion5x/debug-macro.S deleted file mode 100644 index 4f98f3b..0000000 --- a/include/asm-arm/arch-orion5x/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/debug-macro.S - * - * Debugging macro include header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - ldreq \rx, =ORION5X_REGS_PHYS_BASE - ldrne \rx, =ORION5X_REGS_VIRT_BASE - orr \rx, \rx, #0x00012000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-orion5x/dma.h b/include/asm-arm/arch-orion5x/dma.h deleted file mode 100644 index 40a8c17..0000000 --- a/include/asm-arm/arch-orion5x/dma.h +++ /dev/null @@ -1 +0,0 @@ -/* empty */ diff --git a/include/asm-arm/arch-orion5x/entry-macro.S b/include/asm-arm/arch-orion5x/entry-macro.S deleted file mode 100644 index d8ef54c..0000000 --- a/include/asm-arm/arch-orion5x/entry-macro.S +++ /dev/null @@ -1,31 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/entry-macro.S - * - * Low-level IRQ helper macros for Orion platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include - - .macro disable_fiq - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =MAIN_IRQ_CAUSE - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #0] @ main cause - ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask - mov \irqnr, #0 @ default irqnr - @ find cause bits that are unmasked - ands \irqstat, \irqstat, \tmp @ clear Z flag if any - clzne \irqnr, \irqstat @ calc irqnr - rsbne \irqnr, \irqnr, #31 - .endm diff --git a/include/asm-arm/arch-orion5x/gpio.h b/include/asm-arm/arch-orion5x/gpio.h deleted file mode 100644 index c85e498..0000000 --- a/include/asm-arm/arch-orion5x/gpio.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/gpio.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -extern int gpio_request(unsigned pin, const char *label); -extern void gpio_free(unsigned pin); -extern int gpio_direction_input(unsigned pin); -extern int gpio_direction_output(unsigned pin, int value); -extern int gpio_get_value(unsigned pin); -extern void gpio_set_value(unsigned pin, int value); -extern void orion5x_gpio_set_blink(unsigned pin, int blink); -extern void gpio_display(void); /* debug */ - -static inline int gpio_to_irq(int pin) -{ - return pin + IRQ_ORION5X_GPIO_START; -} - -static inline int irq_to_gpio(int irq) -{ - return irq - IRQ_ORION5X_GPIO_START; -} - -#include /* cansleep wrappers */ diff --git a/include/asm-arm/arch-orion5x/hardware.h b/include/asm-arm/arch-orion5x/hardware.h deleted file mode 100644 index 5d2d8e0..0000000 --- a/include/asm-arm/arch-orion5x/hardware.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/hardware.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include "orion5x.h" - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x00001000 -#define PCIBIOS_MIN_MEM 0x01000000 -#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE - - -#endif diff --git a/include/asm-arm/arch-orion5x/io.h b/include/asm-arm/arch-orion5x/io.h deleted file mode 100644 index 59f1bc9..0000000 --- a/include/asm-arm/arch-orion5x/io.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/io.h - * - * Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IO_H -#define __ASM_ARCH_IO_H - -#include "orion5x.h" - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem * -__arch_ioremap(unsigned long paddr, size_t size, unsigned int mtype) -{ - void __iomem *retval; - unsigned long offs = paddr - ORION5X_REGS_PHYS_BASE; - if (mtype == MT_DEVICE && size && offs < ORION5X_REGS_SIZE && - size <= ORION5X_REGS_SIZE && offs + size <= ORION5X_REGS_SIZE) { - retval = (void __iomem *)ORION5X_REGS_VIRT_BASE + offs; - } else { - retval = __arm_ioremap(paddr, size, mtype); - } - - return retval; -} - -static inline void -__arch_iounmap(void __iomem *addr) -{ - if (addr < (void __iomem *)ORION5X_REGS_VIRT_BASE || - addr >= (void __iomem *)(ORION5X_REGS_VIRT_BASE + ORION5X_REGS_SIZE)) - __iounmap(addr); -} - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} - -#define __arch_ioremap(p, s, m) __arch_ioremap(p, s, m) -#define __arch_iounmap(a) __arch_iounmap(a) -#define __io(a) __io(a) -#define __mem_pci(a) (a) - - -/***************************************************************************** - * Helpers to access Orion registers - ****************************************************************************/ -/* - * These are not preempt-safe. Locks, if needed, must be taken - * care of by the caller. - */ -#define orion5x_setbits(r, mask) writel(readl(r) | (mask), (r)) -#define orion5x_clrbits(r, mask) writel(readl(r) & ~(mask), (r)) - - -#endif diff --git a/include/asm-arm/arch-orion5x/irqs.h b/include/asm-arm/arch-orion5x/irqs.h deleted file mode 100644 index abdd61a..0000000 --- a/include/asm-arm/arch-orion5x/irqs.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/irqs.h - * - * IRQ definitions for Orion SoC - * - * Maintainer: Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include "orion5x.h" /* need GPIO_MAX */ - -/* - * Orion Main Interrupt Controller - */ -#define IRQ_ORION5X_BRIDGE 0 -#define IRQ_ORION5X_DOORBELL_H2C 1 -#define IRQ_ORION5X_DOORBELL_C2H 2 -#define IRQ_ORION5X_UART0 3 -#define IRQ_ORION5X_UART1 4 -#define IRQ_ORION5X_I2C 5 -#define IRQ_ORION5X_GPIO_0_7 6 -#define IRQ_ORION5X_GPIO_8_15 7 -#define IRQ_ORION5X_GPIO_16_23 8 -#define IRQ_ORION5X_GPIO_24_31 9 -#define IRQ_ORION5X_PCIE0_ERR 10 -#define IRQ_ORION5X_PCIE0_INT 11 -#define IRQ_ORION5X_USB1_CTRL 12 -#define IRQ_ORION5X_DEV_BUS_ERR 14 -#define IRQ_ORION5X_PCI_ERR 15 -#define IRQ_ORION5X_USB_BR_ERR 16 -#define IRQ_ORION5X_USB0_CTRL 17 -#define IRQ_ORION5X_ETH_RX 18 -#define IRQ_ORION5X_ETH_TX 19 -#define IRQ_ORION5X_ETH_MISC 20 -#define IRQ_ORION5X_ETH_SUM 21 -#define IRQ_ORION5X_ETH_ERR 22 -#define IRQ_ORION5X_IDMA_ERR 23 -#define IRQ_ORION5X_IDMA_0 24 -#define IRQ_ORION5X_IDMA_1 25 -#define IRQ_ORION5X_IDMA_2 26 -#define IRQ_ORION5X_IDMA_3 27 -#define IRQ_ORION5X_CESA 28 -#define IRQ_ORION5X_SATA 29 -#define IRQ_ORION5X_XOR0 30 -#define IRQ_ORION5X_XOR1 31 - -/* - * Orion General Purpose Pins - */ -#define IRQ_ORION5X_GPIO_START 32 -#define NR_GPIO_IRQS GPIO_MAX - -#define NR_IRQS (IRQ_ORION5X_GPIO_START + NR_GPIO_IRQS) - - -#endif diff --git a/include/asm-arm/arch-orion5x/memory.h b/include/asm-arm/arch-orion5x/memory.h deleted file mode 100644 index 80053a7..0000000 --- a/include/asm-arm/arch-orion5x/memory.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/memory.h - * - * Marvell Orion memory definitions - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x00000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - - -#endif diff --git a/include/asm-arm/arch-orion5x/orion5x.h b/include/asm-arm/arch-orion5x/orion5x.h deleted file mode 100644 index 10257f5..0000000 --- a/include/asm-arm/arch-orion5x/orion5x.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/orion5x.h - * - * Generic definitions of Orion SoC flavors: - * Orion-1, Orion-VoIP, Orion-NAS, and Orion-2. - * - * Maintainer: Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_ORION5X_H -#define __ASM_ARCH_ORION5X_H - -/***************************************************************************** - * Orion Address Maps - * - * phys - * e0000000 PCIe MEM space - * e8000000 PCI MEM space - * f0000000 PCIe WA space (Orion-1/Orion-NAS only) - * f1000000 on-chip peripheral registers - * f2000000 PCIe I/O space - * f2100000 PCI I/O space - * f4000000 device bus mappings (boot) - * fa000000 device bus mappings (cs0) - * fa800000 device bus mappings (cs2) - * fc000000 device bus mappings (cs0/cs1) - * - * virt phys size - * fdd00000 f1000000 1M on-chip peripheral registers - * fde00000 f2000000 1M PCIe I/O space - * fdf00000 f2100000 1M PCI I/O space - * fe000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) - ****************************************************************************/ -#define ORION5X_REGS_PHYS_BASE 0xf1000000 -#define ORION5X_REGS_VIRT_BASE 0xfdd00000 -#define ORION5X_REGS_SIZE SZ_1M - -#define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 -#define ORION5X_PCIE_IO_VIRT_BASE 0xfde00000 -#define ORION5X_PCIE_IO_BUS_BASE 0x00000000 -#define ORION5X_PCIE_IO_SIZE SZ_1M - -#define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 -#define ORION5X_PCI_IO_VIRT_BASE 0xfdf00000 -#define ORION5X_PCI_IO_BUS_BASE 0x00100000 -#define ORION5X_PCI_IO_SIZE SZ_1M - -/* Relevant only for Orion-1/Orion-NAS */ -#define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 -#define ORION5X_PCIE_WA_VIRT_BASE 0xfe000000 -#define ORION5X_PCIE_WA_SIZE SZ_16M - -#define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 -#define ORION5X_PCIE_MEM_SIZE SZ_128M - -#define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000 -#define ORION5X_PCI_MEM_SIZE SZ_128M - -/******************************************************************************* - * Supported Devices & Revisions - ******************************************************************************/ -/* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ -#define MV88F5181_DEV_ID 0x5181 -#define MV88F5181_REV_B1 3 -#define MV88F5181L_REV_A0 8 -#define MV88F5181L_REV_A1 9 -/* Orion-NAS (88F5182) */ -#define MV88F5182_DEV_ID 0x5182 -#define MV88F5182_REV_A2 2 -/* Orion-2 (88F5281) */ -#define MV88F5281_DEV_ID 0x5281 -#define MV88F5281_REV_D1 5 -#define MV88F5281_REV_D2 6 - -/******************************************************************************* - * Orion Registers Map - ******************************************************************************/ -#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) -#define ORION5X_DDR_REG(x) (ORION5X_DDR_VIRT_BASE | (x)) - -#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) -#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) -#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) -#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) -#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) - -#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) -#define ORION5X_BRIDGE_REG(x) (ORION5X_BRIDGE_VIRT_BASE | (x)) -#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) - -#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) -#define ORION5X_PCI_REG(x) (ORION5X_PCI_VIRT_BASE | (x)) - -#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000) -#define ORION5X_PCIE_REG(x) (ORION5X_PCIE_VIRT_BASE | (x)) - -#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000) -#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) -#define ORION5X_USB0_REG(x) (ORION5X_USB0_VIRT_BASE | (x)) - -#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) -#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) -#define ORION5X_ETH_REG(x) (ORION5X_ETH_VIRT_BASE | (x)) - -#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) -#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) -#define ORION5X_SATA_REG(x) (ORION5X_SATA_VIRT_BASE | (x)) - -#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) -#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) -#define ORION5X_USB1_REG(x) (ORION5X_USB1_VIRT_BASE | (x)) - -/******************************************************************************* - * Device Bus Registers - ******************************************************************************/ -#define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000) -#define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004) -#define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) -#define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) -#define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) -#define GPIO_OUT ORION5X_DEV_BUS_REG(0x100) -#define GPIO_IO_CONF ORION5X_DEV_BUS_REG(0x104) -#define GPIO_BLINK_EN ORION5X_DEV_BUS_REG(0x108) -#define GPIO_IN_POL ORION5X_DEV_BUS_REG(0x10c) -#define GPIO_DATA_IN ORION5X_DEV_BUS_REG(0x110) -#define GPIO_EDGE_CAUSE ORION5X_DEV_BUS_REG(0x114) -#define GPIO_EDGE_MASK ORION5X_DEV_BUS_REG(0x118) -#define GPIO_LEVEL_MASK ORION5X_DEV_BUS_REG(0x11c) -#define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c) -#define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460) -#define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464) -#define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c) -#define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) -#define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) -#define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) -#define GPIO_MAX 32 - -/*************************************************************************** - * Orion CPU Bridge Registers - **************************************************************************/ -#define CPU_CONF ORION5X_BRIDGE_REG(0x100) -#define CPU_CTRL ORION5X_BRIDGE_REG(0x104) -#define CPU_RESET_MASK ORION5X_BRIDGE_REG(0x108) -#define CPU_SOFT_RESET ORION5X_BRIDGE_REG(0x10c) -#define POWER_MNG_CTRL_REG ORION5X_BRIDGE_REG(0x11C) -#define BRIDGE_CAUSE ORION5X_BRIDGE_REG(0x110) -#define BRIDGE_MASK ORION5X_BRIDGE_REG(0x114) -#define BRIDGE_INT_TIMER0 0x0002 -#define BRIDGE_INT_TIMER1 0x0004 -#define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define MAIN_IRQ_CAUSE ORION5X_BRIDGE_REG(0x200) -#define MAIN_IRQ_MASK ORION5X_BRIDGE_REG(0x204) - - -#endif diff --git a/include/asm-arm/arch-orion5x/system.h b/include/asm-arm/arch-orion5x/system.h deleted file mode 100644 index 3f1d1e2..0000000 --- a/include/asm-arm/arch-orion5x/system.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/system.h - * - * Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - /* - * Enable and issue soft reset - */ - orion5x_setbits(CPU_RESET_MASK, (1 << 2)); - orion5x_setbits(CPU_SOFT_RESET, 1); -} - - -#endif diff --git a/include/asm-arm/arch-orion5x/timex.h b/include/asm-arm/arch-orion5x/timex.h deleted file mode 100644 index 31c568e..0000000 --- a/include/asm-arm/arch-orion5x/timex.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/timex.h - * - * Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#define CLOCK_TICK_RATE (100 * HZ) - -#define ORION5X_TCLK 166666667 diff --git a/include/asm-arm/arch-orion5x/uncompress.h b/include/asm-arm/arch-orion5x/uncompress.h deleted file mode 100644 index 7548ced..0000000 --- a/include/asm-arm/arch-orion5x/uncompress.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/uncompress.h - * - * Tzachi Perelstein - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include - -#define SERIAL_BASE ((unsigned char *)UART0_PHYS_BASE) - -static void putc(const char c) -{ - unsigned char *base = SERIAL_BASE; - int i; - - for (i = 0; i < 0x1000; i++) { - if (base[UART_LSR << 2] & UART_LSR_THRE) - break; - barrier(); - } - - base[UART_TX << 2] = c; -} - -static void flush(void) -{ - unsigned char *base = SERIAL_BASE; - unsigned char mask; - int i; - - mask = UART_LSR_TEMT | UART_LSR_THRE; - - for (i = 0; i < 0x1000; i++) { - if ((base[UART_LSR << 2] & mask) == mask) - break; - barrier(); - } -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-orion5x/vmalloc.h b/include/asm-arm/arch-orion5x/vmalloc.h deleted file mode 100644 index 2b3061e..0000000 --- a/include/asm-arm/arch-orion5x/vmalloc.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * include/asm-arm/arch-orion5x/vmalloc.h - */ - -#define VMALLOC_END 0xfd800000 diff --git a/include/asm-arm/arch-pnx4008/clock.h b/include/asm-arm/arch-pnx4008/clock.h deleted file mode 100644 index ce155e1..0000000 --- a/include/asm-arm/arch-pnx4008/clock.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/clock.h - * - * Clock control driver for PNX4008 - header file - * - * Authors: Vitaly Wool, Dmitry Chigirev - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __PNX4008_CLOCK_H__ -#define __PNX4008_CLOCK_H__ - -struct module; -struct clk; - -#define PWRMAN_VA_BASE IO_ADDRESS(PNX4008_PWRMAN_BASE) -#define HCLKDIVCTRL_REG (PWRMAN_VA_BASE + 0x40) -#define PWRCTRL_REG (PWRMAN_VA_BASE + 0x44) -#define PLLCTRL_REG (PWRMAN_VA_BASE + 0x48) -#define OSC13CTRL_REG (PWRMAN_VA_BASE + 0x4c) -#define SYSCLKCTRL_REG (PWRMAN_VA_BASE + 0x50) -#define HCLKPLLCTRL_REG (PWRMAN_VA_BASE + 0x58) -#define USBCTRL_REG (PWRMAN_VA_BASE + 0x64) -#define SDRAMCLKCTRL_REG (PWRMAN_VA_BASE + 0x68) -#define MSCTRL_REG (PWRMAN_VA_BASE + 0x80) -#define BTCLKCTRL (PWRMAN_VA_BASE + 0x84) -#define DUMCLKCTRL_REG (PWRMAN_VA_BASE + 0x90) -#define I2CCLKCTRL_REG (PWRMAN_VA_BASE + 0xac) -#define KEYCLKCTRL_REG (PWRMAN_VA_BASE + 0xb0) -#define TSCLKCTRL_REG (PWRMAN_VA_BASE + 0xb4) -#define PWMCLKCTRL_REG (PWRMAN_VA_BASE + 0xb8) -#define TIMCLKCTRL_REG (PWRMAN_VA_BASE + 0xbc) -#define SPICTRL_REG (PWRMAN_VA_BASE + 0xc4) -#define FLASHCLKCTRL_REG (PWRMAN_VA_BASE + 0xc8) -#define UART3CLK_REG (PWRMAN_VA_BASE + 0xd0) -#define UARTCLKCTRL_REG (PWRMAN_VA_BASE + 0xe4) -#define DMACLKCTRL_REG (PWRMAN_VA_BASE + 0xe8) -#define AUTOCLK_CTRL (PWRMAN_VA_BASE + 0xec) -#define JPEGCLKCTRL_REG (PWRMAN_VA_BASE + 0xfc) - -#define AUDIOCONFIG_VA_BASE IO_ADDRESS(PNX4008_AUDIOCONFIG_BASE) -#define DSPPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x60) -#define DSPCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x64) -#define AUDIOCLKCTRL_REG (AUDIOCONFIG_VA_BASE + 0x68) -#define AUDIOPLLCTRL_REG (AUDIOCONFIG_VA_BASE + 0x6C) - -#define USB_OTG_CLKCTRL_REG IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xff4) - -#define VFP9CLKCTRL_REG IO_ADDRESS(PNX4008_DEBUG_BASE) - -#define CLK_RATE_13MHZ 13000 -#define CLK_RATE_1MHZ 1000 -#define CLK_RATE_208MHZ 208000 -#define CLK_RATE_48MHZ 48000 -#define CLK_RATE_32KHZ 32 - -#define PNX4008_UART_CLK CLK_RATE_13MHZ * 1000 /* in MHz */ - -#endif diff --git a/include/asm-arm/arch-pnx4008/debug-macro.S b/include/asm-arm/arch-pnx4008/debug-macro.S deleted file mode 100644 index 67d18a2..0000000 --- a/include/asm-arm/arch-pnx4008/debug-macro.S +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/include/asm-arm/arch-pnx4008/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - mov \rx, #0x00090000 - addeq \rx, \rx, #0x40000000 - addne \rx, \rx, #0xf4000000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-pnx4008/dma.h b/include/asm-arm/arch-pnx4008/dma.h deleted file mode 100644 index 418f152..0000000 --- a/include/asm-arm/arch-pnx4008/dma.h +++ /dev/null @@ -1,162 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/dma.h - * - * PNX4008 DMA header file - * - * Author: Vitaly Wool - * Copyright: MontaVista Software Inc. (c) 2005 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include "platform.h" - -#define MAX_DMA_ADDRESS 0xffffffff - -#define MAX_DMA_CHANNELS 8 - -#define DMAC_BASE IO_ADDRESS(PNX4008_DMA_CONFIG_BASE) -#define DMAC_INT_STAT (DMAC_BASE + 0x0000) -#define DMAC_INT_TC_STAT (DMAC_BASE + 0x0004) -#define DMAC_INT_TC_CLEAR (DMAC_BASE + 0x0008) -#define DMAC_INT_ERR_STAT (DMAC_BASE + 0x000c) -#define DMAC_INT_ERR_CLEAR (DMAC_BASE + 0x0010) -#define DMAC_SOFT_SREQ (DMAC_BASE + 0x0024) -#define DMAC_CONFIG (DMAC_BASE + 0x0030) -#define DMAC_Cx_SRC_ADDR(c) (DMAC_BASE + 0x0100 + (c) * 0x20) -#define DMAC_Cx_DEST_ADDR(c) (DMAC_BASE + 0x0104 + (c) * 0x20) -#define DMAC_Cx_LLI(c) (DMAC_BASE + 0x0108 + (c) * 0x20) -#define DMAC_Cx_CONTROL(c) (DMAC_BASE + 0x010c + (c) * 0x20) -#define DMAC_Cx_CONFIG(c) (DMAC_BASE + 0x0110 + (c) * 0x20) - -enum { - WIDTH_BYTE = 0, - WIDTH_HWORD, - WIDTH_WORD -}; - -enum { - FC_MEM2MEM_DMA, - FC_MEM2PER_DMA, - FC_PER2MEM_DMA, - FC_PER2PER_DMA, - FC_PER2PER_DPER, - FC_MEM2PER_PER, - FC_PER2MEM_PER, - FC_PER2PER_SPER -}; - -enum { - DMA_INT_UNKNOWN = 0, - DMA_ERR_INT = 1, - DMA_TC_INT = 2, -}; - -enum { - DMA_BUFFER_ALLOCATED = 1, - DMA_HAS_LL = 2, -}; - -enum { - PER_CAM_DMA_1 = 0, - PER_NDF_FLASH = 1, - PER_MBX_SLAVE_FIFO = 2, - PER_SPI2_REC_XMIT = 3, - PER_MS_SD_RX_XMIT = 4, - PER_HS_UART_1_XMIT = 5, - PER_HS_UART_1_RX = 6, - PER_HS_UART_2_XMIT = 7, - PER_HS_UART_2_RX = 8, - PER_HS_UART_7_XMIT = 9, - PER_HS_UART_7_RX = 10, - PER_SPI1_REC_XMIT = 11, - PER_MLC_NDF_SREC = 12, - PER_CAM_DMA_2 = 13, - PER_PRNG_INFIFO = 14, - PER_PRNG_OUTFIFO = 15, -}; - -struct pnx4008_dma_ch_ctrl { - int tc_mask; - int cacheable; - int bufferable; - int priv_mode; - int di; - int si; - int dest_ahb1; - int src_ahb1; - int dwidth; - int swidth; - int dbsize; - int sbsize; - int tr_size; -}; - -struct pnx4008_dma_ch_config { - int halt; - int active; - int lock; - int itc; - int ie; - int flow_cntrl; - int dest_per; - int src_per; -}; - -struct pnx4008_dma_ll { - unsigned long src_addr; - unsigned long dest_addr; - u32 next_dma; - unsigned long ch_ctrl; - struct pnx4008_dma_ll *next; - int flags; - void *alloc_data; - int (*free) (void *); -}; - -struct pnx4008_dma_config { - int is_ll; - unsigned long src_addr; - unsigned long dest_addr; - unsigned long ch_ctrl; - unsigned long ch_cfg; - struct pnx4008_dma_ll *ll; - u32 ll_dma; - int flags; - void *alloc_data; - int (*free) (void *); -}; - -extern struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t *); -extern void pnx4008_free_ll_entry(struct pnx4008_dma_ll *, dma_addr_t); -extern void pnx4008_free_ll(u32 ll_dma, struct pnx4008_dma_ll *); - -extern int pnx4008_request_channel(char *, int, - void (*)(int, int, void *), - void *); -extern void pnx4008_free_channel(int); -extern int pnx4008_config_dma(int, int, int); -extern int pnx4008_dma_pack_control(const struct pnx4008_dma_ch_ctrl *, - unsigned long *); -extern int pnx4008_dma_parse_control(unsigned long, - struct pnx4008_dma_ch_ctrl *); -extern int pnx4008_dma_pack_config(const struct pnx4008_dma_ch_config *, - unsigned long *); -extern int pnx4008_dma_parse_config(unsigned long, - struct pnx4008_dma_ch_config *); -extern int pnx4008_config_channel(int, struct pnx4008_dma_config *); -extern int pnx4008_channel_get_config(int, struct pnx4008_dma_config *); -extern int pnx4008_dma_ch_enable(int); -extern int pnx4008_dma_ch_disable(int); -extern int pnx4008_dma_ch_enabled(int); -extern void pnx4008_dma_split_head_entry(struct pnx4008_dma_config *, - struct pnx4008_dma_ch_ctrl *); -extern void pnx4008_dma_split_ll_entry(struct pnx4008_dma_ll *, - struct pnx4008_dma_ch_ctrl *); - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-pnx4008/entry-macro.S b/include/asm-arm/arch-pnx4008/entry-macro.S deleted file mode 100644 index f117319..0000000 --- a/include/asm-arm/arch-pnx4008/entry-macro.S +++ /dev/null @@ -1,127 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/entry-macro.S - * - * Low-level IRQ helper macros for PNX4008-based platforms - * - * 2005-2006 (c) MontaVista Software, Inc. - * Author: Vitaly Wool - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include "platform.h" - -#define IO_BASE 0xF0000000 -#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) - -#define INTRC_MASK 0x00 -#define INTRC_RAW_STAT 0x04 -#define INTRC_STAT 0x08 -#define INTRC_POLAR 0x0C -#define INTRC_ACT_TYPE 0x10 -#define INTRC_TYPE 0x14 - -#define SIC1_BASE_INT 32 -#define SIC2_BASE_INT 64 - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp -/* decode the MIC interrupt numbers */ - ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) - ldr \irqstat, [\base, #INTRC_STAT] - - cmp \irqstat,#1<<16 - movhs \irqnr,#16 - movlo \irqnr,#0 - movhs \irqstat,\irqstat,lsr#16 - cmp \irqstat,#1<<8 - addhs \irqnr,\irqnr,#8 - movhs \irqstat,\irqstat,lsr#8 - cmp \irqstat,#1<<4 - addhs \irqnr,\irqnr,#4 - movhs \irqstat,\irqstat,lsr#4 - cmp \irqstat,#1<<2 - addhs \irqnr,\irqnr,#2 - movhs \irqstat,\irqstat,lsr#2 - cmp \irqstat,#1<<1 - addhs \irqnr,\irqnr,#1 - -/* was there an interrupt ? if not then drop out with EQ status */ - teq \irqstat,#0 - beq 1003f - -/* and now check for extended IRQ reasons */ - cmp \irqnr,#1 - bls 1003f - cmp \irqnr,#30 - blo 1002f - -/* IRQ 31,30 : High priority cascade IRQ handle */ -/* read the correct SIC */ -/* decoding status after compare : eq is 30 (SIC1) , ne is 31 (SIC2) */ -/* set the base IRQ number */ - ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) - moveq \irqnr,#SIC1_BASE_INT - ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) - movne \irqnr,#SIC2_BASE_INT - ldr \irqstat, [\base, #INTRC_STAT] - ldr \tmp, [\base, #INTRC_TYPE] -/* and with inverted mask : low priority interrupts */ - and \irqstat,\irqstat,\tmp - b 1004f - -1003: -/* IRQ 1,0 : Low priority cascade IRQ handle */ -/* read the correct SIC */ -/* decoding status after compare : eq is 1 (SIC2) , ne is 0 (SIC1)*/ -/* read the correct SIC */ -/* set the base IRQ number */ - ldrne \base, =IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) - movne \irqnr,#SIC1_BASE_INT - ldreq \base, =IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) - moveq \irqnr,#SIC2_BASE_INT - ldr \irqstat, [\base, #INTRC_STAT] - ldr \tmp, [\base, #INTRC_TYPE] -/* and with inverted mask : low priority interrupts */ - bic \irqstat,\irqstat,\tmp - -1004: - - cmp \irqstat,#1<<16 - addhs \irqnr,\irqnr,#16 - movhs \irqstat,\irqstat,lsr#16 - cmp \irqstat,#1<<8 - addhs \irqnr,\irqnr,#8 - movhs \irqstat,\irqstat,lsr#8 - cmp \irqstat,#1<<4 - addhs \irqnr,\irqnr,#4 - movhs \irqstat,\irqstat,lsr#4 - cmp \irqstat,#1<<2 - addhs \irqnr,\irqnr,#2 - movhs \irqstat,\irqstat,lsr#2 - cmp \irqstat,#1<<1 - addhs \irqnr,\irqnr,#1 - - -/* is irqstat not zero */ - -1002: -/* we assert that irqstat is not equal to zero and return ne status if true*/ - teq \irqstat,#0 -1003: - .endm - - - .macro irq_prio_table - .endm - - diff --git a/include/asm-arm/arch-pnx4008/gpio.h b/include/asm-arm/arch-pnx4008/gpio.h deleted file mode 100644 index d01bf83..0000000 --- a/include/asm-arm/arch-pnx4008/gpio.h +++ /dev/null @@ -1,241 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/gpio.h - * - * PNX4008 GPIO driver - header file - * - * Author: Dmitry Chigirev - * - * Based on reference code by Iwo Mergler and Z.Tabaaloute from Philips: - * Copyright (c) 2005 Koninklijke Philips Electronics N.V. - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef _PNX4008_GPIO_H_ -#define _PNX4008_GPIO_H_ - - -/* Block numbers */ -#define GPIO_IN (0) -#define GPIO_OUT (0x100) -#define GPIO_BID (0x200) -#define GPIO_RAM (0x300) -#define GPIO_MUX (0x400) - -#define GPIO_TYPE_MASK(K) ((K) & 0x700) - -/* INPUT GPIOs */ -/* GPI */ -#define GPI_00 (GPIO_IN | 0) -#define GPI_01 (GPIO_IN | 1) -#define GPI_02 (GPIO_IN | 2) -#define GPI_03 (GPIO_IN | 3) -#define GPI_04 (GPIO_IN | 4) -#define GPI_05 (GPIO_IN | 5) -#define GPI_06 (GPIO_IN | 6) -#define GPI_07 (GPIO_IN | 7) -#define GPI_08 (GPIO_IN | 8) -#define GPI_09 (GPIO_IN | 9) -#define U1_RX (GPIO_IN | 15) -#define U2_HTCS (GPIO_IN | 16) -#define U2_RX (GPIO_IN | 17) -#define U3_RX (GPIO_IN | 18) -#define U4_RX (GPIO_IN | 19) -#define U5_RX (GPIO_IN | 20) -#define U6_IRRX (GPIO_IN | 21) -#define U7_HCTS (GPIO_IN | 22) -#define U7_RX (GPIO_IN | 23) -/* MISC IN */ -#define SPI1_DATIN (GPIO_IN | 25) -#define DISP_SYNC (GPIO_IN | 26) -#define SPI2_DATIN (GPIO_IN | 27) -#define GPI_11 (GPIO_IN | 28) - -#define GPIO_IN_MASK 0x1eff83ff - -/* OUTPUT GPIOs */ -/* GPO */ -#define GPO_00 (GPIO_OUT | 0) -#define GPO_01 (GPIO_OUT | 1) -#define GPO_02 (GPIO_OUT | 2) -#define GPO_03 (GPIO_OUT | 3) -#define GPO_04 (GPIO_OUT | 4) -#define GPO_05 (GPIO_OUT | 5) -#define GPO_06 (GPIO_OUT | 6) -#define GPO_07 (GPIO_OUT | 7) -#define GPO_08 (GPIO_OUT | 8) -#define GPO_09 (GPIO_OUT | 9) -#define GPO_10 (GPIO_OUT | 10) -#define GPO_11 (GPIO_OUT | 11) -#define GPO_12 (GPIO_OUT | 12) -#define GPO_13 (GPIO_OUT | 13) -#define GPO_14 (GPIO_OUT | 14) -#define GPO_15 (GPIO_OUT | 15) -#define GPO_16 (GPIO_OUT | 16) -#define GPO_17 (GPIO_OUT | 17) -#define GPO_18 (GPIO_OUT | 18) -#define GPO_19 (GPIO_OUT | 19) -#define GPO_20 (GPIO_OUT | 20) -#define GPO_21 (GPIO_OUT | 21) -#define GPO_22 (GPIO_OUT | 22) -#define GPO_23 (GPIO_OUT | 23) - -#define GPIO_OUT_MASK 0xffffff - -/* BIDIRECTIONAL GPIOs */ -/* RAM pins */ -#define RAM_D19 (GPIO_RAM | 0) -#define RAM_D20 (GPIO_RAM | 1) -#define RAM_D21 (GPIO_RAM | 2) -#define RAM_D22 (GPIO_RAM | 3) -#define RAM_D23 (GPIO_RAM | 4) -#define RAM_D24 (GPIO_RAM | 5) -#define RAM_D25 (GPIO_RAM | 6) -#define RAM_D26 (GPIO_RAM | 7) -#define RAM_D27 (GPIO_RAM | 8) -#define RAM_D28 (GPIO_RAM | 9) -#define RAM_D29 (GPIO_RAM | 10) -#define RAM_D30 (GPIO_RAM | 11) -#define RAM_D31 (GPIO_RAM | 12) - -#define GPIO_RAM_MASK 0x1fff - -/* I/O pins */ -#define GPIO_00 (GPIO_BID | 25) -#define GPIO_01 (GPIO_BID | 26) -#define GPIO_02 (GPIO_BID | 27) -#define GPIO_03 (GPIO_BID | 28) -#define GPIO_04 (GPIO_BID | 29) -#define GPIO_05 (GPIO_BID | 30) - -#define GPIO_BID_MASK 0x7e000000 - -/* Non-GPIO multiplexed PIOs. For multiplexing with GPIO, please use GPIO macros */ -#define GPIO_SDRAM_SEL (GPIO_MUX | 3) - -#define GPIO_MUX_MASK 0x8 - -/* Extraction/assembly macros */ -#define GPIO_BIT_MASK(K) ((K) & 0x1F) -#define GPIO_BIT(K) (1 << GPIO_BIT_MASK(K)) -#define GPIO_ISMUX(K) ((GPIO_TYPE_MASK(K) == GPIO_MUX) && (GPIO_BIT(K) & GPIO_MUX_MASK)) -#define GPIO_ISRAM(K) ((GPIO_TYPE_MASK(K) == GPIO_RAM) && (GPIO_BIT(K) & GPIO_RAM_MASK)) -#define GPIO_ISBID(K) ((GPIO_TYPE_MASK(K) == GPIO_BID) && (GPIO_BIT(K) & GPIO_BID_MASK)) -#define GPIO_ISOUT(K) ((GPIO_TYPE_MASK(K) == GPIO_OUT) && (GPIO_BIT(K) & GPIO_OUT_MASK)) -#define GPIO_ISIN(K) ((GPIO_TYPE_MASK(K) == GPIO_IN) && (GPIO_BIT(K) & GPIO_IN_MASK)) - -/* Start Enable Pin Interrupts - table 58 page 66 */ - -#define SE_PIN_BASE_INT 32 - -#define SE_U7_RX_INT 63 -#define SE_U7_HCTS_INT 62 -#define SE_BT_CLKREQ_INT 61 -#define SE_U6_IRRX_INT 60 -/*59 unused*/ -#define SE_U5_RX_INT 58 -#define SE_GPI_11_INT 57 -#define SE_U3_RX_INT 56 -#define SE_U2_HCTS_INT 55 -#define SE_U2_RX_INT 54 -#define SE_U1_RX_INT 53 -#define SE_DISP_SYNC_INT 52 -/*51 unused*/ -#define SE_SDIO_INT_N 50 -#define SE_MSDIO_START_INT 49 -#define SE_GPI_06_INT 48 -#define SE_GPI_05_INT 47 -#define SE_GPI_04_INT 46 -#define SE_GPI_03_INT 45 -#define SE_GPI_02_INT 44 -#define SE_GPI_01_INT 43 -#define SE_GPI_00_INT 42 -#define SE_SYSCLKEN_PIN_INT 41 -#define SE_SPI1_DATAIN_INT 40 -#define SE_GPI_07_INT 39 -#define SE_SPI2_DATAIN_INT 38 -#define SE_GPI_10_INT 37 -#define SE_GPI_09_INT 36 -#define SE_GPI_08_INT 35 -/*34-32 unused*/ - -/* Start Enable Internal Interrupts - table 57 page 65 */ - -#define SE_INT_BASE_INT 0 - -#define SE_TS_IRQ 31 -#define SE_TS_P_INT 30 -#define SE_TS_AUX_INT 29 -/*27-28 unused*/ -#define SE_USB_AHB_NEED_CLK_INT 26 -#define SE_MSTIMER_INT 25 -#define SE_RTC_INT 24 -#define SE_USB_NEED_CLK_INT 23 -#define SE_USB_INT 22 -#define SE_USB_I2C_INT 21 -#define SE_USB_OTG_TIMER_INT 20 -#define SE_USB_OTG_ATX_INT_N 19 -/*18 unused*/ -#define SE_DSP_GPIO4_INT 17 -#define SE_KEY_IRQ 16 -#define SE_DSP_SLAVEPORT_INT 15 -#define SE_DSP_GPIO1_INT 14 -#define SE_DSP_GPIO0_INT 13 -#define SE_DSP_AHB_INT 12 -/*11-6 unused*/ -#define SE_GPIO_05_INT 5 -#define SE_GPIO_04_INT 4 -#define SE_GPIO_03_INT 3 -#define SE_GPIO_02_INT 2 -#define SE_GPIO_01_INT 1 -#define SE_GPIO_00_INT 0 - -#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F)) - -#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1))) -#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1))) -#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1))) -#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1))) - -extern int pnx4008_gpio_register_pin(unsigned short pin); -extern int pnx4008_gpio_unregister_pin(unsigned short pin); -extern unsigned long pnx4008_gpio_read_pin(unsigned short pin); -extern int pnx4008_gpio_write_pin(unsigned short pin, int output); -extern int pnx4008_gpio_set_pin_direction(unsigned short pin, int output); -extern int pnx4008_gpio_read_pin_direction(unsigned short pin); -extern int pnx4008_gpio_set_pin_mux(unsigned short pin, int output); -extern int pnx4008_gpio_read_pin_mux(unsigned short pin); - -static inline void start_int_umask(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_ER_REG(irq)) | - START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); -} - -static inline void start_int_mask(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_ER_REG(irq)) & - ~START_INT_REG_BIT(irq), START_INT_ER_REG(irq)); -} - -static inline void start_int_ack(u8 irq) -{ - __raw_writel(START_INT_REG_BIT(irq), START_INT_RSR_REG(irq)); -} - -static inline void start_int_set_falling_edge(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_APR_REG(irq)) & - ~START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); -} - -static inline void start_int_set_rising_edge(u8 irq) -{ - __raw_writel(__raw_readl(START_INT_APR_REG(irq)) | - START_INT_REG_BIT(irq), START_INT_APR_REG(irq)); -} - -#endif /* _PNX4008_GPIO_H_ */ diff --git a/include/asm-arm/arch-pnx4008/hardware.h b/include/asm-arm/arch-pnx4008/hardware.h deleted file mode 100644 index a441039..0000000 --- a/include/asm-arm/arch-pnx4008/hardware.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/hardware.h - * - * Copyright (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -/* Start of virtual addresses for IO devices */ -#define IO_BASE 0xF0000000 - -/* This macro relies on fact that for all HW i/o addresses bits 20-23 are 0 */ -#define IO_ADDRESS(x) (((((x) & 0xff000000) >> 4) | ((x) & 0xfffff)) | IO_BASE) - -#endif diff --git a/include/asm-arm/arch-pnx4008/i2c.h b/include/asm-arm/arch-pnx4008/i2c.h deleted file mode 100644 index 92e8d65..0000000 --- a/include/asm-arm/arch-pnx4008/i2c.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * PNX4008-specific tweaks for I2C IP3204 block - * - * Author: Vitaly Wool - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASM_ARCH_I2C_H__ -#define __ASM_ARCH_I2C_H__ - -#include -#include - -enum { - mstatus_tdi = 0x00000001, - mstatus_afi = 0x00000002, - mstatus_nai = 0x00000004, - mstatus_drmi = 0x00000008, - mstatus_active = 0x00000020, - mstatus_scl = 0x00000040, - mstatus_sda = 0x00000080, - mstatus_rff = 0x00000100, - mstatus_rfe = 0x00000200, - mstatus_tff = 0x00000400, - mstatus_tfe = 0x00000800, -}; - -enum { - mcntrl_tdie = 0x00000001, - mcntrl_afie = 0x00000002, - mcntrl_naie = 0x00000004, - mcntrl_drmie = 0x00000008, - mcntrl_daie = 0x00000020, - mcntrl_rffie = 0x00000040, - mcntrl_tffie = 0x00000080, - mcntrl_reset = 0x00000100, - mcntrl_cdbmode = 0x00000400, -}; - -enum { - rw_bit = 1 << 0, - start_bit = 1 << 8, - stop_bit = 1 << 9, -}; - -#define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ -#define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ -#define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ -#define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ -#define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ -#define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ -#define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ -#define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ -#define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ -#define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ -#define I2C_REG_TXB(a) ((a)->ioaddr + 0x24) /* Num of bytes Tx-ed (RO) */ -#define I2C_REG_TXS(a) ((a)->ioaddr + 0x28) /* Tx slave FIFO (RO) */ -#define I2C_REG_STFL(a) ((a)->ioaddr + 0x2c) /* Tx slave FIFO level (RO) */ - -#define HCLK_MHZ 13 -#define I2C_CHIP_NAME "PNX4008-I2C" - -#endif /* __ASM_ARCH_I2C_H___ */ diff --git a/include/asm-arm/arch-pnx4008/io.h b/include/asm-arm/arch-pnx4008/io.h deleted file mode 100644 index 29ee439..0000000 --- a/include/asm-arm/arch-pnx4008/io.h +++ /dev/null @@ -1,21 +0,0 @@ - -/* - * include/asm-arm/arch-pnx4008/io.h - * - * Author: Dmitry Chigirev - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-pnx4008/irq.h b/include/asm-arm/arch-pnx4008/irq.h deleted file mode 100644 index fabff5d..0000000 --- a/include/asm-arm/arch-pnx4008/irq.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/irq.h - * - * PNX4008 IRQ controller driver - header file - * this one is used in entry-arnv.S as well so it cannot contain C code - * - * Copyright (c) 2005 Philips Semiconductors - * Copyright (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ -#ifndef __PNX4008_IRQ_H__ -#define __PNX4008_IRQ_H__ - -#define MIC_VA_BASE IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) -#define SIC1_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC1_BASE) -#define SIC2_VA_BASE IO_ADDRESS(PNX4008_INTCTRLSIC2_BASE) - -/* Manual: Chapter 20, page 195 */ - -#define INTC_BIT(irq) (1<< ((irq) & 0x1F)) - -#define INTC_ER(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x0 + (((irq)&(0x3<<5))<<9))) -#define INTC_RSR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x4 + (((irq)&(0x3<<5))<<9))) -#define INTC_SR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x8 + (((irq)&(0x3<<5))<<9))) -#define INTC_APR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0xC + (((irq)&(0x3<<5))<<9))) -#define INTC_ATR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x10 + (((irq)&(0x3<<5))<<9))) -#define INTC_ITR(irq) IO_ADDRESS((PNX4008_INTCTRLMIC_BASE + 0x14 + (((irq)&(0x3<<5))<<9))) - -#define START_INT_REG_BIT(irq) (1<<((irq)&0x1F)) - -#define START_INT_ER_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x20 + (((irq)&(0x1<<5))>>1))) -#define START_INT_RSR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x24 + (((irq)&(0x1<<5))>>1))) -#define START_INT_SR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x28 + (((irq)&(0x1<<5))>>1))) -#define START_INT_APR_REG(irq) IO_ADDRESS((PNX4008_PWRMAN_BASE + 0x2C + (((irq)&(0x1<<5))>>1))) - -extern void __init pnx4008_init_irq(void); - -#endif /* __PNX4008_IRQ_H__ */ diff --git a/include/asm-arm/arch-pnx4008/irqs.h b/include/asm-arm/arch-pnx4008/irqs.h deleted file mode 100644 index a25d18f..0000000 --- a/include/asm-arm/arch-pnx4008/irqs.h +++ /dev/null @@ -1,215 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/irqs.h - * - * PNX4008 IRQ controller driver - header file - * - * Author: Dmitry Chigirev - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#ifndef __PNX4008_IRQS_h__ -#define __PNX4008_IRQS_h__ - -#define NR_IRQS 96 - -/*Manual: table 259, page 199*/ - -/*SUB2 Interrupt Routing (SIC2)*/ - -#define SIC2_BASE_INT 64 - -#define CLK_SWITCH_ARM_INT 95 /*manual: Clkswitch ARM */ -#define CLK_SWITCH_DSP_INT 94 /*manual: ClkSwitch DSP */ -#define CLK_SWITCH_AUD_INT 93 /*manual: Clkswitch AUD */ -#define GPI_06_INT 92 -#define GPI_05_INT 91 -#define GPI_04_INT 90 -#define GPI_03_INT 89 -#define GPI_02_INT 88 -#define GPI_01_INT 87 -#define GPI_00_INT 86 -#define BT_CLKREQ_INT 85 -#define SPI1_DATIN_INT 84 -#define U5_RX_INT 83 -#define SDIO_INT_N 82 -#define CAM_HS_INT 81 -#define CAM_VS_INT 80 -#define GPI_07_INT 79 -#define DISP_SYNC_INT 78 -#define DSP_INT8 77 -#define U7_HCTS_INT 76 -#define GPI_10_INT 75 -#define GPI_09_INT 74 -#define GPI_08_INT 73 -#define DSP_INT7 72 -#define U2_HCTS_INT 71 -#define SPI2_DATIN_INT 70 -#define GPIO_05_INT 69 -#define GPIO_04_INT 68 -#define GPIO_03_INT 67 -#define GPIO_02_INT 66 -#define GPIO_01_INT 65 -#define GPIO_00_INT 64 - -/*Manual: table 258, page 198*/ - -/*SUB1 Interrupt Routing (SIC1)*/ - -#define SIC1_BASE_INT 32 - -#define USB_I2C_INT 63 -#define USB_DEV_HP_INT 62 -#define USB_DEV_LP_INT 61 -#define USB_DEV_DMA_INT 60 -#define USB_HOST_INT 59 -#define USB_OTG_ATX_INT_N 58 -#define USB_OTG_TIMER_INT 57 -#define SW_INT 56 -#define SPI1_INT 55 -#define KEY_IRQ 54 -#define DSP_M_INT 53 -#define RTC_INT 52 -#define I2C_1_INT 51 -#define I2C_2_INT 50 -#define PLL1_LOCK_INT 49 -#define PLL2_LOCK_INT 48 -#define PLL3_LOCK_INT 47 -#define PLL4_LOCK_INT 46 -#define PLL5_LOCK_INT 45 -#define SPI2_INT 44 -#define DSP_INT1 43 -#define DSP_INT2 42 -#define DSP_TDM_INT2 41 -#define TS_AUX_INT 40 -#define TS_IRQ 39 -#define TS_P_INT 38 -#define UOUT1_TO_PAD_INT 37 -#define GPI_11_INT 36 -#define DSP_INT4 35 -#define JTAG_COMM_RX_INT 34 -#define JTAG_COMM_TX_INT 33 -#define DSP_INT3 32 - -/*Manual: table 257, page 197*/ - -/*MAIN Interrupt Routing*/ - -#define MAIN_BASE_INT 0 - -#define SUB2_FIQ_N 31 /*active low */ -#define SUB1_FIQ_N 30 /*active low */ -#define JPEG_INT 29 -#define DMA_INT 28 -#define MSTIMER_INT 27 -#define IIR1_INT 26 -#define IIR2_INT 25 -#define IIR7_INT 24 -#define DSP_TDM_INT0 23 -#define DSP_TDM_INT1 22 -#define DSP_P_INT 21 -#define DSP_INT0 20 -#define DUM_INT 19 -#define UOUT0_TO_PAD_INT 18 -#define MP4_ENC_INT 17 -#define MP4_DEC_INT 16 -#define SD0_INT 15 -#define MBX_INT 14 -#define SD1_INT 13 -#define MS_INT_N 12 -#define FLASH_INT 11 /*NAND*/ -#define IIR6_INT 10 -#define IIR5_INT 9 -#define IIR4_INT 8 -#define IIR3_INT 7 -#define WATCH_INT 6 -#define HSTIMER_INT 5 -#define ARCH_TIMER_IRQ HSTIMER_INT -#define CAM_INT 4 -#define PRNG_INT 3 -#define CRYPTO_INT 2 -#define SUB2_IRQ_N 1 /*active low */ -#define SUB1_IRQ_N 0 /*active low */ - -#define PNX4008_IRQ_TYPES \ -{ /*IRQ #'s: */ \ -IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \ -IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \ -IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \ -IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \ -} - -/* Start Enable Pin Interrupts - table 58 page 66 */ - -#define SE_PIN_BASE_INT 32 - -#define SE_U7_RX_INT 63 -#define SE_U7_HCTS_INT 62 -#define SE_BT_CLKREQ_INT 61 -#define SE_U6_IRRX_INT 60 -/*59 unused*/ -#define SE_U5_RX_INT 58 -#define SE_GPI_11_INT 57 -#define SE_U3_RX_INT 56 -#define SE_U2_HCTS_INT 55 -#define SE_U2_RX_INT 54 -#define SE_U1_RX_INT 53 -#define SE_DISP_SYNC_INT 52 -/*51 unused*/ -#define SE_SDIO_INT_N 50 -#define SE_MSDIO_START_INT 49 -#define SE_GPI_06_INT 48 -#define SE_GPI_05_INT 47 -#define SE_GPI_04_INT 46 -#define SE_GPI_03_INT 45 -#define SE_GPI_02_INT 44 -#define SE_GPI_01_INT 43 -#define SE_GPI_00_INT 42 -#define SE_SYSCLKEN_PIN_INT 41 -#define SE_SPI1_DATAIN_INT 40 -#define SE_GPI_07_INT 39 -#define SE_SPI2_DATAIN_INT 38 -#define SE_GPI_10_INT 37 -#define SE_GPI_09_INT 36 -#define SE_GPI_08_INT 35 -/*34-32 unused*/ - -/* Start Enable Internal Interrupts - table 57 page 65 */ - -#define SE_INT_BASE_INT 0 - -#define SE_TS_IRQ 31 -#define SE_TS_P_INT 30 -#define SE_TS_AUX_INT 29 -/*27-28 unused*/ -#define SE_USB_AHB_NEED_CLK_INT 26 -#define SE_MSTIMER_INT 25 -#define SE_RTC_INT 24 -#define SE_USB_NEED_CLK_INT 23 -#define SE_USB_INT 22 -#define SE_USB_I2C_INT 21 -#define SE_USB_OTG_TIMER_INT 20 - -#endif /* __PNX4008_IRQS_h__ */ diff --git a/include/asm-arm/arch-pnx4008/memory.h b/include/asm-arm/arch-pnx4008/memory.h deleted file mode 100644 index 0d8268a..0000000 --- a/include/asm-arm/arch-pnx4008/memory.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/memory.h - * - * Copyright (c) 2005 Philips Semiconductors - * Copyright (c) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET (0x80000000) - -#define __virt_to_bus(x) ((x) - PAGE_OFFSET + PHYS_OFFSET) -#define __bus_to_virt(x) ((x) + PAGE_OFFSET - PHYS_OFFSET) - -#endif diff --git a/include/asm-arm/arch-pnx4008/param.h b/include/asm-arm/arch-pnx4008/param.h deleted file mode 100644 index 95d5f54..0000000 --- a/include/asm-arm/arch-pnx4008/param.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/param.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define HZ 100 diff --git a/include/asm-arm/arch-pnx4008/platform.h b/include/asm-arm/arch-pnx4008/platform.h deleted file mode 100644 index 2613c7c..0000000 --- a/include/asm-arm/arch-pnx4008/platform.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/platform.h - * - * PNX4008 Base addresses - header file - * - * Author: Dmitry Chigirev - * - * Based on reference code received from Philips: - * Copyright (C) 2003 Philips Semiconductors - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - - -#ifndef __ASM_ARCH_PLATFORM_H__ -#define __ASM_ARCH_PLATFORM_H__ - -#define PNX4008_IRAM_BASE 0x08000000 -#define PNX4008_IRAM_SIZE 0x00010000 -#define PNX4008_YUV_SLAVE_BASE 0x10000000 -#define PNX4008_DUM_SLAVE_BASE 0x18000000 -#define PNX4008_NDF_FLASH_BASE 0x20020000 -#define PNX4008_SPI1_BASE 0x20088000 -#define PNX4008_SPI2_BASE 0x20090000 -#define PNX4008_SD_CONFIG_BASE 0x20098000 -#define PNX4008_FLASH_DATA 0x200B0000 -#define PNX4008_MLC_FLASH_BASE 0x200B8000 -#define PNX4008_JPEG_CONFIG_BASE 0x300A0000 -#define PNX4008_DMA_CONFIG_BASE 0x31000000 -#define PNX4008_USB_CONFIG_BASE 0x31020000 -#define PNX4008_SDRAM_CFG_BASE 0x31080000 -#define PNX4008_AHB2FAB_BASE 0x40000000 -#define PNX4008_PWRMAN_BASE 0x40004000 -#define PNX4008_INTCTRLMIC_BASE 0x40008000 -#define PNX4008_INTCTRLSIC1_BASE 0x4000C000 -#define PNX4008_INTCTRLSIC2_BASE 0x40010000 -#define PNX4008_HSUART1_BASE 0x40014000 -#define PNX4008_HSUART2_BASE 0x40018000 -#define PNX4008_HSUART7_BASE 0x4001C000 -#define PNX4008_RTC_BASE 0x40024000 -#define PNX4008_PIO_BASE 0x40028000 -#define PNX4008_MSTIMER_BASE 0x40034000 -#define PNX4008_HSTIMER_BASE 0x40038000 -#define PNX4008_WDOG_BASE 0x4003C000 -#define PNX4008_DEBUG_BASE 0x40040000 -#define PNX4008_TOUCH1_BASE 0x40048000 -#define PNX4008_KEYSCAN_BASE 0x40050000 -#define PNX4008_UARTCTRL_BASE 0x40054000 -#define PNX4008_PWM_BASE 0x4005C000 -#define PNX4008_UART3_BASE 0x40080000 -#define PNX4008_UART4_BASE 0x40088000 -#define PNX4008_UART5_BASE 0x40090000 -#define PNX4008_UART6_BASE 0x40098000 -#define PNX4008_I2C1_BASE 0x400A0000 -#define PNX4008_I2C2_BASE 0x400A8000 -#define PNX4008_MAGICGATE_BASE 0x400B0000 -#define PNX4008_DUMCONF_BASE 0x400B8000 -#define PNX4008_DUM_MAINCFG_BASE 0x400BC000 -#define PNX4008_DSP_BASE 0x400C0000 -#define PNX4008_PROFCOUNTER_BASE 0x400C8000 -#define PNX4008_CRYPTO_BASE 0x400D0000 -#define PNX4008_CAMIFCONF_BASE 0x400D8000 -#define PNX4008_YUV2RGB_BASE 0x400E0000 -#define PNX4008_AUDIOCONFIG_BASE 0x400E8000 - -#endif diff --git a/include/asm-arm/arch-pnx4008/pm.h b/include/asm-arm/arch-pnx4008/pm.h deleted file mode 100644 index bac1634c..0000000 --- a/include/asm-arm/arch-pnx4008/pm.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/pm.h - * - * PNX4008 Power Management Routiness - header file - * - * Authors: Vitaly Wool, Dmitry Chigirev - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __ASM_ARCH_PNX4008_PM_H -#define __ASM_ARCH_PNX4008_PM_H - -#ifndef __ASSEMBLER__ -#include "irq.h" -#include "irqs.h" -#include "clock.h" - -extern void pnx4008_pm_idle(void); -extern void pnx4008_pm_suspend(void); -extern unsigned int pnx4008_cpu_suspend_sz; -extern void pnx4008_cpu_suspend(void); -extern unsigned int pnx4008_cpu_standby_sz; -extern void pnx4008_cpu_standby(void); - -extern int pnx4008_startup_pll(struct clk *); -extern int pnx4008_shutdown_pll(struct clk *); - -#endif /* ASSEMBLER */ -#endif /* __ASM_ARCH_PNX4008_PM_H */ diff --git a/include/asm-arm/arch-pnx4008/system.h b/include/asm-arm/arch-pnx4008/system.h deleted file mode 100644 index 17f9d7f9..0000000 --- a/include/asm-arm/arch-pnx4008/system.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/system.h - * - * Copyright (C) 2003 Philips Semiconductors - * Copyright (C) 2005 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - cpu_reset(0); -} - -#endif diff --git a/include/asm-arm/arch-pnx4008/timex.h b/include/asm-arm/arch-pnx4008/timex.h deleted file mode 100644 index f22ee24..0000000 --- a/include/asm-arm/arch-pnx4008/timex.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/timex.h - * - * PNX4008 timers header file - * - * Author: Dmitry Chigirev - * - * 2005 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifndef __PNX4008_TIMEX_H -#define __PNX4008_TIMEX_H - -#include -#include - -#define CLOCK_TICK_RATE 1000000 - -#define TICKS2USECS(x) (x) - -/* MilliSecond Timer - Chapter 21 Page 202 */ - -#define MSTIM_INT IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x0)) -#define MSTIM_CTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x4)) -#define MSTIM_COUNTER IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x8)) -#define MSTIM_MCTRL IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x14)) -#define MSTIM_MATCH0 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x18)) -#define MSTIM_MATCH1 IO_ADDRESS((PNX4008_MSTIMER_BASE + 0x1c)) - -/* High Speed Timer - Chpater 22, Page 205 */ - -#define HSTIM_INT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x0)) -#define HSTIM_CTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x4)) -#define HSTIM_COUNTER IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x8)) -#define HSTIM_PMATCH IO_ADDRESS((PNX4008_HSTIMER_BASE + 0xC)) -#define HSTIM_PCOUNT IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x10)) -#define HSTIM_MCTRL IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x14)) -#define HSTIM_MATCH0 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x18)) -#define HSTIM_MATCH1 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x1c)) -#define HSTIM_MATCH2 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x20)) -#define HSTIM_CCR IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x28)) -#define HSTIM_CR0 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x2C)) -#define HSTIM_CR1 IO_ADDRESS((PNX4008_HSTIMER_BASE + 0x30)) - -/* IMPORTANT: both timers are UPCOUNTING */ - -/* xSTIM_MCTRL bit definitions */ -#define MR0_INT 1 -#define RESET_COUNT0 (1<<1) -#define STOP_COUNT0 (1<<2) -#define MR1_INT (1<<3) -#define RESET_COUNT1 (1<<4) -#define STOP_COUNT1 (1<<5) -#define MR2_INT (1<<6) -#define RESET_COUNT2 (1<<7) -#define STOP_COUNT2 (1<<8) - -/* xSTIM_CTRL bit definitions */ -#define COUNT_ENAB 1 -#define RESET_COUNT (1<<1) -#define DEBUG_EN (1<<2) - -/* xSTIM_INT bit definitions */ -#define MATCH0_INT 1 -#define MATCH1_INT (1<<1) -#define MATCH2_INT (1<<2) -#define RTC_TICK0 (1<<4) -#define RTC_TICK1 (1<<5) - -#endif diff --git a/include/asm-arm/arch-pnx4008/uncompress.h b/include/asm-arm/arch-pnx4008/uncompress.h deleted file mode 100644 index 8fa4d24..0000000 --- a/include/asm-arm/arch-pnx4008/uncompress.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/include/asm-arm/arch-pnx4008/uncompress.h - * - * Copyright (C) 1999 ARM Limited - * Copyright (C) 2006 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define UART5_BASE 0x40090000 - -#define UART5_DR (*(volatile unsigned char *) (UART5_BASE)) -#define UART5_FR (*(volatile unsigned char *) (UART5_BASE + 18)) - -static __inline__ void putc(char c) -{ - while (UART5_FR & (1 << 5)) - barrier(); - - UART5_DR = c; -} - -/* - * This does not append a newline - */ -static inline void flush(void) -{ -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-pnx4008/vmalloc.h b/include/asm-arm/arch-pnx4008/vmalloc.h deleted file mode 100644 index 140d925..0000000 --- a/include/asm-arm/arch-pnx4008/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * include/asm-arm/arch-pnx4008/vmalloc.h - * - * Author: Vitaly Wool - * - * 2006 (c) MontaVista Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -/* - * Just any arbitrary offset to the start of the vmalloc VM area: the - * current 8MB value just means that there will be a 8MB "hole" after the - * physical memory until the kernel virtual memory starts. That means that - * any out-of-bounds memory accesses will hopefully be caught. - * The vmalloc() routines leaves a hole of 4kB between each vmalloced - * area for the same reason. ;) - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-pxa/akita.h b/include/asm-arm/arch-pxa/akita.h deleted file mode 100644 index 5d8cc1d..0000000 --- a/include/asm-arm/arch-pxa/akita.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Hardware specific definitions for SL-C1000 (Akita) - * - * Copyright (c) 2005 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -/* Akita IO Expander GPIOs */ - -#define AKITA_IOEXP_RESERVED_7 (1 << 7) -#define AKITA_IOEXP_IR_ON (1 << 6) -#define AKITA_IOEXP_AKIN_PULLUP (1 << 5) -#define AKITA_IOEXP_BACKLIGHT_CONT (1 << 4) -#define AKITA_IOEXP_BACKLIGHT_ON (1 << 3) -#define AKITA_IOEXP_MIC_BIAS (1 << 2) -#define AKITA_IOEXP_RESERVED_1 (1 << 1) -#define AKITA_IOEXP_RESERVED_0 (1 << 0) - -/* Direction Bitfield 0=output 1=input */ -#define AKITA_IOEXP_IO_DIR 0 -/* Default Values */ -#define AKITA_IOEXP_IO_OUT (AKITA_IOEXP_IR_ON | AKITA_IOEXP_AKIN_PULLUP) - -extern struct platform_device akitaioexp_device; - -void akita_set_ioexp(struct device *dev, unsigned char bitmask); -void akita_reset_ioexp(struct device *dev, unsigned char bitmask); - diff --git a/include/asm-arm/arch-pxa/audio.h b/include/asm-arm/arch-pxa/audio.h deleted file mode 100644 index f82f96d..0000000 --- a/include/asm-arm/arch-pxa/audio.h +++ /dev/null @@ -1,17 +0,0 @@ -#ifndef __ASM_ARCH_AUDIO_H__ -#define __ASM_ARCH_AUDIO_H__ - -#include -#include - -typedef struct { - int (*startup)(struct snd_pcm_substream *, void *); - void (*shutdown)(struct snd_pcm_substream *, void *); - void (*suspend)(void *); - void (*resume)(void *); - void *priv; -} pxa2xx_audio_ops_t; - -extern void pxa_set_ac97_info(pxa2xx_audio_ops_t *ops); - -#endif diff --git a/include/asm-arm/arch-pxa/bitfield.h b/include/asm-arm/arch-pxa/bitfield.h deleted file mode 100644 index f1f0e33..0000000 --- a/include/asm-arm/arch-pxa/bitfield.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/include/asm-arm/arch-pxa/camera.h b/include/asm-arm/arch-pxa/camera.h deleted file mode 100644 index 39516ce..0000000 --- a/include/asm-arm/arch-pxa/camera.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - camera.h - PXA camera driver header file - - Copyright (C) 2003, Intel Corporation - Copyright (C) 2008, Guennadi Liakhovetski - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. -*/ - -#ifndef __ASM_ARCH_CAMERA_H_ -#define __ASM_ARCH_CAMERA_H_ - -#define PXA_CAMERA_MASTER 1 -#define PXA_CAMERA_DATAWIDTH_4 2 -#define PXA_CAMERA_DATAWIDTH_5 4 -#define PXA_CAMERA_DATAWIDTH_8 8 -#define PXA_CAMERA_DATAWIDTH_9 0x10 -#define PXA_CAMERA_DATAWIDTH_10 0x20 -#define PXA_CAMERA_PCLK_EN 0x40 -#define PXA_CAMERA_MCLK_EN 0x80 -#define PXA_CAMERA_PCP 0x100 -#define PXA_CAMERA_HSP 0x200 -#define PXA_CAMERA_VSP 0x400 - -struct pxacamera_platform_data { - int (*init)(struct device *); - int (*power)(struct device *, int); - int (*reset)(struct device *, int); - - unsigned long flags; - unsigned long mclk_10khz; -}; - -extern void pxa_set_camera_info(struct pxacamera_platform_data *); - -#endif /* __ASM_ARCH_CAMERA_H_ */ diff --git a/include/asm-arm/arch-pxa/colibri.h b/include/asm-arm/arch-pxa/colibri.h deleted file mode 100644 index 2ae373f..0000000 --- a/include/asm-arm/arch-pxa/colibri.h +++ /dev/null @@ -1,19 +0,0 @@ -#ifndef _COLIBRI_H_ -#define _COLIBRI_H_ - -/* physical memory regions */ -#define COLIBRI_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ -#define COLIBRI_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ -#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ - -/* virtual memory regions */ -#define COLIBRI_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -/* size of flash */ -#define COLIBRI_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ - -/* Ethernet Controller Davicom DM9000 */ -#define GPIO_DM9000 114 -#define COLIBRI_ETH_IRQ IRQ_GPIO(GPIO_DM9000) - -#endif /* _COLIBRI_H_ */ diff --git a/include/asm-arm/arch-pxa/corgi.h b/include/asm-arm/arch-pxa/corgi.h deleted file mode 100644 index bf85650..0000000 --- a/include/asm-arm/arch-pxa/corgi.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Hardware specific definitions for SL-C7xx series of PDAs - * - * Copyright (c) 2004-2005 Richard Purdie - * - * Based on Sharp's 2.4 kernel patches - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef __ASM_ARCH_CORGI_H -#define __ASM_ARCH_CORGI_H 1 - - -/* - * Corgi (Non Standard) GPIO Definitions - */ -#define CORGI_GPIO_KEY_INT (0) /* Keyboard Interrupt */ -#define CORGI_GPIO_AC_IN (1) /* Charger Detection */ -#define CORGI_GPIO_WAKEUP (3) /* System wakeup notification? */ -#define CORGI_GPIO_AK_INT (4) /* Headphone Jack Control Interrupt */ -#define CORGI_GPIO_TP_INT (5) /* Touch Panel Interrupt */ -#define CORGI_GPIO_nSD_WP (7) /* SD Write Protect? */ -#define CORGI_GPIO_nSD_DETECT (9) /* MMC/SD Card Detect */ -#define CORGI_GPIO_nSD_INT (10) /* SD Interrupt for SDIO? */ -#define CORGI_GPIO_MAIN_BAT_LOW (11) /* Main Battery Low Notification */ -#define CORGI_GPIO_BAT_COVER (11) /* Battery Cover Detect */ -#define CORGI_GPIO_LED_ORANGE (13) /* Orange LED Control */ -#define CORGI_GPIO_CF_CD (14) /* Compact Flash Card Detect */ -#define CORGI_GPIO_CHRG_FULL (16) /* Charging Complete Notification */ -#define CORGI_GPIO_CF_IRQ (17) /* Compact Flash Interrupt */ -#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */ -#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */ -#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */ -#define CORGI_GPIO_IR_ON (22) /* Enable IR Transciever */ -#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */ -#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */ -#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */ -#define CORGI_GPIO_DISCHARGE_ON (42) /* Enable battery Discharge */ -#define CORGI_GPIO_CHRG_UKN (43) /* Unknown Charging (Bypass Control?) */ -#define CORGI_GPIO_HSYNC (44) /* LCD HSync Pulse */ -#define CORGI_GPIO_USB_PULLUP (45) /* USB show presence to host */ - - -/* - * Corgi Keyboard Definitions - */ -#define CORGI_KEY_STROBE_NUM (12) -#define CORGI_KEY_SENSE_NUM (8) -#define CORGI_GPIO_ALL_STROBE_BIT (0x00003ffc) -#define CORGI_GPIO_HIGH_SENSE_BIT (0xfc000000) -#define CORGI_GPIO_HIGH_SENSE_RSHIFT (26) -#define CORGI_GPIO_LOW_SENSE_BIT (0x00000003) -#define CORGI_GPIO_LOW_SENSE_LSHIFT (6) -#define CORGI_GPIO_STROBE_BIT(a) GPIO_bit(66+(a)) -#define CORGI_GPIO_SENSE_BIT(a) GPIO_bit(58+(a)) -#define CORGI_GAFR_ALL_STROBE_BIT (0x0ffffff0) -#define CORGI_GAFR_HIGH_SENSE_BIT (0xfff00000) -#define CORGI_GAFR_LOW_SENSE_BIT (0x0000000f) -#define CORGI_GPIO_KEY_SENSE(a) (58+(a)) -#define CORGI_GPIO_KEY_STROBE(a) (66+(a)) - - -/* - * Corgi Interrupts - */ -#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) -#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) -#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) -#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) -#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) -#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) -#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) -#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) -#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) -#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ -#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) -#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ - - -/* - * Corgi SCOOP GPIOs and Config - */ -#define CORGI_SCP_LED_GREEN SCOOP_GPCR_PA11 -#define CORGI_SCP_SWA SCOOP_GPCR_PA12 /* Hinge Switch A */ -#define CORGI_SCP_SWB SCOOP_GPCR_PA13 /* Hinge Switch B */ -#define CORGI_SCP_MUTE_L SCOOP_GPCR_PA14 -#define CORGI_SCP_MUTE_R SCOOP_GPCR_PA15 -#define CORGI_SCP_AKIN_PULLUP SCOOP_GPCR_PA16 -#define CORGI_SCP_APM_ON SCOOP_GPCR_PA17 -#define CORGI_SCP_BACKLIGHT_CONT SCOOP_GPCR_PA18 -#define CORGI_SCP_MIC_BIAS SCOOP_GPCR_PA19 - -#define CORGI_SCOOP_IO_DIR ( CORGI_SCP_LED_GREEN | CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R | \ - CORGI_SCP_AKIN_PULLUP | CORGI_SCP_APM_ON | CORGI_SCP_BACKLIGHT_CONT | \ - CORGI_SCP_MIC_BIAS ) -#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) - - -/* - * Shared data structures - */ -extern struct platform_device corgiscoop_device; -extern struct platform_device corgissp_device; - -#endif /* __ASM_ARCH_CORGI_H */ - diff --git a/include/asm-arm/arch-pxa/debug-macro.S b/include/asm-arm/arch-pxa/debug-macro.S deleted file mode 100644 index 9012cbc..0000000 --- a/include/asm-arm/arch-pxa/debug-macro.S +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/include/asm-arm/arch-pxa/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include "hardware.h" - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x40000000 @ physical - movne \rx, #io_p2v(0x40000000) @ virtual - orr \rx, \rx, #0x00100000 - .endm - -#define UART_SHIFT 2 -#include diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h deleted file mode 100644 index dbe110e..0000000 --- a/include/asm-arm/arch-pxa/dma.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/dma.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* - * Descriptor structure for PXA's DMA engine - * Note: this structure must always be aligned to a 16-byte boundary. - */ - -typedef struct pxa_dma_desc { - volatile u32 ddadr; /* Points to the next descriptor + flags */ - volatile u32 dsadr; /* DSADR value for the current transfer */ - volatile u32 dtadr; /* DTADR value for the current transfer */ - volatile u32 dcmd; /* DCMD value for the current transfer */ -} pxa_dma_desc; - -typedef enum { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -} pxa_dma_prio; - -#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) -#define HAVE_ARCH_PCI_SET_DMA_MASK 1 -#endif - -/* - * DMA registration - */ - -int __init pxa_init_dma(int num_ch); - -int pxa_request_dma (char *name, - pxa_dma_prio prio, - void (*irq_handler)(int, void *), - void *data); - -void pxa_free_dma (int dma_ch); - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S deleted file mode 100644 index 897d164..0000000 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ /dev/null @@ -1,57 +0,0 @@ -/* - * include/asm-arm/arch-pxa/entry-macro.S - * - * Low-level IRQ helper macros for PXA-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mrc p15, 0, \tmp, c0, c0, 0 @ CPUID - mov \tmp, \tmp, lsr #13 - and \tmp, \tmp, #0x7 @ Core G - cmp \tmp, #1 - bhi 1004f - - mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 - add \base, \base, #0x00d00000 - ldr \irqstat, [\base, #0] @ ICIP - ldr \irqnr, [\base, #4] @ ICMR - b 1002f - -1004: - mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 - mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 - ands \irqnr, \irqstat, \irqnr - beq 1003f - rsb \irqstat, \irqnr, #0 - and \irqstat, \irqstat, \irqnr - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 - add \irqnr, \irqnr, #32 - b 1001f -1003: - mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP - mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR -1002: - ands \irqnr, \irqstat, \irqnr - beq 1001f - rsb \irqstat, \irqnr, #0 - and \irqstat, \irqstat, \irqnr - clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #31 -1001: - .endm diff --git a/include/asm-arm/arch-pxa/eseries-gpio.h b/include/asm-arm/arch-pxa/eseries-gpio.h deleted file mode 100644 index 4c90b13..0000000 --- a/include/asm-arm/arch-pxa/eseries-gpio.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * eseries-gpio.h - * - * Copyright (C) Ian Molton - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -/* e-series power button */ -#define GPIO_ESERIES_POWERBTN 0 - -/* UDC GPIO definitions */ -#define GPIO_E7XX_USB_DISC 13 -#define GPIO_E7XX_USB_PULLUP 3 - -#define GPIO_E800_USB_DISC 4 -#define GPIO_E800_USB_PULLUP 84 - -/* e740 PCMCIA GPIO definitions */ -/* Note: PWR1 seems to be inverted */ -#define GPIO_E740_PCMCIA_CD0 8 -#define GPIO_E740_PCMCIA_CD1 44 -#define GPIO_E740_PCMCIA_RDY0 11 -#define GPIO_E740_PCMCIA_RDY1 6 -#define GPIO_E740_PCMCIA_RST0 27 -#define GPIO_E740_PCMCIA_RST1 24 -#define GPIO_E740_PCMCIA_PWR0 20 -#define GPIO_E740_PCMCIA_PWR1 23 - -/* e750 PCMCIA GPIO definitions */ -#define GPIO_E750_PCMCIA_CD0 8 -#define GPIO_E750_PCMCIA_RDY0 12 -#define GPIO_E750_PCMCIA_RST0 27 -#define GPIO_E750_PCMCIA_PWR0 20 - -/* e800 PCMCIA GPIO definitions */ -#define GPIO_E800_PCMCIA_RST0 69 -#define GPIO_E800_PCMCIA_RST1 72 -#define GPIO_E800_PCMCIA_PWR0 20 -#define GPIO_E800_PCMCIA_PWR1 73 - -/* e7xx IrDA power control */ -#define GPIO_E7XX_IR_ON 38 - -/* ASIC related GPIOs */ -#define GPIO_ESERIES_TMIO_IRQ 5 -#define GPIO_E800_ANGELX_IRQ 8 diff --git a/include/asm-arm/arch-pxa/eseries-irq.h b/include/asm-arm/arch-pxa/eseries-irq.h deleted file mode 100644 index f2a93d5..0000000 --- a/include/asm-arm/arch-pxa/eseries-irq.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * eseries-irq.h - * - * Copyright (C) Ian Molton - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#define ANGELX_IRQ_BASE (IRQ_BOARD_START+8) -#define IRQ_ANGELX(n) (ANGELX_IRQ_BASE + (n)) - -#define ANGELX_RDY0_IRQ IRQ_ANGELX(0) -#define ANGELX_ST0_IRQ IRQ_ANGELX(1) -#define ANGELX_CD0_IRQ IRQ_ANGELX(2) -#define ANGELX_RDY1_IRQ IRQ_ANGELX(3) -#define ANGELX_ST1_IRQ IRQ_ANGELX(4) -#define ANGELX_CD1_IRQ IRQ_ANGELX(5) - -#define TMIO_IRQ_BASE (IRQ_BOARD_START+0) -#define IRQ_TMIO(n) (TMIO_IRQ_BASE + (n)) - -#define TMIO_SD_IRQ IRQ_TMIO(1) -#define TMIO_USB_IRQ IRQ_TMIO(2) - diff --git a/include/asm-arm/arch-pxa/gpio.h b/include/asm-arm/arch-pxa/gpio.h deleted file mode 100644 index 2c1e3d8..0000000 --- a/include/asm-arm/arch-pxa/gpio.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/gpio.h - * - * PXA GPIO wrappers for arch-neutral GPIO calls - * - * Written by Philipp Zabel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_PXA_GPIO_H -#define __ASM_ARCH_PXA_GPIO_H - -#include -#include -#include - -#include - - -/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85). - * Those cases currently cause holes in the GPIO number space. - */ -#define NR_BUILTIN_GPIO 128 - -static inline int gpio_get_value(unsigned gpio) -{ - if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) - return GPLR(gpio) & GPIO_bit(gpio); - else - return __gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) { - if (value) - GPSR(gpio) = GPIO_bit(gpio); - else - GPCR(gpio) = GPIO_bit(gpio); - } else { - __gpio_set_value(gpio, value); - } -} - -#define gpio_cansleep __gpio_cansleep - -#define gpio_to_irq(gpio) IRQ_GPIO(gpio) -#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) - - -#endif diff --git a/include/asm-arm/arch-pxa/gumstix.h b/include/asm-arm/arch-pxa/gumstix.h deleted file mode 100644 index 6fa85c4..0000000 --- a/include/asm-arm/arch-pxa/gumstix.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/gumstix.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -/* BTRESET - Reset line to Bluetooth module, active low signal. */ -#define GPIO_GUMSTIX_BTRESET 7 -#define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT) - - -/* -GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean -interrupt signal for determining cable presence. On the original gumstix, -this is GPIO81, and GPIO83 needs to be defined as well. On the gumstix F, -this moves to GPIO17 and GPIO37. */ - -/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn -has detected a cable insertion; driven low otherwise. */ - -#ifdef CONFIG_ARCH_GUMSTIX_ORIG - -#define GPIO_GUMSTIX_USB_GPIOn 81 -#define GPIO_GUMSTIX_USB_GPIOx 83 - -#else - -#define GPIO_GUMSTIX_USB_GPIOn 35 -#define GPIO_GUMSTIX_USB_GPIOx 41 - -#endif - -/* usb state change */ -#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) - -#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) -#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) -#define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN) - -/* - * SD/MMC definitions - */ -#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ -#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ -#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) - -/* - * SMC Ethernet definitions - * ETH_RST provides a hardware reset line to the ethernet chip - * ETH is the IRQ line in from the ethernet chip to the PXA - */ -#define GPIO_GUMSTIX_ETH0_RST 80 -#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT) -#define GPIO_GUMSTIX_ETH1_RST 52 -#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT) - -#define GPIO_GUMSTIX_ETH0 36 -#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) -#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) -#define GPIO_GUMSTIX_ETH1 27 -#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) -#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) - - -/* CF reset line */ -#define GPIO8_RESET 8 - -/* CF slot 0 */ -#define GPIO4_nBVD1 4 -#define GPIO4_nSTSCHG GPIO4_nBVD1 -#define GPIO11_nCD 11 -#define GPIO26_PRDY_nBSY 26 -#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) -#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) -#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) - -/* CF slot 1 */ -#define GPIO18_nBVD1 18 -#define GPIO18_nSTSCHG GPIO18_nBVD1 -#define GPIO36_nCD 36 -#define GPIO27_PRDY_nBSY 27 -#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) -#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) -#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) - -/* CF GPIO line modes */ -#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) -#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT) -#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN) -#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN) -#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN) -#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN) -#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN) diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h deleted file mode 100644 index 979a456..0000000 --- a/include/asm-arm/arch-pxa/hardware.h +++ /dev/null @@ -1,240 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/hardware.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -/* - * We requires absolute addresses. - */ -#define PCIO_BASE 0 - -/* - * Workarounds for at least 2 errata so far require this. - * The mapping is set in mach-pxa/generic.c. - */ -#define UNCACHED_PHYS_0 0xff000000 -#define UNCACHED_ADDR UNCACHED_PHYS_0 - -/* - * Intel PXA2xx internal register mapping: - * - * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff - * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff - * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff - * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff - * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff - * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff - * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff - * - * Note that not all PXA2xx chips implement all those addresses, and the - * kernel only maps the minimum needed range of this mapping. - */ -#define io_p2v(x) (0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) -#define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) - -#ifndef __ASSEMBLY__ - -# define __REG(x) (*((volatile u32 *)io_p2v(x))) - -/* With indexed regs we don't want to feed the index through io_p2v() - especially if it is a variable, otherwise horrible code will result. */ -# define __REG2(x,y) \ - (*(volatile u32 *)((u32)&__REG(x) + (y))) - -# define __PREG(x) (io_v2p((u32)&(x))) - -#else - -# define __REG(x) io_p2v(x) -# define __PREG(x) io_v2p(x) - -#endif - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_PXA25x -#define __cpu_is_pxa21x(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xf3f; \ - _id == 0x212; \ - }) - -#define __cpu_is_pxa255(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x2d0; \ - }) - -#define __cpu_is_pxa25x(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x2d0 || _id == 0x290; \ - }) -#else -#define __cpu_is_pxa21x(id) (0) -#define __cpu_is_pxa255(id) (0) -#define __cpu_is_pxa25x(id) (0) -#endif - -#ifdef CONFIG_PXA27x -#define __cpu_is_pxa27x(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x411; \ - }) -#else -#define __cpu_is_pxa27x(id) (0) -#endif - -#ifdef CONFIG_CPU_PXA300 -#define __cpu_is_pxa300(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x688; \ - }) -#else -#define __cpu_is_pxa300(id) (0) -#endif - -#ifdef CONFIG_CPU_PXA310 -#define __cpu_is_pxa310(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x689; \ - }) -#else -#define __cpu_is_pxa310(id) (0) -#endif - -#ifdef CONFIG_CPU_PXA320 -#define __cpu_is_pxa320(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x603 || _id == 0x682; \ - }) -#else -#define __cpu_is_pxa320(id) (0) -#endif - -#ifdef CONFIG_CPU_PXA930 -#define __cpu_is_pxa930(id) \ - ({ \ - unsigned int _id = (id) >> 4 & 0xfff; \ - _id == 0x683; \ - }) -#else -#define __cpu_is_pxa930(id) (0) -#endif - -#define cpu_is_pxa21x() \ - ({ \ - __cpu_is_pxa21x(read_cpuid_id()); \ - }) - -#define cpu_is_pxa255() \ - ({ \ - __cpu_is_pxa255(read_cpuid_id()); \ - }) - -#define cpu_is_pxa25x() \ - ({ \ - __cpu_is_pxa25x(read_cpuid_id()); \ - }) - -#define cpu_is_pxa27x() \ - ({ \ - __cpu_is_pxa27x(read_cpuid_id()); \ - }) - -#define cpu_is_pxa300() \ - ({ \ - __cpu_is_pxa300(read_cpuid_id()); \ - }) - -#define cpu_is_pxa310() \ - ({ \ - __cpu_is_pxa310(read_cpuid_id()); \ - }) - -#define cpu_is_pxa320() \ - ({ \ - __cpu_is_pxa320(read_cpuid_id()); \ - }) - -#define cpu_is_pxa930() \ - ({ \ - unsigned int id = read_cpuid(CPUID_ID); \ - __cpu_is_pxa930(id); \ - }) - -/* - * CPUID Core Generation Bit - * <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x - * == 0x3 for pxa300/pxa310/pxa320 - */ -#define __cpu_is_pxa2xx(id) \ - ({ \ - unsigned int _id = (id) >> 13 & 0x7; \ - _id <= 0x2; \ - }) - -#define __cpu_is_pxa3xx(id) \ - ({ \ - unsigned int _id = (id) >> 13 & 0x7; \ - _id == 0x3; \ - }) - -#define cpu_is_pxa2xx() \ - ({ \ - __cpu_is_pxa2xx(read_cpuid_id()); \ - }) - -#define cpu_is_pxa3xx() \ - ({ \ - __cpu_is_pxa3xx(read_cpuid_id()); \ - }) - -/* - * Handy routine to set GPIO alternate functions - */ -extern int pxa_gpio_mode( int gpio_mode ); - -/* - * Return GPIO level, nonzero means high, zero is low - */ -extern int pxa_gpio_get_value(unsigned gpio); - -/* - * Set output GPIO level - */ -extern void pxa_gpio_set_value(unsigned gpio, int value); - -/* - * return current memory and LCD clock frequency in units of 10kHz - */ -extern unsigned int get_memclk_frequency_10khz(void); - -/* - * register GPIO as reset generator - */ -extern int init_gpio_reset(int gpio); - -#endif - -#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) -#define PCIBIOS_MIN_IO 0 -#define PCIBIOS_MIN_MEM 0 -#define pcibios_assign_all_busses() 1 -#endif - -#endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-pxa/i2c.h b/include/asm-arm/arch-pxa/i2c.h deleted file mode 100644 index 80596b0..0000000 --- a/include/asm-arm/arch-pxa/i2c.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * i2c_pxa.h - * - * Copyright (C) 2002 Intrinsyc Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef _I2C_PXA_H_ -#define _I2C_PXA_H_ - -#if 0 -#define DEF_TIMEOUT 3 -#else -/* need a longer timeout if we're dealing with the fact we may well be - * looking at a multi-master environment -*/ -#define DEF_TIMEOUT 32 -#endif - -#define BUS_ERROR (-EREMOTEIO) -#define XFER_NAKED (-ECONNREFUSED) -#define I2C_RETRY (-2000) /* an error has occurred retry transmit */ - -/* ICR initialize bit values -* -* 15. FM 0 (100 Khz operation) -* 14. UR 0 (No unit reset) -* 13. SADIE 0 (Disables the unit from interrupting on slave addresses -* matching its slave address) -* 12. ALDIE 0 (Disables the unit from interrupt when it loses arbitration -* in master mode) -* 11. SSDIE 0 (Disables interrupts from a slave stop detected, in slave mode) -* 10. BEIE 1 (Enable interrupts from detected bus errors, no ACK sent) -* 9. IRFIE 1 (Enable interrupts from full buffer received) -* 8. ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty) -* 7. GCD 1 (Disables i2c unit response to general call messages as a slave) -* 6. IUE 0 (Disable unit until we change settings) -* 5. SCLE 1 (Enables the i2c clock output for master mode (drives SCL) -* 4. MA 0 (Only send stop with the ICR stop bit) -* 3. TB 0 (We are not transmitting a byte initially) -* 2. ACKNAK 0 (Send an ACK after the unit receives a byte) -* 1. STOP 0 (Do not send a STOP) -* 0. START 0 (Do not send a START) -* -*/ -#define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) - -/* I2C status register init values - * - * 10. BED 1 (Clear bus error detected) - * 9. SAD 1 (Clear slave address detected) - * 7. IRF 1 (Clear IDBR Receive Full) - * 6. ITE 1 (Clear IDBR Transmit Empty) - * 5. ALD 1 (Clear Arbitration Loss Detected) - * 4. SSD 1 (Clear Slave Stop Detected) - */ -#define I2C_ISR_INIT 0x7FF /* status register init */ - -struct i2c_slave_client; - -struct i2c_pxa_platform_data { - unsigned int slave_addr; - struct i2c_slave_client *slave; - unsigned int class; - int use_pio; -}; - -extern void pxa_set_i2c_info(struct i2c_pxa_platform_data *info); - -#ifdef CONFIG_PXA27x -extern void pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info); -#endif - -#endif diff --git a/include/asm-arm/arch-pxa/idp.h b/include/asm-arm/arch-pxa/idp.h deleted file mode 100644 index 21aa8ac..0000000 --- a/include/asm-arm/arch-pxa/idp.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/idp.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Copyright (c) 2001 Cliff Brake, Accelent Systems Inc. - * - * 2001-09-13: Cliff Brake - * Initial code - * - * 2005-02-15: Cliff Brake - * - * Changes for 2.6 kernel. - */ - - -/* - * Note: this file must be safe to include in assembly files - * - * Support for the Vibren PXA255 IDP requires rev04 or later - * IDP hardware. - */ - - -#define IDP_FLASH_PHYS (PXA_CS0_PHYS) -#define IDP_ALT_FLASH_PHYS (PXA_CS1_PHYS) -#define IDP_MEDIAQ_PHYS (PXA_CS3_PHYS) -#define IDP_IDE_PHYS (PXA_CS5_PHYS + 0x03000000) -#define IDP_ETH_PHYS (PXA_CS5_PHYS + 0x03400000) -#define IDP_COREVOLT_PHYS (PXA_CS5_PHYS + 0x03800000) -#define IDP_CPLD_PHYS (PXA_CS5_PHYS + 0x03C00000) - - -/* - * virtual memory map - */ - -#define IDP_COREVOLT_VIRT (0xf0000000) -#define IDP_COREVOLT_SIZE (1*1024*1024) - -#define IDP_CPLD_VIRT (IDP_COREVOLT_VIRT + IDP_COREVOLT_SIZE) -#define IDP_CPLD_SIZE (1*1024*1024) - -#if (IDP_CPLD_VIRT + IDP_CPLD_SIZE) > 0xfc000000 -#error Your custom IO space is getting a bit large !! -#endif - -#define CPLD_P2V(x) ((x) - IDP_CPLD_PHYS + IDP_CPLD_VIRT) -#define CPLD_V2P(x) ((x) - IDP_CPLD_VIRT + IDP_CPLD_PHYS) - -#ifndef __ASSEMBLY__ -# define __CPLD_REG(x) (*((volatile unsigned long *)CPLD_P2V(x))) -#else -# define __CPLD_REG(x) CPLD_P2V(x) -#endif - -/* board level registers in the CPLD: (offsets from CPLD_VIRT) */ - -#define _IDP_CPLD_REV (IDP_CPLD_PHYS + 0x00) -#define _IDP_CPLD_PERIPH_PWR (IDP_CPLD_PHYS + 0x04) -#define _IDP_CPLD_LED_CONTROL (IDP_CPLD_PHYS + 0x08) -#define _IDP_CPLD_KB_COL_HIGH (IDP_CPLD_PHYS + 0x0C) -#define _IDP_CPLD_KB_COL_LOW (IDP_CPLD_PHYS + 0x10) -#define _IDP_CPLD_PCCARD_EN (IDP_CPLD_PHYS + 0x14) -#define _IDP_CPLD_GPIOH_DIR (IDP_CPLD_PHYS + 0x18) -#define _IDP_CPLD_GPIOH_VALUE (IDP_CPLD_PHYS + 0x1C) -#define _IDP_CPLD_GPIOL_DIR (IDP_CPLD_PHYS + 0x20) -#define _IDP_CPLD_GPIOL_VALUE (IDP_CPLD_PHYS + 0x24) -#define _IDP_CPLD_PCCARD_PWR (IDP_CPLD_PHYS + 0x28) -#define _IDP_CPLD_MISC_CTRL (IDP_CPLD_PHYS + 0x2C) -#define _IDP_CPLD_LCD (IDP_CPLD_PHYS + 0x30) -#define _IDP_CPLD_FLASH_WE (IDP_CPLD_PHYS + 0x34) - -#define _IDP_CPLD_KB_ROW (IDP_CPLD_PHYS + 0x50) -#define _IDP_CPLD_PCCARD0_STATUS (IDP_CPLD_PHYS + 0x54) -#define _IDP_CPLD_PCCARD1_STATUS (IDP_CPLD_PHYS + 0x58) -#define _IDP_CPLD_MISC_STATUS (IDP_CPLD_PHYS + 0x5C) - -/* FPGA register virtual addresses */ - -#define IDP_CPLD_REV __CPLD_REG(_IDP_CPLD_REV) -#define IDP_CPLD_PERIPH_PWR __CPLD_REG(_IDP_CPLD_PERIPH_PWR) -#define IDP_CPLD_LED_CONTROL __CPLD_REG(_IDP_CPLD_LED_CONTROL) -#define IDP_CPLD_KB_COL_HIGH __CPLD_REG(_IDP_CPLD_KB_COL_HIGH) -#define IDP_CPLD_KB_COL_LOW __CPLD_REG(_IDP_CPLD_KB_COL_LOW) -#define IDP_CPLD_PCCARD_EN __CPLD_REG(_IDP_CPLD_PCCARD_EN) -#define IDP_CPLD_GPIOH_DIR __CPLD_REG(_IDP_CPLD_GPIOH_DIR) -#define IDP_CPLD_GPIOH_VALUE __CPLD_REG(_IDP_CPLD_GPIOH_VALUE) -#define IDP_CPLD_GPIOL_DIR __CPLD_REG(_IDP_CPLD_GPIOL_DIR) -#define IDP_CPLD_GPIOL_VALUE __CPLD_REG(_IDP_CPLD_GPIOL_VALUE) -#define IDP_CPLD_PCCARD_PWR __CPLD_REG(_IDP_CPLD_PCCARD_PWR) -#define IDP_CPLD_MISC_CTRL __CPLD_REG(_IDP_CPLD_MISC_CTRL) -#define IDP_CPLD_LCD __CPLD_REG(_IDP_CPLD_LCD) -#define IDP_CPLD_FLASH_WE __CPLD_REG(_IDP_CPLD_FLASH_WE) - -#define IDP_CPLD_KB_ROW __CPLD_REG(_IDP_CPLD_KB_ROW) -#define IDP_CPLD_PCCARD0_STATUS __CPLD_REG(_IDP_CPLD_PCCARD0_STATUS) -#define IDP_CPLD_PCCARD1_STATUS __CPLD_REG(_IDP_CPLD_PCCARD1_STATUS) -#define IDP_CPLD_MISC_STATUS __CPLD_REG(_IDP_CPLD_MISC_STATUS) - - -/* - * Bit masks for various registers - */ - -// IDP_CPLD_PCCARD_PWR -#define PCC0_PWR0 (1 << 0) -#define PCC0_PWR1 (1 << 1) -#define PCC0_PWR2 (1 << 2) -#define PCC0_PWR3 (1 << 3) -#define PCC1_PWR0 (1 << 4) -#define PCC1_PWR1 (1 << 5) -#define PCC1_PWR2 (1 << 6) -#define PCC1_PWR3 (1 << 7) - -// IDP_CPLD_PCCARD_EN -#define PCC0_RESET (1 << 6) -#define PCC1_RESET (1 << 7) -#define PCC0_ENABLE (1 << 0) -#define PCC1_ENABLE (1 << 1) - -// IDP_CPLD_PCCARDx_STATUS -#define _PCC_WRPROT (1 << 7) // 7-4 read as low true -#define _PCC_RESET (1 << 6) -#define _PCC_IRQ (1 << 5) -#define _PCC_INPACK (1 << 4) -#define PCC_BVD2 (1 << 3) -#define PCC_BVD1 (1 << 2) -#define PCC_VS2 (1 << 1) -#define PCC_VS1 (1 << 0) - -#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x))) - -/* A listing of interrupts used by external hardware devices */ - -#define TOUCH_PANEL_IRQ IRQ_GPIO(5) -#define IDE_IRQ IRQ_GPIO(21) - -#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING - -#define ETHERNET_IRQ IRQ_GPIO(4) -#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) -#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH - -#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) -#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH - -#define PCMCIA_S0_RDYINT IRQ_GPIO(19) -#define PCMCIA_S1_RDYINT IRQ_GPIO(22) - - -/* - * Macros for LED Driver - */ - -/* leds 0 = ON */ -#define IDP_HB_LED (1<<5) -#define IDP_BUSY_LED (1<<6) - -#define IDP_LEDS_MASK (IDP_HB_LED | IDP_BUSY_LED) - -/* - * macros for MTD driver - */ - -#define FLASH_WRITE_PROTECT_DISABLE() ((IDP_CPLD_FLASH_WE) &= ~(0x1)) -#define FLASH_WRITE_PROTECT_ENABLE() ((IDP_CPLD_FLASH_WE) |= (0x1)) - -/* - * macros for matrix keyboard driver - */ - -#define KEYBD_MATRIX_NUMBER_INPUTS 7 -#define KEYBD_MATRIX_NUMBER_OUTPUTS 14 - -#define KEYBD_MATRIX_INVERT_OUTPUT_LOGIC FALSE -#define KEYBD_MATRIX_INVERT_INPUT_LOGIC FALSE - -#define KEYBD_MATRIX_SETTLING_TIME_US 100 -#define KEYBD_MATRIX_KEYSTATE_DEBOUNCE_CONSTANT 2 - -#define KEYBD_MATRIX_SET_OUTPUTS(outputs) \ -{\ - IDP_CPLD_KB_COL_LOW = outputs;\ - IDP_CPLD_KB_COL_HIGH = outputs >> 7;\ -} - -#define KEYBD_MATRIX_GET_INPUTS(inputs) \ -{\ - inputs = (IDP_CPLD_KB_ROW & 0x7f);\ -} - - diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h deleted file mode 100644 index af34e0f..0000000 --- a/include/asm-arm/arch-pxa/io.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/io.h - * - * Copied from asm/arch/sa1100/io.h - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -#define __io(a) ((void __iomem *)(a)) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h deleted file mode 100644 index 0a50c3c..0000000 --- a/include/asm-arm/arch-pxa/irda.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef ASMARM_ARCH_IRDA_H -#define ASMARM_ARCH_IRDA_H - -/* board specific transceiver capabilities */ - -#define IR_OFF 1 -#define IR_SIRMODE 2 -#define IR_FIRMODE 4 - -struct pxaficp_platform_data { - int transceiver_cap; - void (*transceiver_mode)(struct device *dev, int mode); - int (*startup)(struct device *dev); - void (*shutdown)(struct device *dev); -}; - -extern void pxa_set_ficp_info(struct pxaficp_platform_data *info); - -#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) -void pxa2xx_transceiver_mode(struct device *dev, int mode); -#endif - -#endif diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h deleted file mode 100644 index 9413121..0000000 --- a/include/asm-arm/arch-pxa/irqs.h +++ /dev/null @@ -1,264 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/irqs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -#define PXA_IRQ(x) (x) - -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ -#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ -#define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ -#define IRQ_USBH1 PXA_IRQ(3) /* USB Host interrupt 2 (non-OHCI) */ -#define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ -#define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ -#define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ -#endif - -#define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ -#define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ -#define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ -#define IRQ_GPIO1 PXA_IRQ(9) /* GPIO1 Edge Detect */ -#define IRQ_GPIO_2_x PXA_IRQ(10) /* GPIO[2-x] Edge Detect */ -#define IRQ_USB PXA_IRQ(11) /* USB Service */ -#define IRQ_PMU PXA_IRQ(12) /* Performance Monitoring Unit */ -#define IRQ_I2S PXA_IRQ(13) /* I2S Interrupt */ -#define IRQ_AC97 PXA_IRQ(14) /* AC97 Interrupt */ -#define IRQ_ASSP PXA_IRQ(15) /* Audio SSP Service Request (PXA25x) */ -#define IRQ_USIM PXA_IRQ(15) /* Smart Card interface interrupt (PXA27x) */ -#define IRQ_NSSP PXA_IRQ(16) /* Network SSP Service Request (PXA25x) */ -#define IRQ_SSP2 PXA_IRQ(16) /* SSP2 interrupt (PXA27x) */ -#define IRQ_LCD PXA_IRQ(17) /* LCD Controller Service Request */ -#define IRQ_I2C PXA_IRQ(18) /* I2C Service Request */ -#define IRQ_ICP PXA_IRQ(19) /* ICP Transmit/Receive/Error */ -#define IRQ_STUART PXA_IRQ(20) /* STUART Transmit/Receive/Error */ -#define IRQ_BTUART PXA_IRQ(21) /* BTUART Transmit/Receive/Error */ -#define IRQ_FFUART PXA_IRQ(22) /* FFUART Transmit/Receive/Error*/ -#define IRQ_MMC PXA_IRQ(23) /* MMC Status/Error Detection */ -#define IRQ_SSP PXA_IRQ(24) /* SSP Service Request */ -#define IRQ_DMA PXA_IRQ(25) /* DMA Channel Service Request */ -#define IRQ_OST0 PXA_IRQ(26) /* OS Timer match 0 */ -#define IRQ_OST1 PXA_IRQ(27) /* OS Timer match 1 */ -#define IRQ_OST2 PXA_IRQ(28) /* OS Timer match 2 */ -#define IRQ_OST3 PXA_IRQ(29) /* OS Timer match 3 */ -#define IRQ_RTC1Hz PXA_IRQ(30) /* RTC HZ Clock Tick */ -#define IRQ_RTCAlrm PXA_IRQ(31) /* RTC Alarm */ - -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -#define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ -#define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ -#endif - -#ifdef CONFIG_PXA3xx -#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ -#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ -#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ -#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ -#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ -#define IRQ_MMC2 PXA_IRQ(41) /* MMC2 Controller */ -#define IRQ_1WIRE PXA_IRQ(44) /* 1-Wire Controller */ -#define IRQ_NAND PXA_IRQ(45) /* NAND Controller */ -#define IRQ_USB2 PXA_IRQ(46) /* USB 2.0 Device Controller */ -#define IRQ_WAKEUP0 PXA_IRQ(49) /* EXT_WAKEUP0 */ -#define IRQ_WAKEUP1 PXA_IRQ(50) /* EXT_WAKEUP1 */ -#define IRQ_DMEMC PXA_IRQ(51) /* Dynamic Memory Controller */ -#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ -#endif - -#define PXA_GPIO_IRQ_BASE (64) -#define PXA_GPIO_IRQ_NUM (128) - -#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) -#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) - -#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) -#define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) - -/* - * The next 16 interrupts are for board specific purposes. Since - * the kernel can only run on one machine at a time, we can re-use - * these. If you need more, increase IRQ_BOARD_END, but keep it - * within sensible limits. - */ -#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) -#define IRQ_BOARD_END (IRQ_BOARD_START + 16) - -#define IRQ_SA1111_START (IRQ_BOARD_END) -#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) -#define IRQ_GPAIN1 (IRQ_BOARD_END + 1) -#define IRQ_GPAIN2 (IRQ_BOARD_END + 2) -#define IRQ_GPAIN3 (IRQ_BOARD_END + 3) -#define IRQ_GPBIN0 (IRQ_BOARD_END + 4) -#define IRQ_GPBIN1 (IRQ_BOARD_END + 5) -#define IRQ_GPBIN2 (IRQ_BOARD_END + 6) -#define IRQ_GPBIN3 (IRQ_BOARD_END + 7) -#define IRQ_GPBIN4 (IRQ_BOARD_END + 8) -#define IRQ_GPBIN5 (IRQ_BOARD_END + 9) -#define IRQ_GPCIN0 (IRQ_BOARD_END + 10) -#define IRQ_GPCIN1 (IRQ_BOARD_END + 11) -#define IRQ_GPCIN2 (IRQ_BOARD_END + 12) -#define IRQ_GPCIN3 (IRQ_BOARD_END + 13) -#define IRQ_GPCIN4 (IRQ_BOARD_END + 14) -#define IRQ_GPCIN5 (IRQ_BOARD_END + 15) -#define IRQ_GPCIN6 (IRQ_BOARD_END + 16) -#define IRQ_GPCIN7 (IRQ_BOARD_END + 17) -#define IRQ_MSTXINT (IRQ_BOARD_END + 18) -#define IRQ_MSRXINT (IRQ_BOARD_END + 19) -#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) -#define IRQ_TPTXINT (IRQ_BOARD_END + 21) -#define IRQ_TPRXINT (IRQ_BOARD_END + 22) -#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) -#define SSPXMTINT (IRQ_BOARD_END + 24) -#define SSPRCVINT (IRQ_BOARD_END + 25) -#define SSPROR (IRQ_BOARD_END + 26) -#define AUDXMTDMADONEA (IRQ_BOARD_END + 32) -#define AUDRCVDMADONEA (IRQ_BOARD_END + 33) -#define AUDXMTDMADONEB (IRQ_BOARD_END + 34) -#define AUDRCVDMADONEB (IRQ_BOARD_END + 35) -#define AUDTFSR (IRQ_BOARD_END + 36) -#define AUDRFSR (IRQ_BOARD_END + 37) -#define AUDTUR (IRQ_BOARD_END + 38) -#define AUDROR (IRQ_BOARD_END + 39) -#define AUDDTS (IRQ_BOARD_END + 40) -#define AUDRDD (IRQ_BOARD_END + 41) -#define AUDSTO (IRQ_BOARD_END + 42) -#define IRQ_USBPWR (IRQ_BOARD_END + 43) -#define IRQ_HCIM (IRQ_BOARD_END + 44) -#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) -#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) -#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) -#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) -#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) -#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) -#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) -#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) -#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) -#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) - -#define IRQ_LOCOMO_START (IRQ_BOARD_END) -#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) -#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) -#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) -#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) -#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) -#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) -#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) -#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) -#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) -#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) -#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) -#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) -#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) -#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) -#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) -#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) -#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) -#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) -#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) -#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) -#define IRQ_LOCOMO_SPI_OVRN (IRQ_BOARD_END + 20) -#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) - -/* - * Figure out the MAX IRQ number. - * - * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. - * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 - * Otherwise, we have the standard IRQs only. - */ -#ifdef CONFIG_SA1111 -#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) -#elif defined(CONFIG_SHARP_LOCOMO) -#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) -#elif defined(CONFIG_ARCH_LUBBOCK) || \ - defined(CONFIG_MACH_LOGICPD_PXA270) || \ - defined(CONFIG_MACH_TOSA) || \ - defined(CONFIG_MACH_MAINSTONE) || \ - defined(CONFIG_MACH_PCM027) || \ - defined(CONFIG_MACH_MAGICIAN) -#define NR_IRQS (IRQ_BOARD_END) -#elif defined(CONFIG_MACH_ZYLONITE) -#define NR_IRQS (IRQ_BOARD_START + 32) -#else -#define NR_IRQS (IRQ_BOARD_START) -#endif - -/* - * Board specific IRQs. Define them here. - * Do not surround them with ifdefs. - */ -#define LUBBOCK_IRQ(x) (IRQ_BOARD_START + (x)) -#define LUBBOCK_SD_IRQ LUBBOCK_IRQ(0) -#define LUBBOCK_SA1111_IRQ LUBBOCK_IRQ(1) -#define LUBBOCK_USB_IRQ LUBBOCK_IRQ(2) /* usb connect */ -#define LUBBOCK_ETH_IRQ LUBBOCK_IRQ(3) -#define LUBBOCK_UCB1400_IRQ LUBBOCK_IRQ(4) -#define LUBBOCK_BB_IRQ LUBBOCK_IRQ(5) -#define LUBBOCK_USB_DISC_IRQ LUBBOCK_IRQ(6) /* usb disconnect */ -#define LUBBOCK_LAST_IRQ LUBBOCK_IRQ(6) - -#define LPD270_IRQ(x) (IRQ_BOARD_START + (x)) -#define LPD270_USBC_IRQ LPD270_IRQ(2) -#define LPD270_ETHERNET_IRQ LPD270_IRQ(3) -#define LPD270_AC97_IRQ LPD270_IRQ(4) - -#define MAINSTONE_IRQ(x) (IRQ_BOARD_START + (x)) -#define MAINSTONE_MMC_IRQ MAINSTONE_IRQ(0) -#define MAINSTONE_USIM_IRQ MAINSTONE_IRQ(1) -#define MAINSTONE_USBC_IRQ MAINSTONE_IRQ(2) -#define MAINSTONE_ETHERNET_IRQ MAINSTONE_IRQ(3) -#define MAINSTONE_AC97_IRQ MAINSTONE_IRQ(4) -#define MAINSTONE_PEN_IRQ MAINSTONE_IRQ(5) -#define MAINSTONE_MSINS_IRQ MAINSTONE_IRQ(6) -#define MAINSTONE_EXBRD_IRQ MAINSTONE_IRQ(7) -#define MAINSTONE_S0_CD_IRQ MAINSTONE_IRQ(9) -#define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10) -#define MAINSTONE_S0_IRQ MAINSTONE_IRQ(11) -#define MAINSTONE_S1_CD_IRQ MAINSTONE_IRQ(13) -#define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14) -#define MAINSTONE_S1_IRQ MAINSTONE_IRQ(15) - -/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ -#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) -#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) -#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) -#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) - -/* phyCORE-PXA270 (PCM027) Interrupts */ -#define PCM027_IRQ(x) (IRQ_BOARD_START + (x)) -#define PCM027_BTDET_IRQ PCM027_IRQ(0) -#define PCM027_FF_RI_IRQ PCM027_IRQ(1) -#define PCM027_MMCDET_IRQ PCM027_IRQ(2) -#define PCM027_PM_5V_IRQ PCM027_IRQ(3) - -/* ITE8152 irqs */ -/* add IT8152 IRQs beyond BOARD_END */ -#ifdef CONFIG_PCI_HOST_ITE8152 -#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) - -/* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ -#define IT8152_LD_IRQ_COUNT 9 -#define IT8152_LP_IRQ_COUNT 16 -#define IT8152_PD_IRQ_COUNT 15 - -/* Priorities: */ -#define IT8152_PD_IRQ(i) IT8152_IRQ(i) -#define IT8152_LP_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT) -#define IT8152_LD_IRQ(i) (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT) - -#define IT8152_LAST_IRQ IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1) - -#if NR_IRQS < (IT8152_LAST_IRQ+1) -#undef NR_IRQS -#define NR_IRQS (IT8152_LAST_IRQ+1) -#endif - -#endif /* CONFIG_PCI_HOST_ITE8152 */ diff --git a/include/asm-arm/arch-pxa/littleton.h b/include/asm-arm/arch-pxa/littleton.h deleted file mode 100644 index 79d209b..0000000 --- a/include/asm-arm/arch-pxa/littleton.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __ASM_ARCH_ZYLONITE_H -#define __ASM_ARCH_ZYLONITE_H - -#define LITTLETON_ETH_PHYS 0x30000000 - -#endif /* __ASM_ARCH_ZYLONITE_H */ diff --git a/include/asm-arm/arch-pxa/lpd270.h b/include/asm-arm/arch-pxa/lpd270.h deleted file mode 100644 index 501d240..0000000 --- a/include/asm-arm/arch-pxa/lpd270.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * include/asm-arm/arch-pxa/lpd270.h - * - * Author: Lennert Buytenhek - * Created: Feb 10, 2006 - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_LPD270_H -#define __ASM_ARCH_LPD270_H - -#define LPD270_CPLD_PHYS PXA_CS2_PHYS -#define LPD270_CPLD_VIRT 0xf0000000 -#define LPD270_CPLD_SIZE 0x00100000 - -#define LPD270_ETH_PHYS (PXA_CS2_PHYS + 0x01000000) - -/* CPLD registers */ -#define LPD270_CPLD_REG(x) ((unsigned long)(LPD270_CPLD_VIRT + (x))) -#define LPD270_CONTROL LPD270_CPLD_REG(0x00) -#define LPD270_PERIPHERAL0 LPD270_CPLD_REG(0x04) -#define LPD270_PERIPHERAL1 LPD270_CPLD_REG(0x08) -#define LPD270_CPLD_REVISION LPD270_CPLD_REG(0x14) -#define LPD270_EEPROM_SPI_ITF LPD270_CPLD_REG(0x20) -#define LPD270_MODE_PINS LPD270_CPLD_REG(0x24) -#define LPD270_EGPIO LPD270_CPLD_REG(0x30) -#define LPD270_INT_MASK LPD270_CPLD_REG(0x40) -#define LPD270_INT_STATUS LPD270_CPLD_REG(0x50) - -#define LPD270_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ -#define LPD270_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ -#define LPD270_INT_USBC (1 << 2) /* USB client cable detection IRQ */ - - -#endif diff --git a/include/asm-arm/arch-pxa/lubbock.h b/include/asm-arm/arch-pxa/lubbock.h deleted file mode 100644 index 11ee735..0000000 --- a/include/asm-arm/arch-pxa/lubbock.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/lubbock.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define LUBBOCK_ETH_PHYS PXA_CS3_PHYS - -#define LUBBOCK_FPGA_PHYS PXA_CS2_PHYS -#define LUBBOCK_FPGA_VIRT (0xf0000000) -#define LUB_P2V(x) ((x) - LUBBOCK_FPGA_PHYS + LUBBOCK_FPGA_VIRT) -#define LUB_V2P(x) ((x) - LUBBOCK_FPGA_VIRT + LUBBOCK_FPGA_PHYS) - -#ifndef __ASSEMBLY__ -# define __LUB_REG(x) (*((volatile unsigned long *)LUB_P2V(x))) -#else -# define __LUB_REG(x) LUB_P2V(x) -#endif - -/* FPGA register virtual addresses */ -#define LUB_WHOAMI __LUB_REG(LUBBOCK_FPGA_PHYS + 0x000) -#define LUB_HEXLED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x010) -#define LUB_DISC_BLNK_LED __LUB_REG(LUBBOCK_FPGA_PHYS + 0x040) -#define LUB_CONF_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x050) -#define LUB_USER_SWITCHES __LUB_REG(LUBBOCK_FPGA_PHYS + 0x060) -#define LUB_MISC_WR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x080) -#define LUB_MISC_RD __LUB_REG(LUBBOCK_FPGA_PHYS + 0x090) -#define LUB_IRQ_MASK_EN __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0c0) -#define LUB_IRQ_SET_CLR __LUB_REG(LUBBOCK_FPGA_PHYS + 0x0d0) -#define LUB_GP __LUB_REG(LUBBOCK_FPGA_PHYS + 0x100) - -#ifndef __ASSEMBLY__ -extern void lubbock_set_misc_wr(unsigned int mask, unsigned int set); -#endif diff --git a/include/asm-arm/arch-pxa/magician.h b/include/asm-arm/arch-pxa/magician.h deleted file mode 100644 index 169b374..0000000 --- a/include/asm-arm/arch-pxa/magician.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * GPIO and IRQ definitions for HTC Magician PDA phones - * - * Copyright (c) 2007 Philipp Zabel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _MAGICIAN_H_ -#define _MAGICIAN_H_ - -#include - -/* - * PXA GPIOs - */ - -#define GPIO0_MAGICIAN_KEY_POWER 0 -#define GPIO9_MAGICIAN_UNKNOWN 9 -#define GPIO10_MAGICIAN_GSM_IRQ 10 -#define GPIO11_MAGICIAN_GSM_OUT1 11 -#define GPIO13_MAGICIAN_CPLD_IRQ 13 -#define GPIO18_MAGICIAN_UNKNOWN 18 -#define GPIO22_MAGICIAN_VIBRA_EN 22 -#define GPIO26_MAGICIAN_GSM_POWER 26 -#define GPIO27_MAGICIAN_USBC_PUEN 27 -#define GPIO30_MAGICIAN_nCHARGE_EN 30 -#define GPIO37_MAGICIAN_KEY_HANGUP 37 -#define GPIO38_MAGICIAN_KEY_CONTACTS 38 -#define GPIO40_MAGICIAN_GSM_OUT2 40 -#define GPIO48_MAGICIAN_UNKNOWN 48 -#define GPIO56_MAGICIAN_UNKNOWN 56 -#define GPIO57_MAGICIAN_CAM_RESET 57 -#define GPIO75_MAGICIAN_SAMSUNG_POWER 75 -#define GPIO83_MAGICIAN_nIR_EN 83 -#define GPIO86_MAGICIAN_GSM_RESET 86 -#define GPIO87_MAGICIAN_GSM_SELECT 87 -#define GPIO90_MAGICIAN_KEY_CALENDAR 90 -#define GPIO91_MAGICIAN_KEY_CAMERA 91 -#define GPIO93_MAGICIAN_KEY_UP 93 -#define GPIO94_MAGICIAN_KEY_DOWN 94 -#define GPIO95_MAGICIAN_KEY_LEFT 95 -#define GPIO96_MAGICIAN_KEY_RIGHT 96 -#define GPIO97_MAGICIAN_KEY_ENTER 97 -#define GPIO98_MAGICIAN_KEY_RECORD 98 -#define GPIO99_MAGICIAN_HEADPHONE_IN 99 -#define GPIO100_MAGICIAN_KEY_VOL_UP 100 -#define GPIO101_MAGICIAN_KEY_VOL_DOWN 101 -#define GPIO102_MAGICIAN_KEY_PHONE 102 -#define GPIO103_MAGICIAN_LED_KP 103 -#define GPIO104_MAGICIAN_LCD_POWER_1 104 -#define GPIO105_MAGICIAN_LCD_POWER_2 105 -#define GPIO106_MAGICIAN_LCD_POWER_3 106 -#define GPIO107_MAGICIAN_DS1WM_IRQ 107 -#define GPIO108_MAGICIAN_GSM_READY 108 -#define GPIO114_MAGICIAN_UNKNOWN 114 -#define GPIO115_MAGICIAN_nPEN_IRQ 115 -#define GPIO116_MAGICIAN_nCAM_EN 116 -#define GPIO119_MAGICIAN_UNKNOWN 119 -#define GPIO120_MAGICIAN_UNKNOWN 120 - -/* - * CPLD IRQs - */ - -#define IRQ_MAGICIAN_SD (IRQ_BOARD_START + 0) -#define IRQ_MAGICIAN_EP (IRQ_BOARD_START + 1) -#define IRQ_MAGICIAN_BT (IRQ_BOARD_START + 2) -#define IRQ_MAGICIAN_AC (IRQ_BOARD_START + 3) - -/* - * CPLD EGPIOs - */ - -#define MAGICIAN_EGPIO_BASE 0x80 /* GPIO_BOARD_START */ -#define MAGICIAN_EGPIO(reg,bit) \ - (MAGICIAN_EGPIO_BASE + 8*reg + bit) - -/* output */ - -#define EGPIO_MAGICIAN_TOPPOLY_POWER MAGICIAN_EGPIO(0, 2) -#define EGPIO_MAGICIAN_LED_POWER MAGICIAN_EGPIO(0, 5) -#define EGPIO_MAGICIAN_GSM_RESET MAGICIAN_EGPIO(0, 6) -#define EGPIO_MAGICIAN_LCD_POWER MAGICIAN_EGPIO(0, 7) -#define EGPIO_MAGICIAN_SPK_POWER MAGICIAN_EGPIO(1, 0) -#define EGPIO_MAGICIAN_EP_POWER MAGICIAN_EGPIO(1, 1) -#define EGPIO_MAGICIAN_IN_SEL0 MAGICIAN_EGPIO(1, 2) -#define EGPIO_MAGICIAN_IN_SEL1 MAGICIAN_EGPIO(1, 3) -#define EGPIO_MAGICIAN_MIC_POWER MAGICIAN_EGPIO(1, 4) -#define EGPIO_MAGICIAN_CODEC_RESET MAGICIAN_EGPIO(1, 5) -#define EGPIO_MAGICIAN_CODEC_POWER MAGICIAN_EGPIO(1, 6) -#define EGPIO_MAGICIAN_BL_POWER MAGICIAN_EGPIO(1, 7) -#define EGPIO_MAGICIAN_SD_POWER MAGICIAN_EGPIO(2, 0) -#define EGPIO_MAGICIAN_CARKIT_MIC MAGICIAN_EGPIO(2, 1) -#define EGPIO_MAGICIAN_UNKNOWN_WAVEDEV_DLL MAGICIAN_EGPIO(2, 2) -#define EGPIO_MAGICIAN_FLASH_VPP MAGICIAN_EGPIO(2, 3) -#define EGPIO_MAGICIAN_BL_POWER2 MAGICIAN_EGPIO(2, 4) -#define EGPIO_MAGICIAN_CHARGE_EN MAGICIAN_EGPIO(2, 5) -#define EGPIO_MAGICIAN_GSM_POWER MAGICIAN_EGPIO(2, 7) - -/* input */ - -#define EGPIO_MAGICIAN_CABLE_STATE_AC MAGICIAN_EGPIO(4, 0) -#define EGPIO_MAGICIAN_CABLE_STATE_USB MAGICIAN_EGPIO(4, 1) - -#define EGPIO_MAGICIAN_BOARD_ID0 MAGICIAN_EGPIO(5, 0) -#define EGPIO_MAGICIAN_BOARD_ID1 MAGICIAN_EGPIO(5, 1) -#define EGPIO_MAGICIAN_BOARD_ID2 MAGICIAN_EGPIO(5, 2) -#define EGPIO_MAGICIAN_LCD_SELECT MAGICIAN_EGPIO(5, 3) -#define EGPIO_MAGICIAN_nSD_READONLY MAGICIAN_EGPIO(5, 4) - -#define EGPIO_MAGICIAN_EP_INSERT MAGICIAN_EGPIO(6, 1) - -#endif /* _MAGICIAN_H_ */ diff --git a/include/asm-arm/arch-pxa/mainstone.h b/include/asm-arm/arch-pxa/mainstone.h deleted file mode 100644 index 14c862a..0000000 --- a/include/asm-arm/arch-pxa/mainstone.h +++ /dev/null @@ -1,120 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/mainstone.h - * - * Author: Nicolas Pitre - * Created: Nov 14, 2002 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef ASM_ARCH_MAINSTONE_H -#define ASM_ARCH_MAINSTONE_H - -#define MST_ETH_PHYS PXA_CS4_PHYS - -#define MST_FPGA_PHYS PXA_CS2_PHYS -#define MST_FPGA_VIRT (0xf0000000) -#define MST_P2V(x) ((x) - MST_FPGA_PHYS + MST_FPGA_VIRT) -#define MST_V2P(x) ((x) - MST_FPGA_VIRT + MST_FPGA_PHYS) - -#ifndef __ASSEMBLY__ -# define __MST_REG(x) (*((volatile unsigned long *)MST_P2V(x))) -#else -# define __MST_REG(x) MST_P2V(x) -#endif - -/* board level registers in the FPGA */ - -#define MST_LEDDAT1 __MST_REG(0x08000010) -#define MST_LEDDAT2 __MST_REG(0x08000014) -#define MST_LEDCTRL __MST_REG(0x08000040) -#define MST_GPSWR __MST_REG(0x08000060) -#define MST_MSCWR1 __MST_REG(0x08000080) -#define MST_MSCWR2 __MST_REG(0x08000084) -#define MST_MSCWR3 __MST_REG(0x08000088) -#define MST_MSCRD __MST_REG(0x08000090) -#define MST_INTMSKENA __MST_REG(0x080000c0) -#define MST_INTSETCLR __MST_REG(0x080000d0) -#define MST_PCMCIA0 __MST_REG(0x080000e0) -#define MST_PCMCIA1 __MST_REG(0x080000e4) - -#define MST_MSCWR1_CAMERA_ON (1 << 15) /* Camera interface power control */ -#define MST_MSCWR1_CAMERA_SEL (1 << 14) /* Camera interface mux control */ -#define MST_MSCWR1_LCD_CTL (1 << 13) /* General-purpose LCD control */ -#define MST_MSCWR1_MS_ON (1 << 12) /* Memory Stick power control */ -#define MST_MSCWR1_MMC_ON (1 << 11) /* MultiMediaCard* power control */ -#define MST_MSCWR1_MS_SEL (1 << 10) /* SD/MS multiplexer control */ -#define MST_MSCWR1_BB_SEL (1 << 9) /* PCMCIA/Baseband multiplexer */ -#define MST_MSCWR1_BT_ON (1 << 8) /* Bluetooth UART transceiver */ -#define MST_MSCWR1_BTDTR (1 << 7) /* Bluetooth UART DTR */ - -#define MST_MSCWR1_IRDA_MASK (3 << 5) /* IrDA transceiver mode */ -#define MST_MSCWR1_IRDA_FULL (0 << 5) /* full distance power */ -#define MST_MSCWR1_IRDA_OFF (1 << 5) /* shutdown */ -#define MST_MSCWR1_IRDA_MED (2 << 5) /* 2/3 distance power */ -#define MST_MSCWR1_IRDA_LOW (3 << 5) /* 1/3 distance power */ - -#define MST_MSCWR1_IRDA_FIR (1 << 4) /* IrDA transceiver SIR/FIR */ -#define MST_MSCWR1_GREENLED (1 << 3) /* LED D1 control */ -#define MST_MSCWR1_PDC_CTL (1 << 2) /* reserved */ -#define MST_MSCWR1_MTR_ON (1 << 1) /* Silent alert motor */ -#define MST_MSCWR1_SYSRESET (1 << 0) /* System reset */ - -#define MST_MSCWR2_USB_OTG_RST (1 << 6) /* USB On The Go reset */ -#define MST_MSCWR2_USB_OTG_SEL (1 << 5) /* USB On The Go control */ -#define MST_MSCWR2_nUSBC_SC (1 << 4) /* USB client soft connect control */ -#define MST_MSCWR2_I2S_SPKROFF (1 << 3) /* I2S CODEC amplifier control */ -#define MST_MSCWR2_AC97_SPKROFF (1 << 2) /* AC97 CODEC amplifier control */ -#define MST_MSCWR2_RADIO_PWR (1 << 1) /* Radio module power control */ -#define MST_MSCWR2_RADIO_WAKE (1 << 0) /* Radio module wake-up signal */ - -#define MST_MSCWR3_GPIO_RESET_EN (1 << 2) /* Enable GPIO Reset */ -#define MST_MSCWR3_GPIO_RESET (1 << 1) /* Initiate a GPIO Reset */ -#define MST_MSCWR3_COMMS_SW_RESET (1 << 0) /* Communications Processor Reset Control */ - -#define MST_MSCRD_nPENIRQ (1 << 9) /* ADI7873* nPENIRQ signal */ -#define MST_MSCRD_nMEMSTK_CD (1 << 8) /* Memory Stick detection signal */ -#define MST_MSCRD_nMMC_CD (1 << 7) /* SD/MMC card detection signal */ -#define MST_MSCRD_nUSIM_CD (1 << 6) /* USIM card detection signal */ -#define MST_MSCRD_USB_CBL (1 << 5) /* USB client cable status */ -#define MST_MSCRD_TS_BUSY (1 << 4) /* ADI7873 busy */ -#define MST_MSCRD_BTDSR (1 << 3) /* Bluetooth UART DSR */ -#define MST_MSCRD_BTRI (1 << 2) /* Bluetooth UART Ring Indicator */ -#define MST_MSCRD_BTDCD (1 << 1) /* Bluetooth UART DCD */ -#define MST_MSCRD_nMMC_WP (1 << 0) /* SD/MMC write-protect status */ - -#define MST_INT_S1_IRQ (1 << 15) /* PCMCIA socket 1 IRQ */ -#define MST_INT_S1_STSCHG (1 << 14) /* PCMCIA socket 1 status changed */ -#define MST_INT_S1_CD (1 << 13) /* PCMCIA socket 1 card detection */ -#define MST_INT_S0_IRQ (1 << 11) /* PCMCIA socket 0 IRQ */ -#define MST_INT_S0_STSCHG (1 << 10) /* PCMCIA socket 0 status changed */ -#define MST_INT_S0_CD (1 << 9) /* PCMCIA socket 0 card detection */ -#define MST_INT_nEXBRD_INT (1 << 7) /* Expansion board IRQ */ -#define MST_INT_MSINS (1 << 6) /* Memory Stick* detection */ -#define MST_INT_PENIRQ (1 << 5) /* ADI7873* touch-screen IRQ */ -#define MST_INT_AC97 (1 << 4) /* AC'97 CODEC IRQ */ -#define MST_INT_ETHERNET (1 << 3) /* Ethernet controller IRQ */ -#define MST_INT_USBC (1 << 2) /* USB client cable detection IRQ */ -#define MST_INT_USIM (1 << 1) /* USIM card detection IRQ */ -#define MST_INT_MMC (1 << 0) /* MMC/SD card detection IRQ */ - -#define MST_PCMCIA_nIRQ (1 << 10) /* IRQ / ready signal */ -#define MST_PCMCIA_nSPKR_BVD2 (1 << 9) /* VDD sense / digital speaker */ -#define MST_PCMCIA_nSTSCHG_BVD1 (1 << 8) /* VDD sense / card status changed */ -#define MST_PCMCIA_nVS2 (1 << 7) /* VSS voltage sense */ -#define MST_PCMCIA_nVS1 (1 << 6) /* VSS voltage sense */ -#define MST_PCMCIA_nCD (1 << 5) /* Card detection signal */ -#define MST_PCMCIA_RESET (1 << 4) /* Card reset signal */ -#define MST_PCMCIA_PWR_MASK (0x000f) /* MAX1602 power-supply controls */ - -#define MST_PCMCIA_PWR_VPP_0 0x0 /* voltage VPP = 0V */ -#define MST_PCMCIA_PWR_VPP_120 0x2 /* voltage VPP = 12V*/ -#define MST_PCMCIA_PWR_VPP_VCC 0x1 /* voltage VPP = VCC */ -#define MST_PCMCIA_PWR_VCC_0 0x0 /* voltage VCC = 0V */ -#define MST_PCMCIA_PWR_VCC_33 0x8 /* voltage VCC = 3.3V */ -#define MST_PCMCIA_PWR_VCC_50 0x4 /* voltage VCC = 5.0V */ - -#endif diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h deleted file mode 100644 index bee81d6..0000000 --- a/include/asm-arm/arch-pxa/memory.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/memory.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0xa0000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * The nodes are matched with the physical SDRAM banks as follows: - * - * node 0: 0xa0000000-0xa3ffffff --> 0xc0000000-0xc3ffffff - * node 1: 0xa4000000-0xa7ffffff --> 0xc4000000-0xc7ffffff - * node 2: 0xa8000000-0xabffffff --> 0xc8000000-0xcbffffff - * node 3: 0xac000000-0xafffffff --> 0xcc000000-0xcfffffff - * - * This needs a node mem size of 26 bits. - */ -#define NODE_MEM_SIZE_BITS 26 - -#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) -void cmx270_pci_adjust_zones(int node, unsigned long *size, - unsigned long *holes); - -#define arch_adjust_zones(node, size, holes) \ - cmx270_pci_adjust_zones(node, size, holes) - -#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1) -#endif - -#endif diff --git a/include/asm-arm/arch-pxa/mfp-pxa25x.h b/include/asm-arm/arch-pxa/mfp-pxa25x.h deleted file mode 100644 index 0499323..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa25x.h +++ /dev/null @@ -1,161 +0,0 @@ -#ifndef __ASM_ARCH_MFP_PXA25X_H -#define __ASM_ARCH_MFP_PXA25X_H - -#include -#include - -/* GPIO */ -#define GPIO2_GPIO MFP_CFG_IN(GPIO2, AF0) -#define GPIO3_GPIO MFP_CFG_IN(GPIO3, AF0) -#define GPIO4_GPIO MFP_CFG_IN(GPIO4, AF0) -#define GPIO5_GPIO MFP_CFG_IN(GPIO5, AF0) -#define GPIO6_GPIO MFP_CFG_IN(GPIO6, AF0) -#define GPIO7_GPIO MFP_CFG_IN(GPIO7, AF0) -#define GPIO8_GPIO MFP_CFG_IN(GPIO8, AF0) - -#define GPIO1_RST MFP_CFG_IN(GPIO1, AF1) - -/* Crystal and Clock Signals */ -#define GPIO10_RTCCLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) -#define GPIO70_RTC_CLK MFP_CFG_OUT(GPIO70, AF1, DRIVE_LOW) -#define GPIO7_48MHz MFP_CFG_OUT(GPIO7, AF1, DRIVE_LOW) -#define GPIO11_3_6MHz MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) -#define GPIO71_3_6MHz MFP_CFG_OUT(GPIO71, AF1, DRIVE_LOW) -#define GPIO12_32KHz MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW) -#define GPIO72_32kHz MFP_CFG_OUT(GPIO72, AF1, DRIVE_LOW) - -/* SDRAM and Static Memory I/O Signals */ -#define GPIO15_nCS_1 MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH) -#define GPIO78_nCS_2 MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH) -#define GPIO79_nCS_3 MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH) -#define GPIO80_nCS_4 MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH) -#define GPIO33_nCS_5 MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH) - -/* Miscellaneous I/O and DMA Signals */ -#define GPIO18_RDY MFP_CFG_IN(GPIO18, AF1) -#define GPIO20_DREQ_0 MFP_CFG_IN(GPIO20, AF1) -#define GPIO19_DREQ_1 MFP_CFG_IN(GPIO19, AF1) - -/* Alternate Bus Master Mode I/O Signals */ -#define GPIO13_MBGNT MFP_CFG_OUT(GPIO13, AF2, DRIVE_LOW) -#define GPIO73_MBGNT MFP_CFG_OUT(GPIO73, AF1, DRIVE_LOW) -#define GPIO14_MBREQ MFP_CFG_IN(GPIO14, AF1) -#define GPIO66_MBREQ MFP_CFG_IN(GPIO66, AF1) - -/* PC CARD */ -#define GPIO52_nPCE_1 MFP_CFG_OUT(GPIO52, AF2, DRIVE_HIGH) -#define GPIO53_nPCE_2 MFP_CFG_OUT(GPIO53, AF2, DRIVE_HIGH) -#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH) -#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH) -#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH) -#define GPIO49_nPWE MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH) -#define GPIO48_nPOE MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH) -#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) -#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) -#define GPIO54_nPSKTSEL MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH) - -/* FFUART */ -#define GPIO34_FFUART_RXD MFP_CFG_IN(GPIO34, AF1) -#define GPIO35_FFUART_CTS MFP_CFG_IN(GPIO35, AF1) -#define GPIO36_FFUART_DCD MFP_CFG_IN(GPIO36, AF1) -#define GPIO37_FFUART_DSR MFP_CFG_IN(GPIO37, AF1) -#define GPIO38_FFUART_RI MFP_CFG_IN(GPIO38, AF1) -#define GPIO39_FFUART_TXD MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH) -#define GPIO40_FFUART_DTR MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH) -#define GPIO41_FFUART_RTS MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH) - -/* BTUART */ -#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1) -#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH) -#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1) -#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH) - -/* STUART */ -#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2) -#define GPIO47_STUART_TXD MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH) - -/* HWUART */ -#define GPIO42_HWUART_RXD MFP_CFG_IN(GPIO42, AF3) -#define GPIO43_HWUART_TXD MFP_CFG_OUT(GPIO43, AF3, DRIVE_HIGH) -#define GPIO44_HWUART_CTS MFP_CFG_IN(GPIO44, AF3) -#define GPIO45_HWUART_RTS MFP_CFG_OUT(GPIO45, AF3, DRIVE_HIGH) -#define GPIO48_HWUART_TXD MFP_CFG_OUT(GPIO48, AF1, DRIVE_HIGH) -#define GPIO49_HWUART_RXD MFP_CFG_IN(GPIO49, AF1) -#define GPIO50_HWUART_CTS MFP_CFG_IN(GPIO50, AF1) -#define GPIO51_HWUART_RTS MFP_CFG_OUT(GPIO51, AF1, DRIVE_HIGH) - -/* FICP */ -#define GPIO46_FICP_RXD MFP_CFG_IN(GPIO46, AF1) -#define GPIO47_FICP_TXD MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH) - -/* PWM 0/1 */ -#define GPIO16_PWM0_OUT MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW) -#define GPIO17_PWM1_OUT MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW) - -/* AC97 */ -#define GPIO28_AC97_BITCLK MFP_CFG_IN(GPIO28, AF1) -#define GPIO29_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO29, AF1) -#define GPIO30_AC97_SDATA_OUT MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW) -#define GPIO31_AC97_SYNC MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW) -#define GPIO32_AC97_SDATA_IN_1 MFP_CFG_IN(GPIO32, AF1) - -/* I2S */ -#define GPIO28_I2S_BITCLK_IN MFP_CFG_IN(GPIO28, AF2) -#define GPIO28_I2S_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW) -#define GPIO29_I2S_SDATA_IN MFP_CFG_IN(GPIO29, AF2) -#define GPIO30_I2S_SDATA_OUT MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW) -#define GPIO31_I2S_SYNC MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW) -#define GPIO32_I2S_SYSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW) - -/* SSP 1 */ -#define GPIO23_SSP1_SCLK MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW) -#define GPIO24_SSP1_SFRM MFP_CFG_OUT(GPIO24, AF2, DRIVE_LOW) -#define GPIO25_SSP1_TXD MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW) -#define GPIO26_SSP1_RXD MFP_CFG_IN(GPIO26, AF1) -#define GPIO27_SSP1_EXTCLK MFP_CFG_IN(GPIO27, AF1) - -/* SSP 2 - NSSP */ -#define GPIO81_SSP2_CLK_OUT MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW) -#define GPIO81_SSP2_CLK_IN MFP_CFG_IN(GPIO81, AF1) -#define GPIO82_SSP2_FRM_OUT MFP_CFG_OUT(GPIO82, AF1, DRIVE_LOW) -#define GPIO82_SSP2_FRM_IN MFP_CFG_IN(GPIO82, AF1) -#define GPIO83_SSP2_TXD MFP_CFG_OUT(GPIO83, AF1, DRIVE_LOW) -#define GPIO83_SSP2_RXD MFP_CFG_IN(GPIO83, AF2) -#define GPIO84_SSP2_TXD MFP_CFG_OUT(GPIO84, AF1, DRIVE_LOW) -#define GPIO84_SSP2_RXD MFP_CFG_IN(GPIO84, AF2) - -/* MMC */ -#define GPIO6_MMC_CLK MFP_CFG_OUT(GPIO6, AF1, DRIVE_LOW) -#define GPIO8_MMC_CS0 MFP_CFG_OUT(GPIO8, AF1, DRIVE_LOW) -#define GPIO9_MMC_CS1 MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW) -#define GPIO34_MMC_CS0 MFP_CFG_OUT(GPIO34, AF2, DRIVE_LOW) -#define GPIO39_MMC_CS1 MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW) -#define GPIO53_MMC_CLK MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW) -#define GPIO54_MMC_CLK MFP_CFG_OUT(GPIO54, AF1, DRIVE_LOW) -#define GPIO69_MMC_CLK MFP_CFG_OUT(GPIO69, AF1, DRIVE_LOW) -#define GPIO67_MMC_CS0 MFP_CFG_OUT(GPIO67, AF1, DRIVE_LOW) -#define GPIO68_MMC_CS1 MFP_CFG_OUT(GPIO68, AF1, DRIVE_LOW) - -/* LCD */ -#define GPIO58_LCD_LDD_0 MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW) -#define GPIO59_LCD_LDD_1 MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW) -#define GPIO60_LCD_LDD_2 MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW) -#define GPIO61_LCD_LDD_3 MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW) -#define GPIO62_LCD_LDD_4 MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW) -#define GPIO63_LCD_LDD_5 MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW) -#define GPIO64_LCD_LDD_6 MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW) -#define GPIO65_LCD_LDD_7 MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW) -#define GPIO66_LCD_LDD_8 MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW) -#define GPIO67_LCD_LDD_9 MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW) -#define GPIO68_LCD_LDD_10 MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW) -#define GPIO69_LCD_LDD_11 MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW) -#define GPIO70_LCD_LDD_12 MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW) -#define GPIO71_LCD_LDD_13 MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW) -#define GPIO72_LCD_LDD_14 MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW) -#define GPIO73_LCD_LDD_15 MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW) -#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) -#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) -#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) -#define GPIO77_LCD_ACBIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) - -#endif /* __ASM_ARCH_MFP_PXA25X_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h deleted file mode 100644 index bc73ab8..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa27x.h +++ /dev/null @@ -1,433 +0,0 @@ -#ifndef __ASM_ARCH_MFP_PXA27X_H -#define __ASM_ARCH_MFP_PXA27X_H - -/* - * NOTE: for those special-function bidirectional GPIOs, as described - * in the "PXA27x Developer's Manual" Section 24.4.2.1, only its input - * alternative is preserved, the direction is actually selected by the - * specific controller, and this should work in most cases. - */ - -#include -#include - -/* GPIO */ -#define GPIO85_GPIO MFP_CFG_IN(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG_IN(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG_IN(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG_IN(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG_IN(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG_IN(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG_IN(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG_IN(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG_IN(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG_IN(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG_IN(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG_IN(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG_IN(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG_IN(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG_IN(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG_IN(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG_IN(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG_IN(GPIO102, AF0) -#define GPIO103_GPIO MFP_CFG_IN(GPIO103, AF0) -#define GPIO104_GPIO MFP_CFG_IN(GPIO104, AF0) -#define GPIO105_GPIO MFP_CFG_IN(GPIO105, AF0) -#define GPIO106_GPIO MFP_CFG_IN(GPIO106, AF0) -#define GPIO107_GPIO MFP_CFG_IN(GPIO107, AF0) -#define GPIO108_GPIO MFP_CFG_IN(GPIO108, AF0) -#define GPIO109_GPIO MFP_CFG_IN(GPIO109, AF0) -#define GPIO110_GPIO MFP_CFG_IN(GPIO110, AF0) -#define GPIO111_GPIO MFP_CFG_IN(GPIO111, AF0) -#define GPIO112_GPIO MFP_CFG_IN(GPIO112, AF0) -#define GPIO113_GPIO MFP_CFG_IN(GPIO113, AF0) -#define GPIO114_GPIO MFP_CFG_IN(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG_IN(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG_IN(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG_IN(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG_IN(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG_IN(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG_IN(GPIO120, AF0) - -/* Crystal and Clock Signals */ -#define GPIO9_HZ_CLK MFP_CFG_OUT(GPIO9, AF1, DRIVE_LOW) -#define GPIO10_HZ_CLK MFP_CFG_OUT(GPIO10, AF1, DRIVE_LOW) -#define GPIO11_48_MHz MFP_CFG_OUT(GPIO11, AF3, DRIVE_LOW) -#define GPIO12_48_MHz MFP_CFG_OUT(GPIO12, AF3, DRIVE_LOW) -#define GPIO13_CLK_EXT MFP_CFG_IN(GPIO13, AF1) - -/* OS Timer Signals */ -#define GPIO11_EXT_SYNC_0 MFP_CFG_IN(GPIO11, AF1) -#define GPIO12_EXT_SYNC_1 MFP_CFG_IN(GPIO12, AF1) -#define GPIO9_CHOUT_0 MFP_CFG_OUT(GPIO9, AF3, DRIVE_LOW) -#define GPIO10_CHOUT_1 MFP_CFG_OUT(GPIO10, AF3, DRIVE_LOW) -#define GPIO11_CHOUT_0 MFP_CFG_OUT(GPIO11, AF1, DRIVE_LOW) -#define GPIO12_CHOUT_1 MFP_CFG_OUT(GPIO12, AF1, DRIVE_LOW) - -/* SDRAM and Static Memory I/O Signals */ -#define GPIO20_nSDCS_2 MFP_CFG_OUT(GPIO20, AF1, DRIVE_HIGH) -#define GPIO21_nSDCS_3 MFP_CFG_OUT(GPIO21, AF1, DRIVE_HIGH) -#define GPIO15_nCS_1 MFP_CFG_OUT(GPIO15, AF2, DRIVE_HIGH) -#define GPIO78_nCS_2 MFP_CFG_OUT(GPIO78, AF2, DRIVE_HIGH) -#define GPIO79_nCS_3 MFP_CFG_OUT(GPIO79, AF2, DRIVE_HIGH) -#define GPIO80_nCS_4 MFP_CFG_OUT(GPIO80, AF2, DRIVE_HIGH) -#define GPIO33_nCS_5 MFP_CFG_OUT(GPIO33, AF2, DRIVE_HIGH) - -/* Miscellaneous I/O and DMA Signals */ -#define GPIO21_DVAL_0 MFP_CFG_OUT(GPIO21, AF2, DRIVE_HIGH) -#define GPIO116_DVAL_0 MFP_CFG_OUT(GPIO116, AF1, DRIVE_HIGH) -#define GPIO33_DVAL_1 MFP_CFG_OUT(GPIO33, AF1, DRIVE_HIGH) -#define GPIO96_DVAL_1 MFP_CFG_OUT(GPIO96, AF2, DRIVE_HIGH) -#define GPIO18_RDY MFP_CFG_IN(GPIO18, AF1) -#define GPIO20_DREQ_0 MFP_CFG_IN(GPIO20, AF1) -#define GPIO115_DREQ_0 MFP_CFG_IN(GPIO115, AF1) -#define GPIO80_DREQ_1 MFP_CFG_IN(GPIO80, AF1) -#define GPIO97_DREQ_1 MFP_CFG_IN(GPIO97, AF2) -#define GPIO85_DREQ_2 MFP_CFG_IN(GPIO85, AF2) -#define GPIO100_DREQ_2 MFP_CFG_IN(GPIO100, AF2) - -/* Alternate Bus Master Mode I/O Signals */ -#define GPIO20_MBREQ MFP_CFG_IN(GPIO20, AF2) -#define GPIO80_MBREQ MFP_CFG_IN(GPIO80, AF2) -#define GPIO96_MBREQ MFP_CFG_IN(GPIO96, AF2) -#define GPIO115_MBREQ MFP_CFG_IN(GPIO115, AF3) -#define GPIO21_MBGNT MFP_CFG_OUT(GPIO21, AF3, DRIVE_LOW) -#define GPIO33_MBGNT MFP_CFG_OUT(GPIO33, AF3, DRIVE_LOW) -#define GPIO97_MBGNT MFP_CFG_OUT(GPIO97, AF2, DRIVE_LOW) -#define GPIO116_MBGNT MFP_CFG_OUT(GPIO116, AF3, DRIVE_LOW) - -/* PC CARD */ -#define GPIO15_nPCE_1 MFP_CFG_OUT(GPIO15, AF1, DRIVE_HIGH) -#define GPIO85_nPCE_1 MFP_CFG_OUT(GPIO85, AF1, DRIVE_HIGH) -#define GPIO86_nPCE_1 MFP_CFG_OUT(GPIO86, AF1, DRIVE_HIGH) -#define GPIO102_nPCE_1 MFP_CFG_OUT(GPIO102, AF1, DRIVE_HIGH) -#define GPIO54_nPCE_2 MFP_CFG_OUT(GPIO54, AF2, DRIVE_HIGH) -#define GPIO78_nPCE_2 MFP_CFG_OUT(GPIO78, AF1, DRIVE_HIGH) -#define GPIO87_nPCE_2 MFP_CFG_IN(GPIO87, AF1) -#define GPIO55_nPREG MFP_CFG_OUT(GPIO55, AF2, DRIVE_HIGH) -#define GPIO50_nPIOR MFP_CFG_OUT(GPIO50, AF2, DRIVE_HIGH) -#define GPIO51_nPIOW MFP_CFG_OUT(GPIO51, AF2, DRIVE_HIGH) -#define GPIO49_nPWE MFP_CFG_OUT(GPIO49, AF2, DRIVE_HIGH) -#define GPIO48_nPOE MFP_CFG_OUT(GPIO48, AF2, DRIVE_HIGH) -#define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) -#define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) -#define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH) -#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH) - -/* I2C */ -#define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1) -#define GPIO118_I2C_SDA MFP_CFG_IN(GPIO118, AF1) - -/* FFUART */ -#define GPIO9_FFUART_CTS MFP_CFG_IN(GPIO9, AF3) -#define GPIO26_FFUART_CTS MFP_CFG_IN(GPIO26, AF3) -#define GPIO35_FFUART_CTS MFP_CFG_IN(GPIO35, AF1) -#define GPIO100_FFUART_CTS MFP_CFG_IN(GPIO100, AF3) -#define GPIO10_FFUART_DCD MFP_CFG_IN(GPIO10, AF1) -#define GPIO36_FFUART_DCD MFP_CFG_IN(GPIO36, AF1) -#define GPIO33_FFUART_DSR MFP_CFG_IN(GPIO33, AF2) -#define GPIO37_FFUART_DSR MFP_CFG_IN(GPIO37, AF1) -#define GPIO38_FFUART_RI MFP_CFG_IN(GPIO38, AF1) -#define GPIO89_FFUART_RI MFP_CFG_IN(GPIO89, AF3) -#define GPIO19_FFUART_RXD MFP_CFG_IN(GPIO19, AF3) -#define GPIO33_FFUART_RXD MFP_CFG_IN(GPIO33, AF1) -#define GPIO34_FFUART_RXD MFP_CFG_IN(GPIO34, AF1) -#define GPIO41_FFUART_RXD MFP_CFG_IN(GPIO41, AF1) -#define GPIO53_FFUART_RXD MFP_CFG_IN(GPIO53, AF1) -#define GPIO85_FFUART_RXD MFP_CFG_IN(GPIO85, AF1) -#define GPIO96_FFUART_RXD MFP_CFG_IN(GPIO96, AF3) -#define GPIO102_FFUART_RXD MFP_CFG_IN(GPIO102, AF3) -#define GPIO16_FFUART_TXD MFP_CFG_OUT(GPIO16, AF3, DRIVE_HIGH) -#define GPIO37_FFUART_TXD MFP_CFG_OUT(GPIO37, AF3, DRIVE_HIGH) -#define GPIO39_FFUART_TXD MFP_CFG_OUT(GPIO39, AF2, DRIVE_HIGH) -#define GPIO83_FFUART_TXD MFP_CFG_OUT(GPIO83, AF2, DRIVE_HIGH) -#define GPIO99_FFUART_TXD MFP_CFG_OUT(GPIO99, AF3, DRIVE_HIGH) -#define GPIO27_FFUART_RTS MFP_CFG_OUT(GPIO27, AF3, DRIVE_HIGH) -#define GPIO41_FFUART_RTS MFP_CFG_OUT(GPIO41, AF2, DRIVE_HIGH) -#define GPIO83_FFUART_RTS MFP_CFG_OUT(GPIO83, AF3, DRIVE_HIGH) -#define GPIO98_FFUART_RTS MFP_CFG_OUT(GPIO98, AF3, DRIVE_HIGH) -#define GPIO40_FFUART_DTR MFP_CFG_OUT(GPIO40, AF2, DRIVE_HIGH) -#define GPIO82_FFUART_DTR MFP_CFG_OUT(GPIO82, AF3, DRIVE_HIGH) - -/* BTUART */ -#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1) -#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1) -#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH) -#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH) - -/* STUART */ -#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2) -#define GPIO47_STUART_TXD MFP_CFG_OUT(GPIO47, AF1, DRIVE_HIGH) - -/* FICP */ -#define GPIO42_FICP_RXD MFP_CFG_IN(GPIO42, AF2) -#define GPIO46_FICP_RXD MFP_CFG_IN(GPIO46, AF1) -#define GPIO43_FICP_TXD MFP_CFG_OUT(GPIO43, AF1, DRIVE_HIGH) -#define GPIO47_FICP_TXD MFP_CFG_OUT(GPIO47, AF2, DRIVE_HIGH) - -/* PWM 0/1/2/3 */ -#define GPIO11_PWM2_OUT MFP_CFG_OUT(GPIO11, AF2, DRIVE_LOW) -#define GPIO12_PWM3_OUT MFP_CFG_OUT(GPIO12, AF2, DRIVE_LOW) -#define GPIO16_PWM0_OUT MFP_CFG_OUT(GPIO16, AF2, DRIVE_LOW) -#define GPIO17_PWM1_OUT MFP_CFG_OUT(GPIO17, AF2, DRIVE_LOW) -#define GPIO38_PWM1_OUT MFP_CFG_OUT(GPIO38, AF3, DRIVE_LOW) -#define GPIO46_PWM2_OUT MFP_CFG_OUT(GPIO46, AF2, DRIVE_LOW) -#define GPIO47_PWM3_OUT MFP_CFG_OUT(GPIO47, AF3, DRIVE_LOW) -#define GPIO79_PWM2_OUT MFP_CFG_OUT(GPIO79, AF3, DRIVE_LOW) -#define GPIO80_PWM3_OUT MFP_CFG_OUT(GPIO80, AF3, DRIVE_LOW) -#define GPIO115_PWM1_OUT MFP_CFG_OUT(GPIO115, AF3, DRIVE_LOW) - -/* AC97 */ -#define GPIO31_AC97_SYNC MFP_CFG_OUT(GPIO31, AF2, DRIVE_LOW) -#define GPIO94_AC97_SYNC MFP_CFG_OUT(GPIO94, AF1, DRIVE_LOW) -#define GPIO30_AC97_SDATA_OUT MFP_CFG_OUT(GPIO30, AF2, DRIVE_LOW) -#define GPIO93_AC97_SDATA_OUT MFP_CFG_OUT(GPIO93, AF1, DRIVE_LOW) -#define GPIO45_AC97_SYSCLK MFP_CFG_OUT(GPIO45, AF1, DRIVE_LOW) -#define GPIO89_AC97_SYSCLK MFP_CFG_OUT(GPIO89, AF1, DRIVE_LOW) -#define GPIO98_AC97_SYSCLK MFP_CFG_OUT(GPIO98, AF1, DRIVE_LOW) -#define GPIO95_AC97_nRESET MFP_CFG_OUT(GPIO95, AF1, DRIVE_LOW) -#define GPIO113_AC97_nRESET MFP_CFG_OUT(GPIO113, AF2, DRIVE_LOW) -#define GPIO28_AC97_BITCLK MFP_CFG_IN(GPIO28, AF1) -#define GPIO29_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO29, AF1) -#define GPIO116_AC97_SDATA_IN_0 MFP_CFG_IN(GPIO116, AF2) -#define GPIO99_AC97_SDATA_IN_1 MFP_CFG_IN(GPIO99, AF2) - -/* I2S */ -#define GPIO28_I2S_BITCLK_IN MFP_CFG_IN(GPIO28, AF2) -#define GPIO28_I2S_BITCLK_OUT MFP_CFG_OUT(GPIO28, AF1, DRIVE_LOW) -#define GPIO29_I2S_SDATA_IN MFP_CFG_IN(GPIO29, AF2) -#define GPIO30_I2S_SDATA_OUT MFP_CFG_OUT(GPIO30, AF1, DRIVE_LOW) -#define GPIO31_I2S_SYNC MFP_CFG_OUT(GPIO31, AF1, DRIVE_LOW) -#define GPIO113_I2S_SYSCLK MFP_CFG_OUT(GPIO113, AF1, DRIVE_LOW) - -/* SSP 1 */ -#define GPIO23_SSP1_SCLK MFP_CFG_OUT(GPIO23, AF2, DRIVE_LOW) -#define GPIO29_SSP1_SCLK MFP_CFG_IN(GPIO29, AF3) -#define GPIO27_SSP1_SYSCLK MFP_CFG_OUT(GPIO27, AF1, DRIVE_LOW) -#define GPIO53_SSP1_SYSCLK MFP_CFG_OUT(GPIO53, AF3, DRIVE_LOW) -#define GPIO24_SSP1_SFRM MFP_CFG_IN(GPIO24, AF2) -#define GPIO28_SSP1_SFRM MFP_CFG_IN(GPIO28, AF3) -#define GPIO25_SSP1_TXD MFP_CFG_OUT(GPIO25, AF2, DRIVE_LOW) -#define GPIO57_SSP1_TXD MFP_CFG_OUT(GPIO57, AF3, DRIVE_LOW) -#define GPIO26_SSP1_RXD MFP_CFG_IN(GPIO26, AF1) -#define GPIO27_SSP1_SCLKEN MFP_CFG_IN(GPIO27, AF2) - -/* SSP 2 */ -#define GPIO19_SSP2_SCLK MFP_CFG_IN(GPIO19, AF1) -#define GPIO22_SSP2_SCLK MFP_CFG_IN(GPIO22, AF3) -#define GPIO29_SSP2_SCLK MFP_CFG_OUT(GPIO29, AF3, DRIVE_LOW) -#define GPIO36_SSP2_SCLK MFP_CFG_IN(GPIO36, AF2) -#define GPIO50_SSP2_SCLK MFP_CFG_IN(GPIO50, AF3) -#define GPIO22_SSP2_SYSCLK MFP_CFG_OUT(GPIO22, AF2, DRIVE_LOW) -#define GPIO14_SSP2_SFRM MFP_CFG_IN(GPIO14, AF2) -#define GPIO37_SSP2_SFRM MFP_CFG_IN(GPIO37, AF2) -#define GPIO87_SSP2_SFRM MFP_CFG_OUT(GPIO87, AF3, DRIVE_LOW) -#define GPIO88_SSP2_SFRM MFP_CFG_IN(GPIO88, AF3) -#define GPIO13_SSP2_TXD MFP_CFG_OUT(GPIO13, AF1, DRIVE_LOW) -#define GPIO38_SSP2_TXD MFP_CFG_OUT(GPIO38, AF2, DRIVE_LOW) -#define GPIO87_SSP2_TXD MFP_CFG_OUT(GPIO87, AF1, DRIVE_LOW) -#define GPIO89_SSP2_TXD MFP_CFG_OUT(GPIO89, AF3, DRIVE_LOW) -#define GPIO11_SSP2_RXD MFP_CFG_IN(GPIO11, AF2) -#define GPIO29_SSP2_RXD MFP_CFG_OUT(GPIO29, AF1, DRIVE_LOW) -#define GPIO40_SSP2_RXD MFP_CFG_IN(GPIO40, AF1) -#define GPIO86_SSP2_RXD MFP_CFG_IN(GPIO86, AF1) -#define GPIO88_SSP2_RXD MFP_CFG_IN(GPIO88, AF2) -#define GPIO22_SSP2_EXTCLK MFP_CFG_IN(GPIO22, AF1) -#define GPIO27_SSP2_EXTCLK MFP_CFG_IN(GPIO27, AF1) -#define GPIO22_SSP2_SCLKEN MFP_CFG_IN(GPIO22, AF2) -#define GPIO23_SSP2_SCLKEN MFP_CFG_IN(GPIO23, AF2) - -/* SSP 3 */ -#define GPIO34_SSP3_SCLK MFP_CFG_IN(GPIO34, AF3) -#define GPIO40_SSP3_SCLK MFP_CFG_OUT(GPIO40, AF3, DRIVE_LOW) -#define GPIO52_SSP3_SCLK MFP_CFG_IN(GPIO52, AF2) -#define GPIO84_SSP3_SCLK MFP_CFG_IN(GPIO84, AF1) -#define GPIO45_SSP3_SYSCLK MFP_CFG_OUT(GPIO45, AF3, DRIVE_LOW) -#define GPIO35_SSP3_SFRM MFP_CFG_IN(GPIO35, AF3) -#define GPIO39_SSP3_SFRM MFP_CFG_IN(GPIO39, AF3) -#define GPIO83_SSP3_SFRM MFP_CFG_IN(GPIO83, AF1) -#define GPIO35_SSP3_TXD MFP_CFG_OUT(GPIO35, AF3, DRIVE_LOW) -#define GPIO38_SSP3_TXD MFP_CFG_OUT(GPIO38, AF1, DRIVE_LOW) -#define GPIO81_SSP3_TXD MFP_CFG_OUT(GPIO81, AF1, DRIVE_LOW) -#define GPIO41_SSP3_RXD MFP_CFG_IN(GPIO41, AF3) -#define GPIO82_SSP3_RXD MFP_CFG_IN(GPIO82, AF1) -#define GPIO89_SSP3_RXD MFP_CFG_IN(GPIO89, AF1) - -/* MMC */ -#define GPIO32_MMC_CLK MFP_CFG_OUT(GPIO32, AF2, DRIVE_LOW) -#define GPIO92_MMC_DAT_0 MFP_CFG_IN(GPIO92, AF1) -#define GPIO109_MMC_DAT_1 MFP_CFG_IN(GPIO109, AF1) -#define GPIO110_MMC_DAT_2 MFP_CFG_IN(GPIO110, AF1) -#define GPIO111_MMC_DAT_3 MFP_CFG_IN(GPIO111, AF1) -#define GPIO112_MMC_CMD MFP_CFG_IN(GPIO112, AF1) - -/* LCD */ -#define GPIO58_LCD_LDD_0 MFP_CFG_OUT(GPIO58, AF2, DRIVE_LOW) -#define GPIO59_LCD_LDD_1 MFP_CFG_OUT(GPIO59, AF2, DRIVE_LOW) -#define GPIO60_LCD_LDD_2 MFP_CFG_OUT(GPIO60, AF2, DRIVE_LOW) -#define GPIO61_LCD_LDD_3 MFP_CFG_OUT(GPIO61, AF2, DRIVE_LOW) -#define GPIO62_LCD_LDD_4 MFP_CFG_OUT(GPIO62, AF2, DRIVE_LOW) -#define GPIO63_LCD_LDD_5 MFP_CFG_OUT(GPIO63, AF2, DRIVE_LOW) -#define GPIO64_LCD_LDD_6 MFP_CFG_OUT(GPIO64, AF2, DRIVE_LOW) -#define GPIO65_LCD_LDD_7 MFP_CFG_OUT(GPIO65, AF2, DRIVE_LOW) -#define GPIO66_LCD_LDD_8 MFP_CFG_OUT(GPIO66, AF2, DRIVE_LOW) -#define GPIO67_LCD_LDD_9 MFP_CFG_OUT(GPIO67, AF2, DRIVE_LOW) -#define GPIO68_LCD_LDD_10 MFP_CFG_OUT(GPIO68, AF2, DRIVE_LOW) -#define GPIO69_LCD_LDD_11 MFP_CFG_OUT(GPIO69, AF2, DRIVE_LOW) -#define GPIO70_LCD_LDD_12 MFP_CFG_OUT(GPIO70, AF2, DRIVE_LOW) -#define GPIO71_LCD_LDD_13 MFP_CFG_OUT(GPIO71, AF2, DRIVE_LOW) -#define GPIO72_LCD_LDD_14 MFP_CFG_OUT(GPIO72, AF2, DRIVE_LOW) -#define GPIO73_LCD_LDD_15 MFP_CFG_OUT(GPIO73, AF2, DRIVE_LOW) -#define GPIO86_LCD_LDD_16 MFP_CFG_OUT(GPIO86, AF2, DRIVE_LOW) -#define GPIO87_LCD_LDD_17 MFP_CFG_OUT(GPIO87, AF2, DRIVE_LOW) -#define GPIO74_LCD_FCLK MFP_CFG_OUT(GPIO74, AF2, DRIVE_LOW) -#define GPIO75_LCD_LCLK MFP_CFG_OUT(GPIO75, AF2, DRIVE_LOW) -#define GPIO76_LCD_PCLK MFP_CFG_OUT(GPIO76, AF2, DRIVE_LOW) -#define GPIO77_LCD_BIAS MFP_CFG_OUT(GPIO77, AF2, DRIVE_LOW) -#define GPIO14_LCD_VSYNC MFP_CFG_IN(GPIO14, AF1) -#define GPIO19_LCD_CS MFP_CFG_OUT(GPIO19, AF2, DRIVE_LOW) - -/* Keypad */ -#define GPIO93_KP_DKIN_0 MFP_CFG_IN(GPIO93, AF1) -#define GPIO94_KP_DKIN_1 MFP_CFG_IN(GPIO94, AF1) -#define GPIO95_KP_DKIN_2 MFP_CFG_IN(GPIO95, AF1) -#define GPIO96_KP_DKIN_3 MFP_CFG_IN(GPIO96, AF1) -#define GPIO97_KP_DKIN_4 MFP_CFG_IN(GPIO97, AF1) -#define GPIO98_KP_DKIN_5 MFP_CFG_IN(GPIO98, AF1) -#define GPIO99_KP_DKIN_6 MFP_CFG_IN(GPIO99, AF1) -#define GPIO13_KP_KDIN_7 MFP_CFG_IN(GPIO13, AF2) -#define GPIO100_KP_MKIN_0 MFP_CFG_IN(GPIO100, AF1) -#define GPIO101_KP_MKIN_1 MFP_CFG_IN(GPIO101, AF1) -#define GPIO102_KP_MKIN_2 MFP_CFG_IN(GPIO102, AF1) -#define GPIO34_KP_MKIN_3 MFP_CFG_IN(GPIO34, AF2) -#define GPIO37_KP_MKIN_3 MFP_CFG_IN(GPIO37, AF3) -#define GPIO97_KP_MKIN_3 MFP_CFG_IN(GPIO97, AF3) -#define GPIO98_KP_MKIN_4 MFP_CFG_IN(GPIO98, AF3) -#define GPIO38_KP_MKIN_4 MFP_CFG_IN(GPIO38, AF2) -#define GPIO39_KP_MKIN_4 MFP_CFG_IN(GPIO39, AF1) -#define GPIO16_KP_MKIN_5 MFP_CFG_IN(GPIO16, AF1) -#define GPIO90_KP_MKIN_5 MFP_CFG_IN(GPIO90, AF1) -#define GPIO99_KP_MKIN_5 MFP_CFG_IN(GPIO99, AF3) -#define GPIO17_KP_MKIN_6 MFP_CFG_IN(GPIO17, AF1) -#define GPIO91_KP_MKIN_6 MFP_CFG_IN(GPIO91, AF1) -#define GPIO95_KP_MKIN_6 MFP_CFG_IN(GPIO95, AF3) -#define GPIO13_KP_MKIN_7 MFP_CFG_IN(GPIO13, AF3) -#define GPIO36_KP_MKIN_7 MFP_CFG_IN(GPIO36, AF3) -#define GPIO103_KP_MKOUT_0 MFP_CFG_OUT(GPIO103, AF2, DRIVE_HIGH) -#define GPIO104_KP_MKOUT_1 MFP_CFG_OUT(GPIO104, AF2, DRIVE_HIGH) -#define GPIO105_KP_MKOUT_2 MFP_CFG_OUT(GPIO105, AF2, DRIVE_HIGH) -#define GPIO106_KP_MKOUT_3 MFP_CFG_OUT(GPIO106, AF2, DRIVE_HIGH) -#define GPIO107_KP_MKOUT_4 MFP_CFG_OUT(GPIO107, AF2, DRIVE_HIGH) -#define GPIO108_KP_MKOUT_5 MFP_CFG_OUT(GPIO108, AF2, DRIVE_HIGH) -#define GPIO35_KP_MKOUT_6 MFP_CFG_OUT(GPIO35, AF2, DRIVE_HIGH) -#define GPIO22_KP_MKOUT_7 MFP_CFG_OUT(GPIO22, AF1, DRIVE_HIGH) -#define GPIO40_KP_MKOUT_6 MFP_CFG_OUT(GPIO40, AF1, DRIVE_HIGH) -#define GPIO41_KP_MKOUT_7 MFP_CFG_OUT(GPIO41, AF1, DRIVE_HIGH) -#define GPIO96_KP_MKOUT_6 MFP_CFG_OUT(GPIO96, AF3, DRIVE_HIGH) - -/* USB P3 */ -#define GPIO10_USB_P3_5 MFP_CFG_IN(GPIO10, AF3) -#define GPIO11_USB_P3_1 MFP_CFG_IN(GPIO11, AF3) -#define GPIO30_USB_P3_2 MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW) -#define GPIO31_USB_P3_6 MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW) -#define GPIO56_USB_P3_4 MFP_CFG_OUT(GPIO56, AF1, DRIVE_LOW) -#define GPIO86_USB_P3_5 MFP_CFG_IN(GPIO86, AF3) -#define GPIO87_USB_P3_1 MFP_CFG_IN(GPIO87, AF3) -#define GPIO90_USB_P3_5 MFP_CFG_IN(GPIO90, AF2) -#define GPIO91_USB_P3_1 MFP_CFG_IN(GPIO91, AF2) -#define GPIO113_USB_P3_3 MFP_CFG_IN(GPIO113, AF3) - -/* USB P2 */ -#define GPIO34_USB_P2_2 MFP_CFG_OUT(GPIO34, AF1, DRIVE_LOW) -#define GPIO35_USB_P2_1 MFP_CFG_IN(GPIO35, AF2) -#define GPIO36_USB_P2_4 MFP_CFG_OUT(GPIO36, AF1, DRIVE_LOW) -#define GPIO37_USB_P2_8 MFP_CFG_OUT(GPIO37, AF1, DRIVE_LOW) -#define GPIO38_USB_P2_3 MFP_CFG_IN(GPIO38, AF3) -#define GPIO39_USB_P2_6 MFP_CFG_OUT(GPIO39, AF1, DRIVE_LOW) -#define GPIO40_USB_P2_5 MFP_CFG_IN(GPIO40, AF3) -#define GPIO41_USB_P2_7 MFP_CFG_IN(GPIO41, AF2) -#define GPIO53_USB_P2_3 MFP_CFG_IN(GPIO53, AF2) - -/* USB Host Port 1/2 */ -#define GPIO88_USBH1_PWR MFP_CFG_IN(GPIO88, AF1) -#define GPIO89_USBH1_PEN MFP_CFG_OUT(GPIO89, AF2, DRIVE_LOW) -#define GPIO119_USBH2_PWR MFP_CFG_IN(GPIO119, AF1) -#define GPIO120_USBH2_PEN MFP_CFG_OUT(GPIO120, AF2, DRIVE_LOW) - -/* QCI - default to Master Mode: CIF_FV/CIF_LV Direction In */ -#define GPIO115_CIF_DD_3 MFP_CFG_IN(GPIO115, AF2) -#define GPIO116_CIF_DD_2 MFP_CFG_IN(GPIO116, AF1) -#define GPIO12_CIF_DD_7 MFP_CFG_IN(GPIO12, AF2) -#define GPIO17_CIF_DD_6 MFP_CFG_IN(GPIO17, AF2) -#define GPIO23_CIF_MCLK MFP_CFG_OUT(GPIO23, AF1, DRIVE_LOW) -#define GPIO24_CIF_FV MFP_CFG_IN(GPIO24, AF1) -#define GPIO25_CIF_LV MFP_CFG_IN(GPIO25, AF1) -#define GPIO26_CIF_PCLK MFP_CFG_IN(GPIO26, AF2) -#define GPIO27_CIF_DD_0 MFP_CFG_IN(GPIO27, AF3) -#define GPIO42_CIF_MCLK MFP_CFG_OUT(GPIO42, AF3, DRIVE_LOW) -#define GPIO43_CIF_FV MFP_CFG_IN(GPIO43, AF3) -#define GPIO44_CIF_LV MFP_CFG_IN(GPIO44, AF3) -#define GPIO45_CIF_PCLK MFP_CFG_IN(GPIO45, AF3) -#define GPIO47_CIF_DD_0 MFP_CFG_IN(GPIO47, AF1) -#define GPIO48_CIF_DD_5 MFP_CFG_IN(GPIO48, AF1) -#define GPIO50_CIF_DD_3 MFP_CFG_IN(GPIO50, AF1) -#define GPIO51_CIF_DD_2 MFP_CFG_IN(GPIO51, AF1) -#define GPIO52_CIF_DD_4 MFP_CFG_IN(GPIO52, AF1) -#define GPIO53_CIF_MCLK MFP_CFG_OUT(GPIO53, AF2, DRIVE_LOW) -#define GPIO54_CIF_PCLK MFP_CFG_IN(GPIO54, AF3) -#define GPIO55_CIF_DD_1 MFP_CFG_IN(GPIO55, AF1) -#define GPIO81_CIF_DD_0 MFP_CFG_IN(GPIO81, AF2) -#define GPIO82_CIF_DD_5 MFP_CFG_IN(GPIO82, AF3) -#define GPIO83_CIF_DD_4 MFP_CFG_IN(GPIO83, AF3) -#define GPIO84_CIF_FV MFP_CFG_IN(GPIO84, AF3) -#define GPIO85_CIF_LV MFP_CFG_IN(GPIO85, AF3) -#define GPIO90_CIF_DD_4 MFP_CFG_IN(GPIO90, AF3) -#define GPIO91_CIF_DD_5 MFP_CFG_IN(GPIO91, AF3) -#define GPIO93_CIF_DD_6 MFP_CFG_IN(GPIO93, AF2) -#define GPIO94_CIF_DD_5 MFP_CFG_IN(GPIO94, AF2) -#define GPIO95_CIF_DD_4 MFP_CFG_IN(GPIO95, AF2) -#define GPIO98_CIF_DD_0 MFP_CFG_IN(GPIO98, AF2) -#define GPIO103_CIF_DD_3 MFP_CFG_IN(GPIO103, AF1) -#define GPIO104_CIF_DD_2 MFP_CFG_IN(GPIO104, AF1) -#define GPIO105_CIF_DD_1 MFP_CFG_IN(GPIO105, AF1) -#define GPIO106_CIF_DD_9 MFP_CFG_IN(GPIO106, AF1) -#define GPIO107_CIF_DD_8 MFP_CFG_IN(GPIO107, AF1) -#define GPIO108_CIF_DD_7 MFP_CFG_IN(GPIO108, AF1) -#define GPIO114_CIF_DD_1 MFP_CFG_IN(GPIO114, AF1) - -/* Universal Subscriber ID Interface */ -#define GPIO114_UVS0 MFP_CFG_OUT(GPIO114, AF2, DRIVE_LOW) -#define GPIO115_nUVS1 MFP_CFG_OUT(GPIO115, AF2, DRIVE_LOW) -#define GPIO116_nUVS2 MFP_CFG_OUT(GPIO116, AF2, DRIVE_LOW) -#define GPIO14_UCLK MFP_CFG_OUT(GPIO14, AF3, DRIVE_LOW) -#define GPIO91_UCLK MFP_CFG_OUT(GPIO91, AF2, DRIVE_LOW) -#define GPIO19_nURST MFP_CFG_OUT(GPIO19, AF3, DRIVE_LOW) -#define GPIO90_nURST MFP_CFG_OUT(GPIO90, AF2, DRIVE_LOW) -#define GPIO116_UDET MFP_CFG_IN(GPIO116, AF3) -#define GPIO114_UEN MFP_CFG_OUT(GPIO114, AF1, DRIVE_LOW) -#define GPIO115_UEN MFP_CFG_OUT(GPIO115, AF1, DRIVE_LOW) - -/* Mobile Scalable Link (MSL) Interface */ -#define GPIO81_BB_OB_DAT_0 MFP_CFG_OUT(GPIO81, AF2, DRIVE_LOW) -#define GPIO48_BB_OB_DAT_1 MFP_CFG_OUT(GPIO48, AF1, DRIVE_LOW) -#define GPIO50_BB_OB_DAT_2 MFP_CFG_OUT(GPIO50, AF1, DRIVE_LOW) -#define GPIO51_BB_OB_DAT_3 MFP_CFG_OUT(GPIO51, AF1, DRIVE_LOW) -#define GPIO52_BB_OB_CLK MFP_CFG_OUT(GPIO52, AF1, DRIVE_LOW) -#define GPIO53_BB_OB_STB MFP_CFG_OUT(GPIO53, AF1, DRIVE_LOW) -#define GPIO54_BB_OB_WAIT MFP_CFG_IN(GPIO54, AF2) -#define GPIO82_BB_IB_DAT_0 MFP_CFG_IN(GPIO82, AF2) -#define GPIO55_BB_IB_DAT_1 MFP_CFG_IN(GPIO55, AF2) -#define GPIO56_BB_IB_DAT_2 MFP_CFG_IN(GPIO56, AF2) -#define GPIO57_BB_IB_DAT_3 MFP_CFG_IN(GPIO57, AF2) -#define GPIO83_BB_IB_CLK MFP_CFG_IN(GPIO83, AF2) -#define GPIO84_BB_IB_STB MFP_CFG_IN(GPIO84, AF2) -#define GPIO85_BB_IB_WAIT MFP_CFG_OUT(GPIO85, AF2, DRIVE_LOW) - -/* Memory Stick Host Controller */ -#define GPIO92_MSBS MFP_CFG_OUT(GPIO92, AF2, DRIVE_LOW) -#define GPIO109_MSSDIO MFP_CFG_IN(GPIO109, AF2) -#define GPIO112_nMSINS MFP_CFG_IN(GPIO112, AF2) -#define GPIO32_MSSCLK MFP_CFG_OUT(GPIO32, AF1, DRIVE_LOW) - -extern int keypad_set_wake(unsigned int on); -#endif /* __ASM_ARCH_MFP_PXA27X_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa2xx.h b/include/asm-arm/arch-pxa/mfp-pxa2xx.h deleted file mode 100644 index 8de1c0d..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa2xx.h +++ /dev/null @@ -1,133 +0,0 @@ -#ifndef __ASM_ARCH_MFP_PXA2XX_H -#define __ASM_ARCH_MFP_PXA2XX_H - -#include - -/* - * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx: - * - * MFP_PIN(x) - * MFP_AFx - * MFP_LPM_DRIVE_{LOW, HIGH} - * MFP_LPM_EDGE_x - * - * other MFP_x bit definitions will be ignored - * - * and adds the below two bits specifically for pxa2xx: - * - * bit 23 - Input/Output (PXA2xx specific) - * bit 24 - Wakeup Enable(PXA2xx specific) - */ - -#define MFP_DIR_IN (0x0 << 23) -#define MFP_DIR_OUT (0x1 << 23) -#define MFP_DIR_MASK (0x1 << 23) -#define MFP_DIR(x) (((x) >> 23) & 0x1) - -#define MFP_LPM_CAN_WAKEUP (0x1 << 24) -#define WAKEUP_ON_EDGE_RISE (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_RISE) -#define WAKEUP_ON_EDGE_FALL (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_FALL) -#define WAKEUP_ON_EDGE_BOTH (MFP_LPM_CAN_WAKEUP | MFP_LPM_EDGE_BOTH) - -/* specifically for enabling wakeup on keypad GPIOs */ -#define WAKEUP_ON_LEVEL_HIGH (MFP_LPM_CAN_WAKEUP) - -#define MFP_CFG_IN(pin, af) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK)) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_IN)) - -/* NOTE: pins configured as output _must_ provide a low power state, - * and this state should help to minimize the power dissipation. - */ -#define MFP_CFG_OUT(pin, af, state) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DIR_MASK | MFP_LPM_STATE_MASK)) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DIR_OUT | MFP_LPM_##state)) - -/* Common configurations for pxa25x and pxa27x - * - * Note: pins configured as GPIO are always initialized to input - * so not to cause any side effect - */ -#define GPIO0_GPIO MFP_CFG_IN(GPIO0, AF0) -#define GPIO1_GPIO MFP_CFG_IN(GPIO1, AF0) -#define GPIO9_GPIO MFP_CFG_IN(GPIO9, AF0) -#define GPIO10_GPIO MFP_CFG_IN(GPIO10, AF0) -#define GPIO11_GPIO MFP_CFG_IN(GPIO11, AF0) -#define GPIO12_GPIO MFP_CFG_IN(GPIO12, AF0) -#define GPIO13_GPIO MFP_CFG_IN(GPIO13, AF0) -#define GPIO14_GPIO MFP_CFG_IN(GPIO14, AF0) -#define GPIO15_GPIO MFP_CFG_IN(GPIO15, AF0) -#define GPIO16_GPIO MFP_CFG_IN(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG_IN(GPIO17, AF0) -#define GPIO18_GPIO MFP_CFG_IN(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG_IN(GPIO19, AF0) -#define GPIO20_GPIO MFP_CFG_IN(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG_IN(GPIO21, AF0) -#define GPIO22_GPIO MFP_CFG_IN(GPIO22, AF0) -#define GPIO23_GPIO MFP_CFG_IN(GPIO23, AF0) -#define GPIO24_GPIO MFP_CFG_IN(GPIO24, AF0) -#define GPIO25_GPIO MFP_CFG_IN(GPIO25, AF0) -#define GPIO26_GPIO MFP_CFG_IN(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG_IN(GPIO27, AF0) -#define GPIO28_GPIO MFP_CFG_IN(GPIO28, AF0) -#define GPIO29_GPIO MFP_CFG_IN(GPIO29, AF0) -#define GPIO30_GPIO MFP_CFG_IN(GPIO30, AF0) -#define GPIO31_GPIO MFP_CFG_IN(GPIO31, AF0) -#define GPIO32_GPIO MFP_CFG_IN(GPIO32, AF0) -#define GPIO33_GPIO MFP_CFG_IN(GPIO33, AF0) -#define GPIO34_GPIO MFP_CFG_IN(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG_IN(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG_IN(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG_IN(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG_IN(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG_IN(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG_IN(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG_IN(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG_IN(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG_IN(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG_IN(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG_IN(GPIO45, AF0) -#define GPIO46_GPIO MFP_CFG_IN(GPIO46, AF0) -#define GPIO47_GPIO MFP_CFG_IN(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG_IN(GPIO48, AF0) -#define GPIO49_GPIO MFP_CFG_IN(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG_IN(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG_IN(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG_IN(GPIO52, AF0) -#define GPIO53_GPIO MFP_CFG_IN(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG_IN(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG_IN(GPIO55, AF0) -#define GPIO56_GPIO MFP_CFG_IN(GPIO56, AF0) -#define GPIO57_GPIO MFP_CFG_IN(GPIO57, AF0) -#define GPIO58_GPIO MFP_CFG_IN(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG_IN(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG_IN(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG_IN(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG_IN(GPIO62, AF0) -#define GPIO63_GPIO MFP_CFG_IN(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG_IN(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG_IN(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG_IN(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG_IN(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG_IN(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG_IN(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG_IN(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG_IN(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG_IN(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG_IN(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG_IN(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG_IN(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG_IN(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG_IN(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG_IN(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG_IN(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG_IN(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG_IN(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG_IN(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG_IN(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG_IN(GPIO84, AF0) - -extern void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num); -extern void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm); -extern int gpio_set_wake(unsigned int gpio, unsigned int on); -#endif /* __ASM_ARCH_MFP_PXA2XX_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa300.h b/include/asm-arm/arch-pxa/mfp-pxa300.h deleted file mode 100644 index bb41031..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa300.h +++ /dev/null @@ -1,575 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/mfp-pxa300.h - * - * PXA300/PXA310 specific MFP configuration definitions - * - * Copyright (C) 2007 Marvell International Ltd. - * 2007-08-21: eric miao - * initial version - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MFP_PXA300_H -#define __ASM_ARCH_MFP_PXA300_H - -#include -#include - -/* GPIO */ -#define GPIO46_GPIO MFP_CFG(GPIO46, AF1) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF3) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF2) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF3) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF3) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) - -#ifdef CONFIG_CPU_PXA310 -#define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0) -#define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0) -#define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0) -#define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0) -#define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0) -#define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0) -#endif - -/* Chip Select */ -#define GPIO2_nCS3 MFP_CFG(GPIO2, AF1) - -/* AC97 */ -#define GPIO23_AC97_nACRESET MFP_CFG(GPIO23, AF1) -#define GPIO24_AC97_SYSCLK MFP_CFG(GPIO24, AF1) -#define GPIO29_AC97_BITCLK MFP_CFG(GPIO29, AF1) -#define GPIO25_AC97_SDATA_IN_0 MFP_CFG(GPIO25, AF1) -#define GPIO26_AC97_SDATA_IN_1 MFP_CFG(GPIO26, AF1) -#define GPIO17_AC97_SDATA_IN_2 MFP_CFG(GPIO17, AF3) -#define GPIO21_AC97_SDATA_IN_2 MFP_CFG(GPIO21, AF2) -#define GPIO18_AC97_SDATA_IN_3 MFP_CFG(GPIO18, AF3) -#define GPIO22_AC97_SDATA_IN_3 MFP_CFG(GPIO22, AF2) -#define GPIO27_AC97_SDATA_OUT MFP_CFG(GPIO27, AF1) -#define GPIO28_AC97_SYNC MFP_CFG(GPIO28, AF1) - -/* I2C */ -#define GPIO21_I2C_SCL MFP_CFG_LPM(GPIO21, AF1, PULL_HIGH) -#define GPIO22_I2C_SDA MFP_CFG_LPM(GPIO22, AF1, PULL_HIGH) - -/* QCI */ -#define GPIO39_CI_DD_0 MFP_CFG_DRV(GPIO39, AF1, DS04X) -#define GPIO40_CI_DD_1 MFP_CFG_DRV(GPIO40, AF1, DS04X) -#define GPIO41_CI_DD_2 MFP_CFG_DRV(GPIO41, AF1, DS04X) -#define GPIO42_CI_DD_3 MFP_CFG_DRV(GPIO42, AF1, DS04X) -#define GPIO43_CI_DD_4 MFP_CFG_DRV(GPIO43, AF1, DS04X) -#define GPIO44_CI_DD_5 MFP_CFG_DRV(GPIO44, AF1, DS04X) -#define GPIO45_CI_DD_6 MFP_CFG_DRV(GPIO45, AF1, DS04X) -#define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X) -#define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X) -#define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X) -#define GPIO52_CI_HSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X) -#define GPIO51_CI_VSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X) -#define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X) -#define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X) - -/* KEYPAD */ -#define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT) -#define GPIO4_KP_DKIN_7 MFP_CFG_LPM(GPIO4, AF2, FLOAT) -#define GPIO16_KP_DKIN_6 MFP_CFG_LPM(GPIO16, AF6, FLOAT) -#define GPIO83_KP_DKIN_2 MFP_CFG_LPM(GPIO83, AF5, FLOAT) -#define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF5, FLOAT) -#define GPIO85_KP_DKIN_0 MFP_CFG_LPM(GPIO85, AF3, FLOAT) -#define GPIO86_KP_DKIN_1 MFP_CFG_LPM(GPIO86, AF3, FLOAT) -#define GPIO87_KP_DKIN_2 MFP_CFG_LPM(GPIO87, AF3, FLOAT) -#define GPIO88_KP_DKIN_3 MFP_CFG_LPM(GPIO88, AF3, FLOAT) -#define GPIO89_KP_DKIN_3 MFP_CFG_LPM(GPIO89, AF3, FLOAT) -#define GPIO107_KP_DKIN_0 MFP_CFG_LPM(GPIO107, AF2, FLOAT) -#define GPIO108_KP_DKIN_1 MFP_CFG_LPM(GPIO108, AF2, FLOAT) -#define GPIO109_KP_DKIN_2 MFP_CFG_LPM(GPIO109, AF2, FLOAT) -#define GPIO110_KP_DKIN_3 MFP_CFG_LPM(GPIO110, AF2, FLOAT) -#define GPIO111_KP_DKIN_4 MFP_CFG_LPM(GPIO111, AF2, FLOAT) -#define GPIO112_KP_DKIN_5 MFP_CFG_LPM(GPIO112, AF2, FLOAT) -#define GPIO113_KP_DKIN_6 MFP_CFG_LPM(GPIO113, AF2, FLOAT) -#define GPIO114_KP_DKIN_7 MFP_CFG_LPM(GPIO114, AF2, FLOAT) -#define GPIO115_KP_DKIN_0 MFP_CFG_LPM(GPIO115, AF2, FLOAT) -#define GPIO116_KP_DKIN_1 MFP_CFG_LPM(GPIO116, AF2, FLOAT) -#define GPIO117_KP_DKIN_2 MFP_CFG_LPM(GPIO117, AF2, FLOAT) -#define GPIO118_KP_DKIN_3 MFP_CFG_LPM(GPIO118, AF2, FLOAT) -#define GPIO119_KP_DKIN_4 MFP_CFG_LPM(GPIO119, AF2, FLOAT) -#define GPIO120_KP_DKIN_5 MFP_CFG_LPM(GPIO120, AF2, FLOAT) -#define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT) -#define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT) -#define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT) -#define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT) -#define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF5, FLOAT) -#define GPIO0_2_KP_DKIN_0 MFP_CFG_LPM(GPIO0_2, AF2, FLOAT) -#define GPIO1_2_KP_DKIN_1 MFP_CFG_LPM(GPIO1_2, AF2, FLOAT) -#define GPIO2_2_KP_DKIN_6 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT) -#define GPIO3_2_KP_DKIN_7 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT) -#define GPIO4_2_KP_DKIN_1 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT) -#define GPIO5_2_KP_DKIN_0 MFP_CFG_LPM(GPIO5_2, AF2, FLOAT) - -#define GPIO5_KP_MKIN_0 MFP_CFG_LPM(GPIO5, AF2, FLOAT) -#define GPIO6_KP_MKIN_1 MFP_CFG_LPM(GPIO6, AF2, FLOAT) -#define GPIO9_KP_MKIN_6 MFP_CFG_LPM(GPIO9, AF3, FLOAT) -#define GPIO10_KP_MKIN_7 MFP_CFG_LPM(GPIO10, AF3, FLOAT) -#define GPIO70_KP_MKIN_6 MFP_CFG_LPM(GPIO70, AF3, FLOAT) -#define GPIO71_KP_MKIN_7 MFP_CFG_LPM(GPIO71, AF3, FLOAT) -#define GPIO100_KP_MKIN_6 MFP_CFG_LPM(GPIO100, AF7, FLOAT) -#define GPIO101_KP_MKIN_7 MFP_CFG_LPM(GPIO101, AF7, FLOAT) -#define GPIO112_KP_MKIN_6 MFP_CFG_LPM(GPIO112, AF4, FLOAT) -#define GPIO113_KP_MKIN_7 MFP_CFG_LPM(GPIO113, AF4, FLOAT) -#define GPIO115_KP_MKIN_0 MFP_CFG_LPM(GPIO115, AF1, FLOAT) -#define GPIO116_KP_MKIN_1 MFP_CFG_LPM(GPIO116, AF1, FLOAT) -#define GPIO117_KP_MKIN_2 MFP_CFG_LPM(GPIO117, AF1, FLOAT) -#define GPIO118_KP_MKIN_3 MFP_CFG_LPM(GPIO118, AF1, FLOAT) -#define GPIO119_KP_MKIN_4 MFP_CFG_LPM(GPIO119, AF1, FLOAT) -#define GPIO120_KP_MKIN_5 MFP_CFG_LPM(GPIO120, AF1, FLOAT) -#define GPIO125_KP_MKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT) -#define GPIO2_2_KP_MKIN_6 MFP_CFG_LPM(GPIO2_2, AF1, FLOAT) -#define GPIO3_2_KP_MKIN_7 MFP_CFG_LPM(GPIO3_2, AF1, FLOAT) - -#define GPIO7_KP_MKOUT_5 MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH) -#define GPIO11_KP_MKOUT_5 MFP_CFG_LPM(GPIO11, AF3, DRIVE_HIGH) -#define GPIO12_KP_MKOUT_6 MFP_CFG_LPM(GPIO12, AF3, DRIVE_HIGH) -#define GPIO13_KP_MKOUT_7 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH) -#define GPIO19_KP_MKOUT_4 MFP_CFG_LPM(GPIO19, AF3, DRIVE_HIGH) -#define GPIO20_KP_MKOUT_5 MFP_CFG_LPM(GPIO20, AF3, DRIVE_HIGH) -#define GPIO38_KP_MKOUT_5 MFP_CFG_LPM(GPIO38, AF5, DRIVE_HIGH) -#define GPIO53_KP_MKOUT_6 MFP_CFG_LPM(GPIO53, AF5, DRIVE_HIGH) -#define GPIO78_KP_MKOUT_7 MFP_CFG_LPM(GPIO78, AF5, DRIVE_HIGH) -#define GPIO85_KP_MKOUT_0 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH) -#define GPIO86_KP_MKOUT_1 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH) -#define GPIO87_KP_MKOUT_2 MFP_CFG_LPM(GPIO87, AF2, DRIVE_HIGH) -#define GPIO88_KP_MKOUT_3 MFP_CFG_LPM(GPIO88, AF2, DRIVE_HIGH) -#define GPIO104_KP_MKOUT_6 MFP_CFG_LPM(GPIO104, AF5, DRIVE_HIGH) -#define GPIO105_KP_MKOUT_7 MFP_CFG_LPM(GPIO105, AF5, DRIVE_HIGH) -#define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH) -#define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH) -#define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH) -#define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH) -#define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH) -#define GPIO126_KP_MKOUT_7 MFP_CFG_LPM(GPIO126, AF4, DRIVE_HIGH) -#define GPIO5_2_KP_MKOUT_6 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH) -#define GPIO4_2_KP_MKOUT_5 MFP_CFG_LPM(GPIO4_2, AF1, DRIVE_HIGH) -#define GPIO6_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO6_2, AF1, DRIVE_HIGH) - -/* LCD */ -#define GPIO54_LCD_LDD_0 MFP_CFG_DRV(GPIO54, AF1, DS01X) -#define GPIO55_LCD_LDD_1 MFP_CFG_DRV(GPIO55, AF1, DS01X) -#define GPIO56_LCD_LDD_2 MFP_CFG_DRV(GPIO56, AF1, DS01X) -#define GPIO57_LCD_LDD_3 MFP_CFG_DRV(GPIO57, AF1, DS01X) -#define GPIO58_LCD_LDD_4 MFP_CFG_DRV(GPIO58, AF1, DS01X) -#define GPIO59_LCD_LDD_5 MFP_CFG_DRV(GPIO59, AF1, DS01X) -#define GPIO60_LCD_LDD_6 MFP_CFG_DRV(GPIO60, AF1, DS01X) -#define GPIO61_LCD_LDD_7 MFP_CFG_DRV(GPIO61, AF1, DS01X) -#define GPIO62_LCD_LDD_8 MFP_CFG_DRV(GPIO62, AF1, DS01X) -#define GPIO63_LCD_LDD_9 MFP_CFG_DRV(GPIO63, AF1, DS01X) -#define GPIO64_LCD_LDD_10 MFP_CFG_DRV(GPIO64, AF1, DS01X) -#define GPIO65_LCD_LDD_11 MFP_CFG_DRV(GPIO65, AF1, DS01X) -#define GPIO66_LCD_LDD_12 MFP_CFG_DRV(GPIO66, AF1, DS01X) -#define GPIO67_LCD_LDD_13 MFP_CFG_DRV(GPIO67, AF1, DS01X) -#define GPIO68_LCD_LDD_14 MFP_CFG_DRV(GPIO68, AF1, DS01X) -#define GPIO69_LCD_LDD_15 MFP_CFG_DRV(GPIO69, AF1, DS01X) -#define GPIO70_LCD_LDD_16 MFP_CFG_DRV(GPIO70, AF1, DS01X) -#define GPIO71_LCD_LDD_17 MFP_CFG_DRV(GPIO71, AF1, DS01X) -#define GPIO62_LCD_CS_N MFP_CFG_DRV(GPIO62, AF2, DS01X) -#define GPIO72_LCD_FCLK MFP_CFG_DRV(GPIO72, AF1, DS01X) -#define GPIO73_LCD_LCLK MFP_CFG_DRV(GPIO73, AF1, DS01X) -#define GPIO74_LCD_PCLK MFP_CFG_DRV(GPIO74, AF1, DS02X) -#define GPIO75_LCD_BIAS MFP_CFG_DRV(GPIO75, AF1, DS01X) -#define GPIO76_LCD_VSYNC MFP_CFG_DRV(GPIO76, AF2, DS01X) - -#define GPIO15_LCD_CS_N MFP_CFG_DRV(GPIO15, AF2, DS01X) -#define GPIO127_LCD_CS_N MFP_CFG_DRV(GPIO127, AF1, DS01X) -#define GPIO63_LCD_VSYNC MFP_CFG_DRV(GPIO63, AF2, DS01X) - -/* Mini-LCD */ -#define GPIO72_MLCD_FCLK MFP_CFG_DRV(GPIO72, AF7, DS08X) -#define GPIO73_MLCD_LCLK MFP_CFG_DRV(GPIO73, AF7, DS08X) -#define GPIO54_MLCD_LDD_0 MFP_CFG_DRV(GPIO54, AF7, DS08X) -#define GPIO55_MLCD_LDD_1 MFP_CFG_DRV(GPIO55, AF7, DS08X) -#define GPIO56_MLCD_LDD_2 MFP_CFG_DRV(GPIO56, AF7, DS08X) -#define GPIO57_MLCD_LDD_3 MFP_CFG_DRV(GPIO57, AF7, DS08X) -#define GPIO58_MLCD_LDD_4 MFP_CFG_DRV(GPIO58, AF7, DS08X) -#define GPIO59_MLCD_LDD_5 MFP_CFG_DRV(GPIO59, AF7, DS08X) -#define GPIO60_MLCD_LDD_6 MFP_CFG_DRV(GPIO60, AF7, DS08X) -#define GPIO61_MLCD_LDD_7 MFP_CFG_DRV(GPIO61, AF7, DS08X) -#define GPIO62_MLCD_LDD_8 MFP_CFG_DRV(GPIO62, AF7, DS08X) -#define GPIO63_MLCD_LDD_9 MFP_CFG_DRV(GPIO63, AF7, DS08X) -#define GPIO64_MLCD_LDD_10 MFP_CFG_DRV(GPIO64, AF7, DS08X) -#define GPIO65_MLCD_LDD_11 MFP_CFG_DRV(GPIO65, AF7, DS08X) -#define GPIO66_MLCD_LDD_12 MFP_CFG_DRV(GPIO66, AF7, DS08X) -#define GPIO67_MLCD_LDD_13 MFP_CFG_DRV(GPIO67, AF7, DS08X) -#define GPIO68_MLCD_LDD_14 MFP_CFG_DRV(GPIO68, AF7, DS08X) -#define GPIO69_MLCD_LDD_15 MFP_CFG_DRV(GPIO69, AF7, DS08X) -#define GPIO74_MLCD_PCLK MFP_CFG_DRV(GPIO74, AF7, DS08X) -#define GPIO75_MLCD_BIAS MFP_CFG_DRV(GPIO75, AF2, DS08X) - -/* MMC1 */ -#define GPIO7_MMC1_CLK MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH) -#define GPIO8_MMC1_CMD MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH) -#define GPIO14_MMC1_CMD MFP_CFG_LPM(GPIO14, AF5, DRIVE_HIGH) -#define GPIO15_MMC1_CMD MFP_CFG_LPM(GPIO15, AF5, DRIVE_HIGH) -#define GPIO3_MMC1_DAT0 MFP_CFG_LPM(GPIO3, AF4, DRIVE_HIGH) -#define GPIO4_MMC1_DAT1 MFP_CFG_LPM(GPIO4, AF4, DRIVE_HIGH) -#define GPIO5_MMC1_DAT2 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH) -#define GPIO6_MMC1_DAT3 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH) - -/* MMC2 */ -#define GPIO9_MMC2_DAT0 MFP_CFG_LPM(GPIO9, AF4, PULL_HIGH) -#define GPIO10_MMC2_DAT1 MFP_CFG_LPM(GPIO10, AF4, PULL_HIGH) -#define GPIO11_MMC2_DAT2 MFP_CFG_LPM(GPIO11, AF4, PULL_HIGH) -#define GPIO12_MMC2_DAT3 MFP_CFG_LPM(GPIO12, AF4, PULL_HIGH) -#define GPIO13_MMC2_CLK MFP_CFG_LPM(GPIO13, AF4, PULL_HIGH) -#define GPIO14_MMC2_CMD MFP_CFG_LPM(GPIO14, AF4, PULL_HIGH) -#define GPIO77_MMC2_DAT0 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH) -#define GPIO78_MMC2_DAT1 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH) -#define GPIO79_MMC2_DAT2 MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH) -#define GPIO80_MMC2_DAT3 MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH) -#define GPIO81_MMC2_CLK MFP_CFG_LPM(GPIO81, AF4, PULL_HIGH) -#define GPIO82_MMC2_CMD MFP_CFG_LPM(GPIO82, AF4, PULL_HIGH) - -/* SSP1 */ -#define GPIO89_SSP1_EXTCLK MFP_CFG(GPIO89, AF1) -#define GPIO90_SSP1_SYSCLK MFP_CFG(GPIO90, AF1) -#define GPIO15_SSP1_SCLK MFP_CFG(GPIO15, AF6) -#define GPIO16_SSP1_FRM MFP_CFG(GPIO16, AF2) -#define GPIO33_SSP1_SCLK MFP_CFG(GPIO33, AF5) -#define GPIO34_SSP1_FRM MFP_CFG(GPIO34, AF5) -#define GPIO85_SSP1_SCLK MFP_CFG(GPIO85, AF1) -#define GPIO86_SSP1_FRM MFP_CFG(GPIO86, AF1) -#define GPIO18_SSP1_TXD MFP_CFG(GPIO18, AF7) -#define GPIO18_SSP1_RXD MFP_CFG(GPIO18, AF2) -#define GPIO20_SSP1_TXD MFP_CFG(GPIO20, AF2) -#define GPIO20_SSP1_RXD MFP_CFG(GPIO20, AF7) -#define GPIO35_SSP1_TXD MFP_CFG(GPIO35, AF5) -#define GPIO35_SSP1_RXD MFP_CFG(GPIO35, AF4) -#define GPIO36_SSP1_TXD MFP_CFG(GPIO36, AF5) -#define GPIO36_SSP1_RXD MFP_CFG(GPIO36, AF6) -#define GPIO87_SSP1_TXD MFP_CFG(GPIO87, AF1) -#define GPIO87_SSP1_RXD MFP_CFG(GPIO87, AF6) -#define GPIO88_SSP1_TXD MFP_CFG(GPIO88, AF6) -#define GPIO88_SSP1_RXD MFP_CFG(GPIO88, AF1) - -/* SSP2 */ -#define GPIO29_SSP2_EXTCLK MFP_CFG(GPIO29, AF2) -#define GPIO23_SSP2_SCLK MFP_CFG(GPIO23, AF2) -#define GPIO17_SSP2_FRM MFP_CFG(GPIO17, AF2) -#define GPIO25_SSP2_SCLK MFP_CFG(GPIO25, AF2) -#define GPIO26_SSP2_FRM MFP_CFG(GPIO26, AF2) -#define GPIO33_SSP2_SCLK MFP_CFG(GPIO33, AF6) -#define GPIO34_SSP2_FRM MFP_CFG(GPIO34, AF6) -#define GPIO64_SSP2_SCLK MFP_CFG(GPIO64, AF2) -#define GPIO65_SSP2_FRM MFP_CFG(GPIO65, AF2) -#define GPIO19_SSP2_TXD MFP_CFG(GPIO19, AF2) -#define GPIO19_SSP2_RXD MFP_CFG(GPIO19, AF7) -#define GPIO24_SSP2_TXD MFP_CFG(GPIO24, AF5) -#define GPIO24_SSP2_RXD MFP_CFG(GPIO24, AF4) -#define GPIO27_SSP2_TXD MFP_CFG(GPIO27, AF2) -#define GPIO27_SSP2_RXD MFP_CFG(GPIO27, AF5) -#define GPIO28_SSP2_TXD MFP_CFG(GPIO28, AF5) -#define GPIO28_SSP2_RXD MFP_CFG(GPIO28, AF2) -#define GPIO35_SSP2_TXD MFP_CFG(GPIO35, AF7) -#define GPIO35_SSP2_RXD MFP_CFG(GPIO35, AF6) -#define GPIO66_SSP2_TXD MFP_CFG(GPIO66, AF4) -#define GPIO66_SSP2_RXD MFP_CFG(GPIO66, AF2) -#define GPIO67_SSP2_TXD MFP_CFG(GPIO67, AF2) -#define GPIO67_SSP2_RXD MFP_CFG(GPIO67, AF4) -#define GPIO36_SSP2_TXD MFP_CFG(GPIO36, AF7) - -/* SSP3 */ -#define GPIO69_SSP3_FRM MFP_CFG_X(GPIO69, AF2, DS08X, DRIVE_LOW) -#define GPIO68_SSP3_SCLK MFP_CFG_X(GPIO68, AF2, DS08X, FLOAT) -#define GPIO92_SSP3_FRM MFP_CFG_X(GPIO92, AF1, DS08X, DRIVE_LOW) -#define GPIO91_SSP3_SCLK MFP_CFG_X(GPIO91, AF1, DS08X, FLOAT) -#define GPIO70_SSP3_TXD MFP_CFG_X(GPIO70, AF2, DS08X, DRIVE_LOW) -#define GPIO70_SSP3_RXD MFP_CFG_X(GPIO70, AF5, DS08X, FLOAT) -#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF5, DS08X, DRIVE_LOW) -#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF2, DS08X, FLOAT) -#define GPIO93_SSP3_TXD MFP_CFG_X(GPIO93, AF1, DS08X, DRIVE_LOW) -#define GPIO93_SSP3_RXD MFP_CFG_X(GPIO93, AF5, DS08X, FLOAT) -#define GPIO94_SSP3_TXD MFP_CFG_X(GPIO94, AF5, DS08X, DRIVE_LOW) -#define GPIO94_SSP3_RXD MFP_CFG_X(GPIO94, AF1, DS08X, FLOAT) - -/* SSP4 */ -#define GPIO95_SSP4_SCLK MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) -#define GPIO96_SSP4_FRM MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) -#define GPIO97_SSP4_TXD MFP_CFG_LPM(GPIO97, AF1, PULL_HIGH) -#define GPIO97_SSP4_RXD MFP_CFG_LPM(GPIO97, AF5, PULL_HIGH) -#define GPIO98_SSP4_TXD MFP_CFG_LPM(GPIO98, AF5, PULL_HIGH) -#define GPIO98_SSP4_RXD MFP_CFG_LPM(GPIO98, AF1, PULL_HIGH) - -/* UART1 */ -#define GPIO32_UART1_CTS MFP_CFG_LPM(GPIO32, AF2, FLOAT) -#define GPIO37_UART1_CTS MFP_CFG_LPM(GPIO37, AF4, FLOAT) -#define GPIO79_UART1_CTS MFP_CFG_LPM(GPIO79, AF1, FLOAT) -#define GPIO84_UART1_CTS MFP_CFG_LPM(GPIO84, AF3, FLOAT) -#define GPIO101_UART1_CTS MFP_CFG_LPM(GPIO101, AF1, FLOAT) -#define GPIO106_UART1_CTS MFP_CFG_LPM(GPIO106, AF6, FLOAT) - -#define GPIO32_UART1_RTS MFP_CFG_LPM(GPIO32, AF4, FLOAT) -#define GPIO37_UART1_RTS MFP_CFG_LPM(GPIO37, AF2, FLOAT) -#define GPIO79_UART1_RTS MFP_CFG_LPM(GPIO79, AF3, FLOAT) -#define GPIO84_UART1_RTS MFP_CFG_LPM(GPIO84, AF1, FLOAT) -#define GPIO101_UART1_RTS MFP_CFG_LPM(GPIO101, AF6, FLOAT) -#define GPIO106_UART1_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT) - -#define GPIO34_UART1_DSR MFP_CFG_LPM(GPIO34, AF2, FLOAT) -#define GPIO36_UART1_DSR MFP_CFG_LPM(GPIO36, AF4, FLOAT) -#define GPIO81_UART1_DSR MFP_CFG_LPM(GPIO81, AF1, FLOAT) -#define GPIO83_UART1_DSR MFP_CFG_LPM(GPIO83, AF3, FLOAT) -#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF1, FLOAT) -#define GPIO105_UART1_DSR MFP_CFG_LPM(GPIO105, AF6, FLOAT) - -#define GPIO34_UART1_DTR MFP_CFG_LPM(GPIO34, AF4, FLOAT) -#define GPIO36_UART1_DTR MFP_CFG_LPM(GPIO36, AF2, FLOAT) -#define GPIO81_UART1_DTR MFP_CFG_LPM(GPIO81, AF3, FLOAT) -#define GPIO83_UART1_DTR MFP_CFG_LPM(GPIO83, AF1, FLOAT) -#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF6, FLOAT) -#define GPIO105_UART1_DTR MFP_CFG_LPM(GPIO105, AF1, FLOAT) - -#define GPIO35_UART1_RI MFP_CFG_LPM(GPIO35, AF2, FLOAT) -#define GPIO82_UART1_RI MFP_CFG_LPM(GPIO82, AF1, FLOAT) -#define GPIO104_UART1_RI MFP_CFG_LPM(GPIO104, AF1, FLOAT) - -#define GPIO33_UART1_DCD MFP_CFG_LPM(GPIO33, AF2, FLOAT) -#define GPIO80_UART1_DCD MFP_CFG_LPM(GPIO80, AF1, FLOAT) -#define GPIO102_UART1_DCD MFP_CFG_LPM(GPIO102, AF1, FLOAT) - -#define GPIO30_UART1_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT) -#define GPIO31_UART1_RXD MFP_CFG_LPM(GPIO31, AF4, FLOAT) -#define GPIO77_UART1_RXD MFP_CFG_LPM(GPIO77, AF1, FLOAT) -#define GPIO78_UART1_RXD MFP_CFG_LPM(GPIO78, AF3, FLOAT) -#define GPIO99_UART1_RXD MFP_CFG_LPM(GPIO99, AF1, FLOAT) -#define GPIO100_UART1_RXD MFP_CFG_LPM(GPIO100, AF6, FLOAT) -#define GPIO102_UART1_RXD MFP_CFG_LPM(GPIO102, AF6, FLOAT) -#define GPIO104_UART1_RXD MFP_CFG_LPM(GPIO104, AF4, FLOAT) - -#define GPIO30_UART1_TXD MFP_CFG_LPM(GPIO30, AF4, FLOAT) -#define GPIO31_UART1_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT) -#define GPIO77_UART1_TXD MFP_CFG_LPM(GPIO77, AF3, FLOAT) -#define GPIO78_UART1_TXD MFP_CFG_LPM(GPIO78, AF1, FLOAT) -#define GPIO99_UART1_TXD MFP_CFG_LPM(GPIO99, AF6, FLOAT) -#define GPIO100_UART1_TXD MFP_CFG_LPM(GPIO100, AF1, FLOAT) -#define GPIO102_UART1_TXD MFP_CFG_LPM(GPIO102, AF4, FLOAT) - -/* UART2 */ -#define GPIO15_UART2_CTS MFP_CFG_LPM(GPIO15, AF3, FLOAT) -#define GPIO16_UART2_CTS MFP_CFG_LPM(GPIO16, AF5, FLOAT) -#define GPIO111_UART2_CTS MFP_CFG_LPM(GPIO111, AF3, FLOAT) -#define GPIO114_UART2_CTS MFP_CFG_LPM(GPIO114, AF1, FLOAT) - -#define GPIO15_UART2_RTS MFP_CFG_LPM(GPIO15, AF4, FLOAT) -#define GPIO16_UART2_RTS MFP_CFG_LPM(GPIO16, AF4, FLOAT) -#define GPIO114_UART2_RTS MFP_CFG_LPM(GPIO114, AF3, FLOAT) -#define GPIO111_UART2_RTS MFP_CFG_LPM(GPIO111, AF1, FLOAT) - -#define GPIO18_UART2_RXD MFP_CFG_LPM(GPIO18, AF5, FLOAT) -#define GPIO19_UART2_RXD MFP_CFG_LPM(GPIO19, AF4, FLOAT) -#define GPIO112_UART2_RXD MFP_CFG_LPM(GPIO112, AF1, FLOAT) -#define GPIO113_UART2_RXD MFP_CFG_LPM(GPIO113, AF3, FLOAT) - -#define GPIO18_UART2_TXD MFP_CFG_LPM(GPIO18, AF4, FLOAT) -#define GPIO19_UART2_TXD MFP_CFG_LPM(GPIO19, AF5, FLOAT) -#define GPIO112_UART2_TXD MFP_CFG_LPM(GPIO112, AF3, FLOAT) -#define GPIO113_UART2_TXD MFP_CFG_LPM(GPIO113, AF1, FLOAT) - -/* UART3 */ -#define GPIO91_UART3_CTS MFP_CFG_LPM(GPIO91, AF2, FLOAT) -#define GPIO92_UART3_CTS MFP_CFG_LPM(GPIO92, AF4, FLOAT) -#define GPIO107_UART3_CTS MFP_CFG_LPM(GPIO107, AF1, FLOAT) -#define GPIO108_UART3_CTS MFP_CFG_LPM(GPIO108, AF3, FLOAT) - -#define GPIO91_UART3_RTS MFP_CFG_LPM(GPIO91, AF4, FLOAT) -#define GPIO92_UART3_RTS MFP_CFG_LPM(GPIO92, AF2, FLOAT) -#define GPIO107_UART3_RTS MFP_CFG_LPM(GPIO107, AF3, FLOAT) -#define GPIO108_UART3_RTS MFP_CFG_LPM(GPIO108, AF1, FLOAT) - -#define GPIO7_UART3_RXD MFP_CFG_LPM(GPIO7, AF2, FLOAT) -#define GPIO8_UART3_RXD MFP_CFG_LPM(GPIO8, AF6, FLOAT) -#define GPIO93_UART3_RXD MFP_CFG_LPM(GPIO93, AF4, FLOAT) -#define GPIO94_UART3_RXD MFP_CFG_LPM(GPIO94, AF2, FLOAT) -#define GPIO109_UART3_RXD MFP_CFG_LPM(GPIO109, AF3, FLOAT) -#define GPIO110_UART3_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT) - -#define GPIO7_UART3_TXD MFP_CFG_LPM(GPIO7, AF6, FLOAT) -#define GPIO8_UART3_TXD MFP_CFG_LPM(GPIO8, AF2, FLOAT) -#define GPIO93_UART3_TXD MFP_CFG_LPM(GPIO93, AF2, FLOAT) -#define GPIO94_UART3_TXD MFP_CFG_LPM(GPIO94, AF4, FLOAT) -#define GPIO109_UART3_TXD MFP_CFG_LPM(GPIO109, AF1, FLOAT) -#define GPIO110_UART3_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT) - -/* USB Host */ -#define GPIO0_2_USBH_PEN MFP_CFG(GPIO0_2, AF1) -#define GPIO1_2_USBH_PWR MFP_CFG(GPIO1_2, AF1) - -/* USB P3 */ -#define GPIO77_USB_P3_1 MFP_CFG(GPIO77, AF2) -#define GPIO78_USB_P3_2 MFP_CFG(GPIO78, AF2) -#define GPIO79_USB_P3_3 MFP_CFG(GPIO79, AF2) -#define GPIO80_USB_P3_4 MFP_CFG(GPIO80, AF2) -#define GPIO81_USB_P3_5 MFP_CFG(GPIO81, AF2) -#define GPIO82_USB_P3_6 MFP_CFG(GPIO82, AF2) - -/* PWM */ -#define GPIO17_PWM0_OUT MFP_CFG(GPIO17, AF1) -#define GPIO18_PWM1_OUT MFP_CFG(GPIO18, AF1) -#define GPIO19_PWM2_OUT MFP_CFG(GPIO19, AF1) -#define GPIO20_PWM3_OUT MFP_CFG(GPIO20, AF1) - -/* CIR */ -#define GPIO8_CIR_OUT MFP_CFG(GPIO8, AF5) -#define GPIO16_CIR_OUT MFP_CFG(GPIO16, AF3) - -#define GPIO20_OW_DQ_IN MFP_CFG(GPIO20, AF5) -#define GPIO126_OW_DQ MFP_CFG(GPIO126, AF2) - -#define GPIO0_DF_RDY MFP_CFG(GPIO0, AF1) -#define GPIO7_CLK_BYPASS_XSC MFP_CFG(GPIO7, AF7) -#define GPIO17_EXT_SYNC_MVT_0 MFP_CFG(GPIO17, AF6) -#define GPIO18_EXT_SYNC_MVT_1 MFP_CFG(GPIO18, AF6) -#define GPIO19_OST_CHOUT_MVT_0 MFP_CFG(GPIO19, AF6) -#define GPIO20_OST_CHOUT_MVT_1 MFP_CFG(GPIO20, AF6) -#define GPIO49_48M_CLK MFP_CFG(GPIO49, AF2) -#define GPIO126_EXT_CLK MFP_CFG(GPIO126, AF3) -#define GPIO127_CLK_BYPASS_GB MFP_CFG(GPIO127, AF7) -#define GPIO71_EXT_MATCH_MVT MFP_CFG(GPIO71, AF6) - -#define GPIO3_uIO_IN MFP_CFG(GPIO3, AF1) - -#define GPIO4_uSIM_CARD_STATE MFP_CFG(GPIO4, AF1) -#define GPIO5_uSIM_uCLK MFP_CFG(GPIO5, AF1) -#define GPIO6_uSIM_uRST MFP_CFG(GPIO6, AF1) -#define GPIO16_uSIM_UVS_0 MFP_CFG(GPIO16, AF1) - -#define GPIO9_SCIO MFP_CFG(GPIO9, AF1) -#define GPIO20_RTC_MVT MFP_CFG(GPIO20, AF4) -#define GPIO126_RTC_MVT MFP_CFG(GPIO126, AF1) - -/* - * PXA300 specific MFP configurations - */ -#ifdef CONFIG_CPU_PXA300 -#define GPIO99_USB_P2_2 MFP_CFG(GPIO99, AF2) -#define GPIO99_USB_P2_5 MFP_CFG(GPIO99, AF3) -#define GPIO99_USB_P2_6 MFP_CFG(GPIO99, AF4) -#define GPIO100_USB_P2_2 MFP_CFG(GPIO100, AF4) -#define GPIO100_USB_P2_5 MFP_CFG(GPIO100, AF5) -#define GPIO101_USB_P2_1 MFP_CFG(GPIO101, AF2) -#define GPIO102_USB_P2_4 MFP_CFG(GPIO102, AF2) -#define GPIO104_USB_P2_3 MFP_CFG(GPIO104, AF2) -#define GPIO105_USB_P2_5 MFP_CFG(GPIO105, AF2) -#define GPIO100_USB_P2_6 MFP_CFG(GPIO100, AF2) -#define GPIO106_USB_P2_7 MFP_CFG(GPIO106, AF2) -#define GPIO103_USB_P2_8 MFP_CFG(GPIO103, AF2) - -/* U2D UTMI */ -#define GPIO38_UTM_CLK MFP_CFG(GPIO38, AF1) -#define GPIO26_U2D_RXERROR MFP_CFG(GPIO26, AF3) -#define GPIO50_U2D_RXERROR MFP_CFG(GPIO50, AF1) -#define GPIO89_U2D_RXERROR MFP_CFG(GPIO89, AF5) -#define GPIO24_UTM_RXVALID MFP_CFG(GPIO24, AF3) -#define GPIO48_UTM_RXVALID MFP_CFG(GPIO48, AF2) -#define GPIO87_UTM_RXVALID MFP_CFG(GPIO87, AF5) -#define GPIO25_UTM_RXACTIVE MFP_CFG(GPIO25, AF3) -#define GPIO47_UTM_RXACTIVE MFP_CFG(GPIO47, AF2) -#define GPIO49_UTM_RXACTIVE MFP_CFG(GPIO49, AF1) -#define GPIO88_UTM_RXACTIVE MFP_CFG(GPIO88, AF5) -#define GPIO53_UTM_TXREADY MFP_CFG(GPIO53, AF1) -#define GPIO67_UTM_LINESTATE_0 MFP_CFG(GPIO67, AF3) -#define GPIO92_UTM_LINESTATE_0 MFP_CFG(GPIO92, AF3) -#define GPIO104_UTM_LINESTATE_0 MFP_CFG(GPIO104, AF3) -#define GPIO109_UTM_LINESTATE_0 MFP_CFG(GPIO109, AF4) -#define GPIO68_UTM_LINESTATE_1 MFP_CFG(GPIO68, AF3) -#define GPIO93_UTM_LINESTATE_1 MFP_CFG(GPIO93, AF3) -#define GPIO105_UTM_LINESTATE_1 MFP_CFG(GPIO105, AF3) -#define GPIO27_U2D_OPMODE_0 MFP_CFG(GPIO27, AF4) -#define GPIO51_U2D_OPMODE_0 MFP_CFG(GPIO51, AF2) -#define GPIO90_U2D_OPMODE_0 MFP_CFG(GPIO90, AF7) -#define GPIO28_U2D_OPMODE_1 MFP_CFG(GPIO28, AF4) -#define GPIO52_U2D_OPMODE_1 MFP_CFG(GPIO52, AF2) -#define GPIO106_U2D_OPMODE_1 MFP_CFG(GPIO106, AF3) -#define GPIO110_U2D_OPMODE_1 MFP_CFG(GPIO110, AF5) -#define GPIO76_U2D_RESET MFP_CFG(GPIO76, AF1) -#define GPIO95_U2D_RESET MFP_CFG(GPIO95, AF2) -#define GPIO100_U2D_RESET MFP_CFG(GPIO100, AF3) -#define GPIO66_U2D_SUSPEND MFP_CFG(GPIO66, AF3) -#define GPIO98_U2D_SUSPEND MFP_CFG(GPIO98, AF2) -#define GPIO103_U2D_SUSPEND MFP_CFG(GPIO103, AF3) -#define GPIO65_U2D_TERM_SEL MFP_CFG(GPIO65, AF5) -#define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF3) -#define GPIO102_U2D_TERM_SEL MFP_CFG(GPIO102, AF5) -#define GPIO29_U2D_TXVALID MFP_CFG(GPIO29, AF3) -#define GPIO52_U2D_TXVALID MFP_CFG(GPIO52, AF4) -#define GPIO69_U2D_TXVALID MFP_CFG(GPIO69, AF3) -#define GPIO85_U2D_TXVALID MFP_CFG(GPIO85, AF7) -#define GPIO64_U2D_XCVR_SEL MFP_CFG(GPIO64, AF5) -#define GPIO96_U2D_XCVR_SEL MFP_CFG(GPIO96, AF3) -#define GPIO101_U2D_XCVR_SEL MFP_CFG(GPIO101, AF5) -#define GPIO30_UTM_PHYDATA_0 MFP_CFG(GPIO30, AF3) -#define GPIO31_UTM_PHYDATA_1 MFP_CFG(GPIO31, AF3) -#define GPIO32_UTM_PHYDATA_2 MFP_CFG(GPIO32, AF3) -#define GPIO33_UTM_PHYDATA_3 MFP_CFG(GPIO33, AF3) -#define GPIO34_UTM_PHYDATA_4 MFP_CFG(GPIO34, AF3) -#define GPIO35_UTM_PHYDATA_5 MFP_CFG(GPIO35, AF3) -#define GPIO36_UTM_PHYDATA_6 MFP_CFG(GPIO36, AF3) -#define GPIO37_UTM_PHYDATA_7 MFP_CFG(GPIO37, AF3) -#define GPIO39_UTM_PHYDATA_0 MFP_CFG(GPIO39, AF3) -#define GPIO40_UTM_PHYDATA_1 MFP_CFG(GPIO40, AF3) -#define GPIO41_UTM_PHYDATA_2 MFP_CFG(GPIO41, AF3) -#define GPIO42_UTM_PHYDATA_3 MFP_CFG(GPIO42, AF3) -#define GPIO43_UTM_PHYDATA_4 MFP_CFG(GPIO43, AF3) -#define GPIO44_UTM_PHYDATA_5 MFP_CFG(GPIO44, AF3) -#define GPIO45_UTM_PHYDATA_6 MFP_CFG(GPIO45, AF3) -#define GPIO46_UTM_PHYDATA_7 MFP_CFG(GPIO46, AF3) -#endif /* CONFIG_CPU_PXA300 */ - -/* - * PXA310 specific MFP configurations - */ -#ifdef CONFIG_CPU_PXA310 -/* USB P2 */ -#define GPIO36_USB_P2_1 MFP_CFG(GPIO36, AF1) -#define GPIO30_USB_P2_2 MFP_CFG(GPIO30, AF1) -#define GPIO35_USB_P2_3 MFP_CFG(GPIO35, AF1) -#define GPIO32_USB_P2_4 MFP_CFG(GPIO32, AF1) -#define GPIO34_USB_P2_5 MFP_CFG(GPIO34, AF1) -#define GPIO31_USB_P2_6 MFP_CFG(GPIO31, AF1) - -/* MMC1 */ -#define GPIO24_MMC1_CMD MFP_CFG(GPIO24, AF3) -#define GPIO29_MMC1_DAT0 MFP_CFG(GPIO29, AF3) - -/* MMC3 */ -#define GPIO103_MMC3_CLK MFP_CFG(GPIO103, AF2) -#define GPIO105_MMC3_CMD MFP_CFG(GPIO105, AF2) -#define GPIO11_2_MMC3_CLK MFP_CFG(GPIO11_2, AF1) -#define GPIO12_2_MMC3_CMD MFP_CFG(GPIO12_2, AF1) -#define GPIO7_2_MMC3_DAT0 MFP_CFG(GPIO7_2, AF1) -#define GPIO8_2_MMC3_DAT1 MFP_CFG(GPIO8_2, AF1) -#define GPIO9_2_MMC3_DAT2 MFP_CFG(GPIO9_2, AF1) -#define GPIO10_2_MMC3_DAT3 MFP_CFG(GPIO10_2, AF1) - -/* ULPI */ -#define GPIO38_ULPI_CLK MFP_CFG(GPIO38, AF1) -#define GPIO30_ULPI_DATA_OUT_0 MFP_CFG(GPIO30, AF3) -#define GPIO31_ULPI_DATA_OUT_1 MFP_CFG(GPIO31, AF3) -#define GPIO32_ULPI_DATA_OUT_2 MFP_CFG(GPIO32, AF3) -#define GPIO33_ULPI_DATA_OUT_3 MFP_CFG(GPIO33, AF3) -#define GPIO34_ULPI_DATA_OUT_4 MFP_CFG(GPIO34, AF3) -#define GPIO35_ULPI_DATA_OUT_5 MFP_CFG(GPIO35, AF3) -#define GPIO36_ULPI_DATA_OUT_6 MFP_CFG(GPIO36, AF3) -#define GPIO37_ULPI_DATA_OUT_7 MFP_CFG(GPIO37, AF3) -#define GPIO33_ULPI_OTG_INTR MFP_CFG(GPIO33, AF1) - -#define ULPI_DIR MFP_CFG_DRV(ULPI_DIR, MFP_AF0, MFP_DS01X) -#define ULPI_NXT MFP_CFG_DRV(ULPI_NXT, MFP_AF0, MFP_DS01X) -#define ULPI_STP MFP_CFG_DRV(ULPI_STP, MFP_AF0, MFP_DS01X) -#endif /* CONFIG_CPU_PXA310 */ - -#endif /* __ASM_ARCH_MFP_PXA300_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa320.h b/include/asm-arm/arch-pxa/mfp-pxa320.h deleted file mode 100644 index 576aa46..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa320.h +++ /dev/null @@ -1,447 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/mfp-pxa320.h - * - * PXA320 specific MFP configuration definitions - * - * Copyright (C) 2007 Marvell International Ltd. - * 2007-08-21: eric miao - * initial version - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MFP_PXA320_H -#define __ASM_ARCH_MFP_PXA320_H - -#include -#include - -/* GPIO */ -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) - -#define GPIO7_2_GPIO MFP_CFG(GPIO7_2, AF0) -#define GPIO8_2_GPIO MFP_CFG(GPIO8_2, AF0) -#define GPIO9_2_GPIO MFP_CFG(GPIO9_2, AF0) -#define GPIO10_2_GPIO MFP_CFG(GPIO10_2, AF0) -#define GPIO11_2_GPIO MFP_CFG(GPIO11_2, AF0) -#define GPIO12_2_GPIO MFP_CFG(GPIO12_2, AF0) -#define GPIO13_2_GPIO MFP_CFG(GPIO13_2, AF0) -#define GPIO14_2_GPIO MFP_CFG(GPIO14_2, AF0) -#define GPIO15_2_GPIO MFP_CFG(GPIO15_2, AF0) -#define GPIO16_2_GPIO MFP_CFG(GPIO16_2, AF0) -#define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0) - -/* Chip Select */ -#define GPIO4_nCS3 MFP_CFG(GPIO4, AF1) - -/* AC97 */ -#define GPIO34_AC97_SYSCLK MFP_CFG(GPIO34, AF1) -#define GPIO39_AC97_BITCLK MFP_CFG(GPIO39, AF1) -#define GPIO40_AC97_nACRESET MFP_CFG(GPIO40, AF1) -#define GPIO35_AC97_SDATA_IN_0 MFP_CFG(GPIO35, AF1) -#define GPIO36_AC97_SDATA_IN_1 MFP_CFG(GPIO36, AF1) -#define GPIO32_AC97_SDATA_IN_2 MFP_CFG(GPIO32, AF2) -#define GPIO33_AC97_SDATA_IN_3 MFP_CFG(GPIO33, AF2) -#define GPIO11_AC97_SDATA_IN_2 MFP_CFG(GPIO11, AF3) -#define GPIO12_AC97_SDATA_IN_3 MFP_CFG(GPIO12, AF3) -#define GPIO37_AC97_SDATA_OUT MFP_CFG(GPIO37, AF1) -#define GPIO38_AC97_SYNC MFP_CFG(GPIO38, AF1) - -/* I2C */ -#define GPIO32_I2C_SCL MFP_CFG_LPM(GPIO32, AF1, PULL_HIGH) -#define GPIO33_I2C_SDA MFP_CFG_LPM(GPIO33, AF1, PULL_HIGH) - -/* QCI */ -#define GPIO49_CI_DD_0 MFP_CFG_DRV(GPIO49, AF1, DS04X) -#define GPIO50_CI_DD_1 MFP_CFG_DRV(GPIO50, AF1, DS04X) -#define GPIO51_CI_DD_2 MFP_CFG_DRV(GPIO51, AF1, DS04X) -#define GPIO52_CI_DD_3 MFP_CFG_DRV(GPIO52, AF1, DS04X) -#define GPIO53_CI_DD_4 MFP_CFG_DRV(GPIO53, AF1, DS04X) -#define GPIO54_CI_DD_5 MFP_CFG_DRV(GPIO54, AF1, DS04X) -#define GPIO55_CI_DD_6 MFP_CFG_DRV(GPIO55, AF1, DS04X) -#define GPIO56_CI_DD_7 MFP_CFG_DRV(GPIO56, AF0, DS04X) -#define GPIO57_CI_DD_8 MFP_CFG_DRV(GPIO57, AF1, DS04X) -#define GPIO58_CI_DD_9 MFP_CFG_DRV(GPIO58, AF1, DS04X) -#define GPIO59_CI_MCLK MFP_CFG_DRV(GPIO59, AF0, DS04X) -#define GPIO60_CI_PCLK MFP_CFG_DRV(GPIO60, AF0, DS04X) -#define GPIO61_CI_HSYNC MFP_CFG_DRV(GPIO61, AF0, DS04X) -#define GPIO62_CI_VSYNC MFP_CFG_DRV(GPIO62, AF0, DS04X) - -#define GPIO31_CIR_OUT MFP_CFG(GPIO31, AF5) - -#define GPIO0_2_CLK_EXT MFP_CFG(GPIO0_2, AF3) -#define GPIO0_DRQ MFP_CFG(GPIO0, AF2) -#define GPIO11_EXT_SYNC0 MFP_CFG(GPIO11, AF5) -#define GPIO12_EXT_SYNC1 MFP_CFG(GPIO12, AF6) -#define GPIO0_2_HZ_CLK MFP_CFG(GPIO0_2, AF1) -#define GPIO14_HZ_CLK MFP_CFG(GPIO14, AF4) -#define GPIO30_ICP_RXD MFP_CFG(GPIO30, AF1) -#define GPIO31_ICP_TXD MFP_CFG(GPIO31, AF1) - -#define GPIO83_KP_DKIN_0 MFP_CFG_LPM(GPIO83, AF3, FLOAT) -#define GPIO84_KP_DKIN_1 MFP_CFG_LPM(GPIO84, AF3, FLOAT) -#define GPIO85_KP_DKIN_2 MFP_CFG_LPM(GPIO85, AF3, FLOAT) -#define GPIO86_KP_DKIN_3 MFP_CFG_LPM(GPIO86, AF3, FLOAT) - -#define GPIO105_KP_DKIN_0 MFP_CFG_LPM(GPIO105, AF2, FLOAT) -#define GPIO106_KP_DKIN_1 MFP_CFG_LPM(GPIO106, AF2, FLOAT) -#define GPIO107_KP_DKIN_2 MFP_CFG_LPM(GPIO107, AF2, FLOAT) -#define GPIO108_KP_DKIN_3 MFP_CFG_LPM(GPIO108, AF2, FLOAT) -#define GPIO109_KP_DKIN_4 MFP_CFG_LPM(GPIO109, AF2, FLOAT) -#define GPIO110_KP_DKIN_5 MFP_CFG_LPM(GPIO110, AF2, FLOAT) -#define GPIO111_KP_DKIN_6 MFP_CFG_LPM(GPIO111, AF2, FLOAT) -#define GPIO112_KP_DKIN_7 MFP_CFG_LPM(GPIO112, AF2, FLOAT) - -#define GPIO113_KP_DKIN_0 MFP_CFG_LPM(GPIO113, AF2, FLOAT) -#define GPIO114_KP_DKIN_1 MFP_CFG_LPM(GPIO114, AF2, FLOAT) -#define GPIO115_KP_DKIN_2 MFP_CFG_LPM(GPIO115, AF2, FLOAT) -#define GPIO116_KP_DKIN_3 MFP_CFG_LPM(GPIO116, AF2, FLOAT) -#define GPIO117_KP_DKIN_4 MFP_CFG_LPM(GPIO117, AF2, FLOAT) -#define GPIO118_KP_DKIN_5 MFP_CFG_LPM(GPIO118, AF2, FLOAT) -#define GPIO119_KP_DKIN_6 MFP_CFG_LPM(GPIO119, AF2, FLOAT) -#define GPIO120_KP_DKIN_7 MFP_CFG_LPM(GPIO120, AF2, FLOAT) - -#define GPIO127_KP_DKIN_0 MFP_CFG_LPM(GPIO127, AF2, FLOAT) -#define GPIO126_KP_DKIN_1 MFP_CFG_LPM(GPIO126, AF2, FLOAT) - -#define GPIO2_2_KP_DKIN_0 MFP_CFG_LPM(GPIO2_2, AF2, FLOAT) -#define GPIO3_2_KP_DKIN_1 MFP_CFG_LPM(GPIO3_2, AF2, FLOAT) -#define GPIO125_KP_DKIN_2 MFP_CFG_LPM(GPIO125, AF2, FLOAT) -#define GPIO124_KP_DKIN_3 MFP_CFG_LPM(GPIO124, AF2, FLOAT) -#define GPIO123_KP_DKIN_4 MFP_CFG_LPM(GPIO123, AF2, FLOAT) -#define GPIO122_KP_DKIN_5 MFP_CFG_LPM(GPIO122, AF2, FLOAT) -#define GPIO121_KP_DKIN_6 MFP_CFG_LPM(GPIO121, AF2, FLOAT) -#define GPIO4_2_KP_DKIN_7 MFP_CFG_LPM(GPIO4_2, AF2, FLOAT) - -#define GPIO113_KP_MKIN_0 MFP_CFG_LPM(GPIO113, AF1, FLOAT) -#define GPIO114_KP_MKIN_1 MFP_CFG_LPM(GPIO114, AF1, FLOAT) -#define GPIO115_KP_MKIN_2 MFP_CFG_LPM(GPIO115, AF1, FLOAT) -#define GPIO116_KP_MKIN_3 MFP_CFG_LPM(GPIO116, AF1, FLOAT) -#define GPIO117_KP_MKIN_4 MFP_CFG_LPM(GPIO117, AF1, FLOAT) -#define GPIO118_KP_MKIN_5 MFP_CFG_LPM(GPIO118, AF1, FLOAT) -#define GPIO119_KP_MKIN_6 MFP_CFG_LPM(GPIO119, AF1, FLOAT) -#define GPIO120_KP_MKIN_7 MFP_CFG_LPM(GPIO120, AF1, FLOAT) - -#define GPIO83_KP_MKOUT_0 MFP_CFG_LPM(GPIO83, AF2, DRIVE_HIGH) -#define GPIO84_KP_MKOUT_1 MFP_CFG_LPM(GPIO84, AF2, DRIVE_HIGH) -#define GPIO85_KP_MKOUT_2 MFP_CFG_LPM(GPIO85, AF2, DRIVE_HIGH) -#define GPIO86_KP_MKOUT_3 MFP_CFG_LPM(GPIO86, AF2, DRIVE_HIGH) -#define GPIO13_KP_MKOUT_4 MFP_CFG_LPM(GPIO13, AF3, DRIVE_HIGH) -#define GPIO14_KP_MKOUT_5 MFP_CFG_LPM(GPIO14, AF3, DRIVE_HIGH) - -#define GPIO121_KP_MKOUT_0 MFP_CFG_LPM(GPIO121, AF1, DRIVE_HIGH) -#define GPIO122_KP_MKOUT_1 MFP_CFG_LPM(GPIO122, AF1, DRIVE_HIGH) -#define GPIO123_KP_MKOUT_2 MFP_CFG_LPM(GPIO123, AF1, DRIVE_HIGH) -#define GPIO124_KP_MKOUT_3 MFP_CFG_LPM(GPIO124, AF1, DRIVE_HIGH) -#define GPIO125_KP_MKOUT_4 MFP_CFG_LPM(GPIO125, AF1, DRIVE_HIGH) -#define GPIO126_KP_MKOUT_5 MFP_CFG_LPM(GPIO126, AF1, DRIVE_HIGH) -#define GPIO127_KP_MKOUT_6 MFP_CFG_LPM(GPIO127, AF1, DRIVE_HIGH) -#define GPIO5_2_KP_MKOUT_7 MFP_CFG_LPM(GPIO5_2, AF1, DRIVE_HIGH) - -/* LCD */ -#define GPIO6_2_LCD_LDD_0 MFP_CFG_DRV(GPIO6_2, AF1, DS01X) -#define GPIO7_2_LCD_LDD_1 MFP_CFG_DRV(GPIO7_2, AF1, DS01X) -#define GPIO8_2_LCD_LDD_2 MFP_CFG_DRV(GPIO8_2, AF1, DS01X) -#define GPIO9_2_LCD_LDD_3 MFP_CFG_DRV(GPIO9_2, AF1, DS01X) -#define GPIO10_2_LCD_LDD_4 MFP_CFG_DRV(GPIO10_2, AF1, DS01X) -#define GPIO11_2_LCD_LDD_5 MFP_CFG_DRV(GPIO11_2, AF1, DS01X) -#define GPIO12_2_LCD_LDD_6 MFP_CFG_DRV(GPIO12_2, AF1, DS01X) -#define GPIO13_2_LCD_LDD_7 MFP_CFG_DRV(GPIO13_2, AF1, DS01X) -#define GPIO63_LCD_LDD_8 MFP_CFG_DRV(GPIO63, AF1, DS01X) -#define GPIO64_LCD_LDD_9 MFP_CFG_DRV(GPIO64, AF1, DS01X) -#define GPIO65_LCD_LDD_10 MFP_CFG_DRV(GPIO65, AF1, DS01X) -#define GPIO66_LCD_LDD_11 MFP_CFG_DRV(GPIO66, AF1, DS01X) -#define GPIO67_LCD_LDD_12 MFP_CFG_DRV(GPIO67, AF1, DS01X) -#define GPIO68_LCD_LDD_13 MFP_CFG_DRV(GPIO68, AF1, DS01X) -#define GPIO69_LCD_LDD_14 MFP_CFG_DRV(GPIO69, AF1, DS01X) -#define GPIO70_LCD_LDD_15 MFP_CFG_DRV(GPIO70, AF1, DS01X) -#define GPIO71_LCD_LDD_16 MFP_CFG_DRV(GPIO71, AF1, DS01X) -#define GPIO72_LCD_LDD_17 MFP_CFG_DRV(GPIO72, AF1, DS01X) -#define GPIO73_LCD_CS_N MFP_CFG_DRV(GPIO73, AF2, DS01X) -#define GPIO74_LCD_VSYNC MFP_CFG_DRV(GPIO74, AF2, DS01X) -#define GPIO14_2_LCD_FCLK MFP_CFG_DRV(GPIO14_2, AF1, DS01X) -#define GPIO15_2_LCD_LCLK MFP_CFG_DRV(GPIO15_2, AF1, DS01X) -#define GPIO16_2_LCD_PCLK MFP_CFG_DRV(GPIO16_2, AF1, DS01X) -#define GPIO17_2_LCD_BIAS MFP_CFG_DRV(GPIO17_2, AF1, DS01X) -#define GPIO64_LCD_VSYNC MFP_CFG_DRV(GPIO64, AF2, DS01X) -#define GPIO63_LCD_CS_N MFP_CFG_DRV(GPIO63, AF2, DS01X) - -#define GPIO6_2_MLCD_DD_0 MFP_CFG_DRV(GPIO6_2, AF7, DS08X) -#define GPIO7_2_MLCD_DD_1 MFP_CFG_DRV(GPIO7_2, AF7, DS08X) -#define GPIO8_2_MLCD_DD_2 MFP_CFG_DRV(GPIO8_2, AF7, DS08X) -#define GPIO9_2_MLCD_DD_3 MFP_CFG_DRV(GPIO9_2, AF7, DS08X) -#define GPIO10_2_MLCD_DD_4 MFP_CFG_DRV(GPIO10_2, AF7, DS08X) -#define GPIO11_2_MLCD_DD_5 MFP_CFG_DRV(GPIO11_2, AF7, DS08X) -#define GPIO12_2_MLCD_DD_6 MFP_CFG_DRV(GPIO12_2, AF7, DS08X) -#define GPIO13_2_MLCD_DD_7 MFP_CFG_DRV(GPIO13_2, AF7, DS08X) -#define GPIO63_MLCD_DD_8 MFP_CFG_DRV(GPIO63, AF7, DS08X) -#define GPIO64_MLCD_DD_9 MFP_CFG_DRV(GPIO64, AF7, DS08X) -#define GPIO65_MLCD_DD_10 MFP_CFG_DRV(GPIO65, AF7, DS08X) -#define GPIO66_MLCD_DD_11 MFP_CFG_DRV(GPIO66, AF7, DS08X) -#define GPIO67_MLCD_DD_12 MFP_CFG_DRV(GPIO67, AF7, DS08X) -#define GPIO68_MLCD_DD_13 MFP_CFG_DRV(GPIO68, AF7, DS08X) -#define GPIO69_MLCD_DD_14 MFP_CFG_DRV(GPIO69, AF7, DS08X) -#define GPIO70_MLCD_DD_15 MFP_CFG_DRV(GPIO70, AF7, DS08X) -#define GPIO71_MLCD_DD_16 MFP_CFG_DRV(GPIO71, AF7, DS08X) -#define GPIO72_MLCD_DD_17 MFP_CFG_DRV(GPIO72, AF7, DS08X) -#define GPIO73_MLCD_CS MFP_CFG_DRV(GPIO73, AF7, DS08X) -#define GPIO74_MLCD_VSYNC MFP_CFG_DRV(GPIO74, AF7, DS08X) -#define GPIO14_2_MLCD_FCLK MFP_CFG_DRV(GPIO14_2, AF7, DS08X) -#define GPIO15_2_MLCD_LCLK MFP_CFG_DRV(GPIO15_2, AF7, DS08X) -#define GPIO16_2_MLCD_PCLK MFP_CFG_DRV(GPIO16_2, AF7, DS08X) -#define GPIO17_2_MLCD_BIAS MFP_CFG_DRV(GPIO17_2, AF7, DS08X) - -/* MMC1 */ -#define GPIO9_MMC1_CMD MFP_CFG_LPM(GPIO9, AF4, DRIVE_HIGH) -#define GPIO22_MMC1_CLK MFP_CFG_LPM(GPIO22, AF4, DRIVE_HIGH) -#define GPIO23_MMC1_CMD MFP_CFG_LPM(GPIO23, AF4, DRIVE_HIGH) -#define GPIO30_MMC1_CLK MFP_CFG_LPM(GPIO30, AF4, DRIVE_HIGH) -#define GPIO31_MMC1_CMD MFP_CFG_LPM(GPIO31, AF4, DRIVE_HIGH) -#define GPIO5_MMC1_DAT0 MFP_CFG_LPM(GPIO5, AF4, DRIVE_HIGH) -#define GPIO6_MMC1_DAT1 MFP_CFG_LPM(GPIO6, AF4, DRIVE_HIGH) -#define GPIO7_MMC1_DAT2 MFP_CFG_LPM(GPIO7, AF4, DRIVE_HIGH) -#define GPIO8_MMC1_DAT3 MFP_CFG_LPM(GPIO8, AF4, DRIVE_HIGH) -#define GPIO18_MMC1_DAT0 MFP_CFG_LPM(GPIO18, AF4, DRIVE_HIGH) -#define GPIO19_MMC1_DAT1 MFP_CFG_LPM(GPIO19, AF4, DRIVE_HIGH) -#define GPIO20_MMC1_DAT2 MFP_CFG_LPM(GPIO20, AF4, DRIVE_HIGH) -#define GPIO21_MMC1_DAT3 MFP_CFG_LPM(GPIO21, AF4, DRIVE_HIGH) - -#define GPIO28_MMC2_CLK MFP_CFG_LPM(GPIO28, AF4, PULL_HIGH) -#define GPIO29_MMC2_CMD MFP_CFG_LPM(GPIO29, AF4, PULL_HIGH) -#define GPIO30_MMC2_CLK MFP_CFG_LPM(GPIO30, AF3, PULL_HIGH) -#define GPIO31_MMC2_CMD MFP_CFG_LPM(GPIO31, AF3, PULL_HIGH) -#define GPIO79_MMC2_CLK MFP_CFG_LPM(GPIO79, AF4, PULL_HIGH) -#define GPIO80_MMC2_CMD MFP_CFG_LPM(GPIO80, AF4, PULL_HIGH) - -#define GPIO5_MMC2_DAT0 MFP_CFG_LPM(GPIO5, AF2, PULL_HIGH) -#define GPIO6_MMC2_DAT1 MFP_CFG_LPM(GPIO6, AF2, PULL_HIGH) -#define GPIO7_MMC2_DAT2 MFP_CFG_LPM(GPIO7, AF2, PULL_HIGH) -#define GPIO8_MMC2_DAT3 MFP_CFG_LPM(GPIO8, AF2, PULL_HIGH) -#define GPIO24_MMC2_DAT0 MFP_CFG_LPM(GPIO24, AF4, PULL_HIGH) -#define GPIO75_MMC2_DAT0 MFP_CFG_LPM(GPIO75, AF4, PULL_HIGH) -#define GPIO25_MMC2_DAT1 MFP_CFG_LPM(GPIO25, AF4, PULL_HIGH) -#define GPIO76_MMC2_DAT1 MFP_CFG_LPM(GPIO76, AF4, PULL_HIGH) -#define GPIO26_MMC2_DAT2 MFP_CFG_LPM(GPIO26, AF4, PULL_HIGH) -#define GPIO77_MMC2_DAT2 MFP_CFG_LPM(GPIO77, AF4, PULL_HIGH) -#define GPIO27_MMC2_DAT3 MFP_CFG_LPM(GPIO27, AF4, PULL_HIGH) -#define GPIO78_MMC2_DAT3 MFP_CFG_LPM(GPIO78, AF4, PULL_HIGH) - -/* 1-Wire */ -#define GPIO14_ONE_WIRE MFP_CFG_LPM(GPIO14, AF5, FLOAT) -#define GPIO0_2_ONE_WIRE MFP_CFG_LPM(GPIO0_2, AF2, FLOAT) - -/* SSP1 */ -#define GPIO87_SSP1_EXTCLK MFP_CFG(GPIO87, AF1) -#define GPIO88_SSP1_SYSCLK MFP_CFG(GPIO88, AF1) -#define GPIO83_SSP1_SCLK MFP_CFG(GPIO83, AF1) -#define GPIO84_SSP1_SFRM MFP_CFG(GPIO84, AF1) -#define GPIO85_SSP1_RXD MFP_CFG(GPIO85, AF6) -#define GPIO85_SSP1_TXD MFP_CFG(GPIO85, AF1) -#define GPIO86_SSP1_RXD MFP_CFG(GPIO86, AF1) -#define GPIO86_SSP1_TXD MFP_CFG(GPIO86, AF6) - -/* SSP2 */ -#define GPIO39_SSP2_EXTCLK MFP_CFG(GPIO39, AF2) -#define GPIO40_SSP2_SYSCLK MFP_CFG(GPIO40, AF2) -#define GPIO12_SSP2_SCLK MFP_CFG(GPIO12, AF2) -#define GPIO35_SSP2_SCLK MFP_CFG(GPIO35, AF2) -#define GPIO36_SSP2_SFRM MFP_CFG(GPIO36, AF2) -#define GPIO37_SSP2_RXD MFP_CFG(GPIO37, AF5) -#define GPIO37_SSP2_TXD MFP_CFG(GPIO37, AF2) -#define GPIO38_SSP2_RXD MFP_CFG(GPIO38, AF2) -#define GPIO38_SSP2_TXD MFP_CFG(GPIO38, AF5) - -#define GPIO69_SSP3_SCLK MFP_CFG(GPIO69, AF2, DS08X, FLOAT) -#define GPIO70_SSP3_FRM MFP_CFG(GPIO70, AF2, DS08X, DRIVE_LOW) -#define GPIO89_SSP3_SCLK MFP_CFG(GPIO89, AF1, DS08X, FLOAT) -#define GPIO90_SSP3_FRM MFP_CFG(GPIO90, AF1, DS08X, DRIVE_LOW) -#define GPIO71_SSP3_RXD MFP_CFG_X(GPIO71, AF5, DS08X, FLOAT) -#define GPIO71_SSP3_TXD MFP_CFG_X(GPIO71, AF2, DS08X, DRIVE_LOW) -#define GPIO72_SSP3_RXD MFP_CFG_X(GPIO72, AF2, DS08X, FLOAT) -#define GPIO72_SSP3_TXD MFP_CFG_X(GPIO72, AF5, DS08X, DRIVE_LOW) -#define GPIO91_SSP3_RXD MFP_CFG_X(GPIO91, AF5, DS08X, FLOAT) -#define GPIO91_SSP3_TXD MFP_CFG_X(GPIO91, AF1, DS08X, DRIVE_LOW) -#define GPIO92_SSP3_RXD MFP_CFG_X(GPIO92, AF1, DS08X, FLOAT) -#define GPIO92_SSP3_TXD MFP_CFG_X(GPIO92, AF5, DS08X, DRIVE_LOW) - -#define GPIO93_SSP4_SCLK MFP_CFG_LPM(GPIO93, AF1, PULL_HIGH) -#define GPIO94_SSP4_FRM MFP_CFG_LPM(GPIO94, AF1, PULL_HIGH) -#define GPIO94_SSP4_RXD MFP_CFG_LPM(GPIO94, AF5, PULL_HIGH) -#define GPIO95_SSP4_RXD MFP_CFG_LPM(GPIO95, AF5, PULL_HIGH) -#define GPIO95_SSP4_TXD MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) -#define GPIO96_SSP4_RXD MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) -#define GPIO96_SSP4_TXD MFP_CFG_LPM(GPIO96, AF5, PULL_HIGH) - -/* UART1 */ -#define GPIO41_UART1_RXD MFP_CFG_LPM(GPIO41, AF2, FLOAT) -#define GPIO41_UART1_TXD MFP_CFG_LPM(GPIO41, AF4, FLOAT) -#define GPIO42_UART1_RXD MFP_CFG_LPM(GPIO42, AF4, FLOAT) -#define GPIO42_UART1_TXD MFP_CFG_LPM(GPIO42, AF2, FLOAT) -#define GPIO97_UART1_RXD MFP_CFG_LPM(GPIO97, AF1, FLOAT) -#define GPIO97_UART1_TXD MFP_CFG_LPM(GPIO97, AF6, FLOAT) -#define GPIO98_UART1_RXD MFP_CFG_LPM(GPIO98, AF6, FLOAT) -#define GPIO98_UART1_TXD MFP_CFG_LPM(GPIO98, AF1, FLOAT) -#define GPIO43_UART1_CTS MFP_CFG_LPM(GPIO43, AF2, FLOAT) -#define GPIO43_UART1_RTS MFP_CFG_LPM(GPIO43, AF4, FLOAT) -#define GPIO48_UART1_CTS MFP_CFG_LPM(GPIO48, AF4, FLOAT) -#define GPIO48_UART1_RTS MFP_CFG_LPM(GPIO48, AF2, FLOAT) -#define GPIO99_UART1_CTS MFP_CFG_LPM(GPIO99, AF1, FLOAT) -#define GPIO99_UART1_RTS MFP_CFG_LPM(GPIO99, AF6, FLOAT) -#define GPIO104_UART1_CTS MFP_CFG_LPM(GPIO104, AF6, FLOAT) -#define GPIO104_UART1_RTS MFP_CFG_LPM(GPIO104, AF1, FLOAT) -#define GPIO45_UART1_DTR MFP_CFG_LPM(GPIO45, AF4, FLOAT) -#define GPIO45_UART1_DSR MFP_CFG_LPM(GPIO45, AF2, FLOAT) -#define GPIO47_UART1_DTR MFP_CFG_LPM(GPIO47, AF2, FLOAT) -#define GPIO47_UART1_DSR MFP_CFG_LPM(GPIO47, AF4, FLOAT) -#define GPIO101_UART1_DTR MFP_CFG_LPM(GPIO101, AF6, FLOAT) -#define GPIO101_UART1_DSR MFP_CFG_LPM(GPIO101, AF1, FLOAT) -#define GPIO103_UART1_DTR MFP_CFG_LPM(GPIO103, AF1, FLOAT) -#define GPIO103_UART1_DSR MFP_CFG_LPM(GPIO103, AF6, FLOAT) -#define GPIO44_UART1_DCD MFP_CFG_LPM(GPIO44, AF2, FLOAT) -#define GPIO100_UART1_DCD MFP_CFG_LPM(GPIO100, AF1, FLOAT) -#define GPIO46_UART1_RI MFP_CFG_LPM(GPIO46, AF2, FLOAT) -#define GPIO102_UART1_RI MFP_CFG_LPM(GPIO102, AF1, FLOAT) - -/* UART2 */ -#define GPIO109_UART2_CTS MFP_CFG_LPM(GPIO109, AF3, FLOAT) -#define GPIO109_UART2_RTS MFP_CFG_LPM(GPIO109, AF1, FLOAT) -#define GPIO112_UART2_CTS MFP_CFG_LPM(GPIO112, AF1, FLOAT) -#define GPIO112_UART2_RTS MFP_CFG_LPM(GPIO112, AF3, FLOAT) -#define GPIO110_UART2_RXD MFP_CFG_LPM(GPIO110, AF1, FLOAT) -#define GPIO110_UART2_TXD MFP_CFG_LPM(GPIO110, AF3, FLOAT) -#define GPIO111_UART2_RXD MFP_CFG_LPM(GPIO111, AF3, FLOAT) -#define GPIO111_UART2_TXD MFP_CFG_LPM(GPIO111, AF1, FLOAT) - -/* UART3 */ -#define GPIO89_UART3_CTS MFP_CFG_LPM(GPIO89, AF2, FLOAT) -#define GPIO89_UART3_RTS MFP_CFG_LPM(GPIO89, AF4, FLOAT) -#define GPIO90_UART3_CTS MFP_CFG_LPM(GPIO90, AF4, FLOAT) -#define GPIO90_UART3_RTS MFP_CFG_LPM(GPIO90, AF2, FLOAT) -#define GPIO105_UART3_CTS MFP_CFG_LPM(GPIO105, AF1, FLOAT) -#define GPIO105_UART3_RTS MFP_CFG_LPM(GPIO105, AF3, FLOAT) -#define GPIO106_UART3_CTS MFP_CFG_LPM(GPIO106, AF3, FLOAT) -#define GPIO106_UART3_RTS MFP_CFG_LPM(GPIO106, AF1, FLOAT) -#define GPIO30_UART3_RXD MFP_CFG_LPM(GPIO30, AF2, FLOAT) -#define GPIO30_UART3_TXD MFP_CFG_LPM(GPIO30, AF6, FLOAT) -#define GPIO31_UART3_RXD MFP_CFG_LPM(GPIO31, AF6, FLOAT) -#define GPIO31_UART3_TXD MFP_CFG_LPM(GPIO31, AF2, FLOAT) -#define GPIO91_UART3_RXD MFP_CFG_LPM(GPIO91, AF4, FLOAT) -#define GPIO91_UART3_TXD MFP_CFG_LPM(GPIO91, AF2, FLOAT) -#define GPIO92_UART3_RXD MFP_CFG_LPM(GPIO92, AF2, FLOAT) -#define GPIO92_UART3_TXD MFP_CFG_LPM(GPIO92, AF4, FLOAT) -#define GPIO107_UART3_RXD MFP_CFG_LPM(GPIO107, AF3, FLOAT) -#define GPIO107_UART3_TXD MFP_CFG_LPM(GPIO107, AF1, FLOAT) -#define GPIO108_UART3_RXD MFP_CFG_LPM(GPIO108, AF1, FLOAT) -#define GPIO108_UART3_TXD MFP_CFG_LPM(GPIO108, AF3, FLOAT) - - -/* USB 2.0 UTMI */ -#define GPIO10_UTM_CLK MFP_CFG(GPIO10, AF1) -#define GPIO36_U2D_RXERROR MFP_CFG(GPIO36, AF3) -#define GPIO60_U2D_RXERROR MFP_CFG(GPIO60, AF1) -#define GPIO87_U2D_RXERROR MFP_CFG(GPIO87, AF5) -#define GPIO34_UTM_RXVALID MFP_CFG(GPIO34, AF3) -#define GPIO58_UTM_RXVALID MFP_CFG(GPIO58, AF2) -#define GPIO85_UTM_RXVALID MFP_CFG(GPIO85, AF5) -#define GPIO35_UTM_RXACTIVE MFP_CFG(GPIO35, AF3) -#define GPIO59_UTM_RXACTIVE MFP_CFG(GPIO59, AF1) -#define GPIO86_UTM_RXACTIVE MFP_CFG(GPIO86, AF5) -#define GPIO73_UTM_TXREADY MFP_CFG(GPIO73, AF1) -#define GPIO68_UTM_LINESTATE_0 MFP_CFG(GPIO68, AF3) -#define GPIO90_UTM_LINESTATE_0 MFP_CFG(GPIO90, AF3) -#define GPIO102_UTM_LINESTATE_0 MFP_CFG(GPIO102, AF3) -#define GPIO107_UTM_LINESTATE_0 MFP_CFG(GPIO107, AF4) -#define GPIO69_UTM_LINESTATE_1 MFP_CFG(GPIO69, AF3) -#define GPIO91_UTM_LINESTATE_1 MFP_CFG(GPIO91, AF3) -#define GPIO103_UTM_LINESTATE_1 MFP_CFG(GPIO103, AF3) - -#define GPIO41_U2D_PHYDATA_0 MFP_CFG(GPIO41, AF3) -#define GPIO42_U2D_PHYDATA_1 MFP_CFG(GPIO42, AF3) -#define GPIO43_U2D_PHYDATA_2 MFP_CFG(GPIO43, AF3) -#define GPIO44_U2D_PHYDATA_3 MFP_CFG(GPIO44, AF3) -#define GPIO45_U2D_PHYDATA_4 MFP_CFG(GPIO45, AF3) -#define GPIO46_U2D_PHYDATA_5 MFP_CFG(GPIO46, AF3) -#define GPIO47_U2D_PHYDATA_6 MFP_CFG(GPIO47, AF3) -#define GPIO48_U2D_PHYDATA_7 MFP_CFG(GPIO48, AF3) - -#define GPIO49_U2D_PHYDATA_0 MFP_CFG(GPIO49, AF3) -#define GPIO50_U2D_PHYDATA_1 MFP_CFG(GPIO50, AF3) -#define GPIO51_U2D_PHYDATA_2 MFP_CFG(GPIO51, AF3) -#define GPIO52_U2D_PHYDATA_3 MFP_CFG(GPIO52, AF3) -#define GPIO53_U2D_PHYDATA_4 MFP_CFG(GPIO53, AF3) -#define GPIO54_U2D_PHYDATA_5 MFP_CFG(GPIO54, AF3) -#define GPIO55_U2D_PHYDATA_6 MFP_CFG(GPIO55, AF3) -#define GPIO56_U2D_PHYDATA_7 MFP_CFG(GPIO56, AF3) - -#define GPIO37_U2D_OPMODE0 MFP_CFG(GPIO37, AF4) -#define GPIO61_U2D_OPMODE0 MFP_CFG(GPIO61, AF2) -#define GPIO88_U2D_OPMODE0 MFP_CFG(GPIO88, AF7) - -#define GPIO38_U2D_OPMODE1 MFP_CFG(GPIO38, AF4) -#define GPIO62_U2D_OPMODE1 MFP_CFG(GPIO62, AF2) -#define GPIO104_U2D_OPMODE1 MFP_CFG(GPIO104, AF4) -#define GPIO108_U2D_OPMODE1 MFP_CFG(GPIO108, AF5) - -#define GPIO74_U2D_RESET MFP_CFG(GPIO74, AF1) -#define GPIO93_U2D_RESET MFP_CFG(GPIO93, AF2) -#define GPIO98_U2D_RESET MFP_CFG(GPIO98, AF3) - -#define GPIO67_U2D_SUSPEND MFP_CFG(GPIO67, AF3) -#define GPIO96_U2D_SUSPEND MFP_CFG(GPIO96, AF2) -#define GPIO101_U2D_SUSPEND MFP_CFG(GPIO101, AF3) - -#define GPIO66_U2D_TERM_SEL MFP_CFG(GPIO66, AF5) -#define GPIO95_U2D_TERM_SEL MFP_CFG(GPIO95, AF3) -#define GPIO97_U2D_TERM_SEL MFP_CFG(GPIO97, AF7) -#define GPIO100_U2D_TERM_SEL MFP_CFG(GPIO100, AF5) - -#define GPIO39_U2D_TXVALID MFP_CFG(GPIO39, AF4) -#define GPIO70_U2D_TXVALID MFP_CFG(GPIO70, AF5) -#define GPIO83_U2D_TXVALID MFP_CFG(GPIO83, AF7) - -#define GPIO65_U2D_XCVR_SEL MFP_CFG(GPIO65, AF5) -#define GPIO94_U2D_XCVR_SEL MFP_CFG(GPIO94, AF3) -#define GPIO99_U2D_XCVR_SEL MFP_CFG(GPIO99, AF5) - -/* USB Host 1.1 */ -#define GPIO2_2_USBH_PEN MFP_CFG(GPIO2_2, AF1) -#define GPIO3_2_USBH_PWR MFP_CFG(GPIO3_2, AF1) - -/* USB P2 */ -#define GPIO97_USB_P2_2 MFP_CFG(GPIO97, AF2) -#define GPIO97_USB_P2_6 MFP_CFG(GPIO97, AF4) -#define GPIO98_USB_P2_2 MFP_CFG(GPIO98, AF4) -#define GPIO98_USB_P2_6 MFP_CFG(GPIO98, AF2) -#define GPIO99_USB_P2_1 MFP_CFG(GPIO99, AF2) -#define GPIO100_USB_P2_4 MFP_CFG(GPIO100, AF2) -#define GPIO101_USB_P2_8 MFP_CFG(GPIO101, AF2) -#define GPIO102_USB_P2_3 MFP_CFG(GPIO102, AF2) -#define GPIO103_USB_P2_5 MFP_CFG(GPIO103, AF2) -#define GPIO104_USB_P2_7 MFP_CFG(GPIO104, AF2) - -/* USB P3 */ -#define GPIO75_USB_P3_1 MFP_CFG(GPIO75, AF2) -#define GPIO76_USB_P3_2 MFP_CFG(GPIO76, AF2) -#define GPIO77_USB_P3_3 MFP_CFG(GPIO77, AF2) -#define GPIO78_USB_P3_4 MFP_CFG(GPIO78, AF2) -#define GPIO79_USB_P3_5 MFP_CFG(GPIO79, AF2) -#define GPIO80_USB_P3_6 MFP_CFG(GPIO80, AF2) - -#define GPIO13_CHOUT0 MFP_CFG(GPIO13, AF6) -#define GPIO14_CHOUT1 MFP_CFG(GPIO14, AF6) - -#define GPIO2_RDY MFP_CFG(GPIO2, AF1) -#define GPIO5_NPIOR MFP_CFG(GPIO5, AF3) - -#define GPIO11_PWM0_OUT MFP_CFG(GPIO11, AF1) -#define GPIO12_PWM1_OUT MFP_CFG(GPIO12, AF1) -#define GPIO13_PWM2_OUT MFP_CFG(GPIO13, AF1) -#define GPIO14_PWM3_OUT MFP_CFG(GPIO14, AF1) - -#endif /* __ASM_ARCH_MFP_PXA320_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa3xx.h b/include/asm-arm/arch-pxa/mfp-pxa3xx.h deleted file mode 100644 index 1f6b35c..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa3xx.h +++ /dev/null @@ -1,252 +0,0 @@ -#ifndef __ASM_ARCH_MFP_PXA3XX_H -#define __ASM_ARCH_MFP_PXA3XX_H - -#define MFPR_BASE (0x40e10000) -#define MFPR_SIZE (PAGE_SIZE) - -/* MFPR register bit definitions */ -#define MFPR_PULL_SEL (0x1 << 15) -#define MFPR_PULLUP_EN (0x1 << 14) -#define MFPR_PULLDOWN_EN (0x1 << 13) -#define MFPR_SLEEP_SEL (0x1 << 9) -#define MFPR_SLEEP_OE_N (0x1 << 7) -#define MFPR_EDGE_CLEAR (0x1 << 6) -#define MFPR_EDGE_FALL_EN (0x1 << 5) -#define MFPR_EDGE_RISE_EN (0x1 << 4) - -#define MFPR_SLEEP_DATA(x) ((x) << 8) -#define MFPR_DRIVE(x) (((x) & 0x7) << 10) -#define MFPR_AF_SEL(x) (((x) & 0x7) << 0) - -#define MFPR_EDGE_NONE (0) -#define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN) -#define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN) -#define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL) - -/* - * Table that determines the low power modes outputs, with actual settings - * used in parentheses for don't-care values. Except for the float output, - * the configured driven and pulled levels match, so if there is a need for - * non-LPM pulled output, the same configuration could probably be used. - * - * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel - * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15) - * - * Input 0 X(0) X(0) X(0) 0 - * Drive 0 0 0 0 X(1) 0 - * Drive 1 0 1 X(1) 0 0 - * Pull hi (1) 1 X(1) 1 0 0 - * Pull lo (0) 1 X(0) 0 1 0 - * Z (float) 1 X(0) 0 0 0 - */ -#define MFPR_LPM_INPUT (0) -#define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN) -#define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN) -#define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N) -#define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N) -#define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N) -#define MFPR_LPM_MASK (0xe080) - -/* - * The pullup and pulldown state of the MFP pin at run mode is by default - * determined by the selected alternate function. In case that some buggy - * devices need to override this default behavior, the definitions below - * indicates the setting of corresponding MFPR bits - * - * Definition pull_sel pullup_en pulldown_en - * MFPR_PULL_NONE 0 0 0 - * MFPR_PULL_LOW 1 0 1 - * MFPR_PULL_HIGH 1 1 0 - * MFPR_PULL_BOTH 1 1 1 - */ -#define MFPR_PULL_NONE (0) -#define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN) -#define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN) -#define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN) - -/* PXA3xx common MFP configurations - processor specific ones defined - * in mfp-pxa300.h and mfp-pxa320.h - */ -#define GPIO0_GPIO MFP_CFG(GPIO0, AF0) -#define GPIO1_GPIO MFP_CFG(GPIO1, AF0) -#define GPIO2_GPIO MFP_CFG(GPIO2, AF0) -#define GPIO3_GPIO MFP_CFG(GPIO3, AF0) -#define GPIO4_GPIO MFP_CFG(GPIO4, AF0) -#define GPIO5_GPIO MFP_CFG(GPIO5, AF0) -#define GPIO6_GPIO MFP_CFG(GPIO6, AF0) -#define GPIO7_GPIO MFP_CFG(GPIO7, AF0) -#define GPIO8_GPIO MFP_CFG(GPIO8, AF0) -#define GPIO9_GPIO MFP_CFG(GPIO9, AF0) -#define GPIO10_GPIO MFP_CFG(GPIO10, AF0) -#define GPIO11_GPIO MFP_CFG(GPIO11, AF0) -#define GPIO12_GPIO MFP_CFG(GPIO12, AF0) -#define GPIO13_GPIO MFP_CFG(GPIO13, AF0) -#define GPIO14_GPIO MFP_CFG(GPIO14, AF0) -#define GPIO15_GPIO MFP_CFG(GPIO15, AF0) -#define GPIO16_GPIO MFP_CFG(GPIO16, AF0) -#define GPIO17_GPIO MFP_CFG(GPIO17, AF0) -#define GPIO18_GPIO MFP_CFG(GPIO18, AF0) -#define GPIO19_GPIO MFP_CFG(GPIO19, AF0) -#define GPIO20_GPIO MFP_CFG(GPIO20, AF0) -#define GPIO21_GPIO MFP_CFG(GPIO21, AF0) -#define GPIO22_GPIO MFP_CFG(GPIO22, AF0) -#define GPIO23_GPIO MFP_CFG(GPIO23, AF0) -#define GPIO24_GPIO MFP_CFG(GPIO24, AF0) -#define GPIO25_GPIO MFP_CFG(GPIO25, AF0) -#define GPIO26_GPIO MFP_CFG(GPIO26, AF0) -#define GPIO27_GPIO MFP_CFG(GPIO27, AF0) -#define GPIO28_GPIO MFP_CFG(GPIO28, AF0) -#define GPIO29_GPIO MFP_CFG(GPIO29, AF0) -#define GPIO30_GPIO MFP_CFG(GPIO30, AF0) -#define GPIO31_GPIO MFP_CFG(GPIO31, AF0) -#define GPIO32_GPIO MFP_CFG(GPIO32, AF0) -#define GPIO33_GPIO MFP_CFG(GPIO33, AF0) -#define GPIO34_GPIO MFP_CFG(GPIO34, AF0) -#define GPIO35_GPIO MFP_CFG(GPIO35, AF0) -#define GPIO36_GPIO MFP_CFG(GPIO36, AF0) -#define GPIO37_GPIO MFP_CFG(GPIO37, AF0) -#define GPIO38_GPIO MFP_CFG(GPIO38, AF0) -#define GPIO39_GPIO MFP_CFG(GPIO39, AF0) -#define GPIO40_GPIO MFP_CFG(GPIO40, AF0) -#define GPIO41_GPIO MFP_CFG(GPIO41, AF0) -#define GPIO42_GPIO MFP_CFG(GPIO42, AF0) -#define GPIO43_GPIO MFP_CFG(GPIO43, AF0) -#define GPIO44_GPIO MFP_CFG(GPIO44, AF0) -#define GPIO45_GPIO MFP_CFG(GPIO45, AF0) - -#define GPIO47_GPIO MFP_CFG(GPIO47, AF0) -#define GPIO48_GPIO MFP_CFG(GPIO48, AF0) - -#define GPIO53_GPIO MFP_CFG(GPIO53, AF0) -#define GPIO54_GPIO MFP_CFG(GPIO54, AF0) -#define GPIO55_GPIO MFP_CFG(GPIO55, AF0) - -#define GPIO57_GPIO MFP_CFG(GPIO57, AF0) - -#define GPIO63_GPIO MFP_CFG(GPIO63, AF0) -#define GPIO64_GPIO MFP_CFG(GPIO64, AF0) -#define GPIO65_GPIO MFP_CFG(GPIO65, AF0) -#define GPIO66_GPIO MFP_CFG(GPIO66, AF0) -#define GPIO67_GPIO MFP_CFG(GPIO67, AF0) -#define GPIO68_GPIO MFP_CFG(GPIO68, AF0) -#define GPIO69_GPIO MFP_CFG(GPIO69, AF0) -#define GPIO70_GPIO MFP_CFG(GPIO70, AF0) -#define GPIO71_GPIO MFP_CFG(GPIO71, AF0) -#define GPIO72_GPIO MFP_CFG(GPIO72, AF0) -#define GPIO73_GPIO MFP_CFG(GPIO73, AF0) -#define GPIO74_GPIO MFP_CFG(GPIO74, AF0) -#define GPIO75_GPIO MFP_CFG(GPIO75, AF0) -#define GPIO76_GPIO MFP_CFG(GPIO76, AF0) -#define GPIO77_GPIO MFP_CFG(GPIO77, AF0) -#define GPIO78_GPIO MFP_CFG(GPIO78, AF0) -#define GPIO79_GPIO MFP_CFG(GPIO79, AF0) -#define GPIO80_GPIO MFP_CFG(GPIO80, AF0) -#define GPIO81_GPIO MFP_CFG(GPIO81, AF0) -#define GPIO82_GPIO MFP_CFG(GPIO82, AF0) -#define GPIO83_GPIO MFP_CFG(GPIO83, AF0) -#define GPIO84_GPIO MFP_CFG(GPIO84, AF0) -#define GPIO85_GPIO MFP_CFG(GPIO85, AF0) -#define GPIO86_GPIO MFP_CFG(GPIO86, AF0) -#define GPIO87_GPIO MFP_CFG(GPIO87, AF0) -#define GPIO88_GPIO MFP_CFG(GPIO88, AF0) -#define GPIO89_GPIO MFP_CFG(GPIO89, AF0) -#define GPIO90_GPIO MFP_CFG(GPIO90, AF0) -#define GPIO91_GPIO MFP_CFG(GPIO91, AF0) -#define GPIO92_GPIO MFP_CFG(GPIO92, AF0) -#define GPIO93_GPIO MFP_CFG(GPIO93, AF0) -#define GPIO94_GPIO MFP_CFG(GPIO94, AF0) -#define GPIO95_GPIO MFP_CFG(GPIO95, AF0) -#define GPIO96_GPIO MFP_CFG(GPIO96, AF0) -#define GPIO97_GPIO MFP_CFG(GPIO97, AF0) -#define GPIO98_GPIO MFP_CFG(GPIO98, AF0) -#define GPIO99_GPIO MFP_CFG(GPIO99, AF0) -#define GPIO100_GPIO MFP_CFG(GPIO100, AF0) -#define GPIO101_GPIO MFP_CFG(GPIO101, AF0) -#define GPIO102_GPIO MFP_CFG(GPIO102, AF0) -#define GPIO103_GPIO MFP_CFG(GPIO103, AF0) -#define GPIO104_GPIO MFP_CFG(GPIO104, AF0) -#define GPIO105_GPIO MFP_CFG(GPIO105, AF0) -#define GPIO106_GPIO MFP_CFG(GPIO106, AF0) -#define GPIO107_GPIO MFP_CFG(GPIO107, AF0) -#define GPIO108_GPIO MFP_CFG(GPIO108, AF0) -#define GPIO109_GPIO MFP_CFG(GPIO109, AF0) -#define GPIO110_GPIO MFP_CFG(GPIO110, AF0) -#define GPIO111_GPIO MFP_CFG(GPIO111, AF0) -#define GPIO112_GPIO MFP_CFG(GPIO112, AF0) -#define GPIO113_GPIO MFP_CFG(GPIO113, AF0) -#define GPIO114_GPIO MFP_CFG(GPIO114, AF0) -#define GPIO115_GPIO MFP_CFG(GPIO115, AF0) -#define GPIO116_GPIO MFP_CFG(GPIO116, AF0) -#define GPIO117_GPIO MFP_CFG(GPIO117, AF0) -#define GPIO118_GPIO MFP_CFG(GPIO118, AF0) -#define GPIO119_GPIO MFP_CFG(GPIO119, AF0) -#define GPIO120_GPIO MFP_CFG(GPIO120, AF0) -#define GPIO121_GPIO MFP_CFG(GPIO121, AF0) -#define GPIO122_GPIO MFP_CFG(GPIO122, AF0) -#define GPIO123_GPIO MFP_CFG(GPIO123, AF0) -#define GPIO124_GPIO MFP_CFG(GPIO124, AF0) -#define GPIO125_GPIO MFP_CFG(GPIO125, AF0) -#define GPIO126_GPIO MFP_CFG(GPIO126, AF0) -#define GPIO127_GPIO MFP_CFG(GPIO127, AF0) - -#define GPIO0_2_GPIO MFP_CFG(GPIO0_2, AF0) -#define GPIO1_2_GPIO MFP_CFG(GPIO1_2, AF0) -#define GPIO2_2_GPIO MFP_CFG(GPIO2_2, AF0) -#define GPIO3_2_GPIO MFP_CFG(GPIO3_2, AF0) -#define GPIO4_2_GPIO MFP_CFG(GPIO4_2, AF0) -#define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0) -#define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0) - -/* - * each MFP pin will have a MFPR register, since the offset of the - * register varies between processors, the processor specific code - * should initialize the pin offsets by pxa3xx_mfp_init_addr() - * - * pxa3xx_mfp_init_addr - accepts a table of "pxa3xx_mfp_addr_map" - * structure, which represents a range of MFP pins from "start" to - * "end", with the offset begining at "offset", to define a single - * pin, let "end" = -1 - * - * use - * - * MFP_ADDR_X() to define a range of pins - * MFP_ADDR() to define a single pin - * MFP_ADDR_END to signal the end of pin offset definitions - */ -struct pxa3xx_mfp_addr_map { - unsigned int start; - unsigned int end; - unsigned long offset; -}; - -#define MFP_ADDR_X(start, end, offset) \ - { MFP_PIN_##start, MFP_PIN_##end, offset } - -#define MFP_ADDR(pin, offset) \ - { MFP_PIN_##pin, -1, offset } - -#define MFP_ADDR_END { MFP_PIN_INVALID, 0 } - -/* - * pxa3xx_mfp_read()/pxa3xx_mfp_write() - for direct read/write access - * to the MFPR register - */ -unsigned long pxa3xx_mfp_read(int mfp); -void pxa3xx_mfp_write(int mfp, unsigned long mfpr_val); - -/* - * pxa3xx_mfp_config - configure the MFPR registers - * - * used by board specific initialization code - */ -void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num); - -/* - * pxa3xx_mfp_init_addr() - initialize the mapping between mfp pin - * index and MFPR register offset - * - * used by processor specific code - */ -void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *); -void __init pxa3xx_init_mfp(void); -#endif /* __ASM_ARCH_MFP_PXA3XX_H */ diff --git a/include/asm-arm/arch-pxa/mfp-pxa930.h b/include/asm-arm/arch-pxa/mfp-pxa930.h deleted file mode 100644 index c4e945a..0000000 --- a/include/asm-arm/arch-pxa/mfp-pxa930.h +++ /dev/null @@ -1,491 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/mfp-pxa930.h - * - * PXA930 specific MFP configuration definitions - * - * Copyright (C) 2007-2008 Marvell International Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MFP_PXA9xx_H -#define __ASM_ARCH_MFP_PXA9xx_H - -#include -#include - -/* GPIO */ -#define GPIO46_GPIO MFP_CFG(GPIO46, AF0) -#define GPIO49_GPIO MFP_CFG(GPIO49, AF0) -#define GPIO50_GPIO MFP_CFG(GPIO50, AF0) -#define GPIO51_GPIO MFP_CFG(GPIO51, AF0) -#define GPIO52_GPIO MFP_CFG(GPIO52, AF0) -#define GPIO56_GPIO MFP_CFG(GPIO56, AF0) -#define GPIO58_GPIO MFP_CFG(GPIO58, AF0) -#define GPIO59_GPIO MFP_CFG(GPIO59, AF0) -#define GPIO60_GPIO MFP_CFG(GPIO60, AF0) -#define GPIO61_GPIO MFP_CFG(GPIO61, AF0) -#define GPIO62_GPIO MFP_CFG(GPIO62, AF0) - -#define GSIM_UCLK_GPIO_79 MFP_CFG(GSIM_UCLK, AF0) -#define GSIM_UIO_GPIO_80 MFP_CFG(GSIM_UIO, AF0) -#define GSIM_nURST_GPIO_81 MFP_CFG(GSIM_nURST, AF0) -#define GSIM_UDET_GPIO_82 MFP_CFG(GSIM_UDET, AF0) - -#define DF_IO15_GPIO_28 MFP_CFG(DF_IO15, AF0) -#define DF_IO14_GPIO_29 MFP_CFG(DF_IO14, AF0) -#define DF_IO13_GPIO_30 MFP_CFG(DF_IO13, AF0) -#define DF_IO12_GPIO_31 MFP_CFG(DF_IO12, AF0) -#define DF_IO11_GPIO_32 MFP_CFG(DF_IO11, AF0) -#define DF_IO10_GPIO_33 MFP_CFG(DF_IO10, AF0) -#define DF_IO9_GPIO_34 MFP_CFG(DF_IO9, AF0) -#define DF_IO8_GPIO_35 MFP_CFG(DF_IO8, AF0) -#define DF_IO7_GPIO_36 MFP_CFG(DF_IO7, AF0) -#define DF_IO6_GPIO_37 MFP_CFG(DF_IO6, AF0) -#define DF_IO5_GPIO_38 MFP_CFG(DF_IO5, AF0) -#define DF_IO4_GPIO_39 MFP_CFG(DF_IO4, AF0) -#define DF_IO3_GPIO_40 MFP_CFG(DF_IO3, AF0) -#define DF_IO2_GPIO_41 MFP_CFG(DF_IO2, AF0) -#define DF_IO1_GPIO_42 MFP_CFG(DF_IO1, AF0) -#define DF_IO0_GPIO_43 MFP_CFG(DF_IO0, AF0) -#define DF_nCS0_GPIO_44 MFP_CFG(DF_nCS0, AF0) -#define DF_nCS1_GPIO_45 MFP_CFG(DF_nCS1, AF0) -#define DF_nWE_GPIO_46 MFP_CFG(DF_nWE, AF0) -#define DF_nRE_nOE_GPIO_47 MFP_CFG(DF_nRE_nOE, AF0) -#define DF_CLE_nOE_GPIO_48 MFP_CFG(DF_CLE_nOE, AF0) -#define DF_nADV1_ALE_GPIO_49 MFP_CFG(DF_nADV1_ALE, AF0) -#define DF_nADV2_ALE_GPIO_50 MFP_CFG(DF_nADV2_ALE, AF0) -#define DF_INT_RnB_GPIO_51 MFP_CFG(DF_INT_RnB, AF0) -#define DF_SCLK_E_GPIO_52 MFP_CFG(DF_SCLK_E, AF0) - -#define DF_ADDR0_GPIO_53 MFP_CFG(DF_ADDR0, AF0) -#define DF_ADDR1_GPIO_54 MFP_CFG(DF_ADDR1, AF0) -#define DF_ADDR2_GPIO_55 MFP_CFG(DF_ADDR2, AF0) -#define DF_ADDR3_GPIO_56 MFP_CFG(DF_ADDR3, AF0) -#define nXCVREN_GPIO_57 MFP_CFG(nXCVREN, AF0) -#define nLUA_GPIO_58 MFP_CFG(nLUA, AF0) -#define nLLA_GPIO_59 MFP_CFG(nLLA, AF0) -#define nBE0_GPIO_60 MFP_CFG(nBE0, AF0) -#define nBE1_GPIO_61 MFP_CFG(nBE1, AF0) -#define RDY_GPIO_62 MFP_CFG(RDY, AF0) - -/* Chip Select */ -#define DF_nCS0_nCS2 MFP_CFG_LPM(DF_nCS0, AF3, PULL_HIGH) -#define DF_nCS1_nCS3 MFP_CFG_LPM(DF_nCS1, AF3, PULL_HIGH) - -/* AC97 */ -#define GPIO83_BAC97_SYSCLK MFP_CFG(GPIO83, AF3) -#define GPIO84_BAC97_SDATA_IN0 MFP_CFG(GPIO84, AF3) -#define GPIO85_BAC97_BITCLK MFP_CFG(GPIO85, AF3) -#define GPIO86_BAC97_nRESET MFP_CFG(GPIO86, AF3) -#define GPIO87_BAC97_SYNC MFP_CFG(GPIO87, AF3) -#define GPIO88_BAC97_SDATA_OUT MFP_CFG(GPIO88, AF3) - -/* I2C */ -#define GPIO39_CI2C_SCL MFP_CFG_LPM(GPIO39, AF3, PULL_HIGH) -#define GPIO40_CI2C_SDA MFP_CFG_LPM(GPIO40, AF3, PULL_HIGH) - -#define GPIO51_CI2C_SCL MFP_CFG_LPM(GPIO51, AF3, PULL_HIGH) -#define GPIO52_CI2C_SDA MFP_CFG_LPM(GPIO52, AF3, PULL_HIGH) - -#define GPIO63_CI2C_SCL MFP_CFG_LPM(GPIO63, AF4, PULL_HIGH) -#define GPIO64_CI2C_SDA MFP_CFG_LPM(GPIO64, AF4, PULL_HIGH) - -#define GPIO77_CI2C_SCL MFP_CFG_LPM(GPIO77, AF2, PULL_HIGH) -#define GPIO78_CI2C_SDA MFP_CFG_LPM(GPIO78, AF2, PULL_HIGH) - -#define GPIO89_CI2C_SCL MFP_CFG_LPM(GPIO89, AF1, PULL_HIGH) -#define GPIO90_CI2C_SDA MFP_CFG_LPM(GPIO90, AF1, PULL_HIGH) - -#define GPIO95_CI2C_SCL MFP_CFG_LPM(GPIO95, AF1, PULL_HIGH) -#define GPIO96_CI2C_SDA MFP_CFG_LPM(GPIO96, AF1, PULL_HIGH) - -#define GPIO97_CI2C_SCL MFP_CFG_LPM(GPIO97, AF3, PULL_HIGH) -#define GPIO98_CI2C_SDA MFP_CFG_LPM(GPIO98, AF3, PULL_HIGH) - -/* QCI */ -#define GPIO63_CI_DD_9 MFP_CFG_LPM(GPIO63, AF1, PULL_LOW) -#define GPIO64_CI_DD_8 MFP_CFG_LPM(GPIO64, AF1, PULL_LOW) -#define GPIO65_CI_DD_7 MFP_CFG_LPM(GPIO65, AF1, PULL_LOW) -#define GPIO66_CI_DD_6 MFP_CFG_LPM(GPIO66, AF1, PULL_LOW) -#define GPIO67_CI_DD_5 MFP_CFG_LPM(GPIO67, AF1, PULL_LOW) -#define GPIO68_CI_DD_4 MFP_CFG_LPM(GPIO68, AF1, PULL_LOW) -#define GPIO69_CI_DD_3 MFP_CFG_LPM(GPIO69, AF1, PULL_LOW) -#define GPIO70_CI_DD_2 MFP_CFG_LPM(GPIO70, AF1, PULL_LOW) -#define GPIO71_CI_DD_1 MFP_CFG_LPM(GPIO71, AF1, PULL_LOW) -#define GPIO72_CI_DD_0 MFP_CFG_LPM(GPIO72, AF1, PULL_LOW) -#define GPIO73_CI_HSYNC MFP_CFG_LPM(GPIO73, AF1, PULL_LOW) -#define GPIO74_CI_VSYNC MFP_CFG_LPM(GPIO74, AF1, PULL_LOW) -#define GPIO75_CI_MCLK MFP_CFG_LPM(GPIO75, AF1, PULL_LOW) -#define GPIO76_CI_PCLK MFP_CFG_LPM(GPIO76, AF1, PULL_LOW) - -/* KEYPAD */ -#define GPIO4_KP_DKIN_4 MFP_CFG_LPM(GPIO4, AF3, FLOAT) -#define GPIO5_KP_DKIN_5 MFP_CFG_LPM(GPIO5, AF3, FLOAT) -#define GPIO6_KP_DKIN_6 MFP_CFG_LPM(GPIO6, AF3, FLOAT) -#define GPIO7_KP_DKIN_7 MFP_CFG_LPM(GPIO7, AF3, FLOAT) -#define GPIO8_KP_DKIN_4 MFP_CFG_LPM(GPIO8, AF3, FLOAT) -#define GPIO9_KP_DKIN_5 MFP_CFG_LPM(GPIO9, AF3, FLOAT) -#define GPIO10_KP_DKIN_6 MFP_CFG_LPM(GPIO10, AF3, FLOAT) -#define GPIO11_KP_DKIN_7 MFP_CFG_LPM(GPIO11, AF3, FLOAT) - -#define GPIO12_KP_DKIN_0 MFP_CFG_LPM(GPIO12, AF2, FLOAT) -#define GPIO13_KP_DKIN_1 MFP_CFG_LPM(GPIO13, AF2, FLOAT) -#define GPIO14_KP_DKIN_2 MFP_CFG_LPM(GPIO14, AF2, FLOAT) -#define GPIO15_KP_DKIN_3 MFP_CFG_LPM(GPIO15, AF2, FLOAT) - -#define GPIO41_KP_DKIN_0 MFP_CFG_LPM(GPIO41, AF2, FLOAT) -#define GPIO42_KP_DKIN_1 MFP_CFG_LPM(GPIO42, AF2, FLOAT) -#define GPIO43_KP_DKIN_2 MFP_CFG_LPM(GPIO43, AF2, FLOAT) -#define GPIO44_KP_DKIN_3 MFP_CFG_LPM(GPIO44, AF2, FLOAT) -#define GPIO41_KP_DKIN_4 MFP_CFG_LPM(GPIO41, AF4, FLOAT) -#define GPIO42_KP_DKIN_5 MFP_CFG_LPM(GPIO42, AF4, FLOAT) - -#define GPIO0_KP_MKIN_0 MFP_CFG_LPM(GPIO0, AF1, FLOAT) -#define GPIO2_KP_MKIN_1 MFP_CFG_LPM(GPIO2, AF1, FLOAT) -#define GPIO4_KP_MKIN_2 MFP_CFG_LPM(GPIO4, AF1, FLOAT) -#define GPIO6_KP_MKIN_3 MFP_CFG_LPM(GPIO6, AF1, FLOAT) -#define GPIO8_KP_MKIN_4 MFP_CFG_LPM(GPIO8, AF1, FLOAT) -#define GPIO10_KP_MKIN_5 MFP_CFG_LPM(GPIO10, AF1, FLOAT) -#define GPIO12_KP_MKIN_6 MFP_CFG_LPM(GPIO12, AF1, FLOAT) -#define GPIO14_KP_MKIN_7 MFP_CFG(GPIO14, AF1) -#define GPIO35_KP_MKIN_5 MFP_CFG(GPIO35, AF4) - -#define GPIO1_KP_MKOUT_0 MFP_CFG_LPM(GPIO1, AF1, DRIVE_HIGH) -#define GPIO3_KP_MKOUT_1 MFP_CFG_LPM(GPIO3, AF1, DRIVE_HIGH) -#define GPIO5_KP_MKOUT_2 MFP_CFG_LPM(GPIO5, AF1, DRIVE_HIGH) -#define GPIO7_KP_MKOUT_3 MFP_CFG_LPM(GPIO7, AF1, DRIVE_HIGH) -#define GPIO9_KP_MKOUT_4 MFP_CFG_LPM(GPIO9, AF1, DRIVE_HIGH) -#define GPIO11_KP_MKOUT_5 MFP_CFG_LPM(GPIO11, AF1, DRIVE_HIGH) -#define GPIO13_KP_MKOUT_6 MFP_CFG_LPM(GPIO13, AF1, DRIVE_HIGH) -#define GPIO15_KP_MKOUT_7 MFP_CFG_LPM(GPIO15, AF1, DRIVE_HIGH) -#define GPIO36_KP_MKOUT_5 MFP_CFG_LPM(GPIO36, AF4, DRIVE_HIGH) - -/* LCD */ -#define GPIO17_LCD_FCLK_RD MFP_CFG(GPIO17, AF1) -#define GPIO18_LCD_LCLK_A0 MFP_CFG(GPIO18, AF1) -#define GPIO19_LCD_PCLK_WR MFP_CFG(GPIO19, AF1) -#define GPIO20_LCD_BIAS MFP_CFG(GPIO20, AF1) -#define GPIO21_LCD_CS MFP_CFG(GPIO21, AF1) -#define GPIO22_LCD_CS2 MFP_CFG(GPIO22, AF2) -#define GPIO22_LCD_VSYNC MFP_CFG(GPIO22, AF1) -#define GPIO23_LCD_DD0 MFP_CFG(GPIO23, AF1) -#define GPIO24_LCD_DD1 MFP_CFG(GPIO24, AF1) -#define GPIO25_LCD_DD2 MFP_CFG(GPIO25, AF1) -#define GPIO26_LCD_DD3 MFP_CFG(GPIO26, AF1) -#define GPIO27_LCD_DD4 MFP_CFG(GPIO27, AF1) -#define GPIO28_LCD_DD5 MFP_CFG(GPIO28, AF1) -#define GPIO29_LCD_DD6 MFP_CFG(GPIO29, AF1) -#define GPIO30_LCD_DD7 MFP_CFG(GPIO30, AF1) -#define GPIO31_LCD_DD8 MFP_CFG(GPIO31, AF1) -#define GPIO32_LCD_DD9 MFP_CFG(GPIO32, AF1) -#define GPIO33_LCD_DD10 MFP_CFG(GPIO33, AF1) -#define GPIO34_LCD_DD11 MFP_CFG(GPIO34, AF1) -#define GPIO35_LCD_DD12 MFP_CFG(GPIO35, AF1) -#define GPIO36_LCD_DD13 MFP_CFG(GPIO36, AF1) -#define GPIO37_LCD_DD14 MFP_CFG(GPIO37, AF1) -#define GPIO38_LCD_DD15 MFP_CFG(GPIO38, AF1) -#define GPIO39_LCD_DD16 MFP_CFG(GPIO39, AF1) -#define GPIO40_LCD_DD17 MFP_CFG(GPIO40, AF1) -#define GPIO41_LCD_CS2 MFP_CFG(GPIO41, AF3) -#define GPIO42_LCD_VSYNC2 MFP_CFG(GPIO42, AF3) -#define GPIO44_LCD_DD7 MFP_CFG(GPIO44, AF1) - -/* Mini-LCD */ -#define GPIO17_MLCD_FCLK MFP_CFG(GPIO17, AF3) -#define GPIO18_MLCD_LCLK MFP_CFG(GPIO18, AF3) -#define GPIO19_MLCD_PCLK MFP_CFG(GPIO19, AF3) -#define GPIO20_MLCD_BIAS MFP_CFG(GPIO20, AF3) -#define GPIO23_MLCD_DD0 MFP_CFG(GPIO23, AF3) -#define GPIO24_MLCD_DD1 MFP_CFG(GPIO24, AF3) -#define GPIO25_MLCD_DD2 MFP_CFG(GPIO25, AF3) -#define GPIO26_MLCD_DD3 MFP_CFG(GPIO26, AF3) -#define GPIO27_MLCD_DD4 MFP_CFG(GPIO27, AF3) -#define GPIO28_MLCD_DD5 MFP_CFG(GPIO28, AF3) -#define GPIO29_MLCD_DD6 MFP_CFG(GPIO29, AF3) -#define GPIO30_MLCD_DD7 MFP_CFG(GPIO30, AF3) -#define GPIO31_MLCD_DD8 MFP_CFG(GPIO31, AF3) -#define GPIO32_MLCD_DD9 MFP_CFG(GPIO32, AF3) -#define GPIO33_MLCD_DD10 MFP_CFG(GPIO33, AF3) -#define GPIO34_MLCD_DD11 MFP_CFG(GPIO34, AF3) -#define GPIO35_MLCD_DD12 MFP_CFG(GPIO35, AF3) -#define GPIO36_MLCD_DD13 MFP_CFG(GPIO36, AF3) -#define GPIO37_MLCD_DD14 MFP_CFG(GPIO37, AF3) -#define GPIO38_MLCD_DD15 MFP_CFG(GPIO38, AF3) -#define GPIO44_MLCD_DD7 MFP_CFG(GPIO44, AF5) - -/* MMC1 */ -#define GPIO10_MMC1_DAT3 MFP_CFG(GPIO10, AF4) -#define GPIO11_MMC1_DAT2 MFP_CFG(GPIO11, AF4) -#define GPIO12_MMC1_DAT1 MFP_CFG(GPIO12, AF4) -#define GPIO13_MMC1_DAT0 MFP_CFG(GPIO13, AF4) -#define GPIO14_MMC1_CMD MFP_CFG(GPIO14, AF4) -#define GPIO15_MMC1_CLK MFP_CFG(GPIO15, AF4) -#define GPIO55_MMC1_CMD MFP_CFG(GPIO55, AF3) -#define GPIO56_MMC1_CLK MFP_CFG(GPIO56, AF3) -#define GPIO57_MMC1_DAT0 MFP_CFG(GPIO57, AF3) -#define GPIO58_MMC1_DAT1 MFP_CFG(GPIO58, AF3) -#define GPIO59_MMC1_DAT2 MFP_CFG(GPIO59, AF3) -#define GPIO60_MMC1_DAT3 MFP_CFG(GPIO60, AF3) - -#define DF_ADDR0_MMC1_CLK MFP_CFG(DF_ADDR0, AF2) -#define DF_ADDR1_MMC1_CMD MFP_CFG(DF_ADDR1, AF2) -#define DF_ADDR2_MMC1_DAT0 MFP_CFG(DF_ADDR2, AF2) -#define DF_ADDR3_MMC1_DAT1 MFP_CFG(DF_ADDR3, AF3) -#define nXCVREN_MMC1_DAT2 MFP_CFG(nXCVREN, AF2) - -/* MMC2 */ -#define GPIO31_MMC2_CMD MFP_CFG(GPIO31, AF7) -#define GPIO32_MMC2_CLK MFP_CFG(GPIO32, AF7) -#define GPIO33_MMC2_DAT0 MFP_CFG(GPIO33, AF7) -#define GPIO34_MMC2_DAT1 MFP_CFG(GPIO34, AF7) -#define GPIO35_MMC2_DAT2 MFP_CFG(GPIO35, AF7) -#define GPIO36_MMC2_DAT3 MFP_CFG(GPIO36, AF7) - -#define GPIO101_MMC2_DAT3 MFP_CFG(GPIO101, AF1) -#define GPIO102_MMC2_DAT2 MFP_CFG(GPIO102, AF1) -#define GPIO103_MMC2_DAT1 MFP_CFG(GPIO103, AF1) -#define GPIO104_MMC2_DAT0 MFP_CFG(GPIO104, AF1) -#define GPIO105_MMC2_CMD MFP_CFG(GPIO105, AF1) -#define GPIO106_MMC2_CLK MFP_CFG(GPIO106, AF1) - -#define DF_IO10_MMC2_DAT3 MFP_CFG(DF_IO10, AF3) -#define DF_IO11_MMC2_DAT2 MFP_CFG(DF_IO11, AF3) -#define DF_IO12_MMC2_DAT1 MFP_CFG(DF_IO12, AF3) -#define DF_IO13_MMC2_DAT0 MFP_CFG(DF_IO13, AF3) -#define DF_IO14_MMC2_CLK MFP_CFG(DF_IO14, AF3) -#define DF_IO15_MMC2_CMD MFP_CFG(DF_IO15, AF3) - -/* BSSP1 */ -#define GPIO12_BSSP1_CLK MFP_CFG(GPIO12, AF3) -#define GPIO13_BSSP1_FRM MFP_CFG(GPIO13, AF3) -#define GPIO14_BSSP1_RXD MFP_CFG(GPIO14, AF3) -#define GPIO15_BSSP1_TXD MFP_CFG(GPIO15, AF3) -#define GPIO97_BSSP1_CLK MFP_CFG(GPIO97, AF5) -#define GPIO98_BSSP1_FRM MFP_CFG(GPIO98, AF5) - -/* BSSP2 */ -#define GPIO84_BSSP2_SDATA_IN MFP_CFG(GPIO84, AF1) -#define GPIO85_BSSP2_BITCLK MFP_CFG(GPIO85, AF1) -#define GPIO86_BSSP2_SYSCLK MFP_CFG(GPIO86, AF1) -#define GPIO87_BSSP2_SYNC MFP_CFG(GPIO87, AF1) -#define GPIO88_BSSP2_DATA_OUT MFP_CFG(GPIO88, AF1) -#define GPIO86_BSSP2_SDATA_IN MFP_CFG(GPIO86, AF4) - -/* BSSP3 */ -#define GPIO79_BSSP3_CLK MFP_CFG(GPIO79, AF1) -#define GPIO80_BSSP3_FRM MFP_CFG(GPIO80, AF1) -#define GPIO81_BSSP3_TXD MFP_CFG(GPIO81, AF1) -#define GPIO82_BSSP3_RXD MFP_CFG(GPIO82, AF1) -#define GPIO83_BSSP3_SYSCLK MFP_CFG(GPIO83, AF1) - -/* BSSP4 */ -#define GPIO43_BSSP4_CLK MFP_CFG(GPIO43, AF4) -#define GPIO44_BSSP4_FRM MFP_CFG(GPIO44, AF4) -#define GPIO45_BSSP4_TXD MFP_CFG(GPIO45, AF4) -#define GPIO46_BSSP4_RXD MFP_CFG(GPIO46, AF4) - -#define GPIO51_BSSP4_CLK MFP_CFG(GPIO51, AF4) -#define GPIO52_BSSP4_FRM MFP_CFG(GPIO52, AF4) -#define GPIO53_BSSP4_TXD MFP_CFG(GPIO53, AF4) -#define GPIO54_BSSP4_RXD MFP_CFG(GPIO54, AF4) - -/* GSSP1 */ -#define GPIO79_GSSP1_CLK MFP_CFG(GPIO79, AF2) -#define GPIO80_GSSP1_FRM MFP_CFG(GPIO80, AF2) -#define GPIO81_GSSP1_TXD MFP_CFG(GPIO81, AF2) -#define GPIO82_GSSP1_RXD MFP_CFG(GPIO82, AF2) -#define GPIO83_GSSP1_SYSCLK MFP_CFG(GPIO83, AF2) - -#define GPIO93_GSSP1_CLK MFP_CFG(GPIO93, AF4) -#define GPIO94_GSSP1_FRM MFP_CFG(GPIO94, AF4) -#define GPIO95_GSSP1_TXD MFP_CFG(GPIO95, AF4) -#define GPIO96_GSSP1_RXD MFP_CFG(GPIO96, AF4) - -/* GSSP2 */ -#define GPIO47_GSSP2_CLK MFP_CFG(GPIO47, AF4) -#define GPIO48_GSSP2_FRM MFP_CFG(GPIO48, AF4) -#define GPIO49_GSSP2_RXD MFP_CFG(GPIO49, AF4) -#define GPIO50_GSSP2_TXD MFP_CFG(GPIO50, AF4) - -#define GPIO69_GSSP2_CLK MFP_CFG(GPIO69, AF4) -#define GPIO70_GSSP2_FRM MFP_CFG(GPIO70, AF4) -#define GPIO71_GSSP2_RXD MFP_CFG(GPIO71, AF4) -#define GPIO72_GSSP2_TXD MFP_CFG(GPIO72, AF4) - -#define GPIO84_GSSP2_RXD MFP_CFG(GPIO84, AF2) -#define GPIO85_GSSP2_CLK MFP_CFG(GPIO85, AF2) -#define GPIO86_GSSP2_SYSCLK MFP_CFG(GPIO86, AF2) -#define GPIO87_GSSP2_FRM MFP_CFG(GPIO87, AF2) -#define GPIO88_GSSP2_TXD MFP_CFG(GPIO88, AF2) -#define GPIO86_GSSP2_RXD MFP_CFG(GPIO86, AF5) - -#define GPIO103_GSSP2_CLK MFP_CFG(GPIO103, AF2) -#define GPIO104_GSSP2_FRM MFP_CFG(GPIO104, AF2) -#define GPIO105_GSSP2_RXD MFP_CFG(GPIO105, AF2) -#define GPIO106_GSSP2_TXD MFP_CFG(GPIO106, AF2) - -/* UART1 - FFUART */ -#define GPIO47_UART1_DSR_N MFP_CFG(GPIO47, AF1) -#define GPIO48_UART1_DTR_N MFP_CFG(GPIO48, AF1) -#define GPIO49_UART1_RI MFP_CFG(GPIO49, AF1) -#define GPIO50_UART1_DCD MFP_CFG(GPIO50, AF1) -#define GPIO51_UART1_CTS MFP_CFG(GPIO51, AF1) -#define GPIO52_UART1_RTS MFP_CFG(GPIO52, AF1) -#define GPIO53_UART1_RXD MFP_CFG(GPIO53, AF1) -#define GPIO54_UART1_TXD MFP_CFG(GPIO54, AF1) - -#define GPIO63_UART1_TXD MFP_CFG(GPIO63, AF2) -#define GPIO64_UART1_RXD MFP_CFG(GPIO64, AF2) -#define GPIO65_UART1_DSR MFP_CFG(GPIO65, AF2) -#define GPIO66_UART1_DTR MFP_CFG(GPIO66, AF2) -#define GPIO67_UART1_RI MFP_CFG(GPIO67, AF2) -#define GPIO68_UART1_DCD MFP_CFG(GPIO68, AF2) -#define GPIO69_UART1_CTS MFP_CFG(GPIO69, AF2) -#define GPIO70_UART1_RTS MFP_CFG(GPIO70, AF2) - -/* UART2 - BTUART */ -#define GPIO91_UART2_RXD MFP_CFG(GPIO91, AF1) -#define GPIO92_UART2_TXD MFP_CFG(GPIO92, AF1) -#define GPIO93_UART2_CTS MFP_CFG(GPIO93, AF1) -#define GPIO94_UART2_RTS MFP_CFG(GPIO94, AF1) - -/* UART3 - STUART */ -#define GPIO43_UART3_RTS MFP_CFG(GPIO43, AF3) -#define GPIO44_UART3_CTS MFP_CFG(GPIO44, AF3) -#define GPIO45_UART3_RXD MFP_CFG(GPIO45, AF3) -#define GPIO46_UART3_TXD MFP_CFG(GPIO46, AF3) - -#define GPIO75_UART3_RTS MFP_CFG(GPIO75, AF5) -#define GPIO76_UART3_CTS MFP_CFG(GPIO76, AF5) -#define GPIO77_UART3_TXD MFP_CFG(GPIO77, AF5) -#define GPIO78_UART3_RXD MFP_CFG(GPIO78, AF5) - -/* DFI */ -#define DF_IO0_DF_IO0 MFP_CFG(DF_IO0, AF2) -#define DF_IO1_DF_IO1 MFP_CFG(DF_IO1, AF2) -#define DF_IO2_DF_IO2 MFP_CFG(DF_IO2, AF2) -#define DF_IO3_DF_IO3 MFP_CFG(DF_IO3, AF2) -#define DF_IO4_DF_IO4 MFP_CFG(DF_IO4, AF2) -#define DF_IO5_DF_IO5 MFP_CFG(DF_IO5, AF2) -#define DF_IO6_DF_IO6 MFP_CFG(DF_IO6, AF2) -#define DF_IO7_DF_IO7 MFP_CFG(DF_IO7, AF2) -#define DF_IO8_DF_IO8 MFP_CFG(DF_IO8, AF2) -#define DF_IO9_DF_IO9 MFP_CFG(DF_IO9, AF2) -#define DF_IO10_DF_IO10 MFP_CFG(DF_IO10, AF2) -#define DF_IO11_DF_IO11 MFP_CFG(DF_IO11, AF2) -#define DF_IO12_DF_IO12 MFP_CFG(DF_IO12, AF2) -#define DF_IO13_DF_IO13 MFP_CFG(DF_IO13, AF2) -#define DF_IO14_DF_IO14 MFP_CFG(DF_IO14, AF2) -#define DF_IO15_DF_IO15 MFP_CFG(DF_IO15, AF2) -#define DF_nADV1_ALE_DF_nADV1 MFP_CFG(DF_nADV1_ALE, AF2) -#define DF_nADV2_ALE_DF_nADV2 MFP_CFG(DF_nADV2_ALE, AF2) -#define DF_nCS0_DF_nCS0 MFP_CFG(DF_nCS0, AF2) -#define DF_nCS1_DF_nCS1 MFP_CFG(DF_nCS1, AF2) -#define DF_nRE_nOE_DF_nOE MFP_CFG(DF_nRE_nOE, AF2) -#define DF_nWE_DF_nWE MFP_CFG(DF_nWE, AF2) - -/* DFI - NAND */ -#define DF_CLE_nOE_ND_CLE MFP_CFG_LPM(DF_CLE_nOE, AF1, PULL_HIGH) -#define DF_INT_RnB_ND_INT_RnB MFP_CFG_LPM(DF_INT_RnB, AF1, PULL_LOW) -#define DF_IO0_ND_IO0 MFP_CFG_LPM(DF_IO0, AF1, PULL_LOW) -#define DF_IO1_ND_IO1 MFP_CFG_LPM(DF_IO1, AF1, PULL_LOW) -#define DF_IO2_ND_IO2 MFP_CFG_LPM(DF_IO2, AF1, PULL_LOW) -#define DF_IO3_ND_IO3 MFP_CFG_LPM(DF_IO3, AF1, PULL_LOW) -#define DF_IO4_ND_IO4 MFP_CFG_LPM(DF_IO4, AF1, PULL_LOW) -#define DF_IO5_ND_IO5 MFP_CFG_LPM(DF_IO5, AF1, PULL_LOW) -#define DF_IO6_ND_IO6 MFP_CFG_LPM(DF_IO6, AF1, PULL_LOW) -#define DF_IO7_ND_IO7 MFP_CFG_LPM(DF_IO7, AF1, PULL_LOW) -#define DF_IO8_ND_IO8 MFP_CFG_LPM(DF_IO8, AF1, PULL_LOW) -#define DF_IO9_ND_IO9 MFP_CFG_LPM(DF_IO9, AF1, PULL_LOW) -#define DF_IO10_ND_IO10 MFP_CFG_LPM(DF_IO10, AF1, PULL_LOW) -#define DF_IO11_ND_IO11 MFP_CFG_LPM(DF_IO11, AF1, PULL_LOW) -#define DF_IO12_ND_IO12 MFP_CFG_LPM(DF_IO12, AF1, PULL_LOW) -#define DF_IO13_ND_IO13 MFP_CFG_LPM(DF_IO13, AF1, PULL_LOW) -#define DF_IO14_ND_IO14 MFP_CFG_LPM(DF_IO14, AF1, PULL_LOW) -#define DF_IO15_ND_IO15 MFP_CFG_LPM(DF_IO15, AF1, PULL_LOW) -#define DF_nADV1_ALE_ND_ALE MFP_CFG_LPM(DF_nADV1_ALE, AF1, PULL_HIGH) -#define DF_nADV2_ALE_ND_ALE MFP_CFG_LPM(DF_nADV2_ALE, AF1, PULL_HIGH) -#define DF_nADV2_ALE_nCS3 MFP_CFG_LPM(DF_nADV2_ALE, AF3, PULL_HIGH) -#define DF_nCS0_ND_nCS0 MFP_CFG_LPM(DF_nCS0, AF1, PULL_HIGH) -#define DF_nCS1_ND_nCS1 MFP_CFG_LPM(DF_nCS1, AF1, PULL_HIGH) -#define DF_nRE_nOE_ND_nRE MFP_CFG_LPM(DF_nRE_nOE, AF1, PULL_HIGH) -#define DF_nWE_ND_nWE MFP_CFG_LPM(DF_nWE, AF1, PULL_HIGH) - -/* PWM */ -#define GPIO41_PWM0 MFP_CFG_LPM(GPIO41, AF1, PULL_LOW) -#define GPIO42_PWM1 MFP_CFG_LPM(GPIO42, AF1, PULL_LOW) -#define GPIO43_PWM3 MFP_CFG_LPM(GPIO43, AF1, PULL_LOW) -#define GPIO20_PWM0 MFP_CFG_LPM(GPIO20, AF2, PULL_LOW) -#define GPIO21_PWM2 MFP_CFG_LPM(GPIO21, AF3, PULL_LOW) -#define GPIO22_PWM3 MFP_CFG_LPM(GPIO22, AF3, PULL_LOW) - -/* CIR */ -#define GPIO46_CIR_OUT MFP_CFG(GPIO46, AF1) -#define GPIO77_CIR_OUT MFP_CFG(GPIO77, AF3) - -/* USB P2 */ -#define GPIO0_USB_P2_7 MFP_CFG(GPIO0, AF3) -#define GPIO15_USB_P2_7 MFP_CFG(GPIO15, AF5) -#define GPIO16_USB_P2_7 MFP_CFG(GPIO16, AF2) -#define GPIO48_USB_P2_7 MFP_CFG(GPIO48, AF7) -#define GPIO49_USB_P2_7 MFP_CFG(GPIO49, AF6) -#define DF_IO9_USB_P2_7 MFP_CFG(DF_IO9, AF3) - -#define GPIO48_USB_P2_8 MFP_CFG(GPIO48, AF2) -#define GPIO50_USB_P2_7 MFP_CFG_X(GPIO50, AF2, DS02X, FLOAT) -#define GPIO51_USB_P2_5 MFP_CFG(GPIO51, AF2) -#define GPIO47_USB_P2_4 MFP_CFG(GPIO47, AF2) -#define GPIO53_USB_P2_3 MFP_CFG(GPIO53, AF2) -#define GPIO54_USB_P2_6 MFP_CFG(GPIO54, AF2) -#define GPIO49_USB_P2_2 MFP_CFG(GPIO49, AF2) -#define GPIO52_USB_P2_1 MFP_CFG(GPIO52, AF2) - -#define GPIO63_USB_P2_8 MFP_CFG(GPIO63, AF3) -#define GPIO64_USB_P2_7 MFP_CFG(GPIO64, AF3) -#define GPIO65_USB_P2_6 MFP_CFG(GPIO65, AF3) -#define GPIO66_USG_P2_5 MFP_CFG(GPIO66, AF3) -#define GPIO67_USB_P2_4 MFP_CFG(GPIO67, AF3) -#define GPIO68_USB_P2_3 MFP_CFG(GPIO68, AF3) -#define GPIO69_USB_P2_2 MFP_CFG(GPIO69, AF3) -#define GPIO70_USB_P2_1 MFP_CFG(GPIO70, AF3) - -/* ULPI */ -#define GPIO31_USB_ULPI_D0 MFP_CFG(GPIO31, AF4) -#define GPIO30_USB_ULPI_D1 MFP_CFG(GPIO30, AF7) -#define GPIO33_USB_ULPI_D2 MFP_CFG(GPIO33, AF5) -#define GPIO34_USB_ULPI_D3 MFP_CFG(GPIO34, AF5) -#define GPIO35_USB_ULPI_D4 MFP_CFG(GPIO35, AF5) -#define GPIO36_USB_ULPI_D5 MFP_CFG(GPIO36, AF5) -#define GPIO41_USB_ULPI_D6 MFP_CFG(GPIO41, AF5) -#define GPIO42_USB_ULPI_D7 MFP_CFG(GPIO42, AF5) -#define GPIO37_USB_ULPI_DIR MFP_CFG(GPIO37, AF4) -#define GPIO38_USB_ULPI_CLK MFP_CFG(GPIO38, AF4) -#define GPIO39_USB_ULPI_STP MFP_CFG(GPIO39, AF4) -#define GPIO40_USB_ULPI_NXT MFP_CFG(GPIO40, AF4) - -#define GPIO3_CLK26MOUTDMD MFP_CFG(GPIO3, AF3) -#define GPIO40_CLK26MOUTDMD MFP_CFG(GPIO40, AF7) -#define GPIO94_CLK26MOUTDMD MFP_CFG(GPIO94, AF5) -#define GPIO104_CLK26MOUTDMD MFP_CFG(GPIO104, AF4) -#define DF_ADDR1_CLK26MOUTDMD MFP_CFG(DF_ADDR2, AF3) -#define DF_ADDR3_CLK26MOUTDMD MFP_CFG(DF_ADDR3, AF3) - -#define GPIO14_CLK26MOUT MFP_CFG(GPIO14, AF5) -#define GPIO38_CLK26MOUT MFP_CFG(GPIO38, AF7) -#define GPIO92_CLK26MOUT MFP_CFG(GPIO92, AF5) -#define GPIO105_CLK26MOUT MFP_CFG(GPIO105, AF4) - -#define GPIO2_CLK13MOUTDMD MFP_CFG(GPIO2, AF3) -#define GPIO39_CLK13MOUTDMD MFP_CFG(GPIO39, AF7) -#define GPIO50_CLK13MOUTDMD MFP_CFG(GPIO50, AF3) -#define GPIO93_CLK13MOUTDMD MFP_CFG(GPIO93, AF5) -#define GPIO103_CLK13MOUTDMD MFP_CFG(GPIO103, AF4) -#define DF_ADDR2_CLK13MOUTDMD MFP_CFG(DF_ADDR2, AF3) - -/* 1 wire */ -#define GPIO95_OW_DQ_IN MFP_CFG(GPIO95, AF5) - -#endif /* __ASM_ARCH_MFP_PXA9xx_H */ diff --git a/include/asm-arm/arch-pxa/mfp.h b/include/asm-arm/arch-pxa/mfp.h deleted file mode 100644 index e7d5879..0000000 --- a/include/asm-arm/arch-pxa/mfp.h +++ /dev/null @@ -1,319 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/mfp.h - * - * Multi-Function Pin Definitions - * - * Copyright (C) 2007 Marvell International Ltd. - * - * 2007-8-21: eric miao - * initial version - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MFP_H -#define __ASM_ARCH_MFP_H - -#define mfp_to_gpio(m) ((m) % 128) - -/* list of all the configurable MFP pins */ -enum { - MFP_PIN_INVALID = -1, - - MFP_PIN_GPIO0 = 0, - MFP_PIN_GPIO1, - MFP_PIN_GPIO2, - MFP_PIN_GPIO3, - MFP_PIN_GPIO4, - MFP_PIN_GPIO5, - MFP_PIN_GPIO6, - MFP_PIN_GPIO7, - MFP_PIN_GPIO8, - MFP_PIN_GPIO9, - MFP_PIN_GPIO10, - MFP_PIN_GPIO11, - MFP_PIN_GPIO12, - MFP_PIN_GPIO13, - MFP_PIN_GPIO14, - MFP_PIN_GPIO15, - MFP_PIN_GPIO16, - MFP_PIN_GPIO17, - MFP_PIN_GPIO18, - MFP_PIN_GPIO19, - MFP_PIN_GPIO20, - MFP_PIN_GPIO21, - MFP_PIN_GPIO22, - MFP_PIN_GPIO23, - MFP_PIN_GPIO24, - MFP_PIN_GPIO25, - MFP_PIN_GPIO26, - MFP_PIN_GPIO27, - MFP_PIN_GPIO28, - MFP_PIN_GPIO29, - MFP_PIN_GPIO30, - MFP_PIN_GPIO31, - MFP_PIN_GPIO32, - MFP_PIN_GPIO33, - MFP_PIN_GPIO34, - MFP_PIN_GPIO35, - MFP_PIN_GPIO36, - MFP_PIN_GPIO37, - MFP_PIN_GPIO38, - MFP_PIN_GPIO39, - MFP_PIN_GPIO40, - MFP_PIN_GPIO41, - MFP_PIN_GPIO42, - MFP_PIN_GPIO43, - MFP_PIN_GPIO44, - MFP_PIN_GPIO45, - MFP_PIN_GPIO46, - MFP_PIN_GPIO47, - MFP_PIN_GPIO48, - MFP_PIN_GPIO49, - MFP_PIN_GPIO50, - MFP_PIN_GPIO51, - MFP_PIN_GPIO52, - MFP_PIN_GPIO53, - MFP_PIN_GPIO54, - MFP_PIN_GPIO55, - MFP_PIN_GPIO56, - MFP_PIN_GPIO57, - MFP_PIN_GPIO58, - MFP_PIN_GPIO59, - MFP_PIN_GPIO60, - MFP_PIN_GPIO61, - MFP_PIN_GPIO62, - MFP_PIN_GPIO63, - MFP_PIN_GPIO64, - MFP_PIN_GPIO65, - MFP_PIN_GPIO66, - MFP_PIN_GPIO67, - MFP_PIN_GPIO68, - MFP_PIN_GPIO69, - MFP_PIN_GPIO70, - MFP_PIN_GPIO71, - MFP_PIN_GPIO72, - MFP_PIN_GPIO73, - MFP_PIN_GPIO74, - MFP_PIN_GPIO75, - MFP_PIN_GPIO76, - MFP_PIN_GPIO77, - MFP_PIN_GPIO78, - MFP_PIN_GPIO79, - MFP_PIN_GPIO80, - MFP_PIN_GPIO81, - MFP_PIN_GPIO82, - MFP_PIN_GPIO83, - MFP_PIN_GPIO84, - MFP_PIN_GPIO85, - MFP_PIN_GPIO86, - MFP_PIN_GPIO87, - MFP_PIN_GPIO88, - MFP_PIN_GPIO89, - MFP_PIN_GPIO90, - MFP_PIN_GPIO91, - MFP_PIN_GPIO92, - MFP_PIN_GPIO93, - MFP_PIN_GPIO94, - MFP_PIN_GPIO95, - MFP_PIN_GPIO96, - MFP_PIN_GPIO97, - MFP_PIN_GPIO98, - MFP_PIN_GPIO99, - MFP_PIN_GPIO100, - MFP_PIN_GPIO101, - MFP_PIN_GPIO102, - MFP_PIN_GPIO103, - MFP_PIN_GPIO104, - MFP_PIN_GPIO105, - MFP_PIN_GPIO106, - MFP_PIN_GPIO107, - MFP_PIN_GPIO108, - MFP_PIN_GPIO109, - MFP_PIN_GPIO110, - MFP_PIN_GPIO111, - MFP_PIN_GPIO112, - MFP_PIN_GPIO113, - MFP_PIN_GPIO114, - MFP_PIN_GPIO115, - MFP_PIN_GPIO116, - MFP_PIN_GPIO117, - MFP_PIN_GPIO118, - MFP_PIN_GPIO119, - MFP_PIN_GPIO120, - MFP_PIN_GPIO121, - MFP_PIN_GPIO122, - MFP_PIN_GPIO123, - MFP_PIN_GPIO124, - MFP_PIN_GPIO125, - MFP_PIN_GPIO126, - MFP_PIN_GPIO127, - MFP_PIN_GPIO0_2, - MFP_PIN_GPIO1_2, - MFP_PIN_GPIO2_2, - MFP_PIN_GPIO3_2, - MFP_PIN_GPIO4_2, - MFP_PIN_GPIO5_2, - MFP_PIN_GPIO6_2, - MFP_PIN_GPIO7_2, - MFP_PIN_GPIO8_2, - MFP_PIN_GPIO9_2, - MFP_PIN_GPIO10_2, - MFP_PIN_GPIO11_2, - MFP_PIN_GPIO12_2, - MFP_PIN_GPIO13_2, - MFP_PIN_GPIO14_2, - MFP_PIN_GPIO15_2, - MFP_PIN_GPIO16_2, - MFP_PIN_GPIO17_2, - - MFP_PIN_ULPI_STP, - MFP_PIN_ULPI_NXT, - MFP_PIN_ULPI_DIR, - - MFP_PIN_nXCVREN, - MFP_PIN_DF_CLE_nOE, - MFP_PIN_DF_nADV1_ALE, - MFP_PIN_DF_SCLK_E, - MFP_PIN_DF_SCLK_S, - MFP_PIN_nBE0, - MFP_PIN_nBE1, - MFP_PIN_DF_nADV2_ALE, - MFP_PIN_DF_INT_RnB, - MFP_PIN_DF_nCS0, - MFP_PIN_DF_nCS1, - MFP_PIN_nLUA, - MFP_PIN_nLLA, - MFP_PIN_DF_nWE, - MFP_PIN_DF_ALE_nWE, - MFP_PIN_DF_nRE_nOE, - MFP_PIN_DF_ADDR0, - MFP_PIN_DF_ADDR1, - MFP_PIN_DF_ADDR2, - MFP_PIN_DF_ADDR3, - MFP_PIN_DF_IO0, - MFP_PIN_DF_IO1, - MFP_PIN_DF_IO2, - MFP_PIN_DF_IO3, - MFP_PIN_DF_IO4, - MFP_PIN_DF_IO5, - MFP_PIN_DF_IO6, - MFP_PIN_DF_IO7, - MFP_PIN_DF_IO8, - MFP_PIN_DF_IO9, - MFP_PIN_DF_IO10, - MFP_PIN_DF_IO11, - MFP_PIN_DF_IO12, - MFP_PIN_DF_IO13, - MFP_PIN_DF_IO14, - MFP_PIN_DF_IO15, - - /* additional pins on PXA930 */ - MFP_PIN_GSIM_UIO, - MFP_PIN_GSIM_UCLK, - MFP_PIN_GSIM_UDET, - MFP_PIN_GSIM_nURST, - MFP_PIN_PMIC_INT, - MFP_PIN_RDY, - - MFP_PIN_MAX, -}; - -/* - * a possible MFP configuration is represented by a 32-bit integer - * - * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum) - * bit 10..12 - Alternate Function Selection - * bit 13..15 - Drive Strength - * bit 16..18 - Low Power Mode State - * bit 19..20 - Low Power Mode Edge Detection - * bit 21..22 - Run Mode Pull State - * - * to facilitate the definition, the following macros are provided - * - * MFP_CFG_DEFAULT - default MFP configuration value, with - * alternate function = 0, - * drive strength = fast 3mA (MFP_DS03X) - * low power mode = default - * edge detection = none - * - * MFP_CFG - default MFPR value with alternate function - * MFP_CFG_DRV - default MFPR value with alternate function and - * pin drive strength - * MFP_CFG_LPM - default MFPR value with alternate function and - * low power mode - * MFP_CFG_X - default MFPR value with alternate function, - * pin drive strength and low power mode - */ - -typedef unsigned long mfp_cfg_t; - -#define MFP_PIN(x) ((x) & 0x3ff) - -#define MFP_AF0 (0x0 << 10) -#define MFP_AF1 (0x1 << 10) -#define MFP_AF2 (0x2 << 10) -#define MFP_AF3 (0x3 << 10) -#define MFP_AF4 (0x4 << 10) -#define MFP_AF5 (0x5 << 10) -#define MFP_AF6 (0x6 << 10) -#define MFP_AF7 (0x7 << 10) -#define MFP_AF_MASK (0x7 << 10) -#define MFP_AF(x) (((x) >> 10) & 0x7) - -#define MFP_DS01X (0x0 << 13) -#define MFP_DS02X (0x1 << 13) -#define MFP_DS03X (0x2 << 13) -#define MFP_DS04X (0x3 << 13) -#define MFP_DS06X (0x4 << 13) -#define MFP_DS08X (0x5 << 13) -#define MFP_DS10X (0x6 << 13) -#define MFP_DS13X (0x7 << 13) -#define MFP_DS_MASK (0x7 << 13) -#define MFP_DS(x) (((x) >> 13) & 0x7) - -#define MFP_LPM_INPUT (0x0 << 16) -#define MFP_LPM_DRIVE_LOW (0x1 << 16) -#define MFP_LPM_DRIVE_HIGH (0x2 << 16) -#define MFP_LPM_PULL_LOW (0x3 << 16) -#define MFP_LPM_PULL_HIGH (0x4 << 16) -#define MFP_LPM_FLOAT (0x5 << 16) -#define MFP_LPM_STATE_MASK (0x7 << 16) -#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7) - -#define MFP_LPM_EDGE_NONE (0x0 << 19) -#define MFP_LPM_EDGE_RISE (0x1 << 19) -#define MFP_LPM_EDGE_FALL (0x2 << 19) -#define MFP_LPM_EDGE_BOTH (0x3 << 19) -#define MFP_LPM_EDGE_MASK (0x3 << 19) -#define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3) - -#define MFP_PULL_NONE (0x0 << 21) -#define MFP_PULL_LOW (0x1 << 21) -#define MFP_PULL_HIGH (0x2 << 21) -#define MFP_PULL_BOTH (0x3 << 21) -#define MFP_PULL_MASK (0x3 << 21) -#define MFP_PULL(x) (((x) >> 21) & 0x3) - -#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_INPUT |\ - MFP_LPM_EDGE_NONE | MFP_PULL_NONE) - -#define MFP_CFG(pin, af) \ - ((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af)) - -#define MFP_CFG_DRV(pin, af, drv) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv)) - -#define MFP_CFG_LPM(pin, af, lpm) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm)) - -#define MFP_CFG_X(pin, af, drv, lpm) \ - ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ - (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) - -#endif /* __ASM_ARCH_MFP_H */ diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h deleted file mode 100644 index 6d1304c..0000000 --- a/include/asm-arm/arch-pxa/mmc.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef ASMARM_ARCH_MMC_H -#define ASMARM_ARCH_MMC_H - -#include -#include - -struct device; -struct mmc_host; - -struct pxamci_platform_data { - unsigned int ocr_mask; /* available voltages */ - unsigned long detect_delay; /* delay in jiffies before detecting cards after interrupt */ - int (*init)(struct device *, irq_handler_t , void *); - int (*get_ro)(struct device *); - void (*setpower)(struct device *, unsigned int); - void (*exit)(struct device *, void *); -}; - -extern void pxa_set_mci_info(struct pxamci_platform_data *info); -extern void pxa3xx_set_mci2_info(struct pxamci_platform_data *info); -extern void pxa3xx_set_mci3_info(struct pxamci_platform_data *info); - -#endif diff --git a/include/asm-arm/arch-pxa/mtd-xip.h b/include/asm-arm/arch-pxa/mtd-xip.h deleted file mode 100644 index 8704dbc..0000000 --- a/include/asm-arm/arch-pxa/mtd-xip.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * MTD primitives for XIP support. Architecture specific functions - * - * Do not include this file directly. It's included from linux/mtd/xip.h - * - * Author: Nicolas Pitre - * Created: Nov 2, 2004 - * Copyright: (C) 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $ - */ - -#ifndef __ARCH_PXA_MTD_XIP_H__ -#define __ARCH_PXA_MTD_XIP_H__ - -#include - -#define xip_irqpending() (ICIP & ICMR) - -/* we sample OSCR and convert desired delta to usec (1/4 ~= 1000000/3686400) */ -#define xip_currtime() (OSCR) -#define xip_elapsed_since(x) (signed)((OSCR - (x)) / 4) - -/* - * xip_cpu_idle() is used when waiting for a delay equal or larger than - * the system timer tick period. This should put the CPU into idle mode - * to save power and to be woken up only when some interrupts are pending. - * As above, this should not rely upon standard kernel code. - */ - -#define xip_cpu_idle() asm volatile ("mcr p14, 0, %0, c7, c0, 0" :: "r" (1)) - -#endif /* __ARCH_PXA_MTD_XIP_H__ */ diff --git a/include/asm-arm/arch-pxa/ohci.h b/include/asm-arm/arch-pxa/ohci.h deleted file mode 100644 index e848a47..0000000 --- a/include/asm-arm/arch-pxa/ohci.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef ASMARM_ARCH_OHCI_H -#define ASMARM_ARCH_OHCI_H - -struct device; - -struct pxaohci_platform_data { - int (*init)(struct device *); - void (*exit)(struct device *); - - int port_mode; -#define PMM_NPS_MODE 1 -#define PMM_GLOBAL_MODE 2 -#define PMM_PERPORT_MODE 3 - - int power_budget; -}; - -extern void pxa_set_ohci_info(struct pxaohci_platform_data *info); - -#endif diff --git a/include/asm-arm/arch-pxa/palmtx.h b/include/asm-arm/arch-pxa/palmtx.h deleted file mode 100644 index 1e8bccb..0000000 --- a/include/asm-arm/arch-pxa/palmtx.h +++ /dev/null @@ -1,106 +0,0 @@ -/* - * GPIOs and interrupts for Palm T|X Handheld Computer - * - * Based on palmld-gpio.h by Alex Osborne - * - * Authors: Marek Vasut - * Cristiano P. - * Jan Herman <2hp@seznam.cz> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef _INCLUDE_PALMTX_H_ -#define _INCLUDE_PALMTX_H_ - -/** HERE ARE GPIOs **/ - -/* GPIOs */ -#define GPIO_NR_PALMTX_GPIO_RESET 1 - -#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ -#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 -#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 - -/* SD/MMC */ -#define GPIO_NR_PALMTX_SD_DETECT_N 14 -#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ -#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ - -/* TOUCHSCREEN */ -#define GPIO_NR_PALMTX_WM9712_IRQ 27 - -/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ -#define GPIO_NR_PALMTX_IR_DISABLE 40 - -/* USB */ -#define GPIO_NR_PALMTX_USB_DETECT_N 13 -#define GPIO_NR_PALMTX_USB_POWER 95 -#define GPIO_NR_PALMTX_USB_PULLUP 93 - -/* LCD/BACKLIGHT */ -#define GPIO_NR_PALMTX_BL_POWER 84 -#define GPIO_NR_PALMTX_LCD_POWER 96 - -/* LCD BORDER */ -#define GPIO_NR_PALMTX_BORDER_SWITCH 98 -#define GPIO_NR_PALMTX_BORDER_SELECT 22 - -/* BLUETOOTH */ -#define GPIO_NR_PALMTX_BT_POWER 17 -#define GPIO_NR_PALMTX_BT_RESET 83 - -/* PCMCIA (WiFi) */ -#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 -#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 -#define GPIO_NR_PALMTX_PCMCIA_RESET 79 -#define GPIO_NR_PALMTX_PCMCIA_READY 116 - -/* NAND Flash ... this GPIO may be incorrect! */ -#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 - -/* INTERRUPTS */ -#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) -#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) -#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) -#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) - -/** HERE ARE INIT VALUES **/ - -/* Various addresses */ -#define PALMTX_PCMCIA_PHYS 0x28000000 -#define PALMTX_PCMCIA_VIRT 0xf0000000 -#define PALMTX_PCMCIA_SIZE 0x100000 - -#define PALMTX_PHYS_RAM_START 0xa0000000 -#define PALMTX_PHYS_IO_START 0x40000000 - -#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ -#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ - -/* TOUCHSCREEN */ -#define AC97_LINK_FRAME 21 - - -/* BATTERY */ -#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ -#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ -#define PALMTX_BAT_MAX_CURRENT 0 /* unknokn */ -#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ -#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ -#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ -#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ - -#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) - -/* BACKLIGHT */ -#define PALMTX_MAX_INTENSITY 0xFE -#define PALMTX_DEFAULT_INTENSITY 0x7E -#define PALMTX_LIMIT_MASK 0x7F -#define PALMTX_PRESCALER 0x3F -#define PALMTX_PERIOD_NS 3500 - -#endif diff --git a/include/asm-arm/arch-pxa/pcm027.h b/include/asm-arm/arch-pxa/pcm027.h deleted file mode 100644 index 7beae1472..0000000 --- a/include/asm-arm/arch-pxa/pcm027.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pcm027.h - * - * (c) 2003 Phytec Messtechnik GmbH - * (c) 2007 Juergen Beisert - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -/* - * Definitions of CPU card resources only - */ - -/* I2C RTC */ -#define PCM027_RTC_IRQ_GPIO 0 -#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) -#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define ADR_PCM027_RTC 0x51 /* I2C address */ - -/* I2C EEPROM */ -#define ADR_PCM027_EEPROM 0x54 /* I2C address */ - -/* Ethernet chip (SMSC91C111) */ -#define PCM027_ETH_IRQ_GPIO 52 -#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) -#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM027_ETH_PHYS PXA_CS5_PHYS -#define PCM027_ETH_SIZE (1*1024*1024) - -/* CAN controller SJA1000 (unsupported yet) */ -#define PCM027_CAN_IRQ_GPIO 114 -#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) -#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define PCM027_CAN_PHYS 0x22000000 -#define PCM027_CAN_SIZE 0x100 - -/* SPI GPIO expander (unsupported yet) */ -#define PCM027_EGPIO_IRQ_GPIO 27 -#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) -#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING -#define PCM027_EGPIO_CS 24 -/* - * TODO: Switch this pin from dedicated usage to GPIO if - * more than the MAX7301 device is connected to this SPI bus - */ -#define PCM027_EGPIO_CS_MODE GPIO24_SFRM_MD - -/* Flash memory */ -#define PCM027_FLASH_PHYS 0x00000000 -#define PCM027_FLASH_SIZE 0x02000000 - -/* onboard LEDs connected to GPIO */ -#define PCM027_LED_CPU 90 -#define PCM027_LED_HEARD_BEAT 91 - -/* - * This CPU module needs a baseboard to work. After basic initializing - * its own devices, it calls baseboard's init function. - * TODO: Add your own basebaord init function and call it from - * inside pcm027_init(). This example here is for the developmen board. - * Refer pcm990-baseboard.c - */ -extern void pcm990_baseboard_init(void); diff --git a/include/asm-arm/arch-pxa/pcm990_baseboard.h b/include/asm-arm/arch-pxa/pcm990_baseboard.h deleted file mode 100644 index 2e20131..0000000 --- a/include/asm-arm/arch-pxa/pcm990_baseboard.h +++ /dev/null @@ -1,275 +0,0 @@ -/* - * include/asm-arm/arch-pxa/pcm990_baseboard.h - * - * (c) 2003 Phytec Messtechnik GmbH - * (c) 2007 Juergen Beisert - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include - -/* - * definitions relevant only when the PCM-990 - * development base board is in use - */ - -/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ -#define PCM990_CTRL_INT_IRQ_GPIO 9 -#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) -#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ -#define PCM990_CTRL_BASE 0xea000000 -#define PCM990_CTRL_SIZE (1*1024*1024) - -#define PCM990_CTRL_PWR_IRQ_GPIO 14 -#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) -#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -/* visible CPLD (U7) registers */ -#define PCM990_CTRL_REG0 0x0000 /* RESET REGISTER */ -#define PCM990_CTRL_SYSRES 0x0001 /* System RESET REGISTER */ -#define PCM990_CTRL_RESOUT 0x0002 /* RESETOUT Enable REGISTER */ -#define PCM990_CTRL_RESGPIO 0x0004 /* RESETGPIO Enable REGISTER */ - -#define PCM990_CTRL_REG1 0x0002 /* Power REGISTER */ -#define PCM990_CTRL_5VOFF 0x0001 /* Disable 5V Regulators */ -#define PCM990_CTRL_CANPWR 0x0004 /* Enable CANPWR ADUM */ -#define PCM990_CTRL_PM_5V 0x0008 /* Read 5V OK */ - -#define PCM990_CTRL_REG2 0x0004 /* LED REGISTER */ -#define PCM990_CTRL_LEDPWR 0x0001 /* POWER LED enable */ -#define PCM990_CTRL_LEDBAS 0x0002 /* BASIS LED enable */ -#define PCM990_CTRL_LEDUSR 0x0004 /* USER LED enable */ - -#define PCM990_CTRL_REG3 0x0006 /* LCD CTRL REGISTER 3 */ -#define PCM990_CTRL_LCDPWR 0x0001 /* RW LCD Power on */ -#define PCM990_CTRL_LCDON 0x0002 /* RW LCD Latch on */ -#define PCM990_CTRL_LCDPOS1 0x0004 /* RW POS 1 */ -#define PCM990_CTRL_LCDPOS2 0x0008 /* RW POS 2 */ - -#define PCM990_CTRL_REG4 0x0008 /* MMC1 CTRL REGISTER 4 */ -#define PCM990_CTRL_MMC1PWR 0x0001 /* RW MMC1 Power on */ - -#define PCM990_CTRL_REG5 0x000A /* MMC2 CTRL REGISTER 5 */ -#define PCM990_CTRL_MMC2PWR 0x0001 /* RW MMC2 Power on */ -#define PCM990_CTRL_MMC2LED 0x0002 /* RW MMC2 LED */ -#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */ -#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */ - -#define PCM990_CTRL_REG6 0x000C /* Interrupt Clear REGISTER */ -#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */ -#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */ -#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */ -#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */ - -#define PCM990_CTRL_REG7 0x000E /* Interrupt Enable REGISTER */ -#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */ -#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */ -#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */ -#define PCM990_CTRL_ENAINT3 0x0008 /* Enable Int PM_5V off */ - -#define PCM990_CTRL_REG8 0x0014 /* Uart REGISTER */ -#define PCM990_CTRL_FFSD 0x0001 /* BT Uart Enable */ -#define PCM990_CTRL_BTSD 0x0002 /* FF Uart Enable */ -#define PCM990_CTRL_FFRI 0x0004 /* FF Uart RI detect */ -#define PCM990_CTRL_BTRX 0x0008 /* BT Uart Rx detect */ - -#define PCM990_CTRL_REG9 0x0010 /* AC97 Flash REGISTER */ -#define PCM990_CTRL_FLWP 0x0001 /* pC Flash Write Protect */ -#define PCM990_CTRL_FLDIS 0x0002 /* pC Flash Disable */ -#define PCM990_CTRL_AC97ENA 0x0004 /* Enable AC97 Expansion */ - -#define PCM990_CTRL_REG10 0x0012 /* GPS-REGISTER */ -#define PCM990_CTRL_GPSPWR 0x0004 /* GPS-Modul Power on */ -#define PCM990_CTRL_GPSENA 0x0008 /* GPS-Modul Enable */ - -#define PCM990_CTRL_REG11 0x0014 /* Accu REGISTER */ -#define PCM990_CTRL_ACENA 0x0001 /* Charge Enable */ -#define PCM990_CTRL_ACSEL 0x0002 /* Charge Akku -> DC Enable */ -#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */ -#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */ - -#define PCM990_CTRL_P2V(x) ((x) - PCM990_CTRL_PHYS + PCM990_CTRL_BASE) -#define PCM990_CTRL_V2P(x) ((x) - PCM990_CTRL_BASE + PCM990_CTRL_PHYS) - -#ifndef __ASSEMBLY__ -# define __PCM990_CTRL_REG(x) \ - (*((volatile unsigned char *)PCM990_CTRL_P2V(x))) -#else -# define __PCM990_CTRL_REG(x) PCM990_CTRL_P2V(x) -#endif - -#define PCM990_INTMSKENA __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7) -#define PCM990_INTSETCLR __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6) -#define PCM990_CTRL0 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG0) -#define PCM990_CTRL1 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG1) -#define PCM990_CTRL2 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG2) -#define PCM990_CTRL3 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) -#define PCM990_CTRL4 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG4) -#define PCM990_CTRL5 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) -#define PCM990_CTRL6 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6) -#define PCM990_CTRL7 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7) -#define PCM990_CTRL8 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG8) -#define PCM990_CTRL9 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG9) -#define PCM990_CTRL10 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG10) -#define PCM990_CTRL11 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG11) - - -/* - * IDE - */ -#define PCM990_IDE_IRQ_GPIO 13 -#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) -#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING -#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ -#define PCM990_IDE_PLD_BASE 0xee000000 -#define PCM990_IDE_PLD_SIZE (1*1024*1024) - -/* visible CPLD (U6) registers */ -#define PCM990_IDE_PLD_REG0 0x1000 /* OFFSET IDE REGISTER 0 */ -#define PCM990_IDE_PM5V 0x0004 /* R System VCC_5V */ -#define PCM990_IDE_STBY 0x0008 /* R System StandBy */ - -#define PCM990_IDE_PLD_REG1 0x1002 /* OFFSET IDE REGISTER 1 */ -#define PCM990_IDE_IDEMODE 0x0001 /* R TrueIDE Mode */ -#define PCM990_IDE_DMAENA 0x0004 /* RW DMA Enable */ -#define PCM990_IDE_DMA1_0 0x0008 /* RW 1=DREQ1 0=DREQ0 */ - -#define PCM990_IDE_PLD_REG2 0x1004 /* OFFSET IDE REGISTER 2 */ -#define PCM990_IDE_RESENA 0x0001 /* RW IDE Reset Bit enable */ -#define PCM990_IDE_RES 0x0002 /* RW IDE Reset Bit */ -#define PCM990_IDE_RDY 0x0008 /* RDY */ - -#define PCM990_IDE_PLD_REG3 0x1006 /* OFFSET IDE REGISTER 3 */ -#define PCM990_IDE_IDEOE 0x0001 /* RW Latch on Databus */ -#define PCM990_IDE_IDEON 0x0002 /* RW Latch on Control Address */ -#define PCM990_IDE_IDEIN 0x0004 /* RW Latch on Interrupt usw. */ - -#define PCM990_IDE_PLD_REG4 0x1008 /* OFFSET IDE REGISTER 4 */ -#define PCM990_IDE_PWRENA 0x0001 /* RW IDE Power enable */ -#define PCM990_IDE_5V 0x0002 /* R IDE Power 5V */ -#define PCM990_IDE_PWG 0x0008 /* R IDE Power is on */ - -#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE) -#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS) - -#ifndef __ASSEMBLY__ -# define __PCM990_IDE_PLD_REG(x) \ - (*((volatile unsigned char *)PCM990_IDE_PLD_P2V(x))) -#else -# define __PCM990_IDE_PLD_REG(x) PCM990_IDE_PLD_P2V(x) -#endif - -#define PCM990_IDE0 \ - __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG0) -#define PCM990_IDE1 \ - __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG1) -#define PCM990_IDE2 \ - __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG2) -#define PCM990_IDE3 \ - __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG3) -#define PCM990_IDE4 \ - __PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG4) - -/* - * Compact Flash - */ -#define PCM990_CF_IRQ_GPIO 11 -#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) -#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -#define PCM990_CF_CD_GPIO 12 -#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) -#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING - -#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ -#define PCM990_CF_PLD_BASE 0xef000000 -#define PCM990_CF_PLD_SIZE (1*1024*1024) -#define PCM990_CF_PLD_P2V(x) ((x) - PCM990_CF_PLD_PHYS + PCM990_CF_PLD_BASE) -#define PCM990_CF_PLD_V2P(x) ((x) - PCM990_CF_PLD_BASE + PCM990_CF_PLD_PHYS) - -/* visible CPLD (U6) registers */ -#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */ -#define PCM990_CF_REG0_LED 0x0001 /* RW LED on */ -#define PCM990_CF_REG0_BLK 0x0002 /* RW LED flash when access */ -#define PCM990_CF_REG0_PM5V 0x0004 /* R System VCC_5V enable */ -#define PCM990_CF_REG0_STBY 0x0008 /* R System StandBy */ - -#define PCM990_CF_PLD_REG1 0x1002 /* OFFSET CF REGISTER 1 */ -#define PCM990_CF_REG1_IDEMODE 0x0001 /* RW CF card run as TrueIDE */ -#define PCM990_CF_REG1_CF0 0x0002 /* RW CF card at ADDR 0x28000000 */ - -#define PCM990_CF_PLD_REG2 0x1004 /* OFFSET CF REGISTER 2 */ -#define PCM990_CF_REG2_RES 0x0002 /* RW CF RESET BIT */ -#define PCM990_CF_REG2_RDYENA 0x0004 /* RW Enable CF_RDY */ -#define PCM990_CF_REG2_RDY 0x0008 /* R CF_RDY auf PWAIT */ - -#define PCM990_CF_PLD_REG3 0x1006 /* OFFSET CF REGISTER 3 */ -#define PCM990_CF_REG3_CFOE 0x0001 /* RW Latch on Databus */ -#define PCM990_CF_REG3_CFON 0x0002 /* RW Latch on Control Address */ -#define PCM990_CF_REG3_CFIN 0x0004 /* RW Latch on Interrupt usw. */ -#define PCM990_CF_REG3_CFCD 0x0008 /* RW Latch on CD1/2 VS1/2 usw */ - -#define PCM990_CF_PLD_REG4 0x1008 /* OFFSET CF REGISTER 4 */ -#define PCM990_CF_REG4_PWRENA 0x0001 /* RW CF Power on (CD1/2 = "00") */ -#define PCM990_CF_REG4_5_3V 0x0002 /* RW 1 = 5V CF_VCC 0 = 3 V CF_VCC */ -#define PCM990_CF_REG4_3B 0x0004 /* RW 3.0V Backup from VCC (5_3V=0) */ -#define PCM990_CF_REG4_PWG 0x0008 /* R CF-Power is on */ - -#define PCM990_CF_PLD_REG5 0x100A /* OFFSET CF REGISTER 5 */ -#define PCM990_CF_REG5_BVD1 0x0001 /* R CF /BVD1 */ -#define PCM990_CF_REG5_BVD2 0x0002 /* R CF /BVD2 */ -#define PCM990_CF_REG5_VS1 0x0004 /* R CF /VS1 */ -#define PCM990_CF_REG5_VS2 0x0008 /* R CF /VS2 */ - -#define PCM990_CF_PLD_REG6 0x100C /* OFFSET CF REGISTER 6 */ -#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */ -#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */ - -#ifndef __ASSEMBLY__ -# define __PCM990_CF_PLD_REG(x) \ - (*((volatile unsigned char *)PCM990_CF_PLD_P2V(x))) -#else -# define __PCM990_CF_PLD_REG(x) PCM990_CF_PLD_P2V(x) -#endif - -#define PCM990_CF0 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG0) -#define PCM990_CF1 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG1) -#define PCM990_CF2 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG2) -#define PCM990_CF3 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG3) -#define PCM990_CF4 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG4) -#define PCM990_CF5 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG5) -#define PCM990_CF6 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG6) - -/* - * Wolfson AC97 Touch - */ -#define PCM990_AC97_IRQ_GPIO 10 -#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) -#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING - -/* - * MMC phyCORE - */ -#define PCM990_MMC0_IRQ_GPIO 9 -#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) -#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING - -/* - * USB phyCore - */ -#define PCM990_USB_OVERCURRENT (88 | GPIO_ALT_FN_1_IN) -#define PCM990_USB_PWR_EN (89 | GPIO_ALT_FN_2_OUT) diff --git a/include/asm-arm/arch-pxa/pm.h b/include/asm-arm/arch-pxa/pm.h deleted file mode 100644 index 261e5bc..0000000 --- a/include/asm-arm/arch-pxa/pm.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * Copyright (c) 2005 Richard Purdie - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include - -struct pxa_cpu_pm_fns { - int save_count; - void (*save)(unsigned long *); - void (*restore)(unsigned long *); - int (*valid)(suspend_state_t state); - void (*enter)(suspend_state_t state); -}; - -extern struct pxa_cpu_pm_fns *pxa_cpu_pm_fns; - -/* sleep.S */ -extern void pxa25x_cpu_suspend(unsigned int); -extern void pxa27x_cpu_suspend(unsigned int); -extern void pxa_cpu_resume(void); - -extern int pxa_pm_enter(suspend_state_t state); diff --git a/include/asm-arm/arch-pxa/poodle.h b/include/asm-arm/arch-pxa/poodle.h deleted file mode 100644 index 4d6a403..0000000 --- a/include/asm-arm/arch-pxa/poodle.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/poodle.h - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * Based on: - * linux/include/asm-arm/arch-sa1100/collie.h - * - * ChangeLog: - * 04-06-2001 Lineo Japan, Inc. - * 04-16-2001 SHARP Corporation - * Update to 2.6 John Lenz - */ -#ifndef __ASM_ARCH_POODLE_H -#define __ASM_ARCH_POODLE_H 1 - -/* - * GPIOs - */ -/* PXA GPIOs */ -#define POODLE_GPIO_ON_KEY (0) -#define POODLE_GPIO_AC_IN (1) -#define POODLE_GPIO_CO 16 -#define POODLE_GPIO_TP_INT (5) -#define POODLE_GPIO_WAKEUP (11) /* change battery */ -#define POODLE_GPIO_GA_INT (10) -#define POODLE_GPIO_IR_ON (22) -#define POODLE_GPIO_HP_IN (4) -#define POODLE_GPIO_CF_IRQ (17) -#define POODLE_GPIO_CF_CD (14) -#define POODLE_GPIO_CF_STSCHG (14) -#define POODLE_GPIO_SD_PWR (33) -#define POODLE_GPIO_SD_PWR1 (3) -#define POODLE_GPIO_nSD_CLK (6) -#define POODLE_GPIO_nSD_WP (7) -#define POODLE_GPIO_nSD_INT (8) -#define POODLE_GPIO_nSD_DETECT (9) -#define POODLE_GPIO_MAIN_BAT_LOW (13) -#define POODLE_GPIO_BAT_COVER (13) -#define POODLE_GPIO_USB_PULLUP (20) -#define POODLE_GPIO_ADC_TEMP_ON (21) -#define POODLE_GPIO_BYPASS_ON (36) -#define POODLE_GPIO_CHRG_ON (38) -#define POODLE_GPIO_CHRG_FULL (16) -#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ - -/* PXA GPIOs */ -#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) -#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) -#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) -#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) -#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) -#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) -#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) -#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) -#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) -#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) -#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) -#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) - -/* SCOOP GPIOs */ -#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 -#define POODLE_SCOOP_CP401 SCOOP_GPCR_PA13 -#define POODLE_SCOOP_VPEN SCOOP_GPCR_PA18 -#define POODLE_SCOOP_L_PCLK SCOOP_GPCR_PA20 -#define POODLE_SCOOP_L_LCLK SCOOP_GPCR_PA21 -#define POODLE_SCOOP_HS_OUT SCOOP_GPCR_PA22 - -#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) -#define POODLE_SCOOP_IO_OUT ( 0 ) - -extern struct platform_device poodle_locomo_device; - -#endif /* __ASM_ARCH_POODLE_H */ diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h deleted file mode 100644 index dce9308..0000000 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ /dev/null @@ -1,1070 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa-regs.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __PXA_REGS_H -#define __PXA_REGS_H - - -/* - * PXA Chip selects - */ - -#define PXA_CS0_PHYS 0x00000000 -#define PXA_CS1_PHYS 0x04000000 -#define PXA_CS2_PHYS 0x08000000 -#define PXA_CS3_PHYS 0x0C000000 -#define PXA_CS4_PHYS 0x10000000 -#define PXA_CS5_PHYS 0x14000000 - - -/* - * Personal Computer Memory Card International Association (PCMCIA) sockets - */ - -#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ -#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ -#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ -#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ -#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ - -#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ -#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ -#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ -#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ - -#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ -#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ -#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ -#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ - -#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) -#define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ -#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) -#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) - -#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ -#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ -#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ -#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ - -#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ -#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ -#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ -#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ - - - -/* - * DMA Controller - */ - -#define DCSR0 __REG(0x40000000) /* DMA Control / Status Register for Channel 0 */ -#define DCSR1 __REG(0x40000004) /* DMA Control / Status Register for Channel 1 */ -#define DCSR2 __REG(0x40000008) /* DMA Control / Status Register for Channel 2 */ -#define DCSR3 __REG(0x4000000c) /* DMA Control / Status Register for Channel 3 */ -#define DCSR4 __REG(0x40000010) /* DMA Control / Status Register for Channel 4 */ -#define DCSR5 __REG(0x40000014) /* DMA Control / Status Register for Channel 5 */ -#define DCSR6 __REG(0x40000018) /* DMA Control / Status Register for Channel 6 */ -#define DCSR7 __REG(0x4000001c) /* DMA Control / Status Register for Channel 7 */ -#define DCSR8 __REG(0x40000020) /* DMA Control / Status Register for Channel 8 */ -#define DCSR9 __REG(0x40000024) /* DMA Control / Status Register for Channel 9 */ -#define DCSR10 __REG(0x40000028) /* DMA Control / Status Register for Channel 10 */ -#define DCSR11 __REG(0x4000002c) /* DMA Control / Status Register for Channel 11 */ -#define DCSR12 __REG(0x40000030) /* DMA Control / Status Register for Channel 12 */ -#define DCSR13 __REG(0x40000034) /* DMA Control / Status Register for Channel 13 */ -#define DCSR14 __REG(0x40000038) /* DMA Control / Status Register for Channel 14 */ -#define DCSR15 __REG(0x4000003c) /* DMA Control / Status Register for Channel 15 */ - -#define DCSR(x) __REG2(0x40000000, (x) << 2) - -#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */ -#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */ -#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */ -#ifdef CONFIG_PXA27x -#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */ -#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */ -#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */ -#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */ -#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */ -#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */ -#define DCSR_EORINTR (1 << 9) /* The end of Receive */ -#endif -#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */ -#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */ -#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */ -#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */ -#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */ - -#define DALGN __REG(0x400000a0) /* DMA Alignment Register */ -#define DINT __REG(0x400000f0) /* DMA Interrupt Register */ - -#define DRCMR(n) (*(((n) < 64) ? \ - &__REG2(0x40000100, ((n) & 0x3f) << 2) : \ - &__REG2(0x40001100, ((n) & 0x3f) << 2))) - -#define DRCMR0 __REG(0x40000100) /* Request to Channel Map Register for DREQ 0 */ -#define DRCMR1 __REG(0x40000104) /* Request to Channel Map Register for DREQ 1 */ -#define DRCMR2 __REG(0x40000108) /* Request to Channel Map Register for I2S receive Request */ -#define DRCMR3 __REG(0x4000010c) /* Request to Channel Map Register for I2S transmit Request */ -#define DRCMR4 __REG(0x40000110) /* Request to Channel Map Register for BTUART receive Request */ -#define DRCMR5 __REG(0x40000114) /* Request to Channel Map Register for BTUART transmit Request. */ -#define DRCMR6 __REG(0x40000118) /* Request to Channel Map Register for FFUART receive Request */ -#define DRCMR7 __REG(0x4000011c) /* Request to Channel Map Register for FFUART transmit Request */ -#define DRCMR8 __REG(0x40000120) /* Request to Channel Map Register for AC97 microphone Request */ -#define DRCMR9 __REG(0x40000124) /* Request to Channel Map Register for AC97 modem receive Request */ -#define DRCMR10 __REG(0x40000128) /* Request to Channel Map Register for AC97 modem transmit Request */ -#define DRCMR11 __REG(0x4000012c) /* Request to Channel Map Register for AC97 audio receive Request */ -#define DRCMR12 __REG(0x40000130) /* Request to Channel Map Register for AC97 audio transmit Request */ -#define DRCMR13 __REG(0x40000134) /* Request to Channel Map Register for SSP receive Request */ -#define DRCMR14 __REG(0x40000138) /* Request to Channel Map Register for SSP transmit Request */ -#define DRCMR15 __REG(0x4000013c) /* Request to Channel Map Register for SSP2 receive Request */ -#define DRCMR16 __REG(0x40000140) /* Request to Channel Map Register for SSP2 transmit Request */ -#define DRCMR17 __REG(0x40000144) /* Request to Channel Map Register for ICP receive Request */ -#define DRCMR18 __REG(0x40000148) /* Request to Channel Map Register for ICP transmit Request */ -#define DRCMR19 __REG(0x4000014c) /* Request to Channel Map Register for STUART receive Request */ -#define DRCMR20 __REG(0x40000150) /* Request to Channel Map Register for STUART transmit Request */ -#define DRCMR21 __REG(0x40000154) /* Request to Channel Map Register for MMC receive Request */ -#define DRCMR22 __REG(0x40000158) /* Request to Channel Map Register for MMC transmit Request */ -#define DRCMR23 __REG(0x4000015c) /* Reserved */ -#define DRCMR24 __REG(0x40000160) /* Reserved */ -#define DRCMR25 __REG(0x40000164) /* Request to Channel Map Register for USB endpoint 1 Request */ -#define DRCMR26 __REG(0x40000168) /* Request to Channel Map Register for USB endpoint 2 Request */ -#define DRCMR27 __REG(0x4000016C) /* Request to Channel Map Register for USB endpoint 3 Request */ -#define DRCMR28 __REG(0x40000170) /* Request to Channel Map Register for USB endpoint 4 Request */ -#define DRCMR29 __REG(0x40000174) /* Reserved */ -#define DRCMR30 __REG(0x40000178) /* Request to Channel Map Register for USB endpoint 6 Request */ -#define DRCMR31 __REG(0x4000017C) /* Request to Channel Map Register for USB endpoint 7 Request */ -#define DRCMR32 __REG(0x40000180) /* Request to Channel Map Register for USB endpoint 8 Request */ -#define DRCMR33 __REG(0x40000184) /* Request to Channel Map Register for USB endpoint 9 Request */ -#define DRCMR34 __REG(0x40000188) /* Reserved */ -#define DRCMR35 __REG(0x4000018C) /* Request to Channel Map Register for USB endpoint 11 Request */ -#define DRCMR36 __REG(0x40000190) /* Request to Channel Map Register for USB endpoint 12 Request */ -#define DRCMR37 __REG(0x40000194) /* Request to Channel Map Register for USB endpoint 13 Request */ -#define DRCMR38 __REG(0x40000198) /* Request to Channel Map Register for USB endpoint 14 Request */ -#define DRCMR39 __REG(0x4000019C) /* Reserved */ -#define DRCMR66 __REG(0x40001108) /* Request to Channel Map Register for SSP3 receive Request */ -#define DRCMR67 __REG(0x4000110C) /* Request to Channel Map Register for SSP3 transmit Request */ -#define DRCMR68 __REG(0x40001110) /* Request to Channel Map Register for Camera FIFO 0 Request */ -#define DRCMR69 __REG(0x40001114) /* Request to Channel Map Register for Camera FIFO 1 Request */ -#define DRCMR70 __REG(0x40001118) /* Request to Channel Map Register for Camera FIFO 2 Request */ - -#define DRCMRRXSADR DRCMR2 -#define DRCMRTXSADR DRCMR3 -#define DRCMRRXBTRBR DRCMR4 -#define DRCMRTXBTTHR DRCMR5 -#define DRCMRRXFFRBR DRCMR6 -#define DRCMRTXFFTHR DRCMR7 -#define DRCMRRXMCDR DRCMR8 -#define DRCMRRXMODR DRCMR9 -#define DRCMRTXMODR DRCMR10 -#define DRCMRRXPCDR DRCMR11 -#define DRCMRTXPCDR DRCMR12 -#define DRCMRRXSSDR DRCMR13 -#define DRCMRTXSSDR DRCMR14 -#define DRCMRRXSS2DR DRCMR15 -#define DRCMRTXSS2DR DRCMR16 -#define DRCMRRXICDR DRCMR17 -#define DRCMRTXICDR DRCMR18 -#define DRCMRRXSTRBR DRCMR19 -#define DRCMRTXSTTHR DRCMR20 -#define DRCMRRXMMC DRCMR21 -#define DRCMRTXMMC DRCMR22 -#define DRCMRRXSS3DR DRCMR66 -#define DRCMRTXSS3DR DRCMR67 -#define DRCMRUDC(x) DRCMR((x) + 24) - -#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */ -#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */ - -#define DDADR0 __REG(0x40000200) /* DMA Descriptor Address Register Channel 0 */ -#define DSADR0 __REG(0x40000204) /* DMA Source Address Register Channel 0 */ -#define DTADR0 __REG(0x40000208) /* DMA Target Address Register Channel 0 */ -#define DCMD0 __REG(0x4000020c) /* DMA Command Address Register Channel 0 */ -#define DDADR1 __REG(0x40000210) /* DMA Descriptor Address Register Channel 1 */ -#define DSADR1 __REG(0x40000214) /* DMA Source Address Register Channel 1 */ -#define DTADR1 __REG(0x40000218) /* DMA Target Address Register Channel 1 */ -#define DCMD1 __REG(0x4000021c) /* DMA Command Address Register Channel 1 */ -#define DDADR2 __REG(0x40000220) /* DMA Descriptor Address Register Channel 2 */ -#define DSADR2 __REG(0x40000224) /* DMA Source Address Register Channel 2 */ -#define DTADR2 __REG(0x40000228) /* DMA Target Address Register Channel 2 */ -#define DCMD2 __REG(0x4000022c) /* DMA Command Address Register Channel 2 */ -#define DDADR3 __REG(0x40000230) /* DMA Descriptor Address Register Channel 3 */ -#define DSADR3 __REG(0x40000234) /* DMA Source Address Register Channel 3 */ -#define DTADR3 __REG(0x40000238) /* DMA Target Address Register Channel 3 */ -#define DCMD3 __REG(0x4000023c) /* DMA Command Address Register Channel 3 */ -#define DDADR4 __REG(0x40000240) /* DMA Descriptor Address Register Channel 4 */ -#define DSADR4 __REG(0x40000244) /* DMA Source Address Register Channel 4 */ -#define DTADR4 __REG(0x40000248) /* DMA Target Address Register Channel 4 */ -#define DCMD4 __REG(0x4000024c) /* DMA Command Address Register Channel 4 */ -#define DDADR5 __REG(0x40000250) /* DMA Descriptor Address Register Channel 5 */ -#define DSADR5 __REG(0x40000254) /* DMA Source Address Register Channel 5 */ -#define DTADR5 __REG(0x40000258) /* DMA Target Address Register Channel 5 */ -#define DCMD5 __REG(0x4000025c) /* DMA Command Address Register Channel 5 */ -#define DDADR6 __REG(0x40000260) /* DMA Descriptor Address Register Channel 6 */ -#define DSADR6 __REG(0x40000264) /* DMA Source Address Register Channel 6 */ -#define DTADR6 __REG(0x40000268) /* DMA Target Address Register Channel 6 */ -#define DCMD6 __REG(0x4000026c) /* DMA Command Address Register Channel 6 */ -#define DDADR7 __REG(0x40000270) /* DMA Descriptor Address Register Channel 7 */ -#define DSADR7 __REG(0x40000274) /* DMA Source Address Register Channel 7 */ -#define DTADR7 __REG(0x40000278) /* DMA Target Address Register Channel 7 */ -#define DCMD7 __REG(0x4000027c) /* DMA Command Address Register Channel 7 */ -#define DDADR8 __REG(0x40000280) /* DMA Descriptor Address Register Channel 8 */ -#define DSADR8 __REG(0x40000284) /* DMA Source Address Register Channel 8 */ -#define DTADR8 __REG(0x40000288) /* DMA Target Address Register Channel 8 */ -#define DCMD8 __REG(0x4000028c) /* DMA Command Address Register Channel 8 */ -#define DDADR9 __REG(0x40000290) /* DMA Descriptor Address Register Channel 9 */ -#define DSADR9 __REG(0x40000294) /* DMA Source Address Register Channel 9 */ -#define DTADR9 __REG(0x40000298) /* DMA Target Address Register Channel 9 */ -#define DCMD9 __REG(0x4000029c) /* DMA Command Address Register Channel 9 */ -#define DDADR10 __REG(0x400002a0) /* DMA Descriptor Address Register Channel 10 */ -#define DSADR10 __REG(0x400002a4) /* DMA Source Address Register Channel 10 */ -#define DTADR10 __REG(0x400002a8) /* DMA Target Address Register Channel 10 */ -#define DCMD10 __REG(0x400002ac) /* DMA Command Address Register Channel 10 */ -#define DDADR11 __REG(0x400002b0) /* DMA Descriptor Address Register Channel 11 */ -#define DSADR11 __REG(0x400002b4) /* DMA Source Address Register Channel 11 */ -#define DTADR11 __REG(0x400002b8) /* DMA Target Address Register Channel 11 */ -#define DCMD11 __REG(0x400002bc) /* DMA Command Address Register Channel 11 */ -#define DDADR12 __REG(0x400002c0) /* DMA Descriptor Address Register Channel 12 */ -#define DSADR12 __REG(0x400002c4) /* DMA Source Address Register Channel 12 */ -#define DTADR12 __REG(0x400002c8) /* DMA Target Address Register Channel 12 */ -#define DCMD12 __REG(0x400002cc) /* DMA Command Address Register Channel 12 */ -#define DDADR13 __REG(0x400002d0) /* DMA Descriptor Address Register Channel 13 */ -#define DSADR13 __REG(0x400002d4) /* DMA Source Address Register Channel 13 */ -#define DTADR13 __REG(0x400002d8) /* DMA Target Address Register Channel 13 */ -#define DCMD13 __REG(0x400002dc) /* DMA Command Address Register Channel 13 */ -#define DDADR14 __REG(0x400002e0) /* DMA Descriptor Address Register Channel 14 */ -#define DSADR14 __REG(0x400002e4) /* DMA Source Address Register Channel 14 */ -#define DTADR14 __REG(0x400002e8) /* DMA Target Address Register Channel 14 */ -#define DCMD14 __REG(0x400002ec) /* DMA Command Address Register Channel 14 */ -#define DDADR15 __REG(0x400002f0) /* DMA Descriptor Address Register Channel 15 */ -#define DSADR15 __REG(0x400002f4) /* DMA Source Address Register Channel 15 */ -#define DTADR15 __REG(0x400002f8) /* DMA Target Address Register Channel 15 */ -#define DCMD15 __REG(0x400002fc) /* DMA Command Address Register Channel 15 */ - -#define DDADR(x) __REG2(0x40000200, (x) << 4) -#define DSADR(x) __REG2(0x40000204, (x) << 4) -#define DTADR(x) __REG2(0x40000208, (x) << 4) -#define DCMD(x) __REG2(0x4000020c, (x) << 4) - -#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */ -#define DDADR_STOP (1 << 0) /* Stop (read / write) */ - -#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */ -#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */ -#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */ -#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */ -#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */ -#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */ -#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */ -#define DCMD_BURST8 (1 << 16) /* 8 byte burst */ -#define DCMD_BURST16 (2 << 16) /* 16 byte burst */ -#define DCMD_BURST32 (3 << 16) /* 32 byte burst */ -#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */ -#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */ -#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */ -#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ - - -/* - * UARTs - */ - -/* Full Function UART (FFUART) */ -#define FFUART FFRBR -#define FFRBR __REG(0x40100000) /* Receive Buffer Register (read only) */ -#define FFTHR __REG(0x40100000) /* Transmit Holding Register (write only) */ -#define FFIER __REG(0x40100004) /* Interrupt Enable Register (read/write) */ -#define FFIIR __REG(0x40100008) /* Interrupt ID Register (read only) */ -#define FFFCR __REG(0x40100008) /* FIFO Control Register (write only) */ -#define FFLCR __REG(0x4010000C) /* Line Control Register (read/write) */ -#define FFMCR __REG(0x40100010) /* Modem Control Register (read/write) */ -#define FFLSR __REG(0x40100014) /* Line Status Register (read only) */ -#define FFMSR __REG(0x40100018) /* Modem Status Register (read only) */ -#define FFSPR __REG(0x4010001C) /* Scratch Pad Register (read/write) */ -#define FFISR __REG(0x40100020) /* Infrared Selection Register (read/write) */ -#define FFDLL __REG(0x40100000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define FFDLH __REG(0x40100004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Bluetooth UART (BTUART) */ -#define BTUART BTRBR -#define BTRBR __REG(0x40200000) /* Receive Buffer Register (read only) */ -#define BTTHR __REG(0x40200000) /* Transmit Holding Register (write only) */ -#define BTIER __REG(0x40200004) /* Interrupt Enable Register (read/write) */ -#define BTIIR __REG(0x40200008) /* Interrupt ID Register (read only) */ -#define BTFCR __REG(0x40200008) /* FIFO Control Register (write only) */ -#define BTLCR __REG(0x4020000C) /* Line Control Register (read/write) */ -#define BTMCR __REG(0x40200010) /* Modem Control Register (read/write) */ -#define BTLSR __REG(0x40200014) /* Line Status Register (read only) */ -#define BTMSR __REG(0x40200018) /* Modem Status Register (read only) */ -#define BTSPR __REG(0x4020001C) /* Scratch Pad Register (read/write) */ -#define BTISR __REG(0x40200020) /* Infrared Selection Register (read/write) */ -#define BTDLL __REG(0x40200000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define BTDLH __REG(0x40200004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Standard UART (STUART) */ -#define STUART STRBR -#define STRBR __REG(0x40700000) /* Receive Buffer Register (read only) */ -#define STTHR __REG(0x40700000) /* Transmit Holding Register (write only) */ -#define STIER __REG(0x40700004) /* Interrupt Enable Register (read/write) */ -#define STIIR __REG(0x40700008) /* Interrupt ID Register (read only) */ -#define STFCR __REG(0x40700008) /* FIFO Control Register (write only) */ -#define STLCR __REG(0x4070000C) /* Line Control Register (read/write) */ -#define STMCR __REG(0x40700010) /* Modem Control Register (read/write) */ -#define STLSR __REG(0x40700014) /* Line Status Register (read only) */ -#define STMSR __REG(0x40700018) /* Reserved */ -#define STSPR __REG(0x4070001C) /* Scratch Pad Register (read/write) */ -#define STISR __REG(0x40700020) /* Infrared Selection Register (read/write) */ -#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -/* Hardware UART (HWUART) */ -#define HWUART HWRBR -#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */ -#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */ -#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */ -#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */ -#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */ -#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */ -#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */ -#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */ -#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */ -#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */ -#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */ -#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */ -#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */ -#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */ -#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */ -#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */ - -#define IER_DMAE (1 << 7) /* DMA Requests Enable */ -#define IER_UUE (1 << 6) /* UART Unit Enable */ -#define IER_NRZE (1 << 5) /* NRZ coding Enable */ -#define IER_RTIOE (1 << 4) /* Receiver Time Out Interrupt Enable */ -#define IER_MIE (1 << 3) /* Modem Interrupt Enable */ -#define IER_RLSE (1 << 2) /* Receiver Line Status Interrupt Enable */ -#define IER_TIE (1 << 1) /* Transmit Data request Interrupt Enable */ -#define IER_RAVIE (1 << 0) /* Receiver Data Available Interrupt Enable */ - -#define IIR_FIFOES1 (1 << 7) /* FIFO Mode Enable Status */ -#define IIR_FIFOES0 (1 << 6) /* FIFO Mode Enable Status */ -#define IIR_TOD (1 << 3) /* Time Out Detected */ -#define IIR_IID2 (1 << 2) /* Interrupt Source Encoded */ -#define IIR_IID1 (1 << 1) /* Interrupt Source Encoded */ -#define IIR_IP (1 << 0) /* Interrupt Pending (active low) */ - -#define FCR_ITL2 (1 << 7) /* Interrupt Trigger Level */ -#define FCR_ITL1 (1 << 6) /* Interrupt Trigger Level */ -#define FCR_RESETTF (1 << 2) /* Reset Transmitter FIFO */ -#define FCR_RESETRF (1 << 1) /* Reset Receiver FIFO */ -#define FCR_TRFIFOE (1 << 0) /* Transmit and Receive FIFO Enable */ -#define FCR_ITL_1 (0) -#define FCR_ITL_8 (FCR_ITL1) -#define FCR_ITL_16 (FCR_ITL2) -#define FCR_ITL_32 (FCR_ITL2|FCR_ITL1) - -#define LCR_DLAB (1 << 7) /* Divisor Latch Access Bit */ -#define LCR_SB (1 << 6) /* Set Break */ -#define LCR_STKYP (1 << 5) /* Sticky Parity */ -#define LCR_EPS (1 << 4) /* Even Parity Select */ -#define LCR_PEN (1 << 3) /* Parity Enable */ -#define LCR_STB (1 << 2) /* Stop Bit */ -#define LCR_WLS1 (1 << 1) /* Word Length Select */ -#define LCR_WLS0 (1 << 0) /* Word Length Select */ - -#define LSR_FIFOE (1 << 7) /* FIFO Error Status */ -#define LSR_TEMT (1 << 6) /* Transmitter Empty */ -#define LSR_TDRQ (1 << 5) /* Transmit Data Request */ -#define LSR_BI (1 << 4) /* Break Interrupt */ -#define LSR_FE (1 << 3) /* Framing Error */ -#define LSR_PE (1 << 2) /* Parity Error */ -#define LSR_OE (1 << 1) /* Overrun Error */ -#define LSR_DR (1 << 0) /* Data Ready */ - -#define MCR_LOOP (1 << 4) -#define MCR_OUT2 (1 << 3) /* force MSR_DCD in loopback mode */ -#define MCR_OUT1 (1 << 2) /* force MSR_RI in loopback mode */ -#define MCR_RTS (1 << 1) /* Request to Send */ -#define MCR_DTR (1 << 0) /* Data Terminal Ready */ - -#define MSR_DCD (1 << 7) /* Data Carrier Detect */ -#define MSR_RI (1 << 6) /* Ring Indicator */ -#define MSR_DSR (1 << 5) /* Data Set Ready */ -#define MSR_CTS (1 << 4) /* Clear To Send */ -#define MSR_DDCD (1 << 3) /* Delta Data Carrier Detect */ -#define MSR_TERI (1 << 2) /* Trailing Edge Ring Indicator */ -#define MSR_DDSR (1 << 1) /* Delta Data Set Ready */ -#define MSR_DCTS (1 << 0) /* Delta Clear To Send */ - -/* - * IrSR (Infrared Selection Register) - */ -#define STISR_RXPL (1 << 4) /* Receive Data Polarity */ -#define STISR_TXPL (1 << 3) /* Transmit Data Polarity */ -#define STISR_XMODE (1 << 2) /* Transmit Pulse Width Select */ -#define STISR_RCVEIR (1 << 1) /* Receiver SIR Enable */ -#define STISR_XMITIR (1 << 0) /* Transmitter SIR Enable */ - - -/* - * I2C registers - */ - -#define IBMR __REG(0x40301680) /* I2C Bus Monitor Register - IBMR */ -#define IDBR __REG(0x40301688) /* I2C Data Buffer Register - IDBR */ -#define ICR __REG(0x40301690) /* I2C Control Register - ICR */ -#define ISR __REG(0x40301698) /* I2C Status Register - ISR */ -#define ISAR __REG(0x403016A0) /* I2C Slave Address Register - ISAR */ - -#define PWRIBMR __REG(0x40f00180) /* Power I2C Bus Monitor Register-IBMR */ -#define PWRIDBR __REG(0x40f00188) /* Power I2C Data Buffer Register-IDBR */ -#define PWRICR __REG(0x40f00190) /* Power I2C Control Register - ICR */ -#define PWRISR __REG(0x40f00198) /* Power I2C Status Register - ISR */ -#define PWRISAR __REG(0x40f001A0) /*Power I2C Slave Address Register-ISAR */ - -#define ICR_START (1 << 0) /* start bit */ -#define ICR_STOP (1 << 1) /* stop bit */ -#define ICR_ACKNAK (1 << 2) /* send ACK(0) or NAK(1) */ -#define ICR_TB (1 << 3) /* transfer byte bit */ -#define ICR_MA (1 << 4) /* master abort */ -#define ICR_SCLE (1 << 5) /* master clock enable */ -#define ICR_IUE (1 << 6) /* unit enable */ -#define ICR_GCD (1 << 7) /* general call disable */ -#define ICR_ITEIE (1 << 8) /* enable tx interrupts */ -#define ICR_IRFIE (1 << 9) /* enable rx interrupts */ -#define ICR_BEIE (1 << 10) /* enable bus error ints */ -#define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */ -#define ICR_ALDIE (1 << 12) /* enable arbitration interrupt */ -#define ICR_SADIE (1 << 13) /* slave address detected int enable */ -#define ICR_UR (1 << 14) /* unit reset */ - -#define ISR_RWM (1 << 0) /* read/write mode */ -#define ISR_ACKNAK (1 << 1) /* ack/nak status */ -#define ISR_UB (1 << 2) /* unit busy */ -#define ISR_IBB (1 << 3) /* bus busy */ -#define ISR_SSD (1 << 4) /* slave stop detected */ -#define ISR_ALD (1 << 5) /* arbitration loss detected */ -#define ISR_ITE (1 << 6) /* tx buffer empty */ -#define ISR_IRF (1 << 7) /* rx buffer full */ -#define ISR_GCAD (1 << 8) /* general call address detected */ -#define ISR_SAD (1 << 9) /* slave address detected */ -#define ISR_BED (1 << 10) /* bus error no ACK/NAK */ - - -/* - * Serial Audio Controller - */ - -#define SACR0 __REG(0x40400000) /* Global Control Register */ -#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */ -#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */ -#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */ -#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */ -#define SADIV __REG(0x40400060) /* Audio Clock Divider Register. */ -#define SADR __REG(0x40400080) /* Serial Audio Data Register (TX and RX FIFO access Register). */ - -#define SACR0_RFTH(x) ((x) << 12) /* Rx FIFO Interrupt or DMA Trigger Threshold */ -#define SACR0_TFTH(x) ((x) << 8) /* Tx FIFO Interrupt or DMA Trigger Threshold */ -#define SACR0_STRF (1 << 5) /* FIFO Select for EFWR Special Function */ -#define SACR0_EFWR (1 << 4) /* Enable EFWR Function */ -#define SACR0_RST (1 << 3) /* FIFO, i2s Register Reset */ -#define SACR0_BCKD (1 << 2) /* Bit Clock Direction */ -#define SACR0_ENB (1 << 0) /* Enable I2S Link */ -#define SACR1_ENLBF (1 << 5) /* Enable Loopback */ -#define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ -#define SACR1_DREC (1 << 3) /* Disable Recording Function */ -#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ - -#define SASR0_I2SOFF (1 << 7) /* Controller Status */ -#define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ -#define SASR0_TUR (1 << 5) /* Tx FIFO Underrun */ -#define SASR0_RFS (1 << 4) /* Rx FIFO Service Request */ -#define SASR0_TFS (1 << 3) /* Tx FIFO Service Request */ -#define SASR0_BSY (1 << 2) /* I2S Busy */ -#define SASR0_RNE (1 << 1) /* Rx FIFO Not Empty */ -#define SASR0_TNF (1 << 0) /* Tx FIFO Not Empty */ - -#define SAICR_ROR (1 << 6) /* Clear Rx FIFO Overrun Interrupt */ -#define SAICR_TUR (1 << 5) /* Clear Tx FIFO Underrun Interrupt */ - -#define SAIMR_ROR (1 << 6) /* Enable Rx FIFO Overrun Condition Interrupt */ -#define SAIMR_TUR (1 << 5) /* Enable Tx FIFO Underrun Condition Interrupt */ -#define SAIMR_RFS (1 << 4) /* Enable Rx FIFO Service Interrupt */ -#define SAIMR_TFS (1 << 3) /* Enable Tx FIFO Service Interrupt */ - -/* - * AC97 Controller registers - */ - -#define POCR __REG(0x40500000) /* PCM Out Control Register */ -#define POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ -#define POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ - -#define PICR __REG(0x40500004) /* PCM In Control Register */ -#define PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ -#define PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ - -#define MCCR __REG(0x40500008) /* Mic In Control Register */ -#define MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ -#define MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ - -#define GCR __REG(0x4050000C) /* Global Control Register */ -#ifdef CONFIG_PXA3xx -#define GCR_CLKBPB (1 << 31) /* Internal clock enable */ -#endif -#define GCR_nDMAEN (1 << 24) /* non DMA Enable */ -#define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ -#define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ -#define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */ -#define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */ -#define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */ -#define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */ -#define GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */ -#define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */ -#define GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */ -#define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */ - -#define POSR __REG(0x40500010) /* PCM Out Status Register */ -#define POSR_FIFOE (1 << 4) /* FIFO error */ -#define POSR_FSR (1 << 2) /* FIFO Service Request */ - -#define PISR __REG(0x40500014) /* PCM In Status Register */ -#define PISR_FIFOE (1 << 4) /* FIFO error */ -#define PISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ -#define PISR_FSR (1 << 2) /* FIFO Service Request */ - -#define MCSR __REG(0x40500018) /* Mic In Status Register */ -#define MCSR_FIFOE (1 << 4) /* FIFO error */ -#define MCSR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ -#define MCSR_FSR (1 << 2) /* FIFO Service Request */ - -#define GSR __REG(0x4050001C) /* Global Status Register */ -#define GSR_CDONE (1 << 19) /* Command Done */ -#define GSR_SDONE (1 << 18) /* Status Done */ -#define GSR_RDCS (1 << 15) /* Read Completion Status */ -#define GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */ -#define GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */ -#define GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */ -#define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */ -#define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */ -#define GSR_SCR (1 << 9) /* Secondary Codec Ready */ -#define GSR_PCR (1 << 8) /* Primary Codec Ready */ -#define GSR_MCINT (1 << 7) /* Mic In Interrupt */ -#define GSR_POINT (1 << 6) /* PCM Out Interrupt */ -#define GSR_PIINT (1 << 5) /* PCM In Interrupt */ -#define GSR_ACOFFD (1 << 3) /* AC-link Shut Off Done */ -#define GSR_MOINT (1 << 2) /* Modem Out Interrupt */ -#define GSR_MIINT (1 << 1) /* Modem In Interrupt */ -#define GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */ - -#define CAR __REG(0x40500020) /* CODEC Access Register */ -#define CAR_CAIP (1 << 0) /* Codec Access In Progress */ - -#define PCDR __REG(0x40500040) /* PCM FIFO Data Register */ -#define MCDR __REG(0x40500060) /* Mic-in FIFO Data Register */ - -#define MOCR __REG(0x40500100) /* Modem Out Control Register */ -#define MOCR_FEIE (1 << 3) /* FIFO Error */ -#define MOCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ - -#define MICR __REG(0x40500108) /* Modem In Control Register */ -#define MICR_FEIE (1 << 3) /* FIFO Error */ -#define MICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ - -#define MOSR __REG(0x40500110) /* Modem Out Status Register */ -#define MOSR_FIFOE (1 << 4) /* FIFO error */ -#define MOSR_FSR (1 << 2) /* FIFO Service Request */ - -#define MISR __REG(0x40500118) /* Modem In Status Register */ -#define MISR_FIFOE (1 << 4) /* FIFO error */ -#define MISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ -#define MISR_FSR (1 << 2) /* FIFO Service Request */ - -#define MODR __REG(0x40500140) /* Modem FIFO Data Register */ - -#define PAC_REG_BASE __REG(0x40500200) /* Primary Audio Codec */ -#define SAC_REG_BASE __REG(0x40500300) /* Secondary Audio Codec */ -#define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */ -#define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */ - - -/* - * Fast Infrared Communication Port - */ - -#define FICP __REG(0x40800000) /* Start of FICP area */ -#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ -#define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */ -#define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */ -#define ICDR __REG(0x4080000c) /* ICP Data Register */ -#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */ -#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */ - -#define ICCR0_AME (1 << 7) /* Address match enable */ -#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */ -#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */ -#define ICCR0_RXE (1 << 4) /* Receive enable */ -#define ICCR0_TXE (1 << 3) /* Transmit enable */ -#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */ -#define ICCR0_LBM (1 << 1) /* Loopback mode */ -#define ICCR0_ITR (1 << 0) /* IrDA transmission */ - -#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ -#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ -#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ -#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ -#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ -#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ - -#ifdef CONFIG_PXA27x -#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ -#endif -#define ICSR0_FRE (1 << 5) /* Framing error */ -#define ICSR0_RFS (1 << 4) /* Receive FIFO service request */ -#define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */ -#define ICSR0_RAB (1 << 2) /* Receiver abort */ -#define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */ -#define ICSR0_EIF (1 << 0) /* End/Error in FIFO */ - -#define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */ -#define ICSR1_CRE (1 << 5) /* CRC error */ -#define ICSR1_EOF (1 << 4) /* End of frame */ -#define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */ -#define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */ -#define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */ -#define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */ - - -/* - * Real Time Clock - */ - -#define RCNR __REG(0x40900000) /* RTC Count Register */ -#define RTAR __REG(0x40900004) /* RTC Alarm Register */ -#define RTSR __REG(0x40900008) /* RTC Status Register */ -#define RTTR __REG(0x4090000C) /* RTC Timer Trim Register */ -#define PIAR __REG(0x40900038) /* Periodic Interrupt Alarm Register */ - -#define RTSR_PICE (1 << 15) /* Periodic interrupt count enable */ -#define RTSR_PIALE (1 << 14) /* Periodic interrupt Alarm enable */ -#define RTSR_HZE (1 << 3) /* HZ interrupt enable */ -#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */ -#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ -#define RTSR_AL (1 << 0) /* RTC alarm detected */ - - -/* - * OS Timer & Match Registers - */ - -#define OSMR0 __REG(0x40A00000) /* */ -#define OSMR1 __REG(0x40A00004) /* */ -#define OSMR2 __REG(0x40A00008) /* */ -#define OSMR3 __REG(0x40A0000C) /* */ -#define OSMR4 __REG(0x40A00080) /* */ -#define OSCR __REG(0x40A00010) /* OS Timer Counter Register */ -#define OSCR4 __REG(0x40A00040) /* OS Timer Counter Register */ -#define OMCR4 __REG(0x40A000C0) /* */ -#define OSSR __REG(0x40A00014) /* OS Timer Status Register */ -#define OWER __REG(0x40A00018) /* OS Timer Watchdog Enable Register */ -#define OIER __REG(0x40A0001C) /* OS Timer Interrupt Enable Register */ - -#define OSSR_M3 (1 << 3) /* Match status channel 3 */ -#define OSSR_M2 (1 << 2) /* Match status channel 2 */ -#define OSSR_M1 (1 << 1) /* Match status channel 1 */ -#define OSSR_M0 (1 << 0) /* Match status channel 0 */ - -#define OWER_WME (1 << 0) /* Watchdog Match Enable */ - -#define OIER_E3 (1 << 3) /* Interrupt enable channel 3 */ -#define OIER_E2 (1 << 2) /* Interrupt enable channel 2 */ -#define OIER_E1 (1 << 1) /* Interrupt enable channel 1 */ -#define OIER_E0 (1 << 0) /* Interrupt enable channel 0 */ - - -/* - * Pulse Width Modulator - */ - -#define PWM_CTRL0 __REG(0x40B00000) /* PWM 0 Control Register */ -#define PWM_PWDUTY0 __REG(0x40B00004) /* PWM 0 Duty Cycle Register */ -#define PWM_PERVAL0 __REG(0x40B00008) /* PWM 0 Period Control Register */ - -#define PWM_CTRL1 __REG(0x40C00000) /* PWM 1Control Register */ -#define PWM_PWDUTY1 __REG(0x40C00004) /* PWM 1 Duty Cycle Register */ -#define PWM_PERVAL1 __REG(0x40C00008) /* PWM 1 Period Control Register */ - - -/* - * Interrupt Controller - */ - -#define ICIP __REG(0x40D00000) /* Interrupt Controller IRQ Pending Register */ -#define ICMR __REG(0x40D00004) /* Interrupt Controller Mask Register */ -#define ICLR __REG(0x40D00008) /* Interrupt Controller Level Register */ -#define ICFP __REG(0x40D0000C) /* Interrupt Controller FIQ Pending Register */ -#define ICPR __REG(0x40D00010) /* Interrupt Controller Pending Register */ -#define ICCR __REG(0x40D00014) /* Interrupt Controller Control Register */ - -#define ICIP2 __REG(0x40D0009C) /* Interrupt Controller IRQ Pending Register 2 */ -#define ICMR2 __REG(0x40D000A0) /* Interrupt Controller Mask Register 2 */ -#define ICLR2 __REG(0x40D000A4) /* Interrupt Controller Level Register 2 */ -#define ICFP2 __REG(0x40D000A8) /* Interrupt Controller FIQ Pending Register 2 */ -#define ICPR2 __REG(0x40D000AC) /* Interrupt Controller Pending Register 2 */ - -/* - * General Purpose I/O - */ - -#define GPIO0_BASE ((void __iomem *)io_p2v(0x40E00000)) -#define GPIO1_BASE ((void __iomem *)io_p2v(0x40E00004)) -#define GPIO2_BASE ((void __iomem *)io_p2v(0x40E00008)) -#define GPIO3_BASE ((void __iomem *)io_p2v(0x40E00100)) - -#define GPLR_OFFSET 0x00 -#define GPDR_OFFSET 0x0C -#define GPSR_OFFSET 0x18 -#define GPCR_OFFSET 0x24 -#define GRER_OFFSET 0x30 -#define GFER_OFFSET 0x3C -#define GEDR_OFFSET 0x48 - -#define GPLR0 __REG(0x40E00000) /* GPIO Pin-Level Register GPIO<31:0> */ -#define GPLR1 __REG(0x40E00004) /* GPIO Pin-Level Register GPIO<63:32> */ -#define GPLR2 __REG(0x40E00008) /* GPIO Pin-Level Register GPIO<80:64> */ - -#define GPDR0 __REG(0x40E0000C) /* GPIO Pin Direction Register GPIO<31:0> */ -#define GPDR1 __REG(0x40E00010) /* GPIO Pin Direction Register GPIO<63:32> */ -#define GPDR2 __REG(0x40E00014) /* GPIO Pin Direction Register GPIO<80:64> */ - -#define GPSR0 __REG(0x40E00018) /* GPIO Pin Output Set Register GPIO<31:0> */ -#define GPSR1 __REG(0x40E0001C) /* GPIO Pin Output Set Register GPIO<63:32> */ -#define GPSR2 __REG(0x40E00020) /* GPIO Pin Output Set Register GPIO<80:64> */ - -#define GPCR0 __REG(0x40E00024) /* GPIO Pin Output Clear Register GPIO<31:0> */ -#define GPCR1 __REG(0x40E00028) /* GPIO Pin Output Clear Register GPIO <63:32> */ -#define GPCR2 __REG(0x40E0002C) /* GPIO Pin Output Clear Register GPIO <80:64> */ - -#define GRER0 __REG(0x40E00030) /* GPIO Rising-Edge Detect Register GPIO<31:0> */ -#define GRER1 __REG(0x40E00034) /* GPIO Rising-Edge Detect Register GPIO<63:32> */ -#define GRER2 __REG(0x40E00038) /* GPIO Rising-Edge Detect Register GPIO<80:64> */ - -#define GFER0 __REG(0x40E0003C) /* GPIO Falling-Edge Detect Register GPIO<31:0> */ -#define GFER1 __REG(0x40E00040) /* GPIO Falling-Edge Detect Register GPIO<63:32> */ -#define GFER2 __REG(0x40E00044) /* GPIO Falling-Edge Detect Register GPIO<80:64> */ - -#define GEDR0 __REG(0x40E00048) /* GPIO Edge Detect Status Register GPIO<31:0> */ -#define GEDR1 __REG(0x40E0004C) /* GPIO Edge Detect Status Register GPIO<63:32> */ -#define GEDR2 __REG(0x40E00050) /* GPIO Edge Detect Status Register GPIO<80:64> */ - -#define GAFR0_L __REG(0x40E00054) /* GPIO Alternate Function Select Register GPIO<15:0> */ -#define GAFR0_U __REG(0x40E00058) /* GPIO Alternate Function Select Register GPIO<31:16> */ -#define GAFR1_L __REG(0x40E0005C) /* GPIO Alternate Function Select Register GPIO<47:32> */ -#define GAFR1_U __REG(0x40E00060) /* GPIO Alternate Function Select Register GPIO<63:48> */ -#define GAFR2_L __REG(0x40E00064) /* GPIO Alternate Function Select Register GPIO<79:64> */ -#define GAFR2_U __REG(0x40E00068) /* GPIO Alternate Function Select Register GPIO<95-80> */ -#define GAFR3_L __REG(0x40E0006C) /* GPIO Alternate Function Select Register GPIO<111:96> */ -#define GAFR3_U __REG(0x40E00070) /* GPIO Alternate Function Select Register GPIO<127:112> */ - -#define GPLR3 __REG(0x40E00100) /* GPIO Pin-Level Register GPIO<127:96> */ -#define GPDR3 __REG(0x40E0010C) /* GPIO Pin Direction Register GPIO<127:96> */ -#define GPSR3 __REG(0x40E00118) /* GPIO Pin Output Set Register GPIO<127:96> */ -#define GPCR3 __REG(0x40E00124) /* GPIO Pin Output Clear Register GPIO<127:96> */ -#define GRER3 __REG(0x40E00130) /* GPIO Rising-Edge Detect Register GPIO<127:96> */ -#define GFER3 __REG(0x40E0013C) /* GPIO Falling-Edge Detect Register GPIO<127:96> */ -#define GEDR3 __REG(0x40E00148) /* GPIO Edge Detect Status Register GPIO<127:96> */ - -/* More handy macros. The argument is a literal GPIO number. */ - -#define GPIO_bit(x) (1 << ((x) & 0x1f)) - -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) - -/* Interrupt Controller */ - -#define _GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) -#define _GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) -#define _GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) -#define _GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3) -#define _GRER(x) __REG2(0x40E00030, ((x) & 0x60) >> 3) -#define _GFER(x) __REG2(0x40E0003C, ((x) & 0x60) >> 3) -#define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) -#define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) - -#define GPLR(x) (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3)) -#define GPDR(x) (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3)) -#define GPSR(x) (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3)) -#define GPCR(x) (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3)) -#define GRER(x) (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3)) -#define GFER(x) (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3)) -#define GEDR(x) (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3)) -#define GAFR(x) (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \ - ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U))) -#else - -#define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3) -#define GPDR(x) __REG2(0x40E0000C, ((x) & 0x60) >> 3) -#define GPSR(x) __REG2(0x40E00018, ((x) & 0x60) >> 3) -#define GPCR(x) __REG2(0x40E00024, ((x) & 0x60) >> 3) -#define GRER(x) __REG2(0x40E00030, ((x) & 0x60) >> 3) -#define GFER(x) __REG2(0x40E0003C, ((x) & 0x60) >> 3) -#define GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3) -#define GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2) - -#endif - -/* - * Power Manager - see pxa2xx-regs.h - */ - -/* - * SSP Serial Port Registers - see include/asm-arm/arch-pxa/regs-ssp.h - */ - -/* - * MultiMediaCard (MMC) controller - see drivers/mmc/host/pxamci.h - */ - -/* - * Core Clock - see include/asm-arm/arch-pxa/pxa2xx-regs.h - */ - -#ifdef CONFIG_PXA27x - -/* Camera Interface */ -#define CICR0 __REG(0x50000000) -#define CICR1 __REG(0x50000004) -#define CICR2 __REG(0x50000008) -#define CICR3 __REG(0x5000000C) -#define CICR4 __REG(0x50000010) -#define CISR __REG(0x50000014) -#define CIFR __REG(0x50000018) -#define CITOR __REG(0x5000001C) -#define CIBR0 __REG(0x50000028) -#define CIBR1 __REG(0x50000030) -#define CIBR2 __REG(0x50000038) - -#define CICR0_DMAEN (1 << 31) /* DMA request enable */ -#define CICR0_PAR_EN (1 << 30) /* Parity enable */ -#define CICR0_SL_CAP_EN (1 << 29) /* Capture enable for slave mode */ -#define CICR0_ENB (1 << 28) /* Camera interface enable */ -#define CICR0_DIS (1 << 27) /* Camera interface disable */ -#define CICR0_SIM (0x7 << 24) /* Sensor interface mode mask */ -#define CICR0_TOM (1 << 9) /* Time-out mask */ -#define CICR0_RDAVM (1 << 8) /* Receive-data-available mask */ -#define CICR0_FEM (1 << 7) /* FIFO-empty mask */ -#define CICR0_EOLM (1 << 6) /* End-of-line mask */ -#define CICR0_PERRM (1 << 5) /* Parity-error mask */ -#define CICR0_QDM (1 << 4) /* Quick-disable mask */ -#define CICR0_CDM (1 << 3) /* Disable-done mask */ -#define CICR0_SOFM (1 << 2) /* Start-of-frame mask */ -#define CICR0_EOFM (1 << 1) /* End-of-frame mask */ -#define CICR0_FOM (1 << 0) /* FIFO-overrun mask */ - -#define CICR1_TBIT (1 << 31) /* Transparency bit */ -#define CICR1_RGBT_CONV (0x3 << 29) /* RGBT conversion mask */ -#define CICR1_PPL (0x7ff << 15) /* Pixels per line mask */ -#define CICR1_RGB_CONV (0x7 << 12) /* RGB conversion mask */ -#define CICR1_RGB_F (1 << 11) /* RGB format */ -#define CICR1_YCBCR_F (1 << 10) /* YCbCr format */ -#define CICR1_RGB_BPP (0x7 << 7) /* RGB bis per pixel mask */ -#define CICR1_RAW_BPP (0x3 << 5) /* Raw bis per pixel mask */ -#define CICR1_COLOR_SP (0x3 << 3) /* Color space mask */ -#define CICR1_DW (0x7 << 0) /* Data width mask */ - -#define CICR2_BLW (0xff << 24) /* Beginning-of-line pixel clock - wait count mask */ -#define CICR2_ELW (0xff << 16) /* End-of-line pixel clock - wait count mask */ -#define CICR2_HSW (0x3f << 10) /* Horizontal sync pulse width mask */ -#define CICR2_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock - wait count mask */ -#define CICR2_FSW (0x7 << 0) /* Frame stabilization - wait count mask */ - -#define CICR3_BFW (0xff << 24) /* Beginning-of-frame line clock - wait count mask */ -#define CICR3_EFW (0xff << 16) /* End-of-frame line clock - wait count mask */ -#define CICR3_VSW (0x3f << 10) /* Vertical sync pulse width mask */ -#define CICR3_BFPW (0x3f << 3) /* Beginning-of-frame pixel clock - wait count mask */ -#define CICR3_LPF (0x7ff << 0) /* Lines per frame mask */ - -#define CICR4_MCLK_DLY (0x3 << 24) /* MCLK Data Capture Delay mask */ -#define CICR4_PCLK_EN (1 << 23) /* Pixel clock enable */ -#define CICR4_PCP (1 << 22) /* Pixel clock polarity */ -#define CICR4_HSP (1 << 21) /* Horizontal sync polarity */ -#define CICR4_VSP (1 << 20) /* Vertical sync polarity */ -#define CICR4_MCLK_EN (1 << 19) /* MCLK enable */ -#define CICR4_FR_RATE (0x7 << 8) /* Frame rate mask */ -#define CICR4_DIV (0xff << 0) /* Clock divisor mask */ - -#define CISR_FTO (1 << 15) /* FIFO time-out */ -#define CISR_RDAV_2 (1 << 14) /* Channel 2 receive data available */ -#define CISR_RDAV_1 (1 << 13) /* Channel 1 receive data available */ -#define CISR_RDAV_0 (1 << 12) /* Channel 0 receive data available */ -#define CISR_FEMPTY_2 (1 << 11) /* Channel 2 FIFO empty */ -#define CISR_FEMPTY_1 (1 << 10) /* Channel 1 FIFO empty */ -#define CISR_FEMPTY_0 (1 << 9) /* Channel 0 FIFO empty */ -#define CISR_EOL (1 << 8) /* End of line */ -#define CISR_PAR_ERR (1 << 7) /* Parity error */ -#define CISR_CQD (1 << 6) /* Camera interface quick disable */ -#define CISR_CDD (1 << 5) /* Camera interface disable done */ -#define CISR_SOF (1 << 4) /* Start of frame */ -#define CISR_EOF (1 << 3) /* End of frame */ -#define CISR_IFO_2 (1 << 2) /* FIFO overrun for Channel 2 */ -#define CISR_IFO_1 (1 << 1) /* FIFO overrun for Channel 1 */ -#define CISR_IFO_0 (1 << 0) /* FIFO overrun for Channel 0 */ - -#define CIFR_FLVL2 (0x7f << 23) /* FIFO 2 level mask */ -#define CIFR_FLVL1 (0x7f << 16) /* FIFO 1 level mask */ -#define CIFR_FLVL0 (0xff << 8) /* FIFO 0 level mask */ -#define CIFR_THL_0 (0x3 << 4) /* Threshold Level for Channel 0 FIFO */ -#define CIFR_RESET_F (1 << 3) /* Reset input FIFOs */ -#define CIFR_FEN2 (1 << 2) /* FIFO enable for channel 2 */ -#define CIFR_FEN1 (1 << 1) /* FIFO enable for channel 1 */ -#define CIFR_FEN0 (1 << 0) /* FIFO enable for channel 0 */ - -#define SRAM_SIZE 0x40000 /* 4x64K */ - -#define SRAM_MEM_PHYS 0x5C000000 - -#define IMPMCR __REG(0x58000000) /* IM Power Management Control Reg */ -#define IMPMSR __REG(0x58000008) /* IM Power Management Status Reg */ - -#define IMPMCR_PC3 (0x3 << 22) /* Bank 3 Power Control */ -#define IMPMCR_PC3_RUN_MODE (0x0 << 22) /* Run mode */ -#define IMPMCR_PC3_STANDBY_MODE (0x1 << 22) /* Standby mode */ -#define IMPMCR_PC3_AUTO_MODE (0x3 << 22) /* Automatically controlled */ - -#define IMPMCR_PC2 (0x3 << 20) /* Bank 2 Power Control */ -#define IMPMCR_PC2_RUN_MODE (0x0 << 20) /* Run mode */ -#define IMPMCR_PC2_STANDBY_MODE (0x1 << 20) /* Standby mode */ -#define IMPMCR_PC2_AUTO_MODE (0x3 << 20) /* Automatically controlled */ - -#define IMPMCR_PC1 (0x3 << 18) /* Bank 1 Power Control */ -#define IMPMCR_PC1_RUN_MODE (0x0 << 18) /* Run mode */ -#define IMPMCR_PC1_STANDBY_MODE (0x1 << 18) /* Standby mode */ -#define IMPMCR_PC1_AUTO_MODE (0x3 << 18) /* Automatically controlled */ - -#define IMPMCR_PC0 (0x3 << 16) /* Bank 0 Power Control */ -#define IMPMCR_PC0_RUN_MODE (0x0 << 16) /* Run mode */ -#define IMPMCR_PC0_STANDBY_MODE (0x1 << 16) /* Standby mode */ -#define IMPMCR_PC0_AUTO_MODE (0x3 << 16) /* Automatically controlled */ - -#define IMPMCR_AW3 (1 << 11) /* Bank 3 Automatic Wake-up enable */ -#define IMPMCR_AW2 (1 << 10) /* Bank 2 Automatic Wake-up enable */ -#define IMPMCR_AW1 (1 << 9) /* Bank 1 Automatic Wake-up enable */ -#define IMPMCR_AW0 (1 << 8) /* Bank 0 Automatic Wake-up enable */ - -#define IMPMCR_DST (0xFF << 0) /* Delay Standby Time, ms */ - -#define IMPMSR_PS3 (0x3 << 6) /* Bank 3 Power Status: */ -#define IMPMSR_PS3_RUN_MODE (0x0 << 6) /* Run mode */ -#define IMPMSR_PS3_STANDBY_MODE (0x1 << 6) /* Standby mode */ - -#define IMPMSR_PS2 (0x3 << 4) /* Bank 2 Power Status: */ -#define IMPMSR_PS2_RUN_MODE (0x0 << 4) /* Run mode */ -#define IMPMSR_PS2_STANDBY_MODE (0x1 << 4) /* Standby mode */ - -#define IMPMSR_PS1 (0x3 << 2) /* Bank 1 Power Status: */ -#define IMPMSR_PS1_RUN_MODE (0x0 << 2) /* Run mode */ -#define IMPMSR_PS1_STANDBY_MODE (0x1 << 2) /* Standby mode */ - -#define IMPMSR_PS0 (0x3 << 0) /* Bank 0 Power Status: */ -#define IMPMSR_PS0_RUN_MODE (0x0 << 0) /* Run mode */ -#define IMPMSR_PS0_STANDBY_MODE (0x1 << 0) /* Standby mode */ - -#endif - -#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -/* - * UHC: USB Host Controller (OHCI-like) register definitions - */ -#define UHC_BASE_PHYS (0x4C000000) -#define UHCREV __REG(0x4C000000) /* UHC HCI Spec Revision */ -#define UHCHCON __REG(0x4C000004) /* UHC Host Control Register */ -#define UHCCOMS __REG(0x4C000008) /* UHC Command Status Register */ -#define UHCINTS __REG(0x4C00000C) /* UHC Interrupt Status Register */ -#define UHCINTE __REG(0x4C000010) /* UHC Interrupt Enable */ -#define UHCINTD __REG(0x4C000014) /* UHC Interrupt Disable */ -#define UHCHCCA __REG(0x4C000018) /* UHC Host Controller Comm. Area */ -#define UHCPCED __REG(0x4C00001C) /* UHC Period Current Endpt Descr */ -#define UHCCHED __REG(0x4C000020) /* UHC Control Head Endpt Descr */ -#define UHCCCED __REG(0x4C000024) /* UHC Control Current Endpt Descr */ -#define UHCBHED __REG(0x4C000028) /* UHC Bulk Head Endpt Descr */ -#define UHCBCED __REG(0x4C00002C) /* UHC Bulk Current Endpt Descr */ -#define UHCDHEAD __REG(0x4C000030) /* UHC Done Head */ -#define UHCFMI __REG(0x4C000034) /* UHC Frame Interval */ -#define UHCFMR __REG(0x4C000038) /* UHC Frame Remaining */ -#define UHCFMN __REG(0x4C00003C) /* UHC Frame Number */ -#define UHCPERS __REG(0x4C000040) /* UHC Periodic Start */ -#define UHCLS __REG(0x4C000044) /* UHC Low Speed Threshold */ - -#define UHCRHDA __REG(0x4C000048) /* UHC Root Hub Descriptor A */ -#define UHCRHDA_NOCP (1 << 12) /* No over current protection */ - -#define UHCRHDB __REG(0x4C00004C) /* UHC Root Hub Descriptor B */ -#define UHCRHS __REG(0x4C000050) /* UHC Root Hub Status */ -#define UHCRHPS1 __REG(0x4C000054) /* UHC Root Hub Port 1 Status */ -#define UHCRHPS2 __REG(0x4C000058) /* UHC Root Hub Port 2 Status */ -#define UHCRHPS3 __REG(0x4C00005C) /* UHC Root Hub Port 3 Status */ - -#define UHCSTAT __REG(0x4C000060) /* UHC Status Register */ -#define UHCSTAT_UPS3 (1 << 16) /* USB Power Sense Port3 */ -#define UHCSTAT_SBMAI (1 << 15) /* System Bus Master Abort Interrupt*/ -#define UHCSTAT_SBTAI (1 << 14) /* System Bus Target Abort Interrupt*/ -#define UHCSTAT_UPRI (1 << 13) /* USB Port Resume Interrupt */ -#define UHCSTAT_UPS2 (1 << 12) /* USB Power Sense Port 2 */ -#define UHCSTAT_UPS1 (1 << 11) /* USB Power Sense Port 1 */ -#define UHCSTAT_HTA (1 << 10) /* HCI Target Abort */ -#define UHCSTAT_HBA (1 << 8) /* HCI Buffer Active */ -#define UHCSTAT_RWUE (1 << 7) /* HCI Remote Wake Up Event */ - -#define UHCHR __REG(0x4C000064) /* UHC Reset Register */ -#define UHCHR_SSEP3 (1 << 11) /* Sleep Standby Enable for Port3 */ -#define UHCHR_SSEP2 (1 << 10) /* Sleep Standby Enable for Port2 */ -#define UHCHR_SSEP1 (1 << 9) /* Sleep Standby Enable for Port1 */ -#define UHCHR_PCPL (1 << 7) /* Power control polarity low */ -#define UHCHR_PSPL (1 << 6) /* Power sense polarity low */ -#define UHCHR_SSE (1 << 5) /* Sleep Standby Enable */ -#define UHCHR_UIT (1 << 4) /* USB Interrupt Test */ -#define UHCHR_SSDC (1 << 3) /* Simulation Scale Down Clock */ -#define UHCHR_CGR (1 << 2) /* Clock Generation Reset */ -#define UHCHR_FHR (1 << 1) /* Force Host Controller Reset */ -#define UHCHR_FSBIR (1 << 0) /* Force System Bus Iface Reset */ - -#define UHCHIE __REG(0x4C000068) /* UHC Interrupt Enable Register*/ -#define UHCHIE_UPS3IE (1 << 14) /* Power Sense Port3 IntEn */ -#define UHCHIE_UPRIE (1 << 13) /* Port Resume IntEn */ -#define UHCHIE_UPS2IE (1 << 12) /* Power Sense Port2 IntEn */ -#define UHCHIE_UPS1IE (1 << 11) /* Power Sense Port1 IntEn */ -#define UHCHIE_TAIE (1 << 10) /* HCI Interface Transfer Abort - Interrupt Enable*/ -#define UHCHIE_HBAIE (1 << 8) /* HCI Buffer Active IntEn */ -#define UHCHIE_RWIE (1 << 7) /* Remote Wake-up IntEn */ - -#define UHCHIT __REG(0x4C00006C) /* UHC Interrupt Test register */ - -#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ - -/* PWRMODE register M field values */ - -#define PWRMODE_IDLE 0x1 -#define PWRMODE_STANDBY 0x2 -#define PWRMODE_SLEEP 0x3 -#define PWRMODE_DEEPSLEEP 0x7 - -#endif diff --git a/include/asm-arm/arch-pxa/pxa25x-udc.h b/include/asm-arm/arch-pxa/pxa25x-udc.h deleted file mode 100644 index 1b80a48..0000000 --- a/include/asm-arm/arch-pxa/pxa25x-udc.h +++ /dev/null @@ -1,163 +0,0 @@ -#ifndef _ASM_ARCH_PXA25X_UDC_H -#define _ASM_ARCH_PXA25X_UDC_H - -#ifdef _ASM_ARCH_PXA27X_UDC_H -#error "You can't include both PXA25x and PXA27x UDC support" -#endif - -#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */ -#define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */ -#define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */ - -#define UDCCR __REG(0x40600000) /* UDC Control Register */ -#define UDCCR_UDE (1 << 0) /* UDC enable */ -#define UDCCR_UDA (1 << 1) /* UDC active */ -#define UDCCR_RSM (1 << 2) /* Device resume */ -#define UDCCR_RESIR (1 << 3) /* Resume interrupt request */ -#define UDCCR_SUSIR (1 << 4) /* Suspend interrupt request */ -#define UDCCR_SRM (1 << 5) /* Suspend/resume interrupt mask */ -#define UDCCR_RSTIR (1 << 6) /* Reset interrupt request */ -#define UDCCR_REM (1 << 7) /* Reset interrupt mask */ - -#define UDCCS0 __REG(0x40600010) /* UDC Endpoint 0 Control/Status Register */ -#define UDCCS0_OPR (1 << 0) /* OUT packet ready */ -#define UDCCS0_IPR (1 << 1) /* IN packet ready */ -#define UDCCS0_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS0_DRWF (1 << 3) /* Device remote wakeup feature */ -#define UDCCS0_SST (1 << 4) /* Sent stall */ -#define UDCCS0_FST (1 << 5) /* Force stall */ -#define UDCCS0_RNE (1 << 6) /* Receive FIFO no empty */ -#define UDCCS0_SA (1 << 7) /* Setup active */ - -/* Bulk IN - Endpoint 1,6,11 */ -#define UDCCS1 __REG(0x40600014) /* UDC Endpoint 1 (IN) Control/Status Register */ -#define UDCCS6 __REG(0x40600028) /* UDC Endpoint 6 (IN) Control/Status Register */ -#define UDCCS11 __REG(0x4060003C) /* UDC Endpoint 11 (IN) Control/Status Register */ - -#define UDCCS_BI_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_BI_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_BI_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_BI_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_BI_SST (1 << 4) /* Sent stall */ -#define UDCCS_BI_FST (1 << 5) /* Force stall */ -#define UDCCS_BI_TSP (1 << 7) /* Transmit short packet */ - -/* Bulk OUT - Endpoint 2,7,12 */ -#define UDCCS2 __REG(0x40600018) /* UDC Endpoint 2 (OUT) Control/Status Register */ -#define UDCCS7 __REG(0x4060002C) /* UDC Endpoint 7 (OUT) Control/Status Register */ -#define UDCCS12 __REG(0x40600040) /* UDC Endpoint 12 (OUT) Control/Status Register */ - -#define UDCCS_BO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_BO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_BO_DME (1 << 3) /* DMA enable */ -#define UDCCS_BO_SST (1 << 4) /* Sent stall */ -#define UDCCS_BO_FST (1 << 5) /* Force stall */ -#define UDCCS_BO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_BO_RSP (1 << 7) /* Receive short packet */ - -/* Isochronous IN - Endpoint 3,8,13 */ -#define UDCCS3 __REG(0x4060001C) /* UDC Endpoint 3 (IN) Control/Status Register */ -#define UDCCS8 __REG(0x40600030) /* UDC Endpoint 8 (IN) Control/Status Register */ -#define UDCCS13 __REG(0x40600044) /* UDC Endpoint 13 (IN) Control/Status Register */ - -#define UDCCS_II_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_II_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_II_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_II_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_II_TSP (1 << 7) /* Transmit short packet */ - -/* Isochronous OUT - Endpoint 4,9,14 */ -#define UDCCS4 __REG(0x40600020) /* UDC Endpoint 4 (OUT) Control/Status Register */ -#define UDCCS9 __REG(0x40600034) /* UDC Endpoint 9 (OUT) Control/Status Register */ -#define UDCCS14 __REG(0x40600048) /* UDC Endpoint 14 (OUT) Control/Status Register */ - -#define UDCCS_IO_RFS (1 << 0) /* Receive FIFO service */ -#define UDCCS_IO_RPC (1 << 1) /* Receive packet complete */ -#define UDCCS_IO_ROF (1 << 2) /* Receive overflow */ -#define UDCCS_IO_DME (1 << 3) /* DMA enable */ -#define UDCCS_IO_RNE (1 << 6) /* Receive FIFO not empty */ -#define UDCCS_IO_RSP (1 << 7) /* Receive short packet */ - -/* Interrupt IN - Endpoint 5,10,15 */ -#define UDCCS5 __REG(0x40600024) /* UDC Endpoint 5 (Interrupt) Control/Status Register */ -#define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */ -#define UDCCS15 __REG(0x4060004C) /* UDC Endpoint 15 (Interrupt) Control/Status Register */ - -#define UDCCS_INT_TFS (1 << 0) /* Transmit FIFO service */ -#define UDCCS_INT_TPC (1 << 1) /* Transmit packet complete */ -#define UDCCS_INT_FTF (1 << 2) /* Flush Tx FIFO */ -#define UDCCS_INT_TUR (1 << 3) /* Transmit FIFO underrun */ -#define UDCCS_INT_SST (1 << 4) /* Sent stall */ -#define UDCCS_INT_FST (1 << 5) /* Force stall */ -#define UDCCS_INT_TSP (1 << 7) /* Transmit short packet */ - -#define UFNRH __REG(0x40600060) /* UDC Frame Number Register High */ -#define UFNRL __REG(0x40600064) /* UDC Frame Number Register Low */ -#define UBCR2 __REG(0x40600068) /* UDC Byte Count Reg 2 */ -#define UBCR4 __REG(0x4060006c) /* UDC Byte Count Reg 4 */ -#define UBCR7 __REG(0x40600070) /* UDC Byte Count Reg 7 */ -#define UBCR9 __REG(0x40600074) /* UDC Byte Count Reg 9 */ -#define UBCR12 __REG(0x40600078) /* UDC Byte Count Reg 12 */ -#define UBCR14 __REG(0x4060007c) /* UDC Byte Count Reg 14 */ -#define UDDR0 __REG(0x40600080) /* UDC Endpoint 0 Data Register */ -#define UDDR1 __REG(0x40600100) /* UDC Endpoint 1 Data Register */ -#define UDDR2 __REG(0x40600180) /* UDC Endpoint 2 Data Register */ -#define UDDR3 __REG(0x40600200) /* UDC Endpoint 3 Data Register */ -#define UDDR4 __REG(0x40600400) /* UDC Endpoint 4 Data Register */ -#define UDDR5 __REG(0x406000A0) /* UDC Endpoint 5 Data Register */ -#define UDDR6 __REG(0x40600600) /* UDC Endpoint 6 Data Register */ -#define UDDR7 __REG(0x40600680) /* UDC Endpoint 7 Data Register */ -#define UDDR8 __REG(0x40600700) /* UDC Endpoint 8 Data Register */ -#define UDDR9 __REG(0x40600900) /* UDC Endpoint 9 Data Register */ -#define UDDR10 __REG(0x406000C0) /* UDC Endpoint 10 Data Register */ -#define UDDR11 __REG(0x40600B00) /* UDC Endpoint 11 Data Register */ -#define UDDR12 __REG(0x40600B80) /* UDC Endpoint 12 Data Register */ -#define UDDR13 __REG(0x40600C00) /* UDC Endpoint 13 Data Register */ -#define UDDR14 __REG(0x40600E00) /* UDC Endpoint 14 Data Register */ -#define UDDR15 __REG(0x406000E0) /* UDC Endpoint 15 Data Register */ - -#define UICR0 __REG(0x40600050) /* UDC Interrupt Control Register 0 */ - -#define UICR0_IM0 (1 << 0) /* Interrupt mask ep 0 */ -#define UICR0_IM1 (1 << 1) /* Interrupt mask ep 1 */ -#define UICR0_IM2 (1 << 2) /* Interrupt mask ep 2 */ -#define UICR0_IM3 (1 << 3) /* Interrupt mask ep 3 */ -#define UICR0_IM4 (1 << 4) /* Interrupt mask ep 4 */ -#define UICR0_IM5 (1 << 5) /* Interrupt mask ep 5 */ -#define UICR0_IM6 (1 << 6) /* Interrupt mask ep 6 */ -#define UICR0_IM7 (1 << 7) /* Interrupt mask ep 7 */ - -#define UICR1 __REG(0x40600054) /* UDC Interrupt Control Register 1 */ - -#define UICR1_IM8 (1 << 0) /* Interrupt mask ep 8 */ -#define UICR1_IM9 (1 << 1) /* Interrupt mask ep 9 */ -#define UICR1_IM10 (1 << 2) /* Interrupt mask ep 10 */ -#define UICR1_IM11 (1 << 3) /* Interrupt mask ep 11 */ -#define UICR1_IM12 (1 << 4) /* Interrupt mask ep 12 */ -#define UICR1_IM13 (1 << 5) /* Interrupt mask ep 13 */ -#define UICR1_IM14 (1 << 6) /* Interrupt mask ep 14 */ -#define UICR1_IM15 (1 << 7) /* Interrupt mask ep 15 */ - -#define USIR0 __REG(0x40600058) /* UDC Status Interrupt Register 0 */ - -#define USIR0_IR0 (1 << 0) /* Interrupt request ep 0 */ -#define USIR0_IR1 (1 << 1) /* Interrupt request ep 1 */ -#define USIR0_IR2 (1 << 2) /* Interrupt request ep 2 */ -#define USIR0_IR3 (1 << 3) /* Interrupt request ep 3 */ -#define USIR0_IR4 (1 << 4) /* Interrupt request ep 4 */ -#define USIR0_IR5 (1 << 5) /* Interrupt request ep 5 */ -#define USIR0_IR6 (1 << 6) /* Interrupt request ep 6 */ -#define USIR0_IR7 (1 << 7) /* Interrupt request ep 7 */ - -#define USIR1 __REG(0x4060005C) /* UDC Status Interrupt Register 1 */ - -#define USIR1_IR8 (1 << 0) /* Interrupt request ep 8 */ -#define USIR1_IR9 (1 << 1) /* Interrupt request ep 9 */ -#define USIR1_IR10 (1 << 2) /* Interrupt request ep 10 */ -#define USIR1_IR11 (1 << 3) /* Interrupt request ep 11 */ -#define USIR1_IR12 (1 << 4) /* Interrupt request ep 12 */ -#define USIR1_IR13 (1 << 5) /* Interrupt request ep 13 */ -#define USIR1_IR14 (1 << 6) /* Interrupt request ep 14 */ -#define USIR1_IR15 (1 << 7) /* Interrupt request ep 15 */ - -#endif diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h deleted file mode 100644 index ab1443f..0000000 --- a/include/asm-arm/arch-pxa/pxa27x-udc.h +++ /dev/null @@ -1,257 +0,0 @@ -#ifndef _ASM_ARCH_PXA27X_UDC_H -#define _ASM_ARCH_PXA27X_UDC_H - -#ifdef _ASM_ARCH_PXA25X_UDC_H -#error You cannot include both PXA25x and PXA27x UDC support -#endif - -#define UDCCR __REG(0x40600000) /* UDC Control Register */ -#define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ -#define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation - Protocol Port Support */ -#define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol - Support */ -#define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol - Enable */ -#define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ -#define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ -#define UDCCR_ACN_S 11 -#define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ -#define UDCCR_AIN_S 8 -#define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface - Setting Number */ -#define UDCCR_AAISN_S 5 -#define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active - Configuration */ -#define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration - Error */ -#define UDCCR_UDR (1 << 2) /* UDC Resume */ -#define UDCCR_UDA (1 << 1) /* UDC Active */ -#define UDCCR_UDE (1 << 0) /* UDC Enable */ - -#define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */ -#define UDCICR1 __REG(0x40600008) /* UDC Interrupt Control Register1 */ -#define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ -#define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ - -#define UDC_INT_FIFOERROR (0x2) -#define UDC_INT_PACKETCMP (0x1) - -#define UDCICR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ -#define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ -#define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ -#define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ -#define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ - -#define UDCISR0 __REG(0x4060000C) /* UDC Interrupt Status Register 0 */ -#define UDCISR1 __REG(0x40600010) /* UDC Interrupt Status Register 1 */ -#define UDCISR_INT(n,intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) -#define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */ -#define UDCISR1_IRSOF (1 << 30) /* IntReq - Start of Frame */ -#define UDCISR1_IRRU (1 << 29) /* IntReq - Resume */ -#define UDCISR1_IRSU (1 << 28) /* IntReq - Suspend */ -#define UDCISR1_IRRS (1 << 27) /* IntReq - Reset */ - -#define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */ -#define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */ -#define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ -#define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt - Rising Edge Interrupt Enable */ -#define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt - Falling Edge Interrupt Enable */ -#define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge - Interrupt Enable */ -#define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge - Interrupt Enable */ -#define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge - Interrupt Enable */ -#define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge - Interrupt Enable */ -#define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge - Interrupt Enable */ -#define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge - Interrupt Enable */ -#define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising - Edge Interrupt Enable */ -#define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling - Edge Interrupt Enable */ -#define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge - Interrupt Enable */ -#define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge - Interrupt Enable */ - -#define UP2OCR __REG(0x40600020) /* USB Port 2 Output Control register */ -#define UP3OCR __REG(0x40600024) /* USB Port 2 Output Control register */ - -#define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */ -#define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */ -#define UP2OCR_DPPDE (1 << 2) /* Host Port 2 Transceiver D+ Pull Down Enable */ -#define UP2OCR_DMPDE (1 << 3) /* Host Port 2 Transceiver D- Pull Down Enable */ -#define UP2OCR_DPPUE (1 << 4) /* Host Port 2 Transceiver D+ Pull Up Enable */ -#define UP2OCR_DMPUE (1 << 5) /* Host Port 2 Transceiver D- Pull Up Enable */ -#define UP2OCR_DPPUBE (1 << 6) /* Host Port 2 Transceiver D+ Pull Up Bypass Enable */ -#define UP2OCR_DMPUBE (1 << 7) /* Host Port 2 Transceiver D- Pull Up Bypass Enable */ -#define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */ -#define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */ -#define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ -#define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ -#define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ -#define UP2OCR_SEOS(x) ((x & 7) << 24) /* Single-Ended Output Select */ - -#define UDCCSN(x) __REG2(0x40600100, (x) << 2) -#define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ -#define UDCCSR0_SA (1 << 7) /* Setup Active */ -#define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ -#define UDCCSR0_FST (1 << 5) /* Force Stall */ -#define UDCCSR0_SST (1 << 4) /* Sent Stall */ -#define UDCCSR0_DME (1 << 3) /* DMA Enable */ -#define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ -#define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ -#define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ - -#define UDCCSRA __REG(0x40600104) /* UDC Control/Status register - Endpoint A */ -#define UDCCSRB __REG(0x40600108) /* UDC Control/Status register - Endpoint B */ -#define UDCCSRC __REG(0x4060010C) /* UDC Control/Status register - Endpoint C */ -#define UDCCSRD __REG(0x40600110) /* UDC Control/Status register - Endpoint D */ -#define UDCCSRE __REG(0x40600114) /* UDC Control/Status register - Endpoint E */ -#define UDCCSRF __REG(0x40600118) /* UDC Control/Status register - Endpoint F */ -#define UDCCSRG __REG(0x4060011C) /* UDC Control/Status register - Endpoint G */ -#define UDCCSRH __REG(0x40600120) /* UDC Control/Status register - Endpoint H */ -#define UDCCSRI __REG(0x40600124) /* UDC Control/Status register - Endpoint I */ -#define UDCCSRJ __REG(0x40600128) /* UDC Control/Status register - Endpoint J */ -#define UDCCSRK __REG(0x4060012C) /* UDC Control/Status register - Endpoint K */ -#define UDCCSRL __REG(0x40600130) /* UDC Control/Status register - Endpoint L */ -#define UDCCSRM __REG(0x40600134) /* UDC Control/Status register - Endpoint M */ -#define UDCCSRN __REG(0x40600138) /* UDC Control/Status register - Endpoint N */ -#define UDCCSRP __REG(0x4060013C) /* UDC Control/Status register - Endpoint P */ -#define UDCCSRQ __REG(0x40600140) /* UDC Control/Status register - Endpoint Q */ -#define UDCCSRR __REG(0x40600144) /* UDC Control/Status register - Endpoint R */ -#define UDCCSRS __REG(0x40600148) /* UDC Control/Status register - Endpoint S */ -#define UDCCSRT __REG(0x4060014C) /* UDC Control/Status register - Endpoint T */ -#define UDCCSRU __REG(0x40600150) /* UDC Control/Status register - Endpoint U */ -#define UDCCSRV __REG(0x40600154) /* UDC Control/Status register - Endpoint V */ -#define UDCCSRW __REG(0x40600158) /* UDC Control/Status register - Endpoint W */ -#define UDCCSRX __REG(0x4060015C) /* UDC Control/Status register - Endpoint X */ - -#define UDCCSR_DPE (1 << 9) /* Data Packet Error */ -#define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ -#define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ -#define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ -#define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ -#define UDCCSR_FST (1 << 5) /* Force STALL */ -#define UDCCSR_SST (1 << 4) /* Sent STALL */ -#define UDCCSR_DME (1 << 3) /* DMA Enable */ -#define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ -#define UDCCSR_PC (1 << 1) /* Packet Complete */ -#define UDCCSR_FS (1 << 0) /* FIFO needs service */ - -#define UDCBCN(x) __REG2(0x40600200, (x)<<2) -#define UDCBCR0 __REG(0x40600200) /* Byte Count Register - EP0 */ -#define UDCBCRA __REG(0x40600204) /* Byte Count Register - EPA */ -#define UDCBCRB __REG(0x40600208) /* Byte Count Register - EPB */ -#define UDCBCRC __REG(0x4060020C) /* Byte Count Register - EPC */ -#define UDCBCRD __REG(0x40600210) /* Byte Count Register - EPD */ -#define UDCBCRE __REG(0x40600214) /* Byte Count Register - EPE */ -#define UDCBCRF __REG(0x40600218) /* Byte Count Register - EPF */ -#define UDCBCRG __REG(0x4060021C) /* Byte Count Register - EPG */ -#define UDCBCRH __REG(0x40600220) /* Byte Count Register - EPH */ -#define UDCBCRI __REG(0x40600224) /* Byte Count Register - EPI */ -#define UDCBCRJ __REG(0x40600228) /* Byte Count Register - EPJ */ -#define UDCBCRK __REG(0x4060022C) /* Byte Count Register - EPK */ -#define UDCBCRL __REG(0x40600230) /* Byte Count Register - EPL */ -#define UDCBCRM __REG(0x40600234) /* Byte Count Register - EPM */ -#define UDCBCRN __REG(0x40600238) /* Byte Count Register - EPN */ -#define UDCBCRP __REG(0x4060023C) /* Byte Count Register - EPP */ -#define UDCBCRQ __REG(0x40600240) /* Byte Count Register - EPQ */ -#define UDCBCRR __REG(0x40600244) /* Byte Count Register - EPR */ -#define UDCBCRS __REG(0x40600248) /* Byte Count Register - EPS */ -#define UDCBCRT __REG(0x4060024C) /* Byte Count Register - EPT */ -#define UDCBCRU __REG(0x40600250) /* Byte Count Register - EPU */ -#define UDCBCRV __REG(0x40600254) /* Byte Count Register - EPV */ -#define UDCBCRW __REG(0x40600258) /* Byte Count Register - EPW */ -#define UDCBCRX __REG(0x4060025C) /* Byte Count Register - EPX */ - -#define UDCDN(x) __REG2(0x40600300, (x)<<2) -#define PHYS_UDCDN(x) (0x40600300 + ((x)<<2)) -#define PUDCDN(x) (volatile u32 *)(io_p2v(PHYS_UDCDN((x)))) -#define UDCDR0 __REG(0x40600300) /* Data Register - EP0 */ -#define UDCDRA __REG(0x40600304) /* Data Register - EPA */ -#define UDCDRB __REG(0x40600308) /* Data Register - EPB */ -#define UDCDRC __REG(0x4060030C) /* Data Register - EPC */ -#define UDCDRD __REG(0x40600310) /* Data Register - EPD */ -#define UDCDRE __REG(0x40600314) /* Data Register - EPE */ -#define UDCDRF __REG(0x40600318) /* Data Register - EPF */ -#define UDCDRG __REG(0x4060031C) /* Data Register - EPG */ -#define UDCDRH __REG(0x40600320) /* Data Register - EPH */ -#define UDCDRI __REG(0x40600324) /* Data Register - EPI */ -#define UDCDRJ __REG(0x40600328) /* Data Register - EPJ */ -#define UDCDRK __REG(0x4060032C) /* Data Register - EPK */ -#define UDCDRL __REG(0x40600330) /* Data Register - EPL */ -#define UDCDRM __REG(0x40600334) /* Data Register - EPM */ -#define UDCDRN __REG(0x40600338) /* Data Register - EPN */ -#define UDCDRP __REG(0x4060033C) /* Data Register - EPP */ -#define UDCDRQ __REG(0x40600340) /* Data Register - EPQ */ -#define UDCDRR __REG(0x40600344) /* Data Register - EPR */ -#define UDCDRS __REG(0x40600348) /* Data Register - EPS */ -#define UDCDRT __REG(0x4060034C) /* Data Register - EPT */ -#define UDCDRU __REG(0x40600350) /* Data Register - EPU */ -#define UDCDRV __REG(0x40600354) /* Data Register - EPV */ -#define UDCDRW __REG(0x40600358) /* Data Register - EPW */ -#define UDCDRX __REG(0x4060035C) /* Data Register - EPX */ - -#define UDCCN(x) __REG2(0x40600400, (x)<<2) -#define UDCCRA __REG(0x40600404) /* Configuration register EPA */ -#define UDCCRB __REG(0x40600408) /* Configuration register EPB */ -#define UDCCRC __REG(0x4060040C) /* Configuration register EPC */ -#define UDCCRD __REG(0x40600410) /* Configuration register EPD */ -#define UDCCRE __REG(0x40600414) /* Configuration register EPE */ -#define UDCCRF __REG(0x40600418) /* Configuration register EPF */ -#define UDCCRG __REG(0x4060041C) /* Configuration register EPG */ -#define UDCCRH __REG(0x40600420) /* Configuration register EPH */ -#define UDCCRI __REG(0x40600424) /* Configuration register EPI */ -#define UDCCRJ __REG(0x40600428) /* Configuration register EPJ */ -#define UDCCRK __REG(0x4060042C) /* Configuration register EPK */ -#define UDCCRL __REG(0x40600430) /* Configuration register EPL */ -#define UDCCRM __REG(0x40600434) /* Configuration register EPM */ -#define UDCCRN __REG(0x40600438) /* Configuration register EPN */ -#define UDCCRP __REG(0x4060043C) /* Configuration register EPP */ -#define UDCCRQ __REG(0x40600440) /* Configuration register EPQ */ -#define UDCCRR __REG(0x40600444) /* Configuration register EPR */ -#define UDCCRS __REG(0x40600448) /* Configuration register EPS */ -#define UDCCRT __REG(0x4060044C) /* Configuration register EPT */ -#define UDCCRU __REG(0x40600450) /* Configuration register EPU */ -#define UDCCRV __REG(0x40600454) /* Configuration register EPV */ -#define UDCCRW __REG(0x40600458) /* Configuration register EPW */ -#define UDCCRX __REG(0x4060045C) /* Configuration register EPX */ - -#define UDCCONR_CN (0x03 << 25) /* Configuration Number */ -#define UDCCONR_CN_S (25) -#define UDCCONR_IN (0x07 << 22) /* Interface Number */ -#define UDCCONR_IN_S (22) -#define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ -#define UDCCONR_AISN_S (19) -#define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ -#define UDCCONR_EN_S (15) -#define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ -#define UDCCONR_ET_S (13) -#define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ -#define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ -#define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ -#define UDCCONR_ET_NU (0x00 << 13) /* Not used */ -#define UDCCONR_ED (1 << 12) /* Endpoint Direction */ -#define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ -#define UDCCONR_MPS_S (2) -#define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ -#define UDCCONR_EE (1 << 0) /* Endpoint Enable */ - - -#define UDC_INT_FIFOERROR (0x2) -#define UDC_INT_PACKETCMP (0x1) - -#define UDC_FNR_MASK (0x7ff) - -#define UDCCSR_WR_MASK (UDCCSR_DME|UDCCSR_FST) -#define UDC_BCR_MASK (0x3ff) - -#endif diff --git a/include/asm-arm/arch-pxa/pxa27x_keypad.h b/include/asm-arm/arch-pxa/pxa27x_keypad.h deleted file mode 100644 index d5a48a9..0000000 --- a/include/asm-arm/arch-pxa/pxa27x_keypad.h +++ /dev/null @@ -1,58 +0,0 @@ -#ifndef __ASM_ARCH_PXA27x_KEYPAD_H -#define __ASM_ARCH_PXA27x_KEYPAD_H - -#include - -#define MAX_MATRIX_KEY_ROWS (8) -#define MAX_MATRIX_KEY_COLS (8) - -/* pxa3xx keypad platform specific parameters - * - * NOTE: - * 1. direct_key_num indicates the number of keys in the direct keypad - * _plus_ the number of rotary-encoder sensor inputs, this can be - * left as 0 if only rotary encoders are enabled, the driver will - * automatically calculate this - * - * 2. direct_key_map is the key code map for the direct keys, if rotary - * encoder(s) are enabled, direct key 0/1(2/3) will be ignored - * - * 3. rotary can be either interpreted as a relative input event (e.g. - * REL_WHEEL/REL_HWHEEL) or specific keys (e.g. UP/DOWN/LEFT/RIGHT) - * - * 4. matrix key and direct key will use the same debounce_interval by - * default, which should be sufficient in most cases - */ -struct pxa27x_keypad_platform_data { - - /* code map for the matrix keys */ - unsigned int matrix_key_rows; - unsigned int matrix_key_cols; - unsigned int *matrix_key_map; - int matrix_key_map_size; - - /* direct keys */ - int direct_key_num; - unsigned int direct_key_map[8]; - - /* rotary encoders 0 */ - int enable_rotary0; - int rotary0_rel_code; - int rotary0_up_key; - int rotary0_down_key; - - /* rotary encoders 1 */ - int enable_rotary1; - int rotary1_rel_code; - int rotary1_up_key; - int rotary1_down_key; - - /* key debounce interval */ - unsigned int debounce_interval; -}; - -#define KEY(row, col, val) (((row) << 28) | ((col) << 24) | (val)) - -extern void pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info); - -#endif /* __ASM_ARCH_PXA27x_KEYPAD_H */ diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h deleted file mode 100644 index 6ef1dd0..0000000 --- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h +++ /dev/null @@ -1,368 +0,0 @@ -#ifndef __ASM_ARCH_PXA2XX_GPIO_H -#define __ASM_ARCH_PXA2XX_GPIO_H - -#warning Please use mfp-pxa2[57]x.h instead of pxa2xx-gpio.h - -/* GPIO alternate function assignments */ - -#define GPIO1_RST 1 /* reset */ -#define GPIO6_MMCCLK 6 /* MMC Clock */ -#define GPIO7_48MHz 7 /* 48 MHz clock output */ -#define GPIO8_MMCCS0 8 /* MMC Chip Select 0 */ -#define GPIO9_MMCCS1 9 /* MMC Chip Select 1 */ -#define GPIO10_RTCCLK 10 /* real time clock (1 Hz) */ -#define GPIO11_3_6MHz 11 /* 3.6 MHz oscillator out */ -#define GPIO12_32KHz 12 /* 32 kHz out */ -#define GPIO12_CIF_DD_7 12 /* Camera data pin 7 */ -#define GPIO13_MBGNT 13 /* memory controller grant */ -#define GPIO14_MBREQ 14 /* alternate bus master request */ -#define GPIO15_nCS_1 15 /* chip select 1 */ -#define GPIO16_PWM0 16 /* PWM0 output */ -#define GPIO17_PWM1 17 /* PWM1 output */ -#define GPIO17_CIF_DD_6 17 /* Camera data pin 6 */ -#define GPIO18_RDY 18 /* Ext. Bus Ready */ -#define GPIO19_DREQ1 19 /* External DMA Request */ -#define GPIO20_DREQ0 20 /* External DMA Request */ -#define GPIO23_SCLK 23 /* SSP clock */ -#define GPIO23_CIF_MCLK 23 /* Camera Master Clock */ -#define GPIO24_SFRM 24 /* SSP Frame */ -#define GPIO24_CIF_FV 24 /* Camera frame start signal */ -#define GPIO25_STXD 25 /* SSP transmit */ -#define GPIO25_CIF_LV 25 /* Camera line start signal */ -#define GPIO26_SRXD 26 /* SSP receive */ -#define GPIO26_CIF_PCLK 26 /* Camera Pixel Clock */ -#define GPIO27_SEXTCLK 27 /* SSP ext_clk */ -#define GPIO27_CIF_DD_0 27 /* Camera data pin 0 */ -#define GPIO28_BITCLK 28 /* AC97/I2S bit_clk */ -#define GPIO29_SDATA_IN 29 /* AC97 Sdata_in0 / I2S Sdata_in */ -#define GPIO30_SDATA_OUT 30 /* AC97/I2S Sdata_out */ -#define GPIO31_SYNC 31 /* AC97/I2S sync */ -#define GPIO32_SDATA_IN1 32 /* AC97 Sdata_in1 */ -#define GPIO32_SYSCLK 32 /* I2S System Clock */ -#define GPIO32_MMCCLK 32 /* MMC Clock (PXA270) */ -#define GPIO33_nCS_5 33 /* chip select 5 */ -#define GPIO34_FFRXD 34 /* FFUART receive */ -#define GPIO34_MMCCS0 34 /* MMC Chip Select 0 */ -#define GPIO35_FFCTS 35 /* FFUART Clear to send */ -#define GPIO36_FFDCD 36 /* FFUART Data carrier detect */ -#define GPIO37_FFDSR 37 /* FFUART data set ready */ -#define GPIO38_FFRI 38 /* FFUART Ring Indicator */ -#define GPIO39_MMCCS1 39 /* MMC Chip Select 1 */ -#define GPIO39_FFTXD 39 /* FFUART transmit data */ -#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */ -#define GPIO41_FFRTS 41 /* FFUART request to send */ -#define GPIO42_BTRXD 42 /* BTUART receive data */ -#define GPIO42_HWRXD 42 /* HWUART receive data */ -#define GPIO42_CIF_MCLK 42 /* Camera Master Clock */ -#define GPIO43_BTTXD 43 /* BTUART transmit data */ -#define GPIO43_HWTXD 43 /* HWUART transmit data */ -#define GPIO43_CIF_FV 43 /* Camera frame start signal */ -#define GPIO44_BTCTS 44 /* BTUART clear to send */ -#define GPIO44_HWCTS 44 /* HWUART clear to send */ -#define GPIO44_CIF_LV 44 /* Camera line start signal */ -#define GPIO45_BTRTS 45 /* BTUART request to send */ -#define GPIO45_HWRTS 45 /* HWUART request to send */ -#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */ -#define GPIO45_CIF_PCLK 45 /* Camera Pixel Clock */ -#define GPIO46_ICPRXD 46 /* ICP receive data */ -#define GPIO46_STRXD 46 /* STD_UART receive data */ -#define GPIO47_ICPTXD 47 /* ICP transmit data */ -#define GPIO47_STTXD 47 /* STD_UART transmit data */ -#define GPIO47_CIF_DD_0 47 /* Camera data pin 0 */ -#define GPIO48_nPOE 48 /* Output Enable for Card Space */ -#define GPIO48_CIF_DD_5 48 /* Camera data pin 5 */ -#define GPIO49_nPWE 49 /* Write Enable for Card Space */ -#define GPIO50_nPIOR 50 /* I/O Read for Card Space */ -#define GPIO50_CIF_DD_3 50 /* Camera data pin 3 */ -#define GPIO51_nPIOW 51 /* I/O Write for Card Space */ -#define GPIO51_CIF_DD_2 51 /* Camera data pin 2 */ -#define GPIO52_nPCE_1 52 /* Card Enable for Card Space */ -#define GPIO52_CIF_DD_4 52 /* Camera data pin 4 */ -#define GPIO53_nPCE_2 53 /* Card Enable for Card Space */ -#define GPIO53_MMCCLK 53 /* MMC Clock */ -#define GPIO53_CIF_MCLK 53 /* Camera Master Clock */ -#define GPIO54_MMCCLK 54 /* MMC Clock */ -#define GPIO54_pSKTSEL 54 /* Socket Select for Card Space */ -#define GPIO54_nPCE_2 54 /* Card Enable for Card Space (PXA27x) */ -#define GPIO54_CIF_PCLK 54 /* Camera Pixel Clock */ -#define GPIO55_nPREG 55 /* Card Address bit 26 */ -#define GPIO55_CIF_DD_1 55 /* Camera data pin 1 */ -#define GPIO56_nPWAIT 56 /* Wait signal for Card Space */ -#define GPIO57_nIOIS16 57 /* Bus Width select for I/O Card Space */ -#define GPIO58_LDD_0 58 /* LCD data pin 0 */ -#define GPIO59_LDD_1 59 /* LCD data pin 1 */ -#define GPIO60_LDD_2 60 /* LCD data pin 2 */ -#define GPIO61_LDD_3 61 /* LCD data pin 3 */ -#define GPIO62_LDD_4 62 /* LCD data pin 4 */ -#define GPIO63_LDD_5 63 /* LCD data pin 5 */ -#define GPIO64_LDD_6 64 /* LCD data pin 6 */ -#define GPIO65_LDD_7 65 /* LCD data pin 7 */ -#define GPIO66_LDD_8 66 /* LCD data pin 8 */ -#define GPIO66_MBREQ 66 /* alternate bus master req */ -#define GPIO67_LDD_9 67 /* LCD data pin 9 */ -#define GPIO67_MMCCS0 67 /* MMC Chip Select 0 */ -#define GPIO68_LDD_10 68 /* LCD data pin 10 */ -#define GPIO68_MMCCS1 68 /* MMC Chip Select 1 */ -#define GPIO69_LDD_11 69 /* LCD data pin 11 */ -#define GPIO69_MMCCLK 69 /* MMC_CLK */ -#define GPIO70_LDD_12 70 /* LCD data pin 12 */ -#define GPIO70_RTCCLK 70 /* Real Time clock (1 Hz) */ -#define GPIO71_LDD_13 71 /* LCD data pin 13 */ -#define GPIO71_3_6MHz 71 /* 3.6 MHz Oscillator clock */ -#define GPIO72_LDD_14 72 /* LCD data pin 14 */ -#define GPIO72_32kHz 72 /* 32 kHz clock */ -#define GPIO73_LDD_15 73 /* LCD data pin 15 */ -#define GPIO73_MBGNT 73 /* Memory controller grant */ -#define GPIO74_LCD_FCLK 74 /* LCD Frame clock */ -#define GPIO75_LCD_LCLK 75 /* LCD line clock */ -#define GPIO76_LCD_PCLK 76 /* LCD Pixel clock */ -#define GPIO77_LCD_ACBIAS 77 /* LCD AC Bias */ -#define GPIO78_nCS_2 78 /* chip select 2 */ -#define GPIO79_nCS_3 79 /* chip select 3 */ -#define GPIO80_nCS_4 80 /* chip select 4 */ -#define GPIO81_NSCLK 81 /* NSSP clock */ -#define GPIO81_CIF_DD_0 81 /* Camera data pin 0 */ -#define GPIO82_NSFRM 82 /* NSSP Frame */ -#define GPIO82_CIF_DD_5 82 /* Camera data pin 5 */ -#define GPIO83_NSTXD 83 /* NSSP transmit */ -#define GPIO83_CIF_DD_4 83 /* Camera data pin 4 */ -#define GPIO84_NSRXD 84 /* NSSP receive */ -#define GPIO84_CIF_FV 84 /* Camera frame start signal */ -#define GPIO85_nPCE_1 85 /* Card Enable for Card Space (PXA27x) */ -#define GPIO85_CIF_LV 85 /* Camera line start signal */ -#define GPIO90_CIF_DD_4 90 /* Camera data pin 4 */ -#define GPIO91_CIF_DD_5 91 /* Camera data pin 5 */ -#define GPIO92_MMCDAT0 92 /* MMC DAT0 (PXA27x) */ -#define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */ -#define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */ -#define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */ -#define GPIO96_FFRXD 96 /* FFUART recieve */ -#define GPIO98_FFRTS 98 /* FFUART request to send */ -#define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */ -#define GPIO99_FFTXD 99 /* FFUART transmit data */ -#define GPIO100_FFCTS 100 /* FFUART Clear to send */ -#define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ -#define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */ -#define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */ -#define GPIO105_CIF_DD_1 105 /* Camera data pin 1 */ -#define GPIO106_CIF_DD_9 106 /* Camera data pin 9 */ -#define GPIO107_CIF_DD_8 107 /* Camera data pin 8 */ -#define GPIO108_CIF_DD_7 108 /* Camera data pin 7 */ -#define GPIO109_MMCDAT1 109 /* MMC DAT1 (PXA27x) */ -#define GPIO110_MMCDAT2 110 /* MMC DAT2 (PXA27x) */ -#define GPIO110_MMCCS0 110 /* MMC Chip Select 0 (PXA27x) */ -#define GPIO111_MMCDAT3 111 /* MMC DAT3 (PXA27x) */ -#define GPIO111_MMCCS1 111 /* MMC Chip Select 1 (PXA27x) */ -#define GPIO112_MMCCMD 112 /* MMC CMD (PXA27x) */ -#define GPIO113_I2S_SYSCLK 113 /* I2S System Clock (PXA27x) */ -#define GPIO113_AC97_RESET_N 113 /* AC97 NRESET on (PXA27x) */ -#define GPIO114_CIF_DD_1 114 /* Camera data pin 1 */ -#define GPIO115_CIF_DD_3 115 /* Camera data pin 3 */ -#define GPIO116_CIF_DD_2 116 /* Camera data pin 2 */ - -/* GPIO alternate function mode & direction */ - -#define GPIO_IN 0x000 -#define GPIO_OUT 0x080 -#define GPIO_ALT_FN_1_IN 0x100 -#define GPIO_ALT_FN_1_OUT 0x180 -#define GPIO_ALT_FN_2_IN 0x200 -#define GPIO_ALT_FN_2_OUT 0x280 -#define GPIO_ALT_FN_3_IN 0x300 -#define GPIO_ALT_FN_3_OUT 0x380 -#define GPIO_MD_MASK_NR 0x07f -#define GPIO_MD_MASK_DIR 0x080 -#define GPIO_MD_MASK_FN 0x300 -#define GPIO_DFLT_LOW 0x400 -#define GPIO_DFLT_HIGH 0x800 - -#define GPIO1_RTS_MD ( 1 | GPIO_ALT_FN_1_IN) -#define GPIO6_MMCCLK_MD ( 6 | GPIO_ALT_FN_1_OUT) -#define GPIO7_48MHz_MD ( 7 | GPIO_ALT_FN_1_OUT) -#define GPIO8_MMCCS0_MD ( 8 | GPIO_ALT_FN_1_OUT) -#define GPIO9_MMCCS1_MD ( 9 | GPIO_ALT_FN_1_OUT) -#define GPIO10_RTCCLK_MD (10 | GPIO_ALT_FN_1_OUT) -#define GPIO11_3_6MHz_MD (11 | GPIO_ALT_FN_1_OUT) -#define GPIO12_32KHz_MD (12 | GPIO_ALT_FN_1_OUT) -#define GPIO12_CIF_DD_7_MD (12 | GPIO_ALT_FN_2_IN) -#define GPIO13_MBGNT_MD (13 | GPIO_ALT_FN_2_OUT) -#define GPIO14_MBREQ_MD (14 | GPIO_ALT_FN_1_IN) -#define GPIO15_nCS_1_MD (15 | GPIO_ALT_FN_2_OUT) -#define GPIO16_PWM0_MD (16 | GPIO_ALT_FN_2_OUT) -#define GPIO17_PWM1_MD (17 | GPIO_ALT_FN_2_OUT) -#define GPIO17_CIF_DD_6_MD (17 | GPIO_ALT_FN_2_IN) -#define GPIO18_RDY_MD (18 | GPIO_ALT_FN_1_IN) -#define GPIO19_DREQ1_MD (19 | GPIO_ALT_FN_1_IN) -#define GPIO20_DREQ0_MD (20 | GPIO_ALT_FN_1_IN) -#define GPIO23_CIF_MCLK_MD (23 | GPIO_ALT_FN_1_OUT) -#define GPIO23_SCLK_MD (23 | GPIO_ALT_FN_2_OUT) -#define GPIO24_CIF_FV_MD (24 | GPIO_ALT_FN_1_OUT) -#define GPIO24_SFRM_MD (24 | GPIO_ALT_FN_2_OUT) -#define GPIO25_CIF_LV_MD (25 | GPIO_ALT_FN_1_OUT) -#define GPIO25_STXD_MD (25 | GPIO_ALT_FN_2_OUT) -#define GPIO26_SRXD_MD (26 | GPIO_ALT_FN_1_IN) -#define GPIO26_CIF_PCLK_MD (26 | GPIO_ALT_FN_2_IN) -#define GPIO27_SEXTCLK_MD (27 | GPIO_ALT_FN_1_IN) -#define GPIO27_CIF_DD_0_MD (27 | GPIO_ALT_FN_3_IN) -#define GPIO28_BITCLK_AC97_MD (28 | GPIO_ALT_FN_1_IN) -#define GPIO28_BITCLK_IN_I2S_MD (28 | GPIO_ALT_FN_2_IN) -#define GPIO28_BITCLK_OUT_I2S_MD (28 | GPIO_ALT_FN_1_OUT) -#define GPIO29_SDATA_IN_AC97_MD (29 | GPIO_ALT_FN_1_IN) -#define GPIO29_SDATA_IN_I2S_MD (29 | GPIO_ALT_FN_2_IN) -#define GPIO30_SDATA_OUT_AC97_MD (30 | GPIO_ALT_FN_2_OUT) -#define GPIO30_SDATA_OUT_I2S_MD (30 | GPIO_ALT_FN_1_OUT) -#define GPIO31_SYNC_I2S_MD (31 | GPIO_ALT_FN_1_OUT) -#define GPIO31_SYNC_AC97_MD (31 | GPIO_ALT_FN_2_OUT) -#define GPIO32_SDATA_IN1_AC97_MD (32 | GPIO_ALT_FN_1_IN) -#define GPIO32_SYSCLK_I2S_MD (32 | GPIO_ALT_FN_1_OUT) -#define GPIO32_MMCCLK_MD (32 | GPIO_ALT_FN_2_OUT) -#define GPIO33_nCS_5_MD (33 | GPIO_ALT_FN_2_OUT) -#define GPIO34_FFRXD_MD (34 | GPIO_ALT_FN_1_IN) -#define GPIO34_MMCCS0_MD (34 | GPIO_ALT_FN_2_OUT) -#define GPIO35_FFCTS_MD (35 | GPIO_ALT_FN_1_IN) -#define GPIO35_KP_MKOUT6_MD (35 | GPIO_ALT_FN_2_OUT) -#define GPIO36_FFDCD_MD (36 | GPIO_ALT_FN_1_IN) -#define GPIO37_FFDSR_MD (37 | GPIO_ALT_FN_1_IN) -#define GPIO38_FFRI_MD (38 | GPIO_ALT_FN_1_IN) -#define GPIO39_MMCCS1_MD (39 | GPIO_ALT_FN_1_OUT) -#define GPIO39_FFTXD_MD (39 | GPIO_ALT_FN_2_OUT) -#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT) -#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT) -#define GPIO41_KP_MKOUT7_MD (41 | GPIO_ALT_FN_1_OUT) -#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN) -#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN) -#define GPIO42_CIF_MCLK_MD (42 | GPIO_ALT_FN_3_OUT) -#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT) -#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT) -#define GPIO43_CIF_FV_MD (43 | GPIO_ALT_FN_3_OUT) -#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN) -#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN) -#define GPIO44_CIF_LV_MD (44 | GPIO_ALT_FN_3_OUT) -#define GPIO45_CIF_PCLK_MD (45 | GPIO_ALT_FN_3_IN) -#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT) -#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT) -#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT) -#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN) -#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN) -#define GPIO47_CIF_DD_0_MD (47 | GPIO_ALT_FN_1_IN) -#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT) -#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT) -#define GPIO48_CIF_DD_5_MD (48 | GPIO_ALT_FN_1_IN) -#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) -#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT) -#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT) -#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN) -#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT) -#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN) -#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT) -#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN) -#define GPIO50_CIF_DD_3_MD (50 | GPIO_ALT_FN_1_IN) -#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN) -#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT) -#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT) -#define GPIO51_CIF_DD_2_MD (51 | GPIO_ALT_FN_1_IN) -#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT) -#define GPIO52_CIF_DD_4_MD (52 | GPIO_ALT_FN_1_IN) -#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT) -#define GPIO53_MMCCLK_MD (53 | GPIO_ALT_FN_1_OUT) -#define GPIO53_CIF_MCLK_MD (53 | GPIO_ALT_FN_2_OUT) -#define GPIO54_MMCCLK_MD (54 | GPIO_ALT_FN_1_OUT) -#define GPIO54_nPCE_2_MD (54 | GPIO_ALT_FN_2_OUT) -#define GPIO54_pSKTSEL_MD (54 | GPIO_ALT_FN_2_OUT) -#define GPIO54_CIF_PCLK_MD (54 | GPIO_ALT_FN_3_IN) -#define GPIO55_nPREG_MD (55 | GPIO_ALT_FN_2_OUT) -#define GPIO55_CIF_DD_1_MD (55 | GPIO_ALT_FN_1_IN) -#define GPIO56_nPWAIT_MD (56 | GPIO_ALT_FN_1_IN) -#define GPIO57_nIOIS16_MD (57 | GPIO_ALT_FN_1_IN) -#define GPIO58_LDD_0_MD (58 | GPIO_ALT_FN_2_OUT) -#define GPIO59_LDD_1_MD (59 | GPIO_ALT_FN_2_OUT) -#define GPIO60_LDD_2_MD (60 | GPIO_ALT_FN_2_OUT) -#define GPIO61_LDD_3_MD (61 | GPIO_ALT_FN_2_OUT) -#define GPIO62_LDD_4_MD (62 | GPIO_ALT_FN_2_OUT) -#define GPIO63_LDD_5_MD (63 | GPIO_ALT_FN_2_OUT) -#define GPIO64_LDD_6_MD (64 | GPIO_ALT_FN_2_OUT) -#define GPIO65_LDD_7_MD (65 | GPIO_ALT_FN_2_OUT) -#define GPIO66_LDD_8_MD (66 | GPIO_ALT_FN_2_OUT) -#define GPIO66_MBREQ_MD (66 | GPIO_ALT_FN_1_IN) -#define GPIO67_LDD_9_MD (67 | GPIO_ALT_FN_2_OUT) -#define GPIO67_MMCCS0_MD (67 | GPIO_ALT_FN_1_OUT) -#define GPIO68_LDD_10_MD (68 | GPIO_ALT_FN_2_OUT) -#define GPIO68_MMCCS1_MD (68 | GPIO_ALT_FN_1_OUT) -#define GPIO69_LDD_11_MD (69 | GPIO_ALT_FN_2_OUT) -#define GPIO69_MMCCLK_MD (69 | GPIO_ALT_FN_1_OUT) -#define GPIO70_LDD_12_MD (70 | GPIO_ALT_FN_2_OUT) -#define GPIO70_RTCCLK_MD (70 | GPIO_ALT_FN_1_OUT) -#define GPIO71_LDD_13_MD (71 | GPIO_ALT_FN_2_OUT) -#define GPIO71_3_6MHz_MD (71 | GPIO_ALT_FN_1_OUT) -#define GPIO72_LDD_14_MD (72 | GPIO_ALT_FN_2_OUT) -#define GPIO72_32kHz_MD (72 | GPIO_ALT_FN_1_OUT) -#define GPIO73_LDD_15_MD (73 | GPIO_ALT_FN_2_OUT) -#define GPIO73_MBGNT_MD (73 | GPIO_ALT_FN_1_OUT) -#define GPIO74_LCD_FCLK_MD (74 | GPIO_ALT_FN_2_OUT) -#define GPIO75_LCD_LCLK_MD (75 | GPIO_ALT_FN_2_OUT) -#define GPIO76_LCD_PCLK_MD (76 | GPIO_ALT_FN_2_OUT) -#define GPIO77_LCD_ACBIAS_MD (77 | GPIO_ALT_FN_2_OUT) -#define GPIO78_nCS_2_MD (78 | GPIO_ALT_FN_2_OUT) -#define GPIO78_nPCE_2_MD (78 | GPIO_ALT_FN_1_OUT) -#define GPIO79_nCS_3_MD (79 | GPIO_ALT_FN_2_OUT) -#define GPIO79_pSKTSEL_MD (79 | GPIO_ALT_FN_1_OUT) -#define GPIO80_nCS_4_MD (80 | GPIO_ALT_FN_2_OUT) -#define GPIO81_NSSP_CLK_OUT (81 | GPIO_ALT_FN_1_OUT) -#define GPIO81_NSSP_CLK_IN (81 | GPIO_ALT_FN_1_IN) -#define GPIO81_CIF_DD_0_MD (81 | GPIO_ALT_FN_2_IN) -#define GPIO82_NSSP_FRM_OUT (82 | GPIO_ALT_FN_1_OUT) -#define GPIO82_NSSP_FRM_IN (82 | GPIO_ALT_FN_1_IN) -#define GPIO82_CIF_DD_5_MD (82 | GPIO_ALT_FN_3_IN) -#define GPIO83_NSSP_TX (83 | GPIO_ALT_FN_1_OUT) -#define GPIO83_NSSP_RX (83 | GPIO_ALT_FN_2_IN) -#define GPIO83_CIF_DD_4_MD (83 | GPIO_ALT_FN_3_IN) -#define GPIO84_NSSP_TX (84 | GPIO_ALT_FN_1_OUT) -#define GPIO84_NSSP_RX (84 | GPIO_ALT_FN_2_IN) -#define GPIO84_CIF_FV_MD (84 | GPIO_ALT_FN_3_IN) -#define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) -#define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) -#define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) -#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN) -#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT) -#define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN) -#define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN) -#define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) -#define GPIO93_CIF_DD_6_MD (93 | GPIO_ALT_FN_2_IN) -#define GPIO94_CIF_DD_5_MD (94 | GPIO_ALT_FN_2_IN) -#define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN) -#define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) -#define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) -#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN) -#define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) -#define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN) -#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT) -#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT) -#define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) -#define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) -#define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) -#define GPIO102_KP_MKIN2_MD (102 | GPIO_ALT_FN_1_IN) -#define GPIO103_CIF_DD_3_MD (103 | GPIO_ALT_FN_1_IN) -#define GPIO103_KP_MKOUT0_MD (103 | GPIO_ALT_FN_2_OUT) -#define GPIO104_CIF_DD_2_MD (104 | GPIO_ALT_FN_1_IN) -#define GPIO104_pSKTSEL_MD (104 | GPIO_ALT_FN_1_OUT) -#define GPIO104_KP_MKOUT1_MD (104 | GPIO_ALT_FN_2_OUT) -#define GPIO105_CIF_DD_1_MD (105 | GPIO_ALT_FN_1_IN) -#define GPIO105_KP_MKOUT2_MD (105 | GPIO_ALT_FN_2_OUT) -#define GPIO106_CIF_DD_9_MD (106 | GPIO_ALT_FN_1_IN) -#define GPIO106_KP_MKOUT3_MD (106 | GPIO_ALT_FN_2_OUT) -#define GPIO107_CIF_DD_8_MD (107 | GPIO_ALT_FN_1_IN) -#define GPIO107_KP_MKOUT4_MD (107 | GPIO_ALT_FN_2_OUT) -#define GPIO108_CIF_DD_7_MD (108 | GPIO_ALT_FN_1_IN) -#define GPIO108_KP_MKOUT5_MD (108 | GPIO_ALT_FN_2_OUT) -#define GPIO109_MMCDAT1_MD (109 | GPIO_ALT_FN_1_OUT) -#define GPIO110_MMCDAT2_MD (110 | GPIO_ALT_FN_1_OUT) -#define GPIO110_MMCCS0_MD (110 | GPIO_ALT_FN_1_OUT) -#define GPIO111_MMCDAT3_MD (111 | GPIO_ALT_FN_1_OUT) -#define GPIO110_MMCCS1_MD (111 | GPIO_ALT_FN_1_OUT) -#define GPIO112_MMCCMD_MD (112 | GPIO_ALT_FN_1_OUT) -#define GPIO113_I2S_SYSCLK_MD (113 | GPIO_ALT_FN_1_OUT) -#define GPIO113_AC97_RESET_N_MD (113 | GPIO_ALT_FN_2_OUT) -#define GPIO117_I2CSCL_MD (117 | GPIO_ALT_FN_1_IN) -#define GPIO118_I2CSDA_MD (118 | GPIO_ALT_FN_1_IN) - -#endif /* __ASM_ARCH_PXA2XX_GPIO_H */ diff --git a/include/asm-arm/arch-pxa/pxa2xx-regs.h b/include/asm-arm/arch-pxa/pxa2xx-regs.h deleted file mode 100644 index 73e0a32..0000000 --- a/include/asm-arm/arch-pxa/pxa2xx-regs.h +++ /dev/null @@ -1,246 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa2xx-regs.h - * - * Taken from pxa-regs.h by Russell King - * - * Author: Nicolas Pitre - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __PXA2XX_REGS_H -#define __PXA2XX_REGS_H - -/* - * Memory controller - */ - -#define MDCNFG __REG(0x48000000) /* SDRAM Configuration Register 0 */ -#define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */ -#define MSC0 __REG(0x48000008) /* Static Memory Control Register 0 */ -#define MSC1 __REG(0x4800000C) /* Static Memory Control Register 1 */ -#define MSC2 __REG(0x48000010) /* Static Memory Control Register 2 */ -#define MECR __REG(0x48000014) /* Expansion Memory (PCMCIA/Compact Flash) Bus Configuration */ -#define SXLCR __REG(0x48000018) /* LCR value to be written to SDRAM-Timing Synchronous Flash */ -#define SXCNFG __REG(0x4800001C) /* Synchronous Static Memory Control Register */ -#define SXMRS __REG(0x48000024) /* MRS value to be written to Synchronous Flash or SMROM */ -#define MCMEM0 __REG(0x48000028) /* Card interface Common Memory Space Socket 0 Timing */ -#define MCMEM1 __REG(0x4800002C) /* Card interface Common Memory Space Socket 1 Timing */ -#define MCATT0 __REG(0x48000030) /* Card interface Attribute Space Socket 0 Timing Configuration */ -#define MCATT1 __REG(0x48000034) /* Card interface Attribute Space Socket 1 Timing Configuration */ -#define MCIO0 __REG(0x48000038) /* Card interface I/O Space Socket 0 Timing Configuration */ -#define MCIO1 __REG(0x4800003C) /* Card interface I/O Space Socket 1 Timing Configuration */ -#define MDMRS __REG(0x48000040) /* MRS value to be written to SDRAM */ -#define BOOT_DEF __REG(0x48000044) /* Read-Only Boot-Time Register. Contains BOOT_SEL and PKG_SEL */ - -/* - * More handy macros for PCMCIA - * - * Arg is socket number - */ -#define MCMEM(s) __REG2(0x48000028, (s)<<2 ) /* Card interface Common Memory Space Socket s Timing */ -#define MCATT(s) __REG2(0x48000030, (s)<<2 ) /* Card interface Attribute Space Socket s Timing Configuration */ -#define MCIO(s) __REG2(0x48000038, (s)<<2 ) /* Card interface I/O Space Socket s Timing Configuration */ - -/* MECR register defines */ -#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ -#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ - -#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */ -#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ -#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ -#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ -#define MDREFR_SLFRSH (1 << 22) /* SDRAM Self-Refresh Control/Status */ -#define MDREFR_APD (1 << 20) /* SDRAM/SSRAM Auto-Power-Down Enable */ -#define MDREFR_K2DB2 (1 << 19) /* SDCLK2 Divide by 2 Control/Status */ -#define MDREFR_K2RUN (1 << 18) /* SDCLK2 Run Control/Status */ -#define MDREFR_K1DB2 (1 << 17) /* SDCLK1 Divide by 2 Control/Status */ -#define MDREFR_K1RUN (1 << 16) /* SDCLK1 Run Control/Status */ -#define MDREFR_E1PIN (1 << 15) /* SDCKE1 Level Control/Status */ -#define MDREFR_K0DB2 (1 << 14) /* SDCLK0 Divide by 2 Control/Status */ -#define MDREFR_K0RUN (1 << 13) /* SDCLK0 Run Control/Status */ -#define MDREFR_E0PIN (1 << 12) /* SDCKE0 Level Control/Status */ - - -#ifdef CONFIG_PXA27x - -#define ARB_CNTRL __REG(0x48000048) /* Arbiter Control Register */ - -#define ARB_DMA_SLV_PARK (1<<31) /* Be parked with DMA slave when idle */ -#define ARB_CI_PARK (1<<30) /* Be parked with Camera Interface when idle */ -#define ARB_EX_MEM_PARK (1<<29) /* Be parked with external MEMC when idle */ -#define ARB_INT_MEM_PARK (1<<28) /* Be parked with internal MEMC when idle */ -#define ARB_USB_PARK (1<<27) /* Be parked with USB when idle */ -#define ARB_LCD_PARK (1<<26) /* Be parked with LCD when idle */ -#define ARB_DMA_PARK (1<<25) /* Be parked with DMA when idle */ -#define ARB_CORE_PARK (1<<24) /* Be parked with core when idle */ -#define ARB_LOCK_FLAG (1<<23) /* Only Locking masters gain access to the bus */ - -#endif - - -/* - * Power Manager - */ - -#define PMCR __REG(0x40F00000) /* Power Manager Control Register */ -#define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */ -#define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */ -#define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */ -#define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */ -#define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */ -#define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */ -#define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */ -#define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */ -#define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */ -#define PGSR2 __REG(0x40F00028) /* Power Manager GPIO Sleep State Register for GP[84-64] */ -#define PGSR3 __REG(0x40F0002C) /* Power Manager GPIO Sleep State Register for GP[118-96] */ -#define RCSR __REG(0x40F00030) /* Reset Controller Status Register */ - -#define PSLR __REG(0x40F00034) /* Power Manager Sleep Config Register */ -#define PSTR __REG(0x40F00038) /* Power Manager Standby Config Register */ -#define PSNR __REG(0x40F0003C) /* Power Manager Sense Config Register */ -#define PVCR __REG(0x40F00040) /* Power Manager VoltageControl Register */ -#define PKWR __REG(0x40F00050) /* Power Manager KB Wake-up Enable Reg */ -#define PKSR __REG(0x40F00054) /* Power Manager KB Level-Detect Register */ -#define PCMD(x) __REG2(0x40F00080, (x)<<2) -#define PCMD0 __REG(0x40F00080 + 0 * 4) -#define PCMD1 __REG(0x40F00080 + 1 * 4) -#define PCMD2 __REG(0x40F00080 + 2 * 4) -#define PCMD3 __REG(0x40F00080 + 3 * 4) -#define PCMD4 __REG(0x40F00080 + 4 * 4) -#define PCMD5 __REG(0x40F00080 + 5 * 4) -#define PCMD6 __REG(0x40F00080 + 6 * 4) -#define PCMD7 __REG(0x40F00080 + 7 * 4) -#define PCMD8 __REG(0x40F00080 + 8 * 4) -#define PCMD9 __REG(0x40F00080 + 9 * 4) -#define PCMD10 __REG(0x40F00080 + 10 * 4) -#define PCMD11 __REG(0x40F00080 + 11 * 4) -#define PCMD12 __REG(0x40F00080 + 12 * 4) -#define PCMD13 __REG(0x40F00080 + 13 * 4) -#define PCMD14 __REG(0x40F00080 + 14 * 4) -#define PCMD15 __REG(0x40F00080 + 15 * 4) -#define PCMD16 __REG(0x40F00080 + 16 * 4) -#define PCMD17 __REG(0x40F00080 + 17 * 4) -#define PCMD18 __REG(0x40F00080 + 18 * 4) -#define PCMD19 __REG(0x40F00080 + 19 * 4) -#define PCMD20 __REG(0x40F00080 + 20 * 4) -#define PCMD21 __REG(0x40F00080 + 21 * 4) -#define PCMD22 __REG(0x40F00080 + 22 * 4) -#define PCMD23 __REG(0x40F00080 + 23 * 4) -#define PCMD24 __REG(0x40F00080 + 24 * 4) -#define PCMD25 __REG(0x40F00080 + 25 * 4) -#define PCMD26 __REG(0x40F00080 + 26 * 4) -#define PCMD27 __REG(0x40F00080 + 27 * 4) -#define PCMD28 __REG(0x40F00080 + 28 * 4) -#define PCMD29 __REG(0x40F00080 + 29 * 4) -#define PCMD30 __REG(0x40F00080 + 30 * 4) -#define PCMD31 __REG(0x40F00080 + 31 * 4) - -#define PCMD_MBC (1<<12) -#define PCMD_DCE (1<<11) -#define PCMD_LC (1<<10) -/* FIXME: PCMD_SQC need be checked. */ -#define PCMD_SQC (3<<8) /* currently only bit 8 is changeable, - bit 9 should be 0 all day. */ -#define PVCR_VCSA (0x1<<14) -#define PVCR_CommandDelay (0xf80) -#define PCFR_PI2C_EN (0x1 << 6) - -#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ -#define PSSR_RDH (1 << 5) /* Read Disable Hold */ -#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ -#define PSSR_STS (1 << 3) /* Standby Mode Status */ -#define PSSR_VFS (1 << 2) /* VDD Fault Status */ -#define PSSR_BFS (1 << 1) /* Battery Fault Status */ -#define PSSR_SSS (1 << 0) /* Software Sleep Status */ - -#define PSLR_SL_ROD (1 << 20) /* Sleep-Mode/Depp-Sleep Mode nRESET_OUT Disable */ - -#define PCFR_RO (1 << 15) /* RDH Override */ -#define PCFR_PO (1 << 14) /* PH Override */ -#define PCFR_GPROD (1 << 12) /* GPIO nRESET_OUT Disable */ -#define PCFR_L1_EN (1 << 11) /* Sleep Mode L1 converter Enable */ -#define PCFR_FVC (1 << 10) /* Frequency/Voltage Change */ -#define PCFR_DC_EN (1 << 7) /* Sleep/deep-sleep DC-DC Converter Enable */ -#define PCFR_PI2CEN (1 << 6) /* Enable PI2C controller */ -#define PCFR_GPR_EN (1 << 4) /* nRESET_GPIO Pin Enable */ -#define PCFR_DS (1 << 3) /* Deep Sleep Mode */ -#define PCFR_FS (1 << 2) /* Float Static Chip Selects */ -#define PCFR_FP (1 << 1) /* Float PCMCIA controls */ -#define PCFR_OPDE (1 << 0) /* 3.6864 MHz oscillator power-down enable */ - -#define RCSR_GPR (1 << 3) /* GPIO Reset */ -#define RCSR_SMR (1 << 2) /* Sleep Mode */ -#define RCSR_WDR (1 << 1) /* Watchdog Reset */ -#define RCSR_HWR (1 << 0) /* Hardware Reset */ - -#define PWER_GPIO(Nb) (1 << Nb) /* GPIO [0..15] wake-up enable */ -#define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */ -#define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */ -#define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */ -#define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */ -#define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */ -#define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */ -#define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */ -#define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */ -#define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */ -#define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */ -#define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */ -#define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */ -#define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */ -#define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */ -#define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */ -#define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */ -#define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */ - -/* - * PXA2xx specific Core clock definitions - */ -#define CCCR __REG(0x41300000) /* Core Clock Configuration Register */ -#define CCSR __REG(0x4130000C) /* Core Clock Status Register */ -#define CKEN __REG(0x41300004) /* Clock Enable Register */ -#define OSCC __REG(0x41300008) /* Oscillator Configuration Register */ - -#define CCCR_N_MASK 0x0380 /* Run Mode Frequency to Turbo Mode Frequency Multiplier */ -#define CCCR_M_MASK 0x0060 /* Memory Frequency to Run Mode Frequency Multiplier */ -#define CCCR_L_MASK 0x001f /* Crystal Frequency to Memory Frequency Multiplier */ - -#define CKEN_AC97CONF (31) /* AC97 Controller Configuration */ -#define CKEN_CAMERA (24) /* Camera Interface Clock Enable */ -#define CKEN_SSP1 (23) /* SSP1 Unit Clock Enable */ -#define CKEN_MEMC (22) /* Memory Controller Clock Enable */ -#define CKEN_MEMSTK (21) /* Memory Stick Host Controller */ -#define CKEN_IM (20) /* Internal Memory Clock Enable */ -#define CKEN_KEYPAD (19) /* Keypad Interface Clock Enable */ -#define CKEN_USIM (18) /* USIM Unit Clock Enable */ -#define CKEN_MSL (17) /* MSL Unit Clock Enable */ -#define CKEN_LCD (16) /* LCD Unit Clock Enable */ -#define CKEN_PWRI2C (15) /* PWR I2C Unit Clock Enable */ -#define CKEN_I2C (14) /* I2C Unit Clock Enable */ -#define CKEN_FICP (13) /* FICP Unit Clock Enable */ -#define CKEN_MMC (12) /* MMC Unit Clock Enable */ -#define CKEN_USB (11) /* USB Unit Clock Enable */ -#define CKEN_ASSP (10) /* ASSP (SSP3) Clock Enable */ -#define CKEN_USBHOST (10) /* USB Host Unit Clock Enable */ -#define CKEN_OSTIMER (9) /* OS Timer Unit Clock Enable */ -#define CKEN_NSSP (9) /* NSSP (SSP2) Clock Enable */ -#define CKEN_I2S (8) /* I2S Unit Clock Enable */ -#define CKEN_BTUART (7) /* BTUART Unit Clock Enable */ -#define CKEN_FFUART (6) /* FFUART Unit Clock Enable */ -#define CKEN_STUART (5) /* STUART Unit Clock Enable */ -#define CKEN_HWUART (4) /* HWUART Unit Clock Enable */ -#define CKEN_SSP3 (4) /* SSP3 Unit Clock Enable */ -#define CKEN_SSP (3) /* SSP Unit Clock Enable */ -#define CKEN_SSP2 (3) /* SSP2 Unit Clock Enable */ -#define CKEN_AC97 (2) /* AC97 Unit Clock Enable */ -#define CKEN_PWM1 (1) /* PWM1 Clock Enable */ -#define CKEN_PWM0 (0) /* PWM0 Clock Enable */ - -#define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */ -#define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */ - -#endif diff --git a/include/asm-arm/arch-pxa/pxa2xx_spi.h b/include/asm-arm/arch-pxa/pxa2xx_spi.h deleted file mode 100644 index 2206cb6..0000000 --- a/include/asm-arm/arch-pxa/pxa2xx_spi.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef PXA2XX_SPI_H_ -#define PXA2XX_SPI_H_ - -#define PXA2XX_CS_ASSERT (0x01) -#define PXA2XX_CS_DEASSERT (0x02) - -/* device.platform_data for SSP controller devices */ -struct pxa2xx_spi_master { - u32 clock_enable; - u16 num_chipselect; - u8 enable_dma; -}; - -/* spi_board_info.controller_data for SPI slave devices, - * copied to spi_device.platform_data ... mostly for dma tuning - */ -struct pxa2xx_spi_chip { - u8 tx_threshold; - u8 rx_threshold; - u8 dma_burst_size; - u32 timeout; - u8 enable_loopback; - void (*cs_control)(u32 command); -}; - -extern void pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info); - -#endif /*PXA2XX_SPI_H_*/ diff --git a/include/asm-arm/arch-pxa/pxa3xx-regs.h b/include/asm-arm/arch-pxa/pxa3xx-regs.h deleted file mode 100644 index fe9364c..0000000 --- a/include/asm-arm/arch-pxa/pxa3xx-regs.h +++ /dev/null @@ -1,183 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxa3xx-regs.h - * - * PXA3xx specific register definitions - * - * Copyright (C) 2007 Marvell International Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_PXA3XX_REGS_H -#define __ASM_ARCH_PXA3XX_REGS_H - -/* - * Oscillator Configuration Register (OSCC) - */ -#define OSCC __REG(0x41350000) /* Oscillator Configuration Register */ - -#define OSCC_PEN (1 << 11) /* 13MHz POUT */ - - -/* - * Service Power Management Unit (MPMU) - */ -#define PMCR __REG(0x40F50000) /* Power Manager Control Register */ -#define PSR __REG(0x40F50004) /* Power Manager S2 Status Register */ -#define PSPR __REG(0x40F50008) /* Power Manager Scratch Pad Register */ -#define PCFR __REG(0x40F5000C) /* Power Manager General Configuration Register */ -#define PWER __REG(0x40F50010) /* Power Manager Wake-up Enable Register */ -#define PWSR __REG(0x40F50014) /* Power Manager Wake-up Status Register */ -#define PECR __REG(0x40F50018) /* Power Manager EXT_WAKEUP[1:0] Control Register */ -#define DCDCSR __REG(0x40F50080) /* DC-DC Controller Status Register */ -#define PVCR __REG(0x40F50100) /* Power Manager Voltage Change Control Register */ -#define PCMD(x) __REG(0x40F50110 + ((x) << 2)) - -/* - * Slave Power Managment Unit - */ -#define ASCR __REG(0x40f40000) /* Application Subsystem Power Status/Configuration */ -#define ARSR __REG(0x40f40004) /* Application Subsystem Reset Status */ -#define AD3ER __REG(0x40f40008) /* Application Subsystem Wake-Up from D3 Enable */ -#define AD3SR __REG(0x40f4000c) /* Application Subsystem Wake-Up from D3 Status */ -#define AD2D0ER __REG(0x40f40010) /* Application Subsystem Wake-Up from D2 to D0 Enable */ -#define AD2D0SR __REG(0x40f40014) /* Application Subsystem Wake-Up from D2 to D0 Status */ -#define AD2D1ER __REG(0x40f40018) /* Application Subsystem Wake-Up from D2 to D1 Enable */ -#define AD2D1SR __REG(0x40f4001c) /* Application Subsystem Wake-Up from D2 to D1 Status */ -#define AD1D0ER __REG(0x40f40020) /* Application Subsystem Wake-Up from D1 to D0 Enable */ -#define AD1D0SR __REG(0x40f40024) /* Application Subsystem Wake-Up from D1 to D0 Status */ -#define AGENP __REG(0x40f4002c) /* Application Subsystem General Purpose */ -#define AD3R __REG(0x40f40030) /* Application Subsystem D3 Configuration */ -#define AD2R __REG(0x40f40034) /* Application Subsystem D2 Configuration */ -#define AD1R __REG(0x40f40038) /* Application Subsystem D1 Configuration */ - -/* - * Application Subsystem Configuration bits. - */ -#define ASCR_RDH (1 << 31) -#define ASCR_D1S (1 << 2) -#define ASCR_D2S (1 << 1) -#define ASCR_D3S (1 << 0) - -/* - * Application Reset Status bits. - */ -#define ARSR_GPR (1 << 3) -#define ARSR_LPMR (1 << 2) -#define ARSR_WDT (1 << 1) -#define ARSR_HWR (1 << 0) - -/* - * Application Subsystem Wake-Up bits. - */ -#define ADXER_WRTC (1 << 31) /* RTC */ -#define ADXER_WOST (1 << 30) /* OS Timer */ -#define ADXER_WTSI (1 << 29) /* Touchscreen */ -#define ADXER_WUSBH (1 << 28) /* USB host */ -#define ADXER_WUSB2 (1 << 26) /* USB client 2.0 */ -#define ADXER_WMSL0 (1 << 24) /* MSL port 0*/ -#define ADXER_WDMUX3 (1 << 23) /* USB EDMUX3 */ -#define ADXER_WDMUX2 (1 << 22) /* USB EDMUX2 */ -#define ADXER_WKP (1 << 21) /* Keypad */ -#define ADXER_WUSIM1 (1 << 20) /* USIM Port 1 */ -#define ADXER_WUSIM0 (1 << 19) /* USIM Port 0 */ -#define ADXER_WOTG (1 << 16) /* USBOTG input */ -#define ADXER_MFP_WFLASH (1 << 15) /* MFP: Data flash busy */ -#define ADXER_MFP_GEN12 (1 << 14) /* MFP: MMC3/GPIO/OST inputs */ -#define ADXER_MFP_WMMC2 (1 << 13) /* MFP: MMC2 */ -#define ADXER_MFP_WMMC1 (1 << 12) /* MFP: MMC1 */ -#define ADXER_MFP_WI2C (1 << 11) /* MFP: I2C */ -#define ADXER_MFP_WSSP4 (1 << 10) /* MFP: SSP4 */ -#define ADXER_MFP_WSSP3 (1 << 9) /* MFP: SSP3 */ -#define ADXER_MFP_WMAXTRIX (1 << 8) /* MFP: matrix keypad */ -#define ADXER_MFP_WUART3 (1 << 7) /* MFP: UART3 */ -#define ADXER_MFP_WUART2 (1 << 6) /* MFP: UART2 */ -#define ADXER_MFP_WUART1 (1 << 5) /* MFP: UART1 */ -#define ADXER_MFP_WSSP2 (1 << 4) /* MFP: SSP2 */ -#define ADXER_MFP_WSSP1 (1 << 3) /* MFP: SSP1 */ -#define ADXER_MFP_WAC97 (1 << 2) /* MFP: AC97 */ -#define ADXER_WEXTWAKE1 (1 << 1) /* External Wake 1 */ -#define ADXER_WEXTWAKE0 (1 << 0) /* External Wake 0 */ - -/* - * AD3R/AD2R/AD1R bits. R2-R5 are only defined for PXA320. - */ -#define ADXR_L2 (1 << 8) -#define ADXR_R5 (1 << 5) -#define ADXR_R4 (1 << 4) -#define ADXR_R3 (1 << 3) -#define ADXR_R2 (1 << 2) -#define ADXR_R1 (1 << 1) -#define ADXR_R0 (1 << 0) - -/* - * Values for PWRMODE CP15 register - */ -#define PXA3xx_PM_S3D4C4 0x07 /* aka deep sleep */ -#define PXA3xx_PM_S2D3C4 0x06 /* aka sleep */ -#define PXA3xx_PM_S0D2C2 0x03 /* aka standby */ -#define PXA3xx_PM_S0D1C2 0x02 /* aka LCD refresh */ -#define PXA3xx_PM_S0D0C1 0x01 - -/* - * Application Subsystem Clock - */ -#define ACCR __REG(0x41340000) /* Application Subsystem Clock Configuration Register */ -#define ACSR __REG(0x41340004) /* Application Subsystem Clock Status Register */ -#define AICSR __REG(0x41340008) /* Application Subsystem Interrupt Control/Status Register */ -#define CKENA __REG(0x4134000C) /* A Clock Enable Register */ -#define CKENB __REG(0x41340010) /* B Clock Enable Register */ -#define AC97_DIV __REG(0x41340014) /* AC97 clock divisor value register */ - -/* - * Clock Enable Bit - */ -#define CKEN_LCD 1 /* < LCD Clock Enable */ -#define CKEN_USBH 2 /* < USB host clock enable */ -#define CKEN_CAMERA 3 /* < Camera interface clock enable */ -#define CKEN_NAND 4 /* < NAND Flash Controller Clock Enable */ -#define CKEN_USB2 6 /* < USB 2.0 client clock enable. */ -#define CKEN_DMC 8 /* < Dynamic Memory Controller clock enable */ -#define CKEN_SMC 9 /* < Static Memory Controller clock enable */ -#define CKEN_ISC 10 /* < Internal SRAM Controller clock enable */ -#define CKEN_BOOT 11 /* < Boot rom clock enable */ -#define CKEN_MMC1 12 /* < MMC1 Clock enable */ -#define CKEN_MMC2 13 /* < MMC2 clock enable */ -#define CKEN_KEYPAD 14 /* < Keypand Controller Clock Enable */ -#define CKEN_CIR 15 /* < Consumer IR Clock Enable */ -#define CKEN_USIM0 17 /* < USIM[0] Clock Enable */ -#define CKEN_USIM1 18 /* < USIM[1] Clock Enable */ -#define CKEN_TPM 19 /* < TPM clock enable */ -#define CKEN_UDC 20 /* < UDC clock enable */ -#define CKEN_BTUART 21 /* < BTUART clock enable */ -#define CKEN_FFUART 22 /* < FFUART clock enable */ -#define CKEN_STUART 23 /* < STUART clock enable */ -#define CKEN_AC97 24 /* < AC97 clock enable */ -#define CKEN_TOUCH 25 /* < Touch screen Interface Clock Enable */ -#define CKEN_SSP1 26 /* < SSP1 clock enable */ -#define CKEN_SSP2 27 /* < SSP2 clock enable */ -#define CKEN_SSP3 28 /* < SSP3 clock enable */ -#define CKEN_SSP4 29 /* < SSP4 clock enable */ -#define CKEN_MSL0 30 /* < MSL0 clock enable */ -#define CKEN_PWM0 32 /* < PWM[0] clock enable */ -#define CKEN_PWM1 33 /* < PWM[1] clock enable */ -#define CKEN_I2C 36 /* < I2C clock enable */ -#define CKEN_INTC 38 /* < Interrupt controller clock enable */ -#define CKEN_GPIO 39 /* < GPIO clock enable */ -#define CKEN_1WIRE 40 /* < 1-wire clock enable */ -#define CKEN_HSIO2 41 /* < HSIO2 clock enable */ -#define CKEN_MINI_IM 48 /* < Mini-IM */ -#define CKEN_MINI_LCD 49 /* < Mini LCD */ - -#if defined(CONFIG_CPU_PXA310) -#define CKEN_MMC3 5 /* < MMC3 Clock Enable */ -#define CKEN_MVED 43 /* < MVED clock enable */ -#endif - -/* Note: GCU clock enable bit differs on PXA300/PXA310 and PXA320 */ -#define PXA300_CKEN_GRAPHICS 42 /* Graphics controller clock enable */ -#define PXA320_CKEN_GRAPHICS 7 /* Graphics controller clock enable */ - -#endif /* __ASM_ARCH_PXA3XX_REGS_H */ diff --git a/include/asm-arm/arch-pxa/pxa3xx_nand.h b/include/asm-arm/arch-pxa/pxa3xx_nand.h deleted file mode 100644 index eb4b190..0000000 --- a/include/asm-arm/arch-pxa/pxa3xx_nand.h +++ /dev/null @@ -1,20 +0,0 @@ -#ifndef __ASM_ARCH_PXA3XX_NAND_H -#define __ASM_ARCH_PXA3XX_NAND_H - -#include -#include - -struct pxa3xx_nand_platform_data { - - /* the data flash bus is shared between the Static Memory - * Controller and the Data Flash Controller, the arbiter - * controls the ownership of the bus - */ - int enable_arbiter; - - struct mtd_partition *parts; - unsigned int nr_parts; -}; - -extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); -#endif /* __ASM_ARCH_PXA3XX_NAND_H */ diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h deleted file mode 100644 index daf018d..0000000 --- a/include/asm-arm/arch-pxa/pxafb.h +++ /dev/null @@ -1,151 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/pxafb.h - * - * Support for the xscale frame buffer. - * - * Author: Jean-Frederic Clere - * Created: Sep 22, 2003 - * Copyright: jfclere@sinix.net - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include - -/* - * Supported LCD connections - * - * bits 0 - 3: for LCD panel type: - * - * STN - for passive matrix - * DSTN - for dual scan passive matrix - * TFT - for active matrix - * - * bits 4 - 9 : for bus width - * bits 10-17 : for AC Bias Pin Frequency - * bit 18 : for output enable polarity - * bit 19 : for pixel clock edge - */ -#define LCD_CONN_TYPE(_x) ((_x) & 0x0f) -#define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) - -#define LCD_TYPE_UNKNOWN 0 -#define LCD_TYPE_MONO_STN 1 -#define LCD_TYPE_MONO_DSTN 2 -#define LCD_TYPE_COLOR_STN 3 -#define LCD_TYPE_COLOR_DSTN 4 -#define LCD_TYPE_COLOR_TFT 5 -#define LCD_TYPE_SMART_PANEL 6 -#define LCD_TYPE_MAX 7 - -#define LCD_MONO_STN_4BPP ((4 << 4) | LCD_TYPE_MONO_STN) -#define LCD_MONO_STN_8BPP ((8 << 4) | LCD_TYPE_MONO_STN) -#define LCD_MONO_DSTN_8BPP ((8 << 4) | LCD_TYPE_MONO_DSTN) -#define LCD_COLOR_STN_8BPP ((8 << 4) | LCD_TYPE_COLOR_STN) -#define LCD_COLOR_DSTN_16BPP ((16 << 4) | LCD_TYPE_COLOR_DSTN) -#define LCD_COLOR_TFT_16BPP ((16 << 4) | LCD_TYPE_COLOR_TFT) -#define LCD_COLOR_TFT_18BPP ((18 << 4) | LCD_TYPE_COLOR_TFT) -#define LCD_SMART_PANEL_8BPP ((8 << 4) | LCD_TYPE_SMART_PANEL) -#define LCD_SMART_PANEL_16BPP ((16 << 4) | LCD_TYPE_SMART_PANEL) -#define LCD_SMART_PANEL_18BPP ((18 << 4) | LCD_TYPE_SMART_PANEL) - -#define LCD_AC_BIAS_FREQ(x) (((x) & 0xff) << 10) -#define LCD_BIAS_ACTIVE_HIGH (0 << 17) -#define LCD_BIAS_ACTIVE_LOW (1 << 17) -#define LCD_PCLK_EDGE_RISE (0 << 18) -#define LCD_PCLK_EDGE_FALL (1 << 18) - -/* - * This structure describes the machine which we are running on. - * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine - * of linux/drivers/video/pxafb.c - */ -struct pxafb_mode_info { - u_long pixclock; - - u_short xres; - u_short yres; - - u_char bpp; - u_int cmap_greyscale:1, - depth:8, - unused:23; - - /* Parallel Mode Timing */ - u_char hsync_len; - u_char left_margin; - u_char right_margin; - - u_char vsync_len; - u_char upper_margin; - u_char lower_margin; - u_char sync; - - /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details - * Note: - * 1. all parameters in nanosecond (ns) - * 2. a0cs{rd,wr}_set_hld are controlled by the same register bits - * in pxa27x and pxa3xx, initialize them to the same value or - * the larger one will be used - * 3. same to {rd,wr}_pulse_width - */ - unsigned a0csrd_set_hld; /* A0 and CS Setup/Hold Time before/after L_FCLK_RD */ - unsigned a0cswr_set_hld; /* A0 and CS Setup/Hold Time before/after L_PCLK_WR */ - unsigned wr_pulse_width; /* L_PCLK_WR pulse width */ - unsigned rd_pulse_width; /* L_FCLK_RD pulse width */ - unsigned cmd_inh_time; /* Command Inhibit time between two writes */ - unsigned op_hold_time; /* Output Hold time from L_FCLK_RD negation */ -}; - -struct pxafb_mach_info { - struct pxafb_mode_info *modes; - unsigned int num_modes; - - unsigned int lcd_conn; - - u_int fixed_modes:1, - cmap_inverse:1, - cmap_static:1, - unused:29; - - /* The following should be defined in LCCR0 - * LCCR0_Act or LCCR0_Pas Active or Passive - * LCCR0_Sngl or LCCR0_Dual Single/Dual panel - * LCCR0_Mono or LCCR0_Color Mono/Color - * LCCR0_4PixMono or LCCR0_8PixMono (in mono single mode) - * LCCR0_DMADel(Tcpu) (optional) DMA request delay - * - * The following should not be defined in LCCR0: - * LCCR0_OUM, LCCR0_BM, LCCR0_QDM, LCCR0_DIS, LCCR0_EFM - * LCCR0_IUM, LCCR0_SFM, LCCR0_LDM, LCCR0_ENB - */ - u_int lccr0; - /* The following should be defined in LCCR3 - * LCCR3_OutEnH or LCCR3_OutEnL Output enable polarity - * LCCR3_PixRsEdg or LCCR3_PixFlEdg Pixel clock edge type - * LCCR3_Acb(X) AB Bias pin frequency - * LCCR3_DPC (optional) Double Pixel Clock mode (untested) - * - * The following should not be defined in LCCR3 - * LCCR3_HSP, LCCR3_VSP, LCCR0_Pcd(x), LCCR3_Bpp - */ - u_int lccr3; - /* The following should be defined in LCCR4 - * LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2 - * - * All other bits in LCCR4 should be left alone. - */ - u_int lccr4; - void (*pxafb_backlight_power)(int); - void (*pxafb_lcd_power)(int, struct fb_var_screeninfo *); - void (*smart_update)(struct fb_info *); -}; -void set_pxa_fb_info(struct pxafb_mach_info *hard_pxa_fb_info); -void set_pxa_fb_parent(struct device *parent_dev); -unsigned long pxafb_get_hsync_time(struct device *dev); - -extern int pxafb_smart_queue(struct fb_info *info, uint16_t *cmds, int); -extern int pxafb_smart_flush(struct fb_info *info); diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h deleted file mode 100644 index 820a189..0000000 --- a/include/asm-arm/arch-pxa/regs-lcd.h +++ /dev/null @@ -1,180 +0,0 @@ -#ifndef __ASM_ARCH_REGS_LCD_H -#define __ASM_ARCH_REGS_LCD_H - -#include - -/* - * LCD Controller Registers and Bits Definitions - */ -#define LCCR0 (0x000) /* LCD Controller Control Register 0 */ -#define LCCR1 (0x004) /* LCD Controller Control Register 1 */ -#define LCCR2 (0x008) /* LCD Controller Control Register 2 */ -#define LCCR3 (0x00C) /* LCD Controller Control Register 3 */ -#define LCCR4 (0x010) /* LCD Controller Control Register 4 */ -#define LCCR5 (0x014) /* LCD Controller Control Register 5 */ -#define DFBR0 (0x020) /* DMA Channel 0 Frame Branch Register */ -#define DFBR1 (0x024) /* DMA Channel 1 Frame Branch Register */ -#define LCSR (0x038) /* LCD Controller Status Register */ -#define LIIDR (0x03C) /* LCD Controller Interrupt ID Register */ -#define TMEDRGBR (0x040) /* TMED RGB Seed Register */ -#define TMEDCR (0x044) /* TMED Control Register */ - -#define CMDCR (0x100) /* Command Control Register */ -#define PRSR (0x104) /* Panel Read Status Register */ - -#define LCCR3_1BPP (0 << 24) -#define LCCR3_2BPP (1 << 24) -#define LCCR3_4BPP (2 << 24) -#define LCCR3_8BPP (3 << 24) -#define LCCR3_16BPP (4 << 24) -#define LCCR3_18BPP (5 << 24) -#define LCCR3_18BPP_P (6 << 24) -#define LCCR3_19BPP (7 << 24) -#define LCCR3_19BPP_P (1 << 29) -#define LCCR3_24BPP ((1 << 29) | (1 << 24)) -#define LCCR3_25BPP ((1 << 29) | (2 << 24)) - -#define LCCR3_PDFOR_0 (0 << 30) -#define LCCR3_PDFOR_1 (1 << 30) -#define LCCR3_PDFOR_2 (2 << 30) -#define LCCR3_PDFOR_3 (3 << 30) - -#define LCCR4_PAL_FOR_0 (0 << 15) -#define LCCR4_PAL_FOR_1 (1 << 15) -#define LCCR4_PAL_FOR_2 (2 << 15) -#define LCCR4_PAL_FOR_MASK (3 << 15) - -#define FDADR0 (0x200) /* DMA Channel 0 Frame Descriptor Address Register */ -#define FSADR0 (0x204) /* DMA Channel 0 Frame Source Address Register */ -#define FIDR0 (0x208) /* DMA Channel 0 Frame ID Register */ -#define LDCMD0 (0x20C) /* DMA Channel 0 Command Register */ -#define FDADR1 (0x210) /* DMA Channel 1 Frame Descriptor Address Register */ -#define FSADR1 (0x214) /* DMA Channel 1 Frame Source Address Register */ -#define FIDR1 (0x218) /* DMA Channel 1 Frame ID Register */ -#define LDCMD1 (0x21C) /* DMA Channel 1 Command Register */ -#define FDADR6 (0x260) /* DMA Channel 6 Frame Descriptor Address Register */ -#define FSADR6 (0x264) /* DMA Channel 6 Frame Source Address Register */ -#define FIDR6 (0x268) /* DMA Channel 6 Frame ID Register */ - -#define LCCR0_ENB (1 << 0) /* LCD Controller enable */ -#define LCCR0_CMS (1 << 1) /* Color/Monochrome Display Select */ -#define LCCR0_Color (LCCR0_CMS*0) /* Color display */ -#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ -#define LCCR0_SDS (1 << 2) /* Single/Dual Panel Display Select */ -#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ -#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ - -#define LCCR0_LDM (1 << 3) /* LCD Disable Done Mask */ -#define LCCR0_SFM (1 << 4) /* Start of frame mask */ -#define LCCR0_IUM (1 << 5) /* Input FIFO underrun mask */ -#define LCCR0_EFM (1 << 6) /* End of Frame mask */ -#define LCCR0_PAS (1 << 7) /* Passive/Active display Select */ -#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ -#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ -#define LCCR0_DPD (1 << 9) /* Double Pixel Data (monochrome) */ -#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome display */ -#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome display */ -#define LCCR0_DIS (1 << 10) /* LCD Disable */ -#define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ -#define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ -#define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ -#define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ -#define LCCR0_LCDT (1 << 22) /* LCD panel type */ -#define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ -#define LCCR0_CMDIM (1 << 24) /* Command interrupt mask */ -#define LCCR0_OUC (1 << 25) /* Overlay Underlay control bit */ -#define LCCR0_LDDALT (1 << 26) /* LDD alternate mapping control */ - -#define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ -#define LCCR1_DisWdth(Pixel) (((Pixel) - 1) << FShft (LCCR1_PPL)) - -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ -#define LCCR1_HorSnchWdth(Tpix) (((Tpix) - 1) << FShft (LCCR1_HSW)) - -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */ -#define LCCR1_EndLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_ELW)) - -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ -#define LCCR1_BegLnDel(Tpix) (((Tpix) - 1) << FShft (LCCR1_BLW)) - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) (((Line) - 1) << FShft (LCCR2_LPP)) - -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */ -#define LCCR2_VrtSnchWdth(Tln) (((Tln) - 1) << FShft (LCCR2_VSW)) - -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ -#define LCCR2_EndFrmDel(Tln) ((Tln) << FShft (LCCR2_EFW)) - -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ -#define LCCR2_BegFrmDel(Tln) ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_API (0xf << 16) /* AC Bias pin trasitions per interrupt */ -#define LCCR3_API_S 16 -#define LCCR3_VSP (1 << 20) /* vertical sync polarity */ -#define LCCR3_HSP (1 << 21) /* horizontal sync polarity */ -#define LCCR3_PCP (1 << 22) /* Pixel Clock Polarity (L_PCLK) */ -#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ -#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ - -#define LCCR3_OEP (1 << 23) /* Output Enable Polarity */ -#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ -#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#define LCCR3_DPC (1 << 27) /* double pixel clock mode */ -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ -#define LCCR3_PixClkDiv(Div) (((Div) << FShft (LCCR3_PCD))) - -#define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ -#define LCCR3_Bpp(Bpp) (((Bpp) << FShft (LCCR3_BPP))) - -#define LCCR3_ACB Fld (8, 8) /* AC Bias */ -#define LCCR3_Acb(Acb) (((Acb) << FShft (LCCR3_ACB))) - -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* HSP Active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* HSP Active Low */ - -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* VSP Active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* VSP Active Low */ - -#define LCCR5_IUM(x) (1 << ((x) + 23)) /* input underrun mask */ -#define LCCR5_BSM(x) (1 << ((x) + 15)) /* branch mask */ -#define LCCR5_EOFM(x) (1 << ((x) + 7)) /* end of frame mask */ -#define LCCR5_SOFM(x) (1 << ((x) + 0)) /* start of frame mask */ - -#define LCSR_LDD (1 << 0) /* LCD Disable Done */ -#define LCSR_SOF (1 << 1) /* Start of frame */ -#define LCSR_BER (1 << 2) /* Bus error */ -#define LCSR_ABC (1 << 3) /* AC Bias count */ -#define LCSR_IUL (1 << 4) /* input FIFO underrun Lower panel */ -#define LCSR_IUU (1 << 5) /* input FIFO underrun Upper panel */ -#define LCSR_OU (1 << 6) /* output FIFO underrun */ -#define LCSR_QD (1 << 7) /* quick disable */ -#define LCSR_EOF (1 << 8) /* end of frame */ -#define LCSR_BS (1 << 9) /* branch status */ -#define LCSR_SINT (1 << 10) /* subsequent interrupt */ -#define LCSR_RD_ST (1 << 11) /* read status */ -#define LCSR_CMD_INT (1 << 12) /* command interrupt */ - -#define LDCMD_PAL (1 << 26) /* instructs DMA to load palette buffer */ - -/* smartpanel related */ -#define PRSR_DATA(x) ((x) & 0xff) /* Panel Data */ -#define PRSR_A0 (1 << 8) /* Read Data Source */ -#define PRSR_ST_OK (1 << 9) /* Status OK */ -#define PRSR_CON_NT (1 << 10) /* Continue to Next Command */ - -#define SMART_CMD_A0 (0x1 << 8) -#define SMART_CMD_READ_STATUS_REG (0x0 << 9) -#define SMART_CMD_READ_FRAME_BUFFER ((0x0 << 9) | SMART_CMD_A0) -#define SMART_CMD_WRITE_COMMAND (0x1 << 9) -#define SMART_CMD_WRITE_DATA ((0x1 << 9) | SMART_CMD_A0) -#define SMART_CMD_WRITE_FRAME ((0x2 << 9) | SMART_CMD_A0) -#define SMART_CMD_WAIT_FOR_VSYNC (0x3 << 9) -#define SMART_CMD_NOOP (0x4 << 9) -#define SMART_CMD_INTERRUPT (0x5 << 9) - -#define SMART_CMD(x) (SMART_CMD_WRITE_COMMAND | ((x) & 0xff)) -#define SMART_DAT(x) (SMART_CMD_WRITE_DATA | ((x) & 0xff)) -#endif /* __ASM_ARCH_REGS_LCD_H */ diff --git a/include/asm-arm/arch-pxa/regs-ssp.h b/include/asm-arm/arch-pxa/regs-ssp.h deleted file mode 100644 index 3c04cde..0000000 --- a/include/asm-arm/arch-pxa/regs-ssp.h +++ /dev/null @@ -1,127 +0,0 @@ -#ifndef __ASM_ARCH_REGS_SSP_H -#define __ASM_ARCH_REGS_SSP_H - -/* - * SSP Serial Port Registers - * PXA250, PXA255, PXA26x and PXA27x SSP controllers are all slightly different. - * PXA255, PXA26x and PXA27x have extra ports, registers and bits. - */ - -#define SSCR0 (0x00) /* SSP Control Register 0 */ -#define SSCR1 (0x04) /* SSP Control Register 1 */ -#define SSSR (0x08) /* SSP Status Register */ -#define SSITR (0x0C) /* SSP Interrupt Test Register */ -#define SSDR (0x10) /* SSP Data Write/Data Read Register */ - -#define SSTO (0x28) /* SSP Time Out Register */ -#define SSPSP (0x2C) /* SSP Programmable Serial Protocol */ -#define SSTSA (0x30) /* SSP Tx Timeslot Active */ -#define SSRSA (0x34) /* SSP Rx Timeslot Active */ -#define SSTSS (0x38) /* SSP Timeslot Status */ -#define SSACD (0x3C) /* SSP Audio Clock Divider */ - -#if defined(CONFIG_PXA3xx) -#define SSACDD (0x40) /* SSP Audio Clock Dither Divider */ -#endif - -/* Common PXA2xx bits first */ -#define SSCR0_DSS (0x0000000f) /* Data Size Select (mask) */ -#define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */ -#define SSCR0_FRF (0x00000030) /* FRame Format (mask) */ -#define SSCR0_Motorola (0x0 << 4) /* Motorola's Serial Peripheral Interface (SPI) */ -#define SSCR0_TI (0x1 << 4) /* Texas Instruments' Synchronous Serial Protocol (SSP) */ -#define SSCR0_National (0x2 << 4) /* National Microwire */ -#define SSCR0_ECS (1 << 6) /* External clock select */ -#define SSCR0_SSE (1 << 7) /* Synchronous Serial Port Enable */ - -#if defined(CONFIG_PXA25x) -#define SSCR0_SCR (0x0000ff00) /* Serial Clock Rate (mask) */ -#define SSCR0_SerClkDiv(x) ((((x) - 2)/2) << 8) /* Divisor [2..512] */ - -#elif defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) -#define SSCR0_SCR (0x000fff00) /* Serial Clock Rate (mask) */ -#define SSCR0_SerClkDiv(x) (((x) - 1) << 8) /* Divisor [1..4096] */ -#define SSCR0_EDSS (1 << 20) /* Extended data size select */ -#define SSCR0_NCS (1 << 21) /* Network clock select */ -#define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ -#define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ -#define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ -#define SSCR0_ADC (1 << 30) /* Audio clock select */ -#define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ -#endif - -#if defined(CONFIG_PXA3xx) -#define SSCR0_FPCKE (1 << 29) /* FIFO packing enable */ -#endif - -#define SSCR1_RIE (1 << 0) /* Receive FIFO Interrupt Enable */ -#define SSCR1_TIE (1 << 1) /* Transmit FIFO Interrupt Enable */ -#define SSCR1_LBM (1 << 2) /* Loop-Back Mode */ -#define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLK polarity setting */ -#define SSCR1_SPH (1 << 4) /* Motorola SPI SSPSCLK phase setting */ -#define SSCR1_MWDS (1 << 5) /* Microwire Transmit Data Size */ -#define SSCR1_TFT (0x000003c0) /* Transmit FIFO Threshold (mask) */ -#define SSCR1_TxTresh(x) (((x) - 1) << 6) /* level [1..16] */ -#define SSCR1_RFT (0x00003c00) /* Receive FIFO Threshold (mask) */ -#define SSCR1_RxTresh(x) (((x) - 1) << 10) /* level [1..16] */ - -#define SSSR_TNF (1 << 2) /* Transmit FIFO Not Full */ -#define SSSR_RNE (1 << 3) /* Receive FIFO Not Empty */ -#define SSSR_BSY (1 << 4) /* SSP Busy */ -#define SSSR_TFS (1 << 5) /* Transmit FIFO Service Request */ -#define SSSR_RFS (1 << 6) /* Receive FIFO Service Request */ -#define SSSR_ROR (1 << 7) /* Receive FIFO Overrun */ - -#define SSCR0_TIM (1 << 23) /* Transmit FIFO Under Run Interrupt Mask */ -#define SSCR0_RIM (1 << 22) /* Receive FIFO Over Run interrupt Mask */ -#define SSCR0_NCS (1 << 21) /* Network Clock Select */ -#define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ - -/* extra bits in PXA255, PXA26x and PXA27x SSP ports */ -#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ -#define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ -#define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ -#define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ -#define SSCR1_EBCEI (1 << 29) /* Enable Bit Count Error interrupt */ -#define SSCR1_SCFR (1 << 28) /* Slave Clock free Running */ -#define SSCR1_ECRA (1 << 27) /* Enable Clock Request A */ -#define SSCR1_ECRB (1 << 26) /* Enable Clock request B */ -#define SSCR1_SCLKDIR (1 << 25) /* Serial Bit Rate Clock Direction */ -#define SSCR1_SFRMDIR (1 << 24) /* Frame Direction */ -#define SSCR1_RWOT (1 << 23) /* Receive Without Transmit */ -#define SSCR1_TRAIL (1 << 22) /* Trailing Byte */ -#define SSCR1_TSRE (1 << 21) /* Transmit Service Request Enable */ -#define SSCR1_RSRE (1 << 20) /* Receive Service Request Enable */ -#define SSCR1_TINTE (1 << 19) /* Receiver Time-out Interrupt enable */ -#define SSCR1_PINTE (1 << 18) /* Peripheral Trailing Byte Interupt Enable */ -#define SSCR1_IFS (1 << 16) /* Invert Frame Signal */ -#define SSCR1_STRF (1 << 15) /* Select FIFO or EFWR */ -#define SSCR1_EFWR (1 << 14) /* Enable FIFO Write/Read */ - -#define SSSR_BCE (1 << 23) /* Bit Count Error */ -#define SSSR_CSS (1 << 22) /* Clock Synchronisation Status */ -#define SSSR_TUR (1 << 21) /* Transmit FIFO Under Run */ -#define SSSR_EOC (1 << 20) /* End Of Chain */ -#define SSSR_TINT (1 << 19) /* Receiver Time-out Interrupt */ -#define SSSR_PINT (1 << 18) /* Peripheral Trailing Byte Interrupt */ - -#define SSPSP_FSRT (1 << 25) /* Frame Sync Relative Timing */ -#define SSPSP_DMYSTOP(x) ((x) << 23) /* Dummy Stop */ -#define SSPSP_SFRMWDTH(x) ((x) << 16) /* Serial Frame Width */ -#define SSPSP_SFRMDLY(x) ((x) << 9) /* Serial Frame Delay */ -#define SSPSP_DMYSTRT(x) ((x) << 7) /* Dummy Start */ -#define SSPSP_STRTDLY(x) ((x) << 4) /* Start Delay */ -#define SSPSP_ETDS (1 << 3) /* End of Transfer data State */ -#define SSPSP_SFRMP (1 << 2) /* Serial Frame Polarity */ -#define SSPSP_SCMODE(x) ((x) << 0) /* Serial Bit Rate Clock Mode */ - -#define SSACD_SCDB (1 << 3) /* SSPSYSCLK Divider Bypass */ -#define SSACD_ACPS(x) ((x) << 4) /* Audio clock PLL select */ -#define SSACD_ACDS(x) ((x) << 0) /* Audio clock divider select */ -#if defined(CONFIG_PXA3xx) -#define SSACD_SCDX8 (1 << 7) /* SYSCLK division ratio select */ -#endif - - -#endif /* __ASM_ARCH_REGS_SSP_H */ diff --git a/include/asm-arm/arch-pxa/sharpsl.h b/include/asm-arm/arch-pxa/sharpsl.h deleted file mode 100644 index 3b1d4a7..0000000 --- a/include/asm-arm/arch-pxa/sharpsl.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * SharpSL SSP Driver - */ - -unsigned long corgi_ssp_ads7846_putget(unsigned long); -unsigned long corgi_ssp_ads7846_get(void); -void corgi_ssp_ads7846_put(unsigned long data); -void corgi_ssp_ads7846_lock(void); -void corgi_ssp_ads7846_unlock(void); -void corgi_ssp_lcdtg_send (unsigned char adrs, unsigned char data); -void corgi_ssp_blduty_set(int duty); -int corgi_ssp_max1111_get(unsigned long data); - -/* - * SharpSL Touchscreen Driver - */ - -struct corgits_machinfo { - unsigned long (*get_hsync_invperiod)(void); - void (*put_hsync)(void); - void (*wait_hsync)(void); -}; - - -/* - * SharpSL Backlight - */ -extern void corgibl_limit_intensity(int limit); - - -/* - * SharpSL Battery/PM Driver - */ -extern void sharpsl_battery_kick(void); diff --git a/include/asm-arm/arch-pxa/spitz.h b/include/asm-arm/arch-pxa/spitz.h deleted file mode 100644 index bd14365..0000000 --- a/include/asm-arm/arch-pxa/spitz.h +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Hardware specific definitions for SL-Cx000 series of PDAs - * - * Copyright (c) 2005 Alexander Wykes - * Copyright (c) 2005 Richard Purdie - * - * Based on Sharp's 2.4 kernel patches - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef __ASM_ARCH_SPITZ_H -#define __ASM_ARCH_SPITZ_H 1 -#endif - -#include - -/* Spitz/Akita GPIOs */ - -#define SPITZ_GPIO_KEY_INT (0) /* Key Interrupt */ -#define SPITZ_GPIO_RESET (1) -#define SPITZ_GPIO_nSD_DETECT (9) -#define SPITZ_GPIO_TP_INT (11) /* Touch Panel interrupt */ -#define SPITZ_GPIO_AK_INT (13) /* Remote Control */ -#define SPITZ_GPIO_ADS7846_CS (14) -#define SPITZ_GPIO_SYNC (16) -#define SPITZ_GPIO_MAX1111_CS (20) -#define SPITZ_GPIO_FATAL_BAT (21) -#define SPITZ_GPIO_HSYNC (22) -#define SPITZ_GPIO_nSD_CLK (32) -#define SPITZ_GPIO_USB_DEVICE (35) -#define SPITZ_GPIO_USB_HOST (37) -#define SPITZ_GPIO_USB_CONNECT (41) -#define SPITZ_GPIO_LCDCON_CS (53) -#define SPITZ_GPIO_nPCE (54) -#define SPITZ_GPIO_nSD_WP (81) -#define SPITZ_GPIO_ON_RESET (89) -#define SPITZ_GPIO_BAT_COVER (90) -#define SPITZ_GPIO_CF_CD (94) -#define SPITZ_GPIO_ON_KEY (95) -#define SPITZ_GPIO_SWA (97) -#define SPITZ_GPIO_SWB (96) -#define SPITZ_GPIO_CHRG_FULL (101) -#define SPITZ_GPIO_CO (101) -#define SPITZ_GPIO_CF_IRQ (105) -#define SPITZ_GPIO_AC_IN (115) -#define SPITZ_GPIO_HP_IN (116) - -/* Spitz Only GPIOs */ - -#define SPITZ_GPIO_CF2_IRQ (106) /* CF slot1 Ready */ -#define SPITZ_GPIO_CF2_CD (93) - - -/* Spitz/Akita Keyboard Definitions */ - -#define SPITZ_KEY_STROBE_NUM (11) -#define SPITZ_KEY_SENSE_NUM (7) -#define SPITZ_GPIO_G0_STROBE_BIT 0x0f800000 -#define SPITZ_GPIO_G1_STROBE_BIT 0x00100000 -#define SPITZ_GPIO_G2_STROBE_BIT 0x01000000 -#define SPITZ_GPIO_G3_STROBE_BIT 0x00041880 -#define SPITZ_GPIO_G0_SENSE_BIT 0x00021000 -#define SPITZ_GPIO_G1_SENSE_BIT 0x000000d4 -#define SPITZ_GPIO_G2_SENSE_BIT 0x08000000 -#define SPITZ_GPIO_G3_SENSE_BIT 0x00000000 - -#define SPITZ_GPIO_KEY_STROBE0 88 -#define SPITZ_GPIO_KEY_STROBE1 23 -#define SPITZ_GPIO_KEY_STROBE2 24 -#define SPITZ_GPIO_KEY_STROBE3 25 -#define SPITZ_GPIO_KEY_STROBE4 26 -#define SPITZ_GPIO_KEY_STROBE5 27 -#define SPITZ_GPIO_KEY_STROBE6 52 -#define SPITZ_GPIO_KEY_STROBE7 103 -#define SPITZ_GPIO_KEY_STROBE8 107 -#define SPITZ_GPIO_KEY_STROBE9 108 -#define SPITZ_GPIO_KEY_STROBE10 114 - -#define SPITZ_GPIO_KEY_SENSE0 12 -#define SPITZ_GPIO_KEY_SENSE1 17 -#define SPITZ_GPIO_KEY_SENSE2 91 -#define SPITZ_GPIO_KEY_SENSE3 34 -#define SPITZ_GPIO_KEY_SENSE4 36 -#define SPITZ_GPIO_KEY_SENSE5 38 -#define SPITZ_GPIO_KEY_SENSE6 39 - - -/* Spitz Scoop Device (No. 1) GPIOs */ -/* Suspend States in comments */ -#define SPITZ_SCP_LED_GREEN SCOOP_GPCR_PA11 /* Keep */ -#define SPITZ_SCP_JK_B SCOOP_GPCR_PA12 /* Keep */ -#define SPITZ_SCP_CHRG_ON SCOOP_GPCR_PA13 /* Keep */ -#define SPITZ_SCP_MUTE_L SCOOP_GPCR_PA14 /* Low */ -#define SPITZ_SCP_MUTE_R SCOOP_GPCR_PA15 /* Low */ -#define SPITZ_SCP_CF_POWER SCOOP_GPCR_PA16 /* Keep */ -#define SPITZ_SCP_LED_ORANGE SCOOP_GPCR_PA17 /* Keep */ -#define SPITZ_SCP_JK_A SCOOP_GPCR_PA18 /* Low */ -#define SPITZ_SCP_ADC_TEMP_ON SCOOP_GPCR_PA19 /* Low */ - -#define SPITZ_SCP_IO_DIR (SPITZ_SCP_LED_GREEN | SPITZ_SCP_JK_B | SPITZ_SCP_CHRG_ON | \ - SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_LED_ORANGE | \ - SPITZ_SCP_CF_POWER | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) -#define SPITZ_SCP_IO_OUT (SPITZ_SCP_CHRG_ON | SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R) -#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) -#define SPITZ_SCP_SUS_SET 0 - -/* Spitz Scoop Device (No. 2) GPIOs */ -/* Suspend States in comments */ -#define SPITZ_SCP2_IR_ON SCOOP_GPCR_PA11 /* High */ -#define SPITZ_SCP2_AKIN_PULLUP SCOOP_GPCR_PA12 /* Keep */ -#define SPITZ_SCP2_RESERVED_1 SCOOP_GPCR_PA13 /* High */ -#define SPITZ_SCP2_RESERVED_2 SCOOP_GPCR_PA14 /* Low */ -#define SPITZ_SCP2_RESERVED_3 SCOOP_GPCR_PA15 /* Low */ -#define SPITZ_SCP2_RESERVED_4 SCOOP_GPCR_PA16 /* Low */ -#define SPITZ_SCP2_BACKLIGHT_CONT SCOOP_GPCR_PA17 /* Low */ -#define SPITZ_SCP2_BACKLIGHT_ON SCOOP_GPCR_PA18 /* Low */ -#define SPITZ_SCP2_MIC_BIAS SCOOP_GPCR_PA19 /* Low */ - -#define SPITZ_SCP2_IO_DIR (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1 | \ - SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ - SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) - -#define SPITZ_SCP2_IO_OUT (SPITZ_SCP2_IR_ON | SPITZ_SCP2_AKIN_PULLUP | SPITZ_SCP2_RESERVED_1) -#define SPITZ_SCP2_SUS_CLR (SPITZ_SCP2_RESERVED_2 | SPITZ_SCP2_RESERVED_3 | SPITZ_SCP2_RESERVED_4 | \ - SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) -#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) - - -/* Spitz IRQ Definitions */ - -#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) -#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) -#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) -#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) -#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) -#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) -#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) -#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) -#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) -#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) -#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) -#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) -#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) -#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) -#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) -#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) -#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) - -/* - * Shared data structures - */ -extern struct platform_device spitzscoop_device; -extern struct platform_device spitzscoop2_device; -extern struct platform_device spitzssp_device; -extern struct sharpsl_charger_machinfo spitz_pm_machinfo; diff --git a/include/asm-arm/arch-pxa/ssp.h b/include/asm-arm/arch-pxa/ssp.h deleted file mode 100644 index a012882..0000000 --- a/include/asm-arm/arch-pxa/ssp.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * ssp.h - * - * Copyright (C) 2003 Russell King, All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This driver supports the following PXA CPU/SSP ports:- - * - * PXA250 SSP - * PXA255 SSP, NSSP - * PXA26x SSP, NSSP, ASSP - * PXA27x SSP1, SSP2, SSP3 - * PXA3xx SSP1, SSP2, SSP3, SSP4 - */ - -#ifndef __ASM_ARCH_SSP_H -#define __ASM_ARCH_SSP_H - -#include - -enum pxa_ssp_type { - SSP_UNDEFINED = 0, - PXA25x_SSP, /* pxa 210, 250, 255, 26x */ - PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */ - PXA27x_SSP, -}; - -struct ssp_device { - struct platform_device *pdev; - struct list_head node; - - struct clk *clk; - void __iomem *mmio_base; - unsigned long phys_base; - - const char *label; - int port_id; - int type; - int use_count; - int irq; - int drcmr_rx; - int drcmr_tx; -}; - -/* - * SSP initialisation flags - */ -#define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */ - -struct ssp_state { - u32 cr0; - u32 cr1; - u32 to; - u32 psp; -}; - -struct ssp_dev { - struct ssp_device *ssp; - u32 port; - u32 mode; - u32 flags; - u32 psp_flags; - u32 speed; - int irq; -}; - -int ssp_write_word(struct ssp_dev *dev, u32 data); -int ssp_read_word(struct ssp_dev *dev, u32 *data); -int ssp_flush(struct ssp_dev *dev); -void ssp_enable(struct ssp_dev *dev); -void ssp_disable(struct ssp_dev *dev); -void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp); -void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp); -int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags); -int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed); -void ssp_exit(struct ssp_dev *dev); - -struct ssp_device *ssp_request(int port, const char *label); -void ssp_free(struct ssp_device *); -#endif /* __ASM_ARCH_SSP_H */ diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h deleted file mode 100644 index 6956fc5..0000000 --- a/include/asm-arm/arch-pxa/system.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/system.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include "hardware.h" -#include "pxa2xx-regs.h" -#include "pxa-regs.h" - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - - -void arch_reset(char mode); diff --git a/include/asm-arm/arch-pxa/timex.h b/include/asm-arm/arch-pxa/timex.h deleted file mode 100644 index 8d882f0..0000000 --- a/include/asm-arm/arch-pxa/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/timex.h - * - * Author: Nicolas Pitre - * Created: Jun 15, 2001 - * Copyright: MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - - -#if defined(CONFIG_PXA25x) -/* PXA250/210 timer base */ -#define CLOCK_TICK_RATE 3686400 -#elif defined(CONFIG_PXA27x) -/* PXA27x timer base */ -#ifdef CONFIG_MACH_MAINSTONE -#define CLOCK_TICK_RATE 3249600 -#else -#define CLOCK_TICK_RATE 3250000 -#endif -#else -#define CLOCK_TICK_RATE 3250000 -#endif diff --git a/include/asm-arm/arch-pxa/tosa.h b/include/asm-arm/arch-pxa/tosa.h deleted file mode 100644 index a72803f..0000000 --- a/include/asm-arm/arch-pxa/tosa.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Hardware specific definitions for Sharp SL-C6000x series of PDAs - * - * Copyright (c) 2005 Dirk Opfer - * - * Based on Sharp's 2.4 kernel patches - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef _ASM_ARCH_TOSA_H_ -#define _ASM_ARCH_TOSA_H_ 1 - -/* TOSA Chip selects */ -#define TOSA_LCDC_PHYS PXA_CS4_PHYS -/* Internel Scoop */ -#define TOSA_CF_PHYS (PXA_CS2_PHYS + 0x00800000) -/* Jacket Scoop */ -#define TOSA_SCOOP_PHYS (PXA_CS5_PHYS + 0x00800000) - -/* - * SCOOP2 internal GPIOs - */ -#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO -#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 -#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) -#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) -#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3) -#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4) -#define TOSA_SCOOP_AUD_PWR_ON SCOOP_GPCR_PA16 -#define TOSA_GPIO_BT_RESET (TOSA_SCOOP_GPIO_BASE + 6) -#define TOSA_GPIO_BT_PWR_EN (TOSA_SCOOP_GPIO_BASE + 7) -#define TOSA_SCOOP_AC_IN_OL SCOOP_GPCR_PA19 - -/* GPIO Direction 1 : output mode / 0:input mode */ -#define TOSA_SCOOP_IO_DIR (TOSA_SCOOP_PXA_VCORE1 | \ - TOSA_SCOOP_AUD_PWR_ON) - -/* - * SCOOP2 jacket GPIOs - */ -#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) -#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) -#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) -#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) -#define TOSA_GPIO_USB_PULLUP (TOSA_SCOOP_JC_GPIO_BASE + 3) -#define TOSA_GPIO_TC6393XB_SUSPEND (TOSA_SCOOP_JC_GPIO_BASE + 4) -#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5) -#define TOSA_SCOOP_JC_WLAN_DETECT SCOOP_GPCR_PA17 -#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7) -#define TOSA_SCOOP_JC_CARD_LIMIT_SEL SCOOP_GPCR_PA19 - -/* GPIO Direction 1 : output mode / 0:input mode */ -#define TOSA_SCOOP_JC_IO_DIR (TOSA_SCOOP_JC_CARD_LIMIT_SEL) - -/* - * TC6393XB GPIOs - */ -#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) -#define TOSA_TC6393XB_GPIO(i) (TOSA_TC6393XB_GPIO_BASE + (i)) -#define TOSA_TC6393XB_GPIO_BIT(gpio) (1 << (gpio - TOSA_TC6393XB_GPIO_BASE)) - -#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) -#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) -#define TOSA_GPIO_BL_C20MA (TOSA_TC6393XB_GPIO_BASE + 3) -#define TOSA_GPIO_CARD_VCC_ON (TOSA_TC6393XB_GPIO_BASE + 4) -#define TOSA_GPIO_CHARGE_OFF (TOSA_TC6393XB_GPIO_BASE + 6) -#define TOSA_GPIO_CHARGE_OFF_JC (TOSA_TC6393XB_GPIO_BASE + 7) -#define TOSA_GPIO_BAT0_V_ON (TOSA_TC6393XB_GPIO_BASE + 9) -#define TOSA_GPIO_BAT1_V_ON (TOSA_TC6393XB_GPIO_BASE + 10) -#define TOSA_GPIO_BU_CHRG_ON (TOSA_TC6393XB_GPIO_BASE + 11) -#define TOSA_GPIO_BAT_SW_ON (TOSA_TC6393XB_GPIO_BASE + 12) -#define TOSA_GPIO_BAT0_TH_ON (TOSA_TC6393XB_GPIO_BASE + 14) -#define TOSA_GPIO_BAT1_TH_ON (TOSA_TC6393XB_GPIO_BASE + 15) - -/* - * Timing Generator - */ -#define TG_PNLCTL 0x00 -#define TG_TPOSCTL 0x01 -#define TG_DUTYCTL 0x02 -#define TG_GPOSR 0x03 -#define TG_GPODR1 0x04 -#define TG_GPODR2 0x05 -#define TG_PINICTL 0x06 -#define TG_HPOSCTL 0x07 - -/* - * PXA GPIOs - */ -#define TOSA_GPIO_POWERON (0) -#define TOSA_GPIO_RESET (1) -#define TOSA_GPIO_AC_IN (2) -#define TOSA_GPIO_RECORD_BTN (3) -#define TOSA_GPIO_SYNC (4) /* Cradle SYNC Button */ -#define TOSA_GPIO_USB_IN (5) -#define TOSA_GPIO_JACKET_DETECT (7) -#define TOSA_GPIO_nSD_DETECT (9) -#define TOSA_GPIO_nSD_INT (10) -#define TOSA_GPIO_TC6393XB_CLK (11) -#define TOSA_GPIO_BAT1_CRG (12) -#define TOSA_GPIO_CF_CD (13) -#define TOSA_GPIO_BAT0_CRG (14) -#define TOSA_GPIO_TC6393XB_INT (15) -#define TOSA_GPIO_BAT0_LOW (17) -#define TOSA_GPIO_TC6393XB_RDY (18) -#define TOSA_GPIO_ON_RESET (19) -#define TOSA_GPIO_EAR_IN (20) -#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */ -#define TOSA_GPIO_ON_KEY (22) -#define TOSA_GPIO_VGA_LINE (27) -#define TOSA_GPIO_TP_INT (32) /* Touch Panel pen down interrupt */ -#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */ -#define TOSA_GPIO_BAT_LOCKED (38) /* Battery locked */ -#define TOSA_GPIO_IRDA_TX (47) -#define TOSA_GPIO_TG_SPI_SCLK (81) -#define TOSA_GPIO_TG_SPI_CS (82) -#define TOSA_GPIO_TG_SPI_MOSI (83) -#define TOSA_GPIO_BAT1_LOW (84) - -#define TOSA_GPIO_HP_IN GPIO_EAR_IN - -#define TOSA_GPIO_MAIN_BAT_LOW GPIO_BAT0_LOW - -#define TOSA_KEY_STROBE_NUM (11) -#define TOSA_KEY_SENSE_NUM (7) - -#define TOSA_GPIO_HIGH_STROBE_BIT (0xfc000000) -#define TOSA_GPIO_LOW_STROBE_BIT (0x0000001f) -#define TOSA_GPIO_ALL_SENSE_BIT (0x00000fe0) -#define TOSA_GPIO_ALL_SENSE_RSHIFT (5) -#define TOSA_GPIO_STROBE_BIT(a) GPIO_bit(58+(a)) -#define TOSA_GPIO_SENSE_BIT(a) GPIO_bit(69+(a)) -#define TOSA_GAFR_HIGH_STROBE_BIT (0xfff00000) -#define TOSA_GAFR_LOW_STROBE_BIT (0x000003ff) -#define TOSA_GAFR_ALL_SENSE_BIT (0x00fffc00) -#define TOSA_GPIO_KEY_SENSE(a) (69+(a)) -#define TOSA_GPIO_KEY_STROBE(a) (58+(a)) - -/* - * Interrupts - */ -#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) -#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) -#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) -#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) -#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) -#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) -#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) -#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) -#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) -#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) -#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) -#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) -#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) -#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) -#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) -#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) -#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) -#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) -#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) -#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) -#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) -#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) - -#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) - -#define TOSA_KEY_SYNC KEY_102ND /* ??? */ - -#ifndef CONFIG_KEYBOARD_TOSA_USE_EXT_KEYCODES -#define TOSA_KEY_RECORD KEY_YEN -#define TOSA_KEY_ADDRESSBOOK KEY_KATAKANA -#define TOSA_KEY_CANCEL KEY_ESC -#define TOSA_KEY_CENTER KEY_HIRAGANA -#define TOSA_KEY_OK KEY_HENKAN -#define TOSA_KEY_CALENDAR KEY_KATAKANAHIRAGANA -#define TOSA_KEY_HOMEPAGE KEY_HANGEUL -#define TOSA_KEY_LIGHT KEY_MUHENKAN -#define TOSA_KEY_MENU KEY_HANJA -#define TOSA_KEY_FN KEY_RIGHTALT -#define TOSA_KEY_MAIL KEY_ZENKAKUHANKAKU -#else -#define TOSA_KEY_RECORD KEY_RECORD -#define TOSA_KEY_ADDRESSBOOK KEY_ADDRESSBOOK -#define TOSA_KEY_CANCEL KEY_CANCEL -#define TOSA_KEY_CENTER KEY_SELECT /* ??? */ -#define TOSA_KEY_OK KEY_OK -#define TOSA_KEY_CALENDAR KEY_CALENDAR -#define TOSA_KEY_HOMEPAGE KEY_HOMEPAGE -#define TOSA_KEY_LIGHT KEY_KBDILLUMTOGGLE -#define TOSA_KEY_MENU KEY_MENU -#define TOSA_KEY_FN KEY_FN -#define TOSA_KEY_MAIL KEY_MAIL -#endif - -#endif /* _ASM_ARCH_TOSA_H_ */ diff --git a/include/asm-arm/arch-pxa/tosa_bt.h b/include/asm-arm/arch-pxa/tosa_bt.h deleted file mode 100644 index efc3c3d..0000000 --- a/include/asm-arm/arch-pxa/tosa_bt.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Tosa bluetooth built-in chip control. - * - * Later it may be shared with some other platforms. - * - * Copyright (c) 2008 Dmitry Baryshkov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#ifndef TOSA_BT_H -#define TOSA_BT_H - -struct tosa_bt_data { - int gpio_pwr; - int gpio_reset; -}; - -#endif - diff --git a/include/asm-arm/arch-pxa/trizeps4.h b/include/asm-arm/arch-pxa/trizeps4.h deleted file mode 100644 index 641d0ec..0000000 --- a/include/asm-arm/arch-pxa/trizeps4.h +++ /dev/null @@ -1,106 +0,0 @@ -/************************************************************************ - * Include file for TRIZEPS4 SoM and ConXS eval-board - * Copyright (c) Jürgen Schindele - * 2006 - ************************************************************************/ - -/* - * Includes/Defines - */ -#ifndef _TRIPEPS4_H_ -#define _TRIPEPS4_H_ - -/* physical memory regions */ -#define TRIZEPS4_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */ -#define TRIZEPS4_DISK_PHYS (PXA_CS1_PHYS) /* Disk On Chip region */ -#define TRIZEPS4_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */ -#define TRIZEPS4_PIC_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board */ -#define TRIZEPS4_SDRAM_BASE 0xa0000000 /* SDRAM region */ - -#define TRIZEPS4_CFSR_PHYS (PXA_CS3_PHYS) /* Logic chip on ConXS-Board CSFR register */ -#define TRIZEPS4_BOCR_PHYS (PXA_CS3_PHYS+0x02000000) /* Logic chip on ConXS-Board BOCR register */ -#define TRIZEPS4_IRCR_PHYS (PXA_CS3_PHYS+0x02400000) /* Logic chip on ConXS-Board IRCR register*/ -#define TRIZEPS4_UPSR_PHYS (PXA_CS3_PHYS+0x02800000) /* Logic chip on ConXS-Board UPSR register*/ -#define TRIZEPS4_DICR_PHYS (PXA_CS3_PHYS+0x03800000) /* Logic chip on ConXS-Board DICR register*/ - -/* virtual memory regions */ -#define TRIZEPS4_DISK_VIRT 0xF0000000 /* Disk On Chip region */ - -#define TRIZEPS4_PIC_VIRT 0xF0100000 /* not used */ -#define TRIZEPS4_CFSR_VIRT 0xF0100000 -#define TRIZEPS4_BOCR_VIRT 0xF0200000 -#define TRIZEPS4_DICR_VIRT 0xF0300000 -#define TRIZEPS4_IRCR_VIRT 0xF0400000 -#define TRIZEPS4_UPSR_VIRT 0xF0500000 - -/* size of flash */ -#define TRIZEPS4_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ - -/* Ethernet Controller Davicom DM9000 */ -#define GPIO_DM9000 101 -#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) - -/* UCB1400 audio / TS-controller */ -#define GPIO_UCB1400 1 -#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) - -/* PCMCIA socket Compact Flash */ -#define GPIO_PCD 11 /* PCMCIA Card Detect */ -#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) -#define GPIO_PRDY 13 /* READY / nINT */ -#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) - -/* MMC socket */ -#define GPIO_MMC_DET 12 -#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) - -/* LEDS using tx2 / rx2 */ -#define GPIO_SYS_BUSY_LED 46 -#define GPIO_HEARTBEAT_LED 47 - -/* Off-module PIC on ConXS board */ -#define GPIO_PIC 0 -#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) - -#define CFSR_P2V(x) ((x) - TRIZEPS4_CFSR_PHYS + TRIZEPS4_CFSR_VIRT) -#define CFSR_V2P(x) ((x) - TRIZEPS4_CFSR_VIRT + TRIZEPS4_CFSR_PHYS) - -#define BCR_P2V(x) ((x) - TRIZEPS4_BOCR_PHYS + TRIZEPS4_BOCR_VIRT) -#define BCR_V2P(x) ((x) - TRIZEPS4_BOCR_VIRT + TRIZEPS4_BOCR_PHYS) - -#define DCR_P2V(x) ((x) - TRIZEPS4_DICR_PHYS + TRIZEPS4_DICR_VIRT) -#define DCR_V2P(x) ((x) - TRIZEPS4_DICR_VIRT + TRIZEPS4_DICR_PHYS) - -#ifndef __ASSEMBLY__ -#define ConXS_CFSR (*((volatile unsigned short *)CFSR_P2V(0x0C000000))) -#define ConXS_BCR (*((volatile unsigned short *)BCR_P2V(0x0E000000))) -#define ConXS_DCR (*((volatile unsigned short *)DCR_P2V(0x0F800000))) -#else -#define ConXS_CFSR CFSR_P2V(0x0C000000) -#define ConXS_BCR BCR_P2V(0x0E000000) -#define ConXS_DCR DCR_P2V(0x0F800000) -#endif - -#define ConXS_CFSR_BVD_MASK 0x0003 -#define ConXS_CFSR_BVD1 (1 << 0) -#define ConXS_CFSR_BVD2 (1 << 1) -#define ConXS_CFSR_VS_MASK 0x000C -#define ConXS_CFSR_VS1 (1 << 2) -#define ConXS_CFSR_VS2 (1 << 3) -#define ConXS_CFSR_VS_5V (0x3 << 2) -#define ConXS_CFSR_VS_3V3 0x0 - -#define ConXS_BCR_S0_POW_EN0 (1 << 0) -#define ConXS_BCR_S0_POW_EN1 (1 << 1) -#define ConXS_BCR_L_DISP (1 << 4) -#define ConXS_BCR_CF_BUF_EN (1 << 5) -#define ConXS_BCR_CF_RESET (1 << 7) -#define ConXS_BCR_S0_VCC_3V3 0x1 -#define ConXS_BCR_S0_VCC_5V0 0x2 -#define ConXS_BCR_S0_VPP_12V 0x4 -#define ConXS_BCR_S0_VPP_3V3 0x8 - -#define ConXS_IRCR_MODE (1 << 0) -#define ConXS_IRCR_SD (1 << 1) - -#endif /* _TRIPEPS4_H_ */ diff --git a/include/asm-arm/arch-pxa/udc.h b/include/asm-arm/arch-pxa/udc.h deleted file mode 100644 index 27aa3a9..0000000 --- a/include/asm-arm/arch-pxa/udc.h +++ /dev/null @@ -1,8 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/udc.h - * - */ -#include - -extern void pxa_set_udc_info(struct pxa2xx_udc_mach_info *info); - diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h deleted file mode 100644 index f455126..0000000 --- a/include/asm-arm/arch-pxa/uncompress.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/uncompress.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include - -#define __REG(x) ((volatile unsigned long *)x) - -static volatile unsigned long *UART = FFUART; - -static inline void putc(char c) -{ - if (!(UART[UART_IER] & IER_UUE)) - return; - while (!(UART[UART_LSR] & LSR_TDRQ)) - barrier(); - UART[UART_TX] = c; -} - -/* - * This does not append a newline - */ -static inline void flush(void) -{ -} - -static inline void arch_decomp_setup(void) -{ - if (machine_is_littleton()) - UART = STUART; -} - -/* - * nothing to do - */ -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-pxa/vmalloc.h b/include/asm-arm/arch-pxa/vmalloc.h deleted file mode 100644 index 5bb450c..0000000 --- a/include/asm-arm/arch-pxa/vmalloc.h +++ /dev/null @@ -1,11 +0,0 @@ -/* - * linux/include/asm-arm/arch-pxa/vmalloc.h - * - * Author: Nicolas Pitre - * Copyright: (C) 2001 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END (0xe8000000) diff --git a/include/asm-arm/arch-pxa/zylonite.h b/include/asm-arm/arch-pxa/zylonite.h deleted file mode 100644 index 0d35ca0..0000000 --- a/include/asm-arm/arch-pxa/zylonite.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef __ASM_ARCH_ZYLONITE_H -#define __ASM_ARCH_ZYLONITE_H - -#define ZYLONITE_ETH_PHYS 0x14000000 - -#define EXT_GPIO(x) (128 + (x)) - -/* the following variables are processor specific and initialized - * by the corresponding zylonite_pxa3xx_init() - */ -struct platform_mmc_slot { - int gpio_cd; - int gpio_wp; -}; - -extern struct platform_mmc_slot zylonite_mmc_slot[]; - -extern int gpio_eth_irq; -extern int gpio_debug_led1; -extern int gpio_debug_led2; - -extern int wm9713_irq; - -extern int lcd_id; -extern int lcd_orientation; - -#ifdef CONFIG_CPU_PXA300 -extern void zylonite_pxa300_init(void); -#else -static inline void zylonite_pxa300_init(void) -{ - if (cpu_is_pxa300() || cpu_is_pxa310()) - panic("%s: PXA300/PXA310 not supported\n", __FUNCTION__); -} -#endif - -#ifdef CONFIG_CPU_PXA320 -extern void zylonite_pxa320_init(void); -#else -static inline void zylonite_pxa320_init(void) -{ - if (cpu_is_pxa320()) - panic("%s: PXA320 not supported\n", __FUNCTION__); -} -#endif - -#endif /* __ASM_ARCH_ZYLONITE_H */ diff --git a/include/asm-arm/arch-realview/board-eb.h b/include/asm-arm/arch-realview/board-eb.h deleted file mode 100644 index 206f7a7..0000000 --- a/include/asm-arm/arch-realview/board-eb.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - * include/asm-arm/arch-realview/board-eb.h - * - * Copyright (C) 2007 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_EB_H -#define __ASM_ARCH_BOARD_EB_H - -#include - -/* - * RealView EB + ARM11MPCore peripheral addresses - */ -#define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ -#define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */ - -#define REALVIEW_EB_FLASH_BASE 0x40000000 -#define REALVIEW_EB_FLASH_SIZE SZ_64M -#define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */ - -#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB -#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */ -#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB11MP_TWD_BASE 0x10100700 -#define REALVIEW_EB11MP_TWD_SIZE 0x00000100 -#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */ -#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */ -#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */ -#else -#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */ -#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */ -#define REALVIEW_EB11MP_TWD_BASE 0x1F000700 -#define REALVIEW_EB11MP_TWD_SIZE 0x00000100 -#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */ -#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */ -#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */ -#endif - -#define IRQ_EB_GIC_START 32 - -/* - * RealView EB interrupt sources - */ -#define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */ -#define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */ -#define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */ -#define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */ -#define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */ -#define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */ -#define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */ -#define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */ -#define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */ -#define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */ -#define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */ -#define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */ -#define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */ -#define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */ -#define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */ -#define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */ - -/* - * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile) - */ -#define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0) -#define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1) -#define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2) -#define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3) -#define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4) -#define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5) -#define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6) -#define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7) -#define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8) -#define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9) -#define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */ -#define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */ -#define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */ -#define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */ -#define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14) -#define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15) - -#define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17) -#define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18) -#define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19) -#define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20) -#define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21) -#define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22) -#define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23) -#define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24) -#define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25) -#define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26) -#define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27) -#define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28) - -#define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29) -#define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30) -#define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31) - -#define IRQ_EB11MP_UART2 -1 -#define IRQ_EB11MP_UART3 -1 -#define IRQ_EB11MP_CLCD -1 -#define IRQ_EB11MP_DMA -1 -#define IRQ_EB11MP_WDOG -1 -#define IRQ_EB11MP_GPIO0 -1 -#define IRQ_EB11MP_GPIO1 -1 -#define IRQ_EB11MP_GPIO2 -1 -#define IRQ_EB11MP_SCI -1 -#define IRQ_EB11MP_SSP -1 - -#define NR_GIC_EB11MP 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_EB - */ -#define NR_IRQS_EB (IRQ_EB_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_EB) \ - && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB)) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_EB -#endif - -#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ - && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_EB11MP -#endif - -/* - * Core tile identification (REALVIEW_SYS_PROCID) - */ -#define REALVIEW_EB_PROC_MASK 0xFF000000 -#define REALVIEW_EB_PROC_ARM7TDMI 0x00000000 -#define REALVIEW_EB_PROC_ARM9 0x02000000 -#define REALVIEW_EB_PROC_ARM11 0x04000000 -#define REALVIEW_EB_PROC_ARM11MP 0x06000000 - -#define check_eb_proc(proc_type) \ - ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ - == proc_type) - -#ifdef CONFIG_REALVIEW_EB_ARM11MP -#define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP) -#else -#define core_tile_eb11mp() 0 -#endif - -#endif /* __ASM_ARCH_BOARD_EB_H */ diff --git a/include/asm-arm/arch-realview/board-pb1176.h b/include/asm-arm/arch-realview/board-pb1176.h deleted file mode 100644 index 48ce9c8..0000000 --- a/include/asm-arm/arch-realview/board-pb1176.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * include/asm-arm/arch-realview/board-pb1176.h - * - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_PB1176_H -#define __ASM_ARCH_BOARD_PB1176_H - -#include - -/* - * Peripheral addresses - */ -#define REALVIEW_PB1176_SCTL_BASE 0x10100000 /* System controller */ -#define REALVIEW_PB1176_SMC_BASE 0x10111000 /* SMC */ -#define REALVIEW_PB1176_DMC_BASE 0x10109000 /* DMC configuration */ -#define REALVIEW_PB1176_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define REALVIEW_PB1176_FLASH_BASE 0x30000000 -#define REALVIEW_PB1176_FLASH_SIZE SZ_64M - -#define REALVIEW_PB1176_TIMER0_1_BASE 0x10104000 /* Timer 0 and 1 */ -#define REALVIEW_PB1176_TIMER2_3_BASE 0x10105000 /* Timer 2 and 3 */ -#define REALVIEW_PB1176_TIMER4_5_BASE 0x10106000 /* Timer 4 and 5 */ -#define REALVIEW_PB1176_WATCHDOG_BASE 0x10107000 /* watchdog interface */ -#define REALVIEW_PB1176_RTC_BASE 0x10108000 /* Real Time Clock */ -#define REALVIEW_PB1176_GPIO0_BASE 0x1010A000 /* GPIO port 0 */ -#define REALVIEW_PB1176_SSP_BASE 0x1010B000 /* Synchronous Serial Port */ -#define REALVIEW_PB1176_UART0_BASE 0x1010C000 /* UART 0 */ -#define REALVIEW_PB1176_UART1_BASE 0x1010D000 /* UART 1 */ -#define REALVIEW_PB1176_UART2_BASE 0x1010E000 /* UART 2 */ -#define REALVIEW_PB1176_UART3_BASE 0x1010F000 /* UART 3 */ -#define REALVIEW_PB1176_CLCD_BASE 0x10112000 /* CLCD */ -#define REALVIEW_PB1176_ETH_BASE 0x3A000000 /* Ethernet */ -#define REALVIEW_PB1176_USB_BASE 0x3B000000 /* USB */ - -/* - * PCI regions - */ -#define REALVIEW_PB1176_PCI_BASE 0x60000000 /* PCI self config */ -#define REALVIEW_PB1176_PCI_CFG_BASE 0x61000000 /* PCI config */ -#define REALVIEW_PB1176_PCI_IO_BASE0 0x62000000 /* PCI IO region */ -#define REALVIEW_PB1176_PCI_MEM_BASE0 0x63000000 /* Memory region 1 */ -#define REALVIEW_PB1176_PCI_MEM_BASE1 0x64000000 /* Memory region 2 */ -#define REALVIEW_PB1176_PCI_MEM_BASE2 0x68000000 /* Memory region 3 */ - -#define REALVIEW_PB1176_PCI_BASE_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_CFG_BASE_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_IO_BASE0_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE0_SIZE 0x01000000 /* 16MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE1_SIZE 0x04000000 /* 64MB */ -#define REALVIEW_PB1176_PCI_MEM_BASE2_SIZE 0x08000000 /* 128MB */ - -#define REALVIEW_DC1176_GIC_CPU_BASE 0x10120000 /* GIC CPU interface, on devchip */ -#define REALVIEW_DC1176_GIC_DIST_BASE 0x10121000 /* GIC distributor, on devchip */ -#define REALVIEW_PB1176_GIC_CPU_BASE 0x10040000 /* GIC CPU interface, on FPGA */ -#define REALVIEW_PB1176_GIC_DIST_BASE 0x10041000 /* GIC distributor, on FPGA */ -#define REALVIEW_PB1176_L220_BASE 0x10110000 /* L220 registers */ - -/* - * Irqs - */ -#define IRQ_DC1176_GIC_START 32 -#define IRQ_PB1176_GIC_START 64 - -/* - * ARM1176 DevChip interrupt sources (primary GIC) - */ -#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */ -#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */ -#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */ -#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */ -#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */ -#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11) -#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12) -#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) -#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) -#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ -#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ -#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ -#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */ -#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */ - -#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */ -#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */ - -/* - * RealView PB1176 interrupt sources (secondary GIC) - */ -#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */ -#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */ -#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */ -#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */ -#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5) -#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */ -#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */ -#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8) -#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9) -#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */ -#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */ - -#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16) - -#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */ - -#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22) -#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23) -#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ -#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ - -#define IRQ_PB1176_GPIO0 -1 -#define IRQ_PB1176_SSP -1 -#define IRQ_PB1176_SCTL -1 - -#define NR_GIC_PB1176 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_PB1176 - */ -#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_PB1176) - -#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_PB1176 -#endif - -#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_PB1176 -#endif - -#endif /* CONFIG_MACH_REALVIEW_PB1176 */ - -#endif /* __ASM_ARCH_BOARD_PB1176_H */ diff --git a/include/asm-arm/arch-realview/board-pb11mp.h b/include/asm-arm/arch-realview/board-pb11mp.h deleted file mode 100644 index a1294d9..0000000 --- a/include/asm-arm/arch-realview/board-pb11mp.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - * include/asm-arm/arch-realview/board-pb11mp.h - * - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_BOARD_PB11MP_H -#define __ASM_ARCH_BOARD_PB11MP_H - -#include - -/* - * Peripheral addresses - */ -#define REALVIEW_PB11MP_UART0_BASE 0x10009000 /* UART 0 */ -#define REALVIEW_PB11MP_UART1_BASE 0x1000A000 /* UART 1 */ -#define REALVIEW_PB11MP_UART2_BASE 0x1000B000 /* UART 2 */ -#define REALVIEW_PB11MP_UART3_BASE 0x1000C000 /* UART 3 */ -#define REALVIEW_PB11MP_SSP_BASE 0x1000D000 /* Synchronous Serial Port */ -#define REALVIEW_PB11MP_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */ -#define REALVIEW_PB11MP_WATCHDOG_BASE 0x10010000 /* watchdog interface */ -#define REALVIEW_PB11MP_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */ -#define REALVIEW_PB11MP_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */ -#define REALVIEW_PB11MP_GPIO0_BASE 0x10013000 /* GPIO port 0 */ -#define REALVIEW_PB11MP_RTC_BASE 0x10017000 /* Real Time Clock */ -#define REALVIEW_PB11MP_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */ -#define REALVIEW_PB11MP_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */ -#define REALVIEW_PB11MP_SCTL_BASE 0x1001A000 /* System Controller */ -#define REALVIEW_PB11MP_CLCD_BASE 0x10020000 /* CLCD */ -#define REALVIEW_PB11MP_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */ -#define REALVIEW_PB11MP_DMC_BASE 0x100E0000 /* DMC configuration */ -#define REALVIEW_PB11MP_SMC_BASE 0x100E1000 /* SMC configuration */ -#define REALVIEW_PB11MP_CAN_BASE 0x100E2000 /* CAN bus */ -#define REALVIEW_PB11MP_CF_BASE 0x18000000 /* Compact flash */ -#define REALVIEW_PB11MP_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */ -#define REALVIEW_PB11MP_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */ -#define REALVIEW_PB11MP_FLASH0_BASE 0x40000000 -#define REALVIEW_PB11MP_FLASH0_SIZE SZ_64M -#define REALVIEW_PB11MP_FLASH1_BASE 0x44000000 -#define REALVIEW_PB11MP_FLASH1_SIZE SZ_64M -#define REALVIEW_PB11MP_ETH_BASE 0x4E000000 /* Ethernet */ -#define REALVIEW_PB11MP_USB_BASE 0x4F000000 /* USB */ -#define REALVIEW_PB11MP_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */ -#define REALVIEW_PB11MP_LT_BASE 0xC0000000 /* Logic Tile expansion */ -#define REALVIEW_PB11MP_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */ -#define REALVIEW_PB11MP_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */ - -#define REALVIEW_PB11MP_SYS_PLD_CTRL1 0x74 - -/* - * PB11MPCore PCI regions - */ -#define REALVIEW_PB11MP_PCI_BASE 0x90040000 /* PCI-X Unit base */ -#define REALVIEW_PB11MP_PCI_IO_BASE 0x90050000 /* IO Region on AHB */ -#define REALVIEW_PB11MP_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */ - -#define REALVIEW_PB11MP_PCI_BASE_SIZE 0x10000 /* 16 Kb */ -#define REALVIEW_PB11MP_PCI_IO_SIZE 0x1000 /* 4 Kb */ -#define REALVIEW_PB11MP_PCI_MEM_SIZE 0x20000000 /* 512 MB */ - -/* - * Testchip peripheral and fpga gic regions - */ -#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */ -#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */ -#define REALVIEW_TC11MP_TWD_BASE 0x1F000700 -#define REALVIEW_TC11MP_TWD_SIZE 0x00000100 -#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */ -#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */ - -/* - * Irqs - */ -#define IRQ_TC11MP_GIC_START 32 -#define IRQ_PB11MP_GIC_START 64 - -/* - * ARM11MPCore test chip interrupt sources (primary GIC on the test chip) - */ -#define IRQ_TC11MP_AACI (IRQ_TC11MP_GIC_START + 0) -#define IRQ_TC11MP_TIMER0_1 (IRQ_TC11MP_GIC_START + 1) -#define IRQ_TC11MP_TIMER2_3 (IRQ_TC11MP_GIC_START + 2) -#define IRQ_TC11MP_USB (IRQ_TC11MP_GIC_START + 3) -#define IRQ_TC11MP_UART0 (IRQ_TC11MP_GIC_START + 4) -#define IRQ_TC11MP_UART1 (IRQ_TC11MP_GIC_START + 5) -#define IRQ_TC11MP_RTC (IRQ_TC11MP_GIC_START + 6) -#define IRQ_TC11MP_KMI0 (IRQ_TC11MP_GIC_START + 7) -#define IRQ_TC11MP_KMI1 (IRQ_TC11MP_GIC_START + 8) -#define IRQ_TC11MP_ETH (IRQ_TC11MP_GIC_START + 9) -#define IRQ_TC11MP_PB_IRQ1 (IRQ_TC11MP_GIC_START + 10) /* main GIC */ -#define IRQ_TC11MP_PB_IRQ2 (IRQ_TC11MP_GIC_START + 11) /* tile GIC */ -#define IRQ_TC11MP_PB_FIQ1 (IRQ_TC11MP_GIC_START + 12) /* main GIC */ -#define IRQ_TC11MP_PB_FIQ2 (IRQ_TC11MP_GIC_START + 13) /* tile GIC */ -#define IRQ_TC11MP_MMCI0A (IRQ_TC11MP_GIC_START + 14) -#define IRQ_TC11MP_MMCI0B (IRQ_TC11MP_GIC_START + 15) - -#define IRQ_TC11MP_PMU_CPU0 (IRQ_TC11MP_GIC_START + 17) -#define IRQ_TC11MP_PMU_CPU1 (IRQ_TC11MP_GIC_START + 18) -#define IRQ_TC11MP_PMU_CPU2 (IRQ_TC11MP_GIC_START + 19) -#define IRQ_TC11MP_PMU_CPU3 (IRQ_TC11MP_GIC_START + 20) -#define IRQ_TC11MP_PMU_SCU0 (IRQ_TC11MP_GIC_START + 21) -#define IRQ_TC11MP_PMU_SCU1 (IRQ_TC11MP_GIC_START + 22) -#define IRQ_TC11MP_PMU_SCU2 (IRQ_TC11MP_GIC_START + 23) -#define IRQ_TC11MP_PMU_SCU3 (IRQ_TC11MP_GIC_START + 24) -#define IRQ_TC11MP_PMU_SCU4 (IRQ_TC11MP_GIC_START + 25) -#define IRQ_TC11MP_PMU_SCU5 (IRQ_TC11MP_GIC_START + 26) -#define IRQ_TC11MP_PMU_SCU6 (IRQ_TC11MP_GIC_START + 27) -#define IRQ_TC11MP_PMU_SCU7 (IRQ_TC11MP_GIC_START + 28) - -#define IRQ_TC11MP_L220_EVENT (IRQ_TC11MP_GIC_START + 29) -#define IRQ_TC11MP_L220_SLAVE (IRQ_TC11MP_GIC_START + 30) -#define IRQ_TC11MP_L220_DECODE (IRQ_TC11MP_GIC_START + 31) - -/* - * RealView PB11MPCore GIC interrupt sources (secondary GIC on the board) - */ -#define IRQ_PB11MP_WATCHDOG (IRQ_PB11MP_GIC_START + 0) /* Watchdog timer */ -#define IRQ_PB11MP_SOFT (IRQ_PB11MP_GIC_START + 1) /* Software interrupt */ -#define IRQ_PB11MP_COMMRx (IRQ_PB11MP_GIC_START + 2) /* Debug Comm Rx interrupt */ -#define IRQ_PB11MP_COMMTx (IRQ_PB11MP_GIC_START + 3) /* Debug Comm Tx interrupt */ -#define IRQ_PB11MP_GPIO0 (IRQ_PB11MP_GIC_START + 6) /* GPIO 0 */ -#define IRQ_PB11MP_GPIO1 (IRQ_PB11MP_GIC_START + 7) /* GPIO 1 */ -#define IRQ_PB11MP_GPIO2 (IRQ_PB11MP_GIC_START + 8) /* GPIO 2 */ - /* 9 reserved */ -#define IRQ_PB11MP_RTC_GIC1 (IRQ_PB11MP_GIC_START + 10) /* Real Time Clock */ -#define IRQ_PB11MP_SSP (IRQ_PB11MP_GIC_START + 11) /* Synchronous Serial Port */ -#define IRQ_PB11MP_UART0_GIC1 (IRQ_PB11MP_GIC_START + 12) /* UART 0 on development chip */ -#define IRQ_PB11MP_UART1_GIC1 (IRQ_PB11MP_GIC_START + 13) /* UART 1 on development chip */ -#define IRQ_PB11MP_UART2 (IRQ_PB11MP_GIC_START + 14) /* UART 2 on development chip */ -#define IRQ_PB11MP_UART3 (IRQ_PB11MP_GIC_START + 15) /* UART 3 on development chip */ -#define IRQ_PB11MP_SCI (IRQ_PB11MP_GIC_START + 16) /* Smart Card Interface */ -#define IRQ_PB11MP_MMCI0A_GIC1 (IRQ_PB11MP_GIC_START + 17) /* Multimedia Card 0A */ -#define IRQ_PB11MP_MMCI0B_GIC1 (IRQ_PB11MP_GIC_START + 18) /* Multimedia Card 0B */ -#define IRQ_PB11MP_AACI_GIC1 (IRQ_PB11MP_GIC_START + 19) /* Audio Codec */ -#define IRQ_PB11MP_KMI0_GIC1 (IRQ_PB11MP_GIC_START + 20) /* Keyboard/Mouse port 0 */ -#define IRQ_PB11MP_KMI1_GIC1 (IRQ_PB11MP_GIC_START + 21) /* Keyboard/Mouse port 1 */ -#define IRQ_PB11MP_CHARLCD (IRQ_PB11MP_GIC_START + 22) /* Character LCD */ -#define IRQ_PB11MP_CLCD (IRQ_PB11MP_GIC_START + 23) /* CLCD controller */ -#define IRQ_PB11MP_DMAC (IRQ_PB11MP_GIC_START + 24) /* DMA controller */ -#define IRQ_PB11MP_PWRFAIL (IRQ_PB11MP_GIC_START + 25) /* Power failure */ -#define IRQ_PB11MP_PISMO (IRQ_PB11MP_GIC_START + 26) /* PISMO interface */ -#define IRQ_PB11MP_DoC (IRQ_PB11MP_GIC_START + 27) /* Disk on Chip memory controller */ -#define IRQ_PB11MP_ETH_GIC1 (IRQ_PB11MP_GIC_START + 28) /* Ethernet controller */ -#define IRQ_PB11MP_USB_GIC1 (IRQ_PB11MP_GIC_START + 29) /* USB controller */ -#define IRQ_PB11MP_TSPEN (IRQ_PB11MP_GIC_START + 30) /* Touchscreen pen */ -#define IRQ_PB11MP_TSKPAD (IRQ_PB11MP_GIC_START + 31) /* Touchscreen keypad */ - -#define IRQ_PB11MP_SMC -1 -#define IRQ_PB11MP_SCTL -1 - -#define NR_GIC_PB11MP 2 - -/* - * Only define NR_IRQS if less than NR_IRQS_PB11MP - */ -#define NR_IRQS_PB11MP (IRQ_TC11MP_GIC_START + 96) - -#if defined(CONFIG_MACH_REALVIEW_PB11MP) - -#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB11MP) -#undef NR_IRQS -#define NR_IRQS NR_IRQS_PB11MP -#endif - -#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB11MP) -#undef MAX_GIC_NR -#define MAX_GIC_NR NR_GIC_PB11MP -#endif - -#endif /* CONFIG_MACH_REALVIEW_PB11MP */ - -#endif /* __ASM_ARCH_BOARD_PB11MP_H */ diff --git a/include/asm-arm/arch-realview/debug-macro.S b/include/asm-arm/arch-realview/debug-macro.S deleted file mode 100644 index c8c860c..0000000 --- a/include/asm-arm/arch-realview/debug-macro.S +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/include/asm-arm/arch-realview/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xf0000000 @ virtual base - orr \rx, \rx, #0x00009000 - .endm - -#include diff --git a/include/asm-arm/arch-realview/dma.h b/include/asm-arm/arch-realview/dma.h deleted file mode 100644 index 8342e3f..0000000 --- a/include/asm-arm/arch-realview/dma.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/dma.h - * - * Copyright (C) 2003 ARM Limited. - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S deleted file mode 100644 index 31a39a7..0000000 --- a/include/asm-arm/arch-realview/entry-macro.S +++ /dev/null @@ -1,81 +0,0 @@ -/* - * include/asm-arm/arch-realview/entry-macro.S - * - * Low-level IRQ helper macros for RealView platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =gic_cpu_base_addr - ldr \base, [\base] - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - /* - * The interrupt numbering scheme is defined in the - * interrupt controller spec. To wit: - * - * Interrupts 0-15 are IPI - * 16-28 are reserved - * 29-31 are local. We allow 30 to be used for the watchdog. - * 32-1020 are global - * 1021-1022 are reserved - * 1023 is "spurious" (no interrupt) - * - * For now, we ignore all local interrupts so only return an interrupt if it's - * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. - * - * A simple read from the controller will tell us the number of the highest - * priority enabled interrupt. We then just need to check whether it is in the - * valid range for an IRQ (30-1020 inclusive). - */ - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ - - ldr \tmp, =1021 - - bic \irqnr, \irqstat, #0x1c00 - - cmp \irqnr, #29 - cmpcc \irqnr, \irqnr - cmpne \irqnr, \tmp - cmpcs \irqnr, \irqnr - - .endm - - /* We assume that irqstat (the raw value of the IRQ acknowledge - * register) is preserved from the macro above. - * If there is an IPI, we immediately signal end of interrupt on the - * controller, since this requires the original irqstat value which - * we won't easily be able to recreate later. - */ - - .macro test_for_ipi, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - cmp \irqnr, #16 - strcc \irqstat, [\base, #GIC_CPU_EOI] - cmpcs \irqnr, \irqnr - .endm - - /* As above, this assumes that irqstat and base are preserved.. */ - - .macro test_for_ltirq, irqnr, irqstat, base, tmp - bic \irqnr, \irqstat, #0x1c00 - mov \tmp, #0 - cmp \irqnr, #29 - moveq \tmp, #1 - streq \irqstat, [\base, #GIC_CPU_EOI] - cmp \tmp, #0 - .endm diff --git a/include/asm-arm/arch-realview/hardware.h b/include/asm-arm/arch-realview/hardware.h deleted file mode 100644 index 1ee8313..0000000 --- a/include/asm-arm/arch-realview/hardware.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/hardware.h - * - * This file contains the hardware definitions of the RealView boards. - * - * Copyright (C) 2003 ARM Limited. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -/* macro to get at IO space when running virtually */ -#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000) -#define __io_address(n) __io(IO_ADDRESS(n)) - -#endif diff --git a/include/asm-arm/arch-realview/io.h b/include/asm-arm/arch-realview/io.h deleted file mode 100644 index c70f1df..0000000 --- a/include/asm-arm/arch-realview/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} - -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-realview/irqs.h b/include/asm-arm/arch-realview/irqs.h deleted file mode 100644 index ccbac59..0000000 --- a/include/asm-arm/arch-realview/irqs.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/irqs.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H - -#include -#include -#include - -#define IRQ_LOCALTIMER 29 -#define IRQ_LOCALWDOG 30 - -#define IRQ_GIC_START 32 - -#ifndef NR_IRQS -#error "NR_IRQS not defined by the board-specific files" -#endif - -#endif diff --git a/include/asm-arm/arch-realview/memory.h b/include/asm-arm/arch-realview/memory.h deleted file mode 100644 index ed370ab..0000000 --- a/include/asm-arm/arch-realview/memory.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/memory.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) ((x) - PAGE_OFFSET) -#define __bus_to_virt(x) ((x) + PAGE_OFFSET) - -#endif diff --git a/include/asm-arm/arch-realview/platform.h b/include/asm-arm/arch-realview/platform.h deleted file mode 100644 index 424c0aa..0000000 --- a/include/asm-arm/arch-realview/platform.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/platform.h - * - * Copyright (c) ARM Limited 2003. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_PLATFORM_H -#define __ASM_ARCH_PLATFORM_H - -/* - * Memory definitions - */ -#define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/ -#define REALVIEW_BOOT_ROM_HI 0x30000000 -#define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */ -#define REALVIEW_BOOT_ROM_SIZE SZ_64M - -#define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */ -#define REALVIEW_SSRAM_SIZE SZ_2M - -/* - * SDRAM - */ -#define REALVIEW_SDRAM_BASE 0x00000000 - -/* - * Logic expansion modules - * - */ - - -/* ------------------------------------------------------------------------ - * RealView Registers - * ------------------------------------------------------------------------ - * - */ -#define REALVIEW_SYS_ID_OFFSET 0x00 -#define REALVIEW_SYS_SW_OFFSET 0x04 -#define REALVIEW_SYS_LED_OFFSET 0x08 -#define REALVIEW_SYS_OSC0_OFFSET 0x0C - -#define REALVIEW_SYS_OSC1_OFFSET 0x10 -#define REALVIEW_SYS_OSC2_OFFSET 0x14 -#define REALVIEW_SYS_OSC3_OFFSET 0x18 -#define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */ - -#define REALVIEW_SYS_LOCK_OFFSET 0x20 -#define REALVIEW_SYS_100HZ_OFFSET 0x24 -#define REALVIEW_SYS_CFGDATA1_OFFSET 0x28 -#define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C -#define REALVIEW_SYS_FLAGS_OFFSET 0x30 -#define REALVIEW_SYS_FLAGSSET_OFFSET 0x30 -#define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34 -#define REALVIEW_SYS_NVFLAGS_OFFSET 0x38 -#define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38 -#define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C -#define REALVIEW_SYS_RESETCTL_OFFSET 0x40 -#define REALVIEW_SYS_PCICTL_OFFSET 0x44 -#define REALVIEW_SYS_MCI_OFFSET 0x48 -#define REALVIEW_SYS_FLASH_OFFSET 0x4C -#define REALVIEW_SYS_CLCD_OFFSET 0x50 -#define REALVIEW_SYS_CLCDSER_OFFSET 0x54 -#define REALVIEW_SYS_BOOTCS_OFFSET 0x58 -#define REALVIEW_SYS_24MHz_OFFSET 0x5C -#define REALVIEW_SYS_MISC_OFFSET 0x60 -#define REALVIEW_SYS_IOSEL_OFFSET 0x70 -#define REALVIEW_SYS_PROCID_OFFSET 0x84 -#define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0 -#define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4 -#define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8 -#define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC -#define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0 - -#define REALVIEW_SYS_BASE 0x10000000 -#define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET) -#define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET) -#define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET) -#define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET) -#define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET) - -#define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET) -#define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET) -#define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET) -#define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET) -#define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET) -#define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET) -#define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET) -#define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET) -#define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET) -#define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET) -#define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET) -#define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET) -#define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET) -#define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET) -#define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET) -#define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET) -#define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET) -#define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET) -#define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET) -#define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET) -#define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET) -#define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET) -#define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET) -#define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET) -#define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET) -#define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET) - -/* - * Values for REALVIEW_SYS_RESET_CTRL - */ -#define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01 -#define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02 -#define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03 -#define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04 -#define REALVIEW_SYS_CTRL_RESET_POR 0x05 -#define REALVIEW_SYS_CTRL_RESET_DoC 0x06 - -#define REALVIEW_SYS_CTRL_LED (1 << 0) - - -/* ------------------------------------------------------------------------ - * RealView control registers - * ------------------------------------------------------------------------ - */ - -/* - * REALVIEW_IDFIELD - * - * 31:24 = manufacturer (0x41 = ARM) - * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus) - * 15:12 = FPGA (0x3 = XVC600 or XVC600E) - * 11:4 = build value - * 3:0 = revision number (0x1 = rev B (AHB)) - */ - -/* - * REALVIEW_SYS_LOCK - * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, - * SYS_CLD, SYS_BOOTCS - */ -#define REALVIEW_SYS_LOCK_LOCKED (1 << 16) -#define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ - -/* - * REALVIEW_SYS_FLASH - */ -#define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ - -/* - * REALVIEW_INTREG - * - used to acknowledge and control MMCI and UART interrupts - */ -#define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */ -#define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */ -#define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */ - /* write 1 to acknowledge and clear */ -#define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */ -#define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */ - -/* - * RealView common peripheral addresses - */ -#define REALVIEW_SCTL_BASE 0x10001000 /* System controller */ -#define REALVIEW_I2C_BASE 0x10002000 /* I2C control */ -#define REALVIEW_AACI_BASE 0x10004000 /* Audio */ -#define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */ -#define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */ -#define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */ -#define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */ -#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */ -#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */ -#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */ -#define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */ -#define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */ - -/* PCI space */ -#define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */ -#define REALVIEW_PCI_CFG_BASE 0x42000000 -#define REALVIEW_PCI_MEM_BASE0 0x44000000 -#define REALVIEW_PCI_MEM_BASE1 0x50000000 -#define REALVIEW_PCI_MEM_BASE2 0x60000000 -/* Sizes of above maps */ -#define REALVIEW_PCI_BASE_SIZE 0x01000000 -#define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000 -#define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ -#define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ -#define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ - -#define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */ - -/* - * Disk on Chip - */ -#define REALVIEW_DOC_BASE 0x2C000000 -#define REALVIEW_DOC_SIZE (16 << 20) -#define REALVIEW_DOC_PAGE_SIZE 512 -#define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) - -#define ERASE_UNIT_PAGES 32 -#define START_PAGE 0x80 - -/* - * LED settings, bits [7:0] - */ -#define REALVIEW_SYS_LED0 (1 << 0) -#define REALVIEW_SYS_LED1 (1 << 1) -#define REALVIEW_SYS_LED2 (1 << 2) -#define REALVIEW_SYS_LED3 (1 << 3) -#define REALVIEW_SYS_LED4 (1 << 4) -#define REALVIEW_SYS_LED5 (1 << 5) -#define REALVIEW_SYS_LED6 (1 << 6) -#define REALVIEW_SYS_LED7 (1 << 7) - -#define ALL_LEDS 0xFF - -#define LED_BANK REALVIEW_SYS_LED - -/* - * Control registers - */ -#define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */ -#define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */ -#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ -#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ - -/* - * Application Flash - * - */ -#define FLASH_BASE REALVIEW_FLASH_BASE -#define FLASH_SIZE REALVIEW_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE REALVIEW_BOOT_ROM_HI -#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) - -/* - * Clean base - dummy - * - */ -#define CLEAN_BASE EPROM_BASE - -/* - * System controller bit assignment - */ -#define REALVIEW_REFCLK 0 -#define REALVIEW_TIMCLK 1 - -#define REALVIEW_TIMER1_EnSel 15 -#define REALVIEW_TIMER2_EnSel 17 -#define REALVIEW_TIMER3_EnSel 19 -#define REALVIEW_TIMER4_EnSel 21 - - -#define MAX_TIMER 2 -#define MAX_PERIOD 699050 -#define TICKS_PER_uSEC 1 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_5 (mSEC_1 * 5) -#define mSEC_10 (mSEC_1 * 10) -#define mSEC_25 (mSEC_1 * 25) -#define SEC_1 (mSEC_1 * 1000) - -#define REALVIEW_CSR_BASE 0x10000000 -#define REALVIEW_CSR_SIZE 0x10000000 - -#endif /* __ASM_ARCH_PLATFORM_H */ diff --git a/include/asm-arm/arch-realview/scu.h b/include/asm-arm/arch-realview/scu.h deleted file mode 100644 index d55802d..0000000 --- a/include/asm-arm/arch-realview/scu.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASMARM_ARCH_SCU_H -#define __ASMARM_ARCH_SCU_H - -/* - * SCU registers - */ -#define SCU_CTRL 0x00 -#define SCU_CONFIG 0x04 -#define SCU_CPU_STATUS 0x08 -#define SCU_INVALIDATE 0x0c -#define SCU_FPGA_REVISION 0x10 - -#endif diff --git a/include/asm-arm/arch-realview/smp.h b/include/asm-arm/arch-realview/smp.h deleted file mode 100644 index 515819e..0000000 --- a/include/asm-arm/arch-realview/smp.h +++ /dev/null @@ -1,30 +0,0 @@ -#ifndef ASMARM_ARCH_SMP_H -#define ASMARM_ARCH_SMP_H - - -#include - -#define hard_smp_processor_id() \ - ({ \ - unsigned int cpunum; \ - __asm__("mrc p15, 0, %0, c0, c0, 5" \ - : "=r" (cpunum)); \ - cpunum &= 0x0F; \ - }) - -/* - * We use IRQ1 as the IPI - */ -static inline void smp_cross_call(cpumask_t callmap) -{ - gic_raise_softirq(callmap, 1); -} - -/* - * Do nothing on MPcore. - */ -static inline void smp_cross_call_done(cpumask_t callmap) -{ -} - -#endif diff --git a/include/asm-arm/arch-realview/system.h b/include/asm-arm/arch-realview/system.h deleted file mode 100644 index bff3d3f..0000000 --- a/include/asm-arm/arch-realview/system.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - void __iomem *hdr_ctrl = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_RESETCTL_OFFSET; - unsigned int val; - - /* - * To reset, we hit the on-board reset register - * in the system FPGA - */ - val = __raw_readl(hdr_ctrl); - val |= REALVIEW_SYS_CTRL_RESET_CONFIGCLR; - __raw_writel(val, hdr_ctrl); -} - -#endif diff --git a/include/asm-arm/arch-realview/timex.h b/include/asm-arm/arch-realview/timex.h deleted file mode 100644 index 5b9d82d..0000000 --- a/include/asm-arm/arch-realview/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/timex.h - * - * RealView architecture timex specifications - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-realview/uncompress.h b/include/asm-arm/arch-realview/uncompress.h deleted file mode 100644 index 3f7ae2e..0000000 --- a/include/asm-arm/arch-realview/uncompress.h +++ /dev/null @@ -1,72 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/uncompress.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include - -#include -#include -#include - -#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) -#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c)) -#define AMBA_UART_CR(base) (*(volatile unsigned char *)((base) + 0x30)) -#define AMBA_UART_FR(base) (*(volatile unsigned char *)((base) + 0x18)) - -/* - * Return the UART base address - */ -static inline unsigned long get_uart_base(void) -{ - if (machine_is_realview_eb()) - return REALVIEW_EB_UART0_BASE; - else if (machine_is_realview_pb11mp()) - return REALVIEW_PB11MP_UART0_BASE; - else if (machine_is_realview_pb1176()) - return REALVIEW_PB1176_UART0_BASE; - else - return 0; -} - -/* - * This does not append a newline - */ -static inline void putc(int c) -{ - unsigned long base = get_uart_base(); - - while (AMBA_UART_FR(base) & (1 << 5)) - barrier(); - - AMBA_UART_DR(base) = c; -} - -static inline void flush(void) -{ - unsigned long base = get_uart_base(); - - while (AMBA_UART_FR(base) & (1 << 3)) - barrier(); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-realview/vmalloc.h b/include/asm-arm/arch-realview/vmalloc.h deleted file mode 100644 index 0ad49af..0000000 --- a/include/asm-arm/arch-realview/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-realview/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x18000000) diff --git a/include/asm-arm/arch-rpc/acornfb.h b/include/asm-arm/arch-rpc/acornfb.h deleted file mode 100644 index ecb7733..0000000 --- a/include/asm-arm/arch-rpc/acornfb.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/acornfb.h - * - * Copyright (C) 1999 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * AcornFB architecture specific code - */ - -#define acornfb_bandwidth(var) ((var)->pixclock * 8 / (var)->bits_per_pixel) - -static inline int -acornfb_valid_pixrate(struct fb_var_screeninfo *var) -{ - u_long limit; - - if (!var->pixclock) - return 0; - - /* - * Limits below are taken from RISC OS bandwidthlimit file - */ - if (current_par.using_vram) { - if (current_par.vram_half_sam == 2048) - limit = 6578; - else - limit = 13157; - } else { - limit = 26315; - } - - return acornfb_bandwidth(var) >= limit; -} - -/* - * Try to find the best PLL parameters for the pixel clock. - * This algorithm seems to give best predictable results, - * and produces the same values as detailed in the VIDC20 - * data sheet. - */ -static inline u_int -acornfb_vidc20_find_pll(u_int pixclk) -{ - u_int r, best_r = 2, best_v = 2; - int best_d = 0x7fffffff; - - for (r = 2; r <= 32; r++) { - u_int rr, v, p; - int d; - - rr = 41667 * r; - - v = (rr + pixclk / 2) / pixclk; - - if (v > 32 || v < 2) - continue; - - p = (rr + v / 2) / v; - - d = pixclk - p; - - if (d < 0) - d = -d; - - if (d < best_d) { - best_d = d; - best_v = v - 1; - best_r = r - 1; - } - - if (d == 0) - break; - } - - return best_v << 8 | best_r; -} - -static inline void -acornfb_vidc20_find_rates(struct vidc_timing *vidc, - struct fb_var_screeninfo *var) -{ - u_int div; - - /* Select pixel-clock divisor to keep PLL in range */ - div = var->pixclock / 9090; /*9921*/ - - /* Limit divisor */ - if (div == 0) - div = 1; - if (div > 8) - div = 8; - - /* Encode divisor to VIDC20 setting */ - switch (div) { - case 1: vidc->control |= VIDC20_CTRL_PIX_CK; break; - case 2: vidc->control |= VIDC20_CTRL_PIX_CK2; break; - case 3: vidc->control |= VIDC20_CTRL_PIX_CK3; break; - case 4: vidc->control |= VIDC20_CTRL_PIX_CK4; break; - case 5: vidc->control |= VIDC20_CTRL_PIX_CK5; break; - case 6: vidc->control |= VIDC20_CTRL_PIX_CK6; break; - case 7: vidc->control |= VIDC20_CTRL_PIX_CK7; break; - case 8: vidc->control |= VIDC20_CTRL_PIX_CK8; break; - } - - /* - * With VRAM, the FIFO can be set to the highest possible setting - * because there are no latency considerations for other memory - * accesses. However, in 64 bit bus mode the FIFO preload value - * must not be set to VIDC20_CTRL_FIFO_28 because this will let - * the FIFO overflow. See VIDC20 manual page 33 (6.0 Setting the - * FIFO preload value). - */ - if (current_par.using_vram) { - if (current_par.vram_half_sam == 2048) - vidc->control |= VIDC20_CTRL_FIFO_24; - else - vidc->control |= VIDC20_CTRL_FIFO_28; - } else { - unsigned long bandwidth = acornfb_bandwidth(var); - - /* Encode bandwidth as VIDC20 setting */ - if (bandwidth > 33334) /* < 30.0MB/s */ - vidc->control |= VIDC20_CTRL_FIFO_16; - else if (bandwidth > 26666) /* < 37.5MB/s */ - vidc->control |= VIDC20_CTRL_FIFO_20; - else if (bandwidth > 22222) /* < 45.0MB/s */ - vidc->control |= VIDC20_CTRL_FIFO_24; - else /* > 45.0MB/s */ - vidc->control |= VIDC20_CTRL_FIFO_28; - } - - /* Find the PLL values */ - vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div); -} - -#define acornfb_default_control() (VIDC20_CTRL_PIX_VCLK) -#define acornfb_default_econtrol() (VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3)) diff --git a/include/asm-arm/arch-rpc/debug-macro.S b/include/asm-arm/arch-rpc/debug-macro.S deleted file mode 100644 index c634c8d..0000000 --- a/include/asm-arm/arch-rpc/debug-macro.S +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/include/asm-arm/arch-rpc/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x03000000 - movne \rx, #0xe0000000 - orr \rx, \rx, #0x00010000 - orr \rx, \rx, #0x00000fe0 - .endm - -#define UART_SHIFT 2 -#define FLOW_CONTROL -#include diff --git a/include/asm-arm/arch-rpc/dma.h b/include/asm-arm/arch-rpc/dma.h deleted file mode 100644 index d24a27e3..0000000 --- a/include/asm-arm/arch-rpc/dma.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/dma.h - * - * Copyright (C) 1997 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* - * This is the maximum DMA address that can be DMAd to. - * There should not be more than (0xd0000000 - 0xc0000000) - * bytes of RAM. - */ -#define MAX_DMA_ADDRESS 0xd0000000 -#define MAX_DMA_CHANNELS 8 - -#define DMA_0 0 -#define DMA_1 1 -#define DMA_2 2 -#define DMA_3 3 -#define DMA_S0 4 -#define DMA_S1 5 -#define DMA_VIRTUAL_FLOPPY 6 -#define DMA_VIRTUAL_SOUND 7 - -#define DMA_FLOPPY DMA_VIRTUAL_FLOPPY - -#endif /* _ASM_ARCH_DMA_H */ - diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S deleted file mode 100644 index 5bd5555..0000000 --- a/include/asm-arm/arch-rpc/entry-macro.S +++ /dev/null @@ -1,16 +0,0 @@ -#include -#include - - .equ ioc_base_high, IOC_BASE & 0xff000000 - .equ ioc_base_low, IOC_BASE & 0x00ff0000 - - .macro get_irqnr_preamble, base, tmp - mov \base, #ioc_base_high @ point at IOC - .if ioc_base_low - orr \base, \base, #ioc_base_low - .endif - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - diff --git a/include/asm-arm/arch-rpc/hardware.h b/include/asm-arm/arch-rpc/hardware.h deleted file mode 100644 index 7480f4e..0000000 --- a/include/asm-arm/arch-rpc/hardware.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/hardware.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This file contains the hardware definitions of the RiscPC series machines. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include - -#ifndef __ASSEMBLY__ -#define IOMEM(x) ((void __iomem *)(unsigned long)(x)) -#else -#define IOMEM(x) x -#endif /* __ASSEMBLY__ */ - -/* - * What hardware must be present - */ -#define HAS_IOMD -#define HAS_VIDC20 - -/* Hardware addresses of major areas. - * *_START is the physical address - * *_SIZE is the size of the region - * *_BASE is the virtual address - */ -#define RAM_SIZE 0x10000000 -#define RAM_START 0x10000000 - -#define EASI_SIZE 0x08000000 /* EASI I/O */ -#define EASI_START 0x08000000 -#define EASI_BASE 0xe5000000 - -#define IO_START 0x03000000 /* I/O */ -#define IO_SIZE 0x01000000 -#define IO_BASE IOMEM(0xe0000000) - -#define SCREEN_START 0x02000000 /* VRAM */ -#define SCREEN_END 0xdfc00000 -#define SCREEN_BASE 0xdf800000 - -#define UNCACHEABLE_ADDR 0xdf010000 - -/* - * IO Addresses - */ -#define VIDC_BASE IOMEM(0xe0400000) -#define EXPMASK_BASE 0xe0360000 -#define IOMD_BASE IOMEM(0xe0200000) -#define IOC_BASE IOMEM(0xe0200000) -#define PCIO_BASE IOMEM(0xe0010000) -#define FLOPPYDMA_BASE IOMEM(0xe002a000) - -#define vidc_writel(val) __raw_writel(val, VIDC_BASE) - -#define IO_EC_EASI_BASE 0x81400000 -#define IO_EC_IOC4_BASE 0x8009c000 -#define IO_EC_IOC_BASE 0x80090000 -#define IO_EC_MEMC8_BASE 0x8000ac00 -#define IO_EC_MEMC_BASE 0x80000000 - -#define NETSLOT_BASE 0x0302b000 -#define NETSLOT_SIZE 0x00001000 - -#define PODSLOT_IOC0_BASE 0x03240000 -#define PODSLOT_IOC4_BASE 0x03270000 -#define PODSLOT_IOC_SIZE (1 << 14) -#define PODSLOT_MEMC_BASE 0x03000000 -#define PODSLOT_MEMC_SIZE (1 << 14) -#define PODSLOT_EASI_BASE 0x08000000 -#define PODSLOT_EASI_SIZE (1 << 24) - -#define EXPMASK_STATUS (EXPMASK_BASE + 0x00) -#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04) - -#endif diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h deleted file mode 100644 index 0d10d45..0000000 --- a/include/asm-arm/arch-rpc/io.h +++ /dev/null @@ -1,258 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/io.h - * - * Copyright (C) 1997 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Modifications: - * 06-Dec-1997 RMK Created. - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * GCC is totally crap at loading/storing data. We try to persuade it - * to do the right thing by using these whereever possible instead of - * the above. - */ -#define __arch_base_getb(b,o) \ - ({ \ - unsigned int __v, __r = (b); \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2]" \ - : "=r" (__v) \ - : "r" (__r), "Ir" (o)); \ - __v; \ - }) - -#define __arch_base_getl(b,o) \ - ({ \ - unsigned int __v, __r = (b); \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2]" \ - : "=r" (__v) \ - : "r" (__r), "Ir" (o)); \ - __v; \ - }) - -#define __arch_base_putb(v,b,o) \ - ({ \ - unsigned int __r = (b); \ - __asm__ __volatile__( \ - "strb %0, [%1, %2]" \ - : \ - : "r" (v), "r" (__r), "Ir" (o));\ - }) - -#define __arch_base_putl(v,b,o) \ - ({ \ - unsigned int __r = (b); \ - __asm__ __volatile__( \ - "str %0, [%1, %2]" \ - : \ - : "r" (v), "r" (__r), "Ir" (o));\ - }) - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. Note that all addresses are - * shifted left! - */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) - -/* - * Dynamic IO functions. - */ -static inline void __outb (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "strb %1, [%0, %2, lsl #2] @ outb" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outw (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outw" - : "=&r" (temp) - : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -static inline void __outl (unsigned int value, unsigned int port) -{ - unsigned long temp; - __asm__ __volatile__( - "tst %2, #0x80000000\n\t" - "mov %0, %4\n\t" - "addeq %0, %0, %3\n\t" - "str %1, [%0, %2, lsl #2] @ outl" - : "=&r" (temp) - : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) - : "cc"); -} - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "tst %2, #0x80000000\n\t" \ - "mov %0, %4\n\t" \ - "addeq %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline void __iomem *__deprecated __ioaddr(unsigned int port) -{ - void __iomem *ret; - if (__PORT_PCIO(port)) - ret = PCIO_BASE; - else - ret = IO_BASE; - return ret + (port << 2); -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long __v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (__v|__v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outwc" \ - : : "r" (__v|__v<<16), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inwc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result & 0xffff; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long __v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (__v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (__v), "r" (IO_BASE), "r" ((port) << 2)); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \ - result; \ -}) - -#define __ioaddrc(port) __ioaddr(port) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) -/* the following macro is deprecated */ -#define ioaddr(port) ((unsigned long)__ioaddr((port))) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) - -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - -#endif diff --git a/include/asm-arm/arch-rpc/irqs.h b/include/asm-arm/arch-rpc/irqs.h deleted file mode 100644 index 27c35b0..0000000 --- a/include/asm-arm/arch-rpc/irqs.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/irqs.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define IRQ_PRINTER 0 -#define IRQ_BATLOW 1 -#define IRQ_FLOPPYINDEX 2 -#define IRQ_VSYNCPULSE 3 -#define IRQ_POWERON 4 -#define IRQ_TIMER0 5 -#define IRQ_TIMER1 6 -#define IRQ_IMMEDIATE 7 -#define IRQ_EXPCARDFIQ 8 -#define IRQ_HARDDISK 9 -#define IRQ_SERIALPORT 10 -#define IRQ_FLOPPYDISK 12 -#define IRQ_EXPANSIONCARD 13 -#define IRQ_KEYBOARDTX 14 -#define IRQ_KEYBOARDRX 15 - -#define IRQ_DMA0 16 -#define IRQ_DMA1 17 -#define IRQ_DMA2 18 -#define IRQ_DMA3 19 -#define IRQ_DMAS0 20 -#define IRQ_DMAS1 21 - -#define FIQ_FLOPPYDATA 0 -#define FIQ_ECONET 2 -#define FIQ_SERIALPORT 4 -#define FIQ_EXPANSIONCARD 6 -#define FIQ_FORCE 7 - -/* - * This is the offset of the FIQ "IRQ" numbers - */ -#define FIQ_START 64 - -#define IRQ_TIMER IRQ_TIMER0 - diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h deleted file mode 100644 index 303c424..0000000 --- a/include/asm-arm/arch-rpc/memory.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/memory.h - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Changelog: - * 20-Oct-1996 RMK Created - * 31-Dec-1997 RMK Fixed definitions to reduce warnings - * 11-Jan-1998 RMK Uninlined to reduce hits on cache - * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt - * 21-Mar-1999 RMK Renamed to memory.h - * RMK Added TASK_SIZE and PAGE_OFFSET - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x10000000) - -/* - * These are exactly the same on the RiscPC as the - * physical memory view. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * Cache flushing area - ROM - */ -#define FLUSH_BASE_PHYS 0x00000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/include/asm-arm/arch-rpc/system.h b/include/asm-arm/arch-rpc/system.h deleted file mode 100644 index ca3277d..0000000 --- a/include/asm-arm/arch-rpc/system.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/system.h - * - * Copyright (C) 1996-1999 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - iomd_writeb(0, IOMD_ROMCR0); - - /* - * Jump into the ROM - */ - cpu_reset(0); -} diff --git a/include/asm-arm/arch-rpc/timex.h b/include/asm-arm/arch-rpc/timex.h deleted file mode 100644 index ed7df64..0000000 --- a/include/asm-arm/arch-rpc/timex.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/timex.h - * - * Copyright (C) 1997, 1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * RiscPC architecture timex specifications - */ - -/* - * On the RiscPC, the clock ticks at 2MHz. - */ -#define CLOCK_TICK_RATE 2000000 - diff --git a/include/asm-arm/arch-rpc/uncompress.h b/include/asm-arm/arch-rpc/uncompress.h deleted file mode 100644 index 844e4d4..0000000 --- a/include/asm-arm/arch-rpc/uncompress.h +++ /dev/null @@ -1,198 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/uncompress.h - * - * Copyright (C) 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VIDMEM ((char *)SCREEN_START) - -#include -#include -#include -#include - -int video_size_row; -unsigned char bytes_per_char_h; -extern unsigned long con_charconvtable[256]; - -struct param_struct { - unsigned long page_size; - unsigned long nr_pages; - unsigned long ramdisk_size; - unsigned long mountrootrdonly; - unsigned long rootdev; - unsigned long video_num_cols; - unsigned long video_num_rows; - unsigned long video_x; - unsigned long video_y; - unsigned long memc_control_reg; - unsigned char sounddefault; - unsigned char adfsdrives; - unsigned char bytes_per_char_h; - unsigned char bytes_per_char_v; - unsigned long unused[256/4-11]; -}; - -static const unsigned long palette_4[16] = { - 0x00000000, - 0x000000cc, - 0x0000cc00, /* Green */ - 0x0000cccc, /* Yellow */ - 0x00cc0000, /* Blue */ - 0x00cc00cc, /* Magenta */ - 0x00cccc00, /* Cyan */ - 0x00cccccc, /* White */ - 0x00000000, - 0x000000ff, - 0x0000ff00, - 0x0000ffff, - 0x00ff0000, - 0x00ff00ff, - 0x00ffff00, - 0x00ffffff -}; - -#define palette_setpixel(p) *(unsigned long *)(IO_START+0x00400000) = 0x10000000|((p) & 255) -#define palette_write(v) *(unsigned long *)(IO_START+0x00400000) = 0x00000000|((v) & 0x00ffffff) - -/* - * params_phys is a linker defined symbol - see - * arch/arm/boot/compressed/Makefile - */ -extern __attribute__((pure)) struct param_struct *params(void); -#define params (params()) - -#ifndef STANDALONE_DEBUG -static unsigned long video_num_cols; -static unsigned long video_num_rows; -static unsigned long video_x; -static unsigned long video_y; -static unsigned char bytes_per_char_v; -static int white; - -/* - * This does not append a newline - */ -static void putc(int c) -{ - extern void ll_write_char(char *, char c, char white); - int x,y; - char *ptr; - - x = video_x; - y = video_y; - - if (c == '\n') { - if (++y >= video_num_rows) - y--; - } else if (c == '\r') { - x = 0; - } else { - ptr = VIDMEM + ((y*video_num_cols*bytes_per_char_v+x)*bytes_per_char_h); - ll_write_char(ptr, c, white); - if (++x >= video_num_cols) { - x = 0; - if ( ++y >= video_num_rows ) { - y--; - } - } - } - - video_x = x; - video_y = y; -} - -static inline void flush(void) -{ -} - -static void error(char *x); - -/* - * Setup for decompression - */ -static void arch_decomp_setup(void) -{ - int i; - struct tag *t = (struct tag *)params; - unsigned int nr_pages = 0, page_size = PAGE_SIZE; - - if (t->hdr.tag == ATAG_CORE) - { - for (; t->hdr.size; t = tag_next(t)) - { - if (t->hdr.tag == ATAG_VIDEOTEXT) - { - video_num_rows = t->u.videotext.video_lines; - video_num_cols = t->u.videotext.video_cols; - bytes_per_char_h = t->u.videotext.video_points; - bytes_per_char_v = t->u.videotext.video_points; - video_x = t->u.videotext.x; - video_y = t->u.videotext.y; - } - - if (t->hdr.tag == ATAG_MEM) - { - page_size = PAGE_SIZE; - nr_pages += (t->u.mem.size / PAGE_SIZE); - } - } - } - else - { - nr_pages = params->nr_pages; - page_size = params->page_size; - video_num_rows = params->video_num_rows; - video_num_cols = params->video_num_cols; - video_x = params->video_x; - video_y = params->video_y; - bytes_per_char_h = params->bytes_per_char_h; - bytes_per_char_v = params->bytes_per_char_v; - } - - video_size_row = video_num_cols * bytes_per_char_h; - - if (bytes_per_char_h == 4) - for (i = 0; i < 256; i++) - con_charconvtable[i] = - (i & 128 ? 1 << 0 : 0) | - (i & 64 ? 1 << 4 : 0) | - (i & 32 ? 1 << 8 : 0) | - (i & 16 ? 1 << 12 : 0) | - (i & 8 ? 1 << 16 : 0) | - (i & 4 ? 1 << 20 : 0) | - (i & 2 ? 1 << 24 : 0) | - (i & 1 ? 1 << 28 : 0); - else - for (i = 0; i < 16; i++) - con_charconvtable[i] = - (i & 8 ? 1 << 0 : 0) | - (i & 4 ? 1 << 8 : 0) | - (i & 2 ? 1 << 16 : 0) | - (i & 1 ? 1 << 24 : 0); - - - palette_setpixel(0); - if (bytes_per_char_h == 1) { - palette_write (0); - palette_write (0x00ffffff); - for (i = 2; i < 256; i++) - palette_write (0); - white = 1; - } else { - for (i = 0; i < 256; i++) - palette_write (i < 16 ? palette_4[i] : 0); - white = 7; - } - - if (nr_pages * page_size < 4096*1024) error("<4M of mem\n"); -} -#endif - -/* - * nothing to do - */ -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-rpc/vmalloc.h b/include/asm-arm/arch-rpc/vmalloc.h deleted file mode 100644 index 077046b..0000000 --- a/include/asm-arm/arch-rpc/vmalloc.h +++ /dev/null @@ -1,10 +0,0 @@ -/* - * linux/include/asm-arm/arch-rpc/vmalloc.h - * - * Copyright (C) 1997 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#define VMALLOC_END (PAGE_OFFSET + 0x1c000000) diff --git a/include/asm-arm/arch-s3c2400/map.h b/include/asm-arm/arch-s3c2400/map.h deleted file mode 100644 index 1184d90..0000000 --- a/include/asm-arm/arch-s3c2400/map.h +++ /dev/null @@ -1,66 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2400/map.h - * - * Copyright 2003,2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * Copyright 2003, Lucas Correia Villa Real - * - * S3C2400 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define S3C2400_PA_MEMCTRL (0x14000000) -#define S3C2400_PA_USBHOST (0x14200000) -#define S3C2400_PA_IRQ (0x14400000) -#define S3C2400_PA_DMA (0x14600000) -#define S3C2400_PA_CLKPWR (0x14800000) -#define S3C2400_PA_LCD (0x14A00000) -#define S3C2400_PA_UART (0x15000000) -#define S3C2400_PA_TIMER (0x15100000) -#define S3C2400_PA_USBDEV (0x15200140) -#define S3C2400_PA_WATCHDOG (0x15300000) -#define S3C2400_PA_IIC (0x15400000) -#define S3C2400_PA_IIS (0x15508000) -#define S3C2400_PA_GPIO (0x15600000) -#define S3C2400_PA_RTC (0x15700040) -#define S3C2400_PA_ADC (0x15800000) -#define S3C2400_PA_SPI (0x15900000) - -#define S3C2400_PA_MMC (0x15A00000) -#define S3C2400_SZ_MMC SZ_1M - -/* physical addresses of all the chip-select areas */ - -#define S3C2400_CS0 (0x00000000) -#define S3C2400_CS1 (0x02000000) -#define S3C2400_CS2 (0x04000000) -#define S3C2400_CS3 (0x06000000) -#define S3C2400_CS4 (0x08000000) -#define S3C2400_CS5 (0x0A000000) -#define S3C2400_CS6 (0x0C000000) -#define S3C2400_CS7 (0x0E000000) - -#define S3C2400_SDRAM_PA (S3C2400_CS6) - -/* Use a single interface for common resources between S3C24XX cpus */ - -#define S3C24XX_PA_IRQ S3C2400_PA_IRQ -#define S3C24XX_PA_MEMCTRL S3C2400_PA_MEMCTRL -#define S3C24XX_PA_USBHOST S3C2400_PA_USBHOST -#define S3C24XX_PA_DMA S3C2400_PA_DMA -#define S3C24XX_PA_CLKPWR S3C2400_PA_CLKPWR -#define S3C24XX_PA_LCD S3C2400_PA_LCD -#define S3C24XX_PA_UART S3C2400_PA_UART -#define S3C24XX_PA_TIMER S3C2400_PA_TIMER -#define S3C24XX_PA_USBDEV S3C2400_PA_USBDEV -#define S3C24XX_PA_WATCHDOG S3C2400_PA_WATCHDOG -#define S3C24XX_PA_IIC S3C2400_PA_IIC -#define S3C24XX_PA_IIS S3C2400_PA_IIS -#define S3C24XX_PA_GPIO S3C2400_PA_GPIO -#define S3C24XX_PA_RTC S3C2400_PA_RTC -#define S3C24XX_PA_ADC S3C2400_PA_ADC -#define S3C24XX_PA_SPI S3C2400_PA_SPI diff --git a/include/asm-arm/arch-s3c2400/memory.h b/include/asm-arm/arch-s3c2400/memory.h deleted file mode 100644 index fb0381d..0000000 --- a/include/asm-arm/arch-s3c2400/memory.h +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2400/memory.h - * from linux/include/asm-arm/arch-rpc/memory.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x0C000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h deleted file mode 100644 index 168b93f..0000000 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/anubis-cpld.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_ANUBISCPLD_H -#define __ASM_ARCH_ANUBISCPLD_H - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define ANUBIS_CTRL1_NANDSEL (0x3) - -/* IDREG - revision */ - -#define ANUBIS_IDREG_REVMASK (0x7) - -#endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-irq.h b/include/asm-arm/arch-s3c2410/anubis-irq.h deleted file mode 100644 index cd77a70..0000000 --- a/include/asm-arm/arch-s3c2410/anubis-irq.h +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/anubis-irq.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_ANUBISIRQ_H -#define __ASM_ARCH_ANUBISIRQ_H - -#define IRQ_IDE0 IRQ_EINT2 -#define IRQ_IDE1 IRQ_EINT3 -#define IRQ_ASIX IRQ_EINT1 - -#endif /* __ASM_ARCH_ANUBISIRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h deleted file mode 100644 index 830d114..0000000 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ /dev/null @@ -1,38 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/anubis-map.h - * - * Copyright (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * ANUBIS - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -#ifndef __ASM_ARCH_ANUBISMAP_H -#define __ASM_ARCH_ANUBISMAP_H - -/* start peripherals off after the S3C2410 */ - -#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000)) - -#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ -#define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) - -#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) -#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) -#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000) -#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000) - -#endif /* __ASM_ARCH_ANUBISMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/audio.h b/include/asm-arm/arch-s3c2410/audio.h deleted file mode 100644 index 0a6977f..0000000 --- a/include/asm-arm/arch-s3c2410/audio.h +++ /dev/null @@ -1,45 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/audio.h - * - * Copyright (c) 2004-2005 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * Ben Dooks - * - * S3C24XX - Audio platfrom_device info - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_AUDIO_H -#define __ASM_ARCH_AUDIO_H __FILE__ - -/* struct s3c24xx_iis_ops - * - * called from the s3c24xx audio core to deal with the architecture - * or the codec's setup and control. - * - * the pointer to itself is passed through in case the caller wants to - * embed this in an larger structure for easy reference to it's context. -*/ - -struct s3c24xx_iis_ops { - struct module *owner; - - int (*startup)(struct s3c24xx_iis_ops *me); - void (*shutdown)(struct s3c24xx_iis_ops *me); - int (*suspend)(struct s3c24xx_iis_ops *me); - int (*resume)(struct s3c24xx_iis_ops *me); - - int (*open)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm); - int (*close)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm); - int (*prepare)(struct s3c24xx_iis_ops *me, struct snd_pcm_substream *strm, struct snd_pcm_runtime *rt); -}; - -struct s3c24xx_platdata_iis { - const char *codec_clk; - struct s3c24xx_iis_ops *ops; - int (*match_dev)(struct device *dev); -}; - -#endif /* __ASM_ARCH_AUDIO_H */ diff --git a/include/asm-arm/arch-s3c2410/bast-cpld.h b/include/asm-arm/arch-s3c2410/bast-cpld.h deleted file mode 100644 index 034d2c5..0000000 --- a/include/asm-arm/arch-s3c2410/bast-cpld.h +++ /dev/null @@ -1,53 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-cpld.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * BAST - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_BASTCPLD_H -#define __ASM_ARCH_BASTCPLD_H - -/* CTRL1 - Audio LR routing */ - -#define BAST_CPLD_CTRL1_LRCOFF (0x00) -#define BAST_CPLD_CTRL1_LRCADC (0x01) -#define BAST_CPLD_CTRL1_LRCDAC (0x02) -#define BAST_CPLD_CTRL1_LRCARM (0x03) -#define BAST_CPLD_CTRL1_LRMASK (0x03) - -/* CTRL2 - NAND WP control, IDE Reset assert/check */ - -#define BAST_CPLD_CTRL2_WNAND (0x04) -#define BAST_CPLD_CTLR2_IDERST (0x08) - -/* CTRL3 - rom write control, CPLD identity */ - -#define BAST_CPLD_CTRL3_IDMASK (0x0e) -#define BAST_CPLD_CTRL3_ROMWEN (0x01) - -/* CTRL4 - 8bit LCD interface control/status */ - -#define BAST_CPLD_CTRL4_LLAT (0x01) -#define BAST_CPLD_CTRL4_LCDRW (0x02) -#define BAST_CPLD_CTRL4_LCDCMD (0x04) -#define BAST_CPLD_CTRL4_LCDE2 (0x01) - -/* CTRL5 - DMA routing */ - -#define BAST_CPLD_DMA0_PRIIDE (0<<0) -#define BAST_CPLD_DMA0_SECIDE (1<<0) -#define BAST_CPLD_DMA0_ISA15 (2<<0) -#define BAST_CPLD_DMA0_ISA36 (3<<0) - -#define BAST_CPLD_DMA1_PRIIDE (0<<2) -#define BAST_CPLD_DMA1_SECIDE (1<<2) -#define BAST_CPLD_DMA1_ISA15 (2<<2) -#define BAST_CPLD_DMA1_ISA36 (3<<2) - -#endif /* __ASM_ARCH_BASTCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/bast-irq.h b/include/asm-arm/arch-s3c2410/bast-irq.h deleted file mode 100644 index 726c046..0000000 --- a/include/asm-arm/arch-s3c2410/bast-irq.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-irq.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_BASTIRQ_H -#define __ASM_ARCH_BASTIRQ_H - -/* irq numbers to onboard peripherals */ - -#define IRQ_USBOC IRQ_EINT18 -#define IRQ_IDE0 IRQ_EINT16 -#define IRQ_IDE1 IRQ_EINT17 -#define IRQ_PCSERIAL1 IRQ_EINT15 -#define IRQ_PCSERIAL2 IRQ_EINT14 -#define IRQ_PCPARALLEL IRQ_EINT13 -#define IRQ_ASIX IRQ_EINT11 -#define IRQ_DM9000 IRQ_EINT10 -#define IRQ_ISA IRQ_EINT9 -#define IRQ_SMALERT IRQ_EINT8 - -#endif /* __ASM_ARCH_BASTIRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/bast-map.h b/include/asm-arm/arch-s3c2410/bast-map.h deleted file mode 100644 index 86ac1c1..0000000 --- a/include/asm-arm/arch-s3c2410/bast-map.h +++ /dev/null @@ -1,146 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-map.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * Machine BAST - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#ifndef __ASM_ARCH_BASTMAP_H -#define __ASM_ARCH_BASTMAP_H - -#define BAST_IOADDR(x) (S3C2410_ADDR((x) + 0x01300000)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define BAST_VA_CTRL1 BAST_IOADDR(0x00000000) /* 0x01300000 */ -#define BAST_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define BAST_VA_CTRL2 BAST_IOADDR(0x00100000) /* 0x01400000 */ -#define BAST_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define BAST_VA_CTRL3 BAST_IOADDR(0x00200000) /* 0x01500000 */ -#define BAST_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define BAST_VA_CTRL4 BAST_IOADDR(0x00300000) /* 0x01600000 */ -#define BAST_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define BAST_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define BAST_VA_PC104_IRQREQ BAST_IOADDR(0x00400000) - -#define BAST_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define BAST_VA_PC104_IRQRAW BAST_IOADDR(0x00500000) - -#define BAST_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define BAST_VA_PC104_IRQMASK BAST_IOADDR(0x00600000) - -#define BAST_PA_LCD_RCMD1 (0x8800000) -#define BAST_VA_LCD_RCMD1 BAST_IOADDR(0x00700000) - -#define BAST_PA_LCD_WCMD1 (0x8000000) -#define BAST_VA_LCD_WCMD1 BAST_IOADDR(0x00800000) - -#define BAST_PA_LCD_RDATA1 (0x9800000) -#define BAST_VA_LCD_RDATA1 BAST_IOADDR(0x00900000) - -#define BAST_PA_LCD_WDATA1 (0x9000000) -#define BAST_VA_LCD_WDATA1 BAST_IOADDR(0x00A00000) - -#define BAST_PA_LCD_RCMD2 (0xA800000) -#define BAST_VA_LCD_RCMD2 BAST_IOADDR(0x00B00000) - -#define BAST_PA_LCD_WCMD2 (0xA000000) -#define BAST_VA_LCD_WCMD2 BAST_IOADDR(0x00C00000) - -#define BAST_PA_LCD_RDATA2 (0xB800000) -#define BAST_VA_LCD_RDATA2 BAST_IOADDR(0x00D00000) - -#define BAST_PA_LCD_WDATA2 (0xB000000) -#define BAST_VA_LCD_WDATA2 BAST_IOADDR(0x00E00000) - - -/* 0xE0000000 contains the IO space that is split by speed and - * wether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x00000000 to 0x01000000 16MB ISA IO space - * 0x01000000 to 0x02000000 16MB ISA memory space - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02400000 to 0x02500000 1MB ASIX ethernet controller - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controller - * 0x02600000 to 0x02700000 1MB PC SuperIO controller - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VA_ISAIO (BAST_VA_MULTISPACE + 0x00000000) -#define BAST_VA_ISAMEM (BAST_VA_MULTISPACE + 0x01000000) -#define BAST_VA_IDEPRI (BAST_VA_MULTISPACE + 0x02000000) -#define BAST_VA_IDEPRIAUX (BAST_VA_MULTISPACE + 0x02100000) -#define BAST_VA_IDESEC (BAST_VA_MULTISPACE + 0x02200000) -#define BAST_VA_IDESECAUX (BAST_VA_MULTISPACE + 0x02300000) -#define BAST_VA_ASIXNET (BAST_VA_MULTISPACE + 0x02400000) -#define BAST_VA_DM9000 (BAST_VA_MULTISPACE + 0x02500000) -#define BAST_VA_SUPERIO (BAST_VA_MULTISPACE + 0x02600000) - -#define BAST_VA_MULTISPACE (0xE0000000) - -#define BAST_VAM_CS2 (0x00000000) -#define BAST_VAM_CS3 (0x04000000) -#define BAST_VAM_CS4 (0x08000000) -#define BAST_VAM_CS5 (0x0C000000) - -/* physical offset addresses for the peripherals */ - -#define BAST_PA_ISAIO (0x00000000) -#define BAST_PA_ASIXNET (0x01000000) -#define BAST_PA_SUPERIO (0x01800000) -#define BAST_PA_IDEPRI (0x02000000) -#define BAST_PA_IDEPRIAUX (0x02800000) -#define BAST_PA_IDESEC (0x03000000) -#define BAST_PA_IDESECAUX (0x03800000) -#define BAST_PA_ISAMEM (0x04000000) -#define BAST_PA_DM9000 (0x05000000) - -/* some configurations for the peripherals */ - -#define BAST_PCSIO (BAST_VA_SUPERIO + BAST_VAM_CS2) -/* */ - -#define BAST_ASIXNET_CS BAST_VAM_CS5 -#define BAST_IDE_CS BAST_VAM_CS5 -#define BAST_DM9000_CS BAST_VAM_CS4 - -#endif /* __ASM_ARCH_BASTMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/bast-pmu.h b/include/asm-arm/arch-s3c2410/bast-pmu.h deleted file mode 100644 index 37a11fe5..0000000 --- a/include/asm-arm/arch-s3c2410/bast-pmu.h +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/bast-pmu.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks - * Vincent Sanders - * - * Machine BAST - Power Management chip - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_BASTPMU_H -#define __ASM_ARCH_BASTPMU_H "08_OCT_2004" - -#define BASTPMU_REG_IDENT (0x00) -#define BASTPMU_REG_VERSION (0x01) -#define BASTPMU_REG_DDCCTRL (0x02) -#define BASTPMU_REG_POWER (0x03) -#define BASTPMU_REG_RESET (0x04) -#define BASTPMU_REG_GWO (0x05) -#define BASTPMU_REG_WOL (0x06) -#define BASTPMU_REG_WOR (0x07) -#define BASTPMU_REG_UID (0x09) - -#define BASTPMU_EEPROM (0xC0) - -#define BASTPMU_EEP_UID (BASTPMU_EEPROM + 0) -#define BASTPMU_EEP_WOL (BASTPMU_EEPROM + 8) -#define BASTPMU_EEP_WOR (BASTPMU_EEPROM + 9) - -#define BASTPMU_IDENT_0 0x53 -#define BASTPMU_IDENT_1 0x42 -#define BASTPMU_IDENT_2 0x50 -#define BASTPMU_IDENT_3 0x4d - -#define BASTPMU_RESET_GUARD (0x55) - -#endif /* __ASM_ARCH_BASTPMU_H */ diff --git a/include/asm-arm/arch-s3c2410/debug-macro.S b/include/asm-arm/arch-s3c2410/debug-macro.S deleted file mode 100644 index 89076c3..0000000 --- a/include/asm-arm/arch-s3c2410/debug-macro.S +++ /dev/null @@ -1,102 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Copyright (C) 2005 Simtec Electronics - * - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include - -#define S3C2410_UART1_OFF (0x4000) -#define SHIFT_2440TXF (14-9) - - .macro addruart, rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 - ldreq \rx, = S3C24XX_PA_UART - ldrne \rx, = S3C24XX_VA_UART -#if CONFIG_DEBUG_S3C_UART != 0 - add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) -#endif - .endm - - .macro fifo_full_s3c24xx rd, rx - @ check for arm920 vs arm926. currently assume all arm926 - @ devices have an 64 byte FIFO identical to the s3c2440 - mrc p15, 0, \rd, c0, c0 - and \rd, \rd, #0xff0 - teq \rd, #0x260 - beq 1004f - mrc p15, 0, \rd, c1, c0 - tst \rd, #1 - addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) - addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) - bic \rd, \rd, #0xff000 - ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] - and \rd, \rd, #0x00ff0000 - teq \rd, #0x00440000 @ is it 2440? -1004: - ldr \rd, [ \rx, # S3C2410_UFSTAT ] - moveq \rd, \rd, lsr #SHIFT_2440TXF - tst \rd, #S3C2410_UFSTAT_TXFULL - .endm - - .macro fifo_full_s3c2410 rd, rx - ldr \rd, [ \rx, # S3C2410_UFSTAT ] - tst \rd, #S3C2410_UFSTAT_TXFULL - .endm - -/* fifo level reading */ - - .macro fifo_level_s3c24xx rd, rx - @ check for arm920 vs arm926. currently assume all arm926 - @ devices have an 64 byte FIFO identical to the s3c2440 - mrc p15, 0, \rd, c0, c0 - and \rd, \rd, #0xff0 - teq \rd, #0x260 - beq 10000f - mrc p15, 0, \rd, c1, c0 - tst \rd, #1 - addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) - addne \rd, \rx, #(S3C24XX_VA_GPIO - S3C24XX_VA_UART) - bic \rd, \rd, #0xff000 - ldr \rd, [ \rd, # S3C2410_GSTATUS1 - S3C2410_GPIOREG(0) ] - and \rd, \rd, #0x00ff0000 - teq \rd, #0x00440000 @ is it 2440? - -10000: - ldr \rd, [ \rx, # S3C2410_UFSTAT ] - andne \rd, \rd, #S3C2410_UFSTAT_TXMASK - andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK - .endm - - .macro fifo_level_s3c2410 rd, rx - ldr \rd, [ \rx, # S3C2410_UFSTAT ] - and \rd, \rd, #S3C2410_UFSTAT_TXMASK - .endm - -/* Select the correct implementation depending on the configuration. The - * S3C2440 will get selected by default, as these are the most widely - * used variants of these -*/ - -#if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) -#define fifo_full fifo_full_s3c2410 -#define fifo_level fifo_level_s3c2410 -#elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY) -#define fifo_full fifo_full_s3c24xx -#define fifo_level fifo_level_s3c24xx -#endif - -/* include the reset of the code which will do the work */ - -#include diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h deleted file mode 100644 index 86eaa0c..0000000 --- a/include/asm-arm/arch-s3c2410/dma.h +++ /dev/null @@ -1,453 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/dma.h - * - * Copyright (C) 2003,2004,2006 Simtec Electronics - * Ben Dooks - * - * Samsung S3C241XX DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H __FILE__ - -#include -#include - -/* - * This is the maximum DMA address(physical address) that can be DMAd to. - * - */ -#define MAX_DMA_ADDRESS 0x40000000 -#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ - -/* We use `virtual` dma channels to hide the fact we have only a limited - * number of DMA channels, and not of all of them (dependant on the device) - * can be attached to any DMA source. We therefore let the DMA core handle - * the allocation of hardware channels to clients. -*/ - -enum dma_ch { - DMACH_XD0, - DMACH_XD1, - DMACH_SDI, - DMACH_SPI0, - DMACH_SPI1, - DMACH_UART0, - DMACH_UART1, - DMACH_UART2, - DMACH_TIMER, - DMACH_I2S_IN, - DMACH_I2S_OUT, - DMACH_PCM_IN, - DMACH_PCM_OUT, - DMACH_MIC_IN, - DMACH_USB_EP1, - DMACH_USB_EP2, - DMACH_USB_EP3, - DMACH_USB_EP4, - DMACH_UART0_SRC2, /* s3c2412 second uart sources */ - DMACH_UART1_SRC2, - DMACH_UART2_SRC2, - DMACH_UART3, /* s3c2443 has extra uart */ - DMACH_UART3_SRC2, - DMACH_MAX, /* the end entry */ -}; - -#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ - -/* we have 4 dma channels */ -#ifndef CONFIG_CPU_S3C2443 -#define S3C2410_DMA_CHANNELS (4) -#else -#define S3C2410_DMA_CHANNELS (6) -#endif - -/* types */ - -enum s3c2410_dma_state { - S3C2410_DMA_IDLE, - S3C2410_DMA_RUNNING, - S3C2410_DMA_PAUSED -}; - - -/* enum s3c2410_dma_loadst - * - * This represents the state of the DMA engine, wrt to the loaded / running - * transfers. Since we don't have any way of knowing exactly the state of - * the DMA transfers, we need to know the state to make decisions on wether - * we can - * - * S3C2410_DMA_NONE - * - * There are no buffers loaded (the channel should be inactive) - * - * S3C2410_DMA_1LOADED - * - * There is one buffer loaded, however it has not been confirmed to be - * loaded by the DMA engine. This may be because the channel is not - * yet running, or the DMA driver decided that it was too costly to - * sit and wait for it to happen. - * - * S3C2410_DMA_1RUNNING - * - * The buffer has been confirmed running, and not finisged - * - * S3C2410_DMA_1LOADED_1RUNNING - * - * There is a buffer waiting to be loaded by the DMA engine, and one - * currently running. -*/ - -enum s3c2410_dma_loadst { - S3C2410_DMALOAD_NONE, - S3C2410_DMALOAD_1LOADED, - S3C2410_DMALOAD_1RUNNING, - S3C2410_DMALOAD_1LOADED_1RUNNING, -}; - -enum s3c2410_dma_buffresult { - S3C2410_RES_OK, - S3C2410_RES_ERR, - S3C2410_RES_ABORT -}; - -enum s3c2410_dmasrc { - S3C2410_DMASRC_HW, /* source is memory */ - S3C2410_DMASRC_MEM /* source is hardware */ -}; - -/* enum s3c2410_chan_op - * - * operation codes passed to the DMA code by the user, and also used - * to inform the current channel owner of any changes to the system state -*/ - -enum s3c2410_chan_op { - S3C2410_DMAOP_START, - S3C2410_DMAOP_STOP, - S3C2410_DMAOP_PAUSE, - S3C2410_DMAOP_RESUME, - S3C2410_DMAOP_FLUSH, - S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ - S3C2410_DMAOP_STARTED, /* indicate channel started */ -}; - -/* flags */ - -#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about - * waiting for reloads */ -#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ - -/* dma buffer */ - -struct s3c2410_dma_client { - char *name; -}; - -/* s3c2410_dma_buf_s - * - * internally used buffer structure to describe a queued or running - * buffer. -*/ - -struct s3c2410_dma_buf; -struct s3c2410_dma_buf { - struct s3c2410_dma_buf *next; - int magic; /* magic */ - int size; /* buffer size in bytes */ - dma_addr_t data; /* start of DMA data */ - dma_addr_t ptr; /* where the DMA got to [1] */ - void *id; /* client's id */ -}; - -/* [1] is this updated for both recv/send modes? */ - -struct s3c2410_dma_chan; - -/* s3c2410_dma_cbfn_t - * - * buffer callback routine type -*/ - -typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, - void *buf, int size, - enum s3c2410_dma_buffresult result); - -typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, - enum s3c2410_chan_op ); - -struct s3c2410_dma_stats { - unsigned long loads; - unsigned long timeout_longest; - unsigned long timeout_shortest; - unsigned long timeout_avg; - unsigned long timeout_failed; -}; - -struct s3c2410_dma_map; - -/* struct s3c2410_dma_chan - * - * full state information for each DMA channel -*/ - -struct s3c2410_dma_chan { - /* channel state flags and information */ - unsigned char number; /* number of this dma channel */ - unsigned char in_use; /* channel allocated */ - unsigned char irq_claimed; /* irq claimed for channel */ - unsigned char irq_enabled; /* irq enabled for channel */ - unsigned char xfer_unit; /* size of an transfer */ - - /* channel state */ - - enum s3c2410_dma_state state; - enum s3c2410_dma_loadst load_state; - struct s3c2410_dma_client *client; - - /* channel configuration */ - enum s3c2410_dmasrc source; - unsigned long dev_addr; - unsigned long load_timeout; - unsigned int flags; /* channel flags */ - unsigned int hw_cfg; /* last hw config */ - - struct s3c24xx_dma_map *map; /* channel hw maps */ - - /* channel's hardware position and configuration */ - void __iomem *regs; /* channels registers */ - void __iomem *addr_reg; /* data address register */ - unsigned int irq; /* channel irq */ - unsigned long dcon; /* default value of DCON */ - - /* driver handles */ - s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ - s3c2410_dma_opfn_t op_fn; /* channel op callback */ - - /* stats gathering */ - struct s3c2410_dma_stats *stats; - struct s3c2410_dma_stats stats_store; - - /* buffer list and information */ - struct s3c2410_dma_buf *curr; /* current dma buffer */ - struct s3c2410_dma_buf *next; /* next buffer to load */ - struct s3c2410_dma_buf *end; /* end of queue */ - - /* system device */ - struct sys_device dev; -}; - -/* the currently allocated channel information */ -extern struct s3c2410_dma_chan s3c2410_chans[]; - -/* note, we don't really use dma_device_t at the moment */ -typedef unsigned long dma_device_t; - -/* functions --------------------------------------------------------------- */ - -/* s3c2410_dma_request - * - * request a dma channel exclusivley -*/ - -extern int s3c2410_dma_request(dmach_t channel, - struct s3c2410_dma_client *, void *dev); - - -/* s3c2410_dma_ctrl - * - * change the state of the dma channel -*/ - -extern int s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op); - -/* s3c2410_dma_setflags - * - * set the channel's flags to a given state -*/ - -extern int s3c2410_dma_setflags(dmach_t channel, - unsigned int flags); - -/* s3c2410_dma_free - * - * free the dma channel (will also abort any outstanding operations) -*/ - -extern int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *); - -/* s3c2410_dma_enqueue - * - * place the given buffer onto the queue of operations for the channel. - * The buffer must be allocated from dma coherent memory, or the Dcache/WB - * drained before the buffer is given to the DMA system. -*/ - -extern int s3c2410_dma_enqueue(dmach_t channel, void *id, - dma_addr_t data, int size); - -/* s3c2410_dma_config - * - * configure the dma channel -*/ - -extern int s3c2410_dma_config(dmach_t channel, int xferunit, int dcon); - -/* s3c2410_dma_devconfig - * - * configure the device we're talking to -*/ - -extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, - int hwcfg, unsigned long devaddr); - -/* s3c2410_dma_getposition - * - * get the position that the dma transfer is currently at -*/ - -extern int s3c2410_dma_getposition(dmach_t channel, - dma_addr_t *src, dma_addr_t *dest); - -extern int s3c2410_dma_set_opfn(dmach_t, s3c2410_dma_opfn_t rtn); -extern int s3c2410_dma_set_buffdone_fn(dmach_t, s3c2410_dma_cbfn_t rtn); - -/* DMA Register definitions */ - -#define S3C2410_DMA_DISRC (0x00) -#define S3C2410_DMA_DISRCC (0x04) -#define S3C2410_DMA_DIDST (0x08) -#define S3C2410_DMA_DIDSTC (0x0C) -#define S3C2410_DMA_DCON (0x10) -#define S3C2410_DMA_DSTAT (0x14) -#define S3C2410_DMA_DCSRC (0x18) -#define S3C2410_DMA_DCDST (0x1C) -#define S3C2410_DMA_DMASKTRIG (0x20) -#define S3C2412_DMA_DMAREQSEL (0x24) -#define S3C2443_DMA_DMAREQSEL (0x24) - -#define S3C2410_DISRCC_INC (1<<0) -#define S3C2410_DISRCC_APB (1<<1) - -#define S3C2410_DMASKTRIG_STOP (1<<2) -#define S3C2410_DMASKTRIG_ON (1<<1) -#define S3C2410_DMASKTRIG_SWTRIG (1<<0) - -#define S3C2410_DCON_DEMAND (0<<31) -#define S3C2410_DCON_HANDSHAKE (1<<31) -#define S3C2410_DCON_SYNC_PCLK (0<<30) -#define S3C2410_DCON_SYNC_HCLK (1<<30) - -#define S3C2410_DCON_INTREQ (1<<29) - -#define S3C2410_DCON_CH0_XDREQ0 (0<<24) -#define S3C2410_DCON_CH0_UART0 (1<<24) -#define S3C2410_DCON_CH0_SDI (2<<24) -#define S3C2410_DCON_CH0_TIMER (3<<24) -#define S3C2410_DCON_CH0_USBEP1 (4<<24) - -#define S3C2410_DCON_CH1_XDREQ1 (0<<24) -#define S3C2410_DCON_CH1_UART1 (1<<24) -#define S3C2410_DCON_CH1_I2SSDI (2<<24) -#define S3C2410_DCON_CH1_SPI (3<<24) -#define S3C2410_DCON_CH1_USBEP2 (4<<24) - -#define S3C2410_DCON_CH2_I2SSDO (0<<24) -#define S3C2410_DCON_CH2_I2SSDI (1<<24) -#define S3C2410_DCON_CH2_SDI (2<<24) -#define S3C2410_DCON_CH2_TIMER (3<<24) -#define S3C2410_DCON_CH2_USBEP3 (4<<24) - -#define S3C2410_DCON_CH3_UART2 (0<<24) -#define S3C2410_DCON_CH3_SDI (1<<24) -#define S3C2410_DCON_CH3_SPI (2<<24) -#define S3C2410_DCON_CH3_TIMER (3<<24) -#define S3C2410_DCON_CH3_USBEP4 (4<<24) - -#define S3C2410_DCON_SRCSHIFT (24) -#define S3C2410_DCON_SRCMASK (7<<24) - -#define S3C2410_DCON_BYTE (0<<20) -#define S3C2410_DCON_HALFWORD (1<<20) -#define S3C2410_DCON_WORD (2<<20) - -#define S3C2410_DCON_AUTORELOAD (0<<22) -#define S3C2410_DCON_NORELOAD (1<<22) -#define S3C2410_DCON_HWTRIG (1<<23) - -#ifdef CONFIG_CPU_S3C2440 -#define S3C2440_DIDSTC_CHKINT (1<<2) - -#define S3C2440_DCON_CH0_I2SSDO (5<<24) -#define S3C2440_DCON_CH0_PCMIN (6<<24) - -#define S3C2440_DCON_CH1_PCMOUT (5<<24) -#define S3C2440_DCON_CH1_SDI (6<<24) - -#define S3C2440_DCON_CH2_PCMIN (5<<24) -#define S3C2440_DCON_CH2_MICIN (6<<24) - -#define S3C2440_DCON_CH3_MICIN (5<<24) -#define S3C2440_DCON_CH3_PCMOUT (6<<24) -#endif - -#ifdef CONFIG_CPU_S3C2412 - -#define S3C2412_DMAREQSEL_SRC(x) ((x)<<1) - -#define S3C2412_DMAREQSEL_HW (1) - -#define S3C2412_DMAREQSEL_SPI0TX S3C2412_DMAREQSEL_SRC(0) -#define S3C2412_DMAREQSEL_SPI0RX S3C2412_DMAREQSEL_SRC(1) -#define S3C2412_DMAREQSEL_SPI1TX S3C2412_DMAREQSEL_SRC(2) -#define S3C2412_DMAREQSEL_SPI1RX S3C2412_DMAREQSEL_SRC(3) -#define S3C2412_DMAREQSEL_I2STX S3C2412_DMAREQSEL_SRC(4) -#define S3C2412_DMAREQSEL_I2SRX S3C2412_DMAREQSEL_SRC(5) -#define S3C2412_DMAREQSEL_TIMER S3C2412_DMAREQSEL_SRC(9) -#define S3C2412_DMAREQSEL_SDI S3C2412_DMAREQSEL_SRC(10) -#define S3C2412_DMAREQSEL_USBEP1 S3C2412_DMAREQSEL_SRC(13) -#define S3C2412_DMAREQSEL_USBEP2 S3C2412_DMAREQSEL_SRC(14) -#define S3C2412_DMAREQSEL_USBEP3 S3C2412_DMAREQSEL_SRC(15) -#define S3C2412_DMAREQSEL_USBEP4 S3C2412_DMAREQSEL_SRC(16) -#define S3C2412_DMAREQSEL_XDREQ0 S3C2412_DMAREQSEL_SRC(17) -#define S3C2412_DMAREQSEL_XDREQ1 S3C2412_DMAREQSEL_SRC(18) -#define S3C2412_DMAREQSEL_UART0_0 S3C2412_DMAREQSEL_SRC(19) -#define S3C2412_DMAREQSEL_UART0_1 S3C2412_DMAREQSEL_SRC(20) -#define S3C2412_DMAREQSEL_UART1_0 S3C2412_DMAREQSEL_SRC(21) -#define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22) -#define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23) -#define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) - -#endif - -#define S3C2443_DMAREQSEL_SRC(x) ((x)<<1) - -#define S3C2443_DMAREQSEL_HW (1) - -#define S3C2443_DMAREQSEL_SPI0TX S3C2443_DMAREQSEL_SRC(0) -#define S3C2443_DMAREQSEL_SPI0RX S3C2443_DMAREQSEL_SRC(1) -#define S3C2443_DMAREQSEL_SPI1TX S3C2443_DMAREQSEL_SRC(2) -#define S3C2443_DMAREQSEL_SPI1RX S3C2443_DMAREQSEL_SRC(3) -#define S3C2443_DMAREQSEL_I2STX S3C2443_DMAREQSEL_SRC(4) -#define S3C2443_DMAREQSEL_I2SRX S3C2443_DMAREQSEL_SRC(5) -#define S3C2443_DMAREQSEL_TIMER S3C2443_DMAREQSEL_SRC(9) -#define S3C2443_DMAREQSEL_SDI S3C2443_DMAREQSEL_SRC(10) -#define S3C2443_DMAREQSEL_XDREQ0 S3C2443_DMAREQSEL_SRC(17) -#define S3C2443_DMAREQSEL_XDREQ1 S3C2443_DMAREQSEL_SRC(18) -#define S3C2443_DMAREQSEL_UART0_0 S3C2443_DMAREQSEL_SRC(19) -#define S3C2443_DMAREQSEL_UART0_1 S3C2443_DMAREQSEL_SRC(20) -#define S3C2443_DMAREQSEL_UART1_0 S3C2443_DMAREQSEL_SRC(21) -#define S3C2443_DMAREQSEL_UART1_1 S3C2443_DMAREQSEL_SRC(22) -#define S3C2443_DMAREQSEL_UART2_0 S3C2443_DMAREQSEL_SRC(23) -#define S3C2443_DMAREQSEL_UART2_1 S3C2443_DMAREQSEL_SRC(24) -#define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25) -#define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26) -#define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27) -#define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28) -#define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29) - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S deleted file mode 100644 index f70d051..0000000 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ /dev/null @@ -1,78 +0,0 @@ -/* - * include/asm-arm/arch-s3c2410/entry-macro.S - * - * Low-level IRQ helper macros for S3C2410-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. -*/ - -/* We have a problem that the INTOFFSET register does not always - * show one interrupt. Occasionally we get two interrupts through - * the prioritiser, and this causes the INTOFFSET register to show - * what looks like the logical-or of the two interrupt numbers. - * - * Thanks to Klaus, Shannon, et al for helping to debug this problem -*/ - -#define INTPND (0x10) -#define INTOFFSET (0x14) - -#include -#include - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - - mov \base, #S3C24XX_VA_IRQ - - @@ try the interrupt offset register, since it is there - - ldr \irqstat, [ \base, #INTPND ] - teq \irqstat, #0 - beq 1002f - ldr \irqnr, [ \base, #INTOFFSET ] - mov \tmp, #1 - tst \irqstat, \tmp, lsl \irqnr - bne 1001f - - @@ the number specified is not a valid irq, so try - @@ and work it out for ourselves - - mov \irqnr, #0 @@ start here - - @@ work out which irq (if any) we got - - movs \tmp, \irqstat, lsl#16 - addeq \irqnr, \irqnr, #16 - moveq \irqstat, \irqstat, lsr#16 - tst \irqstat, #0xff - addeq \irqnr, \irqnr, #8 - moveq \irqstat, \irqstat, lsr#8 - tst \irqstat, #0xf - addeq \irqnr, \irqnr, #4 - moveq \irqstat, \irqstat, lsr#4 - tst \irqstat, #0x3 - addeq \irqnr, \irqnr, #2 - moveq \irqstat, \irqstat, lsr#2 - tst \irqstat, #0x1 - addeq \irqnr, \irqnr, #1 - - @@ we have the value -1001: - adds \irqnr, \irqnr, #IRQ_EINT0 -1002: - @@ exit here, Z flag unset if IRQ - - .endm - - /* currently don't need an disable_fiq macro */ - - .macro disable_fiq - .endm diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h deleted file mode 100644 index 5d026260..0000000 --- a/include/asm-arm/arch-s3c2410/fb.h +++ /dev/null @@ -1,74 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/fb.h - * - * Copyright (c) 2004 Arnaud Patard - * - * Inspired by pxafb.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARM_FB_H -#define __ASM_ARM_FB_H - -#include - -struct s3c2410fb_hw { - unsigned long lcdcon1; - unsigned long lcdcon2; - unsigned long lcdcon3; - unsigned long lcdcon4; - unsigned long lcdcon5; -}; - -/* LCD description */ -struct s3c2410fb_display { - /* LCD type */ - unsigned type; - - /* Screen size */ - unsigned short width; - unsigned short height; - - /* Screen info */ - unsigned short xres; - unsigned short yres; - unsigned short bpp; - - unsigned pixclock; /* pixclock in picoseconds */ - unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ - - /* lcd configuration registers */ - unsigned long lcdcon5; -}; - -struct s3c2410fb_mach_info { - - struct s3c2410fb_display *displays; /* attached diplays info */ - unsigned num_displays; /* number of defined displays */ - unsigned default_display; - - /* GPIOs */ - - unsigned long gpcup; - unsigned long gpcup_mask; - unsigned long gpccon; - unsigned long gpccon_mask; - unsigned long gpdup; - unsigned long gpdup_mask; - unsigned long gpdcon; - unsigned long gpdcon_mask; - - /* lpc3600 control register */ - unsigned long lpcsel; -}; - -extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); - -#endif /* __ASM_ARM_FB_H */ diff --git a/include/asm-arm/arch-s3c2410/gpio.h b/include/asm-arm/arch-s3c2410/gpio.h deleted file mode 100644 index 18e10d2..0000000 --- a/include/asm-arm/arch-s3c2410/gpio.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/gpio.h - * - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C2410 - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep - -#include diff --git a/include/asm-arm/arch-s3c2410/h1940-latch.h b/include/asm-arm/arch-s3c2410/h1940-latch.h deleted file mode 100644 index c3de5ab..0000000 --- a/include/asm-arm/arch-s3c2410/h1940-latch.h +++ /dev/null @@ -1,64 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/h1940-latch.h - * - * Copyright (c) 2005 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * iPAQ H1940 series - latch definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_H1940_LATCH_H -#define __ASM_ARCH_H1940_LATCH_H - - -#ifndef __ASSEMBLY__ -#define H1940_LATCH ((void __force __iomem *)0xF8000000) -#else -#define H1940_LATCH 0xF8000000 -#endif - -#define H1940_PA_LATCH (S3C2410_CS2) - -/* SD layer latch */ - -#define H1940_LATCH_SDQ1 (1<<16) -#define H1940_LATCH_LCD_P1 (1<<17) -#define H1940_LATCH_LCD_P2 (1<<18) -#define H1940_LATCH_LCD_P3 (1<<19) -#define H1940_LATCH_MAX1698_nSHUTDOWN (1<<20) /* LCD backlight */ -#define H1940_LATCH_LED_RED (1<<21) -#define H1940_LATCH_SDQ7 (1<<22) -#define H1940_LATCH_USB_DP (1<<23) - -/* CPU layer latch */ - -#define H1940_LATCH_UDA_POWER (1<<24) -#define H1940_LATCH_AUDIO_POWER (1<<25) -#define H1940_LATCH_SM803_ENABLE (1<<26) -#define H1940_LATCH_LCD_P4 (1<<27) -#define H1940_LATCH_CPUQ5 (1<<28) /* untraced */ -#define H1940_LATCH_BLUETOOTH_POWER (1<<29) /* active high */ -#define H1940_LATCH_LED_GREEN (1<<30) -#define H1940_LATCH_LED_FLASH (1<<31) - -/* default settings */ - -#define H1940_LATCH_DEFAULT \ - H1940_LATCH_LCD_P4 | \ - H1940_LATCH_SM803_ENABLE | \ - H1940_LATCH_SDQ1 | \ - H1940_LATCH_LCD_P1 | \ - H1940_LATCH_LCD_P2 | \ - H1940_LATCH_LCD_P3 | \ - H1940_LATCH_MAX1698_nSHUTDOWN | \ - H1940_LATCH_CPUQ5 - -/* control functions */ - -extern void h1940_latch_control(unsigned int clear, unsigned int set); - -#endif /* __ASM_ARCH_H1940_LATCH_H */ diff --git a/include/asm-arm/arch-s3c2410/h1940.h b/include/asm-arm/arch-s3c2410/h1940.h deleted file mode 100644 index 6135592..0000000 --- a/include/asm-arm/arch-s3c2410/h1940.h +++ /dev/null @@ -1,21 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/h1940.h - * - * Copyright 2006 Ben Dooks - * - * H1940 definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_H1940_H -#define __ASM_ARCH_H1940_H - -#define H1940_SUSPEND_CHECKSUM (0x30003ff8) -#define H1940_SUSPEND_RESUMEAT (0x30081000) -#define H1940_SUSPEND_CHECK (0x30080000) - -extern void h1940_pm_return(void); - -#endif /* __ASM_ARCH_H1940_H */ diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h deleted file mode 100644 index 6dd10be..0000000 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ /dev/null @@ -1,137 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/hardware.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - hardware - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ - -/* external functions for GPIO support - * - * These allow various different clients to access the same GPIO - * registers without conflicting. If your driver only owns the entire - * GPIO register, then it is safe to ioremap/__raw_{read|write} to it. -*/ - -/* s3c2410_gpio_cfgpin - * - * set the configuration of the given pin to the value passed. - * - * eg: - * s3c2410_gpio_cfgpin(S3C2410_GPA0, S3C2410_GPA0_ADDR0); - * s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1); -*/ - -extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function); - -extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); - -/* s3c2410_gpio_getirq - * - * turn the given pin number into the corresponding IRQ number - * - * returns: - * < 0 = no interrupt for this pin - * >=0 = interrupt number for the pin -*/ - -extern int s3c2410_gpio_getirq(unsigned int pin); - -/* s3c2410_gpio_irq2pin - * - * turn the given irq number into the corresponding GPIO number - * - * returns: - * < 0 = no pin - * >=0 = gpio pin number -*/ - -extern int s3c2410_gpio_irq2pin(unsigned int irq); - -#ifdef CONFIG_CPU_S3C2400 - -extern int s3c2400_gpio_getirq(unsigned int pin); - -#endif /* CONFIG_CPU_S3C2400 */ - -/* s3c2410_gpio_irqfilter - * - * set the irq filtering on the given pin - * - * on = 0 => disable filtering - * 1 => enable filtering - * - * config = S3C2410_EINTFLT_PCLK or S3C2410_EINTFLT_EXTCLK orred with - * width of filter (0 through 63) - * - * -*/ - -extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, - unsigned int config); - -/* s3c2410_gpio_pullup - * - * configure the pull-up control on the given pin - * - * to = 1 => disable the pull-up - * 0 => enable the pull-up - * - * eg; - * - * s3c2410_gpio_pullup(S3C2410_GPB0, 0); - * s3c2410_gpio_pullup(S3C2410_GPE8, 0); -*/ - -extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); - -/* s3c2410_gpio_getpull - * - * Read the state of the pull-up on a given pin - * - * return: - * < 0 => error code - * 0 => enabled - * 1 => disabled -*/ - -extern int s3c2410_gpio_getpull(unsigned int pin); - -extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); - -extern unsigned int s3c2410_gpio_getpin(unsigned int pin); - -extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); - -#ifdef CONFIG_CPU_S3C2440 - -extern int s3c2440_set_dsc(unsigned int pin, unsigned int value); - -#endif /* CONFIG_CPU_S3C2440 */ - -#ifdef CONFIG_CPU_S3C2412 - -extern int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state); - -#endif /* CONFIG_CPU_S3C2412 */ - -#endif /* __ASSEMBLY__ */ - -#include -#include - -/* machine specific hardware definitions should go after this */ - -/* currently here until moved into config (todo) */ -#define CONFIG_NO_MULTIWORD_IO - -#endif /* __ASM_ARCH_HARDWARE_H */ diff --git a/include/asm-arm/arch-s3c2410/idle.h b/include/asm-arm/arch-s3c2410/idle.h deleted file mode 100644 index eed4506..0000000 --- a/include/asm-arm/arch-s3c2410/idle.h +++ /dev/null @@ -1,24 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/idle.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 CPU Idle controls -*/ - -#ifndef __ASM_ARCH_IDLE_H -#define __ASM_ARCH_IDLE_H __FILE__ - -/* This allows the over-ride of the default idle code, in case there - * is any other things to be done over idle (like DVS) -*/ - -extern void (*s3c24xx_idle)(void); - -extern void s3c24xx_default_idle(void); - -#endif /* __ASM_ARCH_IDLE_H */ diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h deleted file mode 100644 index 3756c99..0000000 --- a/include/asm-arm/arch-s3c2410/io.h +++ /dev/null @@ -1,218 +0,0 @@ -/* - * linux/include/asm-arm/arch-s3c2410/io.h - * from linux/include/asm-arm/arch-rpc/io.h - * - * Copyright (C) 1997 Russell King - * (C) 2003 Simtec Electronics -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are above A28 - * and are translated to the start of IO. Note that all addresses are - * not shifted left! - */ - -#define __PORT_PCIO(x) ((x) < (1<<28)) - -#define PCIO_BASE (S3C24XX_VA_ISA_WORD) -#define PCIO_BASE_b (S3C24XX_VA_ISA_BYTE) -#define PCIO_BASE_w (S3C24XX_VA_ISA_WORD) -#define PCIO_BASE_l (S3C24XX_VA_ISA_WORD) -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ - -#define DECLARE_DYN_OUT(sz,fnsuffix,instr) \ -static inline void __out##fnsuffix (unsigned int val, unsigned int port) \ -{ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "str" instr " %1, [%0, #0 ] @ out" #fnsuffix \ - : "=&r" (temp) \ - : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ -} - - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, #0 ] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline void __iomem *__ioaddr (unsigned long port) -{ - return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void __iomem *)port; -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) \ - DECLARE_DYN_OUT(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"h") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, #0] @ outbc" \ - : : "r" (value), "r" ((port))); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, #0] @ inbc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) { \ - if ((port) < 256 && (port) > -256) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else if ((port) > 0) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), \ - "r" (PCIO_BASE + ((port) & ~0xff)), \ - "Jr" (((port) & 0xff))); \ - else \ - __asm__ __volatile__( \ - "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), \ - "r" (PCIO_BASE + (port))); \ - } else \ - __asm__ __volatile__( \ - "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) { \ - if ((port) < 256 && (port) > -256 ) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE), \ - "Jr" ((port))); \ - else if ((port) > 0) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE + ((port) & ~0xff)), \ - "Jr" (((port) & 0xff))); \ - else \ - __asm__ __volatile__( \ - "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE + ((port)))); \ - } else \ - __asm__ __volatile__( \ - "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, #0] @ outlc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, #0] @ inlc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void __iomem *)(port))) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) -/* the following macro is deprecated */ -#define ioaddr(port) __ioaddr((port)) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) -#define insl(p,d,l) __raw_readsl(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) -#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) - -/* - * 1:1 mapping for ioremapped regions. - */ -#define __mem_pci(x) (x) - -#endif diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h deleted file mode 100644 index f5435d8..0000000 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ /dev/null @@ -1,166 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/irqs.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - -#ifndef __ASM_ARCH_IRQS_H -#define __ASM_ARCH_IRQS_H __FILE__ - -#ifndef __ASM_ARM_IRQ_H -#error "Do not include this directly, instead #include " -#endif - -/* we keep the first set of CPU IRQs out of the range of - * the ISA space, so that the PC104 has them to itself - * and we don't end up having to do horrible things to the - * standard ISA drivers.... - */ - -#define S3C2410_CPUIRQ_OFFSET (16) - -#define S3C2410_IRQ(x) ((x) + S3C2410_CPUIRQ_OFFSET) - -/* main cpu interrupts */ -#define IRQ_EINT0 S3C2410_IRQ(0) /* 16 */ -#define IRQ_EINT1 S3C2410_IRQ(1) -#define IRQ_EINT2 S3C2410_IRQ(2) -#define IRQ_EINT3 S3C2410_IRQ(3) -#define IRQ_EINT4t7 S3C2410_IRQ(4) /* 20 */ -#define IRQ_EINT8t23 S3C2410_IRQ(5) -#define IRQ_RESERVED6 S3C2410_IRQ(6) /* for s3c2410 */ -#define IRQ_CAM S3C2410_IRQ(6) /* for s3c2440,s3c2443 */ -#define IRQ_BATT_FLT S3C2410_IRQ(7) -#define IRQ_TICK S3C2410_IRQ(8) /* 24 */ -#define IRQ_WDT S3C2410_IRQ(9) /* WDT/AC97 for s3c2443 */ -#define IRQ_TIMER0 S3C2410_IRQ(10) -#define IRQ_TIMER1 S3C2410_IRQ(11) -#define IRQ_TIMER2 S3C2410_IRQ(12) -#define IRQ_TIMER3 S3C2410_IRQ(13) -#define IRQ_TIMER4 S3C2410_IRQ(14) -#define IRQ_UART2 S3C2410_IRQ(15) -#define IRQ_LCD S3C2410_IRQ(16) /* 32 */ -#define IRQ_DMA0 S3C2410_IRQ(17) /* IRQ_DMA for s3c2443 */ -#define IRQ_DMA1 S3C2410_IRQ(18) -#define IRQ_DMA2 S3C2410_IRQ(19) -#define IRQ_DMA3 S3C2410_IRQ(20) -#define IRQ_SDI S3C2410_IRQ(21) -#define IRQ_SPI0 S3C2410_IRQ(22) -#define IRQ_UART1 S3C2410_IRQ(23) -#define IRQ_RESERVED24 S3C2410_IRQ(24) /* 40 */ -#define IRQ_NFCON S3C2410_IRQ(24) /* for s3c2440 */ -#define IRQ_USBD S3C2410_IRQ(25) -#define IRQ_USBH S3C2410_IRQ(26) -#define IRQ_IIC S3C2410_IRQ(27) -#define IRQ_UART0 S3C2410_IRQ(28) /* 44 */ -#define IRQ_SPI1 S3C2410_IRQ(29) -#define IRQ_RTC S3C2410_IRQ(30) -#define IRQ_ADCPARENT S3C2410_IRQ(31) - -/* interrupts generated from the external interrupts sources */ -#define IRQ_EINT4 S3C2410_IRQ(32) /* 48 */ -#define IRQ_EINT5 S3C2410_IRQ(33) -#define IRQ_EINT6 S3C2410_IRQ(34) -#define IRQ_EINT7 S3C2410_IRQ(35) -#define IRQ_EINT8 S3C2410_IRQ(36) -#define IRQ_EINT9 S3C2410_IRQ(37) -#define IRQ_EINT10 S3C2410_IRQ(38) -#define IRQ_EINT11 S3C2410_IRQ(39) -#define IRQ_EINT12 S3C2410_IRQ(40) -#define IRQ_EINT13 S3C2410_IRQ(41) -#define IRQ_EINT14 S3C2410_IRQ(42) -#define IRQ_EINT15 S3C2410_IRQ(43) -#define IRQ_EINT16 S3C2410_IRQ(44) -#define IRQ_EINT17 S3C2410_IRQ(45) -#define IRQ_EINT18 S3C2410_IRQ(46) -#define IRQ_EINT19 S3C2410_IRQ(47) -#define IRQ_EINT20 S3C2410_IRQ(48) /* 64 */ -#define IRQ_EINT21 S3C2410_IRQ(49) -#define IRQ_EINT22 S3C2410_IRQ(50) -#define IRQ_EINT23 S3C2410_IRQ(51) - - -#define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) - -#define IRQ_LCD_FIFO S3C2410_IRQ(52) -#define IRQ_LCD_FRAME S3C2410_IRQ(53) - -/* IRQs for the interal UARTs, and ADC - * these need to be ordered in number of appearance in the - * SUBSRC mask register -*/ - -#define S3C2410_IRQSUB(x) S3C2410_IRQ((x)+54) - -#define IRQ_S3CUART_RX0 S3C2410_IRQSUB(0) /* 70 */ -#define IRQ_S3CUART_TX0 S3C2410_IRQSUB(1) -#define IRQ_S3CUART_ERR0 S3C2410_IRQSUB(2) - -#define IRQ_S3CUART_RX1 S3C2410_IRQSUB(3) /* 73 */ -#define IRQ_S3CUART_TX1 S3C2410_IRQSUB(4) -#define IRQ_S3CUART_ERR1 S3C2410_IRQSUB(5) - -#define IRQ_S3CUART_RX2 S3C2410_IRQSUB(6) /* 76 */ -#define IRQ_S3CUART_TX2 S3C2410_IRQSUB(7) -#define IRQ_S3CUART_ERR2 S3C2410_IRQSUB(8) - -#define IRQ_TC S3C2410_IRQSUB(9) -#define IRQ_ADC S3C2410_IRQSUB(10) - -/* extra irqs for s3c2412 */ - -#define IRQ_S3C2412_CFSDI S3C2410_IRQ(21) - -#define IRQ_S3C2412_SDI S3C2410_IRQSUB(13) -#define IRQ_S3C2412_CF S3C2410_IRQSUB(14) - -/* extra irqs for s3c2440 */ - -#define IRQ_S3C2440_CAM_C S3C2410_IRQSUB(11) /* S3C2443 too */ -#define IRQ_S3C2440_CAM_P S3C2410_IRQSUB(12) /* S3C2443 too */ -#define IRQ_S3C2440_WDT S3C2410_IRQSUB(13) -#define IRQ_S3C2440_AC97 S3C2410_IRQSUB(14) - -/* irqs for s3c2443 */ - -#define IRQ_S3C2443_DMA S3C2410_IRQ(17) /* IRQ_DMA1 */ -#define IRQ_S3C2443_UART3 S3C2410_IRQ(18) /* IRQ_DMA2 */ -#define IRQ_S3C2443_CFCON S3C2410_IRQ(19) /* IRQ_DMA3 */ -#define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */ -#define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */ - -#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) -#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15) -#define IRQ_S3C2443_LCD3 S3C2410_IRQSUB(16) -#define IRQ_S3C2443_LCD4 S3C2410_IRQSUB(17) - -#define IRQ_S3C2443_DMA0 S3C2410_IRQSUB(18) -#define IRQ_S3C2443_DMA1 S3C2410_IRQSUB(19) -#define IRQ_S3C2443_DMA2 S3C2410_IRQSUB(20) -#define IRQ_S3C2443_DMA3 S3C2410_IRQSUB(21) -#define IRQ_S3C2443_DMA4 S3C2410_IRQSUB(22) -#define IRQ_S3C2443_DMA5 S3C2410_IRQSUB(23) - -/* UART3 */ -#define IRQ_S3C2443_RX3 S3C2410_IRQSUB(24) -#define IRQ_S3C2443_TX3 S3C2410_IRQSUB(25) -#define IRQ_S3C2443_ERR3 S3C2410_IRQSUB(26) - -#define IRQ_S3C2443_WDT S3C2410_IRQSUB(27) -#define IRQ_S3C2443_AC97 S3C2410_IRQSUB(28) - -#ifdef CONFIG_CPU_S3C2443 -#define NR_IRQS (IRQ_S3C2443_AC97+1) -#else -#define NR_IRQS (IRQ_S3C2440_AC97+1) -#endif - -/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ -#define FIQ_START IRQ_EINT0 - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/leds-gpio.h b/include/asm-arm/arch-s3c2410/leds-gpio.h deleted file mode 100644 index 800846e..0000000 --- a/include/asm-arm/arch-s3c2410/leds-gpio.h +++ /dev/null @@ -1,28 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/leds-gpio.h - * - * Copyright (c) 2006 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C24XX - LEDs GPIO connector - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_LEDSGPIO_H -#define __ASM_ARCH_LEDSGPIO_H "leds-gpio.h" - -#define S3C24XX_LEDF_ACTLOW (1<<0) /* LED is on when GPIO low */ -#define S3C24XX_LEDF_TRISTATE (1<<1) /* tristate to turn off */ - -struct s3c24xx_led_platdata { - unsigned int gpio; - unsigned int flags; - - char *name; - char *def_trigger; -}; - -#endif /* __ASM_ARCH_LEDSGPIO_H */ diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h deleted file mode 100644 index b33ed3b..0000000 --- a/include/asm-arm/arch-s3c2410/map.h +++ /dev/null @@ -1,178 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/map.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H - -#include - -#define S3C2410_ADDR(x) S3C_ADDR(x) - -/* interrupt controller is the first thing we put in, to make - * the assembly code for the irq detection easier - */ -#define S3C24XX_VA_IRQ S3C_VA_IRQ -#define S3C2410_PA_IRQ (0x4A000000) -#define S3C24XX_SZ_IRQ SZ_1M - -/* memory controller registers */ -#define S3C24XX_VA_MEMCTRL S3C_VA_MEM -#define S3C2410_PA_MEMCTRL (0x48000000) -#define S3C24XX_SZ_MEMCTRL SZ_1M - -/* USB host controller */ -#define S3C2410_PA_USBHOST (0x49000000) -#define S3C24XX_SZ_USBHOST SZ_1M - -/* DMA controller */ -#define S3C2410_PA_DMA (0x4B000000) -#define S3C24XX_SZ_DMA SZ_1M - -/* Clock and Power management */ -#define S3C24XX_VA_CLKPWR S3C_VA_SYS -#define S3C2410_PA_CLKPWR (0x4C000000) -#define S3C24XX_SZ_CLKPWR SZ_1M - -/* LCD controller */ -#define S3C2410_PA_LCD (0x4D000000) -#define S3C24XX_SZ_LCD SZ_1M - -/* NAND flash controller */ -#define S3C2410_PA_NAND (0x4E000000) -#define S3C24XX_SZ_NAND SZ_1M - -/* UARTs */ -#define S3C24XX_VA_UART S3C_VA_UART -#define S3C2410_PA_UART (0x50000000) -#define S3C24XX_SZ_UART SZ_1M - -/* Timers */ -#define S3C24XX_VA_TIMER S3C_VA_TIMER -#define S3C2410_PA_TIMER (0x51000000) -#define S3C24XX_SZ_TIMER SZ_1M - -/* USB Device port */ -#define S3C2410_PA_USBDEV (0x52000000) -#define S3C24XX_SZ_USBDEV SZ_1M - -/* Watchdog */ -#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG -#define S3C2410_PA_WATCHDOG (0x53000000) -#define S3C24XX_SZ_WATCHDOG SZ_1M - -/* IIC hardware controller */ -#define S3C2410_PA_IIC (0x54000000) -#define S3C24XX_SZ_IIC SZ_1M - -/* IIS controller */ -#define S3C2410_PA_IIS (0x55000000) -#define S3C24XX_SZ_IIS SZ_1M - -/* GPIO ports */ - -/* the calculation for the VA of this must ensure that - * it is the same distance apart from the UART in the - * phsyical address space, as the initial mapping for the IO - * is done as a 1:1 maping. This puts it (currently) at - * 0xFA800000, which is not in the way of any current mapping - * by the base system. -*/ - -#define S3C2410_PA_GPIO (0x56000000) -#define S3C24XX_VA_GPIO ((S3C2410_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) -#define S3C24XX_SZ_GPIO SZ_1M - -/* RTC */ -#define S3C2410_PA_RTC (0x57000000) -#define S3C24XX_SZ_RTC SZ_1M - -/* ADC */ -#define S3C2410_PA_ADC (0x58000000) -#define S3C24XX_SZ_ADC SZ_1M - -/* SPI */ -#define S3C2410_PA_SPI (0x59000000) -#define S3C24XX_SZ_SPI SZ_1M - -/* SDI */ -#define S3C2410_PA_SDI (0x5A000000) -#define S3C24XX_SZ_SDI SZ_1M - -/* CAMIF */ -#define S3C2440_PA_CAMIF (0x4F000000) -#define S3C2440_SZ_CAMIF SZ_1M - -/* AC97 */ - -#define S3C2440_PA_AC97 (0x5B000000) -#define S3C2440_SZ_AC97 SZ_1M - -/* S3C2443 High-speed SD/MMC */ -#define S3C2443_PA_HSMMC (0x4A800000) -#define S3C2443_SZ_HSMMC (256) - -/* ISA style IO, for each machine to sort out mappings for, if it - * implements it. We reserve two 16M regions for ISA. - */ - -#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) -#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) - -/* physical addresses of all the chip-select areas */ - -#define S3C2410_CS0 (0x00000000) -#define S3C2410_CS1 (0x08000000) -#define S3C2410_CS2 (0x10000000) -#define S3C2410_CS3 (0x18000000) -#define S3C2410_CS4 (0x20000000) -#define S3C2410_CS5 (0x28000000) -#define S3C2410_CS6 (0x30000000) -#define S3C2410_CS7 (0x38000000) - -#define S3C2410_SDRAM_PA (S3C2410_CS6) - -/* Use a single interface for common resources between S3C24XX cpus */ - -#define S3C24XX_PA_IRQ S3C2410_PA_IRQ -#define S3C24XX_PA_MEMCTRL S3C2410_PA_MEMCTRL -#define S3C24XX_PA_USBHOST S3C2410_PA_USBHOST -#define S3C24XX_PA_DMA S3C2410_PA_DMA -#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR -#define S3C24XX_PA_LCD S3C2410_PA_LCD -#define S3C24XX_PA_UART S3C2410_PA_UART -#define S3C24XX_PA_TIMER S3C2410_PA_TIMER -#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV -#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG -#define S3C24XX_PA_IIC S3C2410_PA_IIC -#define S3C24XX_PA_IIS S3C2410_PA_IIS -#define S3C24XX_PA_GPIO S3C2410_PA_GPIO -#define S3C24XX_PA_RTC S3C2410_PA_RTC -#define S3C24XX_PA_ADC S3C2410_PA_ADC -#define S3C24XX_PA_SPI S3C2410_PA_SPI - -/* deal with the registers that move under the 2412/2413 */ - -#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) -#ifndef __ASSEMBLY__ -extern void __iomem *s3c24xx_va_gpio2; -#endif -#ifdef CONFIG_CPU_S3C2412_ONLY -#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) -#else -#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 -#endif -#else -#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO -#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO -#endif - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/include/asm-arm/arch-s3c2410/memory.h b/include/asm-arm/arch-s3c2410/memory.h deleted file mode 100644 index 533e243..0000000 --- a/include/asm-arm/arch-s3c2410/memory.h +++ /dev/null @@ -1,19 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/memory.h - * from linux/include/asm-arm/arch-rpc/memory.h - * - * Copyright (C) 1996,1997,1998 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#define PHYS_OFFSET UL(0x30000000) - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -#endif diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h deleted file mode 100644 index 229ab23..0000000 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ /dev/null @@ -1,30 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h - * - * Copyright 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * OSIRIS - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_OSIRISCPLD_H -#define __ASM_ARCH_OSIRISCPLD_H - -/* CTRL0 - NAND WP control */ - -#define OSIRIS_CTRL0_NANDSEL (0x3) -#define OSIRIS_CTRL0_BOOT_INT (1<<3) -#define OSIRIS_CTRL0_PCMCIA (1<<4) -#define OSIRIS_CTRL0_FIX8 (1<<5) -#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) - -#define OSIRIS_CTRL1_FIX8 (1<<0) - -#define OSIRIS_ID_REVMASK (0x7) - -#endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h deleted file mode 100644 index b5c74d2..0000000 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ /dev/null @@ -1,42 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/osiris-map.h - * - * (c) 2005 Simtec Electronics - * http://www.simtec.co.uk/products/ - * Ben Dooks - * - * OSIRIS - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -#ifndef __ASM_ARCH_OSIRISMAP_H -#define __ASM_ARCH_OSIRISMAP_H - -/* start peripherals off after the S3C2410 */ - -#define OSIRIS_IOADDR(x) (S3C2410_ADDR((x) + 0x04000000)) - -#define OSIRIS_PA_CPLD (S3C2410_CS1 | (1<<26)) - -/* we put the CPLD registers next, to get them out of the way */ - -#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) - -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) - -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) - -#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) -#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) - -#endif /* __ASM_ARCH_OSIRISMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/otom-map.h b/include/asm-arm/arch-s3c2410/otom-map.h deleted file mode 100644 index e40c934..0000000 --- a/include/asm-arm/arch-s3c2410/otom-map.h +++ /dev/null @@ -1,30 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/otom-map.h - * - * (c) 2005 Guillaume GOURAT / NexVision - * guillaume.gourat@nexvision.fr - * - * NexVision OTOM board memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x01300000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. - */ - -#ifndef __ASM_ARCH_OTOMMAP_H -#define __ASM_ARCH_OTOMMAP_H - -#define OTOM_PA_CS8900A_BASE (S3C2410_CS3 + 0x01000000) /* nGCS3 +0x01000000 */ -#define OTOM_VA_CS8900A_BASE S3C2410_ADDR(0x04000000) /* 0xF4000000 */ - -/* physical offset addresses for the peripherals */ - -#define OTOM_PA_FLASH0_BASE (S3C2410_CS0) /* Bank 0 */ - -#endif /* __ASM_ARCH_OTOMMAP_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h deleted file mode 100644 index 3766135..0000000 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ /dev/null @@ -1,197 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-clock.h - * - * Copyright (c) 2003,2004,2005,2006 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 clock register definitions -*/ - -#ifndef __ASM_ARM_REGS_CLOCK -#define __ASM_ARM_REGS_CLOCK "$Id: clock.h,v 1.4 2003/04/30 14:50:51 ben Exp $" - -#define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) - -#define S3C2410_LOCKTIME S3C2410_CLKREG(0x00) -#define S3C2410_MPLLCON S3C2410_CLKREG(0x04) -#define S3C2410_UPLLCON S3C2410_CLKREG(0x08) -#define S3C2410_CLKCON S3C2410_CLKREG(0x0C) -#define S3C2410_CLKSLOW S3C2410_CLKREG(0x10) -#define S3C2410_CLKDIVN S3C2410_CLKREG(0x14) - -#define S3C2410_CLKCON_IDLE (1<<2) -#define S3C2410_CLKCON_POWER (1<<3) -#define S3C2410_CLKCON_NAND (1<<4) -#define S3C2410_CLKCON_LCDC (1<<5) -#define S3C2410_CLKCON_USBH (1<<6) -#define S3C2410_CLKCON_USBD (1<<7) -#define S3C2410_CLKCON_PWMT (1<<8) -#define S3C2410_CLKCON_SDI (1<<9) -#define S3C2410_CLKCON_UART0 (1<<10) -#define S3C2410_CLKCON_UART1 (1<<11) -#define S3C2410_CLKCON_UART2 (1<<12) -#define S3C2410_CLKCON_GPIO (1<<13) -#define S3C2410_CLKCON_RTC (1<<14) -#define S3C2410_CLKCON_ADC (1<<15) -#define S3C2410_CLKCON_IIC (1<<16) -#define S3C2410_CLKCON_IIS (1<<17) -#define S3C2410_CLKCON_SPI (1<<18) - -#define S3C2410_PLLCON_MDIVSHIFT 12 -#define S3C2410_PLLCON_PDIVSHIFT 4 -#define S3C2410_PLLCON_SDIVSHIFT 0 -#define S3C2410_PLLCON_MDIVMASK ((1<<(1+(19-12)))-1) -#define S3C2410_PLLCON_PDIVMASK ((1<<5)-1) -#define S3C2410_PLLCON_SDIVMASK 3 - -/* DCLKCON register addresses in gpio.h */ - -#define S3C2410_DCLKCON_DCLK0EN (1<<0) -#define S3C2410_DCLKCON_DCLK0_PCLK (0<<1) -#define S3C2410_DCLKCON_DCLK0_UCLK (1<<1) -#define S3C2410_DCLKCON_DCLK0_DIV(x) (((x) - 1 )<<4) -#define S3C2410_DCLKCON_DCLK0_CMP(x) (((x) - 1 )<<8) -#define S3C2410_DCLKCON_DCLK0_DIV_MASK ((0xf)<<4) -#define S3C2410_DCLKCON_DCLK0_CMP_MASK ((0xf)<<8) - -#define S3C2410_DCLKCON_DCLK1EN (1<<16) -#define S3C2410_DCLKCON_DCLK1_PCLK (0<<17) -#define S3C2410_DCLKCON_DCLK1_UCLK (1<<17) -#define S3C2410_DCLKCON_DCLK1_DIV(x) (((x) - 1) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP(x) (((x) - 1) <<24) -#define S3C2410_DCLKCON_DCLK1_DIV_MASK ((0xf) <<20) -#define S3C2410_DCLKCON_DCLK1_CMP_MASK ((0xf) <<24) - -#define S3C2410_CLKDIVN_PDIVN (1<<0) -#define S3C2410_CLKDIVN_HDIVN (1<<1) - -#define S3C2410_CLKSLOW_UCLK_OFF (1<<7) -#define S3C2410_CLKSLOW_MPLL_OFF (1<<5) -#define S3C2410_CLKSLOW_SLOW (1<<4) -#define S3C2410_CLKSLOW_SLOWVAL(x) (x) -#define S3C2410_CLKSLOW_GET_SLOWVAL(x) ((x) & 7) - -#ifndef __ASSEMBLY__ - -#include - -static inline unsigned int -s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = pllval >> S3C2410_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2410_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2410_PLLCON_SDIVSHIFT; - - mdiv &= S3C2410_PLLCON_MDIVMASK; - pdiv &= S3C2410_PLLCON_PDIVMASK; - sdiv &= S3C2410_PLLCON_SDIVMASK; - - fvco = (uint64_t)baseclk * (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -#endif /* __ASSEMBLY__ */ - -#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) - -/* extra registers */ -#define S3C2440_CAMDIVN S3C2410_CLKREG(0x18) - -#define S3C2440_CLKCON_CAMERA (1<<19) -#define S3C2440_CLKCON_AC97 (1<<20) - -#define S3C2440_CLKDIVN_PDIVN (1<<0) -#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1) -#define S3C2440_CLKDIVN_HDIVN_1 (0<<1) -#define S3C2440_CLKDIVN_HDIVN_2 (1<<1) -#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1) -#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1) -#define S3C2440_CLKDIVN_UCLK (1<<3) - -#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0) -#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4) -#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8) -#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9) -#define S3C2440_CAMDIVN_DVSEN (1<<12) - -#define S3C2442_CAMDIVN_CAMCLK_DIV3 (1<<5) - -#endif /* CONFIG_CPU_S3C2440 or CONFIG_CPU_S3C2442 */ - -#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413) - -#define S3C2412_OSCSET S3C2410_CLKREG(0x18) -#define S3C2412_CLKSRC S3C2410_CLKREG(0x1C) - -#define S3C2412_PLLCON_OFF (1<<20) - -#define S3C2412_CLKDIVN_PDIVN (1<<2) -#define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) -#define S3C2412_CLKDIVN_ARMDIVN (1<<3) -#define S3C2412_CLKDIVN_DVSEN (1<<4) -#define S3C2412_CLKDIVN_HALFHCLK (1<<5) -#define S3C2412_CLKDIVN_USB48DIV (1<<6) -#define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) -#define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) -#define S3C2412_CLKDIVN_I2SDIV_MASK (15<<12) -#define S3C2412_CLKDIVN_I2SDIV_SHIFT (12) -#define S3C2412_CLKDIVN_CAMDIV_MASK (15<<16) -#define S3C2412_CLKDIVN_CAMDIV_SHIFT (16) - -#define S3C2412_CLKCON_WDT (1<<28) -#define S3C2412_CLKCON_SPI (1<<27) -#define S3C2412_CLKCON_IIS (1<<26) -#define S3C2412_CLKCON_IIC (1<<25) -#define S3C2412_CLKCON_ADC (1<<24) -#define S3C2412_CLKCON_RTC (1<<23) -#define S3C2412_CLKCON_GPIO (1<<22) -#define S3C2412_CLKCON_UART2 (1<<21) -#define S3C2412_CLKCON_UART1 (1<<20) -#define S3C2412_CLKCON_UART0 (1<<19) -#define S3C2412_CLKCON_SDI (1<<18) -#define S3C2412_CLKCON_PWMT (1<<17) -#define S3C2412_CLKCON_USBD (1<<16) -#define S3C2412_CLKCON_CAMCLK (1<<15) -#define S3C2412_CLKCON_UARTCLK (1<<14) -/* missing 13 */ -#define S3C2412_CLKCON_USB_HOST48 (1<<12) -#define S3C2412_CLKCON_USB_DEV48 (1<<11) -#define S3C2412_CLKCON_HCLKdiv2 (1<<10) -#define S3C2412_CLKCON_HCLKx2 (1<<9) -#define S3C2412_CLKCON_SDRAM (1<<8) -/* missing 7 */ -#define S3C2412_CLKCON_USBH S3C2410_CLKCON_USBH -#define S3C2412_CLKCON_LCDC S3C2410_CLKCON_LCDC -#define S3C2412_CLKCON_NAND S3C2410_CLKCON_NAND -#define S3C2412_CLKCON_DMA3 (1<<3) -#define S3C2412_CLKCON_DMA2 (1<<2) -#define S3C2412_CLKCON_DMA1 (1<<1) -#define S3C2412_CLKCON_DMA0 (1<<0) - -/* clock sourec controls */ - -#define S3C2412_CLKSRC_EXTCLKDIV_MASK (7 << 0) -#define S3C2412_CLKSRC_EXTCLKDIV_SHIFT (0) -#define S3C2412_CLKSRC_MDIVCLK_EXTCLKDIV (1<<3) -#define S3C2412_CLKSRC_MSYSCLK_MPLL (1<<4) -#define S3C2412_CLKSRC_USYSCLK_UPLL (1<<5) -#define S3C2412_CLKSRC_UARTCLK_MPLL (1<<8) -#define S3C2412_CLKSRC_I2SCLK_MPLL (1<<9) -#define S3C2412_CLKSRC_USBCLK_HCLK (1<<10) -#define S3C2412_CLKSRC_CAMCLK_HCLK (1<<11) -#define S3C2412_CLKSRC_UREFCLK_EXTCLK (1<<12) -#define S3C2412_CLKSRC_EREFCLK_EXTCLK (1<<14) - -#endif /* CONFIG_CPU_S3C2412 | CONFIG_CPU_S3C2413 */ - -#endif /* __ASM_ARM_REGS_CLOCK */ diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h deleted file mode 100644 index 1235df7..0000000 --- a/include/asm-arm/arch-s3c2410/regs-dsc.h +++ /dev/null @@ -1,184 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-dsc.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2440/S3C2412 Signal Drive Strength Control -*/ - - -#ifndef __ASM_ARCH_REGS_DSC_H -#define __ASM_ARCH_REGS_DSC_H "2440-dsc" - -#if defined(CONFIG_CPU_S3C2412) -#define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) -#define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) -#endif - -#if defined(CONFIG_CPU_S3C244X) - -#define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) -#define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) - -#define S3C2440_SELECT_DSC0 (0) -#define S3C2440_SELECT_DSC1 (1<<31) - -#define S3C2440_DSC_GETSHIFT(x) ((x) & 31) - -#define S3C2440_DSC0_DISABLE (1<<31) - -#define S3C2440_DSC0_ADDR (S3C2440_SELECT_DSC0 | 8) -#define S3C2440_DSC0_ADDR_12mA (0<<8) -#define S3C2440_DSC0_ADDR_10mA (1<<8) -#define S3C2440_DSC0_ADDR_8mA (2<<8) -#define S3C2440_DSC0_ADDR_6mA (3<<8) -#define S3C2440_DSC0_ADDR_MASK (3<<8) - -/* D24..D31 */ -#define S3C2440_DSC0_DATA3 (S3C2440_SELECT_DSC0 | 6) -#define S3C2440_DSC0_DATA3_12mA (0<<6) -#define S3C2440_DSC0_DATA3_10mA (1<<6) -#define S3C2440_DSC0_DATA3_8mA (2<<6) -#define S3C2440_DSC0_DATA3_6mA (3<<6) -#define S3C2440_DSC0_DATA3_MASK (3<<6) - -/* D16..D23 */ -#define S3C2440_DSC0_DATA2 (S3C2440_SELECT_DSC0 | 4) -#define S3C2440_DSC0_DATA2_12mA (0<<4) -#define S3C2440_DSC0_DATA2_10mA (1<<4) -#define S3C2440_DSC0_DATA2_8mA (2<<4) -#define S3C2440_DSC0_DATA2_6mA (3<<4) -#define S3C2440_DSC0_DATA2_MASK (3<<4) - -/* D8..D15 */ -#define S3C2440_DSC0_DATA1 (S3C2440_SELECT_DSC0 | 2) -#define S3C2440_DSC0_DATA1_12mA (0<<2) -#define S3C2440_DSC0_DATA1_10mA (1<<2) -#define S3C2440_DSC0_DATA1_8mA (2<<2) -#define S3C2440_DSC0_DATA1_6mA (3<<2) -#define S3C2440_DSC0_DATA1_MASK (3<<2) - -/* D0..D7 */ -#define S3C2440_DSC0_DATA0 (S3C2440_SELECT_DSC0 | 0) -#define S3C2440_DSC0_DATA0_12mA (0<<0) -#define S3C2440_DSC0_DATA0_10mA (1<<0) -#define S3C2440_DSC0_DATA0_8mA (2<<0) -#define S3C2440_DSC0_DATA0_6mA (3<<0) -#define S3C2440_DSC0_DATA0_MASK (3<<0) - -#define S3C2440_DSC1_SCK1 (S3C2440_SELECT_DSC1 | 28) -#define S3C2440_DSC1_SCK1_12mA (0<<28) -#define S3C2440_DSC1_SCK1_10mA (1<<28) -#define S3C2440_DSC1_SCK1_8mA (2<<28) -#define S3C2440_DSC1_SCK1_6mA (3<<28) -#define S3C2440_DSC1_SCK1_MASK (3<<28) - -#define S3C2440_DSC1_SCK0 (S3C2440_SELECT_DSC1 | 26) -#define S3C2440_DSC1_SCK0_12mA (0<<26) -#define S3C2440_DSC1_SCK0_10mA (1<<26) -#define S3C2440_DSC1_SCK0_8mA (2<<26) -#define S3C2440_DSC1_SCK0_6mA (3<<26) -#define S3C2440_DSC1_SCK0_MASK (3<<26) - -#define S3C2440_DSC1_SCKE (S3C2440_SELECT_DSC1 | 24) -#define S3C2440_DSC1_SCKE_10mA (0<<24) -#define S3C2440_DSC1_SCKE_8mA (1<<24) -#define S3C2440_DSC1_SCKE_6mA (2<<24) -#define S3C2440_DSC1_SCKE_4mA (3<<24) -#define S3C2440_DSC1_SCKE_MASK (3<<24) - -/* SDRAM nRAS/nCAS */ -#define S3C2440_DSC1_SDR (S3C2440_SELECT_DSC1 | 22) -#define S3C2440_DSC1_SDR_10mA (0<<22) -#define S3C2440_DSC1_SDR_8mA (1<<22) -#define S3C2440_DSC1_SDR_6mA (2<<22) -#define S3C2440_DSC1_SDR_4mA (3<<22) -#define S3C2440_DSC1_SDR_MASK (3<<22) - -/* NAND Flash Controller */ -#define S3C2440_DSC1_NFC (S3C2440_SELECT_DSC1 | 20) -#define S3C2440_DSC1_NFC_10mA (0<<20) -#define S3C2440_DSC1_NFC_8mA (1<<20) -#define S3C2440_DSC1_NFC_6mA (2<<20) -#define S3C2440_DSC1_NFC_4mA (3<<20) -#define S3C2440_DSC1_NFC_MASK (3<<20) - -/* nBE[0..3] */ -#define S3C2440_DSC1_nBE (S3C2440_SELECT_DSC1 | 18) -#define S3C2440_DSC1_nBE_10mA (0<<18) -#define S3C2440_DSC1_nBE_8mA (1<<18) -#define S3C2440_DSC1_nBE_6mA (2<<18) -#define S3C2440_DSC1_nBE_4mA (3<<18) -#define S3C2440_DSC1_nBE_MASK (3<<18) - -#define S3C2440_DSC1_WOE (S3C2440_SELECT_DSC1 | 16) -#define S3C2440_DSC1_WOE_10mA (0<<16) -#define S3C2440_DSC1_WOE_8mA (1<<16) -#define S3C2440_DSC1_WOE_6mA (2<<16) -#define S3C2440_DSC1_WOE_4mA (3<<16) -#define S3C2440_DSC1_WOE_MASK (3<<16) - -#define S3C2440_DSC1_CS7 (S3C2440_SELECT_DSC1 | 14) -#define S3C2440_DSC1_CS7_10mA (0<<14) -#define S3C2440_DSC1_CS7_8mA (1<<14) -#define S3C2440_DSC1_CS7_6mA (2<<14) -#define S3C2440_DSC1_CS7_4mA (3<<14) -#define S3C2440_DSC1_CS7_MASK (3<<14) - -#define S3C2440_DSC1_CS6 (S3C2440_SELECT_DSC1 | 12) -#define S3C2440_DSC1_CS6_10mA (0<<12) -#define S3C2440_DSC1_CS6_8mA (1<<12) -#define S3C2440_DSC1_CS6_6mA (2<<12) -#define S3C2440_DSC1_CS6_4mA (3<<12) -#define S3C2440_DSC1_CS6_MASK (3<<12) - -#define S3C2440_DSC1_CS5 (S3C2440_SELECT_DSC1 | 10) -#define S3C2440_DSC1_CS5_10mA (0<<10) -#define S3C2440_DSC1_CS5_8mA (1<<10) -#define S3C2440_DSC1_CS5_6mA (2<<10) -#define S3C2440_DSC1_CS5_4mA (3<<10) -#define S3C2440_DSC1_CS5_MASK (3<<10) - -#define S3C2440_DSC1_CS4 (S3C2440_SELECT_DSC1 | 8) -#define S3C2440_DSC1_CS4_10mA (0<<8) -#define S3C2440_DSC1_CS4_8mA (1<<8) -#define S3C2440_DSC1_CS4_6mA (2<<8) -#define S3C2440_DSC1_CS4_4mA (3<<8) -#define S3C2440_DSC1_CS4_MASK (3<<8) - -#define S3C2440_DSC1_CS3 (S3C2440_SELECT_DSC1 | 6) -#define S3C2440_DSC1_CS3_10mA (0<<6) -#define S3C2440_DSC1_CS3_8mA (1<<6) -#define S3C2440_DSC1_CS3_6mA (2<<6) -#define S3C2440_DSC1_CS3_4mA (3<<6) -#define S3C2440_DSC1_CS3_MASK (3<<6) - -#define S3C2440_DSC1_CS2 (S3C2440_SELECT_DSC1 | 4) -#define S3C2440_DSC1_CS2_10mA (0<<4) -#define S3C2440_DSC1_CS2_8mA (1<<4) -#define S3C2440_DSC1_CS2_6mA (2<<4) -#define S3C2440_DSC1_CS2_4mA (3<<4) -#define S3C2440_DSC1_CS2_MASK (3<<4) - -#define S3C2440_DSC1_CS1 (S3C2440_SELECT_DSC1 | 2) -#define S3C2440_DSC1_CS1_10mA (0<<2) -#define S3C2440_DSC1_CS1_8mA (1<<2) -#define S3C2440_DSC1_CS1_6mA (2<<2) -#define S3C2440_DSC1_CS1_4mA (3<<2) -#define S3C2440_DSC1_CS1_MASK (3<<2) - -#define S3C2440_DSC1_CS0 (S3C2440_SELECT_DSC1 | 0) -#define S3C2440_DSC1_CS0_10mA (0<<0) -#define S3C2440_DSC1_CS0_8mA (1<<0) -#define S3C2440_DSC1_CS0_6mA (2<<0) -#define S3C2440_DSC1_CS0_4mA (3<<0) -#define S3C2440_DSC1_CS0_MASK (3<<0) - -#endif /* CONFIG_CPU_S3C2440 */ - -#endif /* __ASM_ARCH_REGS_DSC_H */ - diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h deleted file mode 100644 index 497dd06..0000000 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ /dev/null @@ -1,1163 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-gpio.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 GPIO register definitions -*/ - - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H "$Id: gpio.h,v 1.5 2003/05/19 12:51:08 ben Exp $" - -#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) - -#define S3C2410_GPIO_BANKA (32*0) -#define S3C2410_GPIO_BANKB (32*1) -#define S3C2410_GPIO_BANKC (32*2) -#define S3C2410_GPIO_BANKD (32*3) -#define S3C2410_GPIO_BANKE (32*4) -#define S3C2410_GPIO_BANKF (32*5) -#define S3C2410_GPIO_BANKG (32*6) -#define S3C2410_GPIO_BANKH (32*7) - -#ifdef CONFIG_CPU_S3C2400 -#define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) -#define S3C24XX_MISCCR S3C2400_MISCCR -#else -#define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) -#define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) -#endif /* CONFIG_CPU_S3C2400 */ - - -/* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */ - -#define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32) -#define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2)) -#define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \ - (2 * (S3C2400_BANKNUM(pin)-2))) - -#define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \ - S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \ - S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO) - - -#define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO) -#define S3C2410_GPIO_OFFSET(pin) ((pin) & 31) - -/* general configuration options */ - -#define S3C2410_GPIO_LEAVE (0xFFFFFFFF) -#define S3C2410_GPIO_INPUT (0xFFFFFFF0) /* not available on A */ -#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1) -#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */ -#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* bank A => addr/cs/nand */ -#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */ - -/* register address for the GPIO registers. - * S3C24XX_GPIOREG2 is for the second set of registers in the - * GPIO which move between s3c2410 and s3c2412 type systems */ - -#define S3C2410_GPIOREG(x) ((x) + S3C24XX_VA_GPIO) -#define S3C24XX_GPIOREG2(x) ((x) + S3C24XX_VA_GPIO2) - - -/* configure GPIO ports A..G */ - -/* port A - S3C2410: 22bits, zero in bit X makes pin X output - * S3C2400: 18bits, zero in bit X makes pin X output - * 1 makes port special function, this is default -*/ -#define S3C2410_GPACON S3C2410_GPIOREG(0x00) -#define S3C2410_GPADAT S3C2410_GPIOREG(0x04) - -#define S3C2400_GPACON S3C2410_GPIOREG(0x00) -#define S3C2400_GPADAT S3C2410_GPIOREG(0x04) - -#define S3C2410_GPA0 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 0) -#define S3C2410_GPA0_OUT (0<<0) -#define S3C2410_GPA0_ADDR0 (1<<0) - -#define S3C2410_GPA1 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 1) -#define S3C2410_GPA1_OUT (0<<1) -#define S3C2410_GPA1_ADDR16 (1<<1) - -#define S3C2410_GPA2 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 2) -#define S3C2410_GPA2_OUT (0<<2) -#define S3C2410_GPA2_ADDR17 (1<<2) - -#define S3C2410_GPA3 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 3) -#define S3C2410_GPA3_OUT (0<<3) -#define S3C2410_GPA3_ADDR18 (1<<3) - -#define S3C2410_GPA4 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 4) -#define S3C2410_GPA4_OUT (0<<4) -#define S3C2410_GPA4_ADDR19 (1<<4) - -#define S3C2410_GPA5 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 5) -#define S3C2410_GPA5_OUT (0<<5) -#define S3C2410_GPA5_ADDR20 (1<<5) - -#define S3C2410_GPA6 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 6) -#define S3C2410_GPA6_OUT (0<<6) -#define S3C2410_GPA6_ADDR21 (1<<6) - -#define S3C2410_GPA7 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 7) -#define S3C2410_GPA7_OUT (0<<7) -#define S3C2410_GPA7_ADDR22 (1<<7) - -#define S3C2410_GPA8 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 8) -#define S3C2410_GPA8_OUT (0<<8) -#define S3C2410_GPA8_ADDR23 (1<<8) - -#define S3C2410_GPA9 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 9) -#define S3C2410_GPA9_OUT (0<<9) -#define S3C2410_GPA9_ADDR24 (1<<9) - -#define S3C2410_GPA10 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 10) -#define S3C2410_GPA10_OUT (0<<10) -#define S3C2410_GPA10_ADDR25 (1<<10) -#define S3C2400_GPA10_SCKE (1<<10) - -#define S3C2410_GPA11 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 11) -#define S3C2410_GPA11_OUT (0<<11) -#define S3C2410_GPA11_ADDR26 (1<<11) -#define S3C2400_GPA11_nCAS0 (1<<11) - -#define S3C2410_GPA12 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 12) -#define S3C2410_GPA12_OUT (0<<12) -#define S3C2410_GPA12_nGCS1 (1<<12) -#define S3C2400_GPA12_nCAS1 (1<<12) - -#define S3C2410_GPA13 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 13) -#define S3C2410_GPA13_OUT (0<<13) -#define S3C2410_GPA13_nGCS2 (1<<13) -#define S3C2400_GPA13_nGCS1 (1<<13) - -#define S3C2410_GPA14 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 14) -#define S3C2410_GPA14_OUT (0<<14) -#define S3C2410_GPA14_nGCS3 (1<<14) -#define S3C2400_GPA14_nGCS2 (1<<14) - -#define S3C2410_GPA15 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 15) -#define S3C2410_GPA15_OUT (0<<15) -#define S3C2410_GPA15_nGCS4 (1<<15) -#define S3C2400_GPA15_nGCS3 (1<<15) - -#define S3C2410_GPA16 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 16) -#define S3C2410_GPA16_OUT (0<<16) -#define S3C2410_GPA16_nGCS5 (1<<16) -#define S3C2400_GPA16_nGCS4 (1<<16) - -#define S3C2410_GPA17 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 17) -#define S3C2410_GPA17_OUT (0<<17) -#define S3C2410_GPA17_CLE (1<<17) -#define S3C2400_GPA17_nGCS5 (1<<17) - -#define S3C2410_GPA18 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 18) -#define S3C2410_GPA18_OUT (0<<18) -#define S3C2410_GPA18_ALE (1<<18) - -#define S3C2410_GPA19 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 19) -#define S3C2410_GPA19_OUT (0<<19) -#define S3C2410_GPA19_nFWE (1<<19) - -#define S3C2410_GPA20 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 20) -#define S3C2410_GPA20_OUT (0<<20) -#define S3C2410_GPA20_nFRE (1<<20) - -#define S3C2410_GPA21 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 21) -#define S3C2410_GPA21_OUT (0<<21) -#define S3C2410_GPA21_nRSTOUT (1<<21) - -#define S3C2410_GPA22 S3C2410_GPIONO(S3C2410_GPIO_BANKA, 22) -#define S3C2410_GPA22_OUT (0<<22) -#define S3C2410_GPA22_nFCE (1<<22) - -/* 0x08 and 0x0c are reserved on S3C2410 */ - -/* S3C2410: - * GPB is 10 IO pins, each configured by 2 bits each in GPBCON. - * 00 = input, 01 = output, 10=special function, 11=reserved - - * S3C2400: - * GPB is 16 IO pins, each configured by 2 bits each in GPBCON. - * 00 = input, 01 = output, 10=data, 11=special function - - * bit 0,1 = pin 0, 2,3= pin 1... - * - * CPBUP = pull up resistor control, 1=disabled, 0=enabled -*/ - -#define S3C2410_GPBCON S3C2410_GPIOREG(0x10) -#define S3C2410_GPBDAT S3C2410_GPIOREG(0x14) -#define S3C2410_GPBUP S3C2410_GPIOREG(0x18) - -#define S3C2400_GPBCON S3C2410_GPIOREG(0x08) -#define S3C2400_GPBDAT S3C2410_GPIOREG(0x0C) -#define S3C2400_GPBUP S3C2410_GPIOREG(0x10) - -/* no i/o pin in port b can have value 3 (unless it is a s3c2443) ! */ - -#define S3C2410_GPB0 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 0) -#define S3C2410_GPB0_INP (0x00 << 0) -#define S3C2410_GPB0_OUTP (0x01 << 0) -#define S3C2410_GPB0_TOUT0 (0x02 << 0) -#define S3C2400_GPB0_DATA16 (0x02 << 0) - -#define S3C2410_GPB1 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 1) -#define S3C2410_GPB1_INP (0x00 << 2) -#define S3C2410_GPB1_OUTP (0x01 << 2) -#define S3C2410_GPB1_TOUT1 (0x02 << 2) -#define S3C2400_GPB1_DATA17 (0x02 << 2) - -#define S3C2410_GPB2 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 2) -#define S3C2410_GPB2_INP (0x00 << 4) -#define S3C2410_GPB2_OUTP (0x01 << 4) -#define S3C2410_GPB2_TOUT2 (0x02 << 4) -#define S3C2400_GPB2_DATA18 (0x02 << 4) -#define S3C2400_GPB2_TCLK1 (0x03 << 4) - -#define S3C2410_GPB3 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 3) -#define S3C2410_GPB3_INP (0x00 << 6) -#define S3C2410_GPB3_OUTP (0x01 << 6) -#define S3C2410_GPB3_TOUT3 (0x02 << 6) -#define S3C2400_GPB3_DATA19 (0x02 << 6) -#define S3C2400_GPB3_TXD1 (0x03 << 6) - -#define S3C2410_GPB4 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 4) -#define S3C2410_GPB4_INP (0x00 << 8) -#define S3C2410_GPB4_OUTP (0x01 << 8) -#define S3C2410_GPB4_TCLK0 (0x02 << 8) -#define S3C2400_GPB4_DATA20 (0x02 << 8) -#define S3C2410_GPB4_MASK (0x03 << 8) -#define S3C2400_GPB4_RXD1 (0x03 << 8) -#define S3C2400_GPB4_MASK (0x03 << 8) - -#define S3C2410_GPB5 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 5) -#define S3C2410_GPB5_INP (0x00 << 10) -#define S3C2410_GPB5_OUTP (0x01 << 10) -#define S3C2410_GPB5_nXBACK (0x02 << 10) -#define S3C2443_GPB5_XBACK (0x03 << 10) -#define S3C2400_GPB5_DATA21 (0x02 << 10) -#define S3C2400_GPB5_nCTS1 (0x03 << 10) - -#define S3C2410_GPB6 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 6) -#define S3C2410_GPB6_INP (0x00 << 12) -#define S3C2410_GPB6_OUTP (0x01 << 12) -#define S3C2410_GPB6_nXBREQ (0x02 << 12) -#define S3C2443_GPB6_XBREQ (0x03 << 12) -#define S3C2400_GPB6_DATA22 (0x02 << 12) -#define S3C2400_GPB6_nRTS1 (0x03 << 12) - -#define S3C2410_GPB7 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 7) -#define S3C2410_GPB7_INP (0x00 << 14) -#define S3C2410_GPB7_OUTP (0x01 << 14) -#define S3C2410_GPB7_nXDACK1 (0x02 << 14) -#define S3C2443_GPB7_XDACK1 (0x03 << 14) -#define S3C2400_GPB7_DATA23 (0x02 << 14) - -#define S3C2410_GPB8 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 8) -#define S3C2410_GPB8_INP (0x00 << 16) -#define S3C2410_GPB8_OUTP (0x01 << 16) -#define S3C2410_GPB8_nXDREQ1 (0x02 << 16) -#define S3C2400_GPB8_DATA24 (0x02 << 16) - -#define S3C2410_GPB9 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 9) -#define S3C2410_GPB9_INP (0x00 << 18) -#define S3C2410_GPB9_OUTP (0x01 << 18) -#define S3C2410_GPB9_nXDACK0 (0x02 << 18) -#define S3C2443_GPB9_XDACK0 (0x03 << 18) -#define S3C2400_GPB9_DATA25 (0x02 << 18) -#define S3C2400_GPB9_I2SSDI (0x03 << 18) - -#define S3C2410_GPB10 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 10) -#define S3C2410_GPB10_INP (0x00 << 20) -#define S3C2410_GPB10_OUTP (0x01 << 20) -#define S3C2410_GPB10_nXDRE0 (0x02 << 20) -#define S3C2443_GPB10_XDREQ0 (0x03 << 20) -#define S3C2400_GPB10_DATA26 (0x02 << 20) -#define S3C2400_GPB10_nSS (0x03 << 20) - -#define S3C2400_GPB11 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 11) -#define S3C2400_GPB11_INP (0x00 << 22) -#define S3C2400_GPB11_OUTP (0x01 << 22) -#define S3C2400_GPB11_DATA27 (0x02 << 22) - -#define S3C2400_GPB12 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 12) -#define S3C2400_GPB12_INP (0x00 << 24) -#define S3C2400_GPB12_OUTP (0x01 << 24) -#define S3C2400_GPB12_DATA28 (0x02 << 24) - -#define S3C2400_GPB13 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 13) -#define S3C2400_GPB13_INP (0x00 << 26) -#define S3C2400_GPB13_OUTP (0x01 << 26) -#define S3C2400_GPB13_DATA29 (0x02 << 26) - -#define S3C2400_GPB14 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 14) -#define S3C2400_GPB14_INP (0x00 << 28) -#define S3C2400_GPB14_OUTP (0x01 << 28) -#define S3C2400_GPB14_DATA30 (0x02 << 28) - -#define S3C2400_GPB15 S3C2410_GPIONO(S3C2410_GPIO_BANKB, 15) -#define S3C2400_GPB15_INP (0x00 << 30) -#define S3C2400_GPB15_OUTP (0x01 << 30) -#define S3C2400_GPB15_DATA31 (0x02 << 30) - -#define S3C2410_GPB_PUPDIS(x) (1<<(x)) - -/* Port C consits of 16 GPIO/Special function - * - * almost identical setup to port b, but the special functions are mostly - * to do with the video system's sync/etc. -*/ - -#define S3C2410_GPCCON S3C2410_GPIOREG(0x20) -#define S3C2410_GPCDAT S3C2410_GPIOREG(0x24) -#define S3C2410_GPCUP S3C2410_GPIOREG(0x28) - -#define S3C2400_GPCCON S3C2410_GPIOREG(0x14) -#define S3C2400_GPCDAT S3C2410_GPIOREG(0x18) -#define S3C2400_GPCUP S3C2410_GPIOREG(0x1C) - -#define S3C2410_GPC0 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 0) -#define S3C2410_GPC0_INP (0x00 << 0) -#define S3C2410_GPC0_OUTP (0x01 << 0) -#define S3C2410_GPC0_LEND (0x02 << 0) -#define S3C2400_GPC0_VD0 (0x02 << 0) - -#define S3C2410_GPC1 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 1) -#define S3C2410_GPC1_INP (0x00 << 2) -#define S3C2410_GPC1_OUTP (0x01 << 2) -#define S3C2410_GPC1_VCLK (0x02 << 2) -#define S3C2400_GPC1_VD1 (0x02 << 2) - -#define S3C2410_GPC2 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 2) -#define S3C2410_GPC2_INP (0x00 << 4) -#define S3C2410_GPC2_OUTP (0x01 << 4) -#define S3C2410_GPC2_VLINE (0x02 << 4) -#define S3C2400_GPC2_VD2 (0x02 << 4) - -#define S3C2410_GPC3 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 3) -#define S3C2410_GPC3_INP (0x00 << 6) -#define S3C2410_GPC3_OUTP (0x01 << 6) -#define S3C2410_GPC3_VFRAME (0x02 << 6) -#define S3C2400_GPC3_VD3 (0x02 << 6) - -#define S3C2410_GPC4 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 4) -#define S3C2410_GPC4_INP (0x00 << 8) -#define S3C2410_GPC4_OUTP (0x01 << 8) -#define S3C2410_GPC4_VM (0x02 << 8) -#define S3C2400_GPC4_VD4 (0x02 << 8) - -#define S3C2410_GPC5 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 5) -#define S3C2410_GPC5_INP (0x00 << 10) -#define S3C2410_GPC5_OUTP (0x01 << 10) -#define S3C2410_GPC5_LCDVF0 (0x02 << 10) -#define S3C2400_GPC5_VD5 (0x02 << 10) - -#define S3C2410_GPC6 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 6) -#define S3C2410_GPC6_INP (0x00 << 12) -#define S3C2410_GPC6_OUTP (0x01 << 12) -#define S3C2410_GPC6_LCDVF1 (0x02 << 12) -#define S3C2400_GPC6_VD6 (0x02 << 12) - -#define S3C2410_GPC7 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 7) -#define S3C2410_GPC7_INP (0x00 << 14) -#define S3C2410_GPC7_OUTP (0x01 << 14) -#define S3C2410_GPC7_LCDVF2 (0x02 << 14) -#define S3C2400_GPC7_VD7 (0x02 << 14) - -#define S3C2410_GPC8 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 8) -#define S3C2410_GPC8_INP (0x00 << 16) -#define S3C2410_GPC8_OUTP (0x01 << 16) -#define S3C2410_GPC8_VD0 (0x02 << 16) -#define S3C2400_GPC8_VD8 (0x02 << 16) - -#define S3C2410_GPC9 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 9) -#define S3C2410_GPC9_INP (0x00 << 18) -#define S3C2410_GPC9_OUTP (0x01 << 18) -#define S3C2410_GPC9_VD1 (0x02 << 18) -#define S3C2400_GPC9_VD9 (0x02 << 18) - -#define S3C2410_GPC10 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 10) -#define S3C2410_GPC10_INP (0x00 << 20) -#define S3C2410_GPC10_OUTP (0x01 << 20) -#define S3C2410_GPC10_VD2 (0x02 << 20) -#define S3C2400_GPC10_VD10 (0x02 << 20) - -#define S3C2410_GPC11 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 11) -#define S3C2410_GPC11_INP (0x00 << 22) -#define S3C2410_GPC11_OUTP (0x01 << 22) -#define S3C2410_GPC11_VD3 (0x02 << 22) -#define S3C2400_GPC11_VD11 (0x02 << 22) - -#define S3C2410_GPC12 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 12) -#define S3C2410_GPC12_INP (0x00 << 24) -#define S3C2410_GPC12_OUTP (0x01 << 24) -#define S3C2410_GPC12_VD4 (0x02 << 24) -#define S3C2400_GPC12_VD12 (0x02 << 24) - -#define S3C2410_GPC13 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 13) -#define S3C2410_GPC13_INP (0x00 << 26) -#define S3C2410_GPC13_OUTP (0x01 << 26) -#define S3C2410_GPC13_VD5 (0x02 << 26) -#define S3C2400_GPC13_VD13 (0x02 << 26) - -#define S3C2410_GPC14 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 14) -#define S3C2410_GPC14_INP (0x00 << 28) -#define S3C2410_GPC14_OUTP (0x01 << 28) -#define S3C2410_GPC14_VD6 (0x02 << 28) -#define S3C2400_GPC14_VD14 (0x02 << 28) - -#define S3C2410_GPC15 S3C2410_GPIONO(S3C2410_GPIO_BANKC, 15) -#define S3C2410_GPC15_INP (0x00 << 30) -#define S3C2410_GPC15_OUTP (0x01 << 30) -#define S3C2410_GPC15_VD7 (0x02 << 30) -#define S3C2400_GPC15_VD15 (0x02 << 30) - -#define S3C2410_GPC_PUPDIS(x) (1<<(x)) - -/* - * S3C2410: Port D consists of 16 GPIO/Special function - * - * almost identical setup to port b, but the special functions are mostly - * to do with the video system's data. - * - * S3C2400: Port D consists of 11 GPIO/Special function - * - * almost identical setup to port c -*/ - -#define S3C2410_GPDCON S3C2410_GPIOREG(0x30) -#define S3C2410_GPDDAT S3C2410_GPIOREG(0x34) -#define S3C2410_GPDUP S3C2410_GPIOREG(0x38) - -#define S3C2400_GPDCON S3C2410_GPIOREG(0x20) -#define S3C2400_GPDDAT S3C2410_GPIOREG(0x24) -#define S3C2400_GPDUP S3C2410_GPIOREG(0x28) - -#define S3C2410_GPD0 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 0) -#define S3C2410_GPD0_INP (0x00 << 0) -#define S3C2410_GPD0_OUTP (0x01 << 0) -#define S3C2410_GPD0_VD8 (0x02 << 0) -#define S3C2400_GPD0_VFRAME (0x02 << 0) -#define S3C2442_GPD0_nSPICS1 (0x03 << 0) - -#define S3C2410_GPD1 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 1) -#define S3C2410_GPD1_INP (0x00 << 2) -#define S3C2410_GPD1_OUTP (0x01 << 2) -#define S3C2410_GPD1_VD9 (0x02 << 2) -#define S3C2400_GPD1_VM (0x02 << 2) -#define S3C2442_GPD1_SPICLK1 (0x03 << 2) - -#define S3C2410_GPD2 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 2) -#define S3C2410_GPD2_INP (0x00 << 4) -#define S3C2410_GPD2_OUTP (0x01 << 4) -#define S3C2410_GPD2_VD10 (0x02 << 4) -#define S3C2400_GPD2_VLINE (0x02 << 4) - -#define S3C2410_GPD3 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 3) -#define S3C2410_GPD3_INP (0x00 << 6) -#define S3C2410_GPD3_OUTP (0x01 << 6) -#define S3C2410_GPD3_VD11 (0x02 << 6) -#define S3C2400_GPD3_VCLK (0x02 << 6) - -#define S3C2410_GPD4 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 4) -#define S3C2410_GPD4_INP (0x00 << 8) -#define S3C2410_GPD4_OUTP (0x01 << 8) -#define S3C2410_GPD4_VD12 (0x02 << 8) -#define S3C2400_GPD4_LEND (0x02 << 8) - -#define S3C2410_GPD5 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 5) -#define S3C2410_GPD5_INP (0x00 << 10) -#define S3C2410_GPD5_OUTP (0x01 << 10) -#define S3C2410_GPD5_VD13 (0x02 << 10) -#define S3C2400_GPD5_TOUT0 (0x02 << 10) - -#define S3C2410_GPD6 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 6) -#define S3C2410_GPD6_INP (0x00 << 12) -#define S3C2410_GPD6_OUTP (0x01 << 12) -#define S3C2410_GPD6_VD14 (0x02 << 12) -#define S3C2400_GPD6_TOUT1 (0x02 << 12) - -#define S3C2410_GPD7 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 7) -#define S3C2410_GPD7_INP (0x00 << 14) -#define S3C2410_GPD7_OUTP (0x01 << 14) -#define S3C2410_GPD7_VD15 (0x02 << 14) -#define S3C2400_GPD7_TOUT2 (0x02 << 14) - -#define S3C2410_GPD8 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 8) -#define S3C2410_GPD8_INP (0x00 << 16) -#define S3C2410_GPD8_OUTP (0x01 << 16) -#define S3C2410_GPD8_VD16 (0x02 << 16) -#define S3C2400_GPD8_TOUT3 (0x02 << 16) - -#define S3C2410_GPD9 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 9) -#define S3C2410_GPD9_INP (0x00 << 18) -#define S3C2410_GPD9_OUTP (0x01 << 18) -#define S3C2410_GPD9_VD17 (0x02 << 18) -#define S3C2400_GPD9_TCLK0 (0x02 << 18) -#define S3C2410_GPD9_MASK (0x03 << 18) - -#define S3C2410_GPD10 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 10) -#define S3C2410_GPD10_INP (0x00 << 20) -#define S3C2410_GPD10_OUTP (0x01 << 20) -#define S3C2410_GPD10_VD18 (0x02 << 20) -#define S3C2400_GPD10_nWAIT (0x02 << 20) - -#define S3C2410_GPD11 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 11) -#define S3C2410_GPD11_INP (0x00 << 22) -#define S3C2410_GPD11_OUTP (0x01 << 22) -#define S3C2410_GPD11_VD19 (0x02 << 22) - -#define S3C2410_GPD12 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 12) -#define S3C2410_GPD12_INP (0x00 << 24) -#define S3C2410_GPD12_OUTP (0x01 << 24) -#define S3C2410_GPD12_VD20 (0x02 << 24) - -#define S3C2410_GPD13 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 13) -#define S3C2410_GPD13_INP (0x00 << 26) -#define S3C2410_GPD13_OUTP (0x01 << 26) -#define S3C2410_GPD13_VD21 (0x02 << 26) - -#define S3C2410_GPD14 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 14) -#define S3C2410_GPD14_INP (0x00 << 28) -#define S3C2410_GPD14_OUTP (0x01 << 28) -#define S3C2410_GPD14_VD22 (0x02 << 28) -#define S3C2410_GPD14_nSS1 (0x03 << 28) - -#define S3C2410_GPD15 S3C2410_GPIONO(S3C2410_GPIO_BANKD, 15) -#define S3C2410_GPD15_INP (0x00 << 30) -#define S3C2410_GPD15_OUTP (0x01 << 30) -#define S3C2410_GPD15_VD23 (0x02 << 30) -#define S3C2410_GPD15_nSS0 (0x03 << 30) - -#define S3C2410_GPD_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port E consists of 16 GPIO/Special function - * - * again, the same as port B, but dealing with I2S, SDI, and - * more miscellaneous functions - * - * S3C2400: - * Port E consists of 12 GPIO/Special function - * - * GPIO / interrupt inputs -*/ - -#define S3C2410_GPECON S3C2410_GPIOREG(0x40) -#define S3C2410_GPEDAT S3C2410_GPIOREG(0x44) -#define S3C2410_GPEUP S3C2410_GPIOREG(0x48) - -#define S3C2400_GPECON S3C2410_GPIOREG(0x2C) -#define S3C2400_GPEDAT S3C2410_GPIOREG(0x30) -#define S3C2400_GPEUP S3C2410_GPIOREG(0x34) - -#define S3C2410_GPE0 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 0) -#define S3C2410_GPE0_INP (0x00 << 0) -#define S3C2410_GPE0_OUTP (0x01 << 0) -#define S3C2410_GPE0_I2SLRCK (0x02 << 0) -#define S3C2443_GPE0_AC_nRESET (0x03 << 0) -#define S3C2400_GPE0_EINT0 (0x02 << 0) -#define S3C2410_GPE0_MASK (0x03 << 0) - -#define S3C2410_GPE1 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 1) -#define S3C2410_GPE1_INP (0x00 << 2) -#define S3C2410_GPE1_OUTP (0x01 << 2) -#define S3C2410_GPE1_I2SSCLK (0x02 << 2) -#define S3C2443_GPE1_AC_SYNC (0x03 << 2) -#define S3C2400_GPE1_EINT1 (0x02 << 2) -#define S3C2400_GPE1_nSS (0x03 << 2) -#define S3C2410_GPE1_MASK (0x03 << 2) - -#define S3C2410_GPE2 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 2) -#define S3C2410_GPE2_INP (0x00 << 4) -#define S3C2410_GPE2_OUTP (0x01 << 4) -#define S3C2410_GPE2_CDCLK (0x02 << 4) -#define S3C2443_GPE2_AC_BITCLK (0x03 << 4) -#define S3C2400_GPE2_EINT2 (0x02 << 4) -#define S3C2400_GPE2_I2SSDI (0x03 << 4) - -#define S3C2410_GPE3 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 3) -#define S3C2410_GPE3_INP (0x00 << 6) -#define S3C2410_GPE3_OUTP (0x01 << 6) -#define S3C2410_GPE3_I2SSDI (0x02 << 6) -#define S3C2443_GPE3_AC_SDI (0x03 << 6) -#define S3C2400_GPE3_EINT3 (0x02 << 6) -#define S3C2400_GPE3_nCTS1 (0x03 << 6) -#define S3C2410_GPE3_nSS0 (0x03 << 6) -#define S3C2410_GPE3_MASK (0x03 << 6) - -#define S3C2410_GPE4 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 4) -#define S3C2410_GPE4_INP (0x00 << 8) -#define S3C2410_GPE4_OUTP (0x01 << 8) -#define S3C2410_GPE4_I2SSDO (0x02 << 8) -#define S3C2443_GPE4_AC_SDO (0x03 << 8) -#define S3C2400_GPE4_EINT4 (0x02 << 8) -#define S3C2400_GPE4_nRTS1 (0x03 << 8) -#define S3C2410_GPE4_I2SSDI (0x03 << 8) -#define S3C2410_GPE4_MASK (0x03 << 8) - -#define S3C2410_GPE5 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 5) -#define S3C2410_GPE5_INP (0x00 << 10) -#define S3C2410_GPE5_OUTP (0x01 << 10) -#define S3C2410_GPE5_SDCLK (0x02 << 10) -#define S3C2443_GPE5_SD1_CLK (0x02 << 10) -#define S3C2400_GPE5_EINT5 (0x02 << 10) -#define S3C2400_GPE5_TCLK1 (0x03 << 10) - -#define S3C2410_GPE6 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 6) -#define S3C2410_GPE6_INP (0x00 << 12) -#define S3C2410_GPE6_OUTP (0x01 << 12) -#define S3C2410_GPE6_SDCMD (0x02 << 12) -#define S3C2443_GPE6_SD1_CMD (0x02 << 12) -#define S3C2443_GPE6_AC_BITCLK (0x03 << 12) -#define S3C2400_GPE6_EINT6 (0x02 << 12) - -#define S3C2410_GPE7 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 7) -#define S3C2410_GPE7_INP (0x00 << 14) -#define S3C2410_GPE7_OUTP (0x01 << 14) -#define S3C2410_GPE7_SDDAT0 (0x02 << 14) -#define S3C2443_GPE5_SD1_DAT0 (0x02 << 14) -#define S3C2443_GPE7_AC_SDI (0x03 << 14) -#define S3C2400_GPE7_EINT7 (0x02 << 14) - -#define S3C2410_GPE8 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 8) -#define S3C2410_GPE8_INP (0x00 << 16) -#define S3C2410_GPE8_OUTP (0x01 << 16) -#define S3C2410_GPE8_SDDAT1 (0x02 << 16) -#define S3C2443_GPE8_SD1_DAT1 (0x02 << 16) -#define S3C2443_GPE8_AC_SDO (0x03 << 16) -#define S3C2400_GPE8_nXDACK0 (0x02 << 16) - -#define S3C2410_GPE9 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 9) -#define S3C2410_GPE9_INP (0x00 << 18) -#define S3C2410_GPE9_OUTP (0x01 << 18) -#define S3C2410_GPE9_SDDAT2 (0x02 << 18) -#define S3C2443_GPE9_SD1_DAT2 (0x02 << 18) -#define S3C2443_GPE9_AC_SYNC (0x03 << 18) -#define S3C2400_GPE9_nXDACK1 (0x02 << 18) -#define S3C2400_GPE9_nXBACK (0x03 << 18) - -#define S3C2410_GPE10 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 10) -#define S3C2410_GPE10_INP (0x00 << 20) -#define S3C2410_GPE10_OUTP (0x01 << 20) -#define S3C2410_GPE10_SDDAT3 (0x02 << 20) -#define S3C2443_GPE10_SD1_DAT3 (0x02 << 20) -#define S3C2443_GPE10_AC_nRESET (0x03 << 20) -#define S3C2400_GPE10_nXDREQ0 (0x02 << 20) - -#define S3C2410_GPE11 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 11) -#define S3C2410_GPE11_INP (0x00 << 22) -#define S3C2410_GPE11_OUTP (0x01 << 22) -#define S3C2410_GPE11_SPIMISO0 (0x02 << 22) -#define S3C2400_GPE11_nXDREQ1 (0x02 << 22) -#define S3C2400_GPE11_nXBREQ (0x03 << 22) - -#define S3C2410_GPE12 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 12) -#define S3C2410_GPE12_INP (0x00 << 24) -#define S3C2410_GPE12_OUTP (0x01 << 24) -#define S3C2410_GPE12_SPIMOSI0 (0x02 << 24) - -#define S3C2410_GPE13 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 13) -#define S3C2410_GPE13_INP (0x00 << 26) -#define S3C2410_GPE13_OUTP (0x01 << 26) -#define S3C2410_GPE13_SPICLK0 (0x02 << 26) - -#define S3C2410_GPE14 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 14) -#define S3C2410_GPE14_INP (0x00 << 28) -#define S3C2410_GPE14_OUTP (0x01 << 28) -#define S3C2410_GPE14_IICSCL (0x02 << 28) -#define S3C2410_GPE14_MASK (0x03 << 28) - -#define S3C2410_GPE15 S3C2410_GPIONO(S3C2410_GPIO_BANKE, 15) -#define S3C2410_GPE15_INP (0x00 << 30) -#define S3C2410_GPE15_OUTP (0x01 << 30) -#define S3C2410_GPE15_IICSDA (0x02 << 30) -#define S3C2410_GPE15_MASK (0x03 << 30) - -#define S3C2440_GPE0_ACSYNC (0x03 << 0) -#define S3C2440_GPE1_ACBITCLK (0x03 << 2) -#define S3C2440_GPE2_ACRESET (0x03 << 4) -#define S3C2440_GPE3_ACIN (0x03 << 6) -#define S3C2440_GPE4_ACOUT (0x03 << 8) - -#define S3C2410_GPE_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port F consists of 8 GPIO/Special function - * - * GPIO / interrupt inputs - * - * GPFCON has 2 bits for each of the input pins on port F - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 undefined - * - * pull up works like all other ports. - * - * S3C2400: - * Port F consists of 7 GPIO/Special function - * - * GPIO/serial/misc pins -*/ - -#define S3C2410_GPFCON S3C2410_GPIOREG(0x50) -#define S3C2410_GPFDAT S3C2410_GPIOREG(0x54) -#define S3C2410_GPFUP S3C2410_GPIOREG(0x58) - -#define S3C2400_GPFCON S3C2410_GPIOREG(0x38) -#define S3C2400_GPFDAT S3C2410_GPIOREG(0x3C) -#define S3C2400_GPFUP S3C2410_GPIOREG(0x40) - -#define S3C2410_GPF0 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 0) -#define S3C2410_GPF0_INP (0x00 << 0) -#define S3C2410_GPF0_OUTP (0x01 << 0) -#define S3C2410_GPF0_EINT0 (0x02 << 0) -#define S3C2400_GPF0_RXD0 (0x02 << 0) - -#define S3C2410_GPF1 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 1) -#define S3C2410_GPF1_INP (0x00 << 2) -#define S3C2410_GPF1_OUTP (0x01 << 2) -#define S3C2410_GPF1_EINT1 (0x02 << 2) -#define S3C2400_GPF1_RXD1 (0x02 << 2) -#define S3C2400_GPF1_IICSDA (0x03 << 2) - -#define S3C2410_GPF2 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 2) -#define S3C2410_GPF2_INP (0x00 << 4) -#define S3C2410_GPF2_OUTP (0x01 << 4) -#define S3C2410_GPF2_EINT2 (0x02 << 4) -#define S3C2400_GPF2_TXD0 (0x02 << 4) - -#define S3C2410_GPF3 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 3) -#define S3C2410_GPF3_INP (0x00 << 6) -#define S3C2410_GPF3_OUTP (0x01 << 6) -#define S3C2410_GPF3_EINT3 (0x02 << 6) -#define S3C2400_GPF3_TXD1 (0x02 << 6) -#define S3C2400_GPF3_IICSCL (0x03 << 6) - -#define S3C2410_GPF4 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 4) -#define S3C2410_GPF4_INP (0x00 << 8) -#define S3C2410_GPF4_OUTP (0x01 << 8) -#define S3C2410_GPF4_EINT4 (0x02 << 8) -#define S3C2400_GPF4_nRTS0 (0x02 << 8) -#define S3C2400_GPF4_nXBACK (0x03 << 8) - -#define S3C2410_GPF5 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 5) -#define S3C2410_GPF5_INP (0x00 << 10) -#define S3C2410_GPF5_OUTP (0x01 << 10) -#define S3C2410_GPF5_EINT5 (0x02 << 10) -#define S3C2400_GPF5_nCTS0 (0x02 << 10) -#define S3C2400_GPF5_nXBREQ (0x03 << 10) - -#define S3C2410_GPF6 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 6) -#define S3C2410_GPF6_INP (0x00 << 12) -#define S3C2410_GPF6_OUTP (0x01 << 12) -#define S3C2410_GPF6_EINT6 (0x02 << 12) -#define S3C2400_GPF6_CLKOUT (0x02 << 12) - -#define S3C2410_GPF7 S3C2410_GPIONO(S3C2410_GPIO_BANKF, 7) -#define S3C2410_GPF7_INP (0x00 << 14) -#define S3C2410_GPF7_OUTP (0x01 << 14) -#define S3C2410_GPF7_EINT7 (0x02 << 14) - -#define S3C2410_GPF_PUPDIS(x) (1<<(x)) - -/* S3C2410: - * Port G consists of 8 GPIO/IRQ/Special function - * - * GPGCON has 2 bits for each of the input pins on port F - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func - * - * pull up works like all other ports. - * - * S3C2400: - * Port G consists of 10 GPIO/Special function -*/ - -#define S3C2410_GPGCON S3C2410_GPIOREG(0x60) -#define S3C2410_GPGDAT S3C2410_GPIOREG(0x64) -#define S3C2410_GPGUP S3C2410_GPIOREG(0x68) - -#define S3C2400_GPGCON S3C2410_GPIOREG(0x44) -#define S3C2400_GPGDAT S3C2410_GPIOREG(0x48) -#define S3C2400_GPGUP S3C2410_GPIOREG(0x4C) - -#define S3C2410_GPG0 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 0) -#define S3C2410_GPG0_INP (0x00 << 0) -#define S3C2410_GPG0_OUTP (0x01 << 0) -#define S3C2410_GPG0_EINT8 (0x02 << 0) -#define S3C2400_GPG0_I2SLRCK (0x02 << 0) - -#define S3C2410_GPG1 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 1) -#define S3C2410_GPG1_INP (0x00 << 2) -#define S3C2410_GPG1_OUTP (0x01 << 2) -#define S3C2410_GPG1_EINT9 (0x02 << 2) -#define S3C2400_GPG1_I2SSCLK (0x02 << 2) - -#define S3C2410_GPG2 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 2) -#define S3C2410_GPG2_INP (0x00 << 4) -#define S3C2410_GPG2_OUTP (0x01 << 4) -#define S3C2410_GPG2_EINT10 (0x02 << 4) -#define S3C2410_GPG2_nSS0 (0x03 << 4) -#define S3C2400_GPG2_CDCLK (0x02 << 4) - -#define S3C2410_GPG3 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 3) -#define S3C2410_GPG3_INP (0x00 << 6) -#define S3C2410_GPG3_OUTP (0x01 << 6) -#define S3C2410_GPG3_EINT11 (0x02 << 6) -#define S3C2410_GPG3_nSS1 (0x03 << 6) -#define S3C2400_GPG3_I2SSDO (0x02 << 6) -#define S3C2400_GPG3_I2SSDI (0x03 << 6) - -#define S3C2410_GPG4 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 4) -#define S3C2410_GPG4_INP (0x00 << 8) -#define S3C2410_GPG4_OUTP (0x01 << 8) -#define S3C2410_GPG4_EINT12 (0x02 << 8) -#define S3C2400_GPG4_MMCCLK (0x02 << 8) -#define S3C2400_GPG4_I2SSDI (0x03 << 8) -#define S3C2410_GPG4_LCDPWREN (0x03 << 8) -#define S3C2443_GPG4_LCDPWRDN (0x03 << 8) - -#define S3C2410_GPG5 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 5) -#define S3C2410_GPG5_INP (0x00 << 10) -#define S3C2410_GPG5_OUTP (0x01 << 10) -#define S3C2410_GPG5_EINT13 (0x02 << 10) -#define S3C2400_GPG5_MMCCMD (0x02 << 10) -#define S3C2400_GPG5_IICSDA (0x03 << 10) -#define S3C2410_GPG5_SPIMISO1 (0x03 << 10) /* not s3c2443 */ - -#define S3C2410_GPG6 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 6) -#define S3C2410_GPG6_INP (0x00 << 12) -#define S3C2410_GPG6_OUTP (0x01 << 12) -#define S3C2410_GPG6_EINT14 (0x02 << 12) -#define S3C2400_GPG6_MMCDAT (0x02 << 12) -#define S3C2400_GPG6_IICSCL (0x03 << 12) -#define S3C2410_GPG6_SPIMOSI1 (0x03 << 12) - -#define S3C2410_GPG7 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 7) -#define S3C2410_GPG7_INP (0x00 << 14) -#define S3C2410_GPG7_OUTP (0x01 << 14) -#define S3C2410_GPG7_EINT15 (0x02 << 14) -#define S3C2410_GPG7_SPICLK1 (0x03 << 14) -#define S3C2400_GPG7_SPIMISO (0x02 << 14) -#define S3C2400_GPG7_IICSDA (0x03 << 14) - -#define S3C2410_GPG8 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 8) -#define S3C2410_GPG8_INP (0x00 << 16) -#define S3C2410_GPG8_OUTP (0x01 << 16) -#define S3C2410_GPG8_EINT16 (0x02 << 16) -#define S3C2400_GPG8_SPIMOSI (0x02 << 16) -#define S3C2400_GPG8_IICSCL (0x03 << 16) - -#define S3C2410_GPG9 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 9) -#define S3C2410_GPG9_INP (0x00 << 18) -#define S3C2410_GPG9_OUTP (0x01 << 18) -#define S3C2410_GPG9_EINT17 (0x02 << 18) -#define S3C2400_GPG9_SPICLK (0x02 << 18) -#define S3C2400_GPG9_MMCCLK (0x03 << 18) - -#define S3C2410_GPG10 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 10) -#define S3C2410_GPG10_INP (0x00 << 20) -#define S3C2410_GPG10_OUTP (0x01 << 20) -#define S3C2410_GPG10_EINT18 (0x02 << 20) - -#define S3C2410_GPG11 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 11) -#define S3C2410_GPG11_INP (0x00 << 22) -#define S3C2410_GPG11_OUTP (0x01 << 22) -#define S3C2410_GPG11_EINT19 (0x02 << 22) -#define S3C2410_GPG11_TCLK1 (0x03 << 22) -#define S3C2443_GPG11_CF_nIREQ (0x03 << 22) - -#define S3C2410_GPG12 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 12) -#define S3C2410_GPG12_INP (0x00 << 24) -#define S3C2410_GPG12_OUTP (0x01 << 24) -#define S3C2410_GPG12_EINT20 (0x02 << 24) -#define S3C2410_GPG12_XMON (0x03 << 24) -#define S3C2442_GPG12_nSPICS0 (0x03 << 24) -#define S3C2443_GPG12_nINPACK (0x03 << 24) - -#define S3C2410_GPG13 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 13) -#define S3C2410_GPG13_INP (0x00 << 26) -#define S3C2410_GPG13_OUTP (0x01 << 26) -#define S3C2410_GPG13_EINT21 (0x02 << 26) -#define S3C2410_GPG13_nXPON (0x03 << 26) -#define S3C2443_GPG13_CF_nREG (0x03 << 26) - -#define S3C2410_GPG14 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 14) -#define S3C2410_GPG14_INP (0x00 << 28) -#define S3C2410_GPG14_OUTP (0x01 << 28) -#define S3C2410_GPG14_EINT22 (0x02 << 28) -#define S3C2410_GPG14_YMON (0x03 << 28) -#define S3C2443_GPG14_CF_RESET (0x03 << 28) - -#define S3C2410_GPG15 S3C2410_GPIONO(S3C2410_GPIO_BANKG, 15) -#define S3C2410_GPG15_INP (0x00 << 30) -#define S3C2410_GPG15_OUTP (0x01 << 30) -#define S3C2410_GPG15_EINT23 (0x02 << 30) -#define S3C2410_GPG15_nYPON (0x03 << 30) -#define S3C2443_GPG15_CF_PWR (0x03 << 30) - -#define S3C2410_GPG_PUPDIS(x) (1<<(x)) - -/* Port H consists of11 GPIO/serial/Misc pins - * - * GPGCON has 2 bits for each of the input pins on port F - * 00 = 0 input, 1 output, 2 interrupt (EINT0..7), 3 special func - * - * pull up works like all other ports. -*/ - -#define S3C2410_GPHCON S3C2410_GPIOREG(0x70) -#define S3C2410_GPHDAT S3C2410_GPIOREG(0x74) -#define S3C2410_GPHUP S3C2410_GPIOREG(0x78) - -#define S3C2410_GPH0 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 0) -#define S3C2410_GPH0_INP (0x00 << 0) -#define S3C2410_GPH0_OUTP (0x01 << 0) -#define S3C2410_GPH0_nCTS0 (0x02 << 0) - -#define S3C2410_GPH1 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 1) -#define S3C2410_GPH1_INP (0x00 << 2) -#define S3C2410_GPH1_OUTP (0x01 << 2) -#define S3C2410_GPH1_nRTS0 (0x02 << 2) - -#define S3C2410_GPH2 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 2) -#define S3C2410_GPH2_INP (0x00 << 4) -#define S3C2410_GPH2_OUTP (0x01 << 4) -#define S3C2410_GPH2_TXD0 (0x02 << 4) - -#define S3C2410_GPH3 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 3) -#define S3C2410_GPH3_INP (0x00 << 6) -#define S3C2410_GPH3_OUTP (0x01 << 6) -#define S3C2410_GPH3_RXD0 (0x02 << 6) - -#define S3C2410_GPH4 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 4) -#define S3C2410_GPH4_INP (0x00 << 8) -#define S3C2410_GPH4_OUTP (0x01 << 8) -#define S3C2410_GPH4_TXD1 (0x02 << 8) - -#define S3C2410_GPH5 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 5) -#define S3C2410_GPH5_INP (0x00 << 10) -#define S3C2410_GPH5_OUTP (0x01 << 10) -#define S3C2410_GPH5_RXD1 (0x02 << 10) - -#define S3C2410_GPH6 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 6) -#define S3C2410_GPH6_INP (0x00 << 12) -#define S3C2410_GPH6_OUTP (0x01 << 12) -#define S3C2410_GPH6_TXD2 (0x02 << 12) -#define S3C2410_GPH6_nRTS1 (0x03 << 12) - -#define S3C2410_GPH7 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 7) -#define S3C2410_GPH7_INP (0x00 << 14) -#define S3C2410_GPH7_OUTP (0x01 << 14) -#define S3C2410_GPH7_RXD2 (0x02 << 14) -#define S3C2410_GPH7_nCTS1 (0x03 << 14) - -#define S3C2410_GPH8 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 8) -#define S3C2410_GPH8_INP (0x00 << 16) -#define S3C2410_GPH8_OUTP (0x01 << 16) -#define S3C2410_GPH8_UCLK (0x02 << 16) - -#define S3C2410_GPH9 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 9) -#define S3C2410_GPH9_INP (0x00 << 18) -#define S3C2410_GPH9_OUTP (0x01 << 18) -#define S3C2410_GPH9_CLKOUT0 (0x02 << 18) -#define S3C2442_GPH9_nSPICS0 (0x03 << 18) - -#define S3C2410_GPH10 S3C2410_GPIONO(S3C2410_GPIO_BANKH, 10) -#define S3C2410_GPH10_INP (0x00 << 20) -#define S3C2410_GPH10_OUTP (0x01 << 20) -#define S3C2410_GPH10_CLKOUT1 (0x02 << 20) - -/* The S3C2412 and S3C2413 move the GPJ register set to after - * GPH, which means all registers after 0x80 are now offset by 0x10 - * for the 2412/2413 from the 2410/2440/2442 -*/ - -/* miscellaneous control */ -#define S3C2400_MISCCR S3C2410_GPIOREG(0x54) -#define S3C2410_MISCCR S3C2410_GPIOREG(0x80) -#define S3C2410_DCLKCON S3C2410_GPIOREG(0x84) - -#define S3C24XX_DCLKCON S3C24XX_GPIOREG2(0x84) - -/* see clock.h for dclk definitions */ - -/* pullup control on databus */ -#define S3C2410_MISCCR_SPUCR_HEN (0<<0) -#define S3C2410_MISCCR_SPUCR_HDIS (1<<0) -#define S3C2410_MISCCR_SPUCR_LEN (0<<1) -#define S3C2410_MISCCR_SPUCR_LDIS (1<<1) - -#define S3C2400_MISCCR_SPUCR_LEN (0<<0) -#define S3C2400_MISCCR_SPUCR_LDIS (1<<0) -#define S3C2400_MISCCR_SPUCR_HEN (0<<1) -#define S3C2400_MISCCR_SPUCR_HDIS (1<<1) - -#define S3C2400_MISCCR_HZ_STOPEN (0<<2) -#define S3C2400_MISCCR_HZ_STOPPREV (1<<2) - -#define S3C2410_MISCCR_USBDEV (0<<3) -#define S3C2410_MISCCR_USBHOST (1<<3) - -#define S3C2410_MISCCR_CLK0_MPLL (0<<4) -#define S3C2410_MISCCR_CLK0_UPLL (1<<4) -#define S3C2410_MISCCR_CLK0_FCLK (2<<4) -#define S3C2410_MISCCR_CLK0_HCLK (3<<4) -#define S3C2410_MISCCR_CLK0_PCLK (4<<4) -#define S3C2410_MISCCR_CLK0_DCLK0 (5<<4) -#define S3C2410_MISCCR_CLK0_MASK (7<<4) - -#define S3C2412_MISCCR_CLK0_RTC (2<<4) - -#define S3C2410_MISCCR_CLK1_MPLL (0<<8) -#define S3C2410_MISCCR_CLK1_UPLL (1<<8) -#define S3C2410_MISCCR_CLK1_FCLK (2<<8) -#define S3C2410_MISCCR_CLK1_HCLK (3<<8) -#define S3C2410_MISCCR_CLK1_PCLK (4<<8) -#define S3C2410_MISCCR_CLK1_DCLK1 (5<<8) -#define S3C2410_MISCCR_CLK1_MASK (7<<8) - -#define S3C2412_MISCCR_CLK1_CLKsrc (0<<8) - -#define S3C2410_MISCCR_USBSUSPND0 (1<<12) -#define S3C2410_MISCCR_USBSUSPND1 (1<<13) - -#define S3C2410_MISCCR_nRSTCON (1<<16) - -#define S3C2410_MISCCR_nEN_SCLK0 (1<<17) -#define S3C2410_MISCCR_nEN_SCLK1 (1<<18) -#define S3C2410_MISCCR_nEN_SCLKE (1<<19) /* not 2412 */ -#define S3C2410_MISCCR_SDSLEEP (7<<17) - -/* external interrupt control... */ -/* S3C2410_EXTINT0 -> irq sense control for EINT0..EINT7 - * S3C2410_EXTINT1 -> irq sense control for EINT8..EINT15 - * S3C2410_EXTINT2 -> irq sense control for EINT16..EINT23 - * - * note S3C2410_EXTINT2 has filtering options for EINT16..EINT23 - * - * Samsung datasheet p9-25 -*/ -#define S3C2400_EXTINT0 S3C2410_GPIOREG(0x58) -#define S3C2410_EXTINT0 S3C2410_GPIOREG(0x88) -#define S3C2410_EXTINT1 S3C2410_GPIOREG(0x8C) -#define S3C2410_EXTINT2 S3C2410_GPIOREG(0x90) - -#define S3C24XX_EXTINT0 S3C24XX_GPIOREG2(0x88) -#define S3C24XX_EXTINT1 S3C24XX_GPIOREG2(0x8C) -#define S3C24XX_EXTINT2 S3C24XX_GPIOREG2(0x90) - -/* values for S3C2410_EXTINT0/1/2 */ -#define S3C2410_EXTINT_LOWLEV (0x00) -#define S3C2410_EXTINT_HILEV (0x01) -#define S3C2410_EXTINT_FALLEDGE (0x02) -#define S3C2410_EXTINT_RISEEDGE (0x04) -#define S3C2410_EXTINT_BOTHEDGE (0x06) - -/* interrupt filtering conrrol for EINT16..EINT23 */ -#define S3C2410_EINFLT0 S3C2410_GPIOREG(0x94) -#define S3C2410_EINFLT1 S3C2410_GPIOREG(0x98) -#define S3C2410_EINFLT2 S3C2410_GPIOREG(0x9C) -#define S3C2410_EINFLT3 S3C2410_GPIOREG(0xA0) - -#define S3C24XX_EINFLT0 S3C24XX_GPIOREG2(0x94) -#define S3C24XX_EINFLT1 S3C24XX_GPIOREG2(0x98) -#define S3C24XX_EINFLT2 S3C24XX_GPIOREG2(0x9C) -#define S3C24XX_EINFLT3 S3C24XX_GPIOREG2(0xA0) - -/* values for interrupt filtering */ -#define S3C2410_EINTFLT_PCLK (0x00) -#define S3C2410_EINTFLT_EXTCLK (1<<7) -#define S3C2410_EINTFLT_WIDTHMSK(x) ((x) & 0x3f) - -/* removed EINTxxxx defs from here, not meant for this */ - -/* GSTATUS have miscellaneous information in them - * - * These move between s3c2410 and s3c2412 style systems. - */ - -#define S3C2410_GSTATUS0 S3C2410_GPIOREG(0x0AC) -#define S3C2410_GSTATUS1 S3C2410_GPIOREG(0x0B0) -#define S3C2410_GSTATUS2 S3C2410_GPIOREG(0x0B4) -#define S3C2410_GSTATUS3 S3C2410_GPIOREG(0x0B8) -#define S3C2410_GSTATUS4 S3C2410_GPIOREG(0x0BC) - -#define S3C2412_GSTATUS0 S3C2410_GPIOREG(0x0BC) -#define S3C2412_GSTATUS1 S3C2410_GPIOREG(0x0C0) -#define S3C2412_GSTATUS2 S3C2410_GPIOREG(0x0C4) -#define S3C2412_GSTATUS3 S3C2410_GPIOREG(0x0C8) -#define S3C2412_GSTATUS4 S3C2410_GPIOREG(0x0CC) - -#define S3C24XX_GSTATUS0 S3C24XX_GPIOREG2(0x0AC) -#define S3C24XX_GSTATUS1 S3C24XX_GPIOREG2(0x0B0) -#define S3C24XX_GSTATUS2 S3C24XX_GPIOREG2(0x0B4) -#define S3C24XX_GSTATUS3 S3C24XX_GPIOREG2(0x0B8) -#define S3C24XX_GSTATUS4 S3C24XX_GPIOREG2(0x0BC) - -#define S3C2410_GSTATUS0_nWAIT (1<<3) -#define S3C2410_GSTATUS0_NCON (1<<2) -#define S3C2410_GSTATUS0_RnB (1<<1) -#define S3C2410_GSTATUS0_nBATTFLT (1<<0) - -#define S3C2410_GSTATUS1_IDMASK (0xffff0000) -#define S3C2410_GSTATUS1_2410 (0x32410000) -#define S3C2410_GSTATUS1_2412 (0x32412001) -#define S3C2410_GSTATUS1_2440 (0x32440000) -#define S3C2410_GSTATUS1_2442 (0x32440aaa) - -#define S3C2410_GSTATUS2_WTRESET (1<<2) -#define S3C2410_GSTATUS2_OFFRESET (1<<1) -#define S3C2410_GSTATUS2_PONRESET (1<<0) - -/* open drain control register */ -#define S3C2400_OPENCR S3C2410_GPIOREG(0x50) - -#define S3C2400_OPENCR_OPC_RXD1DIS (0<<0) -#define S3C2400_OPENCR_OPC_RXD1EN (1<<0) -#define S3C2400_OPENCR_OPC_TXD1DIS (0<<1) -#define S3C2400_OPENCR_OPC_TXD1EN (1<<1) -#define S3C2400_OPENCR_OPC_CMDDIS (0<<2) -#define S3C2400_OPENCR_OPC_CMDEN (1<<2) -#define S3C2400_OPENCR_OPC_DATDIS (0<<3) -#define S3C2400_OPENCR_OPC_DATEN (1<<3) -#define S3C2400_OPENCR_OPC_MISODIS (0<<4) -#define S3C2400_OPENCR_OPC_MISOEN (1<<4) -#define S3C2400_OPENCR_OPC_MOSIDIS (0<<5) -#define S3C2400_OPENCR_OPC_MOSIEN (1<<5) - -/* 2412/2413 sleep configuration registers */ - -#define S3C2412_GPBSLPCON S3C2410_GPIOREG(0x1C) -#define S3C2412_GPCSLPCON S3C2410_GPIOREG(0x2C) -#define S3C2412_GPDSLPCON S3C2410_GPIOREG(0x3C) -#define S3C2412_GPFSLPCON S3C2410_GPIOREG(0x5C) -#define S3C2412_GPGSLPCON S3C2410_GPIOREG(0x6C) -#define S3C2412_GPHSLPCON S3C2410_GPIOREG(0x7C) - -/* definitions for each pin bit */ -#define S3C2412_GPIO_SLPCON_LOW ( 0x00 ) -#define S3C2412_GPIO_SLPCON_HIGH ( 0x01 ) -#define S3C2412_GPIO_SLPCON_IN ( 0x02 ) -#define S3C2412_GPIO_SLPCON_PULL ( 0x03 ) - -#define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) -#define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) -#define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) -#define S3C2412_SLPCON_PULL(x) ( 0x03 << ((x) * 2)) -#define S3C2412_SLPCON_EINT(x) ( 0x02 << ((x) * 2)) /* only IRQ pins */ -#define S3C2412_SLPCON_MASK(x) ( 0x03 << ((x) * 2)) - -#define S3C2412_SLPCON_ALL_LOW (0x0) -#define S3C2412_SLPCON_ALL_HIGH (0x11111111 | 0x44444444) -#define S3C2412_SLPCON_ALL_IN (0x22222222 | 0x88888888) -#define S3C2412_SLPCON_ALL_PULL (0x33333333) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ - diff --git a/include/asm-arm/arch-s3c2410/regs-gpioj.h b/include/asm-arm/arch-s3c2410/regs-gpioj.h deleted file mode 100644 index 0362332..0000000 --- a/include/asm-arm/arch-s3c2410/regs-gpioj.h +++ /dev/null @@ -1,106 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-gpioj.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2440 GPIO J register definitions -*/ - - -#ifndef __ASM_ARCH_REGS_GPIOJ_H -#define __ASM_ARCH_REGS_GPIOJ_H "gpioj" - -/* Port J consists of 13 GPIO/Camera pins - * - * GPJCON has 2 bits for each of the input pins on port F - * 00 = 0 input, 1 output, 2 Camera - * - * pull up works like all other ports. -*/ - -#define S3C2440_GPIO_BANKJ (416) - -#define S3C2440_GPJCON S3C2410_GPIOREG(0xd0) -#define S3C2440_GPJDAT S3C2410_GPIOREG(0xd4) -#define S3C2440_GPJUP S3C2410_GPIOREG(0xd8) - -#define S3C2413_GPJCON S3C2410_GPIOREG(0x80) -#define S3C2413_GPJDAT S3C2410_GPIOREG(0x84) -#define S3C2413_GPJUP S3C2410_GPIOREG(0x88) -#define S3C2413_GPJSLPCON S3C2410_GPIOREG(0x8C) - -#define S3C2440_GPJ0 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 0) -#define S3C2440_GPJ0_INP (0x00 << 0) -#define S3C2440_GPJ0_OUTP (0x01 << 0) -#define S3C2440_GPJ0_CAMDATA0 (0x02 << 0) - -#define S3C2440_GPJ1 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 1) -#define S3C2440_GPJ1_INP (0x00 << 2) -#define S3C2440_GPJ1_OUTP (0x01 << 2) -#define S3C2440_GPJ1_CAMDATA1 (0x02 << 2) - -#define S3C2440_GPJ2 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 2) -#define S3C2440_GPJ2_INP (0x00 << 4) -#define S3C2440_GPJ2_OUTP (0x01 << 4) -#define S3C2440_GPJ2_CAMDATA2 (0x02 << 4) - -#define S3C2440_GPJ3 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 3) -#define S3C2440_GPJ3_INP (0x00 << 6) -#define S3C2440_GPJ3_OUTP (0x01 << 6) -#define S3C2440_GPJ3_CAMDATA3 (0x02 << 6) - -#define S3C2440_GPJ4 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 4) -#define S3C2440_GPJ4_INP (0x00 << 8) -#define S3C2440_GPJ4_OUTP (0x01 << 8) -#define S3C2440_GPJ4_CAMDATA4 (0x02 << 8) - -#define S3C2440_GPJ5 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 5) -#define S3C2440_GPJ5_INP (0x00 << 10) -#define S3C2440_GPJ5_OUTP (0x01 << 10) -#define S3C2440_GPJ5_CAMDATA5 (0x02 << 10) - -#define S3C2440_GPJ6 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 6) -#define S3C2440_GPJ6_INP (0x00 << 12) -#define S3C2440_GPJ6_OUTP (0x01 << 12) -#define S3C2440_GPJ6_CAMDATA6 (0x02 << 12) - -#define S3C2440_GPJ7 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 7) -#define S3C2440_GPJ7_INP (0x00 << 14) -#define S3C2440_GPJ7_OUTP (0x01 << 14) -#define S3C2440_GPJ7_CAMDATA7 (0x02 << 14) - -#define S3C2440_GPJ8 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 8) -#define S3C2440_GPJ8_INP (0x00 << 16) -#define S3C2440_GPJ8_OUTP (0x01 << 16) -#define S3C2440_GPJ8_CAMPCLK (0x02 << 16) - -#define S3C2440_GPJ9 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 9) -#define S3C2440_GPJ9_INP (0x00 << 18) -#define S3C2440_GPJ9_OUTP (0x01 << 18) -#define S3C2440_GPJ9_CAMVSYNC (0x02 << 18) - -#define S3C2440_GPJ10 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 10) -#define S3C2440_GPJ10_INP (0x00 << 20) -#define S3C2440_GPJ10_OUTP (0x01 << 20) -#define S3C2440_GPJ10_CAMHREF (0x02 << 20) - -#define S3C2440_GPJ11 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 11) -#define S3C2440_GPJ11_INP (0x00 << 22) -#define S3C2440_GPJ11_OUTP (0x01 << 22) -#define S3C2440_GPJ11_CAMCLKOUT (0x02 << 22) - -#define S3C2440_GPJ12 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 12) -#define S3C2440_GPJ12_INP (0x00 << 24) -#define S3C2440_GPJ12_OUTP (0x01 << 24) -#define S3C2440_GPJ12_CAMRESET (0x02 << 24) - -#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13) -#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14) -#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15) - -#endif /* __ASM_ARCH_REGS_GPIOJ_H */ - diff --git a/include/asm-arm/arch-s3c2410/regs-irq.h b/include/asm-arm/arch-s3c2410/regs-irq.h deleted file mode 100644 index 498184c..0000000 --- a/include/asm-arm/arch-s3c2410/regs-irq.h +++ /dev/null @@ -1,43 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-irq.h - * - * Copyright (c) 2003 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - -#ifndef ___ASM_ARCH_REGS_IRQ_H -#define ___ASM_ARCH_REGS_IRQ_H "$Id: irq.h,v 1.3 2003/03/25 21:29:06 ben Exp $" - -/* interrupt controller */ - -#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) -#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) -#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) - -#define S3C2410_SRCPND S3C2410_IRQREG(0x000) -#define S3C2410_INTMOD S3C2410_IRQREG(0x004) -#define S3C2410_INTMSK S3C2410_IRQREG(0x008) -#define S3C2410_PRIORITY S3C2410_IRQREG(0x00C) -#define S3C2410_INTPND S3C2410_IRQREG(0x010) -#define S3C2410_INTOFFSET S3C2410_IRQREG(0x014) -#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) -#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) - -/* mask: 0=enable, 1=disable - * 1 bit EINT, 4=EINT4, 23=EINT23 - * EINT0,1,2,3 are not handled here. -*/ - -#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) -#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) -#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4) -#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8) - -#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4) -#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8) - -#endif /* ___ASM_ARCH_REGS_IRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-lcd.h b/include/asm-arm/arch-s3c2410/regs-lcd.h deleted file mode 100644 index bd85484..0000000 --- a/include/asm-arm/arch-s3c2410/regs-lcd.h +++ /dev/null @@ -1,162 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-lcd.h - * - * Copyright (c) 2003 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - -#ifndef ___ASM_ARCH_REGS_LCD_H -#define ___ASM_ARCH_REGS_LCD_H "$Id: lcd.h,v 1.3 2003/06/26 13:25:06 ben Exp $" - -#define S3C2410_LCDREG(x) (x) - -/* LCD control registers */ -#define S3C2410_LCDCON1 S3C2410_LCDREG(0x00) -#define S3C2410_LCDCON2 S3C2410_LCDREG(0x04) -#define S3C2410_LCDCON3 S3C2410_LCDREG(0x08) -#define S3C2410_LCDCON4 S3C2410_LCDREG(0x0C) -#define S3C2410_LCDCON5 S3C2410_LCDREG(0x10) - -#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) -#define S3C2410_LCDCON1_MMODE (1<<7) -#define S3C2410_LCDCON1_DSCAN4 (0<<5) -#define S3C2410_LCDCON1_STN4 (1<<5) -#define S3C2410_LCDCON1_STN8 (2<<5) -#define S3C2410_LCDCON1_TFT (3<<5) - -#define S3C2410_LCDCON1_STN1BPP (0<<1) -#define S3C2410_LCDCON1_STN2GREY (1<<1) -#define S3C2410_LCDCON1_STN4GREY (2<<1) -#define S3C2410_LCDCON1_STN8BPP (3<<1) -#define S3C2410_LCDCON1_STN12BPP (4<<1) - -#define S3C2410_LCDCON1_TFT1BPP (8<<1) -#define S3C2410_LCDCON1_TFT2BPP (9<<1) -#define S3C2410_LCDCON1_TFT4BPP (10<<1) -#define S3C2410_LCDCON1_TFT8BPP (11<<1) -#define S3C2410_LCDCON1_TFT16BPP (12<<1) -#define S3C2410_LCDCON1_TFT24BPP (13<<1) - -#define S3C2410_LCDCON1_ENVID (1) - -#define S3C2410_LCDCON1_MODEMASK 0x1E - -#define S3C2410_LCDCON2_VBPD(x) ((x) << 24) -#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) -#define S3C2410_LCDCON2_VFPD(x) ((x) << 6) -#define S3C2410_LCDCON2_VSPW(x) ((x) << 0) - -#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) -#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) -#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) - -#define S3C2410_LCDCON3_HBPD(x) ((x) << 19) -#define S3C2410_LCDCON3_WDLY(x) ((x) << 19) -#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8) -#define S3C2410_LCDCON3_HFPD(x) ((x) << 0) -#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0) - -#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F) -#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF) - -/* LDCCON4 changes for STN mode on the S3C2412 */ - -#define S3C2410_LCDCON4_MVAL(x) ((x) << 8) -#define S3C2410_LCDCON4_HSPW(x) ((x) << 0) -#define S3C2410_LCDCON4_WLH(x) ((x) << 0) - -#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF) - -#define S3C2410_LCDCON5_BPP24BL (1<<12) -#define S3C2410_LCDCON5_FRM565 (1<<11) -#define S3C2410_LCDCON5_INVVCLK (1<<10) -#define S3C2410_LCDCON5_INVVLINE (1<<9) -#define S3C2410_LCDCON5_INVVFRAME (1<<8) -#define S3C2410_LCDCON5_INVVD (1<<7) -#define S3C2410_LCDCON5_INVVDEN (1<<6) -#define S3C2410_LCDCON5_INVPWREN (1<<5) -#define S3C2410_LCDCON5_INVLEND (1<<4) -#define S3C2410_LCDCON5_PWREN (1<<3) -#define S3C2410_LCDCON5_ENLEND (1<<2) -#define S3C2410_LCDCON5_BSWP (1<<1) -#define S3C2410_LCDCON5_HWSWP (1<<0) - -/* framebuffer start addressed */ -#define S3C2410_LCDSADDR1 S3C2410_LCDREG(0x14) -#define S3C2410_LCDSADDR2 S3C2410_LCDREG(0x18) -#define S3C2410_LCDSADDR3 S3C2410_LCDREG(0x1C) - -#define S3C2410_LCDBANK(x) ((x) << 21) -#define S3C2410_LCDBASEU(x) (x) - -#define S3C2410_OFFSIZE(x) ((x) << 11) -#define S3C2410_PAGEWIDTH(x) (x) - -/* colour lookup and miscellaneous controls */ - -#define S3C2410_REDLUT S3C2410_LCDREG(0x20) -#define S3C2410_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2410_BLUELUT S3C2410_LCDREG(0x28) - -#define S3C2410_DITHMODE S3C2410_LCDREG(0x4C) -#define S3C2410_TPAL S3C2410_LCDREG(0x50) - -#define S3C2410_TPAL_EN (1<<24) - -/* interrupt info */ -#define S3C2410_LCDINTPND S3C2410_LCDREG(0x54) -#define S3C2410_LCDSRCPND S3C2410_LCDREG(0x58) -#define S3C2410_LCDINTMSK S3C2410_LCDREG(0x5C) -#define S3C2410_LCDINT_FIWSEL (1<<2) -#define S3C2410_LCDINT_FRSYNC (1<<1) -#define S3C2410_LCDINT_FICNT (1<<0) - -/* s3c2442 extra stn registers */ - -#define S3C2442_REDLUT S3C2410_LCDREG(0x20) -#define S3C2442_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2442_BLUELUT S3C2410_LCDREG(0x28) -#define S3C2442_DITHMODE S3C2410_LCDREG(0x20) - -#define S3C2410_LPCSEL S3C2410_LCDREG(0x60) - -#define S3C2410_TFTPAL(x) S3C2410_LCDREG((0x400 + (x)*4)) - -/* S3C2412 registers */ - -#define S3C2412_TPAL S3C2410_LCDREG(0x20) - -#define S3C2412_LCDINTPND S3C2410_LCDREG(0x24) -#define S3C2412_LCDSRCPND S3C2410_LCDREG(0x28) -#define S3C2412_LCDINTMSK S3C2410_LCDREG(0x2C) - -#define S3C2412_TCONSEL S3C2410_LCDREG(0x30) - -#define S3C2412_LCDCON6 S3C2410_LCDREG(0x34) -#define S3C2412_LCDCON7 S3C2410_LCDREG(0x38) -#define S3C2412_LCDCON8 S3C2410_LCDREG(0x3C) -#define S3C2412_LCDCON9 S3C2410_LCDREG(0x40) - -#define S3C2412_REDLUT(x) S3C2410_LCDREG(0x44 + ((x)*4)) -#define S3C2412_GREENLUT(x) S3C2410_LCDREG(0x60 + ((x)*4)) -#define S3C2412_BLUELUT(x) S3C2410_LCDREG(0x98 + ((x)*4)) - -#define S3C2412_FRCPAT(x) S3C2410_LCDREG(0xB4 + ((x)*4)) - -/* general registers */ - -/* base of the LCD registers, where INTPND, INTSRC and then INTMSK - * are available. */ - -#define S3C2410_LCDINTBASE S3C2410_LCDREG(0x54) -#define S3C2412_LCDINTBASE S3C2410_LCDREG(0x24) - -#define S3C24XX_LCDINTPND (0x00) -#define S3C24XX_LCDSRCPND (0x04) -#define S3C24XX_LCDINTMSK (0x08) - -#endif /* ___ASM_ARCH_REGS_LCD_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-mem.h b/include/asm-arm/arch-s3c2410/regs-mem.h deleted file mode 100644 index 312ff93..0000000 --- a/include/asm-arm/arch-s3c2410/regs-mem.h +++ /dev/null @@ -1,220 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-mem.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 Memory Control register definitions -*/ - -#ifndef __ASM_ARM_MEMREGS_H -#define __ASM_ARM_MEMREGS_H "$Id: regs.h,v 1.8 2003/05/01 15:55:41 ben Exp $" - -#ifndef S3C2410_MEMREG -#define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) -#endif - -/* bus width, and wait state control */ -#define S3C2410_BWSCON S3C2410_MEMREG(0x0000) - -/* bank zero config - note, pinstrapped from OM pins! */ -#define S3C2410_BWSCON_DW0_16 (1<<1) -#define S3C2410_BWSCON_DW0_32 (2<<1) - -/* bank one configs */ -#define S3C2410_BWSCON_DW1_8 (0<<4) -#define S3C2410_BWSCON_DW1_16 (1<<4) -#define S3C2410_BWSCON_DW1_32 (2<<4) -#define S3C2410_BWSCON_WS1 (1<<6) -#define S3C2410_BWSCON_ST1 (1<<7) - -/* bank 2 configurations */ -#define S3C2410_BWSCON_DW2_8 (0<<8) -#define S3C2410_BWSCON_DW2_16 (1<<8) -#define S3C2410_BWSCON_DW2_32 (2<<8) -#define S3C2410_BWSCON_WS2 (1<<10) -#define S3C2410_BWSCON_ST2 (1<<11) - -/* bank 3 configurations */ -#define S3C2410_BWSCON_DW3_8 (0<<12) -#define S3C2410_BWSCON_DW3_16 (1<<12) -#define S3C2410_BWSCON_DW3_32 (2<<12) -#define S3C2410_BWSCON_WS3 (1<<14) -#define S3C2410_BWSCON_ST3 (1<<15) - -/* bank 4 configurations */ -#define S3C2410_BWSCON_DW4_8 (0<<16) -#define S3C2410_BWSCON_DW4_16 (1<<16) -#define S3C2410_BWSCON_DW4_32 (2<<16) -#define S3C2410_BWSCON_WS4 (1<<18) -#define S3C2410_BWSCON_ST4 (1<<19) - -/* bank 5 configurations */ -#define S3C2410_BWSCON_DW5_8 (0<<20) -#define S3C2410_BWSCON_DW5_16 (1<<20) -#define S3C2410_BWSCON_DW5_32 (2<<20) -#define S3C2410_BWSCON_WS5 (1<<22) -#define S3C2410_BWSCON_ST5 (1<<23) - -/* bank 6 configurations */ -#define S3C2410_BWSCON_DW6_8 (0<<24) -#define S3C2410_BWSCON_DW6_16 (1<<24) -#define S3C2410_BWSCON_DW6_32 (2<<24) -#define S3C2410_BWSCON_WS6 (1<<26) -#define S3C2410_BWSCON_ST6 (1<<27) - -/* bank 7 configurations */ -#define S3C2410_BWSCON_DW7_8 (0<<28) -#define S3C2410_BWSCON_DW7_16 (1<<28) -#define S3C2410_BWSCON_DW7_32 (2<<28) -#define S3C2410_BWSCON_WS7 (1<<30) -#define S3C2410_BWSCON_ST7 (1<<31) - -/* memory set (rom, ram) */ -#define S3C2410_BANKCON0 S3C2410_MEMREG(0x0004) -#define S3C2410_BANKCON1 S3C2410_MEMREG(0x0008) -#define S3C2410_BANKCON2 S3C2410_MEMREG(0x000C) -#define S3C2410_BANKCON3 S3C2410_MEMREG(0x0010) -#define S3C2410_BANKCON4 S3C2410_MEMREG(0x0014) -#define S3C2410_BANKCON5 S3C2410_MEMREG(0x0018) -#define S3C2410_BANKCON6 S3C2410_MEMREG(0x001C) -#define S3C2410_BANKCON7 S3C2410_MEMREG(0x0020) - -/* bank configuration registers */ - -#define S3C2410_BANKCON_PMCnorm (0x00) -#define S3C2410_BANKCON_PMC4 (0x01) -#define S3C2410_BANKCON_PMC8 (0x02) -#define S3C2410_BANKCON_PMC16 (0x03) - -/* bank configurations for banks 0..7, note banks - * 6 and 7 have differnt configurations depending on - * the memory type bits */ - -#define S3C2410_BANKCON_Tacp2 (0x0 << 2) -#define S3C2410_BANKCON_Tacp3 (0x1 << 2) -#define S3C2410_BANKCON_Tacp4 (0x2 << 2) -#define S3C2410_BANKCON_Tacp6 (0x3 << 2) -#define S3C2410_BANKCON_Tacp_SHIFT (2) - -#define S3C2410_BANKCON_Tcah0 (0x0 << 4) -#define S3C2410_BANKCON_Tcah1 (0x1 << 4) -#define S3C2410_BANKCON_Tcah2 (0x2 << 4) -#define S3C2410_BANKCON_Tcah4 (0x3 << 4) -#define S3C2410_BANKCON_Tcah_SHIFT (4) - -#define S3C2410_BANKCON_Tcoh0 (0x0 << 6) -#define S3C2410_BANKCON_Tcoh1 (0x1 << 6) -#define S3C2410_BANKCON_Tcoh2 (0x2 << 6) -#define S3C2410_BANKCON_Tcoh4 (0x3 << 6) -#define S3C2410_BANKCON_Tcoh_SHIFT (6) - -#define S3C2410_BANKCON_Tacc1 (0x0 << 8) -#define S3C2410_BANKCON_Tacc2 (0x1 << 8) -#define S3C2410_BANKCON_Tacc3 (0x2 << 8) -#define S3C2410_BANKCON_Tacc4 (0x3 << 8) -#define S3C2410_BANKCON_Tacc6 (0x4 << 8) -#define S3C2410_BANKCON_Tacc8 (0x5 << 8) -#define S3C2410_BANKCON_Tacc10 (0x6 << 8) -#define S3C2410_BANKCON_Tacc14 (0x7 << 8) -#define S3C2410_BANKCON_Tacc_SHIFT (8) - -#define S3C2410_BANKCON_Tcos0 (0x0 << 11) -#define S3C2410_BANKCON_Tcos1 (0x1 << 11) -#define S3C2410_BANKCON_Tcos2 (0x2 << 11) -#define S3C2410_BANKCON_Tcos4 (0x3 << 11) -#define S3C2410_BANKCON_Tcos_SHIFT (11) - -#define S3C2410_BANKCON_Tacs0 (0x0 << 13) -#define S3C2410_BANKCON_Tacs1 (0x1 << 13) -#define S3C2410_BANKCON_Tacs2 (0x2 << 13) -#define S3C2410_BANKCON_Tacs4 (0x3 << 13) -#define S3C2410_BANKCON_Tacs_SHIFT (13) - -#define S3C2410_BANKCON_SRAM (0x0 << 15) -#define S3C2400_BANKCON_EDODRAM (0x2 << 15) -#define S3C2410_BANKCON_SDRAM (0x3 << 15) - -/* next bits only for EDO DRAM in 6,7 */ -#define S3C2400_BANKCON_EDO_Trcd1 (0x00 << 4) -#define S3C2400_BANKCON_EDO_Trcd2 (0x01 << 4) -#define S3C2400_BANKCON_EDO_Trcd3 (0x02 << 4) -#define S3C2400_BANKCON_EDO_Trcd4 (0x03 << 4) - -/* CAS pulse width */ -#define S3C2400_BANKCON_EDO_PULSE1 (0x00 << 3) -#define S3C2400_BANKCON_EDO_PULSE2 (0x01 << 3) - -/* CAS pre-charge */ -#define S3C2400_BANKCON_EDO_TCP1 (0x00 << 2) -#define S3C2400_BANKCON_EDO_TCP2 (0x01 << 2) - -/* control column address select */ -#define S3C2400_BANKCON_EDO_SCANb8 (0x00 << 0) -#define S3C2400_BANKCON_EDO_SCANb9 (0x01 << 0) -#define S3C2400_BANKCON_EDO_SCANb10 (0x02 << 0) -#define S3C2400_BANKCON_EDO_SCANb11 (0x03 << 0) - -/* next bits only for SDRAM in 6,7 */ -#define S3C2410_BANKCON_Trcd2 (0x00 << 2) -#define S3C2410_BANKCON_Trcd3 (0x01 << 2) -#define S3C2410_BANKCON_Trcd4 (0x02 << 2) - -/* control column address select */ -#define S3C2410_BANKCON_SCANb8 (0x00 << 0) -#define S3C2410_BANKCON_SCANb9 (0x01 << 0) -#define S3C2410_BANKCON_SCANb10 (0x02 << 0) - -#define S3C2410_REFRESH S3C2410_MEMREG(0x0024) -#define S3C2410_BANKSIZE S3C2410_MEMREG(0x0028) -#define S3C2410_MRSRB6 S3C2410_MEMREG(0x002C) -#define S3C2410_MRSRB7 S3C2410_MEMREG(0x0030) - -/* refresh control */ - -#define S3C2410_REFRESH_REFEN (1<<23) -#define S3C2410_REFRESH_SELF (1<<22) -#define S3C2410_REFRESH_REFCOUNTER ((1<<11)-1) - -#define S3C2410_REFRESH_TRP_MASK (3<<20) -#define S3C2410_REFRESH_TRP_2clk (0<<20) -#define S3C2410_REFRESH_TRP_3clk (1<<20) -#define S3C2410_REFRESH_TRP_4clk (2<<20) - -#define S3C2400_REFRESH_DRAM_TRP_MASK (3<<20) -#define S3C2400_REFRESH_DRAM_TRP_1_5clk (0<<20) -#define S3C2400_REFRESH_DRAM_TRP_2_5clk (1<<20) -#define S3C2400_REFRESH_DRAM_TRP_3_5clk (2<<20) -#define S3C2400_REFRESH_DRAM_TRP_4_5clk (3<<20) - -#define S3C2410_REFRESH_TSRC_MASK (3<<18) -#define S3C2410_REFRESH_TSRC_4clk (0<<18) -#define S3C2410_REFRESH_TSRC_5clk (1<<18) -#define S3C2410_REFRESH_TSRC_6clk (2<<18) -#define S3C2410_REFRESH_TSRC_7clk (3<<18) - - -/* mode select register(s) */ - -#define S3C2410_MRSRB_CL1 (0x00 << 4) -#define S3C2410_MRSRB_CL2 (0x02 << 4) -#define S3C2410_MRSRB_CL3 (0x03 << 4) - -/* bank size register */ -#define S3C2410_BANKSIZE_128M (0x2 << 0) -#define S3C2410_BANKSIZE_64M (0x1 << 0) -#define S3C2410_BANKSIZE_32M (0x0 << 0) -#define S3C2410_BANKSIZE_16M (0x7 << 0) -#define S3C2410_BANKSIZE_8M (0x6 << 0) -#define S3C2410_BANKSIZE_4M (0x5 << 0) -#define S3C2410_BANKSIZE_2M (0x4 << 0) -#define S3C2410_BANKSIZE_MASK (0x7 << 0) -#define S3C2400_BANKSIZE_MASK (0x4 << 0) -#define S3C2410_BANKSIZE_SCLK_EN (1<<4) -#define S3C2410_BANKSIZE_SCKE_EN (1<<5) -#define S3C2410_BANKSIZE_BURST (1<<7) - -#endif /* __ASM_ARM_MEMREGS_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-power.h b/include/asm-arm/arch-s3c2410/regs-power.h deleted file mode 100644 index 13d13b7..0000000 --- a/include/asm-arm/arch-s3c2410/regs-power.h +++ /dev/null @@ -1,40 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-power.h - * - * Copyright (c) 2003,2004,2005,2006 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C24XX power control register definitions -*/ - -#ifndef __ASM_ARM_REGS_PWR -#define __ASM_ARM_REGS_PWR __FILE__ - -#define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) -#define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) - -#define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) -#define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) -#define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) -#define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) - -#define S3C2412_PWRCFG_BATF_IRQ (1<<0) -#define S3C2412_PWRCFG_BATF_IGNORE (2<<0) -#define S3C2412_PWRCFG_BATF_SLEEP (3<<0) -#define S3C2412_PWRCFG_BATF_MASK (3<<0) - -#define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0<<6) -#define S3C2412_PWRCFG_STANDBYWFI_IDLE (1<<6) -#define S3C2412_PWRCFG_STANDBYWFI_STOP (2<<6) -#define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3<<6) -#define S3C2412_PWRCFG_STANDBYWFI_MASK (3<<6) - -#define S3C2412_PWRCFG_RTC_MASKIRQ (1<<8) -#define S3C2412_PWRCFG_NAND_NORST (1<<9) - -#endif /* __ASM_ARM_REGS_PWR */ diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412-mem.h b/include/asm-arm/arch-s3c2410/regs-s3c2412-mem.h deleted file mode 100644 index c8c793e..0000000 --- a/include/asm-arm/arch-s3c2410/regs-s3c2412-mem.h +++ /dev/null @@ -1,29 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412-mem.h - * - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2412 memory register definitions -*/ - -#ifndef __ASM_ARM_REGS_S3C2412_MEM -#define __ASM_ARM_REGS_S3C2412_MEM - -#ifndef S3C2412_MEMREG -#define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) -#endif - -#define S3C2412_BANKCFG S3C2412_MEMREG(0x00) -#define S3C2412_BANKCON1 S3C2412_MEMREG(0x04) -#define S3C2412_BANKCON2 S3C2412_MEMREG(0x08) -#define S3C2412_BANKCON3 S3C2412_MEMREG(0x0C) - -#define S3C2412_REFRESH S3C2412_MEMREG(0x10) -#define S3C2412_TIMEOUT S3C2412_MEMREG(0x14) - -#endif /* __ASM_ARM_REGS_S3C2412_MEM */ diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h deleted file mode 100644 index 783b18f..0000000 --- a/include/asm-arm/arch-s3c2410/regs-s3c2412.h +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2412 specific register definitions -*/ - -#ifndef __ASM_ARCH_REGS_S3C2412_H -#define __ASM_ARCH_REGS_S3C2412_H "s3c2412" - -#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) -#define S3C2412_SWRST_RESET (0x533C2412) - -/* see regs-power.h for the other registers in the power block. */ - -#endif /* __ASM_ARCH_REGS_S3C2412_H */ - diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h b/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h deleted file mode 100644 index c141465..0000000 --- a/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h +++ /dev/null @@ -1,195 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2443 clock register definitions -*/ - -#ifndef __ASM_ARM_REGS_S3C2443_CLOCK -#define __ASM_ARM_REGS_S3C2443_CLOCK - -#define S3C2443_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) - -#define S3C2443_PLLCON_MDIVSHIFT 16 -#define S3C2443_PLLCON_PDIVSHIFT 8 -#define S3C2443_PLLCON_SDIVSHIFT 0 -#define S3C2443_PLLCON_MDIVMASK ((1<<(1+(23-16)))-1) -#define S3C2443_PLLCON_PDIVMASK ((1<<(1+(9-8)))-1) -#define S3C2443_PLLCON_SDIVMASK (3) - -#define S3C2443_MPLLCON S3C2443_CLKREG(0x10) -#define S3C2443_EPLLCON S3C2443_CLKREG(0x18) -#define S3C2443_CLKSRC S3C2443_CLKREG(0x20) -#define S3C2443_CLKDIV0 S3C2443_CLKREG(0x24) -#define S3C2443_CLKDIV1 S3C2443_CLKREG(0x28) -#define S3C2443_HCLKCON S3C2443_CLKREG(0x30) -#define S3C2443_PCLKCON S3C2443_CLKREG(0x34) -#define S3C2443_SCLKCON S3C2443_CLKREG(0x38) -#define S3C2443_PWRMODE S3C2443_CLKREG(0x40) -#define S3C2443_SWRST S3C2443_CLKREG(0x44) -#define S3C2443_BUSPRI0 S3C2443_CLKREG(0x50) -#define S3C2443_SYSID S3C2443_CLKREG(0x5C) -#define S3C2443_PWRCFG S3C2443_CLKREG(0x60) -#define S3C2443_RSTCON S3C2443_CLKREG(0x64) - -#define S3C2443_SWRST_RESET (0x533c2443) - -#define S3C2443_PLLCON_OFF (1<<24) - -#define S3C2443_CLKSRC_I2S_EXT (1<<14) -#define S3C2443_CLKSRC_I2S_EPLLDIV (0<<14) -#define S3C2443_CLKSRC_I2S_EPLLREF (2<<14) -#define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14) -#define S3C2443_CLKSRC_I2S_MASK (3<<14) - -#define S3C2443_CLKSRC_EPLLREF_XTAL (2<<8) -#define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<8) -#define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<8) -#define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<8) -#define S3C2443_CLKSRC_EPLLREF_MASK (3<<8) - -#define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6) -#define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4) -#define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) - -#define S3C2443_CLKDIV0_DVS (1<<13) -#define S3C2443_CLKDIV0_HALF_HCLK (1<<3) -#define S3C2443_CLKDIV0_HALF_PCLK (1<<2) - -#define S3C2443_CLKDIV0_HCLKDIV_MASK (3<<0) - -#define S3C2443_CLKDIV0_EXTDIV_MASK (3<<6) -#define S3C2443_CLKDIV0_EXTDIV_SHIFT (6) - -#define S3C2443_CLKDIV0_PREDIV_MASK (3<<4) -#define S3C2443_CLKDIV0_PREDIV_SHIFT (4) - -#define S3C2443_CLKDIV0_ARMDIV_MASK (15<<9) -#define S3C2443_CLKDIV0_ARMDIV_SHIFT (9) -#define S3C2443_CLKDIV0_ARMDIV_1 (0<<9) -#define S3C2443_CLKDIV0_ARMDIV_2 (8<<9) -#define S3C2443_CLKDIV0_ARMDIV_3 (2<<9) -#define S3C2443_CLKDIV0_ARMDIV_4 (9<<9) -#define S3C2443_CLKDIV0_ARMDIV_6 (10<<9) -#define S3C2443_CLKDIV0_ARMDIV_8 (11<<9) -#define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) -#define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) - -/* S3C2443_CLKDIV1 */ - -#define S3C2443_CLKDIV1_CAMDIV_MASK (15<<26) -#define S3C2443_CLKDIV1_CAMDIV_SHIFT (26) - -#define S3C2443_CLKDIV1_HSSPIDIV_MASK (3<<24) -#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT (24) - -#define S3C2443_CLKDIV1_DISPDIV_MASK (0xff<<16) -#define S3C2443_CLKDIV1_DISPDIV_SHIFT (16) - -#define S3C2443_CLKDIV1_I2SDIV_MASK (15<<12) -#define S3C2443_CLKDIV1_I2SDIV_SHIFT (12) - -#define S3C2443_CLKDIV1_UARTDIV_MASK (15<<8) -#define S3C2443_CLKDIV1_UARTDIV_SHIFT (8) - -#define S3C2443_CLKDIV1_HSMMCDIV_MASK (3<<6) -#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT (6) - -#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4) -#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4) - -#define S3C2443_CLKCON_NAND - -#define S3C2443_HCLKCON_DMA0 (1<<0) -#define S3C2443_HCLKCON_DMA1 (1<<1) -#define S3C2443_HCLKCON_DMA2 (1<<2) -#define S3C2443_HCLKCON_DMA3 (1<<3) -#define S3C2443_HCLKCON_DMA4 (1<<4) -#define S3C2443_HCLKCON_DMA5 (1<<5) -#define S3C2443_HCLKCON_CAMIF (1<<8) -#define S3C2443_HCLKCON_DISP (1<<9) -#define S3C2443_HCLKCON_LCDC (1<<10) -#define S3C2443_HCLKCON_USBH (1<<11) -#define S3C2443_HCLKCON_USBD (1<<12) -#define S3C2443_HCLKCON_HSMMC (1<<16) -#define S3C2443_HCLKCON_CFC (1<<17) -#define S3C2443_HCLKCON_SSMC (1<<18) -#define S3C2443_HCLKCON_DRAMC (1<<19) - -#define S3C2443_PCLKCON_UART0 (1<<0) -#define S3C2443_PCLKCON_UART1 (1<<1) -#define S3C2443_PCLKCON_UART2 (1<<2) -#define S3C2443_PCLKCON_UART3 (1<<3) -#define S3C2443_PCLKCON_IIC (1<<4) -#define S3C2443_PCLKCON_SDI (1<<5) -#define S3C2443_PCLKCON_ADC (1<<7) -#define S3C2443_PCLKCON_AC97 (1<<8) -#define S3C2443_PCLKCON_IIS (1<<9) -#define S3C2443_PCLKCON_PWMT (1<<10) -#define S3C2443_PCLKCON_WDT (1<<11) -#define S3C2443_PCLKCON_RTC (1<<12) -#define S3C2443_PCLKCON_GPIO (1<<13) -#define S3C2443_PCLKCON_SPI0 (1<<14) -#define S3C2443_PCLKCON_SPI1 (1<<15) - -#define S3C2443_SCLKCON_DDRCLK (1<<16) -#define S3C2443_SCLKCON_SSMCCLK (1<<15) -#define S3C2443_SCLKCON_HSSPICLK (1<<14) -#define S3C2443_SCLKCON_HSMMCCLK_EXT (1<<13) -#define S3C2443_SCLKCON_HSMMCCLK_EPLL (1<<12) -#define S3C2443_SCLKCON_CAMCLK (1<<11) -#define S3C2443_SCLKCON_DISPCLK (1<<10) -#define S3C2443_SCLKCON_I2SCLK (1<<9) -#define S3C2443_SCLKCON_UARTCLK (1<<8) -#define S3C2443_SCLKCON_USBHOST (1<<1) - -#include - -static inline unsigned int -s3c2443_get_mpll(unsigned int pllval, unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT; - - mdiv &= S3C2443_PLLCON_MDIVMASK; - pdiv &= S3C2443_PLLCON_PDIVMASK; - sdiv &= S3C2443_PLLCON_SDIVMASK; - - fvco = (uint64_t)baseclk * (2 * (mdiv + 8)); - do_div(fvco, pdiv << sdiv); - - return (unsigned int)fvco; -} - -static inline unsigned int -s3c2443_get_epll(unsigned int pllval, unsigned int baseclk) -{ - unsigned int mdiv, pdiv, sdiv; - uint64_t fvco; - - mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; - pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; - sdiv = pllval >> S3C2443_PLLCON_SDIVSHIFT; - - mdiv &= S3C2443_PLLCON_MDIVMASK; - pdiv &= S3C2443_PLLCON_PDIVMASK; - sdiv &= S3C2443_PLLCON_SDIVMASK; - - fvco = (uint64_t)baseclk * (mdiv + 8); - do_div(fvco, (pdiv + 2) << sdiv); - - return (unsigned int)fvco; -} - -#endif /* __ASM_ARM_REGS_S3C2443_CLOCK */ - diff --git a/include/asm-arm/arch-s3c2410/regs-sdi.h b/include/asm-arm/arch-s3c2410/regs-sdi.h deleted file mode 100644 index bfb222f..0000000 --- a/include/asm-arm/arch-s3c2410/regs-sdi.h +++ /dev/null @@ -1,127 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-sdi.h - * - * Copyright (c) 2004 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 MMC/SDIO register definitions -*/ - -#ifndef __ASM_ARM_REGS_SDI -#define __ASM_ARM_REGS_SDI "regs-sdi.h" - -#define S3C2410_SDICON (0x00) -#define S3C2410_SDIPRE (0x04) -#define S3C2410_SDICMDARG (0x08) -#define S3C2410_SDICMDCON (0x0C) -#define S3C2410_SDICMDSTAT (0x10) -#define S3C2410_SDIRSP0 (0x14) -#define S3C2410_SDIRSP1 (0x18) -#define S3C2410_SDIRSP2 (0x1C) -#define S3C2410_SDIRSP3 (0x20) -#define S3C2410_SDITIMER (0x24) -#define S3C2410_SDIBSIZE (0x28) -#define S3C2410_SDIDCON (0x2C) -#define S3C2410_SDIDCNT (0x30) -#define S3C2410_SDIDSTA (0x34) -#define S3C2410_SDIFSTA (0x38) - -#define S3C2410_SDIDATA (0x3C) -#define S3C2410_SDIIMSK (0x40) - -#define S3C2440_SDIDATA (0x40) -#define S3C2440_SDIIMSK (0x3C) - -#define S3C2440_SDICON_SDRESET (1<<8) -#define S3C2440_SDICON_MMCCLOCK (1<<5) -#define S3C2410_SDICON_BYTEORDER (1<<4) -#define S3C2410_SDICON_SDIOIRQ (1<<3) -#define S3C2410_SDICON_RWAITEN (1<<2) -#define S3C2410_SDICON_FIFORESET (1<<1) -#define S3C2410_SDICON_CLOCKTYPE (1<<0) - -#define S3C2410_SDICMDCON_ABORT (1<<12) -#define S3C2410_SDICMDCON_WITHDATA (1<<11) -#define S3C2410_SDICMDCON_LONGRSP (1<<10) -#define S3C2410_SDICMDCON_WAITRSP (1<<9) -#define S3C2410_SDICMDCON_CMDSTART (1<<8) -#define S3C2410_SDICMDCON_SENDERHOST (1<<6) -#define S3C2410_SDICMDCON_INDEX (0x3f) - -#define S3C2410_SDICMDSTAT_CRCFAIL (1<<12) -#define S3C2410_SDICMDSTAT_CMDSENT (1<<11) -#define S3C2410_SDICMDSTAT_CMDTIMEOUT (1<<10) -#define S3C2410_SDICMDSTAT_RSPFIN (1<<9) -#define S3C2410_SDICMDSTAT_XFERING (1<<8) -#define S3C2410_SDICMDSTAT_INDEX (0xff) - -#define S3C2440_SDIDCON_DS_BYTE (0<<22) -#define S3C2440_SDIDCON_DS_HALFWORD (1<<22) -#define S3C2440_SDIDCON_DS_WORD (2<<22) -#define S3C2410_SDIDCON_IRQPERIOD (1<<21) -#define S3C2410_SDIDCON_TXAFTERRESP (1<<20) -#define S3C2410_SDIDCON_RXAFTERCMD (1<<19) -#define S3C2410_SDIDCON_BUSYAFTERCMD (1<<18) -#define S3C2410_SDIDCON_BLOCKMODE (1<<17) -#define S3C2410_SDIDCON_WIDEBUS (1<<16) -#define S3C2410_SDIDCON_DMAEN (1<<15) -#define S3C2410_SDIDCON_STOP (1<<14) -#define S3C2440_SDIDCON_DATSTART (1<<14) -#define S3C2410_SDIDCON_DATMODE (3<<12) -#define S3C2410_SDIDCON_BLKNUM (0x7ff) - -/* constants for S3C2410_SDIDCON_DATMODE */ -#define S3C2410_SDIDCON_XFER_READY (0<<12) -#define S3C2410_SDIDCON_XFER_CHKSTART (1<<12) -#define S3C2410_SDIDCON_XFER_RXSTART (2<<12) -#define S3C2410_SDIDCON_XFER_TXSTART (3<<12) - -#define S3C2410_SDIDCON_BLKNUM_MASK (0xFFF) -#define S3C2410_SDIDCNT_BLKNUM_SHIFT (12) - -#define S3C2410_SDIDSTA_RDYWAITREQ (1<<10) -#define S3C2410_SDIDSTA_SDIOIRQDETECT (1<<9) -#define S3C2410_SDIDSTA_FIFOFAIL (1<<8) /* reserved on 2440 */ -#define S3C2410_SDIDSTA_CRCFAIL (1<<7) -#define S3C2410_SDIDSTA_RXCRCFAIL (1<<6) -#define S3C2410_SDIDSTA_DATATIMEOUT (1<<5) -#define S3C2410_SDIDSTA_XFERFINISH (1<<4) -#define S3C2410_SDIDSTA_BUSYFINISH (1<<3) -#define S3C2410_SDIDSTA_SBITERR (1<<2) /* reserved on 2410a/2440 */ -#define S3C2410_SDIDSTA_TXDATAON (1<<1) -#define S3C2410_SDIDSTA_RXDATAON (1<<0) - -#define S3C2440_SDIFSTA_FIFORESET (1<<16) -#define S3C2440_SDIFSTA_FIFOFAIL (3<<14) /* 3 is correct (2 bits) */ -#define S3C2410_SDIFSTA_TFDET (1<<13) -#define S3C2410_SDIFSTA_RFDET (1<<12) -#define S3C2410_SDIFSTA_TFHALF (1<<11) -#define S3C2410_SDIFSTA_TFEMPTY (1<<10) -#define S3C2410_SDIFSTA_RFLAST (1<<9) -#define S3C2410_SDIFSTA_RFFULL (1<<8) -#define S3C2410_SDIFSTA_RFHALF (1<<7) -#define S3C2410_SDIFSTA_COUNTMASK (0x7f) - -#define S3C2410_SDIIMSK_RESPONSECRC (1<<17) -#define S3C2410_SDIIMSK_CMDSENT (1<<16) -#define S3C2410_SDIIMSK_CMDTIMEOUT (1<<15) -#define S3C2410_SDIIMSK_RESPONSEND (1<<14) -#define S3C2410_SDIIMSK_READWAIT (1<<13) -#define S3C2410_SDIIMSK_SDIOIRQ (1<<12) -#define S3C2410_SDIIMSK_FIFOFAIL (1<<11) -#define S3C2410_SDIIMSK_CRCSTATUS (1<<10) -#define S3C2410_SDIIMSK_DATACRC (1<<9) -#define S3C2410_SDIIMSK_DATATIMEOUT (1<<8) -#define S3C2410_SDIIMSK_DATAFINISH (1<<7) -#define S3C2410_SDIIMSK_BUSYFINISH (1<<6) -#define S3C2410_SDIIMSK_SBITERR (1<<5) /* reserved 2440/2410a */ -#define S3C2410_SDIIMSK_TXFIFOHALF (1<<4) -#define S3C2410_SDIIMSK_TXFIFOEMPTY (1<<3) -#define S3C2410_SDIIMSK_RXFIFOLAST (1<<2) -#define S3C2410_SDIIMSK_RXFIFOFULL (1<<1) -#define S3C2410_SDIIMSK_RXFIFOHALF (1<<0) - -#endif /* __ASM_ARM_REGS_SDI */ diff --git a/include/asm-arm/arch-s3c2410/reset.h b/include/asm-arm/arch-s3c2410/reset.h deleted file mode 100644 index 4f866cd..0000000 --- a/include/asm-arm/arch-s3c2410/reset.h +++ /dev/null @@ -1,22 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/reset.h - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 CPU reset controls -*/ - -#ifndef __ASM_ARCH_RESET_H -#define __ASM_ARCH_RESET_H __FILE__ - -/* This allows the over-ride of the default reset code -*/ - -extern void (*s3c24xx_reset_hook)(void); - -#endif /* __ASM_ARCH_RESET_H */ diff --git a/include/asm-arm/arch-s3c2410/spi-gpio.h b/include/asm-arm/arch-s3c2410/spi-gpio.h deleted file mode 100644 index 7380373..0000000 --- a/include/asm-arm/arch-s3c2410/spi-gpio.h +++ /dev/null @@ -1,27 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/spi-gpio.h - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks - * - * S3C2410 - SPI Controller platfrom_device info - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SPIGPIO_H -#define __ASM_ARCH_SPIGPIO_H __FILE__ - -struct s3c2410_spigpio_info { - unsigned long pin_clk; - unsigned long pin_mosi; - unsigned long pin_miso; - - int bus_num; - - void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs); -}; - - -#endif /* __ASM_ARCH_SPIGPIO_H */ diff --git a/include/asm-arm/arch-s3c2410/spi.h b/include/asm-arm/arch-s3c2410/spi.h deleted file mode 100644 index 4421698..0000000 --- a/include/asm-arm/arch-s3c2410/spi.h +++ /dev/null @@ -1,25 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/spi.h - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks - * - * S3C2410 - SPI Controller platform_device info - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_SPI_H -#define __ASM_ARCH_SPI_H __FILE__ - -struct s3c2410_spi_info { - unsigned long pin_cs; /* simple gpio cs */ - unsigned int num_cs; /* total chipselects */ - int bus_num; /* bus number to use. */ - - void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); -}; - - -#endif /* __ASM_ARCH_SPI_H */ diff --git a/include/asm-arm/arch-s3c2410/system-reset.h b/include/asm-arm/arch-s3c2410/system-reset.h deleted file mode 100644 index beeec77..0000000 --- a/include/asm-arm/arch-s3c2410/system-reset.h +++ /dev/null @@ -1,64 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/system-reset.h - * - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks - * - * S3C2410 - System define for arch_reset() function - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include - -#include -#include - -#include -#include - -extern void (*s3c24xx_reset_hook)(void); - -static void -arch_reset(char mode) -{ - struct clk *wdtclk; - - if (mode == 's') { - cpu_reset(0); - } - - if (s3c24xx_reset_hook) - s3c24xx_reset_hook(); - - printk("arch_reset: attempting watchdog reset\n"); - - __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ - - wdtclk = clk_get(NULL, "watchdog"); - if (!IS_ERR(wdtclk)) { - clk_enable(wdtclk); - } else - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); - - /* put initial values into count and data */ - __raw_writel(0x80, S3C2410_WTCNT); - __raw_writel(0x80, S3C2410_WTDAT); - - /* set the watchdog to go and reset... */ - __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN | - S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON); - - /* wait for reset to assert... */ - mdelay(500); - - printk(KERN_ERR "Watchdog reset failed to assert reset\n"); - - /* delay to allow the serial port to show the message */ - mdelay(50); - - /* we'll take a jump through zero as a poor second */ - cpu_reset(0); -} diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h deleted file mode 100644 index 98f690e..0000000 --- a/include/asm-arm/arch-s3c2410/system.h +++ /dev/null @@ -1,58 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/system.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * S3C2410 - System function defines and includes - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include - -#include -#include -#include - -#include - -void (*s3c24xx_idle)(void); -void (*s3c24xx_reset_hook)(void); - -void s3c24xx_default_idle(void) -{ - unsigned long tmp; - int i; - - /* idle the system by using the idle mode which will wait for an - * interrupt to happen before restarting the system. - */ - - /* Warning: going into idle state upsets jtag scanning */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); - - /* the samsung port seems to do a loop and then unset idle.. */ - for (i = 0; i < 50; i++) { - tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ - } - - /* this bit is not cleared on re-start... */ - - __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, - S3C2410_CLKCON); -} - -static void arch_idle(void) -{ - if (s3c24xx_idle != NULL) - (s3c24xx_idle)(); - else - s3c24xx_default_idle(); -} - -#include diff --git a/include/asm-arm/arch-s3c2410/timex.h b/include/asm-arm/arch-s3c2410/timex.h deleted file mode 100644 index c16a99c..0000000 --- a/include/asm-arm/arch-s3c2410/timex.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/timex.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * S3C2410 - time parameters - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_TIMEX_H -#define __ASM_ARCH_TIMEX_H - -/* CLOCK_TICK_RATE needs to be evaluatable by the cpp, so making it - * a variable is useless. It seems as long as we make our timers an - * exact multiple of HZ, any value that makes a 1->1 correspondence - * for the time conversion functions to/from jiffies is acceptable. -*/ - - -#define CLOCK_TICK_RATE 12000000 - - -#endif /* __ASM_ARCH_TIMEX_H */ diff --git a/include/asm-arm/arch-s3c2410/uncompress.h b/include/asm-arm/arch-s3c2410/uncompress.h deleted file mode 100644 index 48a5731..0000000 --- a/include/asm-arm/arch-s3c2410/uncompress.h +++ /dev/null @@ -1,52 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/uncompress.h - * - * Copyright (c) 2003, 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C2410 - uncompress code - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_UNCOMPRESS_H -#define __ASM_ARCH_UNCOMPRESS_H - -#include -#include - -/* working in physical space... */ -#undef S3C2410_GPIOREG -#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) - -#include - -static inline int is_arm926(void) -{ - unsigned int cpuid; - - asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (cpuid)); - - return ((cpuid & 0xff0) == 0x260); -} - -static void arch_detect_cpu(void) -{ - unsigned int cpuid; - - cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1); - cpuid &= S3C2410_GSTATUS1_IDMASK; - - if (is_arm926() || cpuid == S3C2410_GSTATUS1_2440 || - cpuid == S3C2410_GSTATUS1_2442) { - fifo_mask = S3C2440_UFSTAT_TXMASK; - fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; - } else { - fifo_mask = S3C2410_UFSTAT_TXMASK; - fifo_max = 15 << S3C2410_UFSTAT_TXSHIFT; - } -} - -#endif /* __ASM_ARCH_UNCOMPRESS_H */ diff --git a/include/asm-arm/arch-s3c2410/usb-control.h b/include/asm-arm/arch-s3c2410/usb-control.h deleted file mode 100644 index 5bfa376..0000000 --- a/include/asm-arm/arch-s3c2410/usb-control.h +++ /dev/null @@ -1,41 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/usb-control.h - * - * Copyright (c) 2004 Simtec Electronics - * Ben Dooks - * - * S3C2410 - usb port information - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_USBCONTROL_H -#define __ASM_ARCH_USBCONTROL_H "include/asm-arm/arch-s3c2410/usb-control.h" - -#define S3C_HCDFLG_USED (1) - -struct s3c2410_hcd_port { - unsigned char flags; - unsigned char power; - unsigned char oc_status; - unsigned char oc_changed; -}; - -struct s3c2410_hcd_info { - struct usb_hcd *hcd; - struct s3c2410_hcd_port port[2]; - - void (*power_control)(int port, int to); - void (*enable_oc)(struct s3c2410_hcd_info *, int on); - void (*report_oc)(struct s3c2410_hcd_info *, int ports); -}; - -static void inline s3c2410_usb_report_oc(struct s3c2410_hcd_info *info, int ports) -{ - if (info->report_oc != NULL) { - (info->report_oc)(info, ports); - } -} - -#endif /*__ASM_ARCH_USBCONTROL_H */ diff --git a/include/asm-arm/arch-s3c2410/vmalloc.h b/include/asm-arm/arch-s3c2410/vmalloc.h deleted file mode 100644 index 0ae3bdb..0000000 --- a/include/asm-arm/arch-s3c2410/vmalloc.h +++ /dev/null @@ -1,20 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/vmalloc.h - * - * from linux/include/asm-arm/arch-iop3xx/vmalloc.h - * - * Copyright (c) 2003 Simtec Electronics - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2410 vmalloc definition -*/ - -#ifndef __ASM_ARCH_VMALLOC_H -#define __ASM_ARCH_VMALLOC_H - -#define VMALLOC_END (0xE0000000) - -#endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/include/asm-arm/arch-s3c2410/vr1000-cpld.h b/include/asm-arm/arch-s3c2410/vr1000-cpld.h deleted file mode 100644 index 0557b0a..0000000 --- a/include/asm-arm/arch-s3c2410/vr1000-cpld.h +++ /dev/null @@ -1,18 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/vr1000-cpld.h - * - * Copyright (c) 2003 Simtec Electronics - * Ben Dooks - * - * VR1000 - CPLD control constants - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_VR1000CPLD_H -#define __ASM_ARCH_VR1000CPLD_H - -#define VR1000_CPLD_CTRL2_RAMWEN (0x04) /* SRAM Write Enable */ - -#endif /* __ASM_ARCH_VR1000CPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/vr1000-irq.h b/include/asm-arm/arch-s3c2410/vr1000-irq.h deleted file mode 100644 index 8909370..0000000 --- a/include/asm-arm/arch-s3c2410/vr1000-irq.h +++ /dev/null @@ -1,26 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/vr1000-irq.h - * - * Copyright (c) 2003,2004 Simtec Electronics - * Ben Dooks - * - * Machine VR1000 - IRQ Number definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_VR1000IRQ_H -#define __ASM_ARCH_VR1000IRQ_H - -/* irq numbers to onboard peripherals */ - -#define IRQ_USBOC IRQ_EINT19 -#define IRQ_IDE0 IRQ_EINT16 -#define IRQ_IDE1 IRQ_EINT17 -#define IRQ_VR1000_SERIAL IRQ_EINT12 -#define IRQ_VR1000_DM9000A IRQ_EINT10 -#define IRQ_VR1000_DM9000N IRQ_EINT9 -#define IRQ_SMALERT IRQ_EINT8 - -#endif /* __ASM_ARCH_VR1000IRQ_H */ diff --git a/include/asm-arm/arch-s3c2410/vr1000-map.h b/include/asm-arm/arch-s3c2410/vr1000-map.h deleted file mode 100644 index 92a56a7..0000000 --- a/include/asm-arm/arch-s3c2410/vr1000-map.h +++ /dev/null @@ -1,110 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/vr1000-map.h - * - * Copyright (c) 2003-2005 Simtec Electronics - * Ben Dooks - * - * Machine VR1000 - Memory map definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -/* needs arch/map.h including with this */ - -/* ok, we've used up to 0x13000000, now we need to find space for the - * peripherals that live in the nGCS[x] areas, which are quite numerous - * in their space. We also have the board's CPLD to find register space - * for. - */ - -#ifndef __ASM_ARCH_VR1000MAP_H -#define __ASM_ARCH_VR1000MAP_H - -#include - -#define VR1000_IOADDR(x) BAST_IOADDR(x) - -/* we put the CPLD registers next, to get them out of the way */ - -#define VR1000_VA_CTRL1 VR1000_IOADDR(0x00000000) /* 0x01300000 */ -#define VR1000_PA_CTRL1 (S3C2410_CS5 | 0x7800000) - -#define VR1000_VA_CTRL2 VR1000_IOADDR(0x00100000) /* 0x01400000 */ -#define VR1000_PA_CTRL2 (S3C2410_CS1 | 0x6000000) - -#define VR1000_VA_CTRL3 VR1000_IOADDR(0x00200000) /* 0x01500000 */ -#define VR1000_PA_CTRL3 (S3C2410_CS1 | 0x6800000) - -#define VR1000_VA_CTRL4 VR1000_IOADDR(0x00300000) /* 0x01600000 */ -#define VR1000_PA_CTRL4 (S3C2410_CS1 | 0x7000000) - -/* next, we have the PC104 ISA interrupt registers */ - -#define VR1000_PA_PC104_IRQREQ (S3C2410_CS5 | 0x6000000) /* 0x01700000 */ -#define VR1000_VA_PC104_IRQREQ VR1000_IOADDR(0x00400000) - -#define VR1000_PA_PC104_IRQRAW (S3C2410_CS5 | 0x6800000) /* 0x01800000 */ -#define VR1000_VA_PC104_IRQRAW VR1000_IOADDR(0x00500000) - -#define VR1000_PA_PC104_IRQMASK (S3C2410_CS5 | 0x7000000) /* 0x01900000 */ -#define VR1000_VA_PC104_IRQMASK VR1000_IOADDR(0x00600000) - -/* 0xE0000000 contains the IO space that is split by speed and - * wether the access is for 8 or 16bit IO... this ensures that - * the correct access is made - * - * 0x10000000 of space, partitioned as so: - * - * 0x00000000 to 0x04000000 8bit, slow - * 0x04000000 to 0x08000000 16bit, slow - * 0x08000000 to 0x0C000000 16bit, net - * 0x0C000000 to 0x10000000 16bit, fast - * - * each of these spaces has the following in: - * - * 0x02000000 to 0x02100000 1MB IDE primary channel - * 0x02100000 to 0x02200000 1MB IDE primary channel aux - * 0x02200000 to 0x02400000 1MB IDE secondary channel - * 0x02300000 to 0x02400000 1MB IDE secondary channel aux - * 0x02500000 to 0x02600000 1MB Davicom DM9000 ethernet controllers - * 0x02600000 to 0x02700000 1MB - * - * the phyiscal layout of the zones are: - * nGCS2 - 8bit, slow - * nGCS3 - 16bit, slow - * nGCS4 - 16bit, net - * nGCS5 - 16bit, fast - */ - -#define VR1000_VA_MULTISPACE (0xE0000000) - -#define VR1000_VA_ISAIO (VR1000_VA_MULTISPACE + 0x00000000) -#define VR1000_VA_ISAMEM (VR1000_VA_MULTISPACE + 0x01000000) -#define VR1000_VA_IDEPRI (VR1000_VA_MULTISPACE + 0x02000000) -#define VR1000_VA_IDEPRIAUX (VR1000_VA_MULTISPACE + 0x02100000) -#define VR1000_VA_IDESEC (VR1000_VA_MULTISPACE + 0x02200000) -#define VR1000_VA_IDESECAUX (VR1000_VA_MULTISPACE + 0x02300000) -#define VR1000_VA_ASIXNET (VR1000_VA_MULTISPACE + 0x02400000) -#define VR1000_VA_DM9000 (VR1000_VA_MULTISPACE + 0x02500000) -#define VR1000_VA_SUPERIO (VR1000_VA_MULTISPACE + 0x02600000) - -/* physical offset addresses for the peripherals */ - -#define VR1000_PA_IDEPRI (0x02000000) -#define VR1000_PA_IDEPRIAUX (0x02800000) -#define VR1000_PA_IDESEC (0x03000000) -#define VR1000_PA_IDESECAUX (0x03800000) -#define VR1000_PA_DM9000 (0x05000000) - -#define VR1000_PA_SERIAL (0x11800000) -#define VR1000_VA_SERIAL (VR1000_IOADDR(0x00700000)) - -/* VR1000 ram is in CS1, with A26..A24 = 2_101 */ -#define VR1000_PA_SRAM (S3C2410_CS1 | 0x05000000) - -/* some configurations for the peripherals */ - -#define VR1000_DM9000_CS VR1000_VAM_CS4 - -#endif /* __ASM_ARCH_VR1000MAP_H */ diff --git a/include/asm-arm/arch-sa1100/SA-1100.h b/include/asm-arm/arch-sa1100/SA-1100.h deleted file mode 100644 index 62aaf04..0000000 --- a/include/asm-arm/arch-sa1100/SA-1100.h +++ /dev/null @@ -1,2072 +0,0 @@ -/* - * FILE SA-1100.h - * - * Version 1.2 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date January 1998 (April 1997) - * System StrongARM SA-1100 - * Language C or ARM Assembly - * Purpose Definition of constants related to the StrongARM - * SA-1100 microprocessor (Advanced RISC Machine (ARM) - * architecture version 4). This file is based on the - * StrongARM SA-1100 data sheet version 2.2. - * - */ - - -/* Be sure that virtual mapping is defined right */ -#ifndef __ASM_ARCH_HARDWARE_H -#error You must include hardware.h not SA-1100.h -#endif - -#include "bitfield.h" - -/* - * SA1100 CS line to physical address - */ - -#define SA1100_CS0_PHYS 0x00000000 -#define SA1100_CS1_PHYS 0x08000000 -#define SA1100_CS2_PHYS 0x10000000 -#define SA1100_CS3_PHYS 0x18000000 -#define SA1100_CS4_PHYS 0x40000000 -#define SA1100_CS5_PHYS 0x48000000 - -/* - * Personal Computer Memory Card International Association (PCMCIA) sockets - */ - -#define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */ -#define PCMCIASp (4*PCMCIAPrtSp) /* PCMCIA Space [byte] */ -#define PCMCIAIOSp PCMCIAPrtSp /* PCMCIA I/O Space [byte] */ -#define PCMCIAAttrSp PCMCIAPrtSp /* PCMCIA Attribute Space [byte] */ -#define PCMCIAMemSp PCMCIAPrtSp /* PCMCIA Memory Space [byte] */ - -#define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */ -#define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */ -#define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */ -#define PCMCIA0MemSp PCMCIAMemSp /* PCMCIA 0 Memory Space [byte] */ - -#define PCMCIA1Sp PCMCIASp /* PCMCIA 1 Space [byte] */ -#define PCMCIA1IOSp PCMCIAIOSp /* PCMCIA 1 I/O Space [byte] */ -#define PCMCIA1AttrSp PCMCIAAttrSp /* PCMCIA 1 Attribute Space [byte] */ -#define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ - -#define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) -#define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ -#define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) -#define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) - -#define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ -#define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ -#define _PCMCIA0Attr _PCMCIAAttr (0) /* PCMCIA 0 Attribute */ -#define _PCMCIA0Mem _PCMCIAMem (0) /* PCMCIA 0 Memory */ - -#define _PCMCIA1 _PCMCIA (1) /* PCMCIA 1 */ -#define _PCMCIA1IO _PCMCIAIO (1) /* PCMCIA 1 I/O */ -#define _PCMCIA1Attr _PCMCIAAttr (1) /* PCMCIA 1 Attribute */ -#define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ - - -/* - * Universal Serial Bus (USB) Device Controller (UDC) control registers - * - * Registers - * Ser0UDCCR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control Register (read/write). - * Ser0UDCAR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Address Register (read/write). - * Ser0UDCOMP Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Output Maximum Packet size register - * (read/write). - * Ser0UDCIMP Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Input Maximum Packet size register - * (read/write). - * Ser0UDCCS0 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 0 - * (read/write). - * Ser0UDCCS1 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 1 - * (output, read/write). - * Ser0UDCCS2 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Control/Status register end-point 2 - * (input, read/write). - * Ser0UDCD0 Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Data register end-point 0 - * (read/write). - * Ser0UDCWC Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Write Count register end-point 0 - * (read). - * Ser0UDCDR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Data Register (read/write). - * Ser0UDCSR Serial port 0 Universal Serial Bus (USB) Device - * Controller (UDC) Status Register (read/write). - */ - -#define Ser0UDCCR __REG(0x80000000) /* Ser. port 0 UDC Control Reg. */ -#define Ser0UDCAR __REG(0x80000004) /* Ser. port 0 UDC Address Reg. */ -#define Ser0UDCOMP __REG(0x80000008) /* Ser. port 0 UDC Output Maximum Packet size reg. */ -#define Ser0UDCIMP __REG(0x8000000C) /* Ser. port 0 UDC Input Maximum Packet size reg. */ -#define Ser0UDCCS0 __REG(0x80000010) /* Ser. port 0 UDC Control/Status reg. end-point 0 */ -#define Ser0UDCCS1 __REG(0x80000014) /* Ser. port 0 UDC Control/Status reg. end-point 1 (output) */ -#define Ser0UDCCS2 __REG(0x80000018) /* Ser. port 0 UDC Control/Status reg. end-point 2 (input) */ -#define Ser0UDCD0 __REG(0x8000001C) /* Ser. port 0 UDC Data reg. end-point 0 */ -#define Ser0UDCWC __REG(0x80000020) /* Ser. port 0 UDC Write Count reg. end-point 0 */ -#define Ser0UDCDR __REG(0x80000028) /* Ser. port 0 UDC Data Reg. */ -#define Ser0UDCSR __REG(0x80000030) /* Ser. port 0 UDC Status Reg. */ - -#define UDCCR_UDD 0x00000001 /* UDC Disable */ -#define UDCCR_UDA 0x00000002 /* UDC Active (read) */ -#define UDCCR_RESIM 0x00000004 /* Resume Interrupt Mask, per errata */ -#define UDCCR_EIM 0x00000008 /* End-point 0 Interrupt Mask */ - /* (disable) */ -#define UDCCR_RIM 0x00000010 /* Receive Interrupt Mask */ - /* (disable) */ -#define UDCCR_TIM 0x00000020 /* Transmit Interrupt Mask */ - /* (disable) */ -#define UDCCR_SRM 0x00000040 /* Suspend/Resume interrupt Mask */ - /* (disable) */ -#define UDCCR_SUSIM UDCCR_SRM /* Per errata, SRM just masks suspend */ -#define UDCCR_REM 0x00000080 /* REset interrupt Mask (disable) */ - -#define UDCAR_ADD Fld (7, 0) /* function ADDress */ - -#define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */ - /* [byte] */ -#define UDCOMP_OutMaxPkt(Size) /* Output Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCOMP_OUTMAXP)) - -#define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */ - /* [byte] */ -#define UDCIMP_InMaxPkt(Size) /* Input Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCIMP_INMAXP)) - -#define UDCCS0_OPR 0x00000001 /* Output Packet Ready (read) */ -#define UDCCS0_IPR 0x00000002 /* Input Packet Ready */ -#define UDCCS0_SST 0x00000004 /* Sent STall */ -#define UDCCS0_FST 0x00000008 /* Force STall */ -#define UDCCS0_DE 0x00000010 /* Data End */ -#define UDCCS0_SE 0x00000020 /* Setup End (read) */ -#define UDCCS0_SO 0x00000040 /* Serviced Output packet ready */ - /* (write) */ -#define UDCCS0_SSE 0x00000080 /* Serviced Setup End (write) */ - -#define UDCCS1_RFS 0x00000001 /* Receive FIFO 12-bytes or more */ - /* Service request (read) */ -#define UDCCS1_RPC 0x00000002 /* Receive Packet Complete */ -#define UDCCS1_RPE 0x00000004 /* Receive Packet Error (read) */ -#define UDCCS1_SST 0x00000008 /* Sent STall */ -#define UDCCS1_FST 0x00000010 /* Force STall */ -#define UDCCS1_RNE 0x00000020 /* Receive FIFO Not Empty (read) */ - -#define UDCCS2_TFS 0x00000001 /* Transmit FIFO 8-bytes or less */ - /* Service request (read) */ -#define UDCCS2_TPC 0x00000002 /* Transmit Packet Complete */ -#define UDCCS2_TPE 0x00000004 /* Transmit Packet Error (read) */ -#define UDCCS2_TUR 0x00000008 /* Transmit FIFO Under-Run */ -#define UDCCS2_SST 0x00000010 /* Sent STall */ -#define UDCCS2_FST 0x00000020 /* Force STall */ - -#define UDCD0_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ - -#define UDCWC_WC Fld (4, 0) /* Write Count */ - -#define UDCDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ - -#define UDCSR_EIR 0x00000001 /* End-point 0 Interrupt Request */ -#define UDCSR_RIR 0x00000002 /* Receive Interrupt Request */ -#define UDCSR_TIR 0x00000004 /* Transmit Interrupt Request */ -#define UDCSR_SUSIR 0x00000008 /* SUSpend Interrupt Request */ -#define UDCSR_RESIR 0x00000010 /* RESume Interrupt Request */ -#define UDCSR_RSTIR 0x00000020 /* ReSeT Interrupt Request */ - - -/* - * Universal Asynchronous Receiver/Transmitter (UART) control registers - * - * Registers - * Ser1UTCR0 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser1UTCR1 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser1UTCR2 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser1UTCR3 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser1UTDR Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser1UTSR0 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser1UTSR1 Serial port 1 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Ser2UTCR0 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser2UTCR1 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser2UTCR2 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser2UTCR3 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser2UTCR4 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 4 - * (read/write). - * Ser2UTDR Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser2UTSR0 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser2UTSR1 Serial port 2 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Ser3UTCR0 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 0 - * (read/write). - * Ser3UTCR1 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 1 - * (read/write). - * Ser3UTCR2 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 2 - * (read/write). - * Ser3UTCR3 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Control Register 3 - * (read/write). - * Ser3UTDR Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Data Register - * (read/write). - * Ser3UTSR0 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 0 - * (read/write). - * Ser3UTSR1 Serial port 3 Universal Asynchronous - * Receiver/Transmitter (UART) Status Register 1 (read). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fua, Tua Frequency, period of the UART communication. - */ - -#define _UTCR0(Nb) __REG(0x80010000 + ((Nb) - 1)*0x00020000) /* UART Control Reg. 0 [1..3] */ -#define _UTCR1(Nb) __REG(0x80010004 + ((Nb) - 1)*0x00020000) /* UART Control Reg. 1 [1..3] */ -#define _UTCR2(Nb) __REG(0x80010008 + ((Nb) - 1)*0x00020000) /* UART Control Reg. 2 [1..3] */ -#define _UTCR3(Nb) __REG(0x8001000C + ((Nb) - 1)*0x00020000) /* UART Control Reg. 3 [1..3] */ -#define _UTCR4(Nb) __REG(0x80010010 + ((Nb) - 1)*0x00020000) /* UART Control Reg. 4 [2] */ -#define _UTDR(Nb) __REG(0x80010014 + ((Nb) - 1)*0x00020000) /* UART Data Reg. [1..3] */ -#define _UTSR0(Nb) __REG(0x8001001C + ((Nb) - 1)*0x00020000) /* UART Status Reg. 0 [1..3] */ -#define _UTSR1(Nb) __REG(0x80010020 + ((Nb) - 1)*0x00020000) /* UART Status Reg. 1 [1..3] */ - -#define Ser1UTCR0 _UTCR0 (1) /* Ser. port 1 UART Control Reg. 0 */ -#define Ser1UTCR1 _UTCR1 (1) /* Ser. port 1 UART Control Reg. 1 */ -#define Ser1UTCR2 _UTCR2 (1) /* Ser. port 1 UART Control Reg. 2 */ -#define Ser1UTCR3 _UTCR3 (1) /* Ser. port 1 UART Control Reg. 3 */ -#define Ser1UTDR _UTDR (1) /* Ser. port 1 UART Data Reg. */ -#define Ser1UTSR0 _UTSR0 (1) /* Ser. port 1 UART Status Reg. 0 */ -#define Ser1UTSR1 _UTSR1 (1) /* Ser. port 1 UART Status Reg. 1 */ - -#define Ser2UTCR0 _UTCR0 (2) /* Ser. port 2 UART Control Reg. 0 */ -#define Ser2UTCR1 _UTCR1 (2) /* Ser. port 2 UART Control Reg. 1 */ -#define Ser2UTCR2 _UTCR2 (2) /* Ser. port 2 UART Control Reg. 2 */ -#define Ser2UTCR3 _UTCR3 (2) /* Ser. port 2 UART Control Reg. 3 */ -#define Ser2UTCR4 _UTCR4 (2) /* Ser. port 2 UART Control Reg. 4 */ -#define Ser2UTDR _UTDR (2) /* Ser. port 2 UART Data Reg. */ -#define Ser2UTSR0 _UTSR0 (2) /* Ser. port 2 UART Status Reg. 0 */ -#define Ser2UTSR1 _UTSR1 (2) /* Ser. port 2 UART Status Reg. 1 */ - -#define Ser3UTCR0 _UTCR0 (3) /* Ser. port 3 UART Control Reg. 0 */ -#define Ser3UTCR1 _UTCR1 (3) /* Ser. port 3 UART Control Reg. 1 */ -#define Ser3UTCR2 _UTCR2 (3) /* Ser. port 3 UART Control Reg. 2 */ -#define Ser3UTCR3 _UTCR3 (3) /* Ser. port 3 UART Control Reg. 3 */ -#define Ser3UTDR _UTDR (3) /* Ser. port 3 UART Data Reg. */ -#define Ser3UTSR0 _UTSR0 (3) /* Ser. port 3 UART Status Reg. 0 */ -#define Ser3UTSR1 _UTSR1 (3) /* Ser. port 3 UART Status Reg. 1 */ - -/* Those are still used in some places */ -#define _Ser1UTCR0 __PREG(Ser1UTCR0) -#define _Ser2UTCR0 __PREG(Ser2UTCR0) -#define _Ser3UTCR0 __PREG(Ser3UTCR0) - -/* Register offsets */ -#define UTCR0 0x00 -#define UTCR1 0x04 -#define UTCR2 0x08 -#define UTCR3 0x0c -#define UTDR 0x14 -#define UTSR0 0x1c -#define UTSR1 0x20 - -#define UTCR0_PE 0x00000001 /* Parity Enable */ -#define UTCR0_OES 0x00000002 /* Odd/Even parity Select */ -#define UTCR0_OddPar (UTCR0_OES*0) /* Odd Parity */ -#define UTCR0_EvenPar (UTCR0_OES*1) /* Even Parity */ -#define UTCR0_SBS 0x00000004 /* Stop Bit Select */ -#define UTCR0_1StpBit (UTCR0_SBS*0) /* 1 Stop Bit per frame */ -#define UTCR0_2StpBit (UTCR0_SBS*1) /* 2 Stop Bits per frame */ -#define UTCR0_DSS 0x00000008 /* Data Size Select */ -#define UTCR0_7BitData (UTCR0_DSS*0) /* 7-Bit Data */ -#define UTCR0_8BitData (UTCR0_DSS*1) /* 8-Bit Data */ -#define UTCR0_SCE 0x00000010 /* Sample Clock Enable */ - /* (ser. port 1: GPIO [18], */ - /* ser. port 3: GPIO [20]) */ -#define UTCR0_RCE 0x00000020 /* Receive Clock Edge select */ -#define UTCR0_RcRsEdg (UTCR0_RCE*0) /* Receive clock Rising-Edge */ -#define UTCR0_RcFlEdg (UTCR0_RCE*1) /* Receive clock Falling-Edge */ -#define UTCR0_TCE 0x00000040 /* Transmit Clock Edge select */ -#define UTCR0_TrRsEdg (UTCR0_TCE*0) /* Transmit clock Rising-Edge */ -#define UTCR0_TrFlEdg (UTCR0_TCE*1) /* Transmit clock Falling-Edge */ -#define UTCR0_Ser2IrDA /* Ser. port 2 IrDA settings */ \ - (UTCR0_1StpBit + UTCR0_8BitData) - -#define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ -#define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fua = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tua = 16*(BRD [11:0] + 1)*Txtl */ -#define UTCR1_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) -#define UTCR2_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Floor (Div/16)) */ - /* Tua = 16*Floor (Div/16)*Txtl */ -#define UTCR1_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) -#define UTCR2_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Ceil (Div/16)) */ - /* Tua = 16*Ceil (Div/16)*Txtl */ - -#define UTCR3_RXE 0x00000001 /* Receive Enable */ -#define UTCR3_TXE 0x00000002 /* Transmit Enable */ -#define UTCR3_BRK 0x00000004 /* BReaK mode */ -#define UTCR3_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ -#define UTCR3_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define UTCR3_LBM 0x00000020 /* Look-Back Mode */ -#define UTCR3_Ser2IrDA /* Ser. port 2 IrDA settings (RIE, */ \ - /* TIE, LBM can be set or cleared) */ \ - (UTCR3_RXE + UTCR3_TXE) - -#define UTCR4_HSE 0x00000001 /* Hewlett-Packard Serial InfraRed */ - /* (HP-SIR) modulation Enable */ -#define UTCR4_NRZ (UTCR4_HSE*0) /* Non-Return to Zero modulation */ -#define UTCR4_HPSIR (UTCR4_HSE*1) /* HP-SIR modulation */ -#define UTCR4_LPM 0x00000002 /* Low-Power Mode */ -#define UTCR4_Z3_16Bit (UTCR4_LPM*0) /* Zero pulse = 3/16 Bit time */ -#define UTCR4_Z1_6us (UTCR4_LPM*1) /* Zero pulse = 1.6 us */ - -#define UTDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define UTDR_PRE 0x00000100 /* receive PaRity Error (read) */ -#define UTDR_FRE 0x00000200 /* receive FRaming Error (read) */ -#define UTDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define UTSR0_TFS 0x00000001 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define UTSR0_RFS 0x00000002 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ -#define UTSR0_RID 0x00000004 /* Receiver IDle */ -#define UTSR0_RBB 0x00000008 /* Receive Beginning of Break */ -#define UTSR0_REB 0x00000010 /* Receive End of Break */ -#define UTSR0_EIF 0x00000020 /* Error In FIFO (read) */ - -#define UTSR1_TBY 0x00000001 /* Transmitter BusY (read) */ -#define UTSR1_RNE 0x00000002 /* Receive FIFO Not Empty (read) */ -#define UTSR1_TNF 0x00000004 /* Transmit FIFO Not Full (read) */ -#define UTSR1_PRE 0x00000008 /* receive PaRity Error (read) */ -#define UTSR1_FRE 0x00000010 /* receive FRaming Error (read) */ -#define UTSR1_ROR 0x00000020 /* Receive FIFO Over-Run (read) */ - - -/* - * Synchronous Data Link Controller (SDLC) control registers - * - * Registers - * Ser1SDCR0 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 0 (read/write). - * Ser1SDCR1 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 1 (read/write). - * Ser1SDCR2 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 2 (read/write). - * Ser1SDCR3 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 3 (read/write). - * Ser1SDCR4 Serial port 1 Synchronous Data Link Controller (SDLC) - * Control Register 4 (read/write). - * Ser1SDDR Serial port 1 Synchronous Data Link Controller (SDLC) - * Data Register (read/write). - * Ser1SDSR0 Serial port 1 Synchronous Data Link Controller (SDLC) - * Status Register 0 (read/write). - * Ser1SDSR1 Serial port 1 Synchronous Data Link Controller (SDLC) - * Status Register 1 (read/write). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fsd, Tsd Frequency, period of the SDLC communication. - */ - -#define Ser1SDCR0 __REG(0x80020060) /* Ser. port 1 SDLC Control Reg. 0 */ -#define Ser1SDCR1 __REG(0x80020064) /* Ser. port 1 SDLC Control Reg. 1 */ -#define Ser1SDCR2 __REG(0x80020068) /* Ser. port 1 SDLC Control Reg. 2 */ -#define Ser1SDCR3 __REG(0x8002006C) /* Ser. port 1 SDLC Control Reg. 3 */ -#define Ser1SDCR4 __REG(0x80020070) /* Ser. port 1 SDLC Control Reg. 4 */ -#define Ser1SDDR __REG(0x80020078) /* Ser. port 1 SDLC Data Reg. */ -#define Ser1SDSR0 __REG(0x80020080) /* Ser. port 1 SDLC Status Reg. 0 */ -#define Ser1SDSR1 __REG(0x80020084) /* Ser. port 1 SDLC Status Reg. 1 */ - -#define SDCR0_SUS 0x00000001 /* SDLC/UART Select */ -#define SDCR0_SDLC (SDCR0_SUS*0) /* SDLC mode (TXD1 & RXD1) */ -#define SDCR0_UART (SDCR0_SUS*1) /* UART mode (TXD1 & RXD1) */ -#define SDCR0_SDF 0x00000002 /* Single/Double start Flag select */ -#define SDCR0_SglFlg (SDCR0_SDF*0) /* Single start Flag */ -#define SDCR0_DblFlg (SDCR0_SDF*1) /* Double start Flag */ -#define SDCR0_LBM 0x00000004 /* Look-Back Mode */ -#define SDCR0_BMS 0x00000008 /* Bit Modulation Select */ -#define SDCR0_FM0 (SDCR0_BMS*0) /* Freq. Modulation zero (0) */ -#define SDCR0_NRZ (SDCR0_BMS*1) /* Non-Return to Zero modulation */ -#define SDCR0_SCE 0x00000010 /* Sample Clock Enable (GPIO [16]) */ -#define SDCR0_SCD 0x00000020 /* Sample Clock Direction select */ - /* (GPIO [16]) */ -#define SDCR0_SClkIn (SDCR0_SCD*0) /* Sample Clock Input */ -#define SDCR0_SClkOut (SDCR0_SCD*1) /* Sample Clock Output */ -#define SDCR0_RCE 0x00000040 /* Receive Clock Edge select */ -#define SDCR0_RcRsEdg (SDCR0_RCE*0) /* Receive clock Rising-Edge */ -#define SDCR0_RcFlEdg (SDCR0_RCE*1) /* Receive clock Falling-Edge */ -#define SDCR0_TCE 0x00000080 /* Transmit Clock Edge select */ -#define SDCR0_TrRsEdg (SDCR0_TCE*0) /* Transmit clock Rising-Edge */ -#define SDCR0_TrFlEdg (SDCR0_TCE*1) /* Transmit clock Falling-Edge */ - -#define SDCR1_AAF 0x00000001 /* Abort After Frame enable */ - /* (GPIO [17]) */ -#define SDCR1_TXE 0x00000002 /* Transmit Enable */ -#define SDCR1_RXE 0x00000004 /* Receive Enable */ -#define SDCR1_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ -#define SDCR1_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define SDCR1_AME 0x00000020 /* Address Match Enable */ -#define SDCR1_TUS 0x00000040 /* Transmit FIFO Under-run Select */ -#define SDCR1_EFrmURn (SDCR1_TUS*0) /* End Frame on Under-Run */ -#define SDCR1_AbortURn (SDCR1_TUS*1) /* Abort on Under-Run */ -#define SDCR1_RAE 0x00000080 /* Receive Abort interrupt Enable */ - -#define SDCR2_AMV Fld (8, 0) /* Address Match Value */ - -#define SDCR3_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ -#define SDCR4_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fsd = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tsd = 16*(BRD[11:0] + 1)*Txtl */ -#define SDCR3_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) -#define SDCR4_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Floor (Div/16)) */ - /* Tsd = 16*Floor (Div/16)*Txtl */ -#define SDCR3_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) -#define SDCR4_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Ceil (Div/16)) */ - /* Tsd = 16*Ceil (Div/16)*Txtl */ - -#define SDDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define SDDR_EOF 0x00000100 /* receive End-Of-Frame (read) */ -#define SDDR_CRE 0x00000200 /* receive CRC Error (read) */ -#define SDDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define SDSR0_EIF 0x00000001 /* Error In FIFO (read) */ -#define SDSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ -#define SDSR0_RAB 0x00000004 /* Receive ABort */ -#define SDSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define SDSR0_RFS 0x00000010 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ - -#define SDSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ -#define SDSR1_TBY 0x00000002 /* Transmitter BusY (read) */ -#define SDSR1_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define SDSR1_TNF 0x00000008 /* Transmit FIFO Not Full (read) */ -#define SDSR1_RTD 0x00000010 /* Receive Transition Detected */ -#define SDSR1_EOF 0x00000020 /* receive End-Of-Frame (read) */ -#define SDSR1_CRE 0x00000040 /* receive CRC Error (read) */ -#define SDSR1_ROR 0x00000080 /* Receive FIFO Over-Run (read) */ - - -/* - * High-Speed Serial to Parallel controller (HSSP) control registers - * - * Registers - * Ser2HSCR0 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 0 (read/write). - * Ser2HSCR1 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 1 (read/write). - * Ser2HSDR Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Data Register (read/write). - * Ser2HSSR0 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Status Register 0 (read/write). - * Ser2HSSR1 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Status Register 1 (read). - * Ser2HSCR2 Serial port 2 High-Speed Serial to Parallel - * controller (HSSP) Control Register 2 (read/write). - * [The HSCR2 register is only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - */ - -#define Ser2HSCR0 __REG(0x80040060) /* Ser. port 2 HSSP Control Reg. 0 */ -#define Ser2HSCR1 __REG(0x80040064) /* Ser. port 2 HSSP Control Reg. 1 */ -#define Ser2HSDR __REG(0x8004006C) /* Ser. port 2 HSSP Data Reg. */ -#define Ser2HSSR0 __REG(0x80040074) /* Ser. port 2 HSSP Status Reg. 0 */ -#define Ser2HSSR1 __REG(0x80040078) /* Ser. port 2 HSSP Status Reg. 1 */ -#define Ser2HSCR2 __REG(0x90060028) /* Ser. port 2 HSSP Control Reg. 2 */ - -#define HSCR0_ITR 0x00000001 /* IrDA Transmission Rate */ -#define HSCR0_UART (HSCR0_ITR*0) /* UART mode (115.2 kb/s if IrDA) */ -#define HSCR0_HSSP (HSCR0_ITR*1) /* HSSP mode (4 Mb/s) */ -#define HSCR0_LBM 0x00000002 /* Look-Back Mode */ -#define HSCR0_TUS 0x00000004 /* Transmit FIFO Under-run Select */ -#define HSCR0_EFrmURn (HSCR0_TUS*0) /* End Frame on Under-Run */ -#define HSCR0_AbortURn (HSCR0_TUS*1) /* Abort on Under-Run */ -#define HSCR0_TXE 0x00000008 /* Transmit Enable */ -#define HSCR0_RXE 0x00000010 /* Receive Enable */ -#define HSCR0_RIE 0x00000020 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Interrupt Enable */ -#define HSCR0_TIE 0x00000040 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define HSCR0_AME 0x00000080 /* Address Match Enable */ - -#define HSCR1_AMV Fld (8, 0) /* Address Match Value */ - -#define HSDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ -#if 0 /* Hidden receive FIFO bits */ -#define HSDR_EOF 0x00000100 /* receive End-Of-Frame (read) */ -#define HSDR_CRE 0x00000200 /* receive CRC Error (read) */ -#define HSDR_ROR 0x00000400 /* Receive FIFO Over-Run (read) */ -#endif /* 0 */ - -#define HSSR0_EIF 0x00000001 /* Error In FIFO (read) */ -#define HSSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ -#define HSSR0_RAB 0x00000004 /* Receive ABort */ -#define HSSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define HSSR0_RFS 0x00000010 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Service request (read) */ -#define HSSR0_FRE 0x00000020 /* receive FRaming Error */ - -#define HSSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ -#define HSSR1_TBY 0x00000002 /* Transmitter BusY (read) */ -#define HSSR1_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define HSSR1_TNF 0x00000008 /* Transmit FIFO Not Full (read) */ -#define HSSR1_EOF 0x00000010 /* receive End-Of-Frame (read) */ -#define HSSR1_CRE 0x00000020 /* receive CRC Error (read) */ -#define HSSR1_ROR 0x00000040 /* Receive FIFO Over-Run (read) */ - -#define HSCR2_TXP 0x00040000 /* Transmit data Polarity (TXD_2) */ -#define HSCR2_TrDataL (HSCR2_TXP*0) /* Transmit Data active Low */ - /* (inverted) */ -#define HSCR2_TrDataH (HSCR2_TXP*1) /* Transmit Data active High */ - /* (non-inverted) */ -#define HSCR2_RXP 0x00080000 /* Receive data Polarity (RXD_2) */ -#define HSCR2_RcDataL (HSCR2_RXP*0) /* Receive Data active Low */ - /* (inverted) */ -#define HSCR2_RcDataH (HSCR2_RXP*1) /* Receive Data active High */ - /* (non-inverted) */ - - -/* - * Multi-media Communications Port (MCP) control registers - * - * Registers - * Ser4MCCR0 Serial port 4 Multi-media Communications Port (MCP) - * Control Register 0 (read/write). - * Ser4MCDR0 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 0 (audio, read/write). - * Ser4MCDR1 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 1 (telecom, read/write). - * Ser4MCDR2 Serial port 4 Multi-media Communications Port (MCP) - * Data Register 2 (CODEC registers, read/write). - * Ser4MCSR Serial port 4 Multi-media Communications Port (MCP) - * Status Register (read/write). - * Ser4MCCR1 Serial port 4 Multi-media Communications Port (MCP) - * Control Register 1 (read/write). - * [The MCCR1 register is only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - * - * Clocks - * fmc, Tmc Frequency, period of the MCP communication (10 MHz, - * 12 MHz, or GPIO [21]). - * faud, Taud Frequency, period of the audio sampling. - * ftcm, Ttcm Frequency, period of the telecom sampling. - */ - -#define Ser4MCCR0 __REG(0x80060000) /* Ser. port 4 MCP Control Reg. 0 */ -#define Ser4MCDR0 __REG(0x80060008) /* Ser. port 4 MCP Data Reg. 0 (audio) */ -#define Ser4MCDR1 __REG(0x8006000C) /* Ser. port 4 MCP Data Reg. 1 (telecom) */ -#define Ser4MCDR2 __REG(0x80060010) /* Ser. port 4 MCP Data Reg. 2 (CODEC reg.) */ -#define Ser4MCSR __REG(0x80060018) /* Ser. port 4 MCP Status Reg. */ -#define Ser4MCCR1 __REG(0x90060030) /* Ser. port 4 MCP Control Reg. 1 */ - -#define MCCR0_ASD Fld (7, 0) /* Audio Sampling rate Divisor/32 */ - /* [6..127] */ - /* faud = fmc/(32*ASD) */ - /* Taud = 32*ASD*Tmc */ -#define MCCR0_AudSmpDiv(Div) /* Audio Sampling rate Divisor */ \ - /* [192..4064] */ \ - ((Div)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Floor (Div/32)) */ - /* Taud = 32*Floor (Div/32)*Tmc */ -#define MCCR0_CeilAudSmpDiv(Div) /* Ceil. of AudSmpDiv [192..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Ceil (Div/32)) */ - /* Taud = 32*Ceil (Div/32)*Tmc */ -#define MCCR0_TSD Fld (7, 8) /* Telecom Sampling rate */ - /* Divisor/32 [16..127] */ - /* ftcm = fmc/(32*TSD) */ - /* Ttcm = 32*TSD*Tmc */ -#define MCCR0_TcmSmpDiv(Div) /* Telecom Sampling rate Divisor */ \ - /* [512..4064] */ \ - ((Div)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Floor (Div/32)) */ - /* Ttcm = 32*Floor (Div/32)*Tmc */ -#define MCCR0_CeilTcmSmpDiv(Div) /* Ceil. of TcmSmpDiv [512..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Ceil (Div/32)) */ - /* Ttcm = 32*Ceil (Div/32)*Tmc */ -#define MCCR0_MCE 0x00010000 /* MCP Enable */ -#define MCCR0_ECS 0x00020000 /* External Clock Select */ -#define MCCR0_IntClk (MCCR0_ECS*0) /* Internal Clock (10 or 12 MHz) */ -#define MCCR0_ExtClk (MCCR0_ECS*1) /* External Clock (GPIO [21]) */ -#define MCCR0_ADM 0x00040000 /* A/D (audio/telecom) data */ - /* sampling/storing Mode */ -#define MCCR0_VldBit (MCCR0_ADM*0) /* Valid Bit storing mode */ -#define MCCR0_SmpCnt (MCCR0_ADM*1) /* Sampling Counter storing mode */ -#define MCCR0_TTE 0x00080000 /* Telecom Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ -#define MCCR0_TRE 0x00100000 /* Telecom Receive FIFO 1/2-full */ - /* or more interrupt Enable */ -#define MCCR0_ATE 0x00200000 /* Audio Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ -#define MCCR0_ARE 0x00400000 /* Audio Receive FIFO 1/2-full or */ - /* more interrupt Enable */ -#define MCCR0_LBM 0x00800000 /* Look-Back Mode */ -#define MCCR0_ECP Fld (2, 24) /* External Clock Prescaler - 1 */ -#define MCCR0_ExtClkDiv(Div) /* External Clock Divisor [1..4] */ \ - (((Div) - 1) << FShft (MCCR0_ECP)) - -#define MCDR0_DATA Fld (12, 4) /* receive/transmit audio DATA */ - /* FIFOs */ - -#define MCDR1_DATA Fld (14, 2) /* receive/transmit telecom DATA */ - /* FIFOs */ - - /* receive/transmit CODEC reg. */ - /* FIFOs: */ -#define MCDR2_DATA Fld (16, 0) /* reg. DATA */ -#define MCDR2_RW 0x00010000 /* reg. Read/Write (transmit) */ -#define MCDR2_Rd (MCDR2_RW*0) /* reg. Read */ -#define MCDR2_Wr (MCDR2_RW*1) /* reg. Write */ -#define MCDR2_ADD Fld (4, 17) /* reg. ADDress */ - -#define MCSR_ATS 0x00000001 /* Audio Transmit FIFO 1/2-full */ - /* or less Service request (read) */ -#define MCSR_ARS 0x00000002 /* Audio Receive FIFO 1/2-full or */ - /* more Service request (read) */ -#define MCSR_TTS 0x00000004 /* Telecom Transmit FIFO 1/2-full */ - /* or less Service request (read) */ -#define MCSR_TRS 0x00000008 /* Telecom Receive FIFO 1/2-full */ - /* or more Service request (read) */ -#define MCSR_ATU 0x00000010 /* Audio Transmit FIFO Under-run */ -#define MCSR_ARO 0x00000020 /* Audio Receive FIFO Over-run */ -#define MCSR_TTU 0x00000040 /* Telecom Transmit FIFO Under-run */ -#define MCSR_TRO 0x00000080 /* Telecom Receive FIFO Over-run */ -#define MCSR_ANF 0x00000100 /* Audio transmit FIFO Not Full */ - /* (read) */ -#define MCSR_ANE 0x00000200 /* Audio receive FIFO Not Empty */ - /* (read) */ -#define MCSR_TNF 0x00000400 /* Telecom transmit FIFO Not Full */ - /* (read) */ -#define MCSR_TNE 0x00000800 /* Telecom receive FIFO Not Empty */ - /* (read) */ -#define MCSR_CWC 0x00001000 /* CODEC register Write Completed */ - /* (read) */ -#define MCSR_CRC 0x00002000 /* CODEC register Read Completed */ - /* (read) */ -#define MCSR_ACE 0x00004000 /* Audio CODEC Enabled (read) */ -#define MCSR_TCE 0x00008000 /* Telecom CODEC Enabled (read) */ - -#define MCCR1_CFS 0x00100000 /* Clock Freq. Select */ -#define MCCR1_F12MHz (MCCR1_CFS*0) /* Freq. (fmc) = ~ 12 MHz */ - /* (11.981 MHz) */ -#define MCCR1_F10MHz (MCCR1_CFS*1) /* Freq. (fmc) = ~ 10 MHz */ - /* (9.585 MHz) */ - - -/* - * Synchronous Serial Port (SSP) control registers - * - * Registers - * Ser4SSCR0 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 0 (read/write). - * Ser4SSCR1 Serial port 4 Synchronous Serial Port (SSP) Control - * Register 1 (read/write). - * [Bits SPO and SP are only implemented in versions 2.0 - * (rev. = 8) and higher of the StrongARM SA-1100.] - * Ser4SSDR Serial port 4 Synchronous Serial Port (SSP) Data - * Register (read/write). - * Ser4SSSR Serial port 4 Synchronous Serial Port (SSP) Status - * Register (read/write). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fss, Tss Frequency, period of the SSP communication. - */ - -#define Ser4SSCR0 __REG(0x80070060) /* Ser. port 4 SSP Control Reg. 0 */ -#define Ser4SSCR1 __REG(0x80070064) /* Ser. port 4 SSP Control Reg. 1 */ -#define Ser4SSDR __REG(0x8007006C) /* Ser. port 4 SSP Data Reg. */ -#define Ser4SSSR __REG(0x80070074) /* Ser. port 4 SSP Status Reg. */ - -#define SSCR0_DSS Fld (4, 0) /* Data Size - 1 Select [3..15] */ -#define SSCR0_DataSize(Size) /* Data Size Select [4..16] */ \ - (((Size) - 1) << FShft (SSCR0_DSS)) -#define SSCR0_FRF Fld (2, 4) /* FRame Format */ -#define SSCR0_Motorola /* Motorola Serial Peripheral */ \ - /* Interface (SPI) format */ \ - (0 << FShft (SSCR0_FRF)) -#define SSCR0_TI /* Texas Instruments Synchronous */ \ - /* Serial format */ \ - (1 << FShft (SSCR0_FRF)) -#define SSCR0_National /* National Microwire format */ \ - (2 << FShft (SSCR0_FRF)) -#define SSCR0_SSE 0x00000080 /* SSP Enable */ -#define SSCR0_SCR Fld (8, 8) /* Serial Clock Rate divisor/2 - 1 */ - /* fss = fxtl/(2*(SCR + 1)) */ - /* Tss = 2*(SCR + 1)*Txtl */ -#define SSCR0_SerClkDiv(Div) /* Serial Clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Floor (Div/2)) */ - /* Tss = 2*Floor (Div/2)*Txtl */ -#define SSCR0_CeilSerClkDiv(Div) /* Ceil. of SerClkDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Ceil (Div/2)) */ - /* Tss = 2*Ceil (Div/2)*Txtl */ - -#define SSCR1_RIE 0x00000001 /* Receive FIFO 1/2-full or more */ - /* Interrupt Enable */ -#define SSCR1_TIE 0x00000002 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ -#define SSCR1_LBM 0x00000004 /* Look-Back Mode */ -#define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ -#define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */ -#define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */ -#define SSCR1_SP 0x00000010 /* Sample clock (SCLK) Phase */ -#define SSCR1_SClk1P (SSCR1_SP*0) /* Sample Clock active 1 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_SClk1_2P (SSCR1_SP*1) /* Sample Clock active 1/2 Period */ - /* after frame (SFRM, 1st edge) */ -#define SSCR1_ECS 0x00000020 /* External Clock Select */ -#define SSCR1_IntClk (SSCR1_ECS*0) /* Internal Clock */ -#define SSCR1_ExtClk (SSCR1_ECS*1) /* External Clock (GPIO [19]) */ - -#define SSDR_DATA Fld (16, 0) /* receive/transmit DATA FIFOs */ - -#define SSSR_TNF 0x00000002 /* Transmit FIFO Not Full (read) */ -#define SSSR_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ -#define SSSR_BSY 0x00000008 /* SSP BuSY (read) */ -#define SSSR_TFS 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ -#define SSSR_RFS 0x00000020 /* Receive FIFO 1/2-full or more */ - /* Service request (read) */ -#define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ - - -/* - * Operating System (OS) timer control registers - * - * Registers - * OSMR0 Operating System (OS) timer Match Register 0 - * (read/write). - * OSMR1 Operating System (OS) timer Match Register 1 - * (read/write). - * OSMR2 Operating System (OS) timer Match Register 2 - * (read/write). - * OSMR3 Operating System (OS) timer Match Register 3 - * (read/write). - * OSCR Operating System (OS) timer Counter Register - * (read/write). - * OSSR Operating System (OS) timer Status Register - * (read/write). - * OWER Operating System (OS) timer Watch-dog Enable Register - * (read/write). - * OIER Operating System (OS) timer Interrupt Enable Register - * (read/write). - */ - -#define OSMR0 __REG(0x90000000) /* OS timer Match Reg. 0 */ -#define OSMR1 __REG(0x90000004) /* OS timer Match Reg. 1 */ -#define OSMR2 __REG(0x90000008) /* OS timer Match Reg. 2 */ -#define OSMR3 __REG(0x9000000c) /* OS timer Match Reg. 3 */ -#define OSCR __REG(0x90000010) /* OS timer Counter Reg. */ -#define OSSR __REG(0x90000014 ) /* OS timer Status Reg. */ -#define OWER __REG(0x90000018 ) /* OS timer Watch-dog Enable Reg. */ -#define OIER __REG(0x9000001C ) /* OS timer Interrupt Enable Reg. */ - -#define OSSR_M(Nb) /* Match detected [0..3] */ \ - (0x00000001 << (Nb)) -#define OSSR_M0 OSSR_M (0) /* Match detected 0 */ -#define OSSR_M1 OSSR_M (1) /* Match detected 1 */ -#define OSSR_M2 OSSR_M (2) /* Match detected 2 */ -#define OSSR_M3 OSSR_M (3) /* Match detected 3 */ - -#define OWER_WME 0x00000001 /* Watch-dog Match Enable */ - /* (set only) */ - -#define OIER_E(Nb) /* match interrupt Enable [0..3] */ \ - (0x00000001 << (Nb)) -#define OIER_E0 OIER_E (0) /* match interrupt Enable 0 */ -#define OIER_E1 OIER_E (1) /* match interrupt Enable 1 */ -#define OIER_E2 OIER_E (2) /* match interrupt Enable 2 */ -#define OIER_E3 OIER_E (3) /* match interrupt Enable 3 */ - - -/* - * Real-Time Clock (RTC) control registers - * - * Registers - * RTAR Real-Time Clock (RTC) Alarm Register (read/write). - * RCNR Real-Time Clock (RTC) CouNt Register (read/write). - * RTTR Real-Time Clock (RTC) Trim Register (read/write). - * RTSR Real-Time Clock (RTC) Status Register (read/write). - * - * Clocks - * frtx, Trtx Frequency, period of the real-time clock crystal - * (32.768 kHz nominal). - * frtc, Trtc Frequency, period of the real-time clock counter - * (1 Hz nominal). - */ - -#define RTAR __REG(0x90010000) /* RTC Alarm Reg. */ -#define RCNR __REG(0x90010004) /* RTC CouNt Reg. */ -#define RTTR __REG(0x90010008) /* RTC Trim Reg. */ -#define RTSR __REG(0x90010010) /* RTC Status Reg. */ - -#define RTTR_C Fld (16, 0) /* clock divider Count - 1 */ -#define RTTR_D Fld (10, 16) /* trim Delete count */ - /* frtc = (1023*(C + 1) - D)*frtx/ */ - /* (1023*(C + 1)^2) */ - /* Trtc = (1023*(C + 1)^2)*Trtx/ */ - /* (1023*(C + 1) - D) */ - -#define RTSR_AL 0x00000001 /* ALarm detected */ -#define RTSR_HZ 0x00000002 /* 1 Hz clock detected */ -#define RTSR_ALE 0x00000004 /* ALarm interrupt Enable */ -#define RTSR_HZE 0x00000008 /* 1 Hz clock interrupt Enable */ - - -/* - * Power Manager (PM) control registers - * - * Registers - * PMCR Power Manager (PM) Control Register (read/write). - * PSSR Power Manager (PM) Sleep Status Register (read/write). - * PSPR Power Manager (PM) Scratch-Pad Register (read/write). - * PWER Power Manager (PM) Wake-up Enable Register - * (read/write). - * PCFR Power Manager (PM) general ConFiguration Register - * (read/write). - * PPCR Power Manager (PM) Phase-Locked Loop (PLL) - * Configuration Register (read/write). - * PGSR Power Manager (PM) General-Purpose Input/Output (GPIO) - * Sleep state Register (read/write, see GPIO pins). - * POSR Power Manager (PM) Oscillator Status Register (read). - * - * Clocks - * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz - * or 3.5795 MHz). - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - */ - -#define PMCR __REG(0x90020000) /* PM Control Reg. */ -#define PSSR __REG(0x90020004) /* PM Sleep Status Reg. */ -#define PSPR __REG(0x90020008) /* PM Scratch-Pad Reg. */ -#define PWER __REG(0x9002000C) /* PM Wake-up Enable Reg. */ -#define PCFR __REG(0x90020010) /* PM general ConFiguration Reg. */ -#define PPCR __REG(0x90020014) /* PM PLL Configuration Reg. */ -#define PGSR __REG(0x90020018) /* PM GPIO Sleep state Reg. */ -#define POSR __REG(0x9002001C) /* PM Oscillator Status Reg. */ - -#define PMCR_SF 0x00000001 /* Sleep Force (set only) */ - -#define PSSR_SS 0x00000001 /* Software Sleep */ -#define PSSR_BFS 0x00000002 /* Battery Fault Status */ - /* (BATT_FAULT) */ -#define PSSR_VFS 0x00000004 /* Vdd Fault Status (VDD_FAULT) */ -#define PSSR_DH 0x00000008 /* DRAM control Hold */ -#define PSSR_PH 0x00000010 /* Peripheral control Hold */ - -#define PWER_GPIO(Nb) GPIO_GPIO (Nb) /* GPIO [0..27] wake-up enable */ -#define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */ -#define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */ -#define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */ -#define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */ -#define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */ -#define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */ -#define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */ -#define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */ -#define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */ -#define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */ -#define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */ -#define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */ -#define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */ -#define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */ -#define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */ -#define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */ -#define PWER_GPIO16 PWER_GPIO (16) /* GPIO [16] wake-up enable */ -#define PWER_GPIO17 PWER_GPIO (17) /* GPIO [17] wake-up enable */ -#define PWER_GPIO18 PWER_GPIO (18) /* GPIO [18] wake-up enable */ -#define PWER_GPIO19 PWER_GPIO (19) /* GPIO [19] wake-up enable */ -#define PWER_GPIO20 PWER_GPIO (20) /* GPIO [20] wake-up enable */ -#define PWER_GPIO21 PWER_GPIO (21) /* GPIO [21] wake-up enable */ -#define PWER_GPIO22 PWER_GPIO (22) /* GPIO [22] wake-up enable */ -#define PWER_GPIO23 PWER_GPIO (23) /* GPIO [23] wake-up enable */ -#define PWER_GPIO24 PWER_GPIO (24) /* GPIO [24] wake-up enable */ -#define PWER_GPIO25 PWER_GPIO (25) /* GPIO [25] wake-up enable */ -#define PWER_GPIO26 PWER_GPIO (26) /* GPIO [26] wake-up enable */ -#define PWER_GPIO27 PWER_GPIO (27) /* GPIO [27] wake-up enable */ -#define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */ - -#define PCFR_OPDE 0x00000001 /* Oscillator Power-Down Enable */ -#define PCFR_ClkRun (PCFR_OPDE*0) /* Clock Running in sleep mode */ -#define PCFR_ClkStp (PCFR_OPDE*1) /* Clock Stopped in sleep mode */ -#define PCFR_FP 0x00000002 /* Float PCMCIA pins */ -#define PCFR_PCMCIANeg (PCFR_FP*0) /* PCMCIA pins Negated (1) */ -#define PCFR_PCMCIAFlt (PCFR_FP*1) /* PCMCIA pins Floating */ -#define PCFR_FS 0x00000004 /* Float Static memory pins */ -#define PCFR_StMemNeg (PCFR_FS*0) /* Static Memory pins Negated (1) */ -#define PCFR_StMemFlt (PCFR_FS*1) /* Static Memory pins Floating */ -#define PCFR_FO 0x00000008 /* Force RTC oscillator */ - /* (32.768 kHz) enable On */ - -#define PPCR_CCF Fld (5, 0) /* CPU core Clock (CCLK) Freq. */ -#define PPCR_Fx16 /* Freq. x 16 (fcpu = 16*fxtl) */ \ - (0x00 << FShft (PPCR_CCF)) -#define PPCR_Fx20 /* Freq. x 20 (fcpu = 20*fxtl) */ \ - (0x01 << FShft (PPCR_CCF)) -#define PPCR_Fx24 /* Freq. x 24 (fcpu = 24*fxtl) */ \ - (0x02 << FShft (PPCR_CCF)) -#define PPCR_Fx28 /* Freq. x 28 (fcpu = 28*fxtl) */ \ - (0x03 << FShft (PPCR_CCF)) -#define PPCR_Fx32 /* Freq. x 32 (fcpu = 32*fxtl) */ \ - (0x04 << FShft (PPCR_CCF)) -#define PPCR_Fx36 /* Freq. x 36 (fcpu = 36*fxtl) */ \ - (0x05 << FShft (PPCR_CCF)) -#define PPCR_Fx40 /* Freq. x 40 (fcpu = 40*fxtl) */ \ - (0x06 << FShft (PPCR_CCF)) -#define PPCR_Fx44 /* Freq. x 44 (fcpu = 44*fxtl) */ \ - (0x07 << FShft (PPCR_CCF)) -#define PPCR_Fx48 /* Freq. x 48 (fcpu = 48*fxtl) */ \ - (0x08 << FShft (PPCR_CCF)) -#define PPCR_Fx52 /* Freq. x 52 (fcpu = 52*fxtl) */ \ - (0x09 << FShft (PPCR_CCF)) -#define PPCR_Fx56 /* Freq. x 56 (fcpu = 56*fxtl) */ \ - (0x0A << FShft (PPCR_CCF)) -#define PPCR_Fx60 /* Freq. x 60 (fcpu = 60*fxtl) */ \ - (0x0B << FShft (PPCR_CCF)) -#define PPCR_Fx64 /* Freq. x 64 (fcpu = 64*fxtl) */ \ - (0x0C << FShft (PPCR_CCF)) -#define PPCR_Fx68 /* Freq. x 68 (fcpu = 68*fxtl) */ \ - (0x0D << FShft (PPCR_CCF)) -#define PPCR_Fx72 /* Freq. x 72 (fcpu = 72*fxtl) */ \ - (0x0E << FShft (PPCR_CCF)) -#define PPCR_Fx76 /* Freq. x 76 (fcpu = 76*fxtl) */ \ - (0x0F << FShft (PPCR_CCF)) - /* 3.6864 MHz crystal (fxtl): */ -#define PPCR_F59_0MHz PPCR_Fx16 /* Freq. (fcpu) = 59.0 MHz */ -#define PPCR_F73_7MHz PPCR_Fx20 /* Freq. (fcpu) = 73.7 MHz */ -#define PPCR_F88_5MHz PPCR_Fx24 /* Freq. (fcpu) = 88.5 MHz */ -#define PPCR_F103_2MHz PPCR_Fx28 /* Freq. (fcpu) = 103.2 MHz */ -#define PPCR_F118_0MHz PPCR_Fx32 /* Freq. (fcpu) = 118.0 MHz */ -#define PPCR_F132_7MHz PPCR_Fx36 /* Freq. (fcpu) = 132.7 MHz */ -#define PPCR_F147_5MHz PPCR_Fx40 /* Freq. (fcpu) = 147.5 MHz */ -#define PPCR_F162_2MHz PPCR_Fx44 /* Freq. (fcpu) = 162.2 MHz */ -#define PPCR_F176_9MHz PPCR_Fx48 /* Freq. (fcpu) = 176.9 MHz */ -#define PPCR_F191_7MHz PPCR_Fx52 /* Freq. (fcpu) = 191.7 MHz */ -#define PPCR_F206_4MHz PPCR_Fx56 /* Freq. (fcpu) = 206.4 MHz */ -#define PPCR_F221_2MHz PPCR_Fx60 /* Freq. (fcpu) = 221.2 MHz */ -#define PPCR_F239_6MHz PPCR_Fx64 /* Freq. (fcpu) = 239.6 MHz */ -#define PPCR_F250_7MHz PPCR_Fx68 /* Freq. (fcpu) = 250.7 MHz */ -#define PPCR_F265_4MHz PPCR_Fx72 /* Freq. (fcpu) = 265.4 MHz */ -#define PPCR_F280_2MHz PPCR_Fx76 /* Freq. (fcpu) = 280.2 MHz */ - /* 3.5795 MHz crystal (fxtl): */ -#define PPCR_F57_3MHz PPCR_Fx16 /* Freq. (fcpu) = 57.3 MHz */ -#define PPCR_F71_6MHz PPCR_Fx20 /* Freq. (fcpu) = 71.6 MHz */ -#define PPCR_F85_9MHz PPCR_Fx24 /* Freq. (fcpu) = 85.9 MHz */ -#define PPCR_F100_2MHz PPCR_Fx28 /* Freq. (fcpu) = 100.2 MHz */ -#define PPCR_F114_5MHz PPCR_Fx32 /* Freq. (fcpu) = 114.5 MHz */ -#define PPCR_F128_9MHz PPCR_Fx36 /* Freq. (fcpu) = 128.9 MHz */ -#define PPCR_F143_2MHz PPCR_Fx40 /* Freq. (fcpu) = 143.2 MHz */ -#define PPCR_F157_5MHz PPCR_Fx44 /* Freq. (fcpu) = 157.5 MHz */ -#define PPCR_F171_8MHz PPCR_Fx48 /* Freq. (fcpu) = 171.8 MHz */ -#define PPCR_F186_1MHz PPCR_Fx52 /* Freq. (fcpu) = 186.1 MHz */ -#define PPCR_F200_5MHz PPCR_Fx56 /* Freq. (fcpu) = 200.5 MHz */ -#define PPCR_F214_8MHz PPCR_Fx60 /* Freq. (fcpu) = 214.8 MHz */ -#define PPCR_F229_1MHz PPCR_Fx64 /* Freq. (fcpu) = 229.1 MHz */ -#define PPCR_F243_4MHz PPCR_Fx68 /* Freq. (fcpu) = 243.4 MHz */ -#define PPCR_F257_7MHz PPCR_Fx72 /* Freq. (fcpu) = 257.7 MHz */ -#define PPCR_F272_0MHz PPCR_Fx76 /* Freq. (fcpu) = 272.0 MHz */ - -#define POSR_OOK 0x00000001 /* RTC Oscillator (32.768 kHz) OK */ - - -/* - * Reset Controller (RC) control registers - * - * Registers - * RSRR Reset Controller (RC) Software Reset Register - * (read/write). - * RCSR Reset Controller (RC) Status Register (read/write). - */ - -#define RSRR __REG(0x90030000) /* RC Software Reset Reg. */ -#define RCSR __REG(0x90030004) /* RC Status Reg. */ - -#define RSRR_SWR 0x00000001 /* SoftWare Reset (set only) */ - -#define RCSR_HWR 0x00000001 /* HardWare Reset */ -#define RCSR_SWR 0x00000002 /* SoftWare Reset */ -#define RCSR_WDR 0x00000004 /* Watch-Dog Reset */ -#define RCSR_SMR 0x00000008 /* Sleep-Mode Reset */ - - -/* - * Test unit control registers - * - * Registers - * TUCR Test Unit Control Register (read/write). - */ - -#define TUCR __REG(0x90030008) /* Test Unit Control Reg. */ - -#define TUCR_TIC 0x00000040 /* TIC mode */ -#define TUCR_TTST 0x00000080 /* Trim TeST mode */ -#define TUCR_RCRC 0x00000100 /* Richard's Cyclic Redundancy */ - /* Check */ -#define TUCR_PMD 0x00000200 /* Power Management Disable */ -#define TUCR_MR 0x00000400 /* Memory Request mode */ -#define TUCR_NoMB (TUCR_MR*0) /* No Memory Bus request & grant */ -#define TUCR_MBGPIO (TUCR_MR*1) /* Memory Bus request (MBREQ) & */ - /* grant (MBGNT) on GPIO [22:21] */ -#define TUCR_CTB Fld (3, 20) /* Clock Test Bits */ -#define TUCR_FDC 0x00800000 /* RTC Force Delete Count */ -#define TUCR_FMC 0x01000000 /* Force Michelle's Control mode */ -#define TUCR_TMC 0x02000000 /* RTC Trimmer Multiplexer Control */ -#define TUCR_DPS 0x04000000 /* Disallow Pad Sleep */ -#define TUCR_TSEL Fld (3, 29) /* clock Test SELect on GPIO [27] */ -#define TUCR_32_768kHz /* 32.768 kHz osc. on GPIO [27] */ \ - (0 << FShft (TUCR_TSEL)) -#define TUCR_3_6864MHz /* 3.6864 MHz osc. on GPIO [27] */ \ - (1 << FShft (TUCR_TSEL)) -#define TUCR_VDD /* VDD ring osc./16 on GPIO [27] */ \ - (2 << FShft (TUCR_TSEL)) -#define TUCR_96MHzPLL /* 96 MHz PLL/4 on GPIO [27] */ \ - (3 << FShft (TUCR_TSEL)) -#define TUCR_Clock /* internal (fcpu/2) & 32.768 kHz */ \ - /* Clocks on GPIO [26:27] */ \ - (4 << FShft (TUCR_TSEL)) -#define TUCR_3_6864MHzA /* 3.6864 MHz osc. on GPIO [27] */ \ - /* (Alternative) */ \ - (5 << FShft (TUCR_TSEL)) -#define TUCR_MainPLL /* Main PLL/16 on GPIO [27] */ \ - (6 << FShft (TUCR_TSEL)) -#define TUCR_VDDL /* VDDL ring osc./4 on GPIO [27] */ \ - (7 << FShft (TUCR_TSEL)) - - -/* - * General-Purpose Input/Output (GPIO) control registers - * - * Registers - * GPLR General-Purpose Input/Output (GPIO) Pin Level - * Register (read). - * GPDR General-Purpose Input/Output (GPIO) Pin Direction - * Register (read/write). - * GPSR General-Purpose Input/Output (GPIO) Pin output Set - * Register (write). - * GPCR General-Purpose Input/Output (GPIO) Pin output Clear - * Register (write). - * GRER General-Purpose Input/Output (GPIO) Rising-Edge - * detect Register (read/write). - * GFER General-Purpose Input/Output (GPIO) Falling-Edge - * detect Register (read/write). - * GEDR General-Purpose Input/Output (GPIO) Edge Detect - * status Register (read/write). - * GAFR General-Purpose Input/Output (GPIO) Alternate - * Function Register (read/write). - * - * Clock - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - */ - -#define GPLR __REG(0x90040000) /* GPIO Pin Level Reg. */ -#define GPDR __REG(0x90040004) /* GPIO Pin Direction Reg. */ -#define GPSR __REG(0x90040008) /* GPIO Pin output Set Reg. */ -#define GPCR __REG(0x9004000C) /* GPIO Pin output Clear Reg. */ -#define GRER __REG(0x90040010) /* GPIO Rising-Edge detect Reg. */ -#define GFER __REG(0x90040014) /* GPIO Falling-Edge detect Reg. */ -#define GEDR __REG(0x90040018) /* GPIO Edge Detect status Reg. */ -#define GAFR __REG(0x9004001C) /* GPIO Alternate Function Reg. */ - -#define GPIO_MIN (0) -#define GPIO_MAX (27) - -#define GPIO_GPIO(Nb) /* GPIO [0..27] */ \ - (0x00000001 << (Nb)) -#define GPIO_GPIO0 GPIO_GPIO (0) /* GPIO [0] */ -#define GPIO_GPIO1 GPIO_GPIO (1) /* GPIO [1] */ -#define GPIO_GPIO2 GPIO_GPIO (2) /* GPIO [2] */ -#define GPIO_GPIO3 GPIO_GPIO (3) /* GPIO [3] */ -#define GPIO_GPIO4 GPIO_GPIO (4) /* GPIO [4] */ -#define GPIO_GPIO5 GPIO_GPIO (5) /* GPIO [5] */ -#define GPIO_GPIO6 GPIO_GPIO (6) /* GPIO [6] */ -#define GPIO_GPIO7 GPIO_GPIO (7) /* GPIO [7] */ -#define GPIO_GPIO8 GPIO_GPIO (8) /* GPIO [8] */ -#define GPIO_GPIO9 GPIO_GPIO (9) /* GPIO [9] */ -#define GPIO_GPIO10 GPIO_GPIO (10) /* GPIO [10] */ -#define GPIO_GPIO11 GPIO_GPIO (11) /* GPIO [11] */ -#define GPIO_GPIO12 GPIO_GPIO (12) /* GPIO [12] */ -#define GPIO_GPIO13 GPIO_GPIO (13) /* GPIO [13] */ -#define GPIO_GPIO14 GPIO_GPIO (14) /* GPIO [14] */ -#define GPIO_GPIO15 GPIO_GPIO (15) /* GPIO [15] */ -#define GPIO_GPIO16 GPIO_GPIO (16) /* GPIO [16] */ -#define GPIO_GPIO17 GPIO_GPIO (17) /* GPIO [17] */ -#define GPIO_GPIO18 GPIO_GPIO (18) /* GPIO [18] */ -#define GPIO_GPIO19 GPIO_GPIO (19) /* GPIO [19] */ -#define GPIO_GPIO20 GPIO_GPIO (20) /* GPIO [20] */ -#define GPIO_GPIO21 GPIO_GPIO (21) /* GPIO [21] */ -#define GPIO_GPIO22 GPIO_GPIO (22) /* GPIO [22] */ -#define GPIO_GPIO23 GPIO_GPIO (23) /* GPIO [23] */ -#define GPIO_GPIO24 GPIO_GPIO (24) /* GPIO [24] */ -#define GPIO_GPIO25 GPIO_GPIO (25) /* GPIO [25] */ -#define GPIO_GPIO26 GPIO_GPIO (26) /* GPIO [26] */ -#define GPIO_GPIO27 GPIO_GPIO (27) /* GPIO [27] */ - -#define GPIO_LDD(Nb) /* LCD Data [8..15] (O) */ \ - GPIO_GPIO ((Nb) - 6) -#define GPIO_LDD8 GPIO_LDD (8) /* LCD Data [8] (O) */ -#define GPIO_LDD9 GPIO_LDD (9) /* LCD Data [9] (O) */ -#define GPIO_LDD10 GPIO_LDD (10) /* LCD Data [10] (O) */ -#define GPIO_LDD11 GPIO_LDD (11) /* LCD Data [11] (O) */ -#define GPIO_LDD12 GPIO_LDD (12) /* LCD Data [12] (O) */ -#define GPIO_LDD13 GPIO_LDD (13) /* LCD Data [13] (O) */ -#define GPIO_LDD14 GPIO_LDD (14) /* LCD Data [14] (O) */ -#define GPIO_LDD15 GPIO_LDD (15) /* LCD Data [15] (O) */ - /* ser. port 4: */ -#define GPIO_SSP_TXD GPIO_GPIO (10) /* SSP Transmit Data (O) */ -#define GPIO_SSP_RXD GPIO_GPIO (11) /* SSP Receive Data (I) */ -#define GPIO_SSP_SCLK GPIO_GPIO (12) /* SSP Sample CLocK (O) */ -#define GPIO_SSP_SFRM GPIO_GPIO (13) /* SSP Sample FRaMe (O) */ - /* ser. port 1: */ -#define GPIO_UART_TXD GPIO_GPIO (14) /* UART Transmit Data (O) */ -#define GPIO_UART_RXD GPIO_GPIO (15) /* UART Receive Data (I) */ -#define GPIO_SDLC_SCLK GPIO_GPIO (16) /* SDLC Sample CLocK (I/O) */ -#define GPIO_SDLC_AAF GPIO_GPIO (17) /* SDLC Abort After Frame (O) */ -#define GPIO_UART_SCLK1 GPIO_GPIO (18) /* UART Sample CLocK 1 (I) */ - /* ser. port 4: */ -#define GPIO_SSP_CLK GPIO_GPIO (19) /* SSP external CLocK (I) */ - /* ser. port 3: */ -#define GPIO_UART_SCLK3 GPIO_GPIO (20) /* UART Sample CLocK 3 (I) */ - /* ser. port 4: */ -#define GPIO_MCP_CLK GPIO_GPIO (21) /* MCP CLocK (I) */ - /* test controller: */ -#define GPIO_TIC_ACK GPIO_GPIO (21) /* TIC ACKnowledge (O) */ -#define GPIO_MBGNT GPIO_GPIO (21) /* Memory Bus GraNT (O) */ -#define GPIO_TREQA GPIO_GPIO (22) /* TIC REQuest A (I) */ -#define GPIO_MBREQ GPIO_GPIO (22) /* Memory Bus REQuest (I) */ -#define GPIO_TREQB GPIO_GPIO (23) /* TIC REQuest B (I) */ -#define GPIO_1Hz GPIO_GPIO (25) /* 1 Hz clock (O) */ -#define GPIO_RCLK GPIO_GPIO (26) /* internal (R) CLocK (O, fcpu/2) */ -#define GPIO_32_768kHz GPIO_GPIO (27) /* 32.768 kHz clock (O, RTC) */ - -#define GPDR_In 0 /* Input */ -#define GPDR_Out 1 /* Output */ - - -/* - * Interrupt Controller (IC) control registers - * - * Registers - * ICIP Interrupt Controller (IC) Interrupt ReQuest (IRQ) - * Pending register (read). - * ICMR Interrupt Controller (IC) Mask Register (read/write). - * ICLR Interrupt Controller (IC) Level Register (read/write). - * ICCR Interrupt Controller (IC) Control Register - * (read/write). - * [The ICCR register is only implemented in versions 2.0 - * (rev. = 8) and higher of the StrongARM SA-1100.] - * ICFP Interrupt Controller (IC) Fast Interrupt reQuest - * (FIQ) Pending register (read). - * ICPR Interrupt Controller (IC) Pending Register (read). - * [The ICPR register is active low (inverted) in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it is active high (non-inverted) in - * versions 2.0 (rev. = 8) and higher.] - */ - -#define ICIP __REG(0x90050000) /* IC IRQ Pending reg. */ -#define ICMR __REG(0x90050004) /* IC Mask Reg. */ -#define ICLR __REG(0x90050008) /* IC Level Reg. */ -#define ICCR __REG(0x9005000C) /* IC Control Reg. */ -#define ICFP __REG(0x90050010) /* IC FIQ Pending reg. */ -#define ICPR __REG(0x90050020) /* IC Pending Reg. */ - -#define IC_GPIO(Nb) /* GPIO [0..10] */ \ - (0x00000001 << (Nb)) -#define IC_GPIO0 IC_GPIO (0) /* GPIO [0] */ -#define IC_GPIO1 IC_GPIO (1) /* GPIO [1] */ -#define IC_GPIO2 IC_GPIO (2) /* GPIO [2] */ -#define IC_GPIO3 IC_GPIO (3) /* GPIO [3] */ -#define IC_GPIO4 IC_GPIO (4) /* GPIO [4] */ -#define IC_GPIO5 IC_GPIO (5) /* GPIO [5] */ -#define IC_GPIO6 IC_GPIO (6) /* GPIO [6] */ -#define IC_GPIO7 IC_GPIO (7) /* GPIO [7] */ -#define IC_GPIO8 IC_GPIO (8) /* GPIO [8] */ -#define IC_GPIO9 IC_GPIO (9) /* GPIO [9] */ -#define IC_GPIO10 IC_GPIO (10) /* GPIO [10] */ -#define IC_GPIO11_27 0x00000800 /* GPIO [11:27] (ORed) */ -#define IC_LCD 0x00001000 /* LCD controller */ -#define IC_Ser0UDC 0x00002000 /* Ser. port 0 UDC */ -#define IC_Ser1SDLC 0x00004000 /* Ser. port 1 SDLC */ -#define IC_Ser1UART 0x00008000 /* Ser. port 1 UART */ -#define IC_Ser2ICP 0x00010000 /* Ser. port 2 ICP */ -#define IC_Ser3UART 0x00020000 /* Ser. port 3 UART */ -#define IC_Ser4MCP 0x00040000 /* Ser. port 4 MCP */ -#define IC_Ser4SSP 0x00080000 /* Ser. port 4 SSP */ -#define IC_DMA(Nb) /* DMA controller channel [0..5] */ \ - (0x00100000 << (Nb)) -#define IC_DMA0 IC_DMA (0) /* DMA controller channel 0 */ -#define IC_DMA1 IC_DMA (1) /* DMA controller channel 1 */ -#define IC_DMA2 IC_DMA (2) /* DMA controller channel 2 */ -#define IC_DMA3 IC_DMA (3) /* DMA controller channel 3 */ -#define IC_DMA4 IC_DMA (4) /* DMA controller channel 4 */ -#define IC_DMA5 IC_DMA (5) /* DMA controller channel 5 */ -#define IC_OST(Nb) /* OS Timer match [0..3] */ \ - (0x04000000 << (Nb)) -#define IC_OST0 IC_OST (0) /* OS Timer match 0 */ -#define IC_OST1 IC_OST (1) /* OS Timer match 1 */ -#define IC_OST2 IC_OST (2) /* OS Timer match 2 */ -#define IC_OST3 IC_OST (3) /* OS Timer match 3 */ -#define IC_RTC1Hz 0x40000000 /* RTC 1 Hz clock */ -#define IC_RTCAlrm 0x80000000 /* RTC Alarm */ - -#define ICLR_IRQ 0 /* Interrupt ReQuest */ -#define ICLR_FIQ 1 /* Fast Interrupt reQuest */ - -#define ICCR_DIM 0x00000001 /* Disable Idle-mode interrupt */ - /* Mask */ -#define ICCR_IdleAllInt (ICCR_DIM*0) /* Idle-mode All Interrupt enable */ - /* (ICMR ignored) */ -#define ICCR_IdleMskInt (ICCR_DIM*1) /* Idle-mode non-Masked Interrupt */ - /* enable (ICMR used) */ - - -/* - * Peripheral Pin Controller (PPC) control registers - * - * Registers - * PPDR Peripheral Pin Controller (PPC) Pin Direction - * Register (read/write). - * PPSR Peripheral Pin Controller (PPC) Pin State Register - * (read/write). - * PPAR Peripheral Pin Controller (PPC) Pin Assignment - * Register (read/write). - * PSDR Peripheral Pin Controller (PPC) Sleep-mode pin - * Direction Register (read/write). - * PPFR Peripheral Pin Controller (PPC) Pin Flag Register - * (read). - */ - -#define PPDR __REG(0x90060000) /* PPC Pin Direction Reg. */ -#define PPSR __REG(0x90060004) /* PPC Pin State Reg. */ -#define PPAR __REG(0x90060008) /* PPC Pin Assignment Reg. */ -#define PSDR __REG(0x9006000C) /* PPC Sleep-mode pin Direction Reg. */ -#define PPFR __REG(0x90060010) /* PPC Pin Flag Reg. */ - -#define PPC_LDD(Nb) /* LCD Data [0..7] */ \ - (0x00000001 << (Nb)) -#define PPC_LDD0 PPC_LDD (0) /* LCD Data [0] */ -#define PPC_LDD1 PPC_LDD (1) /* LCD Data [1] */ -#define PPC_LDD2 PPC_LDD (2) /* LCD Data [2] */ -#define PPC_LDD3 PPC_LDD (3) /* LCD Data [3] */ -#define PPC_LDD4 PPC_LDD (4) /* LCD Data [4] */ -#define PPC_LDD5 PPC_LDD (5) /* LCD Data [5] */ -#define PPC_LDD6 PPC_LDD (6) /* LCD Data [6] */ -#define PPC_LDD7 PPC_LDD (7) /* LCD Data [7] */ -#define PPC_L_PCLK 0x00000100 /* LCD Pixel CLocK */ -#define PPC_L_LCLK 0x00000200 /* LCD Line CLocK */ -#define PPC_L_FCLK 0x00000400 /* LCD Frame CLocK */ -#define PPC_L_BIAS 0x00000800 /* LCD AC BIAS */ - /* ser. port 1: */ -#define PPC_TXD1 0x00001000 /* SDLC/UART Transmit Data 1 */ -#define PPC_RXD1 0x00002000 /* SDLC/UART Receive Data 1 */ - /* ser. port 2: */ -#define PPC_TXD2 0x00004000 /* IPC Transmit Data 2 */ -#define PPC_RXD2 0x00008000 /* IPC Receive Data 2 */ - /* ser. port 3: */ -#define PPC_TXD3 0x00010000 /* UART Transmit Data 3 */ -#define PPC_RXD3 0x00020000 /* UART Receive Data 3 */ - /* ser. port 4: */ -#define PPC_TXD4 0x00040000 /* MCP/SSP Transmit Data 4 */ -#define PPC_RXD4 0x00080000 /* MCP/SSP Receive Data 4 */ -#define PPC_SCLK 0x00100000 /* MCP/SSP Sample CLocK */ -#define PPC_SFRM 0x00200000 /* MCP/SSP Sample FRaMe */ - -#define PPDR_In 0 /* Input */ -#define PPDR_Out 1 /* Output */ - - /* ser. port 1: */ -#define PPAR_UPR 0x00001000 /* UART Pin Reassignment */ -#define PPAR_UARTTR (PPAR_UPR*0) /* UART on TXD_1 & RXD_1 */ -#define PPAR_UARTGPIO (PPAR_UPR*1) /* UART on GPIO [14:15] */ - /* ser. port 4: */ -#define PPAR_SPR 0x00040000 /* SSP Pin Reassignment */ -#define PPAR_SSPTRSS (PPAR_SPR*0) /* SSP on TXD_C, RXD_C, SCLK_C, */ - /* & SFRM_C */ -#define PPAR_SSPGPIO (PPAR_SPR*1) /* SSP on GPIO [10:13] */ - -#define PSDR_OutL 0 /* Output Low in sleep mode */ -#define PSDR_Flt 1 /* Floating (input) in sleep mode */ - -#define PPFR_LCD 0x00000001 /* LCD controller */ -#define PPFR_SP1TX 0x00001000 /* Ser. Port 1 SDLC/UART Transmit */ -#define PPFR_SP1RX 0x00002000 /* Ser. Port 1 SDLC/UART Receive */ -#define PPFR_SP2TX 0x00004000 /* Ser. Port 2 ICP Transmit */ -#define PPFR_SP2RX 0x00008000 /* Ser. Port 2 ICP Receive */ -#define PPFR_SP3TX 0x00010000 /* Ser. Port 3 UART Transmit */ -#define PPFR_SP3RX 0x00020000 /* Ser. Port 3 UART Receive */ -#define PPFR_SP4 0x00040000 /* Ser. Port 4 MCP/SSP */ -#define PPFR_PerEn 0 /* Peripheral Enabled */ -#define PPFR_PPCEn 1 /* PPC Enabled */ - - -/* - * Dynamic Random-Access Memory (DRAM) control registers - * - * Registers - * MDCNFG Memory system: Dynamic Random-Access Memory (DRAM) - * CoNFiGuration register (read/write). - * MDCAS0 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 0 - * (read/write). - * MDCAS1 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 1 - * (read/write). - * MDCAS2 Memory system: Dynamic Random-Access Memory (DRAM) - * Column Address Strobe (CAS) shift register 2 - * (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fcas, Tcas Frequency, period of the DRAM CAS shift registers. - */ - -#define MDCNFG __REG(0xA0000000) /* DRAM CoNFiGuration reg. */ -#define MDCAS0 __REG(0xA0000004) /* DRAM CAS shift reg. 0 */ -#define MDCAS1 __REG(0xA0000008) /* DRAM CAS shift reg. 1 */ -#define MDCAS2 __REG(0xA000000c) /* DRAM CAS shift reg. 2 */ - -/* SA1100 MDCNFG values */ -#define MDCNFG_DE(Nb) /* DRAM Enable bank [0..3] */ \ - (0x00000001 << (Nb)) -#define MDCNFG_DE0 MDCNFG_DE (0) /* DRAM Enable bank 0 */ -#define MDCNFG_DE1 MDCNFG_DE (1) /* DRAM Enable bank 1 */ -#define MDCNFG_DE2 MDCNFG_DE (2) /* DRAM Enable bank 2 */ -#define MDCNFG_DE3 MDCNFG_DE (3) /* DRAM Enable bank 3 */ -#define MDCNFG_DRAC Fld (2, 4) /* DRAM Row Address Count - 9 */ -#define MDCNFG_RowAdd(Add) /* Row Address count [9..12] */ \ - (((Add) - 9) << FShft (MDCNFG_DRAC)) -#define MDCNFG_CDB2 0x00000040 /* shift reg. Clock Divide By 2 */ - /* (fcas = fcpu/2) */ -#define MDCNFG_TRP Fld (4, 7) /* Time RAS Pre-charge - 1 [Tmem] */ -#define MDCNFG_PrChrg(Tcpu) /* Pre-Charge time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP)) -#define MDCNFG_CeilPrChrg(Tcpu) /* Ceil. of PrChrg [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP)) -#define MDCNFG_TRASR Fld (4, 11) /* Time RAS Refresh - 1 [Tmem] */ -#define MDCNFG_Ref(Tcpu) /* Refresh time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR)) -#define MDCNFG_CeilRef(Tcpu) /* Ceil. of Ref [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR)) -#define MDCNFG_TDL Fld (2, 15) /* Time Data Latch [Tcpu] */ -#define MDCNFG_DataLtch(Tcpu) /* Data Latch delay [0..3 Tcpu] */ \ - ((Tcpu) << FShft (MDCNFG_TDL)) -#define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ - /* [Tmem] */ -#define MDCNFG_RefInt(Tcpu) /* min. Refresh Interval */ \ - /* [0..262136 Tcpu] */ \ - ((Tcpu)/8 << FShft (MDCNFG_DRI)) - -/* SA1110 MDCNFG values */ -#define MDCNFG_SA1110_DE0 0x00000001 /* DRAM Enable bank 0 */ -#define MDCNFG_SA1110_DE1 0x00000002 /* DRAM Enable bank 1 */ -#define MDCNFG_SA1110_DTIM0 0x00000004 /* DRAM timing type 0/1 */ -#define MDCNFG_SA1110_DWID0 0x00000008 /* DRAM bus width 0/1 */ -#define MDCNFG_SA1110_DRAC0 Fld(3, 4) /* DRAM row addr bit count */ - /* bank 0/1 */ -#define MDCNFG_SA1110_CDB20 0x00000080 /* Mem Clock divide by 2 0/1 */ -#define MDCNFG_SA1110_TRP0 Fld(3, 8) /* RAS precharge 0/1 */ -#define MDCNFG_SA1110_TDL0 Fld(2, 12) /* Data input latch after CAS*/ - /* deassertion 0/1 */ -#define MDCNFG_SA1110_TWR0 Fld(2, 14) /* SDRAM write recovery 0/1 */ -#define MDCNFG_SA1110_DE2 0x00010000 /* DRAM Enable bank 0 */ -#define MDCNFG_SA1110_DE3 0x00020000 /* DRAM Enable bank 1 */ -#define MDCNFG_SA1110_DTIM2 0x00040000 /* DRAM timing type 0/1 */ -#define MDCNFG_SA1110_DWID2 0x00080000 /* DRAM bus width 0/1 */ -#define MDCNFG_SA1110_DRAC2 Fld(3, 20) /* DRAM row addr bit count */ - /* bank 0/1 */ -#define MDCNFG_SA1110_CDB22 0x00800000 /* Mem Clock divide by 2 0/1 */ -#define MDCNFG_SA1110_TRP2 Fld(3, 24) /* RAS precharge 0/1 */ -#define MDCNFG_SA1110_TDL2 Fld(2, 28) /* Data input latch after CAS*/ - /* deassertion 0/1 */ -#define MDCNFG_SA1110_TWR2 Fld(2, 30) /* SDRAM write recovery 0/1 */ - - -/* - * Static memory control registers - * - * Registers - * MSC0 Memory system: Static memory Control register 0 - * (read/write). - * MSC1 Memory system: Static memory Control register 1 - * (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - */ - -#define MSC0 __REG(0xa0000010) /* Static memory Control reg. 0 */ -#define MSC1 __REG(0xa0000014) /* Static memory Control reg. 1 */ -#define MSC2 __REG(0xa000002c) /* Static memory Control reg. 2, not contiguous */ - -#define MSC_Bnk(Nb) /* static memory Bank [0..3] */ \ - Fld (16, ((Nb) Modulo 2)*16) -#define MSC0_Bnk0 MSC_Bnk (0) /* static memory Bank 0 */ -#define MSC0_Bnk1 MSC_Bnk (1) /* static memory Bank 1 */ -#define MSC1_Bnk2 MSC_Bnk (2) /* static memory Bank 2 */ -#define MSC1_Bnk3 MSC_Bnk (3) /* static memory Bank 3 */ - -#define MSC_RT Fld (2, 0) /* ROM/static memory Type */ -#define MSC_NonBrst /* Non-Burst static memory */ \ - (0 << FShft (MSC_RT)) -#define MSC_SRAM /* 32-bit byte-writable SRAM */ \ - (1 << FShft (MSC_RT)) -#define MSC_Brst4 /* Burst-of-4 static memory */ \ - (2 << FShft (MSC_RT)) -#define MSC_Brst8 /* Burst-of-8 static memory */ \ - (3 << FShft (MSC_RT)) -#define MSC_RBW 0x0004 /* ROM/static memory Bus Width */ -#define MSC_32BitStMem (MSC_RBW*0) /* 32-Bit Static Memory */ -#define MSC_16BitStMem (MSC_RBW*1) /* 16-Bit Static Memory */ -#define MSC_RDF Fld (5, 3) /* ROM/static memory read Delay */ - /* First access - 1(.5) [Tmem] */ -#define MSC_1stRdAcc(Tcpu) /* 1st Read Access time (burst */ \ - /* static memory) [3..65 Tcpu] */ \ - ((((Tcpu) - 3)/2) << FShft (MSC_RDF)) -#define MSC_Ceil1stRdAcc(Tcpu) /* Ceil. of 1stRdAcc [3..65 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) -#define MSC_RdAcc(Tcpu) /* Read Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) -#define MSC_CeilRdAcc(Tcpu) /* Ceil. of RdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDF)) -#define MSC_RDN Fld (5, 8) /* ROM/static memory read Delay */ - /* Next access - 1 [Tmem] */ -#define MSC_NxtRdAcc(Tcpu) /* Next Read Access time (burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) -#define MSC_CeilNxtRdAcc(Tcpu) /* Ceil. of NxtRdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) -#define MSC_WrAcc(Tcpu) /* Write Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) -#define MSC_CeilWrAcc(Tcpu) /* Ceil. of WrAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) -#define MSC_RRR Fld (3, 13) /* ROM/static memory RecoveRy */ - /* time/2 [Tmem] */ -#define MSC_Rec(Tcpu) /* Recovery time [0..28 Tcpu] */ \ - (((Tcpu)/4) << FShft (MSC_RRR)) -#define MSC_CeilRec(Tcpu) /* Ceil. of Rec [0..28 Tcpu] */ \ - ((((Tcpu) + 3)/4) << FShft (MSC_RRR)) - - -/* - * Personal Computer Memory Card International Association (PCMCIA) control - * register - * - * Register - * MECR Memory system: Expansion memory bus (PCMCIA) - * Configuration Register (read/write). - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fbclk, Tbclk Frequency, period of the PCMCIA clock (BCLK). - */ - - /* Memory system: */ -#define MECR __REG(0xA0000018) /* Expansion memory bus (PCMCIA) Configuration Reg. */ - -#define MECR_PCMCIA(Nb) /* PCMCIA [0..1] */ \ - Fld (15, (Nb)*16) -#define MECR_PCMCIA0 MECR_PCMCIA (0) /* PCMCIA 0 */ -#define MECR_PCMCIA1 MECR_PCMCIA (1) /* PCMCIA 1 */ - -#define MECR_BSIO Fld (5, 0) /* BCLK Select I/O - 1 [Tmem] */ -#define MECR_IOClk(Tcpu) /* I/O Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSIO)) -#define MECR_CeilIOClk(Tcpu) /* Ceil. of IOClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSIO)) -#define MECR_BSA Fld (5, 5) /* BCLK Select Attribute - 1 */ - /* [Tmem] */ -#define MECR_AttrClk(Tcpu) /* Attribute Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSA)) -#define MECR_CeilAttrClk(Tcpu) /* Ceil. of AttrClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSA)) -#define MECR_BSM Fld (5, 10) /* BCLK Select Memory - 1 [Tmem] */ -#define MECR_MemClk(Tcpu) /* Memory Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSM)) -#define MECR_CeilMemClk(Tcpu) /* Ceil. of MemClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSM)) - -/* - * On SA1110 only - */ - -#define MDREFR __REG(0xA000001C) - -#define MDREFR_TRASR Fld (4, 0) -#define MDREFR_DRI Fld (12, 4) -#define MDREFR_E0PIN (1 << 16) -#define MDREFR_K0RUN (1 << 17) -#define MDREFR_K0DB2 (1 << 18) -#define MDREFR_E1PIN (1 << 20) -#define MDREFR_K1RUN (1 << 21) -#define MDREFR_K1DB2 (1 << 22) -#define MDREFR_K2RUN (1 << 25) -#define MDREFR_K2DB2 (1 << 26) -#define MDREFR_EAPD (1 << 28) -#define MDREFR_KAPD (1 << 29) -#define MDREFR_SLFRSH (1 << 31) - - -/* - * Direct Memory Access (DMA) control registers - * - * Registers - * DDAR0 Direct Memory Access (DMA) Device Address Register - * channel 0 (read/write). - * DCSR0 Direct Memory Access (DMA) Control and Status - * Register channel 0 (read/write). - * DBSA0 Direct Memory Access (DMA) Buffer Start address - * register A channel 0 (read/write). - * DBTA0 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 0 (read/write). - * DBSB0 Direct Memory Access (DMA) Buffer Start address - * register B channel 0 (read/write). - * DBTB0 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 0 (read/write). - * - * DDAR1 Direct Memory Access (DMA) Device Address Register - * channel 1 (read/write). - * DCSR1 Direct Memory Access (DMA) Control and Status - * Register channel 1 (read/write). - * DBSA1 Direct Memory Access (DMA) Buffer Start address - * register A channel 1 (read/write). - * DBTA1 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 1 (read/write). - * DBSB1 Direct Memory Access (DMA) Buffer Start address - * register B channel 1 (read/write). - * DBTB1 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 1 (read/write). - * - * DDAR2 Direct Memory Access (DMA) Device Address Register - * channel 2 (read/write). - * DCSR2 Direct Memory Access (DMA) Control and Status - * Register channel 2 (read/write). - * DBSA2 Direct Memory Access (DMA) Buffer Start address - * register A channel 2 (read/write). - * DBTA2 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 2 (read/write). - * DBSB2 Direct Memory Access (DMA) Buffer Start address - * register B channel 2 (read/write). - * DBTB2 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 2 (read/write). - * - * DDAR3 Direct Memory Access (DMA) Device Address Register - * channel 3 (read/write). - * DCSR3 Direct Memory Access (DMA) Control and Status - * Register channel 3 (read/write). - * DBSA3 Direct Memory Access (DMA) Buffer Start address - * register A channel 3 (read/write). - * DBTA3 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 3 (read/write). - * DBSB3 Direct Memory Access (DMA) Buffer Start address - * register B channel 3 (read/write). - * DBTB3 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 3 (read/write). - * - * DDAR4 Direct Memory Access (DMA) Device Address Register - * channel 4 (read/write). - * DCSR4 Direct Memory Access (DMA) Control and Status - * Register channel 4 (read/write). - * DBSA4 Direct Memory Access (DMA) Buffer Start address - * register A channel 4 (read/write). - * DBTA4 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 4 (read/write). - * DBSB4 Direct Memory Access (DMA) Buffer Start address - * register B channel 4 (read/write). - * DBTB4 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 4 (read/write). - * - * DDAR5 Direct Memory Access (DMA) Device Address Register - * channel 5 (read/write). - * DCSR5 Direct Memory Access (DMA) Control and Status - * Register channel 5 (read/write). - * DBSA5 Direct Memory Access (DMA) Buffer Start address - * register A channel 5 (read/write). - * DBTA5 Direct Memory Access (DMA) Buffer Transfer count - * register A channel 5 (read/write). - * DBSB5 Direct Memory Access (DMA) Buffer Start address - * register B channel 5 (read/write). - * DBTB5 Direct Memory Access (DMA) Buffer Transfer count - * register B channel 5 (read/write). - */ - -#define DMASp 0x00000020 /* DMA control reg. Space [byte] */ - -#define DDAR(Nb) __REG(0xB0000000 + (Nb)*DMASp) /* DMA Device Address Reg. channel [0..5] */ -#define SetDCSR(Nb) __REG(0xB0000004 + (Nb)*DMASp) /* Set DMA Control & Status Reg. channel [0..5] (write) */ -#define ClrDCSR(Nb) __REG(0xB0000008 + (Nb)*DMASp) /* Clear DMA Control & Status Reg. channel [0..5] (write) */ -#define RdDCSR(Nb) __REG(0xB000000C + (Nb)*DMASp) /* Read DMA Control & Status Reg. channel [0..5] (read) */ -#define DBSA(Nb) __REG(0xB0000010 + (Nb)*DMASp) /* DMA Buffer Start address reg. A channel [0..5] */ -#define DBTA(Nb) __REG(0xB0000014 + (Nb)*DMASp) /* DMA Buffer Transfer count reg. A channel [0..5] */ -#define DBSB(Nb) __REG(0xB0000018 + (Nb)*DMASp) /* DMA Buffer Start address reg. B channel [0..5] */ -#define DBTB(Nb) __REG(0xB000001C + (Nb)*DMASp) /* DMA Buffer Transfer count reg. B channel [0..5] */ - -#define DDAR_RW 0x00000001 /* device data Read/Write */ -#define DDAR_DevWr (DDAR_RW*0) /* Device data Write */ - /* (memory -> device) */ -#define DDAR_DevRd (DDAR_RW*1) /* Device data Read */ - /* (device -> memory) */ -#define DDAR_E 0x00000002 /* big/little Endian device */ -#define DDAR_LtlEnd (DDAR_E*0) /* Little Endian device */ -#define DDAR_BigEnd (DDAR_E*1) /* Big Endian device */ -#define DDAR_BS 0x00000004 /* device Burst Size */ -#define DDAR_Brst4 (DDAR_BS*0) /* Burst-of-4 device */ -#define DDAR_Brst8 (DDAR_BS*1) /* Burst-of-8 device */ -#define DDAR_DW 0x00000008 /* device Data Width */ -#define DDAR_8BitDev (DDAR_DW*0) /* 8-Bit Device */ -#define DDAR_16BitDev (DDAR_DW*1) /* 16-Bit Device */ -#define DDAR_DS Fld (4, 4) /* Device Select */ -#define DDAR_Ser0UDCTr /* Ser. port 0 UDC Transmit */ \ - (0x0 << FShft (DDAR_DS)) -#define DDAR_Ser0UDCRc /* Ser. port 0 UDC Receive */ \ - (0x1 << FShft (DDAR_DS)) -#define DDAR_Ser1SDLCTr /* Ser. port 1 SDLC Transmit */ \ - (0x2 << FShft (DDAR_DS)) -#define DDAR_Ser1SDLCRc /* Ser. port 1 SDLC Receive */ \ - (0x3 << FShft (DDAR_DS)) -#define DDAR_Ser1UARTTr /* Ser. port 1 UART Transmit */ \ - (0x4 << FShft (DDAR_DS)) -#define DDAR_Ser1UARTRc /* Ser. port 1 UART Receive */ \ - (0x5 << FShft (DDAR_DS)) -#define DDAR_Ser2ICPTr /* Ser. port 2 ICP Transmit */ \ - (0x6 << FShft (DDAR_DS)) -#define DDAR_Ser2ICPRc /* Ser. port 2 ICP Receive */ \ - (0x7 << FShft (DDAR_DS)) -#define DDAR_Ser3UARTTr /* Ser. port 3 UART Transmit */ \ - (0x8 << FShft (DDAR_DS)) -#define DDAR_Ser3UARTRc /* Ser. port 3 UART Receive */ \ - (0x9 << FShft (DDAR_DS)) -#define DDAR_Ser4MCP0Tr /* Ser. port 4 MCP 0 Transmit */ \ - /* (audio) */ \ - (0xA << FShft (DDAR_DS)) -#define DDAR_Ser4MCP0Rc /* Ser. port 4 MCP 0 Receive */ \ - /* (audio) */ \ - (0xB << FShft (DDAR_DS)) -#define DDAR_Ser4MCP1Tr /* Ser. port 4 MCP 1 Transmit */ \ - /* (telecom) */ \ - (0xC << FShft (DDAR_DS)) -#define DDAR_Ser4MCP1Rc /* Ser. port 4 MCP 1 Receive */ \ - /* (telecom) */ \ - (0xD << FShft (DDAR_DS)) -#define DDAR_Ser4SSPTr /* Ser. port 4 SSP Transmit */ \ - (0xE << FShft (DDAR_DS)) -#define DDAR_Ser4SSPRc /* Ser. port 4 SSP Receive */ \ - (0xF << FShft (DDAR_DS)) -#define DDAR_DA Fld (24, 8) /* Device Address */ -#define DDAR_DevAdd(Add) /* Device Address */ \ - (((Add) & 0xF0000000) | \ - (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2))) -#define DDAR_Ser0UDCWr /* Ser. port 0 UDC Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCTr + DDAR_DevAdd (__PREG(Ser0UDCDR))) -#define DDAR_Ser0UDCRd /* Ser. port 0 UDC Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCRc + DDAR_DevAdd (__PREG(Ser0UDCDR))) -#define DDAR_Ser1UARTWr /* Ser. port 1 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTTr + DDAR_DevAdd (__PREG(Ser1UTDR))) -#define DDAR_Ser1UARTRd /* Ser. port 1 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTRc + DDAR_DevAdd (__PREG(Ser1UTDR))) -#define DDAR_Ser1SDLCWr /* Ser. port 1 SDLC Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCTr + DDAR_DevAdd (__PREG(Ser1SDDR))) -#define DDAR_Ser1SDLCRd /* Ser. port 1 SDLC Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCRc + DDAR_DevAdd (__PREG(Ser1SDDR))) -#define DDAR_Ser2UARTWr /* Ser. port 2 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (__PREG(Ser2UTDR))) -#define DDAR_Ser2UARTRd /* Ser. port 2 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (__PREG(Ser2UTDR))) -#define DDAR_Ser2HSSPWr /* Ser. port 2 HSSP Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (__PREG(Ser2HSDR))) -#define DDAR_Ser2HSSPRd /* Ser. port 2 HSSP Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (__PREG(Ser2HSDR))) -#define DDAR_Ser3UARTWr /* Ser. port 3 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTTr + DDAR_DevAdd (__PREG(Ser3UTDR))) -#define DDAR_Ser3UARTRd /* Ser. port 3 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTRc + DDAR_DevAdd (__PREG(Ser3UTDR))) -#define DDAR_Ser4MCP0Wr /* Ser. port 4 MCP 0 Write (audio) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Tr + DDAR_DevAdd (__PREG(Ser4MCDR0))) -#define DDAR_Ser4MCP0Rd /* Ser. port 4 MCP 0 Read (audio) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Rc + DDAR_DevAdd (__PREG(Ser4MCDR0))) -#define DDAR_Ser4MCP1Wr /* Ser. port 4 MCP 1 Write */ \ - /* (telecom) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Tr + DDAR_DevAdd (__PREG(Ser4MCDR1))) -#define DDAR_Ser4MCP1Rd /* Ser. port 4 MCP 1 Read */ \ - /* (telecom) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Rc + DDAR_DevAdd (__PREG(Ser4MCDR1))) -#define DDAR_Ser4SSPWr /* Ser. port 4 SSP Write (16 bits) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPTr + DDAR_DevAdd (__PREG(Ser4SSDR))) -#define DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPRc + DDAR_DevAdd (__PREG(Ser4SSDR))) - -#define DCSR_RUN 0x00000001 /* DMA RUNing */ -#define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ -#define DCSR_ERROR 0x00000004 /* DMA ERROR */ -#define DCSR_DONEA 0x00000008 /* DONE DMA transfer buffer A */ -#define DCSR_STRTA 0x00000010 /* STaRTed DMA transfer buffer A */ -#define DCSR_DONEB 0x00000020 /* DONE DMA transfer buffer B */ -#define DCSR_STRTB 0x00000040 /* STaRTed DMA transfer buffer B */ -#define DCSR_BIU 0x00000080 /* DMA Buffer In Use */ -#define DCSR_BufA (DCSR_BIU*0) /* DMA Buffer A in use */ -#define DCSR_BufB (DCSR_BIU*1) /* DMA Buffer B in use */ - -#define DBT_TC Fld (13, 0) /* Transfer Count */ -#define DBTA_TCA DBT_TC /* Transfer Count buffer A */ -#define DBTB_TCB DBT_TC /* Transfer Count buffer B */ - - -/* - * Liquid Crystal Display (LCD) control registers - * - * Registers - * LCCR0 Liquid Crystal Display (LCD) Control Register 0 - * (read/write). - * [Bits LDM, BAM, and ERM are only implemented in - * versions 2.0 (rev. = 8) and higher of the StrongARM - * SA-1100.] - * LCSR Liquid Crystal Display (LCD) Status Register - * (read/write). - * [Bit LDD can be only read in versions 1.0 (rev. = 1) - * and 1.1 (rev. = 2) of the StrongARM SA-1100, it can be - * read and written (cleared) in versions 2.0 (rev. = 8) - * and higher.] - * DBAR1 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Base Address Register channel 1 (read/write). - * DCAR1 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Current Address Register channel 1 (read). - * DBAR2 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Base Address Register channel 2 (read/write). - * DCAR2 Liquid Crystal Display (LCD) Direct Memory Access - * (DMA) Current Address Register channel 2 (read). - * LCCR1 Liquid Crystal Display (LCD) Control Register 1 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher.] - * LCCR2 Liquid Crystal Display (LCD) Control Register 2 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher.] - * LCCR3 Liquid Crystal Display (LCD) Control Register 3 - * (read/write). - * [The LCCR1 register can be only written in - * versions 1.0 (rev. = 1) and 1.1 (rev. = 2) of the - * StrongARM SA-1100, it can be written and read in - * versions 2.0 (rev. = 8) and higher. Bit PCP is only - * implemented in versions 2.0 (rev. = 8) and higher of - * the StrongARM SA-1100.] - * - * Clocks - * fcpu, Tcpu Frequency, period of the CPU core clock (CCLK). - * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). - * fpix, Tpix Frequency, period of the pixel clock. - * fln, Tln Frequency, period of the line clock. - * fac, Tac Frequency, period of the AC bias clock. - */ - -#define LCD_PEntrySp 2 /* LCD Palette Entry Space [byte] */ -#define LCD_4BitPSp /* LCD 4-Bit pixel Palette Space */ \ - /* [byte] */ \ - (16*LCD_PEntrySp) -#define LCD_8BitPSp /* LCD 8-Bit pixel Palette Space */ \ - /* [byte] */ \ - (256*LCD_PEntrySp) -#define LCD_12_16BitPSp /* LCD 12/16-Bit pixel */ \ - /* dummy-Palette Space [byte] */ \ - (16*LCD_PEntrySp) - -#define LCD_PGrey Fld (4, 0) /* LCD Palette entry Grey value */ -#define LCD_PBlue Fld (4, 0) /* LCD Palette entry Blue value */ -#define LCD_PGreen Fld (4, 4) /* LCD Palette entry Green value */ -#define LCD_PRed Fld (4, 8) /* LCD Palette entry Red value */ -#define LCD_PBS Fld (2, 12) /* LCD Pixel Bit Size */ -#define LCD_4Bit /* LCD 4-Bit pixel mode */ \ - (0 << FShft (LCD_PBS)) -#define LCD_8Bit /* LCD 8-Bit pixel mode */ \ - (1 << FShft (LCD_PBS)) -#define LCD_12_16Bit /* LCD 12/16-Bit pixel mode */ \ - (2 << FShft (LCD_PBS)) - -#define LCD_Int0_0 0x0 /* LCD Intensity = 0.0% = 0 */ -#define LCD_Int11_1 0x1 /* LCD Intensity = 11.1% = 1/9 */ -#define LCD_Int20_0 0x2 /* LCD Intensity = 20.0% = 1/5 */ -#define LCD_Int26_7 0x3 /* LCD Intensity = 26.7% = 4/15 */ -#define LCD_Int33_3 0x4 /* LCD Intensity = 33.3% = 3/9 */ -#define LCD_Int40_0 0x5 /* LCD Intensity = 40.0% = 2/5 */ -#define LCD_Int44_4 0x6 /* LCD Intensity = 44.4% = 4/9 */ -#define LCD_Int50_0 0x7 /* LCD Intensity = 50.0% = 1/2 */ -#define LCD_Int55_6 0x8 /* LCD Intensity = 55.6% = 5/9 */ -#define LCD_Int60_0 0x9 /* LCD Intensity = 60.0% = 3/5 */ -#define LCD_Int66_7 0xA /* LCD Intensity = 66.7% = 6/9 */ -#define LCD_Int73_3 0xB /* LCD Intensity = 73.3% = 11/15 */ -#define LCD_Int80_0 0xC /* LCD Intensity = 80.0% = 4/5 */ -#define LCD_Int88_9 0xD /* LCD Intensity = 88.9% = 8/9 */ -#define LCD_Int100_0 0xE /* LCD Intensity = 100.0% = 1 */ -#define LCD_Int100_0A 0xF /* LCD Intensity = 100.0% = 1 */ - /* (Alternative) */ - -#define LCCR0 __REG(0xB0100000) /* LCD Control Reg. 0 */ -#define LCSR __REG(0xB0100004) /* LCD Status Reg. */ -#define DBAR1 __REG(0xB0100010) /* LCD DMA Base Address Reg. channel 1 */ -#define DCAR1 __REG(0xB0100014) /* LCD DMA Current Address Reg. channel 1 */ -#define DBAR2 __REG(0xB0100018) /* LCD DMA Base Address Reg. channel 2 */ -#define DCAR2 __REG(0xB010001C) /* LCD DMA Current Address Reg. channel 2 */ -#define LCCR1 __REG(0xB0100020) /* LCD Control Reg. 1 */ -#define LCCR2 __REG(0xB0100024) /* LCD Control Reg. 2 */ -#define LCCR3 __REG(0xB0100028) /* LCD Control Reg. 3 */ - -#define LCCR0_LEN 0x00000001 /* LCD ENable */ -#define LCCR0_CMS 0x00000002 /* Color/Monochrome display Select */ -#define LCCR0_Color (LCCR0_CMS*0) /* Color display */ -#define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ -#define LCCR0_SDS 0x00000004 /* Single/Dual panel display */ - /* Select */ -#define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ -#define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ -#define LCCR0_LDM 0x00000008 /* LCD Disable done (LDD) */ - /* interrupt Mask (disable) */ -#define LCCR0_BAM 0x00000010 /* Base Address update (BAU) */ - /* interrupt Mask (disable) */ -#define LCCR0_ERM 0x00000020 /* LCD ERror (BER, IOL, IUL, IOU, */ - /* IUU, OOL, OUL, OOU, and OUU) */ - /* interrupt Mask (disable) */ -#define LCCR0_PAS 0x00000080 /* Passive/Active display Select */ -#define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ -#define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ -#define LCCR0_BLE 0x00000100 /* Big/Little Endian select */ -#define LCCR0_LtlEnd (LCCR0_BLE*0) /* Little Endian frame buffer */ -#define LCCR0_BigEnd (LCCR0_BLE*1) /* Big Endian frame buffer */ -#define LCCR0_DPD 0x00000200 /* Double Pixel Data (monochrome */ - /* display mode) */ -#define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome */ - /* display */ -#define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome */ - /* display */ -#define LCCR0_PDD Fld (8, 12) /* Palette DMA request Delay */ - /* [Tmem] */ -#define LCCR0_DMADel(Tcpu) /* palette DMA request Delay */ \ - /* [0..510 Tcpu] */ \ - ((Tcpu)/2 << FShft (LCCR0_PDD)) - -#define LCSR_LDD 0x00000001 /* LCD Disable Done */ -#define LCSR_BAU 0x00000002 /* Base Address Update (read) */ -#define LCSR_BER 0x00000004 /* Bus ERror */ -#define LCSR_ABC 0x00000008 /* AC Bias clock Count */ -#define LCSR_IOL 0x00000010 /* Input FIFO Over-run Lower */ - /* panel */ -#define LCSR_IUL 0x00000020 /* Input FIFO Under-run Lower */ - /* panel */ -#define LCSR_IOU 0x00000040 /* Input FIFO Over-run Upper */ - /* panel */ -#define LCSR_IUU 0x00000080 /* Input FIFO Under-run Upper */ - /* panel */ -#define LCSR_OOL 0x00000100 /* Output FIFO Over-run Lower */ - /* panel */ -#define LCSR_OUL 0x00000200 /* Output FIFO Under-run Lower */ - /* panel */ -#define LCSR_OOU 0x00000400 /* Output FIFO Over-run Upper */ - /* panel */ -#define LCSR_OUU 0x00000800 /* Output FIFO Under-run Upper */ - /* panel */ - -#define LCCR1_PPL Fld (6, 4) /* Pixels Per Line/16 - 1 */ -#define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ - (((Pixel) - 16)/16 << FShft (LCCR1_PPL)) -#define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ - /* pulse Width - 1 [Tpix] (L_LCLK) */ -#define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [1..64 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_HSW)) -#define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ -#define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) -#define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ -#define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) - -#define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ -#define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) -#define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ -#define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) -#define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ -#define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) -#define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ -#define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) - -#define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ - /* [1..255] (L_PCLK) */ - /* fpix = fcpu/(2*(PCD + 2)) */ - /* Tpix = 2*(PCD + 2)*Tcpu */ -#define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor [6..514] */ \ - (((Div) - 4)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Floor (Div/2)) */ - /* Tpix = 2*Floor (Div/2)*Tcpu */ -#define LCCR3_CeilPixClkDiv(Div) /* Ceil. of PixClkDiv [6..514] */ \ - (((Div) - 3)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Ceil (Div/2)) */ - /* Tpix = 2*Ceil (Div/2)*Tcpu */ -#define LCCR3_ACB Fld (8, 8) /* AC Bias clock half period - 1 */ - /* [Tln] (L_BIAS) */ -#define LCCR3_ACBsDiv(Div) /* AC Bias clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Floor (Div/2)) */ - /* Tac = 2*Floor (Div/2)*Tln */ -#define LCCR3_CeilACBsDiv(Div) /* Ceil. of ACBsDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Ceil (Div/2)) */ - /* Tac = 2*Ceil (Div/2)*Tln */ -#define LCCR3_API Fld (4, 16) /* AC bias Pin transitions per */ - /* Interrupt */ -#define LCCR3_ACBsCntOff /* AC Bias clock transition Count */ \ - /* Off */ \ - (0 << FShft (LCCR3_API)) -#define LCCR3_ACBsCnt(Trans) /* AC Bias clock transition Count */ \ - /* [1..15] */ \ - ((Trans) << FShft (LCCR3_API)) -#define LCCR3_VSP 0x00100000 /* Vertical Synchronization pulse */ - /* Polarity (L_FCLK) */ -#define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ -#define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ -#define LCCR3_HSP 0x00200000 /* Horizontal Synchronization */ - /* pulse Polarity (L_LCLK) */ -#define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ -#define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - /* pulse active Low */ -#define LCCR3_PCP 0x00400000 /* Pixel Clock Polarity (L_PCLK) */ -#define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ -#define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ -#define LCCR3_OEP 0x00800000 /* Output Enable Polarity (L_BIAS, */ - /* active display mode) */ -#define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ -#define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#ifndef __ASSEMBLY__ -extern unsigned int processor_id; -#endif - -#define CPU_REVISION (processor_id & 15) -#define CPU_SA1110_A0 (0) -#define CPU_SA1110_B0 (4) -#define CPU_SA1110_B1 (5) -#define CPU_SA1110_B2 (6) -#define CPU_SA1110_B4 (8) - -#define CPU_SA1100_ID (0x4401a110) -#define CPU_SA1100_MASK (0xfffffff0) -#define CPU_SA1110_ID (0x6901b110) -#define CPU_SA1110_MASK (0xfffffff0) diff --git a/include/asm-arm/arch-sa1100/SA-1101.h b/include/asm-arm/arch-sa1100/SA-1101.h deleted file mode 100644 index 65ca8c7..0000000 --- a/include/asm-arm/arch-sa1100/SA-1101.h +++ /dev/null @@ -1,925 +0,0 @@ -/* - * SA-1101.h - * - * Copyright (c) Peter Danielsson 1999 - * - * Definition of constants related to the sa1101 - * support chip for the sa1100 - * - */ - - -/* Be sure that virtual mapping is defined right */ -#ifndef __ASM_ARCH_HARDWARE_H -#error You must include hardware.h not SA-1101.h -#endif - -#ifndef SA1101_BASE -#error You must define SA-1101 physical base address -#endif - -#ifndef LANGUAGE -# ifdef __ASSEMBLY__ -# define LANGUAGE Assembly -# else -# define LANGUAGE C -# endif -#endif - -/* - * We have mapped the sa1101 depending on the value of SA1101_BASE. - * It then appears from 0xf4000000. - */ - -#define SA1101_p2v( x ) ((x) - SA1101_BASE + 0xf4000000) -#define SA1101_v2p( x ) ((x) - 0xf4000000 + SA1101_BASE) - -#ifndef SA1101_p2v -#define SA1101_p2v(PhAdd) (PhAdd) -#endif - -#include - -#define C 0 -#define Assembly 1 - - -/* - * Memory map - */ - -#define __SHMEM_CONTROL0 0x00000000 -#define __SYSTEM_CONTROL1 0x00000400 -#define __ARBITER 0x00020000 -#define __SYSTEM_CONTROL2 0x00040000 -#define __SYSTEM_CONTROL3 0x00060000 -#define __PARALLEL_PORT 0x00080000 -#define __VIDMEM_CONTROL 0x00100000 -#define __UPDATE_FIFO 0x00120000 -#define __SHMEM_CONTROL1 0x00140000 -#define __INTERRUPT_CONTROL 0x00160000 -#define __USB_CONTROL 0x00180000 -#define __TRACK_INTERFACE 0x001a0000 -#define __MOUSE_INTERFACE 0x001b0000 -#define __KEYPAD_INTERFACE 0x001c0000 -#define __PCMCIA_INTERFACE 0x001e0000 -#define __VGA_CONTROL 0x00200000 -#define __GPIO_INTERFACE 0x00300000 - -/* - * Macro that calculates real address for registers in the SA-1101 - */ - -#define _SA1101( x ) ((x) + SA1101_BASE) - -/* - * Interface and shared memory controller registers - * - * Registers - * SKCR SA-1101 control register (read/write) - * SMCR Shared Memory Controller Register - * SNPR Snoop Register - */ - -#define _SKCR _SA1101( 0x00000000 ) /* SA-1101 Control Reg. */ -#define _SMCR _SA1101( 0x00140000 ) /* Shared Mem. Control Reg. */ -#define _SNPR _SA1101( 0x00140400 ) /* Snoop Reg. */ - -#if LANGUAGE == C -#define SKCR (*((volatile Word *) SA1101_p2v (_SKCR))) -#define SMCR (*((volatile Word *) SA1101_p2v (_SMCR))) -#define SNPR (*((volatile Word *) SA1101_p2v (_SNPR))) - -#define SKCR_PLLEn 0x0001 /* Enable On-Chip PLL */ -#define SKCR_BCLKEn 0x0002 /* Enables BCLK */ -#define SKCR_Sleep 0x0004 /* Sleep Mode */ -#define SKCR_IRefEn 0x0008 /* DAC Iref input enable */ -#define SKCR_VCOON 0x0010 /* VCO bias */ -#define SKCR_ScanTestEn 0x0020 /* Enables scan test */ -#define SKCR_ClockTestEn 0x0040 /* Enables clock test */ - -#define SMCR_DCAC Fld(2,0) /* Number of column address bits */ -#define SMCR_DRAC Fld(2,2) /* Number of row address bits */ -#define SMCR_ArbiterBias 0x0008 /* favor video or USB */ -#define SMCR_TopVidMem Fld(4,5) /* Top 4 bits of vidmem addr. */ - -#define SMCR_ColAdrBits( x ) /* col. addr bits 8..11 */ \ - (( (x) - 8 ) << FShft (SMCR_DCAC)) -#define SMCR_RowAdrBits( x ) /* row addr bits 9..12 */\ - (( (x) - 9 ) << FShft (SMCR_DRAC)) - -#define SNPR_VFBstart Fld(12,0) /* Video frame buffer addr */ -#define SNPR_VFBsize Fld(11,12) /* Video frame buffer size */ -#define SNPR_WholeBank (1 << 23) /* Whole bank bit */ -#define SNPR_BankSelect Fld(2,27) /* Bank select */ -#define SNPR_SnoopEn (1 << 31) /* Enable snoop operation */ - -#define SNPR_Set_VFBsize( x ) /* set frame buffer size (in kb) */ \ - ( (x) << FShft (SNPR_VFBsize)) -#define SNPR_Select_Bank(x) /* select bank 0 or 1 */ \ - (( (x) + 1 ) << FShft (SNPR_BankSelect )) - -#endif /* LANGUAGE == C */ - -/* - * Video Memory Controller - * - * Registers - * VMCCR Configuration register - * VMCAR VMC address register - * VMCDR VMC data register - * - */ - -#define _VMCCR _SA1101( 0x00100000 ) /* Configuration register */ -#define _VMCAR _SA1101( 0x00101000 ) /* VMC address register */ -#define _VMCDR _SA1101( 0x00101400 ) /* VMC data register */ - -#if LANGUAGE == C -#define VMCCR (*((volatile Word *) SA1101_p2v (_VMCCR))) -#define VMCAR (*((volatile Word *) SA1101_p2v (_VMCAR))) -#define VMCDR (*((volatile Word *) SA1101_p2v (_VMCDR))) - -#define VMCCR_RefreshEn 0x0000 /* Enable memory refresh */ -#define VMCCR_Config 0x0001 /* DRAM size */ -#define VMCCR_RefPeriod Fld(2,3) /* Refresh period */ -#define VMCCR_StaleDataWait Fld(4,5) /* Stale FIFO data timeout counter */ -#define VMCCR_SleepState (1<<9) /* State of interface pins in sleep*/ -#define VMCCR_RefTest (1<<10) /* refresh test */ -#define VMCCR_RefLow Fld(6,11) /* refresh low counter */ -#define VMCCR_RefHigh Fld(7,17) /* refresh high counter */ -#define VMCCR_SDTCTest Fld(7,24) /* stale data timeout counter */ -#define VMCCR_ForceSelfRef (1<<31) /* Force self refresh */ - -#endif LANGUAGE == C - - -/* Update FIFO - * - * Registers - * UFCR Update FIFO Control Register - * UFSR Update FIFO Status Register - * UFLVLR update FIFO level register - * UFDR update FIFO data register - */ - -#define _UFCR _SA1101(0x00120000) /* Update FIFO Control Reg. */ -#define _UFSR _SA1101(0x00120400) /* Update FIFO Status Reg. */ -#define _UFLVLR _SA1101(0x00120800) /* Update FIFO level reg. */ -#define _UFDR _SA1101(0x00120c00) /* Update FIFO data reg. */ - -#if LANGUAGE == C - -#define UFCR (*((volatile Word *) SA1101_p2v (_UFCR))) -#define UFSR (*((volatile Word *) SA1101_p2v (_UFSR))) -#define UFLVLR (*((volatile Word *) SA1101_p2v (_UFLVLR))) -#define UFDR (*((volatile Word *) SA1101_p2v (_UFDR))) - - -#define UFCR_FifoThreshhold Fld(7,0) /* Level for FifoGTn flag */ - -#define UFSR_FifoGTnFlag 0x01 /* FifoGTn flag */#define UFSR_FifoEmpty 0x80 /* FIFO is empty */ - -#endif /* LANGUAGE == C */ - -/* System Controller - * - * Registers - * SKPCR Power Control Register - * SKCDR Clock Divider Register - * DACDR1 DAC1 Data register - * DACDR2 DAC2 Data register - */ - -#define _SKPCR _SA1101(0x00000400) -#define _SKCDR _SA1101(0x00040000) -#define _DACDR1 _SA1101(0x00060000) -#define _DACDR2 _SA1101(0x00060400) - -#if LANGUAGE == C -#define SKPCR (*((volatile Word *) SA1101_p2v (_SKPCR))) -#define SKCDR (*((volatile Word *) SA1101_p2v (_SKCDR))) -#define DACDR1 (*((volatile Word *) SA1101_p2v (_DACDR1))) -#define DACDR2 (*((volatile Word *) SA1101_p2v (_DACDR2))) - -#define SKPCR_UCLKEn 0x01 /* USB Enable */ -#define SKPCR_PCLKEn 0x02 /* PS/2 Enable */ -#define SKPCR_ICLKEn 0x04 /* Interrupt Controller Enable */ -#define SKPCR_VCLKEn 0x08 /* Video Controller Enable */ -#define SKPCR_PICLKEn 0x10 /* parallel port Enable */ -#define SKPCR_DCLKEn 0x20 /* DACs Enable */ -#define SKPCR_nKPADEn 0x40 /* Multiplexer */ - -#define SKCDR_PLLMul Fld(7,0) /* PLL Multiplier */ -#define SKCDR_VCLKEn Fld(2,7) /* Video controller clock divider */ -#define SKDCR_BCLKEn (1<<9) /* BCLK Divider */ -#define SKDCR_UTESTCLKEn (1<<10) /* Route USB clock during test mode */ -#define SKDCR_DivRValue Fld(6,11) /* Input clock divider for PLL */ -#define SKDCR_DivNValue Fld(5,17) /* Output clock divider for PLL */ -#define SKDCR_PLLRSH Fld(3,22) /* PLL bandwidth control */ -#define SKDCR_ChargePump (1<<25) /* Charge pump control */ -#define SKDCR_ClkTestMode (1<<26) /* Clock output test mode */ -#define SKDCR_ClkTestEn (1<<27) /* Test clock generator */ -#define SKDCR_ClkJitterCntl Fld(3,28) /* video clock jitter compensation */ - -#define DACDR_DACCount Fld(8,0) /* Count value */ -#define DACDR1_DACCount DACDR_DACCount -#define DACDR2_DACCount DACDR_DACCount - -#endif /* LANGUAGE == C */ - -/* - * Parallel Port Interface - * - * Registers - * IEEE_Config IEEE mode selection and programmable attributes - * IEEE_Control Controls the states of IEEE port control outputs - * IEEE_Data Forward transfer data register - * IEEE_Addr Forward transfer address register - * IEEE_Status Port IO signal status register - * IEEE_IntStatus Port interrupts status register - * IEEE_FifoLevels Rx and Tx FIFO interrupt generation levels - * IEEE_InitTime Forward timeout counter initial value - * IEEE_TimerStatus Forward timeout counter current value - * IEEE_FifoReset Reset forward transfer FIFO - * IEEE_ReloadValue Counter reload value - * IEEE_TestControl Control testmode - * IEEE_TestDataIn Test data register - * IEEE_TestDataInEn Enable test data - * IEEE_TestCtrlIn Test control signals - * IEEE_TestCtrlInEn Enable test control signals - * IEEE_TestDataStat Current data bus value - * - */ - -/* - * The control registers are defined as offsets from a base address - */ - -#define _IEEE( x ) _SA1101( (x) + __PARALLEL_PORT ) - -#define _IEEE_Config _IEEE( 0x0000 ) -#define _IEEE_Control _IEEE( 0x0400 ) -#define _IEEE_Data _IEEE( 0x4000 ) -#define _IEEE_Addr _IEEE( 0x0800 ) -#define _IEEE_Status _IEEE( 0x0c00 ) -#define _IEEE_IntStatus _IEEE( 0x1000 ) -#define _IEEE_FifoLevels _IEEE( 0x1400 ) -#define _IEEE_InitTime _IEEE( 0x1800 ) -#define _IEEE_TimerStatus _IEEE( 0x1c00 ) -#define _IEEE_FifoReset _IEEE( 0x2000 ) -#define _IEEE_ReloadValue _IEEE( 0x3c00 ) -#define _IEEE_TestControl _IEEE( 0x2400 ) -#define _IEEE_TestDataIn _IEEE( 0x2800 ) -#define _IEEE_TestDataInEn _IEEE( 0x2c00 ) -#define _IEEE_TestCtrlIn _IEEE( 0x3000 ) -#define _IEEE_TestCtrlInEn _IEEE( 0x3400 ) -#define _IEEE_TestDataStat _IEEE( 0x3800 ) - - -#if LANGUAGE == C -#define IEEE_Config (*((volatile Word *) SA1101_p2v (_IEEE_Config))) -#define IEEE_Control (*((volatile Word *) SA1101_p2v (_IEEE_Control))) -#define IEEE_Data (*((volatile Word *) SA1101_p2v (_IEEE_Data))) -#define IEEE_Addr (*((volatile Word *) SA1101_p2v (_IEEE_Addr))) -#define IEEE_Status (*((volatile Word *) SA1101_p2v (_IEEE_Status))) -#define IEEE_IntStatus (*((volatile Word *) SA1101_p2v (_IEEE_IntStatus))) -#define IEEE_FifoLevels (*((volatile Word *) SA1101_p2v (_IEEE_FifoLevels))) -#define IEEE_InitTime (*((volatile Word *) SA1101_p2v (_IEEE_InitTime))) -#define IEEE_TimerStatus (*((volatile Word *) SA1101_p2v (_IEEE_TimerStatus))) -#define IEEE_FifoReset (*((volatile Word *) SA1101_p2v (_IEEE_FifoReset))) -#define IEEE_ReloadValue (*((volatile Word *) SA1101_p2v (_IEEE_ReloadValue))) -#define IEEE_TestControl (*((volatile Word *) SA1101_p2v (_IEEE_TestControl))) -#define IEEE_TestDataIn (*((volatile Word *) SA1101_p2v (_IEEE_TestDataIn))) -#define IEEE_TestDataInEn (*((volatile Word *) SA1101_p2v (_IEEE_TestDataInEn))) -#define IEEE_TestCtrlIn (*((volatile Word *) SA1101_p2v (_IEEE_TestCtrlIn))) -#define IEEE_TestCtrlInEn (*((volatile Word *) SA1101_p2v (_IEEE_TestCtrlInEn))) -#define IEEE_TestDataStat (*((volatile Word *) SA1101_p2v (_IEEE_TestDataStat))) - - -#define IEEE_Config_M Fld(3,0) /* Mode select */ -#define IEEE_Config_D 0x04 /* FIFO access enable */ -#define IEEE_Config_B 0x08 /* 9-bit word enable */ -#define IEEE_Config_T 0x10 /* Data transfer enable */ -#define IEEE_Config_A 0x20 /* Data transfer direction */ -#define IEEE_Config_E 0x40 /* Timer enable */ -#define IEEE_Control_A 0x08 /* AutoFd output */ -#define IEEE_Control_E 0x04 /* Selectin output */ -#define IEEE_Control_T 0x02 /* Strobe output */ -#define IEEE_Control_I 0x01 /* Port init output */ -#define IEEE_Data_C (1<<31) /* Byte count */ -#define IEEE_Data_Db Fld(9,16) /* Data byte 2 */ -#define IEEE_Data_Da Fld(9,0) /* Data byte 1 */ -#define IEEE_Addr_A Fld(8,0) /* forward address transfer byte */ -#define IEEE_Status_A 0x0100 /* nAutoFd port output status */ -#define IEEE_Status_E 0x0080 /* nSelectIn port output status */ -#define IEEE_Status_T 0x0040 /* nStrobe port output status */ -#define IEEE_Status_I 0x0020 /* nInit port output status */ -#define IEEE_Status_B 0x0010 /* Busy port inout status */ -#define IEEE_Status_S 0x0008 /* Select port input status */ -#define IEEE_Status_K 0x0004 /* nAck port input status */ -#define IEEE_Status_F 0x0002 /* nFault port input status */ -#define IEEE_Status_R 0x0001 /* pError port input status */ - -#define IEEE_IntStatus_IntReqDat 0x0100 -#define IEEE_IntStatus_IntReqEmp 0x0080 -#define IEEE_IntStatus_IntReqInt 0x0040 -#define IEEE_IntStatus_IntReqRav 0x0020 -#define IEEE_IntStatus_IntReqTim 0x0010 -#define IEEE_IntStatus_RevAddrComp 0x0008 -#define IEEE_IntStatus_RevDataComp 0x0004 -#define IEEE_IntStatus_FwdAddrComp 0x0002 -#define IEEE_IntStatus_FwdDataComp 0x0001 -#define IEEE_FifoLevels_RevFifoLevel 2 -#define IEEE_FifoLevels_FwdFifoLevel 1 -#define IEEE_InitTime_TimValInit Fld(22,0) -#define IEEE_TimerStatus_TimValStat Fld(22,0) -#define IEEE_ReloadValue_Reload Fld(4,0) - -#define IEEE_TestControl_RegClk 0x04 -#define IEEE_TestControl_ClockSelect Fld(2,1) -#define IEEE_TestControl_TimerTestModeEn 0x01 -#define IEEE_TestCtrlIn_PError 0x10 -#define IEEE_TestCtrlIn_nFault 0x08 -#define IEEE_TestCtrlIn_nAck 0x04 -#define IEEE_TestCtrlIn_PSel 0x02 -#define IEEE_TestCtrlIn_Busy 0x01 - -#endif /* LANGUAGE == C */ - -/* - * VGA Controller - * - * Registers - * VideoControl Video Control Register - * VgaTiming0 VGA Timing Register 0 - * VgaTiming1 VGA Timing Register 1 - * VgaTiming2 VGA Timing Register 2 - * VgaTiming3 VGA Timing Register 3 - * VgaBorder VGA Border Color Register - * VgaDBAR VGADMA Base Address Register - * VgaDCAR VGADMA Channel Current Address Register - * VgaStatus VGA Status Register - * VgaInterruptMask VGA Interrupt Mask Register - * VgaPalette VGA Palette Registers - * DacControl DAC Control Register - * VgaTest VGA Controller Test Register - */ - -#define _VGA( x ) _SA1101( ( x ) + __VGA_CONTROL ) - -#define _VideoControl _VGA( 0x0000 ) -#define _VgaTiming0 _VGA( 0x0400 ) -#define _VgaTiming1 _VGA( 0x0800 ) -#define _VgaTiming2 _VGA( 0x0c00 ) -#define _VgaTiming3 _VGA( 0x1000 ) -#define _VgaBorder _VGA( 0x1400 ) -#define _VgaDBAR _VGA( 0x1800 ) -#define _VgaDCAR _VGA( 0x1c00 ) -#define _VgaStatus _VGA( 0x2000 ) -#define _VgaInterruptMask _VGA( 0x2400 ) -#define _VgaPalette _VGA( 0x40000 ) -#define _DacControl _VGA( 0x3000 ) -#define _VgaTest _VGA( 0x2c00 ) - -#if (LANGUAGE == C) -#define VideoControl (*((volatile Word *) SA1101_p2v (_VideoControl))) -#define VgaTiming0 (*((volatile Word *) SA1101_p2v (_VgaTiming0))) -#define VgaTiming1 (*((volatile Word *) SA1101_p2v (_VgaTiming1))) -#define VgaTiming2 (*((volatile Word *) SA1101_p2v (_VgaTiming2))) -#define VgaTiming3 (*((volatile Word *) SA1101_p2v (_VgaTiming3))) -#define VgaBorder (*((volatile Word *) SA1101_p2v (_VgaBorder))) -#define VgaDBAR (*((volatile Word *) SA1101_p2v (_VgaDBAR))) -#define VgaDCAR (*((volatile Word *) SA1101_p2v (_VgaDCAR))) -#define VgaStatus (*((volatile Word *) SA1101_p2v (_VgaStatus))) -#define VgaInterruptMask (*((volatile Word *) SA1101_p2v (_VgaInterruptMask))) -#define VgaPalette (*((volatile Word *) SA1101_p2v (_VgaPalette))) -#define DacControl (*((volatile Word *) SA1101_p2v (_DacControl))) -#define VgaTest (*((volatile Word *) SA1101_p2v (_VgaTest))) - -#define VideoControl_VgaEn 0x00000000 -#define VideoControl_BGR 0x00000001 -#define VideoControl_VCompVal Fld(2,2) -#define VideoControl_VgaReq Fld(4,4) -#define VideoControl_VBurstL Fld(4,8) -#define VideoControl_VMode (1<<12) -#define VideoControl_PalRead (1<<13) - -#define VgaTiming0_PPL Fld(6,2) -#define VgaTiming0_HSW Fld(8,8) -#define VgaTiming0_HFP Fld(8,16) -#define VgaTiming0_HBP Fld(8,24) - -#define VgaTiming1_LPS Fld(10,0) -#define VgaTiming1_VSW Fld(6,10) -#define VgaTiming1_VFP Fld(8,16) -#define VgaTiming1_VBP Fld(8,24) - -#define VgaTiming2_IVS 0x01 -#define VgaTiming2_IHS 0x02 -#define VgaTiming2_CVS 0x04 -#define VgaTiming2_CHS 0x08 - -#define VgaTiming3_HBS Fld(8,0) -#define VgaTiming3_HBE Fld(8,8) -#define VgaTiming3_VBS Fld(8,16) -#define VgaTiming3_VBE Fld(8,24) - -#define VgaBorder_BCOL Fld(24,0) - -#define VgaStatus_VFUF 0x01 -#define VgaStatus_VNext 0x02 -#define VgaStatus_VComp 0x04 - -#define VgaInterruptMask_VFUFMask 0x00 -#define VgaInterruptMask_VNextMask 0x01 -#define VgaInterruptMask_VCompMask 0x02 - -#define VgaPalette_R Fld(8,0) -#define VgaPalette_G Fld(8,8) -#define VgaPalette_B Fld(8,16) - -#define DacControl_DACON 0x0001 -#define DacControl_COMPON 0x0002 -#define DacControl_PEDON 0x0004 -#define DacControl_RTrim Fld(5,4) -#define DacControl_GTrim Fld(5,9) -#define DacControl_BTrim Fld(5,14) - -#define VgaTest_TDAC 0x00 -#define VgaTest_Datatest Fld(4,1) -#define VgaTest_DACTESTDAC 0x10 -#define VgaTest_DACTESTOUT Fld(3,5) - -#endif /* LANGUAGE == C */ - -/* - * USB Host Interface Controller - * - * Registers - * Revision - * Control - * CommandStatus - * InterruptStatus - * InterruptEnable - * HCCA - * PeriodCurrentED - * ControlHeadED - * BulkHeadED - * BulkCurrentED - * DoneHead - * FmInterval - * FmRemaining - * FmNumber - * PeriodicStart - * LSThreshold - * RhDescriptorA - * RhDescriptorB - * RhStatus - * RhPortStatus - * USBStatus - * USBReset - * USTAR - * USWER - * USRFR - * USNFR - * USTCSR - * USSR - * - */ - -#define _USB( x ) _SA1101( ( x ) + __USB_CONTROL ) - - -#define _Revision _USB( 0x0000 ) -#define _Control _USB( 0x0888 ) -#define _CommandStatus _USB( 0x0c00 ) -#define _InterruptStatus _USB( 0x1000 ) -#define _InterruptEnable _USB( 0x1400 ) -#define _HCCA _USB( 0x1800 ) -#define _PeriodCurrentED _USB( 0x1c00 ) -#define _ControlHeadED _USB( 0x2000 ) -#define _BulkHeadED _USB( 0x2800 ) -#define _BulkCurrentED _USB( 0x2c00 ) -#define _DoneHead _USB( 0x3000 ) -#define _FmInterval _USB( 0x3400 ) -#define _FmRemaining _USB( 0x3800 ) -#define _FmNumber _USB( 0x3c00 ) -#define _PeriodicStart _USB( 0x4000 ) -#define _LSThreshold _USB( 0x4400 ) -#define _RhDescriptorA _USB( 0x4800 ) -#define _RhDescriptorB _USB( 0x4c00 ) -#define _RhStatus _USB( 0x5000 ) -#define _RhPortStatus _USB( 0x5400 ) -#define _USBStatus _USB( 0x11800 ) -#define _USBReset _USB( 0x11c00 ) - -#define _USTAR _USB( 0x10400 ) -#define _USWER _USB( 0x10800 ) -#define _USRFR _USB( 0x10c00 ) -#define _USNFR _USB( 0x11000 ) -#define _USTCSR _USB( 0x11400 ) -#define _USSR _USB( 0x11800 ) - - -#if (LANGUAGE == C) - -#define Revision (*((volatile Word *) SA1101_p2v (_Revision))) -#define Control (*((volatile Word *) SA1101_p2v (_Control))) -#define CommandStatus (*((volatile Word *) SA1101_p2v (_CommandStatus))) -#define InterruptStatus (*((volatile Word *) SA1101_p2v (_InterruptStatus))) -#define InterruptEnable (*((volatile Word *) SA1101_p2v (_InterruptEnable))) -#define HCCA (*((volatile Word *) SA1101_p2v (_HCCA))) -#define PeriodCurrentED (*((volatile Word *) SA1101_p2v (_PeriodCurrentED))) -#define ControlHeadED (*((volatile Word *) SA1101_p2v (_ControlHeadED))) -#define BulkHeadED (*((volatile Word *) SA1101_p2v (_BulkHeadED))) -#define BulkCurrentED (*((volatile Word *) SA1101_p2v (_BulkCurrentED))) -#define DoneHead (*((volatile Word *) SA1101_p2v (_DoneHead))) -#define FmInterval (*((volatile Word *) SA1101_p2v (_FmInterval))) -#define FmRemaining (*((volatile Word *) SA1101_p2v (_FmRemaining))) -#define FmNumber (*((volatile Word *) SA1101_p2v (_FmNumber))) -#define PeriodicStart (*((volatile Word *) SA1101_p2v (_PeriodicStart))) -#define LSThreshold (*((volatile Word *) SA1101_p2v (_LSThreshold))) -#define RhDescriptorA (*((volatile Word *) SA1101_p2v (_RhDescriptorA))) -#define RhDescriptorB (*((volatile Word *) SA1101_p2v (_RhDescriptorB))) -#define RhStatus (*((volatile Word *) SA1101_p2v (_RhStatus))) -#define RhPortStatus (*((volatile Word *) SA1101_p2v (_RhPortStatus))) -#define USBStatus (*((volatile Word *) SA1101_p2v (_USBStatus))) -#define USBReset (*((volatile Word *) SA1101_p2v (_USBReset))) -#define USTAR (*((volatile Word *) SA1101_p2v (_USTAR))) -#define USWER (*((volatile Word *) SA1101_p2v (_USWER))) -#define USRFR (*((volatile Word *) SA1101_p2v (_USRFR))) -#define USNFR (*((volatile Word *) SA1101_p2v (_USNFR))) -#define USTCSR (*((volatile Word *) SA1101_p2v (_USTCSR))) -#define USSR (*((volatile Word *) SA1101_p2v (_USSR))) - - -#define USBStatus_IrqHciRmtWkp (1<<7) -#define USBStatus_IrqHciBuffAcc (1<<8) -#define USBStatus_nIrqHciM (1<<9) -#define USBStatus_nHciMFClr (1<<10) - -#define USBReset_ForceIfReset 0x01 -#define USBReset_ForceHcReset 0x02 -#define USBReset_ClkGenReset 0x04 - -#define USTCR_RdBstCntrl Fld(3,0) -#define USTCR_ByteEnable Fld(4,3) -#define USTCR_WriteEn (1<<7) -#define USTCR_FifoCir (1<<8) -#define USTCR_TestXferSel (1<<9) -#define USTCR_FifoCirAtEnd (1<<10) -#define USTCR_nSimScaleDownClk (1<<11) - -#define USSR_nAppMDEmpty 0x01 -#define USSR_nAppMDFirst 0x02 -#define USSR_nAppMDLast 0x04 -#define USSR_nAppMDFull 0x08 -#define USSR_nAppMAFull 0x10 -#define USSR_XferReq 0x20 -#define USSR_XferEnd 0x40 - -#endif /* LANGUAGE == C */ - - -/* - * Interrupt Controller - * - * Registers - * INTTEST0 Test register 0 - * INTTEST1 Test register 1 - * INTENABLE0 Interrupt Enable register 0 - * INTENABLE1 Interrupt Enable register 1 - * INTPOL0 Interrupt Polarity selection 0 - * INTPOL1 Interrupt Polarity selection 1 - * INTTSTSEL Interrupt source selection - * INTSTATCLR0 Interrupt Status 0 - * INTSTATCLR1 Interrupt Status 1 - * INTSET0 Interrupt Set 0 - * INTSET1 Interrupt Set 1 - */ - -#define _INT( x ) _SA1101( ( x ) + __INTERRUPT_CONTROL) - -#define _INTTEST0 _INT( 0x1000 ) -#define _INTTEST1 _INT( 0x1400 ) -#define _INTENABLE0 _INT( 0x2000 ) -#define _INTENABLE1 _INT( 0x2400 ) -#define _INTPOL0 _INT( 0x3000 ) -#define _INTPOL1 _INT( 0x3400 ) -#define _INTTSTSEL _INT( 0x5000 ) -#define _INTSTATCLR0 _INT( 0x6000 ) -#define _INTSTATCLR1 _INT( 0x6400 ) -#define _INTSET0 _INT( 0x7000 ) -#define _INTSET1 _INT( 0x7400 ) - -#if ( LANGUAGE == C ) -#define INTTEST0 (*((volatile Word *) SA1101_p2v (_INTTEST0))) -#define INTTEST1 (*((volatile Word *) SA1101_p2v (_INTTEST1))) -#define INTENABLE0 (*((volatile Word *) SA1101_p2v (_INTENABLE0))) -#define INTENABLE1 (*((volatile Word *) SA1101_p2v (_INTENABLE1))) -#define INTPOL0 (*((volatile Word *) SA1101_p2v (_INTPOL0))) -#define INTPOL1 (*((volatile Word *) SA1101_p2v (_INTPOL1))) -#define INTTSTSEL (*((volatile Word *) SA1101_p2v (_INTTSTSEL))) -#define INTSTATCLR0 (*((volatile Word *) SA1101_p2v (_INTSTATCLR0))) -#define INTSTATCLR1 (*((volatile Word *) SA1101_p2v (_INTSTATCLR1))) -#define INTSET0 (*((volatile Word *) SA1101_p2v (_INTSET0))) -#define INTSET1 (*((volatile Word *) SA1101_p2v (_INTSET1))) - -#endif /* LANGUAGE == C */ - -/* - * PS/2 Trackpad and Mouse Interfaces - * - * Registers (prefix kbd applies to trackpad interface, mse to mouse) - * KBDCR Control Register - * KBDSTAT Status Register - * KBDDATA Transmit/Receive Data register - * KBDCLKDIV Clock Division Register - * KBDPRECNT Clock Precount Register - * KBDTEST1 Test register 1 - * KBDTEST2 Test register 2 - * KBDTEST3 Test register 3 - * KBDTEST4 Test register 4 - * MSECR - * MSESTAT - * MSEDATA - * MSECLKDIV - * MSEPRECNT - * MSETEST1 - * MSETEST2 - * MSETEST3 - * MSETEST4 - * - */ - -#define _KBD( x ) _SA1101( ( x ) + __TRACK_INTERFACE ) -#define _MSE( x ) _SA1101( ( x ) + __MOUSE_INTERFACE ) - -#define _KBDCR _KBD( 0x0000 ) -#define _KBDSTAT _KBD( 0x0400 ) -#define _KBDDATA _KBD( 0x0800 ) -#define _KBDCLKDIV _KBD( 0x0c00 ) -#define _KBDPRECNT _KBD( 0x1000 ) -#define _KBDTEST1 _KBD( 0x2000 ) -#define _KBDTEST2 _KBD( 0x2400 ) -#define _KBDTEST3 _KBD( 0x2800 ) -#define _KBDTEST4 _KBD( 0x2c00 ) -#define _MSECR _MSE( 0x0000 ) -#define _MSESTAT _MSE( 0x0400 ) -#define _MSEDATA _MSE( 0x0800 ) -#define _MSECLKDIV _MSE( 0x0c00 ) -#define _MSEPRECNT _MSE( 0x1000 ) -#define _MSETEST1 _MSE( 0x2000 ) -#define _MSETEST2 _MSE( 0x2400 ) -#define _MSETEST3 _MSE( 0x2800 ) -#define _MSETEST4 _MSE( 0x2c00 ) - -#if ( LANGUAGE == C ) - -#define KBDCR (*((volatile Word *) SA1101_p2v (_KBDCR))) -#define KBDSTAT (*((volatile Word *) SA1101_p2v (_KBDSTAT))) -#define KBDDATA (*((volatile Word *) SA1101_p2v (_KBDDATA))) -#define KBDCLKDIV (*((volatile Word *) SA1101_p2v (_KBDCLKDIV))) -#define KBDPRECNT (*((volatile Word *) SA1101_p2v (_KBDPRECNT))) -#define KBDTEST1 (*((volatile Word *) SA1101_p2v (_KBDTEST1))) -#define KBDTEST2 (*((volatile Word *) SA1101_p2v (_KBDTEST2))) -#define KBDTEST3 (*((volatile Word *) SA1101_p2v (_KBDTEST3))) -#define KBDTEST4 (*((volatile Word *) SA1101_p2v (_KBDTEST4))) -#define MSECR (*((volatile Word *) SA1101_p2v (_MSECR))) -#define MSESTAT (*((volatile Word *) SA1101_p2v (_MSESTAT))) -#define MSEDATA (*((volatile Word *) SA1101_p2v (_MSEDATA))) -#define MSECLKDIV (*((volatile Word *) SA1101_p2v (_MSECLKDIV))) -#define MSEPRECNT (*((volatile Word *) SA1101_p2v (_MSEPRECNT))) -#define MSETEST1 (*((volatile Word *) SA1101_p2v (_MSETEST1))) -#define MSETEST2 (*((volatile Word *) SA1101_p2v (_MSETEST2))) -#define MSETEST3 (*((volatile Word *) SA1101_p2v (_MSETEST3))) -#define MSETEST4 (*((volatile Word *) SA1101_p2v (_MSETEST4))) - - -#define KBDCR_ENA 0x08 -#define KBDCR_FKD 0x02 -#define KBDCR_FKC 0x01 - -#define KBDSTAT_TXE 0x80 -#define KBDSTAT_TXB 0x40 -#define KBDSTAT_RXF 0x20 -#define KBDSTAT_RXB 0x10 -#define KBDSTAT_ENA 0x08 -#define KBDSTAT_RXP 0x04 -#define KBDSTAT_KBD 0x02 -#define KBDSTAT_KBC 0x01 - -#define KBDCLKDIV_DivVal Fld(4,0) - -#define MSECR_ENA 0x08 -#define MSECR_FKD 0x02 -#define MSECR_FKC 0x01 - -#define MSESTAT_TXE 0x80 -#define MSESTAT_TXB 0x40 -#define MSESTAT_RXF 0x20 -#define MSESTAT_RXB 0x10 -#define MSESTAT_ENA 0x08 -#define MSESTAT_RXP 0x04 -#define MSESTAT_MSD 0x02 -#define MSESTAT_MSC 0x01 - -#define MSECLKDIV_DivVal Fld(4,0) - -#define KBDTEST1_CD 0x80 -#define KBDTEST1_RC1 0x40 -#define KBDTEST1_MC 0x20 -#define KBDTEST1_C Fld(2,3) -#define KBDTEST1_T2 0x40 -#define KBDTEST1_T1 0x20 -#define KBDTEST1_T0 0x10 -#define KBDTEST2_TICBnRES 0x08 -#define KBDTEST2_RKC 0x04 -#define KBDTEST2_RKD 0x02 -#define KBDTEST2_SEL 0x01 -#define KBDTEST3_ms_16 0x80 -#define KBDTEST3_us_64 0x40 -#define KBDTEST3_us_16 0x20 -#define KBDTEST3_DIV8 0x10 -#define KBDTEST3_DIn 0x08 -#define KBDTEST3_CIn 0x04 -#define KBDTEST3_KD 0x02 -#define KBDTEST3_KC 0x01 -#define KBDTEST4_BC12 0x80 -#define KBDTEST4_BC11 0x40 -#define KBDTEST4_TRES 0x20 -#define KBDTEST4_CLKOE 0x10 -#define KBDTEST4_CRES 0x08 -#define KBDTEST4_RXB 0x04 -#define KBDTEST4_TXB 0x02 -#define KBDTEST4_SRX 0x01 - -#define MSETEST1_CD 0x80 -#define MSETEST1_RC1 0x40 -#define MSETEST1_MC 0x20 -#define MSETEST1_C Fld(2,3) -#define MSETEST1_T2 0x40 -#define MSETEST1_T1 0x20 -#define MSETEST1_T0 0x10 -#define MSETEST2_TICBnRES 0x08 -#define MSETEST2_RKC 0x04 -#define MSETEST2_RKD 0x02 -#define MSETEST2_SEL 0x01 -#define MSETEST3_ms_16 0x80 -#define MSETEST3_us_64 0x40 -#define MSETEST3_us_16 0x20 -#define MSETEST3_DIV8 0x10 -#define MSETEST3_DIn 0x08 -#define MSETEST3_CIn 0x04 -#define MSETEST3_KD 0x02 -#define MSETEST3_KC 0x01 -#define MSETEST4_BC12 0x80 -#define MSETEST4_BC11 0x40 -#define MSETEST4_TRES 0x20 -#define MSETEST4_CLKOE 0x10 -#define MSETEST4_CRES 0x08 -#define MSETEST4_RXB 0x04 -#define MSETEST4_TXB 0x02 -#define MSETEST4_SRX 0x01 - -#endif /* LANGUAGE == C */ - - -/* - * General-Purpose I/O Interface - * - * Registers - * PADWR Port A Data Write Register - * PBDWR Port B Data Write Register - * PADRR Port A Data Read Register - * PBDRR Port B Data Read Register - * PADDR Port A Data Direction Register - * PBDDR Port B Data Direction Register - * PASSR Port A Sleep State Register - * PBSSR Port B Sleep State Register - * - */ - -#define _PIO( x ) _SA1101( ( x ) + __GPIO_INTERFACE ) - -#define _PADWR _PIO( 0x0000 ) -#define _PBDWR _PIO( 0x0400 ) -#define _PADRR _PIO( 0x0000 ) -#define _PBDRR _PIO( 0x0400 ) -#define _PADDR _PIO( 0x0800 ) -#define _PBDDR _PIO( 0x0c00 ) -#define _PASSR _PIO( 0x1000 ) -#define _PBSSR _PIO( 0x1400 ) - - -#if ( LANGUAGE == C ) - - -#define PADWR (*((volatile Word *) SA1101_p2v (_PADWR))) -#define PBDWR (*((volatile Word *) SA1101_p2v (_PBDWR))) -#define PADRR (*((volatile Word *) SA1101_p2v (_PADRR))) -#define PBDRR (*((volatile Word *) SA1101_p2v (_PBDRR))) -#define PADDR (*((volatile Word *) SA1101_p2v (_PADDR))) -#define PBDDR (*((volatile Word *) SA1101_p2v (_PBDDR))) -#define PASSR (*((volatile Word *) SA1101_p2v (_PASSR))) -#define PBSSR (*((volatile Word *) SA1101_p2v (_PBSSR))) - -#endif - - - -/* - * Keypad Interface - * - * Registers - * PXDWR - * PXDRR - * PYDWR - * PYDRR - * - */ - -#define _KEYPAD( x ) _SA1101( ( x ) + __KEYPAD_INTERFACE ) - -#define _PXDWR _KEYPAD( 0x0000 ) -#define _PXDRR _KEYPAD( 0x0000 ) -#define _PYDWR _KEYPAD( 0x0400 ) -#define _PYDRR _KEYPAD( 0x0400 ) - -#if ( LANGUAGE == C ) - - -#define PXDWR (*((volatile Word *) SA1101_p2v (_PXDWR))) -#define PXDRR (*((volatile Word *) SA1101_p2v (_PXDRR))) -#define PYDWR (*((volatile Word *) SA1101_p2v (_PYDWR))) -#define PYDRR (*((volatile Word *) SA1101_p2v (_PYDRR))) - -#endif - - - -/* - * PCMCIA Interface - * - * Registers - * PCSR Status Register - * PCCR Control Register - * PCSSR Sleep State Register - * - */ - -#define _CARD( x ) _SA1101( ( x ) + __PCMCIA_INTERFACE ) - -#define _PCSR _CARD( 0x0000 ) -#define _PCCR _CARD( 0x0400 ) -#define _PCSSR _CARD( 0x0800 ) - -#if ( LANGUAGE == C ) -#define PCSR (*((volatile Word *) SA1101_p2v (_PCSR))) -#define PCCR (*((volatile Word *) SA1101_p2v (_PCCR))) -#define PCSSR (*((volatile Word *) SA1101_p2v (_PCSSR))) - -#define PCSR_S0_ready 0x0001 -#define PCSR_S1_ready 0x0002 -#define PCSR_S0_detected 0x0004 -#define PCSR_S1_detected 0x0008 -#define PCSR_S0_VS1 0x0010 -#define PCSR_S0_VS2 0x0020 -#define PCSR_S1_VS1 0x0040 -#define PCSR_S1_VS2 0x0080 -#define PCSR_S0_WP 0x0100 -#define PCSR_S1_WP 0x0200 -#define PCSR_S0_BVD1_nSTSCHG 0x0400 -#define PCSR_S0_BVD2_nSPKR 0x0800 -#define PCSR_S1_BVD1_nSTSCHG 0x1000 -#define PCSR_S1_BVD2_nSPKR 0x2000 - -#define PCCR_S0_VPP0 0x0001 -#define PCCR_S0_VPP1 0x0002 -#define PCCR_S0_VCC0 0x0004 -#define PCCR_S0_VCC1 0x0008 -#define PCCR_S1_VPP0 0x0010 -#define PCCR_S1_VPP1 0x0020 -#define PCCR_S1_VCC0 0x0040 -#define PCCR_S1_VCC1 0x0080 -#define PCCR_S0_reset 0x0100 -#define PCCR_S1_reset 0x0200 -#define PCCR_S0_float 0x0400 -#define PCCR_S1_float 0x0800 - -#define PCSSR_S0_VCC0 0x0001 -#define PCSSR_S0_VCC1 0x0002 -#define PCSSR_S0_VPP0 0x0004 -#define PCSSR_S0_VPP1 0x0008 -#define PCSSR_S0_control 0x0010 -#define PCSSR_S1_VCC0 0x0020 -#define PCSSR_S1_VCC1 0x0040 -#define PCSSR_S1_VPP0 0x0080 -#define PCSSR_S1_VPP1 0x0100 -#define PCSSR_S1_control 0x0200 - -#endif - -#undef C -#undef Assembly diff --git a/include/asm-arm/arch-sa1100/SA-1111.h b/include/asm-arm/arch-sa1100/SA-1111.h deleted file mode 100644 index c38f609..0000000 --- a/include/asm-arm/arch-sa1100/SA-1111.h +++ /dev/null @@ -1,5 +0,0 @@ -/* - * Moved to new location - */ -#warning using old SA-1111.h - update to -#include diff --git a/include/asm-arm/arch-sa1100/assabet.h b/include/asm-arm/arch-sa1100/assabet.h deleted file mode 100644 index d6a1bb5..0000000 --- a/include/asm-arm/arch-sa1100/assabet.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/assabet.h - * - * Created 2000/06/05 by Nicolas Pitre - * - * This file contains the hardware specific definitions for Assabet - * Only include this file from SA1100-specific files. - * - * 2000/05/23 John Dorsey - * Definitions for Neponset added. - */ -#ifndef __ASM_ARCH_ASSABET_H -#define __ASM_ARCH_ASSABET_H - - -/* System Configuration Register flags */ - -#define ASSABET_SCR_SDRAM_LOW (1<<2) /* SDRAM size (low bit) */ -#define ASSABET_SCR_SDRAM_HIGH (1<<3) /* SDRAM size (high bit) */ -#define ASSABET_SCR_FLASH_LOW (1<<4) /* Flash size (low bit) */ -#define ASSABET_SCR_FLASH_HIGH (1<<5) /* Flash size (high bit) */ -#define ASSABET_SCR_GFX (1<<8) /* Graphics Accelerator (0 = present) */ -#define ASSABET_SCR_SA1111 (1<<9) /* Neponset (0 = present) */ - -#define ASSABET_SCR_INIT -1 - -extern unsigned long SCR_value; - -#ifdef CONFIG_ASSABET_NEPONSET -#define machine_has_neponset() ((SCR_value & ASSABET_SCR_SA1111) == 0) -#else -#define machine_has_neponset() (0) -#endif - -/* Board Control Register */ - -#define ASSABET_BCR_BASE 0xf1000000 -#define ASSABET_BCR (*(volatile unsigned int *)(ASSABET_BCR_BASE)) - -#define ASSABET_BCR_CF_PWR (1<<0) /* Compact Flash Power (1 = 3.3v, 0 = off) */ -#define ASSABET_BCR_CF_RST (1<<1) /* Compact Flash Reset (1 = power up reset) */ -#define ASSABET_BCR_GFX_RST (1<<1) /* Graphics Accelerator Reset (0 = hold reset) */ -#define ASSABET_BCR_CODEC_RST (1<<2) /* 0 = Holds UCB1300, ADI7171, and UDA1341 in reset */ -#define ASSABET_BCR_IRDA_FSEL (1<<3) /* IRDA Frequency select (0 = SIR, 1 = MIR/ FIR) */ -#define ASSABET_BCR_IRDA_MD0 (1<<4) /* Range/Power select */ -#define ASSABET_BCR_IRDA_MD1 (1<<5) /* Range/Power select */ -#define ASSABET_BCR_STEREO_LB (1<<6) /* Stereo Loopback */ -#define ASSABET_BCR_CF_BUS_OFF (1<<7) /* Compact Flash bus (0 = on, 1 = off (float)) */ -#define ASSABET_BCR_AUDIO_ON (1<<8) /* Audio power on */ -#define ASSABET_BCR_LIGHT_ON (1<<9) /* Backlight */ -#define ASSABET_BCR_LCD_12RGB (1<<10) /* 0 = 16RGB, 1 = 12RGB */ -#define ASSABET_BCR_LCD_ON (1<<11) /* LCD power on */ -#define ASSABET_BCR_RS232EN (1<<12) /* RS232 transceiver enable */ -#define ASSABET_BCR_LED_RED (1<<13) /* D9 (0 = on, 1 = off) */ -#define ASSABET_BCR_LED_GREEN (1<<14) /* D8 (0 = on, 1 = off) */ -#define ASSABET_BCR_VIB_ON (1<<15) /* Vibration motor (quiet alert) */ -#define ASSABET_BCR_COM_DTR (1<<16) /* COMport Data Terminal Ready */ -#define ASSABET_BCR_COM_RTS (1<<17) /* COMport Request To Send */ -#define ASSABET_BCR_RAD_WU (1<<18) /* Radio wake up interrupt */ -#define ASSABET_BCR_SMB_EN (1<<19) /* System management bus enable */ -#define ASSABET_BCR_TV_IR_DEC (1<<20) /* TV IR Decode Enable (not implemented) */ -#define ASSABET_BCR_QMUTE (1<<21) /* Quick Mute */ -#define ASSABET_BCR_RAD_ON (1<<22) /* Radio Power On */ -#define ASSABET_BCR_SPK_OFF (1<<23) /* 1 = Speaker amplifier power off */ - -#ifdef CONFIG_SA1100_ASSABET -extern void ASSABET_BCR_frob(unsigned int mask, unsigned int set); -#else -#define ASSABET_BCR_frob(x,y) do { } while (0) -#endif - -#define ASSABET_BCR_set(x) ASSABET_BCR_frob((x), (x)) -#define ASSABET_BCR_clear(x) ASSABET_BCR_frob((x), 0) - -#define ASSABET_BSR_BASE 0xf1000000 -#define ASSABET_BSR (*(volatile unsigned int*)(ASSABET_BSR_BASE)) - -#define ASSABET_BSR_RS232_VALID (1 << 24) -#define ASSABET_BSR_COM_DCD (1 << 25) -#define ASSABET_BSR_COM_CTS (1 << 26) -#define ASSABET_BSR_COM_DSR (1 << 27) -#define ASSABET_BSR_RAD_CTS (1 << 28) -#define ASSABET_BSR_RAD_DSR (1 << 29) -#define ASSABET_BSR_RAD_DCD (1 << 30) -#define ASSABET_BSR_RAD_RI (1 << 31) - - -/* GPIOs for which the generic definition doesn't say much */ -#define ASSABET_GPIO_RADIO_IRQ GPIO_GPIO (14) /* Radio interrupt request */ -#define ASSABET_GPIO_PS_MODE_SYNC GPIO_GPIO (16) /* Power supply mode/sync */ -#define ASSABET_GPIO_STEREO_64FS_CLK GPIO_GPIO (19) /* SSP UDA1341 clock input */ -#define ASSABET_GPIO_CF_IRQ GPIO_GPIO (21) /* CF IRQ */ -#define ASSABET_GPIO_CF_CD GPIO_GPIO (22) /* CF CD */ -#define ASSABET_GPIO_CF_BVD2 GPIO_GPIO (24) /* CF BVD */ -#define ASSABET_GPIO_GFX_IRQ GPIO_GPIO (24) /* Graphics IRQ */ -#define ASSABET_GPIO_CF_BVD1 GPIO_GPIO (25) /* CF BVD */ -#define ASSABET_GPIO_BATT_LOW GPIO_GPIO (26) /* Low battery */ -#define ASSABET_GPIO_RCLK GPIO_GPIO (26) /* CCLK/2 */ - -#define ASSABET_IRQ_GPIO_CF_IRQ IRQ_GPIO21 -#define ASSABET_IRQ_GPIO_CF_CD IRQ_GPIO22 -#define ASSABET_IRQ_GPIO_CF_BVD2 IRQ_GPIO24 -#define ASSABET_IRQ_GPIO_CF_BVD1 IRQ_GPIO25 - -#endif diff --git a/include/asm-arm/arch-sa1100/badge4.h b/include/asm-arm/arch-sa1100/badge4.h deleted file mode 100644 index d93a9a8..0000000 --- a/include/asm-arm/arch-sa1100/badge4.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/badge4.h - * - * Tim Connors - * Christopher Hoover - * - * Copyright (C) 2002 Hewlett-Packard Company - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#error "include instead" -#endif - -#define BADGE4_SA1111_BASE (0x48000000) - -/* GPIOs on the BadgePAD 4 */ -#define BADGE4_GPIO_INT_1111 GPIO_GPIO0 /* SA-1111 IRQ */ - -#define BADGE4_GPIO_INT_VID GPIO_GPIO1 /* Video expansion */ -#define BADGE4_GPIO_LGP2 GPIO_GPIO2 /* GPIO_LDD8 */ -#define BADGE4_GPIO_LGP3 GPIO_GPIO3 /* GPIO_LDD9 */ -#define BADGE4_GPIO_LGP4 GPIO_GPIO4 /* GPIO_LDD10 */ -#define BADGE4_GPIO_LGP5 GPIO_GPIO5 /* GPIO_LDD11 */ -#define BADGE4_GPIO_LGP6 GPIO_GPIO6 /* GPIO_LDD12 */ -#define BADGE4_GPIO_LGP7 GPIO_GPIO7 /* GPIO_LDD13 */ -#define BADGE4_GPIO_LGP8 GPIO_GPIO8 /* GPIO_LDD14 */ -#define BADGE4_GPIO_LGP9 GPIO_GPIO9 /* GPIO_LDD15 */ -#define BADGE4_GPIO_GPA_VID GPIO_GPIO10 /* Video expansion */ -#define BADGE4_GPIO_GPB_VID GPIO_GPIO11 /* Video expansion */ -#define BADGE4_GPIO_GPC_VID GPIO_GPIO12 /* Video expansion */ - -#define BADGE4_GPIO_UART_HS1 GPIO_GPIO13 -#define BADGE4_GPIO_UART_HS2 GPIO_GPIO14 - -#define BADGE4_GPIO_MUXSEL0 GPIO_GPIO15 -#define BADGE4_GPIO_TESTPT_J7 GPIO_GPIO16 - -#define BADGE4_GPIO_SDSDA GPIO_GPIO17 /* SDRAM SPD Data */ -#define BADGE4_GPIO_SDSCL GPIO_GPIO18 /* SDRAM SPD Clock */ -#define BADGE4_GPIO_SDTYP0 GPIO_GPIO19 /* SDRAM Type Control */ -#define BADGE4_GPIO_SDTYP1 GPIO_GPIO20 /* SDRAM Type Control */ - -#define BADGE4_GPIO_BGNT_1111 GPIO_GPIO21 /* GPIO_MBGNT */ -#define BADGE4_GPIO_BREQ_1111 GPIO_GPIO22 /* GPIO_TREQA */ - -#define BADGE4_GPIO_TESTPT_J6 GPIO_GPIO23 - -#define BADGE4_GPIO_PCMEN5V GPIO_GPIO24 /* 5V power */ - -#define BADGE4_GPIO_SA1111_NRST GPIO_GPIO25 /* SA-1111 nRESET */ - -#define BADGE4_GPIO_TESTPT_J5 GPIO_GPIO26 - -#define BADGE4_GPIO_CLK_1111 GPIO_GPIO27 /* GPIO_32_768kHz */ - -/* Interrupts on the BadgePAD 4 */ -#define BADGE4_IRQ_GPIO_SA1111 IRQ_GPIO0 /* SA-1111 interrupt */ - - -/* PCM5ENV Usage tracking */ - -#define BADGE4_5V_PCMCIA_SOCK0 (1<<0) -#define BADGE4_5V_PCMCIA_SOCK1 (1<<1) -#define BADGE4_5V_PCMCIA_SOCK(n) (1<<(n)) -#define BADGE4_5V_USB (1<<2) -#define BADGE4_5V_INITIALLY (1<<3) - -#ifndef __ASSEMBLY__ -extern void badge4_set_5V(unsigned subsystem, int on); -#endif diff --git a/include/asm-arm/arch-sa1100/bitfield.h b/include/asm-arm/arch-sa1100/bitfield.h deleted file mode 100644 index f1f0e33..0000000 --- a/include/asm-arm/arch-sa1100/bitfield.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * FILE bitfield.h - * - * Version 1.1 - * Author Copyright (c) Marc A. Viredaz, 1998 - * DEC Western Research Laboratory, Palo Alto, CA - * Date April 1998 (April 1997) - * System Advanced RISC Machine (ARM) - * Language C or ARM Assembly - * Purpose Definition of macros to operate on bit fields. - */ - - - -#ifndef __BITFIELD_H -#define __BITFIELD_H - -#ifndef __ASSEMBLY__ -#define UData(Data) ((unsigned long) (Data)) -#else -#define UData(Data) (Data) -#endif - - -/* - * MACRO: Fld - * - * Purpose - * The macro "Fld" encodes a bit field, given its size and its shift value - * with respect to bit 0. - * - * Note - * A more intuitive way to encode bit fields would have been to use their - * mask. However, extracting size and shift value information from a bit - * field's mask is cumbersome and might break the assembler (255-character - * line-size limit). - * - * Input - * Size Size of the bit field, in number of bits. - * Shft Shift value of the bit field with respect to bit 0. - * - * Output - * Fld Encoded bit field. - */ - -#define Fld(Size, Shft) (((Size) << 16) + (Shft)) - - -/* - * MACROS: FSize, FShft, FMsk, FAlnMsk, F1stBit - * - * Purpose - * The macros "FSize", "FShft", "FMsk", "FAlnMsk", and "F1stBit" return - * the size, shift value, mask, aligned mask, and first bit of a - * bit field. - * - * Input - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FSize Size of the bit field, in number of bits. - * FShft Shift value of the bit field with respect to bit 0. - * FMsk Mask for the bit field. - * FAlnMsk Mask for the bit field, aligned on bit 0. - * F1stBit First bit of the bit field. - */ - -#define FSize(Field) ((Field) >> 16) -#define FShft(Field) ((Field) & 0x0000FFFF) -#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) -#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) -#define F1stBit(Field) (UData (1) << FShft (Field)) - - -/* - * MACRO: FInsrt - * - * Purpose - * The macro "FInsrt" inserts a value into a bit field by shifting the - * former appropriately. - * - * Input - * Value Bit-field value. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FInsrt Bit-field value positioned appropriately. - */ - -#define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) - - -/* - * MACRO: FExtr - * - * Purpose - * The macro "FExtr" extracts the value of a bit field by masking and - * shifting it appropriately. - * - * Input - * Data Data containing the bit-field to be extracted. - * Field Encoded bit field (using the macro "Fld"). - * - * Output - * FExtr Bit-field value. - */ - -#define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) - - -#endif /* __BITFIELD_H */ diff --git a/include/asm-arm/arch-sa1100/cerf.h b/include/asm-arm/arch-sa1100/cerf.h deleted file mode 100644 index 9a19c3d0..0000000 --- a/include/asm-arm/arch-sa1100/cerf.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * include/asm-arm/arch-sa1100/cerf.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Apr-2003 : Removed some old PDA crud [FB] - */ -#ifndef _INCLUDE_CERF_H_ -#define _INCLUDE_CERF_H_ - - -#define CERF_ETH_IO 0xf0000000 -#define CERF_ETH_IRQ IRQ_GPIO26 - -#define CERF_GPIO_CF_BVD2 GPIO_GPIO (19) -#define CERF_GPIO_CF_BVD1 GPIO_GPIO (20) -#define CERF_GPIO_CF_RESET GPIO_GPIO (21) -#define CERF_GPIO_CF_IRQ GPIO_GPIO (22) -#define CERF_GPIO_CF_CD GPIO_GPIO (23) - -#define CERF_IRQ_GPIO_CF_BVD2 IRQ_GPIO19 -#define CERF_IRQ_GPIO_CF_BVD1 IRQ_GPIO20 -#define CERF_IRQ_GPIO_CF_IRQ IRQ_GPIO22 -#define CERF_IRQ_GPIO_CF_CD IRQ_GPIO23 - -#endif // _INCLUDE_CERF_H_ diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h deleted file mode 100644 index 762eba53..0000000 --- a/include/asm-arm/arch-sa1100/collie.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/collie.h - * - * This file contains the hardware specific definitions for Assabet - * Only include this file from SA1100-specific files. - * - * ChangeLog: - * 04-06-2001 Lineo Japan, Inc. - * 04-16-2001 SHARP Corporation - * 07-07-2002 Chris Larson - * - */ -#ifndef __ASM_ARCH_COLLIE_H -#define __ASM_ARCH_COLLIE_H - - -#define COLLIE_SCP_CHARGE_ON SCOOP_GPCR_PA11 -#define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12 -#define COLLIE_SCP_DIAG_BOOT2 SCOOP_GPCR_PA13 -#define COLLIE_SCP_MUTE_L SCOOP_GPCR_PA14 -#define COLLIE_SCP_MUTE_R SCOOP_GPCR_PA15 -#define COLLIE_SCP_5VON SCOOP_GPCR_PA16 -#define COLLIE_SCP_AMP_ON SCOOP_GPCR_PA17 -#define COLLIE_SCP_VPEN SCOOP_GPCR_PA18 -#define COLLIE_SCP_LB_VOL_CHG SCOOP_GPCR_PA19 - -#define COLLIE_SCOOP_IO_DIR ( COLLIE_SCP_CHARGE_ON | COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | \ - COLLIE_SCP_5VON | COLLIE_SCP_AMP_ON | COLLIE_SCP_VPEN | \ - COLLIE_SCP_LB_VOL_CHG ) -#define COLLIE_SCOOP_IO_OUT ( COLLIE_SCP_MUTE_L | COLLIE_SCP_MUTE_R | COLLIE_SCP_VPEN | \ - COLLIE_SCP_CHARGE_ON ) - -/* GPIOs for which the generic definition doesn't say much */ - -#define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) -#define COLLIE_GPIO_AC_IN GPIO_GPIO (1) -#define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11) -#define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) -#define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) -#define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) -#define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17) -#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18) -#define COLLIE_GPIO_CO GPIO_GPIO (20) -#define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) -#define COLLIE_GPIO_CF_CD GPIO_GPIO (22) -#define COLLIE_GPIO_UCB1x00_IRQ GPIO_GPIO (23) -#define COLLIE_GPIO_WAKEUP GPIO_GPIO (24) -#define COLLIE_GPIO_GA_INT GPIO_GPIO (25) -#define COLLIE_GPIO_MAIN_BAT_LOW GPIO_GPIO (26) - -/* Interrupts */ - -#define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 -#define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 -#define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11 -#define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 -#define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 -#define COLLIE_IRQ_GPIO_CO IRQ_GPIO20 -#define COLLIE_IRQ_GPIO_CF_CD IRQ_GPIO22 -#define COLLIE_IRQ_GPIO_UCB1x00_IRQ IRQ_GPIO23 -#define COLLIE_IRQ_GPIO_WAKEUP IRQ_GPIO24 -#define COLLIE_IRQ_GPIO_GA_INT IRQ_GPIO25 -#define COLLIE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO26 - -#define COLLIE_LCM_IRQ_GPIO_RTS IRQ_LOCOMO_GPIO0 -#define COLLIE_LCM_IRQ_GPIO_CTS IRQ_LOCOMO_GPIO1 -#define COLLIE_LCM_IRQ_GPIO_DSR IRQ_LOCOMO_GPIO2 -#define COLLIE_LCM_IRQ_GPIO_DTR IRQ_LOCOMO_GPIO3 -#define COLLIE_LCM_IRQ_GPIO_nSD_DETECT IRQ_LOCOMO_GPIO13 -#define COLLIE_LCM_IRQ_GPIO_nSD_WP IRQ_LOCOMO_GPIO14 - -/* GPIO's on the TC35143AF (Toshiba Analog Frontend) */ -#define COLLIE_TC35143_GPIO_VERSION0 UCB_IO_0 /* GPIO0=Version */ -#define COLLIE_TC35143_GPIO_TBL_CHK UCB_IO_1 /* GPIO1=TBL_CHK */ -#define COLLIE_TC35143_GPIO_VPEN_ON UCB_IO_2 /* GPIO2=VPNE_ON */ -#define COLLIE_TC35143_GPIO_IR_ON UCB_IO_3 /* GPIO3=IR_ON */ -#define COLLIE_TC35143_GPIO_AMP_ON UCB_IO_4 /* GPIO4=AMP_ON */ -#define COLLIE_TC35143_GPIO_VERSION1 UCB_IO_5 /* GPIO5=Version */ -#define COLLIE_TC35143_GPIO_FS8KLPF UCB_IO_5 /* GPIO5=fs 8k LPF */ -#define COLLIE_TC35143_GPIO_BUZZER_BIAS UCB_IO_6 /* GPIO6=BUZZER BIAS */ -#define COLLIE_TC35143_GPIO_MBAT_ON UCB_IO_7 /* GPIO7=MBAT_ON */ -#define COLLIE_TC35143_GPIO_BBAT_ON UCB_IO_8 /* GPIO8=BBAT_ON */ -#define COLLIE_TC35143_GPIO_TMP_ON UCB_IO_9 /* GPIO9=TMP_ON */ -#define COLLIE_TC35143_GPIO_IN ( UCB_IO_0 | UCB_IO_2 | UCB_IO_5 ) -#define COLLIE_TC35143_GPIO_OUT ( UCB_IO_1 | UCB_IO_3 | UCB_IO_4 | UCB_IO_6 | \ - UCB_IO_7 | UCB_IO_8 | UCB_IO_9 ) - -#endif diff --git a/include/asm-arm/arch-sa1100/debug-macro.S b/include/asm-arm/arch-sa1100/debug-macro.S deleted file mode 100644 index 1b77536..0000000 --- a/include/asm-arm/arch-sa1100/debug-macro.S +++ /dev/null @@ -1,58 +0,0 @@ -/* linux/include/asm-arm/arch-sa1100/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ -#include - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x80000000 @ physical base address - movne \rx, #0xf8000000 @ virtual address - - @ We probe for the active serial port here, coherently with - @ the comment in include/asm-arm/arch-sa1100/uncompress.h. - @ We assume r1 can be clobbered. - - @ see if Ser3 is active - add \rx, \rx, #0x00050000 - ldr r1, [\rx, #UTCR3] - tst r1, #UTCR3_TXE - - @ if Ser3 is inactive, then try Ser1 - addeq \rx, \rx, #(0x00010000 - 0x00050000) - ldreq r1, [\rx, #UTCR3] - tsteq r1, #UTCR3_TXE - - @ if Ser1 is inactive, then try Ser2 - addeq \rx, \rx, #(0x00030000 - 0x00010000) - ldreq r1, [\rx, #UTCR3] - tsteq r1, #UTCR3_TXE - - @ if all ports are inactive, then there is nothing we can do - moveq pc, lr - .endm - - .macro senduart,rd,rx - str \rd, [\rx, #UTDR] - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TNF - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #UTSR1] - tst \rd, #UTSR1_TBY - bne 1001b - .endm diff --git a/include/asm-arm/arch-sa1100/dma.h b/include/asm-arm/arch-sa1100/dma.h deleted file mode 100644 index 6b7917a..0000000 --- a/include/asm-arm/arch-sa1100/dma.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/dma.h - * - * Generic SA1100 DMA support - * - * Copyright (C) 2000 Nicolas Pitre - * - */ - -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include "hardware.h" - - -/* - * The SA1100 has six internal DMA channels. - */ -#define SA1100_DMA_CHANNELS 6 - -/* - * Maximum physical DMA buffer size - */ -#define MAX_DMA_SIZE 0x1fff -#define CUT_DMA_SIZE 0x1000 - -/* - * All possible SA1100 devices a DMA channel can be attached to. - */ -typedef enum { - DMA_Ser0UDCWr = DDAR_Ser0UDCWr, /* Ser. port 0 UDC Write */ - DMA_Ser0UDCRd = DDAR_Ser0UDCRd, /* Ser. port 0 UDC Read */ - DMA_Ser1UARTWr = DDAR_Ser1UARTWr, /* Ser. port 1 UART Write */ - DMA_Ser1UARTRd = DDAR_Ser1UARTRd, /* Ser. port 1 UART Read */ - DMA_Ser1SDLCWr = DDAR_Ser1SDLCWr, /* Ser. port 1 SDLC Write */ - DMA_Ser1SDLCRd = DDAR_Ser1SDLCRd, /* Ser. port 1 SDLC Read */ - DMA_Ser2UARTWr = DDAR_Ser2UARTWr, /* Ser. port 2 UART Write */ - DMA_Ser2UARTRd = DDAR_Ser2UARTRd, /* Ser. port 2 UART Read */ - DMA_Ser2HSSPWr = DDAR_Ser2HSSPWr, /* Ser. port 2 HSSP Write */ - DMA_Ser2HSSPRd = DDAR_Ser2HSSPRd, /* Ser. port 2 HSSP Read */ - DMA_Ser3UARTWr = DDAR_Ser3UARTWr, /* Ser. port 3 UART Write */ - DMA_Ser3UARTRd = DDAR_Ser3UARTRd, /* Ser. port 3 UART Read */ - DMA_Ser4MCP0Wr = DDAR_Ser4MCP0Wr, /* Ser. port 4 MCP 0 Write (audio) */ - DMA_Ser4MCP0Rd = DDAR_Ser4MCP0Rd, /* Ser. port 4 MCP 0 Read (audio) */ - DMA_Ser4MCP1Wr = DDAR_Ser4MCP1Wr, /* Ser. port 4 MCP 1 Write */ - DMA_Ser4MCP1Rd = DDAR_Ser4MCP1Rd, /* Ser. port 4 MCP 1 Read */ - DMA_Ser4SSPWr = DDAR_Ser4SSPWr, /* Ser. port 4 SSP Write (16 bits) */ - DMA_Ser4SSPRd = DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */ -} dma_device_t; - -typedef struct { - volatile u_long DDAR; - volatile u_long SetDCSR; - volatile u_long ClrDCSR; - volatile u_long RdDCSR; - volatile dma_addr_t DBSA; - volatile u_long DBTA; - volatile dma_addr_t DBSB; - volatile u_long DBTB; -} dma_regs_t; - -typedef void (*dma_callback_t)(void *data); - -/* - * DMA function prototypes - */ - -extern int sa1100_request_dma( dma_device_t device, const char *device_id, - dma_callback_t callback, void *data, - dma_regs_t **regs ); -extern void sa1100_free_dma( dma_regs_t *regs ); -extern int sa1100_start_dma( dma_regs_t *regs, dma_addr_t dma_ptr, u_int size ); -extern dma_addr_t sa1100_get_dma_pos(dma_regs_t *regs); -extern void sa1100_reset_dma(dma_regs_t *regs); - -/** - * sa1100_stop_dma - stop DMA in progress - * @regs: identifier for the channel to use - * - * This stops DMA without clearing buffer pointers. Unlike - * sa1100_clear_dma() this allows subsequent use of sa1100_resume_dma() - * or sa1100_get_dma_pos(). - * - * The @regs identifier is provided by a successful call to - * sa1100_request_dma(). - **/ - -#define sa1100_stop_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN) - -/** - * sa1100_resume_dma - resume DMA on a stopped channel - * @regs: identifier for the channel to use - * - * This resumes DMA on a channel previously stopped with - * sa1100_stop_dma(). - * - * The @regs identifier is provided by a successful call to - * sa1100_request_dma(). - **/ - -#define sa1100_resume_dma(regs) ((regs)->SetDCSR = DCSR_IE|DCSR_RUN) - -/** - * sa1100_clear_dma - clear DMA pointers - * @regs: identifier for the channel to use - * - * This clear any DMA state so the DMA engine is ready to restart - * with new buffers through sa1100_start_dma(). Any buffers in flight - * are discarded. - * - * The @regs identifier is provided by a successful call to - * sa1100_request_dma(). - **/ - -#define sa1100_clear_dma(regs) ((regs)->ClrDCSR = DCSR_IE|DCSR_RUN|DCSR_STRTA|DCSR_STRTB) - -#endif /* _ASM_ARCH_DMA_H */ diff --git a/include/asm-arm/arch-sa1100/entry-macro.S b/include/asm-arm/arch-sa1100/entry-macro.S deleted file mode 100644 index 127db4a..0000000 --- a/include/asm-arm/arch-sa1100/entry-macro.S +++ /dev/null @@ -1,47 +0,0 @@ -/* - * include/asm-arm/arch-sa1100/entry-macro.S - * - * Low-level IRQ helper macros for SA1100-based platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - mov \base, #0xfa000000 @ ICIP = 0xfa050000 - add \base, \base, #0x00050000 - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base] @ get irqs - ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 - ands \irqstat, \irqstat, \irqnr - mov \irqnr, #0 - beq 1001f - tst \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tsteq \irqstat, #0xff - moveq \irqstat, \irqstat, lsr #8 - addeq \irqnr, \irqnr, #8 - tst \irqstat, #0x0f - moveq \irqstat, \irqstat, lsr #4 - addeq \irqnr, \irqnr, #4 - tst \irqstat, #0x03 - moveq \irqstat, \irqstat, lsr #2 - addeq \irqnr, \irqnr, #2 - tst \irqstat, #0x01 - addeqs \irqnr, \irqnr, #1 -1001: - .endm - diff --git a/include/asm-arm/arch-sa1100/gpio.h b/include/asm-arm/arch-sa1100/gpio.h deleted file mode 100644 index e66ecf7..0000000 --- a/include/asm-arm/arch-sa1100/gpio.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/gpio.h - * - * SA1100 GPIO wrappers for arch-neutral GPIO calls - * - * Written by Philipp Zabel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - */ - -#ifndef __ASM_ARCH_SA1100_GPIO_H -#define __ASM_ARCH_SA1100_GPIO_H - -#include -#include -#include - -static inline int gpio_get_value(unsigned gpio) -{ - if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) - return GPLR & GPIO_GPIO(gpio); - else - return __gpio_get_value(gpio); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (__builtin_constant_p(gpio) && (gpio <= GPIO_MAX)) - if (value) - GPSR = GPIO_GPIO(gpio); - else - GPCR = GPIO_GPIO(gpio); - else - __gpio_set_value(gpio, value); -} - -#define gpio_cansleep __gpio_cansleep - -static inline unsigned gpio_to_irq(unsigned gpio) -{ - if (gpio < 11) - return IRQ_GPIO0 + gpio; - else - return IRQ_GPIO11 - 11 + gpio; -} - -static inline unsigned irq_to_gpio(unsigned irq) -{ - if (irq < IRQ_GPIO11_27) - return irq - IRQ_GPIO0; - else - return irq - IRQ_GPIO11 + 11; -} - -#endif diff --git a/include/asm-arm/arch-sa1100/h3600.h b/include/asm-arm/arch-sa1100/h3600.h deleted file mode 100644 index 3ca0ecf..0000000 --- a/include/asm-arm/arch-sa1100/h3600.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * - * Definitions for H3600 Handheld Computer - * - * Copyright 2000 Compaq Computer Corporation. - * - * Use consistent with the GNU GPL is permitted, - * provided that this copyright notice is - * preserved in its entirety in all copies and derived works. - * - * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Author: Jamey Hicks. - * - * History: - * - * 2001-10-?? Andrew Christian Added support for iPAQ H3800 - * - */ - -#ifndef _INCLUDE_H3600_H_ -#define _INCLUDE_H3600_H_ - -typedef int __bitwise pm_request_t; - -#define PM_SUSPEND ((__force pm_request_t) 1) /* enter D1-D3 */ -#define PM_RESUME ((__force pm_request_t) 2) /* enter D0 */ - -/* generalized support for H3xxx series Compaq Pocket PC's */ -#define machine_is_h3xxx() (machine_is_h3100() || machine_is_h3600() || machine_is_h3800()) - -/* Physical memory regions corresponding to chip selects */ -#define H3600_EGPIO_PHYS (SA1100_CS5_PHYS + 0x01000000) -#define H3600_BANK_2_PHYS SA1100_CS2_PHYS -#define H3600_BANK_4_PHYS SA1100_CS4_PHYS - -/* Virtual memory regions corresponding to chip selects 2 & 4 (used on sleeves) */ -#define H3600_EGPIO_VIRT 0xf0000000 -#define H3600_BANK_2_VIRT 0xf1000000 -#define H3600_BANK_4_VIRT 0xf3800000 - -/* - Machine-independent GPIO definitions - --- these are common across all current iPAQ platforms -*/ - -#define GPIO_H3600_NPOWER_BUTTON GPIO_GPIO (0) /* Also known as the "off button" */ - -#define GPIO_H3600_PCMCIA_CD1 GPIO_GPIO (10) -#define GPIO_H3600_PCMCIA_IRQ1 GPIO_GPIO (11) - -/* UDA1341 L3 Interface */ -#define GPIO_H3600_L3_DATA GPIO_GPIO (14) -#define GPIO_H3600_L3_MODE GPIO_GPIO (15) -#define GPIO_H3600_L3_CLOCK GPIO_GPIO (16) - -#define GPIO_H3600_PCMCIA_CD0 GPIO_GPIO (17) -#define GPIO_H3600_SYS_CLK GPIO_GPIO (19) -#define GPIO_H3600_PCMCIA_IRQ0 GPIO_GPIO (21) - -#define GPIO_H3600_COM_DCD GPIO_GPIO (23) -#define GPIO_H3600_OPT_IRQ GPIO_GPIO (24) -#define GPIO_H3600_COM_CTS GPIO_GPIO (25) -#define GPIO_H3600_COM_RTS GPIO_GPIO (26) - -#define IRQ_GPIO_H3600_NPOWER_BUTTON IRQ_GPIO0 -#define IRQ_GPIO_H3600_PCMCIA_CD1 IRQ_GPIO10 -#define IRQ_GPIO_H3600_PCMCIA_IRQ1 IRQ_GPIO11 -#define IRQ_GPIO_H3600_PCMCIA_CD0 IRQ_GPIO17 -#define IRQ_GPIO_H3600_PCMCIA_IRQ0 IRQ_GPIO21 -#define IRQ_GPIO_H3600_COM_DCD IRQ_GPIO23 -#define IRQ_GPIO_H3600_OPT_IRQ IRQ_GPIO24 -#define IRQ_GPIO_H3600_COM_CTS IRQ_GPIO25 - - -#ifndef __ASSEMBLY__ - -enum ipaq_egpio_type { - IPAQ_EGPIO_LCD_POWER, /* Power to the LCD panel */ - IPAQ_EGPIO_CODEC_NRESET, /* Clear to reset the audio codec (remember to return high) */ - IPAQ_EGPIO_AUDIO_ON, /* Audio power */ - IPAQ_EGPIO_QMUTE, /* Audio muting */ - IPAQ_EGPIO_OPT_NVRAM_ON, /* Non-volatile RAM on extension sleeves (SPI interface) */ - IPAQ_EGPIO_OPT_ON, /* Power to extension sleeves */ - IPAQ_EGPIO_CARD_RESET, /* Reset PCMCIA cards on extension sleeve (???) */ - IPAQ_EGPIO_OPT_RESET, /* Reset option pack (???) */ - IPAQ_EGPIO_IR_ON, /* IR sensor/emitter power */ - IPAQ_EGPIO_IR_FSEL, /* IR speed selection 1->fast, 0->slow */ - IPAQ_EGPIO_RS232_ON, /* Maxim RS232 chip power */ - IPAQ_EGPIO_VPP_ON, /* Turn on power to flash programming */ - IPAQ_EGPIO_LCD_ENABLE, /* Enable/disable LCD controller */ -}; - -struct ipaq_model_ops { - const char *generic_name; - void (*control)(enum ipaq_egpio_type, int); - unsigned long (*read)(void); - void (*blank_callback)(int blank); - int (*pm_callback)(int req); /* Primary model callback */ - int (*pm_callback_aux)(int req); /* Secondary callback (used by HAL modules) */ -}; - -extern struct ipaq_model_ops ipaq_model_ops; - -static __inline__ const char * h3600_generic_name(void) -{ - return ipaq_model_ops.generic_name; -} - -static __inline__ void assign_h3600_egpio(enum ipaq_egpio_type x, int level) -{ - if (ipaq_model_ops.control) - ipaq_model_ops.control(x,level); -} - -static __inline__ void clr_h3600_egpio(enum ipaq_egpio_type x) -{ - if (ipaq_model_ops.control) - ipaq_model_ops.control(x,0); -} - -static __inline__ void set_h3600_egpio(enum ipaq_egpio_type x) -{ - if (ipaq_model_ops.control) - ipaq_model_ops.control(x,1); -} - -static __inline__ unsigned long read_h3600_egpio(void) -{ - if (ipaq_model_ops.read) - return ipaq_model_ops.read(); - return 0; -} - -static __inline__ int h3600_register_blank_callback(void (*f)(int)) -{ - ipaq_model_ops.blank_callback = f; - return 0; -} - -static __inline__ void h3600_unregister_blank_callback(void (*f)(int)) -{ - ipaq_model_ops.blank_callback = NULL; -} - - -static __inline__ int h3600_register_pm_callback(int (*f)(int)) -{ - ipaq_model_ops.pm_callback_aux = f; - return 0; -} - -static __inline__ void h3600_unregister_pm_callback(int (*f)(int)) -{ - ipaq_model_ops.pm_callback_aux = NULL; -} - -static __inline__ int h3600_power_management(int req) -{ - if (ipaq_model_ops.pm_callback) - return ipaq_model_ops.pm_callback(req); - return 0; -} - -#endif /* ASSEMBLY */ - -#endif /* _INCLUDE_H3600_H_ */ diff --git a/include/asm-arm/arch-sa1100/h3600_gpio.h b/include/asm-arm/arch-sa1100/h3600_gpio.h deleted file mode 100644 index 62b0b78..0000000 --- a/include/asm-arm/arch-sa1100/h3600_gpio.h +++ /dev/null @@ -1,540 +0,0 @@ -/* - * - * Definitions for H3600 Handheld Computer - * - * Copyright 2000 Compaq Computer Corporation. - * - * Use consistent with the GNU GPL is permitted, - * provided that this copyright notice is - * preserved in its entirety in all copies and derived works. - * - * COMPAQ COMPUTER CORPORATION MAKES NO WARRANTIES, EXPRESSED OR IMPLIED, - * AS TO THE USEFULNESS OR CORRECTNESS OF THIS CODE OR ITS - * FITNESS FOR ANY PARTICULAR PURPOSE. - * - * Author: Jamey Hicks. - * - * History: - * - * 2001-10-?? Andrew Christian Added support for iPAQ H3800 - * - */ - -#ifndef _INCLUDE_H3600_GPIO_H_ -#define _INCLUDE_H3600_GPIO_H_ - -/* - * GPIO lines that are common across ALL iPAQ models are in "h3600.h" - * This file contains machine-specific definitions - */ - -#define GPIO_H3600_SUSPEND GPIO_GPIO (0) -/* GPIO[2:9] used by LCD on H3600/3800, used as GPIO on H3100 */ -#define GPIO_H3100_BT_ON GPIO_GPIO (2) -#define GPIO_H3100_GPIO3 GPIO_GPIO (3) -#define GPIO_H3100_QMUTE GPIO_GPIO (4) -#define GPIO_H3100_LCD_3V_ON GPIO_GPIO (5) -#define GPIO_H3100_AUD_ON GPIO_GPIO (6) -#define GPIO_H3100_AUD_PWR_ON GPIO_GPIO (7) -#define GPIO_H3100_IR_ON GPIO_GPIO (8) -#define GPIO_H3100_IR_FSEL GPIO_GPIO (9) - -/* for H3600, audio sample rate clock generator */ -#define GPIO_H3600_CLK_SET0 GPIO_GPIO (12) -#define GPIO_H3600_CLK_SET1 GPIO_GPIO (13) - -#define GPIO_H3600_ACTION_BUTTON GPIO_GPIO (18) -#define GPIO_H3600_SOFT_RESET GPIO_GPIO (20) /* Also known as BATT_FAULT */ -#define GPIO_H3600_OPT_LOCK GPIO_GPIO (22) -#define GPIO_H3600_OPT_DET GPIO_GPIO (27) - -/* H3800 specific pins */ -#define GPIO_H3800_AC_IN GPIO_GPIO (12) -#define GPIO_H3800_COM_DSR GPIO_GPIO (13) -#define GPIO_H3800_MMC_INT GPIO_GPIO (18) -#define GPIO_H3800_NOPT_IND GPIO_GPIO (20) /* Almost exactly the same as GPIO_H3600_OPT_DET */ -#define GPIO_H3800_OPT_BAT_FAULT GPIO_GPIO (22) -#define GPIO_H3800_CLK_OUT GPIO_GPIO (27) - -/****************************************************/ - -#define IRQ_GPIO_H3600_ACTION_BUTTON IRQ_GPIO18 -#define IRQ_GPIO_H3600_OPT_DET IRQ_GPIO27 - -#define IRQ_GPIO_H3800_MMC_INT IRQ_GPIO18 -#define IRQ_GPIO_H3800_NOPT_IND IRQ_GPIO20 /* almost same as OPT_DET */ - -/* H3100 / 3600 EGPIO pins */ -#define EGPIO_H3600_VPP_ON (1 << 0) -#define EGPIO_H3600_CARD_RESET (1 << 1) /* reset the attached pcmcia/compactflash card. active high. */ -#define EGPIO_H3600_OPT_RESET (1 << 2) /* reset the attached option pack. active high. */ -#define EGPIO_H3600_CODEC_NRESET (1 << 3) /* reset the onboard UDA1341. active low. */ -#define EGPIO_H3600_OPT_NVRAM_ON (1 << 4) /* apply power to optionpack nvram, active high. */ -#define EGPIO_H3600_OPT_ON (1 << 5) /* full power to option pack. active high. */ -#define EGPIO_H3600_LCD_ON (1 << 6) /* enable 3.3V to LCD. active high. */ -#define EGPIO_H3600_RS232_ON (1 << 7) /* UART3 transceiver force on. Active high. */ - -/* H3600 only EGPIO pins */ -#define EGPIO_H3600_LCD_PCI (1 << 8) /* LCD control IC enable. active high. */ -#define EGPIO_H3600_IR_ON (1 << 9) /* apply power to IR module. active high. */ -#define EGPIO_H3600_AUD_AMP_ON (1 << 10) /* apply power to audio power amp. active high. */ -#define EGPIO_H3600_AUD_PWR_ON (1 << 11) /* apply power to reset of audio circuit. active high. */ -#define EGPIO_H3600_QMUTE (1 << 12) /* mute control for onboard UDA1341. active high. */ -#define EGPIO_H3600_IR_FSEL (1 << 13) /* IR speed select: 1->fast, 0->slow */ -#define EGPIO_H3600_LCD_5V_ON (1 << 14) /* enable 5V to LCD. active high. */ -#define EGPIO_H3600_LVDD_ON (1 << 15) /* enable 9V and -6.5V to LCD. */ - -/********************* H3800, ASIC #2 ********************/ - -#define _H3800_ASIC2_Base (H3600_EGPIO_VIRT) -#define H3800_ASIC2_OFFSET(s,x,y) \ - (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _Base + _H3800_ASIC2_ ## x ## _ ## y))) -#define H3800_ASIC2_NOFFSET(s,x,n,y) \ - (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC2_ ## x ## _ ## n ## _Base + _H3800_ASIC2_ ## x ## _ ## y))) - -#define _H3800_ASIC2_GPIO_Base 0x0000 -#define _H3800_ASIC2_GPIO_Direction 0x0000 /* R/W, 16 bits 1:input, 0:output */ -#define _H3800_ASIC2_GPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */ -#define _H3800_ASIC2_GPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */ -#define _H3800_ASIC2_GPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */ -#define _H3800_ASIC2_GPIO_InterruptClear 0x0010 /* W, 12 bits */ -#define _H3800_ASIC2_GPIO_InterruptFlag 0x0010 /* R, 12 bits - reads int status */ -#define _H3800_ASIC2_GPIO_Data 0x0014 /* R/W, 16 bits */ -#define _H3800_ASIC2_GPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */ -#define _H3800_ASIC2_GPIO_InterruptEnable 0x001c /* R/W, 12 bits 1:enable interrupt */ -#define _H3800_ASIC2_GPIO_Alternate 0x003c /* R/W, 12+1 bits - set alternate functions */ - -#define H3800_ASIC2_GPIO_Direction H3800_ASIC2_OFFSET( u16, GPIO, Direction ) -#define H3800_ASIC2_GPIO_InterruptType H3800_ASIC2_OFFSET( u16, GPIO, InterruptType ) -#define H3800_ASIC2_GPIO_InterruptEdgeType H3800_ASIC2_OFFSET( u16, GPIO, InterruptEdgeType ) -#define H3800_ASIC2_GPIO_InterruptLevelType H3800_ASIC2_OFFSET( u16, GPIO, InterruptLevelType ) -#define H3800_ASIC2_GPIO_InterruptClear H3800_ASIC2_OFFSET( u16, GPIO, InterruptClear ) -#define H3800_ASIC2_GPIO_InterruptFlag H3800_ASIC2_OFFSET( u16, GPIO, InterruptFlag ) -#define H3800_ASIC2_GPIO_Data H3800_ASIC2_OFFSET( u16, GPIO, Data ) -#define H3800_ASIC2_GPIO_BattFaultOut H3800_ASIC2_OFFSET( u16, GPIO, BattFaultOut ) -#define H3800_ASIC2_GPIO_InterruptEnable H3800_ASIC2_OFFSET( u16, GPIO, InterruptEnable ) -#define H3800_ASIC2_GPIO_Alternate H3800_ASIC2_OFFSET( u16, GPIO, Alternate ) - -#define GPIO_H3800_ASIC2_IN_Y1_N (1 << 0) /* Output: Touchscreen Y1 */ -#define GPIO_H3800_ASIC2_IN_X0 (1 << 1) /* Output: Touchscreen X0 */ -#define GPIO_H3800_ASIC2_IN_Y0 (1 << 2) /* Output: Touchscreen Y0 */ -#define GPIO_H3800_ASIC2_IN_X1_N (1 << 3) /* Output: Touchscreen X1 */ -#define GPIO_H3800_ASIC2_BT_RST (1 << 4) /* Output: Bluetooth reset */ -#define GPIO_H3800_ASIC2_PEN_IRQ (1 << 5) /* Input : Pen down */ -#define GPIO_H3800_ASIC2_SD_DETECT (1 << 6) /* Input : SD detect */ -#define GPIO_H3800_ASIC2_EAR_IN_N (1 << 7) /* Input : Audio jack plug inserted */ -#define GPIO_H3800_ASIC2_OPT_PCM_RESET (1 << 8) /* Output: */ -#define GPIO_H3800_ASIC2_OPT_RESET (1 << 9) /* Output: */ -#define GPIO_H3800_ASIC2_USB_DETECT_N (1 << 10) /* Input : */ -#define GPIO_H3800_ASIC2_SD_CON_SLT (1 << 11) /* Input : */ - -#define _H3800_ASIC2_KPIO_Base 0x0200 -#define _H3800_ASIC2_KPIO_Direction 0x0000 /* R/W, 12 bits 1:input, 0:output */ -#define _H3800_ASIC2_KPIO_InterruptType 0x0004 /* R/W, 12 bits 1:edge, 0:level */ -#define _H3800_ASIC2_KPIO_InterruptEdgeType 0x0008 /* R/W, 12 bits 1:rising, 0:falling */ -#define _H3800_ASIC2_KPIO_InterruptLevelType 0x000C /* R/W, 12 bits 1:high, 0:low */ -#define _H3800_ASIC2_KPIO_InterruptClear 0x0010 /* W, 20 bits - 8 special */ -#define _H3800_ASIC2_KPIO_InterruptFlag 0x0010 /* R, 20 bits - 8 special - reads int status */ -#define _H3800_ASIC2_KPIO_Data 0x0014 /* R/W, 16 bits */ -#define _H3800_ASIC2_KPIO_BattFaultOut 0x0018 /* R/W, 16 bit - sets level on batt fault */ -#define _H3800_ASIC2_KPIO_InterruptEnable 0x001c /* R/W, 20 bits - 8 special */ -#define _H3800_ASIC2_KPIO_Alternate 0x003c /* R/W, 6 bits */ - -#define H3800_ASIC2_KPIO_Direction H3800_ASIC2_OFFSET( u16, KPIO, Direction ) -#define H3800_ASIC2_KPIO_InterruptType H3800_ASIC2_OFFSET( u16, KPIO, InterruptType ) -#define H3800_ASIC2_KPIO_InterruptEdgeType H3800_ASIC2_OFFSET( u16, KPIO, InterruptEdgeType ) -#define H3800_ASIC2_KPIO_InterruptLevelType H3800_ASIC2_OFFSET( u16, KPIO, InterruptLevelType ) -#define H3800_ASIC2_KPIO_InterruptClear H3800_ASIC2_OFFSET( u32, KPIO, InterruptClear ) -#define H3800_ASIC2_KPIO_InterruptFlag H3800_ASIC2_OFFSET( u32, KPIO, InterruptFlag ) -#define H3800_ASIC2_KPIO_Data H3800_ASIC2_OFFSET( u16, KPIO, Data ) -#define H3800_ASIC2_KPIO_BattFaultOut H3800_ASIC2_OFFSET( u16, KPIO, BattFaultOut ) -#define H3800_ASIC2_KPIO_InterruptEnable H3800_ASIC2_OFFSET( u32, KPIO, InterruptEnable ) -#define H3800_ASIC2_KPIO_Alternate H3800_ASIC2_OFFSET( u16, KPIO, Alternate ) - -#define H3800_ASIC2_KPIO_SPI_INT ( 1 << 16 ) -#define H3800_ASIC2_KPIO_OWM_INT ( 1 << 17 ) -#define H3800_ASIC2_KPIO_ADC_INT ( 1 << 18 ) -#define H3800_ASIC2_KPIO_UART_0_INT ( 1 << 19 ) -#define H3800_ASIC2_KPIO_UART_1_INT ( 1 << 20 ) -#define H3800_ASIC2_KPIO_TIMER_0_INT ( 1 << 21 ) -#define H3800_ASIC2_KPIO_TIMER_1_INT ( 1 << 22 ) -#define H3800_ASIC2_KPIO_TIMER_2_INT ( 1 << 23 ) - -#define KPIO_H3800_ASIC2_RECORD_BTN_N (1 << 0) /* Record button */ -#define KPIO_H3800_ASIC2_KEY_5W1_N (1 << 1) /* Keypad */ -#define KPIO_H3800_ASIC2_KEY_5W2_N (1 << 2) /* */ -#define KPIO_H3800_ASIC2_KEY_5W3_N (1 << 3) /* */ -#define KPIO_H3800_ASIC2_KEY_5W4_N (1 << 4) /* */ -#define KPIO_H3800_ASIC2_KEY_5W5_N (1 << 5) /* */ -#define KPIO_H3800_ASIC2_KEY_LEFT_N (1 << 6) /* */ -#define KPIO_H3800_ASIC2_KEY_RIGHT_N (1 << 7) /* */ -#define KPIO_H3800_ASIC2_KEY_AP1_N (1 << 8) /* Old "Calendar" */ -#define KPIO_H3800_ASIC2_KEY_AP2_N (1 << 9) /* Old "Schedule" */ -#define KPIO_H3800_ASIC2_KEY_AP3_N (1 << 10) /* Old "Q" */ -#define KPIO_H3800_ASIC2_KEY_AP4_N (1 << 11) /* Old "Undo" */ - -/* Alternate KPIO functions (set by default) */ -#define KPIO_ALT_H3800_ASIC2_KEY_5W1_N (1 << 1) /* Action key */ -#define KPIO_ALT_H3800_ASIC2_KEY_5W2_N (1 << 2) /* J1 of keypad input */ -#define KPIO_ALT_H3800_ASIC2_KEY_5W3_N (1 << 3) /* J2 of keypad input */ -#define KPIO_ALT_H3800_ASIC2_KEY_5W4_N (1 << 4) /* J3 of keypad input */ -#define KPIO_ALT_H3800_ASIC2_KEY_5W5_N (1 << 5) /* J4 of keypad input */ - -#define _H3800_ASIC2_SPI_Base 0x0400 -#define _H3800_ASIC2_SPI_Control 0x0000 /* R/W 8 bits */ -#define _H3800_ASIC2_SPI_Data 0x0004 /* R/W 8 bits */ -#define _H3800_ASIC2_SPI_ChipSelectDisabled 0x0008 /* W 8 bits */ - -#define H3800_ASIC2_SPI_Control H3800_ASIC2_OFFSET( u8, SPI, Control ) -#define H3800_ASIC2_SPI_Data H3800_ASIC2_OFFSET( u8, SPI, Data ) -#define H3800_ASIC2_SPI_ChipSelectDisabled H3800_ASIC2_OFFSET( u8, SPI, ChipSelectDisabled ) - -#define _H3800_ASIC2_PWM_0_Base 0x0600 -#define _H3800_ASIC2_PWM_1_Base 0x0700 -#define _H3800_ASIC2_PWM_TimeBase 0x0000 /* R/W 6 bits */ -#define _H3800_ASIC2_PWM_PeriodTime 0x0004 /* R/W 12 bits */ -#define _H3800_ASIC2_PWM_DutyTime 0x0008 /* R/W 12 bits */ - -#define H3800_ASIC2_PWM_0_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 0, TimeBase ) -#define H3800_ASIC2_PWM_0_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 0, PeriodTime ) -#define H3800_ASIC2_PWM_0_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 0, DutyTime ) - -#define H3800_ASIC2_PWM_1_TimeBase H3800_ASIC2_NOFFSET( u8, PWM, 1, TimeBase ) -#define H3800_ASIC2_PWM_1_PeriodTime H3800_ASIC2_NOFFSET( u16, PWM, 1, PeriodTime ) -#define H3800_ASIC2_PWM_1_DutyTime H3800_ASIC2_NOFFSET( u16, PWM, 1, DutyTime ) - -#define H3800_ASIC2_PWM_TIMEBASE_MASK 0xf /* Low 4 bits sets time base, max = 8 */ -#define H3800_ASIC2_PWM_TIMEBASE_ENABLE ( 1 << 4 ) /* Enable clock */ -#define H3800_ASIC2_PWM_TIMEBASE_CLEAR ( 1 << 5 ) /* Clear the PWM */ - -#define _H3800_ASIC2_LED_0_Base 0x0800 -#define _H3800_ASIC2_LED_1_Base 0x0880 -#define _H3800_ASIC2_LED_2_Base 0x0900 -#define _H3800_ASIC2_LED_TimeBase 0x0000 /* R/W 7 bits */ -#define _H3800_ASIC2_LED_PeriodTime 0x0004 /* R/W 12 bits */ -#define _H3800_ASIC2_LED_DutyTime 0x0008 /* R/W 12 bits */ -#define _H3800_ASIC2_LED_AutoStopCount 0x000c /* R/W 16 bits */ - -#define H3800_ASIC2_LED_0_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 0, TimeBase ) -#define H3800_ASIC2_LED_0_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 0, PeriodTime ) -#define H3800_ASIC2_LED_0_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 0, DutyTime ) -#define H3800_ASIC2_LED_0_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 0, AutoStopClock ) - -#define H3800_ASIC2_LED_1_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 1, TimeBase ) -#define H3800_ASIC2_LED_1_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 1, PeriodTime ) -#define H3800_ASIC2_LED_1_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 1, DutyTime ) -#define H3800_ASIC2_LED_1_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 1, AutoStopClock ) - -#define H3800_ASIC2_LED_2_TimeBase H3800_ASIC2_NOFFSET( u8, LED, 2, TimeBase ) -#define H3800_ASIC2_LED_2_PeriodTime H3800_ASIC2_NOFFSET( u16, LED, 2, PeriodTime ) -#define H3800_ASIC2_LED_2_DutyTime H3800_ASIC2_NOFFSET( u16, LED, 2, DutyTime ) -#define H3800_ASIC2_LED_2_AutoStopClock H3800_ASIC2_NOFFSET( u16, LED, 2, AutoStopClock ) - -#define H3800_ASIC2_LED_TIMEBASE_MASK 0x0f /* Low 4 bits sets time base, max = 13 */ -#define H3800_ASIC2_LED_TIMEBASE_BLINK ( 1 << 4 ) /* Enable blinking */ -#define H3800_ASIC2_LED_TIMEBASE_AUTOSTOP ( 1 << 5 ) -#define H3800_ASIC2_LED_TIMEBASE_ALWAYS ( 1 << 6 ) /* Enable blink always */ - -#define _H3800_ASIC2_UART_0_Base 0x0A00 -#define _H3800_ASIC2_UART_1_Base 0x0C00 -#define _H3800_ASIC2_UART_Receive 0x0000 /* R 8 bits */ -#define _H3800_ASIC2_UART_Transmit 0x0000 /* W 8 bits */ -#define _H3800_ASIC2_UART_IntEnable 0x0004 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_IntVerify 0x0008 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_FIFOControl 0x000c /* R/W 8 bits */ -#define _H3800_ASIC2_UART_LineControl 0x0010 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_ModemStatus 0x0014 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_LineStatus 0x0018 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_ScratchPad 0x001c /* R/W 8 bits */ -#define _H3800_ASIC2_UART_DivisorLatchL 0x0020 /* R/W 8 bits */ -#define _H3800_ASIC2_UART_DivisorLatchH 0x0024 /* R/W 8 bits */ - -#define H3800_ASIC2_UART_0_Receive H3800_ASIC2_NOFFSET( u8, UART, 0, Receive ) -#define H3800_ASIC2_UART_0_Transmit H3800_ASIC2_NOFFSET( u8, UART, 0, Transmit ) -#define H3800_ASIC2_UART_0_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 0, IntEnable ) -#define H3800_ASIC2_UART_0_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 0, IntVerify ) -#define H3800_ASIC2_UART_0_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 0, FIFOControl ) -#define H3800_ASIC2_UART_0_LineControl H3800_ASIC2_NOFFSET( u8, UART, 0, LineControl ) -#define H3800_ASIC2_UART_0_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 0, ModemStatus ) -#define H3800_ASIC2_UART_0_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 0, LineStatus ) -#define H3800_ASIC2_UART_0_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 0, ScratchPad ) -#define H3800_ASIC2_UART_0_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchL ) -#define H3800_ASIC2_UART_0_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 0, DivisorLatchH ) - -#define H3800_ASIC2_UART_1_Receive H3800_ASIC2_NOFFSET( u8, UART, 1, Receive ) -#define H3800_ASIC2_UART_1_Transmit H3800_ASIC2_NOFFSET( u8, UART, 1, Transmit ) -#define H3800_ASIC2_UART_1_IntEnable H3800_ASIC2_NOFFSET( u8, UART, 1, IntEnable ) -#define H3800_ASIC2_UART_1_IntVerify H3800_ASIC2_NOFFSET( u8, UART, 1, IntVerify ) -#define H3800_ASIC2_UART_1_FIFOControl H3800_ASIC2_NOFFSET( u8, UART, 1, FIFOControl ) -#define H3800_ASIC2_UART_1_LineControl H3800_ASIC2_NOFFSET( u8, UART, 1, LineControl ) -#define H3800_ASIC2_UART_1_ModemStatus H3800_ASIC2_NOFFSET( u8, UART, 1, ModemStatus ) -#define H3800_ASIC2_UART_1_LineStatus H3800_ASIC2_NOFFSET( u8, UART, 1, LineStatus ) -#define H3800_ASIC2_UART_1_ScratchPad H3800_ASIC2_NOFFSET( u8, UART, 1, ScratchPad ) -#define H3800_ASIC2_UART_1_DivisorLatchL H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchL ) -#define H3800_ASIC2_UART_1_DivisorLatchH H3800_ASIC2_NOFFSET( u8, UART, 1, DivisorLatchH ) - -#define _H3800_ASIC2_TIMER_Base 0x0E00 -#define _H3800_ASIC2_TIMER_Command 0x0000 /* R/W 8 bits */ - -#define H3800_ASIC2_TIMER_Command H3800_ASIC2_OFFSET( u8, Timer, Command ) - -#define H3800_ASIC2_TIMER_GAT_0 ( 1 << 0 ) /* Gate enable, counter 0 */ -#define H3800_ASIC2_TIMER_GAT_1 ( 1 << 1 ) /* Gate enable, counter 1 */ -#define H3800_ASIC2_TIMER_GAT_2 ( 1 << 2 ) /* Gate enable, counter 2 */ -#define H3800_ASIC2_TIMER_CLK_0 ( 1 << 3 ) /* Clock enable, counter 0 */ -#define H3800_ASIC2_TIMER_CLK_1 ( 1 << 4 ) /* Clock enable, counter 1 */ -#define H3800_ASIC2_TIMER_CLK_2 ( 1 << 5 ) /* Clock enable, counter 2 */ -#define H3800_ASIC2_TIMER_MODE_0 ( 1 << 6 ) /* Mode 0 enable, counter 0 */ -#define H3800_ASIC2_TIMER_MODE_1 ( 1 << 7 ) /* Mode 0 enable, counter 1 */ - -#define _H3800_ASIC2_CLOCK_Base 0x1000 -#define _H3800_ASIC2_CLOCK_Enable 0x0000 /* R/W 18 bits */ - -#define H3800_ASIC2_CLOCK_Enable H3800_ASIC2_OFFSET( u32, CLOCK, Enable ) - -#define H3800_ASIC2_CLOCK_AUDIO_1 0x0001 /* Enable 4.1 MHz clock for 8Khz and 4khz sample rate */ -#define H3800_ASIC2_CLOCK_AUDIO_2 0x0002 /* Enable 12.3 MHz clock for 48Khz and 32khz sample rate */ -#define H3800_ASIC2_CLOCK_AUDIO_3 0x0004 /* Enable 5.6 MHz clock for 11 kHZ sample rate */ -#define H3800_ASIC2_CLOCK_AUDIO_4 0x0008 /* Enable 11.289 MHz clock for 44 and 22 kHz sample rate */ -#define H3800_ASIC2_CLOCK_ADC ( 1 << 4 ) /* 1.024 MHz clock to ADC */ -#define H3800_ASIC2_CLOCK_SPI ( 1 << 5 ) /* 4.096 MHz clock to SPI */ -#define H3800_ASIC2_CLOCK_OWM ( 1 << 6 ) /* 4.096 MHz clock to OWM */ -#define H3800_ASIC2_CLOCK_PWM ( 1 << 7 ) /* 2.048 MHz clock to PWM */ -#define H3800_ASIC2_CLOCK_UART_1 ( 1 << 8 ) /* 24.576 MHz clock to UART1 (turn off bit 16) */ -#define H3800_ASIC2_CLOCK_UART_0 ( 1 << 9 ) /* 24.576 MHz clock to UART0 (turn off bit 17) */ -#define H3800_ASIC2_CLOCK_SD_1 ( 1 << 10 ) /* 16.934 MHz to SD */ -#define H3800_ASIC2_CLOCK_SD_2 ( 2 << 10 ) /* 24.576 MHz to SD */ -#define H3800_ASIC2_CLOCK_SD_3 ( 3 << 10 ) /* 33.869 MHz to SD */ -#define H3800_ASIC2_CLOCK_SD_4 ( 4 << 10 ) /* 49.152 MHz to SD */ -#define H3800_ASIC2_CLOCK_EX0 ( 1 << 13 ) /* Enable 32.768 kHz crystal */ -#define H3800_ASIC2_CLOCK_EX1 ( 1 << 14 ) /* Enable 24.576 MHz crystal */ -#define H3800_ASIC2_CLOCK_EX2 ( 1 << 15 ) /* Enable 33.869 MHz crystal */ -#define H3800_ASIC2_CLOCK_SLOW_UART_1 ( 1 << 16 ) /* Enable 3.686 MHz to UART1 (turn off bit 8) */ -#define H3800_ASIC2_CLOCK_SLOW_UART_0 ( 1 << 17 ) /* Enable 3.686 MHz to UART0 (turn off bit 9) */ - -#define _H3800_ASIC2_ADC_Base 0x1200 -#define _H3800_ASIC2_ADC_Multiplexer 0x0000 /* R/W 4 bits - low 3 bits set channel */ -#define _H3800_ASIC2_ADC_ControlStatus 0x0004 /* R/W 8 bits */ -#define _H3800_ASIC2_ADC_Data 0x0008 /* R 10 bits */ - -#define H3800_ASIC2_ADC_Multiplexer H3800_ASIC2_OFFSET( u8, ADC, Multiplexer ) -#define H3800_ASIC2_ADC_ControlStatus H3800_ASIC2_OFFSET( u8, ADC, ControlStatus ) -#define H3800_ASIC2_ADC_Data H3800_ASIC2_OFFSET( u16, ADC, Data ) - -#define H3600_ASIC2_ADC_MUX_CHANNEL_MASK 0x07 /* Low 3 bits sets channel. max = 4 */ -#define H3600_ASIC2_ADC_MUX_CLKEN ( 1 << 3 ) /* Enable clock */ - -#define H3600_ASIC2_ADC_CSR_ADPS_MASK 0x0f /* Low 4 bits sets prescale, max = 8 */ -#define H3600_ASIC2_ADC_CSR_FREE_RUN ( 1 << 4 ) -#define H3600_ASIC2_ADC_CSR_INT_ENABLE ( 1 << 5 ) -#define H3600_ASIC2_ADC_CSR_START ( 1 << 6 ) /* Set to start conversion. Goes to 0 when done */ -#define H3600_ASIC2_ADC_CSR_ENABLE ( 1 << 7 ) /* 1:power up ADC, 0:power down */ - - -#define _H3800_ASIC2_INTR_Base 0x1600 -#define _H3800_ASIC2_INTR_MaskAndFlag 0x0000 /* R/(W) 8bits */ -#define _H3800_ASIC2_INTR_ClockPrescale 0x0004 /* R/(W) 5bits */ -#define _H3800_ASIC2_INTR_TimerSet 0x0008 /* R/(W) 8bits */ - -#define H3800_ASIC2_INTR_MaskAndFlag H3800_ASIC2_OFFSET( u8, INTR, MaskAndFlag ) -#define H3800_ASIC2_INTR_ClockPrescale H3800_ASIC2_OFFSET( u8, INTR, ClockPrescale ) -#define H3800_ASIC2_INTR_TimerSet H3800_ASIC2_OFFSET( u8, INTR, TimerSet ) - -#define H3800_ASIC2_INTR_GLOBAL_MASK ( 1 << 0 ) /* Global interrupt mask */ -#define H3800_ASIC2_INTR_POWER_ON_RESET ( 1 << 1 ) /* 01: Power on reset (bits 1 & 2 ) */ -#define H3800_ASIC2_INTR_EXTERNAL_RESET ( 2 << 1 ) /* 10: External reset (bits 1 & 2 ) */ -#define H3800_ASIC2_INTR_MASK_UART_0 ( 1 << 4 ) -#define H3800_ASIC2_INTR_MASK_UART_1 ( 1 << 5 ) -#define H3800_ASIC2_INTR_MASK_TIMER ( 1 << 6 ) -#define H3800_ASIC2_INTR_MASK_OWM ( 1 << 7 ) - -#define H3800_ASIC2_INTR_CLOCK_PRESCALE 0x0f /* 4 bits, max 14 */ -#define H3800_ASIC2_INTR_SET ( 1 << 4 ) /* Time base enable */ - - -#define _H3800_ASIC2_OWM_Base 0x1800 -#define _H3800_ASIC2_OWM_Command 0x0000 /* R/W 4 bits command register */ -#define _H3800_ASIC2_OWM_Data 0x0004 /* R/W 8 bits, transmit / receive buffer */ -#define _H3800_ASIC2_OWM_Interrupt 0x0008 /* R/W Command register */ -#define _H3800_ASIC2_OWM_InterruptEnable 0x000c /* R/W Command register */ -#define _H3800_ASIC2_OWM_ClockDivisor 0x0010 /* R/W 5 bits of divisor and pre-scale */ - -#define H3800_ASIC2_OWM_Command H3800_ASIC2_OFFSET( u8, OWM, Command ) -#define H3800_ASIC2_OWM_Data H3800_ASIC2_OFFSET( u8, OWM, Data ) -#define H3800_ASIC2_OWM_Interrupt H3800_ASIC2_OFFSET( u8, OWM, Interrupt ) -#define H3800_ASIC2_OWM_InterruptEnable H3800_ASIC2_OFFSET( u8, OWM, InterruptEnable ) -#define H3800_ASIC2_OWM_ClockDivisor H3800_ASIC2_OFFSET( u8, OWM, ClockDivisor ) - -#define H3800_ASIC2_OWM_CMD_ONE_WIRE_RESET ( 1 << 0 ) /* Set to force reset on 1-wire bus */ -#define H3800_ASIC2_OWM_CMD_SRA ( 1 << 1 ) /* Set to switch to Search ROM accelerator mode */ -#define H3800_ASIC2_OWM_CMD_DQ_OUTPUT ( 1 << 2 ) /* Write only - forces bus low */ -#define H3800_ASIC2_OWM_CMD_DQ_INPUT ( 1 << 3 ) /* Read only - reflects state of bus */ - -#define H3800_ASIC2_OWM_INT_PD ( 1 << 0 ) /* Presence detect */ -#define H3800_ASIC2_OWM_INT_PDR ( 1 << 1 ) /* Presence detect result */ -#define H3800_ASIC2_OWM_INT_TBE ( 1 << 2 ) /* Transmit buffer empty */ -#define H3800_ASIC2_OWM_INT_TEMT ( 1 << 3 ) /* Transmit shift register empty */ -#define H3800_ASIC2_OWM_INT_RBF ( 1 << 4 ) /* Receive buffer full */ - -#define H3800_ASIC2_OWM_INTEN_EPD ( 1 << 0 ) /* Enable receive buffer full interrupt */ -#define H3800_ASIC2_OWM_INTEN_IAS ( 1 << 1 ) /* Enable transmit shift register empty interrupt */ -#define H3800_ASIC2_OWM_INTEN_ETBE ( 1 << 2 ) /* Enable transmit buffer empty interrupt */ -#define H3800_ASIC2_OWM_INTEN_ETMT ( 1 << 3 ) /* INTR active state */ -#define H3800_ASIC2_OWM_INTEN_ERBF ( 1 << 4 ) /* Enable presence detect interrupt */ - -#define _H3800_ASIC2_FlashCtl_Base 0x1A00 - -/****************************************************/ -/* H3800, ASIC #1 - * This ASIC is accesed through ASIC #2, and - * mapped into the 1c00 - 1f00 region - */ - -#define H3800_ASIC1_OFFSET(s,x,y) \ - (*((volatile s *) (_H3800_ASIC2_Base + _H3800_ASIC1_ ## x ## _Base + (_H3800_ASIC1_ ## x ## _ ## y << 1)))) - -#define _H3800_ASIC1_MMC_Base 0x1c00 - -#define _H3800_ASIC1_MMC_StartStopClock 0x00 /* R/W 8bit */ -#define _H3800_ASIC1_MMC_Status 0x02 /* R See below, default 0x0040 */ -#define _H3800_ASIC1_MMC_ClockRate 0x04 /* R/W 8bit, low 3 bits are clock divisor */ -#define _H3800_ASIC1_MMC_SPIRegister 0x08 /* R/W 8bit, see below */ -#define _H3800_ASIC1_MMC_CmdDataCont 0x0a /* R/W 8bit, write to start MMC adapter */ -#define _H3800_ASIC1_MMC_ResponseTimeout 0x0c /* R/W 8bit, clocks before response timeout */ -#define _H3800_ASIC1_MMC_ReadTimeout 0x0e /* R/W 16bit, clocks before received data timeout */ -#define _H3800_ASIC1_MMC_BlockLength 0x10 /* R/W 10bit */ -#define _H3800_ASIC1_MMC_NumOfBlocks 0x12 /* R/W 16bit, in block mode, number of blocks */ -#define _H3800_ASIC1_MMC_InterruptMask 0x1a /* R/W 8bit */ -#define _H3800_ASIC1_MMC_CommandNumber 0x1c /* R/W 6 bits */ -#define _H3800_ASIC1_MMC_ArgumentH 0x1e /* R/W 16 bits */ -#define _H3800_ASIC1_MMC_ArgumentL 0x20 /* R/W 16 bits */ -#define _H3800_ASIC1_MMC_ResFifo 0x22 /* R 8 x 16 bits - contains response FIFO */ -#define _H3800_ASIC1_MMC_BufferPartFull 0x28 /* R/W 8 bits */ - -#define H3800_ASIC1_MMC_StartStopClock H3800_ASIC1_OFFSET( u8, MMC, StartStopClock ) -#define H3800_ASIC1_MMC_Status H3800_ASIC1_OFFSET( u16, MMC, Status ) -#define H3800_ASIC1_MMC_ClockRate H3800_ASIC1_OFFSET( u8, MMC, ClockRate ) -#define H3800_ASIC1_MMC_SPIRegister H3800_ASIC1_OFFSET( u8, MMC, SPIRegister ) -#define H3800_ASIC1_MMC_CmdDataCont H3800_ASIC1_OFFSET( u8, MMC, CmdDataCont ) -#define H3800_ASIC1_MMC_ResponseTimeout H3800_ASIC1_OFFSET( u8, MMC, ResponseTimeout ) -#define H3800_ASIC1_MMC_ReadTimeout H3800_ASIC1_OFFSET( u16, MMC, ReadTimeout ) -#define H3800_ASIC1_MMC_BlockLength H3800_ASIC1_OFFSET( u16, MMC, BlockLength ) -#define H3800_ASIC1_MMC_NumOfBlocks H3800_ASIC1_OFFSET( u16, MMC, NumOfBlocks ) -#define H3800_ASIC1_MMC_InterruptMask H3800_ASIC1_OFFSET( u8, MMC, InterruptMask ) -#define H3800_ASIC1_MMC_CommandNumber H3800_ASIC1_OFFSET( u8, MMC, CommandNumber ) -#define H3800_ASIC1_MMC_ArgumentH H3800_ASIC1_OFFSET( u16, MMC, ArgumentH ) -#define H3800_ASIC1_MMC_ArgumentL H3800_ASIC1_OFFSET( u16, MMC, ArgumentL ) -#define H3800_ASIC1_MMC_ResFifo H3800_ASIC1_OFFSET( u16, MMC, ResFifo ) -#define H3800_ASIC1_MMC_BufferPartFull H3800_ASIC1_OFFSET( u8, MMC, BufferPartFull ) - -#define H3800_ASIC1_MMC_STOP_CLOCK (1 << 0) /* Write to "StartStopClock" register */ -#define H3800_ASIC1_MMC_START_CLOCK (1 << 1) - -#define H3800_ASIC1_MMC_STATUS_READ_TIMEOUT (1 << 0) -#define H3800_ASIC1_MMC_STATUS_RESPONSE_TIMEOUT (1 << 1) -#define H3800_ASIC1_MMC_STATUS_CRC_WRITE_ERROR (1 << 2) -#define H3800_ASIC1_MMC_STATUS_CRC_READ_ERROR (1 << 3) -#define H3800_ASIC1_MMC_STATUS_SPI_READ_ERROR (1 << 4) /* SPI data token error received */ -#define H3800_ASIC1_MMC_STATUS_CRC_RESPONSE_ERROR (1 << 5) -#define H3800_ASIC1_MMC_STATUS_FIFO_EMPTY (1 << 6) -#define H3800_ASIC1_MMC_STATUS_FIFO_FULL (1 << 7) -#define H3800_ASIC1_MMC_STATUS_CLOCK_ENABLE (1 << 8) /* MultiMediaCard clock stopped */ -#define H3800_ASIC1_MMC_STATUS_DATA_TRANSFER_DONE (1 << 11) /* Write operation, indicates transfer finished */ -#define H3800_ASIC1_MMC_STATUS_END_PROGRAM (1 << 12) /* End write and read operations */ -#define H3800_ASIC1_MMC_STATUS_END_COMMAND_RESPONSE (1 << 13) /* End command response */ - -#define H3800_ASIC1_MMC_SPI_REG_SPI_ENABLE (1 << 0) /* Enables SPI mode */ -#define H3800_ASIC1_MMC_SPI_REG_CRC_ON (1 << 1) /* 1:turn on CRC */ -#define H3800_ASIC1_MMC_SPI_REG_SPI_CS_ENABLE (1 << 2) /* 1:turn on SPI CS */ -#define H3800_ASIC1_MMC_SPI_REG_CS_ADDRESS_MASK 0x38 /* Bits 3,4,5 are the SPI CS relative address */ - -#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_NO_RESPONSE 0x00 -#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R1 0x01 -#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R2 0x02 -#define H3800_ASIC1_MMC_CMD_DATA_CONT_FORMAT_R3 0x03 -#define H3800_ASIC1_MMC_CMD_DATA_CONT_DATA_ENABLE (1 << 2) /* This command contains a data transfer */ -#define H3800_ASIC1_MMC_CMD_DATA_CONT_WRITE (1 << 3) /* This data transfer is a write */ -#define H3800_ASIC1_MMC_CMD_DATA_CONT_STREAM_MODE (1 << 4) /* This data transfer is in stream mode */ -#define H3800_ASIC1_MMC_CMD_DATA_CONT_BUSY_BIT (1 << 5) /* Busy signal expected after current cmd */ -#define H3800_ASIC1_MMC_CMD_DATA_CONT_INITIALIZE (1 << 6) /* Enables the 80 bits for initializing card */ - -#define H3800_ASIC1_MMC_INT_MASK_DATA_TRANSFER_DONE (1 << 0) -#define H3800_ASIC1_MMC_INT_MASK_PROGRAM_DONE (1 << 1) -#define H3800_ASIC1_MMC_INT_MASK_END_COMMAND_RESPONSE (1 << 2) -#define H3800_ASIC1_MMC_INT_MASK_BUFFER_READY (1 << 3) - -#define H3800_ASIC1_MMC_BUFFER_PART_FULL (1 << 0) - -/********* GPIO **********/ - -#define _H3800_ASIC1_GPIO_Base 0x1e00 - -#define _H3800_ASIC1_GPIO_Mask 0x30 /* R/W 0:don't mask, 1:mask interrupt */ -#define _H3800_ASIC1_GPIO_Direction 0x32 /* R/W 0:input, 1:output */ -#define _H3800_ASIC1_GPIO_Out 0x34 /* R/W 0:output low, 1:output high */ -#define _H3800_ASIC1_GPIO_TriggerType 0x36 /* R/W 0:level, 1:edge */ -#define _H3800_ASIC1_GPIO_EdgeTrigger 0x38 /* R/W 0:falling, 1:rising */ -#define _H3800_ASIC1_GPIO_LevelTrigger 0x3A /* R/W 0:low, 1:high level detect */ -#define _H3800_ASIC1_GPIO_LevelStatus 0x3C /* R/W 0:none, 1:detect */ -#define _H3800_ASIC1_GPIO_EdgeStatus 0x3E /* R/W 0:none, 1:detect */ -#define _H3800_ASIC1_GPIO_State 0x40 /* R See masks below (default 0) */ -#define _H3800_ASIC1_GPIO_Reset 0x42 /* R/W See masks below (default 0x04) */ -#define _H3800_ASIC1_GPIO_SleepMask 0x44 /* R/W 0:don't mask, 1:mask trigger in sleep mode */ -#define _H3800_ASIC1_GPIO_SleepDir 0x46 /* R/W direction 0:input, 1:output in sleep mode */ -#define _H3800_ASIC1_GPIO_SleepOut 0x48 /* R/W level 0:low, 1:high in sleep mode */ -#define _H3800_ASIC1_GPIO_Status 0x4A /* R Pin status */ -#define _H3800_ASIC1_GPIO_BattFaultDir 0x4C /* R/W direction 0:input, 1:output in batt_fault */ -#define _H3800_ASIC1_GPIO_BattFaultOut 0x4E /* R/W level 0:low, 1:high in batt_fault */ - -#define H3800_ASIC1_GPIO_Mask H3800_ASIC1_OFFSET( u16, GPIO, Mask ) -#define H3800_ASIC1_GPIO_Direction H3800_ASIC1_OFFSET( u16, GPIO, Direction ) -#define H3800_ASIC1_GPIO_Out H3800_ASIC1_OFFSET( u16, GPIO, Out ) -#define H3800_ASIC1_GPIO_TriggerType H3800_ASIC1_OFFSET( u16, GPIO, TriggerType ) -#define H3800_ASIC1_GPIO_EdgeTrigger H3800_ASIC1_OFFSET( u16, GPIO, EdgeTrigger ) -#define H3800_ASIC1_GPIO_LevelTrigger H3800_ASIC1_OFFSET( u16, GPIO, LevelTrigger ) -#define H3800_ASIC1_GPIO_LevelStatus H3800_ASIC1_OFFSET( u16, GPIO, LevelStatus ) -#define H3800_ASIC1_GPIO_EdgeStatus H3800_ASIC1_OFFSET( u16, GPIO, EdgeStatus ) -#define H3800_ASIC1_GPIO_State H3800_ASIC1_OFFSET( u8, GPIO, State ) -#define H3800_ASIC1_GPIO_Reset H3800_ASIC1_OFFSET( u8, GPIO, Reset ) -#define H3800_ASIC1_GPIO_SleepMask H3800_ASIC1_OFFSET( u16, GPIO, SleepMask ) -#define H3800_ASIC1_GPIO_SleepDir H3800_ASIC1_OFFSET( u16, GPIO, SleepDir ) -#define H3800_ASIC1_GPIO_SleepOut H3800_ASIC1_OFFSET( u16, GPIO, SleepOut ) -#define H3800_ASIC1_GPIO_Status H3800_ASIC1_OFFSET( u16, GPIO, Status ) -#define H3800_ASIC1_GPIO_BattFaultDir H3800_ASIC1_OFFSET( u16, GPIO, BattFaultDir ) -#define H3800_ASIC1_GPIO_BattFaultOut H3800_ASIC1_OFFSET( u16, GPIO, BattFaultOut ) - -#define H3800_ASIC1_GPIO_STATE_MASK (1 << 0) -#define H3800_ASIC1_GPIO_STATE_DIRECTION (1 << 1) -#define H3800_ASIC1_GPIO_STATE_OUT (1 << 2) -#define H3800_ASIC1_GPIO_STATE_TRIGGER_TYPE (1 << 3) -#define H3800_ASIC1_GPIO_STATE_EDGE_TRIGGER (1 << 4) -#define H3800_ASIC1_GPIO_STATE_LEVEL_TRIGGER (1 << 5) - -#define H3800_ASIC1_GPIO_RESET_SOFTWARE (1 << 0) -#define H3800_ASIC1_GPIO_RESET_AUTO_SLEEP (1 << 1) -#define H3800_ASIC1_GPIO_RESET_FIRST_PWR_ON (1 << 2) - -/* These are all outputs */ -#define GPIO_H3800_ASIC1_IR_ON_N (1 << 0) /* Apply power to the IR Module */ -#define GPIO_H3800_ASIC1_SD_PWR_ON (1 << 1) /* Secure Digital power on */ -#define GPIO_H3800_ASIC1_RS232_ON (1 << 2) /* Turn on power to the RS232 chip ? */ -#define GPIO_H3800_ASIC1_PULSE_GEN (1 << 3) /* Goes to speaker / earphone */ -#define GPIO_H3800_ASIC1_CH_TIMER (1 << 4) /* */ -#define GPIO_H3800_ASIC1_LCD_5V_ON (1 << 5) /* Enables LCD_5V */ -#define GPIO_H3800_ASIC1_LCD_ON (1 << 6) /* Enables LCD_3V */ -#define GPIO_H3800_ASIC1_LCD_PCI (1 << 7) /* Connects to PDWN on LCD controller */ -#define GPIO_H3800_ASIC1_VGH_ON (1 << 8) /* Drives VGH on the LCD (+9??) */ -#define GPIO_H3800_ASIC1_VGL_ON (1 << 9) /* Drivers VGL on the LCD (-6??) */ -#define GPIO_H3800_ASIC1_FL_PWR_ON (1 << 10) /* Frontlight power on */ -#define GPIO_H3800_ASIC1_BT_PWR_ON (1 << 11) /* Bluetooth power on */ -#define GPIO_H3800_ASIC1_SPK_ON (1 << 12) /* */ -#define GPIO_H3800_ASIC1_EAR_ON_N (1 << 13) /* */ -#define GPIO_H3800_ASIC1_AUD_PWR_ON (1 << 14) /* */ - -/* Write enable for the flash */ - -#define _H3800_ASIC1_FlashWP_Base 0x1F00 -#define _H3800_ASIC1_FlashWP_VPP_ON 0x00 /* R 1: write, 0: protect */ -#define H3800_ASIC1_FlashWP_VPP_ON H3800_ASIC1_OFFSET( u8, FlashWP, VPP_ON ) - -#endif /* _INCLUDE_H3600_GPIO_H_ */ diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h deleted file mode 100644 index 1abd7cf..0000000 --- a/include/asm-arm/arch-sa1100/hardware.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/hardware.h - * - * Copyright (C) 1998 Nicolas Pitre - * - * This file contains the hardware definitions for SA1100 architecture - * - * 2000/05/23 John Dorsey - * Definitions for SA1111 added. - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - - -#define UNCACHEABLE_ADDR 0xfa050000 - - -/* - * SA1100 internal I/O mappings - * - * We have the following mapping: - * phys virt - * 80000000 f8000000 - * 90000000 fa000000 - * a0000000 fc000000 - * b0000000 fe000000 - */ - -#define VIO_BASE 0xf8000000 /* virtual start of IO space */ -#define VIO_SHIFT 3 /* x = IO space shrink power */ -#define PIO_START 0x80000000 /* physical start of IO space */ - -#define io_p2v( x ) \ - ( (((x)&0x00ffffff) | (((x)&0x30000000)>>VIO_SHIFT)) + VIO_BASE ) -#define io_v2p( x ) \ - ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))< -#include -#include - -#error "This code is broken and needs update to match with current ide support" - - -/* - * Set up a hw structure for a specified data port, control port and IRQ. - * This should follow whatever the default interface uses. - */ -static inline void ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port, - unsigned long ctrl_port, int *irq) -{ - unsigned long reg = data_port; - int i; - int regincr = 1; - - /* The Empeg board has the first two address lines unused */ - if (machine_is_empeg()) - regincr = 1 << 2; - - /* The LART doesn't use A0 for IDE */ - if (machine_is_lart()) - regincr = 1 << 1; - - memset(hw, 0, sizeof(*hw)); - - for (i = 0; i <= 7; i++) { - hw->io_ports_array[i] = reg; - reg += regincr; - } - - hw->io_ports.ctl_addr = ctrl_port; - - if (irq) - *irq = 0; -} - -/* - * This registers the standard ports for this architecture with the IDE - * driver. - */ -static __inline__ void -ide_init_default_hwifs(void) -{ - if (machine_is_lart()) { -#ifdef CONFIG_SA1100_LART - hw_regs_t hw; - - /* Enable GPIO as interrupt line */ - GPDR &= ~LART_GPIO_IDE; - set_irq_type(LART_IRQ_IDE, IRQ_TYPE_EDGE_RISING); - - /* set PCMCIA interface timing */ - MECR = 0x00060006; - - /* init the interface */ - ide_init_hwif_ports(&hw, PCMCIA_IO_0_BASE + 0x0000, PCMCIA_IO_0_BASE + 0x1000, NULL); - hw.irq = LART_IRQ_IDE; - ide_register_hw(&hw); -#endif - } -} diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h deleted file mode 100644 index 0756269..0000000 --- a/include/asm-arm/arch-sa1100/io.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/io.h - * - * Copyright (C) 1997-1999 Russell King - * - * Modifications: - * 06-12-1997 RMK Created. - * 07-04-1999 RMK Major cleanup - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We don't actually have real ISA nor PCI buses, but there is so many - * drivers out there that might just work if we fake them... - */ -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-sa1100/irqs.h b/include/asm-arm/arch-sa1100/irqs.h deleted file mode 100644 index 7bf8048..0000000 --- a/include/asm-arm/arch-sa1100/irqs.h +++ /dev/null @@ -1,197 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/irqs.h - * - * Copyright (C) 1996 Russell King - * Copyright (C) 1998 Deborah Wallach (updates for SA1100/Brutus). - * Copyright (C) 1999 Nicolas Pitre (full GPIO irq isolation) - * - * 2001/11/14 RMK Cleaned up and standardised a lot of the IRQs. - */ - -#define IRQ_GPIO0 0 -#define IRQ_GPIO1 1 -#define IRQ_GPIO2 2 -#define IRQ_GPIO3 3 -#define IRQ_GPIO4 4 -#define IRQ_GPIO5 5 -#define IRQ_GPIO6 6 -#define IRQ_GPIO7 7 -#define IRQ_GPIO8 8 -#define IRQ_GPIO9 9 -#define IRQ_GPIO10 10 -#define IRQ_GPIO11_27 11 -#define IRQ_LCD 12 /* LCD controller */ -#define IRQ_Ser0UDC 13 /* Ser. port 0 UDC */ -#define IRQ_Ser1SDLC 14 /* Ser. port 1 SDLC */ -#define IRQ_Ser1UART 15 /* Ser. port 1 UART */ -#define IRQ_Ser2ICP 16 /* Ser. port 2 ICP */ -#define IRQ_Ser3UART 17 /* Ser. port 3 UART */ -#define IRQ_Ser4MCP 18 /* Ser. port 4 MCP */ -#define IRQ_Ser4SSP 19 /* Ser. port 4 SSP */ -#define IRQ_DMA0 20 /* DMA controller channel 0 */ -#define IRQ_DMA1 21 /* DMA controller channel 1 */ -#define IRQ_DMA2 22 /* DMA controller channel 2 */ -#define IRQ_DMA3 23 /* DMA controller channel 3 */ -#define IRQ_DMA4 24 /* DMA controller channel 4 */ -#define IRQ_DMA5 25 /* DMA controller channel 5 */ -#define IRQ_OST0 26 /* OS Timer match 0 */ -#define IRQ_OST1 27 /* OS Timer match 1 */ -#define IRQ_OST2 28 /* OS Timer match 2 */ -#define IRQ_OST3 29 /* OS Timer match 3 */ -#define IRQ_RTC1Hz 30 /* RTC 1 Hz clock */ -#define IRQ_RTCAlrm 31 /* RTC Alarm */ - -#define IRQ_GPIO11 32 -#define IRQ_GPIO12 33 -#define IRQ_GPIO13 34 -#define IRQ_GPIO14 35 -#define IRQ_GPIO15 36 -#define IRQ_GPIO16 37 -#define IRQ_GPIO17 38 -#define IRQ_GPIO18 39 -#define IRQ_GPIO19 40 -#define IRQ_GPIO20 41 -#define IRQ_GPIO21 42 -#define IRQ_GPIO22 43 -#define IRQ_GPIO23 44 -#define IRQ_GPIO24 45 -#define IRQ_GPIO25 46 -#define IRQ_GPIO26 47 -#define IRQ_GPIO27 48 - -/* - * The next 16 interrupts are for board specific purposes. Since - * the kernel can only run on one machine at a time, we can re-use - * these. If you need more, increase IRQ_BOARD_END, but keep it - * within sensible limits. IRQs 49 to 64 are available. - */ -#define IRQ_BOARD_START 49 -#define IRQ_BOARD_END 65 - -#define IRQ_SA1111_START (IRQ_BOARD_END) -#define IRQ_GPAIN0 (IRQ_BOARD_END + 0) -#define IRQ_GPAIN1 (IRQ_BOARD_END + 1) -#define IRQ_GPAIN2 (IRQ_BOARD_END + 2) -#define IRQ_GPAIN3 (IRQ_BOARD_END + 3) -#define IRQ_GPBIN0 (IRQ_BOARD_END + 4) -#define IRQ_GPBIN1 (IRQ_BOARD_END + 5) -#define IRQ_GPBIN2 (IRQ_BOARD_END + 6) -#define IRQ_GPBIN3 (IRQ_BOARD_END + 7) -#define IRQ_GPBIN4 (IRQ_BOARD_END + 8) -#define IRQ_GPBIN5 (IRQ_BOARD_END + 9) -#define IRQ_GPCIN0 (IRQ_BOARD_END + 10) -#define IRQ_GPCIN1 (IRQ_BOARD_END + 11) -#define IRQ_GPCIN2 (IRQ_BOARD_END + 12) -#define IRQ_GPCIN3 (IRQ_BOARD_END + 13) -#define IRQ_GPCIN4 (IRQ_BOARD_END + 14) -#define IRQ_GPCIN5 (IRQ_BOARD_END + 15) -#define IRQ_GPCIN6 (IRQ_BOARD_END + 16) -#define IRQ_GPCIN7 (IRQ_BOARD_END + 17) -#define IRQ_MSTXINT (IRQ_BOARD_END + 18) -#define IRQ_MSRXINT (IRQ_BOARD_END + 19) -#define IRQ_MSSTOPERRINT (IRQ_BOARD_END + 20) -#define IRQ_TPTXINT (IRQ_BOARD_END + 21) -#define IRQ_TPRXINT (IRQ_BOARD_END + 22) -#define IRQ_TPSTOPERRINT (IRQ_BOARD_END + 23) -#define SSPXMTINT (IRQ_BOARD_END + 24) -#define SSPRCVINT (IRQ_BOARD_END + 25) -#define SSPROR (IRQ_BOARD_END + 26) -#define AUDXMTDMADONEA (IRQ_BOARD_END + 32) -#define AUDRCVDMADONEA (IRQ_BOARD_END + 33) -#define AUDXMTDMADONEB (IRQ_BOARD_END + 34) -#define AUDRCVDMADONEB (IRQ_BOARD_END + 35) -#define AUDTFSR (IRQ_BOARD_END + 36) -#define AUDRFSR (IRQ_BOARD_END + 37) -#define AUDTUR (IRQ_BOARD_END + 38) -#define AUDROR (IRQ_BOARD_END + 39) -#define AUDDTS (IRQ_BOARD_END + 40) -#define AUDRDD (IRQ_BOARD_END + 41) -#define AUDSTO (IRQ_BOARD_END + 42) -#define IRQ_USBPWR (IRQ_BOARD_END + 43) -#define IRQ_HCIM (IRQ_BOARD_END + 44) -#define IRQ_HCIBUFFACC (IRQ_BOARD_END + 45) -#define IRQ_HCIRMTWKP (IRQ_BOARD_END + 46) -#define IRQ_NHCIMFCIR (IRQ_BOARD_END + 47) -#define IRQ_USB_PORT_RESUME (IRQ_BOARD_END + 48) -#define IRQ_S0_READY_NINT (IRQ_BOARD_END + 49) -#define IRQ_S1_READY_NINT (IRQ_BOARD_END + 50) -#define IRQ_S0_CD_VALID (IRQ_BOARD_END + 51) -#define IRQ_S1_CD_VALID (IRQ_BOARD_END + 52) -#define IRQ_S0_BVD1_STSCHG (IRQ_BOARD_END + 53) -#define IRQ_S1_BVD1_STSCHG (IRQ_BOARD_END + 54) - -#define IRQ_LOCOMO_START (IRQ_BOARD_END) -#define IRQ_LOCOMO_KEY (IRQ_BOARD_END + 0) -#define IRQ_LOCOMO_GPIO0 (IRQ_BOARD_END + 1) -#define IRQ_LOCOMO_GPIO1 (IRQ_BOARD_END + 2) -#define IRQ_LOCOMO_GPIO2 (IRQ_BOARD_END + 3) -#define IRQ_LOCOMO_GPIO3 (IRQ_BOARD_END + 4) -#define IRQ_LOCOMO_GPIO4 (IRQ_BOARD_END + 5) -#define IRQ_LOCOMO_GPIO5 (IRQ_BOARD_END + 6) -#define IRQ_LOCOMO_GPIO6 (IRQ_BOARD_END + 7) -#define IRQ_LOCOMO_GPIO7 (IRQ_BOARD_END + 8) -#define IRQ_LOCOMO_GPIO8 (IRQ_BOARD_END + 9) -#define IRQ_LOCOMO_GPIO9 (IRQ_BOARD_END + 10) -#define IRQ_LOCOMO_GPIO10 (IRQ_BOARD_END + 11) -#define IRQ_LOCOMO_GPIO11 (IRQ_BOARD_END + 12) -#define IRQ_LOCOMO_GPIO12 (IRQ_BOARD_END + 13) -#define IRQ_LOCOMO_GPIO13 (IRQ_BOARD_END + 14) -#define IRQ_LOCOMO_GPIO14 (IRQ_BOARD_END + 15) -#define IRQ_LOCOMO_GPIO15 (IRQ_BOARD_END + 16) -#define IRQ_LOCOMO_LT (IRQ_BOARD_END + 17) -#define IRQ_LOCOMO_SPI_RFR (IRQ_BOARD_END + 18) -#define IRQ_LOCOMO_SPI_RFW (IRQ_BOARD_END + 19) -#define IRQ_LOCOMO_SPI_REND (IRQ_BOARD_END + 20) -#define IRQ_LOCOMO_SPI_TEND (IRQ_BOARD_END + 21) - -/* - * Figure out the MAX IRQ number. - * - * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1. - * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1 - * Otherwise, we have the standard IRQs only. - */ -#ifdef CONFIG_SA1111 -#define NR_IRQS (IRQ_S1_BVD1_STSCHG + 1) -#elif defined(CONFIG_SA1100_H3800) -#define NR_IRQS (IRQ_BOARD_END) -#elif defined(CONFIG_SHARP_LOCOMO) -#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1) -#else -#define NR_IRQS (IRQ_BOARD_START) -#endif - -/* - * Board specific IRQs. Define them here. - * Do not surround them with ifdefs. - */ -#define IRQ_NEPONSET_SMC9196 (IRQ_BOARD_START + 0) -#define IRQ_NEPONSET_USAR (IRQ_BOARD_START + 1) -#define IRQ_NEPONSET_SA1111 (IRQ_BOARD_START + 2) - -/* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */ -#define IRQ_LOCOMO_KEY_BASE (IRQ_BOARD_START + 0) -#define IRQ_LOCOMO_GPIO_BASE (IRQ_BOARD_START + 1) -#define IRQ_LOCOMO_LT_BASE (IRQ_BOARD_START + 2) -#define IRQ_LOCOMO_SPI_BASE (IRQ_BOARD_START + 3) - -/* H3800-specific IRQs (CONFIG_SA1100_H3800) */ -#define H3800_KPIO_IRQ_START (IRQ_BOARD_START) -#define IRQ_H3800_KEY (IRQ_BOARD_START + 0) -#define IRQ_H3800_SPI (IRQ_BOARD_START + 1) -#define IRQ_H3800_OWM (IRQ_BOARD_START + 2) -#define IRQ_H3800_ADC (IRQ_BOARD_START + 3) -#define IRQ_H3800_UART_0 (IRQ_BOARD_START + 4) -#define IRQ_H3800_UART_1 (IRQ_BOARD_START + 5) -#define IRQ_H3800_TIMER_0 (IRQ_BOARD_START + 6) -#define IRQ_H3800_TIMER_1 (IRQ_BOARD_START + 7) -#define IRQ_H3800_TIMER_2 (IRQ_BOARD_START + 8) -#define H3800_KPIO_IRQ_COUNT 9 - -#define H3800_GPIO_IRQ_START (IRQ_BOARD_START + 9) -#define IRQ_H3800_PEN (IRQ_BOARD_START + 9) -#define IRQ_H3800_SD_DETECT (IRQ_BOARD_START + 10) -#define IRQ_H3800_EAR_IN (IRQ_BOARD_START + 11) -#define IRQ_H3800_USB_DETECT (IRQ_BOARD_START + 12) -#define IRQ_H3800_SD_CON_SLT (IRQ_BOARD_START + 13) -#define H3800_GPIO_IRQ_COUNT 5 diff --git a/include/asm-arm/arch-sa1100/jornada720.h b/include/asm-arm/arch-sa1100/jornada720.h deleted file mode 100644 index 45d2bb5..0000000 --- a/include/asm-arm/arch-sa1100/jornada720.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * include/asm-arm/arch-sa1100/jornada720.h - * - * This file contains SSP/MCU communication definitions for HP Jornada 710/720/728 - * - * Copyright (C) 2007 Kristoffer Ericson - * Copyright (C) 2000 John Ankcorn - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - - /* HP Jornada 7xx microprocessor commands */ -#define GETBATTERYDATA 0xc0 -#define GETSCANKEYCODE 0x90 -#define GETTOUCHSAMPLES 0xa0 -#define GETCONTRAST 0xD0 -#define SETCONTRAST 0xD1 -#define GETBRIGHTNESS 0xD2 -#define SETBRIGHTNESS 0xD3 -#define CONTRASTOFF 0xD8 -#define BRIGHTNESSOFF 0xD9 -#define PWMOFF 0xDF -#define TXDUMMY 0x11 -#define ERRORCODE 0x00 diff --git a/include/asm-arm/arch-sa1100/lart.h b/include/asm-arm/arch-sa1100/lart.h deleted file mode 100644 index 8a5482d..0000000 --- a/include/asm-arm/arch-sa1100/lart.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef _INCLUDE_LART_H -#define _INCLUDE_LART_H - -#define LART_GPIO_ETH0 GPIO_GPIO0 -#define LART_IRQ_ETH0 IRQ_GPIO0 - -#define LART_GPIO_IDE GPIO_GPIO1 -#define LART_IRQ_IDE IRQ_GPIO1 - -#define LART_GPIO_UCB1200 GPIO_GPIO18 -#define LART_IRQ_UCB1200 IRQ_GPIO18 - -#endif diff --git a/include/asm-arm/arch-sa1100/mcp.h b/include/asm-arm/arch-sa1100/mcp.h deleted file mode 100644 index f58a227..0000000 --- a/include/asm-arm/arch-sa1100/mcp.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/mcp.h - * - * Copyright (C) 2005 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARM_ARCH_MCP_H -#define __ASM_ARM_ARCH_MCP_H - -#include - -struct mcp_plat_data { - u32 mccr0; - u32 mccr1; - unsigned int sclk_rate; -}; - -#endif diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h deleted file mode 100644 index 0e907fc..0000000 --- a/include/asm-arm/arch-sa1100/memory.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/memory.h - * - * Copyright (C) 1999-2000 Nicolas Pitre - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset is 0xc0000000 on the SA1100 - */ -#define PHYS_OFFSET UL(0xc0000000) - -#ifndef __ASSEMBLY__ - -#ifdef CONFIG_SA1111 -void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes); - -#define arch_adjust_zones(node, size, holes) \ - sa1111_adjust_zones(node, size, holes) - -#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_1M - 1) - -#endif -#endif - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - * - * On the SA1100, bus addresses are equivalent to physical addresses. - */ -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * Because of the wide memory address space between physical RAM banks on the - * SA1100, it's much convenient to use Linux's NUMA support to implement our - * memory map representation. Assuming all memory nodes have equal access - * characteristics, we then have generic discontiguous memory support. - * - * Of course, all this isn't mandatory for SA1100 implementations with only - * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. - * - * The nodes are matched with the physical memory bank addresses which are - * incidentally the same as virtual addresses. - * - * node 0: 0xc0000000 - 0xc7ffffff - * node 1: 0xc8000000 - 0xcfffffff - * node 2: 0xd0000000 - 0xd7ffffff - * node 3: 0xd8000000 - 0xdfffffff - */ -#define NODE_MEM_SIZE_BITS 27 - -/* - * Cache flushing area - SA1100 zero bank - */ -#define FLUSH_BASE_PHYS 0xe0000000 -#define FLUSH_BASE 0xf5000000 -#define FLUSH_BASE_MINICACHE 0xf5100000 - -#endif diff --git a/include/asm-arm/arch-sa1100/mtd-xip.h b/include/asm-arm/arch-sa1100/mtd-xip.h deleted file mode 100644 index 80cfdac..0000000 --- a/include/asm-arm/arch-sa1100/mtd-xip.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * MTD primitives for XIP support. Architecture specific functions - * - * Do not include this file directly. It's included from linux/mtd/xip.h - * - * Author: Nicolas Pitre - * Created: Nov 2, 2004 - * Copyright: (C) 2004 MontaVista Software, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * $Id: xip.h,v 1.2 2004/12/01 15:49:10 nico Exp $ - */ - -#ifndef __ARCH_SA1100_MTD_XIP_H__ -#define __ARCH_SA1100_MTD_XIP_H__ - -#define xip_irqpending() (ICIP & ICMR) - -/* we sample OSCR and convert desired delta to usec (1/4 ~= 1000000/3686400) */ -#define xip_currtime() (OSCR) -#define xip_elapsed_since(x) (signed)((OSCR - (x)) / 4) - -#endif /* __ARCH_SA1100_MTD_XIP_H__ */ diff --git a/include/asm-arm/arch-sa1100/neponset.h b/include/asm-arm/arch-sa1100/neponset.h deleted file mode 100644 index 09ec9e2..0000000 --- a/include/asm-arm/arch-sa1100/neponset.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/neponset.h - * - * Created 2000/06/05 by Nicolas Pitre - * - * This file contains the hardware specific definitions for Assabet - * Only include this file from SA1100-specific files. - * - * 2000/05/23 John Dorsey - * Definitions for Neponset added. - */ -#ifndef __ASM_ARCH_NEPONSET_H -#define __ASM_ARCH_NEPONSET_H - -/* - * Neponset definitions: - */ - -#define NEPONSET_CPLD_BASE (0x10000000) -#define Nep_p2v( x ) ((x) - NEPONSET_CPLD_BASE + 0xf3000000) -#define Nep_v2p( x ) ((x) - 0xf3000000 + NEPONSET_CPLD_BASE) - -#define _IRR 0x10000024 /* Interrupt Reason Register */ -#define _AUD_CTL 0x100000c0 /* Audio controls (RW) */ -#define _MDM_CTL_0 0x100000b0 /* Modem control 0 (RW) */ -#define _MDM_CTL_1 0x100000b4 /* Modem control 1 (RW) */ -#define _NCR_0 0x100000a0 /* Control Register (RW) */ -#define _KP_X_OUT 0x10000090 /* Keypad row write (RW) */ -#define _KP_Y_IN 0x10000080 /* Keypad column read (RO) */ -#define _SWPK 0x10000020 /* Switch pack (RO) */ -#define _WHOAMI 0x10000000 /* System ID Register (RO) */ - -#define _LEDS 0x10000010 /* LEDs [31:0] (WO) */ - -#define IRR (*((volatile u_char *) Nep_p2v(_IRR))) -#define AUD_CTL (*((volatile u_char *) Nep_p2v(_AUD_CTL))) -#define MDM_CTL_0 (*((volatile u_char *) Nep_p2v(_MDM_CTL_0))) -#define MDM_CTL_1 (*((volatile u_char *) Nep_p2v(_MDM_CTL_1))) -#define NCR_0 (*((volatile u_char *) Nep_p2v(_NCR_0))) -#define KP_X_OUT (*((volatile u_char *) Nep_p2v(_KP_X_OUT))) -#define KP_Y_IN (*((volatile u_char *) Nep_p2v(_KP_Y_IN))) -#define SWPK (*((volatile u_char *) Nep_p2v(_SWPK))) -#define WHOAMI (*((volatile u_char *) Nep_p2v(_WHOAMI))) - -#define LEDS (*((volatile Word *) Nep_p2v(_LEDS))) - -#define IRR_ETHERNET (1<<0) -#define IRR_USAR (1<<1) -#define IRR_SA1111 (1<<2) - -#define AUD_SEL_1341 (1<<0) -#define AUD_MUTE_1341 (1<<1) - -#define MDM_CTL0_RTS1 (1 << 0) -#define MDM_CTL0_DTR1 (1 << 1) -#define MDM_CTL0_RTS2 (1 << 2) -#define MDM_CTL0_DTR2 (1 << 3) - -#define MDM_CTL1_CTS1 (1 << 0) -#define MDM_CTL1_DSR1 (1 << 1) -#define MDM_CTL1_DCD1 (1 << 2) -#define MDM_CTL1_CTS2 (1 << 3) -#define MDM_CTL1_DSR2 (1 << 4) -#define MDM_CTL1_DCD2 (1 << 5) - -#define NCR_GP01_OFF (1<<0) -#define NCR_TP_PWR_EN (1<<1) -#define NCR_MS_PWR_EN (1<<2) -#define NCR_ENET_OSC_EN (1<<3) -#define NCR_SPI_KB_WK_UP (1<<4) -#define NCR_A0VPP (1<<5) -#define NCR_A1VPP (1<<6) - -#endif diff --git a/include/asm-arm/arch-sa1100/shannon.h b/include/asm-arm/arch-sa1100/shannon.h deleted file mode 100644 index ec27d6e..0000000 --- a/include/asm-arm/arch-sa1100/shannon.h +++ /dev/null @@ -1,43 +0,0 @@ -#ifndef _INCLUDE_SHANNON_H -#define _INCLUDE_SHANNON_H - -/* taken from comp.os.inferno Tue, 12 Sep 2000 09:21:50 GMT, - * written by */ - -#define SHANNON_GPIO_SPI_FLASH GPIO_GPIO (0) /* Output - Driven low, enables SPI to flash */ -#define SHANNON_GPIO_SPI_DSP GPIO_GPIO (1) /* Output - Driven low, enables SPI to DSP */ -/* lcd lower = GPIO 2-9 */ -#define SHANNON_GPIO_SPI_OUTPUT GPIO_GPIO (10) /* Output - SPI output to DSP */ -#define SHANNON_GPIO_SPI_INPUT GPIO_GPIO (11) /* Input - SPI input from DSP */ -#define SHANNON_GPIO_SPI_CLOCK GPIO_GPIO (12) /* Output - Clock for SPI */ -#define SHANNON_GPIO_SPI_FRAME GPIO_GPIO (13) /* Output - Frame marker - not used */ -#define SHANNON_GPIO_SPI_RTS GPIO_GPIO (14) /* Input - SPI Ready to Send */ -#define SHANNON_IRQ_GPIO_SPI_RTS IRQ_GPIO14 -#define SHANNON_GPIO_SPI_CTS GPIO_GPIO (15) /* Output - SPI Clear to Send */ -#define SHANNON_GPIO_IRQ_CODEC GPIO_GPIO (16) /* in, irq from ucb1200 */ -#define SHANNON_IRQ_GPIO_IRQ_CODEC IRQ_GPIO16 -#define SHANNON_GPIO_DSP_RESET GPIO_GPIO (17) /* Output - Drive low to reset the DSP */ -#define SHANNON_GPIO_CODEC_RESET GPIO_GPIO (18) /* Output - Drive low to reset the UCB1x00 */ -#define SHANNON_GPIO_U3_RTS GPIO_GPIO (19) /* ?? */ -#define SHANNON_GPIO_U3_CTS GPIO_GPIO (20) /* ?? */ -#define SHANNON_GPIO_SENSE_12V GPIO_GPIO (21) /* Input, 12v flash unprotect detected */ -#define SHANNON_GPIO_DISP_EN GPIO_GPIO (22) /* out */ -/* XXX GPIO 23 unaccounted for */ -#define SHANNON_GPIO_EJECT_0 GPIO_GPIO (24) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_0 IRQ_GPIO24 -#define SHANNON_GPIO_EJECT_1 GPIO_GPIO (25) /* in */ -#define SHANNON_IRQ_GPIO_EJECT_1 IRQ_GPIO25 -#define SHANNON_GPIO_RDY_0 GPIO_GPIO (26) /* in */ -#define SHANNON_IRQ_GPIO_RDY_0 IRQ_GPIO26 -#define SHANNON_GPIO_RDY_1 GPIO_GPIO (27) /* in */ -#define SHANNON_IRQ_GPIO_RDY_1 IRQ_GPIO27 - -/* MCP UCB codec GPIO pins... */ - -#define SHANNON_UCB_GPIO_BACKLIGHT 9 -#define SHANNON_UCB_GPIO_BRIGHT_MASK 7 -#define SHANNON_UCB_GPIO_BRIGHT 6 -#define SHANNON_UCB_GPIO_CONTRAST_MASK 0x3f -#define SHANNON_UCB_GPIO_CONTRAST 0 - -#endif diff --git a/include/asm-arm/arch-sa1100/simpad.h b/include/asm-arm/arch-sa1100/simpad.h deleted file mode 100644 index 034301d..0000000 --- a/include/asm-arm/arch-sa1100/simpad.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/simpad.h - * - * based of assabet.h same as HUW_Webpanel - * - * This file contains the hardware specific definitions for SIMpad - * - * 2001/05/14 Juergen Messerer - */ - -#ifndef __ASM_ARCH_SIMPAD_H -#define __ASM_ARCH_SIMPAD_H - - -#define GPIO_UART1_RTS GPIO_GPIO14 -#define GPIO_UART1_DTR GPIO_GPIO7 -#define GPIO_UART1_CTS GPIO_GPIO8 -#define GPIO_UART1_DCD GPIO_GPIO23 -#define GPIO_UART1_DSR GPIO_GPIO6 - -#define GPIO_UART3_RTS GPIO_GPIO12 -#define GPIO_UART3_DTR GPIO_GPIO16 -#define GPIO_UART3_CTS GPIO_GPIO13 -#define GPIO_UART3_DCD GPIO_GPIO18 -#define GPIO_UART3_DSR GPIO_GPIO17 - -#define GPIO_POWER_BUTTON GPIO_GPIO0 -#define GPIO_UCB1300_IRQ GPIO_GPIO22 /* UCB GPIO and touchscreen */ - -#define IRQ_UART1_CTS IRQ_GPIO15 -#define IRQ_UART1_DCD GPIO_GPIO23 -#define IRQ_UART1_DSR GPIO_GPIO6 -#define IRQ_UART3_CTS GPIO_GPIO13 -#define IRQ_UART3_DCD GPIO_GPIO18 -#define IRQ_UART3_DSR GPIO_GPIO17 - -#define IRQ_GPIO_UCB1300_IRQ IRQ_GPIO22 -#define IRQ_GPIO_POWER_BUTTON IRQ_GPIO0 - - -/*--- PCMCIA ---*/ -#define GPIO_CF_CD GPIO_GPIO24 -#define GPIO_CF_IRQ GPIO_GPIO1 -#define IRQ_GPIO_CF_IRQ IRQ_GPIO1 -#define IRQ_GPIO_CF_CD IRQ_GPIO24 - -/*--- SmartCard ---*/ -#define GPIO_SMART_CARD GPIO_GPIO10 -#define IRQ_GPIO_SMARD_CARD IRQ_GPIO10 - -// CS3 Latch is write only, a shadow is necessary - -#define CS3BUSTYPE unsigned volatile long -#define CS3_BASE 0xf1000000 - -#define VCC_5V_EN 0x0001 // For 5V PCMCIA -#define VCC_3V_EN 0x0002 // FOR 3.3V PCMCIA -#define EN1 0x0004 // This is only for EPROM's -#define EN0 0x0008 // Both should be enable for 3.3V or 5V -#define DISPLAY_ON 0x0010 -#define PCMCIA_BUFF_DIS 0x0020 -#define MQ_RESET 0x0040 -#define PCMCIA_RESET 0x0080 -#define DECT_POWER_ON 0x0100 -#define IRDA_SD 0x0200 // Shutdown for powersave -#define RS232_ON 0x0400 -#define SD_MEDIAQ 0x0800 // Shutdown for powersave -#define LED2_ON 0x1000 -#define IRDA_MODE 0x2000 // Fast/Slow IrDA mode -#define ENABLE_5V 0x4000 // Enable 5V circuit -#define RESET_SIMCARD 0x8000 - -#define RS232_ENABLE 0x0440 -#define PCMCIAMASK 0x402f - - -struct simpad_battery { - unsigned char ac_status; /* line connected yes/no */ - unsigned char status; /* battery loading yes/no */ - unsigned char percentage; /* percentage loaded */ - unsigned short life; /* life till empty */ -}; - -/* These should match the apm_bios.h definitions */ -#define SIMPAD_AC_STATUS_AC_OFFLINE 0x00 -#define SIMPAD_AC_STATUS_AC_ONLINE 0x01 -#define SIMPAD_AC_STATUS_AC_BACKUP 0x02 /* What does this mean? */ -#define SIMPAD_AC_STATUS_AC_UNKNOWN 0xff - -/* These bitfields are rarely "or'd" together */ -#define SIMPAD_BATT_STATUS_HIGH 0x01 -#define SIMPAD_BATT_STATUS_LOW 0x02 -#define SIMPAD_BATT_STATUS_CRITICAL 0x04 -#define SIMPAD_BATT_STATUS_CHARGING 0x08 -#define SIMPAD_BATT_STATUS_CHARGE_MAIN 0x10 -#define SIMPAD_BATT_STATUS_DEAD 0x20 /* Battery will not charge */ -#define SIMPAD_BATT_NOT_INSTALLED 0x20 /* For expansion pack batteries */ -#define SIMPAD_BATT_STATUS_FULL 0x40 /* Battery fully charged (and connected to AC) */ -#define SIMPAD_BATT_STATUS_NOBATT 0x80 -#define SIMPAD_BATT_STATUS_UNKNOWN 0xff - -extern int simpad_get_battery(struct simpad_battery* ); - -#endif // __ASM_ARCH_SIMPAD_H - - - - - - - - diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h deleted file mode 100644 index 63375a0..0000000 --- a/include/asm-arm/arch-sa1100/system.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/system.h - * - * Copyright (c) 1999 Nicolas Pitre - */ -#include - -static inline void arch_idle(void) -{ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - if (mode == 's') { - /* Jump into ROM at address 0 */ - cpu_reset(0); - } else { - /* Use on-chip reset capability */ - RSRR = RSRR_SWR; - } -} diff --git a/include/asm-arm/arch-sa1100/timex.h b/include/asm-arm/arch-sa1100/timex.h deleted file mode 100644 index 837be9b..0000000 --- a/include/asm-arm/arch-sa1100/timex.h +++ /dev/null @@ -1,12 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/timex.h - * - * SA1100 architecture timex specifications - * - * Copyright (C) 1998 - */ - -/* - * SA1100 timer - */ -#define CLOCK_TICK_RATE 3686400 diff --git a/include/asm-arm/arch-sa1100/uncompress.h b/include/asm-arm/arch-sa1100/uncompress.h deleted file mode 100644 index 17e64d2..0000000 --- a/include/asm-arm/arch-sa1100/uncompress.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/uncompress.h - * - * (C) 1999 Nicolas Pitre - * - * Reorganised to be machine independent. - */ - -#include "hardware.h" - -/* - * The following code assumes the serial port has already been - * initialized by the bootloader. We search for the first enabled - * port in the most probable order. If you didn't setup a port in - * your bootloader then nothing will appear (which might be desired). - */ - -#define UART(x) (*(volatile unsigned long *)(serial_port + (x))) - -static void putc(int c) -{ - unsigned long serial_port; - - do { - serial_port = _Ser3UTCR0; - if (UART(UTCR3) & UTCR3_TXE) break; - serial_port = _Ser1UTCR0; - if (UART(UTCR3) & UTCR3_TXE) break; - serial_port = _Ser2UTCR0; - if (UART(UTCR3) & UTCR3_TXE) break; - return; - } while (0); - - /* wait for space in the UART's transmitter */ - while (!(UART(UTSR1) & UTSR1_TNF)) - barrier(); - - /* send the character out. */ - UART(UTDR) = c; -} - -static inline void flush(void) -{ -} - -/* - * Nothing to do for these - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-sa1100/vmalloc.h b/include/asm-arm/arch-sa1100/vmalloc.h deleted file mode 100644 index 2fb1c6f..0000000 --- a/include/asm-arm/arch-sa1100/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * linux/include/asm-arm/arch-sa1100/vmalloc.h - */ -#define VMALLOC_END (0xe8000000) diff --git a/include/asm-arm/arch-shark/debug-macro.S b/include/asm-arm/arch-shark/debug-macro.S deleted file mode 100644 index 7cb37f7..0000000 --- a/include/asm-arm/arch-shark/debug-macro.S +++ /dev/null @@ -1,31 +0,0 @@ -/* linux/include/asm-arm/arch-shark/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mov \rx, #0xe0000000 - orr \rx, \rx, #0x000003f8 - .endm - - .macro senduart,rd,rx - strb \rd, [\rx] - .endm - - .macro busyuart,rd,rx - mov \rd, #0 -1001: add \rd, \rd, #1 - teq \rd, #0x10000 - bne 1001b - .endm - - .macro waituart,rd,rx - .endm diff --git a/include/asm-arm/arch-shark/dma.h b/include/asm-arm/arch-shark/dma.h deleted file mode 100644 index fc985d5..0000000 --- a/include/asm-arm/arch-shark/dma.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/dma.h - * - * by Alexander Schulz - */ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -/* Use only the lowest 4MB, nothing else works. - * The rest is not DMAable. See dev / .properties - * in OpenFirmware. - */ -#define MAX_DMA_ADDRESS 0xC0400000 -#define MAX_DMA_CHANNELS 8 -#define DMA_ISA_CASCADE 4 - -#endif /* _ASM_ARCH_DMA_H */ - diff --git a/include/asm-arm/arch-shark/entry-macro.S b/include/asm-arm/arch-shark/entry-macro.S deleted file mode 100644 index 82463f3..0000000 --- a/include/asm-arm/arch-shark/entry-macro.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * include/asm-arm/arch-shark/entry-macro.S - * - * Low-level IRQ helper macros for Shark platform - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov r4, #0xe0000000 - - mov \irqstat, #0x0C - strb \irqstat, [r4, #0x20] @outb(0x0C, 0x20) /* Poll command */ - ldrb \irqnr, [r4, #0x20] @irq = inb(0x20) & 7 - and \irqstat, \irqnr, #0x80 - teq \irqstat, #0 - beq 43f - and \irqnr, \irqnr, #7 - teq \irqnr, #2 - bne 44f -43: mov \irqstat, #0x0C - strb \irqstat, [r4, #0xa0] @outb(0x0C, 0xA0) /* Poll command */ - ldrb \irqnr, [r4, #0xa0] @irq = (inb(0xA0) & 7) + 8 - and \irqstat, \irqnr, #0x80 - teq \irqstat, #0 - beq 44f - and \irqnr, \irqnr, #7 - add \irqnr, \irqnr, #8 -44: teq \irqstat, #0 - .endm - diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h deleted file mode 100644 index ecba452..0000000 --- a/include/asm-arm/arch-shark/hardware.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/hardware.h - * - * by Alexander Schulz - * - * derived from: - * linux/include/asm-arm/arch-ebsa110/hardware.h - * Copyright (C) 1996-1999 Russell King. - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ - -/* - * Mapping areas - */ -#define IO_BASE 0xe0000000 - -#else - -#define IO_BASE 0 - -#endif - -#define IO_SIZE 0x08000000 -#define IO_START 0x40000000 -#define ROMCARD_SIZE 0x08000000 -#define ROMCARD_START 0x10000000 - -#define PCIO_BASE 0xe0000000 - - -/* defines for the Framebuffer */ -#define FB_START 0x06000000 -#define FB_SIZE 0x01000000 - -#define UNCACHEABLE_ADDR 0xdf010000 - -#define SEQUOIA_LED_GREEN (1<<6) -#define SEQUOIA_LED_AMBER (1<<5) -#define SEQUOIA_LED_BACK (1<<7) - -#define pcibios_assign_all_busses() 1 - -#define PCIBIOS_MIN_IO 0x6000 -#define PCIBIOS_MIN_MEM 0x50000000 -#define PCIMEM_BASE 0xe8000000 - -#endif - diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h deleted file mode 100644 index b11d786..0000000 --- a/include/asm-arm/arch-shark/io.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/io.h - * - * by Alexander Schulz - * - * derived from: - * linux/include/asm-arm/arch-ebsa110/io.h - * Copyright (C) 1997,1998 Russell King - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ - * and are translated to the start of IO. - */ -#define __PORT_PCIO(x) (!((x) & 0x80000000)) - -#define __io(a) ((void __iomem *)(PCIO_BASE + (a))) - - -static inline unsigned int __ioaddr (unsigned int port) \ -{ \ - if (__PORT_PCIO(port)) \ - return (unsigned int)(PCIO_BASE + (port)); \ - else \ - return (unsigned int)(IO_BASE + (port)); \ -} - -#define __mem_pci(addr) (addr) - -/* - * Translated address IO functions - * - * IO address has already been translated to a virtual address - */ -#define outb_t(v,p) \ - (*(volatile unsigned char *)(p) = (v)) - -#define inb_t(p) \ - (*(volatile unsigned char *)(p)) - -#define outl_t(v,p) \ - (*(volatile unsigned long *)(p) = (v)) - -#define inl_t(p) \ - (*(volatile unsigned long *)(p)) - -#endif diff --git a/include/asm-arm/arch-shark/irqs.h b/include/asm-arm/arch-shark/irqs.h deleted file mode 100644 index b36cc97..0000000 --- a/include/asm-arm/arch-shark/irqs.h +++ /dev/null @@ -1,13 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/irqs.h - * - * by Alexander Schulz - */ - -#define NR_IRQS 16 - -#define IRQ_ISA_KEYBOARD 1 -#define RTC_IRQ 8 -#define I8042_KBD_IRQ 1 -#define I8042_AUX_IRQ 12 -#define IRQ_HARDDISK 14 diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h deleted file mode 100644 index 6968d61..0000000 --- a/include/asm-arm/arch-shark/memory.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/memory.h - * - * by Alexander Schulz - * - * derived from: - * linux/include/asm-arm/arch-ebsa110/memory.h - * Copyright (c) 1996-1999 Russell King. - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x08000000) - -#ifndef __ASSEMBLY__ - -static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size) -{ - if (node != 0) return; - /* Only the first 4 MB (=1024 Pages) are usable for DMA */ - zone_size[1] = zone_size[0] - 1024; - zone_size[0] = 1024; - zhole_size[1] = zhole_size[0]; - zhole_size[0] = 0; -} - -#define arch_adjust_zones(node, size, holes) \ - __arch_adjust_zones(node, size, holes) - -#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_4M - 1) - -#endif - -#define __virt_to_bus(x) __virt_to_phys(x) -#define __bus_to_virt(x) __phys_to_virt(x) - -/* - * Cache flushing area - */ -#define FLUSH_BASE_PHYS 0x80000000 -#define FLUSH_BASE 0xdf000000 - -#endif diff --git a/include/asm-arm/arch-shark/system.h b/include/asm-arm/arch-shark/system.h deleted file mode 100644 index f12d771..0000000 --- a/include/asm-arm/arch-shark/system.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/system.h - * - * by Alexander Schulz - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include - -static void arch_reset(char mode) -{ - short temp; - local_irq_disable(); - /* Reset the Machine via pc[3] of the sequoia chipset */ - outw(0x09,0x24); - temp=inw(0x26); - temp = temp | (1<<3) | (1<<10); - outw(0x09,0x24); - outw(temp,0x26); - -} - -static inline void arch_idle(void) -{ -} - -#endif diff --git a/include/asm-arm/arch-shark/timex.h b/include/asm-arm/arch-shark/timex.h deleted file mode 100644 index 0d02d25..0000000 --- a/include/asm-arm/arch-shark/timex.h +++ /dev/null @@ -1,7 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/timex.h - * - * by Alexander Schulz - */ - -#define CLOCK_TICK_RATE 1193180 diff --git a/include/asm-arm/arch-shark/uncompress.h b/include/asm-arm/arch-shark/uncompress.h deleted file mode 100644 index 7eca653..0000000 --- a/include/asm-arm/arch-shark/uncompress.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/uncompress.h - * by Alexander Schulz - * - * derived from: - * linux/include/asm-arm/arch-ebsa285/uncompress.h - * Copyright (C) 1996,1997,1998 Russell King - */ - -#define SERIAL_BASE ((volatile unsigned char *)0x400003f8) - -static inline void putc(int c) -{ - int t; - - SERIAL_BASE[0] = c; - t=0x10000; - while (t--); -} - -static inline void flush(void) -{ -} - -#ifdef DEBUG -static void putn(unsigned long z) -{ - int i; - char x; - - putc('0'); - putc('x'); - for (i=0;i<8;i++) { - x='0'+((z>>((7-i)*4))&0xf); - if (x>'9') x=x-'0'+'A'-10; - putc(x); - } -} - -static void putr() -{ - putc('\n'); - putc('\r'); -} -#endif - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-shark/vmalloc.h b/include/asm-arm/arch-shark/vmalloc.h deleted file mode 100644 index fac37c63..0000000 --- a/include/asm-arm/arch-shark/vmalloc.h +++ /dev/null @@ -1,4 +0,0 @@ -/* - * linux/include/asm-arm/arch-shark/vmalloc.h - */ -#define VMALLOC_END (PAGE_OFFSET + 0x10000000) diff --git a/include/asm-arm/arch-versatile/debug-macro.S b/include/asm-arm/arch-versatile/debug-macro.S deleted file mode 100644 index fe106d1..0000000 --- a/include/asm-arm/arch-versatile/debug-macro.S +++ /dev/null @@ -1,23 +0,0 @@ -/* linux/include/asm-arm/arch-versatile/debug-macro.S - * - * Debugging macro include header - * - * Copyright (C) 1994-1999 Russell King - * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - - .macro addruart,rx - mrc p15, 0, \rx, c1, c0 - tst \rx, #1 @ MMU enabled? - moveq \rx, #0x10000000 - movne \rx, #0xf1000000 @ virtual base - orr \rx, \rx, #0x001F0000 - orr \rx, \rx, #0x00001000 - .endm - -#include diff --git a/include/asm-arm/arch-versatile/dma.h b/include/asm-arm/arch-versatile/dma.h deleted file mode 100644 index 6425773..0000000 --- a/include/asm-arm/arch-versatile/dma.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/dma.h - * - * Copyright (C) 2003 ARM Limited. - * Copyright (C) 1997,1998 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S deleted file mode 100644 index cd11416..0000000 --- a/include/asm-arm/arch-versatile/entry-macro.S +++ /dev/null @@ -1,44 +0,0 @@ -/* - * include/asm-arm/arch-versatile/entry-macro.S - * - * Low-level IRQ helper macros for Versatile platforms - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ -#include -#include - - .macro disable_fiq - .endm - - .macro get_irqnr_preamble, base, tmp - ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) - .endm - - .macro arch_ret_to_user, tmp1, tmp2 - .endm - - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status - mov \irqnr, #0 - teq \irqstat, #0 - beq 1003f - -1001: tst \irqstat, #15 - bne 1002f - add \irqnr, \irqnr, #4 - movs \irqstat, \irqstat, lsr #4 - bne 1001b -1002: tst \irqstat, #1 - bne 1003f - add \irqnr, \irqnr, #1 - movs \irqstat, \irqstat, lsr #1 - bne 1002b -1003: /* EQ will be set if no irqs pending */ - -@ clz \irqnr, \irqstat -@1003: /* EQ will be set if we reach MAXIRQNUM */ - .endm - diff --git a/include/asm-arm/arch-versatile/hardware.h b/include/asm-arm/arch-versatile/hardware.h deleted file mode 100644 index edc0659..0000000 --- a/include/asm-arm/arch-versatile/hardware.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/hardware.h - * - * This file contains the hardware definitions of the Versatile boards. - * - * Copyright (C) 2003 ARM Limited. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -/* - * PCI space virtual addresses - */ -#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul -#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul - -#if 0 -#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000 -#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000 -#define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000 - -#define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0 -#define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1 -#endif - -/* CIK guesswork */ -#define PCIBIOS_MIN_IO 0x44000000 -#define PCIBIOS_MIN_MEM 0x50000000 - -#define pcibios_assign_all_busses() 1 - -/* macro to get at IO space when running virtually */ -#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) - -#endif diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h deleted file mode 100644 index c4d0194..0000000 --- a/include/asm-arm/arch-versatile/io.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#define __io(a) __io(a) -#define __mem_pci(a) (a) - -#endif diff --git a/include/asm-arm/arch-versatile/irqs.h b/include/asm-arm/arch-versatile/irqs.h deleted file mode 100644 index f7263b9..0000000 --- a/include/asm-arm/arch-versatile/irqs.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/irqs.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include - -/* - * IRQ interrupts definitions are the same as the INT definitions - * held within platform.h - */ -#define IRQ_VIC_START 0 -#define IRQ_WDOGINT (IRQ_VIC_START + INT_WDOGINT) -#define IRQ_SOFTINT (IRQ_VIC_START + INT_SOFTINT) -#define IRQ_COMMRx (IRQ_VIC_START + INT_COMMRx) -#define IRQ_COMMTx (IRQ_VIC_START + INT_COMMTx) -#define IRQ_TIMERINT0_1 (IRQ_VIC_START + INT_TIMERINT0_1) -#define IRQ_TIMERINT2_3 (IRQ_VIC_START + INT_TIMERINT2_3) -#define IRQ_GPIOINT0 (IRQ_VIC_START + INT_GPIOINT0) -#define IRQ_GPIOINT1 (IRQ_VIC_START + INT_GPIOINT1) -#define IRQ_GPIOINT2 (IRQ_VIC_START + INT_GPIOINT2) -#define IRQ_GPIOINT3 (IRQ_VIC_START + INT_GPIOINT3) -#define IRQ_RTCINT (IRQ_VIC_START + INT_RTCINT) -#define IRQ_SSPINT (IRQ_VIC_START + INT_SSPINT) -#define IRQ_UARTINT0 (IRQ_VIC_START + INT_UARTINT0) -#define IRQ_UARTINT1 (IRQ_VIC_START + INT_UARTINT1) -#define IRQ_UARTINT2 (IRQ_VIC_START + INT_UARTINT2) -#define IRQ_SCIINT (IRQ_VIC_START + INT_SCIINT) -#define IRQ_CLCDINT (IRQ_VIC_START + INT_CLCDINT) -#define IRQ_DMAINT (IRQ_VIC_START + INT_DMAINT) -#define IRQ_PWRFAILINT (IRQ_VIC_START + INT_PWRFAILINT) -#define IRQ_MBXINT (IRQ_VIC_START + INT_MBXINT) -#define IRQ_GNDINT (IRQ_VIC_START + INT_GNDINT) -#define IRQ_VICSOURCE21 (IRQ_VIC_START + INT_VICSOURCE21) -#define IRQ_VICSOURCE22 (IRQ_VIC_START + INT_VICSOURCE22) -#define IRQ_VICSOURCE23 (IRQ_VIC_START + INT_VICSOURCE23) -#define IRQ_VICSOURCE24 (IRQ_VIC_START + INT_VICSOURCE24) -#define IRQ_VICSOURCE25 (IRQ_VIC_START + INT_VICSOURCE25) -#define IRQ_VICSOURCE26 (IRQ_VIC_START + INT_VICSOURCE26) -#define IRQ_VICSOURCE27 (IRQ_VIC_START + INT_VICSOURCE27) -#define IRQ_VICSOURCE28 (IRQ_VIC_START + INT_VICSOURCE28) -#define IRQ_VICSOURCE29 (IRQ_VIC_START + INT_VICSOURCE29) -#define IRQ_VICSOURCE30 (IRQ_VIC_START + INT_VICSOURCE30) -#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31) -#define IRQ_VIC_END (IRQ_VIC_START + 31) - -#define IRQMASK_WDOGINT INTMASK_WDOGINT -#define IRQMASK_SOFTINT INTMASK_SOFTINT -#define IRQMASK_COMMRx INTMASK_COMMRx -#define IRQMASK_COMMTx INTMASK_COMMTx -#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 -#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 -#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0 -#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1 -#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2 -#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3 -#define IRQMASK_RTCINT INTMASK_RTCINT -#define IRQMASK_SSPINT INTMASK_SSPINT -#define IRQMASK_UARTINT0 INTMASK_UARTINT0 -#define IRQMASK_UARTINT1 INTMASK_UARTINT1 -#define IRQMASK_UARTINT2 INTMASK_UARTINT2 -#define IRQMASK_SCIINT INTMASK_SCIINT -#define IRQMASK_CLCDINT INTMASK_CLCDINT -#define IRQMASK_DMAINT INTMASK_DMAINT -#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT -#define IRQMASK_MBXINT INTMASK_MBXINT -#define IRQMASK_GNDINT INTMASK_GNDINT -#define IRQMASK_VICSOURCE21 INTMASK_VICSOURCE21 -#define IRQMASK_VICSOURCE22 INTMASK_VICSOURCE22 -#define IRQMASK_VICSOURCE23 INTMASK_VICSOURCE23 -#define IRQMASK_VICSOURCE24 INTMASK_VICSOURCE24 -#define IRQMASK_VICSOURCE25 INTMASK_VICSOURCE25 -#define IRQMASK_VICSOURCE26 INTMASK_VICSOURCE26 -#define IRQMASK_VICSOURCE27 INTMASK_VICSOURCE27 -#define IRQMASK_VICSOURCE28 INTMASK_VICSOURCE28 -#define IRQMASK_VICSOURCE29 INTMASK_VICSOURCE29 -#define IRQMASK_VICSOURCE30 INTMASK_VICSOURCE30 -#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31 - -/* - * FIQ interrupts definitions are the same as the INT definitions. - */ -#define FIQ_WDOGINT INT_WDOGINT -#define FIQ_SOFTINT INT_SOFTINT -#define FIQ_COMMRx INT_COMMRx -#define FIQ_COMMTx INT_COMMTx -#define FIQ_TIMERINT0_1 INT_TIMERINT0_1 -#define FIQ_TIMERINT2_3 INT_TIMERINT2_3 -#define FIQ_GPIOINT0 INT_GPIOINT0 -#define FIQ_GPIOINT1 INT_GPIOINT1 -#define FIQ_GPIOINT2 INT_GPIOINT2 -#define FIQ_GPIOINT3 INT_GPIOINT3 -#define FIQ_RTCINT INT_RTCINT -#define FIQ_SSPINT INT_SSPINT -#define FIQ_UARTINT0 INT_UARTINT0 -#define FIQ_UARTINT1 INT_UARTINT1 -#define FIQ_UARTINT2 INT_UARTINT2 -#define FIQ_SCIINT INT_SCIINT -#define FIQ_CLCDINT INT_CLCDINT -#define FIQ_DMAINT INT_DMAINT -#define FIQ_PWRFAILINT INT_PWRFAILINT -#define FIQ_MBXINT INT_MBXINT -#define FIQ_GNDINT INT_GNDINT -#define FIQ_VICSOURCE21 INT_VICSOURCE21 -#define FIQ_VICSOURCE22 INT_VICSOURCE22 -#define FIQ_VICSOURCE23 INT_VICSOURCE23 -#define FIQ_VICSOURCE24 INT_VICSOURCE24 -#define FIQ_VICSOURCE25 INT_VICSOURCE25 -#define FIQ_VICSOURCE26 INT_VICSOURCE26 -#define FIQ_VICSOURCE27 INT_VICSOURCE27 -#define FIQ_VICSOURCE28 INT_VICSOURCE28 -#define FIQ_VICSOURCE29 INT_VICSOURCE29 -#define FIQ_VICSOURCE30 INT_VICSOURCE30 -#define FIQ_VICSOURCE31 INT_VICSOURCE31 - - -#define FIQMASK_WDOGINT INTMASK_WDOGINT -#define FIQMASK_SOFTINT INTMASK_SOFTINT -#define FIQMASK_COMMRx INTMASK_COMMRx -#define FIQMASK_COMMTx INTMASK_COMMTx -#define FIQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1 -#define FIQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3 -#define FIQMASK_GPIOINT0 INTMASK_GPIOINT0 -#define FIQMASK_GPIOINT1 INTMASK_GPIOINT1 -#define FIQMASK_GPIOINT2 INTMASK_GPIOINT2 -#define FIQMASK_GPIOINT3 INTMASK_GPIOINT3 -#define FIQMASK_RTCINT INTMASK_RTCINT -#define FIQMASK_SSPINT INTMASK_SSPINT -#define FIQMASK_UARTINT0 INTMASK_UARTINT0 -#define FIQMASK_UARTINT1 INTMASK_UARTINT1 -#define FIQMASK_UARTINT2 INTMASK_UARTINT2 -#define FIQMASK_SCIINT INTMASK_SCIINT -#define FIQMASK_CLCDINT INTMASK_CLCDINT -#define FIQMASK_DMAINT INTMASK_DMAINT -#define FIQMASK_PWRFAILINT INTMASK_PWRFAILINT -#define FIQMASK_MBXINT INTMASK_MBXINT -#define FIQMASK_GNDINT INTMASK_GNDINT -#define FIQMASK_VICSOURCE21 INTMASK_VICSOURCE21 -#define FIQMASK_VICSOURCE22 INTMASK_VICSOURCE22 -#define FIQMASK_VICSOURCE23 INTMASK_VICSOURCE23 -#define FIQMASK_VICSOURCE24 INTMASK_VICSOURCE24 -#define FIQMASK_VICSOURCE25 INTMASK_VICSOURCE25 -#define FIQMASK_VICSOURCE26 INTMASK_VICSOURCE26 -#define FIQMASK_VICSOURCE27 INTMASK_VICSOURCE27 -#define FIQMASK_VICSOURCE28 INTMASK_VICSOURCE28 -#define FIQMASK_VICSOURCE29 INTMASK_VICSOURCE29 -#define FIQMASK_VICSOURCE30 INTMASK_VICSOURCE30 -#define FIQMASK_VICSOURCE31 INTMASK_VICSOURCE31 - -/* - * Secondary interrupt controller - */ -#define IRQ_SIC_START 32 -#define IRQ_SIC_MMCI0B (IRQ_SIC_START + SIC_INT_MMCI0B) -#define IRQ_SIC_MMCI1B (IRQ_SIC_START + SIC_INT_MMCI1B) -#define IRQ_SIC_KMI0 (IRQ_SIC_START + SIC_INT_KMI0) -#define IRQ_SIC_KMI1 (IRQ_SIC_START + SIC_INT_KMI1) -#define IRQ_SIC_SCI3 (IRQ_SIC_START + SIC_INT_SCI3) -#define IRQ_SIC_UART3 (IRQ_SIC_START + SIC_INT_UART3) -#define IRQ_SIC_CLCD (IRQ_SIC_START + SIC_INT_CLCD) -#define IRQ_SIC_TOUCH (IRQ_SIC_START + SIC_INT_TOUCH) -#define IRQ_SIC_KEYPAD (IRQ_SIC_START + SIC_INT_KEYPAD) -#define IRQ_SIC_DoC (IRQ_SIC_START + SIC_INT_DoC) -#define IRQ_SIC_MMCI0A (IRQ_SIC_START + SIC_INT_MMCI0A) -#define IRQ_SIC_MMCI1A (IRQ_SIC_START + SIC_INT_MMCI1A) -#define IRQ_SIC_AACI (IRQ_SIC_START + SIC_INT_AACI) -#define IRQ_SIC_ETH (IRQ_SIC_START + SIC_INT_ETH) -#define IRQ_SIC_USB (IRQ_SIC_START + SIC_INT_USB) -#define IRQ_SIC_PCI0 (IRQ_SIC_START + SIC_INT_PCI0) -#define IRQ_SIC_PCI1 (IRQ_SIC_START + SIC_INT_PCI1) -#define IRQ_SIC_PCI2 (IRQ_SIC_START + SIC_INT_PCI2) -#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) -#define IRQ_SIC_END 63 - -#define SIC_IRQMASK_MMCI0B SIC_INTMASK_MMCI0B -#define SIC_IRQMASK_MMCI1B SIC_INTMASK_MMCI1B -#define SIC_IRQMASK_KMI0 SIC_INTMASK_KMI0 -#define SIC_IRQMASK_KMI1 SIC_INTMASK_KMI1 -#define SIC_IRQMASK_SCI3 SIC_INTMASK_SCI3 -#define SIC_IRQMASK_UART3 SIC_INTMASK_UART3 -#define SIC_IRQMASK_CLCD SIC_INTMASK_CLCD -#define SIC_IRQMASK_TOUCH SIC_INTMASK_TOUCH -#define SIC_IRQMASK_KEYPAD SIC_INTMASK_KEYPAD -#define SIC_IRQMASK_DoC SIC_INTMASK_DoC -#define SIC_IRQMASK_MMCI0A SIC_INTMASK_MMCI0A -#define SIC_IRQMASK_MMCI1A SIC_INTMASK_MMCI1A -#define SIC_IRQMASK_AACI SIC_INTMASK_AACI -#define SIC_IRQMASK_ETH SIC_INTMASK_ETH -#define SIC_IRQMASK_USB SIC_INTMASK_USB -#define SIC_IRQMASK_PCI0 SIC_INTMASK_PCI0 -#define SIC_IRQMASK_PCI1 SIC_INTMASK_PCI1 -#define SIC_IRQMASK_PCI2 SIC_INTMASK_PCI2 -#define SIC_IRQMASK_PCI3 SIC_INTMASK_PCI3 - -#define NR_IRQS 64 diff --git a/include/asm-arm/arch-versatile/memory.h b/include/asm-arm/arch-versatile/memory.h deleted file mode 100644 index a937097..0000000 --- a/include/asm-arm/arch-versatile/memory.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/memory.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -/* - * Physical DRAM offset. - */ -#define PHYS_OFFSET UL(0x00000000) - -/* - * Virtual view <-> DMA view memory address translations - * virt_to_bus: Used to translate the virtual address to an - * address suitable to be passed to set_dma_addr - * bus_to_virt: Used to convert an address for DMA operations - * to an address that the kernel can use. - */ -#define __virt_to_bus(x) ((x) - PAGE_OFFSET) -#define __bus_to_virt(x) ((x) + PAGE_OFFSET) - -#endif diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h deleted file mode 100644 index 2af9d7c..0000000 --- a/include/asm-arm/arch-versatile/platform.h +++ /dev/null @@ -1,510 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/platform.h - * - * Copyright (c) ARM Limited 2003. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __address_h -#define __address_h 1 - -/* - * Memory definitions - */ -#define VERSATILE_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/ -#define VERSATILE_BOOT_ROM_HI 0x30000000 -#define VERSATILE_BOOT_ROM_BASE VERSATILE_BOOT_ROM_HI /* Normal position */ -#define VERSATILE_BOOT_ROM_SIZE SZ_64M - -#define VERSATILE_SSRAM_BASE /* VERSATILE_SSMC_BASE ? */ -#define VERSATILE_SSRAM_SIZE SZ_2M - -#define VERSATILE_FLASH_BASE 0x34000000 -#define VERSATILE_FLASH_SIZE SZ_64M - -/* - * SDRAM - */ -#define VERSATILE_SDRAM_BASE 0x00000000 - -/* - * Logic expansion modules - * - */ - - -/* ------------------------------------------------------------------------ - * Versatile Registers - * ------------------------------------------------------------------------ - * - */ -#define VERSATILE_SYS_ID_OFFSET 0x00 -#define VERSATILE_SYS_SW_OFFSET 0x04 -#define VERSATILE_SYS_LED_OFFSET 0x08 -#define VERSATILE_SYS_OSC0_OFFSET 0x0C - -#if defined(CONFIG_ARCH_VERSATILE_PB) -#define VERSATILE_SYS_OSC1_OFFSET 0x10 -#define VERSATILE_SYS_OSC2_OFFSET 0x14 -#define VERSATILE_SYS_OSC3_OFFSET 0x18 -#define VERSATILE_SYS_OSC4_OFFSET 0x1C -#elif defined(CONFIG_MACH_VERSATILE_AB) -#define VERSATILE_SYS_OSC1_OFFSET 0x1C -#endif - -#define VERSATILE_SYS_OSCCLCD_OFFSET 0x1c - -#define VERSATILE_SYS_LOCK_OFFSET 0x20 -#define VERSATILE_SYS_100HZ_OFFSET 0x24 -#define VERSATILE_SYS_CFGDATA1_OFFSET 0x28 -#define VERSATILE_SYS_CFGDATA2_OFFSET 0x2C -#define VERSATILE_SYS_FLAGS_OFFSET 0x30 -#define VERSATILE_SYS_FLAGSSET_OFFSET 0x30 -#define VERSATILE_SYS_FLAGSCLR_OFFSET 0x34 -#define VERSATILE_SYS_NVFLAGS_OFFSET 0x38 -#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38 -#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C -#define VERSATILE_SYS_RESETCTL_OFFSET 0x40 -#define VERSATILE_SYS_PCICTL_OFFSET 0x44 -#define VERSATILE_SYS_MCI_OFFSET 0x48 -#define VERSATILE_SYS_FLASH_OFFSET 0x4C -#define VERSATILE_SYS_CLCD_OFFSET 0x50 -#define VERSATILE_SYS_CLCDSER_OFFSET 0x54 -#define VERSATILE_SYS_BOOTCS_OFFSET 0x58 -#define VERSATILE_SYS_24MHz_OFFSET 0x5C -#define VERSATILE_SYS_MISC_OFFSET 0x60 -#define VERSATILE_SYS_TEST_OSC0_OFFSET 0x80 -#define VERSATILE_SYS_TEST_OSC1_OFFSET 0x84 -#define VERSATILE_SYS_TEST_OSC2_OFFSET 0x88 -#define VERSATILE_SYS_TEST_OSC3_OFFSET 0x8C -#define VERSATILE_SYS_TEST_OSC4_OFFSET 0x90 - -#define VERSATILE_SYS_BASE 0x10000000 -#define VERSATILE_SYS_ID (VERSATILE_SYS_BASE + VERSATILE_SYS_ID_OFFSET) -#define VERSATILE_SYS_SW (VERSATILE_SYS_BASE + VERSATILE_SYS_SW_OFFSET) -#define VERSATILE_SYS_LED (VERSATILE_SYS_BASE + VERSATILE_SYS_LED_OFFSET) -#define VERSATILE_SYS_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC0_OFFSET) -#define VERSATILE_SYS_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC1_OFFSET) - -#if defined(CONFIG_ARCH_VERSATILE_PB) -#define VERSATILE_SYS_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC2_OFFSET) -#define VERSATILE_SYS_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC3_OFFSET) -#define VERSATILE_SYS_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_OSC4_OFFSET) -#endif - -#define VERSATILE_SYS_LOCK (VERSATILE_SYS_BASE + VERSATILE_SYS_LOCK_OFFSET) -#define VERSATILE_SYS_100HZ (VERSATILE_SYS_BASE + VERSATILE_SYS_100HZ_OFFSET) -#define VERSATILE_SYS_CFGDATA1 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA1_OFFSET) -#define VERSATILE_SYS_CFGDATA2 (VERSATILE_SYS_BASE + VERSATILE_SYS_CFGDATA2_OFFSET) -#define VERSATILE_SYS_FLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGS_OFFSET) -#define VERSATILE_SYS_FLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSSET_OFFSET) -#define VERSATILE_SYS_FLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_FLAGSCLR_OFFSET) -#define VERSATILE_SYS_NVFLAGS (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGS_OFFSET) -#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET) -#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET) -#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET) -#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET) -#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET) -#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) -#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET) -#define VERSATILE_SYS_CLCDSER (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCDSER_OFFSET) -#define VERSATILE_SYS_BOOTCS (VERSATILE_SYS_BASE + VERSATILE_SYS_BOOTCS_OFFSET) -#define VERSATILE_SYS_24MHz (VERSATILE_SYS_BASE + VERSATILE_SYS_24MHz_OFFSET) -#define VERSATILE_SYS_MISC (VERSATILE_SYS_BASE + VERSATILE_SYS_MISC_OFFSET) -#define VERSATILE_SYS_TEST_OSC0 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC0_OFFSET) -#define VERSATILE_SYS_TEST_OSC1 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC1_OFFSET) -#define VERSATILE_SYS_TEST_OSC2 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC2_OFFSET) -#define VERSATILE_SYS_TEST_OSC3 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC3_OFFSET) -#define VERSATILE_SYS_TEST_OSC4 (VERSATILE_SYS_BASE + VERSATILE_SYS_TEST_OSC4_OFFSET) - -/* - * Values for VERSATILE_SYS_RESET_CTRL - */ -#define VERSATILE_SYS_CTRL_RESET_CONFIGCLR 0x01 -#define VERSATILE_SYS_CTRL_RESET_CONFIGINIT 0x02 -#define VERSATILE_SYS_CTRL_RESET_DLLRESET 0x03 -#define VERSATILE_SYS_CTRL_RESET_PLLRESET 0x04 -#define VERSATILE_SYS_CTRL_RESET_POR 0x05 -#define VERSATILE_SYS_CTRL_RESET_DoC 0x06 - -#define VERSATILE_SYS_CTRL_LED (1 << 0) - - -/* ------------------------------------------------------------------------ - * Versatile control registers - * ------------------------------------------------------------------------ - */ - -/* - * VERSATILE_IDFIELD - * - * 31:24 = manufacturer (0x41 = ARM) - * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus) - * 15:12 = FPGA (0x3 = XVC600 or XVC600E) - * 11:4 = build value - * 3:0 = revision number (0x1 = rev B (AHB)) - */ - -/* - * VERSATILE_SYS_LOCK - * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL, - * SYS_CLD, SYS_BOOTCS - */ -#define VERSATILE_SYS_LOCK_LOCKED (1 << 16) -#define VERSATILE_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */ - -/* - * VERSATILE_SYS_FLASH - */ -#define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */ - -/* - * VERSATILE_INTREG - * - used to acknowledge and control MMCI and UART interrupts - */ -#define VERSATILE_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */ -#define VERSATILE_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */ -#define VERSATILE_INTREG_CARDIN 0x08 /* MMCI card in detect */ - /* write 1 to acknowledge and clear */ -#define VERSATILE_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */ -#define VERSATILE_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */ - -/* - * VERSATILE peripheral addresses - */ -#define VERSATILE_PCI_CORE_BASE 0x10001000 /* PCI core control */ -#define VERSATILE_I2C_BASE 0x10002000 /* I2C control */ -#define VERSATILE_SIC_BASE 0x10003000 /* Secondary interrupt controller */ -#define VERSATILE_AACI_BASE 0x10004000 /* Audio */ -#define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ -#define VERSATILE_KMI0_BASE 0x10006000 /* KMI interface */ -#define VERSATILE_KMI1_BASE 0x10007000 /* KMI 2nd interface */ -#define VERSATILE_CHAR_LCD_BASE 0x10008000 /* Character LCD */ -#define VERSATILE_UART3_BASE 0x10009000 /* UART 3 */ -#define VERSATILE_SCI1_BASE 0x1000A000 -#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */ - /* 0x1000C000 - 0x1000CFFF = reserved */ -#define VERSATILE_ETH_BASE 0x10010000 /* Ethernet */ -#define VERSATILE_USB_BASE 0x10020000 /* USB */ - /* 0x10030000 - 0x100FFFFF = reserved */ -#define VERSATILE_SMC_BASE 0x10100000 /* SMC */ -#define VERSATILE_MPMC_BASE 0x10110000 /* MPMC */ -#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */ -#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */ -#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */ -#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */ - /* 0x10000000 - 0x100FFFFF */ -#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */ -#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ -#define VERSATILE_WATCHDOG_BASE 0x101E1000 /* Watchdog */ -#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */ -#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */ -#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */ -#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */ -#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */ -#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */ -#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */ - /* 0x101E9000 - reserved */ -#define VERSATILE_SCI_BASE 0x101F0000 /* Smart card controller */ -#define VERSATILE_UART0_BASE 0x101F1000 /* Uart 0 */ -#define VERSATILE_UART1_BASE 0x101F2000 /* Uart 1 */ -#define VERSATILE_UART2_BASE 0x101F3000 /* Uart 2 */ -#define VERSATILE_SSP_BASE 0x101F4000 /* Synchronous Serial Port */ - -#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ -#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ -#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ - -/* PCI space */ -#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ -#define VERSATILE_PCI_CFG_BASE 0x42000000 -#define VERSATILE_PCI_MEM_BASE0 0x44000000 -#define VERSATILE_PCI_MEM_BASE1 0x50000000 -#define VERSATILE_PCI_MEM_BASE2 0x60000000 -/* Sizes of above maps */ -#define VERSATILE_PCI_BASE_SIZE 0x01000000 -#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000 -#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ -#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ -#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ - -#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ - -/* - * Disk on Chip - */ -#define VERSATILE_DOC_BASE 0x2C000000 -#define VERSATILE_DOC_SIZE (16 << 20) -#define VERSATILE_DOC_PAGE_SIZE 512 -#define VERSATILE_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) - -#define ERASE_UNIT_PAGES 32 -#define START_PAGE 0x80 - -/* - * LED settings, bits [7:0] - */ -#define VERSATILE_SYS_LED0 (1 << 0) -#define VERSATILE_SYS_LED1 (1 << 1) -#define VERSATILE_SYS_LED2 (1 << 2) -#define VERSATILE_SYS_LED3 (1 << 3) -#define VERSATILE_SYS_LED4 (1 << 4) -#define VERSATILE_SYS_LED5 (1 << 5) -#define VERSATILE_SYS_LED6 (1 << 6) -#define VERSATILE_SYS_LED7 (1 << 7) - -#define ALL_LEDS 0xFF - -#define LED_BANK VERSATILE_SYS_LED - -/* - * Control registers - */ -#define VERSATILE_IDFIELD_OFFSET 0x0 /* Versatile build information */ -#define VERSATILE_FLASHPROG_OFFSET 0x4 /* Flash devices */ -#define VERSATILE_INTREG_OFFSET 0x8 /* Interrupt control */ -#define VERSATILE_DECODE_OFFSET 0xC /* Fitted logic modules */ - - -/* ------------------------------------------------------------------------ - * Versatile Interrupt Controller - control registers - * ------------------------------------------------------------------------ - * - * Offsets from interrupt controller base - * - * System Controller interrupt controller base is - * - * VERSATILE_IC_BASE - * - * Core Module interrupt controller base is - * - * VERSATILE_SYS_IC - * - */ -/* VIC definitions in include/asm-arm/hardware/vic.h */ - -#define SIC_IRQ_STATUS 0 -#define SIC_IRQ_RAW_STATUS 0x04 -#define SIC_IRQ_ENABLE 0x08 -#define SIC_IRQ_ENABLE_SET 0x08 -#define SIC_IRQ_ENABLE_CLEAR 0x0C -#define SIC_INT_SOFT_SET 0x10 -#define SIC_INT_SOFT_CLEAR 0x14 -#define SIC_INT_PIC_ENABLE 0x20 /* read status of pass through mask */ -#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */ -#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */ - -/* ------------------------------------------------------------------------ - * Interrupts - bit assignment (primary) - * ------------------------------------------------------------------------ - */ - -#define INT_WDOGINT 0 /* Watchdog timer */ -#define INT_SOFTINT 1 /* Software interrupt */ -#define INT_COMMRx 2 /* Debug Comm Rx interrupt */ -#define INT_COMMTx 3 /* Debug Comm Tx interrupt */ -#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */ -#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */ -#define INT_GPIOINT0 6 /* GPIO 0 */ -#define INT_GPIOINT1 7 /* GPIO 1 */ -#define INT_GPIOINT2 8 /* GPIO 2 */ -#define INT_GPIOINT3 9 /* GPIO 3 */ -#define INT_RTCINT 10 /* Real Time Clock */ -#define INT_SSPINT 11 /* Synchronous Serial Port */ -#define INT_UARTINT0 12 /* UART 0 on development chip */ -#define INT_UARTINT1 13 /* UART 1 on development chip */ -#define INT_UARTINT2 14 /* UART 2 on development chip */ -#define INT_SCIINT 15 /* Smart Card Interface */ -#define INT_CLCDINT 16 /* CLCD controller */ -#define INT_DMAINT 17 /* DMA controller */ -#define INT_PWRFAILINT 18 /* Power failure */ -#define INT_MBXINT 19 /* Graphics processor */ -#define INT_GNDINT 20 /* Reserved */ - /* External interrupt signals from logic tiles or secondary controller */ -#define INT_VICSOURCE21 21 /* Disk on Chip */ -#define INT_VICSOURCE22 22 /* MCI0A */ -#define INT_VICSOURCE23 23 /* MCI1A */ -#define INT_VICSOURCE24 24 /* AACI */ -#define INT_VICSOURCE25 25 /* Ethernet */ -#define INT_VICSOURCE26 26 /* USB */ -#define INT_VICSOURCE27 27 /* PCI 0 */ -#define INT_VICSOURCE28 28 /* PCI 1 */ -#define INT_VICSOURCE29 29 /* PCI 2 */ -#define INT_VICSOURCE30 30 /* PCI 3 */ -#define INT_VICSOURCE31 31 /* SIC source */ - -/* - * Interrupt bit positions - * - */ -#define INTMASK_WDOGINT (1 << INT_WDOGINT) -#define INTMASK_SOFTINT (1 << INT_SOFTINT) -#define INTMASK_COMMRx (1 << INT_COMMRx) -#define INTMASK_COMMTx (1 << INT_COMMTx) -#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1) -#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3) -#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0) -#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1) -#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2) -#define INTMASK_GPIOINT3 (1 << INT_GPIOINT3) -#define INTMASK_RTCINT (1 << INT_RTCINT) -#define INTMASK_SSPINT (1 << INT_SSPINT) -#define INTMASK_UARTINT0 (1 << INT_UARTINT0) -#define INTMASK_UARTINT1 (1 << INT_UARTINT1) -#define INTMASK_UARTINT2 (1 << INT_UARTINT2) -#define INTMASK_SCIINT (1 << INT_SCIINT) -#define INTMASK_CLCDINT (1 << INT_CLCDINT) -#define INTMASK_DMAINT (1 << INT_DMAINT) -#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT) -#define INTMASK_MBXINT (1 << INT_MBXINT) -#define INTMASK_GNDINT (1 << INT_GNDINT) -#define INTMASK_VICSOURCE21 (1 << INT_VICSOURCE21) -#define INTMASK_VICSOURCE22 (1 << INT_VICSOURCE22) -#define INTMASK_VICSOURCE23 (1 << INT_VICSOURCE23) -#define INTMASK_VICSOURCE24 (1 << INT_VICSOURCE24) -#define INTMASK_VICSOURCE25 (1 << INT_VICSOURCE25) -#define INTMASK_VICSOURCE26 (1 << INT_VICSOURCE26) -#define INTMASK_VICSOURCE27 (1 << INT_VICSOURCE27) -#define INTMASK_VICSOURCE28 (1 << INT_VICSOURCE28) -#define INTMASK_VICSOURCE29 (1 << INT_VICSOURCE29) -#define INTMASK_VICSOURCE30 (1 << INT_VICSOURCE30) -#define INTMASK_VICSOURCE31 (1 << INT_VICSOURCE31) - - -#define VERSATILE_SC_VALID_INT 0x003FFFFF - -#define MAXIRQNUM 31 -#define MAXFIQNUM 31 -#define MAXSWINUM 31 - -/* ------------------------------------------------------------------------ - * Interrupts - bit assignment (secondary) - * ------------------------------------------------------------------------ - */ -#define SIC_INT_MMCI0B 1 /* Multimedia Card 0B */ -#define SIC_INT_MMCI1B 2 /* Multimedia Card 1B */ -#define SIC_INT_KMI0 3 /* Keyboard/Mouse port 0 */ -#define SIC_INT_KMI1 4 /* Keyboard/Mouse port 1 */ -#define SIC_INT_SCI3 5 /* Smart Card interface */ -#define SIC_INT_UART3 6 /* UART 3 empty or data available */ -#define SIC_INT_CLCD 7 /* Character LCD */ -#define SIC_INT_TOUCH 8 /* Touchscreen */ -#define SIC_INT_KEYPAD 9 /* Key pressed on display keypad */ - /* 10:20 - reserved */ -#define SIC_INT_DoC 21 /* Disk on Chip memory controller */ -#define SIC_INT_MMCI0A 22 /* MMC 0A */ -#define SIC_INT_MMCI1A 23 /* MMC 1A */ -#define SIC_INT_AACI 24 /* Audio Codec */ -#define SIC_INT_ETH 25 /* Ethernet controller */ -#define SIC_INT_USB 26 /* USB controller */ -#define SIC_INT_PCI0 27 -#define SIC_INT_PCI1 28 -#define SIC_INT_PCI2 29 -#define SIC_INT_PCI3 30 - - -#define SIC_INTMASK_MMCI0B (1 << SIC_INT_MMCI0B) -#define SIC_INTMASK_MMCI1B (1 << SIC_INT_MMCI1B) -#define SIC_INTMASK_KMI0 (1 << SIC_INT_KMI0) -#define SIC_INTMASK_KMI1 (1 << SIC_INT_KMI1) -#define SIC_INTMASK_SCI3 (1 << SIC_INT_SCI3) -#define SIC_INTMASK_UART3 (1 << SIC_INT_UART3) -#define SIC_INTMASK_CLCD (1 << SIC_INT_CLCD) -#define SIC_INTMASK_TOUCH (1 << SIC_INT_TOUCH) -#define SIC_INTMASK_KEYPAD (1 << SIC_INT_KEYPAD) -#define SIC_INTMASK_DoC (1 << SIC_INT_DoC) -#define SIC_INTMASK_MMCI0A (1 << SIC_INT_MMCI0A) -#define SIC_INTMASK_MMCI1A (1 << SIC_INT_MMCI1A) -#define SIC_INTMASK_AACI (1 << SIC_INT_AACI) -#define SIC_INTMASK_ETH (1 << SIC_INT_ETH) -#define SIC_INTMASK_USB (1 << SIC_INT_USB) -#define SIC_INTMASK_PCI0 (1 << SIC_INT_PCI0) -#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) -#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) -#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) -/* - * Application Flash - * - */ -#define FLASH_BASE VERSATILE_FLASH_BASE -#define FLASH_SIZE VERSATILE_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE VERSATILE_BOOT_ROM_HI -#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) - -/* - * Clean base - dummy - * - */ -#define CLEAN_BASE EPROM_BASE - -/* - * System controller bit assignment - */ -#define VERSATILE_REFCLK 0 -#define VERSATILE_TIMCLK 1 - -#define VERSATILE_TIMER1_EnSel 15 -#define VERSATILE_TIMER2_EnSel 17 -#define VERSATILE_TIMER3_EnSel 19 -#define VERSATILE_TIMER4_EnSel 21 - - -#define MAX_TIMER 2 -#define MAX_PERIOD 699050 -#define TICKS_PER_uSEC 1 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_5 (mSEC_1 * 5) -#define mSEC_10 (mSEC_1 * 10) -#define mSEC_25 (mSEC_1 * 25) -#define SEC_1 (mSEC_1 * 1000) - -#define VERSATILE_CSR_BASE 0x10000000 -#define VERSATILE_CSR_SIZE 0x10000000 - -#ifdef CONFIG_MACH_VERSATILE_AB -/* - * IB2 Versatile/AB expansion board definitions - */ -#define VERSATILE_IB2_CAMERA_BANK VERSATILE_IB2_BASE -#define VERSATILE_IB2_KBD_DATAREG (VERSATILE_IB2_BASE + 0x01000000) - -/* VICINTSOURCE27 */ -#define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000) -#define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0) -#define VERSATILE_IB2_ISR (VERSATILE_IB2_INT_BASE + 4) - -#define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000) -#define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0) -#define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4) -#endif - -#endif - -/* END */ diff --git a/include/asm-arm/arch-versatile/system.h b/include/asm-arm/arch-versatile/system.h deleted file mode 100644 index 3ea4e07..0000000 --- a/include/asm-arm/arch-versatile/system.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/system.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_SYSTEM_H -#define __ASM_ARCH_SYSTEM_H - -#include -#include -#include - -static inline void arch_idle(void) -{ - /* - * This should do all the clock switching - * and wait for interrupt tricks - */ - cpu_do_idle(); -} - -static inline void arch_reset(char mode) -{ - u32 val; - - val = __raw_readl(IO_ADDRESS(VERSATILE_SYS_RESETCTL)) & ~0x7; - val |= 0x105; - - __raw_writel(0xa05f, IO_ADDRESS(VERSATILE_SYS_LOCK)); - __raw_writel(val, IO_ADDRESS(VERSATILE_SYS_RESETCTL)); - __raw_writel(0, IO_ADDRESS(VERSATILE_SYS_LOCK)); -} - -#endif diff --git a/include/asm-arm/arch-versatile/timex.h b/include/asm-arm/arch-versatile/timex.h deleted file mode 100644 index 38fd04f..0000000 --- a/include/asm-arm/arch-versatile/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/timex.h - * - * Versatile architecture timex specifications - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (50000000 / 16) diff --git a/include/asm-arm/arch-versatile/uncompress.h b/include/asm-arm/arch-versatile/uncompress.h deleted file mode 100644 index 7215133..0000000 --- a/include/asm-arm/arch-versatile/uncompress.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/uncompress.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define AMBA_UART_DR (*(volatile unsigned char *)0x101F1000) -#define AMBA_UART_LCRH (*(volatile unsigned char *)0x101F102C) -#define AMBA_UART_CR (*(volatile unsigned char *)0x101F1030) -#define AMBA_UART_FR (*(volatile unsigned char *)0x101F1018) - -/* - * This does not append a newline - */ -static inline void putc(int c) -{ - while (AMBA_UART_FR & (1 << 5)) - barrier(); - - AMBA_UART_DR = c; -} - -static inline void flush(void) -{ - while (AMBA_UART_FR & (1 << 3)) - barrier(); -} - -/* - * nothing to do - */ -#define arch_decomp_setup() -#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-versatile/vmalloc.h b/include/asm-arm/arch-versatile/vmalloc.h deleted file mode 100644 index ac780df..0000000 --- a/include/asm-arm/arch-versatile/vmalloc.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/include/asm-arm/arch-versatile/vmalloc.h - * - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Russell King. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#define VMALLOC_END (PAGE_OFFSET + 0x18000000) diff --git a/include/asm-arm/plat-s3c/iic.h b/include/asm-arm/plat-s3c/iic.h index d08a1f2..5106aca 100644 --- a/include/asm-arm/plat-s3c/iic.h +++ b/include/asm-arm/plat-s3c/iic.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/iic.h +/* arch/arm/mach-s3c2410/include/mach/iic.h * * Copyright (c) 2004 Simtec Electronics * Ben Dooks diff --git a/include/asm-arm/plat-s3c/nand.h b/include/asm-arm/plat-s3c/nand.h index ad6bbe9..f4dcd14 100644 --- a/include/asm-arm/plat-s3c/nand.h +++ b/include/asm-arm/plat-s3c/nand.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/nand.h +/* arch/arm/mach-s3c2410/include/mach/nand.h * * Copyright (c) 2004 Simtec Electronics * Ben Dooks diff --git a/include/asm-arm/plat-s3c/regs-ac97.h b/include/asm-arm/plat-s3c/regs-ac97.h index b004dee..c3878f7 100644 --- a/include/asm-arm/plat-s3c/regs-ac97.h +++ b/include/asm-arm/plat-s3c/regs-ac97.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-ac97.h +/* arch/arm/mach-s3c2410/include/mach/regs-ac97.h * * Copyright (c) 2006 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c/regs-adc.h b/include/asm-arm/plat-s3c/regs-adc.h index c7f2319..4323ccc 100644 --- a/include/asm-arm/plat-s3c/regs-adc.h +++ b/include/asm-arm/plat-s3c/regs-adc.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-adc.h +/* arch/arm/mach-s3c2410/include/mach/regs-adc.h * * Copyright (c) 2004 Shannon Holland * diff --git a/include/asm-arm/plat-s3c/regs-iic.h b/include/asm-arm/plat-s3c/regs-iic.h index 2ae2952..2f7c17d 100644 --- a/include/asm-arm/plat-s3c/regs-iic.h +++ b/include/asm-arm/plat-s3c/regs-iic.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-iic.h +/* arch/arm/mach-s3c2410/include/mach/regs-iic.h * * Copyright (c) 2004 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c/regs-nand.h b/include/asm-arm/plat-s3c/regs-nand.h index d742205..09f0b55 100644 --- a/include/asm-arm/plat-s3c/regs-nand.h +++ b/include/asm-arm/plat-s3c/regs-nand.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-nand.h +/* arch/arm/mach-s3c2410/include/mach/regs-nand.h * * Copyright (c) 2004,2005 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c/regs-rtc.h b/include/asm-arm/plat-s3c/regs-rtc.h index 93b03c4..d5837cf 100644 --- a/include/asm-arm/plat-s3c/regs-rtc.h +++ b/include/asm-arm/plat-s3c/regs-rtc.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-rtc.h +/* arch/arm/mach-s3c2410/include/mach/regs-rtc.h * * Copyright (c) 2003 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c/regs-serial.h b/include/asm-arm/plat-s3c/regs-serial.h index 923e114..a0daa64 100644 --- a/include/asm-arm/plat-s3c/regs-serial.h +++ b/include/asm-arm/plat-s3c/regs-serial.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-serial.h +/* arch/arm/mach-s3c2410/include/mach/regs-serial.h * * From linux/include/asm-arm/hardware/serial_s3c2410.h * diff --git a/include/asm-arm/plat-s3c/regs-timer.h b/include/asm-arm/plat-s3c/regs-timer.h index b5bc692..b4366ea 100644 --- a/include/asm-arm/plat-s3c/regs-timer.h +++ b/include/asm-arm/plat-s3c/regs-timer.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-timer.h +/* arch/arm/mach-s3c2410/include/mach/regs-timer.h * * Copyright (c) 2003 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c/regs-watchdog.h b/include/asm-arm/plat-s3c/regs-watchdog.h index 56c4193b..1229f07 100644 --- a/include/asm-arm/plat-s3c/regs-watchdog.h +++ b/include/asm-arm/plat-s3c/regs-watchdog.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-watchdog.h +/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h * * Copyright (c) 2003 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c24xx/regs-iis.h b/include/asm-arm/plat-s3c24xx/regs-iis.h index eaf7791..a6f1d5d 100644 --- a/include/asm-arm/plat-s3c24xx/regs-iis.h +++ b/include/asm-arm/plat-s3c24xx/regs-iis.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-iis.h +/* arch/arm/mach-s3c2410/include/mach/regs-iis.h * * Copyright (c) 2003 Simtec Electronics * http://www.simtec.co.uk/products/SWLINUX/ diff --git a/include/asm-arm/plat-s3c24xx/regs-spi.h b/include/asm-arm/plat-s3c24xx/regs-spi.h index ea565b0..2b35479 100644 --- a/include/asm-arm/plat-s3c24xx/regs-spi.h +++ b/include/asm-arm/plat-s3c24xx/regs-spi.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-spi.h +/* arch/arm/mach-s3c2410/include/mach/regs-spi.h * * Copyright (c) 2004 Fetron GmbH * diff --git a/include/asm-arm/plat-s3c24xx/regs-udc.h b/include/asm-arm/plat-s3c24xx/regs-udc.h index e1e9805..f0dd4a4 100644 --- a/include/asm-arm/plat-s3c24xx/regs-udc.h +++ b/include/asm-arm/plat-s3c24xx/regs-udc.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-udc.h +/* arch/arm/mach-s3c2410/include/mach/regs-udc.h * * Copyright (C) 2004 Herbert Poetzl * diff --git a/include/asm-arm/plat-s3c24xx/udc.h b/include/asm-arm/plat-s3c24xx/udc.h index b8aa6cb..546bb40 100644 --- a/include/asm-arm/plat-s3c24xx/udc.h +++ b/include/asm-arm/plat-s3c24xx/udc.h @@ -1,4 +1,4 @@ -/* linux/include/asm-arm/arch-s3c2410/udc.h +/* arch/arm/mach-s3c2410/include/mach/udc.h * * Copyright (c) 2005 Arnaud Patard * -- cgit v1.1 From 7d283aee50351ec19eaf654a8690d77c4e1dff50 Mon Sep 17 00:00:00 2001 From: "Luis R. Rodriguez" Date: Wed, 6 Aug 2008 15:21:26 -0700 Subject: list.h: Add list_splice_tail() and list_splice_tail_init() If you are using linked lists for queues list_splice() will not do what you would expect even if you use the elements passed reversed. We need to handle these differently. We add list_splice_tail() and list_splice_tail_init(). Signed-off-by: Peter Zijlstra Signed-off-by: Luis R. Rodriguez Signed-off-by: John W. Linville --- include/linux/list.h | 47 ++++++++++++++++++++++++++++++++++++++--------- 1 file changed, 38 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/list.h b/include/linux/list.h index 453916b..a886f27 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -215,21 +215,21 @@ static inline int list_is_singular(const struct list_head *head) } static inline void __list_splice(const struct list_head *list, - struct list_head *head) + struct list_head *prev, + struct list_head *next) { struct list_head *first = list->next; struct list_head *last = list->prev; - struct list_head *at = head->next; - first->prev = head; - head->next = first; + first->prev = prev; + prev->next = first; - last->next = at; - at->prev = last; + last->next = next; + next->prev = last; } /** - * list_splice - join two lists + * list_splice - join two lists, this is designed for stacks * @list: the new list to add. * @head: the place to add it in the first list. */ @@ -237,7 +237,19 @@ static inline void list_splice(const struct list_head *list, struct list_head *head) { if (!list_empty(list)) - __list_splice(list, head); + __list_splice(list, head, head->next); +} + +/** + * list_splice_tail - join two lists, each list being a queue + * @list: the new list to add. + * @head: the place to add it in the first list. + */ +static inline void list_splice_tail(struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) + __list_splice(list, head->prev, head); } /** @@ -251,7 +263,24 @@ static inline void list_splice_init(struct list_head *list, struct list_head *head) { if (!list_empty(list)) { - __list_splice(list, head); + __list_splice(list, head, head->next); + INIT_LIST_HEAD(list); + } +} + +/** + * list_splice_tail_init - join two lists, each list being a queue, and + * reinitialise the emptied list. + * @list: the new list to add. + * @head: the place to add it in the first list. + * + * The list at @list is reinitialised + */ +static inline void list_splice_tail_init(struct list_head *list, + struct list_head *head) +{ + if (!list_empty(list)) { + __list_splice(list, head->prev, head); INIT_LIST_HEAD(list); } } -- cgit v1.1 From 00e8a4da8cf0d7dba8cc4b0da28ea0f12dcf6b36 Mon Sep 17 00:00:00 2001 From: "Luis R. Rodriguez" Date: Wed, 6 Aug 2008 13:28:54 -0700 Subject: list.h: add list_cut_position() This adds list_cut_position() which lets you cut a list into two lists given a pivot in the list. Signed-off-by: Luis R. Rodriguez Signed-off-by: John W. Linville --- include/linux/list.h | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) (limited to 'include') diff --git a/include/linux/list.h b/include/linux/list.h index a886f27..1d109e2 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -214,6 +214,46 @@ static inline int list_is_singular(const struct list_head *head) return !list_empty(head) && (head->next == head->prev); } +static inline void __list_cut_position(struct list_head *list, + struct list_head *head, struct list_head *entry) +{ + struct list_head *new_first = entry->next; + list->next = head->next; + list->next->prev = list; + list->prev = entry; + entry->next = list; + head->next = new_first; + new_first->prev = head; +} + +/** + * list_cut_position - cut a list into two + * @list: a new list to add all removed entries + * @head: a list with entries + * @entry: an entry within head, could be the head itself + * and if so we won't cut the list + * + * This helper moves the initial part of @head, up to and + * including @entry, from @head to @list. You should + * pass on @entry an element you know is on @head. @list + * should be an empty list or a list you do not care about + * losing its data. + * + */ +static inline void list_cut_position(struct list_head *list, + struct list_head *head, struct list_head *entry) +{ + if (list_empty(head)) + return; + if (list_is_singular(head) && + (head->next != entry && head != entry)) + return; + if (entry == head) + INIT_LIST_HEAD(list); + else + __list_cut_position(list, head, entry); +} + static inline void __list_splice(const struct list_head *list, struct list_head *prev, struct list_head *next) -- cgit v1.1 From 5861bbfcc10fc0358abf52c7d22850c8d180f0b0 Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Thu, 7 Aug 2008 16:55:03 -0700 Subject: tracehook: fix CLONE_PTRACE In the change in commit 09a05394fe2448a4139b014936330af23fa7ec83, I overlooked two nits in the logic and this broke using CLONE_PTRACE when PTRACE_O_TRACE* are not being used. A parent that is itself traced at all but not using PTRACE_O_TRACE*, using CLONE_PTRACE would have its new child fail to be traced. A parent that is not itself traced at all that uses CLONE_PTRACE (which should be a no-op in this case) would confuse the bookkeeping and lead to a crash at exit time. This restores the missing checks and fixes both failure modes. Reported-by: Eduardo Habkost Signed-off-by: Roland McGrath --- include/linux/ptrace.h | 2 +- include/linux/tracehook.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h index fd31756..ea7416c 100644 --- a/include/linux/ptrace.h +++ b/include/linux/ptrace.h @@ -172,7 +172,7 @@ static inline void ptrace_init_task(struct task_struct *child, bool ptrace) child->ptrace = 0; if (unlikely(ptrace)) { child->ptrace = current->ptrace; - __ptrace_link(child, current->parent); + ptrace_link(child, current->parent); } } diff --git a/include/linux/tracehook.h b/include/linux/tracehook.h index ab3ef7a..b48d819 100644 --- a/include/linux/tracehook.h +++ b/include/linux/tracehook.h @@ -280,7 +280,7 @@ static inline void tracehook_report_clone(int trace, struct pt_regs *regs, unsigned long clone_flags, pid_t pid, struct task_struct *child) { - if (unlikely(trace)) { + if (unlikely(trace) || unlikely(clone_flags & CLONE_PTRACE)) { /* * The child starts up with an immediate SIGSTOP. */ -- cgit v1.1 From 2727f226a65e034f93846def7fab314dee430df3 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 8 Aug 2008 15:13:27 +0100 Subject: [ARM] fix pnx4008 build errors include/linux/i2c-pnx.h was missed when moving the include files. Fix it now; it doesn't really need to include mach/i2c.h at all. Successfully build tested with pnx4008_defconfig, which had failed in linux-next. Signed-off-by: Russell King --- include/linux/i2c-pnx.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/i2c-pnx.h b/include/linux/i2c-pnx.h index e6e9c81..f13255e 100644 --- a/include/linux/i2c-pnx.h +++ b/include/linux/i2c-pnx.h @@ -12,7 +12,9 @@ #ifndef __I2C_PNX_H__ #define __I2C_PNX_H__ -#include +#include + +struct platform_device; struct i2c_pnx_mif { int ret; /* Return value */ -- cgit v1.1 From 6724cce8fb4b408ae1a2fab455050f3407c80144 Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Fri, 8 Aug 2008 13:56:20 -0700 Subject: list.h: fix fatal kernel-doc error Fix fatal multi-line kernel-doc error in list.h: function short description must be on one line. Error(linux-2.6.27-rc2-git3//include/linux/list.h:318): duplicate section name 'Description' Signed-off-by: Randy Dunlap Signed-off-by: Linus Torvalds --- include/linux/list.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/list.h b/include/linux/list.h index 1d109e2..db35ef0 100644 --- a/include/linux/list.h +++ b/include/linux/list.h @@ -309,11 +309,11 @@ static inline void list_splice_init(struct list_head *list, } /** - * list_splice_tail_init - join two lists, each list being a queue, and - * reinitialise the emptied list. + * list_splice_tail_init - join two lists and reinitialise the emptied list * @list: the new list to add. * @head: the place to add it in the first list. * + * Each of the lists is a queue. * The list at @list is reinitialised */ static inline void list_splice_tail_init(struct list_head *list, -- cgit v1.1