From fa3959f457109cc7d082b86ea6daae927982815b Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:27:02 +0200 Subject: mv643xx_eth: get rid of static variables, allow multiple instances Move mv643xx_eth's static state (ethernet register block base address and MII management interface spinlock) into a struct hanging off the shared platform device. This is necessary to support chips that contain multiple mv643xx_eth silicon blocks. Signed-off-by: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Dale Farnsworth --- include/linux/mv643xx_eth.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 30e11aa..2d59855 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -1,6 +1,7 @@ /* * MV-643XX ethernet platform device data definition file. */ + #ifndef __LINUX_MV643XX_ETH_H #define __LINUX_MV643XX_ETH_H @@ -13,7 +14,9 @@ #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 struct mv643xx_eth_platform_data { + struct platform_device *shared; int port_number; + u16 force_phy_addr; /* force override if phy_addr == 0 */ u16 phy_addr; -- cgit v1.1 From f2ce825d2a89b30af14fa577298fecaab7bc9504 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:27:17 +0200 Subject: mv643xx_eth: mbus decode window support Make it possible to pass mbus_dram_target_info to the mv643xx_eth driver via the platform data, and make the mv643xx_eth driver program the window registers based on this data if it is passed in. Signed-off-by: Lennert Buytenhek Reviewed-by: Tzachi Perelstein Acked-by: Russell King Signed-off-by: Dale Farnsworth --- include/linux/mv643xx_eth.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 2d59855..4801b02 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -5,6 +5,8 @@ #ifndef __LINUX_MV643XX_ETH_H #define __LINUX_MV643XX_ETH_H +#include + #define MV643XX_ETH_SHARED_NAME "mv643xx_eth_shared" #define MV643XX_ETH_NAME "mv643xx_eth" #define MV643XX_ETH_SHARED_REGS 0x2000 @@ -13,6 +15,10 @@ #define MV643XX_ETH_SIZE_REG_4 0x2224 #define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290 +struct mv643xx_eth_shared_platform_data { + struct mbus_dram_target_info *dram; +}; + struct mv643xx_eth_platform_data { struct platform_device *shared; int port_number; -- cgit v1.1 From c416a41f99be190e1f558cb06f70ddd560ce8b4b Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:27:32 +0200 Subject: mv643xx_eth: configurable t_clk Make t_clk configurable via platform device data (with the current hardcoded value, 133 MHz, being the default), as it varies across different chip families. Signed-off-by: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Dale Farnsworth --- include/linux/mv643xx_eth.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 4801b02..9f3a603 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -17,6 +17,7 @@ struct mv643xx_eth_shared_platform_data { struct mbus_dram_target_info *dram; + unsigned int t_clk; }; struct mv643xx_eth_platform_data { -- cgit v1.1 From 240e4419e0cfcba737883b637ec2bdcc071ea03d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:27:44 +0200 Subject: mv643xx_eth: shorten shared platform driver name Change the MV643XX_ETH_SHARED_NAME platform driver name to something shorter than 19 characters, so that we can register multiple (otherwise we end up with sysfs conflicts since all instances will map to "mv643xx_eth_shared." as there is a 20-char sysfs file name limit.) Signed-off-by: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Dale Farnsworth --- include/linux/mv643xx_eth.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 9f3a603..66dc957 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -7,8 +7,8 @@ #include -#define MV643XX_ETH_SHARED_NAME "mv643xx_eth_shared" -#define MV643XX_ETH_NAME "mv643xx_eth" +#define MV643XX_ETH_SHARED_NAME "mv643xx_eth" +#define MV643XX_ETH_NAME "mv643xx_eth_port" #define MV643XX_ETH_SHARED_REGS 0x2000 #define MV643XX_ETH_SHARED_REGS_SIZE 0x2000 #define MV643XX_ETH_BAR_4 0x2220 -- cgit v1.1 From ce4e2e4558903ef92edf1ab4e09b0b338a09fd61 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 24 Apr 2008 01:29:59 +0200 Subject: mv643xx_eth: inter-mv643xx SMI port sharing There exist chips with up to four mv643xx_eth silicon blocks but only one external SMI (MII management) interface -- the SMI logic of the first block is shared by all the blocks. Handle this by allowing a per-port override of which mv643xx_eth_shared's SMI registers (and spinlock) to use. Signed-off-by: Lennert Buytenhek Acked-by: Nicolas Pitre Signed-off-by: Dale Farnsworth --- include/linux/mv643xx_eth.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/mv643xx_eth.h b/include/linux/mv643xx_eth.h index 66dc957..a15cdd4 100644 --- a/include/linux/mv643xx_eth.h +++ b/include/linux/mv643xx_eth.h @@ -24,6 +24,8 @@ struct mv643xx_eth_platform_data { struct platform_device *shared; int port_number; + struct platform_device *shared_smi; + u16 force_phy_addr; /* force override if phy_addr == 0 */ u16 phy_addr; -- cgit v1.1 From 98db6f193c93e9b4729215af2c9101210e11d26c Mon Sep 17 00:00:00 2001 From: Sam Ravnborg Date: Tue, 29 Apr 2008 22:38:48 +0200 Subject: x86: fix section mismatch in pci_scan_bus Fix following section mismatch warning: WARNING: vmlinux.o(.text+0x275616): Section mismatch in reference from the function pci_scan_bus() to the function .devinit.text:pci_scan_bus_parented() The warning was seen with a CONFIG_DEBUG_SECTION_MISMATCH=y build. The inline function pci_scan_bus refer to functions annotated __devinit - so annotate it __devinit too. This revealed a few x86 specific functions that were only used from __init or __devinit context. So annotate these __devinit and the warning was killed. The added include in pci.h was not strictly required but added to avoid being dependent on indirect includes. Signed-off-by: Sam Ravnborg Signed-off-by: Jesse Barnes --- include/linux/pci.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 96acd0d..a59517b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -44,6 +44,7 @@ #include #include +#include #include #include #include @@ -474,7 +475,7 @@ extern struct pci_bus *pci_find_bus(int domain, int busnr); void pci_bus_add_devices(struct pci_bus *bus); struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, struct pci_ops *ops, void *sysdata); -static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops, +static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, void *sysdata) { struct pci_bus *root_bus; -- cgit v1.1 From 70b9f7dc1435412ca2b89b13a8353bd9915a7189 Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Mon, 28 Apr 2008 16:27:23 -0700 Subject: x86/pci: remove flag in pci_cfg_space_size_ext so let pci_cfg_space_size call it directly without flag. Signed-off-by: Yinghai Lu Signed-off-by: Jesse Barnes --- include/linux/pci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index a59517b..509159b 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -667,7 +667,7 @@ int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), void *userdata); -int pci_cfg_space_size_ext(struct pci_dev *dev, unsigned check_exp_pcix); +int pci_cfg_space_size_ext(struct pci_dev *dev); int pci_cfg_space_size(struct pci_dev *dev); unsigned char pci_bus_max_busnr(struct pci_bus *bus); -- cgit v1.1 From 41fef0ee7b8f3fe3f3dd2ddc9b170f3d88bce595 Mon Sep 17 00:00:00 2001 From: Marcin Slusarz Date: Sat, 3 May 2008 21:03:01 -0700 Subject: xfrm: convert empty xfrm_audit_* macros to functions it removes these warnings when CONFIG_AUDITSYSCALL is unset: net/xfrm/xfrm_user.c: In function 'xfrm_add_sa': net/xfrm/xfrm_user.c:412: warning: unused variable 'sid' net/xfrm/xfrm_user.c:411: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:410: warning: unused variable 'loginuid' net/xfrm/xfrm_user.c: In function 'xfrm_del_sa': net/xfrm/xfrm_user.c:485: warning: unused variable 'sid' net/xfrm/xfrm_user.c:484: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:483: warning: unused variable 'loginuid' net/xfrm/xfrm_user.c: In function 'xfrm_add_policy': net/xfrm/xfrm_user.c:1132: warning: unused variable 'sid' net/xfrm/xfrm_user.c:1131: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:1130: warning: unused variable 'loginuid' net/xfrm/xfrm_user.c: In function 'xfrm_get_policy': net/xfrm/xfrm_user.c:1382: warning: unused variable 'sid' net/xfrm/xfrm_user.c:1381: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:1380: warning: unused variable 'loginuid' net/xfrm/xfrm_user.c: In function 'xfrm_add_pol_expire': net/xfrm/xfrm_user.c:1620: warning: unused variable 'sid' net/xfrm/xfrm_user.c:1619: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:1618: warning: unused variable 'loginuid' net/xfrm/xfrm_user.c: In function 'xfrm_add_sa_expire': net/xfrm/xfrm_user.c:1658: warning: unused variable 'sid' net/xfrm/xfrm_user.c:1657: warning: unused variable 'sessionid' net/xfrm/xfrm_user.c:1656: warning: unused variable 'loginuid' Signed-off-by: Marcin Slusarz Signed-off-by: David S. Miller --- include/net/xfrm.h | 48 ++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 40 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/net/xfrm.h b/include/net/xfrm.h index d1350bc..2933d747 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -648,14 +648,46 @@ extern void xfrm_audit_state_notfound(struct sk_buff *skb, u16 family, extern void xfrm_audit_state_icvfail(struct xfrm_state *x, struct sk_buff *skb, u8 proto); #else -#define xfrm_audit_policy_add(x, r, a, se, s) do { ; } while (0) -#define xfrm_audit_policy_delete(x, r, a, se, s) do { ; } while (0) -#define xfrm_audit_state_add(x, r, a, se, s) do { ; } while (0) -#define xfrm_audit_state_delete(x, r, a, se, s) do { ; } while (0) -#define xfrm_audit_state_replay_overflow(x, s) do { ; } while (0) -#define xfrm_audit_state_notfound_simple(s, f) do { ; } while (0) -#define xfrm_audit_state_notfound(s, f, sp, sq) do { ; } while (0) -#define xfrm_audit_state_icvfail(x, s, p) do { ; } while (0) + +static inline void xfrm_audit_policy_add(struct xfrm_policy *xp, int result, + u32 auid, u32 ses, u32 secid) +{ +} + +static inline void xfrm_audit_policy_delete(struct xfrm_policy *xp, int result, + u32 auid, u32 ses, u32 secid) +{ +} + +static inline void xfrm_audit_state_add(struct xfrm_state *x, int result, + u32 auid, u32 ses, u32 secid) +{ +} + +static inline void xfrm_audit_state_delete(struct xfrm_state *x, int result, + u32 auid, u32 ses, u32 secid) +{ +} + +static inline void xfrm_audit_state_replay_overflow(struct xfrm_state *x, + struct sk_buff *skb) +{ +} + +static inline void xfrm_audit_state_notfound_simple(struct sk_buff *skb, + u16 family) +{ +} + +static inline void xfrm_audit_state_notfound(struct sk_buff *skb, u16 family, + __be32 net_spi, __be32 net_seq) +{ +} + +static inline void xfrm_audit_state_icvfail(struct xfrm_state *x, + struct sk_buff *skb, u8 proto) +{ +} #endif /* CONFIG_AUDITSYSCALL */ static inline void xfrm_pol_hold(struct xfrm_policy *policy) -- cgit v1.1 From 649de51b883746d76c5fa1614dd067054c9d702a Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Fri, 2 May 2008 21:17:06 +0100 Subject: [ARM] 5027/1: Fixed random memory corruption on pxa suspend cycle. Each time a pxa type cpu went in suspend, a portion of kmalloc memory was corrupted. The issue was an incorrect length allocation introduced by the commit 711be5ccfe9a02ba560aa918a008c31ea4760163 for the save registers array (=> overflow). Signed-off-by: Robert Jarzmik Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pm.h b/include/asm-arm/arch-pxa/pm.h index 9d9f4b5..261e5bc 100644 --- a/include/asm-arm/arch-pxa/pm.h +++ b/include/asm-arm/arch-pxa/pm.h @@ -10,7 +10,7 @@ #include struct pxa_cpu_pm_fns { - int save_size; + int save_count; void (*save)(unsigned long *); void (*restore)(unsigned long *); int (*valid)(suspend_state_t state); -- cgit v1.1 From f3d69e0507f84903059d456c5d19f10b2df3ac69 Mon Sep 17 00:00:00 2001 From: Luke Browning Date: Sun, 27 Apr 2008 18:41:55 +0000 Subject: [POWERPC] spufs: fix concurrent delivery of class 0 & 1 exceptions SPU class 0 & 1 exceptions may occur in parallel, so we may end up overwriting csa.dsisr. This change adds dedicated fields for each class to the spu and the spu context so that fault data is not overwritten. Signed-off-by: Luke Browning Signed-off-by: Jeremy Kerr --- include/asm-powerpc/spu.h | 8 +++++--- include/asm-powerpc/spu_csa.h | 3 ++- 2 files changed, 7 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index e3c845b..882aa95 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -128,9 +128,11 @@ struct spu { unsigned int irqs[3]; u32 node; u64 flags; - u64 dar; - u64 dsisr; u64 class_0_pending; + u64 class_0_dar; + u64 class_0_dsisr; + u64 class_1_dar; + u64 class_1_dsisr; size_t ls_size; unsigned int slb_replace; struct mm_struct *mm; @@ -143,7 +145,7 @@ struct spu { void (* wbox_callback)(struct spu *spu); void (* ibox_callback)(struct spu *spu); - void (* stop_callback)(struct spu *spu); + void (* stop_callback)(struct spu *spu, int irq); void (* mfc_callback)(struct spu *spu); char irq_c0[8]; diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h index 0ab6bff..129ec14 100644 --- a/include/asm-powerpc/spu_csa.h +++ b/include/asm-powerpc/spu_csa.h @@ -254,7 +254,8 @@ struct spu_state { u64 spu_chnldata_RW[32]; u32 spu_mailbox_data[4]; u32 pu_mailbox_data[1]; - u64 dar, dsisr, class_0_pending; + u64 class_0_dar, class_0_dsisr, class_0_pending; + u64 class_1_dar, class_1_dsisr; unsigned long suspend_time; spinlock_t register_lock; }; -- cgit v1.1 From de1028927ae3487e2e450dacf50fbf32042aee18 Mon Sep 17 00:00:00 2001 From: Luke Browning Date: Mon, 28 Apr 2008 17:35:56 +1000 Subject: [POWERPC] spufs: handle faults while the context switch pending flag is set Currently, page fault handlers don't issue a mfc restart if the context switch pending flag is set, which can leave us with a hanging DMA after a context restore. This patch introduces fault pending flag that is set by the fault handler and read by the context switch code, so that the latter can add the restart bit at the right spot, after it has successfuly saved the state of the mfc control register. Signed-off-by: Luke Browning Signed-off-by: Jeremy Kerr --- include/asm-powerpc/spu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index 882aa95..6abead6 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -100,6 +100,7 @@ /* Flag indicating progress during context switch. */ #define SPU_CONTEXT_SWITCH_PENDING 0UL +#define SPU_CONTEXT_FAULT_PENDING 1UL struct spu_context; struct spu_runqueue; -- cgit v1.1 From 0bbeafd0118fc3ae54990064760c889d41dc21d6 Mon Sep 17 00:00:00 2001 From: Satoru SATOH Date: Sun, 4 May 2008 22:12:43 -0700 Subject: ip: Make use of the inline function dst_metric_locked() Signed-off-by: Satoru SATOH Signed-off-by: David S. Miller --- include/net/ip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/ip.h b/include/net/ip.h index 6d7bcd5..3b40bc2 100644 --- a/include/net/ip.h +++ b/include/net/ip.h @@ -210,7 +210,7 @@ int ip_dont_fragment(struct sock *sk, struct dst_entry *dst) { return (inet_sk(sk)->pmtudisc == IP_PMTUDISC_DO || (inet_sk(sk)->pmtudisc == IP_PMTUDISC_WANT && - !(dst_metric(dst, RTAX_LOCK)&(1< Date: Sat, 3 May 2008 06:34:04 +1000 Subject: [POWERPC] devres: Add devm_ioremap_prot() We provide an ioremap_flags, so this provides a corresponding devm_ioremap_prot. The slight name difference is at Ben Herrenschmidt's request as he plans on changing ioremap_flags to ioremap_prot in the future. Signed-off-by: Emil Medve Signed-off-by: Kumar Gala Acked-by: Tejun Heo Cc: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Paul Mackerras --- include/asm-powerpc/io.h | 8 +++++++- include/linux/io.h | 1 + 2 files changed, 8 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h index afae069..e0062d7 100644 --- a/include/asm-powerpc/io.h +++ b/include/asm-powerpc/io.h @@ -2,7 +2,7 @@ #define _ASM_POWERPC_IO_H #ifdef __KERNEL__ -/* +/* * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version @@ -18,6 +18,9 @@ extern int check_legacy_ioport(unsigned long base_port); #define _PNPWRP 0xa79 #define PNPBIOS_BASE 0xf000 +#include +#include + #include #include #include @@ -744,6 +747,9 @@ static inline void * bus_to_virt(unsigned long address) #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) +void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset, + size_t size, unsigned long flags); + #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_IO_H */ diff --git a/include/linux/io.h b/include/linux/io.h index 3a03a36..6c7f0ba 100644 --- a/include/linux/io.h +++ b/include/linux/io.h @@ -65,5 +65,6 @@ void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset, void devm_iounmap(struct device *dev, void __iomem *addr); int check_signature(const volatile void __iomem *io_addr, const unsigned char *signature, int length); +void devm_ioremap_release(struct device *dev, void *res); #endif /* _LINUX_IO_H */ -- cgit v1.1 From 688b744d8bc84dc5cc646e97509113dc5e8818ed Mon Sep 17 00:00:00 2001 From: Harvey Harrison Date: Thu, 24 Apr 2008 16:57:23 -0500 Subject: kgdb: fix signedness mixmatches, add statics, add declaration to header Noticed by sparse: arch/x86/kernel/kgdb.c:556:15: warning: symbol 'kgdb_arch_pc' was not declared. Should it be static? kernel/kgdb.c:149:8: warning: symbol 'kgdb_do_roundup' was not declared. Should it be static? kernel/kgdb.c:193:22: warning: symbol 'kgdb_arch_pc' was not declared. Should it be static? kernel/kgdb.c:712:5: warning: symbol 'remove_all_break' was not declared. Should it be static? Related to kgdb_hex2long: arch/x86/kernel/kgdb.c:371:28: warning: incorrect type in argument 2 (different signedness) arch/x86/kernel/kgdb.c:371:28: expected long *long_val arch/x86/kernel/kgdb.c:371:28: got unsigned long * kernel/kgdb.c:469:27: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:469:27: expected long *long_val kernel/kgdb.c:469:27: got unsigned long * kernel/kgdb.c:470:27: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:470:27: expected long *long_val kernel/kgdb.c:470:27: got unsigned long * kernel/kgdb.c:894:27: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:894:27: expected long *long_val kernel/kgdb.c:894:27: got unsigned long * kernel/kgdb.c:895:27: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:895:27: expected long *long_val kernel/kgdb.c:895:27: got unsigned long * kernel/kgdb.c:1127:28: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:1127:28: expected long *long_val kernel/kgdb.c:1127:28: got unsigned long * kernel/kgdb.c:1132:25: warning: incorrect type in argument 2 (different signedness) kernel/kgdb.c:1132:25: expected long *long_val kernel/kgdb.c:1132:25: got unsigned long * Signed-off-by: Harvey Harrison Signed-off-by: Jason Wessel --- include/linux/kgdb.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/kgdb.h b/include/linux/kgdb.h index 9757b1a..6adcc29 100644 --- a/include/linux/kgdb.h +++ b/include/linux/kgdb.h @@ -261,10 +261,12 @@ struct kgdb_io { extern struct kgdb_arch arch_kgdb_ops; +extern unsigned long __weak kgdb_arch_pc(int exception, struct pt_regs *regs); + extern int kgdb_register_io_module(struct kgdb_io *local_kgdb_io_ops); extern void kgdb_unregister_io_module(struct kgdb_io *local_kgdb_io_ops); -extern int kgdb_hex2long(char **ptr, long *long_val); +extern int kgdb_hex2long(char **ptr, unsigned long *long_val); extern int kgdb_mem2hex(char *mem, char *buf, int count); extern int kgdb_hex2mem(char *buf, char *mem, int count); -- cgit v1.1 From b6d9d267f0d68104df910fca89149803aec82426 Mon Sep 17 00:00:00 2001 From: Finn Thain Date: Mon, 5 May 2008 21:26:15 +0200 Subject: m68k: remove old mac_esp cruft Remove the rest of the old mac_esp driver. Also ditch the rest of the machw mechanism, it needs to be replaced by a fake openfirmware tree. Signed-off-by: Finn Thain Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- include/asm-m68k/machw.h | 30 ------------------------------ 1 file changed, 30 deletions(-) (limited to 'include') diff --git a/include/asm-m68k/machw.h b/include/asm-m68k/machw.h index d2e0e25..3562499 100644 --- a/include/asm-m68k/machw.h +++ b/include/asm-m68k/machw.h @@ -66,36 +66,6 @@ struct MAC_SCC # define mac_scc ((*(volatile struct SCC*)MAC_SCC_BAS)) #endif -/* hardware stuff */ - -#define MACHW_DECLARE(name) unsigned name : 1 -#define MACHW_SET(name) (mac_hw_present.name = 1) -#define MACHW_PRESENT(name) (mac_hw_present.name) - -struct mac_hw_present { - /* video hardware */ - /* sound hardware */ - /* disk storage interfaces */ - MACHW_DECLARE(MAC_SCSI_80); /* Directly mapped NCR5380 */ - MACHW_DECLARE(MAC_SCSI_96); /* 53c9[46] */ - MACHW_DECLARE(MAC_SCSI_96_2); /* 2nd 53c9[46] Q900 and Q950 */ - MACHW_DECLARE(IDE); /* IDE Interface */ - /* other I/O hardware */ - MACHW_DECLARE(SCC); /* Serial Communications Contr. */ - /* DMA */ - MACHW_DECLARE(SCSI_DMA); /* DMA for the NCR5380 */ - /* real time clocks */ - MACHW_DECLARE(RTC_CLK); /* clock chip */ - /* supporting hardware */ - MACHW_DECLARE(VIA1); /* Versatile Interface Ad. 1 */ - MACHW_DECLARE(VIA2); /* Versatile Interface Ad. 2 */ - MACHW_DECLARE(RBV); /* Versatile Interface Ad. 2+ */ - /* NUBUS */ - MACHW_DECLARE(NUBUS); /* NUBUS */ -}; - -extern struct mac_hw_present mac_hw_present; - #endif /* __ASSEMBLY__ */ #endif /* linux/machw.h */ -- cgit v1.1 From 8ae121ac8666b0421aa20fd80d4597ec66fa54bc Mon Sep 17 00:00:00 2001 From: Gregory Haskins Date: Wed, 23 Apr 2008 07:13:29 -0400 Subject: sched: fix RT task-wakeup logic Dmitry Adamushko pointed out a logic error in task_wake_up_rt() where we will always evaluate to "true". You can find the thread here: http://lkml.org/lkml/2008/4/22/296 In reality, we only want to try to push tasks away when a wake up request is not going to preempt the current task. So lets fix it. Note: We introduce test_tsk_need_resched() instead of open-coding the flag check so that the merge-conflict with -rt should help remind us that we may need to support NEEDS_RESCHED_DELAYED in the future, too. Signed-off-by: Gregory Haskins CC: Dmitry Adamushko CC: Steven Rostedt Signed-off-by: Ingo Molnar --- include/linux/sched.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 03c2380..698b5a4 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1977,6 +1977,11 @@ static inline void clear_tsk_need_resched(struct task_struct *tsk) clear_tsk_thread_flag(tsk,TIF_NEED_RESCHED); } +static inline int test_tsk_need_resched(struct task_struct *tsk) +{ + return unlikely(test_tsk_thread_flag(tsk,TIF_NEED_RESCHED)); +} + static inline int signal_pending(struct task_struct *p) { return unlikely(test_tsk_thread_flag(p,TIF_SIGPENDING)); @@ -1991,7 +1996,7 @@ static inline int fatal_signal_pending(struct task_struct *p) static inline int need_resched(void) { - return unlikely(test_thread_flag(TIF_NEED_RESCHED)); + return unlikely(test_tsk_need_resched(current)); } /* -- cgit v1.1 From 690229a0912ca2fef8b542fe4d8b73acfcdc6e24 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Wed, 23 Apr 2008 09:31:35 +0200 Subject: sched: make clock sync tunable by architecture code make time_sync_thresh tunable to architecture code. Signed-off-by: Ingo Molnar --- include/linux/sched.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 698b5a4..54c9ca2 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -158,6 +158,8 @@ print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq) } #endif +extern unsigned long long time_sync_thresh; + /* * Task state bitmask. NOTE! These bits are also * encoded in fs/proc/array.c: get_task_state(). -- cgit v1.1 From 3e51f33fcc7f55e6df25d15b55ed10c8b4da84cd Mon Sep 17 00:00:00 2001 From: Peter Zijlstra Date: Sat, 3 May 2008 18:29:28 +0200 Subject: sched: add optional support for CONFIG_HAVE_UNSTABLE_SCHED_CLOCK this replaces the rq->clock stuff (and possibly cpu_clock()). - architectures that have an 'imperfect' hardware clock can set CONFIG_HAVE_UNSTABLE_SCHED_CLOCK - the 'jiffie' window might be superfulous when we update tick_gtod before the __update_sched_clock() call in sched_clock_tick() - cpu_clock() might be implemented as: sched_clock_cpu(smp_processor_id()) if the accuracy proves good enough - how far can TSC drift in a single jiffie when considering the filtering and idle hooks? [ mingo@elte.hu: various fixes and cleanups ] Signed-off-by: Peter Zijlstra Signed-off-by: Ingo Molnar --- include/linux/sched.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 54c9ca2..0c35b03 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -1553,6 +1553,35 @@ static inline int set_cpus_allowed(struct task_struct *p, cpumask_t new_mask) extern unsigned long long sched_clock(void); +#ifndef CONFIG_HAVE_UNSTABLE_SCHED_CLOCK +static inline void sched_clock_init(void) +{ +} + +static inline u64 sched_clock_cpu(int cpu) +{ + return sched_clock(); +} + +static inline void sched_clock_tick(void) +{ +} + +static inline void sched_clock_idle_sleep_event(void) +{ +} + +static inline void sched_clock_idle_wakeup_event(u64 delta_ns) +{ +} +#else +extern void sched_clock_init(void); +extern u64 sched_clock_cpu(int cpu); +extern void sched_clock_tick(void); +extern void sched_clock_idle_sleep_event(void); +extern void sched_clock_idle_wakeup_event(u64 delta_ns); +#endif + /* * For kernel-internal use: high-speed (but slightly incorrect) per-cpu * clock constructed from sched_clock(): -- cgit v1.1 From 78ab88f04f44bed566d51dce0c7cbfeff6449a06 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 1 May 2008 23:41:41 +0900 Subject: libata: improve post-reset device ready test Some controllers (jmb and inic162x) use 0x77 and 0x7f to indicate that the device isn't ready yet. It looks like they use 0xff if device presence is detected but connection isn't established. 0x77 or 0x7f after connection is established and use the value from signature FIS after receiving it. This patch implements ata_check_ready(), which takes TF status value and determines whether the port is ready or not considering the above and other conditions, and use it in @check_ready() functions. This is safe as both 0x77 and 0x7f aren't valid ready status value even though they have BSY bit cleared. This fixes hot plug detection failures which can be triggered with certain drives if they aren't already spun up when the data connector is hot plugged. Tested on sil, sil24, ahci (jmb/ich), piix and inic162x combined with eight drives from all major vendors. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- include/linux/libata.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index d1dfe87..95e6159b 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -1381,6 +1381,21 @@ static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host) return *(struct ata_port **)&host->hostdata[0]; } +static inline int ata_check_ready(u8 status) +{ + /* Some controllers report 0x77 or 0x7f during intermediate + * not-ready stages. + */ + if (status == 0x77 || status == 0x7f) + return 0; + + /* 0xff indicates either no device or device not ready */ + if (status == 0xff) + return -ENODEV; + + return !(status & ATA_BUSY); +} + /************************************************************************** * PMP - drivers/ata/libata-pmp.c -- cgit v1.1 From a96df496ed1496f3e52a9b3c860cf967aa48adda Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Mon, 5 May 2008 16:53:19 +1000 Subject: [POWERPC] 4xx: Fix problem with new TLB storage attibute fields on 440x6 core The new 440x6 core used on AMCC 460EX/GT introduces new storage attibure fields to the TLB2 word. Those are: Bit 11 12 13 14 15 WL1 IL1I IL1D IL2I IL2D With these bits the cache (L1 and L2) can be configured in a more flexible way, instruction- and data-cache independently now. The "old" I and W bits are still available and setting these old bits will automically set these new bits too (for backward compatibilty). The current code does not clear these fields resulting in disabling the cache by chance. This patch now makes sure that these new bits are cleared when the TLB2 word is written. Signed-off-by: Stefan Roese Signed-off-by: Josh Boyer --- include/asm-powerpc/pgtable-ppc32.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index 7c97b5a..c08e714 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -209,6 +209,13 @@ extern int icache_44x_need_flush; * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR * + * Newer 440 cores (440x6 as used on AMCC 460EX/460GT) have additional + * TLB2 storage attibute fields. Those are: + * + * TLB2: + * 0...10 11 12 13 14 15 16...31 + * no change WL1 IL1I IL1D IL2I IL2D no change + * * There are some constrains and options, to decide mapping software bits * into TLB entry. * -- cgit v1.1 From 10acf3b0d3b46c6ef5d6f0722f72ad9b743ea848 Mon Sep 17 00:00:00 2001 From: Mark Lord Date: Fri, 2 May 2008 02:14:53 -0400 Subject: libata: export ata_eh_analyze_ncq_error Export ata_eh_analyze_ncq_error() for subsequent use by sata_mv, as suggested by Tejun. Signed-off-by: Mark Lord Signed-off-by: Jeff Garzik --- include/linux/libata.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index 95e6159b..7e206da 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -1039,6 +1039,7 @@ extern void ata_eh_thaw_port(struct ata_port *ap); extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); +extern void ata_eh_analyze_ncq_error(struct ata_link *link); extern void ata_do_eh(struct ata_port *ap, ata_prereset_fn_t prereset, ata_reset_fn_t softreset, ata_reset_fn_t hardreset, -- cgit v1.1 From 9b9a8bfc8dfbe09dc57f274e32e8b06151abbad7 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Fri, 2 May 2008 13:00:51 -0500 Subject: phylib: Fix some sparse warnings Declared some things static, declared some things in the header. Signed-off-by: Andy Fleming Signed-off-by: Jeff Garzik --- include/linux/phy.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/phy.h b/include/linux/phy.h index 02df20f..7224c40 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -412,6 +412,8 @@ int mdiobus_register(struct mii_bus *bus); void mdiobus_unregister(struct mii_bus *bus); void phy_sanitize_settings(struct phy_device *phydev); int phy_stop_interrupts(struct phy_device *phydev); +int phy_enable_interrupts(struct phy_device *phydev); +int phy_disable_interrupts(struct phy_device *phydev); static inline int phy_read_status(struct phy_device *phydev) { return phydev->drv->read_status(phydev); @@ -447,5 +449,8 @@ int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, int (*run)(struct phy_device *)); int phy_scan_fixups(struct phy_device *phydev); +int __init mdio_bus_init(void); +void mdio_bus_exit(void); + extern struct bus_type mdio_bus_type; #endif /* __PHY_H */ -- cgit v1.1 From 33dcdac2df54e66c447ae03f58c95c7251aa5649 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Tue, 29 Apr 2008 17:46:26 +0200 Subject: [PATCH] kill ->put_inode And with that last patch to affs killing the last put_inode instance we can finally, after many years of transition kill this racy and awkward interface. (It's kinda funny that even the description in Documentation/filesystems/vfs.txt was entirely wrong..) Also remove a very misleading comment above the defintion of struct super_operations. Signed-off-by: Christoph Hellwig Signed-off-by: Al Viro --- include/linux/fs.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index a1ba005..7e0fa9e 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1289,17 +1289,12 @@ extern ssize_t vfs_readv(struct file *, const struct iovec __user *, extern ssize_t vfs_writev(struct file *, const struct iovec __user *, unsigned long, loff_t *); -/* - * NOTE: write_inode, delete_inode, clear_inode, put_inode can be called - * without the big kernel lock held in all filesystems. - */ struct super_operations { struct inode *(*alloc_inode)(struct super_block *sb); void (*destroy_inode)(struct inode *); void (*dirty_inode) (struct inode *); int (*write_inode) (struct inode *, int); - void (*put_inode) (struct inode *); void (*drop_inode) (struct inode *); void (*delete_inode) (struct inode *); void (*put_super) (struct super_block *); -- cgit v1.1 From aeed5fce37196e09b4dac3a1c00d8b7122e040ce Mon Sep 17 00:00:00 2001 From: Hugh Dickins Date: Tue, 6 May 2008 20:49:23 +0100 Subject: x86: fix PAE pmd_bad bootup warning Fix warning from pmd_bad() at bootup on a HIGHMEM64G HIGHPTE x86_32. That came from 9fc34113f6880b215cbea4e7017fc818700384c2 x86: debug pmd_bad(); but we understand now that the typecasting was wrong for PAE in the previous version: pagetable pages above 4GB looked bad and stopped Arjan from booting. And revert that cded932b75ab0a5f9181ee3da34a0a488d1a14fd x86: fix pmd_bad and pud_bad to support huge pages. It was the wrong way round: we shouldn't weaken every pmd_bad and pud_bad check to let huge pages slip through - in part they check that we _don't_ have a huge page where it's not expected. Put the x86 pmd_bad() and pud_bad() definitions back to what they have long been: they can be improved (x86_32 should use PTE_MASK, to stop PAE thinking junk in the upper word is good; and x86_64 should follow x86_32's stricter comparison, to stop thinking any subset of required bits is good); but that should be a later patch. Fix Hans' good observation that follow_page() will never find pmd_huge() because that would have already failed the pmd_bad test: test pmd_huge in between the pmd_none and pmd_bad tests. Tighten x86's pmd_huge() check? No, once it's a hugepage entry, it can get quite far from a good pmd: for example, PROT_NONE leaves it with only ACCESSED of the KERN_PGTABLE bits. However... though follow_page() contains this and another test for huge pages, so it's nice to keep it working on them, where does it actually get called on a huge page? get_user_pages() checks is_vm_hugetlb_page(vma) to to call alternative hugetlb processing, as does unmap_vmas() and others. Signed-off-by: Hugh Dickins Earlier-version-tested-by: Ingo Molnar Cc: Thomas Gleixner Cc: Jeff Chua Cc: Hans Rosenfeld Cc: Arjan van de Ven Signed-off-by: Linus Torvalds --- include/asm-x86/pgtable_32.h | 9 +-------- include/asm-x86/pgtable_64.h | 6 ++---- 2 files changed, 3 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/asm-x86/pgtable_32.h b/include/asm-x86/pgtable_32.h index 577ab79..d7f0403 100644 --- a/include/asm-x86/pgtable_32.h +++ b/include/asm-x86/pgtable_32.h @@ -88,14 +88,7 @@ extern unsigned long pg0[]; /* To avoid harmful races, pmd_none(x) should check only the lower when PAE */ #define pmd_none(x) (!(unsigned long)pmd_val((x))) #define pmd_present(x) (pmd_val((x)) & _PAGE_PRESENT) - -extern int pmd_bad(pmd_t pmd); - -#define pmd_bad_v1(x) \ - (_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER))) -#define pmd_bad_v2(x) \ - (_KERNPG_TABLE != (pmd_val((x)) & ~(PAGE_MASK | _PAGE_USER | \ - _PAGE_PSE | _PAGE_NX))) +#define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) #define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT)) diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h index a3bbf87..efe83dc 100644 --- a/include/asm-x86/pgtable_64.h +++ b/include/asm-x86/pgtable_64.h @@ -158,14 +158,12 @@ static inline unsigned long pgd_bad(pgd_t pgd) static inline unsigned long pud_bad(pud_t pud) { - return pud_val(pud) & - ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER | _PAGE_PSE | _PAGE_NX); + return pud_val(pud) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); } static inline unsigned long pmd_bad(pmd_t pmd) { - return pmd_val(pmd) & - ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER | _PAGE_PSE | _PAGE_NX); + return pmd_val(pmd) & ~(PTE_MASK | _KERNPG_TABLE | _PAGE_USER); } #define pte_none(x) (!pte_val((x))) -- cgit v1.1 From c2f9527979c14a21bbaa31c12a14204aabeb6e45 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Wed, 7 May 2008 11:41:26 +0800 Subject: [Blackfin] arch: Equalize include files: Add VR_CTL masks Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf533/defBF532.h | 2 ++ include/asm-blackfin/mach-bf548/defBF54x_base.h | 20 ++++++++++++++++++ include/asm-blackfin/mach-bf561/defBF561.h | 28 +++++++++++++++++++++++++ 3 files changed, 50 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf533/defBF532.h b/include/asm-blackfin/mach-bf533/defBF532.h index 17e1548..0ab4dd7 100644 --- a/include/asm-blackfin/mach-bf533/defBF532.h +++ b/include/asm-blackfin/mach-bf533/defBF532.h @@ -468,6 +468,8 @@ #define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ #define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ #define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ +#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */ +#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */ #define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ #define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h index 08f90c2..e022e89 100644 --- a/include/asm-blackfin/mach-bf548/defBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h @@ -2329,6 +2329,26 @@ #define KPADWE 0x1000 /* Keypad Wake-Up Enable */ #define ROTWE 0x2000 /* Rotary Wake-Up Enable */ +#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */ +#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */ +#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */ + +#define GAIN_5 0x0000 /* GAIN = 5*/ +#define GAIN_10 0x0004 /* GAIN = 1*/ +#define GAIN_20 0x0008 /* GAIN = 2*/ +#define GAIN_50 0x000C /* GAIN = 5*/ + +#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ +#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ +#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ +#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ +#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */ +#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ +#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ +#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ +#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */ +#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */ + /* Bit masks for NFC_CTL */ #define WR_DLY 0xf /* Write Strobe Delay */ diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h index 366c9b9..1ab50e9 100644 --- a/include/asm-blackfin/mach-bf561/defBF561.h +++ b/include/asm-blackfin/mach-bf561/defBF561.h @@ -868,6 +868,34 @@ #define CHIPID_FAMILY 0x0FFFF000 #define CHIPID_MANUFACTURE 0x00000FFE +/* VR_CTL Masks */ +#define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */ +#define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */ +#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */ +#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */ +#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */ + +#define GAIN 0x000C /* Voltage Level Gain */ +#define GAIN_5 0x0000 /* GAIN = 5*/ +#define GAIN_10 0x0004 /* GAIN = 1*/ +#define GAIN_20 0x0008 /* GAIN = 2*/ +#define GAIN_50 0x000C /* GAIN = 5*/ + +#define VLEV 0x00F0 /* Internal Voltage Level */ +#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ +#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ +#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ +#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ +#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */ +#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ +#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ +#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ +#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */ +#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */ + +#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ +#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ + /* PLL_DIV Masks */ #define SCLK_DIV(x) (x) /* SCLK = VCO / x */ -- cgit v1.1 From 14b03204c8060d036b04cbb18bbd6f6f311f4fed Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Wed, 7 May 2008 11:41:26 +0800 Subject: [Blackfin] arch: Functional power management support: Add CPU and platform voltage scaling support Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/dpmc.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-blackfin/dpmc.h b/include/asm-blackfin/dpmc.h index 686cf83..7f34cd3 100644 --- a/include/asm-blackfin/dpmc.h +++ b/include/asm-blackfin/dpmc.h @@ -1,7 +1,7 @@ /* * include/asm-blackfin/dpmc.h - Miscellaneous IOCTL commands for Dynamic Power * Management Controller Driver. - * Copyright (C) 2004 Analog Device Inc. + * Copyright (C) 2004-2008 Analog Device Inc. * */ #ifndef _BLACKFIN_DPMC_H_ @@ -65,6 +65,14 @@ void disable_wdog_timer(void); extern unsigned long get_cclk(void); extern unsigned long get_sclk(void); +struct bfin_dpmc_platform_data { + const unsigned int *tuple_tab; + unsigned short tabsize; + unsigned short vr_settling_time; /* in us */ +}; + +#define VRPAIR(vlev, freq) (((vlev) << 16) | ((freq) >> 16)) + #endif /* __KERNEL__ */ #endif /*_BLACKFIN_DPMC_H_*/ -- cgit v1.1 From 1bfb4b21c7c39295f5535c139f796df1d51ec009 Mon Sep 17 00:00:00 2001 From: Vitja Makarov Date: Wed, 7 May 2008 11:41:26 +0800 Subject: [Blackfin] arch: Support for CPU_FREQ and NOHZ Singed-off-by: Vitja Makarov --- include/asm-blackfin/time.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/time.h b/include/asm-blackfin/time.h index 6e5859b..ddc43ce 100644 --- a/include/asm-blackfin/time.h +++ b/include/asm-blackfin/time.h @@ -24,6 +24,8 @@ #ifndef CONFIG_CPU_FREQ #define TIME_SCALE 1 +#define __bfin_cycles_off (0) +#define __bfin_cycles_mod (0) #else /* * Blackfin CPU frequency scaling supports max Core Clock 1, 1/2 and 1/4 . @@ -31,6 +33,8 @@ * adjust the Core Timer Presale Register. This way we don't lose time. */ #define TIME_SCALE 4 +extern unsigned long long __bfin_cycles_off; +extern unsigned int __bfin_cycles_mod; #endif #endif -- cgit v1.1 From 0893f1250f87e0a832f47bb60fb69ed0d52be7a3 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Wed, 7 May 2008 11:41:26 +0800 Subject: [Blackfin] arch: fix gdb testing regression When transferring to IRQ5 from an exception, save SYSCFG in memory across the transfer and clear the trace bit. When we get a single step exception, check whether we can safely clear the trace bit in SYSCFG. We can (and should) clear it after the first instruction of the interrupt handler; the first insn saves SYSCFG to the stack in all handlers. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- include/asm-blackfin/entry.h | 5 +++++ include/asm-blackfin/mach-common/context.S | 5 +++++ 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/entry.h b/include/asm-blackfin/entry.h index 562c6d3..c4f721e 100644 --- a/include/asm-blackfin/entry.h +++ b/include/asm-blackfin/entry.h @@ -17,6 +17,11 @@ #define PF_DTRACE_OFF 1 #define PF_DTRACE_BIT 5 +/* + * NOTE! The single-stepping code assumes that all interrupt handlers + * start by saving SYSCFG on the stack with their first instruction. + */ + /* This one is used for exceptions, emulation, and NMI. It doesn't push RETI and doesn't do cli. */ #define SAVE_ALL_SYS save_context_no_interrupts diff --git a/include/asm-blackfin/mach-common/context.S b/include/asm-blackfin/mach-common/context.S index fd0ebe1..c0e630e 100644 --- a/include/asm-blackfin/mach-common/context.S +++ b/include/asm-blackfin/mach-common/context.S @@ -28,6 +28,11 @@ */ /* + * NOTE! The single-stepping code assumes that all interrupt handlers + * start by saving SYSCFG on the stack with their first instruction. + */ + +/* * Code to save processor context. * We even save the register which are preserved by a function call * - r4, r5, r6, r7, p3, p4, p5 -- cgit v1.1 From 56f87713022a6bdf00b0a50d086fdaddb54e8e5c Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Sat, 10 May 2008 00:11:59 +0800 Subject: [Blackfin] arch: remove useless IRQ_SW_INT defines IRQ_SW_INT1 and IRQ_SW_INT2 obsolete: Remove useless defines Fix SYS_IRQS Keep numbering scheme, so we don't break existing configurations. Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf533/irq.h | 14 ++++++-------- include/asm-blackfin/mach-bf537/irq.h | 35 ++++++++++++++++------------------- include/asm-blackfin/mach-bf561/irq.h | 13 ++++++------- 3 files changed, 28 insertions(+), 34 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf533/irq.h b/include/asm-blackfin/mach-bf533/irq.h index 832e6f6..5aa38e5 100644 --- a/include/asm-blackfin/mach-bf533/irq.h +++ b/include/asm-blackfin/mach-bf533/irq.h @@ -66,12 +66,13 @@ Core Emulation ** DMA8/9 Interrupt IVG13 28 DMA10/11 Interrupt IVG13 29 Watchdog Timer IVG13 30 - Software Interrupt 1 IVG14 31 - Software Interrupt 2 -- + + Softirq IVG14 31 + System Call -- (lowest priority) IVG15 32 * */ -#define SYS_IRQS 32 -#define NR_PERI_INTS 24 +#define SYS_IRQS 31 +#define NR_PERI_INTS 24 /* The ABSTRACT IRQ definitions */ /** the first seven of the following are fixed, the rest you change if you need to **/ @@ -96,7 +97,7 @@ Core Emulation ** #define IRQ_SPORT0_TX 17 /*DMA2 Interrupt (SPORT0 TX) */ #define IRQ_SPORT1_RX 18 /*DMA3 Interrupt (SPORT1 RX) */ #define IRQ_SPORT1_TX 19 /*DMA4 Interrupt (SPORT1 TX) */ -#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ +#define IRQ_SPI 20 /*DMA5 Interrupt (SPI) */ #define IRQ_UART_RX 21 /*DMA6 Interrupt (UART RX) */ #define IRQ_UART_TX 22 /*DMA7 Interrupt (UART TX) */ #define IRQ_TMR0 23 /*Timer 0 */ @@ -108,9 +109,6 @@ Core Emulation ** #define IRQ_MEM_DMA1 29 /*DMA10/11 Interrupt (Memory DMA Stream 1) */ #define IRQ_WATCH 30 /*Watch Dog Timer */ -#define IRQ_SW_INT1 31 /*Software Int 1 */ -#define IRQ_SW_INT2 32 /*Software Int 2 (reserved for SYSCALL) */ - #define IRQ_PF0 33 #define IRQ_PF1 34 #define IRQ_PF2 35 diff --git a/include/asm-blackfin/mach-bf537/irq.h b/include/asm-blackfin/mach-bf537/irq.h index be6f2ff..2e68a8a 100644 --- a/include/asm-blackfin/mach-bf537/irq.h +++ b/include/asm-blackfin/mach-bf537/irq.h @@ -34,24 +34,23 @@ /* * Interrupt source definitions - Event Source Core Event Name -Core Emulation ** - Events (highest priority) EMU 0 - Reset RST 1 - NMI NMI 2 - Exception EVX 3 - Reserved -- 4 - Hardware Error IVHW 5 - Core Timer IVTMR 6 * - -..... - - Software Interrupt 1 IVG14 31 - Software Interrupt 2 -- - (lowest priority) IVG15 32 * + * Event Source Core Event Name + * Core Emulation ** + * Events (highest priority) EMU 0 + * Reset RST 1 + * NMI NMI 2 + * Exception EVX 3 + * Reserved -- 4 + * Hardware Error IVHW 5 + * Core Timer IVTMR 6 + * ..... + * + * Softirq IVG14 + * System Call -- + * (lowest priority) IVG15 */ -#define SYS_IRQS 41 +#define SYS_IRQS 39 #define NR_PERI_INTS 32 /* The ABSTRACT IRQ definitions */ @@ -95,10 +94,8 @@ Core Emulation ** #define IRQ_PORTG_INTB 35 /* PF Port G (PF15:0) Interrupt B */ #define IRQ_MEM_DMA0 36 /*(Memory DMA Stream 0) */ #define IRQ_MEM_DMA1 37 /*(Memory DMA Stream 1) */ -#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ +#define IRQ_PROG_INTB 38 /* PF Ports F (PF15:0) Interrupt B */ #define IRQ_WATCH 38 /*Watch Dog Timer */ -#define IRQ_SW_INT1 40 /*Software Int 1 */ -#define IRQ_SW_INT2 41 /*Software Int 2 (reserved for SYSCALL) */ #define IRQ_PPI_ERROR 42 /*PPI Error Interrupt */ #define IRQ_CAN_ERROR 43 /*CAN Error Interrupt */ diff --git a/include/asm-blackfin/mach-bf561/irq.h b/include/asm-blackfin/mach-bf561/irq.h index 83f0383..6698389 100644 --- a/include/asm-blackfin/mach-bf561/irq.h +++ b/include/asm-blackfin/mach-bf561/irq.h @@ -118,12 +118,13 @@ Supplemental interrupt 0 IVG7 69 supplemental interrupt 1 IVG7 70 - Software Interrupt 1 IVG14 71 - Software Interrupt 2 IVG15 72 * - (lowest priority) + Softirq IVG14 + System Call -- + (lowest priority) IVG15 + **********************************************************************/ -#define SYS_IRQS 72 +#define SYS_IRQS 71 #define NR_PERI_INTS 64 /* @@ -237,9 +238,7 @@ #define IRQ_RESERVED_2 (IVG_BASE + 61) /* Reserved interrupt */ #define IRQ_SUPPLE_0 (IVG_BASE + 62) /* Supplemental interrupt 0 */ #define IRQ_SUPPLE_1 (IVG_BASE + 63) /* supplemental interrupt 1 */ -#define IRQ_SW_INT1 71 /* Software Interrupt 1 */ -#define IRQ_SW_INT2 72 /* Software Interrupt 2 */ - /* reserved for SYSCALL */ + #define IRQ_PF0 73 #define IRQ_PF1 74 #define IRQ_PF2 75 -- cgit v1.1 From 89bf6dc51ac7adb5a7d443648d9eb76909a1df8e Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 7 May 2008 11:41:26 +0800 Subject: Blackfin Serial Driver: macro away the IER differences between processors Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf527/bfin_serial_5xx.h | 2 ++ include/asm-blackfin/mach-bf533/bfin_serial_5xx.h | 2 ++ include/asm-blackfin/mach-bf537/bfin_serial_5xx.h | 2 ++ include/asm-blackfin/mach-bf561/bfin_serial_5xx.h | 2 ++ 4 files changed, 8 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h index f0ab273..1bbfc2d 100644 --- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h @@ -44,6 +44,8 @@ #define UART_PUT_CHAR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_THR), v) #define UART_PUT_DLL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLL), v) #define UART_PUT_IER(uart, v) bfin_write16(((uart)->port.membase + OFFSET_IER), v) +#define UART_SET_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) +#define UART_CLEAR_IER(uart, v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) #define UART_PUT_DLH(uart, v) bfin_write16(((uart)->port.membase + OFFSET_DLH), v) #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h index fbe88de..d22f052 100644 --- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h @@ -44,6 +44,8 @@ #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) +#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) +#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h index fd100a4..ae2362c 100644 --- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h @@ -44,6 +44,8 @@ #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) +#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) +#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h index 8a4e66d..c209f0d 100644 --- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h @@ -44,6 +44,8 @@ #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) +#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) +#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) -- cgit v1.1 From 45828b812ddb608ddf83eff11601f62b726d13ab Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 7 May 2008 11:41:26 +0800 Subject: Blackfin Serial Driver: abstract away DLAB differences into header Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf527/bfin_serial_5xx.h | 3 +++ include/asm-blackfin/mach-bf533/bfin_serial_5xx.h | 3 +++ include/asm-blackfin/mach-bf537/bfin_serial_5xx.h | 3 +++ include/asm-blackfin/mach-bf548/bfin_serial_5xx.h | 3 +++ include/asm-blackfin/mach-bf561/bfin_serial_5xx.h | 3 +++ 5 files changed, 15 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h index 1bbfc2d..26e3c80 100644 --- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h @@ -50,6 +50,9 @@ #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v) #define UART_PUT_GCTL(uart, v) bfin_write16(((uart)->port.membase + OFFSET_GCTL), v) +#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) +#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) + #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h index d22f052..d016603 100644 --- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h @@ -50,6 +50,9 @@ #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) +#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) +#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) + #ifdef CONFIG_BFIN_UART0_CTSRTS # define CONFIG_SERIAL_BFIN_CTSRTS # ifndef CONFIG_UART0_CTS_PIN diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h index ae2362c..f79d1a0 100644 --- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h @@ -50,6 +50,9 @@ #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) +#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) +#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) + #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h index 6547027..5eb46a7 100644 --- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h @@ -54,6 +54,9 @@ #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) #define UART_PUT_MCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_MCR),v) +#define UART_SET_DLAB(uart) /* MMRs not muxed on BF54x */ +#define UART_CLEAR_DLAB(uart) /* MMRs not muxed on BF54x */ + #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h index c209f0d..7a96287 100644 --- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h @@ -50,6 +50,9 @@ #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) +#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) +#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) + #ifdef CONFIG_BFIN_UART0_CTSRTS # define CONFIG_SERIAL_BFIN_CTSRTS # ifndef CONFIG_UART0_CTS_PIN -- cgit v1.1 From 0eaeafa10f3b2bd027e95859a6785d4c7fcc174c Mon Sep 17 00:00:00 2001 From: Christian Borntraeger Date: Wed, 7 May 2008 09:22:53 +0200 Subject: [S390] s390-kvm: leave sie context on work. Removes preemption requirement From: Martin Schwidefsky This patch fixes a bug with cpu bound guest on kvm-s390. Sometimes it was impossible to deliver a signal to a spinning guest. We used preemption as a circumvention. The preemption notifiers called vcpu_load, which checked for pending signals and triggered a host intercept. But even with preemption, a sigkill was not delivered immediately. This patch changes the low level host interrupt handler to check for the SIE instruction, if TIF_WORK is set. In that case we change the instruction pointer of the return PSW to rerun the vcpu_run loop. The kvm code sees an intercept reason 0 if that happens. This patch adds accounting for these types of intercept as well. The advantages: - works with and without preemption - signals are delivered immediately - much better host latencies without preemption Acked-by: Carsten Otte Signed-off-by: Christian Borntraeger Signed-off-by: Martin Schwidefsky --- include/asm-s390/kvm_host.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-s390/kvm_host.h b/include/asm-s390/kvm_host.h index f8204a4..18cbd8a 100644 --- a/include/asm-s390/kvm_host.h +++ b/include/asm-s390/kvm_host.h @@ -104,6 +104,7 @@ struct sie_block { struct kvm_vcpu_stat { u32 exit_userspace; + u32 exit_null; u32 exit_external_request; u32 exit_external_interrupt; u32 exit_stop_request; -- cgit v1.1 From b499d76bfd78e900039155247e1c21bfdf807b7b Mon Sep 17 00:00:00 2001 From: Roland McGrath Date: Wed, 7 May 2008 09:22:57 +0200 Subject: [S390] compat ptrace cleanup This removes redundant arch code for generic ptrace requests already handled by ptrace_request and compat_ptrace_request. It simplifies things to just have the standard entry points, and use the generic compat_sys_ptrace. Signed-off-by: Roland McGrath Signed-off-by: Martin Schwidefsky --- include/asm-s390/ptrace.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-s390/ptrace.h b/include/asm-s390/ptrace.h index 441d7c2..d7d4e2e 100644 --- a/include/asm-s390/ptrace.h +++ b/include/asm-s390/ptrace.h @@ -471,6 +471,8 @@ struct task_struct; extern void user_enable_single_step(struct task_struct *); extern void user_disable_single_step(struct task_struct *); +#define __ARCH_WANT_COMPAT_SYS_PTRACE + #define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0) #define instruction_pointer(regs) ((regs)->psw.addr & PSW_ADDR_INSN) #define regs_return_value(regs)((regs)->gprs[2]) -- cgit v1.1 From 45e576b1c3d0020607b8666c0247164e92c7d719 Mon Sep 17 00:00:00 2001 From: Martin Schwidefsky Date: Wed, 7 May 2008 09:22:59 +0200 Subject: [S390] guest page hinting light Use the existing arch_alloc_page/arch_free_page callbacks to do the guest page state transitions between stable and unused. Acked-by: Rik van Riel Signed-off-by: Martin Schwidefsky --- include/asm-s390/page.h | 11 +++++++++++ include/asm-s390/system.h | 6 ++++++ 2 files changed, 17 insertions(+) (limited to 'include') diff --git a/include/asm-s390/page.h b/include/asm-s390/page.h index f0f4579..12fd9c4 100644 --- a/include/asm-s390/page.h +++ b/include/asm-s390/page.h @@ -125,6 +125,17 @@ page_get_storage_key(unsigned long addr) return skey; } +#ifdef CONFIG_PAGE_STATES + +struct page; +void arch_free_page(struct page *page, int order); +void arch_alloc_page(struct page *page, int order); + +#define HAVE_ARCH_FREE_PAGE +#define HAVE_ARCH_ALLOC_PAGE + +#endif + #endif /* !__ASSEMBLY__ */ /* to align the pointer to the (next) page boundary */ diff --git a/include/asm-s390/system.h b/include/asm-s390/system.h index c819ae2..e0d4500 100644 --- a/include/asm-s390/system.h +++ b/include/asm-s390/system.h @@ -116,6 +116,12 @@ extern void pfault_fini(void); #define pfault_fini() do { } while (0) #endif /* CONFIG_PFAULT */ +#ifdef CONFIG_PAGE_STATES +extern void cmma_init(void); +#else +static inline void cmma_init(void) { } +#endif + #define finish_arch_switch(prev) do { \ set_fs(current->thread.mm_segment); \ account_vtime(prev); \ -- cgit v1.1 From 7f3d4ee108c184ab215036051087aaaaa8de7661 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Wed, 7 May 2008 09:22:39 +0200 Subject: vfs: splice remove_suid() cleanup generic_file_splice_write() duplicates remove_suid() just because it doesn't hold i_mutex. But it grabs i_mutex inside splice_from_pipe() anyway, so this is rather pointless. Move locking to generic_file_splice_write() and call remove_suid() and __splice_from_pipe() instead. Signed-off-by: Miklos Szeredi Signed-off-by: Jens Axboe --- include/linux/fs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/fs.h b/include/linux/fs.h index 7e0fa9e..f413085 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h @@ -1816,7 +1816,6 @@ extern void iget_failed(struct inode *); extern void clear_inode(struct inode *); extern void destroy_inode(struct inode *); extern struct inode *new_inode(struct super_block *); -extern int __remove_suid(struct dentry *, int); extern int should_remove_suid(struct dentry *); extern int remove_suid(struct dentry *); -- cgit v1.1 From 221e583a735fc5d879d83c2a76b8ee5afcbdf146 Mon Sep 17 00:00:00 2001 From: Rasmus Rohde Date: Wed, 30 Apr 2008 17:22:06 +0200 Subject: udf: Make udf exportable Cc: Christoph Hellwig Signed-off-by: Rasmus Rohde Signed-off-by: Jan Kara --- include/linux/exportfs.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'include') diff --git a/include/linux/exportfs.h b/include/linux/exportfs.h index de8387b..f5abd13 100644 --- a/include/linux/exportfs.h +++ b/include/linux/exportfs.h @@ -33,6 +33,19 @@ enum fid_type { * 32 bit parent directory inode number. */ FILEID_INO32_GEN_PARENT = 2, + + /* + * 32 bit block number, 16 bit partition reference, + * 16 bit unused, 32 bit generation number. + */ + FILEID_UDF_WITHOUT_PARENT = 0x51, + + /* + * 32 bit block number, 16 bit partition reference, + * 16 bit unused, 32 bit generation number, + * 32 bit parent block number, 32 bit parent generation number + */ + FILEID_UDF_WITH_PARENT = 0x52, }; struct fid { @@ -43,6 +56,14 @@ struct fid { u32 parent_ino; u32 parent_gen; } i32; + struct { + u32 block; + u16 partref; + u16 parent_partref; + u32 generation; + u32 parent_block; + u32 parent_generation; + } udf; __u32 raw[0]; }; }; -- cgit v1.1 From 6d63c275572d1e6f00d4fa154f16fbb0d8c2d2bf Mon Sep 17 00:00:00 2001 From: Jens Axboe Date: Wed, 7 May 2008 09:51:23 +0200 Subject: cfq-iosched: make io priorities inherit CPU scheduling class as well as nice We currently set all processes to the best-effort scheduling class, regardless of what CPU scheduling class they belong to. Improve that so that we correctly track idle and rt scheduling classes as well. Signed-off-by: Jens Axboe --- include/linux/ioprio.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/linux/ioprio.h b/include/linux/ioprio.h index 2a3bb1b..f98a656 100644 --- a/include/linux/ioprio.h +++ b/include/linux/ioprio.h @@ -68,6 +68,20 @@ static inline int task_nice_ioprio(struct task_struct *task) } /* + * This is for the case where the task hasn't asked for a specific IO class. + * Check for idle and rt task process, and return appropriate IO class. + */ +static inline int task_nice_ioclass(struct task_struct *task) +{ + if (task->policy == SCHED_IDLE) + return IOPRIO_CLASS_IDLE; + else if (task->policy == SCHED_FIFO || task->policy == SCHED_RR) + return IOPRIO_CLASS_RT; + else + return IOPRIO_CLASS_BE; +} + +/* * For inheritance, return the highest of the two given priorities */ extern int ioprio_best(unsigned short aprio, unsigned short bprio); -- cgit v1.1 From 28f13702f03e527fcb979747a882cf366c489c50 Mon Sep 17 00:00:00 2001 From: Jens Axboe Date: Wed, 7 May 2008 10:15:46 +0200 Subject: block: avoid duplicate calls to get_part() in disk stat code get_part() is fairly expensive, as it O(N) loops over partitions to find the right one. In lots of normal IO paths we end up looking up the partition twice, to make matters even worse. Change the stat add code to accept a passed in partition instead. Signed-off-by: Jens Axboe --- include/linux/genhd.h | 35 ++++++++++++++++++----------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/linux/genhd.h b/include/linux/genhd.h index ecd2bf6..e9874e7 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -178,17 +178,17 @@ static inline struct hd_struct *get_part(struct gendisk *gendiskp, static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) { int i; + for_each_possible_cpu(i) memset(per_cpu_ptr(gendiskp->dkstats, i), value, - sizeof (struct disk_stats)); + sizeof(struct disk_stats)); } #define __part_stat_add(part, field, addnd) \ (per_cpu_ptr(part->dkstats, smp_processor_id())->field += addnd) -#define __all_stat_add(gendiskp, field, addnd, sector) \ +#define __all_stat_add(gendiskp, part, field, addnd, sector) \ ({ \ - struct hd_struct *part = get_part(gendiskp, sector); \ if (part) \ __part_stat_add(part, field, addnd); \ __disk_stat_add(gendiskp, field, addnd); \ @@ -203,11 +203,13 @@ static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) { res; \ }) -static inline void part_stat_set_all(struct hd_struct *part, int value) { +static inline void part_stat_set_all(struct hd_struct *part, int value) +{ int i; + for_each_possible_cpu(i) memset(per_cpu_ptr(part->dkstats, i), value, - sizeof(struct disk_stats)); + sizeof(struct disk_stats)); } #else /* !CONFIG_SMP */ @@ -223,9 +225,8 @@ static inline void disk_stat_set_all(struct gendisk *gendiskp, int value) #define __part_stat_add(part, field, addnd) \ (part->dkstats.field += addnd) -#define __all_stat_add(gendiskp, field, addnd, sector) \ +#define __all_stat_add(gendiskp, part, field, addnd, sector) \ ({ \ - struct hd_struct *part = get_part(gendiskp, sector); \ if (part) \ part->dkstats.field += addnd; \ __disk_stat_add(gendiskp, field, addnd); \ @@ -276,10 +277,10 @@ static inline void part_stat_set_all(struct hd_struct *part, int value) #define part_stat_sub(gendiskp, field, subnd) \ part_stat_add(gendiskp, field, -subnd) -#define all_stat_add(gendiskp, field, addnd, sector) \ +#define all_stat_add(gendiskp, part, field, addnd, sector) \ do { \ preempt_disable(); \ - __all_stat_add(gendiskp, field, addnd, sector); \ + __all_stat_add(gendiskp, part, field, addnd, sector); \ preempt_enable(); \ } while (0) @@ -288,15 +289,15 @@ static inline void part_stat_set_all(struct hd_struct *part, int value) #define all_stat_dec(gendiskp, field, sector) \ all_stat_add(gendiskp, field, -1, sector) -#define __all_stat_inc(gendiskp, field, sector) \ - __all_stat_add(gendiskp, field, 1, sector) -#define all_stat_inc(gendiskp, field, sector) \ - all_stat_add(gendiskp, field, 1, sector) +#define __all_stat_inc(gendiskp, part, field, sector) \ + __all_stat_add(gendiskp, part, field, 1, sector) +#define all_stat_inc(gendiskp, part, field, sector) \ + all_stat_add(gendiskp, part, field, 1, sector) -#define __all_stat_sub(gendiskp, field, subnd, sector) \ - __all_stat_add(gendiskp, field, -subnd, sector) -#define all_stat_sub(gendiskp, field, subnd, sector) \ - all_stat_add(gendiskp, field, -subnd, sector) +#define __all_stat_sub(gendiskp, part, field, subnd, sector) \ + __all_stat_add(gendiskp, part, field, -subnd, sector) +#define all_stat_sub(gendiskp, part, field, subnd, sector) \ + all_stat_add(gendiskp, part, field, -subnd, sector) /* Inlines to alloc and free disk stats in struct gendisk */ #ifdef CONFIG_SMP -- cgit v1.1 From ccd805874198c248498b5f269656ec14397eeede Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 25 Apr 2008 12:58:40 +0900 Subject: sh64: Fixup the nommu build. Signed-off-by: Paul Mundt --- include/asm-sh/io.h | 12 +++++++----- include/asm-sh/mmu_context.h | 4 +++- include/asm-sh/tlb_64.h | 10 +++++++++- include/asm-sh/uaccess_64.h | 2 ++ 4 files changed, 21 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h index 356e50d..a4fbf0c 100644 --- a/include/asm-sh/io.h +++ b/include/asm-sh/io.h @@ -268,11 +268,6 @@ unsigned long long peek_real_address_q(unsigned long long addr); unsigned long long poke_real_address_q(unsigned long long addr, unsigned long long val); -/* arch/sh/mm/ioremap_64.c */ -unsigned long onchip_remap(unsigned long addr, unsigned long size, - const char *name); -extern void onchip_unmap(unsigned long vaddr); - #if !defined(CONFIG_MMU) #define virt_to_phys(address) ((unsigned long)(address)) #define phys_to_virt(address) ((void *)(address)) @@ -302,9 +297,16 @@ extern void onchip_unmap(unsigned long vaddr); void __iomem *__ioremap(unsigned long offset, unsigned long size, unsigned long flags); void __iounmap(void __iomem *addr); + +/* arch/sh/mm/ioremap_64.c */ +unsigned long onchip_remap(unsigned long addr, unsigned long size, + const char *name); +extern void onchip_unmap(unsigned long vaddr); #else #define __ioremap(offset, size, flags) ((void __iomem *)(offset)) #define __iounmap(addr) do { } while (0) +#define onchip_remap(addr, size, name) (addr) +#define onchip_unmap(addr) do { } while (0) #endif /* CONFIG_MMU */ static inline void __iomem * diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h index fe58d00..87e812f 100644 --- a/include/asm-sh/mmu_context.h +++ b/include/asm-sh/mmu_context.h @@ -27,6 +27,7 @@ /* ASID is 8-bit value, so it can't be 0x100 */ #define MMU_NO_ASID 0x100 +#ifdef CONFIG_MMU #define asid_cache(cpu) (cpu_data[cpu].asid_cache) #define cpu_context(cpu, mm) ((mm)->context.id[cpu]) @@ -38,7 +39,6 @@ */ #define MMU_VPN_MASK 0xfffff000 -#ifdef CONFIG_MMU #if defined(CONFIG_SUPERH32) #include "mmu_context_32.h" #else @@ -129,6 +129,8 @@ static inline void switch_mm(struct mm_struct *prev, #define destroy_context(mm) do { } while (0) #define set_asid(asid) do { } while (0) #define get_asid() (0) +#define cpu_asid(cpu, mm) ({ (void)cpu; 0; }) +#define switch_and_save_asid(asid) (0) #define set_TTB(pgd) do { } while (0) #define get_TTB() (0) #define activate_context(mm,cpu) do { } while (0) diff --git a/include/asm-sh/tlb_64.h b/include/asm-sh/tlb_64.h index 0308e05..0a96f3a 100644 --- a/include/asm-sh/tlb_64.h +++ b/include/asm-sh/tlb_64.h @@ -56,6 +56,7 @@ static inline void __flush_tlb_slot(unsigned long long slot) __asm__ __volatile__ ("putcfg %0, 0, r63\n" : : "r" (slot)); } +#ifdef CONFIG_MMU /* arch/sh64/mm/tlb.c */ int sh64_tlb_init(void); unsigned long long sh64_next_free_dtlb_entry(void); @@ -64,6 +65,13 @@ int sh64_put_wired_dtlb_entry(unsigned long long entry); void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr); void sh64_teardown_tlb_slot(unsigned long long config_addr); - +#else +#define sh64_tlb_init() do { } while (0) +#define sh64_next_free_dtlb_entry() (0) +#define sh64_get_wired_dtlb_entry() (0) +#define sh64_put_wired_dtlb_entry(entry) do { } while (0) +#define sh64_setup_tlb_slot(conf, virt, asid, phys) do { } while (0) +#define sh64_teardown_tlb_slot(addr) do { } while (0) +#endif /* CONFIG_MMU */ #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_TLB_64_H */ diff --git a/include/asm-sh/uaccess_64.h b/include/asm-sh/uaccess_64.h index f956b7b..a9b68d0 100644 --- a/include/asm-sh/uaccess_64.h +++ b/include/asm-sh/uaccess_64.h @@ -274,7 +274,9 @@ struct exception_table_entry unsigned long insn, fixup; }; +#ifdef CONFIG_MMU #define ARCH_HAS_SEARCH_EXTABLE +#endif /* Returns 0 if exception not found and fixup.unit otherwise. */ extern unsigned long search_exception_table(unsigned long addr); -- cgit v1.1 From f5f826c685464301e4316a9321eb95801c653158 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Mon, 31 Mar 2008 01:40:17 +0300 Subject: sh: remove the broken SH_MPC1211 support SH_MPC1211 has been marked as BROKEN for some time. Unless someone is working on reviving it now, I'd therefore suggest this patch to remove it. Signed-off-by: Adrian Bunk Signed-off-by: Paul Mundt --- include/asm-sh/keyboard.h | 13 -- include/asm-sh/mpc1211/dma.h | 303 ----------------------------------- include/asm-sh/mpc1211/io.h | 22 --- include/asm-sh/mpc1211/keyboard.h | 60 ------- include/asm-sh/mpc1211/m1543c.h | 200 ----------------------- include/asm-sh/mpc1211/mc146818rtc.h | 6 - include/asm-sh/mpc1211/mpc1211.h | 18 --- include/asm-sh/mpc1211/pci.h | 38 ----- 8 files changed, 660 deletions(-) delete mode 100644 include/asm-sh/keyboard.h delete mode 100644 include/asm-sh/mpc1211/dma.h delete mode 100644 include/asm-sh/mpc1211/io.h delete mode 100644 include/asm-sh/mpc1211/keyboard.h delete mode 100644 include/asm-sh/mpc1211/m1543c.h delete mode 100644 include/asm-sh/mpc1211/mc146818rtc.h delete mode 100644 include/asm-sh/mpc1211/mpc1211.h delete mode 100644 include/asm-sh/mpc1211/pci.h (limited to 'include') diff --git a/include/asm-sh/keyboard.h b/include/asm-sh/keyboard.h deleted file mode 100644 index 31dcc4f..0000000 --- a/include/asm-sh/keyboard.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __ASM_SH_KEYBOARD_H -#define __ASM_SH_KEYBOARD_H -/* - * $Id: keyboard.h,v 1.1.1.1 2001/10/15 20:45:09 mrbrown Exp $ - */ - -#include -#include - -#ifdef CONFIG_SH_MPC1211 -#include -#endif -#endif diff --git a/include/asm-sh/mpc1211/dma.h b/include/asm-sh/mpc1211/dma.h deleted file mode 100644 index e506d1a..0000000 --- a/include/asm-sh/mpc1211/dma.h +++ /dev/null @@ -1,303 +0,0 @@ -/* $Id: dma.h,v 1.7 1992/12/14 00:29:34 root Exp root $ - * linux/include/asm/dma.h: Defines for using and allocating dma channels. - * Written by Hennus Bergman, 1992. - * High DMA channel support & info by Hannu Savolainen - * and John Boyd, Nov. 1992. - */ - -#ifndef _ASM_MPC1211_DMA_H -#define _ASM_MPC1211_DMA_H - -#include /* And spinlocks */ -#include /* need byte IO */ -#include - - -#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER -#define dma_outb outb_p -#else -#define dma_outb outb -#endif - -#define dma_inb inb - -/* - * NOTES about DMA transfers: - * - * controller 1: channels 0-3, byte operations, ports 00-1F - * controller 2: channels 4-7, word operations, ports C0-DF - * - * - ALL registers are 8 bits only, regardless of transfer size - * - channel 4 is not used - cascades 1 into 2. - * - channels 0-3 are byte - addresses/counts are for physical bytes - * - channels 5-7 are word - addresses/counts are for physical words - * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries - * - transfer count loaded to registers is 1 less than actual count - * - controller 2 offsets are all even (2x offsets for controller 1) - * - page registers for 5-7 don't use data bit 0, represent 128K pages - * - page registers for 0-3 use bit 0, represent 64K pages - * - * DMA transfers are limited to the lower 16MB of _physical_ memory. - * Note that addresses loaded into registers must be _physical_ addresses, - * not logical addresses (which may differ if paging is active). - * - * Address mapping for channels 0-3: - * - * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses) - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * | ... | | ... | | ... | - * P7 ... P0 A7 ... A0 A7 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Address mapping for channels 5-7: - * - * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses) - * | ... | \ \ ... \ \ \ ... \ \ - * | ... | \ \ ... \ \ \ ... \ (not used) - * | ... | \ \ ... \ \ \ ... \ - * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0 - * | Page | Addr MSB | Addr LSB | (DMA registers) - * - * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses - * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at - * the hardware level, so odd-byte transfers aren't possible). - * - * Transfer count (_not # bytes_) is limited to 64K, represented as actual - * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more, - * and up to 128K bytes may be transferred on channels 5-7 in one operation. - * - */ - -#define MAX_DMA_CHANNELS 8 - -/* The maximum address that we can perform a DMA transfer to on this platform */ -#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x10000000) - -/* 8237 DMA controllers */ -#define IO_DMA1_BASE 0x00 /* 8 bit slave DMA, channels 0..3 */ -#define IO_DMA2_BASE 0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */ - -/* DMA controller registers */ -#define DMA1_CMD_REG 0x08 /* command register (w) */ -#define DMA1_STAT_REG 0x08 /* status register (r) */ -#define DMA1_REQ_REG 0x09 /* request register (w) */ -#define DMA1_MASK_REG 0x0A /* single-channel mask (w) */ -#define DMA1_MODE_REG 0x0B /* mode register (w) */ -#define DMA1_CLEAR_FF_REG 0x0C /* clear pointer flip-flop (w) */ -#define DMA1_TEMP_REG 0x0D /* Temporary Register (r) */ -#define DMA1_RESET_REG 0x0D /* Master Clear (w) */ -#define DMA1_CLR_MASK_REG 0x0E /* Clear Mask */ -#define DMA1_MASK_ALL_REG 0x0F /* all-channels mask (w) */ - -#define DMA2_CMD_REG 0xD0 /* command register (w) */ -#define DMA2_STAT_REG 0xD0 /* status register (r) */ -#define DMA2_REQ_REG 0xD2 /* request register (w) */ -#define DMA2_MASK_REG 0xD4 /* single-channel mask (w) */ -#define DMA2_MODE_REG 0xD6 /* mode register (w) */ -#define DMA2_CLEAR_FF_REG 0xD8 /* clear pointer flip-flop (w) */ -#define DMA2_TEMP_REG 0xDA /* Temporary Register (r) */ -#define DMA2_RESET_REG 0xDA /* Master Clear (w) */ -#define DMA2_CLR_MASK_REG 0xDC /* Clear Mask */ -#define DMA2_MASK_ALL_REG 0xDE /* all-channels mask (w) */ - -#define DMA_ADDR_0 0x00 /* DMA address registers */ -#define DMA_ADDR_1 0x02 -#define DMA_ADDR_2 0x04 -#define DMA_ADDR_3 0x06 -#define DMA_ADDR_4 0xC0 -#define DMA_ADDR_5 0xC4 -#define DMA_ADDR_6 0xC8 -#define DMA_ADDR_7 0xCC - -#define DMA_CNT_0 0x01 /* DMA count registers */ -#define DMA_CNT_1 0x03 -#define DMA_CNT_2 0x05 -#define DMA_CNT_3 0x07 -#define DMA_CNT_4 0xC2 -#define DMA_CNT_5 0xC6 -#define DMA_CNT_6 0xCA -#define DMA_CNT_7 0xCE - -#define DMA_PAGE_0 0x87 /* DMA page registers */ -#define DMA_PAGE_1 0x83 -#define DMA_PAGE_2 0x81 -#define DMA_PAGE_3 0x82 -#define DMA_PAGE_5 0x8B -#define DMA_PAGE_6 0x89 -#define DMA_PAGE_7 0x8A - -#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */ -#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */ -#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ - -#define DMA_AUTOINIT 0x10 - - -extern spinlock_t dma_spin_lock; - -static __inline__ unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static __inline__ void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* enable/disable a specific DMA channel */ -static __inline__ void enable_dma(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(dmanr, DMA1_MASK_REG); - else - dma_outb(dmanr & 3, DMA2_MASK_REG); -} - -static __inline__ void disable_dma(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(dmanr | 4, DMA1_MASK_REG); - else - dma_outb((dmanr & 3) | 4, DMA2_MASK_REG); -} - -/* Clear the 'DMA Pointer Flip Flop'. - * Write 0 for LSB/MSB, 1 for MSB/LSB access. - * Use this once to initialize the FF to a known state. - * After that, keep track of it. :-) - * --- In order to do that, the DMA routines below should --- - * --- only be used while holding the DMA lock ! --- - */ -static __inline__ void clear_dma_ff(unsigned int dmanr) -{ - if (dmanr<=3) - dma_outb(0, DMA1_CLEAR_FF_REG); - else - dma_outb(0, DMA2_CLEAR_FF_REG); -} - -/* set mode (above) for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, char mode) -{ - if (dmanr<=3) - dma_outb(mode | dmanr, DMA1_MODE_REG); - else - dma_outb(mode | (dmanr&3), DMA2_MODE_REG); -} - -/* Set only the page register bits of the transfer address. - * This is used for successive transfers when we know the contents of - * the lower 16 bits of the DMA current address register, but a 64k boundary - * may have been crossed. - */ -static __inline__ void set_dma_page(unsigned int dmanr, unsigned int pagenr) -{ - switch(dmanr) { - case 0: - dma_outb( pagenr & 0xff, DMA_PAGE_0); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_0 + 0x400); - break; - case 1: - dma_outb( pagenr & 0xff, DMA_PAGE_1); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_1 + 0x400); - break; - case 2: - dma_outb( pagenr & 0xff, DMA_PAGE_2); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_2 + 0x400); - break; - case 3: - dma_outb( pagenr & 0xff, DMA_PAGE_3); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_3 + 0x400); - break; - case 5: - dma_outb( pagenr & 0xfe, DMA_PAGE_5); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_5 + 0x400); - break; - case 6: - dma_outb( pagenr & 0xfe, DMA_PAGE_6); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_6 + 0x400); - break; - case 7: - dma_outb( pagenr & 0xfe, DMA_PAGE_7); - dma_outb((pagenr >> 8) & 0xff, DMA_PAGE_7 + 0x400); - break; - } -} - - -/* Set transfer address & page bits for specific DMA channel. - * Assumes dma flipflop is clear. - */ -static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) -{ - set_dma_page(dmanr, a>>16); - if (dmanr <= 3) { - dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); - } else { - dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); - } -} - - -/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for - * a specific DMA channel. - * You must ensure the parameters are valid. - * NOTE: from a manual: "the number of transfers is one more - * than the initial word count"! This is taken into account. - * Assumes dma flip-flop is clear. - * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. - */ -static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) -{ - count--; - if (dmanr <= 3) { - dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); - } else { - dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); - } -} - - -/* Get DMA residue count. After a DMA transfer, this - * should return zero. Reading this while a DMA transfer is - * still in progress will return unpredictable results. - * If called before the channel has been used, it may return 1. - * Otherwise, it returns the number of _bytes_ left to transfer. - * - * Assumes DMA flip-flop is clear. - */ -static __inline__ int get_dma_residue(unsigned int dmanr) -{ - unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE - : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE; - - /* using short to get 16-bit wrap around */ - unsigned short count; - - count = 1 + dma_inb(io_port); - count += dma_inb(io_port) << 8; - return (dmanr<=3)? count : (count<<1); -} - - -/* These are in kernel/dma.c: */ -extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */ -extern void free_dma(unsigned int dmanr); /* release it again */ - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* _ASM_MPC1211_DMA_H */ diff --git a/include/asm-sh/mpc1211/io.h b/include/asm-sh/mpc1211/io.h deleted file mode 100644 index 6298370..0000000 --- a/include/asm-sh/mpc1211/io.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * include/asm-sh/mpc1211/io.h - * - * Copyright 2001 Saito.K & Jeanne - * - * IO functions for an Interface MPC-1211 - */ - -#ifndef _ASM_SH_IO_MPC1211_H -#define _ASM_SH_IO_MPC1211_H - -#include - -extern int mpc1211_irq_demux(int irq); - -extern void init_mpc1211_IRQ(void); -extern void heartbeat_mpc1211(void); - -extern void mpc1211_rtc_gettimeofday(struct timeval *tv); -extern int mpc1211_rtc_settimeofday(const struct timeval *tv); - -#endif /* _ASM_SH_IO_MPC1211_H */ diff --git a/include/asm-sh/mpc1211/keyboard.h b/include/asm-sh/mpc1211/keyboard.h deleted file mode 100644 index 9020fee..0000000 --- a/include/asm-sh/mpc1211/keyboard.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * MPC1211 specific keybord definitions - * Taken from the old asm-i386/keybord.h for PC/AT-style definitions - * created 3 Nov 1996 by Geert Uytterhoeven. - */ - -#ifdef __KERNEL__ - -#include -#include -#include -#include -#include - -#define KEYBOARD_IRQ 1 -#define DISABLE_KBD_DURING_INTERRUPTS 0 - -extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode); -extern int pckbd_getkeycode(unsigned int scancode); -extern int pckbd_translate(unsigned char scancode, unsigned char *keycode, - char raw_mode); -extern char pckbd_unexpected_up(unsigned char keycode); -extern void pckbd_leds(unsigned char leds); -extern void pckbd_init_hw(void); -extern int pckbd_pm_resume(struct pm_dev *, pm_request_t, void *); -extern pm_callback pm_kbd_request_override; - -#define kbd_setkeycode pckbd_setkeycode -#define kbd_getkeycode pckbd_getkeycode -#define kbd_translate pckbd_translate -#define kbd_unexpected_up pckbd_unexpected_up -#define kbd_leds pckbd_leds -#define kbd_init_hw pckbd_init_hw - -/* resource allocation */ -#define kbd_request_region() -#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \ - "keyboard", NULL) - -/* How to access the keyboard macros on this platform. */ -#define kbd_read_input() inb(KBD_DATA_REG) -#define kbd_read_status() inb(KBD_STATUS_REG) -#define kbd_write_output(val) outb(val, KBD_DATA_REG) -#define kbd_write_command(val) outb(val, KBD_CNTL_REG) - -/* Some stoneage hardware needs delays after some operations. */ -#define kbd_pause() do { } while(0) - -/* - * Machine specific bits for the PS/2 driver - */ - -#define AUX_IRQ 12 - -#define aux_request_irq(hand, dev_id) \ - request_irq(AUX_IRQ, hand, IRQF_SHARED, "PS2 Mouse", dev_id) - -#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id) - -#endif /* __KERNEL__ */ diff --git a/include/asm-sh/mpc1211/m1543c.h b/include/asm-sh/mpc1211/m1543c.h deleted file mode 100644 index c95d132..0000000 --- a/include/asm-sh/mpc1211/m1543c.h +++ /dev/null @@ -1,200 +0,0 @@ -#ifndef __ASM_SH_M1543C_H -#define __ASM_SH_M1543C_H - -/* - * linux/include/asm-sh/m1543c.h - * Copyright (C) 2001 Nobuhiro Sakawa - * M1543C:PCI-ISA Bus Bridge with Super IO Chip support - * - * from - * - * linux/include/asm-sh/smc37c93x.h - * - * Copyright (C) 2000 Kazumoto Kojima - * - * SMSC 37C93x Super IO Chip support - */ - -/* Default base I/O address */ -#define FDC_PRIMARY_BASE 0x3f0 -#define IDE1_PRIMARY_BASE 0x1f0 -#define IDE1_SECONDARY_BASE 0x170 -#define PARPORT_PRIMARY_BASE 0x378 -#define COM1_PRIMARY_BASE 0x2f8 -#define COM2_PRIMARY_BASE 0x3f8 -#define COM3_PRIMARY_BASE 0x3e8 -#define RTC_PRIMARY_BASE 0x070 -#define KBC_PRIMARY_BASE 0x060 -#define AUXIO_PRIMARY_BASE 0x000 /* XXX */ -#define I8259_M_CR 0x20 -#define I8259_M_MR 0x21 -#define I8259_S_CR 0xa0 -#define I8259_S_MR 0xa1 - -/* Logical device number */ -#define LDN_FDC 0 -#define LDN_IDE1 1 -#define LDN_IDE2 2 -#define LDN_PARPORT 3 -#define LDN_COM1 4 -#define LDN_COM2 5 -#define LDN_COM3 11 -#define LDN_RTC 6 -#define LDN_KBC 7 - -/* Configuration port and key */ -#define CONFIG_PORT 0x3f0 -#define INDEX_PORT CONFIG_PORT -#define DATA_PORT 0x3f1 -#define CONFIG_ENTER1 0x51 -#define CONFIG_ENTER2 0x23 -#define CONFIG_EXIT 0xbb - -/* Configuration index */ -#define CURRENT_LDN_INDEX 0x07 -#define POWER_CONTROL_INDEX 0x22 -#define ACTIVATE_INDEX 0x30 -#define IO_BASE_HI_INDEX 0x60 -#define IO_BASE_LO_INDEX 0x61 -#define IRQ_SELECT_INDEX 0x70 -#define PS2_IRQ_INDEX 0x72 -#define DMA_SELECT_INDEX 0x74 - -/* UART stuff. Only for debugging. */ -/* UART Register */ - -#define UART_RBR 0x0 /* Receiver Buffer Register (Read Only) */ -#define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */ -#define UART_IER 0x2 /* Interrupt Enable Register */ -#define UART_IIR 0x4 /* Interrupt Ident Register (Read Only) */ -#define UART_FCR 0x4 /* FIFO Control Register (Write Only) */ -#define UART_LCR 0x6 /* Line Control Register */ -#define UART_MCR 0x8 /* MODEM Control Register */ -#define UART_LSR 0xa /* Line Status Register */ -#define UART_MSR 0xc /* MODEM Status Register */ -#define UART_SCR 0xe /* Scratch Register */ -#define UART_DLL 0x0 /* Divisor Latch (LS) */ -#define UART_DLM 0x2 /* Divisor Latch (MS) */ - -#ifndef __ASSEMBLY__ -typedef struct uart_reg { - volatile __u16 rbr; - volatile __u16 ier; - volatile __u16 iir; - volatile __u16 lcr; - volatile __u16 mcr; - volatile __u16 lsr; - volatile __u16 msr; - volatile __u16 scr; -} uart_reg; -#endif /* ! __ASSEMBLY__ */ - -/* Alias for Write Only Register */ - -#define thr rbr -#define tcr iir - -/* Alias for Divisor Latch Register */ - -#define dll rbr -#define dlm ier -#define fcr iir - -/* Interrupt Enable Register */ - -#define IER_ERDAI 0x0100 /* Enable Received Data Available Interrupt */ -#define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */ -#define IER_ELSI 0x0400 /* Enable Receiver Line Status Interrupt */ -#define IER_EMSI 0x0800 /* Enable MODEM Status Interrupt */ - -/* Interrupt Ident Register */ - -#define IIR_IP 0x0100 /* "0" if Interrupt Pending */ -#define IIR_IIB0 0x0200 /* Interrupt ID Bit 0 */ -#define IIR_IIB1 0x0400 /* Interrupt ID Bit 1 */ -#define IIR_IIB2 0x0800 /* Interrupt ID Bit 2 */ -#define IIR_FIFO 0xc000 /* FIFOs enabled */ - -/* FIFO Control Register */ - -#define FCR_FEN 0x0100 /* FIFO enable */ -#define FCR_RFRES 0x0200 /* Receiver FIFO reset */ -#define FCR_TFRES 0x0400 /* Transmitter FIFO reset */ -#define FCR_DMA 0x0800 /* DMA mode select */ -#define FCR_RTL 0x4000 /* Receiver triger (LSB) */ -#define FCR_RTM 0x8000 /* Receiver triger (MSB) */ - -/* Line Control Register */ - -#define LCR_WLS0 0x0100 /* Word Length Select Bit 0 */ -#define LCR_WLS1 0x0200 /* Word Length Select Bit 1 */ -#define LCR_STB 0x0400 /* Number of Stop Bits */ -#define LCR_PEN 0x0800 /* Parity Enable */ -#define LCR_EPS 0x1000 /* Even Parity Select */ -#define LCR_SP 0x2000 /* Stick Parity */ -#define LCR_SB 0x4000 /* Set Break */ -#define LCR_DLAB 0x8000 /* Divisor Latch Access Bit */ - -/* MODEM Control Register */ - -#define MCR_DTR 0x0100 /* Data Terminal Ready */ -#define MCR_RTS 0x0200 /* Request to Send */ -#define MCR_OUT1 0x0400 /* Out 1 */ -#define MCR_IRQEN 0x0800 /* IRQ Enable */ -#define MCR_LOOP 0x1000 /* Loop */ - -/* Line Status Register */ - -#define LSR_DR 0x0100 /* Data Ready */ -#define LSR_OE 0x0200 /* Overrun Error */ -#define LSR_PE 0x0400 /* Parity Error */ -#define LSR_FE 0x0800 /* Framing Error */ -#define LSR_BI 0x1000 /* Break Interrupt */ -#define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */ -#define LSR_TEMT 0x4000 /* Transmitter Empty */ -#define LSR_FIFOE 0x8000 /* Receiver FIFO error */ - -/* MODEM Status Register */ - -#define MSR_DCTS 0x0100 /* Delta Clear to Send */ -#define MSR_DDSR 0x0200 /* Delta Data Set Ready */ -#define MSR_TERI 0x0400 /* Trailing Edge Ring Indicator */ -#define MSR_DDCD 0x0800 /* Delta Data Carrier Detect */ -#define MSR_CTS 0x1000 /* Clear to Send */ -#define MSR_DSR 0x2000 /* Data Set Ready */ -#define MSR_RI 0x4000 /* Ring Indicator */ -#define MSR_DCD 0x8000 /* Data Carrier Detect */ - -/* Baud Rate Divisor */ - -#define UART_CLK (1843200) /* 1.8432 MHz */ -#define UART_BAUD(x) (UART_CLK / (16 * (x))) - -/* RTC register definition */ -#define RTC_SECONDS 0 -#define RTC_SECONDS_ALARM 1 -#define RTC_MINUTES 2 -#define RTC_MINUTES_ALARM 3 -#define RTC_HOURS 4 -#define RTC_HOURS_ALARM 5 -#define RTC_DAY_OF_WEEK 6 -#define RTC_DAY_OF_MONTH 7 -#define RTC_MONTH 8 -#define RTC_YEAR 9 -#define RTC_FREQ_SELECT 10 -# define RTC_UIP 0x80 -# define RTC_DIV_CTL 0x70 -/* This RTC can work under 32.768KHz clock only. */ -# define RTC_OSC_ENABLE 0x20 -# define RTC_OSC_DISABLE 0x00 -#define RTC_CONTROL 11 -# define RTC_SET 0x80 -# define RTC_PIE 0x40 -# define RTC_AIE 0x20 -# define RTC_UIE 0x10 -# define RTC_SQWE 0x08 -# define RTC_DM_BINARY 0x04 -# define RTC_24H 0x02 -# define RTC_DST_EN 0x01 - -#endif /* __ASM_SH_M1543C_H */ diff --git a/include/asm-sh/mpc1211/mc146818rtc.h b/include/asm-sh/mpc1211/mc146818rtc.h deleted file mode 100644 index e245f2a..0000000 --- a/include/asm-sh/mpc1211/mc146818rtc.h +++ /dev/null @@ -1,6 +0,0 @@ -/* - * MPC1211 uses PC/AT style RTC definitions. - */ -#include - - diff --git a/include/asm-sh/mpc1211/mpc1211.h b/include/asm-sh/mpc1211/mpc1211.h deleted file mode 100644 index fa456c3..0000000 --- a/include/asm-sh/mpc1211/mpc1211.h +++ /dev/null @@ -1,18 +0,0 @@ -#ifndef __ASM_SH_MPC1211_H -#define __ASM_SH_MPC1211_H - -/* - * linux/include/asm-sh/mpc1211.h - * - * Copyright (C) 2001 Saito.K & Jeanne - * - * Interface MPC-1211 support - */ - -#define PA_PCI_IO (0xa4000000) /* PCI I/O space */ -#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */ - -#define PCIPAR (0xa4000cf8) /* PCI Config address */ -#define PCIPDR (0xa4000cfc) /* PCI Config data */ - -#endif /* __ASM_SH_MPC1211_H */ diff --git a/include/asm-sh/mpc1211/pci.h b/include/asm-sh/mpc1211/pci.h deleted file mode 100644 index d9162c5..0000000 --- a/include/asm-sh/mpc1211/pci.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Low-Level PCI Support for MPC-1211 - * - * (c) 2002 Saito.K & Jeanne - * - */ - -#ifndef _PCI_MPC1211_H_ -#define _PCI_MPC1211_H_ - -#include - -/* set debug level 4=verbose...1=terse */ -//#define DEBUG_PCI 3 -#undef DEBUG_PCI - -#ifdef DEBUG_PCI -#define PCIDBG(n, x...) { if(DEBUG_PCI>=n) printk(x); } -#else -#define PCIDBG(n, x...) -#endif - -/* startup values */ -#define PCI_PROBE_BIOS 1 -#define PCI_PROBE_CONF1 2 -#define PCI_PROBE_CONF2 4 -#define PCI_NO_CHECKS 0x400 -#define PCI_ASSIGN_ROMS 0x1000 -#define PCI_BIOS_IRQ_SCAN 0x2000 - -/* MPC-1211 Specific Values */ -#define PCIPAR (0xa4000cf8) /* PCI Config address */ -#define PCIPDR (0xa4000cfc) /* PCI Config data */ - -#define PA_PCI_IO (0xa4000000) /* PCI I/O space */ -#define PA_PCI_MEM (0xb0000000) /* PCI MEM space */ - -#endif /* _PCI_MPC1211_H_ */ -- cgit v1.1 From ae8a5348acaefc5cb1f60199ded30900d445c986 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 25 Apr 2008 17:58:21 +0900 Subject: sh: r7780rp: Kill off unneded ifdefs for irq setup. Signed-off-by: Paul Mundt --- include/asm-sh/r7780rp.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h index a33838f..306f735 100644 --- a/include/asm-sh/r7780rp.h +++ b/include/asm-sh/r7780rp.h @@ -193,8 +193,6 @@ #define IRQ_SCIF0 (HL_FPGA_IRQ_BASE + 15) #define IRQ_SCIF1 (HL_FPGA_IRQ_BASE + 16) -unsigned char *highlander_init_irq_r7780mp(void); -unsigned char *highlander_init_irq_r7780rp(void); -unsigned char *highlander_init_irq_r7785rp(void); +unsigned char *highlander_plat_irq_setup(void); #endif /* __ASM_SH_RENESAS_R7780RP */ -- cgit v1.1 From 0146ba78b9339c27ed12545f9bdc208604354bb3 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 23 Apr 2008 20:56:44 +0900 Subject: sh: add memory resources to /proc/iomem Add physical memory resources such as System RAM, Kernel code/data/bss and reserved crash dump area to /proc/iomem. Same strategy as on x86. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/mmzone.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h index 7969f38..2969253 100644 --- a/include/asm-sh/mmzone.h +++ b/include/asm-sh/mmzone.h @@ -41,6 +41,8 @@ void __init plat_mem_setup(void); /* arch/sh/kernel/setup.c */ void __init setup_bootmem_allocator(unsigned long start_pfn); +void __init __add_active_range(unsigned int nid, unsigned long start_pfn, + unsigned long end_pfn); #endif /* __KERNEL__ */ #endif /* __ASM_SH_MMZONE_H */ -- cgit v1.1 From a276e588a92737889c21e736f2bbed8aecda25fb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 24 Apr 2008 21:30:09 +0900 Subject: sh: unify external irq pin code for sh3 This patch unifies the sh3 external irq pin code. It buys us some savings with reduced code redundancy, but the main feature with this change is irq sense selection support for all sh3 processors. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index c958fda..9d7003c 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -95,6 +95,9 @@ void __init register_intc_controller(struct intc_desc *desc); int intc_set_priority(unsigned int irq, unsigned int prio); void __init plat_irq_setup(void); +#ifdef CONFIG_CPU_SH3 +void __init plat_irq_setup_sh3(void); +#endif enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210, IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK, -- cgit v1.1 From d58876e289b0153bf86162aa1a43249e0f0aa03d Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Thu, 24 Apr 2008 21:36:34 +0900 Subject: sh: add interrupt ack code to sh3 This patch adds interrupt acknowledge code for external interrupt sources on sh3 processors. Only really required for edge triggered interrupts, but we ack regardless of sense configuration. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 9d7003c..7438d1e 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -79,6 +79,10 @@ struct intc_desc { struct intc_sense_reg *sense_regs; unsigned int nr_sense_regs; char *name; +#ifdef CONFIG_CPU_SH3 + struct intc_mask_reg *ack_regs; + unsigned int nr_ack_regs; +#endif }; #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) @@ -91,6 +95,18 @@ struct intc_desc symbol __initdata = { \ chipname, \ } +#ifdef CONFIG_CPU_SH3 +#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ + mask_regs, prio_regs, sense_regs, ack_regs) \ +struct intc_desc symbol __initdata = { \ + _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ + _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ + _INTC_ARRAY(sense_regs), \ + chipname, \ + _INTC_ARRAY(ack_regs), \ +} +#endif + void __init register_intc_controller(struct intc_desc *desc); int intc_set_priority(unsigned int irq, unsigned int prio); -- cgit v1.1 From 1e0f50ae11ab5838009994a3266accc1319c90d9 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Thu, 8 May 2008 13:40:17 +0900 Subject: sh: Stub in cpu_to_node() and friends for NUMA build. Signed-off-by: Paul Mundt --- include/asm-sh/topology.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h index 34cdb28..95f0085 100644 --- a/include/asm-sh/topology.h +++ b/include/asm-sh/topology.h @@ -29,6 +29,17 @@ .nr_balance_failed = 0, \ } +#define cpu_to_node(cpu) ((void)(cpu),0) +#define parent_node(node) ((void)(node),0) + +#define node_to_cpumask(node) ((void)node, cpu_online_map) +#define node_to_first_cpu(node) ((void)(node),0) + +#define pcibus_to_node(bus) ((void)(bus), -1) +#define pcibus_to_cpumask(bus) (pcibus_to_node(bus) == -1 ? \ + CPU_MASK_ALL : \ + node_to_cpumask(pcibus_to_node(bus)) \ + ) #endif #include -- cgit v1.1 From ef75d49f116bccbb80bccd423ecf3cb86c4509a5 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Thu, 8 May 2008 01:15:21 -0700 Subject: netfilter: nf_conntrack_sip: restrict RTP expect flushing on error to last request Some Inovaphone PBXs exhibit very stange behaviour: when dialing for example "123", the device sends INVITE requests for "1", "12" and "123" back to back. The first requests will elicit error responses from the receiver, causing the SIP helper to flush the RTP expectations even though we might still see a positive response. Note the sequence number of the last INVITE request that contained a media description and only flush the expectations when receiving a negative response for that sequence number. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/nf_conntrack_sip.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/netfilter/nf_conntrack_sip.h b/include/linux/netfilter/nf_conntrack_sip.h index 5da04e5..23aa2ec 100644 --- a/include/linux/netfilter/nf_conntrack_sip.h +++ b/include/linux/netfilter/nf_conntrack_sip.h @@ -7,6 +7,7 @@ struct nf_ct_sip_master { unsigned int register_cseq; + unsigned int invite_cseq; }; enum sip_expectation_classes { -- cgit v1.1 From 547acec7ecc32b14c2740de3f32ce7d1b36a0f69 Mon Sep 17 00:00:00 2001 From: Andres Salomon Date: Wed, 7 May 2008 13:07:37 -0700 Subject: x86: GEODE: cache results from geode_has_vsa2() and uninline This moves geode_has_vsa2 into a .c file, caches the result we get from the VSA virtual registers, and causes the function to no longer be inline. [akpm@linux-foundation.org: cleanup] Signed-off-by: Andres Salomon Cc: Jordan Crouse Signed-off-by: Andrew Morton Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar --- include/asm-x86/geode.h | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'include') diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h index 7154dc4..8a53bc8 100644 --- a/include/asm-x86/geode.h +++ b/include/asm-x86/geode.h @@ -185,16 +185,7 @@ static inline int is_geode(void) return (is_geode_gx() || is_geode_lx()); } -/* - * The VSA has virtual registers that we can query for a signature. - */ -static inline int geode_has_vsa2(void) -{ - outw(VSA_VR_UNLOCK, VSA_VRC_INDEX); - outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX); - - return (inw(VSA_VRC_DATA) == VSA_SIG); -} +extern int geode_has_vsa2(void); /* MFGPTs */ -- cgit v1.1 From cb3f43b22bbb5ddbf6ce3e2bac40ce6eba30aba0 Mon Sep 17 00:00:00 2001 From: Andres Salomon Date: Wed, 7 May 2008 13:07:38 -0700 Subject: x86: geode: define geode_has_vsa2() even if CONFIG_MGEODE_LX is not set We want drivers to be able to use geode_has_vsa2 without having to worry about what model geode is being compiled for. This patch ensures that geode_has_vsa2 is always defined. Signed-off-by: Andres Salomon Cc: Jordan Crouse Signed-off-by: Andrew Morton Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar --- include/asm-x86/geode.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h index 8a53bc8..6e64588 100644 --- a/include/asm-x86/geode.h +++ b/include/asm-x86/geode.h @@ -185,7 +185,14 @@ static inline int is_geode(void) return (is_geode_gx() || is_geode_lx()); } +#ifdef CONFIG_MGEODE_LX extern int geode_has_vsa2(void); +#else +static inline int geode_has_vsa2(void) +{ + return 0; +} +#endif /* MFGPTs */ -- cgit v1.1 From 8d4a4300854f3971502e81dacd930704cb88f606 Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 8 May 2008 09:18:43 +0200 Subject: x86: cleanup PAT cpu validation Move the scattered checks for PAT support to a single function. Its moved to addon_cpuid_features.c as this file is shared between 32 and 64 bit. Remove the manipulation of the PAT feature bit and just disable PAT in the PAT layer, based on the PAT bit provided by the CPU and the current CPU version/model white list. Change the boot CPU check so it works on Voyager somewhere in the future as well :) Also panic, when a secondary has PAT disabled but the primary one has alrady switched to PAT. We have no way to undo that. The white list is kept for now to ensure that we can rely on known to work CPU types and concentrate on the software induced problems instead of fighthing CPU erratas and subtle wreckage caused by not yet verified CPUs. Once the PAT code has stabilized enough, we can remove the white list and open the can of worms. Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar --- include/asm-x86/pat.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/asm-x86/pat.h b/include/asm-x86/pat.h index 8b822b5..88f60cc 100644 --- a/include/asm-x86/pat.h +++ b/include/asm-x86/pat.h @@ -4,7 +4,13 @@ #include +#ifdef CONFIG_X86_PAT extern int pat_wc_enabled; +extern void validate_pat_support(struct cpuinfo_x86 *c); +#else +static const int pat_wc_enabled = 0; +static inline void validate_pat_support(struct cpuinfo_x86 *c) { } +#endif extern void pat_init(void); @@ -12,5 +18,7 @@ extern int reserve_memtype(u64 start, u64 end, unsigned long req_type, unsigned long *ret_type); extern int free_memtype(u64 start, u64 end); +extern void pat_disable(char *reason); + #endif -- cgit v1.1 From dc38e2ad53ca27968919dea6d7fa60575782d5a6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 8 May 2008 16:50:39 +0100 Subject: [ARM] pxa: Fix RCSR handling Related to d3930614e68bdf83a120d904c039a64e9f75dba1. RCSR is only present on PXA2xx CPUs, not on PXA3xx CPUs. Therefore, we should not be unconditionally writing to RCSR from generic code. Since we now clear the RCSR status from the SoC specific PXA PM code and before reset in the arch_reset() function, the duplication in the corgi, poodle, spitz and tosa code can be removed. Acked-by: Richard Purdie Signed-off-by: Russell King --- include/asm-arm/arch-pxa/system.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/system.h b/include/asm-arm/arch-pxa/system.h index a758a71..9aa6c2e 100644 --- a/include/asm-arm/arch-pxa/system.h +++ b/include/asm-arm/arch-pxa/system.h @@ -22,7 +22,8 @@ static inline void arch_idle(void) static inline void arch_reset(char mode) { - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + if (cpu_is_pxa2xx()) + RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; if (mode == 's') { /* Jump into ROM at address 0 */ -- cgit v1.1 From 148c69b4b0ec267b08d3619651ae4a10a1768b04 Mon Sep 17 00:00:00 2001 From: David Howells Date: Wed, 7 May 2008 15:31:54 +0100 Subject: MN10300: Make cpu_relax() invoke barrier() Make cpu_relax() invoke barrier() to be the same as other arches. Signed-off-by: David Howells Signed-off-by: Linus Torvalds --- include/asm-mn10300/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mn10300/processor.h b/include/asm-mn10300/processor.h index f1b081f..7323927 100644 --- a/include/asm-mn10300/processor.h +++ b/include/asm-mn10300/processor.h @@ -58,7 +58,7 @@ extern struct mn10300_cpuinfo boot_cpu_data; extern void identify_cpu(struct mn10300_cpuinfo *); extern void print_cpu_info(struct mn10300_cpuinfo *); extern void dodgy_tsc(void); -#define cpu_relax() do {} while (0) +#define cpu_relax() barrier() /* * User space process size: 1.75GB (default). -- cgit v1.1 From cdf7da899d840d47e075ff3bd761290653c68b77 Mon Sep 17 00:00:00 2001 From: Steve Glendinning Date: Tue, 6 May 2008 11:36:27 +0100 Subject: sh: Fix DMAC base address for SH7709S On SH7709S, DMAC can be found at 0xa4000020 (as with most of the other sh3 cpu subtypes). Split out definition of DMAC base address from definitions of DMTE irqs. Signed-off-by: Steve Glendinning Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh3/dma.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h index 092ff9d..6813c32 100644 --- a/include/asm-sh/cpu-sh3/dma.h +++ b/include/asm-sh/cpu-sh3/dma.h @@ -3,19 +3,19 @@ #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) || \ - defined(CONFIG_CPU_SUBTYPE_SH7709) + defined(CONFIG_CPU_SUBTYPE_SH7721) #define SH_DMAC_BASE 0xa4010020 +#else +#define SH_DMAC_BASE 0xa4000020 +#endif +#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) #define DMTE0_IRQ 48 #define DMTE1_IRQ 49 #define DMTE2_IRQ 50 #define DMTE3_IRQ 51 #define DMTE4_IRQ 76 #define DMTE5_IRQ 77 - -#else -#define SH_DMAC_BASE 0xa4000020 #endif /* Definitions for the SuperH DMAC */ -- cgit v1.1 From 8af302e2dc91d4229968b8eedd4b45c0dd9fc717 Mon Sep 17 00:00:00 2001 From: Jochen Friedrich Date: Wed, 7 May 2008 04:40:01 +1000 Subject: [POWERPC] Fix of_i2c include for module compilation Remove #ifdef CONFIG_OF_I2C as this breaks module compilation. Drivers using this header should depend on OF_I2C anyways, so there's no need to make this conditional. Signed-off-by: Jochen Friedrich Signed-off-by: Paul Mackerras --- include/linux/of_i2c.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/linux/of_i2c.h b/include/linux/of_i2c.h index 2e5a967..bd2a870 100644 --- a/include/linux/of_i2c.h +++ b/include/linux/of_i2c.h @@ -14,11 +14,7 @@ #include -#ifdef CONFIG_OF_I2C - void of_register_i2c_devices(struct i2c_adapter *adap, struct device_node *adap_node); -#endif /* CONFIG_OF_I2C */ - #endif /* __LINUX_OF_I2C_H */ -- cgit v1.1 From 6c2545eefffc452e52302c96c955d9aa26353aa9 Mon Sep 17 00:00:00 2001 From: Rusty Russell Date: Fri, 9 May 2008 16:23:17 +1000 Subject: module: put modversions in vermagic Don't allow a module built without versions altogether to be inserted into a kernel which expects modversions. modprobe --force will strip vermagic as well as modversions, so it won't be effected, but this will make sure that a non-CONFIG_MODVERSIONS module won't be accidentally inserted into a CONFIG_MODVERSIONS kernel. Signed-off-by: Rusty Russell Signed-off-by: Linus Torvalds --- include/linux/vermagic.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/vermagic.h b/include/linux/vermagic.h index 4d0909e..79b9837 100644 --- a/include/linux/vermagic.h +++ b/include/linux/vermagic.h @@ -17,6 +17,11 @@ #else #define MODULE_VERMAGIC_MODULE_UNLOAD "" #endif +#ifdef CONFIG_MODVERSIONS +#define MODULE_VERMAGIC_MODVERSIONS "modversions " +#else +#define MODULE_VERMAGIC_MODVERSIONS "" +#endif #ifndef MODULE_ARCH_VERMAGIC #define MODULE_ARCH_VERMAGIC "" #endif @@ -24,5 +29,6 @@ #define VERMAGIC_STRING \ UTS_RELEASE " " \ MODULE_VERMAGIC_SMP MODULE_VERMAGIC_PREEMPT \ - MODULE_VERMAGIC_MODULE_UNLOAD MODULE_ARCH_VERMAGIC + MODULE_VERMAGIC_MODULE_UNLOAD MODULE_VERMAGIC_MODVERSIONS \ + MODULE_ARCH_VERMAGIC -- cgit v1.1 From 005b1f7495e812b99b73de5adbc73afd7a1cbcaf Mon Sep 17 00:00:00 2001 From: Jeff Garzik Date: Fri, 9 May 2008 15:00:55 -0400 Subject: [libata] revert new check-ready Status register logic This behavior differs across multiple controllers, so we cannot use common logic for all controllers. Revert back to the basic common behavior, and specific drivers will be updated from here to take into account the unusual Status return values. Signed-off-by: Jeff Garzik --- include/linux/libata.h | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index 7e206da..0f17643 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -1384,17 +1384,14 @@ static inline struct ata_port *ata_shost_to_port(struct Scsi_Host *host) static inline int ata_check_ready(u8 status) { - /* Some controllers report 0x77 or 0x7f during intermediate - * not-ready stages. - */ - if (status == 0x77 || status == 0x7f) - return 0; + if (!(status & ATA_BUSY)) + return 1; /* 0xff indicates either no device or device not ready */ if (status == 0xff) return -ENODEV; - return !(status & ATA_BUSY); + return 0; } -- cgit v1.1 From fd3c3ed5d1e3ceb37635cbe6d220ab94aae0781d Mon Sep 17 00:00:00 2001 From: Suresh Siddha Date: Wed, 7 May 2008 12:09:52 -0700 Subject: x86: fix fpu restore from sig return If the task never used fpu, initialize the fpu before restoring the FP state from the signal handler context. This will allocate the fpu state, if the task never needed it before. Reported-and-bisected-by: Eric Sesterhenn Signed-off-by: Suresh Siddha Tested-by: Eric Sesterhenn Cc: Frederik Deweerdt Signed-off-by: Thomas Gleixner --- include/asm-x86/i387.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-x86/i387.h b/include/asm-x86/i387.h index da2adb4..6b722d3 100644 --- a/include/asm-x86/i387.h +++ b/include/asm-x86/i387.h @@ -175,7 +175,15 @@ static inline int save_i387(struct _fpstate __user *buf) */ static inline int restore_i387(struct _fpstate __user *buf) { - set_used_math(); + struct task_struct *tsk = current; + int err; + + if (!used_math()) { + err = init_fpu(tsk); + if (err) + return err; + } + if (!(task_thread_info(current)->status & TS_USEDFPU)) { clts(); task_thread_info(current)->status |= TS_USEDFPU; -- cgit v1.1 From eb2b4e682a6d5b4779a7f1a6a8419982919795f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Simon=20Holm=20Th=C3=B8gersen?= Date: Mon, 5 May 2008 15:45:28 +0200 Subject: x86: revert commit 709f744 ("x86: bitops asm constraint fixes") MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 709f744 causes my computer to freeze during the start up of X and my login manger (GDM). It gets to the point where it has shown the default X mouse cursor logo (a big X / cross) and does not respond to anything from that point on. This worked fine before 709f744, and it works fine with 709f744 reverted on top of Linus' current tree (f74d505). The revert had conflicts, as far as I can tell due to white space changes. The diff I ended up with is below. It is 100% reproducible. Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner --- include/asm-x86/bitops.h | 37 +++++++++++++++++-------------------- 1 file changed, 17 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-x86/bitops.h b/include/asm-x86/bitops.h index b81a4d4..ee4b3ea 100644 --- a/include/asm-x86/bitops.h +++ b/include/asm-x86/bitops.h @@ -23,13 +23,10 @@ #if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 1) /* Technically wrong, but this avoids compilation errors on some gcc versions. */ -#define ADDR "=m" (*(volatile long *)addr) -#define BIT_ADDR "=m" (((volatile int *)addr)[nr >> 5]) +#define ADDR "=m" (*(volatile long *) addr) #else #define ADDR "+m" (*(volatile long *) addr) -#define BIT_ADDR "+m" (((volatile int *)addr)[nr >> 5]) #endif -#define BASE_ADDR "m" (*(volatile int *)addr) /** * set_bit - Atomically set a bit in memory @@ -77,7 +74,7 @@ static inline void __set_bit(int nr, volatile void *addr) */ static inline void clear_bit(int nr, volatile void *addr) { - asm volatile(LOCK_PREFIX "btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile(LOCK_PREFIX "btr %1,%0" : ADDR : "Ir" (nr)); } /* @@ -96,7 +93,7 @@ static inline void clear_bit_unlock(unsigned nr, volatile void *addr) static inline void __clear_bit(int nr, volatile void *addr) { - asm volatile("btr %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile("btr %1,%0" : ADDR : "Ir" (nr)); } /* @@ -131,7 +128,7 @@ static inline void __clear_bit_unlock(unsigned nr, volatile void *addr) */ static inline void __change_bit(int nr, volatile void *addr) { - asm volatile("btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile("btc %1,%0" : ADDR : "Ir" (nr)); } /** @@ -145,7 +142,7 @@ static inline void __change_bit(int nr, volatile void *addr) */ static inline void change_bit(int nr, volatile void *addr) { - asm volatile(LOCK_PREFIX "btc %1,%2" : BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm volatile(LOCK_PREFIX "btc %1,%0" : ADDR : "Ir" (nr)); } /** @@ -191,9 +188,10 @@ static inline int __test_and_set_bit(int nr, volatile void *addr) { int oldbit; - asm volatile("bts %2,%3\n\t" - "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); + asm("bts %2,%1\n\t" + "sbb %0,%0" + : "=r" (oldbit), ADDR + : "Ir" (nr)); return oldbit; } @@ -229,9 +227,10 @@ static inline int __test_and_clear_bit(int nr, volatile void *addr) { int oldbit; - asm volatile("btr %2,%3\n\t" + asm volatile("btr %2,%1\n\t" "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); + : "=r" (oldbit), ADDR + : "Ir" (nr)); return oldbit; } @@ -240,9 +239,10 @@ static inline int __test_and_change_bit(int nr, volatile void *addr) { int oldbit; - asm volatile("btc %2,%3\n\t" + asm volatile("btc %2,%1\n\t" "sbb %0,%0" - : "=r" (oldbit), BIT_ADDR : "Ir" (nr), BASE_ADDR); + : "=r" (oldbit), ADDR + : "Ir" (nr) : "memory"); return oldbit; } @@ -276,11 +276,10 @@ static inline int variable_test_bit(int nr, volatile const void *addr) { int oldbit; - asm volatile("bt %2,%3\n\t" + asm volatile("bt %2,%1\n\t" "sbb %0,%0" : "=r" (oldbit) - : "m" (((volatile const int *)addr)[nr >> 5]), - "Ir" (nr), BASE_ADDR); + : "m" (*(unsigned long *)addr), "Ir" (nr)); return oldbit; } @@ -397,8 +396,6 @@ static inline int fls(int x) } #endif /* __KERNEL__ */ -#undef BASE_ADDR -#undef BIT_ADDR #undef ADDR static inline void set_bit_string(unsigned long *bitmap, -- cgit v1.1 From 5c3a121d52b30a1e53cdaa802fa1965fcd243164 Mon Sep 17 00:00:00 2001 From: Vaidyanathan Srinivasan Date: Mon, 5 May 2008 19:22:15 +0530 Subject: x86: sysfs cpu?/topology is empty in 2.6.25 (32-bit Intel system) System topology on intel based system needs to be exported for non-numa case as well. All parts of asm-i386/topology.h has come under #ifdef CONFIG_NUMA after the merge to asm-x86/topology.h /sys/devices/system/cpu/cpu?/topology/* is populated based on ENABLE_TOPO_DEFINES The sysfs cpu topology is not being populated on my dual socket dual core xeon 5160 processor based (x86 32 bit) system. CONFIG_NUMA is not set in my case yet the topology is relevant and useful. irqbalance daemon application depends on topology to build the cpus and package list and it fails on Fedora9 beta since the sysfs topology was not being populated in the 2.6.25 kernel. I am not sure if it was intentional to not define ENABLE_TOPO_DEFINES for non-numa systems. This fix has been tested on the above mentioned dual core, dual socket system. Signed-off-by: Vaidyanathan Srinivasan Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner Cc: stable@kernel.org --- include/asm-x86/topology.h | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-x86/topology.h b/include/asm-x86/topology.h index 4f35a0f..dcf3f81 100644 --- a/include/asm-x86/topology.h +++ b/include/asm-x86/topology.h @@ -25,6 +25,16 @@ #ifndef _ASM_X86_TOPOLOGY_H #define _ASM_X86_TOPOLOGY_H +#ifdef CONFIG_X86_32 +# ifdef CONFIG_X86_HT +# define ENABLE_TOPO_DEFINES +# endif +#else +# ifdef CONFIG_SMP +# define ENABLE_TOPO_DEFINES +# endif +#endif + #ifdef CONFIG_NUMA #include #include @@ -130,10 +140,6 @@ extern unsigned long node_end_pfn[]; extern unsigned long node_remap_size[]; #define node_has_online_mem(nid) (node_start_pfn[nid] != node_end_pfn[nid]) -# ifdef CONFIG_X86_HT -# define ENABLE_TOPO_DEFINES -# endif - # define SD_CACHE_NICE_TRIES 1 # define SD_IDLE_IDX 1 # define SD_NEWIDLE_IDX 2 @@ -141,10 +147,6 @@ extern unsigned long node_remap_size[]; #else -# ifdef CONFIG_SMP -# define ENABLE_TOPO_DEFINES -# endif - # define SD_CACHE_NICE_TRIES 2 # define SD_IDLE_IDX 2 # define SD_NEWIDLE_IDX 2 -- cgit v1.1 From 9c3cdc1f83a6e07092392ff4aba6466517dbd1d0 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 10 May 2008 19:51:16 -0700 Subject: Move ACCESS_ONCE() to It actually makes much more sense there, and we do tend to need it for non-RCU usage too. Moving it to will allow some other cases that have open-coded the same logic to use the same helper function that RCU has used. Signed-off-by: Linus Torvalds --- include/linux/compiler.h | 12 ++++++++++++ include/linux/rcupdate.h | 12 ------------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/compiler.h b/include/linux/compiler.h index dcae0c8..c8bd2da 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -182,4 +182,16 @@ extern void __chk_io_ptr(const volatile void __iomem *); # define __section(S) __attribute__ ((__section__(#S))) #endif +/* + * Prevent the compiler from merging or refetching accesses. The compiler + * is also forbidden from reordering successive instances of ACCESS_ONCE(), + * but only when the compiler is aware of some particular ordering. One way + * to make the compiler aware of ordering is to put the two invocations of + * ACCESS_ONCE() in different C statements. + * + * This macro does absolutely -nothing- to prevent the CPU from reordering, + * merging, or refetching absolutely anything at any time. + */ +#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) + #endif /* __LINUX_COMPILER_H */ diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h index 8082d65..d42dbec 100644 --- a/include/linux/rcupdate.h +++ b/include/linux/rcupdate.h @@ -131,18 +131,6 @@ struct rcu_head { */ #define rcu_read_unlock_bh() __rcu_read_unlock_bh() -/* - * Prevent the compiler from merging or refetching accesses. The compiler - * is also forbidden from reordering successive instances of ACCESS_ONCE(), - * but only when the compiler is aware of some particular ordering. One way - * to make the compiler aware of ordering is to put the two invocations of - * ACCESS_ONCE() in different C statements. - * - * This macro does absolutely -nothing- to prevent the CPU from reordering, - * merging, or refetching absolutely anything at any time. - */ -#define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) - /** * rcu_dereference - fetch an RCU-protected pointer in an * RCU read-side critical section. This pointer may later -- cgit v1.1 From 39f004ba27fcd2431030a3bb3c949fa3f93fa4ca Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 10 May 2008 19:52:43 -0700 Subject: Make use ACCESS_ONCE() ..instead of cooking up its own uglier local version of it. Signed-off-by: Linus Torvalds --- include/asm-x86/spinlock.h | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/asm-x86/spinlock.h b/include/asm-x86/spinlock.h index bc6376f..21e89bf 100644 --- a/include/asm-x86/spinlock.h +++ b/include/asm-x86/spinlock.h @@ -20,18 +20,8 @@ */ #ifdef CONFIG_X86_32 -typedef char _slock_t; -# define LOCK_INS_DEC "decb" -# define LOCK_INS_XCH "xchgb" -# define LOCK_INS_MOV "movb" -# define LOCK_INS_CMP "cmpb" # define LOCK_PTR_REG "a" #else -typedef int _slock_t; -# define LOCK_INS_DEC "decl" -# define LOCK_INS_XCH "xchgl" -# define LOCK_INS_MOV "movl" -# define LOCK_INS_CMP "cmpl" # define LOCK_PTR_REG "D" #endif @@ -66,14 +56,14 @@ typedef int _slock_t; #if (NR_CPUS < 256) static inline int __raw_spin_is_locked(raw_spinlock_t *lock) { - int tmp = *(volatile signed int *)(&(lock)->slock); + int tmp = ACCESS_ONCE(lock->slock); return (((tmp >> 8) & 0xff) != (tmp & 0xff)); } static inline int __raw_spin_is_contended(raw_spinlock_t *lock) { - int tmp = *(volatile signed int *)(&(lock)->slock); + int tmp = ACCESS_ONCE(lock->slock); return (((tmp >> 8) & 0xff) - (tmp & 0xff)) > 1; } @@ -130,14 +120,14 @@ static __always_inline void __raw_spin_unlock(raw_spinlock_t *lock) #else static inline int __raw_spin_is_locked(raw_spinlock_t *lock) { - int tmp = *(volatile signed int *)(&(lock)->slock); + int tmp = ACCESS_ONCE(lock->slock); return (((tmp >> 16) & 0xffff) != (tmp & 0xffff)); } static inline int __raw_spin_is_contended(raw_spinlock_t *lock) { - int tmp = *(volatile signed int *)(&(lock)->slock); + int tmp = ACCESS_ONCE(lock->slock); return (((tmp >> 16) & 0xffff) - (tmp & 0xffff)) > 1; } -- cgit v1.1 From 8e3e076c5a78519a9f64cd384e8f18bc21882ce0 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 10 May 2008 20:58:02 -0700 Subject: BKL: revert back to the old spinlock implementation The generic semaphore rewrite had a huge performance regression on AIM7 (and potentially other BKL-heavy benchmarks) because the generic semaphores had been rewritten to be simple to understand and fair. The latter, in particular, turns a semaphore-based BKL implementation into a mess of scheduling. The attempt to fix the performance regression failed miserably (see the previous commit 00b41ec2611dc98f87f30753ee00a53db648d662 'Revert "semaphore: fix"'), and so for now the simple and sane approach is to instead just go back to the old spinlock-based BKL implementation that never had any issues like this. This patch also has the advantage of being reported to fix the regression completely according to Yanmin Zhang, unlike the semaphore hack which still left a couple percentage point regression. As a spinlock, the BKL obviously has the potential to be a latency issue, but it's not really any different from any other spinlock in that respect. We do want to get rid of the BKL asap, but that has been the plan for several years. These days, the biggest users are in the tty layer (open/release in particular) and Alan holds out some hope: "tty release is probably a few months away from getting cured - I'm afraid it will almost certainly be the very last user of the BKL in tty to get fixed as it depends on everything else being sanely locked." so while we're not there yet, we do have a plan of action. Tested-by: Yanmin Zhang Cc: Ingo Molnar Cc: Andi Kleen Cc: Matthew Wilcox Cc: Alexander Viro Cc: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/hardirq.h | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/hardirq.h b/include/linux/hardirq.h index 897f723..181006c 100644 --- a/include/linux/hardirq.h +++ b/include/linux/hardirq.h @@ -72,6 +72,14 @@ #define in_softirq() (softirq_count()) #define in_interrupt() (irq_count()) +#if defined(CONFIG_PREEMPT) +# define PREEMPT_INATOMIC_BASE kernel_locked() +# define PREEMPT_CHECK_OFFSET 1 +#else +# define PREEMPT_INATOMIC_BASE 0 +# define PREEMPT_CHECK_OFFSET 0 +#endif + /* * Are we running in atomic context? WARNING: this macro cannot * always detect atomic context; in particular, it cannot know about @@ -79,17 +87,11 @@ * used in the general case to determine whether sleeping is possible. * Do not use in_atomic() in driver code. */ -#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != 0) - -#ifdef CONFIG_PREEMPT -# define PREEMPT_CHECK_OFFSET 1 -#else -# define PREEMPT_CHECK_OFFSET 0 -#endif +#define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE) /* * Check whether we were atomic before we did preempt_disable(): - * (used by the scheduler) + * (used by the scheduler, *after* releasing the kernel lock) */ #define in_atomic_preempt_off() \ ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET) -- cgit v1.1 From 986bef854fab44012df678a5b51817d5274d3ca1 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 10 May 2008 21:11:23 -0700 Subject: sparc: Fix ptrace() detach. Forever we had a PTRACE_SUNOS_DETACH which was unconditionally recognized, regardless of the personality of the process. Unfortunately, this value is what ended up in the GLIBC sys/ptrace.h header file on sparc as PTRACE_DETACH and PT_DETACH. So continue to recognize this old value. Luckily, it doesn't conflict with anything we actually care about. Signed-off-by: David S. Miller --- include/asm-sparc/ptrace.h | 1 + include/asm-sparc64/ptrace.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index 8201a7b..c253342 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -149,6 +149,7 @@ extern void show_regs(struct pt_regs *); #define SF_XXARG 0x5c /* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 #define PTRACE_GETFPREGS 14 diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h index 714b819..8236565 100644 --- a/include/asm-sparc64/ptrace.h +++ b/include/asm-sparc64/ptrace.h @@ -298,6 +298,7 @@ extern void __show_regs(struct pt_regs *); #define SF_XXARG 0x5c /* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 #define PTRACE_GETFPREGS 14 -- cgit v1.1 From 28e6103665301ce60634e8a77f0b657c6cc099de Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sun, 11 May 2008 02:07:19 -0700 Subject: sparc: Fix debugger syscall restart interactions. So, forever, we've had this ptrace_signal_deliver implementation which tries to handle all of the nasties that can occur when the debugger looks at a process about to take a signal. It's meant to address all of these issues inside of the kernel so that the debugger need not be mindful of such things. Problem is, this doesn't work. The idea was that we should do the syscall restart business first, so that the debugger captures that state. Otherwise, if the debugger for example saves the child's state, makes the child execute something else, then restores the saved state, we won't handle the syscall restart properly because we lose the "we're in a syscall" state. The code here worked for most cases, but if the debugger actually passes the signal through to the child unaltered, it's possible that we would do a syscall restart when we shouldn't have. In particular this breaks the case of debugging a process under a gdb which is being debugged by yet another gdb. gdb uses sigsuspend to wait for SIGCHLD of the inferior, but if gdb itself is being debugged by a top-level gdb we get a ptrace_stop(). The top-level gdb does a PTRACE_CONT with SIGCHLD to let the inferior gdb see the signal. But ptrace_signal_deliver() assumed the debugger would cancel out the signal and therefore did a syscall restart, because the return error was ERESTARTNOHAND. Fix this by simply making ptrace_signal_deliver() a nop, and providing a way for the debugger to control system call restarting properly: 1) Report a "in syscall" software bit in regs->{tstate,psr}. It is set early on in trap entry to a system call and is fully visible to the debugger via ptrace() and regsets. 2) Test this bit right before doing a syscall restart. We have to do a final recheck right after get_signal_to_deliver() in case the debugger cleared the bit during ptrace_stop(). 3) Clear the bit in trap return so we don't accidently try to set that bit in the real register. As a result we also get a ptrace_{is,clear}_syscall() for sparc32 just like sparc64 has. M68K has this same exact bug, and is now the only other user of the ptrace_signal_deliver hook. It needs to be fixed in the same exact way as sparc. Signed-off-by: David S. Miller --- include/asm-sparc/psr.h | 1 + include/asm-sparc/ptrace.h | 10 ++++++++++ include/asm-sparc/signal.h | 8 +------- include/asm-sparc64/psrcompat.h | 2 ++ include/asm-sparc64/pstate.h | 1 + include/asm-sparc64/ptrace.h | 10 ++++------ include/asm-sparc64/signal.h | 8 +------- include/asm-sparc64/ttable.h | 7 ++++--- 8 files changed, 24 insertions(+), 23 deletions(-) (limited to 'include') diff --git a/include/asm-sparc/psr.h b/include/asm-sparc/psr.h index 19c9780..2139704 100644 --- a/include/asm-sparc/psr.h +++ b/include/asm-sparc/psr.h @@ -25,6 +25,7 @@ #define PSR_PIL 0x00000f00 /* processor interrupt level */ #define PSR_EF 0x00001000 /* enable floating point */ #define PSR_EC 0x00002000 /* enable co-processor */ +#define PSR_SYSCALL 0x00004000 /* inside of a syscall */ #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ #define PSR_ICC 0x00f00000 /* integer condition codes */ #define PSR_C 0x00100000 /* carry bit */ diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index c253342..6b5e6ce 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -39,6 +39,16 @@ struct pt_regs { #define UREG_FP UREG_I6 #define UREG_RETPC UREG_I7 +static inline bool pt_regs_is_syscall(struct pt_regs *regs) +{ + return (regs->psr & PSR_SYSCALL); +} + +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) +{ + return (regs->psr &= ~PSR_SYSCALL); +} + /* A register window */ struct reg_window { unsigned long locals[8]; diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h index d03a21c..94071c7 100644 --- a/include/asm-sparc/signal.h +++ b/include/asm-sparc/signal.h @@ -199,13 +199,7 @@ typedef struct sigaltstack { size_t ss_size; } stack_t; -struct sparc_deliver_cookie { - int restart_syscall; - unsigned long orig_i0; -}; - -struct pt_regs; -extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie); +#define ptrace_signal_deliver(regs, cookie) do { } while (0) #endif /* !(__KERNEL__) */ diff --git a/include/asm-sparc64/psrcompat.h b/include/asm-sparc64/psrcompat.h index 5590ce6..3614ca0 100644 --- a/include/asm-sparc64/psrcompat.h +++ b/include/asm-sparc64/psrcompat.h @@ -12,6 +12,7 @@ #define PSR_PIL 0x00000f00 /* processor interrupt level */ #define PSR_EF 0x00001000 /* enable floating point */ #define PSR_EC 0x00002000 /* enable co-processor */ +#define PSR_SYSCALL 0x00004000 /* inside of a syscall */ #define PSR_LE 0x00008000 /* SuperSparcII little-endian */ #define PSR_ICC 0x00f00000 /* integer condition codes */ #define PSR_C 0x00100000 /* carry bit */ @@ -30,6 +31,7 @@ static inline unsigned int tstate_to_psr(unsigned long tstate) PSR_S | ((tstate & TSTATE_ICC) >> 12) | ((tstate & TSTATE_XCC) >> 20) | + ((tstate & TSTATE_SYSCALL) ? PSR_SYSCALL : 0) | PSR_V8PLUS); } diff --git a/include/asm-sparc64/pstate.h b/include/asm-sparc64/pstate.h index f3c4548..949aeba 100644 --- a/include/asm-sparc64/pstate.h +++ b/include/asm-sparc64/pstate.h @@ -62,6 +62,7 @@ #define TSTATE_PRIV _AC(0x0000000000000400,UL) /* Privilege. */ #define TSTATE_IE _AC(0x0000000000000200,UL) /* Interrupt Enable. */ #define TSTATE_AG _AC(0x0000000000000100,UL) /* Alternate Globals.*/ +#define TSTATE_SYSCALL _AC(0x0000000000000020,UL) /* in syscall trap */ #define TSTATE_CWP _AC(0x000000000000001f,UL) /* Curr Win-Pointer. */ /* Floating-Point Registers State Register. diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h index 8236565..90972a5 100644 --- a/include/asm-sparc64/ptrace.h +++ b/include/asm-sparc64/ptrace.h @@ -42,16 +42,14 @@ static inline int pt_regs_trap_type(struct pt_regs *regs) return regs->magic & 0x1ff; } -static inline int pt_regs_clear_trap_type(struct pt_regs *regs) +static inline bool pt_regs_is_syscall(struct pt_regs *regs) { - return regs->magic &= ~0x1ff; + return (regs->tstate & TSTATE_SYSCALL); } -static inline bool pt_regs_is_syscall(struct pt_regs *regs) +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) { - int tt = pt_regs_trap_type(regs); - - return (tt == 0x110 || tt == 0x111 || tt == 0x16d); + return (regs->tstate &= ~TSTATE_SYSCALL); } struct pt_regs32 { diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h index fa6f467..c49f32d 100644 --- a/include/asm-sparc64/signal.h +++ b/include/asm-sparc64/signal.h @@ -186,13 +186,7 @@ struct k_sigaction { void __user *ka_restorer; }; -struct signal_deliver_cookie { - int restart_syscall; - unsigned long orig_i0; -}; - -struct pt_regs; -extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie); +#define ptrace_signal_deliver(regs, cookie) do { } while (0) #endif /* !(__KERNEL__) */ diff --git a/include/asm-sparc64/ttable.h b/include/asm-sparc64/ttable.h index 1b55538..52d67d3 100644 --- a/include/asm-sparc64/ttable.h +++ b/include/asm-sparc64/ttable.h @@ -91,13 +91,14 @@ nop; #define SYSCALL_TRAP(routine, systbl) \ + rdpr %pil, %g2; \ + mov TSTATE_SYSCALL, %g3; \ sethi %hi(109f), %g7; \ - ba,pt %xcc, etrap; \ + ba,pt %xcc, etrap_syscall; \ 109: or %g7, %lo(109b), %g7; \ sethi %hi(systbl), %l7; \ ba,pt %xcc, routine; \ - or %l7, %lo(systbl), %l7; \ - nop; nop; + or %l7, %lo(systbl), %l7; #define TRAP_UTRAP(handler,lvl) \ mov handler, %g3; \ -- cgit v1.1 From 60b129d7bfa3e20450816983bd52c49bb0bc1c21 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 11 May 2008 20:37:06 +0200 Subject: i2c: Match dummy devices by type As the old driver_name/type matching scheme is going away soon, change the dummy device mechanism to use the new matching scheme. This has the downside that dummy i2c clients can no longer choose their name, they'll all appear as "dummy" in sysfs and in log messages. I don't think it is a problem in practice though, as there is little reason to use these i2c clients to log messages. Signed-off-by: Jean Delvare --- include/linux/i2c.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/i2c.h b/include/linux/i2c.h index cb63da5..6716ec8 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -262,7 +262,7 @@ i2c_new_probed_device(struct i2c_adapter *adap, * client handles for the extra addresses. */ extern struct i2c_client * -i2c_new_dummy(struct i2c_adapter *adap, u16 address, const char *type); +i2c_new_dummy(struct i2c_adapter *adap, u16 address); extern void i2c_unregister_device(struct i2c_client *); -- cgit v1.1 From ae429083efe996ca2c569c44fd6fea440676dc33 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Sun, 11 May 2008 20:37:06 +0200 Subject: i2c: Convert some more new-style drivers to use module aliasing Update 3 more new-style i2c drivers to use standard module aliasing instead of the old driver_name/type driver matching scheme. These video drivers aren't used yet so converting them is trivial. Signed-off-by: Jean Delvare --- include/media/v4l2-i2c-drv-legacy.h | 2 ++ include/media/v4l2-i2c-drv.h | 2 ++ 2 files changed, 4 insertions(+) (limited to 'include') diff --git a/include/media/v4l2-i2c-drv-legacy.h b/include/media/v4l2-i2c-drv-legacy.h index 347b6f8..8785622 100644 --- a/include/media/v4l2-i2c-drv-legacy.h +++ b/include/media/v4l2-i2c-drv-legacy.h @@ -31,6 +31,7 @@ struct v4l2_i2c_driver_data { int (*resume)(struct i2c_client *client); int (*legacy_probe)(struct i2c_adapter *adapter); int legacy_class; + const struct i2c_device_id *id_table; }; static struct v4l2_i2c_driver_data v4l2_i2c_data; @@ -124,6 +125,7 @@ static int __init v4l2_i2c_drv_init(void) v4l2_i2c_driver.command = v4l2_i2c_data.command; v4l2_i2c_driver.probe = v4l2_i2c_data.probe; v4l2_i2c_driver.remove = v4l2_i2c_data.remove; + v4l2_i2c_driver.id_table = v4l2_i2c_data.id_table; err = i2c_add_driver(&v4l2_i2c_driver); if (err) i2c_del_driver(&v4l2_i2c_driver_legacy); diff --git a/include/media/v4l2-i2c-drv.h b/include/media/v4l2-i2c-drv.h index 7b6f06b..40ecef2 100644 --- a/include/media/v4l2-i2c-drv.h +++ b/include/media/v4l2-i2c-drv.h @@ -36,6 +36,7 @@ struct v4l2_i2c_driver_data { int (*resume)(struct i2c_client *client); int (*legacy_probe)(struct i2c_adapter *adapter); int legacy_class; + const struct i2c_device_id *id_table; }; static struct v4l2_i2c_driver_data v4l2_i2c_data; @@ -53,6 +54,7 @@ static int __init v4l2_i2c_drv_init(void) v4l2_i2c_driver.remove = v4l2_i2c_data.remove; v4l2_i2c_driver.suspend = v4l2_i2c_data.suspend; v4l2_i2c_driver.resume = v4l2_i2c_data.resume; + v4l2_i2c_driver.id_table = v4l2_i2c_data.id_table; return i2c_add_driver(&v4l2_i2c_driver); } -- cgit v1.1 From b5e10df665e756c2c68442177e460d90bb9cf979 Mon Sep 17 00:00:00 2001 From: Robert Reif Date: Sun, 11 May 2008 15:47:05 -0700 Subject: sparc32: Fix build. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix sparc32 build error due to undefined bool type. CC [M] fs/ocfs2/dlm/userdlm.o In file included from include/asm/sigcontext.h:6, from include/asm/signal.h:5, from include/linux/signal.h:4, from fs/ocfs2/dlm/userdlm.c:30: include/asm/ptrace.h:42: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘pt_regs_is_syscall’ include/asm/ptrace.h:47: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘pt_regs_clear_syscall’ make[3]: *** [fs/ocfs2/dlm/userdlm.o] Error 1 make[2]: *** [fs/ocfs2/dlm] Error 2 make[1]: *** [fs/ocfs2] Error 2 make: *** [fs] Error 2 Signed-off-by: Robert Reif Signed-off-by: David S. Miller --- include/asm-sparc/ptrace.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index 6b5e6ce..0afb867 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -10,6 +10,8 @@ #ifndef __ASSEMBLY__ +#include + struct pt_regs { unsigned long psr; unsigned long pc; -- cgit v1.1 From c3921ab71507b108d51a0f1ee960f80cd668a93d Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sun, 11 May 2008 16:04:48 -0700 Subject: Add new 'cond_resched_bkl()' helper function It acts exactly like a regular 'cond_resched()', but will not get optimized away when CONFIG_PREEMPT is set. Normal kernel code is already preemptable in the presense of CONFIG_PREEMPT, so cond_resched() is optimized away (see commit 02b67cc3ba36bdba351d6c3a00593f4ec550d9d3 "sched: do not do cond_resched() when CONFIG_PREEMPT"). But when wanting to conditionally reschedule while holding a lock, you need to use "cond_sched_lock(lock)", and the new function is the BKL equivalent of that. Also make fs/locks.c use it. Signed-off-by: Linus Torvalds --- include/linux/sched.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 0c35b03..4ab9f32 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2037,13 +2037,13 @@ static inline int need_resched(void) * cond_resched_lock() will drop the spinlock before scheduling, * cond_resched_softirq() will enable bhs before scheduling. */ +extern int _cond_resched(void); #ifdef CONFIG_PREEMPT static inline int cond_resched(void) { return 0; } #else -extern int _cond_resched(void); static inline int cond_resched(void) { return _cond_resched(); @@ -2051,6 +2051,10 @@ static inline int cond_resched(void) #endif extern int cond_resched_lock(spinlock_t * lock); extern int cond_resched_softirq(void); +static inline int cond_resched_bkl(void) +{ + return _cond_resched(); +} /* * Does a critical section need to be broken due to another -- cgit v1.1 From 4951704b4e23d71b99ac933d8e6993bc6225ac13 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 12 May 2008 03:29:11 -0700 Subject: syncppp: Fix crashes. The syncppp layer wants a mid-level netdev private pointer. It was using netdev->priv but that only worked by accident, and thus this scheme was broken when the device private allocation strategy changed. Add a proper mid-layer private pointer for uses like this, update syncppp and all users, and remove the HDLC_PPP broken tag from drivers/net/wan/Kconfig Signed-off-by: David S. Miller --- include/linux/netdevice.h | 3 +++ include/net/syncppp.h | 2 +- 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 7c1d446..7469017 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -715,6 +715,9 @@ struct net_device struct net *nd_net; #endif + /* mid-layer private */ + void *ml_priv; + /* bridge stuff */ struct net_bridge_port *br_port; /* macvlan */ diff --git a/include/net/syncppp.h b/include/net/syncppp.h index 877efa4..e43f407 100644 --- a/include/net/syncppp.h +++ b/include/net/syncppp.h @@ -59,7 +59,7 @@ struct ppp_device static inline struct sppp *sppp_of(struct net_device *dev) { - struct ppp_device **ppp = dev->priv; + struct ppp_device **ppp = dev->ml_priv; BUG_ON((*ppp)->dev != dev); return &(*ppp)->sppp; } -- cgit v1.1 From 0d4b6b901c3d41beb0e1620316aee0aa234edf7f Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 12 May 2008 22:57:51 +1000 Subject: [POWERPC] ppc: More compile fixes This fixes a few more miscellaneous compile problems with ARCH=ppc. 1. Don't compile devres.c on ARCH=ppc, it doesn't have ioremap_flags. 2. Include in setup.c for the __DO_IRQ_CANON definition. 3. Include in residual.c for the definition of create_proc_read_entry. 4. Fix xchg_ptr to be a static inline to eliminate a compiler warning. Signed-off-by: Paul Mackerras --- include/asm-ppc/system.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/system.h b/include/asm-ppc/system.h index 0593cb8..70ebd33 100644 --- a/include/asm-ppc/system.h +++ b/include/asm-ppc/system.h @@ -178,7 +178,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size } -extern inline void * xchg_ptr(void * m, void * val) +static inline void * xchg_ptr(void * m, void * val) { return (void *) xchg_u32(m, (unsigned long) val); } -- cgit v1.1 From 1928cc84a0a937ce7042d9235996ab380f36f18a Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Wed, 16 Apr 2008 15:32:22 +0200 Subject: [MIPS] MT: Functional fixes and a little reformatting of APRP support Signed-off-by: Kevin D. Kissell Signed-off-by: Ralf Baechle --- include/asm-mips/rtlx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-mips/rtlx.h b/include/asm-mips/rtlx.h index 65778c8..20b6660 100644 --- a/include/asm-mips/rtlx.h +++ b/include/asm-mips/rtlx.h @@ -29,13 +29,13 @@ extern unsigned int rtlx_read_poll(int index, int can_sleep); extern unsigned int rtlx_write_poll(int index); enum rtlx_state { - RTLX_STATE_UNUSED, + RTLX_STATE_UNUSED = 0, RTLX_STATE_INITIALISED, RTLX_STATE_REMOTE_READY, RTLX_STATE_OPENED }; -#define RTLX_BUFFER_SIZE 1024 +#define RTLX_BUFFER_SIZE 2048 /* each channel supports read and write. linux (vpe0) reads lx_buffer and writes rt_buffer -- cgit v1.1 From ad1d77a38575644b112340fd9115ac21dd533166 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 1 May 2008 15:28:53 +0100 Subject: [MIPS] Add empty argument parenthesis to GCC_IMM_ASM This is to clarify that GCC_IMM_ASM does not take an argument as the context of the macro's invocation seems to imply. As suggested by Maciej W. Rozycki (macro@linux-mips.org). Signed-off-by: Ralf Baechle --- include/asm-mips/compiler.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-mips/compiler.h b/include/asm-mips/compiler.h index aa6b876..71f5c5c 100644 --- a/include/asm-mips/compiler.h +++ b/include/asm-mips/compiler.h @@ -9,10 +9,10 @@ #define _ASM_COMPILER_H #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4) -#define GCC_IMM_ASM "n" +#define GCC_IMM_ASM() "n" #define GCC_REG_ACCUM "$0" #else -#define GCC_IMM_ASM "rn" +#define GCC_IMM_ASM() "rn" #define GCC_REG_ACCUM "accum" #endif -- cgit v1.1 From ff6814d53016081947ff4021e00db3f806a561c9 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:18:35 +0400 Subject: [MIPS] Alchemy common headers style cleanup Fix several errors and warnings given by checkpatch.pl: - space after opening and before closing parentheses; - opening brace following 'struct' not on the same line; - leading spaces instead of tabs; - use of C99 // comments; - macros with complex values not enclosed in parentheses; - missing space between the type and asterisk in a variable declaration; - space between asterisk and function name; - including instead of and instead of ; - use of '__inline__' instead of 'inline'; - space between function name and opening parenthesis; - line over 80 characters. In addition to these changes, also do the following: - remove needless parentheses; - insert spaces between operator and its operands; - replace spaces after the macro name with tabs in the #define directives and after the type in the structure field declarations; - remove excess tabs after the macro name in the #define directives and in the 'extern' variable declarations; - remove excess spaces between # and define for the SSI_*_MASK macros to align with other such macros; - put '||' operator on the same line with its first operand; - properly indent multi-line function prototypes; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line and/or adding space/asterisk on their left side; - make two-line comments that only have one line of text one-line; - convert the large multi-line comment in au1xxx_ide.h into several one-liners, replace spaces with tabs there; - fix typos/errors, capitalize acronyms, etc. in the comments; - insert missing and remove excess new lines; - update MontaVista copyright; - remove Pete Popov's and Steve Longerbeam's old email addresses... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-au1x00/au1000.h | 1644 +++++++++++++-------------- include/asm-mips/mach-au1x00/au1000_dma.h | 179 +-- include/asm-mips/mach-au1x00/au1000_gpio.h | 18 +- include/asm-mips/mach-au1x00/au1550_spi.h | 2 +- include/asm-mips/mach-au1x00/au1xxx.h | 4 +- include/asm-mips/mach-au1x00/au1xxx_dbdma.h | 155 ++- include/asm-mips/mach-au1x00/au1xxx_ide.h | 251 ++-- include/asm-mips/mach-au1x00/au1xxx_psc.h | 131 +-- 8 files changed, 1175 insertions(+), 1209 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index a0555516..363a14e 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -40,8 +40,8 @@ #include #include -#include -#include +#include +#include /* cpu pipeline flush */ void static inline au_sync(void) @@ -63,32 +63,32 @@ void static inline au_sync_delay(int ms) void static inline au_writeb(u8 val, unsigned long reg) { - *(volatile u8 *)(reg) = val; + *(volatile u8 *)reg = val; } void static inline au_writew(u16 val, unsigned long reg) { - *(volatile u16 *)(reg) = val; + *(volatile u16 *)reg = val; } void static inline au_writel(u32 val, unsigned long reg) { - *(volatile u32 *)(reg) = val; + *(volatile u32 *)reg = val; } static inline u8 au_readb(unsigned long reg) { - return (*(volatile u8 *)reg); + return *(volatile u8 *)reg; } static inline u16 au_readw(unsigned long reg) { - return (*(volatile u16 *)reg); + return *(volatile u16 *)reg; } static inline u32 au_readl(unsigned long reg) { - return (*(volatile u32 *)reg); + return *(volatile u32 *)reg; } @@ -117,76 +117,77 @@ extern struct au1xxx_irqmap au1xxx_irq_map[]; #endif /* !defined (_LANGUAGE_ASSEMBLY) */ /* - * SDRAM Register Offsets + * SDRAM register offsets */ -#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1100) -#define MEM_SDMODE0 (0x0000) -#define MEM_SDMODE1 (0x0004) -#define MEM_SDMODE2 (0x0008) -#define MEM_SDADDR0 (0x000C) -#define MEM_SDADDR1 (0x0010) -#define MEM_SDADDR2 (0x0014) -#define MEM_SDREFCFG (0x0018) -#define MEM_SDPRECMD (0x001C) -#define MEM_SDAUTOREF (0x0020) -#define MEM_SDWRMD0 (0x0024) -#define MEM_SDWRMD1 (0x0028) -#define MEM_SDWRMD2 (0x002C) -#define MEM_SDSLEEP (0x0030) -#define MEM_SDSMCKE (0x0034) +#if defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1500) || \ + defined(CONFIG_SOC_AU1100) +#define MEM_SDMODE0 0x0000 +#define MEM_SDMODE1 0x0004 +#define MEM_SDMODE2 0x0008 +#define MEM_SDADDR0 0x000C +#define MEM_SDADDR1 0x0010 +#define MEM_SDADDR2 0x0014 +#define MEM_SDREFCFG 0x0018 +#define MEM_SDPRECMD 0x001C +#define MEM_SDAUTOREF 0x0020 +#define MEM_SDWRMD0 0x0024 +#define MEM_SDWRMD1 0x0028 +#define MEM_SDWRMD2 0x002C +#define MEM_SDSLEEP 0x0030 +#define MEM_SDSMCKE 0x0034 /* * MEM_SDMODE register content definitions */ -#define MEM_SDMODE_F (1<<22) -#define MEM_SDMODE_SR (1<<21) -#define MEM_SDMODE_BS (1<<20) -#define MEM_SDMODE_RS (3<<18) -#define MEM_SDMODE_CS (7<<15) -#define MEM_SDMODE_TRAS (15<<11) -#define MEM_SDMODE_TMRD (3<<9) -#define MEM_SDMODE_TWR (3<<7) -#define MEM_SDMODE_TRP (3<<5) -#define MEM_SDMODE_TRCD (3<<3) -#define MEM_SDMODE_TCL (7<<0) - -#define MEM_SDMODE_BS_2Bank (0<<20) -#define MEM_SDMODE_BS_4Bank (1<<20) -#define MEM_SDMODE_RS_11Row (0<<18) -#define MEM_SDMODE_RS_12Row (1<<18) -#define MEM_SDMODE_RS_13Row (2<<18) -#define MEM_SDMODE_RS_N(N) ((N)<<18) -#define MEM_SDMODE_CS_7Col (0<<15) -#define MEM_SDMODE_CS_8Col (1<<15) -#define MEM_SDMODE_CS_9Col (2<<15) -#define MEM_SDMODE_CS_10Col (3<<15) -#define MEM_SDMODE_CS_11Col (4<<15) -#define MEM_SDMODE_CS_N(N) ((N)<<15) -#define MEM_SDMODE_TRAS_N(N) ((N)<<11) -#define MEM_SDMODE_TMRD_N(N) ((N)<<9) -#define MEM_SDMODE_TWR_N(N) ((N)<<7) -#define MEM_SDMODE_TRP_N(N) ((N)<<5) -#define MEM_SDMODE_TRCD_N(N) ((N)<<3) -#define MEM_SDMODE_TCL_N(N) ((N)<<0) +#define MEM_SDMODE_F (1 << 22) +#define MEM_SDMODE_SR (1 << 21) +#define MEM_SDMODE_BS (1 << 20) +#define MEM_SDMODE_RS (3 << 18) +#define MEM_SDMODE_CS (7 << 15) +#define MEM_SDMODE_TRAS (15 << 11) +#define MEM_SDMODE_TMRD (3 << 9) +#define MEM_SDMODE_TWR (3 << 7) +#define MEM_SDMODE_TRP (3 << 5) +#define MEM_SDMODE_TRCD (3 << 3) +#define MEM_SDMODE_TCL (7 << 0) + +#define MEM_SDMODE_BS_2Bank (0 << 20) +#define MEM_SDMODE_BS_4Bank (1 << 20) +#define MEM_SDMODE_RS_11Row (0 << 18) +#define MEM_SDMODE_RS_12Row (1 << 18) +#define MEM_SDMODE_RS_13Row (2 << 18) +#define MEM_SDMODE_RS_N(N) ((N) << 18) +#define MEM_SDMODE_CS_7Col (0 << 15) +#define MEM_SDMODE_CS_8Col (1 << 15) +#define MEM_SDMODE_CS_9Col (2 << 15) +#define MEM_SDMODE_CS_10Col (3 << 15) +#define MEM_SDMODE_CS_11Col (4 << 15) +#define MEM_SDMODE_CS_N(N) ((N) << 15) +#define MEM_SDMODE_TRAS_N(N) ((N) << 11) +#define MEM_SDMODE_TMRD_N(N) ((N) << 9) +#define MEM_SDMODE_TWR_N(N) ((N) << 7) +#define MEM_SDMODE_TRP_N(N) ((N) << 5) +#define MEM_SDMODE_TRCD_N(N) ((N) << 3) +#define MEM_SDMODE_TCL_N(N) ((N) << 0) /* * MEM_SDADDR register contents definitions */ -#define MEM_SDADDR_E (1<<20) -#define MEM_SDADDR_CSBA (0x03FF<<10) -#define MEM_SDADDR_CSMASK (0x03FF<<0) -#define MEM_SDADDR_CSBA_N(N) ((N)&(0x03FF<<22)>>12) -#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF<<22)>>22) +#define MEM_SDADDR_E (1 << 20) +#define MEM_SDADDR_CSBA (0x03FF << 10) +#define MEM_SDADDR_CSMASK (0x03FF << 0) +#define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) +#define MEM_SDADDR_CSMASK_N(N) ((N)&(0x03FF << 22) >> 22) /* * MEM_SDREFCFG register content definitions */ -#define MEM_SDREFCFG_TRC (15<<28) -#define MEM_SDREFCFG_TRPM (3<<26) -#define MEM_SDREFCFG_E (1<<25) -#define MEM_SDREFCFG_RE (0x1ffffff<<0) -#define MEM_SDREFCFG_TRC_N(N) ((N)<>2)&0x3) -#define MAC_TX_BUFF0_LEN 0x8 -#define MAC_TX_BUFF1_STATUS 0x10 -#define MAC_TX_BUFF1_ADDR 0x14 -#define MAC_TX_BUFF1_LEN 0x18 -#define MAC_TX_BUFF2_STATUS 0x20 -#define MAC_TX_BUFF2_ADDR 0x24 -#define MAC_TX_BUFF2_LEN 0x28 -#define MAC_TX_BUFF3_STATUS 0x30 -#define MAC_TX_BUFF3_ADDR 0x34 -#define MAC_TX_BUFF3_LEN 0x38 - -#define MAC0_RX_DMA_ADDR 0xB4004100 -#define MAC1_RX_DMA_ADDR 0xB4004300 +#define MAC_TX_BUFF0_STATUS 0x0 +# define TX_FRAME_ABORTED (1 << 0) +# define TX_JAB_TIMEOUT (1 << 1) +# define TX_NO_CARRIER (1 << 2) +# define TX_LOSS_CARRIER (1 << 3) +# define TX_EXC_DEF (1 << 4) +# define TX_LATE_COLL_ABORT (1 << 5) +# define TX_EXC_COLL (1 << 6) +# define TX_UNDERRUN (1 << 7) +# define TX_DEFERRED (1 << 8) +# define TX_LATE_COLL (1 << 9) +# define TX_COLL_CNT_MASK (0xF << 10) +# define TX_PKT_RETRY (1 << 31) +#define MAC_TX_BUFF0_ADDR 0x4 +# define TX_DMA_ENABLE (1 << 0) +# define TX_T_DONE (1 << 1) +# define TX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) +#define MAC_TX_BUFF0_LEN 0x8 +#define MAC_TX_BUFF1_STATUS 0x10 +#define MAC_TX_BUFF1_ADDR 0x14 +#define MAC_TX_BUFF1_LEN 0x18 +#define MAC_TX_BUFF2_STATUS 0x20 +#define MAC_TX_BUFF2_ADDR 0x24 +#define MAC_TX_BUFF2_LEN 0x28 +#define MAC_TX_BUFF3_STATUS 0x30 +#define MAC_TX_BUFF3_ADDR 0x34 +#define MAC_TX_BUFF3_LEN 0x38 + +#define MAC0_RX_DMA_ADDR 0xB4004100 +#define MAC1_RX_DMA_ADDR 0xB4004300 /* offsets from MAC_RX_RING_ADDR */ -#define MAC_RX_BUFF0_STATUS 0x0 -# define RX_FRAME_LEN_MASK 0x3fff -# define RX_WDOG_TIMER (1<<14) -# define RX_RUNT (1<<15) -# define RX_OVERLEN (1<<16) -# define RX_COLL (1<<17) -# define RX_ETHER (1<<18) -# define RX_MII_ERROR (1<<19) -# define RX_DRIBBLING (1<<20) -# define RX_CRC_ERROR (1<<21) -# define RX_VLAN1 (1<<22) -# define RX_VLAN2 (1<<23) -# define RX_LEN_ERROR (1<<24) -# define RX_CNTRL_FRAME (1<<25) -# define RX_U_CNTRL_FRAME (1<<26) -# define RX_MCAST_FRAME (1<<27) -# define RX_BCAST_FRAME (1<<28) -# define RX_FILTER_FAIL (1<<29) -# define RX_PACKET_FILTER (1<<30) -# define RX_MISSED_FRAME (1<<31) +#define MAC_RX_BUFF0_STATUS 0x0 +# define RX_FRAME_LEN_MASK 0x3fff +# define RX_WDOG_TIMER (1 << 14) +# define RX_RUNT (1 << 15) +# define RX_OVERLEN (1 << 16) +# define RX_COLL (1 << 17) +# define RX_ETHER (1 << 18) +# define RX_MII_ERROR (1 << 19) +# define RX_DRIBBLING (1 << 20) +# define RX_CRC_ERROR (1 << 21) +# define RX_VLAN1 (1 << 22) +# define RX_VLAN2 (1 << 23) +# define RX_LEN_ERROR (1 << 24) +# define RX_CNTRL_FRAME (1 << 25) +# define RX_U_CNTRL_FRAME (1 << 26) +# define RX_MCAST_FRAME (1 << 27) +# define RX_BCAST_FRAME (1 << 28) +# define RX_FILTER_FAIL (1 << 29) +# define RX_PACKET_FILTER (1 << 30) +# define RX_MISSED_FRAME (1 << 31) # define RX_ERROR (RX_WDOG_TIMER | RX_RUNT | RX_OVERLEN | \ - RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \ - RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) -#define MAC_RX_BUFF0_ADDR 0x4 -# define RX_DMA_ENABLE (1<<0) -# define RX_T_DONE (1<<1) -# define RX_GET_DMA_BUFFER(X) (((X)>>2)&0x3) -# define RX_SET_BUFF_ADDR(X) ((X)&0xffffffc0) -#define MAC_RX_BUFF1_STATUS 0x10 -#define MAC_RX_BUFF1_ADDR 0x14 -#define MAC_RX_BUFF2_STATUS 0x20 -#define MAC_RX_BUFF2_ADDR 0x24 -#define MAC_RX_BUFF3_STATUS 0x30 -#define MAC_RX_BUFF3_ADDR 0x34 - + RX_COLL | RX_MII_ERROR | RX_CRC_ERROR | \ + RX_LEN_ERROR | RX_U_CNTRL_FRAME | RX_MISSED_FRAME) +#define MAC_RX_BUFF0_ADDR 0x4 +# define RX_DMA_ENABLE (1 << 0) +# define RX_T_DONE (1 << 1) +# define RX_GET_DMA_BUFFER(X) (((X) >> 2) & 0x3) +# define RX_SET_BUFF_ADDR(X) ((X) & 0xffffffc0) +#define MAC_RX_BUFF1_STATUS 0x10 +#define MAC_RX_BUFF1_ADDR 0x14 +#define MAC_RX_BUFF2_STATUS 0x20 +#define MAC_RX_BUFF2_ADDR 0x24 +#define MAC_RX_BUFF3_STATUS 0x30 +#define MAC_RX_BUFF3_ADDR 0x34 /* UARTS 0-3 */ -#define UART_BASE UART0_ADDR +#define UART_BASE UART0_ADDR #ifdef CONFIG_SOC_AU1200 -#define UART_DEBUG_BASE UART1_ADDR +#define UART_DEBUG_BASE UART1_ADDR #else -#define UART_DEBUG_BASE UART3_ADDR +#define UART_DEBUG_BASE UART3_ADDR #endif #define UART_RX 0 /* Receive buffer */ @@ -1294,341 +1293,337 @@ enum soc_au1200_ints { #define UART_MSR_DCTS 0x01 /* Delta CTS */ #define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ - - /* SSIO */ -#define SSI0_STATUS 0xB1600000 -# define SSI_STATUS_BF (1<<4) -# define SSI_STATUS_OF (1<<3) -# define SSI_STATUS_UF (1<<2) -# define SSI_STATUS_D (1<<1) -# define SSI_STATUS_B (1<<0) -#define SSI0_INT 0xB1600004 -# define SSI_INT_OI (1<<3) -# define SSI_INT_UI (1<<2) -# define SSI_INT_DI (1<<1) -#define SSI0_INT_ENABLE 0xB1600008 -# define SSI_INTE_OIE (1<<3) -# define SSI_INTE_UIE (1<<2) -# define SSI_INTE_DIE (1<<1) -#define SSI0_CONFIG 0xB1600020 -# define SSI_CONFIG_AO (1<<24) -# define SSI_CONFIG_DO (1<<23) -# define SSI_CONFIG_ALEN_BIT 20 -# define SSI_CONFIG_ALEN_MASK (0x7<<20) -# define SSI_CONFIG_DLEN_BIT 16 -# define SSI_CONFIG_DLEN_MASK (0x7<<16) -# define SSI_CONFIG_DD (1<<11) -# define SSI_CONFIG_AD (1<<10) -# define SSI_CONFIG_BM_BIT 8 -# define SSI_CONFIG_BM_MASK (0x3<<8) -# define SSI_CONFIG_CE (1<<7) -# define SSI_CONFIG_DP (1<<6) -# define SSI_CONFIG_DL (1<<5) -# define SSI_CONFIG_EP (1<<4) -#define SSI0_ADATA 0xB1600024 -# define SSI_AD_D (1<<24) -# define SSI_AD_ADDR_BIT 16 -# define SSI_AD_ADDR_MASK (0xff<<16) -# define SSI_AD_DATA_BIT 0 -# define SSI_AD_DATA_MASK (0xfff<<0) -#define SSI0_CLKDIV 0xB1600028 -#define SSI0_CONTROL 0xB1600100 -# define SSI_CONTROL_CD (1<<1) -# define SSI_CONTROL_E (1<<0) +#define SSI0_STATUS 0xB1600000 +# define SSI_STATUS_BF (1 << 4) +# define SSI_STATUS_OF (1 << 3) +# define SSI_STATUS_UF (1 << 2) +# define SSI_STATUS_D (1 << 1) +# define SSI_STATUS_B (1 << 0) +#define SSI0_INT 0xB1600004 +# define SSI_INT_OI (1 << 3) +# define SSI_INT_UI (1 << 2) +# define SSI_INT_DI (1 << 1) +#define SSI0_INT_ENABLE 0xB1600008 +# define SSI_INTE_OIE (1 << 3) +# define SSI_INTE_UIE (1 << 2) +# define SSI_INTE_DIE (1 << 1) +#define SSI0_CONFIG 0xB1600020 +# define SSI_CONFIG_AO (1 << 24) +# define SSI_CONFIG_DO (1 << 23) +# define SSI_CONFIG_ALEN_BIT 20 +# define SSI_CONFIG_ALEN_MASK (0x7 << 20) +# define SSI_CONFIG_DLEN_BIT 16 +# define SSI_CONFIG_DLEN_MASK (0x7 << 16) +# define SSI_CONFIG_DD (1 << 11) +# define SSI_CONFIG_AD (1 << 10) +# define SSI_CONFIG_BM_BIT 8 +# define SSI_CONFIG_BM_MASK (0x3 << 8) +# define SSI_CONFIG_CE (1 << 7) +# define SSI_CONFIG_DP (1 << 6) +# define SSI_CONFIG_DL (1 << 5) +# define SSI_CONFIG_EP (1 << 4) +#define SSI0_ADATA 0xB1600024 +# define SSI_AD_D (1 << 24) +# define SSI_AD_ADDR_BIT 16 +# define SSI_AD_ADDR_MASK (0xff << 16) +# define SSI_AD_DATA_BIT 0 +# define SSI_AD_DATA_MASK (0xfff << 0) +#define SSI0_CLKDIV 0xB1600028 +#define SSI0_CONTROL 0xB1600100 +# define SSI_CONTROL_CD (1 << 1) +# define SSI_CONTROL_E (1 << 0) /* SSI1 */ -#define SSI1_STATUS 0xB1680000 -#define SSI1_INT 0xB1680004 -#define SSI1_INT_ENABLE 0xB1680008 -#define SSI1_CONFIG 0xB1680020 -#define SSI1_ADATA 0xB1680024 -#define SSI1_CLKDIV 0xB1680028 -#define SSI1_ENABLE 0xB1680100 +#define SSI1_STATUS 0xB1680000 +#define SSI1_INT 0xB1680004 +#define SSI1_INT_ENABLE 0xB1680008 +#define SSI1_CONFIG 0xB1680020 +#define SSI1_ADATA 0xB1680024 +#define SSI1_CLKDIV 0xB1680028 +#define SSI1_ENABLE 0xB1680100 /* * Register content definitions */ -#define SSI_STATUS_BF (1<<4) -#define SSI_STATUS_OF (1<<3) -#define SSI_STATUS_UF (1<<2) -#define SSI_STATUS_D (1<<1) -#define SSI_STATUS_B (1<<0) +#define SSI_STATUS_BF (1 << 4) +#define SSI_STATUS_OF (1 << 3) +#define SSI_STATUS_UF (1 << 2) +#define SSI_STATUS_D (1 << 1) +#define SSI_STATUS_B (1 << 0) /* SSI_INT */ -#define SSI_INT_OI (1<<3) -#define SSI_INT_UI (1<<2) -#define SSI_INT_DI (1<<1) +#define SSI_INT_OI (1 << 3) +#define SSI_INT_UI (1 << 2) +#define SSI_INT_DI (1 << 1) /* SSI_INTEN */ -#define SSI_INTEN_OIE (1<<3) -#define SSI_INTEN_UIE (1<<2) -#define SSI_INTEN_DIE (1<<1) - -#define SSI_CONFIG_AO (1<<24) -#define SSI_CONFIG_DO (1<<23) -#define SSI_CONFIG_ALEN (7<<20) -#define SSI_CONFIG_DLEN (15<<16) -#define SSI_CONFIG_DD (1<<11) -#define SSI_CONFIG_AD (1<<10) -#define SSI_CONFIG_BM (3<<8) -#define SSI_CONFIG_CE (1<<7) -#define SSI_CONFIG_DP (1<<6) -#define SSI_CONFIG_DL (1<<5) -#define SSI_CONFIG_EP (1<<4) -#define SSI_CONFIG_ALEN_N(N) ((N-1)<<20) -#define SSI_CONFIG_DLEN_N(N) ((N-1)<<16) -#define SSI_CONFIG_BM_HI (0<<8) -#define SSI_CONFIG_BM_LO (1<<8) -#define SSI_CONFIG_BM_CY (2<<8) - -#define SSI_ADATA_D (1<<24) -#define SSI_ADATA_ADDR (0xFF<<16) -#define SSI_ADATA_DATA (0x0FFF) -#define SSI_ADATA_ADDR_N(N) (N<<16) - -#define SSI_ENABLE_CD (1<<1) -#define SSI_ENABLE_E (1<<0) - +#define SSI_INTEN_OIE (1 << 3) +#define SSI_INTEN_UIE (1 << 2) +#define SSI_INTEN_DIE (1 << 1) + +#define SSI_CONFIG_AO (1 << 24) +#define SSI_CONFIG_DO (1 << 23) +#define SSI_CONFIG_ALEN (7 << 20) +#define SSI_CONFIG_DLEN (15 << 16) +#define SSI_CONFIG_DD (1 << 11) +#define SSI_CONFIG_AD (1 << 10) +#define SSI_CONFIG_BM (3 << 8) +#define SSI_CONFIG_CE (1 << 7) +#define SSI_CONFIG_DP (1 << 6) +#define SSI_CONFIG_DL (1 << 5) +#define SSI_CONFIG_EP (1 << 4) +#define SSI_CONFIG_ALEN_N(N) ((N-1) << 20) +#define SSI_CONFIG_DLEN_N(N) ((N-1) << 16) +#define SSI_CONFIG_BM_HI (0 << 8) +#define SSI_CONFIG_BM_LO (1 << 8) +#define SSI_CONFIG_BM_CY (2 << 8) + +#define SSI_ADATA_D (1 << 24) +#define SSI_ADATA_ADDR (0xFF << 16) +#define SSI_ADATA_DATA 0x0FFF +#define SSI_ADATA_ADDR_N(N) (N << 16) + +#define SSI_ENABLE_CD (1 << 1) +#define SSI_ENABLE_E (1 << 0) /* IrDA Controller */ -#define IRDA_BASE 0xB0300000 -#define IR_RING_PTR_STATUS (IRDA_BASE+0x00) -#define IR_RING_BASE_ADDR_H (IRDA_BASE+0x04) -#define IR_RING_BASE_ADDR_L (IRDA_BASE+0x08) -#define IR_RING_SIZE (IRDA_BASE+0x0C) -#define IR_RING_PROMPT (IRDA_BASE+0x10) -#define IR_RING_ADDR_CMPR (IRDA_BASE+0x14) -#define IR_INT_CLEAR (IRDA_BASE+0x18) -#define IR_CONFIG_1 (IRDA_BASE+0x20) -# define IR_RX_INVERT_LED (1<<0) -# define IR_TX_INVERT_LED (1<<1) -# define IR_ST (1<<2) -# define IR_SF (1<<3) -# define IR_SIR (1<<4) -# define IR_MIR (1<<5) -# define IR_FIR (1<<6) -# define IR_16CRC (1<<7) -# define IR_TD (1<<8) -# define IR_RX_ALL (1<<9) -# define IR_DMA_ENABLE (1<<10) -# define IR_RX_ENABLE (1<<11) -# define IR_TX_ENABLE (1<<12) -# define IR_LOOPBACK (1<<14) -# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \ - IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) -#define IR_SIR_FLAGS (IRDA_BASE+0x24) -#define IR_ENABLE (IRDA_BASE+0x28) -# define IR_RX_STATUS (1<<9) -# define IR_TX_STATUS (1<<10) -#define IR_READ_PHY_CONFIG (IRDA_BASE+0x2C) -#define IR_WRITE_PHY_CONFIG (IRDA_BASE+0x30) -#define IR_MAX_PKT_LEN (IRDA_BASE+0x34) -#define IR_RX_BYTE_CNT (IRDA_BASE+0x38) -#define IR_CONFIG_2 (IRDA_BASE+0x3C) -# define IR_MODE_INV (1<<0) -# define IR_ONE_PIN (1<<1) -#define IR_INTERFACE_CONFIG (IRDA_BASE+0x40) +#define IRDA_BASE 0xB0300000 +#define IR_RING_PTR_STATUS (IRDA_BASE + 0x00) +#define IR_RING_BASE_ADDR_H (IRDA_BASE + 0x04) +#define IR_RING_BASE_ADDR_L (IRDA_BASE + 0x08) +#define IR_RING_SIZE (IRDA_BASE + 0x0C) +#define IR_RING_PROMPT (IRDA_BASE + 0x10) +#define IR_RING_ADDR_CMPR (IRDA_BASE + 0x14) +#define IR_INT_CLEAR (IRDA_BASE + 0x18) +#define IR_CONFIG_1 (IRDA_BASE + 0x20) +# define IR_RX_INVERT_LED (1 << 0) +# define IR_TX_INVERT_LED (1 << 1) +# define IR_ST (1 << 2) +# define IR_SF (1 << 3) +# define IR_SIR (1 << 4) +# define IR_MIR (1 << 5) +# define IR_FIR (1 << 6) +# define IR_16CRC (1 << 7) +# define IR_TD (1 << 8) +# define IR_RX_ALL (1 << 9) +# define IR_DMA_ENABLE (1 << 10) +# define IR_RX_ENABLE (1 << 11) +# define IR_TX_ENABLE (1 << 12) +# define IR_LOOPBACK (1 << 14) +# define IR_SIR_MODE (IR_SIR | IR_DMA_ENABLE | \ + IR_RX_ALL | IR_RX_ENABLE | IR_SF | IR_16CRC) +#define IR_SIR_FLAGS (IRDA_BASE + 0x24) +#define IR_ENABLE (IRDA_BASE + 0x28) +# define IR_RX_STATUS (1 << 9) +# define IR_TX_STATUS (1 << 10) +#define IR_READ_PHY_CONFIG (IRDA_BASE + 0x2C) +#define IR_WRITE_PHY_CONFIG (IRDA_BASE + 0x30) +#define IR_MAX_PKT_LEN (IRDA_BASE + 0x34) +#define IR_RX_BYTE_CNT (IRDA_BASE + 0x38) +#define IR_CONFIG_2 (IRDA_BASE + 0x3C) +# define IR_MODE_INV (1 << 0) +# define IR_ONE_PIN (1 << 1) +#define IR_INTERFACE_CONFIG (IRDA_BASE + 0x40) /* GPIO */ -#define SYS_PINFUNC 0xB190002C -# define SYS_PF_USB (1<<15) /* 2nd USB device/host */ -# define SYS_PF_U3 (1<<14) /* GPIO23/U3TXD */ -# define SYS_PF_U2 (1<<13) /* GPIO22/U2TXD */ -# define SYS_PF_U1 (1<<12) /* GPIO21/U1TXD */ -# define SYS_PF_SRC (1<<11) /* GPIO6/SROMCKE */ -# define SYS_PF_CK5 (1<<10) /* GPIO3/CLK5 */ -# define SYS_PF_CK4 (1<<9) /* GPIO2/CLK4 */ -# define SYS_PF_IRF (1<<8) /* GPIO15/IRFIRSEL */ -# define SYS_PF_UR3 (1<<7) /* GPIO[14:9]/UART3 */ -# define SYS_PF_I2D (1<<6) /* GPIO8/I2SDI */ -# define SYS_PF_I2S (1<<5) /* I2S/GPIO[29:31] */ -# define SYS_PF_NI2 (1<<4) /* NI2/GPIO[24:28] */ -# define SYS_PF_U0 (1<<3) /* U0TXD/GPIO20 */ -# define SYS_PF_RD (1<<2) /* IRTXD/GPIO19 */ -# define SYS_PF_A97 (1<<1) /* AC97/SSL1 */ -# define SYS_PF_S0 (1<<0) /* SSI_0/GPIO[16:18] */ - -/* Au1100 Only */ -# define SYS_PF_PC (1<<18) /* PCMCIA/GPIO[207:204] */ -# define SYS_PF_LCD (1<<17) /* extern lcd/GPIO[203:200] */ -# define SYS_PF_CS (1<<16) /* EXTCLK0/32khz to gpio2 */ -# define SYS_PF_EX0 (1<<9) /* gpio2/clock */ - -/* Au1550 Only. Redefines lots of pins */ -# define SYS_PF_PSC2_MASK (7 << 17) -# define SYS_PF_PSC2_AC97 (0) -# define SYS_PF_PSC2_SPI (0) -# define SYS_PF_PSC2_I2S (1 << 17) -# define SYS_PF_PSC2_SMBUS (3 << 17) -# define SYS_PF_PSC2_GPIO (7 << 17) -# define SYS_PF_PSC3_MASK (7 << 20) -# define SYS_PF_PSC3_AC97 (0) -# define SYS_PF_PSC3_SPI (0) -# define SYS_PF_PSC3_I2S (1 << 20) -# define SYS_PF_PSC3_SMBUS (3 << 20) -# define SYS_PF_PSC3_GPIO (7 << 20) -# define SYS_PF_PSC1_S1 (1 << 1) -# define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) - -/* Au1200 Only */ +#define SYS_PINFUNC 0xB190002C +# define SYS_PF_USB (1 << 15) /* 2nd USB device/host */ +# define SYS_PF_U3 (1 << 14) /* GPIO23/U3TXD */ +# define SYS_PF_U2 (1 << 13) /* GPIO22/U2TXD */ +# define SYS_PF_U1 (1 << 12) /* GPIO21/U1TXD */ +# define SYS_PF_SRC (1 << 11) /* GPIO6/SROMCKE */ +# define SYS_PF_CK5 (1 << 10) /* GPIO3/CLK5 */ +# define SYS_PF_CK4 (1 << 9) /* GPIO2/CLK4 */ +# define SYS_PF_IRF (1 << 8) /* GPIO15/IRFIRSEL */ +# define SYS_PF_UR3 (1 << 7) /* GPIO[14:9]/UART3 */ +# define SYS_PF_I2D (1 << 6) /* GPIO8/I2SDI */ +# define SYS_PF_I2S (1 << 5) /* I2S/GPIO[29:31] */ +# define SYS_PF_NI2 (1 << 4) /* NI2/GPIO[24:28] */ +# define SYS_PF_U0 (1 << 3) /* U0TXD/GPIO20 */ +# define SYS_PF_RD (1 << 2) /* IRTXD/GPIO19 */ +# define SYS_PF_A97 (1 << 1) /* AC97/SSL1 */ +# define SYS_PF_S0 (1 << 0) /* SSI_0/GPIO[16:18] */ + +/* Au1100 only */ +# define SYS_PF_PC (1 << 18) /* PCMCIA/GPIO[207:204] */ +# define SYS_PF_LCD (1 << 17) /* extern lcd/GPIO[203:200] */ +# define SYS_PF_CS (1 << 16) /* EXTCLK0/32KHz to gpio2 */ +# define SYS_PF_EX0 (1 << 9) /* GPIO2/clock */ + +/* Au1550 only. Redefines lots of pins */ +# define SYS_PF_PSC2_MASK (7 << 17) +# define SYS_PF_PSC2_AC97 0 +# define SYS_PF_PSC2_SPI 0 +# define SYS_PF_PSC2_I2S (1 << 17) +# define SYS_PF_PSC2_SMBUS (3 << 17) +# define SYS_PF_PSC2_GPIO (7 << 17) +# define SYS_PF_PSC3_MASK (7 << 20) +# define SYS_PF_PSC3_AC97 0 +# define SYS_PF_PSC3_SPI 0 +# define SYS_PF_PSC3_I2S (1 << 20) +# define SYS_PF_PSC3_SMBUS (3 << 20) +# define SYS_PF_PSC3_GPIO (7 << 20) +# define SYS_PF_PSC1_S1 (1 << 1) +# define SYS_PF_MUST_BE_SET ((1 << 5) | (1 << 2)) + +/* Au1200 only */ #ifdef CONFIG_SOC_AU1200 -#define SYS_PINFUNC_DMA (1<<31) -#define SYS_PINFUNC_S0A (1<<30) -#define SYS_PINFUNC_S1A (1<<29) -#define SYS_PINFUNC_LP0 (1<<28) -#define SYS_PINFUNC_LP1 (1<<27) -#define SYS_PINFUNC_LD16 (1<<26) -#define SYS_PINFUNC_LD8 (1<<25) -#define SYS_PINFUNC_LD1 (1<<24) -#define SYS_PINFUNC_LD0 (1<<23) -#define SYS_PINFUNC_P1A (3<<21) -#define SYS_PINFUNC_P1B (1<<20) -#define SYS_PINFUNC_FS3 (1<<19) -#define SYS_PINFUNC_P0A (3<<17) -#define SYS_PINFUNC_CS (1<<16) -#define SYS_PINFUNC_CIM (1<<15) -#define SYS_PINFUNC_P1C (1<<14) -#define SYS_PINFUNC_U1T (1<<12) -#define SYS_PINFUNC_U1R (1<<11) -#define SYS_PINFUNC_EX1 (1<<10) -#define SYS_PINFUNC_EX0 (1<<9) -#define SYS_PINFUNC_U0R (1<<8) -#define SYS_PINFUNC_MC (1<<7) -#define SYS_PINFUNC_S0B (1<<6) -#define SYS_PINFUNC_S0C (1<<5) -#define SYS_PINFUNC_P0B (1<<4) -#define SYS_PINFUNC_U0T (1<<3) -#define SYS_PINFUNC_S1B (1<<2) +#define SYS_PINFUNC_DMA (1 << 31) +#define SYS_PINFUNC_S0A (1 << 30) +#define SYS_PINFUNC_S1A (1 << 29) +#define SYS_PINFUNC_LP0 (1 << 28) +#define SYS_PINFUNC_LP1 (1 << 27) +#define SYS_PINFUNC_LD16 (1 << 26) +#define SYS_PINFUNC_LD8 (1 << 25) +#define SYS_PINFUNC_LD1 (1 << 24) +#define SYS_PINFUNC_LD0 (1 << 23) +#define SYS_PINFUNC_P1A (3 << 21) +#define SYS_PINFUNC_P1B (1 << 20) +#define SYS_PINFUNC_FS3 (1 << 19) +#define SYS_PINFUNC_P0A (3 << 17) +#define SYS_PINFUNC_CS (1 << 16) +#define SYS_PINFUNC_CIM (1 << 15) +#define SYS_PINFUNC_P1C (1 << 14) +#define SYS_PINFUNC_U1T (1 << 12) +#define SYS_PINFUNC_U1R (1 << 11) +#define SYS_PINFUNC_EX1 (1 << 10) +#define SYS_PINFUNC_EX0 (1 << 9) +#define SYS_PINFUNC_U0R (1 << 8) +#define SYS_PINFUNC_MC (1 << 7) +#define SYS_PINFUNC_S0B (1 << 6) +#define SYS_PINFUNC_S0C (1 << 5) +#define SYS_PINFUNC_P0B (1 << 4) +#define SYS_PINFUNC_U0T (1 << 3) +#define SYS_PINFUNC_S1B (1 << 2) #endif -#define SYS_TRIOUTRD 0xB1900100 -#define SYS_TRIOUTCLR 0xB1900100 -#define SYS_OUTPUTRD 0xB1900108 -#define SYS_OUTPUTSET 0xB1900108 -#define SYS_OUTPUTCLR 0xB190010C -#define SYS_PINSTATERD 0xB1900110 -#define SYS_PININPUTEN 0xB1900110 +#define SYS_TRIOUTRD 0xB1900100 +#define SYS_TRIOUTCLR 0xB1900100 +#define SYS_OUTPUTRD 0xB1900108 +#define SYS_OUTPUTSET 0xB1900108 +#define SYS_OUTPUTCLR 0xB190010C +#define SYS_PINSTATERD 0xB1900110 +#define SYS_PININPUTEN 0xB1900110 /* GPIO2, Au1500, Au1550 only */ -#define GPIO2_BASE 0xB1700000 -#define GPIO2_DIR (GPIO2_BASE + 0) -#define GPIO2_OUTPUT (GPIO2_BASE + 8) -#define GPIO2_PINSTATE (GPIO2_BASE + 0xC) -#define GPIO2_INTENABLE (GPIO2_BASE + 0x10) -#define GPIO2_ENABLE (GPIO2_BASE + 0x14) +#define GPIO2_BASE 0xB1700000 +#define GPIO2_DIR (GPIO2_BASE + 0) +#define GPIO2_OUTPUT (GPIO2_BASE + 8) +#define GPIO2_PINSTATE (GPIO2_BASE + 0xC) +#define GPIO2_INTENABLE (GPIO2_BASE + 0x10) +#define GPIO2_ENABLE (GPIO2_BASE + 0x14) /* Power Management */ -#define SYS_SCRATCH0 0xB1900018 -#define SYS_SCRATCH1 0xB190001C -#define SYS_WAKEMSK 0xB1900034 -#define SYS_ENDIAN 0xB1900038 -#define SYS_POWERCTRL 0xB190003C -#define SYS_WAKESRC 0xB190005C -#define SYS_SLPPWR 0xB1900078 -#define SYS_SLEEP 0xB190007C +#define SYS_SCRATCH0 0xB1900018 +#define SYS_SCRATCH1 0xB190001C +#define SYS_WAKEMSK 0xB1900034 +#define SYS_ENDIAN 0xB1900038 +#define SYS_POWERCTRL 0xB190003C +#define SYS_WAKESRC 0xB190005C +#define SYS_SLPPWR 0xB1900078 +#define SYS_SLEEP 0xB190007C /* Clock Controller */ -#define SYS_FREQCTRL0 0xB1900020 -# define SYS_FC_FRDIV2_BIT 22 -# define SYS_FC_FRDIV2_MASK (0xff << SYS_FC_FRDIV2_BIT) -# define SYS_FC_FE2 (1<<21) -# define SYS_FC_FS2 (1<<20) -# define SYS_FC_FRDIV1_BIT 12 -# define SYS_FC_FRDIV1_MASK (0xff << SYS_FC_FRDIV1_BIT) -# define SYS_FC_FE1 (1<<11) -# define SYS_FC_FS1 (1<<10) -# define SYS_FC_FRDIV0_BIT 2 -# define SYS_FC_FRDIV0_MASK (0xff << SYS_FC_FRDIV0_BIT) -# define SYS_FC_FE0 (1<<1) -# define SYS_FC_FS0 (1<<0) -#define SYS_FREQCTRL1 0xB1900024 -# define SYS_FC_FRDIV5_BIT 22 -# define SYS_FC_FRDIV5_MASK (0xff << SYS_FC_FRDIV5_BIT) -# define SYS_FC_FE5 (1<<21) -# define SYS_FC_FS5 (1<<20) -# define SYS_FC_FRDIV4_BIT 12 -# define SYS_FC_FRDIV4_MASK (0xff << SYS_FC_FRDIV4_BIT) -# define SYS_FC_FE4 (1<<11) -# define SYS_FC_FS4 (1<<10) -# define SYS_FC_FRDIV3_BIT 2 -# define SYS_FC_FRDIV3_MASK (0xff << SYS_FC_FRDIV3_BIT) -# define SYS_FC_FE3 (1<<1) -# define SYS_FC_FS3 (1<<0) -#define SYS_CLKSRC 0xB1900028 -# define SYS_CS_ME1_BIT 27 -# define SYS_CS_ME1_MASK (0x7< * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -31,7 +30,7 @@ #ifndef __ASM_AU1000_DMA_H #define __ASM_AU1000_DMA_H -#include /* need byte IO */ +#include /* need byte IO */ #include /* And spinlocks */ #include #include @@ -50,36 +49,36 @@ #define DMA_DAH_MASK (0x0f << 20) #define DMA_DID_BIT 16 #define DMA_DID_MASK (0x0f << DMA_DID_BIT) -#define DMA_DS (1<<15) -#define DMA_BE (1<<13) -#define DMA_DR (1<<12) -#define DMA_TS8 (1<<11) +#define DMA_DS (1 << 15) +#define DMA_BE (1 << 13) +#define DMA_DR (1 << 12) +#define DMA_TS8 (1 << 11) #define DMA_DW_BIT 9 #define DMA_DW_MASK (0x03 << DMA_DW_BIT) #define DMA_DW8 (0 << DMA_DW_BIT) #define DMA_DW16 (1 << DMA_DW_BIT) #define DMA_DW32 (2 << DMA_DW_BIT) -#define DMA_NC (1<<8) -#define DMA_IE (1<<7) -#define DMA_HALT (1<<6) -#define DMA_GO (1<<5) -#define DMA_AB (1<<4) -#define DMA_D1 (1<<3) -#define DMA_BE1 (1<<2) -#define DMA_D0 (1<<1) -#define DMA_BE0 (1<<0) - -#define DMA_PERIPHERAL_ADDR 0x00000008 -#define DMA_BUFFER0_START 0x0000000C -#define DMA_BUFFER1_START 0x00000014 -#define DMA_BUFFER0_COUNT 0x00000010 -#define DMA_BUFFER1_COUNT 0x00000018 -#define DMA_BAH_BIT 16 -#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT) -#define DMA_COUNT_BIT 0 -#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) - -/* DMA Device ID's follow */ +#define DMA_NC (1 << 8) +#define DMA_IE (1 << 7) +#define DMA_HALT (1 << 6) +#define DMA_GO (1 << 5) +#define DMA_AB (1 << 4) +#define DMA_D1 (1 << 3) +#define DMA_BE1 (1 << 2) +#define DMA_D0 (1 << 1) +#define DMA_BE0 (1 << 0) + +#define DMA_PERIPHERAL_ADDR 0x00000008 +#define DMA_BUFFER0_START 0x0000000C +#define DMA_BUFFER1_START 0x00000014 +#define DMA_BUFFER0_COUNT 0x00000010 +#define DMA_BUFFER1_COUNT 0x00000018 +#define DMA_BAH_BIT 16 +#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT) +#define DMA_COUNT_BIT 0 +#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) + +/* DMA Device IDs follow */ enum { DMA_ID_UART0_TX = 0, DMA_ID_UART0_RX, @@ -110,7 +109,8 @@ enum { }; struct dma_chan { - int dev_id; // this channel is allocated if >=0, free otherwise + int dev_id; /* this channel is allocated if >= 0, */ + /* free otherwise */ unsigned int io; const char *dev_str; int irq; @@ -132,23 +132,23 @@ extern int au1000_dma_read_proc(char *buf, char **start, off_t fpos, extern void dump_au1000_dma_channel(unsigned int dmanr); extern spinlock_t au1000_dma_spin_lock; - -static __inline__ struct dma_chan *get_dma_chan(unsigned int dmanr) +static inline struct dma_chan *get_dma_chan(unsigned int dmanr) { - if (dmanr >= NUM_AU1000_DMA_CHANNELS - || au1000_dma_table[dmanr].dev_id < 0) + if (dmanr >= NUM_AU1000_DMA_CHANNELS || + au1000_dma_table[dmanr].dev_id < 0) return NULL; return &au1000_dma_table[dmanr]; } -static __inline__ unsigned long claim_dma_lock(void) +static inline unsigned long claim_dma_lock(void) { unsigned long flags; + spin_lock_irqsave(&au1000_dma_spin_lock, flags); return flags; } -static __inline__ void release_dma_lock(unsigned long flags) +static inline void release_dma_lock(unsigned long flags) { spin_unlock_irqrestore(&au1000_dma_spin_lock, flags); } @@ -156,48 +156,53 @@ static __inline__ void release_dma_lock(unsigned long flags) /* * Set the DMA buffer enable bits in the mode register. */ -static __inline__ void enable_dma_buffer0(unsigned int dmanr) +static inline void enable_dma_buffer0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(DMA_BE0, chan->io + DMA_MODE_SET); } -static __inline__ void enable_dma_buffer1(unsigned int dmanr) + +static inline void enable_dma_buffer1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(DMA_BE1, chan->io + DMA_MODE_SET); } -static __inline__ void enable_dma_buffers(unsigned int dmanr) +static inline void enable_dma_buffers(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET); } -static __inline__ void start_dma(unsigned int dmanr) +static inline void start_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; - au_writel(DMA_GO, chan->io + DMA_MODE_SET); } #define DMA_HALT_POLL 0x5000 -static __inline__ void halt_dma(unsigned int dmanr) +static inline void halt_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); int i; + if (!chan) return; - au_writel(DMA_GO, chan->io + DMA_MODE_CLEAR); - // poll the halt bit + + /* Poll the halt bit */ for (i = 0; i < DMA_HALT_POLL; i++) if (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) break; @@ -205,55 +210,57 @@ static __inline__ void halt_dma(unsigned int dmanr) printk(KERN_INFO "halt_dma: HALT poll expired!\n"); } - -static __inline__ void disable_dma(unsigned int dmanr) +static inline void disable_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; halt_dma(dmanr); - // now we can disable the buffers + /* Now we can disable the buffers */ au_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR); } -static __inline__ int dma_halted(unsigned int dmanr) +static inline int dma_halted(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return 1; return (au_readl(chan->io + DMA_MODE_READ) & DMA_HALT) ? 1 : 0; } -/* initialize a DMA channel */ -static __inline__ void init_dma(unsigned int dmanr) +/* Initialize a DMA channel. */ +static inline void init_dma(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); u32 mode; + if (!chan) return; disable_dma(dmanr); - // set device FIFO address - au_writel(CPHYSADDR(chan->fifo_addr), - chan->io + DMA_PERIPHERAL_ADDR); + /* Set device FIFO address */ + au_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR); mode = chan->mode | (chan->dev_id << DMA_DID_BIT); if (chan->irq) mode |= DMA_IE; au_writel(~mode, chan->io + DMA_MODE_CLEAR); - au_writel(mode, chan->io + DMA_MODE_SET); + au_writel(mode, chan->io + DMA_MODE_SET); } /* - * set mode for a specific DMA channel + * Set mode for a specific DMA channel */ -static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode) +static inline void set_dma_mode(unsigned int dmanr, unsigned int mode) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; /* @@ -266,36 +273,37 @@ static __inline__ void set_dma_mode(unsigned int dmanr, unsigned int mode) chan->mode |= mode; } -static __inline__ unsigned int get_dma_mode(unsigned int dmanr) +static inline unsigned int get_dma_mode(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return 0; return chan->mode; } -static __inline__ int get_dma_active_buffer(unsigned int dmanr) +static inline int get_dma_active_buffer(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return -1; return (au_readl(chan->io + DMA_MODE_READ) & DMA_AB) ? 1 : 0; } - /* - * set the device FIFO address for a specific DMA channel - only + * Set the device FIFO address for a specific DMA channel - only * applicable to GPO4 and GPO5. All the other devices have fixed * FIFO addresses. */ -static __inline__ void set_dma_fifo_addr(unsigned int dmanr, - unsigned int a) +static inline void set_dma_fifo_addr(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; - if (chan->mode & DMA_DS) /* second bank of device ids */ + if (chan->mode & DMA_DS) /* second bank of device IDs */ return; if (chan->dev_id != DMA_ID_GP04 && chan->dev_id != DMA_ID_GP05) @@ -307,16 +315,19 @@ static __inline__ void set_dma_fifo_addr(unsigned int dmanr, /* * Clear the DMA buffer done bits in the mode register. */ -static __inline__ void clear_dma_done0(unsigned int dmanr) +static inline void clear_dma_done0(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(DMA_D0, chan->io + DMA_MODE_CLEAR); } -static __inline__ void clear_dma_done1(unsigned int dmanr) + +static inline void clear_dma_done1(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(DMA_D1, chan->io + DMA_MODE_CLEAR); @@ -325,16 +336,17 @@ static __inline__ void clear_dma_done1(unsigned int dmanr) /* * This does nothing - not applicable to Au1000 DMA. */ -static __inline__ void set_dma_page(unsigned int dmanr, char pagenr) +static inline void set_dma_page(unsigned int dmanr, char pagenr) { } /* * Set Buffer 0 transfer address for specific DMA channel. */ -static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a) +static inline void set_dma_addr0(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(a, chan->io + DMA_BUFFER0_START); @@ -343,9 +355,10 @@ static __inline__ void set_dma_addr0(unsigned int dmanr, unsigned int a) /* * Set Buffer 1 transfer address for specific DMA channel. */ -static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a) +static inline void set_dma_addr1(unsigned int dmanr, unsigned int a) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; au_writel(a, chan->io + DMA_BUFFER1_START); @@ -355,10 +368,10 @@ static __inline__ void set_dma_addr1(unsigned int dmanr, unsigned int a) /* * Set Buffer 0 transfer size (max 64k) for a specific DMA channel. */ -static __inline__ void set_dma_count0(unsigned int dmanr, - unsigned int count) +static inline void set_dma_count0(unsigned int dmanr, unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; count &= DMA_COUNT_MASK; @@ -368,10 +381,10 @@ static __inline__ void set_dma_count0(unsigned int dmanr, /* * Set Buffer 1 transfer size (max 64k) for a specific DMA channel. */ -static __inline__ void set_dma_count1(unsigned int dmanr, - unsigned int count) +static inline void set_dma_count1(unsigned int dmanr, unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; count &= DMA_COUNT_MASK; @@ -381,10 +394,10 @@ static __inline__ void set_dma_count1(unsigned int dmanr, /* * Set both buffer transfer sizes (max 64k) for a specific DMA channel. */ -static __inline__ void set_dma_count(unsigned int dmanr, - unsigned int count) +static inline void set_dma_count(unsigned int dmanr, unsigned int count) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return; count &= DMA_COUNT_MASK; @@ -396,35 +409,36 @@ static __inline__ void set_dma_count(unsigned int dmanr, * Returns which buffer has its done bit set in the mode register. * Returns -1 if neither or both done bits set. */ -static __inline__ unsigned int get_dma_buffer_done(unsigned int dmanr) +static inline unsigned int get_dma_buffer_done(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return 0; - - return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1); + return au_readl(chan->io + DMA_MODE_READ) & (DMA_D0 | DMA_D1); } /* * Returns the DMA channel's Buffer Done IRQ number. */ -static __inline__ int get_dma_done_irq(unsigned int dmanr) +static inline int get_dma_done_irq(unsigned int dmanr) { struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return -1; - return chan->irq; } /* * Get DMA residue count. Returns the number of _bytes_ left to transfer. */ -static __inline__ int get_dma_residue(unsigned int dmanr) +static inline int get_dma_residue(unsigned int dmanr) { int curBufCntReg, count; struct dma_chan *chan = get_dma_chan(dmanr); + if (!chan) return 0; @@ -442,4 +456,3 @@ static __inline__ int get_dma_residue(unsigned int dmanr) } #endif /* __ASM_AU1000_DMA_H */ - diff --git a/include/asm-mips/mach-au1x00/au1000_gpio.h b/include/asm-mips/mach-au1x00/au1000_gpio.h index 298f920..d8c96fd 100644 --- a/include/asm-mips/mach-au1x00/au1000_gpio.h +++ b/include/asm-mips/mach-au1x00/au1000_gpio.h @@ -2,12 +2,12 @@ * FILE NAME au1000_gpio.h * * BRIEF MODULE DESCRIPTION - * API to Alchemy Au1000 GPIO device. + * API to Alchemy Au1xx0 GPIO device. * * Author: MontaVista Software, Inc. - * Steve Longerbeam + * Steve Longerbeam * - * Copyright 2001 MontaVista Software Inc. + * Copyright 2001, 2008 MontaVista Software Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -37,12 +37,12 @@ #define AU1000GPIO_IOC_MAGIC 'A' -#define AU1000GPIO_IN _IOR (AU1000GPIO_IOC_MAGIC, 0, int) -#define AU1000GPIO_SET _IOW (AU1000GPIO_IOC_MAGIC, 1, int) -#define AU1000GPIO_CLEAR _IOW (AU1000GPIO_IOC_MAGIC, 2, int) -#define AU1000GPIO_OUT _IOW (AU1000GPIO_IOC_MAGIC, 3, int) -#define AU1000GPIO_TRISTATE _IOW (AU1000GPIO_IOC_MAGIC, 4, int) -#define AU1000GPIO_AVAIL_MASK _IOR (AU1000GPIO_IOC_MAGIC, 5, int) +#define AU1000GPIO_IN _IOR(AU1000GPIO_IOC_MAGIC, 0, int) +#define AU1000GPIO_SET _IOW(AU1000GPIO_IOC_MAGIC, 1, int) +#define AU1000GPIO_CLEAR _IOW(AU1000GPIO_IOC_MAGIC, 2, int) +#define AU1000GPIO_OUT _IOW(AU1000GPIO_IOC_MAGIC, 3, int) +#define AU1000GPIO_TRISTATE _IOW(AU1000GPIO_IOC_MAGIC, 4, int) +#define AU1000GPIO_AVAIL_MASK _IOR(AU1000GPIO_IOC_MAGIC, 5, int) #ifdef __KERNEL__ extern u32 get_au1000_avail_gpio_mask(void); diff --git a/include/asm-mips/mach-au1x00/au1550_spi.h b/include/asm-mips/mach-au1x00/au1550_spi.h index c2f0466..40e6c48 100644 --- a/include/asm-mips/mach-au1x00/au1550_spi.h +++ b/include/asm-mips/mach-au1x00/au1550_spi.h @@ -1,5 +1,5 @@ /* - * au1550_spi.h - au1550 psc spi controller driver - platform data struct + * au1550_spi.h - Au1550 PSC SPI controller driver - platform data structure */ #ifndef _AU1550_SPI_H_ diff --git a/include/asm-mips/mach-au1x00/au1xxx.h b/include/asm-mips/mach-au1x00/au1xxx.h index 9471359..1b36550 100644 --- a/include/asm-mips/mach-au1x00/au1xxx.h +++ b/include/asm-mips/mach-au1x00/au1xxx.h @@ -23,10 +23,10 @@ #ifndef _AU1XXX_H_ #define _AU1XXX_H_ - #include -#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) +#if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || \ + defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) #include #elif defined(CONFIG_MIPS_PB1550) diff --git a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h index 93d507c..ad17d7c 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_dbdma.h +++ b/include/asm-mips/mach-au1x00/au1xxx_dbdma.h @@ -28,17 +28,18 @@ * 675 Mass Ave, Cambridge, MA 02139, USA. */ -/* Specifics for the Au1xxx Descriptor-Based DMA Controllers, first - * seen in the AU1550 part. +/* + * Specifics for the Au1xxx Descriptor-Based DMA Controller, + * first seen in the AU1550 part. */ #ifndef _AU1000_DBDMA_H_ #define _AU1000_DBDMA_H_ - #ifndef _LANGUAGE_ASSEMBLY -/* The DMA base addresses. - * The Channels are every 256 bytes (0x0100) from the channel 0 base. +/* + * The DMA base addresses. + * The channels are every 256 bytes (0x0100) from the channel 0 base. * Interrupt status/enable is bits 15:0 for channels 15 to zero. */ #define DDMA_GLOBAL_BASE 0xb4003000 @@ -51,16 +52,14 @@ typedef volatile struct dbdma_global { u32 ddma_inten; } dbdma_global_t; -/* General Configuration. -*/ +/* General Configuration. */ #define DDMA_CONFIG_AF (1 << 2) #define DDMA_CONFIG_AH (1 << 1) #define DDMA_CONFIG_AL (1 << 0) #define DDMA_THROTTLE_EN (1 << 31) -/* The structure of a DMA Channel. -*/ +/* The structure of a DMA Channel. */ typedef volatile struct au1xxx_dma_channel { u32 ddma_cfg; /* See below */ u32 ddma_desptr; /* 32-byte aligned pointer to descriptor */ @@ -69,8 +68,7 @@ typedef volatile struct au1xxx_dma_channel { u32 ddma_irq; /* If bit 0 set, interrupt pending */ u32 ddma_stat; /* See below */ u32 ddma_bytecnt; /* Byte count, valid only when chan idle */ - /* Remainder, up to the 256 byte boundary, is reserved. - */ + /* Remainder, up to the 256 byte boundary, is reserved. */ } au1x_dma_chan_t; #define DDMA_CFG_SED (1 << 9) /* source DMA level/edge detect */ @@ -84,7 +82,8 @@ typedef volatile struct au1xxx_dma_channel { #define DDMA_CFG_DBE (1 << 1) /* Destination big endian */ #define DDMA_CFG_EN (1 << 0) /* Channel enable */ -/* Always set when descriptor processing done, regardless of +/* + * Always set when descriptor processing done, regardless of * interrupt enable state. Reflected in global intstat, don't * clear this until global intstat is read/used. */ @@ -94,7 +93,8 @@ typedef volatile struct au1xxx_dma_channel { #define DDMA_STAT_V (1 << 1) /* Descriptor valid */ #define DDMA_STAT_H (1 << 0) /* Channel Halted */ -/* "Standard" DDMA Descriptor. +/* + * "Standard" DDMA Descriptor. * Must be 32-byte aligned. */ typedef volatile struct au1xxx_ddma_desc { @@ -106,8 +106,9 @@ typedef volatile struct au1xxx_ddma_desc { u32 dscr_dest1; /* See below */ u32 dscr_stat; /* completion status */ u32 dscr_nxtptr; /* Next descriptor pointer (mostly) */ - /* First 32bytes are HW specific!!! - Lets have some SW data following.. make sure its 32bytes + /* + * First 32 bytes are HW specific!!! + * Lets have some SW data following -- make sure it's 32 bytes. */ u32 sw_status; u32 sw_context; @@ -130,10 +131,9 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_CV (0x1 << 2) /* Clear Valid when done */ #define DSCR_CMD0_ST_MASK (0x3 << 0) /* Status instruction */ -#define SW_STATUS_INUSE (1<<0) +#define SW_STATUS_INUSE (1 << 0) -/* Command 0 device IDs. -*/ +/* Command 0 device IDs. */ #ifdef CONFIG_SOC_AU1550 #define DSCR_CMD0_UART0_TX 0 #define DSCR_CMD0_UART0_RX 1 @@ -198,16 +198,15 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_THROTTLE 30 #define DSCR_CMD0_ALWAYS 31 #define DSCR_NDEV_IDS 32 -/* THis macro is used to find/create custom device types */ -#define DSCR_DEV2CUSTOM_ID(x, d) (((((x)&0xFFFF)<<8)|0x32000000)|((d)&0xFF)) -#define DSCR_CUSTOM2DEV_ID(x) ((x)&0xFF) - +/* This macro is used to find/create custom device types */ +#define DSCR_DEV2CUSTOM_ID(x, d) (((((x) & 0xFFFF) << 8) | 0x32000000) | \ + ((d) & 0xFF)) +#define DSCR_CUSTOM2DEV_ID(x) ((x) & 0xFF) #define DSCR_CMD0_SID(x) (((x) & 0x1f) << 25) #define DSCR_CMD0_DID(x) (((x) & 0x1f) << 20) -/* Source/Destination transfer width. -*/ +/* Source/Destination transfer width. */ #define DSCR_CMD0_BYTE 0 #define DSCR_CMD0_HALFWORD 1 #define DSCR_CMD0_WORD 2 @@ -215,16 +214,14 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_SW(x) (((x) & 0x3) << 18) #define DSCR_CMD0_DW(x) (((x) & 0x3) << 16) -/* DDMA Descriptor Type. -*/ +/* DDMA Descriptor Type. */ #define DSCR_CMD0_STANDARD 0 #define DSCR_CMD0_LITERAL 1 #define DSCR_CMD0_CMP_BRANCH 2 #define DSCR_CMD0_DT(x) (((x) & 0x3) << 13) -/* Status Instruction. -*/ +/* Status Instruction. */ #define DSCR_CMD0_ST_NOCHANGE 0 /* Don't change */ #define DSCR_CMD0_ST_CURRENT 1 /* Write current status */ #define DSCR_CMD0_ST_CMD0 2 /* Write cmd0 with V cleared */ @@ -232,23 +229,20 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_CMD0_ST(x) (((x) & 0x3) << 0) -/* Descriptor Command 1 -*/ +/* Descriptor Command 1. */ #define DSCR_CMD1_SUPTR_MASK (0xf << 28) /* upper 4 bits of src addr */ #define DSCR_CMD1_DUPTR_MASK (0xf << 24) /* upper 4 bits of dest addr */ #define DSCR_CMD1_FL_MASK (0x3 << 22) /* Flag bits */ #define DSCR_CMD1_BC_MASK (0x3fffff) /* Byte count */ -/* Flag description. -*/ +/* Flag description. */ #define DSCR_CMD1_FL_MEM_STRIDE0 0 #define DSCR_CMD1_FL_MEM_STRIDE1 1 #define DSCR_CMD1_FL_MEM_STRIDE2 2 #define DSCR_CMD1_FL(x) (((x) & 0x3) << 22) -/* Source1, 1-dimensional stride. -*/ +/* Source1, 1-dimensional stride. */ #define DSCR_SRC1_STS_MASK (3 << 30) /* Src xfer size */ #define DSCR_SRC1_SAM_MASK (3 << 28) /* Src xfer movement */ #define DSCR_SRC1_SB_MASK (0x3fff << 14) /* Block size */ @@ -256,8 +250,7 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_SRC1_SS_MASK (0x3fff << 0) /* Stride */ #define DSCR_SRC1_SS(x) (((x) & 0x3fff) << 0) -/* Dest1, 1-dimensional stride. -*/ +/* Dest1, 1-dimensional stride. */ #define DSCR_DEST1_DTS_MASK (3 << 30) /* Dest xfer size */ #define DSCR_DEST1_DAM_MASK (3 << 28) /* Dest xfer movement */ #define DSCR_DEST1_DB_MASK (0x3fff << 14) /* Block size */ @@ -279,29 +272,27 @@ typedef volatile struct au1xxx_ddma_desc { #define DSCR_SRC1_SAM(x) (((x) & 3) << 28) #define DSCR_DEST1_DAM(x) (((x) & 3) << 28) -/* The next descriptor pointer. -*/ +/* The next descriptor pointer. */ #define DSCR_NXTPTR_MASK (0x07ffffff) #define DSCR_NXTPTR(x) ((x) >> 5) #define DSCR_GET_NXTPTR(x) ((x) << 5) #define DSCR_NXTPTR_MS (1 << 27) -/* The number of DBDMA channels. -*/ +/* The number of DBDMA channels. */ #define NUM_DBDMA_CHANS 16 /* - * Ddma API definitions + * DDMA API definitions * FIXME: may not fit to this header file */ typedef struct dbdma_device_table { - u32 dev_id; - u32 dev_flags; - u32 dev_tsize; - u32 dev_devwidth; - u32 dev_physaddr; /* If FIFO */ - u32 dev_intlevel; - u32 dev_intpolarity; + u32 dev_id; + u32 dev_flags; + u32 dev_tsize; + u32 dev_devwidth; + u32 dev_physaddr; /* If FIFO */ + u32 dev_intlevel; + u32 dev_intpolarity; } dbdev_tab_t; @@ -316,44 +307,41 @@ typedef struct dbdma_chan_config { au1x_ddma_desc_t *chan_desc_base; au1x_ddma_desc_t *get_ptr, *put_ptr, *cur_ptr; void *chan_callparam; - void (*chan_callback)(int, void *); + void (*chan_callback)(int, void *); } chan_tab_t; #define DEV_FLAGS_INUSE (1 << 0) #define DEV_FLAGS_ANYUSE (1 << 1) #define DEV_FLAGS_OUT (1 << 2) #define DEV_FLAGS_IN (1 << 3) -#define DEV_FLAGS_BURSTABLE (1 << 4) +#define DEV_FLAGS_BURSTABLE (1 << 4) #define DEV_FLAGS_SYNC (1 << 5) -/* end Ddma API definitions */ +/* end DDMA API definitions */ -/* External functions for drivers to use. -*/ -/* Use this to allocate a dbdma channel. The device ids are one of the - * DSCR_CMD0 devices IDs, which is usually redefined to a more - * meaningful name. The 'callback' is called during dma completion +/* + * External functions for drivers to use. + * Use this to allocate a DBDMA channel. The device IDs are one of + * the DSCR_CMD0 devices IDs, which is usually redefined to a more + * meaningful name. The 'callback' is called during DMA completion * interrupt. */ extern u32 au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, - void (*callback)(int, void *), void *callparam); + void (*callback)(int, void *), + void *callparam); #define DBDMA_MEM_CHAN DSCR_CMD0_ALWAYS -/* Set the device width of a in/out fifo. -*/ +/* Set the device width of an in/out FIFO. */ u32 au1xxx_dbdma_set_devwidth(u32 chanid, int bits); -/* Allocate a ring of descriptors for dbdma. -*/ +/* Allocate a ring of descriptors for DBDMA. */ u32 au1xxx_dbdma_ring_alloc(u32 chanid, int entries); -/* Put buffers on source/destination descriptors. -*/ +/* Put buffers on source/destination descriptors. */ u32 _au1xxx_dbdma_put_source(u32 chanid, void *buf, int nbytes, u32 flags); u32 _au1xxx_dbdma_put_dest(u32 chanid, void *buf, int nbytes, u32 flags); -/* Get a buffer from the destination descriptor. -*/ +/* Get a buffer from the destination descriptor. */ u32 au1xxx_dbdma_get_dest(u32 chanid, void **buf, int *nbytes); void au1xxx_dbdma_stop(u32 chanid); @@ -364,29 +352,34 @@ u32 au1xxx_get_dma_residue(u32 chanid); void au1xxx_dbdma_chan_free(u32 chanid); void au1xxx_dbdma_dump(u32 chanid); -u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr ); +u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); -u32 au1xxx_ddma_add_device( dbdev_tab_t *dev ); -void * au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); +u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); +void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); /* - Some compatibilty macros -- - Needed to make changes to API without breaking existing drivers -*/ -#define au1xxx_dbdma_put_source(chanid, buf, nbytes)_au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) -#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) -#define put_source_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) - - -#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) -#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) -#define put_dest_flags(chanid, buf, nbytes, flags) au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) + * Some compatibilty macros -- needed to make changes to API + * without breaking existing drivers. + */ +#define au1xxx_dbdma_put_source(chanid, buf, nbytes) \ + _au1xxx_dbdma_put_source(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) \ + _au1xxx_dbdma_put_source(chanid, buf, nbytes, flags) +#define put_source_flags(chanid, buf, nbytes, flags) \ + au1xxx_dbdma_put_source_flags(chanid, buf, nbytes, flags) + +#define au1xxx_dbdma_put_dest(chanid, buf, nbytes) \ + _au1xxx_dbdma_put_dest(chanid, buf, nbytes, DDMA_FLAGS_IE) +#define au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) \ + _au1xxx_dbdma_put_dest(chanid, buf, nbytes, flags) +#define put_dest_flags(chanid, buf, nbytes, flags) \ + au1xxx_dbdma_put_dest_flags(chanid, buf, nbytes, flags) /* * Flags for the put_source/put_dest functions. */ -#define DDMA_FLAGS_IE (1<<0) -#define DDMA_FLAGS_NOIE (1<<1) +#define DDMA_FLAGS_IE (1 << 0) +#define DDMA_FLAGS_NOIE (1 << 1) #endif /* _LANGUAGE_ASSEMBLY */ #endif /* _AU1000_DBDMA_H_ */ diff --git a/include/asm-mips/mach-au1x00/au1xxx_ide.h b/include/asm-mips/mach-au1x00/au1xxx_ide.h index b493a5e..60638b8 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_ide.h +++ b/include/asm-mips/mach-au1x00/au1xxx_ide.h @@ -31,167 +31,164 @@ */ #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - #define DMA_WAIT_TIMEOUT 100 - #define NUM_DESCRIPTORS PRD_ENTRIES +#define DMA_WAIT_TIMEOUT 100 +#define NUM_DESCRIPTORS PRD_ENTRIES #else /* CONFIG_BLK_DEV_IDE_AU1XXX_PIO_DBDMA */ - #define NUM_DESCRIPTORS 2 +#define NUM_DESCRIPTORS 2 #endif #ifndef AU1XXX_ATA_RQSIZE - #define AU1XXX_ATA_RQSIZE 128 +#define AU1XXX_ATA_RQSIZE 128 #endif /* Disable Burstable-Support for DBDMA */ #ifndef CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON - #define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 +#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON 0 #endif #ifdef CONFIG_PM /* -* This will enable the device to be powered up when write() or read() -* is called. If this is not defined, the driver will return -EBUSY. -*/ + * This will enable the device to be powered up when write() or read() + * is called. If this is not defined, the driver will return -EBUSY. + */ #define WAKE_ON_ACCESS 1 -typedef struct -{ - spinlock_t lock; /* Used to block on state transitions */ - au1xxx_power_dev_t *dev; /* Power Managers device structure */ - unsigned stopped; /* USed to signaling device is stopped */ +typedef struct { + spinlock_t lock; /* Used to block on state transitions */ + au1xxx_power_dev_t *dev; /* Power Managers device structure */ + unsigned stopped; /* Used to signal device is stopped */ } pm_state; #endif - -typedef struct -{ - u32 tx_dev_id, rx_dev_id, target_dev_id; - u32 tx_chan, rx_chan; - void *tx_desc_head, *rx_desc_head; - ide_hwif_t *hwif; +typedef struct { + u32 tx_dev_id, rx_dev_id, target_dev_id; + u32 tx_chan, rx_chan; + void *tx_desc_head, *rx_desc_head; + ide_hwif_t *hwif; #ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA - ide_drive_t *drive; - struct dbdma_cmd *dma_table_cpu; - dma_addr_t dma_table_dma; + ide_drive_t *drive; + struct dbdma_cmd *dma_table_cpu; + dma_addr_t dma_table_dma; #endif int irq; u32 regbase; #ifdef CONFIG_PM - pm_state pm; + pm_state pm; #endif } _auide_hwif; -/******************************************************************************* -* PIO Mode timing calculation : * -* * -* Static Bus Spec ATA Spec * -* Tcsoe = t1 * -* Toecs = t9 * -* Twcs = t9 * -* Tcsh = t2i | t2 * -* Tcsoff = t2i | t2 * -* Twp = t2 * -* Tcsw = t1 * -* Tpm = 0 * -* Ta = t1+t2 * -*******************************************************************************/ +/******************************************************************************/ +/* PIO Mode timing calculation : */ +/* */ +/* Static Bus Spec ATA Spec */ +/* Tcsoe = t1 */ +/* Toecs = t9 */ +/* Twcs = t9 */ +/* Tcsh = t2i | t2 */ +/* Tcsoff = t2i | t2 */ +/* Twp = t2 */ +/* Tcsw = t1 */ +/* Tpm = 0 */ +/* Ta = t1+t2 */ +/******************************************************************************/ -#define TCSOE_MASK (0x07<<29) -#define TOECS_MASK (0x07<<26) -#define TWCS_MASK (0x07<<28) -#define TCSH_MASK (0x0F<<24) -#define TCSOFF_MASK (0x07<<20) -#define TWP_MASK (0x3F<<14) -#define TCSW_MASK (0x0F<<10) -#define TPM_MASK (0x0F<<6) -#define TA_MASK (0x3F<<0) -#define TS_MASK (1<<8) +#define TCSOE_MASK (0x07 << 29) +#define TOECS_MASK (0x07 << 26) +#define TWCS_MASK (0x07 << 28) +#define TCSH_MASK (0x0F << 24) +#define TCSOFF_MASK (0x07 << 20) +#define TWP_MASK (0x3F << 14) +#define TCSW_MASK (0x0F << 10) +#define TPM_MASK (0x0F << 6) +#define TA_MASK (0x3F << 0) +#define TS_MASK (1 << 8) /* Timing parameters PIO mode 0 */ -#define SBC_IDE_PIO0_TCSOE (0x04<<29) -#define SBC_IDE_PIO0_TOECS (0x01<<26) -#define SBC_IDE_PIO0_TWCS (0x02<<28) -#define SBC_IDE_PIO0_TCSH (0x08<<24) -#define SBC_IDE_PIO0_TCSOFF (0x07<<20) -#define SBC_IDE_PIO0_TWP (0x10<<14) -#define SBC_IDE_PIO0_TCSW (0x04<<10) -#define SBC_IDE_PIO0_TPM (0x0<<6) -#define SBC_IDE_PIO0_TA (0x15<<0) +#define SBC_IDE_PIO0_TCSOE (0x04 << 29) +#define SBC_IDE_PIO0_TOECS (0x01 << 26) +#define SBC_IDE_PIO0_TWCS (0x02 << 28) +#define SBC_IDE_PIO0_TCSH (0x08 << 24) +#define SBC_IDE_PIO0_TCSOFF (0x07 << 20) +#define SBC_IDE_PIO0_TWP (0x10 << 14) +#define SBC_IDE_PIO0_TCSW (0x04 << 10) +#define SBC_IDE_PIO0_TPM (0x00 << 6) +#define SBC_IDE_PIO0_TA (0x15 << 0) /* Timing parameters PIO mode 1 */ -#define SBC_IDE_PIO1_TCSOE (0x03<<29) -#define SBC_IDE_PIO1_TOECS (0x01<<26) -#define SBC_IDE_PIO1_TWCS (0x01<<28) -#define SBC_IDE_PIO1_TCSH (0x06<<24) -#define SBC_IDE_PIO1_TCSOFF (0x06<<20) -#define SBC_IDE_PIO1_TWP (0x08<<14) -#define SBC_IDE_PIO1_TCSW (0x03<<10) -#define SBC_IDE_PIO1_TPM (0x00<<6) -#define SBC_IDE_PIO1_TA (0x0B<<0) +#define SBC_IDE_PIO1_TCSOE (0x03 << 29) +#define SBC_IDE_PIO1_TOECS (0x01 << 26) +#define SBC_IDE_PIO1_TWCS (0x01 << 28) +#define SBC_IDE_PIO1_TCSH (0x06 << 24) +#define SBC_IDE_PIO1_TCSOFF (0x06 << 20) +#define SBC_IDE_PIO1_TWP (0x08 << 14) +#define SBC_IDE_PIO1_TCSW (0x03 << 10) +#define SBC_IDE_PIO1_TPM (0x00 << 6) +#define SBC_IDE_PIO1_TA (0x0B << 0) /* Timing parameters PIO mode 2 */ -#define SBC_IDE_PIO2_TCSOE (0x05<<29) -#define SBC_IDE_PIO2_TOECS (0x01<<26) -#define SBC_IDE_PIO2_TWCS (0x01<<28) -#define SBC_IDE_PIO2_TCSH (0x07<<24) -#define SBC_IDE_PIO2_TCSOFF (0x07<<20) -#define SBC_IDE_PIO2_TWP (0x1F<<14) -#define SBC_IDE_PIO2_TCSW (0x05<<10) -#define SBC_IDE_PIO2_TPM (0x00<<6) -#define SBC_IDE_PIO2_TA (0x22<<0) +#define SBC_IDE_PIO2_TCSOE (0x05 << 29) +#define SBC_IDE_PIO2_TOECS (0x01 << 26) +#define SBC_IDE_PIO2_TWCS (0x01 << 28) +#define SBC_IDE_PIO2_TCSH (0x07 << 24) +#define SBC_IDE_PIO2_TCSOFF (0x07 << 20) +#define SBC_IDE_PIO2_TWP (0x1F << 14) +#define SBC_IDE_PIO2_TCSW (0x05 << 10) +#define SBC_IDE_PIO2_TPM (0x00 << 6) +#define SBC_IDE_PIO2_TA (0x22 << 0) /* Timing parameters PIO mode 3 */ -#define SBC_IDE_PIO3_TCSOE (0x05<<29) -#define SBC_IDE_PIO3_TOECS (0x01<<26) -#define SBC_IDE_PIO3_TWCS (0x01<<28) -#define SBC_IDE_PIO3_TCSH (0x0D<<24) -#define SBC_IDE_PIO3_TCSOFF (0x0D<<20) -#define SBC_IDE_PIO3_TWP (0x15<<14) -#define SBC_IDE_PIO3_TCSW (0x05<<10) -#define SBC_IDE_PIO3_TPM (0x00<<6) -#define SBC_IDE_PIO3_TA (0x1A<<0) +#define SBC_IDE_PIO3_TCSOE (0x05 << 29) +#define SBC_IDE_PIO3_TOECS (0x01 << 26) +#define SBC_IDE_PIO3_TWCS (0x01 << 28) +#define SBC_IDE_PIO3_TCSH (0x0D << 24) +#define SBC_IDE_PIO3_TCSOFF (0x0D << 20) +#define SBC_IDE_PIO3_TWP (0x15 << 14) +#define SBC_IDE_PIO3_TCSW (0x05 << 10) +#define SBC_IDE_PIO3_TPM (0x00 << 6) +#define SBC_IDE_PIO3_TA (0x1A << 0) /* Timing parameters PIO mode 4 */ -#define SBC_IDE_PIO4_TCSOE (0x04<<29) -#define SBC_IDE_PIO4_TOECS (0x01<<26) -#define SBC_IDE_PIO4_TWCS (0x01<<28) -#define SBC_IDE_PIO4_TCSH (0x04<<24) -#define SBC_IDE_PIO4_TCSOFF (0x04<<20) -#define SBC_IDE_PIO4_TWP (0x0D<<14) -#define SBC_IDE_PIO4_TCSW (0x03<<10) -#define SBC_IDE_PIO4_TPM (0x00<<6) -#define SBC_IDE_PIO4_TA (0x12<<0) +#define SBC_IDE_PIO4_TCSOE (0x04 << 29) +#define SBC_IDE_PIO4_TOECS (0x01 << 26) +#define SBC_IDE_PIO4_TWCS (0x01 << 28) +#define SBC_IDE_PIO4_TCSH (0x04 << 24) +#define SBC_IDE_PIO4_TCSOFF (0x04 << 20) +#define SBC_IDE_PIO4_TWP (0x0D << 14) +#define SBC_IDE_PIO4_TCSW (0x03 << 10) +#define SBC_IDE_PIO4_TPM (0x00 << 6) +#define SBC_IDE_PIO4_TA (0x12 << 0) /* Timing parameters MDMA mode 0 */ -#define SBC_IDE_MDMA0_TCSOE (0x03<<29) -#define SBC_IDE_MDMA0_TOECS (0x01<<26) -#define SBC_IDE_MDMA0_TWCS (0x01<<28) -#define SBC_IDE_MDMA0_TCSH (0x07<<24) -#define SBC_IDE_MDMA0_TCSOFF (0x07<<20) -#define SBC_IDE_MDMA0_TWP (0x0C<<14) -#define SBC_IDE_MDMA0_TCSW (0x03<<10) -#define SBC_IDE_MDMA0_TPM (0x00<<6) -#define SBC_IDE_MDMA0_TA (0x0F<<0) +#define SBC_IDE_MDMA0_TCSOE (0x03 << 29) +#define SBC_IDE_MDMA0_TOECS (0x01 << 26) +#define SBC_IDE_MDMA0_TWCS (0x01 << 28) +#define SBC_IDE_MDMA0_TCSH (0x07 << 24) +#define SBC_IDE_MDMA0_TCSOFF (0x07 << 20) +#define SBC_IDE_MDMA0_TWP (0x0C << 14) +#define SBC_IDE_MDMA0_TCSW (0x03 << 10) +#define SBC_IDE_MDMA0_TPM (0x00 << 6) +#define SBC_IDE_MDMA0_TA (0x0F << 0) /* Timing parameters MDMA mode 1 */ -#define SBC_IDE_MDMA1_TCSOE (0x05<<29) -#define SBC_IDE_MDMA1_TOECS (0x01<<26) -#define SBC_IDE_MDMA1_TWCS (0x01<<28) -#define SBC_IDE_MDMA1_TCSH (0x05<<24) -#define SBC_IDE_MDMA1_TCSOFF (0x05<<20) -#define SBC_IDE_MDMA1_TWP (0x0F<<14) -#define SBC_IDE_MDMA1_TCSW (0x05<<10) -#define SBC_IDE_MDMA1_TPM (0x00<<6) -#define SBC_IDE_MDMA1_TA (0x15<<0) +#define SBC_IDE_MDMA1_TCSOE (0x05 << 29) +#define SBC_IDE_MDMA1_TOECS (0x01 << 26) +#define SBC_IDE_MDMA1_TWCS (0x01 << 28) +#define SBC_IDE_MDMA1_TCSH (0x05 << 24) +#define SBC_IDE_MDMA1_TCSOFF (0x05 << 20) +#define SBC_IDE_MDMA1_TWP (0x0F << 14) +#define SBC_IDE_MDMA1_TCSW (0x05 << 10) +#define SBC_IDE_MDMA1_TPM (0x00 << 6) +#define SBC_IDE_MDMA1_TA (0x15 << 0) /* Timing parameters MDMA mode 2 */ -#define SBC_IDE_MDMA2_TCSOE (0x04<<29) -#define SBC_IDE_MDMA2_TOECS (0x01<<26) -#define SBC_IDE_MDMA2_TWCS (0x01<<28) -#define SBC_IDE_MDMA2_TCSH (0x04<<24) -#define SBC_IDE_MDMA2_TCSOFF (0x04<<20) -#define SBC_IDE_MDMA2_TWP (0x0D<<14) -#define SBC_IDE_MDMA2_TCSW (0x04<<10) -#define SBC_IDE_MDMA2_TPM (0x00<<6) -#define SBC_IDE_MDMA2_TA (0x12<<0) +#define SBC_IDE_MDMA2_TCSOE (0x04 << 29) +#define SBC_IDE_MDMA2_TOECS (0x01 << 26) +#define SBC_IDE_MDMA2_TWCS (0x01 << 28) +#define SBC_IDE_MDMA2_TCSH (0x04 << 24) +#define SBC_IDE_MDMA2_TCSOFF (0x04 << 20) +#define SBC_IDE_MDMA2_TWP (0x0D << 14) +#define SBC_IDE_MDMA2_TCSW (0x04 << 10) +#define SBC_IDE_MDMA2_TPM (0x00 << 6) +#define SBC_IDE_MDMA2_TA (0x12 << 0) #define SBC_IDE_TIMING(mode) \ - SBC_IDE_##mode##_TWCS | \ - SBC_IDE_##mode##_TCSH | \ - SBC_IDE_##mode##_TCSOFF | \ - SBC_IDE_##mode##_TWP | \ - SBC_IDE_##mode##_TCSW | \ - SBC_IDE_##mode##_TPM | \ - SBC_IDE_##mode##_TA + (SBC_IDE_##mode##_TWCS | \ + SBC_IDE_##mode##_TCSH | \ + SBC_IDE_##mode##_TCSOFF | \ + SBC_IDE_##mode##_TWP | \ + SBC_IDE_##mode##_TCSW | \ + SBC_IDE_##mode##_TPM | \ + SBC_IDE_##mode##_TA) diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h index 1bd4e27..dae4eca 100644 --- a/include/asm-mips/mach-au1x00/au1xxx_psc.h +++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h @@ -33,7 +33,6 @@ #ifndef _AU1000_PSC_H_ #define _AU1000_PSC_H_ - /* The PSC base addresses. */ #ifdef CONFIG_SOC_AU1550 #define PSC0_BASE_ADDR 0xb1a00000 @@ -47,8 +46,8 @@ #define PSC1_BASE_ADDR 0xb1b00000 #endif -/* The PSC select and control registers are common to - * all protocols. +/* + * The PSC select and control registers are common to all protocols. */ #define PSC_SEL_OFFSET 0x00000000 #define PSC_CTRL_OFFSET 0x00000004 @@ -59,18 +58,17 @@ #define PSC_SEL_CLK_SERCLK (2 << 4) #define PSC_SEL_PS_MASK 0x00000007 -#define PSC_SEL_PS_DISABLED (0) -#define PSC_SEL_PS_SPIMODE (2) -#define PSC_SEL_PS_I2SMODE (3) -#define PSC_SEL_PS_AC97MODE (4) -#define PSC_SEL_PS_SMBUSMODE (5) - -#define PSC_CTRL_DISABLE (0) -#define PSC_CTRL_SUSPEND (2) -#define PSC_CTRL_ENABLE (3) - -/* AC97 Registers. -*/ +#define PSC_SEL_PS_DISABLED 0 +#define PSC_SEL_PS_SPIMODE 2 +#define PSC_SEL_PS_I2SMODE 3 +#define PSC_SEL_PS_AC97MODE 4 +#define PSC_SEL_PS_SMBUSMODE 5 + +#define PSC_CTRL_DISABLE 0 +#define PSC_CTRL_SUSPEND 2 +#define PSC_CTRL_ENABLE 3 + +/* AC97 Registers. */ #define PSC_AC97CFG_OFFSET 0x00000008 #define PSC_AC97MSK_OFFSET 0x0000000c #define PSC_AC97PCR_OFFSET 0x00000010 @@ -95,8 +93,7 @@ #define PSC_AC97GPO (AC97_PSC_BASE + PSC_AC97GPO_OFFSET) #define PSC_AC97GPI (AC97_PSC_BASE + PSC_AC97GPI_OFFSET) -/* AC97 Config Register. -*/ +/* AC97 Config Register. */ #define PSC_AC97CFG_RT_MASK (3 << 30) #define PSC_AC97CFG_RT_FIFO1 (0 << 30) #define PSC_AC97CFG_RT_FIFO2 (1 << 30) @@ -118,20 +115,19 @@ #define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) #define PSC_AC97CFG_GE_ENABLE (1) -/* Enable slots 3-12. -*/ +/* Enable slots 3-12. */ #define PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) #define PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) -/* The word length equation is ((x) * 2) + 2, so choose 'x' appropriately. +/* + * The word length equation is ((x) * 2) + 2, so choose 'x' appropriately. * The only sensible numbers are 7, 9, or possibly 11. Nah, just do the * arithmetic in the macro. */ -#define PSC_AC97CFG_SET_LEN(x) (((((x)-2)/2) & 0xf) << 21) +#define PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) #define PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) -/* AC97 Mask Register. -*/ +/* AC97 Mask Register. */ #define PSC_AC97MSK_GR (1 << 25) #define PSC_AC97MSK_CD (1 << 24) #define PSC_AC97MSK_RR (1 << 13) @@ -148,8 +144,7 @@ PSC_AC97MSK_TO | PSC_AC97MSK_TU | \ PSC_AC97MSK_RD | PSC_AC97MSK_TD) -/* AC97 Protocol Control Register. -*/ +/* AC97 Protocol Control Register. */ #define PSC_AC97PCR_RC (1 << 6) #define PSC_AC97PCR_RP (1 << 5) #define PSC_AC97PCR_RS (1 << 4) @@ -157,8 +152,7 @@ #define PSC_AC97PCR_TP (1 << 1) #define PSC_AC97PCR_TS (1 << 0) -/* AC97 Status register (read only). -*/ +/* AC97 Status register (read only). */ #define PSC_AC97STAT_CB (1 << 26) #define PSC_AC97STAT_CP (1 << 25) #define PSC_AC97STAT_CR (1 << 24) @@ -174,8 +168,7 @@ #define PSC_AC97STAT_DR (1 << 1) #define PSC_AC97STAT_SR (1 << 0) -/* AC97 Event Register. -*/ +/* AC97 Event Register. */ #define PSC_AC97EVNT_GR (1 << 25) #define PSC_AC97EVNT_CD (1 << 24) #define PSC_AC97EVNT_RR (1 << 13) @@ -187,22 +180,18 @@ #define PSC_AC97EVNT_RD (1 << 5) #define PSC_AC97EVNT_TD (1 << 4) -/* CODEC Command Register. -*/ +/* CODEC Command Register. */ #define PSC_AC97CDC_RD (1 << 25) #define PSC_AC97CDC_ID_MASK (3 << 23) #define PSC_AC97CDC_INDX_MASK (0x7f << 16) -#define PSC_AC97CDC_ID(x) (((x) & 0x3) << 23) +#define PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) #define PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) -/* AC97 Reset Control Register. -*/ +/* AC97 Reset Control Register. */ #define PSC_AC97RST_RST (1 << 1) #define PSC_AC97RST_SNC (1 << 0) - -/* PSC in I2S Mode. -*/ +/* PSC in I2S Mode. */ typedef struct psc_i2s { u32 psc_sel; u32 psc_ctrl; @@ -215,8 +204,7 @@ typedef struct psc_i2s { u32 psc_i2sudf; } psc_i2s_t; -/* I2S Config Register. -*/ +/* I2S Config Register. */ #define PSC_I2SCFG_RT_MASK (3 << 30) #define PSC_I2SCFG_RT_FIFO1 (0 << 30) #define PSC_I2SCFG_RT_FIFO2 (1 << 30) @@ -247,8 +235,7 @@ typedef struct psc_i2s { #define PSC_I2SCFG_MLJ (1 << 10) #define PSC_I2SCFG_XM (1 << 9) -/* The word length equation is simply LEN+1. - */ +/* The word length equation is simply LEN+1. */ #define PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) #define PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) @@ -256,8 +243,7 @@ typedef struct psc_i2s { #define PSC_I2SCFG_MLF (1 << 1) #define PSC_I2SCFG_MS (1 << 0) -/* I2S Mask Register. -*/ +/* I2S Mask Register. */ #define PSC_I2SMSK_RR (1 << 13) #define PSC_I2SMSK_RO (1 << 12) #define PSC_I2SMSK_RU (1 << 11) @@ -271,8 +257,7 @@ typedef struct psc_i2s { PSC_I2SMSK_TO | PSC_I2SMSK_TU | \ PSC_I2SMSK_RD | PSC_I2SMSK_TD) -/* I2S Protocol Control Register. -*/ +/* I2S Protocol Control Register. */ #define PSC_I2SPCR_RC (1 << 6) #define PSC_I2SPCR_RP (1 << 5) #define PSC_I2SPCR_RS (1 << 4) @@ -280,8 +265,7 @@ typedef struct psc_i2s { #define PSC_I2SPCR_TP (1 << 1) #define PSC_I2SPCR_TS (1 << 0) -/* I2S Status register (read only). -*/ +/* I2S Status register (read only). */ #define PSC_I2SSTAT_RF (1 << 13) #define PSC_I2SSTAT_RE (1 << 12) #define PSC_I2SSTAT_RR (1 << 11) @@ -294,8 +278,7 @@ typedef struct psc_i2s { #define PSC_I2SSTAT_DR (1 << 1) #define PSC_I2SSTAT_SR (1 << 0) -/* I2S Event Register. -*/ +/* I2S Event Register. */ #define PSC_I2SEVNT_RR (1 << 13) #define PSC_I2SEVNT_RO (1 << 12) #define PSC_I2SEVNT_RU (1 << 11) @@ -305,8 +288,7 @@ typedef struct psc_i2s { #define PSC_I2SEVNT_RD (1 << 5) #define PSC_I2SEVNT_TD (1 << 4) -/* PSC in SPI Mode. -*/ +/* PSC in SPI Mode. */ typedef struct psc_spi { u32 psc_sel; u32 psc_ctrl; @@ -318,8 +300,7 @@ typedef struct psc_spi { u32 psc_spitxrx; } psc_spi_t; -/* SPI Config Register. -*/ +/* SPI Config Register. */ #define PSC_SPICFG_RT_MASK (3 << 30) #define PSC_SPICFG_RT_FIFO1 (0 << 30) #define PSC_SPICFG_RT_FIFO2 (1 << 30) @@ -355,8 +336,7 @@ typedef struct psc_spi { #define PSC_SPICFG_MLF (1 << 1) #define PSC_SPICFG_MO (1 << 0) -/* SPI Mask Register. -*/ +/* SPI Mask Register. */ #define PSC_SPIMSK_MM (1 << 16) #define PSC_SPIMSK_RR (1 << 13) #define PSC_SPIMSK_RO (1 << 12) @@ -371,16 +351,14 @@ typedef struct psc_spi { PSC_SPIMSK_TU | PSC_SPIMSK_SD | \ PSC_SPIMSK_MD) -/* SPI Protocol Control Register. -*/ +/* SPI Protocol Control Register. */ #define PSC_SPIPCR_RC (1 << 6) #define PSC_SPIPCR_SP (1 << 5) #define PSC_SPIPCR_SS (1 << 4) #define PSC_SPIPCR_TC (1 << 2) #define PSC_SPIPCR_MS (1 << 0) -/* SPI Status register (read only). -*/ +/* SPI Status register (read only). */ #define PSC_SPISTAT_RF (1 << 13) #define PSC_SPISTAT_RE (1 << 12) #define PSC_SPISTAT_RR (1 << 11) @@ -393,8 +371,7 @@ typedef struct psc_spi { #define PSC_SPISTAT_DR (1 << 1) #define PSC_SPISTAT_SR (1 << 0) -/* SPI Event Register. -*/ +/* SPI Event Register. */ #define PSC_SPIEVNT_MM (1 << 16) #define PSC_SPIEVNT_RR (1 << 13) #define PSC_SPIEVNT_RO (1 << 12) @@ -405,13 +382,11 @@ typedef struct psc_spi { #define PSC_SPIEVNT_SD (1 << 5) #define PSC_SPIEVNT_MD (1 << 4) -/* Transmit register control. -*/ +/* Transmit register control. */ #define PSC_SPITXRX_LC (1 << 29) #define PSC_SPITXRX_SR (1 << 28) -/* PSC in SMBus (I2C) Mode. -*/ +/* PSC in SMBus (I2C) Mode. */ typedef struct psc_smb { u32 psc_sel; u32 psc_ctrl; @@ -424,8 +399,7 @@ typedef struct psc_smb { u32 psc_smbtmr; } psc_smb_t; -/* SMBus Config Register. -*/ +/* SMBus Config Register. */ #define PSC_SMBCFG_RT_MASK (3 << 30) #define PSC_SMBCFG_RT_FIFO1 (0 << 30) #define PSC_SMBCFG_RT_FIFO2 (1 << 30) @@ -452,8 +426,7 @@ typedef struct psc_smb { #define PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) -/* SMBus Mask Register. -*/ +/* SMBus Mask Register. */ #define PSC_SMBMSK_DN (1 << 30) #define PSC_SMBMSK_AN (1 << 29) #define PSC_SMBMSK_AL (1 << 28) @@ -471,13 +444,11 @@ typedef struct psc_smb { PSC_SMBMSK_TU | PSC_SMBMSK_SD | \ PSC_SMBMSK_MD) -/* SMBus Protocol Control Register. -*/ +/* SMBus Protocol Control Register. */ #define PSC_SMBPCR_DC (1 << 2) #define PSC_SMBPCR_MS (1 << 0) -/* SMBus Status register (read only). -*/ +/* SMBus Status register (read only). */ #define PSC_SMBSTAT_BB (1 << 28) #define PSC_SMBSTAT_RF (1 << 13) #define PSC_SMBSTAT_RE (1 << 12) @@ -491,8 +462,7 @@ typedef struct psc_smb { #define PSC_SMBSTAT_DR (1 << 1) #define PSC_SMBSTAT_SR (1 << 0) -/* SMBus Event Register. -*/ +/* SMBus Event Register. */ #define PSC_SMBEVNT_DN (1 << 30) #define PSC_SMBEVNT_AN (1 << 29) #define PSC_SMBEVNT_AL (1 << 28) @@ -510,15 +480,13 @@ typedef struct psc_smb { PSC_SMBEVNT_TU | PSC_SMBEVNT_SD | \ PSC_SMBEVNT_MD) -/* Transmit register control. -*/ +/* Transmit register control. */ #define PSC_SMBTXRX_RSR (1 << 28) #define PSC_SMBTXRX_STP (1 << 29) -#define PSC_SMBTXRX_DATAMASK (0xff) +#define PSC_SMBTXRX_DATAMASK 0xff -/* SMBus protocol timers register. -*/ -#define PSC_SMBTMR_SET_TH(x) (((x) & 0x3) << 30) +/* SMBus protocol timers register. */ +#define PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) #define PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) #define PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) #define PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) @@ -526,5 +494,4 @@ typedef struct psc_smb { #define PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) #define PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) - #endif /* _AU1000_PSC_H_ */ -- cgit v1.1 From abd14cc00d940b8b5b4fc92be23f656b57c6ecfe Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:25:04 +0400 Subject: [MIPS] DBAu1xx0 code style cleanup Fix several errors and warnings given by checkpatch.pl: - macros with complex values not enclosed in parentheses; - leading spaces instead of tabs; - printk() without KERN_* facility level; - using simple_strtol() where strict_strtol() could be used; - line over 80 characters. In addition to these changes, also do the following: - initialize variable instead of assigning value later where it makes sense; - insert spaces between operator and its operands, also remove excess spaces there; - remove unneeded numeric literal type casts; - remove needless parentheses; - remove space after the type cast's closing parenthesis; - insert missing space before closing brace in the array initializers; - replace spaces after the macro name with tabs in the #define directives; - remove excess tabs after the macro name in the #define directives; - fix typos/errors, capitalize acronyms, etc. in the comments; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first/last line; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-db1x00/db1x00.h | 83 ++++++++++++++++++----------------- 1 file changed, 42 insertions(+), 41 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-db1x00/db1x00.h b/include/asm-mips/mach-db1x00/db1x00.h index e7a88ba..612ae90 100644 --- a/include/asm-mips/mach-db1x00/db1x00.h +++ b/include/asm-mips/mach-db1x00/db1x00.h @@ -1,9 +1,8 @@ /* - * AMD Alchemy DB1x00 Reference Boards + * AMD Alchemy DBAu1x00 Reference Boards * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2001, 2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * ######################################################################## @@ -32,26 +31,26 @@ #ifdef CONFIG_MIPS_DB1550 -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR -#define BCSR_KSEG1_ADDR 0xAF000000 -#define NAND_PHYS_ADDR 0x20000000 +#define BCSR_KSEG1_ADDR 0xAF000000 +#define NAND_PHYS_ADDR 0x20000000 #else #define BCSR_KSEG1_ADDR 0xAE000000 #endif /* - * Overlay data structure of the Db1x00 board registers. - * Registers located at physical 0E0000xx, KSEG1 0xAE0000xx + * Overlay data structure of the DBAu1x00 board registers. + * Registers are located at physical 0E0000xx, KSEG1 0xAE0000xx. */ typedef volatile struct { @@ -138,18 +137,19 @@ typedef volatile struct #define BCSR_SWRESET_RESET 0x0080 -/* PCMCIA Db1x00 specific defines */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) +/* PCMCIA DBAu1x00 specific defines */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) /* VPP/VCC */ #define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) + ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) -/* SD controller macros */ /* - * Detect card. + * SD controller macros */ + +/* Detect card. */ #define mmc_card_inserted(_n_, _res_) \ do { \ BCSR * const bcsr = (BCSR *)0xAE000000; \ @@ -176,10 +176,10 @@ typedef volatile struct unsigned long mmc_pwr, mmc_wp, board_specific; \ if ((_n_)) { \ mmc_pwr = BCSR_BOARD_SD1_PWR; \ - mmc_wp = BCSR_BOARD_SD1_WP; \ + mmc_wp = BCSR_BOARD_SD1_WP; \ } else { \ mmc_pwr = BCSR_BOARD_SD0_PWR; \ - mmc_wp = BCSR_BOARD_SD0_WP; \ + mmc_wp = BCSR_BOARD_SD0_WP; \ } \ board_specific = au_readl((unsigned long)(&bcsr->specific)); \ if (!(board_specific & mmc_wp)) {/* low means card present */ \ @@ -190,17 +190,19 @@ typedef volatile struct } while (0) -/* NAND defines */ -/* Timing values as described in databook, * ns value stripped of +/* + * NAND defines + * + * Timing values as described in databook, * ns value stripped of the * lower 2 bits. - * These defines are here rather than an SOC1550 generic file because + * These defines are here rather than an Au1550 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -208,16 +210,15 @@ typedef volatile struct #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) -#define NAND_CS 1 +#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) +#define NAND_CS 1 -/* should be done by yamon */ -#define NAND_STCFG 0x00400005 /* 8-bit NAND */ -#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ -#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ +/* Should be done by YAMON */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396 MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ #endif /* __ASM_DB1X00_H */ - -- cgit v1.1 From 7916c3548e53bffb0545a1d0dc7fde86d79add92 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:25:55 +0400 Subject: [MIPS] Pb1000 code style cleanup Fix several errors and warnings given by checkpatch.pl: - use of C99 // comments; - brace not on the same line with condition in the 'switch' statement; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - using simple_strtol() where strict_strtol() could be used. In addition to these changes, also do the following: - properly indent the 'switch' statement; - remove needless parentheses; - insert spaces between operator and its operands; - replace numeric literals/expressions with the matching macros; - remove useless #if dirctive from board_setup(); - remove unneeded numeric literal type casts; - remove space after the type cast's closing parenthesis; - replace spaces after the macro name with tabs in the #define directives, and sometimes insert spaces there; - remove excess new lines; - fix typos/errors, capitalize acronyms, etc. in the comments; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first/last line; - combine some comments; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-pb1x00/pb1000.h | 189 ++++++++++------------------------ 1 file changed, 52 insertions(+), 137 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-pb1x00/pb1000.h b/include/asm-mips/mach-pb1x00/pb1000.h index b52e0e7..6d1ff90 100644 --- a/include/asm-mips/mach-pb1x00/pb1000.h +++ b/include/asm-mips/mach-pb1x00/pb1000.h @@ -1,9 +1,8 @@ /* - * Alchemy Semi PB1000 Referrence Board + * Alchemy Semi Pb1000 Referrence Board * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2001, 2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. * * ######################################################################## * @@ -28,145 +27,61 @@ #define __ASM_PB1000_H /* PCMCIA PB1000 specific defines */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) - -#define PB1000_PCR 0xBE000000 -# define PCR_SLOT_0_VPP0 (1<<0) -# define PCR_SLOT_0_VPP1 (1<<1) -# define PCR_SLOT_0_VCC0 (1<<2) -# define PCR_SLOT_0_VCC1 (1<<3) -# define PCR_SLOT_0_RST (1<<4) - -# define PCR_SLOT_1_VPP0 (1<<8) -# define PCR_SLOT_1_VPP1 (1<<9) -# define PCR_SLOT_1_VCC0 (1<<10) -# define PCR_SLOT_1_VCC1 (1<<11) -# define PCR_SLOT_1_RST (1<<12) - -#define PB1000_MDR 0xBE000004 -# define MDR_PI (1<<5) /* pcmcia int latch */ -# define MDR_EPI (1<<14) /* enable pcmcia int */ -# define MDR_CPI (1<<15) /* clear pcmcia int */ - -#define PB1000_ACR1 0xBE000008 -# define ACR1_SLOT_0_CD1 (1<<0) /* card detect 1 */ -# define ACR1_SLOT_0_CD2 (1<<1) /* card detect 2 */ -# define ACR1_SLOT_0_READY (1<<2) /* ready */ -# define ACR1_SLOT_0_STATUS (1<<3) /* status change */ -# define ACR1_SLOT_0_VS1 (1<<4) /* voltage sense 1 */ -# define ACR1_SLOT_0_VS2 (1<<5) /* voltage sense 2 */ -# define ACR1_SLOT_0_INPACK (1<<6) /* inpack pin status */ -# define ACR1_SLOT_1_CD1 (1<<8) /* card detect 1 */ -# define ACR1_SLOT_1_CD2 (1<<9) /* card detect 2 */ -# define ACR1_SLOT_1_READY (1<<10) /* ready */ -# define ACR1_SLOT_1_STATUS (1<<11) /* status change */ -# define ACR1_SLOT_1_VS1 (1<<12) /* voltage sense 1 */ -# define ACR1_SLOT_1_VS2 (1<<13) /* voltage sense 2 */ -# define ACR1_SLOT_1_INPACK (1<<14) /* inpack pin status */ - -#define CPLD_AUX0 0xBE00000C -#define CPLD_AUX1 0xBE000010 -#define CPLD_AUX2 0xBE000014 +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) + +#define PB1000_PCR 0xBE000000 +# define PCR_SLOT_0_VPP0 (1 << 0) +# define PCR_SLOT_0_VPP1 (1 << 1) +# define PCR_SLOT_0_VCC0 (1 << 2) +# define PCR_SLOT_0_VCC1 (1 << 3) +# define PCR_SLOT_0_RST (1 << 4) +# define PCR_SLOT_1_VPP0 (1 << 8) +# define PCR_SLOT_1_VPP1 (1 << 9) +# define PCR_SLOT_1_VCC0 (1 << 10) +# define PCR_SLOT_1_VCC1 (1 << 11) +# define PCR_SLOT_1_RST (1 << 12) + +#define PB1000_MDR 0xBE000004 +# define MDR_PI (1 << 5) /* PCMCIA int latch */ +# define MDR_EPI (1 << 14) /* enable PCMCIA int */ +# define MDR_CPI (1 << 15) /* clear PCMCIA int */ + +#define PB1000_ACR1 0xBE000008 +# define ACR1_SLOT_0_CD1 (1 << 0) /* card detect 1 */ +# define ACR1_SLOT_0_CD2 (1 << 1) /* card detect 2 */ +# define ACR1_SLOT_0_READY (1 << 2) /* ready */ +# define ACR1_SLOT_0_STATUS (1 << 3) /* status change */ +# define ACR1_SLOT_0_VS1 (1 << 4) /* voltage sense 1 */ +# define ACR1_SLOT_0_VS2 (1 << 5) /* voltage sense 2 */ +# define ACR1_SLOT_0_INPACK (1 << 6) /* inpack pin status */ +# define ACR1_SLOT_1_CD1 (1 << 8) /* card detect 1 */ +# define ACR1_SLOT_1_CD2 (1 << 9) /* card detect 2 */ +# define ACR1_SLOT_1_READY (1 << 10) /* ready */ +# define ACR1_SLOT_1_STATUS (1 << 11) /* status change */ +# define ACR1_SLOT_1_VS1 (1 << 12) /* voltage sense 1 */ +# define ACR1_SLOT_1_VS2 (1 << 13) /* voltage sense 2 */ +# define ACR1_SLOT_1_INPACK (1 << 14) /* inpack pin status */ + +#define CPLD_AUX0 0xBE00000C +#define CPLD_AUX1 0xBE000010 +#define CPLD_AUX2 0xBE000014 /* Voltage levels */ /* VPPEN1 - VPPEN0 */ -#define VPP_GND ((0<<1) | (0<<0)) -#define VPP_5V ((1<<1) | (0<<0)) -#define VPP_3V ((0<<1) | (1<<0)) -#define VPP_12V ((0<<1) | (1<<0)) -#define VPP_HIZ ((1<<1) | (1<<0)) +#define VPP_GND ((0 << 1) | (0 << 0)) +#define VPP_5V ((1 << 1) | (0 << 0)) +#define VPP_3V ((0 << 1) | (1 << 0)) +#define VPP_12V ((0 << 1) | (1 << 0)) +#define VPP_HIZ ((1 << 1) | (1 << 0)) /* VCCEN1 - VCCEN0 */ -#define VCC_3V ((0<<1) | (1<<0)) -#define VCC_5V ((1<<1) | (0<<0)) -#define VCC_HIZ ((0<<1) | (0<<0)) +#define VCC_3V ((0 << 1) | (1 << 0)) +#define VCC_5V ((1 << 1) | (0 << 0)) +#define VCC_HIZ ((0 << 1) | (0 << 0)) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) - - -/* PCI PB1000 specific defines */ -/* The reason these defines are here instead of au1000.h is because - * the Au1000 does not have a PCI bus controller so the PCI implementation - * on the some of the older Pb1000 boards was very board specific. - */ -#define PCI_CONFIG_BASE 0xBA020000 /* the only external slot */ - -#define SDRAM_DEVID 0xBA010000 -#define SDRAM_CMD 0xBA010004 -#define SDRAM_CLASS 0xBA010008 -#define SDRAM_MISC 0xBA01000C -#define SDRAM_MBAR 0xBA010010 - -#define PCI_IO_DATA_PORT 0xBA800000 - -#define PCI_IO_ADDR 0xBE00001C -#define PCI_INT_ACK 0xBBC00000 -#define PCI_IO_READ 0xBBC00020 -#define PCI_IO_WRITE 0xBBC00030 - -#define PCI_BRIDGE_CONFIG 0xBE000018 - -#define PCI_IO_START 0x10000000 -#define PCI_IO_END 0x1000ffff -#define PCI_MEM_START 0x18000000 -#define PCI_MEM_END 0x18ffffff - -#define PCI_FIRST_DEVFN 0 -#define PCI_LAST_DEVFN 1 - -static inline u8 au_pci_io_readb(u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG); - return (readl(PCI_IO_DATA_PORT) & 0xff); -} - -static inline u16 au_pci_io_readw(u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG); - return (readl(PCI_IO_DATA_PORT) & 0xffff); -} - -static inline u32 au_pci_io_readl(u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff), PCI_BRIDGE_CONFIG); - return readl(PCI_IO_DATA_PORT); -} - -static inline void au_pci_io_writeb(u8 val, u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<12), PCI_BRIDGE_CONFIG); - writel(val, PCI_IO_DATA_PORT); -} - -static inline void au_pci_io_writew(u16 val, u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffcfff) | (1<<13), PCI_BRIDGE_CONFIG); - writel(val, PCI_IO_DATA_PORT); -} - -static inline void au_pci_io_writel(u32 val, u32 addr) -{ - writel(addr, PCI_IO_ADDR); - writel(readl(PCI_BRIDGE_CONFIG) & 0xffffcfff, PCI_BRIDGE_CONFIG); - writel(val, PCI_IO_DATA_PORT); -} - -static inline void set_sdram_extbyte(void) -{ - writel(readl(PCI_BRIDGE_CONFIG) & 0xffffff00, PCI_BRIDGE_CONFIG); -} - -static inline void set_slot_extbyte(void) -{ - writel((readl(PCI_BRIDGE_CONFIG) & 0xffffbf00) | 0x18, PCI_BRIDGE_CONFIG); -} +#define SET_VCC_VPP(VCC, VPP, SLOT) \ + ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) #endif /* __ASM_PB1000_H */ -- cgit v1.1 From be1c3c1ed13f31ae8f9d5d043d96d2e56b5ee1d5 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:26:28 +0400 Subject: [MIPS] Pb1100 code style cleanup Fix several errors and warnings given by checkpatch.pl: - space between asterisk and variable name; - use of C99 // comments; - using simple_strtol() where strict_strtol() could be used. In addition to these changes, also do the following: - properly indent the code; - remove space after the type cast's closing parenthesis; - replace numeric literals/expressions with the matching macros; - replace spaces after the macro name with tabs in the #define directives, and sometimes insert spaces there; - fix typos/errors, capitalize acronyms, etc. in the comments; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-pb1x00/pb1100.h | 96 +++++++++++++++++------------------ 1 file changed, 48 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-pb1x00/pb1100.h b/include/asm-mips/mach-pb1x00/pb1100.h index 63aa392..b1a60f1 100644 --- a/include/asm-mips/mach-pb1x00/pb1100.h +++ b/include/asm-mips/mach-pb1x00/pb1100.h @@ -1,9 +1,8 @@ /* - * Alchemy Semi PB1100 Referrence Board + * Alchemy Semi Pb1100 Referrence Board * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2001, 2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. * * ######################################################################## * @@ -27,59 +26,60 @@ #ifndef __ASM_PB1100_H #define __ASM_PB1100_H -#define PB1100_IDENT 0xAE000000 -#define BOARD_STATUS_REG 0xAE000004 -# define PB1100_ROM_SEL (1<<15) -# define PB1100_ROM_SIZ (1<<14) -# define PB1100_SWAP_BOOT (1<<13) -# define PB1100_FLASH_WP (1<<12) -# define PB1100_ROM_H_STS (1<<11) -# define PB1100_ROM_L_STS (1<<10) -# define PB1100_FLASH_H_STS (1<<9) -# define PB1100_FLASH_L_STS (1<<8) -# define PB1100_SRAM_SIZ (1<<7) -# define PB1100_TSC_BUSY (1<<6) -# define PB1100_PCMCIA_VS_MASK (3<<4) -# define PB1100_RS232_CD (1<<3) -# define PB1100_RS232_CTS (1<<2) -# define PB1100_RS232_DSR (1<<1) -# define PB1100_RS232_RI (1<<0) +#define PB1100_IDENT 0xAE000000 +#define BOARD_STATUS_REG 0xAE000004 +# define PB1100_ROM_SEL (1 << 15) +# define PB1100_ROM_SIZ (1 << 14) +# define PB1100_SWAP_BOOT (1 << 13) +# define PB1100_FLASH_WP (1 << 12) +# define PB1100_ROM_H_STS (1 << 11) +# define PB1100_ROM_L_STS (1 << 10) +# define PB1100_FLASH_H_STS (1 << 9) +# define PB1100_FLASH_L_STS (1 << 8) +# define PB1100_SRAM_SIZ (1 << 7) +# define PB1100_TSC_BUSY (1 << 6) +# define PB1100_PCMCIA_VS_MASK (3 << 4) +# define PB1100_RS232_CD (1 << 3) +# define PB1100_RS232_CTS (1 << 2) +# define PB1100_RS232_DSR (1 << 1) +# define PB1100_RS232_RI (1 << 0) -#define PB1100_IRDA_RS232 0xAE00000C -# define PB1100_IRDA_FULL (0<<14) /* full power */ -# define PB1100_IRDA_SHUTDOWN (1<<14) -# define PB1100_IRDA_TT (2<<14) /* 2/3 power */ -# define PB1100_IRDA_OT (3<<14) /* 1/3 power */ -# define PB1100_IRDA_FIR (1<<13) +#define PB1100_IRDA_RS232 0xAE00000C +# define PB1100_IRDA_FULL (0 << 14) /* full power */ +# define PB1100_IRDA_SHUTDOWN (1 << 14) +# define PB1100_IRDA_TT (2 << 14) /* 2/3 power */ +# define PB1100_IRDA_OT (3 << 14) /* 1/3 power */ +# define PB1100_IRDA_FIR (1 << 13) -#define PCMCIA_BOARD_REG 0xAE000010 -# define PB1100_SD_WP1_RO (1<<15) /* read only */ -# define PB1100_SD_WP0_RO (1<<14) /* read only */ -# define PB1100_SD_PWR1 (1<<11) /* applies power to SD1 */ -# define PB1100_SD_PWR0 (1<<10) /* applies power to SD0 */ -# define PB1100_SEL_SD_CONN1 (1<<9) -# define PB1100_SEL_SD_CONN0 (1<<8) -# define PC_DEASSERT_RST (1<<7) -# define PC_DRV_EN (1<<4) +#define PCMCIA_BOARD_REG 0xAE000010 +# define PB1100_SD_WP1_RO (1 << 15) /* read only */ +# define PB1100_SD_WP0_RO (1 << 14) /* read only */ +# define PB1100_SD_PWR1 (1 << 11) /* applies power to SD1 */ +# define PB1100_SD_PWR0 (1 << 10) /* applies power to SD0 */ +# define PB1100_SEL_SD_CONN1 (1 << 9) +# define PB1100_SEL_SD_CONN0 (1 << 8) +# define PC_DEASSERT_RST (1 << 7) +# define PC_DRV_EN (1 << 4) -#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ +#define PB1100_G_CONTROL 0xAE000014 /* graphics control */ -#define PB1100_RST_VDDI 0xAE00001C -# define PB1100_SOFT_RESET (1<<15) /* clear to reset the board */ -# define PB1100_VDDI_MASK (0x1F) +#define PB1100_RST_VDDI 0xAE00001C +# define PB1100_SOFT_RESET (1 << 15) /* clear to reset the board */ +# define PB1100_VDDI_MASK 0x1F -#define PB1100_LEDS 0xAE000018 +#define PB1100_LEDS 0xAE000018 -/* 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED. - * 7:0 is the LED Display's decimal points. +/* + * 11:8 is 4 discreet LEDs. Clearing a bit illuminates the LED. + * 7:0 is the LED Display's decimal points. */ -#define PB1100_HEX_LED 0xAE000018 +#define PB1100_HEX_LED 0xAE000018 -/* PCMCIA PB1100 specific defines */ -#define PCMCIA_MAX_SOCK 0 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) +/* PCMCIA Pb1100 specific defines */ +#define PCMCIA_MAX_SOCK 0 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) +#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0)) #endif /* __ASM_PB1100_H */ -- cgit v1.1 From 2091a17ff7f32432976d1eacbb79a06819d95301 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:27:20 +0400 Subject: [MIPS] Pb1500 code style cleanup Fix several errors and warnings given by checkpatch.pl: - use of C99 // comments; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - using simple_strtol() where strict_strtol() could be used. In addition to these changes, also do the following: - replace numeric literals/expressions with the matching macros; - insert spaces between operator and its operands; - properly indent the code and the array initializers; - remove useless #if dirctive from board_setup(); - remove needless parentheses; - remove unneeded type casts; - remove excess new lines; - make hexadecimal literals all lower case; - remove space after the type cast's closing parenthesis; - insert missing space before closing brace in the array initializers; - replace spaces after the macro name with tabs in the #define directives, also sometimes insert space there for better looks; - fix typos/errors, capitalize acronyms, etc. in the comments; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-pb1x00/pb1500.h | 38 +++++++++++++++++------------------ 1 file changed, 18 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-pb1x00/pb1500.h b/include/asm-mips/mach-pb1x00/pb1500.h index ff6d40c..da51a2e 100644 --- a/include/asm-mips/mach-pb1x00/pb1500.h +++ b/include/asm-mips/mach-pb1x00/pb1500.h @@ -1,9 +1,8 @@ /* - * Alchemy Semi PB1500 Referrence Board + * Alchemy Semi Pb1500 Referrence Board * - * Copyright 2001 MontaVista Software Inc. - * Author: MontaVista Software, Inc. - * ppopov@mvista.com or source@mvista.com + * Copyright 2001, 2008 MontaVista Software Inc. + * Author: MontaVista Software, Inc. * * ######################################################################## * @@ -27,25 +26,24 @@ #ifndef __ASM_PB1500_H #define __ASM_PB1500_H +#define IDENT_BOARD_REG 0xAE000000 +#define BOARD_STATUS_REG 0xAE000004 +#define PCI_BOARD_REG 0xAE000010 +#define PCMCIA_BOARD_REG 0xAE000010 +# define PC_DEASSERT_RST 0x80 +# define PC_DRV_EN 0x10 +#define PB1500_G_CONTROL 0xAE000014 +#define PB1500_RST_VDDI 0xAE00001C +#define PB1500_LEDS 0xAE000018 -#define IDENT_BOARD_REG 0xAE000000 -#define BOARD_STATUS_REG 0xAE000004 -#define PCI_BOARD_REG 0xAE000010 -#define PCMCIA_BOARD_REG 0xAE000010 - #define PC_DEASSERT_RST 0x80 - #define PC_DRV_EN 0x10 -#define PB1500_G_CONTROL 0xAE000014 -#define PB1500_RST_VDDI 0xAE00001C -#define PB1500_LEDS 0xAE000018 +#define PB1500_HEX_LED 0xAF000004 +#define PB1500_HEX_LED_BLANK 0xAF000008 -#define PB1500_HEX_LED 0xAF000004 -#define PB1500_HEX_LED_BLANK 0xAF000008 - -/* PCMCIA PB1500 specific defines */ -#define PCMCIA_MAX_SOCK 0 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) +/* PCMCIA Pb1500 specific defines */ +#define PCMCIA_MAX_SOCK 0 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP) (((VCC)<<2) | ((VPP)<<0)) +#define SET_VCC_VPP(VCC, VPP) (((VCC) << 2) | ((VPP) << 0)) #endif /* __ASM_PB1500_H */ -- cgit v1.1 From 6afabe6c9335c0534224b53c3db4b091621af2dd Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:28:17 +0400 Subject: [MIPS] Pb1550 code style cleanup Fix a few errors and warnings given by checkpatch.pl: - macros with complex values not enclosed in parentheses; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - using simple_strtol() where strict_strtol() could be used. In addition to these changes, also do the following: - replace numeric literals with the matching macros; - properly indent the code and the array initializers; - insert spaces between operator and its operands, also remove excess spaces there; - remove space after the type cast's closing parenthesis; - insert missing space before closing brace in the array initializers; - replace spaces after the macro name with tabs in the #define directives, also sometimes insert space there for better looks; - remove excess tabs after the macro name in the #define directives; - fix typos/errors, capitalize acronyms, etc. in the comments; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-pb1x00/pb1550.h | 51 ++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 25 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-pb1x00/pb1550.h b/include/asm-mips/mach-pb1x00/pb1550.h index c2ab0e2..6704a11 100644 --- a/include/asm-mips/mach-pb1x00/pb1550.h +++ b/include/asm-mips/mach-pb1x00/pb1550.h @@ -30,15 +30,15 @@ #include #include -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define AC97_PSC_BASE PSC1_BASE_ADDR -#define SMBUS_PSC_BASE PSC2_BASE_ADDR -#define I2S_PSC_BASE PSC3_BASE_ADDR +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR +#define SMBUS_PSC_BASE PSC2_BASE_ADDR +#define I2S_PSC_BASE PSC3_BASE_ADDR #define BCSR_PHYS_ADDR 0xAF000000 @@ -129,12 +129,12 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define BCSR_SYSTEM_POWEROFF 0x4000 #define BCSR_SYSTEM_RESET 0x8000 -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) +#define SET_VCC_VPP(VCC, VPP, SLOT) \ + ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) #if defined(CONFIG_MTD_PB1550_BOOT) && defined(CONFIG_MTD_PB1550_USER) #define PB1550_BOTH_BANKS @@ -144,16 +144,17 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define PB1550_USER_ONLY #endif -/* Timing values as described in databook, * ns value stripped of +/* + * Timing values as described in databook, * ns value stripped of * lower 2 bits. * These defines are here rather than an SOC1550 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -161,16 +162,16 @@ static BCSR * const bcsr = (BCSR *)BCSR_PHYS_ADDR; #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) +#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) #define NAND_CS 1 -/* should be done by yamon */ -#define NAND_STCFG 0x00400005 /* 8-bit NAND */ -#define NAND_STTIME 0x00007774 /* valid for 396MHz SD=2 only */ -#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ +/* Should be done by YAMON */ +#define NAND_STCFG 0x00400005 /* 8-bit NAND */ +#define NAND_STTIME 0x00007774 /* valid for 396 MHz SD=2 only */ +#define NAND_STADDR 0x12000FFF /* physical address 0x20000000 */ #endif /* __ASM_PB1550_H */ -- cgit v1.1 From c3d1d5c8c10c937c65186f6dac75e2fb4675ef07 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 30 Apr 2008 23:29:04 +0400 Subject: [MIPS] Pb1200/DBAu1200 code style cleanup Fix several errors and warnings given by checkpatch.pl: - use of C99 // comments; - initialization of a 'static' variable to 0; - space after opening and before closing parentheses; - missing space between 'for' and opening parenthesis; - macros with complex values not enclosed in parentheses; - printk() without KERN_* facility level; - unnecessary braces for single-statement block; - using simple_strtol() where strict_strtol() could be used; - line over 80 characters. In addition to these changes, also do the following: - mention DBAu1200 board in the Makefile; - replace the group of #include/#ifdef directives by a single #include since this header contains the needed stuff; - properly indent the blocks; - insert spaces between operator and its operands, remove excess spaces there; - remove needless parentheses and add some for clarity; - replace numeric literals/expressions with the matching macros; - remove space after the type cast's closing parenthesis; - reduce pb1200_setup_cascade() to the single 'return' statement; - reduce the number of printed empty lines in the so-called CPLD workaround; - remove #undef AU1X00_EXTERNAL_INT since that macro is not defined anywhere; - replace spaces after the macro name with tabs in the #define directives; - remove excess tabs after the macro name in the #define directives; - fix typo in the BCSR_RESETS_PWMR1mUX macro's name; - group all Pb1200 PCMCIA definitions together; - put the function's result type and name/parameters on the same line; - insert missing and remove excess new lines; - make the multi-line comment style consistent with the kernel style elsewhere by adding empty first line and/or adding space/asterisk on their left side; - fix typos/errors, capitalize acronyms, etc. in the comments; - combine some comments; - update MontaVista copyright; - remove Pete Popov's old email address... Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- include/asm-mips/mach-db1x00/db1200.h | 73 +++++++++++++-------------- include/asm-mips/mach-pb1x00/pb1200.h | 93 +++++++++++++++++------------------ 2 files changed, 81 insertions(+), 85 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mach-db1x00/db1200.h b/include/asm-mips/mach-db1x00/db1200.h index eedd048..27f2610 100644 --- a/include/asm-mips/mach-db1x00/db1200.h +++ b/include/asm-mips/mach-db1x00/db1200.h @@ -1,6 +1,6 @@ /* - * AMD Alchemy DB1200 Referrence Board - * Board Registers defines. + * AMD Alchemy DBAu1200 Reference Board + * Board register defines. * * ######################################################################## * @@ -27,26 +27,25 @@ #include #include -// This is defined in au1000.h with bogus value -#undef AU1X00_EXTERNAL_INT +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX - -/* SPI and SMB are muxed on the Pb1200 board. - Refer to board documentation. +/* + * SPI and SMB are muxed on the DBAu1200 board. + * Refer to board documentation. */ -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define SMBUS_PSC_BASE PSC0_BASE_ADDR -/* AC97 and I2S are muxed on the Pb1200 board. - Refer to board documentation. +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* + * AC'97 and I2S are muxed on the DBAu1200 board. + * Refer to board documentation. */ -#define AC97_PSC_BASE PSC1_BASE_ADDR +#define AC97_PSC_BASE PSC1_BASE_ADDR #define I2S_PSC_BASE PSC1_BASE_ADDR -#define BCSR_KSEG1_ADDR 0xB9800000 +#define BCSR_KSEG1_ADDR 0xB9800000 typedef volatile struct { @@ -102,9 +101,9 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_STATUS_SWAPBOOT 0x0040 #define BCSR_STATUS_FLASHBUSY 0x0100 #define BCSR_STATUS_IDECBLID 0x0200 -#define BCSR_STATUS_SD0WP 0x0400 -#define BCSR_STATUS_U0RXD 0x1000 -#define BCSR_STATUS_U1RXD 0x2000 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 #define BCSR_SWITCHES_OCTAL 0x00FF #define BCSR_SWITCHES_DIP_1 0x0080 @@ -122,8 +121,8 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_RESETS_DC 0x0004 #define BCSR_RESETS_IDE 0x0008 #define BCSR_RESETS_TV 0x0010 -/* not resets but in the same register */ -#define BCSR_RESETS_PWMR1mUX 0x0800 +/* Not resets but in the same register */ +#define BCSR_RESETS_PWMR1MUX 0x0800 #define BCSR_RESETS_PCS0MUX 0x1000 #define BCSR_RESETS_PCS1MUX 0x2000 #define BCSR_RESETS_SPISEL 0x4000 @@ -160,7 +159,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_PC0STSCHG 0x0008 #define BCSR_INT_PC1 0x0010 #define BCSR_INT_PC1STSCHG 0x0020 -#define BCSR_INT_DC 0x0040 +#define BCSR_INT_DC 0x0040 #define BCSR_INT_FLASHBUSY 0x0080 #define BCSR_INT_PC0INSERT 0x0100 #define BCSR_INT_PC0EJECT 0x0200 @@ -179,10 +178,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 #define IDE_RQSIZE 128 -#define NAND_PHYS_ADDR 0x20000000 +#define NAND_PHYS_ADDR 0x20000000 /* - * External Interrupts for Pb1200 as of 8/6/2004. + * External Interrupts for DBAu1200 as of 8/6/2004. * Bit positions in the CPLD registers can be calculated by taking * the interrupt define and subtracting the DB1200_INT_BEGIN value. * @@ -211,23 +210,21 @@ enum external_pb1200_ints { }; -/* For drivers/pcmcia/au1000_db1x00.c */ - -/* PCMCIA Db1x00 specific defines */ - -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) +/* + * DBAu1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c + */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) /* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) +#define SET_VCC_VPP(VCC, VPP, SLOT) \ + ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) -#define BOARD_PC0_INT DB1200_PC0_INT -#define BOARD_PC1_INT DB1200_PC1_INT -#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) +#define BOARD_PC0_INT DB1200_PC0_INT +#define BOARD_PC1_INT DB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET))) -/* Nand chip select */ +/* NAND chip select */ #define NAND_CS 1 #endif /* __ASM_DB1200_H */ - diff --git a/include/asm-mips/mach-pb1x00/pb1200.h b/include/asm-mips/mach-pb1x00/pb1200.h index e2c6bca..c8618df 100644 --- a/include/asm-mips/mach-pb1x00/pb1200.h +++ b/include/asm-mips/mach-pb1x00/pb1200.h @@ -1,5 +1,5 @@ /* - * AMD Alchemy PB1200 Referrence Board + * AMD Alchemy Pb1200 Referrence Board * Board Registers defines. * * ######################################################################## @@ -27,21 +27,20 @@ #include #include -// This is defined in au1000.h with bogus value -#undef AU1X00_EXTERNAL_INT +#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX +#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX +#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX -#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC1_TX -#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC1_RX - -/* SPI and SMB are muxed on the Pb1200 board. - Refer to board documentation. +/* + * SPI and SMB are muxed on the Pb1200 board. + * Refer to board documentation. */ -#define SPI_PSC_BASE PSC0_BASE_ADDR -#define SMBUS_PSC_BASE PSC0_BASE_ADDR -/* AC97 and I2S are muxed on the Pb1200 board. - Refer to board documentation. +#define SPI_PSC_BASE PSC0_BASE_ADDR +#define SMBUS_PSC_BASE PSC0_BASE_ADDR +/* + * AC97 and I2S are muxed on the Pb1200 board. + * Refer to board documentation. */ #define AC97_PSC_BASE PSC1_BASE_ADDR #define I2S_PSC_BASE PSC1_BASE_ADDR @@ -102,10 +101,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_STATUS_SWAPBOOT 0x0040 #define BCSR_STATUS_FLASHBUSY 0x0100 #define BCSR_STATUS_IDECBLID 0x0200 -#define BCSR_STATUS_SD0WP 0x0400 -#define BCSR_STATUS_SD1WP 0x0800 -#define BCSR_STATUS_U0RXD 0x1000 -#define BCSR_STATUS_U1RXD 0x2000 +#define BCSR_STATUS_SD0WP 0x0400 +#define BCSR_STATUS_SD1WP 0x0800 +#define BCSR_STATUS_U0RXD 0x1000 +#define BCSR_STATUS_U1RXD 0x2000 #define BCSR_SWITCHES_OCTAL 0x00FF #define BCSR_SWITCHES_DIP_1 0x0080 @@ -123,11 +122,11 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_RESETS_DC 0x0004 #define BCSR_RESETS_IDE 0x0008 /* not resets but in the same register */ -#define BCSR_RESETS_WSCFSM 0x0800 +#define BCSR_RESETS_WSCFSM 0x0800 #define BCSR_RESETS_PCS0MUX 0x1000 #define BCSR_RESETS_PCS1MUX 0x2000 #define BCSR_RESETS_SPISEL 0x4000 -#define BCSR_RESETS_SD1MUX 0x8000 +#define BCSR_RESETS_SD1MUX 0x8000 #define BCSR_PCMCIA_PC0VPP 0x0003 #define BCSR_PCMCIA_PC0VCC 0x000C @@ -163,7 +162,7 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_PC0STSCHG 0x0008 #define BCSR_INT_PC1 0x0010 #define BCSR_INT_PC1STSCHG 0x0020 -#define BCSR_INT_DC 0x0040 +#define BCSR_INT_DC 0x0040 #define BCSR_INT_FLASHBUSY 0x0080 #define BCSR_INT_PC0INSERT 0x0100 #define BCSR_INT_PC0EJECT 0x0200 @@ -174,14 +173,6 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define BCSR_INT_SD1INSERT 0x4000 #define BCSR_INT_SD1EJECT 0x8000 -/* PCMCIA Db1x00 specific defines */ -#define PCMCIA_MAX_SOCK 1 -#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK+1) - -/* VPP/VCC */ -#define SET_VCC_VPP(VCC, VPP, SLOT)\ - ((((VCC)<<2) | ((VPP)<<0)) << ((SLOT)*8)) - #define SMC91C111_PHYS_ADDR 0x0D000300 #define SMC91C111_INT PB1200_ETH_INT @@ -192,18 +183,19 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define IDE_DDMA_REQ DSCR_CMD0_DMA_REQ1 #define IDE_RQSIZE 128 -#define NAND_PHYS_ADDR 0x1C000000 +#define NAND_PHYS_ADDR 0x1C000000 -/* Timing values as described in databook, * ns value stripped of +/* + * Timing values as described in databook, * ns value stripped of * lower 2 bits. - * These defines are here rather than an SOC1200 generic file because + * These defines are here rather than an Au1200 generic file because * the parts chosen on another board may be different and may require * different timings. */ -#define NAND_T_H (18 >> 2) -#define NAND_T_PUL (30 >> 2) -#define NAND_T_SU (30 >> 2) -#define NAND_T_WH (30 >> 2) +#define NAND_T_H (18 >> 2) +#define NAND_T_PUL (30 >> 2) +#define NAND_T_SU (30 >> 2) +#define NAND_T_WH (30 >> 2) /* Bitfield shift amounts */ #define NAND_T_H_SHIFT 0 @@ -211,11 +203,10 @@ static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR; #define NAND_T_SU_SHIFT 8 #define NAND_T_WH_SHIFT 12 -#define NAND_TIMING ((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ - ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ - ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ - ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT) - +#define NAND_TIMING (((NAND_T_H & 0xF) << NAND_T_H_SHIFT) | \ + ((NAND_T_PUL & 0xF) << NAND_T_PUL_SHIFT) | \ + ((NAND_T_SU & 0xF) << NAND_T_SU_SHIFT) | \ + ((NAND_T_WH & 0xF) << NAND_T_WH_SHIFT)) /* * External Interrupts for Pb1200 as of 8/6/2004. @@ -248,13 +239,21 @@ enum external_pb1200_ints { PB1200_INT_END = PB1200_INT_BEGIN + 15 }; -/* For drivers/pcmcia/au1000_db1x00.c */ -#define BOARD_PC0_INT PB1200_PC0_INT -#define BOARD_PC1_INT PB1200_PC1_INT -#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1<<(8+(2*SOCKET))) +/* + * Pb1200 specific PCMCIA defines for drivers/pcmcia/au1000_db1x00.c + */ +#define PCMCIA_MAX_SOCK 1 +#define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) -/* Nand chip select */ +/* VPP/VCC */ +#define SET_VCC_VPP(VCC, VPP, SLOT) \ + ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) + +#define BOARD_PC0_INT PB1200_PC0_INT +#define BOARD_PC1_INT PB1200_PC1_INT +#define BOARD_CARD_INSERTED(SOCKET) bcsr->sig_status & (1 << (8 + (2 * SOCKET))) + +/* NAND chip select */ #define NAND_CS 1 #endif /* __ASM_PB1200_H */ - -- cgit v1.1 From fcd84f2fca49166dab2dba259eca6e633585763f Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Sun, 4 May 2008 00:25:02 +0200 Subject: [MIPS] Fix __fls for non-MIPS32/MIPS64 cpus Only MIPS32 and MIPS64 CPUs implement clz/dclz. Therefore don't export __ilog2() for non MIPS32/MIPS64 cpus and use generic __fls bitop code for these cpus. Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- include/asm-mips/bitops.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index c2bd126..5e1f590 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -558,6 +558,8 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long * __clear_bit(nr, addr); } +#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) + /* * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists @@ -596,8 +598,6 @@ static inline unsigned long __fls(unsigned long x) return __ilog2(x); } -#if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - /* * __ffs - find first bit in word. * @word: The word to search @@ -654,6 +654,7 @@ static inline int ffs(int word) #else #include +#include #include #include #include -- cgit v1.1 From ddc0d009947bf8645fa3543f4532063a787202da Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 4 May 2008 14:53:53 +0100 Subject: [MIPS] Get rid of __ilog2 56a6b1eb7bfb5ace0b5cb9c149f502fbd101b8ab was a bit too conservative and left __ilog2 around which is only used as an internal function for other bitops. Signed-off-by: Ralf Baechle --- include/asm-mips/bitops.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 5e1f590..6427247 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -564,7 +564,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long * * Return the bit position (0..63) of the most significant 1 bit in a word * Returns -1 if no 1 bit exists */ -static inline int __ilog2(unsigned long x) +static inline unsigned long __fls(unsigned long x) { int lz; @@ -593,11 +593,6 @@ static inline int __ilog2(unsigned long x) return 63 - lz; } -static inline unsigned long __fls(unsigned long x) -{ - return __ilog2(x); -} - /* * __ffs - find first bit in word. * @word: The word to search @@ -607,7 +602,7 @@ static inline unsigned long __fls(unsigned long x) */ static inline unsigned long __ffs(unsigned long word) { - return __ilog2(word & -word); + return __fls(word & -word); } /* -- cgit v1.1 From 2ccdcfeeca6a1888180ffc4a1ab097f1fb2bd029 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Fri, 9 May 2008 09:46:38 -0700 Subject: types: s390: fix #ifdef reversal in The #ifdef for the integer types was reversed; the standard pattern in these files are: #ifndef __s390x__ /* 32-bit code */ #else /* 64-bit code */ #endif Stick with the original pattern, but make sure the 32-bit code actually comes first! Reported by Al Viro. Signed-off-by: H. Peter Anvin Cc: Martin Schwidefsky Cc: Heiko Carstens Cc: Al Viro --- include/asm-s390/types.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-s390/types.h b/include/asm-s390/types.h index 78dda03..0e959e2 100644 --- a/include/asm-s390/types.h +++ b/include/asm-s390/types.h @@ -10,9 +10,9 @@ #define _S390_TYPES_H #ifndef __s390x__ -# include -#else # include +#else +# include #endif #ifndef __ASSEMBLY__ -- cgit v1.1 From 9404ef02974a5411687b6c1b8ef3984305620e02 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 12 May 2008 10:14:22 -0700 Subject: Fix up 'need_resched()' definition We should not go through the task pointer to get at the thread info, since it's usually cheaper to just access the thread info directly. So don't make the code look up 'current', when we can just use the thread info accessor functions directly. This generally avoids one level of indirection and tends to work better together with code that also looks at other thread flags (eg preempt_count). Signed-off-by: Linus Torvalds --- include/linux/sched.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 4ab9f32..5a63f2d 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2027,7 +2027,7 @@ static inline int fatal_signal_pending(struct task_struct *p) static inline int need_resched(void) { - return unlikely(test_tsk_need_resched(current)); + return unlikely(test_thread_flag(TIF_NEED_RESCHED)); } /* -- cgit v1.1 From c714a534d85576af21b06be605ca55cb2fb887ee Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Mon, 12 May 2008 13:34:13 -0700 Subject: Make 'cond_resched()' nullification depend on PREEMPT_BKL Because it's not correct with a non-preemptable BKL and just causes PREEMPT kernels to have longer latencies than non-PREEMPT ones (which is obviously not the point of it at all). Of course, that config option actually got removed as an option earlier, so for now this basically disables it entirely, but if BKL preemption is ever resurrected it will be a meaningful optimization. And in the meantime, it at least documents the intent of the code, while not doing the wrong thing. Signed-off-by: Linus Torvalds --- include/linux/sched.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sched.h b/include/linux/sched.h index 5a63f2d..5395a61 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -2038,7 +2038,7 @@ static inline int need_resched(void) * cond_resched_softirq() will enable bhs before scheduling. */ extern int _cond_resched(void); -#ifdef CONFIG_PREEMPT +#ifdef CONFIG_PREEMPT_BKL static inline int cond_resched(void) { return 0; -- cgit v1.1 From 94d149c34cda933ff5096aca94bb23bf68602f4e Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 12 May 2008 16:33:33 -0700 Subject: sparc: Fix mremap address range validation. Just like mmap, we need to validate address ranges regardless of MAP_FIXED. sparc{,64}_mmap_check()'s flag argument is unused, remove. Based upon a report and preliminary patch by Jan Lieskovsky Signed-off-by: David S. Miller --- include/asm-sparc/mman.h | 5 ++--- include/asm-sparc64/mman.h | 5 ++--- 2 files changed, 4 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-sparc/mman.h b/include/asm-sparc/mman.h index e18be98..3d16b40 100644 --- a/include/asm-sparc/mman.h +++ b/include/asm-sparc/mman.h @@ -24,9 +24,8 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#define arch_mmap_check sparc_mmap_check -int sparc_mmap_check(unsigned long addr, unsigned long len, - unsigned long flags); +#define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len) +int sparc_mmap_check(unsigned long addr, unsigned long len); #endif #endif diff --git a/include/asm-sparc64/mman.h b/include/asm-sparc64/mman.h index e584563..625be4d 100644 --- a/include/asm-sparc64/mman.h +++ b/include/asm-sparc64/mman.h @@ -24,9 +24,8 @@ #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -#define arch_mmap_check sparc64_mmap_check -int sparc64_mmap_check(unsigned long addr, unsigned long len, - unsigned long flags); +#define arch_mmap_check(addr,len,flags) sparc64_mmap_check(addr,len) +int sparc64_mmap_check(unsigned long addr, unsigned long len); #endif #endif -- cgit v1.1 From 8388e3da34edb141362bb42811ee487dfec15525 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 12 May 2008 20:17:33 -0700 Subject: net: Set LL_MAX_HEADER properly for wireless. Wireless networking, particularly with MESH enabled, has quite strong requirements for link-layer header space. Based upon some numbers and descriptions from Johannes Berg we use 96 (same as AX25) for plain wireless, and with mesh enabled we use 128. In the process, simplify the cpp conditional logic here by ordering the cases by those needing the most space down to those needing the least case. Signed-off-by: David S. Miller --- include/linux/netdevice.h | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 7469017..a3fb57f 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -93,14 +93,16 @@ struct wireless_dev; * used. */ -#if !defined(CONFIG_AX25) && !defined(CONFIG_AX25_MODULE) && !defined(CONFIG_TR) -#define LL_MAX_HEADER 32 +#if defined(CONFIG_WLAN_80211) || defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) +# if defined(CONFIG_MAC80211_MESH) +# define LL_MAX_HEADER 128 +# else +# define LL_MAX_HEADER 96 +# endif +#elif defined(CONFIG_TR) +# define LL_MAX_HEADER 48 #else -#if defined(CONFIG_AX25) || defined(CONFIG_AX25_MODULE) -#define LL_MAX_HEADER 96 -#else -#define LL_MAX_HEADER 48 -#endif +# define LL_MAX_HEADER 32 #endif #if !defined(CONFIG_NET_IPIP) && !defined(CONFIG_NET_IPIP_MODULE) && \ -- cgit v1.1 From f5184d267c1aedb9b7a8cc44e08ff6b8d382c3b5 Mon Sep 17 00:00:00 2001 From: Johannes Berg Date: Mon, 12 May 2008 20:48:31 -0700 Subject: net: Allow netdevices to specify needed head/tailroom This patch adds needed_headroom/needed_tailroom members to struct net_device and updates many places that allocate sbks to use them. Not all of them can be converted though, and I'm sure I missed some (I mostly grepped for LL_RESERVED_SPACE) Signed-off-by: Johannes Berg Signed-off-by: David S. Miller --- include/linux/netdevice.h | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index a3fb57f..b11e6e1 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -246,11 +246,16 @@ struct hh_cache * * We could use other alignment values, but we must maintain the * relationship HH alignment <= LL alignment. + * + * LL_ALLOCATED_SPACE also takes into account the tailroom the device + * may need. */ #define LL_RESERVED_SPACE(dev) \ - (((dev)->hard_header_len&~(HH_DATA_MOD - 1)) + HH_DATA_MOD) + ((((dev)->hard_header_len+(dev)->needed_headroom)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD) #define LL_RESERVED_SPACE_EXTRA(dev,extra) \ - ((((dev)->hard_header_len+extra)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD) + ((((dev)->hard_header_len+(dev)->needed_headroom+(extra))&~(HH_DATA_MOD - 1)) + HH_DATA_MOD) +#define LL_ALLOCATED_SPACE(dev) \ + ((((dev)->hard_header_len+(dev)->needed_headroom+(dev)->needed_tailroom)&~(HH_DATA_MOD - 1)) + HH_DATA_MOD) struct header_ops { int (*create) (struct sk_buff *skb, struct net_device *dev, @@ -569,6 +574,13 @@ struct net_device unsigned short type; /* interface hardware type */ unsigned short hard_header_len; /* hardware hdr length */ + /* extra head- and tailroom the hardware may need, but not in all cases + * can this be guaranteed, especially tailroom. Some cases also use + * LL_MAX_HEADER instead to allocate the skb. + */ + unsigned short needed_headroom; + unsigned short needed_tailroom; + struct net_device *master; /* Pointer to master device of a group, * which this device is member of. */ -- cgit v1.1 From 9a28dbf8af11d127bf1c644143e7882cb91515dd Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Mon, 12 May 2008 22:45:15 -0700 Subject: sparc64: Use a TS_RESTORE_SIGMASK This mirrors x86 changeset 5a8da0ea82db6fa9737041381079fd16f25dcce2 ("signals: x86 TS_RESTORE_SIGMASK") on sparc64. Signed-off-by: David S. Miller --- include/asm-sparc64/thread_info.h | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h index 71e42d1..e5873e3 100644 --- a/include/asm-sparc64/thread_info.h +++ b/include/asm-sparc64/thread_info.h @@ -38,7 +38,7 @@ struct thread_info { struct task_struct *task; unsigned long flags; __u8 fpsaved[7]; - __u8 pad; + __u8 status; unsigned long ksp; /* D$ line 2 */ @@ -217,7 +217,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); * nop */ #define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -#define TIF_RESTORE_SIGMASK 1 /* restore signal mask in do_signal() */ +/* flags bit 1 is available */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ #define TIF_PERFCTR 4 /* performance counters active */ @@ -244,14 +244,34 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define _TIF_32BIT (1<status |= TS_RESTORE_SIGMASK; + set_bit(TIF_SIGPENDING, &ti->flags); +} +#endif /* !__ASSEMBLY__ */ + #endif /* __KERNEL__ */ #endif /* _ASM_THREAD_INFO_H */ -- cgit v1.1 From 392abe9cb36f04ccdda9c96938077b0d43f2b50b Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 13 May 2008 14:03:40 +0200 Subject: [ALSA] ASoC: build fix for snd_soc_info_bool_ext I suspect that snd_ctl_boolean_mono should have been snd_ctl_boolean_mono_info instead. This fixes the build for magician. Signed-off-by: Philipp Zabel Acked-by: Mark Brown Signed-off-by: Takashi Iwai --- include/sound/soc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/sound/soc.h b/include/sound/soc.h index e6ea6f7..d3c8c03 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -238,7 +238,7 @@ int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo); int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo); -#define snd_soc_info_bool_ext snd_ctl_boolean_mono +#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, -- cgit v1.1 From 309e96cdf2f2c1a071102e8bdf828a3493e6e50a Mon Sep 17 00:00:00 2001 From: Jeff Dike Date: Mon, 12 May 2008 14:01:52 -0700 Subject: uml: remove unused header From: Adrian Bunk This patch removes the unused and broken (the normal asm/keyboard.h files no longer exists) include/asm-um/keyboard.h Signed-off-by: Adrian Bunk Signed-off-by: Jeff Dike Cc: WANG Cong Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-um/keyboard.h | 6 ------ 1 file changed, 6 deletions(-) delete mode 100644 include/asm-um/keyboard.h (limited to 'include') diff --git a/include/asm-um/keyboard.h b/include/asm-um/keyboard.h deleted file mode 100644 index ee2e230..0000000 --- a/include/asm-um/keyboard.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef __UM_KEYBOARD_H -#define __UM_KEYBOARD_H - -#include "asm/arch/keyboard.h" - -#endif -- cgit v1.1 From a7dfa9403bf3b03899d5ef5d10b0c5c3f74b0682 Mon Sep 17 00:00:00 2001 From: Cyrill Gorcunov Date: Mon, 12 May 2008 14:01:56 -0700 Subject: uml: use PAGE_SIZE in linker scripts This patch includes page.h header into linker scripts that allow us to use PAGE_SIZE macro instead of numeric constant. To be able to include page.h into linker scripts page.h is needed for some modification - i.e. we need to use __ASSEMBLY__ and _AC macro [jdike@linux.intel.com - fixed conflict with as-layout.h] Signed-off-by: Cyrill Gorcunov Signed-off-by: Jeff Dike Cc: WANG Cong Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-um/page.h | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-um/page.h b/include/asm-um/page.h index 381f96b..916e1a6 100644 --- a/include/asm-um/page.h +++ b/include/asm-um/page.h @@ -7,16 +7,20 @@ #ifndef __UM_PAGE_H #define __UM_PAGE_H -struct page; - -#include -#include +#include /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 -#define PAGE_SIZE (1UL << PAGE_SHIFT) +#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) +#ifndef __ASSEMBLY__ + +struct page; + +#include +#include + /* * These are used to make use of C type-checking.. */ @@ -120,4 +124,5 @@ extern struct page *arch_validate(struct page *page, gfp_t mask, int order); #include #include -#endif +#endif /* __ASSEMBLY__ */ +#endif /* __UM_PAGE_H */ -- cgit v1.1 From 5d33e4d7fd9a52d2673e5c730eab81856e100a74 Mon Sep 17 00:00:00 2001 From: Jeff Dike Date: Mon, 12 May 2008 14:01:58 -0700 Subject: uml: random driver fixes The random driver would essentially hang if the host's /dev/random returned -EAGAIN. There was a test of need_resched followed by a schedule inside the loop, but that didn't help and it's the wrong way to work anyway. The right way is to ask for an interrupt when there is input available from the host and handle it then rather than polling. Now, when the host's /dev/random returns -EAGAIN, the driver asks for a wakeup when there's randomness available again and sleeps. The interrupt routine just wakes up whatever processes are sleeping on host_read_wait. There is an atomic_t, host_sleep_count, which counts the number of processes waiting for randomness. When this reaches zero, the interrupt is disabled. An added complication is that async I/O notification was only recently added to /dev/random (by me), so essentially all hosts will lack it. So, we use the sigio workaround here, which is to have a separate thread poll on the descriptor and send an interrupt when there is input on it. This mechanism is activated when a process gets -EAGAIN (activating this multiple times is harmless, if a bit wasteful) and deactivated by the last process still waiting. The module name was changed from "random" to "hw_random" in order for udev to recognize it. The sigio workaround needed some changes. sigio_broken was added for cases when we know that async notification doesn't work. This is now called from maybe_sigio_broken, which deals with pts devices. Signed-off-by: Jeff Dike Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-um/irq.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-um/irq.h b/include/asm-um/irq.h index de389a4..4a2037f 100644 --- a/include/asm-um/irq.h +++ b/include/asm-um/irq.h @@ -15,8 +15,9 @@ #define SIGIO_WRITE_IRQ 11 #define TELNETD_IRQ 12 #define XTERM_IRQ 13 +#define RANDOM_IRQ 14 -#define LAST_IRQ XTERM_IRQ +#define LAST_IRQ RANDOM_IRQ #define NR_IRQS (LAST_IRQ + 1) #endif -- cgit v1.1 From f4ed0deae8983591264d0e194e168ef65f4775f5 Mon Sep 17 00:00:00 2001 From: Paul Jackson Date: Mon, 12 May 2008 14:02:29 -0700 Subject: cpumask: remove bitmap_scnprintf_len and cpumask_scnprintf_len They aren't used. They were briefly used as part of some other patches to provide an alternative format for displaying some /proc and /sys cpumasks. They probably should have been removed when those other patches were dropped, in favor of a different solution. Signed-off-by: Paul Jackson Cc: "Mike Travis" Cc: "Bert Wesarg" Cc: Alexey Dobriyan Cc: WANG Cong Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/bitmap.h | 1 - include/linux/cpumask.h | 7 ------- 2 files changed, 8 deletions(-) (limited to 'include') diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h index 43b406d..1abfe66 100644 --- a/include/linux/bitmap.h +++ b/include/linux/bitmap.h @@ -110,7 +110,6 @@ extern int __bitmap_weight(const unsigned long *bitmap, int bits); extern int bitmap_scnprintf(char *buf, unsigned int len, const unsigned long *src, int nbits); -extern int bitmap_scnprintf_len(unsigned int len); extern int __bitmap_parse(const char *buf, unsigned int buflen, int is_user, unsigned long *dst, int nbits); extern int bitmap_parse_user(const char __user *ubuf, unsigned int ulen, diff --git a/include/linux/cpumask.h b/include/linux/cpumask.h index 9650806..5df3db5 100644 --- a/include/linux/cpumask.h +++ b/include/linux/cpumask.h @@ -289,13 +289,6 @@ static inline int __cpumask_scnprintf(char *buf, int len, return bitmap_scnprintf(buf, len, srcp->bits, nbits); } -#define cpumask_scnprintf_len(len) \ - __cpumask_scnprintf_len((len)) -static inline int __cpumask_scnprintf_len(int len) -{ - return bitmap_scnprintf_len(len); -} - #define cpumask_parse_user(ubuf, ulen, dst) \ __cpumask_parse_user((ubuf), (ulen), &(dst), NR_CPUS) static inline int __cpumask_parse_user(const char __user *buf, int len, -- cgit v1.1 From 4cd1a8fc3d3cd740416b14ece2693dbb5d065eaf Mon Sep 17 00:00:00 2001 From: KOSAKI Motohiro Date: Mon, 12 May 2008 14:02:31 -0700 Subject: memcg: fix possible panic when CONFIG_MM_OWNER=y When mm destruction happens, we should pass mm_update_next_owner() the old mm. But unfortunately new mm is passed in exec_mmap(). Thus, kernel panic is possible when a multi-threaded process uses exec(). Also, the owner member comment description is wrong. mm->owner does not necessarily point to the thread group leader. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: KOSAKI Motohiro Acked-by: Balbir Singh Cc: "Paul Menage" Cc: "KAMEZAWA Hiroyuki" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/mm_types.h | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/mm_types.h b/include/linux/mm_types.h index eb7c16c..02a27ae 100644 --- a/include/linux/mm_types.h +++ b/include/linux/mm_types.h @@ -226,8 +226,17 @@ struct mm_struct { rwlock_t ioctx_list_lock; /* aio lock */ struct kioctx *ioctx_list; #ifdef CONFIG_MM_OWNER - struct task_struct *owner; /* The thread group leader that */ - /* owns the mm_struct. */ + /* + * "owner" points to a task that is regarded as the canonical + * user/owner of this mm. All of the following must be true in + * order for it to be changed: + * + * current == mm->owner + * current->mm != mm + * new_owner->mm == mm + * new_owner->alloc_lock is held + */ + struct task_struct *owner; #endif #ifdef CONFIG_PROC_FS -- cgit v1.1 From 78bb6cb9a890d3d50ca3b02fce9223d3e734ab9b Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Mon, 12 May 2008 14:02:32 -0700 Subject: fuse: add flag to turn on big writes Prior to 2.6.26 fuse only supported single page write requests. In theory all fuse filesystem should be able support bigger than 4k writes, as there's nothing in the API to prevent it. Unfortunately there's a known case in NTFS-3G where big writes cause filesystem corruption. There could also be other filesystems, where the lack of testing with big write requests would result in bugs. To prevent such problems on a kernel upgrade, disable big writes by default, but let filesystems set a flag to turn it on. Signed-off-by: Miklos Szeredi Cc: Szabolcs Szakacsits Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/fuse.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/fuse.h b/include/linux/fuse.h index 5c86f11..d482821 100644 --- a/include/linux/fuse.h +++ b/include/linux/fuse.h @@ -109,6 +109,7 @@ struct fuse_file_lock { #define FUSE_POSIX_LOCKS (1 << 1) #define FUSE_FILE_OPS (1 << 2) #define FUSE_ATOMIC_O_TRUNC (1 << 3) +#define FUSE_BIG_WRITES (1 << 5) /** * Release flags -- cgit v1.1 From 332223831e86b2e17b48b4afafad07d8e3b73861 Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Tue, 13 May 2008 23:25:57 -0700 Subject: irda: Fix a misalign access issue. (v2) Replace u16ho with put/get_unaligned functions Signed-off-by: Graf Yang Signed-off-by: Bryan Wu Signed-off-by: David S. Miller --- include/net/irda/discovery.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/net/irda/discovery.h b/include/net/irda/discovery.h index e4efad1..0ce9339 100644 --- a/include/net/irda/discovery.h +++ b/include/net/irda/discovery.h @@ -57,9 +57,6 @@ typedef union { __u8 byte[2]; } __u16_host_order; -/* Same purpose, different application */ -#define u16ho(array) (* ((__u16 *) array)) - /* Types of discovery */ typedef enum { DISCOVERY_LOG, /* What's in our discovery log */ -- cgit v1.1 From d23039eec77473124c9635c01378314f196f2211 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 25 Apr 2008 19:23:16 -0700 Subject: USB: add association.h This will be used by the wireless usb code, as well as potentially other USB code. Originally based on some .c code written by Inaky Perez-Gonzalez Cc: Inaky Perez-Gonzalez Cc: David Brownell Signed-off-by: Greg Kroah-Hartman --- include/linux/usb/association.h | 150 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 include/linux/usb/association.h (limited to 'include') diff --git a/include/linux/usb/association.h b/include/linux/usb/association.h new file mode 100644 index 0000000..07c5e3c --- /dev/null +++ b/include/linux/usb/association.h @@ -0,0 +1,150 @@ +/* + * Wireless USB - Cable Based Association + * + * Copyright (C) 2006 Intel Corporation + * Inaky Perez-Gonzalez + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + */ +#ifndef __LINUX_USB_ASSOCIATION_H +#define __LINUX_USB_ASSOCIATION_H + + +/* + * Association attributes + * + * Association Models Supplement to WUSB 1.0 T[3-1] + * + * Each field in the structures has it's ID, it's length and then the + * value. This is the actual definition of the field's ID and its + * length. + */ +struct wusb_am_attr { + __u8 id; + __u8 len; +}; + +/* Different fields defined by the spec */ +#define WUSB_AR_AssociationTypeId { .id = 0x0000, .len = 2 } +#define WUSB_AR_AssociationSubTypeId { .id = 0x0001, .len = 2 } +#define WUSB_AR_Length { .id = 0x0002, .len = 4 } +#define WUSB_AR_AssociationStatus { .id = 0x0004, .len = 4 } +#define WUSB_AR_LangID { .id = 0x0008, .len = 2 } +#define WUSB_AR_DeviceFriendlyName { .id = 0x000b, .len = 64 } /* max */ +#define WUSB_AR_HostFriendlyName { .id = 0x000c, .len = 64 } /* max */ +#define WUSB_AR_CHID { .id = 0x1000, .len = 16 } +#define WUSB_AR_CDID { .id = 0x1001, .len = 16 } +#define WUSB_AR_ConnectionContext { .id = 0x1002, .len = 48 } +#define WUSB_AR_BandGroups { .id = 0x1004, .len = 2 } + +/* CBAF Control Requests (AMS1.0[T4-1] */ +enum { + CBAF_REQ_GET_ASSOCIATION_INFORMATION = 0x01, + CBAF_REQ_GET_ASSOCIATION_REQUEST, + CBAF_REQ_SET_ASSOCIATION_RESPONSE +}; + +/* + * CBAF USB-interface defitions + * + * No altsettings, one optional interrupt endpoint. + */ +enum { + CBAF_IFACECLASS = 0xef, + CBAF_IFACESUBCLASS = 0x03, + CBAF_IFACEPROTOCOL = 0x01, +}; + +/* Association Information (AMS1.0[T4-3]) */ +struct wusb_cbaf_assoc_info { + __le16 Length; + __u8 NumAssociationRequests; + __le16 Flags; + __u8 AssociationRequestsArray[]; +} __attribute__((packed)); + +/* Association Request (AMS1.0[T4-4]) */ +struct wusb_cbaf_assoc_request { + __u8 AssociationDataIndex; + __u8 Reserved; + __le16 AssociationTypeId; + __le16 AssociationSubTypeId; + __le32 AssociationTypeInfoSize; +} __attribute__((packed)); + +enum { + AR_TYPE_WUSB = 0x0001, + AR_TYPE_WUSB_RETRIEVE_HOST_INFO = 0x0000, + AR_TYPE_WUSB_ASSOCIATE = 0x0001, +}; + +/* Association Attribute header (AMS1.0[3.8]) */ +struct wusb_cbaf_attr_hdr { + __le16 id; + __le16 len; +} __attribute__((packed)); + +/* Host Info (AMS1.0[T4-7]) (yeah, more headers and fields...) */ +struct wusb_cbaf_host_info { + struct wusb_cbaf_attr_hdr AssociationTypeId_hdr; + __le16 AssociationTypeId; + struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr; + __le16 AssociationSubTypeId; + struct wusb_cbaf_attr_hdr CHID_hdr; + struct wusb_ckhdid CHID; + struct wusb_cbaf_attr_hdr LangID_hdr; + __le16 LangID; + struct wusb_cbaf_attr_hdr HostFriendlyName_hdr; + __u8 HostFriendlyName[]; +} __attribute__((packed)); + +/* Device Info (AMS1.0[T4-8]) + * + * I still don't get this tag'n'header stuff for each goddamn + * field... + */ +struct wusb_cbaf_device_info { + struct wusb_cbaf_attr_hdr Length_hdr; + __le32 Length; + struct wusb_cbaf_attr_hdr CDID_hdr; + struct wusb_ckhdid CDID; + struct wusb_cbaf_attr_hdr BandGroups_hdr; + __le16 BandGroups; + struct wusb_cbaf_attr_hdr LangID_hdr; + __le16 LangID; + struct wusb_cbaf_attr_hdr DeviceFriendlyName_hdr; + __u8 DeviceFriendlyName[]; +} __attribute__((packed)); + +/* Connection Context; CC_DATA - Success case (AMS1.0[T4-9]) */ +struct wusb_cbaf_cc_data { + struct wusb_cbaf_attr_hdr AssociationTypeId_hdr; + __le16 AssociationTypeId; + struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr; + __le16 AssociationSubTypeId; + struct wusb_cbaf_attr_hdr Length_hdr; + __le32 Length; + struct wusb_cbaf_attr_hdr ConnectionContext_hdr; + struct wusb_ckhdid CHID; + struct wusb_ckhdid CDID; + struct wusb_ckhdid CK; + struct wusb_cbaf_attr_hdr BandGroups_hdr; + __le16 BandGroups; +} __attribute__((packed)); + +/* CC_DATA - Failure case (AMS1.0[T4-10]) */ +struct wusb_cbaf_cc_data_fail { + struct wusb_cbaf_attr_hdr AssociationTypeId_hdr; + __le16 AssociationTypeId; + struct wusb_cbaf_attr_hdr AssociationSubTypeId_hdr; + __le16 AssociationSubTypeId; + struct wusb_cbaf_attr_hdr Length_hdr; + __le16 Length; + struct wusb_cbaf_attr_hdr AssociationStatus_hdr; + __u32 AssociationStatus; +} __attribute__((packed)); + +#endif /* __LINUX_USB_ASSOCIATION_H */ -- cgit v1.1 From 73f10281ea96d7e8b4fc1c5d755a7c8eb484155b Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Wed, 14 May 2008 06:35:11 +0200 Subject: read_barrier_depends arch fixlets read_barrie_depends has always been a noop (not a compiler barrier) on all architectures except SMP alpha. This brings UP alpha and frv into line with all other architectures, and fixes incorrect documentation. Signed-off-by: Nick Piggin Acked-by: Paul E. McKenney Signed-off-by: Linus Torvalds --- include/asm-alpha/barrier.h | 2 +- include/asm-frv/system.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/barrier.h b/include/asm-alpha/barrier.h index 384dc08d..ac78eba 100644 --- a/include/asm-alpha/barrier.h +++ b/include/asm-alpha/barrier.h @@ -24,7 +24,7 @@ __asm__ __volatile__("mb": : :"memory") #define smp_mb() barrier() #define smp_rmb() barrier() #define smp_wmb() barrier() -#define smp_read_barrier_depends() barrier() +#define smp_read_barrier_depends() do { } while (0) #endif #define set_mb(var, value) \ diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h index cb307f8..d3a12a9 100644 --- a/include/asm-frv/system.h +++ b/include/asm-frv/system.h @@ -179,7 +179,7 @@ do { \ #define mb() asm volatile ("membar" : : :"memory") #define rmb() asm volatile ("membar" : : :"memory") #define wmb() asm volatile ("membar" : : :"memory") -#define read_barrier_depends() barrier() +#define read_barrier_depends() do { } while (0) #ifdef CONFIG_SMP #define smp_mb() mb() -- cgit v1.1 From 362a61ad61199e19a61b8e432015e2586b288f5b Mon Sep 17 00:00:00 2001 From: Nick Piggin Date: Wed, 14 May 2008 06:37:36 +0200 Subject: fix SMP data race in pagetable setup vs walking There is a possible data race in the page table walking code. After the split ptlock patches, it actually seems to have been introduced to the core code, but even before that I think it would have impacted some architectures (powerpc and sparc64, at least, walk the page tables without taking locks eg. see find_linux_pte()). The race is as follows: The pte page is allocated, zeroed, and its struct page gets its spinlock initialized. The mm-wide ptl is then taken, and then the pte page is inserted into the pagetables. At this point, the spinlock is not guaranteed to have ordered the previous stores to initialize the pte page with the subsequent store to put it in the page tables. So another Linux page table walker might be walking down (without any locks, because we have split-leaf-ptls), and find that new pte we've inserted. It might try to take the spinlock before the store from the other CPU initializes it. And subsequently it might read a pte_t out before stores from the other CPU have cleared the memory. There are also similar races in higher levels of the page tables. They obviously don't involve the spinlock, but could see uninitialized memory. Arch code and hardware pagetable walkers that walk the pagetables without locks could see similar uninitialized memory problems, regardless of whether split ptes are enabled or not. I prefer to put the barriers in core code, because that's where the higher level logic happens, but the page table accessors are per-arch, and open-coding them everywhere I don't think is an option. I'll put the read-side barriers in alpha arch code for now (other architectures perform data-dependent loads in order). Signed-off-by: Nick Piggin Signed-off-by: Linus Torvalds --- include/asm-alpha/pgtable.h | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/pgtable.h b/include/asm-alpha/pgtable.h index 05ce5fb..3f0c59f6 100644 --- a/include/asm-alpha/pgtable.h +++ b/include/asm-alpha/pgtable.h @@ -287,17 +287,34 @@ extern inline pte_t pte_mkspecial(pte_t pte) { return pte; } #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) +/* + * The smp_read_barrier_depends() in the following functions are required to + * order the load of *dir (the pointer in the top level page table) with any + * subsequent load of the returned pmd_t *ret (ret is data dependent on *dir). + * + * If this ordering is not enforced, the CPU might load an older value of + * *ret, which may be uninitialized data. See mm/memory.c:__pte_alloc for + * more details. + * + * Note that we never change the mm->pgd pointer after the task is running, so + * pgd_offset does not require such a barrier. + */ + /* Find an entry in the second-level page table.. */ extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address) { - return (pmd_t *) pgd_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1)); + pmd_t *ret = (pmd_t *) pgd_page_vaddr(*dir) + ((address >> PMD_SHIFT) & (PTRS_PER_PAGE - 1)); + smp_read_barrier_depends(); /* see above */ + return ret; } /* Find an entry in the third-level page table.. */ extern inline pte_t * pte_offset_kernel(pmd_t * dir, unsigned long address) { - return (pte_t *) pmd_page_vaddr(*dir) + pte_t *ret = (pte_t *) pmd_page_vaddr(*dir) + ((address >> PAGE_SHIFT) & (PTRS_PER_PAGE - 1)); + smp_read_barrier_depends(); /* see above */ + return ret; } #define pte_offset_map(dir,addr) pte_offset_kernel((dir),(addr)) -- cgit v1.1 From 30f2f0eb4bd2c43d10a8b0d872c6e5ad8f31c9a0 Mon Sep 17 00:00:00 2001 From: Kay Sievers Date: Tue, 6 May 2008 22:31:33 +0200 Subject: block: do_mounts - accept root= Some devices, like md, may create partitions only at first access, so allow root= to be set to a valid non-existant partition of an existing disk. This applies only to non-initramfs root mounting. This fixes a regression from 2.6.24 which did allow this to happen and broke some users machines :( Acked-by: Neil Brown Tested-by: Joao Luis Meloni Assirati Cc: stable Signed-off-by: Kay Sievers Signed-off-by: Greg Kroah-Hartman --- include/linux/genhd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/genhd.h b/include/linux/genhd.h index e9874e7..ae7aec3 100644 --- a/include/linux/genhd.h +++ b/include/linux/genhd.h @@ -525,7 +525,7 @@ struct unixware_disklabel { #define ADDPART_FLAG_RAID 1 #define ADDPART_FLAG_WHOLEDISK 2 -extern dev_t blk_lookup_devt(const char *name); +extern dev_t blk_lookup_devt(const char *name, int part); extern char *disk_name (struct gendisk *hd, int part, char *buf); extern int rescan_partitions(struct gendisk *disk, struct block_device *bdev); @@ -553,7 +553,7 @@ static inline struct block_device *bdget_disk(struct gendisk *disk, int index) static inline void printk_all_partitions(void) { } -static inline dev_t blk_lookup_devt(const char *name) +static inline dev_t blk_lookup_devt(const char *name, int part) { dev_t devt = MKDEV(0, 0); return devt; -- cgit v1.1 From 0a3ad00ca09632c6d0675f606276e92bdf1b306c Mon Sep 17 00:00:00 2001 From: Dave Young Date: Fri, 9 May 2008 15:24:08 +0800 Subject: Driver core: struct class remove children list because of the class_device was removed, now do the children list removing Signed-off-by: Dave Young Signed-off-by: Greg Kroah-Hartman --- include/linux/device.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/device.h b/include/linux/device.h index 8c23e3d..15e9fa3 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -183,7 +183,6 @@ struct class { struct module *owner; struct kset subsys; - struct list_head children; struct list_head devices; struct list_head interfaces; struct kset class_dirs; -- cgit v1.1 From e0b4eb5193fed5c63413b0c137be29b0477d15ca Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Wed, 14 May 2008 23:06:15 +0200 Subject: make ide-iops.c:SELECT_MASK() static SELECT_MASK() can now become static. [bart: remove space between function name and open parenthesis] Signed-off-by: Adrian Bunk Signed-off-by: Bartlomiej Zolnierkiewicz --- include/linux/ide.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/ide.h b/include/linux/ide.h index b0135b0..19ec852 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -965,7 +965,6 @@ typedef struct ide_task_s { void ide_tf_dump(const char *, struct ide_taskfile *); extern void SELECT_DRIVE(ide_drive_t *); -extern void SELECT_MASK(ide_drive_t *, int); extern int drive_is_ready(ide_drive_t *); -- cgit v1.1 From cafa027b8cc6f605ccebc43a960644307a12d8dd Mon Sep 17 00:00:00 2001 From: Bartlomiej Zolnierkiewicz Date: Wed, 14 May 2008 23:06:16 +0200 Subject: cs5520: disable VDMA Disable Virtual DMA support for now (it causes system hangs). Thanks to TAKADA Yoshihito for the help with debugging the problem. Reported-by: TAKADA Yoshihito Signed-off-by: Bartlomiej Zolnierkiewicz --- include/linux/ide.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/ide.h b/include/linux/ide.h index 19ec852..f8f195c 100644 --- a/include/linux/ide.h +++ b/include/linux/ide.h @@ -1057,8 +1057,8 @@ enum { IDE_HFLAG_NO_SET_MODE = (1 << 9), /* trust BIOS for programming chipset/device for DMA */ IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10), - /* host uses VDMA (tied with IDE_HFLAG_CS5520 for now) */ - IDE_HFLAG_VDMA = (1 << 11), + /* host is CS5510/CS5520 */ + IDE_HFLAG_CS5520 = (1 << 11), /* ATAPI DMA is unsupported */ IDE_HFLAG_NO_ATAPI_DMA = (1 << 12), /* set if host is a "non-bootable" controller */ @@ -1069,8 +1069,6 @@ enum { IDE_HFLAG_NO_AUTODMA = (1 << 15), /* host uses MMIO */ IDE_HFLAG_MMIO = (1 << 16), - /* host is CS5510/CS5520 */ - IDE_HFLAG_CS5520 = IDE_HFLAG_VDMA, /* no LBA48 */ IDE_HFLAG_NO_LBA48 = (1 << 17), /* no LBA48 DMA */ @@ -1100,6 +1098,8 @@ enum { IDE_HFLAG_NO_IO_32BIT = (1 << 30), /* never unmask IRQs */ IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31), + /* host uses VDMA (disabled for now) */ + IDE_HFLAG_VDMA = 0, }; #ifdef CONFIG_BLK_DEV_OFFBOARD -- cgit v1.1 From b32a09db4fb9a87246ba4e7726a979ac4709ad97 Mon Sep 17 00:00:00 2001 From: Markus Armbruster Date: Tue, 26 Feb 2008 09:57:11 -0600 Subject: add match_strlcpy() us it to make v9fs make uname and remotename parsing more robust match_strcpy() is a somewhat creepy function: the caller needs to make sure that the destination buffer is big enough, and when he screws up or forgets, match_strcpy() happily overruns the buffer. There's exactly one customer: v9fs_parse_options(). I believe it currently can't overflow its buffer, but that's not exactly obvious. The source string is a substing of the mount options. The kernel silently truncates those to PAGE_SIZE bytes, including the terminating zero. See compat_sys_mount() and do_mount(). The destination buffer is obtained from __getname(), which allocates from name_cachep, which is initialized by vfs_caches_init() for size PATH_MAX. We're safe as long as PATH_MAX <= PAGE_SIZE. PATH_MAX is 4096. As far as I know, the smallest PAGE_SIZE is also 4096. Here's a patch that makes the code a bit more obviously correct. It doesn't depend on PATH_MAX <= PAGE_SIZE. Signed-off-by: Markus Armbruster Cc: Latchesar Ionkov Cc: Jim Meyering Cc: "Randy.Dunlap" Signed-off-by: Andrew Morton Signed-off-by: Eric Van Hensbergen --- include/linux/parser.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/parser.h b/include/linux/parser.h index 26b2bdf..7dcd050 100644 --- a/include/linux/parser.h +++ b/include/linux/parser.h @@ -29,5 +29,5 @@ int match_token(char *, match_table_t table, substring_t args[]); int match_int(substring_t *, int *result); int match_octal(substring_t *, int *result); int match_hex(substring_t *, int *result); -void match_strcpy(char *, const substring_t *); +size_t match_strlcpy(char *, const substring_t *, size_t); char *match_strdup(const substring_t *); -- cgit v1.1 From ee443996a35c1e04f210cafd43d5a98d41e46085 Mon Sep 17 00:00:00 2001 From: Eric Van Hensbergen Date: Wed, 5 Mar 2008 07:08:09 -0600 Subject: 9p: Documentation updates The kernel-doc comments of much of the 9p system have been in disarray since reorganization. This patch fixes those problems, adds additional documentation and a template book which collects the 9p information. Signed-off-by: Eric Van Hensbergen --- include/net/9p/9p.h | 239 +++++++++++++++++++++++++++++++++++++++------ include/net/9p/client.h | 35 +++++++ include/net/9p/transport.h | 43 ++++++++ 3 files changed, 287 insertions(+), 30 deletions(-) (limited to 'include') diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h index 585eb44..7bfb2f2 100644 --- a/include/net/9p/9p.h +++ b/include/net/9p/9p.h @@ -29,14 +29,31 @@ #ifdef CONFIG_NET_9P_DEBUG -#define P9_DEBUG_ERROR (1<<0) -#define P9_DEBUG_9P (1<<2) -#define P9_DEBUG_VFS (1<<3) -#define P9_DEBUG_CONV (1<<4) -#define P9_DEBUG_MUX (1<<5) -#define P9_DEBUG_TRANS (1<<6) -#define P9_DEBUG_SLABS (1<<7) -#define P9_DEBUG_FCALL (1<<8) +/** + * enum p9_debug_flags - bits for mount time debug parameter + * @P9_DEBUG_ERROR: more verbose error messages including original error string + * @P9_DEBUG_9P: 9P protocol tracing + * @P9_DEBUG_VFS: VFS API tracing + * @P9_DEBUG_CONV: protocol conversion tracing + * @P9_DEBUG_MUX: trace management of concurrent transactions + * @P9_DEBUG_TRANS: transport tracing + * @P9_DEBUG_SLABS: memory management tracing + * @P9_DEBUG_FCALL: verbose dump of protocol messages + * + * These flags are passed at mount time to turn on various levels of + * verbosity and tracing which will be output to the system logs. + */ + +enum p9_debug_flags { + P9_DEBUG_ERROR = (1<<0), + P9_DEBUG_9P = (1<<2), + P9_DEBUG_VFS = (1<<3), + P9_DEBUG_CONV = (1<<4), + P9_DEBUG_MUX = (1<<5), + P9_DEBUG_TRANS = (1<<6), + P9_DEBUG_SLABS = (1<<7), + P9_DEBUG_FCALL = (1<<8), +}; extern unsigned int p9_debug_level; @@ -62,9 +79,47 @@ do { \ format , __FUNCTION__, task_pid_nr(current), ## arg); \ } while (0) +/** + * enum p9_msg_t - 9P message types + * @P9_TVERSION: version handshake request + * @P9_RVERSION: version handshake response + * @P9_TAUTH: request to establish authentication channel + * @P9_RAUTH: response with authentication information + * @P9_TATTACH: establish user access to file service + * @P9_RATTACH: response with top level handle to file hierarchy + * @P9_TERROR: not used + * @P9_RERROR: response for any failed request + * @P9_TFLUSH: request to abort a previous request + * @P9_RFLUSH: response when previous request has been cancelled + * @P9_TWALK: descend a directory hierarchy + * @P9_RWALK: response with new handle for position within hierarchy + * @P9_TOPEN: prepare a handle for I/O on an existing file + * @P9_ROPEN: response with file access information + * @P9_TCREATE: prepare a handle for I/O on a new file + * @P9_RCREATE: response with file access information + * @P9_TREAD: request to transfer data from a file or directory + * @P9_RREAD: response with data requested + * @P9_TWRITE: reuqest to transfer data to a file + * @P9_RWRITE: response with out much data was transfered to file + * @P9_TCLUNK: forget about a handle to an entity within the file system + * @P9_RCLUNK: response when server has forgotten about the handle + * @P9_TREMOVE: request to remove an entity from the hierarchy + * @P9_RREMOVE: response when server has removed the entity + * @P9_TSTAT: request file entity attributes + * @P9_RSTAT: response with file entity attributes + * @P9_TWSTAT: request to update file entity attributes + * @P9_RWSTAT: response when file entity attributes are updated + * + * There are 14 basic operations in 9P2000, paired as + * requests and responses. The one special case is ERROR + * as there is no @P9_TERROR request for clients to transmit to + * the server, but the server may respond to any other request + * with an @P9_RERROR. + * + * See Also: http://plan9.bell-labs.com/sys/man/5/INDEX.html + */ -/* Message Types */ -enum { +enum p9_msg_t { P9_TVERSION = 100, P9_RVERSION, P9_TAUTH = 102, @@ -95,30 +150,71 @@ enum { P9_RWSTAT, }; -/* open modes */ -enum { +/** + * enum p9_open_mode_t - 9P open modes + * @P9_OREAD: open file for reading only + * @P9_OWRITE: open file for writing only + * @P9_ORDWR: open file for reading or writing + * @P9_OEXEC: open file for execution + * @P9_OTRUNC: truncate file to zero-length before opening it + * @P9_OREXEC: close the file when an exec(2) system call is made + * @P9_ORCLOSE: remove the file when the file is closed + * @P9_OAPPEND: open the file and seek to the end + * @P9_OEXCL: only create a file, do not open it + * + * 9P open modes differ slightly from Posix standard modes. + * In particular, there are extra modes which specify different + * semantic behaviors than may be available on standard Posix + * systems. For example, @P9_OREXEC and @P9_ORCLOSE are modes that + * most likely will not be issued from the Linux VFS client, but may + * be supported by servers. + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/open + */ + +enum p9_open_mode_t { P9_OREAD = 0x00, P9_OWRITE = 0x01, P9_ORDWR = 0x02, P9_OEXEC = 0x03, - P9_OEXCL = 0x04, P9_OTRUNC = 0x10, P9_OREXEC = 0x20, P9_ORCLOSE = 0x40, P9_OAPPEND = 0x80, -}; - -/* permissions */ -enum { + P9_OEXCL = 0x1000, +}; + +/** + * enum p9_perm_t - 9P permissions + * @P9_DMDIR: mode bite for directories + * @P9_DMAPPEND: mode bit for is append-only + * @P9_DMEXCL: mode bit for excluse use (only one open handle allowed) + * @P9_DMMOUNT: mode bite for mount points + * @P9_DMAUTH: mode bit for authentication file + * @P9_DMTMP: mode bit for non-backed-up files + * @P9_DMSYMLINK: mode bit for symbolic links (9P2000.u) + * @P9_DMLINK: mode bit for hard-link (9P2000.u) + * @P9_DMDEVICE: mode bit for device files (9P2000.u) + * @P9_DMNAMEDPIPE: mode bit for named pipe (9P2000.u) + * @P9_DMSOCKET: mode bit for socket (9P2000.u) + * @P9_DMSETUID: mode bit for setuid (9P2000.u) + * @P9_DMSETGID: mode bit for setgid (9P2000.u) + * @P9_DMSETVTX: mode bit for sticky bit (9P2000.u) + * + * 9P permissions differ slightly from Posix standard modes. + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat + */ +enum p9_perm_t { P9_DMDIR = 0x80000000, P9_DMAPPEND = 0x40000000, P9_DMEXCL = 0x20000000, P9_DMMOUNT = 0x10000000, P9_DMAUTH = 0x08000000, P9_DMTMP = 0x04000000, +/* 9P2000.u extensions */ P9_DMSYMLINK = 0x02000000, P9_DMLINK = 0x01000000, - /* 9P2000.u extensions */ P9_DMDEVICE = 0x00800000, P9_DMNAMEDPIPE = 0x00200000, P9_DMSOCKET = 0x00100000, @@ -127,8 +223,26 @@ enum { P9_DMSETVTX = 0x00010000, }; -/* qid.types */ -enum { +/** + * enum p9_qid_t - QID types + * @P9_QTDIR: directory + * @P9_QTAPPEND: append-only + * @P9_QTEXCL: excluse use (only one open handle allowed) + * @P9_QTMOUNT: mount points + * @P9_QTAUTH: authentication file + * @P9_QTTMP: non-backed-up files + * @P9_QTSYMLINK: symbolic links (9P2000.u) + * @P9_QTLINK: hard-link (9P2000.u) + * @P9_QTFILE: normal files + * + * QID types are a subset of permissions - they are primarily + * used to differentiate semantics for a file system entity via + * a jump-table. Their value is also the most signifigant 16 bits + * of the permission_t + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat + */ +enum p9_qid_t { P9_QTDIR = 0x80, P9_QTAPPEND = 0x40, P9_QTEXCL = 0x20, @@ -140,6 +254,7 @@ enum { P9_QTFILE = 0x00, }; +/* 9P Magic Numbers */ #define P9_NOTAG (u16)(~0) #define P9_NOFID (u32)(~0) #define P9_MAXWELEM 16 @@ -147,19 +262,69 @@ enum { /* ample room for Twrite/Rread header */ #define P9_IOHDRSZ 24 +/** + * struct p9_str - length prefixed string type + * @len: length of the string + * @str: the string + * + * The protocol uses length prefixed strings for all + * string data, so we replicate that for our internal + * string members. + */ + struct p9_str { u16 len; char *str; }; -/* qids are the unique ID for a file (like an inode */ +/** + * struct p9_qid - file system entity information + * @type: 8-bit type &p9_qid_t + * @version: 16-bit monotonically incrementing version number + * @path: 64-bit per-server-unique ID for a file system element + * + * qids are identifiers used by 9P servers to track file system + * entities. The type is used to differentiate semantics for operations + * on the entity (ie. read means something different on a directory than + * on a file). The path provides a server unique index for an entity + * (roughly analogous to an inode number), while the version is updated + * every time a file is modified and can be used to maintain cache + * coherency between clients and serves. + * Servers will often differentiate purely synthetic entities by setting + * their version to 0, signaling that they should never be cached and + * should be accessed synchronously. + * + * See Also://plan9.bell-labs.com/magic/man2html/2/stat + */ + struct p9_qid { u8 type; u32 version; u64 path; }; -/* Plan 9 file metadata (stat) structure */ +/** + * struct p9_stat - file system metadata information + * @size: length prefix for this stat structure instance + * @type: the type of the server (equivilent to a major number) + * @dev: the sub-type of the server (equivilent to a minor number) + * @qid: unique id from the server of type &p9_qid + * @mode: Plan 9 format permissions of type &p9_perm_t + * @atime: Last access/read time + * @mtime: Last modify/write time + * @length: file length + * @name: last element of path (aka filename) in type &p9_str + * @uid: owner name in type &p9_str + * @gid: group owner in type &p9_str + * @muid: last modifier in type &p9_str + * @extension: area used to encode extended UNIX support in type &p9_str + * @n_uid: numeric user id of owner (part of 9p2000.u extension) + * @n_gid: numeric group id (part of 9p2000.u extension) + * @n_muid: numeric user id of laster modifier (part of 9p2000.u extension) + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat + */ + struct p9_stat { u16 size; u16 type; @@ -179,10 +344,14 @@ struct p9_stat { u32 n_muid; /* 9p2000.u extensions */ }; -/* file metadata (stat) structure used to create Twstat message - The is similar to p9_stat, but the strings don't point to - the same memory block and should be freed separately -*/ +/* + * file metadata (stat) structure used to create Twstat message + * The is identical to &p9_stat, but the strings don't point to + * the same memory block and should be freed separately + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/stat + */ + struct p9_wstat { u16 size; u16 type; @@ -335,10 +504,20 @@ struct p9_twstat { struct p9_rwstat { }; -/* - * fcall is the primary packet structure - * - */ +/** + * struct p9_fcall - primary packet structure + * @size: prefixed length of the structure + * @id: protocol operating identifier of type &p9_msg_t + * @tag: transaction id of the request + * @sdata: payload + * @params: per-operation parameters + * + * &p9_fcall represents the structure for all 9P RPC + * transactions. Requests are packaged into fcalls, and reponses + * must be extracted from them. + * + * See Also: http://plan9.bell-labs.com/magic/man2html/2/fcall + */ struct p9_fcall { u32 size; diff --git a/include/net/9p/client.h b/include/net/9p/client.h index e52f93d..c936dd1 100644 --- a/include/net/9p/client.h +++ b/include/net/9p/client.h @@ -26,6 +26,23 @@ #ifndef NET_9P_CLIENT_H #define NET_9P_CLIENT_H +/** + * struct p9_client - per client instance state + * @lock: protect @fidlist + * @msize: maximum data size negotiated by protocol + * @dotu: extension flags negotiated by protocol + * @trans_mod: module API instantiated with this client + * @trans: tranport instance state and API + * @conn: connection state information used by trans_fd + * @fidpool: fid handle accounting for session + * @fidlist: List of active fid handles + * + * The client structure is used to keep track of various per-client + * state that has been instantiated. + * + * Bugs: duplicated data and potentially unnecessary elements. + */ + struct p9_client { spinlock_t lock; /* protect client structure */ int msize; @@ -38,6 +55,24 @@ struct p9_client { struct list_head fidlist; }; +/** + * struct p9_fid - file system entity handle + * @clnt: back pointer to instantiating &p9_client + * @fid: numeric identifier for this handle + * @mode: current mode of this fid (enum?) + * @qid: the &p9_qid server identifier this handle points to + * @iounit: the server reported maximum transaction size for this file + * @uid: the numeric uid of the local user who owns this handle + * @aux: transport specific information (unused?) + * @rdir_fpos: tracks offset of file position when reading directory contents + * @rdir_pos: (unused?) + * @rdir_fcall: holds response of last directory read request + * @flist: per-client-instance fid tracking + * @dlist: per-dentry fid tracking + * + * TODO: This needs lots of explanation. + */ + struct p9_fid { struct p9_client *clnt; u32 fid; diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h index d2209ae..240e0de 100644 --- a/include/net/9p/transport.h +++ b/include/net/9p/transport.h @@ -26,12 +26,40 @@ #ifndef NET_9P_TRANSPORT_H #define NET_9P_TRANSPORT_H +/** + * enum p9_trans_status - different states of underlying transports + * @Connected: transport is connected and healthy + * @Disconnected: transport has been disconnected + * @Hung: transport is connected by wedged + * + * This enumeration details the various states a transport + * instatiation can be in. + */ + enum p9_trans_status { Connected, Disconnected, Hung, }; +/** + * struct p9_trans - per-transport state and API + * @status: transport &p9_trans_status + * @msize: negotiated maximum packet size (duplicate from client) + * @extended: negotiated protocol extensions (duplicate from client) + * @priv: transport private data + * @close: member function to disconnect and close the transport + * @rpc: member function to issue a request to the transport + * + * This is the basic API for a transport instance. It is used as + * a handle by the client to issue requests. This interface is currently + * in flux during reorganization. + * + * Bugs: there is lots of duplicated data here and its not clear that + * the member functions need to be per-instance versus per transport + * module. + */ + struct p9_trans { enum p9_trans_status status; int msize; @@ -42,6 +70,21 @@ struct p9_trans { struct p9_fcall **rc); }; +/** + * struct p9_trans_module - transport module interface + * @list: used to maintain a list of currently available transports + * @name: the human-readable name of the transport + * @maxsize: transport provided maximum packet size + * @def: set if this transport should be considered the default + * @create: member function to create a new connection on this transport + * + * This is the basic API for a transport module which is registered by the + * transport module with the 9P core network module and used by the client + * to instantiate a new connection on a transport. + * + * Bugs: the transport module list isn't protected. + */ + struct p9_trans_module { struct list_head list; char *name; /* name of transport */ -- cgit v1.1 From 887b3ece65be7b643dfdae0d433c91a26a3f437d Mon Sep 17 00:00:00 2001 From: Eric Van Hensbergen Date: Thu, 8 May 2008 20:26:37 -0500 Subject: 9p: fix error path during early mount There was some cleanup issues during early mount which would trigger a kernel bug for certain types of failure. This patch reorganizes the cleanup to get rid of the bad behavior. This also merges the 9pnet and 9pnet_fd modules for the purpose of configuration and initialization. Keeping the fd transport separate from the core 9pnet code seemed like a good idea at the time, but in practice has caused more harm and confusion than good. Signed-off-by: Eric Van Hensbergen --- include/net/9p/9p.h | 1 + include/net/9p/transport.h | 1 - 2 files changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/9p/9p.h b/include/net/9p/9p.h index 7bfb2f2..b3d3e27 100644 --- a/include/net/9p/9p.h +++ b/include/net/9p/9p.h @@ -595,4 +595,5 @@ int p9_idpool_check(int id, struct p9_idpool *p); int p9_error_init(void); int p9_errstr2errno(char *, int); +int p9_trans_fd_init(void); #endif /* NET_9P_H */ diff --git a/include/net/9p/transport.h b/include/net/9p/transport.h index 240e0de..0db3a40 100644 --- a/include/net/9p/transport.h +++ b/include/net/9p/transport.h @@ -96,5 +96,4 @@ struct p9_trans_module { void v9fs_register_trans(struct p9_trans_module *m); struct p9_trans_module *v9fs_match_trans(const substring_t *name); struct p9_trans_module *v9fs_default_trans(void); - #endif /* NET_9P_TRANSPORT_H */ -- cgit v1.1 From b7cffc1f29c1bc729bc50c863c87f93f9b70994b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 14 May 2008 16:05:42 -0700 Subject: asm-{alpha,h8300,um,v850,xtensa}/param.h: unbreak HZ for userspace I noticed this because alpha was broken due to the recent commit commit bdc807871d58285737d50dc6163d0feb72cb0dc2 ("avoid overflows in kernel/time.c"). Most arches do something like this in their asm/param.h: #ifdef __KERNEL__ # define HZ CONFIG_HZ #else # define HZ 100 #endif A few arches though (namely alpha/h8300/um/v850/xtensa) either do no set HZ at all for !__KERNEL__, or they set it wrongly. This should bring all arches in line by setting up HZ for userspace. Without this currently perl 5.10 doesn't build on alpha: perl.c: In function 'perl_construct': perl.c:388: error: 'CONFIG_HZ' undeclared (first use in this function) -> http://buildd.debian.org/fetch.cgi?pkg=perl;ver=5.10.0-10;arch=alpha;stamp=1210252894 Signed-off-by: Mike Frysinger Cc: Richard Henderson Cc: Ivan Kokshaysky Cc: Yoshinori Sato Cc: Jeff Dike Cc: Chris Zankel Cc: maximilian attems Signed-off-by: Andrew Morton [ HZ on alpha is 1024 for historical reasons. - Linus ] Signed-off-by: Linus Torvalds --- include/asm-alpha/param.h | 4 ++++ include/asm-h8300/param.h | 8 +++----- include/asm-um/param.h | 2 ++ include/asm-v850/param.h | 2 ++ include/asm-xtensa/param.h | 2 ++ 5 files changed, 13 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/param.h b/include/asm-alpha/param.h index 0982f1d..e691ecf 100644 --- a/include/asm-alpha/param.h +++ b/include/asm-alpha/param.h @@ -5,8 +5,12 @@ hardware ignores reprogramming. We also need userland buy-in to the change in HZ, since this is visible in the wait4 resources etc. */ +#ifdef __KERNEL__ #define HZ CONFIG_HZ #define USER_HZ HZ +#else +#define HZ 1024 +#endif #define EXEC_PAGESIZE 8192 diff --git a/include/asm-h8300/param.h b/include/asm-h8300/param.h index 04f64f1..1c72fb8 100644 --- a/include/asm-h8300/param.h +++ b/include/asm-h8300/param.h @@ -1,14 +1,12 @@ #ifndef _H8300_PARAM_H #define _H8300_PARAM_H - -#ifndef HZ -#define HZ CONFIG_HZ -#endif - #ifdef __KERNEL__ +#define HZ CONFIG_HZ #define USER_HZ HZ #define CLOCKS_PER_SEC (USER_HZ) +#else +#define HZ 100 #endif #define EXEC_PAGESIZE 4096 diff --git a/include/asm-um/param.h b/include/asm-um/param.h index 4cd4a22..e44f4e6 100644 --- a/include/asm-um/param.h +++ b/include/asm-um/param.h @@ -13,6 +13,8 @@ #define HZ CONFIG_HZ #define USER_HZ 100 /* .. some user interfaces are in "ticks" */ #define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ +#else +#define HZ 100 #endif #endif diff --git a/include/asm-v850/param.h b/include/asm-v850/param.h index 2818326..4391f5f 100644 --- a/include/asm-v850/param.h +++ b/include/asm-v850/param.h @@ -26,6 +26,8 @@ # define HZ CONFIG_HZ # define USER_HZ 100 # define CLOCKS_PER_SEC USER_HZ +#else +# define HZ 100 #endif #endif /* __V850_PARAM_H__ */ diff --git a/include/asm-xtensa/param.h b/include/asm-xtensa/param.h index 82ad34d..ba03d5a 100644 --- a/include/asm-xtensa/param.h +++ b/include/asm-xtensa/param.h @@ -15,6 +15,8 @@ # define HZ CONFIG_HZ /* internal timer frequency */ # define USER_HZ 100 /* for user interfaces in "ticks" */ # define CLOCKS_PER_SEC (USER_HZ) /* frequnzy at which times() counts */ +#else +# define HZ 100 #endif #define EXEC_PAGESIZE 4096 -- cgit v1.1 From 3fc957721d18c93662f7d4dab455b80f53dd2641 Mon Sep 17 00:00:00 2001 From: Harvey Harrison Date: Wed, 14 May 2008 16:05:49 -0700 Subject: lib: create common ascii hex array Add a common hex array in hexdump.c so everyone can use it. Add a common hi/lo helper to avoid the shifting masking that is done to get the upper and lower nibbles of a byte value. Pull the pack_hex_byte helper from kgdb as it is opencoded many places in the tree that will be consolidated. Signed-off-by: Harvey Harrison Acked-by: Paul Mundt Cc: Jason Wessel Cc: Ingo Molnar Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/kernel.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/kernel.h b/include/linux/kernel.h index 4d46e29..792bf0a 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h @@ -276,7 +276,17 @@ extern void print_hex_dump(const char *level, const char *prefix_str, const void *buf, size_t len, bool ascii); extern void print_hex_dump_bytes(const char *prefix_str, int prefix_type, const void *buf, size_t len); -#define hex_asc(x) "0123456789abcdef"[x] + +extern const char hex_asc[]; +#define hex_asc_lo(x) hex_asc[((x) & 0x0f)] +#define hex_asc_hi(x) hex_asc[((x) & 0xf0) >> 4] + +static inline char *pack_hex_byte(char *buf, u8 byte) +{ + *buf++ = hex_asc_hi(byte); + *buf++ = hex_asc_lo(byte); + return buf; +} #define pr_emerg(fmt, arg...) \ printk(KERN_EMERG fmt, ##arg) -- cgit v1.1 From 44c81433e8b05dbc85985d939046f10f95901184 Mon Sep 17 00:00:00 2001 From: Eric Dumazet Date: Wed, 14 May 2008 16:05:51 -0700 Subject: per_cpu: fix DEFINE_PER_CPU_SHARED_ALIGNED for modules Current module loader lookups ".data.percpu" ELF section to perform per_cpu relocation. But DEFINE_PER_CPU_SHARED_ALIGNED() uses another section (".data.percpu.shared_aligned"), currently only handled in vmlinux.lds, not by module loader. To correct this problem, instead of adding logic into module loader, or using at build time a module.lds file for all arches to group ".data.percpu.shared_aligned" into ".data.percpu", just use ".data.percpu" for modules. Alignment requirements are correctly handled by ld and module loader. Signed-off-by: Eric Dumazet Cc: Rusty Russell Cc: Fenghua Yu Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/linux/percpu.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/percpu.h b/include/linux/percpu.h index d746a2a..4cdd393 100644 --- a/include/linux/percpu.h +++ b/include/linux/percpu.h @@ -13,8 +13,14 @@ __attribute__((__section__(".data.percpu"))) \ PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name +#ifdef MODULE +#define SHARED_ALIGNED_SECTION ".data.percpu" +#else +#define SHARED_ALIGNED_SECTION ".data.percpu.shared_aligned" +#endif + #define DEFINE_PER_CPU_SHARED_ALIGNED(type, name) \ - __attribute__((__section__(".data.percpu.shared_aligned"))) \ + __attribute__((__section__(SHARED_ALIGNED_SECTION))) \ PER_CPU_ATTRIBUTES __typeof__(type) per_cpu__##name \ ____cacheline_aligned_in_smp #else -- cgit v1.1 From 1c12c4cf9411eb130b245fa8d0fbbaf989477c7b Mon Sep 17 00:00:00 2001 From: Venki Pallipadi Date: Wed, 14 May 2008 16:05:51 -0700 Subject: mprotect: prevent alteration of the PAT bits There is a defect in mprotect, which lets the user change the page cache type bits by-passing the kernel reserve_memtype and free_memtype wrappers. Fix the problem by not letting mprotect change the PAT bits. Signed-off-by: Venkatesh Pallipadi Signed-off-by: Suresh Siddha Signed-off-by: Ingo Molnar Signed-off-by: Hugh Dickins Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- include/asm-x86/pgtable.h | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h index 801b31f..55c3a0e 100644 --- a/include/asm-x86/pgtable.h +++ b/include/asm-x86/pgtable.h @@ -57,7 +57,8 @@ #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \ _PAGE_DIRTY) -#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) +#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_PCD | _PAGE_PWT | \ + _PAGE_ACCESSED | _PAGE_DIRTY) #define _PAGE_CACHE_MASK (_PAGE_PCD | _PAGE_PWT) #define _PAGE_CACHE_WB (0) @@ -288,12 +289,21 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) * Chop off the NX bit (if present), and add the NX portion of * the newprot (if present): */ - val &= _PAGE_CHG_MASK & ~_PAGE_NX; - val |= pgprot_val(newprot) & __supported_pte_mask; + val &= _PAGE_CHG_MASK; + val |= pgprot_val(newprot) & (~_PAGE_CHG_MASK) & __supported_pte_mask; return __pte(val); } +/* mprotect needs to preserve PAT bits when updating vm_page_prot */ +#define pgprot_modify pgprot_modify +static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot) +{ + pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK; + pgprotval_t addbits = pgprot_val(newprot); + return __pgprot(preservebits | addbits); +} + #define pte_pgprot(x) __pgprot(pte_val(x) & (0xfff | _PAGE_NX)) #define canon_pgprot(p) __pgprot(pgprot_val(p) & __supported_pte_mask) -- cgit v1.1 From a1a61a435b3cc157830b7d42b175151ae5eabdd3 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Wed, 14 May 2008 23:24:09 -0700 Subject: atm: Cleanup atm_tcp.h and atm.h for userspace. The atm_tcp.h uses types from linux/atm.h, but does not include it. It should also use the standard __u## types from linux/types.h rather than the uint##_t types since the former can be found with the kernel already. Same goes for linux/atm.h. The linux/socket.h include there also gets dropped as atm.h does not actually use anything from socket.h. Signed-off-by: Mike Frysinger Signed-off-by: Andrew Morton Signed-off-by: David S. Miller --- include/linux/atm.h | 7 ++----- include/linux/atm_tcp.h | 12 +++++------- 2 files changed, 7 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/atm.h b/include/linux/atm.h index 60136684..c791ddd 100644 --- a/include/linux/atm.h +++ b/include/linux/atm.h @@ -16,14 +16,11 @@ * documentation. Do not change them. */ -#ifdef __KERNEL__ -#include -#include -#endif #include #include #include #include +#include /* general ATM constants */ @@ -212,7 +209,7 @@ struct sockaddr_atmsvc { char pub[ATM_E164_LEN+1]; /* public address (E.164) */ /* unused addresses must be bzero'ed */ char lij_type; /* role in LIJ call; one of ATM_LIJ* */ - uint32_t lij_id; /* LIJ call identifier */ + __u32 lij_id; /* LIJ call identifier */ } sas_addr __ATM_API_ALIGN; /* SVC address */ }; diff --git a/include/linux/atm_tcp.h b/include/linux/atm_tcp.h index 18787f9..375638f 100644 --- a/include/linux/atm_tcp.h +++ b/include/linux/atm_tcp.h @@ -8,11 +8,9 @@ #define LINUX_ATM_TCP_H #include - -#ifdef __KERNEL__ -#include -#endif +#include #include +#include /* @@ -20,9 +18,9 @@ */ struct atmtcp_hdr { - uint16_t vpi; - uint16_t vci; - uint32_t length; /* ... of data part */ + __u16 vpi; + __u16 vci; + __u32 length; /* ... of data part */ }; /* -- cgit v1.1