From fe6adc1991b6ce0f6d1c4ca74ec9f02d2d8cb3b4 Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Mon, 10 Oct 2011 14:13:26 -0300 Subject: [media] omap3isp: Add lane configuration to platform data Add lane configuration (order of clock and data lane) to platform data on both CCP2 and CSI-2. Signed-off-by: Sakari Ailus Acked-by: Laurent Pinchart Signed-off-by: Mauro Carvalho Chehab --- include/media/omap3isp.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include/media/omap3isp.h') diff --git a/include/media/omap3isp.h b/include/media/omap3isp.h index 3f4928d..4d94be5 100644 --- a/include/media/omap3isp.h +++ b/include/media/omap3isp.h @@ -91,6 +91,29 @@ enum { }; /** + * struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity + * @pos: position of the lane + * @pol: polarity of the lane + */ +struct isp_csiphy_lane { + u8 pos; + u8 pol; +}; + +#define ISP_CSIPHY1_NUM_DATA_LANES 1 +#define ISP_CSIPHY2_NUM_DATA_LANES 2 + +/** + * struct isp_csiphy_lanes_cfg - CCP2/CSI2 lane configuration + * @data: Configuration of one or two data lanes + * @clk: Clock lane configuration + */ +struct isp_csiphy_lanes_cfg { + struct isp_csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES]; + struct isp_csiphy_lane clk; +}; + +/** * struct isp_ccp2_platform_data - CCP2 interface platform data * @strobe_clk_pol: Strobe/clock polarity * 0 - Non Inverted, 1 - Inverted @@ -109,6 +132,7 @@ struct isp_ccp2_platform_data { unsigned int ccp2_mode:1; unsigned int phy_layer:1; unsigned int vpclk_div:2; + struct isp_csiphy_lanes_cfg lanecfg; }; /** @@ -119,6 +143,7 @@ struct isp_ccp2_platform_data { struct isp_csi2_platform_data { unsigned crc:1; unsigned vpclk_div:2; + struct isp_csiphy_lanes_cfg lanecfg; }; struct isp_subdev_i2c_board_info { -- cgit v1.1