From 14c6578683367b1e7af0c3c09e872b45a45183a7 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 14:21:34 +0200 Subject: mtd: nand: remove AG-AND support We have only one AG-AND driver and it was not touched since 2005. It looks like AG-AND was not really make it to mass-production and can be considered a dead technology. Along with the AG-AND support, this patch removes the BBT_AUTO_REFRESH feature, because the only user of this feature is AG-AND. And even though it is implemented as a generic feature, I prefer to remove it because NAND flashes do not really need it in this form. Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index ef52d9c..7cc2994 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -172,22 +172,6 @@ typedef enum { /* Chip has copy back function */ #define NAND_COPYBACK 0x00000010 /* - * AND Chip which has 4 banks and a confusing page / block - * assignment. See Renesas datasheet for further information. - */ -#define NAND_IS_AND 0x00000020 -/* - * Chip has a array of 4 pages which can be read without - * additional ready /busy waits. - */ -#define NAND_4PAGE_ARRAY 0x00000040 -/* - * Chip requires that BBT is periodically rewritten to prevent - * bits from adjacent blocks from 'leaking' in altering data. - * This happens with the Renesas AG-AND chips, possibly others. - */ -#define BBT_AUTO_REFRESH 0x00000080 -/* * Chip requires ready check on read (for auto-incremented sequential read). * True only for small page devices; large page devices do not support * autoincrement. -- cgit v1.1 From 0be718e5525a73557e76ea1c05b8001dde507049 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 14:35:56 +0200 Subject: mtd: nand: remove a bunch of unused commands Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 7cc2994..e5d6160 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -86,7 +86,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); #define NAND_CMD_READOOB 0x50 #define NAND_CMD_ERASE1 0x60 #define NAND_CMD_STATUS 0x70 -#define NAND_CMD_STATUS_MULTI 0x71 #define NAND_CMD_SEQIN 0x80 #define NAND_CMD_RNDIN 0x85 #define NAND_CMD_READID 0x90 @@ -105,25 +104,6 @@ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); #define NAND_CMD_RNDOUTSTART 0xE0 #define NAND_CMD_CACHEDPROG 0x15 -/* Extended commands for AG-AND device */ -/* - * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but - * there is no way to distinguish that from NAND_CMD_READ0 - * until the remaining sequence of commands has been completed - * so add a high order bit and mask it off in the command. - */ -#define NAND_CMD_DEPLETE1 0x100 -#define NAND_CMD_DEPLETE2 0x38 -#define NAND_CMD_STATUS_MULTI 0x71 -#define NAND_CMD_STATUS_ERROR 0x72 -/* multi-bank error status (banks 0-3) */ -#define NAND_CMD_STATUS_ERROR0 0x73 -#define NAND_CMD_STATUS_ERROR1 0x74 -#define NAND_CMD_STATUS_ERROR2 0x75 -#define NAND_CMD_STATUS_ERROR3 0x76 -#define NAND_CMD_STATUS_RESET 0x7f -#define NAND_CMD_STATUS_CLEAR 0xff - #define NAND_CMD_NONE -1 /* Status bits */ -- cgit v1.1 From 96dca4c29c5e4fc158f8f31513994408c90c6818 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 14:50:43 +0200 Subject: mtd: nand: remove NAND_NO_PADDING macro It is not used anywhere. Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index e5d6160..10fd7df 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -145,8 +145,6 @@ typedef enum { */ /* Buswidth is 16 bit */ #define NAND_BUSWIDTH_16 0x00000002 -/* Device supports partial programming without padding */ -#define NAND_NO_PADDING 0x00000004 /* Chip has cache program function */ #define NAND_CACHEPRG 0x00000008 /* Chip has copy back function */ @@ -171,11 +169,9 @@ typedef enum { #define NAND_SUBPAGE_READ 0x00001000 /* Options valid for Samsung large page devices */ -#define NAND_SAMSUNG_LP_OPTIONS \ - (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) +#define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG | NAND_COPYBACK) /* Macros to identify the above */ -#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) #define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) -- cgit v1.1 From 88ad4b162adb3821815d0098987040fca26c7d80 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 14:52:25 +0200 Subject: mtd: nand: remove NAND_COPYBACK macro It is unused. Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 10fd7df..ec0a748 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -147,8 +147,6 @@ typedef enum { #define NAND_BUSWIDTH_16 0x00000002 /* Chip has cache program function */ #define NAND_CACHEPRG 0x00000008 -/* Chip has copy back function */ -#define NAND_COPYBACK 0x00000010 /* * Chip requires ready check on read (for auto-incremented sequential read). * True only for small page devices; large page devices do not support @@ -169,11 +167,10 @@ typedef enum { #define NAND_SUBPAGE_READ 0x00001000 /* Options valid for Samsung large page devices */ -#define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG | NAND_COPYBACK) +#define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG) /* Macros to identify the above */ #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) -#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ)) /* Non chip related options */ -- cgit v1.1 From 3239a6cdef0be60ec2dadc501cf385dc419d7452 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 14:56:18 +0200 Subject: mtd: nand: use NAND_HAS_CACHEPROG We have this unused macro, let's use it and justify its existence. Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index ec0a748..07d7a3d 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -167,7 +167,7 @@ typedef enum { #define NAND_SUBPAGE_READ 0x00001000 /* Options valid for Samsung large page devices */ -#define NAND_SAMSUNG_LP_OPTIONS (NAND_CACHEPRG) +#define NAND_SAMSUNG_LP_OPTIONS NAND_CACHEPRG /* Macros to identify the above */ #define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) -- cgit v1.1 From 68aa352de28235bccdcee96ddf49f7628e93ec6f Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 16:05:00 +0200 Subject: mtd: nand: rename the id field of 'struct nand_flash_dev' The 'id' is a bit confusing name because NAND IDs are multi-byte. Re-name it to 'dev_id' to make it clear that this is the "device ID" part (the second byte). While on it, clean-up the commentary for 'struct nand_flash_dev'. Signed-off-by: Artem Bityutskiy Acked-by: Brian Norris Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 07d7a3d..9aed31a 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -548,19 +548,18 @@ struct nand_chip { /** * struct nand_flash_dev - NAND Flash Device ID Structure - * @name: Identify the device type - * @id: device ID code - * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 - * If the pagesize is 0, then the real pagesize - * and the eraseize are determined from the - * extended id bytes in the chip - * @erasesize: Size of an erase block in the flash device. - * @chipsize: Total chipsize in Mega Bytes - * @options: Bitfield to store chip relevant options + * @name: a human-readable name of the NAND chip + * @dev_id: the device ID (the second byte of the full chip ID array) + * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as + * well as the eraseblock size) is determined from the extended NAND + * chip ID array) + * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) + * @chipsize: total chip size in MiB + * @options: stores various chip bit options */ struct nand_flash_dev { char *name; - int id; + int dev_id; unsigned long pagesize; unsigned long chipsize; unsigned long erasesize; -- cgit v1.1 From 8dbfae1ef04311ba19d6b6c9a4d8fdddbb90ab0f Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 15:39:18 +0200 Subject: mtd: nand_ids: introduce helper macros Introduce helper macros for defining NAND chips. These macros do not really add much value in the current code-base. However, we are going to add full ID support which adds some more complexity to the table, and helper macros become useful for readability. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 9aed31a..63b319a 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -546,6 +546,30 @@ struct nand_chip { #define NAND_MFR_MACRONIX 0xc2 #define NAND_MFR_EON 0x92 +/* + * A helper for defining older NAND chips where the second ID byte fully + * defined the chip, including the geometry (chip size, eraseblock size, page + * size). + */ +#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \ + { .name = (nm), .dev_id = (devid), .pagesize = (pagesz), \ + .chipsize = (chipsz), .erasesize = (erasesz), \ + .options = (opts) } + +/* + * A helper for defining newer chips which report their page size and + * eraseblock size via the extended ID bytes. + * + * The real difference between LEGACY_ID_NAND and EXTENDED_ID_NAND is that with + * EXTENDED_ID_NAND, manufacturers overloaded the same device ID so that the + * device ID now only represented a particular total chip size (and voltage, + * buswidth), and the page size, eraseblock size, and OOB size could vary while + * using the same device ID. + */ +#define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \ + { .name = (nm), .dev_id = (devid), .chipsize = (chipsz), \ + .options = (opts) } + /** * struct nand_flash_dev - NAND Flash Device ID Structure * @name: a human-readable name of the NAND chip -- cgit v1.1 From 8e12b474f9a2349bcaebda65bdc38e8398ff408e Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 4 Mar 2013 16:26:56 +0200 Subject: mtd: nand: provision full ID support Up until now we identified NAND chips by the 'device ID' part of the full chip ID array, which is the second full ID array byte. However, the newest flashes use the same device ID for chips with identical page and eraseblock sizes, but different OOB sizes. And unfortunately, it is not clear if there is a "standard" way to fetch the OOB size from chip's full ID array. Here is an example: Toshiba TC58NVG2S0F: 0x98, 0xdc, 0x90, 0x26, 0x76, 0x15, 0x01, 0x08 Toshiba TC58NVG3S0F: 0x98, 0xd3, 0x90, 0x26, 0x76, 0x15, 0x02, 0x08 The first one is a 512MiB NAND chip with 4KiB NAND pages, 256KiB eraseblock size and 224 bytes OOB. The second one is a 1GiB NAND chip with the same page and eraseblock sizes, but with 232 bytes OOB. This means that we have to store full ID in our NAND flashes table in order to distinguish between these 2. This patch adds the 'id[8]' field to the 'struct nand_flash_dev' structure, and it makes it to be a part of anonymous union, where the second member is a structure containing the 'mfr_id' and 'dev_id' bytes. The union makes sure that 'mfr_id' refers the same RAM address as 'id[0]' and 'dev_id' refers the same RAM address as 'id[1]'. The only motivation for the union is an assumption that 'type->dev_id' is more readable than 'type->id[1]'. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 63b319a..9a1b74c 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -551,9 +551,9 @@ struct nand_chip { * defined the chip, including the geometry (chip size, eraseblock size, page * size). */ -#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \ - { .name = (nm), .dev_id = (devid), .pagesize = (pagesz), \ - .chipsize = (chipsz), .erasesize = (erasesz), \ +#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \ + { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \ + .chipsize = (chipsz), .erasesize = (erasesz), \ .options = (opts) } /* @@ -566,14 +566,19 @@ struct nand_chip { * buswidth), and the page size, eraseblock size, and OOB size could vary while * using the same device ID. */ -#define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \ - { .name = (nm), .dev_id = (devid), .chipsize = (chipsz), \ +#define EXTENDED_ID_NAND(nm, devid, chipsz, opts) \ + { .name = (nm), {{ .dev_id = (devid) }}, .chipsize = (chipsz), \ .options = (opts) } /** * struct nand_flash_dev - NAND Flash Device ID Structure * @name: a human-readable name of the NAND chip * @dev_id: the device ID (the second byte of the full chip ID array) + * @mfr_id: manufecturer ID part of the full chip ID array (refers the same + * memory address as @id[0]) + * @dev_id: device ID part of the full chip ID array (refers the same memory + * address as @id[1]) + * @id: full device ID array * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as * well as the eraseblock size) is determined from the extended NAND * chip ID array) @@ -583,7 +588,13 @@ struct nand_chip { */ struct nand_flash_dev { char *name; - int dev_id; + union { + struct { + uint8_t mfr_id; + uint8_t dev_id; + }; + uint8_t id[8]; + }; unsigned long pagesize; unsigned long chipsize; unsigned long erasesize; -- cgit v1.1 From 26a4734623e4f06752014336b05cf3ae77158892 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Mon, 11 Mar 2013 15:38:48 +0200 Subject: mtd: add 'const' qualifier to a couple of register functions 'mtd_device_parse_register()' and 'parse_mtd_partitions()' functions accept a an array of character pointers. These functions modify neither the pointers nor the characters they point to. The characters are actually names of the MTD parsers. At the moment, the argument type is 'const char **', which means that only the names of the parsers are constant. Let's turn the argument type into 'const char * const *', which means that both names and the pointers which point to them are constant. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/mtd.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index f9ac289..a5cf4e8 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -362,10 +362,10 @@ struct mtd_partition; struct mtd_part_parser_data; extern int mtd_device_parse_register(struct mtd_info *mtd, - const char **part_probe_types, - struct mtd_part_parser_data *parser_data, - const struct mtd_partition *defparts, - int defnr_parts); + const char * const *part_probe_types, + struct mtd_part_parser_data *parser_data, + const struct mtd_partition *defparts, + int defnr_parts); #define mtd_device_register(master, parts, nr_parts) \ mtd_device_parse_register(master, NULL, NULL, parts, nr_parts) extern int mtd_device_unregister(struct mtd_info *master); -- cgit v1.1 From d50dcb1d0e1f8ebe11db1719aad5753cd1b4c4f8 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Tue, 12 Mar 2013 10:28:31 +0200 Subject: mtd: plat-ram: add const quilifiers Be a bit stricter and add few more 'const' qualifiers. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/plat-ram.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/plat-ram.h b/include/linux/mtd/plat-ram.h index e07890a..44212d6 100644 --- a/include/linux/mtd/plat-ram.h +++ b/include/linux/mtd/plat-ram.h @@ -20,8 +20,8 @@ struct platdata_mtd_ram { const char *mapname; - const char **map_probes; - const char **probes; + const char * const *map_probes; + const char * const *probes; struct mtd_partition *partitions; int nr_partitions; int bankwidth; -- cgit v1.1 From f39cf6c7d472349a9907955ef213db1f26618ba0 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Tue, 12 Mar 2013 10:32:52 +0200 Subject: mtd: physmap: add const qualifiers Be a bit stricter and add few more 'const' qualifiers. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/physmap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index d2887e7..aa6a263 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h @@ -30,7 +30,7 @@ struct physmap_flash_data { unsigned int pfow_base; char *probe_type; struct mtd_partition *parts; - const char **part_probe_types; + const char * const *part_probe_types; }; #endif /* __LINUX_MTD_PHYSMAP__ */ -- cgit v1.1 From ecb42fea59cf2d1e7160c5c7e707120e0e6714db Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Wed, 13 Mar 2013 13:45:00 +0200 Subject: mtd: nand: use more reasonable integer types Use 'unsigned int' instead of 'unsigned long' in the NAND chip description data structure, because 32-bits is more than enough for our purposes. We do not need 64-bits, which is what we end up on 64-bit architectures. We declare many instances of this data structure, so this should help saving some amount of memory. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 9a1b74c..d5903c0 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -582,8 +582,8 @@ struct nand_chip { * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as * well as the eraseblock size) is determined from the extended NAND * chip ID array) - * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) * @chipsize: total chip size in MiB + * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) * @options: stores various chip bit options */ struct nand_flash_dev { @@ -595,10 +595,10 @@ struct nand_flash_dev { }; uint8_t id[8]; }; - unsigned long pagesize; - unsigned long chipsize; - unsigned long erasesize; - unsigned long options; + unsigned int pagesize; + unsigned int chipsize; + unsigned int erasesize; + unsigned int options; }; /** -- cgit v1.1 From 53552d22bfe1f83f69f18eddae2f1d96249440f3 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Thu, 14 Mar 2013 09:57:23 +0200 Subject: mtd: introduce a macro for max NAND ID sequence length Introduce a helpful macro for the maximum NAND ID sequence length instead of using the "8" magic number. Signed-off-by: Artem Bityutskiy Acked-by: Huang Shijie Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index d5903c0..0f78d19 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -546,6 +546,9 @@ struct nand_chip { #define NAND_MFR_MACRONIX 0xc2 #define NAND_MFR_EON 0x92 +/* The maximum expected count of bytes in the NAND ID sequence */ +#define NAND_MAX_ID_LEN 8 + /* * A helper for defining older NAND chips where the second ID byte fully * defined the chip, including the geometry (chip size, eraseblock size, page @@ -593,7 +596,7 @@ struct nand_flash_dev { uint8_t mfr_id; uint8_t dev_id; }; - uint8_t id[8]; + uint8_t id[NAND_MAX_ID_LEN]; }; unsigned int pagesize; unsigned int chipsize; -- cgit v1.1 From f22d5f638b0ea40e7cceb4639a608bd2c3eff97c Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Fri, 15 Mar 2013 11:00:59 +0800 Subject: mtd: add new fields to nand_flash_dev{} As time goes on, we begin to meet the situation that we can not get enough information from some nand chips's id data. Take some Toshiba's nand chips for example. I have 4 Toshiba's nand chips in my hand: TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2, TC58NVG6D2 When we read these chips' datasheets, we will get the geometry of these chips: TC58NVG2S0F : 4096 + 224 TC58NVG3S0F : 4096 + 232 TC58NVG5D2 : 8192 + 640 TC58NVG6D2 : 8192 + 640 But we can not parse out the correct oob size for these chips from the id data. This patch adds some new fields to the nand_flash_dev{}: @id_len: the valid length of the id data. See the comments in nand_id_has_period() @oobsize: the oob size. Signed-off-by: Huang Shijie Reviewed-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 0f78d19..13786f0 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -588,6 +588,8 @@ struct nand_chip { * @chipsize: total chip size in MiB * @erasesize: eraseblock size in bytes (determined from the extended ID if 0) * @options: stores various chip bit options + * @id_len: The valid length of the @id. + * @oobsize: OOB size */ struct nand_flash_dev { char *name; @@ -602,6 +604,8 @@ struct nand_flash_dev { unsigned int chipsize; unsigned int erasesize; unsigned int options; + uint16_t id_len; + uint16_t oobsize; }; /** -- cgit v1.1 From 5bfa9b71a2d6642506e2dfdf49a66620f54f1d92 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Tue, 19 Mar 2013 10:29:26 +0200 Subject: mtd: nand_ids: improve LEGACY_ID_NAND macro a bit Notice that all the flashes belonging to the "legacy ID" class have 512 bytes NAND page. This means we may simplify the 'LEGACY_ID_NAND()' macro as well as the NAND ID table a little. Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 13786f0..ebf970e 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -552,12 +552,11 @@ struct nand_chip { /* * A helper for defining older NAND chips where the second ID byte fully * defined the chip, including the geometry (chip size, eraseblock size, page - * size). + * size). All these chips have 512 bytes NAND page size. */ -#define LEGACY_ID_NAND(nm, devid, pagesz, chipsz, erasesz, opts) \ - { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = (pagesz), \ - .chipsize = (chipsz), .erasesize = (erasesz), \ - .options = (opts) } +#define LEGACY_ID_NAND(nm, devid, chipsz, erasesz, opts) \ + { .name = (nm), {{ .dev_id = (devid) }}, .pagesize = 512, \ + .chipsize = (chipsz), .erasesize = (erasesz), .options = (opts) } /* * A helper for defining newer chips which report their page size and -- cgit v1.1 From 837a6ba4f3b6d23026674e6af6b6849a4634fff9 Mon Sep 17 00:00:00 2001 From: "Gupta, Pekon" Date: Fri, 15 Mar 2013 17:55:53 +0530 Subject: mtd: nand: subpage write support for hardware based ECC schemes This patch adds support for subpage (partial-page) writes when using hardware based ECC schemes. Advantages: (1) reduces storage overhead when using file-systems like UBIFS, which store LEB header at page-size granularity. (2) allows independent subpage writes, thereby increasing NAND storage efficiency for non-page aligned data. + updated cafe_nand and lpc32xx_mlc NAND drivers for change in chip->write_page interface. Signed-off-by: Gupta, Pekon Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/linux/mtd') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index ebf970e..ab63634 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -318,6 +318,7 @@ struct nand_hw_control { * any single ECC step, 0 if bitflips uncorrectable, -EIO hw error * @read_subpage: function to read parts of the page covered by ECC; * returns same as read_page() + * @write_subpage: function to write parts of the page covered by ECC. * @write_page: function to write a page according to the ECC generator * requirements. * @write_oob_raw: function to write chip OOB data without ECC @@ -349,6 +350,9 @@ struct nand_ecc_ctrl { uint8_t *buf, int oob_required, int page); int (*read_subpage)(struct mtd_info *mtd, struct nand_chip *chip, uint32_t offs, uint32_t len, uint8_t *buf); + int (*write_subpage)(struct mtd_info *mtd, struct nand_chip *chip, + uint32_t offset, uint32_t data_len, + const uint8_t *data_buf, int oob_required); int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int oob_required); int (*write_oob_raw)(struct mtd_info *mtd, struct nand_chip *chip, @@ -484,8 +488,8 @@ struct nand_chip { int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, - const uint8_t *buf, int oob_required, int page, - int cached, int raw); + uint32_t offset, int data_len, const uint8_t *buf, + int oob_required, int page, int cached, int raw); int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip, int feature_addr, uint8_t *subfeature_para); int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip, -- cgit v1.1