From 5927467d0ca274bc3b8eed9fd5db964bbde56e1c Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Tue, 23 Apr 2013 19:44:16 +0100 Subject: mfd: arizona: Support use of external DCVDD When the device is used with an external DCVDD supply instead of the internal LDO1 then an extra step is required when suspending and resuming the device. Signed-off-by: Mark Brown --- include/linux/mfd/arizona/core.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/core.h b/include/linux/mfd/arizona/core.h index cc28136..f797bb9 100644 --- a/include/linux/mfd/arizona/core.h +++ b/include/linux/mfd/arizona/core.h @@ -95,6 +95,8 @@ struct arizona { struct arizona_pdata pdata; + unsigned int external_dcvdd:1; + int irq; struct irq_domain *virq; struct regmap_irq_chip_data *aod_irq_chip; -- cgit v1.1 From 435705e89265dec3c641fe75deb748f05e232e59 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Mon, 20 May 2013 11:16:10 -0500 Subject: ASoC: wm8994: Handle LRCLK inversion for WM8958 and WM1811A On WM8958 and WM1811A separate control of the LRCLK inversion bit is available for the DAC and ADC LRCLKs which for compatibility reasons is done in a new register bit. Since writes to each scheme have no effect on parts using the other just always write to both for simplicity. Signed-off-by: Mark Brown Acked-by: Vinod Koul Tested-by: Samreen Nilofer --- include/linux/mfd/wm8994/registers.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/wm8994/registers.h b/include/linux/mfd/wm8994/registers.h index 0535489..db8cef3 100644 --- a/include/linux/mfd/wm8994/registers.h +++ b/include/linux/mfd/wm8994/registers.h @@ -2668,6 +2668,10 @@ /* * R772 (0x304) - AIF1ADC LRCLK */ +#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ #define WM8994_AIF1ADC_LRCLK_DIR 0x0800 /* AIF1ADC_LRCLK_DIR */ #define WM8994_AIF1ADC_LRCLK_DIR_MASK 0x0800 /* AIF1ADC_LRCLK_DIR */ #define WM8994_AIF1ADC_LRCLK_DIR_SHIFT 11 /* AIF1ADC_LRCLK_DIR */ @@ -2679,6 +2683,10 @@ /* * R773 (0x305) - AIF1DAC LRCLK */ +#define WM8958_AIF1_LRCLK_INV 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_MASK 0x1000 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_SHIFT 12 /* AIF1_LRCLK_INV */ +#define WM8958_AIF1_LRCLK_INV_WIDTH 1 /* AIF1_LRCLK_INV */ #define WM8994_AIF1DAC_LRCLK_DIR 0x0800 /* AIF1DAC_LRCLK_DIR */ #define WM8994_AIF1DAC_LRCLK_DIR_MASK 0x0800 /* AIF1DAC_LRCLK_DIR */ #define WM8994_AIF1DAC_LRCLK_DIR_SHIFT 11 /* AIF1DAC_LRCLK_DIR */ -- cgit v1.1 From f773fc6dca4619bdf8da767eaba101a83b766059 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Tue, 21 May 2013 14:56:58 +0100 Subject: mfd: arizona: Change fast_start pdata name to better reflect functionality The bit in the register enables MICBIAS fast startup when clear not when set. This patch changes the name of this pdata option to soft_start to better match the functionality. We rename rather than invert the handling to keep the same default functionality, which is fast start active. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown --- include/linux/mfd/arizona/pdata.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/pdata.h b/include/linux/mfd/arizona/pdata.h index 80dead1..12a5c13 100644 --- a/include/linux/mfd/arizona/pdata.h +++ b/include/linux/mfd/arizona/pdata.h @@ -77,7 +77,7 @@ struct arizona_micbias { int mV; /** Regulated voltage */ unsigned int ext_cap:1; /** External capacitor fitted */ unsigned int discharge:1; /** Actively discharge */ - unsigned int fast_start:1; /** Enable aggressive startup ramp rate */ + unsigned int soft_start:1; /** Disable aggressive startup ramp rate */ unsigned int bypass:1; /** Use bypass mode */ }; -- cgit v1.1 From e5657054ff508c9e547a8ceb931de07838ee3ba0 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 22 May 2013 18:55:25 -0500 Subject: mfd: wm5110: Make DSPn_STATUS_3 readable These registers have been documented since the driver was originally submitted so expose them. Signed-off-by: Mark Brown --- include/linux/mfd/arizona/registers.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 715b6ba..4730b5c 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -1002,6 +1002,7 @@ #define ARIZONA_DSP2_CLOCKING_1 0x1201 #define ARIZONA_DSP2_STATUS_1 0x1204 #define ARIZONA_DSP2_STATUS_2 0x1205 +#define ARIZONA_DSP2_STATUS_3 0x1206 #define ARIZONA_DSP2_SCRATCH_0 0x1240 #define ARIZONA_DSP2_SCRATCH_1 0x1241 #define ARIZONA_DSP2_SCRATCH_2 0x1242 @@ -1010,6 +1011,7 @@ #define ARIZONA_DSP3_CLOCKING_1 0x1301 #define ARIZONA_DSP3_STATUS_1 0x1304 #define ARIZONA_DSP3_STATUS_2 0x1305 +#define ARIZONA_DSP3_STATUS_3 0x1306 #define ARIZONA_DSP3_SCRATCH_0 0x1340 #define ARIZONA_DSP3_SCRATCH_1 0x1341 #define ARIZONA_DSP3_SCRATCH_2 0x1342 @@ -1018,6 +1020,7 @@ #define ARIZONA_DSP4_CLOCKING_1 0x1401 #define ARIZONA_DSP4_STATUS_1 0x1404 #define ARIZONA_DSP4_STATUS_2 0x1405 +#define ARIZONA_DSP4_STATUS_3 0x1406 #define ARIZONA_DSP4_SCRATCH_0 0x1440 #define ARIZONA_DSP4_SCRATCH_1 0x1441 #define ARIZONA_DSP4_SCRATCH_2 0x1442 -- cgit v1.1 From 2da1c4bf765cb32024e5db6fa75dab92916fa3b1 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Thu, 30 May 2013 13:42:29 +0100 Subject: ASoC: wm8994: Allow debounce before MICDET identification For systems which do not have a jack detection feature allow some debounce to be specified before we perform accessory identification, improving robustness without impacting button detection responsiveness. Signed-off-by: Mark Brown --- include/linux/mfd/wm8994/pdata.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/wm8994/pdata.h b/include/linux/mfd/wm8994/pdata.h index 68e7765..b5046f6 100644 --- a/include/linux/mfd/wm8994/pdata.h +++ b/include/linux/mfd/wm8994/pdata.h @@ -182,6 +182,11 @@ struct wm8994_pdata { */ int micdet_delay; + /* Delay between microphone detect completing and reporting on + * insert (specified in ms) + */ + int mic_id_delay; + /* IRQ for microphone detection if brought out directly as a * signal. */ -- cgit v1.1 From 1b4d7d9787beb45a51c1ccf2f0a7fcee9213fb38 Mon Sep 17 00:00:00 2001 From: Charles Keepax Date: Wed, 12 Jun 2013 17:44:07 +0100 Subject: mfd: wm5102: Expose DRE control registers Certain use cases may require specific DRE settings so expose the necessary registers. Signed-off-by: Charles Keepax Signed-off-by: Mark Brown --- include/linux/mfd/arizona/registers.h | 44 +++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h index 4730b5c..4706d3d 100644 --- a/include/linux/mfd/arizona/registers.h +++ b/include/linux/mfd/arizona/registers.h @@ -215,6 +215,9 @@ #define ARIZONA_DAC_DIGITAL_VOLUME_6R 0x43D #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F +#define ARIZONA_DRE_ENABLE 0x440 +#define ARIZONA_DRE_CONTROL_2 0x442 +#define ARIZONA_DRE_CONTROL_3 0x443 #define ARIZONA_DAC_AEC_CONTROL_1 0x450 #define ARIZONA_NOISE_GATE_CONTROL 0x458 #define ARIZONA_PDM_SPK1_CTRL_1 0x490 @@ -3133,6 +3136,47 @@ #define ARIZONA_OUT6R_NGATE_SRC_WIDTH 12 /* OUT6R_NGATE_SRC - [11:0] */ /* + * R1088 (0x440) - DRE Enable + */ +#define ARIZONA_DRE3L_ENA 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_MASK 0x0010 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_SHIFT 4 /* DRE3L_ENA */ +#define ARIZONA_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ +#define ARIZONA_DRE2R_ENA 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_MASK 0x0008 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_SHIFT 3 /* DRE2R_ENA */ +#define ARIZONA_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */ +#define ARIZONA_DRE2L_ENA 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_MASK 0x0004 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_SHIFT 2 /* DRE2L_ENA */ +#define ARIZONA_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */ +#define ARIZONA_DRE1R_ENA 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_MASK 0x0002 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_SHIFT 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */ +#define ARIZONA_DRE1L_ENA 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_MASK 0x0001 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_SHIFT 0 /* DRE1L_ENA */ +#define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ + +/* + * R1090 (0x442) - DRE Control 2 + */ +#define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */ +#define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */ + +/* + * R1091 (0x443) - DRE Control 3 + */ +#define ARIZONA_DRE_GAIN_SHIFT_MASK 0xC000 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_SHIFT 14 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_GAIN_SHIFT_WIDTH 2 /* DRE_GAIN_SHIFT - [15:14] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_MASK 0x000F /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */ +#define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */ + +/* * R1104 (0x450) - DAC AEC Control 1 */ #define ARIZONA_AEC_LOOPBACK_SRC_MASK 0x003C /* AEC_LOOPBACK_SRC - [5:2] */ -- cgit v1.1 From fa223ec37c9f6710022381a25c352955675817f9 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 24 Jun 2013 15:42:04 +0200 Subject: mfd: twl6040: Update register bit definitions Add define for: HSDRV, HFDAC, HFPGA and HFDRV enable bits Signed-off-by: Peter Ujfalusi CC: Samuel Ortiz Signed-off-by: Mark Brown --- include/linux/mfd/twl6040.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/linux/mfd') diff --git a/include/linux/mfd/twl6040.h b/include/linux/mfd/twl6040.h index 94ac944..7e7fbce 100644 --- a/include/linux/mfd/twl6040.h +++ b/include/linux/mfd/twl6040.h @@ -125,8 +125,15 @@ #define TWL6040_HSDACENA (1 << 0) #define TWL6040_HSDACMODE (1 << 1) +#define TWL6040_HSDRVENA (1 << 2) #define TWL6040_HSDRVMODE (1 << 3) +/* HFLCTL/R (0x14/0x16) fields */ + +#define TWL6040_HFDACENA (1 << 0) +#define TWL6040_HFPGAENA (1 << 1) +#define TWL6040_HFDRVENA (1 << 4) + /* VIBCTLL/R (0x18/0x1A) fields */ #define TWL6040_VIBENA (1 << 0) -- cgit v1.1