From 591f0a4287d0de243493fd0c133c862e1d1f1c97 Mon Sep 17 00:00:00 2001 From: Andy Fleming Date: Sun, 2 Apr 2006 17:42:40 -0500 Subject: Add 85xx CDS to arch/powerpc This patch adds support for 85xx CDS support to arch/powerpc Signed-off-by: Andy Fleming Signed-off-by: Kumar Gala --- include/asm-ppc/mpc85xx.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/asm-ppc') diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h index f47002a..4f844eb 100644 --- a/include/asm-ppc/mpc85xx.h +++ b/include/asm-ppc/mpc85xx.h @@ -28,6 +28,9 @@ #if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS) #include #endif +#ifdef CONFIG_MPC85xx_CDS +#include +#endif #ifdef CONFIG_MPC8560_ADS #include #endif -- cgit v1.1 From 6218a761bbc27acc65248c80024875bcc06d52b1 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Sun, 11 Jun 2006 14:15:17 +1000 Subject: powerpc: add context.vdso_base for 32-bit too This adds a vdso_base element to the mm_context_t for 32-bit compiles (both for ARCH=powerpc and ARCH=ppc). This fixes the compile errors that have been reported in arch/powerpc/kernel/signal_32.c. Signed-off-by: Paul Mackerras --- include/asm-ppc/mmu.h | 6 ++++-- include/asm-ppc/mmu_context.h | 27 ++++++++++++++++----------- include/asm-ppc/pgtable.h | 2 +- 3 files changed, 21 insertions(+), 14 deletions(-) (limited to 'include/asm-ppc') diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 9205db4..80ae604 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -24,8 +24,10 @@ extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t); #define PHYS_FMT "%16Lx" #endif -/* Default "unsigned long" context */ -typedef unsigned long mm_context_t; +typedef struct { + unsigned long id; + unsigned long vdso_base; +} mm_context_t; /* Hardware Page Table Entry */ typedef struct _PTE { diff --git a/include/asm-ppc/mmu_context.h b/include/asm-ppc/mmu_context.h index 4f152cc..4454ecf 100644 --- a/include/asm-ppc/mmu_context.h +++ b/include/asm-ppc/mmu_context.h @@ -71,7 +71,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) #else /* PPC 6xx, 7xx CPUs */ -#define NO_CONTEXT ((mm_context_t) -1) +#define NO_CONTEXT ((unsigned long) -1) #define LAST_CONTEXT 32767 #define FIRST_CONTEXT 1 #endif @@ -86,7 +86,7 @@ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) * can be used for debugging on all processors (if you happen to have * an Abatron). */ -extern void set_context(mm_context_t context, pgd_t *pgd); +extern void set_context(unsigned long contextid, pgd_t *pgd); /* * Bitmap of contexts in use. @@ -99,7 +99,7 @@ extern unsigned long context_map[]; * Its use is an optimization only, we can't rely on this context * number to be free, but it usually will be. */ -extern mm_context_t next_mmu_context; +extern unsigned long next_mmu_context; /* * If we don't have sufficient contexts to give one to every task @@ -118,9 +118,9 @@ extern void steal_context(void); */ static inline void get_mmu_context(struct mm_struct *mm) { - mm_context_t ctx; + unsigned long ctx; - if (mm->context != NO_CONTEXT) + if (mm->context.id != NO_CONTEXT) return; #ifdef FEW_CONTEXTS while (atomic_dec_if_positive(&nr_free_contexts) < 0) @@ -133,7 +133,7 @@ static inline void get_mmu_context(struct mm_struct *mm) ctx = 0; } next_mmu_context = (ctx + 1) & LAST_CONTEXT; - mm->context = ctx; + mm->context.id = ctx; #ifdef FEW_CONTEXTS context_mm[ctx] = mm; #endif @@ -142,7 +142,12 @@ static inline void get_mmu_context(struct mm_struct *mm) /* * Set up the context for a new address space. */ -#define init_new_context(tsk,mm) (((mm)->context = NO_CONTEXT), 0) +static inline int init_new_context(struct task_struct *t, struct mm_struct *mm) +{ + mm->context.id = NO_CONTEXT; + mm->context.vdso_base = 0; + return 0; +} /* * We're finished using the context for an address space. @@ -150,9 +155,9 @@ static inline void get_mmu_context(struct mm_struct *mm) static inline void destroy_context(struct mm_struct *mm) { preempt_disable(); - if (mm->context != NO_CONTEXT) { - clear_bit(mm->context, context_map); - mm->context = NO_CONTEXT; + if (mm->context.id != NO_CONTEXT) { + clear_bit(mm->context.id, context_map); + mm->context.id = NO_CONTEXT; #ifdef FEW_CONTEXTS atomic_inc(&nr_free_contexts); #endif @@ -180,7 +185,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, /* Setup new userspace context */ get_mmu_context(next); - set_context(next->context, next->pgd); + set_context(next->context.id, next->pgd); } #define deactivate_mm(tsk,mm) do { } while (0) diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h index 570b355..f886066 100644 --- a/include/asm-ppc/pgtable.h +++ b/include/asm-ppc/pgtable.h @@ -663,7 +663,7 @@ static inline int __ptep_test_and_clear_young(unsigned int context, unsigned lon return (old & _PAGE_ACCESSED) != 0; } #define ptep_test_and_clear_young(__vma, __addr, __ptep) \ - __ptep_test_and_clear_young((__vma)->vm_mm->context, __addr, __ptep) + __ptep_test_and_clear_young((__vma)->vm_mm->context.id, __addr, __ptep) #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, -- cgit v1.1 From 227318bbde6c8309b1d20ab46532ec2b737e1fee Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Sat, 10 Jun 2006 20:32:01 +1000 Subject: [POWERPC] Remove stale 64bit on 32bit kernel code Remove some stale POWER3/POWER4/970 on 32bit kernel support. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- include/asm-ppc/mmu.h | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'include/asm-ppc') diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h index 80ae604..8915c4c 100644 --- a/include/asm-ppc/mmu.h +++ b/include/asm-ppc/mmu.h @@ -31,20 +31,11 @@ typedef struct { /* Hardware Page Table Entry */ typedef struct _PTE { -#ifdef CONFIG_PPC64BRIDGE - unsigned long long vsid:52; - unsigned long api:5; - unsigned long :5; - unsigned long h:1; - unsigned long v:1; - unsigned long long rpn:52; -#else /* CONFIG_PPC64BRIDGE */ unsigned long v:1; /* Entry is valid */ unsigned long vsid:24; /* Virtual segment identifier */ unsigned long h:1; /* Hash algorithm indicator */ unsigned long api:6; /* Abbreviated page index */ unsigned long rpn:20; /* Real (physical) page number */ -#endif /* CONFIG_PPC64BRIDGE */ unsigned long :3; /* Unused */ unsigned long r:1; /* Referenced */ unsigned long c:1; /* Changed */ @@ -85,11 +76,7 @@ typedef struct _P601_BATU { /* Upper part of BAT for 601 processor */ } P601_BATU; typedef struct _BATU { /* Upper part of BAT (all except 601) */ -#ifdef CONFIG_PPC64BRIDGE - unsigned long long bepi:47; -#else /* CONFIG_PPC64BRIDGE */ unsigned long bepi:15; /* Effective page index (virtual address) */ -#endif /* CONFIG_PPC64BRIDGE */ unsigned long :4; /* Unused */ unsigned long bl:11; /* Block size mask */ unsigned long vs:1; /* Supervisor valid */ @@ -104,11 +91,7 @@ typedef struct _P601_BATL { /* Lower part of BAT for 601 processor */ } P601_BATL; typedef struct _BATL { /* Lower part of BAT (all except 601) */ -#ifdef CONFIG_PPC64BRIDGE - unsigned long long brpn:47; -#else /* CONFIG_PPC64BRIDGE */ unsigned long brpn:15; /* Real page index (physical address) */ -#endif /* CONFIG_PPC64BRIDGE */ unsigned long :10; /* Unused */ unsigned long w:1; /* Write-thru cache */ unsigned long i:1; /* Cache inhibit */ -- cgit v1.1