From 4a0312fca6599299bbed944ce09278d90388a3e5 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Tue, 13 Jun 2006 13:59:01 +0200 Subject: [MIPS] Support SNI RM200C SNI in big endian mode and R5000 processors. Added support for RM200C machines with big endian firmware Added support for RM200-C40 (R5000 support) Signed-off-by: Florian Lohoff Signed-off-by: Thomas Bogendoerfer Signed-off-by: Ralf Baechle --- include/asm-mips/mach-rm200/cpu-feature-overrides.h | 2 -- include/asm-mips/sni.h | 7 ++----- 2 files changed, 2 insertions(+), 7 deletions(-) (limited to 'include/asm-mips') diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h index 91e7cf5..0158783 100644 --- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h @@ -35,10 +35,8 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 -#define cpu_has_subset_pcaches 0 /* No S-cache on R5000 I think ... */ #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 -#define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */ #define cpu_has_mips32r1 0 #define cpu_has_mips32r2 0 diff --git a/include/asm-mips/sni.h b/include/asm-mips/sni.h index b3bc698..b9ba54d 100644 --- a/include/asm-mips/sni.h +++ b/include/asm-mips/sni.h @@ -15,9 +15,6 @@ /* * ASIC PCI registers for little endian configuration. */ -#ifndef __MIPSEL__ -#error "Fix me for big endian" -#endif #define PCIMT_UCONF 0xbfff0000 #define PCIMT_IOADTIMEOUT2 0xbfff0008 #define PCIMT_IOMEMCONF 0xbfff0010 @@ -51,9 +48,9 @@ #define PCIMT_PCI_CONF 0xbfff0100 /* - * Data port for the PCI bus. + * Data port for the PCI bus in IO space */ -#define PCIMT_CONFIG_DATA 0xb4000cfc +#define PCIMT_CONFIG_DATA 0x0cfc /* * Board specific registers -- cgit v1.1