From 205c384f73e56d6b7d309b883a2064cd07ab5427 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Mon, 5 May 2014 08:05:51 +0800 Subject: serial: sirf: move to writel for TXFIFO instead of writeb All SiRFSoC UART registers are in 32-bits. If we use writeb for TXFIFO, actually all of 32-bits are still written, for TXTIFO, only low 8-bits are valid, so in prima2&atlas6, this causes no problem. But in the new atlas7, using writeb to write UART registers will cause an imprecise data abort as HW does check the "wrong" writeb. So move to writel and this also makes the code consistent with sirfsoc_uart_pio_tx_chars() in which we use writel. Signed-off-by: Barry Song Signed-off-by: Greg Kroah-Hartman --- drivers/tty/serial/sirfsoc_uart.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'drivers/tty/serial/sirfsoc_uart.h') diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h index 8a6edda..4280819 100644 --- a/drivers/tty/serial/sirfsoc_uart.h +++ b/drivers/tty/serial/sirfsoc_uart.h @@ -441,9 +441,7 @@ struct sirfsoc_uart_port { /* Register Access Control */ #define portaddr(port, reg) ((port)->membase + (reg)) -#define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg))) -#define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) /* UART Port Mask */ -- cgit v1.1