From c3310fbbeb9db6967900ed22eb3d0bd0bb0e892c Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Mon, 24 Oct 2011 11:47:57 +0200 Subject: serial: samsung: remove all uses of get_clksrc and set_clksrc With clkdev based clock lookup support, the clock set and get operation using clock names communicated between the samsung uart driver and the SoC specific extension can be removed. In addition to that, for each platform specific extension, add the default clock selection, number of clock options for uart baud generator, clock selection bit mask and shift values which is required by the clkdev support in samsung uart driver. The default clock selection value 'def_clk_sel' specifies the default clock to be used as the source clock for baud rate generator in case the platform code does not specify the same. Cc: Ben Dooks Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- drivers/tty/serial/s3c2440.c | 58 +++----------------------------------------- 1 file changed, 4 insertions(+), 54 deletions(-) (limited to 'drivers/tty/serial/s3c2440.c') diff --git a/drivers/tty/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c index 4498828..39930f8 100644 --- a/drivers/tty/serial/s3c2440.c +++ b/drivers/tty/serial/s3c2440.c @@ -25,58 +25,6 @@ #include "samsung.h" - -static int s3c2440_serial_setsource(struct uart_port *port, - struct s3c24xx_uart_clksrc *clk) -{ - unsigned long ucon = rd_regl(port, S3C2410_UCON); - - /* todo - proper fclk<>nonfclk switch. */ - - ucon &= ~S3C2440_UCON_CLKMASK; - - if (strcmp(clk->name, "uclk") == 0) - ucon |= S3C2440_UCON_UCLK; - else if (strcmp(clk->name, "pclk") == 0) - ucon |= S3C2440_UCON_PCLK; - else if (strcmp(clk->name, "fclk_n") == 0) - ucon |= S3C2440_UCON_FCLK; - else { - printk(KERN_ERR "unknown clock source %s\n", clk->name); - return -EINVAL; - } - - wr_regl(port, S3C2410_UCON, ucon); - return 0; -} - - -static int s3c2440_serial_getsource(struct uart_port *port, - struct s3c24xx_uart_clksrc *clk) -{ - unsigned long ucon = rd_regl(port, S3C2410_UCON); - - switch (ucon & S3C2440_UCON_CLKMASK) { - case S3C2440_UCON_UCLK: - clk->divisor = 1; - clk->name = "uclk"; - break; - - case S3C2440_UCON_PCLK: - case S3C2440_UCON_PCLK2: - clk->divisor = 1; - clk->name = "pclk"; - break; - - case S3C2440_UCON_FCLK: - clk->divisor = 1; - clk->name = "fclk_n"; - break; - } - - return 0; -} - static int s3c2440_serial_resetport(struct uart_port *port, struct s3c2410_uartcfg *cfg) { @@ -110,8 +58,10 @@ static struct s3c24xx_uart_info s3c2440_uart_inf = { .tx_fifofull = S3C2440_UFSTAT_TXFULL, .tx_fifomask = S3C2440_UFSTAT_TXMASK, .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, - .get_clksrc = s3c2440_serial_getsource, - .set_clksrc = s3c2440_serial_setsource, + .def_clk_sel = S3C2410_UCON_CLKSEL2, + .num_clks = 4, + .clksel_mask = S3C2440_UCON_CLKMASK, + .clksel_shift = S3C2440_UCON_CLKSHIFT, .reset_port = s3c2440_serial_resetport, }; -- cgit v1.1