From a9a18e0691228707230df660dd56364aebf6ea47 Mon Sep 17 00:00:00 2001 From: Alban Bedel Date: Wed, 14 Nov 2012 12:58:13 +0100 Subject: pwm: lpc32xx: Fix the PWM polarity The duty cycles value goes from 1 (99% HIGH) to 256 (0% HIGH) but it is stored modulo 256 in the register as it is only 8 bits wide. Signed-off-by: Alban Bedel Acked-by: Alexandre Pereira da Silva Acked-by: Roland Stigge Signed-off-by: Thierry Reding --- drivers/pwm/pwm-lpc32xx.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'drivers/pwm/pwm-lpc32xx.c') diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index adb87f0..c9b2eb5 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -49,9 +49,24 @@ static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, c = 0; /* 0 set division by 256 */ period_cycles = c; + /* The duty-cycle value is as follows: + * + * DUTY-CYCLE HIGH LEVEL + * 1 99.9% + * 25 90.0% + * 128 50.0% + * 220 10.0% + * 255 0.1% + * 0 0.0% + * + * In other words, the register value is duty-cycle % 256 with + * duty-cycle in the range 1-256. + */ c = 256 * duty_ns; do_div(c, period_ns); - duty_cycles = c; + if (c > 255) + c = 255; + duty_cycles = 256 - c; writel(PWM_ENABLE | PWM_RELOADV(period_cycles) | PWM_DUTY(duty_cycles), lpc32xx->base + (pwm->hwpwm << 2)); -- cgit v1.1 From 54b2a999a167510aa6eb54f49ef21a40946c88ba Mon Sep 17 00:00:00 2001 From: Alban Bedel Date: Wed, 14 Nov 2012 12:58:14 +0100 Subject: pwm: lpc32xx: Properly disable the clock on device removal A single clock is used for all PWMs meaning the clock's reference count might be between 0 and N when .remove() is called. Instead of a single clk_disable() call pwm_disable() on each PWM, to ensure that clk_disable() is called for each PWM that is still enabled. Signed-off-by: Alban Bedel Acked-by: Alexandre Pereira da Silva Acked-by: Roland Stigge Signed-off-by: Thierry Reding --- drivers/pwm/pwm-lpc32xx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'drivers/pwm/pwm-lpc32xx.c') diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index c9b2eb5..971874b 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -136,8 +136,11 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) static int __devexit lpc32xx_pwm_remove(struct platform_device *pdev) { struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev); + unsigned int i; + + for (i = 0; i < lpc32xx->chip.npwm; i++) + pwm_disable(&lpc32xx->chip.pwms[i]); - clk_disable(lpc32xx->clk); return pwmchip_remove(&lpc32xx->chip); } -- cgit v1.1 From 8fc6d09dcbcdb252e8b029f2a26fe303cc4649ec Mon Sep 17 00:00:00 2001 From: Alban Bedel Date: Wed, 14 Nov 2012 12:58:15 +0100 Subject: pwm: lpc32xx: Set the chip base for dynamic allocation Doing so allows the base to be allocated dynamically at runtime and makes it easier for the chip to coexist with other PWM chips. Signed-off-by: Alban Bedel Acked-by: Alexandre Pereira da Silva Acked-by: Roland Stigge Signed-off-by: Thierry Reding --- drivers/pwm/pwm-lpc32xx.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/pwm/pwm-lpc32xx.c') diff --git a/drivers/pwm/pwm-lpc32xx.c b/drivers/pwm/pwm-lpc32xx.c index 971874b..81db1bd 100644 --- a/drivers/pwm/pwm-lpc32xx.c +++ b/drivers/pwm/pwm-lpc32xx.c @@ -121,6 +121,7 @@ static int lpc32xx_pwm_probe(struct platform_device *pdev) lpc32xx->chip.dev = &pdev->dev; lpc32xx->chip.ops = &lpc32xx_pwm_ops; lpc32xx->chip.npwm = 2; + lpc32xx->chip.base = -1; ret = pwmchip_add(&lpc32xx->chip); if (ret < 0) { -- cgit v1.1