From e47ced77837153bdc962bf6f988c5da51a438568 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Tue, 2 May 2017 15:31:23 +0800 Subject: PCI: rockchip: Control vpcie0v9 for system PM vpcie0v9 is used for PHY, so we could disable it as we don't need PHY to work then in S3 if folks assign it DT. But we should note that there is a side effect that we could not support beacon wakeup if we disable vpcie0v9 for aggressive power-saving. Signed-off-by: Shawn Lin Signed-off-by: Bjorn Helgaas Cc: Brian Norris Cc: Jeffy Chen --- drivers/pci/host/pcie-rockchip.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/pci/host') diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 29332ba..5e4f758 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -1251,6 +1251,9 @@ static int __maybe_unused rockchip_pcie_suspend_noirq(struct device *dev) clk_disable_unprepare(rockchip->aclk_perf_pcie); clk_disable_unprepare(rockchip->aclk_pcie); + if (!IS_ERR(rockchip->vpcie0v9)) + regulator_disable(rockchip->vpcie0v9); + return ret; } @@ -1259,6 +1262,14 @@ static int __maybe_unused rockchip_pcie_resume_noirq(struct device *dev) struct rockchip_pcie *rockchip = dev_get_drvdata(dev); int err; + if (!IS_ERR(rockchip->vpcie0v9)) { + err = regulator_enable(rockchip->vpcie0v9); + if (err) { + dev_err(dev, "fail to enable vpcie0v9 regulator\n"); + return err; + } + } + clk_prepare_enable(rockchip->clk_pcie_pm); clk_prepare_enable(rockchip->hclk_pcie); clk_prepare_enable(rockchip->aclk_perf_pcie); -- cgit v1.1