From 70ac09358cc52f3ddbf73555dc150d486a7133bb Mon Sep 17 00:00:00 2001 From: Ulf Hansson Date: Fri, 12 Oct 2012 14:07:36 +0100 Subject: ARM: 7552/1: mmc: mmci: Switching off HWFC for SDIO depends on MCLK For writes, HWFC shall be switched off when transfer size <= 8 bytes and when MCLK rate is above 50 MHz. For 50MHz and below it shall be switched off when transfer size < 8 bytes. Signed-off-by: Ulf Hansson Acked-by: Linus Walleij Acked-by: Johan Rudholm Signed-off-by: Russell King --- drivers/mmc/host/mmci.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'drivers/mmc') diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 877079e7..cd0fbee 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -664,12 +664,14 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) datactrl |= MCI_ST_DPSM_SDIOEN; /* - * The ST Micro variant for SDIO transfer sizes - * less then 8 bytes should have clock H/W flow - * control disabled. + * The ST Micro variant for SDIO small write transfers + * needs to have clock H/W flow control disabled, + * otherwise the transfer will not start. The threshold + * depends on the rate of MCLK. */ - if ((host->size < 8) && - (data->flags & MMC_DATA_WRITE)) + if (data->flags & MMC_DATA_WRITE && + (host->size < 8 || + (host->size <= 8 && host->mclk > 50000000))) clk = host->clk_reg & ~variant->clkreg_enable; else clk = host->clk_reg | variant->clkreg_enable; -- cgit v1.1