From 44df427c894a4357e43bb35769baefa7cdf09833 Mon Sep 17 00:00:00 2001 From: Noam Camus Date: Thu, 29 Oct 2015 00:26:22 +0200 Subject: irqchip: add nps Internal and external irqchips Adding EZchip NPS400 support. Internal interrupts are handled by Multi Thread Manager (MTM) Once interrupt is serviced MTM is acked for deactivating the interrupt. External interrupts are handled by MTM as well as at Global Interrupt Controller (GIC) e.g. serial and network devices. Signed-off-by: Noam Camus Acked-by: Marc Zyngier Acked-by: Vineet Gupta Acked-by: Jason Cooper Cc: Thomas Gleixner --- drivers/irqchip/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/irqchip/Makefile') diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index b03cfcb..9d54d53 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -65,3 +65,4 @@ obj-$(CONFIG_INGENIC_IRQ) += irq-ingenic.o obj-$(CONFIG_IMX_GPCV2) += irq-imx-gpcv2.o obj-$(CONFIG_PIC32_EVIC) += irq-pic32-evic.o obj-$(CONFIG_MVEBU_ODMI) += irq-mvebu-odmi.o +obj-$(CONFIG_EZNPS_GIC) += irq-eznps.o -- cgit v1.1