From 936598d16e9111e3802d45a60c028ad36a3a7013 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Sat, 14 Oct 2017 12:02:49 +0800 Subject: drm/sun4i: backend: Add comment explaining why registers are cleared Many of the backend's layer configuration registers have undefined default values. This poses a risk as we use regmap_update_bits in some places, and don't overwrite the whole register. At probe/bind time we explicitly clear all the control registers by writing 0 to them. This patch adds a more detailed explanation on why we're doing this. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard Link: https://patchwork.freedesktop.org/patch/msgid/20171014040252.9621-5-wens@csie.org --- drivers/gpu/drm/sun4i/sun4i_backend.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm') diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c b/drivers/gpu/drm/sun4i/sun4i_backend.c index 243ddfd..4fefd8a 100644 --- a/drivers/gpu/drm/sun4i/sun4i_backend.c +++ b/drivers/gpu/drm/sun4i/sun4i_backend.c @@ -412,7 +412,14 @@ static int sun4i_backend_bind(struct device *dev, struct device *master, list_add_tail(&backend->engine.list, &drv->engine_list); - /* Reset the registers */ + /* + * Many of the backend's layer configuration registers have + * undefined default values. This poses a risk as we use + * regmap_update_bits in some places, and don't overwrite + * the whole register. + * + * Clear the registers here to have something predictable. + */ for (i = 0x800; i < 0x1000; i += 4) regmap_write(backend->engine.regs, i, 0); -- cgit v1.1