From cb42e20ea05b6e32b46b55bd7c8943969877987d Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Thu, 29 Sep 2016 18:43:57 +0200 Subject: drm/tilcdc: add a workaround for failed clk_set_rate() Some architectures don't use the common clock framework and don't implement all the clk interfaces for every clock. This is the case for da850-lcdk where clk_set_rate() only works for PLL0 and PLL1. Trying to set the clock rate for the LCDC clock results in -EINVAL being returned. As a workaround for that: if the call to clk_set_rate() fails, fall back to adjusting the clock divider instead. Proper divider value is calculated by dividing the current clock rate by the required pixel clock rate in HZ. This code is based on a hack initially developed internally for baylibre by Karl Beldan . Tested with a da850-lcdk with an LCD display connected over VGA. Signed-off-by: Bartosz Golaszewski Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 57 ++++++++++++++++++++++++++++++++---- 1 file changed, 51 insertions(+), 6 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 822531e..db2f538 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -318,23 +318,68 @@ static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc, return true; } +/* + * Calculate the percentage difference between the requested pixel clock rate + * and the effective rate resulting from calculating the clock divider value. + */ +static unsigned int tilcdc_pclk_diff(unsigned long rate, + unsigned long real_rate) +{ + int r = rate / 100, rr = real_rate / 100; + + return (unsigned int)(abs(((rr - r) * 100) / r)); +} + static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - const unsigned clkdiv = 2; /* using a fixed divider of 2 */ + unsigned long clk_rate, real_rate, req_rate; + unsigned int clkdiv; int ret; + clkdiv = 2; /* first try using a standard divider of 2 */ + /* mode.clock is in KHz, set_rate wants parameter in Hz */ - ret = clk_set_rate(priv->clk, crtc->mode.clock * 1000 * clkdiv); + req_rate = crtc->mode.clock * 1000; + + ret = clk_set_rate(priv->clk, req_rate * clkdiv); + clk_rate = clk_get_rate(priv->clk); if (ret < 0) { - dev_err(dev->dev, "failed to set display clock rate to: %d\n", - crtc->mode.clock); - return; + /* + * If we fail to set the clock rate (some architectures don't + * use the common clock framework yet and may not implement + * all the clk API calls for every clock), try the next best + * thing: adjusting the clock divider, unless clk_get_rate() + * failed as well. + */ + if (!clk_rate) { + /* Nothing more we can do. Just bail out. */ + dev_err(dev->dev, + "failed to set the pixel clock - unable to read current lcdc clock rate\n"); + return; + } + + clkdiv = DIV_ROUND_CLOSEST(clk_rate, req_rate); + + /* + * Emit a warning if the real clock rate resulting from the + * calculated divider differs much from the requested rate. + * + * 5% is an arbitrary value - LCDs are usually quite tolerant + * about pixel clock rates. + */ + real_rate = clkdiv * req_rate; + + if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) { + dev_warn(dev->dev, + "effective pixel clock rate (%luHz) differs from the calculated rate (%luHz)\n", + clk_rate, real_rate); + } } - tilcdc_crtc->lcd_fck_rate = clk_get_rate(priv->clk); + tilcdc_crtc->lcd_fck_rate = clk_rate; DBG("lcd_clk=%u, mode clock=%d, div=%u", tilcdc_crtc->lcd_fck_rate, crtc->mode.clock, clkdiv); -- cgit v1.1 From 507b72b24caec79b4687a99fe3e518ca04674e13 Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 3 Oct 2016 17:45:19 +0200 Subject: drm/tilcdc: add a da850-specific compatible string Due to some potential tweaks for the da850 LCDC (for example: the required memory bandwith settings) we need a separate compatible for the IP present on the da850 boards. Suggested-by: Sekhar Nori Signed-off-by: Bartosz Golaszewski Acked-by: Rob Herring Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 0f58a74..8f897fe 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -719,6 +719,7 @@ static int tilcdc_pdev_remove(struct platform_device *pdev) static struct of_device_id tilcdc_of_match[] = { { .compatible = "ti,am33xx-tilcdc", }, + { .compatible = "ti,da850-tilcdc", }, { }, }; MODULE_DEVICE_TABLE(of, tilcdc_of_match); -- cgit v1.1 From 4c268d635f8d4f5ac438884e781a2ebd5754c491 Mon Sep 17 00:00:00 2001 From: Daniel Schultz Date: Fri, 28 Oct 2016 13:52:41 +0200 Subject: drm/tilcdc: Add revision handling for FB_CEILING The commit d8ff0c63fbcb ("drm/tilcdc: Adjust the FB_CEILING address") added an adjustment of the FB_CEILING address. This is done by decrementing the address by one. On the AM335x (rev 0x4F201000) the framebuffer is rotated left over the display border, because the ceiling address is 8f276fff instead of 8f277000. Since this adjustment isn't necessary for the LCDC v2, the origin ceiling address should be used. Signed-off-by: Daniel Schultz Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index db2f538..06e8240d5 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -71,6 +71,7 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; struct drm_gem_cma_object *gem; dma_addr_t start, end; u64 dma_base_and_ceiling; @@ -88,7 +89,10 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) * unlikely that LCDC would fetch the DMA addresses in the middle of * an update. */ - dma_base_and_ceiling = (u64)(end - 1) << 32 | start; + if (priv->rev == 1) + end -= 1; + + dma_base_and_ceiling = (u64)end << 32 | start; tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling); if (tilcdc_crtc->curr_fb) -- cgit v1.1 From d701453bd50910abfbd9b695165068dd8c4cffdf Mon Sep 17 00:00:00 2001 From: Daniel Schultz Date: Fri, 28 Oct 2016 13:52:42 +0200 Subject: drm/tilcdc: Correct misspelling in error message This error message will be printed when a FIFO underflow irq has triggered. Since this happens sometimes and the error message will be displayed on the console, it should have a correct spelling. Signed-off-by: Daniel Schultz Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 06e8240d5..ea79e09 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -803,7 +803,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) } if (stat & LCDC_FIFO_UNDERFLOW) - dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underfow", + dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow", __func__, stat); /* For revision 2 only */ -- cgit v1.1 From 15d704e53c7d870f58558839eadfca7bcb8de5f5 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 18 Oct 2016 00:32:36 +0300 Subject: drm/tilcdc: Remove obsolete drm_connector_register() calls Remove obsolete drm_connector_register() calls from tilcdc_panel.c and tilcdc_tfp410.c. All connectors are registered when drm_dev_register() is called. Signed-off-by: Jyri Sarha Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/tilcdc/tilcdc_panel.c | 2 -- drivers/gpu/drm/tilcdc/tilcdc_tfp410.c | 2 -- 2 files changed, 4 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_panel.c b/drivers/gpu/drm/tilcdc/tilcdc_panel.c index 2134bb20..ad7a0e8 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_panel.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_panel.c @@ -240,8 +240,6 @@ static struct drm_connector *panel_connector_create(struct drm_device *dev, if (ret) goto fail; - drm_connector_register(connector); - return connector; fail: diff --git a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c index 458043a..aabfad8 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_tfp410.c @@ -249,8 +249,6 @@ static struct drm_connector *tfp410_connector_create(struct drm_device *dev, if (ret) goto fail; - drm_connector_register(connector); - return connector; fail: -- cgit v1.1 From 923310ba73d742450bb41bb017cb1b6704bd32b5 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Mon, 17 Oct 2016 17:53:33 +0300 Subject: drm/tilcdc: Stop using struct drm_driver load() callback Stop using struct drm_driver load() and unload() callbacks. The callbacks should not be used anymore. Instead of using load the drm_device is allocated with drm_dev_alloc() and registered with drm_dev_register() only after the driver is completely initialized. The deinitialization is done directly either in component unbind callback or in platform driver demove callback. Signed-off-by: Jyri Sarha Reviewed-by: Laurent Pinchart --- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 124 ++++++++++++++++++++---------------- 1 file changed, 70 insertions(+), 54 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 8f897fe..c54e92a 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -194,18 +194,22 @@ static int cpufreq_transition(struct notifier_block *nb, * DRM operations: */ -static int tilcdc_unload(struct drm_device *dev) +static void tilcdc_fini(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; - tilcdc_remove_external_encoders(dev); + drm_modeset_lock_crtc(priv->crtc, NULL); + tilcdc_crtc_disable(priv->crtc); + drm_modeset_unlock_crtc(priv->crtc); + + drm_dev_unregister(dev); - drm_fbdev_cma_fini(priv->fbdev); drm_kms_helper_poll_fini(dev); + drm_fbdev_cma_fini(priv->fbdev); + drm_irq_uninstall(dev); drm_mode_config_cleanup(dev); - drm_vblank_cleanup(dev); - drm_irq_uninstall(dev); + tilcdc_remove_external_encoders(dev); #ifdef CONFIG_CPU_FREQ cpufreq_unregister_notifier(&priv->freq_transition, @@ -225,28 +229,34 @@ static int tilcdc_unload(struct drm_device *dev) pm_runtime_disable(dev->dev); - return 0; + drm_dev_unref(dev); } -static int tilcdc_load(struct drm_device *dev, unsigned long flags) +static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) { - struct platform_device *pdev = dev->platformdev; - struct device_node *node = pdev->dev.of_node; + struct drm_device *ddev; + struct platform_device *pdev = to_platform_device(dev); + struct device_node *node = dev->of_node; struct tilcdc_drm_private *priv; struct resource *res; u32 bpp = 0; int ret; - priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL); + priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) { - dev_err(dev->dev, "failed to allocate private data\n"); + dev_err(dev, "failed to allocate private data\n"); return -ENOMEM; } - dev->dev_private = priv; + ddev = drm_dev_alloc(ddrv, dev); + if (IS_ERR(ddev)) + return PTR_ERR(ddev); + + ddev->platformdev = pdev; + ddev->dev_private = priv; priv->is_componentized = - tilcdc_get_external_components(dev->dev, NULL) > 0; + tilcdc_get_external_components(dev, NULL) > 0; priv->wq = alloc_ordered_workqueue("tilcdc", 0); if (!priv->wq) { @@ -256,21 +266,21 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { - dev_err(dev->dev, "failed to get memory resource\n"); + dev_err(dev, "failed to get memory resource\n"); ret = -EINVAL; goto fail_free_wq; } priv->mmio = ioremap_nocache(res->start, resource_size(res)); if (!priv->mmio) { - dev_err(dev->dev, "failed to ioremap\n"); + dev_err(dev, "failed to ioremap\n"); ret = -ENOMEM; goto fail_free_wq; } - priv->clk = clk_get(dev->dev, "fck"); + priv->clk = clk_get(dev, "fck"); if (IS_ERR(priv->clk)) { - dev_err(dev->dev, "failed to get functional clock\n"); + dev_err(dev, "failed to get functional clock\n"); ret = -ENODEV; goto fail_iounmap; } @@ -280,7 +290,7 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) ret = cpufreq_register_notifier(&priv->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); if (ret) { - dev_err(dev->dev, "failed to register cpufreq notifier\n"); + dev_err(dev, "failed to register cpufreq notifier\n"); goto fail_put_clk; } #endif @@ -301,11 +311,11 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); - pm_runtime_enable(dev->dev); + pm_runtime_enable(dev); /* Determine LCD IP Version */ - pm_runtime_get_sync(dev->dev); - switch (tilcdc_read(dev, LCDC_PID_REG)) { + pm_runtime_get_sync(dev); + switch (tilcdc_read(ddev, LCDC_PID_REG)) { case 0x4c100102: priv->rev = 1; break; @@ -314,14 +324,14 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) priv->rev = 2; break; default: - dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, " - "defaulting to LCD revision 1\n", - tilcdc_read(dev, LCDC_PID_REG)); + dev_warn(dev, "Unknown PID Reg value 0x%08x, " + "defaulting to LCD revision 1\n", + tilcdc_read(ddev, LCDC_PID_REG)); priv->rev = 1; break; } - pm_runtime_put_sync(dev->dev); + pm_runtime_put_sync(dev); if (priv->rev == 1) { DBG("Revision 1 LCDC supports only RGB565 format"); @@ -354,74 +364,82 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) } } - ret = modeset_init(dev); + ret = modeset_init(ddev); if (ret < 0) { - dev_err(dev->dev, "failed to initialize mode setting\n"); + dev_err(dev, "failed to initialize mode setting\n"); goto fail_cpufreq_unregister; } - platform_set_drvdata(pdev, dev); + platform_set_drvdata(pdev, ddev); if (priv->is_componentized) { - ret = component_bind_all(dev->dev, dev); + ret = component_bind_all(dev, ddev); if (ret < 0) goto fail_mode_config_cleanup; - ret = tilcdc_add_external_encoders(dev); + ret = tilcdc_add_external_encoders(ddev); if (ret < 0) goto fail_component_cleanup; } if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) { - dev_err(dev->dev, "no encoders/connectors found\n"); + dev_err(dev, "no encoders/connectors found\n"); ret = -ENXIO; goto fail_external_cleanup; } - ret = drm_vblank_init(dev, 1); + ret = drm_vblank_init(ddev, 1); if (ret < 0) { - dev_err(dev->dev, "failed to initialize vblank\n"); + dev_err(dev, "failed to initialize vblank\n"); goto fail_external_cleanup; } - ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0)); + ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); if (ret < 0) { - dev_err(dev->dev, "failed to install IRQ handler\n"); + dev_err(dev, "failed to install IRQ handler\n"); goto fail_vblank_cleanup; } - drm_mode_config_reset(dev); + drm_mode_config_reset(ddev); - priv->fbdev = drm_fbdev_cma_init(dev, bpp, - dev->mode_config.num_crtc, - dev->mode_config.num_connector); + priv->fbdev = drm_fbdev_cma_init(ddev, bpp, + ddev->mode_config.num_crtc, + ddev->mode_config.num_connector); if (IS_ERR(priv->fbdev)) { ret = PTR_ERR(priv->fbdev); goto fail_irq_uninstall; } - drm_kms_helper_poll_init(dev); + drm_kms_helper_poll_init(ddev); + + ret = drm_dev_register(ddev, 0); + if (ret) + goto fail_platform_init; return 0; +fail_platform_init: + drm_kms_helper_poll_fini(ddev); + drm_fbdev_cma_fini(priv->fbdev); + fail_irq_uninstall: - drm_irq_uninstall(dev); + drm_irq_uninstall(ddev); fail_vblank_cleanup: - drm_vblank_cleanup(dev); + drm_vblank_cleanup(ddev); fail_component_cleanup: if (priv->is_componentized) - component_unbind_all(dev->dev, dev); + component_unbind_all(dev, dev); fail_mode_config_cleanup: - drm_mode_config_cleanup(dev); + drm_mode_config_cleanup(ddev); fail_external_cleanup: - tilcdc_remove_external_encoders(dev); + tilcdc_remove_external_encoders(ddev); fail_cpufreq_unregister: - pm_runtime_disable(dev->dev); + pm_runtime_disable(dev); #ifdef CONFIG_CPU_FREQ cpufreq_unregister_notifier(&priv->freq_transition, CPUFREQ_TRANSITION_NOTIFIER); @@ -438,7 +456,8 @@ fail_free_wq: destroy_workqueue(priv->wq); fail_unset_priv: - dev->dev_private = NULL; + ddev->dev_private = NULL; + drm_dev_unref(ddev); return ret; } @@ -583,8 +602,6 @@ static const struct file_operations fops = { static struct drm_driver tilcdc_driver = { .driver_features = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_ATOMIC), - .load = tilcdc_load, - .unload = tilcdc_unload, .lastclose = tilcdc_lastclose, .irq_handler = tilcdc_irq, .get_vblank_counter = drm_vblank_no_hw_counter, @@ -658,10 +675,9 @@ static const struct dev_pm_ops tilcdc_pm_ops = { /* * Platform driver: */ - static int tilcdc_bind(struct device *dev) { - return drm_platform_init(&tilcdc_driver, to_platform_device(dev)); + return tilcdc_init(&tilcdc_driver, dev); } static void tilcdc_unbind(struct device *dev) @@ -672,7 +688,7 @@ static void tilcdc_unbind(struct device *dev) if (!ddev->dev_private) return; - drm_put_dev(dev_get_drvdata(dev)); + tilcdc_fini(dev_get_drvdata(dev)); } static const struct component_master_ops tilcdc_comp_ops = { @@ -695,7 +711,7 @@ static int tilcdc_pdev_probe(struct platform_device *pdev) if (ret < 0) return ret; else if (ret == 0) - return drm_platform_init(&tilcdc_driver, pdev); + return tilcdc_init(&tilcdc_driver, &pdev->dev); else return component_master_add_with_match(&pdev->dev, &tilcdc_comp_ops, @@ -710,7 +726,7 @@ static int tilcdc_pdev_remove(struct platform_device *pdev) if (ret < 0) return ret; else if (ret == 0) - drm_put_dev(platform_get_drvdata(pdev)); + tilcdc_fini(platform_get_drvdata(pdev)); else component_master_del(&pdev->dev, &tilcdc_comp_ops); -- cgit v1.1 From 9e79e062dc9b3aed541d6e47ac178aff815ab0e8 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 18 Oct 2016 23:23:27 +0300 Subject: drm/tilcdc: Use unload to handle initialization failures Use unload to handle initialization failures instead of complex goto label mess. To do this the initialization sequence needed slight reordering and some unload functions needed to become conditional. Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 10 ++-- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 101 ++++++++++++----------------------- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 3 +- 3 files changed, 43 insertions(+), 71 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index ea79e09..6277363 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -177,14 +177,12 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) tilcdc_crtc->enabled = true; } -void tilcdc_crtc_disable(struct drm_crtc *crtc) +void tilcdc_crtc_off(struct drm_crtc *crtc) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; - WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - if (!tilcdc_crtc->enabled) return; @@ -228,6 +226,12 @@ void tilcdc_crtc_disable(struct drm_crtc *crtc) tilcdc_crtc->enabled = false; } +static void tilcdc_crtc_disable(struct drm_crtc *crtc) +{ + WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); + tilcdc_crtc_off(crtc); +} + static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) { return crtc->state && crtc->state->enable && crtc->state->active; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index c54e92a..48757f1 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -158,8 +158,6 @@ static int modeset_init(struct drm_device *dev) struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_module *mod; - drm_mode_config_init(dev); - priv->crtc = tilcdc_crtc_create(dev); list_for_each_entry(mod, &module_list, list) { @@ -198,22 +196,25 @@ static void tilcdc_fini(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; - drm_modeset_lock_crtc(priv->crtc, NULL); - tilcdc_crtc_disable(priv->crtc); - drm_modeset_unlock_crtc(priv->crtc); + if (priv->crtc) + tilcdc_crtc_off(priv->crtc); - drm_dev_unregister(dev); + if (priv->is_registered) + drm_dev_unregister(dev); drm_kms_helper_poll_fini(dev); - drm_fbdev_cma_fini(priv->fbdev); + + if (priv->fbdev) + drm_fbdev_cma_fini(priv->fbdev); + drm_irq_uninstall(dev); drm_mode_config_cleanup(dev); - tilcdc_remove_external_encoders(dev); #ifdef CONFIG_CPU_FREQ - cpufreq_unregister_notifier(&priv->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); + if (priv->freq_transition.notifier_call) + cpufreq_unregister_notifier(&priv->freq_transition, + CPUFREQ_TRANSITION_NOTIFIER); #endif if (priv->clk) @@ -222,8 +223,10 @@ static void tilcdc_fini(struct drm_device *dev) if (priv->mmio) iounmap(priv->mmio); - flush_workqueue(priv->wq); - destroy_workqueue(priv->wq); + if (priv->wq) { + flush_workqueue(priv->wq); + destroy_workqueue(priv->wq); + } dev->dev_private = NULL; @@ -254,6 +257,8 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) ddev->platformdev = pdev; ddev->dev_private = priv; + platform_set_drvdata(pdev, ddev); + drm_mode_config_init(ddev); priv->is_componentized = tilcdc_get_external_components(dev, NULL) > 0; @@ -261,28 +266,28 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) priv->wq = alloc_ordered_workqueue("tilcdc", 0); if (!priv->wq) { ret = -ENOMEM; - goto fail_unset_priv; + goto init_failed; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { dev_err(dev, "failed to get memory resource\n"); ret = -EINVAL; - goto fail_free_wq; + goto init_failed; } priv->mmio = ioremap_nocache(res->start, resource_size(res)); if (!priv->mmio) { dev_err(dev, "failed to ioremap\n"); ret = -ENOMEM; - goto fail_free_wq; + goto init_failed; } priv->clk = clk_get(dev, "fck"); if (IS_ERR(priv->clk)) { dev_err(dev, "failed to get functional clock\n"); ret = -ENODEV; - goto fail_iounmap; + goto init_failed; } #ifdef CONFIG_CPU_FREQ @@ -291,7 +296,8 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) CPUFREQ_TRANSITION_NOTIFIER); if (ret) { dev_err(dev, "failed to register cpufreq notifier\n"); - goto fail_put_clk; + priv->freq_transition.notifier_call = NULL; + goto init_failed; } #endif @@ -367,37 +373,35 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) ret = modeset_init(ddev); if (ret < 0) { dev_err(dev, "failed to initialize mode setting\n"); - goto fail_cpufreq_unregister; + goto init_failed; } - platform_set_drvdata(pdev, ddev); - if (priv->is_componentized) { ret = component_bind_all(dev, ddev); if (ret < 0) - goto fail_mode_config_cleanup; + goto init_failed; ret = tilcdc_add_external_encoders(ddev); if (ret < 0) - goto fail_component_cleanup; + goto init_failed; } if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) { dev_err(dev, "no encoders/connectors found\n"); ret = -ENXIO; - goto fail_external_cleanup; + goto init_failed; } ret = drm_vblank_init(ddev, 1); if (ret < 0) { dev_err(dev, "failed to initialize vblank\n"); - goto fail_external_cleanup; + goto init_failed; } ret = drm_irq_install(ddev, platform_get_irq(pdev, 0)); if (ret < 0) { dev_err(dev, "failed to install IRQ handler\n"); - goto fail_vblank_cleanup; + goto init_failed; } drm_mode_config_reset(ddev); @@ -407,57 +411,20 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) ddev->mode_config.num_connector); if (IS_ERR(priv->fbdev)) { ret = PTR_ERR(priv->fbdev); - goto fail_irq_uninstall; + goto init_failed; } drm_kms_helper_poll_init(ddev); ret = drm_dev_register(ddev, 0); if (ret) - goto fail_platform_init; + goto init_failed; + priv->is_registered = true; return 0; -fail_platform_init: - drm_kms_helper_poll_fini(ddev); - drm_fbdev_cma_fini(priv->fbdev); - -fail_irq_uninstall: - drm_irq_uninstall(ddev); - -fail_vblank_cleanup: - drm_vblank_cleanup(ddev); - -fail_component_cleanup: - if (priv->is_componentized) - component_unbind_all(dev, dev); - -fail_mode_config_cleanup: - drm_mode_config_cleanup(ddev); - -fail_external_cleanup: - tilcdc_remove_external_encoders(ddev); - -fail_cpufreq_unregister: - pm_runtime_disable(dev); -#ifdef CONFIG_CPU_FREQ - cpufreq_unregister_notifier(&priv->freq_transition, - CPUFREQ_TRANSITION_NOTIFIER); - -fail_put_clk: -#endif - clk_put(priv->clk); - -fail_iounmap: - iounmap(priv->mmio); - -fail_free_wq: - flush_workqueue(priv->wq); - destroy_workqueue(priv->wq); - -fail_unset_priv: - ddev->dev_private = NULL; - drm_dev_unref(ddev); +init_failed: + tilcdc_fini(ddev); return ret; } diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 9780c37..7db23f2 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -89,6 +89,7 @@ struct tilcdc_drm_private { struct drm_connector *connectors[8]; const struct drm_connector_helper_funcs *connector_funcs[8]; + bool is_registered; bool is_componentized; }; @@ -172,7 +173,7 @@ void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, bool simulate_vesa_sync); int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode); int tilcdc_crtc_max_width(struct drm_crtc *crtc); -void tilcdc_crtc_disable(struct drm_crtc *crtc); +void tilcdc_crtc_off(struct drm_crtc *crtc); int tilcdc_crtc_update_fb(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event); -- cgit v1.1 From 2d53a18098e5a03a30b1b1419ab4103357b69f0d Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 25 Oct 2016 12:27:31 +0300 Subject: drm/tilcdc: Fix race from forced shutdown of crtc in unload Fix race from forced shutdown of crtc in unload by adding internal locking and a boolean telling if device is going to be shutdown. Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 29 +++++++++++++++++++++++------ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 2 +- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 3 ++- 3 files changed, 26 insertions(+), 8 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 6277363..0d09acc 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -33,7 +33,9 @@ struct tilcdc_crtc { struct drm_plane primary; const struct tilcdc_panel_info *info; struct drm_pending_vblank_event *event; + struct mutex enable_lock; bool enabled; + bool shutdown; wait_queue_head_t frame_done_wq; bool frame_done; spinlock_t irq_lock; @@ -158,9 +160,11 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - - if (tilcdc_crtc->enabled) + mutex_lock(&tilcdc_crtc->enable_lock); + if (tilcdc_crtc->enabled || tilcdc_crtc->shutdown) { + mutex_unlock(&tilcdc_crtc->enable_lock); return; + } pm_runtime_get_sync(dev->dev); @@ -175,17 +179,22 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) drm_crtc_vblank_on(crtc); tilcdc_crtc->enabled = true; + mutex_unlock(&tilcdc_crtc->enable_lock); } -void tilcdc_crtc_off(struct drm_crtc *crtc) +static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; - if (!tilcdc_crtc->enabled) + mutex_lock(&tilcdc_crtc->enable_lock); + if (shutdown) + tilcdc_crtc->shutdown = true; + if (!tilcdc_crtc->enabled) { + mutex_unlock(&tilcdc_crtc->enable_lock); return; - + } tilcdc_crtc->frame_done = false; tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); @@ -224,12 +233,18 @@ void tilcdc_crtc_off(struct drm_crtc *crtc) tilcdc_crtc->last_vblank = ktime_set(0, 0); tilcdc_crtc->enabled = false; + mutex_unlock(&tilcdc_crtc->enable_lock); } static void tilcdc_crtc_disable(struct drm_crtc *crtc) { WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - tilcdc_crtc_off(crtc); + tilcdc_crtc_off(crtc, false); +} + +void tilcdc_crtc_shutdown(struct drm_crtc *crtc) +{ + tilcdc_crtc_off(crtc, true); } static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) @@ -857,6 +872,8 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) if (ret < 0) goto fail; + mutex_init(&tilcdc_crtc->enable_lock); + init_waitqueue_head(&tilcdc_crtc->frame_done_wq); drm_flip_work_init(&tilcdc_crtc->unref_work, diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 48757f1..3d2cea0 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -197,7 +197,7 @@ static void tilcdc_fini(struct drm_device *dev) struct tilcdc_drm_private *priv = dev->dev_private; if (priv->crtc) - tilcdc_crtc_off(priv->crtc); + tilcdc_crtc_shutdown(priv->crtc); if (priv->is_registered) drm_dev_unregister(dev); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 7db23f2..d31fe5d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -33,6 +33,7 @@ #include #include #include +#include /* Defaulting to pixel clock defined on AM335x */ #define TILCDC_DEFAULT_MAX_PIXELCLOCK 126000 @@ -173,7 +174,7 @@ void tilcdc_crtc_set_simulate_vesa_sync(struct drm_crtc *crtc, bool simulate_vesa_sync); int tilcdc_crtc_mode_valid(struct drm_crtc *crtc, struct drm_display_mode *mode); int tilcdc_crtc_max_width(struct drm_crtc *crtc); -void tilcdc_crtc_off(struct drm_crtc *crtc); +void tilcdc_crtc_shutdown(struct drm_crtc *crtc); int tilcdc_crtc_update_fb(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event); -- cgit v1.1 From 13b3d72705817cdcf003226dd9f22f3ecee64ba4 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Wed, 6 Apr 2016 14:02:38 +0300 Subject: drm/tilcdc: Recover from sync lost error flood by resetting the LCDC Recover from sync lost error flood by resetting the LCDC instead of turning off the SYNC_LOST error IRQ. When LCDC starves on limited memory bandwidth it may sometimes result an error situation when the picture may have shifted couple of pixels to right and SYNC_LOST interrupt is generated on every frame. LCDC main reset recovers from this situation and causes a brief blanking on the screen. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 0d09acc..c787349 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -55,6 +55,7 @@ struct tilcdc_crtc { int sync_lost_count; bool frame_intact; + struct work_struct recover_work; }; #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base) @@ -252,6 +253,25 @@ static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) return crtc->state && crtc->state->enable && crtc->state->active; } +static void tilcdc_crtc_recover_work(struct work_struct *work) +{ + struct tilcdc_crtc *tilcdc_crtc = + container_of(work, struct tilcdc_crtc, recover_work); + struct drm_crtc *crtc = &tilcdc_crtc->base; + + dev_info(crtc->dev->dev, "%s: Reset CRTC", __func__); + + drm_modeset_lock_crtc(crtc, NULL); + + if (!tilcdc_crtc_is_on(crtc)) + goto out; + + tilcdc_crtc_disable(crtc); + tilcdc_crtc_enable(crtc); +out: + drm_modeset_unlock_crtc(crtc); +} + static void tilcdc_crtc_destroy(struct drm_crtc *crtc) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); @@ -838,9 +858,12 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) tilcdc_crtc->frame_intact = false; if (tilcdc_crtc->sync_lost_count++ > SYNC_LOST_COUNT_LIMIT) { - dev_err(dev->dev, "%s(0x%08x): Sync lost flood detected, disabling the interrupt", __func__, stat); + dev_err(dev->dev, "%s(0x%08x): Sync lost flood detected, recovering", __func__, stat); + queue_work(system_wq, + &tilcdc_crtc->recover_work); tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_SYNC_LOST); + tilcdc_crtc->sync_lost_count = 0; } } @@ -880,6 +903,7 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) "unref", unref_worker); spin_lock_init(&tilcdc_crtc->irq_lock); + INIT_WORK(&tilcdc_crtc->recover_work, tilcdc_crtc_recover_work); ret = drm_crtc_init_with_planes(dev, crtc, &tilcdc_crtc->primary, -- cgit v1.1 From ec9eab097a50040c743fe612c4635fd8ea5c5936 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Mon, 31 Oct 2016 17:34:22 +0200 Subject: drm/tilcdc: Add drm bridge support for attaching drm bridge drivers Adds drm bride support for attaching drm bridge drivers to tilcdc. The decision whether a video port leads to an external encoder or bridge is made simply based on remote device's compatible string. The code has been tested with BeagleBone-Black with and without BeagleBone DVI-D Cape Rev A3 using ti-tfp410 driver. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 11 +- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 5 +- drivers/gpu/drm/tilcdc/tilcdc_external.c | 260 +++++++++++++++++++++++-------- drivers/gpu/drm/tilcdc/tilcdc_external.h | 5 +- 4 files changed, 207 insertions(+), 74 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 3d2cea0..7f4d3bc 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -209,7 +209,7 @@ static void tilcdc_fini(struct drm_device *dev) drm_irq_uninstall(dev); drm_mode_config_cleanup(dev); - tilcdc_remove_external_encoders(dev); + tilcdc_remove_external_device(dev); #ifdef CONFIG_CPU_FREQ if (priv->freq_transition.notifier_call) @@ -381,12 +381,17 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) if (ret < 0) goto init_failed; - ret = tilcdc_add_external_encoders(ddev); + ret = tilcdc_add_component_encoder(ddev); if (ret < 0) goto init_failed; + } else { + ret = tilcdc_attach_external_device(ddev); + if (ret) + goto init_failed; } - if ((priv->num_encoders == 0) || (priv->num_connectors == 0)) { + if (!priv->external_connector && + ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { dev_err(dev, "no encoders/connectors found\n"); ret = -ENXIO; goto init_failed; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index d31fe5d..411f8a8 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -88,7 +88,10 @@ struct tilcdc_drm_private { unsigned int num_connectors; struct drm_connector *connectors[8]; - const struct drm_connector_helper_funcs *connector_funcs[8]; + + struct drm_encoder *external_encoder; + struct drm_connector *external_connector; + const struct drm_connector_helper_funcs *connector_funcs; bool is_registered; bool is_componentized; diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.c b/drivers/gpu/drm/tilcdc/tilcdc_external.c index 06a4c58..c67d7cd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_external.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.c @@ -28,44 +28,50 @@ static const struct tilcdc_panel_info panel_info_tda998x = { .raster_order = 0, }; +static const struct tilcdc_panel_info panel_info_default = { + .ac_bias = 255, + .ac_bias_intrpt = 0, + .dma_burst_sz = 16, + .bpp = 16, + .fdd = 0x80, + .tft_alt_mode = 0, + .sync_edge = 0, + .sync_ctrl = 1, + .raster_order = 0, +}; + static int tilcdc_external_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct tilcdc_drm_private *priv = connector->dev->dev_private; - int ret, i; + int ret; ret = tilcdc_crtc_mode_valid(priv->crtc, mode); if (ret != MODE_OK) return ret; - for (i = 0; i < priv->num_connectors && - priv->connectors[i] != connector; i++) - ; - - BUG_ON(priv->connectors[i] != connector); - BUG_ON(!priv->connector_funcs[i]); + BUG_ON(priv->external_connector != connector); + BUG_ON(!priv->connector_funcs); /* If the connector has its own mode_valid call it. */ - if (!IS_ERR(priv->connector_funcs[i]) && - priv->connector_funcs[i]->mode_valid) - return priv->connector_funcs[i]->mode_valid(connector, mode); + if (!IS_ERR(priv->connector_funcs) && + priv->connector_funcs->mode_valid) + return priv->connector_funcs->mode_valid(connector, mode); return MODE_OK; } -static int tilcdc_add_external_encoder(struct drm_device *dev, - struct drm_connector *connector) +static int tilcdc_add_external_connector(struct drm_device *dev, + struct drm_connector *connector) { struct tilcdc_drm_private *priv = dev->dev_private; struct drm_connector_helper_funcs *connector_funcs; - priv->connectors[priv->num_connectors] = connector; - priv->encoders[priv->num_encoders++] = connector->encoder; - - /* Only tda998x is supported at the moment. */ - tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true); - tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x); + /* There should never be more than one connector */ + if (WARN_ON(priv->external_connector)) + return -EINVAL; + priv->external_connector = connector; connector_funcs = devm_kzalloc(dev->dev, sizeof(*connector_funcs), GFP_KERNEL); if (!connector_funcs) @@ -78,56 +84,177 @@ static int tilcdc_add_external_encoder(struct drm_device *dev, * everything else but use our own mode_valid() (above). */ if (connector->helper_private) { - priv->connector_funcs[priv->num_connectors] = - connector->helper_private; - *connector_funcs = *priv->connector_funcs[priv->num_connectors]; + priv->connector_funcs = connector->helper_private; + *connector_funcs = *priv->connector_funcs; } else { - priv->connector_funcs[priv->num_connectors] = ERR_PTR(-ENOENT); + priv->connector_funcs = ERR_PTR(-ENOENT); } connector_funcs->mode_valid = tilcdc_external_mode_valid; drm_connector_helper_add(connector, connector_funcs); - priv->num_connectors++; - dev_dbg(dev->dev, "External encoder '%s' connected\n", - connector->encoder->name); + dev_dbg(dev->dev, "External connector '%s' connected\n", + connector->name); return 0; } -int tilcdc_add_external_encoders(struct drm_device *dev) +static +struct drm_connector *tilcdc_encoder_find_connector(struct drm_device *ddev, + struct drm_encoder *encoder) { - struct tilcdc_drm_private *priv = dev->dev_private; struct drm_connector *connector; - int num_internal_connectors = priv->num_connectors; - - list_for_each_entry(connector, &dev->mode_config.connector_list, head) { - bool found = false; - int i, ret; - - for (i = 0; i < num_internal_connectors; i++) - if (connector == priv->connectors[i]) - found = true; - if (!found) { - ret = tilcdc_add_external_encoder(dev, connector); - if (ret) - return ret; - } + int i; + + list_for_each_entry(connector, &ddev->mode_config.connector_list, head) + for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) + if (connector->encoder_ids[i] == encoder->base.id) + return connector; + + dev_err(ddev->dev, "No connector found for %s encoder (id %d)\n", + encoder->name, encoder->base.id); + + return NULL; +} + +int tilcdc_add_component_encoder(struct drm_device *ddev) +{ + struct tilcdc_drm_private *priv = ddev->dev_private; + struct drm_connector *connector; + struct drm_encoder *encoder; + + list_for_each_entry(encoder, &ddev->mode_config.encoder_list, head) + if (encoder->possible_crtcs & (1 << priv->crtc->index)) + break; + + if (!encoder) { + dev_err(ddev->dev, "%s: No suitable encoder found\n", __func__); + return -ENODEV; } - return 0; + + connector = tilcdc_encoder_find_connector(ddev, encoder); + + if (!connector) + return -ENODEV; + + /* Only tda998x is supported at the moment. */ + tilcdc_crtc_set_simulate_vesa_sync(priv->crtc, true); + tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_tda998x); + + return tilcdc_add_external_connector(ddev, connector); } -void tilcdc_remove_external_encoders(struct drm_device *dev) +void tilcdc_remove_external_device(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; - int i; /* Restore the original helper functions, if any. */ - for (i = 0; i < priv->num_connectors; i++) - if (IS_ERR(priv->connector_funcs[i])) - drm_connector_helper_add(priv->connectors[i], NULL); - else if (priv->connector_funcs[i]) - drm_connector_helper_add(priv->connectors[i], - priv->connector_funcs[i]); + if (IS_ERR(priv->connector_funcs)) + drm_connector_helper_add(priv->external_connector, NULL); + else if (priv->connector_funcs) + drm_connector_helper_add(priv->external_connector, + priv->connector_funcs); +} + +static const struct drm_encoder_funcs tilcdc_external_encoder_funcs = { + .destroy = drm_encoder_cleanup, +}; + +static +int tilcdc_attach_bridge(struct drm_device *ddev, struct drm_bridge *bridge) +{ + struct tilcdc_drm_private *priv = ddev->dev_private; + struct drm_connector *connector; + int ret; + + priv->external_encoder->possible_crtcs = BIT(0); + priv->external_encoder->bridge = bridge; + bridge->encoder = priv->external_encoder; + + ret = drm_bridge_attach(ddev, bridge); + if (ret) { + dev_err(ddev->dev, "drm_bridge_attach() failed %d\n", ret); + return ret; + } + + tilcdc_crtc_set_panel_info(priv->crtc, &panel_info_default); + + connector = tilcdc_encoder_find_connector(ddev, priv->external_encoder); + if (!connector) + return -ENODEV; + + ret = tilcdc_add_external_connector(ddev, connector); + + return ret; +} + +static int tilcdc_node_has_port(struct device_node *dev_node) +{ + struct device_node *node; + + node = of_get_child_by_name(dev_node, "ports"); + if (!node) + node = of_get_child_by_name(dev_node, "port"); + if (!node) + return 0; + of_node_put(node); + + return 1; +} + +static +struct device_node *tilcdc_get_remote_node(struct device_node *node) +{ + struct device_node *ep; + struct device_node *parent; + + if (!tilcdc_node_has_port(node)) + return NULL; + + ep = of_graph_get_next_endpoint(node, NULL); + if (!ep) + return NULL; + + parent = of_graph_get_remote_port_parent(ep); + of_node_put(ep); + + return parent; +} + +int tilcdc_attach_external_device(struct drm_device *ddev) +{ + struct tilcdc_drm_private *priv = ddev->dev_private; + struct device_node *remote_node; + struct drm_bridge *bridge; + int ret; + + remote_node = tilcdc_get_remote_node(ddev->dev->of_node); + if (!remote_node) + return 0; + + bridge = of_drm_find_bridge(remote_node); + of_node_put(remote_node); + if (!bridge) + return -EPROBE_DEFER; + + priv->external_encoder = devm_kzalloc(ddev->dev, + sizeof(*priv->external_encoder), + GFP_KERNEL); + if (!priv->external_encoder) + return -ENOMEM; + + ret = drm_encoder_init(ddev, priv->external_encoder, + &tilcdc_external_encoder_funcs, + DRM_MODE_ENCODER_NONE, NULL); + if (ret) { + dev_err(ddev->dev, "drm_encoder_init() failed %d\n", ret); + return ret; + } + + ret = tilcdc_attach_bridge(ddev, bridge); + if (ret) + drm_encoder_cleanup(priv->external_encoder); + + return ret; } static int dev_match_of(struct device *dev, void *data) @@ -141,16 +268,10 @@ int tilcdc_get_external_components(struct device *dev, struct device_node *node; struct device_node *ep = NULL; int count = 0; + int ret = 0; - /* Avoid error print by of_graph_get_next_endpoint() if there - * is no ports present. - */ - node = of_get_child_by_name(dev->of_node, "ports"); - if (!node) - node = of_get_child_by_name(dev->of_node, "port"); - if (!node) + if (!tilcdc_node_has_port(dev->of_node)) return 0; - of_node_put(node); while ((ep = of_graph_get_next_endpoint(dev->of_node, ep))) { node = of_graph_get_remote_port_parent(ep); @@ -160,17 +281,20 @@ int tilcdc_get_external_components(struct device *dev, } dev_dbg(dev, "Subdevice node '%s' found\n", node->name); - if (match) - drm_of_component_match_add(dev, match, dev_match_of, - node); - of_node_put(node); - count++; - } - if (count > 1) { - dev_err(dev, "Only one external encoder is supported\n"); - return -EINVAL; + if (of_device_is_compatible(node, "nxp,tda998x")) { + if (match) + drm_of_component_match_add(dev, match, + dev_match_of, node); + ret = 1; + } + + of_node_put(node); + if (count++ > 1) { + dev_err(dev, "Only one port is supported\n"); + return -EINVAL; + } } - return count; + return ret; } diff --git a/drivers/gpu/drm/tilcdc/tilcdc_external.h b/drivers/gpu/drm/tilcdc/tilcdc_external.h index c700e0c..763d18f 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_external.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_external.h @@ -18,8 +18,9 @@ #ifndef __TILCDC_EXTERNAL_H__ #define __TILCDC_EXTERNAL_H__ -int tilcdc_add_external_encoders(struct drm_device *dev); -void tilcdc_remove_external_encoders(struct drm_device *dev); +int tilcdc_add_component_encoder(struct drm_device *dev); +void tilcdc_remove_external_device(struct drm_device *dev); int tilcdc_get_external_components(struct device *dev, struct component_match **match); +int tilcdc_attach_external_device(struct drm_device *ddev); #endif /* __TILCDC_SLAVE_H__ */ -- cgit v1.1 From cba8844a687e444f8af694f453de501c6e92e54d Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Wed, 16 Nov 2016 00:12:27 +0200 Subject: drm/tilcdc: Enable sync lost error and recovery handling for rev 1 LCDC Revision 1 LCDC support also sync lost errors and can benefit from sync lost recovery routine. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 35 ++++++++++++++++++++--------------- drivers/gpu/drm/tilcdc/tilcdc_regs.h | 1 + 2 files changed, 21 insertions(+), 15 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index c787349..0169240 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -113,6 +113,7 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev) if (priv->rev == 1) { tilcdc_set(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_UNDERFLOW_INT_ENA); tilcdc_set(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); @@ -131,6 +132,7 @@ static void tilcdc_crtc_disable_irqs(struct drm_device *dev) /* disable irqs that we might have enabled: */ if (priv->rev == 1) { tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); @@ -845,6 +847,24 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow", __func__, stat); + if (stat & LCDC_SYNC_LOST) { + dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", + __func__, stat); + tilcdc_crtc->frame_intact = false; + if (tilcdc_crtc->sync_lost_count++ > + SYNC_LOST_COUNT_LIMIT) { + dev_err(dev->dev, "%s(0x%08x): Sync lost flood detected, recovering", __func__, stat); + queue_work(system_wq, &tilcdc_crtc->recover_work); + if (priv->rev == 1) + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_SYNC_LOST_INT_ENA); + else + tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, + LCDC_SYNC_LOST); + tilcdc_crtc->sync_lost_count = 0; + } + } + /* For revision 2 only */ if (priv->rev == 2) { if (stat & LCDC_FRAME_DONE) { @@ -852,21 +872,6 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) wake_up(&tilcdc_crtc->frame_done_wq); } - if (stat & LCDC_SYNC_LOST) { - dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", - __func__, stat); - tilcdc_crtc->frame_intact = false; - if (tilcdc_crtc->sync_lost_count++ > - SYNC_LOST_COUNT_LIMIT) { - dev_err(dev->dev, "%s(0x%08x): Sync lost flood detected, recovering", __func__, stat); - queue_work(system_wq, - &tilcdc_crtc->recover_work); - tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, - LCDC_SYNC_LOST); - tilcdc_crtc->sync_lost_count = 0; - } - } - /* Indicate to LCDC that the interrupt service routine has * completed, see 13.3.6.1.6 in AM335x TRM. */ diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h b/drivers/gpu/drm/tilcdc/tilcdc_regs.h index f57c0d6..d195b65 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h @@ -61,6 +61,7 @@ #define LCDC_V2_UNDERFLOW_INT_ENA BIT(5) #define LCDC_V1_PL_INT_ENA BIT(4) #define LCDC_V2_PL_INT_ENA BIT(6) +#define LCDC_V1_SYNC_LOST_INT_ENA BIT(5) #define LCDC_MONOCHROME_MODE BIT(1) #define LCDC_RASTER_ENABLE BIT(0) #define LCDC_TFT_ALT_ENABLE BIT(23) -- cgit v1.1 From 9345235e9c67c216af000631ba898c21e5a3f30d Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 31 Oct 2016 15:19:26 +0100 Subject: drm/tilcdc: implement palette loading for rev1 Revision 1 of the IP doesn't work if we don't load the palette (even if it's not used, which is the case for the RGB565 format). Add a function called from tilcdc_crtc_enable() which performs all required actions if we're dealing with a rev1 chip. Signed-off-by: Bartosz Golaszewski Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 88 +++++++++++++++++++++++++++++++++++- 1 file changed, 87 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 0169240..7ea34c2 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -21,11 +21,15 @@ #include #include #include +#include +#include #include "tilcdc_drv.h" #include "tilcdc_regs.h" -#define TILCDC_VBLANK_SAFETY_THRESHOLD_US 1000 +#define TILCDC_VBLANK_SAFETY_THRESHOLD_US 1000 +#define TILCDC_REV1_PALETTE_SIZE 32 +#define TILCDC_REV1_PALETTE_FIRST_ENTRY 0x4000 struct tilcdc_crtc { struct drm_crtc base; @@ -56,6 +60,10 @@ struct tilcdc_crtc { int sync_lost_count; bool frame_intact; struct work_struct recover_work; + + dma_addr_t palette_dma_handle; + void *palette_base; + struct completion palette_loaded; }; #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base) @@ -105,6 +113,55 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) tilcdc_crtc->curr_fb = fb; } +/* + * The driver currently only supports the RGB565 format for revision 1. For + * 16 bits-per-pixel the palette block is bypassed, but the first 32 bytes of + * the framebuffer are still considered palette. The first 16-bit entry must + * be 0x4000 while all other entries must be zeroed. + */ +static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) +{ + u32 dma_fb_base, dma_fb_ceiling, raster_ctl; + struct tilcdc_crtc *tilcdc_crtc; + struct drm_device *dev; + u16 *first_entry; + + dev = crtc->dev; + tilcdc_crtc = to_tilcdc_crtc(crtc); + first_entry = tilcdc_crtc->palette_base; + + *first_entry = TILCDC_REV1_PALETTE_FIRST_ENTRY; + + dma_fb_base = tilcdc_read(dev, LCDC_DMA_FB_BASE_ADDR_0_REG); + dma_fb_ceiling = tilcdc_read(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG); + raster_ctl = tilcdc_read(dev, LCDC_RASTER_CTRL_REG); + + /* Tell the LCDC where the palette is located. */ + tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, + tilcdc_crtc->palette_dma_handle); + tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, + (u32)tilcdc_crtc->palette_dma_handle + + TILCDC_REV1_PALETTE_SIZE - 1); + + /* Load it. */ + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_PALETTE_LOAD_MODE(DATA_ONLY)); + tilcdc_set(dev, LCDC_RASTER_CTRL_REG, + LCDC_PALETTE_LOAD_MODE(PALETTE_ONLY)); + + /* Enable the LCDC and wait for palette to be loaded. */ + tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); + tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + + wait_for_completion(&tilcdc_crtc->palette_loaded); + + /* Restore the registers. */ + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_fb_base); + tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, dma_fb_ceiling); + tilcdc_write(dev, LCDC_RASTER_CTRL_REG, raster_ctl); +} + static void tilcdc_crtc_enable_irqs(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; @@ -161,6 +218,7 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct tilcdc_drm_private *priv = dev->dev_private; WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); mutex_lock(&tilcdc_crtc->enable_lock); @@ -173,6 +231,9 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) reset(crtc); + if (priv->rev == 1 && !completion_done(&tilcdc_crtc->palette_loaded)) + tilcdc_crtc_load_palette(crtc); + tilcdc_crtc_enable_irqs(dev); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); @@ -214,6 +275,13 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) __func__); } + /* + * LCDC will not retain the palette when reset. Make sure it gets + * reloaded on tilcdc_crtc_enable(). + */ + if (priv->rev == 1) + reinit_completion(&tilcdc_crtc->palette_loaded); + drm_crtc_vblank_off(crtc); tilcdc_crtc_disable_irqs(dev); @@ -847,6 +915,14 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow", __func__, stat); + if (priv->rev == 1) { + if (stat & LCDC_PL_LOAD_DONE) { + complete(&tilcdc_crtc->palette_loaded); + tilcdc_clear(dev, + LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); + } + } + if (stat & LCDC_SYNC_LOST) { dev_err_ratelimited(dev->dev, "%s(0x%08x): Sync lost", __func__, stat); @@ -894,6 +970,16 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) return NULL; } + if (priv->rev == 1) { + init_completion(&tilcdc_crtc->palette_loaded); + tilcdc_crtc->palette_base = dmam_alloc_coherent(dev->dev, + TILCDC_REV1_PALETTE_SIZE, + &tilcdc_crtc->palette_dma_handle, + GFP_KERNEL | __GFP_ZERO); + if (!tilcdc_crtc->palette_base) + return ERR_PTR(-ENOMEM); + } + crtc = &tilcdc_crtc->base; ret = tilcdc_plane_init(dev, &tilcdc_crtc->primary); -- cgit v1.1 From 9963d36d14ecca29414c0e78d41840cec5b0ea03 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 15 Nov 2016 22:56:46 +0200 Subject: drm/tilcdc: Fix tilcdc_crtc_create() return value handling Failed tilcdc_crtc_create() error handling was broken, this patch should fix it. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 12 +++++++----- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 11 ++++------- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 2 +- 3 files changed, 12 insertions(+), 13 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 7ea34c2..4605942 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -957,7 +957,7 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) return IRQ_HANDLED; } -struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) +int tilcdc_crtc_create(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_crtc *tilcdc_crtc; @@ -967,7 +967,7 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) tilcdc_crtc = devm_kzalloc(dev->dev, sizeof(*tilcdc_crtc), GFP_KERNEL); if (!tilcdc_crtc) { dev_err(dev->dev, "allocation failed\n"); - return NULL; + return -ENOMEM; } if (priv->rev == 1) { @@ -977,7 +977,7 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) &tilcdc_crtc->palette_dma_handle, GFP_KERNEL | __GFP_ZERO); if (!tilcdc_crtc->palette_base) - return ERR_PTR(-ENOMEM); + return -ENOMEM; } crtc = &tilcdc_crtc->base; @@ -1020,13 +1020,15 @@ struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev) if (!crtc->port) { /* This should never happen */ dev_err(dev->dev, "Port node not found in %s\n", dev->dev->of_node->full_name); + ret = -EINVAL; goto fail; } } - return crtc; + priv->crtc = crtc; + return 0; fail: tilcdc_crtc_destroy(crtc); - return NULL; + return -ENOMEM; } diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 7f4d3bc..b1bbbfe 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -153,13 +153,11 @@ static const struct drm_mode_config_funcs mode_config_funcs = { .atomic_commit = tilcdc_commit, }; -static int modeset_init(struct drm_device *dev) +static void modeset_init(struct drm_device *dev) { struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_module *mod; - priv->crtc = tilcdc_crtc_create(dev); - list_for_each_entry(mod, &module_list, list) { DBG("loading module: %s", mod->name); mod->funcs->modeset_init(mod, dev); @@ -170,8 +168,6 @@ static int modeset_init(struct drm_device *dev) dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); dev->mode_config.max_height = 2048; dev->mode_config.funcs = &mode_config_funcs; - - return 0; } #ifdef CONFIG_CPU_FREQ @@ -370,11 +366,12 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) } } - ret = modeset_init(ddev); + ret = tilcdc_crtc_create(ddev); if (ret < 0) { - dev_err(dev, "failed to initialize mode setting\n"); + dev_err(dev, "failed to create crtc\n"); goto init_failed; } + modeset_init(ddev); if (priv->is_componentized) { ret = component_bind_all(dev, ddev); diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 411f8a8..0e71daf 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -168,7 +168,7 @@ struct tilcdc_panel_info { #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) -struct drm_crtc *tilcdc_crtc_create(struct drm_device *dev); +int tilcdc_crtc_create(struct drm_device *dev); irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc); void tilcdc_crtc_update_clk(struct drm_crtc *crtc); void tilcdc_crtc_set_panel_info(struct drm_crtc *crtc, -- cgit v1.1 From 0f92e898d187e2c52cec7b93aa9d93ee8ed2cf16 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 15 Nov 2016 23:02:58 +0200 Subject: drm/tilcdc: Add tilcdc_write_mask() to tilcdc_regs.h Add tilcdc_write_mask() for handling register field wider than one bit and mask values for those fields. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_regs.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h b/drivers/gpu/drm/tilcdc/tilcdc_regs.h index d195b65..d69a940 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h @@ -34,11 +34,14 @@ /* LCDC DMA Control Register */ #define LCDC_DMA_BURST_SIZE(x) ((x) << 4) +#define LCDC_DMA_BURST_SIZE_MASK ((0x7) << 4) #define LCDC_DMA_BURST_1 0x0 #define LCDC_DMA_BURST_2 0x1 #define LCDC_DMA_BURST_4 0x2 #define LCDC_DMA_BURST_8 0x3 #define LCDC_DMA_BURST_16 0x4 +#define LCDC_DMA_FIFO_THRESHOLD(x) ((x) << 8) +#define LCDC_DMA_FIFO_THRESHOLD_MASK ((0x3) << 8) #define LCDC_V1_END_OF_FRAME_INT_ENA BIT(2) #define LCDC_V2_END_OF_FRAME0_INT_ENA BIT(8) #define LCDC_V2_END_OF_FRAME1_INT_ENA BIT(9) @@ -46,10 +49,12 @@ /* LCDC Control Register */ #define LCDC_CLK_DIVISOR(x) ((x) << 8) +#define LCDC_CLK_DIVISOR_MASK ((0xFF) << 8) #define LCDC_RASTER_MODE 0x01 /* LCDC Raster Control Register */ #define LCDC_PALETTE_LOAD_MODE(x) ((x) << 20) +#define LCDC_PALETTE_LOAD_MODE_MASK ((0x3) << 20) #define PALETTE_AND_DATA 0x00 #define PALETTE_ONLY 0x01 #define DATA_ONLY 0x02 @@ -75,7 +80,9 @@ /* LCDC Raster Timing 2 Register */ #define LCDC_AC_BIAS_TRANSITIONS_PER_INT(x) ((x) << 16) +#define LCDC_AC_BIAS_TRANSITIONS_PER_INT_MASK ((0xF) << 16) #define LCDC_AC_BIAS_FREQUENCY(x) ((x) << 8) +#define LCDC_AC_BIAS_FREQUENCY_MASK ((0xFF) << 8) #define LCDC_SYNC_CTRL BIT(25) #define LCDC_SYNC_EDGE BIT(24) #define LCDC_INVERT_PIXEL_CLOCK BIT(22) @@ -140,6 +147,12 @@ static inline u32 tilcdc_read(struct drm_device *dev, u32 reg) return ioread32(priv->mmio + reg); } +static inline void tilcdc_write_mask(struct drm_device *dev, u32 reg, + u32 val, u32 mask) +{ + tilcdc_write(dev, reg, (tilcdc_read(dev, reg) & ~mask) | (val & mask)); +} + static inline void tilcdc_set(struct drm_device *dev, u32 reg, u32 mask) { tilcdc_write(dev, reg, tilcdc_read(dev, reg) | mask); -- cgit v1.1 From f13e088ca8ba28091ff030e89cdd8e25a3a7834d Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Sat, 19 Nov 2016 18:00:32 +0200 Subject: drm/tilcdc: Fix load mode bit-field setting in tilcdc_crtc_enable() Set LCDC_PALETTE_LOAD_MODE bit-field with new tilcdc_write_mask() instead of tilcdc_set(). Setting a bit-fields with tilcdc_set() is fundamentally broken. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 4605942..1ed65dd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -237,7 +237,9 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) tilcdc_crtc_enable_irqs(dev); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); - tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_PALETTE_LOAD_MODE(DATA_ONLY)); + tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG, + LCDC_PALETTE_LOAD_MODE(DATA_ONLY), + LCDC_PALETTE_LOAD_MODE_MASK); tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); drm_crtc_vblank_on(crtc); -- cgit v1.1 From 55e165c4d9d32ee86b348d63b65681783b9cc6d1 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 15 Nov 2016 23:37:24 +0200 Subject: drm/tilcdc: Enable palette loading for revision 2 LCDC too The LCDC revision 2 documentation also mentions the mandatory palette for true color modes. Even if the rev 2 LCDC appears to work just fine without the palette being loaded loading it helps in testing the feature. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 90 +++++++++++++++++++----------------- 1 file changed, 47 insertions(+), 43 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 1ed65dd..b3edc6d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -28,8 +28,8 @@ #include "tilcdc_regs.h" #define TILCDC_VBLANK_SAFETY_THRESHOLD_US 1000 -#define TILCDC_REV1_PALETTE_SIZE 32 -#define TILCDC_REV1_PALETTE_FIRST_ENTRY 0x4000 +#define TILCDC_PALETTE_SIZE 32 +#define TILCDC_PALETTE_FIRST_ENTRY 0x4000 struct tilcdc_crtc { struct drm_crtc base; @@ -62,7 +62,7 @@ struct tilcdc_crtc { struct work_struct recover_work; dma_addr_t palette_dma_handle; - void *palette_base; + u16 *palette_base; struct completion palette_loaded; }; #define to_tilcdc_crtc(x) container_of(x, struct tilcdc_crtc, base) @@ -114,23 +114,17 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) } /* - * The driver currently only supports the RGB565 format for revision 1. For - * 16 bits-per-pixel the palette block is bypassed, but the first 32 bytes of - * the framebuffer are still considered palette. The first 16-bit entry must - * be 0x4000 while all other entries must be zeroed. + * The driver currently only supports only true color formats. For + * true color the palette block is bypassed, but a 32 byte palette + * should still be loaded. The first 16-bit entry must be 0x4000 while + * all other entries must be zeroed. */ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) { u32 dma_fb_base, dma_fb_ceiling, raster_ctl; - struct tilcdc_crtc *tilcdc_crtc; - struct drm_device *dev; - u16 *first_entry; - - dev = crtc->dev; - tilcdc_crtc = to_tilcdc_crtc(crtc); - first_entry = tilcdc_crtc->palette_base; - - *first_entry = TILCDC_REV1_PALETTE_FIRST_ENTRY; + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; dma_fb_base = tilcdc_read(dev, LCDC_DMA_FB_BASE_ADDR_0_REG); dma_fb_ceiling = tilcdc_read(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG); @@ -140,23 +134,34 @@ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, tilcdc_crtc->palette_dma_handle); tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, - (u32)tilcdc_crtc->palette_dma_handle - + TILCDC_REV1_PALETTE_SIZE - 1); + (u32) tilcdc_crtc->palette_dma_handle + + TILCDC_PALETTE_SIZE - 1); - /* Load it. */ - tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, - LCDC_PALETTE_LOAD_MODE(DATA_ONLY)); - tilcdc_set(dev, LCDC_RASTER_CTRL_REG, - LCDC_PALETTE_LOAD_MODE(PALETTE_ONLY)); + /* Set dma load mode for palette loading only. */ + tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG, + LCDC_PALETTE_LOAD_MODE(PALETTE_ONLY), + LCDC_PALETTE_LOAD_MODE_MASK); + + /* Enable DMA Palette Loaded Interrupt */ + if (priv->rev == 1) + tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); + else + tilcdc_write(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_PL_INT_ENA); - /* Enable the LCDC and wait for palette to be loaded. */ - tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); + /* Enable LCDC DMA and wait for palette to be loaded. */ + tilcdc_clear_irqstatus(dev, 0xffffffff); tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); wait_for_completion(&tilcdc_crtc->palette_loaded); - /* Restore the registers. */ + /* Disable LCDC DMA and DMA Palette Loaded Interrupt. */ tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + if (priv->rev == 1) + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); + else + tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA); + + /* Restore the registers. */ tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_fb_base); tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, dma_fb_ceiling); tilcdc_write(dev, LCDC_RASTER_CTRL_REG, raster_ctl); @@ -218,7 +223,6 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - struct tilcdc_drm_private *priv = dev->dev_private; WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); mutex_lock(&tilcdc_crtc->enable_lock); @@ -231,7 +235,7 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) reset(crtc); - if (priv->rev == 1 && !completion_done(&tilcdc_crtc->palette_loaded)) + if (!completion_done(&tilcdc_crtc->palette_loaded)) tilcdc_crtc_load_palette(crtc); tilcdc_crtc_enable_irqs(dev); @@ -281,8 +285,7 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) * LCDC will not retain the palette when reset. Make sure it gets * reloaded on tilcdc_crtc_enable(). */ - if (priv->rev == 1) - reinit_completion(&tilcdc_crtc->palette_loaded); + reinit_completion(&tilcdc_crtc->palette_loaded); drm_crtc_vblank_off(crtc); @@ -917,12 +920,14 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) dev_err_ratelimited(dev->dev, "%s(0x%08x): FIFO underflow", __func__, stat); - if (priv->rev == 1) { - if (stat & LCDC_PL_LOAD_DONE) { - complete(&tilcdc_crtc->palette_loaded); - tilcdc_clear(dev, - LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); - } + if (stat & LCDC_PL_LOAD_DONE) { + complete(&tilcdc_crtc->palette_loaded); + if (priv->rev == 1) + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_PL_INT_ENA); + else + tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, + LCDC_V2_PL_INT_ENA); } if (stat & LCDC_SYNC_LOST) { @@ -972,15 +977,14 @@ int tilcdc_crtc_create(struct drm_device *dev) return -ENOMEM; } - if (priv->rev == 1) { - init_completion(&tilcdc_crtc->palette_loaded); - tilcdc_crtc->palette_base = dmam_alloc_coherent(dev->dev, - TILCDC_REV1_PALETTE_SIZE, + init_completion(&tilcdc_crtc->palette_loaded); + tilcdc_crtc->palette_base = dmam_alloc_coherent(dev->dev, + TILCDC_PALETTE_SIZE, &tilcdc_crtc->palette_dma_handle, GFP_KERNEL | __GFP_ZERO); - if (!tilcdc_crtc->palette_base) - return -ENOMEM; - } + if (!tilcdc_crtc->palette_base) + return -ENOMEM; + *tilcdc_crtc->palette_base = TILCDC_PALETTE_FIRST_ENTRY; crtc = &tilcdc_crtc->base; -- cgit v1.1 From e59f5af9fba2cfccd26ceed085b9c5e89c81f0ca Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Thu, 17 Nov 2016 18:46:16 +0200 Subject: drm/tilcdc: Add timeout wait for palette loading to complete Add timeout wait for palette loadind to complete. We do not want to hang forever if palette loaded interrupt does not arrive for some reason. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index b3edc6d..f736a89 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -125,6 +125,7 @@ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; + int ret; dma_fb_base = tilcdc_read(dev, LCDC_DMA_FB_BASE_ADDR_0_REG); dma_fb_ceiling = tilcdc_read(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG); @@ -152,7 +153,10 @@ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) tilcdc_clear_irqstatus(dev, 0xffffffff); tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); - wait_for_completion(&tilcdc_crtc->palette_loaded); + ret = wait_for_completion_timeout(&tilcdc_crtc->palette_loaded, + msecs_to_jiffies(50)); + if (ret == 0) + dev_err(dev->dev, "%s: Palette loading timeout", __func__); /* Disable LCDC DMA and DMA Palette Loaded Interrupt. */ tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); -- cgit v1.1 From 274c34dbe756d441e2c1925465569ef93d380541 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Tue, 15 Nov 2016 23:57:42 +0200 Subject: drm/tilcdc: Load palette at the end of mode_set_nofb() Load palette at the end of mode_set_nofb(). Moving the palette loading to mode_set_nofb() saves us from storing and restoring of framebuffer addresses in dma registers that were just recently written there. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 25 +++++-------------------- 1 file changed, 5 insertions(+), 20 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index f736a89..4472540 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -121,15 +121,12 @@ static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) */ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) { - u32 dma_fb_base, dma_fb_ceiling, raster_ctl; struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; struct tilcdc_drm_private *priv = dev->dev_private; int ret; - dma_fb_base = tilcdc_read(dev, LCDC_DMA_FB_BASE_ADDR_0_REG); - dma_fb_ceiling = tilcdc_read(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG); - raster_ctl = tilcdc_read(dev, LCDC_RASTER_CTRL_REG); + reinit_completion(&tilcdc_crtc->palette_loaded); /* Tell the LCDC where the palette is located. */ tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, @@ -164,11 +161,6 @@ static void tilcdc_crtc_load_palette(struct drm_crtc *crtc) tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA); else tilcdc_write(dev, LCDC_INT_ENABLE_CLR_REG, LCDC_V2_PL_INT_ENA); - - /* Restore the registers. */ - tilcdc_write(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_fb_base); - tilcdc_write(dev, LCDC_DMA_FB_CEILING_ADDR_0_REG, dma_fb_ceiling); - tilcdc_write(dev, LCDC_RASTER_CTRL_REG, raster_ctl); } static void tilcdc_crtc_enable_irqs(struct drm_device *dev) @@ -239,9 +231,6 @@ static void tilcdc_crtc_enable(struct drm_crtc *crtc) reset(crtc); - if (!completion_done(&tilcdc_crtc->palette_loaded)) - tilcdc_crtc_load_palette(crtc); - tilcdc_crtc_enable_irqs(dev); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); @@ -285,12 +274,6 @@ static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) __func__); } - /* - * LCDC will not retain the palette when reset. Make sure it gets - * reloaded on tilcdc_crtc_enable(). - */ - reinit_completion(&tilcdc_crtc->palette_loaded); - drm_crtc_vblank_off(crtc); tilcdc_crtc_disable_irqs(dev); @@ -678,10 +661,12 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc) drm_framebuffer_reference(fb); - set_scanout(crtc, fb); - tilcdc_crtc_set_clk(crtc); + tilcdc_crtc_load_palette(crtc); + + set_scanout(crtc, fb); + crtc->hwmode = crtc->state->adjusted_mode; } -- cgit v1.1 From 75d7f277eefcbd25c154d81f6836d7fdefaba89c Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Thu, 24 Nov 2016 23:25:08 +0200 Subject: drm/tilcdc: Configure video mode to HW in enable() not in mode_set_nofb() Configure video mode to HW in enable() call back. There is no reason to do it before that. This makes PM functions way easier because there is no HW context to save when screen is for instance blanked. This patch removes mode_set_nofb() call back from tilcdc. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 426 +++++++++++++++++------------------ drivers/gpu/drm/tilcdc/tilcdc_drv.c | 6 - 2 files changed, 212 insertions(+), 220 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index 4472540..fb24422 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -215,214 +215,6 @@ static void reset(struct drm_crtc *crtc) tilcdc_clear(dev, LCDC_CLK_RESET_REG, LCDC_CLK_MAIN_RESET); } -static void tilcdc_crtc_enable(struct drm_crtc *crtc) -{ - struct drm_device *dev = crtc->dev; - struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - - WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - mutex_lock(&tilcdc_crtc->enable_lock); - if (tilcdc_crtc->enabled || tilcdc_crtc->shutdown) { - mutex_unlock(&tilcdc_crtc->enable_lock); - return; - } - - pm_runtime_get_sync(dev->dev); - - reset(crtc); - - tilcdc_crtc_enable_irqs(dev); - - tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); - tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG, - LCDC_PALETTE_LOAD_MODE(DATA_ONLY), - LCDC_PALETTE_LOAD_MODE_MASK); - tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); - - drm_crtc_vblank_on(crtc); - - tilcdc_crtc->enabled = true; - mutex_unlock(&tilcdc_crtc->enable_lock); -} - -static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) -{ - struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - struct drm_device *dev = crtc->dev; - struct tilcdc_drm_private *priv = dev->dev_private; - - mutex_lock(&tilcdc_crtc->enable_lock); - if (shutdown) - tilcdc_crtc->shutdown = true; - if (!tilcdc_crtc->enabled) { - mutex_unlock(&tilcdc_crtc->enable_lock); - return; - } - tilcdc_crtc->frame_done = false; - tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); - - /* - * if necessary wait for framedone irq which will still come - * before putting things to sleep.. - */ - if (priv->rev == 2) { - int ret = wait_event_timeout(tilcdc_crtc->frame_done_wq, - tilcdc_crtc->frame_done, - msecs_to_jiffies(500)); - if (ret == 0) - dev_err(dev->dev, "%s: timeout waiting for framedone\n", - __func__); - } - - drm_crtc_vblank_off(crtc); - - tilcdc_crtc_disable_irqs(dev); - - pm_runtime_put_sync(dev->dev); - - if (tilcdc_crtc->next_fb) { - drm_flip_work_queue(&tilcdc_crtc->unref_work, - tilcdc_crtc->next_fb); - tilcdc_crtc->next_fb = NULL; - } - - if (tilcdc_crtc->curr_fb) { - drm_flip_work_queue(&tilcdc_crtc->unref_work, - tilcdc_crtc->curr_fb); - tilcdc_crtc->curr_fb = NULL; - } - - drm_flip_work_commit(&tilcdc_crtc->unref_work, priv->wq); - tilcdc_crtc->last_vblank = ktime_set(0, 0); - - tilcdc_crtc->enabled = false; - mutex_unlock(&tilcdc_crtc->enable_lock); -} - -static void tilcdc_crtc_disable(struct drm_crtc *crtc) -{ - WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - tilcdc_crtc_off(crtc, false); -} - -void tilcdc_crtc_shutdown(struct drm_crtc *crtc) -{ - tilcdc_crtc_off(crtc, true); -} - -static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) -{ - return crtc->state && crtc->state->enable && crtc->state->active; -} - -static void tilcdc_crtc_recover_work(struct work_struct *work) -{ - struct tilcdc_crtc *tilcdc_crtc = - container_of(work, struct tilcdc_crtc, recover_work); - struct drm_crtc *crtc = &tilcdc_crtc->base; - - dev_info(crtc->dev->dev, "%s: Reset CRTC", __func__); - - drm_modeset_lock_crtc(crtc, NULL); - - if (!tilcdc_crtc_is_on(crtc)) - goto out; - - tilcdc_crtc_disable(crtc); - tilcdc_crtc_enable(crtc); -out: - drm_modeset_unlock_crtc(crtc); -} - -static void tilcdc_crtc_destroy(struct drm_crtc *crtc) -{ - struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - struct tilcdc_drm_private *priv = crtc->dev->dev_private; - - drm_modeset_lock_crtc(crtc, NULL); - tilcdc_crtc_disable(crtc); - drm_modeset_unlock_crtc(crtc); - - flush_workqueue(priv->wq); - - of_node_put(crtc->port); - drm_crtc_cleanup(crtc); - drm_flip_work_cleanup(&tilcdc_crtc->unref_work); -} - -int tilcdc_crtc_update_fb(struct drm_crtc *crtc, - struct drm_framebuffer *fb, - struct drm_pending_vblank_event *event) -{ - struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - struct drm_device *dev = crtc->dev; - unsigned long flags; - - WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - - if (tilcdc_crtc->event) { - dev_err(dev->dev, "already pending page flip!\n"); - return -EBUSY; - } - - drm_framebuffer_reference(fb); - - crtc->primary->fb = fb; - - spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); - - if (crtc->hwmode.vrefresh && ktime_to_ns(tilcdc_crtc->last_vblank)) { - ktime_t next_vblank; - s64 tdiff; - - next_vblank = ktime_add_us(tilcdc_crtc->last_vblank, - 1000000 / crtc->hwmode.vrefresh); - - tdiff = ktime_to_us(ktime_sub(next_vblank, ktime_get())); - - if (tdiff < TILCDC_VBLANK_SAFETY_THRESHOLD_US) - tilcdc_crtc->next_fb = fb; - } - - if (tilcdc_crtc->next_fb != fb) - set_scanout(crtc, fb); - - tilcdc_crtc->event = event; - - spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); - - return 0; -} - -static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc, - const struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) -{ - struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); - - if (!tilcdc_crtc->simulate_vesa_sync) - return true; - - /* - * tilcdc does not generate VESA-compliant sync but aligns - * VS on the second edge of HS instead of first edge. - * We use adjusted_mode, to fixup sync by aligning both rising - * edges and add HSKEW offset to fix the sync. - */ - adjusted_mode->hskew = mode->hsync_end - mode->hsync_start; - adjusted_mode->flags |= DRM_MODE_FLAG_HSKEW; - - if (mode->flags & DRM_MODE_FLAG_NHSYNC) { - adjusted_mode->flags |= DRM_MODE_FLAG_PHSYNC; - adjusted_mode->flags &= ~DRM_MODE_FLAG_NHSYNC; - } else { - adjusted_mode->flags |= DRM_MODE_FLAG_NHSYNC; - adjusted_mode->flags &= ~DRM_MODE_FLAG_PHSYNC; - } - - return true; -} - /* * Calculate the percentage difference between the requested pixel clock rate * and the effective rate resulting from calculating the clock divider value. @@ -499,7 +291,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) LCDC_V2_CORE_CLK_EN); } -static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc) +static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) { struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct drm_device *dev = crtc->dev; @@ -509,8 +301,6 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc) struct drm_display_mode *mode = &crtc->state->adjusted_mode; struct drm_framebuffer *fb = crtc->primary->state->fb; - WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); - if (WARN_ON(!info)) return; @@ -659,17 +449,226 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc) else tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER); - drm_framebuffer_reference(fb); - tilcdc_crtc_set_clk(crtc); tilcdc_crtc_load_palette(crtc); set_scanout(crtc, fb); + drm_framebuffer_reference(fb); + crtc->hwmode = crtc->state->adjusted_mode; } +static void tilcdc_crtc_enable(struct drm_crtc *crtc) +{ + struct drm_device *dev = crtc->dev; + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + + WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); + mutex_lock(&tilcdc_crtc->enable_lock); + if (tilcdc_crtc->enabled || tilcdc_crtc->shutdown) { + mutex_unlock(&tilcdc_crtc->enable_lock); + return; + } + + pm_runtime_get_sync(dev->dev); + + reset(crtc); + + tilcdc_crtc_set_mode(crtc); + + tilcdc_crtc_enable_irqs(dev); + + tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_DUAL_FRAME_BUFFER_ENABLE); + tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG, + LCDC_PALETTE_LOAD_MODE(DATA_ONLY), + LCDC_PALETTE_LOAD_MODE_MASK); + tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + + drm_crtc_vblank_on(crtc); + + tilcdc_crtc->enabled = true; + mutex_unlock(&tilcdc_crtc->enable_lock); +} + +static void tilcdc_crtc_off(struct drm_crtc *crtc, bool shutdown) +{ + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct drm_device *dev = crtc->dev; + struct tilcdc_drm_private *priv = dev->dev_private; + int ret; + + mutex_lock(&tilcdc_crtc->enable_lock); + if (shutdown) + tilcdc_crtc->shutdown = true; + if (!tilcdc_crtc->enabled) { + mutex_unlock(&tilcdc_crtc->enable_lock); + return; + } + tilcdc_crtc->frame_done = false; + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE); + + /* + * Wait for framedone irq which will still come before putting + * things to sleep.. + */ + ret = wait_event_timeout(tilcdc_crtc->frame_done_wq, + tilcdc_crtc->frame_done, + msecs_to_jiffies(500)); + if (ret == 0) + dev_err(dev->dev, "%s: timeout waiting for framedone\n", + __func__); + + drm_crtc_vblank_off(crtc); + + tilcdc_crtc_disable_irqs(dev); + + pm_runtime_put_sync(dev->dev); + + if (tilcdc_crtc->next_fb) { + drm_flip_work_queue(&tilcdc_crtc->unref_work, + tilcdc_crtc->next_fb); + tilcdc_crtc->next_fb = NULL; + } + + if (tilcdc_crtc->curr_fb) { + drm_flip_work_queue(&tilcdc_crtc->unref_work, + tilcdc_crtc->curr_fb); + tilcdc_crtc->curr_fb = NULL; + } + + drm_flip_work_commit(&tilcdc_crtc->unref_work, priv->wq); + tilcdc_crtc->last_vblank = ktime_set(0, 0); + + tilcdc_crtc->enabled = false; + mutex_unlock(&tilcdc_crtc->enable_lock); +} + +static void tilcdc_crtc_disable(struct drm_crtc *crtc) +{ + WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); + tilcdc_crtc_off(crtc, false); +} + +void tilcdc_crtc_shutdown(struct drm_crtc *crtc) +{ + tilcdc_crtc_off(crtc, true); +} + +static bool tilcdc_crtc_is_on(struct drm_crtc *crtc) +{ + return crtc->state && crtc->state->enable && crtc->state->active; +} + +static void tilcdc_crtc_recover_work(struct work_struct *work) +{ + struct tilcdc_crtc *tilcdc_crtc = + container_of(work, struct tilcdc_crtc, recover_work); + struct drm_crtc *crtc = &tilcdc_crtc->base; + + dev_info(crtc->dev->dev, "%s: Reset CRTC", __func__); + + drm_modeset_lock_crtc(crtc, NULL); + + if (!tilcdc_crtc_is_on(crtc)) + goto out; + + tilcdc_crtc_disable(crtc); + tilcdc_crtc_enable(crtc); +out: + drm_modeset_unlock_crtc(crtc); +} + +static void tilcdc_crtc_destroy(struct drm_crtc *crtc) +{ + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct tilcdc_drm_private *priv = crtc->dev->dev_private; + + drm_modeset_lock_crtc(crtc, NULL); + tilcdc_crtc_disable(crtc); + drm_modeset_unlock_crtc(crtc); + + flush_workqueue(priv->wq); + + of_node_put(crtc->port); + drm_crtc_cleanup(crtc); + drm_flip_work_cleanup(&tilcdc_crtc->unref_work); +} + +int tilcdc_crtc_update_fb(struct drm_crtc *crtc, + struct drm_framebuffer *fb, + struct drm_pending_vblank_event *event) +{ + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + struct drm_device *dev = crtc->dev; + unsigned long flags; + + WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); + + if (tilcdc_crtc->event) { + dev_err(dev->dev, "already pending page flip!\n"); + return -EBUSY; + } + + drm_framebuffer_reference(fb); + + crtc->primary->fb = fb; + + spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags); + + if (crtc->hwmode.vrefresh && ktime_to_ns(tilcdc_crtc->last_vblank)) { + ktime_t next_vblank; + s64 tdiff; + + next_vblank = ktime_add_us(tilcdc_crtc->last_vblank, + 1000000 / crtc->hwmode.vrefresh); + + tdiff = ktime_to_us(ktime_sub(next_vblank, ktime_get())); + + if (tdiff < TILCDC_VBLANK_SAFETY_THRESHOLD_US) + tilcdc_crtc->next_fb = fb; + } + + if (tilcdc_crtc->next_fb != fb) + set_scanout(crtc, fb); + + tilcdc_crtc->event = event; + + spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags); + + return 0; +} + +static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); + + if (!tilcdc_crtc->simulate_vesa_sync) + return true; + + /* + * tilcdc does not generate VESA-compliant sync but aligns + * VS on the second edge of HS instead of first edge. + * We use adjusted_mode, to fixup sync by aligning both rising + * edges and add HSKEW offset to fix the sync. + */ + adjusted_mode->hskew = mode->hsync_end - mode->hsync_start; + adjusted_mode->flags |= DRM_MODE_FLAG_HSKEW; + + if (mode->flags & DRM_MODE_FLAG_NHSYNC) { + adjusted_mode->flags |= DRM_MODE_FLAG_PHSYNC; + adjusted_mode->flags &= ~DRM_MODE_FLAG_NHSYNC; + } else { + adjusted_mode->flags |= DRM_MODE_FLAG_NHSYNC; + adjusted_mode->flags &= ~DRM_MODE_FLAG_PHSYNC; + } + + return true; +} + static int tilcdc_crtc_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state) { @@ -710,7 +709,6 @@ static const struct drm_crtc_helper_funcs tilcdc_crtc_helper_funcs = { .enable = tilcdc_crtc_enable, .disable = tilcdc_crtc_disable, .atomic_check = tilcdc_crtc_atomic_check, - .mode_set_nofb = tilcdc_crtc_mode_set_nofb, }; int tilcdc_crtc_max_width(struct drm_crtc *crtc) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index b1bbbfe..5efb369 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -127,18 +127,12 @@ static int tilcdc_commit(struct drm_device *dev, * current layout. */ - /* Keep HW on while we commit the state. */ - pm_runtime_get_sync(dev->dev); - drm_atomic_helper_commit_modeset_disables(dev, state); drm_atomic_helper_commit_planes(dev, state, 0); drm_atomic_helper_commit_modeset_enables(dev, state); - /* Now HW should remain on if need becase the crtc is enabled */ - pm_runtime_put_sync(dev->dev); - drm_atomic_helper_wait_for_vblanks(dev, state); drm_atomic_helper_cleanup_planes(dev, state); -- cgit v1.1 From 3672583f2525ce8220e0667e20b6a59b29782d80 Mon Sep 17 00:00:00 2001 From: Jyri Sarha Date: Mon, 21 Nov 2016 18:30:19 +0200 Subject: drm/tilcdc: Enable frame done irq and functionality for LCDC rev 1 We should wait for the last frame to complete before shutting things down also on LCDC rev 1. Signed-off-by: Jyri Sarha Tested-by: Bartosz Golaszewski --- drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 18 +++++++++++------- drivers/gpu/drm/tilcdc/tilcdc_regs.h | 1 + 2 files changed, 12 insertions(+), 7 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c index fb24422..9942b05 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c @@ -171,7 +171,7 @@ static void tilcdc_crtc_enable_irqs(struct drm_device *dev) if (priv->rev == 1) { tilcdc_set(dev, LCDC_RASTER_CTRL_REG, - LCDC_V1_SYNC_LOST_INT_ENA | + LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA | LCDC_V1_UNDERFLOW_INT_ENA); tilcdc_set(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); @@ -190,7 +190,7 @@ static void tilcdc_crtc_disable_irqs(struct drm_device *dev) /* disable irqs that we might have enabled: */ if (priv->rev == 1) { tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, - LCDC_V1_SYNC_LOST_INT_ENA | + LCDC_V1_SYNC_LOST_INT_ENA | LCDC_V1_FRAME_DONE_INT_ENA | LCDC_V1_UNDERFLOW_INT_ENA | LCDC_V1_PL_INT_ENA); tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); @@ -935,13 +935,17 @@ irqreturn_t tilcdc_crtc_irq(struct drm_crtc *crtc) } } + if (stat & LCDC_FRAME_DONE) { + tilcdc_crtc->frame_done = true; + wake_up(&tilcdc_crtc->frame_done_wq); + /* rev 1 lcdc appears to hang if irq is not disbaled here */ + if (priv->rev == 1) + tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, + LCDC_V1_FRAME_DONE_INT_ENA); + } + /* For revision 2 only */ if (priv->rev == 2) { - if (stat & LCDC_FRAME_DONE) { - tilcdc_crtc->frame_done = true; - wake_up(&tilcdc_crtc->frame_done_wq); - } - /* Indicate to LCDC that the interrupt service routine has * completed, see 13.3.6.1.6 in AM335x TRM. */ diff --git a/drivers/gpu/drm/tilcdc/tilcdc_regs.h b/drivers/gpu/drm/tilcdc/tilcdc_regs.h index d69a940..9d528c0 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_regs.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_regs.h @@ -67,6 +67,7 @@ #define LCDC_V1_PL_INT_ENA BIT(4) #define LCDC_V2_PL_INT_ENA BIT(6) #define LCDC_V1_SYNC_LOST_INT_ENA BIT(5) +#define LCDC_V1_FRAME_DONE_INT_ENA BIT(3) #define LCDC_MONOCHROME_MODE BIT(1) #define LCDC_RASTER_ENABLE BIT(0) #define LCDC_TFT_ALT_ENABLE BIT(23) -- cgit v1.1 From 0186fcce896d3cb6fb690ed8b4405c9c1b76977a Mon Sep 17 00:00:00 2001 From: Bartosz Golaszewski Date: Mon, 28 Nov 2016 12:37:23 +0100 Subject: drm/tilcdc: fix parsing of some DT properties The DT binding for tildc is not consistent with the driver code: there are two options - 'max-width' and 'max-pixelclock' specified in the documentation which are parsed as 'ti,max-width' and 'ti,max-pixelclock' respectively. Make the driver code consistent with the binding. Signed-off-by: Bartosz Golaszewski Reviewed-by: Jyri Sarha Signed-off-by: Jyri Sarha --- drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/tilcdc') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 5efb369..bd0a3bd 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -296,12 +296,12 @@ static int tilcdc_init(struct drm_driver *ddrv, struct device *dev) DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); - if (of_property_read_u32(node, "ti,max-width", &priv->max_width)) + if (of_property_read_u32(node, "max-width", &priv->max_width)) priv->max_width = TILCDC_DEFAULT_MAX_WIDTH; DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); - if (of_property_read_u32(node, "ti,max-pixelclock", + if (of_property_read_u32(node, "max-pixelclock", &priv->max_pixelclock)) priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; -- cgit v1.1