From 9bd2ddbaa241274cd11191838d080fc308ecf6c7 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 31 Jan 2013 13:51:20 +1000 Subject: drm/nouveau/fifo/nvc0-: use interrupt 31 as an event trigger Generated if you try and use fifo method 0x20 on any subchannel, appears that it can be safely masked off without stalling the whole GPU. Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/core/include/engine/fifo.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/nouveau/core/include') diff --git a/drivers/gpu/drm/nouveau/core/include/engine/fifo.h b/drivers/gpu/drm/nouveau/core/include/engine/fifo.h index 543e4ef..b46c197 100644 --- a/drivers/gpu/drm/nouveau/core/include/engine/fifo.h +++ b/drivers/gpu/drm/nouveau/core/include/engine/fifo.h @@ -65,6 +65,8 @@ struct nouveau_fifo_base { struct nouveau_fifo { struct nouveau_engine base; + struct nouveau_event *uevent; + struct nouveau_object **channel; spinlock_t lock; u16 min; -- cgit v1.1