From c29f82951b974f27e0bc4ce2525db164f86f2e4d Mon Sep 17 00:00:00 2001 From: Hiromitsu Yamasaki Date: Wed, 26 Jul 2017 20:23:39 +0900 Subject: clk: renesas: r8a7796: Add USB3.0 clock This patch adds USB3.0-IF0 clock for R8A7796 SoC. Signed-off-by: Hiromitsu Yamasaki Signed-off-by: Takeshi Kihara Signed-off-by: Yoshihiro Shimoda Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/clk/renesas') diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index 22ba3c49..e5e7fb2 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -138,6 +138,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { DEF_MOD("sdif0", 314, R8A7796_CLK_SD0), DEF_MOD("pcie1", 318, R8A7796_CLK_S3D1), DEF_MOD("pcie0", 319, R8A7796_CLK_S3D1), + DEF_MOD("usb3-if0", 328, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac0", 330, R8A7796_CLK_S3D1), DEF_MOD("usb-dmac1", 331, R8A7796_CLK_S3D1), DEF_MOD("rwdt", 402, R8A7796_CLK_R), -- cgit v1.1