From f435046d38af631920b299455db9e95dfc06d055 Mon Sep 17 00:00:00 2001 From: Andy Lutomirski Date: Mon, 13 May 2013 23:58:43 +0000 Subject: drm, agpgart: Use pgprot_writecombine for AGP maps and make the MTRR optional I'm not sure I understand the intent of the previous behavior. mmap on /dev/agpgart and DRM_AGP maps had no cache flags set, so they would be fully cacheable. But the DRM code (most of the time) would add a write-combining MTRR that would change the effective memory type to WC. The new behavior just requests WC explicitly for all AGP maps. If there is any code out there that expects cacheable access to the AGP aperture (because the drm driver doesn't request an MTRR or because it's using /dev/agpgart directly), then it will now end up with a UC or WC mapping, depending on the architecture and PAT availability. But cacheable access to the aperture seems like it's asking for trouble, because, AIUI, the aperture is an alias of RAM. Reviewed-by: Daniel Vetter Signed-off-by: Andy Lutomirski Signed-off-by: Dave Airlie --- drivers/char/agp/frontend.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/char') diff --git a/drivers/char/agp/frontend.c b/drivers/char/agp/frontend.c index 2e04433..1b19239 100644 --- a/drivers/char/agp/frontend.c +++ b/drivers/char/agp/frontend.c @@ -603,7 +603,8 @@ static int agp_mmap(struct file *file, struct vm_area_struct *vma) vma->vm_ops = kerninfo.vm_ops; } else if (io_remap_pfn_range(vma, vma->vm_start, (kerninfo.aper_base + offset) >> PAGE_SHIFT, - size, vma->vm_page_prot)) { + size, + pgprot_writecombine(vma->vm_page_prot))) { goto out_again; } mutex_unlock(&(agp_fe.agp_mutex)); @@ -618,8 +619,9 @@ static int agp_mmap(struct file *file, struct vm_area_struct *vma) if (kerninfo.vm_ops) { vma->vm_ops = kerninfo.vm_ops; } else if (io_remap_pfn_range(vma, vma->vm_start, - kerninfo.aper_base >> PAGE_SHIFT, - size, vma->vm_page_prot)) { + kerninfo.aper_base >> PAGE_SHIFT, + size, + pgprot_writecombine(vma->vm_page_prot))) { goto out_again; } mutex_unlock(&(agp_fe.agp_mutex)); -- cgit v1.1 From 9ddebc46e70b434e485060f7c1b53c5b848a6c8c Mon Sep 17 00:00:00 2001 From: David Daney Date: Wed, 22 May 2013 15:10:46 +0000 Subject: MIPS: OCTEON: Rename Kconfig CAVIUM_OCTEON_REFERENCE_BOARD to CAVIUM_OCTEON_SOC CAVIUM_OCTEON_SOC most place we used to use CPU_CAVIUM_OCTEON. This allows us to CPU_CAVIUM_OCTEON in places where we have no OCTEON SOC. Remove CAVIUM_OCTEON_SIMULATOR as it doesn't really do anything, we can get the same configuration with CAVIUM_OCTEON_SOC. Signed-off-by: David Daney Cc: linux-mips@linux-mips.org Cc: linux-ide@vger.kernel.org Cc: linux-edac@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: netdev@vger.kernel.org Cc: spi-devel-general@lists.sourceforge.net Cc: devel@driverdev.osuosl.org Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman Acked-by: Wolfram Sang Acked-by: Mauro Carvalho Chehab Patchwork: https://patchwork.linux-mips.org/patch/5295/ Signed-off-by: Ralf Baechle --- drivers/char/hw_random/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/char') diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 2f9dbf7..40a8654 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -167,7 +167,7 @@ config HW_RANDOM_OMAP config HW_RANDOM_OCTEON tristate "Octeon Random Number Generator support" - depends on HW_RANDOM && CPU_CAVIUM_OCTEON + depends on HW_RANDOM && CAVIUM_OCTEON_SOC default HW_RANDOM ---help--- This driver provides kernel-side support for the Random Number -- cgit v1.1 From 433555031e5f4aeb893ea9fe9c3df9df9d566cd4 Mon Sep 17 00:00:00 2001 From: Yijing Wang Date: Thu, 27 Jun 2013 20:52:36 +0800 Subject: char/agp: replace numeric with standard PM state macros Use standard PM state macros PCI_Dx instead of numeric 0/1/2.. Signed-off-by: Yijing Wang Signed-off-by: Dave Airlie --- drivers/char/agp/ati-agp.c | 4 ++-- drivers/char/agp/nvidia-agp.c | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'drivers/char') diff --git a/drivers/char/agp/ati-agp.c b/drivers/char/agp/ati-agp.c index 0628d7b..03c1dc1 100644 --- a/drivers/char/agp/ati-agp.c +++ b/drivers/char/agp/ati-agp.c @@ -236,14 +236,14 @@ static int ati_configure(void) static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state) { pci_save_state(dev); - pci_set_power_state(dev, 3); + pci_set_power_state(dev, PCI_D3hot); return 0; } static int agp_ati_resume(struct pci_dev *dev) { - pci_set_power_state(dev, 0); + pci_set_power_state(dev, PCI_D0); pci_restore_state(dev); return ati_configure(); diff --git a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c index 62be3ec..be42a23 100644 --- a/drivers/char/agp/nvidia-agp.c +++ b/drivers/char/agp/nvidia-agp.c @@ -399,8 +399,8 @@ static void agp_nvidia_remove(struct pci_dev *pdev) #ifdef CONFIG_PM static int agp_nvidia_suspend(struct pci_dev *pdev, pm_message_t state) { - pci_save_state (pdev); - pci_set_power_state (pdev, 3); + pci_save_state(pdev); + pci_set_power_state(pdev, PCI_D3hot); return 0; } @@ -408,7 +408,7 @@ static int agp_nvidia_suspend(struct pci_dev *pdev, pm_message_t state) static int agp_nvidia_resume(struct pci_dev *pdev) { /* set power state 0 and restore PCI space */ - pci_set_power_state (pdev, 0); + pci_set_power_state(pdev, PCI_D0); pci_restore_state(pdev); /* reconfigure AGP hardware again */ -- cgit v1.1 From 026dadad6b44f0469a475efb4cae48269d8848bd Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Mon, 8 Jul 2013 16:01:27 -0700 Subject: mwave: fix info leak in mwave_ioctl() Smatch complains that on 64 bit systems, there is a hole in the MW_ABILITIES struct between ->component_count and ->component_list[]. It leaks stack information from the mwave_ioctl() function. I've added a memset() to initialize the struct to zero. Signed-off-by: Dan Carpenter Cc: Greg KH Cc: Jiri Kosina Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/char/mwave/tp3780i.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/char') diff --git a/drivers/char/mwave/tp3780i.c b/drivers/char/mwave/tp3780i.c index c689697..04e6d6a 100644 --- a/drivers/char/mwave/tp3780i.c +++ b/drivers/char/mwave/tp3780i.c @@ -479,6 +479,7 @@ int tp3780I_QueryAbilities(THINKPAD_BD_DATA * pBDData, MW_ABILITIES * pAbilities PRINTK_2(TRACE_TP3780I, "tp3780i::tp3780I_QueryAbilities entry pBDData %p\n", pBDData); + memset(pAbilities, 0, sizeof(*pAbilities)); /* fill out standard constant fields */ pAbilities->instr_per_sec = pBDData->rDspSettings.uIps; pAbilities->data_size = pBDData->rDspSettings.uDStoreSize; -- cgit v1.1