From 9fa424a40186ef3e8a6573aa1c1dd46c94c66012 Mon Sep 17 00:00:00 2001 From: Pawel Osciak Date: Tue, 10 Aug 2010 18:02:36 -0700 Subject: s3c-fb: correct FRAMESEL1 bitfield defines for VIDINTCON0 register FRAMESEL1 bitfield starts on 13th bit, not on 14th. Signed-off-by: Pawel Osciak Signed-off-by: Kyungmin Park Acked-by: Ben Dooks Cc: InKi Dae Cc: Marek Szyprowski Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/plat-samsung/include/plat/regs-fb.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h index f4259e5..ac10013 100644 --- a/arch/arm/plat-samsung/include/plat/regs-fb.h +++ b/arch/arm/plat-samsung/include/plat/regs-fb.h @@ -292,11 +292,11 @@ #define VIDINTCON0_FRAMESEL0_ACTIVE (0x2 << 15) #define VIDINTCON0_FRAMESEL0_FRONTPORCH (0x3 << 15) -#define VIDINTCON0_FRAMESEL1 (1 << 14) -#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 14) -#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 14) -#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 14) -#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 14) +#define VIDINTCON0_FRAMESEL1 (1 << 13) +#define VIDINTCON0_FRAMESEL1_NONE (0x0 << 13) +#define VIDINTCON0_FRAMESEL1_BACKPORCH (0x1 << 13) +#define VIDINTCON0_FRAMESEL1_VSYNC (0x2 << 13) +#define VIDINTCON0_FRAMESEL1_FRONTPORCH (0x3 << 13) #define VIDINTCON0_INT_FRAME (1 << 12) #define VIDINTCON0_FIFIOSEL_MASK (0x7f << 5) -- cgit v1.1