From 85f9eebccde51e24896f31383f5b70776362e1a6 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Sat, 25 Mar 2006 16:29:37 +0100 Subject: [PATCH] x86_64: Use cpu_relax in poll loop in GART IOMMU The code waits for the GART to clear the TLB flush bit. Use cpu_relax in this time to allow hypervisors to yield the CPU in this time. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/pci-gart.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/x86_64/kernel/pci-gart.c') diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c index 0c3f052..ebd125e 100644 --- a/arch/x86_64/kernel/pci-gart.c +++ b/arch/x86_64/kernel/pci-gart.c @@ -148,9 +148,12 @@ static void flush_gart(struct device *dev) if (!northbridges[i]) continue; /* Make sure the hardware actually executed the flush. */ - do { + for (;;) { pci_read_config_dword(northbridges[i], 0x9c, &w); - } while (w & 1); + if (!(w & 1)) + break; + cpu_relax(); + } } if (!flushed) printk("nothing to flush?\n"); -- cgit v1.1 From 9c01dda02f417270e733e38effe1084c77ae107d Mon Sep 17 00:00:00 2001 From: Navin Boppuri Date: Sat, 25 Mar 2006 16:31:40 +0100 Subject: [PATCH] x86_64: Search K8 devices on more devices. arch/x86_64/kernel/aperture.c: The search for the AGP bridge has been extended to search for all the 256 buses instead of the first 32. This is required since on a some systems, the bridge may be located on a bus much farther than the first 32. By searching all 256 buses, we guarantee that the search succeeds on such systems. arch/x86_64/kernel/pci-gart.c: The search for the Northbridge is not limited to just bus 0 anymore. This is required because on certain systems, we may not find one on bus 0. Signed-off-by: Navin Boppuri Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/pci-gart.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'arch/x86_64/kernel/pci-gart.c') diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c index ebd125e..a6c01e1 100644 --- a/arch/x86_64/kernel/pci-gart.c +++ b/arch/x86_64/kernel/pci-gart.c @@ -65,9 +65,7 @@ static u32 gart_unmapped_entry; #define for_all_nb(dev) \ dev = NULL; \ - while ((dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1103, dev))!=NULL)\ - if (dev->bus->number == 0 && \ - (PCI_SLOT(dev->devfn) >= 24) && (PCI_SLOT(dev->devfn) <= 31)) + while ((dev = pci_get_device(PCI_VENDOR_ID_AMD, 0x1103, dev))!=NULL) static struct pci_dev *northbridges[MAX_NB]; static u32 northbridge_flush_word[MAX_NB]; -- cgit v1.1