From ed740cb9b7f6eaee7bb45a07ce53ff9e73a92798 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 3 Jun 2009 08:18:56 +0000 Subject: sh: sh7722 mode pin definitions This patch adds sh7722 mode pin and pin function controller comments. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/sh/include/cpu-sh4/cpu/sh7722.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'arch/sh') diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h index 4b3096f..738ea43 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7722.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h @@ -1,6 +1,20 @@ #ifndef __ASM_SH7722_H__ #define __ASM_SH7722_H__ +/* Boot Mode Pins: + * + * MD0: CPG - Clock Mode 0->3 + * MD1: CPG - Clock Mode 0->3 + * MD2: CPG - Reserved (L: Normal operation) + * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10] + * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3] + * MD8: Test Mode + */ + +/* Pin Function Controller: + * GPIO_FN_xx - GPIO used to select pin function + * GPIO_Pxx - GPIO mapped to real I/O pin on CPU + */ enum { /* PTA */ GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4, -- cgit v1.1